Lines Matching refs:eeh_ops

715 	eeh_ops->read_config(pdn, cap + PCI_EXP_SLTSTA, 2, &val);  in eeh_bridge_check_link()
722 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCAP, 2, &val); in eeh_bridge_check_link()
724 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCTL, 2, &val); in eeh_bridge_check_link()
729 eeh_ops->write_config(pdn, cap + PCI_EXP_SLTCTL, 2, val); in eeh_bridge_check_link()
735 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCTL, 2, &val); in eeh_bridge_check_link()
737 eeh_ops->write_config(pdn, cap + PCI_EXP_LNKCTL, 2, val); in eeh_bridge_check_link()
740 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCAP, 4, &val); in eeh_bridge_check_link()
753 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKSTA, 2, &val); in eeh_bridge_check_link()
778 eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]); in eeh_restore_bridge_bars()
780 eeh_ops->write_config(pdn, 14*4, 4, edev->config_space[14]); in eeh_restore_bridge_bars()
783 eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_bridge_bars()
785 eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1, in eeh_restore_bridge_bars()
788 eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]); in eeh_restore_bridge_bars()
791 eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1]); in eeh_restore_bridge_bars()
804 eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]); in eeh_restore_device_bars()
806 eeh_ops->write_config(pdn, 12*4, 4, edev->config_space[12]); in eeh_restore_device_bars()
808 eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_device_bars()
810 eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1, in eeh_restore_device_bars()
814 eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]); in eeh_restore_device_bars()
820 eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cmd); in eeh_restore_device_bars()
829 eeh_ops->write_config(pdn, PCI_COMMAND, 4, cmd); in eeh_restore_device_bars()
852 if (eeh_ops->restore_config && pdn) in eeh_restore_one_device_bars()
853 eeh_ops->restore_config(pdn); in eeh_restore_one_device_bars()