Lines Matching refs:d0
30 movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */
44 movel MCFSIM_DMR0,%d0 /* get mask for 1st bank */
45 btst #0,%d0 /* check if region enabled */
47 andl #0xfffc0000,%d0
49 addl #0x00040000,%d0 /* convert mask to size */
57 addl %d1,%d0 /* total mem size in d0 */
63 movel MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
64 andil #0xfffff000,%d0 /* mask out chip select options */
65 negl %d0 /* negate bits */
70 clrl %d0
75 moveql #1, %d0
76 lsll %d2, %d0 /* 2 ^ exponent */
84 addl %d1, %d0 /* Total size of SDRAM in d0 */
155 movel #CACHE_INIT,%d0 /* disable cache */
156 movec %d0,%CACR
162 movel #CONFIG_MBAR+1,%d0 /* configured MBAR address */
163 movec %d0,%MBAR /* set it */
185 addl %a7,%d0
186 movel %d0,_ramend /* set end ram addr */
195 movel #ACR0_MODE,%d0 /* set RAM region for caching */
196 movec %d0,%ACR0
197 movel #ACR1_MODE,%d0 /* anything else to cache? */
198 movec %d0,%ACR1
200 movel #ACR2_MODE,%d0
201 movec %d0,%ACR2
202 movel #ACR3_MODE,%d0
203 movec %d0,%ACR3
205 movel #CACHE_MODE,%d0 /* enable cache */
206 movec %d0,%CACR
213 movel #(MMUBASE+1),%d0 /* enable MMUBAR registers */
214 movec %d0,%MMUBAR
215 movel #MMUOR_CA,%d0 /* clear TLB entries */
216 movel %d0,MMUOR
217 movel #0,%d0 /* set ASID to 0 */
218 movec %d0,%asid
220 movel #MMUCR_EN,%d0 /* Enable the identity map */
221 movel %d0,MMUCR
237 movel 8(%a0),%d0 /* get size of ROMFS */
238 addql #8,%d0 /* allow for rounding */
239 andl #0xfffffffc, %d0 /* whole words */
241 addl %d0,%a0 /* copy from end */
242 addl %d0,%a1 /* copy from end */
246 movel -(%a0),%d0 /* copy dword */
247 movel %d0,-(%a1)
262 clrl %d0 /* set value */
264 movel %d0,(%a0)+ /* clear each word */
279 movel #CPU_COLDFIRE,%d0
280 movel %d0,m68k_cputype /* Mark us as a ColdFire */
281 movel #MMU_COLDFIRE,%d0
282 movel %d0,m68k_mmutype
283 movel #FPU_COLDFIRE,%d0
284 movel %d0,m68k_fputype
285 movel #MACH_M54XX,%d0
286 movel %d0,m68k_machtype /* Mark us as a 54xx machine */