Lines Matching refs:p6
101 tnat.z p6,p7=r32 // check argument register for being NaT
120 (p6) st8 [r18]=r32
145 tnat.nz p6,p0 = r33 // guard against NaT argument
146 (p6) br.cond.spnt.few .fail_einval
194 tnat.nz p6,p0 = r31 // guard against Nat argument
195 (p6) br.cond.spnt.few .fail_einval
209 cmp.ne p6, p0 = 0, r2 // Fallback if work is scheduled
210 (p6) br.cond.spnt.many fsys_fallback_syscall
235 MOV_FROM_ITC(p8, p6, r2, r10) // CPU_TIMER. 36 clocks latency!!!
243 (p13) cmp.gt.unc p6,p7 = r3,r0 // check if it is less than last. p6,p7 cleared
246 (p6) sub r10 = r25,r24 // time we got was less than last_cycle
282 cmp.ge p6,p0 = r8,r2
286 (p6) sub r8 = r8,r2
287 (p6) add r9 = 1,r9 // two nops before the branch.
289 (p6) br.cond.dpnt.few .time_normalize
319 cmp4.ltu p6, p0 = CLOCK_MONOTONIC, r32
321 (p6) br.spnt.few fsys_fallback_syscall
337 tnat.nz p6,p0 = r32 // guard against NaT argument
342 (p6) br.cond.spnt.few .fail_einval // B
347 cmp.ne p6,p0=r32,r0
353 EX(.fail_efault, (p6) probe.w.fault r32, 3) // M This takes 5 cycles
364 EX(.fail_efault, (p6) st4 [r32] = r3)
369 EX(.fail_efault, (p6) probe.w.fault r32, 3) // M This takes 5 cycles
376 EX(.fail_efault, (p6) st4 [r32] = r3)
486 MOV_FROM_ITC(p0, p6, r30, r23) // M get cycle for accounting
537 SSM_PSR_I(p0, p6, r22) // M2 we're on kernel stacks now, reenable irqs