61 static void __iomem *timer_base;  variable
67 	val = __raw_readl(timer_base + EPITCR);  in epit_irq_disable()
69 	__raw_writel(val, timer_base + EPITCR);  in epit_irq_disable()
76 	val = __raw_readl(timer_base + EPITCR);  in epit_irq_enable()
78 	__raw_writel(val, timer_base + EPITCR);  in epit_irq_enable()
83 	__raw_writel(EPITSR_OCIF, timer_base + EPITSR);  in epit_irq_acknowledge()
90 	return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32,  in epit_clocksource_init()
101 	tcmp = __raw_readl(timer_base + EPITCNR);  in epit_set_next_event()
103 	__raw_writel(tcmp - evt, timer_base + EPITCMPR);  in epit_set_next_event()
211 	timer_base = base;  in epit_timer_init()
216 	__raw_writel(0x0, timer_base + EPITCR);  in epit_timer_init()
218 	__raw_writel(0xffffffff, timer_base + EPITLR);  in epit_timer_init()
220 			timer_base + EPITCR);  in epit_timer_init()