Lines Matching refs:clocks
31 clocks = <&ccu1 CLK_CPU_CORE>;
35 clocks {
74 clocks =<&ccu1 CLK_CPU_SCT>;
86 clocks = <&ccu1 CLK_CPU_DMA>;
105 clocks = <&ccu1 CLK_SPIFI>, <&ccu1 CLK_CPU_SPIFI>;
116 clocks = <&ccu2 CLK_SDIO>, <&ccu1 CLK_CPU_SDIO>;
126 clocks = <&ccu1 CLK_CPU_USB0>;
138 clocks = <&ccu1 CLK_CPU_USB1>;
146 clocks = <&ccu1 CLK_CPU_EMCDIV>, <&ccu1 CLK_CPU_EMC>;
163 clocks = <&cgu BASE_LCD_CLK>, <&ccu1 CLK_CPU_LCD>;
174 clocks = <&ccu1 CLK_CPU_ETHERNET>;
184 clocks = <&ccu1 CLK_CPU_CREG>;
189 clocks = <&ccu1 CLK_USB0>;
205 clocks = <&xtal>, <&xtal32>, <&enet_rx_clk>, <&enet_tx_clk>, <&gp_clkin>;
212 clocks = <&cgu BASE_APB3_CLK>, <&cgu BASE_APB1_CLK>,
226 clocks = <&cgu BASE_AUDIO_CLK>, <&cgu BASE_UART3_CLK>,
239 clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_BUS>;
248 clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_WWDT>;
257 clocks = <&ccu2 CLK_APB0_UART0>, <&ccu1 CLK_CPU_UART0>;
273 clocks = <&ccu2 CLK_APB0_UART1>, <&ccu1 CLK_CPU_UART1>;
286 clocks = <&ccu2 CLK_APB0_SSP0>, <&ccu1 CLK_CPU_SSP0>;
301 clocks = <&ccu1 CLK_CPU_TIMER0>;
310 clocks = <&ccu1 CLK_CPU_TIMER1>;
318 clocks = <&ccu1 CLK_CPU_SCU>;
325 clocks = <&ccu1 CLK_APB1_I2C0>;
336 clocks = <&ccu1 CLK_APB1_CAN1>;
346 clocks = <&ccu2 CLK_APB2_UART2>, <&ccu1 CLK_CPU_UART2>;
360 clocks = <&ccu2 CLK_APB2_UART3>, <&ccu1 CLK_CPU_UART3>;
375 clocks = <&ccu1 CLK_CPU_TIMER2>;
384 clocks = <&ccu1 CLK_CPU_TIMER3>;
393 clocks = <&ccu2 CLK_APB2_SSP1>, <&ccu1 CLK_CPU_SSP1>;
415 clocks = <&ccu1 CLK_APB3_I2C1>;
426 clocks = <&ccu1 CLK_APB3_CAN0>;
434 clocks = <&ccu1 CLK_CPU_GPIO>;