Lines Matching refs:control_status_reg
52 u32 control_status_reg; in xilinx_wdt_start() local
58 control_status_reg = ioread32(xdev->base + XWT_TWCSR0_OFFSET); in xilinx_wdt_start()
59 control_status_reg |= (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK); in xilinx_wdt_start()
61 iowrite32((control_status_reg | XWT_CSR0_EWDT1_MASK), in xilinx_wdt_start()
73 u32 control_status_reg; in xilinx_wdt_stop() local
78 control_status_reg = ioread32(xdev->base + XWT_TWCSR0_OFFSET); in xilinx_wdt_stop()
80 iowrite32((control_status_reg & ~XWT_CSR0_EWDT1_MASK), in xilinx_wdt_stop()
93 u32 control_status_reg; in xilinx_wdt_keepalive() local
98 control_status_reg = ioread32(xdev->base + XWT_TWCSR0_OFFSET); in xilinx_wdt_keepalive()
99 control_status_reg |= (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK); in xilinx_wdt_keepalive()
100 iowrite32(control_status_reg, xdev->base + XWT_TWCSR0_OFFSET); in xilinx_wdt_keepalive()