Lines Matching refs:hw_params
95 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_init_fs_ls_pclk_sel()
96 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_init_fs_ls_pclk_sel()
298 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_phy_init()
299 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_phy_init()
320 switch (hsotg->hw_params.arch) { in dwc2_gahbcfg_init()
369 switch (hsotg->hw_params.op_mode) { in dwc2_gusbcfg_init()
528 struct dwc2_hw_params *hw = &hsotg->hw_params; in dwc2_calculate_dynamic_fifo()
627 hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) { in dwc2_config_fifos()
682 u32 op_mode = hsotg->hw_params.op_mode; in dwc2_core_host_init()
683 if (hsotg->hw_params.snpsid < DWC2_CORE_REV_2_90a || in dwc2_core_host_init()
684 !hsotg->hw_params.dma_desc_enable || in dwc2_core_host_init()
1739 if ((usbcfg & GUSBCFG_PHYSEL) && hsotg->hw_params.fs_phy_type == in dwc2_calc_frame_interval()
1752 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_SHARED_UTMI) in dwc2_calc_frame_interval()
1755 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED) in dwc2_calc_frame_interval()
2029 if (hsotg->hw_params.op_mode != GHWCFG2_OP_MODE_HNP_SRP_CAPABLE) in dwc2_set_param_otg_cap()
2033 switch (hsotg->hw_params.op_mode) { in dwc2_set_param_otg_cap()
2057 switch (hsotg->hw_params.op_mode) { in dwc2_set_param_otg_cap()
2080 if (val > 0 && hsotg->hw_params.arch == GHWCFG2_SLAVE_ONLY_ARCH) in dwc2_set_param_dma_enable()
2090 val = hsotg->hw_params.arch != GHWCFG2_SLAVE_ONLY_ARCH; in dwc2_set_param_dma_enable()
2102 !hsotg->hw_params.dma_desc_enable)) in dwc2_set_param_dma_desc_enable()
2113 hsotg->hw_params.dma_desc_enable); in dwc2_set_param_dma_desc_enable()
2142 if (val > 0 && !hsotg->hw_params.enable_dynamic_fifo) in dwc2_set_param_enable_dynamic_fifo()
2152 val = hsotg->hw_params.enable_dynamic_fifo; in dwc2_set_param_enable_dynamic_fifo()
2163 if (val < 16 || val > hsotg->hw_params.host_rx_fifo_size) in dwc2_set_param_host_rx_fifo_size()
2171 val = hsotg->hw_params.host_rx_fifo_size; in dwc2_set_param_host_rx_fifo_size()
2182 if (val < 16 || val > hsotg->hw_params.host_nperio_tx_fifo_size) in dwc2_set_param_host_nperio_tx_fifo_size()
2190 val = hsotg->hw_params.host_nperio_tx_fifo_size; in dwc2_set_param_host_nperio_tx_fifo_size()
2202 if (val < 16 || val > hsotg->hw_params.host_perio_tx_fifo_size) in dwc2_set_param_host_perio_tx_fifo_size()
2210 val = hsotg->hw_params.host_perio_tx_fifo_size; in dwc2_set_param_host_perio_tx_fifo_size()
2222 if (val < 2047 || val > hsotg->hw_params.max_transfer_size) in dwc2_set_param_max_transfer_size()
2230 val = hsotg->hw_params.max_transfer_size; in dwc2_set_param_max_transfer_size()
2241 if (val < 15 || val > hsotg->hw_params.max_packet_count) in dwc2_set_param_max_packet_count()
2249 val = hsotg->hw_params.max_packet_count; in dwc2_set_param_max_packet_count()
2260 if (val < 1 || val > hsotg->hw_params.host_channels) in dwc2_set_param_host_channels()
2268 val = hsotg->hw_params.host_channels; in dwc2_set_param_host_channels()
2290 hs_phy_type = hsotg->hw_params.hs_phy_type; in dwc2_set_param_phy_type()
2291 fs_phy_type = hsotg->hw_params.fs_phy_type; in dwc2_set_param_phy_type()
2425 switch (hsotg->hw_params.utmi_phy_data_width) { in dwc2_set_param_phy_utmi_width()
2443 val = (hsotg->hw_params.utmi_phy_data_width == in dwc2_set_param_phy_utmi_width()
2492 if (val == 1 && !(hsotg->hw_params.i2c_enable)) in dwc2_set_param_i2c_enable()
2500 val = hsotg->hw_params.i2c_enable; in dwc2_set_param_i2c_enable()
2521 if (val == 1 && !hsotg->hw_params.en_multiple_tx_fifo) in dwc2_set_param_en_multiple_tx_fifo()
2529 val = hsotg->hw_params.en_multiple_tx_fifo; in dwc2_set_param_en_multiple_tx_fifo()
2549 if (val == 1 && hsotg->hw_params.snpsid < DWC2_CORE_REV_2_92a) in dwc2_set_param_reload_ctl()
2557 val = hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_92a; in dwc2_set_param_reload_ctl()
2657 struct dwc2_hw_params *hw = &hsotg->hw_params; in dwc2_get_hwparams()