Lines Matching refs:sdd
200 static void flush_fifo(struct s3c64xx_spi_driver_data *sdd) in flush_fifo() argument
202 void __iomem *regs = sdd->regs; in flush_fifo()
221 } while (TX_FIFO_LVL(val, sdd) && loops--); in flush_fifo()
224 dev_warn(&sdd->pdev->dev, "Timed out flushing TX FIFO\n"); in flush_fifo()
230 if (RX_FIFO_LVL(val, sdd)) in flush_fifo()
237 dev_warn(&sdd->pdev->dev, "Timed out flushing RX FIFO\n"); in flush_fifo()
250 struct s3c64xx_spi_driver_data *sdd; in s3c64xx_spi_dmacb() local
255 sdd = container_of(data, in s3c64xx_spi_dmacb()
258 sdd = container_of(data, in s3c64xx_spi_dmacb()
261 spin_lock_irqsave(&sdd->lock, flags); in s3c64xx_spi_dmacb()
264 sdd->state &= ~RXBUSY; in s3c64xx_spi_dmacb()
265 if (!(sdd->state & TXBUSY)) in s3c64xx_spi_dmacb()
266 complete(&sdd->xfer_completion); in s3c64xx_spi_dmacb()
268 sdd->state &= ~TXBUSY; in s3c64xx_spi_dmacb()
269 if (!(sdd->state & RXBUSY)) in s3c64xx_spi_dmacb()
270 complete(&sdd->xfer_completion); in s3c64xx_spi_dmacb()
273 spin_unlock_irqrestore(&sdd->lock, flags); in s3c64xx_spi_dmacb()
279 struct s3c64xx_spi_driver_data *sdd; in prepare_dma() local
286 sdd = container_of((void *)dma, in prepare_dma()
289 config.src_addr = sdd->sfr_start + S3C64XX_SPI_RX_DATA; in prepare_dma()
290 config.src_addr_width = sdd->cur_bpw / 8; in prepare_dma()
294 sdd = container_of((void *)dma, in prepare_dma()
297 config.dst_addr = sdd->sfr_start + S3C64XX_SPI_TX_DATA; in prepare_dma()
298 config.dst_addr_width = sdd->cur_bpw / 8; in prepare_dma()
315 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); in s3c64xx_spi_prepare_transfer() local
316 dma_filter_fn filter = sdd->cntrlr_info->filter; in s3c64xx_spi_prepare_transfer()
317 struct device *dev = &sdd->pdev->dev; in s3c64xx_spi_prepare_transfer()
321 if (!is_polling(sdd)) { in s3c64xx_spi_prepare_transfer()
326 sdd->rx_dma.ch = dma_request_slave_channel_compat(mask, filter, in s3c64xx_spi_prepare_transfer()
327 (void *)(long)sdd->rx_dma.dmach, dev, "rx"); in s3c64xx_spi_prepare_transfer()
328 if (!sdd->rx_dma.ch) { in s3c64xx_spi_prepare_transfer()
333 spi->dma_rx = sdd->rx_dma.ch; in s3c64xx_spi_prepare_transfer()
335 sdd->tx_dma.ch = dma_request_slave_channel_compat(mask, filter, in s3c64xx_spi_prepare_transfer()
336 (void *)(long)sdd->tx_dma.dmach, dev, "tx"); in s3c64xx_spi_prepare_transfer()
337 if (!sdd->tx_dma.ch) { in s3c64xx_spi_prepare_transfer()
342 spi->dma_tx = sdd->tx_dma.ch; in s3c64xx_spi_prepare_transfer()
348 dma_release_channel(sdd->rx_dma.ch); in s3c64xx_spi_prepare_transfer()
355 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); in s3c64xx_spi_unprepare_transfer() local
358 if (!is_polling(sdd)) { in s3c64xx_spi_unprepare_transfer()
359 dma_release_channel(sdd->rx_dma.ch); in s3c64xx_spi_unprepare_transfer()
360 dma_release_channel(sdd->tx_dma.ch); in s3c64xx_spi_unprepare_transfer()
370 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); in s3c64xx_spi_can_dma() local
372 return xfer->len > (FIFO_LVL_MASK(sdd) >> 1) + 1; in s3c64xx_spi_can_dma()
375 static void enable_datapath(struct s3c64xx_spi_driver_data *sdd, in enable_datapath() argument
379 void __iomem *regs = sdd->regs; in enable_datapath()
396 writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff) in enable_datapath()
402 sdd->state |= TXBUSY; in enable_datapath()
406 prepare_dma(&sdd->tx_dma, &xfer->tx_sg); in enable_datapath()
408 switch (sdd->cur_bpw) { in enable_datapath()
426 sdd->state |= RXBUSY; in enable_datapath()
428 if (sdd->port_conf->high_speed && sdd->cur_speed >= 30000000UL in enable_datapath()
429 && !(sdd->cur_mode & SPI_CPHA)) in enable_datapath()
435 writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff) in enable_datapath()
438 prepare_dma(&sdd->rx_dma, &xfer->rx_sg); in enable_datapath()
446 static u32 s3c64xx_spi_wait_for_timeout(struct s3c64xx_spi_driver_data *sdd, in s3c64xx_spi_wait_for_timeout() argument
449 void __iomem *regs = sdd->regs; in s3c64xx_spi_wait_for_timeout()
454 u32 max_fifo = (FIFO_LVL_MASK(sdd) >> 1) + 1; in s3c64xx_spi_wait_for_timeout()
461 } while (RX_FIFO_LVL(status, sdd) < max_fifo && --val); in s3c64xx_spi_wait_for_timeout()
464 return RX_FIFO_LVL(status, sdd); in s3c64xx_spi_wait_for_timeout()
467 static int wait_for_dma(struct s3c64xx_spi_driver_data *sdd, in wait_for_dma() argument
470 void __iomem *regs = sdd->regs; in wait_for_dma()
476 ms = xfer->len * 8 * 1000 / sdd->cur_speed; in wait_for_dma()
480 val = wait_for_completion_timeout(&sdd->xfer_completion, val); in wait_for_dma()
494 while ((TX_FIFO_LVL(status, sdd) in wait_for_dma()
495 || !S3C64XX_SPI_ST_TX_DONE(status, sdd)) in wait_for_dma()
510 static int wait_for_pio(struct s3c64xx_spi_driver_data *sdd, in wait_for_pio() argument
513 void __iomem *regs = sdd->regs; in wait_for_pio()
522 ms = xfer->len * 8 * 1000 / sdd->cur_speed; in wait_for_pio()
528 } while (RX_FIFO_LVL(status, sdd) < xfer->len && --val); in wait_for_pio()
533 sdd->state &= ~TXBUSY; in wait_for_pio()
545 loops = xfer->len / ((FIFO_LVL_MASK(sdd) >> 1) + 1); in wait_for_pio()
549 cpy_len = s3c64xx_spi_wait_for_timeout(sdd, in wait_for_pio()
552 switch (sdd->cur_bpw) { in wait_for_pio()
569 sdd->state &= ~RXBUSY; in wait_for_pio()
574 static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) in s3c64xx_spi_config() argument
576 void __iomem *regs = sdd->regs; in s3c64xx_spi_config()
580 if (sdd->port_conf->clk_from_cmu) { in s3c64xx_spi_config()
581 clk_disable_unprepare(sdd->src_clk); in s3c64xx_spi_config()
594 if (sdd->cur_mode & SPI_CPOL) in s3c64xx_spi_config()
597 if (sdd->cur_mode & SPI_CPHA) in s3c64xx_spi_config()
607 switch (sdd->cur_bpw) { in s3c64xx_spi_config()
624 if (sdd->port_conf->clk_from_cmu) { in s3c64xx_spi_config()
627 clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); in s3c64xx_spi_config()
629 clk_prepare_enable(sdd->src_clk); in s3c64xx_spi_config()
634 val |= ((clk_get_rate(sdd->src_clk) / sdd->cur_speed / 2 - 1) in s3c64xx_spi_config()
650 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); in s3c64xx_spi_prepare_message() local
655 if (sdd->cur_speed != spi->max_speed_hz in s3c64xx_spi_prepare_message()
656 || sdd->cur_mode != spi->mode in s3c64xx_spi_prepare_message()
657 || sdd->cur_bpw != spi->bits_per_word) { in s3c64xx_spi_prepare_message()
658 sdd->cur_bpw = spi->bits_per_word; in s3c64xx_spi_prepare_message()
659 sdd->cur_speed = spi->max_speed_hz; in s3c64xx_spi_prepare_message()
660 sdd->cur_mode = spi->mode; in s3c64xx_spi_prepare_message()
661 s3c64xx_spi_config(sdd); in s3c64xx_spi_prepare_message()
665 writel(cs->fb_delay & 0x3, sdd->regs + S3C64XX_SPI_FB_CLK); in s3c64xx_spi_prepare_message()
674 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); in s3c64xx_spi_transfer_one() local
681 reinit_completion(&sdd->xfer_completion); in s3c64xx_spi_transfer_one()
687 if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) { in s3c64xx_spi_transfer_one()
688 sdd->cur_bpw = bpw; in s3c64xx_spi_transfer_one()
689 sdd->cur_speed = speed; in s3c64xx_spi_transfer_one()
690 s3c64xx_spi_config(sdd); in s3c64xx_spi_transfer_one()
695 if (!is_polling(sdd) && in s3c64xx_spi_transfer_one()
696 (sdd->rx_dma.ch && sdd->tx_dma.ch && in s3c64xx_spi_transfer_one()
697 (xfer->len > ((FIFO_LVL_MASK(sdd) >> 1) + 1)))) in s3c64xx_spi_transfer_one()
700 spin_lock_irqsave(&sdd->lock, flags); in s3c64xx_spi_transfer_one()
703 sdd->state &= ~RXBUSY; in s3c64xx_spi_transfer_one()
704 sdd->state &= ~TXBUSY; in s3c64xx_spi_transfer_one()
706 enable_datapath(sdd, spi, xfer, use_dma); in s3c64xx_spi_transfer_one()
709 if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) in s3c64xx_spi_transfer_one()
710 writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL); in s3c64xx_spi_transfer_one()
712 writel(readl(sdd->regs + S3C64XX_SPI_SLAVE_SEL) in s3c64xx_spi_transfer_one()
714 sdd->regs + S3C64XX_SPI_SLAVE_SEL); in s3c64xx_spi_transfer_one()
716 spin_unlock_irqrestore(&sdd->lock, flags); in s3c64xx_spi_transfer_one()
719 status = wait_for_dma(sdd, xfer); in s3c64xx_spi_transfer_one()
721 status = wait_for_pio(sdd, xfer); in s3c64xx_spi_transfer_one()
726 (sdd->state & RXBUSY) ? 'f' : 'p', in s3c64xx_spi_transfer_one()
727 (sdd->state & TXBUSY) ? 'f' : 'p', in s3c64xx_spi_transfer_one()
732 && (sdd->state & TXBUSY)) in s3c64xx_spi_transfer_one()
733 dmaengine_terminate_all(sdd->tx_dma.ch); in s3c64xx_spi_transfer_one()
735 && (sdd->state & RXBUSY)) in s3c64xx_spi_transfer_one()
736 dmaengine_terminate_all(sdd->rx_dma.ch); in s3c64xx_spi_transfer_one()
739 flush_fifo(sdd); in s3c64xx_spi_transfer_one()
785 struct s3c64xx_spi_driver_data *sdd; in s3c64xx_spi_setup() local
789 sdd = spi_master_get_devdata(spi->master); in s3c64xx_spi_setup()
822 sci = sdd->cntrlr_info; in s3c64xx_spi_setup()
824 pm_runtime_get_sync(&sdd->pdev->dev); in s3c64xx_spi_setup()
827 if (!sdd->port_conf->clk_from_cmu) { in s3c64xx_spi_setup()
831 speed = clk_get_rate(sdd->src_clk) / 2 / (0 + 1); in s3c64xx_spi_setup()
836 psr = clk_get_rate(sdd->src_clk) / 2 / spi->max_speed_hz - 1; in s3c64xx_spi_setup()
841 speed = clk_get_rate(sdd->src_clk) / 2 / (psr + 1); in s3c64xx_spi_setup()
851 speed = clk_get_rate(sdd->src_clk) / 2 / (psr + 1); in s3c64xx_spi_setup()
862 pm_runtime_put(&sdd->pdev->dev); in s3c64xx_spi_setup()
863 if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) in s3c64xx_spi_setup()
864 writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); in s3c64xx_spi_setup()
868 pm_runtime_put(&sdd->pdev->dev); in s3c64xx_spi_setup()
870 if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) in s3c64xx_spi_setup()
871 writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); in s3c64xx_spi_setup()
907 struct s3c64xx_spi_driver_data *sdd = data; in s3c64xx_spi_irq() local
908 struct spi_master *spi = sdd->master; in s3c64xx_spi_irq()
911 val = readl(sdd->regs + S3C64XX_SPI_STATUS); in s3c64xx_spi_irq()
931 writel(clr, sdd->regs + S3C64XX_SPI_PENDING_CLR); in s3c64xx_spi_irq()
932 writel(0, sdd->regs + S3C64XX_SPI_PENDING_CLR); in s3c64xx_spi_irq()
937 static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel) in s3c64xx_spi_hwinit() argument
939 struct s3c64xx_spi_info *sci = sdd->cntrlr_info; in s3c64xx_spi_hwinit()
940 void __iomem *regs = sdd->regs; in s3c64xx_spi_hwinit()
943 sdd->cur_speed = 0; in s3c64xx_spi_hwinit()
945 if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) in s3c64xx_spi_hwinit()
946 writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); in s3c64xx_spi_hwinit()
951 if (!sdd->port_conf->clk_from_cmu) in s3c64xx_spi_hwinit()
973 flush_fifo(sdd); in s3c64xx_spi_hwinit()
1029 struct s3c64xx_spi_driver_data *sdd; in s3c64xx_spi_probe() local
1067 sdd = spi_master_get_devdata(master); in s3c64xx_spi_probe()
1068 sdd->port_conf = s3c64xx_spi_get_port_config(pdev); in s3c64xx_spi_probe()
1069 sdd->master = master; in s3c64xx_spi_probe()
1070 sdd->cntrlr_info = sci; in s3c64xx_spi_probe()
1071 sdd->pdev = pdev; in s3c64xx_spi_probe()
1072 sdd->sfr_start = mem_res->start; in s3c64xx_spi_probe()
1080 sdd->port_id = ret; in s3c64xx_spi_probe()
1082 sdd->port_id = pdev->id; in s3c64xx_spi_probe()
1085 sdd->cur_bpw = 8; in s3c64xx_spi_probe()
1087 if (!sdd->pdev->dev.of_node) { in s3c64xx_spi_probe()
1091 sdd->port_conf->quirks = S3C64XX_SPI_QUIRK_POLL; in s3c64xx_spi_probe()
1093 sdd->tx_dma.dmach = res->start; in s3c64xx_spi_probe()
1098 sdd->port_conf->quirks = S3C64XX_SPI_QUIRK_POLL; in s3c64xx_spi_probe()
1100 sdd->rx_dma.dmach = res->start; in s3c64xx_spi_probe()
1103 sdd->tx_dma.direction = DMA_MEM_TO_DEV; in s3c64xx_spi_probe()
1104 sdd->rx_dma.direction = DMA_DEV_TO_MEM; in s3c64xx_spi_probe()
1107 master->bus_num = sdd->port_id; in s3c64xx_spi_probe()
1121 if (!is_polling(sdd)) in s3c64xx_spi_probe()
1124 sdd->regs = devm_ioremap_resource(&pdev->dev, mem_res); in s3c64xx_spi_probe()
1125 if (IS_ERR(sdd->regs)) { in s3c64xx_spi_probe()
1126 ret = PTR_ERR(sdd->regs); in s3c64xx_spi_probe()
1137 sdd->clk = devm_clk_get(&pdev->dev, "spi"); in s3c64xx_spi_probe()
1138 if (IS_ERR(sdd->clk)) { in s3c64xx_spi_probe()
1140 ret = PTR_ERR(sdd->clk); in s3c64xx_spi_probe()
1144 if (clk_prepare_enable(sdd->clk)) { in s3c64xx_spi_probe()
1151 sdd->src_clk = devm_clk_get(&pdev->dev, clk_name); in s3c64xx_spi_probe()
1152 if (IS_ERR(sdd->src_clk)) { in s3c64xx_spi_probe()
1155 ret = PTR_ERR(sdd->src_clk); in s3c64xx_spi_probe()
1159 if (clk_prepare_enable(sdd->src_clk)) { in s3c64xx_spi_probe()
1166 s3c64xx_spi_hwinit(sdd, sdd->port_id); in s3c64xx_spi_probe()
1168 spin_lock_init(&sdd->lock); in s3c64xx_spi_probe()
1169 init_completion(&sdd->xfer_completion); in s3c64xx_spi_probe()
1172 "spi-s3c64xx", sdd); in s3c64xx_spi_probe()
1181 sdd->regs + S3C64XX_SPI_INT_EN); in s3c64xx_spi_probe()
1193 sdd->port_id, master->num_chipselect); in s3c64xx_spi_probe()
1196 sdd->rx_dma.dmach, sdd->tx_dma.dmach); in s3c64xx_spi_probe()
1201 clk_disable_unprepare(sdd->src_clk); in s3c64xx_spi_probe()
1203 clk_disable_unprepare(sdd->clk); in s3c64xx_spi_probe()
1213 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); in s3c64xx_spi_remove() local
1217 writel(0, sdd->regs + S3C64XX_SPI_INT_EN); in s3c64xx_spi_remove()
1219 clk_disable_unprepare(sdd->src_clk); in s3c64xx_spi_remove()
1221 clk_disable_unprepare(sdd->clk); in s3c64xx_spi_remove()
1230 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); in s3c64xx_spi_suspend() local
1237 clk_disable_unprepare(sdd->clk); in s3c64xx_spi_suspend()
1238 clk_disable_unprepare(sdd->src_clk); in s3c64xx_spi_suspend()
1241 sdd->cur_speed = 0; /* Output Clock is stopped */ in s3c64xx_spi_suspend()
1249 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); in s3c64xx_spi_resume() local
1250 struct s3c64xx_spi_info *sci = sdd->cntrlr_info; in s3c64xx_spi_resume()
1256 clk_prepare_enable(sdd->src_clk); in s3c64xx_spi_resume()
1257 clk_prepare_enable(sdd->clk); in s3c64xx_spi_resume()
1260 s3c64xx_spi_hwinit(sdd, sdd->port_id); in s3c64xx_spi_resume()
1270 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); in s3c64xx_spi_runtime_suspend() local
1272 clk_disable_unprepare(sdd->clk); in s3c64xx_spi_runtime_suspend()
1273 clk_disable_unprepare(sdd->src_clk); in s3c64xx_spi_runtime_suspend()
1281 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); in s3c64xx_spi_runtime_resume() local
1284 ret = clk_prepare_enable(sdd->src_clk); in s3c64xx_spi_runtime_resume()
1288 ret = clk_prepare_enable(sdd->clk); in s3c64xx_spi_runtime_resume()
1290 clk_disable_unprepare(sdd->src_clk); in s3c64xx_spi_runtime_resume()