135 	OUTB(np, nc_istat, SRST);  in sym_chip_reset()
138 	OUTB(np, nc_istat, 0);  in sym_chip_reset()
160 	OUTB(np, nc_istat, CABRT);  in sym_soft_reset()
172 	OUTB(np, nc_istat, 0);  in sym_soft_reset()
202 	OUTB(np, nc_stest3, TE);  in sym_reset_scsi_bus()
203 	OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));  in sym_reset_scsi_bus()
204 	OUTB(np, nc_scntl1, CRST);  in sym_reset_scsi_bus()
238 	OUTB(np, nc_scntl1, 0);  in sym_reset_scsi_bus()
251 		OUTB(np, nc_scntl3, scntl3);  in sym_selectclock()
258 	OUTB(np, nc_stest1, DBLEN);	   /* Enable clock multiplier */  in sym_selectclock()
274 	OUTB(np, nc_stest3, HSC);		/* Halt the scsi clock	*/  in sym_selectclock()
275 	OUTB(np, nc_scntl3, scntl3);  in sym_selectclock()
276 	OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier	*/  in sym_selectclock()
277 	OUTB(np, nc_stest3, 0x00);		/* Restart scsi clock 	*/  in sym_selectclock()
324 	OUTB(np, nc_dien, 0);	/* mask all dma interrupts */  in getfreq()
333 		OUTB(np, nc_istat1, SIRQD);  in getfreq()
335 	OUTB(np, nc_scntl3, 4);	   /* set pre-scaler to divide by 3 */  in getfreq()
336 	OUTB(np, nc_stime1, 0);	   /* disable general purpose timer */  in getfreq()
337 	OUTB(np, nc_stime1, gen);  /* set to nominal delay of 1<<gen * 125us */  in getfreq()
340 	OUTB(np, nc_stime1, 0);    /* disable general purpose timer */  in getfreq()
346 		OUTB(np, nc_istat1, 0);  in getfreq()
353  	OUTB(np, nc_scntl3, 0);  in getfreq()
412 		OUTB(np, nc_stest1, 0);		/* make sure doubler is OFF */  in sym_getclock()
459 		OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
461 		OUTB(np, nc_stest1, 0);
1017 	OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
1533 	OUTB(np, nc_istat, SIGP|np->istat_sem);
1717 		OUTB(np, nc_stest3, TE|CSF);
1766 	OUTB(np, nc_istat,  0x00);			/*  Remove Reset, abort */
1770 	OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
1772 	OUTB(np, nc_scntl1, 0x00);		/*  odd parity, and remove CRST!! */
1776 	OUTB(np, nc_scid  , RRE|np->myaddr);	/* Adapter SCSI address */
1778 	OUTB(np, nc_istat , SIGP	);		/*  Signal Process */
1779 	OUTB(np, nc_dmode , np->rv_dmode);		/* Burst length, dma mode */
1780 	OUTB(np, nc_ctest5, np->rv_ctest5);	/* Large fifo + large burst */
1782 	OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl);	/* Protect SFBR */
1783 	OUTB(np, nc_ctest3, np->rv_ctest3);	/* Write and invalidate */
1784 	OUTB(np, nc_ctest4, np->rv_ctest4);	/* Master parity checking */
1788 		OUTB(np, nc_stest2, np->rv_stest2);
1790 		OUTB(np, nc_stest2, EXT|np->rv_stest2);
1792 	OUTB(np, nc_stest3, TE);			/* TolerANT enable */
1793 	OUTB(np, nc_stime0, 0x0c);			/* HTH disabled  STO 0.25 sec */
1799 		OUTB(np, nc_aipcntl1, DISAIP);
1810 		OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
1818 		OUTB(np, nc_ctest0, (1<<5));
1828 		OUTB(np, nc_ccntl0, np->rv_ccntl0);
1829 		OUTB(np, nc_ccntl1, np->rv_ccntl1);
1858 		OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
1860 		OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
1866 	OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
2025 	OUTB(np, nc_sxfer,  tp->head.sval);
2026 	OUTB(np, nc_scntl3, tp->head.wval);
2029 		OUTB(np, nc_scntl4, tp->head.uval);
2205 		OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo  */
2206 		OUTB(np, nc_stest3, TE|CSF);		/* clear scsi fifo */
2480 		OUTB(np, nc_ctest3, np->rv_ctest3 | CLF);	/* dma fifo  */
2481 		OUTB(np, nc_stest3, TE|CSF);		/* scsi fifo */
2606 		OUTB(np, HF_PRT, hflags);
2834 		OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
2845 		OUTB(np, nc_istat, CABRT);
2931 	OUTB(np, nc_ctest3, np->rv_ctest3 | CLF);	/* clear dma fifo  */
2932 	OUTB(np, nc_stest3, TE|CSF);		/* clear scsi fifo */
3384 			OUTB(np, nc_istat, SIGP);
3816 	OUTB(np, HF_PRT, hflags);
4045 		OUTB(np, HS_PRT, HS_BUSY);
4182 		OUTB(np, HS_PRT, HS_BUSY);
4282 		OUTB(np, HS_PRT, HS_BUSY);
4313 			OUTB(np, HS_PRT, HS_NEGOTIATE);
4371 	OUTB(np, HS_PRT, HS_BUSY);
4624 		OUTB(np, HS_PRT, HS_BUSY);
5292 	OUTB(np, nc_istat, SIGP|SEM);
5326 	OUTB(np, nc_istat, SIGP|SEM);