408 sirfsoc_gpio_to_bank(struct sirfsoc_gpio_chip *sgpio, unsigned int offset)  in sirfsoc_gpio_to_bank()  argument
410 	return &sgpio->sgpio_bank[offset / SIRFSOC_GPIO_BANK_SIZE];  in sirfsoc_gpio_to_bank()
421 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);  in sirfsoc_gpio_irq_ack()  local
422 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_ack()
429 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_ack()
431 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_ack()
433 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_ack()
435 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_ack()
438 static void __sirfsoc_gpio_irq_mask(struct sirfsoc_gpio_chip *sgpio,  in __sirfsoc_gpio_irq_mask()  argument
447 	spin_lock_irqsave(&sgpio->lock, flags);  in __sirfsoc_gpio_irq_mask()
449 	val = readl(sgpio->chip.regs + offset);  in __sirfsoc_gpio_irq_mask()
452 	writel(val, sgpio->chip.regs + offset);  in __sirfsoc_gpio_irq_mask()
454 	spin_unlock_irqrestore(&sgpio->lock, flags);  in __sirfsoc_gpio_irq_mask()
460 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);  in sirfsoc_gpio_irq_mask()  local
461 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_mask()
463 	__sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE);  in sirfsoc_gpio_irq_mask()
469 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);  in sirfsoc_gpio_irq_unmask()  local
470 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_unmask()
477 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_unmask()
479 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_unmask()
482 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_unmask()
484 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_unmask()
490 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);  in sirfsoc_gpio_irq_type()  local
491 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_type()
498 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_type()
500 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_type()
533 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_type()
535 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_type()
551 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);  in sirfsoc_gpio_handle_irq()  local
559 		bank = &sgpio->sgpio_bank[i];  in sirfsoc_gpio_handle_irq()
567 	status = readl(sgpio->chip.regs + SIRFSOC_GPIO_INT_STATUS(bank->id));  in sirfsoc_gpio_handle_irq()
577 		ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, idx));  in sirfsoc_gpio_handle_irq()
597 static inline void sirfsoc_gpio_set_input(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_input()  argument
602 	val = readl(sgpio->chip.regs + ctrl_offset);  in sirfsoc_gpio_set_input()
604 	writel(val, sgpio->chip.regs + ctrl_offset);  in sirfsoc_gpio_set_input()
609 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);  in sirfsoc_gpio_request()  local
610 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_request()
622 	sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_request()
623 	__sirfsoc_gpio_irq_mask(sgpio, bank, offset);  in sirfsoc_gpio_request()
632 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);  in sirfsoc_gpio_free()  local
633 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_free()
638 	__sirfsoc_gpio_irq_mask(sgpio, bank, offset);  in sirfsoc_gpio_free()
639 	sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_free()
648 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);  in sirfsoc_gpio_direction_input()  local
649 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio);  in sirfsoc_gpio_direction_input()
658 	sirfsoc_gpio_set_input(sgpio, offset);  in sirfsoc_gpio_direction_input()
665 static inline void sirfsoc_gpio_set_output(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_output()  argument
675 	out_ctrl = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_output()
683 	writel(out_ctrl, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_output()
691 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);  in sirfsoc_gpio_direction_output()  local
692 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio);  in sirfsoc_gpio_direction_output()
699 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_direction_output()
701 	sirfsoc_gpio_set_output(sgpio, bank, offset, value);  in sirfsoc_gpio_direction_output()
703 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_direction_output()
710 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);  in sirfsoc_gpio_get_value()  local
711 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_get_value()
717 	val = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_get_value()
727 	struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);  in sirfsoc_gpio_set_value()  local
728 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_set_value()
734 	ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_set_value()
739 	writel(ctrl, sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_set_value()
744 static void sirfsoc_gpio_set_pullup(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_pullup()  argument
753 			u32 val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pullup()
756 			writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pullup()
761 static void sirfsoc_gpio_set_pulldown(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_pulldown()  argument
770 			u32 val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pulldown()
773 			writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pulldown()
781 	static struct sirfsoc_gpio_chip *sgpio;  in sirfsoc_gpio_probe()  local
792 	sgpio = devm_kzalloc(&pdev->dev, sizeof(*sgpio), GFP_KERNEL);  in sirfsoc_gpio_probe()
793 	if (!sgpio)  in sirfsoc_gpio_probe()
795 	spin_lock_init(&sgpio->lock);  in sirfsoc_gpio_probe()
801 	sgpio->chip.gc.request = sirfsoc_gpio_request;  in sirfsoc_gpio_probe()
802 	sgpio->chip.gc.free = sirfsoc_gpio_free;  in sirfsoc_gpio_probe()
803 	sgpio->chip.gc.direction_input = sirfsoc_gpio_direction_input;  in sirfsoc_gpio_probe()
804 	sgpio->chip.gc.get = sirfsoc_gpio_get_value;  in sirfsoc_gpio_probe()
805 	sgpio->chip.gc.direction_output = sirfsoc_gpio_direction_output;  in sirfsoc_gpio_probe()
806 	sgpio->chip.gc.set = sirfsoc_gpio_set_value;  in sirfsoc_gpio_probe()
807 	sgpio->chip.gc.base = 0;  in sirfsoc_gpio_probe()
808 	sgpio->chip.gc.ngpio = SIRFSOC_GPIO_BANK_SIZE * SIRFSOC_GPIO_NO_OF_BANKS;  in sirfsoc_gpio_probe()
809 	sgpio->chip.gc.label = kstrdup(np->full_name, GFP_KERNEL);  in sirfsoc_gpio_probe()
810 	sgpio->chip.gc.of_node = np;  in sirfsoc_gpio_probe()
811 	sgpio->chip.gc.of_xlate = sirfsoc_gpio_of_xlate;  in sirfsoc_gpio_probe()
812 	sgpio->chip.gc.of_gpio_n_cells = 2;  in sirfsoc_gpio_probe()
813 	sgpio->chip.gc.dev = &pdev->dev;  in sirfsoc_gpio_probe()
814 	sgpio->chip.regs = regs;  in sirfsoc_gpio_probe()
816 	err = gpiochip_add(&sgpio->chip.gc);  in sirfsoc_gpio_probe()
823 	err =  gpiochip_irqchip_add(&sgpio->chip.gc,  in sirfsoc_gpio_probe()
834 		bank = &sgpio->sgpio_bank[i];  in sirfsoc_gpio_probe()
842 		gpiochip_set_chained_irqchip(&sgpio->chip.gc,  in sirfsoc_gpio_probe()
848 	err = gpiochip_add_pin_range(&sgpio->chip.gc, dev_name(&pdev->dev),  in sirfsoc_gpio_probe()
858 		sirfsoc_gpio_set_pullup(sgpio, pullups);  in sirfsoc_gpio_probe()
862 		sirfsoc_gpio_set_pulldown(sgpio, pulldowns);  in sirfsoc_gpio_probe()
868 	gpiochip_remove(&sgpio->chip.gc);  in sirfsoc_gpio_probe()