39 	struct sh_pfc *pfc;  member
49 	return pmx->pfc->info->nr_groups;  in sh_pfc_get_groups_count()
57 	return pmx->pfc->info->groups[selector].name;  in sh_pfc_get_group_name()
65 	*pins = pmx->pfc->info->groups[selector].pins;  in sh_pfc_get_group_pins()
66 	*num_pins = pmx->pfc->info->groups[selector].nr_pins;  in sh_pfc_get_group_pins()
239 	struct device *dev = pmx->pfc->dev;  in sh_pfc_dt_node_to_map()
291 	return pmx->pfc->info->nr_functions;  in sh_pfc_get_functions_count()
299 	return pmx->pfc->info->functions[selector].name;  in sh_pfc_get_function_name()
309 	*groups = pmx->pfc->info->functions[selector].groups;  in sh_pfc_get_function_groups()
310 	*num_groups = pmx->pfc->info->functions[selector].nr_groups;  in sh_pfc_get_function_groups()
319 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_func_set_mux()  local
320 	const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];  in sh_pfc_func_set_mux()
325 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_func_set_mux()
328 		int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);  in sh_pfc_func_set_mux()
338 		ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);  in sh_pfc_func_set_mux()
344 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_func_set_mux()
353 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_request_enable()  local
354 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_request_enable()
359 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_request_enable()
362 		dev_err(pfc->dev,  in sh_pfc_gpio_request_enable()
369 	if (!pfc->gpio) {  in sh_pfc_gpio_request_enable()
373 		const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_gpio_request_enable()
375 		ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);  in sh_pfc_gpio_request_enable()
385 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_request_enable()
395 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_disable_free()  local
396 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_disable_free()
400 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_disable_free()
402 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_disable_free()
410 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_set_direction()  local
412 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_set_direction()
413 	const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_gpio_set_direction()
428 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_set_direction()
430 	ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);  in sh_pfc_gpio_set_direction()
437 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_set_direction()
452 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,  in sh_pfc_pinconf_validate()  argument
455 	int idx = sh_pfc_get_pin_index(pfc, _pin);  in sh_pfc_pinconf_validate()
456 	const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_pinconf_validate()
477 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_pinconf_get()  local
482 	if (!sh_pfc_pinconf_validate(pfc, _pin, param))  in sh_pfc_pinconf_get()
489 		if (!pfc->info->ops || !pfc->info->ops->get_bias)  in sh_pfc_pinconf_get()
492 		spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_get()
493 		bias = pfc->info->ops->get_bias(pfc, _pin);  in sh_pfc_pinconf_get()
494 		spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_get()
513 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_pinconf_set()  local
521 		if (!sh_pfc_pinconf_validate(pfc, _pin, param))  in sh_pfc_pinconf_set()
528 			if (!pfc->info->ops || !pfc->info->ops->set_bias)  in sh_pfc_pinconf_set()
531 			spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_set()
532 			pfc->info->ops->set_bias(pfc, _pin, param);  in sh_pfc_pinconf_set()
533 			spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_set()
554 	pins = pmx->pfc->info->groups[group].pins;  in sh_pfc_pinconf_group_set()
555 	num_pins = pmx->pfc->info->groups[group].nr_pins;  in sh_pfc_pinconf_group_set()
572 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)  in sh_pfc_map_pins()  argument
577 	pmx->pins = devm_kzalloc(pfc->dev,  in sh_pfc_map_pins()
578 				 sizeof(*pmx->pins) * pfc->info->nr_pins,  in sh_pfc_map_pins()
583 	pmx->configs = devm_kzalloc(pfc->dev,  in sh_pfc_map_pins()
584 				    sizeof(*pmx->configs) * pfc->info->nr_pins,  in sh_pfc_map_pins()
589 	for (i = 0; i < pfc->info->nr_pins; ++i) {  in sh_pfc_map_pins()
590 		const struct sh_pfc_pin *info = &pfc->info->pins[i];  in sh_pfc_map_pins()
603 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)  in sh_pfc_register_pinctrl()  argument
608 	pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);  in sh_pfc_register_pinctrl()
612 	pmx->pfc = pfc;  in sh_pfc_register_pinctrl()
613 	pfc->pinctrl = pmx;  in sh_pfc_register_pinctrl()
615 	ret = sh_pfc_map_pins(pfc, pmx);  in sh_pfc_register_pinctrl()
625 	pmx->pctl_desc.npins = pfc->info->nr_pins;  in sh_pfc_register_pinctrl()
627 	pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);  in sh_pfc_register_pinctrl()
634 int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)  in sh_pfc_unregister_pinctrl()  argument
636 	struct sh_pfc_pinctrl *pmx = pfc->pinctrl;  in sh_pfc_unregister_pinctrl()
640 	pfc->pinctrl = NULL;  in sh_pfc_unregister_pinctrl()