Lines Matching refs:opCapFlags
54 .opCapFlags = {
632 .opCapFlags = {
1211 .opCapFlags = {
1790 .opCapFlags = {
2368 .opCapFlags = {
2992 return pBase->opCapFlags.opFlags; in ath9k_hw_ar9300_get_eeprom()
3458 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3460 PR_EEP("Allow 2GHz", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3462 PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3464 PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3466 PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3468 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3470 PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & 0x01)); in ath9k_hw_ar9003_dump_eeprom()