Lines Matching refs:sh_eth_write
439 sh_eth_write(ndev, value, RMII_MII); in sh_eth_select_mii()
447 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR); in sh_eth_set_duplex()
449 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR); in sh_eth_set_duplex()
459 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_ELB, ECMR); in sh_eth_set_rate_r8a777x()
462 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_ELB, ECMR); in sh_eth_set_rate_r8a777x()
524 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_RTM, ECMR); in sh_eth_set_rate_sh7724()
527 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_RTM, ECMR); in sh_eth_set_rate_sh7724()
564 sh_eth_write(ndev, 0, RTRATE); in sh_eth_set_rate_sh7757()
567 sh_eth_write(ndev, 1, RTRATE); in sh_eth_set_rate_sh7757()
630 sh_eth_write(ndev, 0x00000000, GECMR); in sh_eth_set_rate_giga()
633 sh_eth_write(ndev, 0x00000010, GECMR); in sh_eth_set_rate_giga()
636 sh_eth_write(ndev, 0x00000020, GECMR); in sh_eth_set_rate_giga()
689 sh_eth_write(ndev, GECMR_10, GECMR); in sh_eth_set_rate_gether()
692 sh_eth_write(ndev, GECMR_100, GECMR); in sh_eth_set_rate_gether()
695 sh_eth_write(ndev, GECMR_1000, GECMR); in sh_eth_set_rate_gether()
900 sh_eth_write(ndev, EDSR_ENALL, EDSR); in sh_eth_reset()
901 sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, in sh_eth_reset()
909 sh_eth_write(ndev, 0x0, TDLAR); in sh_eth_reset()
910 sh_eth_write(ndev, 0x0, TDFAR); in sh_eth_reset()
911 sh_eth_write(ndev, 0x0, TDFXR); in sh_eth_reset()
912 sh_eth_write(ndev, 0x0, TDFFR); in sh_eth_reset()
913 sh_eth_write(ndev, 0x0, RDLAR); in sh_eth_reset()
914 sh_eth_write(ndev, 0x0, RDFAR); in sh_eth_reset()
915 sh_eth_write(ndev, 0x0, RDFXR); in sh_eth_reset()
916 sh_eth_write(ndev, 0x0, RDFFR); in sh_eth_reset()
920 sh_eth_write(ndev, 0x0, CSMR); in sh_eth_reset()
926 sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_ETHER, in sh_eth_reset()
929 sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER, in sh_eth_reset()
971 sh_eth_write(ndev, in update_mac_address()
974 sh_eth_write(ndev, in update_mac_address()
1166 sh_eth_write(ndev, mdp->rx_desc_dma, RDLAR); in sh_eth_ring_format()
1169 sh_eth_write(ndev, mdp->rx_desc_dma, RDFAR); in sh_eth_ring_format()
1188 sh_eth_write(ndev, mdp->tx_desc_dma, TDLAR); in sh_eth_ring_format()
1191 sh_eth_write(ndev, mdp->tx_desc_dma, TDFAR); in sh_eth_ring_format()
1294 sh_eth_write(ndev, 0x1, RMIIMODE); in sh_eth_dev_init()
1299 sh_eth_write(ndev, mdp->cd->rpadir_value, RPADIR); in sh_eth_dev_init()
1302 sh_eth_write(ndev, 0, EESIPR); in sh_eth_dev_init()
1306 sh_eth_write(ndev, EDMR_EL, EDMR); in sh_eth_dev_init()
1309 sh_eth_write(ndev, 0, EDMR); in sh_eth_dev_init()
1312 sh_eth_write(ndev, mdp->cd->fdr_value, FDR); in sh_eth_dev_init()
1313 sh_eth_write(ndev, 0, TFTR); in sh_eth_dev_init()
1316 sh_eth_write(ndev, RMCR_RNC, RMCR); in sh_eth_dev_init()
1318 sh_eth_write(ndev, mdp->cd->trscer_err_mask, TRSCER); in sh_eth_dev_init()
1321 sh_eth_write(ndev, 0x800, BCULR); /* Burst sycle set */ in sh_eth_dev_init()
1323 sh_eth_write(ndev, mdp->cd->fcftr_value, FCFTR); in sh_eth_dev_init()
1326 sh_eth_write(ndev, 0, TRIMD); in sh_eth_dev_init()
1329 sh_eth_write(ndev, ndev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN, in sh_eth_dev_init()
1332 sh_eth_write(ndev, sh_eth_read(ndev, EESR), EESR); in sh_eth_dev_init()
1335 sh_eth_write(ndev, mdp->cd->eesipr_value, EESIPR); in sh_eth_dev_init()
1342 sh_eth_write(ndev, val, ECMR); in sh_eth_dev_init()
1348 sh_eth_write(ndev, mdp->cd->ecsr_value, ECSR); in sh_eth_dev_init()
1352 sh_eth_write(ndev, mdp->cd->ecsipr_value, ECSIPR); in sh_eth_dev_init()
1359 sh_eth_write(ndev, APR_AP, APR); in sh_eth_dev_init()
1361 sh_eth_write(ndev, MPR_MP, MPR); in sh_eth_dev_init()
1363 sh_eth_write(ndev, TPAUSER_UNLIMITED, TPAUSER); in sh_eth_dev_init()
1367 sh_eth_write(ndev, EDRRR_R, EDRRR); in sh_eth_dev_init()
1390 sh_eth_write(ndev, 0, EDRRR); in sh_eth_dev_exit()
1568 sh_eth_write(ndev, EDRRR_R, EDRRR); in sh_eth_rx()
1579 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & in sh_eth_rcv_snd_disable()
1586 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | in sh_eth_rcv_snd_enable()
1600 sh_eth_write(ndev, felic_stat, ECSR); /* clear int */ in sh_eth_error()
1616 sh_eth_write(ndev, sh_eth_read(ndev, EESIPR) & in sh_eth_error()
1619 sh_eth_write(ndev, sh_eth_read(ndev, ECSR), in sh_eth_error()
1621 sh_eth_write(ndev, sh_eth_read(ndev, EESIPR) | in sh_eth_error()
1691 sh_eth_write(ndev, sh_eth_get_edtrr_trns(mdp), EDTRR); in sh_eth_error()
1723 sh_eth_write(ndev, 0, EESIPR); in sh_eth_interrupt()
1730 sh_eth_write(ndev, intr_enable & ~EESR_RX_CHECK, in sh_eth_interrupt()
1743 sh_eth_write(ndev, intr_status & cd->tx_check, EESR); in sh_eth_interrupt()
1751 sh_eth_write(ndev, intr_status & cd->eesr_err_check, EESR); in sh_eth_interrupt()
1775 sh_eth_write(ndev, intr_status & EESR_RX_CHECK, EESR); in sh_eth_poll()
1785 sh_eth_write(ndev, mdp->cd->eesipr_value, EESIPR); in sh_eth_poll()
1812 sh_eth_write(ndev, in sh_eth_adjust_link()
2238 sh_eth_write(ndev, 0x0000, EESIPR); in sh_eth_set_ringparam()
2267 sh_eth_write(ndev, mdp->cd->eesipr_value, EESIPR); in sh_eth_set_ringparam()
2269 sh_eth_write(ndev, EDRRR_R, EDRRR); in sh_eth_set_ringparam()
2415 sh_eth_write(ndev, sh_eth_get_edtrr_trns(mdp), EDTRR); in sh_eth_start_xmit()
2432 sh_eth_write(ndev, 0, reg); in sh_eth_update_stat()
2477 sh_eth_write(ndev, 0x0000, EESIPR); in sh_eth_close()
2796 sh_eth_write(ndev, ecmr_bits, ECMR); in sh_eth_set_rx_mode()
3193 sh_eth_write(ndev, 0x1, RMIIMODE); in sh_eth_drv_probe()