Lines Matching refs:hw
36 static void ixgbe_i2c_start(struct ixgbe_hw *hw);
37 static void ixgbe_i2c_stop(struct ixgbe_hw *hw);
38 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
39 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
40 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
41 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
42 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
43 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
44 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
45 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
46 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
47 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);
49 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
50 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw);
59 static s32 ixgbe_out_i2c_byte_ack(struct ixgbe_hw *hw, u8 byte) in ixgbe_out_i2c_byte_ack() argument
63 status = ixgbe_clock_out_i2c_byte(hw, byte); in ixgbe_out_i2c_byte_ack()
66 return ixgbe_get_i2c_ack(hw); in ixgbe_out_i2c_byte_ack()
76 static s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte) in ixgbe_in_i2c_byte_ack() argument
80 status = ixgbe_clock_in_i2c_byte(hw, byte); in ixgbe_in_i2c_byte_ack()
84 return ixgbe_clock_out_i2c_bit(hw, false); in ixgbe_in_i2c_byte_ack()
111 s32 ixgbe_read_i2c_combined_generic(struct ixgbe_hw *hw, u8 addr, in ixgbe_read_i2c_combined_generic() argument
114 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic()
127 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_combined_generic()
129 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic()
131 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_read_i2c_combined_generic()
134 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_read_i2c_combined_generic()
137 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_read_i2c_combined_generic()
140 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_read_i2c_combined_generic()
143 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic()
145 if (ixgbe_out_i2c_byte_ack(hw, addr | 1)) in ixgbe_read_i2c_combined_generic()
148 if (ixgbe_in_i2c_byte_ack(hw, &high_bits)) in ixgbe_read_i2c_combined_generic()
151 if (ixgbe_in_i2c_byte_ack(hw, &low_bits)) in ixgbe_read_i2c_combined_generic()
154 if (ixgbe_clock_in_i2c_byte(hw, &csum_byte)) in ixgbe_read_i2c_combined_generic()
157 if (ixgbe_clock_out_i2c_bit(hw, false)) in ixgbe_read_i2c_combined_generic()
159 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_combined_generic()
160 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic()
165 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_combined_generic()
166 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic()
169 hw_dbg(hw, "I2C byte read combined error - Retry.\n"); in ixgbe_read_i2c_combined_generic()
171 hw_dbg(hw, "I2C byte read combined error.\n"); in ixgbe_read_i2c_combined_generic()
186 s32 ixgbe_write_i2c_combined_generic(struct ixgbe_hw *hw, in ixgbe_write_i2c_combined_generic() argument
200 ixgbe_i2c_start(hw); in ixgbe_write_i2c_combined_generic()
202 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_write_i2c_combined_generic()
205 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_write_i2c_combined_generic()
208 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_write_i2c_combined_generic()
211 if (ixgbe_out_i2c_byte_ack(hw, val >> 8)) in ixgbe_write_i2c_combined_generic()
214 if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF)) in ixgbe_write_i2c_combined_generic()
217 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_write_i2c_combined_generic()
219 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_combined_generic()
223 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_combined_generic()
226 hw_dbg(hw, "I2C byte write combined error - Retry.\n"); in ixgbe_write_i2c_combined_generic()
228 hw_dbg(hw, "I2C byte write combined error.\n"); in ixgbe_write_i2c_combined_generic()
240 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw) in ixgbe_identify_phy_generic() argument
245 if (!hw->phy.phy_semaphore_mask) { in ixgbe_identify_phy_generic()
246 hw->phy.lan_id = IXGBE_READ_REG(hw, IXGBE_STATUS) & in ixgbe_identify_phy_generic()
248 if (hw->phy.lan_id) in ixgbe_identify_phy_generic()
249 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; in ixgbe_identify_phy_generic()
251 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; in ixgbe_identify_phy_generic()
254 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_identify_phy_generic()
256 hw->phy.mdio.prtad = phy_addr; in ixgbe_identify_phy_generic()
257 if (mdio45_probe(&hw->phy.mdio, phy_addr) == 0) { in ixgbe_identify_phy_generic()
258 ixgbe_get_phy_id(hw); in ixgbe_identify_phy_generic()
259 hw->phy.type = in ixgbe_identify_phy_generic()
260 ixgbe_get_phy_type_from_id(hw->phy.id); in ixgbe_identify_phy_generic()
262 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_identify_phy_generic()
263 hw->phy.ops.read_reg(hw, in ixgbe_identify_phy_generic()
270 hw->phy.type = in ixgbe_identify_phy_generic()
273 hw->phy.type = in ixgbe_identify_phy_generic()
281 hw->phy.mdio.prtad = 0; in ixgbe_identify_phy_generic()
296 bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw) in ixgbe_check_reset_blocked() argument
301 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_check_reset_blocked()
304 mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); in ixgbe_check_reset_blocked()
306 hw_dbg(hw, "MNG_VETO bit detected.\n"); in ixgbe_check_reset_blocked()
318 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw) in ixgbe_get_phy_id() argument
324 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
328 hw->phy.id = (u32)(phy_id_high << 16); in ixgbe_get_phy_id()
329 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
331 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
332 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
371 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw) in ixgbe_reset_phy_generic() argument
377 if (hw->phy.type == ixgbe_phy_unknown) in ixgbe_reset_phy_generic()
378 status = ixgbe_identify_phy_generic(hw); in ixgbe_reset_phy_generic()
380 if (status != 0 || hw->phy.type == ixgbe_phy_none) in ixgbe_reset_phy_generic()
384 if (!hw->phy.reset_if_overtemp && in ixgbe_reset_phy_generic()
385 (IXGBE_ERR_OVERTEMP == hw->phy.ops.check_overtemp(hw))) in ixgbe_reset_phy_generic()
389 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_generic()
396 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
407 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
416 hw_dbg(hw, "PHY reset polling failed to complete.\n"); in ixgbe_reset_phy_generic()
430 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument
438 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
441 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
450 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
457 hw_dbg(hw, "PHY address command did not complete.\n"); in ixgbe_read_phy_reg_mdi()
466 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
469 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
478 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
484 hw_dbg(hw, "PHY read command didn't complete\n"); in ixgbe_read_phy_reg_mdi()
491 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_read_phy_reg_mdi()
505 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument
509 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_read_phy_reg_generic()
511 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_read_phy_reg_generic()
512 status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_read_phy_reg_generic()
514 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_read_phy_reg_generic()
530 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument
536 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
541 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
544 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
554 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
560 hw_dbg(hw, "PHY address cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
570 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
573 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
582 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
588 hw_dbg(hw, "PHY write cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
603 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument
609 if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1) in ixgbe_write_phy_reg_generic()
614 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_write_phy_reg_generic()
615 status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
617 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_write_phy_reg_generic()
631 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_generic() argument
638 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_generic()
642 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_generic()
647 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_generic()
650 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_generic()
657 hw->phy.ops.read_reg(hw, in ixgbe_setup_phy_link_generic()
663 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_generic()
666 hw->phy.ops.write_reg(hw, in ixgbe_setup_phy_link_generic()
674 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_generic()
680 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_generic()
683 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_generic()
689 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_generic()
693 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
698 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
709 s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, in ixgbe_setup_phy_link_speed_generic() argument
718 hw->phy.autoneg_advertised = 0; in ixgbe_setup_phy_link_speed_generic()
721 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_phy_link_speed_generic()
724 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_phy_link_speed_generic()
727 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_phy_link_speed_generic()
730 hw->phy.ops.setup_link(hw); in ixgbe_setup_phy_link_speed_generic()
743 s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, in ixgbe_get_copper_link_capabilities_generic() argument
753 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, in ixgbe_get_copper_link_capabilities_generic()
766 if (hw->mac.type == ixgbe_mac_X550EM_x) in ixgbe_get_copper_link_capabilities_generic()
779 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed, in ixgbe_check_phy_link_tnx() argument
800 status = hw->phy.ops.read_reg(hw, in ixgbe_check_phy_link_tnx()
829 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_tnx() argument
835 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_tnx()
839 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
844 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_tnx()
847 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
854 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
859 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_tnx()
862 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
869 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
875 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_tnx()
878 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
884 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_tnx()
888 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
893 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
903 s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, in ixgbe_get_phy_firmware_version_tnx() argument
908 status = hw->phy.ops.read_reg(hw, TNX_FW_REV, in ixgbe_get_phy_firmware_version_tnx()
920 s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, in ixgbe_get_phy_firmware_version_generic() argument
925 status = hw->phy.ops.read_reg(hw, AQ_FW_REV, in ixgbe_get_phy_firmware_version_generic()
936 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw) in ixgbe_reset_phy_nl() argument
946 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_nl()
949 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, &phy_data); in ixgbe_reset_phy_nl()
952 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
956 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
964 hw_dbg(hw, "PHY reset did not complete.\n"); in ixgbe_reset_phy_nl()
969 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, in ixgbe_reset_phy_nl()
974 ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc); in ixgbe_reset_phy_nl()
980 ret_val = hw->eeprom.ops.read(hw, data_offset, &eword); in ixgbe_reset_phy_nl()
989 hw_dbg(hw, "DELAY: %d MS\n", edata); in ixgbe_reset_phy_nl()
993 hw_dbg(hw, "DATA:\n"); in ixgbe_reset_phy_nl()
995 ret_val = hw->eeprom.ops.read(hw, data_offset++, in ixgbe_reset_phy_nl()
1000 ret_val = hw->eeprom.ops.read(hw, data_offset, in ixgbe_reset_phy_nl()
1004 hw->phy.ops.write_reg(hw, phy_offset, in ixgbe_reset_phy_nl()
1006 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword, in ixgbe_reset_phy_nl()
1014 hw_dbg(hw, "CONTROL:\n"); in ixgbe_reset_phy_nl()
1016 hw_dbg(hw, "EOL\n"); in ixgbe_reset_phy_nl()
1019 hw_dbg(hw, "SOL\n"); in ixgbe_reset_phy_nl()
1021 hw_dbg(hw, "Bad control value\n"); in ixgbe_reset_phy_nl()
1026 hw_dbg(hw, "Bad control type\n"); in ixgbe_reset_phy_nl()
1034 hw_err(hw, "eeprom read at offset %d failed\n", data_offset); in ixgbe_reset_phy_nl()
1044 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_module_generic() argument
1046 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_identify_module_generic()
1048 return ixgbe_identify_sfp_module_generic(hw); in ixgbe_identify_module_generic()
1050 return ixgbe_identify_qsfp_module_generic(hw); in ixgbe_identify_module_generic()
1052 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_module_generic()
1065 s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_sfp_module_generic() argument
1067 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_sfp_module_generic()
1070 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_sfp_module_generic()
1079 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) { in ixgbe_identify_sfp_module_generic()
1080 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1084 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1092 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_sfp_module_generic()
1095 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1098 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1105 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1111 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1134 if (hw->mac.type == ixgbe_mac_82598EB) { in ixgbe_identify_sfp_module_generic()
1136 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; in ixgbe_identify_sfp_module_generic()
1138 hw->phy.sfp_type = ixgbe_sfp_type_sr; in ixgbe_identify_sfp_module_generic()
1140 hw->phy.sfp_type = ixgbe_sfp_type_lr; in ixgbe_identify_sfp_module_generic()
1142 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1143 } else if (hw->mac.type == ixgbe_mac_82599EB) { in ixgbe_identify_sfp_module_generic()
1145 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1146 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1149 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1152 hw->phy.ops.read_i2c_eeprom( in ixgbe_identify_sfp_module_generic()
1153 hw, IXGBE_SFF_CABLE_SPEC_COMP, in ixgbe_identify_sfp_module_generic()
1157 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1158 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1161 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1164 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1170 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1171 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1174 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1177 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1178 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1181 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1184 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1185 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1188 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1191 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1192 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1195 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1198 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1202 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_sfp_module_generic()
1203 hw->phy.sfp_setup_needed = true; in ixgbe_identify_sfp_module_generic()
1206 hw->phy.multispeed_fiber = false; in ixgbe_identify_sfp_module_generic()
1211 hw->phy.multispeed_fiber = true; in ixgbe_identify_sfp_module_generic()
1214 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1215 hw->phy.id = identifier; in ixgbe_identify_sfp_module_generic()
1216 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1223 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1230 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1245 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1250 hw->phy.type = ixgbe_phy_sfp_ftl_active; in ixgbe_identify_sfp_module_generic()
1252 hw->phy.type = ixgbe_phy_sfp_ftl; in ixgbe_identify_sfp_module_generic()
1255 hw->phy.type = ixgbe_phy_sfp_avago; in ixgbe_identify_sfp_module_generic()
1258 hw->phy.type = ixgbe_phy_sfp_intel; in ixgbe_identify_sfp_module_generic()
1262 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1265 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1268 hw->phy.type = ixgbe_phy_sfp_unknown; in ixgbe_identify_sfp_module_generic()
1280 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1281 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1282 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1283 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1284 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1285 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1286 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1291 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_identify_sfp_module_generic()
1294 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_sfp_module_generic()
1296 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1297 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1298 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1299 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1300 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1301 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1303 if (hw->phy.type == ixgbe_phy_sfp_intel) in ixgbe_identify_sfp_module_generic()
1305 if (hw->allow_unsupported_sfp) { in ixgbe_identify_sfp_module_generic()
1309 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_identify_sfp_module_generic()
1310 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1316 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1317 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1318 hw->phy.id = 0; in ixgbe_identify_sfp_module_generic()
1319 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_sfp_module_generic()
1330 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_qsfp_module_generic() argument
1332 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_qsfp_module_generic()
1335 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_qsfp_module_generic()
1346 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) { in ixgbe_identify_qsfp_module_generic()
1347 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1351 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, in ixgbe_identify_qsfp_module_generic()
1358 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1362 hw->phy.id = identifier; in ixgbe_identify_qsfp_module_generic()
1365 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_qsfp_module_generic()
1367 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1373 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1380 hw->phy.type = ixgbe_phy_qsfp_passive_unknown; in ixgbe_identify_qsfp_module_generic()
1381 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1382 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0; in ixgbe_identify_qsfp_module_generic()
1384 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1; in ixgbe_identify_qsfp_module_generic()
1387 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1388 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0; in ixgbe_identify_qsfp_module_generic()
1390 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1; in ixgbe_identify_qsfp_module_generic()
1399 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1403 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1407 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1420 hw->phy.type = ixgbe_phy_qsfp_active_unknown; in ixgbe_identify_qsfp_module_generic()
1421 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1422 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1425 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1429 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1434 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_qsfp_module_generic()
1435 hw->phy.sfp_setup_needed = true; in ixgbe_identify_qsfp_module_generic()
1438 hw->phy.multispeed_fiber = false; in ixgbe_identify_qsfp_module_generic()
1443 hw->phy.multispeed_fiber = true; in ixgbe_identify_qsfp_module_generic()
1448 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1455 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1462 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1475 hw->phy.type = ixgbe_phy_qsfp_intel; in ixgbe_identify_qsfp_module_generic()
1477 hw->phy.type = ixgbe_phy_qsfp_unknown; in ixgbe_identify_qsfp_module_generic()
1479 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_qsfp_module_generic()
1482 if (hw->phy.type == ixgbe_phy_qsfp_intel) in ixgbe_identify_qsfp_module_generic()
1484 if (hw->allow_unsupported_sfp) { in ixgbe_identify_qsfp_module_generic()
1488 hw_dbg(hw, "QSFP module not supported\n"); in ixgbe_identify_qsfp_module_generic()
1489 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1497 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1498 hw->phy.id = 0; in ixgbe_identify_qsfp_module_generic()
1499 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_qsfp_module_generic()
1513 s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, in ixgbe_get_sfp_init_sequence_offsets() argument
1518 u16 sfp_type = hw->phy.sfp_type; in ixgbe_get_sfp_init_sequence_offsets()
1520 if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) in ixgbe_get_sfp_init_sequence_offsets()
1523 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_get_sfp_init_sequence_offsets()
1526 if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) && in ixgbe_get_sfp_init_sequence_offsets()
1527 (hw->phy.sfp_type == ixgbe_sfp_type_da_cu)) in ixgbe_get_sfp_init_sequence_offsets()
1546 if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) { in ixgbe_get_sfp_init_sequence_offsets()
1547 hw_err(hw, "eeprom read at %d failed\n", in ixgbe_get_sfp_init_sequence_offsets()
1562 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1568 if (hw->eeprom.ops.read(hw, *list_offset, data_offset)) in ixgbe_get_sfp_init_sequence_offsets()
1571 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_get_sfp_init_sequence_offsets()
1578 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1584 hw_dbg(hw, "No matching SFP+ module found\n"); in ixgbe_get_sfp_init_sequence_offsets()
1591 hw_err(hw, "eeprom read at offset %d failed\n", *list_offset); in ixgbe_get_sfp_init_sequence_offsets()
1603 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_generic() argument
1606 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_eeprom_generic()
1619 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_generic() argument
1622 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_sff8472_generic()
1635 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_eeprom_generic() argument
1638 return hw->phy.ops.write_i2c_byte(hw, byte_offset, in ixgbe_write_i2c_eeprom_generic()
1652 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic() argument
1658 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_byte_generic()
1663 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_byte_generic()
1666 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic()
1669 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_read_i2c_byte_generic()
1673 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic()
1677 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_read_i2c_byte_generic()
1681 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic()
1685 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic()
1688 status = ixgbe_clock_out_i2c_byte(hw, (dev_addr | 0x1)); in ixgbe_read_i2c_byte_generic()
1692 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic()
1696 status = ixgbe_clock_in_i2c_byte(hw, data); in ixgbe_read_i2c_byte_generic()
1700 status = ixgbe_clock_out_i2c_bit(hw, nack); in ixgbe_read_i2c_byte_generic()
1704 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_byte_generic()
1708 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_byte_generic()
1709 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic()
1713 hw_dbg(hw, "I2C byte read error - Retrying.\n"); in ixgbe_read_i2c_byte_generic()
1715 hw_dbg(hw, "I2C byte read error.\n"); in ixgbe_read_i2c_byte_generic()
1719 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic()
1733 s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic() argument
1739 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_byte_generic()
1741 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_byte_generic()
1745 ixgbe_i2c_start(hw); in ixgbe_write_i2c_byte_generic()
1747 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_write_i2c_byte_generic()
1751 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic()
1755 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_write_i2c_byte_generic()
1759 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic()
1763 status = ixgbe_clock_out_i2c_byte(hw, data); in ixgbe_write_i2c_byte_generic()
1767 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic()
1771 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_byte_generic()
1775 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_byte_generic()
1778 hw_dbg(hw, "I2C byte write error - Retrying.\n"); in ixgbe_write_i2c_byte_generic()
1780 hw_dbg(hw, "I2C byte write error.\n"); in ixgbe_write_i2c_byte_generic()
1783 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic()
1794 static void ixgbe_i2c_start(struct ixgbe_hw *hw) in ixgbe_i2c_start() argument
1796 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_start()
1799 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_start()
1800 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
1805 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_start()
1810 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
1823 static void ixgbe_i2c_stop(struct ixgbe_hw *hw) in ixgbe_i2c_stop() argument
1825 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_stop()
1828 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_stop()
1829 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_stop()
1834 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_stop()
1847 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) in ixgbe_clock_in_i2c_byte() argument
1853 ixgbe_clock_in_i2c_bit(hw, &bit); in ixgbe_clock_in_i2c_byte()
1867 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data) in ixgbe_clock_out_i2c_byte() argument
1876 status = ixgbe_clock_out_i2c_bit(hw, bit); in ixgbe_clock_out_i2c_byte()
1883 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_out_i2c_byte()
1884 i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); in ixgbe_clock_out_i2c_byte()
1885 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
1886 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_out_i2c_byte()
1897 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) in ixgbe_get_i2c_ack() argument
1901 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_get_i2c_ack()
1905 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
1914 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_get_i2c_ack()
1915 ack = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_get_i2c_ack()
1923 hw_dbg(hw, "I2C ack was not received.\n"); in ixgbe_get_i2c_ack()
1927 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
1942 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) in ixgbe_clock_in_i2c_bit() argument
1944 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_in_i2c_bit()
1946 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
1951 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_in_i2c_bit()
1952 *data = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
1954 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
1969 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data) in ixgbe_clock_out_i2c_bit() argument
1972 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_out_i2c_bit()
1974 status = ixgbe_set_i2c_data(hw, &i2cctl, data); in ixgbe_clock_out_i2c_bit()
1976 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
1981 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
1988 hw_dbg(hw, "I2C data was not set to %X\n", data); in ixgbe_clock_out_i2c_bit()
2001 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_raise_i2c_clk() argument
2008 *i2cctl |= IXGBE_I2C_CLK_OUT_BY_MAC(hw); in ixgbe_raise_i2c_clk()
2009 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2010 IXGBE_WRITE_FLUSH(hw); in ixgbe_raise_i2c_clk()
2014 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_raise_i2c_clk()
2015 if (i2cctl_r & IXGBE_I2C_CLK_IN_BY_MAC(hw)) in ixgbe_raise_i2c_clk()
2027 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_lower_i2c_clk() argument
2030 *i2cctl &= ~IXGBE_I2C_CLK_OUT_BY_MAC(hw); in ixgbe_lower_i2c_clk()
2032 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_lower_i2c_clk()
2033 IXGBE_WRITE_FLUSH(hw); in ixgbe_lower_i2c_clk()
2047 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) in ixgbe_set_i2c_data() argument
2050 *i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); in ixgbe_set_i2c_data()
2052 *i2cctl &= ~IXGBE_I2C_DATA_OUT_BY_MAC(hw); in ixgbe_set_i2c_data()
2054 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_set_i2c_data()
2055 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2061 *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_set_i2c_data()
2062 if (data != ixgbe_get_i2c_data(hw, i2cctl)) { in ixgbe_set_i2c_data()
2063 hw_dbg(hw, "Error - I2C data was not set to %X.\n", data); in ixgbe_set_i2c_data()
2077 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_get_i2c_data() argument
2079 if (*i2cctl & IXGBE_I2C_DATA_IN_BY_MAC(hw)) in ixgbe_get_i2c_data()
2091 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw) in ixgbe_i2c_bus_clear() argument
2093 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_bus_clear()
2096 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2098 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_bus_clear()
2101 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2106 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2112 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2115 ixgbe_i2c_stop(hw); in ixgbe_i2c_bus_clear()
2124 s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw) in ixgbe_tn_check_overtemp() argument
2128 if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM) in ixgbe_tn_check_overtemp()
2132 hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, in ixgbe_tn_check_overtemp()