Lines Matching refs:params
1062 j = s->ofldqsets / adap->params.nports; /* ofld queues per channel */ in setup_sge_queues()
1081 j = s->rdmaciqs / adap->params.nports; /* rdmaq queues per channel */ in setup_sge_queues()
1098 t4_write_reg(adap, is_t4(adap->params.chip) ? in setup_sge_queues()
1329 return adap->params.offload; in is_offload()
1697 (is_t4(adap->params.chip) || is_t5(adap->params.chip))) in tid_init()
1925 if (is_t4(adap->params.chip)) { in cxgb4_dbfifo_count()
2032 if (is_t4(adap->params.chip)) in cxgb4_sync_txq_pidx()
2103 } else if (is_t4(adap->params.chip)) { in cxgb4_read_tpte()
2201 if (is_t4(adap->params.chip)) { in drain_db_fifo()
2304 if (is_t4(adap->params.chip)) in sync_txq_pidx()
2337 if (is_t4(adap->params.chip)) { in process_db_drop()
2371 if (is_t4(adap->params.chip)) { in t4_db_full()
2382 if (is_t4(adap->params.chip)) { in t4_db_dropped()
2401 lli.mtus = adap->params.mtus; in uld_attach()
2412 lli.nchan = adap->params.nports; in uld_attach()
2413 lli.nports = adap->params.nports; in uld_attach()
2414 lli.wr_cred = adap->params.ofldq_wr_cred; in uld_attach()
2415 lli.adapter_type = adap->params.chip; in uld_attach()
2417 lli.cclk_ps = 1000000000 / adap->params.vpd.cclk; in uld_attach()
2418 lli.udb_density = 1 << adap->params.sge.eq_qpp; in uld_attach()
2419 lli.ucq_density = 1 << adap->params.sge.iq_qpp; in uld_attach()
2420 lli.filt_mode = adap->params.tp.vlan_pri_map; in uld_attach()
2426 lli.fw_vers = adap->params.fw_vers; in uld_attach()
2432 lli.max_ordird_qp = adap->params.max_ordird_qp; in uld_attach()
2433 lli.max_ird_adapter = adap->params.max_ird_adapter; in uld_attach()
2434 lli.ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl; in uld_attach()
2808 if (adap->params.tp.vlan_pri_map & PORT_F) { in cxgb4_create_server_filter()
2814 if (adap->params.tp.vlan_pri_map & PROTOCOL_F) { in cxgb4_create_server_filter()
3080 if (is_t4(adap->params.chip)) { in setup_memwin()
3193 adap->params.tp.tx_modq_map = 0xE4; in adap_init1()
3195 TX_MOD_QUEUE_REQ_MAP_V(adap->params.tp.tx_modq_map)); in adap_init1()
3306 switch (CHELSIO_CHIP_VERSION(adapter->params.chip)) { in adap_init0_config()
3326 u32 params[7], val[7]; in adap_init0_config() local
3335 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | in adap_init0_config()
3338 adapter->fn, 0, 1, params, val); in adap_init0_config()
3531 u32 params[7], val[7]; in adap_init0() local
3559 t4_get_fw_version(adap, &adap->params.fw_vers); in adap_init0()
3560 t4_get_tp_version(adap, &adap->params.tp_vers); in adap_init0()
3571 fw_info = find_fw_info(CHELSIO_CHIP_VERSION(adap->params.chip)); in adap_init0()
3575 CHELSIO_CHIP_VERSION(adap->params.chip)); in adap_init0()
3615 ret = get_vpd_params(adap, &adap->params.vpd); in adap_init0()
3631 adap->params.nports = hweight32(port_vec); in adap_init0()
3632 adap->params.portvec = port_vec; in adap_init0()
3648 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | in adap_init0()
3651 params, val); in adap_init0()
3688 adap->params.bypass = 1; in adap_init0()
3703 params[0] = FW_PARAM_PFVF(EQ_START); in adap_init0()
3704 params[1] = FW_PARAM_PFVF(L2T_START); in adap_init0()
3705 params[2] = FW_PARAM_PFVF(L2T_END); in adap_init0()
3706 params[3] = FW_PARAM_PFVF(FILTER_START); in adap_init0()
3707 params[4] = FW_PARAM_PFVF(FILTER_END); in adap_init0()
3708 params[5] = FW_PARAM_PFVF(IQFLINT_START); in adap_init0()
3709 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 6, params, val); in adap_init0()
3725 params[0] = FW_PARAM_PFVF(EQ_END); in adap_init0()
3726 params[1] = FW_PARAM_PFVF(IQFLINT_END); in adap_init0()
3727 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2, params, val); in adap_init0()
3764 params[0] = FW_PARAM_PFVF(CLIP_START); in adap_init0()
3765 params[1] = FW_PARAM_PFVF(CLIP_END); in adap_init0()
3766 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2, params, val); in adap_init0()
3773 params[0] = FW_PARAM_PFVF(ACTIVE_FILTER_START); in adap_init0()
3774 params[1] = FW_PARAM_PFVF(ACTIVE_FILTER_END); in adap_init0()
3775 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2, params, val); in adap_init0()
3790 params[0] = FW_PARAM_PFVF(CPLFW4MSG_ENCAP); in adap_init0()
3792 (void) t4_set_params(adap, adap->mbox, adap->fn, 0, 1, params, val); in adap_init0()
3800 if (is_t4(adap->params.chip)) { in adap_init0()
3801 adap->params.ulptx_memwrite_dsgl = false; in adap_init0()
3803 params[0] = FW_PARAM_DEV(ULPTX_MEMWRITE_DSGL); in adap_init0()
3805 1, params, val); in adap_init0()
3806 adap->params.ulptx_memwrite_dsgl = (ret == 0 && val[0] != 0); in adap_init0()
3824 params[0] = FW_PARAM_DEV(NTID); in adap_init0()
3825 params[1] = FW_PARAM_PFVF(SERVER_START); in adap_init0()
3826 params[2] = FW_PARAM_PFVF(SERVER_END); in adap_init0()
3827 params[3] = FW_PARAM_PFVF(TDDP_START); in adap_init0()
3828 params[4] = FW_PARAM_PFVF(TDDP_END); in adap_init0()
3829 params[5] = FW_PARAM_DEV(FLOWC_BUFFIFO_SZ); in adap_init0()
3831 params, val); in adap_init0()
3857 adap->params.ofldq_wr_cred = val[5]; in adap_init0()
3859 adap->params.offload = 1; in adap_init0()
3862 params[0] = FW_PARAM_PFVF(STAG_START); in adap_init0()
3863 params[1] = FW_PARAM_PFVF(STAG_END); in adap_init0()
3864 params[2] = FW_PARAM_PFVF(RQ_START); in adap_init0()
3865 params[3] = FW_PARAM_PFVF(RQ_END); in adap_init0()
3866 params[4] = FW_PARAM_PFVF(PBL_START); in adap_init0()
3867 params[5] = FW_PARAM_PFVF(PBL_END); in adap_init0()
3869 params, val); in adap_init0()
3879 params[0] = FW_PARAM_PFVF(SQRQ_START); in adap_init0()
3880 params[1] = FW_PARAM_PFVF(SQRQ_END); in adap_init0()
3881 params[2] = FW_PARAM_PFVF(CQ_START); in adap_init0()
3882 params[3] = FW_PARAM_PFVF(CQ_END); in adap_init0()
3883 params[4] = FW_PARAM_PFVF(OCQ_START); in adap_init0()
3884 params[5] = FW_PARAM_PFVF(OCQ_END); in adap_init0()
3885 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 6, params, in adap_init0()
3896 params[0] = FW_PARAM_DEV(MAXORDIRD_QP); in adap_init0()
3897 params[1] = FW_PARAM_DEV(MAXIRD_ADAPTER); in adap_init0()
3898 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2, params, in adap_init0()
3901 adap->params.max_ordird_qp = 8; in adap_init0()
3902 adap->params.max_ird_adapter = 32 * adap->tids.ntids; in adap_init0()
3905 adap->params.max_ordird_qp = val[0]; in adap_init0()
3906 adap->params.max_ird_adapter = val[1]; in adap_init0()
3910 adap->params.max_ordird_qp, in adap_init0()
3911 adap->params.max_ird_adapter); in adap_init0()
3914 params[0] = FW_PARAM_PFVF(ISCSI_START); in adap_init0()
3915 params[1] = FW_PARAM_PFVF(ISCSI_END); in adap_init0()
3917 params, val); in adap_init0()
3931 t4_read_mtu_tbl(adap, adap->params.mtus, NULL); in adap_init0()
3953 if (adap->params.mtus[i] == 1492) { in adap_init0()
3954 adap->params.mtus[i] = 1488; in adap_init0()
3958 t4_load_mtus(adap, adap->params.mtus, adap->params.a_wnd, in adap_init0()
3959 adap->params.b_wnd); in adap_init0()
4060 t4_load_mtus(adap, adap->params.mtus, adap->params.a_wnd, in eeh_slot_reset()
4061 adap->params.b_wnd); in eeh_slot_reset()
4132 if (adap->params.nports * 8 > MAX_ETH_QSETS) { in cfg_queues()
4134 MAX_ETH_QSETS, adap->params.nports * 8); in cfg_queues()
4151 q10g = (MAX_ETH_QSETS - (adap->params.nports - n10g)) / n10g; in cfg_queues()
4176 s->ofldqsets = roundup(i, adap->params.nports); in cfg_queues()
4178 s->ofldqsets = adap->params.nports; in cfg_queues()
4180 s->rdmaqs = adap->params.nports; in cfg_queues()
4188 s->rdmaciqs = (s->rdmaciqs / adap->params.nports) * in cfg_queues()
4189 adap->params.nports; in cfg_queues()
4190 s->rdmaciqs = max_t(int, s->rdmaciqs, adap->params.nports); in cfg_queues()
4278 unsigned int nchan = adap->params.nports; in enable_msix()
4299 need = 8 * adap->params.nports + EXTRA_VECS + ofld_need; in enable_msix()
4301 need = adap->params.nports + EXTRA_VECS + ofld_need; in enable_msix()
4365 if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_2_5GB) in print_port_info()
4367 else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_5_0GB) in print_port_info()
4369 else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_8_0GB) in print_port_info()
4385 adap->params.vpd.id, in print_port_info()
4386 CHELSIO_CHIP_RELEASE(adap->params.chip), buf, in print_port_info()
4387 is_offload(adap) ? "R" : "", adap->params.pci.width, spd, in print_port_info()
4391 adap->params.vpd.sn, adap->params.vpd.pn); in print_port_info()
4532 if (!is_t4(adapter->params.chip)) { in init_one()
4622 adapter->params.offload = 0; in init_one()
4634 adapter->params.offload = 0; in init_one()
4640 adapter->params.offload = 0; in init_one()
4704 if (!is_t4(adapter->params.chip)) in init_one()
4768 if (!is_t4(adapter->params.chip)) in remove_one()