3871 	u16 val16, i, lane;  in bnx2x_warpcore_set_10G_KR()  local
3895 			MDIO_WC_REG_XGXSBLK1_LANECTRL0, &val16);  in bnx2x_warpcore_set_10G_KR()
3896 	val16 &= ~(0x0011 << lane);  in bnx2x_warpcore_set_10G_KR()
3898 			 MDIO_WC_REG_XGXSBLK1_LANECTRL0, val16);  in bnx2x_warpcore_set_10G_KR()
3901 			MDIO_WC_REG_XGXSBLK1_LANECTRL1, &val16);  in bnx2x_warpcore_set_10G_KR()
3902 	val16 |= (0x0303 << (lane << 1));  in bnx2x_warpcore_set_10G_KR()
3904 			 MDIO_WC_REG_XGXSBLK1_LANECTRL1, val16);  in bnx2x_warpcore_set_10G_KR()
4183 	u16 val16, digctrl_kx1, digctrl_kx2;  in bnx2x_warpcore_set_sgmii_speed()  local
4199 				MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16);  in bnx2x_warpcore_set_sgmii_speed()
4200 		val16 &= 0xcebf;  in bnx2x_warpcore_set_sgmii_speed()
4205 			val16 |= 0x2000;  in bnx2x_warpcore_set_sgmii_speed()
4208 			val16 |= 0x0040;  in bnx2x_warpcore_set_sgmii_speed()
4217 			val16 |= 0x0100;  in bnx2x_warpcore_set_sgmii_speed()
4220 				MDIO_WC_REG_COMBO_IEEE0_MIICTRL, val16);  in bnx2x_warpcore_set_sgmii_speed()
4225 				MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16);  in bnx2x_warpcore_set_sgmii_speed()
4226 		DP(NETIF_MSG_LINK, "  (readback) %x\n", val16);  in bnx2x_warpcore_set_sgmii_speed()
4587 	u16 val16, lane;  in bnx2x_warpcore_link_reset()  local
4615 			MDIO_WC_REG_XGXSBLK1_LANECTRL0, &val16);  in bnx2x_warpcore_link_reset()
4616 	val16 |= (0x11 << lane);  in bnx2x_warpcore_link_reset()
4618 		val16 |= (0x22 << lane);  in bnx2x_warpcore_link_reset()
4620 			 MDIO_WC_REG_XGXSBLK1_LANECTRL0, val16);  in bnx2x_warpcore_link_reset()
4623 			MDIO_WC_REG_XGXSBLK1_LANECTRL1, &val16);  in bnx2x_warpcore_link_reset()
4624 	val16 &= ~(0x0303 << (lane << 1));  in bnx2x_warpcore_link_reset()
4625 	val16 |= (0x0101 << (lane << 1));  in bnx2x_warpcore_link_reset()
4627 		val16 &= ~(0x0c0c << (lane << 1));  in bnx2x_warpcore_link_reset()
4628 		val16 |= (0x0404 << (lane << 1));  in bnx2x_warpcore_link_reset()
4632 			 MDIO_WC_REG_XGXSBLK1_LANECTRL1, val16);  in bnx2x_warpcore_link_reset()
4642 	u16 val16;  in bnx2x_set_warpcore_loopback()  local
4661 				MDIO_WC_REG_XGXSBLK1_LANECTRL2, &val16);  in bnx2x_set_warpcore_loopback()
4662 		val16 |= (1<<lane);  in bnx2x_set_warpcore_loopback()
4664 			val16 |= (2<<lane);  in bnx2x_set_warpcore_loopback()
4667 				 val16);  in bnx2x_set_warpcore_loopback()
10459 	u16 val16;  in bnx2x_848x3_link_reset()  local
10473 				MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val16);  in bnx2x_848x3_link_reset()
10474 		val16 |= MDIO_84833_SUPER_ISOLATE;  in bnx2x_848x3_link_reset()
10477 				 MDIO_84833_TOP_CFG_XGPHY_STRAP1, val16);  in bnx2x_848x3_link_reset()