273 	link_status = REG_RD(bp, params->shmem_base +  in bnx2x_check_lfa()
2111 	REG_WR(bp, params->shmem_base +  in bnx2x_update_mng()
2893 		eee_mode = ((REG_RD(bp, params->shmem_base +  in bnx2x_eee_calc_timer()
3070 	board_cfg = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3078 	sfp_ctrl = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3797 	if (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
3837 		wc_lane_config = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
3989 		cfg_tap_val = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_set_10G_XFI()
4315 						u32 shmem_base, u8 port,  in bnx2x_get_mod_abs_int_cfg()  argument
4322 		cfg_pin = (REG_RD(bp, shmem_base +  in bnx2x_get_mod_abs_int_cfg()
4359 				      params->shmem_base, params->port,  in bnx2x_is_sfp_module_plugged()
4399 		serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_runtime()
4462 	cfg_pin = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e3_set_transmitter()
4483 	serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_init()
4798 	vars->link_status = REG_RD(bp, params->shmem_base +  in bnx2x_link_status_update()
4815 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
4832 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
7411 	if (REG_RD(bp, params->shmem_base +  in bnx2x_8073_config_init()
7699 	bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0);  in bnx2x_8705_config_init()
7786 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e1e2_set_transmitter()
7918 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_power_module()
8214 	sync_offset = params->shmem_base +  in bnx2x_get_edc_mode()
8262 	val = REG_RD(bp, params->shmem_base +  in bnx2x_verify_sfp_module()
8527 	u32 fault_led_gpio = REG_RD(bp, params->shmem_base +  in bnx2x_set_e1e2_module_fault_led()
8560 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_set_e3_module_fault_led()
8682 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_module_detection()
8743 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base,  in bnx2x_handle_module_detect_int()
8976 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8706_config_init()
9349 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8727_config_init()
9379 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_8727_handle_mod_abs()
10001 	pair_swap = REG_RD(bp, params->shmem_base +  in bnx2x_84833_pair_swap_cfg()
10077 	shmem_base_path[0] = params->shmem_base;  in bnx2x_84833_hw_reset_phy()
10242 		u32 cms_enable = REG_RD(bp, params->shmem_base +  in bnx2x_848x3_config_init()
10803 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_config_init()
11044 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_link_reset()
11863 static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,  in bnx2x_populate_preemphasis()  argument
11875 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
11879 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
11883 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
11887 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
11900 static u32 bnx2x_get_ext_phy_config(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_config()  argument
11906 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
11911 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
11922 static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,  in bnx2x_populate_int_phy()  argument
11927 	u32 switch_cfg = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
11945 		serdes_net_if = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
12055 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, INT_PHY);  in bnx2x_populate_int_phy()
12061 				  u32 shmem_base,  in bnx2x_populate_ext_phy()  argument
12068 	ext_phy_config = bnx2x_get_ext_phy_config(bp, shmem_base,  in bnx2x_populate_ext_phy()
12132 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);  in bnx2x_populate_ext_phy()
12138 	config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12141 		phy->ver_addr = shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12186 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,  in bnx2x_populate_phy()  argument
12192 		return bnx2x_populate_int_phy(bp, shmem_base, port, phy);  in bnx2x_populate_phy()
12193 	status = bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_populate_phy()
12206 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12209 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12214 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12217 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12327 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12350 		sync_offset = params->shmem_base +  in bnx2x_phy_probe()
12914 		u32 shmem_base, shmem2_base;  in bnx2x_8073_common_init_phy()  local
12917 			shmem_base = shmem_base_path[0];  in bnx2x_8073_common_init_phy()
12921 			shmem_base = shmem_base_path[port];  in bnx2x_8073_common_init_phy()
12927 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8073_common_init_phy()
13041 		u32 shmem_base, shmem2_base;  in bnx2x_8726_common_init_phy()  local
13045 			shmem_base = shmem_base_path[0];  in bnx2x_8726_common_init_phy()
13048 			shmem_base = shmem_base_path[port];  in bnx2x_8726_common_init_phy()
13052 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8726_common_init_phy()
13072 static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_reset_gpio()  argument
13076 	u32 phy_gpio_reset = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_reset_gpio()
13154 		u32 shmem_base, shmem2_base;  in bnx2x_8727_common_init_phy()  local
13158 			shmem_base = shmem_base_path[0];  in bnx2x_8727_common_init_phy()
13162 			shmem_base = shmem_base_path[port];  in bnx2x_8727_common_init_phy()
13168 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8727_common_init_phy()
13336 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_check_over_curr()
13507 	cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region,  in bnx2x_sfp_tx_fault_detection()
13648 		if ((REG_RD(bp, params->shmem_base +  in bnx2x_period_func()
13668 			     u32 shmem_base,  in bnx2x_fan_failure_det_req()  argument
13676 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_fan_failure_det_req()
13711 			    u32 chip_id, u32 shmem_base, u32 shmem2_base,  in bnx2x_init_mod_abs_int()  argument
13719 					      shmem_base,  in bnx2x_init_mod_abs_int()
13728 			if (bnx2x_populate_phy(bp, phy_index, shmem_base,  in bnx2x_init_mod_abs_int()
13755 	sync_offset = shmem_base +  in bnx2x_init_mod_abs_int()