1454 	u8 phy_index;  in bnx2x_set_mdio_emac_per_phy()  local
1456 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in bnx2x_set_mdio_emac_per_phy()
1457 	      phy_index++)  in bnx2x_set_mdio_emac_per_phy()
1459 				   params->phy[phy_index].mdio_ctrl);  in bnx2x_set_mdio_emac_per_phy()
3195 	u8 phy_index;  in bnx2x_phy_read()  local
3199 	for (phy_index = 0; phy_index < params->num_phys; phy_index++) {  in bnx2x_phy_read()
3200 		if (params->phy[phy_index].addr == phy_addr) {  in bnx2x_phy_read()
3202 					       &params->phy[phy_index], devad,  in bnx2x_phy_read()
3212 	u8 phy_index;  in bnx2x_phy_write()  local
3216 	for (phy_index = 0; phy_index < params->num_phys; phy_index++) {  in bnx2x_phy_write()
3217 		if (params->phy[phy_index].addr == phy_addr) {  in bnx2x_phy_write()
3219 						&params->phy[phy_index], devad,  in bnx2x_phy_write()
3427 	u8 actual_phy_idx, phy_index, link_cfg_idx;  in set_phy_vars()  local
3430 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in set_phy_vars()
3431 	      phy_index++) {  in set_phy_vars()
3432 		link_cfg_idx = LINK_CONFIG_IDX(phy_index);  in set_phy_vars()
3433 		actual_phy_idx = phy_index;  in set_phy_vars()
3435 			if (phy_index == EXT_PHY1)  in set_phy_vars()
3437 			else if (phy_index == EXT_PHY2)  in set_phy_vars()
6442 	u16 gp_status = 0, phy_index = 0;  in bnx2x_test_link()  local
6492 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_test_link()
6493 		      phy_index++) {  in bnx2x_test_link()
6494 			serdes_phy_type = ((params->phy[phy_index].media_type ==  in bnx2x_test_link()
6496 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6498 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6500 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6505 			if (params->phy[phy_index].read_status) {  in bnx2x_test_link()
6507 					params->phy[phy_index].read_status(  in bnx2x_test_link()
6508 						&params->phy[phy_index],  in bnx2x_test_link()
6522 	u8 phy_index, non_ext_phy;  in bnx2x_link_initialize()  local
6564 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_initialize()
6565 		      phy_index++) {  in bnx2x_link_initialize()
6571 			if (params->phy[phy_index].supported &  in bnx2x_link_initialize()
6575 			if (phy_index == EXT_PHY2 &&  in bnx2x_link_initialize()
6582 			params->phy[phy_index].config_init(  in bnx2x_link_initialize()
6583 				&params->phy[phy_index],  in bnx2x_link_initialize()
6797 	u8 link_10g_plus, phy_index;  in bnx2x_link_update()  local
6806 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in bnx2x_link_update()
6807 	      phy_index++) {  in bnx2x_link_update()
6808 		phy_vars[phy_index].flow_ctrl = 0;  in bnx2x_link_update()
6809 		phy_vars[phy_index].link_status = 0;  in bnx2x_link_update()
6810 		phy_vars[phy_index].line_speed = 0;  in bnx2x_link_update()
6811 		phy_vars[phy_index].duplex = DUPLEX_FULL;  in bnx2x_link_update()
6812 		phy_vars[phy_index].phy_link_up = 0;  in bnx2x_link_update()
6813 		phy_vars[phy_index].link_up = 0;  in bnx2x_link_update()
6814 		phy_vars[phy_index].fault_detected = 0;  in bnx2x_link_update()
6816 		phy_vars[phy_index].eee_status = vars->eee_status;  in bnx2x_link_update()
6848 	for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_update()
6849 	      phy_index++) {  in bnx2x_link_update()
6850 		struct bnx2x_phy *phy = &params->phy[phy_index];  in bnx2x_link_update()
6855 					       &phy_vars[phy_index]);  in bnx2x_link_update()
6858 				   phy_index);  in bnx2x_link_update()
6861 				   phy_index);  in bnx2x_link_update()
6867 			active_external_phy = phy_index;  in bnx2x_link_update()
6953 	for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_update()
6954 	      phy_index++) {  in bnx2x_link_update()
6955 		if (params->phy[phy_index].flags &  in bnx2x_link_update()
6958 						 phy_index ==  in bnx2x_link_update()
11865 				     u8 phy_index)  in bnx2x_populate_preemphasis()  argument
11874 		if (phy_index == INT_PHY || phy_index == EXT_PHY1) {  in bnx2x_populate_preemphasis()
11901 				    u8 phy_index, u8 port)  in bnx2x_get_ext_phy_config()  argument
11904 	switch (phy_index) {  in bnx2x_get_ext_phy_config()
11916 		DP(NETIF_MSG_LINK, "Invalid phy_index %d\n", phy_index);  in bnx2x_get_ext_phy_config()
12060 				  u8 phy_index,  in bnx2x_populate_ext_phy()  argument
12069 						  phy_index, port);  in bnx2x_populate_ext_phy()
12132 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);  in bnx2x_populate_ext_phy()
12140 	if (phy_index == EXT_PHY1) {  in bnx2x_populate_ext_phy()
12180 		   phy_type, port, phy_index);  in bnx2x_populate_ext_phy()
12186 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,  in bnx2x_populate_phy()  argument
12191 	if (phy_index == INT_PHY)  in bnx2x_populate_phy()
12193 	status = bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_populate_phy()
12200 			      u8 phy_index)  in bnx2x_phy_def_cfg()  argument
12205 	if (phy_index == EXT_PHY2) {  in bnx2x_phy_def_cfg()
12224 	   phy_index, link_config, phy->speed_cap_mask);  in bnx2x_phy_def_cfg()
12305 	u8 phy_index, actual_phy_idx;  in bnx2x_phy_probe()  local
12314 	for (phy_index = INT_PHY; phy_index < MAX_PHYS;  in bnx2x_phy_probe()
12315 	      phy_index++) {  in bnx2x_phy_probe()
12316 		actual_phy_idx = phy_index;  in bnx2x_phy_probe()
12318 			if (phy_index == EXT_PHY1)  in bnx2x_phy_probe()
12320 			else if (phy_index == EXT_PHY2)  in bnx2x_phy_probe()
12325 			   phy_index, actual_phy_idx);  in bnx2x_phy_probe()
12327 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12332 				   phy_index);  in bnx2x_phy_probe()
12333 			for (phy_index = INT_PHY;  in bnx2x_phy_probe()
12334 			      phy_index < MAX_PHYS;  in bnx2x_phy_probe()
12335 			      phy_index++)  in bnx2x_phy_probe()
12369 		bnx2x_phy_def_cfg(params, phy, phy_index);  in bnx2x_phy_probe()
12496 		u8 phy_index;  in bnx2x_init_xgxs_loopback()  local
12497 		for (phy_index = EXT_PHY1;  in bnx2x_init_xgxs_loopback()
12498 		      phy_index < params->num_phys; phy_index++)  in bnx2x_init_xgxs_loopback()
12499 			if (params->phy[phy_index].config_loopback)  in bnx2x_init_xgxs_loopback()
12500 				params->phy[phy_index].config_loopback(  in bnx2x_init_xgxs_loopback()
12501 					&params->phy[phy_index],  in bnx2x_init_xgxs_loopback()
12755 	u8 phy_index, port = params->port, clear_latch_ind = 0;  in bnx2x_link_reset()  local
12798 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_reset()
12799 		      phy_index++) {  in bnx2x_link_reset()
12800 			if (params->phy[phy_index].link_reset) {  in bnx2x_link_reset()
12802 						  &params->phy[phy_index]);  in bnx2x_link_reset()
12803 				params->phy[phy_index].link_reset(  in bnx2x_link_reset()
12804 					&params->phy[phy_index],  in bnx2x_link_reset()
12807 			if (params->phy[phy_index].flags &  in bnx2x_link_reset()
12899 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8073_common_init_phy()  argument
12927 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8073_common_init_phy()
13025 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8726_common_init_phy()  argument
13052 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8726_common_init_phy()
13120 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8727_common_init_phy()  argument
13168 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8727_common_init_phy()
13220 						u8 phy_index,  in bnx2x_84833_common_init_phy()  argument
13234 				     u32 shmem2_base_path[], u8 phy_index,  in bnx2x_ext_phy_common_init()  argument
13243 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13250 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13259 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13268 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13292 	u8 phy_index = 0;  in bnx2x_common_init_phy()  local
13314 	for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_common_init_phy()
13315 	      phy_index++) {  in bnx2x_common_init_phy()
13318 							  phy_index, 0);  in bnx2x_common_init_phy()
13322 						phy_index, ext_phy_type,  in bnx2x_common_init_phy()
13672 	u8 phy_index, fan_failure_det_req = 0;  in bnx2x_fan_failure_det_req()  local
13674 	for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_fan_failure_det_req()
13675 	      phy_index++) {  in bnx2x_fan_failure_det_req()
13676 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_fan_failure_det_req()
13690 	u8 phy_index;  in bnx2x_hw_reset_phy()  local
13699 	for (phy_index = INT_PHY; phy_index < MAX_PHYS;  in bnx2x_hw_reset_phy()
13700 	      phy_index++) {  in bnx2x_hw_reset_phy()
13701 		if (params->phy[phy_index].hw_reset) {  in bnx2x_hw_reset_phy()
13702 			params->phy[phy_index].hw_reset(  in bnx2x_hw_reset_phy()
13703 				&params->phy[phy_index],  in bnx2x_hw_reset_phy()
13705 			params->phy[phy_index] = phy_null;  in bnx2x_hw_reset_phy()
13714 	u8 gpio_num = 0xff, gpio_port = 0xff, phy_index;  in bnx2x_init_mod_abs_int()  local
13726 		for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_init_mod_abs_int()
13727 		      phy_index++) {  in bnx2x_init_mod_abs_int()
13728 			if (bnx2x_populate_phy(bp, phy_index, shmem_base,  in bnx2x_init_mod_abs_int()