Lines Matching refs:params
31 struct link_params *params,
219 static int bnx2x_check_half_open_conn(struct link_params *params,
222 struct link_params *params);
250 static int bnx2x_check_lfa(struct link_params *params) in bnx2x_check_lfa() argument
255 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
258 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
266 REG_WR(bp, params->lfa_base + in bnx2x_check_lfa()
273 link_status = REG_RD(bp, params->shmem_base + in bnx2x_check_lfa()
275 port_mb[params->port].link_status)); in bnx2x_check_lfa()
282 if (params->feature_config_flags & FEATURE_CONFIG_BOOT_FROM_SAN) in bnx2x_check_lfa()
286 if (params->loopback_mode) in bnx2x_check_lfa()
290 if (!params->lfa_base) in bnx2x_check_lfa()
293 if (params->num_phys == 3) { in bnx2x_check_lfa()
302 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
304 req_val = params->req_duplex[0] | (params->req_duplex[1] << 16); in bnx2x_check_lfa()
311 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
313 req_val = params->req_flow_ctrl[0] | (params->req_flow_ctrl[1] << 16); in bnx2x_check_lfa()
320 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
322 req_val = params->req_line_speed[0] | (params->req_line_speed[1] << 16); in bnx2x_check_lfa()
330 cur_speed_cap_mask = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
334 if (cur_speed_cap_mask != params->speed_cap_mask[cfg_idx]) { in bnx2x_check_lfa()
337 params->speed_cap_mask[cfg_idx]); in bnx2x_check_lfa()
343 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
347 if ((u16)cur_req_fc_auto_adv != params->req_fc_auto_adv) { in bnx2x_check_lfa()
349 cur_req_fc_auto_adv, params->req_fc_auto_adv); in bnx2x_check_lfa()
353 eee_status = REG_RD(bp, params->shmem2_base + in bnx2x_check_lfa()
355 eee_status[params->port])); in bnx2x_check_lfa()
358 (params->eee_mode & EEE_MODE_ENABLE_LPI)) || in bnx2x_check_lfa()
360 (params->eee_mode & EEE_MODE_ADV_LPI))) { in bnx2x_check_lfa()
361 DP(NETIF_MSG_LINK, "EEE mismatch %x vs. %x\n", params->eee_mode, in bnx2x_check_lfa()
444 static void bnx2x_ets_e2e3a0_disabled(struct link_params *params) in bnx2x_ets_e2e3a0_disabled() argument
447 struct bnx2x *bp = params->bp; in bnx2x_ets_e2e3a0_disabled()
535 const struct link_params *params, in bnx2x_ets_e3b0_set_credit_upper_bound_nig() argument
538 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_set_credit_upper_bound_nig()
539 const u8 port = params->port; in bnx2x_ets_e3b0_set_credit_upper_bound_nig()
573 static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params, in bnx2x_ets_e3b0_nig_disabled() argument
576 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_nig_disabled()
577 const u8 port = params->port; in bnx2x_ets_e3b0_nig_disabled()
649 bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val); in bnx2x_ets_e3b0_nig_disabled()
657 const struct link_params *params, in bnx2x_ets_e3b0_set_credit_upper_bound_pbf() argument
660 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_set_credit_upper_bound_pbf()
663 const u8 port = params->port; in bnx2x_ets_e3b0_set_credit_upper_bound_pbf()
690 static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params) in bnx2x_ets_e3b0_pbf_disabled() argument
692 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_pbf_disabled()
693 const u8 port = params->port; in bnx2x_ets_e3b0_pbf_disabled()
741 bnx2x_ets_e3b0_set_credit_upper_bound_pbf(params, min_w_val_pbf); in bnx2x_ets_e3b0_pbf_disabled()
748 static int bnx2x_ets_e3b0_disabled(const struct link_params *params, in bnx2x_ets_e3b0_disabled() argument
751 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_disabled()
759 bnx2x_ets_e3b0_nig_disabled(params, vars); in bnx2x_ets_e3b0_disabled()
761 bnx2x_ets_e3b0_pbf_disabled(params); in bnx2x_ets_e3b0_disabled()
771 int bnx2x_ets_disabled(struct link_params *params, in bnx2x_ets_disabled() argument
774 struct bnx2x *bp = params->bp; in bnx2x_ets_disabled()
778 bnx2x_ets_e2e3a0_disabled(params); in bnx2x_ets_disabled()
780 bnx2x_status = bnx2x_ets_e3b0_disabled(params, vars); in bnx2x_ets_disabled()
794 static int bnx2x_ets_e3b0_cli_map(const struct link_params *params, in bnx2x_ets_e3b0_cli_map() argument
799 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_cli_map()
800 const u8 port = params->port; in bnx2x_ets_e3b0_cli_map()
901 const struct link_params *params, in bnx2x_ets_e3b0_get_total_bw() argument
905 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_get_total_bw()
914 if (!ets_params->cos[cos_idx].params.bw_params.bw) { in bnx2x_ets_e3b0_get_total_bw()
920 ets_params->cos[cos_idx].params.bw_params.bw in bnx2x_ets_e3b0_get_total_bw()
924 ets_params->cos[cos_idx].params.bw_params.bw; in bnx2x_ets_e3b0_get_total_bw()
961 static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params, in bnx2x_ets_e3b0_sp_pri_to_cos_set() argument
965 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_sp_pri_to_cos_set()
966 const u8 port = params->port; in bnx2x_ets_e3b0_sp_pri_to_cos_set()
1043 static int bnx2x_ets_e3b0_sp_set_pri_cli_reg(const struct link_params *params, in bnx2x_ets_e3b0_sp_set_pri_cli_reg() argument
1046 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_sp_set_pri_cli_reg()
1048 const u8 port = params->port; in bnx2x_ets_e3b0_sp_set_pri_cli_reg()
1136 int bnx2x_ets_e3b0_config(const struct link_params *params, in bnx2x_ets_e3b0_config() argument
1140 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_config()
1142 const u8 port = params->port; in bnx2x_ets_e3b0_config()
1169 bnx2x_status = bnx2x_ets_e3b0_get_total_bw(params, ets_params, in bnx2x_ets_e3b0_config()
1180 bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val_nig); in bnx2x_ets_e3b0_config()
1181 bnx2x_ets_e3b0_set_credit_upper_bound_pbf(params, min_w_val_pbf); in bnx2x_ets_e3b0_config()
1193 ets_params->cos[cos_entry].params.bw_params.bw, in bnx2x_ets_e3b0_config()
1200 params, in bnx2x_ets_e3b0_config()
1202 ets_params->cos[cos_entry].params.sp_params.pri, in bnx2x_ets_e3b0_config()
1218 bnx2x_status = bnx2x_ets_e3b0_sp_set_pri_cli_reg(params, in bnx2x_ets_e3b0_config()
1228 bnx2x_status = bnx2x_ets_e3b0_cli_map(params, ets_params, in bnx2x_ets_e3b0_config()
1238 static void bnx2x_ets_bw_limit_common(const struct link_params *params) in bnx2x_ets_bw_limit_common() argument
1241 struct bnx2x *bp = params->bp; in bnx2x_ets_bw_limit_common()
1282 void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, in bnx2x_ets_bw_limit() argument
1286 struct bnx2x *bp = params->bp; in bnx2x_ets_bw_limit()
1305 bnx2x_ets_bw_limit_common(params); in bnx2x_ets_bw_limit()
1314 int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos) in bnx2x_ets_strict() argument
1317 struct bnx2x *bp = params->bp; in bnx2x_ets_strict()
1357 static void bnx2x_update_pfc_xmac(struct link_params *params, in bnx2x_update_pfc_xmac() argument
1361 struct bnx2x *bp = params->bp; in bnx2x_update_pfc_xmac()
1366 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; in bnx2x_update_pfc_xmac()
1374 if (!(params->feature_config_flags & in bnx2x_update_pfc_xmac()
1407 ((params->mac_addr[2] << 24) | in bnx2x_update_pfc_xmac()
1408 (params->mac_addr[3] << 16) | in bnx2x_update_pfc_xmac()
1409 (params->mac_addr[4] << 8) | in bnx2x_update_pfc_xmac()
1410 (params->mac_addr[5]))); in bnx2x_update_pfc_xmac()
1412 ((params->mac_addr[0] << 8) | in bnx2x_update_pfc_xmac()
1413 (params->mac_addr[1]))); in bnx2x_update_pfc_xmac()
1452 struct link_params *params) in bnx2x_set_mdio_emac_per_phy() argument
1456 for (phy_index = INT_PHY; phy_index < params->num_phys; in bnx2x_set_mdio_emac_per_phy()
1458 bnx2x_set_mdio_clk(bp, params->chip_id, in bnx2x_set_mdio_emac_per_phy()
1459 params->phy[phy_index].mdio_ctrl); in bnx2x_set_mdio_emac_per_phy()
1475 static void bnx2x_emac_init(struct link_params *params, in bnx2x_emac_init() argument
1479 struct bnx2x *bp = params->bp; in bnx2x_emac_init()
1480 u8 port = params->port; in bnx2x_emac_init()
1507 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_emac_init()
1509 val = ((params->mac_addr[0] << 8) | in bnx2x_emac_init()
1510 params->mac_addr[1]); in bnx2x_emac_init()
1513 val = ((params->mac_addr[2] << 24) | in bnx2x_emac_init()
1514 (params->mac_addr[3] << 16) | in bnx2x_emac_init()
1515 (params->mac_addr[4] << 8) | in bnx2x_emac_init()
1516 params->mac_addr[5]); in bnx2x_emac_init()
1520 static void bnx2x_set_xumac_nig(struct link_params *params, in bnx2x_set_xumac_nig() argument
1524 struct bnx2x *bp = params->bp; in bnx2x_set_xumac_nig()
1526 REG_WR(bp, params->port ? NIG_REG_P1_MAC_IN_EN : NIG_REG_P0_MAC_IN_EN, in bnx2x_set_xumac_nig()
1528 REG_WR(bp, params->port ? NIG_REG_P1_MAC_OUT_EN : NIG_REG_P0_MAC_OUT_EN, in bnx2x_set_xumac_nig()
1530 REG_WR(bp, params->port ? NIG_REG_P1_MAC_PAUSE_OUT_EN : in bnx2x_set_xumac_nig()
1534 static void bnx2x_set_umac_rxtx(struct link_params *params, u8 en) in bnx2x_set_umac_rxtx() argument
1536 u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; in bnx2x_set_umac_rxtx()
1538 struct bnx2x *bp = params->bp; in bnx2x_set_umac_rxtx()
1540 (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port))) in bnx2x_set_umac_rxtx()
1553 static void bnx2x_umac_enable(struct link_params *params, in bnx2x_umac_enable() argument
1557 u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; in bnx2x_umac_enable()
1558 struct bnx2x *bp = params->bp; in bnx2x_umac_enable()
1561 (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port)); in bnx2x_umac_enable()
1565 (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port)); in bnx2x_umac_enable()
1570 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1); in bnx2x_umac_enable()
1618 ((params->mac_addr[2] << 24) | in bnx2x_umac_enable()
1619 (params->mac_addr[3] << 16) | in bnx2x_umac_enable()
1620 (params->mac_addr[4] << 8) | in bnx2x_umac_enable()
1621 (params->mac_addr[5]))); in bnx2x_umac_enable()
1623 ((params->mac_addr[0] << 8) | in bnx2x_umac_enable()
1624 (params->mac_addr[1]))); in bnx2x_umac_enable()
1645 bnx2x_set_xumac_nig(params, in bnx2x_umac_enable()
1652 static void bnx2x_xmac_init(struct link_params *params, u32 max_speed) in bnx2x_xmac_init() argument
1654 struct bnx2x *bp = params->bp; in bnx2x_xmac_init()
1714 static void bnx2x_set_xmac_rxtx(struct link_params *params, u8 en) in bnx2x_set_xmac_rxtx() argument
1716 u8 port = params->port; in bnx2x_set_xmac_rxtx()
1717 struct bnx2x *bp = params->bp; in bnx2x_set_xmac_rxtx()
1742 static int bnx2x_xmac_enable(struct link_params *params, in bnx2x_xmac_enable() argument
1746 struct bnx2x *bp = params->bp; in bnx2x_xmac_enable()
1749 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; in bnx2x_xmac_enable()
1751 bnx2x_xmac_init(params, vars->line_speed); in bnx2x_xmac_enable()
1760 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 0); in bnx2x_xmac_enable()
1765 if (!(params->phy[INT_PHY].flags & FLAGS_TX_ERROR_CHECK)) { in bnx2x_xmac_enable()
1781 bnx2x_update_pfc_xmac(params, vars, 0); in bnx2x_xmac_enable()
1796 (params->phy[INT_PHY].supported & in bnx2x_xmac_enable()
1804 bnx2x_set_xumac_nig(params, in bnx2x_xmac_enable()
1812 static int bnx2x_emac_enable(struct link_params *params, in bnx2x_emac_enable() argument
1815 struct bnx2x *bp = params->bp; in bnx2x_emac_enable()
1816 u8 port = params->port; in bnx2x_emac_enable()
1831 u32 ser_lane = ((params->lane_config & in bnx2x_emac_enable()
1859 if (!(params->feature_config_flags & in bnx2x_emac_enable()
1887 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) { in bnx2x_emac_enable()
1931 if ((params->feature_config_flags & in bnx2x_emac_enable()
1945 static void bnx2x_update_pfc_bmac1(struct link_params *params, in bnx2x_update_pfc_bmac1() argument
1949 struct bnx2x *bp = params->bp; in bnx2x_update_pfc_bmac1()
1950 u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM : in bnx2x_update_pfc_bmac1()
1954 if ((!(params->feature_config_flags & in bnx2x_update_pfc_bmac1()
1965 if (!(params->feature_config_flags & in bnx2x_update_pfc_bmac1()
1974 static void bnx2x_update_pfc_bmac2(struct link_params *params, in bnx2x_update_pfc_bmac2() argument
1982 struct bnx2x *bp = params->bp; in bnx2x_update_pfc_bmac2()
1983 u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM : in bnx2x_update_pfc_bmac2()
1987 if ((!(params->feature_config_flags & in bnx2x_update_pfc_bmac2()
1999 if (!(params->feature_config_flags & in bnx2x_update_pfc_bmac2()
2007 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) { in bnx2x_update_pfc_bmac2()
2036 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_update_pfc_bmac2()
2051 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_update_pfc_bmac2()
2107 static void bnx2x_update_mng(struct link_params *params, u32 link_status) in bnx2x_update_mng() argument
2109 struct bnx2x *bp = params->bp; in bnx2x_update_mng()
2111 REG_WR(bp, params->shmem_base + in bnx2x_update_mng()
2113 port_mb[params->port].link_status), link_status); in bnx2x_update_mng()
2116 static void bnx2x_update_link_attr(struct link_params *params, u32 link_attr) in bnx2x_update_link_attr() argument
2118 struct bnx2x *bp = params->bp; in bnx2x_update_link_attr()
2121 REG_WR(bp, params->shmem2_base + in bnx2x_update_link_attr()
2123 link_attr_sync[params->port]), link_attr); in bnx2x_update_link_attr()
2126 static void bnx2x_update_pfc_nig(struct link_params *params, in bnx2x_update_pfc_nig() argument
2133 struct bnx2x *bp = params->bp; in bnx2x_update_pfc_nig()
2134 u8 port = params->port; in bnx2x_update_pfc_nig()
2136 int set_pfc = params->feature_config_flags & in bnx2x_update_pfc_nig()
2222 int bnx2x_update_pfc(struct link_params *params, in bnx2x_update_pfc() argument
2231 struct bnx2x *bp = params->bp; in bnx2x_update_pfc()
2232 u8 bmac_loopback = (params->loopback_mode == LOOPBACK_BMAC); in bnx2x_update_pfc()
2234 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_update_pfc()
2239 bnx2x_update_mng(params, vars->link_status); in bnx2x_update_pfc()
2242 bnx2x_update_pfc_nig(params, vars, pfc_params); in bnx2x_update_pfc()
2251 bnx2x_update_pfc_xmac(params, vars, 0); in bnx2x_update_pfc()
2255 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) in bnx2x_update_pfc()
2258 bnx2x_emac_enable(params, vars, 0); in bnx2x_update_pfc()
2262 bnx2x_update_pfc_bmac2(params, vars, bmac_loopback); in bnx2x_update_pfc()
2264 bnx2x_update_pfc_bmac1(params, vars); in bnx2x_update_pfc()
2267 if ((params->feature_config_flags & in bnx2x_update_pfc()
2271 REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + params->port*4, val); in bnx2x_update_pfc()
2276 static int bnx2x_bmac1_enable(struct link_params *params, in bnx2x_bmac1_enable() argument
2280 struct bnx2x *bp = params->bp; in bnx2x_bmac1_enable()
2281 u8 port = params->port; in bnx2x_bmac1_enable()
2296 wb_data[0] = ((params->mac_addr[2] << 24) | in bnx2x_bmac1_enable()
2297 (params->mac_addr[3] << 16) | in bnx2x_bmac1_enable()
2298 (params->mac_addr[4] << 8) | in bnx2x_bmac1_enable()
2299 params->mac_addr[5]); in bnx2x_bmac1_enable()
2300 wb_data[1] = ((params->mac_addr[0] << 8) | in bnx2x_bmac1_enable()
2301 params->mac_addr[1]); in bnx2x_bmac1_enable()
2319 bnx2x_update_pfc_bmac1(params, vars); in bnx2x_bmac1_enable()
2340 static int bnx2x_bmac2_enable(struct link_params *params, in bnx2x_bmac2_enable() argument
2344 struct bnx2x *bp = params->bp; in bnx2x_bmac2_enable()
2345 u8 port = params->port; in bnx2x_bmac2_enable()
2366 wb_data[0] = ((params->mac_addr[2] << 24) | in bnx2x_bmac2_enable()
2367 (params->mac_addr[3] << 16) | in bnx2x_bmac2_enable()
2368 (params->mac_addr[4] << 8) | in bnx2x_bmac2_enable()
2369 params->mac_addr[5]); in bnx2x_bmac2_enable()
2370 wb_data[1] = ((params->mac_addr[0] << 8) | in bnx2x_bmac2_enable()
2371 params->mac_addr[1]); in bnx2x_bmac2_enable()
2400 bnx2x_update_pfc_bmac2(params, vars, is_lb); in bnx2x_bmac2_enable()
2405 static int bnx2x_bmac_enable(struct link_params *params, in bnx2x_bmac_enable() argument
2410 u8 port = params->port; in bnx2x_bmac_enable()
2411 struct bnx2x *bp = params->bp; in bnx2x_bmac_enable()
2428 rc = bnx2x_bmac2_enable(params, vars, is_lb); in bnx2x_bmac_enable()
2430 rc = bnx2x_bmac1_enable(params, vars, is_lb); in bnx2x_bmac_enable()
2435 if ((params->feature_config_flags & in bnx2x_bmac_enable()
2476 static int bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl, in bnx2x_pbf_update() argument
2479 struct bnx2x *bp = params->bp; in bnx2x_pbf_update()
2480 u8 port = params->port; in bnx2x_pbf_update()
2824 static u8 bnx2x_eee_has_cap(struct link_params *params) in bnx2x_eee_has_cap() argument
2826 struct bnx2x *bp = params->bp; in bnx2x_eee_has_cap()
2828 if (REG_RD(bp, params->shmem2_base) <= in bnx2x_eee_has_cap()
2829 offsetof(struct shmem2_region, eee_status[params->port])) in bnx2x_eee_has_cap()
2875 static u32 bnx2x_eee_calc_timer(struct link_params *params) in bnx2x_eee_calc_timer() argument
2878 struct bnx2x *bp = params->bp; in bnx2x_eee_calc_timer()
2880 if (params->eee_mode & EEE_MODE_OVERRIDE_NVRAM) { in bnx2x_eee_calc_timer()
2881 if (params->eee_mode & EEE_MODE_OUTPUT_TIME) { in bnx2x_eee_calc_timer()
2883 eee_idle = params->eee_mode & EEE_MODE_TIMER_MASK; in bnx2x_eee_calc_timer()
2886 if (bnx2x_eee_nvram_to_time(params->eee_mode & in bnx2x_eee_calc_timer()
2893 eee_mode = ((REG_RD(bp, params->shmem_base + in bnx2x_eee_calc_timer()
2895 port_feature_config[params->port]. in bnx2x_eee_calc_timer()
2907 static int bnx2x_eee_set_timers(struct link_params *params, in bnx2x_eee_set_timers() argument
2911 struct bnx2x *bp = params->bp; in bnx2x_eee_set_timers()
2913 eee_idle = bnx2x_eee_calc_timer(params); in bnx2x_eee_set_timers()
2916 REG_WR(bp, MISC_REG_CPMU_LP_IDLE_THR_P0 + (params->port << 2), in bnx2x_eee_set_timers()
2918 } else if ((params->eee_mode & EEE_MODE_ENABLE_LPI) && in bnx2x_eee_set_timers()
2919 (params->eee_mode & EEE_MODE_OVERRIDE_NVRAM) && in bnx2x_eee_set_timers()
2920 (params->eee_mode & EEE_MODE_OUTPUT_TIME)) { in bnx2x_eee_set_timers()
2926 if (params->eee_mode & EEE_MODE_OUTPUT_TIME) { in bnx2x_eee_set_timers()
2940 static int bnx2x_eee_initial_config(struct link_params *params, in bnx2x_eee_initial_config() argument
2946 if (params->eee_mode & EEE_MODE_ENABLE_LPI) in bnx2x_eee_initial_config()
2951 if (params->eee_mode & EEE_MODE_ADV_LPI) in bnx2x_eee_initial_config()
2956 return bnx2x_eee_set_timers(params, vars); in bnx2x_eee_initial_config()
2960 struct link_params *params, in bnx2x_eee_disable() argument
2963 struct bnx2x *bp = params->bp; in bnx2x_eee_disable()
2966 REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), 0); in bnx2x_eee_disable()
2976 struct link_params *params, in bnx2x_eee_advertise() argument
2979 struct bnx2x *bp = params->bp; in bnx2x_eee_advertise()
2983 REG_WR(bp, MISC_REG_CPMU_LP_MASK_EXT_P0 + (params->port << 2), 0xfc20); in bnx2x_eee_advertise()
3002 static void bnx2x_update_mng_eee(struct link_params *params, u32 eee_status) in bnx2x_update_mng_eee() argument
3004 struct bnx2x *bp = params->bp; in bnx2x_update_mng_eee()
3006 if (bnx2x_eee_has_cap(params)) in bnx2x_update_mng_eee()
3007 REG_WR(bp, params->shmem2_base + in bnx2x_update_mng_eee()
3009 eee_status[params->port]), eee_status); in bnx2x_update_mng_eee()
3013 struct link_params *params, in bnx2x_eee_an_resolve() argument
3016 struct bnx2x *bp = params->bp; in bnx2x_eee_an_resolve()
3062 static void bnx2x_bsc_module_sel(struct link_params *params) in bnx2x_bsc_module_sel() argument
3067 struct bnx2x *bp = params->bp; in bnx2x_bsc_module_sel()
3068 u8 port = params->port; in bnx2x_bsc_module_sel()
3070 board_cfg = REG_RD(bp, params->shmem_base + in bnx2x_bsc_module_sel()
3078 sfp_ctrl = REG_RD(bp, params->shmem_base + in bnx2x_bsc_module_sel()
3088 static int bnx2x_bsc_read(struct link_params *params, in bnx2x_bsc_read() argument
3104 bnx2x_bsc_module_sel(params); in bnx2x_bsc_read()
3192 int bnx2x_phy_read(struct link_params *params, u8 phy_addr, in bnx2x_phy_read() argument
3199 for (phy_index = 0; phy_index < params->num_phys; phy_index++) { in bnx2x_phy_read()
3200 if (params->phy[phy_index].addr == phy_addr) { in bnx2x_phy_read()
3201 return bnx2x_cl45_read(params->bp, in bnx2x_phy_read()
3202 ¶ms->phy[phy_index], devad, in bnx2x_phy_read()
3209 int bnx2x_phy_write(struct link_params *params, u8 phy_addr, in bnx2x_phy_write() argument
3216 for (phy_index = 0; phy_index < params->num_phys; phy_index++) { in bnx2x_phy_write()
3217 if (params->phy[phy_index].addr == phy_addr) { in bnx2x_phy_write()
3218 return bnx2x_cl45_write(params->bp, in bnx2x_phy_write()
3219 ¶ms->phy[phy_index], devad, in bnx2x_phy_write()
3226 struct link_params *params) in bnx2x_get_warpcore_lane() argument
3229 struct bnx2x *bp = params->bp; in bnx2x_get_warpcore_lane()
3234 port = params->port; in bnx2x_get_warpcore_lane()
3279 static void bnx2x_set_aer_mmd(struct link_params *params, in bnx2x_set_aer_mmd() argument
3284 struct bnx2x *bp = params->bp; in bnx2x_set_aer_mmd()
3285 ser_lane = ((params->lane_config & in bnx2x_set_aer_mmd()
3293 aer_val = bnx2x_get_warpcore_lane(phy, params); in bnx2x_set_aer_mmd()
3350 struct link_params *params, in bnx2x_xgxs_specific_func() argument
3353 struct bnx2x *bp = params->bp; in bnx2x_xgxs_specific_func()
3357 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + params->port*0x18, 0); in bnx2x_xgxs_specific_func()
3358 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + params->port*0x18, in bnx2x_xgxs_specific_func()
3364 static void bnx2x_xgxs_deassert(struct link_params *params) in bnx2x_xgxs_deassert() argument
3366 struct bnx2x *bp = params->bp; in bnx2x_xgxs_deassert()
3370 port = params->port; in bnx2x_xgxs_deassert()
3378 bnx2x_xgxs_specific_func(¶ms->phy[INT_PHY], params, in bnx2x_xgxs_deassert()
3383 struct link_params *params, u16 *ieee_fc) in bnx2x_calc_ieee_aneg_adv() argument
3385 struct bnx2x *bp = params->bp; in bnx2x_calc_ieee_aneg_adv()
3393 switch (params->req_fc_auto_adv) { in bnx2x_calc_ieee_aneg_adv()
3423 static void set_phy_vars(struct link_params *params, in set_phy_vars() argument
3426 struct bnx2x *bp = params->bp; in set_phy_vars()
3428 u8 phy_config_swapped = params->multi_phy_config & in set_phy_vars()
3430 for (phy_index = INT_PHY; phy_index < params->num_phys; in set_phy_vars()
3440 params->phy[actual_phy_idx].req_flow_ctrl = in set_phy_vars()
3441 params->req_flow_ctrl[link_cfg_idx]; in set_phy_vars()
3443 params->phy[actual_phy_idx].req_line_speed = in set_phy_vars()
3444 params->req_line_speed[link_cfg_idx]; in set_phy_vars()
3446 params->phy[actual_phy_idx].speed_cap_mask = in set_phy_vars()
3447 params->speed_cap_mask[link_cfg_idx]; in set_phy_vars()
3449 params->phy[actual_phy_idx].req_duplex = in set_phy_vars()
3450 params->req_duplex[link_cfg_idx]; in set_phy_vars()
3452 if (params->req_line_speed[link_cfg_idx] == in set_phy_vars()
3458 params->phy[actual_phy_idx].req_flow_ctrl, in set_phy_vars()
3459 params->phy[actual_phy_idx].req_line_speed, in set_phy_vars()
3460 params->phy[actual_phy_idx].speed_cap_mask); in set_phy_vars()
3464 static void bnx2x_ext_phy_set_pause(struct link_params *params, in bnx2x_ext_phy_set_pause() argument
3469 struct bnx2x *bp = params->bp; in bnx2x_ext_phy_set_pause()
3476 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); in bnx2x_ext_phy_set_pause()
3520 struct link_params *params, in bnx2x_ext_phy_update_adv_fc() argument
3526 struct bnx2x *bp = params->bp; in bnx2x_ext_phy_update_adv_fc()
3531 SINGLE_MEDIA_DIRECT(params)) { in bnx2x_ext_phy_update_adv_fc()
3532 u8 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_ext_phy_update_adv_fc()
3575 struct link_params *params, in bnx2x_ext_phy_resolve_fc() argument
3583 bnx2x_ext_phy_update_adv_fc(phy, params, vars); in bnx2x_ext_phy_resolve_fc()
3587 vars->flow_ctrl = params->req_fc_auto_adv; in bnx2x_ext_phy_resolve_fc()
3590 bnx2x_ext_phy_update_adv_fc(phy, params, vars); in bnx2x_ext_phy_resolve_fc()
3614 struct link_params *params, in bnx2x_warpcore_enable_AN_KR2() argument
3617 struct bnx2x *bp = params->bp; in bnx2x_warpcore_enable_AN_KR2()
3648 params->link_attr_sync |= LINK_ATTR_SYNC_KR2_ENABLE; in bnx2x_warpcore_enable_AN_KR2()
3649 bnx2x_update_link_attr(params, params->link_attr_sync); in bnx2x_warpcore_enable_AN_KR2()
3652 static void bnx2x_disable_kr2(struct link_params *params, in bnx2x_disable_kr2() argument
3656 struct bnx2x *bp = params->bp; in bnx2x_disable_kr2()
3681 params->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE; in bnx2x_disable_kr2()
3682 bnx2x_update_link_attr(params, params->link_attr_sync); in bnx2x_disable_kr2()
3688 struct link_params *params) in bnx2x_warpcore_set_lpi_passthrough() argument
3690 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_lpi_passthrough()
3700 struct link_params *params) in bnx2x_warpcore_restart_AN_KR() argument
3703 struct bnx2x *bp = params->bp; in bnx2x_warpcore_restart_AN_KR()
3704 u16 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_restart_AN_KR()
3711 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_restart_AN_KR()
3715 struct link_params *params, in bnx2x_warpcore_enable_AN_KR() argument
3719 struct bnx2x *bp = params->bp; in bnx2x_warpcore_enable_AN_KR()
3765 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_enable_AN_KR()
3770 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_enable_AN_KR()
3797 if (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_enable_AN_KR()
3799 port_hw_config[params->port].default_cfg)) & in bnx2x_warpcore_enable_AN_KR()
3808 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_warpcore_enable_AN_KR()
3830 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_enable_AN_KR()
3832 bnx2x_warpcore_enable_AN_KR2(phy, params, vars); in bnx2x_warpcore_enable_AN_KR()
3837 wc_lane_config = REG_RD(bp, params->shmem_base + in bnx2x_warpcore_enable_AN_KR()
3859 bnx2x_disable_kr2(params, vars, phy); in bnx2x_warpcore_enable_AN_KR()
3863 bnx2x_warpcore_restart_AN_KR(phy, params); in bnx2x_warpcore_enable_AN_KR()
3867 struct link_params *params, in bnx2x_warpcore_set_10G_KR() argument
3870 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_10G_KR()
3889 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_set_10G_KR()
3906 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_set_10G_KR()
3935 struct link_params *params, in bnx2x_warpcore_set_10G_XFI() argument
3938 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_10G_XFI()
3989 cfg_tap_val = REG_RD(bp, params->shmem_base + in bnx2x_warpcore_set_10G_XFI()
3991 port_hw_config[params->port]. in bnx2x_warpcore_set_10G_XFI()
4039 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_set_10G_XFI()
4055 bnx2x_warpcore_set_lpi_passthrough(phy, params); in bnx2x_warpcore_set_10G_XFI()
4071 struct link_params *params) in bnx2x_warpcore_set_20G_force_KR2() argument
4074 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_20G_force_KR2()
4083 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_set_20G_force_KR2()
4120 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_set_20G_force_KR2()
4178 struct link_params *params, in bnx2x_warpcore_set_sgmii_speed() argument
4182 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_sgmii_speed()
4189 bnx2x_warpcore_set_lpi_passthrough(phy, params); in bnx2x_warpcore_set_sgmii_speed()
4278 struct link_params *params, in bnx2x_warpcore_clear_regs() argument
4281 struct bnx2x *bp = params->bp; in bnx2x_warpcore_clear_regs()
4307 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_clear_regs()
4353 struct link_params *params) in bnx2x_is_sfp_module_plugged() argument
4355 struct bnx2x *bp = params->bp; in bnx2x_is_sfp_module_plugged()
4358 if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, in bnx2x_is_sfp_module_plugged()
4359 params->shmem_base, params->port, in bnx2x_is_sfp_module_plugged()
4371 struct link_params *params) in bnx2x_warpcore_get_sigdet() argument
4374 struct bnx2x *bp = params->bp; in bnx2x_warpcore_get_sigdet()
4376 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_get_sigdet()
4385 struct link_params *params, in bnx2x_warpcore_config_runtime() argument
4388 struct bnx2x *bp = params->bp; in bnx2x_warpcore_config_runtime()
4398 u16 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_config_runtime()
4399 serdes_net_if = (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_config_runtime()
4401 port_hw_config[params->port].default_cfg)) & in bnx2x_warpcore_config_runtime()
4438 struct link_params *params) in bnx2x_warpcore_config_sfi() argument
4440 u16 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_config_sfi()
4441 struct bnx2x *bp = params->bp; in bnx2x_warpcore_config_sfi()
4442 bnx2x_warpcore_clear_regs(phy, params, lane); in bnx2x_warpcore_config_sfi()
4443 if ((params->req_line_speed[LINK_CONFIG_IDX(INT_PHY)] == in bnx2x_warpcore_config_sfi()
4447 bnx2x_warpcore_set_10G_XFI(phy, params, 0); in bnx2x_warpcore_config_sfi()
4450 bnx2x_warpcore_set_sgmii_speed(phy, params, 1, 0); in bnx2x_warpcore_config_sfi()
4454 static void bnx2x_sfp_e3_set_transmitter(struct link_params *params, in bnx2x_sfp_e3_set_transmitter() argument
4458 struct bnx2x *bp = params->bp; in bnx2x_sfp_e3_set_transmitter()
4460 u8 port = params->port; in bnx2x_sfp_e3_set_transmitter()
4462 cfg_pin = REG_RD(bp, params->shmem_base + in bnx2x_sfp_e3_set_transmitter()
4476 struct link_params *params, in bnx2x_warpcore_config_init() argument
4479 struct bnx2x *bp = params->bp; in bnx2x_warpcore_config_init()
4482 u16 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_config_init()
4483 serdes_net_if = (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_config_init()
4485 port_hw_config[params->port].default_cfg)) & in bnx2x_warpcore_config_init()
4490 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_config_init()
4499 bnx2x_warpcore_clear_regs(phy, params, lane); in bnx2x_warpcore_config_init()
4500 bnx2x_warpcore_set_sgmii_speed(phy, params, 0, 1); in bnx2x_warpcore_config_init()
4505 if (params->loopback_mode != LOOPBACK_EXT) in bnx2x_warpcore_config_init()
4506 bnx2x_warpcore_enable_AN_KR(phy, params, vars); in bnx2x_warpcore_config_init()
4509 bnx2x_warpcore_set_10G_KR(phy, params, vars); in bnx2x_warpcore_config_init()
4514 bnx2x_warpcore_clear_regs(phy, params, lane); in bnx2x_warpcore_config_init()
4517 bnx2x_warpcore_set_10G_XFI(phy, params, 1); in bnx2x_warpcore_config_init()
4519 if (SINGLE_MEDIA_DIRECT(params)) { in bnx2x_warpcore_config_init()
4527 params, in bnx2x_warpcore_config_init()
4539 if ((params->loopback_mode == LOOPBACK_NONE) || in bnx2x_warpcore_config_init()
4540 (params->loopback_mode == LOOPBACK_EXT)) { in bnx2x_warpcore_config_init()
4541 if (bnx2x_is_sfp_module_plugged(phy, params)) in bnx2x_warpcore_config_init()
4542 bnx2x_sfp_module_detection(phy, params); in bnx2x_warpcore_config_init()
4544 bnx2x_sfp_e3_set_transmitter(params, in bnx2x_warpcore_config_init()
4548 bnx2x_warpcore_config_sfi(phy, params); in bnx2x_warpcore_config_init()
4560 bnx2x_sfp_module_detection(phy, params); in bnx2x_warpcore_config_init()
4563 if (!params->loopback_mode) { in bnx2x_warpcore_config_init()
4564 bnx2x_warpcore_enable_AN_KR(phy, params, vars); in bnx2x_warpcore_config_init()
4567 bnx2x_warpcore_set_20G_force_KR2(phy, params); in bnx2x_warpcore_config_init()
4584 struct link_params *params) in bnx2x_warpcore_link_reset() argument
4586 struct bnx2x *bp = params->bp; in bnx2x_warpcore_link_reset()
4588 bnx2x_sfp_e3_set_transmitter(params, phy, 0); in bnx2x_warpcore_link_reset()
4589 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_warpcore_link_reset()
4590 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_link_reset()
4612 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_link_reset()
4634 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_link_reset()
4639 struct link_params *params) in bnx2x_set_warpcore_loopback() argument
4641 struct bnx2x *bp = params->bp; in bnx2x_set_warpcore_loopback()
4645 params->loopback_mode, phy->req_line_speed); in bnx2x_set_warpcore_loopback()
4659 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_set_warpcore_loopback()
4670 bnx2x_set_aer_mmd(params, phy); in bnx2x_set_warpcore_loopback()
4683 static void bnx2x_sync_link(struct link_params *params, in bnx2x_sync_link() argument
4686 struct bnx2x *bp = params->bp; in bnx2x_sync_link()
4789 void bnx2x_link_status_update(struct link_params *params, in bnx2x_link_status_update() argument
4792 struct bnx2x *bp = params->bp; in bnx2x_link_status_update()
4793 u8 port = params->port; in bnx2x_link_status_update()
4796 set_phy_vars(params, vars); in bnx2x_link_status_update()
4798 vars->link_status = REG_RD(bp, params->shmem_base + in bnx2x_link_status_update()
4803 if (params->loopback_mode != LOOPBACK_NONE && in bnx2x_link_status_update()
4804 params->loopback_mode != LOOPBACK_EXT) in bnx2x_link_status_update()
4807 if (bnx2x_eee_has_cap(params)) in bnx2x_link_status_update()
4808 vars->eee_status = REG_RD(bp, params->shmem2_base + in bnx2x_link_status_update()
4810 eee_status[params->port])); in bnx2x_link_status_update()
4813 bnx2x_sync_link(params, vars); in bnx2x_link_status_update()
4815 sync_offset = params->shmem_base + in bnx2x_link_status_update()
4820 params->phy[INT_PHY].media_type = in bnx2x_link_status_update()
4823 params->phy[EXT_PHY1].media_type = in bnx2x_link_status_update()
4826 params->phy[EXT_PHY2].media_type = in bnx2x_link_status_update()
4832 sync_offset = params->shmem_base + in bnx2x_link_status_update()
4840 params->feature_config_flags |= in bnx2x_link_status_update()
4843 params->feature_config_flags &= in bnx2x_link_status_update()
4847 params->link_attr_sync = SHMEM2_RD(bp, in bnx2x_link_status_update()
4848 link_attr_sync[params->port]); in bnx2x_link_status_update()
4856 static void bnx2x_set_master_ln(struct link_params *params, in bnx2x_set_master_ln() argument
4859 struct bnx2x *bp = params->bp; in bnx2x_set_master_ln()
4861 ser_lane = ((params->lane_config & in bnx2x_set_master_ln()
4877 static int bnx2x_reset_unicore(struct link_params *params, in bnx2x_reset_unicore() argument
4881 struct bnx2x *bp = params->bp; in bnx2x_reset_unicore()
4895 bnx2x_set_serdes_access(bp, params->port); in bnx2x_reset_unicore()
4915 params->port); in bnx2x_reset_unicore()
4921 static void bnx2x_set_swap_lanes(struct link_params *params, in bnx2x_set_swap_lanes() argument
4924 struct bnx2x *bp = params->bp; in bnx2x_set_swap_lanes()
4930 rx_lane_swap = ((params->lane_config & in bnx2x_set_swap_lanes()
4933 tx_lane_swap = ((params->lane_config & in bnx2x_set_swap_lanes()
4964 struct link_params *params) in bnx2x_set_parallel_detection() argument
4966 struct bnx2x *bp = params->bp; in bnx2x_set_parallel_detection()
5017 struct link_params *params, in bnx2x_set_autoneg() argument
5021 struct bnx2x *bp = params->bp; in bnx2x_set_autoneg()
5121 struct link_params *params, in bnx2x_program_serdes() argument
5124 struct bnx2x *bp = params->bp; in bnx2x_program_serdes()
5170 struct link_params *params) in bnx2x_set_brcm_cl37_advertisement() argument
5172 struct bnx2x *bp = params->bp; in bnx2x_set_brcm_cl37_advertisement()
5190 struct link_params *params, in bnx2x_set_ieee_aneg_advertisement() argument
5193 struct bnx2x *bp = params->bp; in bnx2x_set_ieee_aneg_advertisement()
5211 struct link_params *params, in bnx2x_restart_autoneg() argument
5214 struct bnx2x *bp = params->bp; in bnx2x_restart_autoneg()
5251 struct link_params *params, in bnx2x_initialize_sgmii_process() argument
5254 struct bnx2x *bp = params->bp; in bnx2x_initialize_sgmii_process()
5316 bnx2x_restart_autoneg(phy, params, 0); in bnx2x_initialize_sgmii_process()
5323 struct link_params *params) in bnx2x_direct_parallel_detect_used() argument
5325 struct bnx2x *bp = params->bp; in bnx2x_direct_parallel_detect_used()
5339 params->port); in bnx2x_direct_parallel_detect_used()
5350 params->port); in bnx2x_direct_parallel_detect_used()
5357 struct link_params *params, in bnx2x_update_adv_fc() argument
5364 struct bnx2x *bp = params->bp; in bnx2x_update_adv_fc()
5404 struct link_params *params, in bnx2x_flow_ctrl_resolve() argument
5408 struct bnx2x *bp = params->bp; in bnx2x_flow_ctrl_resolve()
5415 bnx2x_update_adv_fc(phy, params, vars, gp_status); in bnx2x_flow_ctrl_resolve()
5419 vars->flow_ctrl = params->req_fc_auto_adv; in bnx2x_flow_ctrl_resolve()
5422 if (bnx2x_direct_parallel_detect_used(phy, params)) { in bnx2x_flow_ctrl_resolve()
5423 vars->flow_ctrl = params->req_fc_auto_adv; in bnx2x_flow_ctrl_resolve()
5426 bnx2x_update_adv_fc(phy, params, vars, gp_status); in bnx2x_flow_ctrl_resolve()
5432 struct link_params *params) in bnx2x_check_fallback_to_cl37() argument
5434 struct bnx2x *bp = params->bp; in bnx2x_check_fallback_to_cl37()
5495 bnx2x_restart_autoneg(phy, params, 0); in bnx2x_check_fallback_to_cl37()
5500 struct link_params *params, in bnx2x_xgxs_an_resolve() argument
5508 if (bnx2x_direct_parallel_detect_used(phy, params)) in bnx2x_xgxs_an_resolve()
5513 struct link_params *params, in bnx2x_get_link_speed_duplex() argument
5519 struct bnx2x *bp = params->bp; in bnx2x_get_link_speed_duplex()
5604 struct link_params *params, in bnx2x_link_settings_status() argument
5607 struct bnx2x *bp = params->bp; in bnx2x_link_settings_status()
5624 rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, speed_mask, in bnx2x_link_settings_status()
5630 if (SINGLE_MEDIA_DIRECT(params)) { in bnx2x_link_settings_status()
5632 bnx2x_flow_ctrl_resolve(phy, params, vars, gp_status); in bnx2x_link_settings_status()
5634 bnx2x_xgxs_an_resolve(phy, params, vars, in bnx2x_link_settings_status()
5639 SINGLE_MEDIA_DIRECT(params)) { in bnx2x_link_settings_status()
5641 bnx2x_check_fallback_to_cl37(phy, params); in bnx2x_link_settings_status()
5646 if (SINGLE_MEDIA_DIRECT(params) && in bnx2x_link_settings_status()
5678 struct link_params *params, in bnx2x_warpcore_read_status() argument
5681 struct bnx2x *bp = params->bp; in bnx2x_warpcore_read_status()
5685 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_read_status()
5687 if ((params->loopback_mode) && in bnx2x_warpcore_read_status()
5705 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_warpcore_read_status()
5724 if (link_up && SINGLE_MEDIA_DIRECT(params)) { in bnx2x_warpcore_read_status()
5743 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_warpcore_read_status()
5749 SINGLE_MEDIA_DIRECT(params)) { in bnx2x_warpcore_read_status()
5790 rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, gp_speed, in bnx2x_warpcore_read_status()
5802 static void bnx2x_set_gmii_tx_driver(struct link_params *params) in bnx2x_set_gmii_tx_driver() argument
5804 struct bnx2x *bp = params->bp; in bnx2x_set_gmii_tx_driver()
5805 struct bnx2x_phy *phy = ¶ms->phy[INT_PHY]; in bnx2x_set_gmii_tx_driver()
5841 static int bnx2x_emac_program(struct link_params *params, in bnx2x_emac_program() argument
5844 struct bnx2x *bp = params->bp; in bnx2x_emac_program()
5845 u8 port = params->port; in bnx2x_emac_program()
5884 bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed); in bnx2x_emac_program()
5889 struct link_params *params) in bnx2x_set_preemphasis() argument
5893 struct bnx2x *bp = params->bp; in bnx2x_set_preemphasis()
5913 struct link_params *params, in bnx2x_xgxs_config_init() argument
5916 struct bnx2x *bp = params->bp; in bnx2x_xgxs_config_init()
5917 u8 enable_cl73 = (SINGLE_MEDIA_DIRECT(params) || in bnx2x_xgxs_config_init()
5918 (params->loopback_mode == LOOPBACK_XGXS)); in bnx2x_xgxs_config_init()
5920 if (SINGLE_MEDIA_DIRECT(params) && in bnx2x_xgxs_config_init()
5921 (params->feature_config_flags & in bnx2x_xgxs_config_init()
5923 bnx2x_set_preemphasis(phy, params); in bnx2x_xgxs_config_init()
5927 (SINGLE_MEDIA_DIRECT(params) && in bnx2x_xgxs_config_init()
5928 params->loopback_mode == LOOPBACK_EXT)) { in bnx2x_xgxs_config_init()
5932 bnx2x_set_autoneg(phy, params, vars, 0); in bnx2x_xgxs_config_init()
5935 bnx2x_program_serdes(phy, params, vars); in bnx2x_xgxs_config_init()
5941 bnx2x_set_brcm_cl37_advertisement(phy, params); in bnx2x_xgxs_config_init()
5944 bnx2x_set_ieee_aneg_advertisement(phy, params, in bnx2x_xgxs_config_init()
5948 bnx2x_set_autoneg(phy, params, vars, enable_cl73); in bnx2x_xgxs_config_init()
5951 bnx2x_restart_autoneg(phy, params, enable_cl73); in bnx2x_xgxs_config_init()
5957 bnx2x_initialize_sgmii_process(phy, params, vars); in bnx2x_xgxs_config_init()
5962 struct link_params *params, in bnx2x_prepare_xgxs() argument
5980 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); in bnx2x_prepare_xgxs()
5981 bnx2x_set_aer_mmd(params, phy); in bnx2x_prepare_xgxs()
5983 bnx2x_set_master_ln(params, phy); in bnx2x_prepare_xgxs()
5985 rc = bnx2x_reset_unicore(params, phy, 0); in bnx2x_prepare_xgxs()
5990 bnx2x_set_aer_mmd(params, phy); in bnx2x_prepare_xgxs()
5993 bnx2x_set_master_ln(params, phy); in bnx2x_prepare_xgxs()
5994 bnx2x_set_swap_lanes(params, phy); in bnx2x_prepare_xgxs()
6002 struct link_params *params) in bnx2x_wait_reset_complete() argument
6022 params->port); in bnx2x_wait_reset_complete()
6027 static void bnx2x_link_int_enable(struct link_params *params) in bnx2x_link_int_enable() argument
6029 u8 port = params->port; in bnx2x_link_int_enable()
6031 struct bnx2x *bp = params->bp; in bnx2x_link_int_enable()
6036 if (!(SINGLE_MEDIA_DIRECT(params))) in bnx2x_link_int_enable()
6038 } else if (params->switch_cfg == SWITCH_CFG_10G) { in bnx2x_link_int_enable()
6042 if (!(SINGLE_MEDIA_DIRECT(params)) && in bnx2x_link_int_enable()
6043 params->phy[INT_PHY].type != in bnx2x_link_int_enable()
6052 if (!(SINGLE_MEDIA_DIRECT(params)) && in bnx2x_link_int_enable()
6053 params->phy[INT_PHY].type != in bnx2x_link_int_enable()
6064 (params->switch_cfg == SWITCH_CFG_10G), in bnx2x_link_int_enable()
6109 static void bnx2x_link_int_ack(struct link_params *params, in bnx2x_link_int_ack() argument
6112 struct bnx2x *bp = params->bp; in bnx2x_link_int_ack()
6113 u8 port = params->port; in bnx2x_link_int_ack()
6128 else if (params->switch_cfg == SWITCH_CFG_10G) { in bnx2x_link_int_ack()
6133 ((params->lane_config & in bnx2x_link_int_ack()
6195 int bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 *version, in bnx2x_get_ext_phy_fw_version() argument
6203 if (version == NULL || params == NULL) in bnx2x_get_ext_phy_fw_version()
6205 bp = params->bp; in bnx2x_get_ext_phy_fw_version()
6209 spirom_ver = REG_RD(bp, params->phy[EXT_PHY1].ver_addr); in bnx2x_get_ext_phy_fw_version()
6211 if (params->phy[EXT_PHY1].format_fw_ver) { in bnx2x_get_ext_phy_fw_version()
6212 status |= params->phy[EXT_PHY1].format_fw_ver(spirom_ver, in bnx2x_get_ext_phy_fw_version()
6217 if ((params->num_phys == MAX_PHYS) && in bnx2x_get_ext_phy_fw_version()
6218 (params->phy[EXT_PHY2].ver_addr != 0)) { in bnx2x_get_ext_phy_fw_version()
6219 spirom_ver = REG_RD(bp, params->phy[EXT_PHY2].ver_addr); in bnx2x_get_ext_phy_fw_version()
6220 if (params->phy[EXT_PHY2].format_fw_ver) { in bnx2x_get_ext_phy_fw_version()
6224 status |= params->phy[EXT_PHY2].format_fw_ver( in bnx2x_get_ext_phy_fw_version()
6236 struct link_params *params) in bnx2x_set_xgxs_loopback() argument
6238 u8 port = params->port; in bnx2x_set_xgxs_loopback()
6239 struct bnx2x *bp = params->bp; in bnx2x_set_xgxs_loopback()
6268 bnx2x_set_aer_mmd(params, phy); in bnx2x_set_xgxs_loopback()
6290 int bnx2x_set_led(struct link_params *params, in bnx2x_set_led() argument
6293 u8 port = params->port; in bnx2x_set_led()
6294 u16 hw_led_mode = params->hw_led_mode; in bnx2x_set_led()
6299 struct bnx2x *bp = params->bp; in bnx2x_set_led()
6305 if (params->phy[phy_idx].set_link_led) { in bnx2x_set_led()
6306 params->phy[phy_idx].set_link_led( in bnx2x_set_led()
6307 ¶ms->phy[phy_idx], params, mode); in bnx2x_set_led()
6319 if (params->phy[EXT_PHY1].type == in bnx2x_set_led()
6337 if (((params->phy[EXT_PHY1].type == in bnx2x_set_led()
6339 (params->phy[EXT_PHY1].type == in bnx2x_set_led()
6341 CHIP_IS_E2(bp) && params->num_phys == 2) { in bnx2x_set_led()
6359 } else if (SINGLE_MEDIA_DIRECT(params)) { in bnx2x_set_led()
6375 } else if ((params->phy[EXT_PHY1].type == in bnx2x_set_led()
6387 u32 nig_led_mode = ((params->hw_led_mode << in bnx2x_set_led()
6438 int bnx2x_test_link(struct link_params *params, struct link_vars *vars, in bnx2x_test_link() argument
6441 struct bnx2x *bp = params->bp; in bnx2x_test_link()
6445 struct bnx2x_phy *int_phy = ¶ms->phy[INT_PHY]; in bnx2x_test_link()
6449 if (params->req_line_speed[LINK_CONFIG_IDX(INT_PHY)] in bnx2x_test_link()
6459 u8 lane = bnx2x_get_warpcore_lane(int_phy, params); in bnx2x_test_link()
6479 if (params->loopback_mode == LOOPBACK_XGXS) in bnx2x_test_link()
6482 switch (params->num_phys) { in bnx2x_test_link()
6487 ext_phy_link_up = params->phy[EXT_PHY1].read_status( in bnx2x_test_link()
6488 ¶ms->phy[EXT_PHY1], in bnx2x_test_link()
6489 params, &temp_vars); in bnx2x_test_link()
6492 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_test_link()
6494 serdes_phy_type = ((params->phy[phy_index].media_type == in bnx2x_test_link()
6496 (params->phy[phy_index].media_type == in bnx2x_test_link()
6498 (params->phy[phy_index].media_type == in bnx2x_test_link()
6500 (params->phy[phy_index].media_type == in bnx2x_test_link()
6505 if (params->phy[phy_index].read_status) { in bnx2x_test_link()
6507 params->phy[phy_index].read_status( in bnx2x_test_link()
6508 ¶ms->phy[phy_index], in bnx2x_test_link()
6509 params, &temp_vars); in bnx2x_test_link()
6519 static int bnx2x_link_initialize(struct link_params *params, in bnx2x_link_initialize() argument
6523 struct bnx2x *bp = params->bp; in bnx2x_link_initialize()
6529 vars->line_speed = params->phy[INT_PHY].req_line_speed; in bnx2x_link_initialize()
6536 bnx2x_prepare_xgxs(¶ms->phy[INT_PHY], params, vars); in bnx2x_link_initialize()
6538 non_ext_phy = (SINGLE_MEDIA_DIRECT(params) || in bnx2x_link_initialize()
6539 (params->loopback_mode == LOOPBACK_XGXS)); in bnx2x_link_initialize()
6542 (params->phy[EXT_PHY1].flags & FLAGS_INIT_XGXS_FIRST) || in bnx2x_link_initialize()
6543 (params->loopback_mode == LOOPBACK_EXT_PHY)) { in bnx2x_link_initialize()
6544 struct bnx2x_phy *phy = ¶ms->phy[INT_PHY]; in bnx2x_link_initialize()
6548 bnx2x_set_parallel_detection(phy, params); in bnx2x_link_initialize()
6549 if (params->phy[INT_PHY].config_init) in bnx2x_link_initialize()
6550 params->phy[INT_PHY].config_init(phy, params, vars); in bnx2x_link_initialize()
6556 vars->line_speed = params->phy[INT_PHY].req_line_speed; in bnx2x_link_initialize()
6560 if (params->phy[INT_PHY].supported & in bnx2x_link_initialize()
6564 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_link_initialize()
6571 if (params->phy[phy_index].supported & in bnx2x_link_initialize()
6576 (bnx2x_phy_selection(params) == in bnx2x_link_initialize()
6582 params->phy[phy_index].config_init( in bnx2x_link_initialize()
6583 ¶ms->phy[phy_index], in bnx2x_link_initialize()
6584 params, vars); in bnx2x_link_initialize()
6589 params->port*4, in bnx2x_link_initialize()
6598 struct link_params *params) in bnx2x_int_link_reset() argument
6601 REG_WR(params->bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, in bnx2x_int_link_reset()
6602 (0x1ff << (params->port*16))); in bnx2x_int_link_reset()
6606 struct link_params *params) in bnx2x_common_ext_link_reset() argument
6608 struct bnx2x *bp = params->bp; in bnx2x_common_ext_link_reset()
6614 gpio_port = params->port; in bnx2x_common_ext_link_reset()
6624 static int bnx2x_update_link_down(struct link_params *params, in bnx2x_update_link_down() argument
6627 struct bnx2x *bp = params->bp; in bnx2x_update_link_down()
6628 u8 port = params->port; in bnx2x_update_link_down()
6631 bnx2x_set_led(params, vars, LED_MODE_OFF, 0); in bnx2x_update_link_down()
6639 bnx2x_update_mng(params, vars->link_status); in bnx2x_update_link_down()
6652 bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 0); in bnx2x_update_link_down()
6656 REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), in bnx2x_update_link_down()
6658 REG_WR(bp, MISC_REG_CPMU_LP_MASK_ENT_P0 + (params->port << 2), in bnx2x_update_link_down()
6663 bnx2x_update_mng_eee(params, vars->eee_status); in bnx2x_update_link_down()
6664 bnx2x_set_xmac_rxtx(params, 0); in bnx2x_update_link_down()
6665 bnx2x_set_umac_rxtx(params, 0); in bnx2x_update_link_down()
6671 static int bnx2x_update_link_up(struct link_params *params, in bnx2x_update_link_up() argument
6675 struct bnx2x *bp = params->bp; in bnx2x_update_link_up()
6676 u8 phy_idx, port = params->port; in bnx2x_update_link_up()
6692 if (bnx2x_xmac_enable(params, vars, 0) == in bnx2x_update_link_up()
6700 bnx2x_umac_enable(params, vars, 0); in bnx2x_update_link_up()
6701 bnx2x_set_led(params, vars, in bnx2x_update_link_up()
6708 (params->port << 2), 1); in bnx2x_update_link_up()
6711 (params->port << 2), 0xfc20); in bnx2x_update_link_up()
6717 if (bnx2x_bmac_enable(params, vars, 0, 1) == in bnx2x_update_link_up()
6725 bnx2x_set_led(params, vars, in bnx2x_update_link_up()
6728 rc = bnx2x_emac_program(params, vars); in bnx2x_update_link_up()
6729 bnx2x_emac_enable(params, vars, 0); in bnx2x_update_link_up()
6735 SINGLE_MEDIA_DIRECT(params)) in bnx2x_update_link_up()
6736 bnx2x_set_gmii_tx_driver(params); in bnx2x_update_link_up()
6742 rc |= bnx2x_pbf_update(params, vars->flow_ctrl, in bnx2x_update_link_up()
6749 bnx2x_update_mng(params, vars->link_status); in bnx2x_update_link_up()
6750 bnx2x_update_mng_eee(params, vars->eee_status); in bnx2x_update_link_up()
6753 if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) { in bnx2x_update_link_up()
6754 bnx2x_check_half_open_conn(params, vars, 0); in bnx2x_update_link_up()
6762 static void bnx2x_chng_link_count(struct link_params *params, bool clear) in bnx2x_chng_link_count() argument
6764 struct bnx2x *bp = params->bp; in bnx2x_chng_link_count()
6771 addr = params->shmem2_base + in bnx2x_chng_link_count()
6772 offsetof(struct shmem2_region, link_change_count[params->port]); in bnx2x_chng_link_count()
6792 int bnx2x_link_update(struct link_params *params, struct link_vars *vars) in bnx2x_link_update() argument
6794 struct bnx2x *bp = params->bp; in bnx2x_link_update()
6796 u8 port = params->port; in bnx2x_link_update()
6806 for (phy_index = INT_PHY; phy_index < params->num_phys; in bnx2x_link_update()
6820 bnx2x_set_aer_mmd(params, ¶ms->phy[INT_PHY]); in bnx2x_link_update()
6848 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_link_update()
6850 struct bnx2x_phy *phy = ¶ms->phy[phy_index]; in bnx2x_link_update()
6854 cur_link_up = phy->read_status(phy, params, in bnx2x_link_update()
6869 switch (bnx2x_phy_selection(params)) { in bnx2x_link_update()
6895 params->multi_phy_config); in bnx2x_link_update()
6908 if (params->phy[INT_PHY].read_status) in bnx2x_link_update()
6909 params->phy[INT_PHY].read_status( in bnx2x_link_update()
6910 ¶ms->phy[INT_PHY], in bnx2x_link_update()
6911 params, vars); in bnx2x_link_update()
6930 if (params->phy[EXT_PHY2].phy_specific_func) { in bnx2x_link_update()
6933 params->phy[EXT_PHY2].phy_specific_func( in bnx2x_link_update()
6934 ¶ms->phy[EXT_PHY2], in bnx2x_link_update()
6935 params, DISABLE_TX); in bnx2x_link_update()
6941 if (params->phy[active_external_phy].supported & in bnx2x_link_update()
6953 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_link_update()
6955 if (params->phy[phy_index].flags & in bnx2x_link_update()
6972 if (!(SINGLE_MEDIA_DIRECT(params)) && ext_phy_link_up && in bnx2x_link_update()
6980 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, in bnx2x_link_update()
6989 bnx2x_link_int_ack(params, vars, link_10g_plus); in bnx2x_link_update()
6998 if (!(SINGLE_MEDIA_DIRECT(params))) { in bnx2x_link_update()
7002 params->phy[EXT_PHY1].flags & in bnx2x_link_update()
7004 if (!(params->phy[EXT_PHY1].flags & in bnx2x_link_update()
7013 if (params->phy[INT_PHY].config_init) in bnx2x_link_update()
7014 params->phy[INT_PHY].config_init( in bnx2x_link_update()
7015 ¶ms->phy[INT_PHY], params, in bnx2x_link_update()
7024 SINGLE_MEDIA_DIRECT(params)) && in bnx2x_link_update()
7028 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_link_update()
7034 rc = bnx2x_update_link_up(params, vars, link_10g_plus); in bnx2x_link_update()
7036 rc = bnx2x_update_link_down(params, vars); in bnx2x_link_update()
7039 bnx2x_chng_link_count(params, false); in bnx2x_link_update()
7042 if (params->feature_config_flags & FEATURE_CONFIG_BC_SUPPORTS_AFEX) in bnx2x_link_update()
7105 struct link_params *params, in bnx2x_8073_resolve_fc() argument
7108 struct bnx2x *bp = params->bp; in bnx2x_8073_resolve_fc()
7115 if (bnx2x_ext_phy_resolve_fc(phy, params, vars) && in bnx2x_8073_resolve_fc()
7313 static void bnx2x_8073_set_pause_cl37(struct link_params *params, in bnx2x_8073_set_pause_cl37() argument
7318 struct bnx2x *bp = params->bp; in bnx2x_8073_set_pause_cl37()
7324 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); in bnx2x_8073_set_pause_cl37()
7349 struct link_params *params, in bnx2x_8073_specific_func() argument
7352 struct bnx2x *bp = params->bp; in bnx2x_8073_specific_func()
7365 struct link_params *params, in bnx2x_8073_config_init() argument
7368 struct bnx2x *bp = params->bp; in bnx2x_8073_config_init()
7376 gpio_port = params->port; in bnx2x_8073_config_init()
7384 bnx2x_8073_specific_func(phy, params, PHY_INIT); in bnx2x_8073_config_init()
7385 bnx2x_8073_set_pause_cl37(params, phy, vars); in bnx2x_8073_config_init()
7396 if (params->lane_config & PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) { in bnx2x_8073_config_init()
7411 if (REG_RD(bp, params->shmem_base + in bnx2x_8073_config_init()
7413 port_hw_config[params->port].default_cfg)) & in bnx2x_8073_config_init()
7424 if (params->loopback_mode == LOOPBACK_EXT) { in bnx2x_8073_config_init()
7502 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_8073_config_init()
7513 struct link_params *params, in bnx2x_8073_read_status() argument
7516 struct bnx2x *bp = params->bp; in bnx2x_8073_read_status()
7597 params->port); in bnx2x_8073_read_status()
7602 params->port); in bnx2x_8073_read_status()
7607 params->port); in bnx2x_8073_read_status()
7611 params->port); in bnx2x_8073_read_status()
7616 if (params->lane_config & in bnx2x_8073_read_status()
7638 bnx2x_8073_resolve_fc(phy, params, vars); in bnx2x_8073_read_status()
7658 struct link_params *params) in bnx2x_8073_link_reset() argument
7660 struct bnx2x *bp = params->bp; in bnx2x_8073_link_reset()
7665 gpio_port = params->port; in bnx2x_8073_link_reset()
7677 struct link_params *params, in bnx2x_8705_config_init() argument
7680 struct bnx2x *bp = params->bp; in bnx2x_8705_config_init()
7684 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); in bnx2x_8705_config_init()
7686 bnx2x_ext_phy_hw_reset(bp, params->port); in bnx2x_8705_config_init()
7688 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8705_config_init()
7699 bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0); in bnx2x_8705_config_init()
7704 struct link_params *params, in bnx2x_8705_read_status() argument
7709 struct bnx2x *bp = params->bp; in bnx2x_8705_read_status()
7731 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_8705_read_status()
7739 static void bnx2x_set_disable_pmd_transmit(struct link_params *params, in bnx2x_set_disable_pmd_transmit() argument
7743 struct bnx2x *bp = params->bp; in bnx2x_set_disable_pmd_transmit()
7748 if (params->feature_config_flags & in bnx2x_set_disable_pmd_transmit()
7762 static u8 bnx2x_get_gpio_port(struct link_params *params) in bnx2x_get_gpio_port() argument
7766 struct bnx2x *bp = params->bp; in bnx2x_get_gpio_port()
7770 gpio_port = params->port; in bnx2x_get_gpio_port()
7776 static void bnx2x_sfp_e1e2_set_transmitter(struct link_params *params, in bnx2x_sfp_e1e2_set_transmitter() argument
7781 u8 port = params->port; in bnx2x_sfp_e1e2_set_transmitter()
7782 struct bnx2x *bp = params->bp; in bnx2x_sfp_e1e2_set_transmitter()
7786 tx_en_mode = REG_RD(bp, params->shmem_base + in bnx2x_sfp_e1e2_set_transmitter()
7823 gpio_port = bnx2x_get_gpio_port(params); in bnx2x_sfp_e1e2_set_transmitter()
7833 static void bnx2x_sfp_set_transmitter(struct link_params *params, in bnx2x_sfp_set_transmitter() argument
7837 struct bnx2x *bp = params->bp; in bnx2x_sfp_set_transmitter()
7840 bnx2x_sfp_e3_set_transmitter(params, phy, tx_en); in bnx2x_sfp_set_transmitter()
7842 bnx2x_sfp_e1e2_set_transmitter(params, phy, tx_en); in bnx2x_sfp_set_transmitter()
7846 struct link_params *params, in bnx2x_8726_read_sfp_module_eeprom() argument
7850 struct bnx2x *bp = params->bp; in bnx2x_8726_read_sfp_module_eeprom()
7912 static void bnx2x_warpcore_power_module(struct link_params *params, in bnx2x_warpcore_power_module() argument
7916 struct bnx2x *bp = params->bp; in bnx2x_warpcore_power_module()
7918 pin_cfg = (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_power_module()
7920 dev_info.port_hw_config[params->port].e3_sfp_ctrl)) & in bnx2x_warpcore_power_module()
7934 struct link_params *params, in bnx2x_warpcore_read_sfp_module_eeprom() argument
7943 struct bnx2x *bp = params->bp; in bnx2x_warpcore_read_sfp_module_eeprom()
7955 bnx2x_warpcore_power_module(params, 0); in bnx2x_warpcore_read_sfp_module_eeprom()
7958 bnx2x_warpcore_power_module(params, 1); in bnx2x_warpcore_read_sfp_module_eeprom()
7960 rc = bnx2x_bsc_read(params, bp, dev_addr, addr32, 0, byte_cnt, in bnx2x_warpcore_read_sfp_module_eeprom()
7975 struct link_params *params, in bnx2x_8727_read_sfp_module_eeprom() argument
7979 struct bnx2x *bp = params->bp; in bnx2x_8727_read_sfp_module_eeprom()
8070 struct link_params *params, u8 dev_addr, in bnx2x_read_sfp_module_eeprom() argument
8074 struct bnx2x *bp = params->bp; in bnx2x_read_sfp_module_eeprom()
8102 rc = read_func(phy, params, dev_addr, addr, xfer_size, in bnx2x_read_sfp_module_eeprom()
8112 struct link_params *params, in bnx2x_get_edc_mode() argument
8115 struct bnx2x *bp = params->bp; in bnx2x_get_edc_mode()
8122 params, in bnx2x_get_edc_mode()
8130 params->link_attr_sync &= ~LINK_SFP_EEPROM_COMP_CODE_MASK; in bnx2x_get_edc_mode()
8131 params->link_attr_sync |= val[SFP_EEPROM_10G_COMP_CODE_ADDR] << in bnx2x_get_edc_mode()
8133 bnx2x_update_link_attr(params, params->link_attr_sync); in bnx2x_get_edc_mode()
8180 u8 gport = params->port; in bnx2x_get_edc_mode()
8184 (params->port << 1); in bnx2x_get_edc_mode()
8192 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_get_edc_mode()
8194 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_get_edc_mode()
8200 if (params->phy[idx].type == phy->type) { in bnx2x_get_edc_mode()
8206 phy->req_line_speed = params->req_line_speed[cfg_idx]; in bnx2x_get_edc_mode()
8214 sync_offset = params->shmem_base + in bnx2x_get_edc_mode()
8216 dev_info.port_hw_config[params->port].media_type); in bnx2x_get_edc_mode()
8220 if (&(params->phy[phy_idx]) == phy) { in bnx2x_get_edc_mode()
8233 params, in bnx2x_get_edc_mode()
8254 struct link_params *params) in bnx2x_verify_sfp_module() argument
8256 struct bnx2x *bp = params->bp; in bnx2x_verify_sfp_module()
8262 val = REG_RD(bp, params->shmem_base + in bnx2x_verify_sfp_module()
8264 port_feature_config[params->port].config)); in bnx2x_verify_sfp_module()
8271 if (params->feature_config_flags & in bnx2x_verify_sfp_module()
8275 } else if (params->feature_config_flags & in bnx2x_verify_sfp_module()
8278 if (DUAL_MEDIA(params)) { in bnx2x_verify_sfp_module()
8300 params, in bnx2x_verify_sfp_module()
8309 params, in bnx2x_verify_sfp_module()
8320 params->port, vendor_name, vendor_pn); in bnx2x_verify_sfp_module()
8328 struct link_params *params) in bnx2x_wait_for_sfp_module_initialized() argument
8333 struct bnx2x *bp = params->bp; in bnx2x_wait_for_sfp_module_initialized()
8342 phy, params, I2C_DEV_ADDR_A0, 1, 1, &val, in bnx2x_wait_for_sfp_module_initialized()
8345 rc = bnx2x_read_sfp_module_eeprom(phy, params, in bnx2x_wait_for_sfp_module_initialized()
8356 rc = bnx2x_read_sfp_module_eeprom(phy, params, I2C_DEV_ADDR_A0, in bnx2x_wait_for_sfp_module_initialized()
8477 struct link_params *params, in bnx2x_8727_specific_func() argument
8480 struct bnx2x *bp = params->bp; in bnx2x_8727_specific_func()
8484 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_8727_specific_func()
8488 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_8727_specific_func()
8522 static void bnx2x_set_e1e2_module_fault_led(struct link_params *params, in bnx2x_set_e1e2_module_fault_led() argument
8525 struct bnx2x *bp = params->bp; in bnx2x_set_e1e2_module_fault_led()
8527 u32 fault_led_gpio = REG_RD(bp, params->shmem_base + in bnx2x_set_e1e2_module_fault_led()
8529 dev_info.port_hw_config[params->port].sfp_ctrl)) & in bnx2x_set_e1e2_module_fault_led()
8539 u8 gpio_port = bnx2x_get_gpio_port(params); in bnx2x_set_e1e2_module_fault_led()
8554 static void bnx2x_set_e3_module_fault_led(struct link_params *params, in bnx2x_set_e3_module_fault_led() argument
8558 u8 port = params->port; in bnx2x_set_e3_module_fault_led()
8559 struct bnx2x *bp = params->bp; in bnx2x_set_e3_module_fault_led()
8560 pin_cfg = (REG_RD(bp, params->shmem_base + in bnx2x_set_e3_module_fault_led()
8570 static void bnx2x_set_sfp_module_fault_led(struct link_params *params, in bnx2x_set_sfp_module_fault_led() argument
8573 struct bnx2x *bp = params->bp; in bnx2x_set_sfp_module_fault_led()
8579 bnx2x_set_e3_module_fault_led(params, gpio_mode); in bnx2x_set_sfp_module_fault_led()
8581 bnx2x_set_e1e2_module_fault_led(params, gpio_mode); in bnx2x_set_sfp_module_fault_led()
8585 struct link_params *params) in bnx2x_warpcore_hw_reset() argument
8587 struct bnx2x *bp = params->bp; in bnx2x_warpcore_hw_reset()
8588 bnx2x_warpcore_power_module(params, 0); in bnx2x_warpcore_hw_reset()
8598 static void bnx2x_power_sfp_module(struct link_params *params, in bnx2x_power_sfp_module() argument
8602 struct bnx2x *bp = params->bp; in bnx2x_power_sfp_module()
8608 bnx2x_8727_power_module(params->bp, phy, power); in bnx2x_power_sfp_module()
8611 bnx2x_warpcore_power_module(params, power); in bnx2x_power_sfp_module()
8617 static void bnx2x_warpcore_set_limiting_mode(struct link_params *params, in bnx2x_warpcore_set_limiting_mode() argument
8623 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_limiting_mode()
8625 u8 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_set_limiting_mode()
8657 static void bnx2x_set_limiting_mode(struct link_params *params, in bnx2x_set_limiting_mode() argument
8663 bnx2x_8726_set_limiting_mode(params->bp, phy, edc_mode); in bnx2x_set_limiting_mode()
8667 bnx2x_8727_set_limiting_mode(params->bp, phy, edc_mode); in bnx2x_set_limiting_mode()
8670 bnx2x_warpcore_set_limiting_mode(params, phy, edc_mode); in bnx2x_set_limiting_mode()
8676 struct link_params *params) in bnx2x_sfp_module_detection() argument
8678 struct bnx2x *bp = params->bp; in bnx2x_sfp_module_detection()
8682 u32 val = REG_RD(bp, params->shmem_base + in bnx2x_sfp_module_detection()
8684 port_feature_config[params->port].config)); in bnx2x_sfp_module_detection()
8686 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_sfp_module_detection()
8688 params->port); in bnx2x_sfp_module_detection()
8690 bnx2x_power_sfp_module(params, phy, 1); in bnx2x_sfp_module_detection()
8691 if (bnx2x_get_edc_mode(phy, params, &edc_mode) != 0) { in bnx2x_sfp_module_detection()
8694 } else if (bnx2x_verify_sfp_module(phy, params) != 0) { in bnx2x_sfp_module_detection()
8699 bnx2x_set_sfp_module_fault_led(params, in bnx2x_sfp_module_detection()
8706 bnx2x_power_sfp_module(params, phy, 0); in bnx2x_sfp_module_detection()
8711 bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW); in bnx2x_sfp_module_detection()
8717 bnx2x_set_limiting_mode(params, phy, edc_mode); in bnx2x_sfp_module_detection()
8725 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_sfp_module_detection()
8730 void bnx2x_handle_module_detect_int(struct link_params *params) in bnx2x_handle_module_detect_int() argument
8732 struct bnx2x *bp = params->bp; in bnx2x_handle_module_detect_int()
8737 phy = ¶ms->phy[INT_PHY]; in bnx2x_handle_module_detect_int()
8739 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_handle_module_detect_int()
8741 phy = ¶ms->phy[EXT_PHY1]; in bnx2x_handle_module_detect_int()
8743 if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base, in bnx2x_handle_module_detect_int()
8744 params->port, &gpio_num, &gpio_port) == in bnx2x_handle_module_detect_int()
8751 bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_HIGH); in bnx2x_handle_module_detect_int()
8758 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_handle_module_detect_int()
8759 bnx2x_set_aer_mmd(params, phy); in bnx2x_handle_module_detect_int()
8761 bnx2x_power_sfp_module(params, phy, 1); in bnx2x_handle_module_detect_int()
8765 if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0) { in bnx2x_handle_module_detect_int()
8766 bnx2x_sfp_module_detection(phy, params); in bnx2x_handle_module_detect_int()
8778 (params->link_flags & in bnx2x_handle_module_detect_int()
8781 bnx2x_warpcore_config_sfi(phy, params); in bnx2x_handle_module_detect_int()
8826 struct link_params *params, in bnx2x_8706_8726_read_status() argument
8831 struct bnx2x *bp = params->bp; in bnx2x_8706_8726_read_status()
8867 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_8706_8726_read_status()
8888 struct link_params *params, in bnx2x_8706_config_init() argument
8893 struct bnx2x *bp = params->bp; in bnx2x_8706_config_init()
8896 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); in bnx2x_8706_config_init()
8898 bnx2x_ext_phy_hw_reset(bp, params->port); in bnx2x_8706_config_init()
8900 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8706_config_init()
8911 if ((params->feature_config_flags & in bnx2x_8706_config_init()
8970 bnx2x_save_bcm_spirom_ver(bp, phy, params->port); in bnx2x_8706_config_init()
8976 tx_en_mode = REG_RD(bp, params->shmem_base + in bnx2x_8706_config_init()
8978 dev_info.port_hw_config[params->port].sfp_ctrl)) in bnx2x_8706_config_init()
8994 struct link_params *params, in bnx2x_8706_read_status() argument
8997 return bnx2x_8706_8726_read_status(phy, params, vars); in bnx2x_8706_read_status()
9004 struct link_params *params) in bnx2x_8726_config_loopback() argument
9006 struct bnx2x *bp = params->bp; in bnx2x_8726_config_loopback()
9012 struct link_params *params) in bnx2x_8726_external_rom_boot() argument
9014 struct bnx2x *bp = params->bp; in bnx2x_8726_external_rom_boot()
9046 bnx2x_save_bcm_spirom_ver(bp, phy, params->port); in bnx2x_8726_external_rom_boot()
9050 struct link_params *params, in bnx2x_8726_read_status() argument
9053 struct bnx2x *bp = params->bp; in bnx2x_8726_read_status()
9055 u8 link_up = bnx2x_8706_8726_read_status(phy, params, vars); in bnx2x_8726_read_status()
9071 struct link_params *params, in bnx2x_8726_config_init() argument
9074 struct bnx2x *bp = params->bp; in bnx2x_8726_config_init()
9078 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8726_config_init()
9080 bnx2x_8726_external_rom_boot(phy, params); in bnx2x_8726_config_init()
9087 bnx2x_sfp_module_detection(phy, params); in bnx2x_8726_config_init()
9108 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_8726_config_init()
9134 if ((params->feature_config_flags & in bnx2x_8726_config_init()
9156 struct link_params *params) in bnx2x_8726_link_reset() argument
9158 struct bnx2x *bp = params->bp; in bnx2x_8726_link_reset()
9159 DP(NETIF_MSG_LINK, "bnx2x_8726_link_reset port %d\n", params->port); in bnx2x_8726_link_reset()
9171 struct link_params *params, u8 mode) in bnx2x_8727_set_link_led() argument
9173 struct bnx2x *bp = params->bp; in bnx2x_8727_set_link_led()
9217 struct link_params *params) { in bnx2x_8727_hw_reset() argument
9223 struct bnx2x *bp = params->bp; in bnx2x_8727_hw_reset()
9232 struct link_params *params) in bnx2x_8727_config_speed() argument
9234 struct bnx2x *bp = params->bp; in bnx2x_8727_config_speed()
9250 if (DUAL_MEDIA(params)) { in bnx2x_8727_config_speed()
9289 struct link_params *params, in bnx2x_8727_config_init() argument
9294 struct bnx2x *bp = params->bp; in bnx2x_8727_config_init()
9297 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8727_config_init()
9301 bnx2x_8727_specific_func(phy, params, PHY_INIT); in bnx2x_8727_config_init()
9318 bnx2x_set_disable_pmd_transmit(params, phy, 0); in bnx2x_8727_config_init()
9328 bnx2x_8727_config_speed(phy, params); in bnx2x_8727_config_init()
9332 if ((params->feature_config_flags & in bnx2x_8727_config_init()
9349 tx_en_mode = REG_RD(bp, params->shmem_base + in bnx2x_8727_config_init()
9351 dev_info.port_hw_config[params->port].sfp_ctrl)) in bnx2x_8727_config_init()
9375 struct link_params *params) in bnx2x_8727_handle_mod_abs() argument
9377 struct bnx2x *bp = params->bp; in bnx2x_8727_handle_mod_abs()
9379 u32 val = REG_RD(bp, params->shmem_base + in bnx2x_8727_handle_mod_abs()
9381 port_feature_config[params->port]. in bnx2x_8727_handle_mod_abs()
9443 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_8727_handle_mod_abs()
9445 if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0) in bnx2x_8727_handle_mod_abs()
9446 bnx2x_sfp_module_detection(phy, params); in bnx2x_8727_handle_mod_abs()
9451 bnx2x_8727_config_speed(phy, params); in bnx2x_8727_handle_mod_abs()
9460 struct link_params *params, in bnx2x_8727_read_status() argument
9464 struct bnx2x *bp = params->bp; in bnx2x_8727_read_status()
9465 u8 link_up = 0, oc_port = params->port; in bnx2x_8727_read_status()
9506 oc_port = BP_PATH(bp) + (params->port << 1); in bnx2x_8727_read_status()
9535 bnx2x_8727_power_module(params->bp, phy, 0); in bnx2x_8727_read_status()
9542 bnx2x_8727_handle_mod_abs(phy, params); in bnx2x_8727_read_status()
9551 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_8727_read_status()
9568 params->port); in bnx2x_8727_read_status()
9573 params->port); in bnx2x_8727_read_status()
9577 params->port); in bnx2x_8727_read_status()
9594 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_8727_read_status()
9599 if ((DUAL_MEDIA(params)) && in bnx2x_8727_read_status()
9619 struct link_params *params) in bnx2x_8727_link_reset() argument
9621 struct bnx2x *bp = params->bp; in bnx2x_8727_link_reset()
9624 bnx2x_set_disable_pmd_transmit(params, phy, 1); in bnx2x_8727_link_reset()
9627 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_8727_link_reset()
9746 struct link_params *params, in bnx2x_848xx_specific_func() argument
9749 struct bnx2x *bp = params->bp; in bnx2x_848xx_specific_func()
9755 bnx2x_save_848xx_spirom_version(phy, bp, params->port); in bnx2x_848xx_specific_func()
9761 bnx2x_bits_en(bp, NIG_REG_LATCH_BC_0 + params->port*4, in bnx2x_848xx_specific_func()
9770 struct link_params *params, in bnx2x_848xx_cmn_config_init() argument
9773 struct bnx2x *bp = params->bp; in bnx2x_848xx_cmn_config_init()
9776 bnx2x_848xx_specific_func(phy, params, PHY_INIT); in bnx2x_848xx_cmn_config_init()
9785 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_848xx_cmn_config_init()
9917 struct link_params *params, in bnx2x_8481_config_init() argument
9920 struct bnx2x *bp = params->bp; in bnx2x_8481_config_init()
9923 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); in bnx2x_8481_config_init()
9926 bnx2x_ext_phy_hw_reset(bp, params->port); in bnx2x_8481_config_init()
9927 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8481_config_init()
9930 return bnx2x_848xx_cmn_config_init(phy, params, vars); in bnx2x_8481_config_init()
9936 struct link_params *params, u16 fw_cmd, in bnx2x_84833_cmd_hdlr() argument
9941 struct bnx2x *bp = params->bp; in bnx2x_84833_cmd_hdlr()
9992 struct link_params *params, in bnx2x_84833_pair_swap_cfg() argument
9998 struct bnx2x *bp = params->bp; in bnx2x_84833_pair_swap_cfg()
10001 pair_swap = REG_RD(bp, params->shmem_base + in bnx2x_84833_pair_swap_cfg()
10003 dev_info.port_hw_config[params->port].xgbt_phy_cfg)) & in bnx2x_84833_pair_swap_cfg()
10012 status = bnx2x_84833_cmd_hdlr(phy, params, in bnx2x_84833_pair_swap_cfg()
10059 struct link_params *params) in bnx2x_84833_hw_reset_phy() argument
10061 struct bnx2x *bp = params->bp; in bnx2x_84833_hw_reset_phy()
10063 u32 other_shmem_base_addr = REG_RD(bp, params->shmem2_base + in bnx2x_84833_hw_reset_phy()
10077 shmem_base_path[0] = params->shmem_base; in bnx2x_84833_hw_reset_phy()
10081 params->chip_id); in bnx2x_84833_hw_reset_phy()
10092 struct link_params *params, in bnx2x_8483x_disable_eee() argument
10096 struct bnx2x *bp = params->bp; in bnx2x_8483x_disable_eee()
10102 rc = bnx2x_84833_cmd_hdlr(phy, params, in bnx2x_8483x_disable_eee()
10109 return bnx2x_eee_disable(phy, params, vars); in bnx2x_8483x_disable_eee()
10113 struct link_params *params, in bnx2x_8483x_enable_eee() argument
10117 struct bnx2x *bp = params->bp; in bnx2x_8483x_enable_eee()
10120 rc = bnx2x_84833_cmd_hdlr(phy, params, in bnx2x_8483x_enable_eee()
10127 return bnx2x_eee_advertise(phy, params, vars, SHMEM_EEE_10G_ADV); in bnx2x_8483x_enable_eee()
10132 struct link_params *params, in bnx2x_848x3_config_init() argument
10135 struct bnx2x *bp = params->bp; in bnx2x_848x3_config_init()
10147 port = params->port; in bnx2x_848x3_config_init()
10160 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_848x3_config_init()
10172 bnx2x_set_autoneg(¶ms->phy[INT_PHY], params, vars, 0); in bnx2x_848x3_config_init()
10173 bnx2x_program_serdes(¶ms->phy[INT_PHY], params, vars); in bnx2x_848x3_config_init()
10193 actual_phy_selection = bnx2x_phy_selection(params); in bnx2x_848x3_config_init()
10213 if (params->phy[EXT_PHY2].req_line_speed == SPEED_1000) in bnx2x_848x3_config_init()
10219 params->multi_phy_config, val); in bnx2x_848x3_config_init()
10223 bnx2x_84833_pair_swap_cfg(phy, params, vars); in bnx2x_848x3_config_init()
10230 rc = bnx2x_84833_cmd_hdlr(phy, params, in bnx2x_848x3_config_init()
10237 rc = bnx2x_848xx_cmn_config_init(phy, params, vars); in bnx2x_848x3_config_init()
10239 bnx2x_save_848xx_spirom_version(phy, bp, params->port); in bnx2x_848x3_config_init()
10242 u32 cms_enable = REG_RD(bp, params->shmem_base + in bnx2x_848x3_config_init()
10244 dev_info.port_hw_config[params->port].default_cfg)) & in bnx2x_848x3_config_init()
10263 bnx2x_eee_has_cap(params)) { in bnx2x_848x3_config_init()
10264 rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_10G_ADV); in bnx2x_848x3_config_init()
10267 bnx2x_8483x_disable_eee(phy, params, vars); in bnx2x_848x3_config_init()
10272 (params->eee_mode & EEE_MODE_ADV_LPI) && in bnx2x_848x3_config_init()
10273 (bnx2x_eee_calc_timer(params) || in bnx2x_848x3_config_init()
10274 !(params->eee_mode & EEE_MODE_ENABLE_LPI))) in bnx2x_848x3_config_init()
10275 rc = bnx2x_8483x_enable_eee(phy, params, vars); in bnx2x_848x3_config_init()
10277 rc = bnx2x_8483x_disable_eee(phy, params, vars); in bnx2x_848x3_config_init()
10298 struct link_params *params, in bnx2x_848xx_read_status() argument
10301 struct bnx2x *bp = params->bp; in bnx2x_848xx_read_status()
10380 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_848xx_read_status()
10421 bnx2x_eee_an_resolve(phy, params, vars); in bnx2x_848xx_read_status()
10437 struct link_params *params) in bnx2x_8481_hw_reset() argument
10439 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, in bnx2x_8481_hw_reset()
10441 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, in bnx2x_8481_hw_reset()
10446 struct link_params *params) in bnx2x_8481_link_reset() argument
10448 bnx2x_cl45_write(params->bp, phy, in bnx2x_8481_link_reset()
10450 bnx2x_cl45_write(params->bp, phy, in bnx2x_8481_link_reset()
10455 struct link_params *params) in bnx2x_848x3_link_reset() argument
10457 struct bnx2x *bp = params->bp; in bnx2x_848x3_link_reset()
10464 port = params->port; in bnx2x_848x3_link_reset()
10482 struct link_params *params, u8 mode) in bnx2x_848xx_set_link_led() argument
10484 struct bnx2x *bp = params->bp; in bnx2x_848xx_set_link_led()
10491 port = params->port; in bnx2x_848xx_set_link_led()
10498 if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == in bnx2x_848xx_set_link_led()
10534 if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == in bnx2x_848xx_set_link_led()
10569 params->port*4) & in bnx2x_848xx_set_link_led()
10571 params->link_flags |= in bnx2x_848xx_set_link_led()
10577 params->port*4, in bnx2x_848xx_set_link_led()
10591 if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == in bnx2x_848xx_set_link_led()
10637 params->port*4) & in bnx2x_848xx_set_link_led()
10639 params->link_flags |= in bnx2x_848xx_set_link_led()
10645 params->port*4, in bnx2x_848xx_set_link_led()
10660 if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == in bnx2x_848xx_set_link_led()
10705 val = ((params->hw_led_mode << in bnx2x_848xx_set_link_led()
10734 if (params->link_flags & in bnx2x_848xx_set_link_led()
10736 bnx2x_link_int_enable(params); in bnx2x_848xx_set_link_led()
10737 params->link_flags &= in bnx2x_848xx_set_link_led()
10758 struct link_params *params, in bnx2x_54618se_specific_func() argument
10761 struct bnx2x *bp = params->bp; in bnx2x_54618se_specific_func()
10787 struct link_params *params, in bnx2x_54618se_config_init() argument
10790 struct bnx2x *bp = params->bp; in bnx2x_54618se_config_init()
10801 port = params->port; in bnx2x_54618se_config_init()
10803 cfg_pin = (REG_RD(bp, params->shmem_base + in bnx2x_54618se_config_init()
10818 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_54618se_config_init()
10824 bnx2x_54618se_specific_func(phy, params, PHY_INIT); in bnx2x_54618se_config_init()
10839 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); in bnx2x_54618se_config_init()
10931 if ((phy->flags & FLAGS_EEE) && bnx2x_eee_has_cap(params)) { in bnx2x_54618se_config_init()
10941 rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_1G_ADV); in bnx2x_54618se_config_init()
10944 bnx2x_eee_disable(phy, params, vars); in bnx2x_54618se_config_init()
10945 } else if ((params->eee_mode & EEE_MODE_ADV_LPI) && in bnx2x_54618se_config_init()
10947 (bnx2x_eee_calc_timer(params) || in bnx2x_54618se_config_init()
10948 !(params->eee_mode & EEE_MODE_ENABLE_LPI))) { in bnx2x_54618se_config_init()
10954 bnx2x_eee_advertise(phy, params, vars, in bnx2x_54618se_config_init()
10958 bnx2x_eee_disable(phy, params, vars); in bnx2x_54618se_config_init()
10966 if (params->feature_config_flags & in bnx2x_54618se_config_init()
10994 struct link_params *params, u8 mode) in bnx2x_5461x_set_link_led() argument
10996 struct bnx2x *bp = params->bp; in bnx2x_5461x_set_link_led()
11030 struct link_params *params) in bnx2x_54618se_link_reset() argument
11032 struct bnx2x *bp = params->bp; in bnx2x_54618se_link_reset()
11043 port = params->port; in bnx2x_54618se_link_reset()
11044 cfg_pin = (REG_RD(bp, params->shmem_base + in bnx2x_54618se_link_reset()
11055 struct link_params *params, in bnx2x_54618se_read_status() argument
11058 struct bnx2x *bp = params->bp; in bnx2x_54618se_read_status()
11123 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_54618se_read_status()
11154 bnx2x_eee_has_cap(params)) in bnx2x_54618se_read_status()
11155 bnx2x_eee_an_resolve(phy, params, vars); in bnx2x_54618se_read_status()
11162 struct link_params *params) in bnx2x_54618se_config_loopback() argument
11164 struct bnx2x *bp = params->bp; in bnx2x_54618se_config_loopback()
11166 u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; in bnx2x_54618se_config_loopback()
11193 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1); in bnx2x_54618se_config_loopback()
11205 struct link_params *params) in bnx2x_7101_config_loopback() argument
11207 struct bnx2x *bp = params->bp; in bnx2x_7101_config_loopback()
11214 struct link_params *params, in bnx2x_7101_config_init() argument
11218 struct bnx2x *bp = params->bp; in bnx2x_7101_config_init()
11223 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); in bnx2x_7101_config_init()
11225 bnx2x_ext_phy_hw_reset(bp, params->port); in bnx2x_7101_config_init()
11226 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_7101_config_init()
11234 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_7101_config_init()
11248 bnx2x_save_spirom_version(bp, params->port, in bnx2x_7101_config_init()
11254 struct link_params *params, in bnx2x_7101_read_status() argument
11257 struct bnx2x *bp = params->bp; in bnx2x_7101_read_status()
11283 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_7101_read_status()
11332 struct link_params *params) { in bnx2x_7101_hw_reset() argument
11334 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_2, in bnx2x_7101_hw_reset()
11335 MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); in bnx2x_7101_hw_reset()
11337 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, in bnx2x_7101_hw_reset()
11338 MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); in bnx2x_7101_hw_reset()
11342 struct link_params *params, u8 mode) in bnx2x_7101_set_link_led() argument
11345 struct bnx2x *bp = params->bp; in bnx2x_7101_set_link_led()
12198 static void bnx2x_phy_def_cfg(struct link_params *params, in bnx2x_phy_def_cfg() argument
12202 struct bnx2x *bp = params->bp; in bnx2x_phy_def_cfg()
12206 link_config = REG_RD(bp, params->shmem_base + in bnx2x_phy_def_cfg()
12208 port_feature_config[params->port].link_config2)); in bnx2x_phy_def_cfg()
12209 phy->speed_cap_mask = REG_RD(bp, params->shmem_base + in bnx2x_phy_def_cfg()
12212 port_hw_config[params->port].speed_capability_mask2)); in bnx2x_phy_def_cfg()
12214 link_config = REG_RD(bp, params->shmem_base + in bnx2x_phy_def_cfg()
12216 port_feature_config[params->port].link_config)); in bnx2x_phy_def_cfg()
12217 phy->speed_cap_mask = REG_RD(bp, params->shmem_base + in bnx2x_phy_def_cfg()
12220 port_hw_config[params->port].speed_capability_mask)); in bnx2x_phy_def_cfg()
12271 u32 bnx2x_phy_selection(struct link_params *params) in bnx2x_phy_selection() argument
12276 phy_config_swapped = params->multi_phy_config & in bnx2x_phy_selection()
12279 prio_cfg = params->multi_phy_config & in bnx2x_phy_selection()
12303 int bnx2x_phy_probe(struct link_params *params) in bnx2x_phy_probe() argument
12307 struct bnx2x *bp = params->bp; in bnx2x_phy_probe()
12309 params->num_phys = 0; in bnx2x_phy_probe()
12311 phy_config_swapped = params->multi_phy_config & in bnx2x_phy_probe()
12326 phy = ¶ms->phy[actual_phy_idx]; in bnx2x_phy_probe()
12327 if (bnx2x_populate_phy(bp, phy_index, params->shmem_base, in bnx2x_phy_probe()
12328 params->shmem2_base, params->port, in bnx2x_phy_probe()
12330 params->num_phys = 0; in bnx2x_phy_probe()
12342 if (params->feature_config_flags & in bnx2x_phy_probe()
12346 if (!(params->feature_config_flags & in bnx2x_phy_probe()
12350 sync_offset = params->shmem_base + in bnx2x_phy_probe()
12352 dev_info.port_hw_config[params->port].media_type); in bnx2x_phy_probe()
12369 bnx2x_phy_def_cfg(params, phy, phy_index); in bnx2x_phy_probe()
12370 params->num_phys++; in bnx2x_phy_probe()
12373 DP(NETIF_MSG_LINK, "End phy probe. #phys found %x\n", params->num_phys); in bnx2x_phy_probe()
12377 static void bnx2x_init_bmac_loopback(struct link_params *params, in bnx2x_init_bmac_loopback() argument
12380 struct bnx2x *bp = params->bp; in bnx2x_init_bmac_loopback()
12389 bnx2x_xgxs_deassert(params); in bnx2x_init_bmac_loopback()
12392 bnx2x_bmac_enable(params, vars, 1, 1); in bnx2x_init_bmac_loopback()
12394 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_bmac_loopback()
12397 static void bnx2x_init_emac_loopback(struct link_params *params, in bnx2x_init_emac_loopback() argument
12400 struct bnx2x *bp = params->bp; in bnx2x_init_emac_loopback()
12409 bnx2x_xgxs_deassert(params); in bnx2x_init_emac_loopback()
12411 bnx2x_emac_enable(params, vars, 1); in bnx2x_init_emac_loopback()
12412 bnx2x_emac_program(params, vars); in bnx2x_init_emac_loopback()
12413 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_emac_loopback()
12416 static void bnx2x_init_xmac_loopback(struct link_params *params, in bnx2x_init_xmac_loopback() argument
12419 struct bnx2x *bp = params->bp; in bnx2x_init_xmac_loopback()
12421 if (!params->req_line_speed[0]) in bnx2x_init_xmac_loopback()
12424 vars->line_speed = params->req_line_speed[0]; in bnx2x_init_xmac_loopback()
12432 bnx2x_set_aer_mmd(params, ¶ms->phy[0]); in bnx2x_init_xmac_loopback()
12433 bnx2x_warpcore_reset_lane(bp, ¶ms->phy[0], 0); in bnx2x_init_xmac_loopback()
12434 params->phy[INT_PHY].config_loopback( in bnx2x_init_xmac_loopback()
12435 ¶ms->phy[INT_PHY], in bnx2x_init_xmac_loopback()
12436 params); in bnx2x_init_xmac_loopback()
12438 bnx2x_xmac_enable(params, vars, 1); in bnx2x_init_xmac_loopback()
12439 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_xmac_loopback()
12442 static void bnx2x_init_umac_loopback(struct link_params *params, in bnx2x_init_umac_loopback() argument
12445 struct bnx2x *bp = params->bp; in bnx2x_init_umac_loopback()
12452 bnx2x_umac_enable(params, vars, 1); in bnx2x_init_umac_loopback()
12454 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_umac_loopback()
12457 static void bnx2x_init_xgxs_loopback(struct link_params *params, in bnx2x_init_xgxs_loopback() argument
12460 struct bnx2x *bp = params->bp; in bnx2x_init_xgxs_loopback()
12461 struct bnx2x_phy *int_phy = ¶ms->phy[INT_PHY]; in bnx2x_init_xgxs_loopback()
12465 if (params->req_line_speed[0] == SPEED_1000) in bnx2x_init_xgxs_loopback()
12467 else if ((params->req_line_speed[0] == SPEED_20000) || in bnx2x_init_xgxs_loopback()
12474 bnx2x_xgxs_deassert(params); in bnx2x_init_xgxs_loopback()
12475 bnx2x_link_initialize(params, vars); in bnx2x_init_xgxs_loopback()
12477 if (params->req_line_speed[0] == SPEED_1000) { in bnx2x_init_xgxs_loopback()
12479 bnx2x_umac_enable(params, vars, 0); in bnx2x_init_xgxs_loopback()
12481 bnx2x_emac_program(params, vars); in bnx2x_init_xgxs_loopback()
12482 bnx2x_emac_enable(params, vars, 0); in bnx2x_init_xgxs_loopback()
12486 bnx2x_xmac_enable(params, vars, 0); in bnx2x_init_xgxs_loopback()
12488 bnx2x_bmac_enable(params, vars, 0, 1); in bnx2x_init_xgxs_loopback()
12491 if (params->loopback_mode == LOOPBACK_XGXS) { in bnx2x_init_xgxs_loopback()
12493 int_phy->config_loopback(int_phy, params); in bnx2x_init_xgxs_loopback()
12498 phy_index < params->num_phys; phy_index++) in bnx2x_init_xgxs_loopback()
12499 if (params->phy[phy_index].config_loopback) in bnx2x_init_xgxs_loopback()
12500 params->phy[phy_index].config_loopback( in bnx2x_init_xgxs_loopback()
12501 ¶ms->phy[phy_index], in bnx2x_init_xgxs_loopback()
12502 params); in bnx2x_init_xgxs_loopback()
12504 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_xgxs_loopback()
12506 bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed); in bnx2x_init_xgxs_loopback()
12509 void bnx2x_set_rx_filter(struct link_params *params, u8 en) in bnx2x_set_rx_filter() argument
12511 struct bnx2x *bp = params->bp; in bnx2x_set_rx_filter()
12517 REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK + params->port*4, val); in bnx2x_set_rx_filter()
12520 REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK_MF + params->port*4, in bnx2x_set_rx_filter()
12524 REG_WR(bp, (params->port ? NIG_REG_LLH1_BRB1_NOT_MCP : in bnx2x_set_rx_filter()
12527 static int bnx2x_avoid_link_flap(struct link_params *params, in bnx2x_avoid_link_flap() argument
12532 struct bnx2x *bp = params->bp; in bnx2x_avoid_link_flap()
12534 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_avoid_link_flap()
12536 bnx2x_link_status_update(params, vars); in bnx2x_avoid_link_flap()
12543 for (phy_idx = INT_PHY; phy_idx < params->num_phys; phy_idx++) { in bnx2x_avoid_link_flap()
12544 struct bnx2x_phy *phy = ¶ms->phy[phy_idx]; in bnx2x_avoid_link_flap()
12547 phy->phy_specific_func(phy, params, PHY_INIT); in bnx2x_avoid_link_flap()
12552 bnx2x_verify_sfp_module(phy, params); in bnx2x_avoid_link_flap()
12554 lfa_sts = REG_RD(bp, params->lfa_base + in bnx2x_avoid_link_flap()
12566 params->port)); in bnx2x_avoid_link_flap()
12570 params->port)); in bnx2x_avoid_link_flap()
12573 bnx2x_umac_enable(params, vars, 0); in bnx2x_avoid_link_flap()
12575 bnx2x_xmac_enable(params, vars, 0); in bnx2x_avoid_link_flap()
12578 bnx2x_emac_enable(params, vars, 0); in bnx2x_avoid_link_flap()
12580 bnx2x_bmac_enable(params, vars, 0, !dont_clear_stat); in bnx2x_avoid_link_flap()
12591 REG_WR(bp, params->lfa_base + in bnx2x_avoid_link_flap()
12595 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_avoid_link_flap()
12598 bnx2x_link_int_enable(params); in bnx2x_avoid_link_flap()
12602 static void bnx2x_cannot_avoid_link_flap(struct link_params *params, in bnx2x_cannot_avoid_link_flap() argument
12607 struct bnx2x *bp = params->bp; in bnx2x_cannot_avoid_link_flap()
12609 bnx2x_link_reset(params, vars, 1); in bnx2x_cannot_avoid_link_flap()
12611 if (!params->lfa_base) in bnx2x_cannot_avoid_link_flap()
12614 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12616 params->req_duplex[0] | (params->req_duplex[1] << 16)); in bnx2x_cannot_avoid_link_flap()
12618 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12620 params->req_flow_ctrl[0] | (params->req_flow_ctrl[1] << 16)); in bnx2x_cannot_avoid_link_flap()
12622 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12624 params->req_line_speed[0] | (params->req_line_speed[1] << 16)); in bnx2x_cannot_avoid_link_flap()
12627 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12630 params->speed_cap_mask[cfg_idx]); in bnx2x_cannot_avoid_link_flap()
12633 tmp_val = REG_RD(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12636 tmp_val |= params->req_fc_auto_adv; in bnx2x_cannot_avoid_link_flap()
12638 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12641 lfa_sts = REG_RD(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12657 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12662 int bnx2x_phy_init(struct link_params *params, struct link_vars *vars) in bnx2x_phy_init() argument
12665 struct bnx2x *bp = params->bp; in bnx2x_phy_init()
12668 params->req_line_speed[0], params->req_flow_ctrl[0]); in bnx2x_phy_init()
12670 params->req_line_speed[1], params->req_flow_ctrl[1]); in bnx2x_phy_init()
12671 DP(NETIF_MSG_LINK, "req_adv_flow_ctrl 0x%x\n", params->req_fc_auto_adv); in bnx2x_phy_init()
12681 params->link_flags = PHY_INITIALIZED; in bnx2x_phy_init()
12683 bnx2x_set_rx_filter(params, 1); in bnx2x_phy_init()
12684 bnx2x_chng_link_count(params, true); in bnx2x_phy_init()
12686 lfa_status = bnx2x_check_lfa(params); in bnx2x_phy_init()
12690 return bnx2x_avoid_link_flap(params, vars); in bnx2x_phy_init()
12695 bnx2x_cannot_avoid_link_flap(params, vars, lfa_status); in bnx2x_phy_init()
12698 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4, in bnx2x_phy_init()
12704 bnx2x_emac_init(params, vars); in bnx2x_phy_init()
12706 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_phy_init()
12709 if (params->num_phys == 0) { in bnx2x_phy_init()
12713 set_phy_vars(params, vars); in bnx2x_phy_init()
12715 DP(NETIF_MSG_LINK, "Num of phys on board: %d\n", params->num_phys); in bnx2x_phy_init()
12716 switch (params->loopback_mode) { in bnx2x_phy_init()
12718 bnx2x_init_bmac_loopback(params, vars); in bnx2x_phy_init()
12721 bnx2x_init_emac_loopback(params, vars); in bnx2x_phy_init()
12724 bnx2x_init_xmac_loopback(params, vars); in bnx2x_phy_init()
12727 bnx2x_init_umac_loopback(params, vars); in bnx2x_phy_init()
12731 bnx2x_init_xgxs_loopback(params, vars); in bnx2x_phy_init()
12735 if (params->switch_cfg == SWITCH_CFG_10G) in bnx2x_phy_init()
12736 bnx2x_xgxs_deassert(params); in bnx2x_phy_init()
12738 bnx2x_serdes_deassert(bp, params->port); in bnx2x_phy_init()
12740 bnx2x_link_initialize(params, vars); in bnx2x_phy_init()
12742 bnx2x_link_int_enable(params); in bnx2x_phy_init()
12745 bnx2x_update_mng(params, vars->link_status); in bnx2x_phy_init()
12747 bnx2x_update_mng_eee(params, vars->eee_status); in bnx2x_phy_init()
12751 int bnx2x_link_reset(struct link_params *params, struct link_vars *vars, in bnx2x_link_reset() argument
12754 struct bnx2x *bp = params->bp; in bnx2x_link_reset()
12755 u8 phy_index, port = params->port, clear_latch_ind = 0; in bnx2x_link_reset()
12759 bnx2x_chng_link_count(params, true); in bnx2x_link_reset()
12760 bnx2x_update_mng(params, vars->link_status); in bnx2x_link_reset()
12763 bnx2x_update_mng_eee(params, vars->eee_status); in bnx2x_link_reset()
12780 bnx2x_set_bmac_rx(bp, params->chip_id, port, 0); in bnx2x_link_reset()
12782 bnx2x_set_xmac_rxtx(params, 0); in bnx2x_link_reset()
12783 bnx2x_set_umac_rxtx(params, 0); in bnx2x_link_reset()
12794 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_link_reset()
12795 bnx2x_set_led(params, vars, LED_MODE_OFF, 0); in bnx2x_link_reset()
12798 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_link_reset()
12800 if (params->phy[phy_index].link_reset) { in bnx2x_link_reset()
12801 bnx2x_set_aer_mmd(params, in bnx2x_link_reset()
12802 ¶ms->phy[phy_index]); in bnx2x_link_reset()
12803 params->phy[phy_index].link_reset( in bnx2x_link_reset()
12804 ¶ms->phy[phy_index], in bnx2x_link_reset()
12805 params); in bnx2x_link_reset()
12807 if (params->phy[phy_index].flags & in bnx2x_link_reset()
12819 if (params->phy[INT_PHY].link_reset) in bnx2x_link_reset()
12820 params->phy[INT_PHY].link_reset( in bnx2x_link_reset()
12821 ¶ms->phy[INT_PHY], params); in bnx2x_link_reset()
12831 u32 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; in bnx2x_link_reset()
12832 bnx2x_set_xumac_nig(params, 0, 0); in bnx2x_link_reset()
12842 int bnx2x_lfa_reset(struct link_params *params, in bnx2x_lfa_reset() argument
12845 struct bnx2x *bp = params->bp; in bnx2x_lfa_reset()
12848 params->link_flags &= ~PHY_INITIALIZED; in bnx2x_lfa_reset()
12849 if (!params->lfa_base) in bnx2x_lfa_reset()
12850 return bnx2x_link_reset(params, vars, 1); in bnx2x_lfa_reset()
12855 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1); in bnx2x_lfa_reset()
12862 bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 0); in bnx2x_lfa_reset()
12865 bnx2x_set_xmac_rxtx(params, 0); in bnx2x_lfa_reset()
12866 bnx2x_set_umac_rxtx(params, 0); in bnx2x_lfa_reset()
12874 bnx2x_set_rx_filter(params, 0); in bnx2x_lfa_reset()
12883 bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 1); in bnx2x_lfa_reset()
12886 bnx2x_set_xmac_rxtx(params, 1); in bnx2x_lfa_reset()
12887 bnx2x_set_umac_rxtx(params, 1); in bnx2x_lfa_reset()
12890 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_lfa_reset()
13328 static void bnx2x_check_over_curr(struct link_params *params, in bnx2x_check_over_curr() argument
13331 struct bnx2x *bp = params->bp; in bnx2x_check_over_curr()
13333 u8 port = params->port; in bnx2x_check_over_curr()
13336 cfg_pin = (REG_RD(bp, params->shmem_base + in bnx2x_check_over_curr()
13355 params->port); in bnx2x_check_over_curr()
13357 bnx2x_warpcore_power_module(params, 0); in bnx2x_check_over_curr()
13364 static u8 bnx2x_analyze_link_error(struct link_params *params, in bnx2x_analyze_link_error() argument
13368 struct bnx2x *bp = params->bp; in bnx2x_analyze_link_error()
13404 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1); in bnx2x_analyze_link_error()
13417 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_analyze_link_error()
13419 bnx2x_sync_link(params, vars); in bnx2x_analyze_link_error()
13421 bnx2x_set_led(params, vars, led_mode, SPEED_10000); in bnx2x_analyze_link_error()
13424 bnx2x_update_mng(params, vars->link_status); in bnx2x_analyze_link_error()
13443 static int bnx2x_check_half_open_conn(struct link_params *params, in bnx2x_check_half_open_conn() argument
13447 struct bnx2x *bp = params->bp; in bnx2x_check_half_open_conn()
13452 (REG_RD(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4))) in bnx2x_check_half_open_conn()
13463 mac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; in bnx2x_check_half_open_conn()
13473 bnx2x_analyze_link_error(params, vars, lss_status, in bnx2x_check_half_open_conn()
13477 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) { in bnx2x_check_half_open_conn()
13481 mac_base = params->port ? NIG_REG_INGRESS_BMAC1_MEM : in bnx2x_check_half_open_conn()
13492 bnx2x_analyze_link_error(params, vars, lss_status, in bnx2x_check_half_open_conn()
13499 struct link_params *params, in bnx2x_sfp_tx_fault_detection() argument
13502 struct bnx2x *bp = params->bp; in bnx2x_sfp_tx_fault_detection()
13504 u8 led_change, port = params->port; in bnx2x_sfp_tx_fault_detection()
13507 cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region, in bnx2x_sfp_tx_fault_detection()
13517 led_change = bnx2x_analyze_link_error(params, vars, value, in bnx2x_sfp_tx_fault_detection()
13537 bnx2x_set_e3_module_fault_led(params, led_mode); in bnx2x_sfp_tx_fault_detection()
13541 static void bnx2x_kr2_recovery(struct link_params *params, in bnx2x_kr2_recovery() argument
13545 struct bnx2x *bp = params->bp; in bnx2x_kr2_recovery()
13547 bnx2x_warpcore_enable_AN_KR2(phy, params, vars); in bnx2x_kr2_recovery()
13548 bnx2x_warpcore_restart_AN_KR(phy, params); in bnx2x_kr2_recovery()
13551 static void bnx2x_check_kr2_wa(struct link_params *params, in bnx2x_check_kr2_wa() argument
13555 struct bnx2x *bp = params->bp; in bnx2x_check_kr2_wa()
13569 sigdet = bnx2x_warpcore_get_sigdet(phy, params); in bnx2x_check_kr2_wa()
13571 if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { in bnx2x_check_kr2_wa()
13572 bnx2x_kr2_recovery(params, vars, phy); in bnx2x_check_kr2_wa()
13578 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_check_kr2_wa()
13585 bnx2x_set_aer_mmd(params, phy); in bnx2x_check_kr2_wa()
13589 if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { in bnx2x_check_kr2_wa()
13590 bnx2x_kr2_recovery(params, vars, phy); in bnx2x_check_kr2_wa()
13605 if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { in bnx2x_check_kr2_wa()
13609 bnx2x_kr2_recovery(params, vars, phy); in bnx2x_check_kr2_wa()
13617 bnx2x_disable_kr2(params, vars, phy); in bnx2x_check_kr2_wa()
13619 bnx2x_warpcore_restart_AN_KR(phy, params); in bnx2x_check_kr2_wa()
13624 void bnx2x_period_func(struct link_params *params, struct link_vars *vars) in bnx2x_period_func() argument
13627 struct bnx2x *bp = params->bp; in bnx2x_period_func()
13629 if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) { in bnx2x_period_func()
13630 bnx2x_set_aer_mmd(params, ¶ms->phy[phy_idx]); in bnx2x_period_func()
13631 if (bnx2x_check_half_open_conn(params, vars, 1) != in bnx2x_period_func()
13639 struct bnx2x_phy *phy = ¶ms->phy[INT_PHY]; in bnx2x_period_func()
13640 bnx2x_set_aer_mmd(params, phy); in bnx2x_period_func()
13643 bnx2x_check_kr2_wa(params, vars, phy); in bnx2x_period_func()
13644 bnx2x_check_over_curr(params, vars); in bnx2x_period_func()
13646 bnx2x_warpcore_config_runtime(phy, params, vars); in bnx2x_period_func()
13648 if ((REG_RD(bp, params->shmem_base + in bnx2x_period_func()
13650 port_hw_config[params->port].default_cfg)) in bnx2x_period_func()
13653 if (bnx2x_is_sfp_module_plugged(phy, params)) { in bnx2x_period_func()
13654 bnx2x_sfp_tx_fault_detection(phy, params, vars); in bnx2x_period_func()
13661 bnx2x_update_mng(params, vars->link_status); in bnx2x_period_func()
13688 void bnx2x_hw_reset_phy(struct link_params *params) in bnx2x_hw_reset_phy() argument
13691 struct bnx2x *bp = params->bp; in bnx2x_hw_reset_phy()
13692 bnx2x_update_mng(params, 0); in bnx2x_hw_reset_phy()
13693 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4, in bnx2x_hw_reset_phy()
13701 if (params->phy[phy_index].hw_reset) { in bnx2x_hw_reset_phy()
13702 params->phy[phy_index].hw_reset( in bnx2x_hw_reset_phy()
13703 ¶ms->phy[phy_index], in bnx2x_hw_reset_phy()
13704 params); in bnx2x_hw_reset_phy()
13705 params->phy[phy_index] = phy_null; in bnx2x_hw_reset_phy()