29 int cx18_av_write(struct cx18 *cx, u16 addr, u8 value)  in cx18_av_write()  argument
34 	u32 x = cx18_read_reg(cx, reg);  in cx18_av_write()
37 	cx18_write_reg(cx, x, reg);  in cx18_av_write()
41 int cx18_av_write_expect(struct cx18 *cx, u16 addr, u8 value, u8 eval, u8 mask)  in cx18_av_write_expect()  argument
45 	u32 x = cx18_read_reg(cx, reg);  in cx18_av_write_expect()
48 	cx18_write_reg_expect(cx, x, reg,  in cx18_av_write_expect()
53 int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value)  in cx18_av_write4()  argument
55 	cx18_write_reg(cx, value, 0xc40000 + addr);  in cx18_av_write4()
60 cx18_av_write4_expect(struct cx18 *cx, u16 addr, u32 value, u32 eval, u32 mask)  in cx18_av_write4_expect()  argument
62 	cx18_write_reg_expect(cx, value, 0xc40000 + addr, eval, mask);  in cx18_av_write4_expect()
66 int cx18_av_write4_noretry(struct cx18 *cx, u16 addr, u32 value)  in cx18_av_write4_noretry()  argument
68 	cx18_write_reg_noretry(cx, value, 0xc40000 + addr);  in cx18_av_write4_noretry()
72 u8 cx18_av_read(struct cx18 *cx, u16 addr)  in cx18_av_read()  argument
74 	u32 x = cx18_read_reg(cx, 0xc40000 + (addr & ~3));  in cx18_av_read()
80 u32 cx18_av_read4(struct cx18 *cx, u16 addr)  in cx18_av_read4()  argument
82 	return cx18_read_reg(cx, 0xc40000 + addr);  in cx18_av_read4()
85 int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask,  in cx18_av_and_or()  argument
88 	return cx18_av_write(cx, addr,  in cx18_av_and_or()
89 			     (cx18_av_read(cx, addr) & and_mask) |  in cx18_av_and_or()
93 int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask,  in cx18_av_and_or4()  argument
96 	return cx18_av_write4(cx, addr,  in cx18_av_and_or4()
97 			     (cx18_av_read4(cx, addr) & and_mask) |  in cx18_av_and_or4()
101 static void cx18_av_init(struct cx18 *cx)  in cx18_av_init()  argument
113 	cx18_av_write4(cx, CXADEC_PLL_CTRL1, 0x160e040f);  in cx18_av_init()
117 	cx18_av_write4(cx, CXADEC_VID_PLL_FRAC, 0x002be2fe);  in cx18_av_init()
121 	cx18_av_write4(cx, CXADEC_AUX_PLL_FRAC, 0x005227ad);  in cx18_av_init()
124 	cx18_av_write(cx, CXADEC_I2S_MCLK, 0x56);  in cx18_av_init()
130 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_initialize()  local
134 	cx18_av_loadfw(cx);  in cx18_av_initialize()
136 	cx18_av_write4_expect(cx, CXADEC_DL_CTL, 0x03000000,  in cx18_av_initialize()
140 	v = cx18_av_read4(cx, CXADEC_HOST_REG1);  in cx18_av_initialize()
142 	cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v | 1, v, 0xfffe);  in cx18_av_initialize()
144 	cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v & 0xfffe,  in cx18_av_initialize()
148 	v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF;  in cx18_av_initialize()
150 	cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v);  in cx18_av_initialize()
152 	cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100);  in cx18_av_initialize()
154 	v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF;  in cx18_av_initialize()
156 	cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v);  in cx18_av_initialize()
158 	cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100);  in cx18_av_initialize()
161 	cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL1, 0x000A1802);  in cx18_av_initialize()
163 	v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1;  in cx18_av_initialize()
165 	cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3, v, v, 0x03009F0F);  in cx18_av_initialize()
167 	cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3,  in cx18_av_initialize()
171 	cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x040C00);  in cx18_av_initialize()
174 	cx18_av_and_or4(cx, CXADEC_PIN_CTRL2, ~0, 0x2);  in cx18_av_initialize()
177 	cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0x8000);  in cx18_av_initialize()
178 	cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0);  in cx18_av_initialize()
195 	cx18_av_and_or4(cx, CXADEC_CHIP_CTRL, 0xFFFBFFFF, 0x00120000);  in cx18_av_initialize()
198 	cx18_av_init(cx);  in cx18_av_initialize()
203 	cx18_av_and_or4(cx, CXADEC_MODE_CTRL, 0xFFF7E7F0, 0x02040800);  in cx18_av_initialize()
207 	cx18_av_and_or4(cx, CXADEC_CRUSH_CTRL, ~0, 0x00500000);  in cx18_av_initialize()
210 	cx18_av_and_or4(cx, CXADEC_DFE_CTRL2, 0xFFFF00FF, 0x00002000);  in cx18_av_initialize()
219 	cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4013252e);  in cx18_av_initialize()
242 	cx18_av_and_or4(cx, CXADEC_AFE_CTRL, 0xFF000000, 0x00005D00);  in cx18_av_initialize()
249 	cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F);  in cx18_av_initialize()
250 	default_volume = cx18_av_read(cx, 0x8d4);  in cx18_av_initialize()
258 		cx18_av_write(cx, 0x8d4, 228);  in cx18_av_initialize()
262 		cx18_av_write(cx, 0x8d4, 20);  in cx18_av_initialize()
287 void cx18_av_std_setup(struct cx18 *cx)  in cx18_av_std_setup()  argument
289 	struct cx18_av_state *state = &cx->av_state;  in cx18_av_std_setup()
306 		cx18_av_write(cx, 0x49f, 0x11);  in cx18_av_std_setup()
308 		cx18_av_write(cx, 0x49f, 0x14);  in cx18_av_std_setup()
454 	pll_int = cx18_av_read(cx, 0x108);  in cx18_av_std_setup()
455 	pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff;  in cx18_av_std_setup()
456 	pll_post = cx18_av_read(cx, 0x109);  in cx18_av_std_setup()
492 	cx18_av_write(cx, 0x470, hblank);  in cx18_av_std_setup()
493 	cx18_av_write(cx, 0x471,  in cx18_av_std_setup()
495 	cx18_av_write(cx, 0x472, hactive >> 4);  in cx18_av_std_setup()
498 	cx18_av_write(cx, 0x473, burst);  in cx18_av_std_setup()
501 	cx18_av_write(cx, 0x474, vblank);  in cx18_av_std_setup()
502 	cx18_av_write(cx, 0x475,  in cx18_av_std_setup()
504 	cx18_av_write(cx, 0x476, vactive >> 4);  in cx18_av_std_setup()
505 	cx18_av_write(cx, 0x477, vblank656);  in cx18_av_std_setup()
508 	cx18_av_write(cx, 0x478, src_decimation & 0xff);  in cx18_av_std_setup()
509 	cx18_av_write(cx, 0x479, (src_decimation >> 8) & 0xff);  in cx18_av_std_setup()
512 	cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));  in cx18_av_std_setup()
515 	cx18_av_write(cx, 0x47b, comb);  in cx18_av_std_setup()
518 	cx18_av_write(cx, 0x47c, sc);  in cx18_av_std_setup()
519 	cx18_av_write(cx, 0x47d, (sc >> 8) & 0xff);  in cx18_av_std_setup()
520 	cx18_av_write(cx, 0x47e, (sc >> 16) & 0xff);  in cx18_av_std_setup()
529 	cx18_av_write(cx, 0x47f, state->slicer_line_delay);  in cx18_av_std_setup()
532 static void input_change(struct cx18 *cx)  in input_change()  argument
534 	struct cx18_av_state *state = &cx->av_state;  in input_change()
539 	cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);  in input_change()
540 	cx18_av_and_or(cx, 0x401, ~0x60, 0);  in input_change()
541 	cx18_av_and_or(cx, 0x401, ~0x60, 0x60);  in input_change()
546 			cx18_av_write_expect(cx, 0x808, 0xf7, 0xf7, 0xff);  in input_change()
547 			cx18_av_write_expect(cx, 0x80b, 0x02, 0x02, 0x3f);  in input_change()
550 			cx18_av_write_expect(cx, 0x808, 0xf8, 0xf8, 0xff);  in input_change()
551 			cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);  in input_change()
554 			cx18_av_write_expect(cx, 0x808, 0xf6, 0xf6, 0xff);  in input_change()
555 			cx18_av_write_expect(cx, 0x80b, 0x01, 0x01, 0x3f);  in input_change()
559 		cx18_av_write_expect(cx, 0x808, 0xff, 0xff, 0xff);  in input_change()
560 		cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);  in input_change()
563 		cx18_av_write_expect(cx, 0x808, 0xff, 0xff, 0xff);  in input_change()
564 		cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);  in input_change()
567 	v = cx18_av_read(cx, 0x803);  in input_change()
571 		cx18_av_write_expect(cx, 0x803, v, v, 0x1f);  in input_change()
573 		cx18_av_write_expect(cx, 0x803, v, v, 0x1f);  in input_change()
580 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_frequency()  local
581 	input_change(cx);  in cx18_av_s_frequency()
585 static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,  in set_input()  argument
588 	struct cx18_av_state *state = &cx->av_state;  in set_input()
692 	cx18_av_write_expect(cx, 0x103, afe_mux_cfg, afe_mux_cfg, 0xf7);  in set_input()
694 	cx18_av_and_or(cx, 0x401, ~0x6, input_mode);  in set_input()
697 	adc2_cfg = cx18_av_read(cx, 0x102);  in set_input()
708 	cx18_av_write_expect(cx, 0x102, adc2_cfg, adc2_cfg, 0x17);  in set_input()
711 	afe_cfg = cx18_av_read4(cx, CXADEC_AFE_CTRL);  in set_input()
749 	cx18_av_write4(cx, CXADEC_AFE_CTRL, afe_cfg);  in set_input()
753 	cx18_av_audio_set_path(cx);  in set_input()
754 	input_change(cx);  in set_input()
762 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_video_routing()  local
763 	return set_input(cx, input, state->aud_input);  in cx18_av_s_video_routing()
770 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_audio_routing()  local
771 	return set_input(cx, state->vid_input, input);  in cx18_av_s_audio_routing()
777 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_g_tuner()  local
785 	vpres = cx18_av_read(cx, 0x40e) & 0x20;  in cx18_av_g_tuner()
792 	mode = cx18_av_read(cx, 0x804);  in cx18_av_g_tuner()
814 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_tuner()  local
820 	v = cx18_av_read(cx, 0x809);  in cx18_av_s_tuner()
851 	cx18_av_write_expect(cx, 0x809, v, v, 0xff);  in cx18_av_s_tuner()
859 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_std()  local
901 		cx18_av_and_or(cx, 0x400, ~0xf, 1);  in cx18_av_s_std()
903 		cx18_av_and_or(cx, 0x47b, ~6, 0);  in cx18_av_s_std()
905 	cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20);  in cx18_av_s_std()
906 	cx18_av_and_or(cx, 0x403, ~0x3, pal_m);  in cx18_av_s_std()
907 	cx18_av_std_setup(cx);  in cx18_av_s_std()
908 	input_change(cx);  in cx18_av_s_std()
922 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_ctrl()  local
926 		cx18_av_write(cx, 0x414, ctrl->val - 128);  in cx18_av_s_ctrl()
930 		cx18_av_write(cx, 0x415, ctrl->val << 1);  in cx18_av_s_ctrl()
934 		cx18_av_write(cx, 0x420, ctrl->val << 1);  in cx18_av_s_ctrl()
935 		cx18_av_write(cx, 0x421, ctrl->val << 1);  in cx18_av_s_ctrl()
939 		cx18_av_write(cx, 0x422, ctrl->val);  in cx18_av_s_ctrl()
951 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_mbus_fmt()  local
961 	Vsrc = (cx18_av_read(cx, 0x476) & 0x3f) << 4;  in cx18_av_s_mbus_fmt()
962 	Vsrc |= (cx18_av_read(cx, 0x475) & 0xf0) >> 4;  in cx18_av_s_mbus_fmt()
964 	Hsrc = (cx18_av_read(cx, 0x472) & 0x3f) << 4;  in cx18_av_s_mbus_fmt()
965 	Hsrc |= (cx18_av_read(cx, 0x471) & 0xf0) >> 4;  in cx18_av_s_mbus_fmt()
1008 	cx18_av_write(cx, 0x418, HSC & 0xff);  in cx18_av_s_mbus_fmt()
1009 	cx18_av_write(cx, 0x419, (HSC >> 8) & 0xff);  in cx18_av_s_mbus_fmt()
1010 	cx18_av_write(cx, 0x41a, HSC >> 16);  in cx18_av_s_mbus_fmt()
1012 	cx18_av_write(cx, 0x41c, VSC & 0xff);  in cx18_av_s_mbus_fmt()
1013 	cx18_av_write(cx, 0x41d, VSC >> 8);  in cx18_av_s_mbus_fmt()
1015 	cx18_av_write(cx, 0x41e, 0x8 | filter);  in cx18_av_s_mbus_fmt()
1021 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_stream()  local
1025 		cx18_av_write(cx, 0x115, 0x8c);  in cx18_av_s_stream()
1026 		cx18_av_write(cx, 0x116, 0x07);  in cx18_av_s_stream()
1028 		cx18_av_write(cx, 0x115, 0x00);  in cx18_av_s_stream()
1029 		cx18_av_write(cx, 0x116, 0x00);  in cx18_av_s_stream()
1034 static void log_video_status(struct cx18 *cx)  in log_video_status()  argument
1045 	struct cx18_av_state *state = &cx->av_state;  in log_video_status()
1047 	u8 vidfmt_sel = cx18_av_read(cx, 0x400) & 0xf;  in log_video_status()
1048 	u8 gen_stat1 = cx18_av_read(cx, 0x40d);  in log_video_status()
1049 	u8 gen_stat2 = cx18_av_read(cx, 0x40e);  in log_video_status()
1076 static void log_audio_status(struct cx18 *cx)  in log_audio_status()  argument
1078 	struct cx18_av_state *state = &cx->av_state;  in log_audio_status()
1080 	u8 download_ctl = cx18_av_read(cx, 0x803);  in log_audio_status()
1081 	u8 mod_det_stat0 = cx18_av_read(cx, 0x804);  in log_audio_status()
1082 	u8 mod_det_stat1 = cx18_av_read(cx, 0x805);  in log_audio_status()
1083 	u8 audio_config = cx18_av_read(cx, 0x808);  in log_audio_status()
1084 	u8 pref_mode = cx18_av_read(cx, 0x809);  in log_audio_status()
1085 	u8 afc0 = cx18_av_read(cx, 0x80b);  in log_audio_status()
1086 	u8 mute_ctl = cx18_av_read(cx, 0x8d3);  in log_audio_status()
1227 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_log_status()  local
1228 	log_video_status(cx);  in cx18_av_log_status()
1229 	log_audio_status(cx);  in cx18_av_log_status()
1237 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_g_register()  local
1242 	reg->val = cx18_av_read4(cx, reg->reg & 0x00000ffc);  in cx18_av_g_register()
1249 	struct cx18 *cx = v4l2_get_subdevdata(sd);  in cx18_av_s_register()  local
1253 	cx18_av_write4(cx, reg->reg & 0x00000ffc, reg->val);  in cx18_av_s_register()
1306 int cx18_av_probe(struct cx18 *cx)  in cx18_av_probe()  argument
1308 	struct cx18_av_state *state = &cx->av_state;  in cx18_av_probe()
1312 	state->rev = cx18_av_read4(cx, CXADEC_CHIP_CTRL) & 0xffff;  in cx18_av_probe()
1323 	v4l2_set_subdevdata(sd, cx);  in cx18_av_probe()
1325 		 "%s %03x", cx->v4l2_dev.name, (state->rev >> 4));  in cx18_av_probe()
1359 	err = v4l2_device_register_subdev(&cx->v4l2_dev, sd);  in cx18_av_probe()
1363 		cx18_av_init(cx);  in cx18_av_probe()