279 			*value = rdev->config.cik.tile_config;  in radeon_info_ioctl()
281 			*value = rdev->config.si.tile_config;  in radeon_info_ioctl()
283 			*value = rdev->config.cayman.tile_config;  in radeon_info_ioctl()
285 			*value = rdev->config.evergreen.tile_config;  in radeon_info_ioctl()
287 			*value = rdev->config.rv770.tile_config;  in radeon_info_ioctl()
289 			*value = rdev->config.r600.tile_config;  in radeon_info_ioctl()
333 			*value = rdev->config.cik.max_backends_per_se *  in radeon_info_ioctl()
334 				rdev->config.cik.max_shader_engines;  in radeon_info_ioctl()
336 			*value = rdev->config.si.max_backends_per_se *  in radeon_info_ioctl()
337 				rdev->config.si.max_shader_engines;  in radeon_info_ioctl()
339 			*value = rdev->config.cayman.max_backends_per_se *  in radeon_info_ioctl()
340 				rdev->config.cayman.max_shader_engines;  in radeon_info_ioctl()
342 			*value = rdev->config.evergreen.max_backends;  in radeon_info_ioctl()
344 			*value = rdev->config.rv770.max_backends;  in radeon_info_ioctl()
346 			*value = rdev->config.r600.max_backends;  in radeon_info_ioctl()
353 			*value = rdev->config.cik.max_tile_pipes;  in radeon_info_ioctl()
355 			*value = rdev->config.si.max_tile_pipes;  in radeon_info_ioctl()
357 			*value = rdev->config.cayman.max_tile_pipes;  in radeon_info_ioctl()
359 			*value = rdev->config.evergreen.max_tile_pipes;  in radeon_info_ioctl()
361 			*value = rdev->config.rv770.max_tile_pipes;  in radeon_info_ioctl()
363 			*value = rdev->config.r600.max_tile_pipes;  in radeon_info_ioctl()
373 			*value = rdev->config.cik.backend_map;  in radeon_info_ioctl()
375 			*value = rdev->config.si.backend_map;  in radeon_info_ioctl()
377 			*value = rdev->config.cayman.backend_map;  in radeon_info_ioctl()
379 			*value = rdev->config.evergreen.backend_map;  in radeon_info_ioctl()
381 			*value = rdev->config.rv770.backend_map;  in radeon_info_ioctl()
383 			*value = rdev->config.r600.backend_map;  in radeon_info_ioctl()
402 			*value = rdev->config.cik.max_cu_per_sh;  in radeon_info_ioctl()
404 			*value = rdev->config.si.max_cu_per_sh;  in radeon_info_ioctl()
406 			*value = rdev->config.cayman.max_pipes_per_simd;  in radeon_info_ioctl()
408 			*value = rdev->config.evergreen.max_pipes;  in radeon_info_ioctl()
410 			*value = rdev->config.rv770.max_pipes;  in radeon_info_ioctl()
412 			*value = rdev->config.r600.max_pipes;  in radeon_info_ioctl()
428 			*value = rdev->config.cik.max_shader_engines;  in radeon_info_ioctl()
430 			*value = rdev->config.si.max_shader_engines;  in radeon_info_ioctl()
432 			*value = rdev->config.cayman.max_shader_engines;  in radeon_info_ioctl()
434 			*value = rdev->config.evergreen.num_ses;  in radeon_info_ioctl()
440 			*value = rdev->config.cik.max_sh_per_se;  in radeon_info_ioctl()
442 			*value = rdev->config.si.max_sh_per_se;  in radeon_info_ioctl()
475 			value = rdev->config.cik.tile_mode_array;  in radeon_info_ioctl()
478 			value = rdev->config.si.tile_mode_array;  in radeon_info_ioctl()
487 			value = rdev->config.cik.macrotile_mode_array;  in radeon_info_ioctl()
499 			*value = rdev->config.cik.backend_enable_mask;  in radeon_info_ioctl()
501 			*value = rdev->config.si.backend_enable_mask;  in radeon_info_ioctl()
536 			*value = rdev->config.cik.active_cus;  in radeon_info_ioctl()
538 			*value = rdev->config.si.active_cus;  in radeon_info_ioctl()
540 			*value = rdev->config.cayman.active_simds;  in radeon_info_ioctl()
542 			*value = rdev->config.evergreen.active_simds;  in radeon_info_ioctl()
544 			*value = rdev->config.rv770.active_simds;  in radeon_info_ioctl()
546 			*value = rdev->config.r600.active_simds;  in radeon_info_ioctl()