Lines Matching refs:device
61 nv50_identify(struct nvkm_device *device) in nv50_identify() argument
63 switch (device->chipset) { in nv50_identify()
65 device->cname = "G80"; in nv50_identify()
66 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
67 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass; in nv50_identify()
68 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; in nv50_identify()
69 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
70 device->oclass[NVDEV_SUBDEV_CLK ] = nv50_clk_oclass; in nv50_identify()
71 device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass; in nv50_identify()
72 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
73 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv50_devinit_oclass; in nv50_identify()
74 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; in nv50_identify()
75 device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass; in nv50_identify()
76 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
77 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass; in nv50_identify()
78 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
79 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
80 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
81 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
82 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
83 device->oclass[NVDEV_ENGINE_FIFO ] = nv50_fifo_oclass; in nv50_identify()
84 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
85 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
86 device->oclass[NVDEV_ENGINE_MPEG ] = &nv50_mpeg_oclass; in nv50_identify()
87 device->oclass[NVDEV_ENGINE_DISP ] = nv50_disp_oclass; in nv50_identify()
88 device->oclass[NVDEV_ENGINE_PM ] = nv50_pm_oclass; in nv50_identify()
91 device->cname = "G84"; in nv50_identify()
92 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
93 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass; in nv50_identify()
94 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; in nv50_identify()
95 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
96 device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; in nv50_identify()
97 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
98 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
99 device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; in nv50_identify()
100 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; in nv50_identify()
101 device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass; in nv50_identify()
102 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
103 device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass; in nv50_identify()
104 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
105 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
106 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
107 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
108 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
109 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
110 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
111 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
112 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; in nv50_identify()
113 device->oclass[NVDEV_ENGINE_VP ] = &g84_vp_oclass; in nv50_identify()
114 device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; in nv50_identify()
115 device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; in nv50_identify()
116 device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; in nv50_identify()
117 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
120 device->cname = "G86"; in nv50_identify()
121 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
122 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass; in nv50_identify()
123 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; in nv50_identify()
124 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
125 device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; in nv50_identify()
126 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
127 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
128 device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; in nv50_identify()
129 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; in nv50_identify()
130 device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass; in nv50_identify()
131 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
132 device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass; in nv50_identify()
133 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
134 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
135 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
136 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
137 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
138 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
139 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
140 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
141 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; in nv50_identify()
142 device->oclass[NVDEV_ENGINE_VP ] = &g84_vp_oclass; in nv50_identify()
143 device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; in nv50_identify()
144 device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; in nv50_identify()
145 device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; in nv50_identify()
146 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
149 device->cname = "G92"; in nv50_identify()
150 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
151 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass; in nv50_identify()
152 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; in nv50_identify()
153 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
154 device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; in nv50_identify()
155 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
156 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
157 device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; in nv50_identify()
158 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; in nv50_identify()
159 device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass; in nv50_identify()
160 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
161 device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass; in nv50_identify()
162 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
163 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
164 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
165 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
166 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
167 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
168 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
169 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
170 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; in nv50_identify()
171 device->oclass[NVDEV_ENGINE_VP ] = &g84_vp_oclass; in nv50_identify()
172 device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; in nv50_identify()
173 device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; in nv50_identify()
174 device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; in nv50_identify()
175 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
178 device->cname = "G94"; in nv50_identify()
179 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
180 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
181 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
182 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
183 device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; in nv50_identify()
184 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
185 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
186 device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; in nv50_identify()
187 device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass; in nv50_identify()
188 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
189 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
190 device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass; in nv50_identify()
191 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
192 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
193 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
194 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
195 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
196 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
197 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
198 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
199 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; in nv50_identify()
200 device->oclass[NVDEV_ENGINE_VP ] = &g84_vp_oclass; in nv50_identify()
201 device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; in nv50_identify()
202 device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; in nv50_identify()
203 device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; in nv50_identify()
204 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
207 device->cname = "G96"; in nv50_identify()
208 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
209 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
210 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
211 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
212 device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; in nv50_identify()
213 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
214 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
215 device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; in nv50_identify()
216 device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass; in nv50_identify()
217 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
218 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
219 device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass; in nv50_identify()
220 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
221 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
222 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
223 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
224 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
225 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
226 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
227 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
228 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; in nv50_identify()
229 device->oclass[NVDEV_ENGINE_VP ] = &g84_vp_oclass; in nv50_identify()
230 device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; in nv50_identify()
231 device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; in nv50_identify()
232 device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; in nv50_identify()
233 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
236 device->cname = "G98"; in nv50_identify()
237 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
238 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
239 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
240 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
241 device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; in nv50_identify()
242 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
243 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
244 device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; in nv50_identify()
245 device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; in nv50_identify()
246 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
247 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
248 device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass; in nv50_identify()
249 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
250 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
251 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
252 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
253 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
254 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
255 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
256 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
257 device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; in nv50_identify()
258 device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass; in nv50_identify()
259 device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; in nv50_identify()
260 device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; in nv50_identify()
261 device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; in nv50_identify()
262 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
265 device->cname = "G200"; in nv50_identify()
266 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
267 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
268 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; in nv50_identify()
269 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
270 device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; in nv50_identify()
271 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
272 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
273 device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; in nv50_identify()
274 device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; in nv50_identify()
275 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
276 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
277 device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass; in nv50_identify()
278 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
279 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
280 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
281 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
282 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
283 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
284 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
285 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
286 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; in nv50_identify()
287 device->oclass[NVDEV_ENGINE_VP ] = &g84_vp_oclass; in nv50_identify()
288 device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; in nv50_identify()
289 device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; in nv50_identify()
290 device->oclass[NVDEV_ENGINE_DISP ] = gt200_disp_oclass; in nv50_identify()
291 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
294 device->cname = "MCP77/MCP78"; in nv50_identify()
295 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
296 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
297 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
298 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
299 device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass; in nv50_identify()
300 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
301 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
302 device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; in nv50_identify()
303 device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; in nv50_identify()
304 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
305 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
306 device->oclass[NVDEV_SUBDEV_FB ] = mcp77_fb_oclass; in nv50_identify()
307 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
308 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
309 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
310 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
311 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
312 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
313 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
314 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
315 device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; in nv50_identify()
316 device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass; in nv50_identify()
317 device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; in nv50_identify()
318 device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; in nv50_identify()
319 device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; in nv50_identify()
320 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
323 device->cname = "MCP79/MCP7A"; in nv50_identify()
324 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
325 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
326 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
327 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
328 device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass; in nv50_identify()
329 device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; in nv50_identify()
330 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
331 device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; in nv50_identify()
332 device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; in nv50_identify()
333 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
334 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
335 device->oclass[NVDEV_SUBDEV_FB ] = mcp77_fb_oclass; in nv50_identify()
336 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
337 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
338 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
339 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
340 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
341 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
342 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
343 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
344 device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; in nv50_identify()
345 device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass; in nv50_identify()
346 device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; in nv50_identify()
347 device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; in nv50_identify()
348 device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; in nv50_identify()
349 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; in nv50_identify()
352 device->cname = "GT215"; in nv50_identify()
353 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
354 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
355 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
356 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
357 device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; in nv50_identify()
358 device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; in nv50_identify()
359 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
360 device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; in nv50_identify()
361 device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; in nv50_identify()
362 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
363 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
364 device->oclass[NVDEV_SUBDEV_FB ] = gt215_fb_oclass; in nv50_identify()
365 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
366 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
367 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
368 device->oclass[NVDEV_SUBDEV_PMU ] = gt215_pmu_oclass; in nv50_identify()
369 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
370 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
371 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
372 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
373 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
374 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; in nv50_identify()
375 device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; in nv50_identify()
376 device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; in nv50_identify()
377 device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; in nv50_identify()
378 device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; in nv50_identify()
379 device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; in nv50_identify()
380 device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass; in nv50_identify()
383 device->cname = "GT216"; in nv50_identify()
384 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
385 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
386 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
387 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
388 device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; in nv50_identify()
389 device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; in nv50_identify()
390 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
391 device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; in nv50_identify()
392 device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; in nv50_identify()
393 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
394 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
395 device->oclass[NVDEV_SUBDEV_FB ] = gt215_fb_oclass; in nv50_identify()
396 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
397 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
398 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
399 device->oclass[NVDEV_SUBDEV_PMU ] = gt215_pmu_oclass; in nv50_identify()
400 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
401 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
402 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
403 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
404 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
405 device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; in nv50_identify()
406 device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; in nv50_identify()
407 device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; in nv50_identify()
408 device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; in nv50_identify()
409 device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; in nv50_identify()
410 device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass; in nv50_identify()
413 device->cname = "GT218"; in nv50_identify()
414 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
415 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
416 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
417 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
418 device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; in nv50_identify()
419 device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; in nv50_identify()
420 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
421 device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; in nv50_identify()
422 device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; in nv50_identify()
423 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
424 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
425 device->oclass[NVDEV_SUBDEV_FB ] = gt215_fb_oclass; in nv50_identify()
426 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
427 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
428 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
429 device->oclass[NVDEV_SUBDEV_PMU ] = gt215_pmu_oclass; in nv50_identify()
430 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
431 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
432 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
433 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
434 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
435 device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; in nv50_identify()
436 device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; in nv50_identify()
437 device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; in nv50_identify()
438 device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; in nv50_identify()
439 device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; in nv50_identify()
440 device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass; in nv50_identify()
443 device->cname = "MCP89"; in nv50_identify()
444 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv50_identify()
445 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; in nv50_identify()
446 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; in nv50_identify()
447 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; in nv50_identify()
448 device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; in nv50_identify()
449 device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; in nv50_identify()
450 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; in nv50_identify()
451 device->oclass[NVDEV_SUBDEV_DEVINIT] = mcp89_devinit_oclass; in nv50_identify()
452 device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; in nv50_identify()
453 device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; in nv50_identify()
454 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv50_identify()
455 device->oclass[NVDEV_SUBDEV_FB ] = mcp89_fb_oclass; in nv50_identify()
456 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; in nv50_identify()
457 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()
458 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; in nv50_identify()
459 device->oclass[NVDEV_SUBDEV_PMU ] = gt215_pmu_oclass; in nv50_identify()
460 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; in nv50_identify()
461 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; in nv50_identify()
462 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; in nv50_identify()
463 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; in nv50_identify()
464 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; in nv50_identify()
465 device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; in nv50_identify()
466 device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; in nv50_identify()
467 device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; in nv50_identify()
468 device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; in nv50_identify()
469 device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; in nv50_identify()
470 device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass; in nv50_identify()
473 nv_fatal(device, "unknown Tesla chipset\n"); in nv50_identify()