277 		pr_err("%s: cannot get gdsc\n", __func__);  in dsi_get_config()
282 		pr_err("%s: unable to enable gdsc\n", __func__);  in dsi_get_config()
288 		pr_err("%s: unable to enable ahb_clk\n", __func__);  in dsi_get_config()
300 		pr_err("%s: Invalid version\n", __func__);  in dsi_get_config()
309 	pr_err("%s: Version %x:%x not support\n", __func__, major, minor);  in dsi_get_config()
349 				pr_err("regulator %d set op mode failed, %d\n",  in dsi_host_regulator_enable()
358 		pr_err("regulator enable failed, %d\n", ret);  in dsi_host_regulator_enable()
382 		pr_err("%s: failed to init regulator, ret=%d\n",  in dsi_regulator_init()
392 				pr_err("regulator %d set voltage failed, %d\n",  in dsi_regulator_init()
410 		pr_err("%s: Unable to get mdp core clk. ret=%d\n",  in dsi_clk_init()
418 		pr_err("%s: Unable to get mdss ahb clk. ret=%d\n",  in dsi_clk_init()
426 		pr_err("%s: Unable to get axi bus clk. ret=%d\n",  in dsi_clk_init()
434 		pr_err("%s: Unable to get mmss misc ahb clk. ret=%d\n",  in dsi_clk_init()
442 		pr_err("%s: can't find dsi_byte_clk. ret=%d\n",  in dsi_clk_init()
451 		pr_err("%s: can't find dsi_pixel_clk. ret=%d\n",  in dsi_clk_init()
460 		pr_err("%s: can't find dsi_esc_clk. ret=%d\n",  in dsi_clk_init()
478 		pr_err("%s: failed to enable mdp_core_clock, %d\n",  in dsi_bus_clk_enable()
485 		pr_err("%s: failed to enable ahb clock, %d\n", __func__, ret);  in dsi_bus_clk_enable()
491 		pr_err("%s: failed to enable ahb clock, %d\n", __func__, ret);  in dsi_bus_clk_enable()
497 		pr_err("%s: failed to enable mmss misc ahb clk, %d\n",  in dsi_bus_clk_enable()
532 		pr_err("%s: Failed to set rate byte clk, %d\n", __func__, ret);  in dsi_link_clk_enable()
538 		pr_err("%s: Failed to set rate pixel clk, %d\n", __func__, ret);  in dsi_link_clk_enable()
544 		pr_err("%s: Failed to enable dsi esc clk\n", __func__);  in dsi_link_clk_enable()
550 		pr_err("%s: Failed to enable dsi byte clk\n", __func__);  in dsi_link_clk_enable()
556 		pr_err("%s: Failed to enable dsi pixel clk\n", __func__);  in dsi_link_clk_enable()
585 			pr_err("%s: Can not enable bus clk, %d\n",  in dsi_clk_ctrl()
591 			pr_err("%s: Can not enable link clk, %d\n",  in dsi_clk_ctrl()
614 		pr_err("%s: mode not set\n", __func__);  in dsi_calc_clk_rate()
622 		pr_err("%s: forcing mdss_dsi lanes to 1\n", __func__);  in dsi_calc_clk_rate()
930 		pr_err("%s: failed to allocate gem, %d\n", __func__, ret);  in dsi_tx_buf_alloc()
938 		pr_err("%s: failed to get iova, %d\n", __func__, ret);  in dsi_tx_buf_alloc()
944 		pr_err("%s: buf NOT 8 bytes aligned\n", __func__);  in dsi_tx_buf_alloc()
977 		pr_err("%s: create packet failed, %d\n", __func__, ret);  in dsi_cmd_dma_add()
983 		pr_err("%s: packet size is too big\n", __func__);  in dsi_cmd_dma_add()
991 		pr_err("%s: get vaddr failed, %d\n", __func__, ret);  in dsi_cmd_dma_add()
1026 		pr_err("%s: read data does not match with rx_buf len %zu\n",  in dsi_short_read1_resp()
1043 		pr_err("%s: read data does not match with rx_buf len %zu\n",  in dsi_short_read2_resp()
1067 		pr_err("%s: failed to get iova: %d\n", __func__, ret);  in dsi_cmd_dma_tx()
1150 		pr_err("%s: failed to add cmd type = 0x%x\n",  in dsi_cmds2buf_tx()
1165 		pr_err("%s: cmd cannot fit into BLLP period, len=%d\n",  in dsi_cmds2buf_tx()
1172 		pr_err("%s: cmd dma tx failed, type=0x%x, data0=0x%x, len=%d\n",  in dsi_cmds2buf_tx()
1360 			pr_err("cannot set dir to disp-en-gpios %d\n", ret);  in dsi_host_init_panel_gpios()
1374 			pr_err("%s: cannot set dir to disp-te-gpios, %d\n",  in dsi_host_init_panel_gpios()
1452 		pr_err("%s: FAILED: cannot alloc dsi host\n",  in msm_dsi_host_init()
1470 		pr_err("%s: unable to initialize dsi clks\n", __func__);  in msm_dsi_host_init()
1476 		pr_err("%s: unable to map Dsi ctrl base\n", __func__);  in msm_dsi_host_init()
1484 		pr_err("%s: get config failed\n", __func__);  in msm_dsi_host_init()
1490 		pr_err("%s: regulator init failed\n", __func__);  in msm_dsi_host_init()
1496 		pr_err("%s: alloc rx temp buf failed\n", __func__);  in msm_dsi_host_init()
1515 		pr_err("%s: phy init failed\n", __func__);  in msm_dsi_host_init()
1571 		pr_err("%s: alloc tx gem obj failed, %d\n", __func__, ret);  in msm_dsi_host_modeset_init()
1721 			pr_err("%s: Set max pkt size failed, %d\n",  in msm_dsi_host_cmd_rx()
1738 			pr_err("%s: Read cmd Tx failed, %d\n", __func__, ret);  in msm_dsi_host_cmd_rx()
1792 		pr_err("%s: rx ACK_ERR_PACLAGE\n", __func__);  in msm_dsi_host_cmd_rx()
1874 		pr_err("%s: unable to calc clk rate, %d\n", __func__, ret);  in msm_dsi_host_power_on()
1880 		pr_err("%s:Failed to enable vregs.ret=%d\n",  in msm_dsi_host_power_on()
1887 		pr_err("%s: failed to enable bus clocks, %d\n", __func__, ret);  in msm_dsi_host_power_on()
1898 		pr_err("%s: failed to enable phy, %d\n", __func__, ret);  in msm_dsi_host_power_on()
1904 		pr_err("%s: failed to enable clocks. ret=%d\n", __func__, ret);  in msm_dsi_host_power_on()
1969 		pr_err("%s: cannot duplicate mode\n", __func__);  in msm_dsi_host_set_display_mode()