Lines Matching refs:reg_write

540 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data)  in reg_write()  function
567 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); in read_phy_reg()
593 reg_write(ohci, OHCI1394_PhyControl, in write_phy_reg()
685 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ar_context_link_page()
708 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in ar_context_abort()
1050 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); in ar_context_run()
1051 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); in ar_context_run()
1223 reg_write(ohci, COMMAND_PTR(ctx->regs), in context_run()
1225 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); in context_run()
1226 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); in context_run()
1273 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in context_stop()
1420 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in at_context_queue_packet()
1579 reg_write(ohci, OHCI1394_CSRData, lock_data); in handle_local_lock()
1580 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); in handle_local_lock()
1581 reg_write(ohci, OHCI1394_CSRControl, sel); in handle_local_lock()
1763 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); in update_bus_time()
1911 reg_write(ohci, OHCI1394_LinkControlSet, in bus_reset_work()
2016 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); in bus_reset_work()
2045 reg_write(ohci, OHCI1394_BusOptions, in bus_reset_work()
2048 reg_write(ohci, OHCI1394_ConfigROMhdr, in bus_reset_work()
2053 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); in bus_reset_work()
2054 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); in bus_reset_work()
2086 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2107 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); in irq_handler()
2119 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); in irq_handler()
2135 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2144 reg_write(ohci, OHCI1394_LinkControlSet, in irq_handler()
2177 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in software_reset()
2243 reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); in configure_1394a_enhancements()
2246 reg_write(ohci, OHCI1394_HCControlClear, in configure_1394a_enhancements()
2299 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2325 reg_write(ohci, OHCI1394_HCControlClear, in ohci_enable()
2328 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); in ohci_enable()
2329 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2333 reg_write(ohci, OHCI1394_ATRetries, in ohci_enable()
2343 reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), in ohci_enable()
2348 reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, in ohci_enable()
2354 reg_write(ohci, OHCI1394_FairnessControl, 0x3f); in ohci_enable()
2356 reg_write(ohci, OHCI1394_FairnessControl, 0); in ohci_enable()
2359 reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); in ohci_enable()
2360 reg_write(ohci, OHCI1394_IntEventClear, ~0); in ohci_enable()
2361 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in ohci_enable()
2411 reg_write(ohci, OHCI1394_ConfigROMhdr, 0); in ohci_enable()
2412 reg_write(ohci, OHCI1394_BusOptions, in ohci_enable()
2414 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_enable()
2416 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); in ohci_enable()
2430 reg_write(ohci, OHCI1394_IntMaskSet, irqs); in ohci_enable()
2432 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2436 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2517 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_set_config_rom()
2609 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); in ohci_enable_phys_dma()
2611 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); in ohci_enable_phys_dma()
2679 reg_write(ohci, OHCI1394_LinkControlClear, in ohci_write_csr()
2689 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_write_csr()
2698 reg_write(ohci, OHCI1394_NodeID, value >> 16); in ohci_write_csr()
2703 reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); in ohci_write_csr()
2704 reg_write(ohci, OHCI1394_IntEventSet, in ohci_write_csr()
2719 reg_write(ohci, OHCI1394_ATRetries, value); in ohci_write_csr()
2724 reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); in ohci_write_csr()
2933 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); in set_multichannel_mask()
2934 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); in set_multichannel_mask()
2935 reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); in set_multichannel_mask()
2936 reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); in set_multichannel_mask()
3059 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); in ohci_start_iso()
3060 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); in ohci_start_iso()
3075 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); in ohci_start_iso()
3076 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); in ohci_start_iso()
3077 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); in ohci_start_iso()
3098 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); in ohci_stop_iso()
3104 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); in ohci_stop_iso()
3473 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ohci_flush_queue_iso()
3667 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); in pci_probe()
3670 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); in pci_probe()
3676 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); in pci_probe()
3683 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); in pci_probe()
3767 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in pci_remove()
3842 reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); in pci_resume()
3843 reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); in pci_resume()