17 void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,  in u8500_clk_init()  argument
218 	clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", clkrst1_base,  in u8500_clk_init()
222 	clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", clkrst1_base,  in u8500_clk_init()
226 	clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", clkrst1_base,  in u8500_clk_init()
230 	clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", clkrst1_base,  in u8500_clk_init()
235 	clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", clkrst1_base,  in u8500_clk_init()
240 	clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", clkrst1_base,  in u8500_clk_init()
244 	clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", clkrst1_base,  in u8500_clk_init()
248 	clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", clkrst1_base,  in u8500_clk_init()
252 	clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", clkrst1_base,  in u8500_clk_init()
256 	clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", clkrst1_base,  in u8500_clk_init()
262 	clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", clkrst1_base,  in u8500_clk_init()
266 	clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", clkrst1_base,  in u8500_clk_init()
419 			clkrst1_base, BIT(0), CLK_SET_RATE_GATE);  in u8500_clk_init()
423 			clkrst1_base, BIT(1), CLK_SET_RATE_GATE);  in u8500_clk_init()
427 			clkrst1_base, BIT(2), CLK_SET_RATE_GATE);  in u8500_clk_init()
431 			clkrst1_base, BIT(3), CLK_SET_RATE_GATE);  in u8500_clk_init()
436 			clkrst1_base, BIT(4), CLK_SET_RATE_GATE);  in u8500_clk_init()
441 			clkrst1_base, BIT(5), CLK_SET_RATE_GATE);  in u8500_clk_init()
445 			clkrst1_base, BIT(6), CLK_SET_RATE_GATE);  in u8500_clk_init()
449 			clkrst1_base, BIT(8), CLK_SET_RATE_GATE);  in u8500_clk_init()
453 			clkrst1_base, BIT(9), CLK_SET_RATE_GATE);  in u8500_clk_init()
457 			clkrst1_base, BIT(10), CLK_SET_RATE_GATE);  in u8500_clk_init()