163 static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl)  in _of_pll_clk_init()  argument
176 	parent_name = of_clk_get_parent_name(node, 0);  in _of_pll_clk_init()
177 	if (of_property_read_u32(node, "fixed-postdiv",	&pll_data->postdiv)) {  in _of_pll_clk_init()
186 		i = of_property_match_string(node, "reg-names",  in _of_pll_clk_init()
188 		pll_data->pllod = of_iomap(node, i);  in _of_pll_clk_init()
191 	i = of_property_match_string(node, "reg-names", "control");  in _of_pll_clk_init()
192 	pll_data->pll_ctl0 = of_iomap(node, i);  in _of_pll_clk_init()
207 		i = of_property_match_string(node, "reg-names", "multiplier");  in _of_pll_clk_init()
208 		pll_data->pllm = of_iomap(node, i);  in _of_pll_clk_init()
216 	clk = clk_register_pll(NULL, node->name, parent_name, pll_data);  in _of_pll_clk_init()
218 		of_clk_add_provider(node, of_clk_src_simple_get, clk);  in _of_pll_clk_init()
223 	pr_err("%s: error initializing pll %s\n", __func__, node->name);  in _of_pll_clk_init()
231 static void __init of_keystone_pll_clk_init(struct device_node *node)  in of_keystone_pll_clk_init()  argument
233 	_of_pll_clk_init(node, false);  in of_keystone_pll_clk_init()
242 static void __init of_keystone_main_pll_clk_init(struct device_node *node)  in of_keystone_main_pll_clk_init()  argument
244 	_of_pll_clk_init(node, true);  in of_keystone_main_pll_clk_init()
253 static void __init of_pll_div_clk_init(struct device_node *node)  in of_pll_div_clk_init()  argument
259 	const char *clk_name = node->name;  in of_pll_div_clk_init()
261 	of_property_read_string(node, "clock-output-names", &clk_name);  in of_pll_div_clk_init()
262 	reg = of_iomap(node, 0);  in of_pll_div_clk_init()
268 	parent_name = of_clk_get_parent_name(node, 0);  in of_pll_div_clk_init()
274 	if (of_property_read_u32(node, "bit-shift", &shift)) {  in of_pll_div_clk_init()
279 	if (of_property_read_u32(node, "bit-mask", &mask)) {  in of_pll_div_clk_init()
287 		of_clk_add_provider(node, of_clk_src_simple_get, clk);  in of_pll_div_clk_init()
297 static void __init of_pll_mux_clk_init(struct device_node *node)  in of_pll_mux_clk_init()  argument
303 	const char *clk_name = node->name;  in of_pll_mux_clk_init()
305 	of_property_read_string(node, "clock-output-names", &clk_name);  in of_pll_mux_clk_init()
306 	reg = of_iomap(node, 0);  in of_pll_mux_clk_init()
312 	parents[0] = of_clk_get_parent_name(node, 0);  in of_pll_mux_clk_init()
313 	parents[1] = of_clk_get_parent_name(node, 1);  in of_pll_mux_clk_init()
319 	if (of_property_read_u32(node, "bit-shift", &shift)) {  in of_pll_mux_clk_init()
324 	if (of_property_read_u32(node, "bit-mask", &mask)) {  in of_pll_mux_clk_init()
333 		of_clk_add_provider(node, of_clk_src_simple_get, clk);  in of_pll_mux_clk_init()