825 static inline void sparc_pmu_enable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, in…  in sparc_pmu_enable_event()  argument
843 static inline void sparc_pmu_disable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, i…  in sparc_pmu_disable_event()  argument
862 				   struct hw_perf_event *hwc, int idx)  in sparc_perf_event_update()  argument
869 	prev_raw_count = local64_read(&hwc->prev_count);  in sparc_perf_event_update()
872 	if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,  in sparc_perf_event_update()
880 	local64_sub(delta, &hwc->period_left);  in sparc_perf_event_update()
886 				       struct hw_perf_event *hwc, int idx)  in sparc_perf_event_set_period()  argument
888 	s64 left = local64_read(&hwc->period_left);  in sparc_perf_event_set_period()
889 	s64 period = hwc->sample_period;  in sparc_perf_event_set_period()
894 		local64_set(&hwc->period_left, left);  in sparc_perf_event_set_period()
895 		hwc->last_period = period;  in sparc_perf_event_set_period()
901 		local64_set(&hwc->period_left, left);  in sparc_perf_event_set_period()
902 		hwc->last_period = period;  in sparc_perf_event_set_period()
908 	local64_set(&hwc->prev_count, (u64)-left);  in sparc_perf_event_set_period()
949 		struct hw_perf_event *hwc = &cp->hw;  in calculate_single_pcr()  local
950 		int idx = hwc->idx;  in calculate_single_pcr()
956 		sparc_perf_event_set_period(cp, hwc, idx);  in calculate_single_pcr()
961 		if (hwc->state & PERF_HES_STOPPED)  in calculate_single_pcr()
982 		struct hw_perf_event *hwc = &cp->hw;  in calculate_multiple_pcrs()  local
983 		int idx = hwc->idx;  in calculate_multiple_pcrs()
1138 	struct hw_perf_event *hwc = &event->hw;  in sparc_pmu_read()  local
1140 	sparc_perf_event_update(event, hwc, idx);  in sparc_pmu_read()
1404 	struct hw_perf_event *hwc = &event->hw;  in sparc_pmu_event_init()  local
1440 		hwc->event_base = perf_event_encode(pmap);  in sparc_pmu_event_init()
1446 		hwc->event_base = attr->config;  in sparc_pmu_event_init()
1450 	hwc->config_base = sparc_pmu->irq_bit;  in sparc_pmu_event_init()
1452 		hwc->config_base |= sparc_pmu->user_bit;  in sparc_pmu_event_init()
1454 		hwc->config_base |= sparc_pmu->priv_bit;  in sparc_pmu_event_init()
1456 		hwc->config_base |= sparc_pmu->hv_bit;  in sparc_pmu_event_init()
1466 	events[n] = hwc->event_base;  in sparc_pmu_event_init()
1475 	hwc->idx = PIC_NO_INDEX;  in sparc_pmu_event_init()
1483 	if (!hwc->sample_period) {  in sparc_pmu_event_init()
1484 		hwc->sample_period = MAX_PERIOD;  in sparc_pmu_event_init()
1485 		hwc->last_period = hwc->sample_period;  in sparc_pmu_event_init()
1486 		local64_set(&hwc->period_left, hwc->sample_period);  in sparc_pmu_event_init()
1618 		struct hw_perf_event *hwc;  in perf_event_nmi_handler()  local
1625 		hwc = &event->hw;  in perf_event_nmi_handler()
1626 		val = sparc_perf_event_update(event, hwc, idx);  in perf_event_nmi_handler()
1630 		perf_sample_data_init(&data, 0, hwc->last_period);  in perf_event_nmi_handler()
1631 		if (!sparc_perf_event_set_period(event, hwc, idx))  in perf_event_nmi_handler()