193 		*addrp = mfspr(SPRN_SDAR);  in perf_get_data_addr()
245 		unsigned long siar = mfspr(SPRN_SIAR);  in perf_get_misc_flags()
270 	unsigned long mmcra = mfspr(SPRN_MMCRA);  in perf_read_regs()
277 		regs->dar = mfspr(SPRN_SIER);  in perf_read_regs()
557 	current->thread.siar  = mfspr(SPRN_SIAR);  in ebb_switch_out()
558 	current->thread.sier  = mfspr(SPRN_SIER);  in ebb_switch_out()
559 	current->thread.sdar  = mfspr(SPRN_SDAR);  in ebb_switch_out()
561 	current->thread.mmcr2 = mfspr(SPRN_MMCR2) & MMCR2_USER_MASK;  in ebb_switch_out()
663 	pmcs[0] = mfspr(SPRN_PMC1);  in pmao_restore_workaround()
664 	pmcs[1] = mfspr(SPRN_PMC2);  in pmao_restore_workaround()
665 	pmcs[2] = mfspr(SPRN_PMC3);  in pmao_restore_workaround()
666 	pmcs[3] = mfspr(SPRN_PMC4);  in pmao_restore_workaround()
667 	pmcs[4] = mfspr(SPRN_PMC5);  in pmao_restore_workaround()
668 	pmcs[5] = mfspr(SPRN_PMC6);  in pmao_restore_workaround()
702 		val = mfspr(SPRN_PMC1);  in read_pmc()
705 		val = mfspr(SPRN_PMC2);  in read_pmc()
708 		val = mfspr(SPRN_PMC3);  in read_pmc()
711 		val = mfspr(SPRN_PMC4);  in read_pmc()
714 		val = mfspr(SPRN_PMC5);  in read_pmc()
717 		val = mfspr(SPRN_PMC6);  in read_pmc()
721 		val = mfspr(SPRN_PMC7);  in read_pmc()
724 		val = mfspr(SPRN_PMC8);  in read_pmc()
800 		mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCRA));  in perf_event_print_debug()
804 	sdar = mfspr(SPRN_SDAR);  in perf_event_print_debug()
807 		sier = mfspr(SPRN_SIER);  in perf_event_print_debug()
811 			mfspr(SPRN_MMCR2), mfspr(SPRN_EBBHR));  in perf_event_print_debug()
813 			mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));  in perf_event_print_debug()
817 		mfspr(SPRN_SIAR), sdar, sier);  in perf_event_print_debug()
1175 		val  = mmcr0 = mfspr(SPRN_MMCR0);  in power_pmu_disable()
2016 		return mfspr(SPRN_SIAR) + perf_ip_adjust(regs);  in perf_instruction_pointer()
2063 		freeze_limited_counters(cpuhw, mfspr(SPRN_PMC5),  in perf_event_interrupt()
2064 					mfspr(SPRN_PMC6));  in perf_event_interrupt()