152 			struct hw_perf_event *hwc,  in armpmu_event_set_period()  argument
156 	s64 left = local64_read(&hwc->period_left);  in armpmu_event_set_period()
157 	s64 period = hwc->sample_period;  in armpmu_event_set_period()
162 		local64_set(&hwc->period_left, left);  in armpmu_event_set_period()
163 		hwc->last_period = period;  in armpmu_event_set_period()
169 		local64_set(&hwc->period_left, left);  in armpmu_event_set_period()
170 		hwc->last_period = period;  in armpmu_event_set_period()
183 	local64_set(&hwc->prev_count, (u64)-left);  in armpmu_event_set_period()
194 		    struct hw_perf_event *hwc,  in armpmu_event_update()  argument
201 	prev_raw_count = local64_read(&hwc->prev_count);  in armpmu_event_update()
204 	if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,  in armpmu_event_update()
211 	local64_sub(delta, &hwc->period_left);  in armpmu_event_update()
219 	struct hw_perf_event *hwc = &event->hw;  in armpmu_read()  local
222 	if (hwc->idx < 0)  in armpmu_read()
225 	armpmu_event_update(event, hwc, hwc->idx);  in armpmu_read()
232 	struct hw_perf_event *hwc = &event->hw;  in armpmu_stop()  local
238 	if (!(hwc->state & PERF_HES_STOPPED)) {  in armpmu_stop()
239 		armpmu->disable(hwc, hwc->idx);  in armpmu_stop()
241 		armpmu_event_update(event, hwc, hwc->idx);  in armpmu_stop()
242 		hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;  in armpmu_stop()
250 	struct hw_perf_event *hwc = &event->hw;  in armpmu_start()  local
257 		WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));  in armpmu_start()
259 	hwc->state = 0;  in armpmu_start()
267 	armpmu_event_set_period(event, hwc, hwc->idx);  in armpmu_start()
268 	armpmu->enable(hwc, hwc->idx);  in armpmu_start()
276 	struct hw_perf_event *hwc = &event->hw;  in armpmu_del()  local
277 	int idx = hwc->idx;  in armpmu_del()
293 	struct hw_perf_event *hwc = &event->hw;  in armpmu_add()  local
300 	idx = armpmu->get_event_idx(hw_events, hwc);  in armpmu_add()
311 	armpmu->disable(hwc, idx);  in armpmu_add()
314 	hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;  in armpmu_add()
531 	struct hw_perf_event *hwc = &event->hw;  in __hw_perf_event_init()  local
548 	hwc->idx		= -1;  in __hw_perf_event_init()
549 	hwc->config_base	= 0;  in __hw_perf_event_init()
550 	hwc->config		= 0;  in __hw_perf_event_init()
551 	hwc->event_base		= 0;  in __hw_perf_event_init()
557 	     armpmu->set_event_filter(hwc, &event->attr)) &&  in __hw_perf_event_init()
566 	hwc->config_base	    |= (unsigned long)mapping;  in __hw_perf_event_init()
568 	if (!hwc->sample_period) {  in __hw_perf_event_init()
575 		hwc->sample_period  = armpmu->max_period >> 1;  in __hw_perf_event_init()
576 		hwc->last_period    = hwc->sample_period;  in __hw_perf_event_init()
577 		local64_set(&hwc->period_left, hwc->sample_period);  in __hw_perf_event_init()
1041 static void armv8pmu_enable_event(struct hw_perf_event *hwc, int idx)  in armv8pmu_enable_event()  argument
1060 	armv8pmu_write_evtype(idx, hwc->config_base);  in armv8pmu_enable_event()
1075 static void armv8pmu_disable_event(struct hw_perf_event *hwc, int idx)  in armv8pmu_disable_event()  argument
1125 		struct hw_perf_event *hwc;  in armv8pmu_handle_irq()  local
1138 		hwc = &event->hw;  in armv8pmu_handle_irq()
1139 		armpmu_event_update(event, hwc, idx);  in armv8pmu_handle_irq()
1140 		perf_sample_data_init(&data, 0, hwc->last_period);  in armv8pmu_handle_irq()
1141 		if (!armpmu_event_set_period(event, hwc, idx))  in armv8pmu_handle_irq()
1145 			cpu_pmu->disable(hwc, idx);  in armv8pmu_handle_irq()