Lines Matching refs:r12
101 ldr r12, omap_ih1_base @ set pointer to level1 handler
103 ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask
105 ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status
109 ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number
112 str r8, [r12, #IRQ_CONTROL_REG_OFFSET]
119 str r8, [r12, #IRQ_MIR_REG_OFFSET]
127 ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank
129 ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask
131 ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits
136 str r11, [r12, #OMAP1510_GPIO_INT_MASK]
145 str r10, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack the interrupt
147 str r11, [r12, #OMAP1510_GPIO_INT_MASK]
150 ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input
169 str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ store into the mask register
192 str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ restore into the mask register
208 ldr r12, [r9, #BUF_BUFFER_START] @ get buffer start address
209 add r12, r12, r10, LSL #2 @ calculate buffer tail address
211 str r8, [r12] @ append it to the buffer tail