Lines Matching refs:ldr
101 ldr r12, omap_ih1_base @ set pointer to level1 handler
103 ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask
105 ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status
109 ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number
127 ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank
129 ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask
131 ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits
150 ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input
152 ldr r10, [r9, #BUF_STATE] @ fetch kbd interface state
173 data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
190 ldr r10, [r9, #BUF_GPIO_INT_MASK] @ fetch saved mask
195 ldr r10, [r9, #BUF_KEYS_CNT] @ get saved keystrokes count
196 ldr r8, [r9, #BUF_BUF_LEN] @ get buffer size
203 ldr r10, [r9, #BUF_TAIL_OFFSET] @ get buffer tail offset
208 ldr r12, [r9, #BUF_BUFFER_START] @ get buffer start address
210 ldr r8, [r9, #BUF_KEY] @ get last keycode
216 ldr r10, [r9, #BUF_CNT_INT_KEY] @ increment interrupts counter