Lines Matching refs:clocks

53 			clocks = <&cpg_clocks R8A7790_CLK_Z>;
136 clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
148 clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
160 clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
172 clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
184 clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
196 clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
203 clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
219 clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
238 clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
281 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
311 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
339 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
367 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
379 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
389 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
399 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
409 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
419 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
431 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
443 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
455 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
465 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
476 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
492 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
502 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
512 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
522 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
532 clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
541 clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
550 clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
559 clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
568 clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
577 clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
586 clocks = <&mstp7_clks R8A7790_CLK_SCIF0>;
595 clocks = <&mstp7_clks R8A7790_CLK_SCIF1>;
604 clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>;
613 clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>;
622 clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
633 clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
641 clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
649 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
661 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
677 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
685 clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
693 clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
701 clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
711 clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
723 clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
736 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
749 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
767 clocks = <&mstp7_clks R8A7790_CLK_DU0>,
801 clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
811 clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
817 clocks {
841 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
842 * default. Boards that provide audio clocks should override them.
881 /* Special CPG clocks */
883 compatible = "renesas,r8a7790-cpg-clocks",
884 "renesas,rcar-gen2-cpg-clocks";
886 clocks = <&extal_clk &usb_extal_clk>;
893 /* Variable factor clocks */
897 clocks = <&pll1_div2_clk>;
904 clocks = <&pll1_div2_clk>;
911 clocks = <&pll1_div2_clk>;
918 clocks = <&pll1_div2_clk>;
925 clocks = <&pll1_div2_clk>;
932 clocks = <&pll1_div2_clk>;
937 /* Fixed factor clocks */
940 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
948 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
956 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
964 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
972 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
980 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
988 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
996 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1004 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1012 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1020 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1028 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1036 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1044 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1052 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1060 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1068 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1076 clocks = <&pll1_div2_clk>;
1084 clocks = <&extal_clk>;
1091 /* Gate clocks */
1093 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1095 clocks = <&mp_clk>;
1101 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1103 clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
1124 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1126 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1142 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1144 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
1162 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1164 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>,
1176 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1178 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1193 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1195 clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
1208 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1210 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
1227 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1229 clocks = <&p_clk>,
1265 clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
1278 clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
1290 clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
1302 clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
1314 clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
1326 clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
1335 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1369 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1389 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1440 clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
1460 clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,