[..]
- X
 
- X1000_GPIO_PZ_BASE
 
- X1000_GPIO_PZ_GID2LD
 
- X10_USB_CAMERA
 
- X1205_ALM0_BASE
 
- X1205_CCR_BASE
 
- X1205_DTR_DTR0
 
- X1205_DTR_DTR1
 
- X1205_DTR_DTR2
 
- X1205_HR_MIL
 
- X1205_INT_AL0E
 
- X1205_REG_0
 
- X1205_REG_ATR
 
- X1205_REG_DT
 
- X1205_REG_DTA0
 
- X1205_REG_DTA1
 
- X1205_REG_DTR
 
- X1205_REG_DW
 
- X1205_REG_DWA0
 
- X1205_REG_DWA1
 
- X1205_REG_HR
 
- X1205_REG_HRA0
 
- X1205_REG_HRA1
 
- X1205_REG_INT
 
- X1205_REG_MN
 
- X1205_REG_MNA0
 
- X1205_REG_MNA1
 
- X1205_REG_MO
 
- X1205_REG_MOA0
 
- X1205_REG_MOA1
 
- X1205_REG_SC
 
- X1205_REG_SCA0
 
- X1205_REG_SCA1
 
- X1205_REG_SR
 
- X1205_REG_Y2K
 
- X1205_REG_Y2K0
 
- X1205_REG_Y2K1
 
- X1205_REG_YR
 
- X1205_REG_YRA0
 
- X1205_REG_YRA1
 
- X1205_SR_AL0
 
- X1205_SR_RTCF
 
- X1205_SR_RWEL
 
- X1205_SR_WEL
 
- X1241REG_BL
 
- X1241REG_BL_BP0
 
- X1241REG_BL_BP1
 
- X1241REG_BL_BP2
 
- X1241REG_BL_WD0
 
- X1241REG_BL_WD1
 
- X1241REG_DT
 
- X1241REG_DW
 
- X1241REG_HR
 
- X1241REG_HR_MIL
 
- X1241REG_INT
 
- X1241REG_MN
 
- X1241REG_MO
 
- X1241REG_SC
 
- X1241REG_SR
 
- X1241REG_SR_BAT
 
- X1241REG_SR_RTCF
 
- X1241REG_SR_RWEL
 
- X1241REG_SR_WEL
 
- X1241REG_Y2K
 
- X1241REG_YR
 
- X1241_CCR_ADDRESS
 
- X16
 
- X16CLK
 
- X1CLK
 
- X2
 
- X21
 
- X21D
 
- X25_ACCPT_APPRV_FLAG
 
- X25_ADDR_LEN
 
- X25_ASY_MAGIC
 
- X25_CALL_ACCEPTED
 
- X25_CALL_REQUEST
 
- X25_CLEAR_CONFIRMATION
 
- X25_CLEAR_REQUEST
 
- X25_COND_ACK_PENDING
 
- X25_COND_OWN_RX_BUSY
 
- X25_COND_PEER_RX_BUSY
 
- X25_DATA
 
- X25_DEFAULT_PACKET_SIZE
 
- X25_DEFAULT_REVERSE
 
- X25_DEFAULT_T2
 
- X25_DEFAULT_T20
 
- X25_DEFAULT_T21
 
- X25_DEFAULT_T22
 
- X25_DEFAULT_T23
 
- X25_DEFAULT_THROUGHPUT
 
- X25_DEFAULT_WINDOW_SIZE
 
- X25_DIAGNOSTIC
 
- X25_DTE_SERVICES
 
- X25_D_BIT
 
- X25_EMODULUS
 
- X25_END
 
- X25_ESC
 
- X25_ESCAPE
 
- X25_EXT_MIN_LEN
 
- X25_EXT_M_BIT
 
- X25_FAC_CALLED_AE
 
- X25_FAC_CALLING_AE
 
- X25_FAC_CLASS_A
 
- X25_FAC_CLASS_B
 
- X25_FAC_CLASS_C
 
- X25_FAC_CLASS_D
 
- X25_FAC_CLASS_MASK
 
- X25_FAC_PACKET_SIZE
 
- X25_FAC_REVERSE
 
- X25_FAC_THROUGHPUT
 
- X25_FAC_WINDOW_SIZE
 
- X25_GFI_EXTSEQ
 
- X25_GFI_SEQ_MASK
 
- X25_GFI_STDSEQ
 
- X25_IFACE_CONNECT
 
- X25_IFACE_DATA
 
- X25_IFACE_DISCONNECT
 
- X25_IFACE_PARAMS
 
- X25_ILLEGAL
 
- X25_INTERRUPT
 
- X25_INTERRUPT_CONFIRMATION
 
- X25_INTERRUPT_FLAG
 
- X25_KERNEL_H
 
- X25_LINK_STATE_0
 
- X25_LINK_STATE_1
 
- X25_LINK_STATE_2
 
- X25_LINK_STATE_3
 
- X25_MARKER
 
- X25_MASK_CALLED_AE
 
- X25_MASK_CALLING_AE
 
- X25_MASK_PACKET_SIZE
 
- X25_MASK_REVERSE
 
- X25_MASK_THROUGHPUT
 
- X25_MASK_WINDOW_SIZE
 
- X25_MAX_AE_LEN
 
- X25_MAX_CUD_LEN
 
- X25_MAX_DTE_FACIL_LEN
 
- X25_MAX_FAC_LEN
 
- X25_MAX_L2_LEN
 
- X25_PS1024
 
- X25_PS128
 
- X25_PS16
 
- X25_PS2048
 
- X25_PS256
 
- X25_PS32
 
- X25_PS4096
 
- X25_PS512
 
- X25_PS64
 
- X25_QBITINCL
 
- X25_Q_BIT
 
- X25_Q_BIT_FLAG
 
- X25_REGISTRATION_CONFIRMATION
 
- X25_REGISTRATION_REQUEST
 
- X25_REJ
 
- X25_RESET_CONFIRMATION
 
- X25_RESET_REQUEST
 
- X25_RESTART_CONFIRMATION
 
- X25_RESTART_REQUEST
 
- X25_RNR
 
- X25_RR
 
- X25_SKB_CB
 
- X25_SMODULUS
 
- X25_STATE_0
 
- X25_STATE_1
 
- X25_STATE_2
 
- X25_STATE_3
 
- X25_STATE_4
 
- X25_STD_MIN_LEN
 
- X25_STD_M_BIT
 
- X25_UNESCAPE
 
- X2APIC_BROADCAST
 
- X2APIC_DISABLED
 
- X2APIC_ENABLE
 
- X2APIC_MSR
 
- X2APIC_OFF
 
- X2APIC_ON
 
- X2_BLOCK_ETH_MAC_CSR_OFFSET
 
- X2_CFGCRID_LEN
 
- X2_CFGCRID_POS
 
- X2_DEQINTEN_POS
 
- X2_INTLINE_LEN
 
- X2_INTLINE_POS
 
- X2_MSG_AM_POS
 
- X2_NUMMSGSINQ_LEN
 
- X2_NUMMSGSINQ_POS
 
- X2_NUM_RING_CONFIG
 
- X2_QBASE_AM_POS
 
- X2_RECOMTIMEOUT_LEN
 
- X2_RECOMTIMEOUT_POS
 
- X2_RINGTYPE_LEN
 
- X2_RINGTYPE_POS
 
- X2_SELTHRSH_LEN
 
- X2_SELTHRSH_POS
 
- X2_SIGNATURE
 
- X2_SIGNATURE_SIZE
 
- X2_START_BP_BUFNUM_0
 
- X2_START_BP_BUFNUM_1
 
- X2_START_CPU_BUFNUM_0
 
- X2_START_CPU_BUFNUM_1
 
- X2_START_ETH_BUFNUM_0
 
- X2_START_ETH_BUFNUM_1
 
- X2_START_RING_NUM_0
 
- X2_START_RING_NUM_1
 
- X3
 
- X32CLK
 
- X32_BIT
 
- X38
 
- X38_C0DRB
 
- X38_C0ECCERRLOG
 
- X38_C1DRB
 
- X38_C1ECCERRLOG
 
- X38_CAPID0
 
- X38_CHANNELS
 
- X38_DRB_MASK
 
- X38_DRB_SHIFT
 
- X38_ECCERRLOG_CE
 
- X38_ECCERRLOG_RANK_BITS
 
- X38_ECCERRLOG_SYNDROME_BITS
 
- X38_ECCERRLOG_UE
 
- X38_ERRSTS
 
- X38_ERRSTS_BITS
 
- X38_ERRSTS_CE
 
- X38_ERRSTS_UE
 
- X38_MCHBAR_HIGH
 
- X38_MCHBAR_LOW
 
- X38_MCHBAR_MASK
 
- X38_MMR_WINDOW_SIZE
 
- X38_RANKS
 
- X38_RANKS_PER_CHANNEL
 
- X38_TOM
 
- X38_TOM_MASK
 
- X38_TOM_SHIFT
 
- X3M_SPC1400HD
 
- X4
 
- X5
 
- X540_PHY_ID
 
- X540_TRAFFIC_CLASS
 
- X550_COMMON_EEP
 
- X550_COMMON_MAC
 
- X550_COMMON_PHY
 
- X550_PHY_ID2
 
- X550_PHY_ID3
 
- X557_PHY_ID
 
- X557_PHY_ID2
 
- X6
 
- X64CLK
 
- X7
 
- X722_EEPROM_SCOPE_LIMIT
 
- X8
 
- X86
 
- X86EMUL_CMPXCHG_FAILED
 
- X86EMUL_CONTINUE
 
- X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx
 
- X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx
 
- X86EMUL_CPUID_VENDOR_AMDisbetterI_edx
 
- X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx
 
- X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx
 
- X86EMUL_CPUID_VENDOR_AuthenticAMD_edx
 
- X86EMUL_CPUID_VENDOR_GenuineIntel_ebx
 
- X86EMUL_CPUID_VENDOR_GenuineIntel_ecx
 
- X86EMUL_CPUID_VENDOR_GenuineIntel_edx
 
- X86EMUL_CPUID_VENDOR_HygonGenuine_ebx
 
- X86EMUL_CPUID_VENDOR_HygonGenuine_ecx
 
- X86EMUL_CPUID_VENDOR_HygonGenuine_edx
 
- X86EMUL_GUEST_MASK
 
- X86EMUL_INTERCEPTED
 
- X86EMUL_IO_NEEDED
 
- X86EMUL_MODE_HOST
 
- X86EMUL_MODE_PROT16
 
- X86EMUL_MODE_PROT32
 
- X86EMUL_MODE_PROT64
 
- X86EMUL_MODE_REAL
 
- X86EMUL_MODE_VM86
 
- X86EMUL_PROPAGATE_FAULT
 
- X86EMUL_RETRY_INSTR
 
- X86EMUL_SMM_INSIDE_NMI_MASK
 
- X86EMUL_SMM_MASK
 
- X86EMUL_UNHANDLEABLE
 
- X86_64_CPU_ENTRY_AREA_PER_CPU
 
- X86_64_CPU_ENTRY_AREA_SIZE
 
- X86_64_ENTRY_TRAMPOLINE
 
- X86_ALIGN_RODATA_BEGIN
 
- X86_ALIGN_RODATA_END
 
- X86_ALL_EVENT_FLAGS
 
- X86_ASM_INST_H
 
- X86_BREAKPOINT_EXECUTE
 
- X86_BREAKPOINT_LEN_1
 
- X86_BREAKPOINT_LEN_2
 
- X86_BREAKPOINT_LEN_4
 
- X86_BREAKPOINT_LEN_8
 
- X86_BREAKPOINT_LEN_X
 
- X86_BREAKPOINT_RW
 
- X86_BREAKPOINT_WRITE
 
- X86_BR_ABORT
 
- X86_BR_ALL
 
- X86_BR_ANY
 
- X86_BR_ANYTX
 
- X86_BR_ANY_CALL
 
- X86_BR_CALL
 
- X86_BR_CALL_STACK
 
- X86_BR_IND_CALL
 
- X86_BR_IND_JMP
 
- X86_BR_INT
 
- X86_BR_IN_TX
 
- X86_BR_IRET
 
- X86_BR_IRQ
 
- X86_BR_JCC
 
- X86_BR_JMP
 
- X86_BR_KERNEL
 
- X86_BR_NONE
 
- X86_BR_NO_TX
 
- X86_BR_PLM
 
- X86_BR_RET
 
- X86_BR_SYSCALL
 
- X86_BR_SYSRET
 
- X86_BR_TYPE_MAP_MAX
 
- X86_BR_TYPE_SAVE
 
- X86_BR_USER
 
- X86_BR_ZERO_CALL
 
- X86_BUG
 
- X86_BUG_11AP
 
- X86_BUG_AMD_APIC_C1E
 
- X86_BUG_AMD_E400
 
- X86_BUG_AMD_TLB_MMATCH
 
- X86_BUG_CLFLUSH_MONITOR
 
- X86_BUG_COMA
 
- X86_BUG_CPU_MELTDOWN
 
- X86_BUG_ESPFIX
 
- X86_BUG_F00F
 
- X86_BUG_FDIV
 
- X86_BUG_FXSAVE_LEAK
 
- X86_BUG_ITLB_MULTIHIT
 
- X86_BUG_L1TF
 
- X86_BUG_MDS
 
- X86_BUG_MONITOR
 
- X86_BUG_MSBDS_ONLY
 
- X86_BUG_NULL_SEG
 
- X86_BUG_SPECTRE_V1
 
- X86_BUG_SPECTRE_V2
 
- X86_BUG_SPEC_STORE_BYPASS
 
- X86_BUG_SRBDS
 
- X86_BUG_SWAPGS
 
- X86_BUG_SWAPGS_FENCE
 
- X86_BUG_SYSRET_SS_ATTRS
 
- X86_BUG_TAA
 
- X86_CAPABILITY
 
- X86_CAP_FMT
 
- X86_CENTAUR_FAM6_C7_D
 
- X86_CENTAUR_FAM6_NANO
 
- X86_CONFIG
 
- X86_CPUID
 
- X86_CR0_AM
 
- X86_CR0_AM_BIT
 
- X86_CR0_CD
 
- X86_CR0_CD_BIT
 
- X86_CR0_EM
 
- X86_CR0_EM_BIT
 
- X86_CR0_ET
 
- X86_CR0_ET_BIT
 
- X86_CR0_MP
 
- X86_CR0_MP_BIT
 
- X86_CR0_NE
 
- X86_CR0_NE_BIT
 
- X86_CR0_NW
 
- X86_CR0_NW_BIT
 
- X86_CR0_PE
 
- X86_CR0_PE_BIT
 
- X86_CR0_PG
 
- X86_CR0_PG_BIT
 
- X86_CR0_TS
 
- X86_CR0_TS_BIT
 
- X86_CR0_WP
 
- X86_CR0_WP_BIT
 
- X86_CR3_PCD
 
- X86_CR3_PCD_BIT
 
- X86_CR3_PCID_BITS
 
- X86_CR3_PCID_MASK
 
- X86_CR3_PCID_NOFLUSH
 
- X86_CR3_PCID_NOFLUSH_BIT
 
- X86_CR3_PTI_PCID_USER_BIT
 
- X86_CR3_PWT
 
- X86_CR3_PWT_BIT
 
- X86_CR4_DE
 
- X86_CR4_DE_BIT
 
- X86_CR4_FSGSBASE
 
- X86_CR4_FSGSBASE_BIT
 
- X86_CR4_LA57
 
- X86_CR4_LA57_BIT
 
- X86_CR4_MCE
 
- X86_CR4_MCE_BIT
 
- X86_CR4_OSFXSR
 
- X86_CR4_OSFXSR_BIT
 
- X86_CR4_OSXMMEXCPT
 
- X86_CR4_OSXMMEXCPT_BIT
 
- X86_CR4_OSXSAVE
 
- X86_CR4_OSXSAVE_BIT
 
- X86_CR4_PAE
 
- X86_CR4_PAE_BIT
 
- X86_CR4_PCE
 
- X86_CR4_PCE_BIT
 
- X86_CR4_PCIDE
 
- X86_CR4_PCIDE_BIT
 
- X86_CR4_PGE
 
- X86_CR4_PGE_BIT
 
- X86_CR4_PKE
 
- X86_CR4_PKE_BIT
 
- X86_CR4_PSE
 
- X86_CR4_PSE_BIT
 
- X86_CR4_PVI
 
- X86_CR4_PVI_BIT
 
- X86_CR4_SMAP
 
- X86_CR4_SMAP_BIT
 
- X86_CR4_SMEP
 
- X86_CR4_SMEP_BIT
 
- X86_CR4_SMXE
 
- X86_CR4_SMXE_BIT
 
- X86_CR4_TSD
 
- X86_CR4_TSD_BIT
 
- X86_CR4_UMIP
 
- X86_CR4_UMIP_BIT
 
- X86_CR4_VME
 
- X86_CR4_VME_BIT
 
- X86_CR4_VMXE
 
- X86_CR4_VMXE_BIT
 
- X86_CR8_TPR
 
- X86_CSTATES_MODEL
 
- X86_EFLAGS_AC
 
- X86_EFLAGS_AC_BIT
 
- X86_EFLAGS_AF
 
- X86_EFLAGS_AF_BIT
 
- X86_EFLAGS_CF
 
- X86_EFLAGS_CF_BIT
 
- X86_EFLAGS_DF
 
- X86_EFLAGS_DF_BIT
 
- X86_EFLAGS_FIXED
 
- X86_EFLAGS_FIXED_BIT
 
- X86_EFLAGS_ID
 
- X86_EFLAGS_ID_BIT
 
- X86_EFLAGS_IF
 
- X86_EFLAGS_IF_BIT
 
- X86_EFLAGS_IOPL
 
- X86_EFLAGS_IOPL_BIT
 
- X86_EFLAGS_NT
 
- X86_EFLAGS_NT_BIT
 
- X86_EFLAGS_OF
 
- X86_EFLAGS_OF_BIT
 
- X86_EFLAGS_PF
 
- X86_EFLAGS_PF_BIT
 
- X86_EFLAGS_RF
 
- X86_EFLAGS_RF_BIT
 
- X86_EFLAGS_SF
 
- X86_EFLAGS_SF_BIT
 
- X86_EFLAGS_TF
 
- X86_EFLAGS_TF_BIT
 
- X86_EFLAGS_VIF
 
- X86_EFLAGS_VIF_BIT
 
- X86_EFLAGS_VIP
 
- X86_EFLAGS_VIP_BIT
 
- X86_EFLAGS_VM
 
- X86_EFLAGS_VM_BIT
 
- X86_EFLAGS_ZF
 
- X86_EFLAGS_ZF_BIT
 
- X86_EVEX_M
 
- X86_FAMILY_ANY
 
- X86_FAMILY_QUARK
 
- X86_FEATURE_3DNOW
 
- X86_FEATURE_3DNOWEXT
 
- X86_FEATURE_3DNOWPREFETCH
 
- X86_FEATURE_ABM
 
- X86_FEATURE_ACC
 
- X86_FEATURE_ACC_POWER
 
- X86_FEATURE_ACE2
 
- X86_FEATURE_ACE2_EN
 
- X86_FEATURE_ACPI
 
- X86_FEATURE_ADX
 
- X86_FEATURE_AES
 
- X86_FEATURE_ALWAYS
 
- X86_FEATURE_AMD_DCM
 
- X86_FEATURE_AMD_IBPB
 
- X86_FEATURE_AMD_IBRS
 
- X86_FEATURE_AMD_SSBD
 
- X86_FEATURE_AMD_SSB_NO
 
- X86_FEATURE_AMD_STIBP
 
- X86_FEATURE_AMD_STIBP_ALWAYS_ON
 
- X86_FEATURE_ANY
 
- X86_FEATURE_APERFMPERF
 
- X86_FEATURE_APIC
 
- X86_FEATURE_ARAT
 
- X86_FEATURE_ARCH_CAPABILITIES
 
- X86_FEATURE_ARCH_PERFMON
 
- X86_FEATURE_ART
 
- X86_FEATURE_AVIC
 
- X86_FEATURE_AVX
 
- X86_FEATURE_AVX2
 
- X86_FEATURE_AVX512BW
 
- X86_FEATURE_AVX512CD
 
- X86_FEATURE_AVX512DQ
 
- X86_FEATURE_AVX512ER
 
- X86_FEATURE_AVX512F
 
- X86_FEATURE_AVX512IFMA
 
- X86_FEATURE_AVX512PF
 
- X86_FEATURE_AVX512VBMI
 
- X86_FEATURE_AVX512VL
 
- X86_FEATURE_AVX512_4FMAPS
 
- X86_FEATURE_AVX512_4VNNIW
 
- X86_FEATURE_AVX512_BF16
 
- X86_FEATURE_AVX512_BITALG
 
- X86_FEATURE_AVX512_VBMI2
 
- X86_FEATURE_AVX512_VNNI
 
- X86_FEATURE_AVX512_VP2INTERSECT
 
- X86_FEATURE_AVX512_VPOPCNTDQ
 
- X86_FEATURE_BMI1
 
- X86_FEATURE_BMI2
 
- X86_FEATURE_BPEXT
 
- X86_FEATURE_BTS
 
- X86_FEATURE_CAT_L2
 
- X86_FEATURE_CAT_L3
 
- X86_FEATURE_CDP_L2
 
- X86_FEATURE_CDP_L3
 
- X86_FEATURE_CENTAUR_MCR
 
- X86_FEATURE_CID
 
- X86_FEATURE_CLDEMOTE
 
- X86_FEATURE_CLFLUSH
 
- X86_FEATURE_CLFLUSHOPT
 
- X86_FEATURE_CLWB
 
- X86_FEATURE_CLZERO
 
- X86_FEATURE_CMOV
 
- X86_FEATURE_CMP_LEGACY
 
- X86_FEATURE_CONSTANT_TSC
 
- X86_FEATURE_CPB
 
- X86_FEATURE_CPUID
 
- X86_FEATURE_CPUID_FAULT
 
- X86_FEATURE_CQM
 
- X86_FEATURE_CQM_LLC
 
- X86_FEATURE_CQM_MBM_LOCAL
 
- X86_FEATURE_CQM_MBM_TOTAL
 
- X86_FEATURE_CQM_OCCUP_LLC
 
- X86_FEATURE_CR8_LEGACY
 
- X86_FEATURE_CX16
 
- X86_FEATURE_CX8
 
- X86_FEATURE_CXMMX
 
- X86_FEATURE_CYRIX_ARR
 
- X86_FEATURE_DCA
 
- X86_FEATURE_DE
 
- X86_FEATURE_DECODEASSISTS
 
- X86_FEATURE_DS
 
- X86_FEATURE_DSCPL
 
- X86_FEATURE_DTES64
 
- X86_FEATURE_DTHERM
 
- X86_FEATURE_EPB
 
- X86_FEATURE_EPT
 
- X86_FEATURE_EPT_AD
 
- X86_FEATURE_ERMS
 
- X86_FEATURE_EST
 
- X86_FEATURE_EXTAPIC
 
- X86_FEATURE_EXTD_APICID
 
- X86_FEATURE_F16C
 
- X86_FEATURE_FDP_EXCPTN_ONLY
 
- X86_FEATURE_FENCE_SWAPGS_KERNEL
 
- X86_FEATURE_FENCE_SWAPGS_USER
 
- X86_FEATURE_FLEXPRIORITY
 
- X86_FEATURE_FLUSHBYASID
 
- X86_FEATURE_FLUSH_L1D
 
- X86_FEATURE_FMA
 
- X86_FEATURE_FMA4
 
- X86_FEATURE_FPU
 
- X86_FEATURE_FSGSBASE
 
- X86_FEATURE_FXSR
 
- X86_FEATURE_FXSR_OPT
 
- X86_FEATURE_GBPAGES
 
- X86_FEATURE_GFNI
 
- X86_FEATURE_HLE
 
- X86_FEATURE_HT
 
- X86_FEATURE_HWP
 
- X86_FEATURE_HWP_ACT_WINDOW
 
- X86_FEATURE_HWP_EPP
 
- X86_FEATURE_HWP_NOTIFY
 
- X86_FEATURE_HWP_PKG_REQ
 
- X86_FEATURE_HW_PSTATE
 
- X86_FEATURE_HYPERVISOR
 
- X86_FEATURE_IA64
 
- X86_FEATURE_IBPB
 
- X86_FEATURE_IBRS
 
- X86_FEATURE_IBRS_ENHANCED
 
- X86_FEATURE_IBS
 
- X86_FEATURE_IDA
 
- X86_FEATURE_INTEL_PPIN
 
- X86_FEATURE_INTEL_PT
 
- X86_FEATURE_INTEL_STIBP
 
- X86_FEATURE_INVPCID
 
- X86_FEATURE_INVPCID_SINGLE
 
- X86_FEATURE_IRPERF
 
- X86_FEATURE_K6_MTRR
 
- X86_FEATURE_K7
 
- X86_FEATURE_K8
 
- X86_FEATURE_L1TF_PTEINV
 
- X86_FEATURE_LA57
 
- X86_FEATURE_LAHF_LM
 
- X86_FEATURE_LBRV
 
- X86_FEATURE_LFENCE_RDTSC
 
- X86_FEATURE_LM
 
- X86_FEATURE_LONGRUN
 
- X86_FEATURE_LRTI
 
- X86_FEATURE_LS_CFG_SSBD
 
- X86_FEATURE_LWP
 
- X86_FEATURE_MATCH
 
- X86_FEATURE_MBA
 
- X86_FEATURE_MCA
 
- X86_FEATURE_MCE
 
- X86_FEATURE_MD_CLEAR
 
- X86_FEATURE_MISALIGNSSE
 
- X86_FEATURE_MMX
 
- X86_FEATURE_MMXEXT
 
- X86_FEATURE_MOVBE
 
- X86_FEATURE_MOVDIR64B
 
- X86_FEATURE_MOVDIRI
 
- X86_FEATURE_MP
 
- X86_FEATURE_MPX
 
- X86_FEATURE_MSR
 
- X86_FEATURE_MSR_SPEC_CTRL
 
- X86_FEATURE_MTRR
 
- X86_FEATURE_MWAIT
 
- X86_FEATURE_MWAITX
 
- X86_FEATURE_NODEID_MSR
 
- X86_FEATURE_NONSTOP_TSC
 
- X86_FEATURE_NONSTOP_TSC_S3
 
- X86_FEATURE_NOPL
 
- X86_FEATURE_NPT
 
- X86_FEATURE_NRIPS
 
- X86_FEATURE_NX
 
- X86_FEATURE_OSPKE
 
- X86_FEATURE_OSVW
 
- X86_FEATURE_OSXSAVE
 
- X86_FEATURE_OVERFLOW_RECOV
 
- X86_FEATURE_P3
 
- X86_FEATURE_P4
 
- X86_FEATURE_PAE
 
- X86_FEATURE_PAT
 
- X86_FEATURE_PAUSEFILTER
 
- X86_FEATURE_PBE
 
- X86_FEATURE_PCID
 
- X86_FEATURE_PCLMULQDQ
 
- X86_FEATURE_PCONFIG
 
- X86_FEATURE_PDCM
 
- X86_FEATURE_PEBS
 
- X86_FEATURE_PERFCTR_CORE
 
- X86_FEATURE_PERFCTR_LLC
 
- X86_FEATURE_PERFCTR_NB
 
- X86_FEATURE_PFTHRESHOLD
 
- X86_FEATURE_PGE
 
- X86_FEATURE_PHE
 
- X86_FEATURE_PHE_EN
 
- X86_FEATURE_PKU
 
- X86_FEATURE_PLN
 
- X86_FEATURE_PMM
 
- X86_FEATURE_PMM_EN
 
- X86_FEATURE_PN
 
- X86_FEATURE_POPCNT
 
- X86_FEATURE_PROC_FEEDBACK
 
- X86_FEATURE_PSE
 
- X86_FEATURE_PSE36
 
- X86_FEATURE_PTI
 
- X86_FEATURE_PTS
 
- X86_FEATURE_PTSC
 
- X86_FEATURE_RDPID
 
- X86_FEATURE_RDRAND
 
- X86_FEATURE_RDSEED
 
- X86_FEATURE_RDTSCP
 
- X86_FEATURE_RDT_A
 
- X86_FEATURE_RECOVERY
 
- X86_FEATURE_REP_GOOD
 
- X86_FEATURE_RETPOLINE
 
- X86_FEATURE_RETPOLINE_AMD
 
- X86_FEATURE_RING3MWAIT
 
- X86_FEATURE_RSB_CTXSW
 
- X86_FEATURE_RTM
 
- X86_FEATURE_SDBG
 
- X86_FEATURE_SELFSNOOP
 
- X86_FEATURE_SEP
 
- X86_FEATURE_SEV
 
- X86_FEATURE_SHA_NI
 
- X86_FEATURE_SKINIT
 
- X86_FEATURE_SMAP
 
- X86_FEATURE_SMCA
 
- X86_FEATURE_SME
 
- X86_FEATURE_SMEP
 
- X86_FEATURE_SMX
 
- X86_FEATURE_SPEC_CTRL
 
- X86_FEATURE_SPEC_CTRL_SSBD
 
- X86_FEATURE_SPEC_STORE_BYPASS_DISABLE
 
- X86_FEATURE_SRBDS_CTRL
 
- X86_FEATURE_SSBD
 
- X86_FEATURE_SSE4A
 
- X86_FEATURE_SSSE3
 
- X86_FEATURE_STIBP
 
- X86_FEATURE_SUCCOR
 
- X86_FEATURE_SVM
 
- X86_FEATURE_SVML
 
- X86_FEATURE_SYSCALL
 
- X86_FEATURE_SYSCALL32
 
- X86_FEATURE_SYSENTER32
 
- X86_FEATURE_TBM
 
- X86_FEATURE_TCE
 
- X86_FEATURE_TM2
 
- X86_FEATURE_TME
 
- X86_FEATURE_TOPOEXT
 
- X86_FEATURE_TPR_SHADOW
 
- X86_FEATURE_TSC
 
- X86_FEATURE_TSCRATEMSR
 
- X86_FEATURE_TSC_ADJUST
 
- X86_FEATURE_TSC_DEADLINE_TIMER
 
- X86_FEATURE_TSC_KNOWN_FREQ
 
- X86_FEATURE_TSC_RELIABLE
 
- X86_FEATURE_TSX_FORCE_ABORT
 
- X86_FEATURE_UMIP
 
- X86_FEATURE_UP
 
- X86_FEATURE_USE_IBPB
 
- X86_FEATURE_USE_IBRS_FW
 
- X86_FEATURE_VAES
 
- X86_FEATURE_VGIF
 
- X86_FEATURE_VIRT_SSBD
 
- X86_FEATURE_VMCALL
 
- X86_FEATURE_VMCBCLEAN
 
- X86_FEATURE_VME
 
- X86_FEATURE_VMMCALL
 
- X86_FEATURE_VMW_VMMCALL
 
- X86_FEATURE_VMX
 
- X86_FEATURE_VNMI
 
- X86_FEATURE_VPCLMULQDQ
 
- X86_FEATURE_VPID
 
- X86_FEATURE_V_VMSAVE_VMLOAD
 
- X86_FEATURE_WAITPKG
 
- X86_FEATURE_WBNOINVD
 
- X86_FEATURE_WDT
 
- X86_FEATURE_X2APIC
 
- X86_FEATURE_XCRYPT
 
- X86_FEATURE_XCRYPT_EN
 
- X86_FEATURE_XENPV
 
- X86_FEATURE_XGETBV1
 
- X86_FEATURE_XMM
 
- X86_FEATURE_XMM2
 
- X86_FEATURE_XMM3
 
- X86_FEATURE_XMM4_1
 
- X86_FEATURE_XMM4_2
 
- X86_FEATURE_XOP
 
- X86_FEATURE_XSAVE
 
- X86_FEATURE_XSAVEC
 
- X86_FEATURE_XSAVEERPTR
 
- X86_FEATURE_XSAVEOPT
 
- X86_FEATURE_XSAVES
 
- X86_FEATURE_XSTORE
 
- X86_FEATURE_XSTORE_EN
 
- X86_FEATURE_XTOPOLOGY
 
- X86_FEATURE_XTPR
 
- X86_FEATURE_ZEN
 
- X86_FEATURE_ZERO_FCS_FDS
 
- X86_FXSR_MAGIC
 
- X86_HARD_MATH
 
- X86_HYPER_ACRN
 
- X86_HYPER_JAILHOUSE
 
- X86_HYPER_KVM
 
- X86_HYPER_MS_HYPERV
 
- X86_HYPER_NATIVE
 
- X86_HYPER_VMWARE
 
- X86_HYPER_XEN_HVM
 
- X86_HYPER_XEN_PV
 
- X86_ICPT_POST_EXCEPT
 
- X86_ICPT_POST_MEMACCESS
 
- X86_ICPT_PRE_EXCEPT
 
- X86_ICTP_NONE
 
- X86_IOC_RDMSR_REGS
 
- X86_IOC_WRMSR_REGS
 
- X86_IRQ_ALLOC_CONTIGUOUS_VECTORS
 
- X86_IRQ_ALLOC_LEGACY
 
- X86_IRQ_ALLOC_TYPE_DMAR
 
- X86_IRQ_ALLOC_TYPE_HPET
 
- X86_IRQ_ALLOC_TYPE_IOAPIC
 
- X86_IRQ_ALLOC_TYPE_MSI
 
- X86_IRQ_ALLOC_TYPE_MSIX
 
- X86_IRQ_ALLOC_TYPE_UV
 
- X86_JA
 
- X86_JAE
 
- X86_JB
 
- X86_JBE
 
- X86_JE
 
- X86_JG
 
- X86_JGE
 
- X86_JL
 
- X86_JLE
 
- X86_JNE
 
- X86_LEGACY_I8042_EXPECTED_PRESENT
 
- X86_LEGACY_I8042_FIRMWARE_ABSENT
 
- X86_LEGACY_I8042_PLATFORM_ABSENT
 
- X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE
 
- X86_MODEL
 
- X86_MODEL_ANY
 
- X86_MODEL_QUARK_X1000
 
- X86_MODRM_MOD
 
- X86_MODRM_REG
 
- X86_MODRM_RM
 
- X86_NR_SUBARCHS
 
- X86_PERF_KFREE_EXCL
 
- X86_PERF_KFREE_MAX
 
- X86_PERF_KFREE_SHARED
 
- X86_PF_INSTR
 
- X86_PF_PK
 
- X86_PF_PROT
 
- X86_PF_RSVD
 
- X86_PF_USER
 
- X86_PF_WRITE
 
- X86_PLATFORM_IPI_VECTOR
 
- X86_PMC_IDX_MAX
 
- X86_RAPL_MODEL_MATCH
 
- X86_RAW_EVENT_MASK
 
- X86_RETPOLINE_DETECTED
 
- X86_RETPOLINE_POSSIBLE
 
- X86_REX_B
 
- X86_REX_R
 
- X86_REX_W
 
- X86_REX_X
 
- X86_SIB_BASE
 
- X86_SIB_INDEX
 
- X86_SIB_SCALE
 
- X86_STEPPING
 
- X86_STEPPINGS
 
- X86_STEPPING_ANY
 
- X86_SUBARCH_CE4100
 
- X86_SUBARCH_INTEL_MID
 
- X86_SUBARCH_LGUEST
 
- X86_SUBARCH_PC
 
- X86_SUBARCH_XEN
 
- X86_TRANSFER_CALL_JMP
 
- X86_TRANSFER_NONE
 
- X86_TRANSFER_RET
 
- X86_TRANSFER_TASK_SWITCH
 
- X86_TRAP_AC
 
- X86_TRAP_BP
 
- X86_TRAP_BR
 
- X86_TRAP_DB
 
- X86_TRAP_DE
 
- X86_TRAP_DF
 
- X86_TRAP_GP
 
- X86_TRAP_IRET
 
- X86_TRAP_MC
 
- X86_TRAP_MF
 
- X86_TRAP_NM
 
- X86_TRAP_NMI
 
- X86_TRAP_NP
 
- X86_TRAP_OF
 
- X86_TRAP_OLD_MF
 
- X86_TRAP_PF
 
- X86_TRAP_SPURIOUS
 
- X86_TRAP_SS
 
- X86_TRAP_TS
 
- X86_TRAP_UD
 
- X86_TRAP_XF
 
- X86_UNCORE_MODEL_MATCH
 
- X86_VENDOR
 
- X86_VENDOR_AMD
 
- X86_VENDOR_ANY
 
- X86_VENDOR_CENTAUR
 
- X86_VENDOR_CYRIX
 
- X86_VENDOR_HYGON
 
- X86_VENDOR_ID
 
- X86_VENDOR_INTEL
 
- X86_VENDOR_MAX
 
- X86_VENDOR_NSC
 
- X86_VENDOR_NUM
 
- X86_VENDOR_TRANSMETA
 
- X86_VENDOR_UMC
 
- X86_VENDOR_UNKNOWN
 
- X86_VENDOR_ZHAOXIN
 
- X86_VEX2_M
 
- X86_VEX3_M
 
- X86_VEX_B
 
- X86_VEX_L
 
- X86_VEX_M_MAX
 
- X86_VEX_P
 
- X86_VEX_R
 
- X86_VEX_V
 
- X86_VEX_W
 
- X86_VEX_X
 
- X86_VMX_FEATURE_PROC_CTLS2_EPT
 
- X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC
 
- X86_VMX_FEATURE_PROC_CTLS2_VPID
 
- X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS
 
- X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW
 
- X86_VMX_FEATURE_PROC_CTLS_VNMI
 
- X86_VM_MASK
 
- XA
 
- XA6
 
- XABT
 
- XAD1
 
- XAD2
 
- XADC_ALARM_OT_MASK
 
- XADC_ALARM_TEMP_MASK
 
- XADC_ALARM_VCCAUX_MASK
 
- XADC_ALARM_VCCBRAM_MASK
 
- XADC_ALARM_VCCINT_MASK
 
- XADC_ALARM_VCCODDR_MASK
 
- XADC_ALARM_VCCPAUX_MASK
 
- XADC_ALARM_VCCPINT_MASK
 
- XADC_AXI_ADC_REG_OFFSET
 
- XADC_AXI_GIER_ENABLE
 
- XADC_AXI_INT_ALARM_MASK
 
- XADC_AXI_INT_EOS
 
- XADC_AXI_REG_ALARM_STATUS
 
- XADC_AXI_REG_CONVST
 
- XADC_AXI_REG_GIER
 
- XADC_AXI_REG_IPIER
 
- XADC_AXI_REG_IPISR
 
- XADC_AXI_REG_RESET
 
- XADC_AXI_REG_STATUS
 
- XADC_AXI_REG_XADC_RESET
 
- XADC_AXI_RESET_MAGIC
 
- XADC_CHAN_TEMP
 
- XADC_CHAN_VOLTAGE
 
- XADC_CONF0_ACQ
 
- XADC_CONF0_CHAN
 
- XADC_CONF0_EC
 
- XADC_CONF0_MUX
 
- XADC_CONF1_ALARM_MASK
 
- XADC_CONF1_SEQ_CONTINUOUS
 
- XADC_CONF1_SEQ_DEFAULT
 
- XADC_CONF1_SEQ_INDEPENDENT
 
- XADC_CONF1_SEQ_MASK
 
- XADC_CONF1_SEQ_SIMULTANEOUS
 
- XADC_CONF1_SEQ_SINGLE_CHANNEL
 
- XADC_CONF1_SEQ_SINGLE_PASS
 
- XADC_CONF2_DIV_MASK
 
- XADC_CONF2_DIV_OFFSET
 
- XADC_CONF2_PD_ADC_B
 
- XADC_CONF2_PD_BOTH
 
- XADC_CONF2_PD_MASK
 
- XADC_CONF2_PD_NONE
 
- XADC_EXTERNAL_MUX_DUAL
 
- XADC_EXTERNAL_MUX_NONE
 
- XADC_EXTERNAL_MUX_SINGLE
 
- XADC_FLAGS_BUFFERED
 
- XADC_MAX_SAMPLERATE
 
- XADC_REG_CONF0
 
- XADC_REG_CONF1
 
- XADC_REG_CONF2
 
- XADC_REG_FLAG
 
- XADC_REG_INPUT_MODE
 
- XADC_REG_MAX_TEMP
 
- XADC_REG_MAX_VCCAUX
 
- XADC_REG_MAX_VCCBRAM
 
- XADC_REG_MAX_VCCINT
 
- XADC_REG_MAX_VCCO_DDR
 
- XADC_REG_MAX_VCCPAUX
 
- XADC_REG_MAX_VCCPINT
 
- XADC_REG_MIN_TEMP
 
- XADC_REG_MIN_VCCAUX
 
- XADC_REG_MIN_VCCBRAM
 
- XADC_REG_MIN_VCCINT
 
- XADC_REG_MIN_VCCO_DDR
 
- XADC_REG_MIN_VCCPAUX
 
- XADC_REG_MIN_VCCPINT
 
- XADC_REG_SEQ
 
- XADC_REG_TEMP
 
- XADC_REG_THRESHOLD
 
- XADC_REG_VAUX
 
- XADC_REG_VCCAUX
 
- XADC_REG_VCCBRAM
 
- XADC_REG_VCCINT
 
- XADC_REG_VCCO_DDR
 
- XADC_REG_VCCPAUX
 
- XADC_REG_VCCPINT
 
- XADC_REG_VPVN
 
- XADC_REG_VREFN
 
- XADC_REG_VREFP
 
- XADC_THRESHOLD_OT_MAX
 
- XADC_THRESHOLD_OT_MIN
 
- XADC_THRESHOLD_TEMP_MAX
 
- XADC_THRESHOLD_TEMP_MIN
 
- XADC_THRESHOLD_VALUE_SHIFT
 
- XADC_THRESHOLD_VCCAUX_MAX
 
- XADC_THRESHOLD_VCCAUX_MIN
 
- XADC_THRESHOLD_VCCBRAM_MAX
 
- XADC_THRESHOLD_VCCBRAM_MIN
 
- XADC_THRESHOLD_VCCINT_MAX
 
- XADC_THRESHOLD_VCCINT_MIN
 
- XADC_THRESHOLD_VCCODDR_MAX
 
- XADC_THRESHOLD_VCCODDR_MIN
 
- XADC_THRESHOLD_VCCPAUX_MAX
 
- XADC_THRESHOLD_VCCPAUX_MIN
 
- XADC_THRESHOLD_VCCPINT_MAX
 
- XADC_THRESHOLD_VCCPINT_MIN
 
- XADC_ZYNQ_CFG_CFIFOTH_MASK
 
- XADC_ZYNQ_CFG_CFIFOTH_OFFSET
 
- XADC_ZYNQ_CFG_DFIFOTH_MASK
 
- XADC_ZYNQ_CFG_DFIFOTH_OFFSET
 
- XADC_ZYNQ_CFG_ENABLE
 
- XADC_ZYNQ_CFG_IGAP
 
- XADC_ZYNQ_CFG_IGAP_MASK
 
- XADC_ZYNQ_CFG_REDGE
 
- XADC_ZYNQ_CFG_TCKRATE_DIV16
 
- XADC_ZYNQ_CFG_TCKRATE_DIV2
 
- XADC_ZYNQ_CFG_TCKRATE_DIV4
 
- XADC_ZYNQ_CFG_TCKRATE_DIV8
 
- XADC_ZYNQ_CFG_TCKRATE_MASK
 
- XADC_ZYNQ_CFG_WEDGE
 
- XADC_ZYNQ_CMD
 
- XADC_ZYNQ_CMD_NOP
 
- XADC_ZYNQ_CMD_READ
 
- XADC_ZYNQ_CMD_WRITE
 
- XADC_ZYNQ_CTL_RESET
 
- XADC_ZYNQ_IGAP_DEFAULT
 
- XADC_ZYNQ_INT_ALARM_MASK
 
- XADC_ZYNQ_INT_ALARM_OFFSET
 
- XADC_ZYNQ_INT_CFIFO_LTH
 
- XADC_ZYNQ_INT_DFIFO_GTH
 
- XADC_ZYNQ_PCAP_RATE_MAX
 
- XADC_ZYNQ_REG_CFG
 
- XADC_ZYNQ_REG_CFIFO
 
- XADC_ZYNQ_REG_CTL
 
- XADC_ZYNQ_REG_DFIFO
 
- XADC_ZYNQ_REG_INTMSK
 
- XADC_ZYNQ_REG_INTSTS
 
- XADC_ZYNQ_REG_STATUS
 
- XADC_ZYNQ_STATUS_ALM
 
- XADC_ZYNQ_STATUS_CFIFOE
 
- XADC_ZYNQ_STATUS_CFIFOF
 
- XADC_ZYNQ_STATUS_CFIFO_LVL_MASK
 
- XADC_ZYNQ_STATUS_CFIFO_LVL_OFFSET
 
- XADC_ZYNQ_STATUS_DFIFOE
 
- XADC_ZYNQ_STATUS_DFIFOF
 
- XADC_ZYNQ_STATUS_DFIFO_LVL_MASK
 
- XADC_ZYNQ_STATUS_DFIFO_LVL_OFFSET
 
- XADC_ZYNQ_STATUS_OT
 
- XADC_ZYNQ_TCK_RATE_MAX
 
- XAD_COMPRESSED
 
- XAD_COW
 
- XAD_EXTENDED
 
- XAD_NEW
 
- XAD_NOTRECORDED
 
- XADaddress
 
- XADlength
 
- XADoffset
 
- XAE_AF0_OFFSET
 
- XAE_AF1_OFFSET
 
- XAE_EMMC_GPCS_MASK
 
- XAE_EMMC_HOST_MASK
 
- XAE_EMMC_LINKSPD_10
 
- XAE_EMMC_LINKSPD_100
 
- XAE_EMMC_LINKSPD_1000
 
- XAE_EMMC_LINKSPEED_MASK
 
- XAE_EMMC_OFFSET
 
- XAE_EMMC_RGMII_MASK
 
- XAE_EMMC_RX16BIT
 
- XAE_EMMC_SGMII_MASK
 
- XAE_EMMC_TX16BIT
 
- XAE_FCC_FCRX_MASK
 
- XAE_FCC_FCTX_MASK
 
- XAE_FCC_OFFSET
 
- XAE_FEATURE_FULL_RX_CSUM
 
- XAE_FEATURE_FULL_TX_CSUM
 
- XAE_FEATURE_PARTIAL_RX_CSUM
 
- XAE_FEATURE_PARTIAL_TX_CSUM
 
- XAE_FMI_IND_MASK
 
- XAE_FMI_OFFSET
 
- XAE_FMI_PM_MASK
 
- XAE_FULL_CSUM_STATUS_MASK
 
- XAE_HDR_SIZE
 
- XAE_IE_OFFSET
 
- XAE_IFGP0_IFGP_MASK
 
- XAE_IFGP_OFFSET
 
- XAE_INT_ALL_MASK
 
- XAE_INT_AUTONEG_MASK
 
- XAE_INT_HARDACSCMPLT_MASK
 
- XAE_INT_MGTRDY_MASK
 
- XAE_INT_PHYRSTCMPLT_MASK
 
- XAE_INT_RECV_ERROR_MASK
 
- XAE_INT_RXCMPIT_MASK
 
- XAE_INT_RXDCMLOCK_MASK
 
- XAE_INT_RXFIFOOVR_MASK
 
- XAE_INT_RXRJECT_MASK
 
- XAE_INT_TXCMPIT_MASK
 
- XAE_IP_OFFSET
 
- XAE_IP_TCP_CSUM_VALIDATED
 
- XAE_IP_UDP_CSUM_VALIDATED
 
- XAE_IS_OFFSET
 
- XAE_JUMBO_MTU
 
- XAE_MAX_FRAME_SIZE
 
- XAE_MAX_JUMBO_FRAME_SIZE
 
- XAE_MAX_VLAN_FRAME_SIZE
 
- XAE_MCAST_TABLE_OFFSET
 
- XAE_MDIO_DIV_DFT
 
- XAE_MDIO_INT_MIIM_RDY_MASK
 
- XAE_MDIO_MCR_INITIATE_MASK
 
- XAE_MDIO_MCR_OFFSET
 
- XAE_MDIO_MCR_OP_MASK
 
- XAE_MDIO_MCR_OP_READ_MASK
 
- XAE_MDIO_MCR_OP_SHIFT
 
- XAE_MDIO_MCR_OP_WRITE_MASK
 
- XAE_MDIO_MCR_PHYAD_MASK
 
- XAE_MDIO_MCR_PHYAD_SHIFT
 
- XAE_MDIO_MCR_READY_MASK
 
- XAE_MDIO_MCR_REGAD_MASK
 
- XAE_MDIO_MCR_REGAD_SHIFT
 
- XAE_MDIO_MC_CLOCK_DIVIDE_MAX
 
- XAE_MDIO_MC_MDIOEN_MASK
 
- XAE_MDIO_MC_OFFSET
 
- XAE_MDIO_MIC_OFFSET
 
- XAE_MDIO_MIE_OFFSET
 
- XAE_MDIO_MIP_OFFSET
 
- XAE_MDIO_MIS_OFFSET
 
- XAE_MDIO_MRD_OFFSET
 
- XAE_MDIO_MWD_OFFSET
 
- XAE_MTU
 
- XAE_MULTICAST_CAM_TABLE_NUM
 
- XAE_NO_CSUM_OFFLOAD
 
- XAE_OPTION_DEFAULTS
 
- XAE_OPTION_FCS_INSERT
 
- XAE_OPTION_FCS_STRIP
 
- XAE_OPTION_FLOW_CONTROL
 
- XAE_OPTION_JUMBO
 
- XAE_OPTION_LENTYPE_ERR
 
- XAE_OPTION_PROMISC
 
- XAE_OPTION_RXEN
 
- XAE_OPTION_TXEN
 
- XAE_OPTION_VLAN
 
- XAE_PHYC_OFFSET
 
- XAE_PHYC_RGLINKSPD_10
 
- XAE_PHYC_RGLINKSPD_100
 
- XAE_PHYC_RGLINKSPD_1000
 
- XAE_PHYC_RGMIIHD_MASK
 
- XAE_PHYC_RGMIILINKSPEED_MASK
 
- XAE_PHYC_RGMIILINK_MASK
 
- XAE_PHYC_SGLINKSPD_10
 
- XAE_PHYC_SGLINKSPD_100
 
- XAE_PHYC_SGLINKSPD_1000
 
- XAE_PHYC_SGMIILINKSPEED_MASK
 
- XAE_PHY_TYPE_1000BASE_X
 
- XAE_PHY_TYPE_GMII
 
- XAE_PHY_TYPE_MII
 
- XAE_PHY_TYPE_RGMII_1_3
 
- XAE_PHY_TYPE_RGMII_2_0
 
- XAE_PHY_TYPE_SGMII
 
- XAE_PPST_OFFSET
 
- XAE_RAF_BCSTREJ_MASK
 
- XAE_RAF_EMULTIFLTRENBL_MASK
 
- XAE_RAF_MCSTREJ_MASK
 
- XAE_RAF_NEWFNCENBL_MASK
 
- XAE_RAF_OFFSET
 
- XAE_RAF_RXBADFRMEN_MASK
 
- XAE_RAF_RXVSTRPMODE_MASK
 
- XAE_RAF_RXVSTRPMODE_SHIFT
 
- XAE_RAF_RXVTAGMODE_MASK
 
- XAE_RAF_RXVTAGMODE_SHIFT
 
- XAE_RAF_STATSRST_MASK
 
- XAE_RAF_TXVSTRPMODE_MASK
 
- XAE_RAF_TXVSTRPMODE_SHIFT
 
- XAE_RAF_TXVTAGMODE_MASK
 
- XAE_RAF_TXVTAGMODE_SHIFT
 
- XAE_RCW0_OFFSET
 
- XAE_RCW1_CL_DIS_MASK
 
- XAE_RCW1_FCS_MASK
 
- XAE_RCW1_JUM_MASK
 
- XAE_RCW1_LT_DIS_MASK
 
- XAE_RCW1_OFFSET
 
- XAE_RCW1_PAUSEADDR_MASK
 
- XAE_RCW1_RST_MASK
 
- XAE_RCW1_RX_MASK
 
- XAE_RCW1_VLAN_MASK
 
- XAE_RTAG_OFFSET
 
- XAE_RX_VLAN_DATA_OFFSET
 
- XAE_TC_FCS_MASK
 
- XAE_TC_IFG_MASK
 
- XAE_TC_JUM_MASK
 
- XAE_TC_OFFSET
 
- XAE_TC_RST_MASK
 
- XAE_TC_TX_MASK
 
- XAE_TC_VLAN_MASK
 
- XAE_TPF_OFFSET
 
- XAE_TPF_TPFV_MASK
 
- XAE_TPID0_OFFSET
 
- XAE_TPID1_OFFSET
 
- XAE_TPID_0_MASK
 
- XAE_TPID_1_MASK
 
- XAE_TPID_2_MASK
 
- XAE_TPID_3_MASK
 
- XAE_TRL_SIZE
 
- XAE_TTAG_OFFSET
 
- XAE_TX_VLAN_DATA_OFFSET
 
- XAE_UAW0_OFFSET
 
- XAE_UAW1_OFFSET
 
- XAE_UAW1_UNICASTADDR_MASK
 
- XAE_UAWL_OFFSET
 
- XAE_UAWU_OFFSET
 
- XANBOO
 
- XAPIC_DEST_CLUSTER_MASK
 
- XAPIC_DEST_CPUS_MASK
 
- XAPIC_DEST_CPUS_SHIFT
 
- XAPIC_ENABLE
 
- XAROOT_NAME
 
- XARRAY_INIT
 
- XASSIGN
 
- XAS_BOUNDS
 
- XAS_RESTART
 
- XATTRINDEX_HASHSIZE
 
- XATTR_ACL_ACCESS
 
- XATTR_ACL_DEFAULT
 
- XATTR_ALIGN
 
- XATTR_APPARMOR_SUFFIX
 
- XATTR_BTRFS_PREFIX
 
- XATTR_BTRFS_PREFIX_LEN
 
- XATTR_CAPS_SUFFIX
 
- XATTR_CAPS_SZ
 
- XATTR_CAPS_SZ_1
 
- XATTR_CAPS_SZ_2
 
- XATTR_CAPS_SZ_3
 
- XATTR_CEPH_PREFIX
 
- XATTR_CEPH_PREFIX_LEN
 
- XATTR_CIFS_ACL
 
- XATTR_CREATE
 
- XATTR_DOS_ATTRIB
 
- XATTR_ENTRY
 
- XATTR_EVM_SUFFIX
 
- XATTR_FIRST_ENTRY
 
- XATTR_HDR
 
- XATTR_IMA_SUFFIX
 
- XATTR_LAYOUT_FIELD
 
- XATTR_LIST_MAX
 
- XATTR_MAC_OSX_PREFIX
 
- XATTR_MAC_OSX_PREFIX_LEN
 
- XATTR_NAME_APPARMOR
 
- XATTR_NAME_CAPS
 
- XATTR_NAME_CEPH
 
- XATTR_NAME_EVM
 
- XATTR_NAME_IMA
 
- XATTR_NAME_MAX
 
- XATTR_NAME_NFSV4_ACL
 
- XATTR_NAME_POSIX_ACL_ACCESS
 
- XATTR_NAME_POSIX_ACL_DEFAULT
 
- XATTR_NAME_SELINUX
 
- XATTR_NAME_SMACK
 
- XATTR_NAME_SMACKEXEC
 
- XATTR_NAME_SMACKIPIN
 
- XATTR_NAME_SMACKIPOUT
 
- XATTR_NAME_SMACKMMAP
 
- XATTR_NAME_SMACKTRANSMUTE
 
- XATTR_NAME_SOCKPROTONAME
 
- XATTR_NAME_SOCKPROTONAME_LEN
 
- XATTR_NEXT_ENTRY
 
- XATTR_NODE_OFFSET
 
- XATTR_OS2_PREFIX
 
- XATTR_OS2_PREFIX_LEN
 
- XATTR_PADDING_SIZE
 
- XATTR_POSIX_ACL_ACCESS
 
- XATTR_POSIX_ACL_DEFAULT
 
- XATTR_QUOTA_FIELD
 
- XATTR_REPLACE
 
- XATTR_ROUND
 
- XATTR_RSTAT_FIELD
 
- XATTR_SECURITY_PREFIX
 
- XATTR_SECURITY_PREFIX_LEN
 
- XATTR_SELINUX_SUFFIX
 
- XATTR_SIZE
 
- XATTR_SIZE_MAX
 
- XATTR_SMACK_EXEC
 
- XATTR_SMACK_IPIN
 
- XATTR_SMACK_IPOUT
 
- XATTR_SMACK_MMAP
 
- XATTR_SMACK_SUFFIX
 
- XATTR_SMACK_TRANSMUTE
 
- XATTR_SOCKPROTONAME_SUFFIX
 
- XATTR_SYSTEM_PREFIX
 
- XATTR_SYSTEM_PREFIX_LEN
 
- XATTR_TRUSTED_PREFIX
 
- XATTR_TRUSTED_PREFIX_LEN
 
- XATTR_USER
 
- XATTR_USER_PREFIX
 
- XATTR_USER_PREFIX_LEN
 
- XAUI2_AN_SEG_NUM
 
- XAUI2_HSS_PCS_SEG_NUM
 
- XAUI_AN_SEG_NUM
 
- XAUI_HSS_PCS_SEG_NUM
 
- XAXIDMA_BD_BUFA_OFFSET
 
- XAXIDMA_BD_CTRL_ALL_MASK
 
- XAXIDMA_BD_CTRL_LENGTH_MASK
 
- XAXIDMA_BD_CTRL_LEN_OFFSET
 
- XAXIDMA_BD_CTRL_TXEOF_MASK
 
- XAXIDMA_BD_CTRL_TXSOF_MASK
 
- XAXIDMA_BD_HAS_DRE_MASK
 
- XAXIDMA_BD_HAS_DRE_OFFSET
 
- XAXIDMA_BD_HAS_DRE_SHIFT
 
- XAXIDMA_BD_HAS_STSCNTRL_OFFSET
 
- XAXIDMA_BD_ID_OFFSET
 
- XAXIDMA_BD_MINIMUM_ALIGNMENT
 
- XAXIDMA_BD_NDESC_OFFSET
 
- XAXIDMA_BD_STS_ACTUAL_LEN_MASK
 
- XAXIDMA_BD_STS_ALL_ERR_MASK
 
- XAXIDMA_BD_STS_ALL_MASK
 
- XAXIDMA_BD_STS_COMPLETE_MASK
 
- XAXIDMA_BD_STS_DEC_ERR_MASK
 
- XAXIDMA_BD_STS_INT_ERR_MASK
 
- XAXIDMA_BD_STS_OFFSET
 
- XAXIDMA_BD_STS_RXEOF_MASK
 
- XAXIDMA_BD_STS_RXSOF_MASK
 
- XAXIDMA_BD_STS_SLV_ERR_MASK
 
- XAXIDMA_BD_USR0_OFFSET
 
- XAXIDMA_BD_USR1_OFFSET
 
- XAXIDMA_BD_USR2_OFFSET
 
- XAXIDMA_BD_USR3_OFFSET
 
- XAXIDMA_BD_USR4_OFFSET
 
- XAXIDMA_BD_WORDLEN_MASK
 
- XAXIDMA_COALESCE_MASK
 
- XAXIDMA_COALESCE_SHIFT
 
- XAXIDMA_CR_RESET_MASK
 
- XAXIDMA_CR_RUNSTOP_MASK
 
- XAXIDMA_DELAY_MASK
 
- XAXIDMA_DELAY_SHIFT
 
- XAXIDMA_DFT_RX_THRESHOLD
 
- XAXIDMA_DFT_RX_WAITBOUND
 
- XAXIDMA_DFT_TX_THRESHOLD
 
- XAXIDMA_DFT_TX_WAITBOUND
 
- XAXIDMA_IRQ_ALL_MASK
 
- XAXIDMA_IRQ_DELAY_MASK
 
- XAXIDMA_IRQ_ERROR_MASK
 
- XAXIDMA_IRQ_IOC_MASK
 
- XAXIDMA_RX_CDESC_OFFSET
 
- XAXIDMA_RX_CR_OFFSET
 
- XAXIDMA_RX_SR_OFFSET
 
- XAXIDMA_RX_TDESC_OFFSET
 
- XAXIDMA_SR_HALT_MASK
 
- XAXIDMA_TX_CDESC_OFFSET
 
- XAXIDMA_TX_CR_OFFSET
 
- XAXIDMA_TX_SR_OFFSET
 
- XAXIDMA_TX_TDESC_OFFSET
 
- XAXI_CAN
 
- XAXI_CANFD
 
- XAXI_CANFD_2_0
 
- XA_BUG_ON
 
- XA_CHECK_SCHED
 
- XA_CHUNK_MASK
 
- XA_CHUNK_SHIFT
 
- XA_CHUNK_SIZE
 
- XA_DEBUG
 
- XA_ERROR
 
- XA_FLAGS_ACCOUNT
 
- XA_FLAGS_ALLOC
 
- XA_FLAGS_ALLOC1
 
- XA_FLAGS_ALLOC_WRAPPED
 
- XA_FLAGS_LOCK_BH
 
- XA_FLAGS_LOCK_IRQ
 
- XA_FLAGS_MARK
 
- XA_FLAGS_TRACK_FREE
 
- XA_FLAGS_ZERO_BUSY
 
- XA_FREE_MARK
 
- XA_LIMIT
 
- XA_LOCK_BH
 
- XA_LOCK_IRQ
 
- XA_MARK_0
 
- XA_MARK_1
 
- XA_MARK_2
 
- XA_MARK_LONGS
 
- XA_MARK_MAX
 
- XA_MAX_MARKS
 
- XA_NODE_BUG_ON
 
- XA_PRESENT
 
- XA_RCU_FREE
 
- XA_RETRY_ENTRY
 
- XA_STATE
 
- XA_STATE_ORDER
 
- XA_ZERO_ENTRY
 
- XB
 
- XB1S_FF_REPORT
 
- XB6
 
- XB6S
 
- XBAR_AHB_BURST_EN
 
- XBAR_ALWAYS_LAST
 
- XBAR_FPI_BURST_EN
 
- XBASS_XOVER
 
- XBCH
 
- XBCL
 
- XBFRARB_MASK
 
- XBF_ASYNC
 
- XBF_DONE
 
- XBF_MASK
 
- XBF_NO_IOACCT
 
- XBF_READ
 
- XBF_READ_AHEAD
 
- XBF_STALE
 
- XBF_TRYLOCK
 
- XBF_UNMAPPED
 
- XBF_WRITE
 
- XBF_WRITE_FAIL
 
- XBLANK
 
- XBOW_PORT_ENABLE
 
- XBOW_PORT_HUB
 
- XBOW_PORT_IO
 
- XBOW_PORT_IS_ENABLED
 
- XBOW_PORT_NASID
 
- XBOW_PORT_TYPE_HUB
 
- XBOW_PORT_TYPE_IO
 
- XBOW_WIDGET_PART_NUM
 
- XBOXONE_INIT_PKT
 
- XBOX_BRIDGE_WID
 
- XBOX_RPS_EXISTS
 
- XBOX_RPS_FAIL
 
- XBRIDGE_WIDGET_MFGR_NUM
 
- XBRIDGE_WIDGET_PART_NUM
 
- XBT_NIL
 
- XBUFSIZE
 
- XBUS
 
- XBUS_AMBER_L
 
- XBUS_BASE
 
- XBUS_CS2
 
- XBUS_CYCLE
 
- XBUS_GREEN_L
 
- XBUS_RED_L
 
- XBUS_SIZE
 
- XBUS_STROBE
 
- XBUS_SWITCH
 
- XBUS_SWITCH_J17_11
 
- XBUS_SWITCH_J17_13
 
- XBUS_SWITCH_J17_9
 
- XBUS_SWITCH_SWITCH
 
- XBUS_TOGGLE
 
- XB_PAGES
 
- XC2028_ACTIVE
 
- XC2028_AUTO
 
- XC2028_D2620
 
- XC2028_D2633
 
- XC2028_DEFAULT_FIRMWARE
 
- XC2028_I2C_FLUSH
 
- XC2028_NODEV
 
- XC2028_NO_FIRMWARE
 
- XC2028_RESET_CLK
 
- XC2028_SLEEP
 
- XC2028_TUNER_RESET
 
- XC2028_WAITING_FIRMWARE
 
- XC3028L_DEFAULT_FIRMWARE
 
- XC3028_FE_ATI638
 
- XC3028_FE_CHINA
 
- XC3028_FE_DEFAULT
 
- XC3028_FE_DIBCOM52
 
- XC3028_FE_LG60
 
- XC3028_FE_OREN36
 
- XC3028_FE_OREN538
 
- XC3028_FE_TOYOTA388
 
- XC3028_FE_TOYOTA794
 
- XC3028_FE_ZARLINK456
 
- XC3_RG_U3_FRC_XTAL_RX_PWD
 
- XC3_RG_U3_XTAL_RX_PWD
 
- XC4000_AUDIO_STD_A2
 
- XC4000_AUDIO_STD_B
 
- XC4000_AUDIO_STD_INPUT1
 
- XC4000_AUDIO_STD_K3
 
- XC4000_AUDIO_STD_L
 
- XC4000_AUDIO_STD_MONO
 
- XC4000_BG_PAL_A2
 
- XC4000_BG_PAL_MONO
 
- XC4000_BG_PAL_NICAM
 
- XC4000_DEFAULT_FIRMWARE
 
- XC4000_DEFAULT_FIRMWARE_NEW
 
- XC4000_DK_PAL_A2
 
- XC4000_DK_PAL_MONO
 
- XC4000_DK_PAL_NICAM
 
- XC4000_DK_SECAM_A2DK1
 
- XC4000_DK_SECAM_A2LDK3
 
- XC4000_DK_SECAM_A2MONO
 
- XC4000_DK_SECAM_NICAM
 
- XC4000_DTV6
 
- XC4000_DTV7
 
- XC4000_DTV7_8
 
- XC4000_DTV8
 
- XC4000_FM_Radio_INPUT1
 
- XC4000_FM_Radio_INPUT2
 
- XC4000_I_PAL_NICAM
 
- XC4000_I_PAL_NICAM_MONO
 
- XC4000_LC_SECAM_NICAM
 
- XC4000_L_SECAM_NICAM
 
- XC4000_MN_NTSC_PAL_A2
 
- XC4000_MN_NTSC_PAL_BTSC
 
- XC4000_MN_NTSC_PAL_EIAJ
 
- XC4000_MN_NTSC_PAL_Mono
 
- XC4000_TUNER_RESET
 
- XC4K_BYPASS
 
- XC4K_CONFIGURE
 
- XC4K_EXTEST
 
- XC4K_IRLENGTH
 
- XC4K_PRELOAD
 
- XC5000A
 
- XC5000A_FIRMWARE
 
- XC5000C
 
- XC5000C_FIRMWARE
 
- XC5000_RADIO_FM1
 
- XC5000_RADIO_FM1_MONO
 
- XC5000_RADIO_FM2
 
- XC5000_RADIO_NOT_CONFIGURED
 
- XC5000_SLEEP_TIME
 
- XC5000_TUNER_RESET
 
- XC6
 
- XCANFD_DW_BYTES
 
- XCANFD_FRAME_DW_OFFSET
 
- XCAN_2_FSR_FL_MASK
 
- XCAN_2_FSR_RI_MASK
 
- XCAN_AFR_2_ID_OFFSET
 
- XCAN_AFR_2_MASK_OFFSET
 
- XCAN_AFR_EXT_OFFSET
 
- XCAN_AFR_OFFSET
 
- XCAN_BRPR_BRP_MASK
 
- XCAN_BRPR_OFFSET
 
- XCAN_BTR_OFFSET
 
- XCAN_BTR_SJW_MASK
 
- XCAN_BTR_SJW_MASK_CANFD
 
- XCAN_BTR_SJW_SHIFT
 
- XCAN_BTR_SJW_SHIFT_CANFD
 
- XCAN_BTR_TS1_MASK
 
- XCAN_BTR_TS1_MASK_CANFD
 
- XCAN_BTR_TS2_MASK
 
- XCAN_BTR_TS2_MASK_CANFD
 
- XCAN_BTR_TS2_SHIFT
 
- XCAN_BTR_TS2_SHIFT_CANFD
 
- XCAN_CANFD_FRAME_SIZE
 
- XCAN_DLCR_BRS_MASK
 
- XCAN_DLCR_DLC_MASK
 
- XCAN_DLCR_DLC_SHIFT
 
- XCAN_DLCR_EDL_MASK
 
- XCAN_ECR_OFFSET
 
- XCAN_ECR_REC_MASK
 
- XCAN_ECR_TEC_MASK
 
- XCAN_ESR_ACKER_MASK
 
- XCAN_ESR_BERR_MASK
 
- XCAN_ESR_CRCER_MASK
 
- XCAN_ESR_FMER_MASK
 
- XCAN_ESR_OFFSET
 
- XCAN_ESR_REC_SHIFT
 
- XCAN_ESR_STER_MASK
 
- XCAN_FLAG_CANFD_2
 
- XCAN_FLAG_EXT_FILTERS
 
- XCAN_FLAG_RXMNF
 
- XCAN_FLAG_RX_FIFO_MULTI
 
- XCAN_FLAG_TXFEMP
 
- XCAN_FLAG_TX_MAILBOXES
 
- XCAN_FRAME_DLC_OFFSET
 
- XCAN_FRAME_DW1_OFFSET
 
- XCAN_FRAME_DW2_OFFSET
 
- XCAN_FRAME_ID_OFFSET
 
- XCAN_FRAME_MAX_DATA_LEN
 
- XCAN_FSR_FL_MASK
 
- XCAN_FSR_IRI_MASK
 
- XCAN_FSR_OFFSET
 
- XCAN_FSR_RI_MASK
 
- XCAN_F_BRPR_OFFSET
 
- XCAN_F_BTR_OFFSET
 
- XCAN_ICR_OFFSET
 
- XCAN_IDR_ID1_MASK
 
- XCAN_IDR_ID1_SHIFT
 
- XCAN_IDR_ID2_MASK
 
- XCAN_IDR_ID2_SHIFT
 
- XCAN_IDR_IDE_MASK
 
- XCAN_IDR_RTR_MASK
 
- XCAN_IDR_SRR_MASK
 
- XCAN_IER_OFFSET
 
- XCAN_ISR_OFFSET
 
- XCAN_IXR_ARBLST_MASK
 
- XCAN_IXR_BSOFF_MASK
 
- XCAN_IXR_ERROR_MASK
 
- XCAN_IXR_RXMNF_MASK
 
- XCAN_IXR_RXNEMP_MASK
 
- XCAN_IXR_RXOFLW_MASK
 
- XCAN_IXR_RXOK_MASK
 
- XCAN_IXR_SLP_MASK
 
- XCAN_IXR_TXFEMP_MASK
 
- XCAN_IXR_TXFLL_MASK
 
- XCAN_IXR_TXOK_MASK
 
- XCAN_IXR_WKUP_MASK
 
- XCAN_MSR_LBACK_MASK
 
- XCAN_MSR_OFFSET
 
- XCAN_MSR_SLEEP_MASK
 
- XCAN_RXFIFO_OFFSET
 
- XCAN_RXMSG_2_BASE_OFFSET
 
- XCAN_RXMSG_2_FRAME_OFFSET
 
- XCAN_RXMSG_BASE_OFFSET
 
- XCAN_RXMSG_FRAME_OFFSET
 
- XCAN_SRR_CEN_MASK
 
- XCAN_SRR_OFFSET
 
- XCAN_SRR_RESET_MASK
 
- XCAN_SR_CONFIG_MASK
 
- XCAN_SR_ERRWRN_MASK
 
- XCAN_SR_ESTAT_MASK
 
- XCAN_SR_LBACK_MASK
 
- XCAN_SR_NORMAL_MASK
 
- XCAN_SR_OFFSET
 
- XCAN_SR_TXFLL_MASK
 
- XCAN_TIMEOUT
 
- XCAN_TRR_OFFSET
 
- XCAN_TXFIFO_OFFSET
 
- XCAN_TXMSG_BASE_OFFSET
 
- XCAN_TXMSG_FRAME_OFFSET
 
- XCAN_TX_MAILBOX_IDX
 
- XCASE
 
- XCAT
 
- XCBC_BLOCKSIZE
 
- XCBC_MAC_K1_OFFSET
 
- XCBC_MAC_K2_OFFSET
 
- XCBC_MAC_K3_OFFSET
 
- XCBLK
 
- XCC
 
- XCEP_CPLD_BASE
 
- XCEP_ETH_ATTR
 
- XCEP_ETH_ATTR_END
 
- XCEP_ETH_IRQ
 
- XCEP_ETH_PHYS
 
- XCEP_ETH_PHYS_END
 
- XCESS_ADDR_MASK
 
- XCESS_ADDR_SHIFT
 
- XCHACHA_IV_SIZE
 
- XCHAL_BUILD_UNIQUE_ID
 
- XCHAL_BYTE0_FORMAT_LENGTHS
 
- XCHAL_CA_BITS
 
- XCHAL_CLOCK_GATING_FUNCUNIT
 
- XCHAL_CLOCK_GATING_GLOBAL
 
- XCHAL_CORE_DESCRIPTION
 
- XCHAL_CORE_ID
 
- XCHAL_CP0_SA_ALIGN
 
- XCHAL_CP0_SA_LIST
 
- XCHAL_CP0_SA_NUM
 
- XCHAL_CP0_SA_SIZE
 
- XCHAL_CP1_IDENT
 
- XCHAL_CP1_NAME
 
- XCHAL_CP1_NUM_ATMPS
 
- XCHAL_CP1_SA_ALIGN
 
- XCHAL_CP1_SA_LIST
 
- XCHAL_CP1_SA_NUM
 
- XCHAL_CP1_SA_SIZE
 
- XCHAL_CP2_SA_ALIGN
 
- XCHAL_CP2_SA_LIST
 
- XCHAL_CP2_SA_NUM
 
- XCHAL_CP2_SA_SIZE
 
- XCHAL_CP3_SA_ALIGN
 
- XCHAL_CP3_SA_LIST
 
- XCHAL_CP3_SA_NUM
 
- XCHAL_CP3_SA_SIZE
 
- XCHAL_CP4_SA_ALIGN
 
- XCHAL_CP4_SA_LIST
 
- XCHAL_CP4_SA_NUM
 
- XCHAL_CP4_SA_SIZE
 
- XCHAL_CP5_SA_ALIGN
 
- XCHAL_CP5_SA_LIST
 
- XCHAL_CP5_SA_NUM
 
- XCHAL_CP5_SA_SIZE
 
- XCHAL_CP6_SA_ALIGN
 
- XCHAL_CP6_SA_LIST
 
- XCHAL_CP6_SA_NUM
 
- XCHAL_CP6_SA_SIZE
 
- XCHAL_CP7_IDENT
 
- XCHAL_CP7_NAME
 
- XCHAL_CP7_SA_ALIGN
 
- XCHAL_CP7_SA_LIST
 
- XCHAL_CP7_SA_NUM
 
- XCHAL_CP7_SA_SIZE
 
- XCHAL_CP_ID_AUDIOENGINELX
 
- XCHAL_CP_ID_XTIOP
 
- XCHAL_CP_MASK
 
- XCHAL_CP_MAX
 
- XCHAL_CP_MAXCFG
 
- XCHAL_CP_NUM
 
- XCHAL_CP_PORT_MASK
 
- XCHAL_DATARAM0_BANKS
 
- XCHAL_DATARAM0_ECC_PARITY
 
- XCHAL_DATARAM0_PADDR
 
- XCHAL_DATARAM0_SIZE
 
- XCHAL_DATARAM0_VADDR
 
- XCHAL_DATA_PIPE_DELAY
 
- XCHAL_DATA_WIDTH
 
- XCHAL_DCACHE_ACCESS_SIZE
 
- XCHAL_DCACHE_BANKS
 
- XCHAL_DCACHE_ECC_PARITY
 
- XCHAL_DCACHE_IS_COHERENT
 
- XCHAL_DCACHE_IS_WRITEBACK
 
- XCHAL_DCACHE_LINESIZE
 
- XCHAL_DCACHE_LINEWIDTH
 
- XCHAL_DCACHE_LINE_LOCKABLE
 
- XCHAL_DCACHE_SETWIDTH
 
- XCHAL_DCACHE_SIZE
 
- XCHAL_DCACHE_WAYS
 
- XCHAL_DEBUGLEVEL
 
- XCHAL_DEBUG_VECOFS
 
- XCHAL_DEBUG_VECTOR_PADDR
 
- XCHAL_DEBUG_VECTOR_VADDR
 
- XCHAL_DOUBLEEXC_VECOFS
 
- XCHAL_DOUBLEEXC_VECTOR_PADDR
 
- XCHAL_DOUBLEEXC_VECTOR_VADDR
 
- XCHAL_DTLB_ARF_ENTRIES_LOG2
 
- XCHAL_EXCM_LEVEL
 
- XCHAL_EXTINT0_NUM
 
- XCHAL_EXTINT10_NUM
 
- XCHAL_EXTINT11_NUM
 
- XCHAL_EXTINT12_NUM
 
- XCHAL_EXTINT13_NUM
 
- XCHAL_EXTINT14_NUM
 
- XCHAL_EXTINT15_NUM
 
- XCHAL_EXTINT16_NUM
 
- XCHAL_EXTINT1_NUM
 
- XCHAL_EXTINT2_NUM
 
- XCHAL_EXTINT3_NUM
 
- XCHAL_EXTINT4_NUM
 
- XCHAL_EXTINT5_NUM
 
- XCHAL_EXTINT6_NUM
 
- XCHAL_EXTINT7_NUM
 
- XCHAL_EXTINT8_NUM
 
- XCHAL_EXTINT9_NUM
 
- XCHAL_HAVE_ABS
 
- XCHAL_HAVE_ABSOLUTE_LITERALS
 
- XCHAL_HAVE_ADDX
 
- XCHAL_HAVE_BBE16
 
- XCHAL_HAVE_BBE16_DESPREAD
 
- XCHAL_HAVE_BBE16_RSQRT
 
- XCHAL_HAVE_BBE16_VECDIV
 
- XCHAL_HAVE_BBENEP
 
- XCHAL_HAVE_BBP16
 
- XCHAL_HAVE_BE
 
- XCHAL_HAVE_BOOLEANS
 
- XCHAL_HAVE_BOOTLOADER
 
- XCHAL_HAVE_BSP3
 
- XCHAL_HAVE_BSP3_TRANSPOSE
 
- XCHAL_HAVE_CACHEATTR
 
- XCHAL_HAVE_CACHE_BLOCKOPS
 
- XCHAL_HAVE_CALL4AND12
 
- XCHAL_HAVE_CCOUNT
 
- XCHAL_HAVE_CLAMPS
 
- XCHAL_HAVE_CONNXD2
 
- XCHAL_HAVE_CONNXD2_DUALLSFLIX
 
- XCHAL_HAVE_CONST16
 
- XCHAL_HAVE_CP
 
- XCHAL_HAVE_DCACHE_DYN_WAYS
 
- XCHAL_HAVE_DCACHE_TEST
 
- XCHAL_HAVE_DEBUG
 
- XCHAL_HAVE_DEBUG_APB
 
- XCHAL_HAVE_DEBUG_ERI
 
- XCHAL_HAVE_DEBUG_EXTERN_INT
 
- XCHAL_HAVE_DEBUG_JTAG
 
- XCHAL_HAVE_DENSITY
 
- XCHAL_HAVE_DEPBITS
 
- XCHAL_HAVE_DFP
 
- XCHAL_HAVE_DFPU_SINGLE_DOUBLE
 
- XCHAL_HAVE_DFPU_SINGLE_ONLY
 
- XCHAL_HAVE_DFP_ACCEL
 
- XCHAL_HAVE_DFP_DIV
 
- XCHAL_HAVE_DFP_RECIP
 
- XCHAL_HAVE_DFP_RSQRT
 
- XCHAL_HAVE_DFP_SQRT
 
- XCHAL_HAVE_DFP_accel
 
- XCHAL_HAVE_DIV32
 
- XCHAL_HAVE_EXCEPTIONS
 
- XCHAL_HAVE_EXCLUSIVE
 
- XCHAL_HAVE_EXTERN_REGS
 
- XCHAL_HAVE_FLIX3
 
- XCHAL_HAVE_FP
 
- XCHAL_HAVE_FP_DIV
 
- XCHAL_HAVE_FP_RECIP
 
- XCHAL_HAVE_FP_RSQRT
 
- XCHAL_HAVE_FP_SQRT
 
- XCHAL_HAVE_FULL_RESET
 
- XCHAL_HAVE_FUSION
 
- XCHAL_HAVE_FUSION_16BIT_BASEBAND
 
- XCHAL_HAVE_FUSION_AES
 
- XCHAL_HAVE_FUSION_AVS
 
- XCHAL_HAVE_FUSION_BITOPS
 
- XCHAL_HAVE_FUSION_CONVENC
 
- XCHAL_HAVE_FUSION_FP
 
- XCHAL_HAVE_FUSION_LFSR_CRC
 
- XCHAL_HAVE_FUSION_LOW_POWER
 
- XCHAL_HAVE_GRIVPEP
 
- XCHAL_HAVE_GRIVPEP_HISTOGRAM
 
- XCHAL_HAVE_HALT
 
- XCHAL_HAVE_HIFI2
 
- XCHAL_HAVE_HIFI2EP
 
- XCHAL_HAVE_HIFI2_MUL32X24
 
- XCHAL_HAVE_HIFI3
 
- XCHAL_HAVE_HIFI3_VFPU
 
- XCHAL_HAVE_HIFI4
 
- XCHAL_HAVE_HIFI4_VFPU
 
- XCHAL_HAVE_HIFIPRO
 
- XCHAL_HAVE_HIFI_MINI
 
- XCHAL_HAVE_HIGHPRI_INTERRUPTS
 
- XCHAL_HAVE_ICACHE_DYN_WAYS
 
- XCHAL_HAVE_ICACHE_TEST
 
- XCHAL_HAVE_IDENTITY_MAP
 
- XCHAL_HAVE_IMEM_LOADSTORE
 
- XCHAL_HAVE_INTERRUPTS
 
- XCHAL_HAVE_L32R
 
- XCHAL_HAVE_LOOPS
 
- XCHAL_HAVE_MAC16
 
- XCHAL_HAVE_MEM_ECC_PARITY
 
- XCHAL_HAVE_MIMIC_CACHEATTR
 
- XCHAL_HAVE_MINMAX
 
- XCHAL_HAVE_MPU
 
- XCHAL_HAVE_MP_INTERRUPTS
 
- XCHAL_HAVE_MP_RUNSTALL
 
- XCHAL_HAVE_MUL16
 
- XCHAL_HAVE_MUL32
 
- XCHAL_HAVE_MUL32_HIGH
 
- XCHAL_HAVE_MX
 
- XCHAL_HAVE_NMI
 
- XCHAL_HAVE_NSA
 
- XCHAL_HAVE_OCD
 
- XCHAL_HAVE_OCD_DIR_ARRAY
 
- XCHAL_HAVE_OCD_LS32DDR
 
- XCHAL_HAVE_PDX4
 
- XCHAL_HAVE_PIF
 
- XCHAL_HAVE_PREDICTED_BRANCHES
 
- XCHAL_HAVE_PREFETCH
 
- XCHAL_HAVE_PREFETCH_L1
 
- XCHAL_HAVE_PRID
 
- XCHAL_HAVE_PSO
 
- XCHAL_HAVE_PSO_CDM
 
- XCHAL_HAVE_PSO_FULL_RETENTION
 
- XCHAL_HAVE_PTP_MMU
 
- XCHAL_HAVE_RELEASE_SYNC
 
- XCHAL_HAVE_S32C1I
 
- XCHAL_HAVE_SEXT
 
- XCHAL_HAVE_SPANNING_WAY
 
- XCHAL_HAVE_SPECULATION
 
- XCHAL_HAVE_SSP16
 
- XCHAL_HAVE_SSP16_VITERBI
 
- XCHAL_HAVE_TAP_MASTER
 
- XCHAL_HAVE_THREADPTR
 
- XCHAL_HAVE_TLBS
 
- XCHAL_HAVE_TRAX
 
- XCHAL_HAVE_TURBO16
 
- XCHAL_HAVE_USER_DPFPU
 
- XCHAL_HAVE_USER_SPFPU
 
- XCHAL_HAVE_VECBASE
 
- XCHAL_HAVE_VECTORFPU2005
 
- XCHAL_HAVE_VECTOR_SELECT
 
- XCHAL_HAVE_VECTRA1
 
- XCHAL_HAVE_VECTRALX
 
- XCHAL_HAVE_WIDE_BRANCHES
 
- XCHAL_HAVE_WINDOWED
 
- XCHAL_HAVE_XEA1
 
- XCHAL_HAVE_XEA2
 
- XCHAL_HAVE_XEAX
 
- XCHAL_HAVE_XLT_CACHEATTR
 
- XCHAL_HW_CONFIGID0
 
- XCHAL_HW_CONFIGID1
 
- XCHAL_HW_CONFIGID_RELIABLE
 
- XCHAL_HW_MAX_VERSION
 
- XCHAL_HW_MAX_VERSION_MAJOR
 
- XCHAL_HW_MAX_VERSION_MINOR
 
- XCHAL_HW_MIN_VERSION
 
- XCHAL_HW_MIN_VERSION_MAJOR
 
- XCHAL_HW_MIN_VERSION_MINOR
 
- XCHAL_HW_REL_LX2
 
- XCHAL_HW_REL_LX2_1
 
- XCHAL_HW_REL_LX2_1_1
 
- XCHAL_HW_REL_LX3
 
- XCHAL_HW_REL_LX3_0
 
- XCHAL_HW_REL_LX3_0_0
 
- XCHAL_HW_REL_LX4
 
- XCHAL_HW_REL_LX4_0
 
- XCHAL_HW_REL_LX4_0_1
 
- XCHAL_HW_REL_LX5
 
- XCHAL_HW_REL_LX5_0
 
- XCHAL_HW_REL_LX5_0_4
 
- XCHAL_HW_REL_LX6
 
- XCHAL_HW_REL_LX6_0
 
- XCHAL_HW_REL_LX6_0_2
 
- XCHAL_HW_VERSION
 
- XCHAL_HW_VERSION_MAJOR
 
- XCHAL_HW_VERSION_MINOR
 
- XCHAL_HW_VERSION_NAME
 
- XCHAL_ICACHE_ACCESS_SIZE
 
- XCHAL_ICACHE_ECC_PARITY
 
- XCHAL_ICACHE_LINESIZE
 
- XCHAL_ICACHE_LINEWIDTH
 
- XCHAL_ICACHE_LINE_LOCKABLE
 
- XCHAL_ICACHE_SETWIDTH
 
- XCHAL_ICACHE_SIZE
 
- XCHAL_ICACHE_WAYS
 
- XCHAL_INSTRAM0_ECC_PARITY
 
- XCHAL_INSTRAM0_PADDR
 
- XCHAL_INSTRAM0_SIZE
 
- XCHAL_INSTRAM0_VADDR
 
- XCHAL_INST_FETCH_WIDTH
 
- XCHAL_INT0_EXTNUM
 
- XCHAL_INT0_LEVEL
 
- XCHAL_INT0_TYPE
 
- XCHAL_INT10_LEVEL
 
- XCHAL_INT10_TYPE
 
- XCHAL_INT11_LEVEL
 
- XCHAL_INT11_TYPE
 
- XCHAL_INT12_EXTNUM
 
- XCHAL_INT12_LEVEL
 
- XCHAL_INT12_TYPE
 
- XCHAL_INT13_LEVEL
 
- XCHAL_INT13_TYPE
 
- XCHAL_INT14_EXTNUM
 
- XCHAL_INT14_LEVEL
 
- XCHAL_INT14_TYPE
 
- XCHAL_INT15_EXTNUM
 
- XCHAL_INT15_LEVEL
 
- XCHAL_INT15_TYPE
 
- XCHAL_INT16_EXTNUM
 
- XCHAL_INT16_LEVEL
 
- XCHAL_INT16_TYPE
 
- XCHAL_INT17_EXTNUM
 
- XCHAL_INT17_LEVEL
 
- XCHAL_INT17_TYPE
 
- XCHAL_INT18_EXTNUM
 
- XCHAL_INT18_LEVEL
 
- XCHAL_INT18_TYPE
 
- XCHAL_INT19_EXTNUM
 
- XCHAL_INT19_LEVEL
 
- XCHAL_INT19_TYPE
 
- XCHAL_INT1_EXTNUM
 
- XCHAL_INT1_LEVEL
 
- XCHAL_INT1_TYPE
 
- XCHAL_INT20_EXTNUM
 
- XCHAL_INT20_LEVEL
 
- XCHAL_INT20_TYPE
 
- XCHAL_INT21_EXTNUM
 
- XCHAL_INT21_LEVEL
 
- XCHAL_INT21_TYPE
 
- XCHAL_INT2_EXTNUM
 
- XCHAL_INT2_LEVEL
 
- XCHAL_INT2_TYPE
 
- XCHAL_INT3_EXTNUM
 
- XCHAL_INT3_LEVEL
 
- XCHAL_INT3_TYPE
 
- XCHAL_INT4_EXTNUM
 
- XCHAL_INT4_LEVEL
 
- XCHAL_INT4_TYPE
 
- XCHAL_INT5_EXTNUM
 
- XCHAL_INT5_LEVEL
 
- XCHAL_INT5_TYPE
 
- XCHAL_INT6_LEVEL
 
- XCHAL_INT6_TYPE
 
- XCHAL_INT7_LEVEL
 
- XCHAL_INT7_TYPE
 
- XCHAL_INT8_EXTNUM
 
- XCHAL_INT8_LEVEL
 
- XCHAL_INT8_TYPE
 
- XCHAL_INT9_EXTNUM
 
- XCHAL_INT9_LEVEL
 
- XCHAL_INT9_TYPE
 
- XCHAL_INTLEVEL1_ANDBELOW_MASK
 
- XCHAL_INTLEVEL1_MASK
 
- XCHAL_INTLEVEL2_ANDBELOW_MASK
 
- XCHAL_INTLEVEL2_MASK
 
- XCHAL_INTLEVEL2_NUM
 
- XCHAL_INTLEVEL2_VECOFS
 
- XCHAL_INTLEVEL2_VECTOR_PADDR
 
- XCHAL_INTLEVEL2_VECTOR_VADDR
 
- XCHAL_INTLEVEL3_ANDBELOW_MASK
 
- XCHAL_INTLEVEL3_MASK
 
- XCHAL_INTLEVEL3_VECOFS
 
- XCHAL_INTLEVEL3_VECTOR_PADDR
 
- XCHAL_INTLEVEL3_VECTOR_VADDR
 
- XCHAL_INTLEVEL4_ANDBELOW_MASK
 
- XCHAL_INTLEVEL4_MASK
 
- XCHAL_INTLEVEL4_NUM
 
- XCHAL_INTLEVEL4_VECOFS
 
- XCHAL_INTLEVEL4_VECTOR_PADDR
 
- XCHAL_INTLEVEL4_VECTOR_VADDR
 
- XCHAL_INTLEVEL5_ANDBELOW_MASK
 
- XCHAL_INTLEVEL5_MASK
 
- XCHAL_INTLEVEL5_NUM
 
- XCHAL_INTLEVEL5_VECOFS
 
- XCHAL_INTLEVEL5_VECTOR_PADDR
 
- XCHAL_INTLEVEL5_VECTOR_VADDR
 
- XCHAL_INTLEVEL6_ANDBELOW_MASK
 
- XCHAL_INTLEVEL6_MASK
 
- XCHAL_INTLEVEL6_VECOFS
 
- XCHAL_INTLEVEL6_VECTOR_PADDR
 
- XCHAL_INTLEVEL6_VECTOR_VADDR
 
- XCHAL_INTLEVEL7_ANDBELOW_MASK
 
- XCHAL_INTLEVEL7_MASK
 
- XCHAL_INTLEVEL7_NUM
 
- XCHAL_INTLEVEL7_VECOFS
 
- XCHAL_INTLEVEL7_VECTOR_PADDR
 
- XCHAL_INTLEVEL7_VECTOR_VADDR
 
- XCHAL_INTTYPE_MASK_EXTERN_EDGE
 
- XCHAL_INTTYPE_MASK_EXTERN_LEVEL
 
- XCHAL_INTTYPE_MASK_NMI
 
- XCHAL_INTTYPE_MASK_PROFILING
 
- XCHAL_INTTYPE_MASK_SOFTWARE
 
- XCHAL_INTTYPE_MASK_TIMER
 
- XCHAL_INTTYPE_MASK_UNCONFIGURED
 
- XCHAL_INTTYPE_MASK_WRITE_ERROR
 
- XCHAL_ITLB_ARF_ENTRIES_LOG2
 
- XCHAL_KERNEL_VECOFS
 
- XCHAL_KERNEL_VECTOR_PADDR
 
- XCHAL_KERNEL_VECTOR_VADDR
 
- XCHAL_KIO_BYPASS_VADDR
 
- XCHAL_KIO_CACHED_VADDR
 
- XCHAL_KIO_DEFAULT_PADDR
 
- XCHAL_KIO_PADDR
 
- XCHAL_KIO_SIZE
 
- XCHAL_KIO_TLB_WAY
 
- XCHAL_KSEG_ALIGNMENT
 
- XCHAL_KSEG_BYPASS_VADDR
 
- XCHAL_KSEG_CACHED_VADDR
 
- XCHAL_KSEG_PADDR
 
- XCHAL_KSEG_SIZE
 
- XCHAL_KSEG_TLB_WAY
 
- XCHAL_LOOP_BUFFER_SIZE
 
- XCHAL_MAX_INSTRUCTION_SIZE
 
- XCHAL_MMU_ASID_BITS
 
- XCHAL_MMU_RINGS
 
- XCHAL_MMU_RING_BITS
 
- XCHAL_NCP_NUM_ATMPS
 
- XCHAL_NCP_SA_ALIGN
 
- XCHAL_NCP_SA_LIST
 
- XCHAL_NCP_SA_NUM
 
- XCHAL_NCP_SA_SIZE
 
- XCHAL_NMILEVEL
 
- XCHAL_NMI_INTERRUPT
 
- XCHAL_NMI_VECOFS
 
- XCHAL_NMI_VECTOR_PADDR
 
- XCHAL_NMI_VECTOR_VADDR
 
- XCHAL_NUM_AREGS
 
- XCHAL_NUM_AREGS_LOG2
 
- XCHAL_NUM_CONTEXTS
 
- XCHAL_NUM_DATARAM
 
- XCHAL_NUM_DATAROM
 
- XCHAL_NUM_DBREAK
 
- XCHAL_NUM_EXTINTERRUPTS
 
- XCHAL_NUM_IBREAK
 
- XCHAL_NUM_INSTRAM
 
- XCHAL_NUM_INSTROM
 
- XCHAL_NUM_INTERRUPTS
 
- XCHAL_NUM_INTERRUPTS_LOG2
 
- XCHAL_NUM_INTLEVELS
 
- XCHAL_NUM_LOADSTORE_UNITS
 
- XCHAL_NUM_MISC_REGS
 
- XCHAL_NUM_PERF_COUNTERS
 
- XCHAL_NUM_TIMERS
 
- XCHAL_NUM_URAM
 
- XCHAL_NUM_WRITEBUFFER_ENTRIES
 
- XCHAL_NUM_XLMI
 
- XCHAL_OP0_FORMAT_LENGTHS
 
- XCHAL_PAGE_TABLE_SIZE
 
- XCHAL_PAGE_TABLE_VADDR
 
- XCHAL_PREFETCH_BLOCK_ENTRIES
 
- XCHAL_PREFETCH_CASTOUT_LINES
 
- XCHAL_PREFETCH_ENTRIES
 
- XCHAL_PROFILING_INTERRUPT
 
- XCHAL_RESET_VECBASE_OVERLAP
 
- XCHAL_RESET_VECTOR0_PADDR
 
- XCHAL_RESET_VECTOR0_VADDR
 
- XCHAL_RESET_VECTOR1_PADDR
 
- XCHAL_RESET_VECTOR1_VADDR
 
- XCHAL_RESET_VECTOR_PADDR
 
- XCHAL_RESET_VECTOR_VADDR
 
- XCHAL_SA_NUM_ATMPS
 
- XCHAL_SA_REG
 
- XCHAL_SPANNING_WAY
 
- XCHAL_SW_VERSION
 
- XCHAL_TIMER0_INTERRUPT
 
- XCHAL_TIMER1_INTERRUPT
 
- XCHAL_TIMER2_INTERRUPT
 
- XCHAL_TIMER3_INTERRUPT
 
- XCHAL_TOTAL_SA_ALIGN
 
- XCHAL_TOTAL_SA_SIZE
 
- XCHAL_TRAX_ATB_WIDTH
 
- XCHAL_TRAX_MEM_SHAREABLE
 
- XCHAL_TRAX_MEM_SIZE
 
- XCHAL_TRAX_TIME_WIDTH
 
- XCHAL_UNALIGNED_LOAD_EXCEPTION
 
- XCHAL_UNALIGNED_LOAD_HW
 
- XCHAL_UNALIGNED_STORE_EXCEPTION
 
- XCHAL_UNALIGNED_STORE_HW
 
- XCHAL_USER_VECOFS
 
- XCHAL_USER_VECTOR_PADDR
 
- XCHAL_USER_VECTOR_VADDR
 
- XCHAL_USE_MEMCTL
 
- XCHAL_VECBASE_RESET_PADDR
 
- XCHAL_VECBASE_RESET_VADDR
 
- XCHAL_WINDOW_OF12_VECOFS
 
- XCHAL_WINDOW_OF4_VECOFS
 
- XCHAL_WINDOW_OF8_VECOFS
 
- XCHAL_WINDOW_UF12_VECOFS
 
- XCHAL_WINDOW_UF4_VECOFS
 
- XCHAL_WINDOW_UF8_VECOFS
 
- XCHAL_WINDOW_VECTORS_PADDR
 
- XCHAL_WINDOW_VECTORS_VADDR
 
- XCHAL_XEA_VERSION
 
- XCHAL_XLMI0_ECC_PARITY
 
- XCHAL_XLMI0_PADDR
 
- XCHAL_XLMI0_SIZE
 
- XCHAL_XLMI0_VADDR
 
- XCHECK_SZ
 
- XCHG_FAMILY_TEST
 
- XCHG_GEN
 
- XCHG_SR
 
- XCHK_FSCOUNT_MIN_VARIANCE
 
- XCHK_HAS_QUOTAOFFLOCK
 
- XCHK_REAPING_DISABLED
 
- XCHK_TRY_HARDER
 
- XCKE
 
- XCLE_BYPASS_REG0_ADDR
 
- XCLE_BYPASS_REG1_ADDR
 
- XCLKH_DT
 
- XCLKH_ST
 
- XCLKS_DT
 
- XCLKS_ST
 
- XCLK_CNTL
 
- XCLK_MASK
 
- XCLK_SRC_SEL_MASK
 
- XCLK_VLD
 
- XCMP
 
- XCMPL_MASK
 
- XCMP_MASK
 
- XCM_REG_AGG_CON_CTX
 
- XCM_REG_AG_CTX
 
- XCM_REG_AUX1_Q
 
- XCM_REG_AUX_CNT_FLG_Q_19
 
- XCM_REG_CAM_OCCUP
 
- XCM_REG_CDU_AG_RD_IFEN
 
- XCM_REG_CDU_AG_WR_IFEN
 
- XCM_REG_CDU_SM_RD_IFEN
 
- XCM_REG_CDU_SM_WR_IFEN
 
- XCM_REG_CFC_INIT_CRD
 
- XCM_REG_CON_PHY_Q3_RT_OFFSET
 
- XCM_REG_CP_WEIGHT
 
- XCM_REG_CSEM_IFEN
 
- XCM_REG_CSEM_LENGTH_MIS
 
- XCM_REG_CSEM_WEIGHT
 
- XCM_REG_CTX_RBC_ACCS
 
- XCM_REG_DBG_DWORD_ENABLE
 
- XCM_REG_DBG_FORCE_FRAME
 
- XCM_REG_DBG_FORCE_VALID
 
- XCM_REG_DBG_SELECT
 
- XCM_REG_DBG_SHIFT
 
- XCM_REG_DORQ_IFEN
 
- XCM_REG_DORQ_LENGTH_MIS
 
- XCM_REG_DORQ_WEIGHT
 
- XCM_REG_ERR_EVNT_ID
 
- XCM_REG_ERR_XCM_HDR
 
- XCM_REG_EXPR_EVNT_ID
 
- XCM_REG_FIC0_INIT_CRD
 
- XCM_REG_FIC1_INIT_CRD
 
- XCM_REG_GLB_DEL_ACK_MAX_CNT_0
 
- XCM_REG_GLB_DEL_ACK_MAX_CNT_1
 
- XCM_REG_GLB_DEL_ACK_TMR_VAL_0
 
- XCM_REG_GLB_DEL_ACK_TMR_VAL_1
 
- XCM_REG_GR_ARB_TYPE
 
- XCM_REG_GR_LD0_PR
 
- XCM_REG_GR_LD1_PR
 
- XCM_REG_INIT
 
- XCM_REG_NIG0_IFEN
 
- XCM_REG_NIG0_LENGTH_MIS
 
- XCM_REG_NIG0_WEIGHT
 
- XCM_REG_NIG1_IFEN
 
- XCM_REG_NIG1_LENGTH_MIS
 
- XCM_REG_N_SM_CTX_LD_0
 
- XCM_REG_N_SM_CTX_LD_1
 
- XCM_REG_N_SM_CTX_LD_2
 
- XCM_REG_N_SM_CTX_LD_3
 
- XCM_REG_N_SM_CTX_LD_4
 
- XCM_REG_N_SM_CTX_LD_5
 
- XCM_REG_PBF_IFEN
 
- XCM_REG_PBF_LENGTH_MIS
 
- XCM_REG_PBF_WEIGHT
 
- XCM_REG_PHYS_QNUM3_0
 
- XCM_REG_PHYS_QNUM3_1
 
- XCM_REG_SM_CON_CTX
 
- XCM_REG_STOP_EVNT_ID
 
- XCM_REG_STORM_LENGTH_MIS
 
- XCM_REG_STORM_WEIGHT
 
- XCM_REG_STORM_XCM_IFEN
 
- XCM_REG_TM_INIT_CRD
 
- XCM_REG_TM_WEIGHT
 
- XCM_REG_TM_XCM_HDR
 
- XCM_REG_TM_XCM_IFEN
 
- XCM_REG_TSEM_IFEN
 
- XCM_REG_TSEM_LENGTH_MIS
 
- XCM_REG_TSEM_WEIGHT
 
- XCM_REG_UNA_GT_NXT_Q
 
- XCM_REG_USEM_IFEN
 
- XCM_REG_USEM_LENGTH_MIS
 
- XCM_REG_USEM_WEIGHT
 
- XCM_REG_WU_DA_CNT_CMD00
 
- XCM_REG_WU_DA_CNT_CMD01
 
- XCM_REG_WU_DA_CNT_CMD10
 
- XCM_REG_WU_DA_CNT_CMD11
 
- XCM_REG_WU_DA_CNT_UPD_VAL00
 
- XCM_REG_WU_DA_CNT_UPD_VAL01
 
- XCM_REG_WU_DA_CNT_UPD_VAL10
 
- XCM_REG_WU_DA_CNT_UPD_VAL11
 
- XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00
 
- XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01
 
- XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10
 
- XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11
 
- XCM_REG_XCM_CFC_IFEN
 
- XCM_REG_XCM_INT_MASK
 
- XCM_REG_XCM_INT_STS
 
- XCM_REG_XCM_PRTY_MASK
 
- XCM_REG_XCM_PRTY_STS
 
- XCM_REG_XCM_PRTY_STS_CLR
 
- XCM_REG_XCM_REG0_SZ
 
- XCM_REG_XCM_STORM0_IFEN
 
- XCM_REG_XCM_STORM1_IFEN
 
- XCM_REG_XCM_TM_IFEN
 
- XCM_REG_XCM_XQM_IFEN
 
- XCM_REG_XCM_XQM_USE_Q
 
- XCM_REG_XQM_BYP_ACT_UPD
 
- XCM_REG_XQM_INIT_CRD
 
- XCM_REG_XQM_P_WEIGHT
 
- XCM_REG_XQM_S_WEIGHT
 
- XCM_REG_XQM_XCM_HDR_P
 
- XCM_REG_XQM_XCM_HDR_S
 
- XCM_REG_XQM_XCM_IFEN
 
- XCM_REG_XSDM_IFEN
 
- XCM_REG_XSDM_LENGTH_MIS
 
- XCM_REG_XSDM_WEIGHT
 
- XCM_REG_XX_DESCR_TABLE
 
- XCM_REG_XX_DESCR_TABLE_SIZE
 
- XCM_REG_XX_FREE
 
- XCM_REG_XX_INIT_CRD
 
- XCM_REG_XX_MSG_NUM
 
- XCM_REG_XX_OVFL_EVNT_ID
 
- XCM_REG_XX_TABLE
 
- XCNTXT_MASK
 
- XCOL_DEST_RECV_OP
 
- XCOL_SOURCE_RECV_OP
 
- XCOMPAND
 
- XCOMP_BV_COMPACTED_FORMAT
 
- XCOPY_CSCD_DESC_ID_LIST_OFF_MAX
 
- XCOPY_HDR_LEN
 
- XCOPY_MAX_SECTORS
 
- XCOPY_NAA_IEEE_REGEX_LEN
 
- XCOPY_SEGMENT_DESC_LEN
 
- XCOPY_TARGET_DESC_LEN
 
- XCR
 
- XCRB
 
- XCRB_msg_to_type6CPRB_msgX
 
- XCRI
 
- XCRL
 
- XCRT_CNT_EN
 
- XCR_RXOIE
 
- XCR_TXOIE
 
- XCR_XFEATURE_ENABLED_MASK
 
- XCT_COPY_DTY_PREF
 
- XCT_COPY_E
 
- XCT_COPY_I
 
- XCT_COPY_LLEN
 
- XCT_COPY_LLEN_M
 
- XCT_COPY_LLEN_S
 
- XCT_COPY_O
 
- XCT_COPY_RR_24BRES
 
- XCT_COPY_RR_40BRES
 
- XCT_COPY_RR_8BRES
 
- XCT_COPY_RR_M
 
- XCT_COPY_RR_NORES
 
- XCT_COPY_SE
 
- XCT_COPY_ST
 
- XCT_COPY_STY_ZERO
 
- XCT_COPY_T
 
- XCT_FUNRES_8B_CRC_M
 
- XCT_FUNRES_8B_CRC_S
 
- XCT_FUNRES_8B_CS_M
 
- XCT_FUNRES_8B_CS_S
 
- XCT_FUN_A
 
- XCT_FUN_AL2
 
- XCT_FUN_ALG_M
 
- XCT_FUN_BCM_M
 
- XCT_FUN_BCP_M
 
- XCT_FUN_C
 
- XCT_FUN_CHL_M
 
- XCT_FUN_CRM_M
 
- XCT_FUN_CRM_NOP
 
- XCT_FUN_CRM_SIG
 
- XCT_FUN_E
 
- XCT_FUN_FUN
 
- XCT_FUN_FUN_M
 
- XCT_FUN_FUN_S
 
- XCT_FUN_HP
 
- XCT_FUN_HSZ_M
 
- XCT_FUN_I
 
- XCT_FUN_LLEN
 
- XCT_FUN_LLEN_M
 
- XCT_FUN_LLEN_S
 
- XCT_FUN_O
 
- XCT_FUN_RR_24BRES
 
- XCT_FUN_RR_40BRES
 
- XCT_FUN_RR_8BRES
 
- XCT_FUN_RR_M
 
- XCT_FUN_RR_NORES
 
- XCT_FUN_SE
 
- XCT_FUN_SHL
 
- XCT_FUN_SHL_M
 
- XCT_FUN_SHL_S
 
- XCT_FUN_SIG_M
 
- XCT_FUN_SIG_TCP4
 
- XCT_FUN_SIG_TCP6
 
- XCT_FUN_SIG_UDP4
 
- XCT_FUN_SIG_UDP6
 
- XCT_FUN_ST
 
- XCT_FUN_T
 
- XCT_MACRX_CAST_BROAD
 
- XCT_MACRX_CAST_M
 
- XCT_MACRX_CAST_MULTI
 
- XCT_MACRX_CAST_PAUSE
 
- XCT_MACRX_CAST_UNI
 
- XCT_MACRX_CRC
 
- XCT_MACRX_CSUM_M
 
- XCT_MACRX_CSUM_S
 
- XCT_MACRX_E
 
- XCT_MACRX_FF
 
- XCT_MACRX_FM
 
- XCT_MACRX_FS
 
- XCT_MACRX_HTY_IPV4_BAD
 
- XCT_MACRX_HTY_IPV4_OK
 
- XCT_MACRX_HTY_IPV6
 
- XCT_MACRX_HTY_M
 
- XCT_MACRX_HTY_NONIP
 
- XCT_MACRX_IPP_M
 
- XCT_MACRX_IPP_S
 
- XCT_MACRX_LEN_BELOWMIN
 
- XCT_MACRX_LEN_M
 
- XCT_MACRX_LEN_TOOSHORT
 
- XCT_MACRX_LEN_TRUNC
 
- XCT_MACRX_LLEN
 
- XCT_MACRX_LLEN_M
 
- XCT_MACRX_LLEN_S
 
- XCT_MACRX_NB
 
- XCT_MACRX_NB_M
 
- XCT_MACRX_NB_S
 
- XCT_MACRX_O
 
- XCT_MACRX_OB
 
- XCT_MACRX_OD
 
- XCT_MACRX_PF
 
- XCT_MACRX_RR_8BRES
 
- XCT_MACRX_RR_M
 
- XCT_MACRX_RR_NORES
 
- XCT_MACRX_ST
 
- XCT_MACRX_T
 
- XCT_MACRX_VLC_M
 
- XCT_MACTX_24BRES
 
- XCT_MACTX_40BRES
 
- XCT_MACTX_8BRES
 
- XCT_MACTX_AL2
 
- XCT_MACTX_C
 
- XCT_MACTX_CRC_INSERT
 
- XCT_MACTX_CRC_M
 
- XCT_MACTX_CRC_NOP
 
- XCT_MACTX_CRC_PAD
 
- XCT_MACTX_CRC_REPLACE
 
- XCT_MACTX_CSUM_M
 
- XCT_MACTX_CSUM_NOP
 
- XCT_MACTX_CSUM_TCP
 
- XCT_MACTX_CSUM_UDP
 
- XCT_MACTX_E
 
- XCT_MACTX_I
 
- XCT_MACTX_IPH
 
- XCT_MACTX_IPH_M
 
- XCT_MACTX_IPH_S
 
- XCT_MACTX_IPO
 
- XCT_MACTX_IPO_M
 
- XCT_MACTX_IPO_S
 
- XCT_MACTX_LLEN
 
- XCT_MACTX_LLEN_M
 
- XCT_MACTX_LLEN_S
 
- XCT_MACTX_NORES
 
- XCT_MACTX_O
 
- XCT_MACTX_SS
 
- XCT_MACTX_ST
 
- XCT_MACTX_T
 
- XCT_MACTX_V6
 
- XCT_MACTX_VLAN_INSERT
 
- XCT_MACTX_VLAN_M
 
- XCT_MACTX_VLAN_NOP
 
- XCT_MACTX_VLAN_REMOVE
 
- XCT_MACTX_VLAN_REPLACE
 
- XCT_PTR_ADDR
 
- XCT_PTR_ADDR_M
 
- XCT_PTR_ADDR_S
 
- XCT_PTR_LEN
 
- XCT_PTR_LEN_M
 
- XCT_PTR_LEN_S
 
- XCT_PTR_T
 
- XCT_RXB_ADDR
 
- XCT_RXB_ADDR_M
 
- XCT_RXB_ADDR_S
 
- XCT_RXB_LEN
 
- XCT_RXB_LEN_M
 
- XCT_RXB_LEN_S
 
- XCT_RXRES_8B_EVAL_M
 
- XCT_RXRES_8B_EVAL_S
 
- XCT_RXRES_8B_HASH_M
 
- XCT_RXRES_8B_HASH_S
 
- XCT_RXRES_8B_HTYPE_M
 
- XCT_RXRES_8B_L4O_M
 
- XCT_RXRES_8B_L4O_S
 
- XCT_RXRES_8B_RULE_M
 
- XCT_RXRES_8B_RULE_S
 
- XCVR
 
- XCVRDIAG
 
- XCVRIF
 
- XCVR_100baseFx
 
- XCVR_100baseTx
 
- XCVR_10base2
 
- XCVR_10baseT
 
- XCVR_10baseTOnly
 
- XCVR_AUI
 
- XCVR_DECAP_EN
 
- XCVR_DECAP_EN_DEL
 
- XCVR_DIAG_BIDI_CTRL
 
- XCVR_DIAG_HSCLK_DIV
 
- XCVR_DIAG_HSCLK_SEL
 
- XCVR_DIAG_LANE_FCM_EN_MGN
 
- XCVR_DIAG_PLLDRC_CTRL
 
- XCVR_DUMMY1
 
- XCVR_DUMMY2
 
- XCVR_DUMMY3
 
- XCVR_Default
 
- XCVR_EXTERNAL
 
- XCVR_ExtMII
 
- XCVR_INTERNAL
 
- XCVR_MII
 
- XCVR_NWAY
 
- XCVR_PSM_A0IN_TMR
 
- XCVR_PSM_CAL_TMR
 
- XCVR_PSM_RCTRL
 
- XCV_BATCH_CRD_RET
 
- XCV_COMP_CTL
 
- XCV_CTL
 
- XCV_DLL_CTL
 
- XCV_INBND_STATUS
 
- XCV_INT
 
- XCV_INT_ENA_W1C
 
- XCV_INT_ENA_W1S
 
- XCV_INT_W1S
 
- XCV_RESET
 
- XCWE_VOLUNTARY
 
- XC_CHG_POWER
 
- XC_MAX_I2C_WRITE_LENGTH
 
- XC_POWERCLASS
 
- XC_POWERED_DOWN
 
- XC_PRODUCT_ID_FW_LOADED
 
- XC_PRODUCT_ID_FW_NOT_LOADED
 
- XC_PRODUCT_ID_XC4000
 
- XC_PRODUCT_ID_XC4100
 
- XC_RF_MODE_AIR
 
- XC_RF_MODE_CABLE
 
- XC_TUNE_ANALOG
 
- XC_TUNE_DIGITAL
 
- XC_TV_STANDARD
 
- XDATA
 
- XDATDLY
 
- XDBC_DBCC_ENTRY_NUM
 
- XDBC_DEVICE_REV
 
- XDBC_EPID_IN
 
- XDBC_EPID_IN_INTEL
 
- XDBC_EPID_OUT
 
- XDBC_EPID_OUT_INTEL
 
- XDBC_ERST_ENTRY_NUM
 
- XDBC_FLAGS_CONFIGURED
 
- XDBC_FLAGS_INITIALIZED
 
- XDBC_FLAGS_IN_PROCESS
 
- XDBC_FLAGS_IN_STALL
 
- XDBC_FLAGS_OUT_PROCESS
 
- XDBC_FLAGS_OUT_STALL
 
- XDBC_INFO_CONTEXT_SIZE
 
- XDBC_MAX_PACKET
 
- XDBC_MAX_STRING_LENGTH
 
- XDBC_PCI_MAX_BUSES
 
- XDBC_PCI_MAX_DEVICES
 
- XDBC_PCI_MAX_FUNCTION
 
- XDBC_PRODUCT_ID
 
- XDBC_PROTOCOL
 
- XDBC_STRING_ENTRY_NUM
 
- XDBC_STRING_MANUFACTURER
 
- XDBC_STRING_PRODUCT
 
- XDBC_STRING_SERIAL
 
- XDBC_TABLE_ENTRY_SIZE
 
- XDBC_TRBS_PER_SEGMENT
 
- XDBC_VENDOR_ID
 
- XDEV_COMP_MODE
 
- XDEV_DISABLED
 
- XDEV_FS
 
- XDEV_HOT_RESET
 
- XDEV_HS
 
- XDEV_INACTIVE
 
- XDEV_LS
 
- XDEV_POLLING
 
- XDEV_RECOVERY
 
- XDEV_RESUME
 
- XDEV_RXDETECT
 
- XDEV_SS
 
- XDEV_SSP
 
- XDEV_TEST_MODE
 
- XDEV_U0
 
- XDEV_U1
 
- XDEV_U2
 
- XDEV_U3
 
- XDISABLE
 
- XDLL_CNTL
 
- XDMAEN
 
- XDMA_AON_TEST_DEBUG_DATA__XDMA_AON_TEST_DEBUG_DATA_MASK
 
- XDMA_AON_TEST_DEBUG_DATA__XDMA_AON_TEST_DEBUG_DATA__SHIFT
 
- XDMA_AON_TEST_DEBUG_INDEX__XDMA_AON_TEST_DEBUG_INDEX_MASK
 
- XDMA_AON_TEST_DEBUG_INDEX__XDMA_AON_TEST_DEBUG_INDEX__SHIFT
 
- XDMA_AON_TEST_DEBUG_INDEX__XDMA_AON_TEST_DEBUG_WRITE_EN_MASK
 
- XDMA_AON_TEST_DEBUG_INDEX__XDMA_AON_TEST_DEBUG_WRITE_EN__SHIFT
 
- XDMA_AON_TEST_DEBUG_INDEX__XDMA_DEBUG_OUT_EN_MASK
 
- XDMA_AON_TEST_DEBUG_INDEX__XDMA_DEBUG_OUT_EN__SHIFT
 
- XDMA_AON_TEST_DEBUG_INDEX__XDMA_DEBUG_SEL_MASK
 
- XDMA_AON_TEST_DEBUG_INDEX__XDMA_DEBUG_SEL__SHIFT
 
- XDMA_BASE__INST0_SEG0
 
- XDMA_BASE__INST0_SEG1
 
- XDMA_BASE__INST0_SEG2
 
- XDMA_BASE__INST0_SEG3
 
- XDMA_BASE__INST0_SEG4
 
- XDMA_BASE__INST0_SEG5
 
- XDMA_BASE__INST1_SEG0
 
- XDMA_BASE__INST1_SEG1
 
- XDMA_BASE__INST1_SEG2
 
- XDMA_BASE__INST1_SEG3
 
- XDMA_BASE__INST1_SEG4
 
- XDMA_BASE__INST1_SEG5
 
- XDMA_BASE__INST2_SEG0
 
- XDMA_BASE__INST2_SEG1
 
- XDMA_BASE__INST2_SEG2
 
- XDMA_BASE__INST2_SEG3
 
- XDMA_BASE__INST2_SEG4
 
- XDMA_BASE__INST2_SEG5
 
- XDMA_BASE__INST3_SEG0
 
- XDMA_BASE__INST3_SEG1
 
- XDMA_BASE__INST3_SEG2
 
- XDMA_BASE__INST3_SEG3
 
- XDMA_BASE__INST3_SEG4
 
- XDMA_BASE__INST3_SEG5
 
- XDMA_BASE__INST4_SEG0
 
- XDMA_BASE__INST4_SEG1
 
- XDMA_BASE__INST4_SEG2
 
- XDMA_BASE__INST4_SEG3
 
- XDMA_BASE__INST4_SEG4
 
- XDMA_BASE__INST4_SEG5
 
- XDMA_BASE__INST5_SEG0
 
- XDMA_BASE__INST5_SEG1
 
- XDMA_BASE__INST5_SEG2
 
- XDMA_BASE__INST5_SEG3
 
- XDMA_BASE__INST5_SEG4
 
- XDMA_BASE__INST5_SEG5
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_GATE_DIS_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_GATE_DIS__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_0_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_0__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_1_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_1__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_2_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_2__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_3_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_3__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_4_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_4__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_5_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_5__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MSTAT_GATE_DIS_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_MSTAT_GATE_DIS__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_SDYN_GATE_DIS_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_SDYN_GATE_DIS__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_SSTAT_GATE_DIS_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_G_SSTAT_GATE_DIS__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_REG_GATE_DIS_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_REG_GATE_DIS__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_TURN_OFF_DELAY_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_TURN_OFF_DELAY__SHIFT
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_TURN_ON_DELAY_MASK
 
- XDMA_CLOCK_GATING_CNTL__XDMA_SCLK_TURN_ON_DELAY__SHIFT
 
- XDMA_EN
 
- XDMA_HWID
 
- XDMA_IF_BIF_STATUS__XDMA_IF_BIF_ERROR_CLEAR_MASK
 
- XDMA_IF_BIF_STATUS__XDMA_IF_BIF_ERROR_CLEAR__SHIFT
 
- XDMA_IF_BIF_STATUS__XDMA_IF_BIF_ERROR_STATUS_MASK
 
- XDMA_IF_BIF_STATUS__XDMA_IF_BIF_ERROR_STATUS__SHIFT
 
- XDMA_IF_STATUS__XDMA_MC_PCIEWR_BUSY_MASK
 
- XDMA_IF_STATUS__XDMA_MC_PCIEWR_BUSY__SHIFT
 
- XDMA_INTERRUPT__XDMA_MSTR_MEM_URGENT_ACK_MASK
 
- XDMA_INTERRUPT__XDMA_MSTR_MEM_URGENT_ACK__SHIFT
 
- XDMA_INTERRUPT__XDMA_MSTR_MEM_URGENT_MASK_MASK
 
- XDMA_INTERRUPT__XDMA_MSTR_MEM_URGENT_MASK__SHIFT
 
- XDMA_INTERRUPT__XDMA_MSTR_MEM_URGENT_STAT_MASK
 
- XDMA_INTERRUPT__XDMA_MSTR_MEM_URGENT_STAT__SHIFT
 
- XDMA_INTERRUPT__XDMA_MSTR_UNDERFLOW_ACK_MASK
 
- XDMA_INTERRUPT__XDMA_MSTR_UNDERFLOW_ACK__SHIFT
 
- XDMA_INTERRUPT__XDMA_MSTR_UNDERFLOW_MASK_MASK
 
- XDMA_INTERRUPT__XDMA_MSTR_UNDERFLOW_MASK__SHIFT
 
- XDMA_INTERRUPT__XDMA_MSTR_UNDERFLOW_STAT_MASK
 
- XDMA_INTERRUPT__XDMA_MSTR_UNDERFLOW_STAT__SHIFT
 
- XDMA_INTERRUPT__XDMA_PERF_MEAS_ACK_MASK
 
- XDMA_INTERRUPT__XDMA_PERF_MEAS_ACK__SHIFT
 
- XDMA_INTERRUPT__XDMA_PERF_MEAS_MASK_MASK
 
- XDMA_INTERRUPT__XDMA_PERF_MEAS_MASK__SHIFT
 
- XDMA_INTERRUPT__XDMA_PERF_MEAS_STAT_MASK
 
- XDMA_INTERRUPT__XDMA_PERF_MEAS_STAT__SHIFT
 
- XDMA_INTERRUPT__XDMA_SLV_READ_URGENT_ACK_MASK
 
- XDMA_INTERRUPT__XDMA_SLV_READ_URGENT_ACK__SHIFT
 
- XDMA_INTERRUPT__XDMA_SLV_READ_URGENT_MASK_MASK
 
- XDMA_INTERRUPT__XDMA_SLV_READ_URGENT_MASK__SHIFT
 
- XDMA_INTERRUPT__XDMA_SLV_READ_URGENT_STAT_MASK
 
- XDMA_INTERRUPT__XDMA_SLV_READ_URGENT_STAT__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_ARRAY_MODE_MASK
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_ARRAY_MODE__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_BANK_HEIGHT_MASK
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_BANK_HEIGHT__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_BANK_WIDTH_MASK
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_BANK_WIDTH__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_MACRO_TILE_ASPECT_MASK
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_MACRO_TILE_ASPECT__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_NUM_BANKS_MASK
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_NUM_BANKS__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_TILE_SPLIT_MASK
 
- XDMA_LOCAL_SURFACE_TILING1__XDMA_LOCAL_TILE_SPLIT__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING2__XDMA_LOCAL_MICRO_TILE_MODE_MASK
 
- XDMA_LOCAL_SURFACE_TILING2__XDMA_LOCAL_MICRO_TILE_MODE__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING2__XDMA_LOCAL_PIPE_CONFIG_MASK
 
- XDMA_LOCAL_SURFACE_TILING2__XDMA_LOCAL_PIPE_CONFIG__SHIFT
 
- XDMA_LOCAL_SURFACE_TILING2__XDMA_LOCAL_PIPE_INTERLEAVE_SIZE_MASK
 
- XDMA_LOCAL_SURFACE_TILING2__XDMA_LOCAL_PIPE_INTERLEAVE_SIZE__SHIFT
 
- XDMA_LOCAL_SW_MODE_SW_256B_D
 
- XDMA_LOCAL_SW_MODE_SW_64KB_D
 
- XDMA_LOCAL_SW_MODE_SW_64KB_D_X
 
- XDMA_MC_PCIE_CLIENT_CONFIG__XDMA_MC_PCIE_PRIV_MASK
 
- XDMA_MC_PCIE_CLIENT_CONFIG__XDMA_MC_PCIE_PRIV__SHIFT
 
- XDMA_MC_PCIE_CLIENT_CONFIG__XDMA_MC_PCIE_SWAP_MASK
 
- XDMA_MC_PCIE_CLIENT_CONFIG__XDMA_MC_PCIE_SWAP__SHIFT
 
- XDMA_MC_PCIE_CLIENT_CONFIG__XDMA_MC_PCIE_VMID_MASK
 
- XDMA_MC_PCIE_CLIENT_CONFIG__XDMA_MC_PCIE_VMID__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_CORE_IDLE_STATE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_CORE_IDLE_STATE__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_BIF_STATE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_BIF_STATE__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_BIF_TRANS_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_BIF_TRANS__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_IDLE_STATE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_IDLE_STATE__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_PCIE_STATE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_PCIE_STATE__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_PCIE_TRANS_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_PCIE_TRANS__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_RD_STATE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_RD_STATE__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_RD_TRANS_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_RD_TRANS__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_WR_STATE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_WR_STATE__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_WR_TRANS_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_IF_WR_TRANS__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_LIGHT_SLEEP_DIS_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_LIGHT_SLEEP_DIS__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_LIGHT_SLEEP_MODE_FORCE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_LIGHT_SLEEP_MODE_FORCE__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_POWER_STATE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_POWER_STATE__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_SHUTDOWN_DIS_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_SHUTDOWN_DIS__SHIFT
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_SHUTDOWN_MODE_FORCE_MASK
 
- XDMA_MEM_POWER_CNTL__XDMA_MEM_SHUTDOWN_MODE_FORCE__SHIFT
 
- XDMA_MSTR_ALPHA_POSITION_15_8
 
- XDMA_MSTR_ALPHA_POSITION_23_16
 
- XDMA_MSTR_ALPHA_POSITION_31_24
 
- XDMA_MSTR_ALPHA_POSITION_7_0
 
- XDMA_MSTR_CACHE_BASE_ADDR_HIGH__XDMA_MSTR_CACHE_BASE_ADDR_HIGH_MASK
 
- XDMA_MSTR_CACHE_BASE_ADDR_HIGH__XDMA_MSTR_CACHE_BASE_ADDR_HIGH__SHIFT
 
- XDMA_MSTR_CACHE_BASE_ADDR__XDMA_MSTR_CACHE_BASE_ADDR_MASK
 
- XDMA_MSTR_CACHE_BASE_ADDR__XDMA_MSTR_CACHE_BASE_ADDR__SHIFT
 
- XDMA_MSTR_CACHE_PITCH__XDMA_MSTR_CACHE_PITCH_MASK
 
- XDMA_MSTR_CACHE_PITCH__XDMA_MSTR_CACHE_PITCH__SHIFT
 
- XDMA_MSTR_CACHE__XDMA_MSTR_CACHE_PITCH_MASK
 
- XDMA_MSTR_CACHE__XDMA_MSTR_CACHE_PITCH__SHIFT
 
- XDMA_MSTR_CACHE__XDMA_MSTR_CACHE_TLB_PG_STATE_MASK
 
- XDMA_MSTR_CACHE__XDMA_MSTR_CACHE_TLB_PG_STATE__SHIFT
 
- XDMA_MSTR_CACHE__XDMA_MSTR_CACHE_TLB_PG_TRANS_MASK
 
- XDMA_MSTR_CACHE__XDMA_MSTR_CACHE_TLB_PG_TRANS__SHIFT
 
- XDMA_MSTR_CHANNEL_DIM__XDMA_MSTR_CHANNEL_HEIGHT_MASK
 
- XDMA_MSTR_CHANNEL_DIM__XDMA_MSTR_CHANNEL_HEIGHT__SHIFT
 
- XDMA_MSTR_CHANNEL_DIM__XDMA_MSTR_CHANNEL_WIDTH_MASK
 
- XDMA_MSTR_CHANNEL_DIM__XDMA_MSTR_CHANNEL_WIDTH__SHIFT
 
- XDMA_MSTR_CHANNEL_START__XDMA_MSTR_CHANNEL_START_X_MASK
 
- XDMA_MSTR_CHANNEL_START__XDMA_MSTR_CHANNEL_START_X__SHIFT
 
- XDMA_MSTR_CHANNEL_START__XDMA_MSTR_CHANNEL_START_Y_MASK
 
- XDMA_MSTR_CHANNEL_START__XDMA_MSTR_CHANNEL_START_Y__SHIFT
 
- XDMA_MSTR_CMD_URGENT_CNTL__XDMA_MSTR_CMD_CLIENT_STALL_MASK
 
- XDMA_MSTR_CMD_URGENT_CNTL__XDMA_MSTR_CMD_CLIENT_STALL__SHIFT
 
- XDMA_MSTR_CMD_URGENT_CNTL__XDMA_MSTR_CMD_STALL_DELAY_MASK
 
- XDMA_MSTR_CMD_URGENT_CNTL__XDMA_MSTR_CMD_STALL_DELAY__SHIFT
 
- XDMA_MSTR_CMD_URGENT_CNTL__XDMA_MSTR_CMD_URGENT_LEVEL_MASK
 
- XDMA_MSTR_CMD_URGENT_CNTL__XDMA_MSTR_CMD_URGENT_LEVEL__SHIFT
 
- XDMA_MSTR_CNTL__XDMA_MSTR_ALPHA_POSITION_MASK
 
- XDMA_MSTR_CNTL__XDMA_MSTR_ALPHA_POSITION__SHIFT
 
- XDMA_MSTR_CNTL__XDMA_MSTR_BIF_STALL_EN_MASK
 
- XDMA_MSTR_CNTL__XDMA_MSTR_BIF_STALL_EN__SHIFT
 
- XDMA_MSTR_CNTL__XDMA_MSTR_DEBUG_MODE_MASK
 
- XDMA_MSTR_CNTL__XDMA_MSTR_DEBUG_MODE__SHIFT
 
- XDMA_MSTR_CNTL__XDMA_MSTR_ENABLE_MASK
 
- XDMA_MSTR_CNTL__XDMA_MSTR_ENABLE__SHIFT
 
- XDMA_MSTR_CNTL__XDMA_MSTR_LAT_TEST_EN_MASK
 
- XDMA_MSTR_CNTL__XDMA_MSTR_LAT_TEST_EN__SHIFT
 
- XDMA_MSTR_CNTL__XDMA_MSTR_MEM_READY_MASK
 
- XDMA_MSTR_CNTL__XDMA_MSTR_MEM_READY__SHIFT
 
- XDMA_MSTR_CNTL__XDMA_MSTR_SOFT_RESET_MASK
 
- XDMA_MSTR_CNTL__XDMA_MSTR_SOFT_RESET__SHIFT
 
- XDMA_MSTR_HEIGHT__XDMA_MSTR_ACTIVE_HEIGHT_MASK
 
- XDMA_MSTR_HEIGHT__XDMA_MSTR_ACTIVE_HEIGHT__SHIFT
 
- XDMA_MSTR_HEIGHT__XDMA_MSTR_FRAME_HEIGHT_MASK
 
- XDMA_MSTR_HEIGHT__XDMA_MSTR_FRAME_HEIGHT__SHIFT
 
- XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_HIGH__XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_HIGH_MASK
 
- XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_HIGH__XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_HIGH__SHIFT
 
- XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR__XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_MASK
 
- XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR__XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR__SHIFT
 
- XDMA_MSTR_LOCAL_SURFACE_PITCH__XDMA_MSTR_LOCAL_SURFACE_PITCH_MASK
 
- XDMA_MSTR_LOCAL_SURFACE_PITCH__XDMA_MSTR_LOCAL_SURFACE_PITCH__SHIFT
 
- XDMA_MSTR_MEM_CLIENT_CONFIG__XDMA_MSTR_MEM_CLIENT_PRIV_MASK
 
- XDMA_MSTR_MEM_CLIENT_CONFIG__XDMA_MSTR_MEM_CLIENT_PRIV__SHIFT
 
- XDMA_MSTR_MEM_CLIENT_CONFIG__XDMA_MSTR_MEM_CLIENT_SWAP_MASK
 
- XDMA_MSTR_MEM_CLIENT_CONFIG__XDMA_MSTR_MEM_CLIENT_SWAP__SHIFT
 
- XDMA_MSTR_MEM_CLIENT_CONFIG__XDMA_MSTR_MEM_CLIENT_VMID_MASK
 
- XDMA_MSTR_MEM_CLIENT_CONFIG__XDMA_MSTR_MEM_CLIENT_VMID__SHIFT
 
- XDMA_MSTR_MEM_NACK_STATUS__XDMA_MSTR_MEM_NACK_CLR_MASK
 
- XDMA_MSTR_MEM_NACK_STATUS__XDMA_MSTR_MEM_NACK_CLR__SHIFT
 
- XDMA_MSTR_MEM_NACK_STATUS__XDMA_MSTR_MEM_NACK_MASK
 
- XDMA_MSTR_MEM_NACK_STATUS__XDMA_MSTR_MEM_NACK_TAG_MASK
 
- XDMA_MSTR_MEM_NACK_STATUS__XDMA_MSTR_MEM_NACK_TAG__SHIFT
 
- XDMA_MSTR_MEM_NACK_STATUS__XDMA_MSTR_MEM_NACK__SHIFT
 
- XDMA_MSTR_MEM_OVERFLOW_CNTL__XDMA_MSTR_OVERFLOW_BP_ENABLE_MASK
 
- XDMA_MSTR_MEM_OVERFLOW_CNTL__XDMA_MSTR_OVERFLOW_BP_ENABLE__SHIFT
 
- XDMA_MSTR_MEM_OVERFLOW_CNTL__XDMA_MSTR_OVERFLOW_COUNT_ENABLE_MASK
 
- XDMA_MSTR_MEM_OVERFLOW_CNTL__XDMA_MSTR_OVERFLOW_COUNT_ENABLE__SHIFT
 
- XDMA_MSTR_MEM_OVERFLOW_CNTL__XDMA_MSTR_OVERFLOW_COUNT_MASK
 
- XDMA_MSTR_MEM_OVERFLOW_CNTL__XDMA_MSTR_OVERFLOW_COUNT__SHIFT
 
- XDMA_MSTR_MEM_OVERFLOW_CNTL__XDMA_MSTR_OVERFLOW_THRESHOLD_MASK
 
- XDMA_MSTR_MEM_OVERFLOW_CNTL__XDMA_MSTR_OVERFLOW_THRESHOLD__SHIFT
 
- XDMA_MSTR_MEM_UNDERFLOW_CNTL__XDMA_MSTR_UNDERFLOW_COUNT_MASK
 
- XDMA_MSTR_MEM_UNDERFLOW_CNTL__XDMA_MSTR_UNDERFLOW_COUNT__SHIFT
 
- XDMA_MSTR_MEM_UNDERFLOW_CNTL__XDMA_MSTR_UNDERFLOW_DETECT_ENABLE_MASK
 
- XDMA_MSTR_MEM_UNDERFLOW_CNTL__XDMA_MSTR_UNDERFLOW_DETECT_ENABLE__SHIFT
 
- XDMA_MSTR_MEM_UNDERFLOW_CNTL__XDMA_MSTR_UNDERFLOW_THRESHOLD_MASK
 
- XDMA_MSTR_MEM_UNDERFLOW_CNTL__XDMA_MSTR_UNDERFLOW_THRESHOLD__SHIFT
 
- XDMA_MSTR_MEM_UNDERFLOW_CONFIG__XDMA_MSTR_UNDERFLOW_LIMIT_MASK
 
- XDMA_MSTR_MEM_UNDERFLOW_CONFIG__XDMA_MSTR_UNDERFLOW_LIMIT__SHIFT
 
- XDMA_MSTR_MEM_UNDERFLOW_CONFIG__XDMA_MSTR_UNDERFLOW_TIMER_MASK
 
- XDMA_MSTR_MEM_UNDERFLOW_CONFIG__XDMA_MSTR_UNDERFLOW_TIMER__SHIFT
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_CLIENT_STALL_MASK
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_CLIENT_STALL__SHIFT
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_STALL_DELAY_MASK
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_STALL_DELAY__SHIFT
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_URGENT_LEVEL_MASK
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_URGENT_LEVEL__SHIFT
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_URGENT_LIMIT_MASK
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_URGENT_LIMIT__SHIFT
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_URGENT_TIMER_MASK
 
- XDMA_MSTR_MEM_URGENT_CNTL__XDMA_MSTR_MEM_URGENT_TIMER__SHIFT
 
- XDMA_MSTR_PCIE_NACK_STATUS__XDMA_MSTR_PCIE_NACK_CLR_MASK
 
- XDMA_MSTR_PCIE_NACK_STATUS__XDMA_MSTR_PCIE_NACK_CLR__SHIFT
 
- XDMA_MSTR_PCIE_NACK_STATUS__XDMA_MSTR_PCIE_NACK_MASK
 
- XDMA_MSTR_PCIE_NACK_STATUS__XDMA_MSTR_PCIE_NACK_TAG_MASK
 
- XDMA_MSTR_PCIE_NACK_STATUS__XDMA_MSTR_PCIE_NACK_TAG__SHIFT
 
- XDMA_MSTR_PCIE_NACK_STATUS__XDMA_MSTR_PCIE_NACK__SHIFT
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_CACHE_BW_COUNTER_RST_MASK
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_CACHE_BW_COUNTER_RST__SHIFT
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_CACHE_BW_MEAS_ITER_MASK
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_CACHE_BW_MEAS_ITER__SHIFT
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_CACHE_BW_SEGID_SEL_MASK
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_CACHE_BW_SEGID_SEL__SHIFT
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_LT_COUNTER_RST_MASK
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_LT_COUNTER_RST__SHIFT
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_LT_MEAS_ITER_MASK
 
- XDMA_MSTR_PERFMEAS_CNTL__XDMA_MSTR_LT_MEAS_ITER__SHIFT
 
- XDMA_MSTR_PERFMEAS_STATUS__XDMA_MSTR_PERFMEAS_DATA_MASK
 
- XDMA_MSTR_PERFMEAS_STATUS__XDMA_MSTR_PERFMEAS_DATA__SHIFT
 
- XDMA_MSTR_PERFMEAS_STATUS__XDMA_MSTR_PERFMEAS_INDEX_MASK
 
- XDMA_MSTR_PERFMEAS_STATUS__XDMA_MSTR_PERFMEAS_INDEX_MODE_MASK
 
- XDMA_MSTR_PERFMEAS_STATUS__XDMA_MSTR_PERFMEAS_INDEX_MODE__SHIFT
 
- XDMA_MSTR_PERFMEAS_STATUS__XDMA_MSTR_PERFMEAS_INDEX__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_CACHE_INVALIDATE_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_CACHE_INVALIDATE__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_CACHE_LINES_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_CACHE_LINES__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_FLIP_MODE_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_FLIP_MODE__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_GSL_GROUP_MASTER_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_GSL_GROUP_MASTER__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_HSYNC_GSL_GROUP_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_HSYNC_GSL_GROUP__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_ACTIVE_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_ACTIVE__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_FLIP_PENDING_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_FLIP_PENDING__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_FLUSHING_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_FLUSHING__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_FRAME_MODE_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_FRAME_MODE__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_SOFT_RESET_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_PIPE_SOFT_RESET__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_READ_REQUEST_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_READ_REQUEST__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_REQUEST_CHANNEL_ID_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_REQUEST_CHANNEL_ID__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_REQUEST_MIN_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_REQUEST_MIN__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_SUPERAA_ENABLE_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_SUPERAA_ENABLE__SHIFT
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_VSYNC_GSL_ENABLE_MASK
 
- XDMA_MSTR_PIPE_CNTL__XDMA_MSTR_VSYNC_GSL_ENABLE__SHIFT
 
- XDMA_MSTR_READ_COMMAND__XDMA_MSTR_REQUEST_PREFETCH_MASK
 
- XDMA_MSTR_READ_COMMAND__XDMA_MSTR_REQUEST_PREFETCH__SHIFT
 
- XDMA_MSTR_READ_COMMAND__XDMA_MSTR_REQUEST_SIZE_MASK
 
- XDMA_MSTR_READ_COMMAND__XDMA_MSTR_REQUEST_SIZE__SHIFT
 
- XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH_MASK
 
- XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__SHIFT
 
- XDMA_MSTR_REMOTE_GPU_ADDRESS__XDMA_MSTR_REMOTE_GPU_ADDRESS_MASK
 
- XDMA_MSTR_REMOTE_GPU_ADDRESS__XDMA_MSTR_REMOTE_GPU_ADDRESS__SHIFT
 
- XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH_MASK
 
- XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__SHIFT
 
- XDMA_MSTR_REMOTE_SURFACE_BASE__XDMA_MSTR_REMOTE_SURFACE_BASE_MASK
 
- XDMA_MSTR_REMOTE_SURFACE_BASE__XDMA_MSTR_REMOTE_SURFACE_BASE__SHIFT
 
- XDMA_MSTR_STATUS__XDMA_MSTR_STATUS_SELECT_MASK
 
- XDMA_MSTR_STATUS__XDMA_MSTR_STATUS_SELECT__SHIFT
 
- XDMA_MSTR_STATUS__XDMA_MSTR_VCOUNT_CURRENT_MASK
 
- XDMA_MSTR_STATUS__XDMA_MSTR_VCOUNT_CURRENT__SHIFT
 
- XDMA_MSTR_STATUS__XDMA_MSTR_WRITE_LINE_CURRENT_MASK
 
- XDMA_MSTR_STATUS__XDMA_MSTR_WRITE_LINE_CURRENT__SHIFT
 
- XDMA_MSTR_VSYNC_GSL_CHECK_SEL_PIPE0
 
- XDMA_MSTR_VSYNC_GSL_CHECK_SEL_PIPE1
 
- XDMA_MSTR_VSYNC_GSL_CHECK_SEL_PIPE2
 
- XDMA_MSTR_VSYNC_GSL_CHECK_SEL_PIPE3
 
- XDMA_MSTR_VSYNC_GSL_CHECK_SEL_PIPE4
 
- XDMA_MSTR_VSYNC_GSL_CHECK_SEL_PIPE5
 
- XDMA_MSTR_VSYNC_GSL_CHECK__XDMA_MSTR_VSYNC_GSL_CHECK_SEL_MASK
 
- XDMA_MSTR_VSYNC_GSL_CHECK__XDMA_MSTR_VSYNC_GSL_CHECK_SEL__SHIFT
 
- XDMA_MSTR_VSYNC_GSL_CHECK__XDMA_MSTR_VSYNC_GSL_CHECK_V_COUNT_MASK
 
- XDMA_MSTR_VSYNC_GSL_CHECK__XDMA_MSTR_VSYNC_GSL_CHECK_V_COUNT__SHIFT
 
- XDMA_PERF_MEAS_STATUS__XDMA_PERF_MEAS_STATUS_MASK
 
- XDMA_PERF_MEAS_STATUS__XDMA_PERF_MEAS_STATUS__SHIFT
 
- XDMA_PG_CONTROL__XDMA_PG_CONTROL_MASK
 
- XDMA_PG_CONTROL__XDMA_PG_CONTROL__SHIFT
 
- XDMA_PG_STATUS__XDMA_PGFSM_READ_READY_MASK
 
- XDMA_PG_STATUS__XDMA_PGFSM_READ_READY__SHIFT
 
- XDMA_PG_STATUS__XDMA_SERDES_BUSY_MASK
 
- XDMA_PG_STATUS__XDMA_SERDES_BUSY__SHIFT
 
- XDMA_PG_STATUS__XDMA_SERDES_RDATA_MASK
 
- XDMA_PG_STATUS__XDMA_SERDES_RDATA__SHIFT
 
- XDMA_PG_STATUS__XDMA_SERDES_SMU_POWER_STATUS_MASK
 
- XDMA_PG_STATUS__XDMA_SERDES_SMU_POWER_STATUS__SHIFT
 
- XDMA_PG_WDATA__XDMA_PG_WDATA_MASK
 
- XDMA_PG_WDATA__XDMA_PG_WDATA__SHIFT
 
- XDMA_RBBMIF_RDWR_CNTL__XDMA_RBBMIF_RDWR_DELAY_MASK
 
- XDMA_RBBMIF_RDWR_CNTL__XDMA_RBBMIF_RDWR_DELAY__SHIFT
 
- XDMA_RBBMIF_RDWR_CNTL__XDMA_RBBMIF_RDWR_TIMEOUT_DIS_MASK
 
- XDMA_RBBMIF_RDWR_CNTL__XDMA_RBBMIF_RDWR_TIMEOUT_DIS__SHIFT
 
- XDMA_RBBMIF_RDWR_CNTL__XDMA_RBBMIF_TIMEOUT_DELAY_MASK
 
- XDMA_RBBMIF_RDWR_CNTL__XDMA_RBBMIF_TIMEOUT_DELAY__SHIFT
 
- XDMA_SLV_ALPHA_POSITION_15_8
 
- XDMA_SLV_ALPHA_POSITION_23_16
 
- XDMA_SLV_ALPHA_POSITION_31_24
 
- XDMA_SLV_ALPHA_POSITION_7_0
 
- XDMA_SLV_CHANNEL_CNTL__XDMA_SLV_CHANNEL_ACTIVE_MASK
 
- XDMA_SLV_CHANNEL_CNTL__XDMA_SLV_CHANNEL_ACTIVE__SHIFT
 
- XDMA_SLV_CHANNEL_CNTL__XDMA_SLV_CHANNEL_SOFT_RESET_MASK
 
- XDMA_SLV_CHANNEL_CNTL__XDMA_SLV_CHANNEL_SOFT_RESET__SHIFT
 
- XDMA_SLV_CHANNEL_CNTL__XDMA_SLV_CHANNEL_WEIGHT_MASK
 
- XDMA_SLV_CHANNEL_CNTL__XDMA_SLV_CHANNEL_WEIGHT__SHIFT
 
- XDMA_SLV_CHANNEL_CNTL__XDMA_SLV_STOP_TRANSFER_MASK
 
- XDMA_SLV_CHANNEL_CNTL__XDMA_SLV_STOP_TRANSFER__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_ACTIVE_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_ACTIVE__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_ALPHA_POSITION_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_ALPHA_POSITION__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_ENABLE_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_ENABLE__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_MEM_READY_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_MEM_READY__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_READ_LAT_TEST_EN_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_READ_LAT_TEST_EN__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_READ_LINES_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_READ_LINES__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_REQ_MAXED_OUT_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_REQ_MAXED_OUT__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_SOFT_RESET_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_SOFT_RESET__SHIFT
 
- XDMA_SLV_CNTL__XDMA_SLV_WB_BURST_RESET_MASK
 
- XDMA_SLV_CNTL__XDMA_SLV_WB_BURST_RESET__SHIFT
 
- XDMA_SLV_FLIP_PENDING__XDMA_SLV_FLIP_PENDING_MASK
 
- XDMA_SLV_FLIP_PENDING__XDMA_SLV_FLIP_PENDING__SHIFT
 
- XDMA_SLV_MEM_CLIENT_CONFIG__XDMA_SLV_MEM_CLIENT_PRIV_MASK
 
- XDMA_SLV_MEM_CLIENT_CONFIG__XDMA_SLV_MEM_CLIENT_PRIV__SHIFT
 
- XDMA_SLV_MEM_CLIENT_CONFIG__XDMA_SLV_MEM_CLIENT_SWAP_MASK
 
- XDMA_SLV_MEM_CLIENT_CONFIG__XDMA_SLV_MEM_CLIENT_SWAP__SHIFT
 
- XDMA_SLV_MEM_CLIENT_CONFIG__XDMA_SLV_MEM_CLIENT_VMID_MASK
 
- XDMA_SLV_MEM_CLIENT_CONFIG__XDMA_SLV_MEM_CLIENT_VMID__SHIFT
 
- XDMA_SLV_MEM_NACK_STATUS__XDMA_SLV_MEM_NACK_CLR_MASK
 
- XDMA_SLV_MEM_NACK_STATUS__XDMA_SLV_MEM_NACK_CLR__SHIFT
 
- XDMA_SLV_MEM_NACK_STATUS__XDMA_SLV_MEM_NACK_MASK
 
- XDMA_SLV_MEM_NACK_STATUS__XDMA_SLV_MEM_NACK_TAG_MASK
 
- XDMA_SLV_MEM_NACK_STATUS__XDMA_SLV_MEM_NACK_TAG__SHIFT
 
- XDMA_SLV_MEM_NACK_STATUS__XDMA_SLV_MEM_NACK__SHIFT
 
- XDMA_SLV_PCIE_NACK_STATUS__XDMA_SLV_PCIE_NACK_CLR_MASK
 
- XDMA_SLV_PCIE_NACK_STATUS__XDMA_SLV_PCIE_NACK_CLR__SHIFT
 
- XDMA_SLV_PCIE_NACK_STATUS__XDMA_SLV_PCIE_NACK_MASK
 
- XDMA_SLV_PCIE_NACK_STATUS__XDMA_SLV_PCIE_NACK_TAG_MASK
 
- XDMA_SLV_PCIE_NACK_STATUS__XDMA_SLV_PCIE_NACK_TAG__SHIFT
 
- XDMA_SLV_PCIE_NACK_STATUS__XDMA_SLV_PCIE_NACK__SHIFT
 
- XDMA_SLV_RDRET_BUF_STATUS__XDMA_SLV_RDRET_BUF_SIZE_MASK
 
- XDMA_SLV_RDRET_BUF_STATUS__XDMA_SLV_RDRET_BUF_SIZE__SHIFT
 
- XDMA_SLV_RDRET_BUF_STATUS__XDMA_SLV_RDRET_FREE_ENTRIES_MASK
 
- XDMA_SLV_RDRET_BUF_STATUS__XDMA_SLV_RDRET_FREE_ENTRIES__SHIFT
 
- XDMA_SLV_RDRET_BUF_STATUS__XDMA_SLV_RDRET_PG_STATE_MASK
 
- XDMA_SLV_RDRET_BUF_STATUS__XDMA_SLV_RDRET_PG_STATE__SHIFT
 
- XDMA_SLV_RDRET_BUF_STATUS__XDMA_SLV_RDRET_PG_TRANS_MASK
 
- XDMA_SLV_RDRET_BUF_STATUS__XDMA_SLV_RDRET_PG_TRANS__SHIFT
 
- XDMA_SLV_READ_LATENCY_AVE__XDMA_SLV_READ_LATENCY_ACC_MASK
 
- XDMA_SLV_READ_LATENCY_AVE__XDMA_SLV_READ_LATENCY_ACC__SHIFT
 
- XDMA_SLV_READ_LATENCY_AVE__XDMA_SLV_READ_LATENCY_COUNT_MASK
 
- XDMA_SLV_READ_LATENCY_AVE__XDMA_SLV_READ_LATENCY_COUNT__SHIFT
 
- XDMA_SLV_READ_LATENCY_MINMAX__XDMA_SLV_READ_LATENCY_MAX_MASK
 
- XDMA_SLV_READ_LATENCY_MINMAX__XDMA_SLV_READ_LATENCY_MAX__SHIFT
 
- XDMA_SLV_READ_LATENCY_MINMAX__XDMA_SLV_READ_LATENCY_MIN_MASK
 
- XDMA_SLV_READ_LATENCY_MINMAX__XDMA_SLV_READ_LATENCY_MIN__SHIFT
 
- XDMA_SLV_READ_LATENCY_TIMER__XDMA_SLV_READ_LATENCY_TIMER_MASK
 
- XDMA_SLV_READ_LATENCY_TIMER__XDMA_SLV_READ_LATENCY_TIMER__SHIFT
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_CLIENT_STALL_MASK
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_CLIENT_STALL__SHIFT
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_STALL_DELAY_MASK
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_STALL_DELAY__SHIFT
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_URGENT_LEVEL_MASK
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_URGENT_LEVEL__SHIFT
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_URGENT_LIMIT_MASK
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_URGENT_LIMIT__SHIFT
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_URGENT_TIMER_MASK
 
- XDMA_SLV_READ_URGENT_CNTL__XDMA_SLV_READ_URGENT_TIMER__SHIFT
 
- XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH_MASK
 
- XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__SHIFT
 
- XDMA_SLV_REMOTE_GPU_ADDRESS__XDMA_SLV_REMOTE_GPU_ADDRESS_MASK
 
- XDMA_SLV_REMOTE_GPU_ADDRESS__XDMA_SLV_REMOTE_GPU_ADDRESS__SHIFT
 
- XDMA_SLV_SLS_PITCH__XDMA_SLV_SLS_PITCH_MASK
 
- XDMA_SLV_SLS_PITCH__XDMA_SLV_SLS_PITCH__SHIFT
 
- XDMA_SLV_SLS_PITCH__XDMA_SLV_SLS_WIDTH_MASK
 
- XDMA_SLV_SLS_PITCH__XDMA_SLV_SLS_WIDTH__SHIFT
 
- XDMA_SLV_WB_RATE_CNTL__XDMA_SLV_WB_BURST_PERIOD_MASK
 
- XDMA_SLV_WB_RATE_CNTL__XDMA_SLV_WB_BURST_PERIOD__SHIFT
 
- XDMA_SLV_WB_RATE_CNTL__XDMA_SLV_WB_BURST_SIZE_MASK
 
- XDMA_SLV_WB_RATE_CNTL__XDMA_SLV_WB_BURST_SIZE__SHIFT
 
- XDMA_SLV_WRITE_URGENT_CNTL__XDMA_SLV_WRITE_STALL_DELAY_MASK
 
- XDMA_SLV_WRITE_URGENT_CNTL__XDMA_SLV_WRITE_STALL_DELAY__SHIFT
 
- XDMA_SLV_WRITE_URGENT_CNTL__XDMA_SLV_WRITE_STALL_MASK
 
- XDMA_SLV_WRITE_URGENT_CNTL__XDMA_SLV_WRITE_STALL__SHIFT
 
- XDMA_SLV_WRITE_URGENT_CNTL__XDMA_SLV_WRITE_URGENT_LEVEL_MASK
 
- XDMA_SLV_WRITE_URGENT_CNTL__XDMA_SLV_WRITE_URGENT_LEVEL__SHIFT
 
- XDMA_TEST_DEBUG_DATA__XDMA_TEST_DEBUG_DATA_MASK
 
- XDMA_TEST_DEBUG_DATA__XDMA_TEST_DEBUG_DATA__SHIFT
 
- XDMA_TEST_DEBUG_INDEX__XDMA_TEST_DEBUG_INDEX_MASK
 
- XDMA_TEST_DEBUG_INDEX__XDMA_TEST_DEBUG_INDEX__SHIFT
 
- XDMA_TEST_DEBUG_INDEX__XDMA_TEST_DEBUG_WRITE_EN_MASK
 
- XDMA_TEST_DEBUG_INDEX__XDMA_TEST_DEBUG_WRITE_EN__SHIFT
 
- XDMA_TYPE_AXIDMA
 
- XDMA_TYPE_CDMA
 
- XDMA_TYPE_VDMA
 
- XDMA__PRESENT
 
- XDMA__PRESENT__0
 
- XDOMAIN_DEFAULT_TIMEOUT
 
- XDOMAIN_PROPERTIES_CHANGED_RETRIES
 
- XDOMAIN_PROPERTIES_RETRIES
 
- XDOMAIN_UUID_RETRIES
 
- XDPING_DEFAULT_COUNT
 
- XDPING_MAX_COUNT
 
- XDPSRS
 
- XDPSRS1
 
- XDPSRSX1
 
- XDP_ABORTED
 
- XDP_ACTION_MAX
 
- XDP_ACTION_MAX_STRLEN
 
- XDP_ATTACHED_DRV
 
- XDP_ATTACHED_HW
 
- XDP_ATTACHED_MULTI
 
- XDP_ATTACHED_NONE
 
- XDP_ATTACHED_SKB
 
- XDP_COPY
 
- XDP_DIAG_INFO
 
- XDP_DIAG_MAX
 
- XDP_DIAG_MEMINFO
 
- XDP_DIAG_NONE
 
- XDP_DIAG_RX_RING
 
- XDP_DIAG_TX_RING
 
- XDP_DIAG_UID
 
- XDP_DIAG_UMEM
 
- XDP_DIAG_UMEM_COMPLETION_RING
 
- XDP_DIAG_UMEM_FILL_RING
 
- XDP_DROP
 
- XDP_DU_F_ZEROCOPY
 
- XDP_FLAGS_DRV_MODE
 
- XDP_FLAGS_HW_MODE
 
- XDP_FLAGS_MASK
 
- XDP_FLAGS_MODES
 
- XDP_FLAGS_SKB_MODE
 
- XDP_FLAGS_UPDATE_IF_NOEXIST
 
- XDP_MMAP_OFFSETS
 
- XDP_OPTIONS
 
- XDP_OPTIONS_ZEROCOPY
 
- XDP_PACKET_HEADROOM
 
- XDP_PAGE_REFCNT_REFILL
 
- XDP_PASS
 
- XDP_PGOFF_RX_RING
 
- XDP_PGOFF_TX_RING
 
- XDP_PI
 
- XDP_QUERY_PROG
 
- XDP_QUERY_PROG_HW
 
- XDP_REDIRECT
 
- XDP_REDIRECT_ERROR
 
- XDP_REDIRECT_SUCCESS
 
- XDP_RING_NEED_WAKEUP
 
- XDP_RX_RING
 
- XDP_SETUP_PROG
 
- XDP_SETUP_PROG_HW
 
- XDP_SETUP_XSK_UMEM
 
- XDP_SHARED_UMEM
 
- XDP_SHOW_INFO
 
- XDP_SHOW_MEMINFO
 
- XDP_SHOW_RING_CFG
 
- XDP_SHOW_UMEM
 
- XDP_STATISTICS
 
- XDP_TX
 
- XDP_TX_RING
 
- XDP_UMEM_COMPLETION_RING
 
- XDP_UMEM_FILL_RING
 
- XDP_UMEM_H_
 
- XDP_UMEM_MIN_CHUNK_SIZE
 
- XDP_UMEM_PGOFF_COMPLETION_RING
 
- XDP_UMEM_PGOFF_FILL_RING
 
- XDP_UMEM_REG
 
- XDP_UMEM_UNALIGNED_CHUNK_FLAG
 
- XDP_UMEM_USES_NEED_WAKEUP
 
- XDP_UNKNOWN
 
- XDP_USE_NEED_WAKEUP
 
- XDP_WAKEUP_RX
 
- XDP_WAKEUP_TX
 
- XDP_XMIT_FLAGS_MASK
 
- XDP_XMIT_FLUSH
 
- XDP_ZEROCOPY
 
- XDRBUF_READ
 
- XDRBUF_SPARSE_PAGES
 
- XDRBUF_WRITE
 
- XDREAD_32
 
- XDR_BUF_SIZE
 
- XDR_FS_H
 
- XDR_IOIF
 
- XDR_LEN
 
- XDR_MAX_NETOBJ
 
- XDR_QUADLEN
 
- XDR_UNIT
 
- XDSS
 
- XDSS_MASK
 
- XDVFS1_MARK
 
- XDVFS2_MARK
 
- XDWRITEREAD_10
 
- XDWRITEREAD_32
 
- XDWRITE_32
 
- XD_128M_X16_2048
 
- XD_128M_X8_2048
 
- XD_128M_X8_512
 
- XD_16M_X8_512
 
- XD_256M_X8_2048
 
- XD_256M_X8_512
 
- XD_2K_EXTRA_SIZE
 
- XD_32M_X8_512
 
- XD_4M_X8_512_1
 
- XD_4M_X8_512_2
 
- XD_512M_X8
 
- XD_64M_X8_512
 
- XD_8M_X8_512
 
- XD_ADDRESS0
 
- XD_ADDRESS1
 
- XD_ADDRESS2
 
- XD_ADDRESS3
 
- XD_ADDRESS4
 
- XD_ADDR_LENGTH_0
 
- XD_ADDR_LENGTH_1
 
- XD_ADDR_LENGTH_2
 
- XD_ADDR_LENGTH_3
 
- XD_ADDR_LENGTH_4
 
- XD_ADDR_MODE_2C
 
- XD_ALE_NP
 
- XD_ALE_PD
 
- XD_ALE_PU
 
- XD_AUTO_CHK_DATA_STATUS
 
- XD_AUTO_PWR_OFF_EN
 
- XD_BA1_ALL0
 
- XD_BA1_BA2_EQL
 
- XD_BA1_VALID
 
- XD_BA2_ALL0
 
- XD_BA2_VALID
 
- XD_BA_NO_TRANSFORM
 
- XD_BA_TRANSFORM
 
- XD_BLOCK_ADDR1_H
 
- XD_BLOCK_ADDR1_L
 
- XD_BLOCK_ADDR2_H
 
- XD_BLOCK_ADDR2_L
 
- XD_BLOCK_STATUS
 
- XD_BPG
 
- XD_BYTE_CNT_H
 
- XD_BYTE_CNT_L
 
- XD_CALC_ECC
 
- XD_CARD
 
- XD_CATCTL
 
- XD_CD
 
- XD_CD_DEGLITCH_EN
 
- XD_CD_DISABLE
 
- XD_CD_EN_ONLY
 
- XD_CD_PD
 
- XD_CD_PU
 
- XD_CE_DISEN
 
- XD_CE_EN
 
- XD_CE_NP
 
- XD_CE_PD
 
- XD_CE_PU
 
- XD_CFG
 
- XD_CHECK_ECC
 
- XD_CHK_4MB
 
- XD_CHK_BAD_NEWBLK
 
- XD_CHK_BAD_OLDBLK
 
- XD_CHK_DATA_STATUS
 
- XD_CHK_ECC_ERR
 
- XD_CHK_ECC_FLD_ERR
 
- XD_CHK_MBR_FAIL
 
- XD_CLE_NP
 
- XD_CLE_PD
 
- XD_CLE_PU
 
- XD_CLK_EN
 
- XD_CLR_4MB
 
- XD_CLR_BAD_NEWBLK
 
- XD_CLR_BAD_OLDBLK
 
- XD_CLR_ECC_ERR
 
- XD_CLR_ECC_FLD_ERR
 
- XD_CLR_ERR
 
- XD_CLR_MBR_FAIL
 
- XD_CTL
 
- XD_D0_NP
 
- XD_D0_PD
 
- XD_D0_PU
 
- XD_D1_NP
 
- XD_D1_PD
 
- XD_D1_PU
 
- XD_D2_NP
 
- XD_D2_PD
 
- XD_D2_PU
 
- XD_D3_NP
 
- XD_D3_PD
 
- XD_D3_PU
 
- XD_D4_NP
 
- XD_D4_PD
 
- XD_D4_PU
 
- XD_D5_NP
 
- XD_D5_PD
 
- XD_D5_PU
 
- XD_D6_NP
 
- XD_D6_PD
 
- XD_D6_PU
 
- XD_D7_NP
 
- XD_D7_PD
 
- XD_D7_PU
 
- XD_DAT
 
- XD_DELAY_WRITE
 
- XD_DIRECT_TO_RB
 
- XD_DRIVE_12
 
- XD_DRIVE_4
 
- XD_DRIVE_8
 
- XD_DRIVE_8mA
 
- XD_DTCTL
 
- XD_ECC1_ALL1
 
- XD_ECC1_ERROR
 
- XD_ECC1_UNCORRECTABLE
 
- XD_ECC2_ALL1
 
- XD_ECC2_ERROR
 
- XD_ECC2_UNCORRECTABLE
 
- XD_ECC_BIT1
 
- XD_ECC_BIT2
 
- XD_ECC_BYTE1
 
- XD_ECC_BYTE2
 
- XD_ECC_ERROR
 
- XD_ERASE
 
- XD_ERASE_ADDR
 
- XD_ERASE_FAIL
 
- XD_EXIST
 
- XD_EXTRA_SIZE
 
- XD_FREE_TABLE_CNT
 
- XD_GBLK
 
- XD_GPG
 
- XD_ID_CODE
 
- XD_IGNORE_ECC
 
- XD_INIT
 
- XD_INT
 
- XD_INT_EN
 
- XD_LATER_BBLK
 
- XD_MOD_SEL
 
- XD_MP2IF_BASE
 
- XD_MP2IF_CSR
 
- XD_MP2IF_DMX_CTRL
 
- XD_MP2IF_MISC
 
- XD_MP2IF_PID_DATA_H
 
- XD_MP2IF_PID_DATA_L
 
- XD_MP2IF_PID_IDX
 
- XD_NORMAL_READ
 
- XD_NORMAL_WRITE
 
- XD_NO_AUTO_PWR_OFF
 
- XD_NO_CALC_ECC
 
- XD_NO_CARD
 
- XD_NO_ERROR
 
- XD_NO_MEMORY
 
- XD_NR
 
- XD_OUTPUT_EN
 
- XD_PAGE_512
 
- XD_PAGE_CNT
 
- XD_PAGE_STATUS
 
- XD_PARITY
 
- XD_PGSTS_NOT_FF
 
- XD_PGSTS_ZEROBIT_OVER4
 
- XD_PPB_EMPTY
 
- XD_PPB_TO_SIE
 
- XD_PRG_ERROR
 
- XD_PWR_OFF_DELAY0
 
- XD_PWR_OFF_DELAY1
 
- XD_PWR_OFF_DELAY2
 
- XD_PWR_OFF_DELAY3
 
- XD_RDY
 
- XD_RDY_NP
 
- XD_RDY_PD
 
- XD_RDY_PU
 
- XD_READ_FAIL
 
- XD_READ_ID
 
- XD_READ_PAGES
 
- XD_READ_REDUNDANT
 
- XD_READ_STATUS
 
- XD_RESERVED0
 
- XD_RESERVED1
 
- XD_RESERVED2
 
- XD_RESERVED3
 
- XD_RESET
 
- XD_RE_NP
 
- XD_RE_PD
 
- XD_RE_PU
 
- XD_RW_ADDR
 
- XD_SET_4MB
 
- XD_SET_ADDR
 
- XD_SET_BAD_NEWBLK
 
- XD_SET_BAD_OLDBLK
 
- XD_SET_CMD
 
- XD_SET_ECC_ERR
 
- XD_SET_ECC_FLD_ERR
 
- XD_SET_MBR_FAIL
 
- XD_STOP
 
- XD_TIME_RWN_1
 
- XD_TIME_RWN_STEP
 
- XD_TIME_RW_1
 
- XD_TIME_RW_STEP
 
- XD_TIME_SETUP_1
 
- XD_TIME_SETUP_STEP
 
- XD_TO_ERROR
 
- XD_TO_PPB_ONLY
 
- XD_TRANSFER
 
- XD_TRANSFER_END
 
- XD_TRANSFER_START
 
- XD_WE_NP
 
- XD_WE_PD
 
- XD_WE_PU
 
- XD_WP_DISEN
 
- XD_WP_EN
 
- XD_WP_NP
 
- XD_WP_PD
 
- XD_WP_PU
 
- XD_WRITE_FAIL
 
- XD_WRITE_PAGES
 
- XD_WRITE_REDUNDANT
 
- XDm
 
- XDn
 
- XE
 
- XEC
 
- XEH_MASK
 
- XEL_ARP_PACKET_SIZE
 
- XEL_BUFFER_OFFSET
 
- XEL_GIER_GIE_MASK
 
- XEL_GIER_OFFSET
 
- XEL_HEADER_IP_LENGTH_OFFSET
 
- XEL_HEADER_OFFSET
 
- XEL_HEADER_SHIFT
 
- XEL_MDIOADDR_OFFSET
 
- XEL_MDIOADDR_OP_MASK
 
- XEL_MDIOADDR_PHYADR_MASK
 
- XEL_MDIOADDR_PHYADR_SHIFT
 
- XEL_MDIOADDR_REGADR_MASK
 
- XEL_MDIOCTRL_MDIOEN_MASK
 
- XEL_MDIOCTRL_MDIOSTS_MASK
 
- XEL_MDIOCTRL_OFFSET
 
- XEL_MDIORD_OFFSET
 
- XEL_MDIORD_RDDATA_MASK
 
- XEL_MDIOWR_OFFSET
 
- XEL_MDIOWR_WRDATA_MASK
 
- XEL_RPLR_LENGTH_MASK
 
- XEL_RPLR_OFFSET
 
- XEL_RSR_OFFSET
 
- XEL_RSR_RECV_DONE_MASK
 
- XEL_RSR_RECV_IE_MASK
 
- XEL_RXBUFF_OFFSET
 
- XEL_TPLR_LENGTH_MASK
 
- XEL_TPLR_OFFSET
 
- XEL_TSR_OFFSET
 
- XEL_TSR_PROGRAM_MASK
 
- XEL_TSR_PROG_MAC_ADDR
 
- XEL_TSR_XMIT_ACTIVE_MASK
 
- XEL_TSR_XMIT_BUSY_MASK
 
- XEL_TSR_XMIT_IE_MASK
 
- XEL_TXBUFF_OFFSET
 
- XEMPTY
 
- XEMPTYEOFEN
 
- XENA_EEPROM_SPACE
 
- XENA_EIGHT_SPLIT_TRANSACTION
 
- XENA_FOUR_SPLIT_TRANSACTION
 
- XENA_MAX_OUTSTANDING_SPLITS
 
- XENA_ONE_SPLIT_TRANSACTION
 
- XENA_REG_SPACE
 
- XENA_SIXTEEN_SPLIT_TRANSACTION
 
- XENA_THIRTYTWO_SPLIT_TRANSACTION
 
- XENA_THREE_SPLIT_TRANSACTION
 
- XENA_TWELVE_SPLIT_TRANSACTION
 
- XENA_TWO_SPLIT_TRANSACTION
 
- XENA_dev_config
 
- XENBUS_EXIST_ERR
 
- XENBUS_FUNCTIONS_CALLS
 
- XENBUS_IS_ERR_READ
 
- XENBUS_MAX_RING_GRANTS
 
- XENBUS_MAX_RING_GRANT_ORDER
 
- XENBUS_MAX_RING_PAGES
 
- XENBUS_PAGES
 
- XENCONS_RING_IDX
 
- XENDISPL_DBUF_FLG_REQ_ALLOC
 
- XENDISPL_DRIVER_NAME
 
- XENDISPL_EVENT_PAGE_SIZE
 
- XENDISPL_EVT_PG_FLIP
 
- XENDISPL_FIELD_BE_ALLOC
 
- XENDISPL_FIELD_BE_VERSIONS
 
- XENDISPL_FIELD_EVT_CHANNEL
 
- XENDISPL_FIELD_EVT_RING_REF
 
- XENDISPL_FIELD_FE_VERSION
 
- XENDISPL_FIELD_REQ_CHANNEL
 
- XENDISPL_FIELD_REQ_RING_REF
 
- XENDISPL_FIELD_RESOLUTION
 
- XENDISPL_FIELD_UNIQUE_ID
 
- XENDISPL_IN_RING
 
- XENDISPL_IN_RING_LEN
 
- XENDISPL_IN_RING_OFFS
 
- XENDISPL_IN_RING_REF
 
- XENDISPL_IN_RING_SIZE
 
- XENDISPL_LIST_SEPARATOR
 
- XENDISPL_OP_DBUF_CREATE
 
- XENDISPL_OP_DBUF_DESTROY
 
- XENDISPL_OP_FB_ATTACH
 
- XENDISPL_OP_FB_DETACH
 
- XENDISPL_OP_PG_FLIP
 
- XENDISPL_OP_SET_CONFIG
 
- XENDISPL_PROTOCOL_VERSION
 
- XENDISPL_RESOLUTION_SEPARATOR
 
- XENFB_DEFAULT_FB_LEN
 
- XENFB_DEPTH
 
- XENFB_HEIGHT
 
- XENFB_IN_EVENT_SIZE
 
- XENFB_IN_RING
 
- XENFB_IN_RING_LEN
 
- XENFB_IN_RING_OFFS
 
- XENFB_IN_RING_REF
 
- XENFB_IN_RING_SIZE
 
- XENFB_OUT_EVENT_SIZE
 
- XENFB_OUT_RING
 
- XENFB_OUT_RING_LEN
 
- XENFB_OUT_RING_OFFS
 
- XENFB_OUT_RING_REF
 
- XENFB_OUT_RING_SIZE
 
- XENFB_TYPE_RESIZE
 
- XENFB_TYPE_UPDATE
 
- XENFB_WIDTH
 
- XENFEAT_ARM_SMCCC_supported
 
- XENFEAT_NR_SUBMAPS
 
- XENFEAT_auto_translated_physmap
 
- XENFEAT_dom0
 
- XENFEAT_gnttab_map_avail_bits
 
- XENFEAT_highmem_assist
 
- XENFEAT_hvm_callback_vector
 
- XENFEAT_hvm_pirqs
 
- XENFEAT_hvm_safe_pvclock
 
- XENFEAT_linux_rsdp_unrestricted
 
- XENFEAT_memory_op_vnode_supported
 
- XENFEAT_mmu_pt_update_preserve_ad
 
- XENFEAT_pae_pgdir_above_4gb
 
- XENFEAT_supervisor_mode_kernel
 
- XENFEAT_writable_descriptor_tables
 
- XENFEAT_writable_page_tables
 
- XENFS_SUPER_MAGIC
 
- XENIRQSTAT_needs_eoi
 
- XENIRQSTAT_shared
 
- XENIX_LINK_MAX
 
- XENIX_NICFREE
 
- XENIX_NICINOD
 
- XENIX_SUPER_MAGIC
 
- XENKBD_DRIVER_NAME
 
- XENKBD_FIELD_EVT_CHANNEL
 
- XENKBD_FIELD_FEAT_ABS_POINTER
 
- XENKBD_FIELD_FEAT_DSBL_KEYBRD
 
- XENKBD_FIELD_FEAT_DSBL_POINTER
 
- XENKBD_FIELD_FEAT_MTOUCH
 
- XENKBD_FIELD_FEAT_RAW_POINTER
 
- XENKBD_FIELD_HEIGHT
 
- XENKBD_FIELD_MT_HEIGHT
 
- XENKBD_FIELD_MT_NUM_CONTACTS
 
- XENKBD_FIELD_MT_WIDTH
 
- XENKBD_FIELD_REQ_ABS_POINTER
 
- XENKBD_FIELD_REQ_MTOUCH
 
- XENKBD_FIELD_REQ_RAW_POINTER
 
- XENKBD_FIELD_RING_GREF
 
- XENKBD_FIELD_RING_REF
 
- XENKBD_FIELD_UNIQUE_ID
 
- XENKBD_FIELD_WIDTH
 
- XENKBD_IN_EVENT_SIZE
 
- XENKBD_IN_RING
 
- XENKBD_IN_RING_LEN
 
- XENKBD_IN_RING_OFFS
 
- XENKBD_IN_RING_REF
 
- XENKBD_IN_RING_SIZE
 
- XENKBD_MT_EV_DOWN
 
- XENKBD_MT_EV_MOTION
 
- XENKBD_MT_EV_ORIENT
 
- XENKBD_MT_EV_SHAPE
 
- XENKBD_MT_EV_SYN
 
- XENKBD_MT_EV_UP
 
- XENKBD_OUT_EVENT_SIZE
 
- XENKBD_OUT_RING
 
- XENKBD_OUT_RING_LEN
 
- XENKBD_OUT_RING_OFFS
 
- XENKBD_OUT_RING_REF
 
- XENKBD_OUT_RING_SIZE
 
- XENKBD_TYPE_KEY
 
- XENKBD_TYPE_MOTION
 
- XENKBD_TYPE_MTOUCH
 
- XENKBD_TYPE_POS
 
- XENKBD_TYPE_RESERVED
 
- XENMAPSPACE_dev_mmio
 
- XENMAPSPACE_gmfn
 
- XENMAPSPACE_gmfn_foreign
 
- XENMAPSPACE_gmfn_range
 
- XENMAPSPACE_grant_table
 
- XENMAPSPACE_shared_info
 
- XENMEM_acquire_resource
 
- XENMEM_add_to_physmap
 
- XENMEM_add_to_physmap_range
 
- XENMEM_current_reservation
 
- XENMEM_decrease_reservation
 
- XENMEM_exchange
 
- XENMEM_increase_reservation
 
- XENMEM_machine_memory_map
 
- XENMEM_machphys_mapping
 
- XENMEM_machphys_mfn_list
 
- XENMEM_maximum_ram_page
 
- XENMEM_maximum_reservation
 
- XENMEM_memory_map
 
- XENMEM_populate_physmap
 
- XENMEM_remove_from_physmap
 
- XENMEM_resource_grant_table
 
- XENMEM_resource_grant_table_id_shared
 
- XENMEM_resource_grant_table_id_status
 
- XENMEM_resource_ioreq_server
 
- XENMEM_resource_ioreq_server_frame_bufioreq
 
- XENMEM_resource_ioreq_server_frame_ioreq
 
- XENMEM_rsrc_acq_caller_owned
 
- XENNMI_register_callback
 
- XENNMI_unregister_callback
 
- XENON_ASYNC_DDRMODE_MASK
 
- XENON_ASYNC_DDRMODE_SHIFT
 
- XENON_AUTO_CLKGATE_DISABLE_MASK
 
- XENON_AUTO_RECEN_CTRL
 
- XENON_CMD_DDR_MODE
 
- XENON_CTRL_HS200
 
- XENON_CTRL_HS400
 
- XENON_DEFAULT_SDCLK_FREQ
 
- XENON_DEF_TUNING_COUNT
 
- XENON_DLL_BYPASS_EN
 
- XENON_DLL_ENABLE
 
- XENON_DLL_FAST_LOCK
 
- XENON_DLL_GAIN2X
 
- XENON_DLL_LOCK_STATE
 
- XENON_DLL_PHASE_90_DEGREE
 
- XENON_DLL_PHASE_MASK
 
- XENON_DLL_PHSEL0_SHIFT
 
- XENON_DLL_PHSEL1_SHIFT
 
- XENON_DLL_REFCLK_SEL
 
- XENON_DLL_UPDATE
 
- XENON_DLL_UPDATE_STROBE_5_0
 
- XENON_DQ_ASYNC_MODE
 
- XENON_DQ_DDR_MODE_MASK
 
- XENON_DQ_DDR_MODE_SHIFT
 
- XENON_EMMC5_1_FC_CMD_PD
 
- XENON_EMMC5_1_FC_CMD_PU
 
- XENON_EMMC5_1_FC_DQ_PD
 
- XENON_EMMC5_1_FC_DQ_PU
 
- XENON_EMMC5_1_FC_QSP_PD
 
- XENON_EMMC5_1_FC_QSP_PU
 
- XENON_EMMC5_FC_CMD_PD
 
- XENON_EMMC5_FC_CMD_PU
 
- XENON_EMMC5_FC_DQ_PD
 
- XENON_EMMC5_FC_DQ_PU
 
- XENON_EMMC5_FC_QSP_PD
 
- XENON_EMMC5_FC_QSP_PU
 
- XENON_EMMC_5_0_PHY_DLL_CONTROL
 
- XENON_EMMC_5_0_PHY_FUNC_CONTROL
 
- XENON_EMMC_5_0_PHY_LOGIC_TIMING_ADJUST
 
- XENON_EMMC_5_0_PHY_LOGIC_TIMING_VALUE
 
- XENON_EMMC_5_0_PHY_PAD_CONTROL
 
- XENON_EMMC_5_0_PHY_PAD_CONTROL2
 
- XENON_EMMC_5_0_PHY_REG_BASE
 
- XENON_EMMC_5_0_PHY_TIMING_ADJUST
 
- XENON_EMMC_PHY_DLL_CONTROL
 
- XENON_EMMC_PHY_FUNC_CONTROL
 
- XENON_EMMC_PHY_LOGIC_TIMING_ADJUST
 
- XENON_EMMC_PHY_PAD_CONTROL
 
- XENON_EMMC_PHY_PAD_CONTROL1
 
- XENON_EMMC_PHY_PAD_CONTROL2
 
- XENON_EMMC_PHY_REG_BASE
 
- XENON_EMMC_PHY_TIMING_ADJUST
 
- XENON_ENABLE_DATA_STROBE
 
- XENON_ENABLE_RESP_STROBE
 
- XENON_FC_ALL_CMOS_RECEIVER
 
- XENON_FC_CMD_RECEN
 
- XENON_FC_DQ_RECEN
 
- XENON_FC_QSN_RECEN
 
- XENON_FC_QSP_RECEN
 
- XENON_FC_SYNC_EN_DURATION_MASK
 
- XENON_FC_SYNC_EN_DURATION_SHIFT
 
- XENON_FC_SYNC_RST_DURATION_MASK
 
- XENON_FC_SYNC_RST_DURATION_SHIFT
 
- XENON_FC_SYNC_RST_EN_DURATION_MASK
 
- XENON_FC_SYNC_RST_EN_DURATION_SHIFT
 
- XENON_LOGIC_TIMING_VALUE
 
- XENON_LOWEST_SDCLK_FREQ
 
- XENON_MASK_CMD_CONFLICT_ERR
 
- XENON_NR_SUPPORTED_SLOT_MASK
 
- XENON_OEN_QSN
 
- XENON_PHY_INITIALIZAION
 
- XENON_REC_EN_MASK
 
- XENON_REC_EN_SHIFT
 
- XENON_RETUNING_COMPATIBLE
 
- XENON_SAMPL_INV_QSP_PHASE_SELECT
 
- XENON_SAMPL_INV_QSP_PHASE_SELECT_SHIFT
 
- XENON_SDCLK_IDLEOFF_ENABLE_SHIFT
 
- XENON_SLOT_DLL_CUR_DLY_VAL
 
- XENON_SLOT_EMMC_CTRL
 
- XENON_SLOT_ENABLE_SHIFT
 
- XENON_SLOT_EXT_PRESENT_STATE
 
- XENON_SLOT_OP_STATUS_CTRL
 
- XENON_SLOT_RETUNING_REQ_CTRL
 
- XENON_SLOT_TYPE_SDIO_SHIFT
 
- XENON_SYS_CFG_INFO
 
- XENON_SYS_EXT_OP_CTRL
 
- XENON_SYS_OP_CTRL
 
- XENON_TIMING_ADJUST_SDIO_MODE
 
- XENON_TIMING_ADJUST_SLOW_MODE
 
- XENON_TMR_RETUN_NO_PRESENT
 
- XENON_TUNING_STEP_DIVIDER
 
- XENON_TUNING_STEP_MASK
 
- XENON_TUNING_STEP_SHIFT
 
- XENON_TUN_CONSECUTIVE_TIMES
 
- XENON_TUN_CONSECUTIVE_TIMES_MASK
 
- XENON_TUN_CONSECUTIVE_TIMES_SHIFT
 
- XENON_WAIT_CYCLE_BEFORE_USING_MASK
 
- XENON_WAIT_CYCLE_BEFORE_USING_SHIFT
 
- XENON_ZNR_DEF_VALUE
 
- XENON_ZNR_MASK
 
- XENON_ZNR_SHIFT
 
- XENON_ZPR_DEF_VALUE
 
- XENON_ZPR_MASK
 
- XENPF_ACPI_SLEEP_EXTENDED
 
- XENPF_INTERFACE_VERSION
 
- XENPF_add_memtype
 
- XENPF_change_freq
 
- XENPF_core_parking
 
- XENPF_cpu_hotadd
 
- XENPF_cpu_offline
 
- XENPF_cpu_online
 
- XENPF_del_memtype
 
- XENPF_efi_runtime_call
 
- XENPF_enter_acpi_sleep
 
- XENPF_firmware_info
 
- XENPF_get_cpuinfo
 
- XENPF_get_symbol
 
- XENPF_getidletime
 
- XENPF_mem_hotadd
 
- XENPF_microcode_update
 
- XENPF_platform_quirk
 
- XENPF_read_memtype
 
- XENPF_set_processor_pminfo
 
- XENPF_settime32
 
- XENPF_settime64
 
- XENPMU_CTXT_PAD_SZ
 
- XENPMU_FEATURE_INTEL_BTS
 
- XENPMU_IRQ_PROCESSING
 
- XENPMU_MODE_ALL
 
- XENPMU_MODE_HV
 
- XENPMU_MODE_OFF
 
- XENPMU_MODE_SELF
 
- XENPMU_REGS_PAD_SZ
 
- XENPMU_VER_MAJ
 
- XENPMU_VER_MIN
 
- XENPMU_feature_get
 
- XENPMU_feature_set
 
- XENPMU_finish
 
- XENPMU_flush
 
- XENPMU_init
 
- XENPMU_lvtpc_set
 
- XENPMU_mode_get
 
- XENPMU_mode_set
 
- XENSND_DRIVER_NAME
 
- XENSND_EVENT_PAGE_SIZE
 
- XENSND_EVT_CUR_POS
 
- XENSND_FIELD_BE_VERSIONS
 
- XENSND_FIELD_BUFFER_SIZE
 
- XENSND_FIELD_CHANNELS_MAX
 
- XENSND_FIELD_CHANNELS_MIN
 
- XENSND_FIELD_DEVICE_NAME
 
- XENSND_FIELD_EVT_CHNL
 
- XENSND_FIELD_EVT_EVT_CHNL
 
- XENSND_FIELD_EVT_RING_REF
 
- XENSND_FIELD_FE_VERSION
 
- XENSND_FIELD_RING_REF
 
- XENSND_FIELD_SAMPLE_FORMATS
 
- XENSND_FIELD_SAMPLE_RATES
 
- XENSND_FIELD_STREAM_UNIQUE_ID
 
- XENSND_FIELD_TYPE
 
- XENSND_FIELD_VCARD_LONG_NAME
 
- XENSND_FIELD_VCARD_SHORT_NAME
 
- XENSND_IN_RING
 
- XENSND_IN_RING_LEN
 
- XENSND_IN_RING_OFFS
 
- XENSND_IN_RING_REF
 
- XENSND_IN_RING_SIZE
 
- XENSND_LIST_SEPARATOR
 
- XENSND_OP_CLOSE
 
- XENSND_OP_GET_VOLUME
 
- XENSND_OP_HW_PARAM_QUERY
 
- XENSND_OP_MUTE
 
- XENSND_OP_OPEN
 
- XENSND_OP_READ
 
- XENSND_OP_SET_VOLUME
 
- XENSND_OP_TRIGGER
 
- XENSND_OP_TRIGGER_PAUSE
 
- XENSND_OP_TRIGGER_RESUME
 
- XENSND_OP_TRIGGER_START
 
- XENSND_OP_TRIGGER_STOP
 
- XENSND_OP_UNMUTE
 
- XENSND_OP_WRITE
 
- XENSND_PCM_FORMAT_A_LAW
 
- XENSND_PCM_FORMAT_A_LAW_STR
 
- XENSND_PCM_FORMAT_F32_BE
 
- XENSND_PCM_FORMAT_F32_BE_STR
 
- XENSND_PCM_FORMAT_F32_LE
 
- XENSND_PCM_FORMAT_F32_LE_STR
 
- XENSND_PCM_FORMAT_F64_BE
 
- XENSND_PCM_FORMAT_F64_BE_STR
 
- XENSND_PCM_FORMAT_F64_LE
 
- XENSND_PCM_FORMAT_F64_LE_STR
 
- XENSND_PCM_FORMAT_GSM
 
- XENSND_PCM_FORMAT_GSM_STR
 
- XENSND_PCM_FORMAT_IEC958_SUBFRAME_BE
 
- XENSND_PCM_FORMAT_IEC958_SUBFRAME_BE_STR
 
- XENSND_PCM_FORMAT_IEC958_SUBFRAME_LE
 
- XENSND_PCM_FORMAT_IEC958_SUBFRAME_LE_STR
 
- XENSND_PCM_FORMAT_IMA_ADPCM
 
- XENSND_PCM_FORMAT_IMA_ADPCM_STR
 
- XENSND_PCM_FORMAT_MPEG
 
- XENSND_PCM_FORMAT_MPEG_STR
 
- XENSND_PCM_FORMAT_MU_LAW
 
- XENSND_PCM_FORMAT_MU_LAW_STR
 
- XENSND_PCM_FORMAT_S16_BE
 
- XENSND_PCM_FORMAT_S16_BE_STR
 
- XENSND_PCM_FORMAT_S16_LE
 
- XENSND_PCM_FORMAT_S16_LE_STR
 
- XENSND_PCM_FORMAT_S24_BE
 
- XENSND_PCM_FORMAT_S24_BE_STR
 
- XENSND_PCM_FORMAT_S24_LE
 
- XENSND_PCM_FORMAT_S24_LE_STR
 
- XENSND_PCM_FORMAT_S32_BE
 
- XENSND_PCM_FORMAT_S32_BE_STR
 
- XENSND_PCM_FORMAT_S32_LE
 
- XENSND_PCM_FORMAT_S32_LE_STR
 
- XENSND_PCM_FORMAT_S8
 
- XENSND_PCM_FORMAT_S8_STR
 
- XENSND_PCM_FORMAT_U16_BE
 
- XENSND_PCM_FORMAT_U16_BE_STR
 
- XENSND_PCM_FORMAT_U16_LE
 
- XENSND_PCM_FORMAT_U16_LE_STR
 
- XENSND_PCM_FORMAT_U24_BE
 
- XENSND_PCM_FORMAT_U24_BE_STR
 
- XENSND_PCM_FORMAT_U24_LE
 
- XENSND_PCM_FORMAT_U24_LE_STR
 
- XENSND_PCM_FORMAT_U32_BE
 
- XENSND_PCM_FORMAT_U32_BE_STR
 
- XENSND_PCM_FORMAT_U32_LE
 
- XENSND_PCM_FORMAT_U32_LE_STR
 
- XENSND_PCM_FORMAT_U8
 
- XENSND_PCM_FORMAT_U8_STR
 
- XENSND_PROTOCOL_VERSION
 
- XENSND_SAMPLE_FORMAT_MAX_LEN
 
- XENSND_SAMPLE_RATE_MAX_LEN
 
- XENSND_STREAM_TYPE_CAPTURE
 
- XENSND_STREAM_TYPE_PLAYBACK
 
- XENSTORE_PAYLOAD_MAX
 
- XENSTORE_RING_IDX
 
- XENSTORE_RING_SIZE
 
- XENVBD_MAJOR
 
- XENVER_build_id
 
- XENVER_capabilities
 
- XENVER_changeset
 
- XENVER_commandline
 
- XENVER_compile_info
 
- XENVER_extraversion
 
- XENVER_get_features
 
- XENVER_guest_handle
 
- XENVER_pagesize
 
- XENVER_platform_parameters
 
- XENVER_version
 
- XENVIF_HASH_CACHE_SIZE_DEFAULT
 
- XENVIF_KICK_STR
 
- XENVIF_NAPI_WEIGHT
 
- XENVIF_QUEUE_LENGTH
 
- XENVIF_RX_CB
 
- XENVIF_RX_QUEUE_BYTES
 
- XENVIF_TX_CB
 
- XEN_9PFS_NUM_RINGS
 
- XEN_9PFS_RING_ORDER
 
- XEN_9PFS_RING_SIZE
 
- XEN_BLKIF_REQS_PER_PAGE
 
- XEN_BUS_ID_SIZE
 
- XEN_CALLBACK
 
- XEN_CALL_FUNCTION_SINGLE_VECTOR
 
- XEN_CALL_FUNCTION_VECTOR
 
- XEN_CAPABILITIES_INFO_LEN
 
- XEN_CHANGESET_INFO_LEN
 
- XEN_CORE_PARKING_GET
 
- XEN_CORE_PARKING_SET
 
- XEN_CPUID
 
- XEN_CPUID_FEAT1_MMU_PT_UPDATE_PRESERVE_AD
 
- XEN_CPUID_FIRST_LEAF
 
- XEN_CPUID_LEAF
 
- XEN_CPUID_MACHINE_ADDRESS_WIDTH_MASK
 
- XEN_CPUID_MAX_NUM_LEAVES
 
- XEN_CPUID_SIGNATURE_EBX
 
- XEN_CPUID_SIGNATURE_ECX
 
- XEN_CPUID_SIGNATURE_EDX
 
- XEN_DRM_CRTC_VREFRESH_HZ
 
- XEN_DRM_FRONT_MAX_CRTCS
 
- XEN_DRM_FRONT_WAIT_BACK_MS
 
- XEN_EARLY_IDT_HANDLER_SIZE
 
- XEN_EFI_GET_TIME_SET_CLEARS_NS
 
- XEN_EFI_GET_WAKEUP_TIME_ENABLED
 
- XEN_EFI_GET_WAKEUP_TIME_PENDING
 
- XEN_EFI_SET_WAKEUP_TIME_ENABLE
 
- XEN_EFI_SET_WAKEUP_TIME_ENABLE_ONLY
 
- XEN_EFI_VARIABLE_BOOTSERVICE_ACCESS
 
- XEN_EFI_VARIABLE_NON_VOLATILE
 
- XEN_EFI_VARIABLE_RUNTIME_ACCESS
 
- XEN_EFI_get_next_high_monotonic_count
 
- XEN_EFI_get_next_variable_name
 
- XEN_EFI_get_time
 
- XEN_EFI_get_variable
 
- XEN_EFI_get_wakeup_time
 
- XEN_EFI_query_capsule_capabilities
 
- XEN_EFI_query_variable_info
 
- XEN_EFI_set_time
 
- XEN_EFI_set_variable
 
- XEN_EFI_set_wakeup_time
 
- XEN_EFI_update_capsule
 
- XEN_EFLAGS_NMI
 
- XEN_ELFNOTE_BSD_SYMTAB
 
- XEN_ELFNOTE_ENTRY
 
- XEN_ELFNOTE_FEATURES
 
- XEN_ELFNOTE_GUEST_OS
 
- XEN_ELFNOTE_GUEST_VERSION
 
- XEN_ELFNOTE_HV_START_LOW
 
- XEN_ELFNOTE_HYPERCALL_PAGE
 
- XEN_ELFNOTE_INFO
 
- XEN_ELFNOTE_INIT_P2M
 
- XEN_ELFNOTE_L1_MFN_VALID
 
- XEN_ELFNOTE_LOADER
 
- XEN_ELFNOTE_MAX
 
- XEN_ELFNOTE_MOD_START_PFN
 
- XEN_ELFNOTE_PADDR_OFFSET
 
- XEN_ELFNOTE_PAE_MODE
 
- XEN_ELFNOTE_PHYS32_ENTRY
 
- XEN_ELFNOTE_SUPPORTED_FEATURES
 
- XEN_ELFNOTE_SUSPEND_CANCEL
 
- XEN_ELFNOTE_VIRT_BASE
 
- XEN_ELFNOTE_XEN_VERSION
 
- XEN_EMULATE_PREFIX
 
- XEN_ENTER_SWITCH_CODE
 
- XEN_EXTRAVERSION_LEN
 
- XEN_EXTRA_MEM_MAX_REGIONS
 
- XEN_FLEX_RING_SIZE
 
- XEN_FW_DISK_INFO
 
- XEN_FW_DISK_MBR_SIGNATURE
 
- XEN_FW_EFI_CONFIG_TABLE
 
- XEN_FW_EFI_INFO
 
- XEN_FW_EFI_MEM_INFO
 
- XEN_FW_EFI_RT_VERSION
 
- XEN_FW_EFI_VENDOR
 
- XEN_FW_EFI_VERSION
 
- XEN_FW_KBD_SHIFT_FLAGS
 
- XEN_FW_VBEDDC_INFO
 
- XEN_HVC_CONSOLE_H
 
- XEN_HVM_CPUID_APIC_ACCESS_VIRT
 
- XEN_HVM_CPUID_IOMMU_MAPPINGS
 
- XEN_HVM_CPUID_VCPU_ID_PRESENT
 
- XEN_HVM_CPUID_X2APIC_VIRT
 
- XEN_HVM_DOMAIN
 
- XEN_HVM_H__
 
- XEN_HVM_MEMMAP_TYPE_ACPI
 
- XEN_HVM_MEMMAP_TYPE_DISABLED
 
- XEN_HVM_MEMMAP_TYPE_NVS
 
- XEN_HVM_MEMMAP_TYPE_PMEM
 
- XEN_HVM_MEMMAP_TYPE_RAM
 
- XEN_HVM_MEMMAP_TYPE_RESERVED
 
- XEN_HVM_MEMMAP_TYPE_UNUSABLE
 
- XEN_HVM_START_MAGIC_VALUE
 
- XEN_IDE0_MAJOR
 
- XEN_IDE1_MAJOR
 
- XEN_IMM
 
- XEN_IOPORT_BASE
 
- XEN_IOPORT_DRVVER
 
- XEN_IOPORT_LINUX_DRVVER
 
- XEN_IOPORT_LINUX_PRODNUM
 
- XEN_IOPORT_MAGIC
 
- XEN_IOPORT_MAGIC_VAL
 
- XEN_IOPORT_PLATFLAGS
 
- XEN_IOPORT_PRODNUM
 
- XEN_IOPORT_PROTOVER
 
- XEN_IOPORT_SYSLOG
 
- XEN_IOPORT_UNPLUG
 
- XEN_IO_PROTO_ABI_ARM
 
- XEN_IO_PROTO_ABI_NATIVE
 
- XEN_IO_PROTO_ABI_POWERPC64
 
- XEN_IO_PROTO_ABI_X86_32
 
- XEN_IO_PROTO_ABI_X86_64
 
- XEN_IRQ_PRIORITY_DEFAULT
 
- XEN_IRQ_PRIORITY_MAX
 
- XEN_IRQ_PRIORITY_MIN
 
- XEN_IRQ_WORK_VECTOR
 
- XEN_KSYM_NAME_LEN
 
- XEN_MCA_INTERFACE_VERSION
 
- XEN_MCE_LOG_LEN
 
- XEN_MCE_LOG_SIGNATURE
 
- XEN_MCE_OVERFLOW
 
- XEN_MC_ACK
 
- XEN_MC_FETCHFAILED
 
- XEN_MC_FL_ARGS
 
- XEN_MC_FL_BATCH
 
- XEN_MC_FL_CALLBACK
 
- XEN_MC_FL_NONE
 
- XEN_MC_NODATA
 
- XEN_MC_NONURGENT
 
- XEN_MC_OK
 
- XEN_MC_URGENT
 
- XEN_MC_XE_BAD_OP
 
- XEN_MC_XE_NO_SPACE
 
- XEN_MC_XE_OK
 
- XEN_MC_fetch
 
- XEN_MC_mceinject
 
- XEN_MC_msrinject
 
- XEN_MC_notifydomain
 
- XEN_MC_physcpuinfo
 
- XEN_NATIVE
 
- XEN_NETBACK_TX_COPY_LEN
 
- XEN_NETBK_HASH_TAG_SIZE
 
- XEN_NETBK_LEGACY_SLOTS_MAX
 
- XEN_NETBK_MAX_HASH_KEY_SIZE
 
- XEN_NETBK_MAX_HASH_MAPPING_SIZE
 
- XEN_NETBK_MCAST_MAX
 
- XEN_NETIF_CTRL_HASH_ALGORITHM_NONE
 
- XEN_NETIF_CTRL_HASH_ALGORITHM_TOEPLITZ
 
- XEN_NETIF_CTRL_HASH_TYPE_IPV4
 
- XEN_NETIF_CTRL_HASH_TYPE_IPV4_TCP
 
- XEN_NETIF_CTRL_HASH_TYPE_IPV6
 
- XEN_NETIF_CTRL_HASH_TYPE_IPV6_TCP
 
- XEN_NETIF_CTRL_STATUS_BUFFER_OVERFLOW
 
- XEN_NETIF_CTRL_STATUS_INVALID_PARAMETER
 
- XEN_NETIF_CTRL_STATUS_NOT_SUPPORTED
 
- XEN_NETIF_CTRL_STATUS_SUCCESS
 
- XEN_NETIF_CTRL_TYPE_GET_HASH_FLAGS
 
- XEN_NETIF_CTRL_TYPE_GET_HASH_MAPPING_SIZE
 
- XEN_NETIF_CTRL_TYPE_INVALID
 
- XEN_NETIF_CTRL_TYPE_SET_HASH_ALGORITHM
 
- XEN_NETIF_CTRL_TYPE_SET_HASH_FLAGS
 
- XEN_NETIF_CTRL_TYPE_SET_HASH_KEY
 
- XEN_NETIF_CTRL_TYPE_SET_HASH_MAPPING
 
- XEN_NETIF_CTRL_TYPE_SET_HASH_MAPPING_SIZE
 
- XEN_NETIF_DEFINE_TOEPLITZ
 
- XEN_NETIF_EXTRA_FLAG_MORE
 
- XEN_NETIF_EXTRA_TYPE_GSO
 
- XEN_NETIF_EXTRA_TYPE_HASH
 
- XEN_NETIF_EXTRA_TYPE_MAX
 
- XEN_NETIF_EXTRA_TYPE_MCAST_ADD
 
- XEN_NETIF_EXTRA_TYPE_MCAST_DEL
 
- XEN_NETIF_EXTRA_TYPE_NONE
 
- XEN_NETIF_GSO_TYPE_NONE
 
- XEN_NETIF_GSO_TYPE_TCPV4
 
- XEN_NETIF_GSO_TYPE_TCPV6
 
- XEN_NETIF_MAX_TX_SIZE
 
- XEN_NETIF_NR_SLOTS_MIN
 
- XEN_NETIF_RSP_DROPPED
 
- XEN_NETIF_RSP_ERROR
 
- XEN_NETIF_RSP_NULL
 
- XEN_NETIF_RSP_OKAY
 
- XEN_NETIF_RX_RING_SIZE
 
- XEN_NETIF_TX_RING_SIZE
 
- XEN_NETRXF_csum_blank
 
- XEN_NETRXF_data_validated
 
- XEN_NETRXF_extra_info
 
- XEN_NETRXF_gso_prefix
 
- XEN_NETRXF_more_data
 
- XEN_NETTXF_csum_blank
 
- XEN_NETTXF_data_validated
 
- XEN_NETTXF_extra_info
 
- XEN_NETTXF_more_data
 
- XEN_NMIREASON_io_error
 
- XEN_NMIREASON_pci_serr
 
- XEN_NMIREASON_unknown
 
- XEN_NMI_VECTOR
 
- XEN_NR_IPIS
 
- XEN_NUM_GREFS_PER_PAGE
 
- XEN_OPS_H
 
- XEN_PAGES_PER_INDIRECT_FRAME
 
- XEN_PAGES_PER_SEGMENT
 
- XEN_PAGE_MASK
 
- XEN_PAGE_SHIFT
 
- XEN_PAGE_SIZE
 
- XEN_PCIB_AERHANDLER
 
- XEN_PCIB_active
 
- XEN_PCIF_active
 
- XEN_PCI_DEV_EXTFN
 
- XEN_PCI_DEV_PXM
 
- XEN_PCI_DEV_VIRTFN
 
- XEN_PCI_ERR_access_denied
 
- XEN_PCI_ERR_dev_not_found
 
- XEN_PCI_ERR_invalid_offset
 
- XEN_PCI_ERR_not_implemented
 
- XEN_PCI_ERR_op_failed
 
- XEN_PCI_ERR_success
 
- XEN_PCI_MAGIC
 
- XEN_PCI_MMCFG_RESERVED
 
- XEN_PCI_OP_aer_detected
 
- XEN_PCI_OP_aer_mmio
 
- XEN_PCI_OP_aer_resume
 
- XEN_PCI_OP_aer_slotreset
 
- XEN_PCI_OP_conf_read
 
- XEN_PCI_OP_conf_write
 
- XEN_PCI_OP_disable_msi
 
- XEN_PCI_OP_disable_msix
 
- XEN_PCI_OP_enable_msi
 
- XEN_PCI_OP_enable_msix
 
- XEN_PCPU_FLAGS_INVALID
 
- XEN_PCPU_FLAGS_ONLINE
 
- XEN_PFN_DOWN
 
- XEN_PFN_PER_PAGE
 
- XEN_PFN_PHYS
 
- XEN_PFN_UP
 
- XEN_PHYSICAL_MASK
 
- XEN_PIRQ_MSI_DATA
 
- XEN_PLACEHOLDER_VECTOR
 
- XEN_PLATFORM_ERR_BLACKLIST
 
- XEN_PLATFORM_ERR_MAGIC
 
- XEN_PLATFORM_ERR_PROTOCOL
 
- XEN_PM_CX
 
- XEN_PM_PDC
 
- XEN_PM_PX
 
- XEN_PM_TX
 
- XEN_PROCESSOR_PM_CX
 
- XEN_PROCESSOR_PM_PX
 
- XEN_PROCESSOR_PM_TX
 
- XEN_PTE_MFN_MASK
 
- XEN_PV_DOMAIN
 
- XEN_PX_PCT
 
- XEN_PX_PPC
 
- XEN_PX_PSD
 
- XEN_PX_PSS
 
- XEN_RESCHEDULE_VECTOR
 
- XEN_RUNSTATE_UPDATE
 
- XEN_SCSI_DISK0_MAJOR
 
- XEN_SCSI_DISK10_MAJOR
 
- XEN_SCSI_DISK11_MAJOR
 
- XEN_SCSI_DISK12_MAJOR
 
- XEN_SCSI_DISK13_MAJOR
 
- XEN_SCSI_DISK14_MAJOR
 
- XEN_SCSI_DISK15_MAJOR
 
- XEN_SCSI_DISK1_MAJOR
 
- XEN_SCSI_DISK2_MAJOR
 
- XEN_SCSI_DISK3_MAJOR
 
- XEN_SCSI_DISK4_MAJOR
 
- XEN_SCSI_DISK5_MAJOR
 
- XEN_SCSI_DISK6_MAJOR
 
- XEN_SCSI_DISK7_MAJOR
 
- XEN_SCSI_DISK8_MAJOR
 
- XEN_SCSI_DISK9_MAJOR
 
- XEN_SPIN_UNLOCK_VECTOR
 
- XEN_SWIOTLB_EFIXUP
 
- XEN_SWIOTLB_ENOMEM
 
- XEN_SWIOTLB_UNKNOWN
 
- XEN_UNPLUG_ALL
 
- XEN_UNPLUG_ALL_IDE_DISKS
 
- XEN_UNPLUG_ALL_NICS
 
- XEN_UNPLUG_AUX_IDE_DISKS
 
- XEN_UNPLUG_NEVER
 
- XEN_UNPLUG_UNNECESSARY
 
- XEN_VCPU_ID_INVALID
 
- XEN_VGATYPE_EFI_LFB
 
- XEN_VGATYPE_TEXT_MODE_3
 
- XEN_VGATYPE_VESA_LFB
 
- XEN_XEN_STUB_H
 
- XEOFEN
 
- XEON_B2B_BAR0_ADDR
 
- XEON_B2B_BAR2_ADDR64
 
- XEON_B2B_BAR4_ADDR32
 
- XEON_B2B_BAR4_ADDR64
 
- XEON_B2B_BAR5_ADDR32
 
- XEON_B2B_DOORBELL_OFFSET
 
- XEON_B2B_MIN_SIZE
 
- XEON_B2B_SPAD_OFFSET
 
- XEON_B2B_XLAT_OFFSETL
 
- XEON_B2B_XLAT_OFFSETU
 
- XEON_CORERRSTS_OFFSET
 
- XEON_DB_COUNT
 
- XEON_DB_LINK
 
- XEON_DB_LINK_BIT
 
- XEON_DB_MSIX_VECTOR_COUNT
 
- XEON_DB_MSIX_VECTOR_SHIFT
 
- XEON_DB_TOTAL_SHIFT
 
- XEON_DEVCTRL_OFFSET
 
- XEON_DEVSTS_OFFSET
 
- XEON_LINK_STATUS_OFFSET
 
- XEON_MW_COUNT
 
- XEON_NTBCNTL_OFFSET
 
- XEON_PBAR23LMT_OFFSET
 
- XEON_PBAR23SZ_OFFSET
 
- XEON_PBAR23XLAT_OFFSET
 
- XEON_PBAR45LMT_OFFSET
 
- XEON_PBAR45SZ_OFFSET
 
- XEON_PBAR45XLAT_OFFSET
 
- XEON_PBAR4LMT_OFFSET
 
- XEON_PBAR4SZ_OFFSET
 
- XEON_PBAR4XLAT_OFFSET
 
- XEON_PBAR5LMT_OFFSET
 
- XEON_PBAR5SZ_OFFSET
 
- XEON_PBAR5XLAT_OFFSET
 
- XEON_PDBMSK_OFFSET
 
- XEON_PDOORBELL_OFFSET
 
- XEON_PPD_CONN_B2B
 
- XEON_PPD_CONN_MASK
 
- XEON_PPD_CONN_RP
 
- XEON_PPD_CONN_TRANSPARENT
 
- XEON_PPD_DEV_DSD
 
- XEON_PPD_DEV_MASK
 
- XEON_PPD_DEV_USD
 
- XEON_PPD_OFFSET
 
- XEON_PPD_SPLIT_BAR_MASK
 
- XEON_PPD_TOPO_B2B_DSD
 
- XEON_PPD_TOPO_B2B_USD
 
- XEON_PPD_TOPO_MASK
 
- XEON_PPD_TOPO_PRI_DSD
 
- XEON_PPD_TOPO_PRI_USD
 
- XEON_PPD_TOPO_SEC_DSD
 
- XEON_PPD_TOPO_SEC_USD
 
- XEON_SBAR0BASE_OFFSET
 
- XEON_SBAR23BASE_OFFSET
 
- XEON_SBAR23LMT_OFFSET
 
- XEON_SBAR23SZ_OFFSET
 
- XEON_SBAR23XLAT_OFFSET
 
- XEON_SBAR45BASE_OFFSET
 
- XEON_SBAR45LMT_OFFSET
 
- XEON_SBAR45SZ_OFFSET
 
- XEON_SBAR45XLAT_OFFSET
 
- XEON_SBAR4BASE_OFFSET
 
- XEON_SBAR4LMT_OFFSET
 
- XEON_SBAR4SZ_OFFSET
 
- XEON_SBAR4XLAT_OFFSET
 
- XEON_SBAR5BASE_OFFSET
 
- XEON_SBAR5LMT_OFFSET
 
- XEON_SBAR5SZ_OFFSET
 
- XEON_SBAR5XLAT_OFFSET
 
- XEON_SBDF_OFFSET
 
- XEON_SDBMSK_OFFSET
 
- XEON_SDOORBELL_OFFSET
 
- XEON_SLINK_STATUS_OFFSET
 
- XEON_SPAD_COUNT
 
- XEON_SPAD_OFFSET
 
- XEON_SPCICMD_OFFSET
 
- XEON_UNCERRSTS_OFFSET
 
- XEON_USMEMMISS_OFFSET
 
- XEON_WCCNTRL_OFFSET
 
- XER
 
- XERR
 
- XER_CA
 
- XER_CA32
 
- XER_OV
 
- XER_OV32
 
- XER_SAVE
 
- XER_SO
 
- XES_FREQ_COUNT8_44_MAX
 
- XES_FREQ_COUNT8_44_MIN
 
- XES_FREQ_COUNT8_48_MAX
 
- XES_FREQ_COUNT8_MASK
 
- XEU
 
- XEXT_SIZE
 
- XE_BAD_PHASE
 
- XE_EXTRA_DATA
 
- XE_MASK
 
- XE_OK
 
- XE_PARITY_ERR
 
- XE_SODL_UNRUN
 
- XE_SWIDE_OVRUN
 
- XF
 
- XFAIL
 
- XFCP0_MMHUBBUB_XFC_CNTL__ALPHA_POSITION_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__ALPHA_POSITION__SHIFT
 
- XFCP0_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE__SHIFT
 
- XFCP0_MMHUBBUB_XFC_CNTL__MXFC_ENABLE_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__MXFC_ENABLE__SHIFT
 
- XFCP0_MMHUBBUB_XFC_CNTL__MY_GPUID_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__MY_GPUID__SHIFT
 
- XFCP0_MMHUBBUB_XFC_CNTL__PIXEL_64BPP_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__PIXEL_64BPP__SHIFT
 
- XFCP0_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID__SHIFT
 
- XFCP0_MMHUBBUB_XFC_CNTL__SXFC_ENABLE_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__SXFC_ENABLE__SHIFT
 
- XFCP0_MMHUBBUB_XFC_CNTL__TARGET_PID_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__TARGET_PID__SHIFT
 
- XFCP0_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE_MASK
 
- XFCP0_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE__SHIFT
 
- XFCP0_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE_MASK
 
- XFCP0_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE__SHIFT
 
- XFCP0_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH_MASK
 
- XFCP0_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH__SHIFT
 
- XFCP0_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT_MASK
 
- XFCP0_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT__SHIFT
 
- XFCP0_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH_MASK
 
- XFCP0_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH__SHIFT
 
- XFCP0_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB_MASK
 
- XFCP0_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB__SHIFT
 
- XFCP0_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB_MASK
 
- XFCP0_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB__SHIFT
 
- XFCP0_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB_MASK
 
- XFCP0_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB__SHIFT
 
- XFCP0_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB_MASK
 
- XFCP0_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__ALPHA_POSITION_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__ALPHA_POSITION__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__MXFC_ENABLE_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__MXFC_ENABLE__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__MY_GPUID_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__MY_GPUID__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__PIXEL_64BPP_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__PIXEL_64BPP__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__SXFC_ENABLE_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__SXFC_ENABLE__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__TARGET_PID_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__TARGET_PID__SHIFT
 
- XFCP1_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE_MASK
 
- XFCP1_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE__SHIFT
 
- XFCP1_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE_MASK
 
- XFCP1_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE__SHIFT
 
- XFCP1_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH_MASK
 
- XFCP1_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH__SHIFT
 
- XFCP1_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT_MASK
 
- XFCP1_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT__SHIFT
 
- XFCP1_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH_MASK
 
- XFCP1_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH__SHIFT
 
- XFCP1_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB_MASK
 
- XFCP1_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB__SHIFT
 
- XFCP1_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB_MASK
 
- XFCP1_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB__SHIFT
 
- XFCP1_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB_MASK
 
- XFCP1_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB__SHIFT
 
- XFCP1_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB_MASK
 
- XFCP1_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__ALPHA_POSITION_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__ALPHA_POSITION__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__MXFC_ENABLE_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__MXFC_ENABLE__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__MY_GPUID_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__MY_GPUID__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__PIXEL_64BPP_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__PIXEL_64BPP__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__SXFC_ENABLE_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__SXFC_ENABLE__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__TARGET_PID_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__TARGET_PID__SHIFT
 
- XFCP2_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE_MASK
 
- XFCP2_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE__SHIFT
 
- XFCP2_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE_MASK
 
- XFCP2_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE__SHIFT
 
- XFCP2_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH_MASK
 
- XFCP2_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH__SHIFT
 
- XFCP2_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT_MASK
 
- XFCP2_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT__SHIFT
 
- XFCP2_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH_MASK
 
- XFCP2_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH__SHIFT
 
- XFCP2_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB_MASK
 
- XFCP2_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB__SHIFT
 
- XFCP2_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB_MASK
 
- XFCP2_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB__SHIFT
 
- XFCP2_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB_MASK
 
- XFCP2_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB__SHIFT
 
- XFCP2_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB_MASK
 
- XFCP2_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__ALPHA_POSITION_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__ALPHA_POSITION__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__MXFC_ENABLE_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__MXFC_ENABLE__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__MY_GPUID_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__MY_GPUID__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__PIXEL_64BPP_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__PIXEL_64BPP__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__SXFC_ENABLE_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__SXFC_ENABLE__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__TARGET_PID_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__TARGET_PID__SHIFT
 
- XFCP3_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE_MASK
 
- XFCP3_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE__SHIFT
 
- XFCP3_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE_MASK
 
- XFCP3_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE__SHIFT
 
- XFCP3_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH_MASK
 
- XFCP3_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH__SHIFT
 
- XFCP3_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT_MASK
 
- XFCP3_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT__SHIFT
 
- XFCP3_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH_MASK
 
- XFCP3_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH__SHIFT
 
- XFCP3_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB_MASK
 
- XFCP3_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB__SHIFT
 
- XFCP3_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB_MASK
 
- XFCP3_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB__SHIFT
 
- XFCP3_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB_MASK
 
- XFCP3_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB__SHIFT
 
- XFCP3_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB_MASK
 
- XFCP3_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__ALPHA_POSITION_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__ALPHA_POSITION__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__MXFC_ENABLE_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__MXFC_ENABLE__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__MY_GPUID_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__MY_GPUID__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__PIXEL_64BPP_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__PIXEL_64BPP__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__SXFC_ENABLE_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__SXFC_ENABLE__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__TARGET_PID_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__TARGET_PID__SHIFT
 
- XFCP4_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE_MASK
 
- XFCP4_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE__SHIFT
 
- XFCP4_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE_MASK
 
- XFCP4_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE__SHIFT
 
- XFCP4_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH_MASK
 
- XFCP4_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH__SHIFT
 
- XFCP4_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT_MASK
 
- XFCP4_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT__SHIFT
 
- XFCP4_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH_MASK
 
- XFCP4_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH__SHIFT
 
- XFCP4_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB_MASK
 
- XFCP4_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB__SHIFT
 
- XFCP4_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB_MASK
 
- XFCP4_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB__SHIFT
 
- XFCP4_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB_MASK
 
- XFCP4_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB__SHIFT
 
- XFCP4_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB_MASK
 
- XFCP4_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__ALPHA_POSITION_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__ALPHA_POSITION__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__BW_REDUCTION_MODE__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__MXFC_ENABLE_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__MXFC_ENABLE__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__MY_GPUID_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__MY_GPUID__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__PIXEL_64BPP_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__PIXEL_64BPP__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__SLV2MST_GPUID__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__SXFC_ENABLE_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__SXFC_ENABLE__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__TARGET_PID_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__TARGET_PID__SHIFT
 
- XFCP5_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE_MASK
 
- XFCP5_MMHUBBUB_XFC_CNTL__XBUF_FULL_ENABLE__SHIFT
 
- XFCP5_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE_MASK
 
- XFCP5_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_SW_MODE__SHIFT
 
- XFCP5_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH_MASK
 
- XFCP5_MMHUBBUB_XFC_XBUF_CONFIG__XBUF_WR_PITCH__SHIFT
 
- XFCP5_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT_MASK
 
- XFCP5_MMHUBBUB_XFC_XBUF_SIZE__XBUF_HEIGHT__SHIFT
 
- XFCP5_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH_MASK
 
- XFCP5_MMHUBBUB_XFC_XBUF_SIZE__XBUF_WIDTH__SHIFT
 
- XFCP5_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB_MASK
 
- XFCP5_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_LSB__XBUF_WR_BASE0_ADDR_LSB__SHIFT
 
- XFCP5_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB_MASK
 
- XFCP5_MMHUBBUB_XFC_XBUF_WR_BASE0_ADDR_MSB__XBUF_WR_BASE0_ADDR_MSB__SHIFT
 
- XFCP5_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB_MASK
 
- XFCP5_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_LSB__XBUF_WR_BASE1_ADDR_LSB__SHIFT
 
- XFCP5_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB_MASK
 
- XFCP5_MMHUBBUB_XFC_XBUF_WR_BASE1_ADDR_MSB__XBUF_WR_BASE1_ADDR_MSB__SHIFT
 
- XFC_MEM_PWR_CNTL__XFC_MEM_PWR_DIS_MASK
 
- XFC_MEM_PWR_CNTL__XFC_MEM_PWR_DIS__SHIFT
 
- XFC_MEM_PWR_CNTL__XFC_MEM_PWR_FORCE_MASK
 
- XFC_MEM_PWR_CNTL__XFC_MEM_PWR_FORCE__SHIFT
 
- XFC_MEM_PWR_CNTL__XFC_MEM_PWR_MODE_SEL_MASK
 
- XFC_MEM_PWR_CNTL__XFC_MEM_PWR_MODE_SEL__SHIFT
 
- XFC_MEM_PWR_CNTL__XFC_MEM_PWR_STATE_MASK
 
- XFC_MEM_PWR_CNTL__XFC_MEM_PWR_STATE__SHIFT
 
- XFEATURE_BNDCSR
 
- XFEATURE_BNDREGS
 
- XFEATURE_FP
 
- XFEATURE_Hi16_ZMM
 
- XFEATURE_MASK_AVX512
 
- XFEATURE_MASK_BNDCSR
 
- XFEATURE_MASK_BNDREGS
 
- XFEATURE_MASK_EXTEND
 
- XFEATURE_MASK_FP
 
- XFEATURE_MASK_FPSSE
 
- XFEATURE_MASK_Hi16_ZMM
 
- XFEATURE_MASK_OPMASK
 
- XFEATURE_MASK_PKRU
 
- XFEATURE_MASK_PT
 
- XFEATURE_MASK_SSE
 
- XFEATURE_MASK_SUPERVISOR
 
- XFEATURE_MASK_YMM
 
- XFEATURE_MASK_ZMM_Hi256
 
- XFEATURE_MAX
 
- XFEATURE_OPMASK
 
- XFEATURE_PKRU
 
- XFEATURE_PT_UNIMPLEMENTED_SO_FAR
 
- XFEATURE_SSE
 
- XFEATURE_YMM
 
- XFEATURE_ZMM_Hi256
 
- XFERDATAIN
 
- XFERDATAIN_SG
 
- XFERDATAOUT
 
- XFERDATAOUT_SG
 
- XFERPENDING
 
- XFER_ADDR
 
- XFER_ADDR_MASK
 
- XFER_BLK64
 
- XFER_BULK
 
- XFER_CFG
 
- XFER_CNT_0
 
- XFER_COUNT_MASK
 
- XFER_CTR
 
- XFER_DIR_MASK
 
- XFER_DMAADDR_INVALID
 
- XFER_DMA_8BIT
 
- XFER_DMA_HOST
 
- XFER_DONE_IRQ
 
- XFER_ERASED
 
- XFER_ERASING
 
- XFER_FAILED
 
- XFER_HOST_AUTO
 
- XFER_HOST_DMA
 
- XFER_ISOC
 
- XFER_MODE
 
- XFER_MW_DMA_0
 
- XFER_MW_DMA_1
 
- XFER_MW_DMA_2
 
- XFER_MW_DMA_3
 
- XFER_MW_DMA_4
 
- XFER_NAKED
 
- XFER_NONE
 
- XFER_PIO_0
 
- XFER_PIO_1
 
- XFER_PIO_2
 
- XFER_PIO_3
 
- XFER_PIO_4
 
- XFER_PIO_5
 
- XFER_PIO_6
 
- XFER_PIO_SLOW
 
- XFER_PREPARED
 
- XFER_RDY_OFS
 
- XFER_READ
 
- XFER_RECEIVE
 
- XFER_RSVD
 
- XFER_SIZE
 
- XFER_START
 
- XFER_SW_DMA_0
 
- XFER_SW_DMA_1
 
- XFER_SW_DMA_2
 
- XFER_TIMEOUT
 
- XFER_TIMEOUT_TOLERANCE
 
- XFER_TRANSMIT
 
- XFER_UDMA_0
 
- XFER_UDMA_1
 
- XFER_UDMA_2
 
- XFER_UDMA_3
 
- XFER_UDMA_4
 
- XFER_UDMA_5
 
- XFER_UDMA_6
 
- XFER_UDMA_7
 
- XFER_UNKNOWN
 
- XFER_WIDTH_16B
 
- XFER_WIDTH_8B
 
- XFER_WIDTH_MASK
 
- XFER_WRITE
 
- XFI2_AN_SEG_NUM
 
- XFI2_HSS_PCS_SEG_NUM
 
- XFI2_HSS_PLL_SEG_NUM
 
- XFI2_HSS_RX_SEG_NUM
 
- XFI2_HSS_TX_SEG_NUM
 
- XFI2_TRAIN_SEG_NUM
 
- XFIG
 
- XFI_AN_SEG_NUM
 
- XFI_HSS_PCS_SEG_NUM
 
- XFI_HSS_PLL_SEG_NUM
 
- XFI_HSS_RX_SEG_NUM
 
- XFI_HSS_TX_SEG_NUM
 
- XFI_TRAIN_SEG_NUM
 
- XFL
 
- XFLB
 
- XFL_L
 
- XFL_MASK
 
- XFM_COMMON_MASK_SH_LIST_DCE110
 
- XFM_COMMON_MASK_SH_LIST_DCE80
 
- XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE
 
- XFM_COMMON_MASK_SH_LIST_SOC_BASE
 
- XFM_COMMON_REG_LIST_DCE100
 
- XFM_COMMON_REG_LIST_DCE110
 
- XFM_COMMON_REG_LIST_DCE80
 
- XFM_COMMON_REG_LIST_DCE_BASE
 
- XFM_REG_FIELD_LIST
 
- XFM_SF
 
- XFORM
 
- XFRAME_II_DEVICE
 
- XFRAME_II_STAT_LEN
 
- XFRAME_II_STAT_STRINGS_LEN
 
- XFRAME_I_DEVICE
 
- XFRAME_I_STAT_LEN
 
- XFRAME_I_STAT_STRINGS_LEN
 
- XFRCNT_MTC_MASK
 
- XFRLEN1
 
- XFRLEN2
 
- XFRM6_TUNNEL_SPI_BYADDR_HSIZE
 
- XFRM6_TUNNEL_SPI_BYSPI_HSIZE
 
- XFRM6_TUNNEL_SPI_MAX
 
- XFRM6_TUNNEL_SPI_MIN
 
- XFRMA_ADDRESS_FILTER
 
- XFRMA_ALG_AEAD
 
- XFRMA_ALG_AUTH
 
- XFRMA_ALG_AUTH_TRUNC
 
- XFRMA_ALG_COMP
 
- XFRMA_ALG_CRYPT
 
- XFRMA_COADDR
 
- XFRMA_ENCAP
 
- XFRMA_ETIMER_THRESH
 
- XFRMA_IF_ID
 
- XFRMA_KMADDRESS
 
- XFRMA_LASTUSED
 
- XFRMA_LTIME_VAL
 
- XFRMA_MARK
 
- XFRMA_MAX
 
- XFRMA_MIGRATE
 
- XFRMA_OFFLOAD_DEV
 
- XFRMA_OUTPUT_MARK
 
- XFRMA_PAD
 
- XFRMA_POLICY
 
- XFRMA_POLICY_TYPE
 
- XFRMA_PROTO
 
- XFRMA_REPLAY_ESN_MAX
 
- XFRMA_REPLAY_ESN_VAL
 
- XFRMA_REPLAY_THRESH
 
- XFRMA_REPLAY_VAL
 
- XFRMA_SA
 
- XFRMA_SAD_CNT
 
- XFRMA_SAD_HINFO
 
- XFRMA_SAD_MAX
 
- XFRMA_SAD_UNSPEC
 
- XFRMA_SA_EXTRA_FLAGS
 
- XFRMA_SEC_CTX
 
- XFRMA_SET_MARK
 
- XFRMA_SET_MARK_MASK
 
- XFRMA_SPD_HINFO
 
- XFRMA_SPD_INFO
 
- XFRMA_SPD_IPV4_HTHRESH
 
- XFRMA_SPD_IPV6_HTHRESH
 
- XFRMA_SPD_MAX
 
- XFRMA_SPD_UNSPEC
 
- XFRMA_SRCADDR
 
- XFRMA_TFCPAD
 
- XFRMA_TMPL
 
- XFRMA_UNSPEC
 
- XFRMGRP_ACQUIRE
 
- XFRMGRP_EXPIRE
 
- XFRMGRP_POLICY
 
- XFRMGRP_REPORT
 
- XFRMGRP_SA
 
- XFRMNLGRP_ACQUIRE
 
- XFRMNLGRP_AEVENTS
 
- XFRMNLGRP_EXPIRE
 
- XFRMNLGRP_MAPPING
 
- XFRMNLGRP_MAX
 
- XFRMNLGRP_MIGRATE
 
- XFRMNLGRP_NONE
 
- XFRMNLGRP_POLICY
 
- XFRMNLGRP_REPORT
 
- XFRMNLGRP_SA
 
- XFRM_AE_CE
 
- XFRM_AE_CR
 
- XFRM_AE_CU
 
- XFRM_AE_ETHR
 
- XFRM_AE_ETH_M
 
- XFRM_AE_ETIME
 
- XFRM_AE_LVAL
 
- XFRM_AE_MAX
 
- XFRM_AE_RTHR
 
- XFRM_AE_RVAL
 
- XFRM_AE_SEQT_SIZE
 
- XFRM_AE_UNSPEC
 
- XFRM_ALIGN4
 
- XFRM_ALIGN8
 
- XFRM_DEV_RESUME
 
- XFRM_ESP_NO_TRAILER
 
- XFRM_GRO
 
- XFRM_GSO_SEGMENT
 
- XFRM_INC_STATS
 
- XFRM_INF
 
- XFRM_INOUT_H
 
- XFRM_KM_TIMEOUT
 
- XFRM_LOOKUP_ICMP
 
- XFRM_LOOKUP_KEEP_DST_REF
 
- XFRM_LOOKUP_QUEUE
 
- XFRM_MAX_DEPTH
 
- XFRM_MAX_OFFLOAD_DEPTH
 
- XFRM_MAX_QUEUE_LEN
 
- XFRM_MODE_BEET
 
- XFRM_MODE_FLAG_TUNNEL
 
- XFRM_MODE_IN_TRIGGER
 
- XFRM_MODE_MAX
 
- XFRM_MODE_ROUTEOPTIMIZATION
 
- XFRM_MODE_SKB_CB
 
- XFRM_MODE_TRANSPORT
 
- XFRM_MODE_TUNNEL
 
- XFRM_MSG_ACQUIRE
 
- XFRM_MSG_ALLOCSPI
 
- XFRM_MSG_BASE
 
- XFRM_MSG_DELPOLICY
 
- XFRM_MSG_DELSA
 
- XFRM_MSG_EXPIRE
 
- XFRM_MSG_FLUSHPOLICY
 
- XFRM_MSG_FLUSHSA
 
- XFRM_MSG_GETAE
 
- XFRM_MSG_GETPOLICY
 
- XFRM_MSG_GETSA
 
- XFRM_MSG_GETSADINFO
 
- XFRM_MSG_GETSPDINFO
 
- XFRM_MSG_MAPPING
 
- XFRM_MSG_MAX
 
- XFRM_MSG_MIGRATE
 
- XFRM_MSG_NEWAE
 
- XFRM_MSG_NEWPOLICY
 
- XFRM_MSG_NEWSA
 
- XFRM_MSG_NEWSADINFO
 
- XFRM_MSG_NEWSPDINFO
 
- XFRM_MSG_POLEXPIRE
 
- XFRM_MSG_REPORT
 
- XFRM_MSG_UPDPOLICY
 
- XFRM_MSG_UPDSA
 
- XFRM_NR_MSGTYPES
 
- XFRM_OFFLOAD_INBOUND
 
- XFRM_OFFLOAD_IPV6
 
- XFRM_POLICY_ALLOW
 
- XFRM_POLICY_BLOCK
 
- XFRM_POLICY_FWD
 
- XFRM_POLICY_ICMP
 
- XFRM_POLICY_IN
 
- XFRM_POLICY_LOCALOK
 
- XFRM_POLICY_MASK
 
- XFRM_POLICY_MAX
 
- XFRM_POLICY_OUT
 
- XFRM_POLICY_TYPE_ANY
 
- XFRM_POLICY_TYPE_MAIN
 
- XFRM_POLICY_TYPE_MAX
 
- XFRM_POLICY_TYPE_SUB
 
- XFRM_POL_CAND_ANY
 
- XFRM_POL_CAND_BOTH
 
- XFRM_POL_CAND_DADDR
 
- XFRM_POL_CAND_MAX
 
- XFRM_POL_CAND_SADDR
 
- XFRM_PROTO_AH
 
- XFRM_PROTO_COMP
 
- XFRM_PROTO_DSTOPTS
 
- XFRM_PROTO_ESP
 
- XFRM_PROTO_IPIP
 
- XFRM_PROTO_IPV6
 
- XFRM_PROTO_ROUTING
 
- XFRM_QUEUE_TMO_MAX
 
- XFRM_QUEUE_TMO_MIN
 
- XFRM_REPLAY_TIMEOUT
 
- XFRM_REPLAY_UPDATE
 
- XFRM_SA_XFLAG_DONT_ENCAP_DSCP
 
- XFRM_SC_ALG_RESERVED
 
- XFRM_SC_ALG_SELINUX
 
- XFRM_SC_DOI_LSM
 
- XFRM_SC_DOI_RESERVED
 
- XFRM_SHARE_ANY
 
- XFRM_SHARE_SESSION
 
- XFRM_SHARE_UNIQUE
 
- XFRM_SHARE_USER
 
- XFRM_SKB_CB
 
- XFRM_SOFT_EXPIRE
 
- XFRM_SPI_SKB_CB
 
- XFRM_STATE_ACQ
 
- XFRM_STATE_AF_UNSPEC
 
- XFRM_STATE_ALIGN4
 
- XFRM_STATE_DEAD
 
- XFRM_STATE_DECAP_DSCP
 
- XFRM_STATE_ERROR
 
- XFRM_STATE_ESN
 
- XFRM_STATE_EXPIRED
 
- XFRM_STATE_ICMP
 
- XFRM_STATE_NOECN
 
- XFRM_STATE_NOPMTUDISC
 
- XFRM_STATE_VALID
 
- XFRM_STATE_VOID
 
- XFRM_STATE_WILDRECV
 
- XFRM_TIME_DEFER
 
- XFRM_TRANS_SKB_CB
 
- XFRM_TUNNEL_SKB_CB
 
- XFRM_TYPE_LOCAL_COADDR
 
- XFRM_TYPE_NON_FRAGMENT
 
- XFRM_TYPE_REMOTE_COADDR
 
- XFRM_TYPE_REPLAY_PROT
 
- XFRQE_PROT_FLAGS_DIF_TO_PEER_MASK
 
- XFRQE_PROT_FLAGS_DIF_TO_PEER_SHIFT
 
- XFRQE_PROT_FLAGS_HOST_INTERFACE_MASK
 
- XFRQE_PROT_FLAGS_HOST_INTERFACE_SHIFT
 
- XFRQE_PROT_FLAGS_PROT_INTERVAL_SIZE_LOG_MASK
 
- XFRQE_PROT_FLAGS_PROT_INTERVAL_SIZE_LOG_SHIFT
 
- XFRQE_PROT_FLAGS_RESERVED_MASK
 
- XFRQE_PROT_FLAGS_RESERVED_SHIFT
 
- XFSA_FIXUP_BNO_OK
 
- XFSA_FIXUP_CNT_OK
 
- XFSLABEL_MAX
 
- XFSSTAT_END_XQMSTAT
 
- XFSSTAT_START_XQMSTAT
 
- XFSXEN
 
- XFS_ABSDIFF
 
- XFS_ABTB_CRC_MAGIC
 
- XFS_ABTB_MAGIC
 
- XFS_ABTC_CRC_MAGIC
 
- XFS_ABTC_MAGIC
 
- XFS_ACL_MAX_ENTRIES
 
- XFS_ACL_MAX_SIZE
 
- XFS_ACL_SIZE
 
- XFS_ACL_STRING
 
- XFS_ADDAFORK_LOG_COUNT
 
- XFS_ADDAFORK_SPACE_RES
 
- XFS_AGBLOCK_MAX
 
- XFS_AGBLOCK_MIN
 
- XFS_AGB_TO_AGINO
 
- XFS_AGB_TO_DADDR
 
- XFS_AGB_TO_FSB
 
- XFS_AGFL_BLOCK
 
- XFS_AGFL_CRC_OFF
 
- XFS_AGFL_DADDR
 
- XFS_AGFL_MAGIC
 
- XFS_AGFL_REF
 
- XFS_AGF_ALL_BITS
 
- XFS_AGF_BLOCK
 
- XFS_AGF_BTREEBLKS
 
- XFS_AGF_CRC_OFF
 
- XFS_AGF_DADDR
 
- XFS_AGF_FLAGS
 
- XFS_AGF_FLCOUNT
 
- XFS_AGF_FLFIRST
 
- XFS_AGF_FLLAST
 
- XFS_AGF_FREEBLKS
 
- XFS_AGF_GOOD_VERSION
 
- XFS_AGF_LENGTH
 
- XFS_AGF_LEVELS
 
- XFS_AGF_LONGEST
 
- XFS_AGF_MAGIC
 
- XFS_AGF_MAGICNUM
 
- XFS_AGF_NUM_BITS
 
- XFS_AGF_REF
 
- XFS_AGF_REFCOUNT_BLOCKS
 
- XFS_AGF_REFCOUNT_LEVEL
 
- XFS_AGF_REFCOUNT_ROOT
 
- XFS_AGF_RMAP_BLOCKS
 
- XFS_AGF_ROOTS
 
- XFS_AGF_SEQNO
 
- XFS_AGF_SPARE64
 
- XFS_AGF_UUID
 
- XFS_AGF_VERSION
 
- XFS_AGF_VERSIONNUM
 
- XFS_AGINO_TO_AGBNO
 
- XFS_AGINO_TO_INO
 
- XFS_AGINO_TO_OFFSET
 
- XFS_AGITER_INEW_WAIT
 
- XFS_AGI_ALL_BITS_R1
 
- XFS_AGI_BLOCK
 
- XFS_AGI_COUNT
 
- XFS_AGI_CRC_OFF
 
- XFS_AGI_DADDR
 
- XFS_AGI_DIRINO
 
- XFS_AGI_FREECOUNT
 
- XFS_AGI_FREE_LEVEL
 
- XFS_AGI_FREE_ROOT
 
- XFS_AGI_GOOD_VERSION
 
- XFS_AGI_LENGTH
 
- XFS_AGI_LEVEL
 
- XFS_AGI_MAGIC
 
- XFS_AGI_MAGICNUM
 
- XFS_AGI_NEWINO
 
- XFS_AGI_NUM_BITS_R1
 
- XFS_AGI_NUM_BITS_R2
 
- XFS_AGI_REF
 
- XFS_AGI_ROOT
 
- XFS_AGI_SEQNO
 
- XFS_AGI_UNLINKED
 
- XFS_AGI_UNLINKED_BUCKETS
 
- XFS_AGI_VERSION
 
- XFS_AGI_VERSIONNUM
 
- XFS_AG_BTREE_CMP_FORMAT_STR
 
- XFS_AG_CHECK_DADDR
 
- XFS_AG_DADDR
 
- XFS_AG_GEOM_SICK_AGF
 
- XFS_AG_GEOM_SICK_AGFL
 
- XFS_AG_GEOM_SICK_AGI
 
- XFS_AG_GEOM_SICK_BNOBT
 
- XFS_AG_GEOM_SICK_CNTBT
 
- XFS_AG_GEOM_SICK_FINOBT
 
- XFS_AG_GEOM_SICK_INOBT
 
- XFS_AG_GEOM_SICK_REFCNTBT
 
- XFS_AG_GEOM_SICK_RMAPBT
 
- XFS_AG_GEOM_SICK_SB
 
- XFS_AG_RESV_AGFL
 
- XFS_AG_RESV_METADATA
 
- XFS_AG_RESV_NONE
 
- XFS_AG_RESV_RMAPBT
 
- XFS_ALLOCTYPE_FIRST_AG
 
- XFS_ALLOCTYPE_NEAR_BNO
 
- XFS_ALLOCTYPE_START_BNO
 
- XFS_ALLOCTYPE_THIS_AG
 
- XFS_ALLOCTYPE_THIS_BNO
 
- XFS_ALLOC_AGFL_RESERVE
 
- XFS_ALLOC_BLOCK_LEN
 
- XFS_ALLOC_BTREE_REF
 
- XFS_ALLOC_FLAG_CHECK
 
- XFS_ALLOC_FLAG_FREEING
 
- XFS_ALLOC_FLAG_NORMAP
 
- XFS_ALLOC_FLAG_NOSHRINK
 
- XFS_ALLOC_FLAG_TRYLOCK
 
- XFS_ALLOC_GAP_UNITS
 
- XFS_ALLOC_INITIAL_USER_DATA
 
- XFS_ALLOC_KEY_ADDR
 
- XFS_ALLOC_NOBUSY
 
- XFS_ALLOC_PTR_ADDR
 
- XFS_ALLOC_REC_ADDR
 
- XFS_ALLOC_TYPES
 
- XFS_ALLOC_USERDATA
 
- XFS_ALLOC_USERDATA_ZERO
 
- XFS_ALL_QUOTA_ACCT
 
- XFS_ALL_QUOTA_ACTIVE
 
- XFS_ALL_QUOTA_CHKD
 
- XFS_ALL_QUOTA_ENFD
 
- XFS_ASSERT_FATAL
 
- XFS_ATTR3_LEAF_CRC_OFF
 
- XFS_ATTR3_LEAF_MAGIC
 
- XFS_ATTR3_LEAF_NULLOFF
 
- XFS_ATTR3_RMT_BUF_SPACE
 
- XFS_ATTR3_RMT_CRC_OFF
 
- XFS_ATTR3_RMT_MAGIC
 
- XFS_ATTRINVAL_LOG_COUNT
 
- XFS_ATTRRM_LOG_COUNT
 
- XFS_ATTRRM_SPACE_RES
 
- XFS_ATTRSET_LOG_COUNT
 
- XFS_ATTRSET_SPACE_RES
 
- XFS_ATTR_ABS
 
- XFS_ATTR_BTREE_REF
 
- XFS_ATTR_FLAGS
 
- XFS_ATTR_FORK
 
- XFS_ATTR_INCOMPLETE
 
- XFS_ATTR_INCOMPLETE_BIT
 
- XFS_ATTR_LEAF_MAGIC
 
- XFS_ATTR_LEAF_MAPSIZE
 
- XFS_ATTR_LEAF_NAME_ALIGN
 
- XFS_ATTR_LOCAL
 
- XFS_ATTR_LOCAL_BIT
 
- XFS_ATTR_NOACL
 
- XFS_ATTR_NSP_ARGS
 
- XFS_ATTR_NSP_ARGS_MASK
 
- XFS_ATTR_NSP_ARGS_TO_ONDISK
 
- XFS_ATTR_NSP_ONDISK
 
- XFS_ATTR_NSP_ONDISK_MASK
 
- XFS_ATTR_NSP_ONDISK_TO_ARGS
 
- XFS_ATTR_ROOT
 
- XFS_ATTR_ROOT_BIT
 
- XFS_ATTR_SECURE
 
- XFS_ATTR_SECURE_BIT
 
- XFS_ATTR_SF_ENTSIZE
 
- XFS_ATTR_SF_ENTSIZE_BYNAME
 
- XFS_ATTR_SF_ENTSIZE_MAX
 
- XFS_ATTR_SF_NEXTENTRY
 
- XFS_ATTR_SF_TOTSIZE
 
- XFS_BB_ALL_BITS
 
- XFS_BB_ALL_BITS_CRC
 
- XFS_BB_BLKNO
 
- XFS_BB_LEFTSIB
 
- XFS_BB_LEVEL
 
- XFS_BB_LSN
 
- XFS_BB_MAGIC
 
- XFS_BB_NUMRECS
 
- XFS_BB_NUM_BITS
 
- XFS_BB_NUM_BITS_CRC
 
- XFS_BB_OWNER
 
- XFS_BB_RIGHTSIB
 
- XFS_BB_SHIFT
 
- XFS_BB_TO_FSB
 
- XFS_BB_TO_FSBT
 
- XFS_BB_UUID
 
- XFS_BITTOBLOCK
 
- XFS_BITTOWORD
 
- XFS_BLFT_AGFL_BUF
 
- XFS_BLFT_AGF_BUF
 
- XFS_BLFT_AGI_BUF
 
- XFS_BLFT_ATTR_LEAF_BUF
 
- XFS_BLFT_ATTR_RMT_BUF
 
- XFS_BLFT_BITS
 
- XFS_BLFT_BTREE_BUF
 
- XFS_BLFT_DA_NODE_BUF
 
- XFS_BLFT_DINO_BUF
 
- XFS_BLFT_DIR_BLOCK_BUF
 
- XFS_BLFT_DIR_DATA_BUF
 
- XFS_BLFT_DIR_FREE_BUF
 
- XFS_BLFT_DIR_LEAF1_BUF
 
- XFS_BLFT_DIR_LEAFN_BUF
 
- XFS_BLFT_GDQUOT_BUF
 
- XFS_BLFT_MASK
 
- XFS_BLFT_MAX_BUF
 
- XFS_BLFT_PDQUOT_BUF
 
- XFS_BLFT_RTBITMAP_BUF
 
- XFS_BLFT_RTSUMMARY_BUF
 
- XFS_BLFT_SB_BUF
 
- XFS_BLFT_SHIFT
 
- XFS_BLFT_SYMLINK_BUF
 
- XFS_BLFT_UDQUOT_BUF
 
- XFS_BLFT_UNKNOWN_BUF
 
- XFS_BLF_CANCEL
 
- XFS_BLF_CHUNK
 
- XFS_BLF_DATAMAP_SIZE
 
- XFS_BLF_GDQUOT_BUF
 
- XFS_BLF_INODE_BUF
 
- XFS_BLF_PDQUOT_BUF
 
- XFS_BLF_SHIFT
 
- XFS_BLF_UDQUOT_BUF
 
- XFS_BLI_DIRTY
 
- XFS_BLI_FLAGS
 
- XFS_BLI_HOLD
 
- XFS_BLI_INODE_ALLOC_BUF
 
- XFS_BLI_INODE_BUF
 
- XFS_BLI_LOGGED
 
- XFS_BLI_ORDERED
 
- XFS_BLI_STALE
 
- XFS_BLI_STALE_INODE
 
- XFS_BLOCKMASK
 
- XFS_BLOCKSIZE
 
- XFS_BLOCKTOBIT
 
- XFS_BLOCKWMASK
 
- XFS_BLOCKWSIZE
 
- XFS_BMAPI_ATTRFORK
 
- XFS_BMAPI_CONTIG
 
- XFS_BMAPI_CONVERT
 
- XFS_BMAPI_COWFORK
 
- XFS_BMAPI_ENTIRE
 
- XFS_BMAPI_FLAGS
 
- XFS_BMAPI_METADATA
 
- XFS_BMAPI_NODISCARD
 
- XFS_BMAPI_NORMAP
 
- XFS_BMAPI_PREALLOC
 
- XFS_BMAPI_REMAP
 
- XFS_BMAPI_ZERO
 
- XFS_BMAP_BMDR_SPACE
 
- XFS_BMAP_BROOT_PTR_ADDR
 
- XFS_BMAP_BROOT_SPACE
 
- XFS_BMAP_BROOT_SPACE_CALC
 
- XFS_BMAP_BTREE_REF
 
- XFS_BMAP_CRC_MAGIC
 
- XFS_BMAP_EXTENT_ATTR_FORK
 
- XFS_BMAP_EXTENT_FLAGS
 
- XFS_BMAP_EXTENT_TYPE_MASK
 
- XFS_BMAP_EXTENT_UNWRITTEN
 
- XFS_BMAP_EXT_FLAGS
 
- XFS_BMAP_MAGIC
 
- XFS_BMAP_MAP
 
- XFS_BMAP_MAX_NMAP
 
- XFS_BMAP_UNMAP
 
- XFS_BMBT_BLOCK_LEN
 
- XFS_BMBT_KEY_ADDR
 
- XFS_BMBT_PTR_ADDR
 
- XFS_BMBT_REC_ADDR
 
- XFS_BMDR_KEY_ADDR
 
- XFS_BMDR_PTR_ADDR
 
- XFS_BMDR_REC_ADDR
 
- XFS_BMDR_SPACE_CALC
 
- XFS_BM_MAXLEVELS
 
- XFS_BNO_BLOCK
 
- XFS_BSTATE_DISPOSE
 
- XFS_BSTATE_IN_FLIGHT
 
- XFS_BS_SICK_BMBTA
 
- XFS_BS_SICK_BMBTC
 
- XFS_BS_SICK_BMBTD
 
- XFS_BS_SICK_DIR
 
- XFS_BS_SICK_INODE
 
- XFS_BS_SICK_PARENT
 
- XFS_BS_SICK_SYMLINK
 
- XFS_BS_SICK_XATTR
 
- XFS_BTNUM_AGF
 
- XFS_BTNUM_BMAP
 
- XFS_BTNUM_BMAPi
 
- XFS_BTNUM_BNO
 
- XFS_BTNUM_BNOi
 
- XFS_BTNUM_CNT
 
- XFS_BTNUM_CNTi
 
- XFS_BTNUM_FINO
 
- XFS_BTNUM_FINOi
 
- XFS_BTNUM_INO
 
- XFS_BTNUM_INOi
 
- XFS_BTNUM_MAX
 
- XFS_BTNUM_REFC
 
- XFS_BTNUM_REFCi
 
- XFS_BTNUM_RMAP
 
- XFS_BTNUM_RMAPi
 
- XFS_BTNUM_STRINGS
 
- XFS_BTREE_CRC_BLOCKS
 
- XFS_BTREE_ERROR
 
- XFS_BTREE_LASTREC_UPDATE
 
- XFS_BTREE_LBLOCK_CRC_LEN
 
- XFS_BTREE_LBLOCK_CRC_OFF
 
- XFS_BTREE_LBLOCK_LEN
 
- XFS_BTREE_LONG_PTRS
 
- XFS_BTREE_MAXLEVELS
 
- XFS_BTREE_NOERROR
 
- XFS_BTREE_OVERLAPPING
 
- XFS_BTREE_ROOT_IN_INODE
 
- XFS_BTREE_SBLOCK_CRC_LEN
 
- XFS_BTREE_SBLOCK_CRC_OFF
 
- XFS_BTREE_SBLOCK_LEN
 
- XFS_BTREE_STATS_ADD
 
- XFS_BTREE_STATS_INC
 
- XFS_BUF_ADDR
 
- XFS_BUF_AGE
 
- XFS_BUF_DADDR_NULL
 
- XFS_BUF_FLAGS
 
- XFS_BUF_SET_ADDR
 
- XFS_BUF_TIMER
 
- XFS_BUF_TO_AGF
 
- XFS_BUF_TO_AGFL
 
- XFS_BUF_TO_AGFL_BNO
 
- XFS_BUF_TO_AGI
 
- XFS_BUF_TO_BLOCK
 
- XFS_BUF_TO_SBP
 
- XFS_BUILD_OPTIONS
 
- XFS_BUI_MAX_FAST_EXTENTS
 
- XFS_BUI_RECOVERED
 
- XFS_BULKSTAT_REQ_SIZE
 
- XFS_BULKSTAT_VERSION_V1
 
- XFS_BULKSTAT_VERSION_V5
 
- XFS_BULK_IREQ_AGNO
 
- XFS_BULK_IREQ_FLAGS_ALL
 
- XFS_BULK_IREQ_SPECIAL
 
- XFS_BULK_IREQ_SPECIAL_ROOT
 
- XFS_B_FSB_OFFSET
 
- XFS_B_TO_FSB
 
- XFS_B_TO_FSBT
 
- XFS_CHECK_OFFSET
 
- XFS_CHECK_STRUCT_SIZE
 
- XFS_CMP_CASE
 
- XFS_CMP_DIFFERENT
 
- XFS_CMP_EXACT
 
- XFS_CNT_BLOCK
 
- XFS_CORRUPTION_DUMP_LEN
 
- XFS_CORRUPTION_ERROR
 
- XFS_COW_FORK
 
- XFS_CRC_SEED
 
- XFS_CREATE_LOG_COUNT
 
- XFS_CREATE_SPACE_RES
 
- XFS_CREATE_TMPFILE_LOG_COUNT
 
- XFS_CUI_MAX_FAST_EXTENTS
 
- XFS_CUI_RECOVERED
 
- XFS_DA3_NODE_CRC_OFF
 
- XFS_DA3_NODE_MAGIC
 
- XFS_DADDR_TO_FSB
 
- XFS_DAENTER_1B
 
- XFS_DAENTER_BLOCKS
 
- XFS_DAENTER_BMAP1B
 
- XFS_DAENTER_BMAPS
 
- XFS_DAENTER_DBS
 
- XFS_DAENTER_SPACE_RES
 
- XFS_DAREMOVE_SPACE_RES
 
- XFS_DATA_FORK
 
- XFS_DA_LOGOFF
 
- XFS_DA_LOGRANGE
 
- XFS_DA_NODE_MAGIC
 
- XFS_DA_NODE_MAXDEPTH
 
- XFS_DA_OP_ADDNAME
 
- XFS_DA_OP_ALLOCVAL
 
- XFS_DA_OP_CILOOKUP
 
- XFS_DA_OP_FLAGS
 
- XFS_DA_OP_JUSTCHECK
 
- XFS_DA_OP_OKNOENT
 
- XFS_DA_OP_RENAME
 
- XFS_DBG_STRING
 
- XFS_DEFAULT_COWEXTSZ_HINT
 
- XFS_DEFAULT_LOG_COUNT
 
- XFS_DEFAULT_PERM_LOG_COUNT
 
- XFS_DEFER_OPS_NR_BUFS
 
- XFS_DEFER_OPS_NR_INODES
 
- XFS_DEFER_OPS_TYPE_AGFL_FREE
 
- XFS_DEFER_OPS_TYPE_BMAP
 
- XFS_DEFER_OPS_TYPE_FREE
 
- XFS_DEFER_OPS_TYPE_MAX
 
- XFS_DEFER_OPS_TYPE_REFCOUNT
 
- XFS_DEFER_OPS_TYPE_RMAP
 
- XFS_DELALLOC_BATCH
 
- XFS_DFL_RTEXTSIZE
 
- XFS_DFORK_APTR
 
- XFS_DFORK_ASIZE
 
- XFS_DFORK_BOFF
 
- XFS_DFORK_DPTR
 
- XFS_DFORK_DSIZE
 
- XFS_DFORK_FORMAT
 
- XFS_DFORK_MAXEXT
 
- XFS_DFORK_NEXTENTS
 
- XFS_DFORK_PTR
 
- XFS_DFORK_Q
 
- XFS_DFORK_SIZE
 
- XFS_DIFLAG2_ANY
 
- XFS_DIFLAG2_COWEXTSIZE
 
- XFS_DIFLAG2_COWEXTSIZE_BIT
 
- XFS_DIFLAG2_DAX
 
- XFS_DIFLAG2_DAX_BIT
 
- XFS_DIFLAG2_REFLINK
 
- XFS_DIFLAG2_REFLINK_BIT
 
- XFS_DIFLAG_ANY
 
- XFS_DIFLAG_APPEND
 
- XFS_DIFLAG_APPEND_BIT
 
- XFS_DIFLAG_EXTSIZE
 
- XFS_DIFLAG_EXTSIZE_BIT
 
- XFS_DIFLAG_EXTSZINHERIT
 
- XFS_DIFLAG_EXTSZINHERIT_BIT
 
- XFS_DIFLAG_FILESTREAM
 
- XFS_DIFLAG_FILESTREAM_BIT
 
- XFS_DIFLAG_IMMUTABLE
 
- XFS_DIFLAG_IMMUTABLE_BIT
 
- XFS_DIFLAG_NEWRTBM
 
- XFS_DIFLAG_NEWRTBM_BIT
 
- XFS_DIFLAG_NOATIME
 
- XFS_DIFLAG_NOATIME_BIT
 
- XFS_DIFLAG_NODEFRAG
 
- XFS_DIFLAG_NODEFRAG_BIT
 
- XFS_DIFLAG_NODUMP
 
- XFS_DIFLAG_NODUMP_BIT
 
- XFS_DIFLAG_NOSYMLINKS
 
- XFS_DIFLAG_NOSYMLINKS_BIT
 
- XFS_DIFLAG_PREALLOC
 
- XFS_DIFLAG_PREALLOC_BIT
 
- XFS_DIFLAG_PROJINHERIT
 
- XFS_DIFLAG_PROJINHERIT_BIT
 
- XFS_DIFLAG_REALTIME
 
- XFS_DIFLAG_REALTIME_BIT
 
- XFS_DIFLAG_RTINHERIT
 
- XFS_DIFLAG_RTINHERIT_BIT
 
- XFS_DIFLAG_SYNC
 
- XFS_DIFLAG_SYNC_BIT
 
- XFS_DINODE_CRC_OFF
 
- XFS_DINODE_FMT_BTREE
 
- XFS_DINODE_FMT_DEV
 
- XFS_DINODE_FMT_EXTENTS
 
- XFS_DINODE_FMT_LOCAL
 
- XFS_DINODE_FMT_UUID
 
- XFS_DINODE_MAGIC
 
- XFS_DINODE_MAX_LOG
 
- XFS_DINODE_MAX_SIZE
 
- XFS_DINODE_MIN_LOG
 
- XFS_DINODE_MIN_SIZE
 
- XFS_DIOSTRAT_SPACE_RES
 
- XFS_DIR2_BLOCK_MAGIC
 
- XFS_DIR2_DATA_ALIGN
 
- XFS_DIR2_DATA_ALIGN_LOG
 
- XFS_DIR2_DATA_ENTSIZE
 
- XFS_DIR2_DATA_FD_COUNT
 
- XFS_DIR2_DATA_FREE_TAG
 
- XFS_DIR2_DATA_MAGIC
 
- XFS_DIR2_DATA_OFFSET
 
- XFS_DIR2_DATA_SPACE
 
- XFS_DIR2_FREE_MAGIC
 
- XFS_DIR2_FREE_OFFSET
 
- XFS_DIR2_FREE_SPACE
 
- XFS_DIR2_LEAF1_MAGIC
 
- XFS_DIR2_LEAFN_MAGIC
 
- XFS_DIR2_LEAF_OFFSET
 
- XFS_DIR2_LEAF_SPACE
 
- XFS_DIR2_MAX_DATAPTR
 
- XFS_DIR2_MAX_SHORT_INUM
 
- XFS_DIR2_NULL_DATAPTR
 
- XFS_DIR2_SPACE_SIZE
 
- XFS_DIR3_BLOCK_MAGIC
 
- XFS_DIR3_DATA_CRC_OFF
 
- XFS_DIR3_DATA_ENTSIZE
 
- XFS_DIR3_DATA_MAGIC
 
- XFS_DIR3_FREE_CRC_OFF
 
- XFS_DIR3_FREE_MAGIC
 
- XFS_DIR3_FT_BLKDEV
 
- XFS_DIR3_FT_CHRDEV
 
- XFS_DIR3_FT_DIR
 
- XFS_DIR3_FT_FIFO
 
- XFS_DIR3_FT_MAX
 
- XFS_DIR3_FT_REG_FILE
 
- XFS_DIR3_FT_SOCK
 
- XFS_DIR3_FT_SYMLINK
 
- XFS_DIR3_FT_UNKNOWN
 
- XFS_DIR3_FT_WHT
 
- XFS_DIR3_LEAF1_MAGIC
 
- XFS_DIR3_LEAFN_MAGIC
 
- XFS_DIR3_LEAF_CRC_OFF
 
- XFS_DIRENTER_MAX_SPLIT
 
- XFS_DIRENTER_SPACE_RES
 
- XFS_DIROP_LOG_COUNT
 
- XFS_DIROP_LOG_RES
 
- XFS_DIRREMOVE_SPACE_RES
 
- XFS_DIR_BTREE_REF
 
- XFS_DISCARD_H
 
- XFS_DQITER_MAP_SIZE
 
- XFS_DQUOT_CLUSTER_SIZE_FSB
 
- XFS_DQUOT_CRC_OFF
 
- XFS_DQUOT_LOGRES
 
- XFS_DQUOT_MAGIC
 
- XFS_DQUOT_REF
 
- XFS_DQUOT_VERSION
 
- XFS_DQ_ALLTYPES
 
- XFS_DQ_DIRTY
 
- XFS_DQ_FLAGS
 
- XFS_DQ_FREEING
 
- XFS_DQ_GROUP
 
- XFS_DQ_IS_DIRTY
 
- XFS_DQ_IS_LOCKED
 
- XFS_DQ_LOOKUP_BATCH
 
- XFS_DQ_PROJ
 
- XFS_DQ_USER
 
- XFS_EFD_MAX_FAST_EXTENTS
 
- XFS_EFI_MAX_FAST_EXTENTS
 
- XFS_EFI_RECOVERED
 
- XFS_EOFBLOCKS_VERSION
 
- XFS_EOF_FLAGS_GID
 
- XFS_EOF_FLAGS_MINFILESIZE
 
- XFS_EOF_FLAGS_PRID
 
- XFS_EOF_FLAGS_SYNC
 
- XFS_EOF_FLAGS_UID
 
- XFS_EOF_FLAGS_UNION
 
- XFS_EOF_FLAGS_VALID
 
- XFS_ERRLEVEL
 
- XFS_ERRLEVEL_HIGH
 
- XFS_ERRLEVEL_LOW
 
- XFS_ERRLEVEL_OFF
 
- XFS_ERRORTAG_ATTR_LIST
 
- XFS_ERRORTAG_ATTR_RW
 
- XFS_ERROR_REPORT
 
- XFS_ERRTAG_AG_RESV_CRITICAL
 
- XFS_ERRTAG_ALLOC_READ_AGF
 
- XFS_ERRTAG_BMAPIFORMAT
 
- XFS_ERRTAG_BMAP_FINISH_ONE
 
- XFS_ERRTAG_BTREE_CHECK_LBLOCK
 
- XFS_ERRTAG_BTREE_CHECK_SBLOCK
 
- XFS_ERRTAG_BUF_LRU_REF
 
- XFS_ERRTAG_BULKSTAT_READ_CHUNK
 
- XFS_ERRTAG_DA_READ_BUF
 
- XFS_ERRTAG_DIOWRITE_IOERR
 
- XFS_ERRTAG_DIR_INO_VALIDATE
 
- XFS_ERRTAG_DROP_WRITES
 
- XFS_ERRTAG_FORCE_SCRUB_REPAIR
 
- XFS_ERRTAG_FORCE_SUMMARY_RECALC
 
- XFS_ERRTAG_FREE_EXTENT
 
- XFS_ERRTAG_IALLOC_READ_AGI
 
- XFS_ERRTAG_IFLUSH_1
 
- XFS_ERRTAG_IFLUSH_2
 
- XFS_ERRTAG_IFLUSH_3
 
- XFS_ERRTAG_IFLUSH_4
 
- XFS_ERRTAG_IFLUSH_5
 
- XFS_ERRTAG_IFLUSH_6
 
- XFS_ERRTAG_IODONE_IOERR
 
- XFS_ERRTAG_ITOBP_INOTOBP
 
- XFS_ERRTAG_IUNLINK
 
- XFS_ERRTAG_IUNLINK_FALLBACK
 
- XFS_ERRTAG_IUNLINK_REMOVE
 
- XFS_ERRTAG_LOG_BAD_CRC
 
- XFS_ERRTAG_LOG_ITEM_PIN
 
- XFS_ERRTAG_MAX
 
- XFS_ERRTAG_NOERROR
 
- XFS_ERRTAG_REFCOUNT_CONTINUE_UPDATE
 
- XFS_ERRTAG_REFCOUNT_FINISH_ONE
 
- XFS_ERRTAG_RMAP_FINISH_ONE
 
- XFS_ERRTAG_STRATCMPL_IOERR
 
- XFS_ERRTAG_STRATREAD_IOERR
 
- XFS_ERR_CLASS_MAX
 
- XFS_ERR_DEFAULT
 
- XFS_ERR_EIO
 
- XFS_ERR_ENODEV
 
- XFS_ERR_ENOSPC
 
- XFS_ERR_ERRNO_MAX
 
- XFS_ERR_METADATA
 
- XFS_ERR_RETRY_FOREVER
 
- XFS_EXTENTADD_SPACE_RES
 
- XFS_EXTENT_BUSY_DISCARDED
 
- XFS_EXTENT_BUSY_SKIP_DISCARD
 
- XFS_EXTLEN_MAX
 
- XFS_EXTLEN_MIN
 
- XFS_EXT_NORM
 
- XFS_EXT_UNWRITTEN
 
- XFS_FALLOC_FL_SUPPORTED
 
- XFS_FDBLOCKS_BATCH
 
- XFS_FIBT_BLOCK
 
- XFS_FIBT_CRC_MAGIC
 
- XFS_FIBT_MAGIC
 
- XFS_FILBLKS_MAX
 
- XFS_FILBLKS_MIN
 
- XFS_FILEID_TYPE_64FLAG
 
- XFS_FILEOFF_MAX
 
- XFS_FILEOFF_MIN
 
- XFS_FILESTREAM_TIMER
 
- XFS_FIND_RCEXT_COW
 
- XFS_FIND_RCEXT_SHARED
 
- XFS_FMR_OWN_AG
 
- XFS_FMR_OWN_COW
 
- XFS_FMR_OWN_DEFECTIVE
 
- XFS_FMR_OWN_FREE
 
- XFS_FMR_OWN_FS
 
- XFS_FMR_OWN_INOBT
 
- XFS_FMR_OWN_INODES
 
- XFS_FMR_OWN_LOG
 
- XFS_FMR_OWN_REFC
 
- XFS_FMR_OWN_UNKNOWN
 
- XFS_FORCED_SHUTDOWN
 
- XFS_FSB_TO_AGBNO
 
- XFS_FSB_TO_AGNO
 
- XFS_FSB_TO_B
 
- XFS_FSB_TO_BB
 
- XFS_FSB_TO_DADDR
 
- XFS_FSB_TO_INO
 
- XFS_FSOP_GEOM_FLAGS_ATTR
 
- XFS_FSOP_GEOM_FLAGS_ATTR2
 
- XFS_FSOP_GEOM_FLAGS_DALIGN
 
- XFS_FSOP_GEOM_FLAGS_DIRV2
 
- XFS_FSOP_GEOM_FLAGS_DIRV2CI
 
- XFS_FSOP_GEOM_FLAGS_EXTFLG
 
- XFS_FSOP_GEOM_FLAGS_FINOBT
 
- XFS_FSOP_GEOM_FLAGS_FTYPE
 
- XFS_FSOP_GEOM_FLAGS_IALIGN
 
- XFS_FSOP_GEOM_FLAGS_LAZYSB
 
- XFS_FSOP_GEOM_FLAGS_LOGV2
 
- XFS_FSOP_GEOM_FLAGS_NLINK
 
- XFS_FSOP_GEOM_FLAGS_PROJID32
 
- XFS_FSOP_GEOM_FLAGS_QUOTA
 
- XFS_FSOP_GEOM_FLAGS_REFLINK
 
- XFS_FSOP_GEOM_FLAGS_RMAPBT
 
- XFS_FSOP_GEOM_FLAGS_SECTOR
 
- XFS_FSOP_GEOM_FLAGS_SHARED
 
- XFS_FSOP_GEOM_FLAGS_SPINODES
 
- XFS_FSOP_GEOM_FLAGS_V5SB
 
- XFS_FSOP_GEOM_SICK_COUNTERS
 
- XFS_FSOP_GEOM_SICK_GQUOTA
 
- XFS_FSOP_GEOM_SICK_PQUOTA
 
- XFS_FSOP_GEOM_SICK_RT_BITMAP
 
- XFS_FSOP_GEOM_SICK_RT_SUMMARY
 
- XFS_FSOP_GEOM_SICK_UQUOTA
 
- XFS_FSOP_GEOM_VERSION
 
- XFS_FSOP_GEOM_VERSION_V5
 
- XFS_FSOP_GOING_FLAGS_DEFAULT
 
- XFS_FSOP_GOING_FLAGS_LOGFLUSH
 
- XFS_FSOP_GOING_FLAGS_NOLOGFLUSH
 
- XFS_FSS_TO_BB
 
- XFS_FS_GEOM_MAX_STRUCT_VER
 
- XFS_GETFSMAP_DEVS
 
- XFS_GQUOTA_ACCT
 
- XFS_GQUOTA_ACTIVE
 
- XFS_GQUOTA_CHKD
 
- XFS_GQUOTA_ENFD
 
- XFS_GROWFSRT_SPACE_RES
 
- XFS_GROWFS_SPACE_RES
 
- XFS_HDR_BLOCK
 
- XFS_I
 
- XFS_IALLOC_SPACE_RES
 
- XFS_IBT_BLOCK
 
- XFS_IBT_CRC_MAGIC
 
- XFS_IBT_MAGIC
 
- XFS_IBULK_SAME_AG
 
- XFS_ICHGTIME_CHG
 
- XFS_ICHGTIME_CREATE
 
- XFS_ICHGTIME_MOD
 
- XFS_ICI_COWBLOCKS_TAG
 
- XFS_ICI_EOFBLOCKS_TAG
 
- XFS_ICI_NO_TAG
 
- XFS_ICI_RECLAIM_TAG
 
- XFS_ICOUNT_BATCH
 
- XFS_ICOWBLOCKS
 
- XFS_ICREATE_ITEM_H
 
- XFS_IDIRTY_RELEASE
 
- XFS_IDONTCACHE
 
- XFS_IEOFBLOCKS
 
- XFS_IEXT_KEY_INVALID
 
- XFS_IEXT_LENGTH_MASK
 
- XFS_IEXT_STARTBLOCK_MASK
 
- XFS_IEXT_STARTOFF_MASK
 
- XFS_IFBROOT
 
- XFS_IFEXTENTS
 
- XFS_IFINLINE
 
- XFS_IFLOCK
 
- XFS_IFORK_ASIZE
 
- XFS_IFORK_BOFF
 
- XFS_IFORK_DSIZE
 
- XFS_IFORK_FMT_SET
 
- XFS_IFORK_FORMAT
 
- XFS_IFORK_MAXEXT
 
- XFS_IFORK_NEXTENTS
 
- XFS_IFORK_NEXT_SET
 
- XFS_IFORK_PTR
 
- XFS_IFORK_Q
 
- XFS_IFORK_SIZE
 
- XFS_IFREE_SPACE_RES
 
- XFS_IGET_CREATE
 
- XFS_IGET_DONTCACHE
 
- XFS_IGET_INCORE
 
- XFS_IGET_UNTRUSTED
 
- XFS_ILOCK_DEP
 
- XFS_ILOCK_DEP_MASK
 
- XFS_ILOCK_EXCL
 
- XFS_ILOCK_MAX_SUBCLASS
 
- XFS_ILOCK_PARENT
 
- XFS_ILOCK_PARENT_VAL
 
- XFS_ILOCK_RTBITMAP
 
- XFS_ILOCK_RTBITMAP_VAL
 
- XFS_ILOCK_RTSUM
 
- XFS_ILOCK_RTSUM_VAL
 
- XFS_ILOCK_SHARED
 
- XFS_ILOCK_SHIFT
 
- XFS_ILOG_ABROOT
 
- XFS_ILOG_ADATA
 
- XFS_ILOG_AEXT
 
- XFS_ILOG_AFORK
 
- XFS_ILOG_ALL
 
- XFS_ILOG_AOWNER
 
- XFS_ILOG_CORE
 
- XFS_ILOG_DBROOT
 
- XFS_ILOG_DDATA
 
- XFS_ILOG_DEV
 
- XFS_ILOG_DEXT
 
- XFS_ILOG_DFORK
 
- XFS_ILOG_DOWNER
 
- XFS_ILOG_NONCORE
 
- XFS_ILOG_TIMESTAMP
 
- XFS_ILOG_UUID
 
- XFS_INACTIVE_LOG_COUNT
 
- XFS_INEW
 
- XFS_INHERIT_GID
 
- XFS_INHERIT_NOATIME
 
- XFS_INHERIT_NODFRG
 
- XFS_INHERIT_NODUMP
 
- XFS_INHERIT_NOSYM
 
- XFS_INHERIT_SYNC
 
- XFS_INO32_SIZE
 
- XFS_INO64_DIFF
 
- XFS_INO64_SIZE
 
- XFS_INOBT_ALL_FREE
 
- XFS_INOBT_BLOCK_LEN
 
- XFS_INOBT_HOLEMASK_BITS
 
- XFS_INOBT_HOLEMASK_FULL
 
- XFS_INOBT_KEY_ADDR
 
- XFS_INOBT_MASK
 
- XFS_INOBT_PTR_ADDR
 
- XFS_INOBT_REC_ADDR
 
- XFS_INOBT_WALK_FLAGS_ALL
 
- XFS_INOBT_WALK_SAME_AG
 
- XFS_INODES_PER_CHUNK
 
- XFS_INODES_PER_CHUNK_LOG
 
- XFS_INODES_PER_HOLEMASK_BIT
 
- XFS_INODE_BIG_CLUSTER_SIZE
 
- XFS_INODE_FORMAT_STR
 
- XFS_INO_AGBNO_BITS
 
- XFS_INO_AGINO_BITS
 
- XFS_INO_AGNO_BITS
 
- XFS_INO_BITS
 
- XFS_INO_BTREE_REF
 
- XFS_INO_MASK
 
- XFS_INO_OFFSET_BITS
 
- XFS_INO_REF
 
- XFS_INO_TO_AGBNO
 
- XFS_INO_TO_AGINO
 
- XFS_INO_TO_AGNO
 
- XFS_INO_TO_FSB
 
- XFS_INO_TO_OFFSET
 
- XFS_INUMBERS_REQ_SIZE
 
- XFS_INUMBERS_VERSION_V1
 
- XFS_INUMBERS_VERSION_V5
 
- XFS_IOC_AG_GEOMETRY
 
- XFS_IOC_ALLOCSP
 
- XFS_IOC_ALLOCSP64
 
- XFS_IOC_ALLOCSP64_32
 
- XFS_IOC_ALLOCSP_32
 
- XFS_IOC_ATTRLIST_BY_HANDLE
 
- XFS_IOC_ATTRLIST_BY_HANDLE_32
 
- XFS_IOC_ATTRMULTI_BY_HANDLE
 
- XFS_IOC_ATTRMULTI_BY_HANDLE_32
 
- XFS_IOC_BULKSTAT
 
- XFS_IOC_DIOINFO
 
- XFS_IOC_ERROR_CLEARALL
 
- XFS_IOC_ERROR_INJECTION
 
- XFS_IOC_FD_TO_HANDLE
 
- XFS_IOC_FD_TO_HANDLE_32
 
- XFS_IOC_FREESP
 
- XFS_IOC_FREESP64
 
- XFS_IOC_FREESP64_32
 
- XFS_IOC_FREESP_32
 
- XFS_IOC_FREEZE
 
- XFS_IOC_FREE_EOFBLOCKS
 
- XFS_IOC_FSBULKSTAT
 
- XFS_IOC_FSBULKSTAT_32
 
- XFS_IOC_FSBULKSTAT_SINGLE
 
- XFS_IOC_FSBULKSTAT_SINGLE_32
 
- XFS_IOC_FSCOUNTS
 
- XFS_IOC_FSGEOMETRY
 
- XFS_IOC_FSGEOMETRY_V1
 
- XFS_IOC_FSGEOMETRY_V1_32
 
- XFS_IOC_FSGEOMETRY_V4
 
- XFS_IOC_FSGETXATTR
 
- XFS_IOC_FSGETXATTRA
 
- XFS_IOC_FSGROWFSDATA
 
- XFS_IOC_FSGROWFSDATA_32
 
- XFS_IOC_FSGROWFSLOG
 
- XFS_IOC_FSGROWFSRT
 
- XFS_IOC_FSGROWFSRT_32
 
- XFS_IOC_FSINUMBERS
 
- XFS_IOC_FSINUMBERS_32
 
- XFS_IOC_FSSETDM
 
- XFS_IOC_FSSETDM_BY_HANDLE
 
- XFS_IOC_FSSETDM_BY_HANDLE_32
 
- XFS_IOC_FSSETXATTR
 
- XFS_IOC_GETBMAP
 
- XFS_IOC_GETBMAPA
 
- XFS_IOC_GETBMAPX
 
- XFS_IOC_GETVERSION
 
- XFS_IOC_GETVERSION_32
 
- XFS_IOC_GETXFLAGS
 
- XFS_IOC_GETXFLAGS_32
 
- XFS_IOC_GET_RESBLKS
 
- XFS_IOC_GOINGDOWN
 
- XFS_IOC_INUMBERS
 
- XFS_IOC_OPEN_BY_HANDLE
 
- XFS_IOC_OPEN_BY_HANDLE_32
 
- XFS_IOC_PATH_TO_FSHANDLE
 
- XFS_IOC_PATH_TO_FSHANDLE_32
 
- XFS_IOC_PATH_TO_HANDLE
 
- XFS_IOC_PATH_TO_HANDLE_32
 
- XFS_IOC_READLINK_BY_HANDLE
 
- XFS_IOC_READLINK_BY_HANDLE_32
 
- XFS_IOC_RESVSP
 
- XFS_IOC_RESVSP64
 
- XFS_IOC_RESVSP64_32
 
- XFS_IOC_RESVSP_32
 
- XFS_IOC_SCRUB_METADATA
 
- XFS_IOC_SETXFLAGS
 
- XFS_IOC_SETXFLAGS_32
 
- XFS_IOC_SET_RESBLKS
 
- XFS_IOC_SWAPEXT
 
- XFS_IOC_SWAPEXT_32
 
- XFS_IOC_THAW
 
- XFS_IOC_UNRESVSP
 
- XFS_IOC_UNRESVSP64
 
- XFS_IOC_UNRESVSP64_32
 
- XFS_IOC_UNRESVSP_32
 
- XFS_IOC_ZERO_RANGE
 
- XFS_IOC_ZERO_RANGE_32
 
- XFS_IOLOCK_DEP
 
- XFS_IOLOCK_DEP_MASK
 
- XFS_IOLOCK_EXCL
 
- XFS_IOLOCK_MAX_SUBCLASS
 
- XFS_IOLOCK_SHARED
 
- XFS_IOLOCK_SHIFT
 
- XFS_IPINNED
 
- XFS_IRECLAIM
 
- XFS_IRECLAIMABLE
 
- XFS_IRECLAIM_RESET_FLAGS
 
- XFS_IRECOVERY
 
- XFS_ISIZE
 
- XFS_ISRESET_CURSOR
 
- XFS_ISTALE
 
- XFS_IS_DQUOT_UNINITIALIZED
 
- XFS_IS_GQUOTA_ENFORCED
 
- XFS_IS_GQUOTA_ON
 
- XFS_IS_GQUOTA_RUNNING
 
- XFS_IS_PQUOTA_ENFORCED
 
- XFS_IS_PQUOTA_ON
 
- XFS_IS_PQUOTA_RUNNING
 
- XFS_IS_QUOTA_ON
 
- XFS_IS_QUOTA_RUNNING
 
- XFS_IS_REALTIME_INODE
 
- XFS_IS_REALTIME_MOUNT
 
- XFS_IS_UQUOTA_ENFORCED
 
- XFS_IS_UQUOTA_ON
 
- XFS_IS_UQUOTA_RUNNING
 
- XFS_ITEM_FLUSHING
 
- XFS_ITEM_LOCKED
 
- XFS_ITEM_PINNED
 
- XFS_ITEM_RELEASE_WHEN_COMMITTED
 
- XFS_ITEM_SUCCESS
 
- XFS_ITRUNCATED
 
- XFS_ITRUNCATE_LOG_COUNT
 
- XFS_ITRUNCATE_LOG_COUNT_REFLINK
 
- XFS_ITRUNC_MAX_EXTENTS
 
- XFS_IWALK_FLAGS_ALL
 
- XFS_IWALK_SAME_AG
 
- XFS_LAST_UNMOUNT_WAS_CLEAN
 
- XFS_LINK_LOG_COUNT
 
- XFS_LINK_SPACE_RES
 
- XFS_LITINO
 
- XFS_LI_ABORTED
 
- XFS_LI_BUD
 
- XFS_LI_BUF
 
- XFS_LI_BUI
 
- XFS_LI_CUD
 
- XFS_LI_CUI
 
- XFS_LI_DIRTY
 
- XFS_LI_DQUOT
 
- XFS_LI_EFD
 
- XFS_LI_EFI
 
- XFS_LI_FAILED
 
- XFS_LI_FLAGS
 
- XFS_LI_ICREATE
 
- XFS_LI_INODE
 
- XFS_LI_IN_AIL
 
- XFS_LI_IUNLINK
 
- XFS_LI_QUOTAOFF
 
- XFS_LI_RUD
 
- XFS_LI_RUI
 
- XFS_LI_TYPE_DESC
 
- XFS_LOCK_FLAGS
 
- XFS_LOCK_MASK
 
- XFS_LOCK_SUBCLASS_MASK
 
- XFS_LOG
 
- XFS_LOG_SYNC
 
- XFS_LOG_VEC_ORDERED
 
- XFS_LOOKUP_BATCH
 
- XFS_LOOKUP_EQ
 
- XFS_LOOKUP_EQi
 
- XFS_LOOKUP_GE
 
- XFS_LOOKUP_GEi
 
- XFS_LOOKUP_LE
 
- XFS_LOOKUP_LEi
 
- XFS_LOWSP_1_PCNT
 
- XFS_LOWSP_2_PCNT
 
- XFS_LOWSP_3_PCNT
 
- XFS_LOWSP_4_PCNT
 
- XFS_LOWSP_5_PCNT
 
- XFS_LOWSP_MAX
 
- XFS_LSN_CMP
 
- XFS_M
 
- XFS_MAXINUMBER
 
- XFS_MAXINUMBER_32
 
- XFS_MAXLINK
 
- XFS_MAX_AG_BYTES
 
- XFS_MAX_BLOCKSIZE
 
- XFS_MAX_BLOCKSIZE_LOG
 
- XFS_MAX_CONTIG_EXTENTS_PER_BLOCK
 
- XFS_MAX_CONTIG_RMAPS_PER_BLOCK
 
- XFS_MAX_DBLOCKS
 
- XFS_MAX_IO_LOG
 
- XFS_MAX_LOG_BLOCKS
 
- XFS_MAX_LOG_BYTES
 
- XFS_MAX_RTEXTSIZE
 
- XFS_MAX_SECTORSIZE
 
- XFS_MAX_SECTORSIZE_LOG
 
- XFS_MFSI_QUIET
 
- XFS_MIN_AG_BLOCKS
 
- XFS_MIN_AG_BYTES
 
- XFS_MIN_BLOCKSIZE
 
- XFS_MIN_BLOCKSIZE_LOG
 
- XFS_MIN_CRC_BLOCKSIZE
 
- XFS_MIN_DBLOCKS
 
- XFS_MIN_IO_LOG
 
- XFS_MIN_LOG_BLOCKS
 
- XFS_MIN_LOG_BYTES
 
- XFS_MIN_LOG_FACTOR
 
- XFS_MIN_RTEXTSIZE
 
- XFS_MIN_SECTORSIZE
 
- XFS_MIN_SECTORSIZE_LOG
 
- XFS_MKDIR_LOG_COUNT
 
- XFS_MKDIR_SPACE_RES
 
- XFS_MMAPLOCK_DEP
 
- XFS_MMAPLOCK_DEP_MASK
 
- XFS_MMAPLOCK_EXCL
 
- XFS_MMAPLOCK_MAX_SUBCLASS
 
- XFS_MMAPLOCK_NUMORDER
 
- XFS_MMAPLOCK_SHARED
 
- XFS_MMAPLOCK_SHIFT
 
- XFS_MOUNT_32BITINODES
 
- XFS_MOUNT_ATTR2
 
- XFS_MOUNT_COMPAT_IOSIZE
 
- XFS_MOUNT_DAX
 
- XFS_MOUNT_DFLT_IOSIZE
 
- XFS_MOUNT_DIRSYNC
 
- XFS_MOUNT_DISCARD
 
- XFS_MOUNT_FILESTREAMS
 
- XFS_MOUNT_FS_SHUTDOWN
 
- XFS_MOUNT_GRPID
 
- XFS_MOUNT_IKEEP
 
- XFS_MOUNT_NOALIGN
 
- XFS_MOUNT_NOATTR2
 
- XFS_MOUNT_NORECOVERY
 
- XFS_MOUNT_NOUUID
 
- XFS_MOUNT_QUOTA_ALL
 
- XFS_MOUNT_RDONLY
 
- XFS_MOUNT_SMALL_INUMS
 
- XFS_MOUNT_SWALLOC
 
- XFS_MOUNT_UNMOUNTING
 
- XFS_MOUNT_WAS_CLEAN
 
- XFS_MOUNT_WSYNC
 
- XFS_NATIVE_HOST
 
- XFS_NBBYLOG
 
- XFS_NBWORD
 
- XFS_NBWORDLOG
 
- XFS_NEXTENTADD_SPACE_RES
 
- XFS_NOT_DQATTACHED
 
- XFS_NO_PTAG
 
- XFS_NRMAPADD_SPACE_RES
 
- XFS_OFFBNO_TO_AGINO
 
- XFS_OQUOTA_CHKD
 
- XFS_OQUOTA_ENFD
 
- XFS_OWNER_INFO_ATTR_FORK
 
- XFS_OWNER_INFO_BMBT_BLOCK
 
- XFS_PANIC_MASK
 
- XFS_PICK_LOWSPACE
 
- XFS_PICK_USERDATA
 
- XFS_PQUOTA_ACCT
 
- XFS_PQUOTA_ACTIVE
 
- XFS_PQUOTA_CHKD
 
- XFS_PQUOTA_ENFD
 
- XFS_PREALLOC_CLEAR
 
- XFS_PREALLOC_INVISIBLE
 
- XFS_PREALLOC_SET
 
- XFS_PREALLOC_SYNC
 
- XFS_PROJID_DEFAULT
 
- XFS_PTAG_AILDELETE
 
- XFS_PTAG_ERROR_REPORT
 
- XFS_PTAG_FSBLOCK_ZERO
 
- XFS_PTAG_IFLUSH
 
- XFS_PTAG_LOGRES
 
- XFS_PTAG_SHUTDOWN_CORRUPT
 
- XFS_PTAG_SHUTDOWN_IOERROR
 
- XFS_PTAG_SHUTDOWN_LOGERROR
 
- XFS_PTAG_VERIFIER_ERROR
 
- XFS_PWORK_SINGLE_THREADED
 
- XFS_QC_MASK
 
- XFS_QC_SETINFO_MASK
 
- XFS_QLOCK_NESTED
 
- XFS_QLOCK_NORMAL
 
- XFS_QLOWSP_1_PCNT
 
- XFS_QLOWSP_3_PCNT
 
- XFS_QLOWSP_5_PCNT
 
- XFS_QLOWSP_MAX
 
- XFS_QMOPT_BCOUNT
 
- XFS_QMOPT_DELBCOUNT
 
- XFS_QMOPT_DELRTBCOUNT
 
- XFS_QMOPT_ENOSPC
 
- XFS_QMOPT_FORCE_RES
 
- XFS_QMOPT_GQUOTA
 
- XFS_QMOPT_ICOUNT
 
- XFS_QMOPT_INHERIT
 
- XFS_QMOPT_PQUOTA
 
- XFS_QMOPT_QUOTALL
 
- XFS_QMOPT_RESBLK_MASK
 
- XFS_QMOPT_RES_INOS
 
- XFS_QMOPT_RES_REGBLKS
 
- XFS_QMOPT_RES_RTBLKS
 
- XFS_QMOPT_RTBCOUNT
 
- XFS_QMOPT_SBVERSION
 
- XFS_QMOPT_UQUOTA
 
- XFS_QM_BTIMELIMIT
 
- XFS_QM_BWARNLIMIT
 
- XFS_QM_DQALLOC_SPACE_RES
 
- XFS_QM_ISGDQ
 
- XFS_QM_ISPDQ
 
- XFS_QM_ISUDQ
 
- XFS_QM_ITIMELIMIT
 
- XFS_QM_IWARNLIMIT
 
- XFS_QM_NEED_QUOTACHECK
 
- XFS_QM_QINOCREATE_SPACE_RES
 
- XFS_QM_RTBTIMELIMIT
 
- XFS_QM_RTBWARNLIMIT
 
- XFS_QM_TRANS_DQTYPES
 
- XFS_QM_TRANS_GRP
 
- XFS_QM_TRANS_MAXDQS
 
- XFS_QM_TRANS_PRJ
 
- XFS_QM_TRANS_USR
 
- XFS_RANDOM_AG_RESV_CRITICAL
 
- XFS_RANDOM_ALLOC_READ_AGF
 
- XFS_RANDOM_BMAPIFORMAT
 
- XFS_RANDOM_BMAP_FINISH_ONE
 
- XFS_RANDOM_BTREE_CHECK_LBLOCK
 
- XFS_RANDOM_BTREE_CHECK_SBLOCK
 
- XFS_RANDOM_BUF_LRU_REF
 
- XFS_RANDOM_BULKSTAT_READ_CHUNK
 
- XFS_RANDOM_DA_READ_BUF
 
- XFS_RANDOM_DEFAULT
 
- XFS_RANDOM_DIOWRITE_IOERR
 
- XFS_RANDOM_DIR_INO_VALIDATE
 
- XFS_RANDOM_DROP_WRITES
 
- XFS_RANDOM_FORCE_SCRUB_REPAIR
 
- XFS_RANDOM_FORCE_SUMMARY_RECALC
 
- XFS_RANDOM_FREE_EXTENT
 
- XFS_RANDOM_IALLOC_READ_AGI
 
- XFS_RANDOM_IFLUSH_1
 
- XFS_RANDOM_IFLUSH_2
 
- XFS_RANDOM_IFLUSH_3
 
- XFS_RANDOM_IFLUSH_4
 
- XFS_RANDOM_IFLUSH_5
 
- XFS_RANDOM_IFLUSH_6
 
- XFS_RANDOM_IODONE_IOERR
 
- XFS_RANDOM_ITOBP_INOTOBP
 
- XFS_RANDOM_IUNLINK
 
- XFS_RANDOM_IUNLINK_FALLBACK
 
- XFS_RANDOM_IUNLINK_REMOVE
 
- XFS_RANDOM_LOG_BAD_CRC
 
- XFS_RANDOM_LOG_ITEM_PIN
 
- XFS_RANDOM_REFCOUNT_CONTINUE_UPDATE
 
- XFS_RANDOM_REFCOUNT_FINISH_ONE
 
- XFS_RANDOM_RMAP_FINISH_ONE
 
- XFS_RANDOM_STRATCMPL_IOERR
 
- XFS_RANDOM_STRATREAD_IOERR
 
- XFS_READDIR_BUFSIZE
 
- XFS_READIO_LOG_LARGE
 
- XFS_REALTIME_STRING
 
- XFS_REFCOUNT_ADJUST_COW_ALLOC
 
- XFS_REFCOUNT_ADJUST_COW_FREE
 
- XFS_REFCOUNT_ADJUST_DECREASE
 
- XFS_REFCOUNT_ADJUST_INCREASE
 
- XFS_REFCOUNT_ALLOC_COW
 
- XFS_REFCOUNT_BLOCK_LEN
 
- XFS_REFCOUNT_DECREASE
 
- XFS_REFCOUNT_EXTENT_FLAGS
 
- XFS_REFCOUNT_EXTENT_TYPE_MASK
 
- XFS_REFCOUNT_FREE_COW
 
- XFS_REFCOUNT_INCREASE
 
- XFS_REFCOUNT_ITEM_OVERHEAD
 
- XFS_REFCOUNT_KEY_ADDR
 
- XFS_REFCOUNT_PTR_ADDR
 
- XFS_REFCOUNT_REC_ADDR
 
- XFS_REFC_BTREE_REF
 
- XFS_REFC_COW_START
 
- XFS_REFC_CRC_MAGIC
 
- XFS_REMOVE_LOG_COUNT
 
- XFS_REMOVE_SPACE_RES
 
- XFS_RENAME_LOG_COUNT
 
- XFS_RENAME_SPACE_RES
 
- XFS_REPAIR_STRING
 
- XFS_RMAPADD_SPACE_RES
 
- XFS_RMAP_ALLOC
 
- XFS_RMAP_ATTR_FORK
 
- XFS_RMAP_BLOCK
 
- XFS_RMAP_BLOCK_LEN
 
- XFS_RMAP_BMBT_BLOCK
 
- XFS_RMAP_BTREE_REF
 
- XFS_RMAP_CONVERT
 
- XFS_RMAP_CONVERT_SHARED
 
- XFS_RMAP_CRC_MAGIC
 
- XFS_RMAP_EXTENT_ALLOC
 
- XFS_RMAP_EXTENT_ATTR_FORK
 
- XFS_RMAP_EXTENT_BMBT_BLOCK
 
- XFS_RMAP_EXTENT_CONVERT
 
- XFS_RMAP_EXTENT_CONVERT_SHARED
 
- XFS_RMAP_EXTENT_FLAGS
 
- XFS_RMAP_EXTENT_FREE
 
- XFS_RMAP_EXTENT_MAP
 
- XFS_RMAP_EXTENT_MAP_SHARED
 
- XFS_RMAP_EXTENT_TYPE_MASK
 
- XFS_RMAP_EXTENT_UNMAP
 
- XFS_RMAP_EXTENT_UNMAP_SHARED
 
- XFS_RMAP_EXTENT_UNWRITTEN
 
- XFS_RMAP_FREE
 
- XFS_RMAP_HIGH_KEY_ADDR
 
- XFS_RMAP_IS_ATTR_FORK
 
- XFS_RMAP_IS_BMBT_BLOCK
 
- XFS_RMAP_IS_UNWRITTEN
 
- XFS_RMAP_KEY_ADDR
 
- XFS_RMAP_KEY_FLAGS
 
- XFS_RMAP_LEN_MAX
 
- XFS_RMAP_MAP
 
- XFS_RMAP_MAP_SHARED
 
- XFS_RMAP_NON_INODE_OWNER
 
- XFS_RMAP_OFF
 
- XFS_RMAP_OFF_ATTR_FORK
 
- XFS_RMAP_OFF_BMBT_BLOCK
 
- XFS_RMAP_OFF_FLAGS
 
- XFS_RMAP_OFF_MASK
 
- XFS_RMAP_OFF_UNWRITTEN
 
- XFS_RMAP_OWN_AG
 
- XFS_RMAP_OWN_COW
 
- XFS_RMAP_OWN_FS
 
- XFS_RMAP_OWN_INOBT
 
- XFS_RMAP_OWN_INODES
 
- XFS_RMAP_OWN_LOG
 
- XFS_RMAP_OWN_MIN
 
- XFS_RMAP_OWN_NULL
 
- XFS_RMAP_OWN_REFC
 
- XFS_RMAP_OWN_UNKNOWN
 
- XFS_RMAP_PTR_ADDR
 
- XFS_RMAP_REC_ADDR
 
- XFS_RMAP_REC_FLAGS
 
- XFS_RMAP_UNMAP
 
- XFS_RMAP_UNMAP_SHARED
 
- XFS_RMAP_UNWRITTEN
 
- XFS_ROTORSTEP
 
- XFS_RTBLOCKLOG
 
- XFS_RTHIBIT
 
- XFS_RTLOBIT
 
- XFS_RTMAX
 
- XFS_RTMIN
 
- XFS_RUI_MAX_FAST_EXTENTS
 
- XFS_RUI_RECOVERED
 
- XFS_SBF_NOFLAGS
 
- XFS_SBF_READONLY
 
- XFS_SB_BLOCK
 
- XFS_SB_CRC_OFF
 
- XFS_SB_DADDR
 
- XFS_SB_FEAT_COMPAT_ALL
 
- XFS_SB_FEAT_COMPAT_UNKNOWN
 
- XFS_SB_FEAT_INCOMPAT_ALL
 
- XFS_SB_FEAT_INCOMPAT_FTYPE
 
- XFS_SB_FEAT_INCOMPAT_LOG_ALL
 
- XFS_SB_FEAT_INCOMPAT_LOG_UNKNOWN
 
- XFS_SB_FEAT_INCOMPAT_META_UUID
 
- XFS_SB_FEAT_INCOMPAT_SPINODES
 
- XFS_SB_FEAT_INCOMPAT_UNKNOWN
 
- XFS_SB_FEAT_RO_COMPAT_ALL
 
- XFS_SB_FEAT_RO_COMPAT_FINOBT
 
- XFS_SB_FEAT_RO_COMPAT_REFLINK
 
- XFS_SB_FEAT_RO_COMPAT_RMAPBT
 
- XFS_SB_FEAT_RO_COMPAT_UNKNOWN
 
- XFS_SB_MAGIC
 
- XFS_SB_MAX_SHARED_VN
 
- XFS_SB_VERSION2_ATTR2BIT
 
- XFS_SB_VERSION2_CRCBIT
 
- XFS_SB_VERSION2_FTYPE
 
- XFS_SB_VERSION2_LAZYSBCOUNTBIT
 
- XFS_SB_VERSION2_OKBITS
 
- XFS_SB_VERSION2_PARENTBIT
 
- XFS_SB_VERSION2_PROJID32BIT
 
- XFS_SB_VERSION2_RESERVED1BIT
 
- XFS_SB_VERSION2_RESERVED4BIT
 
- XFS_SB_VERSION_1
 
- XFS_SB_VERSION_2
 
- XFS_SB_VERSION_3
 
- XFS_SB_VERSION_4
 
- XFS_SB_VERSION_5
 
- XFS_SB_VERSION_ALIGNBIT
 
- XFS_SB_VERSION_ALLFBITS
 
- XFS_SB_VERSION_ATTRBIT
 
- XFS_SB_VERSION_BORGBIT
 
- XFS_SB_VERSION_DALIGNBIT
 
- XFS_SB_VERSION_DIRV2BIT
 
- XFS_SB_VERSION_EXTFLGBIT
 
- XFS_SB_VERSION_LOGV2BIT
 
- XFS_SB_VERSION_MOREBITSBIT
 
- XFS_SB_VERSION_NLINKBIT
 
- XFS_SB_VERSION_NUM
 
- XFS_SB_VERSION_NUMBITS
 
- XFS_SB_VERSION_OKBITS
 
- XFS_SB_VERSION_QUOTABIT
 
- XFS_SB_VERSION_SECTORBIT
 
- XFS_SB_VERSION_SHAREDBIT
 
- XFS_SCRUB_FLAGS_ALL
 
- XFS_SCRUB_FLAGS_IN
 
- XFS_SCRUB_FLAGS_OUT
 
- XFS_SCRUB_IFLAG_REPAIR
 
- XFS_SCRUB_OFLAG_CORRUPT
 
- XFS_SCRUB_OFLAG_INCOMPLETE
 
- XFS_SCRUB_OFLAG_NO_REPAIR_NEEDED
 
- XFS_SCRUB_OFLAG_PREEN
 
- XFS_SCRUB_OFLAG_WARNING
 
- XFS_SCRUB_OFLAG_XCORRUPT
 
- XFS_SCRUB_OFLAG_XFAIL
 
- XFS_SCRUB_STRING
 
- XFS_SCRUB_TYPE_AGF
 
- XFS_SCRUB_TYPE_AGFL
 
- XFS_SCRUB_TYPE_AGI
 
- XFS_SCRUB_TYPE_BMBTA
 
- XFS_SCRUB_TYPE_BMBTC
 
- XFS_SCRUB_TYPE_BMBTD
 
- XFS_SCRUB_TYPE_BNOBT
 
- XFS_SCRUB_TYPE_CNTBT
 
- XFS_SCRUB_TYPE_DIR
 
- XFS_SCRUB_TYPE_FINOBT
 
- XFS_SCRUB_TYPE_FSCOUNTERS
 
- XFS_SCRUB_TYPE_GQUOTA
 
- XFS_SCRUB_TYPE_INOBT
 
- XFS_SCRUB_TYPE_INODE
 
- XFS_SCRUB_TYPE_NR
 
- XFS_SCRUB_TYPE_PARENT
 
- XFS_SCRUB_TYPE_PQUOTA
 
- XFS_SCRUB_TYPE_PROBE
 
- XFS_SCRUB_TYPE_REFCNTBT
 
- XFS_SCRUB_TYPE_RMAPBT
 
- XFS_SCRUB_TYPE_RTBITMAP
 
- XFS_SCRUB_TYPE_RTSUM
 
- XFS_SCRUB_TYPE_SB
 
- XFS_SCRUB_TYPE_STRINGS
 
- XFS_SCRUB_TYPE_SYMLINK
 
- XFS_SCRUB_TYPE_UQUOTA
 
- XFS_SCRUB_TYPE_XATTR
 
- XFS_SECURITY_STRING
 
- XFS_SGID_INHERIT
 
- XFS_SICK_AG_AGF
 
- XFS_SICK_AG_AGFL
 
- XFS_SICK_AG_AGI
 
- XFS_SICK_AG_BNOBT
 
- XFS_SICK_AG_CNTBT
 
- XFS_SICK_AG_FINOBT
 
- XFS_SICK_AG_INOBT
 
- XFS_SICK_AG_PRIMARY
 
- XFS_SICK_AG_REFCNTBT
 
- XFS_SICK_AG_RMAPBT
 
- XFS_SICK_AG_SB
 
- XFS_SICK_FS_COUNTERS
 
- XFS_SICK_FS_GQUOTA
 
- XFS_SICK_FS_PQUOTA
 
- XFS_SICK_FS_PRIMARY
 
- XFS_SICK_FS_UQUOTA
 
- XFS_SICK_INO_BMBTA
 
- XFS_SICK_INO_BMBTC
 
- XFS_SICK_INO_BMBTD
 
- XFS_SICK_INO_CORE
 
- XFS_SICK_INO_DIR
 
- XFS_SICK_INO_PARENT
 
- XFS_SICK_INO_PRIMARY
 
- XFS_SICK_INO_SYMLINK
 
- XFS_SICK_INO_XATTR
 
- XFS_SICK_RT_BITMAP
 
- XFS_SICK_RT_PRIMARY
 
- XFS_SICK_RT_SUMMARY
 
- XFS_SSB_REF
 
- XFS_STATS_ADD
 
- XFS_STATS_ADD_OFF
 
- XFS_STATS_CALC_INDEX
 
- XFS_STATS_CLEAR
 
- XFS_STATS_DEC
 
- XFS_STATS_DEC_OFF
 
- XFS_STATS_INC
 
- XFS_STATS_INC_OFF
 
- XFS_SUMOFFS
 
- XFS_SUMOFFSTOBLOCK
 
- XFS_SUMPTR
 
- XFS_SUPER_MAGIC
 
- XFS_SWAPEXT_INODES
 
- XFS_SWAP_RMAP_SPACE_RES
 
- XFS_SYMLINK_BUF_SPACE
 
- XFS_SYMLINK_CRC_OFF
 
- XFS_SYMLINK_LOG_COUNT
 
- XFS_SYMLINK_MAGIC
 
- XFS_SYMLINK_MAPS
 
- XFS_SYMLINK_MAXLEN
 
- XFS_SYMLINK_MODE
 
- XFS_SYMLINK_SPACE_RES
 
- XFS_SYNCD_TIMER
 
- XFS_SYNC_H
 
- XFS_SYSFS_ATTR_RO
 
- XFS_SYSFS_ATTR_RW
 
- XFS_SYSFS_ATTR_WO
 
- XFS_TEST_ERROR
 
- XFS_TRANSACTION
 
- XFS_TRANS_CHECKPOINT
 
- XFS_TRANS_DIRTY
 
- XFS_TRANS_DQ_BCOUNT
 
- XFS_TRANS_DQ_DELBCOUNT
 
- XFS_TRANS_DQ_DELRTBCOUNT
 
- XFS_TRANS_DQ_DIRTY
 
- XFS_TRANS_DQ_ICOUNT
 
- XFS_TRANS_DQ_RES_BLKS
 
- XFS_TRANS_DQ_RES_INOS
 
- XFS_TRANS_DQ_RES_RTBLKS
 
- XFS_TRANS_DQ_RTBCOUNT
 
- XFS_TRANS_HEADER_MAGIC
 
- XFS_TRANS_LOWMODE
 
- XFS_TRANS_NO_WRITECOUNT
 
- XFS_TRANS_PERM_LOG_RES
 
- XFS_TRANS_RESERVE
 
- XFS_TRANS_SB_AGCOUNT
 
- XFS_TRANS_SB_DBLOCKS
 
- XFS_TRANS_SB_DIRTY
 
- XFS_TRANS_SB_FDBLOCKS
 
- XFS_TRANS_SB_FREXTENTS
 
- XFS_TRANS_SB_ICOUNT
 
- XFS_TRANS_SB_IFREE
 
- XFS_TRANS_SB_IMAXPCT
 
- XFS_TRANS_SB_RBLOCKS
 
- XFS_TRANS_SB_RBMBLOCKS
 
- XFS_TRANS_SB_RES_FDBLOCKS
 
- XFS_TRANS_SB_RES_FREXTENTS
 
- XFS_TRANS_SB_REXTENTS
 
- XFS_TRANS_SB_REXTSIZE
 
- XFS_TRANS_SB_REXTSLOG
 
- XFS_TRANS_SYNC
 
- XFS_UQUOTA_ACCT
 
- XFS_UQUOTA_ACTIVE
 
- XFS_UQUOTA_CHKD
 
- XFS_UQUOTA_ENFD
 
- XFS_VERSION_STRING
 
- XFS_VOLUME
 
- XFS_WANT_CORRUPTED_GOTO
 
- XFS_WANT_CORRUPTED_RETURN
 
- XFS_WARN
 
- XFS_WARN_STRING
 
- XFS_WORDLOG
 
- XFS_WORDMASK
 
- XFS_WRITEIO_ALIGN
 
- XFS_WRITEIO_LOG_LARGE
 
- XFS_WRITE_LOG_COUNT
 
- XFS_WRITE_LOG_COUNT_REFLINK
 
- XFS_WSYNC_READIO_LOG
 
- XFS_WSYNC_WRITEIO_LOG
 
- XFS_XATTR_LIST_MAX
 
- XFS_XATTR_SIZE_MAX
 
- XFTS_CHANNEL_SHIFT
 
- XFTS_FBRRTS_FT_SHIFT
 
- XFTS_RTS_FT_SHIFT
 
- XFULL_CYCLE
 
- XFW
 
- XFXFXM_MASK
 
- XFXM
 
- XFm
 
- XFn
 
- XGA_HEIGHT
 
- XGA_MODE
 
- XGA_WIDTH
 
- XGBE10_ALE_OFFSET
 
- XGBE10_CPTS_OFFSET
 
- XGBE10_EMAC_OFFSET
 
- XGBE10_HOST_PORT_NUM
 
- XGBE10_HOST_PORT_OFFSET
 
- XGBE10_HW_STATS_OFFSET
 
- XGBE10_NUM_ALE_ENTRIES
 
- XGBE10_SGMII_MODULE_OFFSET
 
- XGBE10_SLAVE_PORT_OFFSET
 
- XGBE_ABORT_COUNT
 
- XGBE_ACPI_DMA_FREQ
 
- XGBE_ACPI_PTP_FREQ
 
- XGBE_ADV
 
- XGBE_AN_CL37_FD_MASK
 
- XGBE_AN_CL37_HD_MASK
 
- XGBE_AN_CL37_INT_CMPLT
 
- XGBE_AN_CL37_INT_MASK
 
- XGBE_AN_CL37_MII_CTRL_8BIT
 
- XGBE_AN_CL37_PCS_MODE_BASEX
 
- XGBE_AN_CL37_PCS_MODE_MASK
 
- XGBE_AN_CL37_PCS_MODE_SGMII
 
- XGBE_AN_CL37_TX_CONFIG_MASK
 
- XGBE_AN_CL73_INC_LINK
 
- XGBE_AN_CL73_INT_CMPLT
 
- XGBE_AN_CL73_INT_MASK
 
- XGBE_AN_CL73_PG_RCV
 
- XGBE_AN_COMPLETE
 
- XGBE_AN_ERROR
 
- XGBE_AN_INCOMPAT_LINK
 
- XGBE_AN_MODE_CL37
 
- XGBE_AN_MODE_CL37_SGMII
 
- XGBE_AN_MODE_CL73
 
- XGBE_AN_MODE_CL73_REDRV
 
- XGBE_AN_MODE_NONE
 
- XGBE_AN_MS_TIMEOUT
 
- XGBE_AN_NO_LINK
 
- XGBE_AN_PAGE_RECEIVED
 
- XGBE_AN_READY
 
- XGBE_BEL_FUSE_PARTNO
 
- XGBE_BEL_FUSE_VENDOR
 
- XGBE_BLWC_PROPERTY
 
- XGBE_CDR_DELAY_INC
 
- XGBE_CDR_DELAY_INIT
 
- XGBE_CDR_DELAY_MAX
 
- XGBE_CDR_RATE_PROPERTY
 
- XGBE_CLR_ADV
 
- XGBE_CLR_LP_ADV
 
- XGBE_CLR_SUP
 
- XGBE_CONN_TYPE_BACKPLANE
 
- XGBE_CONN_TYPE_MAX
 
- XGBE_CONN_TYPE_MDIO
 
- XGBE_CONN_TYPE_NONE
 
- XGBE_CONN_TYPE_RSVD1
 
- XGBE_CONN_TYPE_SFP
 
- XGBE_CTRL_OFFSET
 
- XGBE_DEFAULT_INT_MASK
 
- XGBE_DFE_CFG_PROPERTY
 
- XGBE_DFE_ENA_PROPERTY
 
- XGBE_DISABLE_COUNT
 
- XGBE_DMA_CLOCK
 
- XGBE_DMA_IRQS_PROPERTY
 
- XGBE_DMA_OS_ARCR
 
- XGBE_DMA_OS_AWCR
 
- XGBE_DMA_PCI_ARCR
 
- XGBE_DMA_PCI_AWARCR
 
- XGBE_DMA_PCI_AWCR
 
- XGBE_DMA_STOP_TIMEOUT
 
- XGBE_DMA_SYS_ARCR
 
- XGBE_DMA_SYS_AWCR
 
- XGBE_DOWN
 
- XGBE_DRV_DESC
 
- XGBE_DRV_NAME
 
- XGBE_DRV_VERSION
 
- XGBE_ECC_LIMIT
 
- XGBE_ECC_SEC_DESC
 
- XGBE_ECC_SEC_RX
 
- XGBE_ECC_SEC_TX
 
- XGBE_GET_DESC_DATA
 
- XGBE_GPIO_ADDRESS_PCA9555
 
- XGBE_GPIO_NO_MOD_ABSENT
 
- XGBE_GPIO_NO_RATE_SELECT
 
- XGBE_GPIO_NO_RX_LOS
 
- XGBE_GPIO_NO_TX_FAULT
 
- XGBE_HWID
 
- XGBE_I2C_CMD_READ
 
- XGBE_I2C_CMD_WRITE
 
- XGBE_I2C_CTRL_OFFSET
 
- XGBE_I2C_READ
 
- XGBE_I2C_STOP
 
- XGBE_INTR_RX_FULL
 
- XGBE_INTR_STOP_DET
 
- XGBE_INTR_TX_ABRT
 
- XGBE_INTR_TX_EMPTY
 
- XGBE_IRQ_MODE_EDGE
 
- XGBE_IRQ_MODE_LEVEL
 
- XGBE_IS_SUP
 
- XGBE_KR_TRAINING_ENABLE
 
- XGBE_KR_TRAINING_START
 
- XGBE_LINK_ERR
 
- XGBE_LINK_INIT
 
- XGBE_LINK_TIMEOUT
 
- XGBE_LM_COPY
 
- XGBE_LP_ADV
 
- XGBE_MAC_ADDR_PROPERTY
 
- XGBE_MAC_HASH_TABLE_SIZE
 
- XGBE_MAC_PROP_OFFSET
 
- XGBE_MAX_DMA_CHANNELS
 
- XGBE_MAX_QUEUES
 
- XGBE_MDIO_MODE_CL22
 
- XGBE_MDIO_MODE_CL45
 
- XGBE_MDIO_MODE_NONE
 
- XGBE_MDIO_RESET_I2C_GPIO
 
- XGBE_MDIO_RESET_INT_GPIO
 
- XGBE_MDIO_RESET_MAX
 
- XGBE_MDIO_RESET_NONE
 
- XGBE_MODE_KR
 
- XGBE_MODE_KX_1000
 
- XGBE_MODE_KX_2500
 
- XGBE_MODE_SFI
 
- XGBE_MODE_SGMII_100
 
- XGBE_MODE_SGMII_1000
 
- XGBE_MODE_UNKNOWN
 
- XGBE_MODE_X
 
- XGBE_MODULE_NAME
 
- XGBE_MSI_BASE_COUNT
 
- XGBE_MSI_MIN_COUNT
 
- XGBE_MUTEX_RELEASE
 
- XGBE_PCS_CL37_BP
 
- XGBE_PHY_MODE_PROPERTY
 
- XGBE_PHY_PORT_SPEED_100
 
- XGBE_PHY_PORT_SPEED_1000
 
- XGBE_PHY_PORT_SPEED_10000
 
- XGBE_PHY_PORT_SPEED_2500
 
- XGBE_PHY_REDRV_IF_I2C
 
- XGBE_PHY_REDRV_IF_MAX
 
- XGBE_PHY_REDRV_IF_MDIO
 
- XGBE_PHY_REDRV_MODEL_4223
 
- XGBE_PHY_REDRV_MODEL_4227
 
- XGBE_PHY_REDRV_MODEL_MAX
 
- XGBE_PHY_REDRV_MODE_CX
 
- XGBE_PHY_REDRV_MODE_REG
 
- XGBE_PHY_REDRV_MODE_SR
 
- XGBE_PMA_CDR_TRACK_EN_MASK
 
- XGBE_PMA_CDR_TRACK_EN_OFF
 
- XGBE_PMA_CDR_TRACK_EN_ON
 
- XGBE_PORT_MODE_1000BASE_T
 
- XGBE_PORT_MODE_1000BASE_X
 
- XGBE_PORT_MODE_10GBASE_R
 
- XGBE_PORT_MODE_10GBASE_T
 
- XGBE_PORT_MODE_BACKPLANE
 
- XGBE_PORT_MODE_BACKPLANE_2500
 
- XGBE_PORT_MODE_MAX
 
- XGBE_PORT_MODE_NBASE_T
 
- XGBE_PORT_MODE_RSVD
 
- XGBE_PORT_MODE_SFP
 
- XGBE_PQ_SKEW_PROPERTY
 
- XGBE_PRIORITY_QUEUES
 
- XGBE_PTP_CLOCK
 
- XGBE_RATECHANGE_COUNT
 
- XGBE_REG_VAL_STAT_ENABLE_ALL
 
- XGBE_RRC_FREQUENCY
 
- XGBE_RSS_HASH_KEY_SIZE
 
- XGBE_RSS_HASH_KEY_TYPE
 
- XGBE_RSS_LOOKUP_TABLE_TYPE
 
- XGBE_RSS_MAX_TABLE_SIZE
 
- XGBE_RX_BPA
 
- XGBE_RX_BUF_ALIGN
 
- XGBE_RX_COMPLETE
 
- XGBE_RX_DESC_CNT
 
- XGBE_RX_DESC_CNT_MAX
 
- XGBE_RX_DESC_CNT_MIN
 
- XGBE_RX_ERROR
 
- XGBE_RX_MIN_BUF_SIZE
 
- XGBE_RX_XNP
 
- XGBE_SERDES_REG_INDEX
 
- XGBE_SET_ADV
 
- XGBE_SET_LP_ADV
 
- XGBE_SET_REG_OFS
 
- XGBE_SET_SUP
 
- XGBE_SFP_BASE_10000_CR
 
- XGBE_SFP_BASE_10000_ER
 
- XGBE_SFP_BASE_10000_LR
 
- XGBE_SFP_BASE_10000_LRM
 
- XGBE_SFP_BASE_10000_SR
 
- XGBE_SFP_BASE_1000_CX
 
- XGBE_SFP_BASE_1000_LX
 
- XGBE_SFP_BASE_1000_SX
 
- XGBE_SFP_BASE_1000_T
 
- XGBE_SFP_BASE_10GBE_CC
 
- XGBE_SFP_BASE_10GBE_CC_ER
 
- XGBE_SFP_BASE_10GBE_CC_LR
 
- XGBE_SFP_BASE_10GBE_CC_LRM
 
- XGBE_SFP_BASE_10GBE_CC_SR
 
- XGBE_SFP_BASE_1GBE_CC
 
- XGBE_SFP_BASE_1GBE_CC_CX
 
- XGBE_SFP_BASE_1GBE_CC_LX
 
- XGBE_SFP_BASE_1GBE_CC_SX
 
- XGBE_SFP_BASE_1GBE_CC_T
 
- XGBE_SFP_BASE_BR
 
- XGBE_SFP_BASE_BR_10GBE_MAX
 
- XGBE_SFP_BASE_BR_10GBE_MIN
 
- XGBE_SFP_BASE_BR_1GBE_MAX
 
- XGBE_SFP_BASE_BR_1GBE_MIN
 
- XGBE_SFP_BASE_CABLE
 
- XGBE_SFP_BASE_CABLE_ACTIVE
 
- XGBE_SFP_BASE_CABLE_PASSIVE
 
- XGBE_SFP_BASE_CC
 
- XGBE_SFP_BASE_CU_CABLE_LEN
 
- XGBE_SFP_BASE_EXT_ID
 
- XGBE_SFP_BASE_ID
 
- XGBE_SFP_BASE_UNKNOWN
 
- XGBE_SFP_BASE_VENDOR_NAME
 
- XGBE_SFP_BASE_VENDOR_NAME_LEN
 
- XGBE_SFP_BASE_VENDOR_PN
 
- XGBE_SFP_BASE_VENDOR_PN_LEN
 
- XGBE_SFP_BASE_VENDOR_REV
 
- XGBE_SFP_BASE_VENDOR_REV_LEN
 
- XGBE_SFP_BASE_VENDOR_SN
 
- XGBE_SFP_BASE_VENDOR_SN_LEN
 
- XGBE_SFP_CABLE_ACTIVE
 
- XGBE_SFP_CABLE_PASSIVE
 
- XGBE_SFP_CABLE_UNKNOWN
 
- XGBE_SFP_COMM_DIRECT
 
- XGBE_SFP_COMM_PCA9545
 
- XGBE_SFP_DIAGS_SUPPORTED
 
- XGBE_SFP_DIAG_INFO_ADDRESS
 
- XGBE_SFP_DIRECT
 
- XGBE_SFP_EEPROM_BASE_LEN
 
- XGBE_SFP_EEPROM_DIAG_LEN
 
- XGBE_SFP_EEPROM_MAX
 
- XGBE_SFP_EXTD_CC
 
- XGBE_SFP_EXTD_DIAG
 
- XGBE_SFP_EXTD_DIAG_ADDR_CHANGE
 
- XGBE_SFP_EXTD_OPT1
 
- XGBE_SFP_EXTD_OPT1_RX_LOS
 
- XGBE_SFP_EXTD_OPT1_TX_FAULT
 
- XGBE_SFP_EXTD_SFF_8472
 
- XGBE_SFP_EXT_ID_SFP
 
- XGBE_SFP_ID_SFP
 
- XGBE_SFP_PHY_ADDRESS
 
- XGBE_SFP_SERIAL_ID_ADDRESS
 
- XGBE_SFP_SPEED_1000
 
- XGBE_SFP_SPEED_10000
 
- XGBE_SFP_SPEED_100_1000
 
- XGBE_SFP_SPEED_UNKNOWN
 
- XGBE_SGMII_1_OFFSET
 
- XGBE_SGMII_2_OFFSET
 
- XGBE_SGMII_AN_LINK_DUPLEX
 
- XGBE_SGMII_AN_LINK_SPEED
 
- XGBE_SGMII_AN_LINK_SPEED_100
 
- XGBE_SGMII_AN_LINK_SPEED_1000
 
- XGBE_SGMII_AN_LINK_STATUS
 
- XGBE_SKB_ALLOC_SIZE
 
- XGBE_SM_REG_INDEX
 
- XGBE_SPEEDS
 
- XGBE_SPEEDSET_1000_10000
 
- XGBE_SPEEDSET_2500_10000
 
- XGBE_SPEEDSET_PROPERTY
 
- XGBE_SPEED_1000
 
- XGBE_SPEED_10000
 
- XGBE_SPEED_10000_BLWC
 
- XGBE_SPEED_10000_CDR
 
- XGBE_SPEED_10000_DFE_TAP_CONFIG
 
- XGBE_SPEED_10000_DFE_TAP_ENABLE
 
- XGBE_SPEED_10000_PLL
 
- XGBE_SPEED_10000_PQ
 
- XGBE_SPEED_10000_RATE
 
- XGBE_SPEED_10000_TXAMP
 
- XGBE_SPEED_10000_WORD
 
- XGBE_SPEED_1000_BLWC
 
- XGBE_SPEED_1000_CDR
 
- XGBE_SPEED_1000_DFE_TAP_CONFIG
 
- XGBE_SPEED_1000_DFE_TAP_ENABLE
 
- XGBE_SPEED_1000_PLL
 
- XGBE_SPEED_1000_PQ
 
- XGBE_SPEED_1000_RATE
 
- XGBE_SPEED_1000_TXAMP
 
- XGBE_SPEED_1000_WORD
 
- XGBE_SPEED_2500
 
- XGBE_SPEED_2500_BLWC
 
- XGBE_SPEED_2500_CDR
 
- XGBE_SPEED_2500_DFE_TAP_CONFIG
 
- XGBE_SPEED_2500_DFE_TAP_ENABLE
 
- XGBE_SPEED_2500_PLL
 
- XGBE_SPEED_2500_PQ
 
- XGBE_SPEED_2500_RATE
 
- XGBE_SPEED_2500_TXAMP
 
- XGBE_SPEED_2500_WORD
 
- XGBE_SPH_HDSMS_SIZE
 
- XGBE_SS_REG_INDEX
 
- XGBE_SS_VERSION_10
 
- XGBE_STATS0_INFO
 
- XGBE_STATS0_MODULE
 
- XGBE_STATS1_INFO
 
- XGBE_STATS1_MODULE
 
- XGBE_STATS2_INFO
 
- XGBE_STATS2_MODULE
 
- XGBE_STATS_COUNT
 
- XGBE_STD_SPEED
 
- XGBE_STOPPED
 
- XGBE_TC_MIN_QUANTUM
 
- XGBE_TSTAMP_SNSINC
 
- XGBE_TSTAMP_SSINC
 
- XGBE_TX_AMP_PROPERTY
 
- XGBE_TX_DESC_CNT
 
- XGBE_TX_DESC_CNT_MAX
 
- XGBE_TX_DESC_CNT_MIN
 
- XGBE_TX_DESC_MAX_PROC
 
- XGBE_TX_DESC_MIN_FREE
 
- XGBE_TX_MAX_BUF_SIZE
 
- XGBE_TX_MAX_DESCS
 
- XGBE_TX_MAX_SPLIT
 
- XGBE_V2_DMA_CLOCK_FREQ
 
- XGBE_V2_PTP_CLOCK_FREQ
 
- XGBE_XGMAC_BAR
 
- XGBE_XNP_ACK_PROCESSED
 
- XGBE_XNP_MCF_NULL_MESSAGE
 
- XGBE_XNP_MP_FORMATTED
 
- XGBE_XNP_NP_EXCHANGE
 
- XGBE_XPCS_ACCESS_V1
 
- XGBE_XPCS_ACCESS_V2
 
- XGBE_XPCS_BAR
 
- XGBE_ZERO_ADV
 
- XGBE_ZERO_LP_ADV
 
- XGBE_ZERO_SUP
 
- XGENET_CLK
 
- XGENET_CLKEN_ADDR
 
- XGENET_CONFIG_REG_ADDR
 
- XGENET_CSR_ECM_CFG_0_ADDR
 
- XGENET_CSR_MULTI_DPF0_ADDR
 
- XGENET_CSR_MULTI_DPF1_ADDR
 
- XGENET_ECM_CONFIG0_REG_0
 
- XGENET_ICM_ECM_DROP_COUNT_REG0
 
- XGENET_RST
 
- XGENET_RX_DV_GATE_REG_0_ADDR
 
- XGENET_SRST_ADDR
 
- XGENE_AHCI_V1
 
- XGENE_AHCI_V2
 
- XGENE_CLE_DRAM
 
- XGENE_CLE_ESP
 
- XGENE_CLE_IDT_ENTRIES
 
- XGENE_CLE_IPV4
 
- XGENE_CLE_OTHER
 
- XGENE_CLE_TCP
 
- XGENE_CLE_UDP
 
- XGENE_CLK_DRIVER_VER
 
- XGENE_CLK_PMD_SCALE_INVERTED
 
- XGENE_CLK_PMD_SHIFT
 
- XGENE_CLK_PMD_WIDTH
 
- XGENE_DFLT_IRQ_START_PIN
 
- XGENE_DFLT_MAX_NGPIO
 
- XGENE_DFLT_MAX_NIRQ
 
- XGENE_DMA_16K_BUFFER_LEN_CODE
 
- XGENE_DMA_ASSOC_RING_MNGR1
 
- XGENE_DMA_BLK_MEM_RDY
 
- XGENE_DMA_BLK_MEM_RDY_VAL
 
- XGENE_DMA_BUFNUM
 
- XGENE_DMA_BUS_ID_RD
 
- XGENE_DMA_CFG_RING_WQ_ASSOC
 
- XGENE_DMA_CH_SETUP
 
- XGENE_DMA_CPU_BUFNUM
 
- XGENE_DMA_DESC_BUFLEN_POS
 
- XGENE_DMA_DESC_C_BIT
 
- XGENE_DMA_DESC_DR_BIT
 
- XGENE_DMA_DESC_DUMP
 
- XGENE_DMA_DESC_ELERR_POS
 
- XGENE_DMA_DESC_ELERR_RD
 
- XGENE_DMA_DESC_EMPTY_SIGNATURE
 
- XGENE_DMA_DESC_HOENQ_NUM_POS
 
- XGENE_DMA_DESC_IN_BIT
 
- XGENE_DMA_DESC_LERR_POS
 
- XGENE_DMA_DESC_LERR_RD
 
- XGENE_DMA_DESC_NV_BIT
 
- XGENE_DMA_DESC_RTYPE_POS
 
- XGENE_DMA_DESC_STATUS
 
- XGENE_DMA_DEV_ID_RD
 
- XGENE_DMA_DISABLE
 
- XGENE_DMA_ENABLE
 
- XGENE_DMA_FLAG_64B_DESC
 
- XGENE_DMA_GCR
 
- XGENE_DMA_INT
 
- XGENE_DMA_INT_ALL_MASK
 
- XGENE_DMA_INT_ALL_UNMASK
 
- XGENE_DMA_INT_MASK
 
- XGENE_DMA_INT_MASK_SHIFT
 
- XGENE_DMA_INVALID_LEN_CODE
 
- XGENE_DMA_IPBRR
 
- XGENE_DMA_MAX_64B_DESC_BYTE_CNT
 
- XGENE_DMA_MAX_BYTE_CNT
 
- XGENE_DMA_MAX_CHANNEL
 
- XGENE_DMA_MAX_XOR_SRC
 
- XGENE_DMA_MEM_RAM_SHUTDOWN
 
- XGENE_DMA_PQ_CHANNEL
 
- XGENE_DMA_PQ_DISABLE_MASK
 
- XGENE_DMA_RAID6_CONT
 
- XGENE_DMA_RAID6_MULTI_CTRL
 
- XGENE_DMA_REV_NO_RD
 
- XGENE_DMA_RING_ACCEPTLERR_SET
 
- XGENE_DMA_RING_ADDRH_SET
 
- XGENE_DMA_RING_ADDRL_SET
 
- XGENE_DMA_RING_BLK_MEM_RDY
 
- XGENE_DMA_RING_BLK_MEM_RDY_VAL
 
- XGENE_DMA_RING_CFG_SIZE_16KB
 
- XGENE_DMA_RING_CFG_SIZE_2KB
 
- XGENE_DMA_RING_CFG_SIZE_512B
 
- XGENE_DMA_RING_CFG_SIZE_512KB
 
- XGENE_DMA_RING_CFG_SIZE_64KB
 
- XGENE_DMA_RING_CFG_SIZE_INVALID
 
- XGENE_DMA_RING_CLKEN
 
- XGENE_DMA_RING_CMD_BASE_OFFSET
 
- XGENE_DMA_RING_CMD_OFFSET
 
- XGENE_DMA_RING_CMD_SM_OFFSET
 
- XGENE_DMA_RING_COHERENT_SET
 
- XGENE_DMA_RING_CONFIG
 
- XGENE_DMA_RING_DST_ID
 
- XGENE_DMA_RING_ENABLE
 
- XGENE_DMA_RING_HYSTERESIS
 
- XGENE_DMA_RING_HYSTERESIS_VAL
 
- XGENE_DMA_RING_ID
 
- XGENE_DMA_RING_ID_BUF
 
- XGENE_DMA_RING_ID_BUF_SETUP
 
- XGENE_DMA_RING_ID_GET
 
- XGENE_DMA_RING_ID_SETUP
 
- XGENE_DMA_RING_INT0_MASK
 
- XGENE_DMA_RING_INT1_MASK
 
- XGENE_DMA_RING_INT2_MASK
 
- XGENE_DMA_RING_INT3_MASK
 
- XGENE_DMA_RING_INT4_MASK
 
- XGENE_DMA_RING_MEM_RAM_SHUTDOWN
 
- XGENE_DMA_RING_NE_INT_MODE
 
- XGENE_DMA_RING_NE_INT_MODE_RESET
 
- XGENE_DMA_RING_NE_INT_MODE_SET
 
- XGENE_DMA_RING_NUM
 
- XGENE_DMA_RING_NUM_CONFIG
 
- XGENE_DMA_RING_OWNER_CPU
 
- XGENE_DMA_RING_OWNER_DMA
 
- XGENE_DMA_RING_RECOMBBUF_SET
 
- XGENE_DMA_RING_RECOMTIMEOUTH_SET
 
- XGENE_DMA_RING_RECOMTIMEOUTL_SET
 
- XGENE_DMA_RING_SELTHRSH_SET
 
- XGENE_DMA_RING_SIZE_SET
 
- XGENE_DMA_RING_SRST
 
- XGENE_DMA_RING_STATE
 
- XGENE_DMA_RING_STATE_WR_BASE
 
- XGENE_DMA_RING_THRESLD0_SET1
 
- XGENE_DMA_RING_THRESLD0_SET1_VAL
 
- XGENE_DMA_RING_THRESLD1_SET1
 
- XGENE_DMA_RING_THRESLD1_SET1_VAL
 
- XGENE_DMA_RING_TYPE_REGULAR
 
- XGENE_DMA_RING_TYPE_SET
 
- XGENE_DMA_RING_WQ_DESC_SIZE
 
- XGENE_DMA_XOR_CHANNEL
 
- XGENE_DRV_VERSION
 
- XGENE_ENET1
 
- XGENE_ENET2
 
- XGENE_ENET_DESC_SIZE
 
- XGENE_ENET_MAX_MTU
 
- XGENE_ENET_MIN_FRAME
 
- XGENE_ENET_NUM_DESC
 
- XGENE_ENET_RD_CMD
 
- XGENE_ENET_STD_MTU
 
- XGENE_ENET_V2_VERSION
 
- XGENE_ENET_WR_CMD
 
- XGENE_EXTD_STAT
 
- XGENE_EXTD_STATS_LEN
 
- XGENE_GICV2M_MSI_IIDR
 
- XGENE_GPIOS_PER_BANK
 
- XGENE_HWMON_V1
 
- XGENE_HWMON_V2
 
- XGENE_IRQ_START_PROPERTY
 
- XGENE_MAX_ENET_IRQ
 
- XGENE_MAX_GPIOS
 
- XGENE_MAX_GPIO_BANKS
 
- XGENE_MDIO_RGMII
 
- XGENE_MDIO_XFI
 
- XGENE_MIN_ENET_FRAME_SIZE
 
- XGENE_NGPIO_PROPERTY
 
- XGENE_NIRQ_PROPERTY
 
- XGENE_NUM_RX_RING
 
- XGENE_NUM_TXC_RING
 
- XGENE_NUM_TX_RING
 
- XGENE_PCIE_DEVICEID
 
- XGENE_PCIE_IP_VER_1
 
- XGENE_PCIE_IP_VER_2
 
- XGENE_PCIE_IP_VER_UNKN
 
- XGENE_PCIE_VENDORID
 
- XGENE_PMU_EVENT_ATTR
 
- XGENE_PMU_FORMAT_ATTR
 
- XGENE_RNG_RETRY_COUNT
 
- XGENE_RNG_RETRY_INTERVAL
 
- XGENE_SLIMPRO_I2C_V1
 
- XGENE_SLIMPRO_I2C_V2
 
- XGENE_SOC_JTAG1_SHADOW
 
- XGENE_STAT
 
- XGENE_STATS_LEN
 
- XGENE_V1_ECAM_MCFG
 
- XGENE_V1_PCI_EXP_CAP
 
- XGENE_V2_ECAM_MCFG
 
- XGE_EXTD_STAT
 
- XGE_EXTD_STATS_LEN
 
- XGE_STAT
 
- XGE_STATS_LEN
 
- XGICTRANSERRINTMSK
 
- XGICTRANSERRINTSTS
 
- XGICTRANSERRREQINFO
 
- XGIC_POISONED_REQ_MASK
 
- XGI_20
 
- XGI_21
 
- XGI_40
 
- XGLUE
 
- XGMAC0_0_BASE_ADDR
 
- XGMAC0_1_BASE_ADDR
 
- XGMAC0_F
 
- XGMAC0_S
 
- XGMAC0_V
 
- XGMAC1_F
 
- XGMAC1_S
 
- XGMAC1_V
 
- XGMAC_AAL
 
- XGMAC_ABPSIS
 
- XGMAC_ADDR
 
- XGMAC_ADDRT
 
- XGMAC_ADDR_AE
 
- XGMAC_ADDR_HIGH
 
- XGMAC_ADDR_LOW
 
- XGMAC_ADDR_MAX
 
- XGMAC_ADDR_R
 
- XGMAC_ADDR_RDY
 
- XGMAC_ADDR_XME
 
- XGMAC_ADDRx_HIGH
 
- XGMAC_ADDRx_LOW
 
- XGMAC_AE
 
- XGMAC_AIE
 
- XGMAC_AIS
 
- XGMAC_ARP_ADDR
 
- XGMAC_BLEN
 
- XGMAC_BLEN128
 
- XGMAC_BLEN16
 
- XGMAC_BLEN256
 
- XGMAC_BLEN32
 
- XGMAC_BLEN4
 
- XGMAC_BLEN64
 
- XGMAC_BLEN8
 
- XGMAC_CBS
 
- XGMAC_CC
 
- XGMAC_CLK_ENABLE_REG
 
- XGMAC_CONFIG_ACS
 
- XGMAC_CONFIG_ARPEN
 
- XGMAC_CONFIG_CST
 
- XGMAC_CONFIG_GPSL
 
- XGMAC_CONFIG_GPSLCE
 
- XGMAC_CONFIG_GPSL_SHIFT
 
- XGMAC_CONFIG_HDSMS
 
- XGMAC_CONFIG_HDSMS_256
 
- XGMAC_CONFIG_HDSMS_SHIFT
 
- XGMAC_CONFIG_IPC
 
- XGMAC_CONFIG_JD
 
- XGMAC_CONFIG_JE
 
- XGMAC_CONFIG_LM
 
- XGMAC_CONFIG_RE
 
- XGMAC_CONFIG_S2KP
 
- XGMAC_CONFIG_SARC
 
- XGMAC_CONFIG_SARC_SHIFT
 
- XGMAC_CONFIG_SS_10000
 
- XGMAC_CONFIG_SS_1000_GMII
 
- XGMAC_CONFIG_SS_100_MII
 
- XGMAC_CONFIG_SS_10_MII
 
- XGMAC_CONFIG_SS_2500
 
- XGMAC_CONFIG_SS_2500_GMII
 
- XGMAC_CONFIG_SS_5000
 
- XGMAC_CONFIG_SS_MASK
 
- XGMAC_CONFIG_SS_OFF
 
- XGMAC_CONFIG_TE
 
- XGMAC_CONFIG_WD
 
- XGMAC_CONTROL
 
- XGMAC_CONTROL_ACS
 
- XGMAC_CONTROL_CAR
 
- XGMAC_CONTROL_CAR_MASK
 
- XGMAC_CONTROL_DDIC
 
- XGMAC_CONTROL_DP
 
- XGMAC_CONTROL_IPC
 
- XGMAC_CONTROL_JD
 
- XGMAC_CONTROL_JE
 
- XGMAC_CONTROL_LM
 
- XGMAC_CONTROL_RE
 
- XGMAC_CONTROL_SARC
 
- XGMAC_CONTROL_SARK_MASK
 
- XGMAC_CONTROL_SPD
 
- XGMAC_CONTROL_SPD_10G
 
- XGMAC_CONTROL_SPD_1G
 
- XGMAC_CONTROL_SPD_2_5G
 
- XGMAC_CONTROL_SPD_MASK
 
- XGMAC_CONTROL_TE
 
- XGMAC_CONTROL_WD
 
- XGMAC_CORE_INIT_RX
 
- XGMAC_CORE_INIT_TX
 
- XGMAC_CT
 
- XGMAC_CTL_RX_1588_B
 
- XGMAC_CTL_RX_1731_B
 
- XGMAC_CTL_RX_FCS_B
 
- XGMAC_CTL_RX_FCS_STRIP_B
 
- XGMAC_CTL_RX_PFC_B
 
- XGMAC_CTL_RX_PREAMBLE_TRANS_B
 
- XGMAC_CTL_RX_TRUNCATE_B
 
- XGMAC_CTL_RX_UNDER_MIN_ERR_B
 
- XGMAC_CTL_TX_1588_B
 
- XGMAC_CTL_TX_1731_B
 
- XGMAC_CTL_TX_FCS_B
 
- XGMAC_CTL_TX_PAD_B
 
- XGMAC_CTL_TX_PFC_B
 
- XGMAC_CTL_TX_PREAMBLE_TRANS_B
 
- XGMAC_CTL_TX_TRUNCATE_B
 
- XGMAC_CTL_TX_UNDER_MIN_ERR_B
 
- XGMAC_DATA
 
- XGMAC_DATA_SIZE
 
- XGMAC_DCEIE
 
- XGMAC_DCS
 
- XGMAC_DCS_SHIFT
 
- XGMAC_DEBUG
 
- XGMAC_DECIS
 
- XGMAC_DEUIS
 
- XGMAC_DMA_AXI_BUS
 
- XGMAC_DMA_AXI_STATUS
 
- XGMAC_DMA_BUS_MODE
 
- XGMAC_DMA_CH_CONTROL
 
- XGMAC_DMA_CH_INT_EN
 
- XGMAC_DMA_CH_RX_CONTROL
 
- XGMAC_DMA_CH_RxDESC_HADDR
 
- XGMAC_DMA_CH_RxDESC_LADDR
 
- XGMAC_DMA_CH_RxDESC_RING_LEN
 
- XGMAC_DMA_CH_RxDESC_TAIL_LPTR
 
- XGMAC_DMA_CH_Rx_WATCHDOG
 
- XGMAC_DMA_CH_STATUS
 
- XGMAC_DMA_CH_TX_CONTROL
 
- XGMAC_DMA_CH_TxDESC_HADDR
 
- XGMAC_DMA_CH_TxDESC_LADDR
 
- XGMAC_DMA_CH_TxDESC_RING_LEN
 
- XGMAC_DMA_CH_TxDESC_TAIL_LPTR
 
- XGMAC_DMA_CONTROL
 
- XGMAC_DMA_ECC_INT_ENABLE
 
- XGMAC_DMA_ECC_INT_STATUS
 
- XGMAC_DMA_HW_FEATURE
 
- XGMAC_DMA_INTR_ENA
 
- XGMAC_DMA_INT_DEFAULT_EN
 
- XGMAC_DMA_IOREAD
 
- XGMAC_DMA_IOREAD_BITS
 
- XGMAC_DMA_IOWRITE
 
- XGMAC_DMA_IOWRITE_BITS
 
- XGMAC_DMA_MISS_FRAME_CTR
 
- XGMAC_DMA_MODE
 
- XGMAC_DMA_RI_WDOG_TIMER
 
- XGMAC_DMA_RX_BASE_ADDR
 
- XGMAC_DMA_RX_POLL
 
- XGMAC_DMA_SAFETY_INT_STATUS
 
- XGMAC_DMA_STATUS
 
- XGMAC_DMA_SYSBUS_MODE
 
- XGMAC_DMA_TX_BASE_ADDR
 
- XGMAC_DMA_TX_POLL
 
- XGMAC_DRIVER_CONTEXT
 
- XGMAC_DUMP_WORD_COUNT
 
- XGMAC_DWRR
 
- XGMAC_EAME
 
- XGMAC_ECEIE
 
- XGMAC_EHFC
 
- XGMAC_ENABLE_RX_B
 
- XGMAC_ENABLE_TX_B
 
- XGMAC_EN_LPI
 
- XGMAC_ETHTOOL_NAME
 
- XGMAC_ETH_PREAMBLE
 
- XGMAC_ETS
 
- XGMAC_ETSALG
 
- XGMAC_EXT_STAT
 
- XGMAC_FBE
 
- XGMAC_FIFO_ALIGN
 
- XGMAC_FIFO_FC_MIN
 
- XGMAC_FIFO_FC_OFF
 
- XGMAC_FIFO_MIN_ALLOC
 
- XGMAC_FIFO_UNIT
 
- XGMAC_FILTER_HMC
 
- XGMAC_FILTER_HPF
 
- XGMAC_FILTER_IPFE
 
- XGMAC_FILTER_PCF
 
- XGMAC_FILTER_PM
 
- XGMAC_FILTER_PR
 
- XGMAC_FILTER_RA
 
- XGMAC_FILTER_VTFE
 
- XGMAC_FLOW_CONTROL_ALIGN
 
- XGMAC_FLOW_CONTROL_MAX
 
- XGMAC_FLOW_CONTROL_UNIT
 
- XGMAC_FLOW_CONTROL_VALUE
 
- XGMAC_FLOW_CTRL
 
- XGMAC_FLOW_CTRL_DZQP
 
- XGMAC_FLOW_CTRL_FCB_BPA
 
- XGMAC_FLOW_CTRL_PLT
 
- XGMAC_FLOW_CTRL_PLT_MASK
 
- XGMAC_FLOW_CTRL_PT_MASK
 
- XGMAC_FLOW_CTRL_PT_SHIFT
 
- XGMAC_FLOW_CTRL_RFE
 
- XGMAC_FLOW_CTRL_TFE
 
- XGMAC_FLOW_CTRL_UP
 
- XGMAC_FRAME_FILTER
 
- XGMAC_FRAME_FILTER_DAIF
 
- XGMAC_FRAME_FILTER_DBF
 
- XGMAC_FRAME_FILTER_HMC
 
- XGMAC_FRAME_FILTER_HPF
 
- XGMAC_FRAME_FILTER_HUC
 
- XGMAC_FRAME_FILTER_PM
 
- XGMAC_FRAME_FILTER_PR
 
- XGMAC_FRAME_FILTER_RA
 
- XGMAC_FRAME_FILTER_SAF
 
- XGMAC_FRAME_FILTER_SAIF
 
- XGMAC_FRAME_FILTER_VHF
 
- XGMAC_FRAME_FILTER_VPF
 
- XGMAC_FRPE
 
- XGMAC_GET_BITS
 
- XGMAC_GET_BITS_LE
 
- XGMAC_GLBLUCAST
 
- XGMAC_HASH
 
- XGMAC_HASH_TABLE
 
- XGMAC_HWFEAT_ADDR64
 
- XGMAC_HWFEAT_ARPOFFSEL
 
- XGMAC_HWFEAT_ASP
 
- XGMAC_HWFEAT_AVSEL
 
- XGMAC_HWFEAT_DVLAN
 
- XGMAC_HWFEAT_EEESEL
 
- XGMAC_HWFEAT_FRPES
 
- XGMAC_HWFEAT_FRPPB
 
- XGMAC_HWFEAT_FRPSEL
 
- XGMAC_HWFEAT_GMIISEL
 
- XGMAC_HWFEAT_HASHTBLSZ
 
- XGMAC_HWFEAT_L3L4FNUM
 
- XGMAC_HWFEAT_MGKSEL
 
- XGMAC_HWFEAT_MMCSEL
 
- XGMAC_HWFEAT_PPSOUTNUM
 
- XGMAC_HWFEAT_RAVSEL
 
- XGMAC_HWFEAT_RSSEN
 
- XGMAC_HWFEAT_RWKSEL
 
- XGMAC_HWFEAT_RXCHCNT
 
- XGMAC_HWFEAT_RXCOESEL
 
- XGMAC_HWFEAT_RXFIFOSIZE
 
- XGMAC_HWFEAT_RXQCNT
 
- XGMAC_HWFEAT_SAVLANINS
 
- XGMAC_HWFEAT_SPHEN
 
- XGMAC_HWFEAT_TSOEN
 
- XGMAC_HWFEAT_TSSEL
 
- XGMAC_HWFEAT_TXCHCNT
 
- XGMAC_HWFEAT_TXCOESEL
 
- XGMAC_HWFEAT_TXFIFOSIZE
 
- XGMAC_HWFEAT_TXQCNT
 
- XGMAC_HWFEAT_VLHASH
 
- XGMAC_HW_FEATURE0
 
- XGMAC_HW_FEATURE1
 
- XGMAC_HW_FEATURE2
 
- XGMAC_HW_FEATURE3
 
- XGMAC_HW_STAT
 
- XGMAC_IDDR
 
- XGMAC_IDDR_FNUM
 
- XGMAC_IDDR_SHIFT
 
- XGMAC_IERR_U_INFO_REG
 
- XGMAC_INIT_DMA_RX_FRAMES
 
- XGMAC_INIT_DMA_RX_USECS
 
- XGMAC_INIT_DMA_TX_FRAMES
 
- XGMAC_INIT_DMA_TX_USECS
 
- XGMAC_INT_DEFAULT_EN
 
- XGMAC_INT_DMA_ALL
 
- XGMAC_INT_DMA_CH_SR_FBE
 
- XGMAC_INT_DMA_CH_SR_RBU
 
- XGMAC_INT_DMA_CH_SR_RI
 
- XGMAC_INT_DMA_CH_SR_RPS
 
- XGMAC_INT_DMA_CH_SR_TBU
 
- XGMAC_INT_DMA_CH_SR_TI
 
- XGMAC_INT_DMA_CH_SR_TI_RI
 
- XGMAC_INT_DMA_CH_SR_TPS
 
- XGMAC_INT_EN
 
- XGMAC_INT_ENABLE_REG
 
- XGMAC_INT_SET_REG
 
- XGMAC_INT_STAT
 
- XGMAC_INT_STATE_RESTORE
 
- XGMAC_INT_STATE_SAVE
 
- XGMAC_INT_STATUS
 
- XGMAC_INT_STATUS_REG
 
- XGMAC_INT_STAT_LPI
 
- XGMAC_INT_STAT_PMT
 
- XGMAC_INT_STAT_PMTIM
 
- XGMAC_IOCTL_CONTEXT
 
- XGMAC_IOREAD
 
- XGMAC_IOREAD_BITS
 
- XGMAC_IOWRITE
 
- XGMAC_IOWRITE_BITS
 
- XGMAC_IP2TE
 
- XGMAC_JUMBO_LEN
 
- XGMAC_JUMBO_PACKET_MTU
 
- XGMAC_KR0_F
 
- XGMAC_KR0_S
 
- XGMAC_KR0_V
 
- XGMAC_KR1_F
 
- XGMAC_KR1_S
 
- XGMAC_KR1_V
 
- XGMAC_L34T_IP4TCP
 
- XGMAC_L34T_IP4UDP
 
- XGMAC_L34T_IP6TCP
 
- XGMAC_L34T_IP6UDP
 
- XGMAC_L3DAIM0
 
- XGMAC_L3DAM0
 
- XGMAC_L3HDBM0
 
- XGMAC_L3HSBM0
 
- XGMAC_L3L4_ADDR_CTRL
 
- XGMAC_L3L4_CTRL
 
- XGMAC_L3L4_DATA
 
- XGMAC_L3PEN0
 
- XGMAC_L3SAIM0
 
- XGMAC_L3SAM0
 
- XGMAC_L3_ADDR0
 
- XGMAC_L3_ADDR1
 
- XGMAC_L3_ADDR2
 
- XGMAC_L4DP0
 
- XGMAC_L4DP0_SHIFT
 
- XGMAC_L4DPIM0
 
- XGMAC_L4DPM0
 
- XGMAC_L4PEN0
 
- XGMAC_L4SP0
 
- XGMAC_L4SPIM0
 
- XGMAC_L4SPM0
 
- XGMAC_L4_ADDR
 
- XGMAC_LF_RF_INSERT_M
 
- XGMAC_LF_RF_INSERT_S
 
- XGMAC_LINK_CONTROL_REG
 
- XGMAC_LINK_STATUS_REG
 
- XGMAC_LPIIE
 
- XGMAC_LPIIS
 
- XGMAC_LPITXA
 
- XGMAC_LPITXEN
 
- XGMAC_LPI_CTRL
 
- XGMAC_LPI_TIMER
 
- XGMAC_LPI_TIMER_CTRL
 
- XGMAC_LPI_XIT_PKT
 
- XGMAC_MAC_1588_ADJUST_CFG_REG
 
- XGMAC_MAC_1588_ASYM_DLY_REG
 
- XGMAC_MAC_1588_CTRL_REG
 
- XGMAC_MAC_1588_RX_PORT_DLY_REG
 
- XGMAC_MAC_1588_TX_PORT_DLY_REG
 
- XGMAC_MAC_CONTROL_REG
 
- XGMAC_MAC_DBG_INFO_REG
 
- XGMAC_MAC_DPP_FSM_INT_STATUS
 
- XGMAC_MAC_ENABLE_REG
 
- XGMAC_MAC_ERR_INFO_REG
 
- XGMAC_MAC_FSM_CONTROL
 
- XGMAC_MAC_IPG_REG
 
- XGMAC_MAC_MAX_PKT_SIZE_REG
 
- XGMAC_MAC_MIB_CONTROL_REG
 
- XGMAC_MAC_MIN_PKT_SIZE_REG
 
- XGMAC_MAC_MSG_CRC_EN_REG
 
- XGMAC_MAC_MSG_FC_CFG_REG
 
- XGMAC_MAC_MSG_IMG_REG
 
- XGMAC_MAC_MSG_TC_CFG_REG
 
- XGMAC_MAC_PAD_SIZE_REG
 
- XGMAC_MAC_PAUSE_CTRL_REG
 
- XGMAC_MAC_PAUSE_GAP_REG
 
- XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG
 
- XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG
 
- XGMAC_MAC_PAUSE_PEER_MAC_H_REG
 
- XGMAC_MAC_PAUSE_PEER_MAC_L_REG
 
- XGMAC_MAC_PAUSE_TIME_REG
 
- XGMAC_MAC_PFC_PRI_EN_REG
 
- XGMAC_MAC_REGSIZE
 
- XGMAC_MAC_RX_ERR_EFD_CNT_REG
 
- XGMAC_MAC_RX_ERR_MSG_CNT_REG
 
- XGMAC_MAC_RX_LF_RF_STATUS_REG
 
- XGMAC_MAC_RX_PREAM_ERR_PKT_CNT_REG
 
- XGMAC_MAC_RX_RUNT_PKT_CNT_REG
 
- XGMAC_MAC_TX_ERR_MARK_REG
 
- XGMAC_MAC_TX_LF_RF_CONTROL_REG
 
- XGMAC_MAC_TX_LF_RF_TERM_PKT_CNT_REG
 
- XGMAC_MAC_TX_RUNT_PKT_CNT_REG
 
- XGMAC_MAC_TX_SN_MISMATCH_PKT_CNT_REG
 
- XGMAC_MAC_WAN_RATE_ADJUST_REG
 
- XGMAC_MAC_Y1731_ETH_TYPE_REG
 
- XGMAC_MAX_C22_PORT
 
- XGMAC_MAX_DMA_RIWT
 
- XGMAC_MAX_FLOW_CONTROL_QUEUES
 
- XGMAC_MAX_HASH_TABLE
 
- XGMAC_MAX_JUMBO_PACKET
 
- XGMAC_MAX_MTU
 
- XGMAC_MAX_STD_PACKET
 
- XGMAC_MCSIS
 
- XGMAC_MDIO_ADDR
 
- XGMAC_MDIO_C22P
 
- XGMAC_MDIO_DATA
 
- XGMAC_MECIS
 
- XGMAC_MEUIS
 
- XGMAC_MGKPKTEN
 
- XGMAC_MIN_PACKET
 
- XGMAC_MMC_CTRL
 
- XGMAC_MMC_CTRL_CNT_FRZ
 
- XGMAC_MMC_INTR_MASK_RX
 
- XGMAC_MMC_INTR_MASK_TX
 
- XGMAC_MMC_INTR_RX
 
- XGMAC_MMC_INTR_TX
 
- XGMAC_MMC_RXBCFRAME_G
 
- XGMAC_MMC_RXCRCERR
 
- XGMAC_MMC_RXFRAME_GB_HI
 
- XGMAC_MMC_RXFRAME_GB_LO
 
- XGMAC_MMC_RXJABBER
 
- XGMAC_MMC_RXLENGTHERR
 
- XGMAC_MMC_RXMCFRAME_G
 
- XGMAC_MMC_RXOCTET_GB_HI
 
- XGMAC_MMC_RXOCTET_GB_LO
 
- XGMAC_MMC_RXOCTET_G_HI
 
- XGMAC_MMC_RXOCTET_G_LO
 
- XGMAC_MMC_RXOVERFLOW
 
- XGMAC_MMC_RXPAUSEFRAME
 
- XGMAC_MMC_RXRUNT
 
- XGMAC_MMC_RXUCFRAME_G
 
- XGMAC_MMC_RXVLANFRAME
 
- XGMAC_MMC_RXWATCHDOG
 
- XGMAC_MMC_STAT
 
- XGMAC_MMC_TXBCFRAME_G
 
- XGMAC_MMC_TXBCFRAME_GB
 
- XGMAC_MMC_TXFRAME_GB_HI
 
- XGMAC_MMC_TXFRAME_GB_LO
 
- XGMAC_MMC_TXFRAME_G_HI
 
- XGMAC_MMC_TXFRAME_G_LO
 
- XGMAC_MMC_TXMCFRAME_G
 
- XGMAC_MMC_TXMCFRAME_GB
 
- XGMAC_MMC_TXOCTET_GB_HI
 
- XGMAC_MMC_TXOCTET_GB_LO
 
- XGMAC_MMC_TXOCTET_G_HI
 
- XGMAC_MMC_TXOCTET_G_LO
 
- XGMAC_MMC_TXPAUSEFRAME
 
- XGMAC_MMC_TXUCFRAME_GB
 
- XGMAC_MMC_TXUNDERFLOW
 
- XGMAC_MMC_TXVLANFRAME
 
- XGMAC_MSCIS
 
- XGMAC_MSUIS
 
- XGMAC_MTL_ECC_CONTROL
 
- XGMAC_MTL_ECC_INT_ENABLE
 
- XGMAC_MTL_ECC_INT_STATUS
 
- XGMAC_MTL_INT_STATUS
 
- XGMAC_MTL_IOREAD
 
- XGMAC_MTL_IOREAD_BITS
 
- XGMAC_MTL_IOWRITE
 
- XGMAC_MTL_IOWRITE_BITS
 
- XGMAC_MTL_OPMODE
 
- XGMAC_MTL_QINTEN
 
- XGMAC_MTL_QINT_STATUS
 
- XGMAC_MTL_RXP_CONTROL_STATUS
 
- XGMAC_MTL_RXP_IACC_CTRL_ST
 
- XGMAC_MTL_RXP_IACC_DATA
 
- XGMAC_MTL_RXQ_DMA_MAP0
 
- XGMAC_MTL_RXQ_DMA_MAP1
 
- XGMAC_MTL_RXQ_FLOW_CONTROL
 
- XGMAC_MTL_RXQ_OPMODE
 
- XGMAC_MTL_SAFETY_INT_STATUS
 
- XGMAC_MTL_TCx_ETS_CONTROL
 
- XGMAC_MTL_TCx_HICREDIT
 
- XGMAC_MTL_TCx_LOCREDIT
 
- XGMAC_MTL_TCx_QUANTUM_WEIGHT
 
- XGMAC_MTL_TCx_SENDSLOPE
 
- XGMAC_MTL_TXQ_OPMODE
 
- XGMAC_NIE
 
- XGMAC_NIS
 
- XGMAC_NPE
 
- XGMAC_NUM_HASH
 
- XGMAC_NVE
 
- XGMAC_OB
 
- XGMAC_OMR
 
- XGMAC_OMR_DT
 
- XGMAC_OMR_EFC
 
- XGMAC_OMR_FEF
 
- XGMAC_OMR_FTF
 
- XGMAC_OMR_RFA
 
- XGMAC_OMR_RFA_MASK
 
- XGMAC_OMR_RFD
 
- XGMAC_OMR_RFD_MASK
 
- XGMAC_OMR_RSF
 
- XGMAC_OMR_RTC_256
 
- XGMAC_OMR_RTC_MASK
 
- XGMAC_OMR_TSF
 
- XGMAC_OMR_TTC
 
- XGMAC_OMR_TTC_MASK
 
- XGMAC_OSP
 
- XGMAC_OVF_CNT_REG
 
- XGMAC_OVF_INFO_REG
 
- XGMAC_PACKET_FILTER
 
- XGMAC_PAUSE_CTL_RSP_MODE_B
 
- XGMAC_PAUSE_CTL_RX_B
 
- XGMAC_PAUSE_CTL_TX_B
 
- XGMAC_PAUSE_CTL_TX_XOFF_B
 
- XGMAC_PBLx8
 
- XGMAC_PCS_BASER_SEEDA_0_REG
 
- XGMAC_PCS_BASER_SEEDA_1_REG
 
- XGMAC_PCS_BASER_SEEDB_0_REG
 
- XGMAC_PCS_BASER_SEEDB_1_REG
 
- XGMAC_PCS_BASER_STATUS1_REG
 
- XGMAC_PCS_BASER_STATUS2_REG
 
- XGMAC_PCS_BASER_SYNC_THD_REG
 
- XGMAC_PCS_BASER_TEST_CONTROL_REG
 
- XGMAC_PCS_BASER_TEST_ERR_CNT_REG
 
- XGMAC_PCS_DBG_INFO1_REG
 
- XGMAC_PCS_DBG_INFO2_REG
 
- XGMAC_PCS_DBG_INFO3_REG
 
- XGMAC_PCS_DBG_INFO_REG
 
- XGMAC_PCS_STATUS1_REG
 
- XGMAC_PFC_DATA_LEN
 
- XGMAC_PFC_DELAYS
 
- XGMAC_PLS
 
- XGMAC_PMA_CONTROL_REG
 
- XGMAC_PMA_DBG_INFO_REG
 
- XGMAC_PMA_ENABLE_REG
 
- XGMAC_PMA_FEC_ABILITY_REG
 
- XGMAC_PMA_FEC_CONTROL_REG
 
- XGMAC_PMA_FEC_CORR_BLOCK_CNT__REG
 
- XGMAC_PMA_FEC_CTL_ERR_EN
 
- XGMAC_PMA_FEC_CTL_ERR_SH
 
- XGMAC_PMA_FEC_CTL_RX_B
 
- XGMAC_PMA_FEC_CTL_TX_B
 
- XGMAC_PMA_FEC_UNCORR_BLOCK_CNT__REG
 
- XGMAC_PMA_SIGNAL_STATUS_REG
 
- XGMAC_PMT
 
- XGMAC_PMTIE
 
- XGMAC_PMTIS
 
- XGMAC_PMT_GLBL_UNICAST
 
- XGMAC_PMT_MAGIC_PKT
 
- XGMAC_PMT_MAGIC_PKT_EN
 
- XGMAC_PMT_POINTER_RESET
 
- XGMAC_PMT_POWERDOWN
 
- XGMAC_PMT_WAKEUP_FRM_EN
 
- XGMAC_PMT_WAKEUP_RX_FRM
 
- XGMAC_PORT_CFG2_A
 
- XGMAC_PORT_CFG_A
 
- XGMAC_PORT_EPIO_DATA0_A
 
- XGMAC_PORT_EPIO_DATA1_A
 
- XGMAC_PORT_EPIO_DATA2_A
 
- XGMAC_PORT_EPIO_DATA3_A
 
- XGMAC_PORT_EPIO_OP_A
 
- XGMAC_PORT_INT_CAUSE_A
 
- XGMAC_PORT_MAGIC_MACID_HI
 
- XGMAC_PORT_MAGIC_MACID_LO
 
- XGMAC_PORT_MODE_REG
 
- XGMAC_PORT_MODE_RX_40G_B
 
- XGMAC_PORT_MODE_RX_M
 
- XGMAC_PORT_MODE_RX_S
 
- XGMAC_PORT_MODE_TX_40G_B
 
- XGMAC_PORT_MODE_TX_M
 
- XGMAC_PORT_MODE_TX_S
 
- XGMAC_PPSCMD_START
 
- XGMAC_PPSCMD_STOP
 
- XGMAC_PPSCMDx
 
- XGMAC_PPSEN0
 
- XGMAC_PPS_CONTROL
 
- XGMAC_PPS_MAXIDX
 
- XGMAC_PPS_MINIDX
 
- XGMAC_PPSx_INTERVAL
 
- XGMAC_PPSx_MASK
 
- XGMAC_PPSx_TARGET_TIME_NSEC
 
- XGMAC_PPSx_TARGET_TIME_SEC
 
- XGMAC_PPSx_WIDTH
 
- XGMAC_PRIO_QUEUES
 
- XGMAC_PRTYEN
 
- XGMAC_PSRQ
 
- XGMAC_PSRQ_SHIFT
 
- XGMAC_PSTC
 
- XGMAC_PSTC_SHIFT
 
- XGMAC_PT
 
- XGMAC_PT_SHIFT
 
- XGMAC_PWRDWN
 
- XGMAC_Q2TCMAP
 
- XGMAC_Q2TCMAP_SHIFT
 
- XGMAC_QDDMACH
 
- XGMAC_QxMDMACH
 
- XGMAC_QxMDMACH_SHIFT
 
- XGMAC_Qx_TX_FLOW_CTRL
 
- XGMAC_RAA
 
- XGMAC_RBSZ
 
- XGMAC_RBSZ_SHIFT
 
- XGMAC_RBU
 
- XGMAC_RBUE
 
- XGMAC_RDES2_HL
 
- XGMAC_RDES3_CDA
 
- XGMAC_RDES3_CTXT
 
- XGMAC_RDES3_ES
 
- XGMAC_RDES3_IOC
 
- XGMAC_RDES3_L34T
 
- XGMAC_RDES3_L34T_SHIFT
 
- XGMAC_RDES3_LD
 
- XGMAC_RDES3_OWN
 
- XGMAC_RDES3_PL
 
- XGMAC_RDES3_RSV
 
- XGMAC_RDES3_TSA
 
- XGMAC_RDES3_TSD
 
- XGMAC_RDPS
 
- XGMAC_RD_OSR_LMT
 
- XGMAC_RD_OSR_LMT_SHIFT
 
- XGMAC_REGISTER_END
 
- XGMAC_REGSIZE
 
- XGMAC_REMOTE_WAKE
 
- XGMAC_RESET_REG
 
- XGMAC_RFA
 
- XGMAC_RFA_SHIFT
 
- XGMAC_RFD
 
- XGMAC_RFD_SHIFT
 
- XGMAC_RFE
 
- XGMAC_RF_TX_EN_B
 
- XGMAC_RI
 
- XGMAC_RIE
 
- XGMAC_RLPIEN
 
- XGMAC_RLPIEX
 
- XGMAC_RPCEIE
 
- XGMAC_RQS
 
- XGMAC_RQS_SHIFT
 
- XGMAC_RSF
 
- XGMAC_RSSE
 
- XGMAC_RSSIA_SHIFT
 
- XGMAC_RSS_ADDR
 
- XGMAC_RSS_CTRL
 
- XGMAC_RSS_DATA
 
- XGMAC_RTC
 
- XGMAC_RTC_SHIFT
 
- XGMAC_RWKPKTEN
 
- XGMAC_RWT
 
- XGMAC_RXCEIE
 
- XGMAC_RXOIE
 
- XGMAC_RXOVFIS
 
- XGMAC_RXPI
 
- XGMAC_RXQEN
 
- XGMAC_RXQEN_SHIFT
 
- XGMAC_RXQ_CTRL0
 
- XGMAC_RXQ_CTRL2
 
- XGMAC_RXQ_CTRL3
 
- XGMAC_RXST
 
- XGMAC_RX_1731PKTS
 
- XGMAC_RX_BROADCASTPKTS
 
- XGMAC_RX_CONFIG
 
- XGMAC_RX_EDMA_CTRL
 
- XGMAC_RX_FCSERRPKTS
 
- XGMAC_RX_FLOW_CTRL
 
- XGMAC_RX_FROMAPPBADPKTS
 
- XGMAC_RX_FROMAPPGOODPKTS
 
- XGMAC_RX_GOODOCTETS
 
- XGMAC_RX_GOODPKTS
 
- XGMAC_RX_MACCTRLPKTS
 
- XGMAC_RX_MULTICASTPKTS
 
- XGMAC_RX_PKTSUNDERSIZE
 
- XGMAC_RX_PKTS_1024TO1518OCTETS
 
- XGMAC_RX_PKTS_128TO255OCTETS
 
- XGMAC_RX_PKTS_1519TOMAXOCTETS
 
- XGMAC_RX_PKTS_1519TOMAXOCTETSOK
 
- XGMAC_RX_PKTS_256TO511OCTETS
 
- XGMAC_RX_PKTS_512TO1023OCTETS
 
- XGMAC_RX_PKTS_64OCTETS
 
- XGMAC_RX_PKTS_65TO127OCTETS
 
- XGMAC_RX_PKTS_FRAGMENT
 
- XGMAC_RX_PKTS_JABBER
 
- XGMAC_RX_PKTS_OVERSIZE
 
- XGMAC_RX_PKTS_UNDERMIN
 
- XGMAC_RX_PRI0PAUSEPKTS
 
- XGMAC_RX_PRI1PAUSEPKTS
 
- XGMAC_RX_PRI2PAUSEPKTS
 
- XGMAC_RX_PRI3PAUSEPKTS
 
- XGMAC_RX_PRI4PAUSEPKTS
 
- XGMAC_RX_PRI5PAUSEPKTS
 
- XGMAC_RX_PRI6PAUSEPKTS
 
- XGMAC_RX_PRI7PAUSEPKTS
 
- XGMAC_RX_SYMBOLERRPKTS
 
- XGMAC_RX_TOTALOCTETS
 
- XGMAC_RX_TOTAL_PKTS
 
- XGMAC_RX_UNICASTPKTS
 
- XGMAC_RxPBL
 
- XGMAC_RxPBL_SHIFT
 
- XGMAC_SET_BITS
 
- XGMAC_SET_BITS_LE
 
- XGMAC_SP
 
- XGMAC_SPACING
 
- XGMAC_SPARE_CNT_REG
 
- XGMAC_SPARE_REG
 
- XGMAC_SPH
 
- XGMAC_STARTBUSY
 
- XGMAC_STAT
 
- XGMAC_STATS_LEN
 
- XGMAC_STD_PACKET_MTU
 
- XGMAC_SWR
 
- XGMAC_TBU
 
- XGMAC_TBUE
 
- XGMAC_TCEIE
 
- XGMAC_TCP4TE
 
- XGMAC_TC_PRTY_MAP0
 
- XGMAC_TC_PRTY_MAP1
 
- XGMAC_TDES2_B1L
 
- XGMAC_TDES2_B2L
 
- XGMAC_TDES2_B2L_SHIFT
 
- XGMAC_TDES2_IOC
 
- XGMAC_TDES2_IVT
 
- XGMAC_TDES2_IVT_SHIFT
 
- XGMAC_TDES2_TTSE
 
- XGMAC_TDES2_VTIR
 
- XGMAC_TDES2_VTIR_SHIFT
 
- XGMAC_TDES3_CIC
 
- XGMAC_TDES3_CIC_SHIFT
 
- XGMAC_TDES3_CPC
 
- XGMAC_TDES3_CPC_SHIFT
 
- XGMAC_TDES3_CTXT
 
- XGMAC_TDES3_FD
 
- XGMAC_TDES3_FL
 
- XGMAC_TDES3_IVLTV
 
- XGMAC_TDES3_IVTIR
 
- XGMAC_TDES3_IVTIR_SHIFT
 
- XGMAC_TDES3_LD
 
- XGMAC_TDES3_OWN
 
- XGMAC_TDES3_SAIC
 
- XGMAC_TDES3_SAIC_SHIFT
 
- XGMAC_TDES3_TCMSSV
 
- XGMAC_TDES3_THL
 
- XGMAC_TDES3_THL_SHIFT
 
- XGMAC_TDES3_TPL
 
- XGMAC_TDES3_TSE
 
- XGMAC_TDES3_VLTV
 
- XGMAC_TDES3_VT
 
- XGMAC_TDPS
 
- XGMAC_TFE
 
- XGMAC_TI
 
- XGMAC_TIE
 
- XGMAC_TIMESTAMP_STATUS
 
- XGMAC_TLPIEN
 
- XGMAC_TLPIEX
 
- XGMAC_TMOUTEN
 
- XGMAC_TPS
 
- XGMAC_TQS
 
- XGMAC_TQS_SHIFT
 
- XGMAC_TRGTBUSY0
 
- XGMAC_TRGTMODSELx
 
- XGMAC_TSA
 
- XGMAC_TSE
 
- XGMAC_TSF
 
- XGMAC_TSIE
 
- XGMAC_TT
 
- XGMAC_TTC
 
- XGMAC_TTC_SHIFT
 
- XGMAC_TXCEIE
 
- XGMAC_TXCGE
 
- XGMAC_TXQEN
 
- XGMAC_TXQEN_SHIFT
 
- XGMAC_TXST
 
- XGMAC_TXTIMESTAMP_NSEC
 
- XGMAC_TXTIMESTAMP_SEC
 
- XGMAC_TXTSC
 
- XGMAC_TXTSSTSLO
 
- XGMAC_TXUNFIS
 
- XGMAC_TX_1588PKTS
 
- XGMAC_TX_1731PKTS
 
- XGMAC_TX_BROADCASTPKTS
 
- XGMAC_TX_CONFIG
 
- XGMAC_TX_EDMA_CTRL
 
- XGMAC_TX_ERRALLPKTS
 
- XGMAC_TX_GOODOCTETS
 
- XGMAC_TX_GOODPKTS
 
- XGMAC_TX_MACCTRLPKTS
 
- XGMAC_TX_MULTICASTPKTS
 
- XGMAC_TX_PACE
 
- XGMAC_TX_PKTS_1024TO1518OCTETS
 
- XGMAC_TX_PKTS_128TO255OCTETS
 
- XGMAC_TX_PKTS_1519TOMAXOCTETS
 
- XGMAC_TX_PKTS_1519TOMAXOCTETSOK
 
- XGMAC_TX_PKTS_256TO511OCTETS
 
- XGMAC_TX_PKTS_512TO1023OCTETS
 
- XGMAC_TX_PKTS_64OCTETS
 
- XGMAC_TX_PKTS_65TO127OCTETS
 
- XGMAC_TX_PKTS_FRAGMENT
 
- XGMAC_TX_PKTS_JABBER
 
- XGMAC_TX_PKTS_OVERSIZE
 
- XGMAC_TX_PKTS_UNDERMIN
 
- XGMAC_TX_PKTS_UNDERSIZE
 
- XGMAC_TX_PRI0PAUSEPKTS
 
- XGMAC_TX_PRI1PAUSEPKTS
 
- XGMAC_TX_PRI2PAUSEPKTS
 
- XGMAC_TX_PRI3PAUSEPKTS
 
- XGMAC_TX_PRI4PAUSEPKTS
 
- XGMAC_TX_PRI5PAUSEPKTS
 
- XGMAC_TX_PRI6PAUSEPKTS
 
- XGMAC_TX_PRI7PAUSEPKTS
 
- XGMAC_TX_SENDAPPBADPKTS
 
- XGMAC_TX_SENDAPPGOODPKTS
 
- XGMAC_TX_TOTALOCTETS
 
- XGMAC_TX_TOTAL_PKTS
 
- XGMAC_TX_UNICASTPKTS
 
- XGMAC_TxPBL
 
- XGMAC_TxPBL_SHIFT
 
- XGMAC_UDP4TE
 
- XGMAC_UNDEF
 
- XGMAC_UNIDIR_EN_B
 
- XGMAC_VERSION
 
- XGMAC_VLAN_CSVL
 
- XGMAC_VLAN_DOVLTC
 
- XGMAC_VLAN_EDVLP
 
- XGMAC_VLAN_ESVL
 
- XGMAC_VLAN_ETV
 
- XGMAC_VLAN_HASH
 
- XGMAC_VLAN_HASH_TABLE
 
- XGMAC_VLAN_INCL
 
- XGMAC_VLAN_TAG
 
- XGMAC_VLAN_VID
 
- XGMAC_VLAN_VLC
 
- XGMAC_VLAN_VLC_SHIFT
 
- XGMAC_VLAN_VLTI
 
- XGMAC_VLAN_VTHM
 
- XGMAC_WFQ
 
- XGMAC_WRR
 
- XGMAC_WRRDN
 
- XGMAC_WR_OSR_LMT
 
- XGMAC_WR_OSR_LMT_SHIFT
 
- XGMAC_XB
 
- XGMII_LINK_MAC_MAC_FORCED
 
- XGMII_LINK_MAC_PHY
 
- XGMI_HWID
 
- XGMI_LINK_RATE_12
 
- XGMI_LINK_RATE_16
 
- XGMI_LINK_RATE_22
 
- XGMI_LINK_RATE_25
 
- XGMI_LINK_RATE_COUNT
 
- XGMI_LINK_RATE_e
 
- XGMI_LINK_WIDTH_16
 
- XGMI_LINK_WIDTH_2
 
- XGMI_LINK_WIDTH_4
 
- XGMI_LINK_WIDTH_8
 
- XGMI_LINK_WIDTH_COUNT
 
- XGMI_LINK_WIDTH_e
 
- XGMI_STATE_D0
 
- XGMI_STATE_D3
 
- XGM_EXTRA_INTR_MASK
 
- XGM_INTR_FATAL
 
- XGM_INTR_MASK
 
- XGM_REG
 
- XGPIO_CHANNEL_OFFSET
 
- XGPIO_DATA_OFFSET
 
- XGPIO_TRI_OFFSET
 
- XGXS_EXT_PHY_ADDR
 
- XGXS_EXT_PHY_TYPE
 
- XGXS_INT_MASK_RXGXS
 
- XGXS_INT_MASK_TXGXS
 
- XGXS_INT_STATUS_RXGXS
 
- XGXS_INT_STATUS_TXGXS
 
- XGXS_RESET_BITS
 
- XGXS_RST_N_LBN
 
- XG_CFG_BYPASS_ADDR
 
- XG_CFG_LINK_AGGR_RESUME_0_ADDR
 
- XG_DEBUG_REG_ADDR
 
- XG_DEF_PAUSE_OFF_THRES
 
- XG_DEF_PAUSE_THRES
 
- XG_ENET_SPARE_CFG_REG_1_ADDR
 
- XG_ENET_SPARE_CFG_REG_ADDR
 
- XG_LINK_DOWN
 
- XG_LINK_DOWN_P3
 
- XG_LINK_DOWN_P3P
 
- XG_LINK_STATE_P3
 
- XG_LINK_STATE_P3P
 
- XG_LINK_STATE_P3P_MASK
 
- XG_LINK_STATE_P3_MASK
 
- XG_LINK_STATUS_ADDR
 
- XG_LINK_UP
 
- XG_LINK_UP_P3
 
- XG_LINK_UP_P3P
 
- XG_MCX_ECM_CFG_0_ADDR
 
- XG_MCX_ECM_CONFIG0_REG_0_ADDR
 
- XG_MCX_ICM_CONFIG0_REG_0_ADDR
 
- XG_MCX_ICM_CONFIG2_REG_0_ADDR
 
- XG_MCX_ICM_ECM_DROP_COUNT_REG0_ADDR
 
- XG_MCX_MULTI_DPF0_ADDR
 
- XG_MCX_MULTI_DPF1_ADDR
 
- XG_MCX_RX_DV_GATE_REG_0_ADDR
 
- XG_RSIF_CLE_BUFF_THRESH
 
- XG_RSIF_CONFIG1_REG_ADDR
 
- XG_RSIF_CONFIG_REG_ADDR
 
- XG_RSIF_PLC_CLE_BUFF_THRESH
 
- XG_RXBUF_PAUSE_THRESH
 
- XG_SERDES_ADDR
 
- XG_SERDES_ADDR_R
 
- XG_SERDES_ADDR_RDY
 
- XG_SERDES_ADDR_STS
 
- XG_SERDES_ADDR_XAUI_PWR_DOWN
 
- XG_SERDES_ADDR_XFI1_PWR_UP
 
- XG_SERDES_ADDR_XFI2_PWR_UP
 
- XG_SERDES_DATA
 
- XG_SERDES_XAUI_AN_COUNT
 
- XG_SERDES_XAUI_AN_END
 
- XG_SERDES_XAUI_AN_START
 
- XG_SERDES_XAUI_HSS_PCS_COUNT
 
- XG_SERDES_XAUI_HSS_PCS_END
 
- XG_SERDES_XAUI_HSS_PCS_START
 
- XG_SERDES_XFI_AN_COUNT
 
- XG_SERDES_XFI_AN_END
 
- XG_SERDES_XFI_AN_START
 
- XG_SERDES_XFI_HSS_PCS_COUNT
 
- XG_SERDES_XFI_HSS_PCS_END
 
- XG_SERDES_XFI_HSS_PCS_START
 
- XG_SERDES_XFI_HSS_PLL_COUNT
 
- XG_SERDES_XFI_HSS_PLL_END
 
- XG_SERDES_XFI_HSS_PLL_START
 
- XG_SERDES_XFI_HSS_RX_COUNT
 
- XG_SERDES_XFI_HSS_RX_END
 
- XG_SERDES_XFI_HSS_RX_START
 
- XG_SERDES_XFI_HSS_TX_COUNT
 
- XG_SERDES_XFI_HSS_TX_END
 
- XG_SERDES_XFI_HSS_TX_START
 
- XG_SERDES_XFI_TRAIN_COUNT
 
- XG_SERDES_XFI_TRAIN_END
 
- XG_SERDES_XFI_TRAIN_START
 
- XG_START_BP_BUFNUM_1
 
- XG_START_CPU_BUFNUM_1
 
- XG_START_ETH_BUFNUM_1
 
- XG_START_RING_NUM_1
 
- XG_TSIF_MSS_REG0_ADDR
 
- XHCI_AMD_0x96_HOST
 
- XHCI_AMD_PLL_FIX
 
- XHCI_ASMEDIA_MODIFY_FLOWCONTROL
 
- XHCI_AVOID_BEI
 
- XHCI_BLC
 
- XHCI_BROKEN_MSI
 
- XHCI_BROKEN_PORT_PED
 
- XHCI_BROKEN_STREAMS
 
- XHCI_CFC_DELAY
 
- XHCI_CMD_DEFAULT_TIMEOUT
 
- XHCI_CMD_EIE
 
- XHCI_CMD_EWE
 
- XHCI_CMD_HSEIE
 
- XHCI_CMD_OFFSET
 
- XHCI_CMD_RUN
 
- XHCI_COMP_MODE_QUIRK
 
- XHCI_CTX_TYPE_DEVICE
 
- XHCI_CTX_TYPE_INPUT
 
- XHCI_DEFAULT_BESL
 
- XHCI_DEFAULT_PM_RUNTIME_ALLOW
 
- XHCI_EP_LIMIT_QUIRK
 
- XHCI_EXT_CAPS_DEBUG
 
- XHCI_EXT_CAPS_ID
 
- XHCI_EXT_CAPS_LEGACY
 
- XHCI_EXT_CAPS_NEXT
 
- XHCI_EXT_CAPS_PM
 
- XHCI_EXT_CAPS_PROTOCOL
 
- XHCI_EXT_CAPS_ROUTE
 
- XHCI_EXT_CAPS_VAL
 
- XHCI_EXT_CAPS_VENDOR_INTEL
 
- XHCI_EXT_CAPS_VIRT
 
- XHCI_EXT_PORT_COUNT
 
- XHCI_EXT_PORT_LP
 
- XHCI_EXT_PORT_MAJOR
 
- XHCI_EXT_PORT_MINOR
 
- XHCI_EXT_PORT_OFF
 
- XHCI_EXT_PORT_PFD
 
- XHCI_EXT_PORT_PLT
 
- XHCI_EXT_PORT_PSIC
 
- XHCI_EXT_PORT_PSIE
 
- XHCI_EXT_PORT_PSIM
 
- XHCI_EXT_PORT_PSIV
 
- XHCI_HCC_EXT_CAPS
 
- XHCI_HCC_PARAMS_OFFSET
 
- XHCI_HC_BIOS_OWNED
 
- XHCI_HC_LENGTH
 
- XHCI_HC_OS_OWNED
 
- XHCI_HLC
 
- XHCI_HW_LPM_DISABLE
 
- XHCI_INTEL_HOST
 
- XHCI_INTEL_USB_ROLE_SW
 
- XHCI_IRQS
 
- XHCI_L1C
 
- XHCI_L1_TIMEOUT
 
- XHCI_LEGACY_CONTROL_OFFSET
 
- XHCI_LEGACY_DISABLE_SMI
 
- XHCI_LEGACY_SMI_EVENTS
 
- XHCI_LEGACY_SUPPORT_OFFSET
 
- XHCI_LIMIT_ENDPOINT_INTERVAL_7
 
- XHCI_LINK_TRB_QUIRK
 
- XHCI_LPM_SUPPORT
 
- XHCI_MAX_EXT_CAPS
 
- XHCI_MAX_HALT_USEC
 
- XHCI_MAX_INTERVAL
 
- XHCI_MAX_PORTS
 
- XHCI_MAX_REXIT_TIMEOUT_MS
 
- XHCI_MISSING_CAS
 
- XHCI_MSG_MAX
 
- XHCI_MTK_HOST
 
- XHCI_MTK_MAX_ESIT
 
- XHCI_NEC_HOST
 
- XHCI_NO_64BIT_SUPPORT
 
- XHCI_PLAT
 
- XHCI_PME_STUCK_QUIRK
 
- XHCI_PORT_POLLING_LFPS_TIME
 
- XHCI_PORT_RO
 
- XHCI_PORT_RW
 
- XHCI_PORT_RW1CS
 
- XHCI_PORT_RW1S
 
- XHCI_PORT_RWS
 
- XHCI_PORT_RZ
 
- XHCI_RCAR_FIRMWARE_NAME_V1
 
- XHCI_RCAR_FIRMWARE_NAME_V2
 
- XHCI_RCAR_FIRMWARE_NAME_V3
 
- XHCI_RESET_EP_QUIRK
 
- XHCI_RESET_ON_RESUME
 
- XHCI_RESET_PLL_ON_DISCONNECT
 
- XHCI_REVISION
 
- XHCI_SBRN_OFFSET
 
- XHCI_SLOW_SUSPEND
 
- XHCI_SNPS_BROKEN_SUSPEND
 
- XHCI_SPURIOUS_REBOOT
 
- XHCI_SPURIOUS_SUCCESS
 
- XHCI_SPURIOUS_WAKEUP
 
- XHCI_SSIC_PORT_UNUSED
 
- XHCI_STATE_DYING
 
- XHCI_STATE_HALTED
 
- XHCI_STATE_REMOVING
 
- XHCI_STOP_EP_CMD_TIMEOUT
 
- XHCI_STS_CNR
 
- XHCI_STS_HALT
 
- XHCI_STS_OFFSET
 
- XHCI_SUSPEND_DELAY
 
- XHCI_SW_BW_CHECKING
 
- XHCI_TRUST_TX_LENGTH
 
- XHCI_U2_DISABLE_WAKE
 
- XHCI_ZERO_64B_REGS
 
- XHFC_IRQ
 
- XHFC_MEMBASE
 
- XHFC_MEMSIZE
 
- XHFC_OFFSET
 
- XHG_AG
 
- XHG_FS
 
- XHG_INO
 
- XHG_RT
 
- XHI_BRAM_OFFSET_REG_OFFSET
 
- XHI_BUFFER_OVERFLOW_ERROR
 
- XHI_BUFFER_START
 
- XHI_CMD_AGHIGH
 
- XHI_CMD_CRCC
 
- XHI_CMD_DESYNCH
 
- XHI_CMD_DGHIGH
 
- XHI_CMD_GCAPTURE
 
- XHI_CMD_GRESTORE
 
- XHI_CMD_IPROG
 
- XHI_CMD_LTIMER
 
- XHI_CMD_MFW
 
- XHI_CMD_NULL
 
- XHI_CMD_RCAP
 
- XHI_CMD_RCFG
 
- XHI_CMD_RCRC
 
- XHI_CMD_SHUTDOWN
 
- XHI_CMD_START
 
- XHI_CMD_SWITCH
 
- XHI_CMD_WCFG
 
- XHI_CONFIGURE
 
- XHI_CR_FIFO_CLR_MASK
 
- XHI_CR_OFFSET
 
- XHI_CR_READ_MASK
 
- XHI_CR_SW_RESET_MASK
 
- XHI_CR_WRITE_MASK
 
- XHI_CYCLE_DONE
 
- XHI_CYCLE_EXECUTING
 
- XHI_DEVICE_READ
 
- XHI_DEVICE_READ_ERROR
 
- XHI_DEVICE_WRITE
 
- XHI_DEVICE_WRITE_ERROR
 
- XHI_DISABLED_AUTO_CRC
 
- XHI_DUMMY_PACKET
 
- XHI_FAR_BRAM_BLOCK
 
- XHI_FAR_BRAM_INT_BLOCK
 
- XHI_FAR_CLB_BLOCK
 
- XHI_FINISHED
 
- XHI_GIER_GIE_MASK
 
- XHI_GIER_OFFSET
 
- XHI_IPIER_OFFSET
 
- XHI_IPISR_OFFSET
 
- XHI_IPIXR_ALL_MASK
 
- XHI_IPIXR_RDP_MASK
 
- XHI_IPIXR_RFULL_MASK
 
- XHI_IPIXR_WEMPTY_MASK
 
- XHI_IPIXR_WRP_MASK
 
- XHI_MAX_BUFFER_BYTES
 
- XHI_MAX_BUFFER_INTS
 
- XHI_MAX_READ_TRANSACTION_WORDS
 
- XHI_MAX_RETRIES
 
- XHI_NOOP_PACKET
 
- XHI_NOT_FINISHED
 
- XHI_OP_MASK
 
- XHI_OP_READ
 
- XHI_OP_SHIFT
 
- XHI_OP_WRITE
 
- XHI_PAD_FRAMES
 
- XHI_READBACK
 
- XHI_REGISTER_MASK
 
- XHI_REGISTER_SHIFT
 
- XHI_RFO_MAX_OCCUPANCY
 
- XHI_RFO_OFFSET
 
- XHI_RF_OFFSET
 
- XHI_RNC_REG_OFFSET
 
- XHI_SIZE_REG_OFFSET
 
- XHI_SR_CFGERR_N_MASK
 
- XHI_SR_DALIGN_MASK
 
- XHI_SR_DONE_MASK
 
- XHI_SR_IN_ABORT_N_MASK
 
- XHI_SR_OFFSET
 
- XHI_SR_RIP_MASK
 
- XHI_STATUS_REG_OFFSET
 
- XHI_SYNC_PACKET
 
- XHI_SZ_OFFSET
 
- XHI_TYPE2_CNT_MASK
 
- XHI_TYPE_1
 
- XHI_TYPE_1_HEADER_BYTES
 
- XHI_TYPE_1_PACKET_MAX_WORDS
 
- XHI_TYPE_2
 
- XHI_TYPE_2_HEADER_BYTES
 
- XHI_TYPE_2_READ
 
- XHI_TYPE_2_WRITE
 
- XHI_TYPE_MASK
 
- XHI_TYPE_SHIFT
 
- XHI_WFO_MAX_VACANCY
 
- XHI_WFV_OFFSET
 
- XHI_WF_OFFSET
 
- XHI_WORD_COUNT_MASK_TYPE_1
 
- XHI_WORD_COUNT_MASK_TYPE_2
 
- XHLOCK_CTX_NR
 
- XHLOCK_HARD
 
- XHLOCK_SOFT
 
- XHWICAP_MAJOR
 
- XHWICAP_MINOR
 
- XI2C_GET_BITS
 
- XI2C_IOREAD
 
- XI2C_IOREAD_BITS
 
- XI2C_IOWRITE
 
- XI2C_IOWRITE_BITS
 
- XI2C_SET_BITS
 
- XIAOMI_DEVICE
 
- XIAOMI_KEY_CAPSLOCK
 
- XIAOMI_KEY_FN_ESC_0
 
- XIAOMI_KEY_FN_ESC_1
 
- XIAOMI_KEY_FN_F7
 
- XIAOMI_KEY_FN_FN
 
- XICS_DBG
 
- XICS_DUMMY
 
- XICS_IPI
 
- XICS_IRQ_SPURIOUS
 
- XICS_MFRR
 
- XICS_RM_CHECK_RESEND
 
- XICS_RM_KICK_VCPU
 
- XICS_RM_NOTIFY_EOI
 
- XICS_XIRR
 
- XID
 
- XID2_0
 
- XID2_7
 
- XID2_LENGTH
 
- XID2_READ_SIDE
 
- XID2_WRITE_SIDE
 
- XIDF_ELEMENT_SIZE
 
- XID_FM2
 
- XID_RB_EQUAL
 
- XID_RB_LEFT
 
- XID_RB_RIGHT
 
- XIFC
 
- XIFLanceIPG0
 
- XIFLanceMode
 
- XIFLoopback
 
- XIFS_TIME_CFG
 
- XIFS_TIME_CFG_BB_RXEND_ENABLE
 
- XIFS_TIME_CFG_CCKM_SIFS_TIME
 
- XIFS_TIME_CFG_EIFS
 
- XIFS_TIME_CFG_OFDM_SIFS_TIME
 
- XIFS_TIME_CFG_OFDM_XIFS_TIME
 
- XIF_GET_IPATARI
 
- XIF_GET_IPHOST
 
- XIF_GET_MAC
 
- XIF_GET_NETMASK
 
- XIF_INTLEVEL
 
- XIF_IRQ
 
- XIF_READBLOCK
 
- XIF_READLENGTH
 
- XIF_START
 
- XIF_STOP
 
- XIF_WRITEBLOCK
 
- XIICEND
 
- XIICOFFSET
 
- XIIC_ADR_REG_OFFSET
 
- XIIC_CR_DIR_IS_TX_MASK
 
- XIIC_CR_ENABLE_DEVICE_MASK
 
- XIIC_CR_GENERAL_CALL_MASK
 
- XIIC_CR_MSMS_MASK
 
- XIIC_CR_NO_ACK_MASK
 
- XIIC_CR_REG_OFFSET
 
- XIIC_CR_REPEATED_START_MASK
 
- XIIC_CR_TX_FIFO_RESET_MASK
 
- XIIC_DGIER_OFFSET
 
- XIIC_DRR_REG_OFFSET
 
- XIIC_DTR_REG_OFFSET
 
- XIIC_GINTR_ENABLE_MASK
 
- XIIC_GPO_REG_OFFSET
 
- XIIC_IIER_OFFSET
 
- XIIC_IISR_OFFSET
 
- XIIC_INTR_AAS_MASK
 
- XIIC_INTR_ARB_LOST_MASK
 
- XIIC_INTR_BNB_MASK
 
- XIIC_INTR_NAAS_MASK
 
- XIIC_INTR_RX_FULL_MASK
 
- XIIC_INTR_TX_EMPTY_MASK
 
- XIIC_INTR_TX_ERROR_MASK
 
- XIIC_INTR_TX_HALF_MASK
 
- XIIC_MSB_OFFSET
 
- XIIC_PM_TIMEOUT
 
- XIIC_REG_OFFSET
 
- XIIC_RESETR_OFFSET
 
- XIIC_RESET_MASK
 
- XIIC_RFD_REG_OFFSET
 
- XIIC_RFO_REG_OFFSET
 
- XIIC_SR_ADDR_AS_SLAVE_MASK
 
- XIIC_SR_BUS_BUSY_MASK
 
- XIIC_SR_GEN_CALL_MASK
 
- XIIC_SR_MSTR_RDING_SLAVE_MASK
 
- XIIC_SR_REG_OFFSET
 
- XIIC_SR_RX_FIFO_EMPTY_MASK
 
- XIIC_SR_RX_FIFO_FULL_MASK
 
- XIIC_SR_TX_FIFO_EMPTY_MASK
 
- XIIC_SR_TX_FIFO_FULL_MASK
 
- XIIC_TBA_REG_OFFSET
 
- XIIC_TFO_REG_OFFSET
 
- XIIC_TX_DYN_START_MASK
 
- XIIC_TX_DYN_STOP_MASK
 
- XIIC_TX_INTERRUPTS
 
- XIIC_TX_RX_INTERRUPTS
 
- XILINX_AXIENET_H
 
- XILINX_BUFFER_ICAP_H_
 
- XILINX_CDMA_CR_SGMODE
 
- XILINX_CDMA_REG_DSTADDR
 
- XILINX_CDMA_REG_SRCADDR
 
- XILINX_DMA_BD_EOP
 
- XILINX_DMA_BD_HSIZE_MASK
 
- XILINX_DMA_BD_SOP
 
- XILINX_DMA_BD_STRIDE_MASK
 
- XILINX_DMA_BD_STRIDE_SHIFT
 
- XILINX_DMA_BD_TDEST_MASK
 
- XILINX_DMA_BD_VSIZE_MASK
 
- XILINX_DMA_BD_VSIZE_SHIFT
 
- XILINX_DMA_COALESCE_MAX
 
- XILINX_DMA_CR_COALESCE_MAX
 
- XILINX_DMA_CR_COALESCE_SHIFT
 
- XILINX_DMA_CR_CYCLIC_BD_EN_MASK
 
- XILINX_DMA_DMACR_CIRC_EN
 
- XILINX_DMA_DMACR_DELAY_MASK
 
- XILINX_DMA_DMACR_DELAY_MAX
 
- XILINX_DMA_DMACR_DELAY_SHIFT
 
- XILINX_DMA_DMACR_DLY_CNT_IRQ
 
- XILINX_DMA_DMACR_ERR_IRQ
 
- XILINX_DMA_DMACR_FRAMECNT_EN
 
- XILINX_DMA_DMACR_FRAME_COUNT_MASK
 
- XILINX_DMA_DMACR_FRAME_COUNT_MAX
 
- XILINX_DMA_DMACR_FRAME_COUNT_SHIFT
 
- XILINX_DMA_DMACR_FRM_CNT_IRQ
 
- XILINX_DMA_DMACR_FSYNCSRC_MASK
 
- XILINX_DMA_DMACR_FSYNCSRC_SHIFT
 
- XILINX_DMA_DMACR_GENLOCK_EN
 
- XILINX_DMA_DMACR_MASTER_MASK
 
- XILINX_DMA_DMACR_MASTER_SHIFT
 
- XILINX_DMA_DMACR_RESET
 
- XILINX_DMA_DMACR_RUNSTOP
 
- XILINX_DMA_DMASR_ALL_ERR_MASK
 
- XILINX_DMA_DMASR_DELAY_MASK
 
- XILINX_DMA_DMASR_DLY_CNT_IRQ
 
- XILINX_DMA_DMASR_DMA_DEC_ERR
 
- XILINX_DMA_DMASR_DMA_INT_ERR
 
- XILINX_DMA_DMASR_DMA_SLAVE_ERR
 
- XILINX_DMA_DMASR_EOF_EARLY_ERR
 
- XILINX_DMA_DMASR_EOL_LATE_ERR
 
- XILINX_DMA_DMASR_ERR_IRQ
 
- XILINX_DMA_DMASR_ERR_RECOVER_MASK
 
- XILINX_DMA_DMASR_FRAME_COUNT_MASK
 
- XILINX_DMA_DMASR_FRM_CNT_IRQ
 
- XILINX_DMA_DMASR_HALTED
 
- XILINX_DMA_DMASR_IDLE
 
- XILINX_DMA_DMASR_SG_DEC_ERR
 
- XILINX_DMA_DMASR_SG_MASK
 
- XILINX_DMA_DMASR_SG_SLV_ERR
 
- XILINX_DMA_DMASR_SOF_EARLY_ERR
 
- XILINX_DMA_DMASR_SOF_LATE_ERR
 
- XILINX_DMA_DMAXR_ALL_IRQ_MASK
 
- XILINX_DMA_FLUSH_BOTH
 
- XILINX_DMA_FLUSH_MM2S
 
- XILINX_DMA_FLUSH_S2MM
 
- XILINX_DMA_FRMDLY_STRIDE_FRMDLY_SHIFT
 
- XILINX_DMA_FRMDLY_STRIDE_STRIDE_SHIFT
 
- XILINX_DMA_LOOP_COUNT
 
- XILINX_DMA_MAX_CHANS_PER_DEVICE
 
- XILINX_DMA_MAX_TRANS_LEN_MAX
 
- XILINX_DMA_MAX_TRANS_LEN_MIN
 
- XILINX_DMA_MCRX_CDESC
 
- XILINX_DMA_MCRX_TDESC
 
- XILINX_DMA_MM2S_CTRL_OFFSET
 
- XILINX_DMA_NUM_APP_WORDS
 
- XILINX_DMA_NUM_DESCS
 
- XILINX_DMA_PARK_PTR_RD_REF_MASK
 
- XILINX_DMA_PARK_PTR_RD_REF_SHIFT
 
- XILINX_DMA_PARK_PTR_WR_REF_MASK
 
- XILINX_DMA_PARK_PTR_WR_REF_SHIFT
 
- XILINX_DMA_REG_BTT
 
- XILINX_DMA_REG_CURDESC
 
- XILINX_DMA_REG_DMACR
 
- XILINX_DMA_REG_DMASR
 
- XILINX_DMA_REG_FRMDLY_STRIDE
 
- XILINX_DMA_REG_FRMPTR_STS
 
- XILINX_DMA_REG_FRMSTORE
 
- XILINX_DMA_REG_HSIZE
 
- XILINX_DMA_REG_PARK_PTR
 
- XILINX_DMA_REG_REG_INDEX
 
- XILINX_DMA_REG_SRCDSTADDR
 
- XILINX_DMA_REG_TAILDESC
 
- XILINX_DMA_REG_THRESHOLD
 
- XILINX_DMA_REG_VDMA_VERSION
 
- XILINX_DMA_REG_VSIZE
 
- XILINX_DMA_S2MM_CTRL_OFFSET
 
- XILINX_DMA_V2_MAX_TRANS_LEN_MAX
 
- XILINX_DOWNLOAD_RESET
 
- XILINX_FIFO_ICAP_H_
 
- XILINX_GMII2RGMII_REG
 
- XILINX_GMII2RGMII_SPEED_MASK
 
- XILINX_HWICAP_H_
 
- XILINX_LL_TEMAC_H
 
- XILINX_NUM_MSI_IRQS
 
- XILINX_OF_PLATFORM_DRIVER
 
- XILINX_PCIE_BIR_ECAM_SZ_MASK
 
- XILINX_PCIE_BIR_ECAM_SZ_SHIFT
 
- XILINX_PCIE_IDR_ALL_MASK
 
- XILINX_PCIE_IMR_ALL_MASK
 
- XILINX_PCIE_IMR_ENABLE_MASK
 
- XILINX_PCIE_INTR_CFG_TIMEOUT
 
- XILINX_PCIE_INTR_CORRECTABLE
 
- XILINX_PCIE_INTR_ECRC_ERR
 
- XILINX_PCIE_INTR_FATAL
 
- XILINX_PCIE_INTR_HOT_RESET
 
- XILINX_PCIE_INTR_INTX
 
- XILINX_PCIE_INTR_LINK_DOWN
 
- XILINX_PCIE_INTR_MSI
 
- XILINX_PCIE_INTR_MST_DECERR
 
- XILINX_PCIE_INTR_MST_ERRP
 
- XILINX_PCIE_INTR_MST_SLVERR
 
- XILINX_PCIE_INTR_NONFATAL
 
- XILINX_PCIE_INTR_SLV_CMPABT
 
- XILINX_PCIE_INTR_SLV_COMPL
 
- XILINX_PCIE_INTR_SLV_ERRP
 
- XILINX_PCIE_INTR_SLV_ILLBUR
 
- XILINX_PCIE_INTR_SLV_UNEXP
 
- XILINX_PCIE_INTR_SLV_UNSUPP
 
- XILINX_PCIE_INTR_STR_ERR
 
- XILINX_PCIE_REG_BIR
 
- XILINX_PCIE_REG_IDR
 
- XILINX_PCIE_REG_IMR
 
- XILINX_PCIE_REG_MSIBASE1
 
- XILINX_PCIE_REG_MSIBASE2
 
- XILINX_PCIE_REG_PSCR
 
- XILINX_PCIE_REG_PSCR_LNKUP
 
- XILINX_PCIE_REG_RPEFR
 
- XILINX_PCIE_REG_RPIFR1
 
- XILINX_PCIE_REG_RPIFR2
 
- XILINX_PCIE_REG_RPSC
 
- XILINX_PCIE_REG_RPSC_BEN
 
- XILINX_PCIE_RPEFR_ALL_MASK
 
- XILINX_PCIE_RPEFR_ERR_VALID
 
- XILINX_PCIE_RPEFR_REQ_ID
 
- XILINX_PCIE_RPIFR1_ALL_MASK
 
- XILINX_PCIE_RPIFR1_INTR_MASK
 
- XILINX_PCIE_RPIFR1_INTR_SHIFT
 
- XILINX_PCIE_RPIFR1_INTR_VALID
 
- XILINX_PCIE_RPIFR1_MSI_INTR
 
- XILINX_PCIE_RPIFR2_MSG_DATA
 
- XILINX_POLL_ITERATIONS
 
- XILINX_POLL_NO_SLEEP
 
- XILINX_PRESUMED_VERSION
 
- XILINX_SPI_MAX_CS
 
- XILINX_SPI_NAME
 
- XILINX_TIMEOUT_MS
 
- XILINX_VDMA_ENABLE_VERTICAL_FLIP
 
- XILINX_VDMA_MM2S_DESC_OFFSET
 
- XILINX_VDMA_REG_ENABLE_VERTICAL_FLIP
 
- XILINX_VDMA_REG_START_ADDRESS
 
- XILINX_VDMA_REG_START_ADDRESS_64
 
- XILINX_VDMA_S2MM_DESC_OFFSET
 
- XILINX_VERINT
 
- XILINX_ZYNQMP_PM_FPGA_FULL
 
- XILINX_ZYNQMP_PM_FPGA_PARTIAL
 
- XILLYMSG_OPCODE_FATAL_ERROR
 
- XILLYMSG_OPCODE_FIFOEOF
 
- XILLYMSG_OPCODE_NONEMPTY
 
- XILLYMSG_OPCODE_QUIESCEACK
 
- XILLYMSG_OPCODE_RELEASEBUF
 
- XILLY_RX_TIMEOUT
 
- XILLY_TIMEOUT
 
- XIN
 
- XIN24M_DIV
 
- XINTM
 
- XIN_AXI_BLOCKS
 
- XIN_CORE_BLOCKS
 
- XIO2001
 
- XIOEN
 
- XIO_ADDR
 
- XIO_ADDR_BITS
 
- XIO_NOWHERE
 
- XIO_PACK
 
- XIO_PACKED
 
- XIO_PORT
 
- XIO_PORT_BITS
 
- XIO_PORT_SHIFT
 
- XIPIF_V123B_DGIER_OFFSET
 
- XIPIF_V123B_GINTR_ENABLE
 
- XIPIF_V123B_IIER_OFFSET
 
- XIPIF_V123B_IISR_OFFSET
 
- XIPIF_V123B_RESETR_OFFSET
 
- XIPIF_V123B_RESET_MASK
 
- XIP_INVAL_CACHED_RANGE
 
- XIP_START
 
- XIP_VIRT_ADDR
 
- XIRCOM
 
- XIRCOM_FAKE_ID
 
- XIRCOM_FAKE_ID_2
 
- XIRCOM_VENDOR_ID
 
- XIRCREG0_DO
 
- XIRCREG0_PTR
 
- XIRCREG0_RBC
 
- XIRCREG0_RSR
 
- XIRCREG0_TRS
 
- XIRCREG0_TSO
 
- XIRCREG1_ECR
 
- XIRCREG1_IMR0
 
- XIRCREG1_IMR1
 
- XIRCREG2_GPR2
 
- XIRCREG2_LED
 
- XIRCREG2_MSR
 
- XIRCREG2_RBS
 
- XIRCREG40_CMD0
 
- XIRCREG40_RMASK0
 
- XIRCREG40_RXST0
 
- XIRCREG40_TMASK0
 
- XIRCREG40_TMASK1
 
- XIRCREG40_TXST0
 
- XIRCREG40_TXST1
 
- XIRCREG42_BOC
 
- XIRCREG42_SWC0
 
- XIRCREG42_SWC1
 
- XIRCREG44_RXBC_HI
 
- XIRCREG44_RXBC_LO
 
- XIRCREG44_TDR0
 
- XIRCREG44_TDR1
 
- XIRCREG45_REV
 
- XIRCREG4_BOV
 
- XIRCREG4_GPR0
 
- XIRCREG4_GPR1
 
- XIRCREG4_LMA
 
- XIRCREG4_LMD
 
- XIRCREG50_IA
 
- XIRCREG5_RHSA0
 
- XIRCREG_CR
 
- XIRCREG_EDP
 
- XIRCREG_ESR
 
- XIRCREG_ISR
 
- XIRCREG_PR
 
- XIR_CBE
 
- XIR_CE
 
- XIR_CE2
 
- XIR_CE3
 
- XIR_CEM
 
- XIR_CEM2
 
- XIR_CEM3
 
- XIR_CEM33
 
- XIR_CEM56
 
- XIR_CEM56M
 
- XIR_CG
 
- XIR_CM28
 
- XIR_CM33
 
- XIR_CM56
 
- XIR_UNKNOWN
 
- XISEL
 
- XISEL_MASK
 
- XIVE_BAD_IRQ
 
- XIVE_DUMP_EMU_STATE
 
- XIVE_DUMP_TM_HYP
 
- XIVE_DUMP_TM_OS
 
- XIVE_DUMP_TM_POOL
 
- XIVE_DUMP_TM_USER
 
- XIVE_DUMP_VP
 
- XIVE_EQ_ALWAYS_NOTIFY
 
- XIVE_ESB_FLAG_STORE
 
- XIVE_ESB_GET
 
- XIVE_ESB_INVALID
 
- XIVE_ESB_LOAD_EOI
 
- XIVE_ESB_SET_PQ_00
 
- XIVE_ESB_SET_PQ_01
 
- XIVE_ESB_SET_PQ_10
 
- XIVE_ESB_SET_PQ_11
 
- XIVE_ESB_STORE_EOI
 
- XIVE_ESB_VAL_P
 
- XIVE_ESB_VAL_Q
 
- XIVE_INVALID_CHIP_ID
 
- XIVE_INVALID_TARGET
 
- XIVE_INVALID_VP
 
- XIVE_IRQ_FLAG_EOI_FW
 
- XIVE_IRQ_FLAG_H_INT_ESB
 
- XIVE_IRQ_FLAG_LSI
 
- XIVE_IRQ_FLAG_MASK_FW
 
- XIVE_IRQ_FLAG_SHIFT_BUG
 
- XIVE_IRQ_FLAG_STORE_EOI
 
- XIVE_IRQ_NO_EOI
 
- XIVE_MAX_IRQ
 
- XIVE_MAX_QUEUES
 
- XIVE_Q_GAP
 
- XIVE_RUNTIME_CHECKS
 
- XIVE_SRC_H_INT_ESB
 
- XIVE_SRC_LSI
 
- XIVE_SRC_MASK
 
- XIVE_SRC_SET_EISN
 
- XIVE_SRC_STORE_EOI
 
- XIVE_SRC_TRIGGER
 
- XIVE_SYNC_EAS
 
- XIVE_SYNC_QUEUE
 
- XKPHYS
 
- XKPHYS_TO_PHYS
 
- XKSEG
 
- XKSSEG
 
- XKUSEG
 
- XL
 
- XLATE
 
- XLATE_DATA
 
- XLATE_INST
 
- XLATE_READ
 
- XLATE_SIZE
 
- XLATE_WRITE
 
- XLBB_MASK
 
- XLBH_MASK
 
- XLBOBB_MASK
 
- XLBOBIBB_MASK
 
- XLBOCBBB_MASK
 
- XLF0
 
- XLF1
 
- XLF23
 
- XLF4
 
- XLF56
 
- XLF_5LEVEL
 
- XLF_5LEVEL_ENABLED
 
- XLF_CAN_BE_LOADED_ABOVE_4G
 
- XLF_EFI_HANDOVER_32
 
- XLF_EFI_HANDOVER_64
 
- XLF_EFI_KEXEC
 
- XLF_KERNEL_64
 
- XLGMAC_DMA_INTERRUPT_MASK
 
- XLGMAC_DMA_REG
 
- XLGMAC_DMA_STOP_TIMEOUT
 
- XLGMAC_DRV_DESC
 
- XLGMAC_DRV_NAME
 
- XLGMAC_DRV_VERSION
 
- XLGMAC_GET_DESC_DATA
 
- XLGMAC_GET_REG_BITS
 
- XLGMAC_GET_REG_BITS_LE
 
- XLGMAC_INIT_DMA_RX_FRAMES
 
- XLGMAC_INIT_DMA_RX_USECS
 
- XLGMAC_INIT_DMA_TX_FRAMES
 
- XLGMAC_INIT_DMA_TX_USECS
 
- XLGMAC_INT_DMA_ALL
 
- XLGMAC_INT_DMA_CH_SR_FBE
 
- XLGMAC_INT_DMA_CH_SR_RBU
 
- XLGMAC_INT_DMA_CH_SR_RI
 
- XLGMAC_INT_DMA_CH_SR_RPS
 
- XLGMAC_INT_DMA_CH_SR_TBU
 
- XLGMAC_INT_DMA_CH_SR_TI
 
- XLGMAC_INT_DMA_CH_SR_TI_RI
 
- XLGMAC_INT_DMA_CH_SR_TPS
 
- XLGMAC_JUMBO_PACKET_MTU
 
- XLGMAC_MAC_HASH_TABLE_SIZE
 
- XLGMAC_MAX_DMA_CHANNELS
 
- XLGMAC_MAX_DMA_RIWT
 
- XLGMAC_MAX_FIFO
 
- XLGMAC_MAX_FLOW_CONTROL_QUEUES
 
- XLGMAC_MIN_DMA_RIWT
 
- XLGMAC_MTL_REG
 
- XLGMAC_PR
 
- XLGMAC_RSS_HASH_KEY_SIZE
 
- XLGMAC_RSS_HASH_KEY_TYPE
 
- XLGMAC_RSS_LOOKUP_TABLE_TYPE
 
- XLGMAC_RSS_MAX_TABLE_SIZE
 
- XLGMAC_RX_BUF_ALIGN
 
- XLGMAC_RX_DESC_CNT
 
- XLGMAC_RX_DESC_MAX_DIRTY
 
- XLGMAC_RX_MIN_BUF_SIZE
 
- XLGMAC_SET_REG_BITS
 
- XLGMAC_SET_REG_BITS_LE
 
- XLGMAC_SKB_ALLOC_SIZE
 
- XLGMAC_SPH_HDSMS_SIZE
 
- XLGMAC_STAT
 
- XLGMAC_STATS_COUNT
 
- XLGMAC_STD_PACKET_MTU
 
- XLGMAC_SYSCLOCK
 
- XLGMAC_TX_DESC_CNT
 
- XLGMAC_TX_DESC_MAX_PROC
 
- XLGMAC_TX_DESC_MIN_FREE
 
- XLGMAC_TX_MAX_BUF_SIZE
 
- XLGMAC_TX_MAX_DESC_NR
 
- XLGMAC_TX_MAX_SPLIT
 
- XLLF_IER_OFFSET
 
- XLLF_INT_ALL_MASK
 
- XLLF_INT_ERROR_MASK
 
- XLLF_INT_RC_MASK
 
- XLLF_INT_RFPE_MASK
 
- XLLF_INT_RFPF_MASK
 
- XLLF_INT_RPORE_MASK
 
- XLLF_INT_RPUE_MASK
 
- XLLF_INT_RPURE_MASK
 
- XLLF_INT_RRC_MASK
 
- XLLF_INT_RXERROR_MASK
 
- XLLF_INT_TC_MASK
 
- XLLF_INT_TFPE_MASK
 
- XLLF_INT_TFPF_MASK
 
- XLLF_INT_TPOE_MASK
 
- XLLF_INT_TRC_MASK
 
- XLLF_INT_TSE_MASK
 
- XLLF_INT_TXERROR_MASK
 
- XLLF_ISR_OFFSET
 
- XLLF_RDFD_OFFSET
 
- XLLF_RDFO_OFFSET
 
- XLLF_RDFR_OFFSET
 
- XLLF_RDFR_RESET_MASK
 
- XLLF_RDR_OFFSET
 
- XLLF_RLR_OFFSET
 
- XLLF_SRR_OFFSET
 
- XLLF_SRR_RESET_MASK
 
- XLLF_TDFD_OFFSET
 
- XLLF_TDFR_OFFSET
 
- XLLF_TDFR_RESET_MASK
 
- XLLF_TDFV_OFFSET
 
- XLLF_TDR_OFFSET
 
- XLLF_TLR_OFFSET
 
- XLLK
 
- XLNX_AUD_BUFF_ADDR_LSB
 
- XLNX_AUD_BUFF_ADDR_MSB
 
- XLNX_AUD_CH_STS_START
 
- XLNX_AUD_CORE_CONFIG
 
- XLNX_AUD_CTRL
 
- XLNX_AUD_FS_MULTIPLIER
 
- XLNX_AUD_PERIOD_CONFIG
 
- XLNX_AUD_STS
 
- XLNX_AUD_XFER_COUNT
 
- XLNX_BYTES_PER_CH
 
- XLNX_MM2S_OFFSET
 
- XLNX_PARAM_UNKNOWN
 
- XLNX_S2MM_OFFSET
 
- XLNX_SPDIF_FORMATS
 
- XLNX_SPDIF_RATES
 
- XLO
 
- XLOCB
 
- XLOCB_MASK
 
- XLOG_ACTIVE_RECOVERY
 
- XLOG_BC_TABLE_SIZE
 
- XLOG_BIG_RECORD_BSHIFT
 
- XLOG_BIG_RECORD_BSIZE
 
- XLOG_BTOLSUNIT
 
- XLOG_BUF_CANCEL_BUCKET
 
- XLOG_CIL_SPACE_LIMIT
 
- XLOG_COMMIT_TRANS
 
- XLOG_CONTINUE_TRANS
 
- XLOG_COVER_OPS
 
- XLOG_END_TRANS
 
- XLOG_FMT
 
- XLOG_FMT_IRIX_BE
 
- XLOG_FMT_LINUX_BE
 
- XLOG_FMT_LINUX_LE
 
- XLOG_FMT_UNKNOWN
 
- XLOG_FORCED_SHUTDOWN
 
- XLOG_HEADER_CYCLE_SIZE
 
- XLOG_HEADER_MAGIC_NUM
 
- XLOG_HEADER_SIZE
 
- XLOG_IO_ERROR
 
- XLOG_LSUNITTOB
 
- XLOG_MAX_ICLOGS
 
- XLOG_MAX_RECORD_BSHIFT
 
- XLOG_MAX_RECORD_BSIZE
 
- XLOG_MAX_REGIONS_IN_ITEM
 
- XLOG_MIN_ICLOGS
 
- XLOG_MIN_RECORD_BSHIFT
 
- XLOG_MIN_RECORD_BSIZE
 
- XLOG_RECOVERY_NEEDED
 
- XLOG_RECOVER_COMMIT_QUEUE_MAX
 
- XLOG_RECOVER_CRCPASS
 
- XLOG_RECOVER_PASS1
 
- XLOG_RECOVER_PASS2
 
- XLOG_REC_SHIFT
 
- XLOG_REG_TYPE_BCHUNK
 
- XLOG_REG_TYPE_BFORMAT
 
- XLOG_REG_TYPE_BUD_FORMAT
 
- XLOG_REG_TYPE_BUI_FORMAT
 
- XLOG_REG_TYPE_COMMIT
 
- XLOG_REG_TYPE_CUD_FORMAT
 
- XLOG_REG_TYPE_CUI_FORMAT
 
- XLOG_REG_TYPE_DQUOT
 
- XLOG_REG_TYPE_EFD_FORMAT
 
- XLOG_REG_TYPE_EFI_FORMAT
 
- XLOG_REG_TYPE_IATTR_BROOT
 
- XLOG_REG_TYPE_IATTR_EXT
 
- XLOG_REG_TYPE_IATTR_LOCAL
 
- XLOG_REG_TYPE_IBROOT
 
- XLOG_REG_TYPE_ICORE
 
- XLOG_REG_TYPE_ICREATE
 
- XLOG_REG_TYPE_IEXT
 
- XLOG_REG_TYPE_IFORMAT
 
- XLOG_REG_TYPE_ILOCAL
 
- XLOG_REG_TYPE_LRHEADER
 
- XLOG_REG_TYPE_MAX
 
- XLOG_REG_TYPE_QFORMAT
 
- XLOG_REG_TYPE_QUOTAOFF
 
- XLOG_REG_TYPE_RUD_FORMAT
 
- XLOG_REG_TYPE_RUI_FORMAT
 
- XLOG_REG_TYPE_TRANSHDR
 
- XLOG_REG_TYPE_UNMOUNT
 
- XLOG_RHASH
 
- XLOG_RHASH_BITS
 
- XLOG_RHASH_SHIFT
 
- XLOG_RHASH_SIZE
 
- XLOG_START_TRANS
 
- XLOG_STATE_ACTIVE
 
- XLOG_STATE_ALL
 
- XLOG_STATE_CALLBACK
 
- XLOG_STATE_COVER_DONE
 
- XLOG_STATE_COVER_DONE2
 
- XLOG_STATE_COVER_IDLE
 
- XLOG_STATE_COVER_NEED
 
- XLOG_STATE_COVER_NEED2
 
- XLOG_STATE_DIRTY
 
- XLOG_STATE_DONE_SYNC
 
- XLOG_STATE_DO_CALLBACK
 
- XLOG_STATE_IOERROR
 
- XLOG_STATE_NOTUSED
 
- XLOG_STATE_SYNCING
 
- XLOG_STATE_WANT_SYNC
 
- XLOG_TAIL_WARN
 
- XLOG_TIC_FLAGS
 
- XLOG_TIC_INITED
 
- XLOG_TIC_LEN_MAX
 
- XLOG_TIC_PERM_RESERV
 
- XLOG_TOTAL_REC_SHIFT
 
- XLOG_UNMOUNT_REC_TYPE
 
- XLOG_UNMOUNT_TRANS
 
- XLOG_UNMOUNT_TYPE
 
- XLOG_VERSION_1
 
- XLOG_VERSION_2
 
- XLOG_VERSION_OKBITS
 
- XLOG_WAS_CONT_TRANS
 
- XLO_MASK
 
- XLP2XX_IO_I2C_OFFSET
 
- XLP2XX_IO_USB_OFFSET
 
- XLP2XX_IO_USB_XHCI0_OFFSET
 
- XLP2XX_IO_USB_XHCI1_OFFSET
 
- XLP2XX_IO_USB_XHCI2_OFFSET
 
- XLP9XX_HDR_OFFSET
 
- XLP9XX_I2C_BUSY_TIMEOUT
 
- XLP9XX_I2C_CMD
 
- XLP9XX_I2C_CMD_ACK
 
- XLP9XX_I2C_CMD_READ
 
- XLP9XX_I2C_CMD_START
 
- XLP9XX_I2C_CMD_STOP
 
- XLP9XX_I2C_CMD_WRITE
 
- XLP9XX_I2C_CTRL
 
- XLP9XX_I2C_CTRL_ADDMODE
 
- XLP9XX_I2C_CTRL_EN
 
- XLP9XX_I2C_CTRL_FIFORD
 
- XLP9XX_I2C_CTRL_MASTER
 
- XLP9XX_I2C_CTRL_MCTLEN_MASK
 
- XLP9XX_I2C_CTRL_MCTLEN_SHIFT
 
- XLP9XX_I2C_CTRL_RST
 
- XLP9XX_I2C_DEFAULT_FREQ
 
- XLP9XX_I2C_DIV
 
- XLP9XX_I2C_FIFOWCNT
 
- XLP9XX_I2C_FIFO_SIZE
 
- XLP9XX_I2C_FIFO_WCNT_MASK
 
- XLP9XX_I2C_GENCALLADDR
 
- XLP9XX_I2C_HIGH_FREQ
 
- XLP9XX_I2C_INTEN
 
- XLP9XX_I2C_INTEN_ARLOST
 
- XLP9XX_I2C_INTEN_BUSERR
 
- XLP9XX_I2C_INTEN_DATADONE
 
- XLP9XX_I2C_INTEN_MFIFOEMTY
 
- XLP9XX_I2C_INTEN_MFIFOFULL
 
- XLP9XX_I2C_INTEN_MFIFOHI
 
- XLP9XX_I2C_INTEN_NACKADDR
 
- XLP9XX_I2C_INTEN_SADDR
 
- XLP9XX_I2C_INTST
 
- XLP9XX_I2C_IP_CLK_FREQ
 
- XLP9XX_I2C_MFIFOCTRL
 
- XLP9XX_I2C_MFIFOCTRL_HITH_SHIFT
 
- XLP9XX_I2C_MFIFOCTRL_LOTH_SHIFT
 
- XLP9XX_I2C_MFIFOCTRL_RST
 
- XLP9XX_I2C_MRXFIFO
 
- XLP9XX_I2C_MTXFIFO
 
- XLP9XX_I2C_OWNADDR
 
- XLP9XX_I2C_SFIFOCTRL
 
- XLP9XX_I2C_SLAVEADDR
 
- XLP9XX_I2C_SLAVEADDR_ADDR_SHIFT
 
- XLP9XX_I2C_SLAVEADDR_RW
 
- XLP9XX_I2C_SRXFIFO
 
- XLP9XX_I2C_STATUS
 
- XLP9XX_I2C_STATUS_BUSY
 
- XLP9XX_I2C_STATUS_ERRMASK
 
- XLP9XX_I2C_STXFIFO
 
- XLP9XX_I2C_TIMEOUT
 
- XLP9XX_I2C_TIMEOUT_MS
 
- XLP9XX_I2C_WAITCNT
 
- XLP9XX_IO_BRIDGE_OFFSET
 
- XLP9XX_IO_CLOCK_OFFSET
 
- XLP9XX_IO_FUSE_OFFSET
 
- XLP9XX_IO_JTAG_OFFSET
 
- XLP9XX_IO_MMC_OFFSET
 
- XLP9XX_IO_NAND_OFFSET
 
- XLP9XX_IO_NOR_OFFSET
 
- XLP9XX_IO_PCIE0_OFFSET
 
- XLP9XX_IO_PCIE2_OFFSET
 
- XLP9XX_IO_PCIE3_OFFSET
 
- XLP9XX_IO_PCIE_OFFSET
 
- XLP9XX_IO_PIC_OFFSET
 
- XLP9XX_IO_POWER_OFFSET
 
- XLP9XX_IO_SATA_OFFSET
 
- XLP9XX_IO_SPI_OFFSET
 
- XLP9XX_IO_SYS_OFFSET
 
- XLP9XX_IO_UART_OFFSET
 
- XLP9XX_IO_USB_OFFSET
 
- XLP9XX_IO_USB_XHCI0_OFFSET
 
- XLP9XX_IO_USB_XHCI1_OFFSET
 
- XLPII_ATERESET
 
- XLPII_ECCDIS
 
- XLPII_FSEL
 
- XLPII_LOOPEN
 
- XLPII_LOSBIAS
 
- XLPII_LOSLEV
 
- XLPII_MS_CSYSREQ
 
- XLPII_NUM2PORT
 
- XLPII_NUM3PORT
 
- XLPII_PRESET
 
- XLPII_RETENABLEN
 
- XLPII_RSLKSEL
 
- XLPII_RTUNEREQ
 
- XLPII_SQRXTX
 
- XLPII_TESTBURNIN
 
- XLPII_TESTPDHSP
 
- XLPII_TESTPDSSP
 
- XLPII_TX2RX
 
- XLPII_TXBOOST
 
- XLPII_USB3_CTL_0
 
- XLPII_USB3_INT_MASK
 
- XLPII_USB3_INT_REG
 
- XLPII_USB_PHY_LOS_LV
 
- XLPII_USB_PHY_TEST
 
- XLPII_USB_RFCLK_REG
 
- XLPII_VAUXRST
 
- XLPII_VCCRST
 
- XLPII_VVLD
 
- XLPII_XHCIREV
 
- XLPII_XS_CSYSREQ
 
- XLP_DEFAULT_IO_BASE
 
- XLP_DEFAULT_PCI_CFG_BASE
 
- XLP_DEFAULT_PCI_ECFG_BASE
 
- XLP_GPIO_IRQ_BASE
 
- XLP_GPIO_IRQ_POL_HIGH
 
- XLP_GPIO_IRQ_POL_LOW
 
- XLP_GPIO_IRQ_TYPE_EDGE
 
- XLP_GPIO_IRQ_TYPE_LVL
 
- XLP_GPIO_REGSZ
 
- XLP_GPIO_VARIANT_XLP208
 
- XLP_GPIO_VARIANT_XLP316
 
- XLP_GPIO_VARIANT_XLP532
 
- XLP_GPIO_VARIANT_XLP832
 
- XLP_GPIO_VARIANT_XLP980
 
- XLP_HDR_OFFSET
 
- XLP_IO_BRIDGE_OFFSET
 
- XLP_IO_CIC0_OFFSET
 
- XLP_IO_CIC1_OFFSET
 
- XLP_IO_CIC2_OFFSET
 
- XLP_IO_CLK
 
- XLP_IO_CMP_OFFSET
 
- XLP_IO_CMS_OFFSET
 
- XLP_IO_DEV
 
- XLP_IO_DMA_OFFSET
 
- XLP_IO_GPIO_OFFSET
 
- XLP_IO_I2C0_OFFSET
 
- XLP_IO_I2C1_OFFSET
 
- XLP_IO_I2C_OFFSET
 
- XLP_IO_JTAG_OFFSET
 
- XLP_IO_MMC_OFFSET
 
- XLP_IO_NAE_OFFSET
 
- XLP_IO_NAND_OFFSET
 
- XLP_IO_NOR_OFFSET
 
- XLP_IO_PCIE0_OFFSET
 
- XLP_IO_PCIE1_OFFSET
 
- XLP_IO_PCIE2_OFFSET
 
- XLP_IO_PCIE3_OFFSET
 
- XLP_IO_PCIE_OFFSET
 
- XLP_IO_PCI_HDRSZ
 
- XLP_IO_PCI_OFFSET
 
- XLP_IO_PIC_OFFSET
 
- XLP_IO_POE_OFFSET
 
- XLP_IO_SATA_OFFSET
 
- XLP_IO_SEC_OFFSET
 
- XLP_IO_SIZE
 
- XLP_IO_SPI_OFFSET
 
- XLP_IO_SYS_OFFSET
 
- XLP_IO_UART0_OFFSET
 
- XLP_IO_UART1_OFFSET
 
- XLP_IO_UART_OFFSET
 
- XLP_IO_USB_EHCI0_OFFSET
 
- XLP_IO_USB_EHCI1_OFFSET
 
- XLP_IO_USB_OFFSET
 
- XLP_IO_USB_OHCI0_OFFSET
 
- XLP_IO_USB_OHCI1_OFFSET
 
- XLP_IO_USB_OHCI2_OFFSET
 
- XLP_IO_USB_OHCI3_OFFSET
 
- XLP_MAX_NR_GPIO
 
- XLP_MSIVEC_PER_LINK
 
- XLP_MSIXVEC_PER_LINK
 
- XLP_MSIXVEC_TOTAL
 
- XLP_PCIE_BUS_BLK_SIZE
 
- XLP_PCIE_CFG_SIZE
 
- XLP_PCIE_DEV_BLK_SIZE
 
- XLP_PCI_CFGREG0
 
- XLP_PCI_CFGREG1
 
- XLP_PCI_CFGREG2
 
- XLP_PCI_CFGREG3
 
- XLP_PCI_CFGREG4
 
- XLP_PCI_CFGREG5
 
- XLP_PCI_DEVINFO_REG0
 
- XLP_PCI_DEVINFO_REG1
 
- XLP_PCI_DEVINFO_REG2
 
- XLP_PCI_DEVINFO_REG3
 
- XLP_PCI_DEVINFO_REG4
 
- XLP_PCI_DEVINFO_REG5
 
- XLP_PCI_DEVINFO_REG6
 
- XLP_PCI_DEVINFO_REG7
 
- XLP_PCI_DEVSCRATCH_REG0
 
- XLP_PCI_DEVSCRATCH_REG1
 
- XLP_PCI_DEVSCRATCH_REG2
 
- XLP_PCI_DEVSCRATCH_REG3
 
- XLP_PCI_IRTINFO_REG
 
- XLP_PCI_MSGSTN_REG
 
- XLP_PCI_SBB_WT_REG
 
- XLP_PCI_UCODEINFO_REG
 
- XLP_SPI_CMD
 
- XLP_SPI_CMD_CONT
 
- XLP_SPI_CMD_IDLE_MASK
 
- XLP_SPI_CMD_RX_MASK
 
- XLP_SPI_CMD_TXRX_MASK
 
- XLP_SPI_CMD_TX_MASK
 
- XLP_SPI_CONFIG
 
- XLP_SPI_CPHA
 
- XLP_SPI_CPOL
 
- XLP_SPI_CS_LSBFE
 
- XLP_SPI_CS_POL
 
- XLP_SPI_DEFAULT_FREQ
 
- XLP_SPI_FDIV
 
- XLP_SPI_FDIV_MAX
 
- XLP_SPI_FDIV_MIN
 
- XLP_SPI_FIFO_SIZE
 
- XLP_SPI_FIFO_THRESH
 
- XLP_SPI_FIFO_WCNT
 
- XLP_SPI_INTR_DONE
 
- XLP_SPI_INTR_EN
 
- XLP_SPI_INTR_RXOF
 
- XLP_SPI_INTR_RXTH
 
- XLP_SPI_INTR_TXTH
 
- XLP_SPI_INTR_TXUF
 
- XLP_SPI_MAX_CS
 
- XLP_SPI_RXCAP_EN
 
- XLP_SPI_RXDATA_FIFO
 
- XLP_SPI_RXFIFO_WCNT_MASK
 
- XLP_SPI_RXMISO_EN
 
- XLP_SPI_RX_INT
 
- XLP_SPI_RX_OF
 
- XLP_SPI_STATUS
 
- XLP_SPI_STAT_MASK
 
- XLP_SPI_SYSCTRL
 
- XLP_SPI_SYS_CLKDIS
 
- XLP_SPI_SYS_PMEN
 
- XLP_SPI_SYS_RESET
 
- XLP_SPI_TXDATA_FIFO
 
- XLP_SPI_TXFIFO_WCNT_MASK
 
- XLP_SPI_TXFIFO_WCNT_SHIFT
 
- XLP_SPI_TXMISO_EN
 
- XLP_SPI_TXMOSI_EN
 
- XLP_SPI_TXRXTH
 
- XLP_SPI_TX_INT
 
- XLP_SPI_TX_UF
 
- XLP_SPI_XFER_SIZE
 
- XLP_SPI_XFR_BITCNT_SHIFT
 
- XLP_SPI_XFR_DONE
 
- XLP_SPI_XFR_PENDING
 
- XLRAND_MASK
 
- XLRT_MASK
 
- XLR_FB_STN
 
- XLR_GMAC_BLK_SZ
 
- XLR_I2C_ACK_ERR
 
- XLR_I2C_ADDR
 
- XLR_I2C_ARB_STARTERR
 
- XLR_I2C_BUS_BUSY
 
- XLR_I2C_BYTECNT
 
- XLR_I2C_CFG
 
- XLR_I2C_CFG_ADDR
 
- XLR_I2C_CFG_NOADDR
 
- XLR_I2C_CLKDIV
 
- XLR_I2C_DATAIN
 
- XLR_I2C_DATAOUT
 
- XLR_I2C_DEVADDR
 
- XLR_I2C_FLAG_IRQ
 
- XLR_I2C_HDSTATIM
 
- XLR_I2C_INT_EN
 
- XLR_I2C_INT_STAT
 
- XLR_I2C_RXRDY
 
- XLR_I2C_SDOEMPTY
 
- XLR_I2C_STARTXFR
 
- XLR_I2C_STARTXFR_ND
 
- XLR_I2C_STARTXFR_RD
 
- XLR_I2C_STARTXFR_WR
 
- XLR_I2C_STATUS
 
- XLR_I2C_TIMEOUT
 
- XLR_NET_PREPAD_LEN
 
- XLR_PERFCTRL_ALLTHREADS
 
- XLR_RX_BUF_SIZE
 
- XLS_MASK
 
- XLT_GRU_INT_REQ_BITS
 
- XLYBB_MASK
 
- XLYLK
 
- XLYLK_MASK
 
- XL_929
 
- XL_CCLK_PIN
 
- XL_CCLK_PORT
 
- XL_CSIN_PIN
 
- XL_CSIN_PORT
 
- XL_DEFAULT_MEM_BASE
 
- XL_DONE_PIN
 
- XL_DONE_PORT
 
- XL_INITN_PIN
 
- XL_INITN_PORT
 
- XL_MASK
 
- XL_PROGN_PIN
 
- XL_PROGN_PORT
 
- XL_RDWRN_PIN
 
- XL_RDWRN_PORT
 
- XM9_8_BITPLANES
 
- XM9_CRS_CONFIG
 
- XM9_CRS_CURS_CMAP_MSB
 
- XM9_CRS_FIFO_AVAIL
 
- XM9_CRS_MODE_REG_DATA
 
- XM9_CRS_MODE_REG_INDEX
 
- XM9_CRS_PUP_CMAP_MSB
 
- XM9_CRS_REVISION
 
- XM9_EXPRESS_VIDEO
 
- XM9_FIFO_0_AVAIL
 
- XM9_FIFO_1_AVAIL
 
- XM9_FIFO_2_AVAIL
 
- XM9_FIFO_3_AVAIL
 
- XM9_FIFO_EMPTY
 
- XM9_FIFO_FULL
 
- XM9_ODD_PIXEL
 
- XM9_PUPMODE
 
- XM9_SLOW_DCB
 
- XM9_VIDEO_OPTION
 
- XM9_VIDEO_RGBMAP_MASK
 
- XMAC_ADDR0
 
- XMAC_ADDR0_ADDR0
 
- XMAC_ADDR1
 
- XMAC_ADDR1_ADDR1
 
- XMAC_ADDR2
 
- XMAC_ADDR2_ADDR2
 
- XMAC_ADDR_CMPEN
 
- XMAC_ADDR_CMPEN_EN0
 
- XMAC_ADDR_CMPEN_EN1
 
- XMAC_ADDR_CMPEN_EN10
 
- XMAC_ADDR_CMPEN_EN11
 
- XMAC_ADDR_CMPEN_EN12
 
- XMAC_ADDR_CMPEN_EN13
 
- XMAC_ADDR_CMPEN_EN14
 
- XMAC_ADDR_CMPEN_EN15
 
- XMAC_ADDR_CMPEN_EN2
 
- XMAC_ADDR_CMPEN_EN3
 
- XMAC_ADDR_CMPEN_EN4
 
- XMAC_ADDR_CMPEN_EN5
 
- XMAC_ADDR_CMPEN_EN6
 
- XMAC_ADDR_CMPEN_EN7
 
- XMAC_ADDR_CMPEN_EN8
 
- XMAC_ADDR_CMPEN_EN9
 
- XMAC_ADD_FILT0
 
- XMAC_ADD_FILT00_MASK
 
- XMAC_ADD_FILT00_MASK_VAL
 
- XMAC_ADD_FILT0_FILT0
 
- XMAC_ADD_FILT1
 
- XMAC_ADD_FILT12_MASK
 
- XMAC_ADD_FILT12_MASK_VAL
 
- XMAC_ADD_FILT1_FILT1
 
- XMAC_ADD_FILT2
 
- XMAC_ADD_FILT2_FILT2
 
- XMAC_ALT_ADDR0
 
- XMAC_ALT_ADDR0_ADDR0
 
- XMAC_ALT_ADDR1
 
- XMAC_ALT_ADDR1_ADDR1
 
- XMAC_ALT_ADDR2
 
- XMAC_ALT_ADDR2_ADDR2
 
- XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_LOCAL_FAULT_STATUS
 
- XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_REMOTE_FAULT_STATUS
 
- XMAC_CONFIG
 
- XMAC_CONFIG_10G_XPCS_BYPASS
 
- XMAC_CONFIG_1G_PCS_BYPASS
 
- XMAC_CONFIG_ADDR_FILTER_EN
 
- XMAC_CONFIG_ALWAYS_NO_CRC
 
- XMAC_CONFIG_ERR_CHK_DIS
 
- XMAC_CONFIG_FORCE_LED_ON
 
- XMAC_CONFIG_HASH_FILTER_EN
 
- XMAC_CONFIG_LED_POLARITY
 
- XMAC_CONFIG_LFS_DISABLE
 
- XMAC_CONFIG_LOOPBACK
 
- XMAC_CONFIG_MAC2IPP_PKT_CNT_EN
 
- XMAC_CONFIG_MODE_GMII
 
- XMAC_CONFIG_MODE_MASK
 
- XMAC_CONFIG_MODE_MII
 
- XMAC_CONFIG_MODE_XGMII
 
- XMAC_CONFIG_PASS_FLOW_CTRL
 
- XMAC_CONFIG_PROMISCUOUS
 
- XMAC_CONFIG_PROMISC_GROUP
 
- XMAC_CONFIG_RCV_PAUSE_ENABLE
 
- XMAC_CONFIG_RESERVED_MULTICAST
 
- XMAC_CONFIG_RX_CODEV_CHK_DIS
 
- XMAC_CONFIG_RX_CRC_CHK_DIS
 
- XMAC_CONFIG_RX_MAC_ENABLE
 
- XMAC_CONFIG_SEL_CLK_25MHZ
 
- XMAC_CONFIG_SEL_POR_CLK_SRC
 
- XMAC_CONFIG_STRETCH_MODE
 
- XMAC_CONFIG_STRIP_CRC
 
- XMAC_CONFIG_TX_ENABLE
 
- XMAC_CONFIG_TX_OUTPUT_EN
 
- XMAC_CONFIG_VAR_MIN_IPG_EN
 
- XMAC_CONFIG_WARNING_MSG_EN
 
- XMAC_CTRL_REG_LINE_LOCAL_LPBK
 
- XMAC_CTRL_REG_RX_EN
 
- XMAC_CTRL_REG_SOFT_RESET
 
- XMAC_CTRL_REG_TX_EN
 
- XMAC_CTRL_REG_XLGMII_ALIGN_ENB
 
- XMAC_DEBUG_SEL
 
- XMAC_DEBUG_SEL_MAC
 
- XMAC_DEBUG_SEL_XMAC
 
- XMAC_FC_MSK
 
- XMAC_FC_MSK_RX_MAC_RPAUSE
 
- XMAC_FC_MSK_TX_MAC_NPAUSE
 
- XMAC_FC_MSK_TX_MAC_PAUSE
 
- XMAC_FC_STAT
 
- XMAC_FC_STAT_RX_MAC_RPAUSE
 
- XMAC_FC_STAT_RX_RCV_PAUSE_TIME
 
- XMAC_FC_STAT_TX_MAC_NPAUSE
 
- XMAC_FC_STAT_TX_MAC_PAUSE
 
- XMAC_HASH_TBL
 
- XMAC_HASH_TBL_VAL
 
- XMAC_HOST_INFO
 
- XMAC_INTER1
 
- XMAC_INTER2
 
- XMAC_INTERN1_SIGNALS1
 
- XMAC_INTERN2_SIGNALS2
 
- XMAC_IPG
 
- XMAC_IPG_IPG_MII_GMII
 
- XMAC_IPG_IPG_MII_GMII_SHIFT
 
- XMAC_IPG_IPG_XGMII
 
- XMAC_IPG_IPG_XGMII_SHIFT
 
- XMAC_IPG_STRETCH_CONST
 
- XMAC_IPG_STRETCH_CONST_SHIFT
 
- XMAC_IPG_STRETCH_RATIO
 
- XMAC_IPG_STRETCH_RATIO_SHIFT
 
- XMAC_MAX
 
- XMAC_MAX_FRAME_SIZE
 
- XMAC_MAX_FRAME_SIZE_SHFT
 
- XMAC_MIN
 
- XMAC_MIN_RX_MIN_PKT_SIZE
 
- XMAC_MIN_RX_MIN_PKT_SIZE_SHFT
 
- XMAC_MIN_SLOT_TIME
 
- XMAC_MIN_SLOT_TIME_SHFT
 
- XMAC_MIN_TX_MIN_PKT_SIZE
 
- XMAC_MIN_TX_MIN_PKT_SIZE_SHFT
 
- XMAC_NUM_ALT_ADDR
 
- XMAC_NUM_HOST_INFO
 
- XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN
 
- XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN
 
- XMAC_PA_DATA0
 
- XMAC_PA_DATA0_VAL
 
- XMAC_PA_DATA1
 
- XMAC_PA_DATA1_VAL
 
- XMAC_PFC_CTRL_HI_REG_FORCE_PFC_XON
 
- XMAC_PFC_CTRL_HI_REG_PFC_REFRESH_EN
 
- XMAC_PFC_CTRL_HI_REG_PFC_STATS_EN
 
- XMAC_PFC_CTRL_HI_REG_RX_PFC_EN
 
- XMAC_PFC_CTRL_HI_REG_TX_PFC_EN
 
- XMAC_PORT0_OFF
 
- XMAC_PORT1_OFF
 
- XMAC_REG_CLEAR_RX_LSS_STATUS
 
- XMAC_REG_CTRL
 
- XMAC_REG_CTRL_SA_HI
 
- XMAC_REG_CTRL_SA_LO
 
- XMAC_REG_EEE_CTRL
 
- XMAC_REG_EEE_TIMERS_HI
 
- XMAC_REG_PAUSE_CTRL
 
- XMAC_REG_PFC_CTRL
 
- XMAC_REG_PFC_CTRL_HI
 
- XMAC_REG_RX_LSS_CTRL
 
- XMAC_REG_RX_LSS_STATUS
 
- XMAC_REG_RX_MAX_SIZE
 
- XMAC_REG_TX_CTRL
 
- XMAC_RX_LSS_CTRL_REG_LOCAL_FAULT_DISABLE
 
- XMAC_RX_LSS_CTRL_REG_REMOTE_FAULT_DISABLE
 
- XMAC_SM_REG
 
- XMAC_SM_REG_STATE
 
- XMAC_TRAIN_VEC
 
- XMAC_TRAIN_VEC_VAL
 
- XMADDR
 
- XMAX
 
- XMAX_NOMINAL
 
- XMBAR
 
- XMCM
 
- XMDIO_READ
 
- XMDIO_READ_BITS
 
- XMDIO_WRITE
 
- XMDIO_WRITE_BITS
 
- XMGAC_L3_ADDR3
 
- XMII_MAC
 
- XMII_MODE_MII
 
- XMII_MODE_RGMII
 
- XMII_MODE_RMII
 
- XMII_PHY
 
- XMIN
 
- XMIN_NOMINAL
 
- XMITBUF_ALIGN_SZ
 
- XMITBUF_CMD
 
- XMITBUF_DATA
 
- XMITBUF_MGNT
 
- XMIT_1_RETRY
 
- XMIT_ALIGN_0
 
- XMIT_ALIGN_1
 
- XMIT_ALIVE
 
- XMIT_BE_QUEUE
 
- XMIT_BK_QUEUE
 
- XMIT_BUFF
 
- XMIT_BUFFER_NUMBER
 
- XMIT_BUFF_SIZE
 
- XMIT_BUFF_SZ
 
- XMIT_BUF_ONE_READY
 
- XMIT_BUF_SIZE
 
- XMIT_BUF_TWO_READY
 
- XMIT_BURST_STATIC_SUBADDR
 
- XMIT_BURST_WITHOUT_SUBADDR
 
- XMIT_BUSY
 
- XMIT_CSUM
 
- XMIT_CSUM_ENC
 
- XMIT_CSUM_ENC_V4
 
- XMIT_CSUM_ENC_V6
 
- XMIT_CSUM_TCP
 
- XMIT_CSUM_V4
 
- XMIT_CSUM_V6
 
- XMIT_D10_2
 
- XMIT_DEF
 
- XMIT_ENC
 
- XMIT_ENC_GSO_L4_CSUM
 
- XMIT_END
 
- XMIT_ERR
 
- XMIT_FULL
 
- XMIT_GSO
 
- XMIT_GSO_ENC
 
- XMIT_GSO_ENC_V4
 
- XMIT_GSO_ENC_V6
 
- XMIT_GSO_V4
 
- XMIT_GSO_V6
 
- XMIT_INC
 
- XMIT_L4_CSUM
 
- XMIT_LCAR
 
- XMIT_LCOL
 
- XMIT_LSO
 
- XMIT_MSG_BAD
 
- XMIT_NEED_AUTH
 
- XMIT_NO_CCS
 
- XMIT_NO_INTR
 
- XMIT_OK
 
- XMIT_OOB_BURST
 
- XMIT_OWN
 
- XMIT_PLAIN
 
- XMIT_RECURSION_LIMIT
 
- XMIT_RESERV
 
- XMIT_RETRY
 
- XMIT_RTRY
 
- XMIT_SENDING
 
- XMIT_SENDING_READY
 
- XMIT_SINGLE_INC_SUBADDR
 
- XMIT_SINGLE_STATIC_SUBADDR
 
- XMIT_SIZE
 
- XMIT_SLVA
 
- XMIT_START
 
- XMIT_SYNC
 
- XMIT_SZ_128BIT
 
- XMIT_SZ_128BIT_BLK
 
- XMIT_SZ_16BIT
 
- XMIT_SZ_256BIT
 
- XMIT_SZ_256BIT_BLK
 
- XMIT_SZ_32BIT
 
- XMIT_SZ_512BIT
 
- XMIT_SZ_64BIT
 
- XMIT_SZ_8BIT
 
- XMIT_TDRMASK
 
- XMIT_UFLO
 
- XMIT_VI_QUEUE
 
- XMIT_VO_QUEUE
 
- XMIT_WAITING
 
- XMIT_WAKEUP
 
- XMLH_LINK_UP
 
- XMM
 
- XMMF
 
- XMMF_MASK
 
- XMM_SHUFB_BSWAP
 
- XMON_NUM_SPUS
 
- XMP_HALFFRAME_SPACE
 
- XMP_LEADER
 
- XMP_NIBBLE_PREFIX
 
- XMP_TRAILER_SPACE
 
- XMP_UNIT
 
- XMR_1023B_OV
 
- XMR_127B_OV
 
- XMR_255B_OV
 
- XMR_511B_OV
 
- XMR_64B_OV
 
- XMR_BC_OK_OV
 
- XMR_BURST
 
- XMR_CAR_ERR_OV
 
- XMR_CEX_ERR_OV
 
- XMR_DEF_MSK
 
- XMR_FCS_ERR_OV
 
- XMR_FIFO_OV
 
- XMR_FMISS_OV
 
- XMR_FRA_ERR_OV
 
- XMR_FS_1_VLAN
 
- XMR_FS_2L_VLAN
 
- XMR_FS_802_3
 
- XMR_FS_BC
 
- XMR_FS_BURST
 
- XMR_FS_CAR_ERR
 
- XMR_FS_CEX_ERR
 
- XMR_FS_COL_ERR
 
- XMR_FS_ERR
 
- XMR_FS_FCS_ERR
 
- XMR_FS_FRA_ERR
 
- XMR_FS_LEN
 
- XMR_FS_LEN_ERR
 
- XMR_FS_LEN_SHIFT
 
- XMR_FS_LNG_ERR
 
- XMR_FS_MC
 
- XMR_FS_MCTRL
 
- XMR_FS_RUNT
 
- XMR_FS_UC
 
- XMR_INV_MOC
 
- XMR_INV_MP
 
- XMR_JAB_PKT_OV
 
- XMR_LNG_ERR_OV
 
- XMR_MAX_SZ_OV
 
- XMR_MCTRL_OV
 
- XMR_MC_OK_OV
 
- XMR_MPAUSE_OV
 
- XMR_OK_HI_OV
 
- XMR_OK_LO_OV
 
- XMR_OK_OV
 
- XMR_RUNT_OV
 
- XMR_SHT_ERR_OV
 
- XMR_SYM_ERR_OV
 
- XMR_UC_OK_OV
 
- XMR_UTIL_OV
 
- XMR_UTIL_UR
 
- XMSGSIZE
 
- XMTBRST
 
- XMTCONTEN
 
- XMTE
 
- XMTFC_MASK
 
- XMTFC_SH
 
- XMTFIFOTBL_STARTREV
 
- XMTFWU
 
- XMTFW_16
 
- XMTFW_32
 
- XMTFW_8
 
- XMTINT
 
- XMTPFRM
 
- XMTPIMM
 
- XMTPSIZE_CONT
 
- XMTPSIZE_INF
 
- XMTPSIZE_MASK
 
- XMTPSIZE_REDUNDANT
 
- XMTPSIZE_REPEATED
 
- XMTPSIZE_SINGLE
 
- XMTPSIZE_TRIPLE
 
- XMTRDY
 
- XMTRX_M4
 
- XMTSEL
 
- XMTSP_112
 
- XMTSP_128
 
- XMTSP_16
 
- XMTSP_4
 
- XMTSP_64
 
- XMTSP_MASK
 
- XMTSV
 
- XMTU
 
- XMT_1023B_OV
 
- XMT_127B_OV
 
- XMT_255B_OV
 
- XMT_511B_OV
 
- XMT_64B_OV
 
- XMT_ABO_COL_OV
 
- XMT_BC_OK_OV
 
- XMT_BUFF_K_DA
 
- XMT_BUFF_K_DATA
 
- XMT_BUFF_K_FC
 
- XMT_BUFF_K_SA
 
- XMT_BURST
 
- XMT_CS_ERR_OV
 
- XMT_DEF
 
- XMT_DEF_MSK
 
- XMT_DRIVER_DESCR
 
- XMT_EN
 
- XMT_EX_DEF_OV
 
- XMT_FIFO_UR_OV
 
- XMT_LAT_COL_OV
 
- XMT_LONG
 
- XMT_MAX_SZ_OV
 
- XMT_MCTRL_OV
 
- XMT_MC_OK_OV
 
- XMT_MPAUSE
 
- XMT_MUL_COL_OV
 
- XMT_OK_HI_OV
 
- XMT_OK_LO_OV
 
- XMT_OK_OV
 
- XMT_RING0_LIMIT
 
- XMT_RING1_LIMIT
 
- XMT_RING2_LIMIT
 
- XMT_RING_BASE_ADDR0
 
- XMT_RING_BASE_ADDR1
 
- XMT_RING_BASE_ADDR2
 
- XMT_RING_BASE_ADDR3
 
- XMT_RING_LEN0
 
- XMT_RING_LEN1
 
- XMT_RING_LEN2
 
- XMT_RING_LEN3
 
- XMT_RING_LIMIT
 
- XMT_RING_LIMIT_BITS
 
- XMT_SEQ_FIELDS64
 
- XMT_SNG_COL
 
- XMT_UC_OK_OV
 
- XMT_UTIL_OV
 
- XMT_UTIL_UR
 
- XMT_VIA_SKB
 
- XM_1L_VLAN_TAG
 
- XM_2L_VLAN_TAG
 
- XM_BURST
 
- XM_CTL_PARA
 
- XM_DEF_MODE
 
- XM_DEV_ID
 
- XM_DEV_OUI
 
- XM_DEV_REV
 
- XM_EXM
 
- XM_EXM_START
 
- XM_GP_ANIP
 
- XM_GP_FRC_INT
 
- XM_GP_INP_ASS
 
- XM_GP_PORT
 
- XM_GP_RES_MAC
 
- XM_GP_RES_STAT
 
- XM_HSM
 
- XM_HT_THR
 
- XM_HW_CFG
 
- XM_HW_COM4SIG
 
- XM_HW_GEN_EOP
 
- XM_HW_GMII_MD
 
- XM_IMSK
 
- XM_IMSK_DISABLE
 
- XM_IPG_MSK
 
- XM_ISRC
 
- XM_IS_AND
 
- XM_IS_FRC_INT
 
- XM_IS_INP_ASS
 
- XM_IS_LIPA_RC
 
- XM_IS_LNK_AE
 
- XM_IS_RXC_OV
 
- XM_IS_RXF_OV
 
- XM_IS_RX_COMP
 
- XM_IS_RX_PAGE
 
- XM_IS_TSC_OV
 
- XM_IS_TXC_OV
 
- XM_IS_TXF_UR
 
- XM_IS_TX_ABORT
 
- XM_IS_TX_COMP
 
- XM_IS_TX_PAGE
 
- XM_LSA
 
- XM_MAC_OPCODE
 
- XM_MAC_PTIME
 
- XM_MASK
 
- XM_MD_ATS
 
- XM_MD_CAA
 
- XM_MD_CAP
 
- XM_MD_CSA
 
- XM_MD_DIS_BC
 
- XM_MD_DIS_MC
 
- XM_MD_DIS_UC
 
- XM_MD_ENA_BE
 
- XM_MD_ENA_HASH
 
- XM_MD_ENA_PROM
 
- XM_MD_ENA_REJ
 
- XM_MD_FRF
 
- XM_MD_FTF
 
- XM_MD_LE_STW
 
- XM_MD_RX_CRCE
 
- XM_MD_RX_ERR
 
- XM_MD_RX_IRLE
 
- XM_MD_RX_LONG
 
- XM_MD_RX_MCTRL
 
- XM_MD_RX_RUNT
 
- XM_MD_SPOE_E
 
- XM_MD_SPOFF_I
 
- XM_MD_SPOH_I
 
- XM_MD_SPOL_I
 
- XM_MD_TX_CONT
 
- XM_MD_TX_PAUSE
 
- XM_MD_TX_REP
 
- XM_MMU_CMD
 
- XM_MMU_ENA_RX
 
- XM_MMU_ENA_TX
 
- XM_MMU_FRC_COL
 
- XM_MMU_GMII_FD
 
- XM_MMU_GMII_LOOP
 
- XM_MMU_IGN_PF
 
- XM_MMU_MAC_LB
 
- XM_MMU_NO_PRE
 
- XM_MMU_PHY_BUSY
 
- XM_MMU_PHY_RDY
 
- XM_MMU_RAT_CTRL
 
- XM_MMU_SIM_COL
 
- XM_MODE
 
- XM_PAUSE_DA
 
- XM_PAUSE_MODE
 
- XM_PHY_ADDR
 
- XM_PHY_DATA
 
- XM_POFF
 
- XM_RT_LIM_MSK
 
- XM_RXE_BURST
 
- XM_RXE_CAR_ERR
 
- XM_RXE_FIFO_OV
 
- XM_RXE_FMISS
 
- XM_RXE_RUNT
 
- XM_RXE_SHT_ERR
 
- XM_RXE_SYM_ERR
 
- XM_RXF_1023B
 
- XM_RXF_127B
 
- XM_RXF_255B
 
- XM_RXF_511B
 
- XM_RXF_64B
 
- XM_RXF_BC_OK
 
- XM_RXF_CEX_ERR
 
- XM_RXF_FCS_ERR
 
- XM_RXF_FRA_ERR
 
- XM_RXF_INV_MOC
 
- XM_RXF_INV_MP
 
- XM_RXF_JAB_PKT
 
- XM_RXF_LEN_ERR
 
- XM_RXF_LNG_ERR
 
- XM_RXF_MAX_SZ
 
- XM_RXF_MCTRL
 
- XM_RXF_MC_OK
 
- XM_RXF_MPAUSE
 
- XM_RXF_OK
 
- XM_RXF_UC_OK
 
- XM_RXO_OK_HI
 
- XM_RXO_OK_LO
 
- XM_RXP_UTIL
 
- XM_RX_BIG_PK_OK
 
- XM_RX_CMD
 
- XM_RX_CNT_EV
 
- XM_RX_DIS_CEXT
 
- XM_RX_EV_MSK
 
- XM_RX_HI_WM
 
- XM_RX_IPG_CAP
 
- XM_RX_LENERR_OK
 
- XM_RX_LO_WM
 
- XM_RX_SAM_LINE
 
- XM_RX_SELF_RX
 
- XM_RX_STRIP_FCS
 
- XM_RX_STRIP_PAD
 
- XM_RX_THR
 
- XM_RX_TP_MD
 
- XM_RX_WM_MSK
 
- XM_SA
 
- XM_SC_CLR_RXC
 
- XM_SC_CLR_TXC
 
- XM_SC_CP_RXC
 
- XM_SC_CP_TXC
 
- XM_SC_SNP_RXC
 
- XM_SC_SNP_TXC
 
- XM_SHIFT_BIT
 
- XM_SRC_CHK
 
- XM_STAT_CMD
 
- XM_STIME_MSK
 
- XM_ST_BC
 
- XM_ST_BURST
 
- XM_ST_BYTE_CNT
 
- XM_ST_CS_ERR
 
- XM_ST_DEFER
 
- XM_ST_EX_COL
 
- XM_ST_EX_DEF
 
- XM_ST_LAT_COL
 
- XM_ST_MC
 
- XM_ST_MUL_COL
 
- XM_ST_RETRY_CNT
 
- XM_ST_SGN_COL
 
- XM_ST_TX_UR
 
- XM_ST_UC
 
- XM_ST_VALID
 
- XM_THR_MSK
 
- XM_TS_LOAD
 
- XM_TS_READ
 
- XM_TXE_BURST
 
- XM_TXE_CS_ERR
 
- XM_TXE_FIFO_UR
 
- XM_TXF_1023B
 
- XM_TXF_127B
 
- XM_TXF_255B
 
- XM_TXF_511B
 
- XM_TXF_64B
 
- XM_TXF_ABO_COL
 
- XM_TXF_BC_OK
 
- XM_TXF_DEF
 
- XM_TXF_EX_DEF
 
- XM_TXF_LAT_COL
 
- XM_TXF_LONG
 
- XM_TXF_MAX_SZ
 
- XM_TXF_MCTRL
 
- XM_TXF_MC_OK
 
- XM_TXF_MPAUSE
 
- XM_TXF_MUL_COL
 
- XM_TXF_OK
 
- XM_TXF_SNG_COL
 
- XM_TXF_UC_OK
 
- XM_TXO_OK_HI
 
- XM_TXO_OK_LO
 
- XM_TXP_UTIL
 
- XM_TX_AUTO_PAD
 
- XM_TX_BK2BK
 
- XM_TX_CMD
 
- XM_TX_CNT_EV
 
- XM_TX_ENC_BYP
 
- XM_TX_EV_MSK
 
- XM_TX_HI_WM
 
- XM_TX_IPG
 
- XM_TX_LO_WM
 
- XM_TX_NO_CRC
 
- XM_TX_NO_GIG_MD
 
- XM_TX_NO_PRE
 
- XM_TX_RT_LIM
 
- XM_TX_SAM_LINE
 
- XM_TX_STAT
 
- XM_TX_STIME
 
- XM_TX_THR
 
- XM_TX_WM_MSK
 
- XM_VECTOR
 
- XN
 
- XNMLN
 
- XNOR
 
- XNORM
 
- XNORM_A
 
- XNORM_B
 
- XNRES
 
- XN_MASK
 
- XN_SHIFT
 
- XO
 
- XO1
 
- XO15_EBOOK_CLASS
 
- XO15_EBOOK_DEVICE_NAME
 
- XO15_EBOOK_HID
 
- XO15_EBOOK_NOTIFY_STATUS
 
- XO15_EBOOK_SUBCLASS
 
- XO15_EBOOK_TYPE_UNKNOWN
 
- XO15_SCI_CLASS
 
- XO15_SCI_DEVICE_NAME
 
- XO2
 
- XO3
 
- XO4
 
- XOADC_CHAN
 
- XOADC_RSV_MAX
 
- XOB
 
- XOFF
 
- XOFF1
 
- XOFF2
 
- XOFFL
 
- XOFFL_SET
 
- XOFFSET
 
- XOFF_F
 
- XOFF_S
 
- XOFF_THRESHOLD_MASK
 
- XOFF_V
 
- XON
 
- XON1
 
- XON2
 
- XONAR_DG_H_INCLUDED
 
- XONAR_GPIO_BIT_INVERT
 
- XONAR_H_INCLUDED
 
- XONLY
 
- XON_EN
 
- XOPL
 
- XOPL2
 
- XOPS
 
- XOPS_MASK
 
- XOP_BTCK
 
- XOP_DCBTLS
 
- XOP_EHPRIV
 
- XOP_MFTMR
 
- XOP_MSGCLR
 
- XOP_MSGSND
 
- XOP_TLBILX
 
- XOP_TLBIVAX
 
- XOP_TLBRE
 
- XOP_TLBSX
 
- XOP_TLBWE
 
- XOR
 
- XORB_MASK
 
- XOR_ACTIVATION
 
- XOR_ARMADA_37XX
 
- XOR_ARMADA_38X
 
- XOR_BLOCK_2
 
- XOR_BLOCK_4
 
- XOR_BLOCK_SIZE
 
- XOR_BYTE_COUNT
 
- XOR_CBCR_CBCE_BIT
 
- XOR_CBCR_LNK_BIT
 
- XOR_CBCR_RNZE_BIT
 
- XOR_CBCR_TGT_BIT
 
- XOR_CBCR_XNOR_BIT
 
- XOR_CDCR_OAC_MSK
 
- XOR_CHK_ALL
 
- XOR_CHK_DIS
 
- XOR_CONFIG
 
- XOR_CONSTANT_CONSTRAINT
 
- XOR_CRSR_64BA_BIT
 
- XOR_CRSR_CLP_BIT
 
- XOR_CRSR_PAUS_BIT
 
- XOR_CRSR_RCBE_BIT
 
- XOR_CRSR_XAE_BIT
 
- XOR_CRSR_XASR_BIT
 
- XOR_CURR_DESC
 
- XOR_DESCRIPTOR_SWAP
 
- XOR_DESC_DMA_OWNED
 
- XOR_DESC_EOD_INT_EN
 
- XOR_DESC_OPERATION_CRC32C
 
- XOR_DESC_OPERATION_MEMCPY
 
- XOR_DESC_OPERATION_XOR
 
- XOR_DESC_SUCCESS
 
- XOR_DEST_POINTER
 
- XOR_ENGINES_NUM
 
- XOR_ERROR_ADDR
 
- XOR_ERROR_CAUSE
 
- XOR_IE_CBCIE_BIT
 
- XOR_IE_CBLCI_BIT
 
- XOR_IE_ICBIE_BIT
 
- XOR_IE_ICIE_BIT
 
- XOR_IE_RPTIE_BIT
 
- XOR_INIT_VALUE_HIGH
 
- XOR_INIT_VALUE_LOW
 
- XOR_INTR_CAUSE
 
- XOR_INTR_ERRORS
 
- XOR_INTR_MASK
 
- XOR_INTR_MASK_VALUE
 
- XOR_INT_END_OF_CHAIN
 
- XOR_INT_END_OF_DESC
 
- XOR_INT_ERR_DECODE
 
- XOR_INT_ERR_MBUS
 
- XOR_INT_ERR_OWN
 
- XOR_INT_ERR_PAR
 
- XOR_INT_ERR_RDPROT
 
- XOR_INT_ERR_WRPROT
 
- XOR_INT_PAUSED
 
- XOR_INT_STOPPED
 
- XOR_MAX_OPS
 
- XOR_MODE_IN_DESC
 
- XOR_MODE_IN_REG
 
- XOR_NEXT_DESC
 
- XOR_OPERATION_MODE_IN_DESC
 
- XOR_OPERATION_MODE_MEMCPY
 
- XOR_OPERATION_MODE_XOR
 
- XOR_ORION
 
- XOR_ROP
 
- XOR_SELECT_TEMPLATE
 
- XOR_SPEED_ALTIVEC
 
- XOR_SR_CBC_BIT
 
- XOR_SR_CBLC_BIT
 
- XOR_SR_ICB_BIT
 
- XOR_SR_IC_BIT
 
- XOR_SR_IPE_BIT
 
- XOR_SR_RNZ_BIT
 
- XOR_SR_XCP_BIT
 
- XOR_TRY_TEMPLATES
 
- XOUT_L
 
- XOVFLEN
 
- XO_CLK_RATE
 
- XO_MASK
 
- XO_VOW_CK_EN_PERIODIC_INVERSE_MASK
 
- XO_VOW_CK_EN_PERIODIC_INVERSE_MASK_SFT
 
- XO_VOW_CK_EN_PERIODIC_INVERSE_SFT
 
- XO_VOW_CK_EN_PERIODIC_MODE_MASK
 
- XO_VOW_CK_EN_PERIODIC_MODE_MASK_SFT
 
- XO_VOW_CK_EN_PERIODIC_MODE_SFT
 
- XO_VOW_CK_EN_PERIODIC_OFF_CYCLE_MASK
 
- XO_VOW_CK_EN_PERIODIC_OFF_CYCLE_MASK_SFT
 
- XO_VOW_CK_EN_PERIODIC_OFF_CYCLE_SFT
 
- XO_VOW_CK_EN_PERIODIC_ON_CYCLE_MASK
 
- XO_VOW_CK_EN_PERIODIC_ON_CYCLE_MASK_SFT
 
- XO_VOW_CK_EN_PERIODIC_ON_CYCLE_SFT
 
- XPABLK
 
- XPADDR
 
- XPAD_NUM_OUT_PACKETS
 
- XPAD_OUT_CMD_IDX
 
- XPAD_OUT_FF_IDX
 
- XPAD_OUT_LED_IDX
 
- XPAD_PKT_LEN
 
- XPAD_XBOX360_VENDOR
 
- XPAD_XBOX360_VENDOR_PROTOCOL
 
- XPAD_XBOXONE_VENDOR
 
- XPAD_XBOXONE_VENDOR_PROTOCOL
 
- XPA_LVL_FREQ
 
- XPBBLK
 
- XPB_CLG_CFG0__HOST_FLUSH_MASK
 
- XPB_CLG_CFG0__HOST_FLUSH__SHIFT
 
- XPB_CLG_CFG0__LB_TYPE_MASK
 
- XPB_CLG_CFG0__LB_TYPE__SHIFT
 
- XPB_CLG_CFG0__P2P_BAR_MASK
 
- XPB_CLG_CFG0__P2P_BAR__SHIFT
 
- XPB_CLG_CFG0__SIDE_FLUSH_MASK
 
- XPB_CLG_CFG0__SIDE_FLUSH__SHIFT
 
- XPB_CLG_CFG0__WCB_NUM_MASK
 
- XPB_CLG_CFG0__WCB_NUM__SHIFT
 
- XPB_CLG_CFG1__HOST_FLUSH_MASK
 
- XPB_CLG_CFG1__HOST_FLUSH__SHIFT
 
- XPB_CLG_CFG1__LB_TYPE_MASK
 
- XPB_CLG_CFG1__LB_TYPE__SHIFT
 
- XPB_CLG_CFG1__P2P_BAR_MASK
 
- XPB_CLG_CFG1__P2P_BAR__SHIFT
 
- XPB_CLG_CFG1__SIDE_FLUSH_MASK
 
- XPB_CLG_CFG1__SIDE_FLUSH__SHIFT
 
- XPB_CLG_CFG1__WCB_NUM_MASK
 
- XPB_CLG_CFG1__WCB_NUM__SHIFT
 
- XPB_CLG_CFG2__HOST_FLUSH_MASK
 
- XPB_CLG_CFG2__HOST_FLUSH__SHIFT
 
- XPB_CLG_CFG2__LB_TYPE_MASK
 
- XPB_CLG_CFG2__LB_TYPE__SHIFT
 
- XPB_CLG_CFG2__P2P_BAR_MASK
 
- XPB_CLG_CFG2__P2P_BAR__SHIFT
 
- XPB_CLG_CFG2__SIDE_FLUSH_MASK
 
- XPB_CLG_CFG2__SIDE_FLUSH__SHIFT
 
- XPB_CLG_CFG2__WCB_NUM_MASK
 
- XPB_CLG_CFG2__WCB_NUM__SHIFT
 
- XPB_CLG_CFG3__HOST_FLUSH_MASK
 
- XPB_CLG_CFG3__HOST_FLUSH__SHIFT
 
- XPB_CLG_CFG3__LB_TYPE_MASK
 
- XPB_CLG_CFG3__LB_TYPE__SHIFT
 
- XPB_CLG_CFG3__P2P_BAR_MASK
 
- XPB_CLG_CFG3__P2P_BAR__SHIFT
 
- XPB_CLG_CFG3__SIDE_FLUSH_MASK
 
- XPB_CLG_CFG3__SIDE_FLUSH__SHIFT
 
- XPB_CLG_CFG3__WCB_NUM_MASK
 
- XPB_CLG_CFG3__WCB_NUM__SHIFT
 
- XPB_CLG_CFG4__HOST_FLUSH_MASK
 
- XPB_CLG_CFG4__HOST_FLUSH__SHIFT
 
- XPB_CLG_CFG4__LB_TYPE_MASK
 
- XPB_CLG_CFG4__LB_TYPE__SHIFT
 
- XPB_CLG_CFG4__P2P_BAR_MASK
 
- XPB_CLG_CFG4__P2P_BAR__SHIFT
 
- XPB_CLG_CFG4__SIDE_FLUSH_MASK
 
- XPB_CLG_CFG4__SIDE_FLUSH__SHIFT
 
- XPB_CLG_CFG4__WCB_NUM_MASK
 
- XPB_CLG_CFG4__WCB_NUM__SHIFT
 
- XPB_CLG_CFG5__HOST_FLUSH_MASK
 
- XPB_CLG_CFG5__HOST_FLUSH__SHIFT
 
- XPB_CLG_CFG5__LB_TYPE_MASK
 
- XPB_CLG_CFG5__LB_TYPE__SHIFT
 
- XPB_CLG_CFG5__P2P_BAR_MASK
 
- XPB_CLG_CFG5__P2P_BAR__SHIFT
 
- XPB_CLG_CFG5__SIDE_FLUSH_MASK
 
- XPB_CLG_CFG5__SIDE_FLUSH__SHIFT
 
- XPB_CLG_CFG5__WCB_NUM_MASK
 
- XPB_CLG_CFG5__WCB_NUM__SHIFT
 
- XPB_CLG_CFG6__HOST_FLUSH_MASK
 
- XPB_CLG_CFG6__HOST_FLUSH__SHIFT
 
- XPB_CLG_CFG6__LB_TYPE_MASK
 
- XPB_CLG_CFG6__LB_TYPE__SHIFT
 
- XPB_CLG_CFG6__P2P_BAR_MASK
 
- XPB_CLG_CFG6__P2P_BAR__SHIFT
 
- XPB_CLG_CFG6__SIDE_FLUSH_MASK
 
- XPB_CLG_CFG6__SIDE_FLUSH__SHIFT
 
- XPB_CLG_CFG6__WCB_NUM_MASK
 
- XPB_CLG_CFG6__WCB_NUM__SHIFT
 
- XPB_CLG_CFG7__HOST_FLUSH_MASK
 
- XPB_CLG_CFG7__HOST_FLUSH__SHIFT
 
- XPB_CLG_CFG7__LB_TYPE_MASK
 
- XPB_CLG_CFG7__LB_TYPE__SHIFT
 
- XPB_CLG_CFG7__P2P_BAR_MASK
 
- XPB_CLG_CFG7__P2P_BAR__SHIFT
 
- XPB_CLG_CFG7__SIDE_FLUSH_MASK
 
- XPB_CLG_CFG7__SIDE_FLUSH__SHIFT
 
- XPB_CLG_CFG7__WCB_NUM_MASK
 
- XPB_CLG_CFG7__WCB_NUM__SHIFT
 
- XPB_CLG_EXTRA_MSK_RD__MSK0_HIGH_MASK
 
- XPB_CLG_EXTRA_MSK_RD__MSK0_HIGH__SHIFT
 
- XPB_CLG_EXTRA_MSK_RD__MSK0_LOW_MASK
 
- XPB_CLG_EXTRA_MSK_RD__MSK0_LOW__SHIFT
 
- XPB_CLG_EXTRA_MSK_RD__MSK1_HIGH_MASK
 
- XPB_CLG_EXTRA_MSK_RD__MSK1_HIGH__SHIFT
 
- XPB_CLG_EXTRA_MSK_RD__MSK1_LOW_MASK
 
- XPB_CLG_EXTRA_MSK_RD__MSK1_LOW__SHIFT
 
- XPB_CLG_EXTRA_MSK__MSK0_HIGH_MASK
 
- XPB_CLG_EXTRA_MSK__MSK0_HIGH__SHIFT
 
- XPB_CLG_EXTRA_MSK__MSK0_LOW_MASK
 
- XPB_CLG_EXTRA_MSK__MSK0_LOW__SHIFT
 
- XPB_CLG_EXTRA_MSK__MSK1_HIGH_MASK
 
- XPB_CLG_EXTRA_MSK__MSK1_HIGH__SHIFT
 
- XPB_CLG_EXTRA_MSK__MSK1_LOW_MASK
 
- XPB_CLG_EXTRA_MSK__MSK1_LOW__SHIFT
 
- XPB_CLG_EXTRA_RD__CLG0_NUM_MASK
 
- XPB_CLG_EXTRA_RD__CLG0_NUM__SHIFT
 
- XPB_CLG_EXTRA_RD__CLG1_NUM_MASK
 
- XPB_CLG_EXTRA_RD__CLG1_NUM__SHIFT
 
- XPB_CLG_EXTRA_RD__CMP0_HIGH_MASK
 
- XPB_CLG_EXTRA_RD__CMP0_HIGH__SHIFT
 
- XPB_CLG_EXTRA_RD__CMP0_LOW_MASK
 
- XPB_CLG_EXTRA_RD__CMP0_LOW__SHIFT
 
- XPB_CLG_EXTRA_RD__CMP1_HIGH_MASK
 
- XPB_CLG_EXTRA_RD__CMP1_HIGH__SHIFT
 
- XPB_CLG_EXTRA_RD__CMP1_LOW_MASK
 
- XPB_CLG_EXTRA_RD__CMP1_LOW__SHIFT
 
- XPB_CLG_EXTRA_RD__VLD0_MASK
 
- XPB_CLG_EXTRA_RD__VLD0__SHIFT
 
- XPB_CLG_EXTRA_RD__VLD1_MASK
 
- XPB_CLG_EXTRA_RD__VLD1__SHIFT
 
- XPB_CLG_EXTRA__CLG0_NUM_MASK
 
- XPB_CLG_EXTRA__CLG0_NUM__SHIFT
 
- XPB_CLG_EXTRA__CLG1_NUM_MASK
 
- XPB_CLG_EXTRA__CLG1_NUM__SHIFT
 
- XPB_CLG_EXTRA__CMP0_HIGH_MASK
 
- XPB_CLG_EXTRA__CMP0_HIGH__SHIFT
 
- XPB_CLG_EXTRA__CMP0_LOW_MASK
 
- XPB_CLG_EXTRA__CMP0_LOW__SHIFT
 
- XPB_CLG_EXTRA__CMP1_HIGH_MASK
 
- XPB_CLG_EXTRA__CMP1_HIGH__SHIFT
 
- XPB_CLG_EXTRA__CMP1_LOW_MASK
 
- XPB_CLG_EXTRA__CMP1_LOW__SHIFT
 
- XPB_CLG_EXTRA__VLD0_MASK
 
- XPB_CLG_EXTRA__VLD0__SHIFT
 
- XPB_CLG_EXTRA__VLD1_MASK
 
- XPB_CLG_EXTRA__VLD1__SHIFT
 
- XPB_CLG_GFX_MATCH_MSK__FARBIRC0_ID_MSK_MASK
 
- XPB_CLG_GFX_MATCH_MSK__FARBIRC0_ID_MSK__SHIFT
 
- XPB_CLG_GFX_MATCH_MSK__FARBIRC1_ID_MSK_MASK
 
- XPB_CLG_GFX_MATCH_MSK__FARBIRC1_ID_MSK__SHIFT
 
- XPB_CLG_GFX_MATCH_MSK__FARBIRC2_ID_MSK_MASK
 
- XPB_CLG_GFX_MATCH_MSK__FARBIRC2_ID_MSK__SHIFT
 
- XPB_CLG_GFX_MATCH_MSK__FARBIRC3_ID_MSK_MASK
 
- XPB_CLG_GFX_MATCH_MSK__FARBIRC3_ID_MSK__SHIFT
 
- XPB_CLG_GFX_MATCH__FARBIRC0_ID_MASK
 
- XPB_CLG_GFX_MATCH__FARBIRC0_ID__SHIFT
 
- XPB_CLG_GFX_MATCH__FARBIRC0_VLD_MASK
 
- XPB_CLG_GFX_MATCH__FARBIRC0_VLD__SHIFT
 
- XPB_CLG_GFX_MATCH__FARBIRC1_ID_MASK
 
- XPB_CLG_GFX_MATCH__FARBIRC1_ID__SHIFT
 
- XPB_CLG_GFX_MATCH__FARBIRC1_VLD_MASK
 
- XPB_CLG_GFX_MATCH__FARBIRC1_VLD__SHIFT
 
- XPB_CLG_GFX_MATCH__FARBIRC2_ID_MASK
 
- XPB_CLG_GFX_MATCH__FARBIRC2_ID__SHIFT
 
- XPB_CLG_GFX_MATCH__FARBIRC2_VLD_MASK
 
- XPB_CLG_GFX_MATCH__FARBIRC2_VLD__SHIFT
 
- XPB_CLG_GFX_MATCH__FARBIRC3_ID_MASK
 
- XPB_CLG_GFX_MATCH__FARBIRC3_ID__SHIFT
 
- XPB_CLG_GFX_MATCH__FARBIRC3_VLD_MASK
 
- XPB_CLG_GFX_MATCH__FARBIRC3_VLD__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING0__DEST_CLG_NUM_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING0__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING0__UNITID_LOW_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING0__UNITID_LOW__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING0__UNITID_VLD_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING0__UNITID_VLD__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING1__DEST_CLG_NUM_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING1__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING1__UNITID_LOW_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING1__UNITID_LOW__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING1__UNITID_VLD_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING1__UNITID_VLD__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING2__DEST_CLG_NUM_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING2__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING2__UNITID_LOW_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING2__UNITID_LOW__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING2__UNITID_VLD_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING2__UNITID_VLD__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING3__DEST_CLG_NUM_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING3__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING3__UNITID_LOW_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING3__UNITID_LOW__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING3__UNITID_VLD_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING3__UNITID_VLD__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING4__DEST_CLG_NUM_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING4__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING4__UNITID_LOW_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING4__UNITID_LOW__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING4__UNITID_VLD_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING4__UNITID_VLD__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING5__DEST_CLG_NUM_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING5__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING5__UNITID_LOW_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING5__UNITID_LOW__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING5__UNITID_VLD_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING5__UNITID_VLD__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING6__DEST_CLG_NUM_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING6__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING6__UNITID_LOW_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING6__UNITID_LOW__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING6__UNITID_VLD_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING6__UNITID_VLD__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING7__DEST_CLG_NUM_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING7__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING7__UNITID_LOW_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING7__UNITID_LOW__SHIFT
 
- XPB_CLG_GFX_UNITID_MAPPING7__UNITID_VLD_MASK
 
- XPB_CLG_GFX_UNITID_MAPPING7__UNITID_VLD__SHIFT
 
- XPB_CLG_GUS_MATCH_MSK__FARBIRC0_ID_MSK_MASK
 
- XPB_CLG_GUS_MATCH_MSK__FARBIRC0_ID_MSK__SHIFT
 
- XPB_CLG_GUS_MATCH__FARBIRC0_ID_MASK
 
- XPB_CLG_GUS_MATCH__FARBIRC0_ID__SHIFT
 
- XPB_CLG_GUS_MATCH__FARBIRC0_VLD_MASK
 
- XPB_CLG_GUS_MATCH__FARBIRC0_VLD__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING0__DEST_CLG_NUM_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING0__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING0__UNITID_LOW_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING0__UNITID_LOW__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING0__UNITID_VLD_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING0__UNITID_VLD__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING1__DEST_CLG_NUM_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING1__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING1__UNITID_LOW_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING1__UNITID_LOW__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING1__UNITID_VLD_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING1__UNITID_VLD__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING2__DEST_CLG_NUM_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING2__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING2__UNITID_LOW_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING2__UNITID_LOW__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING2__UNITID_VLD_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING2__UNITID_VLD__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING3__DEST_CLG_NUM_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING3__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING3__UNITID_LOW_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING3__UNITID_LOW__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING3__UNITID_VLD_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING3__UNITID_VLD__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING4__DEST_CLG_NUM_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING4__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING4__UNITID_LOW_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING4__UNITID_LOW__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING4__UNITID_VLD_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING4__UNITID_VLD__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING5__DEST_CLG_NUM_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING5__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING5__UNITID_LOW_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING5__UNITID_LOW__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING5__UNITID_VLD_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING5__UNITID_VLD__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING6__DEST_CLG_NUM_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING6__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING6__UNITID_LOW_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING6__UNITID_LOW__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING6__UNITID_VLD_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING6__UNITID_VLD__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING7__DEST_CLG_NUM_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING7__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING7__UNITID_LOW_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING7__UNITID_LOW__SHIFT
 
- XPB_CLG_GUS_UNITID_MAPPING7__UNITID_VLD_MASK
 
- XPB_CLG_GUS_UNITID_MAPPING7__UNITID_VLD__SHIFT
 
- XPB_CLG_MM_MATCH_MSK__FARBIRC0_ID_MSK_MASK
 
- XPB_CLG_MM_MATCH_MSK__FARBIRC0_ID_MSK__SHIFT
 
- XPB_CLG_MM_MATCH_MSK__FARBIRC1_ID_MSK_MASK
 
- XPB_CLG_MM_MATCH_MSK__FARBIRC1_ID_MSK__SHIFT
 
- XPB_CLG_MM_MATCH_MSK__FARBIRC2_ID_MSK_MASK
 
- XPB_CLG_MM_MATCH_MSK__FARBIRC2_ID_MSK__SHIFT
 
- XPB_CLG_MM_MATCH_MSK__FARBIRC3_ID_MSK_MASK
 
- XPB_CLG_MM_MATCH_MSK__FARBIRC3_ID_MSK__SHIFT
 
- XPB_CLG_MM_MATCH__FARBIRC0_ID_MASK
 
- XPB_CLG_MM_MATCH__FARBIRC0_ID__SHIFT
 
- XPB_CLG_MM_MATCH__FARBIRC0_VLD_MASK
 
- XPB_CLG_MM_MATCH__FARBIRC0_VLD__SHIFT
 
- XPB_CLG_MM_MATCH__FARBIRC1_ID_MASK
 
- XPB_CLG_MM_MATCH__FARBIRC1_ID__SHIFT
 
- XPB_CLG_MM_MATCH__FARBIRC1_VLD_MASK
 
- XPB_CLG_MM_MATCH__FARBIRC1_VLD__SHIFT
 
- XPB_CLG_MM_MATCH__FARBIRC2_ID_MASK
 
- XPB_CLG_MM_MATCH__FARBIRC2_ID__SHIFT
 
- XPB_CLG_MM_MATCH__FARBIRC2_VLD_MASK
 
- XPB_CLG_MM_MATCH__FARBIRC2_VLD__SHIFT
 
- XPB_CLG_MM_MATCH__FARBIRC3_ID_MASK
 
- XPB_CLG_MM_MATCH__FARBIRC3_ID__SHIFT
 
- XPB_CLG_MM_MATCH__FARBIRC3_VLD_MASK
 
- XPB_CLG_MM_MATCH__FARBIRC3_VLD__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING0__DEST_CLG_NUM_MASK
 
- XPB_CLG_MM_UNITID_MAPPING0__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING0__UNITID_LOW_MASK
 
- XPB_CLG_MM_UNITID_MAPPING0__UNITID_LOW__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING0__UNITID_VLD_MASK
 
- XPB_CLG_MM_UNITID_MAPPING0__UNITID_VLD__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING1__DEST_CLG_NUM_MASK
 
- XPB_CLG_MM_UNITID_MAPPING1__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING1__UNITID_LOW_MASK
 
- XPB_CLG_MM_UNITID_MAPPING1__UNITID_LOW__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING1__UNITID_VLD_MASK
 
- XPB_CLG_MM_UNITID_MAPPING1__UNITID_VLD__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING2__DEST_CLG_NUM_MASK
 
- XPB_CLG_MM_UNITID_MAPPING2__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING2__UNITID_LOW_MASK
 
- XPB_CLG_MM_UNITID_MAPPING2__UNITID_LOW__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING2__UNITID_VLD_MASK
 
- XPB_CLG_MM_UNITID_MAPPING2__UNITID_VLD__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING3__DEST_CLG_NUM_MASK
 
- XPB_CLG_MM_UNITID_MAPPING3__DEST_CLG_NUM__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING3__UNITID_LOW_MASK
 
- XPB_CLG_MM_UNITID_MAPPING3__UNITID_LOW__SHIFT
 
- XPB_CLG_MM_UNITID_MAPPING3__UNITID_VLD_MASK
 
- XPB_CLG_MM_UNITID_MAPPING3__UNITID_VLD__SHIFT
 
- XPB_CLK_GAT__ENABLE_MASK
 
- XPB_CLK_GAT__ENABLE__SHIFT
 
- XPB_CLK_GAT__MEM_LS_ENABLE_MASK
 
- XPB_CLK_GAT__MEM_LS_ENABLE__SHIFT
 
- XPB_CLK_GAT__OFFDLY_MASK
 
- XPB_CLK_GAT__OFFDLY__SHIFT
 
- XPB_CLK_GAT__ONDLY_MASK
 
- XPB_CLK_GAT__ONDLY__SHIFT
 
- XPB_CLK_GAT__RDYDLY_MASK
 
- XPB_CLK_GAT__RDYDLY__SHIFT
 
- XPB_HST_CFG__BAR_UP_WR_CMD_MASK
 
- XPB_HST_CFG__BAR_UP_WR_CMD__SHIFT
 
- XPB_INTF_CFG2__RPB_RDREQ_CRD_MASK
 
- XPB_INTF_CFG2__RPB_RDREQ_CRD__SHIFT
 
- XPB_INTF_CFG__BIF_MEM_SNOOP_SEL_MASK
 
- XPB_INTF_CFG__BIF_MEM_SNOOP_SEL__SHIFT
 
- XPB_INTF_CFG__BIF_MEM_SNOOP_VAL_MASK
 
- XPB_INTF_CFG__BIF_MEM_SNOOP_VAL__SHIFT
 
- XPB_INTF_CFG__BIF_REG_SNOOP_SEL_MASK
 
- XPB_INTF_CFG__BIF_REG_SNOOP_SEL__SHIFT
 
- XPB_INTF_CFG__BIF_REG_SNOOP_VAL_MASK
 
- XPB_INTF_CFG__BIF_REG_SNOOP_VAL__SHIFT
 
- XPB_INTF_CFG__MC_WRRET_ASK_MASK
 
- XPB_INTF_CFG__MC_WRRET_ASK__SHIFT
 
- XPB_INTF_CFG__RPB_WRREQ_CRD_MASK
 
- XPB_INTF_CFG__RPB_WRREQ_CRD__SHIFT
 
- XPB_INTF_CFG__XSP_ORDERING_SEL_MASK
 
- XPB_INTF_CFG__XSP_ORDERING_SEL__SHIFT
 
- XPB_INTF_CFG__XSP_ORDERING_VAL_MASK
 
- XPB_INTF_CFG__XSP_ORDERING_VAL__SHIFT
 
- XPB_INTF_CFG__XSP_REQ_CRD_MASK
 
- XPB_INTF_CFG__XSP_REQ_CRD__SHIFT
 
- XPB_INTF_CFG__XSP_SNOOP_SEL_MASK
 
- XPB_INTF_CFG__XSP_SNOOP_SEL__SHIFT
 
- XPB_INTF_CFG__XSP_SNOOP_VAL_MASK
 
- XPB_INTF_CFG__XSP_SNOOP_VAL__SHIFT
 
- XPB_INTF_STS__CNS_BUF_BUSY_MASK
 
- XPB_INTF_STS__CNS_BUF_BUSY__SHIFT
 
- XPB_INTF_STS__CNS_BUF_FULL_MASK
 
- XPB_INTF_STS__CNS_BUF_FULL__SHIFT
 
- XPB_INTF_STS__HOP_ATTR_BUF_FULL_MASK
 
- XPB_INTF_STS__HOP_ATTR_BUF_FULL__SHIFT
 
- XPB_INTF_STS__HOP_DATA_BUF_FULL_MASK
 
- XPB_INTF_STS__HOP_DATA_BUF_FULL__SHIFT
 
- XPB_INTF_STS__RPB_RDREQ_CRD_MASK
 
- XPB_INTF_STS__RPB_RDREQ_CRD__SHIFT
 
- XPB_INTF_STS__RPB_WRREQ_CRD_MASK
 
- XPB_INTF_STS__RPB_WRREQ_CRD__SHIFT
 
- XPB_INTF_STS__XSP_REQ_CRD_MASK
 
- XPB_INTF_STS__XSP_REQ_CRD__SHIFT
 
- XPB_LB_ADDR__CMP0_MASK
 
- XPB_LB_ADDR__CMP0__SHIFT
 
- XPB_LB_ADDR__CMP1_MASK
 
- XPB_LB_ADDR__CMP1__SHIFT
 
- XPB_LB_ADDR__MASK0_MASK
 
- XPB_LB_ADDR__MASK0__SHIFT
 
- XPB_LB_ADDR__MASK1_MASK
 
- XPB_LB_ADDR__MASK1__SHIFT
 
- XPB_MAP_INVERT_FLUSH_NUM_LSB__ALTER_FLUSH_NUM_MASK
 
- XPB_MAP_INVERT_FLUSH_NUM_LSB__ALTER_FLUSH_NUM__SHIFT
 
- XPB_MISC_CFG__FIELDNAME0_MASK
 
- XPB_MISC_CFG__FIELDNAME0__SHIFT
 
- XPB_MISC_CFG__FIELDNAME1_MASK
 
- XPB_MISC_CFG__FIELDNAME1__SHIFT
 
- XPB_MISC_CFG__FIELDNAME2_MASK
 
- XPB_MISC_CFG__FIELDNAME2__SHIFT
 
- XPB_MISC_CFG__FIELDNAME3_MASK
 
- XPB_MISC_CFG__FIELDNAME3__SHIFT
 
- XPB_MISC_CFG__TRIGGERNAME_MASK
 
- XPB_MISC_CFG__TRIGGERNAME__SHIFT
 
- XPB_P2P_BAR0__ADDRESS_MASK
 
- XPB_P2P_BAR0__ADDRESS__SHIFT
 
- XPB_P2P_BAR0__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR0__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR0__HOST_FLUSH_MASK
 
- XPB_P2P_BAR0__HOST_FLUSH__SHIFT
 
- XPB_P2P_BAR0__MEM_SYS_BAR_MASK
 
- XPB_P2P_BAR0__MEM_SYS_BAR__SHIFT
 
- XPB_P2P_BAR0__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR0__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR0__RESERVED_MASK
 
- XPB_P2P_BAR0__RESERVED__SHIFT
 
- XPB_P2P_BAR0__SEND_DIS_MASK
 
- XPB_P2P_BAR0__SEND_DIS__SHIFT
 
- XPB_P2P_BAR0__VALID_MASK
 
- XPB_P2P_BAR0__VALID__SHIFT
 
- XPB_P2P_BAR1__ADDRESS_MASK
 
- XPB_P2P_BAR1__ADDRESS__SHIFT
 
- XPB_P2P_BAR1__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR1__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR1__HOST_FLUSH_MASK
 
- XPB_P2P_BAR1__HOST_FLUSH__SHIFT
 
- XPB_P2P_BAR1__MEM_SYS_BAR_MASK
 
- XPB_P2P_BAR1__MEM_SYS_BAR__SHIFT
 
- XPB_P2P_BAR1__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR1__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR1__RESERVED_MASK
 
- XPB_P2P_BAR1__RESERVED__SHIFT
 
- XPB_P2P_BAR1__SEND_DIS_MASK
 
- XPB_P2P_BAR1__SEND_DIS__SHIFT
 
- XPB_P2P_BAR1__VALID_MASK
 
- XPB_P2P_BAR1__VALID__SHIFT
 
- XPB_P2P_BAR2__ADDRESS_MASK
 
- XPB_P2P_BAR2__ADDRESS__SHIFT
 
- XPB_P2P_BAR2__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR2__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR2__HOST_FLUSH_MASK
 
- XPB_P2P_BAR2__HOST_FLUSH__SHIFT
 
- XPB_P2P_BAR2__MEM_SYS_BAR_MASK
 
- XPB_P2P_BAR2__MEM_SYS_BAR__SHIFT
 
- XPB_P2P_BAR2__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR2__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR2__RESERVED_MASK
 
- XPB_P2P_BAR2__RESERVED__SHIFT
 
- XPB_P2P_BAR2__SEND_DIS_MASK
 
- XPB_P2P_BAR2__SEND_DIS__SHIFT
 
- XPB_P2P_BAR2__VALID_MASK
 
- XPB_P2P_BAR2__VALID__SHIFT
 
- XPB_P2P_BAR3__ADDRESS_MASK
 
- XPB_P2P_BAR3__ADDRESS__SHIFT
 
- XPB_P2P_BAR3__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR3__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR3__HOST_FLUSH_MASK
 
- XPB_P2P_BAR3__HOST_FLUSH__SHIFT
 
- XPB_P2P_BAR3__MEM_SYS_BAR_MASK
 
- XPB_P2P_BAR3__MEM_SYS_BAR__SHIFT
 
- XPB_P2P_BAR3__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR3__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR3__RESERVED_MASK
 
- XPB_P2P_BAR3__RESERVED__SHIFT
 
- XPB_P2P_BAR3__SEND_DIS_MASK
 
- XPB_P2P_BAR3__SEND_DIS__SHIFT
 
- XPB_P2P_BAR3__VALID_MASK
 
- XPB_P2P_BAR3__VALID__SHIFT
 
- XPB_P2P_BAR4__ADDRESS_MASK
 
- XPB_P2P_BAR4__ADDRESS__SHIFT
 
- XPB_P2P_BAR4__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR4__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR4__HOST_FLUSH_MASK
 
- XPB_P2P_BAR4__HOST_FLUSH__SHIFT
 
- XPB_P2P_BAR4__MEM_SYS_BAR_MASK
 
- XPB_P2P_BAR4__MEM_SYS_BAR__SHIFT
 
- XPB_P2P_BAR4__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR4__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR4__RESERVED_MASK
 
- XPB_P2P_BAR4__RESERVED__SHIFT
 
- XPB_P2P_BAR4__SEND_DIS_MASK
 
- XPB_P2P_BAR4__SEND_DIS__SHIFT
 
- XPB_P2P_BAR4__VALID_MASK
 
- XPB_P2P_BAR4__VALID__SHIFT
 
- XPB_P2P_BAR5__ADDRESS_MASK
 
- XPB_P2P_BAR5__ADDRESS__SHIFT
 
- XPB_P2P_BAR5__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR5__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR5__HOST_FLUSH_MASK
 
- XPB_P2P_BAR5__HOST_FLUSH__SHIFT
 
- XPB_P2P_BAR5__MEM_SYS_BAR_MASK
 
- XPB_P2P_BAR5__MEM_SYS_BAR__SHIFT
 
- XPB_P2P_BAR5__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR5__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR5__RESERVED_MASK
 
- XPB_P2P_BAR5__RESERVED__SHIFT
 
- XPB_P2P_BAR5__SEND_DIS_MASK
 
- XPB_P2P_BAR5__SEND_DIS__SHIFT
 
- XPB_P2P_BAR5__VALID_MASK
 
- XPB_P2P_BAR5__VALID__SHIFT
 
- XPB_P2P_BAR6__ADDRESS_MASK
 
- XPB_P2P_BAR6__ADDRESS__SHIFT
 
- XPB_P2P_BAR6__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR6__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR6__HOST_FLUSH_MASK
 
- XPB_P2P_BAR6__HOST_FLUSH__SHIFT
 
- XPB_P2P_BAR6__MEM_SYS_BAR_MASK
 
- XPB_P2P_BAR6__MEM_SYS_BAR__SHIFT
 
- XPB_P2P_BAR6__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR6__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR6__RESERVED_MASK
 
- XPB_P2P_BAR6__RESERVED__SHIFT
 
- XPB_P2P_BAR6__SEND_DIS_MASK
 
- XPB_P2P_BAR6__SEND_DIS__SHIFT
 
- XPB_P2P_BAR6__VALID_MASK
 
- XPB_P2P_BAR6__VALID__SHIFT
 
- XPB_P2P_BAR7__ADDRESS_MASK
 
- XPB_P2P_BAR7__ADDRESS__SHIFT
 
- XPB_P2P_BAR7__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR7__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR7__HOST_FLUSH_MASK
 
- XPB_P2P_BAR7__HOST_FLUSH__SHIFT
 
- XPB_P2P_BAR7__MEM_SYS_BAR_MASK
 
- XPB_P2P_BAR7__MEM_SYS_BAR__SHIFT
 
- XPB_P2P_BAR7__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR7__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR7__RESERVED_MASK
 
- XPB_P2P_BAR7__RESERVED__SHIFT
 
- XPB_P2P_BAR7__SEND_DIS_MASK
 
- XPB_P2P_BAR7__SEND_DIS__SHIFT
 
- XPB_P2P_BAR7__VALID_MASK
 
- XPB_P2P_BAR7__VALID__SHIFT
 
- XPB_P2P_BAR_CFG__ADDR_SIZE_MASK
 
- XPB_P2P_BAR_CFG__ADDR_SIZE__SHIFT
 
- XPB_P2P_BAR_CFG__ATC_TRANSLATED_MASK
 
- XPB_P2P_BAR_CFG__ATC_TRANSLATED__SHIFT
 
- XPB_P2P_BAR_CFG__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR_CFG__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR_CFG__RD_EN_MASK
 
- XPB_P2P_BAR_CFG__RD_EN__SHIFT
 
- XPB_P2P_BAR_CFG__REGBAR_FROM_SYSBAR_MASK
 
- XPB_P2P_BAR_CFG__REGBAR_FROM_SYSBAR__SHIFT
 
- XPB_P2P_BAR_CFG__SEND_BAR_MASK
 
- XPB_P2P_BAR_CFG__SEND_BAR__SHIFT
 
- XPB_P2P_BAR_CFG__SEND_DIS_MASK
 
- XPB_P2P_BAR_CFG__SEND_DIS__SHIFT
 
- XPB_P2P_BAR_CFG__SNOOP_MASK
 
- XPB_P2P_BAR_CFG__SNOOP__SHIFT
 
- XPB_P2P_BAR_CFG__UPDATE_DIS_MASK
 
- XPB_P2P_BAR_CFG__UPDATE_DIS__SHIFT
 
- XPB_P2P_BAR_DELTA_ABOVE__DELTA_MASK
 
- XPB_P2P_BAR_DELTA_ABOVE__DELTA__SHIFT
 
- XPB_P2P_BAR_DELTA_ABOVE__EN_MASK
 
- XPB_P2P_BAR_DELTA_ABOVE__EN__SHIFT
 
- XPB_P2P_BAR_DELTA_BELOW__DELTA_MASK
 
- XPB_P2P_BAR_DELTA_BELOW__DELTA__SHIFT
 
- XPB_P2P_BAR_DELTA_BELOW__EN_MASK
 
- XPB_P2P_BAR_DELTA_BELOW__EN__SHIFT
 
- XPB_P2P_BAR_SETUP__ADDRESS_MASK
 
- XPB_P2P_BAR_SETUP__ADDRESS__SHIFT
 
- XPB_P2P_BAR_SETUP__COMPRESS_DIS_MASK
 
- XPB_P2P_BAR_SETUP__COMPRESS_DIS__SHIFT
 
- XPB_P2P_BAR_SETUP__REG_SYS_BAR_MASK
 
- XPB_P2P_BAR_SETUP__REG_SYS_BAR__SHIFT
 
- XPB_P2P_BAR_SETUP__RESERVED_MASK
 
- XPB_P2P_BAR_SETUP__RESERVED__SHIFT
 
- XPB_P2P_BAR_SETUP__SEL_MASK
 
- XPB_P2P_BAR_SETUP__SEL__SHIFT
 
- XPB_P2P_BAR_SETUP__SEND_DIS_MASK
 
- XPB_P2P_BAR_SETUP__SEND_DIS__SHIFT
 
- XPB_P2P_BAR_SETUP__VALID_MASK
 
- XPB_P2P_BAR_SETUP__VALID__SHIFT
 
- XPB_PEER_SYS_BAR0__ADDR_MASK
 
- XPB_PEER_SYS_BAR0__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR0__VALID_MASK
 
- XPB_PEER_SYS_BAR0__VALID__SHIFT
 
- XPB_PEER_SYS_BAR1__ADDR_MASK
 
- XPB_PEER_SYS_BAR1__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR1__VALID_MASK
 
- XPB_PEER_SYS_BAR1__VALID__SHIFT
 
- XPB_PEER_SYS_BAR2__ADDR_MASK
 
- XPB_PEER_SYS_BAR2__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR2__VALID_MASK
 
- XPB_PEER_SYS_BAR2__VALID__SHIFT
 
- XPB_PEER_SYS_BAR3__ADDR_MASK
 
- XPB_PEER_SYS_BAR3__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR3__VALID_MASK
 
- XPB_PEER_SYS_BAR3__VALID__SHIFT
 
- XPB_PEER_SYS_BAR4__ADDR_MASK
 
- XPB_PEER_SYS_BAR4__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR4__VALID_MASK
 
- XPB_PEER_SYS_BAR4__VALID__SHIFT
 
- XPB_PEER_SYS_BAR5__ADDR_MASK
 
- XPB_PEER_SYS_BAR5__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR5__VALID_MASK
 
- XPB_PEER_SYS_BAR5__VALID__SHIFT
 
- XPB_PEER_SYS_BAR6__ADDR_MASK
 
- XPB_PEER_SYS_BAR6__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR6__VALID_MASK
 
- XPB_PEER_SYS_BAR6__VALID__SHIFT
 
- XPB_PEER_SYS_BAR7__ADDR_MASK
 
- XPB_PEER_SYS_BAR7__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR7__VALID_MASK
 
- XPB_PEER_SYS_BAR7__VALID__SHIFT
 
- XPB_PEER_SYS_BAR8__ADDR_MASK
 
- XPB_PEER_SYS_BAR8__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR8__VALID_MASK
 
- XPB_PEER_SYS_BAR8__VALID__SHIFT
 
- XPB_PEER_SYS_BAR9__ADDR_MASK
 
- XPB_PEER_SYS_BAR9__ADDR__SHIFT
 
- XPB_PEER_SYS_BAR9__VALID_MASK
 
- XPB_PEER_SYS_BAR9__VALID__SHIFT
 
- XPB_PERF_KNOBS__CNS_FIFO_DEPTH_MASK
 
- XPB_PERF_KNOBS__CNS_FIFO_DEPTH__SHIFT
 
- XPB_PERF_KNOBS__WCB_HST_FIFO_DEPTH_MASK
 
- XPB_PERF_KNOBS__WCB_HST_FIFO_DEPTH__SHIFT
 
- XPB_PERF_KNOBS__WCB_SID_FIFO_DEPTH_MASK
 
- XPB_PERF_KNOBS__WCB_SID_FIFO_DEPTH__SHIFT
 
- XPB_PIPE_STS__RET_BUF_FULL_MASK
 
- XPB_PIPE_STS__RET_BUF_FULL__SHIFT
 
- XPB_PIPE_STS__WCB_ANY_PBUF_MASK
 
- XPB_PIPE_STS__WCB_ANY_PBUF__SHIFT
 
- XPB_PIPE_STS__WCB_HST_DATA_BUF_CNT_MASK
 
- XPB_PIPE_STS__WCB_HST_DATA_BUF_CNT__SHIFT
 
- XPB_PIPE_STS__WCB_HST_DATA_OBUF_FULL_MASK
 
- XPB_PIPE_STS__WCB_HST_DATA_OBUF_FULL__SHIFT
 
- XPB_PIPE_STS__WCB_HST_RD_PTR_BUF_FULL_MASK
 
- XPB_PIPE_STS__WCB_HST_RD_PTR_BUF_FULL__SHIFT
 
- XPB_PIPE_STS__WCB_HST_REQ_FIFO_FULL_MASK
 
- XPB_PIPE_STS__WCB_HST_REQ_FIFO_FULL__SHIFT
 
- XPB_PIPE_STS__WCB_HST_REQ_OBUF_FULL_MASK
 
- XPB_PIPE_STS__WCB_HST_REQ_OBUF_FULL__SHIFT
 
- XPB_PIPE_STS__WCB_SID_DATA_BUF_CNT_MASK
 
- XPB_PIPE_STS__WCB_SID_DATA_BUF_CNT__SHIFT
 
- XPB_PIPE_STS__WCB_SID_DATA_OBUF_FULL_MASK
 
- XPB_PIPE_STS__WCB_SID_DATA_OBUF_FULL__SHIFT
 
- XPB_PIPE_STS__WCB_SID_RD_PTR_BUF_FULL_MASK
 
- XPB_PIPE_STS__WCB_SID_RD_PTR_BUF_FULL__SHIFT
 
- XPB_PIPE_STS__WCB_SID_REQ_FIFO_FULL_MASK
 
- XPB_PIPE_STS__WCB_SID_REQ_FIFO_FULL__SHIFT
 
- XPB_PIPE_STS__WCB_SID_REQ_OBUF_FULL_MASK
 
- XPB_PIPE_STS__WCB_SID_REQ_OBUF_FULL__SHIFT
 
- XPB_PIPE_STS__XPB_CLK_BUSY_BITS_MASK
 
- XPB_PIPE_STS__XPB_CLK_BUSY_BITS__SHIFT
 
- XPB_RTR_DEST_MAP0__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP0__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP0__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP0__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP0__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP0__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP0__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP0__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP0__NMR_MASK
 
- XPB_RTR_DEST_MAP0__NMR__SHIFT
 
- XPB_RTR_DEST_MAP0__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP0__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP1__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP1__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP1__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP1__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP1__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP1__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP1__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP1__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP1__NMR_MASK
 
- XPB_RTR_DEST_MAP1__NMR__SHIFT
 
- XPB_RTR_DEST_MAP1__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP1__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP2__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP2__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP2__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP2__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP2__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP2__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP2__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP2__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP2__NMR_MASK
 
- XPB_RTR_DEST_MAP2__NMR__SHIFT
 
- XPB_RTR_DEST_MAP2__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP2__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP3__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP3__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP3__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP3__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP3__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP3__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP3__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP3__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP3__NMR_MASK
 
- XPB_RTR_DEST_MAP3__NMR__SHIFT
 
- XPB_RTR_DEST_MAP3__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP3__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP4__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP4__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP4__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP4__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP4__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP4__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP4__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP4__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP4__NMR_MASK
 
- XPB_RTR_DEST_MAP4__NMR__SHIFT
 
- XPB_RTR_DEST_MAP4__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP4__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP5__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP5__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP5__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP5__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP5__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP5__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP5__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP5__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP5__NMR_MASK
 
- XPB_RTR_DEST_MAP5__NMR__SHIFT
 
- XPB_RTR_DEST_MAP5__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP5__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP6__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP6__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP6__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP6__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP6__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP6__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP6__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP6__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP6__NMR_MASK
 
- XPB_RTR_DEST_MAP6__NMR__SHIFT
 
- XPB_RTR_DEST_MAP6__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP6__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP7__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP7__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP7__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP7__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP7__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP7__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP7__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP7__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP7__NMR_MASK
 
- XPB_RTR_DEST_MAP7__NMR__SHIFT
 
- XPB_RTR_DEST_MAP7__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP7__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP8__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP8__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP8__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP8__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP8__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP8__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP8__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP8__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP8__NMR_MASK
 
- XPB_RTR_DEST_MAP8__NMR__SHIFT
 
- XPB_RTR_DEST_MAP8__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP8__SIDE_OK__SHIFT
 
- XPB_RTR_DEST_MAP9__APRTR_SIZE_MASK
 
- XPB_RTR_DEST_MAP9__APRTR_SIZE__SHIFT
 
- XPB_RTR_DEST_MAP9__DEST_OFFSET_MASK
 
- XPB_RTR_DEST_MAP9__DEST_OFFSET__SHIFT
 
- XPB_RTR_DEST_MAP9__DEST_SEL_MASK
 
- XPB_RTR_DEST_MAP9__DEST_SEL_RPB_MASK
 
- XPB_RTR_DEST_MAP9__DEST_SEL_RPB__SHIFT
 
- XPB_RTR_DEST_MAP9__DEST_SEL__SHIFT
 
- XPB_RTR_DEST_MAP9__NMR_MASK
 
- XPB_RTR_DEST_MAP9__NMR__SHIFT
 
- XPB_RTR_DEST_MAP9__SIDE_OK_MASK
 
- XPB_RTR_DEST_MAP9__SIDE_OK__SHIFT
 
- XPB_RTR_SRC_APRTR0__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR0__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR1__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR1__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR2__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR2__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR3__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR3__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR4__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR4__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR5__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR5__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR6__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR6__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR7__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR7__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR8__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR8__BASE_ADDR__SHIFT
 
- XPB_RTR_SRC_APRTR9__BASE_ADDR_MASK
 
- XPB_RTR_SRC_APRTR9__BASE_ADDR__SHIFT
 
- XPB_STICKY_W1C__BITS_MASK
 
- XPB_STICKY_W1C__BITS__SHIFT
 
- XPB_STICKY__BITS_MASK
 
- XPB_STICKY__BITS__SHIFT
 
- XPB_SUB_CTRL__RESET_CGR_MASK
 
- XPB_SUB_CTRL__RESET_CGR__SHIFT
 
- XPB_SUB_CTRL__RESET_CNS_MASK
 
- XPB_SUB_CTRL__RESET_CNS__SHIFT
 
- XPB_SUB_CTRL__RESET_HOP_MASK
 
- XPB_SUB_CTRL__RESET_HOP__SHIFT
 
- XPB_SUB_CTRL__RESET_HST_MASK
 
- XPB_SUB_CTRL__RESET_HST__SHIFT
 
- XPB_SUB_CTRL__RESET_MAP_MASK
 
- XPB_SUB_CTRL__RESET_MAP__SHIFT
 
- XPB_SUB_CTRL__RESET_RET_MASK
 
- XPB_SUB_CTRL__RESET_RET__SHIFT
 
- XPB_SUB_CTRL__RESET_RTR_MASK
 
- XPB_SUB_CTRL__RESET_RTR__SHIFT
 
- XPB_SUB_CTRL__RESET_SID_MASK
 
- XPB_SUB_CTRL__RESET_SID__SHIFT
 
- XPB_SUB_CTRL__RESET_SRB_MASK
 
- XPB_SUB_CTRL__RESET_SRB__SHIFT
 
- XPB_SUB_CTRL__RESET_WCB_MASK
 
- XPB_SUB_CTRL__RESET_WCB__SHIFT
 
- XPB_SUB_CTRL__STALL_CNS_RTR_REQ_MASK
 
- XPB_SUB_CTRL__STALL_CNS_RTR_REQ__SHIFT
 
- XPB_SUB_CTRL__STALL_HST_HOP_REQ_MASK
 
- XPB_SUB_CTRL__STALL_HST_HOP_REQ__SHIFT
 
- XPB_SUB_CTRL__STALL_MAP_WCB_REQ_MASK
 
- XPB_SUB_CTRL__STALL_MAP_WCB_REQ__SHIFT
 
- XPB_SUB_CTRL__STALL_MC_XSP_REQ_SEND_MASK
 
- XPB_SUB_CTRL__STALL_MC_XSP_REQ_SEND__SHIFT
 
- XPB_SUB_CTRL__STALL_RTR_MAP_REQ_MASK
 
- XPB_SUB_CTRL__STALL_RTR_MAP_REQ__SHIFT
 
- XPB_SUB_CTRL__STALL_RTR_RPB_WRREQ_MASK
 
- XPB_SUB_CTRL__STALL_RTR_RPB_WRREQ__SHIFT
 
- XPB_SUB_CTRL__STALL_WCB_HST_REQ_MASK
 
- XPB_SUB_CTRL__STALL_WCB_HST_REQ__SHIFT
 
- XPB_SUB_CTRL__STALL_WCB_SID_REQ_MASK
 
- XPB_SUB_CTRL__STALL_WCB_SID_REQ__SHIFT
 
- XPB_SUB_CTRL__STALL_XPB_RPB_REQ_ATTR_MASK
 
- XPB_SUB_CTRL__STALL_XPB_RPB_REQ_ATTR__SHIFT
 
- XPB_SUB_CTRL__WRREQ_BYPASS_XPB_MASK
 
- XPB_SUB_CTRL__WRREQ_BYPASS_XPB__SHIFT
 
- XPB_WCB_STS__PBUF_VLD_MASK
 
- XPB_WCB_STS__PBUF_VLD__SHIFT
 
- XPB_WCB_STS__WCB_HST_DATA_BUF_CNT_MASK
 
- XPB_WCB_STS__WCB_HST_DATA_BUF_CNT__SHIFT
 
- XPB_WCB_STS__WCB_SID_DATA_BUF_CNT_MASK
 
- XPB_WCB_STS__WCB_SID_DATA_BUF_CNT__SHIFT
 
- XPB_XDMA_PEER_SYS_BAR0__ADDR_MASK
 
- XPB_XDMA_PEER_SYS_BAR0__ADDR__SHIFT
 
- XPB_XDMA_PEER_SYS_BAR0__VALID_MASK
 
- XPB_XDMA_PEER_SYS_BAR0__VALID__SHIFT
 
- XPB_XDMA_PEER_SYS_BAR1__ADDR_MASK
 
- XPB_XDMA_PEER_SYS_BAR1__ADDR__SHIFT
 
- XPB_XDMA_PEER_SYS_BAR1__VALID_MASK
 
- XPB_XDMA_PEER_SYS_BAR1__VALID__SHIFT
 
- XPB_XDMA_PEER_SYS_BAR2__ADDR_MASK
 
- XPB_XDMA_PEER_SYS_BAR2__ADDR__SHIFT
 
- XPB_XDMA_PEER_SYS_BAR2__VALID_MASK
 
- XPB_XDMA_PEER_SYS_BAR2__VALID__SHIFT
 
- XPB_XDMA_PEER_SYS_BAR3__ADDR_MASK
 
- XPB_XDMA_PEER_SYS_BAR3__ADDR__SHIFT
 
- XPB_XDMA_PEER_SYS_BAR3__VALID_MASK
 
- XPB_XDMA_PEER_SYS_BAR3__VALID__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP0__APRTR_SIZE_MASK
 
- XPB_XDMA_RTR_DEST_MAP0__APRTR_SIZE__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP0__DEST_OFFSET_MASK
 
- XPB_XDMA_RTR_DEST_MAP0__DEST_OFFSET__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP0__DEST_SEL_MASK
 
- XPB_XDMA_RTR_DEST_MAP0__DEST_SEL_RPB_MASK
 
- XPB_XDMA_RTR_DEST_MAP0__DEST_SEL_RPB__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP0__DEST_SEL__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP0__NMR_MASK
 
- XPB_XDMA_RTR_DEST_MAP0__NMR__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP0__SIDE_OK_MASK
 
- XPB_XDMA_RTR_DEST_MAP0__SIDE_OK__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP1__APRTR_SIZE_MASK
 
- XPB_XDMA_RTR_DEST_MAP1__APRTR_SIZE__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP1__DEST_OFFSET_MASK
 
- XPB_XDMA_RTR_DEST_MAP1__DEST_OFFSET__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP1__DEST_SEL_MASK
 
- XPB_XDMA_RTR_DEST_MAP1__DEST_SEL_RPB_MASK
 
- XPB_XDMA_RTR_DEST_MAP1__DEST_SEL_RPB__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP1__DEST_SEL__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP1__NMR_MASK
 
- XPB_XDMA_RTR_DEST_MAP1__NMR__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP1__SIDE_OK_MASK
 
- XPB_XDMA_RTR_DEST_MAP1__SIDE_OK__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP2__APRTR_SIZE_MASK
 
- XPB_XDMA_RTR_DEST_MAP2__APRTR_SIZE__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP2__DEST_OFFSET_MASK
 
- XPB_XDMA_RTR_DEST_MAP2__DEST_OFFSET__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP2__DEST_SEL_MASK
 
- XPB_XDMA_RTR_DEST_MAP2__DEST_SEL_RPB_MASK
 
- XPB_XDMA_RTR_DEST_MAP2__DEST_SEL_RPB__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP2__DEST_SEL__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP2__NMR_MASK
 
- XPB_XDMA_RTR_DEST_MAP2__NMR__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP2__SIDE_OK_MASK
 
- XPB_XDMA_RTR_DEST_MAP2__SIDE_OK__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP3__APRTR_SIZE_MASK
 
- XPB_XDMA_RTR_DEST_MAP3__APRTR_SIZE__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP3__DEST_OFFSET_MASK
 
- XPB_XDMA_RTR_DEST_MAP3__DEST_OFFSET__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP3__DEST_SEL_MASK
 
- XPB_XDMA_RTR_DEST_MAP3__DEST_SEL_RPB_MASK
 
- XPB_XDMA_RTR_DEST_MAP3__DEST_SEL_RPB__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP3__DEST_SEL__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP3__NMR_MASK
 
- XPB_XDMA_RTR_DEST_MAP3__NMR__SHIFT
 
- XPB_XDMA_RTR_DEST_MAP3__SIDE_OK_MASK
 
- XPB_XDMA_RTR_DEST_MAP3__SIDE_OK__SHIFT
 
- XPB_XDMA_RTR_SRC_APRTR0__BASE_ADDR_MASK
 
- XPB_XDMA_RTR_SRC_APRTR0__BASE_ADDR__SHIFT
 
- XPB_XDMA_RTR_SRC_APRTR1__BASE_ADDR_MASK
 
- XPB_XDMA_RTR_SRC_APRTR1__BASE_ADDR__SHIFT
 
- XPB_XDMA_RTR_SRC_APRTR2__BASE_ADDR_MASK
 
- XPB_XDMA_RTR_SRC_APRTR2__BASE_ADDR__SHIFT
 
- XPB_XDMA_RTR_SRC_APRTR3__BASE_ADDR_MASK
 
- XPB_XDMA_RTR_SRC_APRTR3__BASE_ADDR__SHIFT
 
- XPCLK
 
- XPCS16_IOREAD
 
- XPCS16_IOWRITE
 
- XPCS32_IOREAD
 
- XPCS32_IOWRITE
 
- XPCS_CFG_VENDOR1
 
- XPCS_CFG_VENDOR1_BYPASS_DET
 
- XPCS_CFG_VENDOR1_DBG_IOTST
 
- XPCS_CFG_VENDOR1_DBG_SEL
 
- XPCS_CFG_VENDOR1_TXBUF_EN
 
- XPCS_CFG_VENDOR1_XPCS_EN
 
- XPCS_CONTROL1
 
- XPCS_CONTROL1_CSR_LOW_PWR
 
- XPCS_CONTROL1_CSR_SPEED0
 
- XPCS_CONTROL1_CSR_SPEED1
 
- XPCS_CONTROL1_LOOPBACK
 
- XPCS_CONTROL1_RESET
 
- XPCS_CONTROL1_SPEED_SELECT3
 
- XPCS_CONTROL2
 
- XPCS_CONTROL2_CSR_PSC_SEL
 
- XPCS_DESKEW_ERR_CNT
 
- XPCS_DESKEW_ERR_CNT_VAL
 
- XPCS_DEVICE_IDENTIFIER
 
- XPCS_DEVICE_IDENTIFIER_VAL
 
- XPCS_DEV_IN_PKG
 
- XPCS_DEV_IN_PKG_CLS22
 
- XPCS_DEV_IN_PKG_CSR_VEND1
 
- XPCS_DEV_IN_PKG_CSR_VEND2
 
- XPCS_DEV_IN_PKG_DTE_XS
 
- XPCS_DEV_IN_PKG_PCS
 
- XPCS_DEV_IN_PKG_PHY_XS
 
- XPCS_DEV_IN_PKG_PMD_PMA
 
- XPCS_DEV_IN_PKG_WIS
 
- XPCS_DIAG_VENDOR2
 
- XPCS_DIAG_VENDOR2_EBUF_SM
 
- XPCS_DIAG_VENDOR2_RCV_SM
 
- XPCS_DIAG_VENDOR2_SSM_LANE0
 
- XPCS_DIAG_VENDOR2_SSM_LANE1
 
- XPCS_DIAG_VENDOR2_SSM_LANE2
 
- XPCS_DIAG_VENDOR2_SSM_LANE3
 
- XPCS_GET_BITS
 
- XPCS_MASK1
 
- XPCS_MASK1_FAULT_MASK
 
- XPCS_MASK1_RXALIGN_STAT_MSK
 
- XPCS_PKG_ID
 
- XPCS_PKG_ID_VAL
 
- XPCS_PKT_COUNT
 
- XPCS_PKT_COUNT_RX
 
- XPCS_PKT_COUNT_TX
 
- XPCS_SET_BITS
 
- XPCS_SPEED_ABILITY
 
- XPCS_SPEED_ABILITY_10GIG
 
- XPCS_STATUS
 
- XPCS_STATUS1
 
- XPCS_STATUS1_CSR_FAULT
 
- XPCS_STATUS1_CSR_LPWR_ABLE
 
- XPCS_STATUS1_CSR_RXLNK_STAT
 
- XPCS_STATUS2
 
- XPCS_STATUS2_CSR_DEV_PRES
 
- XPCS_STATUS2_CSR_RCV_FAULT
 
- XPCS_STATUS2_CSR_TX_FAULT
 
- XPCS_STATUS2_TEN_GBASE_R
 
- XPCS_STATUS2_TEN_GBASE_W
 
- XPCS_STATUS2_TEN_GBASE_X
 
- XPCS_STATUS_CSR_LANE0_SYNC
 
- XPCS_STATUS_CSR_LANE1_SYNC
 
- XPCS_STATUS_CSR_LANE2_SYNC
 
- XPCS_STATUS_CSR_LANE3_SYNC
 
- XPCS_STATUS_CSR_LANE_ALIGN
 
- XPCS_STATUS_CSR_PATTEST_CAP
 
- XPCS_SYMERR_CNT01
 
- XPCS_SYMERR_CNT01_LANE0
 
- XPCS_SYMERR_CNT01_LANE1
 
- XPCS_SYMERR_CNT23
 
- XPCS_SYMERR_CNT23_LANE2
 
- XPCS_SYMERR_CNT23_LANE3
 
- XPCS_TEST_CONTROL
 
- XPCS_TEST_CONTROL_TPAT_SEL
 
- XPCS_TEST_CONTROL_TXTST_EN
 
- XPCS_TRAINING_VECTOR
 
- XPCS_TRAINING_VECTOR_VAL
 
- XPCS_TX_SM
 
- XPCS_TX_SM_VAL
 
- XPC_ACTIVATE_IRQ_NAME
 
- XPC_ACTIVATE_MQ_MSG_ACTIVATE_REQ_UV
 
- XPC_ACTIVATE_MQ_MSG_CHCTL_CLOSEREPLY_UV
 
- XPC_ACTIVATE_MQ_MSG_CHCTL_CLOSEREQUEST_UV
 
- XPC_ACTIVATE_MQ_MSG_CHCTL_OPENCOMPLETE_UV
 
- XPC_ACTIVATE_MQ_MSG_CHCTL_OPENREPLY_UV
 
- XPC_ACTIVATE_MQ_MSG_CHCTL_OPENREQUEST_UV
 
- XPC_ACTIVATE_MQ_MSG_DEACTIVATE_REQ_UV
 
- XPC_ACTIVATE_MQ_MSG_MARK_DISENGAGED_UV
 
- XPC_ACTIVATE_MQ_MSG_MARK_ENGAGED_UV
 
- XPC_ACTIVATE_MQ_MSG_SYNC_ACT_STATE_UV
 
- XPC_ACTIVATE_MQ_SIZE_UV
 
- XPC_ACTIVATE_MSG_SIZE_UV
 
- XPC_CHANNEL_REGISTERED
 
- XPC_CHCTL_CLOSEREPLY
 
- XPC_CHCTL_CLOSEREQUEST
 
- XPC_CHCTL_MSGREQUEST
 
- XPC_CHCTL_OPENCOMPLETE
 
- XPC_CHCTL_OPENREPLY
 
- XPC_CHCTL_OPENREQUEST
 
- XPC_C_CLOSEREPLY
 
- XPC_C_CLOSEREQUEST
 
- XPC_C_CONNECTED
 
- XPC_C_CONNECTEDCALLOUT
 
- XPC_C_CONNECTEDCALLOUT_MADE
 
- XPC_C_CONNECTING
 
- XPC_C_DISCONNECTED
 
- XPC_C_DISCONNECTING
 
- XPC_C_DISCONNECTINGCALLOUT
 
- XPC_C_DISCONNECTINGCALLOUT_MADE
 
- XPC_C_OPENCOMPLETE
 
- XPC_C_OPENREPLY
 
- XPC_C_OPENREQUEST
 
- XPC_C_RCLOSEREPLY
 
- XPC_C_RCLOSEREQUEST
 
- XPC_C_ROPENCOMPLETE
 
- XPC_C_ROPENREPLY
 
- XPC_C_ROPENREQUEST
 
- XPC_C_SETUP
 
- XPC_C_WASCONNECTED
 
- XPC_C_WDISCONNECT
 
- XPC_DEACTIVATE_PARTITION
 
- XPC_DEACTIVATE_PRINTMSG_INTERVAL
 
- XPC_DISCONNECT_CHANNEL
 
- XPC_DISCOVERY_THREAD_NAME
 
- XPC_DISENGAGE_DEFAULT_TIMELIMIT
 
- XPC_HB_CHECK_CPU
 
- XPC_HB_CHECK_DEFAULT_INTERVAL
 
- XPC_HB_CHECK_THREAD_NAME
 
- XPC_HB_DEFAULT_INTERVAL
 
- XPC_MAX_NCHANNELS
 
- XPC_MEM_CHANNEL
 
- XPC_MSG_CHCTL_FLAGS
 
- XPC_MSG_HDR_MAX_SIZE
 
- XPC_MSG_MAX_SIZE
 
- XPC_MSG_PAYLOAD_MAX_SIZE
 
- XPC_MSG_SIZE
 
- XPC_NET_CHANNEL
 
- XPC_NOTIFY_IRQ_NAME
 
- XPC_NOTIFY_MQ_SIZE_UV
 
- XPC_NOTIFY_MSG_SIZE_UV
 
- XPC_NOWAIT
 
- XPC_N_CALL
 
- XPC_OPENCLOSE_ARGS_SIZE
 
- XPC_OPENCLOSE_CHCTL_FLAGS
 
- XPC_PACK_ARGS
 
- XPC_PARTID
 
- XPC_P_ASR_ACTIVATE_UV
 
- XPC_P_ASR_DEACTIVATE_UV
 
- XPC_P_ASR_REACTIVATE_UV
 
- XPC_P_AS_ACTIVATING
 
- XPC_P_AS_ACTIVATION_REQ
 
- XPC_P_AS_ACTIVE
 
- XPC_P_AS_DEACTIVATING
 
- XPC_P_AS_INACTIVE
 
- XPC_P_CACHED_ACTIVATE_GRU_MQ_DESC_UV
 
- XPC_P_ENGAGED_UV
 
- XPC_P_SS_SETUP
 
- XPC_P_SS_TORNDOWN
 
- XPC_P_SS_UNSET
 
- XPC_P_SS_WTEARDOWN
 
- XPC_RP_HEADER_SIZE
 
- XPC_RP_MACH_NASIDS
 
- XPC_RP_PART_NASIDS
 
- XPC_RP_VERSION
 
- XPC_SET_REASON
 
- XPC_UNPACK_ARG1
 
- XPC_UNPACK_ARG2
 
- XPC_VERSION_MAJOR
 
- XPC_VERSION_MINOR
 
- XPC_WAIT
 
- XPEND
 
- XPERMS_ALLOWED
 
- XPERMS_AUDITALLOW
 
- XPERMS_DONTAUDIT
 
- XPHASE
 
- XPHYANE
 
- XPHYFD
 
- XPHYRST
 
- XPHYSADDR
 
- XPHYSP
 
- XPIX
 
- XPKT_FINISH
 
- XPKT_FINISH_M
 
- XPKT_LOST
 
- XPKT_LOST_INT_STS
 
- XPKT_LOST_M
 
- XPKT_OK
 
- XPKT_OK_INT_STS
 
- XPKT_OK_M
 
- XPLB_PCI_ADDR
 
- XPLB_PCI_BUS
 
- XPLB_PCI_DATA
 
- XPLL_CNTL
 
- XPLL_FB_DIV_MASK
 
- XPNET_DEF_MTU
 
- XPNET_DEVICE_NAME
 
- XPNET_MAGIC
 
- XPNET_MAX_IDLE_KTHREADS
 
- XPNET_MAX_KTHREADS
 
- XPNET_MAX_MTU
 
- XPNET_MIN_MTU
 
- XPNET_MSG_DATA_MAX
 
- XPNET_MSG_NENTRIES
 
- XPNET_MSG_SIZE
 
- XPNET_PARTID_OCTET
 
- XPNET_VALID_MSG
 
- XPNET_VERSION
 
- XPNET_VERSION_EMBED
 
- XPNET_VERSION_MAJOR
 
- XPNET_VERSION_MINOR
 
- XPOWER_GPADC_LOW
 
- XPOWER_GPI1_CTRL
 
- XPRAM_DEVS
 
- XPRAM_MAJOR
 
- XPRAM_MAX_DEVS
 
- XPRAM_NAME
 
- XPRINTK
 
- XPRT_BINDING
 
- XPRT_BOUND
 
- XPRT_CLOSE_WAIT
 
- XPRT_CLOSING
 
- XPRT_CONGESTED
 
- XPRT_CONNECTED
 
- XPRT_CONNECTING
 
- XPRT_CREATE_INFINITE_SLOTS
 
- XPRT_CREATE_NO_IDLE_TIMEOUT
 
- XPRT_CWND_WAIT
 
- XPRT_LOCKED
 
- XPRT_SOCK_CONNECTING
 
- XPRT_SOCK_DATA_READY
 
- XPRT_SOCK_UPD_TIMEOUT
 
- XPRT_SOCK_WAKE_DISCONNECT
 
- XPRT_SOCK_WAKE_ERROR
 
- XPRT_SOCK_WAKE_PENDING
 
- XPRT_SOCK_WAKE_WRITE
 
- XPRT_TRANSPORT_BC
 
- XPRT_TRANSPORT_BC_RDMA
 
- XPRT_TRANSPORT_BC_TCP
 
- XPRT_TRANSPORT_LOCAL
 
- XPRT_TRANSPORT_RDMA
 
- XPRT_TRANSPORT_TCP
 
- XPRT_TRANSPORT_UDP
 
- XPRT_WRITE_SPACE
 
- XPS2_GIER_GIE_MASK
 
- XPS2_GIER_OFFSET
 
- XPS2_IPIER_OFFSET
 
- XPS2_IPISR_OFFSET
 
- XPS2_IPIXR_ALL
 
- XPS2_IPIXR_RX_ALL
 
- XPS2_IPIXR_RX_ERR
 
- XPS2_IPIXR_RX_FULL
 
- XPS2_IPIXR_RX_OVF
 
- XPS2_IPIXR_TX_ACK
 
- XPS2_IPIXR_TX_ALL
 
- XPS2_IPIXR_TX_NOACK
 
- XPS2_IPIXR_WDT_TOUT
 
- XPS2_RX_DATA_OFFSET
 
- XPS2_SRST_OFFSET
 
- XPS2_SRST_RESET
 
- XPS2_STATUS_OFFSET
 
- XPS2_STATUS_RX_FULL
 
- XPS2_STATUS_TX_FULL
 
- XPS2_TX_DATA_OFFSET
 
- XPS_CPU_DEV_MAPS_SIZE
 
- XPS_MAP_SIZE
 
- XPS_MIN_MAP_ALLOC
 
- XPS_RXQ_DEV_MAPS_SIZE
 
- XPTR_FROM_NATIVE
 
- XPT_BERT_ANALYZER_BASEADDR
 
- XPT_BERT_ANALYZER_BASEADDR1
 
- XPT_BERT_ANALYZER_BASEADDR2
 
- XPT_BERT_ANALYZER_BASEADDR3
 
- XPT_BERT_ANALYZER_BASEADDR4
 
- XPT_BERT_ANALYZER_BASEADDR5
 
- XPT_BERT_ANALYZER_BASEADDR6
 
- XPT_BERT_ANALYZER_BASEADDR7
 
- XPT_BERT_ANALYZER_BASEADDR8
 
- XPT_BERT_ANALYZER_BASEADDR9
 
- XPT_BERT_BASEADDR
 
- XPT_BERT_BASEADDR1
 
- XPT_BERT_BIT_COUNT0_BASEADDR
 
- XPT_BERT_BIT_COUNT0_BASEADDR1
 
- XPT_BERT_BIT_COUNT1_BASEADDR
 
- XPT_BERT_BIT_COUNT1_BASEADDR1
 
- XPT_BERT_BIT_COUNT2_BASEADDR
 
- XPT_BERT_BIT_COUNT2_BASEADDR1
 
- XPT_BERT_BIT_COUNT3_BASEADDR
 
- XPT_BERT_BIT_COUNT3_BASEADDR1
 
- XPT_BERT_BIT_COUNT4_BASEADDR
 
- XPT_BERT_BIT_COUNT4_BASEADDR1
 
- XPT_BERT_BIT_COUNT5_BASEADDR
 
- XPT_BERT_BIT_COUNT5_BASEADDR1
 
- XPT_BERT_BIT_COUNT6_BASEADDR
 
- XPT_BERT_BIT_COUNT6_BASEADDR1
 
- XPT_BERT_BIT_COUNT7_BASEADDR
 
- XPT_BERT_BIT_COUNT7_BASEADDR1
 
- XPT_BERT_ERROR_BASEADDR
 
- XPT_BERT_ERR_COUNT0_BASEADDR
 
- XPT_BERT_ERR_COUNT0_BASEADDR1
 
- XPT_BERT_ERR_COUNT1_BASEADDR
 
- XPT_BERT_ERR_COUNT1_BASEADDR1
 
- XPT_BERT_ERR_COUNT2_BASEADDR
 
- XPT_BERT_ERR_COUNT2_BASEADDR1
 
- XPT_BERT_ERR_COUNT3_BASEADDR
 
- XPT_BERT_ERR_COUNT3_BASEADDR1
 
- XPT_BERT_ERR_COUNT4_BASEADDR
 
- XPT_BERT_ERR_COUNT4_BASEADDR1
 
- XPT_BERT_ERR_COUNT5_BASEADDR
 
- XPT_BERT_ERR_COUNT5_BASEADDR1
 
- XPT_BERT_ERR_COUNT6_BASEADDR
 
- XPT_BERT_ERR_COUNT6_BASEADDR1
 
- XPT_BERT_ERR_COUNT7_BASEADDR
 
- XPT_BERT_ERR_COUNT7_BASEADDR1
 
- XPT_BERT_HEADER_BASEADDR
 
- XPT_BERT_INVERT_BASEADDR
 
- XPT_BERT_LOCK_BASEADDR
 
- XPT_BUSY
 
- XPT_CACHE_AUTH
 
- XPT_CHNGBUF
 
- XPT_CLOSE
 
- XPT_CONG_CTRL
 
- XPT_CONN
 
- XPT_DATA
 
- XPT_DEAD
 
- XPT_DEFERRED
 
- XPT_DMD0_BASEADDR
 
- XPT_KILL_TEMP
 
- XPT_KNOWN_PID_BASEADDR
 
- XPT_KNOWN_PID_BASEADDR1
 
- XPT_LISTENER
 
- XPT_LOCAL
 
- XPT_NCO_COUNT_BASEADDR
 
- XPT_NCO_COUNT_BASEADDR1
 
- XPT_OLD
 
- XPT_PACKET_GAP_MIN_BASEADDR
 
- XPT_PID_BASEADDR
 
- XPT_PID_BASEADDR1
 
- XPT_PID_REMAP_BASEADDR
 
- XPT_PID_REMAP_BASEADDR1
 
- XPT_TEMP
 
- XPULSE
 
- XPU_PSKIP_STATUS_ENABLED_MASK
 
- XPU_PSKIP_STATUS_M_MASK
 
- XPU_PSKIP_STATUS_N_MASK
 
- XPU_PSKIP_STATUS_SW_OVERRIDE_MASK
 
- XPWRITE_32
 
- XP_DRIVER_INT_REQ
 
- XP_DRIVER_INT_REQ_REQUEST_INDEX
 
- XP_DRIVER_INT_REQ_REQUEST_WIDTH
 
- XP_DRIVER_INT_RO
 
- XP_DRIVER_INT_RO_STATUS_INDEX
 
- XP_DRIVER_INT_RO_STATUS_WIDTH
 
- XP_DRIVER_SCRATCH_0
 
- XP_DRIVER_SCRATCH_0_COMMAND_INDEX
 
- XP_DRIVER_SCRATCH_0_COMMAND_WIDTH
 
- XP_DRIVER_SCRATCH_0_SUB_COMMAND_INDEX
 
- XP_DRIVER_SCRATCH_0_SUB_COMMAND_WIDTH
 
- XP_DRIVER_SCRATCH_1
 
- XP_ECC_CNT0
 
- XP_ECC_CNT0_RX_DED_INDEX
 
- XP_ECC_CNT0_RX_DED_WIDTH
 
- XP_ECC_CNT0_RX_SEC_INDEX
 
- XP_ECC_CNT0_RX_SEC_WIDTH
 
- XP_ECC_CNT0_TX_DED_INDEX
 
- XP_ECC_CNT0_TX_DED_WIDTH
 
- XP_ECC_CNT0_TX_SEC_INDEX
 
- XP_ECC_CNT0_TX_SEC_WIDTH
 
- XP_ECC_CNT1
 
- XP_ECC_CNT1_DESC_DED_INDEX
 
- XP_ECC_CNT1_DESC_DED_WIDTH
 
- XP_ECC_CNT1_DESC_SEC_INDEX
 
- XP_ECC_CNT1_DESC_SEC_WIDTH
 
- XP_ECC_IER
 
- XP_ECC_IER_DESC_DED_INDEX
 
- XP_ECC_IER_DESC_DED_WIDTH
 
- XP_ECC_IER_DESC_SEC_INDEX
 
- XP_ECC_IER_DESC_SEC_WIDTH
 
- XP_ECC_IER_RX_DED_INDEX
 
- XP_ECC_IER_RX_DED_WIDTH
 
- XP_ECC_IER_RX_SEC_INDEX
 
- XP_ECC_IER_RX_SEC_WIDTH
 
- XP_ECC_IER_TX_DED_INDEX
 
- XP_ECC_IER_TX_DED_WIDTH
 
- XP_ECC_IER_TX_SEC_INDEX
 
- XP_ECC_IER_TX_SEC_WIDTH
 
- XP_ECC_ISR
 
- XP_ECC_ISR_DESC_DED_INDEX
 
- XP_ECC_ISR_DESC_DED_WIDTH
 
- XP_ECC_ISR_DESC_SEC_INDEX
 
- XP_ECC_ISR_DESC_SEC_WIDTH
 
- XP_ECC_ISR_RX_DED_INDEX
 
- XP_ECC_ISR_RX_DED_WIDTH
 
- XP_ECC_ISR_RX_SEC_INDEX
 
- XP_ECC_ISR_RX_SEC_WIDTH
 
- XP_ECC_ISR_TX_DED_INDEX
 
- XP_ECC_ISR_TX_DED_WIDTH
 
- XP_ECC_ISR_TX_SEC_INDEX
 
- XP_ECC_ISR_TX_SEC_WIDTH
 
- XP_GET_BITS
 
- XP_I2C_MUTEX
 
- XP_I2C_MUTEX_ACTIVE_INDEX
 
- XP_I2C_MUTEX_ACTIVE_WIDTH
 
- XP_I2C_MUTEX_BUSY_INDEX
 
- XP_I2C_MUTEX_BUSY_WIDTH
 
- XP_I2C_MUTEX_ID_INDEX
 
- XP_I2C_MUTEX_ID_WIDTH
 
- XP_INT_EN
 
- XP_INT_REISSUE_EN
 
- XP_IOREAD
 
- XP_IOREAD_BITS
 
- XP_IOWRITE
 
- XP_IOWRITE_BITS
 
- XP_MAC_ADDR_HI
 
- XP_MAC_ADDR_HI_VALID_INDEX
 
- XP_MAC_ADDR_HI_VALID_WIDTH
 
- XP_MAC_ADDR_LO
 
- XP_MAX_NPARTITIONS_SN2
 
- XP_MAX_NPARTITIONS_UV
 
- XP_MDIO_MUTEX
 
- XP_PROP_0
 
- XP_PROP_0_CONN_TYPE_INDEX
 
- XP_PROP_0_CONN_TYPE_WIDTH
 
- XP_PROP_0_MDIO_ADDR_INDEX
 
- XP_PROP_0_MDIO_ADDR_WIDTH
 
- XP_PROP_0_PORT_ID_INDEX
 
- XP_PROP_0_PORT_ID_WIDTH
 
- XP_PROP_0_PORT_MODE_INDEX
 
- XP_PROP_0_PORT_MODE_WIDTH
 
- XP_PROP_0_PORT_SPEEDS_INDEX
 
- XP_PROP_0_PORT_SPEEDS_WIDTH
 
- XP_PROP_1
 
- XP_PROP_1_MAX_RX_DMA_INDEX
 
- XP_PROP_1_MAX_RX_DMA_WIDTH
 
- XP_PROP_1_MAX_RX_QUEUES_INDEX
 
- XP_PROP_1_MAX_RX_QUEUES_WIDTH
 
- XP_PROP_1_MAX_TX_DMA_INDEX
 
- XP_PROP_1_MAX_TX_DMA_WIDTH
 
- XP_PROP_1_MAX_TX_QUEUES_INDEX
 
- XP_PROP_1_MAX_TX_QUEUES_WIDTH
 
- XP_PROP_2
 
- XP_PROP_2_RX_FIFO_SIZE_INDEX
 
- XP_PROP_2_RX_FIFO_SIZE_WIDTH
 
- XP_PROP_2_TX_FIFO_SIZE_INDEX
 
- XP_PROP_2_TX_FIFO_SIZE_WIDTH
 
- XP_PROP_3
 
- XP_PROP_3_GPIO_ADDR_INDEX
 
- XP_PROP_3_GPIO_ADDR_WIDTH
 
- XP_PROP_3_GPIO_MASK_INDEX
 
- XP_PROP_3_GPIO_MASK_WIDTH
 
- XP_PROP_3_GPIO_MOD_ABS_INDEX
 
- XP_PROP_3_GPIO_MOD_ABS_WIDTH
 
- XP_PROP_3_GPIO_RATE_SELECT_INDEX
 
- XP_PROP_3_GPIO_RATE_SELECT_WIDTH
 
- XP_PROP_3_GPIO_RX_LOS_INDEX
 
- XP_PROP_3_GPIO_RX_LOS_WIDTH
 
- XP_PROP_3_GPIO_TX_FAULT_INDEX
 
- XP_PROP_3_GPIO_TX_FAULT_WIDTH
 
- XP_PROP_3_MDIO_RESET_I2C_ADDR_INDEX
 
- XP_PROP_3_MDIO_RESET_I2C_ADDR_WIDTH
 
- XP_PROP_3_MDIO_RESET_I2C_GPIO_INDEX
 
- XP_PROP_3_MDIO_RESET_I2C_GPIO_WIDTH
 
- XP_PROP_3_MDIO_RESET_INDEX
 
- XP_PROP_3_MDIO_RESET_INT_GPIO_INDEX
 
- XP_PROP_3_MDIO_RESET_INT_GPIO_WIDTH
 
- XP_PROP_3_MDIO_RESET_WIDTH
 
- XP_PROP_4
 
- XP_PROP_4_MUX_ADDR_HI_INDEX
 
- XP_PROP_4_MUX_ADDR_HI_WIDTH
 
- XP_PROP_4_MUX_ADDR_LO_INDEX
 
- XP_PROP_4_MUX_ADDR_LO_WIDTH
 
- XP_PROP_4_MUX_CHAN_INDEX
 
- XP_PROP_4_MUX_CHAN_WIDTH
 
- XP_PROP_4_REDRV_ADDR_INDEX
 
- XP_PROP_4_REDRV_ADDR_WIDTH
 
- XP_PROP_4_REDRV_IF_INDEX
 
- XP_PROP_4_REDRV_IF_WIDTH
 
- XP_PROP_4_REDRV_LANE_INDEX
 
- XP_PROP_4_REDRV_LANE_WIDTH
 
- XP_PROP_4_REDRV_MODEL_INDEX
 
- XP_PROP_4_REDRV_MODEL_WIDTH
 
- XP_PROP_4_REDRV_PRESENT_INDEX
 
- XP_PROP_4_REDRV_PRESENT_WIDTH
 
- XP_PROP_5
 
- XP_SET_BITS
 
- XQM_CMD
 
- XQM_COMMAND
 
- XQM_GRPQUOTA
 
- XQM_MAXQUOTAS
 
- XQM_PRJQUOTA
 
- XQM_USRQUOTA
 
- XR9_MAX_PIN
 
- XRADDRINCEN
 
- XRAM0_SIZE
 
- XRAM1_SIZE
 
- XRAM2_SIZE
 
- XRAMINDOPERREFNOUP_ENDDSP0
 
- XRAMINDOPERREFNOUP_ENDDSP1
 
- XRAMINDOPERREFNOUP_ENDDSP2
 
- XRAMINDOPERREFNOUP_ENDDSP3
 
- XRAMINDOPERREFNOUP_STARTDSP0
 
- XRAMINDOPERREFNOUP_STARTDSP1
 
- XRAMINDOPERREFNOUP_STARTDSP2
 
- XRAMINDOPERREFNOUP_STARTDSP3
 
- XRAMINDOPERREFUP_ENDDSP0
 
- XRAMINDOPERREFUP_ENDDSP1
 
- XRAMINDOPERREFUP_ENDDSP2
 
- XRAMINDOPERREFUP_ENDDSP3
 
- XRAMINDOPERREFUP_STARTDSP0
 
- XRAMINDOPERREFUP_STARTDSP1
 
- XRAMINDOPERREFUP_STARTDSP2
 
- XRAMINDOPERREFUP_STARTDSP3
 
- XRAM_CHIP_OFFSET
 
- XRAM_OFFSET
 
- XRAM_SIZE
 
- XRAM_XRAM_CHANNEL_COUNT
 
- XRAM_XRAM_CHAN_INCR
 
- XRAM_XRAM_INST_OFFSET
 
- XRAM_XRAM_MODULE_OFFSET
 
- XRARB_MASK
 
- XRA_FEIR
 
- XRA_GCR
 
- XRA_GSR
 
- XRA_IER
 
- XRA_IFR
 
- XRA_ISR
 
- XRA_LAST
 
- XRA_MASK
 
- XRA_OCR
 
- XRA_PIR
 
- XRA_PUR
 
- XRA_REIR
 
- XRA_TSCR
 
- XRB_MASK
 
- XRC
 
- XRCL
 
- XRCNFGR
 
- XRCSH_MASK
 
- XRCSPW_MASK
 
- XRCSSU_MASK
 
- XRDATA
 
- XRDY
 
- XRDYEN
 
- XREF_DELETE_MARKER
 
- XREF_TMPHASH_SIZE
 
- XREG
 
- XREGADDR
 
- XREGADD_MASK
 
- XREGDATAR
 
- XREGDATA_MASK
 
- XREGEX
 
- XREG_ADC_ENV
 
- XREG_AMPLITUDE
 
- XREG_AUDIO_MODE
 
- XREG_BUILD
 
- XREG_BUSY
 
- XREG_DDIMODE
 
- XREG_DIRECTSITTING_MODE
 
- XREG_D_CODE
 
- XREG_FINERFREQ
 
- XREG_FRAME_LINES
 
- XREG_FREQ_ERROR
 
- XREG_FW_CHECKSUM
 
- XREG_HSYNC_FREQ
 
- XREG_IF_OUT
 
- XREG_INIT
 
- XREG_INIT_STATUS
 
- XREG_LOCK
 
- XREG_NOISE_LEVEL
 
- XREG_OUTPUT_AMP
 
- XREG_POWER_DOWN
 
- XREG_PRODUCT_ID
 
- XREG_QUALITY
 
- XREG_RF_FREQ
 
- XREG_SEEK_MODE
 
- XREG_SIGNALSOURCE
 
- XREG_SIGNAL_LEVEL
 
- XREG_SMOOTHEDCVBS
 
- XREG_SNR
 
- XREG_TOTALGAIN
 
- XREG_VERSION
 
- XREG_VIDEO_MODE
 
- XREG_XTALFREQ
 
- XREP_AGF_BNOBT
 
- XREP_AGF_CNTBT
 
- XREP_AGF_END
 
- XREP_AGF_MAX
 
- XREP_AGF_REFCOUNTBT
 
- XREP_AGF_RMAPBT
 
- XREP_AGI_END
 
- XREP_AGI_FINOBT
 
- XREP_AGI_INOBT
 
- XREP_AGI_MAX
 
- XREP_ALREADY_FIXED
 
- XRERR
 
- XRES_DEF
 
- XRES_MAX
 
- XRES_MIN
 
- XRGB
 
- XRI_BATCH
 
- XRI_BITMAP_ULONGS
 
- XRLARB_MASK
 
- XRLA_MASK
 
- XRLIM_BURST_FACTOR
 
- XROEH_MASK
 
- XROEPW_MASK
 
- XROESU_MASK
 
- XRRQ_IRRQ_CREDITS_MASK
 
- XRRQ_IRRQ_CREDITS_SFT
 
- XRRQ_IRRQ_MSN_MASK
 
- XRRQ_IRRQ_MSN_SFT
 
- XRRQ_IRRQ_PSN_MASK
 
- XRRQ_IRRQ_PSN_SFT
 
- XRRQ_IRRQ_RESERVED10_MASK
 
- XRRQ_IRRQ_RESERVED10_SFT
 
- XRRQ_IRRQ_RESERVED8_1_MASK
 
- XRRQ_IRRQ_RESERVED8_1_SFT
 
- XRRQ_IRRQ_RESERVED8_2_MASK
 
- XRRQ_IRRQ_RESERVED8_2_SFT
 
- XRRQ_IRRQ_TYPE
 
- XRRQ_IRRQ_TYPE_ATOMIC_REQ
 
- XRRQ_IRRQ_TYPE_READ_REQ
 
- XRRQ_ORRQ_END_PSN_MASK
 
- XRRQ_ORRQ_END_PSN_SFT
 
- XRRQ_ORRQ_NUM_SGES_MASK
 
- XRRQ_ORRQ_NUM_SGES_SFT
 
- XRRQ_ORRQ_PSN_MASK
 
- XRRQ_ORRQ_PSN_SFT
 
- XRRQ_ORRQ_RESERVED10_MASK
 
- XRRQ_ORRQ_RESERVED10_SFT
 
- XRRQ_ORRQ_RESERVED8_1_MASK
 
- XRRQ_ORRQ_RESERVED8_1_SFT
 
- XRRQ_ORRQ_RESERVED8_2_MASK
 
- XRRQ_ORRQ_RESERVED8_2_SFT
 
- XRRQ_ORRQ_TYPE
 
- XRRQ_ORRQ_TYPE_ATOMIC_REQ
 
- XRRQ_ORRQ_TYPE_READ_REQ
 
- XRST
 
- XRSTOR
 
- XRSTORS
 
- XRT
 
- XRTARARB_MASK
 
- XRTBFRARB_MASK
 
- XRTLRARB_MASK
 
- XRTLRA_MASK
 
- XRTRA
 
- XRTRARB_MASK
 
- XRTRA_MASK
 
- XRTRB_MASK
 
- XRT_MASK
 
- XRUN
 
- XRUN_DEBUG_BASIC
 
- XRUN_DEBUG_JIFFIESCHECK
 
- XRUN_DEBUG_STACK
 
- XRWEH_MASK
 
- XRWEPW_MASK
 
- XRWESU_MASK
 
- XRX
 
- XRX100_MAX_PIN
 
- XRX200_DMA_DATA_LEN
 
- XRX200_DMA_RX
 
- XRX200_DMA_TX
 
- XRX200_GPHY_FW_ALIGN
 
- XRX200_MAX_PIN
 
- XRX300_MAX_PIN
 
- XRXMAC_STATUS
 
- XRXMAC_STATUS_ALIGNERR_CNT_EXP
 
- XRXMAC_STATUS_CRCERR_CNT_EXP
 
- XRXMAC_STATUS_CVIOLERR_CNT_EXP
 
- XRXMAC_STATUS_FRAME_RCVD
 
- XRXMAC_STATUS_LCL_FLT_STATUS
 
- XRXMAC_STATUS_LENERR_CNT_EXP
 
- XRXMAC_STATUS_LFLT_CNT_EXP
 
- XRXMAC_STATUS_PHY_MDINT
 
- XRXMAC_STATUS_RFLT_DET
 
- XRXMAC_STATUS_RXBCAST_CNT_EXP
 
- XRXMAC_STATUS_RXFRAG_CNT_EXP
 
- XRXMAC_STATUS_RXHIST1_CNT_EXP
 
- XRXMAC_STATUS_RXHIST2_CNT_EXP
 
- XRXMAC_STATUS_RXHIST3_CNT_EXP
 
- XRXMAC_STATUS_RXHIST4_CNT_EXP
 
- XRXMAC_STATUS_RXHIST5_CNT_EXP
 
- XRXMAC_STATUS_RXHIST6_CNT_EXP
 
- XRXMAC_STATUS_RXHIST7_CNT_EXP
 
- XRXMAC_STATUS_RXMULTF_CNT_EXP
 
- XRXMAC_STATUS_RXOCTET_CNT_EXP
 
- XRXMAC_STATUS_RXOFLOW
 
- XRXMAC_STATUS_RXUFLOW
 
- XRXMAC_STAT_MSK
 
- XRXMAC_STAT_MSK_CRCERR_CNT_EXP
 
- XRXMAC_STAT_MSK_CVIOLERR_CNT_EXP
 
- XRXMAC_STAT_MSK_FRAME_RCVD
 
- XRXMAC_STAT_MSK_LCL_FLT_STAT_MSK
 
- XRXMAC_STAT_MSK_LENERR_CNT_EXP
 
- XRXMAC_STAT_MSK_LFLT_CNT_EXP
 
- XRXMAC_STAT_MSK_PHY_MDINT
 
- XRXMAC_STAT_MSK_RFLT_DET
 
- XRXMAC_STAT_MSK_RXBCAST_CNT_EXP
 
- XRXMAC_STAT_MSK_RXFRAG_CNT_EXP
 
- XRXMAC_STAT_MSK_RXHIST1_CNT_EXP
 
- XRXMAC_STAT_MSK_RXHIST2_CNT_EXP
 
- XRXMAC_STAT_MSK_RXHIST3_CNT_EXP
 
- XRXMAC_STAT_MSK_RXHIST4_CNT_EXP
 
- XRXMAC_STAT_MSK_RXHIST5_CNT_EXP
 
- XRXMAC_STAT_MSK_RXHIST6_CNT_EXP
 
- XRXMAC_STAT_MSK_RXMULTF_CNT_EXP
 
- XRXMAC_STAT_MSK_RXOCTET_CNT_EXP
 
- XRXMAC_STAT_MSK_RXOFLOW_CNT_EXP
 
- XRXMAC_STAT_MSK_RXUFLOW_CNT_EXP
 
- XRXMAC_SW_RST
 
- XRXMAC_SW_RST_REG_RS
 
- XRXMAC_SW_RST_SOFT_RST
 
- XRXTX_IOREAD
 
- XRXTX_IOREAD_BITS
 
- XRXTX_IOWRITE
 
- XRXTX_IOWRITE_BITS
 
- XR_SEQ_FIELDS
 
- XS
 
- XS100_8390_BASE
 
- XS100_8390_DATA32_BASE
 
- XS100_8390_DATA32_SIZE
 
- XS100_8390_DATA_AREA_SIZE
 
- XS100_8390_DATA_READ32_BASE
 
- XS100_8390_DATA_WRITE32_BASE
 
- XS100_IRQSTATUS_BASE
 
- XS6
 
- XSAVE
 
- XSAVEOPT
 
- XSAVES
 
- XSAVE_HDR_OFFSET
 
- XSAVE_HDR_SIZE
 
- XSAVE_MXCSR_OFFSET
 
- XSAVE_YMM_OFFSET
 
- XSAVE_YMM_SIZE
 
- XSC
 
- XSCALE1_CCOUNT_INT_EN
 
- XSCALE1_CCOUNT_OVERFLOW
 
- XSCALE1_COUNT0_EVT_MASK
 
- XSCALE1_COUNT0_EVT_SHFT
 
- XSCALE1_COUNT0_INT_EN
 
- XSCALE1_COUNT0_OVERFLOW
 
- XSCALE1_COUNT1_EVT_MASK
 
- XSCALE1_COUNT1_EVT_SHFT
 
- XSCALE1_COUNT1_INT_EN
 
- XSCALE1_COUNT1_OVERFLOW
 
- XSCALE1_OVERFLOWED_MASK
 
- XSCALE2_CCOUNT_INT_EN
 
- XSCALE2_CCOUNT_OVERFLOW
 
- XSCALE2_COUNT0_EVT_MASK
 
- XSCALE2_COUNT0_EVT_SHFT
 
- XSCALE2_COUNT0_INT_EN
 
- XSCALE2_COUNT0_OVERFLOW
 
- XSCALE2_COUNT1_EVT_MASK
 
- XSCALE2_COUNT1_EVT_SHFT
 
- XSCALE2_COUNT1_INT_EN
 
- XSCALE2_COUNT1_OVERFLOW
 
- XSCALE2_COUNT2_EVT_MASK
 
- XSCALE2_COUNT2_EVT_SHFT
 
- XSCALE2_COUNT2_INT_EN
 
- XSCALE2_COUNT2_OVERFLOW
 
- XSCALE2_COUNT3_EVT_MASK
 
- XSCALE2_COUNT3_EVT_SHFT
 
- XSCALE2_COUNT3_INT_EN
 
- XSCALE2_COUNT3_OVERFLOW
 
- XSCALE2_OVERFLOWED_MASK
 
- XSCALE_CCNT_RESET
 
- XSCALE_COUNTER0
 
- XSCALE_COUNTER1
 
- XSCALE_COUNTER2
 
- XSCALE_COUNTER3
 
- XSCALE_CYCLE_COUNTER
 
- XSCALE_PERFCTR_BCU_1_BIT_ERR
 
- XSCALE_PERFCTR_BCU_DRAIN
 
- XSCALE_PERFCTR_BCU_ECC_NO_ELOG
 
- XSCALE_PERFCTR_BCU_FULL
 
- XSCALE_PERFCTR_BCU_REQUEST
 
- XSCALE_PERFCTR_BRANCH
 
- XSCALE_PERFCTR_BRANCH_MISS
 
- XSCALE_PERFCTR_CCNT
 
- XSCALE_PERFCTR_DATA_STALL
 
- XSCALE_PERFCTR_DCACHE_ACCESS
 
- XSCALE_PERFCTR_DCACHE_FULL_STALL
 
- XSCALE_PERFCTR_DCACHE_FULL_STALL_CONTIG
 
- XSCALE_PERFCTR_DCACHE_MISS
 
- XSCALE_PERFCTR_DCACHE_WRITE_BACK
 
- XSCALE_PERFCTR_DTLB_MISS
 
- XSCALE_PERFCTR_ICACHE_MISS
 
- XSCALE_PERFCTR_ICACHE_NO_DELIVER
 
- XSCALE_PERFCTR_INSTRUCTION
 
- XSCALE_PERFCTR_ITLB_MISS
 
- XSCALE_PERFCTR_PC_CHANGED
 
- XSCALE_PERFCTR_RMW
 
- XSCALE_PERFCTR_UNUSED
 
- XSCALE_PMN_RESET
 
- XSCALE_PMU_CNT64
 
- XSCALE_PMU_ENABLE
 
- XSCALE_PMU_IRQ
 
- XSCALE_PMU_PROBE
 
- XSCALE_PMU_RESET
 
- XSCOM_ADDR_DIRECT_PART
 
- XSCOM_ADDR_FORM1_HI
 
- XSCOM_ADDR_FORM1_HI_SHIFT
 
- XSCOM_ADDR_FORM1_LOW
 
- XSCOM_ADDR_INDIRECT_PART
 
- XSCOM_ADDR_IND_FLAG
 
- XSCOM_ADDR_INF_FORM1
 
- XSCOM_DATA_IND_COMPLETE
 
- XSCOM_DATA_IND_DATA
 
- XSCOM_DATA_IND_ERR_MASK
 
- XSCOM_DATA_IND_ERR_SHIFT
 
- XSCOM_DATA_IND_FORM1_DATA
 
- XSCOM_DATA_IND_READ
 
- XSCT_CR
 
- XSCT_CS
 
- XSCT_DCTL
 
- XSCT_DEVICE_REGISTER_SIZE
 
- XSCT_ICTL
 
- XSCT_IG
 
- XSCT_IMC
 
- XSCT_IMS
 
- XSCT_IS
 
- XSCT_MAX_EP
 
- XSCT_OWNER_EPID
 
- XSCT_REQBAH
 
- XSCT_REQBAL
 
- XSCT_REQBL
 
- XSCT_RESPBAH
 
- XSCT_RESPBAL
 
- XSCT_RESPBL
 
- XSCT_SHSTSAH
 
- XSCT_SHSTSAL
 
- XSDFEC_1x128b
 
- XSDFEC_2x128b
 
- XSDFEC_4x128b
 
- XSDFEC_ACTIVE_ADDR
 
- XSDFEC_ADD_LDPC_CODE_PARAMS
 
- XSDFEC_ALL_ECC_ISR_MASK
 
- XSDFEC_ALL_ECC_ISR_MBE_MASK
 
- XSDFEC_ALL_ECC_ISR_SBE_MASK
 
- XSDFEC_AXIS_DIN_WIDTH_LSB
 
- XSDFEC_AXIS_DIN_WORDS_LSB
 
- XSDFEC_AXIS_DOUT_WIDTH_LSB
 
- XSDFEC_AXIS_DOUT_WORDS_LSB
 
- XSDFEC_AXIS_ENABLE_ADDR
 
- XSDFEC_AXIS_ENABLE_MASK
 
- XSDFEC_AXIS_IN_ENABLE_MASK
 
- XSDFEC_AXIS_OUT_ENABLE_MASK
 
- XSDFEC_AXIS_WIDTH_ADDR
 
- XSDFEC_AXIS_WORDS_INCLUDE_MAX
 
- XSDFEC_BYPASS_ADDR
 
- XSDFEC_CLEAR_STATS
 
- XSDFEC_CODE_WR_PROTECT_ADDR
 
- XSDFEC_ECC_IDR_ADDR
 
- XSDFEC_ECC_IER_ADDR
 
- XSDFEC_ECC_IMR_ADDR
 
- XSDFEC_ECC_ISR_ADDR
 
- XSDFEC_ECC_ISR_MASK
 
- XSDFEC_ECC_ISR_MBE_MASK
 
- XSDFEC_ECC_ISR_MBE_TO_EVENT_SHIFT
 
- XSDFEC_ECC_ISR_SBE_MASK
 
- XSDFEC_FEC_CODE_ADDR
 
- XSDFEC_FIXED_VALUE
 
- XSDFEC_GET_CONFIG
 
- XSDFEC_GET_STATS
 
- XSDFEC_GET_STATUS
 
- XSDFEC_GET_TURBO
 
- XSDFEC_IDR_ADDR
 
- XSDFEC_IER_ADDR
 
- XSDFEC_IMR_ADDR
 
- XSDFEC_INIT
 
- XSDFEC_IN_BLOCK
 
- XSDFEC_ISR_ADDR
 
- XSDFEC_ISR_MASK
 
- XSDFEC_IS_ACTIVE
 
- XSDFEC_IS_ACTIVITY_SET
 
- XSDFEC_LA_TABLE_DEPTH
 
- XSDFEC_LDPC_CODE
 
- XSDFEC_LDPC_CODE_REG0_ADDR_BASE
 
- XSDFEC_LDPC_CODE_REG0_ADDR_HIGH
 
- XSDFEC_LDPC_CODE_REG1_ADDR_BASE
 
- XSDFEC_LDPC_CODE_REG1_ADDR_HIGH
 
- XSDFEC_LDPC_CODE_REG2_ADDR_BASE
 
- XSDFEC_LDPC_CODE_REG2_ADDR_HIGH
 
- XSDFEC_LDPC_CODE_REG3_ADDR_BASE
 
- XSDFEC_LDPC_CODE_REG3_ADDR_HIGH
 
- XSDFEC_LDPC_LA_TABLE_ADDR_BASE
 
- XSDFEC_LDPC_LA_TABLE_ADDR_HIGH
 
- XSDFEC_LDPC_QC_TABLE_ADDR_BASE
 
- XSDFEC_LDPC_QC_TABLE_ADDR_HIGH
 
- XSDFEC_LDPC_REG_JUMP
 
- XSDFEC_LDPC_SC_TABLE_ADDR_BASE
 
- XSDFEC_LDPC_SC_TABLE_ADDR_HIGH
 
- XSDFEC_MAGIC
 
- XSDFEC_MAINTAIN_ORDER
 
- XSDFEC_MAX_SCALE
 
- XSDFEC_MAX_STAR
 
- XSDFEC_NEEDS_RESET
 
- XSDFEC_ORDER_ADDR
 
- XSDFEC_OUT_OF_ORDER
 
- XSDFEC_PER_AXI_TRANSACTION
 
- XSDFEC_PL_INIT_ECC_ISR_MASK
 
- XSDFEC_PL_INIT_ECC_ISR_MBE_MASK
 
- XSDFEC_PL_INIT_ECC_ISR_MBE_TO_EVENT_SHIFT
 
- XSDFEC_PL_INIT_ECC_ISR_SBE_MASK
 
- XSDFEC_PL_RECONFIGURE
 
- XSDFEC_QC_TABLE_DEPTH
 
- XSDFEC_REG0_K_LSB
 
- XSDFEC_REG0_K_MAX
 
- XSDFEC_REG0_K_MIN
 
- XSDFEC_REG0_K_MUL_P
 
- XSDFEC_REG0_N_LSB
 
- XSDFEC_REG0_N_MAX
 
- XSDFEC_REG0_N_MIN
 
- XSDFEC_REG0_N_MUL_P
 
- XSDFEC_REG1_BYPASS_MASK
 
- XSDFEC_REG1_NM_LSB
 
- XSDFEC_REG1_NM_MASK
 
- XSDFEC_REG1_NO_PACKING_LSB
 
- XSDFEC_REG1_NO_PACKING_MASK
 
- XSDFEC_REG1_PSIZE_MAX
 
- XSDFEC_REG1_PSIZE_MIN
 
- XSDFEC_REG2_MAX_SCHEDULE_LSB
 
- XSDFEC_REG2_MAX_SCHEDULE_MASK
 
- XSDFEC_REG2_NLAYERS_MAX
 
- XSDFEC_REG2_NLAYERS_MIN
 
- XSDFEC_REG2_NMQC_LSB
 
- XSDFEC_REG2_NNMQC_MASK
 
- XSDFEC_REG2_NORM_TYPE_LSB
 
- XSDFEC_REG2_NORM_TYPE_MASK
 
- XSDFEC_REG2_NO_FINAL_PARITY_LSB
 
- XSDFEC_REG2_NO_FINAL_PARITY_MASK
 
- XSDFEC_REG2_SPECIAL_QC_MASK
 
- XSDFEC_REG2_SPEICAL_QC_LSB
 
- XSDFEC_REG3_LA_OFF_LSB
 
- XSDFEC_REG3_QC_OFF_LSB
 
- XSDFEC_REG_WIDTH_JUMP
 
- XSDFEC_SC_TABLE_DEPTH
 
- XSDFEC_SET_BYPASS
 
- XSDFEC_SET_DEFAULT_CONFIG
 
- XSDFEC_SET_IRQ
 
- XSDFEC_SET_ORDER
 
- XSDFEC_SET_TURBO
 
- XSDFEC_STARTED
 
- XSDFEC_START_DEV
 
- XSDFEC_STOPPED
 
- XSDFEC_STOP_DEV
 
- XSDFEC_TURBO_ADDR
 
- XSDFEC_TURBO_ALG_MAX
 
- XSDFEC_TURBO_CODE
 
- XSDFEC_TURBO_SCALE_BIT_POS
 
- XSDFEC_TURBO_SCALE_MASK
 
- XSDFEC_TURBO_SCALE_MAX
 
- XSDM_REG_AGG_INT_EVENT_0
 
- XSDM_REG_AGG_INT_EVENT_1
 
- XSDM_REG_AGG_INT_EVENT_10
 
- XSDM_REG_AGG_INT_EVENT_11
 
- XSDM_REG_AGG_INT_EVENT_12
 
- XSDM_REG_AGG_INT_EVENT_13
 
- XSDM_REG_AGG_INT_EVENT_14
 
- XSDM_REG_AGG_INT_EVENT_2
 
- XSDM_REG_AGG_INT_EVENT_3
 
- XSDM_REG_AGG_INT_EVENT_4
 
- XSDM_REG_AGG_INT_EVENT_5
 
- XSDM_REG_AGG_INT_EVENT_6
 
- XSDM_REG_AGG_INT_EVENT_7
 
- XSDM_REG_AGG_INT_EVENT_8
 
- XSDM_REG_AGG_INT_EVENT_9
 
- XSDM_REG_AGG_INT_MODE_0
 
- XSDM_REG_AGG_INT_MODE_1
 
- XSDM_REG_CFC_RSP_START_ADDR
 
- XSDM_REG_CMP_COUNTER_MAX0
 
- XSDM_REG_CMP_COUNTER_MAX1
 
- XSDM_REG_CMP_COUNTER_MAX2
 
- XSDM_REG_CMP_COUNTER_MAX3
 
- XSDM_REG_CMP_COUNTER_START_ADDR
 
- XSDM_REG_DBG_DWORD_ENABLE
 
- XSDM_REG_DBG_FORCE_FRAME
 
- XSDM_REG_DBG_FORCE_VALID
 
- XSDM_REG_DBG_SELECT
 
- XSDM_REG_DBG_SHIFT
 
- XSDM_REG_ENABLE_IN1
 
- XSDM_REG_ENABLE_IN2
 
- XSDM_REG_ENABLE_OUT1
 
- XSDM_REG_ENABLE_OUT2
 
- XSDM_REG_INIT_CREDIT_PXP_CTRL
 
- XSDM_REG_NUM_OF_ACK_AFTER_PLACE
 
- XSDM_REG_NUM_OF_PKT_END_MSG
 
- XSDM_REG_NUM_OF_PXP_ASYNC_REQ
 
- XSDM_REG_NUM_OF_Q0_CMD
 
- XSDM_REG_NUM_OF_Q10_CMD
 
- XSDM_REG_NUM_OF_Q11_CMD
 
- XSDM_REG_NUM_OF_Q1_CMD
 
- XSDM_REG_NUM_OF_Q3_CMD
 
- XSDM_REG_NUM_OF_Q4_CMD
 
- XSDM_REG_NUM_OF_Q5_CMD
 
- XSDM_REG_NUM_OF_Q6_CMD
 
- XSDM_REG_NUM_OF_Q7_CMD
 
- XSDM_REG_NUM_OF_Q8_CMD
 
- XSDM_REG_NUM_OF_Q9_CMD
 
- XSDM_REG_OPERATION_GEN
 
- XSDM_REG_Q_COUNTER_START_ADDR
 
- XSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY
 
- XSDM_REG_SYNC_PARSER_EMPTY
 
- XSDM_REG_SYNC_SYNC_EMPTY
 
- XSDM_REG_TIMER_TICK
 
- XSDM_REG_XSDM_INT_MASK_0
 
- XSDM_REG_XSDM_INT_MASK_1
 
- XSDM_REG_XSDM_INT_STS_0
 
- XSDM_REG_XSDM_INT_STS_1
 
- XSDM_REG_XSDM_PRTY_MASK
 
- XSDM_REG_XSDM_PRTY_STS
 
- XSDM_REG_XSDM_PRTY_STS_CLR
 
- XSDT_GET_NUM_ENTRIES
 
- XSD_ERROR
 
- XSEC_PER_SEC
 
- XSEMI_CLK1_RESUL_CHIP
 
- XSEM_REG_ARB_CYCLE_SIZE
 
- XSEM_REG_ARB_ELEMENT0
 
- XSEM_REG_ARB_ELEMENT1
 
- XSEM_REG_ARB_ELEMENT2
 
- XSEM_REG_ARB_ELEMENT3
 
- XSEM_REG_ARB_ELEMENT4
 
- XSEM_REG_DBG_DWORD_ENABLE
 
- XSEM_REG_DBG_FORCE_FRAME
 
- XSEM_REG_DBG_FORCE_VALID
 
- XSEM_REG_DBG_FRAME_MODE_BB_K2
 
- XSEM_REG_DBG_MODE1_CFG_BB_K2
 
- XSEM_REG_DBG_SELECT
 
- XSEM_REG_DBG_SHIFT
 
- XSEM_REG_ENABLE_IN
 
- XSEM_REG_ENABLE_OUT
 
- XSEM_REG_FAST_MEMORY
 
- XSEM_REG_FIC0_DISABLE
 
- XSEM_REG_FIC1_DISABLE
 
- XSEM_REG_INT_TABLE
 
- XSEM_REG_MSG_NUM_FIC0
 
- XSEM_REG_MSG_NUM_FIC1
 
- XSEM_REG_MSG_NUM_FOC0
 
- XSEM_REG_MSG_NUM_FOC1
 
- XSEM_REG_MSG_NUM_FOC2
 
- XSEM_REG_MSG_NUM_FOC3
 
- XSEM_REG_PASSIVE_BUFFER
 
- XSEM_REG_PAS_DISABLE
 
- XSEM_REG_PRAM
 
- XSEM_REG_SLEEP_THREADS_VALID
 
- XSEM_REG_SLOW_DBG_ACTIVE_BB_K2
 
- XSEM_REG_SLOW_DBG_EMPTY_BB_K2
 
- XSEM_REG_SLOW_DBG_MODE_BB_K2
 
- XSEM_REG_SLOW_EXT_STORE_EMPTY
 
- XSEM_REG_SYNC_DBG_EMPTY
 
- XSEM_REG_THREADS_LIST
 
- XSEM_REG_TS_0_AS
 
- XSEM_REG_TS_10_AS
 
- XSEM_REG_TS_11_AS
 
- XSEM_REG_TS_12_AS
 
- XSEM_REG_TS_13_AS
 
- XSEM_REG_TS_14_AS
 
- XSEM_REG_TS_15_AS
 
- XSEM_REG_TS_16_AS
 
- XSEM_REG_TS_17_AS
 
- XSEM_REG_TS_18_AS
 
- XSEM_REG_TS_1_AS
 
- XSEM_REG_TS_2_AS
 
- XSEM_REG_TS_3_AS
 
- XSEM_REG_TS_4_AS
 
- XSEM_REG_TS_5_AS
 
- XSEM_REG_TS_6_AS
 
- XSEM_REG_TS_7_AS
 
- XSEM_REG_TS_8_AS
 
- XSEM_REG_TS_9_AS
 
- XSEM_REG_VFPF_ERR_NUM
 
- XSEM_REG_XSEM_INT_MASK_0
 
- XSEM_REG_XSEM_INT_MASK_1
 
- XSEM_REG_XSEM_INT_STS_0
 
- XSEM_REG_XSEM_INT_STS_1
 
- XSEM_REG_XSEM_PRTY_MASK_0
 
- XSEM_REG_XSEM_PRTY_MASK_1
 
- XSEM_REG_XSEM_PRTY_STS_0
 
- XSEM_REG_XSEM_PRTY_STS_1
 
- XSEM_REG_XSEM_PRTY_STS_CLR_0
 
- XSEM_REG_XSEM_PRTY_STS_CLR_1
 
- XSENS_AWINDA_DONGLE_PID
 
- XSENS_AWINDA_STATION_PID
 
- XSENS_CONVERTER_0_PID
 
- XSENS_CONVERTER_1_PID
 
- XSENS_CONVERTER_2_PID
 
- XSENS_CONVERTER_3_PID
 
- XSENS_CONVERTER_4_PID
 
- XSENS_CONVERTER_5_PID
 
- XSENS_CONVERTER_6_PID
 
- XSENS_CONVERTER_7_PID
 
- XSENS_CONVERTER_PID
 
- XSENS_MTDEVBOARD_PID
 
- XSENS_MTW_PID
 
- XSENS_VID
 
- XSF_BABB
 
- XSF_DATA_START
 
- XSF_SETUP_RECV
 
- XSF_SHORT
 
- XSF_STATUS_START
 
- XSF_STS
 
- XSF_SUCC
 
- XSIDE
 
- XSIGN
 
- XSIG_LL
 
- XSIR0_IOREAD
 
- XSIR0_IOREAD_BITS
 
- XSIR0_IOWRITE
 
- XSIR0_IOWRITE_BITS
 
- XSIR1_IOREAD
 
- XSIR1_IOREAD_BITS
 
- XSIR1_IOWRITE
 
- XSIR1_IOWRITE_BITS
 
- XSIR_GET_BITS
 
- XSIR_SET_BITS
 
- XSK_BOUND
 
- XSK_H_
 
- XSK_LIBBPF_FLAGS__INHIBIT_PROG_LOAD
 
- XSK_NEXT_PG_CONTIG_MASK
 
- XSK_NEXT_PG_CONTIG_SHIFT
 
- XSK_READY
 
- XSK_RING_CONS__DEFAULT_NUM_DESCS
 
- XSK_RING_PROD__DEFAULT_NUM_DESCS
 
- XSK_UMEM__DEFAULT_FLAGS
 
- XSK_UMEM__DEFAULT_FRAME_HEADROOM
 
- XSK_UMEM__DEFAULT_FRAME_SHIFT
 
- XSK_UMEM__DEFAULT_FRAME_SIZE
 
- XSK_UNALIGNED_BUF_ADDR_MASK
 
- XSK_UNALIGNED_BUF_OFFSET_SHIFT
 
- XSK_UNBOUND
 
- XSPCLK_156M
 
- XSPCLK_NONE
 
- XSPDIF_CHAN_0_STS_REG
 
- XSPDIF_CH_A_USER_DATA_REG_0
 
- XSPDIF_CH_STS_MASK
 
- XSPDIF_CLOCK_CONFIG_BITS_MASK
 
- XSPDIF_CLOCK_CONFIG_BITS_SHIFT
 
- XSPDIF_CONTROL_REG
 
- XSPDIF_CORE_ENABLE_MASK
 
- XSPDIF_FIFO_FLUSH_MASK
 
- XSPDIF_GLOBAL_IRQ_ENABLE
 
- XSPDIF_GLOBAL_IRQ_ENABLE_REG
 
- XSPDIF_IRQ_ENABLE_REG
 
- XSPDIF_IRQ_STS_REG
 
- XSPDIF_SOFT_RESET_REG
 
- XSPDIF_SOFT_RESET_VALUE
 
- XSPI_CR_CPHA
 
- XSPI_CR_CPOL
 
- XSPI_CR_ENABLE
 
- XSPI_CR_LOOP
 
- XSPI_CR_LSB_FIRST
 
- XSPI_CR_MANUAL_SSELECT
 
- XSPI_CR_MASTER_MODE
 
- XSPI_CR_MODE_MASK
 
- XSPI_CR_OFFSET
 
- XSPI_CR_RXFIFO_RESET
 
- XSPI_CR_TRANS_INHIBIT
 
- XSPI_CR_TXFIFO_RESET
 
- XSPI_INTR_MODE_FAULT
 
- XSPI_INTR_RX_FULL
 
- XSPI_INTR_RX_OVERRUN
 
- XSPI_INTR_SLAVE_MODE_FAULT
 
- XSPI_INTR_TX_EMPTY
 
- XSPI_INTR_TX_HALF_EMPTY
 
- XSPI_INTR_TX_UNDERRUN
 
- XSPI_RXD_OFFSET
 
- XSPI_SR_MODE_FAULT_MASK
 
- XSPI_SR_OFFSET
 
- XSPI_SR_RX_EMPTY_MASK
 
- XSPI_SR_RX_FULL_MASK
 
- XSPI_SR_TX_EMPTY_MASK
 
- XSPI_SR_TX_FULL_MASK
 
- XSPI_SSR_OFFSET
 
- XSPI_TXD_OFFSET
 
- XSPR
 
- XSPRBAT_MASK
 
- XSPRG_MASK
 
- XSPR_MASK
 
- XSPSRS
 
- XSPSRS1
 
- XSPSRS64
 
- XSP_FM_DET_CYCLE_CNT
 
- XSP_REF_CLK
 
- XSP_SLEW_RATE_COEF
 
- XSP_SR_COEF_DIVISOR
 
- XSP_U2FREQ_FMCR0
 
- XSP_U2FREQ_FMMONR1
 
- XSP_U2FREQ_MMONR0
 
- XSP_U2PHYDTM1
 
- XSP_USBPHYACR0
 
- XSP_USBPHYACR1
 
- XSP_USBPHYACR5
 
- XSP_USBPHYACR6
 
- XSQ6
 
- XSR
 
- XSRAM_REG_BASE_ADDR
 
- XSRAM_SIZE
 
- XSR_PAGESIZE
 
- XSR_RDY
 
- XSS_EXIT_BITMAP
 
- XSS_EXIT_BITMAP_HIGH
 
- XSTATE_COMPACTION_ENABLED
 
- XSTATE_CPUID
 
- XSTATE_OP
 
- XSTATE_PKRU
 
- XSTATE_PKRU_BIT
 
- XSTATE_WARN_ON
 
- XSTATE_XRESTORE
 
- XSTATE_XSAVE
 
- XSTI_TO_FXSTART
 
- XSTORM
 
- XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE
 
- XSTORM_AGG_INT_FINAL_CLEANUP_INDEX
 
- XSTORM_ASSERT_LIST_INDEX_OFFSET
 
- XSTORM_ASSERT_LIST_OFFSET
 
- XSTORM_CMNG_PER_PORT_VARS_OFFSET
 
- XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY
 
- XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY_SHIFT
 
- XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT
 
- XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT
 
- XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED
 
- XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT
 
- XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE
 
- XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE_SHIFT
 
- XSTORM_ETH_CONTEXT_SECTION_CFI
 
- XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT
 
- XSTORM_ETH_CONTEXT_SECTION_PRIORITY
 
- XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT
 
- XSTORM_ETH_CONTEXT_SECTION_VLAN_ID
 
- XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT
 
- XSTORM_ETH_QUEUE_ZONE_OFFSET
 
- XSTORM_ETH_QUEUE_ZONE_SIZE
 
- XSTORM_FAIRNESS_PER_VN_VARS_OFFSET
 
- XSTORM_FATAL_ASSERT_ATTENTION_BIT
 
- XSTORM_FCOE_AG_CONTEXT_AGG_MISC2
 
- XSTORM_FCOE_AG_CONTEXT_AGG_MISC2_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_AGG_MISC3
 
- XSTORM_FCOE_AG_CONTEXT_AGG_MISC3_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_AUX1_CF
 
- XSTORM_FCOE_AG_CONTEXT_AUX1_CF_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1
 
- XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3
 
- XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5
 
- XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6
 
- XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_NAGLE_EN
 
- XSTORM_FCOE_AG_CONTEXT_NAGLE_EN_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0
 
- XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1
 
- XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT
 
- XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2
 
- XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_DST_PROTECTION_PER_MSS_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_DST_PROTECTION_PER_MSS_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_FRAME_PROT_ALIGNED_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_FRAME_PROT_ALIGNED_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_INNER_VLAN_FLAG_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_INNER_VLAN_FLAG_ORIG_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_INNER_VLAN_FLAG_ORIG_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_INNER_VLAN_FLAG_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_LAST_QUEUE_HANDLED_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_LAST_QUEUE_HANDLED_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_PROTECTION_PERF_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_PROTECTION_PERF_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_RESERVED3_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_RESERVED3_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_RSRV_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_RSRV_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_SQ_DEFERRED_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_SQ_DEFERRED_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_SUPPORT_PROTECTION_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_SUPPORT_PROTECTION_SHIFT
 
- XSTORM_FCOE_CONN_ST_CTX_VALID_MASK
 
- XSTORM_FCOE_CONN_ST_CTX_VALID_SHIFT
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_BLOCK_SQ
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_BLOCK_SQ_SHIFT
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ_SHIFT
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q_SHIFT
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT_SHIFT
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE_SHIFT
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_VNTAG_VLAN
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_VNTAG_VLAN_SHIFT
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE
 
- XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE_SHIFT
 
- XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI
 
- XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT
 
- XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY
 
- XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT
 
- XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID
 
- XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT
 
- XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF
 
- XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN
 
- XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT
 
- XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT
 
- XSTORM_FCOE_VLAN_CONF_INNER_VLAN_FLAG
 
- XSTORM_FCOE_VLAN_CONF_INNER_VLAN_FLAG_SHIFT
 
- XSTORM_FCOE_VLAN_CONF_PRIORITY
 
- XSTORM_FCOE_VLAN_CONF_PRIORITY_SHIFT
 
- XSTORM_FCOE_VLAN_CONF_RESERVED
 
- XSTORM_FCOE_VLAN_CONF_RESERVED_SHIFT
 
- XSTORM_FUNC_EN_OFFSET
 
- XSTORM_ID
 
- XSTORM_INTEG_TEST_DATA_OFFSET
 
- XSTORM_INTEG_TEST_DATA_SIZE
 
- XSTORM_IP_ID_ROLL_ALL
 
- XSTORM_IP_ID_ROLL_HALF
 
- XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL
 
- XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL_SHIFT
 
- XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER
 
- XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER_SHIFT
 
- XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS
 
- XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2
 
- XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3
 
- XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_AUX1_CF
 
- XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7
 
- XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1
 
- XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2
 
- XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3
 
- XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN
 
- XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0
 
- XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1
 
- XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT
 
- XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2
 
- XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST_SHIFT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST_SHIFT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN_SHIFT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA_SHIFT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T_SHIFT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ_SHIFT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT_SHIFT
 
- XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4
 
- XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4_SHIFT
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR
 
- XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT
 
- XSTORM_ISCSI_HQ_SIZE_OFFSET
 
- XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET
 
- XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET
 
- XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET
 
- XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET
 
- XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET
 
- XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET
 
- XSTORM_ISCSI_LOCAL_VLAN_OFFSET
 
- XSTORM_ISCSI_NUM_OF_TASKS_OFFSET
 
- XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET
 
- XSTORM_ISCSI_PAGE_SIZE_OFFSET
 
- XSTORM_ISCSI_R2TQ_SIZE_OFFSET
 
- XSTORM_ISCSI_SQ_SIZE_OFFSET
 
- XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET
 
- XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET
 
- XSTORM_ISCSI_TCP_VARS_TOS_OFFSET
 
- XSTORM_ISCSI_TCP_VARS_TTL_OFFSET
 
- XSTORM_ISCSI_TX_STATS_OFFSET
 
- XSTORM_ISCSI_TX_STATS_SIZE
 
- XSTORM_IWARP_RXMIT_STATS_OFFSET
 
- XSTORM_IWARP_RXMIT_STATS_SIZE
 
- XSTORM_L5CM_AG_CONTEXT_AGG_MISC2
 
- XSTORM_L5CM_AG_CONTEXT_AGG_MISC2_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_AGG_MISC3
 
- XSTORM_L5CM_AG_CONTEXT_AGG_MISC3_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_AUX1_CF
 
- XSTORM_L5CM_AG_CONTEXT_AUX1_CF_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_AUX4_CF
 
- XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN
 
- XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_AUX4_CF_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7
 
- XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1
 
- XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2
 
- XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3
 
- XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_NAGLE_EN
 
- XSTORM_L5CM_AG_CONTEXT_NAGLE_EN_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0
 
- XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1
 
- XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT
 
- XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2
 
- XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT
 
- XSTORM_L5CM_TCP_FLAGS_ENC_ENABLED
 
- XSTORM_L5CM_TCP_FLAGS_ENC_ENABLED_SHIFT
 
- XSTORM_L5CM_TCP_FLAGS_RSRV
 
- XSTORM_L5CM_TCP_FLAGS_RSRV_SHIFT
 
- XSTORM_L5CM_TCP_FLAGS_TS_ENABLED
 
- XSTORM_L5CM_TCP_FLAGS_TS_ENABLED_SHIFT
 
- XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN
 
- XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN_SHIFT
 
- XSTORM_QZONE_SIZE
 
- XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET
 
- XSTORM_RDMA_ASSERT_LEVEL_OFFSET
 
- XSTORM_RDMA_ASSERT_LEVEL_SIZE
 
- XSTORM_RECORD_SLOW_PATH_OFFSET
 
- XSTORM_SPQ_DATA_OFFSET
 
- XSTORM_SPQ_DATA_SIZE
 
- XSTORM_SPQ_PAGE_BASE_OFFSET
 
- XSTORM_SPQ_PROD_OFFSET
 
- XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG
 
- XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT
 
- XSTORM_TCP_CONTEXT_SECTION_RESERVED
 
- XSTORM_TCP_CONTEXT_SECTION_RESERVED_SHIFT
 
- XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED
 
- XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT
 
- XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER
 
- XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT
 
- XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV
 
- XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV_SHIFT
 
- XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE
 
- XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT
 
- XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS
 
- XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT
 
- XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS
 
- XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT
 
- XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED
 
- XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT
 
- XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET
 
- XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG_SHIFT
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG
 
- XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT
 
- XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET
 
- XSTORM_VF_TO_PF_OFFSET
 
- XSTR
 
- XST_PM_ABORT_SUSPEND
 
- XST_PM_CONFLICT
 
- XST_PM_DOUBLE_REQ
 
- XST_PM_INTERNAL
 
- XST_PM_INVALID_NODE
 
- XST_PM_NO_ACCESS
 
- XST_PM_SUCCESS
 
- XSUMRX_DEFAULT
 
- XSURF_BASE1
 
- XSURF_BASE2
 
- XSURF_IRQ
 
- XSURF_IRQ1
 
- XSURF_IRQ2
 
- XSURF_NUM_HWIFS
 
- XSYNC
 
- XSYNCERREN
 
- XSYNCLE_MASK
 
- XSYNC_ERR
 
- XSYNC_MASK
 
- XS_BIND_TO
 
- XS_DEBUG
 
- XS_DIRECTORY
 
- XS_ERROR
 
- XS_GET_DOMAIN_PATH
 
- XS_GET_PERMS
 
- XS_HVM
 
- XS_IDLE_DISC_TO
 
- XS_INTRODUCE
 
- XS_IS_DOMAIN_INTRODUCED
 
- XS_LOCAL
 
- XS_MASK
 
- XS_MKDIR
 
- XS_PV
 
- XS_READ
 
- XS_RELEASE
 
- XS_RESET_WATCHES
 
- XS_RESTRICT
 
- XS_RESUME
 
- XS_RM
 
- XS_SENDMSG_FLAGS
 
- XS_SET_PERMS
 
- XS_SET_TARGET
 
- XS_TCP_INIT_REEST_TO
 
- XS_TCP_LINGER_TO
 
- XS_TRANSACTION_END
 
- XS_TRANSACTION_START
 
- XS_UDP_REEST_TO
 
- XS_UNKNOWN
 
- XS_UNWATCH
 
- XS_WATCH
 
- XS_WATCH_EVENT
 
- XS_WATCH_PATH
 
- XS_WATCH_TOKEN
 
- XS_WRITE
 
- XS_WRITE_CREATE
 
- XS_WRITE_CREATE_EXCL
 
- XS_WRITE_NONE
 
- XT2000_LED_ADDR
 
- XT6
 
- XTABS
 
- XTAL
 
- XTAL12
 
- XTAL1L_MARK
 
- XTAL24
 
- XTAL48
 
- XTALFREQ
 
- XTALIN_DIVIDE
 
- XTALIN_PM_EN
 
- XTALMAXFREQ
 
- XTALMINFREQ
 
- XTAL_ALP_PER_4ILP
 
- XTAL_BSEL
 
- XTAL_BT_GATE
 
- XTAL_CALIB
 
- XTAL_CAPSELECT
 
- XTAL_CLK
 
- XTAL_CNTL__CORE_XTAL_CLKGEN_CLKEN_MASK
 
- XTAL_CNTL__CORE_XTAL_CLKGEN_CLKEN__SHIFT
 
- XTAL_CNTL__CORE_XTAL_PWDN_MASK
 
- XTAL_CNTL__CORE_XTAL_PWDN__SHIFT
 
- XTAL_CNTL__OSC_GAIN_EN_MASK
 
- XTAL_CNTL__OSC_GAIN_EN__SHIFT
 
- XTAL_CNTL__PCIE_REFCLK_SWITCH_MASK
 
- XTAL_CNTL__PCIE_REFCLK_SWITCH__SHIFT
 
- XTAL_CTL_EN
 
- XTAL_EN
 
- XTAL_FREE
 
- XTAL_FREQ
 
- XTAL_GATE_AFE
 
- XTAL_GATE_DIG
 
- XTAL_GATE_USB
 
- XTAL_HIGH_CAP_0P
 
- XTAL_LOW_CAP_0P
 
- XTAL_LOW_CAP_10P
 
- XTAL_LOW_CAP_20P
 
- XTAL_LOW_CAP_30P
 
- XTAL_MODE
 
- XTAL_ON_DELAY
 
- XTAL_RATE
 
- XTAL_RDY
 
- XTAL_REF_CLOCK_SOURCE_SEL
 
- XTAL_REF_CLOCK_SOURCE_SEL_DCCGREFCLK
 
- XTAL_REF_CLOCK_SOURCE_SEL_PPLL
 
- XTAL_REF_CLOCK_SOURCE_SEL_XTALIN
 
- XTAL_REF_SEL
 
- XTAL_REF_SEL_1X
 
- XTAL_REF_SEL_2X
 
- XTAL_RF_GATE
 
- XTAL_TEMP
 
- XTAL_TEMPERATURE
 
- XTAP
 
- XTCNTLSS_SRC
 
- XTCNTLSS_SRS
 
- XTCNTLSS_SRST
 
- XTCNTLSS_SWC
 
- XTCNTLSS_SWS
 
- XTDLINE_SZ
 
- XTEA_BLOCK_SIZE
 
- XTEA_DELTA
 
- XTEA_KEY_SIZE
 
- XTEA_ROUNDS
 
- XTENSA_BREAKPOINT_EXECUTE
 
- XTENSA_BREAKPOINT_LOAD
 
- XTENSA_BREAKPOINT_STORE
 
- XTENSA_FAKE_NMI
 
- XTENSA_FRAME_SIZE_RESERVE
 
- XTENSA_HAVE_COPROCESSOR
 
- XTENSA_HAVE_COPROCESSORS
 
- XTENSA_HAVE_IO_PORT
 
- XTENSA_HAVE_IO_PORTS
 
- XTENSA_HWVERSION_RC_2009_0
 
- XTENSA_INTLEVEL_ANDBELOW_MASK
 
- XTENSA_INTLEVEL_MASK
 
- XTENSA_INT_LEVEL
 
- XTENSA_MAX_REGS
 
- XTENSA_NR_IRQS
 
- XTENSA_PIC_LINUX_IRQ
 
- XTENSA_PMU_COUNTER_MASK
 
- XTENSA_PMU_COUNTER_MAX
 
- XTENSA_PMU_MASK
 
- XTENSA_PMU_PM
 
- XTENSA_PMU_PMCTRL
 
- XTENSA_PMU_PMCTRL_INTEN
 
- XTENSA_PMU_PMCTRL_KRNLCNT
 
- XTENSA_PMU_PMCTRL_MASK
 
- XTENSA_PMU_PMCTRL_MASK_SHIFT
 
- XTENSA_PMU_PMCTRL_SELECT
 
- XTENSA_PMU_PMCTRL_SELECT_SHIFT
 
- XTENSA_PMU_PMCTRL_TRACELEVEL
 
- XTENSA_PMU_PMG
 
- XTENSA_PMU_PMG_PMEN
 
- XTENSA_PMU_PMSTAT
 
- XTENSA_PMU_PMSTAT_INTASRT
 
- XTENSA_PMU_PMSTAT_OVFL
 
- XTENSA_SPILL_STACK_RESERVE
 
- XTENSA_STACK_ALIGNMENT
 
- XTENSA_SYSCALL_ARGUMENT_REGS
 
- XTENTRYSTART
 
- XTERM_IRQ
 
- XTE_AFM_EPPRM_MASK
 
- XTE_AFM_OFFSET
 
- XTE_CTL0_OFFSET
 
- XTE_EMCFG_HOSTEN_MASK
 
- XTE_EMCFG_LINKSPD_10
 
- XTE_EMCFG_LINKSPD_100
 
- XTE_EMCFG_LINKSPD_1000
 
- XTE_EMCFG_LINKSPD_MASK
 
- XTE_EMCFG_OFFSET
 
- XTE_FCC_OFFSET
 
- XTE_FCC_RXFLO_MASK
 
- XTE_FCC_TXFLO_MASK
 
- XTE_GMIC_OFFSET
 
- XTE_HDR_SIZE
 
- XTE_IER0_OFFSET
 
- XTE_IFGP0_OFFSET
 
- XTE_IPR0_OFFSET
 
- XTE_ISR0_OFFSET
 
- XTE_JUMBO_MTU
 
- XTE_LSW0_OFFSET
 
- XTE_MAW0_OFFSET
 
- XTE_MAW1_OFFSET
 
- XTE_MAX_JUMBO_FRAME_SIZE
 
- XTE_MC_OFFSET
 
- XTE_MGTDR_OFFSET
 
- XTE_MIIMAI_OFFSET
 
- XTE_MSW0_OFFSET
 
- XTE_OPTION_DEFAULTS
 
- XTE_OPTION_FCS_INSERT
 
- XTE_OPTION_FCS_STRIP
 
- XTE_OPTION_FLOW_CONTROL
 
- XTE_OPTION_JUMBO
 
- XTE_OPTION_LENTYPE_ERR
 
- XTE_OPTION_PROMISC
 
- XTE_OPTION_RXEN
 
- XTE_OPTION_TXEN
 
- XTE_OPTION_VLAN
 
- XTE_RAF0_OFFSET
 
- XTE_RDY0_HARD_ACS_RDY_MASK
 
- XTE_RDY0_OFFSET
 
- XTE_RSE_CFG_RR_MASK
 
- XTE_RSE_CFG_WR_MASK
 
- XTE_RSE_MIIM_RR_MASK
 
- XTE_RSE_MIIM_WR_MASK
 
- XTE_RXC0_OFFSET
 
- XTE_RXC1_OFFSET
 
- XTE_RXC1_RXEN_MASK
 
- XTE_RXC1_RXFCS_MASK
 
- XTE_RXC1_RXHD_MASK
 
- XTE_RXC1_RXJMBO_MASK
 
- XTE_RXC1_RXLT_MASK
 
- XTE_RXC1_RXRST_MASK
 
- XTE_RXC1_RXVLAN_MASK
 
- XTE_TIE_OFFSET
 
- XTE_TIS_OFFSET
 
- XTE_TPF0_OFFSET
 
- XTE_TRL_SIZE
 
- XTE_TXC_OFFSET
 
- XTE_TXC_TXEN_MASK
 
- XTE_TXC_TXFCS_MASK
 
- XTE_TXC_TXHD_MASK
 
- XTE_TXC_TXJMBO_MASK
 
- XTE_TXC_TXRST_MASK
 
- XTE_TXC_TXVLAN_MASK
 
- XTE_UAW0_OFFSET
 
- XTE_UAW1_OFFSET
 
- XTFPGA_CLKFRQ_VADDR
 
- XTFPGA_FPGAREGS_VADDR
 
- XTFPGA_I2S_CHAN0_DATA
 
- XTFPGA_I2S_CHAN1_DATA
 
- XTFPGA_I2S_CHAN2_DATA
 
- XTFPGA_I2S_CHAN3_DATA
 
- XTFPGA_I2S_CONFIG
 
- XTFPGA_I2S_CONFIG_CHANNEL_BASE
 
- XTFPGA_I2S_CONFIG_INT_ENABLE
 
- XTFPGA_I2S_CONFIG_LEFT
 
- XTFPGA_I2S_CONFIG_LEVEL_BASE
 
- XTFPGA_I2S_CONFIG_LEVEL_MASK
 
- XTFPGA_I2S_CONFIG_RATIO_BASE
 
- XTFPGA_I2S_CONFIG_RATIO_MASK
 
- XTFPGA_I2S_CONFIG_RES_BASE
 
- XTFPGA_I2S_CONFIG_RES_MASK
 
- XTFPGA_I2S_CONFIG_TX_ENABLE
 
- XTFPGA_I2S_FIFO_SIZE
 
- XTFPGA_I2S_INT_LEVEL
 
- XTFPGA_I2S_INT_MASK
 
- XTFPGA_I2S_INT_STATUS
 
- XTFPGA_I2S_INT_UNDERRUN
 
- XTFPGA_I2S_INT_VALID
 
- XTFPGA_I2S_VERSION
 
- XTFPGA_SPI_BUSY
 
- XTFPGA_SPI_DATA
 
- XTFPGA_SPI_NAME
 
- XTFPGA_SPI_START
 
- XTFPGA_SWRST_VADDR
 
- XTGAINS_SZ
 
- XTHAL_HW_REL_LX2
 
- XTHAL_HW_REL_LX2_0
 
- XTHAL_HW_REL_LX2_0_0
 
- XTHAL_SAS3
 
- XTHAL_SAS_ALL
 
- XTHAL_SAS_ANYABI
 
- XTHAL_SAS_ANYCC
 
- XTHAL_SAS_ANYOT
 
- XTHAL_SAS_CALE
 
- XTHAL_SAS_CALR
 
- XTHAL_SAS_CC
 
- XTHAL_SAS_GLOB
 
- XTHAL_SAS_NOCC
 
- XTHAL_SAS_OPT
 
- XTHAL_SAS_TIE
 
- XTI
 
- XTIMOD
 
- XTINST_SZ
 
- XTISS_SELECT_ONE_EXCEPT
 
- XTISS_SELECT_ONE_READ
 
- XTISS_SELECT_ONE_WRITE
 
- XTKBD_EMUL0
 
- XTKBD_EMUL1
 
- XTKBD_KEY
 
- XTKBD_RELEASE
 
- XTLB
 
- XTLB_MASK
 
- XTO
 
- XTO_MASK
 
- XTOcfg
 
- XTPAGEMAXSLOT
 
- XTPAGE_SIZE
 
- XTPG_BAYER_PHASE
 
- XTPG_BAYER_PHASE_BGGR
 
- XTPG_BAYER_PHASE_GBRG
 
- XTPG_BAYER_PHASE_GRBG
 
- XTPG_BAYER_PHASE_OFF
 
- XTPG_BAYER_PHASE_RGGB
 
- XTPG_BOX_COLOR
 
- XTPG_BOX_SIZE
 
- XTPG_CROSS_HAIRS
 
- XTPG_CROSS_HAIRS_COLUMN_MASK
 
- XTPG_CROSS_HAIRS_COLUMN_SHIFT
 
- XTPG_CROSS_HAIRS_ROW_MASK
 
- XTPG_CROSS_HAIRS_ROW_SHIFT
 
- XTPG_CTRL_IRQ_SLAVE_ERROR
 
- XTPG_CTRL_STATUS_SLAVE_ERROR
 
- XTPG_MAX_HBLANK
 
- XTPG_MAX_VBLANK
 
- XTPG_MIN_HBLANK
 
- XTPG_MIN_VBLANK
 
- XTPG_MOTION_SPEED
 
- XTPG_NOISE_GAIN
 
- XTPG_PATTERN_CONTROL
 
- XTPG_PATTERN_CONTROL_COLOR_MASK_MASK
 
- XTPG_PATTERN_CONTROL_COLOR_MASK_SHIFT
 
- XTPG_PATTERN_CONTROL_CROSS_HAIRS
 
- XTPG_PATTERN_CONTROL_MOTION
 
- XTPG_PATTERN_CONTROL_MOVING_BOX
 
- XTPG_PATTERN_CONTROL_NOISE
 
- XTPG_PATTERN_CONTROL_STUCK_PIXEL
 
- XTPG_PATTERN_MASK
 
- XTPG_STUCK_PIXEL_THRESH
 
- XTPG_ZPLATE_HOR_CONTROL
 
- XTPG_ZPLATE_SPEED_MASK
 
- XTPG_ZPLATE_SPEED_SHIFT
 
- XTPG_ZPLATE_START_MASK
 
- XTPG_ZPLATE_START_SHIFT
 
- XTPG_ZPLATE_VER_CONTROL
 
- XTP_OFFSET
 
- XTQ6
 
- XTRA_RM_OFFSET
 
- XTROOTINITSLOT
 
- XTROOTINITSLOT_DIR
 
- XTROOTMAXSLOT
 
- XTR_ABORT
 
- XTR_EOF_0
 
- XTR_EOF_1
 
- XTR_EOF_2
 
- XTR_EOF_3
 
- XTR_ESCAPE
 
- XTR_NOT_READY
 
- XTR_PRUNED
 
- XTR_VALID_BYTES
 
- XTSLOTSIZE
 
- XTS_AES_CTX_SIZE
 
- XTS_BLOCK_SIZE
 
- XTS_TWEAK_CAST
 
- XTXMAC_STATUS
 
- XTXMAC_STATUS_BYTE_CNT_EXP
 
- XTXMAC_STATUS_FRAME_CNT_EXP
 
- XTXMAC_STATUS_FRAME_XMITED
 
- XTXMAC_STATUS_MAX_PSIZE_ERR
 
- XTXMAC_STATUS_TXFIFO_XFR_ERR
 
- XTXMAC_STATUS_TXMAC_OFLOW
 
- XTXMAC_STATUS_TXMAC_UFLOW
 
- XTXMAC_STAT_MSK
 
- XTXMAC_STAT_MSK_BYTE_CNT_EXP
 
- XTXMAC_STAT_MSK_FRAME_CNT_EXP
 
- XTXMAC_STAT_MSK_FRAME_XMITED
 
- XTXMAC_STAT_MSK_MAX_PSIZE_ERR
 
- XTXMAC_STAT_MSK_TXFIFO_XFR_ERR
 
- XTXMAC_STAT_MSK_TXMAC_OFLOW
 
- XTXMAC_STAT_MSK_TXMAC_UFLOW
 
- XTXMAC_SW_RST
 
- XTXMAC_SW_RST_REG_RS
 
- XTXMAC_SW_RST_SOFT_RST
 
- XTYPE_B
 
- XTYPE_CL
 
- XTYPE_COMMAND_DISPATCH
 
- XTYPE_DW
 
- XTYPE_FINAL_COMMAND
 
- XTYPE_LAST_NAKED_RW
 
- XTYPE_MASK
 
- XTYPE_MONOLITHIC_RW
 
- XTYPE_NAKED_RW
 
- XTYPE_READ
 
- XTYPE_S
 
- XTYPE_UNKNOWN
 
- XTYPE_W
 
- XTYPE_WRITE_DISPATCH
 
- XTYPE_XBOX
 
- XTYPE_XBOX360
 
- XTYPE_XBOX360W
 
- XTYPE_XBOXONE
 
- XT_ADDRTYPE_ANYCAST
 
- XT_ADDRTYPE_BLACKHOLE
 
- XT_ADDRTYPE_BROADCAST
 
- XT_ADDRTYPE_INVERT_DEST
 
- XT_ADDRTYPE_INVERT_SOURCE
 
- XT_ADDRTYPE_LIMIT_IFACE_IN
 
- XT_ADDRTYPE_LIMIT_IFACE_OUT
 
- XT_ADDRTYPE_LOCAL
 
- XT_ADDRTYPE_MULTICAST
 
- XT_ADDRTYPE_NAT
 
- XT_ADDRTYPE_PROHIBIT
 
- XT_ADDRTYPE_THROW
 
- XT_ADDRTYPE_UNICAST
 
- XT_ADDRTYPE_UNREACHABLE
 
- XT_ADDRTYPE_UNSPEC
 
- XT_ADDRTYPE_XRESOLVE
 
- XT_ALIGN
 
- XT_AUDIT_TYPE_ACCEPT
 
- XT_AUDIT_TYPE_DROP
 
- XT_AUDIT_TYPE_MAX
 
- XT_AUDIT_TYPE_REJECT
 
- XT_BPF_MAX_NUM_INSTR
 
- XT_BPF_MODE_BYTECODE
 
- XT_BPF_MODE_FD_ELF
 
- XT_BPF_MODE_FD_PINNED
 
- XT_BPF_MODE_PATH_PINNED
 
- XT_BPF_PATH_MAX
 
- XT_CGROUP_PATH_MAX
 
- XT_CHECKSUM_OP_FILL
 
- XT_CLUSTER_F_INV
 
- XT_CLUSTER_NODES_MAX
 
- XT_CMP
 
- XT_CONNBYTES_AVGPKT
 
- XT_CONNBYTES_BYTES
 
- XT_CONNBYTES_DIR_BOTH
 
- XT_CONNBYTES_DIR_ORIGINAL
 
- XT_CONNBYTES_DIR_REPLY
 
- XT_CONNBYTES_PKTS
 
- XT_CONNLABEL_MAXBIT
 
- XT_CONNLABEL_OP_INVERT
 
- XT_CONNLABEL_OP_SET
 
- XT_CONNLIMIT_DADDR
 
- XT_CONNLIMIT_INVERT
 
- XT_CONNMARK_RESTORE
 
- XT_CONNMARK_SAVE
 
- XT_CONNMARK_SET
 
- XT_CONNTRACK_DIRECTION
 
- XT_CONNTRACK_EXPIRES
 
- XT_CONNTRACK_ORIGDST
 
- XT_CONNTRACK_ORIGDST_PORT
 
- XT_CONNTRACK_ORIGSRC
 
- XT_CONNTRACK_ORIGSRC_PORT
 
- XT_CONNTRACK_PROTO
 
- XT_CONNTRACK_REPLDST
 
- XT_CONNTRACK_REPLDST_PORT
 
- XT_CONNTRACK_REPLSRC
 
- XT_CONNTRACK_REPLSRC_PORT
 
- XT_CONNTRACK_STATE
 
- XT_CONNTRACK_STATE_ALIAS
 
- XT_CONNTRACK_STATE_BIT
 
- XT_CONNTRACK_STATE_DNAT
 
- XT_CONNTRACK_STATE_INVALID
 
- XT_CONNTRACK_STATE_SNAT
 
- XT_CONNTRACK_STATE_UNTRACKED
 
- XT_CONNTRACK_STATUS
 
- XT_CONTINUE
 
- XT_CT_MASK
 
- XT_CT_NOTRACK
 
- XT_CT_NOTRACK_ALIAS
 
- XT_CT_ZONE_DIR_ORIG
 
- XT_CT_ZONE_DIR_REPL
 
- XT_CT_ZONE_MARK
 
- XT_DATA_TO_USER
 
- XT_DCCP_DEST_PORTS
 
- XT_DCCP_OPTION
 
- XT_DCCP_SRC_PORTS
 
- XT_DCCP_TYPE
 
- XT_DCCP_VALID_FLAGS
 
- XT_DEVGROUP_INVERT_DST
 
- XT_DEVGROUP_INVERT_SRC
 
- XT_DEVGROUP_MATCH_DST
 
- XT_DEVGROUP_MATCH_SRC
 
- XT_DIAMOND
 
- XT_DISK_MAJOR
 
- XT_DSCP_MASK
 
- XT_DSCP_MAX
 
- XT_DSCP_SHIFT
 
- XT_ECN_IP_MASK
 
- XT_ECN_OP_MATCH_CWR
 
- XT_ECN_OP_MATCH_ECE
 
- XT_ECN_OP_MATCH_IP
 
- XT_ECN_OP_MATCH_MASK
 
- XT_ENTRY_ITERATE
 
- XT_ENTRY_ITERATE_CONTINUE
 
- XT_ERROR_TARGET
 
- XT_ESP_INV_MASK
 
- XT_ESP_INV_SPI
 
- XT_EXTENSION_MAXNAMELEN
 
- XT_FUNCTION_MAXNAMELEN
 
- XT_GETPAGE
 
- XT_GETSEARCH
 
- XT_HASHLIMIT_ALL
 
- XT_HASHLIMIT_BYTES
 
- XT_HASHLIMIT_BYTE_SHIFT
 
- XT_HASHLIMIT_HASH_DIP
 
- XT_HASHLIMIT_HASH_DPT
 
- XT_HASHLIMIT_HASH_SIP
 
- XT_HASHLIMIT_HASH_SPT
 
- XT_HASHLIMIT_INVERT
 
- XT_HASHLIMIT_RATE_MATCH
 
- XT_HASHLIMIT_SCALE
 
- XT_HASHLIMIT_SCALE_v2
 
- XT_HEADPHONE
 
- XT_HMARK_CT
 
- XT_HMARK_DADDR_MASK
 
- XT_HMARK_DPORT
 
- XT_HMARK_DPORT_MASK
 
- XT_HMARK_FLAG
 
- XT_HMARK_H_
 
- XT_HMARK_METHOD_L3
 
- XT_HMARK_METHOD_L3_4
 
- XT_HMARK_MODULUS
 
- XT_HMARK_OFFSET
 
- XT_HMARK_PROTO_MASK
 
- XT_HMARK_RND
 
- XT_HMARK_SADDR_MASK
 
- XT_HMARK_SPI
 
- XT_HMARK_SPI_MASK
 
- XT_HMARK_SPORT
 
- XT_HMARK_SPORT_MASK
 
- XT_INSERT
 
- XT_INT_CTRL
 
- XT_INT_DEST_HI
 
- XT_INT_DEST_LO
 
- XT_INT_DEST_MODE
 
- XT_INT_VEC
 
- XT_INV_PROTO
 
- XT_IPCOMP_INV_MASK
 
- XT_IPCOMP_INV_SPI
 
- XT_IPVS_DIR
 
- XT_IPVS_IPVS_PROPERTY
 
- XT_IPVS_MASK
 
- XT_IPVS_METHOD
 
- XT_IPVS_ONCE_MASK
 
- XT_IPVS_PROTO
 
- XT_IPVS_VADDR
 
- XT_IPVS_VPORT
 
- XT_IPVS_VPORTCTL
 
- XT_L2TP_SID
 
- XT_L2TP_TID
 
- XT_L2TP_TYPE
 
- XT_L2TP_TYPE_CONTROL
 
- XT_L2TP_TYPE_DATA
 
- XT_L2TP_VERSION
 
- XT_LED_BLINK_DELAY
 
- XT_LIMIT_SCALE
 
- XT_LOG_IPOPT
 
- XT_LOG_MACDECODE
 
- XT_LOG_MASK
 
- XT_LOG_NFLOG
 
- XT_LOG_TCPOPT
 
- XT_LOG_TCPSEQ
 
- XT_LOG_UID
 
- XT_MATCH_ITERATE
 
- XT_MAX_COMMENT_LEN
 
- XT_MAX_TABLE_SIZE
 
- XT_MULTIPORT_DESTINATION
 
- XT_MULTIPORT_EITHER
 
- XT_MULTIPORT_SOURCE
 
- XT_MULTI_PORTS
 
- XT_NFLOG_DEFAULT_GROUP
 
- XT_NFLOG_DEFAULT_THRESHOLD
 
- XT_NFLOG_F_COPY_LEN
 
- XT_NFLOG_MASK
 
- XT_NUM_SCTP_FLAGS
 
- XT_OBJ_TO_USER
 
- XT_OCD_CTRL
 
- XT_OSF_GENRE
 
- XT_OSF_INVERT
 
- XT_OSF_LOG
 
- XT_OSF_LOGLEVEL_ALL
 
- XT_OSF_LOGLEVEL_ALL_KNOWN
 
- XT_OSF_LOGLEVEL_FIRST
 
- XT_OSF_TTL
 
- XT_OSF_TTL_LESS
 
- XT_OSF_TTL_NOCHECK
 
- XT_OSF_TTL_TRUE
 
- XT_OWNER_GID
 
- XT_OWNER_MASK
 
- XT_OWNER_SOCKET
 
- XT_OWNER_SUPPL_GROUPS
 
- XT_OWNER_UID
 
- XT_PAGE
 
- XT_PCPU_BLOCK_SIZE
 
- XT_PHYSDEV_OP_BRIDGED
 
- XT_PHYSDEV_OP_IN
 
- XT_PHYSDEV_OP_ISIN
 
- XT_PHYSDEV_OP_ISOUT
 
- XT_PHYSDEV_OP_MASK
 
- XT_PHYSDEV_OP_OUT
 
- XT_POLICY_MATCH_IN
 
- XT_POLICY_MATCH_NONE
 
- XT_POLICY_MATCH_OUT
 
- XT_POLICY_MATCH_STRICT
 
- XT_POLICY_MAX_ELEM
 
- XT_POLICY_MODE_TRANSPORT
 
- XT_POLICY_MODE_TUNNEL
 
- XT_PUTENTRY
 
- XT_PUTPAGE
 
- XT_QUOTA_INVERT
 
- XT_QUOTA_MASK
 
- XT_RATEEST_MATCH_ABS
 
- XT_RATEEST_MATCH_BPS
 
- XT_RATEEST_MATCH_DELTA
 
- XT_RATEEST_MATCH_EQ
 
- XT_RATEEST_MATCH_GT
 
- XT_RATEEST_MATCH_INVERT
 
- XT_RATEEST_MATCH_LT
 
- XT_RATEEST_MATCH_NONE
 
- XT_RATEEST_MATCH_PPS
 
- XT_RATEEST_MATCH_REL
 
- XT_RECENT_CHECK
 
- XT_RECENT_DEST
 
- XT_RECENT_MAX_NSTAMPS
 
- XT_RECENT_MODIFIERS
 
- XT_RECENT_NAME_LEN
 
- XT_RECENT_REAP
 
- XT_RECENT_REMOVE
 
- XT_RECENT_SET
 
- XT_RECENT_SOURCE
 
- XT_RECENT_TTL
 
- XT_RECENT_UPDATE
 
- XT_RECENT_VALID_FLAGS
 
- XT_RETURN
 
- XT_RPFILTER_ACCEPT_LOCAL
 
- XT_RPFILTER_INVERT
 
- XT_RPFILTER_LOOSE
 
- XT_RPFILTER_OPTION_MASK
 
- XT_RPFILTER_VALID_MARK
 
- XT_SCTP_CHUNK_TYPES
 
- XT_SCTP_DEST_PORTS
 
- XT_SCTP_SRC_PORTS
 
- XT_SCTP_VALID_FLAGS
 
- XT_SOCKET_FLAGS_V1
 
- XT_SOCKET_FLAGS_V2
 
- XT_SOCKET_FLAGS_V3
 
- XT_SOCKET_NOWILDCARD
 
- XT_SOCKET_RESTORESKMARK
 
- XT_SOCKET_TRANSPARENT
 
- XT_SPEAKER0
 
- XT_SPEAKER1
 
- XT_STANDARD_TARGET
 
- XT_STATE_BIT
 
- XT_STATE_INVALID
 
- XT_STATE_UNTRACKED
 
- XT_STATISTIC_INVERT
 
- XT_STATISTIC_MASK
 
- XT_STATISTIC_MODE_MAX
 
- XT_STATISTIC_MODE_NTH
 
- XT_STATISTIC_MODE_RANDOM
 
- XT_STRING_FLAG_IGNORECASE
 
- XT_STRING_FLAG_INVERT
 
- XT_STRING_MAX_ALGO_NAME_SIZE
 
- XT_STRING_MAX_PATTERN_SIZE
 
- XT_SYNPROXY_OPT_ECN
 
- XT_SYNPROXY_OPT_MSS
 
- XT_SYNPROXY_OPT_SACK_PERM
 
- XT_SYNPROXY_OPT_TIMESTAMP
 
- XT_SYNPROXY_OPT_WSCALE
 
- XT_TABLE_MAXNAMELEN
 
- XT_TARGET_INIT
 
- XT_TCPMSS_CLAMP_PMTU
 
- XT_TCP_INV_DSTPT
 
- XT_TCP_INV_FLAGS
 
- XT_TCP_INV_MASK
 
- XT_TCP_INV_OPTION
 
- XT_TCP_INV_SRCPT
 
- XT_TIME_ALL_FLAGS
 
- XT_TIME_ALL_MONTHDAYS
 
- XT_TIME_ALL_WEEKDAYS
 
- XT_TIME_CONTIGUOUS
 
- XT_TIME_LOCAL_TZ
 
- XT_TIME_MAX_DAYTIME
 
- XT_TIME_MIN_DAYTIME
 
- XT_TPROXY_HAVE_IPV6
 
- XT_U32_AND
 
- XT_U32_AT
 
- XT_U32_LEFTSH
 
- XT_U32_MAXSIZE
 
- XT_U32_RIGHTSH
 
- XT_UDP_INV_DSTPT
 
- XT_UDP_INV_MASK
 
- XT_UDP_INV_SRCPT
 
- XTalkAdapter
 
- XUC
 
- XUCR0_TRACE_UM_T0
 
- XUCR0_TRACE_UM_T1
 
- XUCR0_TRACE_UM_T2
 
- XUCR0_TRACE_UM_T3
 
- XUC_MASK
 
- XUNDFLEN
 
- XUNDRN
 
- XUSB
 
- XUSBATM_DRIVERS_MAX
 
- XUSBATM_PARM
 
- XUSBIO_PLL_CFG0
 
- XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL
 
- XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL
 
- XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ
 
- XUSBIO_PLL_CFG0_PADPLL_USE_LOCKDET
 
- XUSBIO_PLL_CFG0_SEQ_ENABLE
 
- XUSBIO_PLL_CFG0_SEQ_START_STATE
 
- XUSBXTI_DURATION
 
- XUSB_ADDRESS_OFFSET
 
- XUSB_BASE_ADDR_MASK
 
- XUSB_BASE_ADDR_SHIFT
 
- XUSB_BUFFREADY_OFFSET
 
- XUSB_BUS_MASTER_EN
 
- XUSB_CFG_1
 
- XUSB_CFG_4
 
- XUSB_CFG_ARU_C11_CSBRANGE
 
- XUSB_CFG_ARU_MBOX_CMD
 
- XUSB_CFG_ARU_MBOX_DATA_IN
 
- XUSB_CFG_ARU_MBOX_DATA_OUT
 
- XUSB_CFG_ARU_MBOX_OWNER
 
- XUSB_CFG_ARU_SMI_INTR
 
- XUSB_CFG_CSB_BASE_ADDR
 
- XUSB_CONTROL_OFFSET
 
- XUSB_CONTROL_USB_READY_MASK
 
- XUSB_CONTROL_USB_RMTWAKE_MASK
 
- XUSB_CSB_MP_APMAP
 
- XUSB_CSB_MP_ILOAD_ATTR
 
- XUSB_CSB_MP_ILOAD_BASE_HI
 
- XUSB_CSB_MP_ILOAD_BASE_LO
 
- XUSB_CSB_MP_L2IMEMOP_SIZE
 
- XUSB_CSB_MP_L2IMEMOP_TRIG
 
- XUSB_DMA_BRR_CTRL
 
- XUSB_DMA_CONTROL_OFFSET
 
- XUSB_DMA_DDAR_ADDR_OFFSET
 
- XUSB_DMA_DMASR_BUSY
 
- XUSB_DMA_DMASR_ERROR
 
- XUSB_DMA_DSAR_ADDR_OFFSET
 
- XUSB_DMA_LENGTH_OFFSET
 
- XUSB_DMA_READ_FROM_DPRAM
 
- XUSB_DMA_RESET_OFFSET
 
- XUSB_DMA_STATUS_OFFSET
 
- XUSB_EP0_CONFIG_OFFSET
 
- XUSB_EP_BUF0COUNT_OFFSET
 
- XUSB_EP_BUF1COUNT_OFFSET
 
- XUSB_EP_CFGSTATUS_OFFSET
 
- XUSB_EP_CFG_DATA_TOGGLE_MASK
 
- XUSB_EP_CFG_STALL_MASK
 
- XUSB_EP_CFG_VALID_MASK
 
- XUSB_EP_NUMBER_ZERO
 
- XUSB_FALC_BOOTVEC
 
- XUSB_FALC_CPUCTL
 
- XUSB_FALC_DMACTL
 
- XUSB_FALC_IMFILLCTL
 
- XUSB_FALC_IMFILLRNG1
 
- XUSB_FRAMENUM_OFFSET
 
- XUSB_IER_OFFSET
 
- XUSB_IO_SPACE_EN
 
- XUSB_MAX_ENDPOINTS
 
- XUSB_MEM_SPACE_EN
 
- XUSB_PADCTL_ELPG_PROGRAM
 
- XUSB_PADCTL_ELPG_PROGRAM1
 
- XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN
 
- XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY
 
- XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN
 
- XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN
 
- XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN_EARLY
 
- XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_VCORE_DOWN
 
- XUSB_PADCTL_ELPG_PROGRAM_1
 
- XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN
 
- XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY
 
- XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN
 
- XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN
 
- XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN_EARLY
 
- XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_VCORE_DOWN
 
- XUSB_PADCTL_HSIC_PADX_CTL0
 
- XUSB_PADCTL_HSIC_PADX_CTL1
 
- XUSB_PADCTL_HSIC_PADX_CTL2
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_RX_DATA0
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_RX_DATA1
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_RX_STROBE
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_TX_DATA0
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_TX_DATA1
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_TX_STROBE
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_ZI_DATA0
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_ZI_DATA1
 
- XUSB_PADCTL_HSIC_PAD_CTL0_PD_ZI_STROBE
 
- XUSB_PADCTL_HSIC_PAD_CTL0_RPD_DATA0
 
- XUSB_PADCTL_HSIC_PAD_CTL0_RPD_DATA1
 
- XUSB_PADCTL_HSIC_PAD_CTL0_RPD_STROBE
 
- XUSB_PADCTL_HSIC_PAD_CTL0_RPU_DATA0
 
- XUSB_PADCTL_HSIC_PAD_CTL0_RPU_DATA1
 
- XUSB_PADCTL_HSIC_PAD_CTL0_RPU_STROBE
 
- XUSB_PADCTL_HSIC_PAD_CTL0_TX_RSLEWN_MASK
 
- XUSB_PADCTL_HSIC_PAD_CTL0_TX_RSLEWN_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_CTL0_TX_RSLEWP_MASK
 
- XUSB_PADCTL_HSIC_PAD_CTL0_TX_RSLEWP_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_CTL0_TX_RTUNEN_MASK
 
- XUSB_PADCTL_HSIC_PAD_CTL0_TX_RTUNEN_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_CTL0_TX_RTUNEP_MASK
 
- XUSB_PADCTL_HSIC_PAD_CTL0_TX_RTUNEP_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_CTL1_AUTO_TERM_EN
 
- XUSB_PADCTL_HSIC_PAD_CTL1_PD_RX
 
- XUSB_PADCTL_HSIC_PAD_CTL1_PD_TRX
 
- XUSB_PADCTL_HSIC_PAD_CTL1_PD_TX
 
- XUSB_PADCTL_HSIC_PAD_CTL1_PD_ZI
 
- XUSB_PADCTL_HSIC_PAD_CTL1_RPD_DATA
 
- XUSB_PADCTL_HSIC_PAD_CTL1_RPD_STROBE
 
- XUSB_PADCTL_HSIC_PAD_CTL1_RPU_DATA
 
- XUSB_PADCTL_HSIC_PAD_CTL1_RPU_STROBE
 
- XUSB_PADCTL_HSIC_PAD_CTL1_TX_RTUNEP_MASK
 
- XUSB_PADCTL_HSIC_PAD_CTL1_TX_RTUNEP_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_CTL2_RX_DATA_TRIM_MASK
 
- XUSB_PADCTL_HSIC_PAD_CTL2_RX_DATA_TRIM_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_CTL2_RX_STROBE_TRIM_MASK
 
- XUSB_PADCTL_HSIC_PAD_CTL2_RX_STROBE_TRIM_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL0
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL_PD_TRK
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL_TRK_DONE_RESET_TIMER_MASK
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL_TRK_DONE_RESET_TIMER_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL_TRK_DONE_RESET_TIMER_VAL
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL_TRK_START_TIMER_MASK
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL_TRK_START_TIMER_SHIFT
 
- XUSB_PADCTL_HSIC_PAD_TRK_CTL_TRK_START_TIMER_VAL
 
- XUSB_PADCTL_HSIC_STRB_TRIM_CONTROL
 
- XUSB_PADCTL_HSIC_STRB_TRIM_CONTROL_STRB_TRIM_MASK
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL2_SPARE_IN_MASK
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL2_SPARE_IN_SHIFT
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL2_SPARE_IN_VAL
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL5_RX_QEYE_EN
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_AMP_MASK
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_G_Z_MASK
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_AMP
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_CTLE_Z
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_G_Z
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_LATCH_G_Z
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_SHIFT
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_TAP
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SHIFT
 
- XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_TAP_MASK
 
- XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL2
 
- XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL5
 
- XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL6
 
- XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1
 
- XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ
 
- XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD
 
- XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL2
 
- XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL5
 
- XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL6
 
- XUSB_PADCTL_IOPHY_PLL_P0_CTL1
 
- XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET
 
- XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST
 
- XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK
 
- XUSB_PADCTL_IOPHY_PLL_P0_CTL2
 
- XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN
 
- XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN
 
- XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL1
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL0_REFCLK_NDIV_MASK
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL0_REFCLK_NDIV_SHIFT
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_LOCKDET
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_MODE
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_RST
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2_PLL0_CP_CNTL_MASK
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2_PLL0_CP_CNTL_SHIFT
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2_PLL1_CP_CNTL_MASK
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2_PLL1_CP_CNTL_SHIFT
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2_TCLKOUT_EN
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2_TXCLKREF_SEL
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2_XDIGCLK_SEL_MASK
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL2_XDIGCLK_SEL_SHIFT
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL3
 
- XUSB_PADCTL_IOPHY_PLL_S0_CTL3_RCAL_BYPASS
 
- XUSB_PADCTL_IOPHY_USB3_PADX_CTL2
 
- XUSB_PADCTL_IOPHY_USB3_PADX_CTL4
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_CDR_CNTL_MASK
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_CDR_CNTL_SHIFT
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_CDR_CNTL_VAL
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_G_MASK
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_G_SHIFT
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_MASK
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_SHIFT
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_VAL
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_Z_MASK
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_Z_SHIFT
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_WANDER_MASK
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_WANDER_SHIFT
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_WANDER_VAL
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_AMP_MASK
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_AMP_SHIFT
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_TAP_MASK
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_TAP_SHIFT
 
- XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_VAL
 
- XUSB_PADCTL_SS_PORT_CAP
 
- XUSB_PADCTL_SS_PORT_MAP
 
- XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL
 
- XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP
 
- XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK
 
- XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_SHIFT
 
- XUSB_PADCTL_SS_PORT_MAP_PORT_MAP_MASK
 
- XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_IDLE_MODE_MASK
 
- XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_IDLE_MODE_SHIFT
 
- XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_IDLE_MODE_VAL
 
- XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_MODE_OVRD
 
- XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_TERM_EN
 
- XUSB_PADCTL_UPHY_MISC_PAD_PX_CTL1
 
- XUSB_PADCTL_UPHY_MISC_PAD_S0_CTL1
 
- XUSB_PADCTL_UPHY_PLL_CTL1_ENABLE
 
- XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK
 
- XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_SHIFT
 
- XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_MASK
 
- XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_SATA_VAL
 
- XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_SHIFT
 
- XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL
 
- XUSB_PADCTL_UPHY_PLL_CTL1_IDDQ
 
- XUSB_PADCTL_UPHY_PLL_CTL1_LOCKDET_STATUS
 
- XUSB_PADCTL_UPHY_PLL_CTL1_PWR_OVRD
 
- XUSB_PADCTL_UPHY_PLL_CTL1_SLEEP_MASK
 
- XUSB_PADCTL_UPHY_PLL_CTL1_SLEEP_SHIFT
 
- XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_MASK
 
- XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_SHIFT
 
- XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_VAL
 
- XUSB_PADCTL_UPHY_PLL_CTL2_CAL_DONE
 
- XUSB_PADCTL_UPHY_PLL_CTL2_CAL_EN
 
- XUSB_PADCTL_UPHY_PLL_CTL2_CAL_OVRD
 
- XUSB_PADCTL_UPHY_PLL_CTL4_REFCLKBUF_EN
 
- XUSB_PADCTL_UPHY_PLL_CTL4_REFCLK_SEL_MASK
 
- XUSB_PADCTL_UPHY_PLL_CTL4_REFCLK_SEL_SHIFT
 
- XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_EN
 
- XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_MASK
 
- XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_SATA_VAL
 
- XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_SHIFT
 
- XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_USB_VAL
 
- XUSB_PADCTL_UPHY_PLL_CTL4_XDIGCLK_EN
 
- XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_MASK
 
- XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_SHIFT
 
- XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_VAL
 
- XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_CLK_EN
 
- XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_DONE
 
- XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_EN
 
- XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_OVRD
 
- XUSB_PADCTL_UPHY_PLL_P0_CTL1
 
- XUSB_PADCTL_UPHY_PLL_P0_CTL2
 
- XUSB_PADCTL_UPHY_PLL_P0_CTL4
 
- XUSB_PADCTL_UPHY_PLL_P0_CTL5
 
- XUSB_PADCTL_UPHY_PLL_P0_CTL8
 
- XUSB_PADCTL_UPHY_PLL_S0_CTL1
 
- XUSB_PADCTL_UPHY_PLL_S0_CTL2
 
- XUSB_PADCTL_UPHY_PLL_S0_CTL4
 
- XUSB_PADCTL_UPHY_PLL_S0_CTL5
 
- XUSB_PADCTL_UPHY_PLL_S0_CTL8
 
- XUSB_PADCTL_UPHY_USB3_PADX_ECTL1
 
- XUSB_PADCTL_UPHY_USB3_PADX_ECTL2
 
- XUSB_PADCTL_UPHY_USB3_PADX_ECTL3
 
- XUSB_PADCTL_UPHY_USB3_PADX_ECTL4
 
- XUSB_PADCTL_UPHY_USB3_PADX_ECTL6
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL1_TX_TERM_CTRL_MASK
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL1_TX_TERM_CTRL_SHIFT
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL1_TX_TERM_CTRL_VAL
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL2_RX_CTLE_MASK
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL2_RX_CTLE_SHIFT
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL2_RX_CTLE_VAL
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL3_RX_DFE_VAL
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL4_RX_CDR_CTRL_MASK
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL4_RX_CDR_CTRL_SHIFT
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL4_RX_CDR_CTRL_VAL
 
- XUSB_PADCTL_UPHY_USB3_PAD_ECTL6_RX_EQ_CTRL_H_VAL
 
- XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL1
 
- XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_FIX18
 
- XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_MASK
 
- XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_SHIFT
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL0
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_MASK
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_SHIFT
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_SHIFT
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_VAL
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL1
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL1_PD_TRK
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_DONE_RESET_TIMER_MASK
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_DONE_RESET_TIMER_SHIFT
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_DONE_RESET_TIMER_VAL
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_MASK
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_SHIFT
 
- XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_VAL
 
- XUSB_PADCTL_USB2_OTG_PADX_CTL0
 
- XUSB_PADCTL_USB2_OTG_PADX_CTL1
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_SHIFT
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_MASK
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_SHIFT
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_MASK
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_SHIFT
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_VAL
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_MASK
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_SHIFT
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_OVRD
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_OVRD
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_RPD_CTRL_MASK
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_RPD_CTRL_SHIFT
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK
 
- XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_SHIFT
 
- XUSB_PADCTL_USB2_PAD_MUX
 
- XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_MASK
 
- XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_SHIFT
 
- XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_XUSB
 
- XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_MASK
 
- XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_SHIFT
 
- XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_XUSB
 
- XUSB_PADCTL_USB2_PORT_CAP
 
- XUSB_PADCTL_USB2_PORT_CAP_DEVICE
 
- XUSB_PADCTL_USB2_PORT_CAP_DISABLED
 
- XUSB_PADCTL_USB2_PORT_CAP_HOST
 
- XUSB_PADCTL_USB2_PORT_CAP_OTG
 
- XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_HOST
 
- XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_MASK
 
- XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_SHIFT
 
- XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK
 
- XUSB_PADCTL_USB3_PAD_MUX
 
- XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE
 
- XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE
 
- XUSB_PLL_CFG0
 
- XUSB_PLL_CFG0_PLLU_LOCK_DLY
 
- XUSB_PLL_CFG0_PLLU_LOCK_DLY_MASK
 
- XUSB_PLL_CFG0_UTMIPLL_LOCK_DLY
 
- XUSB_SETUP_PKT_ADDR_OFFSET
 
- XUSB_STATUS_DISCONNECT_MASK
 
- XUSB_STATUS_DMABUSY_MASK
 
- XUSB_STATUS_DMADONE_MASK
 
- XUSB_STATUS_DMAERR_MASK
 
- XUSB_STATUS_EP0_BUFF1_COMP_MASK
 
- XUSB_STATUS_EP0_BUFF2_COMP_MASK
 
- XUSB_STATUS_EP1_BUFF1_COMP_MASK
 
- XUSB_STATUS_EP1_BUFF2_COMP_MASK
 
- XUSB_STATUS_EP_BUFF2_SHIFT
 
- XUSB_STATUS_FIFO_BUFF_FREE_MASK
 
- XUSB_STATUS_FIFO_BUFF_RDY_MASK
 
- XUSB_STATUS_GLOBAL_INTR_MASK
 
- XUSB_STATUS_HIGH_SPEED_MASK
 
- XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK
 
- XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK
 
- XUSB_STATUS_INTR_EVENT_MASK
 
- XUSB_STATUS_OFFSET
 
- XUSB_STATUS_RESET_MASK
 
- XUSB_STATUS_RESUME_MASK
 
- XUSB_STATUS_SETUP_PACKET_MASK
 
- XUSB_STATUS_SUSPEND_MASK
 
- XUSB_TESTMODE_OFFSET
 
- XVA
 
- XVARC
 
- XVA_MASK
 
- XVCPSGNDP
 
- XVERVE_SIGNALYZER_SH2_PID
 
- XVERVE_SIGNALYZER_SH4_PID
 
- XVERVE_SIGNALYZER_SLITE_PID
 
- XVERVE_SIGNALYZER_ST_PID
 
- XVIPP_DMA_MM2S
 
- XVIPP_DMA_S2MM
 
- XVIP_ACTIVE_HSIZE_MASK
 
- XVIP_ACTIVE_HSIZE_SHIFT
 
- XVIP_ACTIVE_SIZE
 
- XVIP_ACTIVE_VSIZE_MASK
 
- XVIP_ACTIVE_VSIZE_SHIFT
 
- XVIP_CTRL_CONTROL
 
- XVIP_CTRL_CONTROL_BYPASS
 
- XVIP_CTRL_CONTROL_FRAME_SYNC_RESET
 
- XVIP_CTRL_CONTROL_REG_UPDATE
 
- XVIP_CTRL_CONTROL_SW_ENABLE
 
- XVIP_CTRL_CONTROL_SW_RESET
 
- XVIP_CTRL_CONTROL_TEST_PATTERN
 
- XVIP_CTRL_ERROR
 
- XVIP_CTRL_ERROR_SLAVE_EOL_EARLY
 
- XVIP_CTRL_ERROR_SLAVE_EOL_LATE
 
- XVIP_CTRL_ERROR_SLAVE_SOF_EARLY
 
- XVIP_CTRL_ERROR_SLAVE_SOF_LATE
 
- XVIP_CTRL_IRQ_ENABLE
 
- XVIP_CTRL_IRQ_ENABLE_PROC_STARTED
 
- XVIP_CTRL_IRQ_EOF
 
- XVIP_CTRL_STATUS
 
- XVIP_CTRL_STATUS_EOF
 
- XVIP_CTRL_STATUS_PROC_STARTED
 
- XVIP_CTRL_VERSION
 
- XVIP_CTRL_VERSION_INTERNAL_MASK
 
- XVIP_CTRL_VERSION_INTERNAL_SHIFT
 
- XVIP_CTRL_VERSION_MAJOR_MASK
 
- XVIP_CTRL_VERSION_MAJOR_SHIFT
 
- XVIP_CTRL_VERSION_MINOR_MASK
 
- XVIP_CTRL_VERSION_MINOR_SHIFT
 
- XVIP_CTRL_VERSION_PATCH_MASK
 
- XVIP_CTRL_VERSION_PATCH_SHIFT
 
- XVIP_CTRL_VERSION_REVISION_MASK
 
- XVIP_CTRL_VERSION_REVISION_SHIFT
 
- XVIP_DMA_DEF_FORMAT
 
- XVIP_DMA_DEF_HEIGHT
 
- XVIP_DMA_DEF_WIDTH
 
- XVIP_DMA_MAX_HEIGHT
 
- XVIP_DMA_MAX_WIDTH
 
- XVIP_DMA_MIN_HEIGHT
 
- XVIP_DMA_MIN_WIDTH
 
- XVIP_ENCODING
 
- XVIP_ENCODING_NBITS_10
 
- XVIP_ENCODING_NBITS_12
 
- XVIP_ENCODING_NBITS_16
 
- XVIP_ENCODING_NBITS_8
 
- XVIP_ENCODING_NBITS_MASK
 
- XVIP_ENCODING_NBITS_SHIFT
 
- XVIP_ENCODING_VIDEO_FORMAT_MASK
 
- XVIP_ENCODING_VIDEO_FORMAT_RGB
 
- XVIP_ENCODING_VIDEO_FORMAT_SHIFT
 
- XVIP_ENCODING_VIDEO_FORMAT_YUV420
 
- XVIP_ENCODING_VIDEO_FORMAT_YUV422
 
- XVIP_ENCODING_VIDEO_FORMAT_YUV444
 
- XVIP_MAX_HEIGHT
 
- XVIP_MAX_WIDTH
 
- XVIP_MIN_HEIGHT
 
- XVIP_MIN_WIDTH
 
- XVIP_PAD_SINK
 
- XVIP_PAD_SOURCE
 
- XVIP_VF_CUSTOM2
 
- XVIP_VF_CUSTOM3
 
- XVIP_VF_CUSTOM4
 
- XVIP_VF_MONO_SENSOR
 
- XVIP_VF_RBG
 
- XVIP_VF_RGBA
 
- XVIP_VF_RGBD
 
- XVIP_VF_YUVA_420
 
- XVIP_VF_YUVA_422
 
- XVIP_VF_YUVA_444
 
- XVIP_VF_YUVD_420
 
- XVIP_VF_YUVD_422
 
- XVIP_VF_YUVD_444
 
- XVIP_VF_YUV_420
 
- XVIP_VF_YUV_422
 
- XVIP_VF_YUV_444
 
- XVMCLOCKPTR
 
- XVTC_ACTIVE_HSIZE_MASK
 
- XVTC_ACTIVE_HSIZE_SHIFT
 
- XVTC_ACTIVE_SIZE
 
- XVTC_ACTIVE_VSIZE_MASK
 
- XVTC_ACTIVE_VSIZE_SHIFT
 
- XVTC_CONTROL_ACTIVE_CHROMA_POL_SRC
 
- XVTC_CONTROL_ACTIVE_HSIZE_SRC
 
- XVTC_CONTROL_ACTIVE_VIDEO_POL_SRC
 
- XVTC_CONTROL_ACTIVE_VSIZE_SRC
 
- XVTC_CONTROL_CHROMA_SRC
 
- XVTC_CONTROL_DET_ENABLE
 
- XVTC_CONTROL_FIELD_ID_POL_SRC
 
- XVTC_CONTROL_FRAME_HSIZE_SRC
 
- XVTC_CONTROL_FRAME_VSIZE_SRC
 
- XVTC_CONTROL_GEN_ENABLE
 
- XVTC_CONTROL_HBLANK_POL_SRC
 
- XVTC_CONTROL_HSYNC_END_SRC
 
- XVTC_CONTROL_HSYNC_POL_SRC
 
- XVTC_CONTROL_HSYNC_START_SRC
 
- XVTC_CONTROL_SYNC_ENABLE
 
- XVTC_CONTROL_VBLANK_HOFF_SRC
 
- XVTC_CONTROL_VBLANK_POL_SRC
 
- XVTC_CONTROL_VSYNC_END_SRC
 
- XVTC_CONTROL_VSYNC_POL_SRC
 
- XVTC_CONTROL_VSYNC_START_SRC
 
- XVTC_DETECTOR_OFFSET
 
- XVTC_ENCODING
 
- XVTC_ENCODING_CHROMA_PARITY_EVEN_ALL
 
- XVTC_ENCODING_CHROMA_PARITY_EVEN_EVEN
 
- XVTC_ENCODING_CHROMA_PARITY_MASK
 
- XVTC_ENCODING_CHROMA_PARITY_ODD_ALL
 
- XVTC_ENCODING_CHROMA_PARITY_ODD_EVEN
 
- XVTC_ENCODING_CHROMA_PARITY_SHIFT
 
- XVTC_ENCODING_VIDEO_FORMAT_MASK
 
- XVTC_ENCODING_VIDEO_FORMAT_RGB
 
- XVTC_ENCODING_VIDEO_FORMAT_SHIFT
 
- XVTC_ENCODING_VIDEO_FORMAT_YUV420
 
- XVTC_ENCODING_VIDEO_FORMAT_YUV422
 
- XVTC_ENCODING_VIDEO_FORMAT_YUV444
 
- XVTC_ERROR_ACTIVE_CHROMA_LOCK
 
- XVTC_ERROR_ACTIVE_VIDEO_LOCK
 
- XVTC_ERROR_HBLANK_LOCK
 
- XVTC_ERROR_HSYNC_LOCK
 
- XVTC_ERROR_VBLANK_LOCK
 
- XVTC_ERROR_VSYNC_LOCK
 
- XVTC_F0_VBLANK_H
 
- XVTC_F0_VBLANK_HEND_MASK
 
- XVTC_F0_VBLANK_HEND_SHIFT
 
- XVTC_F0_VBLANK_HSTART_MASK
 
- XVTC_F0_VBLANK_HSTART_SHIFT
 
- XVTC_F0_VSYNC_H
 
- XVTC_F0_VSYNC_HEND_MASK
 
- XVTC_F0_VSYNC_HEND_SHIFT
 
- XVTC_F0_VSYNC_HSTART_MASK
 
- XVTC_F0_VSYNC_HSTART_SHIFT
 
- XVTC_F0_VSYNC_V
 
- XVTC_F0_VSYNC_VEND_MASK
 
- XVTC_F0_VSYNC_VEND_SHIFT
 
- XVTC_F0_VSYNC_VSTART_MASK
 
- XVTC_F0_VSYNC_VSTART_SHIFT
 
- XVTC_FRAME_SYNC_CONFIG
 
- XVTC_FRAME_SYNC_H_START_MASK
 
- XVTC_FRAME_SYNC_H_START_SHIFT
 
- XVTC_FRAME_SYNC_V_START_MASK
 
- XVTC_FRAME_SYNC_V_START_SHIFT
 
- XVTC_GENERATOR_GLOBAL_DELAY
 
- XVTC_GENERATOR_OFFSET
 
- XVTC_HSIZE
 
- XVTC_HSIZE_MASK
 
- XVTC_HSYNC
 
- XVTC_HSYNC_END_MASK
 
- XVTC_HSYNC_END_SHIFT
 
- XVTC_HSYNC_START_MASK
 
- XVTC_HSYNC_START_SHIFT
 
- XVTC_IRQ_ENABLE_DET_ACTIVE_VIDEO
 
- XVTC_IRQ_ENABLE_DET_VBLANK
 
- XVTC_IRQ_ENABLE_FSYNC
 
- XVTC_IRQ_ENABLE_GEN_ACTIVE_VIDEO
 
- XVTC_IRQ_ENABLE_GEN_VBLANK
 
- XVTC_IRQ_ENABLE_LOCK
 
- XVTC_IRQ_ENABLE_LOCK_LOSS
 
- XVTC_MAX_HSIZE
 
- XVTC_MAX_VSIZE
 
- XVTC_POLARITY
 
- XVTC_POLARITY_ACTIVE_CHROMA_POL
 
- XVTC_POLARITY_ACTIVE_VIDEO_POL
 
- XVTC_POLARITY_HBLANK_POL
 
- XVTC_POLARITY_HSYNC_POL
 
- XVTC_POLARITY_VBLANK_POL
 
- XVTC_POLARITY_VSYNC_POL
 
- XVTC_STATUS_DET_ACTIVE_VIDEO
 
- XVTC_STATUS_DET_VBLANK
 
- XVTC_STATUS_FSYNC
 
- XVTC_STATUS_GEN_ACTIVE_VIDEO
 
- XVTC_STATUS_GEN_VBLANK
 
- XVTC_STATUS_LOCK
 
- XVTC_STATUS_LOCK_LOSS
 
- XVTC_TIMING_STATUS
 
- XVTC_TIMING_STATUS_ACTIVE_VIDEO
 
- XVTC_TIMING_STATUS_LOCKED
 
- XVTC_TIMING_STATUS_VBLANK
 
- XVTC_VSIZE
 
- XVTC_VSIZE_MASK
 
- XW
 
- XWAY_MDIO_IMASK
 
- XWAY_MDIO_INIT_ADSC
 
- XWAY_MDIO_INIT_ANC
 
- XWAY_MDIO_INIT_ANE
 
- XWAY_MDIO_INIT_DXMC
 
- XWAY_MDIO_INIT_LSPC
 
- XWAY_MDIO_INIT_LSTC
 
- XWAY_MDIO_INIT_MASK
 
- XWAY_MDIO_INIT_MDIXC
 
- XWAY_MDIO_INIT_MPIPC
 
- XWAY_MDIO_INIT_MSRE
 
- XWAY_MDIO_INIT_NPRX
 
- XWAY_MDIO_INIT_NPTX
 
- XWAY_MDIO_INIT_WOL
 
- XWAY_MDIO_ISTAT
 
- XWAY_MMD_LED0H
 
- XWAY_MMD_LED0L
 
- XWAY_MMD_LED1H
 
- XWAY_MMD_LED1L
 
- XWAY_MMD_LED2H
 
- XWAY_MMD_LED2L
 
- XWAY_MMD_LED3H
 
- XWAY_MMD_LED3L
 
- XWAY_MMD_LEDCH
 
- XWAY_MMD_LEDCH_CBLINK_ABIST
 
- XWAY_MMD_LEDCH_CBLINK_ANEG
 
- XWAY_MMD_LEDCH_CBLINK_CDIAG
 
- XWAY_MMD_LEDCH_CBLINK_EEE
 
- XWAY_MMD_LEDCH_CBLINK_LINK
 
- XWAY_MMD_LEDCH_CBLINK_NONE
 
- XWAY_MMD_LEDCH_CBLINK_PDOWN
 
- XWAY_MMD_LEDCH_CBLINK_TEST
 
- XWAY_MMD_LEDCH_FBF_F02HZ
 
- XWAY_MMD_LEDCH_FBF_F04HZ
 
- XWAY_MMD_LEDCH_FBF_F08HZ
 
- XWAY_MMD_LEDCH_FBF_F16HZ
 
- XWAY_MMD_LEDCH_NACS_ABIST
 
- XWAY_MMD_LEDCH_NACS_ANEG
 
- XWAY_MMD_LEDCH_NACS_CDIAG
 
- XWAY_MMD_LEDCH_NACS_EEE
 
- XWAY_MMD_LEDCH_NACS_LINK
 
- XWAY_MMD_LEDCH_NACS_NONE
 
- XWAY_MMD_LEDCH_NACS_PDOWN
 
- XWAY_MMD_LEDCH_NACS_TEST
 
- XWAY_MMD_LEDCH_SBF_F02HZ
 
- XWAY_MMD_LEDCH_SBF_F04HZ
 
- XWAY_MMD_LEDCH_SBF_F08HZ
 
- XWAY_MMD_LEDCH_SBF_F16HZ
 
- XWAY_MMD_LEDCH_SCAN_ABIST
 
- XWAY_MMD_LEDCH_SCAN_ANEG
 
- XWAY_MMD_LEDCH_SCAN_CDIAG
 
- XWAY_MMD_LEDCH_SCAN_EEE
 
- XWAY_MMD_LEDCH_SCAN_LINK
 
- XWAY_MMD_LEDCH_SCAN_NONE
 
- XWAY_MMD_LEDCH_SCAN_PDOWN
 
- XWAY_MMD_LEDCH_SCAN_TEST
 
- XWAY_MMD_LEDCL
 
- XWAY_MMD_LEDxH_BLINKF_ABIST
 
- XWAY_MMD_LEDxH_BLINKF_ANEG
 
- XWAY_MMD_LEDxH_BLINKF_CDIAG
 
- XWAY_MMD_LEDxH_BLINKF_EEE
 
- XWAY_MMD_LEDxH_BLINKF_LINK10
 
- XWAY_MMD_LEDxH_BLINKF_LINK100
 
- XWAY_MMD_LEDxH_BLINKF_LINK1000
 
- XWAY_MMD_LEDxH_BLINKF_LINK100X
 
- XWAY_MMD_LEDxH_BLINKF_LINK10X
 
- XWAY_MMD_LEDxH_BLINKF_LINK10XX
 
- XWAY_MMD_LEDxH_BLINKF_LINK10_0
 
- XWAY_MMD_LEDxH_BLINKF_MASK
 
- XWAY_MMD_LEDxH_BLINKF_NONE
 
- XWAY_MMD_LEDxH_BLINKF_PDOWN
 
- XWAY_MMD_LEDxH_CON_ABIST
 
- XWAY_MMD_LEDxH_CON_ANEG
 
- XWAY_MMD_LEDxH_CON_CDIAG
 
- XWAY_MMD_LEDxH_CON_COPPER
 
- XWAY_MMD_LEDxH_CON_EEE
 
- XWAY_MMD_LEDxH_CON_FIBER
 
- XWAY_MMD_LEDxH_CON_LINK10
 
- XWAY_MMD_LEDxH_CON_LINK100
 
- XWAY_MMD_LEDxH_CON_LINK1000
 
- XWAY_MMD_LEDxH_CON_LINK100X
 
- XWAY_MMD_LEDxH_CON_LINK10X
 
- XWAY_MMD_LEDxH_CON_LINK10XX
 
- XWAY_MMD_LEDxH_CON_LINK10_0
 
- XWAY_MMD_LEDxH_CON_MASK
 
- XWAY_MMD_LEDxH_CON_NONE
 
- XWAY_MMD_LEDxH_CON_PDOWN
 
- XWAY_MMD_LEDxL_BLINKS_ABIST
 
- XWAY_MMD_LEDxL_BLINKS_ANEG
 
- XWAY_MMD_LEDxL_BLINKS_CDIAG
 
- XWAY_MMD_LEDxL_BLINKS_EEE
 
- XWAY_MMD_LEDxL_BLINKS_LINK10
 
- XWAY_MMD_LEDxL_BLINKS_LINK100
 
- XWAY_MMD_LEDxL_BLINKS_LINK1000
 
- XWAY_MMD_LEDxL_BLINKS_LINK100X
 
- XWAY_MMD_LEDxL_BLINKS_LINK10X
 
- XWAY_MMD_LEDxL_BLINKS_LINK10XX
 
- XWAY_MMD_LEDxL_BLINKS_LINK10_0
 
- XWAY_MMD_LEDxL_BLINKS_MASK
 
- XWAY_MMD_LEDxL_BLINKS_NONE
 
- XWAY_MMD_LEDxL_BLINKS_PDOWN
 
- XWAY_MMD_LEDxL_PULSE_COL
 
- XWAY_MMD_LEDxL_PULSE_MASK
 
- XWAY_MMD_LEDxL_PULSE_NONE
 
- XWAY_MMD_LEDxL_PULSE_RXACT
 
- XWAY_MMD_LEDxL_PULSE_TXACT
 
- XWAY_MUX_ASC
 
- XWAY_MUX_CBUS
 
- XWAY_MUX_CGU
 
- XWAY_MUX_DFE
 
- XWAY_MUX_EBU
 
- XWAY_MUX_EBU2
 
- XWAY_MUX_EPHY
 
- XWAY_MUX_EXIN
 
- XWAY_MUX_GPHY
 
- XWAY_MUX_GPIO
 
- XWAY_MUX_GPT
 
- XWAY_MUX_JTAG
 
- XWAY_MUX_MCD
 
- XWAY_MUX_MDIO
 
- XWAY_MUX_MII
 
- XWAY_MUX_NMI
 
- XWAY_MUX_NONE
 
- XWAY_MUX_PCI
 
- XWAY_MUX_SDIO
 
- XWAY_MUX_SIN
 
- XWAY_MUX_SPI
 
- XWAY_MUX_SSI
 
- XWAY_MUX_STP
 
- XWAY_MUX_TDM
 
- XWAY_MUX_USIF
 
- XWAY_MUX_WIFI
 
- XWAY_STP_10HZ
 
- XWAY_STP_2HZ
 
- XWAY_STP_4HZ
 
- XWAY_STP_8HZ
 
- XWAY_STP_ADSL_MASK
 
- XWAY_STP_ADSL_SHIFT
 
- XWAY_STP_AR
 
- XWAY_STP_CON0
 
- XWAY_STP_CON1
 
- XWAY_STP_CON_SWU
 
- XWAY_STP_CPU0
 
- XWAY_STP_CPU1
 
- XWAY_STP_EDGE_MASK
 
- XWAY_STP_FALLING
 
- XWAY_STP_GROUP0
 
- XWAY_STP_GROUP1
 
- XWAY_STP_GROUP2
 
- XWAY_STP_GROUP_MASK
 
- XWAY_STP_PHY1_SHIFT
 
- XWAY_STP_PHY2_SHIFT
 
- XWAY_STP_PHY_MASK
 
- XWAY_STP_SPEED_MASK
 
- XWAY_STP_UPD_FPI
 
- XWAY_STP_UPD_MASK
 
- XWC_MASK
 
- XWDLEN1
 
- XWDLEN2
 
- XWIDGET_HARDWARE_ID_MATCH
 
- XWIDGET_MFG_NUM
 
- XWIDGET_MFG_NUM_NONE
 
- XWIDGET_NONE
 
- XWIDGET_PART_NUM
 
- XWIDGET_PART_NUM_NONE
 
- XWIDGET_REV_NUM
 
- XWIDGET_REV_NUM_NONE
 
- XWRA_MASK
 
- XWT_CSR0_EWDT1_MASK
 
- XWT_CSR0_WDS_MASK
 
- XWT_CSR0_WRS_MASK
 
- XWT_CSRX_EWDT2_MASK
 
- XWT_MAX_SELFTEST_LOOP_COUNT
 
- XWT_TBR_OFFSET
 
- XWT_TIMER_FAILED
 
- XWT_TWCSR0_OFFSET
 
- XWT_TWCSR1_OFFSET
 
- XWUP_MARK
 
- XW_MASK
 
- XX1RB_MASK
 
- XX1_MASK
 
- XX2
 
- XX2BFD_MASK
 
- XX2BF_MASK
 
- XX2DCMXS_MASK
 
- XX2UIM4_MASK
 
- XX2UIM_MASK
 
- XX2VA
 
- XX2_MASK
 
- XX3
 
- XX3BF_MASK
 
- XX3DM_MASK
 
- XX3RC
 
- XX3SHW_MASK
 
- XX3_MASK
 
- XX4
 
- XX4_MASK
 
- XXBOW_WIDGET_PART_NUM
 
- XXD
 
- XXDEBUG
 
- XXHASH64_BLOCK_SIZE
 
- XXHASH64_DIGEST_SIZE
 
- XXHASH_H
 
- XXH_CPU_LITTLE_ENDIAN
 
- XXLOR
 
- XXSWAPD
 
- XXTI_DURATION
 
- XXX10304
 
- XXXEXIT_TO_SOME_EXIT
 
- XXXINIT_TO_SOME_INIT
 
- XXX_LOCK_USAGE_STATES
 
- XX_CODEC_ADC_CONTROL_REGISTER
 
- XX_CODEC_CLOCK_CONTROL_REGISTER
 
- XX_CODEC_DAC_CONTROL_REGISTER
 
- XX_CODEC_LEVEL_LEFT_REGISTER
 
- XX_CODEC_LEVEL_RIGHT_REGISTER
 
- XX_CODEC_PORT_MODE_REGISTER
 
- XX_CODEC_SELECTOR
 
- XX_CODEC_STATUS_REPORT_REGISTER
 
- XX_DIR_LEN
 
- XX_DSP_RESET_WAIT_TIME
 
- XX_UER_CBITS_OFFSET_MASK
 
- XY2
 
- XY2_INVERT
 
- XY2_TB_XOR
 
- XY2_X
 
- XY2_XYSEL
 
- XY2_Y
 
- XY2_ZERO
 
- XYLD_REG_DBG_DWORD_ENABLE
 
- XYLD_REG_DBG_FORCE_FRAME
 
- XYLD_REG_DBG_FORCE_VALID
 
- XYLD_REG_DBG_SELECT
 
- XYLD_REG_DBG_SHIFT
 
- XYLD_REG_SCBD_STRICT_PRIO
 
- XYZW
 
- XY_BUFSIZE
 
- XY_BUF_OFFSET
 
- XY_COLOR_BLT_CMD
 
- XY_MASK
 
- XY_MONO_PAT_BLT_CMD
 
- XY_MONO_SRC_BLT_CMD
 
- XY_MONO_SRC_COPY_IMM_BLT
 
- XY_MONO_SRC_IMM_BLT_CMD
 
- XY_RATIO
 
- XY_RATIO_16_10
 
- XY_RATIO_16_9
 
- XY_RATIO_4_3
 
- XY_RATIO_5_4
 
- XY_SETUP_CLIP_BLT_CMD
 
- XY_SRC_COPY_BLT_CMD
 
- XY_SRC_COPY_BLT_DST_TILED
 
- XY_SRC_COPY_BLT_SRC_TILED
 
- XZYNQ_CANPS
 
- XZ_BUF_ERROR
 
- XZ_CHECK_CRC32
 
- XZ_CHECK_CRC64
 
- XZ_CHECK_MAX
 
- XZ_CHECK_NONE
 
- XZ_CHECK_SHA256
 
- XZ_COMPRESSION
 
- XZ_DATA_ERROR
 
- XZ_DEC_ARM
 
- XZ_DEC_ARMTHUMB
 
- XZ_DEC_BCJ
 
- XZ_DEC_DYNALLOC
 
- XZ_DEC_IA64
 
- XZ_DEC_POWERPC
 
- XZ_DEC_PREALLOC
 
- XZ_DEC_SINGLE
 
- XZ_DEC_SPARC
 
- XZ_DEC_X86
 
- XZ_DYNALLOC
 
- XZ_EXTERN
 
- XZ_FORMAT_ERROR
 
- XZ_H
 
- XZ_INTERNAL_CRC32
 
- XZ_IOBUF_SIZE
 
- XZ_LZMA2_H
 
- XZ_MEMLIMIT_ERROR
 
- XZ_MEM_ERROR
 
- XZ_OK
 
- XZ_OPTIONS_ERROR
 
- XZ_PREALLOC
 
- XZ_PREBOOT
 
- XZ_PRIVATE_H
 
- XZ_SINGLE
 
- XZ_STREAM_END
 
- XZ_STREAM_H
 
- XZ_UNSUPPORTED_CHECK
 
- X_12
 
- X_AXIS_MAX
 
- X_AXIS_MIN
 
- X_BASS
 
- X_CLIP_END
 
- X_CLIP_START
 
- X_COORD_SHIFT
 
- X_CPL_RX_MPS_PKT_TYPE_PAUSE
 
- X_CPL_RX_MPS_PKT_TYPE_PPP
 
- X_CPL_RX_MPS_PKT_TYPE_PTP
 
- X_CPL_RX_MPS_PKT_TYPE_QFC
 
- X_DEC
 
- X_END
 
- X_ETH_FW_ADDED_VLAN
 
- X_ETH_INBAND_VLAN
 
- X_ETH_LOCAL_RING_SIZE
 
- X_ETH_NO_VLAN
 
- X_ETH_OUTBAND_VLAN
 
- X_EVEN_INC
 
- X_EXT
 
- X_EXTENSIONKEY
 
- X_EXTENSIONKEY_CISCO_NEW
 
- X_EXTENSIONKEY_CISCO_OLD
 
- X_EXT_AUX_SIZE
 
- X_EXT_MAIN_SIZE
 
- X_FETCHBURSTMAX_128B
 
- X_FETCHBURSTMAX_256B
 
- X_FETCHBURSTMAX_512B
 
- X_FETCHBURSTMAX_64B
 
- X_FETCHBURSTMIN_128B
 
- X_FETCHBURSTMIN_16B
 
- X_FETCHBURSTMIN_32B
 
- X_FETCHBURSTMIN_64B
 
- X_FIFO_MAX_LEN
 
- X_FINAL_CLEANUP_AGG_INT
 
- X_HOSTFCMODE_BOTH
 
- X_HOSTFCMODE_INGRESS_QUEUE
 
- X_HOSTFCMODE_NONE
 
- X_HOSTFCMODE_STATUS_PAGE
 
- X_INC
 
- X_INDEX
 
- X_INGPCIEBOUNDARY_1024B
 
- X_INGPCIEBOUNDARY_128B
 
- X_INGPCIEBOUNDARY_2048B
 
- X_INGPCIEBOUNDARY_256B
 
- X_INGPCIEBOUNDARY_32B
 
- X_INGPCIEBOUNDARY_4096B
 
- X_INGPCIEBOUNDARY_512B
 
- X_INGPCIEBOUNDARY_64B
 
- X_INTERRUPTDESTINATION_IQ
 
- X_INTERRUPTDESTINATION_PCIE
 
- X_MASK
 
- X_MAX
 
- X_MAX_FIFOS
 
- X_MAX_POSITIVE
 
- X_MBOWNER_FW
 
- X_MBOWNER_PL
 
- X_MIN
 
- X_MPLL_REF_DIV_MASK
 
- X_MPLL_REF_FB_DIV
 
- X_ODD_INC
 
- X_OFF
 
- X_OFFSET
 
- X_ON_KEY_B
 
- X_OUTPUT_SIZE_LSB
 
- X_OUTPUT_SIZE_MSB
 
- X_PFX
 
- X_R
 
- X_RANGE_ALL
 
- X_RANGE_AUX
 
- X_RANGE_EXT
 
- X_RANGE_MAIN
 
- X_REG_M
 
- X_REG_N
 
- X_RFB_AN_ERR
 
- X_RFB_LF
 
- X_RFB_OFF
 
- X_RFB_OK
 
- X_RSPD_TYPE_CPL
 
- X_RSPD_TYPE_FLBUF
 
- X_RSPD_TYPE_INTR
 
- X_SIZE
 
- X_STATIC
 
- X_STAT_PFX
 
- X_TIMERREG_COUNTER0
 
- X_TIMERREG_COUNTER1
 
- X_TIMERREG_COUNTER2
 
- X_TIMERREG_COUNTER3
 
- X_TIMERREG_COUNTER4
 
- X_TIMERREG_COUNTER5
 
- X_TIMERREG_RESTART_COUNTER
 
- X_TIMERREG_UPDATE_CIDX
 
- X_UPDATEDELIVERY_BOTH
 
- X_UPDATEDELIVERY_INTERRUPT
 
- X_UPDATEDELIVERY_NONE
 
- X_UPDATEDELIVERY_STATUS_PAGE
 
- X_UPDATESCHEDULING_COUNTER_OPTTIMER
 
- X_UPDATESCHEDULING_TIMER
 
- X_V2_VID_MEM_START
 
- X_V2_VID_SRC_WIDTH
 
- X_V2_VID_SRC_WIN_WIDTH
 
- X_V2_X_END
 
- X_V2_X_START
 
- X_V2_Y_END
 
- X_V2_Y_START
 
- Xcvr
 
- Xcvr_shift
 
- XenbusStateClosed
 
- XenbusStateClosing
 
- XenbusStateConnected
 
- XenbusStateInitWait
 
- XenbusStateInitialised
 
- XenbusStateInitialising
 
- XenbusStateReconfigured
 
- XenbusStateReconfiguring
 
- XenbusStateUnknown
 
- XgDmaDone_WIDTH
 
- XgDmaDone_offset
 
- XgRxAlignError_WIDTH
 
- XgRxAlignError_offset
 
- XgRxBroadcastPkts_WIDTH
 
- XgRxBroadcastPkts_offset
 
- XgRxControlPkts_WIDTH
 
- XgRxControlPkts_offset
 
- XgRxDropEvents_WIDTH
 
- XgRxDropEvents_offset
 
- XgRxFCSerrorPkts_WIDTH
 
- XgRxFCSerrorPkts_offset
 
- XgRxInternalMACError_WIDTH
 
- XgRxInternalMACError_offset
 
- XgRxJabberPkts_WIDTH
 
- XgRxJabberPkts_offset
 
- XgRxLengthError_WIDTH
 
- XgRxLengthError_offset
 
- XgRxMulticastPkts_WIDTH
 
- XgRxMulticastPkts_offset
 
- XgRxOctetsOK_WIDTH
 
- XgRxOctetsOK_offset
 
- XgRxOctets_WIDTH
 
- XgRxOctets_offset
 
- XgRxOversizePkts_WIDTH
 
- XgRxOversizePkts_offset
 
- XgRxPausePkts_WIDTH
 
- XgRxPausePkts_offset
 
- XgRxPkts1024to15xxOctets_WIDTH
 
- XgRxPkts1024to15xxOctets_offset
 
- XgRxPkts128to255Octets_WIDTH
 
- XgRxPkts128to255Octets_offset
 
- XgRxPkts15xxtoMaxOctets_WIDTH
 
- XgRxPkts15xxtoMaxOctets_offset
 
- XgRxPkts256to511Octets_WIDTH
 
- XgRxPkts256to511Octets_offset
 
- XgRxPkts512to1023Octets_WIDTH
 
- XgRxPkts512to1023Octets_offset
 
- XgRxPkts64Octets_WIDTH
 
- XgRxPkts64Octets_offset
 
- XgRxPkts65to127Octets_WIDTH
 
- XgRxPkts65to127Octets_offset
 
- XgRxPktsOK_WIDTH
 
- XgRxPktsOK_offset
 
- XgRxPkts_WIDTH
 
- XgRxPkts_offset
 
- XgRxSymbolError_WIDTH
 
- XgRxSymbolError_offset
 
- XgRxUndersizeFCSerrorPkts_WIDTH
 
- XgRxUndersizeFCSerrorPkts_offset
 
- XgRxUndersizePkts_WIDTH
 
- XgRxUndersizePkts_offset
 
- XgRxUnicastPkts_WIDTH
 
- XgRxUnicastPkts_offset
 
- XgTxBroadcastPkts_WIDTH
 
- XgTxBroadcastPkts_offset
 
- XgTxControlPkts_WIDTH
 
- XgTxControlPkts_offset
 
- XgTxIpSrcErrPkt_WIDTH
 
- XgTxIpSrcErrPkt_offset
 
- XgTxMacSrcErrPkt_WIDTH
 
- XgTxMacSrcErrPkt_offset
 
- XgTxMulticastPkts_WIDTH
 
- XgTxMulticastPkts_offset
 
- XgTxNonTcpUdpPkt_WIDTH
 
- XgTxNonTcpUdpPkt_offset
 
- XgTxOctets_WIDTH
 
- XgTxOctets_offset
 
- XgTxOversizePkts_WIDTH
 
- XgTxOversizePkts_offset
 
- XgTxPausePkts_WIDTH
 
- XgTxPausePkts_offset
 
- XgTxPkts1024to15xxOctets_WIDTH
 
- XgTxPkts1024to15xxOctets_offset
 
- XgTxPkts128to255Octets_WIDTH
 
- XgTxPkts128to255Octets_offset
 
- XgTxPkts1519toMaxOctets_WIDTH
 
- XgTxPkts1519toMaxOctets_offset
 
- XgTxPkts256to511Octets_WIDTH
 
- XgTxPkts256to511Octets_offset
 
- XgTxPkts512to1023Octets_WIDTH
 
- XgTxPkts512to1023Octets_offset
 
- XgTxPkts64Octets_WIDTH
 
- XgTxPkts64Octets_offset
 
- XgTxPkts65to127Octets_WIDTH
 
- XgTxPkts65to127Octets_offset
 
- XgTxPkts_WIDTH
 
- XgTxPkts_offset
 
- XgTxUndersizePkts_WIDTH
 
- XgTxUndersizePkts_offset
 
- XgTxUnicastPkts_WIDTH
 
- XgTxUnicastPkts_offset
 
- Xoff_state
 
- Xres
 
- Xsig
 
- XsigH
 
- XsigL
 
- XsigLL
 
- Xtal0
 
- Xtal1
 
- XtalAuto
 
[..]