[..]
- L
 
- L0
 
- L0BLKRST
 
- L0S_ENTRANCE_LAT_MASK
 
- L0S_ENTRANCE_LAT_SHIFT
 
- L0_CLKBUF_EN
 
- L0_DRV_LVL
 
- L0_RESET_TSYNC_EN
 
- L0_RX_EQUALIZE_ENABLE
 
- L0_RX_I_EN
 
- L0_RX_SIGDET_EN
 
- L0_RX_TERM_MODE
 
- L0_TRAN_BIAS_EN
 
- L0_TX_EN
 
- L1
 
- L14_16XX_GPIO49
 
- L14_16XX_UART3_RX
 
- L15_1610_CAM_HS
 
- L15_1610_ETM_PSTAT1
 
- L18
 
- L18_1610_CAM_VS
 
- L18_1610_ETM_PSTAT2
 
- L18_DESC
 
- L19
 
- L19_1610_CAM_D0
 
- L19_1610_ETM_D0
 
- L19_DESC
 
- L1BLKRST
 
- L1CSR0_CFI
 
- L1CSR0_CLFC
 
- L1CSR0_CPE
 
- L1CSR0_CUL
 
- L1CSR0_DCE
 
- L1CSR0_DCFI
 
- L1CSR1_CPE
 
- L1CSR1_ICE
 
- L1CSR1_ICFI
 
- L1CSR1_ICLFR
 
- L1CSR2_DCWS
 
- L1C_CTRL_DMA_RCB_LEN128
 
- L1C_LEGCYPS_DEF
 
- L1C_PM_CTRL_L1_ENTRY_TM
 
- L1C_TXQ_CFGV
 
- L1C_TXQ_TXF_BURST_PREF
 
- L1DAT
 
- L1DCACHE_SIZE
 
- L1DTG
 
- L1D_CACHE_BYTES
 
- L1D_CACHE_ORDER
 
- L1D_CACHE_SHIFT
 
- L1D_CLDCTRL3
 
- L1D_FLUSH
 
- L1D_FLUSH_FALLBACK
 
- L1D_FLUSH_MTTRIG
 
- L1D_FLUSH_NONE
 
- L1D_FLUSH_ORI
 
- L1D_LEGCYPS_DEF
 
- L1D_MPW_PHYID1
 
- L1D_MPW_PHYID2
 
- L1D_MPW_PHYID3
 
- L1D_MSE16DB_DOWN
 
- L1D_MSE16DB_UP
 
- L1D_PMCTRL_L0S_TIMER_MASK
 
- L1D_PMCTRL_L0S_TIMER_SHIFT
 
- L1D_PMCTRL_L1_ENTRY_TM_16US
 
- L1D_PMCTRL_L1_ENTRY_TM_24US
 
- L1D_PMCTRL_L1_ENTRY_TM_2US
 
- L1D_PMCTRL_L1_ENTRY_TM_32US
 
- L1D_PMCTRL_L1_ENTRY_TM_4US
 
- L1D_PMCTRL_L1_ENTRY_TM_63US
 
- L1D_PMCTRL_L1_ENTRY_TM_8US
 
- L1D_PMCTRL_L1_ENTRY_TM_DIS
 
- L1D_PMCTRL_L1_ENTRY_TM_MASK
 
- L1D_PMCTRL_L1_ENTRY_TM_SHIFT
 
- L1D_SYSMODCTRL_IECHOADJ_DEF
 
- L1D_cache_block_invalidate
 
- L1D_cache_block_writeback
 
- L1D_cache_block_writeback_invalidate
 
- L1D_cache_global_invalidate
 
- L1D_cache_global_writeback
 
- L1D_cache_global_writeback_invalidate
 
- L1F_HRTBT_EXT_CTRL_IOAC_1_FRAGMENTED
 
- L1F_HRTBT_EXT_CTRL_IOAC_1_HAS_VLAN
 
- L1F_HRTBT_EXT_CTRL_IOAC_1_IS_8023
 
- L1F_HRTBT_EXT_CTRL_IOAC_1_IS_IPV6
 
- L1F_HRTBT_EXT_CTRL_IOAC_1_KEEPALIVE_EN
 
- L1F_HRTBT_EXT_CTRL_IOAC_2_FRAGMENTED
 
- L1F_HRTBT_EXT_CTRL_IOAC_2_HAS_VLAN
 
- L1F_HRTBT_EXT_CTRL_IOAC_2_IS_8023
 
- L1F_HRTBT_EXT_CTRL_IOAC_2_IS_IPV6
 
- L1F_HRTBT_EXT_CTRL_IOAC_2_KEEPALIVE_EN
 
- L1F_HRTBT_EXT_CTRL_PERIOD_HIGH_MASK
 
- L1F_HRTBT_EXT_CTRL_PERIOD_HIGH_SHIFT
 
- L1F_HRTBT_EXT_CTRL_SWOI_STARTUP_PKT_EN
 
- L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP
 
- L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC
 
- L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT
 
- L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC
 
- L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE
 
- L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP
 
- L1GPU_DISPLAY_SYNC_HSYNC
 
- L1GPU_DISPLAY_SYNC_VSYNC
 
- L1GPU_FB_BLIT_WAIT_FOR_COMPLETION
 
- L1IMU10_HWID
 
- L1IMU11_HWID
 
- L1IMU12_HWID
 
- L1IMU13_HWID
 
- L1IMU14_HWID
 
- L1IMU15_HWID
 
- L1IMU3_HWID
 
- L1IMU4_HWID
 
- L1IMU5_HWID
 
- L1IMU6_HWID
 
- L1IMU7_HWID
 
- L1IMU8_HWID
 
- L1IMU9_HWID
 
- L1IMU_IOAGR_HWID
 
- L1IMU_NBIF_HWID
 
- L1IMU_PCIE_HWID
 
- L1INS
 
- L1ITG
 
- L1LXT971A_PHY_ID
 
- L1OFF_MBIAS2_EN_5250
 
- L1OIP_DEFAULTPORT
 
- L1OIP_KEEPALIVE
 
- L1OIP_MAX_LEN
 
- L1OIP_MAX_PERFRAME
 
- L1OIP_TIMEOUT
 
- L1OIP_VERSION
 
- L1P_CACHE_BYTES
 
- L1P_CACHE_SHIFT
 
- L1P_cache_block_invalidate
 
- L1P_cache_global_invalidate
 
- L1SUB_AUTO_CFG
 
- L1SUB_CONFIG1
 
- L1SUB_CONFIG2
 
- L1SUB_CONFIG3
 
- L1S_STATE_COUNT
 
- L1TF_DEFAULT_MSG
 
- L1TF_MITIGATION_FLUSH
 
- L1TF_MITIGATION_FLUSH_NOSMT
 
- L1TF_MITIGATION_FLUSH_NOWARN
 
- L1TF_MITIGATION_FULL
 
- L1TF_MITIGATION_FULL_FORCE
 
- L1TF_MITIGATION_OFF
 
- L1TF_MSG_L1D
 
- L1TF_MSG_SMT
 
- L1_CACHE_ALIGN
 
- L1_CACHE_BYTES
 
- L1_CACHE_SHIFT
 
- L1_CLK_RMV_DIS
 
- L1_ENTRANCE_LAT_MASK
 
- L1_ENTRANCE_LAT_SHIFT
 
- L1_EVENT_COUNT
 
- L1_INTR_STAT
 
- L1_INTR_STAT_INTR1
 
- L1_ORDER
 
- L1_PPTB_mskBASE
 
- L1_PPTB_mskNV
 
- L1_PPTB_offBASE
 
- L1_PPTB_offNV
 
- L1_SIGNAL_AIS_OFF
 
- L1_SIGNAL_AIS_ON
 
- L1_SIGNAL_LOS_OFF
 
- L1_SIGNAL_LOS_ON
 
- L1_SIGNAL_RDI_OFF
 
- L1_SIGNAL_RDI_ON
 
- L1_SIGNAL_SLIP_RX
 
- L1_SIGNAL_SLIP_TX
 
- L1_SNOOZE_DELAY_DEF
 
- L1_SNOOZE_TEST_EN
 
- L1_SPDWN_EN
 
- L1_cache_off
 
- L1_cache_on
 
- L1_params
 
- L2
 
- L20
 
- L20_DESC
 
- L21
 
- L210_AUX_CTRL_EXCLUSIVE_ABORT
 
- L210_AUX_CTRL_WA_OVERRIDE
 
- L210_AUX_CTRL_WRAP_DISABLE
 
- L210_CACHE_ID_RTL_R0P1
 
- L210_CACHE_ID_RTL_R0P2_01
 
- L210_CACHE_ID_RTL_R0P2_02
 
- L210_CACHE_ID_RTL_R0P3
 
- L210_CACHE_ID_RTL_R0P4
 
- L210_CACHE_ID_RTL_R0P5
 
- L21_DESC
 
- L22
 
- L220_AUX_CTRL_EXCLUSIVE_CACHE
 
- L220_AUX_CTRL_FWA_MASK
 
- L220_AUX_CTRL_FWA_SHIFT
 
- L220_AUX_CTRL_NS_INT_CTRL
 
- L220_AUX_CTRL_NS_LOCKDOWN
 
- L220_CACHE_ID_RTL_R1P7_01REL0
 
- L220_PLUS_EVENT_ATTR
 
- L22_DESC
 
- L23
 
- L23_CLK_RMV_DIS
 
- L24
 
- L26
 
- L27MHZ_DEVICE
 
- L2ARRINTEN0
 
- L2ARRINTEN1
 
- L2ARRINTEN2
 
- L2ARRMCKEN0
 
- L2ARRMCKEN1
 
- L2ARRMCKEN2
 
- L2ARRSTAT0
 
- L2ARRSTAT1
 
- L2ARRSTAT2
 
- L2A_UPDATE_FILTER_CNTL__L2a_Update_Filter_Bypass_MASK
 
- L2A_UPDATE_FILTER_CNTL__L2a_Update_Filter_Bypass__SHIFT
 
- L2A_UPDATE_FILTER_CNTL__L2a_Update_Filter_RdLatency_MASK
 
- L2A_UPDATE_FILTER_CNTL__L2a_Update_Filter_RdLatency__SHIFT
 
- L2BLKRST
 
- L2BPERDMAP
 
- L2BPSP_ERR_REP_ENABLE__HE_SUP_MASK
 
- L2BPSP_ERR_REP_ENABLE__HE_SUP__SHIFT
 
- L2BPSP_ERR_REP_ENABLE__Reserved_MASK
 
- L2BPSP_ERR_REP_ENABLE__Reserved__SHIFT
 
- L2BPSP_HW_ERR_LOWER_0__SECOND_EV_CODE_LO_MASK
 
- L2BPSP_HW_ERR_LOWER_0__SECOND_EV_CODE_LO__SHIFT
 
- L2BPSP_HW_ERR_LOWER_1__SECOND_EV_CODE_HI_MASK
 
- L2BPSP_HW_ERR_LOWER_1__SECOND_EV_CODE_HI__SHIFT
 
- L2BPSP_HW_ERR_STATUS_0__HEO_MASK
 
- L2BPSP_HW_ERR_STATUS_0__HEO__SHIFT
 
- L2BPSP_HW_ERR_STATUS_0__HEV_MASK
 
- L2BPSP_HW_ERR_STATUS_0__HEV__SHIFT
 
- L2BPSP_HW_ERR_STATUS_0__Reserved_MASK
 
- L2BPSP_HW_ERR_STATUS_0__Reserved__SHIFT
 
- L2BPSP_HW_ERR_STATUS_1__Reserved_MASK
 
- L2BPSP_HW_ERR_STATUS_1__Reserved__SHIFT
 
- L2BPSP_HW_ERR_UPPER_0__FIRST_EV_CODE_LO_MASK
 
- L2BPSP_HW_ERR_UPPER_0__FIRST_EV_CODE_LO__SHIFT
 
- L2BPSP_HW_ERR_UPPER_1__EV_CODE_MASK
 
- L2BPSP_HW_ERR_UPPER_1__EV_CODE__SHIFT
 
- L2BPSP_HW_ERR_UPPER_1__FIRST_EV_CODE_HI_MASK
 
- L2BPSP_HW_ERR_UPPER_1__FIRST_EV_CODE_HI__SHIFT
 
- L2B_SDP_MAXCRED__L2B_DATA_MAXCRED_MASK
 
- L2B_SDP_MAXCRED__L2B_DATA_MAXCRED__SHIFT
 
- L2B_SDP_MAXCRED__L2B_RDRSP_MAXCRED_MASK
 
- L2B_SDP_MAXCRED__L2B_RDRSP_MAXCRED__SHIFT
 
- L2B_SDP_MAXCRED__L2B_REQ_MAXCRED_MASK
 
- L2B_SDP_MAXCRED__L2B_REQ_MAXCRED__SHIFT
 
- L2B_SDP_MAXCRED__L2B_WRRSP_MAXCRED_MASK
 
- L2B_SDP_MAXCRED__L2B_WRRSP_MAXCRED__SHIFT
 
- L2B_SDP_PARITY_ERROR_EN__CP_PARITY_ERROR_EN_MASK
 
- L2B_SDP_PARITY_ERROR_EN__CP_PARITY_ERROR_EN__SHIFT
 
- L2B_SDP_PARITY_ERROR_EN__DVM_PARITY_ERROR_EN_MASK
 
- L2B_SDP_PARITY_ERROR_EN__DVM_PARITY_ERROR_EN__SHIFT
 
- L2B_SDP_PARITY_ERROR_EN__TWW_PARITY_ERROR_EN_MASK
 
- L2B_SDP_PARITY_ERROR_EN__TWW_PARITY_ERROR_EN__SHIFT
 
- L2B_UPDATE_FILTER_CNTL__L2b_Update_Filter_Bypass_MASK
 
- L2B_UPDATE_FILTER_CNTL__L2b_Update_Filter_Bypass__SHIFT
 
- L2B_UPDATE_FILTER_CNTL__L2b_Update_Filter_RdLatency_MASK
 
- L2B_UPDATE_FILTER_CNTL__L2b_Update_Filter_RdLatency__SHIFT
 
- L2CACHE_EVENT_ATTR
 
- L2CAP_A2MP_DEFAULT_MTU
 
- L2CAP_BESTEFFORT_ID
 
- L2CAP_BREDR_MAX_PAYLOAD
 
- L2CAP_CHAN_CONN_LESS
 
- L2CAP_CHAN_CONN_ORIENTED
 
- L2CAP_CHAN_FIXED
 
- L2CAP_CHAN_RAW
 
- L2CAP_CID_A2MP
 
- L2CAP_CID_ATT
 
- L2CAP_CID_CONN_LESS
 
- L2CAP_CID_DYN_END
 
- L2CAP_CID_DYN_START
 
- L2CAP_CID_LE_DYN_END
 
- L2CAP_CID_LE_SIGNALING
 
- L2CAP_CID_SIGNALING
 
- L2CAP_CID_SMP
 
- L2CAP_CID_SMP_BREDR
 
- L2CAP_CMD_HDR_SIZE
 
- L2CAP_COMMAND_REJ
 
- L2CAP_CONF_EFS
 
- L2CAP_CONF_EFS_REJECT
 
- L2CAP_CONF_EWS
 
- L2CAP_CONF_FCS
 
- L2CAP_CONF_FLAG_CONTINUATION
 
- L2CAP_CONF_FLUSH_TO
 
- L2CAP_CONF_HINT
 
- L2CAP_CONF_MASK
 
- L2CAP_CONF_MAX_CONF_REQ
 
- L2CAP_CONF_MAX_CONF_RSP
 
- L2CAP_CONF_MAX_SIZE
 
- L2CAP_CONF_MTU
 
- L2CAP_CONF_OPT_SIZE
 
- L2CAP_CONF_PENDING
 
- L2CAP_CONF_QOS
 
- L2CAP_CONF_REJECT
 
- L2CAP_CONF_REQ
 
- L2CAP_CONF_RFC
 
- L2CAP_CONF_RSP
 
- L2CAP_CONF_SUCCESS
 
- L2CAP_CONF_UNACCEPT
 
- L2CAP_CONF_UNKNOWN
 
- L2CAP_CONNINFO
 
- L2CAP_CONN_PARAM_ACCEPTED
 
- L2CAP_CONN_PARAM_REJECTED
 
- L2CAP_CONN_PARAM_UPDATE_REQ
 
- L2CAP_CONN_PARAM_UPDATE_RSP
 
- L2CAP_CONN_REQ
 
- L2CAP_CONN_RSP
 
- L2CAP_CONN_TIMEOUT
 
- L2CAP_CREATE_CHAN_REQ
 
- L2CAP_CREATE_CHAN_RSP
 
- L2CAP_CR_BAD_AMP
 
- L2CAP_CR_BAD_PSM
 
- L2CAP_CR_INVALID_SCID
 
- L2CAP_CR_LE_AUTHENTICATION
 
- L2CAP_CR_LE_AUTHORIZATION
 
- L2CAP_CR_LE_BAD_KEY_SIZE
 
- L2CAP_CR_LE_BAD_PSM
 
- L2CAP_CR_LE_ENCRYPTION
 
- L2CAP_CR_LE_INVALID_SCID
 
- L2CAP_CR_LE_NO_MEM
 
- L2CAP_CR_LE_SCID_IN_USE
 
- L2CAP_CR_LE_SUCCESS
 
- L2CAP_CR_NO_MEM
 
- L2CAP_CR_PEND
 
- L2CAP_CR_SCID_IN_USE
 
- L2CAP_CR_SEC_BLOCK
 
- L2CAP_CR_SUCCESS
 
- L2CAP_CS_AUTHEN_PEND
 
- L2CAP_CS_AUTHOR_PEND
 
- L2CAP_CS_NO_INFO
 
- L2CAP_CTRL_FINAL
 
- L2CAP_CTRL_FINAL_SHIFT
 
- L2CAP_CTRL_FRAME_TYPE
 
- L2CAP_CTRL_POLL
 
- L2CAP_CTRL_POLL_SHIFT
 
- L2CAP_CTRL_REQSEQ
 
- L2CAP_CTRL_REQSEQ_SHIFT
 
- L2CAP_CTRL_RETRANS
 
- L2CAP_CTRL_SAR
 
- L2CAP_CTRL_SAR_SHIFT
 
- L2CAP_CTRL_SUPERVISE
 
- L2CAP_CTRL_SUPER_SHIFT
 
- L2CAP_CTRL_TXSEQ
 
- L2CAP_CTRL_TXSEQ_SHIFT
 
- L2CAP_DEFAULT_ACC_LAT
 
- L2CAP_DEFAULT_ACK_TO
 
- L2CAP_DEFAULT_EXT_WINDOW
 
- L2CAP_DEFAULT_FLUSH_TO
 
- L2CAP_DEFAULT_MAX_PDU_SIZE
 
- L2CAP_DEFAULT_MAX_SDU_SIZE
 
- L2CAP_DEFAULT_MAX_TX
 
- L2CAP_DEFAULT_MIN_MTU
 
- L2CAP_DEFAULT_MONITOR_TO
 
- L2CAP_DEFAULT_MTU
 
- L2CAP_DEFAULT_RETRANS_TO
 
- L2CAP_DEFAULT_SDU_ITIME
 
- L2CAP_DEFAULT_TX_WINDOW
 
- L2CAP_DISCONN_REQ
 
- L2CAP_DISCONN_RSP
 
- L2CAP_DISC_REJ_TIMEOUT
 
- L2CAP_DISC_TIMEOUT
 
- L2CAP_ECHO_REQ
 
- L2CAP_ECHO_RSP
 
- L2CAP_EFS_DEFAULT_FLUSH_TO
 
- L2CAP_ENC_TIMEOUT
 
- L2CAP_ENH_CTRL_SIZE
 
- L2CAP_ENH_HDR_SIZE
 
- L2CAP_EV_DATA_REQUEST
 
- L2CAP_EV_EXPLICIT_POLL
 
- L2CAP_EV_LOCAL_BUSY_CLEAR
 
- L2CAP_EV_LOCAL_BUSY_DETECTED
 
- L2CAP_EV_MONITOR_TO
 
- L2CAP_EV_RECV_FBIT
 
- L2CAP_EV_RECV_FRAME
 
- L2CAP_EV_RECV_IFRAME
 
- L2CAP_EV_RECV_REJ
 
- L2CAP_EV_RECV_REQSEQ_AND_FBIT
 
- L2CAP_EV_RECV_RNR
 
- L2CAP_EV_RECV_RR
 
- L2CAP_EV_RECV_SREJ
 
- L2CAP_EV_RETRANS_TO
 
- L2CAP_EXT_CTRL_FINAL
 
- L2CAP_EXT_CTRL_FINAL_SHIFT
 
- L2CAP_EXT_CTRL_FRAME_TYPE
 
- L2CAP_EXT_CTRL_POLL
 
- L2CAP_EXT_CTRL_POLL_SHIFT
 
- L2CAP_EXT_CTRL_REQSEQ
 
- L2CAP_EXT_CTRL_REQSEQ_SHIFT
 
- L2CAP_EXT_CTRL_SAR
 
- L2CAP_EXT_CTRL_SAR_SHIFT
 
- L2CAP_EXT_CTRL_SIZE
 
- L2CAP_EXT_CTRL_SUPERVISE
 
- L2CAP_EXT_CTRL_SUPER_SHIFT
 
- L2CAP_EXT_CTRL_TXSEQ
 
- L2CAP_EXT_CTRL_TXSEQ_SHIFT
 
- L2CAP_EXT_HDR_SIZE
 
- L2CAP_FCS_CRC16
 
- L2CAP_FCS_NONE
 
- L2CAP_FCS_SIZE
 
- L2CAP_FC_A2MP
 
- L2CAP_FC_ATT
 
- L2CAP_FC_CONNLESS
 
- L2CAP_FC_SIG_BREDR
 
- L2CAP_FC_SIG_LE
 
- L2CAP_FC_SMP_BREDR
 
- L2CAP_FC_SMP_LE
 
- L2CAP_FEAT_BIDIR_QOS
 
- L2CAP_FEAT_ERTM
 
- L2CAP_FEAT_EXT_FLOW
 
- L2CAP_FEAT_EXT_WINDOW
 
- L2CAP_FEAT_FCS
 
- L2CAP_FEAT_FIXED_CHAN
 
- L2CAP_FEAT_FLOWCTL
 
- L2CAP_FEAT_RETRANS
 
- L2CAP_FEAT_STREAMING
 
- L2CAP_FEAT_UCD
 
- L2CAP_HDR_SIZE
 
- L2CAP_INFO_CL_MTU_REQ_SENT
 
- L2CAP_INFO_FEAT_MASK_REQ_DONE
 
- L2CAP_INFO_FEAT_MASK_REQ_SENT
 
- L2CAP_INFO_REQ
 
- L2CAP_INFO_RSP
 
- L2CAP_INFO_TIMEOUT
 
- L2CAP_IR_NOTSUPP
 
- L2CAP_IR_SUCCESS
 
- L2CAP_IT_CL_MTU
 
- L2CAP_IT_FEAT_MASK
 
- L2CAP_IT_FIXED_CHAN
 
- L2CAP_LE_CONN_REQ
 
- L2CAP_LE_CONN_RSP
 
- L2CAP_LE_CREDITS
 
- L2CAP_LE_MIN_MTU
 
- L2CAP_LM
 
- L2CAP_LM_AUTH
 
- L2CAP_LM_ENCRYPT
 
- L2CAP_LM_FIPS
 
- L2CAP_LM_MASTER
 
- L2CAP_LM_RELIABLE
 
- L2CAP_LM_SECURE
 
- L2CAP_LM_TRUSTED
 
- L2CAP_MC_CONFIRMED
 
- L2CAP_MC_UNCONFIRMED
 
- L2CAP_MODE_BASIC
 
- L2CAP_MODE_ERTM
 
- L2CAP_MODE_FLOWCTL
 
- L2CAP_MODE_LE_FLOWCTL
 
- L2CAP_MODE_RETRANS
 
- L2CAP_MODE_STREAMING
 
- L2CAP_MOVE_CHAN_CFM
 
- L2CAP_MOVE_CHAN_CFM_RSP
 
- L2CAP_MOVE_CHAN_REQ
 
- L2CAP_MOVE_CHAN_RSP
 
- L2CAP_MOVE_ERTX_TIMEOUT
 
- L2CAP_MOVE_ROLE_INITIATOR
 
- L2CAP_MOVE_ROLE_NONE
 
- L2CAP_MOVE_ROLE_RESPONDER
 
- L2CAP_MOVE_STABLE
 
- L2CAP_MOVE_TIMEOUT
 
- L2CAP_MOVE_WAIT_CONFIRM
 
- L2CAP_MOVE_WAIT_CONFIRM_RSP
 
- L2CAP_MOVE_WAIT_LOCAL_BUSY
 
- L2CAP_MOVE_WAIT_LOGICAL_CFM
 
- L2CAP_MOVE_WAIT_LOGICAL_COMP
 
- L2CAP_MOVE_WAIT_PREPARE
 
- L2CAP_MOVE_WAIT_REQ
 
- L2CAP_MOVE_WAIT_RSP
 
- L2CAP_MOVE_WAIT_RSP_SUCCESS
 
- L2CAP_MR_BAD_ID
 
- L2CAP_MR_COLLISION
 
- L2CAP_MR_NOT_ALLOWED
 
- L2CAP_MR_NOT_SUPP
 
- L2CAP_MR_PEND
 
- L2CAP_MR_SAME_ID
 
- L2CAP_MR_SUCCESS
 
- L2CAP_NESTING_NORMAL
 
- L2CAP_NESTING_PARENT
 
- L2CAP_NESTING_SMP
 
- L2CAP_OPTIONS
 
- L2CAP_PSMLEN_SIZE
 
- L2CAP_PSM_3DSP
 
- L2CAP_PSM_AUTO_END
 
- L2CAP_PSM_DYN_END
 
- L2CAP_PSM_DYN_START
 
- L2CAP_PSM_IPSP
 
- L2CAP_PSM_LE_DYN_END
 
- L2CAP_PSM_LE_DYN_START
 
- L2CAP_PSM_RFCOMM
 
- L2CAP_PSM_SDP
 
- L2CAP_REJ_INVALID_CID
 
- L2CAP_REJ_MTU_EXCEEDED
 
- L2CAP_REJ_NOT_UNDERSTOOD
 
- L2CAP_RX_STATE_MOVE
 
- L2CAP_RX_STATE_RECV
 
- L2CAP_RX_STATE_SREJ_SENT
 
- L2CAP_RX_STATE_WAIT_F
 
- L2CAP_RX_STATE_WAIT_P
 
- L2CAP_SAR_CONTINUE
 
- L2CAP_SAR_END
 
- L2CAP_SAR_START
 
- L2CAP_SAR_UNSEGMENTED
 
- L2CAP_SDULEN_SIZE
 
- L2CAP_SEQ_LIST_CLEAR
 
- L2CAP_SEQ_LIST_TAIL
 
- L2CAP_SERV_BESTEFFORT
 
- L2CAP_SERV_GUARANTEED
 
- L2CAP_SERV_NOTRAFIC
 
- L2CAP_SUPER_REJ
 
- L2CAP_SUPER_RNR
 
- L2CAP_SUPER_RR
 
- L2CAP_SUPER_SREJ
 
- L2CAP_TXSEQ_DUPLICATE
 
- L2CAP_TXSEQ_DUPLICATE_SREJ
 
- L2CAP_TXSEQ_EXPECTED
 
- L2CAP_TXSEQ_EXPECTED_SREJ
 
- L2CAP_TXSEQ_INVALID
 
- L2CAP_TXSEQ_INVALID_IGNORE
 
- L2CAP_TXSEQ_UNEXPECTED
 
- L2CAP_TXSEQ_UNEXPECTED_SREJ
 
- L2CAP_TX_STATE_WAIT_F
 
- L2CAP_TX_STATE_XMIT
 
- L2CAP_WAIT_ACK_POLL_PERIOD
 
- L2CAP_WAIT_ACK_TIMEOUT
 
- L2CB1_PCIE_PHYMISC2_CDR_BW
 
- L2CB1_PCIE_PHYMISC2_L0S_TH
 
- L2CB1_PM_CTRL_L1_ENTRY_TM
 
- L2CB_CLDCTRL3
 
- L2CB_LPI_DESISN_TIMER
 
- L2CB_TXQ_CFGV
 
- L2CB_TXQ_TXF_BURST_PREF
 
- L2CB_V10
 
- L2CB_V11
 
- L2CB_V20
 
- L2CB_V21
 
- L2CC_BASE
 
- L2CC_CTRL_OFF
 
- L2CC_CTRL_mskEN
 
- L2CC_CTRL_offEN
 
- L2CC_PROT_OFF
 
- L2CC_PROT_mskMRWEN
 
- L2CC_PROT_offMRWEN
 
- L2CC_SETUP_OFF
 
- L2CC_SETUP_mskDDLATC
 
- L2CC_SETUP_mskPART
 
- L2CC_SETUP_mskTDLATC
 
- L2CC_SETUP_offDDLATC
 
- L2CC_SETUP_offPART
 
- L2CC_SETUP_offTDLATC
 
- L2CPUINTEN
 
- L2CPUMCKEN
 
- L2CPUSRDR_EL1
 
- L2CPUSRSELR_EL1
 
- L2CPUSTAT
 
- L2CR_L2BYP
 
- L2CR_L2CLK_DISABLED
 
- L2CR_L2CLK_DIV1
 
- L2CR_L2CLK_DIV1_5
 
- L2CR_L2CLK_DIV2
 
- L2CR_L2CLK_DIV2_5
 
- L2CR_L2CLK_DIV3
 
- L2CR_L2CLK_MASK
 
- L2CR_L2CTL
 
- L2CR_L2DF
 
- L2CR_L2DO
 
- L2CR_L2DO_745x
 
- L2CR_L2E
 
- L2CR_L2FI
 
- L2CR_L2HWF_745x
 
- L2CR_L2I
 
- L2CR_L2IO
 
- L2CR_L2IO_745x
 
- L2CR_L2IP
 
- L2CR_L2OH_0_5
 
- L2CR_L2OH_1_0
 
- L2CR_L2OH_MASK
 
- L2CR_L2PE
 
- L2CR_L2RAM_FLOW
 
- L2CR_L2RAM_MASK
 
- L2CR_L2RAM_PIPE
 
- L2CR_L2RAM_PIPE_LW
 
- L2CR_L2REP_745x
 
- L2CR_L2SIZ_1MB
 
- L2CR_L2SIZ_256KB
 
- L2CR_L2SIZ_512KB
 
- L2CR_L2SIZ_MASK
 
- L2CR_L2SL
 
- L2CR_L2TS
 
- L2CR_L2WT
 
- L2CR_SRAM_EIGHTH
 
- L2CR_SRAM_FULL
 
- L2CR_SRAM_HALF
 
- L2CR_SRAM_QUART
 
- L2CR_SRAM_TWO_EIGHTH
 
- L2CR_SRAM_TWO_HALFS
 
- L2CR_SRAM_TWO_QUARTS
 
- L2CR_SRAM_ZERO
 
- L2CSR0_L2CM
 
- L2CSR0_L2DO
 
- L2CSR0_L2E
 
- L2CSR0_L2FI
 
- L2CSR0_L2FL
 
- L2CSR0_L2IO
 
- L2CSR0_L2LFC
 
- L2CSR0_L2LO
 
- L2CSR0_L2LOA
 
- L2CSR0_L2PE
 
- L2CSR0_L2REP
 
- L2CSR0_L2WP
 
- L2CYCLE_CTR_BIT
 
- L2CYCLE_CTR_RAW_CODE
 
- L2C_AUX_CTRL_EVTMON_ENABLE
 
- L2C_AUX_CTRL_PARITY_ENABLE
 
- L2C_AUX_CTRL_SHARED_OVERRIDE
 
- L2C_AUX_CTRL_WAY_SIZE
 
- L2C_AUX_CTRL_WAY_SIZE_MASK
 
- L2C_AUX_CTRL_WAY_SIZE_SHIFT
 
- L2C_CBC_INT_CE
 
- L2C_CBC_INT_ENA_ALL
 
- L2C_CBC_INT_ENA_W1C
 
- L2C_CBC_INT_ENA_W1S
 
- L2C_CBC_INT_IODISOCI
 
- L2C_CBC_INT_IORDDISOCI
 
- L2C_CBC_INT_IOWRDISOCI
 
- L2C_CBC_INT_MIB
 
- L2C_CBC_INT_MIBDBE
 
- L2C_CBC_INT_MIBSBE
 
- L2C_CBC_INT_RSD
 
- L2C_CBC_INT_RSDDBE
 
- L2C_CBC_INT_RSDSBE
 
- L2C_CBC_INT_UE
 
- L2C_CBC_INT_W1C
 
- L2C_CBC_INT_W1S
 
- L2C_CBC_IOCERR
 
- L2C_CBC_IODISOCIERR
 
- L2C_CBC_MIBERR
 
- L2C_CBC_RSDERR
 
- L2C_CFG_CPC
 
- L2C_CFG_CPEI
 
- L2C_CFG_CPIM
 
- L2C_CFG_DCU
 
- L2C_CFG_DCW_MASK
 
- L2C_CFG_FRAN
 
- L2C_CFG_ICU
 
- L2C_CFG_L2M
 
- L2C_CFG_LIM
 
- L2C_CFG_NAM
 
- L2C_CFG_NBRM
 
- L2C_CFG_PMIM
 
- L2C_CFG_PMUX_DF
 
- L2C_CFG_PMUX_DS
 
- L2C_CFG_PMUX_IF
 
- L2C_CFG_PMUX_MASK
 
- L2C_CFG_PMUX_SNP
 
- L2C_CFG_RDBW
 
- L2C_CFG_SMCM
 
- L2C_CFG_SS_256
 
- L2C_CFG_SS_MASK
 
- L2C_CFG_TPC
 
- L2C_CFG_TPEI
 
- L2C_CFG_TPIM
 
- L2C_CMD_CCP
 
- L2C_CMD_CLR
 
- L2C_CMD_CTE
 
- L2C_CMD_DIAG
 
- L2C_CMD_HCC
 
- L2C_CMD_INV
 
- L2C_CMD_RPMC
 
- L2C_CMD_STPC
 
- L2C_CMD_STRC
 
- L2C_CTL
 
- L2C_CTL_DISIDXALIAS
 
- L2C_DEBUGFS_ATTR
 
- L2C_ENTRIES_PER_WAY
 
- L2C_ID
 
- L2C_MCI_ERR
 
- L2C_MCI_INT_ENA_ALL
 
- L2C_MCI_INT_ENA_W1C
 
- L2C_MCI_INT_ENA_W1S
 
- L2C_MCI_INT_VBFDBE
 
- L2C_MCI_INT_VBFSBE
 
- L2C_MCI_INT_W1C
 
- L2C_MCI_INT_W1S
 
- L2C_MESSAGE_SIZE
 
- L2C_NFABRIC_PM_CTL
 
- L2C_NFABRIC_PM_CTL_PWR_DOWN
 
- L2C_NUM_WAYS
 
- L2C_OTHER_SIZE
 
- L2C_R_REG
 
- L2C_SNP_BA_MASK
 
- L2C_SNP_ESR
 
- L2C_SNP_SSR_32G
 
- L2C_SNP_SSR_MASK
 
- L2C_SR_CC
 
- L2C_SR_CPE
 
- L2C_SR_LRU
 
- L2C_SR_PCS
 
- L2C_SR_TPE
 
- L2C_TAD_ERR
 
- L2C_TAD_INT_CE
 
- L2C_TAD_INT_DISLMC
 
- L2C_TAD_INT_DISOCI
 
- L2C_TAD_INT_ECC
 
- L2C_TAD_INT_ENA_ALL
 
- L2C_TAD_INT_ENA_W1C
 
- L2C_TAD_INT_ENA_W1S
 
- L2C_TAD_INT_FBFDBE
 
- L2C_TAD_INT_FBFSBE
 
- L2C_TAD_INT_GSYNCTO
 
- L2C_TAD_INT_L2DDBE
 
- L2C_TAD_INT_LFBTO
 
- L2C_TAD_INT_RDDISLMC
 
- L2C_TAD_INT_RDDISOCI
 
- L2C_TAD_INT_RTG
 
- L2C_TAD_INT_RTGDBE
 
- L2C_TAD_INT_RTGSBE
 
- L2C_TAD_INT_SBFDBE
 
- L2C_TAD_INT_SBFSBE
 
- L2C_TAD_INT_TAG
 
- L2C_TAD_INT_TAGDBE
 
- L2C_TAD_INT_UE
 
- L2C_TAD_INT_W1C
 
- L2C_TAD_INT_W1S
 
- L2C_TAD_INT_WRDISLMC
 
- L2C_TAD_INT_WRDISOCI
 
- L2C_TAD_TIMEOUT
 
- L2C_TAD_TIMETWO
 
- L2C_TAD_TQD_ERR
 
- L2C_TAD_TTG_ERR
 
- L2C_W_REG
 
- L2DAT
 
- L2DATA
 
- L2DATASLOTSIZE
 
- L2DBWORD
 
- L2DISIZE
 
- L2DTG
 
- L2DTSLOTSIZE
 
- L2DT_SLP
 
- L2EVTYPER_REG_SHIFT
 
- L2EXTSPERSUM
 
- L2IMEMOP_ACTION_SHIFT
 
- L2IMEMOP_INVALIDATE_ALL
 
- L2IMEMOP_LOAD_LOCKED_RESULT
 
- L2IMEMOP_SIZE_SRC_COUNT_MASK
 
- L2IMEMOP_SIZE_SRC_COUNT_SHIFT
 
- L2IMEMOP_SIZE_SRC_OFFSET_MASK
 
- L2IMEMOP_SIZE_SRC_OFFSET_SHIFT
 
- L2IMU0_BASE__INST0_SEG0
 
- L2IMU0_BASE__INST0_SEG1
 
- L2IMU0_BASE__INST0_SEG2
 
- L2IMU0_BASE__INST0_SEG3
 
- L2IMU0_BASE__INST0_SEG4
 
- L2IMU0_BASE__INST1_SEG0
 
- L2IMU0_BASE__INST1_SEG1
 
- L2IMU0_BASE__INST1_SEG2
 
- L2IMU0_BASE__INST1_SEG3
 
- L2IMU0_BASE__INST1_SEG4
 
- L2IMU0_BASE__INST2_SEG0
 
- L2IMU0_BASE__INST2_SEG1
 
- L2IMU0_BASE__INST2_SEG2
 
- L2IMU0_BASE__INST2_SEG3
 
- L2IMU0_BASE__INST2_SEG4
 
- L2IMU0_BASE__INST3_SEG0
 
- L2IMU0_BASE__INST3_SEG1
 
- L2IMU0_BASE__INST3_SEG2
 
- L2IMU0_BASE__INST3_SEG3
 
- L2IMU0_BASE__INST3_SEG4
 
- L2IMU0_BASE__INST4_SEG0
 
- L2IMU0_BASE__INST4_SEG1
 
- L2IMU0_BASE__INST4_SEG2
 
- L2IMU0_BASE__INST4_SEG3
 
- L2IMU0_BASE__INST4_SEG4
 
- L2IMU0_BASE__INST5_SEG0
 
- L2IMU0_BASE__INST5_SEG1
 
- L2IMU0_BASE__INST5_SEG2
 
- L2IMU0_BASE__INST5_SEG3
 
- L2IMU0_BASE__INST5_SEG4
 
- L2IMU0_BASE__INST6_SEG0
 
- L2IMU0_BASE__INST6_SEG1
 
- L2IMU0_BASE__INST6_SEG2
 
- L2IMU0_BASE__INST6_SEG3
 
- L2IMU0_BASE__INST6_SEG4
 
- L2IMU_BASE__INST0_SEG0
 
- L2IMU_BASE__INST0_SEG1
 
- L2IMU_BASE__INST0_SEG2
 
- L2IMU_BASE__INST0_SEG3
 
- L2IMU_BASE__INST0_SEG4
 
- L2IMU_BASE__INST1_SEG0
 
- L2IMU_BASE__INST1_SEG1
 
- L2IMU_BASE__INST1_SEG2
 
- L2IMU_BASE__INST1_SEG3
 
- L2IMU_BASE__INST1_SEG4
 
- L2IMU_BASE__INST2_SEG0
 
- L2IMU_BASE__INST2_SEG1
 
- L2IMU_BASE__INST2_SEG2
 
- L2IMU_BASE__INST2_SEG3
 
- L2IMU_BASE__INST2_SEG4
 
- L2IMU_BASE__INST3_SEG0
 
- L2IMU_BASE__INST3_SEG1
 
- L2IMU_BASE__INST3_SEG2
 
- L2IMU_BASE__INST3_SEG3
 
- L2IMU_BASE__INST3_SEG4
 
- L2IMU_BASE__INST4_SEG0
 
- L2IMU_BASE__INST4_SEG1
 
- L2IMU_BASE__INST4_SEG2
 
- L2IMU_BASE__INST4_SEG3
 
- L2IMU_BASE__INST4_SEG4
 
- L2IMU_HWID
 
- L2INODESLOTSIZE
 
- L2INOSPEREXT
 
- L2INOSPERIAG
 
- L2INOSPERPAGE
 
- L2INS
 
- L2INT
 
- L2INTEN
 
- L2ITG
 
- L2LOG0
 
- L2LOG1
 
- L2LOG2
 
- L2LOG3
 
- L2LOG4
 
- L2LOG5
 
- L2LOGPSIZE
 
- L2LPERCTL
 
- L2LPERDMAP
 
- L2MAXAG
 
- L2MAXL0SIZE
 
- L2MAXL1SIZE
 
- L2MAXL2SIZE
 
- L2MCK
 
- L2MCKEN
 
- L2MEGABYTE
 
- L2MINAGSZ
 
- L2MODE_0K_CACHE
 
- L2MODE_128K_CACHE
 
- L2MODE_256K_CACHE
 
- L2MODE_32K_CACHE
 
- L2MODE_64K_CACHE
 
- L2MODE_SIZE
 
- L2OPT
 
- L2PAD_SIZE
 
- L2PBSIZE
 
- L2PLBINTEN0
 
- L2PLBINTEN1
 
- L2PLBMCKEN0
 
- L2PLBMCKEN1
 
- L2PLBSTAT0
 
- L2PLBSTAT1
 
- L2PMCCNTCR
 
- L2PMCCNTR
 
- L2PMCCNTSR
 
- L2PMCNTENCLR
 
- L2PMCNTENSET
 
- L2PMCR
 
- L2PMCR_COUNTERS_DISABLE
 
- L2PMCR_COUNTERS_ENABLE
 
- L2PMCR_NUM_EV_MASK
 
- L2PMCR_NUM_EV_SHIFT
 
- L2PMCR_RESET_ALL
 
- L2PMINTENCLR
 
- L2PMINTENSET
 
- L2PMOVSCLR
 
- L2PMOVSSET
 
- L2PMRESR
 
- L2PMRESR_EN
 
- L2PMRESR_GROUP_BITS
 
- L2PMRESR_GROUP_MASK
 
- L2PMXEVFILTER_ORGFILTER_ALL
 
- L2PMXEVFILTER_ORGFILTER_IDINDEP
 
- L2PMXEVFILTER_SUFILTER_ALL
 
- L2PRIO_HIGH
 
- L2PRIO_LOW
 
- L2PRIO_MEDIUM
 
- L2PRIO_URGENT
 
- L2PSIZE
 
- L2RACINTEN0
 
- L2RACMCKEN0
 
- L2RACSTAT0
 
- L2SRAM_BARE_MSK_HI4
 
- L2SRAM_BAR_MSK_LO18
 
- L2SRAM_OPTIMAL_SZ_SHIFT
 
- L2T
 
- L2TPV3_BIND_FAIL
 
- L2TPV3_DATA_PACKET
 
- L2TP_ATTR_CONN_ID
 
- L2TP_ATTR_COOKIE
 
- L2TP_ATTR_DATA_SEQ
 
- L2TP_ATTR_DEBUG
 
- L2TP_ATTR_ENCAP_TYPE
 
- L2TP_ATTR_FD
 
- L2TP_ATTR_IFNAME
 
- L2TP_ATTR_IP6_DADDR
 
- L2TP_ATTR_IP6_SADDR
 
- L2TP_ATTR_IP_DADDR
 
- L2TP_ATTR_IP_SADDR
 
- L2TP_ATTR_L2SPEC_LEN
 
- L2TP_ATTR_L2SPEC_TYPE
 
- L2TP_ATTR_LNS_MODE
 
- L2TP_ATTR_MAX
 
- L2TP_ATTR_MRU
 
- L2TP_ATTR_MTU
 
- L2TP_ATTR_NONE
 
- L2TP_ATTR_OFFSET
 
- L2TP_ATTR_PAD
 
- L2TP_ATTR_PEER_CONN_ID
 
- L2TP_ATTR_PEER_COOKIE
 
- L2TP_ATTR_PEER_SESSION_ID
 
- L2TP_ATTR_PROTO_VERSION
 
- L2TP_ATTR_PW_TYPE
 
- L2TP_ATTR_RECV_SEQ
 
- L2TP_ATTR_RECV_TIMEOUT
 
- L2TP_ATTR_RX_BYTES
 
- L2TP_ATTR_RX_ERRORS
 
- L2TP_ATTR_RX_OOS_PACKETS
 
- L2TP_ATTR_RX_PACKETS
 
- L2TP_ATTR_RX_SEQ_DISCARDS
 
- L2TP_ATTR_SEND_SEQ
 
- L2TP_ATTR_SESSION_ID
 
- L2TP_ATTR_STATS
 
- L2TP_ATTR_STATS_MAX
 
- L2TP_ATTR_STATS_NONE
 
- L2TP_ATTR_STATS_PAD
 
- L2TP_ATTR_TX_BYTES
 
- L2TP_ATTR_TX_ERRORS
 
- L2TP_ATTR_TX_PACKETS
 
- L2TP_ATTR_UDP_CSUM
 
- L2TP_ATTR_UDP_DPORT
 
- L2TP_ATTR_UDP_SPORT
 
- L2TP_ATTR_UDP_ZERO_CSUM6_RX
 
- L2TP_ATTR_UDP_ZERO_CSUM6_TX
 
- L2TP_ATTR_USING_IPSEC
 
- L2TP_ATTR_VLAN_ID
 
- L2TP_CMD_MAX
 
- L2TP_CMD_NOOP
 
- L2TP_CMD_SESSION_CREATE
 
- L2TP_CMD_SESSION_DELETE
 
- L2TP_CMD_SESSION_GET
 
- L2TP_CMD_SESSION_MODIFY
 
- L2TP_CMD_TUNNEL_CREATE
 
- L2TP_CMD_TUNNEL_DELETE
 
- L2TP_CMD_TUNNEL_GET
 
- L2TP_CMD_TUNNEL_MODIFY
 
- L2TP_DEFAULT_DEBUG_FLAGS
 
- L2TP_DRV_VERSION
 
- L2TP_ENCAPTYPE_IP
 
- L2TP_ENCAPTYPE_UDP
 
- L2TP_ETH_DEV_NAME
 
- L2TP_GENL_MCGROUP
 
- L2TP_GENL_NAME
 
- L2TP_GENL_VERSION
 
- L2TP_HASH_BITS
 
- L2TP_HASH_BITS_2
 
- L2TP_HASH_SIZE
 
- L2TP_HASH_SIZE_2
 
- L2TP_HDRFLAG_L
 
- L2TP_HDRFLAG_O
 
- L2TP_HDRFLAG_P
 
- L2TP_HDRFLAG_S
 
- L2TP_HDRFLAG_T
 
- L2TP_HDR_L_BIT
 
- L2TP_HDR_SIZE_MAX
 
- L2TP_HDR_T_BIT
 
- L2TP_HDR_VER
 
- L2TP_HDR_VER_2
 
- L2TP_HDR_VER_3
 
- L2TP_HDR_VER_MASK
 
- L2TP_L2SPECTYPE_DEFAULT
 
- L2TP_L2SPECTYPE_NONE
 
- L2TP_MSG_CONTROL
 
- L2TP_MSG_DATA
 
- L2TP_MSG_DEBUG
 
- L2TP_MSG_SEQ
 
- L2TP_PWTYPE_ETH
 
- L2TP_PWTYPE_ETH_VLAN
 
- L2TP_PWTYPE_IP
 
- L2TP_PWTYPE_NONE
 
- L2TP_PWTYPE_PPP
 
- L2TP_PWTYPE_PPP_AC
 
- L2TP_SEQ_ALL
 
- L2TP_SEQ_IP
 
- L2TP_SEQ_NONE
 
- L2TP_SESSION_MAGIC
 
- L2TP_SKB_CB
 
- L2TP_SLFLAG_S
 
- L2TP_SL_SEQ_MASK
 
- L2TP_TUNNEL_MAGIC
 
- L2T_IDX_S
 
- L2T_IDX_V
 
- L2T_MIN_HASH_BUCKETS
 
- L2T_SIZE
 
- L2T_SKB_CB
 
- L2T_STATE_NOARP
 
- L2T_STATE_RESOLVING
 
- L2T_STATE_STALE
 
- L2T_STATE_SWITCHING
 
- L2T_STATE_SYNC_WRITE
 
- L2T_STATE_UNUSED
 
- L2T_STATE_VALID
 
- L2T_W_INFO_S
 
- L2T_W_INFO_V
 
- L2T_W_NOREPLY_F
 
- L2T_W_NOREPLY_S
 
- L2T_W_NOREPLY_V
 
- L2T_W_PORT_S
 
- L2T_W_PORT_V
 
- L2WACINTEN0
 
- L2WACINTEN1
 
- L2WACINTEN2
 
- L2WACMCKEN0
 
- L2WACMCKEN1
 
- L2WACMCKEN2
 
- L2WACSTAT0
 
- L2WACSTAT1
 
- L2WACSTAT2
 
- L2WDFINTEN
 
- L2WDFMCKEN
 
- L2WDFSTAT
 
- L2X0_AUXCTRL_OFFSET
 
- L2X0_AUX_CTRL
 
- L2X0_AUX_CTRL_ASSOC_MASK
 
- L2X0_AUX_CTRL_ASSOC_SHIFT
 
- L2X0_AUX_CTRL_DATA_RD_LATENCY_MASK
 
- L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT
 
- L2X0_AUX_CTRL_DATA_WR_LATENCY_MASK
 
- L2X0_AUX_CTRL_DATA_WR_LATENCY_SHIFT
 
- L2X0_AUX_CTRL_DIRTY_LATENCY_MASK
 
- L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT
 
- L2X0_AUX_CTRL_TAG_LATENCY_MASK
 
- L2X0_AUX_CTRL_TAG_LATENCY_SHIFT
 
- L2X0_CACHE_ID
 
- L2X0_CACHE_ID_PART_L210
 
- L2X0_CACHE_ID_PART_L220
 
- L2X0_CACHE_ID_PART_L310
 
- L2X0_CACHE_ID_PART_MASK
 
- L2X0_CACHE_ID_RTL_MASK
 
- L2X0_CACHE_SYNC
 
- L2X0_CACHE_TYPE
 
- L2X0_CLEAN_INV_LINE_IDX
 
- L2X0_CLEAN_INV_LINE_PA
 
- L2X0_CLEAN_INV_WAY
 
- L2X0_CLEAN_LINE_IDX
 
- L2X0_CLEAN_LINE_PA
 
- L2X0_CLEAN_WAY
 
- L2X0_CTRL
 
- L2X0_CTRL_EN
 
- L2X0_DEBUG_CTRL
 
- L2X0_DUMMY_REG
 
- L2X0_EVENT_ATTR
 
- L2X0_EVENT_CNT0_CFG
 
- L2X0_EVENT_CNT0_VAL
 
- L2X0_EVENT_CNT1_CFG
 
- L2X0_EVENT_CNT1_VAL
 
- L2X0_EVENT_CNT_CFG_INT_DISABLED
 
- L2X0_EVENT_CNT_CFG_INT_INCR
 
- L2X0_EVENT_CNT_CFG_INT_OVERFLOW
 
- L2X0_EVENT_CNT_CFG_SRC_DISABLED
 
- L2X0_EVENT_CNT_CFG_SRC_MASK
 
- L2X0_EVENT_CNT_CFG_SRC_SHIFT
 
- L2X0_EVENT_CNT_CTRL
 
- L2X0_EVENT_CNT_CTRL_ENABLE
 
- L2X0_INTR_CLEAR
 
- L2X0_INTR_MASK
 
- L2X0_INV_LINE_PA
 
- L2X0_INV_WAY
 
- L2X0_LINE_DATA
 
- L2X0_LINE_TAG
 
- L2X0_LOCKDOWN_STRIDE
 
- L2X0_LOCKDOWN_WAY_D_BASE
 
- L2X0_LOCKDOWN_WAY_I_BASE
 
- L2X0_MASKED_INTR_STAT
 
- L2X0_PREFETCH_CTRL_OFFSET
 
- L2X0_RAW_INTR_STAT
 
- L2X0_SAVE_OFFSET0
 
- L2X0_SAVE_OFFSET1
 
- L2X0_TEST_OPERATION
 
- L2X0_WAY_SIZE_SHIFT
 
- L2XTSLOTSIZE
 
- L2_16B_ENTROPY_OFFSET
 
- L2_16B_VALUE
 
- L2_802_3_OFFLOAD_CTRL_SNAP_KEEP_LEN
 
- L2_802_3_OFFLOAD_CTRL_SNAP_KEEP_MSK
 
- L2_802_3_OFFLOAD_CTRL_SNAP_KEEP_POS
 
- L2_802_3_OFFLOAD_CTRL_VLAN_TAG_INSERTION_LEN
 
- L2_802_3_OFFLOAD_CTRL_VLAN_TAG_INSERTION_MSK
 
- L2_802_3_OFFLOAD_CTRL_VLAN_TAG_INSERTION_POS
 
- L2_ALL
 
- L2_BASIC
 
- L2_BITSYNC
 
- L2_BUSY
 
- L2_CACHE_ALIGN_CNT
 
- L2_CACHE_ALIGN_LOW
 
- L2_CACHE_ALIGN_UP
 
- L2_CACHE_BIGK_ASSOCIATIVITY
 
- L2_CACHE_BIGK_FRAGMENT_SIZE
 
- L2_CACHE_BYTES
 
- L2_CACHE_ENABLE
 
- L2_CACHE_H
 
- L2_CACHE_LINE_SIZE
 
- L2_CACHE_PDE_ENDIAN_SWAP_MODE
 
- L2_CACHE_PTE_ENDIAN_SWAP_MODE
 
- L2_CACHE_SET
 
- L2_CACHE_SHIFT
 
- L2_CACHE_UPDATE_MODE
 
- L2_CACHE_WAY
 
- L2_CA_CONF_OFF
 
- L2_CA_CONF_mskL2CLSZ
 
- L2_CA_CONF_mskL2DW
 
- L2_CA_CONF_mskL2PT
 
- L2_CA_CONF_mskL2SET
 
- L2_CA_CONF_mskL2VER
 
- L2_CA_CONF_mskL2WAY
 
- L2_CA_CONF_offL2CLSZ
 
- L2_CA_CONF_offL2DW
 
- L2_CA_CONF_offL2PT
 
- L2_CA_CONF_offL2SET
 
- L2_CA_CONF_offL2VER
 
- L2_CA_CONF_offL2WAY
 
- L2_CCTL_CMD_OFF
 
- L2_CCTL_STATUS_OFF
 
- L2_CCTL_STATUS_mskCMD_COMP
 
- L2_CCTL_STATUS_offCMD_COMP
 
- L2_CLS
 
- L2_CLS_ETYPE
 
- L2_CLS_ETYPE_SHIFT
 
- L2_CLS_VLD
 
- L2_CMD_RDY
 
- L2_CNT0_CTRL_OFF
 
- L2_CNT1_CTRL_OFF
 
- L2_CONTROL_0__AllowL1CacheATSRsp_MASK
 
- L2_CONTROL_0__AllowL1CacheATSRsp__SHIFT
 
- L2_CONTROL_0__AllowL1CacheVZero_MASK
 
- L2_CONTROL_0__AllowL1CacheVZero__SHIFT
 
- L2_CONTROL_0__DTCHitVZeroOrIVZero_MASK
 
- L2_CONTROL_0__DTCHitVZeroOrIVZero__SHIFT
 
- L2_CONTROL_0__FLTCMBPriority_MASK
 
- L2_CONTROL_0__FLTCMBPriority__SHIFT
 
- L2_CONTROL_0__IFifoBurstLength_MASK
 
- L2_CONTROL_0__IFifoBurstLength__SHIFT
 
- L2_CONTROL_0__IFifoClientPriority_MASK
 
- L2_CONTROL_0__IFifoClientPriority__SHIFT
 
- L2_CONTROL_0__RESERVED_MASK
 
- L2_CONTROL_0__RESERVED__SHIFT
 
- L2_CONTROL_0__SIDEPTEOnAddrTransExcl_MASK
 
- L2_CONTROL_0__SIDEPTEOnAddrTransExcl__SHIFT
 
- L2_CONTROL_0__SIDEPTEOnUntransExcl_MASK
 
- L2_CONTROL_0__SIDEPTEOnUntransExcl__SHIFT
 
- L2_CONTROL_1__PerfThreshold_MASK
 
- L2_CONTROL_1__PerfThreshold__SHIFT
 
- L2_CONTROL_1__SeqInvBurstLimitEn_MASK
 
- L2_CONTROL_1__SeqInvBurstLimitEn__SHIFT
 
- L2_CONTROL_1__SeqInvBurstLimitInv_MASK
 
- L2_CONTROL_1__SeqInvBurstLimitInv__SHIFT
 
- L2_CONTROL_1__SeqInvBurstLimitL2Req_MASK
 
- L2_CONTROL_1__SeqInvBurstLimitL2Req__SHIFT
 
- L2_CONTROL_5__DTCUpdatePri_MASK
 
- L2_CONTROL_5__DTCUpdatePri__SHIFT
 
- L2_CONTROL_5__DTCUpdateVOneIVZero_MASK
 
- L2_CONTROL_5__DTCUpdateVOneIVZero__SHIFT
 
- L2_CONTROL_5__DTCUpdateVZeroIVOne_MASK
 
- L2_CONTROL_5__DTCUpdateVZeroIVOne__SHIFT
 
- L2_CONTROL_5__FC1Dis_MASK
 
- L2_CONTROL_5__FC1Dis__SHIFT
 
- L2_CONTROL_5__FC3Dis_MASK
 
- L2_CONTROL_5__FC3Dis__SHIFT
 
- L2_CONTROL_5__ForceTWonVC7_MASK
 
- L2_CONTROL_5__ForceTWonVC7__SHIFT
 
- L2_CONTROL_5__GST_partial_ptc_cntrl_MASK
 
- L2_CONTROL_5__GST_partial_ptc_cntrl__SHIFT
 
- L2_CONTROL_5__PCTRL_hysteresis_MASK
 
- L2_CONTROL_5__PCTRL_hysteresis__SHIFT
 
- L2_CONTROL_5__QueueArbFBPri_MASK
 
- L2_CONTROL_5__QueueArbFBPri__SHIFT
 
- L2_CONTROL_5__RESERVED_MASK
 
- L2_CONTROL_5__RESERVED__SHIFT
 
- L2_CONTROL_6__Perf2Threshold_MASK
 
- L2_CONTROL_6__Perf2Threshold__SHIFT
 
- L2_CONTROL_6__SeqInvBurstLimitEn_MASK
 
- L2_CONTROL_6__SeqInvBurstLimitEn__SHIFT
 
- L2_CONTROL_6__SeqInvBurstLimitInv_MASK
 
- L2_CONTROL_6__SeqInvBurstLimitInv__SHIFT
 
- L2_CONTROL_6__SeqInvBurstLimitPDCReq_MASK
 
- L2_CONTROL_6__SeqInvBurstLimitPDCReq__SHIFT
 
- L2_COUNTER_RELOAD
 
- L2_CP_CONTROL_1__CPL1Off_MASK
 
- L2_CP_CONTROL_1__CPL1Off__SHIFT
 
- L2_CP_CONTROL_1__Reserved_MASK
 
- L2_CP_CONTROL_1__Reserved__SHIFT
 
- L2_CP_CONTROL__CPFlushOnInv_MASK
 
- L2_CP_CONTROL__CPFlushOnInv__SHIFT
 
- L2_CP_CONTROL__CPFlushOnWait_MASK
 
- L2_CP_CONTROL__CPFlushOnWait__SHIFT
 
- L2_CP_CONTROL__CPPrefetchDis_MASK
 
- L2_CP_CONTROL__CPPrefetchDis__SHIFT
 
- L2_CP_CONTROL__CPRdDelay_MASK
 
- L2_CP_CONTROL__CPRdDelay__SHIFT
 
- L2_CREDIT_CONTROL_0__FC1Credits_MASK
 
- L2_CREDIT_CONTROL_0__FC1Credits__SHIFT
 
- L2_CREDIT_CONTROL_0__FC1Override_MASK
 
- L2_CREDIT_CONTROL_0__FC1Override__SHIFT
 
- L2_CREDIT_CONTROL_0__FC2Credits_MASK
 
- L2_CREDIT_CONTROL_0__FC2Credits__SHIFT
 
- L2_CREDIT_CONTROL_0__FC2Override_MASK
 
- L2_CREDIT_CONTROL_0__FC2Override__SHIFT
 
- L2_CREDIT_CONTROL_0__FC3Credits_MASK
 
- L2_CREDIT_CONTROL_0__FC3Credits__SHIFT
 
- L2_CREDIT_CONTROL_0__FC3Override_MASK
 
- L2_CREDIT_CONTROL_0__FC3Override__SHIFT
 
- L2_CREDIT_CONTROL_0__MultATSCredits_MASK
 
- L2_CREDIT_CONTROL_0__MultATSCredits__SHIFT
 
- L2_CREDIT_CONTROL_1__CP_PREFETCH_credits_MASK
 
- L2_CREDIT_CONTROL_1__CP_PREFETCH_credits__SHIFT
 
- L2_CREDIT_CONTROL_1__PDTIECredits_MASK
 
- L2_CREDIT_CONTROL_1__PDTIECredits__SHIFT
 
- L2_CREDIT_CONTROL_1__PPR_MCIF_credits_MASK
 
- L2_CREDIT_CONTROL_1__PPR_MCIF_credits__SHIFT
 
- L2_CREDIT_CONTROL_1__RESERVED_MASK
 
- L2_CREDIT_CONTROL_1__RESERVED__SHIFT
 
- L2_CREDIT_CONTROL_1__TWELCredits_MASK
 
- L2_CREDIT_CONTROL_1__TWELCredits__SHIFT
 
- L2_CREDIT_CONTROL_2__FCELCredits_MASK
 
- L2_CREDIT_CONTROL_2__FCELCredits__SHIFT
 
- L2_CREDIT_CONTROL_2__FCELOverride_MASK
 
- L2_CREDIT_CONTROL_2__FCELOverride__SHIFT
 
- L2_CREDIT_CONTROL_2__FLTCMBCredits_MASK
 
- L2_CREDIT_CONTROL_2__FLTCMBCredits__SHIFT
 
- L2_CREDIT_CONTROL_2__FLTCMBOverride_MASK
 
- L2_CREDIT_CONTROL_2__FLTCMBOverride__SHIFT
 
- L2_CREDIT_CONTROL_2__PPR_logger_credits_MASK
 
- L2_CREDIT_CONTROL_2__PPR_logger_credits__SHIFT
 
- L2_CREDIT_CONTROL_2__QUEUECredits_MASK
 
- L2_CREDIT_CONTROL_2__QUEUECredits__SHIFT
 
- L2_CREDIT_CONTROL_2__QUEUEOverride_MASK
 
- L2_CREDIT_CONTROL_2__QUEUEOverride__SHIFT
 
- L2_CYCLE_COUNTER_RELOAD
 
- L2_DATA
 
- L2_DB_SIZE
 
- L2_DISABLE_LATE_HIT
 
- L2_DTC_CONTROL__DTCBypass_MASK
 
- L2_DTC_CONTROL__DTCBypass__SHIFT
 
- L2_DTC_CONTROL__DTCEntries_MASK
 
- L2_DTC_CONTROL__DTCEntries__SHIFT
 
- L2_DTC_CONTROL__DTCInvalidationSel_MASK
 
- L2_DTC_CONTROL__DTCInvalidationSel__SHIFT
 
- L2_DTC_CONTROL__DTCLRUUpdatePri_MASK
 
- L2_DTC_CONTROL__DTCLRUUpdatePri__SHIFT
 
- L2_DTC_CONTROL__DTCParityEn_MASK
 
- L2_DTC_CONTROL__DTCParityEn__SHIFT
 
- L2_DTC_CONTROL__DTCParitySupport_MASK
 
- L2_DTC_CONTROL__DTCParitySupport__SHIFT
 
- L2_DTC_CONTROL__DTCSoftInvalidate_MASK
 
- L2_DTC_CONTROL__DTCSoftInvalidate__SHIFT
 
- L2_DTC_CONTROL__DTCWays_MASK
 
- L2_DTC_CONTROL__DTCWays__SHIFT
 
- L2_DTC_CONTROL__RESERVED_MASK
 
- L2_DTC_CONTROL__RESERVED__SHIFT
 
- L2_DTC_HASH_CONTROL__DTCAddressMask_MASK
 
- L2_DTC_HASH_CONTROL__DTCAddressMask__SHIFT
 
- L2_DTC_WAY_CONTROL__DTCWayAccessDisable_MASK
 
- L2_DTC_WAY_CONTROL__DTCWayAccessDisable__SHIFT
 
- L2_DTC_WAY_CONTROL__DTCWayDisable_MASK
 
- L2_DTC_WAY_CONTROL__DTCWayDisable__SHIFT
 
- L2_ECO_CNTRL_0__L2_ECO_0_MASK
 
- L2_ECO_CNTRL_0__L2_ECO_0__SHIFT
 
- L2_ECO_CNTRL_1__L2_ECO_1_MASK
 
- L2_ECO_CNTRL_1__L2_ECO_1__SHIFT
 
- L2_EDE_CE_MASK
 
- L2_EDE_L2CFGERR
 
- L2_EDE_MASK
 
- L2_EDE_MBECCERR
 
- L2_EDE_MULL2ERR
 
- L2_EDE_SBECCERR
 
- L2_EDE_TPARERR
 
- L2_EDE_UE_MASK
 
- L2_EIE_L2CFGINTEN
 
- L2_EIE_MASK
 
- L2_EIE_MBECCINTEN
 
- L2_EIE_SBECCINTEN
 
- L2_EIE_TPARINTEN
 
- L2_EN
 
- L2_ERR_RULE_CONTROL_0__ERRRuleDisable0_MASK
 
- L2_ERR_RULE_CONTROL_0__ERRRuleDisable0__SHIFT
 
- L2_ERR_RULE_CONTROL_0__ERRRuleLock0_MASK
 
- L2_ERR_RULE_CONTROL_0__ERRRuleLock0__SHIFT
 
- L2_ERR_RULE_CONTROL_1__ERRRuleDisable1_MASK
 
- L2_ERR_RULE_CONTROL_1__ERRRuleDisable1__SHIFT
 
- L2_ERR_RULE_CONTROL_2__ERRRuleDisable2_MASK
 
- L2_ERR_RULE_CONTROL_2__ERRRuleDisable2__SHIFT
 
- L2_ERR_RULE_CONTROL_3__ERRRuleDisable3_MASK
 
- L2_ERR_RULE_CONTROL_3__ERRRuleDisable3__SHIFT
 
- L2_ERR_RULE_CONTROL_3__ERRRuleLock1_MASK
 
- L2_ERR_RULE_CONTROL_3__ERRRuleLock1__SHIFT
 
- L2_ERR_RULE_CONTROL_4__ERRRuleDisable4_MASK
 
- L2_ERR_RULE_CONTROL_4__ERRRuleDisable4__SHIFT
 
- L2_ERR_RULE_CONTROL_5__ERRRuleDisable5_MASK
 
- L2_ERR_RULE_CONTROL_5__ERRRuleDisable5__SHIFT
 
- L2_EVENT_BARRIERS
 
- L2_EVENT_CLREX
 
- L2_EVENT_COUNT
 
- L2_EVENT_CYCLES
 
- L2_EVENT_DCACHE_OPS
 
- L2_EVENT_ICACHE_OPS
 
- L2_EVENT_LDREX
 
- L2_EVENT_STREX
 
- L2_EVENT_TLBI
 
- L2_EVENT_TOTAL_READS
 
- L2_EVENT_TOTAL_REQUESTS
 
- L2_EVENT_TOTAL_WRITES
 
- L2_EVNT_CNT0_OFF
 
- L2_EVNT_CNT1_OFF
 
- L2_EVT_CODE
 
- L2_EVT_CODE_MASK
 
- L2_EVT_CODE_SHIFT
 
- L2_EVT_GROUP
 
- L2_EVT_GROUP_MAX
 
- L2_EVT_GRP_MASK
 
- L2_EVT_GRP_SHIFT
 
- L2_EVT_MASK
 
- L2_FHDR_ERRORS_ALIGNMENT
 
- L2_FHDR_ERRORS_BAD_CRC
 
- L2_FHDR_ERRORS_GIANT_FRAME
 
- L2_FHDR_ERRORS_PHY_DECODE
 
- L2_FHDR_ERRORS_TCP_XSUM
 
- L2_FHDR_ERRORS_TOO_SHORT
 
- L2_FHDR_ERRORS_UDP_XSUM
 
- L2_FHDR_STATUS_IP_DATAGRAM
 
- L2_FHDR_STATUS_L2_LLC_SNAP
 
- L2_FHDR_STATUS_L2_VLAN_TAG
 
- L2_FHDR_STATUS_RSS_HASH
 
- L2_FHDR_STATUS_RULE_CLASS
 
- L2_FHDR_STATUS_RULE_P2
 
- L2_FHDR_STATUS_RULE_P3
 
- L2_FHDR_STATUS_RULE_P4
 
- L2_FHDR_STATUS_SPLIT
 
- L2_FHDR_STATUS_TCP_SEGMENT
 
- L2_FHDR_STATUS_UDP_DATAGRAM
 
- L2_FHDR_STATUS_USE_RXHASH
 
- L2_FILTER_ACTION_DISCARD
 
- L2_FILTER_ACTION_HOST
 
- L2_FRAMETAG
 
- L2_GUEST_STACK_SIZE
 
- L2_HDLC
 
- L2_HEADER_LEN
 
- L2_IF_CONF_OFF
 
- L2_ILT_LINES
 
- L2_INT_EN_OFF
 
- L2_ITC_CONTROL__ITCBypass_MASK
 
- L2_ITC_CONTROL__ITCBypass__SHIFT
 
- L2_ITC_CONTROL__ITCEntries_MASK
 
- L2_ITC_CONTROL__ITCEntries__SHIFT
 
- L2_ITC_CONTROL__ITCInvalidationSel_MASK
 
- L2_ITC_CONTROL__ITCInvalidationSel__SHIFT
 
- L2_ITC_CONTROL__ITCLRUUpdatePri_MASK
 
- L2_ITC_CONTROL__ITCLRUUpdatePri__SHIFT
 
- L2_ITC_CONTROL__ITCParityEn_MASK
 
- L2_ITC_CONTROL__ITCParityEn__SHIFT
 
- L2_ITC_CONTROL__ITCParitySupport_MASK
 
- L2_ITC_CONTROL__ITCParitySupport__SHIFT
 
- L2_ITC_CONTROL__ITCSoftInvalidate_MASK
 
- L2_ITC_CONTROL__ITCSoftInvalidate__SHIFT
 
- L2_ITC_CONTROL__ITCWays_MASK
 
- L2_ITC_CONTROL__ITCWays__SHIFT
 
- L2_ITC_CONTROL__RESERVED_MASK
 
- L2_ITC_CONTROL__RESERVED__SHIFT
 
- L2_ITC_HASH_CONTROL__ITCAddressMask_MASK
 
- L2_ITC_HASH_CONTROL__ITCAddressMask__SHIFT
 
- L2_ITC_WAY_CONTROL__ITCWayAccessDisable_MASK
 
- L2_ITC_WAY_CONTROL__ITCWayAccessDisable__SHIFT
 
- L2_ITC_WAY_CONTROL__ITCWayDisable_MASK
 
- L2_ITC_WAY_CONTROL__ITCWayDisable__SHIFT
 
- L2_KWQE_OPCODE_VALUE_FLUSH
 
- L2_KWQE_OPCODE_VALUE_VM_FREE_RX_QUEUE
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ACacheDisable_MASK
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ACacheDisable__SHIFT
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ADynamicDisable_MASK
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ADynamicDisable__SHIFT
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ALength_MASK
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ALength__SHIFT
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ARegsDisable_MASK
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ARegsDisable__SHIFT
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ASpare_MASK
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2ASpare__SHIFT
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2AStop_MASK
 
- L2_L2A_CK_GATE_CONTROL__CKGateL2AStop__SHIFT
 
- L2_L2A_CK_GATE_CONTROL__Reserved_MASK
 
- L2_L2A_CK_GATE_CONTROL__Reserved__SHIFT
 
- L2_L2A_MEMPWR_GATE_10__L2AREG_SD_Exit_Maintain_Cnt_MASK
 
- L2_L2A_MEMPWR_GATE_10__L2AREG_SD_Exit_Maintain_Cnt__SHIFT
 
- L2_L2A_MEMPWR_GATE_1__L2AREG_CACHE_PGMEM_SEL_MASK
 
- L2_L2A_MEMPWR_GATE_1__L2AREG_CACHE_PGMEM_SEL__SHIFT
 
- L2_L2A_MEMPWR_GATE_1__L2AREG_DS_EN_MASK
 
- L2_L2A_MEMPWR_GATE_1__L2AREG_DS_EN__SHIFT
 
- L2_L2A_MEMPWR_GATE_1__L2AREG_LS_EN_MASK
 
- L2_L2A_MEMPWR_GATE_1__L2AREG_LS_EN__SHIFT
 
- L2_L2A_MEMPWR_GATE_1__L2AREG_SD_EN_MASK
 
- L2_L2A_MEMPWR_GATE_1__L2AREG_SD_EN__SHIFT
 
- L2_L2A_MEMPWR_GATE_2__L2AREG_LS_thres_MASK
 
- L2_L2A_MEMPWR_GATE_2__L2AREG_LS_thres__SHIFT
 
- L2_L2A_MEMPWR_GATE_3__L2AREG_DS_thres_MASK
 
- L2_L2A_MEMPWR_GATE_3__L2AREG_DS_thres__SHIFT
 
- L2_L2A_MEMPWR_GATE_4__L2AREG_SD_thres_MASK
 
- L2_L2A_MEMPWR_GATE_4__L2AREG_SD_thres__SHIFT
 
- L2_L2A_MEMPWR_GATE_5__L2AREG_LS_Req_Maintain_Cnt_MASK
 
- L2_L2A_MEMPWR_GATE_5__L2AREG_LS_Req_Maintain_Cnt__SHIFT
 
- L2_L2A_MEMPWR_GATE_6__L2AREG_LS_Exit_Maintain_Cnt_MASK
 
- L2_L2A_MEMPWR_GATE_6__L2AREG_LS_Exit_Maintain_Cnt__SHIFT
 
- L2_L2A_MEMPWR_GATE_7__L2AREG_DS_Req_Maintain_Cnt_MASK
 
- L2_L2A_MEMPWR_GATE_7__L2AREG_DS_Req_Maintain_Cnt__SHIFT
 
- L2_L2A_MEMPWR_GATE_8__L2AREG_DS_Exit_Maintain_Cnt_MASK
 
- L2_L2A_MEMPWR_GATE_8__L2AREG_DS_Exit_Maintain_Cnt__SHIFT
 
- L2_L2A_MEMPWR_GATE_9__L2AREG_SD_Req_Maintain_Cnt_MASK
 
- L2_L2A_MEMPWR_GATE_9__L2AREG_SD_Req_Maintain_Cnt__SHIFT
 
- L2_L2A_PGSIZE_CONTROL__L2AREG_GST_PGSIZE_MASK
 
- L2_L2A_PGSIZE_CONTROL__L2AREG_GST_PGSIZE__SHIFT
 
- L2_L2A_PGSIZE_CONTROL__L2AREG_HOST_PGSIZE_MASK
 
- L2_L2A_PGSIZE_CONTROL__L2AREG_HOST_PGSIZE__SHIFT
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BCacheDisable_MASK
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BCacheDisable__SHIFT
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BDynamicDisable_MASK
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BDynamicDisable__SHIFT
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BLength_MASK
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BLength__SHIFT
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BMiscDisable_MASK
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BMiscDisable__SHIFT
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BRegsDisable_MASK
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BRegsDisable__SHIFT
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BStop_MASK
 
- L2_L2B_CK_GATE_CONTROL__CKGateL2BStop__SHIFT
 
- L2_L2B_CK_GATE_CONTROL__Reserved_MASK
 
- L2_L2B_CK_GATE_CONTROL__Reserved__SHIFT
 
- L2_L2B_DVM_CTRL_0__DVM_INTGFX_QUEUEID_MASK
 
- L2_L2B_DVM_CTRL_0__DVM_INTGFX_QUEUEID__SHIFT
 
- L2_L2B_DVM_CTRL_0__DVM_INTGFX_REQID_MASK
 
- L2_L2B_DVM_CTRL_0__DVM_INTGFX_REQID__SHIFT
 
- L2_L2B_DVM_CTRL_1__DVM_INTGFX_MAXPEND_MASK
 
- L2_L2B_DVM_CTRL_1__DVM_INTGFX_MAXPEND__SHIFT
 
- L2_L2B_DVM_CTRL_1__DVM_IOTLB_INV_PGSIZE_MASK
 
- L2_L2B_DVM_CTRL_1__DVM_IOTLB_INV_PGSIZE__SHIFT
 
- L2_L2B_DVM_CTRL_1__DVM_REMAP_TYPE_MASK
 
- L2_L2B_DVM_CTRL_1__DVM_REMAP_TYPE__SHIFT
 
- L2_L2B_DVM_CTRL_1__DVM_TLB_INV_PGSIZE_MASK
 
- L2_L2B_DVM_CTRL_1__DVM_TLB_INV_PGSIZE__SHIFT
 
- L2_L2B_DVM_CTRL_1__DVM_V1_Disable_MASK
 
- L2_L2B_DVM_CTRL_1__DVM_V1_Disable__SHIFT
 
- L2_L2B_MEMPWR_GATE_10__L2BREG_SD_Exit_Maintain_Cnt_MASK
 
- L2_L2B_MEMPWR_GATE_10__L2BREG_SD_Exit_Maintain_Cnt__SHIFT
 
- L2_L2B_MEMPWR_GATE_1__L2BREG_CACHE_PGMEM_SEL_MASK
 
- L2_L2B_MEMPWR_GATE_1__L2BREG_CACHE_PGMEM_SEL__SHIFT
 
- L2_L2B_MEMPWR_GATE_1__L2BREG_DS_EN_MASK
 
- L2_L2B_MEMPWR_GATE_1__L2BREG_DS_EN__SHIFT
 
- L2_L2B_MEMPWR_GATE_1__L2BREG_LS_EN_MASK
 
- L2_L2B_MEMPWR_GATE_1__L2BREG_LS_EN__SHIFT
 
- L2_L2B_MEMPWR_GATE_1__L2BREG_SD_EN_MASK
 
- L2_L2B_MEMPWR_GATE_1__L2BREG_SD_EN__SHIFT
 
- L2_L2B_MEMPWR_GATE_1__L2B_IP_PGMEM_SEL_MASK
 
- L2_L2B_MEMPWR_GATE_1__L2B_IP_PGMEM_SEL__SHIFT
 
- L2_L2B_MEMPWR_GATE_2__L2BREG_LS_thres_MASK
 
- L2_L2B_MEMPWR_GATE_2__L2BREG_LS_thres__SHIFT
 
- L2_L2B_MEMPWR_GATE_3__L2BREG_DS_thres_MASK
 
- L2_L2B_MEMPWR_GATE_3__L2BREG_DS_thres__SHIFT
 
- L2_L2B_MEMPWR_GATE_4__L2BREG_SD_thres_MASK
 
- L2_L2B_MEMPWR_GATE_4__L2BREG_SD_thres__SHIFT
 
- L2_L2B_MEMPWR_GATE_5__L2BREG_LS_Req_Maintain_Cnt_MASK
 
- L2_L2B_MEMPWR_GATE_5__L2BREG_LS_Req_Maintain_Cnt__SHIFT
 
- L2_L2B_MEMPWR_GATE_6__L2BREG_LS_Exit_Maintain_Cnt_MASK
 
- L2_L2B_MEMPWR_GATE_6__L2BREG_LS_Exit_Maintain_Cnt__SHIFT
 
- L2_L2B_MEMPWR_GATE_7__L2BREG_DS_Req_Maintain_Cnt_MASK
 
- L2_L2B_MEMPWR_GATE_7__L2BREG_DS_Req_Maintain_Cnt__SHIFT
 
- L2_L2B_MEMPWR_GATE_8__L2BREG_DS_Exit_Maintain_Cnt_MASK
 
- L2_L2B_MEMPWR_GATE_8__L2BREG_DS_Exit_Maintain_Cnt__SHIFT
 
- L2_L2B_MEMPWR_GATE_9__L2BREG_SD_Req_Maintain_Cnt_MASK
 
- L2_L2B_MEMPWR_GATE_9__L2BREG_SD_Req_Maintain_Cnt__SHIFT
 
- L2_L2B_PGSIZE_CONTROL__L2BREG_GST_PGSIZE_MASK
 
- L2_L2B_PGSIZE_CONTROL__L2BREG_GST_PGSIZE__SHIFT
 
- L2_L2B_PGSIZE_CONTROL__L2BREG_HOST_PGSIZE_MASK
 
- L2_L2B_PGSIZE_CONTROL__L2BREG_HOST_PGSIZE__SHIFT
 
- L2_LAYER_CODE
 
- L2_LINE_ADDR_MSK
 
- L2_LINE_DPT_OFF
 
- L2_LINE_SIZE
 
- L2_LINE_TAG_OFF
 
- L2_MEM_VAL
 
- L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_READS
 
- L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_READS_SHIFT
 
- L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_WRITES
 
- L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_WRITES_SHIFT
 
- L2_MMU_CONFIG_ALLOW_SNOOP_DISPARITY
 
- L2_MMU_CONFIG_ALLOW_SNOOP_DISPARITY_SHIFT
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_READS
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_READS_HALF
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_READS_OCTANT
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_READS_QUARTER
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_READS_SHIFT
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES_HALF
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES_OCTANT
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES_QUARTER
 
- L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES_SHIFT
 
- L2_MOST
 
- L2_NONE
 
- L2_NWIFI_OFFLOAD_CTRL_REMOVE_PN_LEN
 
- L2_NWIFI_OFFLOAD_CTRL_REMOVE_PN_MSK
 
- L2_NWIFI_OFFLOAD_CTRL_REMOVE_PN_POS
 
- L2_NWIFI_OFFLOAD_CTRL_REMOVE_QOS_LEN
 
- L2_NWIFI_OFFLOAD_CTRL_REMOVE_QOS_MSK
 
- L2_NWIFI_OFFLOAD_CTRL_REMOVE_QOS_POS
 
- L2_ORDER
 
- L2_PDC_CONTROL__PDCBypass_MASK
 
- L2_PDC_CONTROL__PDCBypass__SHIFT
 
- L2_PDC_CONTROL__PDCEntries_MASK
 
- L2_PDC_CONTROL__PDCEntries__SHIFT
 
- L2_PDC_CONTROL__PDCInvalidationSel_MASK
 
- L2_PDC_CONTROL__PDCInvalidationSel__SHIFT
 
- L2_PDC_CONTROL__PDCLRUUpdatePri_MASK
 
- L2_PDC_CONTROL__PDCLRUUpdatePri__SHIFT
 
- L2_PDC_CONTROL__PDCParityEn_MASK
 
- L2_PDC_CONTROL__PDCParityEn__SHIFT
 
- L2_PDC_CONTROL__PDCParitySupport_MASK
 
- L2_PDC_CONTROL__PDCParitySupport__SHIFT
 
- L2_PDC_CONTROL__PDCSearchDirection_MASK
 
- L2_PDC_CONTROL__PDCSearchDirection__SHIFT
 
- L2_PDC_CONTROL__PDCSoftInvalidate_MASK
 
- L2_PDC_CONTROL__PDCSoftInvalidate__SHIFT
 
- L2_PDC_CONTROL__PDCWays_MASK
 
- L2_PDC_CONTROL__PDCWays__SHIFT
 
- L2_PDC_CONTROL__RESERVED_MASK
 
- L2_PDC_CONTROL__RESERVED__SHIFT
 
- L2_PDC_HASH_CONTROL__PDCAddressMask_MASK
 
- L2_PDC_HASH_CONTROL__PDCAddressMask__SHIFT
 
- L2_PDC_WAY_CONTROL__PDCWayAccessDisable_MASK
 
- L2_PDC_WAY_CONTROL__PDCWayAccessDisable__SHIFT
 
- L2_PDC_WAY_CONTROL__PDCWayDisable_MASK
 
- L2_PDC_WAY_CONTROL__PDCWayDisable__SHIFT
 
- L2_PERF_CNTL_0__L2PerfCountUpper0_MASK
 
- L2_PERF_CNTL_0__L2PerfCountUpper0__SHIFT
 
- L2_PERF_CNTL_0__L2PerfCountUpper1_MASK
 
- L2_PERF_CNTL_0__L2PerfCountUpper1__SHIFT
 
- L2_PERF_CNTL_0__L2PerfEvent0_MASK
 
- L2_PERF_CNTL_0__L2PerfEvent0__SHIFT
 
- L2_PERF_CNTL_0__L2PerfEvent1_MASK
 
- L2_PERF_CNTL_0__L2PerfEvent1__SHIFT
 
- L2_PERF_CNTL_1__L2PerfCountUpper2_MASK
 
- L2_PERF_CNTL_1__L2PerfCountUpper2__SHIFT
 
- L2_PERF_CNTL_1__L2PerfCountUpper3_MASK
 
- L2_PERF_CNTL_1__L2PerfCountUpper3__SHIFT
 
- L2_PERF_CNTL_1__L2PerfEvent2_MASK
 
- L2_PERF_CNTL_1__L2PerfEvent2__SHIFT
 
- L2_PERF_CNTL_1__L2PerfEvent3_MASK
 
- L2_PERF_CNTL_1__L2PerfEvent3__SHIFT
 
- L2_PERF_CNTL_2__L2PerfCountUpper4_MASK
 
- L2_PERF_CNTL_2__L2PerfCountUpper4__SHIFT
 
- L2_PERF_CNTL_2__L2PerfCountUpper5_MASK
 
- L2_PERF_CNTL_2__L2PerfCountUpper5__SHIFT
 
- L2_PERF_CNTL_2__L2PerfEvent4_MASK
 
- L2_PERF_CNTL_2__L2PerfEvent4__SHIFT
 
- L2_PERF_CNTL_2__L2PerfEvent5_MASK
 
- L2_PERF_CNTL_2__L2PerfEvent5__SHIFT
 
- L2_PERF_CNTL_3__L2PerfCountUpper6_MASK
 
- L2_PERF_CNTL_3__L2PerfCountUpper6__SHIFT
 
- L2_PERF_CNTL_3__L2PerfCountUpper7_MASK
 
- L2_PERF_CNTL_3__L2PerfCountUpper7__SHIFT
 
- L2_PERF_CNTL_3__L2PerfEvent6_MASK
 
- L2_PERF_CNTL_3__L2PerfEvent6__SHIFT
 
- L2_PERF_CNTL_3__L2PerfEvent7_MASK
 
- L2_PERF_CNTL_3__L2PerfEvent7__SHIFT
 
- L2_PERF_COUNT_0__L2PerfCount0_MASK
 
- L2_PERF_COUNT_0__L2PerfCount0__SHIFT
 
- L2_PERF_COUNT_1__L2PerfCount1_MASK
 
- L2_PERF_COUNT_1__L2PerfCount1__SHIFT
 
- L2_PERF_COUNT_2__L2PerfCount2_MASK
 
- L2_PERF_COUNT_2__L2PerfCount2__SHIFT
 
- L2_PERF_COUNT_3__L2PerfCount3_MASK
 
- L2_PERF_COUNT_3__L2PerfCount3__SHIFT
 
- L2_PERF_COUNT_4__L2PerfCount4_MASK
 
- L2_PERF_COUNT_4__L2PerfCount4__SHIFT
 
- L2_PERF_COUNT_5__L2PerfCount5_MASK
 
- L2_PERF_COUNT_5__L2PerfCount5__SHIFT
 
- L2_PERF_COUNT_6__L2PerfCount6_MASK
 
- L2_PERF_COUNT_6__L2PerfCount6__SHIFT
 
- L2_PERF_COUNT_7__L2PerfCount7_MASK
 
- L2_PERF_COUNT_7__L2PerfCount7__SHIFT
 
- L2_PTC_A_CONTROL__PTCA2MMode_MASK
 
- L2_PTC_A_CONTROL__PTCA2MMode__SHIFT
 
- L2_PTC_A_CONTROL__PTCABypass_MASK
 
- L2_PTC_A_CONTROL__PTCABypass__SHIFT
 
- L2_PTC_A_CONTROL__PTCAEntries_MASK
 
- L2_PTC_A_CONTROL__PTCAEntries__SHIFT
 
- L2_PTC_A_CONTROL__PTCAInvalidationSel_MASK
 
- L2_PTC_A_CONTROL__PTCAInvalidationSel__SHIFT
 
- L2_PTC_A_CONTROL__PTCALRUUpdatePri_MASK
 
- L2_PTC_A_CONTROL__PTCALRUUpdatePri__SHIFT
 
- L2_PTC_A_CONTROL__PTCAParityEn_MASK
 
- L2_PTC_A_CONTROL__PTCAParityEn__SHIFT
 
- L2_PTC_A_CONTROL__PTCAParitySupport_MASK
 
- L2_PTC_A_CONTROL__PTCAParitySupport__SHIFT
 
- L2_PTC_A_CONTROL__PTCASoftInvalidate_MASK
 
- L2_PTC_A_CONTROL__PTCASoftInvalidate__SHIFT
 
- L2_PTC_A_CONTROL__PTCAWays_MASK
 
- L2_PTC_A_CONTROL__PTCAWays__SHIFT
 
- L2_PTC_A_CONTROL__RESERVED_MASK
 
- L2_PTC_A_CONTROL__RESERVED__SHIFT
 
- L2_PTC_A_HASH_CONTROL__PTCAAddressMask_MASK
 
- L2_PTC_A_HASH_CONTROL__PTCAAddressMask__SHIFT
 
- L2_PTC_A_WAY_CONTROL__PTCAWayAccessDisable_MASK
 
- L2_PTC_A_WAY_CONTROL__PTCAWayAccessDisable__SHIFT
 
- L2_PTC_A_WAY_CONTROL__PTCAWayDisable_MASK
 
- L2_PTC_A_WAY_CONTROL__PTCAWayDisable__SHIFT
 
- L2_PTR
 
- L2_PWRACTIVE_HI
 
- L2_PWRACTIVE_LO
 
- L2_PWRGATE_CNTRL_REG_0__IP_PG_thres_MASK
 
- L2_PWRGATE_CNTRL_REG_0__IP_PG_thres__SHIFT
 
- L2_PWRGATE_CNTRL_REG_3__CFG_FW_PG_EXIT_EN_MASK
 
- L2_PWRGATE_CNTRL_REG_3__CFG_FW_PG_EXIT_EN__SHIFT
 
- L2_PWRGATE_CNTRL_REG_3__IP_PG_busy_MASK
 
- L2_PWRGATE_CNTRL_REG_3__IP_PG_busy__SHIFT
 
- L2_PWRGATE_CNTRL_REG_3__IP_PG_en_MASK
 
- L2_PWRGATE_CNTRL_REG_3__IP_PG_en__SHIFT
 
- L2_PWRGATE_CNTRL_REG_3__L2_PG_STATUS_MASK
 
- L2_PWRGATE_CNTRL_REG_3__L2_PG_STATUS__SHIFT
 
- L2_PWROFF_HI
 
- L2_PWROFF_LO
 
- L2_PWRON_HI
 
- L2_PWRON_LO
 
- L2_PWRTRANS_HI
 
- L2_PWRTRANS_LO
 
- L2_QENTRY_SZ
 
- L2_QOS_CDP_ENABLE
 
- L2_READY_HI
 
- L2_READY_LO
 
- L2_RESELECT
 
- L2_RESET
 
- L2_SB_LOCATION__SBlocated_Core_MASK
 
- L2_SB_LOCATION__SBlocated_Core__SHIFT
 
- L2_SB_LOCATION__SBlocated_Port_MASK
 
- L2_SB_LOCATION__SBlocated_Port__SHIFT
 
- L2_SELECT
 
- L2_STATE_COUNT
 
- L2_STATUS_0__L2STATUS0_MASK
 
- L2_STATUS_0__L2STATUS0__SHIFT
 
- L2_STATUS_1__L2STATUS1_MASK
 
- L2_STATUS_1__L2STATUS1__SHIFT
 
- L2_STA_OFF
 
- L2_TW_CONTROL_1__TWDebugEn_MASK
 
- L2_TW_CONTROL_1__TWDebugEn__SHIFT
 
- L2_TW_CONTROL_1__TWDebugForceDisable_MASK
 
- L2_TW_CONTROL_1__TWDebugForceDisable__SHIFT
 
- L2_TW_CONTROL_1__TWDebugMask_MASK
 
- L2_TW_CONTROL_1__TWDebugMask__SHIFT
 
- L2_TW_CONTROL_1__TWDebugNoWrap_MASK
 
- L2_TW_CONTROL_1__TWDebugNoWrap__SHIFT
 
- L2_TW_CONTROL_2__TWDebugAddrLo_MASK
 
- L2_TW_CONTROL_2__TWDebugAddrLo__SHIFT
 
- L2_TW_CONTROL_3__TWDebugAddrHi_MASK
 
- L2_TW_CONTROL_3__TWDebugAddrHi__SHIFT
 
- L2_TW_CONTROL__RESERVED_MASK
 
- L2_TW_CONTROL__RESERVED__SHIFT
 
- L2_TW_CONTROL__TWClearAPBit_Dis_MASK
 
- L2_TW_CONTROL__TWClearAPBit_Dis__SHIFT
 
- L2_TW_CONTROL__TWContWalkOnPErrDis_MASK
 
- L2_TW_CONTROL__TWContWalkOnPErrDis__SHIFT
 
- L2_TW_CONTROL__TWFilter_64B_Dis_MASK
 
- L2_TW_CONTROL__TWFilter_64B_Dis__SHIFT
 
- L2_TW_CONTROL__TWFilter_Dis_MASK
 
- L2_TW_CONTROL__TWFilter_Dis__SHIFT
 
- L2_TW_CONTROL__TWForceCoherent_MASK
 
- L2_TW_CONTROL__TWForceCoherent__SHIFT
 
- L2_TW_CONTROL__TWGuestPrefetchEn_MASK
 
- L2_TW_CONTROL__TWGuestPrefetchEn__SHIFT
 
- L2_TW_CONTROL__TWGuestPrefetchRange_MASK
 
- L2_TW_CONTROL__TWGuestPrefetchRange__SHIFT
 
- L2_TW_CONTROL__TWPTEOnAddrTransExcl_MASK
 
- L2_TW_CONTROL__TWPTEOnAddrTransExcl__SHIFT
 
- L2_TW_CONTROL__TWPTEOnUntransExcl_MASK
 
- L2_TW_CONTROL__TWPTEOnUntransExcl__SHIFT
 
- L2_TW_CONTROL__TWPrefetchEn_MASK
 
- L2_TW_CONTROL__TWPrefetchEn__SHIFT
 
- L2_TW_CONTROL__TWPrefetchOnly4KDis_MASK
 
- L2_TW_CONTROL__TWPrefetchOnly4KDis__SHIFT
 
- L2_TW_CONTROL__TWPrefetchRange_MASK
 
- L2_TW_CONTROL__TWPrefetchRange__SHIFT
 
- L2_TW_CONTROL__TWSetAccessBit_Dis_MASK
 
- L2_TW_CONTROL__TWSetAccessBit_Dis__SHIFT
 
- L2_TYPE_BIT_OFFSET
 
- L2_TYPE_MASK
 
- L2_TYPE_MATCH_OFFSET
 
- L2_TYPE_OFFSET
 
- L2_TYPE_QW
 
- L2_VOICE
 
- L2_WRITETHROUGH
 
- L2_WRITETHROUGH_KIRKWOOD
 
- L2_cache_block_invalidate
 
- L2_cache_block_invalidate_nowait
 
- L2_cache_block_writeback
 
- L2_cache_block_writeback_invalidate
 
- L2_cache_block_writeback_invalidate_nowait
 
- L2_cache_block_writeback_nowait
 
- L2_cache_global_writeback
 
- L2_cache_global_writeback_invalidate
 
- L2_cache_set_mode
 
- L2_ptep
 
- L3
 
- L310_ADDR_FILTER_EN
 
- L310_ADDR_FILTER_END
 
- L310_ADDR_FILTER_START
 
- L310_AUX_CTRL_ASSOCIATIVITY_16
 
- L310_AUX_CTRL_CACHE_REPLACE_RR
 
- L310_AUX_CTRL_DATA_PREFETCH
 
- L310_AUX_CTRL_EARLY_BRESP
 
- L310_AUX_CTRL_EXCLUSIVE_CACHE
 
- L310_AUX_CTRL_FULL_LINE_ZERO
 
- L310_AUX_CTRL_HIGHPRIO_SO_DEV
 
- L310_AUX_CTRL_INSTR_PREFETCH
 
- L310_AUX_CTRL_NS_INT_CTRL
 
- L310_AUX_CTRL_NS_LOCKDOWN
 
- L310_AUX_CTRL_STORE_LIMITATION
 
- L310_CACHE_ID_RTL_R0P0
 
- L310_CACHE_ID_RTL_R1P0
 
- L310_CACHE_ID_RTL_R2P0
 
- L310_CACHE_ID_RTL_R3P0
 
- L310_CACHE_ID_RTL_R3P1
 
- L310_CACHE_ID_RTL_R3P1_50REL0
 
- L310_CACHE_ID_RTL_R3P2
 
- L310_CACHE_ID_RTL_R3P3
 
- L310_DATA_LATENCY_CTRL
 
- L310_DYNAMIC_CLK_GATING_EN
 
- L310_LATENCY_CTRL_RD
 
- L310_LATENCY_CTRL_SETUP
 
- L310_LATENCY_CTRL_WR
 
- L310_POWER_CTRL
 
- L310_PREFETCH_CTRL
 
- L310_PREFETCH_CTRL_DATA_PREFETCH
 
- L310_PREFETCH_CTRL_DBL_LINEFILL
 
- L310_PREFETCH_CTRL_DBL_LINEFILL_INCR
 
- L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP
 
- L310_PREFETCH_CTRL_INSTR_PREFETCH
 
- L310_PREFETCH_CTRL_OFFSET_MASK
 
- L310_PREFETCH_CTRL_PREFETCH_DROP
 
- L310_STNDBY_MODE_EN
 
- L310_TAG_LATENCY_CTRL
 
- L32OPT
 
- L32_64
 
- L3BLKRST
 
- L3CACHE_EVENT_ATTR
 
- L3CACHE_PMU_FORMAT_ATTR
 
- L3CR_L3APE
 
- L3CR_L3CKSP
 
- L3CR_L3CLKDIV
 
- L3CR_L3CLKEN
 
- L3CR_L3DO
 
- L3CR_L3E
 
- L3CR_L3HWF
 
- L3CR_L3I
 
- L3CR_L3IO
 
- L3CR_L3NIRCA
 
- L3CR_L3PE
 
- L3CR_L3PSP
 
- L3CR_L3REP
 
- L3CR_L3RES
 
- L3CR_L3RT
 
- L3CR_L3SIZ
 
- L3CR_L3SPO
 
- L3CR_PMEN
 
- L3CR_PMSIZ
 
- L3C_AELR
 
- L3C_BELR
 
- L3C_BELR_BANK
 
- L3C_CERREN
 
- L3C_CNTR0_LOWER
 
- L3C_CORR_ERR_MASK
 
- L3C_COUNTER_CTL
 
- L3C_COUNTER_DATA
 
- L3C_ECR
 
- L3C_ECR_CINTREN
 
- L3C_ECR_UCINTREN
 
- L3C_ELR
 
- L3C_ELR_AGENTID
 
- L3C_ELR_ERRGRP
 
- L3C_ELR_ERRSYN
 
- L3C_ELR_ERRWAY
 
- L3C_ELR_OPTYPE
 
- L3C_ELR_PADDRHIGH
 
- L3C_ESR
 
- L3C_ESR_CERRINTR_MASK
 
- L3C_ESR_CERR_MASK
 
- L3C_ESR_DATATAG_MASK
 
- L3C_ESR_MULTICERR_MASK
 
- L3C_ESR_MULTIHIT_MASK
 
- L3C_ESR_MULTIUCERR_MASK
 
- L3C_ESR_UCERRINTR_MASK
 
- L3C_ESR_UCERR_MASK
 
- L3C_ESR_UCEVICT_MASK
 
- L3C_EVENT_CTRL
 
- L3C_EVENT_TYPE0
 
- L3C_EVTYPE_NONE
 
- L3C_INT_CLEAR
 
- L3C_INT_MASK
 
- L3C_INT_STATUS
 
- L3C_NR_COUNTERS
 
- L3C_PERF_CTRL
 
- L3C_PERF_CTRL_EN
 
- L3C_UCERREN
 
- L3C_UNCORR_ERR_MASK
 
- L3G4200D_GYRO_DEV_NAME
 
- L3G4IS_GYRO_DEV_NAME
 
- L3GD20H_GYRO_DEV_NAME
 
- L3GD20_GYRO_DEV_NAME
 
- L3SQ_URB_READ_CAM_MATCH_DISABLE
 
- L3TYPE_ET_STOP
 
- L3TYPE_GRH
 
- L3TYPE_IPV4
 
- L3TYPE_IPV4_OPTIONS
 
- L3TYPE_IPV6
 
- L3TYPE_IPV6_OPTIONS
 
- L3TYPE_NONE
 
- L3TYPE_OTHER
 
- L3TYPE_UNKNOWN
 
- L3_0_DIRECT
 
- L3_1610_FLASH_CS2B_OE
 
- L3_1_UC
 
- L3_24XX_BASE
 
- L3_24XX_PHYS
 
- L3_24XX_SIZE
 
- L3_24XX_VIRT
 
- L3_2_RESERVED
 
- L3_34XX_BASE
 
- L3_34XX_PHYS
 
- L3_34XX_SIZE
 
- L3_34XX_VIRT
 
- L3_3_WB
 
- L3_44XX_BASE
 
- L3_44XX_PHYS
 
- L3_44XX_SIZE
 
- L3_44XX_VIRT
 
- L3_54XX_BASE
 
- L3_54XX_PHYS
 
- L3_54XX_SIZE
 
- L3_54XX_VIRT
 
- L3_AGENT_CONTROL
 
- L3_AGENT_STATUS
 
- L3_AGENT_STATUS_CLEAR_IA
 
- L3_AGENT_STATUS_CLEAR_TA
 
- L3_APPLICATION_ERROR
 
- L3_BASE_IS_SUBMODULE
 
- L3_CKSUM_OK
 
- L3_CLS
 
- L3_CLS_IPVER
 
- L3_CLS_PID
 
- L3_CLS_PID_SHIFT
 
- L3_CLS_TOS
 
- L3_CLS_TOSMASK
 
- L3_CLS_TOSMASK_SHIFT
 
- L3_CLS_TOS_SHIFT
 
- L3_CLS_VALID
 
- L3_COMPONENT
 
- L3_CORE
 
- L3_DEBUG_ERROR
 
- L3_DEV_PM_OPS
 
- L3_EN
 
- L3_ERROR_LOG
 
- L3_ERROR_LOG_ADDR
 
- L3_ERROR_LOG_CMD
 
- L3_ERROR_LOG_CODE
 
- L3_ERROR_LOG_INITID
 
- L3_ERROR_LOG_MULTI
 
- L3_ERROR_LOG_SECONDARY
 
- L3_ESC
 
- L3_EVENT_CYCLES
 
- L3_EVENT_EVICT_REQ
 
- L3_EVENT_INV_HIT
 
- L3_EVENT_INV_N_WRITE_HIT
 
- L3_EVENT_INV_N_WRITE_REQ
 
- L3_EVENT_INV_REQ
 
- L3_EVENT_LC_BIT
 
- L3_EVENT_MAX
 
- L3_EVENT_READ_HIT
 
- L3_EVENT_READ_HIT_D
 
- L3_EVENT_READ_MISS
 
- L3_EVENT_READ_MISS_D
 
- L3_EVENT_READ_REQ
 
- L3_EVENT_WRITEBACK_REQ
 
- L3_EVENT_WRITE_HIT
 
- L3_EVENT_WRITE_MISS
 
- L3_EVTYPE_MASK
 
- L3_FLAGMUX_MASK0
 
- L3_FLAGMUX_REGERR0
 
- L3_FRAMING_MASK
 
- L3_FRAMING_SHIFT
 
- L3_GENERAL_PRIO_CREDITS
 
- L3_HIGH_PRIO_CREDITS
 
- L3_HML3_PM_CNTCTL
 
- L3_HML3_PM_CR
 
- L3_HML3_PM_EVCNTR
 
- L3_HML3_PM_EVTYPE
 
- L3_HML3_PM_FILTRA
 
- L3_HML3_PM_FILTRAM
 
- L3_HML3_PM_FILTRB
 
- L3_HML3_PM_FILTRBM
 
- L3_HML3_PM_FILTRC
 
- L3_HML3_PM_FILTRCM
 
- L3_L4_CTRL_IPV4_CHECKSUM_EN_LEN
 
- L3_L4_CTRL_IPV4_CHECKSUM_EN_MSK
 
- L3_L4_CTRL_IPV4_CHECKSUM_EN_POS
 
- L3_L4_CTRL_TCPIP_CHECKSUM_EN_LEN
 
- L3_L4_CTRL_TCPIP_CHECKSUM_EN_MSK
 
- L3_L4_CTRL_TCPIP_CHECKSUM_EN_POS
 
- L3_LINE_SIZE
 
- L3_MAIN_SN_DRA7XX_BASE
 
- L3_MAIN_SN_DRA7XX_PHYS
 
- L3_MAIN_SN_DRA7XX_SIZE
 
- L3_MAIN_SN_DRA7XX_VIRT
 
- L3_MODULES
 
- L3_MODULES_MAX_LEN
 
- L3_M_BC_CNTENCLR
 
- L3_M_BC_CNTENSET
 
- L3_M_BC_CR
 
- L3_M_BC_GANG
 
- L3_M_BC_INTENCLR
 
- L3_M_BC_INTENSET
 
- L3_M_BC_IRQCTL
 
- L3_M_BC_OVSR
 
- L3_M_BC_SATROLL_CR
 
- L3_NUM_COUNTERS
 
- L3_PM_ADDR_MATCH
 
- L3_PM_CONTROL
 
- L3_PM_ERROR_CLEAR_MULTI
 
- L3_PM_ERROR_CLEAR_SINGLE
 
- L3_PM_ERROR_LOG
 
- L3_PM_READ_PERMISSION
 
- L3_PM_REQ_INFO_PERMISSION
 
- L3_PM_WRITE_PERMISSION
 
- L3_PRIO_CREDITS_MASK
 
- L3_QOS_CDP_ENABLE
 
- L3_RSS_FLAGS
 
- L3_SCC
 
- L3_SI_CONTROL
 
- L3_SI_FLAG_STATUS_0
 
- L3_SI_FLAG_STATUS_1
 
- L3_STATUS_0_CAMIA_BRST
 
- L3_STATUS_0_CAMIA_INBAND
 
- L3_STATUS_0_CAMIA_RSP
 
- L3_STATUS_0_DISPIA_BRST
 
- L3_STATUS_0_DISPIA_RSP
 
- L3_STATUS_0_DMARDIA_BRST
 
- L3_STATUS_0_DMARDIA_RSP
 
- L3_STATUS_0_DMAWRIA_BRST
 
- L3_STATUS_0_DMAWRIA_RSP
 
- L3_STATUS_0_GPMCTA_REQ
 
- L3_STATUS_0_GPMCTA_SERROR
 
- L3_STATUS_0_IVAIA_BRST
 
- L3_STATUS_0_IVAIA_INBAND
 
- L3_STATUS_0_IVAIA_RSP
 
- L3_STATUS_0_IVATA_REQ
 
- L3_STATUS_0_L4CORETA_REQ
 
- L3_STATUS_0_L4EMUTA_REQ
 
- L3_STATUS_0_L4PERTA_REQ
 
- L3_STATUS_0_MAD2DTA_REQ
 
- L3_STATUS_0_MPUIA_BRST
 
- L3_STATUS_0_MPUIA_INBAND
 
- L3_STATUS_0_MPUIA_RSP
 
- L3_STATUS_0_OCMRAMTA_REQ
 
- L3_STATUS_0_OCMROMTA_REQ
 
- L3_STATUS_0_SGXIA_BRST
 
- L3_STATUS_0_SGXIA_MERROR
 
- L3_STATUS_0_SGXIA_RSP
 
- L3_STATUS_0_SGXTA_REQ
 
- L3_STATUS_0_SGXTA_SERROR
 
- L3_STATUS_0_SMSTA_REQ
 
- L3_STATUS_0_TIMEOUT_MASK
 
- L3_STATUS_0_USBHOSTIA_BRST
 
- L3_STATUS_0_USBHOSTIA_INBAND
 
- L3_STATUS_0_USBOTGIA_BRST
 
- L3_STATUS_0_USBOTGIA_INBAND
 
- L3_STATUS_0_USBOTGIA_RSP
 
- L3_STATUS_1_DAPIA0
 
- L3_STATUS_1_DAPIA1
 
- L3_STATUS_1_IVAIA
 
- L3_STATUS_1_MPU_DATAIA
 
- L3_TARGET_NOT_SUPPORTED
 
- L3_TARG_STDERRLOG_CINFO_INFO
 
- L3_TARG_STDERRLOG_CINFO_MSTADDR
 
- L3_TARG_STDERRLOG_CINFO_OPCODE
 
- L3_TARG_STDERRLOG_HDR
 
- L3_TARG_STDERRLOG_INFO
 
- L3_TARG_STDERRLOG_MAIN
 
- L3_TARG_STDERRLOG_MSTADDR
 
- L3_TARG_STDERRLOG_SLVOFSLSB
 
- L3_ptep
 
- L4
 
- L4BLKRST
 
- L4SYSTIMER0_RESET
 
- L4SYSTIMER1_RESET
 
- L4TYPE_GRE
 
- L4TYPE_IPCOMP
 
- L4TYPE_IPFRAG
 
- L4TYPE_IPSEC_ESP
 
- L4TYPE_NONE
 
- L4TYPE_OTHER
 
- L4TYPE_ROCE_BTH
 
- L4TYPE_SCTP
 
- L4TYPE_TCP
 
- L4TYPE_UDP
 
- L4WD0_RESET
 
- L4WD1_RESET
 
- L4_12
 
- L4_16B_ETH_VALUE
 
- L4_16B_HDR_VESWID_OFFSET
 
- L4_16B_TYPE_MASK
 
- L4_24XX_BASE
 
- L4_24XX_PHYS
 
- L4_24XX_SIZE
 
- L4_24XX_VIRT
 
- L4_34XX_BASE
 
- L4_34XX_PHYS
 
- L4_34XX_SIZE
 
- L4_34XX_VIRT
 
- L4_44XX_BASE
 
- L4_44XX_PHYS
 
- L4_44XX_SIZE
 
- L4_44XX_VIRT
 
- L4_54XX_BASE
 
- L4_54XX_PHYS
 
- L4_54XX_SIZE
 
- L4_54XX_VIRT
 
- L4_8
 
- L4_ABE_44XX_PHYS
 
- L4_ABE_44XX_SIZE
 
- L4_ABE_44XX_VIRT
 
- L4_BUSY
 
- L4_CFG_DRA7XX_BASE
 
- L4_CFG_DRA7XX_PHYS
 
- L4_CFG_DRA7XX_SIZE
 
- L4_CFG_DRA7XX_VIRT
 
- L4_CFG_MPU_DRA7XX_BASE
 
- L4_CFG_MPU_DRA7XX_PHYS
 
- L4_CFG_MPU_DRA7XX_SIZE
 
- L4_CFG_MPU_DRA7XX_VIRT
 
- L4_CKSUM_OK
 
- L4_CMD_GETCAL
 
- L4_CMD_ID
 
- L4_CMD_SETCAL
 
- L4_CSUM_PTR_MASK
 
- L4_EMU_34XX_BASE
 
- L4_EMU_34XX_PHYS
 
- L4_EMU_34XX_SIZE
 
- L4_EMU_34XX_VIRT
 
- L4_EMU_44XX_BASE
 
- L4_EN
 
- L4_FM_16B_PRN
 
- L4_ID
 
- L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL
 
- L4_KCQE_COMPLETION_STATUS_NIC_ERROR
 
- L4_KCQE_COMPLETION_STATUS_OFFLOADED_PG
 
- L4_KCQE_COMPLETION_STATUS_PARITY_ERROR
 
- L4_KCQE_COMPLETION_STATUS_SUCCESS
 
- L4_KCQE_COMPLETION_STATUS_TIMEOUT
 
- L4_KCQE_OPCODE_VALUE_CLOSE_COMP
 
- L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED
 
- L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
 
- L4_KCQE_OPCODE_VALUE_FW_TCP_UPDATE
 
- L4_KCQE_OPCODE_VALUE_INIT_ULP
 
- L4_KCQE_OPCODE_VALUE_OFFLOAD_PG
 
- L4_KCQE_OPCODE_VALUE_OOO_EVENT_NOTIFICATION
 
- L4_KCQE_OPCODE_VALUE_OOO_FLUSH
 
- L4_KCQE_OPCODE_VALUE_RESET_COMP
 
- L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
 
- L4_KCQE_OPCODE_VALUE_UPDATE_PG
 
- L4_KCQE_OPCODE_VALUE_UPLOAD_PG
 
- L4_KCQ_LAYER_CODE
 
- L4_KCQ_LAYER_CODE_SHIFT
 
- L4_KCQ_RAMROD_COMPLETION
 
- L4_KCQ_RAMROD_COMPLETION_SHIFT
 
- L4_KCQ_RESERVED3
 
- L4_KCQ_RESERVED3_SHIFT
 
- L4_KCQ_RESERVED4
 
- L4_KCQ_RESERVED4_SHIFT
 
- L4_KCQ_UPLOAD_PG_LAYER_CODE
 
- L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT
 
- L4_KCQ_UPLOAD_PG_RESERVED3
 
- L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT
 
- L4_KCQ_UPLOAD_PG_RESERVED4
 
- L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT
 
- L4_KWQE_OPCODE_VALUE_CLOSE
 
- L4_KWQE_OPCODE_VALUE_CONNECT1
 
- L4_KWQE_OPCODE_VALUE_CONNECT2
 
- L4_KWQE_OPCODE_VALUE_CONNECT3
 
- L4_KWQE_OPCODE_VALUE_INIT_ULP
 
- L4_KWQE_OPCODE_VALUE_OFFLOAD_PG
 
- L4_KWQE_OPCODE_VALUE_RESET
 
- L4_KWQE_OPCODE_VALUE_UPDATE_PG
 
- L4_KWQE_OPCODE_VALUE_UPDATE_SECRET
 
- L4_KWQE_OPCODE_VALUE_UPLOAD_PG
 
- L4_KWQ_CLOSE_REQ_LAYER_CODE
 
- L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT
 
- L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT
 
- L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT
 
- L4_KWQ_CLOSE_REQ_RESERVED1
 
- L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT
 
- L4_KWQ_CONNECT_REQ1_IP_V6
 
- L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT
 
- L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE
 
- L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT
 
- L4_KWQ_CONNECT_REQ1_KEEP_ALIVE
 
- L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT
 
- L4_KWQ_CONNECT_REQ1_LAYER_CODE
 
- L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT
 
- L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT
 
- L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT
 
- L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE
 
- L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT
 
- L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK
 
- L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT
 
- L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG
 
- L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT
 
- L4_KWQ_CONNECT_REQ1_RESERVED1
 
- L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT
 
- L4_KWQ_CONNECT_REQ1_RESERVED2
 
- L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT
 
- L4_KWQ_CONNECT_REQ1_RSRV
 
- L4_KWQ_CONNECT_REQ1_RSRV_SHIFT
 
- L4_KWQ_CONNECT_REQ1_SACK
 
- L4_KWQ_CONNECT_REQ1_SACK_SHIFT
 
- L4_KWQ_CONNECT_REQ1_SEG_SCALING
 
- L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT
 
- L4_KWQ_CONNECT_REQ1_TIME_STAMP
 
- L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT
 
- L4_KWQ_CONNECT_REQ2_LAYER_CODE
 
- L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT
 
- L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT
 
- L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT
 
- L4_KWQ_CONNECT_REQ2_RESERVED1
 
- L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT
 
- L4_KWQ_CONNECT_REQ3_LAYER_CODE
 
- L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT
 
- L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT
 
- L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT
 
- L4_KWQ_CONNECT_REQ3_RESERVED1
 
- L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT
 
- L4_KWQ_OFFLOAD_PG_LAYER_CODE
 
- L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT
 
- L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT
 
- L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT
 
- L4_KWQ_OFFLOAD_PG_RESERVED1
 
- L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT
 
- L4_KWQ_OFFLOAD_PG_RESERVED2
 
- L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT
 
- L4_KWQ_OFFLOAD_PG_SNAP_ENCAP
 
- L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT
 
- L4_KWQ_OFFLOAD_PG_VLAN_TAGGING
 
- L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT
 
- L4_KWQ_RESET_REQ_LAYER_CODE
 
- L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT
 
- L4_KWQ_RESET_REQ_LINKED_WITH_NEXT
 
- L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT
 
- L4_KWQ_RESET_REQ_RESERVED1
 
- L4_KWQ_RESET_REQ_RESERVED1_SHIFT
 
- L4_KWQ_UPDATE_PG_LAYER_CODE
 
- L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT
 
- L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT
 
- L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT
 
- L4_KWQ_UPDATE_PG_RESERVED1
 
- L4_KWQ_UPDATE_PG_RESERVED1_SHIFT
 
- L4_KWQ_UPDATE_PG_RESERVERD2
 
- L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT
 
- L4_KWQ_UPDATE_PG_VALIDS_DA
 
- L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT
 
- L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT
 
- L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT
 
- L4_KWQ_UPLOAD_LAYER_CODE
 
- L4_KWQ_UPLOAD_LAYER_CODE_SHIFT
 
- L4_KWQ_UPLOAD_LINKED_WITH_NEXT
 
- L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT
 
- L4_KWQ_UPLOAD_RESERVED1
 
- L4_KWQ_UPLOAD_RESERVED1_SHIFT
 
- L4_LAYER_CODE
 
- L4_LENGTH_VALID
 
- L4_PER1_DRA7XX_BASE
 
- L4_PER1_DRA7XX_PHYS
 
- L4_PER1_DRA7XX_SIZE
 
- L4_PER1_DRA7XX_VIRT
 
- L4_PER2_DRA7XX_BASE
 
- L4_PER2_DRA7XX_PHYS
 
- L4_PER2_DRA7XX_SIZE
 
- L4_PER2_DRA7XX_VIRT
 
- L4_PER3_DRA7XX_BASE
 
- L4_PER3_DRA7XX_PHYS
 
- L4_PER3_DRA7XX_SIZE
 
- L4_PER3_DRA7XX_VIRT
 
- L4_PER_34XX_BASE
 
- L4_PER_34XX_PHYS
 
- L4_PER_34XX_SIZE
 
- L4_PER_34XX_VIRT
 
- L4_PER_44XX_BASE
 
- L4_PER_44XX_PHYS
 
- L4_PER_44XX_SIZE
 
- L4_PER_44XX_VIRT
 
- L4_PER_54XX_BASE
 
- L4_PER_54XX_PHYS
 
- L4_PER_54XX_SIZE
 
- L4_PER_54XX_VIRT
 
- L4_PORT
 
- L4_PTR_MASK
 
- L4_PTR_SHIFT
 
- L4_RSS_FLAGS
 
- L4_SELECT_ANALOG
 
- L4_SELECT_DIGITAL
 
- L4_SELECT_SECONDARY
 
- L4_SLOW_AM33XX_BASE
 
- L4_SLOW_TI81XX_BASE
 
- L4_TIMEOUT
 
- L4_TYPE_BIT_OFFSET
 
- L4_TYPE_MATCH_OFFSET
 
- L4_TYPE_OFFSET
 
- L4_TYPE_QW
 
- L4_UDP
 
- L4_WKUP_DRA7XX_BASE
 
- L4_WKUP_DRA7XX_PHYS
 
- L4_WKUP_DRA7XX_SIZE
 
- L4_WKUP_DRA7XX_VIRT
 
- L4_WK_243X_BASE
 
- L4_WK_243X_PHYS
 
- L4_WK_243X_SIZE
 
- L4_WK_243X_VIRT
 
- L4_WK_34XX_BASE
 
- L4_WK_44XX_BASE
 
- L4_WK_54XX_BASE
 
- L4_WK_54XX_PHYS
 
- L4_WK_54XX_SIZE
 
- L4_WK_54XX_VIRT
 
- L4_WK_AM33XX_BASE
 
- L4_WK_AM33XX_PHYS
 
- L4_WK_AM33XX_SIZE
 
- L4_WK_AM33XX_VIRT
 
- L5
 
- L5BLKRST
 
- L5CM_CONN_ADDR_PARAMS_IP_VERSION
 
- L5CM_CONN_ADDR_PARAMS_IP_VERSION_SHIFT
 
- L5CM_CONN_ADDR_PARAMS_RSRV
 
- L5CM_CONN_ADDR_PARAMS_RSRV_SHIFT
 
- L5CM_PCS_ATTRIBUTES_CALCULATE_HASH
 
- L5CM_PCS_ATTRIBUTES_CALCULATE_HASH_SHIFT
 
- L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT
 
- L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT_SHIFT
 
- L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC
 
- L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC_SHIFT
 
- L5CM_PCS_ATTRIBUTES_FORWARD_PACKET
 
- L5CM_PCS_ATTRIBUTES_FORWARD_PACKET_SHIFT
 
- L5CM_PCS_ATTRIBUTES_L4_OFFLOAD
 
- L5CM_PCS_ATTRIBUTES_L4_OFFLOAD_SHIFT
 
- L5CM_PCS_ATTRIBUTES_NET_FILTER
 
- L5CM_PCS_ATTRIBUTES_NET_FILTER_SHIFT
 
- L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT
 
- L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT_SHIFT
 
- L5CM_PCS_ATTRIBUTES_RSRV
 
- L5CM_PCS_ATTRIBUTES_RSRV_SHIFT
 
- L5CM_PORT_LISTENER_DATA_DEFFERED_MODE
 
- L5CM_PORT_LISTENER_DATA_DEFFERED_MODE_SHIFT
 
- L5CM_PORT_LISTENER_DATA_ENABLE
 
- L5CM_PORT_LISTENER_DATA_ENABLE_SHIFT
 
- L5CM_PORT_LISTENER_DATA_IP_INDEX
 
- L5CM_PORT_LISTENER_DATA_IP_INDEX_SHIFT
 
- L5CM_PORT_LISTENER_DATA_MPA_MODE
 
- L5CM_PORT_LISTENER_DATA_MPA_MODE_SHIFT
 
- L5CM_PORT_LISTENER_DATA_NET_FILTER
 
- L5CM_PORT_LISTENER_DATA_NET_FILTER_SHIFT
 
- L5CM_RAMROD_CMD_ID_ABORT
 
- L5CM_RAMROD_CMD_ID_BASE
 
- L5CM_RAMROD_CMD_ID_CLOSE
 
- L5CM_RAMROD_CMD_ID_SEARCHER_DELETE
 
- L5CM_RAMROD_CMD_ID_TCP_CONNECT
 
- L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD
 
- L5CM_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT
 
- L5CM_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT
 
- L5CM_TERM_VARS_FIN_RECEIVED_SBIT
 
- L5CM_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT
 
- L5CM_TERM_VARS_RSRV
 
- L5CM_TERM_VARS_RSRV_SHIFT
 
- L5CM_TERM_VARS_TCP_STATE
 
- L5CM_TERM_VARS_TCP_STATE_SHIFT
 
- L5CM_TERM_VARS_TERM_ON_CHIP
 
- L5CM_TERM_VARS_TERM_ON_CHIP_SHIFT
 
- L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE
 
- L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE_SHIFT
 
- L5CM_TSTORM_CONN_BUFFER_RSRV
 
- L5CM_TSTORM_CONN_BUFFER_RSRV_SHIFT
 
- L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE
 
- L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE_SHIFT
 
- L5CM_XSTORM_CONN_BUFFER_RSRV
 
- L5CM_XSTORM_CONN_BUFFER_RSRV_SHIFT
 
- L5_EN
 
- L5_KRNLQ_FLAGS
 
- L5_KRNLQ_HOST_FW_QIDX
 
- L5_KRNLQ_HOST_QIDX
 
- L5_KRNLQ_NX_PG_QIDX
 
- L5_KRNLQ_NX_QE_HADDR_HI
 
- L5_KRNLQ_NX_QE_HADDR_LO
 
- L5_KRNLQ_NX_QE_SELF_SEQ
 
- L5_KRNLQ_PGTBL_HADDR_HI
 
- L5_KRNLQ_PGTBL_HADDR_LO
 
- L5_KRNLQ_PGTBL_NPAGES
 
- L5_KRNLQ_PGTBL_PGIDX
 
- L5_KRNLQ_QE_SELF_SEQ_MAX
 
- L5_KRNLQ_QIDX_INCR
 
- L5_KRNLQ_SIZE
 
- L5_KRNLQ_TYPE
 
- L6
 
- L64781_H
 
- L6BLKRST
 
- L7
 
- L7BLKRST
 
- L8_8
 
- LA501
 
- LABEL
 
- LABEL_INITIALIZED
 
- LABEL_INVALID
 
- LABEL_JF
 
- LABEL_JT
 
- LABEL_MEDIATES
 
- LABEL_NOT_SPECIFIED
 
- LABEL_PENDING
 
- LABEL_POISON
 
- LABEL_SECINFO
 
- LABEL_SIZE
 
- LABI_ADDR_IN_BOOTLOADER
 
- LABI_SIGNATURE
 
- LABLE_ALIGN
 
- LABPC_ISADMA_BUFFER_SIZE
 
- LACDRC
 
- LACDRC_ACDSLT
 
- LACDRC_ACD_MASK
 
- LACDRC_ACD_SHIFT
 
- LACDRC_ADDR
 
- LACFG0
 
- LACFG1
 
- LACFG2
 
- LACFG3
 
- LAC_PME_ENABLE
 
- LAC_SDFS_ENABLE
 
- LAD
 
- LAD0_MARK
 
- LAD1_MARK
 
- LAD2_MARK
 
- LAD3_MARK
 
- LADBGEN_F
 
- LADBGEN_S
 
- LADBGEN_V
 
- LADC_PWR_ON
 
- LADC_VOL
 
- LADDR_RETRY
 
- LADRF
 
- LADRH
 
- LADRL
 
- LADRM1
 
- LADRM2
 
- LAE
 
- LAEC
 
- LAERR
 
- LAFM_BIT
 
- LAGCN_ATTACK
 
- LAGCN_DECAY
 
- LAGC_CTRL_A
 
- LAGC_CTRL_B
 
- LAGC_CTRL_C
 
- LAG_MIN_LEVEL
 
- LAG_NUM_PRIOS
 
- LAG_PRIO_NUM_LEVELS
 
- LAH
 
- LAL
 
- LAM_64BIT
 
- LAM_PREFETCH
 
- LAN
 
- LAN0
 
- LAN743X_ADAPTER_FLAG_OTP
 
- LAN743X_COMPONENT_FLAG_RX
 
- LAN743X_CSR_FLAG_IS_A0
 
- LAN743X_CSR_FLAG_IS_B0
 
- LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR
 
- LAN743X_CSR_READ_OP
 
- LAN743X_EEPROM_MAGIC
 
- LAN743X_INT_MOD
 
- LAN743X_MAX_FRAME_SIZE
 
- LAN743X_MAX_RX_CHANNELS
 
- LAN743X_MAX_TX_CHANNELS
 
- LAN743X_MAX_VECTOR_COUNT
 
- LAN743X_NUMBER_OF_GPIO
 
- LAN743X_OTP_MAGIC
 
- LAN743X_PTP_MAX_FINE_ADJ_IN_SCALED_PPM
 
- LAN743X_PTP_MAX_FREQ_ADJ_IN_PPB
 
- LAN743X_PTP_NUMBER_OF_EVENT_CHANNELS
 
- LAN743X_PTP_NUMBER_OF_TX_TIMESTAMPS
 
- LAN743X_RX_RING_SIZE
 
- LAN743X_TX_RING_SIZE
 
- LAN743X_USED_RX_CHANNELS
 
- LAN743X_USED_TX_CHANNELS
 
- LAN743X_VECTOR_FLAG_IRQ_SHARED
 
- LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR
 
- LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET
 
- LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR
 
- LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET
 
- LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK
 
- LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR
 
- LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C
 
- LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR
 
- LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C
 
- LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ
 
- LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C
 
- LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR
 
- LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET
 
- LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR
 
- LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET
 
- LAN75XX_EEPROM_MAGIC
 
- LAN7800_USB_PRODUCT_ID
 
- LAN7801_USB_PRODUCT_ID
 
- LAN7850_USB_PRODUCT_ID
 
- LAN78XX_ACTIVITY
 
- LAN78XX_AUTONEG_FAULT
 
- LAN78XX_COLLISION
 
- LAN78XX_DUPLEX_COLLISION
 
- LAN78XX_EEPROM_MAGIC
 
- LAN78XX_FORCE_LED_OFF
 
- LAN78XX_FORCE_LED_ON
 
- LAN78XX_LINK_1000_ACTIVITY
 
- LAN78XX_LINK_100_1000_ACTIVITY
 
- LAN78XX_LINK_100_ACTIVITY
 
- LAN78XX_LINK_10_1000_ACTIVITY
 
- LAN78XX_LINK_10_100_ACTIVITY
 
- LAN78XX_LINK_10_ACTIVITY
 
- LAN78XX_LINK_ACTIVITY
 
- LAN78XX_OTP_MAGIC
 
- LAN78XX_PHY_LED_MODE_SELECT
 
- LAN78XX_USB_VENDOR_ID
 
- LAN87XX_EXT_REG_CTL
 
- LAN87XX_EXT_REG_CTL_RD_CTL
 
- LAN87XX_EXT_REG_CTL_WR_CTL
 
- LAN87XX_EXT_REG_RD_DATA
 
- LAN87XX_EXT_REG_WR_DATA
 
- LAN87XX_INTERRUPT_MASK
 
- LAN87XX_INTERRUPT_SOURCE
 
- LAN87XX_MASK_LINK_DOWN
 
- LAN87XX_MASK_LINK_UP
 
- LAN88XX_EXT_MODE_CTRL
 
- LAN88XX_EXT_MODE_CTRL_AUTO_MDIX_
 
- LAN88XX_EXT_MODE_CTRL_MDIX_MASK_
 
- LAN88XX_EXT_MODE_CTRL_MDI_
 
- LAN88XX_EXT_MODE_CTRL_MDI_X_
 
- LAN88XX_EXT_PAGE_ACCESS
 
- LAN88XX_EXT_PAGE_ACCESS_TR
 
- LAN88XX_EXT_PAGE_SPACE_0
 
- LAN88XX_EXT_PAGE_SPACE_1
 
- LAN88XX_EXT_PAGE_SPACE_2
 
- LAN88XX_EXT_PAGE_TR_CR
 
- LAN88XX_EXT_PAGE_TR_HIGH_DATA
 
- LAN88XX_EXT_PAGE_TR_LOW_DATA
 
- LAN88XX_INT_MASK
 
- LAN88XX_INT_MASK_AUTONEG_DONE_
 
- LAN88XX_INT_MASK_AUTONEG_ERR_
 
- LAN88XX_INT_MASK_EXTENDED_INT_
 
- LAN88XX_INT_MASK_FALSE_CARRIER_
 
- LAN88XX_INT_MASK_FAST_LINK_FAIL_
 
- LAN88XX_INT_MASK_FDX_CHANGE_
 
- LAN88XX_INT_MASK_LINK_CHANGE_
 
- LAN88XX_INT_MASK_LINK_SPEED_DS_
 
- LAN88XX_INT_MASK_MASTER_SLAVE_DONE_
 
- LAN88XX_INT_MASK_MDINTPIN_EN_
 
- LAN88XX_INT_MASK_POE_DETECT_
 
- LAN88XX_INT_MASK_RESERVED_
 
- LAN88XX_INT_MASK_RX__ER_
 
- LAN88XX_INT_MASK_SPEED_CHANGE_
 
- LAN88XX_INT_MASK_SYMBOL_ERR_
 
- LAN88XX_INT_MASK_WOL_EVENT_
 
- LAN88XX_INT_STS
 
- LAN88XX_INT_STS_AUTONEG_DONE_
 
- LAN88XX_INT_STS_AUTONEG_ERR_
 
- LAN88XX_INT_STS_EXTENDED_INT_
 
- LAN88XX_INT_STS_FALSE_CARRIER_
 
- LAN88XX_INT_STS_FAST_LINK_FAIL_
 
- LAN88XX_INT_STS_FDX_CHANGE_
 
- LAN88XX_INT_STS_INT_ACTIVE_
 
- LAN88XX_INT_STS_LINK_CHANGE_
 
- LAN88XX_INT_STS_LINK_SPEED_DS_
 
- LAN88XX_INT_STS_MASTER_SLAVE_DONE_
 
- LAN88XX_INT_STS_POE_DETECT_
 
- LAN88XX_INT_STS_RESERVED_
 
- LAN88XX_INT_STS_RX_ER_
 
- LAN88XX_INT_STS_SPEED_CHANGE_
 
- LAN88XX_INT_STS_SYMBOL_ERR_
 
- LAN88XX_INT_STS_WOL_EVENT_
 
- LAN88XX_MMD3_CHIP_ID
 
- LAN88XX_MMD3_CHIP_REV
 
- LAN89218
 
- LAN9115
 
- LAN9115_READY
 
- LAN9116
 
- LAN9117
 
- LAN9118
 
- LAN9118_PHY_ID
 
- LAN911X_INTERNAL_PHY_ID
 
- LAN9210
 
- LAN9211
 
- LAN9215
 
- LAN9216
 
- LAN9217
 
- LAN9217_BASE_ADDR
 
- LAN9218
 
- LAN9220
 
- LAN9221
 
- LAN9250
 
- LAN9303_ALR_CMD_GET_FIRST
 
- LAN9303_ALR_CMD_GET_NEXT
 
- LAN9303_ALR_CMD_MAKE_ENTRY
 
- LAN9303_ALR_DAT1_AGE_OVERRID
 
- LAN9303_ALR_DAT1_END_OF_TABL
 
- LAN9303_ALR_DAT1_PORT_BITOFFS
 
- LAN9303_ALR_DAT1_PORT_MASK
 
- LAN9303_ALR_DAT1_STATIC
 
- LAN9303_ALR_DAT1_VALID
 
- LAN9303_BM_CFG
 
- LAN9303_BM_EGRSS_PORT_TYPE
 
- LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT0
 
- LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT1
 
- LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT2
 
- LAN9303_CHIP_ID
 
- LAN9303_CHIP_REV
 
- LAN9303_HW_CFG
 
- LAN9303_HW_CFG_AMDX_EN_PORT1
 
- LAN9303_HW_CFG_AMDX_EN_PORT2
 
- LAN9303_HW_CFG_READY
 
- LAN9303_INT_EN
 
- LAN9303_INT_EN_PHY_INT1_EN
 
- LAN9303_INT_EN_PHY_INT2_EN
 
- LAN9303_INT_STS
 
- LAN9303_INT_STS_PHY_INT1
 
- LAN9303_INT_STS_PHY_INT2
 
- LAN9303_IRQ_CFG
 
- LAN9303_IRQ_CFG_IRQ_ENABLE
 
- LAN9303_IRQ_CFG_IRQ_POL
 
- LAN9303_IRQ_CFG_IRQ_TYPE
 
- LAN9303_MAC_RX_1023_CNT_0
 
- LAN9303_MAC_RX_127_CNT_0
 
- LAN9303_MAC_RX_255_CNT_0
 
- LAN9303_MAC_RX_511_CNT_0
 
- LAN9303_MAC_RX_64_CNT_0
 
- LAN9303_MAC_RX_ALIGN_CNT_0
 
- LAN9303_MAC_RX_BRDCST_CNT_0
 
- LAN9303_MAC_RX_CFG_0
 
- LAN9303_MAC_RX_CFG_1
 
- LAN9303_MAC_RX_CFG_2
 
- LAN9303_MAC_RX_CFG_X_REJECT_MAC_TYPES
 
- LAN9303_MAC_RX_CFG_X_RX_ENABLE
 
- LAN9303_MAC_RX_CRCERR_CNT_0
 
- LAN9303_MAC_RX_CTLFRM_CNT_0
 
- LAN9303_MAC_RX_FRAG_CNT_0
 
- LAN9303_MAC_RX_GOODPKTLEN_CNT_0
 
- LAN9303_MAC_RX_JABB_CNT_0
 
- LAN9303_MAC_RX_MAX_CNT_0
 
- LAN9303_MAC_RX_MULCST_CNT_0
 
- LAN9303_MAC_RX_OVRSZE_CNT_0
 
- LAN9303_MAC_RX_PAUSE_CNT_0
 
- LAN9303_MAC_RX_PKTLEN_CNT_0
 
- LAN9303_MAC_RX_PKTOK_CNT_0
 
- LAN9303_MAC_RX_SYMBL_CNT_0
 
- LAN9303_MAC_RX_UNDSZE_CNT_0
 
- LAN9303_MAC_TX_1023_CNT_0
 
- LAN9303_MAC_TX_127_CNT_0
 
- LAN9303_MAC_TX_255_CNT_0
 
- LAN9303_MAC_TX_511_CNT_0
 
- LAN9303_MAC_TX_64_CNT_0
 
- LAN9303_MAC_TX_BRDCST_CNT_0
 
- LAN9303_MAC_TX_CFG_0
 
- LAN9303_MAC_TX_CFG_1
 
- LAN9303_MAC_TX_CFG_2
 
- LAN9303_MAC_TX_CFG_X_TX_ENABLE
 
- LAN9303_MAC_TX_CFG_X_TX_IFG_CONFIG_DEFAULT
 
- LAN9303_MAC_TX_CFG_X_TX_PAD_ENABLE
 
- LAN9303_MAC_TX_DEFER_CNT_0
 
- LAN9303_MAC_TX_EXCOL_CNT_0
 
- LAN9303_MAC_TX_LATECOL_0
 
- LAN9303_MAC_TX_MAX_CNT_0
 
- LAN9303_MAC_TX_MULCST_CNT_0
 
- LAN9303_MAC_TX_MULTICOL_CNT_0
 
- LAN9303_MAC_TX_PAUSE_CNT_0
 
- LAN9303_MAC_TX_PKTLEN_CNT_0
 
- LAN9303_MAC_TX_PKTOK_CNT_0
 
- LAN9303_MAC_TX_SNGLECOL_CNT_0
 
- LAN9303_MAC_TX_TOTALCOL_CNT_0
 
- LAN9303_MAC_TX_UNDSZE_CNT_0
 
- LAN9303_MAC_VER_ID_0
 
- LAN9303_MAC_VER_ID_1
 
- LAN9303_MAC_VER_ID_2
 
- LAN9303_MANUAL_FC_0
 
- LAN9303_MANUAL_FC_1
 
- LAN9303_MANUAL_FC_2
 
- LAN9303_NUM_ALR_RECORDS
 
- LAN9303_NUM_PORTS
 
- LAN9303_PMI_ACCESS
 
- LAN9303_PMI_ACCESS_MIIRINDA
 
- LAN9303_PMI_ACCESS_MII_BUSY
 
- LAN9303_PMI_ACCESS_MII_WRITE
 
- LAN9303_PMI_ACCESS_PHY_ADDR
 
- LAN9303_PMI_DATA
 
- LAN9303_SWE_ALR_CMD
 
- LAN9303_SWE_ALR_CMD_STS
 
- LAN9303_SWE_ALR_RD_DAT_0
 
- LAN9303_SWE_ALR_RD_DAT_1
 
- LAN9303_SWE_ALR_WR_DAT_0
 
- LAN9303_SWE_ALR_WR_DAT_1
 
- LAN9303_SWE_GLB_INGRESS_CFG
 
- LAN9303_SWE_GLB_INGR_IGMP_PORT
 
- LAN9303_SWE_GLB_INGR_IGMP_TRAP
 
- LAN9303_SWE_INGRESS_PORT_TYPE
 
- LAN9303_SWE_INGRESS_PORT_TYPE_VLAN
 
- LAN9303_SWE_PORT_MIRROR
 
- LAN9303_SWE_PORT_MIRROR_DISABLED
 
- LAN9303_SWE_PORT_MIRROR_ENABLE_RX_MIRRORING
 
- LAN9303_SWE_PORT_MIRROR_ENABLE_TX_MIRRORING
 
- LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT0
 
- LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT1
 
- LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT2
 
- LAN9303_SWE_PORT_MIRROR_SNIFFER_PORT0
 
- LAN9303_SWE_PORT_MIRROR_SNIFFER_PORT1
 
- LAN9303_SWE_PORT_MIRROR_SNIFFER_PORT2
 
- LAN9303_SWE_PORT_MIRROR_SNIFF_ALL
 
- LAN9303_SWE_PORT_STATE
 
- LAN9303_SWE_PORT_STATE_BLOCKING_PORT0
 
- LAN9303_SWE_PORT_STATE_BLOCKING_PORT1
 
- LAN9303_SWE_PORT_STATE_BLOCKING_PORT2
 
- LAN9303_SWE_PORT_STATE_DISABLED_PORT0
 
- LAN9303_SWE_PORT_STATE_FORWARDING_PORT0
 
- LAN9303_SWE_PORT_STATE_FORWARDING_PORT1
 
- LAN9303_SWE_PORT_STATE_FORWARDING_PORT2
 
- LAN9303_SWE_PORT_STATE_LEARNING_PORT0
 
- LAN9303_SWE_PORT_STATE_LEARNING_PORT1
 
- LAN9303_SWE_PORT_STATE_LEARNING_PORT2
 
- LAN9303_SWE_VLAN_CMD
 
- LAN9303_SWE_VLAN_CMD_PVIDNVLAN
 
- LAN9303_SWE_VLAN_CMD_RNW
 
- LAN9303_SWE_VLAN_CMD_STS
 
- LAN9303_SWE_VLAN_MEMBER_PORT0
 
- LAN9303_SWE_VLAN_MEMBER_PORT1
 
- LAN9303_SWE_VLAN_MEMBER_PORT2
 
- LAN9303_SWE_VLAN_RD_DATA
 
- LAN9303_SWE_VLAN_UNTAG_PORT0
 
- LAN9303_SWE_VLAN_UNTAG_PORT1
 
- LAN9303_SWE_VLAN_UNTAG_PORT2
 
- LAN9303_SWE_VLAN_WR_DATA
 
- LAN9303_SWITCH_CSR_CMD
 
- LAN9303_SWITCH_CSR_CMD_BUSY
 
- LAN9303_SWITCH_CSR_CMD_LANES
 
- LAN9303_SWITCH_CSR_CMD_RW
 
- LAN9303_SWITCH_CSR_DATA
 
- LAN9303_SWITCH_PORT_REG
 
- LAN9303_SW_DEV_ID
 
- LAN9303_SW_IMR
 
- LAN9303_SW_IPR
 
- LAN9303_SW_RESET
 
- LAN9303_SW_RESET_RESET
 
- LAN9303_TAG_LEN
 
- LAN9303_TAG_RX_IGMP
 
- LAN9303_TAG_RX_STP
 
- LAN9303_TAG_RX_TRAPPED_TO_CPU
 
- LAN9303_TAG_TX_STP_OVERRIDE
 
- LAN9303_TAG_TX_USE_ALR
 
- LAN9303_VIRT_PHY_BASE
 
- LAN9303_VIRT_SPECIAL_CTRL
 
- LAN9303_VIRT_SPECIAL_TURBO
 
- LAN9420_CPSR_ENDIAN_OFFSET
 
- LAN9500A_WUFF_NUM
 
- LAN9500_WUFF_NUM
 
- LAN95XX_EEPROM_MAGIC
 
- LANAI_EEPROM_SIZE
 
- LANAI_MAPPING_SIZE
 
- LANAI_PAGE_SIZE
 
- LANAI_POLL_PERIOD
 
- LANAME
 
- LANCER_DELETE_FW_DUMP
 
- LANCER_FW_DOWNLOAD_CHUNK
 
- LANCER_FW_DOWNLOAD_LOCATION
 
- LANCER_FW_DUMP_FILE
 
- LANCER_FW_RESET_NEEDED
 
- LANCER_INITIATE_FW_DUMP
 
- LANCER_NO_RESET_NEEDED
 
- LANCER_READ_FILE_CHUNK
 
- LANCER_READ_FILE_EOF_MASK
 
- LANCER_TX_COMP_DMA_ERR
 
- LANCER_TX_COMP_HSW_DROP_MAC_ERR
 
- LANCER_TX_COMP_HSW_DROP_VLAN_ERR
 
- LANCER_TX_COMP_LSO_ERR
 
- LANCER_TX_COMP_PARITY_ERR
 
- LANCER_TX_COMP_QINQ_ERR
 
- LANCER_TX_COMP_SGE_ERR
 
- LANCER_VPD_PF_FILE
 
- LANCER_VPD_VF_FILE
 
- LANCE_ADDR
 
- LANCE_BUS_IF
 
- LANCE_DATA
 
- LANCE_DEBUG
 
- LANCE_DEBUG_PROBE
 
- LANCE_ENABLE_AUTOSELECT
 
- LANCE_HAS_MISSED_FRAME
 
- LANCE_IRQ
 
- LANCE_LOG_RX_BUFFERS
 
- LANCE_LOG_TX_BUFFERS
 
- LANCE_MUST_PAD
 
- LANCE_MUST_REINIT_RING
 
- LANCE_MUST_UNRESET
 
- LANCE_OBIO
 
- LANCE_RAP
 
- LANCE_RDP
 
- LANCE_REG_SIZE
 
- LANCE_RESET
 
- LANCE_TOTAL_SIZE
 
- LANCE_UNKNOWN
 
- LANE0_MAP_LOGIC_LANE_0
 
- LANE0_MAP_LOGIC_LANE_1
 
- LANE0_MAP_LOGIC_LANE_2
 
- LANE0_MAP_LOGIC_LANE_3
 
- LANE0_PWR_PRESENT
 
- LANE0_TX_DEBUG_RXDET_MEAS_TIME_19M2_20M
 
- LANE0_TX_DEBUG_RXDET_MEAS_TIME_24M
 
- LANE0_TX_DEBUG_RXDET_MEAS_TIME_25M_26M
 
- LANE0_TX_DEBUG_RXDET_MEAS_TIME_48M_50M_52M
 
- LANE0_TX_DEBUG_RXDET_MEAS_TIME_62M5
 
- LANE0_TX_DEBUG_RXDET_MEAS_TIME_96M_100M
 
- LANE1_MAP_LOGIC_LANE_0
 
- LANE1_MAP_LOGIC_LANE_1
 
- LANE1_MAP_LOGIC_LANE_2
 
- LANE1_MAP_LOGIC_LANE_3
 
- LANE2_MAP_LOGIC_LANE_0
 
- LANE2_MAP_LOGIC_LANE_1
 
- LANE2_MAP_LOGIC_LANE_2
 
- LANE2_MAP_LOGIC_LANE_3
 
- LANE3_MAP_LOGIC_LANE_0
 
- LANE3_MAP_LOGIC_LANE_1
 
- LANE3_MAP_LOGIC_LANE_2
 
- LANE3_MAP_LOGIC_LANE_3
 
- LANEENABLE_CLEN
 
- LANEENABLE_L0EN
 
- LANEENABLE_L1EN
 
- LANEENABLE_L2EN
 
- LANEENABLE_L3EN
 
- LANESEL
 
- LANESTAGGER_STRAP_OVRD
 
- LANE_BUNDLE_MASK
 
- LANE_BUNDLE_SHIFT
 
- LANE_CNT_MSK
 
- LANE_CNT_SHIFT
 
- LANE_CONFIGURATION_4LANE
 
- LANE_CONFIGURATION_DUAL_LINK_A
 
- LANE_CONFIGURATION_DUAL_LINK_B
 
- LANE_CONFIGURATION_MASK
 
- LANE_CONFIGURATION_SHIFT
 
- LANE_COUNT1
 
- LANE_COUNT2
 
- LANE_COUNT4
 
- LANE_COUNT_1
 
- LANE_COUNT_2
 
- LANE_COUNT_4
 
- LANE_COUNT_8
 
- LANE_COUNT_DP_MAX
 
- LANE_COUNT_EIGHT
 
- LANE_COUNT_FOUR
 
- LANE_COUNT_ONE
 
- LANE_COUNT_TWO
 
- LANE_COUNT_UNKNOWN
 
- LANE_DELAY_MASK
 
- LANE_DELAY_SHIFT
 
- LANE_MAPPING_FLIPPED
 
- LANE_MAPPING_NORMAL
 
- LANE_MASK
 
- LANE_MAX_KBPS
 
- LANE_MIN_KBPS
 
- LANE_MODE
 
- LANE_NUM
 
- LANE_PCIE0_LANE0
 
- LANE_PCIE0_LANE1
 
- LANE_PCIE1_LANE0
 
- LANE_PLL_ENABLE
 
- LANE_PLL_MASK
 
- LANE_PLL_PIPE
 
- LANE_POS
 
- LANE_REF_CYC
 
- LANE_STAGGER_MASK
 
- LANE_STATE_IDLE
 
- LANE_STATE_READ
 
- LANE_STATE_START
 
- LANE_STATE_ULPM
 
- LANE_STATE_WRITE
 
- LANE_SWAP_0123
 
- LANE_SWAP_0321
 
- LANE_SWAP_1032
 
- LANE_SWAP_1230
 
- LANE_SWAP_2103
 
- LANE_SWAP_2301
 
- LANE_SWAP_3012
 
- LANE_SWAP_3210
 
- LANE_USB3
 
- LANG
 
- LANMAN
 
- LANMAN2_PROT
 
- LANMAN_NEG_RSP
 
- LANMAN_PROT
 
- LANPage0_t
 
- LANPage1_t
 
- LANReceivePostReply_t
 
- LANReceivePostRequest_t
 
- LANResetReply_t
 
- LANResetRequest_t
 
- LANSendReply_t
 
- LANSendRequest_t
 
- LANTIQ_PCIE_PHY_MODE_100MHZ
 
- LANTIQ_PCIE_PHY_MODE_100MHZ_SSC
 
- LANTIQ_PCIE_PHY_MODE_25MHZ
 
- LANTIQ_PCIE_PHY_MODE_25MHZ_SSC
 
- LANTIQ_PCIE_PHY_MODE_36MHZ
 
- LANTIQ_PCIE_PHY_MODE_36MHZ_SSC
 
- LANTIQ_RCU_RESET_TIMEOUT
 
- LANVER
 
- LANWAKE_CLR_EN
 
- LANWAKE_PIN
 
- LANWake
 
- LAN_CTRL
 
- LAN_IRQ
 
- LAN_MAC_IDX
 
- LAN_PROM_ADDR
 
- LAN_REGISTER_EXTENT
 
- LAN_REPLY_BUCKET_CONTEXT_MASK
 
- LAN_REPLY_BUCKET_CONTEXT_SHIFT
 
- LAN_REPLY_BUFFER_CONTEXT_MASK
 
- LAN_REPLY_BUFFER_CONTEXT_SHIFT
 
- LAN_REPLY_FORM_MASK
 
- LAN_REPLY_FORM_MESSAGE_CONTEXT
 
- LAN_REPLY_FORM_RECEIVE_MULTIPLE
 
- LAN_REPLY_FORM_RECEIVE_SINGLE
 
- LAN_REPLY_FORM_SEND_SINGLE
 
- LAN_REPLY_FORM_SHIFT
 
- LAN_REPLY_PACKET_LENGTH_MASK
 
- LAN_REPLY_PACKET_LENGTH_SHIFT
 
- LAN_TX
 
- LAN_WAKE_EN
 
- LAPB_ACK_PENDING_CONDITION
 
- LAPB_ADDR_A
 
- LAPB_ADDR_B
 
- LAPB_ADDR_C
 
- LAPB_ADDR_D
 
- LAPB_BADTOKEN
 
- LAPB_COMMAND
 
- LAPB_CONNECTED
 
- LAPB_DCE
 
- LAPB_DEBUG
 
- LAPB_DEFAULT_MODE
 
- LAPB_DEFAULT_N2
 
- LAPB_DEFAULT_T1
 
- LAPB_DEFAULT_T2
 
- LAPB_DEFAULT_WINDOW
 
- LAPB_DISC
 
- LAPB_DM
 
- LAPB_DTE
 
- LAPB_EMODULUS
 
- LAPB_EPF
 
- LAPB_EXTENDED
 
- LAPB_FRMR
 
- LAPB_FRMR_W
 
- LAPB_FRMR_X
 
- LAPB_FRMR_Y
 
- LAPB_FRMR_Z
 
- LAPB_HEADER_LEN
 
- LAPB_I
 
- LAPB_ILLEGAL
 
- LAPB_INVALUE
 
- LAPB_KERNEL_H
 
- LAPB_MLP
 
- LAPB_NOMEM
 
- LAPB_NOTCONNECTED
 
- LAPB_OK
 
- LAPB_PEER_RX_BUSY_CONDITION
 
- LAPB_POLLOFF
 
- LAPB_POLLON
 
- LAPB_REFUSED
 
- LAPB_REJ
 
- LAPB_REJECT_CONDITION
 
- LAPB_RESPONSE
 
- LAPB_RNR
 
- LAPB_RR
 
- LAPB_S
 
- LAPB_SABM
 
- LAPB_SABME
 
- LAPB_SLP
 
- LAPB_SMODULUS
 
- LAPB_SPF
 
- LAPB_STANDARD
 
- LAPB_STATE_0
 
- LAPB_STATE_1
 
- LAPB_STATE_2
 
- LAPB_STATE_3
 
- LAPB_STATE_4
 
- LAPB_TIMEDOUT
 
- LAPB_U
 
- LAPB_UA
 
- LAPIC_CAL_LOOPS
 
- LAPIC_MMIO_LENGTH
 
- LAPIC_MODE_DISABLED
 
- LAPIC_MODE_INVALID
 
- LAPIC_MODE_X2APIC
 
- LAPIC_MODE_XAPIC
 
- LAPIC_TIMER_ADVANCE_ADJUST_MAX
 
- LAPIC_TIMER_ADVANCE_ADJUST_MIN
 
- LAPIC_TIMER_ADVANCE_ADJUST_STEP
 
- LAPIC_TIMER_ADVANCE_NS_INIT
 
- LAPIC_TIMER_ADVANCE_NS_MAX
 
- LAPIC_TIMER_ALWAYS_RELIABLE
 
- LAP_GETSTAT
 
- LAP_INIT
 
- LAP_INIT_RSP
 
- LAP_RESPONSE
 
- LAP_RSPSTAT
 
- LAP_WRITE
 
- LARB0_PORT_OFFSET
 
- LARB1_PORT_OFFSET
 
- LARB2_PORT_OFFSET
 
- LARB3_PORT_OFFSET
 
- LARGE
 
- LARGE_BLK_CNT
 
- LARGE_BUFFER_MAX_SIZE
 
- LARGE_BUFFER_MIN_SIZE
 
- LARGE_BUFFER_SIZE
 
- LARGE_FONT
 
- LARGE_GAP
 
- LARGE_INDEX
 
- LARGE_INTEGER
 
- LARGE_ITERATIONS
 
- LARGE_KEY_SIZE
 
- LARGE_MAX_OFFSET
 
- LARGE_PAGE_SIZE_16M
 
- LARGE_PAGE_SIZE_4M
 
- LARGE_PAGE_SIZE_8M
 
- LARGE_PEBS_FLAGS
 
- LARGE_PKT_DROP_THRESH
 
- LARGE_PKT_DROP_THRESH_NS
 
- LARGE_PKT_THRESH
 
- LARGE_SIZE
 
- LARGE_SIZE_START
 
- LARGE_TAG
 
- LARGE_TAG_ANSISTR
 
- LARGE_TAG_FIXEDMEM32
 
- LARGE_TAG_MEM
 
- LARGE_TAG_MEM32
 
- LARGE_TAG_UNICODESTR
 
- LARGE_TAG_VENDOR
 
- LARROW_CHAR
 
- LARSENBRUSGAARD_VID
 
- LARX
 
- LAR_ENABLE
 
- LAS0_8254_CLK_SEL
 
- LAS0_8254_GATE_SEL
 
- LAS0_8254_TIMER_BASE
 
- LAS0_ACNT
 
- LAS0_ACNT_STOP_ENABLE
 
- LAS0_ADC
 
- LAS0_ADC_CONVERSION
 
- LAS0_ADC_FIFO_CLEAR
 
- LAS0_ADC_SCNT
 
- LAS0_ADC_SCNT_SRC
 
- LAS0_BCLK
 
- LAS0_BOARD_RESET
 
- LAS0_BURST_START
 
- LAS0_CGL_WRITE
 
- LAS0_CGT_CLEAR
 
- LAS0_CGT_ENABLE
 
- LAS0_CGT_PAUSE
 
- LAS0_CGT_RESET
 
- LAS0_CGT_WRITE
 
- LAS0_CG_DATA
 
- LAS0_CG_ENABLE
 
- LAS0_CLEAR
 
- LAS0_DAC
 
- LAS0_DAC1_UCNT
 
- LAS0_DAC2_UCNT
 
- LAS0_DAC_CLK
 
- LAS0_DAC_CTRL
 
- LAS0_DAC_CYCLE
 
- LAS0_DAC_FIFO_CLEAR
 
- LAS0_DAC_RESET
 
- LAS0_DAC_SRC
 
- LAS0_DCNT
 
- LAS0_DIN_FIFO_CLEAR
 
- LAS0_DIN_START
 
- LAS0_DIO0
 
- LAS0_DIO0_CTRL
 
- LAS0_DIO1
 
- LAS0_DIO_STATUS
 
- LAS0_DMA0_RESET
 
- LAS0_DMA0_SRC
 
- LAS0_DMA1_RESET
 
- LAS0_DMA1_SRC
 
- LAS0_EINT_POLARITY
 
- LAS0_ETRG_POLARITY
 
- LAS0_IT
 
- LAS0_OVERRUN
 
- LAS0_PACER
 
- LAS0_PACER_REPEAT
 
- LAS0_PACER_SELECT
 
- LAS0_PACER_START
 
- LAS0_PACER_STOP
 
- LAS0_PCLK
 
- LAS0_SBUS0_ENABLE
 
- LAS0_SBUS0_SRC
 
- LAS0_SBUS1_ENABLE
 
- LAS0_SBUS1_SRC
 
- LAS0_SBUS2_ENABLE
 
- LAS0_SBUS2_SRC
 
- LAS0_TIMER
 
- LAS0_UOUT0_SELECT
 
- LAS0_UOUT1_SELECT
 
- LAS0_UPDATE_DAC
 
- LAS0_USER_IO
 
- LAS1_ADC_FIFO
 
- LAS1_DAC_FIFO
 
- LAS1_DESC
 
- LAS1_HDIO_FIFO
 
- LAS2_DESC
 
- LASATINT_MASK_SHIFT_100
 
- LASATINT_MASK_SHIFT_200
 
- LASATINT_UART_100
 
- LASATINT_UART_200
 
- LASAT_100_DIVIDER
 
- LASAT_200_DIVIDER
 
- LASAT_BASE_BAUD_100
 
- LASAT_BASE_BAUD_200
 
- LASAT_BMID_MASQUERADE2
 
- LASAT_BMID_MASQUERADEPRO
 
- LASAT_BMID_SAFEPIPE100
 
- LASAT_BMID_SAFEPIPE1000
 
- LASAT_BMID_SAFEPIPE25
 
- LASAT_BMID_SAFEPIPE30
 
- LASAT_BMID_SAFEPIPE50
 
- LASAT_BMID_SAFEPIPE5000
 
- LASAT_BMID_SAFEPIPE5100
 
- LASAT_BMID_SAFEPIPE7000
 
- LASAT_BMID_SAFEPIPE7100
 
- LASAT_BMID_UNKNOWN
 
- LASAT_CASCADE_IRQ
 
- LASAT_EDHAC_FAST
 
- LASAT_EEPROM_VERSION
 
- LASAT_GT_BASE
 
- LASAT_HAS_EADI
 
- LASAT_HAS_EDHAC
 
- LASAT_HAS_HDC
 
- LASAT_HAS_HIFN
 
- LASAT_HAS_ISDN
 
- LASAT_HAS_LEASEDLINE_IF
 
- LASAT_INT_MASK_REG_100
 
- LASAT_INT_MASK_REG_200
 
- LASAT_INT_STATUS_REG_100
 
- LASAT_INT_STATUS_REG_200
 
- LASAT_IRQ_BASE
 
- LASAT_IRQ_COMP
 
- LASAT_IRQ_END
 
- LASAT_IRQ_ETH0
 
- LASAT_IRQ_ETH1
 
- LASAT_IRQ_HDC
 
- LASAT_IRQ_HDLC
 
- LASAT_IRQ_PCIA
 
- LASAT_IRQ_PCIB
 
- LASAT_IRQ_PCIC
 
- LASAT_IRQ_PCID
 
- LASAT_K_MAGIC0_VAL
 
- LASAT_K_MAGIC1_VAL
 
- LASAT_MAX_BMID_NAMES
 
- LASAT_MTD_BOOTLOADER
 
- LASAT_MTD_CONFIG
 
- LASAT_MTD_FS
 
- LASAT_MTD_LAST
 
- LASAT_MTD_NORMAL
 
- LASAT_MTD_SERVICE
 
- LASAT_PRID_MASQUERADE2
 
- LASAT_PRID_MASQUERADEPRO
 
- LASAT_PRID_SAFEPIPE100
 
- LASAT_PRID_SAFEPIPE1020
 
- LASAT_PRID_SAFEPIPE1040
 
- LASAT_PRID_SAFEPIPE1060
 
- LASAT_PRID_SAFEPIPE1110
 
- LASAT_PRID_SAFEPIPE1120
 
- LASAT_PRID_SAFEPIPE1130
 
- LASAT_PRID_SAFEPIPE25
 
- LASAT_PRID_SAFEPIPE30
 
- LASAT_PRID_SAFEPIPE3020
 
- LASAT_PRID_SAFEPIPE3030
 
- LASAT_PRID_SAFEPIPE50
 
- LASAT_PRID_SAFEPIPE5000
 
- LASAT_PRID_SAFEPIPE5020
 
- LASAT_PRID_SAFEPIPE5030
 
- LASAT_PRID_SAFEPIPE5100
 
- LASAT_PRID_SAFEPIPE6010
 
- LASAT_PRID_SAFEPIPE6110
 
- LASAT_PRID_SAFEPIPE6210
 
- LASAT_PRID_SAFEPIPE7000
 
- LASAT_PRID_SAFEPIPE7100
 
- LASAT_SERVICEMODE_MAGIC_1
 
- LASAT_SERVICEMODE_MAGIC_2
 
- LASAT_UART_REGS_BASE_100
 
- LASAT_UART_REGS_BASE_200
 
- LASAT_UART_REGS_SHIFT_100
 
- LASAT_UART_REGS_SHIFT_200
 
- LASAT_W0_BMID
 
- LASAT_W0_BUSSPEED
 
- LASAT_W0_CPUCLK
 
- LASAT_W0_CPUTYPE
 
- LASAT_W0_DSCTYPE
 
- LASAT_W0_L2CACHE
 
- LASAT_W0_SDRAMBANKS
 
- LASAT_W0_SDRAMBANKSZ
 
- LASAT_W1_4MACS
 
- LASAT_W1_EDHAC
 
- LASAT_W1_EXTSERIAL
 
- LASAT_W1_FLASHSIZE
 
- LASAT_W1_HDLC
 
- LASAT_W1_HIFN
 
- LASAT_W1_IDE
 
- LASAT_W1_ISDN
 
- LASAT_W1_PCI1OPT
 
- LASAT_W1_PCI2OPT
 
- LASAT_W1_PCI3OPT
 
- LASAT_W1_PCISLOTS
 
- LASAT_W1_USVERSION
 
- LASER_OFF_2031
 
- LASER_ON_2031
 
- LASI700_CLOCK
 
- LASI700_ID_TABLE
 
- LASI710_CLOCK
 
- LASI710_ID_TABLE
 
- LASI_700_SVERSION
 
- LASI_710_SVERSION
 
- LASI_82596_DRIVER_VERSION
 
- LASI_IO_CONF
 
- LASI_IO_CONF2
 
- LASI_SCSI_CORE_OFFSET
 
- LASI_VER
 
- LAST
 
- LASTADDR
 
- LASTLITERALS
 
- LASTREC_DELREC
 
- LASTREC_INSREC
 
- LASTREC_UPDATE
 
- LASTSTATE
 
- LAST_2GHZ_HT_PLUS
 
- LAST_5G_CHAN
 
- LAST_ACTIVE_LINE
 
- LAST_ADDR_INVALID
 
- LAST_ADD_TIME_CHECK
 
- LAST_ADD_TIME_INVALID
 
- LAST_ADD_TIME_UPDATE
 
- LAST_BIND
 
- LAST_BSS_FILTER
 
- LAST_BUFFER
 
- LAST_BYTE
 
- LAST_CCM_SHIFT
 
- LAST_CCM_XFR
 
- LAST_CHIP
 
- LAST_CLASS
 
- LAST_COMPUTE_VMID
 
- LAST_CONTEXT
 
- LAST_COUNTERS_FIELD
 
- LAST_CPUPID_MASK
 
- LAST_CPUPID_NOT_IN_PAGE_FLAGS
 
- LAST_CPUPID_PGOFF
 
- LAST_CPUPID_PGSHIFT
 
- LAST_CPUPID_SHIFT
 
- LAST_CPUPID_WIDTH
 
- LAST_CTX
 
- LAST_CTX_MASK
 
- LAST_CTX_TO_EP_NUM
 
- LAST_DBG_MID_ID
 
- LAST_DESCRIPTOR
 
- LAST_DIS_ENBL
 
- LAST_DOT
 
- LAST_DOTDOT
 
- LAST_DROP_FIELD
 
- LAST_DT_CORE_CLK
 
- LAST_ENTRY_OF_TX_PKT_BUFFER
 
- LAST_ENTRY_OF_TX_PKT_BUFFER_8188E
 
- LAST_ENTRY_OF_TX_PKT_BUFFER_8192C
 
- LAST_ENTRY_OF_TX_PKT_BUFFER_8723B
 
- LAST_ENTRY_OF_TX_PKT_BUFFER_8812
 
- LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC
 
- LAST_EP_INDEX
 
- LAST_ETH_FIELD
 
- LAST_EXIT_REASON
 
- LAST_FLOW_TAG_FIELD
 
- LAST_FRAG
 
- LAST_FRAGMENT
 
- LAST_FULL_CHARGE_CAPACITY
 
- LAST_GBE
 
- LAST_GLE
 
- LAST_HIGH_5G_CHAN
 
- LAST_IB_FIELD
 
- LAST_INO_BATCH
 
- LAST_IO
 
- LAST_IPV4_FIELD
 
- LAST_IPV6_FIELD
 
- LAST_IRQ
 
- LAST_KONA_CLK
 
- LAST_LOCAL_LOOP_ID
 
- LAST_LOCAL_STATE_COMPLETE
 
- LAST_LOW_5G_CHAN
 
- LAST_LUN_MODE
 
- LAST_MAGIC
 
- LAST_MASK
 
- LAST_MID_5G_CHAN
 
- LAST_NFS40_OP
 
- LAST_NFS41_OP
 
- LAST_NFS42_OP
 
- LAST_NFS4_OP
 
- LAST_NODE
 
- LAST_NORM
 
- LAST_NWRITE_R
 
- LAST_OPERAND
 
- LAST_PACKET
 
- LAST_PAGE
 
- LAST_PBE
 
- LAST_PKMAP
 
- LAST_PKMAP_MASK
 
- LAST_PLE
 
- LAST_POWER_EVENT
 
- LAST_PUMP
 
- LAST_RECORD_TYPE
 
- LAST_REF5_CHANNUM
 
- LAST_REG
 
- LAST_REGISTER
 
- LAST_REMOTE_STATE_COMPLETE
 
- LAST_RESERVED_PORT
 
- LAST_ROOT
 
- LAST_SCAN
 
- LAST_SEGMENT
 
- LAST_STATE_REACHED
 
- LAST_TCP_UDP_FIELD
 
- LAST_TEMP_0
 
- LAST_TEMP_1
 
- LAST_TEMP_10
 
- LAST_TEMP_11
 
- LAST_TEMP_12
 
- LAST_TEMP_13
 
- LAST_TEMP_14
 
- LAST_TEMP_15
 
- LAST_TEMP_2
 
- LAST_TEMP_3
 
- LAST_TEMP_4
 
- LAST_TEMP_5
 
- LAST_TEMP_6
 
- LAST_TEMP_7
 
- LAST_TEMP_8
 
- LAST_TEMP_9
 
- LAST_TO_FIRST
 
- LAST_TUNNEL_FIELD
 
- LAST_USER_MM_IBPB
 
- LAST_VM86_IRQ
 
- LAST_VOLATILE
 
- LAST_ZONE
 
- LAST__CPU_MASK
 
- LAST__CPU_SHIFT
 
- LAST__PID_MASK
 
- LAST__PID_SHIFT
 
- LAS_BIT_BIGENDIAN
 
- LAT1_MAP
 
- LATCH
 
- LATCH1_LABEL
 
- LATCH1_NGPIO
 
- LATCH1_PHYS
 
- LATCH1_PIN_DOCKIT1
 
- LATCH1_PIN_DOCKIT2
 
- LATCH1_PIN_LED_ADVERT
 
- LATCH1_PIN_LED_CAMERA
 
- LATCH1_PIN_LED_HANDSFREE
 
- LATCH1_PIN_LED_MAIL
 
- LATCH1_PIN_LED_VOICE
 
- LATCH1_PIN_LED_VOICEMAIL
 
- LATCH1_VIRT
 
- LATCH2_LABEL
 
- LATCH2_NGPIO
 
- LATCH2_PHYS
 
- LATCH2_PIN_HANDSET_MUTE
 
- LATCH2_PIN_HANDSFREE_MUTE
 
- LATCH2_PIN_KEYBRD_DATAOUT
 
- LATCH2_PIN_KEYBRD_PWR
 
- LATCH2_PIN_LCD_NDISP
 
- LATCH2_PIN_LCD_VBLEN
 
- LATCH2_PIN_MODEM_CODEC
 
- LATCH2_PIN_MODEM_NRESET
 
- LATCH2_PIN_NAND_ALE
 
- LATCH2_PIN_NAND_CLE
 
- LATCH2_PIN_NAND_NCE
 
- LATCH2_PIN_NAND_NRE
 
- LATCH2_PIN_NAND_NWE
 
- LATCH2_PIN_NAND_NWP
 
- LATCH2_PIN_SCARD_CMDVCC
 
- LATCH2_PIN_SCARD_RSTIN
 
- LATCH2_VIRT
 
- LATCHCR_OFS
 
- LATCHED_ATTN_RBCN
 
- LATCHED_ATTN_RBCP
 
- LATCHED_ATTN_RBCR
 
- LATCHED_ATTN_RBCT
 
- LATCHED_ATTN_RBCU
 
- LATCHED_ATTN_ROM_PARITY_MCP
 
- LATCHED_ATTN_RSVD_GRC
 
- LATCHED_ATTN_SCPAD_PARITY_MCP
 
- LATCHED_ATTN_TIMEOUT_GRC
 
- LATCHED_ATTN_UM_RX_PARITY_MCP
 
- LATCHED_ATTN_UM_TX_PARITY_MCP
 
- LATCHED_BUS_FREE
 
- LATCHED_CD
 
- LATCHED_IO
 
- LATCHED_MSG
 
- LATCLAR_OFS
 
- LATCLLDR_OFS
 
- LATCLUDR_OFS
 
- LATCUAR_OFS
 
- LATEACK_DELAY
 
- LATECOL
 
- LATENCY
 
- LATENCY_BUCKET_SIZE
 
- LATENCY_CTL_MODE_ENABLE
 
- LATENCY_EVENT
 
- LATENCY_FILTERED_HD
 
- LATENCY_FILTERED_SSD
 
- LATENCY_HIGH_WATERMARK
 
- LATENCY_LIMIT
 
- LATENCY_LOW_WATERMARK
 
- LATENCY_MULTIPLIER
 
- LATENCY_OPTIM
 
- LATENCY_OPTIM_MASK
 
- LATENCY_OPTIM_SHIFT
 
- LATENCY_OPTIM_VAL
 
- LATENCY_TYPE_LEN
 
- LATENCY_WATERMARK_MASK
 
- LATENCY__LATENCY_TIMER_MASK
 
- LATENCY__LATENCY_TIMER__MASK
 
- LATENCY__LATENCY_TIMER__SHIFT
 
- LATENT
 
- LATENT_CHANGE
 
- LATE_COL
 
- LATE_Z
 
- LATTER_FETCH_MODE
 
- LATTER_ISOC_CHANNELS
 
- LATTER_ISOC_START
 
- LATTER_STF
 
- LATTER_SYNC_STATUS
 
- LATTIME
 
- LATTIMEREG
 
- LAT_16X
 
- LAT_EXCEEDED
 
- LAT_OK
 
- LAT_REG
 
- LAT_TIMER
 
- LAT_UNKNOWN
 
- LAT_UNKNOWN_WRITES
 
- LAUNCHPERIOD
 
- LAUNCH_2D
 
- LAUNCH_A0
 
- LAUNCH_ADDR
 
- LAUNCH_BITBLT
 
- LAUNCH_FGO
 
- LAUNCH_FGONE
 
- LAUNCH_FLAGS
 
- LAUNCH_FLASH
 
- LAUNCH_FREADY
 
- LAUNCH_GP
 
- LAUNCH_LOOP
 
- LAUNCH_MAGIC
 
- LAUNCH_OFFSET
 
- LAUNCH_OFF_BEVECC
 
- LAUNCH_OFF_BEVNORMAL
 
- LAUNCH_OFF_BEVUTLB
 
- LAUNCH_OFF_BUSY
 
- LAUNCH_OFF_CALL
 
- LAUNCH_OFF_CALLC
 
- LAUNCH_OFF_CALLPARM
 
- LAUNCH_OFF_GP
 
- LAUNCH_OFF_MAGIC
 
- LAUNCH_OFF_STACK
 
- LAUNCH_PADSZ
 
- LAUNCH_PC
 
- LAUNCH_POLL
 
- LAUNCH_SIZE
 
- LAUNCH_SIZEOF
 
- LAUNCH_SLAVE
 
- LAUNCH_SP
 
- LAUNCH_STATE_DONE
 
- LAUNCH_STATE_RECD
 
- LAUNCH_STATE_SENT
 
- LAUNCH_WAIT
 
- LAUSCR_AUS_MODE
 
- LAWAR_CSDID_MASK
 
- LAWAR_CSDID_SHIFT
 
- LAWAR_EN
 
- LAWAR_MASK
 
- LAWAR_MATCH
 
- LAWAR_SIZE_MASK
 
- LAWAR_TARGET_MASK
 
- LAWAR_TARGET_SHIFT
 
- LAWAR_TGT_MASK
 
- LAWBAR_MASK
 
- LAWBAR_SHIFT
 
- LAW_SIZE_4K
 
- LAW_TRGT_IF_LBC
 
- LAYER_4_CHECKSUM_OK
 
- LAYER_A
 
- LAYER_AD_H_CROP
 
- LAYER_AD_V_CROP
 
- LAYER_ALL
 
- LAYER_ALPHA
 
- LAYER_ALPHA_MASK
 
- LAYER_ALPHA_OFFSET
 
- LAYER_AUX_DIV_SHIFT
 
- LAYER_B
 
- LAYER_C
 
- LAYER_COMP_MASK
 
- LAYER_COMP_PIXEL
 
- LAYER_COMP_PLANE
 
- LAYER_DDP
 
- LAYER_ENABLE
 
- LAYER_FLOWCFG
 
- LAYER_FLOWCFG_MASK
 
- LAYER_FLOWCFG_SCALE_SE
 
- LAYER_FMT
 
- LAYER_FORMAT_MASK
 
- LAYER_H_FLIP
 
- LAYER_H_VAL
 
- LAYER_INFO
 
- LAYER_LT_COEFFTAB
 
- LAYER_MAIN_DIV_SHIFT
 
- LAYER_MPA
 
- LAYER_PALPHA
 
- LAYER_PER_PLANE_REGS
 
- LAYER_PMUL_ENABLE
 
- LAYER_RDMA
 
- LAYER_RDMAP
 
- LAYER_RGB_RGB_COEFF0
 
- LAYER_ROT_MASK
 
- LAYER_ROT_OFFSET
 
- LAYER_R_CONTROL
 
- LAYER_V_FLIP
 
- LAYER_V_VAL
 
- LAYER_WR_FORMAT
 
- LAYER_WR_PROG_LINE
 
- LAYER_YUV_RGB_COEFF0
 
- LAYFLAT_MODE
 
- LAYLA20
 
- LAYLA20_CLOCK_INTERNAL
 
- LAYLA20_CLOCK_SPDIF
 
- LAYLA20_CLOCK_SUPER
 
- LAYLA20_CLOCK_WORD
 
- LAYLA20_OUTPUT_CLOCK_SUPER
 
- LAYLA20_OUTPUT_CLOCK_WORD
 
- LAYLA24
 
- LAYLA24_CONTINUOUS_CLOCK
 
- LAYLA24_MAGIC_NUMBER
 
- LAYOUT0
 
- LAYOUT1
 
- LAYOUT_4020
 
- LAYOUT_60XX
 
- LAYOUT_64XX
 
- LAYOUT_BLOCK_VOLUME
 
- LAYOUT_FLAG_COMBO_LINEOUT_SPDIF
 
- LAYOUT_FLEX_FILES
 
- LAYOUT_NFSV4_1_FILES
 
- LAYOUT_NFSV4_1_MODULE_PREFIX
 
- LAYOUT_OSD2_OBJECTS
 
- LAYOUT_SCSI
 
- LAYOUT_TYPE_MAX
 
- LAY_OFS
 
- LAZY
 
- LAZY_LOCK
 
- LAZY_LOCK_INIT
 
- LAZY_UNLOCK
 
- LAZY_UPDATE_THRESHOLD
 
- LA_CTRL_PATTERN
 
- LB
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS_MASK
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS__SHIFT
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP_MASK
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP__SHIFT
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE_MASK
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE__SHIFT
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO_MASK
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO__SHIFT
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL_MASK
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL__SHIFT
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS_MASK
 
- LB0_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS__SHIFT
 
- LB0_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE_MASK
 
- LB0_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE__SHIFT
 
- LB0_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LB0_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LB0_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LB0_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LB0_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LB0_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LB0_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LB0_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LB0_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LB0_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LB0_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LB0_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LB0_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LB0_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LB0_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LB0_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LB0_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LB0_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LB0_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LB0_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LB0_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LB0_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LB0_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LB0_LB_DATA_FORMAT__ALPHA_EN_MASK
 
- LB0_LB_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LB0_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LB0_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LB0_LB_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LB0_LB_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LB0_LB_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LB0_LB_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LB0_LB_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LB0_LB_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LB0_LB_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LB0_LB_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LB0_LB_DATA_FORMAT__PREFETCH_MASK
 
- LB0_LB_DATA_FORMAT__PREFETCH__SHIFT
 
- LB0_LB_DATA_FORMAT__PREFILL_EN_MASK
 
- LB0_LB_DATA_FORMAT__PREFILL_EN__SHIFT
 
- LB0_LB_DATA_FORMAT__REQUEST_MODE_MASK
 
- LB0_LB_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LB0_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LB0_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LB0_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LB0_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LB0_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LB0_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LB0_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LB0_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LB0_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LB0_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LB0_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LB0_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LB0_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LB0_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LB0_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LB0_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LB0_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LB0_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LB0_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LB0_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LB0_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LB0_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LB0_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LB0_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LB0_LB_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LB0_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LB0_LB_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LB0_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LB0_LB_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LB0_LB_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LB0_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LB0_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LB0_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LB0_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LB0_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LB0_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LB0_LB_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LB0_LB_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LB0_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LB0_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LB0_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LB0_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LB0_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LB0_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LB0_LB_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LB0_LB_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LB0_LB_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LB0_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LB0_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LB0_LB_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LB0_LB_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LB0_LB_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LB0_LB_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LB0_LB_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LB0_LB_VLINE2_START_END__VLINE2_END_MASK
 
- LB0_LB_VLINE2_START_END__VLINE2_END__SHIFT
 
- LB0_LB_VLINE2_START_END__VLINE2_INV_MASK
 
- LB0_LB_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LB0_LB_VLINE2_START_END__VLINE2_START_MASK
 
- LB0_LB_VLINE2_START_END__VLINE2_START__SHIFT
 
- LB0_LB_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LB0_LB_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LB0_LB_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LB0_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LB0_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LB0_LB_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LB0_LB_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LB0_LB_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LB0_LB_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LB0_LB_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LB0_LB_VLINE_START_END__VLINE_END_MASK
 
- LB0_LB_VLINE_START_END__VLINE_END__SHIFT
 
- LB0_LB_VLINE_START_END__VLINE_INV_MASK
 
- LB0_LB_VLINE_START_END__VLINE_INV__SHIFT
 
- LB0_LB_VLINE_START_END__VLINE_START_MASK
 
- LB0_LB_VLINE_START_END__VLINE_START__SHIFT
 
- LB0_LB_VLINE_STATUS__VLINE_ACK_MASK
 
- LB0_LB_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LB0_LB_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LB0_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LB0_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LB0_LB_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LB0_LB_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LB0_LB_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LB0_LB_VLINE_STATUS__VLINE_STAT_MASK
 
- LB0_LB_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LB0_LB_V_COUNTER__V_COUNTER_MASK
 
- LB0_LB_V_COUNTER__V_COUNTER__SHIFT
 
- LB0_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES_MASK
 
- LB0_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES__SHIFT
 
- LB0_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK_MASK
 
- LB0_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK__SHIFT
 
- LB0_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG_MASK
 
- LB0_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG__SHIFT
 
- LB0_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_MASK
 
- LB0_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET__SHIFT
 
- LB0_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE_MASK
 
- LB0_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE__SHIFT
 
- LB0_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE_MASK
 
- LB0_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE__SHIFT
 
- LB0_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MASK
 
- LB0_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE_MASK
 
- LB0_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE__SHIFT
 
- LB0_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT__SHIFT
 
- LB0_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET_MASK
 
- LB0_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET__SHIFT
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS_MASK
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS__SHIFT
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP_MASK
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP__SHIFT
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE_MASK
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE__SHIFT
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO_MASK
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO__SHIFT
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL_MASK
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL__SHIFT
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS_MASK
 
- LB1_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS__SHIFT
 
- LB1_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE_MASK
 
- LB1_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE__SHIFT
 
- LB1_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LB1_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LB1_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LB1_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LB1_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LB1_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LB1_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LB1_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LB1_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LB1_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LB1_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LB1_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LB1_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LB1_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LB1_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LB1_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LB1_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LB1_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LB1_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LB1_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LB1_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LB1_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LB1_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LB1_LB_DATA_FORMAT__ALPHA_EN_MASK
 
- LB1_LB_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LB1_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LB1_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LB1_LB_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LB1_LB_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LB1_LB_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LB1_LB_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LB1_LB_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LB1_LB_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LB1_LB_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LB1_LB_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LB1_LB_DATA_FORMAT__PREFETCH_MASK
 
- LB1_LB_DATA_FORMAT__PREFETCH__SHIFT
 
- LB1_LB_DATA_FORMAT__PREFILL_EN_MASK
 
- LB1_LB_DATA_FORMAT__PREFILL_EN__SHIFT
 
- LB1_LB_DATA_FORMAT__REQUEST_MODE_MASK
 
- LB1_LB_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LB1_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LB1_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LB1_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LB1_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LB1_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LB1_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LB1_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LB1_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LB1_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LB1_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LB1_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LB1_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LB1_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LB1_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LB1_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LB1_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LB1_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LB1_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LB1_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LB1_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LB1_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LB1_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LB1_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LB1_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LB1_LB_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LB1_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LB1_LB_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LB1_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LB1_LB_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LB1_LB_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LB1_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LB1_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LB1_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LB1_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LB1_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LB1_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LB1_LB_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LB1_LB_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LB1_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LB1_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LB1_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LB1_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LB1_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LB1_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LB1_LB_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LB1_LB_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LB1_LB_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LB1_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LB1_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LB1_LB_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LB1_LB_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LB1_LB_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LB1_LB_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LB1_LB_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LB1_LB_VLINE2_START_END__VLINE2_END_MASK
 
- LB1_LB_VLINE2_START_END__VLINE2_END__SHIFT
 
- LB1_LB_VLINE2_START_END__VLINE2_INV_MASK
 
- LB1_LB_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LB1_LB_VLINE2_START_END__VLINE2_START_MASK
 
- LB1_LB_VLINE2_START_END__VLINE2_START__SHIFT
 
- LB1_LB_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LB1_LB_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LB1_LB_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LB1_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LB1_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LB1_LB_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LB1_LB_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LB1_LB_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LB1_LB_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LB1_LB_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LB1_LB_VLINE_START_END__VLINE_END_MASK
 
- LB1_LB_VLINE_START_END__VLINE_END__SHIFT
 
- LB1_LB_VLINE_START_END__VLINE_INV_MASK
 
- LB1_LB_VLINE_START_END__VLINE_INV__SHIFT
 
- LB1_LB_VLINE_START_END__VLINE_START_MASK
 
- LB1_LB_VLINE_START_END__VLINE_START__SHIFT
 
- LB1_LB_VLINE_STATUS__VLINE_ACK_MASK
 
- LB1_LB_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LB1_LB_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LB1_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LB1_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LB1_LB_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LB1_LB_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LB1_LB_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LB1_LB_VLINE_STATUS__VLINE_STAT_MASK
 
- LB1_LB_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LB1_LB_V_COUNTER__V_COUNTER_MASK
 
- LB1_LB_V_COUNTER__V_COUNTER__SHIFT
 
- LB1_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES_MASK
 
- LB1_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES__SHIFT
 
- LB1_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK_MASK
 
- LB1_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK__SHIFT
 
- LB1_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG_MASK
 
- LB1_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG__SHIFT
 
- LB1_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_MASK
 
- LB1_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET__SHIFT
 
- LB1_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE_MASK
 
- LB1_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE__SHIFT
 
- LB1_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE_MASK
 
- LB1_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE__SHIFT
 
- LB1_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MASK
 
- LB1_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE_MASK
 
- LB1_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE__SHIFT
 
- LB1_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT__SHIFT
 
- LB1_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET_MASK
 
- LB1_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET__SHIFT
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS_MASK
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS__SHIFT
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP_MASK
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP__SHIFT
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE_MASK
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE__SHIFT
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO_MASK
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO__SHIFT
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL_MASK
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL__SHIFT
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS_MASK
 
- LB2_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS__SHIFT
 
- LB2_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE_MASK
 
- LB2_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE__SHIFT
 
- LB2_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LB2_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LB2_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LB2_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LB2_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LB2_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LB2_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LB2_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LB2_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LB2_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LB2_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LB2_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LB2_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LB2_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LB2_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LB2_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LB2_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LB2_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LB2_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LB2_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LB2_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LB2_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LB2_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LB2_LB_DATA_FORMAT__ALPHA_EN_MASK
 
- LB2_LB_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LB2_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LB2_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LB2_LB_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LB2_LB_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LB2_LB_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LB2_LB_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LB2_LB_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LB2_LB_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LB2_LB_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LB2_LB_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LB2_LB_DATA_FORMAT__PREFETCH_MASK
 
- LB2_LB_DATA_FORMAT__PREFETCH__SHIFT
 
- LB2_LB_DATA_FORMAT__PREFILL_EN_MASK
 
- LB2_LB_DATA_FORMAT__PREFILL_EN__SHIFT
 
- LB2_LB_DATA_FORMAT__REQUEST_MODE_MASK
 
- LB2_LB_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LB2_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LB2_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LB2_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LB2_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LB2_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LB2_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LB2_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LB2_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LB2_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LB2_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LB2_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LB2_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LB2_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LB2_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LB2_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LB2_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LB2_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LB2_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LB2_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LB2_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LB2_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LB2_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LB2_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LB2_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LB2_LB_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LB2_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LB2_LB_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LB2_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LB2_LB_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LB2_LB_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LB2_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LB2_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LB2_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LB2_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LB2_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LB2_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LB2_LB_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LB2_LB_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LB2_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LB2_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LB2_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LB2_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LB2_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LB2_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LB2_LB_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LB2_LB_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LB2_LB_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LB2_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LB2_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LB2_LB_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LB2_LB_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LB2_LB_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LB2_LB_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LB2_LB_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LB2_LB_VLINE2_START_END__VLINE2_END_MASK
 
- LB2_LB_VLINE2_START_END__VLINE2_END__SHIFT
 
- LB2_LB_VLINE2_START_END__VLINE2_INV_MASK
 
- LB2_LB_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LB2_LB_VLINE2_START_END__VLINE2_START_MASK
 
- LB2_LB_VLINE2_START_END__VLINE2_START__SHIFT
 
- LB2_LB_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LB2_LB_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LB2_LB_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LB2_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LB2_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LB2_LB_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LB2_LB_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LB2_LB_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LB2_LB_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LB2_LB_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LB2_LB_VLINE_START_END__VLINE_END_MASK
 
- LB2_LB_VLINE_START_END__VLINE_END__SHIFT
 
- LB2_LB_VLINE_START_END__VLINE_INV_MASK
 
- LB2_LB_VLINE_START_END__VLINE_INV__SHIFT
 
- LB2_LB_VLINE_START_END__VLINE_START_MASK
 
- LB2_LB_VLINE_START_END__VLINE_START__SHIFT
 
- LB2_LB_VLINE_STATUS__VLINE_ACK_MASK
 
- LB2_LB_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LB2_LB_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LB2_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LB2_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LB2_LB_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LB2_LB_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LB2_LB_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LB2_LB_VLINE_STATUS__VLINE_STAT_MASK
 
- LB2_LB_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LB2_LB_V_COUNTER__V_COUNTER_MASK
 
- LB2_LB_V_COUNTER__V_COUNTER__SHIFT
 
- LB2_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES_MASK
 
- LB2_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES__SHIFT
 
- LB2_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK_MASK
 
- LB2_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK__SHIFT
 
- LB2_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG_MASK
 
- LB2_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG__SHIFT
 
- LB2_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_MASK
 
- LB2_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET__SHIFT
 
- LB2_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE_MASK
 
- LB2_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE__SHIFT
 
- LB2_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE_MASK
 
- LB2_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE__SHIFT
 
- LB2_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MASK
 
- LB2_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE_MASK
 
- LB2_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE__SHIFT
 
- LB2_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT__SHIFT
 
- LB2_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET_MASK
 
- LB2_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET__SHIFT
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS_MASK
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS__SHIFT
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP_MASK
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP__SHIFT
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE_MASK
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE__SHIFT
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO_MASK
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO__SHIFT
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL_MASK
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL__SHIFT
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS_MASK
 
- LB3_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS__SHIFT
 
- LB3_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE_MASK
 
- LB3_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE__SHIFT
 
- LB3_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LB3_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LB3_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LB3_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LB3_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LB3_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LB3_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LB3_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LB3_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LB3_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LB3_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LB3_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LB3_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LB3_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LB3_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LB3_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LB3_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LB3_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LB3_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LB3_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LB3_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LB3_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LB3_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LB3_LB_DATA_FORMAT__ALPHA_EN_MASK
 
- LB3_LB_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LB3_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LB3_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LB3_LB_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LB3_LB_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LB3_LB_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LB3_LB_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LB3_LB_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LB3_LB_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LB3_LB_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LB3_LB_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LB3_LB_DATA_FORMAT__PREFETCH_MASK
 
- LB3_LB_DATA_FORMAT__PREFETCH__SHIFT
 
- LB3_LB_DATA_FORMAT__PREFILL_EN_MASK
 
- LB3_LB_DATA_FORMAT__PREFILL_EN__SHIFT
 
- LB3_LB_DATA_FORMAT__REQUEST_MODE_MASK
 
- LB3_LB_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LB3_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LB3_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LB3_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LB3_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LB3_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LB3_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LB3_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LB3_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LB3_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LB3_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LB3_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LB3_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LB3_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LB3_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LB3_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LB3_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LB3_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LB3_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LB3_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LB3_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LB3_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LB3_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LB3_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LB3_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LB3_LB_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LB3_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LB3_LB_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LB3_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LB3_LB_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LB3_LB_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LB3_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LB3_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LB3_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LB3_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LB3_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LB3_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LB3_LB_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LB3_LB_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LB3_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LB3_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LB3_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LB3_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LB3_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LB3_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LB3_LB_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LB3_LB_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LB3_LB_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LB3_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LB3_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LB3_LB_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LB3_LB_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LB3_LB_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LB3_LB_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LB3_LB_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LB3_LB_VLINE2_START_END__VLINE2_END_MASK
 
- LB3_LB_VLINE2_START_END__VLINE2_END__SHIFT
 
- LB3_LB_VLINE2_START_END__VLINE2_INV_MASK
 
- LB3_LB_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LB3_LB_VLINE2_START_END__VLINE2_START_MASK
 
- LB3_LB_VLINE2_START_END__VLINE2_START__SHIFT
 
- LB3_LB_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LB3_LB_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LB3_LB_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LB3_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LB3_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LB3_LB_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LB3_LB_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LB3_LB_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LB3_LB_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LB3_LB_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LB3_LB_VLINE_START_END__VLINE_END_MASK
 
- LB3_LB_VLINE_START_END__VLINE_END__SHIFT
 
- LB3_LB_VLINE_START_END__VLINE_INV_MASK
 
- LB3_LB_VLINE_START_END__VLINE_INV__SHIFT
 
- LB3_LB_VLINE_START_END__VLINE_START_MASK
 
- LB3_LB_VLINE_START_END__VLINE_START__SHIFT
 
- LB3_LB_VLINE_STATUS__VLINE_ACK_MASK
 
- LB3_LB_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LB3_LB_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LB3_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LB3_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LB3_LB_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LB3_LB_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LB3_LB_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LB3_LB_VLINE_STATUS__VLINE_STAT_MASK
 
- LB3_LB_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LB3_LB_V_COUNTER__V_COUNTER_MASK
 
- LB3_LB_V_COUNTER__V_COUNTER__SHIFT
 
- LB3_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES_MASK
 
- LB3_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES__SHIFT
 
- LB3_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK_MASK
 
- LB3_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK__SHIFT
 
- LB3_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG_MASK
 
- LB3_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG__SHIFT
 
- LB3_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_MASK
 
- LB3_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET__SHIFT
 
- LB3_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE_MASK
 
- LB3_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE__SHIFT
 
- LB3_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE_MASK
 
- LB3_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE__SHIFT
 
- LB3_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MASK
 
- LB3_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE_MASK
 
- LB3_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE__SHIFT
 
- LB3_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT__SHIFT
 
- LB3_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET_MASK
 
- LB3_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET__SHIFT
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS_MASK
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS__SHIFT
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP_MASK
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP__SHIFT
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE_MASK
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE__SHIFT
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO_MASK
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO__SHIFT
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL_MASK
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL__SHIFT
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS_MASK
 
- LB4_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS__SHIFT
 
- LB4_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE_MASK
 
- LB4_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE__SHIFT
 
- LB4_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LB4_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LB4_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LB4_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LB4_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LB4_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LB4_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LB4_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LB4_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LB4_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LB4_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LB4_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LB4_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LB4_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LB4_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LB4_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LB4_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LB4_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LB4_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LB4_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LB4_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LB4_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LB4_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LB4_LB_DATA_FORMAT__ALPHA_EN_MASK
 
- LB4_LB_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LB4_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LB4_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LB4_LB_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LB4_LB_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LB4_LB_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LB4_LB_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LB4_LB_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LB4_LB_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LB4_LB_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LB4_LB_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LB4_LB_DATA_FORMAT__PREFETCH_MASK
 
- LB4_LB_DATA_FORMAT__PREFETCH__SHIFT
 
- LB4_LB_DATA_FORMAT__PREFILL_EN_MASK
 
- LB4_LB_DATA_FORMAT__PREFILL_EN__SHIFT
 
- LB4_LB_DATA_FORMAT__REQUEST_MODE_MASK
 
- LB4_LB_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LB4_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LB4_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LB4_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LB4_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LB4_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LB4_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LB4_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LB4_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LB4_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LB4_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LB4_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LB4_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LB4_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LB4_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LB4_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LB4_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LB4_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LB4_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LB4_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LB4_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LB4_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LB4_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LB4_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LB4_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LB4_LB_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LB4_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LB4_LB_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LB4_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LB4_LB_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LB4_LB_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LB4_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LB4_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LB4_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LB4_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LB4_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LB4_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LB4_LB_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LB4_LB_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LB4_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LB4_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LB4_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LB4_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LB4_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LB4_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LB4_LB_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LB4_LB_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LB4_LB_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LB4_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LB4_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LB4_LB_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LB4_LB_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LB4_LB_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LB4_LB_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LB4_LB_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LB4_LB_VLINE2_START_END__VLINE2_END_MASK
 
- LB4_LB_VLINE2_START_END__VLINE2_END__SHIFT
 
- LB4_LB_VLINE2_START_END__VLINE2_INV_MASK
 
- LB4_LB_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LB4_LB_VLINE2_START_END__VLINE2_START_MASK
 
- LB4_LB_VLINE2_START_END__VLINE2_START__SHIFT
 
- LB4_LB_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LB4_LB_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LB4_LB_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LB4_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LB4_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LB4_LB_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LB4_LB_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LB4_LB_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LB4_LB_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LB4_LB_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LB4_LB_VLINE_START_END__VLINE_END_MASK
 
- LB4_LB_VLINE_START_END__VLINE_END__SHIFT
 
- LB4_LB_VLINE_START_END__VLINE_INV_MASK
 
- LB4_LB_VLINE_START_END__VLINE_INV__SHIFT
 
- LB4_LB_VLINE_START_END__VLINE_START_MASK
 
- LB4_LB_VLINE_START_END__VLINE_START__SHIFT
 
- LB4_LB_VLINE_STATUS__VLINE_ACK_MASK
 
- LB4_LB_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LB4_LB_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LB4_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LB4_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LB4_LB_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LB4_LB_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LB4_LB_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LB4_LB_VLINE_STATUS__VLINE_STAT_MASK
 
- LB4_LB_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LB4_LB_V_COUNTER__V_COUNTER_MASK
 
- LB4_LB_V_COUNTER__V_COUNTER__SHIFT
 
- LB4_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES_MASK
 
- LB4_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES__SHIFT
 
- LB4_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK_MASK
 
- LB4_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK__SHIFT
 
- LB4_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG_MASK
 
- LB4_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG__SHIFT
 
- LB4_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_MASK
 
- LB4_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET__SHIFT
 
- LB4_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE_MASK
 
- LB4_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE__SHIFT
 
- LB4_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE_MASK
 
- LB4_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE__SHIFT
 
- LB4_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MASK
 
- LB4_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE_MASK
 
- LB4_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE__SHIFT
 
- LB4_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT__SHIFT
 
- LB4_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET_MASK
 
- LB4_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET__SHIFT
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS_MASK
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SPARE_FLOPS__SHIFT
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP_MASK
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_IN_CAP__SHIFT
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE_MASK
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ONE__SHIFT
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO_MASK
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO__SHIFT
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL_MASK
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_OUT_SEL__SHIFT
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS_MASK
 
- LB5_DC_MVP_LB_CONTROL__DC_MVP_SWAP_LOCK_STATUS__SHIFT
 
- LB5_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE_MASK
 
- LB5_DC_MVP_LB_CONTROL__MVP_SWAP_LOCK_IN_MODE__SHIFT
 
- LB5_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LB5_LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LB5_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LB5_LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LB5_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LB5_LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LB5_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LB5_LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LB5_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LB5_LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LB5_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LB5_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LB5_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LB5_LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LB5_LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LB5_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LB5_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LB5_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LB5_LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LB5_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LB5_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LB5_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LB5_LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LB5_LB_DATA_FORMAT__ALPHA_EN_MASK
 
- LB5_LB_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LB5_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LB5_LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LB5_LB_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LB5_LB_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LB5_LB_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LB5_LB_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LB5_LB_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LB5_LB_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LB5_LB_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LB5_LB_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LB5_LB_DATA_FORMAT__PREFETCH_MASK
 
- LB5_LB_DATA_FORMAT__PREFETCH__SHIFT
 
- LB5_LB_DATA_FORMAT__PREFILL_EN_MASK
 
- LB5_LB_DATA_FORMAT__PREFILL_EN__SHIFT
 
- LB5_LB_DATA_FORMAT__REQUEST_MODE_MASK
 
- LB5_LB_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LB5_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LB5_LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LB5_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LB5_LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LB5_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LB5_LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LB5_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LB5_LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LB5_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LB5_LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LB5_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LB5_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LB5_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LB5_LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LB5_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LB5_LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LB5_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LB5_LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LB5_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LB5_LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LB5_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LB5_LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LB5_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LB5_LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LB5_LB_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LB5_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LB5_LB_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LB5_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LB5_LB_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LB5_LB_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LB5_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LB5_LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LB5_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LB5_LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LB5_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LB5_LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LB5_LB_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LB5_LB_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LB5_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LB5_LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LB5_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LB5_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LB5_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LB5_LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LB5_LB_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LB5_LB_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LB5_LB_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LB5_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LB5_LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LB5_LB_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LB5_LB_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LB5_LB_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LB5_LB_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LB5_LB_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LB5_LB_VLINE2_START_END__VLINE2_END_MASK
 
- LB5_LB_VLINE2_START_END__VLINE2_END__SHIFT
 
- LB5_LB_VLINE2_START_END__VLINE2_INV_MASK
 
- LB5_LB_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LB5_LB_VLINE2_START_END__VLINE2_START_MASK
 
- LB5_LB_VLINE2_START_END__VLINE2_START__SHIFT
 
- LB5_LB_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LB5_LB_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LB5_LB_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LB5_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LB5_LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LB5_LB_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LB5_LB_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LB5_LB_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LB5_LB_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LB5_LB_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LB5_LB_VLINE_START_END__VLINE_END_MASK
 
- LB5_LB_VLINE_START_END__VLINE_END__SHIFT
 
- LB5_LB_VLINE_START_END__VLINE_INV_MASK
 
- LB5_LB_VLINE_START_END__VLINE_INV__SHIFT
 
- LB5_LB_VLINE_START_END__VLINE_START_MASK
 
- LB5_LB_VLINE_START_END__VLINE_START__SHIFT
 
- LB5_LB_VLINE_STATUS__VLINE_ACK_MASK
 
- LB5_LB_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LB5_LB_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LB5_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LB5_LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LB5_LB_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LB5_LB_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LB5_LB_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LB5_LB_VLINE_STATUS__VLINE_STAT_MASK
 
- LB5_LB_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LB5_LB_V_COUNTER__V_COUNTER_MASK
 
- LB5_LB_V_COUNTER__V_COUNTER__SHIFT
 
- LB5_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES_MASK
 
- LB5_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_NUM_ENTRIES__SHIFT
 
- LB5_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK_MASK
 
- LB5_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_ACK__SHIFT
 
- LB5_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG_MASK
 
- LB5_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_FLAG__SHIFT
 
- LB5_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET_MASK
 
- LB5_MVP_AFR_FLIP_FIFO_CNTL__MVP_AFR_FLIP_FIFO_RESET__SHIFT
 
- LB5_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE_MASK
 
- LB5_MVP_AFR_FLIP_MODE__MVP_AFR_FLIP_MODE__SHIFT
 
- LB5_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE_MASK
 
- LB5_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_AUTO_ENABLE__SHIFT
 
- LB5_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MASK
 
- LB5_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE_MASK
 
- LB5_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT_MODE__SHIFT
 
- LB5_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_INSERT__SHIFT
 
- LB5_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET_MASK
 
- LB5_MVP_FLIP_LINE_NUM_INSERT__MVP_FLIP_LINE_NUM_OFFSET__SHIFT
 
- LBARB
 
- LBAR_ACPI_SIZE
 
- LBAR_GPIO_SIZE
 
- LBAR_MFGPT_SIZE
 
- LBAR_PMS_SIZE
 
- LBA_ARB_MASK
 
- LBA_ARB_MODE
 
- LBA_ARB_MTLT
 
- LBA_ARB_PRI
 
- LBA_BUS_MODE
 
- LBA_BUS_RESET
 
- LBA_CAPABLE
 
- LBA_CFG_ADDR_SETUP
 
- LBA_CFG_BUS
 
- LBA_CFG_DEV
 
- LBA_CFG_FUNC
 
- LBA_CFG_MASTER_ABORT_CHECK
 
- LBA_CFG_PROBE
 
- LBA_CFG_RESTORE
 
- LBA_CFG_SETUP
 
- LBA_CFG_TOK
 
- LBA_CFG_TR4_ADDR_SETUP
 
- LBA_DEV
 
- LBA_DMA_CTL
 
- LBA_EIOS_BASE
 
- LBA_EIOS_MASK
 
- LBA_ELMMIO_BASE
 
- LBA_ELMMIO_MASK
 
- LBA_ERROR_ADDR
 
- LBA_ERROR_CONFIG
 
- LBA_ERROR_STATUS
 
- LBA_FATAL_ERROR
 
- LBA_FCLASS
 
- LBA_FLAG_SKIP_PROBE
 
- LBA_FUNC_ID
 
- LBA_FW_SCRATCH
 
- LBA_GLOBAL_MASK
 
- LBA_GMMIO_BASE
 
- LBA_GMMIO_MASK
 
- LBA_HINT_BASE
 
- LBA_HINT_CFG
 
- LBA_IBASE
 
- LBA_IMASK
 
- LBA_IOSAPIC_BASE
 
- LBA_IOS_BASE
 
- LBA_IOS_MASK
 
- LBA_LMMIO_BASE
 
- LBA_LMMIO_MASK
 
- LBA_MASTER_ABORT_ERROR
 
- LBA_MAX_NUM_BUSES
 
- LBA_MOD_ID
 
- LBA_NUM
 
- LBA_OUT_OF_RANGE
 
- LBA_PCI_CFG_ADDR
 
- LBA_PCI_CFG_DATA
 
- LBA_PMC_MTLT
 
- LBA_PORT_BASE
 
- LBA_PORT_IN
 
- LBA_PORT_OUT
 
- LBA_ROPE_CTL
 
- LBA_SKIP_PROBE
 
- LBA_SMART_MODE
 
- LBA_STAT_CTL
 
- LBA_WAIT
 
- LBA_WGMMIO_BASE
 
- LBA_WGMMIO_MASK
 
- LBA_WLMMIO_BASE
 
- LBA_WLMMIO_MASK
 
- LBCFG0
 
- LBCFG1
 
- LBCFG2
 
- LBCFG3
 
- LBCIF_ADDRESS_REGISTER
 
- LBCIF_CONTROL_EEPROM_RELOAD
 
- LBCIF_CONTROL_I2C_WRITE
 
- LBCIF_CONTROL_LBCIF_ENABLE
 
- LBCIF_CONTROL_PAGE_WRITE
 
- LBCIF_CONTROL_REGISTER
 
- LBCIF_CONTROL_SEQUENTIAL_READ
 
- LBCIF_CONTROL_TWO_BYTE_ADDR
 
- LBCIF_DATA_REGISTER
 
- LBCIF_DWORD0_GROUP
 
- LBCIF_DWORD1_GROUP
 
- LBCIF_STATUS_ACK_ERROR
 
- LBCIF_STATUS_CHECKSUM_ERROR
 
- LBCIF_STATUS_EEPROM_PRESENT
 
- LBCIF_STATUS_GENERAL_ERROR
 
- LBCIF_STATUS_I2C_IDLE
 
- LBCIF_STATUS_PHY_QUEUE_AVAIL
 
- LBCIF_STATUS_REGISTER
 
- LBCR_AHD
 
- LBCR_BCTLC
 
- LBCR_BCTLC_SHIFT
 
- LBCR_BMT
 
- LBCR_BMTPS
 
- LBCR_BMTPS_SHIFT
 
- LBCR_BMT_SHIFT
 
- LBCR_EPAR
 
- LBCR_EPAR_SHIFT
 
- LBCR_INIT
 
- LBCR_LDIS
 
- LBCR_LDIS_SHIFT
 
- LBCR_LPBSE
 
- LBCR_LPBSE_SHIFT
 
- LBC_BIST_STATUS
 
- LBC_ELM_VF1_64_INT
 
- LBC_ELM_VF1_64_INT_ENA_W1S
 
- LBC_ELM_VF65_128_INT
 
- LBC_ELM_VF65_128_INT_ENA_W1S
 
- LBC_INT
 
- LBC_INT_ENA_W1S
 
- LBC_INVAL_CTL
 
- LBC_INVAL_STATUS
 
- LBC_PLM_VF1_64_INT
 
- LBC_PLM_VF1_64_INT_ENA_W1S
 
- LBC_PLM_VF65_128_INT
 
- LBC_PLM_VF65_128_INT_ENA_W1S
 
- LBD
 
- LBDLY
 
- LBE
 
- LBEN
 
- LBFREE_CNT
 
- LBF_ALL_PINNED
 
- LBF_DST_PINNED
 
- LBF_NEED_BREAK
 
- LBF_NOHZ_AGAIN
 
- LBF_NOHZ_STATS
 
- LBF_SOME_PINNED
 
- LBGENMODE
 
- LBG_COMMUNITY
 
- LBG_GPI_IE
 
- LBG_GPI_IS
 
- LBG_HOSTSW_OWN
 
- LBG_PADCFGLOCK
 
- LBG_PAD_OWN
 
- LBICTRL_LPCCTL_NR
 
- LBITMASK
 
- LBITSKIP00
 
- LBITSKIP55
 
- LBKMD_SEL
 
- LBK_DMA_LB
 
- LBK_MAC_DLB
 
- LBK_MAC_LB
 
- LBK_NORMAL
 
- LBLK2PBLK
 
- LBLKC
 
- LBLKC_ADDR
 
- LBLKC_BD_MASK
 
- LBLKC_BD_SHIFT
 
- LBLKC_BKEN
 
- LBM_SHIFT
 
- LBNUMBER
 
- LBOARD_STRUCT_VERSION
 
- LBOFFSET
 
- LBOOT_BASE
 
- LBOOT_LIMIT
 
- LBOOT_SIZE
 
- LBOOT_STRIDE
 
- LBORD
 
- LBO_0dB
 
- LBO_15dB
 
- LBO_22dB5
 
- LBO_7dB5
 
- LBPC
 
- LBPEGEN
 
- LBRD1
 
- LBRS_MAX
 
- LBR_ANY
 
- LBR_CALL_STACK
 
- LBR_CALL_STACK_BIT
 
- LBR_CTL_ENABLE_MASK
 
- LBR_EIP_FLAGS
 
- LBR_FAR
 
- LBR_FAR_BIT
 
- LBR_FORMAT_32
 
- LBR_FORMAT_EIP
 
- LBR_FORMAT_EIP_FLAGS
 
- LBR_FORMAT_EIP_FLAGS2
 
- LBR_FORMAT_INFO
 
- LBR_FORMAT_LIP
 
- LBR_FORMAT_MAX_KNOWN
 
- LBR_FORMAT_TIME
 
- LBR_FROM_FLAG_ABORT
 
- LBR_FROM_FLAG_IN_TX
 
- LBR_FROM_FLAG_MISPRED
 
- LBR_FROM_SIGNEXT_2MSB
 
- LBR_IGN
 
- LBR_IND_CALL
 
- LBR_IND_CALL_BIT
 
- LBR_IND_JMP
 
- LBR_IND_JMP_BIT
 
- LBR_INFO_ABORT
 
- LBR_INFO_CYCLES
 
- LBR_INFO_IN_TX
 
- LBR_INFO_MISPRED
 
- LBR_JCC
 
- LBR_JCC_BIT
 
- LBR_KERNEL
 
- LBR_KERNEL_BIT
 
- LBR_NONE
 
- LBR_NOT_SUPP
 
- LBR_NO_INFO
 
- LBR_NO_INFO_BIT
 
- LBR_PLM
 
- LBR_REL_CALL
 
- LBR_REL_CALL_BIT
 
- LBR_REL_JMP
 
- LBR_REL_JMP_BIT
 
- LBR_RETURN
 
- LBR_RETURN_BIT
 
- LBR_SEL_MASK
 
- LBR_TSX
 
- LBR_USER
 
- LBR_USER_BIT
 
- LBR_VALID
 
- LBS802_11POWEMODEMAX
 
- LBS802_11POWERMODECAM
 
- LBS802_11POWERMODEFAST_PSP
 
- LBS802_11POWERMODEMAX_PSP
 
- LBS802_11PRIVFILTER8021XWEP
 
- LBS802_11PRIVFILTERACCEPTALL
 
- LBSCATA
 
- LBSCDMAC0
 
- LBSCDMAC1
 
- LBSCDMAC2
 
- LBSCDMAC_M
 
- LBSCDMAC_P
 
- LBSI_SOFT_RESET
 
- LBSTAT
 
- LBS_802_11_POWER_MODE
 
- LBS_802_11_PRIVACY_FILTER
 
- LBS_ASSOC_MAX_CMD_SIZE
 
- LBS_CMD_BUFFER_SIZE
 
- LBS_CONNECTED
 
- LBS_DEB_11D
 
- LBS_DEB_ASSOC
 
- LBS_DEB_CFG80211
 
- LBS_DEB_CMD
 
- LBS_DEB_CS
 
- LBS_DEB_DEBUGFS
 
- LBS_DEB_ENTER
 
- LBS_DEB_ETHTOOL
 
- LBS_DEB_FW
 
- LBS_DEB_HEX
 
- LBS_DEB_HOST
 
- LBS_DEB_IOCTL
 
- LBS_DEB_JOIN
 
- LBS_DEB_LEAVE
 
- LBS_DEB_LL
 
- LBS_DEB_MAIN
 
- LBS_DEB_MESH
 
- LBS_DEB_NET
 
- LBS_DEB_RX
 
- LBS_DEB_SCAN
 
- LBS_DEB_SDIO
 
- LBS_DEB_SPI
 
- LBS_DEB_SYSFS
 
- LBS_DEB_THREAD
 
- LBS_DEB_TX
 
- LBS_DEB_USB
 
- LBS_DEB_WEXT
 
- LBS_DISCONNECTED
 
- LBS_DWELL_ACTIVE
 
- LBS_DWELL_PASSIVE
 
- LBS_EEPROM_LEN
 
- LBS_EEPROM_READ_LEN
 
- LBS_MAX_AUTH_TYPE_TLV_SIZE
 
- LBS_MAX_CF_PARAM_TLV_SIZE
 
- LBS_MAX_CHANNEL_LIST_TLV_SIZE
 
- LBS_MAX_CHANNEL_TLV_SIZE
 
- LBS_MAX_RATES_TLV_SIZE
 
- LBS_MAX_SSID_TLV_SIZE
 
- LBS_MAX_WPA_TLV_SIZE
 
- LBS_MEDIA_STATE
 
- LBS_NUM_CMD_BUFFERS
 
- LBS_SCAN_BEFORE_NAP
 
- LBS_SCAN_MAX_CMD_SIZE
 
- LBS_SCAN_RSSI_TO_MBM
 
- LBS_UPLD_SIZE
 
- LBT
 
- LBTF_AP_MODE
 
- LBTF_DEB_11D
 
- LBTF_DEB_ASSOC
 
- LBTF_DEB_CMD
 
- LBTF_DEB_CS
 
- LBTF_DEB_DEBUGFS
 
- LBTF_DEB_ENTER
 
- LBTF_DEB_ETHTOOL
 
- LBTF_DEB_FW
 
- LBTF_DEB_HEX
 
- LBTF_DEB_HOST
 
- LBTF_DEB_IOCTL
 
- LBTF_DEB_JOIN
 
- LBTF_DEB_LEAVE
 
- LBTF_DEB_LL
 
- LBTF_DEB_MACOPS
 
- LBTF_DEB_MAIN
 
- LBTF_DEB_MESH
 
- LBTF_DEB_NET
 
- LBTF_DEB_RX
 
- LBTF_DEB_SCAN
 
- LBTF_DEB_SDIO
 
- LBTF_DEB_THREAD
 
- LBTF_DEB_TX
 
- LBTF_DEB_USB
 
- LBTF_DEB_WEXT
 
- LBTF_EVENT_BCN_SENT
 
- LBTF_FW_VER_MAX
 
- LBTF_FW_VER_MIN
 
- LBTF_PASSIVE_MODE
 
- LBTF_REGDOMAIN_CA
 
- LBTF_REGDOMAIN_EU
 
- LBTF_REGDOMAIN_FR
 
- LBTF_REGDOMAIN_JP
 
- LBTF_REGDOMAIN_SP
 
- LBTF_REGDOMAIN_US
 
- LBTF_STA_MODE
 
- LBTI
 
- LBUFSIZE
 
- LBUS2ARM_FIFO0
 
- LBUS2ARM_FIFO1
 
- LBUS2ARM_FIFO2
 
- LBUS2ARM_FIFO3
 
- LBUS2ARM_FIFO4
 
- LBUS2ARM_FIFO5
 
- LBUS2ARM_FIFO6
 
- LBUS2ARM_FIFO7
 
- LBUS_ADDR
 
- LBUS_ADDR_MASK
 
- LBUS_ADDR_SEL_AUX
 
- LBUS_ADDR_SEL_RAM
 
- LBUS_ADDR_SEL_ROM
 
- LBUS_ADDR_SEL_ZV
 
- LBUS_ERR_ADDR
 
- LBUS_ERR_CMD
 
- LBUS_ERR_DATA_H
 
- LBUS_ERR_DATA_L
 
- LBUS_EXCEPTION_ADDR
 
- LBUS_MON_ADDR
 
- LBUS_SINK
 
- LBV0_LBV_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LBV0_LBV_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LBV0_LBV_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LBV0_LBV_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LBV0_LBV_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LBV0_LBV_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LBV0_LBV_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LBV0_LBV_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LBV0_LBV_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LBV0_LBV_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LBV0_LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LBV0_LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LBV0_LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LBV0_LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_ENABLE_HIGH_THROUGHPUT_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_ENABLE_HIGH_THROUGHPUT__SHIFT
 
- LBV0_LBV_BUFFER_STATUS__LB_HIGH_THROUGHPUT_CNTL_MASK
 
- LBV0_LBV_BUFFER_STATUS__LB_HIGH_THROUGHPUT_CNTL__SHIFT
 
- LBV0_LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LBV0_LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LBV0_LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LBV0_LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LBV0_LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LBV0_LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LBV0_LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LBV0_LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LBV0_LBV_DATA_FORMAT__ALPHA_EN_MASK
 
- LBV0_LBV_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LBV0_LBV_DATA_FORMAT__DITHER_EN_MASK
 
- LBV0_LBV_DATA_FORMAT__DITHER_EN__SHIFT
 
- LBV0_LBV_DATA_FORMAT__DOWNSCALE_PREFETCH_EN_MASK
 
- LBV0_LBV_DATA_FORMAT__DOWNSCALE_PREFETCH_EN__SHIFT
 
- LBV0_LBV_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LBV0_LBV_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LBV0_LBV_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LBV0_LBV_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LBV0_LBV_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LBV0_LBV_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LBV0_LBV_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LBV0_LBV_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LBV0_LBV_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LBV0_LBV_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LBV0_LBV_DATA_FORMAT__PREFETCH_MASK
 
- LBV0_LBV_DATA_FORMAT__PREFETCH__SHIFT
 
- LBV0_LBV_DATA_FORMAT__REQUEST_MODE_MASK
 
- LBV0_LBV_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LBV0_LBV_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LBV0_LBV_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LBV0_LBV_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LBV0_LBV_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LBV0_LBV_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LBV0_LBV_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LBV0_LBV_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LBV0_LBV_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LBV0_LBV_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LBV0_LBV_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LBV0_LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LBV0_LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LBV0_LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LBV0_LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LBV0_LBV_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LBV0_LBV_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LBV0_LBV_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LBV0_LBV_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LBV0_LBV_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LBV0_LBV_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LBV0_LBV_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LBV0_LBV_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LBV0_LBV_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LBV0_LBV_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LBV0_LBV_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LBV0_LBV_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LBV0_LBV_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LBV0_LBV_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LBV0_LBV_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LBV0_LBV_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LBV0_LBV_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LBV0_LBV_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LBV0_LBV_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LBV0_LBV_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LBV0_LBV_SNAPSHOT_V_COUNTER_CHROMA__SNAPSHOT_V_COUNTER_CHROMA_MASK
 
- LBV0_LBV_SNAPSHOT_V_COUNTER_CHROMA__SNAPSHOT_V_COUNTER_CHROMA__SHIFT
 
- LBV0_LBV_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LBV0_LBV_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LBV0_LBV_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LBV0_LBV_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LBV0_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LBV0_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LBV0_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LBV0_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LBV0_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LBV0_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LBV0_LBV_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LBV0_LBV_VLINE2_START_END__VLINE2_END_MASK
 
- LBV0_LBV_VLINE2_START_END__VLINE2_END__SHIFT
 
- LBV0_LBV_VLINE2_START_END__VLINE2_INV_MASK
 
- LBV0_LBV_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LBV0_LBV_VLINE2_START_END__VLINE2_START_MASK
 
- LBV0_LBV_VLINE2_START_END__VLINE2_START__SHIFT
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LBV0_LBV_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LBV0_LBV_VLINE_START_END__VLINE_END_MASK
 
- LBV0_LBV_VLINE_START_END__VLINE_END__SHIFT
 
- LBV0_LBV_VLINE_START_END__VLINE_INV_MASK
 
- LBV0_LBV_VLINE_START_END__VLINE_INV__SHIFT
 
- LBV0_LBV_VLINE_START_END__VLINE_START_MASK
 
- LBV0_LBV_VLINE_START_END__VLINE_START__SHIFT
 
- LBV0_LBV_VLINE_STATUS__VLINE_ACK_MASK
 
- LBV0_LBV_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LBV0_LBV_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LBV0_LBV_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LBV0_LBV_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LBV0_LBV_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LBV0_LBV_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LBV0_LBV_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LBV0_LBV_VLINE_STATUS__VLINE_STAT_MASK
 
- LBV0_LBV_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LBV0_LBV_V_COUNTER_CHROMA__V_COUNTER_CHROMA_MASK
 
- LBV0_LBV_V_COUNTER_CHROMA__V_COUNTER_CHROMA__SHIFT
 
- LBV0_LBV_V_COUNTER__V_COUNTER_MASK
 
- LBV0_LBV_V_COUNTER__V_COUNTER__SHIFT
 
- LBV1_LBV_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LBV1_LBV_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LBV1_LBV_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LBV1_LBV_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LBV1_LBV_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LBV1_LBV_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LBV1_LBV_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LBV1_LBV_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LBV1_LBV_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LBV1_LBV_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LBV1_LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LBV1_LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LBV1_LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LBV1_LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_ENABLE_HIGH_THROUGHPUT_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_ENABLE_HIGH_THROUGHPUT__SHIFT
 
- LBV1_LBV_BUFFER_STATUS__LB_HIGH_THROUGHPUT_CNTL_MASK
 
- LBV1_LBV_BUFFER_STATUS__LB_HIGH_THROUGHPUT_CNTL__SHIFT
 
- LBV1_LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LBV1_LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LBV1_LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LBV1_LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LBV1_LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LBV1_LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LBV1_LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LBV1_LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LBV1_LBV_DATA_FORMAT__ALPHA_EN_MASK
 
- LBV1_LBV_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LBV1_LBV_DATA_FORMAT__DITHER_EN_MASK
 
- LBV1_LBV_DATA_FORMAT__DITHER_EN__SHIFT
 
- LBV1_LBV_DATA_FORMAT__DOWNSCALE_PREFETCH_EN_MASK
 
- LBV1_LBV_DATA_FORMAT__DOWNSCALE_PREFETCH_EN__SHIFT
 
- LBV1_LBV_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LBV1_LBV_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LBV1_LBV_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LBV1_LBV_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LBV1_LBV_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LBV1_LBV_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LBV1_LBV_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LBV1_LBV_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LBV1_LBV_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LBV1_LBV_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LBV1_LBV_DATA_FORMAT__PREFETCH_MASK
 
- LBV1_LBV_DATA_FORMAT__PREFETCH__SHIFT
 
- LBV1_LBV_DATA_FORMAT__REQUEST_MODE_MASK
 
- LBV1_LBV_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LBV1_LBV_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LBV1_LBV_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LBV1_LBV_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LBV1_LBV_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LBV1_LBV_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LBV1_LBV_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LBV1_LBV_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LBV1_LBV_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LBV1_LBV_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LBV1_LBV_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LBV1_LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LBV1_LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LBV1_LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LBV1_LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LBV1_LBV_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LBV1_LBV_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LBV1_LBV_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LBV1_LBV_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LBV1_LBV_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LBV1_LBV_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LBV1_LBV_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LBV1_LBV_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LBV1_LBV_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LBV1_LBV_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LBV1_LBV_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LBV1_LBV_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LBV1_LBV_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LBV1_LBV_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LBV1_LBV_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LBV1_LBV_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LBV1_LBV_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LBV1_LBV_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LBV1_LBV_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LBV1_LBV_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LBV1_LBV_SNAPSHOT_V_COUNTER_CHROMA__SNAPSHOT_V_COUNTER_CHROMA_MASK
 
- LBV1_LBV_SNAPSHOT_V_COUNTER_CHROMA__SNAPSHOT_V_COUNTER_CHROMA__SHIFT
 
- LBV1_LBV_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LBV1_LBV_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LBV1_LBV_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LBV1_LBV_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LBV1_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LBV1_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LBV1_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LBV1_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LBV1_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LBV1_LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LBV1_LBV_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LBV1_LBV_VLINE2_START_END__VLINE2_END_MASK
 
- LBV1_LBV_VLINE2_START_END__VLINE2_END__SHIFT
 
- LBV1_LBV_VLINE2_START_END__VLINE2_INV_MASK
 
- LBV1_LBV_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LBV1_LBV_VLINE2_START_END__VLINE2_START_MASK
 
- LBV1_LBV_VLINE2_START_END__VLINE2_START__SHIFT
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LBV1_LBV_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LBV1_LBV_VLINE_START_END__VLINE_END_MASK
 
- LBV1_LBV_VLINE_START_END__VLINE_END__SHIFT
 
- LBV1_LBV_VLINE_START_END__VLINE_INV_MASK
 
- LBV1_LBV_VLINE_START_END__VLINE_INV__SHIFT
 
- LBV1_LBV_VLINE_START_END__VLINE_START_MASK
 
- LBV1_LBV_VLINE_START_END__VLINE_START__SHIFT
 
- LBV1_LBV_VLINE_STATUS__VLINE_ACK_MASK
 
- LBV1_LBV_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LBV1_LBV_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LBV1_LBV_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LBV1_LBV_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LBV1_LBV_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LBV1_LBV_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LBV1_LBV_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LBV1_LBV_VLINE_STATUS__VLINE_STAT_MASK
 
- LBV1_LBV_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LBV1_LBV_V_COUNTER_CHROMA__V_COUNTER_CHROMA_MASK
 
- LBV1_LBV_V_COUNTER_CHROMA__V_COUNTER_CHROMA__SHIFT
 
- LBV1_LBV_V_COUNTER__V_COUNTER_MASK
 
- LBV1_LBV_V_COUNTER__V_COUNTER__SHIFT
 
- LBV_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LBV_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LBV_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LBV_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LBV_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LBV_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LBV_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LBV_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LBV_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LBV_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LBV_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LBV_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LBV_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LBV_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LBV_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LBV_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LBV_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LBV_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LBV_BUFFER_STATUS__LB_ENABLE_HIGH_THROUGHPUT_MASK
 
- LBV_BUFFER_STATUS__LB_ENABLE_HIGH_THROUGHPUT__SHIFT
 
- LBV_BUFFER_STATUS__LB_HIGH_THROUGHPUT_CNTL_MASK
 
- LBV_BUFFER_STATUS__LB_HIGH_THROUGHPUT_CNTL__SHIFT
 
- LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LBV_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LBV_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LBV_DATA_FORMAT__ALPHA_EN_MASK
 
- LBV_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LBV_DATA_FORMAT__DITHER_EN_MASK
 
- LBV_DATA_FORMAT__DITHER_EN__SHIFT
 
- LBV_DATA_FORMAT__DOWNSCALE_PREFETCH_EN_MASK
 
- LBV_DATA_FORMAT__DOWNSCALE_PREFETCH_EN__SHIFT
 
- LBV_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LBV_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LBV_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LBV_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LBV_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LBV_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LBV_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LBV_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LBV_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LBV_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LBV_DATA_FORMAT__PREFETCH_MASK
 
- LBV_DATA_FORMAT__PREFETCH__SHIFT
 
- LBV_DATA_FORMAT__REQUEST_MODE_MASK
 
- LBV_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LBV_DEBUG2__LB_DEBUG2_MASK
 
- LBV_DEBUG2__LB_DEBUG2__SHIFT
 
- LBV_DEBUG3__LB_DEBUG3_MASK
 
- LBV_DEBUG3__LB_DEBUG3__SHIFT
 
- LBV_DEBUG__LB_DEBUG_MASK
 
- LBV_DEBUG__LB_DEBUG__SHIFT
 
- LBV_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LBV_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LBV_DITHER_EN
 
- LBV_DOWNSCALE_PREFETCH_EN
 
- LBV_DYNAMIC_PIXEL_DEPTH
 
- LBV_INTERLEAVE_EN
 
- LBV_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LBV_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LBV_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LBV_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LBV_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LBV_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LBV_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LBV_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LBV_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LBV_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LBV_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LBV_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LBV_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LBV_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LBV_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LBV_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LBV_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LBV_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LBV_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LBV_MEMORY_CONFIG
 
- LBV_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LBV_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LBV_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LBV_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LBV_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LBV_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LBV_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LBV_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LBV_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LBV_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LBV_PIXEL_DEPTH
 
- LBV_PIXEL_EXPAN_MODE
 
- LBV_PIXEL_REDUCE_MODE
 
- LBV_SNAPSHOT_V_COUNTER_CHROMA__SNAPSHOT_V_COUNTER_CHROMA_MASK
 
- LBV_SNAPSHOT_V_COUNTER_CHROMA__SNAPSHOT_V_COUNTER_CHROMA__SHIFT
 
- LBV_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LBV_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LBV_SYNC_DURATION
 
- LBV_SYNC_RESET_SEL2
 
- LBV_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LBV_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LBV_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LBV_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LBV_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LBV_TEST_DEBUG_DATA__LB_TEST_DEBUG_DATA_MASK
 
- LBV_TEST_DEBUG_DATA__LB_TEST_DEBUG_DATA__SHIFT
 
- LBV_TEST_DEBUG_INDEX__LB_TEST_DEBUG_INDEX_MASK
 
- LBV_TEST_DEBUG_INDEX__LB_TEST_DEBUG_INDEX__SHIFT
 
- LBV_TEST_DEBUG_INDEX__LB_TEST_DEBUG_WRITE_EN_MASK
 
- LBV_TEST_DEBUG_INDEX__LB_TEST_DEBUG_WRITE_EN__SHIFT
 
- LBV_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LBV_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LBV_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LBV_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LBV_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LBV_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LBV_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LBV_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LBV_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LBV_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LBV_VLINE2_START_END__VLINE2_END_MASK
 
- LBV_VLINE2_START_END__VLINE2_END__SHIFT
 
- LBV_VLINE2_START_END__VLINE2_INV_MASK
 
- LBV_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LBV_VLINE2_START_END__VLINE2_START_MASK
 
- LBV_VLINE2_START_END__VLINE2_START__SHIFT
 
- LBV_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LBV_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LBV_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LBV_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LBV_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LBV_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LBV_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LBV_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LBV_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LBV_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LBV_VLINE_START_END__VLINE_END_MASK
 
- LBV_VLINE_START_END__VLINE_END__SHIFT
 
- LBV_VLINE_START_END__VLINE_INV_MASK
 
- LBV_VLINE_START_END__VLINE_INV__SHIFT
 
- LBV_VLINE_START_END__VLINE_START_MASK
 
- LBV_VLINE_START_END__VLINE_START__SHIFT
 
- LBV_VLINE_STATUS__VLINE_ACK_MASK
 
- LBV_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LBV_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LBV_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LBV_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LBV_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LBV_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LBV_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LBV_VLINE_STATUS__VLINE_STAT_MASK
 
- LBV_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LBV_V_COUNTER_CHROMA__V_COUNTER_CHROMA_MASK
 
- LBV_V_COUNTER_CHROMA__V_COUNTER_CHROMA__SHIFT
 
- LBV_V_COUNTER__V_COUNTER_MASK
 
- LBV_V_COUNTER__V_COUNTER__SHIFT
 
- LBYTESWAP
 
- LBZ
 
- LBZCIX
 
- LB_64_ENB
 
- LB_ALPHA_DISABLE
 
- LB_ALPHA_EN
 
- LB_ALPHA_ENABLE
 
- LB_ALTITRACK_PID
 
- LB_AON_EMMC_CFG_REG0
 
- LB_AON_EMMC_CFG_REG1
 
- LB_AON_EMMC_CFG_REG2
 
- LB_BATTERY_LEVELS
 
- LB_BITS_PER_ENTRY
 
- LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB_MASK
 
- LB_BLACK_KEYER_B_CB__LB_BLACK_KEYER_B_CB__SHIFT
 
- LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y_MASK
 
- LB_BLACK_KEYER_G_Y__LB_BLACK_KEYER_G_Y__SHIFT
 
- LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR_MASK
 
- LB_BLACK_KEYER_R_CR__LB_BLACK_KEYER_R_CR__SHIFT
 
- LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL_MASK
 
- LB_BUFFER_LEVEL_STATUS__DATA_BUFFER_LEVEL__SHIFT
 
- LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL_MASK
 
- LB_BUFFER_LEVEL_STATUS__DATA_FIFO_FULL_CNTL__SHIFT
 
- LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL_MASK
 
- LB_BUFFER_LEVEL_STATUS__REQ_FIFO_FULL_CNTL__SHIFT
 
- LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL_MASK
 
- LB_BUFFER_LEVEL_STATUS__REQ_FIFO_LEVEL__SHIFT
 
- LB_BUFFER_STATUS_LB_BUFFER_EMPTY_ACK
 
- LB_BUFFER_STATUS_LB_BUFFER_EMPTY_NORMAL
 
- LB_BUFFER_STATUS_LB_BUFFER_EMPTY_RESET
 
- LB_BUFFER_STATUS_LB_BUFFER_FULL_ACK
 
- LB_BUFFER_STATUS_LB_BUFFER_FULL_NORMAL
 
- LB_BUFFER_STATUS_LB_BUFFER_FULL_RESET
 
- LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK_MASK
 
- LB_BUFFER_STATUS__LB_BUFFER_EMPTY_ACK__SHIFT
 
- LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN_MASK
 
- LB_BUFFER_STATUS__LB_BUFFER_EMPTY_MARGIN__SHIFT
 
- LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED_MASK
 
- LB_BUFFER_STATUS__LB_BUFFER_EMPTY_OCCURRED__SHIFT
 
- LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT_MASK
 
- LB_BUFFER_STATUS__LB_BUFFER_EMPTY_STAT__SHIFT
 
- LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK_MASK
 
- LB_BUFFER_STATUS__LB_BUFFER_FULL_ACK__SHIFT
 
- LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED_MASK
 
- LB_BUFFER_STATUS__LB_BUFFER_FULL_OCCURRED__SHIFT
 
- LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT_MASK
 
- LB_BUFFER_STATUS__LB_BUFFER_FULL_STAT__SHIFT
 
- LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF_MASK
 
- LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_OFF__SHIFT
 
- LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON_MASK
 
- LB_BUFFER_URGENCY_CTRL__LB_BUFFER_URGENCY_MARK_ON__SHIFT
 
- LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL_MASK
 
- LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_LEVEL__SHIFT
 
- LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT_MASK
 
- LB_BUFFER_URGENCY_STATUS__LB_BUFFER_URGENCY_STAT__SHIFT
 
- LB_CHIP_ID
 
- LB_CNT_SPIM_ACTIVE
 
- LB_CONFIG
 
- LB_D1_MAX_REQ_OUTSTANDING_MASK
 
- LB_D1_MAX_REQ_OUTSTANDING_SHIFT
 
- LB_D1_VBLANK_INTERRUPT
 
- LB_D1_VLINE_INTERRUPT
 
- LB_D2_MAX_REQ_OUTSTANDING_MASK
 
- LB_D2_MAX_REQ_OUTSTANDING_SHIFT
 
- LB_D2_VBLANK_INTERRUPT
 
- LB_D2_VLINE_INTERRUPT
 
- LB_D3_VBLANK_INTERRUPT
 
- LB_D3_VLINE_INTERRUPT
 
- LB_D4_VBLANK_INTERRUPT
 
- LB_D4_VLINE_INTERRUPT
 
- LB_D5_VBLANK_INTERRUPT
 
- LB_D5_VLINE_INTERRUPT
 
- LB_D6_VBLANK_INTERRUPT
 
- LB_D6_VLINE_INTERRUPT
 
- LB_DATA_FORMAT_ALPHA_DISABLE
 
- LB_DATA_FORMAT_ALPHA_EN
 
- LB_DATA_FORMAT_ALPHA_ENABLE
 
- LB_DATA_FORMAT_DYNAMIC_PIXEL_DEPTH
 
- LB_DATA_FORMAT_DYNAMIC_PIXEL_DEPTH_30BPP
 
- LB_DATA_FORMAT_DYNAMIC_PIXEL_DEPTH_36BPP
 
- LB_DATA_FORMAT_INTERLEAVE_DISABLE
 
- LB_DATA_FORMAT_INTERLEAVE_EN
 
- LB_DATA_FORMAT_INTERLEAVE_ENABLE
 
- LB_DATA_FORMAT_PIXEL_DEPTH
 
- LB_DATA_FORMAT_PIXEL_DEPTH_18BPP
 
- LB_DATA_FORMAT_PIXEL_DEPTH_24BPP
 
- LB_DATA_FORMAT_PIXEL_DEPTH_30BPP
 
- LB_DATA_FORMAT_PIXEL_DEPTH_36BPP
 
- LB_DATA_FORMAT_PIXEL_EXPAN_MODE
 
- LB_DATA_FORMAT_PIXEL_EXPAN_MODE_DYNAMIC_PIXEL_EXPANSION
 
- LB_DATA_FORMAT_PIXEL_EXPAN_MODE_ZERO_PIXEL_EXPANSION
 
- LB_DATA_FORMAT_PIXEL_REDUCE_MODE
 
- LB_DATA_FORMAT_PIXEL_REDUCE_MODE_ROUNDING
 
- LB_DATA_FORMAT_PIXEL_REDUCE_MODE_TRUNCATION
 
- LB_DATA_FORMAT_PREFILL_DISABLE
 
- LB_DATA_FORMAT_PREFILL_EN
 
- LB_DATA_FORMAT_PREFILL_ENABLE
 
- LB_DATA_FORMAT_REQUEST_MODE
 
- LB_DATA_FORMAT_REQUEST_MODE_NORMAL
 
- LB_DATA_FORMAT_REQUEST_MODE_START_OF_LINE
 
- LB_DATA_FORMAT__ALPHA_EN_MASK
 
- LB_DATA_FORMAT__ALPHA_EN__SHIFT
 
- LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH_MASK
 
- LB_DATA_FORMAT__DYNAMIC_PIXEL_DEPTH__SHIFT
 
- LB_DATA_FORMAT__INTERLEAVE_EN_MASK
 
- LB_DATA_FORMAT__INTERLEAVE_EN__SHIFT
 
- LB_DATA_FORMAT__PIXEL_DEPTH_MASK
 
- LB_DATA_FORMAT__PIXEL_DEPTH__SHIFT
 
- LB_DATA_FORMAT__PIXEL_EXPAN_MODE_MASK
 
- LB_DATA_FORMAT__PIXEL_EXPAN_MODE__SHIFT
 
- LB_DATA_FORMAT__PIXEL_REDUCE_MODE_MASK
 
- LB_DATA_FORMAT__PIXEL_REDUCE_MODE__SHIFT
 
- LB_DATA_FORMAT__PREFETCH_MASK
 
- LB_DATA_FORMAT__PREFETCH__SHIFT
 
- LB_DATA_FORMAT__PREFILL_EN_MASK
 
- LB_DATA_FORMAT__PREFILL_EN__SHIFT
 
- LB_DATA_FORMAT__REQUEST_MODE_MASK
 
- LB_DATA_FORMAT__REQUEST_MODE__SHIFT
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_FORCE_ONE
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_FORCE_TO_ONE
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_FORCE_TO_ZERO
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_NO_FORCE_ONE
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_NO_FORCE_ZERO
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_SEL
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_SEL_NOT_USED0
 
- LB_DC_MVP_LB_CONTROL_DC_MVP_SWAP_LOCK_OUT_SEL_NOT_USED1
 
- LB_DC_MVP_LB_CONTROL_MVP_SWAP_LOCK_IN_MODE
 
- LB_DEBUG2__LB_DEBUG2_MASK
 
- LB_DEBUG2__LB_DEBUG2__SHIFT
 
- LB_DEBUG3__LB_DEBUG3_MASK
 
- LB_DEBUG3__LB_DEBUG3__SHIFT
 
- LB_DEBUG__LB_DEBUG_MASK
 
- LB_DEBUG__LB_DEBUG__SHIFT
 
- LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT_MASK
 
- LB_DESKTOP_HEIGHT__DESKTOP_HEIGHT__SHIFT
 
- LB_HTPM_OPT_INST_INFO_BY_HASH
 
- LB_HTPM_PORT_BY_HASH
 
- LB_INTERLEAVE_DISABLE
 
- LB_INTERLEAVE_EN
 
- LB_INTERLEAVE_ENABLE
 
- LB_INTERRUPT_MASK
 
- LB_INTERRUPT_MASK_VBLANK_INTERRUPT_DISABLE
 
- LB_INTERRUPT_MASK_VBLANK_INTERRUPT_ENABLE
 
- LB_INTERRUPT_MASK_VBLANK_INTERRUPT_MASK
 
- LB_INTERRUPT_MASK_VLINE2_INTERRUPT_DISABLE
 
- LB_INTERRUPT_MASK_VLINE2_INTERRUPT_ENABLE
 
- LB_INTERRUPT_MASK_VLINE2_INTERRUPT_MASK
 
- LB_INTERRUPT_MASK_VLINE_INTERRUPT_DISABLE
 
- LB_INTERRUPT_MASK_VLINE_INTERRUPT_ENABLE
 
- LB_INTERRUPT_MASK_VLINE_INTERRUPT_MASK
 
- LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK
 
- LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK__SHIFT
 
- LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK_MASK
 
- LB_INTERRUPT_MASK__VLINE2_INTERRUPT_MASK__SHIFT
 
- LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK
 
- LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK__SHIFT
 
- LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB_MASK
 
- LB_KEYER_COLOR_B_CB__LB_KEYER_COLOR_B_CB__SHIFT
 
- LB_KEYER_COLOR_CTRL_LB_KEYER_COLOR_DISABLE
 
- LB_KEYER_COLOR_CTRL_LB_KEYER_COLOR_EN
 
- LB_KEYER_COLOR_CTRL_LB_KEYER_COLOR_ENABLE
 
- LB_KEYER_COLOR_CTRL_LB_KEYER_COLOR_REPLACEMENT_DISABLE
 
- LB_KEYER_COLOR_CTRL_LB_KEYER_COLOR_REPLACEMENT_ENABLE
 
- LB_KEYER_COLOR_CTRL_LB_KEYER_COLOR_REP_EN
 
- LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN_MASK
 
- LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_EN__SHIFT
 
- LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN_MASK
 
- LB_KEYER_COLOR_CTRL__LB_KEYER_COLOR_REP_EN__SHIFT
 
- LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y_MASK
 
- LB_KEYER_COLOR_G_Y__LB_KEYER_COLOR_G_Y__SHIFT
 
- LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB_MASK
 
- LB_KEYER_COLOR_REP_B_CB__LB_KEYER_COLOR_REP_B_CB__SHIFT
 
- LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y_MASK
 
- LB_KEYER_COLOR_REP_G_Y__LB_KEYER_COLOR_REP_G_Y__SHIFT
 
- LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR_MASK
 
- LB_KEYER_COLOR_REP_R_CR__LB_KEYER_COLOR_REP_R_CR__SHIFT
 
- LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR_MASK
 
- LB_KEYER_COLOR_R_CR__LB_KEYER_COLOR_R_CR__SHIFT
 
- LB_MAX_REQ_OUTSTANDING
 
- LB_MEMORY_CONFIG
 
- LB_MEMORY_CONFIG_0
 
- LB_MEMORY_CONFIG_1
 
- LB_MEMORY_CONFIG_2
 
- LB_MEMORY_CONFIG_3
 
- LB_MEMORY_CTRL
 
- LB_MEMORY_CTRL__LB_MEMORY_CONFIG_MASK
 
- LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
 
- LB_MEMORY_CTRL__LB_MEMORY_SIZE_MASK
 
- LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
 
- LB_MEMORY_CTRL__LB_NUM_PARTITIONS_MASK
 
- LB_MEMORY_CTRL__LB_NUM_PARTITIONS__SHIFT
 
- LB_MEMORY_SIZE
 
- LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS_MASK
 
- LB_MEMORY_SIZE_STATUS__LB_MEMORY_SIZE_STATUS__SHIFT
 
- LB_MEM_ACCESS
 
- LB_MEM_ADDR
 
- LB_MEM_DATA
 
- LB_MEM_HNDSHK
 
- LB_MVP_AFR_FLIP_FIFO_CNTL_MVP_AFR_FLIP_FIFO_NORMAL
 
- LB_MVP_AFR_FLIP_FIFO_CNTL_MVP_AFR_FLIP_FIFO_RESET
 
- LB_MVP_AFR_FLIP_FIFO_CNTL_MVP_AFR_FLIP_FIFO_RESET_ACK
 
- LB_MVP_AFR_FLIP_FIFO_CNTL_MVP_AFR_FLIP_FIFO_RESET_ACK_NOT_USED0
 
- LB_MVP_AFR_FLIP_FIFO_CNTL_MVP_AFR_FLIP_FIFO_RESET_ACK_NOT_USED1
 
- LB_MVP_AFR_FLIP_FIFO_CNTL_MVP_AFR_FLIP_FIFO_RESET_ACTIVE
 
- LB_MVP_AFR_FLIP_MODE_MVP_AFR_FLIP_MODE
 
- LB_MVP_AFR_FLIP_MODE_MVP_AFR_FLIP_MODE_DUMMY_FLIP
 
- LB_MVP_AFR_FLIP_MODE_MVP_AFR_FLIP_MODE_REAL_FLIP
 
- LB_MVP_FLIP_LINE_NUM_INSERT_MVP_FLIP_AUTO_DISABLE
 
- LB_MVP_FLIP_LINE_NUM_INSERT_MVP_FLIP_AUTO_EN
 
- LB_MVP_FLIP_LINE_NUM_INSERT_MVP_FLIP_AUTO_ENABLE
 
- LB_MVP_FLIP_LINE_NUM_INSERT_MVP_FLIP_LINE_NUM_INSERT_MODE
 
- LB_MVP_FLIP_LINE_NUM_INSERT_MVP_FLIP_LINE_NUM_INSERT_MODE_DEBUG
 
- LB_MVP_FLIP_LINE_NUM_INSERT_MVP_FLIP_LINE_NUM_INSERT_MODE_HSYNC_MODE
 
- LB_MVP_FLIP_LINE_NUM_INSERT_MVP_FLIP_LINE_NUM_INSERT_MODE_NO_INSERT
 
- LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT_MASK
 
- LB_NO_OUTSTANDING_REQ_STATUS__LB_NO_OUTSTANDING_REQ_STAT__SHIFT
 
- LB_PATTERN_DEFAULT
 
- LB_PENDING_CMDS_DEFAULT
 
- LB_PIXEL_DEPTH_18BPP
 
- LB_PIXEL_DEPTH_24BPP
 
- LB_PIXEL_DEPTH_30BPP
 
- LB_PIXEL_DEPTH_36BPP
 
- LB_PORTUP_COMP_TIMEOUT
 
- LB_RGB_1280X8
 
- LB_RGB_1920X5
 
- LB_RGB_2560X4
 
- LB_RGB_3840X2
 
- LB_SELECT_TX_PORT_LIST_COUNT
 
- LB_SIZE
 
- LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER_MASK
 
- LB_SNAPSHOT_V_COUNTER__SNAPSHOT_V_COUNTER__SHIFT
 
- LB_SWAP
 
- LB_SYNC_RESET_SEL
 
- LB_SYNC_RESET_SEL_LB_SYNC_DURATION
 
- LB_SYNC_RESET_SEL_LB_SYNC_DURATION_128_CLOCKS
 
- LB_SYNC_RESET_SEL_LB_SYNC_DURATION_16_CLOCKS
 
- LB_SYNC_RESET_SEL_LB_SYNC_DURATION_32_CLOCKS
 
- LB_SYNC_RESET_SEL_LB_SYNC_DURATION_64_CLOCKS
 
- LB_SYNC_RESET_SEL_LB_SYNC_RESET_SEL
 
- LB_SYNC_RESET_SEL_LB_SYNC_RESET_SEL2
 
- LB_SYNC_RESET_SEL_LB_SYNC_RESET_SEL2_USE_VBLANK
 
- LB_SYNC_RESET_SEL_LB_SYNC_RESET_SEL2_USE_VSYNC
 
- LB_SYNC_RESET_SEL_LB_SYNC_RESET_SEL_DISABLE
 
- LB_SYNC_RESET_SEL_LB_SYNC_RESET_SEL_FROM_POWERDOWN_RESET
 
- LB_SYNC_RESET_SEL_LB_SYNC_RESET_SEL_FROM_VSYNC_VBLANK
 
- LB_SYNC_RESET_SEL_LB_SYNC_RESET_SEL_FROM_VSYNC_VBLANK_POWERDOWN_RESET
 
- LB_SYNC_RESET_SEL_MASK
 
- LB_SYNC_RESET_SEL_SHIFT
 
- LB_SYNC_RESET_SEL__LB_SYNC_DURATION_MASK
 
- LB_SYNC_RESET_SEL__LB_SYNC_DURATION__SHIFT
 
- LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY_MASK
 
- LB_SYNC_RESET_SEL__LB_SYNC_RESET_DELAY__SHIFT
 
- LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2_MASK
 
- LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL2__SHIFT
 
- LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL_MASK
 
- LB_SYNC_RESET_SEL__LB_SYNC_RESET_SEL__SHIFT
 
- LB_TEST_DEBUG_DATA__LB_TEST_DEBUG_DATA_MASK
 
- LB_TEST_DEBUG_DATA__LB_TEST_DEBUG_DATA__SHIFT
 
- LB_TEST_DEBUG_INDEX_LB_TEST_DEBUG_WRITE_EN
 
- LB_TEST_DEBUG_INDEX_LB_TEST_DEBUG_WRITE_EN_NOT_USED0
 
- LB_TEST_DEBUG_INDEX_LB_TEST_DEBUG_WRITE_EN_NOT_USED1
 
- LB_TEST_DEBUG_INDEX__LB_TEST_DEBUG_INDEX_MASK
 
- LB_TEST_DEBUG_INDEX__LB_TEST_DEBUG_INDEX__SHIFT
 
- LB_TEST_DEBUG_INDEX__LB_TEST_DEBUG_WRITE_EN_MASK
 
- LB_TEST_DEBUG_INDEX__LB_TEST_DEBUG_WRITE_EN__SHIFT
 
- LB_TOTAL_NUMBER_OF_ENTRIES
 
- LB_TRAS
 
- LB_TRP
 
- LB_TWR
 
- LB_TX_HASHTABLE_SIZE
 
- LB_UFP_EN
 
- LB_VBLANK_STATUS
 
- LB_VBLANK_STATUS_VBLANK_ACK
 
- LB_VBLANK_STATUS_VBLANK_CLEAR
 
- LB_VBLANK_STATUS_VBLANK_INTERRUPT_TYPE
 
- LB_VBLANK_STATUS_VBLANK_INTERRUPT_TYPE_LEVEL_BASED
 
- LB_VBLANK_STATUS_VBLANK_INTERRUPT_TYPE_PULSE_BASED
 
- LB_VBLANK_STATUS_VBLANK_NORMAL
 
- LB_VBLANK_STATUS__VBLANK_ACK_MASK
 
- LB_VBLANK_STATUS__VBLANK_ACK__SHIFT
 
- LB_VBLANK_STATUS__VBLANK_INTERRUPT_MASK
 
- LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK
 
- LB_VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT
 
- LB_VBLANK_STATUS__VBLANK_INTERRUPT__SHIFT
 
- LB_VBLANK_STATUS__VBLANK_OCCURRED_MASK
 
- LB_VBLANK_STATUS__VBLANK_OCCURRED__SHIFT
 
- LB_VBLANK_STATUS__VBLANK_STAT_MASK
 
- LB_VBLANK_STATUS__VBLANK_STAT__SHIFT
 
- LB_VLINE2_START_END_VLINE2_INV
 
- LB_VLINE2_START_END_VLINE2_INVERSE
 
- LB_VLINE2_START_END_VLINE2_NORMAL
 
- LB_VLINE2_START_END__VLINE2_END_MASK
 
- LB_VLINE2_START_END__VLINE2_END__SHIFT
 
- LB_VLINE2_START_END__VLINE2_INV_MASK
 
- LB_VLINE2_START_END__VLINE2_INV__SHIFT
 
- LB_VLINE2_START_END__VLINE2_START_MASK
 
- LB_VLINE2_START_END__VLINE2_START__SHIFT
 
- LB_VLINE2_STATUS_VLINE2_ACK
 
- LB_VLINE2_STATUS_VLINE2_CLEAR
 
- LB_VLINE2_STATUS_VLINE2_INTERRUPT_TYPE
 
- LB_VLINE2_STATUS_VLINE2_INTERRUPT_TYPE_LEVEL_BASED
 
- LB_VLINE2_STATUS_VLINE2_INTERRUPT_TYPE_PULSE_BASED
 
- LB_VLINE2_STATUS_VLINE2_NORMAL
 
- LB_VLINE2_STATUS__VLINE2_ACK_MASK
 
- LB_VLINE2_STATUS__VLINE2_ACK__SHIFT
 
- LB_VLINE2_STATUS__VLINE2_INTERRUPT_MASK
 
- LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE_MASK
 
- LB_VLINE2_STATUS__VLINE2_INTERRUPT_TYPE__SHIFT
 
- LB_VLINE2_STATUS__VLINE2_INTERRUPT__SHIFT
 
- LB_VLINE2_STATUS__VLINE2_OCCURRED_MASK
 
- LB_VLINE2_STATUS__VLINE2_OCCURRED__SHIFT
 
- LB_VLINE2_STATUS__VLINE2_STAT_MASK
 
- LB_VLINE2_STATUS__VLINE2_STAT__SHIFT
 
- LB_VLINE_START_END_VLINE_INV
 
- LB_VLINE_START_END_VLINE_INVERSE
 
- LB_VLINE_START_END_VLINE_NORMAL
 
- LB_VLINE_START_END__VLINE_END_MASK
 
- LB_VLINE_START_END__VLINE_END__SHIFT
 
- LB_VLINE_START_END__VLINE_INV_MASK
 
- LB_VLINE_START_END__VLINE_INV__SHIFT
 
- LB_VLINE_START_END__VLINE_START_MASK
 
- LB_VLINE_START_END__VLINE_START__SHIFT
 
- LB_VLINE_STATUS
 
- LB_VLINE_STATUS_VLINE_ACK
 
- LB_VLINE_STATUS_VLINE_CLEAR
 
- LB_VLINE_STATUS_VLINE_INTERRUPT_TYPE
 
- LB_VLINE_STATUS_VLINE_INTERRUPT_TYPE_LEVEL_BASED
 
- LB_VLINE_STATUS_VLINE_INTERRUPT_TYPE_PULSE_BASED
 
- LB_VLINE_STATUS_VLINE_NORMAL
 
- LB_VLINE_STATUS__VLINE_ACK_MASK
 
- LB_VLINE_STATUS__VLINE_ACK__SHIFT
 
- LB_VLINE_STATUS__VLINE_INTERRUPT_MASK
 
- LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE_MASK
 
- LB_VLINE_STATUS__VLINE_INTERRUPT_TYPE__SHIFT
 
- LB_VLINE_STATUS__VLINE_INTERRUPT__SHIFT
 
- LB_VLINE_STATUS__VLINE_OCCURRED_MASK
 
- LB_VLINE_STATUS__VLINE_OCCURRED__SHIFT
 
- LB_VLINE_STATUS__VLINE_STAT_MASK
 
- LB_VLINE_STATUS__VLINE_STAT__SHIFT
 
- LB_V_COUNTER__V_COUNTER_MASK
 
- LB_V_COUNTER__V_COUNTER__SHIFT
 
- LB_YUV_2560X8
 
- LB_YUV_3840X5
 
- LC
 
- LC0
 
- LC1
 
- LC82C168
 
- LCA4_CPU
 
- LCACHE_LOCK
 
- LCACHE_SLEEP_COND
 
- LCACHE_UNLOCK
 
- LCACHE_WAKEUP
 
- LCAC_CPL_CNTL
 
- LCAC_CPL_CNTL__CPL_BLOCK_ID_MASK
 
- LCAC_CPL_CNTL__CPL_BLOCK_ID__SHIFT
 
- LCAC_CPL_CNTL__CPL_ENABLE_MASK
 
- LCAC_CPL_CNTL__CPL_ENABLE__SHIFT
 
- LCAC_CPL_CNTL__CPL_SIGNAL_ID_MASK
 
- LCAC_CPL_CNTL__CPL_SIGNAL_ID__SHIFT
 
- LCAC_CPL_CNTL__CPL_THRESHOLD_MASK
 
- LCAC_CPL_CNTL__CPL_THRESHOLD__SHIFT
 
- LCAC_CPL_OVR_SEL
 
- LCAC_CPL_OVR_SEL__CPL_OVR_SEL_MASK
 
- LCAC_CPL_OVR_SEL__CPL_OVR_SEL__SHIFT
 
- LCAC_CPL_OVR_VAL
 
- LCAC_CPL_OVR_VAL__CPL_OVR_VAL_MASK
 
- LCAC_CPL_OVR_VAL__CPL_OVR_VAL__SHIFT
 
- LCAC_MC0_CNTL
 
- LCAC_MC0_CNTL__MC0_BLOCK_ID_MASK
 
- LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT
 
- LCAC_MC0_CNTL__MC0_ENABLE_MASK
 
- LCAC_MC0_CNTL__MC0_ENABLE__SHIFT
 
- LCAC_MC0_CNTL__MC0_SIGNAL_ID_MASK
 
- LCAC_MC0_CNTL__MC0_SIGNAL_ID__SHIFT
 
- LCAC_MC0_CNTL__MC0_THRESHOLD_MASK
 
- LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT
 
- LCAC_MC0_OVR_SEL
 
- LCAC_MC0_OVR_SEL__MC0_OVR_SEL_MASK
 
- LCAC_MC0_OVR_SEL__MC0_OVR_SEL__SHIFT
 
- LCAC_MC0_OVR_VAL
 
- LCAC_MC0_OVR_VAL__MC0_OVR_VAL_MASK
 
- LCAC_MC0_OVR_VAL__MC0_OVR_VAL__SHIFT
 
- LCAC_MC1_CNTL
 
- LCAC_MC1_CNTL__MC1_BLOCK_ID_MASK
 
- LCAC_MC1_CNTL__MC1_BLOCK_ID__SHIFT
 
- LCAC_MC1_CNTL__MC1_ENABLE_MASK
 
- LCAC_MC1_CNTL__MC1_ENABLE__SHIFT
 
- LCAC_MC1_CNTL__MC1_SIGNAL_ID_MASK
 
- LCAC_MC1_CNTL__MC1_SIGNAL_ID__SHIFT
 
- LCAC_MC1_CNTL__MC1_THRESHOLD_MASK
 
- LCAC_MC1_CNTL__MC1_THRESHOLD__SHIFT
 
- LCAC_MC1_OVR_SEL
 
- LCAC_MC1_OVR_SEL__MC1_OVR_SEL_MASK
 
- LCAC_MC1_OVR_SEL__MC1_OVR_SEL__SHIFT
 
- LCAC_MC1_OVR_VAL
 
- LCAC_MC1_OVR_VAL__MC1_OVR_VAL_MASK
 
- LCAC_MC1_OVR_VAL__MC1_OVR_VAL__SHIFT
 
- LCAC_MC2_CNTL__MC2_BLOCK_ID_MASK
 
- LCAC_MC2_CNTL__MC2_BLOCK_ID__SHIFT
 
- LCAC_MC2_CNTL__MC2_ENABLE_MASK
 
- LCAC_MC2_CNTL__MC2_ENABLE__SHIFT
 
- LCAC_MC2_CNTL__MC2_SIGNAL_ID_MASK
 
- LCAC_MC2_CNTL__MC2_SIGNAL_ID__SHIFT
 
- LCAC_MC2_CNTL__MC2_THRESHOLD_MASK
 
- LCAC_MC2_CNTL__MC2_THRESHOLD__SHIFT
 
- LCAC_MC2_OVR_SEL
 
- LCAC_MC2_OVR_SEL__MC2_OVR_SEL_MASK
 
- LCAC_MC2_OVR_SEL__MC2_OVR_SEL__SHIFT
 
- LCAC_MC2_OVR_VAL
 
- LCAC_MC2_OVR_VAL__MC2_OVR_VAL_MASK
 
- LCAC_MC2_OVR_VAL__MC2_OVR_VAL__SHIFT
 
- LCAC_MC3_CNTL__MC3_BLOCK_ID_MASK
 
- LCAC_MC3_CNTL__MC3_BLOCK_ID__SHIFT
 
- LCAC_MC3_CNTL__MC3_ENABLE_MASK
 
- LCAC_MC3_CNTL__MC3_ENABLE__SHIFT
 
- LCAC_MC3_CNTL__MC3_SIGNAL_ID_MASK
 
- LCAC_MC3_CNTL__MC3_SIGNAL_ID__SHIFT
 
- LCAC_MC3_CNTL__MC3_THRESHOLD_MASK
 
- LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT
 
- LCAC_MC3_OVR_SEL
 
- LCAC_MC3_OVR_SEL__MC3_OVR_SEL_MASK
 
- LCAC_MC3_OVR_SEL__MC3_OVR_SEL__SHIFT
 
- LCAC_MC3_OVR_VAL
 
- LCAC_MC3_OVR_VAL__MC3_OVR_VAL_MASK
 
- LCAC_MC3_OVR_VAL__MC3_OVR_VAL__SHIFT
 
- LCAC_MC4_CNTL__MC4_BLOCK_ID_MASK
 
- LCAC_MC4_CNTL__MC4_BLOCK_ID__SHIFT
 
- LCAC_MC4_CNTL__MC4_ENABLE_MASK
 
- LCAC_MC4_CNTL__MC4_ENABLE__SHIFT
 
- LCAC_MC4_CNTL__MC4_SIGNAL_ID_MASK
 
- LCAC_MC4_CNTL__MC4_SIGNAL_ID__SHIFT
 
- LCAC_MC4_CNTL__MC4_THRESHOLD_MASK
 
- LCAC_MC4_CNTL__MC4_THRESHOLD__SHIFT
 
- LCAC_MC4_OVR_SEL__MC4_OVR_SEL_MASK
 
- LCAC_MC4_OVR_SEL__MC4_OVR_SEL__SHIFT
 
- LCAC_MC4_OVR_VAL__MC4_OVR_VAL_MASK
 
- LCAC_MC4_OVR_VAL__MC4_OVR_VAL__SHIFT
 
- LCAC_MC5_CNTL__MC5_BLOCK_ID_MASK
 
- LCAC_MC5_CNTL__MC5_BLOCK_ID__SHIFT
 
- LCAC_MC5_CNTL__MC5_ENABLE_MASK
 
- LCAC_MC5_CNTL__MC5_ENABLE__SHIFT
 
- LCAC_MC5_CNTL__MC5_SIGNAL_ID_MASK
 
- LCAC_MC5_CNTL__MC5_SIGNAL_ID__SHIFT
 
- LCAC_MC5_CNTL__MC5_THRESHOLD_MASK
 
- LCAC_MC5_CNTL__MC5_THRESHOLD__SHIFT
 
- LCAC_MC5_OVR_SEL__MC5_OVR_SEL_MASK
 
- LCAC_MC5_OVR_SEL__MC5_OVR_SEL__SHIFT
 
- LCAC_MC5_OVR_VAL__MC5_OVR_VAL_MASK
 
- LCAC_MC5_OVR_VAL__MC5_OVR_VAL__SHIFT
 
- LCAC_MC6_CNTL__MC6_BLOCK_ID_MASK
 
- LCAC_MC6_CNTL__MC6_BLOCK_ID__SHIFT
 
- LCAC_MC6_CNTL__MC6_ENABLE_MASK
 
- LCAC_MC6_CNTL__MC6_ENABLE__SHIFT
 
- LCAC_MC6_CNTL__MC6_SIGNAL_ID_MASK
 
- LCAC_MC6_CNTL__MC6_SIGNAL_ID__SHIFT
 
- LCAC_MC6_CNTL__MC6_THRESHOLD_MASK
 
- LCAC_MC6_CNTL__MC6_THRESHOLD__SHIFT
 
- LCAC_MC6_OVR_SEL__MC6_OVR_SEL_MASK
 
- LCAC_MC6_OVR_SEL__MC6_OVR_SEL__SHIFT
 
- LCAC_MC6_OVR_VAL__MC6_OVR_VAL_MASK
 
- LCAC_MC6_OVR_VAL__MC6_OVR_VAL__SHIFT
 
- LCAC_MC7_CNTL__MC7_BLOCK_ID_MASK
 
- LCAC_MC7_CNTL__MC7_BLOCK_ID__SHIFT
 
- LCAC_MC7_CNTL__MC7_ENABLE_MASK
 
- LCAC_MC7_CNTL__MC7_ENABLE__SHIFT
 
- LCAC_MC7_CNTL__MC7_SIGNAL_ID_MASK
 
- LCAC_MC7_CNTL__MC7_SIGNAL_ID__SHIFT
 
- LCAC_MC7_CNTL__MC7_THRESHOLD_MASK
 
- LCAC_MC7_CNTL__MC7_THRESHOLD__SHIFT
 
- LCAC_MC7_OVR_SEL__MC7_OVR_SEL_MASK
 
- LCAC_MC7_OVR_SEL__MC7_OVR_SEL__SHIFT
 
- LCAC_MC7_OVR_VAL__MC7_OVR_VAL_MASK
 
- LCAC_MC7_OVR_VAL__MC7_OVR_VAL__SHIFT
 
- LCAC_SX0_CNTL__SX0_BLOCK_ID_MASK
 
- LCAC_SX0_CNTL__SX0_BLOCK_ID__SHIFT
 
- LCAC_SX0_CNTL__SX0_ENABLE_MASK
 
- LCAC_SX0_CNTL__SX0_ENABLE__SHIFT
 
- LCAC_SX0_CNTL__SX0_SIGNAL_ID_MASK
 
- LCAC_SX0_CNTL__SX0_SIGNAL_ID__SHIFT
 
- LCAC_SX0_CNTL__SX0_THRESHOLD_MASK
 
- LCAC_SX0_CNTL__SX0_THRESHOLD__SHIFT
 
- LCAC_SX0_OVR_SEL
 
- LCAC_SX0_OVR_SEL__SX0_OVR_SEL_MASK
 
- LCAC_SX0_OVR_SEL__SX0_OVR_SEL__SHIFT
 
- LCAC_SX0_OVR_VAL
 
- LCAC_SX0_OVR_VAL__SX0_OVR_VAL_MASK
 
- LCAC_SX0_OVR_VAL__SX0_OVR_VAL__SHIFT
 
- LCAR
 
- LCA_CONF
 
- LCA_DENSE_MEM
 
- LCA_GET_OVERRIDE
 
- LCA_GET_PRIMARY
 
- LCA_HAE_ADDRESS
 
- LCA_IACK_SC
 
- LCA_IO
 
- LCA_IOC_CONF
 
- LCA_IOC_HAE
 
- LCA_IOC_PAR_DIS
 
- LCA_IOC_SFT_RST
 
- LCA_IOC_STAT0
 
- LCA_IOC_STAT0_CMD
 
- LCA_IOC_STAT0_CODE_MASK
 
- LCA_IOC_STAT0_CODE_SHIFT
 
- LCA_IOC_STAT0_ERR
 
- LCA_IOC_STAT0_LOST
 
- LCA_IOC_STAT0_P_NBR_MASK
 
- LCA_IOC_STAT0_P_NBR_SHIFT
 
- LCA_IOC_STAT0_THIT
 
- LCA_IOC_STAT0_TREF
 
- LCA_IOC_STAT1
 
- LCA_IOC_TBIA
 
- LCA_IOC_TB_ENA
 
- LCA_IOC_TB_TAG0
 
- LCA_IOC_TB_TAG1
 
- LCA_IOC_TB_TAG2
 
- LCA_IOC_TB_TAG3
 
- LCA_IOC_TB_TAG4
 
- LCA_IOC_TB_TAG5
 
- LCA_IOC_TB_TAG6
 
- LCA_IOC_TB_TAG7
 
- LCA_IOC_T_BASE0
 
- LCA_IOC_T_BASE1
 
- LCA_IOC_W_BASE0
 
- LCA_IOC_W_BASE1
 
- LCA_IOC_W_MASK0
 
- LCA_IOC_W_MASK1
 
- LCA_MEM_BCR0
 
- LCA_MEM_BCR1
 
- LCA_MEM_BCR2
 
- LCA_MEM_BCR3
 
- LCA_MEM_BMR0
 
- LCA_MEM_BMR1
 
- LCA_MEM_BMR2
 
- LCA_MEM_BMR3
 
- LCA_MEM_BTR0
 
- LCA_MEM_BTR1
 
- LCA_MEM_BTR2
 
- LCA_MEM_BTR3
 
- LCA_MEM_CAR
 
- LCA_MEM_EAR
 
- LCA_MEM_ESR
 
- LCA_MEM_FOR
 
- LCA_MEM_GTR
 
- LCA_MEM_PLM
 
- LCA_MEM_VGR
 
- LCA_PMR_ADDR
 
- LCA_PMR_DIV_1
 
- LCA_PMR_DIV_16
 
- LCA_PMR_DIV_1_5
 
- LCA_PMR_DIV_2
 
- LCA_PMR_DIV_4
 
- LCA_PMR_DIV_8
 
- LCA_PMR_DIV_MAX
 
- LCA_PMR_DIV_MIN
 
- LCA_PMR_DMAO
 
- LCA_PMR_INTO
 
- LCA_PMR_OCCEB
 
- LCA_PMR_OCCOB
 
- LCA_PMR_ODIV
 
- LCA_PMR_PDIV
 
- LCA_PMR_PRIMARY_MASK
 
- LCA_READ_PMR
 
- LCA_SET_HAE
 
- LCA_SET_PRIMARY_CLOCK
 
- LCA_SPARSE_MEM
 
- LCA_WRITE_PMR
 
- LCBE
 
- LCB_CAPABILITY_DURATION
 
- LCB_CRC_12B_16B_PER_LANE
 
- LCB_CRC_14B
 
- LCB_CRC_16B
 
- LCB_CRC_48B
 
- LCB_END
 
- LCB_RX_FPE_TX_FPE_INTO_RESET
 
- LCB_RX_FPE_TX_FPE_OUT_OF_RESET
 
- LCB_START
 
- LCC0
 
- LCC1
 
- LCC2
 
- LCC3
 
- LCC4
 
- LCC5
 
- LCC5_LCC_COLOR
 
- LCC5_LCC_ENABLE
 
- LCC6
 
- LCCR
 
- LCCR0
 
- LCCR0_4PixMono
 
- LCCR0_8PixMono
 
- LCCR0_Act
 
- LCCR0_BAM
 
- LCCR0_BLE
 
- LCCR0_BM
 
- LCCR0_BigEnd
 
- LCCR0_CMDIM
 
- LCCR0_CMS
 
- LCCR0_Color
 
- LCCR0_DIS
 
- LCCR0_DMADel
 
- LCCR0_DPD
 
- LCCR0_Dual
 
- LCCR0_EFM
 
- LCCR0_ENB
 
- LCCR0_ERM
 
- LCCR0_INVALID_CONFIG_MASK
 
- LCCR0_IUM
 
- LCCR0_LCDT
 
- LCCR0_LDDALT
 
- LCCR0_LDM
 
- LCCR0_LEN
 
- LCCR0_LtlEnd
 
- LCCR0_Mono
 
- LCCR0_OUC
 
- LCCR0_OUM
 
- LCCR0_PAS
 
- LCCR0_PDD
 
- LCCR0_PDD_S
 
- LCCR0_Pas
 
- LCCR0_QDM
 
- LCCR0_RDSTM
 
- LCCR0_SDS
 
- LCCR0_SFM
 
- LCCR0_Sngl
 
- LCCR1
 
- LCCR1_BLW
 
- LCCR1_BegLnDel
 
- LCCR1_DisWdth
 
- LCCR1_ELW
 
- LCCR1_EndLnDel
 
- LCCR1_HSW
 
- LCCR1_HorSnchWdth
 
- LCCR1_PPL
 
- LCCR2
 
- LCCR2_BFW
 
- LCCR2_BegFrmDel
 
- LCCR2_DisHght
 
- LCCR2_EFW
 
- LCCR2_EndFrmDel
 
- LCCR2_LPP
 
- LCCR2_VSW
 
- LCCR2_VrtSnchWdth
 
- LCCR3
 
- LCCR3_ACB
 
- LCCR3_ACBsCnt
 
- LCCR3_ACBsCntOff
 
- LCCR3_ACBsDiv
 
- LCCR3_API
 
- LCCR3_API_S
 
- LCCR3_Acb
 
- LCCR3_BPP
 
- LCCR3_CeilACBsDiv
 
- LCCR3_CeilPixClkDiv
 
- LCCR3_DPC
 
- LCCR3_HSP
 
- LCCR3_HorSnchH
 
- LCCR3_HorSnchL
 
- LCCR3_INVALID_CONFIG_MASK
 
- LCCR3_OEP
 
- LCCR3_OutEnH
 
- LCCR3_OutEnL
 
- LCCR3_PCD
 
- LCCR3_PCP
 
- LCCR3_PDFOR_0
 
- LCCR3_PDFOR_1
 
- LCCR3_PDFOR_2
 
- LCCR3_PDFOR_3
 
- LCCR3_PixClkDiv
 
- LCCR3_PixFlEdg
 
- LCCR3_PixRsEdg
 
- LCCR3_VSP
 
- LCCR3_VrtSnchH
 
- LCCR3_VrtSnchL
 
- LCCR4
 
- LCCR4_PAL_FOR_0
 
- LCCR4_PAL_FOR_1
 
- LCCR4_PAL_FOR_2
 
- LCCR4_PAL_FOR_3
 
- LCCR4_PAL_FOR_MASK
 
- LCCR5
 
- LCCR5_BSM
 
- LCCR5_EOFM
 
- LCCR5_IUM
 
- LCCR5_SOFM
 
- LCD
 
- LCD0_CS_MARK
 
- LCD0_D0_MARK
 
- LCD0_D10_MARK
 
- LCD0_D11_MARK
 
- LCD0_D12_MARK
 
- LCD0_D13_MARK
 
- LCD0_D14_MARK
 
- LCD0_D15_MARK
 
- LCD0_D16_MARK
 
- LCD0_D17_MARK
 
- LCD0_D18
 
- LCD0_D18_PORT163_MARK
 
- LCD0_D18_PORT40_MARK
 
- LCD0_D19_PORT162_MARK
 
- LCD0_D19_PORT4_MARK
 
- LCD0_D1_MARK
 
- LCD0_D2
 
- LCD0_D20_PORT161_MARK
 
- LCD0_D20_PORT3_MARK
 
- LCD0_D21_PORT158_MARK
 
- LCD0_D21_PORT2_MARK
 
- LCD0_D22_PORT0_MARK
 
- LCD0_D22_PORT160_MARK
 
- LCD0_D23_PORT159_MARK
 
- LCD0_D23_PORT1_MARK
 
- LCD0_D2_MARK
 
- LCD0_D3_MARK
 
- LCD0_D4_MARK
 
- LCD0_D5_MARK
 
- LCD0_D6_MARK
 
- LCD0_D7_MARK
 
- LCD0_D8_MARK
 
- LCD0_D9_MARK
 
- LCD0_DCK_MARK
 
- LCD0_DISP_MARK
 
- LCD0_DON_MARK
 
- LCD0_HSYN_MARK
 
- LCD0_LCLK_PORT102_MARK
 
- LCD0_LCLK_PORT165_MARK
 
- LCD0_RD_MARK
 
- LCD0_RS_MARK
 
- LCD0_VCPWC_MARK
 
- LCD0_VEPWC_MARK
 
- LCD0_VSYN_MARK
 
- LCD0_WR_MARK
 
- LCD1OutputControl
 
- LCD1_CS_MARK
 
- LCD1_D0_MARK
 
- LCD1_D10_MARK
 
- LCD1_D11_MARK
 
- LCD1_D12_MARK
 
- LCD1_D13_MARK
 
- LCD1_D14_MARK
 
- LCD1_D15_MARK
 
- LCD1_D16_MARK
 
- LCD1_D17_MARK
 
- LCD1_D18_MARK
 
- LCD1_D19_MARK
 
- LCD1_D1_MARK
 
- LCD1_D20_MARK
 
- LCD1_D21_MARK
 
- LCD1_D22_MARK
 
- LCD1_D23_MARK
 
- LCD1_D2_MARK
 
- LCD1_D3_MARK
 
- LCD1_D4_MARK
 
- LCD1_D5_MARK
 
- LCD1_D6_MARK
 
- LCD1_D7_MARK
 
- LCD1_D8_MARK
 
- LCD1_D9_MARK
 
- LCD1_DCK_MARK
 
- LCD1_DISP_MARK
 
- LCD1_DON_MARK
 
- LCD1_HSYN_MARK
 
- LCD1_LCLK_MARK
 
- LCD1_OUTPUT_CONTROL_PARAMETERS
 
- LCD1_OUTPUT_CONTROL_PS_ALLOCATION
 
- LCD1_RD_MARK
 
- LCD1_RS_MARK
 
- LCD1_VCPWC_MARK
 
- LCD1_VEPWC_MARK
 
- LCD1_VSYN_MARK
 
- LCD1_WR_MARK
 
- LCD2D0_MARK
 
- LCD2D10_MARK
 
- LCD2D11_MARK
 
- LCD2D12_MARK
 
- LCD2D13_MARK
 
- LCD2D14_MARK
 
- LCD2D15_MARK
 
- LCD2D16_MARK
 
- LCD2D17_MARK
 
- LCD2D18_MARK
 
- LCD2D19_MARK
 
- LCD2D1_MARK
 
- LCD2D20_MARK
 
- LCD2D21_MARK
 
- LCD2D22_MARK
 
- LCD2D23_MARK
 
- LCD2D2_MARK
 
- LCD2D3_MARK
 
- LCD2D4_MARK
 
- LCD2D5_MARK
 
- LCD2D6_MARK
 
- LCD2D7_MARK
 
- LCD2D8_MARK
 
- LCD2D9_MARK
 
- LCD2DCK_2_MARK
 
- LCD2DCK_MARK
 
- LCD2RD__MARK
 
- LCD2_Device
 
- LCD3_B0_MARK
 
- LCD3_B1_MARK
 
- LCD3_B2_MARK
 
- LCD3_B3_MARK
 
- LCD3_B4_MARK
 
- LCD3_B5_MARK
 
- LCD3_B6_MARK
 
- LCD3_B7_MARK
 
- LCD3_CLK_I_MARK
 
- LCD3_DE_MARK
 
- LCD3_G0_MARK
 
- LCD3_G1_MARK
 
- LCD3_G2_MARK
 
- LCD3_G3_MARK
 
- LCD3_G4_MARK
 
- LCD3_G5_MARK
 
- LCD3_G6_MARK
 
- LCD3_G7_MARK
 
- LCD3_HS_MARK
 
- LCD3_PXCLKB_MARK
 
- LCD3_PXCLK_MARK
 
- LCD3_R0_MARK
 
- LCD3_R1_MARK
 
- LCD3_R2_MARK
 
- LCD3_R3_MARK
 
- LCD3_R4_MARK
 
- LCD3_R5_MARK
 
- LCD3_R6_MARK
 
- LCD3_R7_MARK
 
- LCD3_VS_MARK
 
- LCDC
 
- LCDCFG_IN_FMT
 
- LCDCFG_LCD1C_DS
 
- LCDCFG_LCD1DEN_POL
 
- LCDCFG_LCD1D_DS
 
- LCDCFG_LCD1D_POL
 
- LCDCFG_LCD1FCLK_POL
 
- LCDCFG_LCD1LCLK_POL
 
- LCDCFG_LCD1_IS_IN
 
- LCDCFG_LCD1_TS
 
- LCDCFG_LCD2C_DS
 
- LCDCFG_LCD2DEN_POL
 
- LCDCFG_LCD2D_DS
 
- LCDCFG_LCD2D_POL
 
- LCDCFG_LCD2FCLK_POL
 
- LCDCFG_LCD2LCLK_POL
 
- LCDCFG_LCD2_IS_IN
 
- LCDCFG_LCD2_TS
 
- LCDCON_GSEN
 
- LCDCON_GSMD
 
- LCDCS
 
- LCDCS2_MARK
 
- LCDCS2__MARK
 
- LCDCS_MARK
 
- LCDCS__MARK
 
- LCDCTRL
 
- LCDC_AC_BIAS_FREQUENCY
 
- LCDC_AC_BIAS_FREQUENCY_MASK
 
- LCDC_AC_BIAS_TRANSITIONS_PER_INT
 
- LCDC_AC_BIAS_TRANSITIONS_PER_INT_MASK
 
- LCDC_CHAN_DISABLED
 
- LCDC_CHAN_MAINLCD
 
- LCDC_CHAN_SUBLCD
 
- LCDC_CLKSRC_BUSCLOCK
 
- LCDC_CLKSRC_EXTERNAL
 
- LCDC_CLKSRC_PERIPHERAL
 
- LCDC_CLK_BUS
 
- LCDC_CLK_DIVISOR
 
- LCDC_CLK_DIVISOR_MASK
 
- LCDC_CLK_ENABLE_REG
 
- LCDC_CLK_EXTERNAL
 
- LCDC_CLK_MAIN_RESET
 
- LCDC_CLK_PERIPHERAL
 
- LCDC_CLK_RESET_REG
 
- LCDC_CPOS
 
- LCDC_CTRL
 
- LCDC_CTRL1
 
- LCDC_CTRL_REG
 
- LCDC_DMACR
 
- LCDC_DMA_BURST_1
 
- LCDC_DMA_BURST_16
 
- LCDC_DMA_BURST_2
 
- LCDC_DMA_BURST_4
 
- LCDC_DMA_BURST_8
 
- LCDC_DMA_BURST_SIZE
 
- LCDC_DMA_BURST_SIZE_MASK
 
- LCDC_DMA_CTRL_REG
 
- LCDC_DMA_FB_BASE_ADDR_0_REG
 
- LCDC_DMA_FB_BASE_ADDR_1_REG
 
- LCDC_DMA_FB_CEILING_ADDR_0_REG
 
- LCDC_DMA_FB_CEILING_ADDR_1_REG
 
- LCDC_DMA_FIFO_THRESHOLD
 
- LCDC_DMA_FIFO_THRESHOLD_MASK
 
- LCDC_DUAL_FRAME_BUFFER_ENABLE
 
- LCDC_END_OF_FRAME0
 
- LCDC_END_OF_FRAME1
 
- LCDC_END_OF_INT_IND_REG
 
- LCDC_FIFO_UNDERFLOW
 
- LCDC_FLAGS_DAPOL
 
- LCDC_FLAGS_DIPOL
 
- LCDC_FLAGS_DWCNT
 
- LCDC_FLAGS_DWPOL
 
- LCDC_FLAGS_HSCNT
 
- LCDC_FRAME_DONE
 
- LCDC_H
 
- LCDC_HCR
 
- LCDC_INT_ENABLE_CLR_REG
 
- LCDC_INT_ENABLE_SET_REG
 
- LCDC_INVERT_HSYNC
 
- LCDC_INVERT_PIXEL_CLOCK
 
- LCDC_INVERT_VSYNC
 
- LCDC_LAUSCR
 
- LCDC_LCDC0_MARK
 
- LCDC_LCDC1_MARK
 
- LCDC_LCDCI
 
- LCDC_LCDICR
 
- LCDC_LCDISR
 
- LCDC_LCHCC
 
- LCDC_LCWHB
 
- LCDC_LPP_B10
 
- LCDC_LSCR1
 
- LCDC_M
 
- LCDC_MASKED_STAT_REG
 
- LCDC_MIRROR_OFFSET
 
- LCDC_MONOCHROME_MODE
 
- LCDC_MONO_8BIT_MODE
 
- LCDC_OVERLAY_BLEND
 
- LCDC_OVERLAY_ROP3
 
- LCDC_PALETTE_LOAD_MODE
 
- LCDC_PALETTE_LOAD_MODE_MASK
 
- LCDC_PCR
 
- LCDC_PID_REG
 
- LCDC_PL_LOAD_DONE
 
- LCDC_POS
 
- LCDC_PWMR
 
- LCDC_RASTER_CTRL_REG
 
- LCDC_RASTER_ENABLE
 
- LCDC_RASTER_MODE
 
- LCDC_RASTER_ORDER
 
- LCDC_RASTER_TIMING_0_REG
 
- LCDC_RASTER_TIMING_1_REG
 
- LCDC_RASTER_TIMING_2_REG
 
- LCDC_RAW_STAT_REG
 
- LCDC_RMCR
 
- LCDC_SIDE_B_OFFSET
 
- LCDC_SIZE
 
- LCDC_SSA
 
- LCDC_STAT_REG
 
- LCDC_STN_565_ENABLE
 
- LCDC_SYNC_CTRL
 
- LCDC_SYNC_EDGE
 
- LCDC_SYNC_LOST
 
- LCDC_TFT_ALT_ENABLE
 
- LCDC_TFT_MODE
 
- LCDC_V1_END_OF_FRAME_INT_ENA
 
- LCDC_V1_FRAME_DONE_INT_ENA
 
- LCDC_V1_PL_INT_ENA
 
- LCDC_V1_SYNC_LOST_INT_ENA
 
- LCDC_V1_UNDERFLOW_INT_ENA
 
- LCDC_V2_CORE_CLK_EN
 
- LCDC_V2_DMA_CLK_EN
 
- LCDC_V2_END_OF_FRAME0_INT_ENA
 
- LCDC_V2_END_OF_FRAME1_INT_ENA
 
- LCDC_V2_LIDD_CLK_EN
 
- LCDC_V2_LPP_B10
 
- LCDC_V2_PL_INT_ENA
 
- LCDC_V2_TFT_24BPP_MODE
 
- LCDC_V2_TFT_24BPP_UNPACK
 
- LCDC_V2_UNDERFLOW_INT_ENA
 
- LCDC_V3_CUR_BUF
 
- LCDC_V3_DEBUG0
 
- LCDC_V3_NEXT_BUF
 
- LCDC_V3_TRANSFER_COUNT
 
- LCDC_V4_CUR_BUF
 
- LCDC_V4_DEBUG0
 
- LCDC_V4_NEXT_BUF
 
- LCDC_V4_TRANSFER_COUNT
 
- LCDC_VCR
 
- LCDC_VDCTRL0
 
- LCDC_VDCTRL1
 
- LCDC_VDCTRL2
 
- LCDC_VDCTRL3
 
- LCDC_VDCTRL4
 
- LCDC_VPW
 
- LCDD0
 
- LCDD0_DV_D0
 
- LCDD0_MARK
 
- LCDD1
 
- LCDD10
 
- LCDD10_DV_D10
 
- LCDD10_MARK
 
- LCDD11
 
- LCDD11_DV_D11
 
- LCDD11_MARK
 
- LCDD12
 
- LCDD12_DV_D12
 
- LCDD12_MARK
 
- LCDD13
 
- LCDD13_DV_D13
 
- LCDD13_MARK
 
- LCDD14
 
- LCDD14_DV_D14
 
- LCDD14_MARK
 
- LCDD15
 
- LCDD15_DV_D15
 
- LCDD15_MARK
 
- LCDD16
 
- LCDD16_DV_VSYNC
 
- LCDD16_MARK
 
- LCDD17
 
- LCDD17_DV_HSYNC
 
- LCDD17_MARK
 
- LCDD18
 
- LCDD18_DV_CLK
 
- LCDD18_MARK
 
- LCDD19
 
- LCDD19_DV_CLKI
 
- LCDD19_MARK
 
- LCDD1_DV_D1
 
- LCDD1_MARK
 
- LCDD2
 
- LCDD20
 
- LCDD20_MARK
 
- LCDD21
 
- LCDD21_MARK
 
- LCDD22
 
- LCDD22_MARK
 
- LCDD23
 
- LCDD23_MARK
 
- LCDD2_DV_D2
 
- LCDD2_MARK
 
- LCDD3
 
- LCDD3_DV_D3
 
- LCDD3_MARK
 
- LCDD4
 
- LCDD4_DV_D4
 
- LCDD4_MARK
 
- LCDD5
 
- LCDD5_DV_D5
 
- LCDD5_MARK
 
- LCDD6
 
- LCDD6_DV_D6
 
- LCDD6_MARK
 
- LCDD7
 
- LCDD7_DV_D7
 
- LCDD7_MARK
 
- LCDD8
 
- LCDD8_DV_D8
 
- LCDD8_MARK
 
- LCDD9
 
- LCDD9_DV_D9
 
- LCDD9_MARK
 
- LCDDCK
 
- LCDDCK_LCDWR
 
- LCDDCK_MARK
 
- LCDDISP
 
- LCDDISP_LCDRS
 
- LCDDISP_MARK
 
- LCDDON
 
- LCDDON2_MARK
 
- LCDDON_LCDDON2
 
- LCDDON_MARK
 
- LCDDataLen
 
- LCDDelayPtr1Offset
 
- LCDDualLink
 
- LCDHPosTableSize
 
- LCDHPosTable_1Addr
 
- LCDHPosTable_2Addr
 
- LCDHSYN
 
- LCDHSYN_LCDCS
 
- LCDHSYN_MARK
 
- LCDICR_INT_CON
 
- LCDICR_INT_SYN
 
- LCDIF
 
- LCDISR_BOF
 
- LCDISR_EOF
 
- LCDISR_ERR_RES
 
- LCDISR_UDR_ERR
 
- LCDLCLK
 
- LCDLCLK_MARK
 
- LCDLCLK_PTR_MARK
 
- LCDLCLK_PTW_MARK
 
- LCDNonExpanding
 
- LCDNonExpandingShift
 
- LCDOUT0_MARK
 
- LCDOUT10_MARK
 
- LCDOUT11_MARK
 
- LCDOUT12_MARK
 
- LCDOUT13_MARK
 
- LCDOUT14_MARK
 
- LCDOUT15_MARK
 
- LCDOUT16_MARK
 
- LCDOUT17_MARK
 
- LCDOUT18_MARK
 
- LCDOUT19_MARK
 
- LCDOUT1_MARK
 
- LCDOUT20_MARK
 
- LCDOUT21_MARK
 
- LCDOUT22_MARK
 
- LCDOUT23_MARK
 
- LCDOUT2_MARK
 
- LCDOUT3_MARK
 
- LCDOUT4_MARK
 
- LCDOUT5_MARK
 
- LCDOUT6_MARK
 
- LCDOUT7_MARK
 
- LCDOUT8_MARK
 
- LCDOUT9_MARK
 
- LCDPANEL_CAP_DRR_SUPPORTED
 
- LCDPANEL_CAP_READ_EDID
 
- LCDPANEL_CAP_V13_DRR_SUPPORTED
 
- LCDPANEL_CAP_V13_READ_EDID
 
- LCDPANEL_CAP_V13_eDP
 
- LCDPANEL_CAP_eDP
 
- LCDPass11
 
- LCDPass1_1
 
- LCDRD
 
- LCDRD_MARK
 
- LCDRD_N
 
- LCDRD__MARK
 
- LCDRGB18Bit
 
- LCDRS
 
- LCDRS_MARK
 
- LCDSync
 
- LCDSyncBit
 
- LCDSyncShift
 
- LCDTV_C
 
- LCDVCPWC2_MARK
 
- LCDVCPWC_LCDVCPWC2
 
- LCDVCPWC_MARK
 
- LCDVEPWC2_MARK
 
- LCDVEPWC_LCDVEPWC2
 
- LCDVEPWC_MARK
 
- LCDVESATiming
 
- LCDVPosTableSize
 
- LCDVPosTable_1Addr
 
- LCDVPosTable_2Addr
 
- LCDVSYN
 
- LCDVSYN2_DACK
 
- LCDVSYN2_MARK
 
- LCDVSYN_MARK
 
- LCDWR
 
- LCDWR_MARK
 
- LCDWR__MARK
 
- LCD_1024x600
 
- LCD_1024x768
 
- LCD_1152x768
 
- LCD_1152x864
 
- LCD_1280x1024
 
- LCD_1280x720
 
- LCD_1280x768
 
- LCD_1280x800
 
- LCD_1280x854
 
- LCD_1280x960
 
- LCD_12_16Bit
 
- LCD_12_16BitPSp
 
- LCD_1400x1050
 
- LCD_1600x1200
 
- LCD_1680x1050
 
- LCD_1920x1440
 
- LCD_2048x1536
 
- LCD_2ND_ALPHA
 
- LCD_2ND_BLD_CTL
 
- LCD_320x240
 
- LCD_320x240_2
 
- LCD_320x240_3
 
- LCD_4Bit
 
- LCD_4BitPSp
 
- LCD_640x480
 
- LCD_800x600
 
- LCD_848x480
 
- LCD_8Bit
 
- LCD_8BitPSp
 
- LCD_AC_BIAS_FREQ
 
- LCD_AC_BIAS_FREQUENCY
 
- LCD_AC_BIAS_TRANSITIONS_PER_INT
 
- LCD_ADV_PROG_CTRL
 
- LCD_ADV_PROG_CTRL2
 
- LCD_AFA_ALL2ONE
 
- LCD_ALL_PIXEL
 
- LCD_ALTERNATE_MAPPING
 
- LCD_BACKCOLOR_SBGB
 
- LCD_BACKCOLOR_SBGB_N
 
- LCD_BACKCOLOR_SBGG
 
- LCD_BACKCOLOR_SBGG_N
 
- LCD_BACKCOLOR_SBGR
 
- LCD_BACKCOLOR_SBGR_N
 
- LCD_BIAS
 
- LCD_BIAS_ACTIVE_HIGH
 
- LCD_BIAS_ACTIVE_LOW
 
- LCD_BIOS
 
- LCD_BITS
 
- LCD_BIT_BL
 
- LCD_BIT_CL
 
- LCD_BIT_DA
 
- LCD_BIT_E
 
- LCD_BIT_RS
 
- LCD_BIT_RW
 
- LCD_BL_TEMPO_PERIOD
 
- LCD_BOTTOMVIEW
 
- LCD_BUSY
 
- LCD_CAP_RECORD_TYPE
 
- LCD_CENTER
 
- LCD_CENTERING
 
- LCD_CFG_DMA_START_ADDR_0
 
- LCD_CFG_DMA_START_ADDR_1
 
- LCD_CFG_GRA_PITCH
 
- LCD_CFG_GRA_START_ADDR0
 
- LCD_CFG_GRA_START_ADDR1
 
- LCD_CFG_RDREG4F
 
- LCD_CFG_RDREG5F
 
- LCD_CFG_SCLK_DIV
 
- LCD_CHARSET_KS0074
 
- LCD_CHARSET_NORMAL
 
- LCD_CHARS_MAX
 
- LCD_CL1_A_MARK
 
- LCD_CL1_B_MARK
 
- LCD_CL1_MARK
 
- LCD_CL2_A_MARK
 
- LCD_CL2_B_MARK
 
- LCD_CL2_MARK
 
- LCD_CLEAR
 
- LCD_CLKCONTROL
 
- LCD_CLKCONTROL_BF
 
- LCD_CLKCONTROL_BF_BIT
 
- LCD_CLKCONTROL_BF_MASK
 
- LCD_CLKCONTROL_BF_N
 
- LCD_CLKCONTROL_CDD
 
- LCD_CLKCONTROL_DELAY
 
- LCD_CLKCONTROL_EXT
 
- LCD_CLKCONTROL_IB
 
- LCD_CLKCONTROL_IC
 
- LCD_CLKCONTROL_IH
 
- LCD_CLKCONTROL_IV
 
- LCD_CLKCONTROL_PCD
 
- LCD_CLKCONTROL_PCD_BIT
 
- LCD_CLKCONTROL_PCD_MASK
 
- LCD_CLKCONTROL_PCD_N
 
- LCD_CLKD
 
- LCD_CLK_A_MARK
 
- LCD_CLK_B_MARK
 
- LCD_CLK_DIVISOR
 
- LCD_CLK_ENABLE_REG
 
- LCD_CLK_MAIN_RESET
 
- LCD_CLK_MARK
 
- LCD_CLK_RESET_REG
 
- LCD_CMD_BLINK_ON
 
- LCD_CMD_CURSOR_INC
 
- LCD_CMD_CURSOR_ON
 
- LCD_CMD_DATA_LEN_8BITS
 
- LCD_CMD_DISPLAY_CLEAR
 
- LCD_CMD_DISPLAY_CTRL
 
- LCD_CMD_DISPLAY_ON
 
- LCD_CMD_DISPLAY_SHIFT
 
- LCD_CMD_ENTRY_MODE
 
- LCD_CMD_FONT_5X10_DOTS
 
- LCD_CMD_FUNCTION_SET
 
- LCD_CMD_REG
 
- LCD_CMD_SET_CGRAM_ADDR
 
- LCD_CMD_SET_DDRAM_ADDR
 
- LCD_CMD_SHIFT
 
- LCD_CMD_SHIFT_RIGHT
 
- LCD_CMD_TWO_LINES
 
- LCD_COLORKEYMSK_CKMB
 
- LCD_COLORKEYMSK_CKMB_N
 
- LCD_COLORKEYMSK_CKMG
 
- LCD_COLORKEYMSK_CKMG_N
 
- LCD_COLORKEYMSK_CKMR
 
- LCD_COLORKEYMSK_CKMR_N
 
- LCD_COLORKEY_CKB
 
- LCD_COLORKEY_CKB_N
 
- LCD_COLORKEY_CKG
 
- LCD_COLORKEY_CKG_N
 
- LCD_COLORKEY_CKR
 
- LCD_COLORKEY_CKR_N
 
- LCD_COLOR_DSTN_16BPP
 
- LCD_COLOR_STN_8BPP
 
- LCD_COLOR_TFT_16BPP
 
- LCD_COLOR_TFT_18BPP
 
- LCD_COLOR_TFT_8BPP
 
- LCD_COL_ADDRESS
 
- LCD_CONFIG
 
- LCD_CONN_TYPE
 
- LCD_CONN_WIDTH
 
- LCD_CONTROL
 
- LCD_CONTROL_BPP_1
 
- LCD_CONTROL_BPP_12
 
- LCD_CONTROL_BPP_16
 
- LCD_CONTROL_BPP_2
 
- LCD_CONTROL_BPP_4
 
- LCD_CONTROL_BPP_8
 
- LCD_CONTROL_BPP_BIT
 
- LCD_CONTROL_BPP_MASK
 
- LCD_CONTROL_C
 
- LCD_CONTROL_CCO
 
- LCD_CONTROL_DB
 
- LCD_CONTROL_DEFAULT_PO
 
- LCD_CONTROL_DEFAULT_SBPPF
 
- LCD_CONTROL_DP
 
- LCD_CONTROL_GO
 
- LCD_CONTROL_MPI
 
- LCD_CONTROL_PC
 
- LCD_CONTROL_PO_00
 
- LCD_CONTROL_PO_01
 
- LCD_CONTROL_PO_10
 
- LCD_CONTROL_PO_11
 
- LCD_CONTROL_PO_BIT
 
- LCD_CONTROL_PO_MASK
 
- LCD_CONTROL_PT
 
- LCD_CONTROL_SBB_1
 
- LCD_CONTROL_SBB_2
 
- LCD_CONTROL_SBB_3
 
- LCD_CONTROL_SBB_4
 
- LCD_CONTROL_SBB_BIT
 
- LCD_CONTROL_SBB_MASK
 
- LCD_CONTROL_SBPPF_1555
 
- LCD_CONTROL_SBPPF_5551
 
- LCD_CONTROL_SBPPF_556
 
- LCD_CONTROL_SBPPF_565
 
- LCD_CONTROL_SBPPF_655
 
- LCD_CONTROL_SBPPF_BIT
 
- LCD_CONTROL_SBPPF_MASK
 
- LCD_CONTROL_SM_0
 
- LCD_CONTROL_SM_180
 
- LCD_CONTROL_SM_270
 
- LCD_CONTROL_SM_90
 
- LCD_CONTROL_SM_BIT
 
- LCD_CONTROL_SM_MASK
 
- LCD_CONTROL_WD
 
- LCD_CONTROL_WP
 
- LCD_CS
 
- LCD_CS_SETUP
 
- LCD_CTRL_REG
 
- LCD_CURSORCOLOR_HWCA
 
- LCD_CURSORCOLOR_HWCA_N
 
- LCD_CURSORCOLOR_HWCB
 
- LCD_CURSORCOLOR_HWCB_N
 
- LCD_CURSORCOLOR_HWCG
 
- LCD_CURSORCOLOR_HWCG_N
 
- LCD_CURSORCOLOR_HWCR
 
- LCD_CURSORCOLOR_HWCR_N
 
- LCD_CURSORPOS_HWCXOFF
 
- LCD_CURSORPOS_HWCXOFF_N
 
- LCD_CURSORPOS_HWCXPOS
 
- LCD_CURSORPOS_HWCXPOS_N
 
- LCD_CURSORPOS_HWCYOFF
 
- LCD_CURSORPOS_HWCYOFF_N
 
- LCD_CURSORPOS_HWCYPOS
 
- LCD_CURSORPOS_HWCYPOS_N
 
- LCD_CURSOR_BLINK_OFF
 
- LCD_CURSOR_MOVE_HOME
 
- LCD_CURSOR_MOVE_LEFT
 
- LCD_CURSOR_MOVE_RIGHT
 
- LCD_CURSOR_OFF
 
- LCD_CURSOR_ON
 
- LCD_CUR_POS
 
- LCD_CUR_POS_MASK
 
- LCD_CUSTOM
 
- LCD_D00
 
- LCD_D01
 
- LCD_D02
 
- LCD_D03
 
- LCD_D04
 
- LCD_D05
 
- LCD_D06
 
- LCD_D07
 
- LCD_D08
 
- LCD_D09
 
- LCD_D10
 
- LCD_D11
 
- LCD_D12
 
- LCD_D13
 
- LCD_D14
 
- LCD_D15
 
- LCD_D16
 
- LCD_D17
 
- LCD_D18
 
- LCD_D19
 
- LCD_D20
 
- LCD_D21
 
- LCD_D22
 
- LCD_D23
 
- LCD_DATA
 
- LCD_DATA0_A_MARK
 
- LCD_DATA0_B_MARK
 
- LCD_DATA0_MARK
 
- LCD_DATA0_PG0_MARK
 
- LCD_DATA0_PJ0_MARK
 
- LCD_DATA10_A_MARK
 
- LCD_DATA10_B_MARK
 
- LCD_DATA10_MARK
 
- LCD_DATA10_PG10_MARK
 
- LCD_DATA10_PJ10_MARK
 
- LCD_DATA11_A_MARK
 
- LCD_DATA11_B_MARK
 
- LCD_DATA11_MARK
 
- LCD_DATA11_PG11_MARK
 
- LCD_DATA11_PJ11_MARK
 
- LCD_DATA12_A_MARK
 
- LCD_DATA12_B_MARK
 
- LCD_DATA12_MARK
 
- LCD_DATA12_PG12_MARK
 
- LCD_DATA12_PJ12_MARK
 
- LCD_DATA13_A_MARK
 
- LCD_DATA13_B_MARK
 
- LCD_DATA13_MARK
 
- LCD_DATA13_PG13_MARK
 
- LCD_DATA13_PJ13_MARK
 
- LCD_DATA14_A_MARK
 
- LCD_DATA14_B_MARK
 
- LCD_DATA14_MARK
 
- LCD_DATA14_PG14_MARK
 
- LCD_DATA14_PJ14_MARK
 
- LCD_DATA15_A_MARK
 
- LCD_DATA15_B_MARK
 
- LCD_DATA15_MARK
 
- LCD_DATA15_PG15_MARK
 
- LCD_DATA15_PJ15_MARK
 
- LCD_DATA16_PG16_MARK
 
- LCD_DATA16_PJ16_MARK
 
- LCD_DATA17_PG17_MARK
 
- LCD_DATA17_PJ17_MARK
 
- LCD_DATA18_PG18_MARK
 
- LCD_DATA18_PJ18_MARK
 
- LCD_DATA19_PG19_MARK
 
- LCD_DATA19_PJ19_MARK
 
- LCD_DATA1_A_MARK
 
- LCD_DATA1_B_MARK
 
- LCD_DATA1_MARK
 
- LCD_DATA1_PG1_MARK
 
- LCD_DATA1_PJ1_MARK
 
- LCD_DATA20_PG20_MARK
 
- LCD_DATA20_PJ20_MARK
 
- LCD_DATA21_PG21_MARK
 
- LCD_DATA21_PJ21_MARK
 
- LCD_DATA22_PG22_MARK
 
- LCD_DATA22_PJ22_MARK
 
- LCD_DATA23_PG23_MARK
 
- LCD_DATA23_PJ23_MARK
 
- LCD_DATA2_A_MARK
 
- LCD_DATA2_B_MARK
 
- LCD_DATA2_MARK
 
- LCD_DATA2_PG2_MARK
 
- LCD_DATA2_PJ2_MARK
 
- LCD_DATA3_A_MARK
 
- LCD_DATA3_B_MARK
 
- LCD_DATA3_MARK
 
- LCD_DATA3_PG3_MARK
 
- LCD_DATA3_PJ3_MARK
 
- LCD_DATA4_A_MARK
 
- LCD_DATA4_B_MARK
 
- LCD_DATA4_MARK
 
- LCD_DATA4_PG4_MARK
 
- LCD_DATA4_PJ4_MARK
 
- LCD_DATA5_A_MARK
 
- LCD_DATA5_B_MARK
 
- LCD_DATA5_MARK
 
- LCD_DATA5_PG5_MARK
 
- LCD_DATA5_PJ5_MARK
 
- LCD_DATA6_A_MARK
 
- LCD_DATA6_B_MARK
 
- LCD_DATA6_MARK
 
- LCD_DATA6_PG6_MARK
 
- LCD_DATA6_PJ6_MARK
 
- LCD_DATA7_A_MARK
 
- LCD_DATA7_B_MARK
 
- LCD_DATA7_MARK
 
- LCD_DATA7_PG7_MARK
 
- LCD_DATA7_PJ7_MARK
 
- LCD_DATA8_A_MARK
 
- LCD_DATA8_B_MARK
 
- LCD_DATA8_MARK
 
- LCD_DATA8_PG8_MARK
 
- LCD_DATA8_PJ8_MARK
 
- LCD_DATA9_A_MARK
 
- LCD_DATA9_B_MARK
 
- LCD_DATA9_MARK
 
- LCD_DATA9_PG9_MARK
 
- LCD_DATA9_PJ9_MARK
 
- LCD_DATA_ADDR
 
- LCD_DATA_REG
 
- LCD_DATA_REG_OFFSET
 
- LCD_DEF_CONTRAST
 
- LCD_DE_MARK
 
- LCD_DISPLAY_DIS
 
- LCD_DISPLAY_ENABLE
 
- LCD_DISPLAY_INVERT
 
- LCD_DISPLAY_LEFT
 
- LCD_DISPLAY_MODE4BIT
 
- LCD_DISPLAY_MODE8BIT
 
- LCD_DISPLAY_ON
 
- LCD_DISPLAY_POS
 
- LCD_DISPLAY_RIGHT
 
- LCD_DITHER_CTRL
 
- LCD_DITHER_TBL_DATA
 
- LCD_DMAADDR0
 
- LCD_DMAADDR1
 
- LCD_DMAVLD_UV
 
- LCD_DMAVLD_YC
 
- LCD_DMA_BURST_1
 
- LCD_DMA_BURST_16
 
- LCD_DMA_BURST_2
 
- LCD_DMA_BURST_4
 
- LCD_DMA_BURST_8
 
- LCD_DMA_BURST_SIZE
 
- LCD_DMA_CTRL_REG
 
- LCD_DMA_FRM_BUF_BASE_ADDR_0_REG
 
- LCD_DMA_FRM_BUF_BASE_ADDR_1_REG
 
- LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG
 
- LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG
 
- LCD_DMA_SA_BIT
 
- LCD_DMA_SA_MASK
 
- LCD_DMA_SA_N
 
- LCD_DON_A_MARK
 
- LCD_DON_B_MARK
 
- LCD_DON_MARK
 
- LCD_DOTCK
 
- LCD_DOTCLK
 
- LCD_DUAL_FRAME_BUFFER_ENABLE
 
- LCD_DUMB2_CTRL
 
- LCD_DVDD_EN_GPIO
 
- LCD_Device
 
- LCD_EDID_OFFSET_PATCH_RECORD_TYPE
 
- LCD_ENABLE
 
- LCD_END_OF_FRAME0
 
- LCD_END_OF_FRAME1
 
- LCD_END_OF_INT_IND_REG
 
- LCD_EN_MASK
 
- LCD_ESCAPE_CHAR
 
- LCD_ESCAPE_LEN
 
- LCD_EXPANDSION
 
- LCD_EXTCLK_MARK
 
- LCD_FAKE_EDID_PATCH_RECORD_TYPE
 
- LCD_FIFOCTRL_F0IF
 
- LCD_FIFOCTRL_F0REQ
 
- LCD_FIFOCTRL_F0REQ_N
 
- LCD_FIFOCTRL_F1IF
 
- LCD_FIFOCTRL_F1REQ
 
- LCD_FIFOCTRL_F1REQ_N
 
- LCD_FIFOCTRL_F2IF
 
- LCD_FIFOCTRL_F2REQ
 
- LCD_FIFOCTRL_F2REQ_N
 
- LCD_FIFOCTRL_F3IF
 
- LCD_FIFOCTRL_F3REQ
 
- LCD_FIFOCTRL_F3REQ_N
 
- LCD_FIFO_DEPTH
 
- LCD_FIFO_UNDERFLOW
 
- LCD_FLAG_B
 
- LCD_FLAG_C
 
- LCD_FLAG_D
 
- LCD_FLAG_F
 
- LCD_FLAG_L
 
- LCD_FLAG_N
 
- LCD_FLM_A_MARK
 
- LCD_FLM_B_MARK
 
- LCD_FLM_MARK
 
- LCD_FRAME_CNT
 
- LCD_FRAME_DONE
 
- LCD_GEN_CNTL
 
- LCD_GEN_CNTL_LG
 
- LCD_GRAPHIC_MODE
 
- LCD_GRA_CUTHPXL
 
- LCD_GRA_CUTVLN
 
- LCD_HORZTIMING
 
- LCD_HORZTIMING_HN1_BIT
 
- LCD_HORZTIMING_HN1_MASK
 
- LCD_HORZTIMING_HN1_N
 
- LCD_HORZTIMING_HN2_BIT
 
- LCD_HORZTIMING_HN2_MASK
 
- LCD_HORZTIMING_HN2_N
 
- LCD_HORZTIMING_HND1
 
- LCD_HORZTIMING_HND1_N
 
- LCD_HORZTIMING_HND2
 
- LCD_HORZTIMING_HND2_N
 
- LCD_HORZTIMING_HPW
 
- LCD_HORZTIMING_HPW_BIT
 
- LCD_HORZTIMING_HPW_MASK
 
- LCD_HORZTIMING_HPW_N
 
- LCD_HORZTIMING_PPL_BIT
 
- LCD_HORZTIMING_PPL_MASK
 
- LCD_HORZTIMING_PPL_N
 
- LCD_HOR_SCALING_FACTOR_REG_NUM
 
- LCD_HOR_SCALING_FACTOR_REG_NUM_CLE
 
- LCD_HSYNC
 
- LCD_HSYNC_MARK
 
- LCD_HTOT
 
- LCD_HWCCON_EN
 
- LCD_INDEX
 
- LCD_INDEX_MASK
 
- LCD_INIT_BL
 
- LCD_INIT_TEXT
 
- LCD_INSTR_ADDR
 
- LCD_INTENABLE
 
- LCD_INTSTATUS
 
- LCD_INT_ENABLE_CLR_REG
 
- LCD_INT_ENABLE_SET_REG
 
- LCD_INT_IFO
 
- LCD_INT_IFU
 
- LCD_INT_OF
 
- LCD_INT_OFO
 
- LCD_INT_OFU
 
- LCD_INT_S0
 
- LCD_INT_S1
 
- LCD_INT_SA
 
- LCD_INT_SD
 
- LCD_INT_SS
 
- LCD_INT_UF
 
- LCD_INT_WAIT
 
- LCD_INVALID
 
- LCD_INVERT_FRAME_CLOCK
 
- LCD_INVERT_LINE_CLOCK
 
- LCD_INVERT_PIXEL_CLOCK
 
- LCD_IO_OVERL_MAP_CTRL
 
- LCD_Int0_0
 
- LCD_Int100_0
 
- LCD_Int100_0A
 
- LCD_Int11_1
 
- LCD_Int20_0
 
- LCD_Int26_7
 
- LCD_Int33_3
 
- LCD_Int40_0
 
- LCD_Int44_4
 
- LCD_Int50_0
 
- LCD_Int55_6
 
- LCD_Int60_0
 
- LCD_Int66_7
 
- LCD_Int73_3
 
- LCD_Int80_0
 
- LCD_Int88_9
 
- LCD_LEFT_MARGIN
 
- LCD_LINE1_OFFSET
 
- LCD_LINE1_SIZE
 
- LCD_LINE2_OFFSET
 
- LCD_LINE2_SIZE
 
- LCD_LINE3_OFFSET
 
- LCD_LINE3_SIZE
 
- LCD_LINE4_OFFSET
 
- LCD_LOWER_MARGIN
 
- LCD_LVDS_SCLK_DIV_RD
 
- LCD_LVDS_SCLK_DIV_WR
 
- LCD_MASKED_STAT_REG
 
- LCD_MAXBYTES
 
- LCD_MAX_CONTRAST
 
- LCD_MCU_CTL
 
- LCD_MCU_DATA_0
 
- LCD_MCU_DATA_1
 
- LCD_MINOR
 
- LCD_MISC_CNTL
 
- LCD_MODE_CAP_BL_OFF
 
- LCD_MODE_CAP_CRTC_OFF
 
- LCD_MODE_CAP_PANEL_OFF
 
- LCD_MODE_PATCH_RECORD_MODE_TYPE
 
- LCD_MONOCHROME_MODE
 
- LCD_MONO_8BIT_MODE
 
- LCD_MONO_DSTN_8BPP
 
- LCD_MONO_STN_4BPP
 
- LCD_MONO_STN_8BPP
 
- LCD_M_DISP_A_MARK
 
- LCD_M_DISP_B_MARK
 
- LCD_M_DISP_MARK
 
- LCD_NO_OP
 
- LCD_NUM_BUFFERS
 
- LCD_OFF
 
- LCD_OLINUXINO_DATA_LEN
 
- LCD_OLINUXINO_HEADER_MAGIC
 
- LCD_ON
 
- LCD_OPENLDI
 
- LCD_OUTMASK_MASK
 
- LCD_PADS_ENABLE
 
- LCD_PAGE_ADDRESS
 
- LCD_PALETTE_LOAD_MODE
 
- LCD_PALLETTEBASE
 
- LCD_PALLETTE_COLOR_BI_BIT
 
- LCD_PALLETTE_COLOR_BI_MASK
 
- LCD_PALLETTE_COLOR_BI_N
 
- LCD_PALLETTE_COLOR_GI_BIT
 
- LCD_PALLETTE_COLOR_GI_MASK
 
- LCD_PALLETTE_COLOR_GI_N
 
- LCD_PALLETTE_COLOR_RI_BIT
 
- LCD_PALLETTE_COLOR_RI_MASK
 
- LCD_PALLETTE_COLOR_RI_N
 
- LCD_PALLETTE_MONO_MI_BIT
 
- LCD_PALLETTE_MONO_MI_MASK
 
- LCD_PALLETTE_MONO_MI_N
 
- LCD_PALLETTE_TFT_DC_BIT
 
- LCD_PALLETTE_TFT_DC_MASK
 
- LCD_PALLETTE_TFT_DC_N
 
- LCD_PANEL_ID0_640X480
 
- LCD_PANEL_ID1_800X600
 
- LCD_PANEL_ID2_1024X768
 
- LCD_PANEL_ID3_1280X768
 
- LCD_PANEL_ID4_1280X1024
 
- LCD_PANEL_ID5_1400X1050
 
- LCD_PANEL_ID6_1600X1200
 
- LCD_PANEL_ID7_1366X768
 
- LCD_PANEL_ID8_1024X600
 
- LCD_PANEL_ID9_1280X800
 
- LCD_PANEL_IDA_800X480
 
- LCD_PANEL_IDB_1360X768
 
- LCD_PANEL_IDC_480X640
 
- LCD_PANEL_IDD_1200X900
 
- LCD_PANEL_ID_MAXIMUM
 
- LCD_PANEL_RESOLUTION_RECORD_TYPE
 
- LCD_PBS
 
- LCD_PBlue
 
- LCD_PCLK_EDGE_FALL
 
- LCD_PCLK_EDGE_RISE
 
- LCD_PEntrySp
 
- LCD_PGreen
 
- LCD_PGrey
 
- LCD_PID_REG
 
- LCD_PIXEL_CLOCK
 
- LCD_PL_LOAD_DONE
 
- LCD_PN2_ALPHA_COLOR1
 
- LCD_PN2_ALPHA_COLOR2
 
- LCD_PN2_BLANKCOLOR
 
- LCD_PN2_CBSH_HUE
 
- LCD_PN2_COLORKEY_U
 
- LCD_PN2_COLORKEY_V
 
- LCD_PN2_COLORKEY_Y
 
- LCD_PN2_CONTRAST
 
- LCD_PN2_CTRL0
 
- LCD_PN2_CTRL1
 
- LCD_PN2_H_PORCH
 
- LCD_PN2_LAYER_ALPHA_SEL1
 
- LCD_PN2_SATURATION
 
- LCD_PN2_SCLK_DIV
 
- LCD_PN2_SEPXLCNT
 
- LCD_PN2_SQULN1_CTRL
 
- LCD_PN2_SQULN2_CTRL
 
- LCD_PN2_TCLK_DIV
 
- LCD_PN2_V_H_ACTIVE
 
- LCD_PN2_V_H_TOTAL
 
- LCD_PN2_V_PORCH
 
- LCD_PN_SEPXLCNT
 
- LCD_PORTS
 
- LCD_PORT_C
 
- LCD_PORT_D
 
- LCD_POWER_CONTROL
 
- LCD_POWER_SEQ_TD0
 
- LCD_POWER_SEQ_TD0_REG_NUM
 
- LCD_POWER_SEQ_TD1
 
- LCD_POWER_SEQ_TD1_REG_NUM
 
- LCD_POWER_SEQ_TD2
 
- LCD_POWER_SEQ_TD2_REG_NUM
 
- LCD_POWER_SEQ_TD3
 
- LCD_POWER_SEQ_TD3_REG_NUM
 
- LCD_PRERESET
 
- LCD_PROTO_PARALLEL
 
- LCD_PROTO_SERIAL
 
- LCD_PROTO_TI_DA8XX_LCD
 
- LCD_PRed
 
- LCD_PWM0_HI_ADDR
 
- LCD_PWM0_LO_ADDR
 
- LCD_PWM1_HI_ADDR
 
- LCD_PWM1_LO_ADDR
 
- LCD_PWMDIV
 
- LCD_PWMDIV_EN
 
- LCD_PWMDIV_PWMDIV
 
- LCD_PWMDIV_PWMDIV_BIT
 
- LCD_PWMDIV_PWMDIV_MASK
 
- LCD_PWMDIV_PWMDIV_N
 
- LCD_PWMHI
 
- LCD_PWMHI_PWMHI0
 
- LCD_PWMHI_PWMHI0_BIT
 
- LCD_PWMHI_PWMHI0_MASK
 
- LCD_PWMHI_PWMHI0_N
 
- LCD_PWMHI_PWMHI1
 
- LCD_PWMHI_PWMHI1_BIT
 
- LCD_PWMHI_PWMHI1_MASK
 
- LCD_PWMHI_PWMHI1_N
 
- LCD_PWM_DUTY
 
- LCD_PWM_PERIOD
 
- LCD_PWR_ADDR
 
- LCD_RASTER_CTRL_REG
 
- LCD_RASTER_ENABLE
 
- LCD_RASTER_MODE
 
- LCD_RASTER_ORDER
 
- LCD_RASTER_TIMING_0_REG
 
- LCD_RASTER_TIMING_1_REG
 
- LCD_RASTER_TIMING_2_REG
 
- LCD_RAW_STAT_REG
 
- LCD_RD_E
 
- LCD_READ_IOPAD
 
- LCD_REFRESH
 
- LCD_RESET
 
- LCD_RESET_CMD
 
- LCD_RIGHT_MARGIN
 
- LCD_RS
 
- LCD_RTS_RECORD_TYPE
 
- LCD_SCAN_DIR
 
- LCD_SCLK
 
- LCD_SCREEN_PT
 
- LCD_SCREEN_PT_CDSTN
 
- LCD_SCREEN_PT_CSTN
 
- LCD_SCREEN_PT_M4STN
 
- LCD_SCREEN_PT_M8STN
 
- LCD_SCREEN_PT_TFT
 
- LCD_SCREEN_SEN
 
- LCD_SCREEN_SWD
 
- LCD_SCREEN_SWP
 
- LCD_SCREEN_SX
 
- LCD_SCREEN_SX_N
 
- LCD_SCREEN_SY
 
- LCD_SCREEN_SY_N
 
- LCD_SET_PRIMARY_MASK
 
- LCD_SHIFT_LEFT
 
- LCD_SHIFT_RIGHT
 
- LCD_SHUT
 
- LCD_SLV_DBG
 
- LCD_SMART_PANEL_16BPP
 
- LCD_SMART_PANEL_18BPP
 
- LCD_SMART_PANEL_8BPP
 
- LCD_SMPN2_CTRL
 
- LCD_SPI_BUS_NUM
 
- LCD_SPUT_DMA_OVSA_HPXL_VLN
 
- LCD_SPUT_V_H_TOTAL
 
- LCD_SPU_ADV_REG
 
- LCD_SPU_ALPHA_COLOR1
 
- LCD_SPU_ALPHA_COLOR2
 
- LCD_SPU_BLANKCOLOR
 
- LCD_SPU_CBSH_HUE
 
- LCD_SPU_COLORKEY_U
 
- LCD_SPU_COLORKEY_V
 
- LCD_SPU_COLORKEY_Y
 
- LCD_SPU_CONTRAST
 
- LCD_SPU_DBG_DMATOP
 
- LCD_SPU_DBG_GRATOP
 
- LCD_SPU_DBG_ISA
 
- LCD_SPU_DBG_MUXTOP
 
- LCD_SPU_DBG_SLVTOP
 
- LCD_SPU_DBG_TXCTRL
 
- LCD_SPU_DMAVLD_UV
 
- LCD_SPU_DMAVLD_UVSPU_GRAVLD
 
- LCD_SPU_DMAVLD_YC
 
- LCD_SPU_DMA_CTRL0
 
- LCD_SPU_DMA_CTRL1
 
- LCD_SPU_DMA_HPXL_VLN
 
- LCD_SPU_DMA_OVSA_HPXL_VLN
 
- LCD_SPU_DMA_PITCH_UV
 
- LCD_SPU_DMA_PITCH_YC
 
- LCD_SPU_DMA_START_ADDR_U0
 
- LCD_SPU_DMA_START_ADDR_U1
 
- LCD_SPU_DMA_START_ADDR_V0
 
- LCD_SPU_DMA_START_ADDR_V1
 
- LCD_SPU_DMA_START_ADDR_Y0
 
- LCD_SPU_DMA_START_ADDR_Y1
 
- LCD_SPU_DUMB_CTRL
 
- LCD_SPU_DZM_HPXL_VLN
 
- LCD_SPU_GAMMA_RDDAT
 
- LCD_SPU_GRA_HPXL_VLN
 
- LCD_SPU_GRA_OVSA_HPXL_VLN
 
- LCD_SPU_GZM_HPXL_VLN
 
- LCD_SPU_HWC_HPXL_VLN
 
- LCD_SPU_HWC_OVSA_HPXL_VLN
 
- LCD_SPU_HWC_RDDAT
 
- LCD_SPU_H_PORCH
 
- LCD_SPU_IOPAD_CONTROL
 
- LCD_SPU_IOPAD_IN
 
- LCD_SPU_IRQ_ENA
 
- LCD_SPU_IRQ_ISR
 
- LCD_SPU_ISA_RSDATA
 
- LCD_SPU_ISA_RXDATA
 
- LCD_SPU_PALETTE_RDDAT
 
- LCD_SPU_SATURATION
 
- LCD_SPU_SMPN_CTRL
 
- LCD_SPU_SPI_CTRL
 
- LCD_SPU_SPI_RXDATA
 
- LCD_SPU_SPI_TXDATA
 
- LCD_SPU_SRAM_CTRL
 
- LCD_SPU_SRAM_PARA0
 
- LCD_SPU_SRAM_PARA1
 
- LCD_SPU_SRAM_WRDAT
 
- LCD_SPU_V_H_ACTIVE
 
- LCD_SPU_V_PORCH
 
- LCD_SPWG
 
- LCD_SQULN1_CTRL
 
- LCD_SQULN2_CTRL
 
- LCD_SRC_SEL
 
- LCD_START_LINE
 
- LCD_STAT_REG
 
- LCD_STN_565_ENABLE
 
- LCD_STRETCH
 
- LCD_SYNC_CTRL
 
- LCD_SYNC_EDGE
 
- LCD_SYNC_LOST
 
- LCD_TCLK_DIV
 
- LCD_TCON0_MARK
 
- LCD_TCON1_MARK
 
- LCD_TCON2_MARK
 
- LCD_TCON3_MARK
 
- LCD_TCON4_MARK
 
- LCD_TCON5_MARK
 
- LCD_TCON6_MARK
 
- LCD_TEMPCOMP_HIGH
 
- LCD_TEXT_MODE
 
- LCD_TEXT_POS
 
- LCD_TFT_ALT_ENABLE
 
- LCD_TFT_MODE
 
- LCD_TIMING_EXT
 
- LCD_TOP_CTRL
 
- LCD_TVC_HPXL_VLN
 
- LCD_TVC_OVSA_HPXL_VLN
 
- LCD_TVC_RDDAT
 
- LCD_TVDVLD_UV
 
- LCD_TVDVLD_YC
 
- LCD_TVDZM_HPXL_VLN
 
- LCD_TVD_HPXL_VLN
 
- LCD_TVD_OVSA_HPXL_VLN
 
- LCD_TVD_PITCH_UV
 
- LCD_TVD_PITCH_YC
 
- LCD_TVD_START_ADDR_C0
 
- LCD_TVD_START_ADDR_C1
 
- LCD_TVD_START_ADDR_U0
 
- LCD_TVD_START_ADDR_U1
 
- LCD_TVD_START_ADDR_V0
 
- LCD_TVD_START_ADDR_V1
 
- LCD_TVD_START_ADDR_Y0
 
- LCD_TVD_START_ADDR_Y1
 
- LCD_TVGGRAVLD_HLEN
 
- LCD_TVGZM_HPXL_VLN
 
- LCD_TVG_CUTHPXL
 
- LCD_TVG_CUTVLN
 
- LCD_TVG_HPXL_VLN
 
- LCD_TVG_OVSA_HPXL_VLN
 
- LCD_TVG_PITCH
 
- LCD_TVG_START_ADDR0
 
- LCD_TVG_START_ADDR1
 
- LCD_TVIF_CTRL
 
- LCD_TVIOPAD_CTRL
 
- LCD_TV_ALPHA_COLOR1
 
- LCD_TV_ALPHA_COLOR2
 
- LCD_TV_BLANKCOLOR
 
- LCD_TV_CBSH_HUE
 
- LCD_TV_COLORKEY_U
 
- LCD_TV_COLORKEY_V
 
- LCD_TV_COLORKEY_Y
 
- LCD_TV_CONTRAST
 
- LCD_TV_CTRL0
 
- LCD_TV_CTRL1
 
- LCD_TV_GAMMA_RDDAT
 
- LCD_TV_H_PORCH
 
- LCD_TV_PALETTE_RDDAT
 
- LCD_TV_SATURATION
 
- LCD_TV_SEPXLCNT
 
- LCD_TV_SEPXLCNT_FLD
 
- LCD_TV_V_H_ACTIVE
 
- LCD_TV_V_H_TOTAL
 
- LCD_TV_V_H_TOTAL_FLD
 
- LCD_TV_V_PORCH
 
- LCD_TV_V_PORCH_FLD
 
- LCD_TYPE_COLOR_DSTN
 
- LCD_TYPE_COLOR_STN
 
- LCD_TYPE_COLOR_TFT
 
- LCD_TYPE_CUSTOM
 
- LCD_TYPE_HANTRONIX
 
- LCD_TYPE_KS0074
 
- LCD_TYPE_MASK
 
- LCD_TYPE_MAX
 
- LCD_TYPE_MONO_DSTN
 
- LCD_TYPE_MONO_STN
 
- LCD_TYPE_NEXCOM
 
- LCD_TYPE_NONE
 
- LCD_TYPE_OLD
 
- LCD_TYPE_SMART_PANEL
 
- LCD_TYPE_UNKNOWN
 
- LCD_UNKNOWN
 
- LCD_UPPER_MARGIN
 
- LCD_USE_UART0
 
- LCD_USE_UART0_DAT
 
- LCD_USE_UART15
 
- LCD_V1_END_OF_FRAME_INT_ENA
 
- LCD_V1_PL_INT_ENA
 
- LCD_V1_UNDERFLOW_INT_ENA
 
- LCD_V2_CORE_CLK_EN
 
- LCD_V2_DMA_CLK_EN
 
- LCD_V2_END_OF_FRAME0_INT_ENA
 
- LCD_V2_END_OF_FRAME1_INT_ENA
 
- LCD_V2_LIDD_CLK_EN
 
- LCD_V2_LPP_B10
 
- LCD_V2_PL_INT_ENA
 
- LCD_V2_TFT_24BPP_MODE
 
- LCD_V2_TFT_24BPP_UNPACK
 
- LCD_V2_UNDERFLOW_INT_ENA
 
- LCD_VBLK_EN_GPIO
 
- LCD_VCC_EN_GPIO
 
- LCD_VCPWC_A_MARK
 
- LCD_VCPWC_B_MARK
 
- LCD_VCPWC_MARK
 
- LCD_VEPWC_A_MARK
 
- LCD_VEPWC_B_MARK
 
- LCD_VEPWC_MARK
 
- LCD_VERSION_1
 
- LCD_VERSION_2
 
- LCD_VERTTIMING
 
- LCD_VERTTIMING_LPP_BIT
 
- LCD_VERTTIMING_LPP_MASK
 
- LCD_VERTTIMING_LPP_N
 
- LCD_VERTTIMING_VN1_BIT
 
- LCD_VERTTIMING_VN1_MASK
 
- LCD_VERTTIMING_VN1_N
 
- LCD_VERTTIMING_VN2_BIT
 
- LCD_VERTTIMING_VN2_MASK
 
- LCD_VERTTIMING_VN2_N
 
- LCD_VERTTIMING_VND1
 
- LCD_VERTTIMING_VND1_N
 
- LCD_VERTTIMING_VND2
 
- LCD_VERTTIMING_VND2_N
 
- LCD_VERTTIMING_VPW
 
- LCD_VERTTIMING_VPW_BIT
 
- LCD_VERTTIMING_VPW_MASK
 
- LCD_VERTTIMING_VPW_N
 
- LCD_VER_SCALING_FACTOR_REG_NUM
 
- LCD_VER_SCALING_FACTOR_REG_NUM_CLE
 
- LCD_VOLTAGE
 
- LCD_VOLUME_MODE
 
- LCD_VSYNC
 
- LCD_VSYNC_MARK
 
- LCD_VTOT
 
- LCD_WINBUFCTRL_DB
 
- LCD_WINBUFCTRL_DBN
 
- LCD_WINCTRL0_A
 
- LCD_WINCTRL0_AEN
 
- LCD_WINCTRL0_A_N
 
- LCD_WINCTRL0_OX
 
- LCD_WINCTRL0_OX_N
 
- LCD_WINCTRL0_OY
 
- LCD_WINCTRL0_OY_N
 
- LCD_WINCTRL1_CCO
 
- LCD_WINCTRL1_FRM
 
- LCD_WINCTRL1_FRM_12BPP
 
- LCD_WINCTRL1_FRM_16BPP556
 
- LCD_WINCTRL1_FRM_16BPP565
 
- LCD_WINCTRL1_FRM_16BPP655
 
- LCD_WINCTRL1_FRM_16BPPA1555
 
- LCD_WINCTRL1_FRM_16BPPA5551
 
- LCD_WINCTRL1_FRM_16BPPI1555
 
- LCD_WINCTRL1_FRM_16BPPI5551
 
- LCD_WINCTRL1_FRM_1BPP
 
- LCD_WINCTRL1_FRM_24BPP
 
- LCD_WINCTRL1_FRM_2BPP
 
- LCD_WINCTRL1_FRM_32BPP
 
- LCD_WINCTRL1_FRM_4BPP
 
- LCD_WINCTRL1_FRM_8BPP
 
- LCD_WINCTRL1_PIPE
 
- LCD_WINCTRL1_PO
 
- LCD_WINCTRL1_PO_00
 
- LCD_WINCTRL1_PO_01
 
- LCD_WINCTRL1_PO_10
 
- LCD_WINCTRL1_PO_11
 
- LCD_WINCTRL1_PO_16BPP
 
- LCD_WINCTRL1_PRI
 
- LCD_WINCTRL1_PRI_N
 
- LCD_WINCTRL1_SZX
 
- LCD_WINCTRL1_SZX_N
 
- LCD_WINCTRL1_SZY
 
- LCD_WINCTRL1_SZY_N
 
- LCD_WINCTRL2_BX
 
- LCD_WINCTRL2_BX_N
 
- LCD_WINCTRL2_CKMODE
 
- LCD_WINCTRL2_CKMODE_00
 
- LCD_WINCTRL2_CKMODE_01
 
- LCD_WINCTRL2_CKMODE_10
 
- LCD_WINCTRL2_CKMODE_11
 
- LCD_WINCTRL2_DBM
 
- LCD_WINCTRL2_RAM
 
- LCD_WINCTRL2_RAM_BUFFER
 
- LCD_WINCTRL2_RAM_GAMMA
 
- LCD_WINCTRL2_RAM_NONE
 
- LCD_WINCTRL2_RAM_PALETTE
 
- LCD_WINCTRL2_SCX
 
- LCD_WINCTRL2_SCX_1
 
- LCD_WINCTRL2_SCX_2
 
- LCD_WINCTRL2_SCX_4
 
- LCD_WINCTRL2_SCY
 
- LCD_WINCTRL2_SCY_1
 
- LCD_WINCTRL2_SCY_2
 
- LCD_WINCTRL2_SCY_4
 
- LCD_WINENABLE_WEN0
 
- LCD_WINENABLE_WEN1
 
- LCD_WINENABLE_WEN2
 
- LCD_WINENABLE_WEN3
 
- LCD_WORDS
 
- LCD_WR
 
- LCD_WRD_WRDS_BIT
 
- LCD_WRD_WRDS_MASK
 
- LCD_WRD_WRDS_N
 
- LCD_WR_ACTIVE
 
- LCD_WR_HOLD
 
- LCD_WR_RWN
 
- LCD_WR_SETUP
 
- LCD_XRES
 
- LCD_XRES_MAX
 
- LCD_YRES
 
- LCD_YRES_MAX
 
- LCFUSE02
 
- LCFUSE_HIV_MASK
 
- LCF_CLASS_2
 
- LCF_COMMAND_ADISC
 
- LCF_COMMAND_LOGO
 
- LCF_COMMAND_PDISC
 
- LCF_COMMAND_PLOGI
 
- LCF_COMMAND_PRLI
 
- LCF_COMMAND_PRLO
 
- LCF_COMMAND_TPRLO
 
- LCF_COND_PLOGI
 
- LCF_EXPL_LOGO
 
- LCF_FCP2_OVERRIDE
 
- LCF_FREE_NPORT
 
- LCF_IMPL_LOGO
 
- LCF_IMPL_LOGO_ALL
 
- LCF_IMPL_PRLO
 
- LCF_INCLUDE_SNS
 
- LCF_NVME_PRLI
 
- LCF_SKIP_PRLI
 
- LCG
 
- LCH_CTRL
 
- LCINT
 
- LCINTEN
 
- LCKCON
 
- LCKCON_ADDR
 
- LCKCON_DMA16
 
- LCKCON_DWIDTH
 
- LCKCON_DWS_MASK
 
- LCKCON_DWS_SHIFT
 
- LCKCON_DW_MASK
 
- LCKCON_DW_SHIFT
 
- LCKCON_LCDON
 
- LCKCON_PCDS
 
- LCKFRQ
 
- LCK_TRK_GPI
 
- LCK_TRK_LOGIC
 
- LCLASR
 
- LCLASR_AREA_MASK
 
- LCLASR_FPGA_SEL_MASK
 
- LCLASR_FPGA_SEL_SHIFT
 
- LCLASR_FRAMEN
 
- LCLASR_NAND_SEL_MASK
 
- LCLASR_NAND_SEL_SHIFT
 
- LCLASR_NORA_SEL_MASK
 
- LCLASR_NORA_SEL_SHIFT
 
- LCLASR_NORB_SEL_MASK
 
- LCLASR_NORB_SEL_SHIFT
 
- LCLA_ALIGNMENT
 
- LCLKSEL_LSEL
 
- LCLK_DEEP_SLEEP_CNTL2__APG_SMU_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__APG_SMU_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__BIF_CG_LCLK_BUSY_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__BIF_CG_LCLK_BUSY_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__DMAACTIVE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__DMAACTIVE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE0_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE0_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE1_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE1_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE2_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE2_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE3_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE3_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUBIF_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUBIF_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUGPPSB_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUGPPSB_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUGPP_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUGPP_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUINTGEN_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUINTGEN_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUIOAGR_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUIOAGR_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUPCIE0_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUPCIE0_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUPCIE1_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMUPCIE1_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMU_SMU_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L1IMU_SMU_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__L2IMU_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__L2IMU_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__ON_INB_WAKE_ACK_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__ON_INB_WAKE_ACK_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__ON_INB_WAKE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__ON_INB_WAKE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__ON_OUTB_WAKE_ACK_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__ON_OUTB_WAKE_ACK_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__ON_OUTB_WAKE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__ON_OUTB_WAKE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__ORB_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__ORB_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE1_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE1_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE2_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE2_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE3_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE3_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE4_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE4_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__RESERVED_BIT3_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__RESERVED_BIT3__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__RESERVED_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__RESERVED__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__RFE_BUSY_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__RFE_BUSY_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__RLC_SMU_GFXCLK_OFF_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__RLC_SMU_GFXCLK_OFF_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__SCLK_RUNNING_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__SCLK_RUNNING_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__SMU_BUSY_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__SMU_BUSY_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL2__SPG_SMU_IDLE_MASK_MASK
 
- LCLK_DEEP_SLEEP_CNTL2__SPG_SMU_IDLE_MASK__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL__DIV_ID_MASK
 
- LCLK_DEEP_SLEEP_CNTL__DIV_ID__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL__ENABLE_DS_MASK
 
- LCLK_DEEP_SLEEP_CNTL__ENABLE_DS__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL__HYSTERESIS_MASK
 
- LCLK_DEEP_SLEEP_CNTL__HYSTERESIS__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL__RAMP_DIS_MASK
 
- LCLK_DEEP_SLEEP_CNTL__RAMP_DIS__SHIFT
 
- LCLK_DEEP_SLEEP_CNTL__RESERVED_MASK
 
- LCLK_DEEP_SLEEP_CNTL__RESERVED__SHIFT
 
- LCLK_MARK
 
- LCLK_SCALING_EN
 
- LCLK_SCALING_TIMER_PERIOD
 
- LCLK_SCALING_TIMER_PERIOD_MASK
 
- LCLK_SCALING_TIMER_PERIOD_SHIFT
 
- LCLK_SCALING_TIMER_PRESCALER
 
- LCLK_SCALING_TIMER_PRESCALER_MASK
 
- LCLK_SCALING_TIMER_PRESCALER_SHIFT
 
- LCLK_SCALING_TYPE
 
- LCLOCK
 
- LCL_TIMER_EVENTS_STATUS
 
- LCMODE_SW
 
- LCN
 
- LCNCONF
 
- LCNCONF_GE
 
- LCNCONF_GT
 
- LCNCONF_HAS
 
- LCNCONF_IS
 
- LCNCONF_LE
 
- LCNCONF_LT
 
- LCNCONF_MSK
 
- LCNPHY_ACI_CRSHIFRMLO_TRSH
 
- LCNPHY_ACI_DETECT_PROGRESS
 
- LCNPHY_ACI_DETECT_START
 
- LCNPHY_ACI_DETECT_STOP
 
- LCNPHY_ACI_DETECT_TIMEOUT
 
- LCNPHY_ACI_GLITCH_TRSH
 
- LCNPHY_ACI_START_DELAY
 
- LCNPHY_ACI_TMOUT
 
- LCNPHY_CAL_CURRECAL
 
- LCNPHY_CAL_DIGCAL
 
- LCNPHY_CAL_FULL
 
- LCNPHY_CAL_GCTRL
 
- LCNPHY_CAL_RECAL
 
- LCNPHY_IQLOCC_READ
 
- LCNPHY_MAX_TX_POWER_INDEX
 
- LCNPHY_MIN_RXIQ_PWR
 
- LCNPHY_NOISE_SAMPLES_DEFAULT
 
- LCNPHY_NUM_DIG_FILT_COEFFS
 
- LCNPHY_NUM_TX_DIG_FILTERS_CCK
 
- LCNPHY_NUM_TX_DIG_FILTERS_OFDM
 
- LCNPHY_PAPD_CAL_CW
 
- LCNPHY_PAPD_CAL_OFDM
 
- LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL
 
- LCNPHY_TBL_ID_GAIN_IDX
 
- LCNPHY_TBL_ID_GAIN_TBL
 
- LCNPHY_TBL_ID_IQLOCAL
 
- LCNPHY_TBL_ID_PAPDCOMPDELTATBL
 
- LCNPHY_TBL_ID_RFSEQ
 
- LCNPHY_TBL_ID_SAMPLEPLAY
 
- LCNPHY_TBL_ID_SAMPLEPLAY1
 
- LCNPHY_TBL_ID_SPUR
 
- LCNPHY_TBL_ID_SW_CTRL
 
- LCNPHY_TBL_ID_TXPWRCTL
 
- LCNPHY_TEMPSENSE
 
- LCNPHY_TSSI_EXT
 
- LCNPHY_TSSI_POST_PA
 
- LCNPHY_TSSI_PRE_PA
 
- LCNPHY_TX_POWER_TABLE_SIZE
 
- LCNPHY_TX_PWR_CTRL_GAIN_OFFSET
 
- LCNPHY_TX_PWR_CTRL_HW
 
- LCNPHY_TX_PWR_CTRL_IQ_OFFSET
 
- LCNPHY_TX_PWR_CTRL_LO_OFFSET
 
- LCNPHY_TX_PWR_CTRL_MAC_OFFSET
 
- LCNPHY_TX_PWR_CTRL_MAX_NPT
 
- LCNPHY_TX_PWR_CTRL_OFF
 
- LCNPHY_TX_PWR_CTRL_PWR_OFFSET
 
- LCNPHY_TX_PWR_CTRL_RATE_OFFSET
 
- LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313
 
- LCNPHY_TX_PWR_CTRL_START_NPT
 
- LCNPHY_TX_PWR_CTRL_SW
 
- LCNPHY_TX_PWR_CTRL_TEMPBASED
 
- LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK
 
- LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT
 
- LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK
 
- LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT
 
- LCNREV_GE
 
- LCNREV_GT
 
- LCNREV_IS
 
- LCNREV_LE
 
- LCNREV_LT
 
- LCNXN_BASEREV
 
- LCN_BW_LMT
 
- LCN_CUR_DIV
 
- LCN_CUR_LMT
 
- LCN_EIO
 
- LCN_ENOENT
 
- LCN_ENOMEM
 
- LCN_FACT
 
- LCN_HOLE
 
- LCN_MULT
 
- LCN_OFFSET
 
- LCN_RL_NOT_MAPPED
 
- LCN_SPECIAL_VALUES
 
- LCN_TARGET_PWR
 
- LCN_TEMPSENSE_DEN
 
- LCN_TEMPSENSE_OFFSET
 
- LCN_VBAT_OFFSET_433X
 
- LCN_VBAT_SCALE_DEN
 
- LCN_VBAT_SCALE_NOM
 
- LCN_VBAT_SLOPE_433X
 
- LCN_VCO_DIV
 
- LCOEF_RANDIO_PAGES
 
- LCOEF_RPAGE
 
- LCOEF_RRANDIO
 
- LCOEF_RSEQIO
 
- LCOEF_WPAGE
 
- LCOEF_WRANDIO
 
- LCOEF_WSEQIO
 
- LCOL
 
- LCPLL1_CTL
 
- LCPLL2_CTL
 
- LCPLL_CD2X_CLOCK_DISABLE
 
- LCPLL_CD_CLOCK_DISABLE
 
- LCPLL_CD_SOURCE_FCLK
 
- LCPLL_CD_SOURCE_FCLK_DONE
 
- LCPLL_CLK_FREQ_337_5_BDW
 
- LCPLL_CLK_FREQ_450
 
- LCPLL_CLK_FREQ_54O_BDW
 
- LCPLL_CLK_FREQ_675_BDW
 
- LCPLL_CLK_FREQ_MASK
 
- LCPLL_CTL
 
- LCPLL_PLL_DISABLE
 
- LCPLL_PLL_ENABLE
 
- LCPLL_PLL_LOCK
 
- LCPLL_POWER_DOWN_ALLOW
 
- LCPLL_REF_BCLK
 
- LCPLL_REF_MASK
 
- LCPLL_REF_NON_SSC
 
- LCPLL_REF_PCH_SSC
 
- LCPLL_ROOT_CD_CLOCK_DISABLE
 
- LCP_ASYNCMAP
 
- LCP_DISC_REQ
 
- LCP_ECHO_REPLY
 
- LCP_ECHO_REQ
 
- LCP_MRU
 
- LCP_OPTION_ACCM
 
- LCP_OPTION_MAGIC
 
- LCP_OPTION_MRU
 
- LCP_PROTO_REJ
 
- LCR
 
- LCRR_BUFCMDC
 
- LCRR_BUFCMDC_SHIFT
 
- LCRR_CLKDIV
 
- LCRR_CLKDIV_SHIFT
 
- LCRR_DBYP
 
- LCRR_DBYP_SHIFT
 
- LCRR_EADC
 
- LCRR_EADC_SHIFT
 
- LCRR_ECL
 
- LCRR_ECL_SHIFT
 
- LCR_5BITS
 
- LCR_6BITS
 
- LCR_7BITS
 
- LCR_8BITS
 
- LCR_ACCESS_EFR
 
- LCR_BBES
 
- LCR_BBIE
 
- LCR_BBISC
 
- LCR_BIT5
 
- LCR_BIT6
 
- LCR_BIT7
 
- LCR_BIT8
 
- LCR_BITS_5
 
- LCR_BITS_6
 
- LCR_BITS_7
 
- LCR_BITS_8
 
- LCR_BITS_MASK
 
- LCR_BREAK
 
- LCR_CCIFC
 
- LCR_CCS
 
- LCR_CDLN
 
- LCR_CFC
 
- LCR_CFS
 
- LCR_CFSAH
 
- LCR_CFSAL
 
- LCR_CFWS
 
- LCR_CMDH
 
- LCR_CMDL
 
- LCR_DLAB
 
- LCR_DL_ENABLE
 
- LCR_EFR_ENABLE
 
- LCR_EPS
 
- LCR_GDSAH
 
- LCR_GDSAL
 
- LCR_GM
 
- LCR_HDS
 
- LCR_HNP
 
- LCR_HSE
 
- LCR_HSS
 
- LCR_HT
 
- LCR_HWT
 
- LCR_ILN
 
- LCR_LCDCC
 
- LCR_LCDCCRC
 
- LCR_LCDCOPC
 
- LCR_LCDIE
 
- LCR_LCDIM
 
- LCR_LCDIS
 
- LCR_LOW_POWER_MODE
 
- LCR_MISC
 
- LCR_OC
 
- LCR_PAR_EVEN
 
- LCR_PAR_MARK
 
- LCR_PAR_MASK
 
- LCR_PAR_NONE
 
- LCR_PAR_ODD
 
- LCR_PAR_SPACE
 
- LCR_PEN
 
- LCR_PENAB
 
- LCR_PEVEN
 
- LCR_PLHPIX
 
- LCR_PODD
 
- LCR_PONE
 
- LCR_PPOLS
 
- LCR_PR
 
- LCR_PRECW
 
- LCR_PZERO
 
- LCR_SB
 
- LCR_SBREAK
 
- LCR_SET_BREAK
 
- LCR_SLEEP
 
- LCR_SP
 
- LCR_STB
 
- LCR_STHS
 
- LCR_STKYP
 
- LCR_STOP1
 
- LCR_STOP2
 
- LCR_STOPB
 
- LCR_STOP_1
 
- LCR_STOP_1_5
 
- LCR_STOP_2
 
- LCR_STOP_MASK
 
- LCR_UIS
 
- LCR_VCCIS
 
- LCR_VCLKHW
 
- LCR_VCS
 
- LCR_VDS
 
- LCR_VHPCH
 
- LCR_VHPCL
 
- LCR_VHPN
 
- LCR_VIDRSAH
 
- LCR_VIDRSAL
 
- LCR_VIDWSAH
 
- LCR_VIDWSAL
 
- LCR_VIE
 
- LCR_VIHSS
 
- LCR_VIPDDET
 
- LCR_VIPDDST
 
- LCR_VIVE
 
- LCR_VIVS
 
- LCR_VIVSS
 
- LCR_VPHS
 
- LCR_VPHWC
 
- LCR_VPVS
 
- LCR_VPVWC
 
- LCR_VSE
 
- LCR_VSS
 
- LCR_VT
 
- LCR_VT2
 
- LCR_WLS0
 
- LCR_WLS1
 
- LCR_XCKHW
 
- LCR_XS
 
- LCR_YCKSW
 
- LCR_YSTS
 
- LCSLOTBASE
 
- LCSR
 
- LCSR1
 
- LCSR1_BS
 
- LCSR1_EOF
 
- LCSR1_IU
 
- LCSR1_SOF
 
- LCSR_ABC
 
- LCSR_BAU
 
- LCSR_BER
 
- LCSR_BS
 
- LCSR_CMD_INT
 
- LCSR_EOF
 
- LCSR_IOL
 
- LCSR_IOU
 
- LCSR_IUL
 
- LCSR_IUU
 
- LCSR_LDD
 
- LCSR_OOL
 
- LCSR_OOU
 
- LCSR_OU
 
- LCSR_OUL
 
- LCSR_OUU
 
- LCSR_QD
 
- LCSR_RD_ST
 
- LCSR_SINT
 
- LCSR_SOF
 
- LCSR_WR_AREG
 
- LCSR_WR_BREG
 
- LCSR_WR_IMM
 
- LCS_BUF_STATE_EMPTY
 
- LCS_BUF_STATE_LOCKED
 
- LCS_BUF_STATE_PROCESSED
 
- LCS_BUF_STATE_READY
 
- LCS_CCW_READ
 
- LCS_CCW_TRANSFER
 
- LCS_CCW_WRITE
 
- LCS_CH_STATE_CLEARED
 
- LCS_CH_STATE_ERROR
 
- LCS_CH_STATE_HALTED
 
- LCS_CH_STATE_INIT
 
- LCS_CH_STATE_RUNNING
 
- LCS_CH_STATE_STOPPED
 
- LCS_CH_STATE_SUSPENDED
 
- LCS_CMD_DELIPM
 
- LCS_CMD_LANSTAT
 
- LCS_CMD_QIPASSIST
 
- LCS_CMD_SETIPM
 
- LCS_CMD_SHUTDOWN
 
- LCS_CMD_STARTLAN
 
- LCS_CMD_STARTUP
 
- LCS_CMD_STOPLAN
 
- LCS_DBF_HEX
 
- LCS_DBF_TEXT
 
- LCS_DBF_TEXT_
 
- LCS_FRAME_TYPE_AUTO
 
- LCS_FRAME_TYPE_CONTROL
 
- LCS_FRAME_TYPE_ENET
 
- LCS_FRAME_TYPE_FDDI
 
- LCS_FRAME_TYPE_TR
 
- LCS_ILLEGAL_OFFSET
 
- LCS_INITIATOR_LGW
 
- LCS_INITIATOR_TCPIP
 
- LCS_INVALID_PORT_NO
 
- LCS_IOBUFFERSIZE
 
- LCS_IPASS_ARP_PROCESSING
 
- LCS_IPASS_INBOUND_CSUM_SUPP
 
- LCS_IPASS_IN_CHECKSUM_SUPPORT
 
- LCS_IPASS_IPV6_SUPPORT
 
- LCS_IPASS_IP_FILTERING
 
- LCS_IPASS_IP_FRAG_REASSEMBLY
 
- LCS_IPASS_MULTICAST_SUPPORT
 
- LCS_IPASS_OUTBOUND_CSUM_SUPP
 
- LCS_IPASS_OUT_CHECKSUM_SUPPORT
 
- LCS_IPM_STATE_DEL_REQUIRED
 
- LCS_IPM_STATE_ON_CARD
 
- LCS_IPM_STATE_SET_REQUIRED
 
- LCS_LANCMD_TIMEOUT_DEFAULT
 
- LCS_MAC_LENGTH
 
- LCS_MULTICAST_CMD_SIZE
 
- LCS_NUM_BUFFS
 
- LCS_RECOVERY_THREAD
 
- LCS_SENSE_BUS_OUT_CHECK
 
- LCS_SENSE_BYTE_0
 
- LCS_SENSE_BYTE_1
 
- LCS_SENSE_BYTE_2
 
- LCS_SENSE_BYTE_3
 
- LCS_SENSE_CMD_REJECT
 
- LCS_SENSE_DEVICE_ONLINE
 
- LCS_SENSE_EQUIPMENT_CHECK
 
- LCS_SENSE_INTERFACE_DISCONNECT
 
- LCS_SENSE_INTERVENTION_REQUIRED
 
- LCS_SENSE_RESETTING_EVENT
 
- LCS_SET_MC_THREAD
 
- LCS_STATUS
 
- LCS_STD_CMD_SIZE
 
- LCTL10
 
- LCTL11
 
- LCTL12
 
- LCTL13
 
- LCTL14
 
- LCTL15
 
- LCTL16
 
- LCTL17
 
- LCTL18
 
- LCTL19
 
- LCTL20
 
- LCTL21
 
- LCTL22
 
- LCTL23
 
- LCTL24
 
- LCTL25
 
- LCTL26
 
- LCTL6
 
- LCTL7
 
- LCTL8
 
- LCTL9
 
- LCTLR
 
- LCTL_CR0
 
- LCTL_CR10
 
- LCTL_CR11
 
- LCTL_CR14
 
- LCTL_CR6
 
- LCTL_CR9
 
- LCT_LEM_MAX
 
- LCWCH
 
- LCWCH_ADDR
 
- LCWCH_CH_MASK
 
- LCWCH_CH_SHIFT
 
- LCWCH_CW_MASK
 
- LCWCH_CW_SHIFT
 
- LCWHB_BD
 
- LCWHB_BK_EN
 
- LCWHB_CH
 
- LCWHB_CW
 
- LCXP
 
- LCXP_ADDR
 
- LCXP_CC_BLACK
 
- LCXP_CC_MASK
 
- LCXP_CC_REVERSED
 
- LCXP_CC_TRAMSPARENT
 
- LCXP_CC_WHITE
 
- LCXP_CXP_MASK
 
- LCYP
 
- LCYP_ADDR
 
- LCYP_CYP_MASK
 
- LC_162M
 
- LC_270M
 
- LC_540M
 
- LC_810M
 
- LC_ALLOW_PDWN_IN_L1
 
- LC_ALLOW_PDWN_IN_L23
 
- LC_ASPM_TO_L1_DIS
 
- LC_CKDRVHZ
 
- LC_CKDRVOHZ
 
- LC_CKDRVPD
 
- LC_CKTEST
 
- LC_CLR_FAILED_SPD_CHANGE_CNT
 
- LC_COEF
 
- LC_COEFB
 
- LC_COEFR
 
- LC_COMM_EXEC__A
 
- LC_CONTROL_ALC
 
- LC_CONTROL_LIMITER
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_A_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_A_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_B_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_B_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_C_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_C_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_D_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_D_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_E_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_E_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_F_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_F_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_G_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_G_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_H_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_H_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_I_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_I_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_J_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_J_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_K_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_K_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_L_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_L_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_M_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_M_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_N_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_N_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_O_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_O_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_P_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_PORT_P_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_A_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_A_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_B_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_B_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_C_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_C_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_D_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_D_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_E_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_E_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_F_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_F_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_G_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_G_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_H_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_H_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_I_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_I_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_J_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_J_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_K_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_K_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_L_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_L_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_M_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_M_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_N_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_N_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_O_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_O_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_P_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_0__TXCLK_DYN_TR_PORT_P_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_DYN_PORT_GATE_LATENCY_MASK
 
- LC_CPM_CONTROL_1__TXCLK_DYN_PORT_GATE_LATENCY__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_A_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_A_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_B_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_B_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_C_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_C_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_D_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_D_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_E_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_E_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_F_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_F_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_G_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_G_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_H_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_H_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_I_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_I_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_J_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_J_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_K_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_K_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_L_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_L_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_M_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_M_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_N_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_N_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_O_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_O_GATE_ENABLE__SHIFT
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_P_GATE_ENABLE_MASK
 
- LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_P_GATE_ENABLE__SHIFT
 
- LC_CTR
 
- LC_CURRENT_DATA_RATE
 
- LC_CURRENT_DATA_RATE_MASK
 
- LC_CURRENT_DATA_RATE_SHIFT
 
- LC_DET
 
- LC_DETECTED_LINK_WIDTH_MASK
 
- LC_DETECTED_LINK_WIDTH_SHIFT
 
- LC_DIRTY
 
- LC_DYN_LANES_PWR_STATE
 
- LC_DYN_LANES_PWR_STATE_MASK
 
- LC_DYN_LANES_PWR_STATE_SHIFT
 
- LC_EXTENDED
 
- LC_FLUSH_WAIT
 
- LC_FORCE_DIS_HW_SPEED_CHANGE
 
- LC_FORCE_DIS_SW_SPEED_CHANGE
 
- LC_FORCE_EN_HW_SPEED_CHANGE
 
- LC_FORCE_EN_SW_SPEED_CHANGE
 
- LC_FREE
 
- LC_FREQ
 
- LC_FREQ_2K
 
- LC_GEN2_EN
 
- LC_GEN2_EN_STRAP
 
- LC_GEN3_EN_STRAP
 
- LC_GET_MAY_CHANGE
 
- LC_GET_MAY_USE_UNCOMMITTED
 
- LC_GO_TO_RECOVERY
 
- LC_HS_TX_EN
 
- LC_HW_VOLTAGE_IF_CONTROL
 
- LC_HW_VOLTAGE_IF_CONTROL_MASK
 
- LC_HW_VOLTAGE_IF_CONTROL_SHIFT
 
- LC_INITIATE_LINK_SPEED_CHANGE
 
- LC_L0S_INACTIVITY
 
- LC_L0S_INACTIVITY_MASK
 
- LC_L0S_INACTIVITY_SHIFT
 
- LC_L1_INACTIVITY
 
- LC_L1_INACTIVITY_MASK
 
- LC_L1_INACTIVITY_SHIFT
 
- LC_LINK_WIDTH_MASK
 
- LC_LINK_WIDTH_RD_MASK
 
- LC_LINK_WIDTH_RD_SHIFT
 
- LC_LINK_WIDTH_SHIFT
 
- LC_LINK_WIDTH_X0
 
- LC_LINK_WIDTH_X1
 
- LC_LINK_WIDTH_X16
 
- LC_LINK_WIDTH_X2
 
- LC_LINK_WIDTH_X4
 
- LC_LINK_WIDTH_X8
 
- LC_LOCKED
 
- LC_LONG
 
- LC_MAX_ACTIVE
 
- LC_MEDIUM
 
- LC_N_FTS_MASK
 
- LC_OPERATING_LINK_WIDTH_MASK
 
- LC_OPERATING_LINK_WIDTH_SHIFT
 
- LC_ORDER
 
- LC_OTHER_SIDE_EVER_SENT_GEN2
 
- LC_OTHER_SIDE_EVER_SENT_GEN3
 
- LC_OTHER_SIDE_SUPPORTS_GEN2
 
- LC_OTHER_SIDE_SUPPORTS_GEN3
 
- LC_PAGES
 
- LC_PARANOIA
 
- LC_PMI_TO_L1_DIS
 
- LC_POINT_7_PLUS_EN
 
- LC_RADI
 
- LC_RA_RAM_FILTER_CRMM_A__A
 
- LC_RA_RAM_FILTER_CRMM_A__PRE
 
- LC_RA_RAM_FILTER_CRMM_B__A
 
- LC_RA_RAM_FILTER_CRMM_B__PRE
 
- LC_RA_RAM_FILTER_SRMM_A__A
 
- LC_RA_RAM_FILTER_SRMM_A__PRE
 
- LC_RA_RAM_FILTER_SRMM_B__A
 
- LC_RA_RAM_FILTER_SRMM_B__PRE
 
- LC_RA_RAM_FILTER_SYM_SET__A
 
- LC_RA_RAM_FILTER_SYM_SET__PRE
 
- LC_RA_RAM_IFINCR_NOM_L__A
 
- LC_RECONFIG_ARC_MISSING_ESCAPE
 
- LC_RECONFIG_NOW
 
- LC_REDO_EQ
 
- LC_RENEGOTIATE_EN
 
- LC_RENEGOTIATION_SUPPORT
 
- LC_REVERSE_RCVR
 
- LC_REVERSE_XMIT
 
- LC_SECAM_NICAM
 
- LC_SET_QUIESCE
 
- LC_SHORT
 
- LC_SHORT_RECONFIG_EN
 
- LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_MASK
 
- LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_SHIFT
 
- LC_STARVING
 
- LC_TARGET_LINK_SPEED_OVERRIDE_EN
 
- LC_TARGET_LINK_SPEED_OVERRIDE_MASK
 
- LC_TARGET_LINK_SPEED_OVERRIDE_SHIFT
 
- LC_ULPM_EN
 
- LC_UPCONFIGURE_DIS
 
- LC_UPCONFIGURE_SUPPORT
 
- LC_VOLTAGE_TIMER_SEL_MASK
 
- LC_WAKEUP_EN
 
- LC_XC
 
- LC_XMIT_N_FTS
 
- LC_XMIT_N_FTS_MASK
 
- LC_XMIT_N_FTS_OVERRIDE_EN
 
- LC_XMIT_N_FTS_SHIFT
 
- LC_YC
 
- LD
 
- LD0_CFG0_LDO25_LEVEL
 
- LD0_HS_TX_EN
 
- LD0_ULPM_EN
 
- LD0_WAKEUP_EN
 
- LD16
 
- LD16I
 
- LD32
 
- LD32I
 
- LD64
 
- LD64A
 
- LD64I
 
- LD8
 
- LD8I
 
- LDA15_EN
 
- LDA15_OBUF
 
- LDA15_REG_VOS
 
- LDA15_STBY
 
- LDAC2LCH
 
- LDAC2MONOMIX
 
- LDAC2RCH
 
- LDACLNR
 
- LDACQ_IMM_OP
 
- LDACQ_OP
 
- LDAC_PWR_ON
 
- LDAC_VOL
 
- LDA_IMM_OP
 
- LDA_OP
 
- LDBBBGCL_BGA_MASK
 
- LDBBBGCL_BGA_SHIFT
 
- LDBBBGCL_BGB_MASK
 
- LDBBBGCL_BGB_SHIFT
 
- LDBBBGCL_BGG_MASK
 
- LDBBBGCL_BGG_SHIFT
 
- LDBBBGCL_BGR_MASK
 
- LDBBBGCL_BGR_SHIFT
 
- LDBBLOCR_CHLC_MASK
 
- LDBBLOCR_CHLC_SHIFT
 
- LDBBLOCR_CVLC_MASK
 
- LDBBLOCR_CVLC_SHIFT
 
- LDBBPPCR_AP_MASK
 
- LDBBPPCR_AP_SHIFT
 
- LDBBPPCR_B_MASK
 
- LDBBPPCR_B_SHIFT
 
- LDBBPPCR_GY_MASK
 
- LDBBPPCR_GY_SHIFT
 
- LDBBPPCR_R_MASK
 
- LDBBPPCR_R_SHIFT
 
- LDBBSAAR_AP_MASK
 
- LDBBSAAR_AP_SHIFT
 
- LDBBSAAR_B_MASK
 
- LDBBSAAR_B_SHIFT
 
- LDBBSAAR_GY_MASK
 
- LDBBSAAR_GY_SHIFT
 
- LDBBSAAR_R_MASK
 
- LDBBSAAR_R_SHIFT
 
- LDBBSACR_FG2A_MASK
 
- LDBBSACR_FG2A_SHIFT
 
- LDBBSACR_FG2B_MASK
 
- LDBBSACR_FG2B_SHIFT
 
- LDBBSACR_FG2G_MASK
 
- LDBBSACR_FG2G_SHIFT
 
- LDBBSACR_FG2R_MASK
 
- LDBBSACR_FG2R_SHIFT
 
- LDBBSAYR_FG1A_MASK
 
- LDBBSAYR_FG1A_SHIFT
 
- LDBBSAYR_FG1B_MASK
 
- LDBBSAYR_FG1B_SHIFT
 
- LDBBSAYR_FG1G_MASK
 
- LDBBSAYR_FG1G_SHIFT
 
- LDBBSAYR_FG1R_MASK
 
- LDBBSAYR_FG1R_SHIFT
 
- LDBBSIFR_AL_1
 
- LDBBSIFR_AL_MASK
 
- LDBBSIFR_AL_PK
 
- LDBBSIFR_AL_PL1
 
- LDBBSIFR_AL_PL8
 
- LDBBSIFR_BRSEL
 
- LDBBSIFR_CHRR_420
 
- LDBBSIFR_CHRR_422
 
- LDBBSIFR_CHRR_444
 
- LDBBSIFR_CV0
 
- LDBBSIFR_CV1
 
- LDBBSIFR_CV2
 
- LDBBSIFR_CV3
 
- LDBBSIFR_CV_MASK
 
- LDBBSIFR_EN
 
- LDBBSIFR_LAY_MASK
 
- LDBBSIFR_LAY_SHIFT
 
- LDBBSIFR_MX
 
- LDBBSIFR_MY
 
- LDBBSIFR_ROP3_MASK
 
- LDBBSIFR_ROP3_SHIFT
 
- LDBBSIFR_RPKF_ARGB32
 
- LDBBSIFR_RPKF_MASK
 
- LDBBSIFR_RPKF_RGB16
 
- LDBBSIFR_RPKF_RGB24
 
- LDBBSIFR_RY
 
- LDBBSIFR_SWPB
 
- LDBBSIFR_SWPL
 
- LDBBSIFR_SWPW
 
- LDBBSIFR_VS
 
- LDBBSMWR_BSMWA_MASK
 
- LDBBSMWR_BSMWA_SHIFT
 
- LDBBSMWR_BSMW_MASK
 
- LDBBSMWR_BSMW_SHIFT
 
- LDBBSSZR_BHSS_MASK
 
- LDBBSSZR_BHSS_SHIFT
 
- LDBBSSZR_BVSS_MASK
 
- LDBBSSZR_BVSS_SHIFT
 
- LDBCR
 
- LDBCR_UPC
 
- LDBCR_UPD
 
- LDBCR_UPF
 
- LDBG
 
- LDBG_CONFIG_CMD
 
- LDBIAS_IMM_OP
 
- LDBIAS_OP
 
- LDB_BGREF_RMODE_INT
 
- LDB_BIT_MAP_CH0_JEIDA
 
- LDB_BIT_MAP_CH1_JEIDA
 
- LDB_CH0_MODE_EN_MASK
 
- LDB_CH0_MODE_EN_TO_DI0
 
- LDB_CH0_MODE_EN_TO_DI1
 
- LDB_CH1_MODE_EN_MASK
 
- LDB_CH1_MODE_EN_TO_DI0
 
- LDB_CH1_MODE_EN_TO_DI1
 
- LDB_DATA_WIDTH_CH0_24
 
- LDB_DATA_WIDTH_CH1_24
 
- LDB_DI0_VS_POL_ACT_LOW
 
- LDB_DI1_VS_POL_ACT_LOW
 
- LDB_SPLIT_MODE_EN
 
- LDBnBBGCL
 
- LDBnBLOCR
 
- LDBnBPPCR
 
- LDBnBSAAR
 
- LDBnBSACR
 
- LDBnBSAYR
 
- LDBnBSIFR
 
- LDBnBSMWR
 
- LDBnBSSZR
 
- LDCCLRACQ_IMM_OP
 
- LDCCLRACQ_OP
 
- LDCCLR_IMM_OP
 
- LDCCLR_OP
 
- LDCMD_PAL
 
- LDCNC_IMM_OP
 
- LDCNC_OP
 
- LDCNT1R
 
- LDCNT1R_DE
 
- LDCNT2R
 
- LDCNT2R_BR
 
- LDCNT2R_DO
 
- LDCNT2R_MD
 
- LDCNT2R_ME
 
- LDCNT2R_SE
 
- LDCNTR
 
- LDCNTR_DON
 
- LDCNTR_DON2
 
- LDCONST
 
- LDCW
 
- LDC_ABORT
 
- LDC_ACK
 
- LDC_CHANNEL_DOWN
 
- LDC_CHANNEL_RESETTING
 
- LDC_CHANNEL_UP
 
- LDC_COPY_IN
 
- LDC_COPY_OUT
 
- LDC_CTRL
 
- LDC_CTRL_MSK
 
- LDC_DATA
 
- LDC_DEBUG_DATA
 
- LDC_DEBUG_HS
 
- LDC_DEBUG_RX
 
- LDC_DEBUG_STATE
 
- LDC_DEBUG_TX
 
- LDC_DEFAULT_MTU
 
- LDC_DEFAULT_NUM_ENTRIES
 
- LDC_ERR
 
- LDC_EVENT_DATA_READY
 
- LDC_EVENT_RESET
 
- LDC_EVENT_UP
 
- LDC_FLAG_ALLOCED_QUEUES
 
- LDC_FLAG_REGISTERED_IRQS
 
- LDC_FLAG_REGISTERED_QUEUES
 
- LDC_FLAG_RESET
 
- LDC_FRAG_MASK
 
- LDC_HS_CLOSED
 
- LDC_HS_COMPLETE
 
- LDC_HS_GOTRTR
 
- LDC_HS_GOTVERS
 
- LDC_HS_OPEN
 
- LDC_HS_SENTRTR
 
- LDC_INFO
 
- LDC_IOTABLE_SIZE
 
- LDC_IRQ_NAME_MAX
 
- LDC_LEN
 
- LDC_MAP_ALL
 
- LDC_MAP_DIRECT
 
- LDC_MAP_IO
 
- LDC_MAP_R
 
- LDC_MAP_RW
 
- LDC_MAP_RWX
 
- LDC_MAP_SHADOW
 
- LDC_MAP_W
 
- LDC_MAP_X
 
- LDC_MEM_EXEC
 
- LDC_MEM_READ
 
- LDC_MEM_WRITE
 
- LDC_MODE_RAW
 
- LDC_MODE_RESERVED
 
- LDC_MODE_STREAM
 
- LDC_MODE_UNRELIABLE
 
- LDC_MTE_COPY_R
 
- LDC_MTE_COPY_W
 
- LDC_MTE_EXEC
 
- LDC_MTE_IOMMU_R
 
- LDC_MTE_IOMMU_W
 
- LDC_MTE_PADDR
 
- LDC_MTE_READ
 
- LDC_MTE_SZ16GB
 
- LDC_MTE_SZ256MB
 
- LDC_MTE_SZ2GB
 
- LDC_MTE_SZ32MB
 
- LDC_MTE_SZ4MB
 
- LDC_MTE_SZ512K
 
- LDC_MTE_SZ64K
 
- LDC_MTE_SZ8K
 
- LDC_MTE_SZALL
 
- LDC_MTE_WRITE
 
- LDC_NACK
 
- LDC_PACKET_SIZE
 
- LDC_RDX
 
- LDC_RTR
 
- LDC_RTS
 
- LDC_START
 
- LDC_STATE_BOUND
 
- LDC_STATE_CONNECTED
 
- LDC_STATE_INIT
 
- LDC_STATE_INVALID
 
- LDC_STATE_READY
 
- LDC_STOP
 
- LDC_VERS
 
- LDDCKPAT1R
 
- LDDCKPAT2R
 
- LDDCKR
 
- LDDCKR_ICKSEL_BUS
 
- LDDCKR_ICKSEL_EXT
 
- LDDCKR_ICKSEL_HDMI
 
- LDDCKR_ICKSEL_MASK
 
- LDDCKR_ICKSEL_MIPI
 
- LDDCKR_MOSEL
 
- LDDCKSTPR
 
- LDDCKSTPR_DCKSTP
 
- LDDCKSTPR_DCKSTS
 
- LDDDSR
 
- LDDDSR_BS
 
- LDDDSR_LS
 
- LDDDSR_WS
 
- LDDFR
 
- LDDFR_16BPP_RGB555
 
- LDDFR_16BPP_RGB565
 
- LDDFR_1BPP_MONO
 
- LDDFR_2BPP_MONO
 
- LDDFR_4BPP
 
- LDDFR_4BPP_MONO
 
- LDDFR_6BPP_MONO
 
- LDDFR_8BPP
 
- LDDFR_CC
 
- LDDFR_CF0
 
- LDDFR_CF1
 
- LDDFR_COLOR_MASK
 
- LDDFR_PABD
 
- LDDFR_PKF_ARGB32
 
- LDDFR_PKF_MASK
 
- LDDFR_PKF_RGB16
 
- LDDFR_PKF_RGB24
 
- LDDFR_YF_420
 
- LDDFR_YF_422
 
- LDDFR_YF_444
 
- LDDFR_YF_MASK
 
- LDDRAR
 
- LDDRAR_RA
 
- LDDRDR
 
- LDDRDR_DRD_MASK
 
- LDDRDR_RSR
 
- LDDWAR
 
- LDDWAR_WA
 
- LDDWD0R
 
- LDDWDxR_RSW
 
- LDDWDxR_WDACT
 
- LDD_USER
 
- LDEV_ACPI_PME_CLR_REG
 
- LDEV_ACPI_PME_EN_REG
 
- LDEV_ACPI_STATE_REG
 
- LDEV_ACPI_WAKE_EN_REG
 
- LDFA_IMM_OP
 
- LDFA_OP
 
- LDFCCLR_IMM_OP
 
- LDFCCLR_OP
 
- LDFCNC_IMM_OP
 
- LDFCNC_OP
 
- LDFIRST
 
- LDFSA_IMM_OP
 
- LDFSA_OP
 
- LDFS_IMM_OP
 
- LDFS_OP
 
- LDF_IMM_OP
 
- LDF_OP
 
- LDG_IMGMT
 
- LDG_IMGMT_ARM
 
- LDG_IMGMT_TIMER
 
- LDG_INVALID
 
- LDG_NUM
 
- LDG_TIMER_RES
 
- LDG_TIMER_RES_VAL
 
- LDHAJR
 
- LDHCNR
 
- LDHPDR
 
- LDHSYNR
 
- LDI
 
- LDICKR
 
- LDICKR_CLKDIV
 
- LDICKR_CLKSRC
 
- LDIM_BL_ADDR_PORT
 
- LDIM_BL_DATA_PORT
 
- LDINTR
 
- LDINTR_FE
 
- LDINTR_FINTEN
 
- LDINTR_FINTS
 
- LDINTR_FS
 
- LDINTR_MINTEN
 
- LDINTR_MINTS
 
- LDINTR_STATUS_MASK
 
- LDINTR_VEE
 
- LDINTR_VEINTEN
 
- LDINTR_VEINTS
 
- LDINTR_VES
 
- LDINTR_VINTE
 
- LDINTR_VINTS
 
- LDINTR_VINTSEL
 
- LDINTR_VSE
 
- LDINTR_VSINTEN
 
- LDINTR_VSINTS
 
- LDINTR_VSS
 
- LDISC_DEBUG_HANGUP
 
- LDISC_FLAG_DEFINED
 
- LDISC_SEM_NORMAL
 
- LDISC_SEM_OTHER
 
- LDISC_TIME
 
- LDI_CTRL
 
- LDI_DSP_SIZE
 
- LDI_EN
 
- LDI_HDMI_DSI_GT
 
- LDI_HRZ_CTRL0
 
- LDI_HRZ_CTRL1
 
- LDI_INT_CLR
 
- LDI_INT_EN
 
- LDI_MSK_INT
 
- LDI_MTP_LENGTH
 
- LDI_OUT_RGB_565
 
- LDI_OUT_RGB_666
 
- LDI_OUT_RGB_888
 
- LDI_PLR_CTRL
 
- LDI_VRT_CTRL0
 
- LDI_VRT_CTRL1
 
- LDI_WORK_MODE
 
- LDJ_DEVICE
 
- LDLAOR
 
- LDLEN_ENABLE_OSL_COUNT
 
- LDLEN_MATH0
 
- LDLEN_MATH1
 
- LDLEN_MATH2
 
- LDLEN_MATH3
 
- LDLEN_RST_CHA_OFIFO_PTR
 
- LDLEN_RST_OFIFO
 
- LDLEN_SET_OFIFO_OFFSET_MASK
 
- LDLEN_SET_OFIFO_OFFSET_SHIFT
 
- LDLEN_SET_OFIFO_OFF_RSVD
 
- LDLEN_SET_OFIFO_OFF_VALID
 
- LDLIRNR
 
- LDLY
 
- LDMLSR
 
- LDMT1R
 
- LDMT1R_DAPOL
 
- LDMT1R_DIPOL
 
- LDMT1R_DWCNT
 
- LDMT1R_DWPOL
 
- LDMT1R_HPOL
 
- LDMT1R_HSCNT
 
- LDMT1R_IFM
 
- LDMT1R_MIFTYP_MASK
 
- LDMT1R_MIFTYP_RGB12A
 
- LDMT1R_MIFTYP_RGB12B
 
- LDMT1R_MIFTYP_RGB16
 
- LDMT1R_MIFTYP_RGB18
 
- LDMT1R_MIFTYP_RGB24
 
- LDMT1R_MIFTYP_RGB8
 
- LDMT1R_MIFTYP_RGB9
 
- LDMT1R_MIFTYP_SYS12
 
- LDMT1R_MIFTYP_SYS16A
 
- LDMT1R_MIFTYP_SYS16B
 
- LDMT1R_MIFTYP_SYS16C
 
- LDMT1R_MIFTYP_SYS18
 
- LDMT1R_MIFTYP_SYS24
 
- LDMT1R_MIFTYP_SYS8A
 
- LDMT1R_MIFTYP_SYS8B
 
- LDMT1R_MIFTYP_SYS8C
 
- LDMT1R_MIFTYP_SYS8D
 
- LDMT1R_MIFTYP_SYS9
 
- LDMT1R_MIFTYP_YCBCR
 
- LDMT1R_VPOL
 
- LDMT2R
 
- LDMT2R_CSUP_MASK
 
- LDMT2R_CSUP_SHIFT
 
- LDMT2R_RSV
 
- LDMT2R_VSEL
 
- LDMT2R_WCEC_MASK
 
- LDMT2R_WCEC_SHIFT
 
- LDMT2R_WCLW_MASK
 
- LDMT2R_WCLW_SHIFT
 
- LDMT2R_WCSC_MASK
 
- LDMT2R_WCSC_SHIFT
 
- LDMT3R
 
- LDMT3R_RCEC_MASK
 
- LDMT3R_RCEC_SHIFT
 
- LDMT3R_RCLW_MASK
 
- LDMT3R_RCLW_SHIFT
 
- LDMT3R_RCSC_MASK
 
- LDMT3R_RCSC_SHIFT
 
- LDMT3R_RDLC_MASK
 
- LDMT3R_RDLC_SHIFT
 
- LDMTR
 
- LDMTR_CL1CNT
 
- LDMTR_CL1POL
 
- LDMTR_CL2CNT
 
- LDMTR_DISPEN_LOWACT
 
- LDMTR_DPOL_LOWACT
 
- LDMTR_DSTN_COLOR_12
 
- LDMTR_DSTN_COLOR_16
 
- LDMTR_DSTN_COLOR_8
 
- LDMTR_DSTN_MONO_16
 
- LDMTR_DSTN_MONO_8
 
- LDMTR_FLMPOL
 
- LDMTR_MCNT
 
- LDMTR_STN_COLOR_12
 
- LDMTR_STN_COLOR_16
 
- LDMTR_STN_COLOR_4
 
- LDMTR_STN_COLOR_8
 
- LDMTR_STN_MONO_4
 
- LDMTR_STN_MONO_8
 
- LDMTR_TFT_COLOR_16
 
- LDM_DB_SIZE
 
- LDM_H_BIT
 
- LDM_PARTITION
 
- LDM_S_BIT
 
- LDN
 
- LDNI_MAX
 
- LDNREG
 
- LDN_AUXIO
 
- LDN_COM1
 
- LDN_COM2
 
- LDN_DEVICE_ERROR
 
- LDN_FDC
 
- LDN_GAME
 
- LDN_GPIO
 
- LDN_IDE1
 
- LDN_IDE2
 
- LDN_KBC
 
- LDN_MAC
 
- LDN_MAX
 
- LDN_MIF
 
- LDN_PARPORT
 
- LDN_RESV1
 
- LDN_RESV2
 
- LDN_RTC
 
- LDN_RXDMA
 
- LDN_TXDMA
 
- LDO0_EN
 
- LDO1
 
- LDO10
 
- LDO1234_PULL_DOWN_REGISTER_MASK
 
- LDO14_PD_CR
 
- LDO15_EN
 
- LDO15_READY
 
- LDO1_ACTIVE_CR
 
- LDO1_ILIM_SHIFT
 
- LDO1_PULL_DOWN_MASK
 
- LDO1_PULL_DOWN_REG
 
- LDO1_SEL_MASK
 
- LDO1_STDBY_CR
 
- LDO1_VSEL_SHIFT
 
- LDO2
 
- LDO25_FRC_ON
 
- LDO25_LARGEA
 
- LDO25_LEVEL
 
- LDO2_ACTIVE_CR
 
- LDO2_ILIM_SHIFT
 
- LDO2_PULL_DOWN_MASK
 
- LDO2_PULL_DOWN_REG
 
- LDO2_STDBY_CR
 
- LDO2_VSEL_SHIFT
 
- LDO2_VSEL_table
 
- LDO3
 
- LDO3318_PWR_MASK
 
- LDO3_ACTIVE_CR
 
- LDO3_EN
 
- LDO3_PULL_DOWN_MASK
 
- LDO3_PULL_DOWN_REG
 
- LDO3_SEL_MASK
 
- LDO3_STDBY_CR
 
- LDO4
 
- LDO4_ACTIVE_CR
 
- LDO4_PULL_DOWN_MASK
 
- LDO4_PULL_DOWN_REG
 
- LDO4_STDBY_CR
 
- LDO5
 
- LDO56_VREF_PD_CR
 
- LDO56_VREF_PD_CR_REG_MASK
 
- LDO5_ACTIVE_CR
 
- LDO5_PULL_DOWN_MASK
 
- LDO5_PULL_DOWN_REG
 
- LDO5_STDBY_CR
 
- LDO6
 
- LDO6_ACTIVE_CR
 
- LDO6_PULL_DOWN_MASK
 
- LDO6_PULL_DOWN_REG
 
- LDO6_STDBY_CR
 
- LDO7
 
- LDO8
 
- LDO9
 
- LDOA1
 
- LDOA15_CTRL
 
- LDOA15_ENABLE
 
- LDOA15_OBUF
 
- LDOA15_REG_VOS
 
- LDOA15_STANDBY
 
- LDOA15_VOADJ_SHIFT
 
- LDOA2
 
- LDOA3
 
- LDOE25_EN
 
- LDOE25_SHIFT
 
- LDOFF_CHG_NONSEQLIODN_MASK
 
- LDOFF_CHG_NONSEQLIODN_NON_SEQ
 
- LDOFF_CHG_NONSEQLIODN_SEQ
 
- LDOFF_CHG_NONSEQLIODN_SHIFT
 
- LDOFF_CHG_NONSEQLIODN_TRUSTED
 
- LDOFF_CHG_SEQLIODN_MASK
 
- LDOFF_CHG_SEQLIODN_NON_SEQ
 
- LDOFF_CHG_SEQLIODN_SEQ
 
- LDOFF_CHG_SEQLIODN_SHIFT
 
- LDOFF_CHG_SEQLIODN_TRUSTED
 
- LDOFF_CHG_SHARE_MASK
 
- LDOFF_CHG_SHARE_NEVER
 
- LDOFF_CHG_SHARE_OK_NO_PROP
 
- LDOFF_CHG_SHARE_OK_PROP
 
- LDOFF_CHG_SHARE_SHIFT
 
- LDOFF_DISABLE_AUTO_NFIFO
 
- LDOFF_ENABLE_AUTO_NFIFO
 
- LDOHCI12_CTRL
 
- LDOIVREXITDONE_CPU_0__LDOIVREXITDONE_MASK
 
- LDOIVREXITDONE_CPU_0__LDOIVREXITDONE__SHIFT
 
- LDOIVREXITDONE_CPU_1__LDOIVREXITDONE_MASK
 
- LDOIVREXITDONE_CPU_1__LDOIVREXITDONE__SHIFT
 
- LDOIVRON_CPU_0__CK_LDOIVRON_MASK
 
- LDOIVRON_CPU_0__CK_LDOIVRON__SHIFT
 
- LDOIVRON_CPU_1__CK_LDOIVRON_MASK
 
- LDOIVRON_CPU_1__CK_LDOIVRON__SHIFT
 
- LDOS_ICCTO_CR
 
- LDOS_ICCTO_CR_REG_MASK
 
- LDOS_MASK_RANK_CR
 
- LDOS_MASK_RESET_CR
 
- LDOUTCTRL1
 
- LDOV12D_CTRL
 
- LDOV12D_ENABLE
 
- LDOV12D_STANDBY
 
- LDOV12D_VADJ_SHIFT
 
- LDO_650_25
 
- LDO_750_50
 
- LDO_AV12S_CFG
 
- LDO_AV12S_TUNE_DF
 
- LDO_AV12S_TUNE_MASK
 
- LDO_A_SETTING
 
- LDO_A_VOLTAGE
 
- LDO_BGSEL
 
- LDO_BUCK_VOLTAGE_SHIFT
 
- LDO_BYPASS_MASK
 
- LDO_BYP_SHIFT
 
- LDO_CFG0
 
- LDO_CFG0_BGSEL
 
- LDO_CFG0_DELAY1
 
- LDO_CFG0_DELAY2
 
- LDO_CFG0_DELAY3
 
- LDO_CFG0_LDO25_LARGEA
 
- LDO_CFG0_LDO_CORE_VLEVEL
 
- LDO_CONFIG2
 
- LDO_CORE_LEVEL
 
- LDO_CTL
 
- LDO_C_SETTING
 
- LDO_C_VOLTAGE
 
- LDO_D12_TUNE_DF
 
- LDO_D12_TUNE_MASK
 
- LDO_D3318_18V
 
- LDO_D3318_33V
 
- LDO_D3318_MASK
 
- LDO_DV12S_CFG
 
- LDO_DV18_CFG
 
- LDO_DV18_SR_DF
 
- LDO_DV18_SR_MASK
 
- LDO_D_SETTING
 
- LDO_D_VOLTAGE
 
- LDO_ENABLE_MASK
 
- LDO_EXT_SETTING
 
- LDO_E_SETTING
 
- LDO_E_SLEEP_SETTING
 
- LDO_FET_FULL_ON
 
- LDO_F_SETTING
 
- LDO_G_SETTING
 
- LDO_H_SETTING
 
- LDO_I2C_EN
 
- LDO_I2C_EN_MASK
 
- LDO_I2C_EN_SHIFT
 
- LDO_ILIM_MASK
 
- LDO_K_SETTING
 
- LDO_MASK_RANK_REGISTER_MASK
 
- LDO_MASK_RESET_REGISTER_MASK
 
- LDO_MAX_VOLT
 
- LDO_MIN_VOLT
 
- LDO_MV
 
- LDO_OFF
 
- LDO_ON
 
- LDO_PAREF
 
- LDO_POWER_CFG
 
- LDO_POWER_GATE
 
- LDO_POW_SDVDD1_MASK
 
- LDO_POW_SDVDD1_OFF
 
- LDO_POW_SDVDD1_ON
 
- LDO_PWR_DWN_SHIFT
 
- LDO_PWR_SEL
 
- LDO_RAMP_UP_FREQ_IN_MHZ
 
- LDO_RAMP_UP_UNIT_IN_CYCLES
 
- LDO_REF12_TUNE_DF
 
- LDO_REF12_TUNE_MASK
 
- LDO_SEL_MASK
 
- LDO_SEL_SHIFT
 
- LDO_SEQ_I2C
 
- LDO_SEQ_MASK
 
- LDO_SEQ_SHIFT
 
- LDO_ST_MASK
 
- LDO_ST_MODE_BIT
 
- LDO_ST_ON_BIT
 
- LDO_ST_SHIFT
 
- LDO_SUSPEND
 
- LDO_TRACK_VSEL_MASK
 
- LDO_USB_CTRL
 
- LDO_USB_SDIO
 
- LDO_VALUE
 
- LDO_VBR_EN
 
- LDO_VCC_1V8
 
- LDO_VCC_3V3
 
- LDO_VCC_CFG0
 
- LDO_VCC_CFG1
 
- LDO_VCC_LMTVTH_2A
 
- LDO_VCC_LMTVTH_MASK
 
- LDO_VCC_LMT_EN
 
- LDO_VCC_REF_1V2
 
- LDO_VCC_REF_TUNE_MASK
 
- LDO_VCC_TUNE_MASK
 
- LDO_VIBR_PD
 
- LDO_VIO_1V7
 
- LDO_VIO_1V8
 
- LDO_VIO_3V3
 
- LDO_VIO_CFG
 
- LDO_VIO_REF_1V2
 
- LDO_VIO_REF_TUNE_MASK
 
- LDO_VIO_SR_DF
 
- LDO_VIO_SR_MASK
 
- LDO_VIO_TUNE_MASK
 
- LDO_VOLT1
 
- LDO_VOLT2
 
- LDO_VOLT3
 
- LDO_VOLTAGE
 
- LDO_VOLTAGE_MASK
 
- LDO_VOL_CONTR_MASK
 
- LDO_VOL_CONTR_SHIFT
 
- LDO_VOL_MAX_IDX
 
- LDO_VOL_MIN_IDX
 
- LDO_VSEL_MASK
 
- LDPALCR
 
- LDPALCR_PALEN
 
- LDPALCR_PALS
 
- LDPC_HT_CAP_TX
 
- LDPC_HT_ENABLE_RX
 
- LDPC_HT_ENABLE_TX
 
- LDPC_HT_TEST_TX_ENABLE
 
- LDPC_VHT_CAP_TX
 
- LDPC_VHT_ENABLE_RX
 
- LDPC_VHT_ENABLE_TX
 
- LDPC_VHT_TEST_TX_ENABLE
 
- LDPMMR
 
- LDPMR
 
- LDPMR_LPS
 
- LDPR
 
- LDPSPR
 
- LDPTE
 
- LDPTEu
 
- LDPTR
 
- LDPTRI
 
- LDR1W_SHIFT
 
- LDRCNTR
 
- LDRCNTR_MRC
 
- LDRCNTR_MRS
 
- LDRCNTR_SRC
 
- LDRCNTR_SRS
 
- LDREG
 
- LDREGM
 
- LDREGX
 
- LDREST
 
- LDRQ_MARK
 
- LDRV
 
- LDR_LINK_TRANSFER_ACTIVE_LOW
 
- LDR_RECEIVED_HOST_OFFLINE_REQ
 
- LDR_RECEIVED_LINKDOWN_IDLE_MSG
 
- LDR_REG
 
- LDS
 
- LDSA1R
 
- LDSA2R
 
- LDSARL
 
- LDSARU
 
- LDSA_IMM_OP
 
- LDSA_OP
 
- LDSC
 
- LDSEM_ACTIVE_BIAS
 
- LDSEM_ACTIVE_MASK
 
- LDSEM_READ_BIAS
 
- LDSEM_UNLOCKED
 
- LDSEM_WAIT_BIAS
 
- LDSEM_WRITE_BIAS
 
- LDSM1R
 
- LDSM1R_OS
 
- LDSM2R
 
- LDSM2R_OSTRG
 
- LDSMR
 
- LDSMR_ROT
 
- LDSR
 
- LDSR_AS
 
- LDSR_MRS
 
- LDSR_MSS
 
- LDST
 
- LDSTHD_I_BIT
 
- LDSTH_I_BIT
 
- LDST_CLASS_1_CCB
 
- LDST_CLASS_2_CCB
 
- LDST_CLASS_DECO
 
- LDST_CLASS_IND_CCB
 
- LDST_CLASS_MASK
 
- LDST_CLASS_SHIFT
 
- LDST_IMM
 
- LDST_IMM_MASK
 
- LDST_IMM_SHIFT
 
- LDST_I_BIT
 
- LDST_LEN_MASK
 
- LDST_LEN_SHIFT
 
- LDST_L_BIT
 
- LDST_OFFSET_MASK
 
- LDST_OFFSET_SHIFT
 
- LDST_P_BIT
 
- LDST_P_EQ_U
 
- LDST_SGF
 
- LDST_SRCDST_BYTE_CONTEXT
 
- LDST_SRCDST_BYTE_INFIFO
 
- LDST_SRCDST_BYTE_KEY
 
- LDST_SRCDST_BYTE_OUTFIFO
 
- LDST_SRCDST_MASK
 
- LDST_SRCDST_SHIFT
 
- LDST_SRCDST_WORD_ALTDS_CLASS1
 
- LDST_SRCDST_WORD_CHACTRL
 
- LDST_SRCDST_WORD_CLASS1_IV_SZ
 
- LDST_SRCDST_WORD_CLASS_CTX
 
- LDST_SRCDST_WORD_CLRW
 
- LDST_SRCDST_WORD_DATASZ_REG
 
- LDST_SRCDST_WORD_DECOCTRL
 
- LDST_SRCDST_WORD_DECO_AAD_SZ
 
- LDST_SRCDST_WORD_DECO_MATH0
 
- LDST_SRCDST_WORD_DECO_MATH1
 
- LDST_SRCDST_WORD_DECO_MATH2
 
- LDST_SRCDST_WORD_DECO_MATH3
 
- LDST_SRCDST_WORD_DECO_PCLOVRD
 
- LDST_SRCDST_WORD_DESCBUF
 
- LDST_SRCDST_WORD_DESCBUF_JOB
 
- LDST_SRCDST_WORD_DESCBUF_JOB_WE
 
- LDST_SRCDST_WORD_DESCBUF_SHARED
 
- LDST_SRCDST_WORD_DESCBUF_SHARED_WE
 
- LDST_SRCDST_WORD_ICVSZ_REG
 
- LDST_SRCDST_WORD_INFO_FIFO
 
- LDST_SRCDST_WORD_INFO_FIFO_SM
 
- LDST_SRCDST_WORD_IRQCTRL
 
- LDST_SRCDST_WORD_KEYSZ_REG
 
- LDST_SRCDST_WORD_MODE_REG
 
- LDST_SRCDST_WORD_PKHA_A_SZ
 
- LDST_SRCDST_WORD_PKHA_B_SZ
 
- LDST_SRCDST_WORD_PKHA_E_SZ
 
- LDST_SRCDST_WORD_PKHA_N_SZ
 
- LDST_SRCDST_WORD_STAT
 
- LDST_U_BIT
 
- LDST_VLF
 
- LDST_W_BIT
 
- LDSV0
 
- LDSV1
 
- LDSV2
 
- LDS_CONFIG__ADDR_OUT_OF_RANGE_REPORTING_MASK
 
- LDS_CONFIG__ADDR_OUT_OF_RANGE_REPORTING__SHIFT
 
- LDS_CONFIG__DISABLE_RAM_CLOCK_GATING_MASK
 
- LDS_CONFIG__DISABLE_RAM_CLOCK_GATING__SHIFT
 
- LDS_IMM_OP
 
- LDS_OP
 
- LDT
 
- LDT2
 
- LDT3
 
- LDT_BASE_ADDR
 
- LDT_BRIDGE_DEVICE
 
- LDT_BUS_ENABLED
 
- LDT_DIRECT_ENTRIES
 
- LDT_END_ADDR
 
- LDT_ENTRIES
 
- LDT_ENTRIES_PER_PAGE
 
- LDT_ENTRY_SIZE
 
- LDT_NR
 
- LDT_OFFSET
 
- LDT_PAGES_MAX
 
- LDT_PGD_ENTRY
 
- LDT_SLOT_STRIDE
 
- LDT_empty
 
- LDT_entry_a
 
- LDT_entry_b
 
- LDT_zero
 
- LDUAL
 
- LDUAQ
 
- LDV12_EN
 
- LDV12_SDBY
 
- LDVDLNR
 
- LDVLNR
 
- LDVPDR
 
- LDVSYNR
 
- LDVTLNR
 
- LDWBAR
 
- LDWBCNTR
 
- LDWBFR
 
- LDW_FPU_REGS
 
- LDX_BE
 
- LD_ACTIVATE
 
- LD_CHIP_ID
 
- LD_CTL
 
- LD_DISACTIVATE
 
- LD_FAIL_ECC_ERR
 
- LD_FAN
 
- LD_FID
 
- LD_HDR
 
- LD_IM0
 
- LD_IM0_MASK
 
- LD_IM1
 
- LD_IM1_MASK
 
- LD_IMM_OP
 
- LD_IN
 
- LD_INSN
 
- LD_L3
 
- LD_LEN
 
- LD_LOAD_BALANCE_INFO
 
- LD_OP
 
- LD_PD_DEBUG
 
- LD_R1
 
- LD_RQPN
 
- LD_SAP
 
- LD_SEQ
 
- LD_SPAN_INFO
 
- LD_SPAN_SET
 
- LD_START
 
- LD_STREAM_DETECT
 
- LD_SUM
 
- LD_TEMP
 
- LD_TIME_ACT_ON
 
- LD_TIME_LINK_OFF
 
- LD_TIME_LINK_ON
 
- LD_T_OFF
 
- LD_T_ON
 
- LD_T_STEP
 
- LD_VSR_CROSS16B
 
- LE
 
- LE16
 
- LE16_0
 
- LE2_5m
 
- LE2_DEFAULT
 
- LE2_QME
 
- LE32
 
- LE32_0
 
- LEAD
 
- LEADING_IDX
 
- LEADTEK_9531_PRODUCT_ID
 
- LEADTEK_VENDOR_ID
 
- LEAD_BRES_LNTH
 
- LEAF
 
- LEAFB_SUBTYPE
 
- LEAFIND
 
- LEAF_CCC
 
- LEAF_FROM_L_TO_R
 
- LEAF_FROM_R_TO_L
 
- LEAF_FROM_S_TO_L
 
- LEAF_FROM_S_TO_R
 
- LEAF_FROM_S_TO_SNEW
 
- LEAF_GEN
 
- LEAF_KOBJECT_PTR
 
- LEAF_NODE
 
- LEAF_SIZE
 
- LEAF_STR
 
- LEAKAGE_TEMPERATURE_SCALAR
 
- LEAKAGE_VOLTAGE_LUT_ENTRY_V2
 
- LEAKAGE_VOLTAGE_SCALAR
 
- LEAK_EXCHG_THRESH_HOLD_PERCENT
 
- LEAPS_THRU_END_OF
 
- LEAP_AUTH
 
- LEAP_ROGUE_MODE
 
- LEARNED_MAC_TABLE_ENTRIES
 
- LEARN_FAIL_INT
 
- LEAST_VID
 
- LEAVE
 
- LEAVE_ATOMIC_MODE_SET
 
- LEAVE_INTR
 
- LEAVE_IRQ_STACK
 
- LEB_FREED
 
- LEB_FREED_IDX
 
- LEB_RETAINED
 
- LECNT
 
- LEC_ACK_ERROR
 
- LEC_ARP_REFRESH_INTERVAL
 
- LEC_ARP_TABLE_SIZE
 
- LEC_BIT0_ERROR
 
- LEC_BIT1_ERROR
 
- LEC_CRC_ERROR
 
- LEC_DATA_DIRECT_8023
 
- LEC_DATA_DIRECT_8025
 
- LEC_FORM_ERROR
 
- LEC_HEADER_LEN
 
- LEC_MASK
 
- LEC_MINIMUM_8023_SIZE
 
- LEC_MINIMUM_8025_SIZE
 
- LEC_NO_ERROR
 
- LEC_PERMANENT_FLAG
 
- LEC_REMOTE_FLAG
 
- LEC_STUFF_ERROR
 
- LEC_UNRES_QUE_LEN
 
- LEC_UNUSED
 
- LEC_VCC_PRIV
 
- LED
 
- LED0
 
- LED0Cfg
 
- LED0DIS
 
- LED0PL
 
- LED0_ACTIVE
 
- LED0_FD
 
- LED0_LINK_10
 
- LED0_LINK_100
 
- LED0_LINK_1000
 
- LED0_USB3_MASK
 
- LED1
 
- LED1Cfg
 
- LED1PL
 
- LED1_ACTIVE
 
- LED1_ALED1
 
- LED1_BLINK_EN
 
- LED1_FD
 
- LED1_LINK_10
 
- LED1_LINK_100
 
- LED1_LINK_1000
 
- LED1_USB3_MASK
 
- LED2
 
- LED2_ACTIVE
 
- LED2_ALED2
 
- LED2_BLINK_EN
 
- LED2_FD
 
- LED2_LINK_10
 
- LED2_LINK_100
 
- LED2_LINK_1000
 
- LED2_ON
 
- LED2_USB3_MASK
 
- LED3
 
- LED4
 
- LED5
 
- LED6
 
- LED7
 
- LEDCFG
 
- LEDCFG0_DPDT_SELECT
 
- LEDCFG2_DPDT_SELECT
 
- LEDCSR
 
- LEDCSR_ACTIVITY
 
- LEDCSR_ACTIVITY_POLARITY
 
- LEDCSR_LED_DEFAULT
 
- LEDCSR_LINK
 
- LEDCSR_LINK_POLARITY
 
- LEDCSR_OFF_PERIOD
 
- LEDCSR_ON_PERIOD
 
- LEDCtrl
 
- LEDEN
 
- LEDEN_LEDAEXT
 
- LEDEN_LEDAON
 
- LEDEN_LEDAPWM
 
- LEDEN_LEDBEXT
 
- LEDEN_LEDBON
 
- LEDEN_LEDBPWM
 
- LEDEN_PWM_LENGTHA
 
- LEDEN_PWM_LENGTHB
 
- LEDFast
 
- LEDFlash
 
- LEDLink
 
- LEDMODE_CONNECTED
 
- LEDMODE_NOT_GPIN
 
- LEDMODE_NOT_LOCD
 
- LEDMODE_NOT_SOOL
 
- LEDMODE_OFF
 
- LEDMODE_ON
 
- LEDMODE_TXRX
 
- LEDMORE_GPIN
 
- LEDOUT
 
- LEDOUT_BLINK
 
- LEDOUT_DIM
 
- LEDOUT_MASK
 
- LEDOUT_OFF
 
- LEDOUT_ON
 
- LEDPOL
 
- LEDPulse
 
- LEDS
 
- LEDS0
 
- LEDS1
 
- LEDSTS_INTER
 
- LEDSTS_OFF
 
- LEDSTS_ON
 
- LEDSTS_SLOW
 
- LEDSTS_STS
 
- LEDSTS_TMLEN
 
- LEDS_BOOST_ADAPTIVE
 
- LEDS_BOOST_FIXED
 
- LEDS_BOOST_OFF
 
- LEDS_CMD
 
- LEDS_CS
 
- LEDS_GPIO_DEFSTATE_KEEP
 
- LEDS_GPIO_DEFSTATE_OFF
 
- LEDS_GPIO_DEFSTATE_ON
 
- LEDS_LP3952_H_
 
- LEDS_PHYS
 
- LEDS_TRIG_TYPE_EDGE
 
- LEDS_TRIG_TYPE_LEVEL
 
- LEDSlow
 
- LEDTIMER
 
- LEDTIMERS_100ms
 
- LEDTIMERS_10us
 
- LEDTIMERS_1ms
 
- LED_0
 
- LED_0_OFF
 
- LED_0_ON
 
- LED_1
 
- LED_100TX_SHIFT
 
- LED_1_OFF
 
- LED_1_ON
 
- LED_2
 
- LED_2_OFF
 
- LED_2_ON
 
- LED_3
 
- LED_4
 
- LED_5
 
- LED_6
 
- LED_7
 
- LED_8
 
- LED_871x
 
- LED_9
 
- LED_A
 
- LED_ACTION
 
- LED_ACTIVE
 
- LED_ACTSET
 
- LED_ACT_SOURCE_MAC
 
- LED_ALWAYS
 
- LED_AUDIO_MICMUTE
 
- LED_AUDIO_MUTE
 
- LED_AUTOSTOP
 
- LED_A_SETTINGS
 
- LED_B1_DATA
 
- LED_B1_OFF
 
- LED_B1_ON
 
- LED_B2_DATA
 
- LED_B2_OFF
 
- LED_B2_ON
 
- LED_BANK
 
- LED_BASE
 
- LED_BLINKA
 
- LED_BLINKA_EOF
 
- LED_BLINKA_INV
 
- LED_BLINKA_SOF
 
- LED_BLINKB
 
- LED_BLINKB_INV
 
- LED_BLINK_BRIGHTNESS_CHANGE
 
- LED_BLINK_DISABLE
 
- LED_BLINK_FASTER_INTERVAL_ALPHA
 
- LED_BLINK_INVERT
 
- LED_BLINK_LINK_INTERVAL_ALPHA
 
- LED_BLINK_LONG_INTERVAL
 
- LED_BLINK_MASK
 
- LED_BLINK_NORMAL
 
- LED_BLINK_NORMAL_INTERVAL
 
- LED_BLINK_NO_LINK_INTERVAL_ALPHA
 
- LED_BLINK_ONESHOT
 
- LED_BLINK_ONESHOT_STOP
 
- LED_BLINK_POWER_ON
 
- LED_BLINK_RATE_VAL_E1X_E2
 
- LED_BLINK_RATE_VAL_E3
 
- LED_BLINK_SCAN
 
- LED_BLINK_SCAN_INTERVAL_ALPHA
 
- LED_BLINK_SLOWLY
 
- LED_BLINK_SLOWLY_INTERVAL
 
- LED_BLINK_SPEED
 
- LED_BLINK_SW
 
- LED_BLINK_StartToBlink
 
- LED_BLINK_TXRX
 
- LED_BLINK_WPS
 
- LED_BLINK_WPS_STOP
 
- LED_BLINK_WPS_STOP_OVERLAP
 
- LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA
 
- LED_BLK_OFF
 
- LED_BLK_ON
 
- LED_BRIGHT_HW_CHANGED
 
- LED_B_SETTINGS
 
- LED_C
 
- LED_CAP
 
- LED_CAPSL
 
- LED_CFG
 
- LED_CFG_G_LED_MODE
 
- LED_CFG_LED_POLAR
 
- LED_CFG_OFF_PERIOD
 
- LED_CFG_ON_PERIOD
 
- LED_CFG_R_LED_MODE
 
- LED_CFG_SLOW_BLINK_PERIOD
 
- LED_CFG_Y_LED_MODE
 
- LED_CHARGING
 
- LED_CMD_REG_NONE
 
- LED_CNT
 
- LED_COLOR_ID_AMBER
 
- LED_COLOR_ID_BLUE
 
- LED_COLOR_ID_GREEN
 
- LED_COLOR_ID_IR
 
- LED_COLOR_ID_MAX
 
- LED_COLOR_ID_RED
 
- LED_COLOR_ID_VIOLET
 
- LED_COLOR_ID_WHITE
 
- LED_COLOR_ID_YELLOW
 
- LED_COMMAND
 
- LED_COMPOSE
 
- LED_CONTROL
 
- LED_CORE_SUSPENDRESUME
 
- LED_CTL
 
- LED_CTL_LINK
 
- LED_CTL_MODE
 
- LED_CTL_NO_LINK
 
- LED_CTL_POWER_OFF
 
- LED_CTL_POWER_ON
 
- LED_CTL_RX
 
- LED_CTL_SITE_SURVEY
 
- LED_CTL_START_TO_LINK
 
- LED_CTL_START_WPS
 
- LED_CTL_START_WPS_BOTTON
 
- LED_CTL_STOP_WPS
 
- LED_CTL_STOP_WPS_FAIL
 
- LED_CTL_STOP_WPS_FAIL_OVERLAP
 
- LED_CTL_TX
 
- LED_CTRL_1000MBPS_ON
 
- LED_CTRL_1000MBPS_STATUS
 
- LED_CTRL_100MBPS_ON
 
- LED_CTRL_100MBPS_STATUS
 
- LED_CTRL_10MBPS_ON
 
- LED_CTRL_10MBPS_STATUS
 
- LED_CTRL_BLINK_PER_OVERRIDE
 
- LED_CTRL_BLINK_RATE_MASK
 
- LED_CTRL_BLINK_RATE_OVERRIDE
 
- LED_CTRL_BLINK_RATE_SHIFT
 
- LED_CTRL_LNKLED_OVERRIDE
 
- LED_CTRL_MODE_COMBO
 
- LED_CTRL_MODE_MAC
 
- LED_CTRL_MODE_PHY_1
 
- LED_CTRL_MODE_PHY_2
 
- LED_CTRL_MODE_SHARED
 
- LED_CTRL_MODE_SHASTA_MAC
 
- LED_CTRL_REG
 
- LED_CTRL_TRAFFIC_BLINK
 
- LED_CTRL_TRAFFIC_LED
 
- LED_CTRL_TRAFFIC_OVERRIDE
 
- LED_CTRL_TRAFFIC_STATUS
 
- LED_CURRENT_MASK
 
- LED_CYCLE_MASK
 
- LED_CYCLE_PERIOD
 
- LED_CYCLE_SHFT
 
- LED_DATA
 
- LED_DATA_REG
 
- LED_DEFAULT
 
- LED_DEVICE
 
- LED_DEV_CAP_FLASH
 
- LED_DISABLE
 
- LED_DISK_IO
 
- LED_DOT
 
- LED_DUPLEX_10_100
 
- LED_E
 
- LED_EN
 
- LED_ENABLE
 
- LED_F
 
- LED_FAULT
 
- LED_FAULT_INDICATOR
 
- LED_FAULT_INPUT_VOLTAGE
 
- LED_FAULT_LED_OVER_TEMPERATURE
 
- LED_FAULT_OVER_CURRENT
 
- LED_FAULT_OVER_TEMPERATURE
 
- LED_FAULT_OVER_VOLTAGE
 
- LED_FAULT_SHORT_CIRCUIT
 
- LED_FAULT_TIMEOUT
 
- LED_FAULT_UNDER_VOLTAGE
 
- LED_FLASH_3_5
 
- LED_FLASH_7_0
 
- LED_FLASH_SYSFS_GROUPS_SIZE
 
- LED_FLIP
 
- LED_FORMATTER
 
- LED_FREQ
 
- LED_FRONT_LEFT
 
- LED_FRONT_RIGHT
 
- LED_FULL
 
- LED_FUNCTION_ACTIVITY
 
- LED_FUNCTION_ALARM
 
- LED_FUNCTION_BACKLIGHT
 
- LED_FUNCTION_BLUETOOTH
 
- LED_FUNCTION_BOOT
 
- LED_FUNCTION_CAPSLOCK
 
- LED_FUNCTION_CHARGING
 
- LED_FUNCTION_CPU
 
- LED_FUNCTION_DEBUG
 
- LED_FUNCTION_DISK
 
- LED_FUNCTION_DISK_ACTIVITY
 
- LED_FUNCTION_DISK_ERR
 
- LED_FUNCTION_DISK_READ
 
- LED_FUNCTION_DISK_WRITE
 
- LED_FUNCTION_FAULT
 
- LED_FUNCTION_FLASH
 
- LED_FUNCTION_HEARTBEAT
 
- LED_FUNCTION_INDICATOR
 
- LED_FUNCTION_KBD_BACKLIGHT
 
- LED_FUNCTION_LAN
 
- LED_FUNCTION_MAIL
 
- LED_FUNCTION_MICMUTE
 
- LED_FUNCTION_MTD
 
- LED_FUNCTION_MUTE
 
- LED_FUNCTION_NUMLOCK
 
- LED_FUNCTION_PANIC
 
- LED_FUNCTION_POWER
 
- LED_FUNCTION_PROGRAMMING
 
- LED_FUNCTION_RX
 
- LED_FUNCTION_SCROLLLOCK
 
- LED_FUNCTION_SD
 
- LED_FUNCTION_STANDBY
 
- LED_FUNCTION_STATUS
 
- LED_FUNCTION_TORCH
 
- LED_FUNCTION_TX
 
- LED_FUNCTION_USB
 
- LED_FUNCTION_WAN
 
- LED_FUNCTION_WLAN
 
- LED_FUNCTION_WPS
 
- LED_GA_OFF
 
- LED_GA_ON
 
- LED_GB_OFF
 
- LED_GB_ON
 
- LED_GPIO
 
- LED_GPIO0
 
- LED_GPIO1
 
- LED_GPIO2
 
- LED_GPIO_CFG
 
- LED_GPIO_CFG_FDX_LED
 
- LED_GPIO_CFG_GPBUF
 
- LED_GPIO_CFG_GPBUF_0
 
- LED_GPIO_CFG_GPBUF_1
 
- LED_GPIO_CFG_GPBUF_2
 
- LED_GPIO_CFG_GPBUF_3
 
- LED_GPIO_CFG_GPDATA
 
- LED_GPIO_CFG_GPDATA_0
 
- LED_GPIO_CFG_GPDATA_1
 
- LED_GPIO_CFG_GPDATA_2
 
- LED_GPIO_CFG_GPDATA_3
 
- LED_GPIO_CFG_GPDIR
 
- LED_GPIO_CFG_GPDIR_0
 
- LED_GPIO_CFG_GPDIR_1
 
- LED_GPIO_CFG_GPDIR_2
 
- LED_GPIO_CFG_GPDIR_3
 
- LED_GPIO_CFG_LED10_FUN_SEL
 
- LED_GPIO_CFG_LED2_FUN_SEL
 
- LED_GPIO_CFG_LEDGPIO_EN
 
- LED_GPIO_CFG_LEDGPIO_EN_0
 
- LED_GPIO_CFG_LEDGPIO_EN_1
 
- LED_GPIO_CFG_LEDGPIO_EN_2
 
- LED_GPIO_CFG_LEDGPIO_EN_3
 
- LED_GPIO_CFG_LNK_LED
 
- LED_GPIO_CFG_SPD_LED
 
- LED_GPIO_PIN
 
- LED_GREEN
 
- LED_H
 
- LED_HALF
 
- LED_HASLCD
 
- LED_HEARTBEAT
 
- LED_HW_PLUGGABLE
 
- LED_ID
 
- LED_IDENTIFICATION_OFF
 
- LED_IDENTIFICATION_ON
 
- LED_IDENTIFY
 
- LED_INDICATOR_PWM_DIS
 
- LED_INDICATOR_PWM_DUTY_252_256
 
- LED_INDICATOR_PWM_ENA
 
- LED_IND_CUR_5MA
 
- LED_INITIALIZED
 
- LED_INIT_DEFAULT_TRIGGER
 
- LED_INT
 
- LED_INVERTED
 
- LED_IRQ
 
- LED_IRQ_FLED1_OPEN
 
- LED_IRQ_FLED1_SHORT
 
- LED_IRQ_FLED2_OPEN
 
- LED_IRQ_FLED2_SHORT
 
- LED_IRQ_MAX_FLASH
 
- LED_KANA
 
- LED_LAN_RCV
 
- LED_LAN_TX
 
- LED_LINK_SHIFT
 
- LED_LT3593_NAME
 
- LED_MAIL
 
- LED_MAX
 
- LED_MAX_LENGTH
 
- LED_MAX_NAME_SIZE
 
- LED_MISC
 
- LED_MODE
 
- LED_MODE_ALPHA
 
- LED_MODE_ASUS
 
- LED_MODE_DEFAULT
 
- LED_MODE_FRONT_PANEL_OFF
 
- LED_MODE_MASK
 
- LED_MODE_OFF
 
- LED_MODE_ON
 
- LED_MODE_OPER
 
- LED_MODE_SEL
 
- LED_MODE_SEL_MASK
 
- LED_MODE_SEL_POS
 
- LED_MODE_SIGNAL_STRENGTH
 
- LED_MODE_TST
 
- LED_MODE_TXRX_ACTIVITY
 
- LED_MUTE
 
- LED_MY_OFF
 
- LED_MY_ON
 
- LED_NOCONNECT
 
- LED_NOLCD
 
- LED_NORMAL
 
- LED_NO_LINK_BLINK
 
- LED_NUM
 
- LED_NUML
 
- LED_NUM_FLASH_FAULTS
 
- LED_N_OFF_H
 
- LED_N_OFF_L
 
- LED_N_ON_H
 
- LED_N_ON_L
 
- LED_OFF
 
- LED_OFF_MS
 
- LED_ON
 
- LED_ON_CONTINUOUS
 
- LED_ON_MS
 
- LED_OVER_BOTH_OFF
 
- LED_OVER_FREQ_MASK
 
- LED_OVER_FREQ_SHIFT
 
- LED_PANIC_INDICATOR
 
- LED_PAR_CTRL_ACT
 
- LED_PAR_CTRL_ACT_BL
 
- LED_PAR_CTRL_COLX
 
- LED_PAR_CTRL_COL_BL
 
- LED_PAR_CTRL_DP_COL
 
- LED_PAR_CTRL_DUPLEX
 
- LED_PAR_CTRL_ERROR
 
- LED_PAR_CTRL_INACT
 
- LED_PAR_CTRL_LINK
 
- LED_PAR_CTRL_LNK_AC
 
- LED_PAR_CTRL_LNK_RX
 
- LED_PAR_CTRL_RX
 
- LED_PAR_CTRL_RX_BL
 
- LED_PAR_CTRL_SPEED
 
- LED_PAR_CTRL_TX
 
- LED_PAR_CTRL_TX_BL
 
- LED_PIN_871x
 
- LED_PIN_GPIO0
 
- LED_PIN_HW
 
- LED_PIN_LED0
 
- LED_PIN_LED1
 
- LED_PIN_LED2
 
- LED_POLARITY_HIGH_ACTIVE
 
- LED_POLARITY_LOW_ACTIVE
 
- LED_POWER
 
- LED_POWER_OFF
 
- LED_POWER_ON
 
- LED_POWER_ON_BLINK
 
- LED_PWM_MASK
 
- LED_REG
 
- LED_REGISTERED
 
- LED_REG_OFF
 
- LED_REG_ON
 
- LED_REMOVE
 
- LED_REPORT
 
- LED_REPORT_SIZE
 
- LED_RETAIN_AT_SHUTDOWN
 
- LED_REVERSE
 
- LED_RFOFF
 
- LED_S0_OFF
 
- LED_S0_ON
 
- LED_SCAN_BLINK
 
- LED_SCHEME1
 
- LED_SCHEME2
 
- LED_SCR
 
- LED_SCROLLL
 
- LED_SHIFT
 
- LED_SHINE_DISABLE
 
- LED_SHINE_EN
 
- LED_SHINE_MASK
 
- LED_SHOW_FLAGS
 
- LED_SHOW_IOCTL
 
- LED_SLEEP
 
- LED_SOAK
 
- LED_SPACE
 
- LED_SPEED_DUPLEX_ACT
 
- LED_SPEED_DUPLEX_LINK_ACT
 
- LED_START
 
- LED_STATE
 
- LED_STATE_871x
 
- LED_STATE_OFF
 
- LED_STATE_ON
 
- LED_STAT_OFF
 
- LED_STAT_ON
 
- LED_STOP
 
- LED_STRATEGY_8190
 
- LED_STRATEGY_871x
 
- LED_STROBE
 
- LED_SUSPEND
 
- LED_SUSPENDED
 
- LED_SW
 
- LED_SWITCH_REG
 
- LED_SYNC_OFF
 
- LED_SYNC_ON
 
- LED_SYSFS_DISABLE
 
- LED_TBS
 
- LED_TIME
 
- LED_TOGGLE_INTERVAL
 
- LED_TXRX_BLINK
 
- LED_TXRX_SHIFT
 
- LED_TYPE_ACTIVITY
 
- LED_TYPE_ASSOC
 
- LED_TYPE_QUALITY
 
- LED_TYPE_RADIO
 
- LED_T_OFF
 
- LED_T_ON
 
- LED_T_STEP
 
- LED_UNKNOWN
 
- LED_UNREGISTERING
 
- LED_UPDATE_INTERVAL
 
- LED_VALID
 
- LED_VAL_1000BT
 
- LED_VAL_1000BT_100BTX
 
- LED_VAL_100BTX
 
- LED_VAL_10BT
 
- LED_VAL_BLINK
 
- LED_VAL_COLLISION
 
- LED_VAL_DUPLEXFULL
 
- LED_VAL_DUPLEXFULL_COLLISION
 
- LED_VAL_LINKON
 
- LED_VAL_LINKON_ACTIVE
 
- LED_VAL_LINKON_RECV
 
- LED_VAL_OFF
 
- LED_VAL_ON
 
- LED_VAL_RX
 
- LED_VAL_TX
 
- LED_VAL_TXRX
 
- LED_VERSION
 
- LED_WEB
 
- LED_YELLOW
 
- LED_Y_OFF
 
- LED_Y_ON
 
- LED_b
 
- LED_d
 
- LEFT
 
- LEFTA_LEFTB
 
- LEFTA_MUTEB
 
- LEFTA_RIGHTB
 
- LEFTA_SUMLRDIV2B
 
- LEFTMOSTONE
 
- LEFTNODE
 
- LEFTOVERS_MC
 
- LEFTOVERS_NUM_LEVELS
 
- LEFTOVERS_NUM_PRIOS
 
- LEFTOVERS_RULE_NUM
 
- LEFTOVERS_UC
 
- LEFT_ALIGNED
 
- LEFT_ALIGN_MASK
 
- LEFT_ALIGN_MASK_SFT
 
- LEFT_ALIGN_SFT
 
- LEFT_ANTENNA
 
- LEFT_BRANCH_VDSC_ENABLE
 
- LEFT_CLIP
 
- LEFT_DL_BUF_TARGET_DEPTH
 
- LEFT_DL_BUF_TARGET_DEPTH_MASK
 
- LEFT_EDGE
 
- LEFT_END_POINT_DETECTION_LEVEL
 
- LEFT_EYE
 
- LEFT_EYE_3D_PRIMARY_SURFACE
 
- LEFT_J
 
- LEFT_J_DATA_FORMAT
 
- LEFT_MIXER
 
- LEFT_OUTPUT_MIXER_ROUTES
 
- LEFT_PARENTS
 
- LEFT_RIGHT_END_POINT_DEAVTIVALION_LEVEL
 
- LEFT_SHIFT_FLOW
 
- LEFT_SHIFT_NO_FLOW
 
- LEFT_SPK_TDM_TX_MASK
 
- LEFT_TO_RIGHT
 
- LEGACY
 
- LEGACYGETDEVICEPARAMETERS
 
- LEGACY_BASIC_RATE
 
- LEGACY_BOOTING
 
- LEGACY_BR_CODE_END_OF_BRA
 
- LEGACY_BUFFERS
 
- LEGACY_CHILD_DEVICE_CONFIG_SIZE
 
- LEGACY_CONTROL_GUID
 
- LEGACY_CONTROL_STATES
 
- LEGACY_DMAR0
 
- LEGACY_DMAR11
 
- LEGACY_DMAR15
 
- LEGACY_DMAR4
 
- LEGACY_DMAR6
 
- LEGACY_ENABLE_ALL
 
- LEGACY_ENABLE_FM
 
- LEGACY_ENABLE_GAMEPORT
 
- LEGACY_ENABLE_MPU
 
- LEGACY_ENABLE_MPU_INT
 
- LEGACY_ENABLE_SB
 
- LEGACY_FC_PORTS
 
- LEGACY_FDB_PRIO
 
- LEGACY_FS_INDIVIDUAL_PARAMS
 
- LEGACY_FS_MONOLITHIC_PARAMS
 
- LEGACY_FS_UNSET_PARAMS
 
- LEGACY_GPIO_BASE
 
- LEGACY_GROUP
 
- LEGACY_ID_NAND
 
- LEGACY_INTA
 
- LEGACY_INTB
 
- LEGACY_INTC
 
- LEGACY_INTD
 
- LEGACY_IO_RESOURCE
 
- LEGACY_LUT_LENGTH
 
- LEGACY_MAP_MASK
 
- LEGACY_MBR_PARTITION_GUID
 
- LEGACY_MODE
 
- LEGACY_NR_PORTS
 
- LEGACY_NUM_BANKS
 
- LEGACY_PCM_MODE
 
- LEGACY_PHYCFG_TABLE_SIZE
 
- LEGACY_PIPE_INTERLEAVE
 
- LEGACY_PIPE_INTERLEAVE_256B
 
- LEGACY_PIPE_INTERLEAVE_512B
 
- LEGACY_PMC_BASE
 
- LEGACY_POWER_CONTROL_GUID
 
- LEGACY_RECDIR_ENV_PREFIX
 
- LEGACY_REQUEST_SIZE
 
- LEGACY_RUNNING
 
- LEGACY_SCPI_CMD_CANCEL_AP_TIME
 
- LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT
 
- LEGACY_SCPI_CMD_CLOCK_CAPABILITIES
 
- LEGACY_SCPI_CMD_COUNT
 
- LEGACY_SCPI_CMD_DVFS_CAPABILITIES
 
- LEGACY_SCPI_CMD_EVENT
 
- LEGACY_SCPI_CMD_GET_CLOCK_VALUE
 
- LEGACY_SCPI_CMD_GET_CSS_PWR_STATE
 
- LEGACY_SCPI_CMD_GET_DVFS
 
- LEGACY_SCPI_CMD_GET_DVFS_INFO
 
- LEGACY_SCPI_CMD_GET_DVFS_STAT
 
- LEGACY_SCPI_CMD_GET_PSU
 
- LEGACY_SCPI_CMD_GET_PWR_STATE_STAT
 
- LEGACY_SCPI_CMD_GET_RTC
 
- LEGACY_SCPI_CMD_INVALID
 
- LEGACY_SCPI_CMD_L2_READY
 
- LEGACY_SCPI_CMD_PSU_CAPABILITIES
 
- LEGACY_SCPI_CMD_SCPI_CAPABILITIES
 
- LEGACY_SCPI_CMD_SCPI_READY
 
- LEGACY_SCPI_CMD_SENSOR_ASYNC_VALUE
 
- LEGACY_SCPI_CMD_SENSOR_CAPABILITIES
 
- LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS
 
- LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC
 
- LEGACY_SCPI_CMD_SENSOR_INFO
 
- LEGACY_SCPI_CMD_SENSOR_VALUE
 
- LEGACY_SCPI_CMD_SET_AP_TIMER
 
- LEGACY_SCPI_CMD_SET_CLOCK_INDEX
 
- LEGACY_SCPI_CMD_SET_CLOCK_VALUE
 
- LEGACY_SCPI_CMD_SET_CSS_PWR_STATE
 
- LEGACY_SCPI_CMD_SET_DVFS
 
- LEGACY_SCPI_CMD_SET_PSU
 
- LEGACY_SCPI_CMD_SET_RTC
 
- LEGACY_SCPI_CMD_SYS_PWR_STATE
 
- LEGACY_SUSPEND
 
- LEGACY_TARGET_RATE_11L
 
- LEGACY_TARGET_RATE_11S
 
- LEGACY_TARGET_RATE_1L_5L
 
- LEGACY_TARGET_RATE_36
 
- LEGACY_TARGET_RATE_48
 
- LEGACY_TARGET_RATE_54
 
- LEGACY_TARGET_RATE_5S
 
- LEGACY_TARGET_RATE_6_24
 
- LEGACY_TOPDIR_ENV_PREFIX
 
- LEGACY_VEPA_PRIO
 
- LEGACY_WIRELESS_MODE
 
- LEGCYPS_DAC_AMP1000_MASK
 
- LEGCYPS_DAC_AMP1000_SHIFT
 
- LEGCYPS_DAC_AMP100_MASK
 
- LEGCYPS_DAC_AMP100_SHIFT
 
- LEGCYPS_DAC_AMP10_MASK
 
- LEGCYPS_DAC_AMP10_SHIFT
 
- LEGCYPS_ECNC_PS_EN
 
- LEGCYPS_EN
 
- LEGCYPS_UNPLUG_DECT_EN
 
- LEGCYPS_UNPLUG_TIMER_MASK
 
- LEGCYPS_UNPLUG_TIMER_SHIFT
 
- LEGO_USB_TOWER_MINOR_BASE
 
- LEGO_USB_TOWER_PRODUCT_ID
 
- LEGO_USB_TOWER_REQUEST_GET_VERSION
 
- LEGO_USB_TOWER_REQUEST_RESET
 
- LEGO_USB_TOWER_VENDOR_ID
 
- LEG_EP
 
- LEG_EP_INTERRUPTS
 
- LEG_INTR_MASK_OFFSET
 
- LEG_INTR_PTR_OFFSET
 
- LEG_INTR_TRIG_OFFSET
 
- LEG_INT_PTR_B30
 
- LEG_INT_PTR_B31
 
- LEG_IRQ
 
- LEM_AVG
 
- LEN
 
- LENACCU
 
- LEND_IP_PHONE_MODE
 
- LEND_WIFI_PHONE_MODE
 
- LENEXT
 
- LENGTH
 
- LENGTH_BIAS
 
- LENGTH_CHK
 
- LENGTH_CODES
 
- LENGTH_OF_BUFFER
 
- LENLENS
 
- LENOVO_IDEAPAD_330S_15ARR
 
- LENOVO_VENDOR_ID
 
- LENS
 
- LENS_BC_REG
 
- LENS_B_COMP_REG
 
- LENS_CTRL_REG
 
- LENS_GC_REG
 
- LENS_G_COMP_REG
 
- LENS_RC_REG
 
- LENS_R_COMP_REG
 
- LENS_XCEN_REG
 
- LENS_YCEN_REG
 
- LEN_AT
 
- LEN_CPP_128
 
- LEN_CPP_32
 
- LEN_CPP_64
 
- LEN_CPP_CONT
 
- LEN_ERR
 
- LEN_ETM
 
- LEN_FAST_INTR_STAT
 
- LEN_HIGH_BITS
 
- LEN_HIGH_SYMBOLS
 
- LEN_LOW_BITS
 
- LEN_LOW_SYMBOLS
 
- LEN_MASK
 
- LEN_MASK_V1
 
- LEN_MASK_V2
 
- LEN_MAX
 
- LEN_MID_BITS
 
- LEN_MID_SYMBOLS
 
- LEN_OFFSET
 
- LEN_ON_PAGE
 
- LEN_ON_SIZE
 
- LEN_OR_ZERO
 
- LEN_PORT_SEL
 
- LEN_RAM_IO
 
- LEN_RX_BUFFER
 
- LEN_SMALL_RX_BUFFER
 
- LEN_SMALL_TX_BUFFER
 
- LEN_SYMBOLS
 
- LEN_TX_BUFFER
 
- LEN_UD2
 
- LEN_V
 
- LEON23_REG_TIMER_CONTROL_EN
 
- LEON23_REG_TIMER_CONTROL_IQ
 
- LEON23_REG_TIMER_CONTROL_LD
 
- LEON23_REG_TIMER_CONTROL_RL
 
- LEON2_CCR_DSETS_MASK
 
- LEON2_CFG_SSIZE_MASK
 
- LEON3_AHB_CONF_WORDS
 
- LEON3_AHB_MASTERS
 
- LEON3_AHB_SLAVES
 
- LEON3_AHB_SLAVE_CONF_AREA
 
- LEON3_APBUARTS
 
- LEON3_APB_CONF_WORDS
 
- LEON3_APB_SLAVES
 
- LEON3_BYPASS_LOAD_PA
 
- LEON3_BYPASS_STORE_PA
 
- LEON3_CONF_AREA
 
- LEON3_GPTIMER_CONFIG_NRTIMERS
 
- LEON3_GPTIMER_CTRL_ISPENDING
 
- LEON3_GPTIMER_CTRL_PENDING
 
- LEON3_GPTIMER_EN
 
- LEON3_GPTIMER_IRQEN
 
- LEON3_GPTIMER_LD
 
- LEON3_GPTIMER_RL
 
- LEON3_GPTIMER_SEPIRQ
 
- LEON3_GPTIMER_TIMERS
 
- LEON3_IO_AREA
 
- LEON3_IRQMPSTATUS_BROADCAST
 
- LEON3_IRQMPSTATUS_CPUNR
 
- LEON3_IRQ_CROSS_CALL
 
- LEON3_IRQ_IPI_DEFAULT
 
- LEON3_IRQ_TICKER
 
- LEON3_XCCR_SETS_MASK
 
- LEON3_XCCR_SSIZE_MASK
 
- LEON4_NEXTREME1
 
- LEON_AMBA_H_INCLUDE
 
- LEON_BYPASS_LOAD_PA
 
- LEON_BYPASS_STORE_PA
 
- LEON_CNR_CTRL
 
- LEON_CNR_CTRL_TLBDIS
 
- LEON_CNR_CTX
 
- LEON_CNR_CTXP
 
- LEON_CNR_CTX_NCTX
 
- LEON_CNR_F
 
- LEON_CNR_FADDR
 
- LEON_DIAGF_CTX
 
- LEON_DIAGF_CTX_SHIFT
 
- LEON_DIAGF_HIT
 
- LEON_DIAGF_HIT_SHIFT
 
- LEON_DIAGF_LVL
 
- LEON_DIAGF_VALID
 
- LEON_DIAGF_VALID_SHIFT
 
- LEON_DIAGF_WR
 
- LEON_DIAGF_WR_SHIFT
 
- LEON_DO_ACK_HW
 
- LEON_HARD_INT
 
- LEON_H_INCLUDE
 
- LEON_IACK
 
- LEON_IMASK
 
- LEON_IRQMASK_R
 
- LEON_IRQPRIO_R
 
- LEON_MCFG2_SDRAMBANKSZ
 
- LEON_MCFG2_SDRAMBANKSZ_SHIFT
 
- LEON_MCFG2_SDRAMEN
 
- LEON_MCFG2_SRAMBANKSZ
 
- LEON_MCFG2_SRAMBANKSZ_SHIFT
 
- LEON_MCFG2_SRAMDIS
 
- LEON_MMUTLB_ENT_MAX
 
- LEON_PAGE_SIZE_LEON
 
- LEON_PGD_M
 
- LEON_PGD_SH
 
- LEON_PI
 
- LEON_PMD_M
 
- LEON_PMD_SH
 
- LEON_PMD_SH_V
 
- LEON_PTE_M
 
- LEON_PTE_SH
 
- LEON_REG_PS2_CTRL_RE
 
- LEON_REG_PS2_CTRL_RI
 
- LEON_REG_PS2_CTRL_TE
 
- LEON_REG_PS2_CTRL_TI
 
- LEON_REG_PS2_STATUS_DR
 
- LEON_REG_PS2_STATUS_FE
 
- LEON_REG_PS2_STATUS_KI
 
- LEON_REG_PS2_STATUS_PE
 
- LEON_REG_PS2_STATUS_RF
 
- LEON_REG_PS2_STATUS_TF
 
- LEON_REG_UART_CTRL_FL
 
- LEON_REG_UART_CTRL_LB
 
- LEON_REG_UART_CTRL_PE
 
- LEON_REG_UART_CTRL_PS
 
- LEON_REG_UART_CTRL_RE
 
- LEON_REG_UART_CTRL_RI
 
- LEON_REG_UART_CTRL_TE
 
- LEON_REG_UART_CTRL_TI
 
- LEON_REG_UART_STATUS_BR
 
- LEON_REG_UART_STATUS_DR
 
- LEON_REG_UART_STATUS_ERR
 
- LEON_REG_UART_STATUS_FE
 
- LEON_REG_UART_STATUS_OE
 
- LEON_REG_UART_STATUS_PE
 
- LEON_REG_UART_STATUS_THE
 
- LEON_REG_UART_STATUS_TSE
 
- LEON_TCNT0_MASK
 
- LEO_CLUTALLOC
 
- LEO_CLUTFREE
 
- LEO_CLUTPOST
 
- LEO_CLUTREAD
 
- LEO_CUR_ENABLE
 
- LEO_CUR_PROGRESS
 
- LEO_CUR_TYPE_CMAP
 
- LEO_CUR_TYPE_IMAGE
 
- LEO_CUR_TYPE_MASK
 
- LEO_CUR_UPDATE
 
- LEO_CUR_UPDATECMAP
 
- LEO_FLAG_BLANKED
 
- LEO_GETGAMMA
 
- LEO_KRN_CSR_ENABLE
 
- LEO_KRN_CSR_PROGRESS
 
- LEO_KRN_CSR_UNK
 
- LEO_KRN_CSR_UNK2
 
- LEO_KRN_TYPE_CLUT0
 
- LEO_KRN_TYPE_CLUT1
 
- LEO_KRN_TYPE_CLUT2
 
- LEO_KRN_TYPE_CLUTDATA
 
- LEO_KRN_TYPE_UNK
 
- LEO_KRN_TYPE_VIDEO
 
- LEO_KRN_TYPE_WID
 
- LEO_LC_SS0_KRN_MAP
 
- LEO_LC_SS0_USR_MAP
 
- LEO_LC_SS1_KRN_MAP
 
- LEO_LC_SS1_USR_MAP
 
- LEO_LD_GBL_MAP
 
- LEO_LD_SS0_MAP
 
- LEO_LD_SS1_MAP
 
- LEO_LX_CURSOR_MAP
 
- LEO_LX_KRN_MAP
 
- LEO_OFF_LC_SS0_KRN
 
- LEO_OFF_LC_SS0_USR
 
- LEO_OFF_LC_SS1_KRN
 
- LEO_OFF_LC_SS1_USR
 
- LEO_OFF_LD_GBL
 
- LEO_OFF_LD_SS0
 
- LEO_OFF_LD_SS1
 
- LEO_OFF_LX_CURSOR
 
- LEO_OFF_LX_KRN
 
- LEO_OFF_SS0
 
- LEO_OFF_SS1
 
- LEO_OFF_UNK
 
- LEO_OFF_UNK2
 
- LEO_SETGAMMA
 
- LEO_SS0_MAP
 
- LEO_SS1_MAP
 
- LEO_SS1_MISC_ENABLE
 
- LEO_SS1_MISC_STEREO
 
- LEO_UNK2_MAP
 
- LEO_UNK_MAP
 
- LERROR
 
- LERR_LEN
 
- LERR_POS
 
- LEV
 
- LEVEL
 
- LEVEL0_DLL_BYPASS
 
- LEVEL0_DLL_RESET
 
- LEVEL0_MPLL_DIV_EN
 
- LEVEL0_MPLL_FB_DIV
 
- LEVEL0_MPLL_FB_DIV_MASK
 
- LEVEL0_MPLL_POST_DIV
 
- LEVEL0_MPLL_POST_DIV_MASK
 
- LEVEL0_MPLL_REF_DIV
 
- LEVEL0_MPLL_REF_DIV_MASK
 
- LEVEL1_ID1
 
- LEVEL1_ID2
 
- LEVEL1_IDENT_ENTRIES
 
- LEVEL2LUN
 
- LEVEL2_TAR
 
- LEVEL3LUN
 
- LEVELA_B_CNT
 
- LEVELB_VOL
 
- LEVELS_PER_SLICE
 
- LEVEL_ADJUST
 
- LEVEL_CONFIG
 
- LEVEL_CVT
 
- LEVEL_DMT
 
- LEVEL_EDGE_INTERRUPTS_PRESENT_BIT
 
- LEVEL_ENTRIES
 
- LEVEL_FAULTY
 
- LEVEL_GTF
 
- LEVEL_GTF2
 
- LEVEL_LINEAR
 
- LEVEL_MASK
 
- LEVEL_MAX_SIBLINGS
 
- LEVEL_MULTIPATH
 
- LEVEL_NONE
 
- LEVEL_OFFSET
 
- LEVEL_OFFSET_STEP
 
- LEVEL_REP
 
- LEVEL_SHIFT
 
- LEVEL_SHIFTERS_ON
 
- LEVEL_STEP
 
- LEVEL_STRIDE
 
- LEVEL_TRIGGER
 
- LEVEL_TRIG_OFF
 
- LE_0_PAGETABLE
 
- LE_1_UC
 
- LE_2_WT
 
- LE_3_DB_HASH_MASK_GEN_IPV4_T6_A
 
- LE_3_WB
 
- LE_4_DB_HASH_MASK_GEN_IPV4_T6_A
 
- LE_ACK
 
- LE_ADV
 
- LE_ADV_DIRECT_IND
 
- LE_ADV_IND
 
- LE_ADV_INVALID
 
- LE_ADV_NONCONN_IND
 
- LE_ADV_SCAN_IND
 
- LE_ADV_SCAN_RSP
 
- LE_AD_GENERAL
 
- LE_AD_LIMITED
 
- LE_AD_NO_BREDR
 
- LE_AD_SIM_LE_BREDR_CTRL
 
- LE_AD_SIM_LE_BREDR_HOST
 
- LE_AOM
 
- LE_BITS_CLEARED_TO_1BYTE
 
- LE_BITS_CLEARED_TO_1BYTE_8BIT
 
- LE_BITS_CLEARED_TO_2BYTE
 
- LE_BITS_CLEARED_TO_4BYTE
 
- LE_BITS_TO_1BYTE
 
- LE_BITS_TO_2BYTE
 
- LE_BITS_TO_4BYTE
 
- LE_C0_BABL
 
- LE_C0_CERR
 
- LE_C0_ERR
 
- LE_C0_IDON
 
- LE_C0_INEA
 
- LE_C0_INIT
 
- LE_C0_INTR
 
- LE_C0_MERR
 
- LE_C0_MISS
 
- LE_C0_RINT
 
- LE_C0_RXON
 
- LE_C0_STOP
 
- LE_C0_STRT
 
- LE_C0_TDMD
 
- LE_C0_TINT
 
- LE_C0_TXON
 
- LE_C3_ACON
 
- LE_C3_BCON
 
- LE_C3_BSWP
 
- LE_COMMON_REG_LIST
 
- LE_COMMON_REG_LIST_BASE
 
- LE_COS
 
- LE_CSR0
 
- LE_CSR1
 
- LE_CSR2
 
- LE_CSR3
 
- LE_DB_ACTIVE_TABLE_START_INDEX_A
 
- LE_DB_ACT_CNT_IPV4_A
 
- LE_DB_ACT_CNT_IPV6_A
 
- LE_DB_CLCAM_TID_BASE_A
 
- LE_DB_CLIP_TABLE_INDEX_A
 
- LE_DB_CONFIG_A
 
- LE_DB_DBGI_CONFIG_A
 
- LE_DB_DBGI_REQ_DATA_A
 
- LE_DB_DBGI_REQ_TCAM_CMD_A
 
- LE_DB_DBGI_RSP_DATA_A
 
- LE_DB_DBGI_RSP_STATUS_A
 
- LE_DB_FILTER_TABLE_INDEX_A
 
- LE_DB_HASH_CONFIG_A
 
- LE_DB_HASH_TBL_BASE_ADDR_A
 
- LE_DB_HASH_TID_BASE_A
 
- LE_DB_INT_CAUSE_A
 
- LE_DB_ROUTING_TABLE_INDEX_A
 
- LE_DB_RSP_CODE_0_A
 
- LE_DB_RSP_CODE_1_A
 
- LE_DB_SERVER_INDEX_A
 
- LE_DB_SRVR_START_INDEX_A
 
- LE_DB_TID_HASHBASE_A
 
- LE_DCE100_REG_LIST
 
- LE_DCE110_REG_LIST
 
- LE_DCE120_REG_LIST
 
- LE_DCE80_REG_LIST
 
- LE_DCN10_REG_LIST
 
- LE_DCN_COMMON_REG_LIST
 
- LE_ET_HASH_CON
 
- LE_ET_INVALID_TID
 
- LE_ET_TCAM_CLIP
 
- LE_ET_TCAM_CON
 
- LE_ET_TCAM_FILTER
 
- LE_ET_TCAM_ROUTING
 
- LE_ET_TCAM_SERVER
 
- LE_ET_UNKNOWN
 
- LE_EXT_ADV_CONN_IND
 
- LE_EXT_ADV_DIRECT_IND
 
- LE_EXT_ADV_LEGACY_PDU
 
- LE_EXT_ADV_NON_CONN_IND
 
- LE_EXT_ADV_SCAN_IND
 
- LE_EXT_ADV_SCAN_RSP
 
- LE_F
 
- LE_FIT_TYPE
 
- LE_FLOWCTL_MAX_CREDITS
 
- LE_IE
 
- LE_IR
 
- LE_JAB
 
- LE_LEGACY_ADV_DIRECT_IND
 
- LE_LEGACY_ADV_IND
 
- LE_LEGACY_ADV_SCAN_IND
 
- LE_LEGACY_NONCONN_IND
 
- LE_LEGACY_SCAN_RSP_ADV
 
- LE_LEGACY_SCAN_RSP_ADV_SCAN
 
- LE_LINK
 
- LE_LOCK
 
- LE_LRUM
 
- LE_MAX_TX_POWER
 
- LE_MIN_RSSI
 
- LE_MO_DAPC
 
- LE_MO_DLNKTST
 
- LE_MO_DRCVBC
 
- LE_MO_DRCVPA
 
- LE_MO_DRTY
 
- LE_MO_DRX
 
- LE_MO_DTX
 
- LE_MO_DXMTFCS
 
- LE_MO_EMBA
 
- LE_MO_FCOLL
 
- LE_MO_INTL
 
- LE_MO_LOOP
 
- LE_MO_LRTTSEL
 
- LE_MO_MENDECL
 
- LE_MO_PROM
 
- LE_MO_PSEL0
 
- LE_MO_PSEL1
 
- LE_MSTR
 
- LE_P1BYTE_TO_HOST_1BYTE
 
- LE_P2BYTE_TO_HOST_2BYTE
 
- LE_P4BYTE_TO_HOST_4BYTE
 
- LE_PFM
 
- LE_PROF1
 
- LE_PROF2
 
- LE_PROF_OTHER
 
- LE_R1_BUF
 
- LE_R1_CRC
 
- LE_R1_EOP
 
- LE_R1_ERR
 
- LE_R1_FRA
 
- LE_R1_OFL
 
- LE_R1_OWN
 
- LE_R1_POK
 
- LE_R1_SOP
 
- LE_RSC
 
- LE_S
 
- LE_SCAN
 
- LE_SCAN_ACTIVE
 
- LE_SCAN_DISABLE
 
- LE_SCAN_ENABLE
 
- LE_SCAN_FILTER_DUP_DISABLE
 
- LE_SCAN_FILTER_DUP_ENABLE
 
- LE_SCAN_PASSIVE
 
- LE_SCAN_PHY_1M
 
- LE_SCAN_PHY_2M
 
- LE_SCAN_PHY_CODED
 
- LE_SCC
 
- LE_SCF
 
- LE_SET_ADV_DATA_NO_FRAG
 
- LE_SET_ADV_DATA_OP_COMPLETE
 
- LE_SF
 
- LE_SLAVE_LAT
 
- LE_SSE
 
- LE_T1_EDEF
 
- LE_T1_EMORE
 
- LE_T1_EONE
 
- LE_T1_EOP
 
- LE_T1_ERR
 
- LE_T1_OWN
 
- LE_T1_POK
 
- LE_T1_RES
 
- LE_T1_SOP
 
- LE_T3_BUF
 
- LE_T3_CLOS
 
- LE_T3_LCOL
 
- LE_T3_RTY
 
- LE_T3_TDR
 
- LE_T3_UFL
 
- LE_TABLE_ROWS
 
- LE_TABLE_SIZE
 
- LE_TC_0_PAGETABLE
 
- LE_TC_1_LLC
 
- LE_TC_2_LLC_ELLC
 
- LE_TC_3_LLC_ELLC_ALT
 
- LE_V
 
- LF
 
- LFA_DCC_LFA_DISABLED
 
- LFA_DUPLEX_MISMATCH
 
- LFA_EEE_MISMATCH
 
- LFA_FLAGS_MASK
 
- LFA_FLOW_CTRL_MISMATCH
 
- LFA_LINK_DOWN
 
- LFA_LINK_FLAP_REASON_MASK
 
- LFA_LINK_FLAP_REASON_OFFSET
 
- LFA_LINK_SPEED_MISMATCH
 
- LFA_LOOPBACK_ENABLED
 
- LFA_MFW_IS_TOO_OLD
 
- LFA_SPEED_CAP_MISMATCH
 
- LFBMEMORYCONFIG
 
- LFBMODE
 
- LFB_565
 
- LFB_888
 
- LFB_8888
 
- LFB_BYTE_SWIZZLE_RD
 
- LFB_BYTE_SWIZZLE_WR
 
- LFB_INVERT_Y
 
- LFB_READ_AHEAD
 
- LFB_WORD_SWIZZLE_RD
 
- LFB_WORD_SWIZZLE_WR
 
- LFD
 
- LFDU
 
- LFDUX
 
- LFDX
 
- LFE
 
- LFEOUT
 
- LFE_CC_SWAP
 
- LFM_OP
 
- LFOVAL1
 
- LFOVAL2
 
- LFOVAL2_MASK
 
- LFOVAL_MASK
 
- LFPS_TIMERS_2_WORKAROUND_VALUE
 
- LFRAME_MARK
 
- LFRATIO_12_20
 
- LFRATIO_20_12
 
- LFRATIO_MASK
 
- LFRCM
 
- LFRCM_ADDR
 
- LFRCM_XMOD_MASK
 
- LFRCM_XMOD_SHIFT
 
- LFRCM_YMOD_MASK
 
- LFRCM_YMOD_SHIFT
 
- LFS
 
- LFSU
 
- LFSUX
 
- LFSX
 
- LG2160
 
- LG2160_SPI_12_5_MHZ
 
- LG2160_SPI_3_125_MHZ
 
- LG2160_SPI_6_25_MHZ
 
- LG2161
 
- LG2161_1019
 
- LG2161_1040
 
- LG2161_OIF_EBI2_SLA
 
- LG2161_OIF_SDIO_SLA
 
- LG2161_OIF_SERIAL_TS
 
- LG2161_OIF_SPI_MAS
 
- LG2161_OIF_SPI_SLA
 
- LG3306_AGC_LOCK
 
- LG3306_FEC_LOCK
 
- LG3306_LOCK
 
- LG3306_NL_FAIL
 
- LG3306_NL_INIT
 
- LG3306_NL_LOCK
 
- LG3306_NL_PROCESS
 
- LG3306_NL_UNKNOWN
 
- LG3306_QAM256
 
- LG3306_QAM64
 
- LG3306_SYNC_LOCK
 
- LG3306_TR_LOCK
 
- LG3306_UNKNOWN_LOCK
 
- LG3306_UNKNOWN_MODE
 
- LG3306_UNLOCK
 
- LG3306_VSB
 
- LG4FF_DFEX_NAME
 
- LG4FF_DFEX_TAG
 
- LG4FF_DFGT_NAME
 
- LG4FF_DFGT_TAG
 
- LG4FF_DFP_NAME
 
- LG4FF_DFP_TAG
 
- LG4FF_FFEX_REV_MAJ
 
- LG4FF_FFEX_REV_MIN
 
- LG4FF_G25_NAME
 
- LG4FF_G25_TAG
 
- LG4FF_G27_NAME
 
- LG4FF_G27_TAG
 
- LG4FF_G29_NAME
 
- LG4FF_G29_TAG
 
- LG4FF_MMODE_IS_MULTIMODE
 
- LG4FF_MMODE_NOT_MULTIMODE
 
- LG4FF_MMODE_SWITCHED
 
- LG4FF_MODE_DFEX
 
- LG4FF_MODE_DFEX_IDX
 
- LG4FF_MODE_DFGT
 
- LG4FF_MODE_DFGT_IDX
 
- LG4FF_MODE_DFP
 
- LG4FF_MODE_DFP_IDX
 
- LG4FF_MODE_G25
 
- LG4FF_MODE_G25_IDX
 
- LG4FF_MODE_G27
 
- LG4FF_MODE_G27_IDX
 
- LG4FF_MODE_G29
 
- LG4FF_MODE_G29_IDX
 
- LG4FF_MODE_MAX_IDX
 
- LG4FF_MODE_NATIVE
 
- LG4FF_MODE_NATIVE_IDX
 
- LG60
 
- LGC_PALETTE
 
- LGDT3302
 
- LGDT3302_EQPH_ERR0
 
- LGDT3302_EQ_ERR1
 
- LGDT3302_EQ_ERR2
 
- LGDT3302_PACKET_ERR_COUNTER1
 
- LGDT3302_PACKET_ERR_COUNTER2
 
- LGDT3302_PH_ERR1
 
- LGDT3302_PH_ERR2
 
- LGDT3303
 
- LGDT3303_EQPH_ERR0
 
- LGDT3303_EQ_ERR1
 
- LGDT3303_EQ_ERR2
 
- LGDT3303_PACKET_ERR_COUNTER1
 
- LGDT3303_PACKET_ERR_COUNTER2
 
- LGDT3303_PH_ERR1
 
- LGDT3303_PH_ERR2
 
- LGDT3304
 
- LGDT3305
 
- LGDT3305_AGC_CTRL_1
 
- LGDT3305_AGC_CTRL_4
 
- LGDT3305_AGC_DELAY_PT_1
 
- LGDT3305_AGC_DELAY_PT_2
 
- LGDT3305_AGC_POWER_REF_1
 
- LGDT3305_AGC_POWER_REF_2
 
- LGDT3305_BERT_ERROR_COUNT_1
 
- LGDT3305_BERT_ERROR_COUNT_2
 
- LGDT3305_BERT_ERROR_COUNT_3
 
- LGDT3305_BERT_ERROR_COUNT_4
 
- LGDT3305_BERT_PERIOD
 
- LGDT3305_CR_CTRL_7
 
- LGDT3305_CR_CTR_FREQ_1
 
- LGDT3305_CR_CTR_FREQ_2
 
- LGDT3305_CR_CTR_FREQ_3
 
- LGDT3305_CR_CTR_FREQ_4
 
- LGDT3305_CR_LOCK_STATUS
 
- LGDT3305_CR_MSE_1
 
- LGDT3305_CR_MSE_2
 
- LGDT3305_DGTL_AGC_REF_1
 
- LGDT3305_DGTL_AGC_REF_2
 
- LGDT3305_EQ_MSE_1
 
- LGDT3305_EQ_MSE_2
 
- LGDT3305_EQ_MSE_3
 
- LGDT3305_FEC_BLOCK_CTRL
 
- LGDT3305_FEC_LOCK_STATUS
 
- LGDT3305_FEC_PKT_ERR_1
 
- LGDT3305_FEC_PKT_ERR_2
 
- LGDT3305_GEN_CONTROL
 
- LGDT3305_GEN_CTRL_1
 
- LGDT3305_GEN_CTRL_2
 
- LGDT3305_GEN_CTRL_3
 
- LGDT3305_GEN_CTRL_4
 
- LGDT3305_GEN_STATUS
 
- LGDT3305_IFBW_1
 
- LGDT3305_IFBW_2
 
- LGDT3305_MPEG_PARALLEL
 
- LGDT3305_MPEG_SERIAL
 
- LGDT3305_PT_MSE_1
 
- LGDT3305_PT_MSE_2
 
- LGDT3305_PT_MSE_3
 
- LGDT3305_RFAGC_LOOP_FLTR_BW_1
 
- LGDT3305_RFAGC_LOOP_FLTR_BW_2
 
- LGDT3305_TPCLK_FALLING_EDGE
 
- LGDT3305_TPCLK_FIXED
 
- LGDT3305_TPCLK_GATED
 
- LGDT3305_TPCLK_RISING_EDGE
 
- LGDT3305_TP_CTRL_1
 
- LGDT3305_TP_VALID_HIGH
 
- LGDT3305_TP_VALID_LOW
 
- LGDT3306A_MPEG_PARALLEL
 
- LGDT3306A_MPEG_SERIAL
 
- LGDT3306A_TPCLK_FALLING_EDGE
 
- LGDT3306A_TPCLK_RISING_EDGE
 
- LGDT3306A_TP_VALID_HIGH
 
- LGDT3306A_TP_VALID_LOW
 
- LGDT330X_H
 
- LGN_CODE
 
- LGO_U1
 
- LGO_U2
 
- LGO_U3
 
- LGPIO0_MARK
 
- LGPIO1_MARK
 
- LGPIO2_MARK
 
- LGPIO3_MARK
 
- LGPIO4_MARK
 
- LGPIO5_MARK
 
- LGPIO6_MARK
 
- LGPIO7_MARK
 
- LGPMR
 
- LGPMR_ADDR
 
- LGPMR_G1_MASK
 
- LGPMR_G1_SHIFT
 
- LGPMR_G2_MASK
 
- LGPMR_G2_SHIFT
 
- LGPMR_GLEVEL0_MASK
 
- LGPMR_GLEVEL0_SHIFT
 
- LGPMR_GLEVEL1_MASK
 
- LGPMR_GLEVEL1_SHIFT
 
- LGPMR_GLEVEL2_MASK
 
- LGPMR_GLEVEL2_SHIFT
 
- LGPMR_GLEVEL3_MASK
 
- LGPMR_GLEVEL3_SHIFT
 
- LGREG
 
- LGR_TIMER_INTERVAL_SECS
 
- LGS8913_PRIV_H
 
- LGS8GL5_H
 
- LGS8GXX_FIRMWARE
 
- LGS8GXX_PROD_LGS8913
 
- LGS8GXX_PROD_LGS8G42
 
- LGS8GXX_PROD_LGS8G52
 
- LGS8GXX_PROD_LGS8G54
 
- LGS8GXX_PROD_LGS8G75
 
- LGS8GXX_PROD_LGS8GL5
 
- LGS_FEC_0_4
 
- LGS_FEC_0_6
 
- LGS_FEC_0_8
 
- LGS_FEC_MASK
 
- LG_BAD_RELATIVE_KEYS
 
- LG_CHIP_ID
 
- LG_DUPLICATE_USAGES
 
- LG_EXPANDED_KEYMAP
 
- LG_FBK_CFG0
 
- LG_FBK_CFG0_CCKMCS0FBK
 
- LG_FBK_CFG0_CCKMCS1FBK
 
- LG_FBK_CFG0_CCKMCS2FBK
 
- LG_FBK_CFG0_CCKMCS3FBK
 
- LG_FBK_CFG0_OFDMMCS0FBK
 
- LG_FBK_CFG0_OFDMMCS1FBK
 
- LG_FBK_CFG0_OFDMMCS2FBK
 
- LG_FBK_CFG0_OFDMMCS3FBK
 
- LG_FBK_CFG0_OFDMMCS4FBK
 
- LG_FBK_CFG0_OFDMMCS5FBK
 
- LG_FBK_CFG0_OFDMMCS6FBK
 
- LG_FBK_CFG0_OFDMMCS7FBK
 
- LG_FBK_CFG1
 
- LG_FF
 
- LG_FF2
 
- LG_FF3
 
- LG_FF4
 
- LG_HPTEG_SIZE
 
- LG_IGNORE_DOUBLED_WHEEL
 
- LG_INVERT_HWHEEL
 
- LG_NOGET
 
- LG_PRODUCT_L02C
 
- LG_PRODUCT_VX4400_6000
 
- LG_PTEG_SIZE
 
- LG_RDESC
 
- LG_RDESC_REL_ABS
 
- LG_VENDOR_ID
 
- LG_WIRELESS
 
- LH
 
- LH28F640BF
 
- LH28F640BFHE_PBTL70A
 
- LH28F640BFHE_PBTL90
 
- LH28F640BFHE_PTTL70A
 
- LH28F640BFHE_PTTL90
 
- LHCR0
 
- LHS_OUTPUT_POLARITY_LOW
 
- LHZX_BE
 
- LH_V1_SIZE
 
- LI
 
- LI20
 
- LI20_MASK
 
- LIA
 
- LIB80211_H
 
- LIB82596_DMA_ATTR
 
- LIBATA_DUMB_MAX_PRD
 
- LIBATA_MAX_PRD
 
- LIBBPF_API
 
- LIBBPF_DEBUG
 
- LIBBPF_ELF_C_READ_MMAP
 
- LIBBPF_ERRNO__ENDIAN
 
- LIBBPF_ERRNO__FORMAT
 
- LIBBPF_ERRNO__INTERNAL
 
- LIBBPF_ERRNO__INVSEQ
 
- LIBBPF_ERRNO__KVER
 
- LIBBPF_ERRNO__KVERSION
 
- LIBBPF_ERRNO__LIBELF
 
- LIBBPF_ERRNO__LOAD
 
- LIBBPF_ERRNO__NLPARSE
 
- LIBBPF_ERRNO__PROG2BIG
 
- LIBBPF_ERRNO__PROGTYPE
 
- LIBBPF_ERRNO__RELOC
 
- LIBBPF_ERRNO__VERIFY
 
- LIBBPF_ERRNO__WRNGPID
 
- LIBBPF_INFO
 
- LIBBPF_MAP_BSS
 
- LIBBPF_MAP_DATA
 
- LIBBPF_MAP_RODATA
 
- LIBBPF_MAP_UNSPEC
 
- LIBBPF_NLA_FLAG
 
- LIBBPF_NLA_MSECS
 
- LIBBPF_NLA_NESTED
 
- LIBBPF_NLA_STRING
 
- LIBBPF_NLA_TYPE_MAX
 
- LIBBPF_NLA_U16
 
- LIBBPF_NLA_U32
 
- LIBBPF_NLA_U64
 
- LIBBPF_NLA_U8
 
- LIBBPF_NLA_UNSPEC
 
- LIBBPF_PERF_EVENT_CONT
 
- LIBBPF_PERF_EVENT_DONE
 
- LIBBPF_PERF_EVENT_ERROR
 
- LIBBPF_WARN
 
- LIBFCOE_CHECK_LOGGING
 
- LIBFCOE_DBG
 
- LIBFCOE_FIP_DBG
 
- LIBFCOE_FIP_LOGGING
 
- LIBFCOE_LOGGING
 
- LIBFCOE_SYSFS_DBG
 
- LIBFCOE_SYSFS_LOGGING
 
- LIBFCOE_TRANSPORT_DBG
 
- LIBFCOE_TRANSPORT_LOGGING
 
- LIBFDT_ENV_H
 
- LIBFDT_H
 
- LIBFDT_INTERNAL_H
 
- LIBIPW_1ADDR_LEN
 
- LIBIPW_24GHZ_BAND
 
- LIBIPW_24GHZ_CHANNELS
 
- LIBIPW_24GHZ_MAX_CHANNEL
 
- LIBIPW_24GHZ_MIN_CHANNEL
 
- LIBIPW_2ADDR_LEN
 
- LIBIPW_3ADDR_LEN
 
- LIBIPW_4ADDR_LEN
 
- LIBIPW_52GHZ_BAND
 
- LIBIPW_52GHZ_CHANNELS
 
- LIBIPW_52GHZ_MAX_CHANNEL
 
- LIBIPW_52GHZ_MIN_CHANNEL
 
- LIBIPW_ASSOCIATED
 
- LIBIPW_ASSOCIATING
 
- LIBIPW_AUTHENTICATED
 
- LIBIPW_AUTHENTICATING
 
- LIBIPW_BASIC_RATE_MASK
 
- LIBIPW_CCK_BASIC_RATES_MASK
 
- LIBIPW_CCK_DEFAULT_RATES_MASK
 
- LIBIPW_CCK_MODULATION
 
- LIBIPW_CCK_RATES_MASK
 
- LIBIPW_CCK_RATE_11MB
 
- LIBIPW_CCK_RATE_11MB_MASK
 
- LIBIPW_CCK_RATE_1MB
 
- LIBIPW_CCK_RATE_1MB_MASK
 
- LIBIPW_CCK_RATE_2MB
 
- LIBIPW_CCK_RATE_2MB_MASK
 
- LIBIPW_CCK_RATE_5MB
 
- LIBIPW_CCK_RATE_5MB_MASK
 
- LIBIPW_CH_80211H_RULES
 
- LIBIPW_CH_B_ONLY
 
- LIBIPW_CH_INVALID
 
- LIBIPW_CH_NO_IBSS
 
- LIBIPW_CH_PASSIVE_ONLY
 
- LIBIPW_CH_RADAR_DETECT
 
- LIBIPW_CH_UNIFORM_SPREADING
 
- LIBIPW_DATA_LEN
 
- LIBIPW_DEBUG
 
- LIBIPW_DEBUG_DROP
 
- LIBIPW_DEBUG_FRAG
 
- LIBIPW_DEBUG_INFO
 
- LIBIPW_DEBUG_MGMT
 
- LIBIPW_DEBUG_QOS
 
- LIBIPW_DEBUG_RX
 
- LIBIPW_DEBUG_SCAN
 
- LIBIPW_DEBUG_STATE
 
- LIBIPW_DEBUG_TX
 
- LIBIPW_DEBUG_WX
 
- LIBIPW_DEFAULT_RATES_MASK
 
- LIBIPW_DL_DROP
 
- LIBIPW_DL_FRAG
 
- LIBIPW_DL_INFO
 
- LIBIPW_DL_MGMT
 
- LIBIPW_DL_QOS
 
- LIBIPW_DL_RX
 
- LIBIPW_DL_SCAN
 
- LIBIPW_DL_STATE
 
- LIBIPW_DL_TX
 
- LIBIPW_DL_WX
 
- LIBIPW_ERROR
 
- LIBIPW_FCS_LEN
 
- LIBIPW_FRAG_CACHE_LEN
 
- LIBIPW_FRAME_LEN
 
- LIBIPW_H
 
- LIBIPW_HLEN
 
- LIBIPW_INITIALIZED
 
- LIBIPW_NUM_CCK_RATES
 
- LIBIPW_NUM_OFDM_RATES
 
- LIBIPW_OFDM_BASIC_RATES_MASK
 
- LIBIPW_OFDM_DEFAULT_RATES_MASK
 
- LIBIPW_OFDM_MODULATION
 
- LIBIPW_OFDM_RATES_MASK
 
- LIBIPW_OFDM_RATE_12MB
 
- LIBIPW_OFDM_RATE_12MB_MASK
 
- LIBIPW_OFDM_RATE_18MB
 
- LIBIPW_OFDM_RATE_18MB_MASK
 
- LIBIPW_OFDM_RATE_24MB
 
- LIBIPW_OFDM_RATE_24MB_MASK
 
- LIBIPW_OFDM_RATE_36MB
 
- LIBIPW_OFDM_RATE_36MB_MASK
 
- LIBIPW_OFDM_RATE_48MB
 
- LIBIPW_OFDM_RATE_48MB_MASK
 
- LIBIPW_OFDM_RATE_54MB
 
- LIBIPW_OFDM_RATE_54MB_MASK
 
- LIBIPW_OFDM_RATE_6MB
 
- LIBIPW_OFDM_RATE_6MB_MASK
 
- LIBIPW_OFDM_RATE_9MB
 
- LIBIPW_OFDM_RATE_9MB_MASK
 
- LIBIPW_OFDM_SHIFT_MASK_A
 
- LIBIPW_QCTL_TID
 
- LIBIPW_SHUTDOWN
 
- LIBIPW_STATMASK_NOISE
 
- LIBIPW_STATMASK_RATE
 
- LIBIPW_STATMASK_RSSI
 
- LIBIPW_STATMASK_SIGNAL
 
- LIBIPW_STATMASK_WEMASK
 
- LIBIPW_UNINITIALIZED
 
- LIBIPW_VERSION
 
- LIBIPW_WARNING
 
- LIBISCSI_H
 
- LIBISCSI_TCP_H
 
- LIBLOCKDEP_MAX_LOCK_NAME
 
- LIBLOCKDEP_PTHREAD_MUTEX_INITIALIZER
 
- LIBLOCKDEP_PTHREAD_RWLOCK_INITIALIZER
 
- LIBLOCKDEP_STATIC_ENTRIES
 
- LIBMAGIC
 
- LIBPERF_API
 
- LIBPERF_DEBUG
 
- LIBPERF_INFO
 
- LIBPERF_WARN
 
- LIBRARY_TEXT_START
 
- LIBTRANSISTOR_IDS
 
- LIBUNWIND__ARCH_REG_ID
 
- LIBUNWIND__ARCH_REG_IP
 
- LIBUNWIND__ARCH_REG_SP
 
- LIBURING_BARRIER_H
 
- LIB_URING_H
 
- LICENSED_APP_ID_CAPTURE_SOLARSYSTEM
 
- LICENSED_APP_ID_CAPTURE_SOLARSYSTEM_1G
 
- LICENSED_APP_ID_CAPTURE_SOLARSYSTEM_40G
 
- LICENSED_APP_ID_DSHBRD
 
- LICENSED_APP_ID_ID_LBN
 
- LICENSED_APP_ID_ID_LEN
 
- LICENSED_APP_ID_ID_OFST
 
- LICENSED_APP_ID_ID_WIDTH
 
- LICENSED_APP_ID_LEN
 
- LICENSED_APP_ID_LOW_LATENCY
 
- LICENSED_APP_ID_NETWORK_ACCESS_CONTROL
 
- LICENSED_APP_ID_ONLOAD
 
- LICENSED_APP_ID_PERF_MONITOR
 
- LICENSED_APP_ID_PTP
 
- LICENSED_APP_ID_SCALEOUT_ONLOAD
 
- LICENSED_APP_ID_SCATRD
 
- LICENSED_APP_ID_SOLARCAPTURE_LIVE
 
- LICENSED_APP_ID_SOLARCAPTURE_PRO
 
- LICENSED_APP_ID_SOLARCAPTURE_TAP
 
- LICENSED_APP_ID_SOLARSECURE
 
- LICENSED_APP_ID_TCP_DIRECT
 
- LICENSED_FEATURES_CLOCK_LBN
 
- LICENSED_FEATURES_CLOCK_WIDTH
 
- LICENSED_FEATURES_EVENT_CUT_THROUGH_LBN
 
- LICENSED_FEATURES_EVENT_CUT_THROUGH_WIDTH
 
- LICENSED_FEATURES_EVQ_TIMER_LBN
 
- LICENSED_FEATURES_EVQ_TIMER_WIDTH
 
- LICENSED_FEATURES_LEN
 
- LICENSED_FEATURES_MASK_HI_OFST
 
- LICENSED_FEATURES_MASK_LBN
 
- LICENSED_FEATURES_MASK_LEN
 
- LICENSED_FEATURES_MASK_LO_OFST
 
- LICENSED_FEATURES_MASK_OFST
 
- LICENSED_FEATURES_MASK_WIDTH
 
- LICENSED_FEATURES_PIO_LBN
 
- LICENSED_FEATURES_PIO_WIDTH
 
- LICENSED_FEATURES_PROXY_FILTER_OPS_LBN
 
- LICENSED_FEATURES_PROXY_FILTER_OPS_WIDTH
 
- LICENSED_FEATURES_RX_CUT_THROUGH_LBN
 
- LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH
 
- LICENSED_FEATURES_RX_SNIFF_LBN
 
- LICENSED_FEATURES_RX_SNIFF_WIDTH
 
- LICENSED_FEATURES_RX_TIMESTAMPS_LBN
 
- LICENSED_FEATURES_RX_TIMESTAMPS_WIDTH
 
- LICENSED_FEATURES_TX_SNIFF_LBN
 
- LICENSED_FEATURES_TX_SNIFF_WIDTH
 
- LICENSED_FEATURES_TX_TIMESTAMPS_LBN
 
- LICENSED_FEATURES_TX_TIMESTAMPS_WIDTH
 
- LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_LBN
 
- LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_WIDTH
 
- LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_LBN
 
- LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_WIDTH
 
- LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_LBN
 
- LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_WIDTH
 
- LICENSED_V3_APPS_DSHBRD_LBN
 
- LICENSED_V3_APPS_DSHBRD_WIDTH
 
- LICENSED_V3_APPS_LEN
 
- LICENSED_V3_APPS_LOW_LATENCY_LBN
 
- LICENSED_V3_APPS_LOW_LATENCY_WIDTH
 
- LICENSED_V3_APPS_MASK_HI_OFST
 
- LICENSED_V3_APPS_MASK_LBN
 
- LICENSED_V3_APPS_MASK_LEN
 
- LICENSED_V3_APPS_MASK_LO_OFST
 
- LICENSED_V3_APPS_MASK_OFST
 
- LICENSED_V3_APPS_MASK_WIDTH
 
- LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_LBN
 
- LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_WIDTH
 
- LICENSED_V3_APPS_ONLOAD_LBN
 
- LICENSED_V3_APPS_ONLOAD_WIDTH
 
- LICENSED_V3_APPS_PERF_MONITOR_LBN
 
- LICENSED_V3_APPS_PERF_MONITOR_WIDTH
 
- LICENSED_V3_APPS_PTP_LBN
 
- LICENSED_V3_APPS_PTP_WIDTH
 
- LICENSED_V3_APPS_SCALEOUT_ONLOAD_LBN
 
- LICENSED_V3_APPS_SCALEOUT_ONLOAD_WIDTH
 
- LICENSED_V3_APPS_SCATRD_LBN
 
- LICENSED_V3_APPS_SCATRD_WIDTH
 
- LICENSED_V3_APPS_SOLARCAPTURE_LIVE_LBN
 
- LICENSED_V3_APPS_SOLARCAPTURE_LIVE_WIDTH
 
- LICENSED_V3_APPS_SOLARCAPTURE_PRO_LBN
 
- LICENSED_V3_APPS_SOLARCAPTURE_PRO_WIDTH
 
- LICENSED_V3_APPS_SOLARCAPTURE_TAP_LBN
 
- LICENSED_V3_APPS_SOLARCAPTURE_TAP_WIDTH
 
- LICENSED_V3_APPS_SOLARSECURE_LBN
 
- LICENSED_V3_APPS_SOLARSECURE_WIDTH
 
- LICENSED_V3_APPS_TCP_DIRECT_LBN
 
- LICENSED_V3_APPS_TCP_DIRECT_WIDTH
 
- LICENSED_V3_FEATURES_CLOCK_LBN
 
- LICENSED_V3_FEATURES_CLOCK_WIDTH
 
- LICENSED_V3_FEATURES_EVENT_CUT_THROUGH_LBN
 
- LICENSED_V3_FEATURES_EVENT_CUT_THROUGH_WIDTH
 
- LICENSED_V3_FEATURES_EVQ_TIMER_LBN
 
- LICENSED_V3_FEATURES_EVQ_TIMER_WIDTH
 
- LICENSED_V3_FEATURES_LEN
 
- LICENSED_V3_FEATURES_MASK_HI_OFST
 
- LICENSED_V3_FEATURES_MASK_LBN
 
- LICENSED_V3_FEATURES_MASK_LEN
 
- LICENSED_V3_FEATURES_MASK_LO_OFST
 
- LICENSED_V3_FEATURES_MASK_OFST
 
- LICENSED_V3_FEATURES_MASK_WIDTH
 
- LICENSED_V3_FEATURES_PIO_LBN
 
- LICENSED_V3_FEATURES_PIO_WIDTH
 
- LICENSED_V3_FEATURES_PROXY_FILTER_OPS_LBN
 
- LICENSED_V3_FEATURES_PROXY_FILTER_OPS_WIDTH
 
- LICENSED_V3_FEATURES_RX_CUT_THROUGH_LBN
 
- LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH
 
- LICENSED_V3_FEATURES_RX_SNIFF_LBN
 
- LICENSED_V3_FEATURES_RX_SNIFF_WIDTH
 
- LICENSED_V3_FEATURES_RX_TIMESTAMPS_LBN
 
- LICENSED_V3_FEATURES_RX_TIMESTAMPS_WIDTH
 
- LICENSED_V3_FEATURES_TX_SNIFF_LBN
 
- LICENSED_V3_FEATURES_TX_SNIFF_WIDTH
 
- LICENSED_V3_FEATURES_TX_TIMESTAMPS_LBN
 
- LICENSED_V3_FEATURES_TX_TIMESTAMPS_WIDTH
 
- LICLK
 
- LIDAR_DRV_NAME
 
- LIDAR_REG_CONTROL
 
- LIDAR_REG_CONTROL_ACQUIRE
 
- LIDAR_REG_DATA_HBYTE
 
- LIDAR_REG_DATA_LBYTE
 
- LIDAR_REG_DATA_WORD_READ
 
- LIDAR_REG_PWR_CONTROL
 
- LIDAR_REG_STATUS
 
- LIDAR_REG_STATUS_INVALID
 
- LIDAR_REG_STATUS_READY
 
- LID_ANGLE_UNRELIABLE
 
- LID_RESUME_MAX
 
- LID_RESUME_S3
 
- LID_RESUME_S4
 
- LID_RESUME_S5
 
- LID_STATUS
 
- LID_SWITCH
 
- LID_WAKE_ALWAYS
 
- LID_WAKE_CLOSE
 
- LID_WAKE_OPEN
 
- LIF_MAX_SIZE
 
- LIF_MIN_SIZE
 
- LIF_PAD_SINK
 
- LIF_PAD_SOURCE
 
- LIGHTBAR_CMD_DEMO
 
- LIGHTBAR_CMD_DUMP
 
- LIGHTBAR_CMD_GET_BRIGHTNESS
 
- LIGHTBAR_CMD_GET_DEMO
 
- LIGHTBAR_CMD_GET_PARAMS_V0
 
- LIGHTBAR_CMD_GET_PARAMS_V1
 
- LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS
 
- LIGHTBAR_CMD_GET_PARAMS_V2_COLORS
 
- LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION
 
- LIGHTBAR_CMD_GET_PARAMS_V2_TAP
 
- LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS
 
- LIGHTBAR_CMD_GET_PARAMS_V2_TIMING
 
- LIGHTBAR_CMD_GET_RGB
 
- LIGHTBAR_CMD_GET_SEQ
 
- LIGHTBAR_CMD_INIT
 
- LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL
 
- LIGHTBAR_CMD_OFF
 
- LIGHTBAR_CMD_ON
 
- LIGHTBAR_CMD_REG
 
- LIGHTBAR_CMD_RESUME
 
- LIGHTBAR_CMD_SEQ
 
- LIGHTBAR_CMD_SET_BRIGHTNESS
 
- LIGHTBAR_CMD_SET_PARAMS_V0
 
- LIGHTBAR_CMD_SET_PARAMS_V1
 
- LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS
 
- LIGHTBAR_CMD_SET_PARAMS_V2_COLORS
 
- LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION
 
- LIGHTBAR_CMD_SET_PARAMS_V2_TAP
 
- LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS
 
- LIGHTBAR_CMD_SET_PARAMS_V2_TIMING
 
- LIGHTBAR_CMD_SET_PROGRAM
 
- LIGHTBAR_CMD_SET_RGB
 
- LIGHTBAR_CMD_SUSPEND
 
- LIGHTBAR_CMD_VERSION
 
- LIGHTBAR_NUM_CMDS
 
- LIGHT_SENSOR_LEFT_KEY
 
- LIGHT_SENSOR_RIGHT_KEY
 
- LIGHT_SLEEP_CNTL__LIGHT_SLEEP_DIS_MASK
 
- LIGHT_SLEEP_CNTL__LIGHT_SLEEP_DIS__SHIFT
 
- LIGHT_SLEEP_CNTL__MEM_SHUTDOWN_DIS_MASK
 
- LIGHT_SLEEP_CNTL__MEM_SHUTDOWN_DIS__SHIFT
 
- LIGHT_TIME
 
- LIH_INDEX
 
- LIH_SIZE
 
- LIIDR
 
- LIKELY_PROFILE
 
- LIMA450_PMU_POWER_PP0_MASK
 
- LIMA450_PMU_POWER_PP13_MASK
 
- LIMA450_PMU_POWER_PP47_MASK
 
- LIMA_BCAST_BROADCAST_MASK
 
- LIMA_BCAST_INTERRUPT_MASK
 
- LIMA_BTE
 
- LIMA_DLBU_FB_DIM
 
- LIMA_DLBU_MASTER_TLLIST_PHYS_ADDR
 
- LIMA_DLBU_MASTER_TLLIST_VADDR
 
- LIMA_DLBU_PP_ENABLE_MASK
 
- LIMA_DLBU_START_TILE_POS
 
- LIMA_DLBU_TLLIST_CONF
 
- LIMA_DLBU_TLLIST_VBASEADDR
 
- LIMA_GEM_WAIT_READ
 
- LIMA_GEM_WAIT_WRITE
 
- LIMA_GP_CMD
 
- LIMA_GP_CMD_FORCE_HANG
 
- LIMA_GP_CMD_RESET
 
- LIMA_GP_CMD_SOFT_RESET
 
- LIMA_GP_CMD_START_PLBU
 
- LIMA_GP_CMD_START_VS
 
- LIMA_GP_CMD_STOP_BUS
 
- LIMA_GP_CMD_UPDATE_PLBU_ALLOC
 
- LIMA_GP_CONTR_AXI_BUS_ERROR_STAT
 
- LIMA_GP_FRAME_REG_NUM
 
- LIMA_GP_INT_CLEAR
 
- LIMA_GP_INT_MASK
 
- LIMA_GP_INT_RAWSTAT
 
- LIMA_GP_INT_STAT
 
- LIMA_GP_IRQ_AXI_BUS_ERROR
 
- LIMA_GP_IRQ_AXI_BUS_STOPPED
 
- LIMA_GP_IRQ_FORCE_HANG
 
- LIMA_GP_IRQ_HANG
 
- LIMA_GP_IRQ_MASK_ALL
 
- LIMA_GP_IRQ_MASK_ERROR
 
- LIMA_GP_IRQ_MASK_USED
 
- LIMA_GP_IRQ_PERF_CNT_0_LIMIT
 
- LIMA_GP_IRQ_PERF_CNT_1_LIMIT
 
- LIMA_GP_IRQ_PLBU_END_CMD_LST
 
- LIMA_GP_IRQ_PLBU_OUT_OF_MEM
 
- LIMA_GP_IRQ_PLBU_SEM_IRQ
 
- LIMA_GP_IRQ_PLB_INVALID_CMD
 
- LIMA_GP_IRQ_PTR_ARRAY_OUT_OF_BOUNDS
 
- LIMA_GP_IRQ_RESET_COMPLETED
 
- LIMA_GP_IRQ_SEMAPHORE_OVERFLOW
 
- LIMA_GP_IRQ_SEMAPHORE_UNDERFLOW
 
- LIMA_GP_IRQ_SYNC_ERROR
 
- LIMA_GP_IRQ_VS_END_CMD_LST
 
- LIMA_GP_IRQ_VS_INVALID_CMD
 
- LIMA_GP_IRQ_VS_SEM_IRQ
 
- LIMA_GP_IRQ_WRITE_BOUND_ERR
 
- LIMA_GP_PERF_CNT_0_ENABLE
 
- LIMA_GP_PERF_CNT_0_LIMIT
 
- LIMA_GP_PERF_CNT_0_SRC
 
- LIMA_GP_PERF_CNT_0_VALUE
 
- LIMA_GP_PERF_CNT_1_ENABLE
 
- LIMA_GP_PERF_CNT_1_SRC
 
- LIMA_GP_PERF_CNT_1_VALUE
 
- LIMA_GP_PLBCL_START_ADDR_READ
 
- LIMA_GP_PLBUCL_END_ADDR
 
- LIMA_GP_PLBUCL_START_ADDR
 
- LIMA_GP_PLBU_ALLOC_END_ADDR
 
- LIMA_GP_PLBU_ALLOC_START_ADDR
 
- LIMA_GP_STATUS
 
- LIMA_GP_STATUS_BUS_ERROR
 
- LIMA_GP_STATUS_BUS_STOPPED
 
- LIMA_GP_STATUS_PLBU_ACTIVE
 
- LIMA_GP_STATUS_VS_ACTIVE
 
- LIMA_GP_STATUS_WRITE_BOUND_ERR
 
- LIMA_GP_VERSION
 
- LIMA_GP_VSCL_END_ADDR
 
- LIMA_GP_VSCL_START_ADDR
 
- LIMA_GP_VSCL_START_ADDR_READ
 
- LIMA_GP_WRITE_BOUND_LOW
 
- LIMA_IP_DESC
 
- LIMA_L2_CACHE_CLEAR_PAGE
 
- LIMA_L2_CACHE_COMMAND
 
- LIMA_L2_CACHE_COMMAND_CLEAR_ALL
 
- LIMA_L2_CACHE_ENABLE
 
- LIMA_L2_CACHE_ENABLE_ACCESS
 
- LIMA_L2_CACHE_ENABLE_READ_ALLOCATE
 
- LIMA_L2_CACHE_ERFCNT_VAL1
 
- LIMA_L2_CACHE_MAX_READS
 
- LIMA_L2_CACHE_PERFCNT_SRC0
 
- LIMA_L2_CACHE_PERFCNT_SRC1
 
- LIMA_L2_CACHE_PERFCNT_VAL0
 
- LIMA_L2_CACHE_SIZE
 
- LIMA_L2_CACHE_STATUS
 
- LIMA_L2_CACHE_STATUS_COMMAND_BUSY
 
- LIMA_L2_CACHE_STATUS_DATA_BUSY
 
- LIMA_MMU_COMMAND
 
- LIMA_MMU_COMMAND_DISABLE_PAGING
 
- LIMA_MMU_COMMAND_DISABLE_STALL
 
- LIMA_MMU_COMMAND_ENABLE_PAGING
 
- LIMA_MMU_COMMAND_ENABLE_STALL
 
- LIMA_MMU_COMMAND_HARD_RESET
 
- LIMA_MMU_COMMAND_PAGE_FAULT_DONE
 
- LIMA_MMU_COMMAND_ZAP_CACHE
 
- LIMA_MMU_DTE_ADDR
 
- LIMA_MMU_INT_CLEAR
 
- LIMA_MMU_INT_MASK
 
- LIMA_MMU_INT_PAGE_FAULT
 
- LIMA_MMU_INT_RAWSTAT
 
- LIMA_MMU_INT_READ_BUS_ERROR
 
- LIMA_MMU_INT_STATUS
 
- LIMA_MMU_PAGE_FAULT_ADDR
 
- LIMA_MMU_STATUS
 
- LIMA_MMU_STATUS_BUS_ID
 
- LIMA_MMU_STATUS_IDLE
 
- LIMA_MMU_STATUS_PAGE_FAULT_ACTIVE
 
- LIMA_MMU_STATUS_PAGE_FAULT_IS_WRITE
 
- LIMA_MMU_STATUS_PAGING_ENABLED
 
- LIMA_MMU_STATUS_REPLAY_BUFFER_EMPTY
 
- LIMA_MMU_STATUS_STALL_ACTIVE
 
- LIMA_MMU_ZAP_ONE_LINE
 
- LIMA_PAGE_ENT_NUM
 
- LIMA_PAGE_MASK
 
- LIMA_PAGE_SIZE
 
- LIMA_PBE
 
- LIMA_PDE
 
- LIMA_PIPE_GP
 
- LIMA_PIPE_PP
 
- LIMA_PMU_INT_CLEAR
 
- LIMA_PMU_INT_CMD_MASK
 
- LIMA_PMU_INT_MASK
 
- LIMA_PMU_INT_RAWSTAT
 
- LIMA_PMU_POWER_DOWN
 
- LIMA_PMU_POWER_GP0_MASK
 
- LIMA_PMU_POWER_L2_MASK
 
- LIMA_PMU_POWER_PP_MASK
 
- LIMA_PMU_POWER_UP
 
- LIMA_PMU_STATUS
 
- LIMA_PMU_SW_DELAY
 
- LIMA_PP_BUS_ERROR_STATUS
 
- LIMA_PP_CTRL
 
- LIMA_PP_CTRL_FLUSH_CACHES
 
- LIMA_PP_CTRL_FORCE_RESET
 
- LIMA_PP_CTRL_SOFT_RESET
 
- LIMA_PP_CTRL_START_RENDERING
 
- LIMA_PP_CTRL_STOP_BUS
 
- LIMA_PP_CURRENT_REND_LIST_ADDR
 
- LIMA_PP_FRAME
 
- LIMA_PP_FRAME_REG_NUM
 
- LIMA_PP_INT_CLEAR
 
- LIMA_PP_INT_MASK
 
- LIMA_PP_INT_RAWSTAT
 
- LIMA_PP_INT_STATUS
 
- LIMA_PP_IRQ_BUS_ERROR
 
- LIMA_PP_IRQ_BUS_STOP
 
- LIMA_PP_IRQ_CALL_STACK_OVERFLOW
 
- LIMA_PP_IRQ_CALL_STACK_UNDERFLOW
 
- LIMA_PP_IRQ_CNT_0_LIMIT
 
- LIMA_PP_IRQ_CNT_1_LIMIT
 
- LIMA_PP_IRQ_END_OF_FRAME
 
- LIMA_PP_IRQ_END_OF_TILE
 
- LIMA_PP_IRQ_FORCE_HANG
 
- LIMA_PP_IRQ_HANG
 
- LIMA_PP_IRQ_INVALID_PLIST_COMMAND
 
- LIMA_PP_IRQ_MASK_ALL
 
- LIMA_PP_IRQ_MASK_ERROR
 
- LIMA_PP_IRQ_MASK_USED
 
- LIMA_PP_IRQ_RESET_COMPLETED
 
- LIMA_PP_IRQ_WRITE_BOUNDARY_ERROR
 
- LIMA_PP_ORIGIN_OFFSET_X
 
- LIMA_PP_PERFMON_BASE
 
- LIMA_PP_PERFMON_CONTR
 
- LIMA_PP_PERF_CNT_0_ENABLE
 
- LIMA_PP_PERF_CNT_0_LIMIT
 
- LIMA_PP_PERF_CNT_0_SRC
 
- LIMA_PP_PERF_CNT_0_VALUE
 
- LIMA_PP_PERF_CNT_1_ENABLE
 
- LIMA_PP_PERF_CNT_1_LIMIT
 
- LIMA_PP_PERF_CNT_1_SRC
 
- LIMA_PP_PERF_CNT_1_VALUE
 
- LIMA_PP_RSW
 
- LIMA_PP_STACK
 
- LIMA_PP_STACK_SIZE
 
- LIMA_PP_STATUS
 
- LIMA_PP_STATUS_BUS_STOPPED
 
- LIMA_PP_STATUS_RENDERING_ACTIVE
 
- LIMA_PP_VERSION
 
- LIMA_PP_WB
 
- LIMA_PP_WB_REG_NUM
 
- LIMA_PP_WB_SOURCE_ADDR
 
- LIMA_PP_WB_SOURCE_SELECT
 
- LIMA_PP_WRITE_BOUNDARY_LOW
 
- LIMA_PTE
 
- LIMA_SCHED_PIPE_MAX_L2_CACHE
 
- LIMA_SCHED_PIPE_MAX_MMU
 
- LIMA_SCHED_PIPE_MAX_PROCESSOR
 
- LIMA_SUBMIT_BO_READ
 
- LIMA_SUBMIT_BO_WRITE
 
- LIMA_SUBMIT_FLAG_EXPLICIT_FENCE
 
- LIMA_VA_RESERVE_DLBU
 
- LIMA_VA_RESERVE_END
 
- LIMA_VA_RESERVE_START
 
- LIMA_VM_BT_MASK
 
- LIMA_VM_BT_SHIFT
 
- LIMA_VM_FLAGS_CACHE
 
- LIMA_VM_FLAGS_UNCACHE
 
- LIMA_VM_FLAG_MASK
 
- LIMA_VM_FLAG_OVERRIDE_CACHE
 
- LIMA_VM_FLAG_PRESENT
 
- LIMA_VM_FLAG_READ_ALLOCATE
 
- LIMA_VM_FLAG_READ_CACHEABLE
 
- LIMA_VM_FLAG_READ_PERMISSION
 
- LIMA_VM_FLAG_WRITE_ALLOCATE
 
- LIMA_VM_FLAG_WRITE_BUFFERABLE
 
- LIMA_VM_FLAG_WRITE_CACHEABLE
 
- LIMA_VM_FLAG_WRITE_PERMISSION
 
- LIMA_VM_NUM_BT
 
- LIMA_VM_NUM_PT_PER_BT
 
- LIMA_VM_NUM_PT_PER_BT_SHIFT
 
- LIMA_VM_PB_SHIFT
 
- LIMA_VM_PD_SHIFT
 
- LIMA_VM_PT_MASK
 
- LIMA_VM_PT_SHIFT
 
- LIMIT
 
- LIMITER_MODE
 
- LIMITMAX
 
- LIMITVALUE
 
- LIMIT_CNT
 
- LIMIT_FREE_BLOCK
 
- LIMIT_HIGH
 
- LIMIT_INVALID_BLOCK
 
- LIMIT_LOW
 
- LIMIT_MAX
 
- LIMIT_REFRESH_INTERVAL
 
- LIMIT_RGB
 
- LIMIT_SHIFT
 
- LIMIT_TO_MV
 
- LIM_MGMT_P_KEY
 
- LINCFG0
 
- LINCFG1
 
- LINCFR
 
- LINCR1
 
- LINCR2
 
- LINE
 
- LINE1
 
- LINE1IN
 
- LINE1L_2_LADC_CTRL
 
- LINE1L_2_RADC_CTRL
 
- LINE1OUT
 
- LINE1R_2_LADC_CTRL
 
- LINE1R_2_RADC_CTRL
 
- LINE1_ADC_IN_LOCAL
 
- LINE1_ADC_IN_MUTE
 
- LINE1_ADC_IN_REMOTE
 
- LINE1_DAC_OUT_BOTH
 
- LINE1_DAC_OUT_LOCAL
 
- LINE1_DAC_OUT_MUTE
 
- LINE1_DAC_OUT_REMOTE
 
- LINE2
 
- LINE2IN
 
- LINE2L_2_HPLCOM_VOL
 
- LINE2L_2_HPLOUT_VOL
 
- LINE2L_2_HPRCOM_VOL
 
- LINE2L_2_HPROUT_VOL
 
- LINE2L_2_LADC_CTRL
 
- LINE2L_2_LLOPM_VOL
 
- LINE2L_2_MONOLOPM_VOL
 
- LINE2L_2_RLOPM_VOL
 
- LINE2OUT
 
- LINE2R_2_HPLCOM_VOL
 
- LINE2R_2_HPLOUT_VOL
 
- LINE2R_2_HPRCOM_VOL
 
- LINE2R_2_HPROUT_VOL
 
- LINE2R_2_LLOPM_VOL
 
- LINE2R_2_MONOLOPM_VOL
 
- LINE2R_2_RADC_CTRL
 
- LINE2R_2_RLOPM_VOL
 
- LINE2_DAC_IN_LOCAL
 
- LINE2_DAC_IN_MUTE
 
- LINE2_DAC_IN_REMOTE
 
- LINE2_DAC_OUT_BOTH
 
- LINE2_DAC_OUT_LOCAL
 
- LINE2_DAC_OUT_MUTE
 
- LINE2_DAC_OUT_REMOTE
 
- LINE2_LEFT
 
- LINE6_BASSPODXT
 
- LINE6_BASSPODXTLIVE
 
- LINE6_BASSPODXTPRO
 
- LINE6_BUFSIZE_LISTEN
 
- LINE6_CAP_CONTROL
 
- LINE6_CAP_CONTROL_INFO
 
- LINE6_CAP_CONTROL_MIDI
 
- LINE6_CAP_HWMON
 
- LINE6_CAP_IN_NEEDS_OUT
 
- LINE6_CAP_PCM
 
- LINE6_CHANNEL_DEVICE
 
- LINE6_CHANNEL_HOST
 
- LINE6_CHANNEL_MASK
 
- LINE6_CHANNEL_UNKNOWN
 
- LINE6_DEVICE
 
- LINE6_FALLBACK_INTERVAL
 
- LINE6_FALLBACK_MAXPACKETSIZE
 
- LINE6_FLAG_PAUSE_PLAYBACK
 
- LINE6_FLAG_PREPARED
 
- LINE6_GUITARPORT
 
- LINE6_IF_NUM
 
- LINE6_IMPULSE_DEFAULT_PERIOD
 
- LINE6_ISO_INTERVAL
 
- LINE6_ISO_PACKETS
 
- LINE6_MIDI_MESSAGE_MAXLEN
 
- LINE6_PARAM_CHANGE
 
- LINE6_POCKETPOD
 
- LINE6_PODHD300
 
- LINE6_PODHD400
 
- LINE6_PODHD500
 
- LINE6_PODHD500X
 
- LINE6_PODHDDESKTOP
 
- LINE6_PODSTUDIO_GX
 
- LINE6_PODSTUDIO_UX1
 
- LINE6_PODSTUDIO_UX2
 
- LINE6_PODX3
 
- LINE6_PODX3LIVE
 
- LINE6_PODXT
 
- LINE6_PODXTLIVE_POD
 
- LINE6_PODXTLIVE_VARIAX
 
- LINE6_PODXTPRO
 
- LINE6_PROGRAM_CHANGE
 
- LINE6_RAW_MESSAGES_MAXCOUNT
 
- LINE6_RAW_MESSAGES_MAXCOUNT_ORDER
 
- LINE6_READ_WRITE_MAX_RETRIES
 
- LINE6_READ_WRITE_STATUS_DELAY
 
- LINE6_RESET
 
- LINE6_STREAM_CAPTURE_HELPER
 
- LINE6_STREAM_IMPULSE
 
- LINE6_STREAM_MONITOR
 
- LINE6_STREAM_PCM
 
- LINE6_SYSEX_BEGIN
 
- LINE6_SYSEX_END
 
- LINE6_TIMEOUT
 
- LINE6_TONEPORT_GX
 
- LINE6_TONEPORT_UX1
 
- LINE6_TONEPORT_UX2
 
- LINE6_VARIAX
 
- LINEAR
 
- LINEAR_16BIT
 
- LINEAR_8BIT
 
- LINEAR_GRADIENT_ENA
 
- LINEAR_INDEX
 
- LINEAR_MAP_REGION_ID
 
- LINEAR_MODE
 
- LINEAR_MODE_ENABLE
 
- LINEBITS
 
- LINEBUF_SIZE
 
- LINECNT_OP_THRESHOLD
 
- LINEIM
 
- LINEINITCNT
 
- LINENO
 
- LINEO1
 
- LINEO2
 
- LINEO3
 
- LINEO4
 
- LINEO_INTERFACE_CLASS
 
- LINEO_INTERFACE_SUBCLASS_SAFENET
 
- LINEO_INTERFACE_SUBCLASS_SAFESERIAL
 
- LINEO_SAFENET_CRC
 
- LINEO_SAFENET_CRC_PADDED
 
- LINEO_SAFESERIAL_CRC
 
- LINEO_SAFESERIAL_CRC_PADDED
 
- LINESIZE
 
- LINESR
 
- LINESTATE
 
- LINESTAT_ABORT_DET
 
- LINESTAT_ACK_DET
 
- LINESTAT_ACK_OR_NACK_DET
 
- LINESTAT_BUS_IDLE
 
- LINESTAT_CLEAR_SHIFT
 
- LINESTAT_DET_ACK_STATUS
 
- LINESTAT_DET_NACK_STATUS
 
- LINESTAT_DET_START_STATUS
 
- LINESTAT_DET_STOP_STATUS
 
- LINESTAT_GEN_LINE_MASK_STATUS
 
- LINESTAT_INPUT_DATA
 
- LINESTAT_INPUT_DATA_SHIFT
 
- LINESTAT_INPUT_HELD_V
 
- LINESTAT_LATCHED
 
- LINESTAT_NACK_DET
 
- LINESTAT_SCLK_EN
 
- LINESTAT_SCLK_LINE_STATUS
 
- LINESTAT_SCLK_OUT_STATUS
 
- LINESTAT_SDAT_EN
 
- LINESTAT_SDAT_LINE_STATUS
 
- LINESTAT_SDAT_OUT_STATUS
 
- LINESTAT_START_BIT_DET
 
- LINESTAT_STOP_BIT_DET
 
- LINESTAT_T_DONE_STATUS
 
- LINESTRIP
 
- LINESZ
 
- LINES_PER_BUFFER
 
- LINE_BUFSIZE
 
- LINE_BUFSZ
 
- LINE_COLOR
 
- LINE_CONNECTOR
 
- LINE_CONTROL
 
- LINE_CONTROL_REGISTER
 
- LINE_DELAY
 
- LINE_FLAG_INTR
 
- LINE_FLAG_INTR_CLR
 
- LINE_FLAG_INTR_EN
 
- LINE_FLAG_INTR_MASK
 
- LINE_FORMAT
 
- LINE_FORMAT_DEPTH16
 
- LINE_FORMAT_DEPTH24
 
- LINE_FORMAT_DEPTH8
 
- LINE_GROWTH
 
- LINE_INA
 
- LINE_INB
 
- LINE_IP0
 
- LINE_IP1
 
- LINE_IP2
 
- LINE_IP3
 
- LINE_IP4
 
- LINE_IP5
 
- LINE_IP6
 
- LINE_LEN
 
- LINE_LENGTH_PCK_HI
 
- LINE_LENGTH_PCK_LO
 
- LINE_LINES
 
- LINE_LINES_POINT0_X
 
- LINE_LINES_POINT0_Y
 
- LINE_LINES_POINT1_X
 
- LINE_LINES_POINT1_Y
 
- LINE_MASK
 
- LINE_MAX_LINES
 
- LINE_MIC_IN
 
- LINE_MODE_CHIP_NAME
 
- LINE_MODE_CODEC
 
- LINE_MODE_HINT
 
- LINE_MODE_MODEL
 
- LINE_MODE_NONE
 
- LINE_MODE_PINCFG
 
- LINE_MODE_REVISION_ID
 
- LINE_MODE_SUBSYSTEM_ID
 
- LINE_MODE_VENDOR_ID
 
- LINE_MODE_VERB
 
- LINE_OP0
 
- LINE_OP1
 
- LINE_OP2
 
- LINE_OP3
 
- LINE_OP4
 
- LINE_OP5
 
- LINE_OP6
 
- LINE_OP7
 
- LINE_POLARITIES
 
- LINE_POS
 
- LINE_RATE_E1
 
- LINE_RATE_T1
 
- LINE_SAMPLES
 
- LINE_SIZE
 
- LINE_SIZE_D1
 
- LINE_STATE
 
- LINE_STATE_FILTER__EN
 
- LINE_STATUS
 
- LINE_STATUS_REGISTER
 
- LINE_SZ_1CIFS_NTSC
 
- LINE_SZ_1CIFS_PAL
 
- LINE_SZ_2CIFS_NTSC
 
- LINE_SZ_2CIFS_PAL
 
- LINE_SZ_4CIFS_NTSC
 
- LINE_SZ_4CIFS_PAL
 
- LINE_SZ_DEF
 
- LINE_USED
 
- LINE_VAL
 
- LINE_VALID_ON_STATUS_VALID_BIT
 
- LINFBRR
 
- LINFLEXD_LINCR1_BF
 
- LINFLEXD_LINCR1_INIT
 
- LINFLEXD_LINCR1_MME
 
- LINFLEXD_LINIER_BEIE
 
- LINFLEXD_LINIER_BOIE
 
- LINFLEXD_LINIER_CEIE
 
- LINFLEXD_LINIER_DBEIETOIE
 
- LINFLEXD_LINIER_DBFIE
 
- LINFLEXD_LINIER_DRIE
 
- LINFLEXD_LINIER_DTIE
 
- LINFLEXD_LINIER_FEIE
 
- LINFLEXD_LINIER_HEIE
 
- LINFLEXD_LINIER_HRIE
 
- LINFLEXD_LINIER_LSIE
 
- LINFLEXD_LINIER_OCIE
 
- LINFLEXD_LINIER_SZIE
 
- LINFLEXD_LINIER_WUIE
 
- LINFLEXD_LINSR_LINS_INITMODE
 
- LINFLEXD_LINSR_LINS_MASK
 
- LINFLEXD_UARTCR_OSR
 
- LINFLEXD_UARTCR_OSR_MASK
 
- LINFLEXD_UARTCR_PC0
 
- LINFLEXD_UARTCR_PC1
 
- LINFLEXD_UARTCR_PCE
 
- LINFLEXD_UARTCR_RFBM
 
- LINFLEXD_UARTCR_ROSE
 
- LINFLEXD_UARTCR_RXEN
 
- LINFLEXD_UARTCR_TFBM
 
- LINFLEXD_UARTCR_TXEN
 
- LINFLEXD_UARTCR_UART
 
- LINFLEXD_UARTCR_WL0
 
- LINFLEXD_UARTCR_WL1
 
- LINFLEXD_UARTSR_4
 
- LINFLEXD_UARTSR_BOF
 
- LINFLEXD_UARTSR_DRFRFE
 
- LINFLEXD_UARTSR_DTFTFF
 
- LINFLEXD_UARTSR_FEF
 
- LINFLEXD_UARTSR_NF
 
- LINFLEXD_UARTSR_OCF
 
- LINFLEXD_UARTSR_PE
 
- LINFLEXD_UARTSR_PE0
 
- LINFLEXD_UARTSR_PE1
 
- LINFLEXD_UARTSR_PE2
 
- LINFLEXD_UARTSR_PE3
 
- LINFLEXD_UARTSR_RMB
 
- LINFLEXD_UARTSR_RPS
 
- LINFLEXD_UARTSR_SZF
 
- LINFLEXD_UARTSR_TO
 
- LINFLEXD_UARTSR_WUF
 
- LINFLEX_CONSOLE
 
- LINFLEX_LDIV_MULTIPLIER
 
- LINFO
 
- LINIBRR
 
- LINIER
 
- LINK
 
- LINKCFG
 
- LINKCFG1
 
- LINKCFG2
 
- LINKCHANGE_INT
 
- LINKCNT_ICLK_NONSTOP
 
- LINKCNT_MONITOR_EN
 
- LINKCNT_REG
 
- LINKCNT_REG_MONI_PACT_EN
 
- LINKCTRL_CRC_ERR
 
- LINKCTRL_LINK_FAIL
 
- LINKED
 
- LINKED_CMD_COMPLETE
 
- LINKED_FLG_CMD_COMPLETE
 
- LINKED_PAGE_DATA_SIZE
 
- LINKED_TO
 
- LINKENA
 
- LINKERR_EOC_ERR
 
- LINKERR_OVF_ERR
 
- LINKERR_PROT_ERR
 
- LINKEVENT_AUTONEG_DISABLED
 
- LINKEVENT_AUTONEG_ENABLED
 
- LINKEVENT_FULL_DUPLEX
 
- LINKEVENT_HALF_DUPLEX
 
- LINKEVENT_LINKSPEED_ENCODED
 
- LINKEVENT_LINKSPEED_MBPS
 
- LINKEVENT_MODULE_NOT_PRESENT
 
- LINKEVENT_MODULE_OPTICAL_LRM
 
- LINKEVENT_MODULE_OPTICAL_SFP_1G
 
- LINKEVENT_MODULE_OPTICAL_SRLR
 
- LINKEVENT_MODULE_OPTICAL_UNKNOWN
 
- LINKEVENT_MODULE_TWINAX
 
- LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE
 
- LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN
 
- LINKIE
 
- LINKIF
 
- LINKLED_BLINK_OFF
 
- LINKLED_BLINK_ON
 
- LINKLED_LINKSYNC_OFF
 
- LINKLED_LINKSYNC_ON
 
- LINKLED_OFF
 
- LINKLED_ON
 
- LINKLOCAL_MULTICAST
 
- LINKLOSS
 
- LINKMODE_AUTO
 
- LINKMODE_DSATA
 
- LINKMODE_SAS
 
- LINKON
 
- LINKRATE_120
 
- LINKRATE_15
 
- LINKRATE_30
 
- LINKRATE_60
 
- LINKSPEED_100MBPS
 
- LINKSPEED_10GBPS
 
- LINKSPEED_10MBPS
 
- LINKSPEED_1GBPS
 
- LINKSPEED_ENCODED_100MBPS
 
- LINKSPEED_ENCODED_10MBPS
 
- LINKSPEED_ENCODED_1GBPS
 
- LINKSTAT
 
- LINKSTATUS
 
- LINKSTATUS1
 
- LINKSYSTEM_FLADJ
 
- LINKSYSTEM_FLADJ_MASK
 
- LINKSYSTEM_XHCI_VERSION_CONTROL
 
- LINKSYS_USB_DEVICE
 
- LINKSYS_VENDOR_ID
 
- LINKS_PER_OCP_IF
 
- LINKUP_ACHIEVED
 
- LINK_1000TFD
 
- LINK_1000THD
 
- LINK_1000XFD
 
- LINK_100T4
 
- LINK_100TXFD
 
- LINK_100TXHD
 
- LINK_10GTFD
 
- LINK_10GXFD
 
- LINK_10TFD
 
- LINK_10THD
 
- LINK_20GTFD
 
- LINK_20GXFD
 
- LINK_2500TFD
 
- LINK_2500THD
 
- LINK_2500XFD
 
- LINK_ATTR_84858
 
- LINK_ATTR_SYNC_KR2_ENABLE
 
- LINK_AUTH_STATUS
 
- LINK_AUTONEGOTIATE
 
- LINK_CALIBRATION_MASK
 
- LINK_CALIBRATION_SHIFT
 
- LINK_CAP2__CROSSLINK_SUPPORTED_MASK
 
- LINK_CAP2__CROSSLINK_SUPPORTED__MASK
 
- LINK_CAP2__CROSSLINK_SUPPORTED__SHIFT
 
- LINK_CAP2__RESERVED_MASK
 
- LINK_CAP2__RESERVED__MASK
 
- LINK_CAP2__RESERVED__SHIFT
 
- LINK_CAP2__SUPPORTED_LINK_SPEED_MASK
 
- LINK_CAP2__SUPPORTED_LINK_SPEED__MASK
 
- LINK_CAP2__SUPPORTED_LINK_SPEED__SHIFT
 
- LINK_CAPABLE_MASK
 
- LINK_CAPABLE_X1
 
- LINK_CAP__ASPM_OPTIONALITY_COMPLIANCE_MASK
 
- LINK_CAP__ASPM_OPTIONALITY_COMPLIANCE__MASK
 
- LINK_CAP__ASPM_OPTIONALITY_COMPLIANCE__SHIFT
 
- LINK_CAP__CLOCK_POWER_MANAGEMENT_MASK
 
- LINK_CAP__CLOCK_POWER_MANAGEMENT__MASK
 
- LINK_CAP__CLOCK_POWER_MANAGEMENT__SHIFT
 
- LINK_CAP__DL_ACTIVE_REPORTING_CAPABLE_MASK
 
- LINK_CAP__DL_ACTIVE_REPORTING_CAPABLE__MASK
 
- LINK_CAP__DL_ACTIVE_REPORTING_CAPABLE__SHIFT
 
- LINK_CAP__L0S_EXIT_LATENCY_MASK
 
- LINK_CAP__L0S_EXIT_LATENCY__MASK
 
- LINK_CAP__L0S_EXIT_LATENCY__SHIFT
 
- LINK_CAP__L1_EXIT_LATENCY_MASK
 
- LINK_CAP__L1_EXIT_LATENCY__MASK
 
- LINK_CAP__L1_EXIT_LATENCY__SHIFT
 
- LINK_CAP__LINK_BW_NOTIFICATION_CAP_MASK
 
- LINK_CAP__LINK_BW_NOTIFICATION_CAP__MASK
 
- LINK_CAP__LINK_BW_NOTIFICATION_CAP__SHIFT
 
- LINK_CAP__LINK_SPEED_MASK
 
- LINK_CAP__LINK_SPEED__MASK
 
- LINK_CAP__LINK_SPEED__SHIFT
 
- LINK_CAP__LINK_WIDTH_MASK
 
- LINK_CAP__LINK_WIDTH__MASK
 
- LINK_CAP__LINK_WIDTH__SHIFT
 
- LINK_CAP__PM_SUPPORT_MASK
 
- LINK_CAP__PM_SUPPORT__MASK
 
- LINK_CAP__PM_SUPPORT__SHIFT
 
- LINK_CAP__PORT_NUMBER_MASK
 
- LINK_CAP__PORT_NUMBER__MASK
 
- LINK_CAP__PORT_NUMBER__SHIFT
 
- LINK_CAP__SURPRISE_DOWN_ERR_REPORTING_MASK
 
- LINK_CAP__SURPRISE_DOWN_ERR_REPORTING__MASK
 
- LINK_CAP__SURPRISE_DOWN_ERR_REPORTING__SHIFT
 
- LINK_CHANGED
 
- LINK_CHANGE_COUNT_MASK
 
- LINK_CHANGE_FLAG
 
- LINK_CHG_EVENT
 
- LINK_CNTL2
 
- LINK_CNTL2__COMPLIANCE_DEEMPHASIS_MASK
 
- LINK_CNTL2__COMPLIANCE_DEEMPHASIS__MASK
 
- LINK_CNTL2__COMPLIANCE_DEEMPHASIS__SHIFT
 
- LINK_CNTL2__COMPLIANCE_SOS_MASK
 
- LINK_CNTL2__COMPLIANCE_SOS__MASK
 
- LINK_CNTL2__COMPLIANCE_SOS__SHIFT
 
- LINK_CNTL2__ENTER_COMPLIANCE_MASK
 
- LINK_CNTL2__ENTER_COMPLIANCE__MASK
 
- LINK_CNTL2__ENTER_COMPLIANCE__SHIFT
 
- LINK_CNTL2__ENTER_MOD_COMPLIANCE_MASK
 
- LINK_CNTL2__ENTER_MOD_COMPLIANCE__MASK
 
- LINK_CNTL2__ENTER_MOD_COMPLIANCE__SHIFT
 
- LINK_CNTL2__HW_AUTONOMOUS_SPEED_DISABLE_MASK
 
- LINK_CNTL2__HW_AUTONOMOUS_SPEED_DISABLE__MASK
 
- LINK_CNTL2__HW_AUTONOMOUS_SPEED_DISABLE__SHIFT
 
- LINK_CNTL2__SELECTABLE_DEEMPHASIS_MASK
 
- LINK_CNTL2__SELECTABLE_DEEMPHASIS__MASK
 
- LINK_CNTL2__SELECTABLE_DEEMPHASIS__SHIFT
 
- LINK_CNTL2__TARGET_LINK_SPEED_MASK
 
- LINK_CNTL2__TARGET_LINK_SPEED__MASK
 
- LINK_CNTL2__TARGET_LINK_SPEED__SHIFT
 
- LINK_CNTL2__XMIT_MARGIN_MASK
 
- LINK_CNTL2__XMIT_MARGIN__MASK
 
- LINK_CNTL2__XMIT_MARGIN__SHIFT
 
- LINK_CNTL__CLOCK_POWER_MANAGEMENT_EN_MASK
 
- LINK_CNTL__CLOCK_POWER_MANAGEMENT_EN__MASK
 
- LINK_CNTL__CLOCK_POWER_MANAGEMENT_EN__SHIFT
 
- LINK_CNTL__COMMON_CLOCK_CFG_MASK
 
- LINK_CNTL__COMMON_CLOCK_CFG__MASK
 
- LINK_CNTL__COMMON_CLOCK_CFG__SHIFT
 
- LINK_CNTL__EXTENDED_SYNC_MASK
 
- LINK_CNTL__EXTENDED_SYNC__MASK
 
- LINK_CNTL__EXTENDED_SYNC__SHIFT
 
- LINK_CNTL__HW_AUTONOMOUS_WIDTH_DISABLE_MASK
 
- LINK_CNTL__HW_AUTONOMOUS_WIDTH_DISABLE__MASK
 
- LINK_CNTL__HW_AUTONOMOUS_WIDTH_DISABLE__SHIFT
 
- LINK_CNTL__LINK_AUTONOMOUS_BW_INT_EN_MASK
 
- LINK_CNTL__LINK_AUTONOMOUS_BW_INT_EN__MASK
 
- LINK_CNTL__LINK_AUTONOMOUS_BW_INT_EN__SHIFT
 
- LINK_CNTL__LINK_BW_MANAGEMENT_INT_EN_MASK
 
- LINK_CNTL__LINK_BW_MANAGEMENT_INT_EN__MASK
 
- LINK_CNTL__LINK_BW_MANAGEMENT_INT_EN__SHIFT
 
- LINK_CNTL__LINK_DIS_MASK
 
- LINK_CNTL__LINK_DIS__MASK
 
- LINK_CNTL__LINK_DIS__SHIFT
 
- LINK_CNTL__PM_CONTROL_MASK
 
- LINK_CNTL__PM_CONTROL__MASK
 
- LINK_CNTL__PM_CONTROL__SHIFT
 
- LINK_CNTL__READ_CPL_BOUNDARY_MASK
 
- LINK_CNTL__READ_CPL_BOUNDARY__MASK
 
- LINK_CNTL__READ_CPL_BOUNDARY__SHIFT
 
- LINK_CNTL__RETRAIN_LINK_MASK
 
- LINK_CNTL__RETRAIN_LINK__MASK
 
- LINK_CNTL__RETRAIN_LINK__SHIFT
 
- LINK_CONFIG
 
- LINK_CONFIG_IDX
 
- LINK_CONFIG_SIZE
 
- LINK_CONTROL
 
- LINK_CONTROL_BUSY
 
- LINK_CONTROL_CYCMASTER
 
- LINK_CONTROL_CYCSOURCE
 
- LINK_CONTROL_CYCTIMEREN
 
- LINK_CONTROL_RCV_CMP_VALID
 
- LINK_CONTROL_RESET_RX
 
- LINK_CONTROL_RESET_TX
 
- LINK_CONTROL_RX_ASYNC_EN
 
- LINK_CONTROL_RX_ISO_EN
 
- LINK_CONTROL_SNOOP_ENABLE
 
- LINK_CONTROL_TX_ASYNC_EN
 
- LINK_CONTROL_TX_ISO_EN
 
- LINK_CTRL_EXT_SYNC
 
- LINK_CTRL_L0S_EN
 
- LINK_CTRL_L1_EN
 
- LINK_DFX2
 
- LINK_DFX2_RCVR_HOLD_STS_MSK
 
- LINK_DFX2_RCVR_HOLD_STS_OFF
 
- LINK_DFX2_SEND_HOLD_STS_MSK
 
- LINK_DFX2_SEND_HOLD_STS_OFF
 
- LINK_DISABLED
 
- LINK_DOWN
 
- LINK_DOWN_EVENT
 
- LINK_DOWN_FLAG
 
- LINK_DOWN_INT
 
- LINK_DOWN_INT_EN
 
- LINK_DOWN_REASON
 
- LINK_EN
 
- LINK_ENABLE_BIT
 
- LINK_ENCODER_H_
 
- LINK_ENCODER_MASK_SH_LIST_DCN10
 
- LINK_ENCODER_MASK_SH_LIST_DCN20
 
- LINK_ENCRYPTION_STATUS
 
- LINK_ENTER_ULPS
 
- LINK_ERROR_COUNT
 
- LINK_ESTABLISHED
 
- LINK_ESTABLISHING
 
- LINK_ESTABLISH_EVT
 
- LINK_FAILINGOVER
 
- LINK_FAILOVER_BEGIN_EVT
 
- LINK_FAILOVER_END_EVT
 
- LINK_FAILURE_EVT
 
- LINK_FAIL_CODE_OFFSET
 
- LINK_FAIL_THRESH
 
- LINK_FAULT
 
- LINK_FAULT_CNT
 
- LINK_FAULT_CNT_COUNT
 
- LINK_FLAGS_INT_DISABLED
 
- LINK_FLAP_AVOIDANCE_COUNT_MASK
 
- LINK_FLAP_AVOIDANCE_COUNT_OFFSET
 
- LINK_FLAP_COUNT_MASK
 
- LINK_FLAP_COUNT_OFFSET
 
- LINK_FORCED_DOWN
 
- LINK_FORCED_UP
 
- LINK_GOING_DOWN
 
- LINK_HZ
 
- LINK_ID
 
- LINK_ID_BUS
 
- LINK_ID_NODE
 
- LINK_INFO
 
- LINK_INT_ATF_UNDER_FLOW
 
- LINK_INT_AT_STUCK
 
- LINK_INT_CYC_ARB_FAILED
 
- LINK_INT_CYC_DONE
 
- LINK_INT_CYC_LOST
 
- LINK_INT_CYC_PEND
 
- LINK_INT_CYC_SEC
 
- LINK_INT_CYC_STRT
 
- LINK_INT_ENABLE
 
- LINK_INT_GRF_OVER_FLOW
 
- LINK_INT_HDR_ERR
 
- LINK_INT_IARB_FAILED
 
- LINK_INT_ITF_UNDER_FLOW
 
- LINK_INT_IT_STUCK
 
- LINK_INT_LINK_INT
 
- LINK_INT_PHY_BUSRESET
 
- LINK_INT_PHY_REG_RCVD
 
- LINK_INT_PHY_TIME_OUT
 
- LINK_INT_RX_DATA_RDY
 
- LINK_INT_SNTRJ
 
- LINK_INT_STATUS
 
- LINK_INT_TC_ERR
 
- LINK_INT_TX_RDY
 
- LINK_INT_WORKING
 
- LINK_IN_ULPS
 
- LINK_IS_UP
 
- LINK_LAYER_STATS_MEAS
 
- LINK_LED_WORK_DELAY
 
- LINK_LIST_RDY
 
- LINK_LIST_READY
 
- LINK_LMAX
 
- LINK_LMIN
 
- LINK_MAX
 
- LINK_MESSAGE
 
- LINK_OFF
 
- LINK_OFF_WAKE_EN
 
- LINK_OK
 
- LINK_ON_WAKE_EN
 
- LINK_OPTIMIZATION_SETTINGS
 
- LINK_PARTNER_ACK_INT
 
- LINK_PEER_RESET
 
- LINK_PEER_RESET_EVT
 
- LINK_PHY
 
- LINK_PHY_ADDR
 
- LINK_PHY_RADDR
 
- LINK_PHY_READ
 
- LINK_PHY_WDATA
 
- LINK_PHY_WRITE
 
- LINK_PROTOCOL
 
- LINK_Q
 
- LINK_QUALITY_INFO
 
- LINK_QUALITY_MASK
 
- LINK_QUALITY_SHIFT
 
- LINK_QUAL_AC_NUM
 
- LINK_QUAL_AGG_DISABLE_START_DEF
 
- LINK_QUAL_AGG_DISABLE_START_MAX
 
- LINK_QUAL_AGG_DISABLE_START_MIN
 
- LINK_QUAL_AGG_FRAME_LIMIT_DEF
 
- LINK_QUAL_AGG_FRAME_LIMIT_GEN2_DEF
 
- LINK_QUAL_AGG_FRAME_LIMIT_GEN2_MAX
 
- LINK_QUAL_AGG_FRAME_LIMIT_MAX
 
- LINK_QUAL_AGG_FRAME_LIMIT_MIN
 
- LINK_QUAL_AGG_TIME_LIMIT_BT_ACT
 
- LINK_QUAL_AGG_TIME_LIMIT_DEF
 
- LINK_QUAL_AGG_TIME_LIMIT_MAX
 
- LINK_QUAL_AGG_TIME_LIMIT_MIN
 
- LINK_QUAL_ANT_A_MSK
 
- LINK_QUAL_ANT_B_MSK
 
- LINK_QUAL_ANT_MSK
 
- LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK
 
- LINK_QUAL_MAX_RETRY_NUM
 
- LINK_QUAL_PATTERN_SET_D10_2
 
- LINK_QUAL_PATTERN_SET_DISABLE
 
- LINK_QUAL_PATTERN_SET_MASK
 
- LINK_QUAL_PATTERN_SET_PRBS7
 
- LINK_RATE_HIGH
 
- LINK_RATE_HIGH2
 
- LINK_RATE_HIGH3
 
- LINK_RATE_LOW
 
- LINK_RATE_RATE_2
 
- LINK_RATE_RATE_3
 
- LINK_RATE_RATE_6
 
- LINK_RATE_RBR2
 
- LINK_RATE_REF_FREQ_IN_KHZ
 
- LINK_RATE_UNKNOWN
 
- LINK_RDY_INT
 
- LINK_RDY_INT_EN
 
- LINK_READY
 
- LINK_REQ_RST
 
- LINK_RESET
 
- LINK_RESETTING
 
- LINK_RESET_COMPLETE
 
- LINK_RESET_ERROR
 
- LINK_RESET_EVT
 
- LINK_RESET_INVALID
 
- LINK_RESET_REQUIRED
 
- LINK_RESTART_DELAY
 
- LINK_RETRAIN_TIMEOUT
 
- LINK_SERVICE_BUFFER_POST_FLAGS_PORT_MASK
 
- LINK_SERVICE_RSP_FLAGS_IMMEDIATE
 
- LINK_SERVICE_RSP_FLAGS_PORT_MASK
 
- LINK_SFP_EEPROM_COMP_CODE_LR
 
- LINK_SFP_EEPROM_COMP_CODE_LRM
 
- LINK_SFP_EEPROM_COMP_CODE_MASK
 
- LINK_SFP_EEPROM_COMP_CODE_SHIFT
 
- LINK_SFP_EEPROM_COMP_CODE_SR
 
- LINK_SPACE
 
- LINK_SPEED
 
- LINK_SPEED_12_5G
 
- LINK_SPEED_25G
 
- LINK_SPEED_2_5GTS
 
- LINK_SPEED_5_0GTS
 
- LINK_SPEED_SUPP_12G
 
- LINK_SPEED_SUPP_12G_25G
 
- LINK_SPEED_SUPP_25G
 
- LINK_SPEED_SUPP_MAX
 
- LINK_SPREAD_05_DOWNSPREAD_30KHZ
 
- LINK_SPREAD_05_DOWNSPREAD_33KHZ
 
- LINK_SPREAD_DISABLED
 
- LINK_STATE_INDICATION
 
- LINK_STATS
 
- LINK_STATUS
 
- LINK_STATUS2__CUR_DEEMPHASIS_LEVEL_MASK
 
- LINK_STATUS2__CUR_DEEMPHASIS_LEVEL__MASK
 
- LINK_STATUS2__CUR_DEEMPHASIS_LEVEL__SHIFT
 
- LINK_STATUS2__EQUALIZATION_COMPLETE_MASK
 
- LINK_STATUS2__EQUALIZATION_COMPLETE__MASK
 
- LINK_STATUS2__EQUALIZATION_COMPLETE__SHIFT
 
- LINK_STATUS2__EQUALIZATION_PHASE1_SUCCESS_MASK
 
- LINK_STATUS2__EQUALIZATION_PHASE1_SUCCESS__MASK
 
- LINK_STATUS2__EQUALIZATION_PHASE1_SUCCESS__SHIFT
 
- LINK_STATUS2__EQUALIZATION_PHASE2_SUCCESS_MASK
 
- LINK_STATUS2__EQUALIZATION_PHASE2_SUCCESS__MASK
 
- LINK_STATUS2__EQUALIZATION_PHASE2_SUCCESS__SHIFT
 
- LINK_STATUS2__EQUALIZATION_PHASE3_SUCCESS_MASK
 
- LINK_STATUS2__EQUALIZATION_PHASE3_SUCCESS__MASK
 
- LINK_STATUS2__EQUALIZATION_PHASE3_SUCCESS__SHIFT
 
- LINK_STATUS2__LINK_EQUALIZATION_REQUEST_MASK
 
- LINK_STATUS2__LINK_EQUALIZATION_REQUEST__MASK
 
- LINK_STATUS2__LINK_EQUALIZATION_REQUEST__SHIFT
 
- LINK_STATUS_AUTO_NEGOTIATE_COMPLETE
 
- LINK_STATUS_AUTO_NEGOTIATE_ENABLED
 
- LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK
 
- LINK_STATUS_CHANGE
 
- LINK_STATUS_LINK_FLAG_MASK
 
- LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_100G_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_100T4_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_10G_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_10THD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_20GXFD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_20G_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_2500XHD_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_25G_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_40G_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_50G_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE
 
- LINK_STATUS_LINK_PARTNER_BOTH_PAUSE
 
- LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK
 
- LINK_STATUS_LINK_PARTNER_NOT_PAUSE_CAPABLE
 
- LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE
 
- LINK_STATUS_LINK_UP
 
- LINK_STATUS_MAC_LOCAL_FAULT
 
- LINK_STATUS_MAC_REMOTE_FAULT
 
- LINK_STATUS_MASK
 
- LINK_STATUS_NONE
 
- LINK_STATUS_OFFSET
 
- LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK
 
- LINK_STATUS_PARALLEL_DETECTION_USED
 
- LINK_STATUS_PFC_ENABLED
 
- LINK_STATUS_PHYSICAL_LINK_FLAG
 
- LINK_STATUS_RX_FLOW_CONTROL_ENABLED
 
- LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK
 
- LINK_STATUS_RX_SIGNAL_PRESENT
 
- LINK_STATUS_SERDES_LINK
 
- LINK_STATUS_SFP_TX_FAULT
 
- LINK_STATUS_SPEED_AND_DUPLEX_1000TFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_1000THD
 
- LINK_STATUS_SPEED_AND_DUPLEX_1000XFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_100G
 
- LINK_STATUS_SPEED_AND_DUPLEX_100T4
 
- LINK_STATUS_SPEED_AND_DUPLEX_100TXFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_100TXHD
 
- LINK_STATUS_SPEED_AND_DUPLEX_10G
 
- LINK_STATUS_SPEED_AND_DUPLEX_10GTFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_10GXFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_10TFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_10THD
 
- LINK_STATUS_SPEED_AND_DUPLEX_20G
 
- LINK_STATUS_SPEED_AND_DUPLEX_20GTFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_20GXFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_2500TFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_2500THD
 
- LINK_STATUS_SPEED_AND_DUPLEX_2500XFD
 
- LINK_STATUS_SPEED_AND_DUPLEX_25G
 
- LINK_STATUS_SPEED_AND_DUPLEX_40G
 
- LINK_STATUS_SPEED_AND_DUPLEX_50G
 
- LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE
 
- LINK_STATUS_SPEED_AND_DUPLEX_MASK
 
- LINK_STATUS_TX_FLOW_CONTROL_ENABLED
 
- LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK
 
- LINK_STATUS_UNSUPPORTED_SPD_REQ
 
- LINK_STATUS__CURRENT_LINK_SPEED_MASK
 
- LINK_STATUS__CURRENT_LINK_SPEED__MASK
 
- LINK_STATUS__CURRENT_LINK_SPEED__SHIFT
 
- LINK_STATUS__DL_ACTIVE_MASK
 
- LINK_STATUS__DL_ACTIVE__MASK
 
- LINK_STATUS__DL_ACTIVE__SHIFT
 
- LINK_STATUS__LINK_AUTONOMOUS_BW_STATUS_MASK
 
- LINK_STATUS__LINK_AUTONOMOUS_BW_STATUS__MASK
 
- LINK_STATUS__LINK_AUTONOMOUS_BW_STATUS__SHIFT
 
- LINK_STATUS__LINK_BW_MANAGEMENT_STATUS_MASK
 
- LINK_STATUS__LINK_BW_MANAGEMENT_STATUS__MASK
 
- LINK_STATUS__LINK_BW_MANAGEMENT_STATUS__SHIFT
 
- LINK_STATUS__LINK_TRAINING_MASK
 
- LINK_STATUS__LINK_TRAINING__MASK
 
- LINK_STATUS__LINK_TRAINING__SHIFT
 
- LINK_STATUS__NEGOTIATED_LINK_WIDTH_MASK
 
- LINK_STATUS__NEGOTIATED_LINK_WIDTH__MASK
 
- LINK_STATUS__NEGOTIATED_LINK_WIDTH__SHIFT
 
- LINK_STATUS__SLOT_CLOCK_CFG_MASK
 
- LINK_STATUS__SLOT_CLOCK_CFG__MASK
 
- LINK_STATUS__SLOT_CLOCK_CFG__SHIFT
 
- LINK_STS
 
- LINK_SYNCHING
 
- LINK_SYNCH_BEGIN_EVT
 
- LINK_SYNCH_END_EVT
 
- LINK_SYNC_ATTENTION_BIT_FUNC_0
 
- LINK_SYNC_ATTENTION_BIT_FUNC_1
 
- LINK_SYNC_ATTENTION_BIT_FUNC_2
 
- LINK_SYNC_ATTENTION_BIT_FUNC_3
 
- LINK_SYNC_ATTENTION_BIT_FUNC_4
 
- LINK_SYNC_ATTENTION_BIT_FUNC_5
 
- LINK_SYNC_ATTENTION_BIT_FUNC_6
 
- LINK_SYNC_ATTENTION_BIT_FUNC_7
 
- LINK_TEST_PATTERN_COLOR_RAMP
 
- LINK_TEST_PATTERN_COLOR_SQUARES
 
- LINK_TEST_PATTERN_NONE
 
- LINK_TEST_PATTERN_VERTICAL_BARS
 
- LINK_TIMEOUT
 
- LINK_TMR_H
 
- LINK_TMR_H_BASEX
 
- LINK_TMR_L
 
- LINK_TMR_L_BASEX
 
- LINK_TOGGLE
 
- LINK_TO_QH
 
- LINK_TO_TD
 
- LINK_TRAINING_ATTEMPTS
 
- LINK_TRAINING_CR_FAIL_LANE0
 
- LINK_TRAINING_CR_FAIL_LANE1
 
- LINK_TRAINING_CR_FAIL_LANE23
 
- LINK_TRAINING_EN
 
- LINK_TRAINING_EQ_FAIL_CR
 
- LINK_TRAINING_EQ_FAIL_EQ
 
- LINK_TRAINING_LQA_FAIL
 
- LINK_TRAINING_MAX_CR_RETRY
 
- LINK_TRAINING_MAX_RETRY_COUNT
 
- LINK_TRAINING_MAX_VERIFY_RETRY
 
- LINK_TRAINING_NOT_ACTIVE
 
- LINK_TRAINING_RESTART
 
- LINK_TRAINING_RETRY_DELAY
 
- LINK_TRAINING_RETRY_MS
 
- LINK_TRAINING_RUN
 
- LINK_TRAINING_SUCCESS
 
- LINK_TRAINING_TIMEOUT_MS
 
- LINK_TRANSITION_LINK_CONFIG
 
- LINK_TRANSITION_LINK_DOWN
 
- LINK_TRANSITION_LINK_UP
 
- LINK_TRANSITION_ON_FAILURE
 
- LINK_TRANSITION_REQUESTED_RESET
 
- LINK_TRANSITION_STILL_FAILED
 
- LINK_TRANSITION_UNKNOWN
 
- LINK_TUNE_INTERVAL
 
- LINK_TUNE_SECONDS
 
- LINK_TUNING_PARAMETERS
 
- LINK_TYPE_STATUS
 
- LINK_ULPS_TYPE_LP11
 
- LINK_UNFORCED
 
- LINK_UP
 
- LINK_UPDATE_MASK
 
- LINK_UP_COMP_TOV
 
- LINK_UP_DELAY
 
- LINK_UP_DOWN_INTERRUPT
 
- LINK_UP_EVENT
 
- LINK_UP_EVT
 
- LINK_UP_INT
 
- LINK_UP_MASK
 
- LINK_UP_TIMEOUT
 
- LINK_VALID
 
- LINK_WAIT_IATU
 
- LINK_WAIT_MAX
 
- LINK_WAIT_MAX_IATU_RETRIES
 
- LINK_WAIT_MAX_RETRIES
 
- LINK_WAIT_MIN
 
- LINK_WAIT_USLEEP_MAX
 
- LINK_WAIT_USLEEP_MIN
 
- LINK_WIDTH_DEFAULT
 
- LINK_WIDTH_DOWNGRADED
 
- LINK_WIDTH_MASK
 
- LINK_WIDTH_SHIFT
 
- LINK_WIDTH_SUPP_1X
 
- LINK_WIDTH_SUPP_2X
 
- LINK_WIDTH_SUPP_2X_1X
 
- LINK_WIDTH_SUPP_3X
 
- LINK_WIDTH_SUPP_3X_1X
 
- LINK_WIDTH_SUPP_3X_2X
 
- LINK_WIDTH_SUPP_3X_2X_1X
 
- LINK_WIDTH_SUPP_4X
 
- LINK_WIDTH_SUPP_4X_1X
 
- LINK_WIDTH_SUPP_4X_2X
 
- LINK_WIDTH_SUPP_4X_2X_1X
 
- LINK_WIDTH_SUPP_4X_3X
 
- LINK_WIDTH_SUPP_4X_3X_1X
 
- LINK_WIDTH_SUPP_4X_3X_2X
 
- LINK_WIDTH_SUPP_4X_3X_2X_1X
 
- LINK_WIDTH_SUPP_MAX
 
- LINK_XSTATS_TYPE_BOND
 
- LINK_XSTATS_TYPE_BRIDGE
 
- LINK_XSTATS_TYPE_MAX
 
- LINK_XSTATS_TYPE_UNSPEC
 
- LINOCR
 
- LINREG_VDDD
 
- LINSR
 
- LINTCSR
 
- LINTOCR
 
- LINT_EN
 
- LINT_MAP0
 
- LINT_MAP1
 
- LINT_MAP2
 
- LINT_MASK
 
- LINT_STAT
 
- LINT_USE
 
- LINUX
 
- LINUX_32BIT_SYSCALL_TRAP
 
- LINUX_64BIT_SYSCALL_TRAP
 
- LINUX_ADS1015_H
 
- LINUX_APPLE_GMUX_H
 
- LINUX_APP_BOOT_BLOCK_NAME
 
- LINUX_ATMCLIP_H
 
- LINUX_ATMDEV_H
 
- LINUX_ATM_ENI_H
 
- LINUX_ATM_HE_H
 
- LINUX_ATM_IDT77105_H
 
- LINUX_ATM_NICSTAR_H
 
- LINUX_ATM_SUNI_H
 
- LINUX_ATM_TCP_H
 
- LINUX_ATM_ZATM_H
 
- LINUX_B43_PHY_A_H_
 
- LINUX_B43_PHY_COMMON_H_
 
- LINUX_B43_PHY_G_H_
 
- LINUX_B43_PHY_LP_H_
 
- LINUX_B43_PPR_H_
 
- LINUX_BCM47XX_PRIVATE_H_
 
- LINUX_BCM47XX_WDT_H_
 
- LINUX_BCMA_DRIVER_ARM_C9_H_
 
- LINUX_BCMA_DRIVER_CC_H_
 
- LINUX_BCMA_DRIVER_GMAC_CMN_H_
 
- LINUX_BCMA_DRIVER_MIPS_H_
 
- LINUX_BCMA_DRIVER_PCIE2_H_
 
- LINUX_BCMA_DRIVER_PCI_H_
 
- LINUX_BCMA_H_
 
- LINUX_BCMA_PRIVATE_H_
 
- LINUX_BCMA_REGS_H_
 
- LINUX_BCMA_SOC_H_
 
- LINUX_BEFS_ENDIAN
 
- LINUX_CB710_DRIVER_H
 
- LINUX_CB710_MMC_H
 
- LINUX_CB710_SG_H
 
- LINUX_CEC_NOTIFIER_H
 
- LINUX_CEC_PIN_H
 
- LINUX_CEC_PIN_PRIV_H
 
- LINUX_COMPILER_H
 
- LINUX_CPER_H
 
- LINUX_CRASH_CORE_H
 
- LINUX_CRASH_DUMP_H
 
- LINUX_DATA_PARTITION
 
- LINUX_DECOMPRESS_INFLATE_H
 
- LINUX_DMAENGINE_H
 
- LINUX_DMAPOOL_H
 
- LINUX_DRIVER_ID
 
- LINUX_EFI_ARM_SCREEN_INFO_TABLE_GUID
 
- LINUX_EFI_CRASH_GUID
 
- LINUX_EFI_LOADER_ENTRY_GUID
 
- LINUX_EFI_MEMRESERVE_TABLE_GUID
 
- LINUX_EFI_RANDOM_SEED_TABLE_GUID
 
- LINUX_EFI_TPM_EVENT_LOG_GUID
 
- LINUX_EFI_TPM_FINAL_LOG_GUID
 
- LINUX_ELFNOTE_BUILD_SALT
 
- LINUX_EXPORTFS_H
 
- LINUX_EXTENDED_PARTITION
 
- LINUX_FC0011_H_
 
- LINUX_FORMAT
 
- LINUX_FSI_H
 
- LINUX_FSI_OCC_H
 
- LINUX_FSI_SBEFIFO_H
 
- LINUX_FW_OFFSET
 
- LINUX_GATEWAY_ADDR
 
- LINUX_GATEWAY_SPACE
 
- LINUX_HARDIRQ_H
 
- LINUX_HMM_H
 
- LINUX_HWRANDOM_H_
 
- LINUX_IEEE80211_H
 
- LINUX_IEEE802154_H
 
- LINUX_IFX_MODEM_H
 
- LINUX_IF_PHONET_H
 
- LINUX_IIO_HW_CONSUMER_H
 
- LINUX_INTEL_PTI_H_
 
- LINUX_IOMAP_H
 
- LINUX_IO_URING_H
 
- LINUX_ISAPNP_H
 
- LINUX_KERNEL_PAGE_FLAGS_H
 
- LINUX_KEXEC_H
 
- LINUX_KEXEC_INTERNAL_H
 
- LINUX_LOCKD_BIND_H
 
- LINUX_LOCKD_DEBUG_H
 
- LINUX_LOCKD_LOCKD_H
 
- LINUX_LOCKD_NLM_H
 
- LINUX_LOCKD_SHARE_H
 
- LINUX_LOGO_CLUT224
 
- LINUX_LOGO_GRAY256
 
- LINUX_LOGO_MONO
 
- LINUX_LOGO_VGA16
 
- LINUX_LTC4245_H
 
- LINUX_LVM_PARTITION
 
- LINUX_MIB_ARPFILTER
 
- LINUX_MIB_BUSYPOLLRXPACKETS
 
- LINUX_MIB_DELAYEDACKLOCKED
 
- LINUX_MIB_DELAYEDACKLOST
 
- LINUX_MIB_DELAYEDACKS
 
- LINUX_MIB_EMBRYONICRSTS
 
- LINUX_MIB_IPRPFILTER
 
- LINUX_MIB_LISTENDROPS
 
- LINUX_MIB_LISTENOVERFLOWS
 
- LINUX_MIB_LOCKDROPPEDICMPS
 
- LINUX_MIB_MAX
 
- LINUX_MIB_NUM
 
- LINUX_MIB_OFOPRUNED
 
- LINUX_MIB_OUTOFWINDOWICMPS
 
- LINUX_MIB_PAWSACTIVEREJECTED
 
- LINUX_MIB_PAWSESTABREJECTED
 
- LINUX_MIB_PFMEMALLOCDROP
 
- LINUX_MIB_PRUNECALLED
 
- LINUX_MIB_RCVPRUNED
 
- LINUX_MIB_SACKMERGED
 
- LINUX_MIB_SACKSHIFTED
 
- LINUX_MIB_SACKSHIFTFALLBACK
 
- LINUX_MIB_SYNCOOKIESFAILED
 
- LINUX_MIB_SYNCOOKIESRECV
 
- LINUX_MIB_SYNCOOKIESSENT
 
- LINUX_MIB_TCPABORTFAILED
 
- LINUX_MIB_TCPABORTONCLOSE
 
- LINUX_MIB_TCPABORTONDATA
 
- LINUX_MIB_TCPABORTONLINGER
 
- LINUX_MIB_TCPABORTONMEMORY
 
- LINUX_MIB_TCPABORTONTIMEOUT
 
- LINUX_MIB_TCPACKCOMPRESSED
 
- LINUX_MIB_TCPACKSKIPPEDCHALLENGE
 
- LINUX_MIB_TCPACKSKIPPEDFINWAIT2
 
- LINUX_MIB_TCPACKSKIPPEDPAWS
 
- LINUX_MIB_TCPACKSKIPPEDSEQ
 
- LINUX_MIB_TCPACKSKIPPEDSYNRECV
 
- LINUX_MIB_TCPACKSKIPPEDTIMEWAIT
 
- LINUX_MIB_TCPAUTOCORKING
 
- LINUX_MIB_TCPBACKLOGCOALESCE
 
- LINUX_MIB_TCPBACKLOGDROP
 
- LINUX_MIB_TCPCHALLENGEACK
 
- LINUX_MIB_TCPDEFERACCEPTDROP
 
- LINUX_MIB_TCPDELIVERED
 
- LINUX_MIB_TCPDELIVEREDCE
 
- LINUX_MIB_TCPDSACKIGNOREDNOUNDO
 
- LINUX_MIB_TCPDSACKIGNOREDOLD
 
- LINUX_MIB_TCPDSACKOFORECV
 
- LINUX_MIB_TCPDSACKOFOSENT
 
- LINUX_MIB_TCPDSACKOLDSENT
 
- LINUX_MIB_TCPDSACKRECV
 
- LINUX_MIB_TCPDSACKUNDO
 
- LINUX_MIB_TCPFASTOPENACTIVE
 
- LINUX_MIB_TCPFASTOPENACTIVEFAIL
 
- LINUX_MIB_TCPFASTOPENBLACKHOLE
 
- LINUX_MIB_TCPFASTOPENCOOKIEREQD
 
- LINUX_MIB_TCPFASTOPENLISTENOVERFLOW
 
- LINUX_MIB_TCPFASTOPENPASSIVE
 
- LINUX_MIB_TCPFASTOPENPASSIVEALTKEY
 
- LINUX_MIB_TCPFASTOPENPASSIVEFAIL
 
- LINUX_MIB_TCPFASTRETRANS
 
- LINUX_MIB_TCPFROMZEROWINDOWADV
 
- LINUX_MIB_TCPFULLUNDO
 
- LINUX_MIB_TCPHPACKS
 
- LINUX_MIB_TCPHPHITS
 
- LINUX_MIB_TCPHYSTARTDELAYCWND
 
- LINUX_MIB_TCPHYSTARTDELAYDETECT
 
- LINUX_MIB_TCPHYSTARTTRAINCWND
 
- LINUX_MIB_TCPHYSTARTTRAINDETECT
 
- LINUX_MIB_TCPKEEPALIVE
 
- LINUX_MIB_TCPLOSSFAILURES
 
- LINUX_MIB_TCPLOSSPROBERECOVERY
 
- LINUX_MIB_TCPLOSSPROBES
 
- LINUX_MIB_TCPLOSSUNDO
 
- LINUX_MIB_TCPLOSTRETRANSMIT
 
- LINUX_MIB_TCPMD5FAILURE
 
- LINUX_MIB_TCPMD5NOTFOUND
 
- LINUX_MIB_TCPMD5UNEXPECTED
 
- LINUX_MIB_TCPMEMORYPRESSURES
 
- LINUX_MIB_TCPMEMORYPRESSURESCHRONO
 
- LINUX_MIB_TCPMINTTLDROP
 
- LINUX_MIB_TCPMTUPFAIL
 
- LINUX_MIB_TCPMTUPSUCCESS
 
- LINUX_MIB_TCPOFODROP
 
- LINUX_MIB_TCPOFOMERGE
 
- LINUX_MIB_TCPOFOQUEUE
 
- LINUX_MIB_TCPORIGDATASENT
 
- LINUX_MIB_TCPPARTIALUNDO
 
- LINUX_MIB_TCPPUREACKS
 
- LINUX_MIB_TCPRCVCOALESCE
 
- LINUX_MIB_TCPRCVCOLLAPSED
 
- LINUX_MIB_TCPRCVQDROP
 
- LINUX_MIB_TCPRENOFAILURES
 
- LINUX_MIB_TCPRENORECOVERY
 
- LINUX_MIB_TCPRENORECOVERYFAIL
 
- LINUX_MIB_TCPRENOREORDER
 
- LINUX_MIB_TCPREQQFULLDOCOOKIES
 
- LINUX_MIB_TCPREQQFULLDROP
 
- LINUX_MIB_TCPRETRANSFAIL
 
- LINUX_MIB_TCPSACKDISCARD
 
- LINUX_MIB_TCPSACKFAILURES
 
- LINUX_MIB_TCPSACKRECOVERY
 
- LINUX_MIB_TCPSACKRECOVERYFAIL
 
- LINUX_MIB_TCPSACKRENEGING
 
- LINUX_MIB_TCPSACKREORDER
 
- LINUX_MIB_TCPSLOWSTARTRETRANS
 
- LINUX_MIB_TCPSPURIOUSRTOS
 
- LINUX_MIB_TCPSPURIOUS_RTX_HOSTQUEUES
 
- LINUX_MIB_TCPSYNCHALLENGE
 
- LINUX_MIB_TCPSYNRETRANS
 
- LINUX_MIB_TCPTIMEOUTS
 
- LINUX_MIB_TCPTIMEWAITOVERFLOW
 
- LINUX_MIB_TCPTOZEROWINDOWADV
 
- LINUX_MIB_TCPTSREORDER
 
- LINUX_MIB_TCPWANTZEROWINDOWADV
 
- LINUX_MIB_TCPWINPROBE
 
- LINUX_MIB_TCPWQUEUETOOBIG
 
- LINUX_MIB_TCPZEROWINDOWDROP
 
- LINUX_MIB_TIMEWAITED
 
- LINUX_MIB_TIMEWAITKILLED
 
- LINUX_MIB_TIMEWAITRECYCLED
 
- LINUX_MIB_XFRMACQUIREERROR
 
- LINUX_MIB_XFRMFWDHDRERROR
 
- LINUX_MIB_XFRMINBUFFERERROR
 
- LINUX_MIB_XFRMINERROR
 
- LINUX_MIB_XFRMINHDRERROR
 
- LINUX_MIB_XFRMINNOPOLS
 
- LINUX_MIB_XFRMINNOSTATES
 
- LINUX_MIB_XFRMINPOLBLOCK
 
- LINUX_MIB_XFRMINPOLERROR
 
- LINUX_MIB_XFRMINSTATEEXPIRED
 
- LINUX_MIB_XFRMINSTATEINVALID
 
- LINUX_MIB_XFRMINSTATEMISMATCH
 
- LINUX_MIB_XFRMINSTATEMODEERROR
 
- LINUX_MIB_XFRMINSTATEPROTOERROR
 
- LINUX_MIB_XFRMINSTATESEQERROR
 
- LINUX_MIB_XFRMINTMPLMISMATCH
 
- LINUX_MIB_XFRMMAX
 
- LINUX_MIB_XFRMNUM
 
- LINUX_MIB_XFRMOUTBUNDLECHECKERROR
 
- LINUX_MIB_XFRMOUTBUNDLEGENERROR
 
- LINUX_MIB_XFRMOUTERROR
 
- LINUX_MIB_XFRMOUTNOSTATES
 
- LINUX_MIB_XFRMOUTPOLBLOCK
 
- LINUX_MIB_XFRMOUTPOLDEAD
 
- LINUX_MIB_XFRMOUTPOLERROR
 
- LINUX_MIB_XFRMOUTSTATEEXPIRED
 
- LINUX_MIB_XFRMOUTSTATEINVALID
 
- LINUX_MIB_XFRMOUTSTATEMODEERROR
 
- LINUX_MIB_XFRMOUTSTATEPROTOERROR
 
- LINUX_MIB_XFRMOUTSTATESEQERROR
 
- LINUX_MLD_H
 
- LINUX_MMC_CARD_H
 
- LINUX_MMC_CORE_H
 
- LINUX_MMC_CQHCI_H
 
- LINUX_MMC_HOST_H
 
- LINUX_MMC_IOCTL_H
 
- LINUX_MMC_MMC_H
 
- LINUX_MMC_PM_H
 
- LINUX_MMC_SDHCI_PCI_DATA_H
 
- LINUX_MMC_SDIO_FUNC_H
 
- LINUX_MMC_SDIO_H
 
- LINUX_MMC_SDIO_IDS_H
 
- LINUX_MMC_SD_H
 
- LINUX_MMC_SH_MMCIF_H
 
- LINUX_MM_DEBUG_H
 
- LINUX_MM_INLINE_H
 
- LINUX_MOD_DEVICETABLE_H
 
- LINUX_MPTLAN_H_INCLUDED
 
- LINUX_MSI_H
 
- LINUX_NATIVE_MAGIC
 
- LINUX_NET_ETHOC_H
 
- LINUX_NFS4_ACL_H
 
- LINUX_NFSD_AUTH_H
 
- LINUX_NFSD_H
 
- LINUX_NFSD_IDMAP_H
 
- LINUX_NFSD_NFSD_H
 
- LINUX_NFSD_VFS_H
 
- LINUX_NMI_H
 
- LINUX_NUBUS_H
 
- LINUX_OPAL_H
 
- LINUX_OPPROM_BEGVM
 
- LINUX_OPPROM_ENDVM
 
- LINUX_OPPROM_MAGIC
 
- LINUX_OS
 
- LINUX_PCI_ATS_H
 
- LINUX_PCI_H
 
- LINUX_PCI_REGS_H
 
- LINUX_PHONET_H
 
- LINUX_PLATFORM_DATA_TDA9950_H
 
- LINUX_POWERPC_PERF_HV_24X7_CATALOG_H_
 
- LINUX_POWERPC_PERF_HV_24X7_H_
 
- LINUX_POWERPC_PERF_HV_COMMON_H_
 
- LINUX_POWERPC_PERF_HV_GPCI_H_
 
- LINUX_POWERPC_PERF_REQ_GEN_PERF_H_
 
- LINUX_PPS_KC_H
 
- LINUX_PPS_KERNEL_H
 
- LINUX_PR_H
 
- LINUX_QEDR_CM_H_
 
- LINUX_RAID_PARTITION
 
- LINUX_RAID_RAID6X86_H
 
- LINUX_RAID_RAID6_H
 
- LINUX_REBOOT_CMD_CAD_OFF
 
- LINUX_REBOOT_CMD_CAD_ON
 
- LINUX_REBOOT_CMD_HALT
 
- LINUX_REBOOT_CMD_KEXEC
 
- LINUX_REBOOT_CMD_POWER_OFF
 
- LINUX_REBOOT_CMD_RESTART
 
- LINUX_REBOOT_CMD_RESTART2
 
- LINUX_REBOOT_CMD_SW_SUSPEND
 
- LINUX_REBOOT_MAGIC1
 
- LINUX_REBOOT_MAGIC2
 
- LINUX_REBOOT_MAGIC2A
 
- LINUX_REBOOT_MAGIC2B
 
- LINUX_REBOOT_MAGIC2C
 
- LINUX_RIO_DRV_H
 
- LINUX_RIO_H
 
- LINUX_RIO_IDS_H
 
- LINUX_RIO_REGS_H
 
- LINUX_SCHED_CLOCK
 
- LINUX_SERIAL_CORE_H
 
- LINUX_SFP_H
 
- LINUX_SOC_DOVE_PMU_H
 
- LINUX_SONET_H
 
- LINUX_SPI_FLASH_H
 
- LINUX_SPI_MAX7301_H
 
- LINUX_SPI_MC33880_H
 
- LINUX_SSB_CHIPCO_H_
 
- LINUX_SSB_DRIVER_GIGE_H_
 
- LINUX_SSB_EMBEDDED_H_
 
- LINUX_SSB_EXTIFCORE_H_
 
- LINUX_SSB_H_
 
- LINUX_SSB_MIPSCORE_H_
 
- LINUX_SSB_PCICORE_H_
 
- LINUX_SSB_PRIVATE_H_
 
- LINUX_SSB_REGS_H_
 
- LINUX_SWAP_MAGIC
 
- LINUX_SWAP_PARTITION
 
- LINUX_SYSCALL_TRAP
 
- LINUX_TIMER
 
- LINUX_TIMER_INT
 
- LINUX_UID16_H
 
- LINUX_VENDOR_ID
 
- LINUX_VGA_H
 
- LINUX_VHOST_TEST_H
 
- LINUX_VIRTIO_H
 
- LINVOL_LIN_ENABLE_MUTE
 
- LINVOL_LIN_VOL
 
- LINVOL_LRIN_BOTH
 
- LINX_FUTURE_0_PID
 
- LINX_FUTURE_1_PID
 
- LINX_FUTURE_2_PID
 
- LINX_MASTERDEVEL2_PID
 
- LINX_SDMUSBQSS_PID
 
- LIO23XX_COPPERHEAD_LED_GPIO
 
- LIO68XX_LED_BEACON_ADDR
 
- LIO68XX_LED_BEACON_CFGOFF
 
- LIO68XX_LED_BEACON_CFGON
 
- LIO68XX_LED_CTRL_ADDR
 
- LIO68XX_LED_CTRL_CFGOFF
 
- LIO68XX_LED_CTRL_CFGON
 
- LIO_210NV
 
- LIO_210NV_NAME
 
- LIO_210SV
 
- LIO_210SV_NAME
 
- LIO_23XX
 
- LIO_23XX_NAME
 
- LIO_410NV
 
- LIO_410NV_NAME
 
- LIO_CFG_LIODN_MASK
 
- LIO_CHANGE_MTU_FAIL
 
- LIO_CHANGE_MTU_SUCCESS
 
- LIO_CMD_WAIT_TM
 
- LIO_CONTROL
 
- LIO_DATA
 
- LIO_FLAG_MSIX_ENABLED
 
- LIO_FLAG_MSI_ENABLED
 
- LIO_FW_BASE_NAME
 
- LIO_FW_DIR
 
- LIO_FW_NAME_SUFFIX
 
- LIO_FW_NAME_TYPE_AUTO
 
- LIO_FW_NAME_TYPE_NIC
 
- LIO_FW_NAME_TYPE_NONE
 
- LIO_IFCFG_WAIT_TIME
 
- LIO_IFSTATE_DROQ_OPS
 
- LIO_IFSTATE_REGISTERED
 
- LIO_IFSTATE_RESETTING
 
- LIO_IFSTATE_RUNNING
 
- LIO_IFSTATE_RX_TIMESTAMP_ENABLED
 
- LIO_IF_NAME_SIZE
 
- LIO_MAX_BOOTCMD_LEN
 
- LIO_MAX_CORES
 
- LIO_MAX_FIRMWARE_VERSION_LEN
 
- LIO_MAX_FW_FILENAME_LEN
 
- LIO_MAX_FW_TYPE_LEN
 
- LIO_MAX_IMAGES
 
- LIO_MAX_MTU_SIZE
 
- LIO_MBOX_WRITE_WAIT_CNT
 
- LIO_MBOX_WRITE_WAIT_TIME
 
- LIO_MIN_MTU_SIZE
 
- LIO_NIC_MAGIC
 
- LIO_OOM_POLL_INTERVAL_MS
 
- LIO_PCICMD_O2
 
- LIO_PCICMD_O3
 
- LIO_PHY_PORT_FIBRE
 
- LIO_PHY_PORT_TP
 
- LIO_PHY_PORT_UNKNOWN
 
- LIO_RESET_SECS
 
- LIO_RXBUFFER_SZ
 
- LIO_SC_MAX_TMO_MS
 
- LIO_SIZE
 
- LIO_SOFTCMDRESP_IH2
 
- LIO_SOFTCMDRESP_IH3
 
- LIO_SYNC_OCTEON_TIME_INTERVAL_MS
 
- LIO_VFSTATS_POLL
 
- LIO_VF_REP_REQ_DEVNAME
 
- LIO_VF_REP_REQ_MTU
 
- LIO_VF_REP_REQ_NONE
 
- LIO_VF_REP_REQ_STATE
 
- LIO_VF_REP_REQ_STATS
 
- LIO_VF_REP_REQ_TMO_MS
 
- LIO_VF_REP_STATE_DOWN
 
- LIO_VF_REP_STATE_UP
 
- LIO_VF_REP_STATS_POLL_TIME_MS
 
- LIP0_F
 
- LIP0_S
 
- LIP0_V
 
- LIPMISS_F
 
- LIPMISS_S
 
- LIPMISS_V
 
- LIQUIDIO_BASE_MAJOR_VERSION
 
- LIQUIDIO_BASE_MICRO_VERSION
 
- LIQUIDIO_BASE_MINOR_VERSION
 
- LIQUIDIO_BASE_VERSION
 
- LIQUIDIO_LINK_QUERY_INTERVAL_MS
 
- LIQUIDIO_MICRO_VERSION
 
- LIQUIDIO_NDEV_STATS_POLL_TIME_MS
 
- LIQUIDIO_PACKAGE
 
- LIQUIDIO_SPOOFCHK_CAP
 
- LIQUIDIO_STARTER_POLL_INTERVAL_MS
 
- LIQUIDIO_SWITCHDEV_CAP
 
- LIQUIDIO_TIME_SYNC_CAP
 
- LIQUIDIO_VERSION
 
- LIQUID_COOLING
 
- LIRCBUF_SIZE
 
- LIRC_CAN_GET_REC_RESOLUTION
 
- LIRC_CAN_MEASURE_CARRIER
 
- LIRC_CAN_NOTIFY_DECODE
 
- LIRC_CAN_REC
 
- LIRC_CAN_REC_LIRCCODE
 
- LIRC_CAN_REC_MASK
 
- LIRC_CAN_REC_MODE2
 
- LIRC_CAN_REC_PULSE
 
- LIRC_CAN_REC_RAW
 
- LIRC_CAN_REC_SCANCODE
 
- LIRC_CAN_SEND
 
- LIRC_CAN_SEND_LIRCCODE
 
- LIRC_CAN_SEND_MASK
 
- LIRC_CAN_SEND_MODE2
 
- LIRC_CAN_SEND_PULSE
 
- LIRC_CAN_SEND_RAW
 
- LIRC_CAN_SET_REC_CARRIER
 
- LIRC_CAN_SET_REC_CARRIER_RANGE
 
- LIRC_CAN_SET_REC_DUTY_CYCLE
 
- LIRC_CAN_SET_REC_DUTY_CYCLE_RANGE
 
- LIRC_CAN_SET_REC_FILTER
 
- LIRC_CAN_SET_REC_TIMEOUT
 
- LIRC_CAN_SET_SEND_CARRIER
 
- LIRC_CAN_SET_SEND_DUTY_CYCLE
 
- LIRC_CAN_SET_TRANSMITTER_MASK
 
- LIRC_CAN_USE_WIDEBAND_RECEIVER
 
- LIRC_FREQUENCY
 
- LIRC_GET_FEATURES
 
- LIRC_GET_LENGTH
 
- LIRC_GET_MAX_TIMEOUT
 
- LIRC_GET_MIN_TIMEOUT
 
- LIRC_GET_REC_MODE
 
- LIRC_GET_REC_RESOLUTION
 
- LIRC_GET_REC_TIMEOUT
 
- LIRC_GET_SEND_MODE
 
- LIRC_IS_FREQUENCY
 
- LIRC_IS_PULSE
 
- LIRC_IS_SPACE
 
- LIRC_IS_TIMEOUT
 
- LIRC_MODE2
 
- LIRC_MODE2REC
 
- LIRC_MODE2SEND
 
- LIRC_MODE2_FREQUENCY
 
- LIRC_MODE2_MASK
 
- LIRC_MODE2_PULSE
 
- LIRC_MODE2_SPACE
 
- LIRC_MODE2_TIMEOUT
 
- LIRC_MODE_LIRCCODE
 
- LIRC_MODE_MODE2
 
- LIRC_MODE_PULSE
 
- LIRC_MODE_RAW
 
- LIRC_MODE_SCANCODE
 
- LIRC_PULSE
 
- LIRC_REC2MODE
 
- LIRC_SCANCODE_FLAG_REPEAT
 
- LIRC_SCANCODE_FLAG_TOGGLE
 
- LIRC_SEND2MODE
 
- LIRC_SET_MEASURE_CARRIER_MODE
 
- LIRC_SET_REC_CARRIER
 
- LIRC_SET_REC_CARRIER_RANGE
 
- LIRC_SET_REC_MODE
 
- LIRC_SET_REC_TIMEOUT
 
- LIRC_SET_REC_TIMEOUT_REPORTS
 
- LIRC_SET_SEND_CARRIER
 
- LIRC_SET_SEND_DUTY_CYCLE
 
- LIRC_SET_SEND_MODE
 
- LIRC_SET_TRANSMITTER_MASK
 
- LIRC_SET_WIDEBAND_RECEIVER
 
- LIRC_SPACE
 
- LIRC_TIMEOUT
 
- LIRC_VALUE
 
- LIRC_VALUE_MASK
 
- LIRQ5_BIT
 
- LIRQ6_BIT
 
- LIRQ7_BIT
 
- LIRQ8_BIT
 
- LIR_IQ_CLASS_DEGRADED
 
- LIR_IQ_CLASS_INFO
 
- LIR_IQ_CLASS_NOT_OPERATIONAL
 
- LIS2302D
 
- LIS2DE12
 
- LIS2DE12_ACCEL_DEV_NAME
 
- LIS2DH12
 
- LIS2DH12_ACCEL_DEV_NAME
 
- LIS2DW12
 
- LIS2DW12_ACCEL_DEV_NAME
 
- LIS2MDL_MAGN_DEV_NAME
 
- LIS331DL
 
- LIS331DLF
 
- LIS331DLH
 
- LIS331DLH_ACCEL_DEV_NAME
 
- LIS331DL_ACCEL_DEV_NAME
 
- LIS3DC
 
- LIS3DE_ACCEL_DEV_NAME
 
- LIS3DH
 
- LIS3DHH
 
- LIS3DHH_ACCEL_DEV_NAME
 
- LIS3DH_ACCEL_DEV_NAME
 
- LIS3DLH_SENSITIVITY_2G
 
- LIS3L02DQ
 
- LIS3L02DQ_ACCEL_DEV_NAME
 
- LIS3LV02D
 
- LIS3LV02DL
 
- LIS3LV02DL_ACCEL_DEV_NAME
 
- LIS3MDL_MAGN_DEV_NAME
 
- LIS3_ACCURACY
 
- LIS3_CLICK_DOUBLE_X
 
- LIS3_CLICK_DOUBLE_Y
 
- LIS3_CLICK_DOUBLE_Z
 
- LIS3_CLICK_SINGLE_X
 
- LIS3_CLICK_SINGLE_Y
 
- LIS3_CLICK_SINGLE_Z
 
- LIS3_DEFAULT_FLAT_12B
 
- LIS3_DEFAULT_FLAT_8B
 
- LIS3_DEFAULT_FUZZ_12B
 
- LIS3_DEFAULT_FUZZ_8B
 
- LIS3_DEV_X
 
- LIS3_DEV_Y
 
- LIS3_DEV_Z
 
- LIS3_HIPASS1_DISABLE
 
- LIS3_HIPASS2_DISABLE
 
- LIS3_HIPASS_CUTFF_1HZ
 
- LIS3_HIPASS_CUTFF_2HZ
 
- LIS3_HIPASS_CUTFF_4HZ
 
- LIS3_HIPASS_CUTFF_8HZ
 
- LIS3_INV_DEV_X
 
- LIS3_INV_DEV_Y
 
- LIS3_INV_DEV_Z
 
- LIS3_IRQ1_CLICK
 
- LIS3_IRQ1_DATA_READY
 
- LIS3_IRQ1_DISABLE
 
- LIS3_IRQ1_FF_WU_1
 
- LIS3_IRQ1_FF_WU_12
 
- LIS3_IRQ1_FF_WU_2
 
- LIS3_IRQ1_MASK
 
- LIS3_IRQ2_CLICK
 
- LIS3_IRQ2_DATA_READY
 
- LIS3_IRQ2_DISABLE
 
- LIS3_IRQ2_FF_WU_1
 
- LIS3_IRQ2_FF_WU_12
 
- LIS3_IRQ2_FF_WU_2
 
- LIS3_IRQ2_MASK
 
- LIS3_IRQ_ACTIVE_LOW
 
- LIS3_IRQ_OPEN_DRAIN
 
- LIS3_NO_MAP
 
- LIS3_PWRON_DELAY_WAI_12B
 
- LIS3_PWRON_DELAY_WAI_8B
 
- LIS3_REG_OFF
 
- LIS3_REG_ON
 
- LIS3_SENSITIVITY_12B
 
- LIS3_SENSITIVITY_8B
 
- LIS3_SPI_READ
 
- LIS3_SYSFS_POWERDOWN_DELAY
 
- LIS3_USE_BLOCK_READ
 
- LIS3_WAKEUP_X_HI
 
- LIS3_WAKEUP_X_LO
 
- LIS3_WAKEUP_Y_HI
 
- LIS3_WAKEUP_Y_LO
 
- LIS3_WAKEUP_Z_HI
 
- LIS3_WAKEUP_Z_LO
 
- LISTEN
 
- LISTENING_NULLS_BASE
 
- LISTEN_INFO_HASH_SIZE
 
- LISTSIZE
 
- LISTSVR_IPV6_F
 
- LISTSVR_IPV6_S
 
- LISTSVR_IPV6_V
 
- LIST_BL_BUG_ON
 
- LIST_BL_LOCKMASK
 
- LIST_CLEAN
 
- LIST_COMMIT_PENDING
 
- LIST_CONTAINOR
 
- LIST_DIRTY
 
- LIST_EMPTY
 
- LIST_ENTRY
 
- LIST_FIRST
 
- LIST_FOREACH
 
- LIST_H
 
- LIST_HEAD
 
- LIST_HEADER
 
- LIST_HEAD_INIT
 
- LIST_HEAD_INITIALIZER
 
- LIST_INIT
 
- LIST_INSERT_AFTER
 
- LIST_INSERT_BEFORE
 
- LIST_INSERT_HEAD
 
- LIST_LMAX
 
- LIST_LMIN
 
- LIST_NEXT
 
- LIST_PCI_HDR_LEN
 
- LIST_POISON1
 
- LIST_POISON2
 
- LIST_REMOVE
 
- LIST_SIZE
 
- LIST_TOUCHED
 
- LIS_R2
 
- LIT
 
- LIT64
 
- LITERALS
 
- LITERAL_CODERS_MAX
 
- LITERAL_CODER_SIZE
 
- LITERAL_NOENTROPY
 
- LITHRSH
 
- LITOL2BSZ
 
- LITTLE
 
- LITTLEENDIAN_CPU
 
- LITTLETON_ETH_PHYS
 
- LITTLETON_GPIO_LCD_CS
 
- LITTLETON_NR_IRQS
 
- LITTLE_ENDIAN
 
- LITTLE_ENDIAN_ACCESS
 
- LITTLE_ENDIAN_MODE_SHIFT
 
- LIT_STATES
 
- LIVE_REG_COUNT
 
- LI_CHIP_ID
 
- LJMPW_RM
 
- LK
 
- LK2
 
- LKC_H
 
- LKE
 
- LKE_MASK
 
- LKE_SHIFT
 
- LKKBD_DEBUG
 
- LKM_BLOCK
 
- LKM_CANCEL
 
- LKM_CONVERT
 
- LKM_CRMODE
 
- LKM_CWMODE
 
- LKM_DEQALL
 
- LKM_EXMODE
 
- LKM_FINDLOCAL
 
- LKM_FORCE
 
- LKM_GET_LVB
 
- LKM_INVVALBLK
 
- LKM_IVMODE
 
- LKM_LOCAL
 
- LKM_MAXMODE
 
- LKM_MIGRATION
 
- LKM_MODEMASK
 
- LKM_NLMODE
 
- LKM_NODLCKWT
 
- LKM_NOQUEUE
 
- LKM_ORPHAN
 
- LKM_PARENTABLE
 
- LKM_PRMODE
 
- LKM_PROC_OWNED
 
- LKM_PUT_LVB
 
- LKM_PWMODE
 
- LKM_RECOVERY
 
- LKM_REVVALBLK
 
- LKM_SNGLDLCK
 
- LKM_SYNCSTS
 
- LKM_TIMEOUT
 
- LKM_UNLOCK
 
- LKM_UNUSED1
 
- LKM_UNUSED2
 
- LKM_UNUSED3
 
- LKM_UNUSED4
 
- LKM_UNUSED5
 
- LKM_UNUSED6
 
- LKM_UNUSED7
 
- LKM_VALBLK
 
- LKM_VALID_FLAGS
 
- LKM_XID
 
- LKM_XID_CONFLICT
 
- LKPIDXSIZE_G
 
- LKPIDXSIZE_M
 
- LKPIDXSIZE_S
 
- LKPIDXSIZE_V
 
- LKPTBLQUEUE0_G
 
- LKPTBLQUEUE0_M
 
- LKPTBLQUEUE0_S
 
- LKPTBLQUEUE1_G
 
- LKPTBLQUEUE1_M
 
- LKPTBLQUEUE1_S
 
- LKPTBLROWVLD_F
 
- LKPTBLROWVLD_S
 
- LKPTBLROWVLD_V
 
- LK_040
 
- LK_ALL_KEYS_UP
 
- LK_CMD_DISABLE_BELL
 
- LK_CMD_DISABLE_CTRCLICK
 
- LK_CMD_DISABLE_KEYCLICK
 
- LK_CMD_ENABLE_BELL
 
- LK_CMD_ENABLE_CTRCLICK
 
- LK_CMD_ENABLE_KEYCLICK
 
- LK_CMD_ENABLE_LK401
 
- LK_CMD_LED_OFF
 
- LK_CMD_LED_ON
 
- LK_CMD_POWERCYCLE_RESET
 
- LK_CMD_REQUEST_ID
 
- LK_CMD_SET_DEFAULTS
 
- LK_CMD_SET_MODE
 
- LK_CMD_SOUND_BELL
 
- LK_INPUT_ERROR
 
- LK_KBD_LOCKED
 
- LK_KBD_TEST_MODE_ACK
 
- LK_LED_COMPOSE
 
- LK_LED_SCROLLLOCK
 
- LK_LED_SHIFTLOCK
 
- LK_LED_WAIT
 
- LK_METRONOME
 
- LK_MODE_AUTODOWN
 
- LK_MODE_CHANGE_ACK
 
- LK_MODE_DOWN
 
- LK_MODE_UPDOWN
 
- LK_NUM_IGNORE_BYTES
 
- LK_NUM_KEYCODES
 
- LK_OUTPUT_ERROR
 
- LK_PREFIX_KEY_DOWN
 
- LK_RESPONSE_RESERVED
 
- LK_SELFTEST_FAILED
 
- LK_STATE_IN_USE
 
- LK_STUCK_KEY
 
- LL
 
- LL2_ASSERT
 
- LL2_DO_NOTHING
 
- LL2_DROP_PACKET
 
- LL64
 
- LLBAR
 
- LLBAR_ADDR
 
- LLBAR_LBAR_MASK
 
- LLBAR_LBAR_SHIFT
 
- LLC
 
- LLC2_ACK_TIME
 
- LLC2_BUSY_TIME
 
- LLC2_P_TIME
 
- LLC2_REJ_TIME
 
- LLCC_AUDHW
 
- LLCC_AUDIO
 
- LLCC_CMPT
 
- LLCC_CMPTDMA
 
- LLCC_COMMON_STATUS0
 
- LLCC_CPUSS
 
- LLCC_DISP
 
- LLCC_DRAM_CE
 
- LLCC_DRAM_UE
 
- LLCC_ERP_PANIC_ON_UE
 
- LLCC_GPU
 
- LLCC_GPUHTW
 
- LLCC_LB_CNT_MASK
 
- LLCC_LB_CNT_SHIFT
 
- LLCC_MDM
 
- LLCC_MDMHPFX
 
- LLCC_MDMHPGRW
 
- LLCC_MDMPNG
 
- LLCC_MMUHWT
 
- LLCC_ROTATOR
 
- LLCC_STATUS_READ_DELAY
 
- LLCC_TRAM_CE
 
- LLCC_TRAM_UE
 
- LLCC_TRP_ACT_CTRLn
 
- LLCC_TRP_ATTR0_CFGn
 
- LLCC_TRP_ATTR1_CFGn
 
- LLCC_TRP_STATUSn
 
- LLCC_VIDFW
 
- LLCC_VIDSC0
 
- LLCC_VIDSC1
 
- LLCC_VOICE
 
- LLCMD_NAMES
 
- LLCMODE
 
- LLCP_AGF_PDU_HEADER_SIZE
 
- LLCP_BOUND
 
- LLCP_CLOSED
 
- LLCP_CONNECTED
 
- LLCP_CONNECTING
 
- LLCP_DEFAULT_LTO
 
- LLCP_DEFAULT_MIU
 
- LLCP_DEFAULT_RW
 
- LLCP_DISCONNECTING
 
- LLCP_DM_DISC
 
- LLCP_DM_NOBOUND
 
- LLCP_DM_NOCONN
 
- LLCP_DM_REJ
 
- LLCP_HEADER_SIZE
 
- LLCP_LISTEN
 
- LLCP_LOCAL_NUM_SAP
 
- LLCP_LOCAL_SAP_OFFSET
 
- LLCP_MAX_LTO
 
- LLCP_MAX_MIU
 
- LLCP_MAX_MIUX
 
- LLCP_MAX_RW
 
- LLCP_MAX_SAP
 
- LLCP_PDU_AGF
 
- LLCP_PDU_CC
 
- LLCP_PDU_CONNECT
 
- LLCP_PDU_DISC
 
- LLCP_PDU_DM
 
- LLCP_PDU_FRMR
 
- LLCP_PDU_I
 
- LLCP_PDU_PAX
 
- LLCP_PDU_RNR
 
- LLCP_PDU_RR
 
- LLCP_PDU_SNL
 
- LLCP_PDU_SYMM
 
- LLCP_PDU_UI
 
- LLCP_SAP_IP
 
- LLCP_SAP_MAX
 
- LLCP_SAP_OBEX
 
- LLCP_SAP_SDP
 
- LLCP_SAP_SNEP
 
- LLCP_SDP_NUM_SAP
 
- LLCP_SDP_UNBOUND
 
- LLCP_SEQUENCE_SIZE
 
- LLCP_TLV_LTO
 
- LLCP_TLV_MAX
 
- LLCP_TLV_MIUX
 
- LLCP_TLV_OPT
 
- LLCP_TLV_RW
 
- LLCP_TLV_SDREQ
 
- LLCP_TLV_SDRES
 
- LLCP_TLV_SN
 
- LLCP_TLV_VERSION
 
- LLCP_TLV_WKS
 
- LLCP_VERSION_10
 
- LLCP_VERSION_11
 
- LLCP_WKS_NUM_SAP
 
- LLC_1_PDU_CMD_TEST
 
- LLC_1_PDU_CMD_UI
 
- LLC_1_PDU_CMD_XID
 
- LLC_2_PDU_CMD_DISC
 
- LLC_2_PDU_CMD_REJ
 
- LLC_2_PDU_CMD_RNR
 
- LLC_2_PDU_CMD_RR
 
- LLC_2_PDU_CMD_SABME
 
- LLC_2_PDU_RSP_DM
 
- LLC_2_PDU_RSP_FRMR
 
- LLC_2_PDU_RSP_REJ
 
- LLC_2_PDU_RSP_RNR
 
- LLC_2_PDU_RSP_RR
 
- LLC_2_PDU_RSP_UA
 
- LLC_2_SEQ_NBR_MODULO
 
- LLC_CMSG_PKTINFO
 
- LLC_CONFIRM
 
- LLC_CONN_AC_CLR_REMOTE_BUSY
 
- LLC_CONN_AC_CLR_REMOTE_BUSY_IF_Fb_EQ_1
 
- LLC_CONN_AC_CONN_CONFIRM
 
- LLC_CONN_AC_CONN_IND
 
- LLC_CONN_AC_DATA_FLAG_SET_0
 
- LLC_CONN_AC_DATA_FLAG_SET_1
 
- LLC_CONN_AC_DATA_FLAG_SET_1_IF_DATA_FLAG_EQ_0
 
- LLC_CONN_AC_DATA_FLAG_SET_2
 
- LLC_CONN_AC_DATA_IND
 
- LLC_CONN_AC_DISC_IND
 
- LLC_CONN_AC_F_FLAG_SET_P
 
- LLC_CONN_AC_OPTIONAL_SEND_RNR_XXX_Xb_SET_0
 
- LLC_CONN_AC_P_FLAG_SET_0
 
- LLC_CONN_AC_P_FLAG_SET_P
 
- LLC_CONN_AC_REMOTE_BUSY_SET_0
 
- LLC_CONN_AC_REPORT_STATUS
 
- LLC_CONN_AC_RESEND_FRMR_RSP_Fb_SET_0
 
- LLC_CONN_AC_RESEND_FRMR_RSP_Fb_SET_Pb
 
- LLC_CONN_AC_RESEND_I_CMD_Pb_SET_1
 
- LLC_CONN_AC_RESEND_I_CMD_Pb_SET_1_OR_SEND_RR
 
- LLC_CONN_AC_RESEND_I_RSP_Fb_SET_1
 
- LLC_CONN_AC_RESEND_I_XXX_Xb_SET_0
 
- LLC_CONN_AC_RESEND_I_XXX_Xb_SET_0_OR_SEND_RR
 
- LLC_CONN_AC_RESET_CONFIRM
 
- LLC_CONN_AC_RESET_IND
 
- LLC_CONN_AC_RETRY_CNT_INC_BY_1
 
- LLC_CONN_AC_RETRY_CNT_SET_0
 
- LLC_CONN_AC_SEND_ACK_CMD_Pb_SET_1
 
- LLC_CONN_AC_SEND_ACK_RSP_Fb_SET_1
 
- LLC_CONN_AC_SEND_ACK_XXX_Xb_SET_0
 
- LLC_CONN_AC_SEND_DISC_CMD_Pb_SET_X
 
- LLC_CONN_AC_SEND_DM_RSP_Fb_SET_1
 
- LLC_CONN_AC_SEND_DM_RSP_Fb_SET_F_FLAG
 
- LLC_CONN_AC_SEND_DM_RSP_Fb_SET_Pb
 
- LLC_CONN_AC_SEND_FRMR_RSP_Fb_SET_X
 
- LLC_CONN_AC_SEND_I_CMD_Pb_SET_1
 
- LLC_CONN_AC_SEND_I_XXX_Xb_SET_0
 
- LLC_CONN_AC_SEND_REJ_CMD_Pb_SET_1
 
- LLC_CONN_AC_SEND_REJ_RSP_Fb_SET_1
 
- LLC_CONN_AC_SEND_REJ_XXX_Xb_SET_0
 
- LLC_CONN_AC_SEND_RNR_CMD_Pb_SET_1
 
- LLC_CONN_AC_SEND_RNR_RSP_Fb_SET_1
 
- LLC_CONN_AC_SEND_RNR_XXX_Xb_SET_0
 
- LLC_CONN_AC_SEND_RR_CMD_Pb_SET_1
 
- LLC_CONN_AC_SEND_RR_RSP_Fb_SET_1
 
- LLC_CONN_AC_SEND_RR_XXX_Xb_SET_0
 
- LLC_CONN_AC_SEND_SABME_CMD_Pb_SET_X
 
- LLC_CONN_AC_SEND_UA_RSP_Fb_SET_F_FLAG
 
- LLC_CONN_AC_SEND_UA_RSP_Fb_SET_Pb
 
- LLC_CONN_AC_SET_REMOTE_BUSY
 
- LLC_CONN_AC_START_ACK_TMR
 
- LLC_CONN_AC_START_ACK_TMR_IF_NOT_RUNNING
 
- LLC_CONN_AC_START_P_TMR
 
- LLC_CONN_AC_START_REJ_TMR
 
- LLC_CONN_AC_START_SENDACK_TMR_IF_NOT_RUNNING
 
- LLC_CONN_AC_STOP_ACK_TMR
 
- LLC_CONN_AC_STOP_ALL_TMRS
 
- LLC_CONN_AC_STOP_OTHER_TMRS
 
- LLC_CONN_AC_STOP_P_TMR
 
- LLC_CONN_AC_STOP_REJ_TMR
 
- LLC_CONN_AC_STOP_REJ_TMR_IF_DATA_FLAG_EQ_2
 
- LLC_CONN_AC_STOP_SENDACK_TMR
 
- LLC_CONN_AC_S_FLAG_SET_0
 
- LLC_CONN_AC_S_FLAG_SET_1
 
- LLC_CONN_AC_UPDATE_Nr_RECEIVED
 
- LLC_CONN_AC_UPDATE_P_FLAG
 
- LLC_CONN_AC_Vr_INC_BY_1
 
- LLC_CONN_AC_Vr_SET_0
 
- LLC_CONN_AC_Vs_SET_0
 
- LLC_CONN_AC_Vs_SET_Nr
 
- LLC_CONN_EV_ACK_TMR_EXP
 
- LLC_CONN_EV_BUSY_TMR_EXP
 
- LLC_CONN_EV_CONN_REQ
 
- LLC_CONN_EV_CONN_RESP
 
- LLC_CONN_EV_DATA_REQ
 
- LLC_CONN_EV_DISC_REQ
 
- LLC_CONN_EV_INIT_P_F_CYCLE
 
- LLC_CONN_EV_LOCAL_BUSY_CLEARED
 
- LLC_CONN_EV_LOCAL_BUSY_DETECTED
 
- LLC_CONN_EV_P_TMR_EXP
 
- LLC_CONN_EV_QFY_DATA_FLAG_EQ_0
 
- LLC_CONN_EV_QFY_DATA_FLAG_EQ_1
 
- LLC_CONN_EV_QFY_DATA_FLAG_EQ_2
 
- LLC_CONN_EV_QFY_INIT_P_F_CYCLE
 
- LLC_CONN_EV_QFY_P_FLAG_EQ_0
 
- LLC_CONN_EV_QFY_P_FLAG_EQ_1
 
- LLC_CONN_EV_QFY_P_FLAG_EQ_Fbit
 
- LLC_CONN_EV_QFY_REMOTE_BUSY_EQ_0
 
- LLC_CONN_EV_QFY_RETRY_CNT_GTE_N2
 
- LLC_CONN_EV_QFY_RETRY_CNT_LT_N2
 
- LLC_CONN_EV_QFY_S_FLAG_EQ_0
 
- LLC_CONN_EV_QFY_S_FLAG_EQ_1
 
- LLC_CONN_EV_REJ_TMR_EXP
 
- LLC_CONN_EV_RESET_REQ
 
- LLC_CONN_EV_RESET_RESP
 
- LLC_CONN_EV_RX_BAD_PDU
 
- LLC_CONN_EV_RX_DISC_CMD_Pbit_SET_X
 
- LLC_CONN_EV_RX_DM_RSP_Fbit_SET_X
 
- LLC_CONN_EV_RX_FRMR_RSP_Fbit_SET_X
 
- LLC_CONN_EV_RX_I_CMD_Pbit_SET_0
 
- LLC_CONN_EV_RX_I_CMD_Pbit_SET_0_UNEXPD_Ns
 
- LLC_CONN_EV_RX_I_CMD_Pbit_SET_1
 
- LLC_CONN_EV_RX_I_CMD_Pbit_SET_1_UNEXPD_Ns
 
- LLC_CONN_EV_RX_I_CMD_Pbit_SET_X
 
- LLC_CONN_EV_RX_I_CMD_Pbit_SET_X_INVAL_Ns
 
- LLC_CONN_EV_RX_I_CMD_Pbit_SET_X_UNEXPD_Ns
 
- LLC_CONN_EV_RX_I_RSP_Fbit_SET_0
 
- LLC_CONN_EV_RX_I_RSP_Fbit_SET_0_UNEXPD_Ns
 
- LLC_CONN_EV_RX_I_RSP_Fbit_SET_1
 
- LLC_CONN_EV_RX_I_RSP_Fbit_SET_1_UNEXPD_Ns
 
- LLC_CONN_EV_RX_I_RSP_Fbit_SET_X
 
- LLC_CONN_EV_RX_I_RSP_Fbit_SET_X_INVAL_Ns
 
- LLC_CONN_EV_RX_I_RSP_Fbit_SET_X_UNEXPD_Ns
 
- LLC_CONN_EV_RX_REJ_CMD_Pbit_SET_0
 
- LLC_CONN_EV_RX_REJ_CMD_Pbit_SET_1
 
- LLC_CONN_EV_RX_REJ_CMD_Pbit_SET_X
 
- LLC_CONN_EV_RX_REJ_RSP_Fbit_SET_0
 
- LLC_CONN_EV_RX_REJ_RSP_Fbit_SET_1
 
- LLC_CONN_EV_RX_REJ_RSP_Fbit_SET_X
 
- LLC_CONN_EV_RX_RNR_CMD_Pbit_SET_0
 
- LLC_CONN_EV_RX_RNR_CMD_Pbit_SET_1
 
- LLC_CONN_EV_RX_RNR_CMD_Pbit_SET_X
 
- LLC_CONN_EV_RX_RNR_RSP_Fbit_SET_0
 
- LLC_CONN_EV_RX_RNR_RSP_Fbit_SET_1
 
- LLC_CONN_EV_RX_RNR_RSP_Fbit_SET_X
 
- LLC_CONN_EV_RX_RR_CMD_Pbit_SET_0
 
- LLC_CONN_EV_RX_RR_CMD_Pbit_SET_1
 
- LLC_CONN_EV_RX_RR_CMD_Pbit_SET_X
 
- LLC_CONN_EV_RX_RR_RSP_Fbit_SET_0
 
- LLC_CONN_EV_RX_RR_RSP_Fbit_SET_1
 
- LLC_CONN_EV_RX_RR_RSP_Fbit_SET_X
 
- LLC_CONN_EV_RX_SABME_CMD_Pbit_SET_X
 
- LLC_CONN_EV_RX_UA_RSP_Fbit_SET_X
 
- LLC_CONN_EV_RX_XXX_CMD_Pbit_SET_0
 
- LLC_CONN_EV_RX_XXX_CMD_Pbit_SET_1
 
- LLC_CONN_EV_RX_XXX_CMD_Pbit_SET_X
 
- LLC_CONN_EV_RX_XXX_RSP_Fbit_SET_1
 
- LLC_CONN_EV_RX_XXX_RSP_Fbit_SET_X
 
- LLC_CONN_EV_RX_XXX_YYY
 
- LLC_CONN_EV_RX_ZZZ_CMD_Pbit_SET_X_INVAL_Nr
 
- LLC_CONN_EV_RX_ZZZ_RSP_Fbit_SET_X_INVAL_Nr
 
- LLC_CONN_EV_TX_BUFF_FULL
 
- LLC_CONN_EV_TYPE_ACK_TMR
 
- LLC_CONN_EV_TYPE_BUSY_TMR
 
- LLC_CONN_EV_TYPE_CONDITION
 
- LLC_CONN_EV_TYPE_PDU
 
- LLC_CONN_EV_TYPE_PRIM
 
- LLC_CONN_EV_TYPE_P_TMR
 
- LLC_CONN_EV_TYPE_REJ_TMR
 
- LLC_CONN_EV_TYPE_RPT_STATUS
 
- LLC_CONN_EV_TYPE_SENDACK_TMR
 
- LLC_CONN_EV_TYPE_SIMPLE
 
- LLC_CONN_H
 
- LLC_CONN_OUT_OF_SVC
 
- LLC_CONN_PRIM
 
- LLC_CONN_STATE_ADM
 
- LLC_CONN_STATE_AWAIT
 
- LLC_CONN_STATE_AWAIT_BUSY
 
- LLC_CONN_STATE_AWAIT_REJ
 
- LLC_CONN_STATE_BUSY
 
- LLC_CONN_STATE_D_CONN
 
- LLC_CONN_STATE_ERROR
 
- LLC_CONN_STATE_NORMAL
 
- LLC_CONN_STATE_REJ
 
- LLC_CONN_STATE_RESET
 
- LLC_CONN_STATE_SETUP
 
- LLC_CONN_STATE_TEMP
 
- LLC_C_AC_H
 
- LLC_C_EV_H
 
- LLC_C_ST_H
 
- LLC_DATAUNIT_PRIM
 
- LLC_DATA_PRIM
 
- LLC_DEST_CONN
 
- LLC_DEST_INVALID
 
- LLC_DEST_SAP
 
- LLC_DISABLE_PRIM
 
- LLC_DISC_PRIM
 
- LLC_DISC_REASON_ACK_TMR_EXP
 
- LLC_DISC_REASON_RX_DISC_CMD_PDU
 
- LLC_DISC_REASON_RX_DM_RSP_PDU
 
- LLC_EVENT
 
- LLC_FLOWCONTROL_PRIM
 
- LLC_GLOBAL_SAP
 
- LLC_H
 
- LLC_HEADER_SIZE
 
- LLC_IF_H
 
- LLC_IND
 
- LLC_ISO_RESERVED_SAP
 
- LLC_I_GET_NR
 
- LLC_I_GET_NS
 
- LLC_I_PF_BIT_MASK
 
- LLC_I_PF_IS_0
 
- LLC_I_PF_IS_1
 
- LLC_LEN
 
- LLC_MGMT_GRP
 
- LLC_MGMT_INDIV
 
- LLC_NBR_PRIMITIVES
 
- LLC_NOP_NAME
 
- LLC_NR_SAP_STATES
 
- LLC_NULL_SAP
 
- LLC_OPT_ACK_TMR_EXP
 
- LLC_OPT_BUSY_TMR_EXP
 
- LLC_OPT_MAX
 
- LLC_OPT_MAX_ACK_TMR_EXP
 
- LLC_OPT_MAX_BUSY_TMR_EXP
 
- LLC_OPT_MAX_P_TMR_EXP
 
- LLC_OPT_MAX_REJ_TMR_EXP
 
- LLC_OPT_MAX_RETRY
 
- LLC_OPT_MAX_SIZE
 
- LLC_OPT_MAX_WIN
 
- LLC_OPT_PKTINFO
 
- LLC_OPT_P_TMR_EXP
 
- LLC_OPT_REJ_TMR_EXP
 
- LLC_OPT_RETRY
 
- LLC_OPT_RX_WIN
 
- LLC_OPT_SIZE
 
- LLC_OPT_TX_WIN
 
- LLC_OPT_UNKNOWN
 
- LLC_PACKET
 
- LLC_PDU_CMD
 
- LLC_PDU_CMD_RSP_MASK
 
- LLC_PDU_GROUP_DSAP_MASK
 
- LLC_PDU_H
 
- LLC_PDU_IS_CMD
 
- LLC_PDU_IS_GROUP_DSAP
 
- LLC_PDU_IS_INDIV_DSAP
 
- LLC_PDU_IS_RSP
 
- LLC_PDU_LEN_I
 
- LLC_PDU_LEN_S
 
- LLC_PDU_LEN_U
 
- LLC_PDU_RSP
 
- LLC_PDU_TYPE_I
 
- LLC_PDU_TYPE_IS_I
 
- LLC_PDU_TYPE_IS_S
 
- LLC_PDU_TYPE_IS_U
 
- LLC_PDU_TYPE_I_MASK
 
- LLC_PDU_TYPE_MASK
 
- LLC_PDU_TYPE_S
 
- LLC_PDU_TYPE_S_MASK
 
- LLC_PDU_TYPE_U
 
- LLC_PDU_TYPE_U_MASK
 
- LLC_PRIM_TYPE_CONFIRM
 
- LLC_PRIM_TYPE_IND
 
- LLC_PRIM_TYPE_REQ
 
- LLC_PRIM_TYPE_RESP
 
- LLC_RDE_SAP
 
- LLC_REFCNT_DEBUG
 
- LLC_RESERVE
 
- LLC_RESET_PRIM
 
- LLC_RESET_REASON_LOCAL
 
- LLC_RESET_REASON_REMOTE
 
- LLC_SAP_3COM
 
- LLC_SAP_8208
 
- LLC_SAP_ACTIVATION
 
- LLC_SAP_BANYAN
 
- LLC_SAP_BSPAN
 
- LLC_SAP_DEACTIVATION
 
- LLC_SAP_DISC
 
- LLC_SAP_DYN_START
 
- LLC_SAP_DYN_STOP
 
- LLC_SAP_DYN_TRIES
 
- LLC_SAP_EV_ACTIVATION_REQ
 
- LLC_SAP_EV_DEACTIVATION_REQ
 
- LLC_SAP_EV_RX_TEST_C
 
- LLC_SAP_EV_RX_TEST_R
 
- LLC_SAP_EV_RX_UI
 
- LLC_SAP_EV_RX_XID_C
 
- LLC_SAP_EV_RX_XID_R
 
- LLC_SAP_EV_TEST_REQ
 
- LLC_SAP_EV_TYPE_ACK_TMR
 
- LLC_SAP_EV_TYPE_CONDITION
 
- LLC_SAP_EV_TYPE_PDU
 
- LLC_SAP_EV_TYPE_PRIM
 
- LLC_SAP_EV_TYPE_RPT_STATUS
 
- LLC_SAP_EV_TYPE_SIMPLE
 
- LLC_SAP_EV_UNITDATA_REQ
 
- LLC_SAP_EV_XID_REQ
 
- LLC_SAP_GLOBAL
 
- LLC_SAP_GROUP_DSAP
 
- LLC_SAP_H
 
- LLC_SAP_IMPL
 
- LLC_SAP_IP
 
- LLC_SAP_IPX
 
- LLC_SAP_LANMGR
 
- LLC_SAP_LAR
 
- LLC_SAP_LLC
 
- LLC_SAP_MMS
 
- LLC_SAP_NETBEUI
 
- LLC_SAP_NULL
 
- LLC_SAP_OSI
 
- LLC_SAP_PNM
 
- LLC_SAP_PRO
 
- LLC_SAP_RESP_SSAP
 
- LLC_SAP_RM
 
- LLC_SAP_SNA
 
- LLC_SAP_SNAP
 
- LLC_SAP_STATE_ACTIVE
 
- LLC_SAP_STATE_INACTIVE
 
- LLC_SHDLC_NAME
 
- LLC_SK_DEV_HASH_BITS
 
- LLC_SK_DEV_HASH_ENTRIES
 
- LLC_SK_LADDR_HASH_BITS
 
- LLC_SK_LADDR_HASH_ENTRIES
 
- LLC_SNAP_LEN
 
- LLC_STATUS_CONFLICT
 
- LLC_STATUS_CONN
 
- LLC_STATUS_DISC
 
- LLC_STATUS_FAILED
 
- LLC_STATUS_IMPOSSIBLE
 
- LLC_STATUS_RECEIVED
 
- LLC_STATUS_REFUSE
 
- LLC_STATUS_REMOTE_BUSY
 
- LLC_STATUS_RESET_DONE
 
- LLC_S_AC_H
 
- LLC_S_EV_H
 
- LLC_S_PDU_CMD
 
- LLC_S_PDU_CMD_MASK
 
- LLC_S_PDU_RSP
 
- LLC_S_PF_BIT_MASK
 
- LLC_S_PF_IS_0
 
- LLC_S_PF_IS_1
 
- LLC_S_ST_H
 
- LLC_TEST_PRIM
 
- LLC_U_PDU_CMD
 
- LLC_U_PDU_CMD_MASK
 
- LLC_U_PDU_RSP
 
- LLC_U_PF_BIT_MASK
 
- LLC_U_PF_IS_0
 
- LLC_U_PF_IS_1
 
- LLC_XID_CLASS_MASK
 
- LLC_XID_CLASS_ZEROS_MASK
 
- LLC_XID_FMT_ID
 
- LLC_XID_MIN_RW
 
- LLC_XID_NNULL_ALL
 
- LLC_XID_NNULL_TYPE_1
 
- LLC_XID_NNULL_TYPE_1_2
 
- LLC_XID_NNULL_TYPE_1_3
 
- LLC_XID_NNULL_TYPE_2
 
- LLC_XID_NNULL_TYPE_2_3
 
- LLC_XID_NNULL_TYPE_3
 
- LLC_XID_NULL_CLASS_1
 
- LLC_XID_NULL_CLASS_2
 
- LLC_XID_NULL_CLASS_3
 
- LLC_XID_NULL_CLASS_4
 
- LLC_XID_PRIM
 
- LLC_XID_RW_MASK
 
- LLDP_ADMIN_MIB_OFFSET
 
- LLDP_CHASSIS_ID_STAT_LEN
 
- LLDP_CONFIG_ENABLE_RX_MASK
 
- LLDP_CONFIG_ENABLE_RX_SHIFT
 
- LLDP_CONFIG_ENABLE_TX_MASK
 
- LLDP_CONFIG_ENABLE_TX_SHIFT
 
- LLDP_CONFIG_HOLD_MASK
 
- LLDP_CONFIG_HOLD_SHIFT
 
- LLDP_CONFIG_MAX_CREDIT_MASK
 
- LLDP_CONFIG_MAX_CREDIT_SHIFT
 
- LLDP_CONFIG_TX_INTERVAL_MASK
 
- LLDP_CONFIG_TX_INTERVAL_SHIFT
 
- LLDP_DISABLED
 
- LLDP_MAX_LLDP_AGENTS
 
- LLDP_NEAREST_BRIDGE
 
- LLDP_NEAREST_CUSTOMER_BRIDGE
 
- LLDP_NEAREST_NON_TPMR_BRIDGE
 
- LLDP_PORT_ID_STAT_LEN
 
- LLDP_RX_ONLY
 
- LLDP_TX_ONLY
 
- LLDP_TX_RX
 
- LLFC_DRIVER_TRAFFIC_TYPE_MAX
 
- LLFC_TRAFFIC_TYPE_FCOE
 
- LLFC_TRAFFIC_TYPE_ISCSI
 
- LLFC_TRAFFIC_TYPE_NW
 
- LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED
 
- LLFSELog
 
- LLIST_H
 
- LLIST_HEAD
 
- LLIST_HEAD_INIT
 
- LLI_ADDR_INC
 
- LLI_BLOCK_SIZE
 
- LLI_CYCLIC
 
- LLI_ENTRY_BYTE_SIZE
 
- LLI_ENTRY_WORD_SIZE
 
- LLI_HADDR_BIT_OFFSET
 
- LLI_HADDR_BIT_SIZE
 
- LLI_HADDR_MASK
 
- LLI_LADDR_BIT_OFFSET
 
- LLI_LADDR_BIT_SIZE
 
- LLI_LAST_ITEM
 
- LLI_LAST_LINK
 
- LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES
 
- LLI_MAX_NUM_OF_DATA_ENTRIES
 
- LLI_SIZE_BIT_OFFSET
 
- LLI_SIZE_BIT_SIZE
 
- LLI_SIZE_MASK
 
- LLI_TERM_INT
 
- LLI_WORD0_OFFSET
 
- LLI_WORD1_OFFSET
 
- LLONG_MAX
 
- LLONG_MIN
 
- LLOPM_CTRL
 
- LLOPM_PWR_ON
 
- LLOP_ALE
 
- LLOP_CLE
 
- LLOP_DATA_MASK
 
- LLOP_RE
 
- LLOP_RETURN_IDLE
 
- LLOP_WE
 
- LLPC_CCU_SHIFT
 
- LLP_ECODE_FPDU_START
 
- LLP_ECODE_INSUFFICIENT_IRD
 
- LLP_ECODE_INVALID_REQ_RESP
 
- LLP_ECODE_LOCAL_CATASTROPHIC
 
- LLP_ECODE_NO_MATCHING_RTR
 
- LLP_ECODE_RECEIVED_CRC
 
- LLP_ECODE_TCP_STREAM_LOST
 
- LLP_ETYPE_MPA
 
- LLP_PFAIL_INTR_A
 
- LLP_PFAIL_INTR_B
 
- LLRCV
 
- LLSTAT
 
- LLT_CONFIG
 
- LLT_LAST_ENTRY_OF_TX_PKT_BUFFER
 
- LLT_OP_INACTIVE
 
- LLT_OP_MASK
 
- LLT_OP_READ
 
- LLT_OP_WRITE
 
- LLVL_STS
 
- LLVM_TESTCASE_BASE
 
- LLVM_TESTCASE_BPF_PROLOGUE
 
- LLVM_TESTCASE_BPF_RELOCATION
 
- LLVM_TESTCASE_KBUILD
 
- LL_BYTES_LSB_LEN
 
- LL_BYTES_LSB_POS
 
- LL_BYTES_MSB_LEN
 
- LL_BYTES_MSB_POS
 
- LL_CONNECTING
 
- LL_DEFAULTNORMLOG
 
- LL_DISCONNECTING
 
- LL_HEADER_LENGTH
 
- LL_INACTIVE
 
- LL_L1
 
- LL_L2
 
- LL_LEN
 
- LL_LEN_LEN
 
- LL_LEN_POS
 
- LL_LG
 
- LL_MAX_HEADER
 
- LL_MSG
 
- LL_MSW
 
- LL_MTU_MAX
 
- LL_MTU_V1
 
- LL_MTU_V2
 
- LL_OP_ADDR
 
- LL_OP_CMD
 
- LL_OP_RD
 
- LL_OP_WR
 
- LL_POS
 
- LL_RECV_SLEEP_ACK
 
- LL_RECV_SLEEP_IND
 
- LL_RECV_WAKE_ACK
 
- LL_RECV_WAKE_IND
 
- LL_RESERVED_SPACE
 
- LL_RESERVED_SPACE_EXTRA
 
- LL_RESV
 
- LL_RUNNING
 
- LL_SLEEP_ACK
 
- LL_SLEEP_IND
 
- LL_THRESH_MAX_MASK
 
- LL_THRESH_MAX_SHIFT
 
- LL_UART
 
- LL_UART_PADDR
 
- LL_UART_VADDR
 
- LL_WAKE_UP_ACK
 
- LL_WAKE_UP_IND
 
- LM1882_SYNC_DRIVE
 
- LM25056_MFR_STS_VAUX_OV_WARN
 
- LM25056_MFR_STS_VAUX_UV_WARN
 
- LM25056_VAUX_OV_WARN_LIMIT
 
- LM25056_VAUX_UV_WARN_LIMIT
 
- LM25066_CLEAR_PIN_PEAK
 
- LM25066_DEVICE_SETUP
 
- LM25066_DEV_SETUP_CL
 
- LM25066_MFR_IIN_OC_WARN_LIMIT
 
- LM25066_MFR_PIN_OP_WARN_LIMIT
 
- LM25066_MFR_READ_IIN
 
- LM25066_MFR_READ_PIN
 
- LM25066_READ_AVG_IIN
 
- LM25066_READ_AVG_PIN
 
- LM25066_READ_AVG_VIN
 
- LM25066_READ_AVG_VOUT
 
- LM25066_READ_PIN_PEAK
 
- LM25066_READ_VAUX
 
- LM25066_SAMPLES_FOR_AVG
 
- LM25066_SAMPLES_FOR_AVG_MAX
 
- LM3530_ALS1_IMP_SHIFT
 
- LM3530_ALS2_IMP_SHIFT
 
- LM3530_ALS_AVG_TIME_SHIFT
 
- LM3530_ALS_AVRG_TIME_1024ms
 
- LM3530_ALS_AVRG_TIME_128ms
 
- LM3530_ALS_AVRG_TIME_2048ms
 
- LM3530_ALS_AVRG_TIME_256ms
 
- LM3530_ALS_AVRG_TIME_32ms
 
- LM3530_ALS_AVRG_TIME_4096ms
 
- LM3530_ALS_AVRG_TIME_512ms
 
- LM3530_ALS_AVRG_TIME_64ms
 
- LM3530_ALS_CONFIG
 
- LM3530_ALS_IMPD_13_53kOhm
 
- LM3530_ALS_IMPD_1_011kOhm
 
- LM3530_ALS_IMPD_1_05kOhm
 
- LM3530_ALS_IMPD_1_138kOhm
 
- LM3530_ALS_IMPD_1_6kOhm
 
- LM3530_ALS_IMPD_1_81kOhm
 
- LM3530_ALS_IMPD_1_94kOhm
 
- LM3530_ALS_IMPD_2_27kOhm
 
- LM3530_ALS_IMPD_5_41kOhm
 
- LM3530_ALS_IMPD_667Ohm
 
- LM3530_ALS_IMPD_700Ohm
 
- LM3530_ALS_IMPD_719Ohm
 
- LM3530_ALS_IMPD_759Ohm
 
- LM3530_ALS_IMPD_941Ohm
 
- LM3530_ALS_IMPD_9_01kOhm
 
- LM3530_ALS_IMPD_Z
 
- LM3530_ALS_IMP_SELECT
 
- LM3530_ALS_OFFSET_mV
 
- LM3530_ALS_SEL_SHIFT
 
- LM3530_ALS_WINDOW_mV
 
- LM3530_ALS_Z0T_REG
 
- LM3530_ALS_Z1T_REG
 
- LM3530_ALS_Z2T_REG
 
- LM3530_ALS_Z3T_REG
 
- LM3530_ALS_Z4T_REG
 
- LM3530_ALS_ZB0_REG
 
- LM3530_ALS_ZB1_REG
 
- LM3530_ALS_ZB2_REG
 
- LM3530_ALS_ZB3_REG
 
- LM3530_ALS_ZB_MAX
 
- LM3530_BL_MODE_ALS
 
- LM3530_BL_MODE_MANUAL
 
- LM3530_BL_MODE_PWM
 
- LM3530_BRT_CTRL_REG
 
- LM3530_BRT_RAMP_FALL_SHIFT
 
- LM3530_BRT_RAMP_RATE
 
- LM3530_BRT_RAMP_RISE_SHIFT
 
- LM3530_DEF_ZT_0
 
- LM3530_DEF_ZT_1
 
- LM3530_DEF_ZT_2
 
- LM3530_DEF_ZT_3
 
- LM3530_DEF_ZT_4
 
- LM3530_ENABLE_ALS
 
- LM3530_ENABLE_I2C
 
- LM3530_ENABLE_PWM
 
- LM3530_ENABLE_PWM_SIMPLE
 
- LM3530_EN_ALS_SHIFT
 
- LM3530_EN_I2C_SHIFT
 
- LM3530_EN_PWM_SHIFT
 
- LM3530_EN_PWM_SIMPLE_SHIFT
 
- LM3530_FS_CURR_12mA
 
- LM3530_FS_CURR_15mA
 
- LM3530_FS_CURR_19mA
 
- LM3530_FS_CURR_22mA
 
- LM3530_FS_CURR_26mA
 
- LM3530_FS_CURR_29mA
 
- LM3530_FS_CURR_5mA
 
- LM3530_FS_CURR_8mA
 
- LM3530_GEN_CONFIG
 
- LM3530_INPUT_ALS1
 
- LM3530_INPUT_ALS2
 
- LM3530_INPUT_AVRG
 
- LM3530_INPUT_CEIL
 
- LM3530_LED_DEV
 
- LM3530_MAX_CURR_SHIFT
 
- LM3530_NAME
 
- LM3530_POL_LOW
 
- LM3530_PWM_POL_SHIFT
 
- LM3530_RAMP_LAW_SHIFT
 
- LM3530_RAMP_TIME_130ms
 
- LM3530_RAMP_TIME_1ms
 
- LM3530_RAMP_TIME_1s
 
- LM3530_RAMP_TIME_260ms
 
- LM3530_RAMP_TIME_2s
 
- LM3530_RAMP_TIME_4s
 
- LM3530_RAMP_TIME_520ms
 
- LM3530_RAMP_TIME_8s
 
- LM3530_REG_MAX
 
- LM3532_ALS_CONFIG
 
- LM3532_ALS_CTRL
 
- LM3532_ALS_OFFSET_mV
 
- LM3532_ALS_SEL_SHIFT
 
- LM3532_ALS_WINDOW_mV
 
- LM3532_ALS_ZB_MAX
 
- LM3532_BL_MODE_ALS
 
- LM3532_BL_MODE_MANUAL
 
- LM3532_BRT_VAL_ADJUST
 
- LM3532_CONTROL_A
 
- LM3532_CONTROL_B
 
- LM3532_CONTROL_C
 
- LM3532_CTRL_A_ENABLE
 
- LM3532_CTRL_B_ENABLE
 
- LM3532_CTRL_C_ENABLE
 
- LM3532_ENABLE_ALS
 
- LM3532_FS_CURR_MAX
 
- LM3532_FS_CURR_MIN
 
- LM3532_FS_CURR_STEP
 
- LM3532_I2C_CTRL
 
- LM3532_LINEAR_MAP
 
- LM3532_MAX_CONTROL_BANKS
 
- LM3532_MAX_LED_STRINGS
 
- LM3532_NAME
 
- LM3532_NUM_AVG_VALS
 
- LM3532_NUM_IMP_VALS
 
- LM3532_NUM_RAMP_VALS
 
- LM3532_OUTPUT_CFG_MASK
 
- LM3532_PWM_ZONE_0_EN
 
- LM3532_PWM_ZONE_1_EN
 
- LM3532_PWM_ZONE_2_EN
 
- LM3532_PWM_ZONE_3_EN
 
- LM3532_PWM_ZONE_4_EN
 
- LM3532_PWM_ZONE_MASK
 
- LM3532_RAMP_DOWN_SHIFT
 
- LM3532_REG_CTRL_A_FS_CURR
 
- LM3532_REG_CTRL_B_FS_CURR
 
- LM3532_REG_CTRL_C_FS_CURR
 
- LM3532_REG_ENABLE
 
- LM3532_REG_MAX
 
- LM3532_REG_OUTPUT_CFG
 
- LM3532_REG_PWM_A_CFG
 
- LM3532_REG_PWM_B_CFG
 
- LM3532_REG_PWM_C_CFG
 
- LM3532_REG_RT_RAMP
 
- LM3532_REG_STARTSHUT_RAMP
 
- LM3532_REG_ZN_0_HI
 
- LM3532_REG_ZN_0_LO
 
- LM3532_REG_ZN_1_HI
 
- LM3532_REG_ZN_1_LO
 
- LM3532_REG_ZN_2_HI
 
- LM3532_REG_ZN_2_LO
 
- LM3532_REG_ZN_3_HI
 
- LM3532_REG_ZN_3_LO
 
- LM3532_REG_ZONE_CFG_A
 
- LM3532_REG_ZONE_CFG_B
 
- LM3532_REG_ZONE_CFG_C
 
- LM3532_REG_ZONE_TRGT_A
 
- LM3532_REG_ZONE_TRGT_B
 
- LM3532_REG_ZONE_TRGT_C
 
- LM3532_ZONE_0
 
- LM3532_ZONE_1
 
- LM3532_ZONE_2
 
- LM3532_ZONE_3
 
- LM3532_ZONE_4
 
- LM3532_ZONE_MASK
 
- LM3533_ALS_ATTR
 
- LM3533_ALS_CHANNEL_CURRENT_MAX
 
- LM3533_ALS_CHANNEL_LV_MAX
 
- LM3533_ALS_CHANNEL_LV_MIN
 
- LM3533_ALS_ENABLE_MASK
 
- LM3533_ALS_FLAG_INT_ENABLED
 
- LM3533_ALS_INPUT_MODE_MASK
 
- LM3533_ALS_INT_ENABLE_MASK
 
- LM3533_ALS_RESISTOR_MAX
 
- LM3533_ALS_RESISTOR_MIN
 
- LM3533_ALS_THRESH_MAX
 
- LM3533_ALS_ZONE_MASK
 
- LM3533_ALS_ZONE_MAX
 
- LM3533_ALS_ZONE_SHIFT
 
- LM3533_ATTR_RO
 
- LM3533_ATTR_RW
 
- LM3533_ATTR_TYPE_BACKLIGHT
 
- LM3533_ATTR_TYPE_HYSTERESIS
 
- LM3533_ATTR_TYPE_LED
 
- LM3533_ATTR_TYPE_TARGET
 
- LM3533_ATTR_TYPE_THRESH_FALLING
 
- LM3533_ATTR_TYPE_THRESH_RAISING
 
- LM3533_BL_ID_MASK
 
- LM3533_BL_ID_MAX
 
- LM3533_BL_MAX_BRIGHTNESS
 
- LM3533_BOOST_FREQ_1000KHZ
 
- LM3533_BOOST_FREQ_500KHZ
 
- LM3533_BOOST_FREQ_MASK
 
- LM3533_BOOST_FREQ_SHIFT
 
- LM3533_BOOST_OVP_16V
 
- LM3533_BOOST_OVP_24V
 
- LM3533_BOOST_OVP_32V
 
- LM3533_BOOST_OVP_40V
 
- LM3533_BOOST_OVP_MASK
 
- LM3533_BOOST_OVP_SHIFT
 
- LM3533_BRIGHTNESS_MAX
 
- LM3533_HVCTRLBANK_COUNT
 
- LM3533_HVLED_ID_MAX
 
- LM3533_LED_DELAY1_TMAX
 
- LM3533_LED_DELAY1_TMIN
 
- LM3533_LED_DELAY1_TSTEP
 
- LM3533_LED_DELAY1_VMAX
 
- LM3533_LED_DELAY1_VMIN
 
- LM3533_LED_DELAY2_TMAX
 
- LM3533_LED_DELAY2_TMIN
 
- LM3533_LED_DELAY2_TSTEP
 
- LM3533_LED_DELAY2_VMAX
 
- LM3533_LED_DELAY2_VMIN
 
- LM3533_LED_DELAY3_TMAX
 
- LM3533_LED_DELAY3_TMIN
 
- LM3533_LED_DELAY3_TSTEP
 
- LM3533_LED_DELAY3_VMAX
 
- LM3533_LED_DELAY3_VMIN
 
- LM3533_LED_DELAY_OFF_MAX
 
- LM3533_LED_DELAY_ON_MAX
 
- LM3533_LED_FLAG_PATTERN_ENABLE
 
- LM3533_LED_ID_MASK
 
- LM3533_LED_ID_MAX
 
- LM3533_LVCTRLBANK_COUNT
 
- LM3533_LVCTRLBANK_MAX
 
- LM3533_LVCTRLBANK_MIN
 
- LM3533_LVLED_ID_MAX
 
- LM3533_MAX_CURRENT_MAX
 
- LM3533_MAX_CURRENT_MIN
 
- LM3533_MAX_CURRENT_STEP
 
- LM3533_OUTPUT_ATTR
 
- LM3533_OUTPUT_ATTR_RW
 
- LM3533_OUTPUT_HVLED_ATTR_RW
 
- LM3533_OUTPUT_LVLED_ATTR_RW
 
- LM3533_PWM_MAX
 
- LM3533_REG_ALS_BOUNDARY_BASE
 
- LM3533_REG_ALS_CONF
 
- LM3533_REG_ALS_READ_ADC_AVERAGE
 
- LM3533_REG_ALS_READ_ADC_RAW
 
- LM3533_REG_ALS_RESISTOR_SELECT
 
- LM3533_REG_ALS_TARGET_BASE
 
- LM3533_REG_ALS_ZONE_INFO
 
- LM3533_REG_BOOST_PWM
 
- LM3533_REG_BRIGHTNESS_BASE
 
- LM3533_REG_CTRLBANK_AB_BCONF
 
- LM3533_REG_CTRLBANK_BCONF_ALS_CHANNEL_MASK
 
- LM3533_REG_CTRLBANK_BCONF_ALS_EN_MASK
 
- LM3533_REG_CTRLBANK_BCONF_BASE
 
- LM3533_REG_CTRLBANK_BCONF_MAPPING_MASK
 
- LM3533_REG_CTRLBANK_ENABLE
 
- LM3533_REG_MAX
 
- LM3533_REG_MAX_CURRENT_BASE
 
- LM3533_REG_OUTPUT_CONF1
 
- LM3533_REG_OUTPUT_CONF2
 
- LM3533_REG_PATTERN_ENABLE
 
- LM3533_REG_PATTERN_FALLTIME_BASE
 
- LM3533_REG_PATTERN_HIGH_TIME_BASE
 
- LM3533_REG_PATTERN_LOW_TIME_BASE
 
- LM3533_REG_PATTERN_RISETIME_BASE
 
- LM3533_REG_PATTERN_STEP
 
- LM3533_REG_PWM_BASE
 
- LM3533_RISEFALLTIME_MAX
 
- LM3554_NAME
 
- LM3554_PIN_NTC_ENABLE
 
- LM3554_PIN_TORCH_ENABLE
 
- LM3554_PIN_TX_ENABLE
 
- LM3556_NAME
 
- LM3556_PIN_NTC_ENABLE
 
- LM3556_PIN_TORCH_ENABLE
 
- LM3556_PIN_TX_ENABLE
 
- LM3559_NAME
 
- LM355x_NAME
 
- LM355x_PIN_NTC_DISABLE
 
- LM355x_PIN_STROBE_DISABLE
 
- LM355x_PIN_STROBE_ENABLE
 
- LM355x_PIN_TORCH_DISABLE
 
- LM355x_PIN_TX_DISABLE
 
- LM355x_PMODE_DISABLE
 
- LM355x_PMODE_ENABLE
 
- LM3560_FLASH_BRT_MAX
 
- LM3560_FLASH_BRT_MIN
 
- LM3560_FLASH_BRT_REG_TO_uA
 
- LM3560_FLASH_BRT_STEP
 
- LM3560_FLASH_BRT_uA_TO_REG
 
- LM3560_FLASH_TOUT_MAX
 
- LM3560_FLASH_TOUT_MIN
 
- LM3560_FLASH_TOUT_REG_TO_ms
 
- LM3560_FLASH_TOUT_STEP
 
- LM3560_FLASH_TOUT_ms_TO_REG
 
- LM3560_I2C_ADDR
 
- LM3560_LED0
 
- LM3560_LED1
 
- LM3560_LED_MAX
 
- LM3560_NAME
 
- LM3560_PEAK_1600mA
 
- LM3560_PEAK_2300mA
 
- LM3560_PEAK_3000mA
 
- LM3560_PEAK_3600mA
 
- LM3560_TORCH_BRT_MAX
 
- LM3560_TORCH_BRT_MIN
 
- LM3560_TORCH_BRT_REG_TO_uA
 
- LM3560_TORCH_BRT_STEP
 
- LM3560_TORCH_BRT_uA_TO_REG
 
- LM36010_BOOST_FREQ_4MHZ
 
- LM36010_BOOST_LIMIT_28
 
- LM36010_BOOST_MODE_PASS
 
- LM36010_CURR_LIMIT
 
- LM36010_OVP_FAULT
 
- LM3601X_CFG_REG
 
- LM3601X_DEV_ID_REG
 
- LM3601X_ENABLE_MASK
 
- LM3601X_ENABLE_REG
 
- LM3601X_FLAGS_REG
 
- LM3601X_FLASH_TIME_OUT
 
- LM3601X_IVFM_EN
 
- LM3601X_IVFM_TRIP
 
- LM3601X_LED_FLASH_REG
 
- LM3601X_LED_IR
 
- LM3601X_LED_TORCH
 
- LM3601X_LED_TORCH_REG
 
- LM3601X_LOWER_STEP_US
 
- LM3601X_MAX_STROBE_I_UA
 
- LM3601X_MAX_TIMEOUT_US
 
- LM3601X_MAX_TORCH_I_UA
 
- LM3601X_MIN_STROBE_I_UA
 
- LM3601X_MIN_TIMEOUT_US
 
- LM3601X_MIN_TORCH_I_UA
 
- LM3601X_MODE_IR_DRV
 
- LM3601X_MODE_STANDBY
 
- LM3601X_MODE_STROBE
 
- LM3601X_MODE_TORCH
 
- LM3601X_SHORT_FAULT
 
- LM3601X_STRB_EDGE_TRIG
 
- LM3601X_STRB_EN
 
- LM3601X_STROBE_REG_DIV
 
- LM3601X_SW_RESET
 
- LM3601X_THERM_CURR
 
- LM3601X_THERM_SHUTDOWN
 
- LM3601X_TIMEOUT_MASK
 
- LM3601X_TIMEOUT_XOVER_US
 
- LM3601X_TORCH_REG_DIV
 
- LM3601X_UPPER_STEP_US
 
- LM3601X_UVLO_FAULT
 
- LM36274
 
- LM36274_BL_EN
 
- LM36274_BOOST
 
- LM36274_BOOST_VSEL_MAX
 
- LM36274_EN_VNEG_MASK
 
- LM36274_EN_VPOS_MASK
 
- LM36274_EXT_EN_MASK
 
- LM36274_LDO_NEG
 
- LM36274_LDO_POS
 
- LM36274_LDO_VSEL_MAX
 
- LM36274_MAX_REG
 
- LM36274_MAX_STRINGS
 
- LM36274_REG_BIAS_CONFIG_1
 
- LM36274_REG_BIAS_CONFIG_2
 
- LM36274_REG_BIAS_CONFIG_3
 
- LM36274_REG_BL_CFG_1
 
- LM36274_REG_BL_CFG_2
 
- LM36274_REG_BL_EN
 
- LM36274_REG_BRT_LSB
 
- LM36274_REG_BRT_MSB
 
- LM36274_REG_REV
 
- LM36274_REG_VOUT_BOOST
 
- LM36274_REG_VOUT_NEG
 
- LM36274_REG_VOUT_POS
 
- LM36274_VOLTAGE_MIN
 
- LM36274_VOUT_MASK
 
- LM3630A_BANK_0
 
- LM3630A_BANK_1
 
- LM3630A_LEDA_DISABLE
 
- LM3630A_LEDA_ENABLE
 
- LM3630A_LEDA_ENABLE_LINEAR
 
- LM3630A_LEDB_DISABLE
 
- LM3630A_LEDB_ENABLE
 
- LM3630A_LEDB_ENABLE_LINEAR
 
- LM3630A_LEDB_ON_A
 
- LM3630A_MAX_BRIGHTNESS
 
- LM3630A_NAME
 
- LM3630A_NUM_SINKS
 
- LM3630A_PWM_BANK_A
 
- LM3630A_PWM_BANK_ALL
 
- LM3630A_PWM_BANK_ALL_ACT_LOW
 
- LM3630A_PWM_BANK_A_ACT_LOW
 
- LM3630A_PWM_BANK_B
 
- LM3630A_PWM_BANK_B_ACT_LOW
 
- LM3630A_PWM_DISABLE
 
- LM3630A_SINK_0
 
- LM3630A_SINK_1
 
- LM3631
 
- LM3631_BL_CHANNEL_MASK
 
- LM3631_BL_DUAL_CHANNEL
 
- LM3631_BL_EN_MASK
 
- LM3631_BL_SINGLE_CHANNEL
 
- LM3631_BOOST
 
- LM3631_BOOST_VSEL_MAX
 
- LM3631_CONT_VSEL_MAX
 
- LM3631_DEFAULT_MODE
 
- LM3631_ENTIME_CONT_MASK
 
- LM3631_ENTIME_MASK
 
- LM3631_ENTIME_SHIFT
 
- LM3631_EN_CONT_MASK
 
- LM3631_EN_OREF_MASK
 
- LM3631_EN_VNEG_MASK
 
- LM3631_EN_VPOS_MASK
 
- LM3631_EXPONENTIAL_MAP
 
- LM3631_LCD_EN_MASK
 
- LM3631_LDO_CONT
 
- LM3631_LDO_NEG
 
- LM3631_LDO_OREF
 
- LM3631_LDO_POS
 
- LM3631_LDO_VSEL_MAX
 
- LM3631_MAP_MASK
 
- LM3631_MAX_REG
 
- LM3631_MODE_MASK
 
- LM3631_REG_BL_CFG
 
- LM3631_REG_BRT_LSB
 
- LM3631_REG_BRT_MODE
 
- LM3631_REG_BRT_MSB
 
- LM3631_REG_DEVCTRL
 
- LM3631_REG_ENTIME_VCONT
 
- LM3631_REG_ENTIME_VNEG
 
- LM3631_REG_ENTIME_VOREF
 
- LM3631_REG_ENTIME_VPOS
 
- LM3631_REG_LDO_CTRL1
 
- LM3631_REG_LDO_CTRL2
 
- LM3631_REG_SLOPE
 
- LM3631_REG_VOUT_BOOST
 
- LM3631_REG_VOUT_CONT
 
- LM3631_REG_VOUT_NEG
 
- LM3631_REG_VOUT_OREF
 
- LM3631_REG_VOUT_POS
 
- LM3631_SLOPE_MASK
 
- LM3631_SLOPE_SHIFT
 
- LM3631_VBOOST_MIN
 
- LM3631_VCONT_MIN
 
- LM3631_VLDO_MIN
 
- LM3631_VOUT_CONT_MASK
 
- LM3631_VOUT_MASK
 
- LM3632
 
- LM3632_BL_CHANNEL_MASK
 
- LM3632_BL_DUAL_CHANNEL
 
- LM3632_BL_EN_MASK
 
- LM3632_BL_SINGLE_CHANNEL
 
- LM3632_BOOST
 
- LM3632_BOOST_VSEL_MAX
 
- LM3632_EN_VNEG_MASK
 
- LM3632_EN_VPOS_MASK
 
- LM3632_EXT_EN_MASK
 
- LM3632_I2C_MODE
 
- LM3632_LDO_NEG
 
- LM3632_LDO_POS
 
- LM3632_LDO_VSEL_MAX
 
- LM3632_MAX_REG
 
- LM3632_OVP_25V
 
- LM3632_OVP_MASK
 
- LM3632_PWM_MASK
 
- LM3632_PWM_MODE
 
- LM3632_REG_BIAS_CONFIG
 
- LM3632_REG_BRT_LSB
 
- LM3632_REG_BRT_MSB
 
- LM3632_REG_CONFIG1
 
- LM3632_REG_CONFIG2
 
- LM3632_REG_ENABLE
 
- LM3632_REG_IO_CTRL
 
- LM3632_REG_VOUT_BOOST
 
- LM3632_REG_VOUT_NEG
 
- LM3632_REG_VOUT_POS
 
- LM3632_SWFREQ_1MHZ
 
- LM3632_SWFREQ_MASK
 
- LM3632_VBOOST_MIN
 
- LM3632_VLDO_MIN
 
- LM3632_VOUT_MASK
 
- LM3633
 
- LM3633_BL_RAMPDN_MASK
 
- LM3633_BL_RAMPDN_SHIFT
 
- LM3633_BL_RAMPUP_MASK
 
- LM3633_BL_RAMPUP_SHIFT
 
- LM3633_BL_RAMP_EACH
 
- LM3633_BL_RAMP_MASK
 
- LM3633_HVLED1_CFG_MASK
 
- LM3633_HVLED1_CFG_SHIFT
 
- LM3633_HVLED2_CFG_MASK
 
- LM3633_HVLED2_CFG_SHIFT
 
- LM3633_HVLED3_CFG_MASK
 
- LM3633_HVLED3_CFG_SHIFT
 
- LM3633_LED_BANK_OFFSET
 
- LM3633_LED_EXPONENTIAL
 
- LM3633_MAX_REG
 
- LM3633_OVP_40V
 
- LM3633_OVP_MASK
 
- LM3633_PTN_RAMPDN_MASK
 
- LM3633_PTN_RAMPDN_SHIFT
 
- LM3633_PTN_RAMPUP_MASK
 
- LM3633_PTN_RAMPUP_SHIFT
 
- LM3633_PWM_A_MASK
 
- LM3633_PWM_B_MASK
 
- LM3633_REG_BANK_SEL
 
- LM3633_REG_BL0_RAMP
 
- LM3633_REG_BL1_RAMP
 
- LM3633_REG_BL_FEEDBACK_ENABLE
 
- LM3633_REG_BL_OPEN_FAULT_STATUS
 
- LM3633_REG_BL_RAMP_CONF
 
- LM3633_REG_BL_SHORT_FAULT_STATUS
 
- LM3633_REG_BOOST_CFG
 
- LM3633_REG_BRT_HVLED_A_LSB
 
- LM3633_REG_BRT_HVLED_A_MSB
 
- LM3633_REG_BRT_HVLED_B_LSB
 
- LM3633_REG_BRT_HVLED_B_MSB
 
- LM3633_REG_BRT_LVLED_BASE
 
- LM3633_REG_ENABLE
 
- LM3633_REG_HVLED_OUTPUT_CFG
 
- LM3633_REG_IMAX_HVLED_A
 
- LM3633_REG_IMAX_HVLED_B
 
- LM3633_REG_IMAX_LVLED_BASE
 
- LM3633_REG_LED_MAPPING_MODE
 
- LM3633_REG_MONITOR_ENABLE
 
- LM3633_REG_PATTERN
 
- LM3633_REG_PTN0_RAMP
 
- LM3633_REG_PTN1_RAMP
 
- LM3633_REG_PTN_DELAY
 
- LM3633_REG_PTN_HIGHBRT
 
- LM3633_REG_PTN_HIGHTIME
 
- LM3633_REG_PTN_LOWBRT
 
- LM3633_REG_PTN_LOWTIME
 
- LM3633_REG_PWM_CFG
 
- LM3639_BLED_DIASBLE_ALL
 
- LM3639_BLED_EN_1
 
- LM3639_BLED_EN_2
 
- LM3639_BLED_EN_ALL
 
- LM3639_BLED_MODE_EXPONETIAL
 
- LM3639_BLED_MODE_LINEAR
 
- LM3639_FLED_DIASBLE_ALL
 
- LM3639_FLED_EN_1
 
- LM3639_FLED_EN_2
 
- LM3639_FLED_EN_ALL
 
- LM3639_NAME
 
- LM3639_PWM_DISABLE
 
- LM3639_PWM_EN_ACTHIGH
 
- LM3639_PWM_EN_ACTLOW
 
- LM3639_STROBE_DISABLE
 
- LM3639_STROBE_EN_ACTHIGH
 
- LM3639_STROBE_EN_ACTLOW
 
- LM3639_TXPIN_DISABLE
 
- LM3639_TXPIN_EN_ACTHIGH
 
- LM3639_TXPIN_EN_ACTLOW
 
- LM363X_REGULATOR
 
- LM363X_STEP_500mV
 
- LM363X_STEP_50mV
 
- LM3642_NAME
 
- LM3642_STROBE_PIN_DISABLE
 
- LM3642_STROBE_PIN_ENABLE
 
- LM3642_TORCH_PIN_DISABLE
 
- LM3642_TORCH_PIN_ENABLE
 
- LM3642_TX_PIN_DISABLE
 
- LM3642_TX_PIN_ENABLE
 
- LM3646_FLASH_TOUT_MAX
 
- LM3646_FLASH_TOUT_MIN
 
- LM3646_FLASH_TOUT_STEP
 
- LM3646_FLASH_TOUT_ms_TO_REG
 
- LM3646_I2C_ADDR_REV0
 
- LM3646_I2C_ADDR_REV1
 
- LM3646_LED1_FLASH_BRT_MAX
 
- LM3646_LED1_FLASH_BRT_MIN
 
- LM3646_LED1_FLASH_BRT_STEP
 
- LM3646_LED1_FLASH_BRT_uA_TO_REG
 
- LM3646_LED1_TORCH_BRT_MAX
 
- LM3646_LED1_TORCH_BRT_MIN
 
- LM3646_LED1_TORCH_BRT_STEP
 
- LM3646_LED1_TORCH_BRT_uA_TO_REG
 
- LM3646_NAME
 
- LM3646_TOTAL_FLASH_BRT_MAX
 
- LM3646_TOTAL_FLASH_BRT_MIN
 
- LM3646_TOTAL_FLASH_BRT_STEP
 
- LM3646_TOTAL_FLASH_BRT_uA_TO_REG
 
- LM3646_TOTAL_TORCH_BRT_MAX
 
- LM3646_TOTAL_TORCH_BRT_MIN
 
- LM3646_TOTAL_TORCH_BRT_STEP
 
- LM3646_TOTAL_TORCH_BRT_uA_TO_REG
 
- LM36922_MODEL
 
- LM36923_LED3_EN
 
- LM36923_MODEL
 
- LM3692X_AUTO_FREQ_HI
 
- LM3692X_AUTO_FREQ_LO
 
- LM3692X_BL_ADJ_POL
 
- LM3692X_BL_ADJ_THRESH
 
- LM3692X_BOOST_CTRL
 
- LM3692X_BOOST_SW_1MHZ
 
- LM3692X_BOOST_SW_NO_SHIFT
 
- LM3692X_BRHT_MODE_MULTI_RAMP
 
- LM3692X_BRHT_MODE_PWM
 
- LM3692X_BRHT_MODE_RAMP_MULTI
 
- LM3692X_BRHT_MODE_REG
 
- LM3692X_BRT_CTRL
 
- LM3692X_BRT_LSB
 
- LM3692X_BRT_MSB
 
- LM3692X_DEVICE_EN
 
- LM3692X_EN
 
- LM3692X_ENABLE_MASK
 
- LM3692X_FAULT_CTRL
 
- LM3692X_FAULT_CTRL_OCP
 
- LM3692X_FAULT_CTRL_OPEN
 
- LM3692X_FAULT_CTRL_OVP
 
- LM3692X_FAULT_CTRL_TSD
 
- LM3692X_FAULT_FLAGS
 
- LM3692X_FAULT_FLAG_OCP
 
- LM3692X_FAULT_FLAG_OPEN
 
- LM3692X_FAULT_FLAG_OVP
 
- LM3692X_FAULT_FLAG_SHRT
 
- LM3692X_FAULT_FLAG_TSD
 
- LM3692X_LED1_EN
 
- LM3692X_LED2_EN
 
- LM3692X_MAP_MODE_EXP
 
- LM3692X_MIN_IND_22UH
 
- LM3692X_OCP_PROT_1A
 
- LM3692X_OCP_PROT_1_25A
 
- LM3692X_OCP_PROT_1_5A
 
- LM3692X_OVP_21V
 
- LM3692X_OVP_25V
 
- LM3692X_OVP_29V
 
- LM3692X_PWM_CTRL
 
- LM3692X_PWM_FILTER_100
 
- LM3692X_PWM_FILTER_150
 
- LM3692X_PWM_FILTER_200
 
- LM3692X_PWM_HYSTER_1LSB
 
- LM3692X_PWM_HYSTER_2LSB
 
- LM3692X_PWM_HYSTER_3LSB
 
- LM3692X_PWM_HYSTER_4LSB
 
- LM3692X_PWM_HYSTER_5LSB
 
- LM3692X_PWM_HYSTER_6LSB
 
- LM3692X_PWM_POLARITY
 
- LM3692X_PWM_SAMP_24MHZ
 
- LM3692X_PWM_SAMP_4MHZ
 
- LM3692X_RAMP_EN
 
- LM3692X_RAMP_RATE_125us
 
- LM3692X_RAMP_RATE_16ms
 
- LM3692X_RAMP_RATE_1ms
 
- LM3692X_RAMP_RATE_250us
 
- LM3692X_RAMP_RATE_2ms
 
- LM3692X_RAMP_RATE_4ms
 
- LM3692X_RAMP_RATE_500us
 
- LM3692X_RAMP_RATE_8ms
 
- LM3692X_RESET
 
- LM3692X_REV
 
- LM3692X_SW_RESET
 
- LM3695
 
- LM3695_BL_CHANNEL_MASK
 
- LM3695_BL_DUAL_CHANNEL
 
- LM3695_BL_EN_MASK
 
- LM3695_BL_SINGLE_CHANNEL
 
- LM3695_BRT_RW_MASK
 
- LM3695_MAX_REG
 
- LM3695_REG_BRT_LSB
 
- LM3695_REG_BRT_MSB
 
- LM3695_REG_GP
 
- LM3697_CONTROL_A
 
- LM3697_CONTROL_B
 
- LM3697_CTRL_A_BRT_LSB
 
- LM3697_CTRL_A_BRT_MSB
 
- LM3697_CTRL_A_B_BRT_CFG
 
- LM3697_CTRL_A_B_EN
 
- LM3697_CTRL_A_B_RAMP_CFG
 
- LM3697_CTRL_A_B_RT_RAMP
 
- LM3697_CTRL_A_EN
 
- LM3697_CTRL_A_FS_CURR_CFG
 
- LM3697_CTRL_A_RAMP
 
- LM3697_CTRL_B_BRT_LSB
 
- LM3697_CTRL_B_BRT_MSB
 
- LM3697_CTRL_B_EN
 
- LM3697_CTRL_B_FS_CURR_CFG
 
- LM3697_CTRL_B_RAMP
 
- LM3697_CTRL_ENABLE
 
- LM3697_MAX_CONTROL_BANKS
 
- LM3697_MAX_LED_STRINGS
 
- LM3697_OUTPUT_CONFIG
 
- LM3697_PWM_CFG
 
- LM3697_RESET
 
- LM3697_REV
 
- LM3697_SW_RESET
 
- LM4550_REG_ALLFAKE
 
- LM4550_REG_DONEREAD
 
- LM4550_REG_FAKEPROBE
 
- LM4550_REG_FAKEREAD
 
- LM4550_REG_NOSAVE
 
- LM4550_REG_NOSHADOW
 
- LM4550_REG_OK
 
- LM4550_REG_READONLY
 
- LM4550_RF_OK
 
- LM4857_3D
 
- LM4857_CTRL
 
- LM4857_EPGAIN
 
- LM4857_LVOL
 
- LM4857_MVOL
 
- LM4857_RVOL
 
- LM4857_WAKEUP
 
- LM49453_ADC_DSP_ADC_MUTEL
 
- LM49453_ADC_DSP_ADC_MUTER
 
- LM49453_ADC_DSP_DMIC1_MUTEL
 
- LM49453_ADC_DSP_DMIC1_MUTER
 
- LM49453_ADC_DSP_DMIC2_MUTEL
 
- LM49453_ADC_DSP_DMIC2_MUTER
 
- LM49453_ADC_DSP_MUTE_ALL
 
- LM49453_AUDIO_PORT1_BASIC_CLK_MS
 
- LM49453_AUDIO_PORT1_BASIC_FMT_MASK
 
- LM49453_AUDIO_PORT1_BASIC_SYNC_MS
 
- LM49453_CHIP_EN
 
- LM49453_CHIP_EN_HSD_DETECT
 
- LM49453_CHIP_EN_INVALID_HSD
 
- LM49453_CHIP_EN_SHUTDOWN
 
- LM49453_CLK_SEL1_MCLK_SEL
 
- LM49453_CLK_SEL1_PORT1_SEL
 
- LM49453_CLK_SEL1_PORT2_SEL
 
- LM49453_CLK_SEL1_RTC_SEL
 
- LM49453_CLK_SEL2_ADC_CLK_SEL
 
- LM49453_CLK_SRC_MCLK
 
- LM49453_DAC_DSP_MUTE_ALL
 
- LM49453_FLL_REF_FREQ_VAL
 
- LM49453_FORMATS
 
- LM49453_JACK_CONFIG1
 
- LM49453_JACK_CONFIG2
 
- LM49453_JACK_CONFIG3
 
- LM49453_JACK_CONFIG4
 
- LM49453_JACK_CONFIG5
 
- LM49453_JACK_DISABLE
 
- LM49453_MAX_REGISTER
 
- LM49453_P0_ADC_ALC1_REG
 
- LM49453_P0_ADC_ALC2_REG
 
- LM49453_P0_ADC_ALC3_REG
 
- LM49453_P0_ADC_ALC4_REG
 
- LM49453_P0_ADC_ALC5_REG
 
- LM49453_P0_ADC_ALC6_REG
 
- LM49453_P0_ADC_ALC7_REG
 
- LM49453_P0_ADC_ALC8_REG
 
- LM49453_P0_ADC_ALCMONL_REG
 
- LM49453_P0_ADC_ALCMONR_REG
 
- LM49453_P0_ADC_CLK_DIV_REG
 
- LM49453_P0_ADC_DECIMATOR_REG
 
- LM49453_P0_ADC_DEC_CLIP_REG
 
- LM49453_P0_ADC_DSP_REG
 
- LM49453_P0_ADC_FX_ENABLES_REG
 
- LM49453_P0_ADC_HPF_CLIP_REG
 
- LM49453_P0_ADC_LEVELL_REG
 
- LM49453_P0_ADC_LEVELR_REG
 
- LM49453_P0_ADC_LVLMONL_REG
 
- LM49453_P0_ADC_LVLMONR_REG
 
- LM49453_P0_ADC_LVL_CLIP_REG
 
- LM49453_P0_ADC_MUTED_REG
 
- LM49453_P0_ADC_MUTE_CFG_REG
 
- LM49453_P0_ANALOG_MIXER_ADC_REG
 
- LM49453_P0_AUDIO_PORT1_BASIC_REG
 
- LM49453_P0_AUDIO_PORT1_CLK_GEN1_REG
 
- LM49453_P0_AUDIO_PORT1_CLK_GEN2_REG
 
- LM49453_P0_AUDIO_PORT1_CLK_GEN3_REG
 
- LM49453_P0_AUDIO_PORT1_DATA_WIDTH_REG
 
- LM49453_P0_AUDIO_PORT1_RX_MSB_REG
 
- LM49453_P0_AUDIO_PORT1_SYNC_RATE_REG
 
- LM49453_P0_AUDIO_PORT1_SYNC_SDO_SETUP_REG
 
- LM49453_P0_AUDIO_PORT1_TDM_CHANNELS_REG
 
- LM49453_P0_AUDIO_PORT1_TX_MSB_REG
 
- LM49453_P0_AUDIO_PORT2_BASIC_REG
 
- LM49453_P0_AUDIO_PORT2_CLK_GEN1_REG
 
- LM49453_P0_AUDIO_PORT2_CLK_GEN2_REG
 
- LM49453_P0_AUDIO_PORT2_DATA_WIDTH_REG
 
- LM49453_P0_AUDIO_PORT2_RX_MODE_REG
 
- LM49453_P0_AUDIO_PORT2_SYNC_GEN_REG
 
- LM49453_P0_AUDIO_PORT2_TX_MODE_REG
 
- LM49453_P0_DACHAL1_REG
 
- LM49453_P0_DACHAL2_REG
 
- LM49453_P0_DACHAR1_REG
 
- LM49453_P0_DACHAR2_REG
 
- LM49453_P0_DACHPL1_REG
 
- LM49453_P0_DACHPL2_REG
 
- LM49453_P0_DACHPR1_REG
 
- LM49453_P0_DACHPR2_REG
 
- LM49453_P0_DACLOL1_REG
 
- LM49453_P0_DACLOL2_REG
 
- LM49453_P0_DACLOR1_REG
 
- LM49453_P0_DACLOR2_REG
 
- LM49453_P0_DACLSL1_REG
 
- LM49453_P0_DACLSL2_REG
 
- LM49453_P0_DACLSR1_REG
 
- LM49453_P0_DACLSR2_REG
 
- LM49453_P0_DAC_CLK_SEL_REG
 
- LM49453_P0_DAC_CONFIG_REG
 
- LM49453_P0_DAC_DSP_REG
 
- LM49453_P0_DAC_HA_LEVELL_REG
 
- LM49453_P0_DAC_HA_LEVELR_REG
 
- LM49453_P0_DAC_HP_CLK_DIV_REG
 
- LM49453_P0_DAC_HP_LEVELL_REG
 
- LM49453_P0_DAC_HP_LEVELR_REG
 
- LM49453_P0_DAC_LO_LEVELL_REG
 
- LM49453_P0_DAC_LO_LEVELR_REG
 
- LM49453_P0_DAC_LS_LEVELL_REG
 
- LM49453_P0_DAC_LS_LEVELR_REG
 
- LM49453_P0_DAC_LVL_CLIP_REG
 
- LM49453_P0_DAC_MUTED_REG
 
- LM49453_P0_DAC_MUTE_CFG_REG
 
- LM49453_P0_DAC_OT_CLK_DIV_REG
 
- LM49453_P0_DIGITAL_MIC1_CONFIG_REG
 
- LM49453_P0_DIGITAL_MIC1_DATA_DELAYL_REG
 
- LM49453_P0_DIGITAL_MIC1_DATA_DELAYR_REG
 
- LM49453_P0_DIGITAL_MIC2_CONFIG_REG
 
- LM49453_P0_DIGITAL_MIC2_DATA_DELAYL_REG
 
- LM49453_P0_DIGITAL_MIC2_DATA_DELAYR_REG
 
- LM49453_P0_DIS_PKVL_FB_REG
 
- LM49453_P0_DMIC1_LEVELL_REG
 
- LM49453_P0_DMIC1_LEVELR_REG
 
- LM49453_P0_DMIC2_LEVELL_REG
 
- LM49453_P0_DMIC2_LEVELR_REG
 
- LM49453_P0_DMIC_CLK_DIV_REG
 
- LM49453_P0_DMIC_MUTE_CFG_REG
 
- LM49453_P0_DMIX_CLK_SEL_REG
 
- LM49453_P0_EP_REG
 
- LM49453_P0_FLL_REF_FREQH_REG
 
- LM49453_P0_FLL_REF_FREQL_REG
 
- LM49453_P0_GPIO1_REG
 
- LM49453_P0_GPIO2_REG
 
- LM49453_P0_GPIO3_REG
 
- LM49453_P0_HAP_CTL_REG
 
- LM49453_P0_HAP_FREQ_PROG_LEFTH_REG
 
- LM49453_P0_HAP_FREQ_PROG_LEFTL_REG
 
- LM49453_P0_HAP_FREQ_PROG_RIGHTH_REG
 
- LM49453_P0_HAP_FREQ_PROG_RIGHTL_REG
 
- LM49453_P0_HPF_REG
 
- LM49453_P0_HSDET_CLK_DIV_REG
 
- LM49453_P0_HSD_IRQ1_REG
 
- LM49453_P0_HSD_IRQ2_REG
 
- LM49453_P0_HSD_IRQ3_REG
 
- LM49453_P0_HSD_IRQ4_REG
 
- LM49453_P0_HSD_IRQ_MASK1_REG
 
- LM49453_P0_HSD_IRQ_MASK2_REG
 
- LM49453_P0_HSD_IRQ_MASK3_REG
 
- LM49453_P0_HSD_PIN3_4_CFG_REG
 
- LM49453_P0_HSD_PIN3_4_EX_LOOP_CNT_LIMITH_REG
 
- LM49453_P0_HSD_PIN3_4_EX_LOOP_CNT_LIMITL_REG
 
- LM49453_P0_HSD_PIN_CONFIG_REG
 
- LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATEH_REG
 
- LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATEL_REG
 
- LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS1_REG
 
- LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS2_REG
 
- LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS3_REG
 
- LM49453_P0_HSD_PPB_LONG_CNT_LIMITL_REG
 
- LM49453_P0_HSD_PPB_LONG_CNT_LIMITR_REG
 
- LM49453_P0_HSD_RO_FINALH_REG
 
- LM49453_P0_HSD_RO_FINALL_REG
 
- LM49453_P0_HSD_RO_FINALU_REG
 
- LM49453_P0_HSD_R_HPLH_REG
 
- LM49453_P0_HSD_R_HPLL_REG
 
- LM49453_P0_HSD_R_HPLU_REG
 
- LM49453_P0_HSD_R_HPRH_REG
 
- LM49453_P0_HSD_R_HPRL_REG
 
- LM49453_P0_HSD_R_HPRU_REG
 
- LM49453_P0_HSD_TIMEOUT1_REG
 
- LM49453_P0_HSD_TIMEOUT2_REG
 
- LM49453_P0_HSD_TIMEOUT3_REG
 
- LM49453_P0_HSD_VEL_L_FINALH_REG
 
- LM49453_P0_HSD_VEL_L_FINALL_REG
 
- LM49453_P0_HSD_VEL_L_FINALU_REG
 
- LM49453_P0_HSD_VMIC_BIAS_FINALH_REG
 
- LM49453_P0_HSD_VMIC_BIAS_FINALL_REG
 
- LM49453_P0_HSD_VMIC_BIAS_FINALU_REG
 
- LM49453_P0_MICL_REG
 
- LM49453_P0_MICR_REG
 
- LM49453_P0_PLL_CLK_SEL1_REG
 
- LM49453_P0_PLL_CLK_SEL2_REG
 
- LM49453_P0_PLL_CONFIG_REG
 
- LM49453_P0_PLL_HF_M_REG
 
- LM49453_P0_PLL_LF_M_REG
 
- LM49453_P0_PLL_NL_REG
 
- LM49453_P0_PLL_N_MODH_REG
 
- LM49453_P0_PLL_N_MODL_REG
 
- LM49453_P0_PLL_P1_REG
 
- LM49453_P0_PLL_P2_REG
 
- LM49453_P0_PMC_CLK_DIV_REG
 
- LM49453_P0_PMC_SETUP_REG
 
- LM49453_P0_PORT1_RX_LVL1_REG
 
- LM49453_P0_PORT1_RX_LVL2_REG
 
- LM49453_P0_PORT1_SR_LSB_REG
 
- LM49453_P0_PORT1_SR_MSB_REG
 
- LM49453_P0_PORT1_TX1_REG
 
- LM49453_P0_PORT1_TX2_REG
 
- LM49453_P0_PORT1_TX3_REG
 
- LM49453_P0_PORT1_TX4_REG
 
- LM49453_P0_PORT1_TX5_REG
 
- LM49453_P0_PORT1_TX6_REG
 
- LM49453_P0_PORT1_TX7_REG
 
- LM49453_P0_PORT1_TX8_REG
 
- LM49453_P0_PORT2_RX_LVL_REG
 
- LM49453_P0_PORT2_SR_LSB_REG
 
- LM49453_P0_PORT2_SR_MSB_REG
 
- LM49453_P0_PORT2_TX1_REG
 
- LM49453_P0_PORT2_TX2_REG
 
- LM49453_P0_PULL_CONFIG1_REG
 
- LM49453_P0_PULL_CONFIG2_REG
 
- LM49453_P0_PULL_CONFIG3_REG
 
- LM49453_P0_RESET_REG
 
- LM49453_P0_SOFT_MUTE_REG
 
- LM49453_P0_STN_SEL_REG
 
- LM49453_P0_STN_VOL_ADCL_REG
 
- LM49453_P0_STN_VOL_ADCR_REG
 
- LM49453_P0_STN_VOL_DMIC1L_REG
 
- LM49453_P0_STN_VOL_DMIC1R_REG
 
- LM49453_P0_STN_VOL_DMIC2L_REG
 
- LM49453_P0_STN_VOL_DMIC2R_REG
 
- LM49453_P0_VCO_TARGETHH_REG
 
- LM49453_P0_VCO_TARGETHL_REG
 
- LM49453_P0_VCO_TARGETLH_REG
 
- LM49453_P0_VCO_TARGETLL_REG
 
- LM49453_P1_CP_CLK_DIV_REG
 
- LM49453_P1_CP_CONFIG1_REG
 
- LM49453_P1_CP_CONFIG2_REG
 
- LM49453_P1_CP_CONFIG3_REG
 
- LM49453_P1_CP_CONFIG4_REG
 
- LM49453_P1_CP_LA_VTH1L_REG
 
- LM49453_P1_CP_LA_VTH1M_REG
 
- LM49453_P1_CP_LA_VTH2L_REG
 
- LM49453_P1_CP_LA_VTH2M_REG
 
- LM49453_P1_CP_LA_VTH3H_REG
 
- LM49453_P1_CP_LA_VTH3L_REG
 
- LM49453_P1_DAC_CHOP_REG
 
- LM49453_P1_SIDETONE_SA0H_REG
 
- LM49453_P1_SIDETONE_SA0L_REG
 
- LM49453_P1_SIDETONE_SA1H_REG
 
- LM49453_P1_SIDETONE_SA1L_REG
 
- LM49453_P1_SIDETONE_SA2H_REG
 
- LM49453_P1_SIDETONE_SA2L_REG
 
- LM49453_P1_SIDETONE_SA3H_REG
 
- LM49453_P1_SIDETONE_SA3L_REG
 
- LM49453_P1_SIDETONE_SA4H_REG
 
- LM49453_P1_SIDETONE_SA4L_REG
 
- LM49453_P1_SIDETONE_SA5H_REG
 
- LM49453_P1_SIDETONE_SA5L_REG
 
- LM49453_P1_SIDETONE_SAB0U_REG
 
- LM49453_P1_SIDETONE_SAB1U_REG
 
- LM49453_P1_SIDETONE_SAB2U_REG
 
- LM49453_P1_SIDETONE_SAB3U_REG
 
- LM49453_P1_SIDETONE_SAB4U_REG
 
- LM49453_P1_SIDETONE_SAB5U_REG
 
- LM49453_P1_SIDETONE_SB0H_REG
 
- LM49453_P1_SIDETONE_SB0L_REG
 
- LM49453_P1_SIDETONE_SB1H_REG
 
- LM49453_P1_SIDETONE_SB1L_REG
 
- LM49453_P1_SIDETONE_SB2H_REG
 
- LM49453_P1_SIDETONE_SB2L_REG
 
- LM49453_P1_SIDETONE_SB3H_REG
 
- LM49453_P1_SIDETONE_SB3L_REG
 
- LM49453_P1_SIDETONE_SB4H_REG
 
- LM49453_P1_SIDETONE_SB4L_REG
 
- LM49453_P1_SIDETONE_SB5H_REG
 
- LM49453_P1_SIDETONE_SB5L_REG
 
- LM49453_P1_SIDETONE_SH0H_REG
 
- LM49453_P1_SIDETONE_SH0L_REG
 
- LM49453_P1_SIDETONE_SH0U_REG
 
- LM49453_P1_SIDETONE_SH1H_REG
 
- LM49453_P1_SIDETONE_SH1L_REG
 
- LM49453_P1_SIDETONE_SH1U_REG
 
- LM49453_P1_SIDETONE_SH2H_REG
 
- LM49453_P1_SIDETONE_SH2L_REG
 
- LM49453_P1_SIDETONE_SH2U_REG
 
- LM49453_P1_SIDETONE_SH3H_REG
 
- LM49453_P1_SIDETONE_SH3L_REG
 
- LM49453_P1_SIDETONE_SH3U_REG
 
- LM49453_P1_SIDETONE_SH4H_REG
 
- LM49453_P1_SIDETONE_SH4L_REG
 
- LM49453_P1_SIDETONE_SH4U_REG
 
- LM49453_P1_SIDETONE_SH5H_REG
 
- LM49453_P1_SIDETONE_SH5L_REG
 
- LM49453_P1_SIDETONE_SH5U_REG
 
- LM49453_PAGE0_SELECT
 
- LM49453_PAGE1_SELECT
 
- LM49453_PAGE_REG
 
- LM49453_PMC_SETUP_CHIP_ACTIVE
 
- LM49453_PMC_SETUP_CHIP_EN
 
- LM49453_PMC_SETUP_MCLK_OVER
 
- LM49453_PMC_SETUP_PLL_EN
 
- LM49453_PMC_SETUP_PLL_FLL
 
- LM49453_PMC_SETUP_PLL_P2_EN
 
- LM49453_PMC_SETUP_RTC_CLK_OVER
 
- LM49453_RESET_REG_RST
 
- LM49453_VCO_TARGET_VAL
 
- LM63_MAX_CONVRATE
 
- LM63_MAX_CONVRATE_HZ
 
- LM63_REG_ALERT_MASK
 
- LM63_REG_ALERT_STATUS
 
- LM63_REG_CHIP_ID
 
- LM63_REG_CONFIG1
 
- LM63_REG_CONFIG2
 
- LM63_REG_CONFIG_FAN
 
- LM63_REG_CONVRATE
 
- LM63_REG_LOCAL_HIGH
 
- LM63_REG_LOCAL_TEMP
 
- LM63_REG_LUT_PWM
 
- LM63_REG_LUT_TEMP
 
- LM63_REG_LUT_TEMP_HYST
 
- LM63_REG_MAN_ID
 
- LM63_REG_PWM_FREQ
 
- LM63_REG_PWM_VALUE
 
- LM63_REG_REMOTE_HIGH_LSB
 
- LM63_REG_REMOTE_HIGH_MSB
 
- LM63_REG_REMOTE_LOW_LSB
 
- LM63_REG_REMOTE_LOW_MSB
 
- LM63_REG_REMOTE_OFFSET_LSB
 
- LM63_REG_REMOTE_OFFSET_MSB
 
- LM63_REG_REMOTE_TCRIT
 
- LM63_REG_REMOTE_TCRIT_HYST
 
- LM63_REG_REMOTE_TEMP_LSB
 
- LM63_REG_REMOTE_TEMP_MSB
 
- LM63_REG_TACH_COUNT_LSB
 
- LM63_REG_TACH_COUNT_MSB
 
- LM63_REG_TACH_LIMIT_LSB
 
- LM63_REG_TACH_LIMIT_MSB
 
- LM7000_BIT_FM
 
- LM7000_CE
 
- LM7000_CLK
 
- LM7000_DATA
 
- LM7000_FM_100
 
- LM7000_FM_25
 
- LM7000_FM_50
 
- LM70_CHIP_LM70
 
- LM70_CHIP_LM71
 
- LM70_CHIP_LM74
 
- LM70_CHIP_TMP121
 
- LM70_CHIP_TMP122
 
- LM73_CTRL_HI_SHIFT
 
- LM73_CTRL_LO_SHIFT
 
- LM73_CTRL_RES_MASK
 
- LM73_CTRL_RES_SHIFT
 
- LM73_CTRL_TO_MASK
 
- LM73_ID
 
- LM73_REG_CONF
 
- LM73_REG_CTRL
 
- LM73_REG_ID
 
- LM73_REG_INPUT
 
- LM73_REG_MAX
 
- LM73_REG_MIN
 
- LM73_TEMP_MAX
 
- LM73_TEMP_MIN
 
- LM75A_ID
 
- LM75_DEV_PM_OPS
 
- LM75_REG_CONF
 
- LM75_REG_HYST
 
- LM75_REG_MAX
 
- LM75_REG_TEMP
 
- LM75_SAMPLE_CLEAR_MASK
 
- LM75_SHUTDOWN
 
- LM75_TEMP_FROM_REG
 
- LM75_TEMP_MAX
 
- LM75_TEMP_MIN
 
- LM75_TEMP_TO_REG
 
- LM77_REG_CONF
 
- LM77_REG_TEMP
 
- LM77_REG_TEMP_CRIT
 
- LM77_REG_TEMP_HYST
 
- LM77_REG_TEMP_MAX
 
- LM77_REG_TEMP_MIN
 
- LM77_TEMP_FROM_REG
 
- LM77_TEMP_MAX
 
- LM77_TEMP_MIN
 
- LM77_TEMP_TO_REG
 
- LM78_ADDR_REG_OFFSET
 
- LM78_DATA_REG_OFFSET
 
- LM78_EXTENT
 
- LM78_REG_ALARM1
 
- LM78_REG_ALARM2
 
- LM78_REG_CHIPID
 
- LM78_REG_CONFIG
 
- LM78_REG_FAN
 
- LM78_REG_FAN_MIN
 
- LM78_REG_I2C_ADDR
 
- LM78_REG_IN
 
- LM78_REG_IN_MAX
 
- LM78_REG_IN_MIN
 
- LM78_REG_TEMP
 
- LM78_REG_TEMP_HYST
 
- LM78_REG_TEMP_OVER
 
- LM78_REG_VID_FANDIV
 
- LM80_REG_ALARM1
 
- LM80_REG_ALARM2
 
- LM80_REG_CONFIG
 
- LM80_REG_FAN1
 
- LM80_REG_FAN2
 
- LM80_REG_FANDIV
 
- LM80_REG_FAN_MIN
 
- LM80_REG_IN
 
- LM80_REG_IN_MAX
 
- LM80_REG_IN_MIN
 
- LM80_REG_MASK1
 
- LM80_REG_MASK2
 
- LM80_REG_RES
 
- LM80_REG_TEMP
 
- LM80_REG_TEMP_HOT_HYST
 
- LM80_REG_TEMP_HOT_MAX
 
- LM80_REG_TEMP_OS_HYST
 
- LM80_REG_TEMP_OS_MAX
 
- LM8323_CMD_PWM_WRITE
 
- LM8323_CMD_READ_CFG
 
- LM8323_CMD_READ_CLOCK
 
- LM8323_CMD_READ_ERR
 
- LM8323_CMD_READ_FIFO
 
- LM8323_CMD_READ_ID
 
- LM8323_CMD_READ_INT
 
- LM8323_CMD_READ_KEY_SIZE
 
- LM8323_CMD_READ_PORT_SEL
 
- LM8323_CMD_READ_PORT_STATE
 
- LM8323_CMD_READ_ROTATOR
 
- LM8323_CMD_RESET
 
- LM8323_CMD_RPT_READ_FIFO
 
- LM8323_CMD_SET_ACTIVE
 
- LM8323_CMD_SET_DEBOUNCE
 
- LM8323_CMD_SET_KEY_SIZE
 
- LM8323_CMD_START_PWM
 
- LM8323_CMD_STOP_PWM
 
- LM8323_CMD_WRITE_CFG
 
- LM8323_CMD_WRITE_CLOCK
 
- LM8323_CMD_WRITE_PORT_SEL
 
- LM8323_CMD_WRITE_PORT_STATE
 
- LM8323_FIFO_LEN
 
- LM8323_I2C_ADDR00
 
- LM8323_I2C_ADDR01
 
- LM8323_I2C_ADDR10
 
- LM8323_I2C_ADDR11
 
- LM8323_KEYMAP_SIZE
 
- LM8323_MAX_DATA
 
- LM8323_NUM_PWMS
 
- LM8333_ACTIVE
 
- LM8333_DEBOUNCE
 
- LM8333_ERROR_FIFOOVR
 
- LM8333_ERROR_IRQ
 
- LM8333_ERROR_KEYOVR
 
- LM8333_FIFO_READ
 
- LM8333_FIFO_TRANSFER_SIZE
 
- LM8333_KEYPAD_IRQ
 
- LM8333_NUM_COLS
 
- LM8333_NUM_ROWS
 
- LM8333_READ_ERROR
 
- LM8333_READ_INT
 
- LM8333_READ_RETRIES
 
- LM8333_ROW_SHIFT
 
- LM83_REG_R_CHIP_ID
 
- LM83_REG_R_CONFIG
 
- LM83_REG_R_LOCAL_HIGH
 
- LM83_REG_R_LOCAL_TEMP
 
- LM83_REG_R_MAN_ID
 
- LM83_REG_R_REMOTE1_HIGH
 
- LM83_REG_R_REMOTE1_TEMP
 
- LM83_REG_R_REMOTE2_HIGH
 
- LM83_REG_R_REMOTE2_TEMP
 
- LM83_REG_R_REMOTE3_HIGH
 
- LM83_REG_R_REMOTE3_TEMP
 
- LM83_REG_R_STATUS1
 
- LM83_REG_R_STATUS2
 
- LM83_REG_R_TCRIT
 
- LM83_REG_W_CONFIG
 
- LM83_REG_W_LOCAL_HIGH
 
- LM83_REG_W_REMOTE1_HIGH
 
- LM83_REG_W_REMOTE2_HIGH
 
- LM83_REG_W_REMOTE3_HIGH
 
- LM83_REG_W_TCRIT
 
- LM85_COMPANY_ANALOG_DEV
 
- LM85_COMPANY_NATIONAL
 
- LM85_COMPANY_SMSC
 
- LM85_CONFIG_INTERVAL
 
- LM85_DATA_INTERVAL
 
- LM85_REG_AFAN_CONFIG
 
- LM85_REG_AFAN_CRITICAL
 
- LM85_REG_AFAN_HYST1
 
- LM85_REG_AFAN_HYST2
 
- LM85_REG_AFAN_LIMIT
 
- LM85_REG_AFAN_MINPWM
 
- LM85_REG_AFAN_RANGE
 
- LM85_REG_AFAN_SPIKE1
 
- LM85_REG_ALARM1
 
- LM85_REG_ALARM2
 
- LM85_REG_COMPANY
 
- LM85_REG_CONFIG
 
- LM85_REG_FAN
 
- LM85_REG_FAN_MIN
 
- LM85_REG_IN
 
- LM85_REG_IN_MAX
 
- LM85_REG_IN_MIN
 
- LM85_REG_PWM
 
- LM85_REG_TEMP
 
- LM85_REG_TEMP_MAX
 
- LM85_REG_TEMP_MIN
 
- LM85_REG_VERSTEP
 
- LM85_REG_VID
 
- LM85_VERSTEP_ADM1027
 
- LM85_VERSTEP_ADT7463
 
- LM85_VERSTEP_ADT7463C
 
- LM85_VERSTEP_ADT7468_1
 
- LM85_VERSTEP_ADT7468_2
 
- LM85_VERSTEP_EMC6D100_A0
 
- LM85_VERSTEP_EMC6D100_A1
 
- LM85_VERSTEP_EMC6D102
 
- LM85_VERSTEP_EMC6D103S
 
- LM85_VERSTEP_EMC6D103_A0
 
- LM85_VERSTEP_EMC6D103_A1
 
- LM85_VERSTEP_LM85B
 
- LM85_VERSTEP_LM85C
 
- LM85_VERSTEP_LM96000_1
 
- LM85_VERSTEP_LM96000_2
 
- LM87_AIN_LIMITS
 
- LM87_ALARM_TEMP_EXT1
 
- LM87_ALARM_TEMP_INT
 
- LM87_INT_TEMP
 
- LM87_IN_LIMITS
 
- LM87_REG_AIN
 
- LM87_REG_AIN_MAX
 
- LM87_REG_AIN_MIN
 
- LM87_REG_ALARMS1
 
- LM87_REG_ALARMS2
 
- LM87_REG_AOUT
 
- LM87_REG_CHANNEL_MODE
 
- LM87_REG_COMPANY_ID
 
- LM87_REG_CONFIG
 
- LM87_REG_FAN
 
- LM87_REG_FAN_MIN
 
- LM87_REG_IN
 
- LM87_REG_IN_MAX
 
- LM87_REG_IN_MIN
 
- LM87_REG_REVISION
 
- LM87_REG_TEMP_EXT1
 
- LM87_REG_TEMP_HW_EXT
 
- LM87_REG_TEMP_HW_EXT_LOCK
 
- LM87_REG_TEMP_HW_INT
 
- LM87_REG_TEMP_HW_INT_LOCK
 
- LM87_REG_TEMP_INT
 
- LM87_REG_VID4
 
- LM87_REG_VID_FAN_DIV
 
- LM87_TEMP_EXT1_LIMITS
 
- LM87_TEMP_INT_LIMITS
 
- LM90_FLAG_ADT7461_EXT
 
- LM90_HAVE_BROKEN_ALERT
 
- LM90_HAVE_EMERGENCY
 
- LM90_HAVE_EMERGENCY_ALARM
 
- LM90_HAVE_OFFSET
 
- LM90_HAVE_REM_LIMIT_EXT
 
- LM90_HAVE_TEMP3
 
- LM90_LOCAL_TEMPERATURE
 
- LM90_MAX_CONVRATE_MS
 
- LM90_PAUSE_FOR_CONFIG
 
- LM90_REG_R_CHIP_ID
 
- LM90_REG_R_CONFIG1
 
- LM90_REG_R_CONFIG2
 
- LM90_REG_R_CONVRATE
 
- LM90_REG_R_LOCAL_CRIT
 
- LM90_REG_R_LOCAL_HIGH
 
- LM90_REG_R_LOCAL_LOW
 
- LM90_REG_R_LOCAL_TEMP
 
- LM90_REG_R_MAN_ID
 
- LM90_REG_R_REMOTE_CRIT
 
- LM90_REG_R_REMOTE_HIGHH
 
- LM90_REG_R_REMOTE_HIGHL
 
- LM90_REG_R_REMOTE_LOWH
 
- LM90_REG_R_REMOTE_LOWL
 
- LM90_REG_R_REMOTE_OFFSH
 
- LM90_REG_R_REMOTE_OFFSL
 
- LM90_REG_R_REMOTE_TEMPH
 
- LM90_REG_R_REMOTE_TEMPL
 
- LM90_REG_R_STATUS
 
- LM90_REG_R_TCRIT_HYST
 
- LM90_REG_W_CONFIG1
 
- LM90_REG_W_CONFIG2
 
- LM90_REG_W_CONVRATE
 
- LM90_REG_W_LOCAL_CRIT
 
- LM90_REG_W_LOCAL_HIGH
 
- LM90_REG_W_LOCAL_LOW
 
- LM90_REG_W_REMOTE_CRIT
 
- LM90_REG_W_REMOTE_HIGHH
 
- LM90_REG_W_REMOTE_HIGHL
 
- LM90_REG_W_REMOTE_LOWH
 
- LM90_REG_W_REMOTE_LOWL
 
- LM90_REG_W_REMOTE_OFFSH
 
- LM90_REG_W_REMOTE_OFFSL
 
- LM90_REG_W_TCRIT_HYST
 
- LM90_REMOTE2_TEMPERATURE
 
- LM90_REMOTE_TEMPERATURE
 
- LM90_STATUS_LHIGH
 
- LM90_STATUS_LLOW
 
- LM90_STATUS_LTHRM
 
- LM90_STATUS_RHIGH
 
- LM90_STATUS_RLOW
 
- LM90_STATUS_ROPEN
 
- LM90_STATUS_RTHRM
 
- LM92_REG_CONFIG
 
- LM92_REG_MAN_ID
 
- LM92_REG_TEMP
 
- LM92_REG_TEMP_CRIT
 
- LM92_REG_TEMP_HIGH
 
- LM92_REG_TEMP_HYST
 
- LM92_REG_TEMP_LOW
 
- LM93_ALARMS_FROM_REG
 
- LM93_ALARM_D1_ERR
 
- LM93_ALARM_D2_ERR
 
- LM93_ALARM_DVDDP1_ERR
 
- LM93_ALARM_DVDDP2_ERR
 
- LM93_ALARM_FAN1
 
- LM93_ALARM_FAN2
 
- LM93_ALARM_FAN3
 
- LM93_ALARM_FAN4
 
- LM93_ALARM_IN1
 
- LM93_ALARM_IN10
 
- LM93_ALARM_IN11
 
- LM93_ALARM_IN12
 
- LM93_ALARM_IN13
 
- LM93_ALARM_IN14
 
- LM93_ALARM_IN15
 
- LM93_ALARM_IN16
 
- LM93_ALARM_IN2
 
- LM93_ALARM_IN3
 
- LM93_ALARM_IN4
 
- LM93_ALARM_IN5
 
- LM93_ALARM_IN6
 
- LM93_ALARM_IN7
 
- LM93_ALARM_IN8
 
- LM93_ALARM_IN9
 
- LM93_ALARM_PH1_ERR
 
- LM93_ALARM_PH2_ERR
 
- LM93_ALARM_SCSI1_ERR
 
- LM93_ALARM_SCSI2_ERR
 
- LM93_ALARM_TEMP1
 
- LM93_ALARM_TEMP2
 
- LM93_ALARM_TEMP3
 
- LM93_AUTO_BOOST_HYST_FROM_REGS
 
- LM93_AUTO_BOOST_HYST_TO_REG
 
- LM93_FAN_FROM_REG
 
- LM93_FAN_TO_REG
 
- LM93_GPI_FROM_REG
 
- LM93_INTERVAL_FROM_REG
 
- LM93_INTERVAL_TO_REG
 
- LM93_IN_FROM_REG
 
- LM93_IN_MAX_FROM_REG
 
- LM93_IN_MIN_FROM_REG
 
- LM93_IN_REL_FROM_REG
 
- LM93_IN_REL_TO_REG
 
- LM93_IN_TO_REG
 
- LM93_MFR_ID
 
- LM93_MFR_ID_PROTOTYPE
 
- LM93_PROCHOT_TO_REG
 
- LM93_PWM_CTL1
 
- LM93_PWM_CTL2
 
- LM93_PWM_CTL3
 
- LM93_PWM_CTL4
 
- LM93_PWM_FREQ_FROM_REG
 
- LM93_PWM_FREQ_TO_REG
 
- LM93_PWM_FROM_REG
 
- LM93_PWM_MAP_HI_FREQ
 
- LM93_PWM_MAP_LO_FREQ
 
- LM93_PWM_TO_REG
 
- LM93_RAMP_FROM_REG
 
- LM93_RAMP_MAX
 
- LM93_RAMP_MIN
 
- LM93_RAMP_TO_REG
 
- LM93_REG_BOOST
 
- LM93_REG_BOOST_HYST
 
- LM93_REG_BOOST_HYST_12
 
- LM93_REG_BOOST_HYST_34
 
- LM93_REG_CONFIG
 
- LM93_REG_FAN
 
- LM93_REG_FAN_MIN
 
- LM93_REG_GPI
 
- LM93_REG_GPI_ERR_MASK
 
- LM93_REG_GPI_VID_CTL
 
- LM93_REG_HOST_ERROR_1
 
- LM93_REG_IN
 
- LM93_REG_IN_MAX
 
- LM93_REG_IN_MIN
 
- LM93_REG_MFR_ID
 
- LM93_REG_MISC_ERR_MASK
 
- LM93_REG_PROCHOT_AVG
 
- LM93_REG_PROCHOT_CUR
 
- LM93_REG_PROCHOT_INTERVAL
 
- LM93_REG_PROCHOT_MAX
 
- LM93_REG_PROCHOT_OVERRIDE
 
- LM93_REG_PWM_CTL
 
- LM93_REG_PWM_MIN_HYST
 
- LM93_REG_PWM_MIN_HYST_12
 
- LM93_REG_PWM_MIN_HYST_34
 
- LM93_REG_PWM_RAMP_CTL
 
- LM93_REG_SFC1
 
- LM93_REG_SFC2
 
- LM93_REG_SF_TACH_TO_PWM
 
- LM93_REG_SLEEP_CONTROL
 
- LM93_REG_STATUS_CONTROL
 
- LM93_REG_TEMP
 
- LM93_REG_TEMP_BASE
 
- LM93_REG_TEMP_MAX
 
- LM93_REG_TEMP_MIN
 
- LM93_REG_TEMP_OFFSET
 
- LM93_REG_VCCP_LIMIT_OFF
 
- LM93_REG_VER
 
- LM93_REG_VID
 
- LM93_SMBUS_FUNC_FULL
 
- LM93_SMBUS_FUNC_MIN
 
- LM93_SPINUP_TIME_FROM_REG
 
- LM93_SPINUP_TIME_TO_REG
 
- LM93_TEMP_AUTO_OFFSET_FROM_REG
 
- LM93_TEMP_AUTO_OFFSET_TO_REG
 
- LM93_TEMP_FROM_REG
 
- LM93_TEMP_MAX
 
- LM93_TEMP_MIN
 
- LM93_TEMP_OFFSET_FROM_REG
 
- LM93_TEMP_OFFSET_MAX0
 
- LM93_TEMP_OFFSET_MAX1
 
- LM93_TEMP_OFFSET_MIN
 
- LM93_TEMP_OFFSET_MODE_FROM_REG
 
- LM93_TEMP_OFFSET_TO_REG
 
- LM93_TEMP_TO_REG
 
- LM93_VID_FROM_REG
 
- LM94_MFR_ID
 
- LM94_MFR_ID_2
 
- LM94_MFR_ID_PROTOTYPE
 
- LM95231_CHIP_ID
 
- LM95233_CHIP_ID
 
- LM95234_CHIP_ID
 
- LM95234_REG_CHIP_ID
 
- LM95234_REG_CONFIG
 
- LM95234_REG_CONVRATE
 
- LM95234_REG_MAN_ID
 
- LM95234_REG_OFFSET
 
- LM95234_REG_REM_MODEL
 
- LM95234_REG_REM_MODEL_STS
 
- LM95234_REG_STATUS
 
- LM95234_REG_STS_FAULT
 
- LM95234_REG_STS_TCRIT1
 
- LM95234_REG_STS_TCRIT2
 
- LM95234_REG_TCRIT1
 
- LM95234_REG_TCRIT2
 
- LM95234_REG_TCRIT_HYST
 
- LM95234_REG_TEMPH
 
- LM95234_REG_TEMPL
 
- LM95234_REG_UTEMPH
 
- LM95234_REG_UTEMPL
 
- LM95235_REVISION
 
- LM95241_CHIP_ID
 
- LM95241_REG_RW_CONFIG
 
- LM95241_REG_RW_REMOTE_MODEL
 
- LM95241_REG_RW_REM_FILTER
 
- LM95241_REG_RW_TRUTHERM
 
- LM95241_REG_R_CHIP_ID
 
- LM95241_REG_R_LOCAL_TEMPH
 
- LM95241_REG_R_LOCAL_TEMPL
 
- LM95241_REG_R_MAN_ID
 
- LM95241_REG_R_REMOTE1_TEMPH
 
- LM95241_REG_R_REMOTE1_TEMPL
 
- LM95241_REG_R_REMOTE2_TEMPH
 
- LM95241_REG_R_REMOTE2_TEMPL
 
- LM95241_REG_R_STATUS
 
- LM95241_REG_W_ONE_SHOT
 
- LM95245_REG_RW_COMMON_HYSTERESIS
 
- LM95245_REG_RW_CONFIG1
 
- LM95245_REG_RW_CONFIG2
 
- LM95245_REG_RW_CONVERS_RATE
 
- LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT
 
- LM95245_REG_RW_REMOTE_OFFH
 
- LM95245_REG_RW_REMOTE_OFFL
 
- LM95245_REG_RW_REMOTE_OS_LIMIT
 
- LM95245_REG_RW_REMOTE_TCRIT_LIMIT
 
- LM95245_REG_R_CHIP_ID
 
- LM95245_REG_R_LOCAL_TEMPH_S
 
- LM95245_REG_R_LOCAL_TEMPL_S
 
- LM95245_REG_R_MAN_ID
 
- LM95245_REG_R_REMOTE_TEMPH_S
 
- LM95245_REG_R_REMOTE_TEMPH_U
 
- LM95245_REG_R_REMOTE_TEMPL_S
 
- LM95245_REG_R_REMOTE_TEMPL_U
 
- LM95245_REG_R_STATUS1
 
- LM95245_REG_R_STATUS2
 
- LM95245_REG_W_ONE_SHOT
 
- LM95245_REVISION
 
- LM96080_REG_CONV_RATE
 
- LM96080_REG_DEV_ID
 
- LM96080_REG_MAN_ID
 
- LM96163_MAX_CONVRATE_HZ
 
- LM96163_REG_CONFIG_ENHANCED
 
- LM96163_REG_REMOTE_TEMP_U_LSB
 
- LM96163_REG_REMOTE_TEMP_U_MSB
 
- LM96163_REG_TRUTHERM
 
- LMAC2_PRPH_OFFSET
 
- LMACTYPE_STR_LEN
 
- LMAC_H
 
- LMAC_ID_MASK
 
- LMAC_INTR_LINK_DOWN
 
- LMAC_INTR_LINK_UP
 
- LMAC_MODE_100G_R
 
- LMAC_MODE_10G_R
 
- LMAC_MODE_25G_R
 
- LMAC_MODE_40G_R
 
- LMAC_MODE_50G_R
 
- LMAC_MODE_MAX
 
- LMAC_MODE_QSGMII
 
- LMAC_MODE_RXAUI
 
- LMAC_MODE_SGMII
 
- LMAC_MODE_USXGMII
 
- LMAC_MODE_XAUI
 
- LMAC_RD_WR
 
- LMAC_TYPE
 
- LMAC_VER_OFFSET_9113
 
- LMAC_VER_OFFSET_9116
 
- LMCEMR
 
- LMCFG
 
- LMCFG_LMA_DS
 
- LMCFG_LMA_TS
 
- LMCFG_LMC_DS
 
- LMCFG_LMC_TS
 
- LMCFG_LMD_DS
 
- LMCFG_LMD_TS
 
- LMCIOCCLEARLMCSTATS
 
- LMCIOCDUMPEVENTLOG
 
- LMCIOCGETLMCSTATS
 
- LMCIOCGETXINFO
 
- LMCIOCGINFO
 
- LMCIOCIFTYPE
 
- LMCIOCRESET
 
- LMCIOCSETCIRCUIT
 
- LMCIOCSINFO
 
- LMCIOCT1CONTROL
 
- LMCIOCUNUSEDATM
 
- LMCIOCXILINX
 
- LMC_ADAP_DS3
 
- LMC_ADAP_HSSI
 
- LMC_ADAP_SSI
 
- LMC_ADAP_T1
 
- LMC_CARDTYPE_DS3
 
- LMC_CARDTYPE_HSSI
 
- LMC_CARDTYPE_SSI
 
- LMC_CARDTYPE_T1
 
- LMC_CARDTYPE_UNKNOWN
 
- LMC_CHAR_MASK0
 
- LMC_CHAR_MASK2
 
- LMC_CONFIG
 
- LMC_CONFIG_BG2
 
- LMC_CONFIG_PBANK_LSB
 
- LMC_CONFIG_RANK_ENA
 
- LMC_CONFIG_ROW_LSB
 
- LMC_CONSOLE_LOG
 
- LMC_CONTROL
 
- LMC_CONTROL_RDIMM
 
- LMC_CONTROL_XOR_BANK
 
- LMC_CRC_LEN_16
 
- LMC_CRC_LEN_32
 
- LMC_CSR_READ
 
- LMC_CSR_WRITE
 
- LMC_CTL_CABLE_LENGTH_GT_100FT
 
- LMC_CTL_CABLE_LENGTH_LT_100FT
 
- LMC_CTL_CARDTYPE_LMC1000
 
- LMC_CTL_CARDTYPE_LMC1200
 
- LMC_CTL_CARDTYPE_LMC5200
 
- LMC_CTL_CARDTYPE_LMC5245
 
- LMC_CTL_CIRCUIT_TYPE_E1
 
- LMC_CTL_CIRCUIT_TYPE_T1
 
- LMC_CTL_CLOCK_SOURCE_EXT
 
- LMC_CTL_CLOCK_SOURCE_INT
 
- LMC_CTL_CRC_BYTESIZE_2
 
- LMC_CTL_CRC_BYTESIZE_4
 
- LMC_CTL_CRC_LENGTH_16
 
- LMC_CTL_CRC_LENGTH_32
 
- LMC_CTL_OFF
 
- LMC_CTL_ON
 
- LMC_DDR_PLL_CTL
 
- LMC_DDR_PLL_CTL_DDR4
 
- LMC_DEBUGFS_ENT
 
- LMC_DEC_SR
 
- LMC_DEC_ST
 
- LMC_DS3_LED0
 
- LMC_DS3_LED1
 
- LMC_DS3_LED2
 
- LMC_DS3_LED3
 
- LMC_DSTS_ERRSUM
 
- LMC_ECC_PARITY_TEST
 
- LMC_ECC_SYND
 
- LMC_EVENTLOGARGS
 
- LMC_EVENTLOGSIZE
 
- LMC_EVENT_BADPKTSURGE
 
- LMC_EVENT_FORCEDRESET
 
- LMC_EVENT_INT
 
- LMC_EVENT_INTEND
 
- LMC_EVENT_LOG
 
- LMC_EVENT_RCVEND
 
- LMC_EVENT_RCVINT
 
- LMC_EVENT_RESET1
 
- LMC_EVENT_RESET2
 
- LMC_EVENT_TBUSY0
 
- LMC_EVENT_TBUSY1
 
- LMC_EVENT_WATCHDOG
 
- LMC_EVENT_XMT
 
- LMC_EVENT_XMTEND
 
- LMC_EVENT_XMTINT
 
- LMC_EVENT_XMTINTTMO
 
- LMC_EVENT_XMTPRCTMO
 
- LMC_EXT_TIME
 
- LMC_FADR
 
- LMC_FADR_FBANK
 
- LMC_FADR_FBUNK
 
- LMC_FADR_FCOL
 
- LMC_FADR_FDIMM
 
- LMC_FADR_FROW
 
- LMC_FADR_SCRAMBLED
 
- LMC_FRAMER_REG0_AIS
 
- LMC_FRAMER_REG0_CIS
 
- LMC_FRAMER_REG0_DLOS
 
- LMC_FRAMER_REG0_LOC
 
- LMC_FRAMER_REG0_OOFS
 
- LMC_FRAMER_REG10_XBIT
 
- LMC_FRAMER_REG9_RBLUE
 
- LMC_GEP_CLK
 
- LMC_GEP_DATA
 
- LMC_GEP_DP
 
- LMC_GEP_HSSI_CLOCK
 
- LMC_GEP_HSSI_ST
 
- LMC_GEP_INIT
 
- LMC_GEP_MODE
 
- LMC_GEP_RESET
 
- LMC_GEP_SSI_GENERATOR
 
- LMC_GEP_SSI_TXCLOCK
 
- LMC_INT
 
- LMC_INT_CE
 
- LMC_INT_DDR_ERR
 
- LMC_INT_DED_ERR
 
- LMC_INT_ENA_ALL
 
- LMC_INT_ENA_W1C
 
- LMC_INT_ENA_W1S
 
- LMC_INT_EN_DDR_ERROR_ALERT_ENA
 
- LMC_INT_EN_DLCRAM_DED_ERR
 
- LMC_INT_EN_DLCRAM_SEC_ERR
 
- LMC_INT_INTR_DED_ENA
 
- LMC_INT_INTR_NXM_WR_ENA
 
- LMC_INT_INTR_SEC_ENA
 
- LMC_INT_NXM_WR_MASK
 
- LMC_INT_SEC_ERR
 
- LMC_INT_UE
 
- LMC_INT_W1S
 
- LMC_LINK_DOWN
 
- LMC_LINK_UP
 
- LMC_MESSAGE_SIZE
 
- LMC_MII16_DS3_BIST
 
- LMC_MII16_DS3_CRC
 
- LMC_MII16_DS3_DLOS
 
- LMC_MII16_DS3_LNLBK
 
- LMC_MII16_DS3_RAIS
 
- LMC_MII16_DS3_SCRAM
 
- LMC_MII16_DS3_SCRAM_LARS
 
- LMC_MII16_DS3_TAIS
 
- LMC_MII16_DS3_TRLBK
 
- LMC_MII16_DS3_ZERO
 
- LMC_MII16_FIFO_RESET
 
- LMC_MII16_HSSI_CA
 
- LMC_MII16_HSSI_CRC
 
- LMC_MII16_HSSI_LA
 
- LMC_MII16_HSSI_LB
 
- LMC_MII16_HSSI_LC
 
- LMC_MII16_HSSI_TA
 
- LMC_MII16_HSSI_TM
 
- LMC_MII16_LED0
 
- LMC_MII16_LED1
 
- LMC_MII16_LED2
 
- LMC_MII16_LED3
 
- LMC_MII16_LED_ALL
 
- LMC_MII16_SSI_CRC
 
- LMC_MII16_SSI_CTS
 
- LMC_MII16_SSI_DCD
 
- LMC_MII16_SSI_DSR
 
- LMC_MII16_SSI_DTR
 
- LMC_MII16_SSI_LL
 
- LMC_MII16_SSI_LOOP
 
- LMC_MII16_SSI_RI
 
- LMC_MII16_SSI_RL
 
- LMC_MII16_SSI_RTS
 
- LMC_MII16_SSI_TM
 
- LMC_MII16_T1_CRC
 
- LMC_MII16_T1_FIFO_RESET
 
- LMC_MII16_T1_INTR
 
- LMC_MII16_T1_LED0
 
- LMC_MII16_T1_LED1
 
- LMC_MII16_T1_LED2
 
- LMC_MII16_T1_LED3
 
- LMC_MII16_T1_ONESEC
 
- LMC_MII16_T1_RST
 
- LMC_MII16_T1_UNUSED1
 
- LMC_MII16_T1_UNUSED2
 
- LMC_MII16_T1_XOE
 
- LMC_MII16_T1_Z
 
- LMC_MII17_SSI_CABLE_MASK
 
- LMC_MII17_SSI_CABLE_SHIFT
 
- LMC_MII_LedBitPos
 
- LMC_MII_LedMask
 
- LMC_MII_SYNC
 
- LMC_MTU
 
- LMC_NET
 
- LMC_NXM_FADR
 
- LMC_OTHER_SIZE
 
- LMC_PCI_TIME
 
- LMC_PPP
 
- LMC_PRINTF_ARGS
 
- LMC_PRINTF_FMT
 
- LMC_RAW
 
- LMC_RDES_COLLISION_SEEN
 
- LMC_RDES_CRC_ERROR
 
- LMC_RDES_DATA_TYPE
 
- LMC_RDES_DRIBBLING_BIT
 
- LMC_RDES_ERROR_MASK
 
- LMC_RDES_ERROR_SUMMARY
 
- LMC_RDES_FIRST_DESCRIPTOR
 
- LMC_RDES_FRAME_LENGTH
 
- LMC_RDES_FRAME_TOO_LONG
 
- LMC_RDES_FRAME_TYPE
 
- LMC_RDES_LAST_DESCRIPTOR
 
- LMC_RDES_LENGTH_ERROR
 
- LMC_RDES_MULTICAST_FRAME
 
- LMC_RDES_OVERFLOW
 
- LMC_RDES_OWN_BIT
 
- LMC_RDES_RCV_WATCHDOG_TIMEOUT
 
- LMC_RDES_REPORT_ON_MII_ERR
 
- LMC_RDES_RUNT_FRAME
 
- LMC_REG_RANGE
 
- LMC_RXDESCS
 
- LMC_SCRAM_FADR
 
- LMC_T1F_READ
 
- LMC_T1F_WRITE
 
- LMC_TDES_ADD_CRC_DISABLE
 
- LMC_TDES_DISABLE_PADDING
 
- LMC_TDES_END_OF_RING
 
- LMC_TDES_FIRST_BUFFER_SIZE
 
- LMC_TDES_FIRST_SEGMENT
 
- LMC_TDES_HASH_FILTERING
 
- LMC_TDES_INTERRUPT_ON_COMPLETION
 
- LMC_TDES_INVERSE_FILTERING
 
- LMC_TDES_LAST_SEGMENT
 
- LMC_TDES_SECOND_ADDR_CHAINED
 
- LMC_TDES_SECOND_BUFFER_SIZE
 
- LMC_TDES_SETUP_PACKET
 
- LMC_TXDESCS
 
- LMC_XINFO
 
- LME2510_C_LG
 
- LME2510_C_RS2000
 
- LME2510_C_S0194
 
- LME2510_C_S7395
 
- LME2510_LG
 
- LME2510_S0194
 
- LMEM_DMA_CTRL
 
- LME_ALL_PIDS
 
- LME_CLEAR_PID
 
- LME_ST_ON_W
 
- LME_VOLTAGE_H
 
- LME_VOLTAGE_L
 
- LME_ZERO_PID
 
- LMISC
 
- LMI_ANSI
 
- LMI_ANSI_CISCO_ALIVE
 
- LMI_ANSI_CISCO_PVCSTAT
 
- LMI_ANSI_CISCO_REPTYPE
 
- LMI_ANSI_LENGTH
 
- LMI_ANSI_LOCKSHIFT
 
- LMI_BASE_ADDR
 
- LMI_BURST_LENGTH
 
- LMI_CALLREF
 
- LMI_CCITT
 
- LMI_CCITT_ALIVE
 
- LMI_CCITT_ANSI_DLCI
 
- LMI_CCITT_CISCO_LENGTH
 
- LMI_CCITT_PVCSTAT
 
- LMI_CCITT_REPTYPE
 
- LMI_CISCO
 
- LMI_CISCO_DLCI
 
- LMI_DEFAULT
 
- LMI_ERR
 
- LMI_FIFO_WATERMARK
 
- LMI_FULLREP
 
- LMI_INTEGRITY
 
- LMI_INTEG_LEN
 
- LMI_LM3S_DEVEL_BOARD_PID
 
- LMI_LM3S_EVAL_BOARD_PID
 
- LMI_LM3S_ICDI_BOARD_PID
 
- LMI_NONE
 
- LMI_REPT_LEN
 
- LMI_SINGLE
 
- LMI_SOFT_RESET
 
- LMI_STATUS
 
- LMI_STATUS_ENQUIRY
 
- LMI_UMC_SOFT_RESET
 
- LMK_SEED_SIZE
 
- LMMIO_DIRECT0_BASE
 
- LMMIO_DIRECT0_MASK
 
- LMMIO_DIRECT0_ROUTE
 
- LMMIO_DIST_BASE
 
- LMMIO_DIST_MASK
 
- LMMIO_DIST_ROUTE
 
- LMM_TO_FW_CAPS
 
- LMODE_CMD0
 
- LMODE_CMD1
 
- LMODE_EN
 
- LMODE_SLV_ACT
 
- LMP91000_DRV_NAME
 
- LMP91000_REG_LOCK
 
- LMP91000_REG_MODECN
 
- LMP91000_REG_MODECN_3LEAD
 
- LMP91000_REG_MODECN_TEMP
 
- LMP91000_REG_REFCN
 
- LMP91000_REG_REFCN_50_ZERO
 
- LMP91000_REG_REFCN_EXT_REF
 
- LMP91000_REG_TIACN
 
- LMP91000_REG_TIACN_GAIN_SHIFT
 
- LMP91000_TEMP_BASE
 
- LMPM_CHICK
 
- LMPM_CHICK_EXTENDED_ADDR_SPACE
 
- LMPM_PAGE_PASS_NOTIF
 
- LMPM_PAGE_PASS_NOTIF_POS
 
- LMPM_PMG_EN
 
- LMPM_SECURE_CPU1_HDR_MEM_SPACE
 
- LMPM_SECURE_CPU2_HDR_MEM_SPACE
 
- LMPM_SECURE_UCODE_LOAD_CPU1_HDR_ADDR
 
- LMPM_SECURE_UCODE_LOAD_CPU2_HDR_ADDR
 
- LMPROTCFG
 
- LMPROTERR
 
- LMPROTMAX
 
- LMPROTMIN
 
- LMPWR
 
- LMPWRSTAT
 
- LMPWRSTAT_MC_PWR_ACT
 
- LMPWRSTAT_MC_PWR_CNT
 
- LMPWRSTAT_MC_PWR_DPD
 
- LMPWRSTAT_MC_PWR_SRM
 
- LMPWR_MC_PWR_ACT
 
- LMPWR_MC_PWR_CNT
 
- LMPWR_MC_PWR_DPD
 
- LMPWR_MC_PWR_SRM
 
- LMP_3SLOT
 
- LMP_5SLOT
 
- LMP_ALAW
 
- LMP_CSB_MASTER
 
- LMP_CSB_SLAVE
 
- LMP_CVSD
 
- LMP_EDR_2M
 
- LMP_EDR_3M
 
- LMP_EDR_3SLOT
 
- LMP_EDR_3S_ESCO
 
- LMP_EDR_5SLOT
 
- LMP_EDR_ESCO_2M
 
- LMP_EDR_ESCO_3M
 
- LMP_ENCRYPT
 
- LMP_ESCO
 
- LMP_EV4
 
- LMP_EV5
 
- LMP_EXTFEATURES
 
- LMP_EXT_INQ
 
- LMP_HOLD
 
- LMP_HOST_LE
 
- LMP_HOST_LE_BREDR
 
- LMP_HOST_SC
 
- LMP_HOST_SSP
 
- LMP_HV2
 
- LMP_HV3
 
- LMP_INQ_TX_PWR
 
- LMP_LE
 
- LMP_LSTO
 
- LMP_NO_BREDR
 
- LMP_NO_FLUSH
 
- LMP_PARK
 
- LMP_PAUSE_ENC
 
- LMP_PCONTROL
 
- LMP_PING
 
- LMP_PSCHEME
 
- LMP_QUALITY
 
- LMP_RSSI
 
- LMP_RSSI_INQ
 
- LMP_RSWITCH
 
- LMP_SC
 
- LMP_SCO
 
- LMP_SIMPLE_PAIR
 
- LMP_SIMUL_LE_BR
 
- LMP_SNIFF
 
- LMP_SNIFF_SUBR
 
- LMP_SOFFSET
 
- LMP_SYNC_SCAN
 
- LMP_SYNC_TRAIN
 
- LMP_TACCURACY
 
- LMP_TRANSPARENT
 
- LMP_ULAW
 
- LMREFRESH
 
- LMREFRESH_TREF
 
- LMRST
 
- LMRST_MC_RST
 
- LMS
 
- LMSW_SOURCE_DATA
 
- LMSW_SOURCE_DATA_SHIFT
 
- LMTH0
 
- LMTIM
 
- LMTIM_TDPL
 
- LMTIM_TRAS
 
- LMTIM_TRC
 
- LMTIM_TRCD
 
- LMTIM_TRP
 
- LMTS_BUSOFF_REQ
 
- LMTS_BUSON_REQ
 
- LMTS_CAN_CONF_REQ
 
- LMTYPE
 
- LMTYPE_BKSZ
 
- LMTYPE_BKSZ_1
 
- LMTYPE_BKSZ_2
 
- LMTYPE_CASLAT
 
- LMTYPE_CASLAT_1
 
- LMTYPE_CASLAT_2
 
- LMTYPE_CASLAT_3
 
- LMTYPE_COLSZ
 
- LMTYPE_COLSZ_10
 
- LMTYPE_COLSZ_11
 
- LMTYPE_COLSZ_12
 
- LMTYPE_COLSZ_7
 
- LMTYPE_COLSZ_8
 
- LMTYPE_COLSZ_9
 
- LMTYPE_ROWSZ
 
- LMTYPE_ROWSZ_11
 
- LMTYPE_ROWSZ_12
 
- LMTYPE_ROWSZ_13
 
- LMU_11BIT_LSB_MASK
 
- LMU_11BIT_MSB_SHIFT
 
- LMU_EVENT_MONITOR_DONE
 
- LMU_IMAX_10mA
 
- LMU_IMAX_11mA
 
- LMU_IMAX_12mA
 
- LMU_IMAX_13mA
 
- LMU_IMAX_14mA
 
- LMU_IMAX_15mA
 
- LMU_IMAX_16mA
 
- LMU_IMAX_17mA
 
- LMU_IMAX_18mA
 
- LMU_IMAX_19mA
 
- LMU_IMAX_20mA
 
- LMU_IMAX_21mA
 
- LMU_IMAX_22mA
 
- LMU_IMAX_23mA
 
- LMU_IMAX_24mA
 
- LMU_IMAX_25mA
 
- LMU_IMAX_26mA
 
- LMU_IMAX_27mA
 
- LMU_IMAX_28mA
 
- LMU_IMAX_29mA
 
- LMU_IMAX_30mA
 
- LMU_IMAX_5mA
 
- LMU_IMAX_6mA
 
- LMU_IMAX_7mA
 
- LMU_IMAX_8mA
 
- LMU_IMAX_9mA
 
- LMU_MAX_ID
 
- LM_0
 
- LM_1
 
- LM_2
 
- LM_3
 
- LM_4
 
- LM_5
 
- LM_6
 
- LM_ADDR_0_INDIRECT
 
- LM_ADDR_1_INDIRECT
 
- LM_BLEND0_BG_ALPHA
 
- LM_BLEND0_CONST_ALPHA
 
- LM_BLEND0_FG_ALPHA
 
- LM_BLEND0_OP
 
- LM_BLK
 
- LM_BORDER_COLOR_0
 
- LM_BORDER_COLOR_1
 
- LM_BS
 
- LM_BURST_LENGTH
 
- LM_CARD
 
- LM_CHIP_ID
 
- LM_CONTROL__LoopbackFifoPtr_MASK
 
- LM_CONTROL__LoopbackFifoPtr__SHIFT
 
- LM_CONTROL__LoopbackHalfRate_MASK
 
- LM_CONTROL__LoopbackHalfRate__SHIFT
 
- LM_CONTROL__LoopbackSelect_MASK
 
- LM_CONTROL__LoopbackSelect__SHIFT
 
- LM_CONTROL__PRBSPCIeLbSelect_MASK
 
- LM_CONTROL__PRBSPCIeLbSelect__SHIFT
 
- LM_CTL
 
- LM_DCVS_LIMIT
 
- LM_FG_COLOR_FILL_COLOR_0
 
- LM_FG_COLOR_FILL_COLOR_1
 
- LM_FG_COLOR_FILL_SIZE
 
- LM_FG_COLOR_FILL_XY
 
- LM_FIFO_WATERMARK
 
- LM_FLAG_ANY
 
- LM_FLAG_NOEXP
 
- LM_FLAG_PRIORITY
 
- LM_FLAG_TRY
 
- LM_FLAG_TRY_1CB
 
- LM_LANEENABLE__LANE_enable_MASK
 
- LM_LANEENABLE__LANE_enable__SHIFT
 
- LM_MAX
 
- LM_MEM_READ
 
- LM_MEM_WRITE
 
- LM_OP_MODE
 
- LM_OUT_CANCELED
 
- LM_OUT_ERROR
 
- LM_OUT_SIZE
 
- LM_OUT_ST_MASK
 
- LM_PCIERXMUX0__RXLANE0_MASK
 
- LM_PCIERXMUX0__RXLANE0__SHIFT
 
- LM_PCIERXMUX0__RXLANE1_MASK
 
- LM_PCIERXMUX0__RXLANE1__SHIFT
 
- LM_PCIERXMUX0__RXLANE2_MASK
 
- LM_PCIERXMUX0__RXLANE2__SHIFT
 
- LM_PCIERXMUX0__RXLANE3_MASK
 
- LM_PCIERXMUX0__RXLANE3__SHIFT
 
- LM_PCIERXMUX1__RXLANE4_MASK
 
- LM_PCIERXMUX1__RXLANE4__SHIFT
 
- LM_PCIERXMUX1__RXLANE5_MASK
 
- LM_PCIERXMUX1__RXLANE5__SHIFT
 
- LM_PCIERXMUX1__RXLANE6_MASK
 
- LM_PCIERXMUX1__RXLANE6__SHIFT
 
- LM_PCIERXMUX1__RXLANE7_MASK
 
- LM_PCIERXMUX1__RXLANE7__SHIFT
 
- LM_PCIERXMUX2__RXLANE10_MASK
 
- LM_PCIERXMUX2__RXLANE10__SHIFT
 
- LM_PCIERXMUX2__RXLANE11_MASK
 
- LM_PCIERXMUX2__RXLANE11__SHIFT
 
- LM_PCIERXMUX2__RXLANE8_MASK
 
- LM_PCIERXMUX2__RXLANE8__SHIFT
 
- LM_PCIERXMUX2__RXLANE9_MASK
 
- LM_PCIERXMUX2__RXLANE9__SHIFT
 
- LM_PCIERXMUX3__RXLANE12_MASK
 
- LM_PCIERXMUX3__RXLANE12__SHIFT
 
- LM_PCIERXMUX3__RXLANE13_MASK
 
- LM_PCIERXMUX3__RXLANE13__SHIFT
 
- LM_PCIERXMUX3__RXLANE14_MASK
 
- LM_PCIERXMUX3__RXLANE14__SHIFT
 
- LM_PCIERXMUX3__RXLANE15_MASK
 
- LM_PCIERXMUX3__RXLANE15__SHIFT
 
- LM_PCIETXMUX0__TXLANE0_MASK
 
- LM_PCIETXMUX0__TXLANE0__SHIFT
 
- LM_PCIETXMUX0__TXLANE1_MASK
 
- LM_PCIETXMUX0__TXLANE1__SHIFT
 
- LM_PCIETXMUX0__TXLANE2_MASK
 
- LM_PCIETXMUX0__TXLANE2__SHIFT
 
- LM_PCIETXMUX0__TXLANE3_MASK
 
- LM_PCIETXMUX0__TXLANE3__SHIFT
 
- LM_PCIETXMUX1__TXLANE4_MASK
 
- LM_PCIETXMUX1__TXLANE4__SHIFT
 
- LM_PCIETXMUX1__TXLANE5_MASK
 
- LM_PCIETXMUX1__TXLANE5__SHIFT
 
- LM_PCIETXMUX1__TXLANE6_MASK
 
- LM_PCIETXMUX1__TXLANE6__SHIFT
 
- LM_PCIETXMUX1__TXLANE7_MASK
 
- LM_PCIETXMUX1__TXLANE7__SHIFT
 
- LM_PCIETXMUX2__TXLANE10_MASK
 
- LM_PCIETXMUX2__TXLANE10__SHIFT
 
- LM_PCIETXMUX2__TXLANE11_MASK
 
- LM_PCIETXMUX2__TXLANE11__SHIFT
 
- LM_PCIETXMUX2__TXLANE8_MASK
 
- LM_PCIETXMUX2__TXLANE8__SHIFT
 
- LM_PCIETXMUX2__TXLANE9_MASK
 
- LM_PCIETXMUX2__TXLANE9__SHIFT
 
- LM_PCIETXMUX3__TXLANE12_MASK
 
- LM_PCIETXMUX3__TXLANE12__SHIFT
 
- LM_PCIETXMUX3__TXLANE13_MASK
 
- LM_PCIETXMUX3__TXLANE13__SHIFT
 
- LM_PCIETXMUX3__TXLANE14_MASK
 
- LM_PCIETXMUX3__TXLANE14__SHIFT
 
- LM_PCIETXMUX3__TXLANE15_MASK
 
- LM_PCIETXMUX3__TXLANE15__SHIFT
 
- LM_POWERCONTROL1__LMDeemph0_MASK
 
- LM_POWERCONTROL1__LMDeemph0__SHIFT
 
- LM_POWERCONTROL1__LMDeemph1_MASK
 
- LM_POWERCONTROL1__LMDeemph1__SHIFT
 
- LM_POWERCONTROL1__LMDeemph2_MASK
 
- LM_POWERCONTROL1__LMDeemph2__SHIFT
 
- LM_POWERCONTROL1__LMLaneUnused0_MASK
 
- LM_POWERCONTROL1__LMLaneUnused0__SHIFT
 
- LM_POWERCONTROL1__LMLaneUnused1_MASK
 
- LM_POWERCONTROL1__LMLaneUnused1__SHIFT
 
- LM_POWERCONTROL1__LMLaneUnused2_MASK
 
- LM_POWERCONTROL1__LMLaneUnused2__SHIFT
 
- LM_POWERCONTROL1__LMSkipBit0_MASK
 
- LM_POWERCONTROL1__LMSkipBit0__SHIFT
 
- LM_POWERCONTROL1__LMSkipBit1_MASK
 
- LM_POWERCONTROL1__LMSkipBit1__SHIFT
 
- LM_POWERCONTROL1__LMSkipBit2_MASK
 
- LM_POWERCONTROL1__LMSkipBit2__SHIFT
 
- LM_POWERCONTROL1__LMTxClkEn0_MASK
 
- LM_POWERCONTROL1__LMTxClkEn0__SHIFT
 
- LM_POWERCONTROL1__LMTxClkEn1_MASK
 
- LM_POWERCONTROL1__LMTxClkEn1__SHIFT
 
- LM_POWERCONTROL1__LMTxClkEn2_MASK
 
- LM_POWERCONTROL1__LMTxClkEn2__SHIFT
 
- LM_POWERCONTROL1__LMTxEn0_MASK
 
- LM_POWERCONTROL1__LMTxEn0__SHIFT
 
- LM_POWERCONTROL1__LMTxEn1_MASK
 
- LM_POWERCONTROL1__LMTxEn1__SHIFT
 
- LM_POWERCONTROL1__LMTxEn2_MASK
 
- LM_POWERCONTROL1__LMTxEn2__SHIFT
 
- LM_POWERCONTROL1__LMTxMargin0_MASK
 
- LM_POWERCONTROL1__LMTxMargin0__SHIFT
 
- LM_POWERCONTROL1__LMTxMargin1_MASK
 
- LM_POWERCONTROL1__LMTxMargin1__SHIFT
 
- LM_POWERCONTROL1__LMTxMargin2_MASK
 
- LM_POWERCONTROL1__LMTxMargin2__SHIFT
 
- LM_POWERCONTROL1__LMTxMarginEn0_MASK
 
- LM_POWERCONTROL1__LMTxMarginEn0__SHIFT
 
- LM_POWERCONTROL1__LMTxMarginEn1_MASK
 
- LM_POWERCONTROL1__LMTxMarginEn1__SHIFT
 
- LM_POWERCONTROL1__LMTxMarginEn2_MASK
 
- LM_POWERCONTROL1__LMTxMarginEn2__SHIFT
 
- LM_POWERCONTROL1__TxCoeffID0_MASK
 
- LM_POWERCONTROL1__TxCoeffID0__SHIFT
 
- LM_POWERCONTROL1__TxCoeffID1_MASK
 
- LM_POWERCONTROL1__TxCoeffID1__SHIFT
 
- LM_POWERCONTROL2__LMDeemph3_MASK
 
- LM_POWERCONTROL2__LMDeemph3__SHIFT
 
- LM_POWERCONTROL2__LMLaneUnused3_MASK
 
- LM_POWERCONTROL2__LMLaneUnused3__SHIFT
 
- LM_POWERCONTROL2__LMSkipBit3_MASK
 
- LM_POWERCONTROL2__LMSkipBit3__SHIFT
 
- LM_POWERCONTROL2__LMTxClkEn3_MASK
 
- LM_POWERCONTROL2__LMTxClkEn3__SHIFT
 
- LM_POWERCONTROL2__LMTxEn3_MASK
 
- LM_POWERCONTROL2__LMTxEn3__SHIFT
 
- LM_POWERCONTROL2__LMTxMargin3_MASK
 
- LM_POWERCONTROL2__LMTxMargin3__SHIFT
 
- LM_POWERCONTROL2__LMTxMarginEn3_MASK
 
- LM_POWERCONTROL2__LMTxMarginEn3__SHIFT
 
- LM_POWERCONTROL2__TxCoeff0_MASK
 
- LM_POWERCONTROL2__TxCoeff0__SHIFT
 
- LM_POWERCONTROL2__TxCoeff1_MASK
 
- LM_POWERCONTROL2__TxCoeff1__SHIFT
 
- LM_POWERCONTROL2__TxCoeff2_MASK
 
- LM_POWERCONTROL2__TxCoeff2__SHIFT
 
- LM_POWERCONTROL2__TxCoeffID2_MASK
 
- LM_POWERCONTROL2__TxCoeffID2__SHIFT
 
- LM_POWERCONTROL2__TxCoeffID3_MASK
 
- LM_POWERCONTROL2__TxCoeffID3__SHIFT
 
- LM_POWERCONTROL3__RxEqCtl0_MASK
 
- LM_POWERCONTROL3__RxEqCtl0__SHIFT
 
- LM_POWERCONTROL3__RxEqCtl1_MASK
 
- LM_POWERCONTROL3__RxEqCtl1__SHIFT
 
- LM_POWERCONTROL3__RxEqCtl2_MASK
 
- LM_POWERCONTROL3__RxEqCtl2__SHIFT
 
- LM_POWERCONTROL3__RxEqCtl3_MASK
 
- LM_POWERCONTROL3__RxEqCtl3__SHIFT
 
- LM_POWERCONTROL3__TxCoeff3_MASK
 
- LM_POWERCONTROL3__TxCoeff3__SHIFT
 
- LM_POWERCONTROL4__LaneNum0_MASK
 
- LM_POWERCONTROL4__LaneNum0__SHIFT
 
- LM_POWERCONTROL4__LaneNum1_MASK
 
- LM_POWERCONTROL4__LaneNum1__SHIFT
 
- LM_POWERCONTROL4__LaneNum2_MASK
 
- LM_POWERCONTROL4__LaneNum2__SHIFT
 
- LM_POWERCONTROL4__LaneNum3_MASK
 
- LM_POWERCONTROL4__LaneNum3__SHIFT
 
- LM_POWERCONTROL4__LinkNum0_MASK
 
- LM_POWERCONTROL4__LinkNum0__SHIFT
 
- LM_POWERCONTROL4__LinkNum1_MASK
 
- LM_POWERCONTROL4__LinkNum1__SHIFT
 
- LM_POWERCONTROL4__LinkNum2_MASK
 
- LM_POWERCONTROL4__LinkNum2__SHIFT
 
- LM_POWERCONTROL4__LinkNum3_MASK
 
- LM_POWERCONTROL4__LinkNum3__SHIFT
 
- LM_POWERCONTROL4__SpcMode0_MASK
 
- LM_POWERCONTROL4__SpcMode0__SHIFT
 
- LM_POWERCONTROL4__SpcMode1_MASK
 
- LM_POWERCONTROL4__SpcMode1__SHIFT
 
- LM_POWERCONTROL4__SpcMode2_MASK
 
- LM_POWERCONTROL4__SpcMode2__SHIFT
 
- LM_POWERCONTROL4__SpcMode3_MASK
 
- LM_POWERCONTROL4__SpcMode3__SHIFT
 
- LM_POWERCONTROL__LMLinkSpeed0_MASK
 
- LM_POWERCONTROL__LMLinkSpeed0__SHIFT
 
- LM_POWERCONTROL__LMLinkSpeed1_MASK
 
- LM_POWERCONTROL__LMLinkSpeed1__SHIFT
 
- LM_POWERCONTROL__LMLinkSpeed2_MASK
 
- LM_POWERCONTROL__LMLinkSpeed2__SHIFT
 
- LM_POWERCONTROL__LMLinkSpeed3_MASK
 
- LM_POWERCONTROL__LMLinkSpeed3__SHIFT
 
- LM_POWERCONTROL__LMRxPhyCmd0_MASK
 
- LM_POWERCONTROL__LMRxPhyCmd0__SHIFT
 
- LM_POWERCONTROL__LMRxPhyCmd1_MASK
 
- LM_POWERCONTROL__LMRxPhyCmd1__SHIFT
 
- LM_POWERCONTROL__LMRxPhyCmd2_MASK
 
- LM_POWERCONTROL__LMRxPhyCmd2__SHIFT
 
- LM_POWERCONTROL__LMRxPhyCmd3_MASK
 
- LM_POWERCONTROL__LMRxPhyCmd3__SHIFT
 
- LM_POWERCONTROL__LMTxPhyCmd0_MASK
 
- LM_POWERCONTROL__LMTxPhyCmd0__SHIFT
 
- LM_POWERCONTROL__LMTxPhyCmd1_MASK
 
- LM_POWERCONTROL__LMTxPhyCmd1__SHIFT
 
- LM_POWERCONTROL__LMTxPhyCmd2_MASK
 
- LM_POWERCONTROL__LMTxPhyCmd2__SHIFT
 
- LM_POWERCONTROL__LMTxPhyCmd3_MASK
 
- LM_POWERCONTROL__LMTxPhyCmd3__SHIFT
 
- LM_PRBSCONTROL__LMLaneDegrade0_MASK
 
- LM_PRBSCONTROL__LMLaneDegrade0__SHIFT
 
- LM_PRBSCONTROL__LMLaneDegrade1_MASK
 
- LM_PRBSCONTROL__LMLaneDegrade1__SHIFT
 
- LM_PRBSCONTROL__LMLaneDegrade2_MASK
 
- LM_PRBSCONTROL__LMLaneDegrade2__SHIFT
 
- LM_PRBSCONTROL__LMLaneDegrade3_MASK
 
- LM_PRBSCONTROL__LMLaneDegrade3__SHIFT
 
- LM_PRBSCONTROL__PRBSPCIeSelect_MASK
 
- LM_PRBSCONTROL__PRBSPCIeSelect__SHIFT
 
- LM_RD_GAVEUP
 
- LM_RD_SUCCESS
 
- LM_ST_DEFERRED
 
- LM_ST_EXCLUSIVE
 
- LM_ST_SHARED
 
- LM_ST_UNLOCKED
 
- LM_TYPE_FLOCK
 
- LM_TYPE_INODE
 
- LM_TYPE_IOPEN
 
- LM_TYPE_JOURNAL
 
- LM_TYPE_META
 
- LM_TYPE_NONDISK
 
- LM_TYPE_PLOCK
 
- LM_TYPE_QUOTA
 
- LM_TYPE_RESERVED
 
- LM_TYPE_RGRP
 
- LN1_AIF
 
- LN1_CLK
 
- LN1_FUNC_AIF
 
- LN1_FUNC_PIN
 
- LN1_GROUP_AIF
 
- LN1_GROUP_PIN
 
- LN1_PIN
 
- LN1_PINS
 
- LN1_PIN_AIF
 
- LN1_PIN_GPIO
 
- LN1_PIN_MUX
 
- LN2_AIF
 
- LN2_BPL
 
- LN2_CLK
 
- LN2_CURR
 
- LN2_CURR_UNITS
 
- LN2_FUNC_AIF
 
- LN2_FUNC_GAI
 
- LN2_FUNC_PIN
 
- LN2_GROUP_AIF
 
- LN2_GROUP_GAI
 
- LN2_GROUP_PIN
 
- LN2_MAX_NSAMPLE
 
- LN2_NUM_GPIO_CHANNELS
 
- LN2_OP_AIF
 
- LN2_OP_GPIO
 
- LN2_PIN
 
- LN2_PINS
 
- LN2_PIN_AIF
 
- LN2_PIN_GAI
 
- LN2_PIN_GPIO
 
- LN2_PIN_MUX
 
- LN2_PWR_UNITS
 
- LN2_SAMPLE_US
 
- LN2_TEMP
 
- LN2_TEMP_UNITS
 
- LN2_VOLT
 
- LN2_VOLT_UNITS
 
- LNAGX40_DEFAULT_GAIN
 
- LNAGX41_DEFAULT_GAIN
 
- LNAGX42_DEFAULT_GAIN
 
- LNAGX43_DEFAULT_GAIN
 
- LNAGX44_DEFAULT_GAIN
 
- LNAGX45_DEFAULT_GAIN
 
- LNAGX46_DEFAULT_GAIN
 
- LNAGX47_DEFAULT_GAIN
 
- LNA_AUTO
 
- LNA_CTL_BUF_IN
 
- LNA_CTL_BUF_MODE
 
- LNA_CTL_FEM_BAND
 
- LNA_CTL_FORCE_XPA
 
- LNA_CTL_ISEL_HI
 
- LNA_CTL_ISEL_LO
 
- LNA_CTL_LOCAL_BIAS
 
- LNA_CTL_USE_ANT1
 
- LNA_GAIN_AUTO
 
- LNA_GAIN_MAX
 
- LNA_GAIN_MAX_MINUS_12
 
- LNA_GAIN_MAX_MINUS_24
 
- LNA_GAIN_MAX_MINUS_36
 
- LNA_GAIN_MAX_MINUS_48
 
- LNA_GAIN_MAX_MINUS_6
 
- LNA_Low_Gain_1
 
- LNA_Low_Gain_2
 
- LNA_Low_Gain_3
 
- LNA_MAX_GAIN
 
- LNA_MID_GAIN
 
- LNA_MIN_GAIN
 
- LNBCONTROL_DONTCARE
 
- LNBH24_EN
 
- LNBH24_LLC
 
- LNBH24_OLF
 
- LNBH24_OTF
 
- LNBH24_PCL
 
- LNBH24_TEN
 
- LNBH24_TTX
 
- LNBH24_VSEL
 
- LNBH25_EXTM
 
- LNBH25_H
 
- LNBH25_LPM
 
- LNBH25_STATUS_OFL
 
- LNBH25_STATUS_VMON
 
- LNBH25_TEN
 
- LNBH25_VSEL_13
 
- LNBH25_VSEL_18
 
- LNBH29_DATA_COMP
 
- LNBH29_H
 
- LNBH29_STATUS_OLF
 
- LNBH29_STATUS_OTF
 
- LNBH29_STATUS_PDO
 
- LNBH29_STATUS_PNG
 
- LNBH29_STATUS_VMON
 
- LNBH29_VSEL_0
 
- LNBH29_VSEL_13
 
- LNBH29_VSEL_18
 
- LNBH29_VSEL_MASK
 
- LNBP21_EN
 
- LNBP21_ISEL
 
- LNBP21_LLC
 
- LNBP21_OLF
 
- LNBP21_OTF
 
- LNBP21_PCL
 
- LNBP21_TEN
 
- LNBP21_VSEL
 
- LNBP22_EN
 
- LNBP22_LLC
 
- LNBP22_VSEL
 
- LNB_BASE
 
- LNB_BUF_LEVEL
 
- LNB_BUF_WRITE
 
- LNB_BUSY
 
- LNB_CMD
 
- LNB_CMD_DISEQC
 
- LNB_CMD_HIGH
 
- LNB_CMD_INIT
 
- LNB_CMD_LOW
 
- LNB_CMD_NOP
 
- LNB_CMD_OFF
 
- LNB_CONTROL
 
- LNB_CTRL_REG_1
 
- LNB_CTRL_REG_2
 
- LNB_CTRL_REG_3
 
- LNB_CTRL_REG_4
 
- LNB_CTRL_STATUS_REG
 
- LNB_FIFO_REGS_0
 
- LNB_FIFO_REGS_1
 
- LNB_FIFO_REGS_2
 
- LNB_FIFO_REGS_3
 
- LNB_FIFO_REGS_4
 
- LNB_FIFO_REGS_5
 
- LNB_FREQ_H
 
- LNB_FREQ_L
 
- LNB_OFF
 
- LNB_ON
 
- LNB_SUPPLY_CTRL_REG_1
 
- LNB_SUPPLY_CTRL_REG_2
 
- LNB_SUPPLY_CTRL_REG_3
 
- LNB_SUPPLY_CTRL_REG_4
 
- LNB_SUPPLY_STATUS_REG
 
- LNB_TONE
 
- LNCNT_CONTROL_IND__LNCNT_ACC_MODE_MASK
 
- LNCNT_CONTROL_IND__LNCNT_ACC_MODE__SHIFT
 
- LNCNT_CONTROL_IND__LNCNT_REF_TIMEBASE_MASK
 
- LNCNT_CONTROL_IND__LNCNT_REF_TIMEBASE__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_BW_CNT_EN1_MASK
 
- LNCNT_CONTROL__CFG_LNC_BW_CNT_EN1__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_BW_CNT_EN_MASK
 
- LNCNT_CONTROL__CFG_LNC_BW_CNT_EN__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_CMN_CNT_EN2_MASK
 
- LNCNT_CONTROL__CFG_LNC_CMN_CNT_EN2__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_CMN_CNT_EN_MASK
 
- LNCNT_CONTROL__CFG_LNC_CMN_CNT_EN__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_OVRD_EN3_MASK
 
- LNCNT_CONTROL__CFG_LNC_OVRD_EN3__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_OVRD_EN_MASK
 
- LNCNT_CONTROL__CFG_LNC_OVRD_EN__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_OVRD_VAL4_MASK
 
- LNCNT_CONTROL__CFG_LNC_OVRD_VAL4__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_OVRD_VAL_MASK
 
- LNCNT_CONTROL__CFG_LNC_OVRD_VAL__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_WINDOW_EN0_MASK
 
- LNCNT_CONTROL__CFG_LNC_WINDOW_EN0__SHIFT
 
- LNCNT_CONTROL__CFG_LNC_WINDOW_EN_MASK
 
- LNCNT_CONTROL__CFG_LNC_WINDOW_EN__SHIFT
 
- LNCNT_CONTROL__LNCNT_ACC_MODE_MASK
 
- LNCNT_CONTROL__LNCNT_ACC_MODE__SHIFT
 
- LNCNT_CONTROL__LNCNT_REF_TIMEBASE_MASK
 
- LNCNT_CONTROL__LNCNT_REF_TIMEBASE__SHIFT
 
- LNCNT_QUAN_THRD__CFG_LNC_BW_QUAN_THRD0_MASK
 
- LNCNT_QUAN_THRD__CFG_LNC_BW_QUAN_THRD0__SHIFT
 
- LNCNT_QUAN_THRD__CFG_LNC_BW_QUAN_THRD_MASK
 
- LNCNT_QUAN_THRD__CFG_LNC_BW_QUAN_THRD__SHIFT
 
- LNCNT_QUAN_THRD__CFG_LNC_CMN_QUAN_THRD4_MASK
 
- LNCNT_QUAN_THRD__CFG_LNC_CMN_QUAN_THRD4__SHIFT
 
- LNCNT_QUAN_THRD__CFG_LNC_CMN_QUAN_THRD_MASK
 
- LNCNT_QUAN_THRD__CFG_LNC_CMN_QUAN_THRD__SHIFT
 
- LNCNT_WEIGHT__CFG_LNC_BW_WEIGHT0_MASK
 
- LNCNT_WEIGHT__CFG_LNC_BW_WEIGHT0__SHIFT
 
- LNCNT_WEIGHT__CFG_LNC_BW_WEIGHT_MASK
 
- LNCNT_WEIGHT__CFG_LNC_BW_WEIGHT__SHIFT
 
- LNCNT_WEIGHT__CFG_LNC_CMN_WEIGHT16_MASK
 
- LNCNT_WEIGHT__CFG_LNC_CMN_WEIGHT16__SHIFT
 
- LNCNT_WEIGHT__CFG_LNC_CMN_WEIGHT_MASK
 
- LNCNT_WEIGHT__CFG_LNC_CMN_WEIGHT__SHIFT
 
- LNC_BW_WACC_REGISTER__LNC_BW_WACC_MASK
 
- LNC_BW_WACC_REGISTER__LNC_BW_WACC__SHIFT
 
- LNC_BW_WACC__LNC_BW_WACC_MASK
 
- LNC_BW_WACC__LNC_BW_WACC__SHIFT
 
- LNC_CMN_WACC_REGISTER__LNC_CMN_WACC_MASK
 
- LNC_CMN_WACC_REGISTER__LNC_CMN_WACC__SHIFT
 
- LNC_CMN_WACC__LNC_CMN_WACC_MASK
 
- LNC_CMN_WACC__LNC_CMN_WACC__SHIFT
 
- LNC_TOTAL_WACC_REGISTER__LNC_TOTAL_WACC_MASK
 
- LNC_TOTAL_WACC_REGISTER__LNC_TOTAL_WACC__SHIFT
 
- LNC_TOTAL_WACC__LNC_TOTAL_WACC_MASK
 
- LNC_TOTAL_WACC__LNC_TOTAL_WACC__SHIFT
 
- LNEXT_CHAR
 
- LNG2DM
 
- LNG2DM_ACCEL_DEV_NAME
 
- LNGDT0_REG
 
- LNGDT1_REG
 
- LNH
 
- LNK
 
- LNKFL
 
- LNKSTA_MARK
 
- LNKW_X1
 
- LNKW_X4
 
- LNKW_X8
 
- LNK_1000MB
 
- LNK_100MB
 
- LNK_10MB
 
- LNK_ALTEON
 
- LNK_AUTONEG
 
- LNK_CTRL_CRCERR_A
 
- LNK_CTRL_CRCERR_B
 
- LNK_CTRL_CRCFEN
 
- LNK_ENABLE
 
- LNK_FULL_DUPLEX
 
- LNK_HALF_DUPLEX
 
- LNK_JAM
 
- LNK_JUMBO
 
- LNK_LED_REG
 
- LNK_NEGOTIATE
 
- LNK_NEG_ADVANCED
 
- LNK_NEG_FCTL
 
- LNK_NIC
 
- LNK_OFF
 
- LNK_ON
 
- LNK_PREF
 
- LNK_RX_FLOW_CTL_Y
 
- LNK_STAT_WORKING
 
- LNK_STS_MASK
 
- LNK_SYNC_CTRL
 
- LNK_SYNC_INI
 
- LNK_SYNC_TST
 
- LNK_SYNC_VAL
 
- LNK_TX_FLOW_CTL_Y
 
- LNK_UP
 
- LNPGA_PDOWN_WAIT
 
- LNR_TIMER_TH
 
- LNST
 
- LNTPFLGS_CNTLTEXT
 
- LNTPFLGS_DATATEXT
 
- LNTPFLGS_ENDTEXT
 
- LNTPFLGS_LABELTEXT
 
- LNTPFLGS_PROMPTTEXT
 
- LNV
 
- LNW_EXT_TIMER_OFFSET
 
- LNW_EXT_TIMER_PGOFFSET
 
- LNW_SCU_ADDR
 
- LN_030_PRODUCT_ID
 
- LN_ADAT_AIF_STR
 
- LN_AIF_PINS
 
- LN_CDC_AIF1_STR
 
- LN_CDC_AIF2_STR
 
- LN_CDC_AIF3_STR
 
- LN_CHIP_ID
 
- LN_DSP_AIF1_STR
 
- LN_DSP_AIF2_STR
 
- LN_FTYPE_AIF
 
- LN_FTYPE_COUNT
 
- LN_FTYPE_PIN
 
- LN_FUNC
 
- LN_FUNC_AIF
 
- LN_FUNC_PIN
 
- LN_GF_AIF1_STR
 
- LN_GF_AIF2_STR
 
- LN_GF_AIF3_STR
 
- LN_GF_AIF4_STR
 
- LN_GROUP_AIF
 
- LN_GROUP_PIN
 
- LN_PARENT
 
- LN_PIN
 
- LN_PINS
 
- LN_PIN_AIF
 
- LN_PIN_GPIO
 
- LN_PIN_SAIF
 
- LN_PSIA1_STR
 
- LN_PSIA2_STR
 
- LN_PTYPE_AIF
 
- LN_PTYPE_COUNT
 
- LN_PTYPE_GPIO
 
- LN_PTYPE_MUX
 
- LN_SOUNDCARD_AIF_STR
 
- LN_SPDIF_AIF_STR
 
- LN_USB_AIF1_STR
 
- LN_USB_AIF2_STR
 
- LO
 
- LO0
 
- LO1
 
- LO2
 
- LO3
 
- LO4
 
- LO5
 
- LO6
 
- LOA
 
- LOAD
 
- LOAD16
 
- LOAD32
 
- LOAD32N
 
- LOADB
 
- LOADBU
 
- LOADED
 
- LOADED_DATA
 
- LOADED_HIGH
 
- LOADED_IMAGE_PROTOCOL_GUID
 
- LOADED_MM_SWITCHING
 
- LOADED_TOKEN
 
- LOADER_CLK_EN
 
- LOADER_CL_RX_RING_SIZE
 
- LOADER_CL_TX_RING_SIZE
 
- LOADER_CMD_START
 
- LOADER_CMD_XFER_FRAGMENT
 
- LOADER_CMD_XFER_QUERY
 
- LOADER_MAGIC1
 
- LOADER_MAGIC2
 
- LOADER_READY
 
- LOADER_SHIM_IPC_BUF_SIZE
 
- LOADER_TYPE
 
- LOADER_XFER_MODE_DIRECT_DMA
 
- LOADER_XFER_MODE_ISHTP
 
- LOADGEN_SELECT
 
- LOADING_INITIATED
 
- LOADK
 
- LOADL
 
- LOADPARM_LEN
 
- LOADR
 
- LOADREGS
 
- LOADRS_OFF
 
- LOADSHIFT_DELAY
 
- LOADW
 
- LOADX
 
- LOADX_WORD
 
- LOAD_0_REGS
 
- LOAD_4SR
 
- LOAD_4_REGS
 
- LOAD_64_REG
 
- LOAD_64_STACK
 
- LOAD_8_REGS
 
- LOAD_ADDR
 
- LOAD_AVG_MAX
 
- LOAD_AVG_PERIOD
 
- LOAD_BALANCE_ENABLE
 
- LOAD_BASE
 
- LOAD_BAT
 
- LOAD_BB_MP_PARA_FILE
 
- LOAD_BB_PARA_FILE
 
- LOAD_BB_PG_PARA_FILE
 
- LOAD_BCM4500
 
- LOAD_BLK
 
- LOAD_CMP
 
- LOAD_CP_REGS
 
- LOAD_CP_REGS_TAB
 
- LOAD_CURRENT
 
- LOAD_DATA
 
- LOAD_DATA_DATA_MASK
 
- LOAD_DATA_DATA_SHIFT
 
- LOAD_DATA_FIELD_ID_MASK
 
- LOAD_DATA_FIELD_ID_SHIFT
 
- LOAD_DATA_LANE_ID_MASK
 
- LOAD_DATA_LANE_ID_SHIFT
 
- LOAD_DFORM_TEST
 
- LOAD_DIAG
 
- LOAD_DISPLAY
 
- LOAD_DMA_COUNT
 
- LOAD_DTLB_INFO
 
- LOAD_ERROR_EXIT
 
- LOAD_ERROR_EXIT_CNIC
 
- LOAD_FAULT_PTE
 
- LOAD_FIXED_STATE
 
- LOAD_FIXED_STATE_15BPP
 
- LOAD_FIXED_STATE_16BPP
 
- LOAD_FIXED_STATE_32BPP
 
- LOAD_FIXED_STATE_8BPP
 
- LOAD_FLOAT_DFORM_TEST
 
- LOAD_FLOAT_XFORM_TEST
 
- LOAD_FP
 
- LOAD_FRAC
 
- LOAD_FREQ
 
- LOAD_FSYSCALL_TABLE
 
- LOAD_FW_READY
 
- LOAD_GUEST_SEGMENTS
 
- LOAD_HANDLER
 
- LOAD_HOSTED_FW
 
- LOAD_HOST_SEGMENTS
 
- LOAD_INT
 
- LOAD_INTERNAL
 
- LOAD_ITLB_INFO
 
- LOAD_IV
 
- LOAD_K01
 
- LOAD_K11
 
- LOAD_K21
 
- LOAD_K31
 
- LOAD_K41
 
- LOAD_KEY
 
- LOAD_LATENCY
 
- LOAD_LEVEL_NR
 
- LOAD_LOOPBACK_EXT
 
- LOAD_LR
 
- LOAD_MAC_PARA_FILE
 
- LOAD_MAX
 
- LOAD_MEDIUM
 
- LOAD_MIN
 
- LOAD_MULTI
 
- LOAD_NORMAL
 
- LOAD_OFFSET
 
- LOAD_OP
 
- LOAD_OPEN
 
- LOAD_PAGE3
 
- LOAD_PAGE4
 
- LOAD_PALETTE
 
- LOAD_PER_CPU_BASE
 
- LOAD_PHYSICAL
 
- LOAD_PHYSICAL_ADDR
 
- LOAD_PHYS_STACK_REG_SIZE
 
- LOAD_PT_ALL
 
- LOAD_PT_GLOBALS
 
- LOAD_PT_INS
 
- LOAD_PT_PRIV
 
- LOAD_PT_YREG
 
- LOAD_R10
 
- LOAD_R3
 
- LOAD_R4
 
- LOAD_R5
 
- LOAD_R6
 
- LOAD_R7
 
- LOAD_R8
 
- LOAD_R9
 
- LOAD_REGS_0
 
- LOAD_REGS_5
 
- LOAD_REGS_6
 
- LOAD_REGS_8
 
- LOAD_REG_ADDR
 
- LOAD_REG_ADDRBASE
 
- LOAD_REG_ADDR_PIC
 
- LOAD_REG_IMMEDIATE
 
- LOAD_REG_IMMEDIATE_SYM
 
- LOAD_REJECT
 
- LOAD_REQ_FLAGS0_AVOID_RESET
 
- LOAD_REQ_FLAGS0_MASK
 
- LOAD_REQ_FLAGS0_SHIFT
 
- LOAD_REQ_FORCE_ALL
 
- LOAD_REQ_FORCE_MASK
 
- LOAD_REQ_FORCE_NONE
 
- LOAD_REQ_FORCE_PF
 
- LOAD_REQ_FORCE_SHIFT
 
- LOAD_REQ_HSI_VERSION
 
- LOAD_REQ_LOCK_TO_DEFAULT
 
- LOAD_REQ_LOCK_TO_MASK
 
- LOAD_REQ_LOCK_TO_NONE
 
- LOAD_REQ_LOCK_TO_SHIFT
 
- LOAD_REQ_ROLE_MASK
 
- LOAD_REQ_ROLE_SHIFT
 
- LOAD_RF_PARA_FILE
 
- LOAD_RF_TXPWR_LMT_PARA_FILE
 
- LOAD_RF_TXPWR_TRACK_PARA_FILE
 
- LOAD_RSP_FLAGS0_DRV_EXISTS
 
- LOAD_RSP_FLAGS0_MASK
 
- LOAD_RSP_FLAGS0_SHIFT
 
- LOAD_RSP_HSI_MASK
 
- LOAD_RSP_HSI_SHIFT
 
- LOAD_RSP_ROLE_MASK
 
- LOAD_RSP_ROLE_SHIFT
 
- LOAD_SCAN_EX
 
- LOAD_SCAN_INC
 
- LOAD_SM_VAR
 
- LOAD_SPRN
 
- LOAD_SR
 
- LOAD_STORE
 
- LOAD_SYMBOL_2_GPR
 
- LOAD_SYSCALL_NR
 
- LOAD_TWIN
 
- LOAD_TX_RING_CSR
 
- LOAD_TX_RING_CSR_LOAD_TXD_AC0
 
- LOAD_TX_RING_CSR_LOAD_TXD_AC1
 
- LOAD_TX_RING_CSR_LOAD_TXD_AC2
 
- LOAD_TX_RING_CSR_LOAD_TXD_AC3
 
- LOAD_TX_RING_CSR_LOAD_TXD_MGMT
 
- LOAD_UNKNOWN
 
- LOAD_USE
 
- LOAD_USE_RAW
 
- LOAD_VMX
 
- LOAD_VMX_DFORM_TEST
 
- LOAD_VMX_XFORM_TEST
 
- LOAD_VSR
 
- LOAD_VSX
 
- LOAD_VSX_DFORM_TEST
 
- LOAD_VSX_XFORM_TEST
 
- LOAD_WAIT_CNT
 
- LOAD_WAIT_CNT__VALUE
 
- LOAD_WINDOW
 
- LOAD_WORD
 
- LOAD_XFORM_TEST
 
- LOBIT
 
- LOBYTE
 
- LOCAL
 
- LOCAL64_INIT
 
- LOCALBOARD
 
- LOCALCFG_F
 
- LOCALCFG_S
 
- LOCALCFG_V
 
- LOCALES
 
- LOCALE_MIMO_IDX_11n
 
- LOCALE_MIMO_IDX_bn
 
- LOCALITY0
 
- LOCALLOOP
 
- LOCALLY_ENQUEUED
 
- LOCALMEM_ARBITRATION
 
- LOCALMEM_ARBITRATION_CRT_MASK
 
- LOCALMEM_ARBITRATION_CRT_OFF
 
- LOCALMEM_ARBITRATION_CRT_PRIORITY_1
 
- LOCALMEM_ARBITRATION_CRT_PRIORITY_2
 
- LOCALMEM_ARBITRATION_CRT_PRIORITY_3
 
- LOCALMEM_ARBITRATION_CRT_PRIORITY_4
 
- LOCALMEM_ARBITRATION_CRT_PRIORITY_5
 
- LOCALMEM_ARBITRATION_CRT_PRIORITY_6
 
- LOCALMEM_ARBITRATION_CRT_PRIORITY_7
 
- LOCALMEM_ARBITRATION_DMA_MASK
 
- LOCALMEM_ARBITRATION_DMA_OFF
 
- LOCALMEM_ARBITRATION_DMA_PRIORITY_1
 
- LOCALMEM_ARBITRATION_DMA_PRIORITY_2
 
- LOCALMEM_ARBITRATION_DMA_PRIORITY_3
 
- LOCALMEM_ARBITRATION_DMA_PRIORITY_4
 
- LOCALMEM_ARBITRATION_DMA_PRIORITY_5
 
- LOCALMEM_ARBITRATION_DMA_PRIORITY_6
 
- LOCALMEM_ARBITRATION_DMA_PRIORITY_7
 
- LOCALMEM_ARBITRATION_PANEL_MASK
 
- LOCALMEM_ARBITRATION_PANEL_OFF
 
- LOCALMEM_ARBITRATION_PANEL_PRIORITY_1
 
- LOCALMEM_ARBITRATION_PANEL_PRIORITY_2
 
- LOCALMEM_ARBITRATION_PANEL_PRIORITY_3
 
- LOCALMEM_ARBITRATION_PANEL_PRIORITY_4
 
- LOCALMEM_ARBITRATION_PANEL_PRIORITY_5
 
- LOCALMEM_ARBITRATION_PANEL_PRIORITY_6
 
- LOCALMEM_ARBITRATION_PANEL_PRIORITY_7
 
- LOCALMEM_ARBITRATION_ROTATE
 
- LOCALMEM_ARBITRATION_VGA_MASK
 
- LOCALMEM_ARBITRATION_VGA_OFF
 
- LOCALMEM_ARBITRATION_VGA_PRIORITY_1
 
- LOCALMEM_ARBITRATION_VGA_PRIORITY_2
 
- LOCALMEM_ARBITRATION_VGA_PRIORITY_3
 
- LOCALMEM_ARBITRATION_VGA_PRIORITY_4
 
- LOCALMEM_ARBITRATION_VGA_PRIORITY_5
 
- LOCALMEM_ARBITRATION_VGA_PRIORITY_6
 
- LOCALMEM_ARBITRATION_VGA_PRIORITY_7
 
- LOCALMEM_ARBITRATION_VIDEO_MASK
 
- LOCALMEM_ARBITRATION_VIDEO_OFF
 
- LOCALMEM_ARBITRATION_VIDEO_PRIORITY_1
 
- LOCALMEM_ARBITRATION_VIDEO_PRIORITY_2
 
- LOCALMEM_ARBITRATION_VIDEO_PRIORITY_3
 
- LOCALMEM_ARBITRATION_VIDEO_PRIORITY_4
 
- LOCALMEM_ARBITRATION_VIDEO_PRIORITY_5
 
- LOCALMEM_ARBITRATION_VIDEO_PRIORITY_6
 
- LOCALMEM_ARBITRATION_VIDEO_PRIORITY_7
 
- LOCALMEM_ARBITRATION_ZVPORT0_MASK
 
- LOCALMEM_ARBITRATION_ZVPORT0_OFF
 
- LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_1
 
- LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_2
 
- LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_3
 
- LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_4
 
- LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_5
 
- LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_6
 
- LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_7
 
- LOCALMEM_ARBITRATION_ZVPORT1_MASK
 
- LOCALMEM_ARBITRATION_ZVPORT1_OFF
 
- LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_1
 
- LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_2
 
- LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_3
 
- LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_4
 
- LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_5
 
- LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_6
 
- LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_7
 
- LOCAL_64BIT
 
- LOCAL_ADDRESSING_MODE
 
- LOCAL_ALLOC_SYSTEM_INODE
 
- LOCAL_APLIST_MAX
 
- LOCAL_AP_SCAN_LIST_TYPE_SET
 
- LOCAL_AP_SEARCH_INTERVAL
 
- LOCAL_ASSIGN
 
- LOCAL_BASE_ADDR
 
- LOCAL_BOARD
 
- LOCAL_BUF_LEN
 
- LOCAL_BURST_ENABLE
 
- LOCAL_BUS
 
- LOCAL_BUS_BASE
 
- LOCAL_BUS_SIZE
 
- LOCAL_BUS_WIDTH
 
- LOCAL_CHAP
 
- LOCAL_CHASSIS_ID_STAT_LEN
 
- LOCAL_CLOCK_FREQUENCY
 
- LOCAL_CLOCK_OUTPUT
 
- LOCAL_CLOCK_OUTPUT_15MHZ
 
- LOCAL_CLOCK_OUTPUT_30MHZ
 
- LOCAL_CLOCK_OUTPUT_3_75MHZ
 
- LOCAL_CLOCK_OUTPUT_60MHZ
 
- LOCAL_CLOCK_OUTPUT_7_5MHZ
 
- LOCAL_CLOCK_OUTPUT_OFF
 
- LOCAL_CONTROL
 
- LOCAL_CRIT
 
- LOCAL_CSR_STATUS
 
- LOCAL_CURRENTADDRESS
 
- LOCAL_CURRENT_AP
 
- LOCAL_DATA_ADDR
 
- LOCAL_DEVICE_ID
 
- LOCAL_DEVICE_ID_MASK
 
- LOCAL_DEVICE_ID_SHIFT
 
- LOCAL_DEVICE_REV_MASK
 
- LOCAL_DEVICE_REV_SHIFT
 
- LOCAL_DISTANCE
 
- LOCAL_DMA1_INT_ENABLE_BIT
 
- LOCAL_DMA_CHANNEL_0_INTERRUPT_ENABLE
 
- LOCAL_DMA_CHANNEL_1_INTERRUPT_ENABLE
 
- LOCAL_DOORBELL_INT_ENABLE_BIT
 
- LOCAL_EEEADV_1000BT
 
- LOCAL_EEEADV_100BT
 
- LOCAL_EEPROM_SUM
 
- LOCAL_EMERG
 
- LOCAL_ENTRY
 
- LOCAL_FIQ_PENDING0
 
- LOCAL_FLAG_BITS_MASK
 
- LOCAL_FLAG_BITS_SHIFT
 
- LOCAL_FREE_LIST_IDX
 
- LOCAL_FREE_TARGET
 
- LOCAL_GAIN
 
- LOCAL_GPU_ROUTING
 
- LOCAL_GROUP_QUOTA_SYSTEM_INODE
 
- LOCAL_HIGH
 
- LOCAL_HUB_ADDR
 
- LOCAL_HUB_CLR_INTR
 
- LOCAL_HUB_L
 
- LOCAL_HUB_PTR
 
- LOCAL_HUB_S
 
- LOCAL_HUB_SEND_INTR
 
- LOCAL_IFFT_H_ICI
 
- LOCAL_INIT
 
- LOCAL_INPUT_INTERRUPT_ACTIVE
 
- LOCAL_INTERRUPT_INPUT_ENABLE
 
- LOCAL_INTERRUPT_TEST
 
- LOCAL_INT_ENABLE_BIT
 
- LOCAL_IRQS
 
- LOCAL_IRQ_CNTHPIRQ
 
- LOCAL_IRQ_CNTPNSIRQ
 
- LOCAL_IRQ_CNTPSIRQ
 
- LOCAL_IRQ_CNTVIRQ
 
- LOCAL_IRQ_GPU_FAST
 
- LOCAL_IRQ_MAILBOX0
 
- LOCAL_IRQ_MAILBOX1
 
- LOCAL_IRQ_MAILBOX2
 
- LOCAL_IRQ_MAILBOX3
 
- LOCAL_IRQ_PENDING0
 
- LOCAL_IRQ_PMU_FAST
 
- LOCAL_LINK_AP_STATUS
 
- LOCAL_LIST_IDX
 
- LOCAL_LNI_INFO
 
- LOCAL_LOW
 
- LOCAL_MAILBOX0_CLR0
 
- LOCAL_MAILBOX0_SET0
 
- LOCAL_MAILBOX3_CLR0
 
- LOCAL_MAILBOX3_SET0
 
- LOCAL_MAILBOX_INT_CONTROL0
 
- LOCAL_MASTER_IO6
 
- LOCAL_MAX_TIMEOUT_1000_S
 
- LOCAL_MAX_TIMEOUT_100_MS
 
- LOCAL_MAX_TIMEOUT_100_S
 
- LOCAL_MAX_TIMEOUT_10_MS
 
- LOCAL_MAX_TIMEOUT_10_S
 
- LOCAL_MAX_TIMEOUT_1_S
 
- LOCAL_MIB_AUTO_TX_RATE_POS
 
- LOCAL_MIB_PREAMBLE_TYPE
 
- LOCAL_MIB_SSID_SIZE
 
- LOCAL_MIB_TX_CONTROL_RATE_POS
 
- LOCAL_MIB_TX_MGMT_RATE_POS
 
- LOCAL_MIB_TX_PROMISCUOUS_POS
 
- LOCAL_MULTICAST_ADDRESS
 
- LOCAL_MULTICAST_FILTER
 
- LOCAL_NR_SCANS
 
- LOCAL_OK
 
- LOCAL_OP
 
- LOCAL_OPS
 
- LOCAL_OP_RETURN
 
- LOCAL_OUT_ZLP
 
- LOCAL_PACKET_STATISTICS
 
- LOCAL_PENDING_LIST_IDX
 
- LOCAL_PLUGIN_DIR
 
- LOCAL_PMK
 
- LOCAL_PM_ROUTING_CLR
 
- LOCAL_PM_ROUTING_SET
 
- LOCAL_PORT_ID_STAT_LEN
 
- LOCAL_PRESCALER
 
- LOCAL_PR_ARG
 
- LOCAL_PR_FMT
 
- LOCAL_RAM_CFG_PAGE
 
- LOCAL_RECONSTRUCTED_BUFFER_MAX_SIZE
 
- LOCAL_REGION
 
- LOCAL_RSN_CONFIG_ALL
 
- LOCAL_RSN_MODE
 
- LOCAL_RTE_CONF_DESTID_SEL
 
- LOCAL_RTE_CONF_DESTID_SEL_PSEL
 
- LOCAL_SCRATCH_ADDRESS
 
- LOCAL_SCRATCH_OFFSET
 
- LOCAL_SEARCHED_AP_LIST
 
- LOCAL_SKB_ALIGN
 
- LOCAL_STORAGE_CREATE_FLAG_MASK
 
- LOCAL_TEMP
 
- LOCAL_TIMER_INT_CONTROL0
 
- LOCAL_TIMER_VECTOR
 
- LOCAL_TO_XFER_REG_OFFSET
 
- LOCAL_TUNE
 
- LOCAL_USER_QUOTA_SYSTEM_INODE
 
- LOCAL_VEC_ENTRIES
 
- LOCAL_WPS_ENABLE
 
- LOCAL_WPS_PROBE_REQ
 
- LOCATE
 
- LOCATE_BIT_POS
 
- LOCATE_MASK
 
- LOCATION_GROUP
 
- LOCATION_SIZE
 
- LOCCTL
 
- LOCCTL1
 
- LOCHNAGAR1
 
- LOCHNAGAR1_CDC_AIF1_BCLK_DIR_MASK
 
- LOCHNAGAR1_CDC_AIF1_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_CDC_AIF1_ENA_MASK
 
- LOCHNAGAR1_CDC_AIF1_ENA_SHIFT
 
- LOCHNAGAR1_CDC_AIF1_LRCLK_DIR_MASK
 
- LOCHNAGAR1_CDC_AIF1_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_CDC_AIF1_SEL
 
- LOCHNAGAR1_CDC_AIF2_BCLK_DIR_MASK
 
- LOCHNAGAR1_CDC_AIF2_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_CDC_AIF2_ENA_MASK
 
- LOCHNAGAR1_CDC_AIF2_ENA_SHIFT
 
- LOCHNAGAR1_CDC_AIF2_LRCLK_DIR_MASK
 
- LOCHNAGAR1_CDC_AIF2_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_CDC_AIF2_SEL
 
- LOCHNAGAR1_CDC_AIF3_BCLK_DIR_MASK
 
- LOCHNAGAR1_CDC_AIF3_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_CDC_AIF3_ENA_MASK
 
- LOCHNAGAR1_CDC_AIF3_ENA_SHIFT
 
- LOCHNAGAR1_CDC_AIF3_LRCLK_DIR_MASK
 
- LOCHNAGAR1_CDC_AIF3_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_CDC_AIF3_SEL
 
- LOCHNAGAR1_CDC_AIF_CTRL1
 
- LOCHNAGAR1_CDC_AIF_CTRL2
 
- LOCHNAGAR1_CDC_CIF_MODE_MASK
 
- LOCHNAGAR1_CDC_CIF_MODE_SHIFT
 
- LOCHNAGAR1_CDC_MCLK1_ENA_MASK
 
- LOCHNAGAR1_CDC_MCLK1_ENA_SHIFT
 
- LOCHNAGAR1_CDC_MCLK1_SEL
 
- LOCHNAGAR1_CDC_MCLK2_ENA_MASK
 
- LOCHNAGAR1_CDC_MCLK2_ENA_SHIFT
 
- LOCHNAGAR1_CDC_MCLK2_SEL
 
- LOCHNAGAR1_CDC_RESET_MASK
 
- LOCHNAGAR1_CDC_RESET_SHIFT
 
- LOCHNAGAR1_DSP_AIF
 
- LOCHNAGAR1_DSP_AIF1_BCLK_DIR_MASK
 
- LOCHNAGAR1_DSP_AIF1_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_DSP_AIF1_ENA_MASK
 
- LOCHNAGAR1_DSP_AIF1_ENA_SHIFT
 
- LOCHNAGAR1_DSP_AIF1_LRCLK_DIR_MASK
 
- LOCHNAGAR1_DSP_AIF1_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_DSP_AIF1_SEL
 
- LOCHNAGAR1_DSP_AIF2_BCLK_DIR_MASK
 
- LOCHNAGAR1_DSP_AIF2_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_DSP_AIF2_ENA_MASK
 
- LOCHNAGAR1_DSP_AIF2_ENA_SHIFT
 
- LOCHNAGAR1_DSP_AIF2_LRCLK_DIR_MASK
 
- LOCHNAGAR1_DSP_AIF2_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_DSP_AIF2_SEL
 
- LOCHNAGAR1_DSP_CLKIN_ENA_MASK
 
- LOCHNAGAR1_DSP_CLKIN_ENA_SHIFT
 
- LOCHNAGAR1_DSP_CLKIN_SEL
 
- LOCHNAGAR1_DSP_RESET_MASK
 
- LOCHNAGAR1_DSP_RESET_SHIFT
 
- LOCHNAGAR1_EXT_AIF_CTRL
 
- LOCHNAGAR1_GF_AIF1
 
- LOCHNAGAR1_GF_AIF1_BCLK_DIR_MASK
 
- LOCHNAGAR1_GF_AIF1_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_GF_AIF1_ENA_MASK
 
- LOCHNAGAR1_GF_AIF1_ENA_SHIFT
 
- LOCHNAGAR1_GF_AIF1_LRCLK_DIR_MASK
 
- LOCHNAGAR1_GF_AIF1_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_GF_AIF1_SEL
 
- LOCHNAGAR1_GF_AIF2
 
- LOCHNAGAR1_GF_AIF2_BCLK_DIR_MASK
 
- LOCHNAGAR1_GF_AIF2_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_GF_AIF2_ENA_MASK
 
- LOCHNAGAR1_GF_AIF2_ENA_SHIFT
 
- LOCHNAGAR1_GF_AIF2_LRCLK_DIR_MASK
 
- LOCHNAGAR1_GF_AIF2_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_GF_AIF2_SEL
 
- LOCHNAGAR1_GF_AIF3_BCLK_DIR_MASK
 
- LOCHNAGAR1_GF_AIF3_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_GF_AIF3_ENA_MASK
 
- LOCHNAGAR1_GF_AIF3_ENA_SHIFT
 
- LOCHNAGAR1_GF_AIF3_LRCLK_DIR_MASK
 
- LOCHNAGAR1_GF_AIF3_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_GF_AIF3_SEL
 
- LOCHNAGAR1_GF_AIF4_BCLK_DIR_MASK
 
- LOCHNAGAR1_GF_AIF4_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_GF_AIF4_ENA_MASK
 
- LOCHNAGAR1_GF_AIF4_ENA_SHIFT
 
- LOCHNAGAR1_GF_AIF4_LRCLK_DIR_MASK
 
- LOCHNAGAR1_GF_AIF4_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_GF_AIF4_SEL
 
- LOCHNAGAR1_GF_CLKOUT1_ENA_MASK
 
- LOCHNAGAR1_GF_CLKOUT1_ENA_SHIFT
 
- LOCHNAGAR1_GF_CLKOUT1_SEL
 
- LOCHNAGAR1_GF_GPIO2
 
- LOCHNAGAR1_GF_GPIO3
 
- LOCHNAGAR1_GF_GPIO7
 
- LOCHNAGAR1_I2C_CTRL
 
- LOCHNAGAR1_LED1
 
- LOCHNAGAR1_LED2
 
- LOCHNAGAR1_PIN_CDC_AIF1_BCLK
 
- LOCHNAGAR1_PIN_CDC_AIF1_LRCLK
 
- LOCHNAGAR1_PIN_CDC_AIF1_RXDAT
 
- LOCHNAGAR1_PIN_CDC_AIF1_TXDAT
 
- LOCHNAGAR1_PIN_CDC_AIF2_BCLK
 
- LOCHNAGAR1_PIN_CDC_AIF2_LRCLK
 
- LOCHNAGAR1_PIN_CDC_AIF2_RXDAT
 
- LOCHNAGAR1_PIN_CDC_AIF2_TXDAT
 
- LOCHNAGAR1_PIN_CDC_AIF3_BCLK
 
- LOCHNAGAR1_PIN_CDC_AIF3_LRCLK
 
- LOCHNAGAR1_PIN_CDC_AIF3_RXDAT
 
- LOCHNAGAR1_PIN_CDC_AIF3_TXDAT
 
- LOCHNAGAR1_PIN_CDC_CIF1MODE
 
- LOCHNAGAR1_PIN_CDC_RESET
 
- LOCHNAGAR1_PIN_DSP_AIF1_BCLK
 
- LOCHNAGAR1_PIN_DSP_AIF1_LRCLK
 
- LOCHNAGAR1_PIN_DSP_AIF1_RXDAT
 
- LOCHNAGAR1_PIN_DSP_AIF1_TXDAT
 
- LOCHNAGAR1_PIN_DSP_AIF2_BCLK
 
- LOCHNAGAR1_PIN_DSP_AIF2_LRCLK
 
- LOCHNAGAR1_PIN_DSP_AIF2_RXDAT
 
- LOCHNAGAR1_PIN_DSP_AIF2_TXDAT
 
- LOCHNAGAR1_PIN_DSP_RESET
 
- LOCHNAGAR1_PIN_GF_AIF1_BCLK
 
- LOCHNAGAR1_PIN_GF_AIF1_LRCLK
 
- LOCHNAGAR1_PIN_GF_AIF1_RXDAT
 
- LOCHNAGAR1_PIN_GF_AIF1_TXDAT
 
- LOCHNAGAR1_PIN_GF_AIF2_BCLK
 
- LOCHNAGAR1_PIN_GF_AIF2_LRCLK
 
- LOCHNAGAR1_PIN_GF_AIF2_RXDAT
 
- LOCHNAGAR1_PIN_GF_AIF2_TXDAT
 
- LOCHNAGAR1_PIN_GF_AIF3_BCLK
 
- LOCHNAGAR1_PIN_GF_AIF3_LRCLK
 
- LOCHNAGAR1_PIN_GF_AIF3_RXDAT
 
- LOCHNAGAR1_PIN_GF_AIF3_TXDAT
 
- LOCHNAGAR1_PIN_GF_AIF4_BCLK
 
- LOCHNAGAR1_PIN_GF_AIF4_LRCLK
 
- LOCHNAGAR1_PIN_GF_AIF4_RXDAT
 
- LOCHNAGAR1_PIN_GF_AIF4_TXDAT
 
- LOCHNAGAR1_PIN_GF_GPIO2
 
- LOCHNAGAR1_PIN_GF_GPIO3
 
- LOCHNAGAR1_PIN_GF_GPIO7
 
- LOCHNAGAR1_PIN_LED1
 
- LOCHNAGAR1_PIN_LED2
 
- LOCHNAGAR1_PIN_NUM_GPIOS
 
- LOCHNAGAR1_PIN_PSIA1_BCLK
 
- LOCHNAGAR1_PIN_PSIA1_LRCLK
 
- LOCHNAGAR1_PIN_PSIA1_RXDAT
 
- LOCHNAGAR1_PIN_PSIA1_TXDAT
 
- LOCHNAGAR1_PIN_PSIA2_BCLK
 
- LOCHNAGAR1_PIN_PSIA2_LRCLK
 
- LOCHNAGAR1_PIN_PSIA2_RXDAT
 
- LOCHNAGAR1_PIN_PSIA2_TXDAT
 
- LOCHNAGAR1_PIN_SPDIF_AIF_BCLK
 
- LOCHNAGAR1_PIN_SPDIF_AIF_LRCLK
 
- LOCHNAGAR1_PIN_SPDIF_AIF_RXDAT
 
- LOCHNAGAR1_PIN_SPDIF_AIF_TXDAT
 
- LOCHNAGAR1_PSIA1_BCLK_DIR_MASK
 
- LOCHNAGAR1_PSIA1_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_PSIA1_ENA_MASK
 
- LOCHNAGAR1_PSIA1_ENA_SHIFT
 
- LOCHNAGAR1_PSIA1_LRCLK_DIR_MASK
 
- LOCHNAGAR1_PSIA1_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_PSIA1_SEL
 
- LOCHNAGAR1_PSIA2_BCLK_DIR_MASK
 
- LOCHNAGAR1_PSIA2_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_PSIA2_ENA_MASK
 
- LOCHNAGAR1_PSIA2_ENA_SHIFT
 
- LOCHNAGAR1_PSIA2_LRCLK_DIR_MASK
 
- LOCHNAGAR1_PSIA2_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_PSIA2_SEL
 
- LOCHNAGAR1_PSIA_AIF
 
- LOCHNAGAR1_REGISTERS_H
 
- LOCHNAGAR1_RST
 
- LOCHNAGAR1_SPDIF_AIF_BCLK_DIR_MASK
 
- LOCHNAGAR1_SPDIF_AIF_BCLK_DIR_SHIFT
 
- LOCHNAGAR1_SPDIF_AIF_ENA_MASK
 
- LOCHNAGAR1_SPDIF_AIF_ENA_SHIFT
 
- LOCHNAGAR1_SPDIF_AIF_LRCLK_DIR_MASK
 
- LOCHNAGAR1_SPDIF_AIF_LRCLK_DIR_SHIFT
 
- LOCHNAGAR1_SPDIF_AIF_SEL
 
- LOCHNAGAR1_SRC_MASK
 
- LOCHNAGAR1_SRC_SHIFT
 
- LOCHNAGAR2
 
- LOCHNAGAR2_ADAT_AIF_CTRL
 
- LOCHNAGAR2_ADAT_MCLK_CTRL
 
- LOCHNAGAR2_AIF_BCLK_DIR_MASK
 
- LOCHNAGAR2_AIF_BCLK_DIR_SHIFT
 
- LOCHNAGAR2_AIF_ENA_MASK
 
- LOCHNAGAR2_AIF_ENA_SHIFT
 
- LOCHNAGAR2_AIF_LRCLK_DIR_MASK
 
- LOCHNAGAR2_AIF_LRCLK_DIR_SHIFT
 
- LOCHNAGAR2_AIF_SRC_MASK
 
- LOCHNAGAR2_AIF_SRC_SHIFT
 
- LOCHNAGAR2_ANALOGUE_PATH_CTRL1
 
- LOCHNAGAR2_ANALOGUE_PATH_CTRL2
 
- LOCHNAGAR2_ANALOGUE_PATH_UPDATE_MASK
 
- LOCHNAGAR2_ANALOGUE_PATH_UPDATE_SHIFT
 
- LOCHNAGAR2_ANALOGUE_PATH_UPDATE_STS_MASK
 
- LOCHNAGAR2_ANALOGUE_PATH_UPDATE_STS_SHIFT
 
- LOCHNAGAR2_CDC_AIF1_CTRL
 
- LOCHNAGAR2_CDC_AIF2_CTRL
 
- LOCHNAGAR2_CDC_AIF3_CTRL
 
- LOCHNAGAR2_CDC_CIF1MODE_MASK
 
- LOCHNAGAR2_CDC_CIF1MODE_SHIFT
 
- LOCHNAGAR2_CDC_MCLK1_CTRL
 
- LOCHNAGAR2_CDC_MCLK2_CTRL
 
- LOCHNAGAR2_CDC_RESET_MASK
 
- LOCHNAGAR2_CDC_RESET_SHIFT
 
- LOCHNAGAR2_CLK_ENA_MASK
 
- LOCHNAGAR2_CLK_ENA_SHIFT
 
- LOCHNAGAR2_CLK_SRC_MASK
 
- LOCHNAGAR2_CLK_SRC_SHIFT
 
- LOCHNAGAR2_COMMS_CTRL4
 
- LOCHNAGAR2_DSP_AIF1_CTRL
 
- LOCHNAGAR2_DSP_AIF2_CTRL
 
- LOCHNAGAR2_DSP_CLKIN_CTRL
 
- LOCHNAGAR2_DSP_RESET_MASK
 
- LOCHNAGAR2_DSP_RESET_SHIFT
 
- LOCHNAGAR2_GF_AIF1_CTRL
 
- LOCHNAGAR2_GF_AIF2_CTRL
 
- LOCHNAGAR2_GF_AIF3_CTRL
 
- LOCHNAGAR2_GF_AIF4_CTRL
 
- LOCHNAGAR2_GF_CLKOUT1_CTRL
 
- LOCHNAGAR2_GF_CLKOUT2_CTRL
 
- LOCHNAGAR2_GPIO_CDC_AIF1_BCLK
 
- LOCHNAGAR2_GPIO_CDC_AIF1_LRCLK
 
- LOCHNAGAR2_GPIO_CDC_AIF1_RXDAT
 
- LOCHNAGAR2_GPIO_CDC_AIF1_TXDAT
 
- LOCHNAGAR2_GPIO_CDC_AIF2_BCLK
 
- LOCHNAGAR2_GPIO_CDC_AIF2_LRCLK
 
- LOCHNAGAR2_GPIO_CDC_AIF2_RXDAT
 
- LOCHNAGAR2_GPIO_CDC_AIF2_TXDAT
 
- LOCHNAGAR2_GPIO_CDC_AIF3_BCLK
 
- LOCHNAGAR2_GPIO_CDC_AIF3_LRCLK
 
- LOCHNAGAR2_GPIO_CDC_AIF3_RXDAT
 
- LOCHNAGAR2_GPIO_CDC_AIF3_TXDAT
 
- LOCHNAGAR2_GPIO_CDC_DMICCLK1
 
- LOCHNAGAR2_GPIO_CDC_DMICCLK2
 
- LOCHNAGAR2_GPIO_CDC_DMICCLK3
 
- LOCHNAGAR2_GPIO_CDC_DMICCLK4
 
- LOCHNAGAR2_GPIO_CDC_DMICDAT1
 
- LOCHNAGAR2_GPIO_CDC_DMICDAT2
 
- LOCHNAGAR2_GPIO_CDC_DMICDAT3
 
- LOCHNAGAR2_GPIO_CDC_DMICDAT4
 
- LOCHNAGAR2_GPIO_CDC_GPIO1
 
- LOCHNAGAR2_GPIO_CDC_GPIO2
 
- LOCHNAGAR2_GPIO_CDC_GPIO3
 
- LOCHNAGAR2_GPIO_CDC_GPIO4
 
- LOCHNAGAR2_GPIO_CDC_GPIO5
 
- LOCHNAGAR2_GPIO_CDC_GPIO6
 
- LOCHNAGAR2_GPIO_CDC_GPIO7
 
- LOCHNAGAR2_GPIO_CDC_GPIO8
 
- LOCHNAGAR2_GPIO_CDC_MCLK1
 
- LOCHNAGAR2_GPIO_CDC_MCLK2
 
- LOCHNAGAR2_GPIO_CDC_PDMCLK1
 
- LOCHNAGAR2_GPIO_CDC_PDMCLK2
 
- LOCHNAGAR2_GPIO_CDC_PDMDAT1
 
- LOCHNAGAR2_GPIO_CDC_PDMDAT2
 
- LOCHNAGAR2_GPIO_CHANNEL1
 
- LOCHNAGAR2_GPIO_CHANNEL10
 
- LOCHNAGAR2_GPIO_CHANNEL11
 
- LOCHNAGAR2_GPIO_CHANNEL12
 
- LOCHNAGAR2_GPIO_CHANNEL13
 
- LOCHNAGAR2_GPIO_CHANNEL14
 
- LOCHNAGAR2_GPIO_CHANNEL15
 
- LOCHNAGAR2_GPIO_CHANNEL16
 
- LOCHNAGAR2_GPIO_CHANNEL2
 
- LOCHNAGAR2_GPIO_CHANNEL3
 
- LOCHNAGAR2_GPIO_CHANNEL4
 
- LOCHNAGAR2_GPIO_CHANNEL5
 
- LOCHNAGAR2_GPIO_CHANNEL6
 
- LOCHNAGAR2_GPIO_CHANNEL7
 
- LOCHNAGAR2_GPIO_CHANNEL8
 
- LOCHNAGAR2_GPIO_CHANNEL9
 
- LOCHNAGAR2_GPIO_CHANNEL_SRC_MASK
 
- LOCHNAGAR2_GPIO_CHANNEL_SRC_SHIFT
 
- LOCHNAGAR2_GPIO_CHANNEL_STS_MASK
 
- LOCHNAGAR2_GPIO_CHANNEL_STS_SHIFT
 
- LOCHNAGAR2_GPIO_DSP_AIF1_BCLK
 
- LOCHNAGAR2_GPIO_DSP_AIF1_LRCLK
 
- LOCHNAGAR2_GPIO_DSP_AIF1_RXDAT
 
- LOCHNAGAR2_GPIO_DSP_AIF1_TXDAT
 
- LOCHNAGAR2_GPIO_DSP_AIF2_BCLK
 
- LOCHNAGAR2_GPIO_DSP_AIF2_LRCLK
 
- LOCHNAGAR2_GPIO_DSP_AIF2_RXDAT
 
- LOCHNAGAR2_GPIO_DSP_AIF2_TXDAT
 
- LOCHNAGAR2_GPIO_DSP_CLKIN
 
- LOCHNAGAR2_GPIO_DSP_DMICCLK1
 
- LOCHNAGAR2_GPIO_DSP_DMICCLK2
 
- LOCHNAGAR2_GPIO_DSP_DMICDAT1
 
- LOCHNAGAR2_GPIO_DSP_DMICDAT2
 
- LOCHNAGAR2_GPIO_DSP_GPIO1
 
- LOCHNAGAR2_GPIO_DSP_GPIO2
 
- LOCHNAGAR2_GPIO_DSP_GPIO20
 
- LOCHNAGAR2_GPIO_DSP_GPIO3
 
- LOCHNAGAR2_GPIO_DSP_GPIO4
 
- LOCHNAGAR2_GPIO_DSP_GPIO5
 
- LOCHNAGAR2_GPIO_DSP_GPIO6
 
- LOCHNAGAR2_GPIO_DSP_STANDBY
 
- LOCHNAGAR2_GPIO_DSP_UART1_RX
 
- LOCHNAGAR2_GPIO_DSP_UART1_TX
 
- LOCHNAGAR2_GPIO_DSP_UART2_RX
 
- LOCHNAGAR2_GPIO_DSP_UART2_TX
 
- LOCHNAGAR2_GPIO_FPGA_GPIO1
 
- LOCHNAGAR2_GPIO_FPGA_GPIO2
 
- LOCHNAGAR2_GPIO_FPGA_GPIO3
 
- LOCHNAGAR2_GPIO_FPGA_GPIO4
 
- LOCHNAGAR2_GPIO_FPGA_GPIO5
 
- LOCHNAGAR2_GPIO_FPGA_GPIO6
 
- LOCHNAGAR2_GPIO_GF_AIF1_BCLK
 
- LOCHNAGAR2_GPIO_GF_AIF1_LRCLK
 
- LOCHNAGAR2_GPIO_GF_AIF1_RXDAT
 
- LOCHNAGAR2_GPIO_GF_AIF1_TXDAT
 
- LOCHNAGAR2_GPIO_GF_AIF2_BCLK
 
- LOCHNAGAR2_GPIO_GF_AIF2_LRCLK
 
- LOCHNAGAR2_GPIO_GF_AIF2_RXDAT
 
- LOCHNAGAR2_GPIO_GF_AIF2_TXDAT
 
- LOCHNAGAR2_GPIO_GF_AIF3_BCLK
 
- LOCHNAGAR2_GPIO_GF_AIF3_LRCLK
 
- LOCHNAGAR2_GPIO_GF_AIF3_RXDAT
 
- LOCHNAGAR2_GPIO_GF_AIF3_TXDAT
 
- LOCHNAGAR2_GPIO_GF_AIF4_BCLK
 
- LOCHNAGAR2_GPIO_GF_AIF4_LRCLK
 
- LOCHNAGAR2_GPIO_GF_AIF4_RXDAT
 
- LOCHNAGAR2_GPIO_GF_AIF4_TXDAT
 
- LOCHNAGAR2_GPIO_GF_GPIO1
 
- LOCHNAGAR2_GPIO_GF_GPIO2
 
- LOCHNAGAR2_GPIO_GF_GPIO3
 
- LOCHNAGAR2_GPIO_GF_GPIO5
 
- LOCHNAGAR2_GPIO_GF_GPIO7
 
- LOCHNAGAR2_GPIO_GF_UART2_RX
 
- LOCHNAGAR2_GPIO_GF_UART2_TX
 
- LOCHNAGAR2_GPIO_I2C2_SCL
 
- LOCHNAGAR2_GPIO_I2C2_SDA
 
- LOCHNAGAR2_GPIO_I2C3_SCL
 
- LOCHNAGAR2_GPIO_I2C3_SDA
 
- LOCHNAGAR2_GPIO_I2C4_SCL
 
- LOCHNAGAR2_GPIO_I2C4_SDA
 
- LOCHNAGAR2_GPIO_PSIA1_BCLK
 
- LOCHNAGAR2_GPIO_PSIA1_LRCLK
 
- LOCHNAGAR2_GPIO_PSIA1_MCLK
 
- LOCHNAGAR2_GPIO_PSIA1_RXDAT
 
- LOCHNAGAR2_GPIO_PSIA1_TXDAT
 
- LOCHNAGAR2_GPIO_PSIA2_BCLK
 
- LOCHNAGAR2_GPIO_PSIA2_LRCLK
 
- LOCHNAGAR2_GPIO_PSIA2_MCLK
 
- LOCHNAGAR2_GPIO_PSIA2_RXDAT
 
- LOCHNAGAR2_GPIO_PSIA2_TXDAT
 
- LOCHNAGAR2_GPIO_SRC_MASK
 
- LOCHNAGAR2_GPIO_SRC_SHIFT
 
- LOCHNAGAR2_GPIO_USB_UART_RX
 
- LOCHNAGAR2_IMON_CH_SEL_MASK
 
- LOCHNAGAR2_IMON_CH_SEL_SHIFT
 
- LOCHNAGAR2_IMON_CH_SRC_MASK
 
- LOCHNAGAR2_IMON_CH_SRC_SHIFT
 
- LOCHNAGAR2_IMON_CONFIGURE_MASK
 
- LOCHNAGAR2_IMON_CONFIGURE_SHIFT
 
- LOCHNAGAR2_IMON_CTRL1
 
- LOCHNAGAR2_IMON_CTRL2
 
- LOCHNAGAR2_IMON_CTRL3
 
- LOCHNAGAR2_IMON_CTRL4
 
- LOCHNAGAR2_IMON_DATA1
 
- LOCHNAGAR2_IMON_DATA2
 
- LOCHNAGAR2_IMON_DATA_MASK
 
- LOCHNAGAR2_IMON_DATA_RDY_MASK
 
- LOCHNAGAR2_IMON_DATA_RDY_SHIFT
 
- LOCHNAGAR2_IMON_DATA_REQ_MASK
 
- LOCHNAGAR2_IMON_DATA_REQ_SHIFT
 
- LOCHNAGAR2_IMON_DATA_SHIFT
 
- LOCHNAGAR2_IMON_DONE_MASK
 
- LOCHNAGAR2_IMON_DONE_SHIFT
 
- LOCHNAGAR2_IMON_ENA_MASK
 
- LOCHNAGAR2_IMON_ENA_SHIFT
 
- LOCHNAGAR2_IMON_FSR_MASK
 
- LOCHNAGAR2_IMON_FSR_SHIFT
 
- LOCHNAGAR2_IMON_MEASURED_CHANNELS_MASK
 
- LOCHNAGAR2_IMON_MEASURED_CHANNELS_SHIFT
 
- LOCHNAGAR2_IMON_MEASURE_MASK
 
- LOCHNAGAR2_IMON_MEASURE_SHIFT
 
- LOCHNAGAR2_IMON_MODE_SEL_MASK
 
- LOCHNAGAR2_IMON_MODE_SEL_SHIFT
 
- LOCHNAGAR2_MICVDD_CTRL1
 
- LOCHNAGAR2_MICVDD_CTRL2
 
- LOCHNAGAR2_MICVDD_REG_ENA_MASK
 
- LOCHNAGAR2_MICVDD_REG_ENA_SHIFT
 
- LOCHNAGAR2_MICVDD_VSEL_MASK
 
- LOCHNAGAR2_MICVDD_VSEL_SHIFT
 
- LOCHNAGAR2_MINICARD_RESETS
 
- LOCHNAGAR2_P1_INPUT_BIAS_ENA_MASK
 
- LOCHNAGAR2_P1_INPUT_BIAS_ENA_SHIFT
 
- LOCHNAGAR2_P1_MICBIAS_SRC_MASK
 
- LOCHNAGAR2_P1_MICBIAS_SRC_SHIFT
 
- LOCHNAGAR2_P2_INPUT_BIAS_ENA_MASK
 
- LOCHNAGAR2_P2_INPUT_BIAS_ENA_SHIFT
 
- LOCHNAGAR2_P2_MICBIAS_SRC_MASK
 
- LOCHNAGAR2_P2_MICBIAS_SRC_SHIFT
 
- LOCHNAGAR2_PIN_ADAT_AIF_BCLK
 
- LOCHNAGAR2_PIN_ADAT_AIF_LRCLK
 
- LOCHNAGAR2_PIN_ADAT_AIF_RXDAT
 
- LOCHNAGAR2_PIN_ADAT_AIF_TXDAT
 
- LOCHNAGAR2_PIN_CDC_AIF1_BCLK
 
- LOCHNAGAR2_PIN_CDC_AIF1_LRCLK
 
- LOCHNAGAR2_PIN_CDC_AIF1_RXDAT
 
- LOCHNAGAR2_PIN_CDC_AIF1_TXDAT
 
- LOCHNAGAR2_PIN_CDC_AIF2_BCLK
 
- LOCHNAGAR2_PIN_CDC_AIF2_LRCLK
 
- LOCHNAGAR2_PIN_CDC_AIF2_RXDAT
 
- LOCHNAGAR2_PIN_CDC_AIF2_TXDAT
 
- LOCHNAGAR2_PIN_CDC_AIF3_BCLK
 
- LOCHNAGAR2_PIN_CDC_AIF3_LRCLK
 
- LOCHNAGAR2_PIN_CDC_AIF3_RXDAT
 
- LOCHNAGAR2_PIN_CDC_AIF3_TXDAT
 
- LOCHNAGAR2_PIN_CDC_CIF1MODE
 
- LOCHNAGAR2_PIN_CDC_DMICCLK1
 
- LOCHNAGAR2_PIN_CDC_DMICCLK2
 
- LOCHNAGAR2_PIN_CDC_DMICCLK3
 
- LOCHNAGAR2_PIN_CDC_DMICCLK4
 
- LOCHNAGAR2_PIN_CDC_DMICDAT1
 
- LOCHNAGAR2_PIN_CDC_DMICDAT2
 
- LOCHNAGAR2_PIN_CDC_DMICDAT3
 
- LOCHNAGAR2_PIN_CDC_DMICDAT4
 
- LOCHNAGAR2_PIN_CDC_GPIO1
 
- LOCHNAGAR2_PIN_CDC_GPIO2
 
- LOCHNAGAR2_PIN_CDC_GPIO3
 
- LOCHNAGAR2_PIN_CDC_GPIO4
 
- LOCHNAGAR2_PIN_CDC_GPIO5
 
- LOCHNAGAR2_PIN_CDC_GPIO6
 
- LOCHNAGAR2_PIN_CDC_GPIO7
 
- LOCHNAGAR2_PIN_CDC_GPIO8
 
- LOCHNAGAR2_PIN_CDC_LDOENA
 
- LOCHNAGAR2_PIN_CDC_MCLK1
 
- LOCHNAGAR2_PIN_CDC_MCLK2
 
- LOCHNAGAR2_PIN_CDC_PDMCLK1
 
- LOCHNAGAR2_PIN_CDC_PDMCLK2
 
- LOCHNAGAR2_PIN_CDC_PDMDAT1
 
- LOCHNAGAR2_PIN_CDC_PDMDAT2
 
- LOCHNAGAR2_PIN_CDC_RESET
 
- LOCHNAGAR2_PIN_DSP_AIF1_BCLK
 
- LOCHNAGAR2_PIN_DSP_AIF1_LRCLK
 
- LOCHNAGAR2_PIN_DSP_AIF1_RXDAT
 
- LOCHNAGAR2_PIN_DSP_AIF1_TXDAT
 
- LOCHNAGAR2_PIN_DSP_AIF2_BCLK
 
- LOCHNAGAR2_PIN_DSP_AIF2_LRCLK
 
- LOCHNAGAR2_PIN_DSP_AIF2_RXDAT
 
- LOCHNAGAR2_PIN_DSP_AIF2_TXDAT
 
- LOCHNAGAR2_PIN_DSP_CLKIN
 
- LOCHNAGAR2_PIN_DSP_DMICCLK1
 
- LOCHNAGAR2_PIN_DSP_DMICCLK2
 
- LOCHNAGAR2_PIN_DSP_DMICDAT1
 
- LOCHNAGAR2_PIN_DSP_DMICDAT2
 
- LOCHNAGAR2_PIN_DSP_GPIO1
 
- LOCHNAGAR2_PIN_DSP_GPIO2
 
- LOCHNAGAR2_PIN_DSP_GPIO20
 
- LOCHNAGAR2_PIN_DSP_GPIO3
 
- LOCHNAGAR2_PIN_DSP_GPIO4
 
- LOCHNAGAR2_PIN_DSP_GPIO5
 
- LOCHNAGAR2_PIN_DSP_GPIO6
 
- LOCHNAGAR2_PIN_DSP_RESET
 
- LOCHNAGAR2_PIN_DSP_STANDBY
 
- LOCHNAGAR2_PIN_DSP_UART1_RX
 
- LOCHNAGAR2_PIN_DSP_UART1_TX
 
- LOCHNAGAR2_PIN_DSP_UART2_RX
 
- LOCHNAGAR2_PIN_DSP_UART2_TX
 
- LOCHNAGAR2_PIN_FPGA_GPIO1
 
- LOCHNAGAR2_PIN_FPGA_GPIO2
 
- LOCHNAGAR2_PIN_FPGA_GPIO3
 
- LOCHNAGAR2_PIN_FPGA_GPIO4
 
- LOCHNAGAR2_PIN_FPGA_GPIO5
 
- LOCHNAGAR2_PIN_FPGA_GPIO6
 
- LOCHNAGAR2_PIN_GF_AIF1_BCLK
 
- LOCHNAGAR2_PIN_GF_AIF1_LRCLK
 
- LOCHNAGAR2_PIN_GF_AIF1_RXDAT
 
- LOCHNAGAR2_PIN_GF_AIF1_TXDAT
 
- LOCHNAGAR2_PIN_GF_AIF2_BCLK
 
- LOCHNAGAR2_PIN_GF_AIF2_LRCLK
 
- LOCHNAGAR2_PIN_GF_AIF2_RXDAT
 
- LOCHNAGAR2_PIN_GF_AIF2_TXDAT
 
- LOCHNAGAR2_PIN_GF_AIF3_BCLK
 
- LOCHNAGAR2_PIN_GF_AIF3_LRCLK
 
- LOCHNAGAR2_PIN_GF_AIF3_RXDAT
 
- LOCHNAGAR2_PIN_GF_AIF3_TXDAT
 
- LOCHNAGAR2_PIN_GF_AIF4_BCLK
 
- LOCHNAGAR2_PIN_GF_AIF4_LRCLK
 
- LOCHNAGAR2_PIN_GF_AIF4_RXDAT
 
- LOCHNAGAR2_PIN_GF_AIF4_TXDAT
 
- LOCHNAGAR2_PIN_GF_GPIO1
 
- LOCHNAGAR2_PIN_GF_GPIO2
 
- LOCHNAGAR2_PIN_GF_GPIO3
 
- LOCHNAGAR2_PIN_GF_GPIO5
 
- LOCHNAGAR2_PIN_GF_GPIO7
 
- LOCHNAGAR2_PIN_GF_UART2_RX
 
- LOCHNAGAR2_PIN_GF_UART2_TX
 
- LOCHNAGAR2_PIN_I2C2_SCL
 
- LOCHNAGAR2_PIN_I2C2_SDA
 
- LOCHNAGAR2_PIN_I2C3_SCL
 
- LOCHNAGAR2_PIN_I2C3_SDA
 
- LOCHNAGAR2_PIN_I2C4_SCL
 
- LOCHNAGAR2_PIN_I2C4_SDA
 
- LOCHNAGAR2_PIN_NUM_GPIOS
 
- LOCHNAGAR2_PIN_PSIA1_BCLK
 
- LOCHNAGAR2_PIN_PSIA1_LRCLK
 
- LOCHNAGAR2_PIN_PSIA1_MCLK
 
- LOCHNAGAR2_PIN_PSIA1_RXDAT
 
- LOCHNAGAR2_PIN_PSIA1_TXDAT
 
- LOCHNAGAR2_PIN_PSIA2_BCLK
 
- LOCHNAGAR2_PIN_PSIA2_LRCLK
 
- LOCHNAGAR2_PIN_PSIA2_MCLK
 
- LOCHNAGAR2_PIN_PSIA2_RXDAT
 
- LOCHNAGAR2_PIN_PSIA2_TXDAT
 
- LOCHNAGAR2_PIN_SOUNDCARD_AIF_BCLK
 
- LOCHNAGAR2_PIN_SOUNDCARD_AIF_LRCLK
 
- LOCHNAGAR2_PIN_SOUNDCARD_AIF_RXDAT
 
- LOCHNAGAR2_PIN_SOUNDCARD_AIF_TXDAT
 
- LOCHNAGAR2_PIN_SPDIF_AIF_BCLK
 
- LOCHNAGAR2_PIN_SPDIF_AIF_LRCLK
 
- LOCHNAGAR2_PIN_SPDIF_AIF_RXDAT
 
- LOCHNAGAR2_PIN_SPDIF_AIF_TXDAT
 
- LOCHNAGAR2_PIN_SPDIF_HWMODE
 
- LOCHNAGAR2_PIN_SPDIF_RESET
 
- LOCHNAGAR2_PIN_USB_AIF1_BCLK
 
- LOCHNAGAR2_PIN_USB_AIF1_LRCLK
 
- LOCHNAGAR2_PIN_USB_AIF1_RXDAT
 
- LOCHNAGAR2_PIN_USB_AIF1_TXDAT
 
- LOCHNAGAR2_PIN_USB_AIF2_BCLK
 
- LOCHNAGAR2_PIN_USB_AIF2_LRCLK
 
- LOCHNAGAR2_PIN_USB_AIF2_RXDAT
 
- LOCHNAGAR2_PIN_USB_AIF2_TXDAT
 
- LOCHNAGAR2_PIN_USB_UART_RX
 
- LOCHNAGAR2_POWER_CTRL
 
- LOCHNAGAR2_PSIA1_CTRL
 
- LOCHNAGAR2_PSIA1_MCLK_CTRL
 
- LOCHNAGAR2_PSIA2_CTRL
 
- LOCHNAGAR2_PSIA2_MCLK_CTRL
 
- LOCHNAGAR2_PWR_ENA_MASK
 
- LOCHNAGAR2_PWR_ENA_SHIFT
 
- LOCHNAGAR2_REGISTERS_H
 
- LOCHNAGAR2_SOUNDCARD_AIF_CTRL
 
- LOCHNAGAR2_SOUNDCARD_MCLK_CTRL
 
- LOCHNAGAR2_SPDIF_AIF_CTRL
 
- LOCHNAGAR2_SPDIF_CTRL
 
- LOCHNAGAR2_SPDIF_HWMODE_MASK
 
- LOCHNAGAR2_SPDIF_HWMODE_SHIFT
 
- LOCHNAGAR2_SPDIF_MCLK_CTRL
 
- LOCHNAGAR2_SPDIF_RESET_MASK
 
- LOCHNAGAR2_SPDIF_RESET_SHIFT
 
- LOCHNAGAR2_USB_AIF1_CTRL
 
- LOCHNAGAR2_USB_AIF2_CTRL
 
- LOCHNAGAR2_VDDCORE_CDC_CTRL1
 
- LOCHNAGAR2_VDDCORE_CDC_CTRL2
 
- LOCHNAGAR2_VDDCORE_CDC_REG_ENA_MASK
 
- LOCHNAGAR2_VDDCORE_CDC_REG_ENA_SHIFT
 
- LOCHNAGAR2_VDDCORE_CDC_VSEL_MASK
 
- LOCHNAGAR2_VDDCORE_CDC_VSEL_SHIFT
 
- LOCHNAGAR_ADAT_MCLK
 
- LOCHNAGAR_BOOT_DELAY_MS
 
- LOCHNAGAR_BOOT_RETRIES
 
- LOCHNAGAR_CDC_MCLK1
 
- LOCHNAGAR_CDC_MCLK2
 
- LOCHNAGAR_CONFIG_POLL_US
 
- LOCHNAGAR_DEVICE_ID_MASK
 
- LOCHNAGAR_DEVICE_ID_SHIFT
 
- LOCHNAGAR_DSP_CLKIN
 
- LOCHNAGAR_FIRMWARE_ID1
 
- LOCHNAGAR_FIRMWARE_ID2
 
- LOCHNAGAR_GF_CLKOUT1
 
- LOCHNAGAR_GF_CLKOUT2
 
- LOCHNAGAR_MIC1VDD
 
- LOCHNAGAR_MIC2VDD
 
- LOCHNAGAR_MICVDD
 
- LOCHNAGAR_NUM_CLOCKS
 
- LOCHNAGAR_PSIA1_MCLK
 
- LOCHNAGAR_PSIA2_MCLK
 
- LOCHNAGAR_REV_ID_MASK
 
- LOCHNAGAR_REV_ID_SHIFT
 
- LOCHNAGAR_SOFTWARE_RESET
 
- LOCHNAGAR_SOUNDCARD_MCLK
 
- LOCHNAGAR_SPDIF_CLKOUT
 
- LOCHNAGAR_SPDIF_MCLK
 
- LOCHNAGAR_VDDCORE
 
- LOCK
 
- LOCKACCESS
 
- LOCKBIT
 
- LOCKCLK
 
- LOCKCLK_MASK
 
- LOCKCON0
 
- LOCKCON1
 
- LOCKDEP_NOW_UNRELIABLE
 
- LOCKDEP_STATE
 
- LOCKDEP_STILL_OK
 
- LOCKDEP_SYS_EXIT
 
- LOCKDEP_SYS_EXIT_IRQ
 
- LOCKDET_REF0
 
- LOCKDET_REF1
 
- LOCKDET_REF2
 
- LOCKDOWN_ACPI_TABLES
 
- LOCKDOWN_BPF_READ
 
- LOCKDOWN_CONFIDENTIALITY_MAX
 
- LOCKDOWN_DEBUGFS
 
- LOCKDOWN_DEV_MEM
 
- LOCKDOWN_EFI_TEST
 
- LOCKDOWN_HIBERNATION
 
- LOCKDOWN_INTEGRITY_MAX
 
- LOCKDOWN_IOPORT
 
- LOCKDOWN_KCORE
 
- LOCKDOWN_KEXEC
 
- LOCKDOWN_KPROBES
 
- LOCKDOWN_MMIOTRACE
 
- LOCKDOWN_MODULE_PARAMETERS
 
- LOCKDOWN_MODULE_SIGNATURE
 
- LOCKDOWN_MSR
 
- LOCKDOWN_NONE
 
- LOCKDOWN_PCI_ACCESS
 
- LOCKDOWN_PCMCIA_CIS
 
- LOCKDOWN_PERF
 
- LOCKDOWN_TIOCSSERIAL
 
- LOCKDOWN_TRACEFS
 
- LOCKDOWN_XMON_RW
 
- LOCKDOWN_XMON_WR
 
- LOCKD_BUFSIZE
 
- LOCKD_DFLT_TIMEO
 
- LOCKD_VERSION
 
- LOCKD_XDR4_H
 
- LOCKD_XDR_H
 
- LOCKED
 
- LOCKEDVIT
 
- LOCKED_BLK
 
- LOCKED_PAGE
 
- LOCKED_SHIFT
 
- LOCKEVENT_reset_cnts
 
- LOCKF_ENABLED_IRQ_ALL
 
- LOCKF_IRQ
 
- LOCKF_IRQ_READ
 
- LOCKF_USED_IN_IRQ_ALL
 
- LOCKHASH_BITS
 
- LOCKHASH_SIZE
 
- LOCKING_ANDX_CANCEL_LOCK
 
- LOCKING_ANDX_CHANGE_LOCKTYPE
 
- LOCKING_ANDX_LARGE_FILES
 
- LOCKING_ANDX_OPLOCK_RELEASE
 
- LOCKING_ANDX_RANGE
 
- LOCKING_ANDX_SHARED_LOCK
 
- LOCKING_RANGE_NON_GLOBAL
 
- LOCKLEVEL
 
- LOCKSTATUS
 
- LOCKSTAT_POINTS
 
- LOCKS_H
 
- LOCKS_PER_CPU
 
- LOCKTIME
 
- LOCKTIME0
 
- LOCKTIME1
 
- LOCKTIME2
 
- LOCKTIME3
 
- LOCKTYPE_MUTEX
 
- LOCKTYPE_RTMUTEX
 
- LOCKTYPE_RWLOCK
 
- LOCKTYPE_RWSEM
 
- LOCKTYPE_SPIN
 
- LOCKTYPE_WW
 
- LOCKUP
 
- LOCK_8DOT
 
- LOCK_ALL
 
- LOCK_ALL_EN
 
- LOCK_BASE_OFFSET
 
- LOCK_BUS
 
- LOCK_CLAIM
 
- LOCK_CODE
 
- LOCK_CONFIG_IDX
 
- LOCK_CONTENDED
 
- LOCK_CONTENDED_FLAGS
 
- LOCK_CONTENDED_RETURN
 
- LOCK_CORE
 
- LOCK_CS_ENABLE
 
- LOCK_DATA
 
- LOCK_DEFINITIF
 
- LOCK_DELAY
 
- LOCK_DETECT_ENABLE
 
- LOCK_DETECT_ERROR
 
- LOCK_DIMM
 
- LOCK_DONE
 
- LOCK_DRIVER
 
- LOCK_EN
 
- LOCK_ENABLED_
 
- LOCK_EVENT
 
- LOCK_EVENTS_DIR
 
- LOCK_EX
 
- LOCK_FLAG
 
- LOCK_FW
 
- LOCK_GIVE
 
- LOCK_IEN
 
- LOCK_IMPL_INITIALIZER
 
- LOCK_IND
 
- LOCK_INT
 
- LOCK_IO
 
- LOCK_LEVEL1
 
- LOCK_LEVEL2
 
- LOCK_LOSS_BITS
 
- LOCK_MAND
 
- LOCK_MONITOR
 
- LOCK_NAMESPACE
 
- LOCK_NB
 
- LOCK_NDCTL
 
- LOCK_NONE
 
- LOCK_ODDF_MARK
 
- LOCK_OFFSET
 
- LOCK_PFS
 
- LOCK_PREFIX
 
- LOCK_PREFIX_HERE
 
- LOCK_READ
 
- LOCK_REGION
 
- LOCK_REQ
 
- LOCK_RETRY
 
- LOCK_RETRY_COUNT
 
- LOCK_RETRY_DELAY
 
- LOCK_RSP
 
- LOCK_RW
 
- LOCK_SECTION_END
 
- LOCK_SECTION_NAME
 
- LOCK_SECTION_START
 
- LOCK_SEL_MASK
 
- LOCK_SH
 
- LOCK_STAT
 
- LOCK_STATEID_MUTEX
 
- LOCK_STATUS
 
- LOCK_STATUS_REG_1
 
- LOCK_STATUS_REG_2
 
- LOCK_SUM
 
- LOCK_TAKE
 
- LOCK_TEST_WITH_RETURN
 
- LOCK_TEXT
 
- LOCK_TIMEOUT_NS
 
- LOCK_TIMEOUT_US
 
- LOCK_TOKEN
 
- LOCK_TRACE_SIZE_IN_LONGS
 
- LOCK_TUNER_COMMAND
 
- LOCK_TYPE_REQUIRES_REFRESH
 
- LOCK_TYPE_USES_LVB
 
- LOCK_UN
 
- LOCK_UNLOCK
 
- LOCK_UNLOCK_2
 
- LOCK_UNLOCK_CACHE
 
- LOCK_USAGE_CHARS
 
- LOCK_USAGE_DIR_MASK
 
- LOCK_USAGE_READ_MASK
 
- LOCK_USAGE_STATES
 
- LOCK_USAGE_STATE_MASK
 
- LOCK_USED
 
- LOCK_USED_IN_
 
- LOCK_VALUE_IDX
 
- LOCK_VPE
 
- LOCK_WAYS_EIGHTH
 
- LOCK_WAYS_FULL
 
- LOCK_WAYS_HALF
 
- LOCK_WAYS_TWO_EIGHTH
 
- LOCK_WAYS_ZERO
 
- LOCK_WRITE
 
- LOCL_STARTAUDIO
 
- LOCOMOKBD_NUMKEYS
 
- LOCOMOLCD_SUSPENDED
 
- LOCOMO_ACC
 
- LOCOMO_ACC_64FSEN
 
- LOCOMO_ACC_CLKSEL000
 
- LOCOMO_ACC_CLKSEL001
 
- LOCOMO_ACC_CLKSEL010
 
- LOCOMO_ACC_CLKSEL011
 
- LOCOMO_ACC_CLKSEL100
 
- LOCOMO_ACC_CLKSEL101
 
- LOCOMO_ACC_MCLKEN
 
- LOCOMO_ACC_XEN
 
- LOCOMO_ACC_XON
 
- LOCOMO_ACC_XSEL0
 
- LOCOMO_ACC_XSEL1
 
- LOCOMO_ALC_EN
 
- LOCOMO_ALD
 
- LOCOMO_ALS
 
- LOCOMO_ASD
 
- LOCOMO_AUDIO
 
- LOCOMO_BACKLIGHT
 
- LOCOMO_C32K
 
- LOCOMO_CPSD
 
- LOCOMO_DAC
 
- LOCOMO_DAC_SCLOEB
 
- LOCOMO_DAC_SDA
 
- LOCOMO_DAC_SDAOEB
 
- LOCOMO_DAC_TEST
 
- LOCOMO_DEV
 
- LOCOMO_DEVID_AUDIO
 
- LOCOMO_DEVID_BACKLIGHT
 
- LOCOMO_DEVID_FRONTLIGHT
 
- LOCOMO_DEVID_KEYBOARD
 
- LOCOMO_DEVID_LED
 
- LOCOMO_DEVID_SPI
 
- LOCOMO_DEVID_UART
 
- LOCOMO_DRIVER_NAME
 
- LOCOMO_DRV
 
- LOCOMO_FRONTLIGHT
 
- LOCOMO_GFIE
 
- LOCOMO_GIE
 
- LOCOMO_GIR
 
- LOCOMO_GIS
 
- LOCOMO_GPD
 
- LOCOMO_GPE
 
- LOCOMO_GPIO
 
- LOCOMO_GPIO_CARD_DETECT
 
- LOCOMO_GPIO_CARD_POWER
 
- LOCOMO_GPIO_CTS
 
- LOCOMO_GPIO_DAC_ON
 
- LOCOMO_GPIO_DAC_SCK
 
- LOCOMO_GPIO_DAC_SDATA
 
- LOCOMO_GPIO_DAC_SLOAD
 
- LOCOMO_GPIO_DSR
 
- LOCOMO_GPIO_DTR
 
- LOCOMO_GPIO_FL_VR
 
- LOCOMO_GPIO_LCD_MOD
 
- LOCOMO_GPIO_LCD_VEE_ON
 
- LOCOMO_GPIO_LCD_VSHA_ON
 
- LOCOMO_GPIO_LCD_VSHD_ON
 
- LOCOMO_GPIO_RTS
 
- LOCOMO_GPIO_WRITE_PROT
 
- LOCOMO_GPL
 
- LOCOMO_GPO
 
- LOCOMO_GRIE
 
- LOCOMO_GWE
 
- LOCOMO_HSC
 
- LOCOMO_HSD
 
- LOCOMO_ICR
 
- LOCOMO_KCMD
 
- LOCOMO_KEYBOARD
 
- LOCOMO_KIB
 
- LOCOMO_KIC
 
- LOCOMO_KSC
 
- LOCOMO_LED
 
- LOCOMO_LPT0
 
- LOCOMO_LPT1
 
- LOCOMO_LPT_TOFH
 
- LOCOMO_LPT_TOFL
 
- LOCOMO_LPT_TOH
 
- LOCOMO_LPT_TOL
 
- LOCOMO_LTC
 
- LOCOMO_LTINT
 
- LOCOMO_MCSX0
 
- LOCOMO_MCSX1
 
- LOCOMO_MCSX2
 
- LOCOMO_MCSX3
 
- LOCOMO_PAIF
 
- LOCOMO_PAIF_LRCEN
 
- LOCOMO_PAIF_LRCEVE
 
- LOCOMO_PAIF_LRCINV
 
- LOCOMO_PAIF_LRCRST
 
- LOCOMO_PAIF_SCEN
 
- LOCOMO_PAIF_SCINV
 
- LOCOMO_SPI
 
- LOCOMO_SPICT
 
- LOCOMO_SPIIE
 
- LOCOMO_SPIIR
 
- LOCOMO_SPIIS
 
- LOCOMO_SPIMD
 
- LOCOMO_SPIRD
 
- LOCOMO_SPIRS
 
- LOCOMO_SPIST
 
- LOCOMO_SPITD
 
- LOCOMO_SPITS
 
- LOCOMO_SPIWE
 
- LOCOMO_SPI_REND
 
- LOCOMO_SPI_RFR
 
- LOCOMO_SPI_RFW
 
- LOCOMO_SPI_TEND
 
- LOCOMO_ST
 
- LOCOMO_TADC
 
- LOCOMO_TC
 
- LOCOMO_VER
 
- LOCORE
 
- LOC_CPU
 
- LOC_DEAD_RING
 
- LOC_DISKETTE
 
- LOC_ETHERNET
 
- LOC_FAN
 
- LOC_FIRMWARE
 
- LOC_GRAPHICS
 
- LOC_IO_ADAPTER
 
- LOC_KEYBOARD
 
- LOC_LCD
 
- LOC_MEMORY
 
- LOC_MOUSE
 
- LOC_NV_MEMORY
 
- LOC_OTHER
 
- LOC_OTHER_IO
 
- LOC_PARALLEL
 
- LOC_PLANAR
 
- LOC_PTEP
 
- LOC_RACKMOUNTED
 
- LOC_SCSI
 
- LOC_SCSI_DEV_ADDR
 
- LOC_SCSI_DEV_LOC
 
- LOC_SERIAL
 
- LOC_SWITCH_ADAPTER
 
- LOC_TX
 
- LOC_VOLTAGE
 
- LODWORD
 
- LOFT_MAX_DEV
 
- LOF_HI
 
- LOF_LO
 
- LOG
 
- LOG10_2
 
- LOG10_MAGIC
 
- LOG2CPULAUNCH
 
- LOG2_DEFAULT_XFER_SIZE
 
- LOG2_E_100X
 
- LOG2_LOG_TABLE_SIZE
 
- LOG2_PERIODIC_SIZE
 
- LOG2_PMI_ADDR_GRANULARITY
 
- LOGADDR
 
- LOGDIR_NAME_SIZE
 
- LOGFILE_NAME
 
- LOGFILE_NO_CLIENT
 
- LOGFILE_NO_CLIENT_CPU
 
- LOGGC_LOCK
 
- LOGGC_LOCK_INIT
 
- LOGGC_UNLOCK
 
- LOGGC_WAKEUP
 
- LOGGED_UTILITY_STREAM
 
- LOGGING_ENHANCEMENT
 
- LOGIBM_BASE
 
- LOGIBM_CONFIG_BYTE
 
- LOGIBM_CONFIG_PORT
 
- LOGIBM_CONTROL_PORT
 
- LOGIBM_DATA_PORT
 
- LOGIBM_DEFAULT_MODE
 
- LOGIBM_DISABLE_IRQ
 
- LOGIBM_ENABLE_IRQ
 
- LOGIBM_EXTENT
 
- LOGIBM_IRQ
 
- LOGIBM_READ_X_HIGH
 
- LOGIBM_READ_X_LOW
 
- LOGIBM_READ_Y_HIGH
 
- LOGIBM_READ_Y_LOW
 
- LOGIBM_SIGNATURE_BYTE
 
- LOGIBM_SIGNATURE_PORT
 
- LOGIC1_IEN
 
- LOGIC1_INT
 
- LOGIC1_STAT
 
- LOGIC2_IEN
 
- LOGIC2_INT
 
- LOGIC2_STAT
 
- LOGICAL_ADDR_DISABLE
 
- LOGICAL_ADDR_MASK
 
- LOGICAL_ADDR_VALID
 
- LOGICAL_DEVICE_NUMBER
 
- LOGICAL_DEV_ACPI
 
- LOGICAL_DEV_CIR
 
- LOGICAL_DEV_CIR_REV1
 
- LOGICAL_DEV_CIR_REV2
 
- LOGICAL_DEV_CIR_WAKE
 
- LOGICAL_DEV_DISABLE
 
- LOGICAL_DEV_ENABLE
 
- LOGICAL_DEV_LPT
 
- LOGICAL_LINK_STATE
 
- LOGICAL_LINK_STATE_RSP
 
- LOGICAL_LINK_STATUS_MASK
 
- LOGICAL_PAGE_DATA_SIZE
 
- LOGICAL_PAGE_DATA_SIZE__VALUE
 
- LOGICAL_PAGE_NUMBER_MASK
 
- LOGICAL_PAGE_NUMBER_SHIFT
 
- LOGICAL_PAGE_SPARE_SIZE
 
- LOGICAL_PAGE_SPARE_SIZE__VALUE
 
- LOGICAL_UNIT_COMMUNICATION_FAILURE
 
- LOGICAL_UNIT_NOT_READY
 
- LOGICAL_UNIT_RESET
 
- LOGIC_0
 
- LOGIC_PIO_CPU_MMIO
 
- LOGIC_PIO_INDIRECT
 
- LOGIN
 
- LOGINOUT_PORT_IOCB_TYPE
 
- LOGIN_FLAGS_CLOSED
 
- LOGIN_FLAGS_INITIAL_PDU
 
- LOGIN_FLAGS_READY
 
- LOGIN_FLAGS_READ_ACTIVE
 
- LOGIN_ORB_EXCLUSIVE
 
- LOGIN_ORB_LUN
 
- LOGIN_ORB_PASSWORD_LENGTH
 
- LOGIN_ORB_RECONNECT
 
- LOGIN_ORB_RESERVED
 
- LOGIN_ORB_RESPONSE_LENGTH
 
- LOGIN_RSP
 
- LOGIN_TOV
 
- LOGITECH_DJ_INTERFACE_NUMBER
 
- LOGIWEND
 
- LOGIWOFFSET
 
- LOGLEVEL_ALERT
 
- LOGLEVEL_CRIT
 
- LOGLEVEL_DEBUG
 
- LOGLEVEL_DEFAULT
 
- LOGLEVEL_EMERG
 
- LOGLEVEL_ERR
 
- LOGLEVEL_INFO
 
- LOGLEVEL_NOTICE
 
- LOGLEVEL_SCHED
 
- LOGLEVEL_WARNING
 
- LOGMAGIC
 
- LOGMOUNT
 
- LOGNAME
 
- LOGO
 
- LOGOFF_ANDX_REQ
 
- LOGOFF_ANDX_RSP
 
- LOGOLAMP_ALWAYS
 
- LOGOLAMP_POWERON
 
- LOGOUT_OPTION_CLOSE_SESSION
 
- LOGOUT_OPTION_FREE_DDB
 
- LOGOUT_OPTION_RELOGIN
 
- LOGOUT_ORB_LOGIN_ID
 
- LOGOUT_TOV
 
- LOGO_SNT
 
- LOGPAGES
 
- LOGPHDRSIZE
 
- LOGPREFIX
 
- LOGPSIZE
 
- LOGPTLRSIZE
 
- LOGRDSIZE
 
- LOGREADERR
 
- LOGREDONE
 
- LOGSTART_B
 
- LOGSUPER_B
 
- LOGSYNC_BARRIER
 
- LOGSYNC_DELTA
 
- LOGSYNC_LOCK
 
- LOGSYNC_LOCK_INIT
 
- LOGSYNC_UNLOCK
 
- LOGVERSION
 
- LOGWRAP
 
- LOG_AAC_DEBUG
 
- LOG_AAC_HIGH_ERROR
 
- LOG_AAC_INFORMATIONAL
 
- LOG_AAC_INIT
 
- LOG_AAC_LOW_ERROR
 
- LOG_AAC_MEDIUM_ERROR
 
- LOG_AAC_PANIC
 
- LOG_AAC_WARNING
 
- LOG_AAC_WINDBG_PRINT
 
- LOG_ACL
 
- LOG_ALIGN
 
- LOG_ALL
 
- LOG_ALLOCPXD
 
- LOG_ALLOCPXDLIST
 
- LOG_ALLOCXAD
 
- LOG_ALLOCXADLIST
 
- LOG_ALL_MSG
 
- LOG_ALL_TF_CHANNELS
 
- LOG_BACKLIGHT
 
- LOG_BANDWIDTH_CALCS
 
- LOG_BANDWIDTH_VALIDATION
 
- LOG_BG
 
- LOG_BIOS
 
- LOG_BLOB
 
- LOG_BLOCK_SIZE
 
- LOG_BLOCK_SPAN_INFO
 
- LOG_BTROOT
 
- LOG_BUFFER
 
- LOG_BUFFER_ENTRIES
 
- LOG_BUFFER_ENTRY_SIZE
 
- LOG_BUF_LEN_MAX
 
- LOG_BUF_OFF
 
- LOG_BUF_SIZE
 
- LOG_BUF_SIZE8
 
- LOG_BUSSERVICE
 
- LOG_CLIENT_RECORD
 
- LOG_CNF_DATA
 
- LOG_CNF_LINE
 
- LOG_CNF_MISC
 
- LOG_CODE
 
- LOG_COMMIT
 
- LOG_CONNECT
 
- LOG_CONT
 
- LOG_DATA
 
- LOG_DC
 
- LOG_DEBUG
 
- LOG_DETECTION_DP_CAPS
 
- LOG_DETECTION_EDID_PARSER
 
- LOG_DEVICE
 
- LOG_DIR_XTREE
 
- LOG_DISCARD_FLAG
 
- LOG_DISCOVERY
 
- LOG_DISPLAYSTATS
 
- LOG_DML
 
- LOG_DSC
 
- LOG_DTN
 
- LOG_DTREE
 
- LOG_DWB
 
- LOG_EA
 
- LOG_ELS
 
- LOG_ENT_SIZE
 
- LOG_ERROR
 
- LOG_EVENT
 
- LOG_EVENT_DETECTION
 
- LOG_EVENT_LINK_LOSS
 
- LOG_EVENT_LINK_TRAINING
 
- LOG_EVENT_MODE_SET
 
- LOG_EVENT_UNDERFLOW
 
- LOG_EXTEND
 
- LOG_FACILITY
 
- LOG_FCP
 
- LOG_FCP_ERROR
 
- LOG_FCP_UNDER
 
- LOG_FEATURE_OVERRIDE
 
- LOG_FIP
 
- LOG_FLAG_ILLEGALPKT
 
- LOG_FLAG_ILLEGALSIZE
 
- LOG_FLAG_NOMEM
 
- LOG_FLAG_OVERRUN
 
- LOG_FLUSH_FLAG
 
- LOG_FREEPXD
 
- LOG_FREEPXDLIST
 
- LOG_FREEXAD
 
- LOG_FREEXADLIST
 
- LOG_FUA_FLAG
 
- LOG_FUNCTIONDONE
 
- LOG_FW_DEBUG_MSG
 
- LOG_GAMMA_DEBUG
 
- LOG_GAMMA_WRITE
 
- LOG_GRP_SIZE
 
- LOG_HBA
 
- LOG_HDMI_RETIMER_REDRIVER
 
- LOG_HEADER_FLAG_BUFFER_WRAPAROUND
 
- LOG_HW_AUDIO
 
- LOG_HW_HOTPLUG
 
- LOG_HW_HPD_IRQ
 
- LOG_HW_LINK_TRAINING
 
- LOG_HW_RESUME_S3
 
- LOG_HW_SET_MODE
 
- LOG_I
 
- LOG_I2C_AUX
 
- LOG_IF_TRACE
 
- LOG_INCOMING
 
- LOG_INDEX_ADD_SECT_PTR
 
- LOG_INIT
 
- LOG_INODE
 
- LOG_INODE_ALL
 
- LOG_INODE_EXISTS
 
- LOG_IO
 
- LOG_IP
 
- LOG_ITEM_BATCH_SIZE
 
- LOG_KEEP_ALIVE
 
- LOG_KILL_TRACEE
 
- LOG_LEVEL
 
- LOG_LIBDFC
 
- LOG_LINE_MAX
 
- LOG_LINK_EVENT
 
- LOG_LOCK
 
- LOG_LOCK_INIT
 
- LOG_LOOP_SIZE
 
- LOG_MARK_FLAG
 
- LOG_MAX_HW_POINTS
 
- LOG_MAX_INC
 
- LOG_MAX_LINELEN
 
- LOG_MAX_SIZE_OFF
 
- LOG_MBOX
 
- LOG_MEM_ERR
 
- LOG_MESSAGES
 
- LOG_METADATA_FLAG
 
- LOG_MISC
 
- LOG_MOUNT
 
- LOG_MST
 
- LOG_NBYTES
 
- LOG_NET_INIT
 
- LOG_NEW
 
- LOG_NEWLINE
 
- LOG_NEW_ENT
 
- LOG_NODE
 
- LOG_NOREDOFILE
 
- LOG_NOREDOINOEXT
 
- LOG_NOREDOPAGE
 
- LOG_NUMBER
 
- LOG_NUMBER_MASK
 
- LOG_NVME
 
- LOG_NVME_ABTS
 
- LOG_NVME_DISC
 
- LOG_NVME_IOERR
 
- LOG_OFFSET
 
- LOG_OLD_ENT
 
- LOG_OLD_VALUE
 
- LOG_OTHER_INODE
 
- LOG_OTHER_INODE_ALL
 
- LOG_OUTGOING
 
- LOG_PARSE
 
- LOG_PERF_TRACE
 
- LOG_POF_CARD
 
- LOG_POF_OPEN
 
- LOG_POF_RECORD
 
- LOG_POF_WRITE
 
- LOG_POLL_SEC
 
- LOG_PREFIX
 
- LOG_PROC_ALL
 
- LOG_PROC_OPEN
 
- LOG_RDMA_EVENT
 
- LOG_RDMA_MR
 
- LOG_RDMA_RECV
 
- LOG_RDMA_SEND
 
- LOG_READ
 
- LOG_REDOPAGE
 
- LOG_RELOCATE
 
- LOG_RESOURCE
 
- LOG_SAMPLE_1DLUT
 
- LOG_SCALER
 
- LOG_SCHED_ASYN
 
- LOG_SCSI_CMD
 
- LOG_SECTION_TOTAL_COUNT
 
- LOG_SECTORS_PER_BLOCK
 
- LOG_SECURITY
 
- LOG_SELECT
 
- LOG_SENSE
 
- LOG_SEQ_INIT
 
- LOG_SHIFT
 
- LOG_SIZE
 
- LOG_SLI
 
- LOG_SURFACE
 
- LOG_SYNC
 
- LOG_SYNCPT
 
- LOG_TABLE_SIZE
 
- LOG_TEMP
 
- LOG_TGT
 
- LOG_TXBB_SIZE
 
- LOG_UNLOCK
 
- LOG_UPDATEMAP
 
- LOG_VALID
 
- LOG_VPORT
 
- LOG_WALK_PIN_ONLY
 
- LOG_WALK_REPLAY_ALL
 
- LOG_WALK_REPLAY_DIR_INDEX
 
- LOG_WALK_REPLAY_INODES
 
- LOG_WARNING
 
- LOG_WRITE
 
- LOG_XTREE
 
- LOLA2_REMOTE_PRODUCT_ID
 
- LOLA_AFG_CLOCK_WIDGET_PRESENT
 
- LOLA_AFG_INPUT_PIN_COUNT
 
- LOLA_AFG_MIXER_WIDGET_PRESENT
 
- LOLA_AFG_OUTPUT_PIN_COUNT
 
- LOLA_AMP_MUTE_CAPABLE
 
- LOLA_AMP_NUM_STEPS
 
- LOLA_AMP_OFFSET
 
- LOLA_AMP_STEP_SIZE
 
- LOLA_BAR0_CORBCTL
 
- LOLA_BAR0_CORBLBASE
 
- LOLA_BAR0_CORBRP
 
- LOLA_BAR0_CORBSIZE
 
- LOLA_BAR0_CORBSTS
 
- LOLA_BAR0_CORBUBASE
 
- LOLA_BAR0_CORBWP
 
- LOLA_BAR0_DPLBASE
 
- LOLA_BAR0_DPUBASE
 
- LOLA_BAR0_GCAP
 
- LOLA_BAR0_GCTL
 
- LOLA_BAR0_GSTS
 
- LOLA_BAR0_ICS
 
- LOLA_BAR0_ICW
 
- LOLA_BAR0_INPAY
 
- LOLA_BAR0_INSTRMPAY
 
- LOLA_BAR0_INTCTL
 
- LOLA_BAR0_INTSTS
 
- LOLA_BAR0_IRR
 
- LOLA_BAR0_OUTPAY
 
- LOLA_BAR0_OUTSTRMPAY
 
- LOLA_BAR0_RINTCNT
 
- LOLA_BAR0_RIRBCTL
 
- LOLA_BAR0_RIRBLBASE
 
- LOLA_BAR0_RIRBSIZE
 
- LOLA_BAR0_RIRBSTS
 
- LOLA_BAR0_RIRBUBASE
 
- LOLA_BAR0_RIRBWP
 
- LOLA_BAR0_SD0_OFFSET
 
- LOLA_BAR0_SSYNC
 
- LOLA_BAR0_STATESTS
 
- LOLA_BAR0_VMAJ
 
- LOLA_BAR0_VMIN
 
- LOLA_BAR0_WAKEEN
 
- LOLA_BAR0_WALCLK
 
- LOLA_BAR1_AISPI
 
- LOLA_BAR1_ANALOG_CLIP_IN
 
- LOLA_BAR1_BOARD_CTRL
 
- LOLA_BAR1_BOARD_MODE
 
- LOLA_BAR1_CTRLSPI
 
- LOLA_BAR1_DEST00_MIX00_01_GAIN
 
- LOLA_BAR1_DEST00_MIX30_31_GAIN
 
- LOLA_BAR1_DEST00_MIX_GAIN_ENABLE
 
- LOLA_BAR1_DEST01_MIX00_01_GAIN
 
- LOLA_BAR1_DEST01_MIX30_31_GAIN
 
- LOLA_BAR1_DEST31_MIX00_01_GAIN
 
- LOLA_BAR1_DEST31_MIX30_31_GAIN
 
- LOLA_BAR1_DEST31_MIX_GAIN_ENABLE
 
- LOLA_BAR1_DEVER
 
- LOLA_BAR1_DIINTCTL
 
- LOLA_BAR1_DIINTSTS
 
- LOLA_BAR1_DINTCTL
 
- LOLA_BAR1_DINTSTS
 
- LOLA_BAR1_DOINTCTL
 
- LOLA_BAR1_DOINTSTS
 
- LOLA_BAR1_DSD0_OFFSET
 
- LOLA_BAR1_DSD_SIZE
 
- LOLA_BAR1_DSDnBDPL
 
- LOLA_BAR1_DSDnBDPU
 
- LOLA_BAR1_DSDnCTL
 
- LOLA_BAR1_DSDnLPIB
 
- LOLA_BAR1_DSDnLVI
 
- LOLA_BAR1_DSDnSTS
 
- LOLA_BAR1_DSPI
 
- LOLA_BAR1_FPGAVER
 
- LOLA_BAR1_GRAN
 
- LOLA_BAR1_JTAG
 
- LOLA_BAR1_LRC
 
- LOLA_BAR1_MIX_GAIN
 
- LOLA_BAR1_NVRAMVER
 
- LOLA_BAR1_PEAKMETERS_AGC
 
- LOLA_BAR1_PEAKMETERS_AGC00_01
 
- LOLA_BAR1_PEAKMETERS_AGC14_15
 
- LOLA_BAR1_PEAKMETERS_DEST
 
- LOLA_BAR1_PEAKMETERS_DEST00_01
 
- LOLA_BAR1_PEAKMETERS_DEST30_31
 
- LOLA_BAR1_PEAKMETERS_SOURCE
 
- LOLA_BAR1_PEAKMETERS_SOURCE00_01
 
- LOLA_BAR1_PEAKMETERS_SOURCE30_31
 
- LOLA_BAR1_SOURCE00_01_GAIN
 
- LOLA_BAR1_SOURCE30_31_GAIN
 
- LOLA_BAR1_SOURCE_GAIN
 
- LOLA_BAR1_SOURCE_GAIN_ENABLE
 
- LOLA_BAR1_SSYNC
 
- LOLA_BAR1_UARTCR
 
- LOLA_BAR1_UARTRX
 
- LOLA_BAR1_UARTTX
 
- LOLA_BAR1_UCBMV
 
- LOLA_BDL_ENTRY_SIZE
 
- LOLA_CLOCK_FORMAT_NONE
 
- LOLA_CLOCK_FORMAT_NTSC
 
- LOLA_CLOCK_FORMAT_PAL
 
- LOLA_CLOCK_TYPE_AES
 
- LOLA_CLOCK_TYPE_AES_SYNC
 
- LOLA_CLOCK_TYPE_ETHERSOUND
 
- LOLA_CLOCK_TYPE_INTERNAL
 
- LOLA_CLOCK_TYPE_VIDEO
 
- LOLA_CLOCK_TYPE_WORDCLOCK
 
- LOLA_CORB_ENTRIES
 
- LOLA_CORB_INT_CMEI
 
- LOLA_CORB_INT_MASK
 
- LOLA_DINT_CTRL
 
- LOLA_DINT_FIFOERR
 
- LOLA_DINT_GLOBAL
 
- LOLA_DINT_MUERR
 
- LOLA_DSD_CTL_DEIE
 
- LOLA_DSD_CTL_IOCE
 
- LOLA_DSD_CTL_SRST
 
- LOLA_DSD_CTL_SRUN
 
- LOLA_DSD_CTL_VLRCV
 
- LOLA_DSD_STS_BCIS
 
- LOLA_DSD_STS_DESE
 
- LOLA_DSD_STS_FIFORDY
 
- LOLA_GCTL_RESET
 
- LOLA_GCTL_UREN
 
- LOLA_GRANULARITY_MAX
 
- LOLA_GRANULARITY_MIN
 
- LOLA_GRANULARITY_STEP
 
- LOLA_LRC_MASK
 
- LOLA_MAXFREQ_AT_GRANULARITY_BELOW_MAX
 
- LOLA_MAXFREQ_AT_GRANULARITY_MIN
 
- LOLA_MAX_BDL_ENTRIES
 
- LOLA_MAX_BUF_SIZE
 
- LOLA_MIXER_DEST_REC_OUTPUT_SEPARATION
 
- LOLA_MIXER_DIM
 
- LOLA_MIXER_SRC_INPUT_PLAY_SEPARATION
 
- LOLA_PAR_AMP_IN_CAP
 
- LOLA_PAR_AMP_OUT_CAP
 
- LOLA_PAR_AUDIO_WIDGET_CAP
 
- LOLA_PAR_CONNLIST_LEN
 
- LOLA_PAR_FIXED_GAIN_LIST
 
- LOLA_PAR_FUNCTION_TYPE
 
- LOLA_PAR_GPIO_CAP
 
- LOLA_PAR_PCM
 
- LOLA_PAR_PIN_CAP
 
- LOLA_PAR_POWER_STATE
 
- LOLA_PAR_SPECIFIC_CAPS
 
- LOLA_PAR_STREAM_FORMATS
 
- LOLA_PAR_VENDOR_ID
 
- LOLA_PEAK_METER_CAN_AGC_MASK
 
- LOLA_PEAK_METER_CAN_ANALOG_CLIP_MASK
 
- LOLA_RBCTL_DMA_EN
 
- LOLA_RBCTL_IRQ_EN
 
- LOLA_RBRWP_CLR
 
- LOLA_REG0_SD_BDLPL
 
- LOLA_REG0_SD_BDLPU
 
- LOLA_REG0_SD_CBL
 
- LOLA_REG0_SD_CTL
 
- LOLA_REG0_SD_FIFOSIZE
 
- LOLA_REG0_SD_FIFOW
 
- LOLA_REG0_SD_FORMAT
 
- LOLA_REG0_SD_LPIB
 
- LOLA_REG0_SD_LVI
 
- LOLA_REG0_SD_STS
 
- LOLA_REMOTE_PRODUCT_ID
 
- LOLA_RIRB_EX_ERROR
 
- LOLA_RIRB_EX_UNSOL_EV
 
- LOLA_RIRB_INT_MASK
 
- LOLA_RIRB_INT_OVERRUN
 
- LOLA_RIRB_INT_RESPONSE
 
- LOLA_UNSOLICITED_ENABLE
 
- LOLA_UNSOLICITED_TAG
 
- LOLA_UNSOLICITED_TAG_MASK
 
- LOLA_UNSOL_RESP_TAG_OFFSET
 
- LOLA_VERB_GET_AMP_GAIN_MUTE
 
- LOLA_VERB_GET_CLOCK_LIST
 
- LOLA_VERB_GET_CLOCK_SELECT
 
- LOLA_VERB_GET_CLOCK_STATUS
 
- LOLA_VERB_GET_CONFIG_DEFAULT
 
- LOLA_VERB_GET_CONV
 
- LOLA_VERB_GET_DIGI_CONVERT_1
 
- LOLA_VERB_GET_FIXED_GAIN
 
- LOLA_VERB_GET_GAIN_SELECT
 
- LOLA_VERB_GET_MAX_LEVEL
 
- LOLA_VERB_GET_POWER_STATE
 
- LOLA_VERB_GET_STREAM_FORMAT
 
- LOLA_VERB_GET_SUBSYSTEM_ID
 
- LOLA_VERB_GET_UNSOLICITED_RESPONSE
 
- LOLA_VERB_PARAMETERS
 
- LOLA_VERB_SET_AMP_GAIN_MUTE
 
- LOLA_VERB_SET_CHANNEL_STREAMID
 
- LOLA_VERB_SET_CLOCK_SELECT
 
- LOLA_VERB_SET_DESTINATION_GAIN
 
- LOLA_VERB_SET_DIGI_CONVERT_1
 
- LOLA_VERB_SET_GAIN_SELECT
 
- LOLA_VERB_SET_GRANULARITY_STEPS
 
- LOLA_VERB_SET_MIX_GAIN
 
- LOLA_VERB_SET_POWER_STATE
 
- LOLA_VERB_SET_SOURCE_GAIN
 
- LOLA_VERB_SET_SRC
 
- LOLA_VERB_SET_STREAM_FORMAT
 
- LOLA_VERB_SET_UNSOLICITED_ENABLE
 
- LONG
 
- LONG0
 
- LONGBYTES
 
- LONGCHEER_VENDOR_ID
 
- LONGIFY
 
- LONGLOG
 
- LONGMASK
 
- LONGNAME
 
- LONGNBSEQ
 
- LONGPKT
 
- LONGS
 
- LONGSIZE
 
- LONGSWAP
 
- LONG_ADD
 
- LONG_ADDI
 
- LONG_ADDIU
 
- LONG_ADDU
 
- LONG_ADD_R
 
- LONG_ASM_CONST
 
- LONG_ATOM_BYTE
 
- LONG_ATOM_BYTESTRING
 
- LONG_ATOM_ID
 
- LONG_ATOM_SIGNED
 
- LONG_BRANCH_OPCODE
 
- LONG_BUSY_TIMEOUT
 
- LONG_CALL_OPCODE
 
- LONG_CMP
 
- LONG_CMP_R
 
- LONG_DELAY
 
- LONG_DOUBLE
 
- LONG_EVENT_SIZE
 
- LONG_GROUP
 
- LONG_L
 
- LONG_LA
 
- LONG_LT_R
 
- LONG_MAX
 
- LONG_MIN
 
- LONG_ONKEY_EN
 
- LONG_PACKET
 
- LONG_PACKET_WORD_COUNT_MASK
 
- LONG_PACKET_WORD_COUNT_SHIFT
 
- LONG_PER_U64
 
- LONG_PREAMBLE
 
- LONG_REF
 
- LONG_RETRY_DEF
 
- LONG_RETRY_LIMIT
 
- LONG_RETRY_LIM_I
 
- LONG_RETRY_MAX
 
- LONG_RETRY_MIN
 
- LONG_RUN_FAIL_MASK
 
- LONG_RUN_FAIL_MASK_SET
 
- LONG_RX_WHAT_BIT
 
- LONG_S
 
- LONG_SLL
 
- LONG_SLLV
 
- LONG_SLOT_VALUE
 
- LONG_SP
 
- LONG_SRA
 
- LONG_SRAV
 
- LONG_SRL
 
- LONG_SRLV
 
- LONG_SUB
 
- LONG_SUBU
 
- LONG_S_L
 
- LONG_S_R
 
- LONG_TX_WHAT_BIT
 
- LONG_WAIT
 
- LOOK
 
- LOOKBACK
 
- LOOKUP
 
- LOOKUP_AUTOMOUNT
 
- LOOKUP_BLOCK_ORDER
 
- LOOKUP_BLOCK_SIZE
 
- LOOKUP_CREATE
 
- LOOKUP_DIRECTORY
 
- LOOKUP_DOWN
 
- LOOKUP_EMPTY
 
- LOOKUP_EXCL
 
- LOOKUP_FOLLOW
 
- LOOKUP_JUMPED
 
- LOOKUP_NODE
 
- LOOKUP_NODE_RA
 
- LOOKUP_NO_REVAL
 
- LOOKUP_OPEN
 
- LOOKUP_PARENT
 
- LOOKUP_RCU
 
- LOOKUP_RENAME_TARGET
 
- LOOKUP_REVAL
 
- LOOKUP_ROOT
 
- LOOKUP_ROOT_GRABBED
 
- LOOKUP_START_IP
 
- LOOKUP_STOP_IP
 
- LOOKUP_USER_INDEX
 
- LOONGSON2_CPU_TYPE
 
- LOONGSON2_PERFCNT_IRQ
 
- LOONGSON2_PERFCNT_OVERFLOW
 
- LOONGSON2_PERFCTRL_ENABLE
 
- LOONGSON2_PERFCTRL_EVENT
 
- LOONGSON2_PERFCTRL_EXL
 
- LOONGSON2_PERFCTRL_KERNEL
 
- LOONGSON2_PERFCTRL_SUPERVISOR
 
- LOONGSON2_PERFCTRL_USER
 
- LOONGSON3_BOOT_MEM_MAP_MAX
 
- LOONGSON3_PERFCNT_OVERFLOW
 
- LOONGSON3_PERFCTRL_ENABLE
 
- LOONGSON3_PERFCTRL_EVENT
 
- LOONGSON3_PERFCTRL_EXL
 
- LOONGSON3_PERFCTRL_KERNEL
 
- LOONGSON3_PERFCTRL_M
 
- LOONGSON3_PERFCTRL_SUPERVISOR
 
- LOONGSON3_PERFCTRL_USER
 
- LOONGSON3_PERFCTRL_W
 
- LOONGSON3_REG32
 
- LOONGSON3_REG8
 
- LOONGSON3_REG_BASE
 
- LOONGSON3_REG_SIZE
 
- LOONGSON3_REG_TOP
 
- LOONGSON_ADDRWINCFG
 
- LOONGSON_ADDRWINCFG_BASE
 
- LOONGSON_ADDRWINCFG_SIZE
 
- LOONGSON_ADDRWIN_CFG
 
- LOONGSON_ADDRWIN_CPUTODDR
 
- LOONGSON_ADDRWIN_CPUTOPCI
 
- LOONGSON_ADDRWIN_PCITODDR
 
- LOONGSON_BOOT_BASE
 
- LOONGSON_BOOT_SIZE
 
- LOONGSON_BOOT_TOP
 
- LOONGSON_BRIDGE_IRQ
 
- LOONGSON_CFG_REG
 
- LOONGSON_CHIPCFG
 
- LOONGSON_CHIPTEMP
 
- LOONGSON_CPU_MEM_SRC
 
- LOONGSON_DIAG_DTLB
 
- LOONGSON_DIAG_FTLB
 
- LOONGSON_DIAG_ITLB
 
- LOONGSON_DIAG_VTLB
 
- LOONGSON_FLASH_BASE
 
- LOONGSON_FLASH_SIZE
 
- LOONGSON_FLASH_TOP
 
- LOONGSON_FREQCTRL
 
- LOONGSON_GENCFG
 
- LOONGSON_GENCFG_BUSERREN
 
- LOONGSON_GENCFG_BYTESWAP
 
- LOONGSON_GENCFG_CACHEALG
 
- LOONGSON_GENCFG_CACHEALG_SHIFT
 
- LOONGSON_GENCFG_CACHESTOP
 
- LOONGSON_GENCFG_CPUSELFRESET
 
- LOONGSON_GENCFG_DEBUGMODE
 
- LOONGSON_GENCFG_FORCE_IRQA
 
- LOONGSON_GENCFG_IRQA_FROM_INT1
 
- LOONGSON_GENCFG_IRQA_ISOUT
 
- LOONGSON_GENCFG_MSTRBYTESWAP
 
- LOONGSON_GENCFG_NORETRYTIMEOUT
 
- LOONGSON_GENCFG_OFFSET
 
- LOONGSON_GENCFG_PCIQUEUE
 
- LOONGSON_GENCFG_PREFETCHEN
 
- LOONGSON_GENCFG_SHORTCOPYTIMEOUT
 
- LOONGSON_GENCFG_SNOOPEN
 
- LOONGSON_GENCFG_UNCACHED
 
- LOONGSON_GENCFG_WBEHINDEN
 
- LOONGSON_GPIODATA
 
- LOONGSON_GPIOIE
 
- LOONGSON_GPIO_IN_OFFSET
 
- LOONGSON_HIGHMEM_START
 
- LOONGSON_HT1_CFG_BASE
 
- LOONGSON_HT1_INTN_EN
 
- LOONGSON_HT1_INT_EN_BASE
 
- LOONGSON_HT1_INT_VECTOR
 
- LOONGSON_HT1_INT_VECTOR_BASE
 
- LOONGSON_ICU_COPYEMPTY
 
- LOONGSON_ICU_COPYERR
 
- LOONGSON_ICU_COPYRDY
 
- LOONGSON_ICU_DMAEMPTY
 
- LOONGSON_ICU_DMARDY
 
- LOONGSON_ICU_DRAMPERR
 
- LOONGSON_ICU_GPIN
 
- LOONGSON_ICU_GPINS
 
- LOONGSON_ICU_GPINS_SHIFT
 
- LOONGSON_ICU_GPIO
 
- LOONGSON_ICU_GPIOS
 
- LOONGSON_ICU_GPIOS_SHIFT
 
- LOONGSON_ICU_MASTERERR
 
- LOONGSON_ICU_MBOX
 
- LOONGSON_ICU_MBOXES
 
- LOONGSON_ICU_MBOXES_SHIFT
 
- LOONGSON_ICU_PCIIRQ
 
- LOONGSON_ICU_RETRYERR
 
- LOONGSON_ICU_SYSTEMERR
 
- LOONGSON_INTEDGE
 
- LOONGSON_INTEN
 
- LOONGSON_INTENCLR
 
- LOONGSON_INTENSET
 
- LOONGSON_INTISR
 
- LOONGSON_INTPOL
 
- LOONGSON_INTSTEER
 
- LOONGSON_INT_BIT_INT0
 
- LOONGSON_INT_BIT_INT1
 
- LOONGSON_INT_COREx_INTy
 
- LOONGSON_INT_ROUTER_ENTRY
 
- LOONGSON_INT_ROUTER_HT1
 
- LOONGSON_INT_ROUTER_INTEN
 
- LOONGSON_INT_ROUTER_INTENCLR
 
- LOONGSON_INT_ROUTER_INTENSET
 
- LOONGSON_INT_ROUTER_LPC
 
- LOONGSON_INT_ROUTER_OFFSET
 
- LOONGSON_IRQ_BASE
 
- LOONGSON_LIO0_BASE
 
- LOONGSON_LIO0_SIZE
 
- LOONGSON_LIO0_TOP
 
- LOONGSON_LIO1_BASE
 
- LOONGSON_LIO1_SIZE
 
- LOONGSON_LIO1_TOP
 
- LOONGSON_MACHTYPE
 
- LOONGSON_MEM_WIN_BASE_H
 
- LOONGSON_MEM_WIN_BASE_L
 
- LOONGSON_MEM_WIN_MASK_H
 
- LOONGSON_MEM_WIN_MASK_L
 
- LOONGSON_MMIO_MEM_END
 
- LOONGSON_MMIO_MEM_START
 
- LOONGSON_NORTH_BRIDGE_IRQ
 
- LOONGSON_N_GPIO
 
- LOONGSON_PCIBASE0
 
- LOONGSON_PCIBASE1
 
- LOONGSON_PCIBASE2
 
- LOONGSON_PCIBASE3
 
- LOONGSON_PCIBASE4
 
- LOONGSON_PCICFG_BASE
 
- LOONGSON_PCICFG_SIZE
 
- LOONGSON_PCICFG_TOP
 
- LOONGSON_PCICLASS
 
- LOONGSON_PCICMD
 
- LOONGSON_PCICMD_ASTEPEN
 
- LOONGSON_PCICMD_MABORT_CLR
 
- LOONGSON_PCICMD_MPERR_CLR
 
- LOONGSON_PCICMD_MTABORT_CLR
 
- LOONGSON_PCICMD_PERRRESPEN
 
- LOONGSON_PCICMD_PERR_CLR
 
- LOONGSON_PCICMD_SERREN
 
- LOONGSON_PCICMD_SERR_CLR
 
- LOONGSON_PCICMD_TABORT_CLR
 
- LOONGSON_PCICONFIGBASE
 
- LOONGSON_PCIDID
 
- LOONGSON_PCIEXPRBASE
 
- LOONGSON_PCIINT
 
- LOONGSON_PCIIO_BASE
 
- LOONGSON_PCIIO_SIZE
 
- LOONGSON_PCIIO_TOP
 
- LOONGSON_PCILO0_BASE
 
- LOONGSON_PCILO1_BASE
 
- LOONGSON_PCILO2_BASE
 
- LOONGSON_PCILO_BASE
 
- LOONGSON_PCILO_SIZE
 
- LOONGSON_PCILO_TOP
 
- LOONGSON_PCILTIMER
 
- LOONGSON_PCILTIMER_BUSLATENCY
 
- LOONGSON_PCILTIMER_BUSLATENCY_SHIFT
 
- LOONGSON_PCIMAP
 
- LOONGSON_PCIMAP_CFG
 
- LOONGSON_PCIMAP_PCIMAP_2
 
- LOONGSON_PCIMAP_PCIMAP_LO0
 
- LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT
 
- LOONGSON_PCIMAP_PCIMAP_LO1
 
- LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT
 
- LOONGSON_PCIMAP_PCIMAP_LO2
 
- LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT
 
- LOONGSON_PCIMAP_WIN
 
- LOONGSON_PCIMEMBASECFG
 
- LOONGSON_PCI_HIT0_SEL_H
 
- LOONGSON_PCI_HIT0_SEL_L
 
- LOONGSON_PCI_HIT1_SEL_H
 
- LOONGSON_PCI_HIT1_SEL_L
 
- LOONGSON_PCI_HIT2_SEL_H
 
- LOONGSON_PCI_HIT2_SEL_L
 
- LOONGSON_PCI_IO_START
 
- LOONGSON_PCI_ISR4C
 
- LOONGSON_PCI_MEM_DST
 
- LOONGSON_PCI_MEM_END
 
- LOONGSON_PCI_MEM_START
 
- LOONGSON_PCI_REG
 
- LOONGSON_PXARB_CFG
 
- LOONGSON_PXARB_STATUS
 
- LOONGSON_REG
 
- LOONGSON_REGBASE
 
- LOONGSON_REG_BASE
 
- LOONGSON_REG_SIZE
 
- LOONGSON_REG_TOP
 
- LOONGSON_SOUTH_BRIDGE_IRQ
 
- LOONGSON_TIMER_IRQ
 
- LOONGSON_UART_IRQ
 
- LOOP
 
- LOOPBACK
 
- LOOPBACK4_IPV6
 
- LOOPBACKS_EXTERNAL
 
- LOOPBACKS_INTERNAL
 
- LOOPBACKS_WS
 
- LOOPBACK_BMAC
 
- LOOPBACK_CABLE
 
- LOOPBACK_CHANGED
 
- LOOPBACK_DATA
 
- LOOPBACK_DISABLED
 
- LOOPBACK_DMA
 
- LOOPBACK_EMAC
 
- LOOPBACK_EN
 
- LOOPBACK_ENABLE
 
- LOOPBACK_ENABLED
 
- LOOPBACK_EXT
 
- LOOPBACK_EXTERNAL
 
- LOOPBACK_EXT_PHY
 
- LOOPBACK_GMAC
 
- LOOPBACK_GMII
 
- LOOPBACK_GMII_FAR
 
- LOOPBACK_GMII_WS
 
- LOOPBACK_GPHY
 
- LOOPBACK_IFINDEX
 
- LOOPBACK_IMMEDIATELY
 
- LOOPBACK_INTERNAL
 
- LOOPBACK_INTR
 
- LOOPBACK_LCB
 
- LOOPBACK_MAC
 
- LOOPBACK_MAC_DELAY
 
- LOOPBACK_MASK
 
- LOOPBACK_MAX
 
- LOOPBACK_MODE
 
- LOOPBACK_MSK
 
- LOOPBACK_NEAR_LBN
 
- LOOPBACK_NEAR_WIDTH
 
- LOOPBACK_NONE
 
- LOOPBACK_NORMAL
 
- LOOPBACK_OUT_OF
 
- LOOPBACK_PCS
 
- LOOPBACK_PHY
 
- LOOPBACK_PHYXS
 
- LOOPBACK_PHYXS_WS
 
- LOOPBACK_PMAPMD
 
- LOOPBACK_PM_OPS
 
- LOOPBACK_SERDES
 
- LOOPBACK_SERDES_CONFIG_BIT_MASK_SHIFT
 
- LOOPBACK_SGMII
 
- LOOPBACK_SGMII_FAR
 
- LOOPBACK_TEST_MAX
 
- LOOPBACK_TIMEOUT_MS
 
- LOOPBACK_TIMING_MARKER
 
- LOOPBACK_UMAC
 
- LOOPBACK_XAUI
 
- LOOPBACK_XAUI_FAR
 
- LOOPBACK_XAUI_WS
 
- LOOPBACK_XAUI_WS_FAR
 
- LOOPBACK_XAUI_WS_NEAR
 
- LOOPBACK_XFI
 
- LOOPBACK_XFI_FAR
 
- LOOPBACK_XFI_WS
 
- LOOPBACK_XFI_WS_FAR
 
- LOOPBACK_XGBR
 
- LOOPBACK_XGMII
 
- LOOPBACK_XGMII_WS
 
- LOOPBACK_XGXS
 
- LOOPBACK_XMAC
 
- LOOPBACK_XPORT
 
- LOOPBAK
 
- LOOPBK
 
- LOOPCNT_MAX
 
- LOOPCNT_WARN
 
- LOOPID_MAP_SIZE
 
- LOOPMODE
 
- LOOPMODE_BITS
 
- LOOPMODE_DIAG
 
- LOOPMODE_LINE
 
- LOOPMODE_NORMAL
 
- LOOPMODE_TIME
 
- LOOPS
 
- LOOPSEND
 
- LOOPS_DEFAULT
 
- LOOPS_USEC
 
- LOOPS_USEC_SHIFT
 
- LOOP_ALLOC_CHUNK
 
- LOOP_ATTEMPTS
 
- LOOP_ATTR_RO
 
- LOOP_BACK
 
- LOOP_BK_EN
 
- LOOP_BLANK_SIZE
 
- LOOP_CACHING_NOWAIT
 
- LOOP_CACHING_WAIT
 
- LOOP_CHANGE_FD
 
- LOOP_CHUNK1
 
- LOOP_CHUNK2
 
- LOOP_CHUNK3
 
- LOOP_CLR_FD
 
- LOOP_COUNT_MAX
 
- LOOP_CTL_ADD
 
- LOOP_CTL_GET_FREE
 
- LOOP_CTL_REMOVE
 
- LOOP_CTRL_MINOR
 
- LOOP_CTRL__clk_nctl_sel_MASK
 
- LOOP_CTRL__clk_nctl_sel__SHIFT
 
- LOOP_CTRL__clk_tdc_sel_MASK
 
- LOOP_CTRL__clk_tdc_sel__SHIFT
 
- LOOP_CTRL__fb_slip_dis_MASK
 
- LOOP_CTRL__fb_slip_dis__SHIFT
 
- LOOP_CTRL__fbclk_track_refclk_MASK
 
- LOOP_CTRL__fbclk_track_refclk__SHIFT
 
- LOOP_CTRL__fbdiv_mask_en_MASK
 
- LOOP_CTRL__fbdiv_mask_en__SHIFT
 
- LOOP_CTRL__nctl_sig_del_dis_MASK
 
- LOOP_CTRL__nctl_sig_del_dis__SHIFT
 
- LOOP_CTRL__phase_offset_MASK
 
- LOOP_CTRL__phase_offset__SHIFT
 
- LOOP_CTRL__prbs_en_MASK
 
- LOOP_CTRL__prbs_en__SHIFT
 
- LOOP_CTRL__sig_del_patt_sel_MASK
 
- LOOP_CTRL__sig_del_patt_sel__SHIFT
 
- LOOP_CTRL__tdc_clk_gate_en_MASK
 
- LOOP_CTRL__tdc_clk_gate_en__SHIFT
 
- LOOP_CYCLES_68020
 
- LOOP_CYCLES_68030
 
- LOOP_CYCLES_68040
 
- LOOP_CYCLES_68060
 
- LOOP_CYCLES_COLDFIRE
 
- LOOP_DIV_HIGH_SEL
 
- LOOP_DIV_LOW_SEL
 
- LOOP_DOWN_RESET
 
- LOOP_DOWN_TIME
 
- LOOP_DOWN_TIMEOUT
 
- LOOP_EN
 
- LOOP_END
 
- LOOP_EXT
 
- LOOP_GET_STATUS
 
- LOOP_GET_STATUS64
 
- LOOP_GPU
 
- LOOP_HD
 
- LOOP_INT
 
- LOOP_IV_SECTOR_BITS
 
- LOOP_IV_SECTOR_SIZE
 
- LOOP_KODIAK
 
- LOOP_LIMIT
 
- LOOP_LOCAL
 
- LOOP_MAJOR
 
- LOOP_MENDEC
 
- LOOP_NONE
 
- LOOP_NO_EMPTY_SIZE
 
- LOOP_OD
 
- LOOP_P2P
 
- LOOP_PAYLOAD_EXC_TS0
 
- LOOP_PAYLOAD_INC_TS0
 
- LOOP_REMOTE
 
- LOOP_RETRY_LIMIT
 
- LOOP_SET_BLOCK_SIZE
 
- LOOP_SET_CAPACITY
 
- LOOP_SET_DIRECT_IO
 
- LOOP_SET_FD
 
- LOOP_SET_STATUS
 
- LOOP_SET_STATUS64
 
- LOOP_SIZE
 
- LOOP_STATUS_IN_CURRENT_LIMIT
 
- LOOP_STATUS_IN_DPM
 
- LOOP_STATUS_NONE
 
- LOOP_STATUS_THERMAL
 
- LOOP_TIMEOUT
 
- LOOP_TIMEOUT_MAX
 
- LOOP_TIMES
 
- LOOP_TRANSITION
 
- LOOP_TUNE_1
 
- LOOP_TUNE_2
 
- LOOP_WRITE
 
- LOOP_WRITE_TO_READ
 
- LOOSELY18_EN
 
- LOOSELY_PS_18BIT_RGB666
 
- LOPART
 
- LOPS
 
- LOPT
 
- LOSD_MASK
 
- LOSD_SHIFT
 
- LOSLEVEL_OVRD_IN_EN
 
- LOSLEVEL_OVRD_IN_LOS_BIAS_5420
 
- LOSLEVEL_OVRD_IN_LOS_BIAS_DEFAULT
 
- LOSLEVEL_OVRD_IN_LOS_LEVEL_DEFAULT
 
- LOSSLOCK_TH
 
- LOSSLOCK_TM
 
- LOSS_CARRIER
 
- LOSS_OF_SIGNAL
 
- LOSS_OF_SIGNAL_CLR
 
- LOSS_OF_SIGNAL_EN
 
- LOSTFRAMING
 
- LOST_CLOCK
 
- LOST_DOWN
 
- LOST_IN_BURST_PERIOD
 
- LOST_IN_GAP_PERIOD
 
- LOST_LINK
 
- LOST_MEDIA_THRESHOLD
 
- LOST_UP
 
- LOST_WR_DATE
 
- LOST_WR_TIME
 
- LOTCR
 
- LOTCR_ADDR
 
- LOTSA_DEBUG
 
- LOUD_CATEGORY_ID
 
- LOUT1
 
- LOUT1V_ENABLE_LZC
 
- LOUT1V_LHP_VOL
 
- LOUT1V_LRHP_BOTH
 
- LOUT2
 
- LOUT3
 
- LOUT4
 
- LOUT5
 
- LOUT6
 
- LOW
 
- LOW8
 
- LOW8TERM
 
- LOWER
 
- LOWERCASE
 
- LOWER_20_ENABLE
 
- LOWER_8_BITS
 
- LOWER_BITS_RUBIN
 
- LOWER_DATA
 
- LOWER_EL_AArch32_VECTOR
 
- LOWER_EL_AArch64_VECTOR
 
- LOWER_GPIO_ENABLE
 
- LOWER_GROUP
 
- LOWER_HEAD
 
- LOWER_LIMIT_TH
 
- LOWER_NIBBLE
 
- LOWER_PWR
 
- LOWER_SLICE_DISABLED
 
- LOWER_SLICE_ENABLED
 
- LOWER_STATUS_0
 
- LOWER_STATUS_1
 
- LOWER_STATUS_10
 
- LOWER_STATUS_11
 
- LOWER_STATUS_12
 
- LOWER_STATUS_13
 
- LOWER_STATUS_14
 
- LOWER_STATUS_15
 
- LOWER_STATUS_2
 
- LOWER_STATUS_3
 
- LOWER_STATUS_4
 
- LOWER_STATUS_5
 
- LOWER_STATUS_6
 
- LOWER_STATUS_7
 
- LOWER_STATUS_8
 
- LOWER_STATUS_9
 
- LOWER_STATUS_CLR
 
- LOWER_XFER_REG
 
- LOWEST_FREQ
 
- LOWEST_PERF
 
- LOWEST_PRIORITY
 
- LOWLIGHT
 
- LOWMEMSIZE
 
- LOWMEM_LIMIT
 
- LOWMEM_PAGES
 
- LOWORD
 
- LOWORD_OPX_MASK
 
- LOWORD_OPY_MASK
 
- LOWPAN_DEBUGFS_CTX_PFX_NUM_ARGS
 
- LOWPAN_DISPATCH_BC0
 
- LOWPAN_DISPATCH_DFF
 
- LOWPAN_DISPATCH_ESC
 
- LOWPAN_DISPATCH_FIRST
 
- LOWPAN_DISPATCH_FRAG1
 
- LOWPAN_DISPATCH_FRAGN
 
- LOWPAN_DISPATCH_FRAG_MASK
 
- LOWPAN_DISPATCH_HC1
 
- LOWPAN_DISPATCH_IPHC
 
- LOWPAN_DISPATCH_IPHC_MASK
 
- LOWPAN_DISPATCH_IPV6
 
- LOWPAN_DISPATCH_MESH
 
- LOWPAN_DISPATCH_NALP
 
- LOWPAN_FRAG1_HEAD_SIZE
 
- LOWPAN_FRAGN_HEAD_SIZE
 
- LOWPAN_FRAG_DGRAM_SIZE_HIGH_MASK
 
- LOWPAN_FRAG_DGRAM_SIZE_HIGH_SHIFT
 
- LOWPAN_GHC_EXT_DEST_IDLEN
 
- LOWPAN_GHC_EXT_DEST_ID_0
 
- LOWPAN_GHC_EXT_DEST_MASK_0
 
- LOWPAN_GHC_EXT_FRAG_IDLEN
 
- LOWPAN_GHC_EXT_FRAG_ID_0
 
- LOWPAN_GHC_EXT_FRAG_MASK_0
 
- LOWPAN_GHC_EXT_HOP_IDLEN
 
- LOWPAN_GHC_EXT_HOP_ID_0
 
- LOWPAN_GHC_EXT_HOP_MASK_0
 
- LOWPAN_GHC_EXT_ROUTE_IDLEN
 
- LOWPAN_GHC_EXT_ROUTE_ID_0
 
- LOWPAN_GHC_EXT_ROUTE_MASK_0
 
- LOWPAN_GHC_ICMPV6_IDLEN
 
- LOWPAN_GHC_ICMPV6_ID_0
 
- LOWPAN_GHC_ICMPV6_MASK_0
 
- LOWPAN_GHC_UDP_IDLEN
 
- LOWPAN_GHC_UDP_ID_0
 
- LOWPAN_GHC_UDP_MASK_0
 
- LOWPAN_IPHC_CID
 
- LOWPAN_IPHC_CID_DCI
 
- LOWPAN_IPHC_CID_SCI
 
- LOWPAN_IPHC_CTX_FLAG_ACTIVE
 
- LOWPAN_IPHC_CTX_FLAG_COMPRESSION
 
- LOWPAN_IPHC_CTX_TABLE_SIZE
 
- LOWPAN_IPHC_DAC
 
- LOWPAN_IPHC_DAM_00
 
- LOWPAN_IPHC_DAM_01
 
- LOWPAN_IPHC_DAM_10
 
- LOWPAN_IPHC_DAM_11
 
- LOWPAN_IPHC_DAM_MASK
 
- LOWPAN_IPHC_HLIM_00
 
- LOWPAN_IPHC_HLIM_01
 
- LOWPAN_IPHC_HLIM_10
 
- LOWPAN_IPHC_HLIM_11
 
- LOWPAN_IPHC_HLIM_MASK
 
- LOWPAN_IPHC_M
 
- LOWPAN_IPHC_MAX_HC_BUF_LEN
 
- LOWPAN_IPHC_MAX_HEADER_LEN
 
- LOWPAN_IPHC_NH
 
- LOWPAN_IPHC_SAC
 
- LOWPAN_IPHC_SAM_00
 
- LOWPAN_IPHC_SAM_01
 
- LOWPAN_IPHC_SAM_10
 
- LOWPAN_IPHC_SAM_11
 
- LOWPAN_IPHC_SAM_MASK
 
- LOWPAN_IPHC_TF_00
 
- LOWPAN_IPHC_TF_01
 
- LOWPAN_IPHC_TF_10
 
- LOWPAN_IPHC_TF_11
 
- LOWPAN_IPHC_TF_MASK
 
- LOWPAN_LLTYPE_BTLE
 
- LOWPAN_LLTYPE_IEEE802154
 
- LOWPAN_NHC
 
- LOWPAN_NHC_DEST_IDLEN
 
- LOWPAN_NHC_DEST_ID_0
 
- LOWPAN_NHC_DEST_MASK_0
 
- LOWPAN_NHC_FRAGMENT_IDLEN
 
- LOWPAN_NHC_FRAGMENT_ID_0
 
- LOWPAN_NHC_FRAGMENT_MASK_0
 
- LOWPAN_NHC_HOP_IDLEN
 
- LOWPAN_NHC_HOP_ID_0
 
- LOWPAN_NHC_HOP_MASK_0
 
- LOWPAN_NHC_IPV6_IDLEN
 
- LOWPAN_NHC_IPV6_ID_0
 
- LOWPAN_NHC_IPV6_MASK_0
 
- LOWPAN_NHC_MAX_HDR_LEN
 
- LOWPAN_NHC_MAX_ID_LEN
 
- LOWPAN_NHC_MOBILITY_IDLEN
 
- LOWPAN_NHC_MOBILITY_ID_0
 
- LOWPAN_NHC_MOBILITY_MASK_0
 
- LOWPAN_NHC_ROUTING_IDLEN
 
- LOWPAN_NHC_ROUTING_ID_0
 
- LOWPAN_NHC_ROUTING_MASK_0
 
- LOWPAN_NHC_UDP_4BIT_MASK
 
- LOWPAN_NHC_UDP_4BIT_PORT
 
- LOWPAN_NHC_UDP_8BIT_MASK
 
- LOWPAN_NHC_UDP_8BIT_PORT
 
- LOWPAN_NHC_UDP_CS_C
 
- LOWPAN_NHC_UDP_CS_P_00
 
- LOWPAN_NHC_UDP_CS_P_01
 
- LOWPAN_NHC_UDP_CS_P_10
 
- LOWPAN_NHC_UDP_CS_P_11
 
- LOWPAN_NHC_UDP_ID
 
- LOWPAN_NHC_UDP_IDLEN
 
- LOWPAN_NHC_UDP_MASK
 
- LOWPAN_PRIV_SIZE
 
- LOWPOWER
 
- LOWPOWERSTATE_SWITCH
 
- LOWPWR_MARK
 
- LOWWAIT
 
- LOW_2_WORDS
 
- LOW_ADDR
 
- LOW_BACKBIAS_VALUE
 
- LOW_BAT_2P3V
 
- LOW_BAT_3P1V
 
- LOW_BAT_CHECK_INTERVAL
 
- LOW_BAT_ENABLE
 
- LOW_BAT_RESET
 
- LOW_BAT_THRESHOLD
 
- LOW_BYTE_TERM
 
- LOW_COALESCE
 
- LOW_CONTENTION
 
- LOW_CONTENTION_RECOVERY_DISABLE
 
- LOW_COUNTER_MSK
 
- LOW_COUNTER_SHFT
 
- LOW_EXP
 
- LOW_FRAG_GC_THRESHOLD
 
- LOW_IF
 
- LOW_IF_4MHZ
 
- LOW_INDEX_BIT
 
- LOW_INT
 
- LOW_INT_EN
 
- LOW_KERNEL_NR
 
- LOW_LATENCY_CMD
 
- LOW_LATENCY_DEBUGFS
 
- LOW_LATENCY_DEBUGFS_FORCE
 
- LOW_LATENCY_DEBUGFS_FORCE_ENABLE
 
- LOW_LATENCY_FORCE_OFF
 
- LOW_LATENCY_FORCE_ON
 
- LOW_LATENCY_FORCE_UNSET
 
- LOW_LATENCY_PCM_MODE
 
- LOW_LATENCY_TRAFFIC
 
- LOW_LATENCY_VCMD
 
- LOW_LATENCY_VIF_TYPE
 
- LOW_LEVEL_STAT_ALLOC
 
- LOW_MARK
 
- LOW_MEMORY
 
- LOW_MOTION
 
- LOW_NIBBLE_MASK
 
- LOW_NON_LINEAR_PERF
 
- LOW_OBP_ADDRESS
 
- LOW_OFFSET
 
- LOW_OVER_AVERAGE
 
- LOW_OVER_CLEAR
 
- LOW_OVER_IMMEDIATE
 
- LOW_PEAK
 
- LOW_POWER
 
- LOW_POWER_COND_ON
 
- LOW_POWER_PRESET
 
- LOW_POWER_RX_TIMEOUT_COUNTER_MASK
 
- LOW_POWER_SWING_EN
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_ENABLE_MASK
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_ENABLE__SHIFT
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_MODE_MASK
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_MODE__SHIFT
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_NUM_BANKS_MASK
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_NUM_BANKS__SHIFT
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_NUM_PIPES_MASK
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_NUM_PIPES__SHIFT
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_PIPE_INTERLEAVE_SIZE_MASK
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_PIPE_INTERLEAVE_SIZE__SHIFT
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_ROWS_PER_CHAN_MASK
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_ROWS_PER_CHAN__SHIFT
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_ROW_SIZE_MASK
 
- LOW_POWER_TILING_CONTROL__LOW_POWER_TILING_ROW_SIZE__SHIFT
 
- LOW_PRIO
 
- LOW_PRIORITY
 
- LOW_PRIO_TID
 
- LOW_PROGRAM_EN
 
- LOW_PWR_OP
 
- LOW_QUEUE
 
- LOW_QUEUE_IDX
 
- LOW_RES_NSEC
 
- LOW_RXCOL_TICKS
 
- LOW_RXCOL_TICKS_CLRTCKS
 
- LOW_RXMAX_FRAMES
 
- LOW_RX_PENDING
 
- LOW_RX_SQUELCH
 
- LOW_SLICE_ARRAY_SZ
 
- LOW_SPEED_PORT
 
- LOW_SYNDROME
 
- LOW_THRESHOLD
 
- LOW_TXCOL_TICKS
 
- LOW_TXCOL_TICKS_CLRTCKS
 
- LOW_TXMAX_FRAMES
 
- LOW_TX_PENDING
 
- LOW_UPPER_GPIO_VALUES
 
- LOW_UPPER_GPIO_VALUES_MASK
 
- LOW_VDD_EN
 
- LOW_VOLT_D2_ACPI
 
- LOW_VOLT_D3_ACPI
 
- LOW_VOLT_REG
 
- LOW_WATERMARK
 
- LOW_WATER_MARK
 
- LO_ALE
 
- LO_ARG
 
- LO_BYTE
 
- LO_CEX
 
- LO_CLE
 
- LO_CRYPT_BLOW
 
- LO_CRYPT_CAST128
 
- LO_CRYPT_CRYPTOAPI
 
- LO_CRYPT_DES
 
- LO_CRYPT_DUMMY
 
- LO_CRYPT_FISH2
 
- LO_CRYPT_IDEA
 
- LO_CRYPT_NONE
 
- LO_CRYPT_SKIPJACK
 
- LO_CRYPT_XOR
 
- LO_FID_TABLE_TOP
 
- LO_FLAGS_AUTOCLEAR
 
- LO_FLAGS_DIRECT_IO
 
- LO_FLAGS_PARTSCAN
 
- LO_FLAGS_READ_ONLY
 
- LO_FOFF
 
- LO_KEY_SIZE
 
- LO_MAGIC
 
- LO_MARK_PERCENT_FOR_PSR
 
- LO_MARK_PERCENT_FOR_RX
 
- LO_MS
 
- LO_NAME_SIZE
 
- LO_POWER_MODE
 
- LO_POWER_STATE
 
- LO_PRIO_TABLE
 
- LO_SPICS
 
- LO_ULED
 
- LO_VCOFREQ_TABLE_TOP
 
- LO_WPX
 
- LO_eckd_data
 
- LO_fba_data
 
- LP3943_DIM_PWM0
 
- LP3943_DIM_PWM1
 
- LP3943_GPIO1
 
- LP3943_GPIO10
 
- LP3943_GPIO11
 
- LP3943_GPIO12
 
- LP3943_GPIO13
 
- LP3943_GPIO14
 
- LP3943_GPIO15
 
- LP3943_GPIO16
 
- LP3943_GPIO2
 
- LP3943_GPIO3
 
- LP3943_GPIO4
 
- LP3943_GPIO5
 
- LP3943_GPIO6
 
- LP3943_GPIO7
 
- LP3943_GPIO8
 
- LP3943_GPIO9
 
- LP3943_GPIO_IN
 
- LP3943_GPIO_OUT_HIGH
 
- LP3943_GPIO_OUT_LOW
 
- LP3943_MAX_DUTY
 
- LP3943_MAX_GPIO
 
- LP3943_MAX_PERIOD
 
- LP3943_MAX_REGISTERS
 
- LP3943_MIN_PERIOD
 
- LP3943_NUM_PWMS
 
- LP3943_PWM_OUT0
 
- LP3943_PWM_OUT1
 
- LP3943_PWM_OUT10
 
- LP3943_PWM_OUT11
 
- LP3943_PWM_OUT12
 
- LP3943_PWM_OUT13
 
- LP3943_PWM_OUT14
 
- LP3943_PWM_OUT15
 
- LP3943_PWM_OUT2
 
- LP3943_PWM_OUT3
 
- LP3943_PWM_OUT4
 
- LP3943_PWM_OUT5
 
- LP3943_PWM_OUT6
 
- LP3943_PWM_OUT7
 
- LP3943_PWM_OUT8
 
- LP3943_PWM_OUT9
 
- LP3943_REG_GPIO_A
 
- LP3943_REG_GPIO_B
 
- LP3943_REG_MUX0
 
- LP3943_REG_MUX1
 
- LP3943_REG_MUX2
 
- LP3943_REG_MUX3
 
- LP3943_REG_PRESCALE0
 
- LP3943_REG_PRESCALE1
 
- LP3943_REG_PWM0
 
- LP3943_REG_PWM1
 
- LP3944_DIM0
 
- LP3944_DIM1
 
- LP3944_DUTY_CYCLE_MAX
 
- LP3944_DUTY_CYCLE_MIN
 
- LP3944_LED0
 
- LP3944_LED1
 
- LP3944_LED2
 
- LP3944_LED3
 
- LP3944_LED4
 
- LP3944_LED5
 
- LP3944_LED6
 
- LP3944_LED7
 
- LP3944_LEDS_MAX
 
- LP3944_LED_STATUS_DIM0
 
- LP3944_LED_STATUS_DIM1
 
- LP3944_LED_STATUS_MASK
 
- LP3944_LED_STATUS_OFF
 
- LP3944_LED_STATUS_ON
 
- LP3944_LED_TYPE_LED
 
- LP3944_LED_TYPE_LED_INVERTED
 
- LP3944_LED_TYPE_NONE
 
- LP3944_PERIOD_MAX
 
- LP3944_PERIOD_MIN
 
- LP3944_REG_INPUT1
 
- LP3944_REG_LS0
 
- LP3944_REG_LS1
 
- LP3944_REG_PSC0
 
- LP3944_REG_PSC1
 
- LP3944_REG_PWM0
 
- LP3944_REG_PWM1
 
- LP3944_REG_REGISTER1
 
- LP3944_REG_REGISTER8
 
- LP3944_REG_REGISTER9
 
- LP3952_ACTIVE_MODE
 
- LP3952_BLUE_1
 
- LP3952_BLUE_2
 
- LP3952_BRIGHT_MAX
 
- LP3952_CMD_REG_COUNT
 
- LP3952_GREEN_1
 
- LP3952_GREEN_2
 
- LP3952_INT_B00ST_LDR
 
- LP3952_LABEL_MAX_LEN
 
- LP3952_LED_ALL
 
- LP3952_LED_MASK_ALL
 
- LP3952_NAME
 
- LP3952_PATRN_GEN_EN
 
- LP3952_PATRN_LOOP
 
- LP3952_RED_1
 
- LP3952_RED_2
 
- LP3952_REG_B1_BLNK_CYCLE_CTRL
 
- LP3952_REG_B1_BLNK_TIME_CTRL
 
- LP3952_REG_CMD_0
 
- LP3952_REG_ENABLES
 
- LP3952_REG_G1_BLNK_CYCLE_CTRL
 
- LP3952_REG_G1_BLNK_TIME_CTRL
 
- LP3952_REG_LED_CTRL
 
- LP3952_REG_PAT_GEN_CTRL
 
- LP3952_REG_R1_BLNK_CYCLE_CTRL
 
- LP3952_REG_R1_BLNK_TIME_CTRL
 
- LP3952_REG_RESET
 
- LP3952_REG_RGB1_MAX_I_CTRL
 
- LP3952_REG_RGB2_MAX_I_CTRL
 
- LP3971_BUCK1_BASE
 
- LP3971_BUCK2_BASE
 
- LP3971_BUCK3_BASE
 
- LP3971_BUCK_RAMP_REG
 
- LP3971_BUCK_TARGET_VOL1_REG
 
- LP3971_BUCK_TARGET_VOL2_REG
 
- LP3971_BUCK_VOL_CHANGE_REG
 
- LP3971_BUCK_VOL_ENABLE_REG
 
- LP3971_DCDC1
 
- LP3971_DCDC2
 
- LP3971_DCDC3
 
- LP3971_LDO1
 
- LP3971_LDO2
 
- LP3971_LDO3
 
- LP3971_LDO4
 
- LP3971_LDO5
 
- LP3971_LDO_ENABLE_REG
 
- LP3971_LDO_VOL_CONTR_BASE
 
- LP3971_LDO_VOL_CONTR_REG
 
- LP3971_NUM_REGULATORS
 
- LP3971_SYS_CONTROL1_REG
 
- LP3972_ADTV1_REG
 
- LP3972_ADTV2_REG
 
- LP3972_AVRC_REG
 
- LP3972_B2TV_REG
 
- LP3972_B32RC_REG
 
- LP3972_B3TV_REG
 
- LP3972_BCCR_REG
 
- LP3972_BUCK_VOL1_REG
 
- LP3972_BUCK_VOL_ENABLE_REG
 
- LP3972_BUCK_VOL_MASK
 
- LP3972_CDTC1_REG
 
- LP3972_CDTC2_REG
 
- LP3972_DCDC1
 
- LP3972_DCDC2
 
- LP3972_DCDC3
 
- LP3972_II1RR_REG
 
- LP3972_II2RR_REG
 
- LP3972_ISRA_REG
 
- LP3972_L2VCR_REG
 
- LP3972_L34VCR_REG
 
- LP3972_LDO1
 
- LP3972_LDO2
 
- LP3972_LDO3
 
- LP3972_LDO4
 
- LP3972_LDO5
 
- LP3972_LDO_OUTPUT_ENABLE_MASK
 
- LP3972_LDO_OUTPUT_ENABLE_REG
 
- LP3972_LDO_VOL_CHANGE_SHIFT
 
- LP3972_LDO_VOL_CONTR_REG
 
- LP3972_LDO_VOL_CONTR_SHIFT
 
- LP3972_LDO_VOL_MASK
 
- LP3972_LDO_VOL_MAX_IDX
 
- LP3972_LDO_VOL_MIN_IDX
 
- LP3972_LOER4_REG
 
- LP3972_MDTV1_REG
 
- LP3972_MDTV2_REG
 
- LP3972_NUM_REGULATORS
 
- LP3972_OEN3_L1EN
 
- LP3972_OEN3_REG
 
- LP3972_OSR3_REG
 
- LP3972_OVER1_REG
 
- LP3972_OVER1_S_EN
 
- LP3972_OVER2_LDO2_EN
 
- LP3972_OVER2_LDO3_EN
 
- LP3972_OVER2_LDO4_EN
 
- LP3972_OVER2_REG
 
- LP3972_OVSR1_REG
 
- LP3972_OVSR2_REG
 
- LP3972_SCR1_REG
 
- LP3972_SCR2_REG
 
- LP3972_SCR_REG
 
- LP3972_SDTV1_REG
 
- LP3972_SDTV2_REG
 
- LP3972_SYS_CONTROL1_REG
 
- LP3972_VCC1_REG
 
- LP3972_VOL_CHANGE_FLAG_GO
 
- LP3972_VOL_CHANGE_FLAG_MASK
 
- LP3972_VOL_CHANGE_REG
 
- LP5521_B_IS_LOADING
 
- LP5521_CLK_INT
 
- LP5521_CMD_DIRECT
 
- LP5521_CP_MODE_1X5
 
- LP5521_CP_MODE_AUTO
 
- LP5521_CP_MODE_BYPASS
 
- LP5521_CP_MODE_OFF
 
- LP5521_DEFAULT_CFG
 
- LP5521_ENABLE_DEFAULT
 
- LP5521_ENABLE_RUN_PROGRAM
 
- LP5521_EXEC_B_M
 
- LP5521_EXEC_G_M
 
- LP5521_EXEC_M
 
- LP5521_EXEC_RUN
 
- LP5521_EXEC_R_M
 
- LP5521_EXT_CLK_USED
 
- LP5521_G_IS_LOADING
 
- LP5521_LOAD_B
 
- LP5521_LOAD_G
 
- LP5521_LOAD_R
 
- LP5521_LOGARITHMIC_PWM
 
- LP5521_MASTER_ENABLE
 
- LP5521_MAX_LEDS
 
- LP5521_MODE_B_M
 
- LP5521_MODE_G_M
 
- LP5521_MODE_R_M
 
- LP5521_PROGRAM_LENGTH
 
- LP5521_PWM_HF
 
- LP5521_PWRSAVE_EN
 
- LP5521_REG_B_CURRENT
 
- LP5521_REG_B_PROG_MEM
 
- LP5521_REG_B_PWM
 
- LP5521_REG_CONFIG
 
- LP5521_REG_ENABLE
 
- LP5521_REG_G_CURRENT
 
- LP5521_REG_G_PROG_MEM
 
- LP5521_REG_G_PWM
 
- LP5521_REG_LED_CURRENT_BASE
 
- LP5521_REG_LED_PWM_BASE
 
- LP5521_REG_OP_MODE
 
- LP5521_REG_RESET
 
- LP5521_REG_R_CURRENT
 
- LP5521_REG_R_CURR_DEFAULT
 
- LP5521_REG_R_PROG_MEM
 
- LP5521_REG_R_PWM
 
- LP5521_REG_STATUS
 
- LP5521_RESET
 
- LP5521_RUN_B
 
- LP5521_RUN_G
 
- LP5521_RUN_R
 
- LP5521_R_IS_LOADING
 
- LP5521_R_TO_BATT
 
- LP5523
 
- LP55231
 
- LP5523_ADC_SHORTCIRC_LIM
 
- LP5523_AUTO_CLK
 
- LP5523_AUTO_INC
 
- LP5523_CP_AUTO
 
- LP5523_ENABLE
 
- LP5523_ENG1_IS_LOADING
 
- LP5523_ENG2_IS_LOADING
 
- LP5523_ENG3_IS_LOADING
 
- LP5523_ENG_STATUS_MASK
 
- LP5523_EN_LEDTEST
 
- LP5523_EXEC_ENG1_M
 
- LP5523_EXEC_ENG2_M
 
- LP5523_EXEC_ENG3_M
 
- LP5523_EXEC_M
 
- LP5523_EXT_CLK_USED
 
- LP5523_FADER_MAPPING_MASK
 
- LP5523_FADER_MAPPING_SHIFT
 
- LP5523_LEDTEST_DONE
 
- LP5523_LOAD_ENG1
 
- LP5523_LOAD_ENG2
 
- LP5523_LOAD_ENG3
 
- LP5523_MAX_LEDS
 
- LP5523_MODE_ENG1_M
 
- LP5523_MODE_ENG2_M
 
- LP5523_MODE_ENG3_M
 
- LP5523_PAGE_ENG1
 
- LP5523_PAGE_ENG2
 
- LP5523_PAGE_ENG3
 
- LP5523_PAGE_MUX1
 
- LP5523_PAGE_MUX2
 
- LP5523_PAGE_MUX3
 
- LP5523_PROGRAM_LENGTH
 
- LP5523_PWM_PWR_SAVE
 
- LP5523_PWR_SAVE
 
- LP5523_REG_CH1_PROG_START
 
- LP5523_REG_CH2_PROG_START
 
- LP5523_REG_CH3_PROG_START
 
- LP5523_REG_CONFIG
 
- LP5523_REG_ENABLE
 
- LP5523_REG_ENABLE_LEDS_LSB
 
- LP5523_REG_ENABLE_LEDS_MSB
 
- LP5523_REG_LED_CTRL_BASE
 
- LP5523_REG_LED_CURRENT_BASE
 
- LP5523_REG_LED_PWM_BASE
 
- LP5523_REG_LED_TEST_ADC
 
- LP5523_REG_LED_TEST_CTRL
 
- LP5523_REG_MASTER_FADER_BASE
 
- LP5523_REG_OP_MODE
 
- LP5523_REG_PROG_MEM
 
- LP5523_REG_PROG_PAGE_SEL
 
- LP5523_REG_RESET
 
- LP5523_REG_STATUS
 
- LP5523_RESET
 
- LP5523_RUN_ENG1
 
- LP5523_RUN_ENG2
 
- LP5523_RUN_ENG3
 
- LP5562_CLK_INT
 
- LP5562_CMD_DIRECT
 
- LP5562_CMD_DISABLE
 
- LP5562_CMD_LOAD
 
- LP5562_CMD_RUN
 
- LP5562_DEFAULT_CFG
 
- LP5562_ENABLE_DEFAULT
 
- LP5562_ENABLE_RUN_PROGRAM
 
- LP5562_ENG1_FOR_W
 
- LP5562_ENG1_IS_LOADING
 
- LP5562_ENG2_FOR_W
 
- LP5562_ENG2_IS_LOADING
 
- LP5562_ENG3_FOR_W
 
- LP5562_ENG3_IS_LOADING
 
- LP5562_ENG_FOR_RGB_M
 
- LP5562_ENG_FOR_W_M
 
- LP5562_ENG_SEL_PWM
 
- LP5562_ENG_SEL_RGB
 
- LP5562_EXEC_ENG1_M
 
- LP5562_EXEC_ENG2_M
 
- LP5562_EXEC_ENG3_M
 
- LP5562_EXEC_M
 
- LP5562_EXEC_RUN
 
- LP5562_LOAD_ENG1
 
- LP5562_LOAD_ENG2
 
- LP5562_LOAD_ENG3
 
- LP5562_LOGARITHMIC_PWM
 
- LP5562_MASTER_ENABLE
 
- LP5562_MAX_LEDS
 
- LP5562_MODE_ENG1_M
 
- LP5562_MODE_ENG2_M
 
- LP5562_MODE_ENG3_M
 
- LP5562_PATTERN_OFF
 
- LP5562_PROGRAM_LENGTH
 
- LP5562_PWM_HF
 
- LP5562_PWRSAVE_EN
 
- LP5562_REG_B_CURRENT
 
- LP5562_REG_B_PWM
 
- LP5562_REG_CONFIG
 
- LP5562_REG_ENABLE
 
- LP5562_REG_ENG_SEL
 
- LP5562_REG_G_CURRENT
 
- LP5562_REG_G_PWM
 
- LP5562_REG_OP_MODE
 
- LP5562_REG_PROG_MEM_ENG1
 
- LP5562_REG_PROG_MEM_ENG2
 
- LP5562_REG_PROG_MEM_ENG3
 
- LP5562_REG_RESET
 
- LP5562_REG_R_CURRENT
 
- LP5562_REG_R_PWM
 
- LP5562_REG_W_CURRENT
 
- LP5562_REG_W_PWM
 
- LP5562_RESET
 
- LP5562_RUN_ENG1
 
- LP5562_RUN_ENG2
 
- LP5562_RUN_ENG3
 
- LP55XX_CLK_32K
 
- LP55XX_CLOCK_AUTO
 
- LP55XX_CLOCK_EXT
 
- LP55XX_CLOCK_INT
 
- LP55XX_DEV_ATTR_RO
 
- LP55XX_DEV_ATTR_RW
 
- LP55XX_DEV_ATTR_WO
 
- LP55XX_ENGINE_1
 
- LP55XX_ENGINE_2
 
- LP55XX_ENGINE_3
 
- LP55XX_ENGINE_DISABLED
 
- LP55XX_ENGINE_INVALID
 
- LP55XX_ENGINE_LOAD
 
- LP55XX_ENGINE_MAX
 
- LP55XX_ENGINE_RUN
 
- LP8501_3VDD_6VOUT
 
- LP8501_6VDD_3VOUT
 
- LP8501_ALL_VDD
 
- LP8501_ALL_VOUT
 
- LP8501_AUTO_INC
 
- LP8501_CP_AUTO
 
- LP8501_DEFAULT_CFG
 
- LP8501_ENABLE
 
- LP8501_ENG1_IS_LOADING
 
- LP8501_ENG2_IS_LOADING
 
- LP8501_ENG3_IS_LOADING
 
- LP8501_EXEC_ENG1_M
 
- LP8501_EXEC_ENG2_M
 
- LP8501_EXEC_ENG3_M
 
- LP8501_EXEC_M
 
- LP8501_INT_CLK
 
- LP8501_LOAD_ENG1
 
- LP8501_LOAD_ENG2
 
- LP8501_LOAD_ENG3
 
- LP8501_MAX_LEDS
 
- LP8501_MODE_ENG1_M
 
- LP8501_MODE_ENG2_M
 
- LP8501_MODE_ENG3_M
 
- LP8501_PAGE_ENG1
 
- LP8501_PAGE_ENG2
 
- LP8501_PAGE_ENG3
 
- LP8501_PROGRAM_LENGTH
 
- LP8501_PWM_PSAVE
 
- LP8501_PWR_CONFIG_M
 
- LP8501_PWR_SAVE
 
- LP8501_REG_CONFIG
 
- LP8501_REG_ENABLE
 
- LP8501_REG_LED_CURRENT_BASE
 
- LP8501_REG_LED_PWM_BASE
 
- LP8501_REG_OP_MODE
 
- LP8501_REG_PROG_MEM
 
- LP8501_REG_PROG_PAGE_SEL
 
- LP8501_REG_PWR_CONFIG
 
- LP8501_REG_RESET
 
- LP8501_RESET
 
- LP8501_RUN_ENG1
 
- LP8501_RUN_ENG2
 
- LP8501_RUN_ENG3
 
- LP8550
 
- LP8550_I2C_CONFIG
 
- LP8550_I2C_ONLY
 
- LP8550_PWM_CONFIG
 
- LP8550_PWM_ONLY
 
- LP8551
 
- LP8551_I2C_CONFIG
 
- LP8551_I2C_ONLY
 
- LP8551_PWM_CONFIG
 
- LP8551_PWM_ONLY
 
- LP8552
 
- LP8552_I2C_CONFIG
 
- LP8552_I2C_ONLY
 
- LP8552_PWM_CONFIG
 
- LP8552_PWM_ONLY
 
- LP8553
 
- LP8553_I2C_CONFIG
 
- LP8553_I2C_ONLY
 
- LP8553_PWM_CONFIG
 
- LP8553_PWM_ONLY
 
- LP8555
 
- LP8555_COMB1_CONFIG
 
- LP8555_COMB2_CONFIG
 
- LP8555_COMBINED1
 
- LP8555_COMBINED2
 
- LP8555_EPROM_END
 
- LP8555_EPROM_START
 
- LP8555_I2C_CONFIG
 
- LP8555_I2C_ONLY
 
- LP8555_OFF_OPENLEDS
 
- LP8555_PWM_CONFIG
 
- LP8555_PWM_FILTER
 
- LP8555_PWM_ONLY
 
- LP8555_PWM_STANDBY
 
- LP8555_RELOAD_EPROM
 
- LP8556
 
- LP8556_COMB1_CONFIG
 
- LP8556_COMB2_CONFIG
 
- LP8556_COMBINED1
 
- LP8556_COMBINED2
 
- LP8556_EPROM_END
 
- LP8556_EPROM_START
 
- LP8556_FAST_CONFIG
 
- LP8556_I2C_CONFIG
 
- LP8556_I2C_ONLY
 
- LP8556_PWM_CONFIG
 
- LP8556_PWM_ONLY
 
- LP8557
 
- LP8557_BL_CMD
 
- LP8557_BL_MASK
 
- LP8557_BL_OFF
 
- LP8557_BL_ON
 
- LP8557_BRIGHTNESS_CTRL
 
- LP8557_COMB1_CONFIG
 
- LP8557_COMB2_CONFIG
 
- LP8557_COMBINED1
 
- LP8557_COMBINED2
 
- LP8557_CONFIG
 
- LP8557_EPROM_END
 
- LP8557_EPROM_START
 
- LP8557_I2C_CONFIG
 
- LP8557_I2C_ONLY
 
- LP8557_OFF_OPENLEDS
 
- LP8557_PWM_CONFIG
 
- LP8557_PWM_FILTER
 
- LP8557_PWM_ONLY
 
- LP8557_PWM_STANDBY
 
- LP8557_RELOAD_EPROM
 
- LP855X_BRIGHTNESS_CTRL
 
- LP855X_DEVICE_CTRL
 
- LP855X_EEPROM_END
 
- LP855X_EEPROM_START
 
- LP8720
 
- LP8720_BUCK_FPWM_M
 
- LP8720_BUCK_FPWM_S
 
- LP8720_BUCK_VOUT1
 
- LP8720_BUCK_VOUT2
 
- LP8720_DEFAULT_DVS
 
- LP8720_DVS_SEL_M
 
- LP8720_ENABLE
 
- LP8720_ENABLE_DELAY
 
- LP8720_EN_BUCK_M
 
- LP8720_EXT_DVS_M
 
- LP8720_ID_BASE
 
- LP8720_ID_BUCK
 
- LP8720_ID_LDO1
 
- LP8720_ID_LDO2
 
- LP8720_ID_LDO3
 
- LP8720_ID_LDO4
 
- LP8720_ID_LDO5
 
- LP8720_NUM_REGULATORS
 
- LP8720_TIMESTEP_M
 
- LP8720_TIMESTEP_S
 
- LP8725
 
- LP8725_BUCK1_EN_M
 
- LP8725_BUCK1_FPWM_M
 
- LP8725_BUCK1_FPWM_S
 
- LP8725_BUCK1_VOUT1
 
- LP8725_BUCK1_VOUT2
 
- LP8725_BUCK2_EN_M
 
- LP8725_BUCK2_FPWM_M
 
- LP8725_BUCK2_FPWM_S
 
- LP8725_BUCK2_VOUT1
 
- LP8725_BUCK2_VOUT2
 
- LP8725_BUCK_CL_M
 
- LP8725_BUCK_CL_S
 
- LP8725_BUCK_CTRL
 
- LP8725_DEFAULT_DVS
 
- LP8725_DVS1_M
 
- LP8725_DVS2_M
 
- LP8725_ENABLE_DELAY
 
- LP8725_EN_LILO1_M
 
- LP8725_EN_LILO2_M
 
- LP8725_ID_BASE
 
- LP8725_ID_BUCK1
 
- LP8725_ID_BUCK2
 
- LP8725_ID_LDO1
 
- LP8725_ID_LDO2
 
- LP8725_ID_LDO3
 
- LP8725_ID_LDO4
 
- LP8725_ID_LDO5
 
- LP8725_ID_LILO1
 
- LP8725_ID_LILO2
 
- LP8725_LDO_CTRL
 
- LP8725_LILO1_VOUT
 
- LP8725_LILO2_VOUT
 
- LP8725_NUM_REGULATORS
 
- LP8725_TIMESTEP_M
 
- LP8725_TIMESTEP_S
 
- LP8727_ADC_EN
 
- LP8727_CHGCTRL2
 
- LP8727_CHGDET_EN
 
- LP8727_CHGSTAT
 
- LP8727_CHPORT
 
- LP8727_CP_EN
 
- LP8727_CTRL1
 
- LP8727_CTRL2
 
- LP8727_DCPORT
 
- LP8727_EOC_10P
 
- LP8727_EOC_16P
 
- LP8727_EOC_20P
 
- LP8727_EOC_25P
 
- LP8727_EOC_33P
 
- LP8727_EOC_50P
 
- LP8727_EOC_5P
 
- LP8727_ICHG_1000mA
 
- LP8727_ICHG_100mA
 
- LP8727_ICHG_400mA
 
- LP8727_ICHG_450mA
 
- LP8727_ICHG_500mA
 
- LP8727_ICHG_600mA
 
- LP8727_ICHG_700mA
 
- LP8727_ICHG_800mA
 
- LP8727_ICHG_900mA
 
- LP8727_ICHG_90mA
 
- LP8727_ICHG_SHIFT
 
- LP8727_ID200_EN
 
- LP8727_IDNO
 
- LP8727_ID_DEDICATED_CHG
 
- LP8727_ID_MAX
 
- LP8727_ID_NONE
 
- LP8727_ID_TA
 
- LP8727_ID_USB_CHG
 
- LP8727_ID_USB_DS
 
- LP8727_INT1
 
- LP8727_INT2
 
- LP8727_INT_EN
 
- LP8727_STATUS1
 
- LP8727_STATUS2
 
- LP8727_STAT_EOC
 
- LP8727_SWCTRL
 
- LP8727_SW_DM1_DM
 
- LP8727_SW_DM1_HiZ
 
- LP8727_SW_DP2_DP
 
- LP8727_SW_DP2_HiZ
 
- LP8727_TEMP_SHIFT
 
- LP8727_TEMP_STAT
 
- LP8727_VBUS
 
- LP872X_AUTO_PWM
 
- LP872X_EN_LDO1_M
 
- LP872X_EN_LDO2_M
 
- LP872X_EN_LDO3_M
 
- LP872X_EN_LDO4_M
 
- LP872X_EN_LDO5_M
 
- LP872X_FORCE_PWM
 
- LP872X_GENERAL_CFG
 
- LP872X_ID_MAX
 
- LP872X_LDO1_VOUT
 
- LP872X_LDO2_VOUT
 
- LP872X_LDO3_VOUT
 
- LP872X_LDO4_VOUT
 
- LP872X_LDO5_VOUT
 
- LP872X_MAX_REGULATORS
 
- LP872X_START_DELAY_M
 
- LP872X_START_DELAY_S
 
- LP872X_VALID_OPMODE
 
- LP872X_VOUT_M
 
- LP873X
 
- LP873X_BUCK0_CTRL_1_BUCK0_EN
 
- LP873X_BUCK0_CTRL_1_BUCK0_EN_PIN_CTRL
 
- LP873X_BUCK0_CTRL_1_BUCK0_FPWM
 
- LP873X_BUCK0_CTRL_1_BUCK0_RDIS_EN
 
- LP873X_BUCK0_CTRL_2_BUCK0_ILIM
 
- LP873X_BUCK0_CTRL_2_BUCK0_SLEW_RATE
 
- LP873X_BUCK0_DELAY_BUCK0_SD_DELAY
 
- LP873X_BUCK0_DELAY_BUCK0_SU_DELAY
 
- LP873X_BUCK0_VOUT_BUCK0_VSET
 
- LP873X_BUCK1_CTRL_1_BUCK1_EN
 
- LP873X_BUCK1_CTRL_1_BUCK1_EN_PIN_CTRL
 
- LP873X_BUCK1_CTRL_1_BUCK1_FPWM
 
- LP873X_BUCK1_CTRL_1_BUCK1_RDIS_EN
 
- LP873X_BUCK1_CTRL_2_BUCK1_ILIM
 
- LP873X_BUCK1_CTRL_2_BUCK1_SLEW_RATE
 
- LP873X_BUCK1_DELAY_BUCK1_SD_DELAY
 
- LP873X_BUCK1_DELAY_BUCK1_SU_DELAY
 
- LP873X_BUCK1_VOUT_BUCK1_VSET
 
- LP873X_BUCK_0
 
- LP873X_BUCK_1
 
- LP873X_BUCK_MASK_BUCK0_ILIM_MASK
 
- LP873X_BUCK_MASK_BUCK0_PGF_MASK
 
- LP873X_BUCK_MASK_BUCK0_PGR_MASK
 
- LP873X_BUCK_MASK_BUCK1_ILIM_MASK
 
- LP873X_BUCK_MASK_BUCK1_PGF_MASK
 
- LP873X_BUCK_MASK_BUCK1_PGR_MASK
 
- LP873X_BUCK_STAT_BUCK0_ILIM_STAT
 
- LP873X_BUCK_STAT_BUCK0_PG_STAT
 
- LP873X_BUCK_STAT_BUCK0_STAT
 
- LP873X_BUCK_STAT_BUCK1_ILIM_STAT
 
- LP873X_BUCK_STAT_BUCK1_PG_STAT
 
- LP873X_BUCK_STAT_BUCK1_STAT
 
- LP873X_CONFIG_CLKIN_PD
 
- LP873X_CONFIG_CLKIN_PIN_SEL
 
- LP873X_CONFIG_EN_PD
 
- LP873X_CONFIG_SD_DELAY_SEL
 
- LP873X_CONFIG_SU_DELAY_SEL
 
- LP873X_CONFIG_TDIE_WARN_LEVEL
 
- LP873X_DEV_REV_ALL_LAYER
 
- LP873X_DEV_REV_DEV_ID
 
- LP873X_DEV_REV_METAL_LAYER
 
- LP873X_EN_SPREAD_SPEC
 
- LP873X_EXT_CLK_FREQ
 
- LP873X_GPO2_DELAY_GPO2_SD_DELAY
 
- LP873X_GPO2_DELAY_GPO2_SU_DELAY
 
- LP873X_GPO_CTRL_GPO2_EN
 
- LP873X_GPO_CTRL_GPO2_EN_PIN_CTRL
 
- LP873X_GPO_CTRL_GPO2_OD
 
- LP873X_GPO_CTRL_GPO_EN
 
- LP873X_GPO_CTRL_GPO_EN_PIN_CTRL
 
- LP873X_GPO_CTRL_GPO_OD
 
- LP873X_GPO_CTRL_OD
 
- LP873X_GPO_DELAY_GPO_SD_DELAY
 
- LP873X_GPO_DELAY_GPO_SU_DELAY
 
- LP873X_INT_BUCK_BUCK0_ILIM_INT
 
- LP873X_INT_BUCK_BUCK0_PG_INT
 
- LP873X_INT_BUCK_BUCK0_SC_INT
 
- LP873X_INT_BUCK_BUCK1_ILIM_INT
 
- LP873X_INT_BUCK_BUCK1_PG_INT
 
- LP873X_INT_BUCK_BUCK1_SC_INT
 
- LP873X_INT_LDO_LDO0_ILIM_INT
 
- LP873X_INT_LDO_LDO0_PG_INT
 
- LP873X_INT_LDO_LDO0_SC_INT
 
- LP873X_INT_LDO_LDO1_ILIM_INT
 
- LP873X_INT_LDO_LDO1_PG_INT
 
- LP873X_INT_LDO_LDO1_SC_INT
 
- LP873X_INT_TOP_1_BUCK_INT
 
- LP873X_INT_TOP_1_I_MEAS_INT
 
- LP873X_INT_TOP_1_LDO_INT
 
- LP873X_INT_TOP_1_OVP_INT
 
- LP873X_INT_TOP_1_PGOOD_INT
 
- LP873X_INT_TOP_1_SYNC_CLK_INT
 
- LP873X_INT_TOP_1_TDIE_SD_INT
 
- LP873X_INT_TOP_1_TDIE_WARN_INT
 
- LP873X_INT_TOP_2_RESET_REG_INT
 
- LP873X_I_LOAD_1_BUCK_LOAD_CURRENT
 
- LP873X_I_LOAD_2_BUCK_LOAD_CURRENT
 
- LP873X_LDO0_CTRL_LDO0_EN
 
- LP873X_LDO0_CTRL_LDO0_EN_PIN_CTRL
 
- LP873X_LDO0_CTRL_LDO0_RDIS_EN
 
- LP873X_LDO0_DELAY_LDO0_SD_DELAY
 
- LP873X_LDO0_DELAY_LDO0_SU_DELAY
 
- LP873X_LDO0_VOUT_LDO0_VSET
 
- LP873X_LDO1_CTRL_LDO1_EN
 
- LP873X_LDO1_CTRL_LDO1_EN_PIN_CTRL
 
- LP873X_LDO1_CTRL_LDO1_RDIS_EN
 
- LP873X_LDO1_DELAY_LDO1_SD_DELAY
 
- LP873X_LDO1_DELAY_LDO1_SU_DELAY
 
- LP873X_LDO1_VOUT_LDO1_VSET
 
- LP873X_LDO_0
 
- LP873X_LDO_1
 
- LP873X_LDO_MASK_LDO0_ILIM_MASK
 
- LP873X_LDO_MASK_LDO0_PGF_MASK
 
- LP873X_LDO_MASK_LDO0_PGR_MASK
 
- LP873X_LDO_MASK_LDO1_ILIM_MASK
 
- LP873X_LDO_MASK_LDO1_PGF_MASK
 
- LP873X_LDO_MASK_LDO1_PGR_MASK
 
- LP873X_LDO_STAT_LDO0_ILIM_STAT
 
- LP873X_LDO_STAT_LDO0_PG_STAT
 
- LP873X_LDO_STAT_LDO0_STAT
 
- LP873X_LDO_STAT_LDO1_ILIM_STAT
 
- LP873X_LDO_STAT_LDO1_PG_STAT
 
- LP873X_LDO_STAT_LDO1_STAT
 
- LP873X_MAX_REG_ID
 
- LP873X_NUM_BUCK
 
- LP873X_NUM_LDO
 
- LP873X_NUM_REGULATOR
 
- LP873X_OTP_REV_OTP_ID
 
- LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_BUCK0
 
- LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_BUCK1
 
- LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_LDO0
 
- LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_LDO1
 
- LP873X_PGOOD_CTRL1_PGOOD_OD
 
- LP873X_PGOOD_CTRL1_PGOOD_POL
 
- LP873X_PGOOD_CTRL1_PGOOD_WINDOWN_BUCK
 
- LP873X_PGOOD_CTRL1_PGOOD_WINDOW_LDO
 
- LP873X_PGOOD_CTRL2_EN_PGOOD_TWARN
 
- LP873X_PGOOD_CTRL2_EN_PG_FAULT_GATE
 
- LP873X_PGOOD_CTRL2_PGOOD_MODE
 
- LP873X_PG_FAULT_PG_FAULT_BUCK0
 
- LP873X_PG_FAULT_PG_FAULT_BUCK1
 
- LP873X_PG_FAULT_PG_FAULT_LDO0
 
- LP873X_PG_FAULT_PG_FAULT_LDO1
 
- LP873X_PLL_CTRL_EN_PLL
 
- LP873X_REGULATOR
 
- LP873X_REG_BUCK0_CTRL_1
 
- LP873X_REG_BUCK0_CTRL_2
 
- LP873X_REG_BUCK0_DELAY
 
- LP873X_REG_BUCK0_VOUT
 
- LP873X_REG_BUCK1_CTRL_1
 
- LP873X_REG_BUCK1_CTRL_2
 
- LP873X_REG_BUCK1_DELAY
 
- LP873X_REG_BUCK1_VOUT
 
- LP873X_REG_BUCK_MASK
 
- LP873X_REG_BUCK_STAT
 
- LP873X_REG_CONFIG
 
- LP873X_REG_DEV_REV
 
- LP873X_REG_GPO2_DELAY
 
- LP873X_REG_GPO_CTRL
 
- LP873X_REG_GPO_DELAY
 
- LP873X_REG_INT_BUCK
 
- LP873X_REG_INT_LDO
 
- LP873X_REG_INT_TOP_1
 
- LP873X_REG_INT_TOP_2
 
- LP873X_REG_I_LOAD_1
 
- LP873X_REG_I_LOAD_2
 
- LP873X_REG_LDO0_CTRL
 
- LP873X_REG_LDO0_DELAY
 
- LP873X_REG_LDO0_VOUT
 
- LP873X_REG_LDO1_CTRL
 
- LP873X_REG_LDO1_DELAY
 
- LP873X_REG_LDO1_VOUT
 
- LP873X_REG_LDO_MASK
 
- LP873X_REG_LDO_STAT
 
- LP873X_REG_MAX
 
- LP873X_REG_OTP_REV
 
- LP873X_REG_PGOOD_CTRL1
 
- LP873X_REG_PGOOD_CTRL2
 
- LP873X_REG_PG_FAULT
 
- LP873X_REG_PLL_CTRL
 
- LP873X_REG_RESET
 
- LP873X_REG_SEL_I_LOAD
 
- LP873X_REG_TOP_MASK_1
 
- LP873X_REG_TOP_MASK_2
 
- LP873X_REG_TOP_STAT
 
- LP873X_RESET_SW_RESET
 
- LP873X_SEL_I_LOAD_CURRENT_BUCK_SELECT
 
- LP873X_TOP_MASK_1_I_MEAS_MASK
 
- LP873X_TOP_MASK_1_PGOOD_INT_MASK
 
- LP873X_TOP_MASK_1_SYNC_CLK_MASK
 
- LP873X_TOP_MASK_1_TDIE_WARN_MASK
 
- LP873X_TOP_MASK_2_RESET_REG_MASK
 
- LP873X_TOP_STAT_OVP_STAT
 
- LP873X_TOP_STAT_PGOOD_STAT
 
- LP873X_TOP_STAT_SYNC_CLK_STAT
 
- LP873X_TOP_STAT_TDIE_SD_STAT
 
- LP873X_TOP_STAT_TDIE_WARN_STAT
 
- LP8755_BUCK0
 
- LP8755_BUCK1
 
- LP8755_BUCK2
 
- LP8755_BUCK3
 
- LP8755_BUCK4
 
- LP8755_BUCK5
 
- LP8755_BUCK_EN_M
 
- LP8755_BUCK_LINEAR_OUT_MAX
 
- LP8755_BUCK_MAX
 
- LP8755_BUCK_VOUT_M
 
- LP8755_EVENT_I_LOAD
 
- LP8755_EVENT_OCP
 
- LP8755_EVENT_OVP
 
- LP8755_EVENT_PWR_FAULT
 
- LP8755_EVENT_TEMP_SHDN
 
- LP8755_EVENT_TEMP_WARN
 
- LP8755_NAME
 
- LP8755_REG_BUCK0
 
- LP8755_REG_BUCK1
 
- LP8755_REG_BUCK2
 
- LP8755_REG_BUCK3
 
- LP8755_REG_BUCK4
 
- LP8755_REG_BUCK5
 
- LP8755_REG_MAX
 
- LP87565_BUCK0_ILIM_INT
 
- LP87565_BUCK0_ILIM_STAT
 
- LP87565_BUCK0_PG_INT
 
- LP87565_BUCK0_PG_STAT
 
- LP87565_BUCK0_SC_INT
 
- LP87565_BUCK0_STAT
 
- LP87565_BUCK1_ILIM_INT
 
- LP87565_BUCK1_ILIM_STAT
 
- LP87565_BUCK1_PG_INT
 
- LP87565_BUCK1_PG_STAT
 
- LP87565_BUCK1_SC_INT
 
- LP87565_BUCK1_STAT
 
- LP87565_BUCK2_ILIM_INT
 
- LP87565_BUCK2_ILIM_STAT
 
- LP87565_BUCK2_PG_INT
 
- LP87565_BUCK2_PG_STAT
 
- LP87565_BUCK2_SC_INT
 
- LP87565_BUCK2_STAT
 
- LP87565_BUCK3_ILIM_INT
 
- LP87565_BUCK3_ILIM_STAT
 
- LP87565_BUCK3_PG_INT
 
- LP87565_BUCK3_PG_STAT
 
- LP87565_BUCK3_SC_INT
 
- LP87565_BUCK3_STAT
 
- LP87565_BUCK_0
 
- LP87565_BUCK_1
 
- LP87565_BUCK_10
 
- LP87565_BUCK_2
 
- LP87565_BUCK_23
 
- LP87565_BUCK_3
 
- LP87565_BUCK_3210
 
- LP87565_BUCK_CTRL_1_EN
 
- LP87565_BUCK_CTRL_1_EN_PIN_CTRL
 
- LP87565_BUCK_CTRL_1_FPWM
 
- LP87565_BUCK_CTRL_1_FPWM_MP_0_2
 
- LP87565_BUCK_CTRL_1_PIN_SELECT_EN
 
- LP87565_BUCK_CTRL_1_RDIS_EN
 
- LP87565_BUCK_CTRL_1_ROOF_FLOOR_EN
 
- LP87565_BUCK_CTRL_2_ILIM
 
- LP87565_BUCK_CTRL_2_SLEW_RATE
 
- LP87565_BUCK_FLOOR_VSET
 
- LP87565_BUCK_SHUTDOWN_DELAY
 
- LP87565_BUCK_STARTUP_DELAY
 
- LP87565_BUCK_VSET
 
- LP87565_CONFIG_CLKIN_PD
 
- LP87565_CONFIG_DOUBLE_DELAY
 
- LP87565_CONFIG_EN1_PD
 
- LP87565_CONFIG_EN2_PD
 
- LP87565_CONFIG_EN3_PD
 
- LP87565_CONFIG_EN4_PD
 
- LP87565_CONFIG_TDIE_WARN_LEVEL
 
- LP87565_DEVICE_TYPE_LP87561_Q1
 
- LP87565_DEVICE_TYPE_LP87565_Q1
 
- LP87565_DEVICE_TYPE_UNKNOWN
 
- LP87565_DEV_REV_ALL_LAYER
 
- LP87565_DEV_REV_DEV_ID
 
- LP87565_DEV_REV_METAL_LAYER
 
- LP87565_EN_PG0_NINT
 
- LP87565_EN_PGFLT_STAT
 
- LP87565_EN_PIN_CTRL_GPIO2
 
- LP87565_EN_PIN_CTRL_GPIO3
 
- LP87565_EN_PIN_SELECT_GPIO2
 
- LP87565_EN_PIN_SELECT_GPIO3
 
- LP87565_EN_SPREAD_SPEC
 
- LP87565_EXT_CLK_FREQ
 
- LP87565_GOIO1_DIR
 
- LP87565_GOIO1_IN
 
- LP87565_GOIO1_OD
 
- LP87565_GOIO1_OUT
 
- LP87565_GOIO2_DIR
 
- LP87565_GOIO2_IN
 
- LP87565_GOIO2_OD
 
- LP87565_GOIO2_OUT
 
- LP87565_GOIO3_DIR
 
- LP87565_GOIO3_IN
 
- LP87565_GOIO3_OD
 
- LP87565_GOIO3_OUT
 
- LP87565_GPIO1_SEL
 
- LP87565_GPIO2_SEL
 
- LP87565_GPIO3_SEL
 
- LP87565_GPIO_SHUTDOWN_DELAY
 
- LP87565_GPIO_STARTUP_DELAY
 
- LP87565_HALF_DAY
 
- LP87565_INT_BUCK01
 
- LP87565_INT_BUCK23
 
- LP87565_INT_GPIO
 
- LP87565_INT_OVP
 
- LP87565_INT_TOP2_RESET_REG
 
- LP87565_I_LOAD1_BUCK_LOAD_CURRENT
 
- LP87565_I_LOAD2_BUCK_LOAD_CURRENT
 
- LP87565_I_LOAD_READY
 
- LP87565_LOAD_CURRENT_BUCK_SELECT
 
- LP87565_NO_SYNC_CLK
 
- LP87565_NUM_BUCK
 
- LP87565_OTP_REV_OTP_ID
 
- LP87565_OVP_STAT
 
- LP87565_PG0_FLT
 
- LP87565_PG0_SEL
 
- LP87565_PG1_FLT
 
- LP87565_PG1_SEL
 
- LP87565_PG2_FLT
 
- LP87565_PG2_SEL
 
- LP87565_PG3_FLT
 
- LP87565_PG3_SEL
 
- LP87565_PGOOD_OD
 
- LP87565_PGOOD_POL
 
- LP87565_PGOOD_SET_DELAY
 
- LP87565_PGOOD_WINDOW
 
- LP87565_PLL_MODE
 
- LP87565_REGULATOR
 
- LP87565_REG_BUCK0_CTRL_1
 
- LP87565_REG_BUCK0_CTRL_2
 
- LP87565_REG_BUCK0_DELAY
 
- LP87565_REG_BUCK0_FLOOR_VOUT
 
- LP87565_REG_BUCK0_VOUT
 
- LP87565_REG_BUCK1_CTRL_1
 
- LP87565_REG_BUCK1_CTRL_2
 
- LP87565_REG_BUCK1_DELAY
 
- LP87565_REG_BUCK1_FLOOR_VOUT
 
- LP87565_REG_BUCK1_VOUT
 
- LP87565_REG_BUCK2_CTRL_1
 
- LP87565_REG_BUCK2_CTRL_2
 
- LP87565_REG_BUCK2_DELAY
 
- LP87565_REG_BUCK2_FLOOR_VOUT
 
- LP87565_REG_BUCK2_VOUT
 
- LP87565_REG_BUCK3_CTRL_1
 
- LP87565_REG_BUCK3_CTRL_2
 
- LP87565_REG_BUCK3_DELAY
 
- LP87565_REG_BUCK3_FLOOR_VOUT
 
- LP87565_REG_BUCK3_VOUT
 
- LP87565_REG_BUCK_0_1_MASK
 
- LP87565_REG_BUCK_0_1_STAT
 
- LP87565_REG_BUCK_2_3_MASK
 
- LP87565_REG_BUCK_2_3_STAT
 
- LP87565_REG_CONFIG
 
- LP87565_REG_DEV_REV
 
- LP87565_REG_GPIO_CONFIG
 
- LP87565_REG_GPIO_IN
 
- LP87565_REG_GPIO_OUT
 
- LP87565_REG_GPO2_DELAY
 
- LP87565_REG_GPO3_DELAY
 
- LP87565_REG_INT_BUCK_0_1
 
- LP87565_REG_INT_BUCK_2_3
 
- LP87565_REG_INT_TOP_1
 
- LP87565_REG_INT_TOP_2
 
- LP87565_REG_I_LOAD_1
 
- LP87565_REG_I_LOAD_2
 
- LP87565_REG_MAX
 
- LP87565_REG_OTP_REV
 
- LP87565_REG_PGOOD_CTRL1
 
- LP87565_REG_PGOOD_CTRL2
 
- LP87565_REG_PGOOD_FLT
 
- LP87565_REG_PIN_FUNCTION
 
- LP87565_REG_PLL_CTRL
 
- LP87565_REG_RESET
 
- LP87565_REG_SEL_I_LOAD
 
- LP87565_REG_TOP_MASK_1
 
- LP87565_REG_TOP_MASK_2
 
- LP87565_REG_TOP_STAT
 
- LP87565_RESET_SW_RESET
 
- LP87565_SYNC_CLK_STAT
 
- LP87565_TDIE_SD
 
- LP87565_TDIE_SD_STAT
 
- LP87565_TDIE_WARN
 
- LP87565_TDIE_WARN_STAT
 
- LP87565_regulator_id
 
- LP8788_ADC_CONF
 
- LP8788_ADC_DONE
 
- LP8788_ADC_RAW
 
- LP8788_ALARM_1
 
- LP8788_ALARM_2
 
- LP8788_ALARM_MAX
 
- LP8788_ALDO10_VOUT
 
- LP8788_ALDO1_VOUT
 
- LP8788_ALDO2_VOUT
 
- LP8788_ALDO3_VOUT
 
- LP8788_ALDO4_VOUT
 
- LP8788_ALDO5_VOUT
 
- LP8788_ALDO6_VOUT
 
- LP8788_ALDO7_VOUT
 
- LP8788_ALDO8_VOUT
 
- LP8788_ALDO9_VOUT
 
- LP8788_ALM1_EN
 
- LP8788_ALM1_SEC
 
- LP8788_ALM2_EN
 
- LP8788_ALM2_SEC
 
- LP8788_ALM_EN_M
 
- LP8788_ALM_EN_S
 
- LP8788_ALM_IRQ
 
- LP8788_AUTO_PWM
 
- LP8788_BAD_BATT_M
 
- LP8788_BASE_YEAR
 
- LP8788_BATTERY_FAULT
 
- LP8788_BATTERY_NAME
 
- LP8788_BATT_IRQ
 
- LP8788_BATT_TEMP
 
- LP8788_BL_BRIGHTNESS
 
- LP8788_BL_COMB_PWM_BASED
 
- LP8788_BL_COMB_REGISTER_BASED
 
- LP8788_BL_CONFIG
 
- LP8788_BL_DIM_MODE_SHIFT
 
- LP8788_BL_EN
 
- LP8788_BL_FULLSCALE_SHIFT
 
- LP8788_BL_PWM_INPUT_EN
 
- LP8788_BL_PWM_POLARITY_SHIFT
 
- LP8788_BL_RAMP
 
- LP8788_BL_RAMP_RISE_SHIFT
 
- LP8788_BL_REGISTER_ONLY
 
- LP8788_BUCK1_DVS_I2C
 
- LP8788_BUCK1_DVS_M
 
- LP8788_BUCK1_DVS_PIN
 
- LP8788_BUCK1_DVS_S
 
- LP8788_BUCK1_DVS_SEL_M
 
- LP8788_BUCK1_TIMESTEP
 
- LP8788_BUCK1_VOUT0
 
- LP8788_BUCK1_VOUT1
 
- LP8788_BUCK1_VOUT2
 
- LP8788_BUCK1_VOUT3
 
- LP8788_BUCK2_DVS_I2C
 
- LP8788_BUCK2_DVS_M
 
- LP8788_BUCK2_DVS_PIN
 
- LP8788_BUCK2_DVS_S
 
- LP8788_BUCK2_DVS_SEL_M
 
- LP8788_BUCK2_VOUT0
 
- LP8788_BUCK2_VOUT1
 
- LP8788_BUCK2_VOUT2
 
- LP8788_BUCK2_VOUT3
 
- LP8788_BUCK3_VOUT
 
- LP8788_BUCK4_VOUT
 
- LP8788_BUCK_DVS_SEL
 
- LP8788_BUCK_PWM
 
- LP8788_CC
 
- LP8788_CHAN
 
- LP8788_CHARGER_NAME
 
- LP8788_CHG_END
 
- LP8788_CHG_EOC
 
- LP8788_CHG_EOC_LEVEL_M
 
- LP8788_CHG_EOC_LEVEL_S
 
- LP8788_CHG_EOC_MODE_M
 
- LP8788_CHG_EOC_TIME_M
 
- LP8788_CHG_EOC_TIME_S
 
- LP8788_CHG_IBATT
 
- LP8788_CHG_IBATT_M
 
- LP8788_CHG_IDCIN
 
- LP8788_CHG_INPUT_STATE_M
 
- LP8788_CHG_IRQ
 
- LP8788_CHG_START
 
- LP8788_CHG_STATE_M
 
- LP8788_CHG_STATE_S
 
- LP8788_CHG_STATUS
 
- LP8788_CHG_VTERM
 
- LP8788_CHG_VTERM_M
 
- LP8788_CV
 
- LP8788_DEV_ADC
 
- LP8788_DEV_ALDO
 
- LP8788_DEV_BACKLIGHT
 
- LP8788_DEV_BUCK
 
- LP8788_DEV_CHARGER
 
- LP8788_DEV_DLDO
 
- LP8788_DEV_KEYLED
 
- LP8788_DEV_RTC
 
- LP8788_DEV_VIBRATOR
 
- LP8788_DIM_EXPONENTIAL
 
- LP8788_DIM_LINEAR
 
- LP8788_DLDO10_VOUT
 
- LP8788_DLDO11_VOUT
 
- LP8788_DLDO12_VOUT
 
- LP8788_DLDO1_TIMESTEP
 
- LP8788_DLDO1_VOUT
 
- LP8788_DLDO2_VOUT
 
- LP8788_DLDO3_VOUT
 
- LP8788_DLDO4_VOUT
 
- LP8788_DLDO5_VOUT
 
- LP8788_DLDO6_VOUT
 
- LP8788_DLDO7_VOUT
 
- LP8788_DLDO8_VOUT
 
- LP8788_DLDO9_VOUT
 
- LP8788_EN_ALDO10_M
 
- LP8788_EN_ALDO1_M
 
- LP8788_EN_ALDO2_M
 
- LP8788_EN_ALDO3_M
 
- LP8788_EN_ALDO4_M
 
- LP8788_EN_ALDO5_M
 
- LP8788_EN_ALDO6_M
 
- LP8788_EN_ALDO7_M
 
- LP8788_EN_ALDO8_M
 
- LP8788_EN_ALDO9_M
 
- LP8788_EN_BUCK
 
- LP8788_EN_BUCK1_M
 
- LP8788_EN_BUCK2_M
 
- LP8788_EN_BUCK3_M
 
- LP8788_EN_BUCK4_M
 
- LP8788_EN_DLDO10_M
 
- LP8788_EN_DLDO11_M
 
- LP8788_EN_DLDO12_M
 
- LP8788_EN_DLDO1_M
 
- LP8788_EN_DLDO2_M
 
- LP8788_EN_DLDO3_M
 
- LP8788_EN_DLDO4_M
 
- LP8788_EN_DLDO5_M
 
- LP8788_EN_DLDO6_M
 
- LP8788_EN_DLDO7_M
 
- LP8788_EN_DLDO8_M
 
- LP8788_EN_DLDO9_M
 
- LP8788_EN_LDO_A
 
- LP8788_EN_LDO_B
 
- LP8788_EN_LDO_C
 
- LP8788_EN_SEL
 
- LP8788_EN_SEL_ALDO1_M
 
- LP8788_EN_SEL_ALDO234_M
 
- LP8788_EN_SEL_ALDO5_M
 
- LP8788_EN_SEL_ALDO7_M
 
- LP8788_EN_SEL_DLDO7_M
 
- LP8788_EN_SEL_DLDO911_M
 
- LP8788_FORCE_PWM
 
- LP8788_FPWM_BUCK1_M
 
- LP8788_FPWM_BUCK1_S
 
- LP8788_FPWM_BUCK2_M
 
- LP8788_FPWM_BUCK2_S
 
- LP8788_FPWM_BUCK3_M
 
- LP8788_FPWM_BUCK3_S
 
- LP8788_FPWM_BUCK4_M
 
- LP8788_FPWM_BUCK4_S
 
- LP8788_FULLSCALE_1200uA
 
- LP8788_FULLSCALE_1550uA
 
- LP8788_FULLSCALE_1900uA
 
- LP8788_FULLSCALE_2250uA
 
- LP8788_FULLSCALE_2600uA
 
- LP8788_FULLSCALE_2950uA
 
- LP8788_FULLSCALE_5000uA
 
- LP8788_FULLSCALE_8500uA
 
- LP8788_FULL_FUNCTION
 
- LP8788_HIGH_CURRENT
 
- LP8788_INTEN_1
 
- LP8788_INTEN_3
 
- LP8788_INT_1
 
- LP8788_INT_BATT_LOW
 
- LP8788_INT_CHG_INPUT_STATE
 
- LP8788_INT_CHG_RESTART
 
- LP8788_INT_CHG_STATE
 
- LP8788_INT_COMP1
 
- LP8788_INT_COMP2
 
- LP8788_INT_ENTER_SYS_SUPPORT
 
- LP8788_INT_EOC
 
- LP8788_INT_EXIT_SYS_SUPPORT
 
- LP8788_INT_FLAGMON
 
- LP8788_INT_FULLCHG_TIMEOUT
 
- LP8788_INT_MAX
 
- LP8788_INT_NO_BATT
 
- LP8788_INT_PRECHG_TIMEOUT
 
- LP8788_INT_PWRON
 
- LP8788_INT_PWRON_TIME
 
- LP8788_INT_RESTART_TIMEOUT
 
- LP8788_INT_RTC_ALARM1
 
- LP8788_INT_RTC_ALARM2
 
- LP8788_INT_RTC_ALM1_M
 
- LP8788_INT_RTC_ALM1_S
 
- LP8788_INT_RTC_ALM2_M
 
- LP8788_INT_RTC_ALM2_S
 
- LP8788_INT_TSDH
 
- LP8788_INT_TSDL
 
- LP8788_INT_UVLO
 
- LP8788_ISEL_MAX
 
- LP8788_ISEL_STEP
 
- LP8788_ISINK12_IOUT
 
- LP8788_ISINK1_IOUT_M
 
- LP8788_ISINK1_PWM
 
- LP8788_ISINK2_IOUT_M
 
- LP8788_ISINK2_PWM
 
- LP8788_ISINK3_IOUT
 
- LP8788_ISINK3_IOUT_M
 
- LP8788_ISINK3_PWM
 
- LP8788_ISINK_1
 
- LP8788_ISINK_2
 
- LP8788_ISINK_3
 
- LP8788_ISINK_CTRL
 
- LP8788_ISINK_MAX_PWM
 
- LP8788_ISINK_SCALE_100mA
 
- LP8788_ISINK_SCALE_120mA
 
- LP8788_ISINK_SCALE_OFFSET
 
- LP8788_LOW_INPUT
 
- LP8788_MAINTENANCE
 
- LP8788_MAX_BATT_CAPACITY
 
- LP8788_MAX_CHG_IRQS
 
- LP8788_MAX_CHG_STATE
 
- LP8788_MONTH_OFFSET
 
- LP8788_NO_BATT_M
 
- LP8788_NUM_ALDOS
 
- LP8788_NUM_BUCK2_DVS
 
- LP8788_NUM_BUCKS
 
- LP8788_NUM_CHG_ADC
 
- LP8788_NUM_DLDOS
 
- LP8788_NUM_INTREGS
 
- LP8788_OFF
 
- LP8788_PRECHARGE
 
- LP8788_PRSW_IRQ
 
- LP8788_RAMP_1024us
 
- LP8788_RAMP_16384us
 
- LP8788_RAMP_2048us
 
- LP8788_RAMP_32768us
 
- LP8788_RAMP_4096us
 
- LP8788_RAMP_65538us
 
- LP8788_RAMP_8192us
 
- LP8788_RAMP_8us
 
- LP8788_RTC_SEC
 
- LP8788_RTC_UNLOCK
 
- LP8788_STARTUP_TIME_M
 
- LP8788_STARTUP_TIME_S
 
- LP8788_SYSTEM_SUPPLY
 
- LP8788_SYSTEM_SUPPORT
 
- LP8788_TEMP_115C
 
- LP8788_TEMP_135C
 
- LP8788_TEMP_75C
 
- LP8788_TEMP_95C
 
- LP8788_VBATT
 
- LP8788_VOUT_1BIT_M
 
- LP8788_VOUT_3BIT_M
 
- LP8788_VOUT_4BIT_M
 
- LP8788_VOUT_5BIT_M
 
- LP8788_VOUT_M
 
- LP8788_VTERM_MIN
 
- LP8788_VTERM_STEP
 
- LP8788_WARM_UP
 
- LP8788_WDAY_SET
 
- LP8860_CL2_BRT_LSB
 
- LP8860_CL2_BRT_MSB
 
- LP8860_CL2_CURRENT
 
- LP8860_CL3_BRT_LSB
 
- LP8860_CL3_BRT_MSB
 
- LP8860_CL3_CURRENT
 
- LP8860_CL4_BRT_LSB
 
- LP8860_CL4_BRT_MSB
 
- LP8860_CL4_CURRENT
 
- LP8860_CLEAR_FAULTS
 
- LP8860_CONFIG
 
- LP8860_DISP_CL1_BRT_LSB
 
- LP8860_DISP_CL1_BRT_MSB
 
- LP8860_DISP_CL1_CURR_LSB
 
- LP8860_DISP_CL1_CURR_MSB
 
- LP8860_DISP_LED_CURR_LSB
 
- LP8860_DISP_LED_CURR_MSB
 
- LP8860_DISP_LED_PWM_LSB
 
- LP8860_DISP_LED_PWM_MSB
 
- LP8860_EEPROM_CNTRL
 
- LP8860_EEPROM_CODE_1
 
- LP8860_EEPROM_CODE_2
 
- LP8860_EEPROM_CODE_3
 
- LP8860_EEPROM_REG_0
 
- LP8860_EEPROM_REG_1
 
- LP8860_EEPROM_REG_10
 
- LP8860_EEPROM_REG_11
 
- LP8860_EEPROM_REG_12
 
- LP8860_EEPROM_REG_13
 
- LP8860_EEPROM_REG_14
 
- LP8860_EEPROM_REG_15
 
- LP8860_EEPROM_REG_16
 
- LP8860_EEPROM_REG_17
 
- LP8860_EEPROM_REG_18
 
- LP8860_EEPROM_REG_19
 
- LP8860_EEPROM_REG_2
 
- LP8860_EEPROM_REG_20
 
- LP8860_EEPROM_REG_21
 
- LP8860_EEPROM_REG_22
 
- LP8860_EEPROM_REG_23
 
- LP8860_EEPROM_REG_24
 
- LP8860_EEPROM_REG_3
 
- LP8860_EEPROM_REG_4
 
- LP8860_EEPROM_REG_5
 
- LP8860_EEPROM_REG_6
 
- LP8860_EEPROM_REG_7
 
- LP8860_EEPROM_REG_8
 
- LP8860_EEPROM_REG_9
 
- LP8860_EEPROM_UNLOCK
 
- LP8860_FAULT
 
- LP8860_FAULT_CLEAR
 
- LP8860_ID
 
- LP8860_LED_FAULT
 
- LP8860_LOCK_EEPROM
 
- LP8860_NAME
 
- LP8860_PROGRAM_EEPROM
 
- LP8860_STATUS
 
- LP8860_TEMP_LSB
 
- LP8860_TEMP_MSB
 
- LP8860_UNLOCK_EEPROM
 
- LPABORT
 
- LPABORTOPEN
 
- LPADC_ADC1
 
- LPADC_ADC2
 
- LPADC_ADC3
 
- LPADC_ADC4
 
- LPADC_IBATT
 
- LPADC_IC_TEMP
 
- LPADC_MAX
 
- LPADC_VBATT_5P0
 
- LPADC_VBATT_5P5
 
- LPADC_VBATT_6P0
 
- LPADC_VCOIN
 
- LPADC_VDD
 
- LPADC_VDD_LDO
 
- LPADC_VIN_CHG
 
- LPAGE_MASK
 
- LPAGE_ORDER
 
- LPAGE_SIZE
 
- LPAIF_BIT_CLK
 
- LPAIF_DIG_CLK
 
- LPAIF_DMABASE_REG
 
- LPAIF_DMABUFF_REG
 
- LPAIF_DMACTL_AUDINTF
 
- LPAIF_DMACTL_AUDINTF_MASK
 
- LPAIF_DMACTL_AUDINTF_SHIFT
 
- LPAIF_DMACTL_BURSTEN_INCR4
 
- LPAIF_DMACTL_BURSTEN_MASK
 
- LPAIF_DMACTL_BURSTEN_SHIFT
 
- LPAIF_DMACTL_BURSTEN_SINGLE
 
- LPAIF_DMACTL_DYNCLK_MASK
 
- LPAIF_DMACTL_DYNCLK_OFF
 
- LPAIF_DMACTL_DYNCLK_ON
 
- LPAIF_DMACTL_DYNCLK_SHIFT
 
- LPAIF_DMACTL_ENABLE_MASK
 
- LPAIF_DMACTL_ENABLE_OFF
 
- LPAIF_DMACTL_ENABLE_ON
 
- LPAIF_DMACTL_ENABLE_SHIFT
 
- LPAIF_DMACTL_FIFOWM_1
 
- LPAIF_DMACTL_FIFOWM_2
 
- LPAIF_DMACTL_FIFOWM_3
 
- LPAIF_DMACTL_FIFOWM_4
 
- LPAIF_DMACTL_FIFOWM_5
 
- LPAIF_DMACTL_FIFOWM_6
 
- LPAIF_DMACTL_FIFOWM_7
 
- LPAIF_DMACTL_FIFOWM_8
 
- LPAIF_DMACTL_FIFOWM_MASK
 
- LPAIF_DMACTL_FIFOWM_SHIFT
 
- LPAIF_DMACTL_REG
 
- LPAIF_DMACTL_WPSCNT_EIGHT
 
- LPAIF_DMACTL_WPSCNT_FOUR
 
- LPAIF_DMACTL_WPSCNT_MASK
 
- LPAIF_DMACTL_WPSCNT_ONE
 
- LPAIF_DMACTL_WPSCNT_SHIFT
 
- LPAIF_DMACTL_WPSCNT_SIX
 
- LPAIF_DMACTL_WPSCNT_THREE
 
- LPAIF_DMACTL_WPSCNT_TWO
 
- LPAIF_DMACURR_REG
 
- LPAIF_DMAPERCNT_REG
 
- LPAIF_DMAPER_REG
 
- LPAIF_I2SCTL_BITWIDTH_16
 
- LPAIF_I2SCTL_BITWIDTH_24
 
- LPAIF_I2SCTL_BITWIDTH_32
 
- LPAIF_I2SCTL_BITWIDTH_MASK
 
- LPAIF_I2SCTL_BITWIDTH_SHIFT
 
- LPAIF_I2SCTL_LOOPBACK_DISABLE
 
- LPAIF_I2SCTL_LOOPBACK_ENABLE
 
- LPAIF_I2SCTL_LOOPBACK_MASK
 
- LPAIF_I2SCTL_LOOPBACK_SHIFT
 
- LPAIF_I2SCTL_MICEN_DISABLE
 
- LPAIF_I2SCTL_MICEN_ENABLE
 
- LPAIF_I2SCTL_MICEN_MASK
 
- LPAIF_I2SCTL_MICEN_SHIFT
 
- LPAIF_I2SCTL_MICMODE_6CH
 
- LPAIF_I2SCTL_MICMODE_8CH
 
- LPAIF_I2SCTL_MICMODE_MASK
 
- LPAIF_I2SCTL_MICMODE_NONE
 
- LPAIF_I2SCTL_MICMODE_QUAD01
 
- LPAIF_I2SCTL_MICMODE_QUAD23
 
- LPAIF_I2SCTL_MICMODE_SD0
 
- LPAIF_I2SCTL_MICMODE_SD1
 
- LPAIF_I2SCTL_MICMODE_SD2
 
- LPAIF_I2SCTL_MICMODE_SD3
 
- LPAIF_I2SCTL_MICMODE_SHIFT
 
- LPAIF_I2SCTL_MICMONO_MONO
 
- LPAIF_I2SCTL_MICMONO_SHIFT
 
- LPAIF_I2SCTL_MICMONO_STEREO
 
- LPAIF_I2SCTL_MIMONO_MASK
 
- LPAIF_I2SCTL_REG
 
- LPAIF_I2SCTL_REG_ADDR
 
- LPAIF_I2SCTL_SPKEN_DISABLE
 
- LPAIF_I2SCTL_SPKEN_ENABLE
 
- LPAIF_I2SCTL_SPKEN_MASK
 
- LPAIF_I2SCTL_SPKEN_SHIFT
 
- LPAIF_I2SCTL_SPKMODE_6CH
 
- LPAIF_I2SCTL_SPKMODE_8CH
 
- LPAIF_I2SCTL_SPKMODE_MASK
 
- LPAIF_I2SCTL_SPKMODE_NONE
 
- LPAIF_I2SCTL_SPKMODE_QUAD01
 
- LPAIF_I2SCTL_SPKMODE_QUAD23
 
- LPAIF_I2SCTL_SPKMODE_SD0
 
- LPAIF_I2SCTL_SPKMODE_SD1
 
- LPAIF_I2SCTL_SPKMODE_SD2
 
- LPAIF_I2SCTL_SPKMODE_SD3
 
- LPAIF_I2SCTL_SPKMODE_SHIFT
 
- LPAIF_I2SCTL_SPKMONO_MASK
 
- LPAIF_I2SCTL_SPKMONO_MONO
 
- LPAIF_I2SCTL_SPKMONO_SHIFT
 
- LPAIF_I2SCTL_SPKMONO_STEREO
 
- LPAIF_I2SCTL_WSSRC_EXTERNAL
 
- LPAIF_I2SCTL_WSSRC_INTERNAL
 
- LPAIF_I2SCTL_WSSRC_MASK
 
- LPAIF_I2SCTL_WSSRC_SHIFT
 
- LPAIF_IRQCLEAR_REG
 
- LPAIF_IRQEN_REG
 
- LPAIF_IRQSTAT_REG
 
- LPAIF_IRQ_ALL
 
- LPAIF_IRQ_BITSTRIDE
 
- LPAIF_IRQ_ERR
 
- LPAIF_IRQ_PER
 
- LPAIF_IRQ_PORT_HOST
 
- LPAIF_IRQ_REG_ADDR
 
- LPAIF_IRQ_XRUN
 
- LPAIF_OSR_CLK
 
- LPAIF_RDMABASE_REG
 
- LPAIF_RDMABUFF_REG
 
- LPAIF_RDMACTL_AUDINTF
 
- LPAIF_RDMACTL_REG
 
- LPAIF_RDMACURR_REG
 
- LPAIF_RDMAPERCNT_REG
 
- LPAIF_RDMAPER_REG
 
- LPAIF_RDMA_REG_ADDR
 
- LPAIF_WRDMABASE_REG
 
- LPAIF_WRDMABUFF_REG
 
- LPAIF_WRDMACTL_REG
 
- LPAIF_WRDMACURR_REG
 
- LPAIF_WRDMAPERCNT_REG
 
- LPAIF_WRDMAPER_REG
 
- LPAIF_WRDMA_REG_ADDR
 
- LPAM_DMA_START
 
- LPAM_DMA_STOP
 
- LPANABL
 
- LPARCD
 
- LPARWDT_RESTART
 
- LPAR_CHAR_DEDICATED
 
- LPAR_CHAR_LIMITED
 
- LPAR_CHAR_SHARED
 
- LPASS_AHBIX_CLOCK_FREQUENCY
 
- LPASS_CDC_CLK_DMIC_B1_CTL
 
- LPASS_CDC_CLK_MCLK_CTL
 
- LPASS_CDC_CLK_OTHR_CTL
 
- LPASS_CDC_CLK_OTHR_RESET_B1_CTL
 
- LPASS_CDC_CLK_PDM_CTL
 
- LPASS_CDC_CLK_PDM_CTL_PDM_CLK_PDM_CLK
 
- LPASS_CDC_CLK_PDM_CTL_PDM_CLK_SEL_FB
 
- LPASS_CDC_CLK_PDM_CTL_PDM_CLK_SEL_MASK
 
- LPASS_CDC_CLK_PDM_CTL_PDM_EN
 
- LPASS_CDC_CLK_PDM_CTL_PDM_EN_MASK
 
- LPASS_CDC_CLK_RX_B1_CTL
 
- LPASS_CDC_CLK_RX_I2S_CTL
 
- LPASS_CDC_CLK_RX_RESET_CTL
 
- LPASS_CDC_CLK_SD_CTL
 
- LPASS_CDC_CLK_TX_CLK_EN_B1_CTL
 
- LPASS_CDC_CLK_TX_I2S_CTL
 
- LPASS_CDC_CLK_TX_RESET_B1_CTL
 
- LPASS_CDC_CONN_EQ1_B1_CTL
 
- LPASS_CDC_CONN_EQ1_B2_CTL
 
- LPASS_CDC_CONN_EQ1_B3_CTL
 
- LPASS_CDC_CONN_EQ1_B4_CTL
 
- LPASS_CDC_CONN_EQ2_B1_CTL
 
- LPASS_CDC_CONN_EQ2_B2_CTL
 
- LPASS_CDC_CONN_EQ2_B3_CTL
 
- LPASS_CDC_CONN_EQ2_B4_CTL
 
- LPASS_CDC_CONN_RX1_B1_CTL
 
- LPASS_CDC_CONN_RX1_B2_CTL
 
- LPASS_CDC_CONN_RX1_B3_CTL
 
- LPASS_CDC_CONN_RX2_B1_CTL
 
- LPASS_CDC_CONN_RX2_B2_CTL
 
- LPASS_CDC_CONN_RX2_B3_CTL
 
- LPASS_CDC_CONN_RX3_B1_CTL
 
- LPASS_CDC_CONN_RX3_B2_CTL
 
- LPASS_CDC_CONN_TX_B1_CTL
 
- LPASS_CDC_CONN_TX_I2S_SD1_CTL
 
- LPASS_CDC_DEBUG_B1_CTL_CFG
 
- LPASS_CDC_DEBUG_B2_CTL_CFG
 
- LPASS_CDC_DEBUG_B3_CTL_CFG
 
- LPASS_CDC_DEBUG_DESER1_CTL
 
- LPASS_CDC_DEBUG_DESER2_CTL
 
- LPASS_CDC_IIR1_COEF_B1_CTL
 
- LPASS_CDC_IIR1_COEF_B2_CTL
 
- LPASS_CDC_IIR1_CTL
 
- LPASS_CDC_IIR1_GAIN_B1_CTL
 
- LPASS_CDC_IIR1_GAIN_B2_CTL
 
- LPASS_CDC_IIR1_GAIN_B3_CTL
 
- LPASS_CDC_IIR1_GAIN_B4_CTL
 
- LPASS_CDC_IIR1_GAIN_B5_CTL
 
- LPASS_CDC_IIR1_GAIN_B6_CTL
 
- LPASS_CDC_IIR1_GAIN_B7_CTL
 
- LPASS_CDC_IIR1_GAIN_B8_CTL
 
- LPASS_CDC_IIR1_GAIN_TIMER_CTL
 
- LPASS_CDC_IIR2_COEF_B1_CTL
 
- LPASS_CDC_IIR2_COEF_B2_CTL
 
- LPASS_CDC_IIR2_CTL
 
- LPASS_CDC_IIR2_GAIN_B1_CTL
 
- LPASS_CDC_IIR2_GAIN_B2_CTL
 
- LPASS_CDC_IIR2_GAIN_B3_CTL
 
- LPASS_CDC_IIR2_GAIN_B4_CTL
 
- LPASS_CDC_IIR2_GAIN_B5_CTL
 
- LPASS_CDC_IIR2_GAIN_B6_CTL
 
- LPASS_CDC_IIR2_GAIN_B7_CTL
 
- LPASS_CDC_IIR2_GAIN_B8_CTL
 
- LPASS_CDC_IIR2_GAIN_TIMER_CTL
 
- LPASS_CDC_RX1_B1_CTL
 
- LPASS_CDC_RX1_B2_CTL
 
- LPASS_CDC_RX1_B3_CTL
 
- LPASS_CDC_RX1_B4_CTL
 
- LPASS_CDC_RX1_B5_CTL
 
- LPASS_CDC_RX1_B6_CTL
 
- LPASS_CDC_RX1_VOL_CTL_B1_CTL
 
- LPASS_CDC_RX1_VOL_CTL_B2_CTL
 
- LPASS_CDC_RX2_B1_CTL
 
- LPASS_CDC_RX2_B2_CTL
 
- LPASS_CDC_RX2_B3_CTL
 
- LPASS_CDC_RX2_B4_CTL
 
- LPASS_CDC_RX2_B5_CTL
 
- LPASS_CDC_RX2_B6_CTL
 
- LPASS_CDC_RX2_VOL_CTL_B1_CTL
 
- LPASS_CDC_RX2_VOL_CTL_B2_CTL
 
- LPASS_CDC_RX3_B1_CTL
 
- LPASS_CDC_RX3_B2_CTL
 
- LPASS_CDC_RX3_B3_CTL
 
- LPASS_CDC_RX3_B4_CTL
 
- LPASS_CDC_RX3_B5_CTL
 
- LPASS_CDC_RX3_B6_CTL
 
- LPASS_CDC_RX3_VOL_CTL_B1_CTL
 
- LPASS_CDC_RX3_VOL_CTL_B2_CTL
 
- LPASS_CDC_TOP_CTL
 
- LPASS_CDC_TOP_GAIN_UPDATE
 
- LPASS_CDC_TX1_CLK_FS_CTL
 
- LPASS_CDC_TX1_DMIC_CTL
 
- LPASS_CDC_TX1_MUX_CTL
 
- LPASS_CDC_TX1_VOL_CTL_CFG
 
- LPASS_CDC_TX1_VOL_CTL_GAIN
 
- LPASS_CDC_TX1_VOL_CTL_TIMER
 
- LPASS_CDC_TX2_CLK_FS_CTL
 
- LPASS_CDC_TX2_DMIC_CTL
 
- LPASS_CDC_TX2_MUX_CTL
 
- LPASS_CDC_TX2_VOL_CTL_CFG
 
- LPASS_CDC_TX2_VOL_CTL_GAIN
 
- LPASS_CDC_TX2_VOL_CTL_TIMER
 
- LPASS_CXO_CLK
 
- LPASS_DMA_SW_RESET
 
- LPASS_HALTACK_REG
 
- LPASS_HALTREQ_REG
 
- LPASS_I2S_SW_RESET
 
- LPASS_INTR_APM
 
- LPASS_INTR_DMA
 
- LPASS_INTR_GPIO
 
- LPASS_INTR_I2S
 
- LPASS_INTR_MIF
 
- LPASS_INTR_PCM
 
- LPASS_INTR_SFR
 
- LPASS_INTR_SLIMBUS
 
- LPASS_INTR_TIMER
 
- LPASS_INTR_UART
 
- LPASS_MASTER_IDLE_REG
 
- LPASS_MAX_DMA_CHANNELS
 
- LPASS_MAX_MI2S_PORTS
 
- LPASS_MEM_SW_RESET
 
- LPASS_PCM_SW_RESET
 
- LPASS_PLATFORM_BUFFER_SIZE
 
- LPASS_PLATFORM_PERIODS
 
- LPASS_PWR_ON_REG
 
- LPASS_PXO_CLK
 
- LPASS_Q6SS_AHBM_AON_CLK
 
- LPASS_Q6SS_AHBS_AON_CLK
 
- LPASS_QDSP6SS_CORE_CLK
 
- LPASS_QDSP6SS_SLEEP_CLK
 
- LPASS_QDSP6SS_XO_CLK
 
- LPASS_SB_SW_RESET
 
- LPASS_TIMER_SW_RESET
 
- LPASS_UART_SW_RESET
 
- LPASS_WDT0_SW_RESET
 
- LPASS_WDT1_SW_RESET
 
- LPATOM_PPLIB_POWERPLAYTABLE2
 
- LPATOM_PPLIB_POWERPLAYTABLE3
 
- LPATOM_PPLIB_POWERPLAYTABLE4
 
- LPATOM_PPLIB_POWERPLAYTABLE5
 
- LPATOM_PPLIB_THERMAL_STATE
 
- LPA_100
 
- LPA_1000FULL
 
- LPA_1000HALF
 
- LPA_1000LOCALRXOK
 
- LPA_1000MSFAIL
 
- LPA_1000REMRXOK
 
- LPA_1000XFULL
 
- LPA_1000XHALF
 
- LPA_1000XPAUSE
 
- LPA_1000XPAUSE_ASYM
 
- LPA_100BASE4
 
- LPA_100FULL
 
- LPA_100HALF
 
- LPA_10FULL
 
- LPA_10HALF
 
- LPA_BASE_MSK
 
- LPA_BASE_SHFT
 
- LPA_DUPLEX
 
- LPA_FIBER_1000FULL
 
- LPA_FIBER_1000HALF
 
- LPA_LPACK
 
- LPA_NPAGE
 
- LPA_PAUSE
 
- LPA_PAUSE_ALL
 
- LPA_PAUSE_ASYM
 
- LPA_PAUSE_ASYM_FIBER
 
- LPA_PAUSE_CAP
 
- LPA_PAUSE_FIBER
 
- LPA_RESV
 
- LPA_RFAULT
 
- LPA_SLCT
 
- LPBFIFO_REG_BYTES_DONE_STATUS
 
- LPBFIFO_REG_CONTROL
 
- LPBFIFO_REG_ENABLE
 
- LPBFIFO_REG_FIFO_ALARM
 
- LPBFIFO_REG_FIFO_CONTROL
 
- LPBFIFO_REG_FIFO_DATA
 
- LPBFIFO_REG_FIFO_STATUS
 
- LPBFIFO_REG_PACKET_SIZE
 
- LPBFIFO_REG_START_ADDRESS
 
- LPB_DEV_PORTSIZE_1_BYTE
 
- LPB_DEV_PORTSIZE_2_BYTES
 
- LPB_DEV_PORTSIZE_4_BYTES
 
- LPB_DEV_PORTSIZE_8_BYTES
 
- LPB_DEV_PORTSIZE_UNDEFINED
 
- LPC
 
- LPC178X_CCALEN
 
- LPC18XX_ADC_CHAN
 
- LPC18XX_ADC_CLK_TARGET
 
- LPC18XX_ADC_CONV_DONE
 
- LPC18XX_ADC_CR
 
- LPC18XX_ADC_CR_CLKDIV_SHIFT
 
- LPC18XX_ADC_CR_PDN
 
- LPC18XX_ADC_CR_START_NOW
 
- LPC18XX_ADC_GDR
 
- LPC18XX_ADC_SAMPLE_MASK
 
- LPC18XX_ADC_SAMPLE_SHIFT
 
- LPC18XX_ANALOG_ADC
 
- LPC18XX_ANALOG_BIT_MASK
 
- LPC18XX_ANALOG_PIN
 
- LPC18XX_CCU_AUTO
 
- LPC18XX_CCU_DIV
 
- LPC18XX_CCU_DIVSTAT
 
- LPC18XX_CCU_RUN
 
- LPC18XX_CGU_BASE_CLK
 
- LPC18XX_CGU_IDIV_CTRL
 
- LPC18XX_CGU_PLL0AUDIO_CTRL
 
- LPC18XX_CGU_PLL0AUDIO_FRAC
 
- LPC18XX_CGU_PLL0AUDIO_MDIV
 
- LPC18XX_CGU_PLL0AUDIO_NP_DIV
 
- LPC18XX_CGU_PLL0AUDIO_STAT
 
- LPC18XX_CGU_PLL0USB_CTRL
 
- LPC18XX_CGU_PLL0USB_MDIV
 
- LPC18XX_CGU_PLL0USB_NP_DIV
 
- LPC18XX_CGU_PLL0USB_STAT
 
- LPC18XX_CGU_PLL1_CTRL
 
- LPC18XX_CGU_PLL1_STAT
 
- LPC18XX_CGU_PLL_CTRL_OFFSET
 
- LPC18XX_CGU_XTAL_OSC_CTRL
 
- LPC18XX_CREG_CREG0
 
- LPC18XX_CREG_CREG0_EN1KHZ
 
- LPC18XX_CREG_CREG0_EN32KHZ
 
- LPC18XX_CREG_CREG0_PD32KHZ
 
- LPC18XX_CREG_CREG0_RESET32KHZ
 
- LPC18XX_CREG_CREG0_USB0PHY
 
- LPC18XX_CREG_CREG6
 
- LPC18XX_CREG_CREG6_ETHMODE_MASK
 
- LPC18XX_CREG_CREG6_ETHMODE_MII
 
- LPC18XX_CREG_CREG6_ETHMODE_RMII
 
- LPC18XX_CREG_DMAMUX
 
- LPC18XX_DAC_CR
 
- LPC18XX_DAC_CR_BIAS
 
- LPC18XX_DAC_CR_VALUE_MASK
 
- LPC18XX_DAC_CR_VALUE_SHIFT
 
- LPC18XX_DAC_CTRL
 
- LPC18XX_DAC_CTRL_DMA_ENA
 
- LPC18XX_DMAMUX_MASK
 
- LPC18XX_DMAMUX_MAX_VAL
 
- LPC18XX_DMAMUX_VAL
 
- LPC18XX_EEPROM_AUTOPROG
 
- LPC18XX_EEPROM_AUTOPROG_WORD
 
- LPC18XX_EEPROM_CLKDIV
 
- LPC18XX_EEPROM_CLOCK_HZ
 
- LPC18XX_EEPROM_INTSTAT
 
- LPC18XX_EEPROM_INTSTATCLR
 
- LPC18XX_EEPROM_INTSTATCLR_PROG_CLR_ST
 
- LPC18XX_EEPROM_INTSTAT_END_OF_PROG
 
- LPC18XX_EEPROM_PAGE_SIZE
 
- LPC18XX_EEPROM_PROGRAM_TIME
 
- LPC18XX_EEPROM_PWRDWN
 
- LPC18XX_EEPROM_PWRDWN_NO
 
- LPC18XX_EEPROM_PWRDWN_YES
 
- LPC18XX_GPIO_PINS_PER_PORT
 
- LPC18XX_GPIO_PIN_IC_CIENF
 
- LPC18XX_GPIO_PIN_IC_CIENR
 
- LPC18XX_GPIO_PIN_IC_FALL
 
- LPC18XX_GPIO_PIN_IC_IENF
 
- LPC18XX_GPIO_PIN_IC_IENR
 
- LPC18XX_GPIO_PIN_IC_ISEL
 
- LPC18XX_GPIO_PIN_IC_IST
 
- LPC18XX_GPIO_PIN_IC_RISE
 
- LPC18XX_GPIO_PIN_IC_SIENF
 
- LPC18XX_GPIO_PIN_IC_SIENR
 
- LPC18XX_GPIO_PIN_INT_MAX
 
- LPC18XX_MAX_PORTS
 
- LPC18XX_OTP_NUM_BANKS
 
- LPC18XX_OTP_SIZE
 
- LPC18XX_OTP_WORDS_PER_BANK
 
- LPC18XX_OTP_WORD_SIZE
 
- LPC18XX_PIN
 
- LPC18XX_PINS_PER_PORT
 
- LPC18XX_PIN_P
 
- LPC18XX_PLL0_CTRL_BYPASS
 
- LPC18XX_PLL0_CTRL_CLKEN
 
- LPC18XX_PLL0_CTRL_DIRECTI
 
- LPC18XX_PLL0_CTRL_DIRECTO
 
- LPC18XX_PLL0_CTRL_PD
 
- LPC18XX_PLL0_MDIV_MDEC_MASK
 
- LPC18XX_PLL0_MDIV_SELI_SHIFT
 
- LPC18XX_PLL0_MDIV_SELP_SHIFT
 
- LPC18XX_PLL0_MSEL_MAX
 
- LPC18XX_PLL0_NP_DIVS_1
 
- LPC18XX_PLL0_STAT_LOCK
 
- LPC18XX_PLL1_CTRL_DIRECT
 
- LPC18XX_PLL1_CTRL_FBSEL
 
- LPC18XX_PWM_BIDIR
 
- LPC18XX_PWM_CONFIG
 
- LPC18XX_PWM_CONFIG_NORELOAD
 
- LPC18XX_PWM_CONFIG_UNIFY
 
- LPC18XX_PWM_CTRL
 
- LPC18XX_PWM_CTRL_HALT
 
- LPC18XX_PWM_EVCTRL
 
- LPC18XX_PWM_EVCTRL_BASE
 
- LPC18XX_PWM_EVCTRL_COMB_MATCH
 
- LPC18XX_PWM_EVCTRL_COMB_SHIFT
 
- LPC18XX_PWM_EVCTRL_MATCH
 
- LPC18XX_PWM_EVENT_MAX
 
- LPC18XX_PWM_EVENT_PERIOD
 
- LPC18XX_PWM_EVSTATEMSK
 
- LPC18XX_PWM_EVSTATEMSK_ALL
 
- LPC18XX_PWM_EVSTATEMSK_BASE
 
- LPC18XX_PWM_LIMIT
 
- LPC18XX_PWM_MATCH
 
- LPC18XX_PWM_MATCHREL
 
- LPC18XX_PWM_MATCHREL_BASE
 
- LPC18XX_PWM_MATCH_BASE
 
- LPC18XX_PWM_OUTPUTCL
 
- LPC18XX_PWM_OUTPUTCL_BASE
 
- LPC18XX_PWM_OUTPUTSET
 
- LPC18XX_PWM_OUTPUTSET_BASE
 
- LPC18XX_PWM_PRE
 
- LPC18XX_PWM_PRE_MASK
 
- LPC18XX_PWM_PRE_SHIFT
 
- LPC18XX_PWM_RES
 
- LPC18XX_PWM_RES_BASE
 
- LPC18XX_PWM_RES_CLEAR
 
- LPC18XX_PWM_RES_MASK
 
- LPC18XX_PWM_RES_NONE
 
- LPC18XX_PWM_RES_SET
 
- LPC18XX_PWM_RES_SHIFT
 
- LPC18XX_PWM_RES_TOGGLE
 
- LPC18XX_PWM_TIMER_MAX
 
- LPC18XX_REG_DIR
 
- LPC18XX_RGU_ACTIVE_STATUS0
 
- LPC18XX_RGU_ACTIVE_STATUS1
 
- LPC18XX_RGU_CORE_RST
 
- LPC18XX_RGU_CTRL0
 
- LPC18XX_RGU_CTRL1
 
- LPC18XX_RGU_RESETS_PER_REG
 
- LPC18XX_SCU_ANALOG_PIN_CFG
 
- LPC18XX_SCU_FUNC_PER_PIN
 
- LPC18XX_SCU_I2C0_EFP
 
- LPC18XX_SCU_I2C0_EHD
 
- LPC18XX_SCU_I2C0_EZI
 
- LPC18XX_SCU_I2C0_SCL_SHIFT
 
- LPC18XX_SCU_I2C0_SDA_SHIFT
 
- LPC18XX_SCU_I2C0_ZIF
 
- LPC18XX_SCU_IRQ_PER_PINTSEL
 
- LPC18XX_SCU_PINTSEL0
 
- LPC18XX_SCU_PINTSEL1
 
- LPC18XX_SCU_PINTSEL_PORT_SHIFT
 
- LPC18XX_SCU_PINTSEL_VAL
 
- LPC18XX_SCU_PINTSEL_VAL_MASK
 
- LPC18XX_SCU_PIN_EHD_MASK
 
- LPC18XX_SCU_PIN_EHD_POS
 
- LPC18XX_SCU_PIN_EHS
 
- LPC18XX_SCU_PIN_EPD
 
- LPC18XX_SCU_PIN_EPUN
 
- LPC18XX_SCU_PIN_EZI
 
- LPC18XX_SCU_PIN_MODE_MASK
 
- LPC18XX_SCU_PIN_ZIF
 
- LPC18XX_SCU_REG_ENAIO0
 
- LPC18XX_SCU_REG_ENAIO1
 
- LPC18XX_SCU_REG_ENAIO2
 
- LPC18XX_SCU_REG_ENAIO2_DAC
 
- LPC18XX_SCU_USB1_EPD
 
- LPC18XX_SCU_USB1_EPWR
 
- LPC18XX_UART_RS485CTRL
 
- LPC18XX_UART_RS485CTRL_DCTRL
 
- LPC18XX_UART_RS485CTRL_NMMEN
 
- LPC18XX_UART_RS485CTRL_OINV
 
- LPC18XX_UART_RS485DLY
 
- LPC18XX_UART_RS485DLY_MAX
 
- LPC18XX_WDT_CLK_DIV
 
- LPC18XX_WDT_DEF_TIMEOUT
 
- LPC18XX_WDT_FEED
 
- LPC18XX_WDT_FEED_MAGIC1
 
- LPC18XX_WDT_FEED_MAGIC2
 
- LPC18XX_WDT_MOD
 
- LPC18XX_WDT_MOD_WDEN
 
- LPC18XX_WDT_MOD_WDRESET
 
- LPC18XX_WDT_TC
 
- LPC18XX_WDT_TC_MAX
 
- LPC18XX_WDT_TC_MIN
 
- LPC18XX_WDT_TV
 
- LPC1XX_CGU_BASE_CLK
 
- LPC1XX_CGU_CLK_PLL
 
- LPC1XX_CGU_SRC_CLK_DIV
 
- LPC24XX_AA
 
- LPC24XX_ALARM_DISABLE
 
- LPC24XX_ALDOM
 
- LPC24XX_ALDOW
 
- LPC24XX_ALDOY
 
- LPC24XX_ALHOUR
 
- LPC24XX_ALMIN
 
- LPC24XX_ALMON
 
- LPC24XX_ALSEC
 
- LPC24XX_ALYEAR
 
- LPC24XX_AMR
 
- LPC24XX_CCR
 
- LPC24XX_CIIR
 
- LPC24XX_CLEAR_ALL
 
- LPC24XX_CLKEN
 
- LPC24XX_CTC
 
- LPC24XX_CTIME0
 
- LPC24XX_CTIME1
 
- LPC24XX_CTIME2
 
- LPC24XX_DOM
 
- LPC24XX_DOW
 
- LPC24XX_DOY
 
- LPC24XX_HOUR
 
- LPC24XX_I2ADDR
 
- LPC24XX_I2CONCLR
 
- LPC24XX_I2CONSET
 
- LPC24XX_I2DAT
 
- LPC24XX_I2EN
 
- LPC24XX_I2SCLH
 
- LPC24XX_I2SCLL
 
- LPC24XX_I2STAT
 
- LPC24XX_ILR
 
- LPC24XX_MIN
 
- LPC24XX_MONTH
 
- LPC24XX_RTCALF
 
- LPC24XX_RTCCIF
 
- LPC24XX_SEC
 
- LPC24XX_SI
 
- LPC24XX_STA
 
- LPC24XX_STO
 
- LPC24XX_STO_AA
 
- LPC24XX_YEAR
 
- LPC32XXAD_CTRL
 
- LPC32XXAD_IN
 
- LPC32XXAD_INTERNAL
 
- LPC32XXAD_NAME
 
- LPC32XXAD_PDN_CTRL
 
- LPC32XXAD_REFm
 
- LPC32XXAD_REFp
 
- LPC32XXAD_SELECT
 
- LPC32XXAD_STROBE
 
- LPC32XXAD_VALUE
 
- LPC32XXAD_VALUE_MASK
 
- LPC32XX_ADC_BASE
 
- LPC32XX_ADC_CHANNEL
 
- LPC32XX_ADC_CHANNEL_BASE
 
- LPC32XX_ADC_SCALE_CHANNEL
 
- LPC32XX_AHB0_SIZE
 
- LPC32XX_AHB0_START
 
- LPC32XX_AHB1_SIZE
 
- LPC32XX_AHB1_START
 
- LPC32XX_CLKPWR_ADC32CLKCTRL_CLK_EN
 
- LPC32XX_CLKPWR_ADCCLK_CTRL
 
- LPC32XX_CLKPWR_ADCCLK_CTRL1
 
- LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL
 
- LPC32XX_CLKPWR_ADCCTRL1_RTDIV
 
- LPC32XX_CLKPWR_ADC_CLK_CTRL
 
- LPC32XX_CLKPWR_ADC_CLK_CTRL_1
 
- LPC32XX_CLKPWR_AUTOCLK_IRAM_EN
 
- LPC32XX_CLKPWR_AUTOCLK_IROM_EN
 
- LPC32XX_CLKPWR_AUTOCLK_USB_EN
 
- LPC32XX_CLKPWR_AUTOCLOCK
 
- LPC32XX_CLKPWR_AUTO_SDRAM_SELF_RFSH
 
- LPC32XX_CLKPWR_BOOTMAP
 
- LPC32XX_CLKPWR_BOOTMAP_SEL_BIT
 
- LPC32XX_CLKPWR_CTRL_FORCE_PCLK
 
- LPC32XX_CLKPWR_DDR_LAP_COUNT
 
- LPC32XX_CLKPWR_DDR_LAP_DELAY
 
- LPC32XX_CLKPWR_DDR_LAP_NOM
 
- LPC32XX_CLKPWR_DEBUG_CTRL
 
- LPC32XX_CLKPWR_DEVID
 
- LPC32XX_CLKPWR_DMACLKCTRL_CLK_EN
 
- LPC32XX_CLKPWR_DMA_CLK_CTRL
 
- LPC32XX_CLKPWR_EXTSRC_GPI_00_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_01_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_02_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_03_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_04_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_05_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_07_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_08_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_09_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_19_BIT
 
- LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT
 
- LPC32XX_CLKPWR_EXTSRC_MSDIO_INT_BIT
 
- LPC32XX_CLKPWR_EXTSRC_MSDIO_SRT_BIT
 
- LPC32XX_CLKPWR_EXTSRC_SPI1_DATIN_BIT
 
- LPC32XX_CLKPWR_EXTSRC_SPI2_DATIN_BIT
 
- LPC32XX_CLKPWR_EXTSRC_SYSCLKEN_BIT
 
- LPC32XX_CLKPWR_EXTSRC_U1_RX_BIT
 
- LPC32XX_CLKPWR_EXTSRC_U2_HCTS_BIT
 
- LPC32XX_CLKPWR_EXTSRC_U2_RX_BIT
 
- LPC32XX_CLKPWR_EXTSRC_U3_RX_BIT
 
- LPC32XX_CLKPWR_EXTSRC_U5_RX_BIT
 
- LPC32XX_CLKPWR_EXTSRC_U6_IRRX_BIT
 
- LPC32XX_CLKPWR_EXTSRC_U7_HCTS_BIT
 
- LPC32XX_CLKPWR_EXTSRC_U7_RX_BIT
 
- LPC32XX_CLKPWR_FLASHCLK_CTRL
 
- LPC32XX_CLKPWR_GPIOSRC_P0IO0_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P0IO1_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P0IO2_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P0IO3_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P0IO4_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P0IO5_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P0IO6_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P0IO7_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO0_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO10_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO11_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO12_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO13_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO14_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO15_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO16_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO17_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO18_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO19_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO1_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO20_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO21_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO22_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO23_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO2_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO3_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO4_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO5_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO6_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO7_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO8_BIT
 
- LPC32XX_CLKPWR_GPIOSRC_P1IO9_BIT
 
- LPC32XX_CLKPWR_HCLKDIV_CTRL
 
- LPC32XX_CLKPWR_HCLKDIV_DDRCLK_HALF
 
- LPC32XX_CLKPWR_HCLKDIV_DDRCLK_NORM
 
- LPC32XX_CLKPWR_HCLKDIV_DDRCLK_STOP
 
- LPC32XX_CLKPWR_HCLKDIV_DIV_2POW
 
- LPC32XX_CLKPWR_HCLKDIV_PCLK_DIV
 
- LPC32XX_CLKPWR_HCLKPLL_CCO_BYPASS
 
- LPC32XX_CLKPWR_HCLKPLL_CTRL
 
- LPC32XX_CLKPWR_HCLKPLL_CTRL_OFFS
 
- LPC32XX_CLKPWR_HCLKPLL_FDBK_SEL_FCLK
 
- LPC32XX_CLKPWR_HCLKPLL_PLLM
 
- LPC32XX_CLKPWR_HCLKPLL_PLL_STS
 
- LPC32XX_CLKPWR_HCLKPLL_POSTDIV_2POW
 
- LPC32XX_CLKPWR_HCLKPLL_POSTDIV_BYPASS
 
- LPC32XX_CLKPWR_HCLKPLL_POWER_UP
 
- LPC32XX_CLKPWR_HCLKPLL_PREDIV_PLUS1
 
- LPC32XX_CLKPWR_HCLK_DIV
 
- LPC32XX_CLKPWR_HCLK_DIV_OFFS
 
- LPC32XX_CLKPWR_HIGHCORE_GPIO_EN
 
- LPC32XX_CLKPWR_HIGHCORE_STATE_BIT
 
- LPC32XX_CLKPWR_I2CCLK_CTRL
 
- LPC32XX_CLKPWR_I2CCLK_I2C1CLK_EN
 
- LPC32XX_CLKPWR_I2CCLK_I2C1HI_DRIVE
 
- LPC32XX_CLKPWR_I2CCLK_I2C2CLK_EN
 
- LPC32XX_CLKPWR_I2CCLK_I2C2HI_DRIVE
 
- LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE
 
- LPC32XX_CLKPWR_I2C_CLK_CTRL
 
- LPC32XX_CLKPWR_I2SCTRL_I2S0_RX_FOR_TX
 
- LPC32XX_CLKPWR_I2SCTRL_I2S0_TX_FOR_RX
 
- LPC32XX_CLKPWR_I2SCTRL_I2S1_RX_FOR_TX
 
- LPC32XX_CLKPWR_I2SCTRL_I2S1_TX_FOR_RX
 
- LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA
 
- LPC32XX_CLKPWR_I2SCTRL_I2SCLK0_EN
 
- LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN
 
- LPC32XX_CLKPWR_I2S_CLK_CTRL
 
- LPC32XX_CLKPWR_I2S_CTRL
 
- LPC32XX_CLKPWR_INTSRC_ADC_BIT
 
- LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT
 
- LPC32XX_CLKPWR_INTSRC_GPIO_01_BIT
 
- LPC32XX_CLKPWR_INTSRC_GPIO_02_BIT
 
- LPC32XX_CLKPWR_INTSRC_GPIO_03_BIT
 
- LPC32XX_CLKPWR_INTSRC_GPIO_04_BIT
 
- LPC32XX_CLKPWR_INTSRC_GPIO_05_BIT
 
- LPC32XX_CLKPWR_INTSRC_I2C_BIT
 
- LPC32XX_CLKPWR_INTSRC_KEY_BIT
 
- LPC32XX_CLKPWR_INTSRC_MAC_BIT
 
- LPC32XX_CLKPWR_INTSRC_MSTIMER_BIT
 
- LPC32XX_CLKPWR_INTSRC_P0P1_BIT
 
- LPC32XX_CLKPWR_INTSRC_RTC_BIT
 
- LPC32XX_CLKPWR_INTSRC_TS_AUX_BIT
 
- LPC32XX_CLKPWR_INTSRC_TS_P_BIT
 
- LPC32XX_CLKPWR_INTSRC_USBAHNEEDCLK_BIT
 
- LPC32XX_CLKPWR_INTSRC_USBATXINT_BIT
 
- LPC32XX_CLKPWR_INTSRC_USBNEEDCLK_BIT
 
- LPC32XX_CLKPWR_INTSRC_USBOTGTIMER_BIT
 
- LPC32XX_CLKPWR_INTSRC_USB_BIT
 
- LPC32XX_CLKPWR_INT_AP
 
- LPC32XX_CLKPWR_INT_ER
 
- LPC32XX_CLKPWR_INT_RS
 
- LPC32XX_CLKPWR_INT_SR
 
- LPC32XX_CLKPWR_IRDA_CLK_CTRL
 
- LPC32XX_CLKPWR_IRDA_X_DIV
 
- LPC32XX_CLKPWR_IRDA_Y_DIV
 
- LPC32XX_CLKPWR_KEYCLKCTRL_CLK_EN
 
- LPC32XX_CLKPWR_KEYCLK_CTRL
 
- LPC32XX_CLKPWR_KEY_CLK_CTRL
 
- LPC32XX_CLKPWR_LCDCLK_CTRL
 
- LPC32XX_CLKPWR_LCDCTRL_CLK_EN
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_DSTN4M
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_DSTN8C
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_STN4M
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_STN8C
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT12
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT15
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT16
 
- LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT24
 
- LPC32XX_CLKPWR_LCDCTRL_PSCALE_MSK
 
- LPC32XX_CLKPWR_LCDCTRL_SET_PSCALE
 
- LPC32XX_CLKPWR_MACCLK_CTRL
 
- LPC32XX_CLKPWR_MACCTRL_DMACLK_EN
 
- LPC32XX_CLKPWR_MACCTRL_HRCCLK_EN
 
- LPC32XX_CLKPWR_MACCTRL_MMIOCLK_EN
 
- LPC32XX_CLKPWR_MACCTRL_NO_ENET_PIS
 
- LPC32XX_CLKPWR_MACCTRL_PINS_MSK
 
- LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS
 
- LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS
 
- LPC32XX_CLKPWR_MAIN_OSC_CTRL
 
- LPC32XX_CLKPWR_MOSC_ADD_CAP
 
- LPC32XX_CLKPWR_MOSC_CAP_MASK
 
- LPC32XX_CLKPWR_MOSC_DISABLE
 
- LPC32XX_CLKPWR_MSCARD_MSDIO0_DIS
 
- LPC32XX_CLKPWR_MSCARD_MSDIO1_DIS
 
- LPC32XX_CLKPWR_MSCARD_MSDIO23_DIS
 
- LPC32XX_CLKPWR_MSCARD_MSDIO_PIN_DIS
 
- LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN
 
- LPC32XX_CLKPWR_MSCARD_SDCARD_DIV
 
- LPC32XX_CLKPWR_MSCARD_SDCARD_EN
 
- LPC32XX_CLKPWR_MS_CTRL
 
- LPC32XX_CLKPWR_NANDCLK_DMA_INT
 
- LPC32XX_CLKPWR_NANDCLK_DMA_RNB
 
- LPC32XX_CLKPWR_NANDCLK_INTSEL_MLC
 
- LPC32XX_CLKPWR_NANDCLK_MLCCLK_EN
 
- LPC32XX_CLKPWR_NANDCLK_SEL_SLC
 
- LPC32XX_CLKPWR_NANDCLK_SLCCLK_EN
 
- LPC32XX_CLKPWR_NAND_CLK_CTRL
 
- LPC32XX_CLKPWR_OSC_CTRL
 
- LPC32XX_CLKPWR_P01_ER
 
- LPC32XX_CLKPWR_PIN_AP
 
- LPC32XX_CLKPWR_PIN_ER
 
- LPC32XX_CLKPWR_PIN_RS
 
- LPC32XX_CLKPWR_PIN_SR
 
- LPC32XX_CLKPWR_PLL397_BIAS_MASK
 
- LPC32XX_CLKPWR_PLL397_BIAS_N12_5
 
- LPC32XX_CLKPWR_PLL397_BIAS_N25
 
- LPC32XX_CLKPWR_PLL397_BIAS_N37_5
 
- LPC32XX_CLKPWR_PLL397_BIAS_NORM
 
- LPC32XX_CLKPWR_PLL397_BIAS_P12_5
 
- LPC32XX_CLKPWR_PLL397_BIAS_P25
 
- LPC32XX_CLKPWR_PLL397_BIAS_P37_5
 
- LPC32XX_CLKPWR_PLL397_BIAS_P50
 
- LPC32XX_CLKPWR_PLL397_BYPASS
 
- LPC32XX_CLKPWR_PLL397_CTRL
 
- LPC32XX_CLKPWR_PLL397_MSLOCK_STS
 
- LPC32XX_CLKPWR_PWMCLK_CTRL
 
- LPC32XX_CLKPWR_PWMCLK_HSTIMER_EN
 
- LPC32XX_CLKPWR_PWMCLK_PWM1CLK_EN
 
- LPC32XX_CLKPWR_PWMCLK_PWM1SEL_PCLK
 
- LPC32XX_CLKPWR_PWMCLK_PWM1_DIV
 
- LPC32XX_CLKPWR_PWMCLK_PWM2CLK_EN
 
- LPC32XX_CLKPWR_PWMCLK_PWM2SEL_PCLK
 
- LPC32XX_CLKPWR_PWMCLK_PWM2_DIV
 
- LPC32XX_CLKPWR_PWMCLK_WDOG_EN
 
- LPC32XX_CLKPWR_PWM_CLK_CTRL
 
- LPC32XX_CLKPWR_PWR_CTRL
 
- LPC32XX_CLKPWR_PWR_CTRL_OFFS
 
- LPC32XX_CLKPWR_SDRAMCLK_CTRL
 
- LPC32XX_CLKPWR_SDRAM_SELF_RFSH
 
- LPC32XX_CLKPWR_SDRCLK_CAL_ON_RTC
 
- LPC32XX_CLKPWR_SDRCLK_CLK_DIS
 
- LPC32XX_CLKPWR_SDRCLK_DLY_ADDR_STS
 
- LPC32XX_CLKPWR_SDRCLK_DO_CAL
 
- LPC32XX_CLKPWR_SDRCLK_DQS_DLY
 
- LPC32XX_CLKPWR_SDRCLK_FASTSLEW
 
- LPC32XX_CLKPWR_SDRCLK_FASTSLEW_CLK
 
- LPC32XX_CLKPWR_SDRCLK_FASTSLEW_DAT
 
- LPC32XX_CLKPWR_SDRCLK_HCLK_DLY
 
- LPC32XX_CLKPWR_SDRCLK_SENS_FACT
 
- LPC32XX_CLKPWR_SDRCLK_SW_DDR_RESET
 
- LPC32XX_CLKPWR_SDRCLK_USE_CAL
 
- LPC32XX_CLKPWR_SDRCLK_USE_DDR
 
- LPC32XX_CLKPWR_SELECT_RUN_MODE
 
- LPC32XX_CLKPWR_SFW_INT
 
- LPC32XX_CLKPWR_SPICLK_SET_SPI1CLK
 
- LPC32XX_CLKPWR_SPICLK_SET_SPI1DATIO
 
- LPC32XX_CLKPWR_SPICLK_SET_SPI2CLK
 
- LPC32XX_CLKPWR_SPICLK_SET_SPI2DATIO
 
- LPC32XX_CLKPWR_SPICLK_SPI1CLK_EN
 
- LPC32XX_CLKPWR_SPICLK_SPI2CLK_EN
 
- LPC32XX_CLKPWR_SPICLK_USE_SPI1
 
- LPC32XX_CLKPWR_SPICLK_USE_SPI2
 
- LPC32XX_CLKPWR_SPI_CLK_CTRL
 
- LPC32XX_CLKPWR_SPI_CTRL
 
- LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0RX
 
- LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0TX
 
- LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1RX
 
- LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1TX
 
- LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN
 
- LPC32XX_CLKPWR_SSPCTRL_SSPCLK1_EN
 
- LPC32XX_CLKPWR_SSP_CLK_CTRL
 
- LPC32XX_CLKPWR_SSP_CTRL
 
- LPC32XX_CLKPWR_STOP_MODE_CTRL
 
- LPC32XX_CLKPWR_SW_GET_ARG
 
- LPC32XX_CLKPWR_SW_INT
 
- LPC32XX_CLKPWR_SYSCLKEN_GPIO_EN
 
- LPC32XX_CLKPWR_SYSCLKEN_STATE_BIT
 
- LPC32XX_CLKPWR_SYSCLK_CTRL
 
- LPC32XX_CLKPWR_SYSCTRL_BP_MASK
 
- LPC32XX_CLKPWR_SYSCTRL_BP_TRIG
 
- LPC32XX_CLKPWR_SYSCTRL_PLL397_DIS
 
- LPC32XX_CLKPWR_SYSCTRL_PLL397_STS
 
- LPC32XX_CLKPWR_SYSCTRL_SYSCLKMUX
 
- LPC32XX_CLKPWR_SYSCTRL_USEPLL397
 
- LPC32XX_CLKPWR_TESTCLK1_SEL_MASK
 
- LPC32XX_CLKPWR_TESTCLK1_SEL_MOSC
 
- LPC32XX_CLKPWR_TESTCLK1_SEL_PERCLK
 
- LPC32XX_CLKPWR_TESTCLK1_SEL_RTC
 
- LPC32XX_CLKPWR_TESTCLK2_SEL_HCLK
 
- LPC32XX_CLKPWR_TESTCLK2_SEL_MASK
 
- LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC
 
- LPC32XX_CLKPWR_TESTCLK2_SEL_PERCLK
 
- LPC32XX_CLKPWR_TESTCLK2_SEL_PLL397
 
- LPC32XX_CLKPWR_TESTCLK2_SEL_USBCLK
 
- LPC32XX_CLKPWR_TESTCLK_TESTCLK1_EN
 
- LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN
 
- LPC32XX_CLKPWR_TEST_CLK_CTRL
 
- LPC32XX_CLKPWR_TEST_CLK_SEL
 
- LPC32XX_CLKPWR_TEST_MODE
 
- LPC32XX_CLKPWR_TIMCLK_CTRL
 
- LPC32XX_CLKPWR_TIMCLK_CTRL1
 
- LPC32XX_CLKPWR_TIMERS_PWMS_CLK_CTRL_1
 
- LPC32XX_CLKPWR_TIMER_CLK_CTRL
 
- LPC32XX_CLKPWR_TMRPWMCLK_MPWM_EN
 
- LPC32XX_CLKPWR_TMRPWMCLK_PWM3_EN
 
- LPC32XX_CLKPWR_TMRPWMCLK_PWM4_EN
 
- LPC32XX_CLKPWR_TMRPWMCLK_TIMER0_EN
 
- LPC32XX_CLKPWR_TMRPWMCLK_TIMER1_EN
 
- LPC32XX_CLKPWR_TMRPWMCLK_TIMER2_EN
 
- LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN
 
- LPC32XX_CLKPWR_UART3_CLK_CTRL
 
- LPC32XX_CLKPWR_UART4_CLK_CTRL
 
- LPC32XX_CLKPWR_UART5_CLK_CTRL
 
- LPC32XX_CLKPWR_UART6_CLK_CTRL
 
- LPC32XX_CLKPWR_UARTCLKCTRL_UART3_EN
 
- LPC32XX_CLKPWR_UARTCLKCTRL_UART4_EN
 
- LPC32XX_CLKPWR_UARTCLKCTRL_UART5_EN
 
- LPC32XX_CLKPWR_UARTCLKCTRL_UART6_EN
 
- LPC32XX_CLKPWR_UART_CLK_CTRL
 
- LPC32XX_CLKPWR_UART_USE_HCLK
 
- LPC32XX_CLKPWR_UART_X_DIV
 
- LPC32XX_CLKPWR_UART_Y_DIV
 
- LPC32XX_CLKPWR_UPD_SDRAM_SELF_RFSH
 
- LPC32XX_CLKPWR_USBCLK_PDIV
 
- LPC32XX_CLKPWR_USBCTRL_BUS_KEEPER
 
- LPC32XX_CLKPWR_USBCTRL_CCO_BYPASS
 
- LPC32XX_CLKPWR_USBCTRL_CLK_EN1
 
- LPC32XX_CLKPWR_USBCTRL_CLK_EN2
 
- LPC32XX_CLKPWR_USBCTRL_FDBK_PLUS1
 
- LPC32XX_CLKPWR_USBCTRL_FDBK_SEL_FCLK
 
- LPC32XX_CLKPWR_USBCTRL_HCLK_EN
 
- LPC32XX_CLKPWR_USBCTRL_PD_ADD
 
- LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP
 
- LPC32XX_CLKPWR_USBCTRL_PLL_STS
 
- LPC32XX_CLKPWR_USBCTRL_POSTDIV_2POW
 
- LPC32XX_CLKPWR_USBCTRL_POSTDIV_BYPASS
 
- LPC32XX_CLKPWR_USBCTRL_PREDIV_PLUS1
 
- LPC32XX_CLKPWR_USBCTRL_PU_ADD
 
- LPC32XX_CLKPWR_USBCTRL_USBDVND_EN
 
- LPC32XX_CLKPWR_USBCTRL_USBHSTND_EN
 
- LPC32XX_CLKPWR_USBCTRL_USBI2C_EN
 
- LPC32XX_CLKPWR_USBPDIV_PLL_MASK
 
- LPC32XX_CLKPWR_USB_CTRL
 
- LPC32XX_CLKPWR_USB_DIV
 
- LPC32XX_CLKPWR_VFP_CLOCK_ENABLE_BIT
 
- LPC32XX_CLK_ADC
 
- LPC32XX_CLK_ADC_DIV
 
- LPC32XX_CLK_ADC_RTC
 
- LPC32XX_CLK_ARM
 
- LPC32XX_CLK_ARM_VFP
 
- LPC32XX_CLK_CCF_MAX
 
- LPC32XX_CLK_DDRAM
 
- LPC32XX_CLK_DEFINE
 
- LPC32XX_CLK_DMA
 
- LPC32XX_CLK_HCLK
 
- LPC32XX_CLK_HCLK_DIV
 
- LPC32XX_CLK_HCLK_DIV_PERIPH
 
- LPC32XX_CLK_HCLK_PLL
 
- LPC32XX_CLK_HSTIMER
 
- LPC32XX_CLK_HW_MAX
 
- LPC32XX_CLK_I2C1
 
- LPC32XX_CLK_I2C2
 
- LPC32XX_CLK_I2S0
 
- LPC32XX_CLK_I2S1
 
- LPC32XX_CLK_IRDA
 
- LPC32XX_CLK_KEY
 
- LPC32XX_CLK_LCD
 
- LPC32XX_CLK_LCD_DIV
 
- LPC32XX_CLK_LCD_GATE
 
- LPC32XX_CLK_MAC
 
- LPC32XX_CLK_MAX
 
- LPC32XX_CLK_MCPWM
 
- LPC32XX_CLK_MLC
 
- LPC32XX_CLK_OSC
 
- LPC32XX_CLK_PARENTS_MAX
 
- LPC32XX_CLK_PERIPH
 
- LPC32XX_CLK_PERIPH_ARM_MUX
 
- LPC32XX_CLK_PERIPH_HCLK_MUX
 
- LPC32XX_CLK_PLL397X
 
- LPC32XX_CLK_PM_BASE
 
- LPC32XX_CLK_PWM1
 
- LPC32XX_CLK_PWM1_DIV
 
- LPC32XX_CLK_PWM1_GATE
 
- LPC32XX_CLK_PWM1_MUX
 
- LPC32XX_CLK_PWM2
 
- LPC32XX_CLK_PWM2_DIV
 
- LPC32XX_CLK_PWM2_GATE
 
- LPC32XX_CLK_PWM2_MUX
 
- LPC32XX_CLK_RTC
 
- LPC32XX_CLK_SD
 
- LPC32XX_CLK_SD_DIV
 
- LPC32XX_CLK_SD_GATE
 
- LPC32XX_CLK_SLC
 
- LPC32XX_CLK_SPI1
 
- LPC32XX_CLK_SPI2
 
- LPC32XX_CLK_SSP0
 
- LPC32XX_CLK_SSP1
 
- LPC32XX_CLK_SYS
 
- LPC32XX_CLK_SYSCLK_ARM_MUX
 
- LPC32XX_CLK_SYSCLK_HCLK_MUX
 
- LPC32XX_CLK_SYSCLK_PERIPH_MUX
 
- LPC32XX_CLK_TEST1
 
- LPC32XX_CLK_TEST1_GATE
 
- LPC32XX_CLK_TEST1_MUX
 
- LPC32XX_CLK_TEST2
 
- LPC32XX_CLK_TEST2_GATE
 
- LPC32XX_CLK_TEST2_MUX
 
- LPC32XX_CLK_TIMER0
 
- LPC32XX_CLK_TIMER1
 
- LPC32XX_CLK_TIMER2
 
- LPC32XX_CLK_TIMER3
 
- LPC32XX_CLK_TIMER4
 
- LPC32XX_CLK_TIMER5
 
- LPC32XX_CLK_UART3
 
- LPC32XX_CLK_UART3_DIV
 
- LPC32XX_CLK_UART3_GATE
 
- LPC32XX_CLK_UART3_MUX
 
- LPC32XX_CLK_UART4
 
- LPC32XX_CLK_UART4_DIV
 
- LPC32XX_CLK_UART4_GATE
 
- LPC32XX_CLK_UART4_MUX
 
- LPC32XX_CLK_UART5
 
- LPC32XX_CLK_UART5_DIV
 
- LPC32XX_CLK_UART5_GATE
 
- LPC32XX_CLK_UART5_MUX
 
- LPC32XX_CLK_UART6
 
- LPC32XX_CLK_UART6_DIV
 
- LPC32XX_CLK_UART6_GATE
 
- LPC32XX_CLK_UART6_MUX
 
- LPC32XX_CLK_USB
 
- LPC32XX_CLK_USB_AHB
 
- LPC32XX_CLK_USB_DEV
 
- LPC32XX_CLK_USB_DIV
 
- LPC32XX_CLK_USB_DIV_DIV
 
- LPC32XX_CLK_USB_DIV_GATE
 
- LPC32XX_CLK_USB_HOST
 
- LPC32XX_CLK_USB_I2C
 
- LPC32XX_CLK_USB_OFFSET
 
- LPC32XX_CLK_USB_OTG
 
- LPC32XX_CLK_USB_PLL
 
- LPC32XX_CLK_WDOG
 
- LPC32XX_CLK_XTAL
 
- LPC32XX_CLK_XTAL_32K
 
- LPC32XX_CLK__NULL
 
- LPC32XX_CLOCK_OSC_FREQ
 
- LPC32XX_DEBUG_CTRL_BASE
 
- LPC32XX_DEFINE_CLK
 
- LPC32XX_DEFINE_COMPOSITE
 
- LPC32XX_DEFINE_DIV
 
- LPC32XX_DEFINE_FIXED
 
- LPC32XX_DEFINE_GATE
 
- LPC32XX_DEFINE_MUX
 
- LPC32XX_DEFINE_PLL
 
- LPC32XX_DEFINE_PLL_OPS
 
- LPC32XX_DEFINE_USB
 
- LPC32XX_DEF_BUS_RATE
 
- LPC32XX_DMA_BASE
 
- LPC32XX_DMA_DATA_SIZE
 
- LPC32XX_DMA_TIMEOUT
 
- LPC32XX_ECC_SAVE_SIZE
 
- LPC32XX_EMC_BASE
 
- LPC32XX_EMC_CS0_BASE
 
- LPC32XX_EMC_CS1_BASE
 
- LPC32XX_EMC_CS2_BASE
 
- LPC32XX_EMC_CS3_BASE
 
- LPC32XX_EMC_DYCS0_BASE
 
- LPC32XX_EMC_DYCS1_BASE
 
- LPC32XX_EMC_STATUS_BUSY
 
- LPC32XX_EMC_STATUS_OFFS
 
- LPC32XX_EMC_STATUS_SELF_RFSH
 
- LPC32XX_ETB_CFG_BASE
 
- LPC32XX_ETB_DATA_BASE
 
- LPC32XX_ETHERNET_BASE
 
- LPC32XX_FABAPB_SIZE
 
- LPC32XX_FABAPB_START
 
- LPC32XX_GPIO_BASE
 
- LPC32XX_GPIO_P0_DIR_CLR
 
- LPC32XX_GPIO_P0_DIR_SET
 
- LPC32XX_GPIO_P0_DIR_STATE
 
- LPC32XX_GPIO_P0_GRP
 
- LPC32XX_GPIO_P0_INP_STATE
 
- LPC32XX_GPIO_P0_MAX
 
- LPC32XX_GPIO_P0_MUX_CLR
 
- LPC32XX_GPIO_P0_MUX_SET
 
- LPC32XX_GPIO_P0_MUX_STATE
 
- LPC32XX_GPIO_P0_OUTP_CLR
 
- LPC32XX_GPIO_P0_OUTP_SET
 
- LPC32XX_GPIO_P0_OUTP_STATE
 
- LPC32XX_GPIO_P1_DIR_CLR
 
- LPC32XX_GPIO_P1_DIR_SET
 
- LPC32XX_GPIO_P1_DIR_STATE
 
- LPC32XX_GPIO_P1_GRP
 
- LPC32XX_GPIO_P1_INP_STATE
 
- LPC32XX_GPIO_P1_MAX
 
- LPC32XX_GPIO_P1_MUX_CLR
 
- LPC32XX_GPIO_P1_MUX_SET
 
- LPC32XX_GPIO_P1_MUX_STATE
 
- LPC32XX_GPIO_P1_OUTP_CLR
 
- LPC32XX_GPIO_P1_OUTP_SET
 
- LPC32XX_GPIO_P1_OUTP_STATE
 
- LPC32XX_GPIO_P2_DIR_CLR
 
- LPC32XX_GPIO_P2_DIR_SET
 
- LPC32XX_GPIO_P2_DIR_STATE
 
- LPC32XX_GPIO_P2_GRP
 
- LPC32XX_GPIO_P2_INP_STATE
 
- LPC32XX_GPIO_P2_MAX
 
- LPC32XX_GPIO_P2_MUX_CLR
 
- LPC32XX_GPIO_P2_MUX_SET
 
- LPC32XX_GPIO_P2_MUX_STATE
 
- LPC32XX_GPIO_P2_OUTP_CLR
 
- LPC32XX_GPIO_P2_OUTP_SET
 
- LPC32XX_GPIO_P3_GRP
 
- LPC32XX_GPIO_P3_INP_STATE
 
- LPC32XX_GPIO_P3_MAX
 
- LPC32XX_GPIO_P3_MUX_CLR
 
- LPC32XX_GPIO_P3_MUX_SET
 
- LPC32XX_GPIO_P3_MUX_STATE
 
- LPC32XX_GPIO_P3_OUTP_CLR
 
- LPC32XX_GPIO_P3_OUTP_SET
 
- LPC32XX_GPIO_P3_OUTP_STATE
 
- LPC32XX_GPIO_P_MUX_CLR
 
- LPC32XX_GPIO_P_MUX_SET
 
- LPC32XX_GPIO_P_MUX_STATE
 
- LPC32XX_GPI_P3_GRP
 
- LPC32XX_GPI_P3_MAX
 
- LPC32XX_GPO_P3_GRP
 
- LPC32XX_GPO_P3_MAX
 
- LPC32XX_HSTIM_BASE
 
- LPC32XX_HSUART_CONSOLE
 
- LPC32XX_HSUART_CTRL
 
- LPC32XX_HSUART_FIFO
 
- LPC32XX_HSUART_IIR
 
- LPC32XX_HSUART_LEVEL
 
- LPC32XX_HSUART_RATE
 
- LPC32XX_HSU_BREAK
 
- LPC32XX_HSU_BREAK_DATA
 
- LPC32XX_HSU_BRK_INT
 
- LPC32XX_HSU_ERROR_DATA
 
- LPC32XX_HSU_ERR_INT_EN
 
- LPC32XX_HSU_FE_INT
 
- LPC32XX_HSU_HCTS_EN
 
- LPC32XX_HSU_HCTS_INV
 
- LPC32XX_HSU_HRTS_EN
 
- LPC32XX_HSU_HRTS_INV
 
- LPC32XX_HSU_HRTS_TRIG_16B
 
- LPC32XX_HSU_HRTS_TRIG_32B
 
- LPC32XX_HSU_HRTS_TRIG_48B
 
- LPC32XX_HSU_HRTS_TRIG_8B
 
- LPC32XX_HSU_OFFSET
 
- LPC32XX_HSU_RX_EMPTY
 
- LPC32XX_HSU_RX_INT_EN
 
- LPC32XX_HSU_RX_LEV
 
- LPC32XX_HSU_RX_OE_INT
 
- LPC32XX_HSU_RX_TIMEOUT_INT
 
- LPC32XX_HSU_RX_TL16B
 
- LPC32XX_HSU_RX_TL1B
 
- LPC32XX_HSU_RX_TL32B
 
- LPC32XX_HSU_RX_TL48B
 
- LPC32XX_HSU_RX_TL4B
 
- LPC32XX_HSU_RX_TL8B
 
- LPC32XX_HSU_RX_TRIG_INT
 
- LPC32XX_HSU_TMO_DISABLED
 
- LPC32XX_HSU_TMO_INACT_16B
 
- LPC32XX_HSU_TMO_INACT_4B
 
- LPC32XX_HSU_TMO_INACT_8B
 
- LPC32XX_HSU_TX_INT
 
- LPC32XX_HSU_TX_INT_EN
 
- LPC32XX_HSU_TX_INT_SET
 
- LPC32XX_HSU_TX_LEV
 
- LPC32XX_HSU_TX_TL0B
 
- LPC32XX_HSU_TX_TL16B
 
- LPC32XX_HSU_TX_TL4B
 
- LPC32XX_HSU_TX_TL8B
 
- LPC32XX_HSU_TX_TLEMPTY
 
- LPC32XX_HS_UART1_BASE
 
- LPC32XX_HS_UART2_BASE
 
- LPC32XX_HS_UART7_BASE
 
- LPC32XX_I2C1_BASE
 
- LPC32XX_I2C2_BASE
 
- LPC32XX_I2S0_BASE
 
- LPC32XX_I2S1_BASE
 
- LPC32XX_INTC_ACT_TYPE
 
- LPC32XX_INTC_FIQ
 
- LPC32XX_INTC_MASK
 
- LPC32XX_INTC_POL
 
- LPC32XX_INTC_POLAR
 
- LPC32XX_INTC_RAW
 
- LPC32XX_INTC_RAW_STAT
 
- LPC32XX_INTC_STAT
 
- LPC32XX_INTC_TYPE
 
- LPC32XX_IRAM_BANK_SIZE
 
- LPC32XX_IRAM_BASE
 
- LPC32XX_IROM_BASE
 
- LPC32XX_KSCAN_BASE
 
- LPC32XX_KSCAN_DEB_NUM_DEB_PASS
 
- LPC32XX_KSCAN_FTST_FORCESCANONCE
 
- LPC32XX_KSCAN_FTST_USE32K_CLK
 
- LPC32XX_KSCAN_IRQ_PENDING_CLR
 
- LPC32XX_KSCAN_MSEL_SELECT
 
- LPC32XX_KSCAN_SCOND_IN_IDLE
 
- LPC32XX_KSCAN_SCOND_IN_IRQGEN
 
- LPC32XX_KSCAN_SCOND_IN_SCANONCE
 
- LPC32XX_KSCAN_SCOND_IN_SCAN_MATRIX
 
- LPC32XX_KSCAN_SCTRL_SCAN_DELAY
 
- LPC32XX_KS_DATA
 
- LPC32XX_KS_DEB
 
- LPC32XX_KS_FAST_TST
 
- LPC32XX_KS_IRQ
 
- LPC32XX_KS_MATRIX_DIM
 
- LPC32XX_KS_SCAN_CTL
 
- LPC32XX_KS_STATE_COND
 
- LPC32XX_LCD_BASE
 
- LPC32XX_MAIN_OSC_FREQ
 
- LPC32XX_MIC_BASE
 
- LPC32XX_MLC_BASE
 
- LPC32XX_MODNAME
 
- LPC32XX_MSTIM_BASE
 
- LPC32XX_OTG_I2C_BASE
 
- LPC32XX_PWM1_BASE
 
- LPC32XX_PWM2_BASE
 
- LPC32XX_PWM3_BASE
 
- LPC32XX_PWM4_BASE
 
- LPC32XX_RTC_BASE
 
- LPC32XX_RTC_CTRL
 
- LPC32XX_RTC_CTRL_CNTR_DIS
 
- LPC32XX_RTC_CTRL_MATCH0
 
- LPC32XX_RTC_CTRL_MATCH1
 
- LPC32XX_RTC_CTRL_ONSW_FORCE_HI
 
- LPC32XX_RTC_CTRL_ONSW_MATCH0
 
- LPC32XX_RTC_CTRL_ONSW_MATCH1
 
- LPC32XX_RTC_CTRL_SW_RESET
 
- LPC32XX_RTC_DCOUNT
 
- LPC32XX_RTC_INTSTAT
 
- LPC32XX_RTC_INTSTAT_MATCH0
 
- LPC32XX_RTC_INTSTAT_MATCH1
 
- LPC32XX_RTC_INTSTAT_ONSW
 
- LPC32XX_RTC_KEY
 
- LPC32XX_RTC_KEY_ONSW_LOADVAL
 
- LPC32XX_RTC_MATCH0
 
- LPC32XX_RTC_MATCH1
 
- LPC32XX_RTC_PM_OPS
 
- LPC32XX_RTC_RAM_BASE
 
- LPC32XX_RTC_SRAM
 
- LPC32XX_RTC_UCOUNT
 
- LPC32XX_RT_IRTX6_INV_EN
 
- LPC32XX_RT_IRTX6_INV_MIR_EN
 
- LPC32XX_RT_RX_IRPULSE_3_16_115K
 
- LPC32XX_RT_TX_IRPULSE_3_16_115K
 
- LPC32XX_SD_BASE
 
- LPC32XX_SIC1_BASE
 
- LPC32XX_SIC2_BASE
 
- LPC32XX_SLC_BASE
 
- LPC32XX_SLC_DEV_ECC_BYTES
 
- LPC32XX_SPI1_BASE
 
- LPC32XX_SPI2_BASE
 
- LPC32XX_SSP0_BASE
 
- LPC32XX_SSP1_BASE
 
- LPC32XX_SUART_FIFO_SIZE
 
- LPC32XX_TIMER0_BASE
 
- LPC32XX_TIMER1_BASE
 
- LPC32XX_TIMER2_BASE
 
- LPC32XX_TIMER3_BASE
 
- LPC32XX_TIMER_CCR
 
- LPC32XX_TIMER_CNTR_CAPT_BIT
 
- LPC32XX_TIMER_CNTR_MCR_MTCH
 
- LPC32XX_TIMER_CNTR_MCR_RESET
 
- LPC32XX_TIMER_CNTR_MCR_STOP
 
- LPC32XX_TIMER_CNTR_MTCH_BIT
 
- LPC32XX_TIMER_CNTR_TCR_EN
 
- LPC32XX_TIMER_CNTR_TCR_RESET
 
- LPC32XX_TIMER_CR0
 
- LPC32XX_TIMER_CR1
 
- LPC32XX_TIMER_CR2
 
- LPC32XX_TIMER_CR3
 
- LPC32XX_TIMER_CTCR
 
- LPC32XX_TIMER_EMR
 
- LPC32XX_TIMER_IR
 
- LPC32XX_TIMER_IR_MR0INT
 
- LPC32XX_TIMER_MCR
 
- LPC32XX_TIMER_MCR_MR0I
 
- LPC32XX_TIMER_MCR_MR0R
 
- LPC32XX_TIMER_MCR_MR0S
 
- LPC32XX_TIMER_MR0
 
- LPC32XX_TIMER_MR1
 
- LPC32XX_TIMER_MR2
 
- LPC32XX_TIMER_MR3
 
- LPC32XX_TIMER_PC
 
- LPC32XX_TIMER_PR
 
- LPC32XX_TIMER_TC
 
- LPC32XX_TIMER_TCR
 
- LPC32XX_TIMER_TCR_CEN
 
- LPC32XX_TIMER_TCR_CRST
 
- LPC32XX_TSC_ADCCON_AUTO_EN
 
- LPC32XX_TSC_ADCCON_IRQ_TO_FIFO_4
 
- LPC32XX_TSC_ADCCON_POWER_UP
 
- LPC32XX_TSC_ADCCON_X_SAMPLE_SIZE
 
- LPC32XX_TSC_ADCCON_Y_SAMPLE_SIZE
 
- LPC32XX_TSC_ADCDAT_VALUE_MASK
 
- LPC32XX_TSC_AUX_MAX
 
- LPC32XX_TSC_AUX_MIN
 
- LPC32XX_TSC_AUX_UTR
 
- LPC32XX_TSC_CON
 
- LPC32XX_TSC_DTR
 
- LPC32XX_TSC_DXP
 
- LPC32XX_TSC_FIFO
 
- LPC32XX_TSC_FIFO_NORMALIZE_X_VAL
 
- LPC32XX_TSC_FIFO_NORMALIZE_Y_VAL
 
- LPC32XX_TSC_FIFO_TS_P_LEVEL
 
- LPC32XX_TSC_MAX_X
 
- LPC32XX_TSC_MAX_XY_VAL
 
- LPC32XX_TSC_MAX_Y
 
- LPC32XX_TSC_MIN_X
 
- LPC32XX_TSC_MIN_XY_VAL
 
- LPC32XX_TSC_MIN_Y
 
- LPC32XX_TSC_RTR
 
- LPC32XX_TSC_SEL
 
- LPC32XX_TSC_SEL_DEFVAL
 
- LPC32XX_TSC_STAT
 
- LPC32XX_TSC_STAT_FIFO_EMPTY
 
- LPC32XX_TSC_STAT_FIFO_OVRRN
 
- LPC32XX_TSC_TTR
 
- LPC32XX_TSC_UTR
 
- LPC32XX_TS_PM_OPS
 
- LPC32XX_TTY_NAME
 
- LPC32XX_UART3_BASE
 
- LPC32XX_UART4_BASE
 
- LPC32XX_UART5_BASE
 
- LPC32XX_UART6_BASE
 
- LPC32XX_UARTCTL_CLKMODE
 
- LPC32XX_UARTCTL_CLOOP
 
- LPC32XX_UARTCTL_CTRL
 
- LPC32XX_UART_CLKMODE_AUTO
 
- LPC32XX_UART_CLKMODE_LOAD
 
- LPC32XX_UART_CLKMODE_MASK
 
- LPC32XX_UART_CLKMODE_OFF
 
- LPC32XX_UART_CLKMODE_ON
 
- LPC32XX_UART_CTRL_BASE
 
- LPC32XX_UART_DLL_FIFO
 
- LPC32XX_UART_DLM_IER
 
- LPC32XX_UART_ENABLED_CLKS_ANY
 
- LPC32XX_UART_ENABLED_CLOCK
 
- LPC32XX_UART_ENABLED_CLOCKS
 
- LPC32XX_UART_HDPX_EN
 
- LPC32XX_UART_IIR_FCR
 
- LPC32XX_UART_IRRX6_INV_EN
 
- LPC32XX_UART_LCR
 
- LPC32XX_UART_LSR
 
- LPC32XX_UART_MODEM_CTRL
 
- LPC32XX_UART_MODEM_STATUS
 
- LPC32XX_UART_RXLEV
 
- LPC32XX_UART_U3_MD_CTRL_EN
 
- LPC32XX_UART_U5_ROUTE_TO_USB
 
- LPC32XX_UART_UART6_IRDAMOD_BYPASS
 
- LPC32XX_USBH_BASE
 
- LPC32XX_USB_BASE
 
- LPC32XX_USB_CLK_AHB
 
- LPC32XX_USB_CLK_CTRL
 
- LPC32XX_USB_CLK_DEVICE
 
- LPC32XX_USB_CLK_HOST
 
- LPC32XX_USB_CLK_I2C
 
- LPC32XX_USB_CLK_MAX
 
- LPC32XX_USB_CLK_OTG
 
- LPC32XX_USB_CLK_STS
 
- LPC32XX_USB_OTG_AHB_M_CLOCK_ON
 
- LPC32XX_USB_OTG_BASE
 
- LPC32XX_USB_OTG_CLK_CTRL
 
- LPC32XX_USB_OTG_CLK_STAT
 
- LPC32XX_USB_OTG_DEV_CLOCK_ON
 
- LPC32XX_USB_OTG_HOST_CLOCK_ON
 
- LPC32XX_USB_OTG_I2C_CLOCK_ON
 
- LPC32XX_USB_OTG_OTG_CLOCK_ON
 
- LPC32XX_WDTIM_BASE
 
- LPC43XX_RGU_M0APP_RST
 
- LPC43XX_RGU_M0SUB_RST
 
- LPC5
 
- LPC6
 
- LPC7
 
- LPC8
 
- LPCAREFUL
 
- LPCHAR
 
- LPCHC_DESC
 
- LPCLK_CTRL
 
- LPCPD_MARK
 
- LPCPLUS_DESC
 
- LPCR_AIL
 
- LPCR_AIL_0
 
- LPCR_AIL_3
 
- LPCR_DPFD
 
- LPCR_DPFD_SH
 
- LPCR_GTSE
 
- LPCR_HDICE
 
- LPCR_HEIC
 
- LPCR_HR
 
- LPCR_HVICE
 
- LPCR_ILE
 
- LPCR_ISL
 
- LPCR_LD
 
- LPCR_LPES
 
- LPCR_LPES0
 
- LPCR_LPES1
 
- LPCR_LPES_SH
 
- LPCR_MER
 
- LPCR_MER_SH
 
- LPCR_ONL
 
- LPCR_PECE
 
- LPCR_PECE0
 
- LPCR_PECE1
 
- LPCR_PECE2
 
- LPCR_PECEDH
 
- LPCR_PECEDP
 
- LPCR_PECE_HVEE
 
- LPCR_RMI
 
- LPCR_RMLS
 
- LPCR_RMLS_SH
 
- LPCR_TC
 
- LPCR_UPRT
 
- LPCR_VC_SH
 
- LPCR_VPM0
 
- LPCR_VPM1
 
- LPCR_VRMASD
 
- LPCR_VRMASD_SH
 
- LPCR_VRMA_L
 
- LPCR_VRMA_LP0
 
- LPCR_VRMA_LP1
 
- LPC_3400
 
- LPC_3420
 
- LPC_3450
 
- LPC_5220_FAST
 
- LPC_5220_NORMAL
 
- LPC_6300ESB
 
- LPC_631XESB
 
- LPC_9S
 
- LPC_APL
 
- LPC_AVN
 
- LPC_BAYTRAIL
 
- LPC_BRASWELL
 
- LPC_BRIDGE
 
- LPC_BUFFER_EMPTY
 
- LPC_BUFFER_LOW
 
- LPC_CENTERTON
 
- LPC_CICH
 
- LPC_CLKRUN_EN
 
- LPC_CLK_PAD_ENABLE
 
- LPC_CLRT_LOAD_COLLISION_WINDOW
 
- LPC_CLRT_LOAD_RETRY_MAX
 
- LPC_CNTRL_OFFSET
 
- LPC_COLETO
 
- LPC_COMMAND_FULLDUPLEX
 
- LPC_COMMAND_PASSRUNTFRAME
 
- LPC_COMMAND_PASSRXFILTER
 
- LPC_COMMAND_REG_RESET
 
- LPC_COMMAND_RMII
 
- LPC_COMMAND_RXENABLE
 
- LPC_COMMAND_RXRESET
 
- LPC_COMMAND_TXENABLE
 
- LPC_COMMAND_TXFLOWCONTROL
 
- LPC_COMMAND_TXRESET
 
- LPC_COUGARMOUNTAIN
 
- LPC_CPT
 
- LPC_CPTD
 
- LPC_CPTM
 
- LPC_D6_FAST
 
- LPC_D6_NORMAL
 
- LPC_DH89XXCC
 
- LPC_ENET_CLRT
 
- LPC_ENET_COMMAND
 
- LPC_ENET_FLOWCONTROLCOUNTER
 
- LPC_ENET_FLOWCONTROLSTATUS
 
- LPC_ENET_HASHFILTERH
 
- LPC_ENET_HASHFILTERL
 
- LPC_ENET_INTCLEAR
 
- LPC_ENET_INTENABLE
 
- LPC_ENET_INTSET
 
- LPC_ENET_INTSTATUS
 
- LPC_ENET_IPGR
 
- LPC_ENET_IPGT
 
- LPC_ENET_MAC1
 
- LPC_ENET_MAC2
 
- LPC_ENET_MADR
 
- LPC_ENET_MAXF
 
- LPC_ENET_MCFG
 
- LPC_ENET_MCMD
 
- LPC_ENET_MIND
 
- LPC_ENET_MRDD
 
- LPC_ENET_MWTD
 
- LPC_ENET_POWERDOWN
 
- LPC_ENET_RSV
 
- LPC_ENET_RXCONSUMEINDEX
 
- LPC_ENET_RXDESCRIPTOR
 
- LPC_ENET_RXDESCRIPTORNUMBER
 
- LPC_ENET_RXFILTERWOLCLEAR
 
- LPC_ENET_RXFILTERWOLSTATUS
 
- LPC_ENET_RXFILTER_CTRL
 
- LPC_ENET_RXPRODUCEINDEX
 
- LPC_ENET_RXSTATUS
 
- LPC_ENET_SA0
 
- LPC_ENET_SA1
 
- LPC_ENET_SA2
 
- LPC_ENET_STATUS
 
- LPC_ENET_SUPP
 
- LPC_ENET_TEST
 
- LPC_ENET_TSV0
 
- LPC_ENET_TSV1
 
- LPC_ENET_TXCONSUMEINDEX
 
- LPC_ENET_TXDESCRIPTOR
 
- LPC_ENET_TXDESCRIPTORNUMBER
 
- LPC_ENET_TXPRODUCEINDEX
 
- LPC_ENET_TXSTATUS
 
- LPC_EP80579
 
- LPC_FCCR_MIRRORCOUNTER
 
- LPC_FCCR_MIRRORCOUNTERCURRENT
 
- LPC_FCCR_PAUSETIMER
 
- LPC_GLK
 
- LPC_H55
 
- LPC_H57
 
- LPC_HICR0
 
- LPC_HICR0_LPC1E
 
- LPC_HICR0_LPC2E
 
- LPC_HICR0_LPC3E
 
- LPC_HICR2
 
- LPC_HICR2_IBFIF1
 
- LPC_HICR2_IBFIF2
 
- LPC_HICR2_IBFIF3
 
- LPC_HICR4
 
- LPC_HICR4_KCSENBL
 
- LPC_HICR4_LADR12AS
 
- LPC_HICRB
 
- LPC_HICRB_IBFIF4
 
- LPC_HICRB_LPC4E
 
- LPC_HM55
 
- LPC_HM57
 
- LPC_ICH
 
- LPC_ICH0
 
- LPC_ICH10
 
- LPC_ICH10D
 
- LPC_ICH10DO
 
- LPC_ICH10R
 
- LPC_ICH2
 
- LPC_ICH2M
 
- LPC_ICH3
 
- LPC_ICH3M
 
- LPC_ICH4
 
- LPC_ICH4M
 
- LPC_ICH5
 
- LPC_ICH6
 
- LPC_ICH6M
 
- LPC_ICH6W
 
- LPC_ICH7
 
- LPC_ICH7DH
 
- LPC_ICH7M
 
- LPC_ICH7MDH
 
- LPC_ICH8
 
- LPC_ICH8DH
 
- LPC_ICH8DO
 
- LPC_ICH8M
 
- LPC_ICH8ME
 
- LPC_ICH9
 
- LPC_ICH9DH
 
- LPC_ICH9DO
 
- LPC_ICH9M
 
- LPC_ICH9ME
 
- LPC_ICH9R
 
- LPC_ICH_H
 
- LPC_IDR1
 
- LPC_IDR2
 
- LPC_IDR3
 
- LPC_IDR4
 
- LPC_IPGR_LOAD_PART1
 
- LPC_IPGR_LOAD_PART2
 
- LPC_IPGT_LOAD
 
- LPC_ITC
 
- LPC_LADR12H
 
- LPC_LADR12L
 
- LPC_LADR3H
 
- LPC_LADR3L
 
- LPC_LADR4
 
- LPC_LEWISBURG
 
- LPC_LPA_LSB_OFF
 
- LPC_LPA_MSB_OFF
 
- LPC_LPA_START_OFF
 
- LPC_LPT
 
- LPC_LPT_LP
 
- LPC_LPT_LSB_OFF
 
- LPC_LPT_MSB_OFF
 
- LPC_LPT_START_OFF
 
- LPC_MAC1_LOOPBACK
 
- LPC_MAC1_PASS_ALL_RX_FRAMES
 
- LPC_MAC1_RECV_ENABLE
 
- LPC_MAC1_RESET_MCS_RX
 
- LPC_MAC1_RESET_MCS_TX
 
- LPC_MAC1_RESET_RX
 
- LPC_MAC1_RESET_TX
 
- LPC_MAC1_RX_FLOW_CONTROL
 
- LPC_MAC1_SIMULATION_RESET
 
- LPC_MAC1_SOFT_RESET
 
- LPC_MAC1_TX_FLOW_CONTROL
 
- LPC_MAC2_AUTO_DETECT_PAD_ENABLE
 
- LPC_MAC2_BACK_PRESSURE
 
- LPC_MAC2_CRC_ENABLE
 
- LPC_MAC2_DELAYED_CRC
 
- LPC_MAC2_EXCESS_DEFER
 
- LPC_MAC2_FRAME_LENGTH_CHECKING
 
- LPC_MAC2_FULL_DUPLEX
 
- LPC_MAC2_HUGH_LENGTH_CHECKING
 
- LPC_MAC2_LONG_PREAMBLE_ENFORCEMENT
 
- LPC_MAC2_NO_BACKOFF
 
- LPC_MAC2_PAD_CRC_ENABLE
 
- LPC_MAC2_PURE_PREAMBLE_ENFORCEMENT
 
- LPC_MAC2_VLAN_PAD_ENABLE
 
- LPC_MACINT_RXDONEINTEN
 
- LPC_MACINT_RXERRORONINT
 
- LPC_MACINT_RXFINISHEDINTEN
 
- LPC_MACINT_RXOVERRUNINTEN
 
- LPC_MACINT_SOFTINTEN
 
- LPC_MACINT_TXDONEINTEN
 
- LPC_MACINT_TXERRORINTEN
 
- LPC_MACINT_TXFINISHEDINTEN
 
- LPC_MACINT_TXUNDERRUNINTEN
 
- LPC_MACINT_WAKEUPINTEN
 
- LPC_MADR_PHY_0ADDRESS
 
- LPC_MADR_REGISTER_ADDRESS
 
- LPC_MAXF_LOAD_MAX_FRAME_LEN
 
- LPC_MAX_DWIDTH
 
- LPC_MAX_WAITCNT
 
- LPC_MCFG_CLOCK_HOST_DIV_10
 
- LPC_MCFG_CLOCK_HOST_DIV_14
 
- LPC_MCFG_CLOCK_HOST_DIV_20
 
- LPC_MCFG_CLOCK_HOST_DIV_28
 
- LPC_MCFG_CLOCK_HOST_DIV_4
 
- LPC_MCFG_CLOCK_HOST_DIV_6
 
- LPC_MCFG_CLOCK_HOST_DIV_8
 
- LPC_MCFG_CLOCK_SELECT
 
- LPC_MCFG_RESET_MII_MGMT
 
- LPC_MCFG_SCAN_INCREMENT
 
- LPC_MCFG_SUPPRESS_PREAMBLE
 
- LPC_MCMD_READ
 
- LPC_MCMD_SCAN
 
- LPC_MIND_BUSY
 
- LPC_MIND_MII_LINK_FAIL
 
- LPC_MIND_NOT_VALID
 
- LPC_MIND_SCANNING
 
- LPC_MRDD_READ_MASK
 
- LPC_MWDT_WRITE
 
- LPC_N
 
- LPC_NM10
 
- LPC_NO_RESOURCE
 
- LPC_NSEC_PERWAIT
 
- LPC_ODR1
 
- LPC_ODR2
 
- LPC_ODR3
 
- LPC_ODR4
 
- LPC_P
 
- LPC_P55
 
- LPC_PADS_ENABLE
 
- LPC_PBG
 
- LPC_PCH
 
- LPC_PCHM
 
- LPC_PCHMSFF
 
- LPC_PEROP_WAITCNT
 
- LPC_PM55
 
- LPC_POWERDOWN_MACAHB
 
- LPC_PPT
 
- LPC_Q57
 
- LPC_QM57
 
- LPC_QS57
 
- LPC_QUARK_X1000
 
- LPC_READ_REG
 
- LPC_REG_ADDR
 
- LPC_REG_CMD
 
- LPC_REG_CMD_OP
 
- LPC_REG_CMD_SAMEADDR
 
- LPC_REG_OP_LEN
 
- LPC_REG_OP_STATUS
 
- LPC_REG_OP_STATUS_FINISHED
 
- LPC_REG_OP_STATUS_IDLE
 
- LPC_REG_RDATA
 
- LPC_REG_STARTUP_SIGNAL
 
- LPC_REG_STARTUP_SIGNAL_START
 
- LPC_REG_WDATA
 
- LPC_RSV_BROADCAST
 
- LPC_RSV_CARRIER_EVNT_PREVIOUS_SEEN
 
- LPC_RSV_CONTROL_FRAME
 
- LPC_RSV_CRC_ERROR
 
- LPC_RSV_DRIBBLE_NIBBLE
 
- LPC_RSV_LENGTH_CHECK_ERROR
 
- LPC_RSV_LENGTH_OUT_OF_RANGE
 
- LPC_RSV_MULTICAST
 
- LPC_RSV_PAUSE
 
- LPC_RSV_RECEIVED_BYTE_COUNT
 
- LPC_RSV_RECEIVE_CODE_VIOLATION
 
- LPC_RSV_RECEIVE_OK
 
- LPC_RSV_RXDV_EVENT_IGNORED
 
- LPC_RSV_RXDV_EVENT_PREVIOUSLY_SEEN
 
- LPC_RSV_UNSUPPORTED_OPCODE
 
- LPC_RSV_VLAN
 
- LPC_RXFLTRWSTS_MAGICPACKETENWOL
 
- LPC_RXFLTRWSTS_MAGICPACKETWOL
 
- LPC_RXFLTRWSTS_RXFILTERENWOL
 
- LPC_RXFLTRWSTS_RXFILTERWOL
 
- LPC_RXFLTRW_ACCEPTPERFECT
 
- LPC_RXFLTRW_ACCEPTUBROADCAST
 
- LPC_RXFLTRW_ACCEPTUMULTICAST
 
- LPC_RXFLTRW_ACCEPTUMULTICASTHASH
 
- LPC_RXFLTRW_ACCEPTUNICAST
 
- LPC_RXFLTRW_ACCEPTUNICASTHASH
 
- LPC_SCH
 
- LPC_SKIP_RESOURCE
 
- LPC_SPEAKING
 
- LPC_STATUS_RXACTIVE
 
- LPC_STATUS_TXACTIVE
 
- LPC_STR1
 
- LPC_STR2
 
- LPC_STR3
 
- LPC_STR4
 
- LPC_SUPP_RESET_RMII
 
- LPC_SUPP_SPEED
 
- LPC_TEST_BACKPRESSURE
 
- LPC_TEST_PAUSE
 
- LPC_TEST_SHORTCUT_PAUSE_QUANTA
 
- LPC_TSV0_BACKPRESSURE
 
- LPC_TSV0_BROADCAST
 
- LPC_TSV0_CONTROL_FRAME
 
- LPC_TSV0_CRC_ERROR
 
- LPC_TSV0_DONE
 
- LPC_TSV0_ESCESSIVE_COLLISION
 
- LPC_TSV0_ESCESSIVE_DEFER
 
- LPC_TSV0_GIANT
 
- LPC_TSV0_LATE_COLLISION
 
- LPC_TSV0_LENGTH_CHECK_ERROR
 
- LPC_TSV0_LENGTH_OUT_OF_RANGE
 
- LPC_TSV0_MULTICAST
 
- LPC_TSV0_PACKET_DEFER
 
- LPC_TSV0_PAUSE
 
- LPC_TSV0_TOTAL_BYTES
 
- LPC_TSV0_UNDERRUN
 
- LPC_TSV0_VLAN
 
- LPC_TSV1_COLLISION_COUNT
 
- LPC_TSV1_TRANSMIT_BYTE_COUNT
 
- LPC_WBG
 
- LPC_WDT_FLAG_OFF
 
- LPC_WDT_OFF
 
- LPC_WPT_LP
 
- LPC_WRITE_REG
 
- LPD
 
- LPD270_AC97_IRQ
 
- LPD270_CONTROL
 
- LPD270_CPLD_PHYS
 
- LPD270_CPLD_REG
 
- LPD270_CPLD_REVISION
 
- LPD270_CPLD_SIZE
 
- LPD270_CPLD_VIRT
 
- LPD270_EEPROM_SPI_ITF
 
- LPD270_EGPIO
 
- LPD270_ETHERNET_IRQ
 
- LPD270_ETH_PHYS
 
- LPD270_INT_AC97
 
- LPD270_INT_ETHERNET
 
- LPD270_INT_MASK
 
- LPD270_INT_STATUS
 
- LPD270_INT_USBC
 
- LPD270_IRQ
 
- LPD270_MODE_PINS
 
- LPD270_NR_IRQS
 
- LPD270_PERIPHERAL0
 
- LPD270_PERIPHERAL1
 
- LPD270_USBC_IRQ
 
- LPDDR
 
- LPDDR2
 
- LPDDR2_MODE_REG_CFG
 
- LPDDR2_MODE_REG_DATA
 
- LPDDR2_MR4_TEMP_SHIFT
 
- LPDDR2_NVM_BUF_OVERWRITE
 
- LPDDR2_NVM_BUF_PROGRAM
 
- LPDDR2_NVM_ERASE
 
- LPDDR2_NVM_LOCK
 
- LPDDR2_NVM_SW_OVERWRITE
 
- LPDDR2_NVM_SW_PROGRAM
 
- LPDDR2_NVM_UNLOCK
 
- LPDDR3_EN
 
- LPDDR4_EN
 
- LPDDR_BLOCK_ERASE
 
- LPDDR_BUFF_PROGRAM
 
- LPDDR_ID_ANY
 
- LPDDR_INFO_QUERY
 
- LPDDR_LOCK_BLOCK
 
- LPDDR_MEM_RETRAIN_LATENCY
 
- LPDDR_MFR_ANY
 
- LPDDR_PROG_OTP
 
- LPDDR_READ_BLOCK_LOCK_STATUS
 
- LPDDR_READ_OTP
 
- LPDDR_RESUME
 
- LPDDR_START_EXECUTION
 
- LPDDR_SUSPEND
 
- LPDDR_UNLOCK_BLOCK
 
- LPDDR_WORD_PROGRAM
 
- LPD_LSBUS
 
- LPD_SWITCH
 
- LPD_WDT
 
- LPERCTL
 
- LPERDMAP
 
- LPF
 
- LPFC_ABORT_IOCB
 
- LPFC_ABORT_WAIT
 
- LPFC_ABTS_UNSOL_INT
 
- LPFC_ABTS_UNSOL_RSP
 
- LPFC_ACTIVE_MBOX_WAIT_CNT
 
- LPFC_ACT_INTR_CNT
 
- LPFC_ALIGN_16_BYTE
 
- LPFC_ALIGN_64_BYTE
 
- LPFC_ALPA_MAP_SIZE
 
- LPFC_ASYNC_EVENT_FCF_STATE
 
- LPFC_ASYNC_EVENT_GROUP5
 
- LPFC_ASYNC_EVENT_LINK_STATE
 
- LPFC_ASYNC_LINK_DUPLEX_FULL
 
- LPFC_ASYNC_LINK_DUPLEX_HALF
 
- LPFC_ASYNC_LINK_DUPLEX_NONE
 
- LPFC_ASYNC_LINK_FAULT_LOCAL
 
- LPFC_ASYNC_LINK_FAULT_LR_LRR
 
- LPFC_ASYNC_LINK_FAULT_NONE
 
- LPFC_ASYNC_LINK_FAULT_REMOTE
 
- LPFC_ASYNC_LINK_SPEED_100GBPS
 
- LPFC_ASYNC_LINK_SPEED_100MBPS
 
- LPFC_ASYNC_LINK_SPEED_10GBPS
 
- LPFC_ASYNC_LINK_SPEED_10MBPS
 
- LPFC_ASYNC_LINK_SPEED_1GBPS
 
- LPFC_ASYNC_LINK_SPEED_20GBPS
 
- LPFC_ASYNC_LINK_SPEED_25GBPS
 
- LPFC_ASYNC_LINK_SPEED_40GBPS
 
- LPFC_ASYNC_LINK_SPEED_ZERO
 
- LPFC_ASYNC_LINK_STATUS_DOWN
 
- LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN
 
- LPFC_ASYNC_LINK_STATUS_LOGICAL_UP
 
- LPFC_ASYNC_LINK_STATUS_UP
 
- LPFC_ATTR
 
- LPFC_ATTR_HEX_R
 
- LPFC_ATTR_HEX_RW
 
- LPFC_ATTR_R
 
- LPFC_ATTR_RW
 
- LPFC_ATT_LINK_DOWN
 
- LPFC_ATT_LINK_UP
 
- LPFC_ATT_RESERVED
 
- LPFC_ATT_UNEXP_WWPN
 
- LPFC_BBCR_ATTR_RW
 
- LPFC_BLOCK_GUARD_PROFILES
 
- LPFC_BLOCK_MGMT_IO
 
- LPFC_BMBX
 
- LPFC_BMBX_BIT1_ADDR_HI
 
- LPFC_BMBX_BIT1_ADDR_LO
 
- LPFC_BPL_SIZE
 
- LPFC_BSG_DMP_MBX_ALL
 
- LPFC_BSG_DMP_MBX_RD_BUF
 
- LPFC_BSG_DMP_MBX_RD_MBX
 
- LPFC_BSG_DMP_MBX_WR_BUF
 
- LPFC_BSG_DMP_MBX_WR_MBX
 
- LPFC_BSG_MBOX_ABTS
 
- LPFC_BSG_MBOX_DONE
 
- LPFC_BSG_MBOX_HOST
 
- LPFC_BSG_MBOX_IDLE
 
- LPFC_BSG_MBOX_PORT
 
- LPFC_BSG_VENDOR_DIAG_MODE
 
- LPFC_BSG_VENDOR_DIAG_MODE_END
 
- LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK
 
- LPFC_BSG_VENDOR_FORCED_LINK_SPEED
 
- LPFC_BSG_VENDOR_GET_CT_EVENT
 
- LPFC_BSG_VENDOR_GET_MGMT_REV
 
- LPFC_BSG_VENDOR_GET_TRUNK_INFO
 
- LPFC_BSG_VENDOR_LINK_DIAG_TEST
 
- LPFC_BSG_VENDOR_MBOX
 
- LPFC_BSG_VENDOR_MENLO_CMD
 
- LPFC_BSG_VENDOR_MENLO_DATA
 
- LPFC_BSG_VENDOR_RAS_GET_CONFIG
 
- LPFC_BSG_VENDOR_RAS_GET_FWLOG
 
- LPFC_BSG_VENDOR_RAS_GET_LWPD
 
- LPFC_BSG_VENDOR_RAS_SET_CONFIG
 
- LPFC_BSG_VENDOR_SEND_MGMT_RESP
 
- LPFC_BSG_VENDOR_SET_CT_EVENT
 
- LPFC_BUF_RING0
 
- LPFC_BUILD_DISC_LIST
 
- LPFC_CALL_RING_AVAILABLE
 
- LPFC_CFG_TYPE_CURRENT_ACTIVE
 
- LPFC_CFG_TYPE_FACTURY_DEFAULT
 
- LPFC_CFG_TYPE_PERSISTENT_OVERRIDE
 
- LPFC_CHANGE_STATUS_FW_RESET
 
- LPFC_CHANGE_STATUS_NO_RESET_NEEDED
 
- LPFC_CHANGE_STATUS_PCI_RESET
 
- LPFC_CHANGE_STATUS_PHYS_DEV_RESET
 
- LPFC_CHANGE_STATUS_PORT_MIGRATION
 
- LPFC_CHECK_CPU_CNT
 
- LPFC_CHECK_NVMET_IO
 
- LPFC_CHECK_NVMET_RCV
 
- LPFC_CHECK_NVME_IO
 
- LPFC_CHECK_OFF
 
- LPFC_CHECK_PROTECT_GUARD
 
- LPFC_CHECK_PROTECT_REF
 
- LPFC_CHECK_SCSI_IO
 
- LPFC_CLEAR_LA
 
- LPFC_CMD_PER_LUN
 
- LPFC_COPYRIGHT
 
- LPFC_CPUCHECK_SIZE
 
- LPFC_CPU_FIRST_IRQ
 
- LPFC_CPU_MAP_HYPER
 
- LPFC_CPU_MAP_UNASSIGN
 
- LPFC_CQE_DEF_COUNT
 
- LPFC_CQE_EXP_COUNT
 
- LPFC_CQE_SIZE
 
- LPFC_CQID_HI_FIELD_SHIFT
 
- LPFC_CQ_16K_PAGE_SZ
 
- LPFC_CQ_4K_PAGE_SZ
 
- LPFC_CQ_CNT_1024
 
- LPFC_CQ_CNT_256
 
- LPFC_CQ_CNT_512
 
- LPFC_CQ_CNT_WORD7
 
- LPFC_CQ_DEF_MAX_PROC_LIMIT
 
- LPFC_CQ_DEF_THRESHOLD_TO_POLL
 
- LPFC_CQ_MAX_PROC_LIMIT
 
- LPFC_CQ_MAX_THRESHOLD_TO_POLL
 
- LPFC_CQ_MIN_PROC_LIMIT
 
- LPFC_CQ_MIN_THRESHOLD_TO_POLL
 
- LPFC_CQ_NOTIFY_INTRVL
 
- LPFC_CRIT_TEMP
 
- LPFC_CTL_ACC_ALL
 
- LPFC_CTL_ACC_BUF_SIZE
 
- LPFC_CTL_ACC_RD_CMD_ARG
 
- LPFC_CTL_ACC_WR_CMD_ARG
 
- LPFC_CTL_MAX
 
- LPFC_CTL_PDEV_CTL
 
- LPFC_CTL_PDEV_CTL_DD
 
- LPFC_CTL_PDEV_CTL_DDL_RAS
 
- LPFC_CTL_PDEV_CTL_DRST
 
- LPFC_CTL_PDEV_CTL_FRL_ALL
 
- LPFC_CTL_PDEV_CTL_FRL_FC_FCOE
 
- LPFC_CTL_PDEV_CTL_FRL_NIC
 
- LPFC_CTL_PDEV_CTL_FRST
 
- LPFC_CTL_PDEV_CTL_LC
 
- LPFC_CTL_PDEV_CTL_OFFSET
 
- LPFC_CTL_PORT_CTL
 
- LPFC_CTL_PORT_CTL_OFFSET
 
- LPFC_CTL_PORT_EQ_DELAY_OFFSET
 
- LPFC_CTL_PORT_ER1
 
- LPFC_CTL_PORT_ER1_OFFSET
 
- LPFC_CTL_PORT_ER2
 
- LPFC_CTL_PORT_ER2_OFFSET
 
- LPFC_CTL_PORT_SEM
 
- LPFC_CTL_PORT_SEM_OFFSET
 
- LPFC_CTL_PORT_STA
 
- LPFC_CTL_PORT_STA_OFFSET
 
- LPFC_CTX_HOST
 
- LPFC_CTX_LUN
 
- LPFC_CTX_TGT
 
- LPFC_CT_CTX_MAX
 
- LPFC_CT_PREAMBLE
 
- LPFC_DATA_BUF_SIZE
 
- LPFC_DATA_READY
 
- LPFC_DB_LIST_FORMAT
 
- LPFC_DB_RING_FORMAT
 
- LPFC_DCBX_CEE_MODE
 
- LPFC_DEBUG_OUT_LINE_SZ
 
- LPFC_DEBUG_TRC_ENTRY_SIZE
 
- LPFC_DEFAULT_MENLO_SG_SEG_CNT
 
- LPFC_DEFAULT_PAGE_SIZE
 
- LPFC_DEFAULT_SG_SEG_CNT
 
- LPFC_DEFAULT_XPSGL_SIZE
 
- LPFC_DEFERRED_RING_EVENT
 
- LPFC_DEF_DEVLOSS_TMO
 
- LPFC_DEF_IMAX
 
- LPFC_DEF_MRQ_POST
 
- LPFC_DEF_VFN_PER_PFN
 
- LPFC_DELAY_INIT_LINK
 
- LPFC_DELAY_INIT_LINK_INDEFINITELY
 
- LPFC_DELAY_MEM_FREE
 
- LPFC_DEVICE_DATA_POOL_SIZE
 
- LPFC_DFLT_FCF_INDEX
 
- LPFC_DIAG_LOOPBACK_TYPE_DISABLE
 
- LPFC_DIAG_LOOPBACK_TYPE_EXTERNAL_TRUNKED
 
- LPFC_DIAG_LOOPBACK_TYPE_INTERNAL
 
- LPFC_DIAG_LOOPBACK_TYPE_SERDES
 
- LPFC_DIAG_STATE_DIAG_BIT_VALID_CHANGE
 
- LPFC_DIAG_STATE_DIAG_BIT_VALID_NO_CHANGE
 
- LPFC_DISC_AUTH
 
- LPFC_DISC_FLOGI_TMO
 
- LPFC_DISC_IOCB_BUFF_COUNT
 
- LPFC_DISC_TRC_CT
 
- LPFC_DISC_TRC_DISCOVERY
 
- LPFC_DISC_TRC_DSM
 
- LPFC_DISC_TRC_ELS_ALL
 
- LPFC_DISC_TRC_ELS_CMD
 
- LPFC_DISC_TRC_ELS_RSP
 
- LPFC_DISC_TRC_ELS_UNSOL
 
- LPFC_DISC_TRC_MBOX
 
- LPFC_DISC_TRC_MBOX_ALL
 
- LPFC_DISC_TRC_MBOX_VPORT
 
- LPFC_DISC_TRC_NODE
 
- LPFC_DISC_TRC_RPORT
 
- LPFC_DMULT_CONST
 
- LPFC_DMULT_MAX
 
- LPFC_DRB_ACC_ALL
 
- LPFC_DRB_ACC_BUF_SIZE
 
- LPFC_DRB_ACC_RD_CMD_ARG
 
- LPFC_DRB_ACC_WR_CMD_ARG
 
- LPFC_DRB_CQ
 
- LPFC_DRB_EQ
 
- LPFC_DRB_MAX
 
- LPFC_DRB_MQ
 
- LPFC_DRB_RQ
 
- LPFC_DRB_WQ
 
- LPFC_DRIVER_ABORTED
 
- LPFC_DRIVER_HANDLER_NAME
 
- LPFC_DRIVER_NAME
 
- LPFC_DRIVER_VERSION
 
- LPFC_DRQ
 
- LPFC_DRVR_TIMEOUT
 
- LPFC_DUA_MODE
 
- LPFC_DUMPHBASLIM_SIZE
 
- LPFC_DUMPHOSTSLIM_SIZE
 
- LPFC_DUMPSLIQINFO_SIZE
 
- LPFC_DUMP_MULTIXRIPOOL_SIZE
 
- LPFC_DV_RESET
 
- LPFC_ELS
 
- LPFC_ELS_HBQ
 
- LPFC_ELS_ID_DEFAULT
 
- LPFC_ELS_ID_FDISC
 
- LPFC_ELS_ID_FLOGI
 
- LPFC_ELS_ID_LOGO
 
- LPFC_ELS_RING
 
- LPFC_ENABLE_BOTH
 
- LPFC_ENABLE_FCP
 
- LPFC_ENABLE_NVME
 
- LPFC_ENTIRE_FCF_DATABASE
 
- LPFC_EQ
 
- LPFC_EQCQ_DOORBELL
 
- LPFC_EQCQ_SOLICIT_ENABLE_OFF
 
- LPFC_EQCQ_SOLICIT_ENABLE_ON
 
- LPFC_EQD_ISR_TRIGGER
 
- LPFC_EQE_DEF_COUNT
 
- LPFC_EQE_SIZE
 
- LPFC_EQE_SIZE_16
 
- LPFC_EQE_SIZE_16B
 
- LPFC_EQE_SIZE_4
 
- LPFC_EQE_SIZE_4B
 
- LPFC_EQID_HI_FIELD_SHIFT
 
- LPFC_EQ_CNT_1024
 
- LPFC_EQ_CNT_2048
 
- LPFC_EQ_CNT_256
 
- LPFC_EQ_CNT_4096
 
- LPFC_EQ_CNT_512
 
- LPFC_EQ_DELAY_MSECS
 
- LPFC_EQ_DELAY_STEP
 
- LPFC_EQ_INTERRUPT
 
- LPFC_EQ_MAX_PROC_LIMIT
 
- LPFC_EQ_NOTIFY_INTRVL
 
- LPFC_EQ_POLL
 
- LPFC_ERATT_POLL_INTERVAL
 
- LPFC_EVENT_ADISC_RCV
 
- LPFC_EVENT_ARRIVAL
 
- LPFC_EVENT_BUSRESET
 
- LPFC_EVENT_CHECK_COND
 
- LPFC_EVENT_DEVBSY
 
- LPFC_EVENT_FABRIC_BUSY
 
- LPFC_EVENT_FCPRDCHKERR
 
- LPFC_EVENT_LOGO_RCV
 
- LPFC_EVENT_LSRJT_RCV
 
- LPFC_EVENT_LUNRESET
 
- LPFC_EVENT_PLOGI_RCV
 
- LPFC_EVENT_PORTINTERR
 
- LPFC_EVENT_PORT_BUSY
 
- LPFC_EVENT_PRLO_RCV
 
- LPFC_EVENT_QFULL
 
- LPFC_EVENT_TGTRESET
 
- LPFC_EVENT_VARQUEDEPTH
 
- LPFC_EVT_CODE_FC_10_GBAUD
 
- LPFC_EVT_CODE_FC_16_GBAUD
 
- LPFC_EVT_CODE_FC_1_GBAUD
 
- LPFC_EVT_CODE_FC_2_GBAUD
 
- LPFC_EVT_CODE_FC_4_GBAUD
 
- LPFC_EVT_CODE_FC_8_GBAUD
 
- LPFC_EVT_CODE_FC_NO_LINK
 
- LPFC_EVT_CODE_LINK_100_MBIT
 
- LPFC_EVT_CODE_LINK_10_GBIT
 
- LPFC_EVT_CODE_LINK_10_MBIT
 
- LPFC_EVT_CODE_LINK_1_GBIT
 
- LPFC_EVT_CODE_LINK_NO_LINK
 
- LPFC_EVT_DEV_LOSS
 
- LPFC_EVT_ELS_RETRY
 
- LPFC_EVT_FASTPATH_MGMT_EVT
 
- LPFC_EVT_KILL
 
- LPFC_EVT_OFFLINE
 
- LPFC_EVT_OFFLINE_PREP
 
- LPFC_EVT_ONLINE
 
- LPFC_EVT_RESET_HBA
 
- LPFC_EVT_WARM_START
 
- LPFC_EXCHANGE_BUSY
 
- LPFC_EXPANDED_PAGE_SIZE
 
- LPFC_EXTENT_LOCAL
 
- LPFC_EXTENT_VERSION_DEFAULT
 
- LPFC_EXTRA_RING
 
- LPFC_EXT_ACC_ALL
 
- LPFC_EXT_ACC_ALLOC
 
- LPFC_EXT_ACC_AVAIL
 
- LPFC_EXT_ACC_BUF_SIZE
 
- LPFC_EXT_ACC_CMD_ARG
 
- LPFC_EXT_ACC_DRIVR
 
- LPFC_EXT_DATA_BDE_COUNT
 
- LPFC_FABRIC_CFG_LINK
 
- LPFC_FABRIC_PORT
 
- LPFC_FC4_TYPE_BITMASK
 
- LPFC_FCF_FLOGI_FAILED
 
- LPFC_FCF_FOV
 
- LPFC_FCF_FPMA
 
- LPFC_FCF_ON_PRI_LIST
 
- LPFC_FCF_PRIORITY
 
- LPFC_FCF_RECORD_WD_CNT
 
- LPFC_FCF_REDISCOVER_WAIT_TMO
 
- LPFC_FCF_SPMA
 
- LPFC_FCOE_FCF_DEF_INDEX
 
- LPFC_FCOE_FCF_GET_FIRST
 
- LPFC_FCOE_FCF_MAC3
 
- LPFC_FCOE_FCF_MAC4
 
- LPFC_FCOE_FCF_MAC5
 
- LPFC_FCOE_FCF_MAP0
 
- LPFC_FCOE_FCF_MAP1
 
- LPFC_FCOE_FCF_MAP2
 
- LPFC_FCOE_FCF_NEXT_NONE
 
- LPFC_FCOE_FIP_PRIORITY
 
- LPFC_FCOE_FKA_ADV_PER
 
- LPFC_FCOE_IGNORE_VID
 
- LPFC_FCOE_INI_MODE
 
- LPFC_FCOE_MAX_RCV_SIZE
 
- LPFC_FCOE_NULL_VID
 
- LPFC_FCOE_TGT_MODE
 
- LPFC_FCP_CDB_LEN
 
- LPFC_FCP_MQ_THRESHOLD_DEF
 
- LPFC_FCP_MQ_THRESHOLD_MAX
 
- LPFC_FCP_MQ_THRESHOLD_MIN
 
- LPFC_FCP_RING
 
- LPFC_FCP_SCHED_BY_CPU
 
- LPFC_FCP_SCHED_BY_HDWQ
 
- LPFC_FC_FCOE
 
- LPFC_FC_LA_EVENT_TYPE_FC_LINK
 
- LPFC_FC_LA_EVENT_TYPE_SHARED_LINK
 
- LPFC_FC_LA_FAULT_LOCAL
 
- LPFC_FC_LA_FAULT_NONE
 
- LPFC_FC_LA_FAULT_REMOTE
 
- LPFC_FC_LA_SPEED_10G
 
- LPFC_FC_LA_SPEED_128G
 
- LPFC_FC_LA_SPEED_16G
 
- LPFC_FC_LA_SPEED_1G
 
- LPFC_FC_LA_SPEED_256G
 
- LPFC_FC_LA_SPEED_2G
 
- LPFC_FC_LA_SPEED_32G
 
- LPFC_FC_LA_SPEED_4G
 
- LPFC_FC_LA_SPEED_64G
 
- LPFC_FC_LA_SPEED_8G
 
- LPFC_FC_LA_SPEED_UNKNOWN
 
- LPFC_FC_LA_TOP_FCAL
 
- LPFC_FC_LA_TOP_INTERNAL_LOOP
 
- LPFC_FC_LA_TOP_P2P
 
- LPFC_FC_LA_TOP_SERDES_LOOP
 
- LPFC_FC_LA_TOP_UNKOWN
 
- LPFC_FC_LA_TYPE_LINK_DOWN
 
- LPFC_FC_LA_TYPE_LINK_UP
 
- LPFC_FC_LA_TYPE_MDS_LINK_DOWN
 
- LPFC_FC_LA_TYPE_MDS_LOOPBACK
 
- LPFC_FC_LA_TYPE_NO_HARD_ALPA
 
- LPFC_FC_LA_TYPE_TRUNKING_EVENT
 
- LPFC_FC_LA_TYPE_UNEXP_WWPN
 
- LPFC_FDISC
 
- LPFC_FDMI1_HBA_ATTR
 
- LPFC_FDMI1_PORT_ATTR
 
- LPFC_FDMI2_HBA_ATTR
 
- LPFC_FDMI2_PORT_ATTR
 
- LPFC_FDMI2_SMART_ATTR
 
- LPFC_FDMI_HBA_ATTR_bios_state
 
- LPFC_FDMI_HBA_ATTR_bios_ver
 
- LPFC_FDMI_HBA_ATTR_ct_len
 
- LPFC_FDMI_HBA_ATTR_description
 
- LPFC_FDMI_HBA_ATTR_drvr_ver
 
- LPFC_FDMI_HBA_ATTR_fabric_wwnn
 
- LPFC_FDMI_HBA_ATTR_fmw_ver
 
- LPFC_FDMI_HBA_ATTR_hdw_ver
 
- LPFC_FDMI_HBA_ATTR_manufacturer
 
- LPFC_FDMI_HBA_ATTR_model
 
- LPFC_FDMI_HBA_ATTR_num_ports
 
- LPFC_FDMI_HBA_ATTR_os_ver
 
- LPFC_FDMI_HBA_ATTR_rom_ver
 
- LPFC_FDMI_HBA_ATTR_sn
 
- LPFC_FDMI_HBA_ATTR_symbolic_name
 
- LPFC_FDMI_HBA_ATTR_vendor_id
 
- LPFC_FDMI_HBA_ATTR_vendor_info
 
- LPFC_FDMI_HBA_ATTR_wwnn
 
- LPFC_FDMI_MAX_AE_SIZE
 
- LPFC_FDMI_MAX_RETRY
 
- LPFC_FDMI_NO_SUPPORT
 
- LPFC_FDMI_PORTSTATE_ONLINE
 
- LPFC_FDMI_PORTSTATE_UNKNOWN
 
- LPFC_FDMI_PORTTYPE_NLPORT
 
- LPFC_FDMI_PORTTYPE_NPORT
 
- LPFC_FDMI_PORTTYPE_UNKNOWN
 
- LPFC_FDMI_PORT_ATTR_active_fc4type
 
- LPFC_FDMI_PORT_ATTR_class
 
- LPFC_FDMI_PORT_ATTR_fabric_wwpn
 
- LPFC_FDMI_PORT_ATTR_fc4type
 
- LPFC_FDMI_PORT_ATTR_host_name
 
- LPFC_FDMI_PORT_ATTR_max_frame
 
- LPFC_FDMI_PORT_ATTR_nportid
 
- LPFC_FDMI_PORT_ATTR_num_disc
 
- LPFC_FDMI_PORT_ATTR_os_devname
 
- LPFC_FDMI_PORT_ATTR_port_state
 
- LPFC_FDMI_PORT_ATTR_port_type
 
- LPFC_FDMI_PORT_ATTR_speed
 
- LPFC_FDMI_PORT_ATTR_support_speed
 
- LPFC_FDMI_PORT_ATTR_symbolic_name
 
- LPFC_FDMI_PORT_ATTR_wwnn
 
- LPFC_FDMI_PORT_ATTR_wwpn
 
- LPFC_FDMI_SMART_ATTR_guid
 
- LPFC_FDMI_SMART_ATTR_model
 
- LPFC_FDMI_SMART_ATTR_port_info
 
- LPFC_FDMI_SMART_ATTR_qos
 
- LPFC_FDMI_SMART_ATTR_security
 
- LPFC_FDMI_SMART_ATTR_service
 
- LPFC_FDMI_SMART_ATTR_version
 
- LPFC_FDMI_SUPPORT
 
- LPFC_FIND_BY_EQ
 
- LPFC_FIND_BY_HDWQ
 
- LPFC_FIP_ELS_ID_MASK
 
- LPFC_FIP_ELS_ID_SHIFT
 
- LPFC_FIP_EVENT_TYPE_CVL
 
- LPFC_FIP_EVENT_TYPE_FCF_DEAD
 
- LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD
 
- LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL
 
- LPFC_FIP_EVENT_TYPE_NEW_FCF
 
- LPFC_FLOGI
 
- LPFC_FORCED_LINK_SPEED_NOT_SUPPORTED
 
- LPFC_FORCED_LINK_SPEED_SUPPORTED
 
- LPFC_FP_DRIVER_HANDLER_NAME
 
- LPFC_FP_EQ_MAX_INTR_SEC
 
- LPFC_FW_DUMP
 
- LPFC_FW_DUMP_REQUEST
 
- LPFC_FW_RESET
 
- LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT
 
- LPFC_G7_ASIC_1
 
- LPFC_GCQ
 
- LPFC_HBA_CPU_MAP
 
- LPFC_HBA_ERROR
 
- LPFC_HBA_HDWQ_DEF
 
- LPFC_HBA_HDWQ_MAX
 
- LPFC_HBA_HDWQ_MIN
 
- LPFC_HBA_READY
 
- LPFC_HBQINFO_SIZE
 
- LPFC_HB_MBOX_INTERVAL
 
- LPFC_HB_MBOX_TIMEOUT
 
- LPFC_HDR_BUF_SIZE
 
- LPFC_HDR_TEMPLATE_SIZE
 
- LPFC_HOST_OS_DRIVER_VERSION_SIZE
 
- LPFC_HRQ
 
- LPFC_HST_IMR0
 
- LPFC_HST_IMR1
 
- LPFC_HST_IMR2
 
- LPFC_HST_IMR3
 
- LPFC_HST_IMR4
 
- LPFC_HST_ISCR0
 
- LPFC_HST_ISCR1
 
- LPFC_HST_ISCR2
 
- LPFC_HST_ISCR3
 
- LPFC_HST_ISCR4
 
- LPFC_HST_ISR0
 
- LPFC_HST_ISR1
 
- LPFC_HST_ISR2
 
- LPFC_HST_ISR3
 
- LPFC_HST_ISR4
 
- LPFC_IDIAG_BSG_MBXACC_DP
 
- LPFC_IDIAG_CMD_BARACC_CL
 
- LPFC_IDIAG_CMD_BARACC_RD
 
- LPFC_IDIAG_CMD_BARACC_ST
 
- LPFC_IDIAG_CMD_BARACC_WR
 
- LPFC_IDIAG_CMD_CTLACC_CL
 
- LPFC_IDIAG_CMD_CTLACC_RD
 
- LPFC_IDIAG_CMD_CTLACC_ST
 
- LPFC_IDIAG_CMD_CTLACC_WR
 
- LPFC_IDIAG_CMD_DATA_SIZE
 
- LPFC_IDIAG_CMD_DRBACC_CL
 
- LPFC_IDIAG_CMD_DRBACC_RD
 
- LPFC_IDIAG_CMD_DRBACC_ST
 
- LPFC_IDIAG_CMD_DRBACC_WR
 
- LPFC_IDIAG_CMD_EXTACC_RD
 
- LPFC_IDIAG_CMD_MBXACC_DP
 
- LPFC_IDIAG_CMD_PCICFG_CL
 
- LPFC_IDIAG_CMD_PCICFG_RD
 
- LPFC_IDIAG_CMD_PCICFG_ST
 
- LPFC_IDIAG_CMD_PCICFG_WR
 
- LPFC_IDIAG_CMD_QUEACC_CL
 
- LPFC_IDIAG_CMD_QUEACC_RD
 
- LPFC_IDIAG_CMD_QUEACC_ST
 
- LPFC_IDIAG_CMD_QUEACC_WR
 
- LPFC_IDIAG_CQ
 
- LPFC_IDIAG_EQ
 
- LPFC_IDIAG_MQ
 
- LPFC_IDIAG_OP_RD
 
- LPFC_IDIAG_OP_WR
 
- LPFC_IDIAG_RQ
 
- LPFC_IDIAG_WQ
 
- LPFC_IDX_RSRC_RDY
 
- LPFC_IF6_CQ_DOORBELL
 
- LPFC_IF6_CQ_SOLICIT_ENABLE_OFF
 
- LPFC_IF6_CQ_SOLICIT_ENABLE_ON
 
- LPFC_IF6_EQ_DOORBELL
 
- LPFC_IF6_EQ_INTR_OVERRIDE_OFF
 
- LPFC_IF6_EQ_INTR_OVERRIDE_ON
 
- LPFC_IF6_MQ_DOORBELL
 
- LPFC_IF6_RQ_DOORBELL
 
- LPFC_IF6_WQ_DOORBELL
 
- LPFC_IMAX_THRESHOLD
 
- LPFC_IMR_MASK_ALL
 
- LPFC_INITIALIZE_LINK
 
- LPFC_INIT_MBX_CMDS
 
- LPFC_INIT_START
 
- LPFC_INJERR_APPTAG
 
- LPFC_INJERR_GUARD
 
- LPFC_INJERR_LBA_OFF
 
- LPFC_INJERR_REFTAG
 
- LPFC_INTR_ERROR
 
- LPFC_IO
 
- LPFC_IOCBQ_LOOKUP_INCREMENT
 
- LPFC_IOCB_LIST_CNT
 
- LPFC_IOCB_STATUS_MASK
 
- LPFC_IO_CMD_OUTSTANDING
 
- LPFC_IO_DIF_INSERT
 
- LPFC_IO_DIF_PASS
 
- LPFC_IO_DIF_STRIP
 
- LPFC_IO_FABRIC
 
- LPFC_IO_FCP
 
- LPFC_IO_FOF
 
- LPFC_IO_LIBDFC
 
- LPFC_IO_LOOPBACK
 
- LPFC_IO_NVME
 
- LPFC_IO_NVMET
 
- LPFC_IO_NVME_LS
 
- LPFC_IO_OAS
 
- LPFC_IO_ON_TXCMPLQ
 
- LPFC_IO_WAKE
 
- LPFC_IO_WAKE_TMO
 
- LPFC_ISCR_CLEAR_ALL
 
- LPFC_LBUF_SZ
 
- LPFC_LCB_AMBER
 
- LPFC_LCB_GREEN
 
- LPFC_LCB_OFF
 
- LPFC_LCB_ON
 
- LPFC_LINEAR_BUCKET
 
- LPFC_LINK_DOWN
 
- LPFC_LINK_EVENT_TYPE_PHYSICAL
 
- LPFC_LINK_EVENT_TYPE_VIRTUAL
 
- LPFC_LINK_NUMBER_0
 
- LPFC_LINK_NUMBER_1
 
- LPFC_LINK_NUMBER_2
 
- LPFC_LINK_NUMBER_3
 
- LPFC_LINK_SPEED_10GHZ
 
- LPFC_LINK_SPEED_128GHZ
 
- LPFC_LINK_SPEED_16GHZ
 
- LPFC_LINK_SPEED_1GHZ
 
- LPFC_LINK_SPEED_256GHZ
 
- LPFC_LINK_SPEED_2GHZ
 
- LPFC_LINK_SPEED_32GHZ
 
- LPFC_LINK_SPEED_4GHZ
 
- LPFC_LINK_SPEED_64GHZ
 
- LPFC_LINK_SPEED_8GHZ
 
- LPFC_LINK_SPEED_STRING
 
- LPFC_LINK_SPEED_UNKNOWN
 
- LPFC_LINK_TYPE_ETHERNET
 
- LPFC_LINK_TYPE_FC
 
- LPFC_LINK_UNKNOWN
 
- LPFC_LINK_UP
 
- LPFC_LNK_DAT_INVAL
 
- LPFC_LNK_DAT_VAL
 
- LPFC_LNK_FC
 
- LPFC_LNK_FC_TRUNKED
 
- LPFC_LNK_GE
 
- LPFC_LNK_TYPE_FC
 
- LPFC_LNK_TYPE_GE
 
- LPFC_LOCAL_CFG_LINK
 
- LPFC_MAM_BOTH
 
- LPFC_MAM_FPMA
 
- LPFC_MAM_SPMA
 
- LPFC_MAX_ADPTMSG
 
- LPFC_MAX_AUTO_EQ_DELAY
 
- LPFC_MAX_BDE_IMM_SIZE
 
- LPFC_MAX_BG_SLI4_SEG_CNT_DIF
 
- LPFC_MAX_BPL_SEG_CNT
 
- LPFC_MAX_BUCKET_COUNT
 
- LPFC_MAX_CPU_MAP
 
- LPFC_MAX_CQ_PAGE
 
- LPFC_MAX_CT_SIZE
 
- LPFC_MAX_DATA_CTRL_LEN
 
- LPFC_MAX_DEVLOSS_TMO
 
- LPFC_MAX_DISC_THREADS
 
- LPFC_MAX_EQ_DELAY_EQID_CNT
 
- LPFC_MAX_EQ_PAGE
 
- LPFC_MAX_EVT_COUNT
 
- LPFC_MAX_FWLOG_PAGE
 
- LPFC_MAX_HBQS
 
- LPFC_MAX_IMAX
 
- LPFC_MAX_MQ_PAGE
 
- LPFC_MAX_MRQ_POST
 
- LPFC_MAX_NS_RETRY
 
- LPFC_MAX_NVME_INFO_TMP_LEN
 
- LPFC_MAX_NVME_SEG_CNT
 
- LPFC_MAX_RING_MASK
 
- LPFC_MAX_RQ_PAGE
 
- LPFC_MAX_SCSI_INFO_TMP_LEN
 
- LPFC_MAX_SGE_SIZE
 
- LPFC_MAX_SGL_SEG_CNT
 
- LPFC_MAX_SG_SEG_CNT
 
- LPFC_MAX_SG_SEG_CNT_DIF
 
- LPFC_MAX_SG_TABLESIZE
 
- LPFC_MAX_SUPPORTED_PAGES
 
- LPFC_MAX_TARGET
 
- LPFC_MAX_TGT_QDEPTH
 
- LPFC_MAX_VFN_PER_PFN
 
- LPFC_MAX_VPI
 
- LPFC_MAX_VPORTS
 
- LPFC_MAX_WQ_PAGE
 
- LPFC_MAX_WQ_PAGE_V0
 
- LPFC_MBOX
 
- LPFC_MBOXQ_t
 
- LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT
 
- LPFC_MBOX_OPCODE_CQ_CREATE
 
- LPFC_MBOX_OPCODE_CQ_DESTROY
 
- LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT
 
- LPFC_MBOX_OPCODE_DELETE_OBJECT
 
- LPFC_MBOX_OPCODE_EQ_CREATE
 
- LPFC_MBOX_OPCODE_EQ_DESTROY
 
- LPFC_MBOX_OPCODE_FCOE_ADD_FCF
 
- LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET
 
- LPFC_MBOX_OPCODE_FCOE_DELETE_FCF
 
- LPFC_MBOX_OPCODE_FCOE_FC_SET_TRUNK_MODE
 
- LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_LOOPBACK
 
- LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_STATE
 
- LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE
 
- LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES
 
- LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE
 
- LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF
 
- LPFC_MBOX_OPCODE_FCOE_REMOVE_SGL_PAGES
 
- LPFC_MBOX_OPCODE_FCOE_RQ_CREATE
 
- LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY
 
- LPFC_MBOX_OPCODE_FCOE_SET_FCLINK_SETTINGS
 
- LPFC_MBOX_OPCODE_FCOE_WQ_CREATE
 
- LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY
 
- LPFC_MBOX_OPCODE_FUNCTION_RESET
 
- LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT
 
- LPFC_MBOX_OPCODE_GET_BEACON_CONFIG
 
- LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES
 
- LPFC_MBOX_OPCODE_GET_FACTORY_PROFILE_CONFIG
 
- LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG
 
- LPFC_MBOX_OPCODE_GET_PORT_NAME
 
- LPFC_MBOX_OPCODE_GET_PROFILE_CAPACITIES
 
- LPFC_MBOX_OPCODE_GET_PROFILE_CONFIG
 
- LPFC_MBOX_OPCODE_GET_PROFILE_LIST
 
- LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO
 
- LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS
 
- LPFC_MBOX_OPCODE_GET_VPD_DATA
 
- LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY
 
- LPFC_MBOX_OPCODE_MQ_CREATE
 
- LPFC_MBOX_OPCODE_MQ_CREATE_EXT
 
- LPFC_MBOX_OPCODE_MQ_DESTROY
 
- LPFC_MBOX_OPCODE_NA
 
- LPFC_MBOX_OPCODE_NOP
 
- LPFC_MBOX_OPCODE_QUERY_FW_CFG
 
- LPFC_MBOX_OPCODE_READ_OBJECT
 
- LPFC_MBOX_OPCODE_READ_OBJECT_LIST
 
- LPFC_MBOX_OPCODE_RESET_LICENSES
 
- LPFC_MBOX_OPCODE_SEND_ACTIVATION
 
- LPFC_MBOX_OPCODE_SET_ACT_PROFILE
 
- LPFC_MBOX_OPCODE_SET_BEACON_CONFIG
 
- LPFC_MBOX_OPCODE_SET_BOOT_CONFIG
 
- LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION
 
- LPFC_MBOX_OPCODE_SET_FEATURES
 
- LPFC_MBOX_OPCODE_SET_HOST_DATA
 
- LPFC_MBOX_OPCODE_SET_PHYSICAL_LINK_CONFIG
 
- LPFC_MBOX_OPCODE_SET_PROFILE_CONFIG
 
- LPFC_MBOX_OPCODE_WRITE_OBJECT
 
- LPFC_MBOX_SLI4_CONFIG_EXTENDED_TMO
 
- LPFC_MBOX_SLI4_CONFIG_TMO
 
- LPFC_MBOX_SUBSYSTEM_COMMON
 
- LPFC_MBOX_SUBSYSTEM_FCOE
 
- LPFC_MBOX_SUBSYSTEM_LOWLEVEL
 
- LPFC_MBOX_SUBSYSTEM_NA
 
- LPFC_MBOX_TMO
 
- LPFC_MBOX_TMO_FLASH_CMD
 
- LPFC_MBUF_POOL_SIZE
 
- LPFC_MBX_ACC_BUF_SIZE
 
- LPFC_MBX_ACC_LBUF_SZ
 
- LPFC_MBX_ALL_CMD
 
- LPFC_MBX_CMD_HDR_LENGTH
 
- LPFC_MBX_DMP_ALL
 
- LPFC_MBX_DMP_ARG
 
- LPFC_MBX_DMP_MBX_ALL
 
- LPFC_MBX_DMP_MBX_BYTE
 
- LPFC_MBX_DMP_MBX_WORD
 
- LPFC_MBX_ERROR_RANGE
 
- LPFC_MBX_IMED_UNREG
 
- LPFC_MBX_NO_WAIT
 
- LPFC_MBX_SLI_CONFIG_MAX_HBD
 
- LPFC_MBX_SLI_CONFIG_MAX_MSE
 
- LPFC_MBX_WAIT
 
- LPFC_MBX_WAKE
 
- LPFC_MBX_WR_CONFIG_MAX_BDE
 
- LPFC_MCQ
 
- LPFC_MEM_POOL_SIZE
 
- LPFC_MENLO_MAINT
 
- LPFC_MIN_CPU_MAP
 
- LPFC_MIN_DEVLOSS_TMO
 
- LPFC_MIN_IMAX
 
- LPFC_MIN_MRQ_POST
 
- LPFC_MIN_SG_SEG_CNT
 
- LPFC_MIN_SG_SLI4_BUF_SZ
 
- LPFC_MIN_TGT_QDEPTH
 
- LPFC_MODULE_DESC
 
- LPFC_MQ
 
- LPFC_MQE_DEF_COUNT
 
- LPFC_MQE_SIZE
 
- LPFC_MQ_CQE_BYTE_OFFSET
 
- LPFC_MQ_DOORBELL
 
- LPFC_MQ_RING_SIZE_128
 
- LPFC_MQ_RING_SIZE_16
 
- LPFC_MQ_RING_SIZE_32
 
- LPFC_MQ_RING_SIZE_64
 
- LPFC_MSIX_VECTORS
 
- LPFC_MXP_SNAPSHOT_TAKEN
 
- LPFC_NEMBED_MBOX_SGL_CNT
 
- LPFC_NL_VENDOR_ID
 
- LPFC_NODELAY_MAX_IO
 
- LPFC_NODELIST_ENTRY_SIZE
 
- LPFC_NODELIST_SIZE
 
- LPFC_NONE
 
- LPFC_NORMAL_TEMP
 
- LPFC_NO_BUCKET
 
- LPFC_NPIV_PORT
 
- LPFC_NS_QRY
 
- LPFC_NS_QUERY_GID_FT
 
- LPFC_NS_QUERY_GID_PT
 
- LPFC_NS_REG
 
- LPFC_NVMEIO_TRC_SIZE
 
- LPFC_NVMEKTIME_SIZE
 
- LPFC_NVMESTAT_SIZE
 
- LPFC_NVMET
 
- LPFC_NVMET_ABORT_OP
 
- LPFC_NVMET_ABTS_RCV
 
- LPFC_NVMET_BUF_POST
 
- LPFC_NVMET_CQ_NOTIFY
 
- LPFC_NVMET_CTX_REUSE_WQ
 
- LPFC_NVMET_CTX_RLS
 
- LPFC_NVMET_DATA_BUF_SIZE
 
- LPFC_NVMET_DEFAULT_SEGS
 
- LPFC_NVMET_DEFER_WQFULL
 
- LPFC_NVMET_FB_SZ_MAX
 
- LPFC_NVMET_IO_INP
 
- LPFC_NVMET_MAX_PORTS
 
- LPFC_NVMET_MRQ_AUTO
 
- LPFC_NVMET_MRQ_MAX
 
- LPFC_NVMET_RQE_DEF_COUNT
 
- LPFC_NVMET_RQE_DEF_POST
 
- LPFC_NVMET_RQE_MIN_POST
 
- LPFC_NVMET_STE_ABORT
 
- LPFC_NVMET_STE_DATA
 
- LPFC_NVMET_STE_DONE
 
- LPFC_NVMET_STE_FREE
 
- LPFC_NVMET_STE_LS_ABORT
 
- LPFC_NVMET_STE_LS_RCV
 
- LPFC_NVMET_STE_LS_RSP
 
- LPFC_NVMET_STE_RCV
 
- LPFC_NVMET_SUCCESS_LEN
 
- LPFC_NVMET_TNOTIFY
 
- LPFC_NVMET_WAIT_TMO
 
- LPFC_NVMET_XBUSY
 
- LPFC_NVME_DEFAULT_SEGS
 
- LPFC_NVME_EMBED_CMD
 
- LPFC_NVME_EMBED_READ
 
- LPFC_NVME_EMBED_WRITE
 
- LPFC_NVME_ERSP_LEN
 
- LPFC_NVME_EXPEDITE_XRICNT
 
- LPFC_NVME_FB_SHIFT
 
- LPFC_NVME_INFO_MORE_STR
 
- LPFC_NVME_LS
 
- LPFC_NVME_MAX_FB
 
- LPFC_NVME_WAIT_TMO
 
- LPFC_OPCODE_VERSION_0
 
- LPFC_OPCODE_VERSION_1
 
- LPFC_PCI_BAR_BROWSE
 
- LPFC_PCI_BAR_RD_BUF_SIZE
 
- LPFC_PCI_BAR_RD_CMD_ARG
 
- LPFC_PCI_BAR_RD_SIZE
 
- LPFC_PCI_BAR_WR_CMD_ARG
 
- LPFC_PCI_CFG_BROWSE
 
- LPFC_PCI_CFG_RD_CMD_ARG
 
- LPFC_PCI_CFG_RD_SIZE
 
- LPFC_PCI_CFG_SIZE
 
- LPFC_PCI_CFG_WR_CMD_ARG
 
- LPFC_PCI_DEV_LP
 
- LPFC_PCI_DEV_OC
 
- LPFC_PCI_FUNC0
 
- LPFC_PCI_FUNC1
 
- LPFC_PCI_FUNC2
 
- LPFC_PCI_FUNC3
 
- LPFC_PCI_FUNC4
 
- LPFC_PCI_FUNC_MAX
 
- LPFC_PCI_IF0_BAR0_RD_SIZE
 
- LPFC_PCI_IF0_BAR0_SIZE
 
- LPFC_PCI_IF0_BAR1_RD_SIZE
 
- LPFC_PCI_IF0_BAR1_SIZE
 
- LPFC_PCI_IF0_BAR2_RD_SIZE
 
- LPFC_PCI_IF0_BAR2_SIZE
 
- LPFC_PCI_IF2_BAR0_RD_SIZE
 
- LPFC_PCI_IF2_BAR0_SIZE
 
- LPFC_PDE5_DESCRIPTOR
 
- LPFC_PDE6_DESCRIPTOR
 
- LPFC_PDE7_DESCRIPTOR
 
- LPFC_PG_TYPE_DIF_BUF
 
- LPFC_PG_TYPE_EMBD_DIF
 
- LPFC_PG_TYPE_INVALID
 
- LPFC_PG_TYPE_NO_DIF
 
- LPFC_PHYSICAL_PORT
 
- LPFC_POLL_FASTPATH
 
- LPFC_POLL_HB
 
- LPFC_POLL_SLOWPATH
 
- LPFC_PORT_SEM_MASK
 
- LPFC_PORT_SEM_UE_RECOVERABLE
 
- LPFC_POST_STAGE_ARMFW_START
 
- LPFC_POST_STAGE_AWAITING_HOST_RDY
 
- LPFC_POST_STAGE_BE_RESET
 
- LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_DONE
 
- LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_START
 
- LPFC_POST_STAGE_DDR_CALIBRATE_DONE
 
- LPFC_POST_STAGE_DDR_CALIBRATE_START
 
- LPFC_POST_STAGE_DDR_CONFIG_DONE
 
- LPFC_POST_STAGE_DDR_CONFIG_START
 
- LPFC_POST_STAGE_DDR_TEST_DONE
 
- LPFC_POST_STAGE_DDR_TEST_START
 
- LPFC_POST_STAGE_DHCP_QUERY_DONE
 
- LPFC_POST_STAGE_DHCP_QUERY_START
 
- LPFC_POST_STAGE_DOWNLOAD_IMAGE
 
- LPFC_POST_STAGE_FLASH_IMAGE
 
- LPFC_POST_STAGE_FW_IMAGE_LOAD_DONE
 
- LPFC_POST_STAGE_FW_IMAGE_LOAD_START
 
- LPFC_POST_STAGE_HOST_RDY
 
- LPFC_POST_STAGE_MAC_ADDRESS
 
- LPFC_POST_STAGE_PARSE_XML
 
- LPFC_POST_STAGE_PERFROM_TFTP
 
- LPFC_POST_STAGE_PORT_READY
 
- LPFC_POST_STAGE_PORT_UE
 
- LPFC_POST_STAGE_POWER_ON_RESET
 
- LPFC_POST_STAGE_RC_DONE
 
- LPFC_POST_STAGE_RC_OPTION_SET
 
- LPFC_POST_STAGE_REBOOT_SYSTEM
 
- LPFC_POST_STAGE_REDBOOT_INIT_DONE
 
- LPFC_POST_STAGE_REDBOOT_INIT_START
 
- LPFC_POST_STAGE_SEEPROM_CS_DONE
 
- LPFC_POST_STAGE_SEEPROM_CS_START
 
- LPFC_POST_STAGE_SEND_ICDS_MESSAGE
 
- LPFC_POST_STAGE_SWITCH_LINK
 
- LPFC_POWER2_BUCKET
 
- LPFC_PREDCBX_CEE_MODE
 
- LPFC_PRLI_FCP_REQ
 
- LPFC_PRLI_NVME_REQ
 
- LPFC_PROCESS_LA
 
- LPFC_QUEUE_FREE_INIT
 
- LPFC_QUEUE_FREE_WAIT
 
- LPFC_QUEUE_NOARM
 
- LPFC_QUEUE_REARM
 
- LPFC_QUEUE_TYPE_COMPLETION
 
- LPFC_QUEUE_TYPE_EVENT
 
- LPFC_QUE_ACC_BROWSE
 
- LPFC_QUE_ACC_BUF_SIZE
 
- LPFC_QUE_ACC_RD_CMD_ARG
 
- LPFC_QUE_ACC_SIZE
 
- LPFC_QUE_ACC_WR_CMD_ARG
 
- LPFC_QUE_INFO_GET_BUF_SIZE
 
- LPFC_Q_CREATE_VERSION_0
 
- LPFC_Q_CREATE_VERSION_1
 
- LPFC_Q_CREATE_VERSION_2
 
- LPFC_Q_RAMP_UP_INTERVAL
 
- LPFC_RASACTION_START_LOGGING
 
- LPFC_RASACTION_STOP_LOGGING
 
- LPFC_RASLOG_STATE_RUNNING
 
- LPFC_RASLOG_STATE_STOPPED
 
- LPFC_RAS_BUFF_ENTERIES
 
- LPFC_RAS_DISABLE_LOGGING
 
- LPFC_RAS_ENABLE_LOGGING
 
- LPFC_RAS_MAX_BUFF_POST_SIZE
 
- LPFC_RAS_MAX_ENTRY_SIZE
 
- LPFC_RAS_MIN_BUFF_POST_SIZE
 
- LPFC_RCQ
 
- LPFC_REGION23_LAST_REC
 
- LPFC_REGION23_SIGNATURE
 
- LPFC_REGION23_VERSION
 
- LPFC_REG_WRITE_KEY
 
- LPFC_REG_WRITE_KEY_SIZE
 
- LPFC_RESET_WAIT
 
- LPFC_RPI_ALLOC_ERROR
 
- LPFC_RPI_HDR_COUNT
 
- LPFC_RPI_LOW_WATER_MARK
 
- LPFC_RPI_RSRC_RDY
 
- LPFC_RQE_DEF_COUNT
 
- LPFC_RQE_SIZE
 
- LPFC_RQE_SIZE_128
 
- LPFC_RQE_SIZE_16
 
- LPFC_RQE_SIZE_32
 
- LPFC_RQE_SIZE_64
 
- LPFC_RQE_SIZE_8
 
- LPFC_RQ_NOTIFY_INTRVL
 
- LPFC_RQ_PAGE_SIZE_4096
 
- LPFC_RQ_RING_SIZE_1024
 
- LPFC_RQ_RING_SIZE_2048
 
- LPFC_RQ_RING_SIZE_4096
 
- LPFC_RQ_RING_SIZE_512
 
- LPFC_RSC_TYPE_FCOE_RPI
 
- LPFC_RSC_TYPE_FCOE_VFI
 
- LPFC_RSC_TYPE_FCOE_VPI
 
- LPFC_RSC_TYPE_FCOE_XRI
 
- LPFC_RSRC_DESC_MAX_NUM
 
- LPFC_RSRC_DESC_TYPE_FCFCOE
 
- LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH
 
- LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD
 
- LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH
 
- LPFC_RSRC_DESC_TYPE_PCIE
 
- LPFC_RSRC_DESC_WSIZE
 
- LPFC_SBUF_BUMP_QDEPTH
 
- LPFC_SBUF_NORMAL_DIF
 
- LPFC_SBUF_NOT_POSTED
 
- LPFC_SBUF_PASS_DIF
 
- LPFC_SBUF_XBUSY
 
- LPFC_SCSISTAT_SIZE
 
- LPFC_SCSI_DMA_EXT_SIZE
 
- LPFC_SEC_TO_USEC
 
- LPFC_SET_HOST_OS_DRIVER_VERSION
 
- LPFC_SET_MDS_DIAGS
 
- LPFC_SET_UE_RECOVERY
 
- LPFC_SGE_TYPE_ATM
 
- LPFC_SGE_TYPE_DATA
 
- LPFC_SGE_TYPE_DIF
 
- LPFC_SGE_TYPE_DISEED
 
- LPFC_SGE_TYPE_ENC
 
- LPFC_SGE_TYPE_LSP
 
- LPFC_SGE_TYPE_PEDIF
 
- LPFC_SGE_TYPE_PESEED
 
- LPFC_SGE_TYPE_SKIP
 
- LPFC_SKIP_UNREG_FCF
 
- LPFC_SLI3_BG_ENABLED
 
- LPFC_SLI3_CRP_ENABLED
 
- LPFC_SLI3_DSS_ENABLED
 
- LPFC_SLI3_HBQ_ENABLED
 
- LPFC_SLI3_MAX_RING
 
- LPFC_SLI3_NPIV_ENABLED
 
- LPFC_SLI3_VPORT_TEARDOWN
 
- LPFC_SLI4_FCF_TBL_INDX_MAX
 
- LPFC_SLI4_HANDLER_CNT
 
- LPFC_SLI4_HANDLER_NAME_SZ
 
- LPFC_SLI4_INTR0
 
- LPFC_SLI4_INTR1
 
- LPFC_SLI4_INTR10
 
- LPFC_SLI4_INTR11
 
- LPFC_SLI4_INTR12
 
- LPFC_SLI4_INTR13
 
- LPFC_SLI4_INTR14
 
- LPFC_SLI4_INTR15
 
- LPFC_SLI4_INTR16
 
- LPFC_SLI4_INTR17
 
- LPFC_SLI4_INTR18
 
- LPFC_SLI4_INTR19
 
- LPFC_SLI4_INTR2
 
- LPFC_SLI4_INTR20
 
- LPFC_SLI4_INTR21
 
- LPFC_SLI4_INTR22
 
- LPFC_SLI4_INTR23
 
- LPFC_SLI4_INTR24
 
- LPFC_SLI4_INTR25
 
- LPFC_SLI4_INTR26
 
- LPFC_SLI4_INTR27
 
- LPFC_SLI4_INTR28
 
- LPFC_SLI4_INTR29
 
- LPFC_SLI4_INTR3
 
- LPFC_SLI4_INTR30
 
- LPFC_SLI4_INTR31
 
- LPFC_SLI4_INTR4
 
- LPFC_SLI4_INTR5
 
- LPFC_SLI4_INTR6
 
- LPFC_SLI4_INTR7
 
- LPFC_SLI4_INTR8
 
- LPFC_SLI4_INTR9
 
- LPFC_SLI4_MAX_XRI
 
- LPFC_SLI4_MBX_EMBED
 
- LPFC_SLI4_MBX_NEMBED
 
- LPFC_SLI4_MBX_SGE_MAX_PAGES
 
- LPFC_SLI4_MB_WORD_COUNT
 
- LPFC_SLI4_PARAMETERS
 
- LPFC_SLI4_PERFH_ENABLED
 
- LPFC_SLI4_PHWQ_ENABLED
 
- LPFC_SLI4_PPNAME_GET
 
- LPFC_SLI4_PPNAME_NON
 
- LPFC_SLI4_PROTO_FC
 
- LPFC_SLI4_PROTO_FCOE
 
- LPFC_SLI4_PROTO_ISCSI
 
- LPFC_SLI4_PROTO_NIC
 
- LPFC_SLI4_PROTO_RDMA
 
- LPFC_SLIPORT_BIG_ENDIAN
 
- LPFC_SLIPORT_IF0_SMPHR
 
- LPFC_SLIPORT_INIT_PORT
 
- LPFC_SLIPORT_LITTLE_ENDIAN
 
- LPFC_SLI_ACTIVE
 
- LPFC_SLI_ASIC_VER
 
- LPFC_SLI_ASYNC_MBX_BLK
 
- LPFC_SLI_EVENT_STATUS_NOT_PRESENT
 
- LPFC_SLI_EVENT_STATUS_UNCERTIFIED
 
- LPFC_SLI_EVENT_STATUS_UNQUALIFIED
 
- LPFC_SLI_EVENT_STATUS_UNSUPPORTED
 
- LPFC_SLI_EVENT_STATUS_VALID
 
- LPFC_SLI_EVENT_STATUS_WRONG_TYPE
 
- LPFC_SLI_EVENT_TYPE_DIAG_DUMP
 
- LPFC_SLI_EVENT_TYPE_MISCONFIGURED
 
- LPFC_SLI_EVENT_TYPE_NORM_TEMP
 
- LPFC_SLI_EVENT_TYPE_NVLOG_POST
 
- LPFC_SLI_EVENT_TYPE_OVER_TEMP
 
- LPFC_SLI_EVENT_TYPE_PORT_ERROR
 
- LPFC_SLI_EVENT_TYPE_REMOTE_DPORT
 
- LPFC_SLI_INTF
 
- LPFC_SLI_INTF_FAMILY_BE2
 
- LPFC_SLI_INTF_FAMILY_BE3
 
- LPFC_SLI_INTF_FAMILY_LNCR_A0
 
- LPFC_SLI_INTF_FAMILY_LNCR_B0
 
- LPFC_SLI_INTF_IF_TYPE_0
 
- LPFC_SLI_INTF_IF_TYPE_1
 
- LPFC_SLI_INTF_IF_TYPE_2
 
- LPFC_SLI_INTF_IF_TYPE_6
 
- LPFC_SLI_INTF_IF_TYPE_PHYS
 
- LPFC_SLI_INTF_IF_TYPE_VIRT
 
- LPFC_SLI_INTF_REV_SLI3
 
- LPFC_SLI_INTF_REV_SLI4
 
- LPFC_SLI_INTF_SLI_HINT1_1
 
- LPFC_SLI_INTF_SLI_HINT1_2
 
- LPFC_SLI_INTF_SLI_HINT1_NONE
 
- LPFC_SLI_INTF_SLI_HINT2_NONE
 
- LPFC_SLI_INTF_VALID
 
- LPFC_SLI_MBOX_ACTIVE
 
- LPFC_SLI_REV2
 
- LPFC_SLI_REV3
 
- LPFC_SLI_REV4
 
- LPFC_SLI_SUPPRESS_RSP
 
- LPFC_SLI_USE_EQDR
 
- LPFC_SOL_IOCB
 
- LPFC_SP_DRIVER_HANDLER_NAME
 
- LPFC_SP_EQ_MAX_INTR_SEC
 
- LPFC_STOP_IOCB_EVENT
 
- LPFC_SUPP_PAGES
 
- LPFC_TGTQ_RAMPUP_PCENT
 
- LPFC_THRESHOLD_TEMP
 
- LPFC_TIMEOUT_DEFAULT
 
- LPFC_TOPOLOGY_LOOP
 
- LPFC_TOPOLOGY_MM
 
- LPFC_TOPOLOGY_PT_PT
 
- LPFC_TOTAL_HBQ_SIZE
 
- LPFC_TRAILER_CODE_DCBX
 
- LPFC_TRAILER_CODE_FC
 
- LPFC_TRAILER_CODE_FCOE
 
- LPFC_TRAILER_CODE_GRP5
 
- LPFC_TRAILER_CODE_LINK
 
- LPFC_TRAILER_CODE_SLI
 
- LPFC_TRANSGRESSION_HIGH_RXPOWER
 
- LPFC_TRANSGRESSION_HIGH_TEMPERATURE
 
- LPFC_TRANSGRESSION_HIGH_TXBIAS
 
- LPFC_TRANSGRESSION_HIGH_TXPOWER
 
- LPFC_TRANSGRESSION_HIGH_VOLTAGE
 
- LPFC_TRANSGRESSION_LOW_RXPOWER
 
- LPFC_TRANSGRESSION_LOW_TEMPERATURE
 
- LPFC_TRANSGRESSION_LOW_TXBIAS
 
- LPFC_TRANSGRESSION_LOW_TXPOWER
 
- LPFC_TRANSGRESSION_LOW_VOLTAGE
 
- LPFC_UERR_STATUS_HI
 
- LPFC_UERR_STATUS_LO
 
- LPFC_UE_MASK_HI
 
- LPFC_UE_MASK_LO
 
- LPFC_ULP0_RQ_DOORBELL
 
- LPFC_ULP0_WQ_DOORBELL
 
- LPFC_ULP1_RQ_DOORBELL
 
- LPFC_ULP1_WQ_DOORBELL
 
- LPFC_ULP_FCOE_INIT_MODE
 
- LPFC_ULP_FCOE_TGT_MODE
 
- LPFC_UNKNOWN_IOCB
 
- LPFC_UNREG_ALL_DFLT_RPIS
 
- LPFC_UNREG_ALL_RPIS_VPORT
 
- LPFC_UNREG_FCF
 
- LPFC_UNSOL_IOCB
 
- LPFC_USER_LINK_SPEED_10G
 
- LPFC_USER_LINK_SPEED_16G
 
- LPFC_USER_LINK_SPEED_1G
 
- LPFC_USER_LINK_SPEED_2G
 
- LPFC_USER_LINK_SPEED_32G
 
- LPFC_USER_LINK_SPEED_4G
 
- LPFC_USER_LINK_SPEED_64G
 
- LPFC_USER_LINK_SPEED_8G
 
- LPFC_USER_LINK_SPEED_AUTO
 
- LPFC_USER_LINK_SPEED_MAX
 
- LPFC_USE_FCPWQIDX
 
- LPFC_USOL
 
- LPFC_VECTOR_MAP_EMPTY
 
- LPFC_VF0
 
- LPFC_VF1
 
- LPFC_VF10
 
- LPFC_VF11
 
- LPFC_VF12
 
- LPFC_VF13
 
- LPFC_VF14
 
- LPFC_VF15
 
- LPFC_VF16
 
- LPFC_VF17
 
- LPFC_VF18
 
- LPFC_VF19
 
- LPFC_VF2
 
- LPFC_VF20
 
- LPFC_VF21
 
- LPFC_VF22
 
- LPFC_VF23
 
- LPFC_VF24
 
- LPFC_VF25
 
- LPFC_VF26
 
- LPFC_VF27
 
- LPFC_VF28
 
- LPFC_VF29
 
- LPFC_VF3
 
- LPFC_VF30
 
- LPFC_VF31
 
- LPFC_VF4
 
- LPFC_VF5
 
- LPFC_VF6
 
- LPFC_VF7
 
- LPFC_VF8
 
- LPFC_VF9
 
- LPFC_VFI_RSRC_RDY
 
- LPFC_VFR_PAGE_SIZE
 
- LPFC_VIR_FUNC_MAX
 
- LPFC_VNAME_LEN
 
- LPFC_VPI_REGISTERED
 
- LPFC_VPI_RSRC_RDY
 
- LPFC_VPORT_ATTR
 
- LPFC_VPORT_ATTR_HEX_R
 
- LPFC_VPORT_ATTR_HEX_RW
 
- LPFC_VPORT_ATTR_R
 
- LPFC_VPORT_ATTR_RW
 
- LPFC_VPORT_FAILED
 
- LPFC_VPORT_READY
 
- LPFC_VPORT_ULL_ATTR_R
 
- LPFC_VPORT_UNKNOWN
 
- LPFC_VV_EMLX_ID
 
- LPFC_VV_SUPPRESS_RSP
 
- LPFC_WARM_START
 
- LPFC_WCQ
 
- LPFC_WQ
 
- LPFC_WQE128_SIZE
 
- LPFC_WQE_CQ_ID_DEFAULT
 
- LPFC_WQE_DEF_COUNT
 
- LPFC_WQE_DIF_INSERT
 
- LPFC_WQE_DIF_PASSTHRU
 
- LPFC_WQE_DIF_STRIP
 
- LPFC_WQE_EXP_COUNT
 
- LPFC_WQE_IOD_NONE
 
- LPFC_WQE_IOD_READ
 
- LPFC_WQE_IOD_WRITE
 
- LPFC_WQE_LENLOC_NONE
 
- LPFC_WQE_LENLOC_WORD12
 
- LPFC_WQE_LENLOC_WORD3
 
- LPFC_WQE_LENLOC_WORD4
 
- LPFC_WQE_SIZE
 
- LPFC_WQ_16K_PAGE_SZ
 
- LPFC_WQ_4K_PAGE_SZ
 
- LPFC_WQ_NOTIFY_INTRVL
 
- LPFC_WQ_PAGE_SIZE_4096
 
- LPFC_WQ_SZ128_SUPPORT
 
- LPFC_WQ_SZ64_SUPPORT
 
- LPFC_WQ_WQE_SIZE_128
 
- LPFC_WQ_WQE_SIZE_64
 
- LPFC_WWNN_TYPE
 
- LPFC_WWPN_TYPE
 
- LPFC_XRI_EXCH_BUSY_WAIT_T1
 
- LPFC_XRI_EXCH_BUSY_WAIT_T2
 
- LPFC_XRI_EXCH_BUSY_WAIT_TMO
 
- LPFR
 
- LPFR_LUT_SIZE
 
- LPF_10_HZ
 
- LPF_188_HZ
 
- LPF_20_HZ
 
- LPF_2100_HZ_NOLPF
 
- LPF_256_HZ_NOLPF
 
- LPF_42_HZ
 
- LPF_5_HZ
 
- LPF_98_HZ
 
- LPF_AUTO_TUNE
 
- LPF_COEF
 
- LPF_PDF_CTL
 
- LPF_PROGRAM_EN
 
- LPF_RESISTORS_10_5KOHM
 
- LPF_RESISTORS_11_5KOHM
 
- LPF_RESISTORS_13KOHM
 
- LPF_RESISTORS_15_5KOHM
 
- LPF_RESISTORS_8KOHM
 
- LPF_RESISTORS_SEL
 
- LPGETFLAGS
 
- LPGETIRQ
 
- LPGETSTATS
 
- LPGETSTATUS
 
- LPI2C_DEFAULT_RATE
 
- LPI2C_MCCR0
 
- LPI2C_MCCR1
 
- LPI2C_MCFGR0
 
- LPI2C_MCFGR1
 
- LPI2C_MCFGR2
 
- LPI2C_MCFGR3
 
- LPI2C_MCR
 
- LPI2C_MFCR
 
- LPI2C_MFSR
 
- LPI2C_MIER
 
- LPI2C_MRDR
 
- LPI2C_MSR
 
- LPI2C_MTDR
 
- LPI2C_PARAM
 
- LPICF
 
- LPICF_ADDR
 
- LPICF_GS_BW
 
- LPICF_GS_GRAY_16
 
- LPICF_GS_GRAY_4
 
- LPICF_GS_MASK
 
- LPICF_PBSIZ_1
 
- LPICF_PBSIZ_2
 
- LPICF_PBSIZ_4
 
- LPICF_PBSIZ_MASK
 
- LPID_RSVD
 
- LPIOC_GET_BUS_ADDRESS
 
- LPIOC_GET_DEVICE_ID
 
- LPIOC_GET_PROTOCOLS
 
- LPIOC_GET_VID_PID
 
- LPIOC_HP_SET_CHANNEL
 
- LPIOC_SET_PROTOCOL
 
- LPIOC_SOFT_RESET
 
- LPI_COUNT_MASK
 
- LPI_COUNT_SHIFT
 
- LPI_CTRL_CHK_DA
 
- LPI_CTRL_CHK_RX
 
- LPI_CTRL_CHK_STATE
 
- LPI_CTRL_EN
 
- LPI_CTRL_ENH_EN
 
- LPI_CTRL_ENH_TH_MASK
 
- LPI_CTRL_ENH_TH_SHIFT
 
- LPI_CTRL_ENH_TO_MASK
 
- LPI_CTRL_ENH_TO_SHIFT
 
- LPI_CTRL_GMII
 
- LPI_CTRL_STATUS
 
- LPI_CTRL_STATUS_LPIEN
 
- LPI_CTRL_STATUS_LPITXA
 
- LPI_CTRL_STATUS_PLS
 
- LPI_CTRL_STATUS_PLSDIS
 
- LPI_CTRL_STATUS_PLSEN
 
- LPI_CTRL_STATUS_RLPIEN
 
- LPI_CTRL_STATUS_RLPIEX
 
- LPI_CTRL_STATUS_RLPIST
 
- LPI_CTRL_STATUS_RXRSTP
 
- LPI_CTRL_STATUS_TLPIEN
 
- LPI_CTRL_STATUS_TLPIEX
 
- LPI_CTRL_STATUS_TLPIST
 
- LPI_CTRL_STATUS_TXA
 
- LPI_CTRL_STATUS_TXRSTP
 
- LPI_CTRL_TO_PHY
 
- LPI_DEFAULT_PCPU_CACHE_SIZE
 
- LPI_FEATURE_EN
 
- LPI_FEATURE_EN_DIG1000X
 
- LPI_INT_STATUS
 
- LPI_LINK_STATUS_TIMER
 
- LPI_MAC_WAIT_TIMER
 
- LPI_NRBITS
 
- LPI_PENDBASE_SZ
 
- LPI_PROPBASE_SZ
 
- LPI_PROP_DEFAULT_PRIO
 
- LPI_PROP_ENABLED
 
- LPI_PROP_ENABLE_BIT
 
- LPI_PROP_GROUP1
 
- LPI_PROP_PRIORITY
 
- LPI_RANGE
 
- LPI_STATUS
 
- LPI_STATUS_RSV12
 
- LPI_TIMER_CTRL
 
- LPI_WAIT_TIMER_MASK
 
- LPI_WAIT_TIMER_SHIFT
 
- LPJ
 
- LPL87565_BUCK0_ILIM_MASK
 
- LPL87565_BUCK0_PG_MASK
 
- LPL87565_BUCK1_ILIM_MASK
 
- LPL87565_BUCK1_PG_MASK
 
- LPL87565_BUCK2_ILIM_MASK
 
- LPL87565_BUCK2_PG_MASK
 
- LPL87565_BUCK3_ILIM_MASK
 
- LPL87565_BUCK3_PG_MASK
 
- LPL87565_GPIO_MASK
 
- LPL87565_I_LOAD_READY_MASK
 
- LPL87565_RESET_REG_MASK
 
- LPL87565_SYNC_CLK_MASK
 
- LPL87565_TDIE_WARN_MASK
 
- LPLDO_CTRL
 
- LPLDO_HSM
 
- LPLDO_LSM_DIS
 
- LPL_SHIFT
 
- LPM
 
- LPM_ANYPATH
 
- LPM_BESL
 
- LPM_BESLCK
 
- LPM_BESLCK_U3
 
- LPM_BESLDCK
 
- LPM_BESLD_STALL
 
- LPM_BESL_STALL
 
- LPM_CREATE_FLAG_MASK
 
- LPM_DATA_SIZE_MAX
 
- LPM_DATA_SIZE_MIN
 
- LPM_FORCE_STALL
 
- LPM_HRWE
 
- LPM_INTR
 
- LPM_KEY_SIZE
 
- LPM_KEY_SIZE_MAX
 
- LPM_KEY_SIZE_MIN
 
- LPM_KMALLOC
 
- LPM_MODE
 
- LPM_OP_RESUME_ACK
 
- LPM_OP_SUSPEND_ACK
 
- LPM_OP_TX_NOTIFY
 
- LPM_RESUME_INTR
 
- LPM_RWP
 
- LPM_SUSPEND_DELAY_MS
 
- LPM_SYSCFG_1
 
- LPM_TIMER_500MS
 
- LPM_TIMER_500US
 
- LPM_TIMER_MASK
 
- LPM_TREE_NODE_FLAG_IM
 
- LPM_U1U2_EN
 
- LPM_U3_ACK_EN
 
- LPM_VAL_SIZE_MAX
 
- LPM_VAL_SIZE_MIN
 
- LPNAV_CTRL
 
- LPOLCF
 
- LPOLCF_ADDR
 
- LPOLCF_FLMPOL
 
- LPOLCF_LCKPOL
 
- LPOLCF_LPPOL
 
- LPOLCF_PIXPOL
 
- LPOMAXFREQ
 
- LPOMINFREQ
 
- LPORT_MUTEX_NORMAL
 
- LPORT_MUTEX_VN_PORT
 
- LPORT_OPTS
 
- LPORT_ST_DHBA
 
- LPORT_ST_DISABLED
 
- LPORT_ST_DNS
 
- LPORT_ST_DPRT
 
- LPORT_ST_FDMI
 
- LPORT_ST_FLOGI
 
- LPORT_ST_LOGO
 
- LPORT_ST_READY
 
- LPORT_ST_RESET
 
- LPORT_ST_RFF_ID
 
- LPORT_ST_RFT_ID
 
- LPORT_ST_RHBA
 
- LPORT_ST_RNN_ID
 
- LPORT_ST_RPA
 
- LPORT_ST_RSNN_NN
 
- LPORT_ST_RSPN_ID
 
- LPORT_ST_SCR
 
- LPOSR
 
- LPOSR_ADDR
 
- LPOSR_BOS
 
- LPOSR_POS_MASK
 
- LPOSR_POS_SHIFT
 
- LPO_CAL_ADDRESS
 
- LPO_CAL_ENABLE
 
- LPO_CAL_ENABLE_LSB
 
- LPO_CAL_ENABLE_MASK
 
- LPO_CAL_ENABLE_S
 
- LPO_CAL_OFFSET
 
- LPPACA_OLD_SHARED_PROC
 
- LPPACA_SIZE
 
- LPP_BSSBACT
 
- LPP_BSSBPRESENT
 
- LPP_DEST
 
- LPP_DEST_EXI
 
- LPP_DEST_PTI
 
- LPP_LPPBUSY
 
- LPP_MAGIC
 
- LPP_PID_MASK
 
- LPP_PTIPRESENT
 
- LPQ_PUBLIC_DIS
 
- LPR
 
- LPRCCLK
 
- LPRESET
 
- LPROPS_CAT_MASK
 
- LPROPS_DIRTY
 
- LPROPS_DIRTY_IDX
 
- LPROPS_EMPTY
 
- LPROPS_FRDI_IDX
 
- LPROPS_FREE
 
- LPROPS_FREEABLE
 
- LPROPS_HEAP_CNT
 
- LPROPS_INDEX
 
- LPROPS_NC
 
- LPROPS_TAKEN
 
- LPROPS_UNCAT
 
- LPRV7XX_SMC_MCLK_VALUE
 
- LPRX_RD_RDY_INT_FLAG
 
- LPRX_TIMED_OUT
 
- LPRX_TIMEOUT
 
- LPRX_TIMEOUT_ERR
 
- LPRX_TIMEOUT_VALUE
 
- LPRX_TIMEOUT_VALUE_MASK
 
- LPRX_TIMEOUT_VALUE_SHIFT
 
- LPRX_TO_CNT
 
- LPS
 
- LPS001WP
 
- LPS001WP_PRESS_DEV_NAME
 
- LPS22HB
 
- LPS22HB_PRESS_DEV_NAME
 
- LPS22HH
 
- LPS22HH_PRESS_DEV_NAME
 
- LPS25H
 
- LPS25H_PRESS_DEV_NAME
 
- LPS331AP
 
- LPS331AP_PRESS_DEV_NAME
 
- LPS33HW
 
- LPS33HW_PRESS_DEV_NAME
 
- LPS35HW
 
- LPS35HW_PRESS_DEV_NAME
 
- LPSC
 
- LPSC_ALWAYS_ENABLED
 
- LPSC_CLKDEV
 
- LPSC_CLKDEV1
 
- LPSC_CLKDEV2
 
- LPSC_CLKDEV3
 
- LPSC_FORCE
 
- LPSC_LOCAL_RESET
 
- LPSC_SET_RATE_PARENT
 
- LPSC_STATE_DISABLE
 
- LPSC_STATE_ENABLE
 
- LPSC_STATE_SWRSTDISABLE
 
- LPSC_STATE_SYNCRST
 
- LPSETIRQ
 
- LPSETTIMEOUT
 
- LPSETTIMEOUT_NEW
 
- LPSETTIMEOUT_OLD
 
- LPSME
 
- LPSPI_BUF_RX
 
- LPSPI_BUF_TX
 
- LPSS_ADDR
 
- LPSS_AUTO_LTR
 
- LPSS_BSW_SSP
 
- LPSS_BXT_SSP
 
- LPSS_BYT_SSP
 
- LPSS_CAPS_CS_EN_MASK
 
- LPSS_CAPS_CS_EN_SHIFT
 
- LPSS_CLK
 
- LPSS_CLK_DIVIDER
 
- LPSS_CLK_DIVIDER_DEF_MASK
 
- LPSS_CLK_GATE
 
- LPSS_CLK_SIZE
 
- LPSS_CNL_SSP
 
- LPSS_CS_CONTROL_CS_HIGH
 
- LPSS_CS_CONTROL_SW_MODE
 
- LPSS_DEV_I2C
 
- LPSS_DEV_OFFSET
 
- LPSS_DEV_SIZE
 
- LPSS_DEV_SPI
 
- LPSS_DEV_UART
 
- LPSS_GENERAL
 
- LPSS_GENERAL_LTR_MODE_SW
 
- LPSS_GENERAL_REG_RXTO_HOLDOFF_DISABLE
 
- LPSS_GENERAL_UART_RTS_OVRD
 
- LPSS_GPIODEF0_DMA1_D3
 
- LPSS_GPIODEF0_DMA2_D3
 
- LPSS_GPIODEF0_DMA_D3_MASK
 
- LPSS_GPIODEF0_DMA_LLP
 
- LPSS_I2C_ENABLE
 
- LPSS_IDMA64_DRIVER_NAME
 
- LPSS_IDMA64_OFFSET
 
- LPSS_IDMA64_SIZE
 
- LPSS_IOSF_GPIODEF0
 
- LPSS_IOSF_PMCSR
 
- LPSS_IOSF_UNIT_LPIO1
 
- LPSS_IOSF_UNIT_LPIO2
 
- LPSS_IOSF_UNIT_LPIOEP
 
- LPSS_LPT_SSP
 
- LPSS_LTR
 
- LPSS_LTR_MAX_VAL
 
- LPSS_LTR_SIZE
 
- LPSS_LTR_SNOOP_LAT_1US
 
- LPSS_LTR_SNOOP_LAT_32US
 
- LPSS_LTR_SNOOP_LAT_CUTOFF
 
- LPSS_LTR_SNOOP_LAT_SHIFT
 
- LPSS_LTR_SNOOP_MASK
 
- LPSS_LTR_SNOOP_REQ
 
- LPSS_NO_D3_DELAY
 
- LPSS_PMCSR_D0
 
- LPSS_PMCSR_D3hot
 
- LPSS_PMCSR_Dx_MASK
 
- LPSS_PRIV_ACTIVELTR
 
- LPSS_PRIV_CAPS
 
- LPSS_PRIV_CAPS_NO_IDMA
 
- LPSS_PRIV_CAPS_TYPE_MASK
 
- LPSS_PRIV_CAPS_TYPE_SHIFT
 
- LPSS_PRIV_CLOCK_GATE
 
- LPSS_PRIV_CLOCK_GATE_CLK_CTL_FORCE_ON
 
- LPSS_PRIV_CLOCK_GATE_CLK_CTL_MASK
 
- LPSS_PRIV_IDLELTR
 
- LPSS_PRIV_LTR_REQ
 
- LPSS_PRIV_LTR_SCALE_1US
 
- LPSS_PRIV_LTR_SCALE_32US
 
- LPSS_PRIV_LTR_SCALE_MASK
 
- LPSS_PRIV_LTR_VALUE_MASK
 
- LPSS_PRIV_OFFSET
 
- LPSS_PRIV_REG_COUNT
 
- LPSS_PRIV_REMAP_ADDR
 
- LPSS_PRIV_RESETS
 
- LPSS_PRIV_RESETS_FUNC
 
- LPSS_PRIV_RESETS_IDMA
 
- LPSS_PRIV_SIZE
 
- LPSS_PRIV_SSP_REG
 
- LPSS_PRIV_SSP_REG_DIS_DMA_FIN
 
- LPSS_PRV_REG_COUNT
 
- LPSS_QUIRK_ALWAYS_POWER_ON
 
- LPSS_RESETS
 
- LPSS_RESETS_RESET_APB
 
- LPSS_RESETS_RESET_FUNC
 
- LPSS_SAVE_CTX
 
- LPSS_SPT_SSP
 
- LPSS_SW_LTR
 
- LPSS_TX_INT
 
- LPSS_TX_INT_MASK
 
- LPSS_UART_CPR
 
- LPSS_UART_CPR_AFCE
 
- LPSTATE_SHIFT
 
- LPSTS
 
- LPSTS_SUSPM
 
- LPS_CHANGE_DTIM_CID
 
- LPS_CTRL_CONNECT
 
- LPS_CTRL_DISCONNECT
 
- LPS_CTRL_JOINBSS
 
- LPS_CTRL_LEAVE
 
- LPS_CTRL_SCAN
 
- LPS_CTRL_SPECIAL_PACKET
 
- LPS_CTRL_TRAFFIC_BUSY
 
- LPS_CTRL_TYPE
 
- LPS_CTRL_WK_CID
 
- LPS_DELAY_TIME
 
- LPS_Enter
 
- LPS_IS_SLEEP
 
- LPS_IS_WAKE
 
- LPS_LEAVE_TIMEOUT_MS
 
- LPS_Leave
 
- LPS_Leave_check
 
- LPS_PREC
 
- LPS_RF_ON_check
 
- LPS_RPWM_WAIT_MS
 
- LPS_WAIT_NULL_DATA_SEND
 
- LPT
 
- LPTCTRL_ADDRSTB
 
- LPTCTRL_DATASTB
 
- LPTCTRL_INTEN
 
- LPTCTRL_PROGRAM
 
- LPTCTRL_WRITE
 
- LPTDATA_INITBIAS
 
- LPTDATA_SHIFT_TDI
 
- LPTDATA_SHIFT_TMS
 
- LPTDATA_TCK
 
- LPTDATA_TDI
 
- LPTDATA_TMS
 
- LPTIM1
 
- LPTIM1_CK
 
- LPTIM1_K
 
- LPTIM1_OUT
 
- LPTIM1_R
 
- LPTIM2
 
- LPTIM2_CK
 
- LPTIM2_K
 
- LPTIM2_OUT
 
- LPTIM2_R
 
- LPTIM3
 
- LPTIM3_CK
 
- LPTIM3_K
 
- LPTIM3_OUT
 
- LPTIM3_R
 
- LPTIM4
 
- LPTIM4_CK
 
- LPTIM4_K
 
- LPTIM4_R
 
- LPTIM5
 
- LPTIM5_CK
 
- LPTIM5_K
 
- LPTIM5_R
 
- LPTIME
 
- LPTIME_HOUR
 
- LPTIME_MAX
 
- LPTIME_MDAY
 
- LPTIME_MIN
 
- LPTIME_MON
 
- LPTIME_SEC
 
- LPTIME_WDAY
 
- LPTIME_YEAR
 
- LPTREG_CONFIGA
 
- LPTREG_CONFIGB
 
- LPTREG_CONTROL
 
- LPTREG_DATA
 
- LPTREG_ECONTROL
 
- LPTREG_EPPADDR
 
- LPTREG_EPPDATA
 
- LPTREG_STATUS
 
- LPTSTAT_DONE
 
- LPTSTAT_EPPTIMEOUT
 
- LPTSTAT_NERROR
 
- LPTSTAT_NINTR
 
- LPTSTAT_PE
 
- LPTSTAT_SHIFT_NINTR
 
- LPTSTAT_WAIT
 
- LPTXTIMECNT
 
- LPTX_IN_PROGRESS
 
- LPT_FREG_NUM
 
- LPT_HEAP_SZ
 
- LPT_NUM_BANKS_16BANK
 
- LPT_NUM_BANKS_2BANK
 
- LPT_NUM_BANKS_32BANK
 
- LPT_NUM_BANKS_4BANK
 
- LPT_NUM_BANKS_8BANK
 
- LPT_NUM_PIPES_1CH
 
- LPT_NUM_PIPES_2CH
 
- LPT_NUM_PIPES_4CH
 
- LPT_NUM_PIPES_8CH
 
- LPT_PR
 
- LPT_PR_NUM
 
- LPT_PWM_GRANULARITY
 
- LPT_SCAN_ADD
 
- LPT_SCAN_CONTINUE
 
- LPT_SCAN_STOP
 
- LPT_SSFSTS_CTL
 
- LPT_TRANSCONF
 
- LPU0_HOSTFN0_CMD_STAT
 
- LPU0_HOSTFN1_CMD_STAT
 
- LPU0_HOSTFN2_CMD_STAT
 
- LPU0_HOSTFN3_CMD_STAT
 
- LPU1_HOSTFN0_CMD_STAT
 
- LPU1_HOSTFN1_CMD_STAT
 
- LPU1_HOSTFN2_CMD_STAT
 
- LPU1_HOSTFN3_CMD_STAT
 
- LPUART1_CK
 
- LPUART32_CONSOLE
 
- LPUART_CONSOLE
 
- LPU_HOSTFN0_MBOX0_0
 
- LPU_HOSTFN1_MBOX0_8
 
- LPU_HOSTFN2_MBOX0_0
 
- LPU_HOSTFN3_MBOX0_8
 
- LPU_IRQ_EOW
 
- LPU_IRQ_ERR
 
- LPU_IRQ_IBSY
 
- LPU_IRQ_PL0
 
- LPU_RAXI_CONTROL
 
- LPU_STATUS_ACE0
 
- LPU_STATUS_ACE1
 
- LPU_STATUS_ACE2
 
- LPU_STATUS_ACE3
 
- LPU_STATUS_ACTIVE
 
- LPU_STATUS_AXIE
 
- LPU_STATUS_AXIED
 
- LPU_STATUS_AXIRP
 
- LPU_STATUS_AXIWP
 
- LPU_TBU_CONTROL
 
- LPU_TBU_CTRL_TLBPEN
 
- LPU_TBU_STATUS
 
- LPU_TBU_STATUS_TCF
 
- LPU_TBU_STATUS_TEMR
 
- LPU_TBU_STATUS_TITR
 
- LPU_TBU_STATUS_TTF
 
- LPU_TBU_STATUS_TTNG
 
- LPU_WAXI_CONTROL
 
- LPWAIT
 
- LPW_CLK_SEL
 
- LPW_MODE
 
- LPW_STATE
 
- LPX
 
- LPXCD
 
- LPXCD_ADDR
 
- LPXCD_PCD_MASK
 
- LPXCD_PCD_SHIFT
 
- LPX_PERIOD
 
- LP_ABORT
 
- LP_ABORTOPEN
 
- LP_ACPI_OWNED
 
- LP_BASE
 
- LP_BITS
 
- LP_BUFFER_SIZE
 
- LP_BUSY
 
- LP_BUSY_BIT_POS
 
- LP_BYTECLK_MASK
 
- LP_BYTECLK_REG
 
- LP_BYTECLK_SHIFT
 
- LP_CAREFUL
 
- LP_CHAR
 
- LP_CHIP_ID
 
- LP_CONFIG1
 
- LP_CONFIG2
 
- LP_COUNT_G
 
- LP_COUNT_M
 
- LP_COUNT_S
 
- LP_COUNT_T5_G
 
- LP_COUNT_T5_M
 
- LP_COUNT_T5_S
 
- LP_CTRL_FIFO_EMPTY
 
- LP_CTRL_FIFO_FULL
 
- LP_CTRL_FIFO_HALF_EMPTY
 
- LP_DATA_AVAIL
 
- LP_DATA_FIFO_EMPTY
 
- LP_DATA_FIFO_FULL
 
- LP_DATA_FIFO_HALF_EMPTY
 
- LP_DATA_TRANSFER
 
- LP_DEBUG
 
- LP_DELAY
 
- LP_DISABLE
 
- LP_DUMMY
 
- LP_ERR
 
- LP_EXIST
 
- LP_F
 
- LP_FIFO
 
- LP_FIFO_COUNT
 
- LP_GC
 
- LP_GENERIC_WR_FIFO_FULL
 
- LP_GEN_CTRL_REG
 
- LP_GEN_DATA_REG
 
- LP_HS_SSW_CNT_MASK
 
- LP_HS_SSW_CNT_SHIFT
 
- LP_IDLE_PREDICTION_MODE
 
- LP_INIT_CHAR
 
- LP_INIT_TIME
 
- LP_INIT_WAIT
 
- LP_INT_ENABLE
 
- LP_INT_STAT
 
- LP_INT_THRESH_M
 
- LP_INT_THRESH_S
 
- LP_INT_THRESH_T5_M
 
- LP_INT_THRESH_T5_S
 
- LP_INT_THRESH_T5_V
 
- LP_INT_THRESH_V
 
- LP_IRQ
 
- LP_LEN_HIS_SIZE
 
- LP_MAJOR
 
- LP_MASK
 
- LP_MODE_MASK
 
- LP_MODE_SHIFT
 
- LP_NO
 
- LP_NOPA
 
- LP_NO_REVERSE
 
- LP_NUM_GPIO
 
- LP_OFFL
 
- LP_OFFSET
 
- LP_ONEKEY
 
- LP_OPTIONS
 
- LP_OPTIONS16
 
- LP_OUTPUT_HOLD
 
- LP_OUTPUT_HOLD_RELEASE
 
- LP_PACK
 
- LP_PARPORT_AUTO
 
- LP_PARPORT_CLAIMED
 
- LP_PARPORT_NONE
 
- LP_PARPORT_OFF
 
- LP_PARPORT_UNSPEC
 
- LP_PAUTOLF
 
- LP_PBUSY
 
- LP_PERRORP
 
- LP_PHY_CTL
 
- LP_PHY_CTL_GEN_RX_3G
 
- LP_PHY_CTL_GEN_TX_3G
 
- LP_PHY_CTL_PIN_PU_PLL
 
- LP_PHY_CTL_PIN_PU_RX
 
- LP_PHY_CTL_PIN_PU_TX
 
- LP_PINITP
 
- LP_PINTEN
 
- LP_POUTPA
 
- LP_PREEMPT_REQUEST
 
- LP_PSELECD
 
- LP_PSELECP
 
- LP_PSTROBE
 
- LP_RESOL
 
- LP_RING
 
- LP_RNPR_ACKNOWLDGE
 
- LP_RNPR_ACKNOWLDGE2
 
- LP_RNPR_MSG_CODE_FIELD
 
- LP_RNPR_MSG_PAGE
 
- LP_RNPR_NEXT_PAGE
 
- LP_RNPR_TOGGLE
 
- LP_RX_TIMEOUT
 
- LP_RX_TIMEOUT_ERROR_RECOVERY_DISABLE
 
- LP_RX_TIMEOUT_REG
 
- LP_SELEC
 
- LP_SELECT
 
- LP_SHIFT
 
- LP_SPEEDO_BIT_MINUS1
 
- LP_SPEEDO_BIT_MINUS1_R
 
- LP_SPEEDO_BIT_MINUS2
 
- LP_SPEEDO_BIT_MINUS2_R
 
- LP_STAT
 
- LP_STATS
 
- LP_TIME
 
- LP_TIMEOUT_INTERRUPT
 
- LP_TIMEOUT_POLLED
 
- LP_TRUST_IRQ_
 
- LP_TWOKEY
 
- LP_VALID_OWD
 
- LP_VALID_RHZ
 
- LP_WAIT
 
- LP_WITHIN_INF
 
- LP_WITHIN_THR
 
- LQFP
 
- LQFP48
 
- LQ_A
 
- LQ_CMD
 
- LQ_FLAGS_COLOR_INC
 
- LQ_FLAG_COLOR_GET
 
- LQ_FLAG_COLOR_MSK
 
- LQ_FLAG_COLOR_POS
 
- LQ_FLAG_COLOR_SET
 
- LQ_FLAG_DYNAMIC_BW_MSK
 
- LQ_FLAG_DYNAMIC_BW_POS
 
- LQ_FLAG_RTS_BW_SIG_DYNAMIC
 
- LQ_FLAG_RTS_BW_SIG_NONE
 
- LQ_FLAG_RTS_BW_SIG_POS
 
- LQ_FLAG_RTS_BW_SIG_STATIC
 
- LQ_FLAG_USE_RTS_MSK
 
- LQ_FLAG_USE_RTS_POS
 
- LQ_G
 
- LQ_HE_MIMO2
 
- LQ_HE_SISO
 
- LQ_HT_MIMO2
 
- LQ_HT_SISO
 
- LQ_LEGACY_A
 
- LQ_LEGACY_G
 
- LQ_MAX
 
- LQ_MAX_RETRY_NUM
 
- LQ_MIMO2
 
- LQ_MIMO3
 
- LQ_NONE
 
- LQ_PPE32_ENET_MAC_CFG
 
- LQ_SISO
 
- LQ_SIZE
 
- LQ_SS_BFER_ALLOWED
 
- LQ_SS_BFER_ALLOWED_POS
 
- LQ_SS_FORCE
 
- LQ_SS_FORCE_POS
 
- LQ_SS_PARAMS_VALID
 
- LQ_SS_PARAMS_VALID_POS
 
- LQ_SS_STBC_1SS_ALLOWED
 
- LQ_SS_STBC_ALLOWED_MSK
 
- LQ_SS_STBC_ALLOWED_POS
 
- LQ_VHT_MIMO2
 
- LQ_VHT_SISO
 
- LR
 
- LRADC_CH
 
- LRADC_CH_ACCUMULATE
 
- LRADC_CH_NUM_SAMPLES
 
- LRADC_CH_NUM_SAMPLES_MASK
 
- LRADC_CH_NUM_SAMPLES_OFFSET
 
- LRADC_CH_VALUE_MASK
 
- LRADC_CH_VALUE_OFFSET
 
- LRADC_CTRL
 
- LRADC_CTRL0
 
- LRADC_CTRL0_MX23_PLATE_MASK
 
- LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE
 
- LRADC_CTRL0_MX23_XM
 
- LRADC_CTRL0_MX23_XP
 
- LRADC_CTRL0_MX23_YM
 
- LRADC_CTRL0_MX23_YP
 
- LRADC_CTRL0_MX28_PLATE_MASK
 
- LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE
 
- LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE
 
- LRADC_CTRL0_MX28_XNNSW
 
- LRADC_CTRL0_MX28_XNPSW
 
- LRADC_CTRL0_MX28_XPPSW
 
- LRADC_CTRL0_MX28_YNNSW
 
- LRADC_CTRL0_MX28_YPNSW
 
- LRADC_CTRL0_MX28_YPPSW
 
- LRADC_CTRL1
 
- LRADC_CTRL1_LRADC_IRQ
 
- LRADC_CTRL1_LRADC_IRQ_EN
 
- LRADC_CTRL1_LRADC_IRQ_EN_OFFSET
 
- LRADC_CTRL1_LRADC_IRQ_OFFSET
 
- LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK
 
- LRADC_CTRL1_MX23_LRADC_IRQ_MASK
 
- LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK
 
- LRADC_CTRL1_MX28_LRADC_IRQ_MASK
 
- LRADC_CTRL1_TOUCH_DETECT_IRQ
 
- LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
 
- LRADC_CTRL2
 
- LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET
 
- LRADC_CTRL2_TEMPSENSE_PWD
 
- LRADC_CTRL4
 
- LRADC_CTRL4_LRADCSELECT
 
- LRADC_CTRL4_LRADCSELECT_MASK
 
- LRADC_CTRL4_LRADCSELECT_OFFSET
 
- LRADC_DATA0
 
- LRADC_DATA1
 
- LRADC_DELAY
 
- LRADC_DELAY_DELAY
 
- LRADC_DELAY_DELAY_MASK
 
- LRADC_DELAY_DELAY_OFFSET
 
- LRADC_DELAY_KICK
 
- LRADC_DELAY_LOOP
 
- LRADC_DELAY_LOOP_COUNT_MASK
 
- LRADC_DELAY_LOOP_COUNT_OFFSET
 
- LRADC_DELAY_TIMER_HZ
 
- LRADC_DELAY_TIMER_LOOP
 
- LRADC_DELAY_TIMER_PER
 
- LRADC_DELAY_TRIGGER
 
- LRADC_DELAY_TRIGGER_DELAYS
 
- LRADC_DELAY_TRIGGER_DELAYS_MASK
 
- LRADC_DELAY_TRIGGER_DELAYS_OFFSET
 
- LRADC_DELAY_TRIGGER_LRADCS_MASK
 
- LRADC_DELAY_TRIGGER_LRADCS_OFFSET
 
- LRADC_INTC
 
- LRADC_INTS
 
- LRADC_MAX_DELAY_CHANS
 
- LRADC_MAX_MAPPED_CHANS
 
- LRADC_MAX_TOTAL_CHANS
 
- LRADC_RESOLUTION
 
- LRADC_SAMPLE_PRESSURE
 
- LRADC_SAMPLE_VALID
 
- LRADC_SAMPLE_X
 
- LRADC_SAMPLE_Y
 
- LRADC_SINGLE_SAMPLE_MASK
 
- LRADC_STATUS
 
- LRADC_STATUS_TOUCH_DETECT_RAW
 
- LRADC_TOUCH
 
- LRAND
 
- LRBR_LTHR
 
- LRCK_INVERSE_MASK
 
- LRCK_INVERSE_MASK_SFT
 
- LRCK_INVERSE_SFT
 
- LRCK_TDM_WIDTH_MASK
 
- LRCK_TDM_WIDTH_MASK_SFT
 
- LRCK_TDM_WIDTH_SFT
 
- LRCLK_ASYNC
 
- LRC_GUCSHR_PN
 
- LRC_GUCSHR_SZ
 
- LRC_HEADER_PAGES
 
- LRC_PPHWSP_PN
 
- LRC_PPHWSP_SZ
 
- LRC_STATE_PN
 
- LRD_ADDR
 
- LRD_CFG
 
- LRD_CTRL
 
- LRD_RANGE
 
- LREL
 
- LRESET_MARK
 
- LRE_eckd_data
 
- LRFAULT
 
- LRGB_666_FMT
 
- LRH2PBC
 
- LRH_16B_BYTES
 
- LRH_16B_DWORDS
 
- LRH_16B_PRN
 
- LRH_9B_BYTES
 
- LRH_9B_DWORDS
 
- LRH_9B_PRN
 
- LRH_BTH_BIT_OFFSET
 
- LRH_BTH_MASK
 
- LRH_BTH_MATCH_OFFSET
 
- LRH_BTH_OFFSET
 
- LRH_BTH_QW
 
- LRH_BTH_SELECT
 
- LRH_BTH_VALUE
 
- LRH_PRN
 
- LRH_SC_BIT_OFFSET
 
- LRH_SC_MASK
 
- LRH_SC_MATCH_OFFSET
 
- LRH_SC_OFFSET
 
- LRH_SC_QW
 
- LRH_SC_SELECT_OFFSET
 
- LRH_SC_VALUE
 
- LRING
 
- LRO_FLUSH_LEN_MAX
 
- LRO_PKT_HDR_LEN
 
- LRO_PKT_HDR_LEN_IPV4
 
- LRO_PKT_HDR_LEN_IPV6
 
- LRO_REPLENISH_THLD
 
- LRO_SKB_MAX_HEADROOM
 
- LRO_SKB_MIN_HEADROOM
 
- LRP
 
- LRRA
 
- LRRA_ADDR
 
- LRSAVE
 
- LRSAVE_OFFSET
 
- LRT
 
- LRTTSEL
 
- LRU_ACTIVE
 
- LRU_ACTIVE_ANON
 
- LRU_ACTIVE_FILE
 
- LRU_ALL
 
- LRU_ALL_ANON
 
- LRU_ALL_FILE
 
- LRU_BASE
 
- LRU_CACHE_H
 
- LRU_FILE
 
- LRU_HASH_LOOKUP
 
- LRU_HASH_PREALLOC
 
- LRU_INACTIVE_ANON
 
- LRU_INACTIVE_FILE
 
- LRU_INTERVAL
 
- LRU_NAMES
 
- LRU_PERCENT_CLEAN
 
- LRU_REMOVED
 
- LRU_REMOVED_RETRY
 
- LRU_RETRY
 
- LRU_ROTATE
 
- LRU_SKIP
 
- LRU_UNEVICTABLE
 
- LRW_BLOCK_SIZE
 
- LRZ_FLUSH
 
- LR_CHI420_JPEG
 
- LR_CHI420_MPEG
 
- LR_CHI422_BILINEAR
 
- LR_CHI422_REPLICATION
 
- LR_CHIP_ID
 
- LR_DISTANCE_10K
 
- LR_DISTANCE_5K
 
- LR_DIST_FW_FIELD
 
- LR_DIST_FW_POS
 
- LR_DIST_FW_SHIFT
 
- LR_DIST_NV_POS
 
- LR_HW_CONTEXT_SIZE
 
- LR_INV
 
- LR_MIX
 
- LR_SAVE
 
- LR_SHIFT_FLOW
 
- LR_SHIFT_NO_FLOW
 
- LR_STATUS_SWAP
 
- LR_SWAP
 
- LS
 
- LS1021A_AXICC_ADDR
 
- LS1021A_LAYER_REG_NUM
 
- LS1021A_LPUART
 
- LS1021A_PORT_PHY2
 
- LS1021A_PORT_PHY3
 
- LS1021A_PORT_PHY4
 
- LS1021A_PORT_PHY5
 
- LS1X_AC97_BASE
 
- LS1X_AC97_IRQ
 
- LS1X_ADC_IRQ
 
- LS1X_CAM_IRQ
 
- LS1X_CAN0_BASE
 
- LS1X_CAN0_IRQ
 
- LS1X_CAN1_BASE
 
- LS1X_CAN1_IRQ
 
- LS1X_CBUS_BASE
 
- LS1X_CBUS_FIFTHT
 
- LS1X_CBUS_FIRST
 
- LS1X_CBUS_FOURTHT
 
- LS1X_CBUS_REG
 
- LS1X_CBUS_SECOND
 
- LS1X_CBUS_THIRD
 
- LS1X_CLK_BASE
 
- LS1X_CLK_PLL_DIV
 
- LS1X_CLK_PLL_FREQ
 
- LS1X_CLK_REG
 
- LS1X_DAY_MASK
 
- LS1X_DAY_OFFSET
 
- LS1X_DMA0_IRQ
 
- LS1X_DMA1_IRQ
 
- LS1X_DMA2_IRQ
 
- LS1X_DMAC_BASE
 
- LS1X_DMA_CHANNEL0
 
- LS1X_DMA_CHANNEL1
 
- LS1X_DMA_CHANNEL2
 
- LS1X_EHCI_BASE
 
- LS1X_EHCI_IRQ
 
- LS1X_GMAC0_BASE
 
- LS1X_GMAC0_IRQ
 
- LS1X_GMAC1_BASE
 
- LS1X_GMAC1_IRQ
 
- LS1X_GPIO0_BASE
 
- LS1X_GPIO1_BASE
 
- LS1X_HOUR_MASK
 
- LS1X_HOUR_OFFSET
 
- LS1X_I2C0_BASE
 
- LS1X_I2C0_IRQ
 
- LS1X_I2C1_BASE
 
- LS1X_I2C1_IRQ
 
- LS1X_I2C2_BASE
 
- LS1X_I2C2_IRQ
 
- LS1X_INTC_BASE
 
- LS1X_INTC_INTCLR
 
- LS1X_INTC_INTEDGE
 
- LS1X_INTC_INTIEN
 
- LS1X_INTC_INTISR
 
- LS1X_INTC_INTPOL
 
- LS1X_INTC_INTSET
 
- LS1X_INTC_REG
 
- LS1X_IRQ
 
- LS1X_IRQS
 
- LS1X_IRQ_BASE
 
- LS1X_MIN_MASK
 
- LS1X_MIN_OFFSET
 
- LS1X_MONTH_MASK
 
- LS1X_MONTH_OFFSET
 
- LS1X_MUX_BASE
 
- LS1X_MUX_CTRL0
 
- LS1X_MUX_CTRL1
 
- LS1X_MUX_REG
 
- LS1X_NAND_BASE
 
- LS1X_NAND_IRQ
 
- LS1X_OHCI_BASE
 
- LS1X_OHCI_IRQ
 
- LS1X_OTG_IRQ
 
- LS1X_PWM0_BASE
 
- LS1X_PWM0_IRQ
 
- LS1X_PWM1_BASE
 
- LS1X_PWM1_IRQ
 
- LS1X_PWM2_BASE
 
- LS1X_PWM2_IRQ
 
- LS1X_PWM3_BASE
 
- LS1X_PWM3_IRQ
 
- LS1X_RTC_BASE
 
- LS1X_RTC_CTRL
 
- LS1X_RTC_INT0_IRQ
 
- LS1X_RTC_INT1_IRQ
 
- LS1X_RTC_INT2_IRQ
 
- LS1X_RTC_REG
 
- LS1X_RTC_REGS
 
- LS1X_RTC_REG_OFFSET
 
- LS1X_RTC_TICK_IRQ
 
- LS1X_SDIO_IRQ
 
- LS1X_SEC_MASK
 
- LS1X_SEC_OFFSET
 
- LS1X_SPI0_IRQ
 
- LS1X_SPI1_IRQ
 
- LS1X_TIMER_BASE
 
- LS1X_TIMER_IRQ
 
- LS1X_TOY_INT0_IRQ
 
- LS1X_TOY_INT1_IRQ
 
- LS1X_TOY_INT2_IRQ
 
- LS1X_TOY_TICK_IRQ
 
- LS1X_UART
 
- LS1X_UART0_BASE
 
- LS1X_UART0_IRQ
 
- LS1X_UART10_IRQ
 
- LS1X_UART11_IRQ
 
- LS1X_UART1_BASE
 
- LS1X_UART1_IRQ
 
- LS1X_UART2_BASE
 
- LS1X_UART2_IRQ
 
- LS1X_UART3_BASE
 
- LS1X_UART3_IRQ
 
- LS1X_UART4_IRQ
 
- LS1X_UART5_IRQ
 
- LS1X_UART6_IRQ
 
- LS1X_UART7_IRQ
 
- LS1X_UART8_IRQ
 
- LS1X_UART9_IRQ
 
- LS1X_WDT_BASE
 
- LS1X_YEAR_MASK
 
- LS2MIB
 
- LS2_EXIT_TIME
 
- LS2_EXIT_TIME_MASK
 
- LS2_EXIT_TIME_SHIFT
 
- LSAVE_A0
 
- LSAVE_A1
 
- LSAVE_A2
 
- LSAVE_A3
 
- LSAVE_A4
 
- LSAVE_A5
 
- LSAVE_DIRTY
 
- LSAVE_PC
 
- LSAVE_PSR
 
- LSA_CTRL_REG_1
 
- LSB
 
- LSBCRC0
 
- LSBONLY
 
- LSB_ENTRY_NUMBER
 
- LSB_FIRST
 
- LSB_ITEM_SIZE
 
- LSB_PRIVATE_MASK_HI_OFFSET
 
- LSB_PRIVATE_MASK_LO_OFFSET
 
- LSB_PUBLIC_MASK_HI_OFFSET
 
- LSB_PUBLIC_MASK_LO_OFFSET
 
- LSB_REGION_WIDTH
 
- LSB_SIZE
 
- LSB_XY_INDEX
 
- LSB_of
 
- LSC
 
- LSCCFG1
 
- LSCCFG2
 
- LSCCFG2_DEFAULT
 
- LSCH0
 
- LSCHVAL
 
- LSCKH
 
- LSCKV
 
- LSCLK_DIV_1
 
- LSCLK_DIV_2
 
- LSCMEMCTL
 
- LSCMEMD
 
- LSCMEMQ
 
- LSCR1_CLS_RISE_DELAY
 
- LSCR1_GRAY1
 
- LSCR1_GRAY2
 
- LSCR1_PS_RISE_DELAY
 
- LSCR1_REV_TOGGLE_DELAY
 
- LSCSA_BYTE_OFFSET
 
- LSCSA_QW_OFFSET
 
- LSCStatus
 
- LSCV0
 
- LSCVVAL
 
- LSC_INITADDRESS
 
- LSC_PROGINCRNV
 
- LSC_READ_STATUS
 
- LSC_REFRESH
 
- LSC_SCODE_CMD_FAILED
 
- LSC_SCODE_CMD_PARAM_ERR
 
- LSC_SCODE_ELS_REJECT
 
- LSC_SCODE_FW_NOT_READY
 
- LSC_SCODE_LOGGED_IN
 
- LSC_SCODE_NOFABRIC
 
- LSC_SCODE_NOFLOGI_ACC
 
- LSC_SCODE_NOIOCB
 
- LSC_SCODE_NOLINK
 
- LSC_SCODE_NONPORT
 
- LSC_SCODE_NOPCB
 
- LSC_SCODE_NOT_LOGGED_IN
 
- LSC_SCODE_NOXCB
 
- LSC_SCODE_NPORT_USED
 
- LSC_SCODE_PORTID_USED
 
- LSC_STATE_RECONFIG
 
- LSC_STATE_RUNNING
 
- LSC_STATE_STOPPED
 
- LSC_STATE_STOPPING
 
- LSD
 
- LSDW
 
- LSEL
 
- LSEN
 
- LSEQ0INT
 
- LSEQ0_HOST_REG_BASE_ADR
 
- LSEQ1INT
 
- LSEQ1_HOST_REG_BASE_ADR
 
- LSEQ2INT
 
- LSEQ2_HOST_REG_BASE_ADR
 
- LSEQ3INT
 
- LSEQ3_HOST_REG_BASE_ADR
 
- LSEQ4INT
 
- LSEQ4_HOST_REG_BASE_ADR
 
- LSEQ5INT
 
- LSEQ5_HOST_REG_BASE_ADR
 
- LSEQ6INT
 
- LSEQ6_HOST_REG_BASE_ADR
 
- LSEQ7INT
 
- LSEQ7_HOST_REG_BASE_ADR
 
- LSEQINT_MASK
 
- LSEQRAM
 
- LSEQ_CODEPAGE_SIZE
 
- LSEQ_MODE5_PAGE0_OFFSET
 
- LSEQ_MODE_SCRATCH_SIZE
 
- LSEQ_NUM_VECS
 
- LSEQ_PAGE_SIZE
 
- LSEXP_ASSOC_HDR_REQ
 
- LSEXP_CANT_GIVE_DATA
 
- LSEXP_CMD_IN_PROGRESS
 
- LSEXP_INACTIVE_XCHG
 
- LSEXP_INVALID_ASSOC_HDR
 
- LSEXP_INVALID_CSP
 
- LSEXP_INVALID_NNAME
 
- LSEXP_INVALID_NPORT_ID
 
- LSEXP_INVALID_OX_RX
 
- LSEXP_INVALID_O_SID
 
- LSEXP_INVALID_PNAME
 
- LSEXP_INVALID_SEQ_ID
 
- LSEXP_INVALID_XCHG
 
- LSEXP_NOTHING_MORE
 
- LSEXP_OUT_OF_RESOURCE
 
- LSEXP_PORT_LOGIN_REQ
 
- LSEXP_REQ_UNSUPPORTED
 
- LSEXP_RQ_REQUIRED
 
- LSEXP_SPARM_CONCUR_SEQ
 
- LSEXP_SPARM_CREDIT
 
- LSEXP_SPARM_ICTL
 
- LSEXP_SPARM_OPTIONS
 
- LSEXP_SPARM_RCTL
 
- LSEXP_SPARM_RCV_SIZE
 
- LSE_CK
 
- LSFL_CB_DELAY
 
- LSFL_NODIR
 
- LSFL_RCOM_READY
 
- LSFL_RCOM_WAIT
 
- LSFL_RECOVER_DOWN
 
- LSFL_RECOVER_LOCK
 
- LSFL_RECOVER_STOP
 
- LSFL_RECOVER_WORK
 
- LSFL_RUNNING
 
- LSFL_TIMEWARN
 
- LSFL_UEVENT_WAIT
 
- LSF_BL_CODE_SIZE_ALIGN
 
- LSF_BL_DATA_ALIGN
 
- LSF_BL_DATA_SIZE_ALIGN
 
- LSF_FLAG_DMACTL_REQ_CTX
 
- LSF_FLAG_FORCE_PRIV_LOAD
 
- LSF_FLAG_LOAD_CODE_AT_0
 
- LSF_IMAGE_STATUS_BOOTSTRAP_READY
 
- LSF_IMAGE_STATUS_COPY
 
- LSF_IMAGE_STATUS_NONE
 
- LSF_IMAGE_STATUS_REVOCATION_CHECK_FAILED
 
- LSF_IMAGE_STATUS_VALIDATION_CODE_FAILED
 
- LSF_IMAGE_STATUS_VALIDATION_DATA_FAILED
 
- LSF_IMAGE_STATUS_VALIDATION_DONE
 
- LSF_IMAGE_STATUS_VALIDATION_SKIPPED
 
- LSF_LSB_DEPMAP_SIZE
 
- LSF_LSB_HEADER_ALIGN
 
- LSF_UCODE_DATA_ALIGN
 
- LSG
 
- LSI0_BD
 
- LSI0_BS
 
- LSI0_CTL
 
- LSI0_TO
 
- LSI1_BD
 
- LSI1_BS
 
- LSI1_CTL
 
- LSI1_TO
 
- LSI2_BD
 
- LSI2_BS
 
- LSI2_CTL
 
- LSI2_TO
 
- LSI3_BD
 
- LSI3_BS
 
- LSI3_CTL
 
- LSI3_TO
 
- LSI4_BD
 
- LSI4_BS
 
- LSI4_CTL
 
- LSI4_TO
 
- LSI5_BD
 
- LSI5_BS
 
- LSI5_CTL
 
- LSI5_TO
 
- LSI6_BD
 
- LSI6_BS
 
- LSI6_CTL
 
- LSI6_TO
 
- LSI7_BD
 
- LSI7_BS
 
- LSI7_CTL
 
- LSI7_TO
 
- LSIGEN
 
- LSIO_FSPI_0_LPCG
 
- LSIO_FSPI_1_LPCG
 
- LSIO_GPIO_0_LPCG
 
- LSIO_GPIO_1_LPCG
 
- LSIO_GPIO_2_LPCG
 
- LSIO_GPIO_3_LPCG
 
- LSIO_GPIO_4_LPCG
 
- LSIO_GPIO_5_LPCG
 
- LSIO_GPIO_6_LPCG
 
- LSIO_GPIO_7_LPCG
 
- LSIO_GPT_0_LPCG
 
- LSIO_GPT_1_LPCG
 
- LSIO_GPT_2_LPCG
 
- LSIO_GPT_3_LPCG
 
- LSIO_GPT_4_LPCG
 
- LSIO_KPP_LPCG
 
- LSIO_OCRAM_LPCG
 
- LSIO_PWM_0_LPCG
 
- LSIO_PWM_1_LPCG
 
- LSIO_PWM_2_LPCG
 
- LSIO_PWM_3_LPCG
 
- LSIO_PWM_4_LPCG
 
- LSIO_PWM_5_LPCG
 
- LSIO_PWM_6_LPCG
 
- LSIO_PWM_7_LPCG
 
- LSIO_ROMCP_LPCG
 
- LSIZE_SH
 
- LSIZE_SYM
 
- LSI_CK
 
- LSI_COMMON_MOD_EXT_VERSION
 
- LSI_COMMON_MOD_VERSION
 
- LSI_DBGLVL
 
- LSI_L64815
 
- LSI_MAX_CHANNELS
 
- LSI_MAX_LOGICAL_DRIVES_64LD
 
- LSI_MEGARAID_SAS_H
 
- LSM303AGR
 
- LSM303AGR_ACCEL_DEV_NAME
 
- LSM303AGR_MAGN_DEV_NAME
 
- LSM303DL
 
- LSM303DLH
 
- LSM303DLHC
 
- LSM303DLHC_ACCEL_DEV_NAME
 
- LSM303DLHC_MAGN_DEV_NAME
 
- LSM303DLH_ACCEL_DEV_NAME
 
- LSM303DLH_MAGN_DEV_NAME
 
- LSM303DLM
 
- LSM303DLM_ACCEL_DEV_NAME
 
- LSM303DLM_MAGN_DEV_NAME
 
- LSM303DL_ACCEL_DEV_NAME
 
- LSM330
 
- LSM330D
 
- LSM330DL
 
- LSM330DLC
 
- LSM330DLC_ACCEL_DEV_NAME
 
- LSM330DLC_GYRO_DEV_NAME
 
- LSM330DL_ACCEL_DEV_NAME
 
- LSM330DL_GYRO_DEV_NAME
 
- LSM330D_ACCEL_DEV_NAME
 
- LSM330D_GYRO_DEV_NAME
 
- LSM330_ACCEL_DEV_NAME
 
- LSM330_GYRO_DEV_NAME
 
- LSM9DS0_GYRO_DEV_NAME
 
- LSM9DS1_MAGN_DEV_NAME
 
- LSMODE
 
- LSM_AUDIT_DATA_CAP
 
- LSM_AUDIT_DATA_DENTRY
 
- LSM_AUDIT_DATA_FILE
 
- LSM_AUDIT_DATA_IBENDPORT
 
- LSM_AUDIT_DATA_IBPKEY
 
- LSM_AUDIT_DATA_INODE
 
- LSM_AUDIT_DATA_IOCTL_OP
 
- LSM_AUDIT_DATA_IPC
 
- LSM_AUDIT_DATA_KEY
 
- LSM_AUDIT_DATA_KMOD
 
- LSM_AUDIT_DATA_NET
 
- LSM_AUDIT_DATA_NONE
 
- LSM_AUDIT_DATA_PATH
 
- LSM_AUDIT_DATA_TASK
 
- LSM_COUNT
 
- LSM_DIR_OPS
 
- LSM_FLAG_EXCLUSIVE
 
- LSM_FLAG_LEGACY_MAJOR
 
- LSM_HOOK_INIT
 
- LSM_OBJ_ROLE
 
- LSM_OBJ_TYPE
 
- LSM_OBJ_USER
 
- LSM_ORDER_FIRST
 
- LSM_ORDER_MUTABLE
 
- LSM_POLICY_CHANGE
 
- LSM_PRLIMIT_READ
 
- LSM_PRLIMIT_WRITE
 
- LSM_SETID_FS
 
- LSM_SETID_ID
 
- LSM_SETID_RE
 
- LSM_SETID_RES
 
- LSM_SUBJ_ROLE
 
- LSM_SUBJ_TYPE
 
- LSM_SUBJ_USER
 
- LSM_TABLE
 
- LSM_UNSAFE_NO_NEW_PRIVS
 
- LSM_UNSAFE_PTRACE
 
- LSM_UNSAFE_SHARE
 
- LSN
 
- LSO6_ABORT
 
- LSO6_SEND_OFLOW
 
- LSO6_SM_ERR_ALARM
 
- LSO7_ABORT
 
- LSO7_SEND_OFLOW
 
- LSO7_SM_ERR_ALARM
 
- LSO_ETHHDR_LEN_S
 
- LSO_ETHHDR_LEN_V
 
- LSO_FIRST_SLICE_F
 
- LSO_FIRST_SLICE_S
 
- LSO_FIRST_SLICE_V
 
- LSO_IPHDR_LEN_S
 
- LSO_IPHDR_LEN_V
 
- LSO_IPV6_F
 
- LSO_IPV6_S
 
- LSO_IPV6_V
 
- LSO_LAST_SLICE_F
 
- LSO_LAST_SLICE_S
 
- LSO_LAST_SLICE_V
 
- LSO_OPCODE_S
 
- LSO_OPCODE_V
 
- LSO_T5_XFER_SIZE_S
 
- LSO_T5_XFER_SIZE_V
 
- LSO_TCPHDR_LEN_S
 
- LSO_TCPHDR_LEN_V
 
- LSP0_148M5
 
- LSP0_24M
 
- LSP0_32K
 
- LSP0_74M25
 
- LSP0_99M
 
- LSP0_GPIO_CLK
 
- LSP0_GPIO_PCLK
 
- LSP0_GPIO_WCLK
 
- LSP0_I2C3_CLK
 
- LSP0_I2C3_PCLK
 
- LSP0_I2C3_WCLK
 
- LSP0_I2C4_CLK
 
- LSP0_I2C4_PCLK
 
- LSP0_I2C4_WCLK
 
- LSP0_I2C5_CLK
 
- LSP0_I2C5_PCLK
 
- LSP0_I2C5_WCLK
 
- LSP0_NR_CLKS
 
- LSP0_SPIFC0_CLK
 
- LSP0_SPIFC0_PCLK
 
- LSP0_SPIFC0_WCLK
 
- LSP0_SSP0_CLK
 
- LSP0_SSP0_PCLK
 
- LSP0_SSP0_WCLK
 
- LSP0_SSP1_CLK
 
- LSP0_SSP1_PCLK
 
- LSP0_SSP1_WCLK
 
- LSP0_TIMER3_CLK
 
- LSP0_TIMER3_PCLK
 
- LSP0_TIMER3_WCLK
 
- LSP0_TIMER4_CLK
 
- LSP0_TIMER4_PCLK
 
- LSP0_TIMER4_WCLK
 
- LSP0_TIMER5_CLK
 
- LSP0_TIMER5_PCLK
 
- LSP0_TIMER5_WCLK
 
- LSP0_UART1_CLK
 
- LSP0_UART1_PCLK
 
- LSP0_UART1_WCLK
 
- LSP0_UART2_CLK
 
- LSP0_UART2_PCLK
 
- LSP0_UART2_WCLK
 
- LSP0_UART3_CLK
 
- LSP0_UART3_PCLK
 
- LSP0_UART3_WCLK
 
- LSP0_USIM0_CLK
 
- LSP0_USIM_PCLK
 
- LSP0_USIM_WCLK
 
- LSP1_148M5
 
- LSP1_24M
 
- LSP1_99M
 
- LSP1_I2C2_CLK
 
- LSP1_I2C2_PCLK
 
- LSP1_I2C2_WCLK
 
- LSP1_NR_CLKS
 
- LSP1_PWM_CLK
 
- LSP1_PWM_PCLK
 
- LSP1_PWM_WCLK
 
- LSP1_SSP2_CLK
 
- LSP1_SSP2_PCLK
 
- LSP1_SSP2_WCLK
 
- LSP1_SSP3_CLK
 
- LSP1_SSP3_PCLK
 
- LSP1_SSP3_WCLK
 
- LSP1_SSP4_CLK
 
- LSP1_SSP4_PCLK
 
- LSP1_SSP4_WCLK
 
- LSP1_UART4_CLK
 
- LSP1_UART4_PCLK
 
- LSP1_UART4_WCLK
 
- LSP1_UART5_CLK
 
- LSP1_UART5_PCLK
 
- LSP1_UART5_WCLK
 
- LSP1_USIM1_CLK
 
- LSP1_USIM1_PCLK
 
- LSP1_USIM1_WCLK
 
- LSPCON_MCA_AVI_IF_CTRL
 
- LSPCON_MCA_AVI_IF_HANDLED
 
- LSPCON_MCA_AVI_IF_KICKOFF
 
- LSPCON_MCA_AVI_IF_WRITE_OFFSET
 
- LSPCON_PARADE_AVI_IF_CTRL
 
- LSPCON_PARADE_AVI_IF_DATA_SIZE
 
- LSPCON_PARADE_AVI_IF_KICKOFF
 
- LSPCON_PARADE_AVI_IF_WRITE_OFFSET
 
- LSPCON_VENDOR_MCA
 
- LSPCON_VENDOR_MCA_OUI
 
- LSPCON_VENDOR_PARADE
 
- LSPCON_VENDOR_PARADE_OUI
 
- LSR
 
- LSRJT_CMD_UNSUPPORTED
 
- LSRJT_INVALID_CMD
 
- LSRJT_LOGICAL_BSY
 
- LSRJT_LOGICAL_ERR
 
- LSRJT_PROTOCOL_ERR
 
- LSRJT_UNABLE_TPC
 
- LSRJT_VENDOR_UNIQUE
 
- LSRS_SWAP
 
- LSR_BI
 
- LSR_BREAK
 
- LSR_DR
 
- LSR_ERR
 
- LSR_FE
 
- LSR_FIFOE
 
- LSR_FIFO_ERR
 
- LSR_FRM_ERR
 
- LSR_OE
 
- LSR_OVER_ERR
 
- LSR_PAR_ERR
 
- LSR_PE
 
- LSR_RXC
 
- LSR_RX_AVAIL
 
- LSR_SAVE_FLAGS
 
- LSR_TDRQ
 
- LSR_TEMT
 
- LSR_THRE
 
- LSR_TSRE
 
- LSR_TX_ALL_EMPTY
 
- LSR_TX_EMPTY
 
- LSSA
 
- LSSA_ADDR
 
- LSSA_SSA_MASK
 
- LSS_MAX_DEVS
 
- LSS_MAX_SHARED_DEVS
 
- LSS_PWS_BITS
 
- LSS_WS_BITS
 
- LSTATE_ACTIVE
 
- LSTATE_ARMED
 
- LSTATE_DOWN
 
- LSTATE_INIT
 
- LSTATE_SSB
 
- LSTATS
 
- LSTHRESH
 
- LSTN
 
- LSTRB
 
- LSU_CERRLOG_REGID
 
- LSU_CONTROL_DC
 
- LSU_CONTROL_DM
 
- LSU_CONTROL_FM
 
- LSU_CONTROL_IC
 
- LSU_CONTROL_IM
 
- LSU_CONTROL_PM
 
- LSU_CONTROL_PR
 
- LSU_CONTROL_PW
 
- LSU_CONTROL_VM
 
- LSU_CONTROL_VR
 
- LSU_CONTROL_VW
 
- LSU_DEBUG_ADDR
 
- LSU_DEBUG_DATA0
 
- LSU_DEFEATURE
 
- LSW
 
- LSWAP_L0SEL
 
- LSWAP_L1SEL
 
- LSWAP_L2SEL
 
- LSWAP_L3SEL
 
- LSWAP_REG
 
- LS_32
 
- LS_32_1
 
- LS_64
 
- LS_64BITS
 
- LS_64_1
 
- LS_8023_SP
 
- LS_ADDR_MASK
 
- LS_BOX
 
- LS_BYTE
 
- LS_CHIP_ID
 
- LS_CLK_DOMAIN_FUNC_EN_N
 
- LS_DEGRADE
 
- LS_DEVICE_NAME_MAX
 
- LS_DIRTY
 
- LS_DOWN
 
- LS_EXT
 
- LS_HASH
 
- LS_HGL_GPIO_AUTO_POWER
 
- LS_HGL_GPIO_HDD_POWER
 
- LS_HGL_GPIO_KEY_AUTOPOWER
 
- LS_HGL_GPIO_KEY_FUNC
 
- LS_HGL_GPIO_KEY_POWER
 
- LS_HGL_GPIO_LED_ALARM
 
- LS_HGL_GPIO_LED_FUNC
 
- LS_HGL_GPIO_LED_INFO
 
- LS_HGL_GPIO_LED_PWR
 
- LS_HGL_GPIO_POWER
 
- LS_HGL_GPIO_USB_POWER
 
- LS_HGL_NOR_BOOT_BASE
 
- LS_HGL_NOR_BOOT_SIZE
 
- LS_HGL_SW_AUTOPOWER
 
- LS_HGL_SW_POWER
 
- LS_IGNORE_ERATT
 
- LS_JSTS
 
- LS_KSTS
 
- LS_LOOPBACK_MODE
 
- LS_MDS_LINK_DOWN
 
- LS_MDS_LOOPBACK
 
- LS_MIXER_GAIN_FUNCTION
 
- LS_MIXER_IN
 
- LS_NLA_TYPE_DGID
 
- LS_NLA_TYPE_IPV4
 
- LS_NLA_TYPE_IPV6
 
- LS_NLA_TYPE_MAX
 
- LS_NLA_TYPE_PATH_RECORD
 
- LS_NLA_TYPE_PKEY
 
- LS_NLA_TYPE_QOS_CLASS
 
- LS_NLA_TYPE_SERVICE_ID
 
- LS_NLA_TYPE_SGID
 
- LS_NLA_TYPE_TCLASS
 
- LS_NLA_TYPE_TIMEOUT
 
- LS_NLA_TYPE_UNSPEC
 
- LS_NONE1
 
- LS_NONE2
 
- LS_NPIV_FAB_SUPPORTED
 
- LS_OVERHEAD
 
- LS_OVERHEAD_TYPE
 
- LS_OVERRIDE
 
- LS_PRIO
 
- LS_RECOVER
 
- LS_REG_INTC_CLR
 
- LS_REG_INTC_EDGE
 
- LS_REG_INTC_EN
 
- LS_REG_INTC_POL
 
- LS_REG_INTC_SET
 
- LS_REG_INTC_STATUS
 
- LS_RESOLVE_PATH_USE_ALL
 
- LS_RESOLVE_PATH_USE_GMP
 
- LS_RESOLVE_PATH_USE_MAX
 
- LS_RESOLVE_PATH_USE_UNIDIRECTIONAL
 
- LS_SIZE
 
- LS_SLEW
 
- LS_SRC_DECIMATOR
 
- LS_SRC_DECIMATORM
 
- LS_SRC_INTERPOLATOR
 
- LS_SRC_INTERPOLATORM
 
- LS_SRC_MERGER
 
- LS_SRC_SPLITTER
 
- LS_STAGE_OFF
 
- LS_STAGE_ON
 
- LS_START
 
- LS_UNKNOWN
 
- LS_UP
 
- LT
 
- LTAB_DIRTY
 
- LTALK_ALEN
 
- LTALK_HLEN
 
- LTALK_MTU
 
- LTC1660_CHAN
 
- LTC1660_NUM_CHANNELS
 
- LTC1660_OCTAL_CHANNELS
 
- LTC1660_REG_DAC_A
 
- LTC1660_REG_DAC_B
 
- LTC1660_REG_DAC_C
 
- LTC1660_REG_DAC_D
 
- LTC1660_REG_DAC_E
 
- LTC1660_REG_DAC_F
 
- LTC1660_REG_DAC_G
 
- LTC1660_REG_DAC_H
 
- LTC1660_REG_SLEEP
 
- LTC1660_REG_WAKE
 
- LTC2471_VREF
 
- LTC2485_CONFIG_DEFAULT
 
- LTC2497_CHAN
 
- LTC2497_CHAN_DIFF
 
- LTC2497_CONFIG_DEFAULT
 
- LTC2497_CONVERSION_TIME_MS
 
- LTC2497_DIFF
 
- LTC2497_ENABLE
 
- LTC2497_SGL
 
- LTC2497_SIGN
 
- LTC2631_INFO
 
- LTC2632_ADDR_DAC0
 
- LTC2632_ADDR_DAC1
 
- LTC2632_CHANNEL
 
- LTC2632_CMD_EXTERNAL_REFER
 
- LTC2632_CMD_INTERNAL_REFER
 
- LTC2632_CMD_POWERDOWN_CHIP
 
- LTC2632_CMD_POWERDOWN_DAC_N
 
- LTC2632_CMD_UPDATE_DAC_N
 
- LTC2632_CMD_WRITE_INPUT_N
 
- LTC2632_CMD_WRITE_INPUT_N_UPDATE_ALL
 
- LTC2632_CMD_WRITE_INPUT_N_UPDATE_N
 
- LTC2632_DAC_CHANNELS
 
- LTC2941_ID
 
- LTC2941_MAX_PRESCALER_EXP
 
- LTC2941_REG_STATUS_CHIP_ID
 
- LTC2942_ID
 
- LTC2942_REG_CONTROL_MODE_SCAN
 
- LTC2942_REG_TEMPERATURE_LSB
 
- LTC2942_REG_TEMPERATURE_MSB
 
- LTC2943_ID
 
- LTC2943_MAX_PRESCALER_EXP
 
- LTC2943_REG_CONTROL_MODE_SCAN
 
- LTC2943_REG_CURRENT_LSB
 
- LTC2943_REG_CURRENT_MSB
 
- LTC2943_REG_TEMPERATURE_LSB
 
- LTC2943_REG_TEMPERATURE_MSB
 
- LTC2944_ID
 
- LTC2945_ADIN_H
 
- LTC2945_ALERT
 
- LTC2945_CONTROL
 
- LTC2945_FAULT
 
- LTC2945_MAX_ADIN_H
 
- LTC2945_MAX_ADIN_THRES_H
 
- LTC2945_MAX_POWER_H
 
- LTC2945_MAX_POWER_THRES_H
 
- LTC2945_MAX_SENSE_H
 
- LTC2945_MAX_SENSE_THRES_H
 
- LTC2945_MAX_VIN_H
 
- LTC2945_MAX_VIN_THRES_H
 
- LTC2945_MIN_ADIN_H
 
- LTC2945_MIN_ADIN_THRES_H
 
- LTC2945_MIN_ADIN_THRES_L
 
- LTC2945_MIN_POWER_H
 
- LTC2945_MIN_POWER_THRES_H
 
- LTC2945_MIN_SENSE_H
 
- LTC2945_MIN_SENSE_THRES_H
 
- LTC2945_MIN_VIN_H
 
- LTC2945_MIN_VIN_THRES_H
 
- LTC2945_POWER_H
 
- LTC2945_SENSE_H
 
- LTC2945_STATUS
 
- LTC2945_VIN_H
 
- LTC294X_MAX_VALUE
 
- LTC294X_MID_SUPPLY
 
- LTC294X_PM_OPS
 
- LTC294X_REG_ACC_CHARGE_LSB
 
- LTC294X_REG_ACC_CHARGE_MSB
 
- LTC294X_REG_CHARGE_THR_HIGH_LSB
 
- LTC294X_REG_CHARGE_THR_HIGH_MSB
 
- LTC294X_REG_CHARGE_THR_LOW_LSB
 
- LTC294X_REG_CHARGE_THR_LOW_MSB
 
- LTC294X_REG_CONTROL
 
- LTC294X_REG_CONTROL_ADC_DISABLE
 
- LTC294X_REG_CONTROL_ALCC_CONFIG_DISABLED
 
- LTC294X_REG_CONTROL_PRESCALER_MASK
 
- LTC294X_REG_CONTROL_PRESCALER_SET
 
- LTC294X_REG_CONTROL_SHUTDOWN_MASK
 
- LTC294X_REG_STATUS
 
- LTC294X_REG_VOLTAGE_LSB
 
- LTC294X_REG_VOLTAGE_MSB
 
- LTC294X_WORK_DELAY
 
- LTC2974_ID
 
- LTC2974_MFR_IOUT_MIN
 
- LTC2974_MFR_IOUT_PEAK
 
- LTC2974_NUM_PAGES
 
- LTC2975_ID
 
- LTC2975_MFR_IIN_MIN
 
- LTC2975_MFR_IIN_PEAK
 
- LTC2975_MFR_PIN_MIN
 
- LTC2975_MFR_PIN_PEAK
 
- LTC2977_ID
 
- LTC2978_ID_MASK
 
- LTC2978_ID_REV1
 
- LTC2978_ID_REV2
 
- LTC2978_MFR_COMMON
 
- LTC2978_MFR_SPECIAL_ID
 
- LTC2978_MFR_TEMPERATURE_MIN
 
- LTC2978_MFR_TEMPERATURE_PEAK
 
- LTC2978_MFR_VIN_MIN
 
- LTC2978_MFR_VIN_PEAK
 
- LTC2978_MFR_VOUT_MIN
 
- LTC2978_MFR_VOUT_PEAK
 
- LTC2978_NUM_PAGES
 
- LTC2980_ID_A
 
- LTC2980_ID_B
 
- LTC2990_ALL
 
- LTC2990_CONTROL
 
- LTC2990_CURR1
 
- LTC2990_CURR2
 
- LTC2990_IN0
 
- LTC2990_IN1
 
- LTC2990_IN2
 
- LTC2990_IN3
 
- LTC2990_IN4
 
- LTC2990_MODE0_MASK
 
- LTC2990_MODE0_SHIFT
 
- LTC2990_MODE1_MASK
 
- LTC2990_MODE1_SHIFT
 
- LTC2990_NONE
 
- LTC2990_STATUS
 
- LTC2990_TEMP1
 
- LTC2990_TEMP2
 
- LTC2990_TEMP3
 
- LTC2990_TINT_MSB
 
- LTC2990_TRIGGER
 
- LTC2990_V1_MSB
 
- LTC2990_V2_MSB
 
- LTC2990_V3_MSB
 
- LTC2990_V4_MSB
 
- LTC2990_VCC_MSB
 
- LTC3589
 
- LTC3589_1
 
- LTC3589_2
 
- LTC3589_B1DTV1
 
- LTC3589_B1DTV2
 
- LTC3589_B2DTV1
 
- LTC3589_B2DTV2
 
- LTC3589_B3DTV1
 
- LTC3589_B3DTV2
 
- LTC3589_BB_OUT
 
- LTC3589_CLIRQ
 
- LTC3589_FIXED_REG
 
- LTC3589_IRQSTAT
 
- LTC3589_IRQSTAT_PGOOD_TIMEOUT
 
- LTC3589_IRQSTAT_THERMAL_FAULT
 
- LTC3589_IRQSTAT_THERMAL_WARN
 
- LTC3589_IRQSTAT_UNDERVOLT_FAULT
 
- LTC3589_IRQSTAT_UNDERVOLT_WARN
 
- LTC3589_L2DTV1
 
- LTC3589_L2DTV2
 
- LTC3589_LDO1
 
- LTC3589_LDO2
 
- LTC3589_LDO3
 
- LTC3589_LDO4
 
- LTC3589_LINEAR_REG
 
- LTC3589_NUM_REGULATORS
 
- LTC3589_OVEN
 
- LTC3589_OVEN_BB_OUT
 
- LTC3589_OVEN_LDO2
 
- LTC3589_OVEN_LDO3
 
- LTC3589_OVEN_LDO4
 
- LTC3589_OVEN_SW1
 
- LTC3589_OVEN_SW2
 
- LTC3589_OVEN_SW3
 
- LTC3589_OVEN_SW_CTRL
 
- LTC3589_PGSTAT
 
- LTC3589_REG
 
- LTC3589_SCR1
 
- LTC3589_SCR2
 
- LTC3589_SW1
 
- LTC3589_SW2
 
- LTC3589_SW3
 
- LTC3589_VCCR
 
- LTC3589_VCCR_LDO2_GO
 
- LTC3589_VCCR_SW1_GO
 
- LTC3589_VCCR_SW2_GO
 
- LTC3589_VCCR_SW3_GO
 
- LTC3589_VRRCR
 
- LTC3676_BUCK1
 
- LTC3676_BUCK2
 
- LTC3676_BUCK3
 
- LTC3676_BUCK4
 
- LTC3676_CLIRQ
 
- LTC3676_CNTRL
 
- LTC3676_DVB1A
 
- LTC3676_DVB1B
 
- LTC3676_DVB2A
 
- LTC3676_DVB2B
 
- LTC3676_DVB3A
 
- LTC3676_DVB3B
 
- LTC3676_DVB4A
 
- LTC3676_DVB4B
 
- LTC3676_DVBxA_REF_SELECT
 
- LTC3676_DVBxB_PGOOD_MASK
 
- LTC3676_FIXED_REG
 
- LTC3676_HRST
 
- LTC3676_IRQSTAT
 
- LTC3676_IRQSTAT_PGOOD_TIMEOUT
 
- LTC3676_IRQSTAT_THERMAL_FAULT
 
- LTC3676_IRQSTAT_THERMAL_WARN
 
- LTC3676_IRQSTAT_UNDERVOLT_FAULT
 
- LTC3676_IRQSTAT_UNDERVOLT_WARN
 
- LTC3676_LDO1
 
- LTC3676_LDO2
 
- LTC3676_LDO3
 
- LTC3676_LDO4
 
- LTC3676_LDOA
 
- LTC3676_LDOB
 
- LTC3676_LINEAR_REG
 
- LTC3676_MSKIRQ
 
- LTC3676_MSKPG
 
- LTC3676_NUM_REGULATORS
 
- LTC3676_PGSTATL
 
- LTC3676_PGSTATRT
 
- LTC3676_REG
 
- LTC3676_SQD1
 
- LTC3676_SQD2
 
- LTC3676_SW1
 
- LTC3676_SW2
 
- LTC3676_SW3
 
- LTC3676_SW4
 
- LTC3676_USER
 
- LTC3815_ID
 
- LTC3815_ID_MASK
 
- LTC3815_MFR_IIN_PEAK
 
- LTC3815_MFR_IOUT_PEAK
 
- LTC3815_MFR_SPECIAL_ID
 
- LTC3815_MFR_TEMP_PEAK
 
- LTC3815_MFR_VIN_PEAK
 
- LTC3815_MFR_VOUT_PEAK
 
- LTC3880_ID
 
- LTC3880_MFR_CLEAR_PEAKS
 
- LTC3880_MFR_IOUT_PEAK
 
- LTC3880_MFR_TEMPERATURE2_PEAK
 
- LTC3880_NUM_PAGES
 
- LTC3882_ID
 
- LTC3882_ID_D1
 
- LTC3883_ID
 
- LTC3883_MFR_IIN_PEAK
 
- LTC3883_NUM_PAGES
 
- LTC3886_ID
 
- LTC3887_ID
 
- LTC4151_ADIN_H
 
- LTC4151_ADIN_L
 
- LTC4151_SENSE_H
 
- LTC4151_SENSE_L
 
- LTC4151_VIN_H
 
- LTC4151_VIN_L
 
- LTC4215_ADIN
 
- LTC4215_ALERT
 
- LTC4215_CONTROL
 
- LTC4215_FAULT
 
- LTC4215_SENSE
 
- LTC4215_SOURCE
 
- LTC4215_STATUS
 
- LTC4222_ADC_CONTROL
 
- LTC4222_ADIN1
 
- LTC4222_ADIN2
 
- LTC4222_ALERT1
 
- LTC4222_ALERT2
 
- LTC4222_CONTROL1
 
- LTC4222_CONTROL2
 
- LTC4222_FAULT1
 
- LTC4222_FAULT2
 
- LTC4222_SENSE1
 
- LTC4222_SENSE2
 
- LTC4222_SOURCE1
 
- LTC4222_SOURCE2
 
- LTC4222_STATUS1
 
- LTC4222_STATUS2
 
- LTC4245_12VIN
 
- LTC4245_12VOUT
 
- LTC4245_12VSENSE
 
- LTC4245_3VIN
 
- LTC4245_3VOUT
 
- LTC4245_3VSENSE
 
- LTC4245_5VIN
 
- LTC4245_5VOUT
 
- LTC4245_5VSENSE
 
- LTC4245_ADCADR
 
- LTC4245_ALERT
 
- LTC4245_CONTROL
 
- LTC4245_FAULT1
 
- LTC4245_FAULT2
 
- LTC4245_GPIO
 
- LTC4245_GPIOADC
 
- LTC4245_ON
 
- LTC4245_STATUS
 
- LTC4245_VEEIN
 
- LTC4245_VEEOUT
 
- LTC4245_VEESENSE
 
- LTC4260_ADIN
 
- LTC4260_ALERT
 
- LTC4260_CONTROL
 
- LTC4260_FAULT
 
- LTC4260_SENSE
 
- LTC4260_SOURCE
 
- LTC4260_STATUS
 
- LTC4261_ADIN2_H
 
- LTC4261_ADIN2_L
 
- LTC4261_ADIN_H
 
- LTC4261_ADIN_L
 
- LTC4261_ALERT
 
- LTC4261_CONTROL
 
- LTC4261_FAULT
 
- LTC4261_SENSE_H
 
- LTC4261_SENSE_L
 
- LTC4261_STATUS
 
- LTC4305_MAX_NCHANS
 
- LTC4306_MAX_NCHANS
 
- LTCL
 
- LTCNT
 
- LTC_DOWNSTREAM_ACCL_EN
 
- LTC_GPIO_ALL_INPUT
 
- LTC_NOT_BUSY
 
- LTC_NOT_PENDING
 
- LTC_POLL_TIMEOUT
 
- LTC_REG_CONFIG
 
- LTC_REG_MODE
 
- LTC_REG_STATUS
 
- LTC_REG_SWITCH
 
- LTC_SWITCH_MASK
 
- LTC_UPSTREAM_ACCL_EN
 
- LTDC
 
- LTDC_AWCR
 
- LTDC_BCCR
 
- LTDC_BPCR
 
- LTDC_CDSR
 
- LTDC_CK
 
- LTDC_CPSR
 
- LTDC_GACR
 
- LTDC_GC1R
 
- LTDC_GC2R
 
- LTDC_GCR
 
- LTDC_ICR
 
- LTDC_IDR
 
- LTDC_IER
 
- LTDC_ISR
 
- LTDC_L1AFBAR
 
- LTDC_L1AFBCR
 
- LTDC_L1AFBLNR
 
- LTDC_L1AFBLR
 
- LTDC_L1BFCR
 
- LTDC_L1CACR
 
- LTDC_L1CFBAR
 
- LTDC_L1CFBLNR
 
- LTDC_L1CFBLR
 
- LTDC_L1CKCR
 
- LTDC_L1CLUTWR
 
- LTDC_L1CR
 
- LTDC_L1DCCR
 
- LTDC_L1FBBCR
 
- LTDC_L1LC1R
 
- LTDC_L1LC2R
 
- LTDC_L1PFCR
 
- LTDC_L1WHPCR
 
- LTDC_L1WVPCR
 
- LTDC_L1YS1R
 
- LTDC_L1YS2R
 
- LTDC_LCR
 
- LTDC_LIPCR
 
- LTDC_MAX_LAYER
 
- LTDC_PX
 
- LTDC_R
 
- LTDC_SRCR
 
- LTDC_SSCR
 
- LTDC_TWCR
 
- LTD_HV_HL_REG
 
- LTD_HV_LL_REG
 
- LTD_HV_REG
 
- LTD_LV_HL_REG
 
- LTD_LV_LL_REG
 
- LTECCR_CLEAR
 
- LTECOEX_ACCESS_CTRL
 
- LTECOEX_READY
 
- LTECOEX_READ_DATA
 
- LTECOEX_WRITE_DATA
 
- LTEDR_ENABLE
 
- LTEIR_ENABLE
 
- LTEMPHIL
 
- LTEQT
 
- LTESR_ATMR
 
- LTESR_ATMW
 
- LTESR_BM
 
- LTESR_CC
 
- LTESR_CLEAR
 
- LTESR_CS
 
- LTESR_FCT
 
- LTESR_MASK
 
- LTESR_NAND_MASK
 
- LTESR_PAR
 
- LTESR_STATUS
 
- LTESR_UPM
 
- LTESR_WP
 
- LTE_AT_CMD_FROM_DEVICE
 
- LTE_AT_CMD_FROM_DEVICE_EXT
 
- LTE_AT_CMD_TO_DEVICE
 
- LTE_AT_CMD_TO_DEVICE_EXT
 
- LTE_BT_TRX_CTRL
 
- LTE_COEX_CTRL
 
- LTE_DL_SDU_FLOW_CONTROL
 
- LTE_GET_INFORMATION
 
- LTE_GET_INFORMATION_RESULT
 
- LTE_LINK_ON_OFF_INDICATION
 
- LTE_NV_RESTORE_REQUEST
 
- LTE_NV_RESTORE_RESPONSE
 
- LTE_NV_SAVE_REQUEST
 
- LTE_NV_SAVE_RESPONSE
 
- LTE_PDN_TABLE_IND
 
- LTE_RX_MULTI_SDU
 
- LTE_RX_SDU
 
- LTE_SDIO_DM_RECV_PKT
 
- LTE_SDIO_DM_SEND_PKT
 
- LTE_TX_MULTI_SDU
 
- LTE_TX_SDU
 
- LTE_UL_SDU_FLOW_CONTROL
 
- LTE_WL_TRX_CTRL
 
- LTIME_MASK
 
- LTINTEN
 
- LTINT_BIT
 
- LTI_RATIO
 
- LTI_RATIO_MASK
 
- LTI_RATIO_SHIFT
 
- LTLEECSR_ENABLE_ALL
 
- LTM10C209
 
- LTM2987_ID_A
 
- LTM2987_ID_B
 
- LTM4675_ID
 
- LTM4676A_ID
 
- LTM4676_ID_REV1
 
- LTM4676_ID_REV2
 
- LTM4686_ID
 
- LTMODE
 
- LTMODE_BIT8
 
- LTM_BELT_ACT0
 
- LTM_BELT_ACT0_ACT1000_
 
- LTM_BELT_ACT0_ACT100_
 
- LTM_BELT_ACT1
 
- LTM_BELT_ACT1_ACT10_
 
- LTM_BELT_IDLE0
 
- LTM_BELT_IDLE0_IDLE1000_
 
- LTM_BELT_IDLE0_IDLE100_
 
- LTM_BELT_IDLE1
 
- LTM_BELT_IDLE1_IDLE10_
 
- LTM_ENABLE
 
- LTM_INACTIVE0
 
- LTM_INACTIVE0_TIMER1000_
 
- LTM_INACTIVE0_TIMER100_
 
- LTM_INACTIVE1
 
- LTM_INACTIVE1_TIMER10_
 
- LTQ_ASC0_BASE_ADDR
 
- LTQ_ASC1_BASE_ADDR
 
- LTQ_ASC_BG
 
- LTQ_ASC_CLC
 
- LTQ_ASC_CON
 
- LTQ_ASC_FSTAT
 
- LTQ_ASC_ID
 
- LTQ_ASC_IRNCR
 
- LTQ_ASC_IRNREN
 
- LTQ_ASC_PISEL
 
- LTQ_ASC_RBUF
 
- LTQ_ASC_RXFCON
 
- LTQ_ASC_STATE
 
- LTQ_ASC_TBUF
 
- LTQ_ASC_TXFCON
 
- LTQ_ASC_WHBSTATE
 
- LTQ_CGU_IFCCR
 
- LTQ_CGU_PCICR
 
- LTQ_DESC_NUM
 
- LTQ_DESC_SIZE
 
- LTQ_DMA_C
 
- LTQ_DMA_CCTRL
 
- LTQ_DMA_CDBA
 
- LTQ_DMA_CDLEN
 
- LTQ_DMA_CH0_INT
 
- LTQ_DMA_CIE
 
- LTQ_DMA_CIS
 
- LTQ_DMA_CPOLL
 
- LTQ_DMA_CS
 
- LTQ_DMA_CTRL
 
- LTQ_DMA_EOP
 
- LTQ_DMA_H__
 
- LTQ_DMA_ID
 
- LTQ_DMA_IRNEN
 
- LTQ_DMA_OWN
 
- LTQ_DMA_PCTRL
 
- LTQ_DMA_PS
 
- LTQ_DMA_RX_OFFSET
 
- LTQ_DMA_SIZE_MASK
 
- LTQ_DMA_SOP
 
- LTQ_DMA_TX_OFFSET
 
- LTQ_EARLY_ASC
 
- LTQ_EBU_ADDRSEL1
 
- LTQ_EBU_BUSCON
 
- LTQ_EBU_BUSCON0
 
- LTQ_EBU_BUSCON1
 
- LTQ_EBU_PCC_CON
 
- LTQ_EBU_PCC_IEN
 
- LTQ_EBU_PCC_ISTAT
 
- LTQ_EBU_WP
 
- LTQ_EIU_EXIN_C
 
- LTQ_EIU_EXIN_INC
 
- LTQ_EIU_EXIN_INEN
 
- LTQ_EIU_EXIN_INIC
 
- LTQ_ETOP_CFG
 
- LTQ_ETOP_ENETS0
 
- LTQ_ETOP_IGPLEN
 
- LTQ_ETOP_MAC_DA0
 
- LTQ_ETOP_MAC_DA1
 
- LTQ_ETOP_MDIO
 
- LTQ_ETOP_RX_CHANNEL
 
- LTQ_ETOP_TX_CHANNEL
 
- LTQ_FALCON_SYS1_CPU0RS
 
- LTQ_FALCON_SYS1_CPU0RS_MASK
 
- LTQ_FALCON_SYS1_CPU0RS_WDT
 
- LTQ_ICU_EBU_IRQ
 
- LTQ_ICU_IER
 
- LTQ_ICU_IMR
 
- LTQ_ICU_IM_SIZE
 
- LTQ_ICU_IOSR
 
- LTQ_ICU_IRSR
 
- LTQ_ICU_ISR
 
- LTQ_MAX_MUX
 
- LTQ_MPS_BASE_ADDR
 
- LTQ_MPS_CHIPID
 
- LTQ_NOR_NORMAL
 
- LTQ_NOR_PROBING
 
- LTQ_PADC_AVAIL
 
- LTQ_PADC_DCC
 
- LTQ_PADC_MUX
 
- LTQ_PADC_PDEN
 
- LTQ_PADC_PUEN
 
- LTQ_PADC_SRC
 
- LTQ_PCI_CFG_BUSNUM_SHF
 
- LTQ_PCI_CFG_DEVNUM_SHF
 
- LTQ_PCI_CFG_FUNNUM_SHF
 
- LTQ_PERF_IRQ
 
- LTQ_PINCONF_PACK
 
- LTQ_PINCONF_PARAM_DRIVE_CURRENT
 
- LTQ_PINCONF_PARAM_OPEN_DRAIN
 
- LTQ_PINCONF_PARAM_OUTPUT
 
- LTQ_PINCONF_PARAM_PULL
 
- LTQ_PINCONF_PARAM_SLEW_RATE
 
- LTQ_PINCONF_UNPACK_ARG
 
- LTQ_PINCONF_UNPACK_PARAM
 
- LTQ_RST_CAUSE_WDTRST
 
- LTQ_SPI_BRSTAT
 
- LTQ_SPI_BRT
 
- LTQ_SPI_CLC
 
- LTQ_SPI_CLC_DISR
 
- LTQ_SPI_CLC_DISS
 
- LTQ_SPI_CLC_RMC_M
 
- LTQ_SPI_CLC_RMC_S
 
- LTQ_SPI_CLC_SMC_M
 
- LTQ_SPI_CLC_SMC_S
 
- LTQ_SPI_CON
 
- LTQ_SPI_CON_AEN
 
- LTQ_SPI_CON_BM_M
 
- LTQ_SPI_CON_BM_S
 
- LTQ_SPI_CON_EM
 
- LTQ_SPI_CON_ENBV
 
- LTQ_SPI_CON_HB
 
- LTQ_SPI_CON_IDLE
 
- LTQ_SPI_CON_LB
 
- LTQ_SPI_CON_PH
 
- LTQ_SPI_CON_PO
 
- LTQ_SPI_CON_REN
 
- LTQ_SPI_CON_RUEN
 
- LTQ_SPI_CON_RXOFF
 
- LTQ_SPI_CON_TEN
 
- LTQ_SPI_CON_TUEN
 
- LTQ_SPI_CON_TXOFF
 
- LTQ_SPI_DMACON
 
- LTQ_SPI_ERR_IRQ_NAME
 
- LTQ_SPI_FGPO_CLROUTN_S
 
- LTQ_SPI_FGPO_SETOUTN_S
 
- LTQ_SPI_FPGO
 
- LTQ_SPI_FRM_IRQ_NAME
 
- LTQ_SPI_FSTAT
 
- LTQ_SPI_FSTAT_RXFFL_M
 
- LTQ_SPI_FSTAT_RXFFL_S
 
- LTQ_SPI_FSTAT_TXFFL_M
 
- LTQ_SPI_FSTAT_TXFFL_S
 
- LTQ_SPI_GPOCON
 
- LTQ_SPI_GPOCON_INVOUTN_S
 
- LTQ_SPI_GPOCON_ISCSBN_S
 
- LTQ_SPI_GPOSTAT
 
- LTQ_SPI_ID
 
- LTQ_SPI_ID_CFG_M
 
- LTQ_SPI_ID_CFG_S
 
- LTQ_SPI_ID_MOD_M
 
- LTQ_SPI_ID_MOD_S
 
- LTQ_SPI_ID_REV_M
 
- LTQ_SPI_ID_RXFS_M
 
- LTQ_SPI_ID_RXFS_S
 
- LTQ_SPI_ID_TXFS_M
 
- LTQ_SPI_ID_TXFS_S
 
- LTQ_SPI_IRNCR
 
- LTQ_SPI_IRNEN
 
- LTQ_SPI_IRNEN_ALL
 
- LTQ_SPI_IRNEN_E
 
- LTQ_SPI_IRNEN_F
 
- LTQ_SPI_IRNEN_R_XRX
 
- LTQ_SPI_IRNEN_R_XWAY
 
- LTQ_SPI_IRNEN_TFI
 
- LTQ_SPI_IRNEN_T_XRX
 
- LTQ_SPI_IRNEN_T_XWAY
 
- LTQ_SPI_IRNICR
 
- LTQ_SPI_PISEL
 
- LTQ_SPI_RB
 
- LTQ_SPI_RXCNT
 
- LTQ_SPI_RXCNT_TODO_M
 
- LTQ_SPI_RXFCON
 
- LTQ_SPI_RXFCON_RXFEN
 
- LTQ_SPI_RXFCON_RXFITL_M
 
- LTQ_SPI_RXFCON_RXFITL_S
 
- LTQ_SPI_RXFCON_RXFLU
 
- LTQ_SPI_RXREQ
 
- LTQ_SPI_RXREQ_RXCNT_M
 
- LTQ_SPI_RX_IRQ_NAME
 
- LTQ_SPI_SFCON
 
- LTQ_SPI_SFSTAT
 
- LTQ_SPI_STAT
 
- LTQ_SPI_STAT_AE
 
- LTQ_SPI_STAT_BSY
 
- LTQ_SPI_STAT_EN
 
- LTQ_SPI_STAT_ERRORS
 
- LTQ_SPI_STAT_ME
 
- LTQ_SPI_STAT_MS
 
- LTQ_SPI_STAT_RE
 
- LTQ_SPI_STAT_RUE
 
- LTQ_SPI_STAT_RXBV_M
 
- LTQ_SPI_STAT_RXBV_S
 
- LTQ_SPI_STAT_TE
 
- LTQ_SPI_STAT_TUE
 
- LTQ_SPI_TB
 
- LTQ_SPI_TXFCON
 
- LTQ_SPI_TXFCON_TXFEN
 
- LTQ_SPI_TXFCON_TXFITL_M
 
- LTQ_SPI_TXFCON_TXFITL_S
 
- LTQ_SPI_TXFCON_TXFLU
 
- LTQ_SPI_TX_IRQ_NAME
 
- LTQ_SPI_WHBSTATE
 
- LTQ_SPI_WHBSTATE_CLRAE
 
- LTQ_SPI_WHBSTATE_CLREN
 
- LTQ_SPI_WHBSTATE_CLRME
 
- LTQ_SPI_WHBSTATE_CLRMS
 
- LTQ_SPI_WHBSTATE_CLRRE
 
- LTQ_SPI_WHBSTATE_CLRRUE
 
- LTQ_SPI_WHBSTATE_CLRTE
 
- LTQ_SPI_WHBSTATE_CLRTUE
 
- LTQ_SPI_WHBSTATE_CLR_ERRORS
 
- LTQ_SPI_WHBSTATE_SETAE
 
- LTQ_SPI_WHBSTATE_SETEN
 
- LTQ_SPI_WHBSTATE_SETME
 
- LTQ_SPI_WHBSTATE_SETMS
 
- LTQ_SPI_WHBSTATE_SETRE
 
- LTQ_SPI_WHBSTATE_SETRUE
 
- LTQ_SPI_WHBSTATE_SETTE
 
- LTQ_SPI_WHBSTATE_SETTUE
 
- LTQ_STATUS_BASE_ADDR
 
- LTQ_SYS_REV_LEN
 
- LTQ_SYS_TYPE_LEN
 
- LTQ_WDT_CR
 
- LTQ_WDT_CR_CLKDIV
 
- LTQ_WDT_CR_GEN
 
- LTQ_WDT_CR_MAX_TIMEOUT
 
- LTQ_WDT_CR_PW1
 
- LTQ_WDT_CR_PW2
 
- LTQ_WDT_CR_PWL
 
- LTQ_WDT_CR_PW_MASK
 
- LTQ_WDT_DIVIDER
 
- LTQ_WDT_SR
 
- LTQ_WDT_SR_EN
 
- LTQ_WDT_SR_VALUE_MASK
 
- LTQ_XRX_RCU_RST_STAT
 
- LTQ_XRX_RCU_RST_STAT_WDT
 
- LTR501_ALS_CONTR
 
- LTR501_ALS_CONTR_SW_RESET
 
- LTR501_ALS_DATA0
 
- LTR501_ALS_DATA1
 
- LTR501_ALS_DEF_PERIOD
 
- LTR501_ALS_MEAS_RATE
 
- LTR501_ALS_PS_STATUS
 
- LTR501_ALS_THRESH_LOW
 
- LTR501_ALS_THRESH_MASK
 
- LTR501_ALS_THRESH_UP
 
- LTR501_CONTR_ACTIVE
 
- LTR501_CONTR_ALS_GAIN_MASK
 
- LTR501_CONTR_PS_GAIN_MASK
 
- LTR501_CONTR_PS_GAIN_SHIFT
 
- LTR501_DRV_NAME
 
- LTR501_INTENSITY_CHANNEL
 
- LTR501_INTR
 
- LTR501_INTR_PRST
 
- LTR501_LIGHT_CHANNEL
 
- LTR501_LUX_CONV
 
- LTR501_MANUFAC_ID
 
- LTR501_MAX_REG
 
- LTR501_PART_ID
 
- LTR501_PS_CONTR
 
- LTR501_PS_DATA
 
- LTR501_PS_DATA_MASK
 
- LTR501_PS_DEF_PERIOD
 
- LTR501_PS_MEAS_RATE
 
- LTR501_PS_THRESH_LOW
 
- LTR501_PS_THRESH_MASK
 
- LTR501_PS_THRESH_UP
 
- LTR501_REGMAP_NAME
 
- LTR501_RESERVED_GAIN
 
- LTR501_STATUS_ALS_INTR
 
- LTR501_STATUS_ALS_RDY
 
- LTR501_STATUS_PS_INTR
 
- LTR501_STATUS_PS_RDY
 
- LTR_ACTIVE_LATENCY_DEF
 
- LTR_CFG_FLAG_DENIE_C10_ON_PD
 
- LTR_CFG_FLAG_FEATURE_ENABLE
 
- LTR_CFG_FLAG_HW_DIS_ON_D0_2_D3
 
- LTR_CFG_FLAG_HW_DIS_ON_SHADOW_REG_ACCESS
 
- LTR_CFG_FLAG_HW_EN_SHRT_WR_THROUGH
 
- LTR_CFG_FLAG_SW_SET_LONG
 
- LTR_CFG_FLAG_SW_SET_SHORT
 
- LTR_CFG_FLAG_UPDATE_VALUES
 
- LTR_CONFIG
 
- LTR_CTL
 
- LTR_DECODED_SCALE
 
- LTR_DECODED_VAL
 
- LTR_IDLE_LATENCY_DEF
 
- LTR_L1OFF_LATENCY_DEF
 
- LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF
 
- LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF
 
- LTR_L1OFF_SSPWRGATE_5249_DEF
 
- LTR_L1OFF_SSPWRGATE_5250_DEF
 
- LTR_L1SS_PWR_GATE_CHECK_CARD_EN
 
- LTR_L1SS_PWR_GATE_EN
 
- LTR_LATENCY_MODE_HW
 
- LTR_LATENCY_MODE_MASK
 
- LTR_LATENCY_MODE_SW
 
- LTR_MSG_INFO_FROM_EP__LTR_MSG_INFO_FROM_EP_MASK
 
- LTR_MSG_INFO_FROM_EP__LTR_MSG_INFO_FROM_EP__MASK
 
- LTR_MSG_INFO_FROM_EP__LTR_MSG_INFO_FROM_EP__SHIFT
 
- LTR_MSG_REQ
 
- LTR_MST_NO_SNOOP_SHIFT
 
- LTR_REQ_NONSNOOP
 
- LTR_REQ_SNOOP
 
- LTR_TX_EN_0
 
- LTR_TX_EN_1
 
- LTR_TX_EN_MASK
 
- LTR_VALID_STATES_NUM
 
- LTSMDIS
 
- LTSSM_EN
 
- LTSSM_EN_VAL
 
- LTSSM_ID_EN_WRO
 
- LTSSM_L0
 
- LTSSM_MASK
 
- LTSSM_PCIE_L0
 
- LTSSM_SHIFT
 
- LTSSM_STATE
 
- LTSSM_STATE_MASK
 
- LTSSM_STATE_PRE_DETECT
 
- LTSSM_STATE_SHIFT
 
- LTSSM_STATUS
 
- LTSSM_STATUS_L0
 
- LTSSM_STATUS_L0_MASK
 
- LTSSM_TEST_MODE_DEF
 
- LTSSM_TIMEOUT
 
- LTV_CHS_384
 
- LTV_CHS_480
 
- LTV_CHS_492
 
- LTV_CLW
 
- LTV_DATACTL
 
- LTV_DF_RGB
 
- LTV_DF_RGBX
 
- LTV_DF_XRGB
 
- LTV_DPL_SAMPLE_FALLING
 
- LTV_DPL_SAMPLE_RISING
 
- LTV_DRIVE_CURRENT
 
- LTV_DSC
 
- LTV_DS_D_TO_S
 
- LTV_DS_SAME
 
- LTV_DS_S_TO_D
 
- LTV_ENTRY_MODE
 
- LTV_EPL_ACTIVE_HIGH
 
- LTV_EPL_ACTIVE_LOW
 
- LTV_EQ
 
- LTV_FHN
 
- LTV_FTI
 
- LTV_FWI
 
- LTV_GAMMA
 
- LTV_GAON
 
- LTV_GATECTL1
 
- LTV_GATECTL2
 
- LTV_GIF
 
- LTV_HBP
 
- LTV_HSPL_ACTIVE_HIGH
 
- LTV_HSPL_ACTIVE_LOW
 
- LTV_ID
 
- LTV_IFCTL
 
- LTV_IM
 
- LTV_NL
 
- LTV_NMD
 
- LTV_NW_INV_1LINE
 
- LTV_NW_INV_2LINE
 
- LTV_NW_INV_FRAME
 
- LTV_OPC_DATA
 
- LTV_OPC_INDEX
 
- LTV_POWER_ON
 
- LTV_PWRCTL1
 
- LTV_PWRCTL2
 
- LTV_REV
 
- LTV_RGB_BGR
 
- LTV_RGB_GRB
 
- LTV_RGB_RBG
 
- LTV_RGB_RGB
 
- LTV_SDR
 
- LTV_SDT
 
- LTV_SOTCTL
 
- LTV_SSMD
 
- LTV_SS_LEFT_TO_RIGHT
 
- LTV_SS_RIGHT_TO_LEFT
 
- LTV_STB
 
- LTV_SUPPLY_CURRENT
 
- LTV_VBP
 
- LTV_VCOMH_VOLTAGE
 
- LTV_VCOML_ENABLE
 
- LTV_VCOML_VOLTAGE
 
- LTV_VCOMOUT_ENABLE
 
- LTV_VCOM_DISABLE
 
- LTV_VSPL_ACTIVE_HIGH
 
- LTV_VSPL_ACTIVE_LOW
 
- LTW_FLAG
 
- LT_BACKTRACEDEPTH
 
- LT_CHANNEL0_EQ_BITS
 
- LT_CHANNEL1_EQ_BITS
 
- LT_CHIP_ID
 
- LT_COUNT
 
- LT_DODGY
 
- LT_DODGY_LAST
 
- LT_ELFALSE
 
- LT_ELIF
 
- LT_ELSE
 
- LT_ELTRUE
 
- LT_ENDIF
 
- LT_EOF
 
- LT_ERROR
 
- LT_FALSE
 
- LT_FALSEI
 
- LT_FLAG_ALLLAP
 
- LT_GETFLAGS
 
- LT_GETRESULT
 
- LT_GIO
 
- LT_GIO_LG
 
- LT_IF
 
- LT_INIT
 
- LT_INTERLANE_ALIGN_DONE
 
- LT_LOOPDONE
 
- LT_MASK
 
- LT_PLAIN
 
- LT_RCVLAP
 
- LT_READMEM
 
- LT_SAVECOUNT
 
- LT_SENDLAP
 
- LT_SETFLAGS
 
- LT_SHIFT
 
- LT_STATUS_MASK
 
- LT_TRUE
 
- LT_TRUEI
 
- LT_WRITEMEM
 
- LU
 
- LUA_BIN_ATTRIBUTE_RW
 
- LUA_COMMAND_CONTROL
 
- LUA_SIZE_CONTROL
 
- LUA_SYSFS_R
 
- LUA_SYSFS_W
 
- LUBBOCK_BB_IRQ
 
- LUBBOCK_ETH_IRQ
 
- LUBBOCK_ETH_PHYS
 
- LUBBOCK_FPGA_PHYS
 
- LUBBOCK_FPGA_VIRT
 
- LUBBOCK_IRQ
 
- LUBBOCK_LAST_IRQ
 
- LUBBOCK_NR_IRQS
 
- LUBBOCK_SA1111_IRQ
 
- LUBBOCK_SA1111_IRQ_BASE
 
- LUBBOCK_SD_IRQ
 
- LUBBOCK_UCB1400_IRQ
 
- LUBBOCK_USB_DISC_IRQ
 
- LUBBOCK_USB_IRQ
 
- LUB_CONF_SWITCHES
 
- LUB_DISC_BLNK_LED
 
- LUB_GP
 
- LUB_HEXLED
 
- LUB_IRQ_MASK_EN
 
- LUB_IRQ_SET_CLR
 
- LUB_MISC_RD
 
- LUB_MISC_WR
 
- LUB_P2V
 
- LUB_USER_SWITCHES
 
- LUB_V2P
 
- LUB_WHOAMI
 
- LUCENT_MII_REG
 
- LUCID_OPTION
 
- LUCID_VALUE
 
- LUE_INT
 
- LUMA_CTRL
 
- LUMA_CTRL_BYTE_3
 
- LUMA_LPF_HIGH_BANDPASS
 
- LUMA_LPF_LOW_BANDPASS
 
- LUMA_LPF_MEDIUM_BANDPASS
 
- LUMA_QUANT_OFF
 
- LUMA_STRIDE
 
- LUMA_STRIDE_MASK
 
- LUMA_STRIDE_SHIFT
 
- LUMC_ONOFF_MASK
 
- LUMC_ONOFF_SHIFT
 
- LUMC_REG
 
- LUMHTH
 
- LUMLTH
 
- LUN
 
- LUNAddr
 
- LUNAddr_struct
 
- LUNBITS
 
- LUNS_CHANGED_ASCQ
 
- LUN_ADDRESS
 
- LUN_ADDR_LEN
 
- LUN_CAPACITY_CHANGED
 
- LUN_CHECK
 
- LUN_FAILED
 
- LUN_MASK
 
- LUN_RESET_RESPONSE_RECEIVED
 
- LUN_SIZE
 
- LUTS_1D_H
 
- LUT_10BIT_BYPASS_EN
 
- LUT_10BIT_MASK
 
- LUT_2CFG_MEMORY_A
 
- LUT_2CFG_MEMORY_B
 
- LUT_2CFG_NO_MEMORY
 
- LUT_2_MODE_BYPASS
 
- LUT_2_MODE_RAMA_LUT
 
- LUT_2_MODE_RAMB_LUT
 
- LUT_4CFG_MEMORY_A
 
- LUT_4CFG_MEMORY_B
 
- LUT_4CFG_NO_MEMORY
 
- LUT_4CFG_ROM_A
 
- LUT_4CFG_ROM_B
 
- LUT_4_MODE_BYPASS
 
- LUT_4_MODE_RAMA_LUT
 
- LUT_4_MODE_RAMB_LUT
 
- LUT_4_MODE_ROMA_LUT
 
- LUT_4_MODE_ROMB_LUT
 
- LUT_ADDR
 
- LUT_ADDR_DDR
 
- LUT_BYPASS
 
- LUT_CADDR_DDR
 
- LUT_CADDR_SDR
 
- LUT_CMD
 
- LUT_CMD_DDR
 
- LUT_CORE_COUNT
 
- LUT_DATA
 
- LUT_DATA_LEARN
 
- LUT_DATSZ_DDR
 
- LUT_DATSZ_SDR
 
- LUT_DEF
 
- LUT_DUMMY
 
- LUT_DUMMY_DDR
 
- LUT_DUMMY_RWDS_DDR
 
- LUT_DUMMY_RWDS_SDR
 
- LUT_FSL_READ
 
- LUT_FSL_READ_DDR
 
- LUT_FSL_WRITE
 
- LUT_FSL_WRITE_DDR
 
- LUT_INDEX_READ
 
- LUT_INDEX_WRITE
 
- LUT_JMP_ON_CS
 
- LUT_LEARN_DDR
 
- LUT_LEARN_SDR
 
- LUT_L_VAL
 
- LUT_MAX_ENTRIES
 
- LUT_MAX_SIZE
 
- LUT_MIN_SIZE
 
- LUT_MODE
 
- LUT_MODE2
 
- LUT_MODE2_DDR
 
- LUT_MODE4
 
- LUT_MODE4_DDR
 
- LUT_MODE8
 
- LUT_MODE8_DDR
 
- LUT_MODE_DDR
 
- LUT_NXP_READ
 
- LUT_NXP_WRITE
 
- LUT_PAD
 
- LUT_PAD_SINK
 
- LUT_PAD_SOURCE
 
- LUT_PARAM_ALPHA_BB
 
- LUT_PARAM_ATTN_BB
 
- LUT_PARAM_BB_PLL_LOOP_FILTER
 
- LUT_PARAM_FRACTIONAL_DIVIDER
 
- LUT_PARAM_INTEGER_DIVIDER
 
- LUT_PARAM_NUM
 
- LUT_PARAM_STOP_TIME_BB
 
- LUT_RAM_A
 
- LUT_RAM_B
 
- LUT_READ_DDR
 
- LUT_ROW_SIZE
 
- LUT_SIZE
 
- LUT_SRC
 
- LUT_STOP
 
- LUT_TURBO_IND
 
- LUT_USES
 
- LUT_VOLT
 
- LUT_WRITE_DDR
 
- LUXAFOR
 
- LUXOR_MAX_PORT
 
- LU_COUNT
 
- LU_GROUP_NAME_BUF
 
- LV0104CS_CALIBSCALE_UNITY
 
- LV0104CS_INTEG_100MS
 
- LV0104CS_INTEG_12_5MS
 
- LV0104CS_INTEG_200MS
 
- LV0104CS_INTEG_SHIFT
 
- LV0104CS_REGVAL_MEASURE
 
- LV0104CS_REGVAL_SLEEP
 
- LV0104CS_SCALE_0_25X
 
- LV0104CS_SCALE_1X
 
- LV0104CS_SCALE_2X
 
- LV0104CS_SCALE_8X
 
- LV0104CS_SCALE_SHIFT
 
- LV1IECR_MSK
 
- LV1TABLE_SIZE
 
- LV1_0_IN_0_OUT
 
- LV1_0_IN_0_OUT_ARGS
 
- LV1_0_IN_0_OUT_ARG_DECL
 
- LV1_0_IN_1_OUT
 
- LV1_0_IN_1_OUT_ARGS
 
- LV1_0_IN_1_OUT_ARG_DECL
 
- LV1_0_IN_2_OUT
 
- LV1_0_IN_2_OUT_ARGS
 
- LV1_0_IN_2_OUT_ARG_DECL
 
- LV1_0_IN_3_OUT
 
- LV1_0_IN_3_OUT_ARGS
 
- LV1_0_IN_3_OUT_ARG_DECL
 
- LV1_0_IN_4_OUT_ARGS
 
- LV1_0_IN_4_OUT_ARG_DECL
 
- LV1_0_IN_5_OUT_ARGS
 
- LV1_0_IN_5_OUT_ARG_DECL
 
- LV1_0_IN_6_OUT_ARGS
 
- LV1_0_IN_6_OUT_ARG_DECL
 
- LV1_0_IN_7_OUT
 
- LV1_0_IN_7_OUT_ARGS
 
- LV1_0_IN_7_OUT_ARG_DECL
 
- LV1_1_IN_0_OUT
 
- LV1_1_IN_0_OUT_ARGS
 
- LV1_1_IN_0_OUT_ARG_DECL
 
- LV1_1_IN_1_OUT
 
- LV1_1_IN_1_OUT_ARGS
 
- LV1_1_IN_1_OUT_ARG_DECL
 
- LV1_1_IN_2_OUT
 
- LV1_1_IN_2_OUT_ARGS
 
- LV1_1_IN_2_OUT_ARG_DECL
 
- LV1_1_IN_3_OUT
 
- LV1_1_IN_3_OUT_ARGS
 
- LV1_1_IN_3_OUT_ARG_DECL
 
- LV1_1_IN_4_OUT
 
- LV1_1_IN_4_OUT_ARGS
 
- LV1_1_IN_4_OUT_ARG_DECL
 
- LV1_1_IN_5_OUT
 
- LV1_1_IN_5_OUT_ARGS
 
- LV1_1_IN_5_OUT_ARG_DECL
 
- LV1_1_IN_6_OUT
 
- LV1_1_IN_6_OUT_ARGS
 
- LV1_1_IN_6_OUT_ARG_DECL
 
- LV1_1_IN_7_OUT
 
- LV1_1_IN_7_OUT_ARGS
 
- LV1_1_IN_7_OUT_ARG_DECL
 
- LV1_1_IN_ARGS
 
- LV1_1_IN_ARG_DECL
 
- LV1_1_OUT_ARGS
 
- LV1_1_OUT_ARG_DECL
 
- LV1_2_IN_0_OUT
 
- LV1_2_IN_0_OUT_ARGS
 
- LV1_2_IN_0_OUT_ARG_DECL
 
- LV1_2_IN_1_OUT
 
- LV1_2_IN_1_OUT_ARGS
 
- LV1_2_IN_1_OUT_ARG_DECL
 
- LV1_2_IN_2_OUT
 
- LV1_2_IN_2_OUT_ARGS
 
- LV1_2_IN_2_OUT_ARG_DECL
 
- LV1_2_IN_3_OUT
 
- LV1_2_IN_3_OUT_ARGS
 
- LV1_2_IN_3_OUT_ARG_DECL
 
- LV1_2_IN_4_OUT
 
- LV1_2_IN_4_OUT_ARGS
 
- LV1_2_IN_4_OUT_ARG_DECL
 
- LV1_2_IN_5_OUT
 
- LV1_2_IN_5_OUT_ARGS
 
- LV1_2_IN_5_OUT_ARG_DECL
 
- LV1_2_IN_6_OUT_ARGS
 
- LV1_2_IN_6_OUT_ARG_DECL
 
- LV1_2_IN_7_OUT_ARGS
 
- LV1_2_IN_7_OUT_ARG_DECL
 
- LV1_2_IN_ARGS
 
- LV1_2_IN_ARG_DECL
 
- LV1_2_OUT_ARGS
 
- LV1_2_OUT_ARG_DECL
 
- LV1_3_IN_0_OUT
 
- LV1_3_IN_0_OUT_ARGS
 
- LV1_3_IN_0_OUT_ARG_DECL
 
- LV1_3_IN_1_OUT
 
- LV1_3_IN_1_OUT_ARGS
 
- LV1_3_IN_1_OUT_ARG_DECL
 
- LV1_3_IN_2_OUT
 
- LV1_3_IN_2_OUT_ARGS
 
- LV1_3_IN_2_OUT_ARG_DECL
 
- LV1_3_IN_3_OUT
 
- LV1_3_IN_3_OUT_ARGS
 
- LV1_3_IN_3_OUT_ARG_DECL
 
- LV1_3_IN_4_OUT_ARGS
 
- LV1_3_IN_4_OUT_ARG_DECL
 
- LV1_3_IN_5_OUT_ARGS
 
- LV1_3_IN_5_OUT_ARG_DECL
 
- LV1_3_IN_6_OUT_ARGS
 
- LV1_3_IN_6_OUT_ARG_DECL
 
- LV1_3_IN_7_OUT_ARGS
 
- LV1_3_IN_7_OUT_ARG_DECL
 
- LV1_3_IN_ARGS
 
- LV1_3_IN_ARG_DECL
 
- LV1_3_OUT_ARGS
 
- LV1_3_OUT_ARG_DECL
 
- LV1_4_IN_0_OUT
 
- LV1_4_IN_0_OUT_ARGS
 
- LV1_4_IN_0_OUT_ARG_DECL
 
- LV1_4_IN_1_OUT
 
- LV1_4_IN_1_OUT_ARGS
 
- LV1_4_IN_1_OUT_ARG_DECL
 
- LV1_4_IN_2_OUT
 
- LV1_4_IN_2_OUT_ARGS
 
- LV1_4_IN_2_OUT_ARG_DECL
 
- LV1_4_IN_3_OUT
 
- LV1_4_IN_3_OUT_ARGS
 
- LV1_4_IN_3_OUT_ARG_DECL
 
- LV1_4_IN_4_OUT_ARGS
 
- LV1_4_IN_4_OUT_ARG_DECL
 
- LV1_4_IN_5_OUT_ARGS
 
- LV1_4_IN_5_OUT_ARG_DECL
 
- LV1_4_IN_6_OUT_ARGS
 
- LV1_4_IN_6_OUT_ARG_DECL
 
- LV1_4_IN_7_OUT_ARGS
 
- LV1_4_IN_7_OUT_ARG_DECL
 
- LV1_4_IN_ARGS
 
- LV1_4_IN_ARG_DECL
 
- LV1_4_OUT_ARGS
 
- LV1_4_OUT_ARG_DECL
 
- LV1_5_IN_0_OUT
 
- LV1_5_IN_0_OUT_ARGS
 
- LV1_5_IN_0_OUT_ARG_DECL
 
- LV1_5_IN_1_OUT
 
- LV1_5_IN_1_OUT_ARGS
 
- LV1_5_IN_1_OUT_ARG_DECL
 
- LV1_5_IN_2_OUT
 
- LV1_5_IN_2_OUT_ARGS
 
- LV1_5_IN_2_OUT_ARG_DECL
 
- LV1_5_IN_3_OUT
 
- LV1_5_IN_3_OUT_ARGS
 
- LV1_5_IN_3_OUT_ARG_DECL
 
- LV1_5_IN_4_OUT_ARGS
 
- LV1_5_IN_4_OUT_ARG_DECL
 
- LV1_5_IN_5_OUT_ARGS
 
- LV1_5_IN_5_OUT_ARG_DECL
 
- LV1_5_IN_6_OUT_ARGS
 
- LV1_5_IN_6_OUT_ARG_DECL
 
- LV1_5_IN_7_OUT_ARGS
 
- LV1_5_IN_7_OUT_ARG_DECL
 
- LV1_5_IN_ARGS
 
- LV1_5_IN_ARG_DECL
 
- LV1_5_OUT_ARGS
 
- LV1_5_OUT_ARG_DECL
 
- LV1_6_IN_0_OUT
 
- LV1_6_IN_0_OUT_ARGS
 
- LV1_6_IN_0_OUT_ARG_DECL
 
- LV1_6_IN_1_OUT
 
- LV1_6_IN_1_OUT_ARGS
 
- LV1_6_IN_1_OUT_ARG_DECL
 
- LV1_6_IN_2_OUT
 
- LV1_6_IN_2_OUT_ARGS
 
- LV1_6_IN_2_OUT_ARG_DECL
 
- LV1_6_IN_3_OUT
 
- LV1_6_IN_3_OUT_ARGS
 
- LV1_6_IN_3_OUT_ARG_DECL
 
- LV1_6_IN_4_OUT_ARGS
 
- LV1_6_IN_4_OUT_ARG_DECL
 
- LV1_6_IN_5_OUT_ARGS
 
- LV1_6_IN_5_OUT_ARG_DECL
 
- LV1_6_IN_6_OUT_ARGS
 
- LV1_6_IN_6_OUT_ARG_DECL
 
- LV1_6_IN_7_OUT_ARGS
 
- LV1_6_IN_7_OUT_ARG_DECL
 
- LV1_6_IN_ARGS
 
- LV1_6_IN_ARG_DECL
 
- LV1_6_OUT_ARGS
 
- LV1_6_OUT_ARG_DECL
 
- LV1_7_IN_0_OUT
 
- LV1_7_IN_0_OUT_ARGS
 
- LV1_7_IN_0_OUT_ARG_DECL
 
- LV1_7_IN_1_OUT
 
- LV1_7_IN_1_OUT_ARGS
 
- LV1_7_IN_1_OUT_ARG_DECL
 
- LV1_7_IN_2_OUT_ARGS
 
- LV1_7_IN_2_OUT_ARG_DECL
 
- LV1_7_IN_3_OUT_ARGS
 
- LV1_7_IN_3_OUT_ARG_DECL
 
- LV1_7_IN_4_OUT_ARGS
 
- LV1_7_IN_4_OUT_ARG_DECL
 
- LV1_7_IN_5_OUT_ARGS
 
- LV1_7_IN_5_OUT_ARG_DECL
 
- LV1_7_IN_6_OUT
 
- LV1_7_IN_6_OUT_ARGS
 
- LV1_7_IN_6_OUT_ARG_DECL
 
- LV1_7_IN_7_OUT_ARGS
 
- LV1_7_IN_7_OUT_ARG_DECL
 
- LV1_7_IN_ARGS
 
- LV1_7_IN_ARG_DECL
 
- LV1_7_OUT_ARGS
 
- LV1_7_OUT_ARG_DECL
 
- LV1_8_IN_1_OUT
 
- LV1_8_IN_1_OUT_ARGS
 
- LV1_8_IN_1_OUT_ARG_DECL
 
- LV1_8_IN_ARGS
 
- LV1_8_IN_ARG_DECL
 
- LV1_ACCESS_VIOLATION
 
- LV1_ALIGNMENT_ERROR
 
- LV1_ALREADY_CONNECTED
 
- LV1_BAD_OPTION
 
- LV1_BUSY
 
- LV1_CALL
 
- LV1_CONDITION_NOT_SATISFIED
 
- LV1_CONSTRAINT_NOT_SATISFIED
 
- LV1_DENIED_BY_POLICY
 
- LV1_DUPLICATE_ENTRY
 
- LV1_EMPTY
 
- LV1_HARDWARE_ERROR
 
- LV1_ILLEGAL_PARAMETER_VALUE
 
- LV1_IMPLEMENTATION_LIMITATION
 
- LV1_INTERNAL_ERROR
 
- LV1_INVALID_CLASS_ID
 
- LV1_INVALID_DATA_FORMAT
 
- LV1_INVALID_OPERATION
 
- LV1_NOT_IMPLEMENTED
 
- LV1_NO_ENTRY
 
- LV1_NO_MATCH
 
- LV1_NO_PRIVILEGE
 
- LV1_N_IN_0_OUT
 
- LV1_RESOURCE_SHORTAGE
 
- LV1_STORAGE_ATA_HDDOUT
 
- LV1_STORAGE_SEND_ATAPI_COMMAND
 
- LV1_STORAGE_SEND_ATA_COMMAND
 
- LV1_SUCCESS
 
- LV1_TYPE_MISMATCH
 
- LV1_UNSUPPORTED_PARAMETER_VALUE
 
- LV1_WRONG_STATE
 
- LV2TABLE_SIZE
 
- LV5207LP_BLUE
 
- LV5207LP_BSW
 
- LV5207LP_C10
 
- LV5207LP_CKSW
 
- LV5207LP_CPSW
 
- LV5207LP_CTRL1
 
- LV5207LP_CTRL2
 
- LV5207LP_GREEN
 
- LV5207LP_GSW
 
- LV5207LP_MAX_BRIGHTNESS
 
- LV5207LP_MLED4
 
- LV5207LP_MSW
 
- LV5207LP_RED
 
- LV5207LP_RSW
 
- LV5207LP_SCTEN
 
- LVB_SIZE
 
- LVCFG
 
- LVD
 
- LVDCHCR
 
- LVDCHCR_CHSEL_CH
 
- LVDCHCR_CHSEL_MASK
 
- LVDCR0
 
- LVDCR0_BEN
 
- LVDCR0_DMD
 
- LVDCR0_DUSEL
 
- LVDCR0_LVEN
 
- LVDCR0_LVMD_MASK
 
- LVDCR0_LVMD_SHIFT
 
- LVDCR0_LVRES
 
- LVDCR0_PLLON
 
- LVDCR0_PWD
 
- LVDCR1
 
- LVDCR1_CHSTBY
 
- LVDCR1_CKSEL
 
- LVDCR1_CLKSTBY
 
- LVDCTRCR
 
- LVDCTRCR_CTR0SEL_CDE
 
- LVDCTRCR_CTR0SEL_DISP
 
- LVDCTRCR_CTR0SEL_HSYNC
 
- LVDCTRCR_CTR0SEL_MASK
 
- LVDCTRCR_CTR0SEL_ODD
 
- LVDCTRCR_CTR0SEL_VSYNC
 
- LVDCTRCR_CTR1SEL_CDE
 
- LVDCTRCR_CTR1SEL_DISP
 
- LVDCTRCR_CTR1SEL_HSYNC
 
- LVDCTRCR_CTR1SEL_MASK
 
- LVDCTRCR_CTR1SEL_ODD
 
- LVDCTRCR_CTR1SEL_VSYNC
 
- LVDCTRCR_CTR2SEL_CDE
 
- LVDCTRCR_CTR2SEL_DISP
 
- LVDCTRCR_CTR2SEL_HSYNC
 
- LVDCTRCR_CTR2SEL_MASK
 
- LVDCTRCR_CTR2SEL_ODD
 
- LVDCTRCR_CTR2SEL_VSYNC
 
- LVDCTRCR_CTR3SEL_CDE
 
- LVDCTRCR_CTR3SEL_MASK
 
- LVDCTRCR_CTR3SEL_ODD
 
- LVDCTRCR_CTR3SEL_ZERO
 
- LVDDIV
 
- LVDDIV_DIV
 
- LVDDIV_DIVRESET
 
- LVDDIV_DIVSEL
 
- LVDDIV_DIVSTP
 
- LVDPLLCR
 
- LVDPLLCR_CEEN
 
- LVDPLLCR_CKSEL_DU_DOTCLKIN
 
- LVDPLLCR_CKSEL_EXTAL
 
- LVDPLLCR_CKSEL_LVX
 
- LVDPLLCR_CLKOUT
 
- LVDPLLCR_COSEL
 
- LVDPLLCR_FBEN
 
- LVDPLLCR_OCKSEL
 
- LVDPLLCR_OUTCLKSEL
 
- LVDPLLCR_PLLDIVCNT_128M
 
- LVDPLLCR_PLLDIVCNT_148M
 
- LVDPLLCR_PLLDIVCNT_42M
 
- LVDPLLCR_PLLDIVCNT_85M
 
- LVDPLLCR_PLLDIVCNT_MASK
 
- LVDPLLCR_PLLDLYCNT_121M
 
- LVDPLLCR_PLLDLYCNT_150M
 
- LVDPLLCR_PLLDLYCNT_38M
 
- LVDPLLCR_PLLDLYCNT_60M
 
- LVDPLLCR_PLLDLYCNT_MASK
 
- LVDPLLCR_PLLE
 
- LVDPLLCR_PLLM
 
- LVDPLLCR_PLLN
 
- LVDPLLCR_PLLON
 
- LVDPLLCR_PLLSEL_LVX
 
- LVDPLLCR_PLLSEL_PLL0
 
- LVDPLLCR_PLLSEL_PLL1
 
- LVDPLLCR_STP_CLKOUTE
 
- LVDS
 
- LVDSCR
 
- LVDSCR_BANDSET
 
- LVDSCR_DEPTH
 
- LVDSCR_MODE
 
- LVDSCR_RSTN
 
- LVDSCR_SDIV
 
- LVDSCR_TWGCNT
 
- LVDSDataLen
 
- LVDSDesDataLen
 
- LVDSEncoderControl
 
- LVDSHPosTableSize
 
- LVDSPP_OFF
 
- LVDSPP_ON
 
- LVDSTRIPE
 
- LVDSTRIPE_ST_ON
 
- LVDSTRIPE_ST_SWAP
 
- LVDSTRIPE_ST_TRGSEL_DISP
 
- LVDSTRIPE_ST_TRGSEL_HSYNC_F
 
- LVDSTRIPE_ST_TRGSEL_HSYNC_R
 
- LVDSVPosTableSize
 
- LVDS_18BIT
 
- LVDS_24BIT
 
- LVDS_4mA
 
- LVDS_7mA
 
- LVDS_A0A2_CLKA_POWER_DOWN
 
- LVDS_A0A2_CLKA_POWER_MASK
 
- LVDS_A0A2_CLKA_POWER_UP
 
- LVDS_A3_POWER_DOWN
 
- LVDS_A3_POWER_MASK
 
- LVDS_A3_POWER_UP
 
- LVDS_A3_POWER_UP_0_OUTPUT
 
- LVDS_B0B3_POWER_DOWN
 
- LVDS_B0B3_POWER_MASK
 
- LVDS_B0B3_POWER_UP
 
- LVDS_BACKLIGHT_OFF
 
- LVDS_BACKLIGHT_ON
 
- LVDS_BIST_CNTL0
 
- LVDS_BIST_FIXED0
 
- LVDS_BIST_FIXED1
 
- LVDS_BIST_MUX0
 
- LVDS_BIST_MUX1
 
- LVDS_BIT_MAP_JEIDA
 
- LVDS_BIT_MAP_SPWG
 
- LVDS_BLANK_DATA_HI
 
- LVDS_BLANK_DATA_LO
 
- LVDS_BLON
 
- LVDS_BL_MOD_EN
 
- LVDS_BL_MOD_LEVEL_MASK
 
- LVDS_BL_MOD_LEVEL_SHIFT
 
- LVDS_BORDER_EN
 
- LVDS_BORDER_ENABLE
 
- LVDS_CH0_EN
 
- LVDS_CH1_EN
 
- LVDS_CLKB_CLKA
 
- LVDS_CLKB_POWER_DOWN
 
- LVDS_CLKB_POWER_MASK
 
- LVDS_CLKB_POWER_UP
 
- LVDS_CLK_PHASE_MASK
 
- LVDS_CLK_PHASE_SHIFT
 
- LVDS_CLK_SEL
 
- LVDS_CLK_SEL_LVDS_PCLK
 
- LVDS_CNTL0
 
- LVDS_CNTL1
 
- LVDS_CTUNE_MASK
 
- LVDS_CTUNE_SHIFT
 
- LVDS_DATA_CNTL__LVDS_24BIT_ENABLE_MASK
 
- LVDS_DATA_CNTL__LVDS_24BIT_ENABLE__SHIFT
 
- LVDS_DATA_CNTL__LVDS_24BIT_FORMAT_MASK
 
- LVDS_DATA_CNTL__LVDS_24BIT_FORMAT__SHIFT
 
- LVDS_DATA_CNTL__LVDS_2ND_CHAN_DE_MASK
 
- LVDS_DATA_CNTL__LVDS_2ND_CHAN_DE__SHIFT
 
- LVDS_DATA_CNTL__LVDS_2ND_CHAN_HS_MASK
 
- LVDS_DATA_CNTL__LVDS_2ND_CHAN_HS__SHIFT
 
- LVDS_DATA_CNTL__LVDS_2ND_CHAN_VS_MASK
 
- LVDS_DATA_CNTL__LVDS_2ND_CHAN_VS__SHIFT
 
- LVDS_DATA_CNTL__LVDS_2ND_LINK_CNTL_BITS_MASK
 
- LVDS_DATA_CNTL__LVDS_2ND_LINK_CNTL_BITS__SHIFT
 
- LVDS_DATA_CNTL__LVDS_DTMG_POL_MASK
 
- LVDS_DATA_CNTL__LVDS_DTMG_POL__SHIFT
 
- LVDS_DATA_CNTL__LVDS_FP_POL_MASK
 
- LVDS_DATA_CNTL__LVDS_FP_POL__SHIFT
 
- LVDS_DATA_CNTL__LVDS_LP_POL_MASK
 
- LVDS_DATA_CNTL__LVDS_LP_POL__SHIFT
 
- LVDS_DCLK_INV
 
- LVDS_DETECTED
 
- LVDS_DIGION
 
- LVDS_DIGON
 
- LVDS_DISPLAY_DIS
 
- LVDS_DUAL
 
- LVDS_EAN
 
- LVDS_EAP
 
- LVDS_EBN
 
- LVDS_EBP
 
- LVDS_ECN
 
- LVDS_ECP
 
- LVDS_EDN
 
- LVDS_EDP
 
- LVDS_EEN
 
- LVDS_EEP
 
- LVDS_EN
 
- LVDS_ENABLE_DITHER
 
- LVDS_ENCODER_CONTROL_PARAMETERS
 
- LVDS_ENCODER_CONTROL_PARAMETERS_LAST
 
- LVDS_ENCODER_CONTROL_PARAMETERS_V2
 
- LVDS_ENCODER_CONTROL_PARAMETERS_V3
 
- LVDS_ENCODER_CONTROL_PS_ALLOCATION
 
- LVDS_ENCODER_CONTROL_PS_ALLOCATION_LAST
 
- LVDS_ENCODER_CONTROL_PS_ALLOCATION_V2
 
- LVDS_ENCODER_CONTROL_PS_ALLOCATION_V3
 
- LVDS_FBDIV_MASK
 
- LVDS_FBDIV_SHIFT
 
- LVDS_FMT_1
 
- LVDS_FMT_MASK
 
- LVDS_FMT_SHIFT
 
- LVDS_FORMAT_JEIDA
 
- LVDS_FORMAT_VESA
 
- LVDS_FRAME_MOD_2_LEVELS
 
- LVDS_FRAME_MOD_4_LEVELS
 
- LVDS_FRAME_MOD_NO
 
- LVDS_FREQ_OFFSET_MASK
 
- LVDS_FREQ_OFFSET_MODE_CK_DIV4_OUT
 
- LVDS_FREQ_OFFSET_MODE_EN
 
- LVDS_FREQ_OFFSET_SHIFT
 
- LVDS_FREQ_OFFSET_VALID
 
- LVDS_GEN_CNTL
 
- LVDS_HSYNC_POLARITY
 
- LVDS_ICP_MASK
 
- LVDS_ICP_SHIFT
 
- LVDS_INIT
 
- LVDS_INTPI_MASK
 
- LVDS_INTPI_SHIFT
 
- LVDS_Info
 
- LVDS_JEIDA_18
 
- LVDS_JEIDA_24
 
- LVDS_KVCO_MASK
 
- LVDS_KVCO_SHIFT
 
- LVDS_MSB
 
- LVDS_OAN
 
- LVDS_OAP
 
- LVDS_OBN
 
- LVDS_OBP
 
- LVDS_OCN
 
- LVDS_OCP
 
- LVDS_ODN
 
- LVDS_ODP
 
- LVDS_OEN
 
- LVDS_OEP
 
- LVDS_ON
 
- LVDS_PACK_CNTL_ADDR
 
- LVDS_PANEL_24BITS_TFT
 
- LVDS_PANEL_FORMAT
 
- LVDS_PANEL_OFF
 
- LVDS_PANEL_ON
 
- LVDS_PANEL_TYPE
 
- LVDS_PANEL_TYPE_2PIX_PER_CLK
 
- LVDS_PD_CH
 
- LVDS_PD_CH_MASK
 
- LVDS_PHY_CLK_CNTL
 
- LVDS_PHY_CNTL0
 
- LVDS_PHY_CNTL1
 
- LVDS_PHY_CNTL2
 
- LVDS_PHY_CNTL3
 
- LVDS_PHY_CNTL4
 
- LVDS_PHY_CNTL5
 
- LVDS_PHY_CNTL6
 
- LVDS_PHY_CNTL7
 
- LVDS_PHY_CNTL8
 
- LVDS_PHY_CTL
 
- LVDS_PHY_CTL_EXT
 
- LVDS_PHY_EXT_MASK
 
- LVDS_PHY_EXT_SHIFT
 
- LVDS_PIPEB_SELECT
 
- LVDS_PIPE_SEL
 
- LVDS_PIPE_SEL_CPT
 
- LVDS_PIPE_SEL_MASK
 
- LVDS_PIPE_SEL_MASK_CPT
 
- LVDS_PIPE_SEL_SHIFT
 
- LVDS_PIPE_SEL_SHIFT_CPT
 
- LVDS_PI_EN
 
- LVDS_PLL_CNTL
 
- LVDS_PLL_EN
 
- LVDS_PLL_LOCK
 
- LVDS_PLL_RESET
 
- LVDS_POL_SWAP_MASK
 
- LVDS_POL_SWAP_SHIFT
 
- LVDS_PORT
 
- LVDS_PORT_EN
 
- LVDS_PU_IVREF
 
- LVDS_PU_PLL
 
- LVDS_PU_TX
 
- LVDS_PWRDN
 
- LVDS_REFDIV_MASK
 
- LVDS_REFDIV_SHIFT
 
- LVDS_RESERVED_BITS
 
- LVDS_RESERVE_IN_MASK
 
- LVDS_RESERVE_IN_SHIFT
 
- LVDS_RESET
 
- LVDS_RESET_INTP_EXT
 
- LVDS_RST
 
- LVDS_RST_FM
 
- LVDS_SELLV_OP6_MASK
 
- LVDS_SELLV_OP6_SHIFT
 
- LVDS_SELLV_OP7_MASK
 
- LVDS_SELLV_OP7_SHIFT
 
- LVDS_SELLV_OP9_MASK
 
- LVDS_SELLV_OP9_SHIFT
 
- LVDS_SELLV_TXCLK_MASK
 
- LVDS_SELLV_TXCLK_SHIFT
 
- LVDS_SELLV_TXDATA_MASK
 
- LVDS_SELLV_TXDATA_SHIFT
 
- LVDS_SEL_CRTC2
 
- LVDS_SER_EN
 
- LVDS_SRC_MASK
 
- LVDS_SRC_SHIFT
 
- LVDS_SRG_TEST
 
- LVDS_SSC_EN
 
- LVDS_SSC_FREQ_DIV_MASK
 
- LVDS_SSC_FREQ_DIV_SHIFT
 
- LVDS_SSC_MODE_DOWN_SPREAD
 
- LVDS_SSC_RESET_EXT
 
- LVDS_SSC_RNGE_MASK
 
- LVDS_SSC_RNGE_SHIFT
 
- LVDS_START_PHASE_RST_1
 
- LVDS_STATE_MASK
 
- LVDS_STRESSTST_EN
 
- LVDS_SYNC
 
- LVDS_TEST_MON_MASK
 
- LVDS_TEST_MON_SHIFT
 
- LVDS_TTL_EN
 
- LVDS_TX_CMFB_EN
 
- LVDS_TX_DIF_AMP_MASK
 
- LVDS_TX_DIF_AMP_SHIFT
 
- LVDS_TX_DIF_CM_MASK
 
- LVDS_TX_DIF_CM_SHIFT
 
- LVDS_TX_TERM_EN
 
- LVDS_VCODIV_SEL_SE_MASK
 
- LVDS_VCODIV_SEL_SE_SHIFT
 
- LVDS_VCO_VRNG_MASK
 
- LVDS_VCO_VRNG_SHIFT
 
- LVDS_VDDL_MASK
 
- LVDS_VDDL_SHIFT
 
- LVDS_VDDM_MASK
 
- LVDS_VDDM_SHIFT
 
- LVDS_VESA_18
 
- LVDS_VESA_24
 
- LVDS_VREG_IVREF_MASK
 
- LVDS_VREG_IVREF_SHIFT
 
- LVDS_VSYNC_POLARITY
 
- LVDS_script
 
- LVID_INTEGRITY_TYPE_CLOSE
 
- LVID_INTEGRITY_TYPE_OPEN
 
- LVI_B0
 
- LVI_B1
 
- LVI_B2
 
- LVI_B3
 
- LVI_B4
 
- LVI_B5
 
- LVI_B6
 
- LVI_B7
 
- LVI_DE
 
- LVI_G0
 
- LVI_G1
 
- LVI_G2
 
- LVI_G3
 
- LVI_G4
 
- LVI_G5
 
- LVI_G6
 
- LVI_G7
 
- LVI_HS
 
- LVI_L0
 
- LVI_R0
 
- LVI_R1
 
- LVI_R2
 
- LVI_R3
 
- LVI_R4
 
- LVI_R5
 
- LVI_R6
 
- LVI_R7
 
- LVI_VS
 
- LVL2_APER_SIZE
 
- LVL2_CLK_GATE_OVRA
 
- LVL2_CLK_GATE_OVRC
 
- LVL2_CLK_GATE_OVRD
 
- LVL2_CLK_GATE_OVRE
 
- LVL_1_DATA
 
- LVL_1_INST
 
- LVL_2
 
- LVL_3
 
- LVL_BITS
 
- LVL_CLK_DIV
 
- LVL_CLK_MASK
 
- LVL_CLK_SHIFT
 
- LVL_DEPTH
 
- LVL_GRAN
 
- LVL_MASK
 
- LVL_OFFS
 
- LVL_SHFTR_DISABLE_ALL_MASK
 
- LVL_SHFTR_ENABLE_PL_TO_PS
 
- LVL_SHFTR_ENABLE_PS_TO_PL
 
- LVL_SHIFT
 
- LVL_SIZE
 
- LVL_START
 
- LVL_TRACE
 
- LVMX0003
 
- LVMX0407
 
- LVMX0811
 
- LVMX1215
 
- LVMX1619
 
- LVMX2023
 
- LVMX2427
 
- LVM_MAXLVS
 
- LVPECL_8mA
 
- LVPHY0
 
- LVPHY1
 
- LVPW
 
- LVPW_ADDR
 
- LVRT
 
- LVRT_MASK
 
- LVRT_SHIFT
 
- LVS
 
- LVSCC
 
- LVS_OUTPUT_POLARITY_LOW
 
- LVTMATransmitterControl
 
- LVTMA_CNTL
 
- LVTMA_DATA_SYNCHRONIZATION
 
- LVTMA_HDMI_EN
 
- LVTMA_OUTPUT_CONTROL_PARAMETERS_V2
 
- LVTMA_PFREQCHG
 
- LVTMA_PWRSEQ_CNTL__LVTMA_BLON_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_BLON_POL_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_BLON_POL__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_BLON__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_DISABLE_SYNCEN_CONTROL_OF_TX_EN_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_DISABLE_SYNCEN_CONTROL_OF_TX_EN__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_TARGET_STATE_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_TARGET_STATE__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_SYNCEN_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_SYNCEN_OVRD_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_SYNCEN_OVRD__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_SYNCEN_POL_MASK
 
- LVTMA_PWRSEQ_CNTL__LVTMA_SYNCEN_POL__SHIFT
 
- LVTMA_PWRSEQ_CNTL__LVTMA_SYNCEN__SHIFT
 
- LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK
 
- LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1__SHIFT
 
- LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2_MASK
 
- LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT
 
- LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY1_MASK
 
- LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY1__SHIFT
 
- LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2_MASK
 
- LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT
 
- LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3_MASK
 
- LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT
 
- LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_MIN_LENGTH_MASK
 
- LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_MIN_LENGTH__SHIFT
 
- LVTMA_PWRSEQ_DELAY2__LVTMA_PWRUP_DELAY3_MASK
 
- LVTMA_PWRSEQ_DELAY2__LVTMA_PWRUP_DELAY3__SHIFT
 
- LVTMA_PWRSEQ_DELAY2__LVTMA_VARY_BL_OVERRIDE_EN_MASK
 
- LVTMA_PWRSEQ_DELAY2__LVTMA_VARY_BL_OVERRIDE_EN__SHIFT
 
- LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV_MASK
 
- LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT
 
- LVTMA_PWRSEQ_REF_DIV__LVTMA_PWRSEQ_REF_DIV_MASK
 
- LVTMA_PWRSEQ_REF_DIV__LVTMA_PWRSEQ_REF_DIV__SHIFT
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_BLON_MASK
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_BLON__SHIFT
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON_MASK
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DONE_MASK
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DONE__SHIFT
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_STATE_MASK
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_STATE__SHIFT
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_SYNCEN_MASK
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_SYNCEN__SHIFT
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_TARGET_STATE_R_MASK
 
- LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_TARGET_STATE_R__SHIFT
 
- LVTMA_RANDOM_PATTERN_SEED_ALL_PIXELS
 
- LVTMA_RANDOM_PATTERN_SEED_ONLY_DE_HIGH
 
- LVTMA_RANDOM_PATTERN_SEED_RAN_PAT
 
- LVT_MASK
 
- LV_CFG
 
- LV_CFG_CLKPOL1
 
- LV_CFG_CLKPOL2
 
- LV_CFG_LVDLINK
 
- LV_CFG_LVEN
 
- LV_COMPAT_CYL
 
- LV_MX
 
- LV_MX0003
 
- LV_MX0407
 
- LV_MX0811
 
- LV_MX1215
 
- LV_MX1619
 
- LV_MX2023
 
- LV_MX2427
 
- LV_NAME_SIZE
 
- LV_PHY0
 
- LV_PHY0_IS
 
- LV_PHY0_ND
 
- LV_PHY0_PRBS_ON
 
- LV_PHY0_RST
 
- LW
 
- LWACT
 
- LWAKE
 
- LWARN
 
- LWH
 
- LWHPS2FPGA_BRIDGE_NAME
 
- LWHPS2FPGA_RESET
 
- LWL
 
- LWNG_CAPHDR_VERSION
 
- LWNG_CAP_DID_BASE
 
- LWNG_SETVAL
 
- LWPME
 
- LWPP
 
- LWPTN
 
- LWREG_NOP
 
- LWR_ADDR
 
- LWR_CFG
 
- LWR_CTRL
 
- LWR_RANGE
 
- LWR_SUSP_CTRL
 
- LWR_SUSP_CTRL_EN
 
- LWSYNC
 
- LWS_ENTRY
 
- LWTUNNEL_ENCAP_BPF
 
- LWTUNNEL_ENCAP_ILA
 
- LWTUNNEL_ENCAP_IP
 
- LWTUNNEL_ENCAP_IP6
 
- LWTUNNEL_ENCAP_MAX
 
- LWTUNNEL_ENCAP_MPLS
 
- LWTUNNEL_ENCAP_NONE
 
- LWTUNNEL_ENCAP_SEG6
 
- LWTUNNEL_ENCAP_SEG6_LOCAL
 
- LWTUNNEL_HASH_BITS
 
- LWTUNNEL_HASH_SIZE
 
- LWTUNNEL_IP6_DST
 
- LWTUNNEL_IP6_FLAGS
 
- LWTUNNEL_IP6_HOPLIMIT
 
- LWTUNNEL_IP6_ID
 
- LWTUNNEL_IP6_MAX
 
- LWTUNNEL_IP6_PAD
 
- LWTUNNEL_IP6_SRC
 
- LWTUNNEL_IP6_TC
 
- LWTUNNEL_IP6_UNSPEC
 
- LWTUNNEL_IP_DST
 
- LWTUNNEL_IP_FLAGS
 
- LWTUNNEL_IP_ID
 
- LWTUNNEL_IP_MAX
 
- LWTUNNEL_IP_PAD
 
- LWTUNNEL_IP_SRC
 
- LWTUNNEL_IP_TOS
 
- LWTUNNEL_IP_TTL
 
- LWTUNNEL_IP_UNSPEC
 
- LWTUNNEL_STATE_INPUT_REDIRECT
 
- LWTUNNEL_STATE_OUTPUT_REDIRECT
 
- LWTUNNEL_STATE_XMIT_REDIRECT
 
- LWTUNNEL_XMIT_CONTINUE
 
- LWTUNNEL_XMIT_DONE
 
- LWT_BPF_IN
 
- LWT_BPF_MAX
 
- LWT_BPF_MAX_HEADROOM
 
- LWT_BPF_OUT
 
- LWT_BPF_PROG_FD
 
- LWT_BPF_PROG_MAX
 
- LWT_BPF_PROG_NAME
 
- LWT_BPF_PROG_UNSPEC
 
- LWT_BPF_UNSPEC
 
- LWT_BPF_XMIT
 
- LWT_BPF_XMIT_HEADROOM
 
- LWX_FREQ
 
- LWZ
 
- LWZX_BE
 
- LW_A_WCACHE
 
- LW_LALPHA
 
- LW_OFM
 
- LW_TBU_EN
 
- LW_URGENT
 
- LX0__RESERVED_MASK
 
- LX0__RESERVED__SHIFT
 
- LX1__RESERVED_MASK
 
- LX1__RESERVED__SHIFT
 
- LX2__RESERVED_MASK
 
- LX2__RESERVED__SHIFT
 
- LX3__RESERVED_MASK
 
- LX3__RESERVED__SHIFT
 
- LX6464ES_H
 
- LXBFCR_BF1
 
- LXBFCR_BF2
 
- LXCACR_CONSTA
 
- LXCFBLNR_CFBLN
 
- LXCFBLR_CFBLL
 
- LXCFBLR_CFBP
 
- LXCR_CLUTEN
 
- LXCR_COLKEN
 
- LXCR_LEN
 
- LXMAX
 
- LXMAX_ADDR
 
- LXMAX_XM_MASK
 
- LXP
 
- LXPFCR_PF
 
- LXRMH
 
- LXT1000_1000M
 
- LXT1000_100M
 
- LXT1000_Full
 
- LXT971_PHY_ID
 
- LXT971_PHY_MASK
 
- LXT_GROUP_SIZE
 
- LXT_LUNIDX_SHIFT
 
- LXT_NUM_GROUPS
 
- LXT_PERM_SHIFT
 
- LXVD2X
 
- LXVD2X_ROT
 
- LXWHPCR_WHSPPOS
 
- LXWHPCR_WHSTPOS
 
- LXWVPCR_WVSPPOS
 
- LXWVPCR_WVSTPOS
 
- LX_CORE_H
 
- LX_DEFS_H
 
- LX_EXCEPTION_ADDR
 
- LX_NODE_BASE
 
- LX_STREAM_STATUS_FREE
 
- LX_STREAM_STATUS_RUNNING
 
- LX_STREAM_STATUS_SCHEDULE_RUN
 
- LX_STREAM_STATUS_SCHEDULE_STOP
 
- LYMAX
 
- LYMAX_ADDR
 
- LYMAX_YM_MASK
 
- LYNXDRV_H_
 
- LYNX_CURSOR_H__
 
- LYT_NM
 
- LYT_NM_WB
 
- LYT_WB
 
- LZ4HC_CCtx_internal
 
- LZ4HC_DEFAULT_CLEVEL
 
- LZ4HC_DICTIONARY_LOGSIZE
 
- LZ4HC_HASHTABLESIZE
 
- LZ4HC_HASH_LOG
 
- LZ4HC_HASH_MASK
 
- LZ4HC_Insert
 
- LZ4HC_InsertAndFindBestMatch
 
- LZ4HC_InsertAndGetWiderMatch
 
- LZ4HC_MAXD
 
- LZ4HC_MAXD_MASK
 
- LZ4HC_MAX_CLEVEL
 
- LZ4HC_MEM_COMPRESS
 
- LZ4HC_MIN_CLEVEL
 
- LZ4HC_compress_generic
 
- LZ4HC_encodeSequence
 
- LZ4HC_hashPtr
 
- LZ4HC_init
 
- LZ4HC_setExternalDict
 
- LZ4_ACCELERATION_DEFAULT
 
- LZ4_ARCH64
 
- LZ4_COMPRESSBOUND
 
- LZ4_COMPRESSION
 
- LZ4_DECOMPRESS_INPLACE_MARGIN
 
- LZ4_DEFAULT_UNCOMPRESSED_CHUNK_SIZE
 
- LZ4_DISTANCE_MAX
 
- LZ4_HASHLOG
 
- LZ4_HASHTABLESIZE
 
- LZ4_HASH_SIZE_U32
 
- LZ4_LEGACY
 
- LZ4_LITTLE_ENDIAN
 
- LZ4_MAX_DISTANCE_PAGES
 
- LZ4_MAX_INPUT_SIZE
 
- LZ4_MEMORY_USAGE
 
- LZ4_MEM_COMPRESS
 
- LZ4_NbCommonBytes
 
- LZ4_SKIPTRIGGER
 
- LZ4_STATIC_ASSERT
 
- LZ4_STREAMDECODESIZE
 
- LZ4_STREAMDECODESIZE_U64
 
- LZ4_STREAMHCSIZE
 
- LZ4_STREAMHCSIZE_SIZET
 
- LZ4_STREAMSIZE
 
- LZ4_STREAMSIZE_U64
 
- LZ4_compressBound
 
- LZ4_compressHC_continue_generic
 
- LZ4_compress_HC
 
- LZ4_compress_HC_continue
 
- LZ4_compress_HC_extStateHC
 
- LZ4_compress_default
 
- LZ4_compress_destSize
 
- LZ4_compress_destSize_extState
 
- LZ4_compress_destSize_generic
 
- LZ4_compress_fast
 
- LZ4_compress_fast_continue
 
- LZ4_compress_fast_extState
 
- LZ4_compress_generic
 
- LZ4_copy8
 
- LZ4_count
 
- LZ4_decompress_fast
 
- LZ4_decompress_fast_continue
 
- LZ4_decompress_fast_doubleDict
 
- LZ4_decompress_fast_extDict
 
- LZ4_decompress_fast_usingDict
 
- LZ4_decompress_generic
 
- LZ4_decompress_safe
 
- LZ4_decompress_safe_continue
 
- LZ4_decompress_safe_doubleDict
 
- LZ4_decompress_safe_forceExtDict
 
- LZ4_decompress_safe_partial
 
- LZ4_decompress_safe_usingDict
 
- LZ4_decompress_safe_withPrefix64k
 
- LZ4_decompress_safe_withSmallPrefix
 
- LZ4_getPosition
 
- LZ4_getPositionOnHash
 
- LZ4_hash4
 
- LZ4_hash5
 
- LZ4_hashPosition
 
- LZ4_loadDict
 
- LZ4_loadDictHC
 
- LZ4_putPosition
 
- LZ4_putPositionOnHash
 
- LZ4_read16
 
- LZ4_read32
 
- LZ4_readLE16
 
- LZ4_read_ARCH
 
- LZ4_renormDictT
 
- LZ4_resetStream
 
- LZ4_resetStreamHC
 
- LZ4_saveDict
 
- LZ4_saveDictHC
 
- LZ4_setStreamDecode
 
- LZ4_streamDecode_t
 
- LZ4_streamDecode_t_internal
 
- LZ4_streamHC_t
 
- LZ4_stream_t
 
- LZ4_stream_t_internal
 
- LZ4_wildCopy
 
- LZ4_write16
 
- LZ4_write32
 
- LZ4_writeLE16
 
- LZCNT_O0_G2
 
- LZMA_ALIGN
 
- LZMA_BASE_SIZE
 
- LZMA_COMPRESSION
 
- LZMA_END_POS_MODEL_INDEX
 
- LZMA_IN_REQUIRED
 
- LZMA_IOBUF_SIZE
 
- LZMA_IS_MATCH
 
- LZMA_IS_REP
 
- LZMA_IS_REP_0_LONG
 
- LZMA_IS_REP_G0
 
- LZMA_IS_REP_G1
 
- LZMA_IS_REP_G2
 
- LZMA_LEN_CHOICE
 
- LZMA_LEN_CHOICE_2
 
- LZMA_LEN_CODER
 
- LZMA_LEN_HIGH
 
- LZMA_LEN_LOW
 
- LZMA_LEN_MID
 
- LZMA_LEN_NUM_HIGH_BITS
 
- LZMA_LEN_NUM_LOW_BITS
 
- LZMA_LEN_NUM_MID_BITS
 
- LZMA_LITERAL
 
- LZMA_LIT_SIZE
 
- LZMA_MATCH_MIN_LEN
 
- LZMA_NUM_ALIGN_BITS
 
- LZMA_NUM_FULL_DISTANCES
 
- LZMA_NUM_LEN_PROBS
 
- LZMA_NUM_LEN_TO_POS_STATES
 
- LZMA_NUM_LIT_STATES
 
- LZMA_NUM_POS_BITS_MAX
 
- LZMA_NUM_POS_SLOT_BITS
 
- LZMA_NUM_STATES
 
- LZMA_POS_SLOT
 
- LZMA_REP_LEN_CODER
 
- LZMA_SPEC_POS
 
- LZMA_START_POS_MODEL_INDEX
 
- LZO1X_1_MEM_COMPRESS
 
- LZO1X_MEM_COMPRESS
 
- LZO_BLOCK_NUM
 
- LZO_BLOCK_SIZE
 
- LZO_CMP_PAGES
 
- LZO_CMP_SIZE
 
- LZO_COMPRESSION
 
- LZO_E_EOF_NOT_FOUND
 
- LZO_E_ERROR
 
- LZO_E_INPUT_NOT_CONSUMED
 
- LZO_E_INPUT_OVERRUN
 
- LZO_E_INVALID_ARGUMENT
 
- LZO_E_LOOKBEHIND_OVERRUN
 
- LZO_E_NOT_COMPRESSIBLE
 
- LZO_E_NOT_YET_IMPLEMENTED
 
- LZO_E_OK
 
- LZO_E_OUTPUT_OVERRUN
 
- LZO_E_OUT_OF_MEMORY
 
- LZO_FAST_64BIT_MEMORY_ACCESS
 
- LZO_HEADER
 
- LZO_LEN
 
- LZO_MAX_RD_PAGES
 
- LZO_MIN_RD_PAGES
 
- LZO_THREADS
 
- LZO_UNC_PAGES
 
- LZO_UNC_SIZE
 
- LZO_USE_CTZ32
 
- LZO_USE_CTZ64
 
- LZO_VERSION
 
- LZS_FORMAT
 
- L_ADDRREG
 
- L_AGOFF_REG
 
- L_AGON_REG
 
- L_A_RCACHE
 
- L_BUSIF
 
- L_CMDERR
 
- L_CODES
 
- L_CONFIG
 
- L_CPV1_HE_ADDR
 
- L_CPV1_HS_ADDR
 
- L_CPV1_VE_ADDR
 
- L_CPV1_VS_ADDR
 
- L_CPV2_HE_ADDR
 
- L_CPV2_HS_ADDR
 
- L_CPV2_VE_ADDR
 
- L_CPV2_VS_ADDR
 
- L_CTRL_PATTERN
 
- L_DATAREG
 
- L_DE_HE_ADDR
 
- L_DE_HS_ADDR
 
- L_DE_VE_ADDR
 
- L_DE_VS_ADDR
 
- L_DITH_CNTL_ADDR
 
- L_DUAL_PORT_CNTL_ADDR
 
- L_DVC
 
- L_ECHO
 
- L_ECHOCTL
 
- L_ECHOE
 
- L_ECHOK
 
- L_ECHOKE
 
- L_ECHONL
 
- L_ECHOPRT
 
- L_EN
 
- L_EXTPROC
 
- L_FLUSHO
 
- L_FT
 
- L_FTSEL
 
- L_GAMMA_ADDR_PORT
 
- L_GAMMA_CNTL_PORT
 
- L_GAMMA_DATA_PORT
 
- L_GAMMA_PROBE_COLOR_H
 
- L_GAMMA_PROBE_COLOR_L
 
- L_GAMMA_PROBE_CTRL
 
- L_GAMMA_PROBE_HL_COLOR
 
- L_GAMMA_PROBE_POS_X
 
- L_GAMMA_PROBE_POS_Y
 
- L_GAMMA_VCOM_HSWITCH_ADDR
 
- L_HFLIP
 
- L_HSYNC_HE_ADDR
 
- L_HSYNC_HS_ADDR
 
- L_HSYNC_VE_ADDR
 
- L_HSYNC_VS_ADDR
 
- L_ICANON
 
- L_IEXTEN
 
- L_INDICATOR
 
- L_INFO_ABUF_SIZE
 
- L_INFO_CM
 
- L_INFO_RF
 
- L_INV_CNT_ADDR
 
- L_ISIG
 
- L_IT
 
- L_ITSEL
 
- L_IVC
 
- L_LCD_MCU_CTL
 
- L_LCD_PWM0_HI_ADDR
 
- L_LCD_PWM0_LO_ADDR
 
- L_LCD_PWM1_HI_ADDR
 
- L_LCD_PWM1_LO_ADDR
 
- L_LCD_PWR_ADDR
 
- L_LSB
 
- L_LSWMSB
 
- L_LTF
 
- L_MSWLSB
 
- L_NOFLSH
 
- L_OEH_HE_ADDR
 
- L_OEH_HS_ADDR
 
- L_OEH_VE_ADDR
 
- L_OEH_VS_ADDR
 
- L_OEV1_HE_ADDR
 
- L_OEV1_HS_ADDR
 
- L_OEV1_VE_ADDR
 
- L_OEV1_VS_ADDR
 
- L_OEV2_HE_ADDR
 
- L_OEV2_HS_ADDR
 
- L_OEV2_VE_ADDR
 
- L_OEV2_VS_ADDR
 
- L_OEV3_HE_ADDR
 
- L_OEV3_HS_ADDR
 
- L_OEV3_VE_ADDR
 
- L_OEV3_VS_ADDR
 
- L_PENDIN
 
- L_PGD_SWAPPER
 
- L_PMD_S2_RDONLY
 
- L_PMD_S2_RDWR
 
- L_PMD_SECT_DIRTY
 
- L_PMD_SECT_NONE
 
- L_PMD_SECT_RDONLY
 
- L_PMD_SECT_VALID
 
- L_POL_CNTL_ADDR
 
- L_PTE_DIRTY
 
- L_PTE_DIRTY_HIGH
 
- L_PTE_HYP
 
- L_PTE_MT_BUFFERABLE
 
- L_PTE_MT_DEV_CACHED
 
- L_PTE_MT_DEV_NONSHARED
 
- L_PTE_MT_DEV_SHARED
 
- L_PTE_MT_DEV_WC
 
- L_PTE_MT_MASK
 
- L_PTE_MT_MINICACHE
 
- L_PTE_MT_UNCACHED
 
- L_PTE_MT_VECTORS
 
- L_PTE_MT_WRITEALLOC
 
- L_PTE_MT_WRITEBACK
 
- L_PTE_MT_WRITETHROUGH
 
- L_PTE_NONE
 
- L_PTE_PRESENT
 
- L_PTE_RDONLY
 
- L_PTE_S2_MT_DEV_SHARED
 
- L_PTE_S2_MT_MASK
 
- L_PTE_S2_MT_UNCACHED
 
- L_PTE_S2_MT_WRITEBACK
 
- L_PTE_S2_MT_WRITETHROUGH
 
- L_PTE_S2_RDONLY
 
- L_PTE_S2_RDWR
 
- L_PTE_SHARED
 
- L_PTE_SPECIAL
 
- L_PTE_USER
 
- L_PTE_VALID
 
- L_PTE_XN
 
- L_PTE_XN_HIGH
 
- L_PTE_YOUNG
 
- L_R2R
 
- L_RESET
 
- L_RGB_BASE_ADDR
 
- L_RGB_COEFF_ADDR
 
- L_ROT
 
- L_ROT_R0
 
- L_ROT_R180
 
- L_ROT_R270
 
- L_ROT_R90
 
- L_SECAM_NICAM
 
- L_SHIFT_1_MASK
 
- L_SHIFT_2_MASK
 
- L_SHIFT_4_MASK
 
- L_SIG
 
- L_STF
 
- L_STH1_HE_ADDR
 
- L_STH1_HS_ADDR
 
- L_STH1_VE_ADDR
 
- L_STH1_VS_ADDR
 
- L_STH2_HE_ADDR
 
- L_STH2_HS_ADDR
 
- L_STH2_VE_ADDR
 
- L_STH2_VS_ADDR
 
- L_STV1_HE_ADDR
 
- L_STV1_HS_ADDR
 
- L_STV1_VE_ADDR
 
- L_STV1_VS_ADDR
 
- L_STV2_HE_ADDR
 
- L_STV2_HS_ADDR
 
- L_STV2_VE_ADDR
 
- L_STV2_VS_ADDR
 
- L_TBU_EN
 
- L_TCON_DOUBLE_CTL
 
- L_TCON_MISC_SEL_ADDR
 
- L_TCON_PATTERN_HI
 
- L_TCON_PATTERN_LO
 
- L_TOSTOP
 
- L_VCOM_HSWITCH_ADDR
 
- L_VCOM_VE_ADDR
 
- L_VCOM_VS_ADDR
 
- L_VFLIP
 
- L_VSYNC_HE_ADDR
 
- L_VSYNC_HS_ADDR
 
- L_VSYNC_VE_ADDR
 
- L_VSYNC_VS_ADDR
 
- L_XCASE
 
- LanWake
 
- LargeSend
 
- LastCommCommand
 
- LastDev
 
- LastFileSystemCommand
 
- LastFrag
 
- LastMiscCommand
 
- LastTestCommand
 
- LateCollisions
 
- LazyWrite
 
- Lcdcfg_In_Fmt
 
- Lconsole_struct_cur_column
 
- Lconsole_struct_cur_row
 
- Lconsole_struct_left_edge
 
- Lconsole_struct_num_columns
 
- Lconsole_struct_num_rows
 
- LeaveAllPowerSaveMode
 
- LeaveAllPowerSaveModeDirect
 
- LeaveFunction
 
- LedBlink_param
 
- LedControl871x
 
- LeftAntenna
 
- Legacy_1A
 
- Legacy_1B
 
- Legacy_2E
 
- Legacy_2F
 
- Legacy_2G
 
- Legacy_2H
 
- Legacy_3A
 
- Legacy_3B
 
- Len
 
- LenChg
 
- Lessthan
 
- Lessthanbit
 
- LevelOnePHY
 
- LevelOnePHYID0
 
- LineCompareOff
 
- LinePeripheral
 
- Line_state
 
- LinearAddReg
 
- LinearInt_t
 
- Linetype
 
- Link
 
- LinkBad
 
- LinkChange
 
- LinkChg
 
- LinkEvent
 
- LinkEventEnable
 
- LinkFail
 
- LinkFailStatus
 
- LinkGood
 
- LinkIsUp
 
- LinkIsUp2
 
- LinkNoChange
 
- LinkOK
 
- LinkPass
 
- LinkServiceBufferPostReply_t
 
- LinkServiceBufferPostRequest_t
 
- LinkServiceRspReply_t
 
- LinkServiceRspRequest_t
 
- LinkStatus
 
- LinkUp
 
- Linux_SBus_DMA
 
- Litbits
 
- LmACCUM
 
- LmACK
 
- LmACKREQ
 
- LmACRCERR
 
- LmADDRRCV
 
- LmAIPNRML
 
- LmAIPRV0
 
- LmAIPRV1
 
- LmAIPRV2
 
- LmAIPRVWP
 
- LmAIPWC
 
- LmAIPWD
 
- LmAIPWP
 
- LmALLONES
 
- LmALLZEROS
 
- LmALTMODE
 
- LmANTTTO
 
- LmARP2BREAKADR01
 
- LmARP2BREAKADR23
 
- LmARP2CTL
 
- LmARP2HALTCODE
 
- LmARP2INT
 
- LmARP2INTCTL
 
- LmARP2INTEN
 
- LmATOMICXCHG
 
- LmAUTODISCI
 
- LmBISTCTL0
 
- LmBISTCTL1
 
- LmBITLTTO
 
- LmBITL_TIMER
 
- LmBLIND48
 
- LmBLKRST
 
- LmBLKRST_COMBIST
 
- LmBREAK
 
- LmBREAK_DET
 
- LmBROADCAST_MASK
 
- LmBROADCH
 
- LmBROADRV1
 
- LmBROADRV2
 
- LmBROADRV3
 
- LmBROADRV4
 
- LmBROADRVCH0
 
- LmBROADRVCH1
 
- LmBROADSES
 
- LmCLOSECLAF
 
- LmCLOSENORM
 
- LmCLOSERV0
 
- LmCLOSERV1
 
- LmCLOSE_DET
 
- LmCONSTAT
 
- LmCONTROL
 
- LmCRBLK
 
- LmCRTTTO
 
- LmCURRADDR
 
- LmDATABUFADR_MASK
 
- LmDBGMODE
 
- LmDBGPORT
 
- LmDBGPORTPTR
 
- LmDINDEX
 
- LmDINDIR
 
- LmDISACK
 
- LmDISALIGN
 
- LmDISCRCCHK
 
- LmDISCRCGEN
 
- LmDISPERR
 
- LmDMAT
 
- LmDONE
 
- LmDONETO
 
- LmDONE_DET
 
- LmDSBLANTT
 
- LmDSBLBITLT
 
- LmDSBLCONT
 
- LmDSBLCRTT
 
- LmDSBLDSCR
 
- LmDSBLHOLD
 
- LmDSBLSCR
 
- LmDUALALIGN
 
- LmDWSEVENT
 
- LmERROR
 
- LmFLAG
 
- LmFRAMERCVD
 
- LmFRCARBPERR
 
- LmFRCCRC
 
- LmFRCNAK
 
- LmFRCPERR
 
- LmFRCRBPERR
 
- LmFRCROFS
 
- LmFRCSGBPERR
 
- LmFRCTBPERR
 
- LmFRMERREN
 
- LmFRMERREN_MASK
 
- LmFRMRCVDSTAT
 
- LmFRMTYPE_MASK
 
- LmFUNCTION1
 
- LmHARDRST
 
- LmHOLD
 
- LmHWTINT
 
- LmHWTSTAT
 
- LmHWTSTATEN
 
- LmHWTSTATEN_MASK
 
- LmIMEMBISTDN
 
- LmIMEMBISTEN
 
- LmIMEMBISTFAIL
 
- LmINVDISP
 
- LmINVDW
 
- LmINVDWERR
 
- LmJUMLDIR
 
- LmLASTADDR
 
- LmM0EXPHDRP
 
- LmM0EXPRCVNT
 
- LmM0ICLADR
 
- LmM0INTEN_MASK
 
- LmM0MSKHDRP
 
- LmM0RCVHDRP
 
- LmM1ALIGNMODE
 
- LmM1INTEN_MASK
 
- LmM1SASALIGN
 
- LmM1STPALIGN
 
- LmM1XMTCNT
 
- LmM1XMTHDRP
 
- LmM2INTEN_MASK
 
- LmM2REQMBXF
 
- LmM2RSPMBXE
 
- LmM3FRMGAP
 
- LmM3INTVEC0
 
- LmM3INTVEC1
 
- LmM3INTVEC10
 
- LmM3INTVEC2
 
- LmM3INTVEC3
 
- LmM3INTVEC4
 
- LmM3INTVEC5
 
- LmM3INTVEC6
 
- LmM3INTVEC7
 
- LmM3INTVEC8
 
- LmM3INTVEC9
 
- LmM3SATATIMER
 
- LmM5INTEN_MASK
 
- LmM5OOBSVC
 
- LmMEMSEL_MASK
 
- LmMISSEOAF
 
- LmMISSEOF
 
- LmMISSSOAF
 
- LmMISSSOF
 
- LmMODECTL
 
- LmMODEPTR
 
- LmMnADDRFRM
 
- LmMnBITBUCKET
 
- LmMnBUFPERR
 
- LmMnBUFSTAT
 
- LmMnCFGCMPLT
 
- LmMnCFGEXPSATA
 
- LmMnCFGHDR
 
- LmMnCFGICL
 
- LmMnCFGRBUF
 
- LmMnCFGRDAT
 
- LmMnCFGSATA
 
- LmMnCRCERR
 
- LmMnCTXDONE
 
- LmMnDATABUF
 
- LmMnDATABUFADR
 
- LmMnDATACT
 
- LmMnDATEN
 
- LmMnDATFREE
 
- LmMnDATSUS
 
- LmMnDBYTECNT
 
- LmMnDDMACTL
 
- LmMnDDMAMODE
 
- LmMnDDMAREQ
 
- LmMnDDMASTAT
 
- LmMnDFRMSIZE
 
- LmMnDISCARD
 
- LmMnDISCRC
 
- LmMnDISHDR
 
- LmMnDMAERR
 
- LmMnDMAERRS
 
- LmMnDMATYPE_DEVICE_ONLY_TX
 
- LmMnDMATYPE_HOST_ONLY_TX
 
- LmMnDMATYPE_INVALID
 
- LmMnDMATYPE_MASK
 
- LmMnDMATYPE_NORMAL
 
- LmMnDMAWRAP
 
- LmMnDPACC
 
- LmMnDPACC_MASK
 
- LmMnDPEMPTY
 
- LmMnDPSEL
 
- LmMnDPSEL_MASK
 
- LmMnDRADDR
 
- LmMnDSPACECNT
 
- LmMnDWADDR
 
- LmMnENINTLK
 
- LmMnENXMTCRC
 
- LmMnEOLPRE
 
- LmMnEOSPRE
 
- LmMnFETCHSG
 
- LmMnFLUSH
 
- LmMnFLUSHING
 
- LmMnFRMERR
 
- LmMnHBYTECNT
 
- LmMnHDMAREQ
 
- LmMnHDRMISS
 
- LmMnHOLDLVL
 
- LmMnHRADDR
 
- LmMnHREWIND
 
- LmMnHSPACECNT
 
- LmMnHWADDR
 
- LmMnINT
 
- LmMnINTEN
 
- LmMnLOADCTX
 
- LmMnRESETDAT
 
- LmMnRESETSG
 
- LmMnRLSRTRY
 
- LmMnRLSSCB
 
- LmMnSATAFS
 
- LmMnSAVECTX
 
- LmMnSAVETTR
 
- LmMnSCRATCHPAGE
 
- LmMnSGDMACTL
 
- LmMnSGDMAERRS
 
- LmMnSGDMASTAT
 
- LmMnSTARTDAT
 
- LmMnSTARTSG
 
- LmMnSTOPDAT
 
- LmMnSTOPSG
 
- LmMnSTPCRC
 
- LmMnSUSDAT
 
- LmMnWAITSCB
 
- LmMnXFRCNT
 
- LmMnXFRLVL
 
- LmMnXFRLVL_1024
 
- LmMnXFRLVL_128
 
- LmMnXFRLVL_1536
 
- LmMnXFRLVL_2048
 
- LmMnXFRLVL_256
 
- LmMnXFRLVL_512
 
- LmMnXMTERR
 
- LmMnXMTSIZE
 
- LmMnZERODATA
 
- LmNAK
 
- LmNAKREQ
 
- LmNOTIFYRV0
 
- LmNOTIFYRV1
 
- LmNOTIFYRV2
 
- LmNOTIFYSPIN
 
- LmNXTLADDR
 
- LmOBOVRN
 
- LmOPENACPT
 
- LmOPENRJCT
 
- LmOPENRTRY
 
- LmPHYOVRN
 
- LmPMACK
 
- LmPMNAK
 
- LmPMREQP
 
- LmPMREQS
 
- LmPRGMCNT
 
- LmPRIMODE
 
- LmPRIMSTAT0EN
 
- LmPRIMSTAT0EN_MASK
 
- LmPRIMSTAT1EN
 
- LmPRIMSTAT1EN_MASK
 
- LmPRMSTAT0
 
- LmPRMSTAT0BYTE0
 
- LmPRMSTAT0BYTE1
 
- LmPRMSTAT0BYTE2
 
- LmPRMSTAT0BYTE3
 
- LmPRMSTAT1
 
- LmPRMSTAT1BYTE0
 
- LmPRMSTAT1BYTE1
 
- LmPRMSTAT1BYTE2
 
- LmPRMSTAT1BYTE3
 
- LmRAMPAGE
 
- LmRAMPAGE0
 
- LmRAMPAGE1
 
- LmRAMPAGE_LSHIFT
 
- LmRCVDISP
 
- LmRCVERR
 
- LmRCVIDW
 
- LmRCVMODE_HPC
 
- LmRCVMODE_MASK
 
- LmRCVMODE_PLD
 
- LmRCVPRIM
 
- LmREQMBX
 
- LmRERR
 
- LmRIP
 
- LmROK
 
- LmROTALIGN
 
- LmROTNOTIFY
 
- LmROTSTPALIGN
 
- LmRRDY
 
- LmRRDYOVRN
 
- LmRSPMBX
 
- LmSATAINTLK
 
- LmSCRATCH
 
- LmSCRATCHPAGE
 
- LmSCRBISTDN
 
- LmSCRBISTEN
 
- LmSCRBISTFAIL
 
- LmSEQRAM
 
- LmSEQ_ATA_SCR_REGS
 
- LmSEQ_BREAK_TIMER_TERM_TS
 
- LmSEQ_CIOBUS_REG_BASE
 
- LmSEQ_CLOSE_TIMER_TERM_TS
 
- LmSEQ_COMINIT_TIMER_TERM_TS
 
- LmSEQ_CONCTL
 
- LmSEQ_CONNECTION_MODES
 
- LmSEQ_CONNECTION_STATE
 
- LmSEQ_CONSTAT
 
- LmSEQ_COPY_SMP_CONN_TAG
 
- LmSEQ_DATA_OFFSET
 
- LmSEQ_DATA_TO_CSEQ
 
- LmSEQ_DEVICE_BITS
 
- LmSEQ_DEV_PRES_TIMER_TERM_TS
 
- LmSEQ_DEV_PRES_TMR_TOUT_CONST
 
- LmSEQ_DISPARITY_ERROR_COUNT
 
- LmSEQ_DWS_RESET_TIMER_TERM_TS
 
- LmSEQ_EMPTY_BUFS_AVAIL
 
- LmSEQ_EMPTY_SCB_HEAD
 
- LmSEQ_EMPTY_SCB_OPCD0
 
- LmSEQ_EMPTY_SCB_OPCD1
 
- LmSEQ_EMPTY_SCB_OPCD2
 
- LmSEQ_EMPTY_SCB_OPCD3
 
- LmSEQ_EMPTY_SCB_PTR0
 
- LmSEQ_EMPTY_SCB_PTR1
 
- LmSEQ_EMPTY_SCB_PTR2
 
- LmSEQ_EMPTY_SCB_PTR3
 
- LmSEQ_EMPTY_SCB_TAIL
 
- LmSEQ_EMPTY_TRANS_CTX
 
- LmSEQ_EST_NEXUS_BUF_AVAIL
 
- LmSEQ_EST_NEXUS_SCBPTR0
 
- LmSEQ_EST_NEXUS_SCBPTR1
 
- LmSEQ_EST_NEXUS_SCBPTR2
 
- LmSEQ_EST_NEXUS_SCBPTR3
 
- LmSEQ_EST_NEXUS_SCB_HEAD
 
- LmSEQ_EST_NEXUS_SCB_OPCODE0
 
- LmSEQ_EST_NEXUS_SCB_OPCODE1
 
- LmSEQ_EST_NEXUS_SCB_OPCODE2
 
- LmSEQ_EST_NEXUS_SCB_OPCODE3
 
- LmSEQ_EST_NEXUS_SCB_TAIL
 
- LmSEQ_FAILED_OPEN_STATUS
 
- LmSEQ_FIRST_INV_DDB_SITE
 
- LmSEQ_FIRST_INV_SCB_SITE
 
- LmSEQ_FRAME_TYPE_MASK
 
- LmSEQ_HASHED_DEST_ADDR_MASK
 
- LmSEQ_HASHED_SRC_ADDR_MASK
 
- LmSEQ_HASHED_SRC_ADDR_MASK_PRINT
 
- LmSEQ_HOST_REG_SIZE
 
- LmSEQ_INI_CONN_TAG
 
- LmSEQ_INTEN_SAVE
 
- LmSEQ_INVALID_DWORD_COUNT
 
- LmSEQ_IP_BITL
 
- LmSEQ_ISR_SAVE_DINDEX
 
- LmSEQ_ISR_SAVE_SINDEX
 
- LmSEQ_LAST_LOADED_SGE
 
- LmSEQ_LAST_LOADED_SG_EL
 
- LmSEQ_LINK_NUMBER
 
- LmSEQ_LINK_RESET_RETRY_COUNT
 
- LmSEQ_LINK_RST_ERR
 
- LmSEQ_LINK_RST_FRM_LEN
 
- LmSEQ_LINK_RST_PROTOCOL
 
- LmSEQ_LOSS_OF_SYNC_COUNT
 
- LmSEQ_M1_EMPTY_TRANS_CTX
 
- LmSEQ_M1_LAST_LOADED_SGE
 
- LmSEQ_M1_RESP_STATUS
 
- LmSEQ_M1_SAVE_SCBPTR
 
- LmSEQ_M1_SG_LIST_PTR_ADDR0
 
- LmSEQ_M1_SG_LIST_PTR_ADDR1
 
- LmSEQ_MCTL_TIMER_TERM_TS
 
- LmSEQ_MODE_FLAGS
 
- LmSEQ_MODE_PAGE_SIZE
 
- LmSEQ_NOTIFY_TIMER_DOWN_COUNT
 
- LmSEQ_NOTIFY_TIMER_INITIAL_COUNT
 
- LmSEQ_NOTIFY_TIMER_TIMEOUT
 
- LmSEQ_NUM_FILL_BYTES_MASK
 
- LmSEQ_NUM_LINK_RESET_RETRIES
 
- LmSEQ_ONE_MILLISEC_TIMEOUT
 
- LmSEQ_OOB_INT_ENABLES
 
- LmSEQ_OOB_REG
 
- LmSEQ_OPCODE_TO_CSEQ
 
- LmSEQ_OPEN_TIMER_TERM_TS
 
- LmSEQ_P0M2_OFFS1AH
 
- LmSEQ_PHY_BASE
 
- LmSEQ_PHY_REG
 
- LmSEQ_PM_TABLE_PTR
 
- LmSEQ_PORT_COUNTER
 
- LmSEQ_Q_LINK_HEAD
 
- LmSEQ_Q_TGTXFR_HEAD
 
- LmSEQ_Q_TGTXFR_TAIL
 
- LmSEQ_Q_XMIT_HEAD
 
- LmSEQ_RCV_FIS_TIMEOUT
 
- LmSEQ_RCV_FIS_TIMER_TERM_TS
 
- LmSEQ_RCV_ID_TIMER_TERM_TS
 
- LmSEQ_REG0_ISR
 
- LmSEQ_REG0_MODE
 
- LmSEQ_REG1_ISR
 
- LmSEQ_REG2_ISR
 
- LmSEQ_REG3_ISR
 
- LmSEQ_RESP_LEN
 
- LmSEQ_RESP_STATUS
 
- LmSEQ_RET_ADDR
 
- LmSEQ_RET_ADDR1
 
- LmSEQ_RET_ADDR2
 
- LmSEQ_SAS_RESET_MODE
 
- LmSEQ_SATA_INTERLOCK_TIMEOUT
 
- LmSEQ_SATA_INTERLOCK_TIMER_TERM_TS
 
- LmSEQ_SATA_INTERLOCK_TMR_SAVE
 
- LmSEQ_SAVED_OOB_MODE
 
- LmSEQ_SAVED_OOB_SIGNALS
 
- LmSEQ_SAVED_OOB_STATUS
 
- LmSEQ_SAVE_SCBPTR
 
- LmSEQ_SCRATCH_FLAGS
 
- LmSEQ_SDB_CURR_TAG
 
- LmSEQ_SDB_DDB
 
- LmSEQ_SDB_NUM_TAGS
 
- LmSEQ_SG_LIST_PTR_ADDR0
 
- LmSEQ_SG_LIST_PTR_ADDR1
 
- LmSEQ_SMP_RCV_TIMEOUT
 
- LmSEQ_SMP_RCV_TIMER_TERM_TS
 
- LmSEQ_SRST_ASSERT_TIMEOUT
 
- LmSEQ_SRST_AS_TIMER_TERM_TS
 
- LmSEQ_STP_SHUTDOWN_TIMEOUT
 
- LmSEQ_STP_SHUTDOWN_TIMER_TERM_TS
 
- LmSEQ_TAG_MASK
 
- LmSEQ_TARGET_PORT_XFER_TAG
 
- LmSEQ_TEN_MS_COMINIT_TIMEOUT
 
- LmSEQ_TIMEOUT_CONST
 
- LmSEQ_TX_ID_ADDR_FRAME
 
- LmSEQ_XMIT_REQUEST_TYPE
 
- LmSG_COMMAND
 
- LmSG_DATA
 
- LmSG_IDENADDR
 
- LmSG_OPENADDR
 
- LmSG_RESPONSE
 
- LmSG_TASK
 
- LmSG_TGTXFER
 
- LmSINDEX
 
- LmSINDIR
 
- LmSMDBGCTL
 
- LmSMSTATE
 
- LmSMSTATEBRK
 
- LmSSRCVFRM
 
- LmSSXMTFRM
 
- LmSTACK
 
- LmSTEPRCVFRM
 
- LmSTEPXMTFRM
 
- LmSTPALIGN
 
- LmSYNC
 
- LmSYNCSRST
 
- LmTIMERCALC
 
- LmUNKNOWNP
 
- LmWWN
 
- LmXFRRDYRCVD
 
- LmXHOLD
 
- LmXMTPRIMCS
 
- LmXMTPRIMD
 
- LmXRDY
 
- LmXTEST
 
- Lmrefresh_Tref
 
- Lmtim_Tdpl
 
- Lmtim_Tras
 
- Lmtim_Trc
 
- Lmtim_Trcd
 
- Lmtim_Trp
 
- Lo16
 
- Lo8
 
- Lo_bound
 
- Lo_rundown
 
- Lo_unbound
 
- LoadBitmap
 
- LoadBmp
 
- LoadDACFlag
 
- LoadDW
 
- LoadHW
 
- LoadHWE
 
- LoadHWU
 
- LoadHWUE
 
- LoadStateExt
 
- LoadVidCode
 
- LoadW
 
- LoadWE
 
- LoadWU
 
- LoadWUE
 
- LoadedProgram
 
- Local_Mib_Type
 
- LocationConfirm
 
- LocationRequest
 
- Lock
 
- Log2Int
 
- LogDevAddr
 
- LogDevAddr_struct
 
- LogPage0_t
 
- LogSyncRelease
 
- LogicalAdrs
 
- LogitechClickSmart310
 
- LogitechClickSmart420
 
- LogitechClickSmart510
 
- LogitechClickSmart820
 
- LogitechTraveler
 
- LogvolInfo_struct
 
- LongAddr
 
- LongTPMode
 
- Lookup
 
- Loongson_1A
 
- Loongson_1B
 
- Loongson_2E
 
- Loongson_2F
 
- Loongson_2G
 
- Loongson_2H
 
- Loongson_3A
 
- Loongson_3B
 
- Loop01
 
- Loop02
 
- Loop03
 
- Loop04
 
- Loop05
 
- LowModeTests
 
- LowSclkInterruptThreshold
 
- LowThresholdShift
 
- LowWater
 
- Low_water
 
- LowerWordSwap
 
- LpDdr2MemType
 
- LpDdr3MemType
 
- LpDdr4MemType
 
- LpDdrMemType
 
- LptNumBanks
 
- LptNumPipes
 
[..]