[..]
- E
- E0
- E0_DET
- E0_RISE
- E1
- E10
- E1000E_INT_MODE_LEGACY
- E1000E_INT_MODE_MSI
- E1000E_INT_MODE_MSIX
- E1000_82542_2_0_REV_ID
- E1000_82542_2_1_REV_ID
- E1000_82542_AIT
- E1000_82542_ALGNERRC
- E1000_82542_BPRC
- E1000_82542_BPTC
- E1000_82542_CEXTERR
- E1000_82542_COLC
- E1000_82542_CPUVEC
- E1000_82542_CRCERRS
- E1000_82542_CTL_AUX
- E1000_82542_CTRL
- E1000_82542_CTRL_DUP
- E1000_82542_CTRL_EXT
- E1000_82542_DC
- E1000_82542_DCA_RXCTRL
- E1000_82542_ECOL
- E1000_82542_EEARBC
- E1000_82542_EECD
- E1000_82542_EEMNGCTL
- E1000_82542_EERD
- E1000_82542_EEWR
- E1000_82542_ERT
- E1000_82542_EXTCNF_CTRL
- E1000_82542_EXTCNF_SIZE
- E1000_82542_FACTPS
- E1000_82542_FCAH
- E1000_82542_FCAL
- E1000_82542_FCRTH
- E1000_82542_FCRTL
- E1000_82542_FCRUC
- E1000_82542_FCT
- E1000_82542_FCTTV
- E1000_82542_FEXTNVM
- E1000_82542_FFLT
- E1000_82542_FFLT_DBG
- E1000_82542_FFMT
- E1000_82542_FFVT
- E1000_82542_FLA
- E1000_82542_FLASHT
- E1000_82542_FLOP
- E1000_82542_FLSWCNT
- E1000_82542_FLSWCTL
- E1000_82542_FLSWDATA
- E1000_82542_FWSM
- E1000_82542_GCR
- E1000_82542_GORCH
- E1000_82542_GORCL
- E1000_82542_GOTCH
- E1000_82542_GOTCL
- E1000_82542_GPRC
- E1000_82542_GPTC
- E1000_82542_GSCL_1
- E1000_82542_GSCL_2
- E1000_82542_GSCL_3
- E1000_82542_GSCL_4
- E1000_82542_HICR
- E1000_82542_HOST_IF
- E1000_82542_IAC
- E1000_82542_IAM
- E1000_82542_ICR
- E1000_82542_ICRXATC
- E1000_82542_ICRXDMTC
- E1000_82542_ICRXOC
- E1000_82542_ICRXPTC
- E1000_82542_ICS
- E1000_82542_ICTXATC
- E1000_82542_ICTXPTC
- E1000_82542_ICTXQEC
- E1000_82542_ICTXQMTC
- E1000_82542_IMC
- E1000_82542_IMS
- E1000_82542_IP4AT
- E1000_82542_IP6AT
- E1000_82542_IPAV
- E1000_82542_ITR
- E1000_82542_KABGTXD
- E1000_82542_KUMCTRLSTA
- E1000_82542_LATECOL
- E1000_82542_LEDCTL
- E1000_82542_MANC
- E1000_82542_MCC
- E1000_82542_MDIC
- E1000_82542_MGTPDC
- E1000_82542_MGTPRC
- E1000_82542_MGTPTC
- E1000_82542_MPC
- E1000_82542_MPRC
- E1000_82542_MPTC
- E1000_82542_MRQC
- E1000_82542_MTA
- E1000_82542_PBA
- E1000_82542_PBS
- E1000_82542_PHY_CTRL
- E1000_82542_PRC1023
- E1000_82542_PRC127
- E1000_82542_PRC1522
- E1000_82542_PRC255
- E1000_82542_PRC511
- E1000_82542_PRC64
- E1000_82542_PSRCTL
- E1000_82542_PTC1023
- E1000_82542_PTC127
- E1000_82542_PTC1522
- E1000_82542_PTC255
- E1000_82542_PTC511
- E1000_82542_PTC64
- E1000_82542_RA
- E1000_82542_RADV
- E1000_82542_RAID
- E1000_82542_RCTL
- E1000_82542_RDBAH
- E1000_82542_RDBAH0
- E1000_82542_RDBAH1
- E1000_82542_RDBAH2
- E1000_82542_RDBAH3
- E1000_82542_RDBAL
- E1000_82542_RDBAL0
- E1000_82542_RDBAL1
- E1000_82542_RDBAL2
- E1000_82542_RDBAL3
- E1000_82542_RDFH
- E1000_82542_RDFHS
- E1000_82542_RDFPC
- E1000_82542_RDFT
- E1000_82542_RDFTS
- E1000_82542_RDH
- E1000_82542_RDH0
- E1000_82542_RDH1
- E1000_82542_RDH2
- E1000_82542_RDH3
- E1000_82542_RDLEN
- E1000_82542_RDLEN0
- E1000_82542_RDLEN1
- E1000_82542_RDLEN2
- E1000_82542_RDLEN3
- E1000_82542_RDT
- E1000_82542_RDT0
- E1000_82542_RDT1
- E1000_82542_RDT2
- E1000_82542_RDT3
- E1000_82542_RDTR
- E1000_82542_RDTR0
- E1000_82542_RDTR1
- E1000_82542_RETA
- E1000_82542_RFC
- E1000_82542_RFCTL
- E1000_82542_RJC
- E1000_82542_RLEC
- E1000_82542_RNBC
- E1000_82542_ROC
- E1000_82542_RSRPD
- E1000_82542_RSSIM
- E1000_82542_RSSIR
- E1000_82542_RSSRK
- E1000_82542_RUC
- E1000_82542_RXCSUM
- E1000_82542_RXCW
- E1000_82542_RXDCTL
- E1000_82542_RXDCTL1
- E1000_82542_RXERRC
- E1000_82542_SCC
- E1000_82542_SCTL
- E1000_82542_SEC
- E1000_82542_SRRCTL
- E1000_82542_STATUS
- E1000_82542_SWSM
- E1000_82542_SW_FW_SYNC
- E1000_82542_SYMERRS
- E1000_82542_TADV
- E1000_82542_TARC0
- E1000_82542_TARC1
- E1000_82542_TBT
- E1000_82542_TCTL
- E1000_82542_TCTL_EXT
- E1000_82542_TDBAH
- E1000_82542_TDBAH1
- E1000_82542_TDBAL
- E1000_82542_TDBAL1
- E1000_82542_TDFH
- E1000_82542_TDFHS
- E1000_82542_TDFPC
- E1000_82542_TDFT
- E1000_82542_TDFTS
- E1000_82542_TDH
- E1000_82542_TDH1
- E1000_82542_TDLEN
- E1000_82542_TDLEN1
- E1000_82542_TDT
- E1000_82542_TDT1
- E1000_82542_TIDV
- E1000_82542_TIPG
- E1000_82542_TNCRS
- E1000_82542_TORH
- E1000_82542_TORL
- E1000_82542_TOTH
- E1000_82542_TOTL
- E1000_82542_TPR
- E1000_82542_TPT
- E1000_82542_TSCTC
- E1000_82542_TSCTFC
- E1000_82542_TSPMT
- E1000_82542_TXCW
- E1000_82542_TXDCTL
- E1000_82542_TXDCTL1
- E1000_82542_TXDMAC
- E1000_82542_VET
- E1000_82542_VFTA
- E1000_82542_WUC
- E1000_82542_WUFC
- E1000_82542_WUPL
- E1000_82542_WUPM
- E1000_82542_WUS
- E1000_82542_XOFFRXC
- E1000_82542_XOFFTXC
- E1000_82542_XONRXC
- E1000_82542_XONTXC
- E1000_82547_PAD_LEN
- E1000_82574_SYSTIM_EPSILON
- E1000_82580_PHY_POWER_MGMT
- E1000_82580_PM_D0_LPLU
- E1000_82580_PM_D3_LPLU
- E1000_82580_PM_GO_LINKD
- E1000_82580_PM_SPD
- E1000_ADVTXD_DCMD_DEXT
- E1000_ADVTXD_DCMD_EOP
- E1000_ADVTXD_DCMD_IFCS
- E1000_ADVTXD_DCMD_RS
- E1000_ADVTXD_DCMD_TSE
- E1000_ADVTXD_DCMD_VLE
- E1000_ADVTXD_DTYP_CTXT
- E1000_ADVTXD_DTYP_DATA
- E1000_ADVTXD_L4LEN_SHIFT
- E1000_ADVTXD_MACLEN_SHIFT
- E1000_ADVTXD_MAC_TSTAMP
- E1000_ADVTXD_MSS_SHIFT
- E1000_ADVTXD_PAYLEN_SHIFT
- E1000_ADVTXD_TUCMD_IPV4
- E1000_ADVTXD_TUCMD_L4T_SCTP
- E1000_ADVTXD_TUCMD_L4T_TCP
- E1000_AIT
- E1000_ALGNERRC
- E1000_ALL_100_SPEED
- E1000_ALL_10_SPEED
- E1000_ALL_FULL_DUPLEX
- E1000_ALL_HALF_DUPLEX
- E1000_ALL_NOT_GIG
- E1000_ALL_SPEED_DUPLEX
- E1000_ALT_MAC_ADDRESS_OFFSET_LAN0
- E1000_ALT_MAC_ADDRESS_OFFSET_LAN1
- E1000_ALT_MAC_ADDRESS_OFFSET_LAN2
- E1000_ALT_MAC_ADDRESS_OFFSET_LAN3
- E1000_AUXSTMPH0
- E1000_AUXSTMPH1
- E1000_AUXSTMPL0
- E1000_AUXSTMPL1
- E1000_B2OGPRC
- E1000_B2OSPC
- E1000_BASE1000T_STATUS
- E1000_BLK_PHY_RESET
- E1000_BPRC
- E1000_BPTC
- E1000_BYTE_SWAP_WORD
- E1000_CABLE_LENGTH_UNDEFINED
- E1000_CBRMPC
- E1000_CBTMPC
- E1000_CCMCTL
- E1000_CEXTERR
- E1000_CHECK_RESET_COUNT
- E1000_COLC
- E1000_COLD_SHIFT
- E1000_COLLISION_DISTANCE
- E1000_COLLISION_DISTANCE_82542
- E1000_COLLISION_THRESHOLD
- E1000_CONNSW
- E1000_CONNSW_AUTOSENSE_CONF
- E1000_CONNSW_AUTOSENSE_EN
- E1000_CONNSW_ENRGSRC
- E1000_CONNSW_PHYSD
- E1000_CONNSW_PHY_PDN
- E1000_CONNSW_SERDESD
- E1000_CONTEXT_DESC
- E1000_CPUVEC
- E1000_CRCERRS
- E1000_CRC_OFFSET
- E1000_CRTL_EXT_PB_PAREN
- E1000_CTL_AUX
- E1000_CTL_AUX_ALL
- E1000_CTL_AUX_DES
- E1000_CTL_AUX_DES_PKT
- E1000_CTL_AUX_ENDIANESS_SHIFT
- E1000_CTL_AUX_END_SEL_SHIFT
- E1000_CTL_AUX_LWBE_BBE
- E1000_CTL_AUX_LWBE_BLE
- E1000_CTL_AUX_LWLE_BBE
- E1000_CTL_AUX_LWLE_BLE
- E1000_CTL_AUX_PKT
- E1000_CTL_AUX_RGMII
- E1000_CTL_AUX_RGMII_RMII_SHIFT
- E1000_CTL_AUX_RMII
- E1000_CTRL
- E1000_CTRL_ADVD3WUC
- E1000_CTRL_ASDE
- E1000_CTRL_BEM
- E1000_CTRL_BEM32
- E1000_CTRL_DEV_RST
- E1000_CTRL_DUP
- E1000_CTRL_D_UD_EN
- E1000_CTRL_D_UD_POLARITY
- E1000_CTRL_EN_PHY_PWR_MGMT
- E1000_CTRL_EXT
- E1000_CTRL_EXT_ASDCHK
- E1000_CTRL_EXT_DF_PAREN
- E1000_CTRL_EXT_DMA_DYN_CLK_EN
- E1000_CTRL_EXT_DRV_LOAD
- E1000_CTRL_EXT_EE_RST
- E1000_CTRL_EXT_EIAME
- E1000_CTRL_EXT_FORCE_SMBUS
- E1000_CTRL_EXT_GHOST_PAREN
- E1000_CTRL_EXT_GPI0_EN
- E1000_CTRL_EXT_GPI1_EN
- E1000_CTRL_EXT_GPI2_EN
- E1000_CTRL_EXT_GPI3_EN
- E1000_CTRL_EXT_IAME
- E1000_CTRL_EXT_INT_TIMER_CLR
- E1000_CTRL_EXT_IPS
- E1000_CTRL_EXT_IRCA
- E1000_CTRL_EXT_LINK_EN
- E1000_CTRL_EXT_LINK_MODE_1000BASE_KX
- E1000_CTRL_EXT_LINK_MODE_GMII
- E1000_CTRL_EXT_LINK_MODE_KMRN
- E1000_CTRL_EXT_LINK_MODE_MASK
- E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
- E1000_CTRL_EXT_LINK_MODE_SERDES
- E1000_CTRL_EXT_LINK_MODE_SGMII
- E1000_CTRL_EXT_LINK_MODE_TBI
- E1000_CTRL_EXT_LPCD
- E1000_CTRL_EXT_LSECCK
- E1000_CTRL_EXT_NVMVS
- E1000_CTRL_EXT_PBA_CLR
- E1000_CTRL_EXT_PFRSTD
- E1000_CTRL_EXT_PHYINT_EN
- E1000_CTRL_EXT_PHYPDEN
- E1000_CTRL_EXT_PHY_INT
- E1000_CTRL_EXT_RO_DIS
- E1000_CTRL_EXT_SDLPE
- E1000_CTRL_EXT_SDP2_DATA
- E1000_CTRL_EXT_SDP2_DIR
- E1000_CTRL_EXT_SDP3_DATA
- E1000_CTRL_EXT_SDP3_DIR
- E1000_CTRL_EXT_SDP4_DATA
- E1000_CTRL_EXT_SDP4_DIR
- E1000_CTRL_EXT_SDP5_DATA
- E1000_CTRL_EXT_SDP5_DIR
- E1000_CTRL_EXT_SDP6_DATA
- E1000_CTRL_EXT_SDP6_DIR
- E1000_CTRL_EXT_SDP7_DATA
- E1000_CTRL_EXT_SDP7_DIR
- E1000_CTRL_EXT_SPD_BYPS
- E1000_CTRL_EXT_WR_WMARK_256
- E1000_CTRL_EXT_WR_WMARK_320
- E1000_CTRL_EXT_WR_WMARK_384
- E1000_CTRL_EXT_WR_WMARK_448
- E1000_CTRL_EXT_WR_WMARK_MASK
- E1000_CTRL_FD
- E1000_CTRL_FORCE_PHY_RESET
- E1000_CTRL_FRCDPX
- E1000_CTRL_FRCSPD
- E1000_CTRL_GIO_MASTER_DISABLE
- E1000_CTRL_I2C_ENA
- E1000_CTRL_ILOS
- E1000_CTRL_LANPHYPC_OVERRIDE
- E1000_CTRL_LANPHYPC_VALUE
- E1000_CTRL_LRST
- E1000_CTRL_MDC
- E1000_CTRL_MDC_DIR
- E1000_CTRL_MDIO
- E1000_CTRL_MDIO_DIR
- E1000_CTRL_MEHE
- E1000_CTRL_PHY_RESET
- E1000_CTRL_PHY_RESET4
- E1000_CTRL_PHY_RESET_DIR
- E1000_CTRL_PHY_RESET_DIR4
- E1000_CTRL_PHY_RST
- E1000_CTRL_PRIOR
- E1000_CTRL_RFCE
- E1000_CTRL_RST
- E1000_CTRL_RTE
- E1000_CTRL_SDP0_DIR
- E1000_CTRL_SDP1_DIR
- E1000_CTRL_SLE
- E1000_CTRL_SLU
- E1000_CTRL_SPD_10
- E1000_CTRL_SPD_100
- E1000_CTRL_SPD_1000
- E1000_CTRL_SPD_SEL
- E1000_CTRL_SW2FW_INT
- E1000_CTRL_SWDPIN0
- E1000_CTRL_SWDPIN1
- E1000_CTRL_SWDPIN2
- E1000_CTRL_SWDPIN3
- E1000_CTRL_SWDPIO0
- E1000_CTRL_SWDPIO1
- E1000_CTRL_SWDPIO2
- E1000_CTRL_SWDPIO3
- E1000_CTRL_TFCE
- E1000_CTRL_TME
- E1000_CTRL_VME
- E1000_CT_SHIFT
- E1000_DAQF
- E1000_DAQF0
- E1000_DC
- E1000_DCA_CTRL
- E1000_DCA_CTRL_DCA_MODE_CB2
- E1000_DCA_CTRL_DCA_MODE_DISABLE
- E1000_DCA_RXCTRL
- E1000_DCA_RXCTRL_CPUID_MASK
- E1000_DCA_RXCTRL_CPUID_MASK_82576
- E1000_DCA_RXCTRL_CPUID_SHIFT
- E1000_DCA_RXCTRL_DATA_DCA_EN
- E1000_DCA_RXCTRL_DESC_DCA_EN
- E1000_DCA_RXCTRL_DESC_RRO_EN
- E1000_DCA_RXCTRL_HEAD_DCA_EN
- E1000_DCA_TXCTRL
- E1000_DCA_TXCTRL_CPUID_MASK
- E1000_DCA_TXCTRL_CPUID_MASK_82576
- E1000_DCA_TXCTRL_CPUID_SHIFT
- E1000_DCA_TXCTRL_DATA_RRO_EN
- E1000_DCA_TXCTRL_DESC_DCA_EN
- E1000_DCA_TXCTRL_DESC_RRO_EN
- E1000_DCA_TXCTRL_TX_WB_RO_EN
- E1000_DEFAULT_RXD
- E1000_DEFAULT_TXD
- E1000_DESC_UNUSED
- E1000_DEV_ID_80003ES2LAN_COPPER_DPT
- E1000_DEV_ID_80003ES2LAN_COPPER_SPT
- E1000_DEV_ID_80003ES2LAN_SERDES_DPT
- E1000_DEV_ID_80003ES2LAN_SERDES_SPT
- E1000_DEV_ID_82540EM
- E1000_DEV_ID_82540EM_LOM
- E1000_DEV_ID_82540EP
- E1000_DEV_ID_82540EP_LOM
- E1000_DEV_ID_82540EP_LP
- E1000_DEV_ID_82541EI
- E1000_DEV_ID_82541EI_MOBILE
- E1000_DEV_ID_82541ER
- E1000_DEV_ID_82541ER_LOM
- E1000_DEV_ID_82541GI
- E1000_DEV_ID_82541GI_LF
- E1000_DEV_ID_82541GI_MOBILE
- E1000_DEV_ID_82542
- E1000_DEV_ID_82543GC_COPPER
- E1000_DEV_ID_82543GC_FIBER
- E1000_DEV_ID_82544EI_COPPER
- E1000_DEV_ID_82544EI_FIBER
- E1000_DEV_ID_82544GC_COPPER
- E1000_DEV_ID_82544GC_LOM
- E1000_DEV_ID_82545EM_COPPER
- E1000_DEV_ID_82545EM_FIBER
- E1000_DEV_ID_82545GM_COPPER
- E1000_DEV_ID_82545GM_FIBER
- E1000_DEV_ID_82545GM_SERDES
- E1000_DEV_ID_82546EB_COPPER
- E1000_DEV_ID_82546EB_FIBER
- E1000_DEV_ID_82546EB_QUAD_COPPER
- E1000_DEV_ID_82546GB_COPPER
- E1000_DEV_ID_82546GB_FIBER
- E1000_DEV_ID_82546GB_PCIE
- E1000_DEV_ID_82546GB_QUAD_COPPER
- E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3
- E1000_DEV_ID_82546GB_SERDES
- E1000_DEV_ID_82547EI
- E1000_DEV_ID_82547EI_MOBILE
- E1000_DEV_ID_82547GI
- E1000_DEV_ID_82571EB_COPPER
- E1000_DEV_ID_82571EB_FIBER
- E1000_DEV_ID_82571EB_QUAD_COPPER
- E1000_DEV_ID_82571EB_QUAD_COPPER_LP
- E1000_DEV_ID_82571EB_QUAD_FIBER
- E1000_DEV_ID_82571EB_SERDES
- E1000_DEV_ID_82571EB_SERDES_DUAL
- E1000_DEV_ID_82571EB_SERDES_QUAD
- E1000_DEV_ID_82571PT_QUAD_COPPER
- E1000_DEV_ID_82572EI
- E1000_DEV_ID_82572EI_COPPER
- E1000_DEV_ID_82572EI_FIBER
- E1000_DEV_ID_82572EI_SERDES
- E1000_DEV_ID_82573E
- E1000_DEV_ID_82573E_IAMT
- E1000_DEV_ID_82573L
- E1000_DEV_ID_82574L
- E1000_DEV_ID_82574LA
- E1000_DEV_ID_82575EB_COPPER
- E1000_DEV_ID_82575EB_FIBER_SERDES
- E1000_DEV_ID_82575GB_QUAD_COPPER
- E1000_DEV_ID_82576
- E1000_DEV_ID_82576_FIBER
- E1000_DEV_ID_82576_NS
- E1000_DEV_ID_82576_NS_SERDES
- E1000_DEV_ID_82576_QUAD_COPPER
- E1000_DEV_ID_82576_QUAD_COPPER_ET2
- E1000_DEV_ID_82576_SERDES
- E1000_DEV_ID_82576_SERDES_QUAD
- E1000_DEV_ID_82576_VF
- E1000_DEV_ID_82580_COPPER
- E1000_DEV_ID_82580_COPPER_DUAL
- E1000_DEV_ID_82580_FIBER
- E1000_DEV_ID_82580_QUAD_FIBER
- E1000_DEV_ID_82580_SERDES
- E1000_DEV_ID_82580_SGMII
- E1000_DEV_ID_82583V
- E1000_DEV_ID_DH89XXCC_BACKPLANE
- E1000_DEV_ID_DH89XXCC_SERDES
- E1000_DEV_ID_DH89XXCC_SFP
- E1000_DEV_ID_DH89XXCC_SGMII
- E1000_DEV_ID_I210_COPPER
- E1000_DEV_ID_I210_COPPER_FLASHLESS
- E1000_DEV_ID_I210_FIBER
- E1000_DEV_ID_I210_SERDES
- E1000_DEV_ID_I210_SERDES_FLASHLESS
- E1000_DEV_ID_I210_SGMII
- E1000_DEV_ID_I211_COPPER
- E1000_DEV_ID_I350_COPPER
- E1000_DEV_ID_I350_FIBER
- E1000_DEV_ID_I350_SERDES
- E1000_DEV_ID_I350_SGMII
- E1000_DEV_ID_I350_VF
- E1000_DEV_ID_I354_BACKPLANE_1GBPS
- E1000_DEV_ID_I354_BACKPLANE_2_5GBPS
- E1000_DEV_ID_I354_SGMII
- E1000_DEV_ID_ICH10_D_BM_LF
- E1000_DEV_ID_ICH10_D_BM_LM
- E1000_DEV_ID_ICH10_D_BM_V
- E1000_DEV_ID_ICH10_R_BM_LF
- E1000_DEV_ID_ICH10_R_BM_LM
- E1000_DEV_ID_ICH10_R_BM_V
- E1000_DEV_ID_ICH8_82567V_3
- E1000_DEV_ID_ICH8_IFE
- E1000_DEV_ID_ICH8_IFE_G
- E1000_DEV_ID_ICH8_IFE_GT
- E1000_DEV_ID_ICH8_IGP_AMT
- E1000_DEV_ID_ICH8_IGP_C
- E1000_DEV_ID_ICH8_IGP_M
- E1000_DEV_ID_ICH8_IGP_M_AMT
- E1000_DEV_ID_ICH9_BM
- E1000_DEV_ID_ICH9_IFE
- E1000_DEV_ID_ICH9_IFE_G
- E1000_DEV_ID_ICH9_IFE_GT
- E1000_DEV_ID_ICH9_IGP_AMT
- E1000_DEV_ID_ICH9_IGP_C
- E1000_DEV_ID_ICH9_IGP_M
- E1000_DEV_ID_ICH9_IGP_M_AMT
- E1000_DEV_ID_ICH9_IGP_M_V
- E1000_DEV_ID_INTEL_CE4100_GBE
- E1000_DEV_ID_PCH2_LV_LM
- E1000_DEV_ID_PCH2_LV_V
- E1000_DEV_ID_PCH_CNP_I219_LM6
- E1000_DEV_ID_PCH_CNP_I219_LM7
- E1000_DEV_ID_PCH_CNP_I219_V6
- E1000_DEV_ID_PCH_CNP_I219_V7
- E1000_DEV_ID_PCH_D_HV_DC
- E1000_DEV_ID_PCH_D_HV_DM
- E1000_DEV_ID_PCH_I218_LM2
- E1000_DEV_ID_PCH_I218_LM3
- E1000_DEV_ID_PCH_I218_V2
- E1000_DEV_ID_PCH_I218_V3
- E1000_DEV_ID_PCH_ICP_I219_LM8
- E1000_DEV_ID_PCH_ICP_I219_LM9
- E1000_DEV_ID_PCH_ICP_I219_V8
- E1000_DEV_ID_PCH_ICP_I219_V9
- E1000_DEV_ID_PCH_LBG_I219_LM3
- E1000_DEV_ID_PCH_LPTLP_I218_LM
- E1000_DEV_ID_PCH_LPTLP_I218_V
- E1000_DEV_ID_PCH_LPT_I217_LM
- E1000_DEV_ID_PCH_LPT_I217_V
- E1000_DEV_ID_PCH_M_HV_LC
- E1000_DEV_ID_PCH_M_HV_LM
- E1000_DEV_ID_PCH_SPT_I219_LM
- E1000_DEV_ID_PCH_SPT_I219_LM2
- E1000_DEV_ID_PCH_SPT_I219_LM4
- E1000_DEV_ID_PCH_SPT_I219_LM5
- E1000_DEV_ID_PCH_SPT_I219_V
- E1000_DEV_ID_PCH_SPT_I219_V2
- E1000_DEV_ID_PCH_SPT_I219_V4
- E1000_DEV_ID_PCH_SPT_I219_V5
- E1000_DISABLE_SERDES_LOOPBACK
- E1000_DMACR
- E1000_DMACR_DC_BMC2OSW_EN
- E1000_DMACR_DMACTHR_MASK
- E1000_DMACR_DMACTHR_SHIFT
- E1000_DMACR_DMACWT_MASK
- E1000_DMACR_DMAC_EN
- E1000_DMACR_DMAC_LX_MASK
- E1000_DMACR_DMAC_LX_SHIFT
- E1000_DMCCNT
- E1000_DMCCNT_CCOUNT_MASK
- E1000_DMCRTRH
- E1000_DMCRTRH_LRPRCW
- E1000_DMCRTRH_UTRESH_MASK
- E1000_DMCTLX
- E1000_DMCTLX_TTLX_MASK
- E1000_DMCTXTH
- E1000_DMCTXTH_DMCTTHR_MASK
- E1000_DTXCTL
- E1000_DTXCTL_8023LL
- E1000_DTXCTL_MDP_EN
- E1000_DTXCTL_OOS_ENABLE
- E1000_DTXCTL_SPOOF_INT
- E1000_DTXCTL_VLAN_ADDED
- E1000_DTXSWC
- E1000_DTXSWC_LLE_MASK
- E1000_DTXSWC_MAC_SPOOF_MASK
- E1000_DTXSWC_VLAN_SPOOF_MASK
- E1000_DTXSWC_VLAN_SPOOF_SHIFT
- E1000_DTXSWC_VMDQ_LOOPBACK_EN
- E1000_DVMOLR
- E1000_DVMOLR_HIDEVLAN
- E1000_DVMOLR_STRCRC
- E1000_DVMOLR_STRVLAN
- E1000_ECOL
- E1000_EEARBC
- E1000_EEARBC_I210
- E1000_EECD
- E1000_EECD_ADDR_BITS
- E1000_EECD_AUPDEN
- E1000_EECD_AUTO_RD
- E1000_EECD_CS
- E1000_EECD_DI
- E1000_EECD_DO
- E1000_EECD_FLASH_DETECTED_I210
- E1000_EECD_FLUDONE_I210
- E1000_EECD_FLUPD
- E1000_EECD_FLUPD_I210
- E1000_EECD_FWE_DIS
- E1000_EECD_FWE_EN
- E1000_EECD_FWE_MASK
- E1000_EECD_FWE_SHIFT
- E1000_EECD_GNT
- E1000_EECD_INITSRAM
- E1000_EECD_NVADDS
- E1000_EECD_PRES
- E1000_EECD_REQ
- E1000_EECD_SEC1VAL
- E1000_EECD_SEC1VAL_VALID_MASK
- E1000_EECD_SECVAL_SHIFT
- E1000_EECD_SELSHAD
- E1000_EECD_SHADV
- E1000_EECD_SIZE
- E1000_EECD_SIZE_EX_MASK
- E1000_EECD_SIZE_EX_SHIFT
- E1000_EECD_SK
- E1000_EECD_TYPE
- E1000_EEER
- E1000_EEER_EEE_NEG
- E1000_EEER_FRC_AN
- E1000_EEER_LPI_FC
- E1000_EEER_RX_LPI_EN
- E1000_EEER_TX_LPI_EN
- E1000_EEE_ADV_1000_SUPPORTED
- E1000_EEE_ADV_100_SUPPORTED
- E1000_EEE_ADV_ADDR_I354
- E1000_EEE_ADV_DEV_I354
- E1000_EEE_LP_ADV_ADDR_I210
- E1000_EEE_LP_ADV_ADDR_I350
- E1000_EEE_LP_ADV_DEV_I210
- E1000_EEE_RX_LPI_RCVD
- E1000_EEE_SU
- E1000_EEE_SU_LPI_CLK_STP
- E1000_EEE_TX_LPI_RCVD
- E1000_EEMNGCTL
- E1000_EEMNGCTL_I210
- E1000_EEPROM_82544_APM
- E1000_EEPROM_APME
- E1000_EEPROM_CFG_DONE
- E1000_EEPROM_CFG_DONE_PORT_1
- E1000_EEPROM_FLASH_SIZE_WORD
- E1000_EEPROM_GRANT_ATTEMPTS
- E1000_EEPROM_LED_LOGIC
- E1000_EEPROM_PCS_AUTONEG_DISABLE_BIT
- E1000_EEPROM_POLL_READ
- E1000_EEPROM_POLL_WRITE
- E1000_EEPROM_RW_ADDR_SHIFT
- E1000_EEPROM_RW_REG_DATA
- E1000_EEPROM_RW_REG_DONE
- E1000_EEPROM_RW_REG_START
- E1000_EEPROM_SWDPIN0
- E1000_EERD
- E1000_EERD_ADDR_MASK
- E1000_EERD_ADDR_SHIFT
- E1000_EERD_DATA_MASK
- E1000_EERD_DATA_SHIFT
- E1000_EERD_DONE
- E1000_EERD_EEWR_MAX_COUNT
- E1000_EERD_START
- E1000_EEWR
- E1000_EIAC
- E1000_EIAC_82574
- E1000_EIAC_MASK_82574
- E1000_EIAM
- E1000_EICR
- E1000_EICR_OTHER
- E1000_EICR_RX_QUEUE
- E1000_EICR_RX_QUEUE0
- E1000_EICR_RX_QUEUE1
- E1000_EICR_RX_QUEUE2
- E1000_EICR_RX_QUEUE3
- E1000_EICR_TX_QUEUE
- E1000_EICR_TX_QUEUE0
- E1000_EICR_TX_QUEUE1
- E1000_EICR_TX_QUEUE2
- E1000_EICR_TX_QUEUE3
- E1000_EICS
- E1000_EIMC
- E1000_EIMS
- E1000_EIMS_OTHER
- E1000_EITR
- E1000_EITR_82574
- E1000_EITR_CNT_IGNR
- E1000_EMC_DIODE1_DATA
- E1000_EMC_DIODE1_THERM_LIMIT
- E1000_EMC_DIODE2_DATA
- E1000_EMC_DIODE2_THERM_LIMIT
- E1000_EMC_DIODE3_DATA
- E1000_EMC_DIODE3_THERM_LIMIT
- E1000_EMC_INTERNAL_DATA
- E1000_EMC_INTERNAL_THERM_LIMIT
- E1000_EMIADD
- E1000_EMIDATA
- E1000_ENABLE_SERDES_LOOPBACK
- E1000_ERR_CONFIG
- E1000_ERR_EEPROM
- E1000_ERR_HOST_INTERFACE_COMMAND
- E1000_ERR_I2C
- E1000_ERR_INVALID_ARGUMENT
- E1000_ERR_INVM_VALUE_NOT_FOUND
- E1000_ERR_MAC_INIT
- E1000_ERR_MAC_TYPE
- E1000_ERR_MASTER_REQUESTS_PENDING
- E1000_ERR_MBX
- E1000_ERR_NO_SPACE
- E1000_ERR_NVM
- E1000_ERR_NVM_PBA_SECTION
- E1000_ERR_PARAM
- E1000_ERR_PHY
- E1000_ERR_PHY_TYPE
- E1000_ERR_RESET
- E1000_ERR_SWFW_SYNC
- E1000_ERT
- E1000_ETQF
- E1000_ETQF_1588
- E1000_ETQF_ETYPE_MASK
- E1000_ETQF_FILTER_ENABLE
- E1000_ETQF_IMM_INT
- E1000_ETQF_QUEUE_ENABLE
- E1000_ETQF_QUEUE_MASK
- E1000_ETQF_QUEUE_SHIFT
- E1000_EXTCNF_CTRL
- E1000_EXTCNF_CTRL_D_UD_ENABLE
- E1000_EXTCNF_CTRL_D_UD_LATENCY
- E1000_EXTCNF_CTRL_D_UD_OWNER
- E1000_EXTCNF_CTRL_EXT_CNF_POINTER
- E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK
- E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT
- E1000_EXTCNF_CTRL_GATE_PHY_CFG
- E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE
- E1000_EXTCNF_CTRL_MDIO_HW_OWNERSHIP
- E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP
- E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE
- E1000_EXTCNF_CTRL_PCIE_WRITE_ENABLE
- E1000_EXTCNF_CTRL_PHY_WRITE_ENABLE
- E1000_EXTCNF_CTRL_SWFLAG
- E1000_EXTCNF_SIZE
- E1000_EXTCNF_SIZE_EXT_DOCK_LENGTH
- E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH
- E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK
- E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT
- E1000_EXTCNF_SIZE_EXT_PHY_LENGTH
- E1000_FACTPS
- E1000_FACTPS_FUNC0_AUX_EN
- E1000_FACTPS_FUNC0_POWER_STATE_MASK
- E1000_FACTPS_FUNC1_AUX_EN
- E1000_FACTPS_FUNC1_POWER_STATE_MASK
- E1000_FACTPS_FUNC1_POWER_STATE_SHIFT
- E1000_FACTPS_FUNC2_AUX_EN
- E1000_FACTPS_FUNC2_POWER_STATE_MASK
- E1000_FACTPS_FUNC2_POWER_STATE_SHIFT
- E1000_FACTPS_FUNC3_AUX_EN
- E1000_FACTPS_FUNC3_POWER_STATE_MASK
- E1000_FACTPS_FUNC3_POWER_STATE_SHIFT
- E1000_FACTPS_FUNC4_AUX_EN
- E1000_FACTPS_FUNC4_POWER_STATE_MASK
- E1000_FACTPS_FUNC4_POWER_STATE_SHIFT
- E1000_FACTPS_IDE_ENABLE
- E1000_FACTPS_IPMI_ENABLE
- E1000_FACTPS_LAN0_VALID
- E1000_FACTPS_LAN1_VALID
- E1000_FACTPS_LAN_FUNC_SEL
- E1000_FACTPS_MNGCG
- E1000_FACTPS_PM_STATE_CHANGED
- E1000_FACTPS_SP_ENABLE
- E1000_FCAH
- E1000_FCAL
- E1000_FCRTC
- E1000_FCRTC_RTH_COAL_MASK
- E1000_FCRTC_RTH_COAL_SHIFT
- E1000_FCRTH
- E1000_FCRTH_RTH
- E1000_FCRTH_XFCE
- E1000_FCRTL
- E1000_FCRTL_RTL
- E1000_FCRTL_XONE
- E1000_FCRTV
- E1000_FCRTV_PCH
- E1000_FCRUC
- E1000_FCT
- E1000_FCTTV
- E1000_FC_DEFAULT
- E1000_FC_FULL
- E1000_FC_HIGH_DIFF
- E1000_FC_LOW_DIFF
- E1000_FC_NONE
- E1000_FC_PAUSE_TIME
- E1000_FC_RX_PAUSE
- E1000_FC_TX_PAUSE
- E1000_FDX_COLLISION_DISTANCE
- E1000_FEXT
- E1000_FEXTNVM
- E1000_FEXTNVM11
- E1000_FEXTNVM11_DISABLE_MULR_FIX
- E1000_FEXTNVM11_DISABLE_PB_READ
- E1000_FEXTNVM3
- E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC
- E1000_FEXTNVM3_PHY_CFG_COUNTER_MASK
- E1000_FEXTNVM4
- E1000_FEXTNVM4_BEACON_DURATION_16USEC
- E1000_FEXTNVM4_BEACON_DURATION_8USEC
- E1000_FEXTNVM4_BEACON_DURATION_MASK
- E1000_FEXTNVM6
- E1000_FEXTNVM6_ENABLE_K1_ENTRY_CONDITION
- E1000_FEXTNVM6_K1_OFF_ENABLE
- E1000_FEXTNVM6_REQ_PLL_CLK
- E1000_FEXTNVM7
- E1000_FEXTNVM7_DISABLE_PB_READ
- E1000_FEXTNVM7_DISABLE_SMB_PERST
- E1000_FEXTNVM7_SIDE_CLK_UNGATE
- E1000_FEXTNVM9
- E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS
- E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS
- E1000_FEXTNVM_SW_CONFIG
- E1000_FEXTNVM_SW_CONFIG_ICH8M
- E1000_FEXT_PHY_CABLE_DISCONNECTED
- E1000_FFLT
- E1000_FFLT_DBG
- E1000_FFLT_DBG_INVC
- E1000_FFLT_REG
- E1000_FFLT_SIZE
- E1000_FFMT
- E1000_FFMT_REG
- E1000_FFMT_SIZE
- E1000_FFVT
- E1000_FFVT_REG
- E1000_FFVT_SIZE
- E1000_FIFO_HDR
- E1000_FLA
- E1000_FLASHT
- E1000_FLASH_BASE_ADDR
- E1000_FLASH_UPDATES
- E1000_FLEXIBLE_FILTER_COUNT_MAX
- E1000_FLEXIBLE_FILTER_SIZE_MAX
- E1000_FLOP
- E1000_FLSWCNT
- E1000_FLSWCTL
- E1000_FLSWDATA
- E1000_FLUDONE_ATTEMPTS
- E1000_FREQOUT0
- E1000_FREQOUT1
- E1000_FRTIMER
- E1000_FTQF
- E1000_FTQF0
- E1000_FTQF_1588_TIME_STAMP
- E1000_FTQF_MASK
- E1000_FTQF_MASK_PROTO_BP
- E1000_FTQF_MASK_SOURCE_PORT_BP
- E1000_FTQF_VF_BP
- E1000_FUNC_0
- E1000_FUNC_1
- E1000_FUNC_2
- E1000_FUNC_3
- E1000_FWSM
- E1000_FWSM_DISSW
- E1000_FWSM_FW_VALID
- E1000_FWSM_MODE_MASK
- E1000_FWSM_MODE_SHIFT
- E1000_FWSM_RSPCIPHY
- E1000_FWSM_SKUEL_SHIFT
- E1000_FWSM_SKUSEL_CONS
- E1000_FWSM_SKUSEL_EMB
- E1000_FWSM_SKUSEL_MASK
- E1000_FWSM_SKUSEL_PERF_100
- E1000_FWSM_SKUSEL_PERF_GBE
- E1000_FWSM_ULP_CFG_DONE
- E1000_FWSM_WLOCK_MAC_MASK
- E1000_FWSM_WLOCK_MAC_SHIFT
- E1000_FWSTS_FWS_MASK
- E1000_GCR
- E1000_GCR2
- E1000_GCR_CAP_VER2
- E1000_GCR_CMPL_TMOUT_10ms
- E1000_GCR_CMPL_TMOUT_MASK
- E1000_GCR_CMPL_TMOUT_RESEND
- E1000_GCR_L1_ACT_WITHOUT_L0S_RX
- E1000_GCR_RXDSCR_NO_SNOOP
- E1000_GCR_RXDSCW_NO_SNOOP
- E1000_GCR_RXD_NO_SNOOP
- E1000_GCR_TXDSCR_NO_SNOOP
- E1000_GCR_TXDSCW_NO_SNOOP
- E1000_GCR_TXD_NO_SNOOP
- E1000_GEN_CTL_ADDRESS_SHIFT
- E1000_GEN_CTL_READY
- E1000_GEN_POLL_TIMEOUT
- E1000_GET_DESC
- E1000_GIOCTL
- E1000_GLOBAL_STATS_LEN
- E1000_GORCH
- E1000_GORCL
- E1000_GOTCH
- E1000_GOTCL
- E1000_GPIE
- E1000_GPIE_EIAME
- E1000_GPIE_MSIX_MODE
- E1000_GPIE_NSICR
- E1000_GPIE_PBA
- E1000_GPRC
- E1000_GPTC
- E1000_GSCL_1
- E1000_GSCL_2
- E1000_GSCL_3
- E1000_GSCL_4
- E1000_H2ME
- E1000_H2ME_ENFORCE_SETTINGS
- E1000_H2ME_ULP
- E1000_HDX_COLLISION_DISTANCE
- E1000_HEADROOM
- E1000_HGORCH
- E1000_HGORCL
- E1000_HGOTCH
- E1000_HGOTCL
- E1000_HGPTC
- E1000_HICR
- E1000_HICR_C
- E1000_HICR_EN
- E1000_HICR_FWR
- E1000_HICR_FW_RESET
- E1000_HICR_FW_RESET_ENABLE
- E1000_HICR_SV
- E1000_HI_COMMAND_TIMEOUT
- E1000_HI_MAX_BLOCK_BYTE_LENGTH
- E1000_HI_MAX_BLOCK_DWORD_LENGTH
- E1000_HI_MAX_DATA_LENGTH
- E1000_HI_MAX_MNG_DATA_LENGTH
- E1000_HOST_IF
- E1000_HOST_IF_MAX_SIZE
- E1000_HSMC0R_CLKIN
- E1000_HSMC0R_CLKOUT
- E1000_HSMC0R_DATAIN
- E1000_HSMC0R_DATAOUT
- E1000_HSMC1R_CLKIN
- E1000_HSMC1R_CLKOUT
- E1000_HSMC1R_DATAIN
- E1000_HSMC1R_DATAOUT
- E1000_HTCBDPC
- E1000_HTDPMC
- E1000_I210_DTXMXPKTSZ
- E1000_I210_FIFO_SEL_BMC2OS_RX
- E1000_I210_FIFO_SEL_BMC2OS_TX
- E1000_I210_FIFO_SEL_RX
- E1000_I210_FIFO_SEL_TX_LEGACY
- E1000_I210_FIFO_SEL_TX_QAV
- E1000_I210_FLA
- E1000_I210_FLASH_SECTOR_SIZE
- E1000_I210_FLMNGCNT
- E1000_I210_FLMNGCTL
- E1000_I210_FLMNGDATA
- E1000_I210_FLSWCNT
- E1000_I210_FLSWCTL
- E1000_I210_FLSWDATA
- E1000_I210_FW_PTR_MASK
- E1000_I210_FW_VER_OFFSET
- E1000_I210_RR2DCDELAY
- E1000_I210_TQAVCC
- E1000_I210_TQAVCTRL
- E1000_I210_TQAVHC
- E1000_I210_TXDCTL
- E1000_I2CBB_EN
- E1000_I2CCMD
- E1000_I2CCMD_ERROR
- E1000_I2CCMD_OPCODE_READ
- E1000_I2CCMD_OPCODE_WRITE
- E1000_I2CCMD_PHY_ADDR_SHIFT
- E1000_I2CCMD_PHY_TIMEOUT
- E1000_I2CCMD_READY
- E1000_I2CCMD_REG_ADDR_SHIFT
- E1000_I2CCMD_SFP_DATA_ADDR
- E1000_I2CCMD_SFP_DIAG_ADDR
- E1000_I2CPARAMS
- E1000_I2C_CLK_IN
- E1000_I2C_CLK_OE_N
- E1000_I2C_CLK_OUT
- E1000_I2C_DATA_IN
- E1000_I2C_DATA_OE_N
- E1000_I2C_DATA_OUT
- E1000_I2C_THERMAL_SENSOR_ADDR
- E1000_IAC
- E1000_IAM
- E1000_IAMT_SIGNATURE
- E1000_ICH8_LAN_INIT_TIMEOUT
- E1000_ICH8_SHADOW_RAM_WORDS
- E1000_ICH_FWSM_FW_VALID
- E1000_ICH_FWSM_PCIM2PCI
- E1000_ICH_FWSM_PCIM2PCI_COUNT
- E1000_ICH_FWSM_RSPCIPHY
- E1000_ICH_MNG_IAMT_MODE
- E1000_ICH_NVM_SIG_MASK
- E1000_ICH_NVM_SIG_VALUE
- E1000_ICH_NVM_SIG_WORD
- E1000_ICH_NVM_VALID_SIG_MASK
- E1000_ICH_RAR_ENTRIES
- E1000_ICR
- E1000_ICRXATC
- E1000_ICRXDMTC
- E1000_ICRXOC
- E1000_ICRXPTC
- E1000_ICR_ACK
- E1000_ICR_ALL_PARITY
- E1000_ICR_DOCK
- E1000_ICR_DOUTSYNC
- E1000_ICR_DRSTA
- E1000_ICR_DSW
- E1000_ICR_ECCER
- E1000_ICR_EPRST
- E1000_ICR_GPI_EN0
- E1000_ICR_GPI_EN1
- E1000_ICR_GPI_EN2
- E1000_ICR_GPI_EN3
- E1000_ICR_HOST_ARB_PAR
- E1000_ICR_INT_ASSERTED
- E1000_ICR_LSC
- E1000_ICR_MDAC
- E1000_ICR_MNG
- E1000_ICR_OTHER
- E1000_ICR_PB_PAR
- E1000_ICR_PHYINT
- E1000_ICR_RXCFG
- E1000_ICR_RXDMT0
- E1000_ICR_RXD_FIFO_PAR0
- E1000_ICR_RXD_FIFO_PAR1
- E1000_ICR_RXO
- E1000_ICR_RXQ0
- E1000_ICR_RXQ1
- E1000_ICR_RXSEQ
- E1000_ICR_RXT0
- E1000_ICR_SRPD
- E1000_ICR_TS
- E1000_ICR_TXDW
- E1000_ICR_TXD_FIFO_PAR0
- E1000_ICR_TXD_FIFO_PAR1
- E1000_ICR_TXD_LOW
- E1000_ICR_TXQ0
- E1000_ICR_TXQ1
- E1000_ICR_TXQE
- E1000_ICR_VMMB
- E1000_ICS
- E1000_ICS_ACK
- E1000_ICS_DOCK
- E1000_ICS_DRSTA
- E1000_ICS_DSW
- E1000_ICS_EPRST
- E1000_ICS_GPI_EN0
- E1000_ICS_GPI_EN1
- E1000_ICS_GPI_EN2
- E1000_ICS_GPI_EN3
- E1000_ICS_HOST_ARB_PAR
- E1000_ICS_LSC
- E1000_ICS_MDAC
- E1000_ICS_MNG
- E1000_ICS_OTHER
- E1000_ICS_PB_PAR
- E1000_ICS_PHYINT
- E1000_ICS_RXCFG
- E1000_ICS_RXDMT0
- E1000_ICS_RXD_FIFO_PAR0
- E1000_ICS_RXD_FIFO_PAR1
- E1000_ICS_RXO
- E1000_ICS_RXSEQ
- E1000_ICS_RXT0
- E1000_ICS_SRPD
- E1000_ICS_TXDW
- E1000_ICS_TXD_FIFO_PAR0
- E1000_ICS_TXD_FIFO_PAR1
- E1000_ICS_TXD_LOW
- E1000_ICS_TXQE
- E1000_ICTXATC
- E1000_ICTXPTC
- E1000_ICTXQEC
- E1000_ICTXQMTC
- E1000_IDLE_ERROR_COUNT_MASK
- E1000_IMC
- E1000_IMC_ACK
- E1000_IMC_DOCK
- E1000_IMC_DSW
- E1000_IMC_EPRST
- E1000_IMC_GPI_EN0
- E1000_IMC_GPI_EN1
- E1000_IMC_GPI_EN2
- E1000_IMC_GPI_EN3
- E1000_IMC_HOST_ARB_PAR
- E1000_IMC_LSC
- E1000_IMC_MDAC
- E1000_IMC_MNG
- E1000_IMC_PB_PAR
- E1000_IMC_PHYINT
- E1000_IMC_RXCFG
- E1000_IMC_RXDMT0
- E1000_IMC_RXD_FIFO_PAR0
- E1000_IMC_RXD_FIFO_PAR1
- E1000_IMC_RXO
- E1000_IMC_RXSEQ
- E1000_IMC_RXT0
- E1000_IMC_SRPD
- E1000_IMC_TXDW
- E1000_IMC_TXD_FIFO_PAR0
- E1000_IMC_TXD_FIFO_PAR1
- E1000_IMC_TXD_LOW
- E1000_IMC_TXQE
- E1000_IMIR
- E1000_IMIREXT
- E1000_IMIREXT_CTRL_BP
- E1000_IMIREXT_SIZE_BP
- E1000_IMIRVP
- E1000_IMS
- E1000_IMS_ACK
- E1000_IMS_DOCK
- E1000_IMS_DOUTSYNC
- E1000_IMS_DRSTA
- E1000_IMS_DSW
- E1000_IMS_ECCER
- E1000_IMS_EPRST
- E1000_IMS_GPI_EN0
- E1000_IMS_GPI_EN1
- E1000_IMS_GPI_EN2
- E1000_IMS_GPI_EN3
- E1000_IMS_HOST_ARB_PAR
- E1000_IMS_LSC
- E1000_IMS_MDAC
- E1000_IMS_MNG
- E1000_IMS_OTHER
- E1000_IMS_PB_PAR
- E1000_IMS_PHYINT
- E1000_IMS_RXCFG
- E1000_IMS_RXDMT0
- E1000_IMS_RXD_FIFO_PAR0
- E1000_IMS_RXD_FIFO_PAR1
- E1000_IMS_RXO
- E1000_IMS_RXQ0
- E1000_IMS_RXQ1
- E1000_IMS_RXSEQ
- E1000_IMS_RXT0
- E1000_IMS_SRPD
- E1000_IMS_TS
- E1000_IMS_TXDW
- E1000_IMS_TXD_FIFO_PAR0
- E1000_IMS_TXD_FIFO_PAR1
- E1000_IMS_TXD_LOW
- E1000_IMS_TXQ0
- E1000_IMS_TXQ1
- E1000_IMS_TXQE
- E1000_IMS_VMMB
- E1000_INVM_AUTOLOAD
- E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS
- E1000_INVM_CSR_AUTOLOAD_STRUCTURE
- E1000_INVM_DATA_REG
- E1000_INVM_DEFAULT_AL
- E1000_INVM_IMGTYPE_FIELD
- E1000_INVM_INVALIDATED_STRUCTURE
- E1000_INVM_MAJOR_MASK
- E1000_INVM_MAJOR_SHIFT
- E1000_INVM_MINOR_MASK
- E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE
- E1000_INVM_PLL_WO_VAL
- E1000_INVM_RECORD_SIZE_IN_BYTES
- E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS
- E1000_INVM_RSA_KEY_SHA256_STRUCTURE
- E1000_INVM_SIZE
- E1000_INVM_STRUCTURE_TYPE
- E1000_INVM_ULT_BYTES_SIZE
- E1000_INVM_UNINITIALIZED_STRUCTURE
- E1000_INVM_VER_FIELD_ONE
- E1000_INVM_VER_FIELD_TWO
- E1000_INVM_WORD_AUTOLOAD_STRUCTURE
- E1000_IOSFPC
- E1000_IOVCTL
- E1000_IOVCTL_REUSE_VFQ
- E1000_IOVTCL
- E1000_IP4AT
- E1000_IP4AT_REG
- E1000_IP4AT_SIZE
- E1000_IP6AT
- E1000_IP6AT_REG
- E1000_IP6AT_SIZE
- E1000_IPAV
- E1000_IPCNFG
- E1000_IPCNFG_EEE_100M_AN
- E1000_IPCNFG_EEE_1G_AN
- E1000_ITR
- E1000_IVAR
- E1000_IVAR0
- E1000_IVAR_INT_ALLOC_VALID
- E1000_IVAR_MISC
- E1000_IVAR_VALID
- E1000_KABGTXD
- E1000_KABGTXD_BGSQLBIAS
- E1000_KMRNCTRLSTA
- E1000_KMRNCTRLSTA_CTRL_OFFSET
- E1000_KMRNCTRLSTA_DIAG_NELPBK
- E1000_KMRNCTRLSTA_DIAG_OFFSET
- E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS
- E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS
- E1000_KMRNCTRLSTA_HD_CTRL
- E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT
- E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT
- E1000_KMRNCTRLSTA_IBIST_DISABLE
- E1000_KMRNCTRLSTA_INBAND_PARAM
- E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING
- E1000_KMRNCTRLSTA_K1_CONFIG
- E1000_KMRNCTRLSTA_K1_ENABLE
- E1000_KMRNCTRLSTA_OFFSET
- E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL
- E1000_KMRNCTRLSTA_OFFSET_HD_CTRL
- E1000_KMRNCTRLSTA_OFFSET_INB_CTRL
- E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE
- E1000_KMRNCTRLSTA_OFFSET_SHIFT
- E1000_KMRNCTRLSTA_OPMODE_E_IDLE
- E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO
- E1000_KMRNCTRLSTA_OPMODE_MASK
- E1000_KMRNCTRLSTA_REN
- E1000_KMRNCTRLSTA_TIMEOUTS
- E1000_KUMCTRLSTA
- E1000_KUMCTRLSTA_DIAG_FELPBK
- E1000_KUMCTRLSTA_DIAG_NELPBK
- E1000_KUMCTRLSTA_FIFO_CTRL_RX_BYPASS
- E1000_KUMCTRLSTA_FIFO_CTRL_TX_BYPASS
- E1000_KUMCTRLSTA_HD_CTRL_1000_DEFAULT
- E1000_KUMCTRLSTA_HD_CTRL_10_100_DEFAULT
- E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING
- E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT
- E1000_KUMCTRLSTA_K0S_100_EN
- E1000_KUMCTRLSTA_K0S_ENTRY_LATENCY_MASK
- E1000_KUMCTRLSTA_K0S_GBE_EN
- E1000_KUMCTRLSTA_MASK
- E1000_KUMCTRLSTA_OFFSET
- E1000_KUMCTRLSTA_OFFSET_CTRL
- E1000_KUMCTRLSTA_OFFSET_DIAG
- E1000_KUMCTRLSTA_OFFSET_FIFO_CTRL
- E1000_KUMCTRLSTA_OFFSET_HD_CTRL
- E1000_KUMCTRLSTA_OFFSET_INB_CTRL
- E1000_KUMCTRLSTA_OFFSET_INB_PARAM
- E1000_KUMCTRLSTA_OFFSET_K0S_CTRL
- E1000_KUMCTRLSTA_OFFSET_M2P_MODES
- E1000_KUMCTRLSTA_OFFSET_M2P_SERDES
- E1000_KUMCTRLSTA_OFFSET_SHIFT
- E1000_KUMCTRLSTA_OFFSET_TIMEOUTS
- E1000_KUMCTRLSTA_REN
- E1000_LATECOL
- E1000_LEDCTL
- E1000_LEDCTL_LED0_BLINK
- E1000_LEDCTL_LED0_BLINK_RATE
- E1000_LEDCTL_LED0_IVRT
- E1000_LEDCTL_LED0_MODE_MASK
- E1000_LEDCTL_LED0_MODE_SHIFT
- E1000_LEDCTL_LED1_BLINK
- E1000_LEDCTL_LED1_BLINK_RATE
- E1000_LEDCTL_LED1_IVRT
- E1000_LEDCTL_LED1_MODE_MASK
- E1000_LEDCTL_LED1_MODE_SHIFT
- E1000_LEDCTL_LED2_BLINK
- E1000_LEDCTL_LED2_BLINK_RATE
- E1000_LEDCTL_LED2_IVRT
- E1000_LEDCTL_LED2_MODE_MASK
- E1000_LEDCTL_LED2_MODE_SHIFT
- E1000_LEDCTL_LED3_BLINK
- E1000_LEDCTL_LED3_BLINK_RATE
- E1000_LEDCTL_LED3_IVRT
- E1000_LEDCTL_LED3_MODE_MASK
- E1000_LEDCTL_LED3_MODE_SHIFT
- E1000_LEDCTL_MODE_ACTIVITY
- E1000_LEDCTL_MODE_BUS_SIZE
- E1000_LEDCTL_MODE_BUS_SPEED
- E1000_LEDCTL_MODE_COLLISION
- E1000_LEDCTL_MODE_FULL_DUPLEX
- E1000_LEDCTL_MODE_LED_OFF
- E1000_LEDCTL_MODE_LED_ON
- E1000_LEDCTL_MODE_LINK_10
- E1000_LEDCTL_MODE_LINK_100
- E1000_LEDCTL_MODE_LINK_1000
- E1000_LEDCTL_MODE_LINK_100_1000
- E1000_LEDCTL_MODE_LINK_10_1000
- E1000_LEDCTL_MODE_LINK_ACTIVITY
- E1000_LEDCTL_MODE_LINK_UP
- E1000_LEDCTL_MODE_PAUSED
- E1000_LEDCTL_MODE_PCIX_MODE
- E1000_LEDMUX
- E1000_LENERRS
- E1000_LPIC
- E1000_LPIC_LPIET_SHIFT
- E1000_LTRV
- E1000_LTRV_NOSNOOP_SHIFT
- E1000_LTRV_REQ_SHIFT
- E1000_LTRV_SCALE_FACTOR
- E1000_LTRV_SCALE_MAX
- E1000_LTRV_SEND
- E1000_LVMMC
- E1000_M88E1112_AUTO_COPPER_BASEX
- E1000_M88E1112_AUTO_COPPER_SGMII
- E1000_M88E1112_MAC_CTRL_1
- E1000_M88E1112_MAC_CTRL_1_MODE_MASK
- E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT
- E1000_M88E1112_PAGE_ADDR
- E1000_M88E1112_STATUS
- E1000_M88E1112_STATUS_LINK
- E1000_M88E1512_CFG_REG_1
- E1000_M88E1512_CFG_REG_2
- E1000_M88E1512_CFG_REG_3
- E1000_M88E1512_MODE
- E1000_M88E1543_EEE_CTRL_1
- E1000_M88E1543_EEE_CTRL_1_MS
- E1000_M88E1543_FIBER_CTRL
- E1000_M88E1543_PAGE_ADDR
- E1000_MANC
- E1000_MANC2H
- E1000_MANC2H_PORT_623
- E1000_MANC2H_PORT_664
- E1000_MANC_0298_EN
- E1000_MANC_ARP_EN
- E1000_MANC_ARP_RES_EN
- E1000_MANC_ASF_EN
- E1000_MANC_BLK_PHY_RST_ON_IDE
- E1000_MANC_BR_EN
- E1000_MANC_EN_BMC2OS
- E1000_MANC_EN_IP_ADDR_FILTER
- E1000_MANC_EN_MAC_ADDR_FILTER
- E1000_MANC_EN_MNG2HOST
- E1000_MANC_EN_XSUM_FILTER
- E1000_MANC_IPV4_EN
- E1000_MANC_IPV6_EN
- E1000_MANC_NEIGHBOR_EN
- E1000_MANC_RCV_ALL
- E1000_MANC_RCV_TCO_EN
- E1000_MANC_REPORT_STATUS
- E1000_MANC_RMCP_EN
- E1000_MANC_R_ON_FORCE
- E1000_MANC_SMBUS_EN
- E1000_MANC_SMB_CLK_IN
- E1000_MANC_SMB_CLK_OUT
- E1000_MANC_SMB_CLK_OUT_SHIFT
- E1000_MANC_SMB_DATA_IN
- E1000_MANC_SMB_DATA_OUT
- E1000_MANC_SMB_DATA_OUT_SHIFT
- E1000_MANC_SMB_GNT
- E1000_MANC_SMB_REQ
- E1000_MANC_SNAP_EN
- E1000_MANC_TCO_RESET
- E1000_MASTER_SLAVE
- E1000_MAX_82544_RXD
- E1000_MAX_82544_TXD
- E1000_MAX_82574_SYSTIM_REREADS
- E1000_MAX_DATA_PER_TXD
- E1000_MAX_DSP_RESETS
- E1000_MAX_INTR
- E1000_MAX_ITR_USECS
- E1000_MAX_NIC
- E1000_MAX_PHY_ADDR
- E1000_MAX_PLL_TRIES
- E1000_MAX_RXD
- E1000_MAX_SENSORS
- E1000_MAX_SGMII_PHY_REG_ADDR
- E1000_MAX_TXD
- E1000_MAX_TXD_PWR
- E1000_MBVFICR
- E1000_MBVFICR_VFACK_MASK
- E1000_MBVFICR_VFACK_VF1
- E1000_MBVFICR_VFREQ_MASK
- E1000_MBVFICR_VFREQ_VF1
- E1000_MBVFIMR
- E1000_MCC
- E1000_MC_TBL_SIZE
- E1000_MDALIGN
- E1000_MDC_CMD
- E1000_MDEF
- E1000_MDEF_PORT_623
- E1000_MDEF_PORT_664
- E1000_MDIC
- E1000_MDICNFG
- E1000_MDICNFG_COM_MDIO
- E1000_MDICNFG_EXT_MDIO
- E1000_MDICNFG_PHY_MASK
- E1000_MDICNFG_PHY_SHIFT
- E1000_MDIC_DATA_MASK
- E1000_MDIC_DEST
- E1000_MDIC_ERROR
- E1000_MDIC_INT_EN
- E1000_MDIC_OP_READ
- E1000_MDIC_OP_WRITE
- E1000_MDIC_PHY_MASK
- E1000_MDIC_PHY_SHIFT
- E1000_MDIC_READY
- E1000_MDIC_REG_MASK
- E1000_MDIC_REG_SHIFT
- E1000_MDIO_CMD
- E1000_MDIO_DRV
- E1000_MDIO_STS
- E1000_MDPHYA
- E1000_MEDIA_PORT_COPPER
- E1000_MEDIA_PORT_OTHER
- E1000_MGTPDC
- E1000_MGTPRC
- E1000_MGTPTC
- E1000_MIN_ITR_USECS
- E1000_MIN_RXD
- E1000_MIN_TXD
- E1000_MMDAAD
- E1000_MMDAC
- E1000_MMDAC_FUNC_DATA
- E1000_MNG_DHCP_COMMAND_TIMEOUT
- E1000_MNG_DHCP_COOKIE_LENGTH
- E1000_MNG_DHCP_COOKIE_OFFSET
- E1000_MNG_DHCP_COOKIE_STATUS_PARSING
- E1000_MNG_DHCP_COOKIE_STATUS_PARSING_SUPPORT
- E1000_MNG_DHCP_COOKIE_STATUS_VLAN
- E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT
- E1000_MNG_DHCP_TX_PAYLOAD_CMD
- E1000_MNG_IAMT_MODE
- E1000_MNG_ICH_IAMT_MODE
- E1000_MNG_VLAN_NONE
- E1000_MPC
- E1000_MPHY_ADDR_CTL
- E1000_MPHY_ADDR_CTL_OFFSET_MASK
- E1000_MPHY_ADDR_CTRL
- E1000_MPHY_DATA
- E1000_MPHY_PCS_CLK_REG_DIGINELBEN
- E1000_MPHY_PCS_CLK_REG_OFFSET
- E1000_MPHY_STAT
- E1000_MPRC
- E1000_MPTC
- E1000_MRQC
- E1000_MRQC_ENABLE_MASK
- E1000_MRQC_ENABLE_RSS_2Q
- E1000_MRQC_ENABLE_RSS_INT
- E1000_MRQC_ENABLE_RSS_MQ
- E1000_MRQC_ENABLE_VMDQ
- E1000_MRQC_ENABLE_VMDQ_RSS_MQ
- E1000_MRQC_RSS_FIELD_IPV4
- E1000_MRQC_RSS_FIELD_IPV4_TCP
- E1000_MRQC_RSS_FIELD_IPV4_UDP
- E1000_MRQC_RSS_FIELD_IPV6
- E1000_MRQC_RSS_FIELD_IPV6_EX
- E1000_MRQC_RSS_FIELD_IPV6_TCP
- E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
- E1000_MRQC_RSS_FIELD_IPV6_UDP
- E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
- E1000_MRQC_RSS_FIELD_MASK
- E1000_MSIXBM
- E1000_MTA
- E1000_NETDEV_STAT
- E1000_NOT_IMPLEMENTED
- E1000_NUM_MTA_REGISTERS
- E1000_NUM_UNICAST
- E1000_NVM_APME_82575
- E1000_NVM_CFG_DONE_PORT_0
- E1000_NVM_CFG_DONE_PORT_1
- E1000_NVM_CFG_DONE_PORT_2
- E1000_NVM_CFG_DONE_PORT_3
- E1000_NVM_GRANT_ATTEMPTS
- E1000_NVM_INIT_CTRL2_MNGM
- E1000_NVM_K1_CONFIG
- E1000_NVM_K1_ENABLE
- E1000_NVM_POLL_READ
- E1000_NVM_POLL_WRITE
- E1000_NVM_RW_ADDR_SHIFT
- E1000_NVM_RW_REG_DATA
- E1000_NVM_RW_REG_DONE
- E1000_NVM_RW_REG_START
- E1000_O2BGPTC
- E1000_O2BSPC
- E1000_P2VMAILBOX
- E1000_P2VMAILBOX_ACK
- E1000_P2VMAILBOX_PFU
- E1000_P2VMAILBOX_RVFU
- E1000_P2VMAILBOX_STS
- E1000_P2VMAILBOX_VFU
- E1000_PARAM
- E1000_PARAM_INIT
- E1000_PBA
- E1000_PBANUM_LENGTH
- E1000_PBA_12K
- E1000_PBA_16K
- E1000_PBA_20K
- E1000_PBA_22K
- E1000_PBA_24K
- E1000_PBA_30K
- E1000_PBA_32K
- E1000_PBA_34K
- E1000_PBA_38K
- E1000_PBA_40K
- E1000_PBA_48K
- E1000_PBA_64K
- E1000_PBA_8K
- E1000_PBA_BYTES_SHIFT
- E1000_PBA_ECC
- E1000_PBA_ECC_CORR_EN
- E1000_PBA_ECC_COUNTER_MASK
- E1000_PBA_ECC_COUNTER_SHIFT
- E1000_PBA_ECC_INT_EN
- E1000_PBA_ECC_STAT_CLR
- E1000_PBA_RXA_MASK
- E1000_PBA_TX_MASK
- E1000_PBECCSTS
- E1000_PBECCSTS_CORR_ERR_CNT_MASK
- E1000_PBECCSTS_ECC_ENABLE
- E1000_PBECCSTS_UNCORR_ERR_CNT_MASK
- E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT
- E1000_PBS
- E1000_PBS_16K
- E1000_PCH2_RAR_ENTRIES
- E1000_PCH_LPT_RAR_ENTRIES
- E1000_PCH_RAICC
- E1000_PCIEANACFG
- E1000_PCIEMISC
- E1000_PCIEMISC_LX_DECISION
- E1000_PCI_LTR_CAP_LPT
- E1000_PCI_PMCSR
- E1000_PCI_PMCSR_D3
- E1000_PCS_ANADV
- E1000_PCS_CFG0
- E1000_PCS_CFG_IGN_SD
- E1000_PCS_CFG_PCS_EN
- E1000_PCS_LCTL
- E1000_PCS_LCTL_AN_ENABLE
- E1000_PCS_LCTL_AN_RESTART
- E1000_PCS_LCTL_AN_TIMEOUT
- E1000_PCS_LCTL_FDV_FULL
- E1000_PCS_LCTL_FLV_LINK_UP
- E1000_PCS_LCTL_FORCE_FCTRL
- E1000_PCS_LCTL_FORCE_LINK
- E1000_PCS_LCTL_FSD
- E1000_PCS_LCTL_FSV_100
- E1000_PCS_LCTL_FSV_1000
- E1000_PCS_LPAB
- E1000_PCS_LPABNP
- E1000_PCS_LSTAT
- E1000_PCS_LSTS_AN_COMPLETE
- E1000_PCS_LSTS_DUPLEX_FULL
- E1000_PCS_LSTS_LINK_OK
- E1000_PCS_LSTS_SPEED_100
- E1000_PCS_LSTS_SPEED_1000
- E1000_PCS_LSTS_SYNK_OK
- E1000_PCS_NPTX
- E1000_PCS_STATUS_ADDR_I354
- E1000_PCS_STATUS_DEV_I354
- E1000_PCS_STATUS_RX_LPI_RCVD
- E1000_PCS_STATUS_TX_LPI_IND
- E1000_PCS_STATUS_TX_LPI_RCVD
- E1000_PF_CONTROL_MSG
- E1000_PHY_ADDRESS
- E1000_PHY_CTRL
- E1000_PHY_CTRL_B2B_EN
- E1000_PHY_CTRL_D0A_LPLU
- E1000_PHY_CTRL_GBE_DISABLE
- E1000_PHY_CTRL_NOND0A_GBE_DISABLE
- E1000_PHY_CTRL_NOND0A_LPLU
- E1000_PHY_CTRL_SPD_EN
- E1000_PHY_LED0_IVRT
- E1000_PHY_LED0_MASK
- E1000_PHY_LED0_MODE_MASK
- E1000_PHY_PLL_FREQ_PAGE
- E1000_PHY_PLL_FREQ_REG
- E1000_PHY_PLL_UNCONF
- E1000_PLTSTMPH
- E1000_PLTSTMPL
- E1000_POEMB
- E1000_PRC1023
- E1000_PRC127
- E1000_PRC1522
- E1000_PRC255
- E1000_PRC511
- E1000_PRC64
- E1000_PSRCTL
- E1000_PSRCTL_BSIZE0_MASK
- E1000_PSRCTL_BSIZE0_SHIFT
- E1000_PSRCTL_BSIZE1_MASK
- E1000_PSRCTL_BSIZE1_SHIFT
- E1000_PSRCTL_BSIZE2_MASK
- E1000_PSRCTL_BSIZE2_SHIFT
- E1000_PSRCTL_BSIZE3_MASK
- E1000_PSRCTL_BSIZE3_SHIFT
- E1000_PSRTYPE
- E1000_PTC1023
- E1000_PTC127
- E1000_PTC1522
- E1000_PTC255
- E1000_PTC511
- E1000_PTC64
- E1000_QDE
- E1000_QUEUE_STATS_LEN
- E1000_RA
- E1000_RA2
- E1000_RADV
- E1000_RAH
- E1000_RAH_ASEL_SRC_ADDR
- E1000_RAH_AV
- E1000_RAH_MAC_ADDR_LEN
- E1000_RAH_POOL_1
- E1000_RAH_POOL_MASK
- E1000_RAH_QSEL_ENABLE
- E1000_RAID
- E1000_RAL
- E1000_RAL_MAC_ADDR_LEN
- E1000_RAR_ENTRIES
- E1000_RAR_ENTRIES_82575
- E1000_RAR_ENTRIES_82576
- E1000_RAR_ENTRIES_82580
- E1000_RAR_ENTRIES_I350
- E1000_RAR_ENTRIES_VF
- E1000_RCOMP_CTL
- E1000_RCOMP_STS
- E1000_RCTL
- E1000_RCTL_BAM
- E1000_RCTL_BSEX
- E1000_RCTL_CFI
- E1000_RCTL_CFIEN
- E1000_RCTL_DPF
- E1000_RCTL_DTYP_MASK
- E1000_RCTL_DTYP_PS
- E1000_RCTL_EN
- E1000_RCTL_FLXBUF_MASK
- E1000_RCTL_FLXBUF_SHIFT
- E1000_RCTL_LBM_MAC
- E1000_RCTL_LBM_NO
- E1000_RCTL_LBM_SLP
- E1000_RCTL_LBM_TCVR
- E1000_RCTL_LPE
- E1000_RCTL_MDR
- E1000_RCTL_MO_0
- E1000_RCTL_MO_1
- E1000_RCTL_MO_2
- E1000_RCTL_MO_3
- E1000_RCTL_MO_SHIFT
- E1000_RCTL_MPE
- E1000_RCTL_PMCF
- E1000_RCTL_RDMTS_EIGTH
- E1000_RCTL_RDMTS_HALF
- E1000_RCTL_RDMTS_HEX
- E1000_RCTL_RDMTS_QUAT
- E1000_RCTL_RST
- E1000_RCTL_SBP
- E1000_RCTL_SECRC
- E1000_RCTL_SZ_1024
- E1000_RCTL_SZ_16384
- E1000_RCTL_SZ_2048
- E1000_RCTL_SZ_256
- E1000_RCTL_SZ_4096
- E1000_RCTL_SZ_512
- E1000_RCTL_SZ_8192
- E1000_RCTL_UPE
- E1000_RCTL_VFE
- E1000_RDBAH
- E1000_RDBAH0
- E1000_RDBAH1
- E1000_RDBAL
- E1000_RDBAL0
- E1000_RDBAL1
- E1000_RDFH
- E1000_RDFHS
- E1000_RDFPC
- E1000_RDFT
- E1000_RDFTS
- E1000_RDH
- E1000_RDH0
- E1000_RDH1
- E1000_RDH_RDH
- E1000_RDLEN
- E1000_RDLEN0
- E1000_RDLEN1
- E1000_RDLEN_LEN
- E1000_RDT
- E1000_RDT0
- E1000_RDT1
- E1000_RDTR
- E1000_RDTR0
- E1000_RDTR1
- E1000_RDTR_FPD
- E1000_RDT_DELAY
- E1000_RDT_FPDB
- E1000_RDT_RDT
- E1000_READ_ICH_FLASH_REG
- E1000_READ_ICH_FLASH_REG16
- E1000_READ_REG_ARRAY
- E1000_READ_REG_ARRAY_BYTE
- E1000_READ_REG_ARRAY_DWORD
- E1000_READ_REG_ARRAY_WORD
- E1000_READ_REG_IO
- E1000_RECEIVE_ERROR_COUNTER
- E1000_RECEIVE_ERROR_MAX
- E1000_REGS_LEN
- E1000_REMOVED
- E1000_RETA
- E1000_REVISION_0
- E1000_REVISION_1
- E1000_REVISION_2
- E1000_REVISION_3
- E1000_REVISION_4
- E1000_RFC
- E1000_RFCTL
- E1000_RFCTL_ACKD_DIS
- E1000_RFCTL_ACK_DIS
- E1000_RFCTL_EXTEN
- E1000_RFCTL_IPFRSP_DIS
- E1000_RFCTL_IPV6_DIS
- E1000_RFCTL_IPV6_EX_DIS
- E1000_RFCTL_IPV6_XSUM_DIS
- E1000_RFCTL_ISCSI_DIS
- E1000_RFCTL_ISCSI_DWC_MASK
- E1000_RFCTL_ISCSI_DWC_SHIFT
- E1000_RFCTL_LEF
- E1000_RFCTL_NEW_IPV6_EXT_DIS
- E1000_RFCTL_NFSR_DIS
- E1000_RFCTL_NFSW_DIS
- E1000_RFCTL_NFS_VER_MASK
- E1000_RFCTL_NFS_VER_SHIFT
- E1000_RJC
- E1000_RLEC
- E1000_RLPML
- E1000_RNBC
- E1000_ROC
- E1000_RPLOLR
- E1000_RPLOLR_STRCRC
- E1000_RPLOLR_STRVLAN
- E1000_RPTHC
- E1000_RQDPC
- E1000_RSRPD
- E1000_RSSIM
- E1000_RSSIR
- E1000_RSSRK
- E1000_RTTBCNRC
- E1000_RTTBCNRC_RF_DEC_MASK
- E1000_RTTBCNRC_RF_INT_MASK
- E1000_RTTBCNRC_RF_INT_SHIFT
- E1000_RTTBCNRC_RS_ENA
- E1000_RTTBCNRM
- E1000_RTTDQSEL
- E1000_RUC
- E1000_RXBUFFER_1024
- E1000_RXBUFFER_128
- E1000_RXBUFFER_16384
- E1000_RXBUFFER_2048
- E1000_RXBUFFER_256
- E1000_RXBUFFER_4096
- E1000_RXBUFFER_512
- E1000_RXBUFFER_8192
- E1000_RXCSUM
- E1000_RXCSUM_CRCOFL
- E1000_RXCSUM_IPOFL
- E1000_RXCSUM_IPPCSE
- E1000_RXCSUM_IPV6OFL
- E1000_RXCSUM_PCSD
- E1000_RXCSUM_PCSS_MASK
- E1000_RXCSUM_TUOFL
- E1000_RXCTL
- E1000_RXCW
- E1000_RXCW_ANC
- E1000_RXCW_C
- E1000_RXCW_CC
- E1000_RXCW_CW
- E1000_RXCW_IV
- E1000_RXCW_NC
- E1000_RXCW_SYNCH
- E1000_RXDADV_HDRBUFLEN_MASK
- E1000_RXDADV_HDRBUFLEN_SHIFT
- E1000_RXDADV_STAT_TS
- E1000_RXDADV_STAT_TSIP
- E1000_RXDCTL
- E1000_RXDCTL1
- E1000_RXDCTL_DMA_BURST_ENABLE
- E1000_RXDCTL_GRAN
- E1000_RXDCTL_HTHRESH
- E1000_RXDCTL_PTHRESH
- E1000_RXDCTL_QUEUE_ENABLE
- E1000_RXDCTL_THRESH_UNIT_DESC
- E1000_RXDCTL_WTHRESH
- E1000_RXDEXT_ERR_FRAME_ERR_MASK
- E1000_RXDEXT_STATERR_CE
- E1000_RXDEXT_STATERR_CXE
- E1000_RXDEXT_STATERR_IPE
- E1000_RXDEXT_STATERR_LB
- E1000_RXDEXT_STATERR_RXE
- E1000_RXDEXT_STATERR_SE
- E1000_RXDEXT_STATERR_SEQ
- E1000_RXDEXT_STATERR_TCPE
- E1000_RXDEXT_STATERR_TST
- E1000_RXDPS_HDRSTAT_HDRLEN_MASK
- E1000_RXDPS_HDRSTAT_HDRSP
- E1000_RXD_ERR_CE
- E1000_RXD_ERR_CXE
- E1000_RXD_ERR_FRAME_ERR_MASK
- E1000_RXD_ERR_IPE
- E1000_RXD_ERR_RXE
- E1000_RXD_ERR_SE
- E1000_RXD_ERR_SEQ
- E1000_RXD_ERR_TCPE
- E1000_RXD_SPC_CFI_MASK
- E1000_RXD_SPC_CFI_SHIFT
- E1000_RXD_SPC_PRI_MASK
- E1000_RXD_SPC_PRI_SHIFT
- E1000_RXD_SPC_VLAN_MASK
- E1000_RXD_STAT_ACK
- E1000_RXD_STAT_DD
- E1000_RXD_STAT_EOP
- E1000_RXD_STAT_IPCS
- E1000_RXD_STAT_IPIDV
- E1000_RXD_STAT_IXSM
- E1000_RXD_STAT_PIF
- E1000_RXD_STAT_TCPCS
- E1000_RXD_STAT_TS
- E1000_RXD_STAT_UDPCS
- E1000_RXD_STAT_UDPV
- E1000_RXD_STAT_VP
- E1000_RXERRC
- E1000_RXMTRL
- E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE
- E1000_RXMTRL_PTP_V1_SYNC_MESSAGE
- E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE
- E1000_RXMTRL_PTP_V2_SYNC_MESSAGE
- E1000_RXPBS
- E1000_RXPBS_CFG_TS_EN
- E1000_RXPBS_SIZE_MASK_82576
- E1000_RXSATRH
- E1000_RXSATRL
- E1000_RXSTMPH
- E1000_RXSTMPL
- E1000_RXUDP
- E1000_RX_BUFFER_WRITE
- E1000_RX_DESC
- E1000_RX_DESC_EXT
- E1000_RX_DESC_PS
- E1000_SAQF
- E1000_SAQF0
- E1000_SCC
- E1000_SCCTL
- E1000_SCTL
- E1000_SCTL_DISABLE_SERDES_LOOPBACK
- E1000_SCTL_ENABLE_SERDES_LOOPBACK
- E1000_SCVPC
- E1000_SEC
- E1000_SFF_ETH_FLAGS_OFFSET
- E1000_SFF_IDENTIFIER_OFFSET
- E1000_SFF_IDENTIFIER_SFF
- E1000_SFF_IDENTIFIER_SFP
- E1000_SHADOW_RAM_WORDS
- E1000_SHRAH
- E1000_SHRAH_PCH_LPT
- E1000_SHRAL
- E1000_SHRAL_PCH_LPT
- E1000_SMARTSPEED_DOWNSHIFT
- E1000_SMARTSPEED_MAX
- E1000_SPQF
- E1000_SPQF0
- E1000_SRRCTL
- E1000_SRRCTL_BSIZEHDRSIZE_MASK
- E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
- E1000_SRRCTL_BSIZEHDR_MASK
- E1000_SRRCTL_BSIZEPKT_MASK
- E1000_SRRCTL_BSIZEPKT_SHIFT
- E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
- E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
- E1000_SRRCTL_DESCTYPE_MASK
- E1000_SRRCTL_DROP_EN
- E1000_SRRCTL_TIMESTAMP
- E1000_SRWR
- E1000_STAT
- E1000_STATS
- E1000_STATS_LEN
- E1000_STATUS
- E1000_STATUS_2P5_SKU
- E1000_STATUS_2P5_SKU_OVER
- E1000_STATUS_ASDV
- E1000_STATUS_BMC_CRYPTO
- E1000_STATUS_BMC_LITE
- E1000_STATUS_BMC_SKU_0
- E1000_STATUS_BMC_SKU_1
- E1000_STATUS_BMC_SKU_2
- E1000_STATUS_BUS64
- E1000_STATUS_DOCK_CI
- E1000_STATUS_FD
- E1000_STATUS_FUNC_0
- E1000_STATUS_FUNC_1
- E1000_STATUS_FUNC_MASK
- E1000_STATUS_FUNC_SHIFT
- E1000_STATUS_FUSE_8
- E1000_STATUS_FUSE_9
- E1000_STATUS_GIO_MASTER_ENABLE
- E1000_STATUS_LAN_INIT_DONE
- E1000_STATUS_LU
- E1000_STATUS_MTXCKOK
- E1000_STATUS_PCI66
- E1000_STATUS_PCIM_STATE
- E1000_STATUS_PCIX_MODE
- E1000_STATUS_PCIX_SPEED
- E1000_STATUS_PCIX_SPEED_100
- E1000_STATUS_PCIX_SPEED_133
- E1000_STATUS_PCIX_SPEED_66
- E1000_STATUS_PHYRA
- E1000_STATUS_RGMII_ENABLE
- E1000_STATUS_SERDES0_DIS
- E1000_STATUS_SERDES1_DIS
- E1000_STATUS_SPEED_10
- E1000_STATUS_SPEED_100
- E1000_STATUS_SPEED_1000
- E1000_STATUS_SPEED_MASK
- E1000_STATUS_TBIMODE
- E1000_STATUS_TXOFF
- E1000_STAT_DEV_RST_SET
- E1000_STM_OPCODE
- E1000_STRAP
- E1000_STRAP_SMBUS_ADDRESS_MASK
- E1000_STRAP_SMBUS_ADDRESS_SHIFT
- E1000_STRAP_SMT_FREQ_MASK
- E1000_STRAP_SMT_FREQ_SHIFT
- E1000_SUCCESS
- E1000_SVCR
- E1000_SVT
- E1000_SWFW_CSR_SM
- E1000_SWFW_EEP_SM
- E1000_SWFW_MAC_CSR_SM
- E1000_SWFW_PHY0_SM
- E1000_SWFW_PHY1_SM
- E1000_SWFW_PHY2_SM
- E1000_SWFW_PHY3_SM
- E1000_SWSM
- E1000_SWSM2
- E1000_SWSM2_LOCK
- E1000_SWSM_DRV_LOAD
- E1000_SWSM_SMBI
- E1000_SWSM_SWESMBI
- E1000_SWSM_WMNG
- E1000_SW_FW_SYNC
- E1000_SW_SYNCH_MB
- E1000_SYMERRS
- E1000_SYNQF
- E1000_SYSSTMPH
- E1000_SYSSTMPL
- E1000_SYSTIMH
- E1000_SYSTIML
- E1000_SYSTIMR
- E1000_SYSTIM_OVERFLOW_PERIOD
- E1000_TADV
- E1000_TARC
- E1000_TARC0
- E1000_TARC0_CB_MULTIQ_2_REQ
- E1000_TARC0_CB_MULTIQ_3_REQ
- E1000_TARC1
- E1000_TBT
- E1000_TCPTIMER
- E1000_TCTL
- E1000_TCTL_BCE
- E1000_TCTL_COLD
- E1000_TCTL_CT
- E1000_TCTL_EN
- E1000_TCTL_EXT
- E1000_TCTL_EXT_BST_MASK
- E1000_TCTL_EXT_GCEX_MASK
- E1000_TCTL_MULR
- E1000_TCTL_NRTU
- E1000_TCTL_PBE
- E1000_TCTL_PSP
- E1000_TCTL_RST
- E1000_TCTL_RTLC
- E1000_TCTL_SWXOFF
- E1000_TDBAH
- E1000_TDBAH1
- E1000_TDBAL
- E1000_TDBAL1
- E1000_TDFH
- E1000_TDFHS
- E1000_TDFPC
- E1000_TDFT
- E1000_TDFTS
- E1000_TDH
- E1000_TDH1
- E1000_TDLEN
- E1000_TDLEN1
- E1000_TDT
- E1000_TDT1
- E1000_TDWBAH
- E1000_TDWBAL
- E1000_TEST_LEN
- E1000_THHIGHTC
- E1000_THLOWTC
- E1000_THMIDTC
- E1000_THMJT
- E1000_THSTAT
- E1000_THSTAT_LINK_THROTTLE
- E1000_THSTAT_PWR_DOWN
- E1000_TIDV
- E1000_TIDV_FPD
- E1000_TIMINCA
- E1000_TIMINCA_16NS_SHIFT
- E1000_TIMINCA_INCPERIOD_SHIFT
- E1000_TIMINCA_INCVALUE_MASK
- E1000_TIPG
- E1000_TIPG_IPGR1_MASK
- E1000_TIPG_IPGR1_SHIFT
- E1000_TIPG_IPGR2_MASK
- E1000_TIPG_IPGR2_SHIFT
- E1000_TIPG_IPGT_MASK
- E1000_TNCRS
- E1000_TORH
- E1000_TORL
- E1000_TOTH
- E1000_TOTL
- E1000_TPR
- E1000_TPT
- E1000_TQAVCC_IDLESLOPE_MASK
- E1000_TQAVCC_QUEUEMODE
- E1000_TQAVCTRL_DATAFETCHARB
- E1000_TQAVCTRL_DATATRANARB
- E1000_TQAVCTRL_DATATRANTIM
- E1000_TQAVCTRL_FETCHTIME_DELTA
- E1000_TQAVCTRL_SP_WAIT_SR
- E1000_TQAVCTRL_XMIT_MODE
- E1000_TRGTTIMH0
- E1000_TRGTTIMH1
- E1000_TRGTTIML0
- E1000_TRGTTIML1
- E1000_TSAUXC
- E1000_TSCTC
- E1000_TSCTFC
- E1000_TSICR
- E1000_TSICR_TXTS
- E1000_TSIM
- E1000_TSPMT
- E1000_TSSDP
- E1000_TSYNCRXCFG
- E1000_TSYNCRXCFG_PTP_V1_CTRLT_MASK
- E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
- E1000_TSYNCRXCFG_PTP_V1_DELAY_RESP_MESSAGE
- E1000_TSYNCRXCFG_PTP_V1_FOLLOWUP_MESSAGE
- E1000_TSYNCRXCFG_PTP_V1_MANAGEMENT_MESSAGE
- E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_ANNOUNCE_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_DELAY_RESP_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_FOLLOWUP_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_MANAGEMENT_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_MSGID_MASK
- E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_FOLLOWUP_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_REQ_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_RESP_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_SIGNALLING_MESSAGE
- E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE
- E1000_TSYNCRXCTL
- E1000_TSYNCRXCTL_ENABLED
- E1000_TSYNCRXCTL_SYSCFI
- E1000_TSYNCRXCTL_TYPE_ALL
- E1000_TSYNCRXCTL_TYPE_EVENT_V2
- E1000_TSYNCRXCTL_TYPE_L2_L4_V2
- E1000_TSYNCRXCTL_TYPE_L2_V2
- E1000_TSYNCRXCTL_TYPE_L4_V1
- E1000_TSYNCRXCTL_TYPE_MASK
- E1000_TSYNCRXCTL_VALID
- E1000_TSYNCTXCTL
- E1000_TSYNCTXCTL_ENABLED
- E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK
- E1000_TSYNCTXCTL_START_SYNC
- E1000_TSYNCTXCTL_SYNC_COMP
- E1000_TSYNCTXCTL_VALID
- E1000_TXCTL
- E1000_TXCW
- E1000_TXCW_ANE
- E1000_TXCW_ASM_DIR
- E1000_TXCW_CW
- E1000_TXCW_FD
- E1000_TXCW_HD
- E1000_TXCW_NP
- E1000_TXCW_PAUSE
- E1000_TXCW_PAUSE_MASK
- E1000_TXCW_RF
- E1000_TXCW_TXC
- E1000_TXDCTL
- E1000_TXDCTL1
- E1000_TXDCTL_COUNT_DESC
- E1000_TXDCTL_DMA_BURST_ENABLE
- E1000_TXDCTL_FULL_TX_DESC_WB
- E1000_TXDCTL_GRAN
- E1000_TXDCTL_HTHRESH
- E1000_TXDCTL_LWTHRESH
- E1000_TXDCTL_MAX_TX_DESC_PREFETCH
- E1000_TXDCTL_PRIORITY
- E1000_TXDCTL_PTHRESH
- E1000_TXDCTL_QUEUE_ENABLE
- E1000_TXDCTL_WTHRESH
- E1000_TXDMAC
- E1000_TXDMAC_DPP
- E1000_TXD_CMD_DEXT
- E1000_TXD_CMD_EOP
- E1000_TXD_CMD_IC
- E1000_TXD_CMD_IDE
- E1000_TXD_CMD_IFCS
- E1000_TXD_CMD_IP
- E1000_TXD_CMD_RPS
- E1000_TXD_CMD_RS
- E1000_TXD_CMD_TCP
- E1000_TXD_CMD_TSE
- E1000_TXD_CMD_VLE
- E1000_TXD_DTYP_C
- E1000_TXD_DTYP_D
- E1000_TXD_EXTCMD_TSTAMP
- E1000_TXD_POPTS_IXSM
- E1000_TXD_POPTS_TXSM
- E1000_TXD_STAT_DD
- E1000_TXD_STAT_EC
- E1000_TXD_STAT_LC
- E1000_TXD_STAT_TC
- E1000_TXD_STAT_TU
- E1000_TXPBS
- E1000_TXSTMPH
- E1000_TXSTMPL
- E1000_TXSWC
- E1000_TX_BUFFER_SIZE
- E1000_TX_DESC
- E1000_TX_FLAGS_CSUM
- E1000_TX_FLAGS_HWTSTAMP
- E1000_TX_FLAGS_IPV4
- E1000_TX_FLAGS_NO_FCS
- E1000_TX_FLAGS_TSO
- E1000_TX_FLAGS_VLAN
- E1000_TX_FLAGS_VLAN_MASK
- E1000_TX_FLAGS_VLAN_SHIFT
- E1000_TX_HEAD_ADDR_SHIFT
- E1000_TX_PTR_GAP
- E1000_TX_QUEUE_WAKE
- E1000_UTA
- E1000_V2PMAILBOX
- E1000_V2PMAILBOX_ACK
- E1000_V2PMAILBOX_PFACK
- E1000_V2PMAILBOX_PFSTS
- E1000_V2PMAILBOX_PFU
- E1000_V2PMAILBOX_R2C_BITS
- E1000_V2PMAILBOX_REQ
- E1000_V2PMAILBOX_RSTD
- E1000_V2PMAILBOX_RSTI
- E1000_V2PMAILBOX_VFU
- E1000_VET
- E1000_VFGORC
- E1000_VFGORLBC
- E1000_VFGOTC
- E1000_VFGOTLBC
- E1000_VFGPRC
- E1000_VFGPRLBC
- E1000_VFGPTC
- E1000_VFGPTLBC
- E1000_VFLRE
- E1000_VFMAILBOX_SIZE
- E1000_VFMPRC
- E1000_VFRE
- E1000_VFTA
- E1000_VFTA_ENTRY_BIT_SHIFT_MASK
- E1000_VFTA_ENTRY_MASK
- E1000_VFTA_ENTRY_SHIFT
- E1000_VFTE
- E1000_VF_INIT_TIMEOUT
- E1000_VF_MAC_FILTER_ADD
- E1000_VF_MAC_FILTER_CLR
- E1000_VF_MBX_INIT_DELAY
- E1000_VF_MBX_INIT_TIMEOUT
- E1000_VF_RESET
- E1000_VF_SET_LPE
- E1000_VF_SET_MAC_ADDR
- E1000_VF_SET_MULTICAST
- E1000_VF_SET_PROMISC
- E1000_VF_SET_PROMISC_MULTICAST
- E1000_VF_SET_VLAN
- E1000_VLAN_FILTER_TBL_SIZE
- E1000_VLAPQF
- E1000_VLAPQF_P_VALID
- E1000_VLAPQF_QUEUE_MASK
- E1000_VLAPQF_QUEUE_SEL
- E1000_VLVF
- E1000_VLVF_ARRAY_SIZE
- E1000_VLVF_LVLAN
- E1000_VLVF_POOLSEL_MASK
- E1000_VLVF_POOLSEL_SHIFT
- E1000_VLVF_VLANID_ENABLE
- E1000_VLVF_VLANID_MASK
- E1000_VMBMEM
- E1000_VMOLR
- E1000_VMOLR_AUPE
- E1000_VMOLR_BAM
- E1000_VMOLR_LPE
- E1000_VMOLR_MPME
- E1000_VMOLR_RLPML_MASK
- E1000_VMOLR_ROMPE
- E1000_VMOLR_ROPE
- E1000_VMOLR_RSSE
- E1000_VMOLR_STRCRC
- E1000_VMOLR_STRVLAN
- E1000_VMVIR
- E1000_VMVIR_VLANA_DEFAULT
- E1000_VMVIR_VLANA_NEVER
- E1000_VT_CTL
- E1000_VT_CTL_DEFAULT_POOL_MASK
- E1000_VT_CTL_DEFAULT_POOL_SHIFT
- E1000_VT_CTL_DISABLE_DEF_POOL
- E1000_VT_CTL_IGNORE_MAC
- E1000_VT_CTL_VM_REPL_EN
- E1000_VT_MSGINFO_MASK
- E1000_VT_MSGINFO_SHIFT
- E1000_VT_MSGTYPE_ACK
- E1000_VT_MSGTYPE_CTS
- E1000_VT_MSGTYPE_NACK
- E1000_WAKEUP_IP_ADDRESS_COUNT_MAX
- E1000_WRITE_FLUSH
- E1000_WRITE_ICH_FLASH_REG
- E1000_WRITE_ICH_FLASH_REG16
- E1000_WRITE_REG_ARRAY
- E1000_WRITE_REG_ARRAY_BYTE
- E1000_WRITE_REG_ARRAY_DWORD
- E1000_WRITE_REG_ARRAY_WORD
- E1000_WRITE_REG_IO
- E1000_WUC
- E1000_WUC_APME
- E1000_WUC_APMPME
- E1000_WUC_PHY_WAKE
- E1000_WUC_PME_EN
- E1000_WUC_PME_STATUS
- E1000_WUC_SPM
- E1000_WUFC
- E1000_WUFC_ALL_FILTERS
- E1000_WUFC_ARP
- E1000_WUFC_BC
- E1000_WUFC_EX
- E1000_WUFC_FLX0
- E1000_WUFC_FLX1
- E1000_WUFC_FLX2
- E1000_WUFC_FLX3
- E1000_WUFC_FLX_FILTERS
- E1000_WUFC_FLX_OFFSET
- E1000_WUFC_IGNORE_TCO
- E1000_WUFC_IPV4
- E1000_WUFC_IPV6
- E1000_WUFC_LNKC
- E1000_WUFC_MAG
- E1000_WUFC_MC
- E1000_WUPL
- E1000_WUPL_LENGTH_MASK
- E1000_WUPL_MASK
- E1000_WUPM
- E1000_WUPM_BYTES
- E1000_WUPM_REG
- E1000_WUS
- E1000_WUS_ARP
- E1000_WUS_ARPD
- E1000_WUS_BC
- E1000_WUS_EX
- E1000_WUS_FLX0
- E1000_WUS_FLX1
- E1000_WUS_FLX2
- E1000_WUS_FLX3
- E1000_WUS_FLX_FILTERS
- E1000_WUS_IPV4
- E1000_WUS_IPV6
- E1000_WUS_LNKC
- E1000_WUS_MAG
- E1000_WUS_MC
- E1000_WUS_NSD
- E1000_WVBR
- E1000_XOFFRXC
- E1000_XOFFTXC
- E1000_XONRXC
- E1000_XONTXC
- E100_82552_ANEG_NOW
- E100_82552_LED_OFF
- E100_82552_LED_ON
- E100_82552_LED_OVERRIDE
- E100_82552_REV_ANEG
- E100_82552_SMARTSPEED
- E100_EEPROM_MAGIC
- E100_MAX_MULTICAST_ADDRS
- E100_NAPI_WEIGHT
- E100_NET_STATS_LEN
- E100_PHY_REGS
- E100_STATS_LEN
- E100_TEST_LEN
- E100_WAIT_SCB_FAST
- E100_WAIT_SCB_TIMEOUT
- E100_WATCHDOG_PERIOD
- E11
- E1144CS021
- E1190CS021
- E12
- E13
- E14
- E15
- E16
- E17
- E18
- E18_1610_KBC3
- E19
- E19_1610_KBR4
- E19_1610_MPUIO15
- E1HOV_PRI_HASH_TYPE
- E1HVN_MAX
- E1H_FUNC_MAX
- E1H_MAX_MF_SB_COUNT
- E1SOURCE
- E1VN_MAX
- E1_7XX_KBR2
- E1_ADSLDIRECTIVE
- E1_BLOCK_INFO_SIZE
- E1_DET
- E1_FUNCTION_SUBTYPE
- E1_FUNCTION_TYPE
- E1_FUNC_MAX
- E1_GETSA1
- E1_GETSA2
- E1_GETSA3
- E1_GETSA4
- E1_HOSTTOMODEM
- E1_INTR_PKT_SIZE
- E1_KERNELREADY
- E1_MAKEFUNCTION
- E1_MAKESA
- E1_MEMACCESS
- E1_MODEMREADY
- E1_MODEMTOHOST
- E1_PREAMBLE
- E1_REPLYREAD
- E1_REPLYWRITE
- E1_REQUESTREAD
- E1_REQUESTWRITE
- E1_RISE
- E1_SA_CNTL
- E1_SA_DIAG
- E1_SA_INFO
- E1_SA_OPTN
- E1_SA_RATE
- E1_SA_STAT
- E2
- E20
- E200Z4
- E20_1610_KBR3
- E20_1610_MPUIO13
- E21
- E22
- E2200CS021
- E2271CS021
- E23
- E24
- E25
- E26
- E2BIG
- E2CFG_CLK_EXT
- E2CFG_ERASE
- E2CFG_READ
- E2CFG_ROM
- E2CFG_WRITE
- E2FSBLK
- E2MMX
- E2PROM_CSR
- E2PROM_CSR_CHIP_SELECT
- E2PROM_CSR_DATA_CLOCK
- E2PROM_CSR_DATA_IN
- E2PROM_CSR_DATA_OUT
- E2PROM_CSR_LOAD_STATUS
- E2PROM_CSR_RELOAD
- E2PROM_CSR_TYPE
- E2PROM_CSR_TYPE_93C46
- E2PROM_TYPE_8BIT
- E2P_11A_INT_VALUE1
- E2P_11A_INT_VALUE2
- E2P_11A_INT_VALUE3
- E2P_11A_INT_VALUE4
- E2P_36M_CAL_VALUE1
- E2P_36M_CAL_VALUE2
- E2P_36M_CAL_VALUE3
- E2P_36M_CAL_VALUE4
- E2P_48M_CAL_VALUE1
- E2P_48M_CAL_VALUE2
- E2P_48M_CAL_VALUE3
- E2P_48M_CAL_VALUE4
- E2P_48M_INT_VALUE1
- E2P_48M_INT_VALUE2
- E2P_48M_INT_VALUE3
- E2P_48M_INT_VALUE4
- E2P_54M_CAL_VALUE1
- E2P_54M_CAL_VALUE2
- E2P_54M_CAL_VALUE3
- E2P_54M_CAL_VALUE4
- E2P_54M_INT_VALUE1
- E2P_54M_INT_VALUE2
- E2P_54M_INT_VALUE3
- E2P_54M_INT_VALUE4
- E2P_ALLOWED_CHANNEL
- E2P_BOOT_CODE_LEN
- E2P_BOOT_CODE_OFFSET
- E2P_CHANNEL_COUNT
- E2P_CMD
- E2P_CMD_ADDR
- E2P_CMD_ADDR_
- E2P_CMD_BUSY
- E2P_CMD_BUSY_
- E2P_CMD_EPC_ADDR_
- E2P_CMD_EPC_ADDR_MASK_
- E2P_CMD_EPC_BUSY_
- E2P_CMD_EPC_CMD_
- E2P_CMD_EPC_CMD_ERAL_
- E2P_CMD_EPC_CMD_ERASE_
- E2P_CMD_EPC_CMD_EWDS_
- E2P_CMD_EPC_CMD_EWEN_
- E2P_CMD_EPC_CMD_MASK_
- E2P_CMD_EPC_CMD_READ_
- E2P_CMD_EPC_CMD_RELOAD_
- E2P_CMD_EPC_CMD_WRAL_
- E2P_CMD_EPC_CMD_WRITE_
- E2P_CMD_EPC_DL_
- E2P_CMD_EPC_TIMEOUT_
- E2P_CMD_ERAL
- E2P_CMD_ERAL_
- E2P_CMD_ERASE
- E2P_CMD_ERASE_
- E2P_CMD_EWDS
- E2P_CMD_EWDS_
- E2P_CMD_EWEN
- E2P_CMD_EWEN_
- E2P_CMD_LOADED
- E2P_CMD_LOADED_
- E2P_CMD_MAC_ADDR_LOADED_
- E2P_CMD_MASK
- E2P_CMD_MASK_
- E2P_CMD_READ
- E2P_CMD_READ_
- E2P_CMD_RELOAD
- E2P_CMD_RELOAD_
- E2P_CMD_TIMEOUT
- E2P_CMD_TIMEOUT_
- E2P_CMD_WRAL
- E2P_CMD_WRAL_
- E2P_CMD_WRITE
- E2P_CMD_WRITE_
- E2P_DATA
- E2P_DATA_EEPROM_DATA_
- E2P_DATA_EEPROM_DATA_MASK_
- E2P_DATA_LEN
- E2P_DATA_MASK_
- E2P_DATA_OFFSET
- E2P_DEVICE_VER
- E2P_INTR_VECT_LEN
- E2P_LEN
- E2P_LOAD_CODE_LEN
- E2P_LOAD_VECT_LEN
- E2P_MAC_ADDR_P1
- E2P_MAC_ADDR_P2
- E2P_PHY_REG
- E2P_POD
- E2P_PWR_CAL_VALUE1
- E2P_PWR_CAL_VALUE2
- E2P_PWR_CAL_VALUE3
- E2P_PWR_CAL_VALUE4
- E2P_PWR_INT_GUARD
- E2P_PWR_INT_VALUE1
- E2P_PWR_INT_VALUE2
- E2P_PWR_INT_VALUE3
- E2P_PWR_INT_VALUE4
- E2P_START
- E2P_SUBID
- E2SINK
- E2SINK_MAX
- E2_7XX_KBR0
- E2_DEFAULT_PHY_DEV_ADDR
- E2_DET
- E2_FUNC_MAX
- E2_INTEG_DATA_COS_TX
- E2_INTEG_DATA_COS_TX_SHIFT
- E2_INTEG_DATA_DPMTESTRELEASEDQ
- E2_INTEG_DATA_DPMTESTRELEASEDQ_SHIFT
- E2_INTEG_DATA_LB_TX
- E2_INTEG_DATA_LB_TX_SHIFT
- E2_INTEG_DATA_OPPORTUNISTICQM
- E2_INTEG_DATA_OPPORTUNISTICQM_SHIFT
- E2_INTEG_DATA_RESERVED
- E2_INTEG_DATA_RESERVED_SHIFT
- E2_INTEG_DATA_TESTING_EN
- E2_INTEG_DATA_TESTING_EN_SHIFT
- E2_RISE
- E2_VF_MAX
- E3
- E3250_CPU_DIV0
- E3250_CPU_DIV1
- E3G_11KHZ
- E3G_16KHZ
- E3G_22KHZ
- E3G_32KHZ
- E3G_44KHZ
- E3G_48KHZ
- E3G_88KHZ
- E3G_8KHZ
- E3G_96KHZ
- E3G_ADAT_CLOCK
- E3G_ADAT_MODE
- E3G_ASIC_NOT_LOADED
- E3G_BOX_TYPE_MASK
- E3G_CLOCK_CLEAR_MASK
- E3G_CLOCK_DETECT_BIT_ADAT
- E3G_CLOCK_DETECT_BIT_SPDIF
- E3G_CLOCK_DETECT_BIT_SPDIF48
- E3G_CLOCK_DETECT_BIT_SPDIF96
- E3G_CLOCK_DETECT_BIT_WORD
- E3G_CLOCK_DETECT_BIT_WORD48
- E3G_CLOCK_DETECT_BIT_WORD96
- E3G_CONTINUOUS_CLOCK
- E3G_CONVERTER_ENABLE
- E3G_DIGITAL_MODE_CLEAR_MASK
- E3G_DOUBLE_SPEED_MODE
- E3G_FREQ_REG_DEFAULT
- E3G_FREQ_REG_MAX
- E3G_GINA3G_BOX_TYPE
- E3G_LAYLA3G_BOX_TYPE
- E3G_MAGIC_NUMBER
- E3G_MAX_OUTPUTS
- E3G_PHANTOM_POWER
- E3G_SPDIF_24_BIT
- E3G_SPDIF_CLOCK
- E3G_SPDIF_COPY_PERMIT
- E3G_SPDIF_FORMAT_CLEAR_MASK
- E3G_SPDIF_NOT_AUDIO
- E3G_SPDIF_OPTICAL_MODE
- E3G_SPDIF_PRO_MODE
- E3G_SPDIF_SAMPLE_RATE0
- E3G_SPDIF_SAMPLE_RATE1
- E3G_SPDIF_TWO_CHANNEL
- E3G_WORD_CLOCK
- E3_7XX_KBC4
- E3_DET
- E3_RISE
- E4
- E4000_H
- E4000_PRIV_H
- E4210_CPU_DIV0
- E4210_CPU_DIV1
- E4210_DIV0_ATB_MASK
- E4210_DIV0_ATB_SHIFT
- E4210_DIV0_RATIO0_MASK
- E4210_DIV1_COPY_MASK
- E4210_DIV1_HPM_MASK
- E4210_DIV_CPU0
- E4210_DIV_CPU1
- E4210_DIV_LCD1
- E4210_DIV_STAT_CPU0
- E4210_DIV_STAT_CPU1
- E4210_GATE_IP_IMAGE
- E4210_GATE_IP_LCD1
- E4210_GATE_IP_PERIR
- E4210_MPLL_CON0
- E4210_MPLL_LOCK
- E4210_MUX_HPM_MASK
- E4210_SRC_CPU
- E4210_SRC_IMAGE
- E4210_SRC_LCD1
- E4210_SRC_MASK_LCD1
- E4210_STAT_CPU
- E4412_CPU_DIV1
- E4X12_DIV_CAM1
- E4X12_DIV_ISP
- E4X12_DIV_ISP0
- E4X12_DIV_ISP1
- E4X12_GATE_BUS_FSYS1
- E4X12_GATE_IP_IMAGE
- E4X12_GATE_IP_ISP
- E4X12_GATE_IP_MAUDIO
- E4X12_GATE_IP_PERIR
- E4X12_GATE_ISP0
- E4X12_GATE_ISP1
- E4X12_MPLL_CON0
- E4X12_MPLL_LOCK
- E4X12_PWR_CTRL2
- E4X12_SRC_CAM1
- E4X12_SRC_ISP
- E4X12_SRC_MASK_ISP
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED1_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED1_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED2_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED2_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED3_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED3_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED4_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED4_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED5_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED5_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED6_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED6_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED7_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED7_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED8_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED8_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED9_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_A0_RESERVED9_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_BIT11_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_BIT11_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF0EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF0EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF0_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF0_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF10EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF10EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF10_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF10_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF11EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF11EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF11_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF11_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF12EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF12EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF12_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF12_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF13EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF13EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF13_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF13_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF14EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF14EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF14_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF14_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF15EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF15EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF15_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF15_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF1EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF1EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF1_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF1_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF2EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF2EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF2_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF2_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF3EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF3EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF3_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF3_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF4EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF4EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF4_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF4_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF5EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF5EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF5_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF5_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF6EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF6EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF6_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF6_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF7EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF7EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF7_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF7_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF8EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF8EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF8_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF8_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF9EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF9EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF9_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_CF9_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_DQ_CF_ACTIVE_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_DQ_CF_ACTIVE_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_DQ_CF_EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_DQ_CF_EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_DQ_CF_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_DQ_CF_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_E5_RESERVED2_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_E5_RESERVED2_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_E5_RESERVED3_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_E5_RESERVED3_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EDPM_INBAND_PROP_HDR_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EDPM_INBAND_PROP_HDR_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EDPM_SEND_EXT_TUNNEL_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EDPM_SEND_EXT_TUNNEL_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EDPM_SEND_RAW_L3L4_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EDPM_SEND_RAW_L3L4_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EDPM_USE_EXT_HDR_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EDPM_USE_EXT_HDR_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EXIST_IN_QM0_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EXIST_IN_QM0_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EXIST_IN_QM3_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_EXIST_IN_QM3_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_FLUSH_Q0_EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_FLUSH_Q0_EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_FLUSH_Q0_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_FLUSH_Q0_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_GO_TO_BD_CONS_CF_EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_GO_TO_BD_CONS_CF_EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_GO_TO_BD_CONS_CF_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_GO_TO_BD_CONS_CF_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_L2_EDPM_ENABLE_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_L2_EDPM_ENABLE_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_MULTI_UNICAST_CF_EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_MULTI_UNICAST_CF_EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_MULTI_UNICAST_CF_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_MULTI_UNICAST_CF_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED10_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED10_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED11_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED11_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED12_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED12_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED13_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED13_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED14_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED14_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED15_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED15_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED1_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED1_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED2_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED2_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED3_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED3_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED4_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED4_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED5_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED5_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED6_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED6_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED7_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED7_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED8_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED8_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED9_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RESERVED9_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_ROCE_EDPM_ENABLE_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_ROCE_EDPM_ENABLE_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE10EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE10EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE11EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE11EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE14EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE14EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE15EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE15EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE16EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE16EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE17EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE17EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE18EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE18EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE19EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE19EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE5EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE5EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE6EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE6EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE7EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE7EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE9EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_RULE9EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_SLOW_PATH_EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_SLOW_PATH_EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_SLOW_PATH_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_SLOW_PATH_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TERMINATE_CF_EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TERMINATE_CF_EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TERMINATE_CF_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TERMINATE_CF_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TPH_ENABLE_EN_RESERVED_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TPH_ENABLE_EN_RESERVED_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TPH_ENABLE_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TPH_ENABLE_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TX_DEC_RULE_EN_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TX_DEC_RULE_EN_SHIFT
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TX_RULE_ACTIVE_MASK
- E4XSTORMETHCONNAGCTXDQEXTLDPART_TX_RULE_ACTIVE_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED1_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED1_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED2_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED2_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED3_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED3_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED4_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED4_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED5_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED5_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED6_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED6_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED7_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED7_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED8_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED8_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED9_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_A0_RESERVED9_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT10_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT10_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT11_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT11_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT12_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT12_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT17_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT17_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT1_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT1_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT2_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT2_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT4_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT4_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT5_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT5_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT6_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT6_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT7_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT7_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT8_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT8_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT9_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_BIT9_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF0EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF0EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF0_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF0_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF10EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF10EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF10_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF10_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF11EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF11EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF11_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF11_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF12EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF12EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF12_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF12_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF13EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF13EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF13_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF13_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF14EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF14EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF14_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF14_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF15EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF15EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF15_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF15_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF16EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF16EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF16_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF16_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF17EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF17EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF17_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF17_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF18EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF18EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF18_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF18_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF19EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF19EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF19_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF19_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF1EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF1EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF1_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF1_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF20EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF20EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF20_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF20_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF21EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF21EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF21_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF21_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF23EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF23EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF23_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF23_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF2EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF2EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF2_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF2_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF3EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF3EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF3_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF3_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF4EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF4EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF4_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF4_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF5EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF5EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF5_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF5_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF6EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF6EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF6_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF6_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF8EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF8EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF8_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF8_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF9EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF9EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF9_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_CF9_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_DPM_PORT_NUM_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_DPM_PORT_NUM_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_EXIST_IN_QM0_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_EXIST_IN_QM0_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_EXIST_IN_QM3_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_EXIST_IN_QM3_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_FLUSH_Q0_CF_EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_FLUSH_Q0_CF_EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_FLUSH_Q0_CF_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_FLUSH_Q0_CF_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_MIGRATION_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_MIGRATION_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_MSDM_FLUSH_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_MSDM_FLUSH_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_MSEM_FLUSH_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_MSEM_FLUSH_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RESERVED_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RESERVED_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_ROCE_EDPM_ENABLE_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_ROCE_EDPM_ENABLE_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE0EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE0EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE10EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE10EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE11EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE11EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE14EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE14EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE15EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE15EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE16EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE16EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE17EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE17EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE18EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE18EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE19EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE19EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE1EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE1EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE2EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE2EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE3EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE3EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE4EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE4EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE5EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE5EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE6EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE6EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE7EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE7EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE9EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_RULE9EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_SLOW_PATH_EN_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_SLOW_PATH_EN_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_SLOW_PATH_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_SLOW_PATH_SHIFT
- E4XSTORMROCECONNAGCTXDQEXTLDPART_YSTORM_FLUSH_MASK
- E4XSTORMROCECONNAGCTXDQEXTLDPART_YSTORM_FLUSH_SHIFT
- E4_7XX_KBC2
- E4_ADSLDIRECTIVE
- E4_BLOCK_INFO_SIZE
- E4_DET
- E4_FUNCTION_SIZE
- E4_FUNCTION_SUBTYPE
- E4_FUNCTION_TYPE
- E4_INTR_PKT_SIZE
- E4_IS_BOOT_PAGE
- E4_KERNELREADY
- E4_L1_STRING_HEADER
- E4_MAKEFUNCTION
- E4_MAX_PAGE_NUMBER
- E4_MEMACCESS
- E4_MODEMREADY
- E4_MSTORM_CORE_CONN_AG_CTX_BIT0_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_BIT0_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_BIT1_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_BIT1_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_CF0EN_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_CF0EN_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_CF0_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_CF0_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_CF1EN_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_CF1_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_CF1_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_CF2EN_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_CF2_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_CF2_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_RULE0EN_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_RULE1EN_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_RULE2EN_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_RULE3EN_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_CORE_CONN_AG_CTX_RULE4EN_MASK
- E4_MSTORM_CORE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_BIT1_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_BIT1_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_CF0EN_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_CF0EN_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_CF0_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_CF0_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_CF1EN_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_CF1_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_CF1_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_CF2EN_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_CF2_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_CF2_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_RULE0EN_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_RULE1EN_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_RULE2EN_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_RULE3EN_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_ETH_CONN_AG_CTX_RULE4EN_MASK
- E4_MSTORM_ETH_CONN_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_BIT0_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_BIT0_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_BIT1_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_BIT1_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_CF0EN_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_CF0EN_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_CF0_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_CF0_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_CF1EN_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_CF1_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_CF1_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_CF2EN_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_CF2_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_CF2_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE0EN_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE1EN_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE2EN_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE3EN_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE4EN_MASK
- E4_MSTORM_FCOE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_BIT2_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_BIT2_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_BIT3_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_BIT3_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_CF1EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_CF1_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_CF1_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_CF2EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_CF2_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_CF2_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_CQE_PLACED_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_CQE_PLACED_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE0EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE1EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE2EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE3EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE4EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE6EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_RULE6EN_SHIFT
- E4_MSTORM_FCOE_TASK_AG_CTX_XFER_PLACEMENT_EN_MASK
- E4_MSTORM_FCOE_TASK_AG_CTX_XFER_PLACEMENT_EN_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_BIT0_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_BIT0_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_BIT1_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_BIT1_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF0EN_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF0EN_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF0_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF0_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF1EN_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF1_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF1_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF2EN_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF2_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_CF2_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE0EN_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE1EN_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE2EN_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE3EN_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE4EN_MASK
- E4_MSTORM_ISCSI_CONN_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_CF1_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_CF1_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_CF2EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_CF2_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_CF2_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_CONN_CLEAR_SQ_FLAG_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_CONN_CLEAR_SQ_FLAG_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE5EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_RULE6EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_EN_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_EN_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_FLAG_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_FLAG_SHIFT
- E4_MSTORM_ISCSI_TASK_AG_CTX_VALID_MASK
- E4_MSTORM_ISCSI_TASK_AG_CTX_VALID_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_BIT1_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_CF1_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_CF2_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_EN_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_EN_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_RCQ_CONS_EN_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_RCQ_CONS_EN_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK
- E4_MSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_BIT1_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_BIT1_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_BIT2_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_BIT2_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_CF0EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_CF0EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_CF0_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_CF0_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_CF1EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_CF1_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_CF1_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_CF2EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_CF2_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_CF2_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_CONNECTION_TYPE_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_CONNECTION_TYPE_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_DIF_FIRST_IO_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_DIF_FIRST_IO_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_EXIST_IN_QM0_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE0EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE1EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE2EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE3EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE4EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE5EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE5EN_SHIFT
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE6EN_MASK
- E4_MSTORM_RDMA_TASK_AG_CTX_RULE6EN_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_BIT0_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_BIT0_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_BIT1_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_BIT1_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_CF0EN_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_CF0EN_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_CF0_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_CF0_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_CF1EN_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_CF1_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_CF1_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_CF2EN_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_CF2_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_CF2_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE0EN_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE1EN_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE2EN_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE3EN_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE4EN_MASK
- E4_MSTORM_ROCE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_BIT0_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_BIT0_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_BIT1_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_BIT1_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF0EN_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF0EN_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF0_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF0_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF1EN_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF1_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF1_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF2EN_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF2_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_CF2_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_MASK
- E4_MSTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_BIT0_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_BIT0_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_BIT1_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_BIT1_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF0_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF0_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF1EN_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF1EN_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF1_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF1_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF2EN_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF2EN_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF2_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_CF2_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_MASK
- E4_MSTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_SHIFT
- E4_NO_SWAPPAGE_HEADERS
- E4_PAGE_BYTES
- E4_REPLYREAD
- E4_REPLYWRITE
- E4_REQUESTREAD
- E4_REQUESTWRITE
- E4_RISE
- E4_SA_CNFG
- E4_SA_CNTL
- E4_SA_DIAG
- E4_SA_INFO
- E4_SA_OPTN
- E4_SA_RATE
- E4_SA_STAT
- E4_SA_TEST
- E4_TSTORM_CORE_CONN_AG_CTX_BIT0_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_BIT0_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_BIT1_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_BIT1_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_BIT2_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_BIT2_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_BIT3_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_BIT3_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_BIT4_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_BIT4_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_BIT5_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_BIT5_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF0EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF0EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF0_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF0_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF10EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF10EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF10_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF10_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF1EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF1EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF1_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF1_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF2EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF2EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF2_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF2_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF3EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF3EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF3_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF3_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF4EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF4EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF4_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF4_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF5EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF5EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF5_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF5_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF6EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF6_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF6_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF7EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF7_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF7_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF8EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF8EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF8_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF8_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF9EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF9EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_CF9_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_CF9_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE0EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE1EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE2EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE3EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE4EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE5EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE6EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE6EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE7EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE7EN_SHIFT
- E4_TSTORM_CORE_CONN_AG_CTX_RULE8EN_MASK
- E4_TSTORM_CORE_CONN_AG_CTX_RULE8EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_BIT0_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_BIT0_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_BIT1_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_BIT1_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_BIT2_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_BIT2_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_BIT3_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_BIT3_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_BIT4_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_BIT4_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_BIT5_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_BIT5_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF0EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF0EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF0_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF0_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF10EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF10EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF10_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF10_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF1EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF1EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF1_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF1_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF2EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF2EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF2_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF2_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF3EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF3EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF3_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF3_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF4EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF4EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF4_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF4_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF5EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF5EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF5_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF5_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF6EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF6_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF6_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF7EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF7_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF7_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF8EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF8EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF8_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF8_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF9EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF9EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_CF9_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_CF9_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RULE0EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RULE1EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RULE2EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RULE3EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RULE4EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RULE5EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RULE7EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RULE7EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RULE8EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RULE8EN_SHIFT
- E4_TSTORM_ETH_CONN_AG_CTX_RX_BD_EN_MASK
- E4_TSTORM_ETH_CONN_AG_CTX_RX_BD_EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT1_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT1_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT2_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT2_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT3_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT3_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT4_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT4_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT5_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_BIT5_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF10EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF10EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF10_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF10_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF2EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF2EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF2_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF2_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF4EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF4EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF4_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF4_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF5EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF5EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF5_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF5_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF6EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF6_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF6_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF7EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF7_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF7_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF8EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF8EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF8_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF8_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF9EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF9EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_CF9_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_CF9_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_DUMMY_TIMER_CF_EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_DUMMY_TIMER_CF_EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_DUMMY_TIMER_CF_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_DUMMY_TIMER_CF_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_FLUSH_Q0_CF_EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_FLUSH_Q0_CF_EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_FLUSH_Q0_CF_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_FLUSH_Q0_CF_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE0EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE1EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE2EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE3EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE4EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE5EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE6EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE6EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE7EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE7EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE8EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_RULE8EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_TIMER_STOP_ALL_CF_EN_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_TIMER_STOP_ALL_CF_EN_SHIFT
- E4_TSTORM_FCOE_CONN_AG_CTX_TIMER_STOP_ALL_CF_MASK
- E4_TSTORM_FCOE_CONN_AG_CTX_TIMER_STOP_ALL_CF_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_BIT1_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_BIT1_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_BIT5_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_BIT5_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_CF2EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_CF2EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_CF2_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_CF2_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_ED_TOV_CF_EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_ED_TOV_CF_EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_ED_TOV_CF_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_ED_TOV_CF_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_FALSE_RR_TOV_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_FALSE_RR_TOV_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_REC_RR_TOV_CF_EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_REC_RR_TOV_CF_EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_REC_RR_TOV_CF_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_REC_RR_TOV_CF_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE0EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE1EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE2EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE3EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE4EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE5EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_SEQ_INIT_CF_EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_SEQ_INIT_CF_EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_SEQ_INIT_CF_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_SEQ_INIT_CF_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_SEQ_RECOVERY_CF_EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_SEQ_RECOVERY_CF_EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_SEQ_RECOVERY_CF_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_SEQ_RECOVERY_CF_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_TIMER_STOP_ALL_EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_TIMER_STOP_ALL_EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_TIMER_STOP_ALL_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_TIMER_STOP_ALL_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_UNSOL_COMP_CF_EN_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_UNSOL_COMP_CF_EN_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_UNSOL_COMP_CF_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_UNSOL_COMP_CF_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_VALID_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_VALID_SHIFT
- E4_TSTORM_FCOE_TASK_AG_CTX_WAIT_ABTS_RSP_F_MASK
- E4_TSTORM_FCOE_TASK_AG_CTX_WAIT_ABTS_RSP_F_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT1_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT1_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT2_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT2_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT3_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT3_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT4_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT4_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT5_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_BIT5_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF0EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF0EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF0_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF0_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF10EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF10EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF10_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF10_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF4EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF4EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF4_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF4_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF5EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF5EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF5_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF5_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF6EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF6_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF6_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF7EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF7_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF7_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF8EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF8EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF8_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_CF8_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_FLUSH_Q0_EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_FLUSH_Q0_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_FLUSH_Q0_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_M2T_FLUSH_CF_EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_M2T_FLUSH_CF_EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_M2T_FLUSH_CF_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_M2T_FLUSH_CF_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_P2T_FLUSH_CF_EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_P2T_FLUSH_CF_EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_P2T_FLUSH_CF_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_P2T_FLUSH_CF_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE0EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE1EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE2EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE3EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE4EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE5EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE6EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE6EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE7EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE7EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE8EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_RULE8EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_TIMER_STOP_ALL_EN_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_TIMER_STOP_ALL_EN_SHIFT
- E4_TSTORM_ISCSI_CONN_AG_CTX_TIMER_STOP_ALL_MASK
- E4_TSTORM_ISCSI_CONN_AG_CTX_TIMER_STOP_ALL_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT0_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT0_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT1_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT2_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT2_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT3_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT3_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT4_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT4_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT5_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_BIT5_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF0EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF0EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF0_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF0_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF1EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF1_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF1_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF2EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF2EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF2_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF2_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF3EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF3EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF3_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF3_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF4EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF4EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF4_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF4_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF5EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF5EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF5_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF5_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF6EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF6_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF6_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF7EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF7_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_CF7_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK
- E4_TSTORM_ISCSI_TASK_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_BIT1_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_BIT2_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_BIT2_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_BIT4_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_BIT4_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CACHED_ORQ_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CACHED_ORQ_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF0_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF4EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF4EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF4_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF4_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF5EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF5EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF5_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF5_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF6EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF6_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF6_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF7EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF7_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF7_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF8EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF8EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_CF8_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_CF8_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_AND_TCP_HANDSHAKE_COMPLETE_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_AND_TCP_HANDSHAKE_COMPLETE_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_AND_TCP_HANDSHAKE_COMPL_EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_AND_TCP_HANDSHAKE_COMPL_EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_MPA_TIMEOUT_CF_EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_MPA_TIMEOUT_CF_EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_MPA_TIMEOUT_CF_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_MPA_TIMEOUT_CF_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_MSTORM_FLUSH_OR_TERMINATE_SENT_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_MSTORM_FLUSH_OR_TERMINATE_SENT_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE8EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_RULE8EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_SND_SQ_CONS_RULE_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_SND_SQ_CONS_RULE_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_SHIFT
- E4_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_MASK
- E4_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT0_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT0_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT1_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT1_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT2_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT2_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT3_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT3_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT4_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT4_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT5_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_BIT5_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF0EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF0EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF0_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF0_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF1EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF1EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF1_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF1_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF2EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF2EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF2_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF2_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF3EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF3EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF3_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF3_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF4EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF4EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF4_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF4_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF5EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF5EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF5_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF5_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF6EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF6_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF6_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF7EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_CF7_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_CF7_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_NIBBLE0_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_NIBBLE0_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE0EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE1EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE2EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE3EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE4EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE5EN_MASK
- E4_TSTORM_RDMA_TASK_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT1_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT1_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT2_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT2_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT3_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT3_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT4_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT4_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT5_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_BIT5_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF0EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF0EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF0_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF0_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF10EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF10EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF10_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF10_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF2EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF2EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF2_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF2_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF5EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF5EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF5_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF5_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF6EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF6_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF6_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF7EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF7_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF7_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF8EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF8EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF8_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF8_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF9EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF9EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_CF9_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_CF9_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_FLUSH_Q0_CF_EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_FLUSH_Q0_CF_EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_FLUSH_Q0_CF_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_FLUSH_Q0_CF_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_MSTORM_FLUSH_CF_EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_MSTORM_FLUSH_CF_EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_MSTORM_FLUSH_CF_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_MSTORM_FLUSH_CF_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE0EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE1EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE2EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE3EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE4EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE5EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE6EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE6EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE7EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE7EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE8EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_RULE8EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_TIMER_STOP_ALL_CF_EN_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_TIMER_STOP_ALL_CF_EN_SHIFT
- E4_TSTORM_ROCE_CONN_AG_CTX_TIMER_STOP_ALL_CF_MASK
- E4_TSTORM_ROCE_CONN_AG_CTX_TIMER_STOP_ALL_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_BIT3_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_BIT3_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_CACHED_ORQ_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_CACHED_ORQ_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_ERROR_SCAN_COMPLETED_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_ERROR_SCAN_COMPLETED_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_ERROR_SCAN_COMPLETED_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_ERROR_SCAN_COMPLETED_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_Q0_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_Q0_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_Q0_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_Q0_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_SQ_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_SQ_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_SQ_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_SQ_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FORCE_COMP_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FORCE_COMP_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FORCE_COMP_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_FORCE_COMP_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_MSTORM_FLUSH_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_MSTORM_FLUSH_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_MSTORM_FLUSH_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_MSTORM_FLUSH_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_MSTORM_FLUSH_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_MSTORM_FLUSH_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE5EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE7EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE7EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE8EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RULE8EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RXMIT_DONE_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RXMIT_DONE_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RXMIT_DONE_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RXMIT_DONE_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RX_ERROR_OCCURRED_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_RX_ERROR_OCCURRED_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SET_TIMER_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SET_TIMER_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SET_TIMER_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SET_TIMER_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SND_SQ_CONS_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SND_SQ_CONS_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SQ_DRAIN_COMPLETED_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SQ_DRAIN_COMPLETED_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SQ_DRAIN_COMPLETED_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_SQ_DRAIN_COMPLETED_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TIMER_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TIMER_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TIMER_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TIMER_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TIMER_STOP_ALL_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TIMER_STOP_ALL_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TIMER_STOP_ALL_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TIMER_STOP_ALL_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TX_ASYNC_ERROR_CF_EN_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TX_ASYNC_ERROR_CF_EN_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TX_ASYNC_ERROR_CF_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TX_ASYNC_ERROR_CF_SHIFT
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TX_CQE_ERROR_OCCURRED_MASK
- E4_TSTORM_ROCE_REQ_CONN_AG_CTX_TX_CQE_ERROR_OCCURRED_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_BIT2_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_BIT2_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_BIT3_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_BIT3_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_BIT5_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_BIT5_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF0_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF0_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF10EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF10EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF10_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF10_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF3EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF3EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF3_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF3_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF6EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF6EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF6_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF6_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF7EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF7EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF7_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF7_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF8EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF8EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF8_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF8_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF9EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF9EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF9_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_CF9_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_FLUSH_Q0_CF_EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_FLUSH_Q0_CF_EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_FLUSH_Q0_CF_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_FLUSH_Q0_CF_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_MSTORM_FLUSH_CF_EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_MSTORM_FLUSH_CF_EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_MSTORM_FLUSH_CF_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_MSTORM_FLUSH_CF_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_MSTORM_FLUSH_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_MSTORM_FLUSH_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RQ_RULE_EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RQ_RULE_EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE5EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE5EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE7EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE7EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE8EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RULE8EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_CF_EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_CF_EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_CF_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_CF_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_NOTIFY_REQUESTER_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_NOTIFY_REQUESTER_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_TX_ERROR_CF_EN_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_TX_ERROR_CF_EN_SHIFT
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_TX_ERROR_CF_MASK
- E4_TSTORM_ROCE_RESP_CONN_AG_CTX_TX_ERROR_CF_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_BIT0_MASK
- E4_USTORM_CORE_CONN_AG_CTX_BIT0_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_BIT1_MASK
- E4_USTORM_CORE_CONN_AG_CTX_BIT1_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF0EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF0EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF0_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF0_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF1EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF1EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF1_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF1_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF2EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF2EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF2_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF2_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF3EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF3EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF3_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF3_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF4EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF4EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF4_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF4_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF5EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF5EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF5_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF5_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF6EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF6EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_CF6_MASK
- E4_USTORM_CORE_CONN_AG_CTX_CF6_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE0EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE1EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE2EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE3EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE4EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE5EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE6EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE7EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE7EN_SHIFT
- E4_USTORM_CORE_CONN_AG_CTX_RULE8EN_MASK
- E4_USTORM_CORE_CONN_AG_CTX_RULE8EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_BIT0_MASK
- E4_USTORM_ETH_CONN_AG_CTX_BIT0_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_BIT1_MASK
- E4_USTORM_ETH_CONN_AG_CTX_BIT1_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_CF2EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_CF2EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_CF2_MASK
- E4_USTORM_ETH_CONN_AG_CTX_CF2_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_CF3EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_CF3EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_CF3_MASK
- E4_USTORM_ETH_CONN_AG_CTX_CF3_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE0EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE0EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE1EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE2EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE3EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE4EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE5EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE6EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE7EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE7EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RULE8EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RULE8EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RX_ARM_CF_EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RX_ARM_CF_EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RX_ARM_CF_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RX_ARM_CF_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RX_PMD_TERMINATE_CF_EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RX_PMD_TERMINATE_CF_EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_RX_PMD_TERMINATE_CF_MASK
- E4_USTORM_ETH_CONN_AG_CTX_RX_PMD_TERMINATE_CF_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_TX_ARM_CF_EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_TX_ARM_CF_EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_TX_ARM_CF_MASK
- E4_USTORM_ETH_CONN_AG_CTX_TX_ARM_CF_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_TX_BD_CONS_UPD_CF_EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_TX_BD_CONS_UPD_CF_EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_TX_BD_CONS_UPD_CF_MASK
- E4_USTORM_ETH_CONN_AG_CTX_TX_BD_CONS_UPD_CF_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_TX_PMD_TERMINATE_CF_EN_MASK
- E4_USTORM_ETH_CONN_AG_CTX_TX_PMD_TERMINATE_CF_EN_SHIFT
- E4_USTORM_ETH_CONN_AG_CTX_TX_PMD_TERMINATE_CF_MASK
- E4_USTORM_ETH_CONN_AG_CTX_TX_PMD_TERMINATE_CF_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_BIT0_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_BIT0_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_BIT1_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_BIT1_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF0EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF0EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF0_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF0_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF1EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF1EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF1_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF1_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF2EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF2EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF2_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF2_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF3EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF3EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF3_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF3_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF4EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF4EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF4_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF4_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF5EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF5EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF5_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF5_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF6EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF6EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_CF6_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_CF6_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE0EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE1EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE2EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE3EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE4EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE5EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE6EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE7EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE7EN_SHIFT
- E4_USTORM_FCOE_CONN_AG_CTX_RULE8EN_MASK
- E4_USTORM_FCOE_CONN_AG_CTX_RULE8EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_BIT1_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_BIT1_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CF0EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CF0EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CF0_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CF0_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CF1EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CF1EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CF1_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CF1_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CF2EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CF2EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CF2_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CF2_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CF3EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CF3EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CF3_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CF3_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_CF_EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_CF_EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_CF_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_CF_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_TYPE_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_TYPE_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_RULE0EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_RULE0EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_RULE1EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_RULE2EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_RULE3EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_RULE4EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_RULE5EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_FCOE_TASK_AG_CTX_RULE6EN_MASK
- E4_USTORM_FCOE_TASK_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_BIT0_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_BIT0_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_BIT1_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_BIT1_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF0EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF0EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF0_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF0_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF1EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF1EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF1_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF1_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF2EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF2EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF2_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF2_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF3EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF3EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF3_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF3_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF4EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF4EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF4_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF4_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF5EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF5EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF5_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF5_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF6EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF6EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_CF6_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_CF6_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE0EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE0EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE1EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE2EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE3EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE4EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE5EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE6EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE7EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE7EN_SHIFT
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE8EN_MASK
- E4_USTORM_ISCSI_CONN_AG_CTX_RULE8EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_CF3EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_CF3EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_CF3_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_CF3_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_CMP_CONT_RCV_EXP_EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_CMP_CONT_RCV_EXP_EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_CMP_DATA_TOTAL_EXP_EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_CMP_DATA_TOTAL_EXP_EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_CONN_CLEAR_SQ_FLAG_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_CONN_CLEAR_SQ_FLAG_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_TYPE_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_TYPE_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_DISABLE_DATA_ACKED_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_DISABLE_DATA_ACKED_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_RESERVED1_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_RESERVED1_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK
- E4_USTORM_ISCSI_TASK_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_BIT1_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF0EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF0_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF0_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF1EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF1_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF1_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF2EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF2_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF2_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF3EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF3EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF3_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF3_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF6EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CF6_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CF6_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_SE_EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_CQ_SE_EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_RULE6EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT
- E4_USTORM_IWARP_CONN_AG_CTX_RULE8EN_MASK
- E4_USTORM_IWARP_CONN_AG_CTX_RULE8EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CF1EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CF1EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CF1_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CF1_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CF2EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CF2EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CF2_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CF2_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CF3EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CF3EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CF3_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CF3_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CF6EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CF6EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CF6_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CF6_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_ARM_CF_EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_ARM_CF_EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_ARM_CF_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_ARM_CF_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_ARM_SE_CF_EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_ARM_SE_CF_EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_ARM_SE_CF_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_ARM_SE_CF_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_SE_EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_CQ_SE_EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_DIF_ERROR_REPORTED_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_DIF_ERROR_REPORTED_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_FLUSH_Q0_CF_EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_FLUSH_Q0_CF_EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_FLUSH_Q0_CF_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_FLUSH_Q0_CF_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_RULE2EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_RULE3EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_RULE4EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_RULE5EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_RULE6EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_RULE7EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_RULE7EN_SHIFT
- E4_USTORM_RDMA_CONN_AG_CTX_RULE8EN_MASK
- E4_USTORM_RDMA_CONN_AG_CTX_RULE8EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_CONNECTION_TYPE_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_CONNECTION_TYPE_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_BLOCK_SIZE_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_BLOCK_SIZE_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_ERROR_CF_EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_ERROR_CF_EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_ERROR_CF_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_ERROR_CF_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_ERROR_TYPE_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_ERROR_TYPE_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_RESULT_TOGGLE_BIT_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_RESULT_TOGGLE_BIT_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_RUNT_VALID_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_RUNT_VALID_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_TX_IO_FLG_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_TX_IO_FLG_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_WRITE_RESULT_CF_EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_WRITE_RESULT_CF_EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_WRITE_RESULT_CF_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_DIF_WRITE_RESULT_CF_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_EXIST_IN_QM0_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RESERVED2_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RESERVED2_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RESERVED3_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RESERVED3_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RESERVED4_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RESERVED4_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RULE0EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RULE0EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RULE1EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RULE2EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RULE3EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RULE4EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RULE5EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_RDMA_TASK_AG_CTX_RULE6EN_MASK
- E4_USTORM_RDMA_TASK_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_BIT0_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_BIT0_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_BIT1_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_BIT1_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF0EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF0EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF0_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF0_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF1EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF1EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF1_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF1_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF2EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF2EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF2_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF2_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF3EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF3EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF3_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF3_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF4EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF4EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF4_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF4_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF5EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF5EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF5_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF5_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF6EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF6EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF6_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_CF6_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE5EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE6EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE7EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE7EN_SHIFT
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE8EN_MASK
- E4_USTORM_ROCE_REQ_CONN_AG_CTX_RULE8EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_BIT0_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_BIT0_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_BIT1_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_BIT1_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF0_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF0_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF1EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF1EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF1_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF1_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF2EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF2EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF2_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF2_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF3EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF3EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF3_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF3_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF4EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF4EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF4_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF4_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF5EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF5EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF5_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF5_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF6EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF6EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF6_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_CF6_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE5EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE5EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE6EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE6EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE7EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE7EN_SHIFT
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE8EN_MASK
- E4_USTORM_ROCE_RESP_CONN_AG_CTX_RULE8EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED4_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED4_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED5_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED5_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED7_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED7_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT12_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT12_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT13_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT13_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT16_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT16_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT17_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT17_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT18_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT18_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT19_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT19_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT20_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT20_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_BIT21_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_BIT21_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF14EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF14EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF14_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF14_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF15EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF15EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF15_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF15_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF17EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF17EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF17_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF17_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF23EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF23EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF23_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF23_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF3EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF3EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF3_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF3_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF4EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF4EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF4_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF4_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF5EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF5EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF5_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF5_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF6EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF6EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF6_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF6_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF7EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF7EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF7_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF7_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF8EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF8EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF8_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF8_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF9EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF9EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CF9_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CF9_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CONSOLID_PROD_CF_EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CONSOLID_PROD_CF_EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_CONSOLID_PROD_CF_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_CONSOLID_PROD_CF_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_DQ_CF_ACTIVE_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_DQ_CF_ACTIVE_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_DQ_CF_EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_DQ_CF_EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_DQ_CF_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_DQ_CF_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_FLUSH_Q0_EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_FLUSH_Q0_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_FLUSH_Q0_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED10_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED10_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED11_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED11_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED12_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED12_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED13_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED13_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED14_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED14_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED15_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED15_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED1_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED1_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED2_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED2_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED3_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED3_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED4_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED4_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED5_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED5_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED6_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED6_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED7_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED7_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED8_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED8_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED9_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RESERVED9_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE10EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE10EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE14EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE14EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE16EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE16EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE17EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE17EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE18EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE18EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE19EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE19EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE7EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE7EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_RULE9EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_RULE9EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_TERMINATE_CF_EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_TERMINATE_CF_EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_TERMINATE_CF_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_TERMINATE_CF_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_TX_DEC_RULE_EN_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_TX_DEC_RULE_EN_SHIFT
- E4_XSTORM_CORE_CONN_AG_CTX_TX_RULE_ACTIVE_MASK
- E4_XSTORM_CORE_CONN_AG_CTX_TX_RULE_ACTIVE_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED4_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED4_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED5_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED5_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED7_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED7_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF14EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF14EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF14_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF14_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF15EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF15EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF15_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF15_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF3EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF3EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF3_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF3_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF4EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF4EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF4_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF4_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF5EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF5EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF5_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF5_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF6EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF6EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF6_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF6_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF7EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF7EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF7_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF7_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF8EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF8EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF8_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF8_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF9EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF9EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_CF9_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_CF9_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_DQ_CF_ACTIVE_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_DQ_CF_ACTIVE_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_DQ_CF_EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_DQ_CF_EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_DQ_CF_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_DQ_CF_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_E5_RESERVED2_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_E5_RESERVED2_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_E5_RESERVED3_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_E5_RESERVED3_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_EDPM_INBAND_PROP_HDR_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_EDPM_INBAND_PROP_HDR_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_EDPM_SEND_EXT_TUNNEL_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_EDPM_SEND_EXT_TUNNEL_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_EDPM_SEND_RAW_L3L4_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_EDPM_SEND_RAW_L3L4_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_EDPM_USE_EXT_HDR_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_EDPM_USE_EXT_HDR_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_FLUSH_Q0_EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_FLUSH_Q0_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_FLUSH_Q0_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_GO_TO_BD_CONS_CF_EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_GO_TO_BD_CONS_CF_EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_GO_TO_BD_CONS_CF_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_GO_TO_BD_CONS_CF_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_L2_EDPM_ENABLE_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_L2_EDPM_ENABLE_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_MULTI_UNICAST_CF_EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_MULTI_UNICAST_CF_EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_MULTI_UNICAST_CF_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_MULTI_UNICAST_CF_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED10_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED10_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED11_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED11_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED12_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED12_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED13_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED13_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED14_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED14_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED15_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED15_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED1_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED1_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED2_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED2_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED3_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED3_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED4_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED4_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED5_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED5_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED6_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED6_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED7_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED7_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED8_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED8_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED9_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RESERVED9_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_ROCE_EDPM_ENABLE_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_ROCE_EDPM_ENABLE_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE10EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE10EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE14EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE14EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE16EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE16EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE17EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE17EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE18EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE18EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE19EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE19EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE7EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE7EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_RULE9EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_RULE9EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_TERMINATE_CF_EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_TERMINATE_CF_EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_TERMINATE_CF_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_TERMINATE_CF_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_TPH_ENABLE_EN_RESERVED_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_TPH_ENABLE_EN_RESERVED_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_TPH_ENABLE_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_TPH_ENABLE_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_TX_DEC_RULE_EN_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_TX_DEC_RULE_EN_SHIFT
- E4_XSTORM_ETH_CONN_AG_CTX_TX_RULE_ACTIVE_MASK
- E4_XSTORM_ETH_CONN_AG_CTX_TX_RULE_ACTIVE_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED4_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED4_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED5_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED5_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED7_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED7_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF14EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF14EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF14_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF14_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF15EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF15EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF15_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF15_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF3EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF3EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF3_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF3_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF4EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF4EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF4_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF4_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF5EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF5EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF5_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF5_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF6EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF6EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF6_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF6_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF7EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF7EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF7_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF7_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF8EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF8EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF8_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF8_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF9EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF9EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF9_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_CF9_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_DQ_CF_ACTIVE_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_DQ_CF_ACTIVE_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_DQ_CF_EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_DQ_CF_EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_DQ_CF_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_DQ_CF_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_E5_RESERVED2_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_E5_RESERVED2_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_E5_RESERVED3_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_E5_RESERVED3_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EDPM_INBAND_PROP_HDR_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EDPM_INBAND_PROP_HDR_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EDPM_SEND_EXT_TUNNEL_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EDPM_SEND_EXT_TUNNEL_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EDPM_SEND_RAW_L3L4_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EDPM_SEND_RAW_L3L4_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EDPM_USE_EXT_HDR_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EDPM_USE_EXT_HDR_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_FLUSH_Q0_EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_FLUSH_Q0_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_FLUSH_Q0_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_GO_TO_BD_CONS_CF_EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_GO_TO_BD_CONS_CF_EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_GO_TO_BD_CONS_CF_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_GO_TO_BD_CONS_CF_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_L2_EDPM_ENABLE_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_L2_EDPM_ENABLE_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_MULTI_UNICAST_CF_EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_MULTI_UNICAST_CF_EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_MULTI_UNICAST_CF_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_MULTI_UNICAST_CF_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED10_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED10_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED11_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED11_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED12_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED12_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED13_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED13_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED14_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED14_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED15_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED15_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED1_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED1_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED2_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED2_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED3_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED3_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED4_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED4_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED5_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED5_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED6_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED6_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED7_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED7_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED8_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED8_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED9_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RESERVED9_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_ROCE_EDPM_ENABLE_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_ROCE_EDPM_ENABLE_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE10EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE10EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE14EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE14EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE16EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE16EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE17EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE17EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE18EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE18EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE19EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE19EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE7EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE7EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE9EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_RULE9EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TERMINATE_CF_EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TERMINATE_CF_EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TERMINATE_CF_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TERMINATE_CF_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TPH_ENABLE_EN_RESERVED_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TPH_ENABLE_EN_RESERVED_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TPH_ENABLE_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TPH_ENABLE_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TX_DEC_RULE_EN_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TX_DEC_RULE_EN_SHIFT
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TX_RULE_ACTIVE_MASK
- E4_XSTORM_ETH_HW_CONN_AG_CTX_TX_RULE_ACTIVE_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED4_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED4_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED5_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED5_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED7_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED7_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT12_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT12_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT13_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT13_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT14_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT14_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT15_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT15_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT16_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT16_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT17_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT17_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT18_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT18_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT19_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT19_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT20_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT20_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT21_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_BIT21_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF14EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF14EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF14_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF14_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF15EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF15EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF15_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF15_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF16EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF16EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF16_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF16_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF17EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF17EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF17_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF17_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF18EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF18EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF18_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF18_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF23EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF23EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF23_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF23_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF3EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF3EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF3_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF3_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF4EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF4EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF4_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF4_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF5EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF5EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF5_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF5_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF6EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF6EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF6_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF6_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF7EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF7EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF7_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF7_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF8EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF8EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF8_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF8_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF9EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF9EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_CF9_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_CF9_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_DQ_CF_EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_DQ_CF_EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_DQ_CF_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_DQ_CF_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_FLUSH_Q0_EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_FLUSH_Q0_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_FLUSH_Q0_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED10_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED10_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED11_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED11_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED12_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED12_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED13_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED13_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED14_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED14_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED15_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED15_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED16_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED16_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED1_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED1_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED2_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED2_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED3_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED3_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED4_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED4_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED5_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED5_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED6_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED6_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED7_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED7_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED8_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED8_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED9_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESERVED9_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RESPQ_DECISION_EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RESPQ_DECISION_EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE14EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE14EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE16EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE16EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE17EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE17EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE19EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE19EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE7EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_RULE7EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_SQ_DECISION_EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_SQ_DECISION_EN_SHIFT
- E4_XSTORM_FCOE_CONN_AG_CTX_XFERQ_DECISION_EN_MASK
- E4_XSTORM_FCOE_CONN_AG_CTX_XFERQ_DECISION_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED4_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED4_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED5_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED5_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED7_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED7_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT10_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT10_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT12_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT12_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT13_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT13_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT14_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT14_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT16_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT16_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT17_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT17_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT18_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT18_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT19_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT19_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT20_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT20_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT4_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT4_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT6_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT6_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT7_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT7_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT8_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT8_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT9_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_BIT9_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF14EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF14EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF14_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF14_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF16EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF16EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF16_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF16_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF17EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF17EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF17_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF17_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF18EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF18EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF18_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF18_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF4EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF4EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF4_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF4_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF5EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF5EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF5_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF5_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF6EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF6EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF6_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF6_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF7EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF7EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF7_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF7_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF8EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF8EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF8_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF8_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF9EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF9EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF9_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_CF9_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_DQ_FLUSH_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_DQ_FLUSH_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_DQ_FLUSH_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_DQ_FLUSH_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_DUMMY_READ_DONE_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_DUMMY_READ_DONE_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_EXIST_IN_QM1_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_EXIST_IN_QM1_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_HQ_DEC_RULE_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_HQ_DEC_RULE_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_MORE_TO_SEND_DEC_RULE_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_MORE_TO_SEND_DEC_RULE_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_MST_XCM_Q0_FLUSH_CF_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_MST_XCM_Q0_FLUSH_CF_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_MST_XCM_Q0_FLUSH_CF_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_MST_XCM_Q0_FLUSH_CF_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_PROC_ONLY_CLEANUP_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_PROC_ONLY_CLEANUP_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_PROC_ONLY_CLEANUP_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_PROC_ONLY_CLEANUP_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_R2TQ_DEC_RULE_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_R2TQ_DEC_RULE_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RESERVED1_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RESERVED1_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RESERVED2_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RESERVED2_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RESERVED3_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RESERVED3_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE0EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE0EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE14EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE14EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE16EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE16EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE17EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE17EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE3EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE3EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE7EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE7EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE9EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_RULE9EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_SQ_DEC_RULE_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_SQ_DEC_RULE_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_TIMER_STOP_ALL_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_TIMER_STOP_ALL_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_TIMER_STOP_ALL_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_TIMER_STOP_ALL_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_TX_BLOCKED_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_TX_BLOCKED_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_TX_TRUNCATE_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_TX_TRUNCATE_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_UPDATE_STATE_TO_BASE_CF_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_UPDATE_STATE_TO_BASE_CF_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_UPDATE_STATE_TO_BASE_CF_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_UPDATE_STATE_TO_BASE_CF_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_UST_XCM_Q1_FLUSH_CF_EN_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_UST_XCM_Q1_FLUSH_CF_EN_SHIFT
- E4_XSTORM_ISCSI_CONN_AG_CTX_UST_XCM_Q1_FLUSH_CF_MASK
- E4_XSTORM_ISCSI_CONN_AG_CTX_UST_XCM_Q1_FLUSH_CF_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT10_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT10_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT12_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT12_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT13_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT13_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT14_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT14_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT16_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT16_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT17_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT17_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT18_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT18_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT4_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT4_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT6_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT6_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT7_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT7_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT8_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT8_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT9_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_BIT9_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF15EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF15EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF15_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF15_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF17EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF17EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF17_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF17_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF18EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF18EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF18_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF18_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF4EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF4EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF4_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF4_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF5EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF5EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF5_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF5_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF6EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF6_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF6_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF7EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF7EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF7_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF7_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF8EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF8EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF8_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF8_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF9EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF9EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_CF9_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_CF9_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED1_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED1_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED2_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED2_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED3_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED3_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM1_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM1_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM2_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM2_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_HQ_NOT_FULL_RULE_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_HQ_NOT_FULL_RULE_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_IRQ_NOT_EMPTY_RULE_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_IRQ_NOT_EMPTY_RULE_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_MORE_TO_SEND_RULE_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_MORE_TO_SEND_RULE_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_ORQ_NOT_FULL_RULE_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_ORQ_NOT_FULL_RULE_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_ORQ_RD_FENCE_RULE_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_ORQ_RD_FENCE_RULE_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RESERVED2_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RESERVED2_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RESERVED3_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RESERVED3_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE16EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE16EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE17EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE17EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE21EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE21EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE9EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_RULE9EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_SEND_TERMINATE_CF_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_SEND_TERMINATE_CF_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_SEND_TERMINATE_CF_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_SEND_TERMINATE_CF_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FENCE_RULE_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FENCE_RULE_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_SQ_NOT_EMPTY_RULE_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_SQ_NOT_EMPTY_RULE_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_TX_BLOCKED_EN_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_TX_BLOCKED_EN_SHIFT
- E4_XSTORM_IWARP_CONN_AG_CTX_YSTORM_FLUSH_OR_REWIND_SND_MAX_MASK
- E4_XSTORM_IWARP_CONN_AG_CTX_YSTORM_FLUSH_OR_REWIND_SND_MAX_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED4_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED4_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED5_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED5_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED7_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED7_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT10_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT10_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT12_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT12_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT17_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT17_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT1_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT1_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT2_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT2_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT4_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT4_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT5_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT5_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT6_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT6_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT7_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT7_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT8_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT8_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT9_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_BIT9_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF14EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF14EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF14_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF14_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF15EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF15EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF15_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF15_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF16EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF16EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF16_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF16_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF17EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF17EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF17_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF17_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF18EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF18EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF18_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF18_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF19EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF19EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF19_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF19_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF20EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF20EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF20_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF20_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF21EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF21EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF21_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF21_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF23EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF23EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF23_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF23_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF3EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF3EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF3_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF3_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF4EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF4EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF4_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF4_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF5EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF5EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF5_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF5_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF6EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF6EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF6_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF6_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF8EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF8EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF8_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF8_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF9EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF9EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_CF9_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_CF9_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_DPM_PORT_NUM_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_DPM_PORT_NUM_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_FLUSH_Q0_CF_EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_FLUSH_Q0_CF_EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_FLUSH_Q0_CF_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_FLUSH_Q0_CF_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_MIGRATION_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_MIGRATION_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_MSDM_FLUSH_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_MSDM_FLUSH_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_MSEM_FLUSH_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_MSEM_FLUSH_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RESERVED_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RESERVED_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_ROCE_EDPM_ENABLE_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_ROCE_EDPM_ENABLE_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE0EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE10EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE10EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE14EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE14EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE16EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE16EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE17EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE17EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE18EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE18EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE19EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE19EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE1EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE2EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE3EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE4EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE7EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE7EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE9EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_RULE9EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_ROCE_CONN_AG_CTX_YSTORM_FLUSH_MASK
- E4_XSTORM_ROCE_CONN_AG_CTX_YSTORM_FLUSH_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED4_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED4_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED5_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED5_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED7_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED7_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT10_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT10_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT12_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT12_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT13_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT13_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT17_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_BIT17_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF15EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF15EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF15_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF15_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF16EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF16EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF16_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF16_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF17EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF17EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF17_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF17_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF18EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF18EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF18_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF18_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF19EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF19EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF19_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF19_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF20EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF20EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF20_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF20_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF21EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF21EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF21_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF21_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF23EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF23EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF23_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF23_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF3EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF3EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF3_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_CF3_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_DIF_ERROR_CF_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_DIF_ERROR_CF_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_DIF_ERROR_CF_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_DIF_ERROR_CF_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_DPM_PORT_NUM_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_DPM_PORT_NUM_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_E2E_CREDIT_RULE_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_E2E_CREDIT_RULE_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_ERROR_STATE_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_ERROR_STATE_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_Q0_CF_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_Q0_CF_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_Q0_CF_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_FLUSH_Q0_CF_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_FME_ENDED_CF_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_FME_ENDED_CF_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_FMR_ENDED_CF_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_FMR_ENDED_CF_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_INV_FENCE_RULE_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_INV_FENCE_RULE_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_MAX_ORD_RULE_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_MAX_ORD_RULE_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_MIGRATION_FLAG_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_MIGRATION_FLAG_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_ORQ_FENCE_RULE_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_ORQ_FENCE_RULE_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED1_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED1_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED2_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED2_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED3_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED3_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED4_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED4_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED5_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED5_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED6_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED6_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED7_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED7_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED8_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED8_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RESERVED_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_ROCE_EDPM_ENABLE_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_ROCE_EDPM_ENABLE_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE18EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE18EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE19EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE19EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE9EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RULE9EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RX_ERROR_CF_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RX_ERROR_CF_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RX_ERROR_CF_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_RX_ERROR_CF_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SCAN_SQ_FOR_COMP_CF_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SCAN_SQ_FOR_COMP_CF_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SCAN_SQ_FOR_COMP_CF_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SCAN_SQ_FOR_COMP_CF_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SND_RXMIT_CF_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SND_RXMIT_CF_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SND_RXMIT_CF_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SND_RXMIT_CF_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SQ_FLUSH_CF_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SQ_FLUSH_CF_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SQ_FLUSH_CF_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SQ_FLUSH_CF_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SQ_PROD_EN_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_SQ_PROD_EN_SHIFT
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_YSTORM_FLUSH_MASK
- E4_XSTORM_ROCE_REQ_CONN_AG_CTX_YSTORM_FLUSH_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED1_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED1_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED2_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED2_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED3_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED3_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED4_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED4_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED5_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED5_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED6_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED6_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED7_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED7_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED8_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED8_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED9_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_A0_RESERVED9_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT10_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT10_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT11_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT11_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT12_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT12_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT13_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT13_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT16_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT16_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT17_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT17_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT18_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT18_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT19_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT19_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT20_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT20_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT21_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_BIT21_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF0_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF0_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF10EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF10EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF10_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF10_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF11EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF11EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF11_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF11_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF12EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF12EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF12_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF12_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF13EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF13EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF13_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF13_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF14EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF14EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF14_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF14_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF15EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF15EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF15_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF15_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF16EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF16EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF16_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF16_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF17EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF17EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF17_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF17_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF18EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF18EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF18_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF18_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF19EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF19EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF19_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF19_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF1EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF1EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF1_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF1_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF20EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF20EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF20_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF20_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF21EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF21EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF21_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF21_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF23EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF23EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF23_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF23_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF2EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF2EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF2_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF2_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF3EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF3EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF3_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF3_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF8EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF8EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF8_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF8_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF9EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF9EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF9_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_CF9_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_ERROR_STATE_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_ERROR_STATE_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_EXIST_IN_QM0_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_EXIST_IN_QM3_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_EXIST_IN_QM3_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_FLUSH_Q0_CF_EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_FLUSH_Q0_CF_EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_FLUSH_Q0_CF_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_FLUSH_Q0_CF_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_FORCE_ACK_CF_EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_FORCE_ACK_CF_EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_FORCE_ACK_CF_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_FORCE_ACK_CF_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_IRQ_PROD_RULE_EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_IRQ_PROD_RULE_EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED1_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED1_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED2_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED2_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED3_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED3_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED4_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED4_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED5_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED5_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED6_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED6_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED7_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED7_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED8_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RESERVED8_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE11EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE11EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE14EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE14EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE15EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE15EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE16EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE16EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE17EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE17EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE18EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE18EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE19EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE19EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE5EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE5EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE6EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE6EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE7EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE7EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE9EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RULE9EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RXMIT_CF_EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RXMIT_CF_EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RXMIT_CF_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RXMIT_CF_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_CF_EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_CF_EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_CF_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_RX_ERROR_CF_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_SLOW_PATH_EN_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_SLOW_PATH_EN_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_SLOW_PATH_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_SLOW_PATH_SHIFT
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_YSTORM_FLUSH_MASK
- E4_XSTORM_ROCE_RESP_CONN_AG_CTX_YSTORM_FLUSH_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_BIT0_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_BIT0_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_BIT1_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_BIT1_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_CF0EN_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_CF0_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_CF0_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_CF1EN_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_CF1_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_CF1_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_CF2EN_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_CF2EN_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_CF2_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_CF2_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_RULE0EN_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_RULE1EN_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_RULE2EN_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_RULE3EN_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_CORE_CONN_AG_CTX_RULE4EN_MASK
- E4_YSTORM_CORE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_BIT0_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_BIT0_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_BIT1_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_BIT1_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_CF2EN_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_CF2EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_CF2_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_CF2_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_PMD_TERMINATE_CF_EN_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_PMD_TERMINATE_CF_EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_PMD_TERMINATE_CF_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_PMD_TERMINATE_CF_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_RULE0EN_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_RULE1EN_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_RULE2EN_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_RULE3EN_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_RULE4EN_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_TX_BD_CONS_UPD_CF_EN_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_TX_BD_CONS_UPD_CF_EN_SHIFT
- E4_YSTORM_ETH_CONN_AG_CTX_TX_BD_CONS_UPD_CF_MASK
- E4_YSTORM_ETH_CONN_AG_CTX_TX_BD_CONS_UPD_CF_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_BIT0_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_BIT0_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_BIT1_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_BIT1_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_CF0EN_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_CF0_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_CF0_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_CF1EN_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_CF1_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_CF1_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_CF2EN_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_CF2EN_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_CF2_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_CF2_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE0EN_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE1EN_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE2EN_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE3EN_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE4EN_MASK
- E4_YSTORM_FCOE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT0_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT0_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT1_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT1_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT2_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT2_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT3_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT3_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT4_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_BIT4_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_CF0EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_CF0_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_CF0_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_CF1EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_CF1_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_CF1_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_CF2SPECIAL_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_CF2SPECIAL_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_NIBBLE0_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_NIBBLE0_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE0EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE1EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE2EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE3EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE4EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE5EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE5EN_SHIFT
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE6EN_MASK
- E4_YSTORM_FCOE_TASK_AG_CTX_RULE6EN_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_BIT0_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_BIT0_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_BIT1_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_BIT1_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF0EN_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF0_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF0_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF1EN_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF1_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF1_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF2EN_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF2EN_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF2_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_CF2_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE0EN_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE1EN_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE2EN_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE3EN_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE4EN_MASK
- E4_YSTORM_ISCSI_CONN_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_BIT0_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_BIT0_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_BIT1_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_BIT4_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_BIT4_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF0EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF0_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF0_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF1_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF1_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF2SPECIAL_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_CF2SPECIAL_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE5EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_RULE6EN_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_TTT_VALID_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_TTT_VALID_SHIFT
- E4_YSTORM_ISCSI_TASK_AG_CTX_VALID_MASK
- E4_YSTORM_ISCSI_TASK_AG_CTX_VALID_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_BIT0_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_BIT0_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_BIT1_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_CF0_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_CF1_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_CF2_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK
- E4_YSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_BIT1_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_BIT1_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_BIT4_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_BIT4_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_CF0EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_CF0_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_CF0_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_CF1EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_CF1_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_CF1_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_CF2SPECIAL_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_CF2SPECIAL_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_CONNECTION_TYPE_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_CONNECTION_TYPE_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_DIF_FIRST_IO_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_DIF_FIRST_IO_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_EXIST_IN_QM0_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_EXIST_IN_QM0_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE0EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE1EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE2EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE3EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE4EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE5EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE5EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE6EN_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_RULE6EN_SHIFT
- E4_YSTORM_RDMA_TASK_AG_CTX_VALID_MASK
- E4_YSTORM_RDMA_TASK_AG_CTX_VALID_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_BIT0_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_BIT0_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_BIT1_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_BIT1_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_CF0EN_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_CF0_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_CF0_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_CF1EN_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_CF1_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_CF1_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_CF2EN_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_CF2EN_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_CF2_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_CF2_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE0EN_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE1EN_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE2EN_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE3EN_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE4EN_MASK
- E4_YSTORM_ROCE_CONN_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_BIT0_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_BIT0_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_BIT1_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_BIT1_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF0EN_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF0_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF0_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF1EN_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF1_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF1_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF2EN_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF2EN_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF2_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_CF2_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_MASK
- E4_YSTORM_ROCE_REQ_CONN_AG_CTX_RULE4EN_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_BIT0_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_BIT0_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_BIT1_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_BIT1_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF0EN_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF0_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF0_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF1EN_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF1EN_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF1_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF1_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF2EN_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF2EN_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF2_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_CF2_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE0EN_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE1EN_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE2EN_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE3EN_SHIFT
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_MASK
- E4_YSTORM_ROCE_RESP_CONN_AG_CTX_RULE4EN_SHIFT
- E5
- E500
- E500MC
- E500_PID_NUM
- E500_PM_DOZE
- E500_PM_NAP
- E500_PM_PH10
- E500_PM_PH15
- E500_PM_PH20
- E500_PM_PH30
- E500_TLB_BITMAP
- E500_TLB_MAS2_ATTR
- E500_TLB_NUM
- E500_TLB_SUPER_PERM_MASK
- E500_TLB_TLB0
- E500_TLB_USER_PERM_MASK
- E500_TLB_VALID
- E5250_CPU_DIV0
- E5250_CPU_DIV1
- E5420_EGL_DIV0
- E5420_KFC_DIV
- E5433_APOLLO_DIV0
- E5433_APOLLO_DIV1
- E5433_ATLAS_DIV0
- E5433_ATLAS_DIV1
- E5433_DIV_CPU0
- E5433_DIV_CPU1
- E5433_DIV_STAT_CPU0
- E5433_DIV_STAT_CPU1
- E5433_MUX_SEL2
- E5433_MUX_STAT2
- E55_IO_PORT_BASE
- E55_ISA_IO_BASE
- E55_ISA_IO_END
- E55_ISA_IO_SIZE
- E55_ISA_IO_START
- E5_DET
- E5_RISE
- E6
- E6500
- E6_DET
- E6_RISE
- E7
- E7205
- E7320
- E740_AUDIO_IN
- E740_AUDIO_OUT
- E7500
- E7501
- E7505
- E7520
- E7525
- E752X_BUF_ERRMASK
- E752X_BUF_FERR
- E752X_BUF_NERR
- E752X_BUF_SMICMD
- E752X_DDRCSR
- E752X_DEVPRES1
- E752X_DRA
- E752X_DRAM_DED_ADD
- E752X_DRAM_ERRMASK
- E752X_DRAM_FERR
- E752X_DRAM_NERR
- E752X_DRAM_RETR_ADD
- E752X_DRAM_SCRB_ADD
- E752X_DRAM_SEC1_ADD
- E752X_DRAM_SEC1_SYNDROME
- E752X_DRAM_SEC2_ADD
- E752X_DRAM_SEC2_SYNDROME
- E752X_DRAM_SMICMD
- E752X_DRB
- E752X_DRC
- E752X_DRM
- E752X_FERR_GLOBAL
- E752X_HI_ERRMASK
- E752X_HI_FERR
- E752X_HI_NERR
- E752X_HI_SMICMD
- E752X_MCHSCRB
- E752X_NERR_GLOBAL
- E752X_NR_CSROWS
- E752X_REMAPBASE
- E752X_REMAPLIMIT
- E752X_REMAPOFFSET
- E752X_SYSBUS_ERRMASK
- E752X_SYSBUS_FERR
- E752X_SYSBUS_NERR
- E752X_SYSBUS_SMICMD
- E752X_TOLM
- E7XXX_DRA
- E7XXX_DRAM_CELOG_ADD
- E7XXX_DRAM_CELOG_SYNDROME
- E7XXX_DRAM_FERR
- E7XXX_DRAM_NERR
- E7XXX_DRAM_UELOG_ADD
- E7XXX_DRB
- E7XXX_DRC
- E7XXX_NR_CSROWS
- E7XXX_NR_DIMMS
- E7XXX_REMAPBASE
- E7XXX_REMAPLIMIT
- E7XXX_TOLM
- E7_DET
- E7_RISE
- E8
- E820MAP
- E820MAX
- E820NR
- E820_ACPI
- E820_MAX_ENTRIES
- E820_MAX_ENTRIES_ZEROPAGE
- E820_NVS
- E820_PMEM
- E820_PRAM
- E820_RAM
- E820_RESERVED
- E820_RESERVED_KERN
- E820_TYPE_ACPI
- E820_TYPE_NVS
- E820_TYPE_PMEM
- E820_TYPE_PRAM
- E820_TYPE_RAM
- E820_TYPE_RESERVED
- E820_TYPE_RESERVED_KERN
- E820_TYPE_UNUSABLE
- E820_UNUSABLE
- E820_X_MAX
- E8390_CMD
- E8390_NODMA
- E8390_PAGE0
- E8390_PAGE1
- E8390_PAGE2
- E8390_RREAD
- E8390_RWRITE
- E8390_RXCONFIG
- E8390_RXOFF
- E8390_RX_IRQ_MASK
- E8390_START
- E8390_STOP
- E8390_TRANS
- E8390_TXCONFIG
- E8390_TXOFF
- E8390_TX_IRQ_MASK
- E9
- EA
- EABRT
- EACCES
- EACH_PACKET
- EACH_PRIMITIVE
- EACMWAY0_SWANDHW
- EACMWAY1_HW
- EACMWAY2_SW
- EACS
- EACTIVE
- EAD
- EADDRINUSE
- EADDRNOTAVAIL
- EADDR_NVOFS
- EADM_BUSY
- EADM_IDLE
- EADM_LOG
- EADM_LOG_HEX
- EADM_NOT_OPER
- EADM_SCH_H
- EADM_SCH_ISC
- EADM_TIMEOUT
- EADV
- EAFNOSUPPORT
- EAGAIN
- EAGER
- EAGLE
- EAGLEUSBVERSION
- EAGLE_EMA_CTRL
- EAGLE_EMA_STATUS
- EAGLE_FIRMWARE
- EAGLE_I
- EAGLE_II
- EAGLE_IIC_PID_PREFIRM
- EAGLE_IIC_PID_PSTFIRM
- EAGLE_III
- EAGLE_III_FIRMWARE
- EAGLE_III_PID_PREFIRM
- EAGLE_III_PID_PSTFIRM
- EAGLE_II_FIRMWARE
- EAGLE_II_PID_PREFIRM
- EAGLE_II_PID_PSTFIRM
- EAGLE_IV
- EAGLE_IV_FIRMWARE
- EAGLE_IV_PID_PREFIRM
- EAGLE_IV_PID_PSTFIRM
- EAGLE_I_FIRMWARE
- EAGLE_I_PID_PREFIRM
- EAGLE_I_PID_PSTFIRM
- EAG_CFG_R
- EAG_CFG_W
- EALIST_SIZE
- EALREADY
- EAMD3D
- EAP
- EAPD_DRIVE_ENABLE
- EAPOL4_CONFIRM
- EAPOL4_PACKET_LEN
- EAPOL_ENCAP_ASF_ALERT
- EAPOL_KEY
- EAPOL_LOGOFF
- EAPOL_RETRY_CNT
- EAPOL_START
- EAP_BYP
- EAP_PACKET
- EAP_PACKET_H
- EAR
- EAREQ
- EARLYCON_BUFFER_INITIAL_CAP
- EARLYCON_DECLARE
- EARLYCON_TABLE
- EARLYCON_USED_OR_UNUSED
- EARLY_BOOTUP_DEBUG
- EARLY_CONSOLE_BAUDRATE
- EARLY_CONSOLE_PORT
- EARLY_DYNAMIC_PAGE_TABLES
- EARLY_END_EXT_DET
- EARLY_ENTRIES
- EARLY_HC_LENGTH
- EARLY_IDT_HANDLER_SIZE
- EARLY_KASLR
- EARLY_LSM_COUNT
- EARLY_LSM_TABLE
- EARLY_MAP_SIZE
- EARLY_PAGES
- EARLY_PCI_OP
- EARLY_PGDS
- EARLY_PLATFORM_ID_ERROR
- EARLY_PLATFORM_ID_UNSET
- EARLY_PMDS
- EARLY_PUDS
- EARLY_SCCB_OFFSET
- EARLY_SCCB_SIZE
- EARLY_TALLY_EN
- EARLY_UART_BASE
- EARLY_Z_THEN_LATE_Z
- EARLY_Z_THEN_RE_Z
- EAR_CMV_0_95V
- EAR_CMV_1_10V
- EAR_CMV_1_27V
- EAR_CMV_1_58V
- EAR_CMV_UNKNOWN
- EASI_BASE
- EASI_SIZE
- EASI_START
- EAST
- EASYPEN_I405X_RDESC_ORIG_SIZE
- EASYPEN_M406XE_RDESC_ORIG_SIZE
- EASYPEN_M610X_RDESC_ORIG_SIZE
- EATAUSRCMD
- EAUTOPS
- EAVP_MASK
- EAV_ACTIVE_VIDEO_FIELD1
- EAV_ACTIVE_VIDEO_FIELD2
- EAV_PRESENT
- EAV_VBI_FIELD1
- EAV_VBI_FIELD2
- EAV_VBLANK_FIELD1
- EAV_VBLANK_FIELD2
- EAX
- EAX_EDX_RET
- EAX_EDX_VAL
- EA_710
- EA_ATTR
- EA_BLOCK_CACHE
- EA_EDC_CNT_MASK
- EA_EDC_CNT_SHIFT
- EA_EXTENT
- EA_FLAGS
- EA_INFORMATION
- EA_INLINE
- EA_INODE_CACHE
- EA_MALLOC
- EA_MASK
- EA_NEW
- EA_SIZE
- EA_anode
- EA_indirect
- EA_needea
- EB
- EB1
- EB10
- EB11
- EB12
- EB13
- EB14
- EB15
- EB16
- EB17
- EB18
- EB19
- EB2
- EB20
- EB21
- EB22
- EB23
- EB3
- EB4
- EB5
- EB6
- EB7
- EB8
- EB9
- EBADCOOKIE
- EBADE
- EBADF
- EBADFD
- EBADHANDLE
- EBADMSG
- EBADR
- EBADRQC
- EBADSLT
- EBADTYPE
- EBANK_MASK
- EBANK_POS_MASK
- EBANK_POS_SHIFT
- EBANK_SHIFT
- EBASE
- EBA_RESERVED_PEBS
- EBCASC
- EBCASC_500
- EBCNTRL
- EBCNTRL_VALUE
- EBC_B0AP
- EBC_B0CR
- EBC_B1AP
- EBC_B1CR
- EBC_B2AP
- EBC_B2CR
- EBC_B3AP
- EBC_B3CR
- EBC_B4AP
- EBC_B4CR
- EBC_B5AP
- EBC_B5CR
- EBC_B6AP
- EBC_B6CR
- EBC_B7AP
- EBC_B7CR
- EBC_BEAR
- EBC_BESR
- EBC_BXAP
- EBC_BXCR
- EBC_BXCR_BANK_SIZE
- EBC_BXCR_BAS
- EBC_BXCR_BS
- EBC_BXCR_BU
- EBC_BXCR_BU_OFF
- EBC_BXCR_BU_RO
- EBC_BXCR_BU_RW
- EBC_BXCR_BU_WO
- EBC_BXCR_BW
- EBC_CFG
- EBC_CID
- EBC_NUM_BANKS
- EBC_TOLOWER
- EBC_TOUPPER
- EBD15
- EBD15BI
- EBD15BI_MASK
- EBD15_MASK
- EBD8IO
- EBD8IO1_MASK
- EBD8IO2_MASK
- EBD8IO3_MASK
- EBDA_AVO_ISA_ADDR
- EBDA_AVO_VGA_ADDR
- EBDA_AVO_VGA_ADDR_AND_ALIA
- EBDA_DEV_TYPE_MASK
- EBDA_IO_RESTRI_MASK
- EBDA_IO_RSRC_TYPE
- EBDA_MEM_RSRC_TYPE
- EBDA_NON_PCI_DEV
- EBDA_NORM_DEV_RSRC_INFO
- EBDA_NO_RESTRI
- EBDA_PCI_DEV
- EBDA_PFM_RSRC_TYPE
- EBDA_PRI_DEF_MASK
- EBDA_PRI_PCI_BUS_INFO
- EBDA_RES_RSRC_TYPE
- EBDA_RSRC_TYPE_MASK
- EBDA_SLOT_100_MAX
- EBDA_SLOT_133_MAX
- EBDA_SLOT_66_MAX
- EBDA_SLOT_PCIX_CAP
- EBDMA_ADDR
- EBDMA_COUNT
- EBDMA_CSR
- EBDMA_CSR_A_LOADED
- EBDMA_CSR_BURST_SZ_1
- EBDMA_CSR_BURST_SZ_16
- EBDMA_CSR_BURST_SZ_4
- EBDMA_CSR_BURST_SZ_8
- EBDMA_CSR_BURST_SZ_MASK
- EBDMA_CSR_CYC_PEND
- EBDMA_CSR_DEV_ID_MASK
- EBDMA_CSR_DIAG_EN
- EBDMA_CSR_DIAG_RD_DONE
- EBDMA_CSR_DIAG_WR_DONE
- EBDMA_CSR_DIS_CSR_DRN
- EBDMA_CSR_DIS_ERR_PEND
- EBDMA_CSR_DMA_ON
- EBDMA_CSR_DRAIN
- EBDMA_CSR_EN_CNT
- EBDMA_CSR_EN_DMA
- EBDMA_CSR_EN_NEXT
- EBDMA_CSR_ERR_PEND
- EBDMA_CSR_INT_EN
- EBDMA_CSR_INT_PEND
- EBDMA_CSR_NA_LOADED
- EBDMA_CSR_RESET
- EBDMA_CSR_TC
- EBDMA_CSR_TCI_DIS
- EBDMA_CSR_WRITE
- EBFONT
- EBI1_1X_DIV_RESET
- EBI1_2X_CLK
- EBI1_ASFAB_SRC
- EBI1_CH0_CA_CLK
- EBI1_CH0_CLK
- EBI1_CH0_DQ_CLK
- EBI1_CH1_CA_CLK
- EBI1_CH1_CLK
- EBI1_CH1_DQ_CLK
- EBI1_CLK_SRC
- EBI1_RESET
- EBI1_XO_CLK
- EBI2_2X_CLK
- EBI2_AON_CLK
- EBI2_CLK
- EBI2_CS0_ENABLE_MASK
- EBI2_CS1_ENABLE_MASK
- EBI2_CS2_ENABLE_MASK
- EBI2_CS3_ENABLE_MASK
- EBI2_CS4_ENABLE_MASK
- EBI2_CS5_ENABLE_MASK
- EBI2_CSN_MASK
- EBI2_RESET
- EBI2_XMEM_ADDR_HOLD_ENA_SHIFT
- EBI2_XMEM_ADV_OE_RECOVERY_SHIFT
- EBI2_XMEM_CFG
- EBI2_XMEM_CS0_FAST_CFG
- EBI2_XMEM_CS0_SLOW_CFG
- EBI2_XMEM_CS1_FAST_CFG
- EBI2_XMEM_CS1_SLOW_CFG
- EBI2_XMEM_CS2_FAST_CFG
- EBI2_XMEM_CS2_SLOW_CFG
- EBI2_XMEM_CS3_FAST_CFG
- EBI2_XMEM_CS3_SLOW_CFG
- EBI2_XMEM_CS4_FAST_CFG
- EBI2_XMEM_CS4_SLOW_CFG
- EBI2_XMEM_CS5_FAST_CFG
- EBI2_XMEM_CS5_SLOW_CFG
- EBI2_XMEM_RD_DELTA_SHIFT
- EBI2_XMEM_RD_HOLD_SHIFT
- EBI2_XMEM_RD_WAIT_SHIFT
- EBI2_XMEM_RECOVERY_SHIFT
- EBI2_XMEM_WR_DELTA_SHIFT
- EBI2_XMEM_WR_HOLD_SHIFT
- EBI2_XMEM_WR_WAIT_SHIFT
- EBIR_RXBUFCONS_MASK
- EBIR_RXBUFCONS_SHIFT
- EBIR_RXBUFPROD_MASK
- EBIR_RXBUFPROD_SHIFT
- EBIR_TXBUFCONS_MASK
- EBIR_TXBUFCONS_SHIFT
- EBIR_TXBUFPROD_MASK
- EBITMAP_BIT
- EBITMAP_NODE_INDEX
- EBITMAP_NODE_OFFSET
- EBITMAP_NODE_SIZE
- EBITMAP_SHIFT_UNIT_SIZE
- EBITMAP_SIZE
- EBITMAP_UNIT_NUMS
- EBITMAP_UNIT_SIZE
- EBLACKLISTED
- EBLOCK_BAD
- EBLOCK_BITFLIP
- EBLOCK_COUNT_0
- EBLOCK_COUNT_1
- EBLOCK_FAILED
- EBLOCK_IDX_SHIFT
- EBLOCK_NOMAGIC
- EBLOCK_READERR
- EBONY_FPGA_FLASH_SEL
- EBONY_FPGA_PATH
- EBONY_SMALL_FLASH_PATH
- EBP
- EBPF_SAVE_RA
- EBPF_SAVE_S0
- EBPF_SAVE_S1
- EBPF_SAVE_S2
- EBPF_SAVE_S3
- EBPF_SAVE_S4
- EBPF_SCRATCH_TO_ARM_FP
- EBPF_SEEN_FP
- EBPF_SEEN_TC
- EBPF_TCC_IN_V1
- EBRPRED
- EBSTCON
- EBSTCSH
- EBSTCSL
- EBSTSD
- EBT_802_3
- EBT_802_3_MASK
- EBT_802_3_MATCH
- EBT_802_3_SAP
- EBT_802_3_TYPE
- EBT_ACCEPT
- EBT_ALIGN
- EBT_AMONG_DST
- EBT_AMONG_DST_NEG
- EBT_AMONG_MATCH
- EBT_AMONG_SRC
- EBT_AMONG_SRC_NEG
- EBT_ARPREPLY_TARGET
- EBT_ARP_DST_IP
- EBT_ARP_DST_MAC
- EBT_ARP_GRAT
- EBT_ARP_HTYPE
- EBT_ARP_MASK
- EBT_ARP_MATCH
- EBT_ARP_OPCODE
- EBT_ARP_PTYPE
- EBT_ARP_SRC_IP
- EBT_ARP_SRC_MAC
- EBT_BASE_CTL
- EBT_CHAIN_MAXNAMELEN
- EBT_COMPAT_MATCH
- EBT_COMPAT_TARGET
- EBT_COMPAT_WATCHER
- EBT_CONTINUE
- EBT_DESTMAC
- EBT_DNAT_TARGET
- EBT_DROP
- EBT_ENTRY_ITERATE
- EBT_ENTRY_OR_ENTRIES
- EBT_EXTENSION_MAXNAMELEN
- EBT_FUNCTION_MAXNAMELEN
- EBT_F_MASK
- EBT_IDEST
- EBT_IIN
- EBT_ILOGICALIN
- EBT_ILOGICALOUT
- EBT_INV_MASK
- EBT_IOUT
- EBT_IP6_DEST
- EBT_IP6_DPORT
- EBT_IP6_ICMP6
- EBT_IP6_MASK
- EBT_IP6_MATCH
- EBT_IP6_PROTO
- EBT_IP6_SOURCE
- EBT_IP6_SPORT
- EBT_IP6_TCLASS
- EBT_IPROTO
- EBT_IP_DEST
- EBT_IP_DPORT
- EBT_IP_ICMP
- EBT_IP_IGMP
- EBT_IP_MASK
- EBT_IP_MATCH
- EBT_IP_PROTO
- EBT_IP_SOURCE
- EBT_IP_SPORT
- EBT_IP_TOS
- EBT_ISOURCE
- EBT_LIMIT_MATCH
- EBT_LIMIT_SCALE
- EBT_LOG_ARP
- EBT_LOG_IP
- EBT_LOG_IP6
- EBT_LOG_MASK
- EBT_LOG_NFLOG
- EBT_LOG_PREFIX_SIZE
- EBT_LOG_WATCHER
- EBT_MARK_AND
- EBT_MARK_MASK
- EBT_MARK_MATCH
- EBT_MARK_OR
- EBT_MARK_TARGET
- EBT_MATCH_ITERATE
- EBT_NFLOG_DEFAULT_GROUP
- EBT_NFLOG_DEFAULT_THRESHOLD
- EBT_NFLOG_MASK
- EBT_NFLOG_PREFIX_SIZE
- EBT_NFLOG_WATCHER
- EBT_NOPROTO
- EBT_PKTTYPE_MATCH
- EBT_REDIRECT_TARGET
- EBT_RETURN
- EBT_SNAT_TARGET
- EBT_SOURCEMAC
- EBT_SO_GET_ENTRIES
- EBT_SO_GET_INFO
- EBT_SO_GET_INIT_ENTRIES
- EBT_SO_GET_INIT_INFO
- EBT_SO_GET_MAX
- EBT_SO_SET_COUNTERS
- EBT_SO_SET_ENTRIES
- EBT_SO_SET_MAX
- EBT_STANDARD_TARGET
- EBT_STP_CONFIG_MASK
- EBT_STP_FLAGS
- EBT_STP_FWDD
- EBT_STP_HELLOTIME
- EBT_STP_MASK
- EBT_STP_MATCH
- EBT_STP_MAXAGE
- EBT_STP_MSGAGE
- EBT_STP_PORT
- EBT_STP_ROOTADDR
- EBT_STP_ROOTCOST
- EBT_STP_ROOTPRIO
- EBT_STP_SENDERADDR
- EBT_STP_SENDERPRIO
- EBT_STP_TYPE
- EBT_TABLE_MAXNAMELEN
- EBT_VERDICT_BITS
- EBT_VLAN_ENCAP
- EBT_VLAN_ID
- EBT_VLAN_MASK
- EBT_VLAN_MATCH
- EBT_VLAN_PRIO
- EBT_WATCHER_ITERATE
- EBUCC
- EBUCC_EBUDIV_SELF100
- EBUG_ON
- EBUSY
- EBUS_DMA_EVENT_DEVICE
- EBUS_DMA_EVENT_DMA
- EBUS_DMA_EVENT_ERROR
- EBUS_DMA_FLAG_TCI_DISABLE
- EBUS_DMA_FLAG_USE_EBDMA_HANDLER
- EBUS_DMA_RESET_TIMEOUT
- EBUS_SUPPORT
- EBU_ADDSEL1
- EBU_NAND_CON
- EBU_NAND_ECC0
- EBU_NAND_ECC_AC
- EBU_NAND_WAIT
- EBU_WRDIS
- EBX
- EBX_REG
- EB_ALLOCATE_ALL_STREAM_TRANSFERT_BUFFERS_IMPOSSIBLE
- EB_ALLOCATE_AUDIO_IMPOSSIBLE
- EB_ALLOCATE_CONTEXT_LIII_IMPOSSIBLE
- EB_ALLOCATE_DIFFERED_CMD_IMPOSSIBLE
- EB_ALLOCATE_EFFECTS_IMPOSSIBLE
- EB_ALLOCATE_EFFECT_POS_IMPOSSIBLE
- EB_ALLOCATE_MEM_PIPE_IMPOSSIBLE
- EB_ALLOCATE_MEM_STREAM_IMPOSSIBLE
- EB_ALLOCATE_PIPE_IMPOSSIBLE
- EB_ALLOCATE_PIPE_SAMPLE_BUFFER_IMPOSSIBLE
- EB_ALLOCATE_STREAM_IMPOSSIBLE
- EB_CMD_REFUSED
- EB_CONTROL_CMD_IMPOSSIBLE
- EB_CSE_REFUSED
- EB_CSN_REFUSED
- EB_INVALID_AUDIO
- EB_INVALID_EFFECT
- EB_INVALID_PIPE
- EB_INVALID_STREAM
- EB_ISO
- EB_MA
- EB_PAR
- EB_RBUFFERS_TABLE_OVERFLOW
- EB_RBUFFER_NOT_AVAILABLE
- EB_RES0
- EB_RES1
- EB_RI
- EB_SPC_REFUSED
- EB_START_STREAM_REFUSED
- EB_STATUS_DIALOG_IMPOSSIBLE
- EB_STATUS_SEND_IMPOSSIBLE
- EB_TA
- EB_TOO_MANY_DIFFERED_CMD
- EB_WCC
- EC
- EC0S
- EC0_OUT
- EC100_H
- EC168_FIRMWARE
- EC168_H
- EC168_USB_TIMEOUT
- EC1R
- EC1S
- EC1SSR
- EC1_IN
- EC2R
- EC2S
- EC2SSR
- EC2_TRACE
- EC3S
- EC3_LEAVE
- EC4S
- EC4_PATH_TEST
- EC5S
- EC5_INSERT
- EC6_CHECK
- EC7_DEINSERT
- ECACHE_RETRY_WAIT
- ECAG_CACHE_ATTRIBUTE
- ECAG_CPU_ATTRIBUTE
- ECAM_BUS_LOC_SHIFT
- ECAM_BUS_NUM_SHIFT
- ECAM_DEV_LOC_SHIFT
- ECAM_DEV_NUM_SHIFT
- ECANCELED
- ECANCELLED
- ECARDGONE
- ECARD_C
- ECARD_DEV
- ECARD_DRV
- ECARD_EASI
- ECARD_EASI_BASE
- ECARD_FAST
- ECARD_IOC
- ECARD_IOC4_BASE
- ECARD_IOC_BASE
- ECARD_MEDIUM
- ECARD_MEMC
- ECARD_MEMC8_BASE
- ECARD_MEMC_BASE
- ECARD_NUM_RESOURCES
- ECARD_RES_EASI
- ECARD_RES_IOCFAST
- ECARD_RES_IOCMEDIUM
- ECARD_RES_IOCSLOW
- ECARD_RES_IOCSYNC
- ECARD_RES_MEMC
- ECARD_SLOW
- ECARD_SYNC
- ECA_AIV
- ECA_APIE
- ECA_CEI
- ECA_IB
- ECA_MVPGI
- ECA_PROTEXCI
- ECA_SIGPI
- ECA_SII
- ECA_VX
- ECB2_CMMA
- ECB2_ESCA
- ECB2_IEP
- ECB2_PFMFI
- ECB3_AES
- ECB3_DEA
- ECB3_RI
- ECB_GS
- ECB_HOSTPROTINT
- ECB_SRSI
- ECB_TE
- ECC1
- ECC1RESULTSIZE
- ECC2
- ECC3
- ECCBUF_DIV
- ECCBUF_MOD
- ECCBUF_SIZE
- ECCCLEAR
- ECCCLRR
- ECCCNTR
- ECCCP
- ECCF_CACHE_ERR
- ECCF_ECC
- ECCF_ERROREPC
- ECCF_PADDR
- ECCF_SIZE
- ECCF_TAGLO
- ECCGETLAYOUT
- ECCGETSTATS
- ECCLK_SRC_SEL
- ECCLK_SRC_SEL_MASK
- ECCLPLB
- ECCLPUB
- ECCSBUSY
- ECCSFULL
- ECCSIZE0_SHIFT
- ECCSIZE1_SHIFT
- ECCTL2
- ECCTL2_APWM_MODE
- ECCTL2_APWM_POL_LOW
- ECCTL2_SYNC_SEL_DISA
- ECCTL2_TSCTR_FREERUN
- ECCU
- ECC_45_BYTE
- ECC_60_BYTE
- ECC_ADDRMAP0_OFFSET
- ECC_BCH_4BIT
- ECC_BCH_8BIT
- ECC_BCH_LEVEL_MASK
- ECC_BIT
- ECC_BITMASK0_OFST
- ECC_BITMASK1_OFST
- ECC_BITMASK2_OFST
- ECC_BLK_ACCCTRL_OFST
- ECC_BLK_ADDRESS_OFST
- ECC_BLK_DBYTECTRL_OFST
- ECC_BLK_RDATA0_OFST
- ECC_BLK_RDATA1_OFST
- ECC_BLK_RDATA2_OFST
- ECC_BLK_RDATA3_OFST
- ECC_BLK_RECC0_OFST
- ECC_BLK_RECC1_OFST
- ECC_BLK_STARTACC_OFST
- ECC_BLK_WDATA0_OFST
- ECC_BLK_WDATA1_OFST
- ECC_BLK_WDATA2_OFST
- ECC_BLK_WDATA3_OFST
- ECC_BLK_WECC0_OFST
- ECC_BLK_WECC1_OFST
- ECC_BYPASS
- ECC_CEADDR0_OFST
- ECC_CEADDR0_RNK_MASK
- ECC_CEADDR0_RW_MASK
- ECC_CEADDR1_BLKNR_MASK
- ECC_CEADDR1_BNKGRP_MASK
- ECC_CEADDR1_BNKGRP_SHIFT
- ECC_CEADDR1_BNKNR_MASK
- ECC_CEADDR1_BNKNR_SHIFT
- ECC_CEADDR1_OFST
- ECC_CECNT_G
- ECC_CECNT_M
- ECC_CECNT_S
- ECC_CECNT_V
- ECC_CEPOISON_MASK
- ECC_CE_INT_CAUSE_F
- ECC_CE_INT_CAUSE_S
- ECC_CE_INT_CAUSE_V
- ECC_CE_PAR_F
- ECC_CE_PAR_S
- ECC_CE_PAR_V
- ECC_CE_UE_INTR_MASK
- ECC_CFG0_OFST
- ECC_CFG1_OFST
- ECC_CFG_ECC_DISABLE
- ECC_CHECK_RETURN_FF
- ECC_CLR_OFST
- ECC_COMPLETE
- ECC_CONFIG_CS_SHIFT
- ECC_CONTROL
- ECC_CORRECTABLE_MASK
- ECC_CORRECTION
- ECC_CORRECTION_IRQ
- ECC_CORRECTION__ERASE_THRESHOLD
- ECC_CORRECTION__VALUE
- ECC_COR_INFO
- ECC_COR_INFO__MAX_ERRORS
- ECC_COR_INFO__SHIFT
- ECC_COR_INFO__UNCOR_ERR
- ECC_CSYND0_OFST
- ECC_CSYND1_OFST
- ECC_CSYND2_OFST
- ECC_CTL_REG
- ECC_CTRL_BUSWIDTH_MASK
- ECC_CTRL_BUSWIDTH_SHIFT
- ECC_CTRL_CLR_CE_ERR
- ECC_CTRL_CLR_CE_ERRCNT
- ECC_CTRL_CLR_UE_ERR
- ECC_CTRL_CLR_UE_ERRCNT
- ECC_CTRL_OFST
- ECC_CTRL_STAT
- ECC_CURVE_NIST_P192
- ECC_CURVE_NIST_P192_DIGITS
- ECC_CURVE_NIST_P256
- ECC_CURVE_NIST_P256_DIGITS
- ECC_DB_ERR_COUNT_MASK
- ECC_DB_ERR_WAYS_MASK
- ECC_DB_ERR_WAYS_SHIFT
- ECC_DECCNFG
- ECC_DECCON
- ECC_DECDONE
- ECC_DECENUM0
- ECC_DECIDLE
- ECC_DECIRQ_EN
- ECC_DECIRQ_STA
- ECC_DECODE
- ECC_DIGITS_TO_BYTES_SHIFT
- ECC_DIGNOSTIC
- ECC_DIR
- ECC_DIS_ARMV8_CH2
- ECC_DIS_LS1088A
- ECC_DMA_MODE
- ECC_DMESG
- ECC_ENABLE
- ECC_ENABLED
- ECC_ENABLE__FLAG
- ECC_ENCCNFG
- ECC_ENCCON
- ECC_ENCDIADDR
- ECC_ENCIDLE
- ECC_ENCIRQ_EN
- ECC_ENCIRQ_STA
- ECC_ENCODE
- ECC_ENCPAR00
- ECC_ERASE_BUF_SZ
- ECC_ERR
- ECC_ERRCNT_OFST
- ECC_ERROR_ADDRESS
- ECC_ERROR_ADDRESS__OFFSET
- ECC_ERROR_ADDRESS__SECTOR
- ECC_ERROR_BLOCK_ADDRESS
- ECC_ERROR_BLOCK_ADDRESS__VALUE
- ECC_ERROR_LOCATION_MASK
- ECC_ERROR_PAGE_ADDRESS
- ECC_ERROR_PAGE_ADDRESS__BANK
- ECC_ERROR_PAGE_ADDRESS__VALUE
- ECC_ERR_CNT
- ECC_ERR_STAT_OFFSET
- ECC_EXCP_DETECTED
- ECC_FADDR
- ECC_FADDR0_ATOMIC
- ECC_FADDR0_BMODE
- ECC_FADDR0_CACHE
- ECC_FADDR0_MIDMASK
- ECC_FADDR0_PADDR
- ECC_FADDR0_S
- ECC_FADDR0_SIZE
- ECC_FADDR0_TYPE
- ECC_FADDR0_VADDR
- ECC_FCR_CHECK
- ECC_FCR_INTENAB
- ECC_FORCE_CLK_OPEN
- ECC_FORM
- ECC_FSR_BADSLOT
- ECC_FSR_C
- ECC_FSR_C2ERR
- ECC_FSR_DWORD
- ECC_FSR_MULT
- ECC_FSR_SYND
- ECC_FSR_TIMEO
- ECC_FSR_UNC
- ECC_FSTATUS
- ECC_IDLE_MASK
- ECC_IDLE_REG
- ECC_IRQ_EN
- ECC_MASK
- ECC_MASK_ENABLE
- ECC_MAX_DIGITS
- ECC_MBAENAB
- ECC_MBAE_MOD1
- ECC_MBAE_MOD2
- ECC_MBAE_MOD3
- ECC_MBAE_SBUS
- ECC_MODE
- ECC_MS_SHIFT
- ECC_NB_ERRORS_MASK
- ECC_NFI_MODE
- ECC_NONE
- ECC_NO_CORRECTION_IRQ
- ECC_NUM_DATA_BYTES
- ECC_OP_DISABLE
- ECC_OP_ENABLE
- ECC_PARITY_BCH8_512B
- ECC_PARITY_SIZE_BYTES_BCH
- ECC_PARITY_SIZE_BYTES_RS
- ECC_PG_IRQ_SEL
- ECC_POINT_INIT
- ECC_POISON0_COLUMN_MASK
- ECC_POISON0_COLUMN_SHIFT
- ECC_POISON0_OFST
- ECC_POISON0_RANK_MASK
- ECC_POISON0_RANK_SHIFT
- ECC_POISON1_BANKNR_MASK
- ECC_POISON1_BANKNR_SHIFT
- ECC_POISON1_BG_MASK
- ECC_POISON1_BG_SHIFT
- ECC_POISON1_OFST
- ECC_POISON1_ROW_MASK
- ECC_POISON1_ROW_SHIFT
- ECC_PTR
- ECC_READ_EDOVR
- ECC_READ_EOVR
- ECC_RS_4BIT
- ECC_RX_EN
- ECC_SB_ERR_COUNT_MASK
- ECC_SB_ERR_COUNT_SHIFT
- ECC_SB_ERR_WAYS_MASK
- ECC_SEG
- ECC_SET
- ECC_SHUT
- ECC_SRAM_ADDR
- ECC_STATUS
- ECC_STATUS_ERR_COUNT
- ECC_STATUS_MASK
- ECC_STAT_BITNUM_MASK
- ECC_STAT_CECNT_MASK
- ECC_STAT_CECNT_SHIFT
- ECC_STAT_OFST
- ECC_STAT_UECNT_MASK
- ECC_STAT_UECNT_SHIFT
- ECC_STUFF
- ECC_SW_RESET
- ECC_THRESHOLD
- ECC_THRESHOLD__VALUE
- ECC_TIMEOUT
- ECC_UEADDR0_OFST
- ECC_UEADDR1_OFST
- ECC_UECNT_G
- ECC_UECNT_M
- ECC_UECNT_S
- ECC_UECNT_V
- ECC_UEPOISON_MASK
- ECC_UESYND0_OFST
- ECC_UESYND1_OFST
- ECC_UESYND2_OFST
- ECC_UE_INT_CAUSE_F
- ECC_UE_INT_CAUSE_S
- ECC_UE_INT_CAUSE_V
- ECC_UE_PAR_F
- ECC_UE_PAR_S
- ECC_UE_PAR_V
- ECC_UNCORRECTABLE
- ECC_WORD_WRITE
- ECC_WRITE_DOVR
- ECC_WRITE_EDOVR
- ECC_XACT_KICK
- ECC_ZERO_CNT
- ECCx8
- ECDH_COUNT
- ECDH_KPP_SECRET_MIN_SIZE
- ECDH_PREFIX_MODE
- ECDH_RSP_SIZE
- ECD_ECC
- ECD_ETOKENF
- ECD_HOSTREGMGMT
- ECD_MEF
- ECEIE
- ECERB
- ECF_CLR_PASSTHRU_PEND
- ECF_INCL_FRAME_HDR
- ECF_INTR_OFFSET
- ECF_INTR_SET
- ECF_PAYLOAD_DESCR_MASK
- ECF_TO_HOST_BASE
- ECHECKER
- ECHELON_U20_PID
- ECHELON_VID
- ECHILD
- ECHO
- ECHO24_FAMILY
- ECHO3G
- ECHO3G_FAMILY
- ECHOCAN_BUFF_MASK
- ECHOCAN_BUFF_SIZE
- ECHOCAPS_HAS_DIGITAL_MODE_ADAT
- ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_CDROM
- ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_OPTICAL
- ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_RCA
- ECHOCARD_DARLA20
- ECHOCARD_DARLA24
- ECHOCARD_ECHO3G
- ECHOCARD_GINA20
- ECHOCARD_GINA24
- ECHOCARD_HAS_ADAT
- ECHOCARD_HAS_ASIC
- ECHOCARD_HAS_DIGITAL_IN_AUTOMUTE
- ECHOCARD_HAS_DIGITAL_IO
- ECHOCARD_HAS_DIGITAL_MODE_SWITCH
- ECHOCARD_HAS_EXTERNAL_CLOCK
- ECHOCARD_HAS_INPUT_GAIN
- ECHOCARD_HAS_INPUT_NOMINAL_LEVEL
- ECHOCARD_HAS_LINE_OUT_GAIN
- ECHOCARD_HAS_MIDI
- ECHOCARD_HAS_MONITOR
- ECHOCARD_HAS_OUTPUT_CLOCK_SWITCH
- ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
- ECHOCARD_HAS_PHANTOM_POWER
- ECHOCARD_HAS_STEREO_BIG_ENDIAN32
- ECHOCARD_HAS_SUPER_INTERLEAVE
- ECHOCARD_HAS_VMIXER
- ECHOCARD_INDIGO
- ECHOCARD_INDIGO_DJ
- ECHOCARD_INDIGO_DJX
- ECHOCARD_INDIGO_IO
- ECHOCARD_INDIGO_IOX
- ECHOCARD_LAYLA20
- ECHOCARD_LAYLA24
- ECHOCARD_MIA
- ECHOCARD_MONA
- ECHOCARD_NAME
- ECHOCTL
- ECHOE
- ECHOFX_INTERVIEW_LITE
- ECHOGAIN_MAXINP
- ECHOGAIN_MAXOUT
- ECHOGAIN_MININP
- ECHOGAIN_MINOUT
- ECHOGAIN_MUTED
- ECHOGALS_FAMILY
- ECHOK
- ECHOKE
- ECHONL
- ECHOPRT
- ECHORESPONSE
- ECHO_BLOCK
- ECHO_CANCELLATION
- ECHO_CAN_DISABLE
- ECHO_CAN_USE_ADAPTION
- ECHO_CAN_USE_CLIP
- ECHO_CAN_USE_CNG
- ECHO_CAN_USE_NLP
- ECHO_CAN_USE_RX_HPF
- ECHO_CAN_USE_TX_HPF
- ECHO_CLOCKS
- ECHO_CLOCK_ADAT
- ECHO_CLOCK_BIT_ADAT
- ECHO_CLOCK_BIT_ESYNC
- ECHO_CLOCK_BIT_ESYNC96
- ECHO_CLOCK_BIT_INTERNAL
- ECHO_CLOCK_BIT_MTC
- ECHO_CLOCK_BIT_SPDIF
- ECHO_CLOCK_BIT_SUPER
- ECHO_CLOCK_BIT_WORD
- ECHO_CLOCK_ESYNC
- ECHO_CLOCK_ESYNC96
- ECHO_CLOCK_INTERNAL
- ECHO_CLOCK_MTC
- ECHO_CLOCK_NUMBER
- ECHO_CLOCK_SPDIF
- ECHO_CLOCK_SUPER
- ECHO_CLOCK_WORD
- ECHO_CMD
- ECHO_COMMIT_WATERMARK
- ECHO_DISCARD_WATERMARK
- ECHO_DLY_REG
- ECHO_MAXAUDIOINPUTS
- ECHO_MAXAUDIOOUTPUTS
- ECHO_MAXAUDIOPIPES
- ECHO_MAXMIDIJACKS
- ECHO_MIDI_QUEUE_SZ
- ECHO_MTC_QUEUE_SZ
- ECHO_OP_ERASE_TAB
- ECHO_OP_MOVE_BACK_COL
- ECHO_OP_SET_CANON_COL
- ECHO_OP_START
- ECHO_REQ
- ECHO_RSP
- ECHO_TIMEOUT_MS
- ECHRNG
- ECLK_DIR_CNTL_EN
- ECLK_DIVIDER_MASK
- ECLK_MCLK_DISTANCE
- ECLK_STATUS
- ECMD
- ECMPHREG
- ECMPLREG
- ECMPMREG
- ECMR
- ECMR_BIT
- ECMR_DM
- ECMR_DPAD
- ECMR_ELB
- ECMR_ILB
- ECMR_MCT
- ECMR_MPDE
- ECMR_PFR
- ECMR_PRCEF
- ECMR_PRM
- ECMR_RCSC
- ECMR_RE
- ECMR_RTM
- ECMR_RXF
- ECMR_RZPF
- ECMR_TE
- ECMR_TRCCM
- ECMR_TXF
- ECMR_ZPF
- ECM_ALDPS
- ECM_CONFIG0_REG_0
- ECM_CONFIG0_REG_0_ADDR
- ECM_CONFIG0_REG_1_ADDR
- ECM_DROP_COUNT
- ECM_MIN_TMO
- ECM_NOTIFY_CONNECT
- ECM_NOTIFY_NONE
- ECM_NOTIFY_SPEED
- ECM_STATUS_BYTECOUNT
- ECM_STATUS_INTERVAL_MS
- ECM_STREAM
- ECN
- ECNTRL_FIFM
- ECNTRL_INIT_SETTINGS
- ECNTRL_R100
- ECNTRL_REDUCED_MII_MODE
- ECNTRL_REDUCED_MODE
- ECNTRL_SGMII_MODE
- ECNTRL_TBI_MODE
- ECN_HORIZON_NS
- ECN_OR_COST
- ECOBITS_PPGTT_CACHE4B
- ECOBITS_PPGTT_CACHE64B
- ECOBITS_SNB_BIT
- ECOBUS
- ECOCHK_DIS_TLB
- ECOCHK_PPGTT_CACHE4B
- ECOCHK_PPGTT_CACHE64B
- ECOCHK_PPGTT_GFDT_IVB
- ECOCHK_PPGTT_LLC_IVB
- ECOCHK_PPGTT_UC_HSW
- ECOCHK_PPGTT_WB_HSW
- ECOCHK_PPGTT_WT_HSW
- ECOCHK_SNB_BIT
- ECOCON
- ECOFF_ROUND
- ECOFF_SEGMENT_ALIGNMENT
- ECOMM
- ECON1
- ECON1_BSEL0
- ECON1_BSEL1
- ECON1_CSUMEN
- ECON1_DMAST
- ECON1_RXEN
- ECON1_RXRST
- ECON1_TXRST
- ECON1_TXRTS
- ECON2
- ECON2_AUTOINC
- ECON2_PKTDEC
- ECON2_PWRSV
- ECON2_VRPS
- ECONNABORTED
- ECONNREFUSED
- ECONNRESET
- ECONTROL
- ECOR
- ECOR_ENABLE
- ECOR_LEVEL_IRQ
- ECOR_RESET
- ECOR_WR_ATTRIB
- ECOSKPD
- ECO_CONSTANT_BUFFER_SR_DISABLE
- ECO_FLIP_DONE
- ECO_GATING_CX_ONLY
- ECO_LED
- ECO_LED_ON
- ECPU_CONTROL_HALT
- ECPU_CTRL
- ECR
- ECRC
- ECRC_POLICY_DEFAULT
- ECRC_POLICY_OFF
- ECRC_POLICY_ON
- ECRDSA_MAX_DIGITS
- ECRDSA_MAX_SIG_SIZE
- ECRYPTFS_AUTH_TOK_FNEK
- ECRYPTFS_AUTH_TOK_INVALID
- ECRYPTFS_CONTAINS_DECRYPTED_KEY
- ECRYPTFS_CONTAINS_ENCRYPTED_KEY
- ECRYPTFS_DAEMON_IN_POLL
- ECRYPTFS_DAEMON_IN_READ
- ECRYPTFS_DAEMON_MISCDEV_OPEN
- ECRYPTFS_DAEMON_ZOMBIE
- ECRYPTFS_DEFAULT_CIPHER
- ECRYPTFS_DEFAULT_EXTENT_SIZE
- ECRYPTFS_DEFAULT_HASH
- ECRYPTFS_DEFAULT_IV_BYTES
- ECRYPTFS_DEFAULT_KEY_BYTES
- ECRYPTFS_DEFAULT_MSG_CTX_ELEMS
- ECRYPTFS_DEFAULT_NUM_USERS
- ECRYPTFS_DEFAULT_SEND_TIMEOUT
- ECRYPTFS_DONT_VALIDATE_HEADER_SIZE
- ECRYPTFS_ENABLE_HMAC
- ECRYPTFS_ENCFN_USE_FEK
- ECRYPTFS_ENCFN_USE_MOUNT_FNEK
- ECRYPTFS_ENCRYPTED
- ECRYPTFS_ENCRYPTED_DENTRY_NAME_LEN
- ECRYPTFS_ENCRYPTED_VIEW_ENABLED
- ECRYPTFS_ENCRYPT_FILENAMES
- ECRYPTFS_ENCRYPT_IV_PAGES
- ECRYPTFS_ENCRYPT_ONLY
- ECRYPTFS_FEK_ENCRYPTED_FILENAME_PREFIX
- ECRYPTFS_FEK_ENCRYPTED_FILENAME_PREFIX_SIZE
- ECRYPTFS_FILENAME_CONTAINS_DECRYPTED
- ECRYPTFS_FILENAME_MIN_RANDOM_PREPEND_BYTES
- ECRYPTFS_FILE_SIZE_BYTES
- ECRYPTFS_FILE_VERSION
- ECRYPTFS_FNEK_ENCRYPTED_FILENAME_PREFIX
- ECRYPTFS_FNEK_ENCRYPTED_FILENAME_PREFIX_SIZE
- ECRYPTFS_GLOBAL_ENCFN_USE_FEK
- ECRYPTFS_GLOBAL_ENCFN_USE_MOUNT_FNEK
- ECRYPTFS_GLOBAL_ENCRYPT_FILENAMES
- ECRYPTFS_GLOBAL_MOUNT_AUTH_TOK_ONLY
- ECRYPTFS_I_SIZE_INITIALIZED
- ECRYPTFS_KERNEL_H
- ECRYPTFS_KEY_SET
- ECRYPTFS_KEY_VALID
- ECRYPTFS_KTHREAD_ZOMBIE
- ECRYPTFS_MAX_CIPHER_NAME_SIZE
- ECRYPTFS_MAX_ENCRYPTED_KEY_BYTES
- ECRYPTFS_MAX_IV_BYTES
- ECRYPTFS_MAX_KEYSET_SIZE
- ECRYPTFS_MAX_KEY_BYTES
- ECRYPTFS_MAX_MSG_CTX_TTL
- ECRYPTFS_MAX_NUM_ENC_KEYS
- ECRYPTFS_MAX_NUM_USERS
- ECRYPTFS_MAX_PASSPHRASE_BYTES
- ECRYPTFS_MAX_PASSWORD_LENGTH
- ECRYPTFS_MAX_PKI_NAME_BYTES
- ECRYPTFS_MAX_PKT_LEN_SIZE
- ECRYPTFS_MAX_SCATTERLIST_LEN
- ECRYPTFS_METADATA_IN_XATTR
- ECRYPTFS_MINIMUM_HEADER_EXTENT_SIZE
- ECRYPTFS_MIN_PKT_LEN_SIZE
- ECRYPTFS_MOUNT_CRYPT_STAT_INITIALIZED
- ECRYPTFS_MSG_CTX_STATE_DONE
- ECRYPTFS_MSG_CTX_STATE_FREE
- ECRYPTFS_MSG_CTX_STATE_NO_REPLY
- ECRYPTFS_MSG_CTX_STATE_PENDING
- ECRYPTFS_MSG_HELO
- ECRYPTFS_MSG_QUIT
- ECRYPTFS_MSG_REQUEST
- ECRYPTFS_MSG_RESPONSE
- ECRYPTFS_NON_NULL
- ECRYPTFS_PASSWORD
- ECRYPTFS_PASSWORD_SIG_SIZE
- ECRYPTFS_PERSISTENT_PASSWORD
- ECRYPTFS_PLAINTEXT_PASSTHROUGH_ENABLED
- ECRYPTFS_POLICY_APPLIED
- ECRYPTFS_PREPARE_COMMIT_MODE
- ECRYPTFS_PRIVATE_KEY
- ECRYPTFS_SALT_BYTES
- ECRYPTFS_SALT_SIZE
- ECRYPTFS_SALT_SIZE_HEX
- ECRYPTFS_SECURITY_WARNING
- ECRYPTFS_SESSION_KEY_ENCRYPTION_KEY_SET
- ECRYPTFS_SIG_SIZE
- ECRYPTFS_SIG_SIZE_HEX
- ECRYPTFS_SIZE_AND_MARKER_BYTES
- ECRYPTFS_STRUCT_INITIALIZED
- ECRYPTFS_SUPER_MAGIC
- ECRYPTFS_SUPPORTED_FILE_VERSION
- ECRYPTFS_TAG_11_PACKET_TYPE
- ECRYPTFS_TAG_1_PACKET_TYPE
- ECRYPTFS_TAG_3_PACKET_TYPE
- ECRYPTFS_TAG_64_PACKET_TYPE
- ECRYPTFS_TAG_65_PACKET_TYPE
- ECRYPTFS_TAG_66_PACKET_TYPE
- ECRYPTFS_TAG_67_PACKET_TYPE
- ECRYPTFS_TAG_70_DIGEST
- ECRYPTFS_TAG_70_DIGEST_SIZE
- ECRYPTFS_TAG_70_MAX_METADATA_SIZE
- ECRYPTFS_TAG_70_MIN_METADATA_SIZE
- ECRYPTFS_TAG_70_PACKET_TYPE
- ECRYPTFS_TAG_71_PACKET_TYPE
- ECRYPTFS_TAG_72_PACKET_TYPE
- ECRYPTFS_TAG_73_PACKET_TYPE
- ECRYPTFS_UNLINK_SIGS
- ECRYPTFS_USERSPACE_SHOULD_TRY_TO_DECRYPT
- ECRYPTFS_USERSPACE_SHOULD_TRY_TO_ENCRYPT
- ECRYPTFS_VALIDATE_HEADER_SIZE
- ECRYPTFS_VERSIONING_DEVMISC
- ECRYPTFS_VERSIONING_FILENAME_ENCRYPTION
- ECRYPTFS_VERSIONING_GCM
- ECRYPTFS_VERSIONING_HMAC
- ECRYPTFS_VERSIONING_MASK
- ECRYPTFS_VERSIONING_MASK_MESSAGING
- ECRYPTFS_VERSIONING_MULTKEY
- ECRYPTFS_VERSIONING_PASSPHRASE
- ECRYPTFS_VERSIONING_PLAINTEXT_PASSTHROUGH
- ECRYPTFS_VERSIONING_POLICY
- ECRYPTFS_VERSIONING_PUBKEY
- ECRYPTFS_VERSIONING_XATTR
- ECRYPTFS_VERSION_MAJOR
- ECRYPTFS_VERSION_MINOR
- ECRYPTFS_VIEW_AS_ENCRYPTED
- ECRYPTFS_WRITEPAGE_MODE
- ECRYPTFS_XATTR_METADATA_ENABLED
- ECRYPTFS_XATTR_NAME
- ECR_BI
- ECR_CAP_MASK
- ECR_CNF
- ECR_C_BIT_DTLB_LD_MISS
- ECR_C_BIT_DTLB_ST_MISS
- ECR_C_BIT_PROTV_MISALIG_DATA
- ECR_C_MCHK_DUP_TLB
- ECR_C_PROTV_INST_FETCH
- ECR_C_PROTV_LOAD
- ECR_C_PROTV_MISALIG_DATA
- ECR_C_PROTV_STORE
- ECR_C_PROTV_XCHG
- ECR_DMAEN
- ECR_ECP
- ECR_EPP
- ECR_F_EMPTY
- ECR_F_FULL
- ECR_GPFE
- ECR_IMONE
- ECR_INIT_VAL
- ECR_MODE_CFG
- ECR_MODE_ECP
- ECR_MODE_EPP
- ECR_MODE_MASK
- ECR_MODE_PPF
- ECR_MODE_PS2
- ECR_MODE_SHIFT
- ECR_MODE_SPP
- ECR_MODE_TST
- ECR_OFFSET
- ECR_PPF
- ECR_PS2
- ECR_REC_MASK
- ECR_REC_SHIFT
- ECR_RP
- ECR_SERVINTR
- ECR_SPP
- ECR_TEC_MASK
- ECR_TEC_SHIFT
- ECR_TST
- ECR_VND
- ECR_V_DTLB_MISS
- ECR_V_INSN_ERR
- ECR_V_ITLB_MISS
- ECR_V_MACH_CHK
- ECR_V_MEM_ERR
- ECR_V_MISALIGN
- ECR_V_PROTV
- ECR_V_TRAP
- ECR_WRITE
- ECR_nERRINTR
- ECS
- ECSIPR
- ECSIPR_BIT
- ECSIPR_BRCRXIP
- ECSIPR_ICDIP
- ECSIPR_LCHNGIP
- ECSIPR_MPDIP
- ECSIPR_PSRTOIP
- ECSIPR_STATUS_MASK_BIT
- ECSR
- ECSR_BASE
- ECSR_BASE_ADDR
- ECSR_BIT
- ECSR_BRCRX
- ECSR_CPU_SHIFT
- ECSR_DEV_BASE
- ECSR_DEV_SHIFT
- ECSR_ICD
- ECSR_INT
- ECSR_IOIS8
- ECSR_LCHNG
- ECSR_MPD
- ECSR_PHYI
- ECSR_PSRTO
- ECSR_PWRDWN
- ECSR_STATUS_BIT
- ECS_BG_CTXT_REG_0
- ECS_BG_CTXT_REG_1
- ECS_BG_CTXT_REG_2
- ECS_DBG_CTXT_REG_0
- ECS_DBG_CTXT_REG_1
- ECS_DBG_CTXT_REG_2
- ECS_DBG_REG_2_IE
- ECS_DBG_REG_2_IF
- ECS_INSTRUCT_REG
- ECS_PRI_1_CTXT_REG_0
- ECS_PRI_1_CTXT_REG_1
- ECS_PRI_1_CTXT_REG_2
- ECS_PRI_2_CTXT_REG_0
- ECS_PRI_2_CTXT_REG_1
- ECS_PRI_2_CTXT_REG_2
- ECS_REG_0_ACTIVE
- ECS_REG_0_LDUR_BITS
- ECS_REG_0_LDUR_MASK
- ECS_REG_0_NEXTPC_MASK
- ECS_REG_1_CCTXT_BITS
- ECS_REG_1_CCTXT_MASK
- ECS_REG_1_SELCTXT_BITS
- ECS_REG_1_SELCTXT_MASK
- ECT1R
- ECT2R
- ECU_AE_THR
- ECU_JUMBO_WM
- ECU_TXFF_LEV
- ECX
- ECX8
- ECX_ACTIVITY_BITS
- ECX_ACTIVITY_SHIFT
- ECX_FAULT_BITS
- ECX_FAULT_SHIFT
- ECX_LOCATE_BITS
- ECX_LOCATE_SHIFT
- EC_ABORTED
- EC_AC3_DATA_SELN
- EC_ACPI_GET_EVENT
- EC_ACPI_MAX_EVENT_SIZE
- EC_ACPI_MAX_EVENT_WORDS
- EC_ACPI_MEM_BATTERY_INDEX
- EC_ACPI_MEM_CHARGING_LIMIT
- EC_ACPI_MEM_CHARGING_LIMIT_DISABLED
- EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA
- EC_ACPI_MEM_DDPN_MASK
- EC_ACPI_MEM_DDPN_SHIFT
- EC_ACPI_MEM_DEVICE_FEATURES0
- EC_ACPI_MEM_DEVICE_FEATURES1
- EC_ACPI_MEM_DEVICE_FEATURES2
- EC_ACPI_MEM_DEVICE_FEATURES3
- EC_ACPI_MEM_DEVICE_FEATURES4
- EC_ACPI_MEM_DEVICE_FEATURES5
- EC_ACPI_MEM_DEVICE_FEATURES6
- EC_ACPI_MEM_DEVICE_FEATURES7
- EC_ACPI_MEM_DEVICE_ORIENTATION
- EC_ACPI_MEM_FAN_DUTY
- EC_ACPI_MEM_KEYBOARD_BACKLIGHT
- EC_ACPI_MEM_MAPPED_BEGIN
- EC_ACPI_MEM_MAPPED_SIZE
- EC_ACPI_MEM_TBMD_MASK
- EC_ACPI_MEM_TBMD_SHIFT
- EC_ACPI_MEM_TEMP_COMMIT
- EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK
- EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK
- EC_ACPI_MEM_TEMP_ID
- EC_ACPI_MEM_TEMP_THRESHOLD
- EC_ACPI_MEM_TEST
- EC_ACPI_MEM_TEST_COMPLIMENT
- EC_ACPI_MEM_USB_PORT_POWER
- EC_ACPI_MEM_VERSION
- EC_ACPI_MEM_VERSION_CURRENT
- EC_ACPI_NOTIFY_EVENT
- EC_ADCCAL
- EC_ADCRSTN
- EC_ALL_EVENTS
- EC_ALS_ENTRIES
- EC_AMB_TEMP
- EC_BASE_TIMEOUT
- EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN
- EC_BATT_FLAG_AC_PRESENT
- EC_BATT_FLAG_BATT_PRESENT
- EC_BATT_FLAG_CHARGING
- EC_BATT_FLAG_DISCHARGING
- EC_BATT_FLAG_INVALID_DATA
- EC_BATT_FLAG_LEVEL_CRITICAL
- EC_BAT_ACR
- EC_BAT_CURRENT
- EC_BAT_EEPROM
- EC_BAT_ERRCODE
- EC_BAT_SERIAL
- EC_BAT_SOC
- EC_BAT_STATUS
- EC_BAT_TEMP
- EC_BAT_VOLTAGE
- EC_BOARDREV0_ADDR
- EC_BOARDREV1_ADDR
- EC_BUFFER_FULL
- EC_CHECKSUM_ADDR
- EC_CMDR_BUSY
- EC_CMDR_CMD
- EC_CMDR_DATA
- EC_CMDR_PENDING
- EC_CMDS
- EC_CMD_ACPI_BURST_DISABLE
- EC_CMD_ACPI_BURST_ENABLE
- EC_CMD_ACPI_QUERY_EVENT
- EC_CMD_ACPI_READ
- EC_CMD_ACPI_WRITE
- EC_CMD_ADC_READ
- EC_CMD_ADD_ENTROPY
- EC_CMD_AP_RESET
- EC_CMD_BATTERY_CUT_OFF
- EC_CMD_BATTERY_GET_DYNAMIC
- EC_CMD_BATTERY_GET_STATIC
- EC_CMD_BATTERY_VENDOR_PARAM
- EC_CMD_BOARD_SPECIFIC_BASE
- EC_CMD_BOARD_SPECIFIC_LAST
- EC_CMD_CEC_GET
- EC_CMD_CEC_SET
- EC_CMD_CEC_WRITE_MSG
- EC_CMD_CHARGER_CONTROL
- EC_CMD_CHARGE_CONTROL
- EC_CMD_CHARGE_CURRENT_LIMIT
- EC_CMD_CHARGE_PORT_COUNT
- EC_CMD_CHARGE_STATE
- EC_CMD_CODEC_I2S
- EC_CMD_CONFIG_POWER_BUTTON
- EC_CMD_CONSOLE_READ
- EC_CMD_CONSOLE_SNAPSHOT
- EC_CMD_CR51_BASE
- EC_CMD_CR51_LAST
- EC_CMD_DEVICE_EVENT
- EC_CMD_EFS_VERIFY
- EC_CMD_ENTERING_MODE
- EC_CMD_EXTERNAL_POWER_LIMIT
- EC_CMD_FLASH_ERASE
- EC_CMD_FLASH_INFO
- EC_CMD_FLASH_PROTECT
- EC_CMD_FLASH_READ
- EC_CMD_FLASH_REGION_INFO
- EC_CMD_FLASH_SELECT
- EC_CMD_FLASH_SPI_INFO
- EC_CMD_FLASH_WRITE
- EC_CMD_FORCE_LID_OPEN
- EC_CMD_FP_CONTEXT
- EC_CMD_FP_ENC_STATUS
- EC_CMD_FP_FRAME
- EC_CMD_FP_INFO
- EC_CMD_FP_MODE
- EC_CMD_FP_PASSTHRU
- EC_CMD_FP_SEED
- EC_CMD_FP_STATS
- EC_CMD_FP_TEMPLATE
- EC_CMD_GET_BOARD_VERSION
- EC_CMD_GET_BUILD_INFO
- EC_CMD_GET_CHIP_INFO
- EC_CMD_GET_CMD_VERSIONS
- EC_CMD_GET_COMMS_STATUS
- EC_CMD_GET_CROS_BOARD_INFO
- EC_CMD_GET_FEATURES
- EC_CMD_GET_KEYBOARD_ID
- EC_CMD_GET_NEXT_EVENT
- EC_CMD_GET_PANIC_INFO
- EC_CMD_GET_PROTOCOL_INFO
- EC_CMD_GET_SKU_ID
- EC_CMD_GET_UPTIME_INFO
- EC_CMD_GET_VERSION
- EC_CMD_GPIO_GET
- EC_CMD_GPIO_SET
- EC_CMD_GSV_PAUSE_IN_S5
- EC_CMD_HANG_DETECT
- EC_CMD_HELLO
- EC_CMD_HIBERNATION_DELAY
- EC_CMD_HOST_EVENT
- EC_CMD_HOST_EVENT_CLEAR
- EC_CMD_HOST_EVENT_CLEAR_B
- EC_CMD_HOST_EVENT_GET_B
- EC_CMD_HOST_EVENT_GET_SCI_MASK
- EC_CMD_HOST_EVENT_GET_SMI_MASK
- EC_CMD_HOST_EVENT_GET_WAKE_MASK
- EC_CMD_HOST_EVENT_SET_SCI_MASK
- EC_CMD_HOST_EVENT_SET_SMI_MASK
- EC_CMD_HOST_EVENT_SET_WAKE_MASK
- EC_CMD_HOST_SLEEP_EVENT
- EC_CMD_I2C_PASSTHRU
- EC_CMD_I2C_PASSTHRU_PROTECT
- EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE
- EC_CMD_I2C_PASSTHRU_PROTECT_STATUS
- EC_CMD_I2C_READ
- EC_CMD_I2C_WRITE
- EC_CMD_KEYBOARD_FACTORY_TEST
- EC_CMD_KEYSCAN_SEQ_CTRL
- EC_CMD_LDO_GET
- EC_CMD_LDO_SET
- EC_CMD_LED_CONTROL
- EC_CMD_LIGHTBAR_CMD
- EC_CMD_MKBP_GET_CONFIG
- EC_CMD_MKBP_INFO
- EC_CMD_MKBP_SET_CONFIG
- EC_CMD_MKBP_SIMULATE_KEY
- EC_CMD_MKBP_STATE
- EC_CMD_MOTION_SENSE_CMD
- EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT
- EC_CMD_PASSTHRU_MAX
- EC_CMD_PASSTHRU_OFFSET
- EC_CMD_PD_CHARGE_PORT_OVERRIDE
- EC_CMD_PD_CHIP_INFO
- EC_CMD_PD_CONTROL
- EC_CMD_PD_EXCHANGE_STATUS
- EC_CMD_PD_GET_LOG_ENTRY
- EC_CMD_PD_HOST_EVENT_STATUS
- EC_CMD_PD_WRITE_LOG_ENTRY
- EC_CMD_PORT
- EC_CMD_PORT80_LAST_BOOT
- EC_CMD_PORT80_READ
- EC_CMD_POWER_INFO
- EC_CMD_PROTO_VERSION
- EC_CMD_PSTORE_INFO
- EC_CMD_PSTORE_READ
- EC_CMD_PSTORE_WRITE
- EC_CMD_PWM_GET_DUTY
- EC_CMD_PWM_GET_FAN_TARGET_RPM
- EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT
- EC_CMD_PWM_SET_DUTY
- EC_CMD_PWM_SET_FAN_DUTY
- EC_CMD_PWM_SET_FAN_TARGET_RPM
- EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT
- EC_CMD_READ_MEMMAP
- EC_CMD_READ_TEST
- EC_CMD_REBOOT
- EC_CMD_REBOOT_EC
- EC_CMD_RESEND_RESPONSE
- EC_CMD_ROLLBACK_INFO
- EC_CMD_RTC_GET_ALARM
- EC_CMD_RTC_GET_VALUE
- EC_CMD_RTC_SET_ALARM
- EC_CMD_RTC_SET_VALUE
- EC_CMD_RWSIG_ACTION
- EC_CMD_RWSIG_CHECK_STATUS
- EC_CMD_SB_FW_UPDATE
- EC_CMD_SB_READ_BLOCK
- EC_CMD_SB_READ_WORD
- EC_CMD_SB_WRITE_BLOCK
- EC_CMD_SB_WRITE_WORD
- EC_CMD_SET_CROS_BOARD_INFO
- EC_CMD_SET_SKU_ID
- EC_CMD_SWITCH_ENABLE_BKLIGHT
- EC_CMD_SWITCH_ENABLE_WIRELESS
- EC_CMD_TEMP_SENSOR_GET_INFO
- EC_CMD_TEST_PROTOCOL
- EC_CMD_THERMAL_AUTO_FAN_CTRL
- EC_CMD_THERMAL_GET_THRESHOLD
- EC_CMD_THERMAL_SET_THRESHOLD
- EC_CMD_TIMEOUT
- EC_CMD_TMP006_GET_CALIBRATION
- EC_CMD_TMP006_GET_RAW
- EC_CMD_TMP006_SET_CALIBRATION
- EC_CMD_TP_FRAME_GET
- EC_CMD_TP_FRAME_INFO
- EC_CMD_TP_FRAME_SNAPSHOT
- EC_CMD_TP_SELF_TEST
- EC_CMD_USB_CHARGE_SET_MODE
- EC_CMD_USB_MUX
- EC_CMD_USB_PD_CONTROL
- EC_CMD_USB_PD_DEV_INFO
- EC_CMD_USB_PD_DISCOVERY
- EC_CMD_USB_PD_FW_UPDATE
- EC_CMD_USB_PD_GET_AMODE
- EC_CMD_USB_PD_MUX_INFO
- EC_CMD_USB_PD_PORTS
- EC_CMD_USB_PD_POWER_INFO
- EC_CMD_USB_PD_RW_HASH_ENTRY
- EC_CMD_USB_PD_SET_AMODE
- EC_CMD_VBNV_CONTEXT
- EC_CMD_VBOOT_HASH
- EC_CMD_VERSION0
- EC_CMD_VSTORE_INFO
- EC_CMD_VSTORE_READ
- EC_CMD_VSTORE_WRITE
- EC_CMOS_TOD_READ
- EC_CMOS_TOD_WRITE
- EC_CODEC_GET_GAIN
- EC_CODEC_I2S_ENABLE
- EC_CODEC_I2S_SET_BCLK
- EC_CODEC_I2S_SET_CONFIG
- EC_CODEC_I2S_SET_TDM_CONFIG
- EC_CODEC_I2S_SUBCMD_COUNT
- EC_CODEC_SAMPLE_DEPTH_16
- EC_CODEC_SAMPLE_DEPTH_24
- EC_CODEC_SET_GAIN
- EC_CODEC_SET_SAMPLE_DEPTH
- EC_COMMAND_CMOS
- EC_COMMAND_PROTOCOL_3
- EC_COMMAND_RETRIES
- EC_COMMS_STATUS_PROCESSING
- EC_COMM_TEXT_MAX
- EC_CONNECT
- EC_CURRENT_PROM_VERSION
- EC_DACCAL
- EC_DACMUTEN
- EC_DAI_FMT_I2S
- EC_DAI_FMT_LEFT_J
- EC_DAI_FMT_PCM_A
- EC_DAI_FMT_PCM_B
- EC_DAI_FMT_PCM_TDM
- EC_DAI_FMT_RIGHT_J
- EC_DATA_REG
- EC_DAT_PORT
- EC_DBG_DRV
- EC_DBG_EVT
- EC_DBG_REQ
- EC_DBG_SEP
- EC_DBG_STM
- EC_DCON_POWER_MODE
- EC_DEFAULT_ADC_GAIN
- EC_DEFAULT_SPDIF0_SEL
- EC_DEFAULT_SPDIF1_SEL
- EC_DESC_FLAG_NO_ID
- EC_DESC_FLAG_RESOLVED
- EC_DEVICE_EVENT_DSP
- EC_DEVICE_EVENT_MASK
- EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS
- EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS
- EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS
- EC_DEVICE_EVENT_TRACKPAD
- EC_DEVICE_EVENT_WIFI
- EC_DISCONNECT
- EC_EECLK
- EC_EECS
- EC_EEPROM_SIZE
- EC_EESDO
- EC_EE_CNTRL_SELN
- EC_EE_DATA_SEL
- EC_ERR_GROUP_FUNC_REG
- EC_ERR_GROUP_SCR_REG
- EC_ERR_STATUS_DESC_MAX_NUM
- EC_ERR_TYPE_CLOCK_MONITOR
- EC_ERR_TYPE_COMPARATOR
- EC_ERR_TYPE_ECC_DED_INTERNAL
- EC_ERR_TYPE_ECC_SEC_INTERNAL
- EC_ERR_TYPE_OTHER_HW_CORRECTABLE
- EC_ERR_TYPE_OTHER_HW_UNCORRECTABLE
- EC_ERR_TYPE_PARITY_INTERNAL
- EC_ERR_TYPE_PARITY_SRAM
- EC_ERR_TYPE_REGISTER_PARITY
- EC_ERR_TYPE_SW_CORRECTABLE
- EC_ERR_TYPE_SW_UNCORRECTABLE
- EC_ERR_TYPE_VOLTAGE_MONITOR
- EC_EVENT_REG
- EC_EXT_SCI_QUERY
- EC_FAN_SPEED_ENTRIES
- EC_FAN_SPEED_NOT_PRESENT
- EC_FAN_SPEED_STALLED
- EC_FEATURE_AUDIO_CODEC
- EC_FEATURE_BATTERY
- EC_FEATURE_BKLIGHT_SWITCH
- EC_FEATURE_CEC
- EC_FEATURE_CHARGER
- EC_FEATURE_DEVICE_EVENT
- EC_FEATURE_EXEC_IN_RAM
- EC_FEATURE_FINGERPRINT
- EC_FEATURE_FLASH
- EC_FEATURE_GPIO
- EC_FEATURE_HANG_DETECT
- EC_FEATURE_HOST_EVENT64
- EC_FEATURE_HOST_EVENTS
- EC_FEATURE_I2C
- EC_FEATURE_ISH
- EC_FEATURE_KEYB
- EC_FEATURE_LED
- EC_FEATURE_LIGHTBAR
- EC_FEATURE_LIMITED
- EC_FEATURE_MASK_0
- EC_FEATURE_MASK_1
- EC_FEATURE_MOTION_SENSE
- EC_FEATURE_MOTION_SENSE_FIFO
- EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS
- EC_FEATURE_PMU
- EC_FEATURE_PORT80
- EC_FEATURE_PSTORE
- EC_FEATURE_PWM_FAN
- EC_FEATURE_PWM_KEYB
- EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS
- EC_FEATURE_RTC
- EC_FEATURE_RWSIG
- EC_FEATURE_SCP
- EC_FEATURE_SMART_BATTERY
- EC_FEATURE_SUB_MCU
- EC_FEATURE_THERMAL
- EC_FEATURE_TOUCHPAD
- EC_FEATURE_UNIFIED_WAKE_MASKS
- EC_FEATURE_USBC_SS_MUX_VIRTUAL
- EC_FEATURE_USB_MUX
- EC_FEATURE_USB_PD
- EC_FEATURE_VSTORE
- EC_FEATURE_WIFI_SWITCH
- EC_FIFO_OFFSET
- EC_FIRMWARE_REV
- EC_FLAGS_EC_HANDLER_INSTALLED
- EC_FLAGS_EVT_HANDLER_INSTALLED
- EC_FLAGS_GPE_HANDLER_INSTALLED
- EC_FLAGS_GPE_MASKED
- EC_FLAGS_QUERY_ENABLED
- EC_FLAGS_QUERY_GUARDING
- EC_FLAGS_QUERY_PENDING
- EC_FLAGS_STARTED
- EC_FLAGS_STOPPED
- EC_FLASH_INFO_ERASE_TO_0
- EC_FLASH_INFO_SELECT_REQUIRED
- EC_FLASH_PROTECT_ALL_AT_BOOT
- EC_FLASH_PROTECT_ALL_NOW
- EC_FLASH_PROTECT_ERROR_INCONSISTENT
- EC_FLASH_PROTECT_ERROR_STUCK
- EC_FLASH_PROTECT_GPIO_ASSERTED
- EC_FLASH_PROTECT_ROLLBACK_AT_BOOT
- EC_FLASH_PROTECT_ROLLBACK_NOW
- EC_FLASH_PROTECT_RO_AT_BOOT
- EC_FLASH_PROTECT_RO_NOW
- EC_FLASH_PROTECT_RW_AT_BOOT
- EC_FLASH_PROTECT_RW_NOW
- EC_FLASH_REGION_ACTIVE
- EC_FLASH_REGION_COUNT
- EC_FLASH_REGION_RO
- EC_FLASH_REGION_RW
- EC_FLASH_REGION_UPDATE
- EC_FLASH_REGION_WP_RO
- EC_FLASH_WRITE_VER0_SIZE
- EC_FP_FLAG_NOT_COMPLETE
- EC_FUNCTION_MASK
- EC_GDI0
- EC_GDI1
- EC_GPIO_GET_BY_NAME
- EC_GPIO_GET_COUNT
- EC_GPIO_GET_INFO
- EC_GSV_PARAM_MASK
- EC_GSV_SET
- EC_HANG_START_NOW
- EC_HANG_START_ON_LID_CLOSE
- EC_HANG_START_ON_LID_OPEN
- EC_HANG_START_ON_POWER_PRESS
- EC_HANG_START_ON_RESUME
- EC_HANG_STOP_NOW
- EC_HANG_STOP_ON_HOST_COMMAND
- EC_HANG_STOP_ON_POWER_RELEASE
- EC_HANG_STOP_ON_SUSPEND
- EC_HIT
- EC_HOST_ARGS_FLAG_FROM_HOST
- EC_HOST_ARGS_FLAG_TO_HOST
- EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED
- EC_HOST_CMD_FLAG_VERSION_3
- EC_HOST_CMD_REGION0
- EC_HOST_CMD_REGION1
- EC_HOST_CMD_REGION_SIZE
- EC_HOST_EVENT_ACTIVE_WAKE_MASK
- EC_HOST_EVENT_AC_CONNECTED
- EC_HOST_EVENT_AC_DISCONNECTED
- EC_HOST_EVENT_ALWAYS_REPORT_MASK
- EC_HOST_EVENT_B
- EC_HOST_EVENT_BATTERY
- EC_HOST_EVENT_BATTERY_CRITICAL
- EC_HOST_EVENT_BATTERY_LOW
- EC_HOST_EVENT_BATTERY_SHUTDOWN
- EC_HOST_EVENT_BATTERY_STATUS
- EC_HOST_EVENT_CLEAR
- EC_HOST_EVENT_DEVICE
- EC_HOST_EVENT_GET
- EC_HOST_EVENT_HANG_DETECT
- EC_HOST_EVENT_HANG_REBOOT
- EC_HOST_EVENT_INTERFACE_READY
- EC_HOST_EVENT_INVALID
- EC_HOST_EVENT_KEYBOARD_FASTBOOT
- EC_HOST_EVENT_KEYBOARD_RECOVERY
- EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT
- EC_HOST_EVENT_KEY_PRESSED
- EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX
- EC_HOST_EVENT_LAZY_WAKE_MASK_S3
- EC_HOST_EVENT_LAZY_WAKE_MASK_S5
- EC_HOST_EVENT_LID_CLOSED
- EC_HOST_EVENT_LID_OPEN
- EC_HOST_EVENT_MAIN
- EC_HOST_EVENT_MASK
- EC_HOST_EVENT_MKBP
- EC_HOST_EVENT_MODE_CHANGE
- EC_HOST_EVENT_PANIC
- EC_HOST_EVENT_PD_MCU
- EC_HOST_EVENT_POWER_BUTTON
- EC_HOST_EVENT_RTC
- EC_HOST_EVENT_SCI_MASK
- EC_HOST_EVENT_SET
- EC_HOST_EVENT_SMI_MASK
- EC_HOST_EVENT_THERMAL
- EC_HOST_EVENT_THERMAL_SHUTDOWN
- EC_HOST_EVENT_THERMAL_THRESHOLD
- EC_HOST_EVENT_THROTTLE_START
- EC_HOST_EVENT_THROTTLE_STOP
- EC_HOST_EVENT_USB_CHARGER
- EC_HOST_EVENT_USB_MUX
- EC_HOST_PARAM_SIZE
- EC_HOST_REQUEST_VERSION
- EC_HOST_RESPONSE_VERSION
- EC_HOST_RESUME_SLEEP_TIMEOUT
- EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK
- EC_HOST_SLEEP_TIMEOUT_DEFAULT
- EC_HOST_SLEEP_TIMEOUT_INFINITE
- EC_I2C_ADDR_MASK
- EC_I2C_FLAG_READ
- EC_I2C_STATUS_ERROR
- EC_I2C_STATUS_NAK
- EC_I2C_STATUS_TIMEOUT
- EC_ILLEGAL_COMMAND
- EC_ILLEGAL_CONTROL
- EC_IMAGE_RO
- EC_IMAGE_RW
- EC_IMAGE_UNKNOWN
- EC_INDEX_REG
- EC_IO_PORT_DATA
- EC_IO_PORT_HIGH
- EC_IO_PORT_LOW
- EC_IT_HIT
- EC_KEYSCAN_SEQ_ADD
- EC_KEYSCAN_SEQ_CLEAR
- EC_KEYSCAN_SEQ_COLLECT
- EC_KEYSCAN_SEQ_FLAG_DONE
- EC_KEYSCAN_SEQ_START
- EC_KEYSCAN_SEQ_STATUS
- EC_LAST_PROMFILE_ADDR
- EC_LB_PROG_LEN
- EC_LDO_STATE_OFF
- EC_LDO_STATE_ON
- EC_LEDN
- EC_LED_COLOR_AMBER
- EC_LED_COLOR_BLUE
- EC_LED_COLOR_COUNT
- EC_LED_COLOR_GREEN
- EC_LED_COLOR_RED
- EC_LED_COLOR_WHITE
- EC_LED_COLOR_YELLOW
- EC_LED_FLAGS_AUTO
- EC_LED_FLAGS_QUERY
- EC_LED_ID_ADAPTER_LED
- EC_LED_ID_BATTERY_LED
- EC_LED_ID_COUNT
- EC_LED_ID_LEFT_LED
- EC_LED_ID_POWER_LED
- EC_LED_ID_RECOVERY_HW_REINIT_LED
- EC_LED_ID_RIGHT_LED
- EC_LED_ID_SYSRQ_DEBUG_LED
- EC_LEN
- EC_LPC_ADDR_ACPI_CMD
- EC_LPC_ADDR_ACPI_DATA
- EC_LPC_ADDR_HOST_ARGS
- EC_LPC_ADDR_HOST_CMD
- EC_LPC_ADDR_HOST_DATA
- EC_LPC_ADDR_HOST_PACKET
- EC_LPC_ADDR_HOST_PARAM
- EC_LPC_ADDR_MEMMAP
- EC_LPC_ADDR_OLD_PARAM
- EC_LPC_CMDR_ACPI_BRST
- EC_LPC_CMDR_BUSY
- EC_LPC_CMDR_CMD
- EC_LPC_CMDR_DATA
- EC_LPC_CMDR_PENDING
- EC_LPC_CMDR_SCI
- EC_LPC_CMDR_SMI
- EC_LPC_HOST_PACKET_SIZE
- EC_LPC_STATUS_BURST_MODE
- EC_LPC_STATUS_BUSY_MASK
- EC_LPC_STATUS_FROM_HOST
- EC_LPC_STATUS_LAST_CMD
- EC_LPC_STATUS_PROCESSING
- EC_LPC_STATUS_RESERVED
- EC_LPC_STATUS_SCI_PENDING
- EC_LPC_STATUS_SMI_PENDING
- EC_LPC_STATUS_TO_HOST
- EC_MAC_OFFSET
- EC_MAILBOX_DATA_EXTRA
- EC_MAILBOX_DATA_SIZE
- EC_MAILBOX_PROTO_VERSION
- EC_MAILBOX_START_COMMAND
- EC_MAILBOX_TIMEOUT
- EC_MAILBOX_VERSION
- EC_MAX_CMD_ARGS
- EC_MAX_CMD_DATA_LEN
- EC_MAX_CMD_REPLY
- EC_MAX_MSG_BYTES
- EC_MAX_REQUEST_OVERHEAD
- EC_MAX_RESPONSE_OVERHEAD
- EC_MAX_RESP_LEN
- EC_MEMMAP_ACC_DATA
- EC_MEMMAP_ACC_STATUS
- EC_MEMMAP_ACC_STATUS_BUSY_BIT
- EC_MEMMAP_ACC_STATUS_PRESENCE_BIT
- EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK
- EC_MEMMAP_ALS
- EC_MEMMAP_BATTERY_VERSION
- EC_MEMMAP_BATT_CAP
- EC_MEMMAP_BATT_CCNT
- EC_MEMMAP_BATT_COUNT
- EC_MEMMAP_BATT_DCAP
- EC_MEMMAP_BATT_DVLT
- EC_MEMMAP_BATT_FLAG
- EC_MEMMAP_BATT_INDEX
- EC_MEMMAP_BATT_LFCC
- EC_MEMMAP_BATT_MFGR
- EC_MEMMAP_BATT_MODEL
- EC_MEMMAP_BATT_RATE
- EC_MEMMAP_BATT_SERIAL
- EC_MEMMAP_BATT_TYPE
- EC_MEMMAP_BATT_VOLT
- EC_MEMMAP_EVENTS_VERSION
- EC_MEMMAP_FAN
- EC_MEMMAP_GYRO_DATA
- EC_MEMMAP_HOST_CMD_FLAGS
- EC_MEMMAP_HOST_EVENTS
- EC_MEMMAP_ID
- EC_MEMMAP_ID_VERSION
- EC_MEMMAP_NO_ACPI
- EC_MEMMAP_SIZE
- EC_MEMMAP_SWITCHES
- EC_MEMMAP_SWITCHES_VERSION
- EC_MEMMAP_TEMP_SENSOR
- EC_MEMMAP_TEMP_SENSOR_B
- EC_MEMMAP_TEXT_MAX
- EC_MEMMAP_THERMAL_VERSION
- EC_MII_OFFSET
- EC_MKBP_BASE_ATTACHED
- EC_MKBP_CEC_SEND_FAILED
- EC_MKBP_CEC_SEND_OK
- EC_MKBP_EVENT_BUTTON
- EC_MKBP_EVENT_CEC_EVENT
- EC_MKBP_EVENT_CEC_MESSAGE
- EC_MKBP_EVENT_COUNT
- EC_MKBP_EVENT_FINGERPRINT
- EC_MKBP_EVENT_HOST_EVENT
- EC_MKBP_EVENT_HOST_EVENT64
- EC_MKBP_EVENT_KEY_MATRIX
- EC_MKBP_EVENT_SENSOR_FIFO
- EC_MKBP_EVENT_SWITCH
- EC_MKBP_EVENT_SYSRQ
- EC_MKBP_EVENT_TYPE_MASK
- EC_MKBP_FLAGS_ENABLE
- EC_MKBP_FP_ENROLL
- EC_MKBP_FP_ENROLL_PROGRESS
- EC_MKBP_FP_ENROLL_PROGRESS_OFFSET
- EC_MKBP_FP_ERRCODE
- EC_MKBP_FP_ERR_ENROLL_IMMOBILE
- EC_MKBP_FP_ERR_ENROLL_INTERNAL
- EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE
- EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY
- EC_MKBP_FP_ERR_ENROLL_OK
- EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK
- EC_MKBP_FP_ERR_MATCH_NO
- EC_MKBP_FP_ERR_MATCH_NO_INTERNAL
- EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE
- EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY
- EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES
- EC_MKBP_FP_ERR_MATCH_YES
- EC_MKBP_FP_ERR_MATCH_YES_UPDATED
- EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED
- EC_MKBP_FP_FINGER_DOWN
- EC_MKBP_FP_FINGER_UP
- EC_MKBP_FP_IMAGE_READY
- EC_MKBP_FP_MATCH
- EC_MKBP_FP_MATCH_IDX
- EC_MKBP_FP_MATCH_IDX_MASK
- EC_MKBP_FP_MATCH_IDX_OFFSET
- EC_MKBP_FP_RAW_EVENT
- EC_MKBP_HAS_MORE_EVENTS
- EC_MKBP_HAS_MORE_EVENTS_SHIFT
- EC_MKBP_INFO_CURRENT
- EC_MKBP_INFO_KBD
- EC_MKBP_INFO_SUPPORTED
- EC_MKBP_LID_OPEN
- EC_MKBP_POWER_BUTTON
- EC_MKBP_RECOVERY
- EC_MKBP_TABLET_MODE
- EC_MKBP_VALID_DEBOUNCE_DOWN
- EC_MKBP_VALID_DEBOUNCE_UP
- EC_MKBP_VALID_FIFO_MAX_DEPTH
- EC_MKBP_VALID_MIN_POST_SCAN_DELAY
- EC_MKBP_VALID_OUTPUT_SETTLE
- EC_MKBP_VALID_POLL_TIMEOUT
- EC_MKBP_VALID_SCAN_PERIOD
- EC_MKBP_VOL_DOWN
- EC_MKBP_VOL_UP
- EC_MOTION_SENSE_INVALID_CALIB_TEMP
- EC_MOTION_SENSE_NO_VALUE
- EC_MSG_DEADLINE_MS
- EC_MSG_HEADER
- EC_MSG_PREAMBLE_COUNT
- EC_MSG_RX_PROTO_BYTES
- EC_MSG_TIMEOUT_MS
- EC_MSG_TX_HEADER_BYTES
- EC_MSG_TX_PROTO_BYTES
- EC_MSG_TX_TRAILER_BYTES
- EC_NO_ERROR
- EC_NO_RESPONSE
- EC_NUM_CONTROL_BITS
- EC_OC_REG_AVR_ASH_CNT__A
- EC_OC_REG_AVR_BSH_CNT__A
- EC_OC_REG_COMM_EXEC_CTL_ACTIVE
- EC_OC_REG_COMM_EXEC_CTL_HOLD
- EC_OC_REG_COMM_EXEC__A
- EC_OC_REG_COMM_INT_STA__A
- EC_OC_REG_DTO_INC_HIP__A
- EC_OC_REG_DTO_INC_LOP__A
- EC_OC_REG_IPR_INV_MPG__A
- EC_OC_REG_OCR_MON_UOS_CLK_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_0_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_1_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_2_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_3_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_4_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_5_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_6_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_7_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_8_ENABLE
- EC_OC_REG_OCR_MON_UOS_DAT_9_ENABLE
- EC_OC_REG_OCR_MON_UOS_VAL_ENABLE
- EC_OC_REG_OCR_MON_UOS__A
- EC_OC_REG_OCR_MON_WRI_INIT
- EC_OC_REG_OCR_MON_WRI__A
- EC_OC_REG_OCR_MPG_UOS_INIT
- EC_OC_REG_OCR_MPG_UOS__A
- EC_OC_REG_OCR_MPG_UOS__M
- EC_OC_REG_OCR_MPG_USR_DAT__A
- EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR
- EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE
- EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE
- EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M
- EC_OC_REG_OC_MODE_HIP__A
- EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC_STATIC
- EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC__M
- EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL
- EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M
- EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE
- EC_OC_REG_OC_MODE_LOP_PAR_ENA_ENABLE
- EC_OC_REG_OC_MODE_LOP_PAR_ENA__M
- EC_OC_REG_OC_MODE_LOP__A
- EC_OC_REG_OC_MON_SIO__A
- EC_OC_REG_OC_MPG_SIO__A
- EC_OC_REG_OC_MPG_SIO__M
- EC_OC_REG_RCN_CLP_HIP__A
- EC_OC_REG_RCN_CLP_LOP__A
- EC_OC_REG_RCN_CRA_HIP__A
- EC_OC_REG_RCN_CRA_LOP__A
- EC_OC_REG_RCN_CST_HIP__A
- EC_OC_REG_RCN_CST_LOP__A
- EC_OC_REG_RCN_GAI_LVL__A
- EC_OC_REG_RCN_MAP_HIP__A
- EC_OC_REG_RCN_MAP_LOP__A
- EC_OC_REG_RCN_MODE__A
- EC_OC_REG_RCN_SET_LVL__A
- EC_OC_REG_SNC_ISC_LVL_OSC__M
- EC_OC_REG_SNC_ISC_LVL__A
- EC_OC_REG_TMD_CUR_CNT__A
- EC_OC_REG_TMD_HIL_MAR__A
- EC_OC_REG_TMD_LOL_MAR__A
- EC_OC_REG_TMD_TOP_CNT__A
- EC_OC_REG_TMD_TOP_MODE__A
- EC_OD_DEINT_RAM__A
- EC_OD_REG_COMM_EXEC__A
- EC_OD_REG_SYNC__A
- EC_OLD_PARAM_SIZE
- EC_OP_GET
- EC_OP_SET
- EC_PACKET4_0_IS_RESPONSE_MASK
- EC_PACKET4_0_SEQ_DUP_MASK
- EC_PACKET4_0_SEQ_NUM_MASK
- EC_PACKET4_0_SEQ_NUM_SHIFT
- EC_PACKET4_0_STRUCT_VERSION_MASK
- EC_PACKET4_1_COMMAND_VERSION_MASK
- EC_PACKET4_1_DATA_CRC_PRESENT_MASK
- EC_PAGE_REG
- EC_PATH_TEST
- EC_PORT80_GET_INFO
- EC_PORT80_READ_BUFFER
- EC_PORT80_SIZE_MAX
- EC_POS
- EC_POWER_BUTTON_ENABLE_PULSE
- EC_POWER_LIMIT_NONE
- EC_PRIVATE_HOST_COMMAND_VALUE
- EC_PROM_VERSION_ADDR
- EC_PROTO2_MAX_PARAM_SIZE
- EC_PROTO2_MAX_REQUEST_SIZE
- EC_PROTO2_MAX_RESPONSE_SIZE
- EC_PROTO2_MSG_BYTES
- EC_PROTO2_REQUEST_HEADER_BYTES
- EC_PROTO2_REQUEST_OVERHEAD
- EC_PROTO2_REQUEST_TRAILER_BYTES
- EC_PROTO2_RESPONSE_HEADER_BYTES
- EC_PROTO2_RESPONSE_OVERHEAD
- EC_PROTO2_RESPONSE_TRAILER_BYTES
- EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED
- EC_PROTO_VERSION
- EC_PROTO_VERSION_UNKNOWN
- EC_PSTORE_SIZE_MAX
- EC_PWM_MAX_DUTY
- EC_PWM_TYPE_COUNT
- EC_PWM_TYPE_DISPLAY_LIGHT
- EC_PWM_TYPE_GENERIC
- EC_PWM_TYPE_KB_LIGHT
- EC_RAW_RUN_MODE
- EC_RD_HIT
- EC_READ_EB_MODE
- EC_REBOOT_CANCEL
- EC_REBOOT_COLD
- EC_REBOOT_DELAY_MS
- EC_REBOOT_DISABLE_JUMP
- EC_REBOOT_FLAG_ON_AP_SHUTDOWN
- EC_REBOOT_FLAG_RESERVED0
- EC_REBOOT_FLAG_SWITCH_RW_SLOT
- EC_REBOOT_HIBERNATE
- EC_REBOOT_HIBERNATE_CLEAR_AP_OFF
- EC_REBOOT_JUMP_RO
- EC_REBOOT_JUMP_RW
- EC_REF
- EC_REG_DELAY
- EC_RES_ACCESS_DENIED
- EC_RES_BUSY
- EC_RES_BUS_ERROR
- EC_RES_DUP_UNAVAILABLE
- EC_RES_ERROR
- EC_RES_INVALID_CHECKSUM
- EC_RES_INVALID_COMMAND
- EC_RES_INVALID_DATA_CRC
- EC_RES_INVALID_HEADER
- EC_RES_INVALID_HEADER_CRC
- EC_RES_INVALID_HEADER_VERSION
- EC_RES_INVALID_PARAM
- EC_RES_INVALID_RESPONSE
- EC_RES_INVALID_VERSION
- EC_RES_IN_PROGRESS
- EC_RES_OVERFLOW
- EC_RES_REQUEST_TRUNCATED
- EC_RES_RESPONSE_TOO_BIG
- EC_RES_SUCCESS
- EC_RES_TIMEOUT
- EC_RES_UNAVAILABLE
- EC_RS_EC_RAM__A
- EC_RS_REG_COMM_EXEC__A
- EC_RS_REG_REQ_PCK_CNT__A
- EC_RS_REG_VAL_PCK
- EC_RS_REG_VAL__A
- EC_RTC_ALARM_CLEAR
- EC_SB_FW_UPDATE_BEGIN
- EC_SB_FW_UPDATE_END
- EC_SB_FW_UPDATE_INFO
- EC_SB_FW_UPDATE_MAX
- EC_SB_FW_UPDATE_PREPARE
- EC_SB_FW_UPDATE_PROTECT
- EC_SB_FW_UPDATE_STATUS
- EC_SB_FW_UPDATE_WRITE
- EC_SB_REG_ALPHA__A
- EC_SB_REG_COMM_EXEC__A
- EC_SB_REG_CONST_16QAM
- EC_SB_REG_CONST_64QAM
- EC_SB_REG_CONST_QPSK
- EC_SB_REG_CONST__A
- EC_SB_REG_CSI_HI__A
- EC_SB_REG_CSI_LO__A
- EC_SB_REG_CSI_OFS__A
- EC_SB_REG_PRIOR_HI
- EC_SB_REG_PRIOR_LO
- EC_SB_REG_PRIOR__A
- EC_SB_REG_SCALE_BIT2__A
- EC_SB_REG_SCALE_LSB__A
- EC_SB_REG_SCALE_MSB__A
- EC_SB_REG_SMB_TGL__A
- EC_SB_REG_SNR_HI__A
- EC_SB_REG_SNR_LO__A
- EC_SB_REG_SNR_MID__A
- EC_SB_REG_TR_MODE_2K
- EC_SB_REG_TR_MODE_8K
- EC_SB_REG_TR_MODE__A
- EC_SCI_QUERY
- EC_SCI_SRC_ACPWR
- EC_SCI_SRC_ALL
- EC_SCI_SRC_BATCRIT
- EC_SCI_SRC_BATERR
- EC_SCI_SRC_BATSOC
- EC_SCI_SRC_BATTERY
- EC_SCI_SRC_EBOOK
- EC_SCI_SRC_GAME
- EC_SCI_SRC_GPWAKE
- EC_SCI_SRC_WLAN
- EC_SERIALNUM_ADDR
- EC_SET_SCI_INHIBIT
- EC_SET_SCI_INHIBIT_RELEASE
- EC_SHUTDOWN_IO_PORT_DATA
- EC_SHUTDOWN_IO_PORT_HIGH
- EC_SHUTDOWN_IO_PORT_LOW
- EC_SNOOP_CB
- EC_SNOOP_INV
- EC_SPACE_SIZE
- EC_SPDIF0_SELECT
- EC_SPDIF0_SEL_MASK
- EC_SPDIF0_SEL_SHIFT
- EC_SPDIF1_SELECT
- EC_SPDIF1_SEL_MASK
- EC_SPDIF1_SEL_SHIFT
- EC_SPI_FRAME_START
- EC_SPI_NOT_READY
- EC_SPI_OLD_READY
- EC_SPI_PAST_END
- EC_SPI_PROCESSING
- EC_SPI_RECEIVING
- EC_SPI_RECOVERY_TIME_NS
- EC_SPI_RX_BAD_DATA
- EC_SPI_RX_READY
- EC_STATUS_FLAG_LAST_ERROR
- EC_STATUS_FLAG_LATENT_ERROR
- EC_STATUS_FLAG_NO_ERROR
- EC_STATUS_HIBERNATING
- EC_STS_PORT
- EC_SWITCH_DEDICATED_RECOVERY
- EC_SWITCH_IGNORE0
- EC_SWITCH_IGNORE1
- EC_SWITCH_LID_OPEN
- EC_SWITCH_POWER_BUTTON_PRESSED
- EC_SWITCH_WRITE_PROTECT_DISABLED
- EC_TEMP_SENSOR_B_ENTRIES
- EC_TEMP_SENSOR_DEFAULT
- EC_TEMP_SENSOR_ENTRIES
- EC_TEMP_SENSOR_ERROR
- EC_TEMP_SENSOR_NOT_CALIBRATED
- EC_TEMP_SENSOR_NOT_POWERED
- EC_TEMP_SENSOR_NOT_PRESENT
- EC_TEMP_SENSOR_OFFSET
- EC_TEMP_THRESH_COUNT
- EC_TEMP_THRESH_HALT
- EC_TEMP_THRESH_HIGH
- EC_TEMP_THRESH_WARN
- EC_TEST_DONE
- EC_TIMEOUT_IMAX
- EC_TIMEOUT_INMAX
- EC_TIMEOUT_TD
- EC_TIMEOUT_TMAX
- EC_TRACE_PROP
- EC_TRIM_CSN
- EC_TRIM_MUTEN
- EC_TRIM_SCLK
- EC_TRIM_SDATA
- EC_USB_PD_MAX_PORTS
- EC_VBNV_BLOCK_SIZE
- EC_VBNV_CONTEXT_OP_READ
- EC_VBNV_CONTEXT_OP_WRITE
- EC_VBOOT_HASH_ABORT
- EC_VBOOT_HASH_GET
- EC_VBOOT_HASH_OFFSET_ACTIVE
- EC_VBOOT_HASH_OFFSET_RO
- EC_VBOOT_HASH_OFFSET_RW
- EC_VBOOT_HASH_OFFSET_UPDATE
- EC_VBOOT_HASH_RECALC
- EC_VBOOT_HASH_START
- EC_VBOOT_HASH_STATUS_BUSY
- EC_VBOOT_HASH_STATUS_DONE
- EC_VBOOT_HASH_STATUS_NONE
- EC_VBOOT_HASH_TYPE_SHA256
- EC_VD_REG_COMM_EXEC__A
- EC_VD_REG_FORCE__A
- EC_VD_REG_REQ_SMB_CNT__A
- EC_VD_REG_RLK_ENA__A
- EC_VD_REG_SET_CODERATE_C1_2
- EC_VD_REG_SET_CODERATE_C2_3
- EC_VD_REG_SET_CODERATE_C3_4
- EC_VD_REG_SET_CODERATE_C5_6
- EC_VD_REG_SET_CODERATE_C7_8
- EC_VD_REG_SET_CODERATE__A
- EC_VER_CHARGE_CONTROL
- EC_VER_FLASH_INFO
- EC_VER_FLASH_PROTECT
- EC_VER_FLASH_REGION_INFO
- EC_VER_FLASH_WRITE
- EC_VER_MASK
- EC_VER_PD_EXCHANGE_STATUS
- EC_VER_SWITCH_ENABLE_WIRELESS
- EC_VER_VBNV_CONTEXT
- EC_VSTORE_SLOT_MAX
- EC_VSTORE_SLOT_SIZE
- EC_WAKE_UP_WLAN
- EC_WB
- EC_WIRELESS_SWITCH_ALL
- EC_WIRELESS_SWITCH_BLUETOOTH
- EC_WIRELESS_SWITCH_WLAN
- EC_WIRELESS_SWITCH_WLAN_POWER
- EC_WIRELESS_SWITCH_WWAN
- EC_WLAN_ENTER_RESET
- EC_WLAN_LEAVE_RESET
- EC_WOV_I2S_SAMPLE_RATE
- EC_WRITE_EXT_SCI_MASK
- EC_WRITE_HIT_RDO
- EC_WRITE_SCI_MASK
- EDA
- EDAB
- EDABH
- EDAC_AMD64_VERSION
- EDAC_DCT_ATTR_SHOW
- EDAC_DEBUG
- EDAC_DEVICE
- EDAC_DEVICE_NAME_LEN
- EDAC_DEVICE_SYMLINK
- EDAC_DIMM_OFF
- EDAC_DIMM_PTR
- EDAC_EC
- EDAC_FLAG_EC
- EDAC_FLAG_NONE
- EDAC_FLAG_PARITY
- EDAC_FLAG_S16ECD16ED
- EDAC_FLAG_S2ECD2ED
- EDAC_FLAG_S4ECD4ED
- EDAC_FLAG_S8ECD8ED
- EDAC_FLAG_SECDED
- EDAC_FLAG_UNKNOWN
- EDAC_LLCC
- EDAC_MAX_LABELS
- EDAC_MAX_LAYERS
- EDAC_MC
- EDAC_MC_LABEL_LEN
- EDAC_MC_LAYER_ALL_MEM
- EDAC_MC_LAYER_BRANCH
- EDAC_MC_LAYER_CHANNEL
- EDAC_MC_LAYER_CHIP_SELECT
- EDAC_MC_LAYER_SLOT
- EDAC_MOD_NAME
- EDAC_MOD_STR
- EDAC_NONE
- EDAC_OPSTATE_INT
- EDAC_OPSTATE_INT_STR
- EDAC_OPSTATE_INVAL
- EDAC_OPSTATE_NMI
- EDAC_OPSTATE_POLL
- EDAC_OPSTATE_POLL_STR
- EDAC_OPSTATE_UNKNOWN_STR
- EDAC_PARITY
- EDAC_PCI
- EDAC_PCI_ATTR
- EDAC_PCI_GENCTL_NAME
- EDAC_PCI_STRING_ATTR
- EDAC_PCI_SYMLINK
- EDAC_REPORTING_DISABLED
- EDAC_REPORTING_ENABLED
- EDAC_REPORTING_FORCE
- EDAC_RESERVED
- EDAC_S16ECD16ED
- EDAC_S2ECD2ED
- EDAC_S4ECD4ED
- EDAC_S8ECD8ED
- EDAC_SECDED
- EDAC_UNKNOWN
- EDAC_VERSION
- EDAH
- EDAL
- EDAQ_BIT
- EDBGREQ_PD_MARK
- EDBGREQ_PU_MARK
- EDB_MASTER_EN
- EDC0_F
- EDC0_FLAG
- EDC0_S
- EDC0_V
- EDC1_F
- EDC1_FLAG
- EDC1_S
- EDC1_V
- EDCAPARA_BE
- EDCAPARA_BK
- EDCAPARA_VI
- EDCAPARA_VO
- EDCA_AC0_CFG
- EDCA_AC0_CFG_AIFSN
- EDCA_AC0_CFG_CWMAX
- EDCA_AC0_CFG_CWMIN
- EDCA_AC0_CFG_TX_OP
- EDCA_AC1_CFG
- EDCA_AC1_CFG_AIFSN
- EDCA_AC1_CFG_CWMAX
- EDCA_AC1_CFG_CWMIN
- EDCA_AC1_CFG_TX_OP
- EDCA_AC2_CFG
- EDCA_AC2_CFG_AIFSN
- EDCA_AC2_CFG_CWMAX
- EDCA_AC2_CFG_CWMIN
- EDCA_AC2_CFG_TX_OP
- EDCA_AC3_CFG
- EDCA_AC3_CFG_AIFSN
- EDCA_AC3_CFG_CWMAX
- EDCA_AC3_CFG_CWMIN
- EDCA_AC3_CFG_TX_OP
- EDCA_BE_PARAM
- EDCA_BK_PARAM
- EDCA_PARAM_ECW_MAX_SHIFT
- EDCA_PARAM_ECW_MIN_SHIFT
- EDCA_PARAM_TXOP_SHIFT
- EDCA_T
- EDCA_TID_AC_MAP
- EDCA_VI_PARAM
- EDCA_VO_PARAM
- EDCF_ACI_MASK
- EDCF_ACI_SHIFT
- EDCF_AC_BE_ACI_STA
- EDCF_AC_BE_ECW_STA
- EDCF_AC_BE_TXOP_STA
- EDCF_AC_BK_ACI_STA
- EDCF_AC_BK_ECW_STA
- EDCF_AC_BK_TXOP_STA
- EDCF_AC_VI_ACI_STA
- EDCF_AC_VI_ECW_STA
- EDCF_AC_VI_TXOP_STA
- EDCF_AC_VO_ACI_STA
- EDCF_AC_VO_ECW_STA
- EDCF_AC_VO_TXOP_AP
- EDCF_AC_VO_TXOP_STA
- EDCF_AIFSN_MASK
- EDCF_AIFSN_MAX
- EDCF_AIFSN_MIN
- EDCF_ECW2CW
- EDCF_ECWMAX_MASK
- EDCF_ECWMAX_SHIFT
- EDCF_ECWMIN_MASK
- EDCF_LFB_M
- EDCF_LFB_S
- EDCF_LONG_M
- EDCF_LONG_S
- EDCF_SFB_M
- EDCF_SFB_S
- EDCF_SHORT_M
- EDCF_SHORT_S
- EDCF_TXOP2USEC
- EDCIDSR
- EDCTLB
- EDC_0_BASE_ADDR
- EDC_1_BASE_ADDR
- EDC_BIST_CMD_A
- EDC_BIST_CMD_ADDR_A
- EDC_BIST_CMD_LEN_A
- EDC_BIST_DATA_PATTERN_A
- EDC_BIST_STATUS_RDATA_A
- EDC_BIST_STATUS_REG
- EDC_DATA
- EDC_ECC_STATUS_A
- EDC_ERROR_TIMEFRAME
- EDC_H_BIST_CMD_A
- EDC_H_BIST_CMD_ADDR_A
- EDC_H_BIST_CMD_LEN_A
- EDC_H_BIST_DATA_PATTERN_A
- EDC_H_BIST_STATUS_RDATA_A
- EDC_H_ECC_ERR_ADDR_A
- EDC_INT_CAUSE_A
- EDC_MAX_ERRORS
- EDC_MAX_SIZE
- EDC_MODE_ACTIVE_DAC
- EDC_MODE_LIMITING
- EDC_MODE_LINEAR
- EDC_MODE_PASSIVE_DAC
- EDC_NONE
- EDC_NONE_DEFAULT
- EDC_OPT_AEL2005
- EDC_OPT_AEL2005_SIZE
- EDC_PERF_COUNTER__EDC_PERF_COUNTER_MASK
- EDC_PERF_COUNTER__EDC_PERF_COUNTER__SHIFT
- EDC_REG
- EDC_REG_T5
- EDC_STORE_CORRECT
- EDC_STORE_READ
- EDC_STRIDE
- EDC_STRIDE_T5
- EDC_T50_BASE_ADDR
- EDC_T51_BASE_ADDR
- EDC_T5_REG
- EDC_T5_STRIDE
- EDC_TWX_AEL2005
- EDC_TWX_AEL2005_SIZE
- EDC_TWX_AEL2020
- EDC_TWX_AEL2020_SIZE
- EDDBUF
- EDDEVID
- EDDEVID1
- EDDEVID1_PCSR_NO_OFFSET_DIS_AARCH32
- EDDEVID1_PCSR_OFFSET_INS_SET
- EDDEVID1_PCSR_OFFSET_MASK
- EDDEVID_IMPL_EDPCSR
- EDDEVID_IMPL_EDPCSR_EDCIDSR
- EDDEVID_IMPL_FULL
- EDDEVID_PCSAMPLE_MODE
- EDDEXTSIZE
- EDDMAGIC1
- EDDMAGIC2
- EDDMAXNR
- EDDNR
- EDDPARMSIZE
- EDD_DATE
- EDD_DEVICE_ATTR
- EDD_EXT_64BIT_EXTENSIONS
- EDD_EXT_DEVICE_LOCKING_AND_EJECTING
- EDD_EXT_ENHANCED_DISK_DRIVE_SUPPORT
- EDD_EXT_FIXED_DISK_ACCESS
- EDD_INFO_DMA_BOUNDARY_ERROR_TRANSPARENT
- EDD_INFO_GEOMETRY_VALID
- EDD_INFO_LOCKABLE
- EDD_INFO_MEDIA_CHANGE_NOTIFICATION
- EDD_INFO_NO_MEDIA_PRESENT
- EDD_INFO_REMOVABLE
- EDD_INFO_USE_INT13_FN50
- EDD_INFO_WRITE_VERIFY
- EDD_MBR_SIG_BUF
- EDD_MBR_SIG_MAX
- EDD_MBR_SIG_NR_BUF
- EDD_MBR_SIG_OFFSET
- EDD_VERSION
- EDEADLK
- EDEADLOCK
- EDEBGREQ_PULLDOWN_MARK
- EDEBGREQ_PULLUP_MARK
- EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT
- EDEBUG_DRIVER_IF_OP_CODE_GET_BUS_ADDR
- EDEBUG_DRIVER_IF_OP_CODE_GET_PHYS_ADDR
- EDESTADDRREQ
- EDGE16LN_OPF
- EDGE16L_OPF
- EDGE16N_OPF
- EDGE16_OPF
- EDGE32LN_OPF
- EDGE32L_OPF
- EDGE32N_OPF
- EDGE32_OPF
- EDGE8LN_OPF
- EDGE8L_OPF
- EDGE8N_OPF
- EDGE8_OPF
- EDGEPORT_CONFIG_DEVICE
- EDGEPORT_DEVICE_ID_MASK
- EDGEPORT_MSR_CD
- EDGEPORT_MSR_CTS
- EDGEPORT_MSR_DELTA_CD
- EDGEPORT_MSR_DELTA_CTS
- EDGEPORT_MSR_DELTA_DSR
- EDGEPORT_MSR_DELTA_RI
- EDGEPORT_MSR_DSR
- EDGEPORT_MSR_RI
- EDGES
- EDGESTRING_ASSEMNUM
- EDGESTRING_MANUFDATE
- EDGESTRING_MANUFNAME
- EDGESTRING_OEMASSEMNUM
- EDGESTRING_ORIGSERIALNUM
- EDGESTRING_PRODNAME
- EDGESTRING_SERIALNUM
- EDGESTS
- EDGE_ACTRL
- EDGE_BOOT_DESC_ADDR
- EDGE_BOOT_DESC_LEN
- EDGE_CFG_FALL
- EDGE_CFG_FALL_CLR
- EDGE_CFG_FALL_SET
- EDGE_CFG_RISE
- EDGE_CFG_RISE_CLR
- EDGE_CFG_RISE_SET
- EDGE_CHK
- EDGE_CLOSING_WAIT
- EDGE_COMPATIBILITY_MASK0
- EDGE_COMPATIBILITY_MASK1
- EDGE_COMPATIBILITY_MASK2
- EDGE_CTL_BASE
- EDGE_CTL_HI
- EDGE_DOWNLOAD_FILE_80251
- EDGE_DOWNLOAD_FILE_I930
- EDGE_DOWNLOAD_FILE_INTERNAL
- EDGE_DOWNLOAD_FILE_NONE
- EDGE_FACTOR_MASK
- EDGE_FLAG_EMPTY
- EDGE_FLAG_FALLTHROUGH
- EDGE_FLAG_JUMP
- EDGE_FW_BULK_MAX_PACKET_SIZE
- EDGE_FW_BULK_READ_BUFFER_SIZE
- EDGE_FW_GET_TX_CREDITS_SEND_THRESHOLD
- EDGE_FW_INT_INTERVAL
- EDGE_FW_INT_MAX_PACKET_SIZE
- EDGE_LOWER
- EDGE_MANUF_DESC_ADDR
- EDGE_MANUF_DESC_ADDR_V1
- EDGE_MANUF_DESC_LEN
- EDGE_MANUF_DESC_LEN_V1
- EDGE_PER_REV
- EDGE_PER_REV_MASK
- EDGE_PER_REV_SHIFT
- EDGE_PRESERVE
- EDGE_RATE_CNTL_MASK
- EDGE_RATE_CNTL_POS
- EDGE_RAWSTAT
- EDGE_READ_URB_RUNNING
- EDGE_READ_URB_STOPPED
- EDGE_READ_URB_STOPPING
- EDGE_SEL
- EDGE_SEL_EN
- EDGE_STATUS
- EDGE_STRNGT
- EDGE_TRAGGER
- EDGE_TRSHLD
- EDGE_UPPER
- EDGLEVEL
- EDI
- EDID1_LEN
- EDID_ADDR
- EDID_BAD_CHECKSUM
- EDID_BAD_INPUT
- EDID_BASIC_AUDIO
- EDID_BLOB_OFFSET
- EDID_BLOCK_SIZE
- EDID_CEA_VCDB_QS
- EDID_CEA_YCRCB422
- EDID_CEA_YCRCB444
- EDID_DELAY
- EDID_DETAILED_TIMINGS
- EDID_DETAIL_COLOR_MGMT_DATA
- EDID_DETAIL_CVT_3BYTE
- EDID_DETAIL_EST_TIMINGS
- EDID_DETAIL_MONITOR_CPDATA
- EDID_DETAIL_MONITOR_NAME
- EDID_DETAIL_MONITOR_RANGE
- EDID_DETAIL_MONITOR_SERIAL
- EDID_DETAIL_MONITOR_STRING
- EDID_DETAIL_STD_MODES
- EDID_ENABLE_A_EN
- EDID_ENABLE_B_EN
- EDID_ENABLE_EDID_ONLY
- EDID_ENABLE_NACK_OFF
- EDID_EST_TIMINGS
- EDID_EXT_BLOCK_CNT
- EDID_HEADER
- EDID_HEADER_END
- EDID_LEN1
- EDID_LEN2
- EDID_LENGTH
- EDID_MAX_RETRIES
- EDID_MAX_SEGM
- EDID_MODE
- EDID_NO_RESPONSE
- EDID_NUM_BLOCKS_MAX
- EDID_OK
- EDID_PRODUCT_ID
- EDID_QUIRK_135_CLOCK_TOO_HIGH
- EDID_QUIRK_DETAILED_IN_CM
- EDID_QUIRK_DETAILED_SYNC_PP
- EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
- EDID_QUIRK_FORCE_10BPC
- EDID_QUIRK_FORCE_12BPC
- EDID_QUIRK_FORCE_6BPC
- EDID_QUIRK_FORCE_8BPC
- EDID_QUIRK_FORCE_REDUCED_BLANKING
- EDID_QUIRK_NON_DESKTOP
- EDID_QUIRK_PREFER_LARGE_60
- EDID_QUIRK_PREFER_LARGE_75
- EDID_RAM
- EDID_SEGMENT_SIZE
- EDID_SIZE
- EDID_STD_TIMINGS
- EDID_STRUCT_DISPLAY
- EDID_STRUCT_REVISION
- EDID_STRUCT_VERSION
- EDID_THE_SAME
- EDID_TIMING_ASPECT_MASK
- EDID_TIMING_ASPECT_SHIFT
- EDID_TIMING_VFREQ_MASK
- EDID_TIMING_VFREQ_SHIFT
- EDID_VERSION_1
- EDID_VERSION_2
- EDITSLOP
- EDIT_DELIM
- EDIT_EXNUM
- EDIT_MOST
- EDIT_REPEAT
- EDIT_SOME
- EDL_APP_VER_RES_EVT
- EDL_CMD_EXE_STATUS_EVT
- EDL_CMD_REQ_RES_EVT
- EDL_NVM_ACCESS_CODE_EVT
- EDL_NVM_ACCESS_OPCODE
- EDL_NVM_ACCESS_SET_REQ_CMD
- EDL_PATCH_CMD_LEN
- EDL_PATCH_CMD_OPCODE
- EDL_PATCH_TLV_REQ_CMD
- EDL_PATCH_VER_REQ_CMD
- EDL_PATCH_VER_RES_EVT
- EDL_SET_BAUDRATE_RSP_EVT
- EDL_TAG_ID_DEEP_SLEEP
- EDL_TAG_ID_HCI
- EDL_TVL_DNLD_RES_EVT
- EDL_WRITE_BD_ADDR_OPCODE
- EDMA64_CDNE
- EDMA64_CEEI
- EDMA64_CERQ
- EDMA64_CERR
- EDMA64_CINT
- EDMA64_EEIH
- EDMA64_ERQH
- EDMA64_ERRH
- EDMA64_ERRL
- EDMA64_INTH
- EDMA64_INTL
- EDMA64_SEEI
- EDMA64_SERQ
- EDMA64_SSRT
- EDMAC
- EDMAC0
- EDMAC1
- EDMAC2
- EDMACS
- EDMACSH
- EDMACSL
- EDMADST
- EDMADSTH
- EDMADSTL
- EDMALEN
- EDMAMUX_CHCFG_DIS
- EDMAMUX_CHCFG_ENBL
- EDMAMUX_CHCFG_SOURCE
- EDMANDH
- EDMANDL
- EDMAST
- EDMASTH
- EDMASTL
- EDMA_ARB_CFG
- EDMA_BINDING_LEGACY
- EDMA_BINDING_TPCC
- EDMA_CCCFG
- EDMA_CCERR
- EDMA_CCERRCLR
- EDMA_CCSTAT
- EDMA_CCSTAT_ACTV
- EDMA_CDNE
- EDMA_CEEI
- EDMA_CEEI_CEEI
- EDMA_CERQ
- EDMA_CERR
- EDMA_CERR_CERR
- EDMA_CFG
- EDMA_CFG_EDMA_FBS
- EDMA_CFG_FBS
- EDMA_CFG_NCQ
- EDMA_CFG_NCQ_GO_ON_ERR
- EDMA_CFG_Q_DEPTH
- EDMA_CFG_RD_BRST_EXT
- EDMA_CFG_WR_BUFF_LEN
- EDMA_CHANNELS
- EDMA_CHANNEL_ANY
- EDMA_CHANNEL_BIT
- EDMA_CHAN_SLOT
- EDMA_CINT
- EDMA_CINT_CINT
- EDMA_CMD
- EDMA_CONT_PARAMS_ANY
- EDMA_CONT_PARAMS_FIXED_EXACT
- EDMA_CONT_PARAMS_FIXED_NOT_EXACT
- EDMA_CR
- EDMA_CR_CLM
- EDMA_CR_CX
- EDMA_CR_ECX
- EDMA_CR_EDBG
- EDMA_CR_EMLM
- EDMA_CR_ERCA
- EDMA_CR_ERGA
- EDMA_CR_HALT
- EDMA_CR_HOE
- EDMA_CTLR
- EDMA_CTLR_CHAN
- EDMA_DCHMAP
- EDMA_DESCRIPTORS
- EDMA_DIR_READ
- EDMA_DIR_WRITE
- EDMA_DMAQNUM
- EDMA_DMA_BUSWIDTHS
- EDMA_DRAE
- EDMA_DS
- EDMA_ECR
- EDMA_ECRH
- EDMA_EEI
- EDMA_EEVAL
- EDMA_EH_FREEZE
- EDMA_EH_FREEZE_5
- EDMA_EMCR
- EDMA_EMR
- EDMA_EN
- EDMA_ERQ
- EDMA_ERR
- EDMA_ERR_BIST_ASYNC
- EDMA_ERR_CRPB_PAR
- EDMA_ERR_CRQB_PAR
- EDMA_ERR_DEV
- EDMA_ERR_DEV_CON
- EDMA_ERR_DEV_DCON
- EDMA_ERR_D_PAR
- EDMA_ERR_INTRL_PAR
- EDMA_ERR_IORDY
- EDMA_ERR_IRQ_CAUSE
- EDMA_ERR_IRQ_MASK
- EDMA_ERR_IRQ_TRANSIENT
- EDMA_ERR_LNK_CTRL_RX
- EDMA_ERR_LNK_CTRL_RX_0
- EDMA_ERR_LNK_CTRL_RX_1
- EDMA_ERR_LNK_CTRL_RX_2
- EDMA_ERR_LNK_CTRL_RX_3
- EDMA_ERR_LNK_CTRL_TX
- EDMA_ERR_LNK_CTRL_TX_0
- EDMA_ERR_LNK_CTRL_TX_1
- EDMA_ERR_LNK_CTRL_TX_2
- EDMA_ERR_LNK_CTRL_TX_3
- EDMA_ERR_LNK_CTRL_TX_4
- EDMA_ERR_LNK_DATA_RX
- EDMA_ERR_LNK_DATA_TX
- EDMA_ERR_OVERRUN_5
- EDMA_ERR_PRD_PAR
- EDMA_ERR_SELF_DIS
- EDMA_ERR_SELF_DIS_5
- EDMA_ERR_SERR
- EDMA_ERR_TRANS_IRQ_7
- EDMA_ERR_TRANS_PROTO
- EDMA_ERR_UNDERRUN_5
- EDMA_ES
- EDMA_FILTER_PARAM
- EDMA_FWID
- EDMA_HALTCOND
- EDMA_H_
- EDMA_INTR
- EDMA_IORDY_TMOUT
- EDMA_LL_SZ
- EDMA_M
- EDMA_MASK_CH
- EDMA_MAX_SLOTS
- EDMA_MAX_TR_WAIT_LOOPS
- EDMA_MODE_LEGACY
- EDMA_MODE_UNROLL
- EDMA_PARM
- EDMA_QCHMAP
- EDMA_QDMAQNUM
- EDMA_QEMCR
- EDMA_QEMR
- EDMA_QRAE
- EDMA_QSTAT
- EDMA_QUEEVTENTRY
- EDMA_QUEPRI
- EDMA_QUETCMAP
- EDMA_QWMTHRA
- EDMA_QWMTHRB
- EDMA_REG_ARRAY_INDEX
- EDMA_REQ_NONE
- EDMA_REQ_PAUSE
- EDMA_REQ_Q_BASE_HI
- EDMA_REQ_Q_BASE_LO_MASK
- EDMA_REQ_Q_IN_PTR
- EDMA_REQ_Q_OUT_PTR
- EDMA_REQ_Q_PTR_SHIFT
- EDMA_REQ_STOP
- EDMA_RESET
- EDMA_REV
- EDMA_RSP_Q_BASE_HI
- EDMA_RSP_Q_BASE_LO_MASK
- EDMA_RSP_Q_IN_PTR
- EDMA_RSP_Q_OUT_PTR
- EDMA_RSP_Q_PTR_SHIFT
- EDMA_SEEI
- EDMA_SEEI_SEEI
- EDMA_SERQ
- EDMA_SHADOW0
- EDMA_SLOT_ANY
- EDMA_SSRT
- EDMA_STATUS
- EDMA_STATUS_CACHE_EMPTY
- EDMA_STATUS_IDLE
- EDMA_ST_BUSY
- EDMA_ST_IDLE
- EDMA_ST_PAUSE
- EDMA_TCC
- EDMA_TCD
- EDMA_TCD_ATTR_DMOD
- EDMA_TCD_ATTR_DSIZE
- EDMA_TCD_ATTR_DSIZE_16BIT
- EDMA_TCD_ATTR_DSIZE_32BIT
- EDMA_TCD_ATTR_DSIZE_32BYTE
- EDMA_TCD_ATTR_DSIZE_64BIT
- EDMA_TCD_ATTR_DSIZE_8BIT
- EDMA_TCD_ATTR_SMOD
- EDMA_TCD_ATTR_SSIZE
- EDMA_TCD_ATTR_SSIZE_16BIT
- EDMA_TCD_ATTR_SSIZE_32BIT
- EDMA_TCD_ATTR_SSIZE_32BYTE
- EDMA_TCD_ATTR_SSIZE_64BIT
- EDMA_TCD_ATTR_SSIZE_8BIT
- EDMA_TCD_BITER_BITER
- EDMA_TCD_CITER_CITER
- EDMA_TCD_CSR_ACTIVE
- EDMA_TCD_CSR_DONE
- EDMA_TCD_CSR_D_REQ
- EDMA_TCD_CSR_E_LINK
- EDMA_TCD_CSR_E_SG
- EDMA_TCD_CSR_INT_HALF
- EDMA_TCD_CSR_INT_MAJOR
- EDMA_TCD_CSR_START
- EDMA_UNKNOWN_RSVD
- EDMA_V0_ABORT_INT_MASK
- EDMA_V0_CH_EVEN_MSI_DATA_MASK
- EDMA_V0_CH_ODD_MSI_DATA_MASK
- EDMA_V0_CH_STATUS_MASK
- EDMA_V0_DONE_INT_MASK
- EDMA_V0_DOORBELL_CH_MASK
- EDMA_V0_LINKED_LIST_ERR_MASK
- EDMA_V0_MAX_NR_CH
- EDMA_V0_READ_CH_COUNT_MASK
- EDMA_V0_VIEWPORT_MASK
- EDMA_V0_WRITE_CH_COUNT_MASK
- EDMR
- EDMR_DL0
- EDMR_DL1
- EDMR_EL
- EDMR_NBST
- EDMR_SRST_ETHER
- EDMR_SRST_GETHER
- EDMSDU
- EDMSW_mskDE
- EDMSW_mskRV
- EDMSW_mskWV
- EDMSW_offDE
- EDMSW_offRV
- EDMSW_offWV
- EDM_CFG_mskBC
- EDM_CFG_mskDIMU
- EDM_CFG_mskVER
- EDM_CFG_offBC
- EDM_CFG_offDIMU
- EDM_CFG_offVER
- EDM_CTL_mskDEH_SEL
- EDM_CTL_mskV3_EDM_MODE
- EDM_CTL_offDEH_SEL
- EDM_CTL_offV3_EDM_MODE
- EDO
- EDOCR
- EDOM
- EDOSLAR
- EDOTDOT
- EDO_TIMING_MASK
- EDPAUX_CLK_SRC
- EDPCSR
- EDPCSR_ARM_INST_MASK
- EDPCSR_HI
- EDPCSR_PROHIBITED
- EDPCSR_THUMB
- EDPCSR_THUMB_INST_MASK
- EDPLINK_CLK_SRC
- EDPP
- EDPPIXEL_CLK_SRC
- EDPRCR
- EDPRCR_CORENPDRQ
- EDPRCR_COREPURQ
- EDPRSR
- EDPRSR_DLK
- EDPRSR_PU
- EDP_10BIT
- EDP_12BIT
- EDP_16BIT
- EDP_18BPP
- EDP_24BPP
- EDP_28nm_PHY_PLL_GLB_CFG_PLL_ENABLE
- EDP_28nm_PHY_PLL_GLB_CFG_PLL_LDO_PWRDN_B
- EDP_28nm_PHY_PLL_GLB_CFG_PLL_PWRDN_B
- EDP_28nm_PHY_PLL_GLB_CFG_PLL_PWRGEN_PWRDN_B
- EDP_28nm_PHY_PLL_TEST_CFG_PLL_SW_RESET
- EDP_30BPP
- EDP_6BIT
- EDP_8BIT
- EDP_ACTIVE_HOR_VER_HORIZ
- EDP_ACTIVE_HOR_VER_HORIZ__MASK
- EDP_ACTIVE_HOR_VER_HORIZ__SHIFT
- EDP_ACTIVE_HOR_VER_VERT
- EDP_ACTIVE_HOR_VER_VERT__MASK
- EDP_ACTIVE_HOR_VER_VERT__SHIFT
- EDP_AUX_CTRL_ENABLE
- EDP_AUX_CTRL_RESET
- EDP_AUX_DATA_DATA
- EDP_AUX_DATA_DATA__MASK
- EDP_AUX_DATA_DATA__SHIFT
- EDP_AUX_DATA_INDEX
- EDP_AUX_DATA_INDEX_WRITE
- EDP_AUX_DATA_INDEX__MASK
- EDP_AUX_DATA_INDEX__SHIFT
- EDP_AUX_DATA_READ
- EDP_AUX_TRANS_CTRL_GO
- EDP_AUX_TRANS_CTRL_I2C
- EDP_BACKLIGHT_MAX
- EDP_BLC_ENABLE
- EDP_CLK_MASK_AHB
- EDP_CLK_MASK_ALL
- EDP_CLK_MASK_AUX
- EDP_CLK_MASK_AUX_CHAN
- EDP_CLK_MASK_LINK
- EDP_CLK_MASK_LINK_CHAN
- EDP_CLK_MASK_MDP_CORE
- EDP_CLK_MASK_PIXEL
- EDP_CONFIGURATION_CTRL_COLOR
- EDP_CONFIGURATION_CTRL_COLOR__MASK
- EDP_CONFIGURATION_CTRL_COLOR__SHIFT
- EDP_CONFIGURATION_CTRL_ENHANCED_FRAMING
- EDP_CONFIGURATION_CTRL_LANES
- EDP_CONFIGURATION_CTRL_LANES__MASK
- EDP_CONFIGURATION_CTRL_LANES__SHIFT
- EDP_CONFIGURATION_CTRL_PROGRESSIVE
- EDP_CONFIGURATION_CTRL_STATIC_MVID
- EDP_CONFIGURATION_CTRL_SYNC_CLK
- EDP_DISPLAY_CTL_CAP_SIZE
- EDP_FORCE_VDD
- EDP_HSYNC_VSYNC_WIDTH_POLARITY_HORIZ
- EDP_HSYNC_VSYNC_WIDTH_POLARITY_HORIZ__MASK
- EDP_HSYNC_VSYNC_WIDTH_POLARITY_HORIZ__SHIFT
- EDP_HSYNC_VSYNC_WIDTH_POLARITY_NHSYNC
- EDP_HSYNC_VSYNC_WIDTH_POLARITY_NVSYNC
- EDP_HSYNC_VSYNC_WIDTH_POLARITY_VERT
- EDP_HSYNC_VSYNC_WIDTH_POLARITY_VERT__MASK
- EDP_HSYNC_VSYNC_WIDTH_POLARITY_VERT__SHIFT
- EDP_INTERRUPT_REG_1_AUX_ERROR
- EDP_INTERRUPT_REG_1_AUX_ERROR_ACK
- EDP_INTERRUPT_REG_1_AUX_ERROR_EN
- EDP_INTERRUPT_REG_1_AUX_I2C_DONE
- EDP_INTERRUPT_REG_1_AUX_I2C_DONE_ACK
- EDP_INTERRUPT_REG_1_AUX_I2C_DONE_EN
- EDP_INTERRUPT_REG_1_HPD
- EDP_INTERRUPT_REG_1_HPD_ACK
- EDP_INTERRUPT_REG_1_HPD_EN
- EDP_INTERRUPT_REG_1_I2C_DEFER
- EDP_INTERRUPT_REG_1_I2C_DEFER_ACK
- EDP_INTERRUPT_REG_1_I2C_DEFER_EN
- EDP_INTERRUPT_REG_1_I2C_NACK
- EDP_INTERRUPT_REG_1_I2C_NACK_ACK
- EDP_INTERRUPT_REG_1_I2C_NACK_EN
- EDP_INTERRUPT_REG_1_NACK_DEFER
- EDP_INTERRUPT_REG_1_NACK_DEFER_ACK
- EDP_INTERRUPT_REG_1_NACK_DEFER_EN
- EDP_INTERRUPT_REG_1_PLL_UNLOCK
- EDP_INTERRUPT_REG_1_PLL_UNLOCK_ACK
- EDP_INTERRUPT_REG_1_PLL_UNLOCK_EN
- EDP_INTERRUPT_REG_1_TIMEOUT
- EDP_INTERRUPT_REG_1_TIMEOUT_ACK
- EDP_INTERRUPT_REG_1_TIMEOUT_EN
- EDP_INTERRUPT_REG_1_WRONG_ADDR
- EDP_INTERRUPT_REG_1_WRONG_ADDR_ACK
- EDP_INTERRUPT_REG_1_WRONG_ADDR_EN
- EDP_INTERRUPT_REG_1_WRONG_DATA_CNT
- EDP_INTERRUPT_REG_1_WRONG_DATA_CNT_ACK
- EDP_INTERRUPT_REG_1_WRONG_DATA_CNT_EN
- EDP_INTERRUPT_REG_2_CRC_UPDATED
- EDP_INTERRUPT_REG_2_CRC_UPDATED_ACK
- EDP_INTERRUPT_REG_2_CRC_UPDATED_EN
- EDP_INTERRUPT_REG_2_FRAME_END
- EDP_INTERRUPT_REG_2_FRAME_END_ACK
- EDP_INTERRUPT_REG_2_FRAME_END_EN
- EDP_INTERRUPT_REG_2_IDLE_PATTERNs_SENT
- EDP_INTERRUPT_REG_2_IDLE_PATTERNs_SENT_ACK
- EDP_INTERRUPT_REG_2_IDLE_PATTERNs_SENT_EN
- EDP_INTERRUPT_REG_2_READY_FOR_VIDEO
- EDP_INTERRUPT_REG_2_READY_FOR_VIDEO_ACK
- EDP_INTERRUPT_REG_2_READY_FOR_VIDEO_EN
- EDP_INTR_AUX_I2C_ERR
- EDP_INTR_MASK1
- EDP_INTR_MASK2
- EDP_INTR_STATUS1
- EDP_INTR_STATUS2
- EDP_INTR_TRANS_STATUS
- EDP_LANE_1
- EDP_LANE_2
- EDP_LANE_4
- EDP_LINK_BW_MAX
- EDP_LINK_TRAIN_1000MV_0DB_IVB
- EDP_LINK_TRAIN_1000MV_3_5DB_IVB
- EDP_LINK_TRAIN_1000MV_6DB_IVB
- EDP_LINK_TRAIN_400MV_0DB_IVB
- EDP_LINK_TRAIN_400MV_0DB_SNB_A
- EDP_LINK_TRAIN_400MV_3_5DB_IVB
- EDP_LINK_TRAIN_400MV_3_5DB_SNB_B
- EDP_LINK_TRAIN_400MV_6DB_IVB
- EDP_LINK_TRAIN_400MV_6DB_SNB_A
- EDP_LINK_TRAIN_400_600MV_0DB_SNB_B
- EDP_LINK_TRAIN_400_600MV_6DB_SNB_B
- EDP_LINK_TRAIN_500MV_0DB_IVB
- EDP_LINK_TRAIN_500MV_3_5DB_IVB
- EDP_LINK_TRAIN_600MV_0DB_IVB
- EDP_LINK_TRAIN_600MV_3_5DB_IVB
- EDP_LINK_TRAIN_600MV_3_5DB_SNB_A
- EDP_LINK_TRAIN_600_800MV_3_5DB_SNB_B
- EDP_LINK_TRAIN_800MV_0DB_IVB
- EDP_LINK_TRAIN_800MV_0DB_SNB_A
- EDP_LINK_TRAIN_800MV_3_5DB_IVB
- EDP_LINK_TRAIN_800_1200MV_0DB_SNB_B
- EDP_LINK_TRAIN_VOL_EMP_MASK_IVB
- EDP_LINK_TRAIN_VOL_EMP_MASK_SNB
- EDP_MAINLINK_CTRL_ENABLE
- EDP_MAINLINK_CTRL_RESET
- EDP_MAINLINK_READY_TRAIN_PATTERN_1_READY
- EDP_MAINLINK_READY_TRAIN_PATTERN_2_READY
- EDP_MAINLINK_READY_TRAIN_PATTERN_3_READY
- EDP_MAX_LANE
- EDP_MAX_SU_DISABLE_TIME
- EDP_MAX_SU_DISABLE_TIME_MASK
- EDP_MISC1_MISC0_BT709_5
- EDP_MISC1_MISC0_CEA
- EDP_MISC1_MISC0_COLOR
- EDP_MISC1_MISC0_COLOR__MASK
- EDP_MISC1_MISC0_COLOR__SHIFT
- EDP_MISC1_MISC0_COMPONENT_FORMAT
- EDP_MISC1_MISC0_COMPONENT_FORMAT__MASK
- EDP_MISC1_MISC0_COMPONENT_FORMAT__SHIFT
- EDP_MISC1_MISC0_INTERLACED_ODD
- EDP_MISC1_MISC0_MISC0
- EDP_MISC1_MISC0_MISC0__MASK
- EDP_MISC1_MISC0_MISC0__SHIFT
- EDP_MISC1_MISC0_MISC1
- EDP_MISC1_MISC0_MISC1__MASK
- EDP_MISC1_MISC0_MISC1__SHIFT
- EDP_MISC1_MISC0_STEREO
- EDP_MISC1_MISC0_STEREO__MASK
- EDP_MISC1_MISC0_STEREO__SHIFT
- EDP_MISC1_MISC0_SYNC
- EDP_PHY_CTRL_SW_RESET
- EDP_PHY_CTRL_SW_RESET_PLL
- EDP_PIXEL_CLK_NUM
- EDP_PREEMPHASIS_3_5dB
- EDP_PREEMPHASIS_6dB
- EDP_PREEMPHASIS_9_5dB
- EDP_PREEMPHASIS_NONE
- EDP_PSR2_CTL
- EDP_PSR2_ENABLE
- EDP_PSR2_FRAME_BEFORE_SU
- EDP_PSR2_FRAME_BEFORE_SU_MASK
- EDP_PSR2_FRAME_BEFORE_SU_SHIFT
- EDP_PSR2_IDLE_FRAME_MASK
- EDP_PSR2_IDLE_FRAME_SHIFT
- EDP_PSR2_STATUS
- EDP_PSR2_STATUS_STATE_MASK
- EDP_PSR2_STATUS_STATE_SHIFT
- EDP_PSR2_TP2_TIME_100us
- EDP_PSR2_TP2_TIME_2500us
- EDP_PSR2_TP2_TIME_500us
- EDP_PSR2_TP2_TIME_50us
- EDP_PSR2_TP2_TIME_MASK
- EDP_PSR_AUX_CTL
- EDP_PSR_AUX_CTL_BIT_CLOCK_2X_MASK
- EDP_PSR_AUX_CTL_ERROR_INTERRUPT
- EDP_PSR_AUX_CTL_MESSAGE_SIZE_MASK
- EDP_PSR_AUX_CTL_PRECHARGE_2US_MASK
- EDP_PSR_AUX_CTL_TIME_OUT_MASK
- EDP_PSR_AUX_DATA
- EDP_PSR_CRC_ENABLE
- EDP_PSR_CTL
- EDP_PSR_DEBUG
- EDP_PSR_DEBUG_EXIT_ON_PIXEL_UNDERRUN
- EDP_PSR_DEBUG_MASK_DISP_REG_WRITE
- EDP_PSR_DEBUG_MASK_HPD
- EDP_PSR_DEBUG_MASK_LPSP
- EDP_PSR_DEBUG_MASK_MAX_SLEEP
- EDP_PSR_DEBUG_MASK_MEMUP
- EDP_PSR_ENABLE
- EDP_PSR_ERROR
- EDP_PSR_IDLE_FRAME_SHIFT
- EDP_PSR_IIR
- EDP_PSR_IMR
- EDP_PSR_LINK_STANDBY
- EDP_PSR_MAX_SLEEP_TIME_SHIFT
- EDP_PSR_MIN_LINK_ENTRY_TIME_0_LINES
- EDP_PSR_MIN_LINK_ENTRY_TIME_2_LINES
- EDP_PSR_MIN_LINK_ENTRY_TIME_4_LINES
- EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES
- EDP_PSR_MIN_LINK_ENTRY_TIME_MASK
- EDP_PSR_PERF_CNT
- EDP_PSR_PERF_CNT_MASK
- EDP_PSR_POST_EXIT
- EDP_PSR_PRE_ENTRY
- EDP_PSR_RECEIVER_CAP_SIZE
- EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK
- EDP_PSR_SKIP_AUX_EXIT
- EDP_PSR_STATUS
- EDP_PSR_STATUS_AUX_ERROR
- EDP_PSR_STATUS_AUX_SENDING
- EDP_PSR_STATUS_COUNT_MASK
- EDP_PSR_STATUS_COUNT_SHIFT
- EDP_PSR_STATUS_IDLE_MASK
- EDP_PSR_STATUS_LINK_FULL_OFF
- EDP_PSR_STATUS_LINK_FULL_ON
- EDP_PSR_STATUS_LINK_MASK
- EDP_PSR_STATUS_LINK_STANDBY
- EDP_PSR_STATUS_MAX_SLEEP_TIMER_MASK
- EDP_PSR_STATUS_MAX_SLEEP_TIMER_SHIFT
- EDP_PSR_STATUS_SENDING_IDLE
- EDP_PSR_STATUS_SENDING_TP1
- EDP_PSR_STATUS_SENDING_TP2_TP3
- EDP_PSR_STATUS_STATE_AUXACK
- EDP_PSR_STATUS_STATE_BUFOFF
- EDP_PSR_STATUS_STATE_BUFON
- EDP_PSR_STATUS_STATE_IDLE
- EDP_PSR_STATUS_STATE_MASK
- EDP_PSR_STATUS_STATE_SHIFT
- EDP_PSR_STATUS_STATE_SRDENT
- EDP_PSR_STATUS_STATE_SRDOFFACK
- EDP_PSR_STATUS_STATE_SRDONACK
- EDP_PSR_TP1_TIME_0us
- EDP_PSR_TP1_TIME_100us
- EDP_PSR_TP1_TIME_2500us
- EDP_PSR_TP1_TIME_500us
- EDP_PSR_TP1_TP2_SEL
- EDP_PSR_TP1_TP3_SEL
- EDP_PSR_TP2_TP3_TIME_0us
- EDP_PSR_TP2_TP3_TIME_100us
- EDP_PSR_TP2_TP3_TIME_2500us
- EDP_PSR_TP2_TP3_TIME_500us
- EDP_PSR_TP4_TIME_0US
- EDP_PSR_TRANSCODER_A_SHIFT
- EDP_PSR_TRANSCODER_B_SHIFT
- EDP_PSR_TRANSCODER_C_SHIFT
- EDP_PSR_TRANSCODER_EDP_SHIFT
- EDP_RATE_1_62
- EDP_RATE_2_7
- EDP_REVISION_11
- EDP_REVISION_12
- EDP_REVISION_13
- EDP_RGB
- EDP_SDP_HEADER_REVISION_MASK
- EDP_SDP_HEADER_VALID_PAYLOAD_BYTES
- EDP_START_HOR_VER_FROM_SYNC_HORIZ
- EDP_START_HOR_VER_FROM_SYNC_HORIZ__MASK
- EDP_START_HOR_VER_FROM_SYNC_HORIZ__SHIFT
- EDP_START_HOR_VER_FROM_SYNC_VERT
- EDP_START_HOR_VER_FROM_SYNC_VERT__MASK
- EDP_START_HOR_VER_FROM_SYNC_VERT__SHIFT
- EDP_STATE_CTRL_CUSTOM_80_BIT_PATTERN
- EDP_STATE_CTRL_PRBS7
- EDP_STATE_CTRL_PUSH_IDLE
- EDP_STATE_CTRL_SEND_VIDEO
- EDP_STATE_CTRL_SYMBOL_ERR_RATE_MEAS
- EDP_STATE_CTRL_TRAIN_PATTERN_1
- EDP_STATE_CTRL_TRAIN_PATTERN_2
- EDP_STATE_CTRL_TRAIN_PATTERN_3
- EDP_SU_TRACK_ENABLE
- EDP_TOTAL_HOR_VER_HORIZ
- EDP_TOTAL_HOR_VER_HORIZ__MASK
- EDP_TOTAL_HOR_VER_HORIZ__SHIFT
- EDP_TOTAL_HOR_VER_VERT
- EDP_TOTAL_HOR_VER_VERT__MASK
- EDP_TOTAL_HOR_VER_VERT__SHIFT
- EDP_TRAIN_FAIL
- EDP_TRAIN_RECONFIG
- EDP_TRAIN_SUCCESS
- EDP_VSC_PSR_CRC_VALUES_VALID
- EDP_VSC_PSR_STATE_ACTIVE
- EDP_VSC_PSR_UPDATE_RFB
- EDP_VSWING_0_4V
- EDP_VSWING_0_6V
- EDP_VSWING_0_8V
- EDP_VSWING_1_2V
- EDP_VS_HIGH_VDIFF_MODE
- EDP_VS_LEGACY_MODE
- EDP_VS_LOW_VDIFF_MODE
- EDP_VS_SINGLE_VDIFF_MODE
- EDP_VS_STRETCH_MODE
- EDP_VS_VARIABLE_PREM_MODE
- EDP_XML
- EDP_YUV422
- EDP_YUV444
- EDP_Y_COORDINATE_ENABLE
- EDP_Y_COORDINATE_VALID
- EDQUOT
- EDRAM0_BASE_G
- EDRAM0_BASE_M
- EDRAM0_BASE_S
- EDRAM0_ENABLE_F
- EDRAM0_ENABLE_S
- EDRAM0_ENABLE_V
- EDRAM0_SIZE_G
- EDRAM0_SIZE_M
- EDRAM0_SIZE_S
- EDRAM0_SIZE_V
- EDRAM1_BASE_G
- EDRAM1_BASE_M
- EDRAM1_BASE_S
- EDRAM1_ENABLE_F
- EDRAM1_ENABLE_S
- EDRAM1_ENABLE_V
- EDRAM1_SIZE_G
- EDRAM1_SIZE_M
- EDRAM1_SIZE_S
- EDRAM1_SIZE_V
- EDRAM_COPY
- EDRAM_ENABLED
- EDRAM_NOP
- EDRAM_NUM_BANKS
- EDRAM_SETS_IDX
- EDRAM_WAYS_IDX
- EDRIVE_CANT_DO_THIS
- EDROP_IE
- EDRRR
- EDRRR_R
- EDRRR_R_BIT
- EDR_ESCO_MASK
- EDS1547
- EDSA_HLEN
- EDSP
- EDSR
- EDSR_BIT
- EDSR_ENALL
- EDSR_ENR
- EDSR_ENT
- EDTRR
- EDTRR_TRNS_ETHER
- EDTRR_TRNS_GETHER
- EDT_ATTR
- EDT_M06
- EDT_M09
- EDT_M12
- EDT_NAME_LEN
- EDT_RAW_DATA_DELAY
- EDT_RAW_DATA_RETRIES
- EDT_SWITCH_MODE_DELAY
- EDT_SWITCH_MODE_RETRIES
- EDVD_CORE_VOLT_FREQ
- EDVD_CORE_VOLT_FREQ_F_SHIFT
- EDVD_CORE_VOLT_FREQ_V_SHIFT
- EDVIDSR
- EDVIDSR_E2
- EDVIDSR_E3
- EDVIDSR_HV
- EDVIDSR_NS
- EDVIDSR_VMID
- EDX
- ED_ANY
- ED_BOARD_TIME_OUT
- ED_C
- ED_CANCELLED
- ED_CANNOT_OPEN_SVC_MANAGER
- ED_CANNOT_READ_REGISTRY
- ED_CCMP
- ED_COBRANET_ITF_NOT_RESPONDING
- ED_CONCURRENCY
- ED_DEQUEUE
- ED_DSP_BUSY
- ED_DSP_CHK_TIMED_OUT
- ED_DSP_CORRUPTED
- ED_DSP_CRASHED
- ED_DSP_CRASHED_EXC_DSPSTACK_OVERFLOW
- ED_DSP_CRASHED_EXC_FATAL_ERROR
- ED_DSP_CRASHED_EXC_ILLEGAL
- ED_DSP_CRASHED_EXC_SYSSTACK_OVERFLOW
- ED_DSP_CRASHED_EXC_TIMER_REENTRY
- ED_DSP_SEMAPHORE_TIME_OUT
- ED_DSP_TIMED_OUT
- ED_DSP_VERSION_MISMATCH
- ED_FILE_ERROR
- ED_FLASH_PCCARD_NOT_PRESENT
- ED_GN
- ED_GPIO_ALREADY_OPENED
- ED_GPIO_NOT_OPENED
- ED_H
- ED_IDLE
- ED_IN
- ED_INVALID_ADDRESS
- ED_INVALID_GPIO_CMD
- ED_INVALID_RS232_COM_NUMBER
- ED_INVALID_RS232_INIT
- ED_INVALID_SERVICE
- ED_ISO
- ED_LOWSPEED
- ED_MASK
- ED_MASK_OFFSET
- ED_NET_ALLOCATE_MEMORY_IMPOSSIBLE
- ED_NET_CLOSE_ERROR
- ED_NET_EEPROM_ERROR
- ED_NET_NO_MORE_BUFFER
- ED_NET_NO_MORE_PACKET
- ED_NET_OPEN_ERROR
- ED_NET_RECEIVE_ERROR
- ED_NET_REGISTER_ERROR
- ED_NET_SEND_ERROR
- ED_NET_THREAD_ERROR
- ED_NET_WAIT_ERROR
- ED_NET_WRONG_MSG_SIZE
- ED_NONE
- ED_NOT_INSTALLED
- ED_NO_CURRENT_CLOCK
- ED_NO_RESPONSE_AT_IRQA
- ED_OPER
- ED_OUT
- ED_PENDING_OPERATION
- ED_READ_FILE_ALREADY_CLOSED
- ED_READ_FILE_ALREADY_OPENED
- ED_READ_FILE_END_OF_FILE
- ED_READ_FILE_ERROR
- ED_READ_FILE_INVALID_COMMAND
- ED_READ_FILE_INVALID_HANDLE
- ED_READ_FILE_INVALID_PARAMETER
- ED_READ_FILE_NO_INFORMATION
- ED_REGISTRY_ERROR
- ED_RS232_ALREADY_OPENED
- ED_RS232_NOT_OPENED
- ED_RT
- ED_SKIP
- ED_STP_ISLAND
- ED_STP_SYNC
- ED_STREAM_OVERRUN
- ED_TKIP
- ED_TYPE_MAX
- ED_UNAVAILABLE_FEATURE
- ED_UNKNOWN_BOARD
- ED_UNLINK
- ED_WEP
- ED_WPI
- ED_XILINX_ERROR
- EE
- EE1004_ADDR_SET_PAGE
- EE1004_EEPROM_SIZE
- EE1004_PAGE_SHIFT
- EE1004_PAGE_SIZE
- EEAddr
- EECLK
- EECS
- EECSR_DPM
- EECSR_ECK
- EECSR_ECS
- EECSR_EDI
- EECSR_EDO
- EECSR_EMBP
- EECSR_RELOAD
- EECTL
- EECmdStatus
- EECtrl
- EECtrl_bits
- EEDI
- EEDO
- EEDONE
- EEData
- EEE10_EN
- EEEPC_ACPI_CLASS
- EEEPC_ACPI_DEVICE_NAME
- EEEPC_ACPI_HID
- EEEPC_ACPI_SHOW_FUNC
- EEEPC_ACPI_STORE_FUNC
- EEEPC_CREATE_DEVICE_ATTR_RW
- EEEPC_CREATE_DEVICE_ATTR_WO
- EEEPC_CREATE_SENSOR_ATTR_RO
- EEEPC_CREATE_SENSOR_ATTR_RW
- EEEPC_EC_FAN_CTRL
- EEEPC_EC_FAN_CTRL_BIT
- EEEPC_EC_FAN_HRPM
- EEEPC_EC_FAN_LRPM
- EEEPC_EC_FAN_PWM
- EEEPC_EC_SC00
- EEEPC_EC_SFB0
- EEEPC_FAN_CTRL_AUTO
- EEEPC_FAN_CTRL_MANUAL
- EEEPC_LAPTOP_FILE
- EEEPC_LAPTOP_NAME
- EEEPC_LAPTOP_VERSION
- EEEPC_SENSOR_SHOW_FUNC
- EEEPC_SENSOR_STORE_FUNC
- EEEPC_WMI_EVENT_GUID
- EEEPC_WMI_FILE
- EEEP_CR_EEEP_TX
- EEE_10G_ADV
- EEE_10G_SUPPORTED
- EEE_10_CAP
- EEE_1G_ADV
- EEE_1G_SUPPORTED
- EEE_ACTIVE_BIT
- EEE_ADV_100MBIT
- EEE_ADV_1GBIT
- EEE_ANEG_1000M
- EEE_ANEG_100M
- EEE_CFG_ADV_SPEED_10G
- EEE_CFG_ADV_SPEED_1G
- EEE_CFG_EEE_ENABLED
- EEE_CFG_TX_LPI
- EEE_CLKDIV_EN
- EEE_EN
- EEE_LD_ADV_STATUS_MASK
- EEE_LD_ADV_STATUS_OFFSET
- EEE_LED
- EEE_LPI_IRQ
- EEE_LP_ADV_STATUS_MASK
- EEE_LP_ADV_STATUS_OFFSET
- EEE_MODE_ADV_LPI
- EEE_MODE_ENABLE_LPI
- EEE_MODE_NVRAM_AGGRESSIVE_TIME
- EEE_MODE_NVRAM_BALANCED_TIME
- EEE_MODE_NVRAM_LATENCY_TIME
- EEE_MODE_NVRAM_MASK
- EEE_MODE_OUTPUT_TIME
- EEE_MODE_OVERRIDE_NVRAM
- EEE_MODE_TIMER_MASK
- EEE_NWAY_EN
- EEE_REFERENCE_COUNT_MASK
- EEE_REMOTE_TW_RX_MASK
- EEE_REMOTE_TW_RX_OFFSET
- EEE_REMOTE_TW_TX_MASK
- EEE_REMOTE_TW_TX_OFFSET
- EEE_RX_EN
- EEE_SPDWN_EN
- EEE_SPDWN_RATIO
- EEE_SUPPORTED_SPEED_MASK
- EEE_SUPPORTED_SPEED_OFFSET
- EEE_TW_TX_SYS
- EEE_TW_TX_SYS_CNT100M_MASK_
- EEE_TW_TX_SYS_CNT1G_MASK_
- EEE_TX_CLK_DIS
- EEE_TX_EN
- EEE_TX_LPI_REM_DLY
- EEE_TX_LPI_REM_DLY_CNT_
- EEE_TX_LPI_REQ_DLY
- EEE_TX_LPI_REQ_DLY_CNT_MASK_
- EEE_TX_TIMER_USEC_AGGRESSIVE_TIME
- EEE_TX_TIMER_USEC_BALANCED_TIME
- EEE_TX_TIMER_USEC_LATENCY_TIME
- EEE_TX_TIMER_USEC_MASK
- EEE_TX_TIMER_USEC_OFFSET
- EEFeature
- EEGNT
- EEH_DEV_BRIDGE
- EEH_DEV_DISCONNECTED
- EEH_DEV_DS_PORT
- EEH_DEV_IRQ_DISABLED
- EEH_DEV_NO_HANDLER
- EEH_DEV_REMOVED
- EEH_DEV_ROOT_PORT
- EEH_DEV_SYSFS
- EEH_EARLY_DUMP_LOG
- EEH_EDEV_PRINT
- EEH_ENABLED
- EEH_ENABLE_IO_FOR_LOG
- EEH_ERR_FUNC_DMA_RD_ADDR
- EEH_ERR_FUNC_DMA_RD_DATA
- EEH_ERR_FUNC_DMA_RD_MASTER
- EEH_ERR_FUNC_DMA_RD_TARGET
- EEH_ERR_FUNC_DMA_WR_ADDR
- EEH_ERR_FUNC_DMA_WR_DATA
- EEH_ERR_FUNC_DMA_WR_MASTER
- EEH_ERR_FUNC_DMA_WR_TARGET
- EEH_ERR_FUNC_LD_CFG_ADDR
- EEH_ERR_FUNC_LD_CFG_DATA
- EEH_ERR_FUNC_LD_IO_ADDR
- EEH_ERR_FUNC_LD_IO_DATA
- EEH_ERR_FUNC_LD_MEM_ADDR
- EEH_ERR_FUNC_LD_MEM_DATA
- EEH_ERR_FUNC_MAX
- EEH_ERR_FUNC_MIN
- EEH_ERR_FUNC_ST_CFG_ADDR
- EEH_ERR_FUNC_ST_CFG_DATA
- EEH_ERR_FUNC_ST_IO_ADDR
- EEH_ERR_FUNC_ST_IO_DATA
- EEH_ERR_FUNC_ST_MEM_ADDR
- EEH_ERR_FUNC_ST_MEM_DATA
- EEH_ERR_TYPE_32
- EEH_ERR_TYPE_64
- EEH_FORCE_DISABLED
- EEH_IO_ERROR_VALUE
- EEH_LOG_PERM
- EEH_LOG_TEMP
- EEH_MAX_FAILS
- EEH_NEXT_ERR_DEAD_IOC
- EEH_NEXT_ERR_DEAD_PHB
- EEH_NEXT_ERR_FENCED_PHB
- EEH_NEXT_ERR_FROZEN_PE
- EEH_NEXT_ERR_INF
- EEH_NEXT_ERR_NONE
- EEH_OPT_DISABLE
- EEH_OPT_ENABLE
- EEH_OPT_FREEZE_PE
- EEH_OPT_THAW_DMA
- EEH_OPT_THAW_MMIO
- EEH_PCI_REGS_LOG_LEN
- EEH_PE_BUS
- EEH_PE_CFG_BLOCKED
- EEH_PE_CFG_RESTRICTED
- EEH_PE_DEVICE
- EEH_PE_INVALID
- EEH_PE_ISOLATED
- EEH_PE_KEEP
- EEH_PE_PHB
- EEH_PE_PRI_BUS
- EEH_PE_RECOVERING
- EEH_PE_REMOVED
- EEH_PE_RESET
- EEH_PE_RST_HOLD_TIME
- EEH_PE_RST_SETTLE_TIME
- EEH_PE_STATE_NORMAL
- EEH_PE_STATE_RESET
- EEH_PE_STATE_STOPPED_DMA
- EEH_PE_STATE_STOPPED_IO_DMA
- EEH_PE_STATE_UNAVAIL
- EEH_PE_VF
- EEH_POSSIBLE_ERROR
- EEH_PROBE_MODE_DEV
- EEH_PROBE_MODE_DEVTREE
- EEH_RECOVERY
- EEH_RESET_DEACTIVATE
- EEH_RESET_FUNDAMENTAL
- EEH_RESET_HOT
- EEH_SHOW_ATTR
- EEH_STATE_DMA_ACTIVE
- EEH_STATE_DMA_ENABLED
- EEH_STATE_MAX_WAIT_TIME
- EEH_STATE_MIN_WAIT_TIME
- EEH_STATE_MMIO_ACTIVE
- EEH_STATE_MMIO_ENABLED
- EEH_STATE_NOT_SUPPORT
- EEH_STATE_RESET_ACTIVE
- EEH_STATE_UNAVAILABLE
- EEH_VALID_PE_ZERO
- EEM_HEAD
- EEM_HLEN
- EEM_PRODUCT_NUM
- EEM_VENDOR_NUM
- EEPCR_EECS
- EEPCR_EEDO
- EEPCR_EESA
- EEPCR_EESB
- EEPCR_EESCK
- EEPCR_EESRWA
- EEPJOK
- EEPMOK
- EEPRG
- EEPROMCLK
- EEPROMChecksum
- EEPROMCtrl
- EEPROMDeviceID
- EEPROME_CHIP_VERSION_H
- EEPROME_CHIP_VERSION_L
- EEPROMInfo
- EEPROMMACAddr
- EEPROMPFSIZE
- EEPROMRead
- EEPROMSEL
- EEPROMSIZE
- EEPROMSignature
- EEPROMVSIZE
- EEPROMVendorID
- EEPROMWRINT_F
- EEPROMWRINT_S
- EEPROMWRINT_V
- EEPROMWrite
- EEPROM_1000_EEPROM_VERSION
- EEPROM_1000_TX_POWER_VERSION
- EEPROM_1_IF_H
- EEPROM_1_IF_L
- EEPROM_1_TUNER_ID
- EEPROM_2000_EEPROM_VERSION
- EEPROM_2000_TX_POWER_VERSION
- EEPROM_2ND_DEMOD_ADDR
- EEPROM_2_IF_H
- EEPROM_2_IF_L
- EEPROM_2_TUNER_ID
- EEPROM_3945_EEPROM_VERSION
- EEPROM_3945_RF_CFG_TYPE_MAX
- EEPROM_4965_BOARD_PBA
- EEPROM_4965_BOARD_REVISION
- EEPROM_4965_CALIB_TXPOWER_OFFSET
- EEPROM_4965_CALIB_VERSION_OFFSET
- EEPROM_4965_EEPROM_VERSION
- EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS
- EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
- EEPROM_4965_RF_CFG_TYPE_MAX
- EEPROM_4965_TX_POWER_VERSION
- EEPROM_5000_EEPROM_VERSION
- EEPROM_5000_TX_POWER_VERSION
- EEPROM_5050_EEPROM_VERSION
- EEPROM_5050_TX_POWER_VERSION
- EEPROM_6000_EEPROM_VERSION
- EEPROM_6000_REG_BAND_24_HT40_CHANNELS
- EEPROM_6000_TX_POWER_VERSION
- EEPROM_6005_EEPROM_VERSION
- EEPROM_6005_TX_POWER_VERSION
- EEPROM_6030_EEPROM_VERSION
- EEPROM_6030_TX_POWER_VERSION
- EEPROM_6035_EEPROM_VERSION
- EEPROM_6035_TX_POWER_VERSION
- EEPROM_6050_EEPROM_VERSION
- EEPROM_6050_TX_POWER_VERSION
- EEPROM_6150_EEPROM_VERSION
- EEPROM_6150_TX_POWER_VERSION
- EEPROM_8BIT
- EEPROM_93C46
- EEPROM_93C56
- EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH
- EEPROM_93XX46_QUIRK_SINGLE_WORD_READ
- EEPROM_A8_OPCODE_SPI
- EEPROM_ACCESS_ENABLE
- EEPROM_ACCESS_TO
- EEPROM_ADDR
- EEPROM_ADDRESS_SIZE
- EEPROM_ADDRESS_WIDTH
- EEPROM_ADDR_ADDR_MASK
- EEPROM_ADDR_ADDR_SHIFT
- EEPROM_ADDR_CLKPERD_SHIFT
- EEPROM_ADDR_COMPLETE
- EEPROM_ADDR_DEVID_MASK
- EEPROM_ADDR_DEVID_SHIFT
- EEPROM_ADDR_FSM_RESET
- EEPROM_ADDR_MSB_MASK
- EEPROM_ADDR_READ
- EEPROM_ADDR_START
- EEPROM_ADDR_WRITE
- EEPROM_ADR
- EEPROM_ANALOGINPUT
- EEPROM_ANALOGOUTPUT
- EEPROM_ANTENNA
- EEPROM_ANTENNA_DYN_TXAGC
- EEPROM_ANTENNA_FRAME_TYPE
- EEPROM_ANTENNA_HARDWARE_RADIO
- EEPROM_ANTENNA_LED_MODE
- EEPROM_ANTENNA_NUM
- EEPROM_ANTENNA_RF_TYPE
- EEPROM_ANTENNA_RX_AGCVGC_TUNING
- EEPROM_ANTENNA_RX_DEFAULT
- EEPROM_ANTENNA_TX_DEFAULT
- EEPROM_AREA
- EEPROM_BASE
- EEPROM_BASE_AF9035
- EEPROM_BASE_IT9135
- EEPROM_BBPTUNE
- EEPROM_BBPTUNE_R17
- EEPROM_BBPTUNE_R17_HIGH
- EEPROM_BBPTUNE_R17_LOW
- EEPROM_BBPTUNE_R24
- EEPROM_BBPTUNE_R24_HIGH
- EEPROM_BBPTUNE_R24_LOW
- EEPROM_BBPTUNE_R25
- EEPROM_BBPTUNE_R25_HIGH
- EEPROM_BBPTUNE_R25_LOW
- EEPROM_BBPTUNE_R61
- EEPROM_BBPTUNE_R61_HIGH
- EEPROM_BBPTUNE_R61_LOW
- EEPROM_BBPTUNE_THRESHOLD
- EEPROM_BBPTUNE_VGC
- EEPROM_BBPTUNE_VGCLOWER
- EEPROM_BBPTUNE_VGCUPPER
- EEPROM_BBP_REG_ID
- EEPROM_BBP_SIZE
- EEPROM_BBP_START
- EEPROM_BBP_VALUE
- EEPROM_BIT_CS
- EEPROM_BIT_DI
- EEPROM_BIT_DO
- EEPROM_BIT_SK
- EEPROM_BLUETOOTH_COEXIST
- EEPROM_BLUETOOTH_TYPE
- EEPROM_BOARDID_ELDORADO
- EEPROM_BOARDID_PLACER
- EEPROM_BOARDID_STR_SIZE
- EEPROM_BOARDTYPE
- EEPROM_BOARD_PBA_NUMBER
- EEPROM_BOARD_REVISION
- EEPROM_BOOT
- EEPROM_BOOT_EFUSE
- EEPROM_BSS_CHANNELS_BG
- EEPROM_BUSY
- EEPROM_BYTES
- EEPROM_BYTE_READ_START
- EEPROM_BYTE_WRITE_START
- EEPROM_CALIBRATE_OFFSET
- EEPROM_CALIBRATE_OFFSET_RSSI
- EEPROM_CALIB_ALL
- EEPROM_CCK_TX_PWR_INX
- EEPROM_CCK_TX_PWR_INX_2G
- EEPROM_CFG
- EEPROM_CHANNELPLAN
- EEPROM_CHANNEL_ACTIVE
- EEPROM_CHANNEL_DFS
- EEPROM_CHANNEL_IBSS
- EEPROM_CHANNEL_PLAN
- EEPROM_CHANNEL_PLAN_BY_HW_MASK
- EEPROM_CHANNEL_PLAN_ETSI
- EEPROM_CHANNEL_PLAN_FCC
- EEPROM_CHANNEL_PLAN_FRANCE
- EEPROM_CHANNEL_PLAN_GLOBAL_DOMA
- EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN
- EEPROM_CHANNEL_PLAN_IC
- EEPROM_CHANNEL_PLAN_ISRAEL
- EEPROM_CHANNEL_PLAN_MKK
- EEPROM_CHANNEL_PLAN_MKK1
- EEPROM_CHANNEL_PLAN_NCC
- EEPROM_CHANNEL_PLAN_SPA
- EEPROM_CHANNEL_PLAN_SPAIN
- EEPROM_CHANNEL_PLAN_TELEC
- EEPROM_CHANNEL_PLAN_WORLD_WIDE_13
- EEPROM_CHANNEL_RADAR
- EEPROM_CHANNEL_VALID
- EEPROM_CHANNEL_WIDE
- EEPROM_CHECKSUM
- EEPROM_CHECKSUM_NONE
- EEPROM_CHECKSUM_REG
- EEPROM_CHECKSUM_REV
- EEPROM_CHECK_SUM
- EEPROM_CHIP_ID
- EEPROM_CHIP_SELECT
- EEPROM_CHIP_SELECT_ACTIVE
- EEPROM_CHIP_SELECT_ENABLE
- EEPROM_CHIP_SIZE
- EEPROM_CID_ALPHA
- EEPROM_CID_ALPHA0
- EEPROM_CID_CAMEO
- EEPROM_CID_CAMEO1
- EEPROM_CID_CCX
- EEPROM_CID_CLEVO
- EEPROM_CID_COREGA
- EEPROM_CID_DEFAULT
- EEPROM_CID_DELL
- EEPROM_CID_DLINK
- EEPROM_CID_EDIMAX_BELK
- EEPROM_CID_EDIMAX_BELKIN
- EEPROM_CID_HW
- EEPROM_CID_NetCore
- EEPROM_CID_Nettronix
- EEPROM_CID_Pronet
- EEPROM_CID_QMI
- EEPROM_CID_RSVD0
- EEPROM_CID_RSVD1
- EEPROM_CID_RUNTOP
- EEPROM_CID_SERCOMM_BELK
- EEPROM_CID_SERCOMM_BELKIN
- EEPROM_CID_SERCOMM_PS
- EEPROM_CID_SITECOM
- EEPROM_CID_Senao
- EEPROM_CID_TOSHIBA
- EEPROM_CID_WHQL
- EEPROM_CID_WNC_COREGA
- EEPROM_CIRCUIT_CTRL_REG
- EEPROM_CLK
- EEPROM_CLK_OUT
- EEPROM_CMD_READ
- EEPROM_COMPAT
- EEPROM_COMPATIBILITY_REG
- EEPROM_COPYRIGHT
- EEPROM_COPYRIGHT_LEN
- EEPROM_COUNTRY_CODE
- EEPROM_CRC
- EEPROM_CRYSTALCAP
- EEPROM_CRYSTAL_CAP
- EEPROM_CS
- EEPROM_CSEL
- EEPROM_CTRL_ACK
- EEPROM_CTRL_ADDR_MASK
- EEPROM_CTRL_ADDR_SHIFT
- EEPROM_CTRL_DATA_HI_MASK
- EEPROM_CTRL_DATA_HI_SHIFT
- EEPROM_CTRL_RW
- EEPROM_CUSTOMERID_88E
- EEPROM_CUSTOMER_ID
- EEPROM_CUSTOMID
- EEPROM_ChannelPlan_8723B
- EEPROM_ChannelPlan_88E
- EEPROM_Cmds
- EEPROM_CrystalCap
- EEPROM_Ctrl_Bits
- EEPROM_CustomID_8723B
- EEPROM_Customer_ID
- EEPROM_D0_D3_POWER_REG
- EEPROM_DATA
- EEPROM_DATA_IN
- EEPROM_DATA_LEN_9485
- EEPROM_DATA_MAC_ADDR_0
- EEPROM_DATA_MAC_ADDR_1
- EEPROM_DATA_MAC_ADDR_2
- EEPROM_DATA_OTHER_MAC_ADDR
- EEPROM_DATA_OUT
- EEPROM_DATA_PM_CAP
- EEPROM_DATA_RESERVED
- EEPROM_DATA_SUBSYS_ID
- EEPROM_DATA_SUBSYS_VEN_ID
- EEPROM_DATI
- EEPROM_DATO
- EEPROM_DEFAULT_24G_HT20_DIFF
- EEPROM_DEFAULT_24G_INDEX
- EEPROM_DEFAULT_24G_OFDM_DIFF
- EEPROM_DEFAULT_5G_HT20_DIFF
- EEPROM_DEFAULT_5G_INDEX
- EEPROM_DEFAULT_5G_OFDM_DIFF
- EEPROM_DEFAULT_ANTTXPOWERDIFF
- EEPROM_DEFAULT_BOARDTYPE
- EEPROM_DEFAULT_BOARD_OPTION
- EEPROM_DEFAULT_BT_OPTION
- EEPROM_DEFAULT_CHANNEL_PLAN
- EEPROM_DEFAULT_CLOCK_PERIOD
- EEPROM_DEFAULT_CRYSTALCAP
- EEPROM_DEFAULT_CRYSTAL_CAP
- EEPROM_DEFAULT_CUSTOMERID
- EEPROM_DEFAULT_DIFF
- EEPROM_DEFAULT_FEATURE_OPTION
- EEPROM_DEFAULT_HT20_DIFF
- EEPROM_DEFAULT_HT20_PWRMAXOFFSET
- EEPROM_DEFAULT_HT2T_TXPWR
- EEPROM_DEFAULT_HT40_2SDIFF
- EEPROM_DEFAULT_HT40_PWRMAXOFFSET
- EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF
- EEPROM_DEFAULT_PID
- EEPROM_DEFAULT_PW_DIFF
- EEPROM_DEFAULT_SUBCUSTOMERID
- EEPROM_DEFAULT_THERMALMETER
- EEPROM_DEFAULT_THERNAL_METER
- EEPROM_DEFAULT_TSSI
- EEPROM_DEFAULT_TXPOWER
- EEPROM_DEFAULT_TXPOWERDIFF
- EEPROM_DEFAULT_TXPOWERLEVEL
- EEPROM_DEFAULT_TXPOWERLEVEL_2G
- EEPROM_DEFAULT_TXPOWERLEVEL_5G
- EEPROM_DEFAULT_TXPWDIFF_CRYSTALCAP
- EEPROM_DEFAULT_TX_POWER
- EEPROM_DEFAULT_VERSION
- EEPROM_DEFAULT_VID
- EEPROM_DEF_ADDR
- EEPROM_DEF_PART_NO
- EEPROM_DEF_SIZE
- EEPROM_DELAY
- EEPROM_DEVICE_ID
- EEPROM_DEVICE_ID_REG
- EEPROM_DI
- EEPROM_DID
- EEPROM_DID_88EE
- EEPROM_DIGITALINPUT
- EEPROM_DIGITALOUTPUT
- EEPROM_DONE_INTERRUPT
- EEPROM_DONE_INTERRUPT_ENABLE
- EEPROM_Default_AntTxPowerDiff
- EEPROM_Default_BoardType
- EEPROM_Default_CrystalCap
- EEPROM_Default_CrystalCap_8723B
- EEPROM_Default_CrystalCap_88E
- EEPROM_Default_CustomerID
- EEPROM_Default_CustomerID_8188E
- EEPROM_Default_HT20_Diff
- EEPROM_Default_HT20_PwrMaxOffset
- EEPROM_Default_HT2T_TxPwr
- EEPROM_Default_HT40_2SDiff
- EEPROM_Default_HT40_PwrMaxOffset
- EEPROM_Default_LegacyHTTxPowerDiff
- EEPROM_Default_PID
- EEPROM_Default_PwDiff
- EEPROM_Default_SubCustomerID
- EEPROM_Default_TSSI
- EEPROM_Default_ThermalMeter
- EEPROM_Default_ThermalMeter_8723B
- EEPROM_Default_ThermalMeter_88E
- EEPROM_Default_TxPower
- EEPROM_Default_TxPowerDiff
- EEPROM_Default_TxPowerLevel
- EEPROM_Default_TxPwDiff_CrystalCap
- EEPROM_Default_VID
- EEPROM_Default_Version
- EEPROM_ECLK
- EEPROM_EIRP_MAX_TX_POWER
- EEPROM_EIRP_MAX_TX_POWER_2GHZ
- EEPROM_EIRP_MAX_TX_POWER_5GHZ
- EEPROM_EN
- EEPROM_ENABLE
- EEPROM_END
- EEPROM_EPROT
- EEPROM_ERASE
- EEPROM_ERASE256_OPCODE_SPI
- EEPROM_ERASE4K_OPCODE_SPI
- EEPROM_ERASE64K_OPCODE_SPI
- EEPROM_ERASE_OPCODE
- EEPROM_ERASE_OPCODE_MICROWIRE
- EEPROM_EWDIS
- EEPROM_EWDS_OPCODE
- EEPROM_EWDS_OPCODE_MICROWIRE
- EEPROM_EWENB
- EEPROM_EWEN_OPCODE
- EEPROM_EWEN_OPCODE_MICROWIRE
- EEPROM_EXT_LNA2
- EEPROM_EXT_LNA2_A1
- EEPROM_EXT_LNA2_A2
- EEPROM_EXT_TXPOWER_A3
- EEPROM_EXT_TXPOWER_BG3
- EEPROM_FIELD_SWAB16
- EEPROM_FIELD_SWAB32
- EEPROM_FILENAME_LEN
- EEPROM_FLASH_VERSION
- EEPROM_FREQ
- EEPROM_FREQ_LED_MODE
- EEPROM_FREQ_LED_POLARITY
- EEPROM_FREQ_OFFSET
- EEPROM_FREQ_SEQ
- EEPROM_FREQ_SEQ_MASK
- EEPROM_FW_NOT_SUPPORT
- EEPROM_GEOGRAPHY
- EEPROM_GEOGRAPHY_GEO
- EEPROM_GEOGRAPHY_GEO_A
- EEPROM_H
- EEPROM_HDR_START
- EEPROM_HPON
- EEPROM_HT20_MAX_PWR_OFFSET
- EEPROM_HT20_MAX_PWR_OFFSET_2G
- EEPROM_HT20_MAX_PWR_OFFSET_5GH
- EEPROM_HT20_MAX_PWR_OFFSET_5GL
- EEPROM_HT20_MAX_PWR_OFFSET_5GM
- EEPROM_HT20_TX_PWR_INX_DIFF
- EEPROM_HT20_TX_PWR_INX_DIFF_2G
- EEPROM_HT20_TX_PWR_INX_DIFF_5GH
- EEPROM_HT20_TX_PWR_INX_DIFF_5GL
- EEPROM_HT20_TX_PWR_INX_DIFF_5GM
- EEPROM_HT2T_CH13_A
- EEPROM_HT2T_CH13_B
- EEPROM_HT2T_CH1_A
- EEPROM_HT2T_CH1_B
- EEPROM_HT2T_CH7_A
- EEPROM_HT2T_CH7_B
- EEPROM_HT40_1S_TX_PWR_INX
- EEPROM_HT40_1S_TX_PWR_INX_2G
- EEPROM_HT40_1S_TX_PWR_INX_5GH
- EEPROM_HT40_1S_TX_PWR_INX_5GL
- EEPROM_HT40_1S_TX_PWR_INX_5GM
- EEPROM_HT40_2S_TX_PWR_INX_DIFF
- EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G
- EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH
- EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL
- EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM
- EEPROM_HT40_MAX_PWR_OFFSET
- EEPROM_HT40_MAX_PWR_OFFSET_2G
- EEPROM_HT40_MAX_PWR_OFFSET_5GH
- EEPROM_HT40_MAX_PWR_OFFSET_5GL
- EEPROM_HT40_MAX_PWR_OFFSET_5GM
- EEPROM_HW_VERSION
- EEPROM_I2C_ADDR
- EEPROM_I2C_TARGET_ADDR
- EEPROM_IA_1_2_REG
- EEPROM_IA_3_4_REG
- EEPROM_IA_5_6_REG
- EEPROM_IBSS_CHANNELS_A
- EEPROM_IBSS_CHANNELS_BG
- EEPROM_ICVersion_ChannelPlan
- EEPROM_ICW1_SIGNATURE_CLEAR
- EEPROM_ICW1_SIGNATURE_MASK
- EEPROM_ICW1_SIGNATURE_VALID
- EEPROM_IC_VER
- EEPROM_ID_LED_SETTINGS
- EEPROM_INDICATOR
- EEPROM_INDICATOR_1
- EEPROM_INDICATOR_2
- EEPROM_INIT_3GIO_3
- EEPROM_INIT_CONTROL1_REG
- EEPROM_INIT_CONTROL2_REG
- EEPROM_INIT_CONTROL3_PORT_A
- EEPROM_INIT_CONTROL3_PORT_B
- EEPROM_IQK_DELTA
- EEPROM_IQK_LCK_88E
- EEPROM_IQK_LCK_92E
- EEPROM_IQ_GAIN_CAL_RX0_2G
- EEPROM_IQ_GAIN_CAL_RX0_CH100_TO_CH138_5G
- EEPROM_IQ_GAIN_CAL_RX0_CH140_TO_CH165_5G
- EEPROM_IQ_GAIN_CAL_RX0_CH36_TO_CH64_5G
- EEPROM_IQ_GAIN_CAL_RX1_2G
- EEPROM_IQ_GAIN_CAL_RX1_CH100_TO_CH138_5G
- EEPROM_IQ_GAIN_CAL_RX1_CH140_TO_CH165_5G
- EEPROM_IQ_GAIN_CAL_RX1_CH36_TO_CH64_5G
- EEPROM_IQ_GAIN_CAL_TX0_2G
- EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G
- EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G
- EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G
- EEPROM_IQ_GAIN_CAL_TX1_2G
- EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G
- EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G
- EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G
- EEPROM_IQ_GROUPDELAY_CAL_RX0_2G
- EEPROM_IQ_GROUPDELAY_CAL_RX0_CH100_TO_CH138_5G
- EEPROM_IQ_GROUPDELAY_CAL_RX0_CH140_TO_CH165_5G
- EEPROM_IQ_GROUPDELAY_CAL_RX0_CH36_TO_CH64_5G
- EEPROM_IQ_GROUPDELAY_CAL_RX1_2G
- EEPROM_IQ_GROUPDELAY_CAL_RX1_CH100_TO_CH138_5G
- EEPROM_IQ_GROUPDELAY_CAL_RX1_CH140_TO_CH165_5G
- EEPROM_IQ_GROUPDELAY_CAL_RX1_CH36_TO_CH64_5G
- EEPROM_IQ_GROUPDELAY_CAL_TX0_2G
- EEPROM_IQ_GROUPDELAY_CAL_TX0_CH100_TO_CH138_5G
- EEPROM_IQ_GROUPDELAY_CAL_TX0_CH140_TO_CH165_5G
- EEPROM_IQ_GROUPDELAY_CAL_TX0_CH36_TO_CH64_5G
- EEPROM_IQ_GROUPDELAY_CAL_TX1_2G
- EEPROM_IQ_GROUPDELAY_CAL_TX1_CH100_TO_CH138_5G
- EEPROM_IQ_GROUPDELAY_CAL_TX1_CH140_TO_CH165_5G
- EEPROM_IQ_GROUPDELAY_CAL_TX1_CH36_TO_CH64_5G
- EEPROM_IQ_PHASE_CAL_RX0_2G
- EEPROM_IQ_PHASE_CAL_RX0_CH100_TO_CH138_5G
- EEPROM_IQ_PHASE_CAL_RX0_CH140_TO_CH165_5G
- EEPROM_IQ_PHASE_CAL_RX0_CH36_TO_CH64_5G
- EEPROM_IQ_PHASE_CAL_RX1_2G
- EEPROM_IQ_PHASE_CAL_RX1_CH100_TO_CH138_5G
- EEPROM_IQ_PHASE_CAL_RX1_CH140_TO_CH165_5G
- EEPROM_IQ_PHASE_CAL_RX1_CH36_TO_CH64_5G
- EEPROM_IQ_PHASE_CAL_TX0_2G
- EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G
- EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G
- EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G
- EEPROM_IQ_PHASE_CAL_TX1_2G
- EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G
- EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G
- EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G
- EEPROM_IR_MODE
- EEPROM_IR_TYPE
- EEPROM_KELVIN_TEMPERATURE
- EEPROM_LAERR
- EEPROM_LCK_DELTA
- EEPROM_LED
- EEPROM_LED_ACT_CONF
- EEPROM_LED_AG_CONF
- EEPROM_LED_LED_MODE
- EEPROM_LED_POLARITY
- EEPROM_LED_POLARITY_ACT
- EEPROM_LED_POLARITY_GPIO_0
- EEPROM_LED_POLARITY_GPIO_1
- EEPROM_LED_POLARITY_GPIO_2
- EEPROM_LED_POLARITY_GPIO_3
- EEPROM_LED_POLARITY_GPIO_4
- EEPROM_LED_POLARITY_RDY_A
- EEPROM_LED_POLARITY_RDY_BG
- EEPROM_LED_POLARITY_RDY_G
- EEPROM_LINK_CALIBRATION
- EEPROM_LINK_GENERAL
- EEPROM_LINK_HOST
- EEPROM_LINK_OTHERS
- EEPROM_LINK_PROCESS_ADJST
- EEPROM_LINK_REGULATORY
- EEPROM_LINK_TXP_LIMIT
- EEPROM_LINK_TXP_LIMIT_SIZE
- EEPROM_LNA
- EEPROM_LNA_A0
- EEPROM_LNA_BG
- EEPROM_MAC
- EEPROM_MAC_ADDR
- EEPROM_MAC_ADDR1
- EEPROM_MAC_ADDRESS
- EEPROM_MAC_ADDR_0
- EEPROM_MAC_ADDR_1
- EEPROM_MAC_ADDR_2
- EEPROM_MAC_ADDR_8723BS
- EEPROM_MAC_ADDR_88EE
- EEPROM_MAC_ADDR_88ES
- EEPROM_MAC_ADDR_88EU
- EEPROM_MAC_ADDR_BYTE0
- EEPROM_MAC_ADDR_BYTE1
- EEPROM_MAC_ADDR_BYTE2
- EEPROM_MAC_ADDR_BYTE3
- EEPROM_MAC_ADDR_BYTE4
- EEPROM_MAC_ADDR_BYTE5
- EEPROM_MAC_ADDR_MAC0_92D
- EEPROM_MAC_ADDR_MAC1_92D
- EEPROM_MAC_FUNCTION
- EEPROM_MAC_OFFSET
- EEPROM_MAC_REV
- EEPROM_MAC_START
- EEPROM_MAC_TOTAL
- EEPROM_MAGIC
- EEPROM_MAGIC_REV
- EEPROM_MAGIC_VALUE
- EEPROM_MAX_POLL
- EEPROM_MAX_RD_POLL
- EEPROM_MAX_RECORD_NUM
- EEPROM_MAX_RETRY_SPI
- EEPROM_MAX_SIZE
- EEPROM_MAX_WR_POLL
- EEPROM_MSS
- EEPROM_NAERR
- EEPROM_NG
- EEPROM_NIC
- EEPROM_NIC_CARDBUS_ACCEL
- EEPROM_NIC_CCK_TX_POWER
- EEPROM_NIC_CONF0
- EEPROM_NIC_CONF0_RF_TYPE
- EEPROM_NIC_CONF0_RXPATH
- EEPROM_NIC_CONF0_TXPATH
- EEPROM_NIC_CONF1
- EEPROM_NIC_CONF1_ANT_DIVERSITY
- EEPROM_NIC_CONF1_BROADBAND_EXT_LNA
- EEPROM_NIC_CONF1_BT_COEXIST
- EEPROM_NIC_CONF1_BW40M_2G
- EEPROM_NIC_CONF1_BW40M_5G
- EEPROM_NIC_CONF1_BW40M_SB_2G
- EEPROM_NIC_CONF1_BW40M_SB_5G
- EEPROM_NIC_CONF1_CARDBUS_ACCEL
- EEPROM_NIC_CONF1_DAC_TEST
- EEPROM_NIC_CONF1_EXTERNAL_LNA_2G
- EEPROM_NIC_CONF1_EXTERNAL_LNA_5G
- EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352
- EEPROM_NIC_CONF1_EXTERNAL_TX1_PA_3352
- EEPROM_NIC_CONF1_EXTERNAL_TX_ALC
- EEPROM_NIC_CONF1_HW_RADIO
- EEPROM_NIC_CONF1_INTERNAL_TX_ALC
- EEPROM_NIC_CONF1_WPS_PBC
- EEPROM_NIC_CONF2
- EEPROM_NIC_CONF2_CRYSTAL
- EEPROM_NIC_CONF2_RX_STREAM
- EEPROM_NIC_CONF2_TX_STREAM
- EEPROM_NIC_DYN_BBP_TUNE
- EEPROM_NIC_ENABLE_DIVERSITY
- EEPROM_NIC_EXTERNAL_LNA
- EEPROM_NIC_EXTERNAL_LNA_A
- EEPROM_NIC_EXTERNAL_LNA_BG
- EEPROM_NIC_RX_FIXED
- EEPROM_NIC_TX_DIVERSITY
- EEPROM_NIC_TX_FIXED
- EEPROM_NIC_TYPE
- EEPROM_NIC_TYPE_0
- EEPROM_NIC_TYPE_1
- EEPROM_NIC_TYPE_2
- EEPROM_NIC_TYPE_3
- EEPROM_NIC_TYPE_4
- EEPROM_NODE_ADDRESS_BYTE_0
- EEPROM_NO_ADDR_BITS
- EEPROM_NO_DATA_BITS
- EEPROM_NUM_MAC_ADDRESS
- EEPROM_OEM_MODE
- EEPROM_OFDM_TX_PWR_INX_DIFF
- EEPROM_OFDM_TX_PWR_INX_DIFF_2G
- EEPROM_OFDM_TX_PWR_INX_DIFF_5GH
- EEPROM_OFDM_TX_PWR_INX_DIFF_5GL
- EEPROM_OFDM_TX_PWR_INX_DIFF_5GM
- EEPROM_OFFSET
- EEPROM_OK
- EEPROM_OP
- EEPROM_OPTIONAL
- EEPROM_OP_READ
- EEPROM_OP_WRITE
- EEPROM_PAGE__SIZE_BYTES
- EEPROM_PBA_1_2_REG
- EEPROM_PBA_3_4_REG
- EEPROM_PBA_BYTE_1
- EEPROM_PHY_CLASS_A
- EEPROM_PHY_CLASS_WORD
- EEPROM_PID
- EEPROM_PID_88EU
- EEPROM_PME_CAPABILITY
- EEPROM_PRCLEAR
- EEPROM_PRDS
- EEPROM_PREN
- EEPROM_PRESENT
- EEPROM_PROTECT_RP_0_31
- EEPROM_PROTECT_RP_1024_2047
- EEPROM_PROTECT_RP_128_191
- EEPROM_PROTECT_RP_192_255
- EEPROM_PROTECT_RP_256_511
- EEPROM_PROTECT_RP_32_63
- EEPROM_PROTECT_RP_512_1023
- EEPROM_PROTECT_RP_64_127
- EEPROM_PROTECT_WP_0_31
- EEPROM_PROTECT_WP_1024_2047
- EEPROM_PROTECT_WP_128_191
- EEPROM_PROTECT_WP_192_255
- EEPROM_PROTECT_WP_256_511
- EEPROM_PROTECT_WP_32_63
- EEPROM_PROTECT_WP_512_1023
- EEPROM_PROTECT_WP_64_127
- EEPROM_PRREAD
- EEPROM_PRWRITE
- EEPROM_PWDIFF
- EEPROM_PWRDIFF
- EEPROM_PW_DIFF
- EEPROM_PwDiff
- EEPROM_RADIO_CONFIG
- EEPROM_RAW_TEMPERATURE
- EEPROM_RDSR_OPCODE_SPI
- EEPROM_RD_CNT
- EEPROM_READ
- EEPROM_READBACK_LEN
- EEPROM_READ_CMD
- EEPROM_READ_DATA
- EEPROM_READ_OPCODE
- EEPROM_READ_OPCODE_MICROWIRE
- EEPROM_READ_OPCODE_SPI
- EEPROM_READ_SELECT
- EEPROM_RECORD_START
- EEPROM_REGULATORY
- EEPROM_REGULATORY_BAND_1
- EEPROM_REGULATORY_BAND_1_CHANNELS
- EEPROM_REGULATORY_BAND_2
- EEPROM_REGULATORY_BAND_2_CHANNELS
- EEPROM_REGULATORY_BAND_3
- EEPROM_REGULATORY_BAND_3_CHANNELS
- EEPROM_REGULATORY_BAND_4
- EEPROM_REGULATORY_BAND_4_CHANNELS
- EEPROM_REGULATORY_BAND_5
- EEPROM_REGULATORY_BAND_5_CHANNELS
- EEPROM_REGULATORY_BAND_NO_HT40
- EEPROM_REGULATORY_SKU_ID
- EEPROM_REG_BAND_1_CHANNELS
- EEPROM_REG_BAND_24_HT40_CHANNELS
- EEPROM_REG_BAND_2_CHANNELS
- EEPROM_REG_BAND_3_CHANNELS
- EEPROM_REG_BAND_4_CHANNELS
- EEPROM_REG_BAND_52_HT40_CHANNELS
- EEPROM_REG_BAND_5_CHANNELS
- EEPROM_RESERVED_WORD
- EEPROM_RESET
- EEPROM_RFE_OPTION
- EEPROM_RFIND_POWERDIFF
- EEPROM_RFInd_PowerDiff
- EEPROM_RF_ANTENNA_OPT_88E
- EEPROM_RF_ANTENNA_OPT_92E
- EEPROM_RF_BOARD_OPTION
- EEPROM_RF_BOARD_OPTION_8723B
- EEPROM_RF_BOARD_OPTION_88E
- EEPROM_RF_BOARD_OPTION_92E
- EEPROM_RF_BT_SETTING
- EEPROM_RF_BT_SETTING_8723B
- EEPROM_RF_BT_SETTING_88E
- EEPROM_RF_BT_SETTING_92E
- EEPROM_RF_CFG_DASH_MSK
- EEPROM_RF_CFG_PNUM_MSK
- EEPROM_RF_CFG_RX_ANT_MSK
- EEPROM_RF_CFG_STEP_MSK
- EEPROM_RF_CFG_TX_ANT_MSK
- EEPROM_RF_CFG_TYPE_MSK
- EEPROM_RF_CONFIG_TYPE_MAX
- EEPROM_RF_FEATURE_OPTION_88E
- EEPROM_RF_FEATURE_OPTION_92E
- EEPROM_RF_GAIN_OFFSET
- EEPROM_RF_GAIN_VAL
- EEPROM_RF_IQ_COMPENSATION_CONTROL
- EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL
- EEPROM_RF_OPT1
- EEPROM_RF_OPT2
- EEPROM_RF_OPT3
- EEPROM_RF_OPT4
- EEPROM_RF_OPT5
- EEPROM_RF_OPT6
- EEPROM_RF_OPT7
- EEPROM_RSSI_A
- EEPROM_RSSI_A2
- EEPROM_RSSI_A2_LNA_A2
- EEPROM_RSSI_A2_OFFSET2
- EEPROM_RSSI_A_OFFSET0
- EEPROM_RSSI_A_OFFSET1
- EEPROM_RSSI_BG
- EEPROM_RSSI_BG2
- EEPROM_RSSI_BG2_LNA_A1
- EEPROM_RSSI_BG2_OFFSET2
- EEPROM_RSSI_BG_OFFSET0
- EEPROM_RSSI_BG_OFFSET1
- EEPROM_RSSI_OFFSET_A
- EEPROM_RSSI_OFFSET_A_1
- EEPROM_RSSI_OFFSET_A_2
- EEPROM_RSSI_OFFSET_BG
- EEPROM_RSSI_OFFSET_BG_1
- EEPROM_RSSI_OFFSET_BG_2
- EEPROM_RST_INTR_DISBL
- EEPROM_RST_INTR_ENBL
- EEPROM_RW
- EEPROM_Read
- EEPROM_SA_OFFSET
- EEPROM_SEM_RETRY_LIMIT
- EEPROM_SEM_TIMEOUT
- EEPROM_SERDES_AMPLITUDE
- EEPROM_SERDES_AMPLITUDE_MASK
- EEPROM_SERIAL
- EEPROM_SERIAL_CLOCK
- EEPROM_SERIAL_NUM_SIZE
- EEPROM_SERIAL_REV
- EEPROM_SHIFT
- EEPROM_SIZE
- EEPROM_SIZE_BYTES
- EEPROM_SIZE_MASK
- EEPROM_SIZE_SHIFT
- EEPROM_SK
- EEPROM_SKU_CAP
- EEPROM_SKU_CAPABILITY
- EEPROM_SKU_CAP_11N_ENABLE
- EEPROM_SKU_CAP_AMT_ENABLE
- EEPROM_SKU_CAP_BAND_24GHZ
- EEPROM_SKU_CAP_BAND_52GHZ
- EEPROM_SKU_CAP_BT_CHANNEL_SIG
- EEPROM_SKU_CAP_BT_OOB
- EEPROM_SKU_CAP_BT_PRIORITY
- EEPROM_SKU_CAP_HW_RF_KILL_ENABLE
- EEPROM_SKU_CAP_IPAN_ENABLE
- EEPROM_SKU_CAP_OP_MODE_MRC
- EEPROM_SKU_CAP_SW_RF_KILL_ENABLE
- EEPROM_SMID
- EEPROM_SMID_88EE
- EEPROM_SR_MODE
- EEPROM_START
- EEPROM_STAT
- EEPROM_STATUS_BP0_SPI
- EEPROM_STATUS_BP1_SPI
- EEPROM_STATUS_RDY_SPI
- EEPROM_STATUS_WEN_SPI
- EEPROM_STATUS_WPEN_SPI
- EEPROM_STAT_ADDR
- EEPROM_STRT
- EEPROM_SUBSYSTEM_ID
- EEPROM_SUBSYS_ID_REG
- EEPROM_SUBVEND_ID_REG
- EEPROM_SUM
- EEPROM_SVID
- EEPROM_SVID_88EE
- EEPROM_SWDEF_PINS_CTRL_PORT_0
- EEPROM_SWDEF_PINS_CTRL_PORT_1
- EEPROM_SWDPINS_REG
- EEPROM_SW_RST_MODE
- EEPROM_TABLE_HDR_VAL
- EEPROM_TABLE_HEADER_SIZE
- EEPROM_TABLE_RECORD_SIZE
- EEPROM_TABLE_VER
- EEPROM_TESTR
- EEPROM_THERMALMETER
- EEPROM_THERMAL_METER
- EEPROM_THERMAL_METER_8723B
- EEPROM_THERMAL_METER_88E
- EEPROM_THERMAL_METER_92E
- EEPROM_TIMEOUT
- EEPROM_TIMER
- EEPROM_TIMER_WATCHDOG_COUNTER
- EEPROM_TOUT
- EEPROM_TSSI_A
- EEPROM_TSSI_AB_5G
- EEPROM_TSSI_A_5G
- EEPROM_TSSI_B
- EEPROM_TSSI_BOUND_A1
- EEPROM_TSSI_BOUND_A1_MINUS3
- EEPROM_TSSI_BOUND_A1_MINUS4
- EEPROM_TSSI_BOUND_A2
- EEPROM_TSSI_BOUND_A2_MINUS1
- EEPROM_TSSI_BOUND_A2_MINUS2
- EEPROM_TSSI_BOUND_A3
- EEPROM_TSSI_BOUND_A3_PLUS1
- EEPROM_TSSI_BOUND_A3_REF
- EEPROM_TSSI_BOUND_A4
- EEPROM_TSSI_BOUND_A4_PLUS2
- EEPROM_TSSI_BOUND_A4_PLUS3
- EEPROM_TSSI_BOUND_A5
- EEPROM_TSSI_BOUND_A5_AGC_STEP
- EEPROM_TSSI_BOUND_A5_PLUS4
- EEPROM_TSSI_BOUND_BG1
- EEPROM_TSSI_BOUND_BG1_MINUS3
- EEPROM_TSSI_BOUND_BG1_MINUS4
- EEPROM_TSSI_BOUND_BG2
- EEPROM_TSSI_BOUND_BG2_MINUS1
- EEPROM_TSSI_BOUND_BG2_MINUS2
- EEPROM_TSSI_BOUND_BG3
- EEPROM_TSSI_BOUND_BG3_PLUS1
- EEPROM_TSSI_BOUND_BG3_REF
- EEPROM_TSSI_BOUND_BG4
- EEPROM_TSSI_BOUND_BG4_PLUS2
- EEPROM_TSSI_BOUND_BG4_PLUS3
- EEPROM_TSSI_BOUND_BG5
- EEPROM_TSSI_BOUND_BG5_AGC_STEP
- EEPROM_TSSI_BOUND_BG5_PLUS4
- EEPROM_TSSI_B_5G
- EEPROM_TS_MODE
- EEPROM_TXMIXER_GAIN_A
- EEPROM_TXMIXER_GAIN_A_VAL
- EEPROM_TXMIXER_GAIN_BG
- EEPROM_TXMIXER_GAIN_BG_VAL
- EEPROM_TXPOWERBASE
- EEPROM_TXPOWERCCK
- EEPROM_TXPOWERHT20DIFF
- EEPROM_TXPOWERHT40_1S
- EEPROM_TXPOWERHT40_2SDIFF
- EEPROM_TXPOWER_1
- EEPROM_TXPOWER_2
- EEPROM_TXPOWER_A1
- EEPROM_TXPOWER_A2
- EEPROM_TXPOWER_ALC
- EEPROM_TXPOWER_A_1
- EEPROM_TXPOWER_A_2
- EEPROM_TXPOWER_A_SIZE
- EEPROM_TXPOWER_A_START
- EEPROM_TXPOWER_BG1
- EEPROM_TXPOWER_BG2
- EEPROM_TXPOWER_BG_1
- EEPROM_TXPOWER_BG_2
- EEPROM_TXPOWER_BG_SIZE
- EEPROM_TXPOWER_BYRATE
- EEPROM_TXPOWER_BYRATE_RATE0
- EEPROM_TXPOWER_BYRATE_RATE1
- EEPROM_TXPOWER_BYRATE_RATE2
- EEPROM_TXPOWER_BYRATE_RATE3
- EEPROM_TXPOWER_BYRATE_SIZE
- EEPROM_TXPOWER_DELTA
- EEPROM_TXPOWER_DELTA_ENABLE_2G
- EEPROM_TXPOWER_DELTA_ENABLE_5G
- EEPROM_TXPOWER_DELTA_TYPE_2G
- EEPROM_TXPOWER_DELTA_TYPE_5G
- EEPROM_TXPOWER_DELTA_VALUE_2G
- EEPROM_TXPOWER_DELTA_VALUE_5G
- EEPROM_TXPOWER_FINE_CTRL
- EEPROM_TXPOWER_G_1
- EEPROM_TXPOWER_G_2
- EEPROM_TXPOWER_G_SIZE
- EEPROM_TXPOWER_G_START
- EEPROM_TXPOWER_INIT
- EEPROM_TXPOWER_OFDMDIFF
- EEPROM_TXPOWER_SIZE
- EEPROM_TXPOWER_START
- EEPROM_TXPWINDEX_CCK_24G
- EEPROM_TXPWINDEX_OFDM_24G
- EEPROM_TXPWRGROUP
- EEPROM_TXPWR_GROUP
- EEPROM_TXP_ENTRY_LEN
- EEPROM_TXP_OFFS
- EEPROM_TXP_SZ_OFFS
- EEPROM_TX_POWER_BANDS
- EEPROM_TX_POWER_DIFF
- EEPROM_TX_POWER_MEASUREMENTS
- EEPROM_TX_POWER_TX_CHAINS
- EEPROM_TX_PWR_HT20_DIFF
- EEPROM_TX_PWR_INDEX_RANGE
- EEPROM_TX_PWR_INX
- EEPROM_TX_PWR_INX_8723B
- EEPROM_TX_PWR_INX_88E
- EEPROM_TX_PWR_OFDM_DIFF
- EEPROM_TX_PW_INDEX_CCK
- EEPROM_TX_PW_INDEX_CCK_V1
- EEPROM_TX_PW_INDEX_OFDM_24G
- EEPROM_TX_PW_INDEX_OFDM_24G_V1
- EEPROM_TX_PW_INDEX_VER
- EEPROM_ThermalMeter
- EEPROM_TxPowerDiff
- EEPROM_TxPwDiff_CrystalCap
- EEPROM_TxPwIndex_CCK
- EEPROM_TxPwIndex_CCK_V1
- EEPROM_TxPwIndex_OFDM_24G
- EEPROM_TxPwIndex_OFDM_24G_V1
- EEPROM_TxPwIndex_Ver
- EEPROM_UNUSED_1_SIZE
- EEPROM_UNUSED_2_SIZE
- EEPROM_UNUSED_3_SIZE
- EEPROM_UNUSED_4_SIZE
- EEPROM_USA
- EEPROM_USB_OPTIONAL1
- EEPROM_USB_OPTIONAL_FUNCTION0
- EEPROM_VALID
- EEPROM_VENDOR_ID_REG
- EEPROM_VERSION
- EEPROM_VERSION_8723B
- EEPROM_VERSION_88E
- EEPROM_VERSION_FAE
- EEPROM_VERSION_VERSION
- EEPROM_VID
- EEPROM_VID_88EE
- EEPROM_VID_88EU
- EEPROM_Voltage_ADDR_8723B
- EEPROM_W
- EEPROM_WAPI_SUPPORT
- EEPROM_WATCHDOG
- EEPROM_WDS
- EEPROM_WD_CNT
- EEPROM_WEN
- EEPROM_WORD0A_66MHZ
- EEPROM_WORD0A_FD
- EEPROM_WORD0A_ILOS
- EEPROM_WORD0A_LRST
- EEPROM_WORD0A_SWDPIO
- EEPROM_WORD0F_ANE
- EEPROM_WORD0F_ASM_DIR
- EEPROM_WORD0F_LPLU
- EEPROM_WORD0F_PAUSE
- EEPROM_WORD0F_PAUSE_MASK
- EEPROM_WORD0F_SWPDIO_EXT
- EEPROM_WORD1020_GIGA_DISABLE
- EEPROM_WORD1020_GIGA_DISABLE_NON_D0A
- EEPROM_WORD1A_ASPM_MASK
- EEPROM_WORDS
- EEPROM_WORD_COUNT
- EEPROM_WORD_SIZE_SHIFT
- EEPROM_WOWLAN
- EEPROM_WOWLAN_MODE
- EEPROM_WRALL
- EEPROM_WRDI_OPCODE_SPI
- EEPROM_WREN_OPCODE_SPI
- EEPROM_WRITE
- EEPROM_WRITE_CMD
- EEPROM_WRITE_DATA
- EEPROM_WRITE_DIS
- EEPROM_WRITE_EN
- EEPROM_WRITE_ENABLE
- EEPROM_WRITE_OPCODE
- EEPROM_WRITE_OPCODE_MICROWIRE
- EEPROM_WRITE_OPCODE_SPI
- EEPROM_WRITE_SELECT
- EEPROM_WRRD_CNT
- EEPROM_WRSR_OPCODE_SPI
- EEPROM_WR_CNT
- EEPROM_XTAL
- EEPROM_XTAL_8723B
- EEPROM_XTAL_8723BE
- EEPROM_XTAL_8821AE
- EEPROM_XTAL_88E
- EEPROM_XTAL_92E
- EEPROM_XTAL_K
- EEP_4K_BB_DESIRED_SCALE_MASK
- EEP_ANTENNA_AUX
- EEP_ANTENNA_GAIN_2G
- EEP_ANTENNA_GAIN_5G
- EEP_ANTENNA_MAIN
- EEP_ANTINV
- EEP_ANT_DIV_CTL1
- EEP_BUSY
- EEP_CHAIN_MASK_REDUCE
- EEP_DAC_HPWR_5G
- EEP_DB_2
- EEP_DB_5
- EEP_DEV_TYPE
- EEP_FRAC_N_5G
- EEP_FSTCLK_5G
- EEP_I2C_DEV_ID
- EEP_MAC_LSW
- EEP_MAC_MID
- EEP_MAC_MSW
- EEP_MAX_CONTEXT_SIZE
- EEP_MODAL_VER
- EEP_NFTHRESH_2
- EEP_NFTHRESH_5
- EEP_OB_2
- EEP_OB_5
- EEP_OFS_ANTENNA
- EEP_OFS_BBTAB_ADR
- EEP_OFS_BBTAB_LEN
- EEP_OFS_CALIB_RX_IQ
- EEP_OFS_CALIB_TX_DC
- EEP_OFS_CALIB_TX_IQ
- EEP_OFS_CCK_PWR_TBL
- EEP_OFS_CCK_PWR_dBm
- EEP_OFS_CHECKSUM
- EEP_OFS_MAJOR_VER
- EEP_OFS_MAXCHANNEL
- EEP_OFS_MINCHANNEL
- EEP_OFS_MINOR_VER
- EEP_OFS_OFDMA_PWR_TBL
- EEP_OFS_OFDMA_PWR_dBm
- EEP_OFS_OFDM_PWR_TBL
- EEP_OFS_OFDM_PWR_dBm
- EEP_OFS_PAR
- EEP_OFS_PWR_CCK
- EEP_OFS_PWR_FORMULA_OST
- EEP_OFS_PWR_OFDMG
- EEP_OFS_RADIOCTL
- EEP_OFS_RFTABLE
- EEP_OFS_RFTYPE
- EEP_OFS_SETPT_CCK
- EEP_OFS_SETPT_OFDMA
- EEP_OFS_SETPT_OFDMG
- EEP_OFS_SIGNATURE
- EEP_OFS_ZONETYPE
- EEP_OL_PWRCTRL
- EEP_OP_CAP
- EEP_OP_MODE
- EEP_PAPRD
- EEP_PWR_TABLE_OFFSET
- EEP_RADIOCTL_ENABLE
- EEP_RADIOCTL_INV
- EEP_RC_CHAIN_MASK
- EEP_RD
- EEP_READ
- EEP_REG_0
- EEP_RFSILENT_ENABLED
- EEP_RFSILENT_ENABLED_S
- EEP_RFSILENT_GPIO_SEL
- EEP_RFSILENT_GPIO_SEL_S
- EEP_RFSILENT_POLARITY
- EEP_RFSILENT_POLARITY_S
- EEP_RF_SILENT
- EEP_RXGAIN_TYPE
- EEP_RX_MASK
- EEP_TEMPSENSE_SLOPE
- EEP_TEMPSENSE_SLOPE_PAL_ON
- EEP_TXGAIN_TYPE
- EEP_TX_MASK
- EEP_VAL
- EEREQ
- EEROP
- EERSV_BOOT_BEV
- EERSV_BOOT_INT18
- EERSV_BOOT_INT19
- EERSV_BOOT_LOCAL
- EERSV_BOOT_MASK
- EERSV_BOOT_RPL
- EERead
- EESIPR
- EESIPR_ADEIP
- EESIPR_BIT
- EESIPR_CDIP
- EESIPR_CEEFIP
- EESIPR_CELFIP
- EESIPR_CERFIP
- EESIPR_CNDIP
- EESIPR_DLCIP
- EESIPR_ECIIP
- EESIPR_FRIP
- EESIPR_FTCIP
- EESIPR_PREIP
- EESIPR_RABTIP
- EESIPR_RDEIP
- EESIPR_RFCOFIP
- EESIPR_RFOFIP
- EESIPR_RMAFIP
- EESIPR_ROCIP
- EESIPR_RRFIP
- EESIPR_RTLFIP
- EESIPR_RTSFIP
- EESIPR_TABTIP
- EESIPR_TC1IP
- EESIPR_TDEIP
- EESIPR_TFUFIP
- EESIPR_TROIP
- EESIPR_TUCIP
- EESIPR_TWB1IP
- EESIPR_TWBIP
- EESOX_CONTROL
- EESOX_DMADATA
- EESOX_DMASTAT
- EESOX_FAS216_OFFSET
- EESOX_FAS216_SHIFT
- EESOX_INTR_ENABLE
- EESOX_RESET
- EESOX_STAT_DMA
- EESOX_STAT_INTR
- EESOX_TERM_ENABLE
- EESR
- EESR_ADE
- EESR_BIT
- EESR_CD
- EESR_CEEF
- EESR_CELF
- EESR_CERF
- EESR_CND
- EESR_DLC
- EESR_ECI
- EESR_FRC
- EESR_FTC
- EESR_PRE
- EESR_RABT
- EESR_RDE
- EESR_RFE
- EESR_RFRMER
- EESR_RMAF
- EESR_ROC
- EESR_RRF
- EESR_RTLF
- EESR_RTSF
- EESR_RX_CHECK
- EESR_TABT
- EESR_TC1
- EESR_TDE
- EESR_TFE
- EESR_TRO
- EESR_TUC
- EESR_TWB
- EESR_TWB1
- EEStatus
- EETI_MAXVAL
- EETI_TS_BITDEPTH
- EETYPE_TX_PWR
- EEVER_NUMBER
- EEWOP
- EEWrite
- EEXIST
- EE_9346CR
- EE_ADDR
- EE_ADDR1
- EE_ADDR16
- EE_ADDR2
- EE_ADDR3
- EE_ADDR8
- EE_ADOT
- EE_ALLOW_FDX
- EE_APPLICATION
- EE_ASIC
- EE_AUTO_NEG_CNF_MASK
- EE_AUTO_NEG_ENABLE
- EE_CALL_AL_COMPLETE_IO
- EE_CK
- EE_CLK_HIGH
- EE_CLK_LOW
- EE_CMD_SIZE
- EE_CS
- EE_CTL
- EE_CTL_READ
- EE_ChipSelect
- EE_DATA
- EE_DATA_READ
- EE_DATA_WRITE
- EE_DI
- EE_DO
- EE_DataIn
- EE_DataOut
- EE_EEP
- EE_ENB
- EE_ERAL_ADDR
- EE_ERASE
- EE_ERASE_CMD
- EE_EWDS_ADDR
- EE_EWDS_CMD
- EE_EWEN_ADDR
- EE_EWEN_CMD
- EE_EXTEND_CMD
- EE_EraseCmd
- EE_FIELD
- EE_FORCE_FDX
- EE_HAS_DIGEST
- EE_INSTR_BIT3_IS_ADDR
- EE_IN_INTERVAL_TREE
- EE_MAXADDRLEN
- EE_MAY_SET_IN_SYNC
- EE_MGR_RSC_GRP
- EE_NGD_1
- EE_NGD_2
- EE_NLP_ENABLE
- EE_READ
- EE_READ256_CMD
- EE_READ64_CMD
- EE_READONLY
- EE_READ_CMD
- EE_RESTART_REQUESTS
- EE_RESUBMITTED
- EE_RS_THIN_REQ
- EE_ReadCmd
- EE_SCAMBASE
- EE_SEND_WRITE_ACK
- EE_SHIFT_CLK
- EE_SIZE_64
- EE_SPI_BUS_NUM
- EE_START
- EE_SUBMITTED
- EE_SYNC_10MB
- EE_SYNC_20MB
- EE_SYNC_5MB
- EE_SYNC_MASK
- EE_ShiftClk
- EE_TIMEOUT
- EE_TRIM
- EE_VPD
- EE_WAS_ERROR
- EE_WIDE_SCSI
- EE_WRAL_ADDR
- EE_WRITE
- EE_WRITE_0
- EE_WRITE_1
- EE_WRITE_CMD
- EE_WRITE_SAME
- EE_Write0
- EE_Write1
- EE_WriteCmd
- EE_ZEROOUT
- EEaddrMask
- EEcmdShift
- EEerase
- EEeraseAll
- EEread
- EEwrite
- EEwriteAll
- EEwriteDisable
- EEwriteEnable
- EF10_CTPIO_STAT_MASK
- EF10_DMA_INVIS_STAT
- EF10_DMA_STAT
- EF10_FEC_STAT_MASK
- EF10_NVRAM_PARTITION_COUNT
- EF10_OFFLOAD_FEATURES
- EF10_OTHER_STAT
- EF10_RESET_MC
- EF10_RESET_PORT
- EF10_SRIOV_H
- EF10_STAT_COUNT
- EF10_STAT_V1_COUNT
- EF10_STAT_ctpio_erase
- EF10_STAT_ctpio_fallback
- EF10_STAT_ctpio_frm_clobber_fail
- EF10_STAT_ctpio_invalid_wr_fail
- EF10_STAT_ctpio_long_write_success
- EF10_STAT_ctpio_missing_dbell_fail
- EF10_STAT_ctpio_noncontig_wr_fail
- EF10_STAT_ctpio_overflow_fail
- EF10_STAT_ctpio_poison
- EF10_STAT_ctpio_runt_fallback
- EF10_STAT_ctpio_success
- EF10_STAT_ctpio_timeout_fail
- EF10_STAT_ctpio_underflow_fail
- EF10_STAT_ctpio_unqualified_fallback
- EF10_STAT_ctpio_vi_busy_fallback
- EF10_STAT_ctpio_vi_clobber_fallback
- EF10_STAT_fec_corrected_errors
- EF10_STAT_fec_corrected_symbols_lane0
- EF10_STAT_fec_corrected_symbols_lane1
- EF10_STAT_fec_corrected_symbols_lane2
- EF10_STAT_fec_corrected_symbols_lane3
- EF10_STAT_fec_uncorrected_errors
- EF10_STAT_port_rx_1024_to_15xx
- EF10_STAT_port_rx_128_to_255
- EF10_STAT_port_rx_15xx_to_jumbo
- EF10_STAT_port_rx_256_to_511
- EF10_STAT_port_rx_512_to_1023
- EF10_STAT_port_rx_64
- EF10_STAT_port_rx_65_to_127
- EF10_STAT_port_rx_align_error
- EF10_STAT_port_rx_bad
- EF10_STAT_port_rx_bad_bytes
- EF10_STAT_port_rx_bad_gtjumbo
- EF10_STAT_port_rx_broadcast
- EF10_STAT_port_rx_bytes
- EF10_STAT_port_rx_bytes_minus_good_bytes
- EF10_STAT_port_rx_control
- EF10_STAT_port_rx_dp_di_dropped_packets
- EF10_STAT_port_rx_dp_hlb_fetch
- EF10_STAT_port_rx_dp_hlb_wait
- EF10_STAT_port_rx_dp_q_disabled_packets
- EF10_STAT_port_rx_dp_streaming_packets
- EF10_STAT_port_rx_good
- EF10_STAT_port_rx_good_bytes
- EF10_STAT_port_rx_gtjumbo
- EF10_STAT_port_rx_length_error
- EF10_STAT_port_rx_lt64
- EF10_STAT_port_rx_multicast
- EF10_STAT_port_rx_nodesc_drops
- EF10_STAT_port_rx_overflow
- EF10_STAT_port_rx_packets
- EF10_STAT_port_rx_pause
- EF10_STAT_port_rx_pm_discard_bb_overflow
- EF10_STAT_port_rx_pm_discard_mapping
- EF10_STAT_port_rx_pm_discard_qbb
- EF10_STAT_port_rx_pm_discard_vfifo_full
- EF10_STAT_port_rx_pm_trunc_bb_overflow
- EF10_STAT_port_rx_pm_trunc_qbb
- EF10_STAT_port_rx_pm_trunc_vfifo_full
- EF10_STAT_port_rx_unicast
- EF10_STAT_port_tx_1024_to_15xx
- EF10_STAT_port_tx_128_to_255
- EF10_STAT_port_tx_15xx_to_jumbo
- EF10_STAT_port_tx_256_to_511
- EF10_STAT_port_tx_512_to_1023
- EF10_STAT_port_tx_64
- EF10_STAT_port_tx_65_to_127
- EF10_STAT_port_tx_broadcast
- EF10_STAT_port_tx_bytes
- EF10_STAT_port_tx_control
- EF10_STAT_port_tx_lt64
- EF10_STAT_port_tx_multicast
- EF10_STAT_port_tx_packets
- EF10_STAT_port_tx_pause
- EF10_STAT_port_tx_unicast
- EF10_STAT_rx_bad
- EF10_STAT_rx_bad_bytes
- EF10_STAT_rx_broadcast
- EF10_STAT_rx_broadcast_bytes
- EF10_STAT_rx_multicast
- EF10_STAT_rx_multicast_bytes
- EF10_STAT_rx_overflow
- EF10_STAT_rx_unicast
- EF10_STAT_rx_unicast_bytes
- EF10_STAT_tx_bad
- EF10_STAT_tx_bad_bytes
- EF10_STAT_tx_broadcast
- EF10_STAT_tx_broadcast_bytes
- EF10_STAT_tx_multicast
- EF10_STAT_tx_multicast_bytes
- EF10_STAT_tx_overflow
- EF10_STAT_tx_unicast
- EF10_STAT_tx_unicast_bytes
- EF10_TX_PIOBUF_COUNT
- EF1BYTE
- EF1Byte
- EF2BYTE
- EF2Byte
- EF4BYTE
- EF4Byte
- EF4_AND_OWORD
- EF4_ASSERT_RESET_SERIALISED
- EF4_BITFIELD_H
- EF4_BUF_SIZE
- EF4_BUG_ON_PARANOID
- EF4_CHANNEL_MAGIC_FILL
- EF4_CHANNEL_MAGIC_RX_DRAIN
- EF4_CHANNEL_MAGIC_TEST
- EF4_CHANNEL_MAGIC_TX_DRAIN
- EF4_CHANNEL_NAME
- EF4_DEFAULT_DMAQ_SIZE
- EF4_DMA_TYPE_WIDTH
- EF4_DRIVER_VERSION
- EF4_DUMMY_FIELD_LBN
- EF4_DUMMY_FIELD_WIDTH
- EF4_DWORD_0_LBN
- EF4_DWORD_0_WIDTH
- EF4_DWORD_1_LBN
- EF4_DWORD_1_WIDTH
- EF4_DWORD_2_LBN
- EF4_DWORD_2_WIDTH
- EF4_DWORD_3_LBN
- EF4_DWORD_3_WIDTH
- EF4_DWORD_FIELD
- EF4_DWORD_FMT
- EF4_DWORD_IS_ALL_ONES
- EF4_DWORD_IS_ZERO
- EF4_DWORD_VAL
- EF4_EFX_H
- EF4_EMPTY_COUNT_VALID
- EF4_ENUM_H
- EF4_ETHTOOL_ATOMIC_NIC_ERROR_STAT
- EF4_ETHTOOL_EEPROM_MAGIC
- EF4_ETHTOOL_STAT
- EF4_ETHTOOL_STAT_SOURCE_channel
- EF4_ETHTOOL_STAT_SOURCE_nic
- EF4_ETHTOOL_STAT_SOURCE_tx_queue
- EF4_ETHTOOL_SW_STAT_COUNT
- EF4_ETHTOOL_UINT_CHANNEL_STAT
- EF4_ETHTOOL_UINT_TXQ_STAT
- EF4_EXTRACT32
- EF4_EXTRACT64
- EF4_EXTRACT_DWORD
- EF4_EXTRACT_NATIVE
- EF4_EXTRACT_OWORD32
- EF4_EXTRACT_OWORD64
- EF4_EXTRACT_QWORD32
- EF4_EXTRACT_QWORD64
- EF4_EXTRA_CHANNEL_IOV
- EF4_EXTRA_CHANNEL_PTP
- EF4_FARCH_FILTER_CTL_SRCH_FUDGE_FULL
- EF4_FARCH_FILTER_CTL_SRCH_FUDGE_WILD
- EF4_FARCH_FILTER_CTL_SRCH_HINT_MAX
- EF4_FARCH_FILTER_CTL_SRCH_MAX
- EF4_FARCH_FILTER_INDEX_MASK
- EF4_FARCH_FILTER_INDEX_MC_DEF
- EF4_FARCH_FILTER_INDEX_UC_DEF
- EF4_FARCH_FILTER_INDEX_WIDTH
- EF4_FARCH_FILTER_MAC_FULL
- EF4_FARCH_FILTER_MAC_WILD
- EF4_FARCH_FILTER_MATCH_PRI_COUNT
- EF4_FARCH_FILTER_MC_DEF
- EF4_FARCH_FILTER_SIZE_RX_DEF
- EF4_FARCH_FILTER_TABLE_COUNT
- EF4_FARCH_FILTER_TABLE_RX_DEF
- EF4_FARCH_FILTER_TABLE_RX_IP
- EF4_FARCH_FILTER_TABLE_RX_MAC
- EF4_FARCH_FILTER_TABLE_TX_MAC
- EF4_FARCH_FILTER_TCP_FULL
- EF4_FARCH_FILTER_TCP_WILD
- EF4_FARCH_FILTER_TYPE_COUNT
- EF4_FARCH_FILTER_UC_DEF
- EF4_FARCH_FILTER_UDP_FULL
- EF4_FARCH_FILTER_UDP_WILD
- EF4_FARCH_REGS_H
- EF4_FC_AUTO
- EF4_FC_RX
- EF4_FC_TX
- EF4_FILTER_FLAG_RX
- EF4_FILTER_FLAG_RX_OVER_AUTO
- EF4_FILTER_FLAG_RX_RSS
- EF4_FILTER_FLAG_RX_SCATTER
- EF4_FILTER_FLAG_TX
- EF4_FILTER_H
- EF4_FILTER_MATCH_ETHER_TYPE
- EF4_FILTER_MATCH_INNER_VID
- EF4_FILTER_MATCH_IP_PROTO
- EF4_FILTER_MATCH_LOC_HOST
- EF4_FILTER_MATCH_LOC_MAC
- EF4_FILTER_MATCH_LOC_MAC_IG
- EF4_FILTER_MATCH_LOC_PORT
- EF4_FILTER_MATCH_OUTER_VID
- EF4_FILTER_MATCH_REM_HOST
- EF4_FILTER_MATCH_REM_MAC
- EF4_FILTER_MATCH_REM_PORT
- EF4_FILTER_PRI_AUTO
- EF4_FILTER_PRI_HINT
- EF4_FILTER_PRI_MANUAL
- EF4_FILTER_PRI_REQUIRED
- EF4_FILTER_RSS_CONTEXT_DEFAULT
- EF4_FILTER_RX_DMAQ_ID_DROP
- EF4_FILTER_VID_UNSPEC
- EF4_FRAME_PAD
- EF4_HIGH_BIT
- EF4_INPLACE_MASK32
- EF4_INPLACE_MASK64
- EF4_INSERT32
- EF4_INSERT64
- EF4_INSERT_FIELDS32
- EF4_INSERT_FIELDS64
- EF4_INSERT_FIELDS_NATIVE
- EF4_INSERT_FIELD_NATIVE
- EF4_INSERT_NATIVE
- EF4_INSERT_NATIVE32
- EF4_INSERT_NATIVE64
- EF4_INT_ERROR_EXPIRE
- EF4_INT_MODE_LEGACY
- EF4_INT_MODE_MAX
- EF4_INT_MODE_MSI
- EF4_INT_MODE_MSIX
- EF4_INT_MODE_USE_MSI
- EF4_INVERT_OWORD
- EF4_IO_H
- EF4_LED_DEFAULT
- EF4_LED_OFF
- EF4_LED_ON
- EF4_LOOPBACK_NAME
- EF4_LOW_BIT
- EF4_MASK32
- EF4_MASK64
- EF4_MAX_CHANNELS
- EF4_MAX_CORE_TX_QUEUES
- EF4_MAX_DMAQ_SIZE
- EF4_MAX_EVQ_SIZE
- EF4_MAX_EXTRA_CHANNELS
- EF4_MAX_FLUSH_TIME
- EF4_MAX_FRAME_LEN
- EF4_MAX_INT_ERRORS
- EF4_MAX_MTU
- EF4_MAX_PHY_TESTS
- EF4_MAX_RX_QUEUES
- EF4_MAX_TX_QUEUES
- EF4_MAX_TX_TC
- EF4_MCAST_HASH_BITS
- EF4_MCAST_HASH_ENTRIES
- EF4_MDIO_10G_H
- EF4_MEM_BAR
- EF4_MEM_VF_BAR
- EF4_MIN_DMAQ_SIZE
- EF4_MIN_EVQ_SIZE
- EF4_MIN_MTU
- EF4_NET_DRIVER_H
- EF4_NIC_H
- EF4_OR_OWORD
- EF4_OWORD32
- EF4_OWORD_FIELD
- EF4_OWORD_FIELD32
- EF4_OWORD_FIELD64
- EF4_OWORD_FMT
- EF4_OWORD_IS_ALL_ONES
- EF4_OWORD_IS_ALL_ONES32
- EF4_OWORD_IS_ALL_ONES64
- EF4_OWORD_IS_ZERO
- EF4_OWORD_IS_ZERO32
- EF4_OWORD_IS_ZERO64
- EF4_OWORD_VAL
- EF4_PAGED_REG
- EF4_PAGE_SIZE
- EF4_PHY_H
- EF4_POPULATE_DWORD
- EF4_POPULATE_DWORD_1
- EF4_POPULATE_DWORD_10
- EF4_POPULATE_DWORD_2
- EF4_POPULATE_DWORD_3
- EF4_POPULATE_DWORD_4
- EF4_POPULATE_DWORD_5
- EF4_POPULATE_DWORD_6
- EF4_POPULATE_DWORD_7
- EF4_POPULATE_DWORD_8
- EF4_POPULATE_DWORD_9
- EF4_POPULATE_OWORD
- EF4_POPULATE_OWORD32
- EF4_POPULATE_OWORD64
- EF4_POPULATE_OWORD_1
- EF4_POPULATE_OWORD_10
- EF4_POPULATE_OWORD_2
- EF4_POPULATE_OWORD_3
- EF4_POPULATE_OWORD_4
- EF4_POPULATE_OWORD_5
- EF4_POPULATE_OWORD_6
- EF4_POPULATE_OWORD_7
- EF4_POPULATE_OWORD_8
- EF4_POPULATE_OWORD_9
- EF4_POPULATE_QWORD
- EF4_POPULATE_QWORD32
- EF4_POPULATE_QWORD64
- EF4_POPULATE_QWORD_1
- EF4_POPULATE_QWORD_10
- EF4_POPULATE_QWORD_2
- EF4_POPULATE_QWORD_3
- EF4_POPULATE_QWORD_4
- EF4_POPULATE_QWORD_5
- EF4_POPULATE_QWORD_6
- EF4_POPULATE_QWORD_7
- EF4_POPULATE_QWORD_8
- EF4_POPULATE_QWORD_9
- EF4_QWORD_0_LBN
- EF4_QWORD_0_WIDTH
- EF4_QWORD_FIELD
- EF4_QWORD_FIELD32
- EF4_QWORD_FIELD64
- EF4_QWORD_FMT
- EF4_QWORD_IS_ALL_ONES
- EF4_QWORD_IS_ALL_ONES32
- EF4_QWORD_IS_ALL_ONES64
- EF4_QWORD_IS_ZERO
- EF4_QWORD_IS_ZERO32
- EF4_QWORD_IS_ZERO64
- EF4_QWORD_VAL
- EF4_RECYCLE_RING_SIZE_IOMMU
- EF4_RECYCLE_RING_SIZE_NOIOMMU
- EF4_REV_FALCON_A0
- EF4_REV_FALCON_A1
- EF4_REV_FALCON_B0
- EF4_RXD_HEAD_ROOM
- EF4_RXQ_MIN_ENT
- EF4_RX_BUF_ALIGNMENT
- EF4_RX_BUF_LAST_IN_PAGE
- EF4_RX_FLUSH_COUNT
- EF4_RX_MAX_FRAGS
- EF4_RX_PKT_CSUMMED
- EF4_RX_PKT_DISCARD
- EF4_RX_PKT_PREFIX_LEN
- EF4_RX_PKT_TCP
- EF4_RX_PREFERRED_BATCH
- EF4_RX_QUEUE_NAME
- EF4_RX_USR_BUF_SIZE
- EF4_SELFTEST_H
- EF4_SET_DWORD
- EF4_SET_DWORD32
- EF4_SET_DWORD_FIELD
- EF4_SET_OWORD
- EF4_SET_OWORD32
- EF4_SET_OWORD64
- EF4_SET_OWORD_FIELD
- EF4_SET_OWORD_FIELD32
- EF4_SET_OWORD_FIELD64
- EF4_SET_QWORD
- EF4_SET_QWORD32
- EF4_SET_QWORD64
- EF4_SET_QWORD_FIELD
- EF4_SET_QWORD_FIELD32
- EF4_SET_QWORD_FIELD64
- EF4_SKB_HEADERS
- EF4_TSO_MAX_SEGS
- EF4_TXQ_MIN_ENT
- EF4_TXQ_TYPES
- EF4_TXQ_TYPE_HIGHPRI
- EF4_TXQ_TYPE_OFFLOAD
- EF4_TX_BUF_CONT
- EF4_TX_BUF_MAP_SINGLE
- EF4_TX_BUF_OPTION
- EF4_TX_BUF_SKB
- EF4_TX_CB_ORDER
- EF4_TX_CB_SIZE
- EF4_TX_H
- EF4_TX_QUEUE_NAME
- EF4_USE_QWORD_IO
- EF4_VAL
- EF4_VI_PAGE_SIZE
- EF4_WARN_ON_PARANOID
- EF4_WIDTH
- EF4_WORD_0_LBN
- EF4_WORD_0_WIDTH
- EF4_WORD_1_LBN
- EF4_WORD_1_WIDTH
- EF4_WORKAROUNDS_H
- EF4_WORKAROUND_10G
- EF4_WORKAROUND_15592
- EF4_WORKAROUND_5129
- EF4_WORKAROUND_5391
- EF4_WORKAROUND_5583
- EF4_WORKAROUND_5676
- EF4_WORKAROUND_6555
- EF4_WORKAROUND_7244
- EF4_WORKAROUND_7803
- EF4_WORKAROUND_7884
- EF4_WORKAROUND_8071
- EF4_WORKAROUND_FALCON_A
- EF4_WORKAROUND_FALCON_AB
- EF4_ZERO_DWORD
- EF4_ZERO_OWORD
- EF4_ZERO_QWORD
- EFAPU
- EFASTPS
- EFAULT
- EFAULT_GETSOCKOPT
- EFAULT_SETSOCKOPT
- EFA_ABI_USER_H
- EFA_ADMIN_ACQ_COMMON_DESC_COMMAND_ID_MASK
- EFA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK
- EFA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK
- EFA_ADMIN_AENQ_CONFIG
- EFA_ADMIN_AENQ_GROUPS_NUM
- EFA_ADMIN_ALLOC_PD
- EFA_ADMIN_ALLOC_UAR
- EFA_ADMIN_API_VERSION_MAJOR
- EFA_ADMIN_API_VERSION_MINOR
- EFA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK
- EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK
- EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_SHIFT
- EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK
- EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_SHIFT
- EFA_ADMIN_AQ_COMMON_DESC_PHASE_MASK
- EFA_ADMIN_BAD_OPCODE
- EFA_ADMIN_CREATE_AH
- EFA_ADMIN_CREATE_CQ
- EFA_ADMIN_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK
- EFA_ADMIN_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_MASK
- EFA_ADMIN_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_SHIFT
- EFA_ADMIN_CREATE_CQ_CMD_VIRT_MASK
- EFA_ADMIN_CREATE_CQ_CMD_VIRT_SHIFT
- EFA_ADMIN_CREATE_QP
- EFA_ADMIN_CREATE_QP_CMD_RQ_VIRT_MASK
- EFA_ADMIN_CREATE_QP_CMD_RQ_VIRT_SHIFT
- EFA_ADMIN_CREATE_QP_CMD_SQ_VIRT_MASK
- EFA_ADMIN_CUR_QP_STATE_BIT
- EFA_ADMIN_DEALLOC_PD
- EFA_ADMIN_DEALLOC_UAR
- EFA_ADMIN_DEREG_MR
- EFA_ADMIN_DESTROY_AH
- EFA_ADMIN_DESTROY_CQ
- EFA_ADMIN_DESTROY_QP
- EFA_ADMIN_DEVICE_ATTR
- EFA_ADMIN_FATAL_ERROR
- EFA_ADMIN_FEATURES_OPCODE_NUM
- EFA_ADMIN_GET_FEATURE
- EFA_ADMIN_GET_SET_FEATURE_COMMON_DESC_SELECT_MASK
- EFA_ADMIN_GET_STATS
- EFA_ADMIN_GET_STATS_SCOPE_ALL
- EFA_ADMIN_GET_STATS_SCOPE_QUEUE
- EFA_ADMIN_GET_STATS_TYPE_BASIC
- EFA_ADMIN_HW_HINTS
- EFA_ADMIN_ILLEGAL_PARAMETER
- EFA_ADMIN_KEEP_ALIVE
- EFA_ADMIN_MALFORMED_REQUEST
- EFA_ADMIN_MAX_OPCODE
- EFA_ADMIN_MODIFY_QP
- EFA_ADMIN_NETWORK_ATTR
- EFA_ADMIN_NOTIFICATION
- EFA_ADMIN_QKEY_BIT
- EFA_ADMIN_QP_STATE_BIT
- EFA_ADMIN_QP_STATE_ERR
- EFA_ADMIN_QP_STATE_INIT
- EFA_ADMIN_QP_STATE_RESET
- EFA_ADMIN_QP_STATE_RTR
- EFA_ADMIN_QP_STATE_RTS
- EFA_ADMIN_QP_STATE_SQD
- EFA_ADMIN_QP_STATE_SQE
- EFA_ADMIN_QP_TYPE_SRD
- EFA_ADMIN_QP_TYPE_UD
- EFA_ADMIN_QUERY_QP
- EFA_ADMIN_QUEUE_ATTR
- EFA_ADMIN_QUEUE_DEPTH
- EFA_ADMIN_REG_MR
- EFA_ADMIN_REG_MR_CMD_LOCAL_WRITE_ENABLE_MASK
- EFA_ADMIN_REG_MR_CMD_MEM_ADDR_PHY_MODE_EN_MASK
- EFA_ADMIN_REG_MR_CMD_MEM_ADDR_PHY_MODE_EN_SHIFT
- EFA_ADMIN_REG_MR_CMD_PHYS_PAGE_SIZE_SHIFT_MASK
- EFA_ADMIN_RESOURCE_ALLOCATION_FAILURE
- EFA_ADMIN_RESOURCE_BUSY
- EFA_ADMIN_RESUME
- EFA_ADMIN_SET_FEATURE
- EFA_ADMIN_SQ_DRAINED_ASYNC_NOTIFY_BIT
- EFA_ADMIN_SQ_PSN_BIT
- EFA_ADMIN_SUCCESS
- EFA_ADMIN_SUSPEND
- EFA_ADMIN_UNKNOWN_ERROR
- EFA_ADMIN_UNSUPPORTED_OPCODE
- EFA_ADMIN_UPDATE_HINTS
- EFA_ADMIN_WARNING
- EFA_AENQ_ENABLED_GROUPS
- EFA_AQ_STATE_POLLING_BIT
- EFA_AQ_STATE_RUNNING_BIT
- EFA_ASYNC_QUEUE_DEPTH
- EFA_BASE_BAR_MASK
- EFA_CHUNK_PAYLOAD_PTR_SIZE
- EFA_CHUNK_PAYLOAD_SHIFT
- EFA_CHUNK_PAYLOAD_SIZE
- EFA_CHUNK_PTR_SIZE
- EFA_CHUNK_SHIFT
- EFA_CHUNK_SIZE
- EFA_CHUNK_USED_SIZE
- EFA_CMD_COMPLETED
- EFA_CMD_STR_CASE
- EFA_CMD_SUBMITTED
- EFA_COMMON_SPEC_VERSION_MAJOR
- EFA_COMMON_SPEC_VERSION_MINOR
- EFA_CTRL_MAJOR
- EFA_CTRL_MINOR
- EFA_CTRL_SUB_MINOR
- EFA_DEFINE_STATS
- EFA_DMA_ADDR_TO_UINT32_HIGH
- EFA_DMA_ADDR_TO_UINT32_LOW
- EFA_GID_SIZE
- EFA_IRQNAME_SIZE
- EFA_MAX_HANDLERS
- EFA_MEM_BAR
- EFA_MGMNT_MSIX_VEC_IDX
- EFA_MMAP_DMA_PAGE
- EFA_MMAP_FLAG_SHIFT
- EFA_MMAP_INVALID
- EFA_MMAP_IO_NC
- EFA_MMAP_IO_WC
- EFA_MMAP_PAGE_MASK
- EFA_MMIO_READ_INVALID
- EFA_MODIFY_QP_SUPP_MASK
- EFA_NUM_MSIX_VEC
- EFA_PARISC_1_0
- EFA_PARISC_1_1
- EFA_PARISC_2_0
- EFA_POLL_INTERVAL_MS
- EFA_PTRS_PER_CHUNK
- EFA_QP_DRIVER_TYPE_SRD
- EFA_QUERY_QP_SUPP_MASK
- EFA_REGS_ACQ_BASE_HI_OFF
- EFA_REGS_ACQ_BASE_LO_OFF
- EFA_REGS_ACQ_CAPS_ACQ_DEPTH_MASK
- EFA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_MASK
- EFA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_SHIFT
- EFA_REGS_ACQ_CAPS_ACQ_MSIX_VECTOR_MASK
- EFA_REGS_ACQ_CAPS_ACQ_MSIX_VECTOR_SHIFT
- EFA_REGS_ACQ_CAPS_OFF
- EFA_REGS_ADMIN_INTR_MASK
- EFA_REGS_AENQ_BASE_HI_OFF
- EFA_REGS_AENQ_BASE_LO_OFF
- EFA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK
- EFA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_MASK
- EFA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_SHIFT
- EFA_REGS_AENQ_CAPS_AENQ_MSIX_VECTOR_MASK
- EFA_REGS_AENQ_CAPS_AENQ_MSIX_VECTOR_SHIFT
- EFA_REGS_AENQ_CAPS_OFF
- EFA_REGS_AENQ_CONS_DB_OFF
- EFA_REGS_AQ_BASE_HI_OFF
- EFA_REGS_AQ_BASE_LO_OFF
- EFA_REGS_AQ_CAPS_AQ_DEPTH_MASK
- EFA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_MASK
- EFA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_SHIFT
- EFA_REGS_AQ_CAPS_OFF
- EFA_REGS_AQ_PROD_DB_OFF
- EFA_REGS_CAPS_ADMIN_CMD_TO_MASK
- EFA_REGS_CAPS_ADMIN_CMD_TO_SHIFT
- EFA_REGS_CAPS_CONTIGUOUS_QUEUE_REQUIRED_MASK
- EFA_REGS_CAPS_DMA_ADDR_WIDTH_MASK
- EFA_REGS_CAPS_DMA_ADDR_WIDTH_SHIFT
- EFA_REGS_CAPS_OFF
- EFA_REGS_CAPS_RESET_TIMEOUT_MASK
- EFA_REGS_CAPS_RESET_TIMEOUT_SHIFT
- EFA_REGS_CONTROLLER_VERSION_IMPL_ID_MASK
- EFA_REGS_CONTROLLER_VERSION_IMPL_ID_SHIFT
- EFA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK
- EFA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_SHIFT
- EFA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK
- EFA_REGS_CONTROLLER_VERSION_MINOR_VERSION_SHIFT
- EFA_REGS_CONTROLLER_VERSION_OFF
- EFA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK
- EFA_REGS_DEV_CTL_AQ_RESTART_MASK
- EFA_REGS_DEV_CTL_AQ_RESTART_SHIFT
- EFA_REGS_DEV_CTL_DEV_RESET_MASK
- EFA_REGS_DEV_CTL_OFF
- EFA_REGS_DEV_CTL_RESET_REASON_MASK
- EFA_REGS_DEV_CTL_RESET_REASON_SHIFT
- EFA_REGS_DEV_STS_AQ_RESTART_FINISHED_MASK
- EFA_REGS_DEV_STS_AQ_RESTART_FINISHED_SHIFT
- EFA_REGS_DEV_STS_AQ_RESTART_IN_PROGRESS_MASK
- EFA_REGS_DEV_STS_AQ_RESTART_IN_PROGRESS_SHIFT
- EFA_REGS_DEV_STS_FATAL_ERROR_MASK
- EFA_REGS_DEV_STS_FATAL_ERROR_SHIFT
- EFA_REGS_DEV_STS_OFF
- EFA_REGS_DEV_STS_READY_MASK
- EFA_REGS_DEV_STS_RESET_FINISHED_MASK
- EFA_REGS_DEV_STS_RESET_FINISHED_SHIFT
- EFA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK
- EFA_REGS_DEV_STS_RESET_IN_PROGRESS_SHIFT
- EFA_REGS_INTR_MASK_OFF
- EFA_REGS_MMIO_REG_READ_OFF
- EFA_REGS_MMIO_REG_READ_REG_OFF_MASK
- EFA_REGS_MMIO_REG_READ_REG_OFF_SHIFT
- EFA_REGS_MMIO_REG_READ_REQ_ID_MASK
- EFA_REGS_MMIO_RESP_HI_OFF
- EFA_REGS_MMIO_RESP_LO_OFF
- EFA_REGS_RESET_ADMIN_TO
- EFA_REGS_RESET_DRIVER_INVALID_STATE
- EFA_REGS_RESET_GENERIC
- EFA_REGS_RESET_INIT_ERR
- EFA_REGS_RESET_KEEP_ALIVE_TO
- EFA_REGS_RESET_NORMAL
- EFA_REGS_RESET_OS_TRIGGER
- EFA_REGS_RESET_SHUTDOWN
- EFA_REGS_RESET_USER_TRIGGER
- EFA_REGS_VERSION_MAJOR_VERSION_MASK
- EFA_REGS_VERSION_MAJOR_VERSION_SHIFT
- EFA_REGS_VERSION_MINOR_VERSION_MASK
- EFA_REGS_VERSION_OFF
- EFA_REG_BAR
- EFA_REG_READ_TIMEOUT_US
- EFA_STATS_ENUM
- EFA_STATS_STR
- EFA_SUPPORTED_ACCESS_FLAGS
- EFA_USER_CMDS_SUPP_UDATA_CREATE_AH
- EFA_USER_CMDS_SUPP_UDATA_QUERY_DEVICE
- EFA_UVERBS_ABI_VERSION
- EFBIG
- EFB_MASK
- EFCH_PM_ACPI_MMIO_ADDR
- EFCH_PM_ACPI_MMIO_WDT_OFFSET
- EFCH_PM_DECODEEN
- EFCH_PM_DECODEEN3
- EFCH_PM_DECODEEN_SECOND_RES
- EFCH_PM_DECODEEN_WDT_TMREN
- EFCH_PM_ISACONTROL
- EFCH_PM_ISACONTROL_MMIOEN
- EFCH_PM_WATCHDOG_DISABLE
- EFCH_PM_WDT_ADDR
- EFC_ACrYCb16161616_10LSB
- EFC_ACrYCb16161616_10MSB
- EFC_ACrYCb16161616_12LSB
- EFC_ACrYCb16161616_12MSB
- EFC_ACrYCb2101010
- EFC_ACrYCb8888
- EFC_ARGB1555
- EFC_ARGB16161616_10LSB
- EFC_ARGB16161616_10MSB
- EFC_ARGB16161616_12LSB
- EFC_ARGB16161616_12MSB
- EFC_ARGB16161616_FLOAT
- EFC_ARGB16161616_SNORM
- EFC_ARGB16161616_UNORM
- EFC_ARGB2101010
- EFC_ARGB4444
- EFC_ARGB8888
- EFC_AYCrCb16161616_10LSB
- EFC_AYCrCb16161616_10MSB
- EFC_AYCrCb16161616_12LSB
- EFC_AYCrCb16161616_12MSB
- EFC_AYCrCb8888
- EFC_BGR101111_FIX
- EFC_BGR101111_FLOAT
- EFC_BGR565
- EFC_CAT_HWCTL
- EFC_CAT_HWINFO
- EFC_CAT_TRANSPORT
- EFC_CMD_HWCTL_GET_CLOCK
- EFC_CMD_HWCTL_IDENTIFY
- EFC_CMD_HWCTL_SET_CLOCK
- EFC_CMD_HWINFO_GET_CAPS
- EFC_CMD_HWINFO_GET_POLLED
- EFC_CMD_HWINFO_SET_RESP_ADDR
- EFC_CMD_TRANSPORT_SET_TX_MODE
- EFC_CbYCrY10101010_422_PACKED
- EFC_CbYCrY12121212_422_PACKED
- EFC_CbYCrY8888_422_PACKED
- EFC_CrYCbA1010102
- EFC_CrYCbA16161616_10LSB
- EFC_CrYCbA16161616_10MSB
- EFC_CrYCbA16161616_12LSB
- EFC_CrYCbA16161616_12MSB
- EFC_CrYCbA8888
- EFC_CrYCbY10101010_422_PACKED
- EFC_CrYCbY12121212_422_PACKED
- EFC_CrYCbY8888_422_PACKED
- EFC_MONO_10LSB
- EFC_MONO_10MSB
- EFC_MONO_12LSB
- EFC_MONO_12MSB
- EFC_MONO_16
- EFC_MONO_8
- EFC_RGB111110_FIX
- EFC_RGB111110_FLOAT
- EFC_RGB565
- EFC_RGBA1010102
- EFC_RGBA16161616_10LSB
- EFC_RGBA16161616_10MSB
- EFC_RGBA16161616_12LSB
- EFC_RGBA16161616_12MSB
- EFC_RGBA16161616_FLOAT
- EFC_RGBA16161616_SNORM
- EFC_RGBA16161616_UNORM
- EFC_RGBA4444
- EFC_RGBA5551
- EFC_RGBA8888
- EFC_SURFACE_PIXEL_FORMAT
- EFC_TIMEOUT_MS
- EFC_Y10_CbCr1010_420_PLANAR
- EFC_Y10_CrCb1010_420_PLANAR
- EFC_Y12_CbCr1212_420_PLANAR
- EFC_Y12_CrCb1212_420_PLANAR
- EFC_Y8_CbCr88_420_PLANAR
- EFC_Y8_CrCb88_420_PLANAR
- EFC_YCbYCr10101010_422_PACKED
- EFC_YCbYCr12121212_422_PACKED
- EFC_YCbYCr8888_422_PACKED
- EFC_YCrCbA16161616_10LSB
- EFC_YCrCbA16161616_10MSB
- EFC_YCrCbA16161616_12LSB
- EFC_YCrCbA16161616_12MSB
- EFC_YCrCbA8888
- EFC_YCrYCb10101010_422_PACKED
- EFC_YCrYCb12121212_422_PACKED
- EFC_YCrYCb8888_422_PACKED
- EFDABS
- EFDADD
- EFDCFS
- EFDCMPEQ
- EFDCMPGT
- EFDCMPLT
- EFDCTSF
- EFDCTSI
- EFDCTSIDZ
- EFDCTSIZ
- EFDCTUF
- EFDCTUI
- EFDCTUIDZ
- EFDCTUIZ
- EFDDIV
- EFDMUL
- EFDNABS
- EFDNEG
- EFDSUB
- EFD_CLOEXEC
- EFD_FLAGS_SET
- EFD_ITEM
- EFD_NONBLOCK
- EFD_SEMAPHORE
- EFD_SHARED_FCNTL_FLAGS
- EFER_EFM_DISABLE
- EFER_EFM_ENABLE
- EFER_FFXSR
- EFER_LMA
- EFER_LME
- EFER_LMSLE
- EFER_NX
- EFER_SCE
- EFER_SVME
- EFE_DD_EVQ_IND_RPTR_FLAGS_HIGH
- EFE_DD_EVQ_IND_RPTR_FLAGS_LOW
- EFE_DD_EVQ_IND_TIMER_FLAGS
- EFFECTIVE
- EFFECTIVE_BUF_SIZE
- EFFECTIVE_L1_QUEUE_SIZE
- EFFECTIVE_L1_QUEUE_SIZE_MASK
- EFFECTIVE_L1_QUEUE_SIZE_SHIFT
- EFFECTIVE_L1_TLB_SIZE
- EFFECTIVE_L1_TLB_SIZE_MASK
- EFFECTIVE_L1_TLB_SIZE_SHIFT
- EFFECTIVE_L2_QUEUE_SIZE
- EFFECTIVE_LIST
- EFFECTS_COUNT
- EFFECT_DIR_180_DEG
- EFFECT_DRY_LEFT
- EFFECT_DRY_RIGHT
- EFFECT_EFF1
- EFFECT_EFF2
- EFFECT_EFF3
- EFFECT_END_NID
- EFFECT_LEVEL_SLIDERS
- EFFECT_START_NID
- EFFECT_VALS_MAX_COUNT
- EFFICEON_ATTPAGE
- EFFICEON_L1_SIZE
- EFFICEON_PATI
- EFFICEON_PRESENT
- EFI32_LOADER_SIGNATURE
- EFI64_LOADER_SIGNATURE
- EFIFB_DMI_SYSTEM_ID
- EFIKA_PLATFORM_NAME
- EFILL
- EFIVARFS_MAGIC
- EFIVARS_DATA_SIZE_MAX
- EFIVARS_DATE
- EFIVARS_VERSION
- EFIVAR_ATTR
- EFIVAR_FS_INTERNAL_H
- EFIVAR_SSDT_NAME_MAX
- EFI_1_02_SYSTEM_TABLE_REVISION
- EFI_1_10_SYSTEM_TABLE_REVISION
- EFI_2_00_SYSTEM_TABLE_REVISION
- EFI_2_10_SYSTEM_TABLE_REVISION
- EFI_2_20_SYSTEM_TABLE_REVISION
- EFI_2_30_SYSTEM_TABLE_REVISION
- EFI_64BIT
- EFI_ABORTED
- EFI_ACPI_MEMORY_NVS
- EFI_ACPI_RECLAIM_MEMORY
- EFI_ALLOCATE_ADDRESS
- EFI_ALLOCATE_ANY_PAGES
- EFI_ALLOCATE_MAX_ADDRESS
- EFI_ALLOC_ALIGN
- EFI_ARCH_1
- EFI_ATTR_SHOW
- EFI_BAD_BUFFER_SIZE
- EFI_BL_LEVEL_GUID
- EFI_BL_LEVEL_NAME
- EFI_BOOT
- EFI_BOOT_SERVICES_CODE
- EFI_BOOT_SERVICES_DATA
- EFI_BUFFER_TOO_SMALL
- EFI_CAPSULE_INITIATE_RESET
- EFI_CAPSULE_PERSIST_ACROSS_RESET
- EFI_CAPSULE_POPULATE_SYSTEM_TABLE
- EFI_CAPSULE_SUPPORTED_FLAG_MASK
- EFI_CERT_SHA256_GUID
- EFI_CERT_X509_GUID
- EFI_CERT_X509_SHA256_GUID
- EFI_COMPRESSED
- EFI_CONFIG_TABLES
- EFI_CONSOLE_OUT_DEVICE_GUID
- EFI_CONVENTIONAL_MEMORY
- EFI_DATA_SIZE
- EFI_DBG
- EFI_DEBUG
- EFI_DEVICE_ERROR
- EFI_DEV_ACPI
- EFI_DEV_BASIC_ACPI
- EFI_DEV_BIOS_BOOT
- EFI_DEV_CONTROLLER
- EFI_DEV_END_ENTIRE
- EFI_DEV_END_INSTANCE
- EFI_DEV_END_PATH
- EFI_DEV_END_PATH2
- EFI_DEV_EXPANDED_ACPI
- EFI_DEV_HW
- EFI_DEV_MEDIA
- EFI_DEV_MEDIA_CDROM
- EFI_DEV_MEDIA_FILE
- EFI_DEV_MEDIA_HARD_DRIVE
- EFI_DEV_MEDIA_PROTOCOL
- EFI_DEV_MEDIA_VENDOR
- EFI_DEV_MEM_MAPPED
- EFI_DEV_MSG
- EFI_DEV_MSG_1394
- EFI_DEV_MSG_ATAPI
- EFI_DEV_MSG_FC
- EFI_DEV_MSG_I20
- EFI_DEV_MSG_INFINIBAND
- EFI_DEV_MSG_IPV4
- EFI_DEV_MSG_IPV6
- EFI_DEV_MSG_MAC
- EFI_DEV_MSG_SCSI
- EFI_DEV_MSG_UART
- EFI_DEV_MSG_USB
- EFI_DEV_MSG_USB_CLASS
- EFI_DEV_MSG_VENDOR
- EFI_DEV_PCCARD
- EFI_DEV_PCI
- EFI_DEV_VENDOR
- EFI_DT_ADDR_CELLS_DEFAULT
- EFI_DT_SIZE_CELLS_DEFAULT
- EFI_DUMMY_GUID
- EFI_END_NR
- EFI_ERROR
- EFI_FDT_ALIGN
- EFI_FDT_PARAMS_SIZE
- EFI_FIELD
- EFI_FILE_INFO_ID
- EFI_FILE_MODE_CREATE
- EFI_FILE_MODE_READ
- EFI_FILE_MODE_WRITE
- EFI_FILE_SYSTEM_GUID
- EFI_GET_NEXT_HIGH_MONO_COUNT
- EFI_GET_NEXT_VARIABLE
- EFI_GET_TIME
- EFI_GET_VARIABLE
- EFI_GET_WAKEUP_TIME
- EFI_GLOBAL_VARIABLE_GUID
- EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID
- EFI_GUID
- EFI_IMAGE_APP
- EFI_IMAGE_BSD
- EFI_IMAGE_RTD
- EFI_IMAGE_SECURITY_DATABASE_GUID
- EFI_INVALID_PARAMETER
- EFI_INVALID_TABLE_ADDR
- EFI_ISDST
- EFI_ITEM
- EFI_KIMG_ALIGN
- EFI_LOADER_CODE
- EFI_LOADER_DATA
- EFI_LOADER_SIGNATURE
- EFI_LOAD_ERROR
- EFI_LOCATE_ALL_HANDLES
- EFI_LOCATE_BY_PROTOCOL
- EFI_LOCATE_BY_REGISTER_NOTIFY
- EFI_MACHINE_EBC
- EFI_MACHINE_IA32
- EFI_MACHINE_IA64
- EFI_MACHINE_X64
- EFI_MAX_ALLOCATE_TYPE
- EFI_MAX_FAKEMEM
- EFI_MAX_MEMORY_TYPE
- EFI_MEMMAP
- EFI_MEMORY_ATTRIBUTES_TABLE_GUID
- EFI_MEMORY_DESCRIPTOR_VERSION
- EFI_MEMORY_MAPPED_IO
- EFI_MEMORY_MAPPED_IO_PORT_SPACE
- EFI_MEMORY_MORE_RELIABLE
- EFI_MEMORY_NV
- EFI_MEMORY_RO
- EFI_MEMORY_RP
- EFI_MEMORY_RUNTIME
- EFI_MEMORY_UC
- EFI_MEMORY_UCE
- EFI_MEMORY_WB
- EFI_MEMORY_WC
- EFI_MEMORY_WP
- EFI_MEMORY_WT
- EFI_MEMORY_XP
- EFI_MEMRESERVE_COUNT
- EFI_MEMRESERVE_SIZE
- EFI_MEM_ATTR
- EFI_MIN_RESERVE
- EFI_MMAP_NR_SLACK_SLOTS
- EFI_NONE
- EFI_NOT_FOUND
- EFI_NOT_READY
- EFI_NX_PE_DATA
- EFI_OLD_MEMMAP
- EFI_OUT_OF_RESOURCES
- EFI_PAGES_MAX
- EFI_PAGE_SHIFT
- EFI_PAGE_SIZE
- EFI_PAL_CODE
- EFI_PARAVIRT
- EFI_PCI_IO_ATTRIBUTE_BUS_MASTER
- EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
- EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE
- EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM
- EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO
- EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO
- EFI_PCI_IO_ATTRIBUTE_IO
- EFI_PCI_IO_ATTRIBUTE_ISA_IO
- EFI_PCI_IO_ATTRIBUTE_ISA_IO_16
- EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO
- EFI_PCI_IO_ATTRIBUTE_MEMORY
- EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED
- EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE
- EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE
- EFI_PCI_IO_ATTRIBUTE_VGA_IO
- EFI_PCI_IO_ATTRIBUTE_VGA_IO_16
- EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY
- EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO
- EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16
- EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
- EFI_PCI_IO_PROTOCOL_GUID
- EFI_PCI_IO_PROTOCOL_WIDTH
- EFI_PERSISTENT_MEMORY
- EFI_PMBR_OSTYPE_EFI
- EFI_PMBR_OSTYPE_EFI_GPT
- EFI_PROPERTIES_RUNTIME_MEMORY_PROTECTION_NON_EXECUTABLE_PE_DATA
- EFI_PROPERTIES_TABLE_GUID
- EFI_PROPERTIES_TABLE_VERSION
- EFI_QUERY_CAPSULE_CAPS
- EFI_QUERY_VARIABLE_INFO
- EFI_RANDOM_SEED_SIZE
- EFI_READ_CHUNK_SIZE
- EFI_RESERVED_TYPE
- EFI_RESET_COLD
- EFI_RESET_SHUTDOWN
- EFI_RESET_SYSTEM
- EFI_RESET_WARM
- EFI_RNG_ALGORITHM_RAW
- EFI_RNG_PROTOCOL_GUID
- EFI_ROM_SIG
- EFI_RTC_EPOCH
- EFI_RTC_MINOR
- EFI_RTC_VERSION
- EFI_RT_VIRTUAL_BASE
- EFI_RT_VIRTUAL_LIMIT
- EFI_RT_VIRTUAL_SIZE
- EFI_RUNTIME_FIELD
- EFI_RUNTIME_GET_NEXTHIGHMONOTONICCOUNT
- EFI_RUNTIME_GET_NEXTVARIABLENAME
- EFI_RUNTIME_GET_TIME
- EFI_RUNTIME_GET_VARIABLE
- EFI_RUNTIME_GET_WAKETIME
- EFI_RUNTIME_QUERY_CAPSULECAPABILITIES
- EFI_RUNTIME_QUERY_VARIABLEINFO
- EFI_RUNTIME_RESET_SYSTEM
- EFI_RUNTIME_SERVICES
- EFI_RUNTIME_SERVICES_CODE
- EFI_RUNTIME_SERVICES_DATA
- EFI_RUNTIME_SERVICES_REVISION
- EFI_RUNTIME_SERVICES_SIGNATURE
- EFI_RUNTIME_SET_TIME
- EFI_RUNTIME_SET_VARIABLE
- EFI_RUNTIME_SET_WAKETIME
- EFI_RUNTIME_U64_ATTR_SHOW
- EFI_SECURITY_VIOLATION
- EFI_SET_TIME
- EFI_SET_VARIABLE
- EFI_SET_WAKEUP_TIME
- EFI_SHIM_LOCK_GUID
- EFI_SUCCESS
- EFI_SYSTAB
- EFI_SYSTEM_RESOURCE_TABLE_GUID
- EFI_SYSTEM_TABLE_SIGNATURE
- EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2
- EFI_TCG2_EVENT_LOG_FORMAT_TCG_2
- EFI_TCG2_PROTOCOL_GUID
- EFI_TIME_ADJUST_DAYLIGHT
- EFI_TIME_IN_DAYLIGHT
- EFI_UGA_PROTOCOL_GUID
- EFI_UNCOMPRESSED
- EFI_UNSPECIFIED_TIMEZONE
- EFI_UNSUPPORTED
- EFI_UNUSABLE_MEMORY
- EFI_UPDATE_CAPSULE
- EFI_VARIABLE_APPEND_WRITE
- EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS
- EFI_VARIABLE_BOOTSERVICE_ACCESS
- EFI_VARIABLE_GUID_LEN
- EFI_VARIABLE_HARDWARE_ERROR_RECORD
- EFI_VARIABLE_MASK
- EFI_VARIABLE_NON_VOLATILE
- EFI_VARIABLE_RUNTIME_ACCESS
- EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS
- EFI_VAR_NAME_LEN
- EFI_VA_END
- EFI_VA_START
- EFI_WRITE_PROTECTED
- EFL
- EFLAGS
- EFLAGS_MASK
- EFLAG_BAD_HEADER
- EFLAG_BAD_PAYLOAD
- EFLAG_BUSY
- EFLAG_CONTINUATION
- EFLAG_DIVZERO
- EFLAG_INEXACT
- EFLAG_INVALID
- EFLAG_OVERFLOW
- EFLAG_UNDERFLOW
- EFLAG_VXCVI
- EFLAG_VXIDI
- EFLAG_VXIMZ
- EFLAG_VXISI
- EFLAG_VXSNAN
- EFLAG_VXSOFT
- EFLAG_VXSQRT
- EFLAG_VXVC
- EFLAG_VXZDZ
- EFLG
- EFLG_EWARN
- EFLG_RESERVED_ZEROS_MASK
- EFLG_RX0OVR
- EFLG_RX1OVR
- EFLG_RXEP
- EFLG_RXWAR
- EFLG_TXBO
- EFLG_TXEP
- EFLG_TXWAR
- EFLOCON
- EFL_CORE_BIST_REGX
- EFL_CORE_INTX
- EFL_CORE_INT_ENA_W1SX
- EFL_CORE_SE_ERR_INTX
- EFL_CORE_VF_ERR_INT0X
- EFL_CORE_VF_ERR_INT0_ENA_W1SX
- EFL_CORE_VF_ERR_INT1X
- EFL_CORE_VF_ERR_INT1_ENA_W1SX
- EFL_RNM_CTL_STATUS
- EFL_TOP_BIST_STAT
- EFR
- EFR_AUTO_CTS
- EFR_AUTO_RTS
- EFR_ENABLE_16654
- EFR_RX_FC_MASK
- EFR_RX_FC_NONE
- EFR_RX_FC_X1
- EFR_RX_FC_X1_2
- EFR_RX_FC_X2
- EFR_SPEC_DETECT
- EFR_STATUS_1394_TIMEOUT
- EFR_STATUS_BAD
- EFR_STATUS_BAD_CHANNEL
- EFR_STATUS_BAD_CLOCK
- EFR_STATUS_BAD_COMMAND
- EFR_STATUS_BAD_LED
- EFR_STATUS_BAD_MIRROR
- EFR_STATUS_BAD_PAN
- EFR_STATUS_BAD_PARAMETER
- EFR_STATUS_BAD_QUAD_COUNT
- EFR_STATUS_BAD_RATE
- EFR_STATUS_COMM_ERR
- EFR_STATUS_DSP_TIMEOUT
- EFR_STATUS_FLASH_BUSY
- EFR_STATUS_INCOMPLETE
- EFR_STATUS_OK
- EFR_STATUS_UNSUPPORTED
- EFR_SWFC_MASK
- EFR_SWFC_NONE
- EFR_SWFC_RX1
- EFR_SWFC_RX12
- EFR_SWFC_RX2
- EFR_SWFC_TX1
- EFR_SWFC_TX12
- EFR_SWFC_TX12_RX1
- EFR_SWFC_TX12_RX12
- EFR_SWFC_TX12_RX2
- EFR_SWFC_TX1_RX1
- EFR_SWFC_TX1_RX12
- EFR_SWFC_TX1_RX2
- EFR_SWFC_TX2
- EFR_SWFC_TX2_RX1
- EFR_SWFC_TX2_RX12
- EFR_SWFC_TX2_RX2
- EFR_TX_FC_MASK
- EFR_TX_FC_NONE
- EFR_TX_FC_X1
- EFR_TX_FC_X1_2
- EFR_TX_FC_X2
- EFSABS
- EFSADD
- EFSBADCRC
- EFSCFD
- EFSCFSI
- EFSCMPEQ
- EFSCMPGT
- EFSCMPLT
- EFSCORRUPTED
- EFSCTSF
- EFSCTSI
- EFSCTSIZ
- EFSCTUF
- EFSCTUI
- EFSCTUIZ
- EFSDIV
- EFSERROR
- EFSMUL
- EFSNABS
- EFSNEG
- EFSSUB
- EFS_ATTR
- EFS_BLOCKSIZE
- EFS_BLOCKSIZE_BITS
- EFS_DENTSIZE
- EFS_DIRBLK_HEADERSIZE
- EFS_DIRBLK_MAGIC
- EFS_DIRBSIZE
- EFS_DIRBSIZE_BITS
- EFS_DIRECTEXTENTS
- EFS_HCI_SEL
- EFS_MAGIC
- EFS_MAXENTS
- EFS_MAXNAMELEN
- EFS_NEWMAGIC
- EFS_REALOFF
- EFS_ROOTINODE
- EFS_SLOTAT
- EFS_SUPER
- EFS_SUPER_MAGIC
- EFS_VERSION
- EFT_BYTES_PER_BUFFER
- EFT_NUM_BUFFERS
- EFT_SIZE
- EFUSE
- EFUSEAR
- EFUSEAR_DATA_MASK
- EFUSEAR_FLAG
- EFUSEAR_READ_CMD
- EFUSEAR_REG_MASK
- EFUSEAR_REG_SHIFT
- EFUSEAR_WRITE_CMD
- EFUSE_ACCESS
- EFUSE_ACCESS_DISABLE
- EFUSE_ACCESS_ENABLE
- EFUSE_ACCESS_OFF
- EFUSE_ACCESS_OFF_8723
- EFUSE_ACCESS_ON
- EFUSE_ACCESS_ON_8723
- EFUSE_ACCESS_STRUCT
- EFUSE_ADD
- EFUSE_ANA8M
- EFUSE_BASE_ADDRESS
- EFUSE_BT
- EFUSE_BT0_SELECT
- EFUSE_BT1_SELECT
- EFUSE_BT2_SELECT
- EFUSE_BT_MAP_LEN
- EFUSE_BT_MAP_LEN_8723A
- EFUSE_BT_MAX_MAP_LEN
- EFUSE_BT_MAX_SECTION
- EFUSE_BT_REAL_BANK_CONTENT_LEN
- EFUSE_BT_REAL_CONTENT_LEN
- EFUSE_BT_SEL_0
- EFUSE_BT_SEL_1
- EFUSE_BT_SEL_2
- EFUSE_CCCR
- EFUSE_CELL_SEL
- EFUSE_CHAN_PLAN
- EFUSE_CHIP_ID
- EFUSE_CLK
- EFUSE_CLK_CTRL
- EFUSE_CLK_EN
- EFUSE_CLK_SEL
- EFUSE_CLK_SETTING
- EFUSE_CONTENT
- EFUSE_CTL
- EFUSE_CTRL
- EFUSE_CTRL_3290
- EFUSE_CTRL_8723B
- EFUSE_CTRL_ADDRESS_IN
- EFUSE_CTRL_KICK
- EFUSE_CTRL_MODE
- EFUSE_CTRL_PRESENT
- EFUSE_CUT_ENABLE_GPIO_PINID
- EFUSE_DATA
- EFUSE_DATA0
- EFUSE_DATA0_3290
- EFUSE_DATA1
- EFUSE_DATA1_3290
- EFUSE_DATA2
- EFUSE_DATA2_3290
- EFUSE_DATA3
- EFUSE_DATA3_3290
- EFUSE_DATAH
- EFUSE_DATAL
- EFUSE_DATA_BIT16
- EFUSE_EEPROM_VER
- EFUSE_ERROE_HANDLE
- EFUSE_F0CIS
- EFUSE_F1CIS
- EFUSE_FEN_ELDR
- EFUSE_GET
- EFUSE_GetEfuseDefinition
- EFUSE_HAL
- EFUSE_HWSET_MAX_SIZE
- EFUSE_HW_CAP_IGNORE
- EFUSE_HW_CAP_PTCL_VHT
- EFUSE_HW_CAP_SUPP_BW40
- EFUSE_HW_CAP_SUPP_BW80
- EFUSE_IC_ID_OFFSET
- EFUSE_IC_ID_OFFSET_88E
- EFUSE_INIT_MAP
- EFUSE_INPUT_PARAMETER
- EFUSE_LDOE25_ENABLE
- EFUSE_LDO_SETTING
- EFUSE_LINEAR_FUNC_PARAM
- EFUSE_LOADER_CLK_EN
- EFUSE_LOGISTIC_FUNC_PARAM
- EFUSE_MAC_ADDR
- EFUSE_MAP
- EFUSE_MAP_LEN
- EFUSE_MAP_LEN_8723B
- EFUSE_MAP_LEN_88E
- EFUSE_MAP_MAX_SIZE
- EFUSE_MAP_SIZE
- EFUSE_MAX_BANK
- EFUSE_MAX_BT_BANK
- EFUSE_MAX_HW_SIZE
- EFUSE_MAX_LOGICAL_SIZE
- EFUSE_MAX_MAP_LEN
- EFUSE_MAX_SECTION
- EFUSE_MAX_SECTION_8723A
- EFUSE_MAX_SECTION_8723B
- EFUSE_MAX_SECTION_88E
- EFUSE_MAX_SECTION_BASE
- EFUSE_MAX_SECTION_MAP
- EFUSE_MAX_SIZE
- EFUSE_MAX_WORD_UNIT
- EFUSE_MAX_WORD_UNIT_88E
- EFUSE_MODIFY_MAP
- EFUSE_MT7688
- EFUSE_OCR
- EFUSE_OFFSET
- EFUSE_OOB_PROTECT_BYTES
- EFUSE_OOB_PROTECT_BYTES_88E
- EFUSE_OOB_PROTECT_BYTES_LEN
- EFUSE_OP
- EFUSE_PCB_INFO_OFFSET
- EFUSE_PG
- EFUSE_PROTECT_BYTES_BANK
- EFUSE_PROTECT_BYTES_BANK_88E
- EFUSE_PWC_EV12V
- EFUSE_READ_ALL
- EFUSE_READ_CMD
- EFUSE_READ_DONE
- EFUSE_REAL_CONTENT_LEN
- EFUSE_REAL_CONTENT_LEN_8723A
- EFUSE_REAL_CONTENT_LEN_8723B
- EFUSE_REAL_CONTENT_LEN_88E
- EFUSE_REAL_CONTENT_SIZE
- EFUSE_REPEAT_THRESHOLD_
- EFUSE_Read1Byte
- EFUSE_SDIO_MODE
- EFUSE_SDIO_SETTING
- EFUSE_SEL
- EFUSE_SELECT_MASK
- EFUSE_SEL_MASK
- EFUSE_SET
- EFUSE_ShadowMapUpdate
- EFUSE_ShadowRead
- EFUSE_TEST
- EFUSE_TEST_8723B
- EFUSE_TRPT
- EFUSE_TXPW_TAB
- EFUSE_WIFI
- EFUSE_WIFI_SELECT
- EFUSE_WIFI_SEL_0
- EFUSE_XTAL_SEL_LSB
- EFUSE_XTAL_SEL_MASK
- EFX_AND_OWORD
- EFX_AND_QWORD
- EFX_ARFS_FILTER_ID_ERROR
- EFX_ARFS_FILTER_ID_PENDING
- EFX_ARFS_FILTER_ID_REMOVING
- EFX_ARFS_HASH_TABLE_SIZE
- EFX_ASSERT_RESET_SERIALISED
- EFX_BITFIELD_H
- EFX_BUFTBL_EVQ_BASE
- EFX_BUFTBL_RXQ_BASE
- EFX_BUFTBL_TXQ_BASE
- EFX_BUF_SIZE
- EFX_CHANNEL_MAGIC_FILL
- EFX_CHANNEL_MAGIC_RX_DRAIN
- EFX_CHANNEL_MAGIC_TEST
- EFX_CHANNEL_MAGIC_TX_DRAIN
- EFX_CHANNEL_NAME
- EFX_DEFAULT_DMAQ_SIZE
- EFX_DEFAULT_VI_STRIDE
- EFX_DIR_IN
- EFX_DIR_OUT
- EFX_DMA_TYPE_WIDTH
- EFX_DRIVER_VERSION
- EFX_DUMMY_FIELD_LBN
- EFX_DUMMY_FIELD_WIDTH
- EFX_DWORD_0_LBN
- EFX_DWORD_0_WIDTH
- EFX_DWORD_1_LBN
- EFX_DWORD_1_WIDTH
- EFX_DWORD_2_LBN
- EFX_DWORD_2_WIDTH
- EFX_DWORD_3_LBN
- EFX_DWORD_3_WIDTH
- EFX_DWORD_FIELD
- EFX_DWORD_FMT
- EFX_DWORD_IS_ALL_ONES
- EFX_DWORD_IS_ZERO
- EFX_DWORD_VAL
- EFX_EF10_BCAST
- EFX_EF10_DRVGEN_EV
- EFX_EF10_FILTER_DEV_MC_MAX
- EFX_EF10_FILTER_DEV_UC_MAX
- EFX_EF10_FILTER_FLAGS
- EFX_EF10_FILTER_FLAG_AUTO_OLD
- EFX_EF10_FILTER_ID_INVALID
- EFX_EF10_FILTER_SEARCH_LIMIT
- EFX_EF10_GENEVE4_MCDEF
- EFX_EF10_GENEVE4_UCDEF
- EFX_EF10_GENEVE6_MCDEF
- EFX_EF10_GENEVE6_UCDEF
- EFX_EF10_MAX_SHARED_RSS_CONTEXT_SIZE
- EFX_EF10_MAX_TX_DESCRIPTOR_LEN
- EFX_EF10_MCDEF
- EFX_EF10_NO_VLAN
- EFX_EF10_NUM_DEFAULT_FILTERS
- EFX_EF10_NVGRE4_MCDEF
- EFX_EF10_NVGRE4_UCDEF
- EFX_EF10_NVGRE6_MCDEF
- EFX_EF10_NVGRE6_UCDEF
- EFX_EF10_REFILL
- EFX_EF10_REGS_H
- EFX_EF10_RSS_CONTEXT_INVALID
- EFX_EF10_TEST
- EFX_EF10_UCDEF
- EFX_EF10_VXLAN4_MCDEF
- EFX_EF10_VXLAN4_UCDEF
- EFX_EF10_VXLAN6_MCDEF
- EFX_EF10_VXLAN6_UCDEF
- EFX_EF10_WORKAROUND_35388
- EFX_EF10_WORKAROUND_61265
- EFX_EFX_H
- EFX_EMPTY_COUNT_VALID
- EFX_ENCAP_FLAG_IPV6
- EFX_ENCAP_TYPES_MASK
- EFX_ENCAP_TYPE_GENEVE
- EFX_ENCAP_TYPE_NONE
- EFX_ENCAP_TYPE_NVGRE
- EFX_ENCAP_TYPE_VXLAN
- EFX_ENUM_H
- EFX_ETHTOOL_ATOMIC_NIC_ERROR_STAT
- EFX_ETHTOOL_EEPROM_MAGIC
- EFX_ETHTOOL_STAT
- EFX_ETHTOOL_STAT_SOURCE_channel
- EFX_ETHTOOL_STAT_SOURCE_nic
- EFX_ETHTOOL_STAT_SOURCE_tx_queue
- EFX_ETHTOOL_SW_STAT_COUNT
- EFX_ETHTOOL_UINT_CHANNEL_STAT
- EFX_ETHTOOL_UINT_TXQ_STAT
- EFX_EXTRACT32
- EFX_EXTRACT64
- EFX_EXTRACT_DWORD
- EFX_EXTRACT_NATIVE
- EFX_EXTRACT_OWORD32
- EFX_EXTRACT_OWORD64
- EFX_EXTRACT_QWORD32
- EFX_EXTRACT_QWORD64
- EFX_EXTRA_CHANNEL_IOV
- EFX_EXTRA_CHANNEL_PTP
- EFX_FARCH_FILTER_CTL_SRCH_FUDGE_FULL
- EFX_FARCH_FILTER_CTL_SRCH_FUDGE_WILD
- EFX_FARCH_FILTER_CTL_SRCH_HINT_MAX
- EFX_FARCH_FILTER_CTL_SRCH_MAX
- EFX_FARCH_FILTER_INDEX_MASK
- EFX_FARCH_FILTER_INDEX_MC_DEF
- EFX_FARCH_FILTER_INDEX_UC_DEF
- EFX_FARCH_FILTER_INDEX_WIDTH
- EFX_FARCH_FILTER_MAC_FULL
- EFX_FARCH_FILTER_MAC_WILD
- EFX_FARCH_FILTER_MATCH_PRI_COUNT
- EFX_FARCH_FILTER_MC_DEF
- EFX_FARCH_FILTER_SIZE_RX_DEF
- EFX_FARCH_FILTER_TABLE_COUNT
- EFX_FARCH_FILTER_TABLE_RX_DEF
- EFX_FARCH_FILTER_TABLE_RX_IP
- EFX_FARCH_FILTER_TABLE_RX_MAC
- EFX_FARCH_FILTER_TABLE_TX_MAC
- EFX_FARCH_FILTER_TCP_FULL
- EFX_FARCH_FILTER_TCP_WILD
- EFX_FARCH_FILTER_TYPE_COUNT
- EFX_FARCH_FILTER_UC_DEF
- EFX_FARCH_FILTER_UDP_FULL
- EFX_FARCH_FILTER_UDP_WILD
- EFX_FARCH_REGS_H
- EFX_FC_AUTO
- EFX_FC_RX
- EFX_FC_TX
- EFX_FIELD_MASK
- EFX_FILE
- EFX_FILTER_FLAG_RX
- EFX_FILTER_FLAG_RX_OVER_AUTO
- EFX_FILTER_FLAG_RX_RSS
- EFX_FILTER_FLAG_RX_SCATTER
- EFX_FILTER_FLAG_TX
- EFX_FILTER_H
- EFX_FILTER_MATCH_ENCAP_TYPE
- EFX_FILTER_MATCH_ETHER_TYPE
- EFX_FILTER_MATCH_INNER_VID
- EFX_FILTER_MATCH_IP_PROTO
- EFX_FILTER_MATCH_LOC_HOST
- EFX_FILTER_MATCH_LOC_MAC
- EFX_FILTER_MATCH_LOC_MAC_IG
- EFX_FILTER_MATCH_LOC_PORT
- EFX_FILTER_MATCH_OUTER_VID
- EFX_FILTER_MATCH_REM_HOST
- EFX_FILTER_MATCH_REM_MAC
- EFX_FILTER_MATCH_REM_PORT
- EFX_FILTER_PRI_AUTO
- EFX_FILTER_PRI_HINT
- EFX_FILTER_PRI_MANUAL
- EFX_FILTER_PRI_REQUIRED
- EFX_FILTER_RX_DMAQ_ID_DROP
- EFX_FILTER_VID_UNSPEC
- EFX_FRAME_PAD
- EFX_HIGH_BIT
- EFX_HWMON_COOL
- EFX_HWMON_CURR
- EFX_HWMON_IN
- EFX_HWMON_POWER
- EFX_HWMON_TEMP
- EFX_HWMON_TYPES_COUNT
- EFX_HWMON_UNKNOWN
- EFX_INPLACE_MASK32
- EFX_INPLACE_MASK64
- EFX_INSERT32
- EFX_INSERT64
- EFX_INSERT_FIELDS32
- EFX_INSERT_FIELDS64
- EFX_INSERT_FIELDS_NATIVE
- EFX_INSERT_FIELD_NATIVE
- EFX_INSERT_NATIVE
- EFX_INSERT_NATIVE32
- EFX_INSERT_NATIVE64
- EFX_INT_ERROR_EXPIRE
- EFX_INT_MODE_LEGACY
- EFX_INT_MODE_MAX
- EFX_INT_MODE_MSI
- EFX_INT_MODE_MSIX
- EFX_INT_MODE_USE_MSI
- EFX_INVERT_OWORD
- EFX_IO_H
- EFX_LED_DEFAULT
- EFX_LED_OFF
- EFX_LED_ON
- EFX_LOOPBACK_NAME
- EFX_LOW_BIT
- EFX_MAC_STATS_WAIT_ATTEMPTS
- EFX_MAC_STATS_WAIT_US
- EFX_MASK32
- EFX_MASK64
- EFX_MAX_CHANNELS
- EFX_MAX_CORE_TX_QUEUES
- EFX_MAX_DMAQ_SIZE
- EFX_MAX_EVQ_SIZE
- EFX_MAX_EXTRA_CHANNELS
- EFX_MAX_FLUSH_TIME
- EFX_MAX_FRAME_LEN
- EFX_MAX_INT_ERRORS
- EFX_MAX_MTU
- EFX_MAX_PHY_TESTS
- EFX_MAX_RX_QUEUES
- EFX_MAX_TX_QUEUES
- EFX_MAX_TX_TC
- EFX_MAX_VF_EVQ_SIZE
- EFX_MCAST_HASH_BITS
- EFX_MCAST_HASH_ENTRIES
- EFX_MCDI_H
- EFX_MCDI_NVRAM_LEN_MAX
- EFX_MC_STATS_GENERATION_INVALID
- EFX_MIN_DMAQ_SIZE
- EFX_MIN_EVQ_SIZE
- EFX_MIN_MTU
- EFX_NET_DRIVER_H
- EFX_NIC_H
- EFX_OR_OWORD
- EFX_OWORD32
- EFX_OWORD_FIELD
- EFX_OWORD_FIELD32
- EFX_OWORD_FIELD64
- EFX_OWORD_FMT
- EFX_OWORD_IS_ALL_ONES
- EFX_OWORD_IS_ALL_ONES32
- EFX_OWORD_IS_ALL_ONES64
- EFX_OWORD_IS_ZERO
- EFX_OWORD_IS_ZERO32
- EFX_OWORD_IS_ZERO64
- EFX_OWORD_VAL
- EFX_PAGE_SIZE
- EFX_PIOBUF_SIZE_DEF
- EFX_POPULATE_DWORD
- EFX_POPULATE_DWORD_1
- EFX_POPULATE_DWORD_10
- EFX_POPULATE_DWORD_2
- EFX_POPULATE_DWORD_3
- EFX_POPULATE_DWORD_4
- EFX_POPULATE_DWORD_5
- EFX_POPULATE_DWORD_6
- EFX_POPULATE_DWORD_7
- EFX_POPULATE_DWORD_8
- EFX_POPULATE_DWORD_9
- EFX_POPULATE_OWORD
- EFX_POPULATE_OWORD32
- EFX_POPULATE_OWORD64
- EFX_POPULATE_OWORD_1
- EFX_POPULATE_OWORD_10
- EFX_POPULATE_OWORD_2
- EFX_POPULATE_OWORD_3
- EFX_POPULATE_OWORD_4
- EFX_POPULATE_OWORD_5
- EFX_POPULATE_OWORD_6
- EFX_POPULATE_OWORD_7
- EFX_POPULATE_OWORD_8
- EFX_POPULATE_OWORD_9
- EFX_POPULATE_QWORD
- EFX_POPULATE_QWORD32
- EFX_POPULATE_QWORD64
- EFX_POPULATE_QWORD_1
- EFX_POPULATE_QWORD_10
- EFX_POPULATE_QWORD_2
- EFX_POPULATE_QWORD_3
- EFX_POPULATE_QWORD_4
- EFX_POPULATE_QWORD_5
- EFX_POPULATE_QWORD_6
- EFX_POPULATE_QWORD_7
- EFX_POPULATE_QWORD_8
- EFX_POPULATE_QWORD_9
- EFX_QWORD_0_LBN
- EFX_QWORD_0_WIDTH
- EFX_QWORD_FIELD
- EFX_QWORD_FIELD32
- EFX_QWORD_FIELD64
- EFX_QWORD_FMT
- EFX_QWORD_IS_ALL_ONES
- EFX_QWORD_IS_ALL_ONES32
- EFX_QWORD_IS_ALL_ONES64
- EFX_QWORD_IS_ZERO
- EFX_QWORD_IS_ZERO32
- EFX_QWORD_IS_ZERO64
- EFX_QWORD_VAL
- EFX_RECYCLE_RING_SIZE_IOMMU
- EFX_RECYCLE_RING_SIZE_NOIOMMU
- EFX_REV_HUNT_A0
- EFX_REV_SIENA_A0
- EFX_RPS_MAX_IN_FLIGHT
- EFX_RXD_HEAD_ROOM
- EFX_RXQ_MIN_ENT
- EFX_RX_BUF_ALIGNMENT
- EFX_RX_BUF_LAST_IN_PAGE
- EFX_RX_FLUSH_COUNT
- EFX_RX_MAX_FRAGS
- EFX_RX_PKT_CSUMMED
- EFX_RX_PKT_CSUM_LEVEL
- EFX_RX_PKT_DISCARD
- EFX_RX_PKT_PREFIX_LEN
- EFX_RX_PKT_TCP
- EFX_RX_PREFERRED_BATCH
- EFX_RX_QUEUE_NAME
- EFX_RX_USR_BUF_SIZE
- EFX_SELFTEST_H
- EFX_SET_DWORD
- EFX_SET_DWORD32
- EFX_SET_DWORD_FIELD
- EFX_SET_OWORD
- EFX_SET_OWORD32
- EFX_SET_OWORD64
- EFX_SET_OWORD_FIELD
- EFX_SET_OWORD_FIELD32
- EFX_SET_OWORD_FIELD64
- EFX_SET_QWORD
- EFX_SET_QWORD32
- EFX_SET_QWORD64
- EFX_SET_QWORD_FIELD
- EFX_SET_QWORD_FIELD32
- EFX_SET_QWORD_FIELD64
- EFX_SKB_HEADERS
- EFX_SRIOV_H
- EFX_STATS_DISABLE
- EFX_STATS_ENABLE
- EFX_STATS_PULL
- EFX_TSO_MAX_SEGS
- EFX_TXQ_MAX_ENT
- EFX_TXQ_MIN_ENT
- EFX_TXQ_TYPES
- EFX_TXQ_TYPE_HIGHPRI
- EFX_TXQ_TYPE_OFFLOAD
- EFX_TX_BUF_CONT
- EFX_TX_BUF_MAP_SINGLE
- EFX_TX_BUF_OPTION
- EFX_TX_BUF_SKB
- EFX_TX_CB_ORDER
- EFX_TX_CB_SIZE
- EFX_TX_H
- EFX_TX_QUEUE_NAME
- EFX_USE_PIO
- EFX_USE_QWORD_IO
- EFX_VAL
- EFX_VF_BUFTBL_PER_VI
- EFX_VF_COUNT_MAX
- EFX_VI_BASE
- EFX_VI_SCALE_MAX
- EFX_WARN_ON_ONCE_PARANOID
- EFX_WARN_ON_PARANOID
- EFX_WIDTH
- EFX_WORD_0_LBN
- EFX_WORD_0_WIDTH
- EFX_WORD_1_LBN
- EFX_WORD_1_WIDTH
- EFX_WORKAROUNDS_H
- EFX_WORKAROUND_10G
- EFX_WORKAROUND_17213
- EFX_WORKAROUND_35388
- EFX_WORKAROUND_7884
- EFX_WORKAROUND_EF10
- EFX_WORKAROUND_SIENA
- EFX_ZERO_DWORD
- EFX_ZERO_OWORD
- EFX_ZERO_QWORD
- EF_A0
- EF_A1
- EF_A2
- EF_A3
- EF_A4
- EF_A5
- EF_ADDR
- EF_ALPHA_32BIT
- EF_ARC_OSABI_CURRENT
- EF_ARC_OSABI_MSK
- EF_ARC_OSABI_V3
- EF_ARC_OSABI_V4
- EF_ARM_ABI_FLOAT_HARD
- EF_ARM_ABI_FLOAT_SOFT
- EF_ARM_ALIGN8
- EF_ARM_APCS_26
- EF_ARM_APCS_FLOAT
- EF_ARM_BE8
- EF_ARM_DYNSYMSUSESEGIDX
- EF_ARM_EABI_MASK
- EF_ARM_EABI_UNKNOWN
- EF_ARM_EABI_VER1
- EF_ARM_EABI_VER2
- EF_ARM_EABI_VER3
- EF_ARM_EABI_VER4
- EF_ARM_EABI_VER5
- EF_ARM_HASENTRY
- EF_ARM_INTERWORK
- EF_ARM_LE8
- EF_ARM_MAPSYMSFIRST
- EF_ARM_MAVERICK_FLOAT
- EF_ARM_NEW_ABI
- EF_ARM_OLD_ABI
- EF_ARM_PIC
- EF_ARM_RELEXEC
- EF_ARM_SOFT_FLOAT
- EF_ARM_SYMSARESORTED
- EF_ARM_VFP_FLOAT
- EF_AT
- EF_BUFF
- EF_CELL_SEL
- EF_CP0_BADVADDR
- EF_CP0_CAUSE
- EF_CP0_EPC
- EF_CP0_STATUS
- EF_DATA
- EF_EN
- EF_FLAG
- EF_GP
- EF_HI
- EF_IA_64_LINUX_EXECUTABLE_STACK
- EF_LCAR
- EF_LCOL
- EF_LO
- EF_MIPS_32BITMODE
- EF_MIPS_ABI
- EF_MIPS_ABI2
- EF_MIPS_ABI_O32
- EF_MIPS_ABI_O64
- EF_MIPS_ARCH
- EF_MIPS_ARCH_1
- EF_MIPS_ARCH_2
- EF_MIPS_ARCH_3
- EF_MIPS_ARCH_32
- EF_MIPS_ARCH_32R2
- EF_MIPS_ARCH_4
- EF_MIPS_ARCH_5
- EF_MIPS_ARCH_64
- EF_MIPS_ARCH_64R2
- EF_MIPS_CPIC
- EF_MIPS_FP64
- EF_MIPS_NAN2008
- EF_MIPS_NOREORDER
- EF_MIPS_OPTIONS_FIRST
- EF_MIPS_PIC
- EF_PARISC_ARCH
- EF_PARISC_EXT
- EF_PARISC_LAZYSWAP
- EF_PARISC_LSB
- EF_PARISC_NO_KABP
- EF_PARISC_TRAPNIL
- EF_PARISC_WIDE
- EF_PC
- EF_PD
- EF_PDN_EN
- EF_PGPD
- EF_PS
- EF_R0
- EF_R1
- EF_R10
- EF_R11
- EF_R12
- EF_R13
- EF_R14
- EF_R15
- EF_R16
- EF_R17
- EF_R18
- EF_R19
- EF_R2
- EF_R20
- EF_R21
- EF_R22
- EF_R23
- EF_R24
- EF_R25
- EF_R26
- EF_R27
- EF_R28
- EF_R29
- EF_R3
- EF_R30
- EF_R31
- EF_R4
- EF_R5
- EF_R6
- EF_R7
- EF_R8
- EF_R9
- EF_RA
- EF_RDT
- EF_RTRY
- EF_S0
- EF_S1
- EF_S2
- EF_S3
- EF_S4
- EF_S5
- EF_S6
- EF_SH_FDPIC
- EF_SH_PIC
- EF_SIZE
- EF_SP
- EF_SSIZE
- EF_T0
- EF_T1
- EF_T10
- EF_T11
- EF_T12
- EF_T2
- EF_T3
- EF_T4
- EF_T5
- EF_T6
- EF_T7
- EF_T8
- EF_T9
- EF_TDR
- EF_TRPT
- EF_UFLO
- EF_UNUSED0
- EF_V0
- EG0
- EG1
- EG2
- EG3
- EG4
- EG5
- EG6
- EG7
- EGALAX_FORMAT_MAX_LENGTH
- EGALAX_FORMAT_PRESSURE_BIT
- EGALAX_FORMAT_RESOLUTION_MASK
- EGALAX_FORMAT_START_BIT
- EGALAX_FORMAT_TOUCH_BIT
- EGALAX_MAX_TRIES
- EGALAX_MAX_X
- EGALAX_MAX_XC
- EGALAX_MAX_Y
- EGALAX_MAX_YC
- EGALAX_MIN_XC
- EGALAX_MIN_YC
- EGALAX_PKT_TYPE_DIAG
- EGALAX_PKT_TYPE_MASK
- EGALAX_PKT_TYPE_REPT
- EGAModeIndex
- EGA_GFX_E0
- EGA_GFX_E1
- EGL_DOUT_ACLK_EGL
- EGL_DOUT_EGL1
- EGL_DOUT_EGL2
- EGL_DOUT_EGL_ATCLK
- EGL_DOUT_EGL_PCLK_DBG
- EGL_DOUT_EGL_PLL
- EGL_DOUT_PCLK_EGL
- EGL_DPLL_CON0
- EGL_DPLL_CON1
- EGL_DPLL_FREQ_DET
- EGL_DPLL_LOCK
- EGL_FOUT_EGL_DPLL
- EGL_FOUT_EGL_PLL
- EGL_MOUT_EGL_B
- EGL_MOUT_EGL_PLL
- EGL_NR_CLK
- EGL_PLL_CON0
- EGL_PLL_CON1
- EGL_PLL_FREQ_DET
- EGL_PLL_LOCK
- EGPDATA
- EGPIO0_VCC_3V3_EN
- EGPIO1_WL_VREG_EN
- EGPIO2_VCC_2V1_WL_EN
- EGPIO3_SS_PWR_ON
- EGPIO4_CF_3V3_ON
- EGPIO5_BT_3V3_ON
- EGPIO6_WL1V8_EN
- EGPIO7_VCC_3V3_WL_EN
- EGPIO8_USB_3V3_ON
- EGPIODR_GPOE0
- EGPIODR_GPOE1
- EGPIODR_GPOE2
- EGPIODR_GPOE3
- EGPIODR_GPOE4
- EGPIODR_GPOE5
- EGPIODR_GPOE6
- EGPIODR_GPOE7
- EGPIODR_GPOE8
- EGPIOPTR_GPPT0
- EGPIOPTR_GPPT1
- EGPIOPTR_GPPT2
- EGPIOPTR_GPPT3
- EGPIOPTR_GPPT4
- EGPIOPTR_GPPT5
- EGPIOPTR_GPPT6
- EGPIOPTR_GPPT7
- EGPIOPTR_GPPT8
- EGPIOSR_GPS0
- EGPIOSR_GPS1
- EGPIOSR_GPS2
- EGPIOSR_GPS3
- EGPIOSR_GPS4
- EGPIOSR_GPS5
- EGPIOSR_GPS6
- EGPIOSR_GPS7
- EGPIOSR_GPS8
- EGPIOTR_GPS0
- EGPIOTR_GPS1
- EGPIOTR_GPS2
- EGPIOTR_GPS3
- EGPIOTR_GPS4
- EGPIOTR_GPS5
- EGPIOTR_GPS6
- EGPIOTR_GPS7
- EGPIOTR_GPS8
- EGPIOWR_GPW0
- EGPIOWR_GPW1
- EGPIOWR_GPW2
- EGPIOWR_GPW3
- EGPIOWR_GPW4
- EGPIOWR_GPW5
- EGPIOWR_GPW6
- EGPIOWR_GPW7
- EGPIOWR_GPW8
- EGPIO_MAGICIAN_BL_POWER
- EGPIO_MAGICIAN_BL_POWER2
- EGPIO_MAGICIAN_BOARD_ID0
- EGPIO_MAGICIAN_BOARD_ID1
- EGPIO_MAGICIAN_BOARD_ID2
- EGPIO_MAGICIAN_BQ24022_ISET2
- EGPIO_MAGICIAN_CABLE_INSERTED
- EGPIO_MAGICIAN_CABLE_TYPE
- EGPIO_MAGICIAN_CABLE_VBUS
- EGPIO_MAGICIAN_CARKIT_MIC
- EGPIO_MAGICIAN_CODEC_POWER
- EGPIO_MAGICIAN_CODEC_RESET
- EGPIO_MAGICIAN_EP_INSERT
- EGPIO_MAGICIAN_EP_POWER
- EGPIO_MAGICIAN_FLASH_VPP
- EGPIO_MAGICIAN_GSM_POWER
- EGPIO_MAGICIAN_GSM_RESET
- EGPIO_MAGICIAN_IN_SEL0
- EGPIO_MAGICIAN_IN_SEL1
- EGPIO_MAGICIAN_IR_RX_SHUTDOWN
- EGPIO_MAGICIAN_LCD_POWER
- EGPIO_MAGICIAN_LCD_SELECT
- EGPIO_MAGICIAN_LED_POWER
- EGPIO_MAGICIAN_MIC_POWER
- EGPIO_MAGICIAN_NICD_CHARGE
- EGPIO_MAGICIAN_SD_POWER
- EGPIO_MAGICIAN_SPK_POWER
- EGPIO_MAGICIAN_TOPPOLY_POWER
- EGPIO_MAGICIAN_nSD_POWER_OFFSET
- EGPIO_MAGICIAN_nSD_READONLY
- EGPIO_MAGICIAN_nSD_READONLY_OFFSET
- EGPRDPT
- EGPWRPT
- EGRESS_CLI_IDX
- EGRESS_ENTRY_REMOVED
- EGRESS_ERR_INT
- EGRESS_INVALID
- EGRESS_LINUM_IDX
- EGRESS_POISON_MASK_HI__EgressPoisonMaskHi_MASK
- EGRESS_POISON_MASK_HI__EgressPoisonMaskHi__SHIFT
- EGRESS_POISON_MASK_LO__EgressPoisonMaskLo_MASK
- EGRESS_POISON_MASK_LO__EgressPoisonMaskLo__SHIFT
- EGRESS_POISON_SEVERITY_DOWN__EgressPoisonSeverityDown_MASK
- EGRESS_POISON_SEVERITY_DOWN__EgressPoisonSeverityDown__SHIFT
- EGRESS_POISON_SEVERITY_UPPER__EgressPoisonSeverityUpper_MASK
- EGRESS_POISON_SEVERITY_UPPER__EgressPoisonSeverityUpper__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_0_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_0__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_10_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_10__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_11_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_11__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_12_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_12__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_13_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_13__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_14_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_14__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_15_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_15__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_16_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_16__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_17_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_17__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_18_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_18__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_19_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_19__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_1_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_1__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_20_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_20__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_21_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_21__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_22_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_22__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_23_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_23__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_24_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_24__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_25_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_25__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_26_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_26__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_27_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_27__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_28_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_28__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_29_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_29__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_2_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_2__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_30_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_30__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_31_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_31__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_3_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_3__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_4_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_4__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_5_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_5__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_6_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_6__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_7_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_7__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_8_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_8__SHIFT
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_9_MASK
- EGRESS_POISON_STATUS_HI__EgressPoisonStatusHi_9__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_0_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_0__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_10_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_10__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_11_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_11__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_12_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_12__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_13_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_13__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_14_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_14__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_15_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_15__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_16_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_16__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_17_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_17__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_18_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_18__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_19_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_19__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_1_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_1__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_20_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_20__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_21_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_21__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_22_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_22__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_23_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_23__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_24_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_24__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_25_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_25__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_26_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_26__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_27_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_27__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_28_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_28__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_29_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_29__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_2_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_2__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_30_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_30__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_31_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_31__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_3_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_3__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_4_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_4__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_5_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_5__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_6_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_6__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_7_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_7__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_8_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_8__SHIFT
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_9_MASK
- EGRESS_POISON_STATUS_LO__EgressPoisonStatusLo_9__SHIFT
- EGRESS_PURGE
- EGRESS_PURGE_RCVD
- EGRESS_RESOLVED
- EGRESS_SIZE_ERR_F
- EGRESS_SIZE_ERR_S
- EGRESS_SIZE_ERR_V
- EGRESS_SRV_IDX
- EGRET_SESSION_DELAY
- EGRET_TACK_ASSERTED_DELAY
- EGRET_TACK_NEGATED_DELAY
- EGRPCIEBOUNDARY_S
- EGRPCIEBOUNDARY_V
- EGRSTATUSPAGESIZE_F
- EGRSTATUSPAGESIZE_S
- EGRSTATUSPAGESIZE_V
- EGRTHRESHOLDPACKING_G
- EGRTHRESHOLDPACKING_M
- EGRTHRESHOLDPACKING_S
- EGRTHRESHOLDPACKING_V
- EGRTHRESHOLD_G
- EGRTHRESHOLD_M
- EGRTHRESHOLD_S
- EGRTHRESHOLD_V
- EGR_HEAD_UPDATE_THRESHOLD
- EGR_QID_G
- EGR_QID_M
- EGR_QID_S
- EG_TAG
- EH
- EHCI_ASYNC_JIFFIES
- EHCI_BANDWIDTH_FRAMES
- EHCI_BANDWIDTH_SIZE
- EHCI_CAPS_SIZE
- EHCI_CONFIGFLAG
- EHCI_FSL_PM_OPS
- EHCI_HCC_PARAMS
- EHCI_HRTIMER_ACTIVE_UNLINK
- EHCI_HRTIMER_ASYNC_UNLINKS
- EHCI_HRTIMER_DISABLE_ASYNC
- EHCI_HRTIMER_DISABLE_PERIODIC
- EHCI_HRTIMER_FREE_ITDS
- EHCI_HRTIMER_IAA_WATCHDOG
- EHCI_HRTIMER_IO_WATCHDOG
- EHCI_HRTIMER_NO_EVENT
- EHCI_HRTIMER_NUM_EVENTS
- EHCI_HRTIMER_POLL_ASS
- EHCI_HRTIMER_POLL_DEAD
- EHCI_HRTIMER_POLL_PSS
- EHCI_HRTIMER_START_UNLINK_INTR
- EHCI_HRTIMER_UNLINK_INTR
- EHCI_IAA_JIFFIES
- EHCI_INSNREG00
- EHCI_INSNREG00_ENABLE_DMA_BURST
- EHCI_INSNREG00_ENA_INCR16
- EHCI_INSNREG00_ENA_INCR4
- EHCI_INSNREG00_ENA_INCR8
- EHCI_INSNREG00_ENA_INCRX_ALIGN
- EHCI_INSNREG04
- EHCI_INSNREG04_DISABLE_UNSUSPEND
- EHCI_INSNREG05_ULPI
- EHCI_INSNREG05_ULPI_CONTROL_SHIFT
- EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT
- EHCI_INSNREG05_ULPI_OPSEL_SHIFT
- EHCI_INSNREG05_ULPI_PORTSEL_SHIFT
- EHCI_INSNREG05_ULPI_REGADD_SHIFT
- EHCI_INSNREG05_ULPI_WRDATA_SHIFT
- EHCI_IO_JIFFIES
- EHCI_ISOC_ACTIVE
- EHCI_ISOC_BABBLE
- EHCI_ISOC_BUF_ERR
- EHCI_ISOC_XACTERR
- EHCI_ITD_IOC
- EHCI_ITD_LENGTH
- EHCI_LIST_END
- EHCI_MAX_CLKS
- EHCI_MAX_ROOT_PORTS
- EHCI_PHY_DD
- EHCI_PHY_KW
- EHCI_PHY_NA
- EHCI_PHY_ORION
- EHCI_RH_HALTED
- EHCI_RH_RUNNING
- EHCI_RH_STOPPING
- EHCI_RH_SUSPENDED
- EHCI_SHRINK_JIFFIES
- EHCI_STATS
- EHCI_TUNE_CERR
- EHCI_TUNE_FLS
- EHCI_TUNE_MULT_HS
- EHCI_TUNE_MULT_TT
- EHCI_TUNE_RL_HS
- EHCI_TUNE_RL_TT
- EHCI_UNDEFINED
- EHCI_URB_TRACE
- EHCI_USBCMD
- EHCI_USBCMD_RUN
- EHCI_USBINTR
- EHCI_USBLEGCTLSTS
- EHCI_USBLEGCTLSTS_SOOE
- EHCI_USBLEGSUP
- EHCI_USBLEGSUP_BIOS
- EHCI_USBLEGSUP_OS
- EHCI_USBSTS
- EHCI_USBSTS_HALTED
- EHEA_AERR_RESET_MASK
- EHEA_AER_RESET_MASK
- EHEA_AER_RESTYPE_CQ
- EHEA_AER_RESTYPE_EQ
- EHEA_AER_RESTYPE_QP
- EHEA_BCMC_BROADCAST
- EHEA_BCMC_MULTICAST
- EHEA_BCMC_SCOPE_ALL
- EHEA_BCMC_SCOPE_SINGLE
- EHEA_BCMC_TAGGED
- EHEA_BCMC_UNTAGGED
- EHEA_BCMC_VLANID_ALL
- EHEA_BCMC_VLANID_SINGLE
- EHEA_BMASK
- EHEA_BMASK_GET
- EHEA_BMASK_IBM
- EHEA_BMASK_MASK
- EHEA_BMASK_SET
- EHEA_BMASK_SHIFTPOS
- EHEA_BUSMAP_ADD_SECT
- EHEA_BUSMAP_REM_SECT
- EHEA_BUSMAP_START
- EHEA_CACHE_LINE
- EHEA_CAPABILITIES
- EHEA_CQE_BLIND_CKSUM
- EHEA_CQE_STAT_ERR_CRC
- EHEA_CQE_STAT_ERR_IP
- EHEA_CQE_STAT_ERR_MASK
- EHEA_CQE_STAT_ERR_TCP
- EHEA_CQE_STAT_FAT_ERR_MASK
- EHEA_CQE_STAT_RESET_MASK
- EHEA_CQE_TYPE_RQ
- EHEA_CQE_VLAN_TAG_XTRACT
- EHEA_CQ_REGISTER_ORIG
- EHEA_DEF_ENTRIES_RQ1
- EHEA_DEF_ENTRIES_RQ2
- EHEA_DEF_ENTRIES_RQ3
- EHEA_DEF_ENTRIES_SQ
- EHEA_DIR_INDEX_SHIFT
- EHEA_EC_ADAPTER_MALFUNC
- EHEA_EC_PORTSTATE_CHG
- EHEA_EC_PORT_MALFUNC
- EHEA_EQ
- EHEA_EQE_CQ_TOKEN
- EHEA_EQE_EQ_NUMBER
- EHEA_EQE_IDENTIFIER
- EHEA_EQE_IS_CQE
- EHEA_EQE_KEY
- EHEA_EQE_PORT_NUMBER
- EHEA_EQE_QP_CQ_NUMBER
- EHEA_EQE_QP_TOKEN
- EHEA_EQE_SM_ID
- EHEA_EQE_SM_MECH_NUMBER
- EHEA_EQE_SM_PORT_NUMBER
- EHEA_EQE_VALID
- EHEA_EQ_REGISTER_ORIG
- EHEA_HUGEPAGESHIFT
- EHEA_HUGEPAGE_PFN_MASK
- EHEA_HUGEPAGE_SIZE
- EHEA_INDEX_MASK
- EHEA_INVAL_ADDR
- EHEA_IRQ_NAME_SIZE
- EHEA_L_PKT_SIZE
- EHEA_MAP_ENTRIES
- EHEA_MAP_SIZE
- EHEA_MAX_CQE_COUNT
- EHEA_MAX_ENTRIES_EQ
- EHEA_MAX_ENTRIES_RQ1
- EHEA_MAX_ENTRIES_RQ2
- EHEA_MAX_ENTRIES_RQ3
- EHEA_MAX_ENTRIES_SQ
- EHEA_MAX_PACKET_SIZE
- EHEA_MAX_PORTS
- EHEA_MAX_PORT_RES
- EHEA_MAX_RPAGE
- EHEA_MAX_WQE_SG_ENTRIES
- EHEA_MIN_ENTRIES_QP
- EHEA_MR_ACC_CTRL
- EHEA_MSG_DEFAULT
- EHEA_NEQ
- EHEA_NUM_ADAPTER_FW_HANDLES
- EHEA_NUM_PORTRES_FW_HANDLES
- EHEA_NUM_PORT_FW_HANDLES
- EHEA_PAGESHIFT
- EHEA_PAGESIZE
- EHEA_PAGES_PER_SECTION
- EHEA_PD_ID
- EHEA_PHY_LINK_DOWN
- EHEA_PHY_LINK_UP
- EHEA_POLL_MAX_CQES
- EHEA_PORT_DOWN
- EHEA_PORT_UP
- EHEA_RQ2_PKT_SIZE
- EHEA_RQ2_THRESHOLD
- EHEA_RQ3_THRESHOLD
- EHEA_RWQE2_TYPE
- EHEA_RWQE3_TYPE
- EHEA_SECTSIZE
- EHEA_SG_RQ1
- EHEA_SG_RQ2
- EHEA_SG_RQ3
- EHEA_SG_SQ
- EHEA_SMALL_QUEUES
- EHEA_SPEED_100M
- EHEA_SPEED_10G
- EHEA_SPEED_10M
- EHEA_SPEED_1G
- EHEA_SPEED_AUTONEG
- EHEA_SWQE2_TYPE
- EHEA_SWQE3_TYPE
- EHEA_SWQE_BIND
- EHEA_SWQE_CRC
- EHEA_SWQE_DESCRIPTORS_PRESENT
- EHEA_SWQE_IMM_DATA_PRESENT
- EHEA_SWQE_IP_CHECKSUM
- EHEA_SWQE_PURGE
- EHEA_SWQE_SIGNALLED_COMPLETION
- EHEA_SWQE_TCP_CHECKSUM
- EHEA_SWQE_TSO
- EHEA_SWQE_VLAN_INSERT
- EHEA_SWQE_WRAP_CTL_FORCE
- EHEA_SWQE_WRAP_CTL_REC
- EHEA_TOP_INDEX_SHIFT
- EHEA_WATCH_DOG_TIMEOUT
- EHEA_WR_ID_COUNT
- EHEA_WR_ID_INDEX
- EHEA_WR_ID_REFILL
- EHEA_WR_ID_TYPE
- EHFUNC_IOMEM_LEN
- EHL_Ax_DEVICE_ID
- EHOSTDOWN
- EHOSTUNREACH
- EHP
- EHPRIV_OC_DEBUG
- EHPRIV_OC_SHIFT
- EHSET_TEST_SINGLE_STEP_SET_FEATURE
- EHS_REMOVE_WAKEUP
- EHS_WAKE_ON_BROADCAST_DATA
- EHS_WAKE_ON_MAC_EVENT
- EHS_WAKE_ON_MULTICAST_DATA
- EHS_WAKE_ON_UNICAST_DATA
- EHT0
- EHT1
- EHT2
- EHT3
- EHT4
- EHT5
- EHT6
- EHT7
- EHV_PIC_INFO
- EHV_PIC_VECPRI_POLARITY_MASK
- EHV_PIC_VECPRI_POLARITY_NEGATIVE
- EHV_PIC_VECPRI_POLARITY_POSITIVE
- EHV_PIC_VECPRI_SENSE_EDGE
- EHV_PIC_VECPRI_SENSE_LEVEL
- EHV_PIC_VECPRI_SENSE_MASK
- EHWPOISON
- EH_FRAME_FP
- EH_FRAME_GEN
- EH_FRAME_VMX
- EH_WAIT_CMD_TOV
- EI2C
- EIA_INCR
- EIA_MASK
- EIC
- EIC_BIT
- EIC_CLLE0
- EIC_CLLE1
- EIC_CULE0
- EIC_CULE1
- EIC_MREE
- EIC_MTEE
- EIC_QEE
- EIC_SEE
- EIC_TFFE
- EID
- EIDLED
- EIDRM
- EID_Aironet
- EID_BSSCoexistence
- EID_BSSIntolerantChlReport
- EID_CCKM
- EID_CFParms
- EID_CellPwr
- EID_ChlSwitchAnnounce
- EID_ChnlSwitchTimeing
- EID_CiscoIP
- EID_Country
- EID_Ctext
- EID_DSParms
- EID_EDCAParms
- EID_ERPInfo
- EID_EXTCapability
- EID_ExtSupRates
- EID_FHParms
- EID_FTIE
- EID_HTCapability
- EID_HTInfo
- EID_IbssParms
- EID_LinkIdentifier
- EID_MeasureReport
- EID_MeasureRequest
- EID_OBSS
- EID_OpModeNotification
- EID_POWER_CONSTRAINT
- EID_PTIControl
- EID_PUBufferStatus
- EID_PowerCap
- EID_QBSSLoad
- EID_QoSCap
- EID_Schedule
- EID_SecondaryChnlOffset
- EID_SsId
- EID_SupRates
- EID_SupRegulatory
- EID_SupportedChannels
- EID_TCLASProc
- EID_TClass
- EID_TSDelay
- EID_TSpec
- EID_Tim
- EID_Timeout
- EID_VHTCapability
- EID_VHTOperation
- EID_Vendor
- EID_WAPI
- EID_WPA2
- EID_WakeupSchedule
- EIE
- EIEDG
- EIEM_MASK
- EIERRINT
- EIE_DMAIE
- EIE_INTIE
- EIE_LINKIE
- EIE_PKTIE
- EIE_RXERIE
- EIE_TXERIE
- EIE_TXIE
- EIFFilter
- EIFS
- EIFSTR
- EIGHTBITS
- EIGHTH
- EIGHT_BANKS
- EIGHT_BYTE
- EIGHT_CHANNEL_SUPPORT
- EIGHT_FRAGMENTS
- EIGHT_MHZ
- EIGHT_PIPES
- EIGHT_SAMPLES
- EIGHT_SHADER_ENGINS
- EIGHT_WORD_MSG_SIZE
- EII_FRAMETAG
- EILSEQ
- EILVL
- EIMASK
- EINIT
- EINJ_OP_BUSY
- EINJ_STATUS_FAIL
- EINJ_STATUS_INVAL
- EINJ_STATUS_SUCCESS
- EINJ_TAB_ENTRY
- EINPROGRESS
- EINT0
- EINT0CON0_REG
- EINT0MASK_REG
- EINT0PEND_REG
- EINT1
- EINT12CON_REG
- EINT12MASK_REG
- EINT12PEND_REG
- EINT4
- EINT7
- EINTCON_REG
- EINTMASK_REG
- EINTPEND_REG
- EINTR
- EINT_CON_LEN
- EINT_CON_MASK
- EINT_DBNC_RST_BIT
- EINT_DBNC_SET_DBNC_BITS
- EINT_DBNC_SET_EN
- EINT_EDGE_BOTH
- EINT_EDGE_FALLING
- EINT_EDGE_RISING
- EINT_GROUP
- EINT_LEVEL_HIGH
- EINT_LEVEL_LOW
- EINT_MASK
- EINT_MAX_PER_GROUP
- EINT_MAX_PER_REG
- EINT_NA
- EINT_OFFS
- EINT_REG
- EINT_TYPE_GPIO
- EINT_TYPE_NONE
- EINT_TYPE_WKUP
- EINT_TYPE_WKUP_MUX
- EINVAL
- EINVPKT
- EIO
- EIOCBQUEUED
- EIOERROR
- EIP
- EIP197B_MRVL
- EIP197D_MRVL
- EIP197_ADDRESS_MODE
- EIP197_AEAD_REQ_SIZE
- EIP197_AHASH_REQ_SIZE
- EIP197_CDR_IRQ
- EIP197_CFSIZE_ADJUST
- EIP197_CFSIZE_MASK
- EIP197_CFSIZE_OFFSET
- EIP197_CLASSIFICATION_RAMS
- EIP197_CONTEXT_SIZE
- EIP197_CONTROL_MODE
- EIP197_COUNTER_BLOCK_SIZE
- EIP197_CS_BANKSEL_MASK
- EIP197_CS_BANKSEL_OFS
- EIP197_CS_RAM_CTRL
- EIP197_CS_RC_NEXT
- EIP197_CS_RC_PREV
- EIP197_CS_RC_SIZE
- EIP197_CS_TRC_REC_WC
- EIP197_DEFAULT_RING_SIZE
- EIP197_DEVBRD
- EIP197_DxE_THR_CTRL_EN
- EIP197_DxE_THR_CTRL_RESET_PE
- EIP197_FETCH_DEPTH
- EIP197_FLUE_ARC4_OFFSET
- EIP197_FLUE_CACHEBASE_HI
- EIP197_FLUE_CACHEBASE_LO
- EIP197_FLUE_CONFIG
- EIP197_FLUE_CONFIG_MAGIC
- EIP197_FLUE_IFC_LUT
- EIP197_FLUE_OFFSETS
- EIP197_FUNCTION_ALL
- EIP197_FW_FPP_READY
- EIP197_FW_PUE_READY
- EIP197_FW_START_POLLCNT
- EIP197_FW_TERMINAL_NOPS
- EIP197_GFP_FLAGS
- EIP197_GLOBAL
- EIP197_GLOBAL_BASE
- EIP197_G_IRQ_DFE
- EIP197_G_IRQ_DSE
- EIP197_G_IRQ_PE
- EIP197_G_IRQ_RING
- EIP197_HIA_AIC
- EIP197_HIA_AIC_BASE
- EIP197_HIA_AIC_G
- EIP197_HIA_AIC_G_ACK
- EIP197_HIA_AIC_G_BASE
- EIP197_HIA_AIC_G_ENABLED_STAT
- EIP197_HIA_AIC_G_ENABLE_CTRL
- EIP197_HIA_AIC_R
- EIP197_HIA_AIC_R_ACK
- EIP197_HIA_AIC_R_BASE
- EIP197_HIA_AIC_R_ENABLED_STAT
- EIP197_HIA_AIC_R_ENABLE_CLR
- EIP197_HIA_AIC_R_ENABLE_CTRL
- EIP197_HIA_AIC_R_OFF
- EIP197_HIA_AIC_xDR
- EIP197_HIA_AIC_xDR_BASE
- EIP197_HIA_CDR
- EIP197_HIA_CDR_THRESH_PKT_MODE
- EIP197_HIA_CDR_THRESH_PROC_MODE
- EIP197_HIA_CDR_THRESH_PROC_PKT
- EIP197_HIA_CDR_THRESH_TIMEOUT
- EIP197_HIA_DFE
- EIP197_HIA_DFE_BASE
- EIP197_HIA_DFE_CFG
- EIP197_HIA_DFE_CFG_DIS_DEBUG
- EIP197_HIA_DFE_THR
- EIP197_HIA_DFE_THR_BASE
- EIP197_HIA_DFE_THR_CTRL
- EIP197_HIA_DFE_THR_STAT
- EIP197_HIA_DSE
- EIP197_HIA_DSE_BASE
- EIP197_HIA_DSE_CFG
- EIP197_HIA_DSE_CFG_ALWAYS_BUFFERABLE
- EIP197_HIA_DSE_CFG_DIS_DEBUG
- EIP197_HIA_DSE_CFG_EN_SINGLE_WR
- EIP197_HIA_DSE_THR
- EIP197_HIA_DSE_THR_BASE
- EIP197_HIA_DSE_THR_CTRL
- EIP197_HIA_DSE_THR_STAT
- EIP197_HIA_DxE_CFG_CTRL_CACHE_CTRL
- EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL
- EIP197_HIA_DxE_CFG_MAX_CTRL_SIZE
- EIP197_HIA_DxE_CFG_MAX_DATA_SIZE
- EIP197_HIA_DxE_CFG_MIN_CTRL_SIZE
- EIP197_HIA_DxE_CFG_MIN_DATA_SIZE
- EIP197_HIA_GEN_CFG
- EIP197_HIA_GEN_CFG_BASE
- EIP197_HIA_MST_CTRL
- EIP197_HIA_OPTIONS
- EIP197_HIA_RA_PE_CTRL
- EIP197_HIA_RA_PE_CTRL_EN
- EIP197_HIA_RA_PE_CTRL_RESET
- EIP197_HIA_RA_PE_STAT
- EIP197_HIA_RDR
- EIP197_HIA_RDR_THRESH_PKT_MODE
- EIP197_HIA_RDR_THRESH_PROC_PKT
- EIP197_HIA_RDR_THRESH_TIMEOUT
- EIP197_HIA_VERSION
- EIP197_HIA_VERSION_BE
- EIP197_HIA_VERSION_LE
- EIP197_HIA_xDR_CFG
- EIP197_HIA_xDR_CFG_RD_CACHE
- EIP197_HIA_xDR_CFG_WR_CACHE
- EIP197_HIA_xDR_DESC_SIZE
- EIP197_HIA_xDR_DMA_CFG
- EIP197_HIA_xDR_OFF
- EIP197_HIA_xDR_PREP_COUNT
- EIP197_HIA_xDR_PREP_PNTR
- EIP197_HIA_xDR_PROC_COUNT
- EIP197_HIA_xDR_PROC_PNTR
- EIP197_HIA_xDR_RING_BASE_ADDR_HI
- EIP197_HIA_xDR_RING_BASE_ADDR_LO
- EIP197_HIA_xDR_RING_SIZE
- EIP197_HIA_xDR_STAT
- EIP197_HIA_xDR_THRESH
- EIP197_HIA_xDR_WR_CTRL_BUF
- EIP197_HIA_xDR_WR_OWN_BUF
- EIP197_HIA_xDR_WR_RES_BUF
- EIP197_HWDATAW_MASK
- EIP197_HWDATAW_OFFSET
- EIP197_IRQ_NUMBER
- EIP197_MAX_BATCH_SZ
- EIP197_MAX_RINGS
- EIP197_MAX_TOKENS
- EIP197_MST_CTRL
- EIP197_MST_CTRL_BYTE_SWAP
- EIP197_MST_CTRL_BYTE_SWAP_BITS
- EIP197_MST_CTRL_NO_BYTE_SWAP
- EIP197_MST_CTRL_RD_CACHE
- EIP197_MST_CTRL_TX_MAX_CMD
- EIP197_MST_CTRL_WD_CACHE
- EIP197_NUM_OF_SCRATCH_BLOCKS
- EIP197_N_PES_MASK
- EIP197_N_PES_OFFSET
- EIP197_OPTION_2_TOKEN_IV_CMD
- EIP197_OPTION_4_TOKEN_IV_CMD
- EIP197_OPTION_64BIT_CTX
- EIP197_OPTION_CTX_CTRL_IN_CMD
- EIP197_OPTION_MAGIC_VALUE
- EIP197_OPTION_RC_AUTO
- EIP197_PE
- EIP197_PE_BASE
- EIP197_PE_EIP96_CONTEXT_CTRL
- EIP197_PE_EIP96_CONTEXT_STAT
- EIP197_PE_EIP96_FUNCTION2_EN
- EIP197_PE_EIP96_FUNCTION_EN
- EIP197_PE_EIP96_OPTIONS
- EIP197_PE_EIP96_TOKEN_CTRL
- EIP197_PE_EIP96_TOKEN_CTRL_CTX_UPDATES
- EIP197_PE_EIP96_TOKEN_CTRL_ENABLE_TIMEOUT
- EIP197_PE_EIP96_TOKEN_CTRL_NO_TOKEN_WAIT
- EIP197_PE_EIP96_VERSION
- EIP197_PE_ICE_FPP_CTRL
- EIP197_PE_ICE_PPTF_CTRL
- EIP197_PE_ICE_PUE_CTRL
- EIP197_PE_ICE_PUTF_CTRL
- EIP197_PE_ICE_RAM_CTRL
- EIP197_PE_ICE_RAM_CTRL_FPP_PROG_EN
- EIP197_PE_ICE_RAM_CTRL_PUE_PROG_EN
- EIP197_PE_ICE_SCRATCH_CTRL
- EIP197_PE_ICE_SCRATCH_CTRL_CHANGE_ACCESS
- EIP197_PE_ICE_SCRATCH_CTRL_CHANGE_TIMER
- EIP197_PE_ICE_SCRATCH_CTRL_SCRATCH_ACCESS
- EIP197_PE_ICE_SCRATCH_CTRL_TIMER_EN
- EIP197_PE_ICE_SCRATCH_RAM
- EIP197_PE_ICE_UENG_DEBUG_RESET
- EIP197_PE_ICE_UENG_INIT_ALIGN_MASK
- EIP197_PE_ICE_UENG_START_OFFSET
- EIP197_PE_ICE_x_CTRL_CLR_ECC_CORR
- EIP197_PE_ICE_x_CTRL_CLR_ECC_NON_CORR
- EIP197_PE_ICE_x_CTRL_SW_RESET
- EIP197_PE_IN_DBUF_THRES
- EIP197_PE_IN_TBUF_THRES
- EIP197_PE_IN_xBUF_THRES_MAX
- EIP197_PE_IN_xBUF_THRES_MIN
- EIP197_PE_OUT_DBUF_THRES
- EIP197_PE_OUT_DBUF_THRES_MAX
- EIP197_PE_OUT_DBUF_THRES_MIN
- EIP197_PE_OUT_TBUF_THRES
- EIP197_RC_NULL
- EIP197_RD64_FETCH_SIZE
- EIP197_RDR_IRQ
- EIP197_REG_HI16
- EIP197_REG_LO16
- EIP197_REQUEST_ON_STACK
- EIP197_RFSIZE_ADJUST
- EIP197_RFSIZE_MASK
- EIP197_RFSIZE_OFFSET
- EIP197_SKCIPHER_REQ_SIZE
- EIP197_TOKEN_CTX_OFFSET
- EIP197_TOKEN_DIRECTION_EXTERNAL
- EIP197_TOKEN_EXEC_IF_SUCCESSFUL
- EIP197_TOKEN_HASH_RESULT_VERIFY
- EIP197_TOKEN_INS_INSERT_HASH_DIGEST
- EIP197_TOKEN_INS_LAST
- EIP197_TOKEN_INS_ORIGIN_IV0
- EIP197_TOKEN_INS_ORIGIN_LEN
- EIP197_TOKEN_INS_ORIGIN_TOKEN
- EIP197_TOKEN_INS_TYPE_CRYPTO
- EIP197_TOKEN_INS_TYPE_HASH
- EIP197_TOKEN_INS_TYPE_OUTPUT
- EIP197_TOKEN_OPCODE_BYPASS
- EIP197_TOKEN_OPCODE_CTX_ACCESS
- EIP197_TOKEN_OPCODE_DIRECTION
- EIP197_TOKEN_OPCODE_INSERT
- EIP197_TOKEN_OPCODE_INSERT_REMRES
- EIP197_TOKEN_OPCODE_NOOP
- EIP197_TOKEN_OPCODE_RETRIEVE
- EIP197_TOKEN_OPCODE_VERIFY
- EIP197_TOKEN_STAT_LAST_HASH
- EIP197_TOKEN_STAT_LAST_PACKET
- EIP197_TRC_CACHE
- EIP197_TRC_CTRL
- EIP197_TRC_ECCADMINSTAT
- EIP197_TRC_ECCCTRL
- EIP197_TRC_ECCDATA
- EIP197_TRC_ECCDATASTAT
- EIP197_TRC_ECCSTAT
- EIP197_TRC_ENABLE_0
- EIP197_TRC_ENABLE_1
- EIP197_TRC_ENABLE_2
- EIP197_TRC_ENABLE_MASK
- EIP197_TRC_FREECHAIN
- EIP197_TRC_FREECHAIN_HEAD_PTR
- EIP197_TRC_FREECHAIN_TAIL_PTR
- EIP197_TRC_LASTRES
- EIP197_TRC_PARAMS
- EIP197_TRC_PARAMS2
- EIP197_TRC_PARAMS2_HTABLE_PTR
- EIP197_TRC_PARAMS2_RC_SZ_SMALL
- EIP197_TRC_PARAMS_BLK_TIMER_SPEED
- EIP197_TRC_PARAMS_DATA_ACCESS
- EIP197_TRC_PARAMS_HTABLE_SZ
- EIP197_TRC_PARAMS_RC_SZ_LARGE
- EIP197_TRC_PARAMS_SW_RESET
- EIP197_TRC_REGINDEX
- EIP197_TYPE_EXTENDED
- EIP197_VERSION
- EIP197_VERSION_LE
- EIP197_VERSION_MASK
- EIP197_VERSION_SWAP
- EIP197_XCM_MODE_CCM
- EIP197_XCM_MODE_GCM
- EIP197_XLX_GPIO_BASE
- EIP197_XLX_IRQ_BLOCK_ID_ADDR
- EIP197_XLX_IRQ_BLOCK_ID_VALUE
- EIP197_XLX_USER_INT_BLOCK
- EIP197_XLX_USER_INT_ENB_CLEAR
- EIP197_XLX_USER_INT_ENB_MSK
- EIP197_XLX_USER_INT_ENB_SET
- EIP197_XLX_USER_INT_PEND
- EIP197_XLX_USER_VECT_LUT0_ADDR
- EIP197_XLX_USER_VECT_LUT0_IDENT
- EIP197_XLX_USER_VECT_LUT1_ADDR
- EIP197_XLX_USER_VECT_LUT1_IDENT
- EIP197_XLX_USER_VECT_LUT2_ADDR
- EIP197_XLX_USER_VECT_LUT2_IDENT
- EIP197_XLX_USER_VECT_LUT3_ADDR
- EIP197_XLX_USER_VECT_LUT3_IDENT
- EIP197_xDR_DESC_MODE_64BIT
- EIP197_xDR_DMA_ERR
- EIP197_xDR_ERR
- EIP197_xDR_PREP_CLR_COUNT
- EIP197_xDR_PREP_CMD_THRES
- EIP197_xDR_PROC_CLR_COUNT
- EIP197_xDR_PROC_xD_COUNT
- EIP197_xDR_PROC_xD_PKT
- EIP197_xDR_PROC_xD_PKT_MASK
- EIP197_xDR_PROC_xD_PKT_OFFSET
- EIP197_xDR_THRESH
- EIP197_xDR_TIMEOUT
- EIP76_RNG_OUTPUT_SIZE
- EIP96_VERSION_LE
- EIP97IES_MRVL
- EIP97_CFSIZE_MASK
- EIP97_CFSIZE_OFFSET
- EIP97_CLOCK_STATE
- EIP97_FORCE_CLOCK_OFF
- EIP97_FORCE_CLOCK_ON
- EIP97_GLOBAL_BASE
- EIP97_HIA_AIC_BASE
- EIP97_HIA_AIC_G_BASE
- EIP97_HIA_AIC_R_BASE
- EIP97_HIA_AIC_xDR_BASE
- EIP97_HIA_DFE_BASE
- EIP97_HIA_DFE_THR_BASE
- EIP97_HIA_DSE_BASE
- EIP97_HIA_DSE_THR_BASE
- EIP97_HIA_GEN_CFG_BASE
- EIP97_HWDATAW_MASK
- EIP97_MST_CTRL
- EIP97_N_PES_MASK
- EIP97_OPTIONS
- EIP97_PE_BASE
- EIP97_RFSIZE_MASK
- EIP97_RFSIZE_OFFSET
- EIP97_VERSION
- EIP97_VERSION_LE
- EIR
- EIRAWREQSTA
- EIREQCLR
- EIREQSTA
- EIRP_MAX_TX_POWER_LIMIT
- EIRQ1
- EIRQ7
- EIRQ_REG
- EIR_APPEARANCE
- EIR_BKT_SIZE_MASK
- EIR_CLASS_OF_DEV
- EIR_DEVICE_ID
- EIR_DMAIF
- EIR_FLAGS
- EIR_LE_BDADDR
- EIR_LE_ROLE
- EIR_LE_SC_CONFIRM
- EIR_LE_SC_RANDOM
- EIR_LINKIF
- EIR_NAME_COMPLETE
- EIR_NAME_SHORT
- EIR_PKTIF
- EIR_REF_CNT_MASK
- EIR_RXERIF
- EIR_SSP_HASH_C192
- EIR_SSP_HASH_C256
- EIR_SSP_RAND_R192
- EIR_SSP_RAND_R256
- EIR_TK_BKT_MASK
- EIR_TXERIF
- EIR_TXIF
- EIR_TX_POWER
- EIR_UUID128_ALL
- EIR_UUID128_SOME
- EIR_UUID16_ALL
- EIR_UUID16_SOME
- EIR_UUID32_ALL
- EIR_UUID32_SOME
- EIS
- EISA
- EISAAdapter
- EISA_ALLOWED_IRQ_LIST
- EISA_APROM
- EISA_CONFIG_ENABLED
- EISA_CONFIG_FORCED
- EISA_CONFIG_OFFSET
- EISA_CR
- EISA_DBG
- EISA_DEFAULT_IO_BASE
- EISA_DEVICE_MODALIAS_FMT
- EISA_DEVINFO
- EISA_DMA1_STATUS
- EISA_DMA2_STATUS
- EISA_DMA2_WRITE_SINGLE
- EISA_EEPROM_MINOR
- EISA_ELCR
- EISA_EXT_NMI_RESET_CTRL
- EISA_FEPROM0
- EISA_FEPROM1
- EISA_FORCE_PROBE_DEFAULT
- EISA_HAE
- EISA_ID
- EISA_ID0
- EISA_ID1
- EISA_ID2
- EISA_ID3
- EISA_ID_SIG
- EISA_IN
- EISA_INFOS
- EISA_INT1_CTRL
- EISA_INT1_EDGE_LEVEL
- EISA_INT1_MASK
- EISA_INT2_CTRL
- EISA_INT2_EDGE_LEVEL
- EISA_INT2_MASK
- EISA_INTA
- EISA_IO
- EISA_MAX_FORCED_DEV
- EISA_MAX_IRQ
- EISA_MAX_RESOURCES
- EISA_MAX_SLOTS
- EISA_MEM
- EISA_OUT
- EISA_REG0
- EISA_REG1
- EISA_REG2
- EISA_REG3
- EISA_SIG_LEN
- EISA_SPARE
- EISA_SYSCTL
- EISA_VENDOR_ID_OFFSET
- EISA_VL82C106
- EISA_bus
- EISA_signature
- EISCONN
- EISDIR
- EISIR
- EISNAM
- EISRCSEL
- EISR_RXBUFOFLO
- EISR_RXMEMERR
- EISR_RXOFLO
- EISR_RXPARERR
- EISR_RXTHRESHINT
- EISR_RXTIMERINT
- EISR_TXBUFUFLO
- EISR_TXCOLLWRAP
- EISR_TXDEFERWRAP
- EISR_TXEMPTY
- EISR_TXEXDEF
- EISR_TXEXPLICIT
- EISR_TXGIANT
- EISR_TXLCOL
- EISR_TXMEMERR
- EISR_TXPARERR
- EISR_TXRTRY
- EIS_BIT
- EIS_CLLF0
- EIS_CLLF1
- EIS_CULF0
- EIS_CULF1
- EIS_MREF
- EIS_MTEF
- EIS_QEF
- EIS_QFS
- EIS_RESERVED
- EIS_SEF
- EIS_TFFF
- EITHER
- EITHER_MIC_MASK
- EITR_INTS_PER_SEC_TO_REG
- EITR_REG_TO_INTS_PER_SEC
- EIU_INTRPT_ACK
- EIU_MODE_REG
- EIU_PREMPT_REG
- EIU_QUIET_REG
- EIU_STAT_REG
- EIWCOMMIT
- EI_CLASS
- EI_DATA
- EI_ETYPE_ERRNO
- EI_ETYPE_ERRNO_NULL
- EI_ETYPE_NONE
- EI_ETYPE_NULL
- EI_ETYPE_TRUE
- EI_MAG0
- EI_MAG1
- EI_MAG2
- EI_MAG3
- EI_MAGIC
- EI_NIDENT
- EI_OSABI
- EI_PAD
- EI_SHIFT
- EI_VERSION
- EJECT
- EJECT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
- EJECT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT
- EJECT_CMPL_ERRORS_BUFFER_ERROR_FLUSH
- EJECT_CMPL_ERRORS_BUFFER_ERROR_LAST
- EJECT_CMPL_ERRORS_BUFFER_ERROR_MASK
- EJECT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER
- EJECT_CMPL_ERRORS_BUFFER_ERROR_SFT
- EJECT_CMPL_ERRORS_MASK
- EJECT_CMPL_ERRORS_SFT
- EJECT_CMPL_FLAGS_ERROR
- EJECT_CMPL_FLAGS_MASK
- EJECT_CMPL_FLAGS_SFT
- EJECT_CMPL_TYPE_LAST
- EJECT_CMPL_TYPE_MASK
- EJECT_CMPL_TYPE_SFT
- EJECT_CMPL_TYPE_STAT_EJECT
- EJECT_CMPL_V
- EJUKEBOX
- EK
- EKEYEXPIRED
- EKEYREJECTED
- EKEYREVOKED
- EKTF2127_CALIB_DONE
- EKTF2127_ENV_NOISY
- EKTF2127_HEIGHT
- EKTF2127_HELLO
- EKTF2127_MAX_TOUCHES
- EKTF2127_NOISE
- EKTF2127_REPORT
- EKTF2127_REQUEST
- EKTF2127_RESPONSE
- EKTF2127_TOUCH_REPORT_SIZE
- EKTF2127_WIDTH
- EL2HLT
- EL2NSYNC
- EL3HLT
- EL3RST
- EL3WINDOW
- EL3_CMD
- EL3_DATA
- EL3_EISA
- EL3_IO_EXTENT
- EL3_ISA
- EL3_MAX_CARDS
- EL3_PNP
- EL3_STATUS
- EL3_TIMER
- ELANTECH_INFO_ATTR
- ELANTECH_INT_ATTR
- ELANTECH_SMBUS_NOT_SET
- ELANTECH_SMBUS_OFF
- ELANTECH_SMBUS_ON
- ELANTS_VERSION_ATTR
- ELAN_CALI_TIMEOUT_MSEC
- ELAN_FEATURE_REPORT
- ELAN_FEATURE_SIZE
- ELAN_FINGER_DATA_LEN
- ELAN_FW_PAGESIZE
- ELAN_HAS_LED
- ELAN_I2C_REPORT_SIZE
- ELAN_IAP_OPERATIONAL
- ELAN_IAP_RECOVERY
- ELAN_INPUT_REPORT_SIZE
- ELAN_LED_REPORT_SIZE
- ELAN_MAX_FINGERS
- ELAN_MAX_PRESSURE
- ELAN_MT_FIRST_FINGER
- ELAN_MT_I2C
- ELAN_MT_SECOND_FINGER
- ELAN_MUTE_LED_REPORT
- ELAN_PARAM_MAX_X
- ELAN_PARAM_MAX_Y
- ELAN_PARAM_RES
- ELAN_POWERON_DELAY_USEC
- ELAN_RESET_DELAY_MSEC
- ELAN_SINGLE_FINGER
- ELAN_STATE_NORMAL
- ELAN_TP_I2C_ADDR
- ELAN_TP_USB_INTF
- ELAN_TS_RESOLUTION
- ELAN_VENDOR_ID
- ELAN_WAIT_QUEUE_HEADER
- ELAN_WAIT_RECALIBRATION
- ELAPSEDTIME_INT
- ELAPSEDTIME_IRQ
- ELAPSED_CYCLES_DDR
- ELAPSED_CYCLES_OCMEM
- ELB_1PC_EN_REG
- ELB_CLK_CFG_REG
- ELCOM_PRODUCT_ID
- ELCOM_PRODUCT_ID_UCSGT
- ELCOM_VENDOR_ID
- ELCR_trigger
- ELD
- ELD_1
- ELD_FIXED_BYTES
- ELD_MAX_MNL
- ELD_MAX_SAD
- ELD_MAX_SIZE
- ELD_VER_CEA_861D
- ELD_VER_PARTIAL
- ELE0_RELEASE_THRESHOLD_ADDR
- ELE0_TOUCH_THRESHOLD_ADDR
- ELECTRODE_CONF_ADDR
- ELECTRODE_CONF_QUICK_CHARGE
- ELEKTOR_FT323R_PID
- ELEKTOR_VID
- ELEMENT_CONDITIONAL
- ELEMENT_EXPLICIT
- ELEMENT_ID
- ELEMENT_IMPLICIT
- ELEMENT_NOT_VALID
- ELEMENT_RENDERED
- ELEMENT_SIZE_IN_32B
- ELEMENT_SKIPPABLE
- ELEMENT_TAG_SPECIFIED
- ELEMENT_TYPE_CAP_MASK_PARA_VPORT_TC
- ELEMENT_TYPE_CAP_MASK_TASR
- ELEMENT_TYPE_CAP_MASK_VPORT
- ELEMENT_TYPE_CAP_MASK_VPORT_TC
- ELEMS_PER_PAGE
- ELEM_CNT
- ELERR_LEN
- ELERR_POS
- ELEVATOR_BACK_MERGE
- ELEVATOR_DISCARD_MERGE
- ELEVATOR_FRONT_MERGE
- ELEVATOR_F_ZBD_SEQ_WRITE
- ELEVATOR_INSERT_BACK
- ELEVATOR_INSERT_FLUSH
- ELEVATOR_INSERT_FRONT
- ELEVATOR_INSERT_REQUEUE
- ELEVATOR_INSERT_SORT
- ELEVATOR_INSERT_SORT_MERGE
- ELEVATOR_NO_MERGE
- ELE_TOUCH_STATUS_0_ADDR
- ELE_TOUCH_STATUS_1_ADDR
- ELF
- ELF32_FDPIC_LOADMAP_VERSION
- ELF32_R_SYM
- ELF32_R_TYPE
- ELF32_ST_BIND
- ELF32_ST_TYPE
- ELF32_ST_VISIBILITY
- ELF64_MIPS_R_SYM
- ELF64_MIPS_R_TYPE
- ELF64_R_SYM
- ELF64_R_TYPE
- ELF64_ST_BIND
- ELF64_ST_TYPE
- ELF64_ST_VISIBILITY
- ELFCLASS32
- ELFCLASS64
- ELFCLASSNONE
- ELFCLASSNUM
- ELFCORE_ADDR_ERR
- ELFCORE_ADDR_MAX
- ELFDATA2LSB
- ELFDATA2MSB
- ELFDATANONE
- ELFMAG
- ELFMAG0
- ELFMAG1
- ELFMAG2
- ELFMAG3
- ELFNOTE
- ELFNOTE32
- ELFNOTE64
- ELFNOTE_END
- ELFNOTE_START
- ELFOSABI_ARM_FDPIC
- ELFOSABI_LINUX
- ELFOSABI_NONE
- ELF_ARCH
- ELF_ARCV2REG
- ELF_AR_BSPSTORE_OFFSET
- ELF_AR_BSP_OFFSET
- ELF_AR_CCV_OFFSET
- ELF_AR_CSD_OFFSET
- ELF_AR_EC_OFFSET
- ELF_AR_END_OFFSET
- ELF_AR_FPSR_OFFSET
- ELF_AR_LC_OFFSET
- ELF_AR_PFS_OFFSET
- ELF_AR_RNAT_OFFSET
- ELF_AR_RSC_OFFSET
- ELF_AR_SSD_OFFSET
- ELF_AR_UNAT_OFFSET
- ELF_BASE_PLATFORM
- ELF_BITS
- ELF_BITS_XFORM
- ELF_BITS_XFORM2
- ELF_BR_0_OFFSET
- ELF_BR_OFFSET
- ELF_CFM_OFFSET
- ELF_CLASS
- ELF_CORE_COPY_FPREGS
- ELF_CORE_COPY_KERNEL_REGS
- ELF_CORE_COPY_REGS
- ELF_CORE_COPY_REGS_COMMON
- ELF_CORE_COPY_TASK_REGS
- ELF_CORE_EFLAGS
- ELF_CORE_HEADER_ALIGN
- ELF_CR_IIP_OFFSET
- ELF_CR_IPSR_OFFSET
- ELF_C_READ_MMAP
- ELF_DATA
- ELF_ET_DYN_BASE
- ELF_EXEC_PAGESIZE
- ELF_FDPIC_CORE_EFLAGS
- ELF_FDPIC_FLAG_ARRANGEMENT
- ELF_FDPIC_FLAG_CONSTDISP
- ELF_FDPIC_FLAG_CONTIGUOUS
- ELF_FDPIC_FLAG_EXECUTABLE
- ELF_FDPIC_FLAG_EXEC_STACK
- ELF_FDPIC_FLAG_HONOURVADDR
- ELF_FDPIC_FLAG_INDEPENDENT
- ELF_FDPIC_FLAG_NOEXEC_STACK
- ELF_FDPIC_FLAG_PRESENT
- ELF_FDPIC_PLAT_INIT
- ELF_FPREGSET_T
- ELF_FP_OFFSET
- ELF_GREGSET_T
- ELF_GREG_T
- ELF_GREG_TYPE
- ELF_GR_0_OFFSET
- ELF_GR_OFFSET
- ELF_HWCAP
- ELF_HWCAP2
- ELF_MACHINE
- ELF_MACHINE_NAME
- ELF_MIN_ALIGN
- ELF_MIPS_R_SYM
- ELF_MIPS_R_TYPE
- ELF_NAT_OFFSET
- ELF_NEBB
- ELF_NEVRREG
- ELF_NFPREG
- ELF_NGREG
- ELF_NPKEY
- ELF_NPMU
- ELF_NTMSPRREG
- ELF_NVMX
- ELF_NVRREG
- ELF_NVRREG32
- ELF_NVSRHALFREG
- ELF_NVSX
- ELF_OSABI
- ELF_PAGEALIGN
- ELF_PAGEOFFSET
- ELF_PAGESTART
- ELF_PLATFORM
- ELF_PLATFORM_SIZE
- ELF_PLAT_INIT
- ELF_PRARGSZ
- ELF_PR_OFFSET
- ELF_RISCV_R_SYM
- ELF_RISCV_R_TYPE
- ELF_R_INFO
- ELF_R_SYM
- ELF_R_TYPE
- ELF_STUB_DIRECT
- ELF_STUB_GOT
- ELF_STUB_MILLI
- ELF_ST_BIND
- ELF_ST_TYPE
- ELF_ST_VIS
- ELF_ST_VISIBILITY
- ELGATO_EYETV_DTT_USB_PID
- ELGATO_EYETV_DTT_USB_VID
- ELI10_ID_PACKET
- ELIBACC
- ELIBBAD
- ELIBEXEC
- ELIBMAX
- ELIBSCN
- ELINEAR
- ELINKCONG
- ELIXIR
- ELK_STOLEN_RESERVED
- ELMER0_GP_BIT0
- ELMER0_GP_BIT1
- ELMER0_GP_BIT10
- ELMER0_GP_BIT11
- ELMER0_GP_BIT12
- ELMER0_GP_BIT13
- ELMER0_GP_BIT14
- ELMER0_GP_BIT15
- ELMER0_GP_BIT16
- ELMER0_GP_BIT17
- ELMER0_GP_BIT18
- ELMER0_GP_BIT19
- ELMER0_GP_BIT2
- ELMER0_GP_BIT3
- ELMER0_GP_BIT4
- ELMER0_GP_BIT5
- ELMER0_GP_BIT6
- ELMER0_GP_BIT7
- ELMER0_GP_BIT8
- ELMER0_GP_BIT9
- ELMER0_XC2S100E_6TQ144_C
- ELMER0_XC2S300E_6FT256_C
- ELM_ECC_SIZE
- ELM_ERROR_LOCATION_0
- ELM_IRQENABLE
- ELM_IRQSTATUS
- ELM_LOCATION_CONFIG
- ELM_LOCATION_STATUS
- ELM_PAGE_CTRL
- ELM_SYNDROME_FRAGMENT_0
- ELM_SYNDROME_FRAGMENT_1
- ELM_SYNDROME_FRAGMENT_2
- ELM_SYNDROME_FRAGMENT_3
- ELM_SYNDROME_FRAGMENT_4
- ELM_SYNDROME_FRAGMENT_5
- ELM_SYNDROME_FRAGMENT_6
- ELM_SYNDROME_VALID
- ELM_SYSCONFIG
- ELNRNG
- ELO10_ACK_PACKET
- ELO10_ID_CMD
- ELO10_LEAD_BYTE
- ELO10_PACKET_LEN
- ELO10_PRESSURE
- ELO10_TOUCH
- ELO10_TOUCH_PACKET
- ELOG_ENTRY_ADDR
- ELOG_ENTRY_DATA
- ELOG_ENTRY_LEN
- ELOG_ENTRY_VALID
- ELOG_IDX
- ELOOP
- ELO_DIAG
- ELO_FLUSH_SMARTSET_RESPONSES
- ELO_GET_SMARTSET_RESPONSE
- ELO_MAX_LENGTH
- ELO_PERIODIC_READ_INTERVAL
- ELO_SEND_SMARTSET_COMMAND
- ELO_SMARTSET_CMD_TIMEOUT
- ELO_SMARTSET_PACKET_SIZE
- ELPCTRL_SLEEP
- ELPCTRL_WAKE_UP
- ELPCTRL_WAKE_UP_WLAN_READY
- ELPCTRL_WLAN_READY
- ELPIDA
- ELP_CFG_MODE
- ELP_CMD
- ELP_ENTRY_DELAY
- ELROY_HVERS
- ELSA_IRQ_ADDR
- ELSA_IRQ_MASK
- ELSA_PID_A_PREFIRM
- ELSA_PID_A_PSTFIRM
- ELSA_PID_B_PREFIRM
- ELSA_PID_B_PSTFIRM
- ELSA_PID_PREFIRM
- ELSA_PID_PSTFIRM
- ELSA_VID
- ELS_ABTX
- ELS_ADDR_FMT_AREA
- ELS_ADDR_FMT_DOM
- ELS_ADDR_FMT_FAB
- ELS_ADDR_FMT_PORT
- ELS_ADISC
- ELS_ADVC
- ELS_AUTH_ELS
- ELS_CLID_E_PORT
- ELS_CLID_FRU
- ELS_CLID_IC_BER
- ELS_CLID_IC_IMPL
- ELS_CLID_IC_INVAL
- ELS_CLID_IC_LIP
- ELS_CLID_IC_LOOP_TO
- ELS_CLID_IC_LOS
- ELS_CLID_IC_NOS
- ELS_CLID_IC_PST
- ELS_CLID_LASER
- ELS_CLID_SEV_DEG
- ELS_CLID_SEV_INFO
- ELS_CLID_SEV_INOP
- ELS_CLID_SEV_MASK
- ELS_CLID_SWITCH
- ELS_CLIR_TS_CSU
- ELS_CLIR_TS_SEC_FRAC
- ELS_CLIR_TS_UNKNOWN
- ELS_CMD_ABTX
- ELS_CMD_ACC
- ELS_CMD_ADISC
- ELS_CMD_ADVC
- ELS_CMD_ECHO
- ELS_CMD_ESTC
- ELS_CMD_ESTS
- ELS_CMD_FAN
- ELS_CMD_FARP
- ELS_CMD_FARPR
- ELS_CMD_FDISC
- ELS_CMD_FLOGI
- ELS_CMD_FPIN
- ELS_CMD_LCB
- ELS_CMD_LIRR
- ELS_CMD_LOGO
- ELS_CMD_LS_RJT
- ELS_CMD_MASK
- ELS_CMD_NVMEPRLI
- ELS_CMD_PDISC
- ELS_CMD_PLOGI
- ELS_CMD_PRLI
- ELS_CMD_PRLO
- ELS_CMD_PRLO_ACC
- ELS_CMD_RCS
- ELS_CMD_RDP
- ELS_CMD_REC
- ELS_CMD_RES
- ELS_CMD_RLS
- ELS_CMD_RNID
- ELS_CMD_RPL
- ELS_CMD_RPS
- ELS_CMD_RRQ
- ELS_CMD_RSCN
- ELS_CMD_RSCN_XMT
- ELS_CMD_RSI
- ELS_CMD_RSS
- ELS_CMD_RTV
- ELS_CMD_SCR
- ELS_CMD_TEST
- ELS_COMMAND_FIP
- ELS_COMMAND_NON_FIP
- ELS_CSR
- ELS_CSU
- ELS_DCMD_LOGO
- ELS_DCMD_PLOGI
- ELS_DCMD_TIMEOUT
- ELS_ECHO
- ELS_ESTC
- ELS_ESTS
- ELS_EVFP
- ELS_EV_QUAL_NONE
- ELS_EV_QUAL_NS_OBJ
- ELS_EV_QUAL_PORT_ATTR
- ELS_EV_QUAL_REM_OBJ
- ELS_EV_QUAL_SERV_OBJ
- ELS_EV_QUAL_SW_CONFIG
- ELS_EXPL_AH
- ELS_EXPL_AH_REQ
- ELS_EXPL_INPROG
- ELS_EXPL_INSUF_RES
- ELS_EXPL_INV_LEN
- ELS_EXPL_NONE
- ELS_EXPL_NOT_NEIGHBOR
- ELS_EXPL_OXID_RXID
- ELS_EXPL_PLOGI_REQD
- ELS_EXPL_SID
- ELS_EXPL_SPP_ICTL_ERR
- ELS_EXPL_SPP_OPT_ERR
- ELS_EXPL_UNAB_DATA
- ELS_EXPL_UNSUPR
- ELS_FACT
- ELS_FAN
- ELS_FARP_REPL
- ELS_FARP_REQ
- ELS_FDACDT
- ELS_FDISC
- ELS_FLOGI
- ELS_FN_DTAG_CONGESTION
- ELS_FN_DTAG_LNK_INTEGRITY
- ELS_FN_DTAG_PEER_CONGEST
- ELS_FPIN
- ELS_GAID
- ELS_IOCB_TYPE
- ELS_LCLM
- ELS_LINIT
- ELS_LIRR
- ELS_LIRR_CLEAR
- ELS_LIRR_SET_COND
- ELS_LIRR_SET_UNCOND
- ELS_LKA
- ELS_LOGO
- ELS_LSTS
- ELS_LS_ACC
- ELS_LS_RJT
- ELS_NACT
- ELS_NDACT
- ELS_OPCODE_BYTE
- ELS_PDISC
- ELS_PKT
- ELS_PLOGI
- ELS_PRLI
- ELS_PRLO
- ELS_QOSR
- ELS_QSA
- ELS_RCS
- ELS_REC
- ELS_REQUEST
- ELS_REQUEST64
- ELS_RES
- ELS_RJT_BUSY
- ELS_RJT_FIP
- ELS_RJT_INPROG
- ELS_RJT_INVAL
- ELS_RJT_LOGIC
- ELS_RJT_NONE
- ELS_RJT_PROT
- ELS_RJT_UNAB
- ELS_RJT_UNSUP
- ELS_RJT_VENDOR
- ELS_RLIR
- ELS_RLS
- ELS_RNC
- ELS_RNFT
- ELS_RNID
- ELS_RNIDA_ACCESS
- ELS_RNIDA_BRIDGE
- ELS_RNIDA_CONV
- ELS_RNIDA_GATEWAY
- ELS_RNIDA_HBA
- ELS_RNIDA_HOST
- ELS_RNIDA_HUB
- ELS_RNIDA_MF
- ELS_RNIDA_MF_ACC
- ELS_RNIDA_MF_BR
- ELS_RNIDA_MF_GW
- ELS_RNIDA_MF_HOST
- ELS_RNIDA_MF_HUB
- ELS_RNIDA_MF_NAS
- ELS_RNIDA_MF_ST
- ELS_RNIDA_MF_SUB
- ELS_RNIDA_MF_SW
- ELS_RNIDA_MF_VIRT
- ELS_RNIDA_MF_WDM
- ELS_RNIDA_NAS
- ELS_RNIDA_OTHER
- ELS_RNIDA_PROXY
- ELS_RNIDA_STORAGE
- ELS_RNIDA_SUBSYS
- ELS_RNIDA_SWITCH
- ELS_RNIDA_UNK
- ELS_RNIDA_VIRT
- ELS_RNIDF_GEN
- ELS_RNIDF_NONE
- ELS_RNIDIP_NONE
- ELS_RNIDIP_V4
- ELS_RNIDIP_V6
- ELS_RNIDM_HTTP
- ELS_RNIDM_HTTPS
- ELS_RNIDM_SNMP
- ELS_RNIDM_TELNET
- ELS_RNIDM_XML
- ELS_RPBC
- ELS_RPL
- ELS_RPS
- ELS_RPSC
- ELS_RRQ
- ELS_RSCN
- ELS_RSCN_ADDR_FMT_BIT
- ELS_RSCN_ADDR_FMT_MASK
- ELS_RSCN_EV_QUAL_BIT
- ELS_RSCN_EV_QUAL_MASK
- ELS_RSI
- ELS_RSP_MASK
- ELS_RSS
- ELS_RTV
- ELS_RVCS
- ELS_SBRP
- ELS_SCN
- ELS_SCR
- ELS_SCRF_CLEAR
- ELS_SCRF_FAB
- ELS_SCRF_FULL
- ELS_SCRF_NPORT
- ELS_SRL
- ELS_SRR
- ELS_TEST
- ELS_TPLS
- ELS_TPRLO
- ELS_XRI_ABORT_EVENT
- ELV_HASH_BITS
- ELV_NAME_MAX
- ELV_ON_HASH
- ELX_LOOPBACK_CMD
- ELX_LOOPBACK_DATA
- ELX_LOOPBACK_HEADER_SZ
- ELX_LOOPBACK_XRI_SETUP
- ELX_MODEL_NAME_SIZE
- ELX_VENDOR_ID
- EL_CLASS__GENERAL_NOTIFICATION
- EL_CLASS__HEADER
- EL_CLASS__PAL
- EL_CLASS__PCI_ERROR_FRAME
- EL_CLASS__REGATTA_FAMILY
- EL_CLASS__TERMINATION
- EL_CTRL_LOAD
- EL_FLAG
- EL_PRESENT
- EL_TYPE__HEADER__HALT_FRAME
- EL_TYPE__HEADER__LOGOUT_FRAME
- EL_TYPE__HEADER__SYSTEM_ERROR_FRAME
- EL_TYPE__HEADER__SYSTEM_EVENT_FRAME
- EL_TYPE__PAL__ENV__AIRMOVER_FAN
- EL_TYPE__PAL__ENV__AMBIENT_TEMPERATURE
- EL_TYPE__PAL__ENV__HOT_PLUG
- EL_TYPE__PAL__ENV__INTRUSION
- EL_TYPE__PAL__ENV__LAN
- EL_TYPE__PAL__ENV__POWER_SUPPLY
- EL_TYPE__PAL__ENV__VOLTAGE
- EL_TYPE__PAL__EV7_IO
- EL_TYPE__PAL__EV7_PROCESSOR
- EL_TYPE__PAL__EV7_RBOX
- EL_TYPE__PAL__EV7_ZBOX
- EL_TYPE__PAL__LOGOUT_FRAME
- EL_TYPE__REGATTA__ENVIRONMENTAL_FRAME
- EL_TYPE__REGATTA__PROCESSOR_DBL_ERROR_HALT
- EL_TYPE__REGATTA__PROCESSOR_ERROR_FRAME
- EL_TYPE__REGATTA__SYSTEM_DBL_ERROR_HALT
- EL_TYPE__REGATTA__SYSTEM_ERROR_FRAME
- EL_TYPE__REGATTA__TITAN_MEMORY_EXTENDED
- EL_TYPE__REGATTA__TITAN_PCHIP0_EXTENDED
- EL_TYPE__REGATTA__TITAN_PCHIP1_EXTENDED
- EL_TYPE__TERMINATION__TERMINATION
- EM
- EM202_ANTIPOP
- EM202_EAPD_GPIO_ACCESS
- EM202_EXT_MODEM_CTRL
- EM202_GPIO_CONF
- EM202_GPIO_MASK
- EM202_GPIO_POLARITY
- EM202_GPIO_STATUS
- EM202_GPIO_STICKY
- EM202_SPDIF_OUT_SEL
- EM25XX_FRMDATAHDR_BYTE1
- EM25XX_FRMDATAHDR_BYTE2_FRAME_END
- EM25XX_FRMDATAHDR_BYTE2_FRAME_ID
- EM25XX_FRMDATAHDR_BYTE2_MASK
- EM25XX_FRMDATAHDR_BYTE2_STILL_IMAGE
- EM2750_BOARD_DLCW_130
- EM2750_BOARD_UNKNOWN
- EM2765_BOARD_SPEEDLINK_VAD_LAPLACE
- EM2800_AUDIO_SRC_LINE
- EM2800_AUDIO_SRC_TUNER
- EM2800_BOARD_GRABBEEX_USB2800
- EM2800_BOARD_KWORLD_USB2800
- EM2800_BOARD_LEADTEK_WINFAST_USBII
- EM2800_BOARD_TERRATEC_CINERGY_200
- EM2800_BOARD_UNKNOWN
- EM2800_BOARD_VC211A
- EM2800_BOARD_VGEAR_POCKETTV
- EM2800_R08_AUDIOSRC
- EM28174_BOARD_HAUPPAUGE_WINTV_DUALHD_01595
- EM28174_BOARD_HAUPPAUGE_WINTV_DUALHD_DVB
- EM28174_BOARD_PCTV_290E
- EM28174_BOARD_PCTV_460E
- EM28178_BOARD_PCTV_292E
- EM28178_BOARD_PCTV_461E
- EM28178_BOARD_PLEX_PX_BCUD
- EM28178_BOARD_TERRATEC_T2_STICK_HD
- EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU
- EM2820_BOARD_DLINK_USB_TV
- EM2820_BOARD_GADMEI_TVR200
- EM2820_BOARD_GADMEI_UTV310
- EM2820_BOARD_HAUPPAUGE_WINTV_USB_2
- EM2820_BOARD_HERCULES_SMART_TV_USB2
- EM2820_BOARD_IODATA_GVMVP_SZ
- EM2820_BOARD_KWORLD_PVRTV2800RF
- EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE
- EM2820_BOARD_MSI_VOX_USB_2
- EM2820_BOARD_PINNACLE_DVC_90
- EM2820_BOARD_PINNACLE_USB_2
- EM2820_BOARD_PINNACLE_USB_2_FM1216ME
- EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2
- EM2820_BOARD_PROLINK_PLAYTV_USB2
- EM2820_BOARD_SILVERCREST_WEBCAM
- EM2820_BOARD_TERRATEC_CINERGY_250
- EM2820_BOARD_UNKNOWN
- EM2820_BOARD_VIDEOLOGY_20K14XUSB
- EM2820_CHIPCFG_I2S_1_SAMPRATE
- EM2820_CHIPCFG_I2S_3_SAMPRATES
- EM2820_R08_GPIO_CTRL
- EM2820_R09_GPIO_STATE
- EM2821_BOARD_SUPERCOMP_USB_2
- EM2821_BOARD_USBGEAR_VD204
- EM2860_BOARD_EASYCAP
- EM2860_BOARD_ELGATO_VIDEO_CAPTURE
- EM2860_BOARD_GADMEI_UTV330
- EM2860_BOARD_HT_VIDBOX_NW03
- EM2860_BOARD_KAIOMY_TVNPC_U2
- EM2860_BOARD_NETGMBH_CAM
- EM2860_BOARD_SAA711X_REFERENCE_DESIGN
- EM2860_BOARD_TERRATEC_AV350
- EM2860_BOARD_TERRATEC_GRABBY
- EM2860_BOARD_TERRATEC_HYBRID_XS
- EM2860_BOARD_TVP5150_REFERENCE_DESIGN
- EM2860_BOARD_TYPHOON_DVD_MAKER
- EM2860_CHIPCFG_I2S_3_SAMPRATES
- EM2860_CHIPCFG_I2S_5_SAMPRATES
- EM2860_CHIPCFG_I2S_VOLUME_CAPABLE
- EM2860_CHIPCFG_VENDOR_AUDIO
- EM2861_BOARD_GADMEI_UTV330PLUS
- EM2861_BOARD_KWORLD_PVRTV_300U
- EM2861_BOARD_LEADTEK_VC100
- EM2861_BOARD_PLEXTOR_PX_TV100U
- EM2861_BOARD_YAKUMO_MOVIE_MIXER
- EM2870_BOARD_COMPRO_VIDEOMATE
- EM2870_BOARD_KWORLD_350U
- EM2870_BOARD_KWORLD_355U
- EM2870_BOARD_KWORLD_A340
- EM2870_BOARD_PINNACLE_PCTV_DVB
- EM2870_BOARD_REDDO_DVB_C_USB_BOX
- EM2870_BOARD_TERRATEC_XS
- EM2870_BOARD_TERRATEC_XS_MT2060
- EM2874_BOARD_DELOCK_61959
- EM2874_BOARD_KWORLD_UB435Q_V2
- EM2874_BOARD_KWORLD_UB435Q_V3
- EM2874_BOARD_LEADERSHIP_ISDBT
- EM2874_BOARD_MAXMEDIA_UB425_TC
- EM2874_BOARD_PCTV_HD_MINI_80E
- EM2874_I2C_SECONDARY_BUS_SELECT
- EM2874_IR_NEC
- EM2874_IR_NEC_NO_PARITY
- EM2874_IR_RC5
- EM2874_IR_RC6_MODE_0
- EM2874_IR_RC6_MODE_6A
- EM2874_R50_IR_CONFIG
- EM2874_R51_IR
- EM2874_R5D_TS1_PKT_SIZE
- EM2874_R5E_TS2_PKT_SIZE
- EM2874_R5F_TS_ENABLE
- EM2874_R80_GPIO_P0_CTRL
- EM2874_R81_GPIO_P1_CTRL
- EM2874_R82_GPIO_P2_CTRL
- EM2874_R83_GPIO_P3_CTRL
- EM2874_R84_GPIO_P0_STATE
- EM2874_R85_GPIO_P1_STATE
- EM2874_R86_GPIO_P2_STATE
- EM2874_R87_GPIO_P3_STATE
- EM2874_TS1_CAPTURE_ENABLE
- EM2874_TS1_FILTER_ENABLE
- EM2874_TS1_NULL_DISCARD
- EM2874_TS2_CAPTURE_ENABLE
- EM2874_TS2_FILTER_ENABLE
- EM2874_TS2_NULL_DISCARD
- EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600
- EM2880_BOARD_EMPIRE_DUAL_TV
- EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900
- EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2
- EM2880_BOARD_KWORLD_DVB_305U
- EM2880_BOARD_KWORLD_DVB_310U
- EM2880_BOARD_MSI_DIGIVOX_AD
- EM2880_BOARD_MSI_DIGIVOX_AD_II
- EM2880_BOARD_PINNACLE_PCTV_HD_PRO
- EM2880_BOARD_TERRATEC_HYBRID_XS
- EM2880_BOARD_TERRATEC_HYBRID_XS_FR
- EM2880_BOARD_TERRATEC_PRODIGY_XS
- EM2880_R04_GPO
- EM2881_BOARD_DNT_DA2_HYBRID
- EM2881_BOARD_PINNACLE_HYBRID_PRO
- EM2882_BOARD_DIKOM_DK300
- EM2882_BOARD_EVGA_INDTUBE
- EM2882_BOARD_KWORLD_ATSC_315U
- EM2882_BOARD_KWORLD_VS_DVBT
- EM2882_BOARD_PINNACLE_HYBRID_PRO_330E
- EM2882_BOARD_TERRATEC_HYBRID_XS
- EM2882_BOARD_ZOLID_HYBRID_TV_STICK
- EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850
- EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950
- EM2883_BOARD_KWORLD_HYBRID_330U
- EM2884_BOARD_C3TECH_DIGITAL_DUO
- EM2884_BOARD_CINERGY_HTC_STICK
- EM2884_BOARD_ELGATO_EYETV_HYBRID_2008
- EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C
- EM2884_BOARD_PCTV_510E
- EM2884_BOARD_PCTV_520E
- EM2884_BOARD_TERRATEC_H5
- EM2884_BOARD_TERRATEC_H6
- EM2884_BOARD_TERRATEC_HTC_USB_XS
- EM28XX_AC97_EM202
- EM28XX_AC97_OTHER
- EM28XX_AC97_SIGMATEL
- EM28XX_AC97_XFER_TIMEOUT
- EM28XX_AMUX_AUX
- EM28XX_AMUX_CD
- EM28XX_AMUX_LINE_IN
- EM28XX_AMUX_MIC
- EM28XX_AMUX_PCM_OUT
- EM28XX_AMUX_PHONE
- EM28XX_AMUX_UNUSED
- EM28XX_AMUX_VIDEO
- EM28XX_AMUX_VIDEO2
- EM28XX_ANALOG_MODE
- EM28XX_AOUT_LFE
- EM28XX_AOUT_LINE
- EM28XX_AOUT_MASTER
- EM28XX_AOUT_MONO
- EM28XX_AOUT_PCM_AUX
- EM28XX_AOUT_PCM_CD
- EM28XX_AOUT_PCM_IN
- EM28XX_AOUT_PCM_LINE
- EM28XX_AOUT_PCM_MIC_PCM
- EM28XX_AOUT_PCM_MONO
- EM28XX_AOUT_PCM_PHONE
- EM28XX_AOUT_PCM_STEREO
- EM28XX_AOUT_PCM_VIDEO
- EM28XX_AOUT_SURR
- EM28XX_AUDIO
- EM28XX_AUDIO_SRC_LINE
- EM28XX_AUDIO_SRC_TUNER
- EM28XX_BOARD_NOT_VALIDATED
- EM28XX_BOARD_VALIDATED
- EM28XX_BULK_PACKET_MULTIPLIER
- EM28XX_BUTTONS_DEBOUNCED_QUERY_INTERVAL
- EM28XX_BUTTONS_VOLATILE_QUERY_INTERVAL
- EM28XX_BUTTON_ILLUMINATION
- EM28XX_BUTTON_SNAPSHOT
- EM28XX_CAPTURE_STREAM_EN
- EM28XX_CHIPCFG2_TS_PACKETSIZE_188
- EM28XX_CHIPCFG2_TS_PACKETSIZE_376
- EM28XX_CHIPCFG2_TS_PACKETSIZE_564
- EM28XX_CHIPCFG2_TS_PACKETSIZE_752
- EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK
- EM28XX_CHIPCFG2_TS_PRESENT
- EM28XX_CHIPCFG2_TS_REQ_INTERVAL_1MF
- EM28XX_CHIPCFG2_TS_REQ_INTERVAL_2MF
- EM28XX_CHIPCFG2_TS_REQ_INTERVAL_4MF
- EM28XX_CHIPCFG2_TS_REQ_INTERVAL_8MF
- EM28XX_CHIPCFG2_TS_REQ_INTERVAL_MASK
- EM28XX_CHIPCFG_AC97
- EM28XX_CHIPCFG_AUDIOMASK
- EM28XX_DEF_BUF
- EM28XX_DIGITAL_MODE
- EM28XX_DVB
- EM28XX_DVB_BULK_PACKET_MULTIPLIER
- EM28XX_DVB_NUM_BUFS
- EM28XX_DVB_NUM_ISOC_PACKETS
- EM28XX_EP_AUDIO
- EM28XX_HVSCALE_MAX
- EM28XX_I2C_ALGO_EM25XX_BUS_B
- EM28XX_I2C_ALGO_EM2800
- EM28XX_I2C_ALGO_EM28XX
- EM28XX_I2C_CLK_ACK_LAST_READ
- EM28XX_I2C_CLK_WAIT_ENABLE
- EM28XX_I2C_EEPROM_KEY_VALID
- EM28XX_I2C_EEPROM_ON_BOARD
- EM28XX_I2C_FREQ_100_KHZ
- EM28XX_I2C_FREQ_1_5_MHZ
- EM28XX_I2C_FREQ_25_KHZ
- EM28XX_I2C_FREQ_400_KHZ
- EM28XX_I2C_XFER_TIMEOUT
- EM28XX_INTERLACED_DEFAULT
- EM28XX_INT_AUDIO_AC97
- EM28XX_INT_AUDIO_I2S
- EM28XX_INT_AUDIO_NONE
- EM28XX_LED_ANALOG_CAPTURING
- EM28XX_LED_DIGITAL_CAPTURING
- EM28XX_LED_DIGITAL_CAPTURING_TS2
- EM28XX_LED_ILLUMINATION
- EM28XX_MAXBOARDS
- EM28XX_MAX_AUDIO_BUFS
- EM28XX_MIN_AUDIO_PACKETS
- EM28XX_MIN_BUF
- EM28XX_MT9M001
- EM28XX_MT9M111
- EM28XX_MT9V011
- EM28XX_NOADECODER
- EM28XX_NODECODER
- EM28XX_NOSENSOR
- EM28XX_NO_AC97
- EM28XX_NUM_BUFS
- EM28XX_NUM_BUTTON_ADDRESSES_MAX
- EM28XX_NUM_BUTTON_ROLES
- EM28XX_NUM_FRAMES
- EM28XX_NUM_ISOC_PACKETS
- EM28XX_NUM_LED_ROLES
- EM28XX_NUM_READ_FRAMES
- EM28XX_OUTFMT_RGB_16_656
- EM28XX_OUTFMT_RGB_8_BAYER
- EM28XX_OUTFMT_RGB_8_BGBG
- EM28XX_OUTFMT_RGB_8_GBGB
- EM28XX_OUTFMT_RGB_8_GRGR
- EM28XX_OUTFMT_RGB_8_RGRG
- EM28XX_OUTFMT_YUV211
- EM28XX_OUTFMT_YUV411
- EM28XX_OUTFMT_YUV422_Y0UY1V
- EM28XX_OUTFMT_YUV422_Y1UY0V
- EM28XX_OV2640
- EM28XX_R00_CHIPCFG
- EM28XX_R01_CHIPCFG2
- EM28XX_R06_I2C_CLK
- EM28XX_R0A_CHIPID
- EM28XX_R0C_USBSUSP
- EM28XX_R0C_USBSUSP_SNAPSHOT
- EM28XX_R0E_AUDIOSRC
- EM28XX_R0F_XCLK
- EM28XX_R10_VINMODE
- EM28XX_R11_VINCTRL
- EM28XX_R12_VINENABLE
- EM28XX_R14_GAMMA
- EM28XX_R15_RGAIN
- EM28XX_R16_GGAIN
- EM28XX_R17_BGAIN
- EM28XX_R18_ROFFSET
- EM28XX_R19_GOFFSET
- EM28XX_R1A_BOFFSET
- EM28XX_R1B_OFLOW
- EM28XX_R1C_HSTART
- EM28XX_R1D_VSTART
- EM28XX_R1E_CWIDTH
- EM28XX_R1F_CHEIGHT
- EM28XX_R20_YGAIN
- EM28XX_R21_YOFFSET
- EM28XX_R22_UVGAIN
- EM28XX_R23_UOFFSET
- EM28XX_R24_VOFFSET
- EM28XX_R25_SHARPNESS
- EM28XX_R26_COMPR
- EM28XX_R27_OUTFMT
- EM28XX_R28_XMIN
- EM28XX_R29_XMAX
- EM28XX_R2A_YMIN
- EM28XX_R2B_YMAX
- EM28XX_R30_HSCALELOW
- EM28XX_R31_HSCALEHIGH
- EM28XX_R32_VSCALELOW
- EM28XX_R33_VSCALEHIGH
- EM28XX_R34_VBI_START_H
- EM28XX_R35_VBI_START_V
- EM28XX_R36_VBI_WIDTH
- EM28XX_R37_VBI_HEIGHT
- EM28XX_R40_AC97LSB
- EM28XX_R41_AC97MSB
- EM28XX_R42_AC97ADDR
- EM28XX_R43_AC97BUSY
- EM28XX_R45_IR
- EM28XX_RADIO
- EM28XX_RC
- EM28XX_RESOURCE_VBI
- EM28XX_RESOURCE_VIDEO
- EM28XX_SAA711X
- EM28XX_SNAPSHOT_KEY
- EM28XX_START_AUDIO
- EM28XX_STOP_AUDIO
- EM28XX_SUSPEND
- EM28XX_TVAUDIO
- EM28XX_TVP5150
- EM28XX_USB_AUDIO_CLASS
- EM28XX_USB_AUDIO_NONE
- EM28XX_USB_AUDIO_VENDOR
- EM28XX_V4L2
- EM28XX_VERSION
- EM28XX_VINCTRL_CCIR656_ENABLE
- EM28XX_VINCTRL_DUAL_EDGE_STROBE
- EM28XX_VINCTRL_FID_ON_HREF
- EM28XX_VINCTRL_INTERLACED
- EM28XX_VINCTRL_VBI_16BIT_RAW
- EM28XX_VINCTRL_VBI_RAW
- EM28XX_VINCTRL_VBI_SLICED
- EM28XX_VINCTRL_VOUT_MODE_IN
- EM28XX_VINMODE_RGB8_BGGR
- EM28XX_VINMODE_RGB8_GBRG
- EM28XX_VINMODE_RGB8_GRBG
- EM28XX_VINMODE_RGB8_RGGB
- EM28XX_VINMODE_YUV422_CbYCrY
- EM28XX_VINMODE_YUV422_UYVY
- EM28XX_VINMODE_YUV422_VYUY
- EM28XX_VINMODE_YUV422_YUYV
- EM28XX_VINMODE_YUV422_YVYU
- EM28XX_VMUX_COMPOSITE
- EM28XX_VMUX_SVIDEO
- EM28XX_VMUX_TELEVISION
- EM28XX_XCLK_AUDIO_UNMUTE
- EM28XX_XCLK_FREQUENCY_10MHZ
- EM28XX_XCLK_FREQUENCY_12MHZ
- EM28XX_XCLK_FREQUENCY_15MHZ
- EM28XX_XCLK_FREQUENCY_20MHZ
- EM28XX_XCLK_FREQUENCY_20MHZ_2
- EM28XX_XCLK_FREQUENCY_24MHZ
- EM28XX_XCLK_FREQUENCY_30MHZ
- EM28XX_XCLK_FREQUENCY_48MHZ
- EM28XX_XCLK_FREQUENCY_4_3MHZ
- EM28XX_XCLK_FREQUENCY_5MHZ
- EM28XX_XCLK_FREQUENCY_6MHZ
- EM28XX_XCLK_FREQUENCY_7_5MHZ
- EM28XX_XCLK_I2S_MSB_TIMING
- EM28XX_XCLK_IR_NEC_CHK_PARITY
- EM28XX_XCLK_IR_RC5_MODE
- EM3027_REG_ALARM_DATE
- EM3027_REG_ALARM_DAY
- EM3027_REG_ALARM_HOUR
- EM3027_REG_ALARM_MIN
- EM3027_REG_ALARM_MON
- EM3027_REG_ALARM_SEC
- EM3027_REG_ALARM_YEAR
- EM3027_REG_IRQ_CTRL
- EM3027_REG_IRQ_FLAGS
- EM3027_REG_ON_OFF_CTRL
- EM3027_REG_RST_CTRL
- EM3027_REG_STATUS
- EM3027_REG_WATCH_DATE
- EM3027_REG_WATCH_DAY
- EM3027_REG_WATCH_HOUR
- EM3027_REG_WATCH_MIN
- EM3027_REG_WATCH_MON
- EM3027_REG_WATCH_SEC
- EM3027_REG_WATCH_YEAR
- EM7210_HARDWARE_POWER
- EM86_INTERP
- EM86_I_NAME
- EMAC0_OCP_RESET
- EMAC0_RESET
- EMAC1_OCP_RESET
- EMAC1_RESET
- EMAC2_OCP_RESET
- EMAC2_RESET
- EMAC4SYNC_ETHTOOL_REGS_VER
- EMAC4SYNC_XAHT_SLOTS_SHIFT
- EMAC4SYNC_XAHT_WIDTH_SHIFT
- EMAC4_ETHTOOL_REGS_VER
- EMAC4_ISR_RXOE
- EMAC4_ISR_RXPE
- EMAC4_ISR_TXPE
- EMAC4_ISR_TXUE
- EMAC4_MR1_JPSM
- EMAC4_MR1_MWSW_001
- EMAC4_MR1_OBCI
- EMAC4_MR1_OBCI_100
- EMAC4_MR1_OBCI_100P
- EMAC4_MR1_OBCI_50
- EMAC4_MR1_OBCI_66
- EMAC4_MR1_OBCI_83
- EMAC4_MR1_OBCI_MASK
- EMAC4_MR1_RFS_16K
- EMAC4_MR1_RFS_2K
- EMAC4_MR1_RFS_4K
- EMAC4_MR1_RFS_8K
- EMAC4_MR1_TFS_16K
- EMAC4_MR1_TFS_2K
- EMAC4_MR1_TFS_4K
- EMAC4_MR1_TFS_8K
- EMAC4_MR1_TR
- EMAC4_RMR_BASE
- EMAC4_RMR_MJS
- EMAC4_RMR_MJS_MASK
- EMAC4_RMR_RFAF_128_2048
- EMAC4_RMR_RFAF_16_256
- EMAC4_RMR_RFAF_2_32
- EMAC4_RMR_RFAF_32_512
- EMAC4_RMR_RFAF_4_64
- EMAC4_RMR_RFAF_64_1024
- EMAC4_RMR_RFAF_8_128
- EMAC4_STACR_BASE
- EMAC4_TMR0_DEFAULT
- EMAC4_TMR0_TFAE_128_2048
- EMAC4_TMR0_TFAE_16_256
- EMAC4_TMR0_TFAE_2_32
- EMAC4_TMR0_TFAE_32_512
- EMAC4_TMR0_TFAE_4_64
- EMAC4_TMR0_TFAE_64_1024
- EMAC4_TMR0_TFAE_8_128
- EMAC4_TMR0_XMIT
- EMAC4_TMR1
- EMAC4_XAHT_SLOTS_SHIFT
- EMAC4_XAHT_WIDTH_SHIFT
- EMACX_STACR_STAC_IND_ADDR
- EMACX_STACR_STAC_IND_READ
- EMACX_STACR_STAC_IND_READINC
- EMACX_STACR_STAC_IND_WRITE
- EMACX_STACR_STAC_MASK
- EMACX_STACR_STAC_READ
- EMACX_STACR_STAC_WRITE
- EMAC_ALL_MULTI_CLR
- EMAC_ALL_MULTI_REG_VALUE
- EMAC_ALL_MULTI_SET
- EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE
- EMAC_ATHR_HEADER_CTRL
- EMAC_AXI_MAST_CTRL
- EMAC_BAD_RX_MASK
- EMAC_BASE_CPU_NUMBER
- EMAC_BASIC_CTL0
- EMAC_BASIC_CTL1
- EMAC_BD_LENGTH_FOR_CACHE
- EMAC_BLK_IDLE_STS
- EMAC_BOOT_LIST_SIZE
- EMAC_BUFFER_SIZE
- EMAC_BURSTLEN_SHIFT
- EMAC_CLK_AXI
- EMAC_CLK_CFG_AHB
- EMAC_CLK_CNT
- EMAC_CLK_GATE_CTRL
- EMAC_CLK_HIGH_SPEED
- EMAC_CLK_MDIO
- EMAC_CLK_RX
- EMAC_CLK_SYS
- EMAC_CLK_TX
- EMAC_CORE_HW_VERSION
- EMAC_CPPI_EOP_BIT
- EMAC_CPPI_EOQ_BIT
- EMAC_CPPI_OWNERSHIP_BIT
- EMAC_CPPI_PASS_CRC_BIT
- EMAC_CPPI_SOP_BIT
- EMAC_CPPI_TEARDOWN_COMPLETE_BIT
- EMAC_CTL_REG
- EMAC_CTL_RESET
- EMAC_CTL_RX_EN
- EMAC_CTL_TX_EN
- EMAC_CTRL_EWCTL
- EMAC_CTRL_EWINTTCNT
- EMAC_DBG
- EMAC_DEFAULT_MSG_ENABLE
- EMAC_DEF_BCAST_CH
- EMAC_DEF_BCAST_EN
- EMAC_DEF_BUFFER_OFFSET
- EMAC_DEF_ERROR_FRAME_EN
- EMAC_DEF_MACCTRL_FRAME_EN
- EMAC_DEF_MAX_FRAME_SIZE
- EMAC_DEF_MAX_MULTICAST_ADDRESSES
- EMAC_DEF_MAX_RX_CH
- EMAC_DEF_MAX_TX_CH
- EMAC_DEF_MCAST_CH
- EMAC_DEF_MCAST_EN
- EMAC_DEF_MIN_ETHPKTSIZE
- EMAC_DEF_NO_BUFF_CHAIN
- EMAC_DEF_PASS_CRC
- EMAC_DEF_PROM_CH
- EMAC_DEF_PROM_EN
- EMAC_DEF_QOS_EN
- EMAC_DEF_RX_BUF_SIZE
- EMAC_DEF_RX_CH
- EMAC_DEF_RX_DESCS
- EMAC_DEF_RX_IRQ_MOD
- EMAC_DEF_RX_MAX_SERVICE
- EMAC_DEF_RX_NUM_DESC
- EMAC_DEF_RX_QUEUES
- EMAC_DEF_SHORT_FRAME_EN
- EMAC_DEF_TXPACING_EN
- EMAC_DEF_TXPRIO_FIXED
- EMAC_DEF_TX_CH
- EMAC_DEF_TX_DESCS
- EMAC_DEF_TX_IRQ_MOD
- EMAC_DEF_TX_MAX_SERVICE
- EMAC_DEF_TX_QUEUES
- EMAC_DEP_COUNT
- EMAC_DEP_MAL_IDX
- EMAC_DEP_MDIO_IDX
- EMAC_DEP_PREV_IDX
- EMAC_DEP_RGMII_IDX
- EMAC_DEP_TAH_IDX
- EMAC_DEP_ZMII_IDX
- EMAC_DESC_CTRL_0
- EMAC_DESC_CTRL_1
- EMAC_DESC_CTRL_10
- EMAC_DESC_CTRL_11
- EMAC_DESC_CTRL_12
- EMAC_DESC_CTRL_13
- EMAC_DESC_CTRL_14
- EMAC_DESC_CTRL_15
- EMAC_DESC_CTRL_16
- EMAC_DESC_CTRL_2
- EMAC_DESC_CTRL_3
- EMAC_DESC_CTRL_4
- EMAC_DESC_CTRL_5
- EMAC_DESC_CTRL_6
- EMAC_DESC_CTRL_8
- EMAC_DESC_CTRL_9
- EMAC_DEV_ID
- EMAC_DM644X_EWINTCNT_MASK
- EMAC_DM644X_INTMAX_INTVL
- EMAC_DM644X_INTMIN_INTVL
- EMAC_DM644X_MAC_IN_VECTOR_HOST_INT
- EMAC_DM644X_MAC_IN_VECTOR_RX_INT_VEC
- EMAC_DM644X_MAC_IN_VECTOR_STATPEND_INT
- EMAC_DM644X_MAC_IN_VECTOR_TX_INT_VEC
- EMAC_DM646X_CMINTCTRL
- EMAC_DM646X_CMINTMAX_CNT
- EMAC_DM646X_CMINTMAX_INTVL
- EMAC_DM646X_CMINTMIN_CNT
- EMAC_DM646X_CMINTMIN_INTVL
- EMAC_DM646X_CMRXINTEN
- EMAC_DM646X_CMRXINTMAX
- EMAC_DM646X_CMTXINTEN
- EMAC_DM646X_CMTXINTMAX
- EMAC_DM646X_INTPACEEN
- EMAC_DM646X_INTPRESCALE_MASK
- EMAC_DM646X_MACCONTORL_GIG
- EMAC_DM646X_MACCONTORL_GIGFORCE
- EMAC_DM646X_MACEOIVECTOR
- EMAC_DM646X_MAC_EOI_C0_RXEN
- EMAC_DM646X_MAC_EOI_C0_TXEN
- EMAC_DM646X_MAC_IN_VECTOR_HOST_INT
- EMAC_DM646X_MAC_IN_VECTOR_RX_INT_VEC
- EMAC_DM646X_MAC_IN_VECTOR_STATPEND_INT
- EMAC_DM646X_MAC_IN_VECTOR_TX_INT_VEC
- EMAC_DMA_CTRL
- EMAC_DMA_MAS_CTRL
- EMAC_DUPLEX_FULL
- EMAC_EEPROM_MAGIC
- EMAC_EMAC_WRAPPER_CSR1
- EMAC_EMAC_WRAPPER_CSR2
- EMAC_EMAC_WRAPPER_TX_TS_HI
- EMAC_EMAC_WRAPPER_TX_TS_INX
- EMAC_EMAC_WRAPPER_TX_TS_LO
- EMAC_EMCONTROL
- EMAC_ETHTOOL_REGS_RGMII
- EMAC_ETHTOOL_REGS_TAH
- EMAC_ETHTOOL_REGS_VER
- EMAC_ETHTOOL_REGS_ZMII
- EMAC_ETHTOOL_STATS_COUNT
- EMAC_FIFOCONTROL
- EMAC_FRM_FLT_CTL
- EMAC_FRM_FLT_MULTICAST
- EMAC_FRM_FLT_RXALL
- EMAC_FTRS_ALWAYS
- EMAC_FTRS_POSSIBLE
- EMAC_FTR_440EP_PHY_CLK_FIX
- EMAC_FTR_440GX_PHY_CLK_FIX
- EMAC_FTR_460EX_PHY_CLK_FIX
- EMAC_FTR_APM821XX_NO_HALF_DUPLEX
- EMAC_FTR_EMAC4
- EMAC_FTR_EMAC4SYNC
- EMAC_FTR_HAS_NEW_STACR
- EMAC_FTR_HAS_RGMII
- EMAC_FTR_HAS_TAH
- EMAC_FTR_HAS_ZMII
- EMAC_FTR_NO_FLOW_CONTROL_40x
- EMAC_FTR_STACR_OC_INVERT
- EMAC_H1TPD_BASE_ADDR_LO
- EMAC_H2TPD_BASE_ADDR_LO
- EMAC_H3TPD_BASE_ADDR_LO
- EMAC_HASH_TAB_REG0
- EMAC_HASH_TAB_REG1
- EMAC_IDT_TABLE0
- EMAC_INT1_MASK
- EMAC_INT1_STATUS
- EMAC_INT2_MASK
- EMAC_INT2_STATUS
- EMAC_INT3_MASK
- EMAC_INT3_STATUS
- EMAC_INTER_SRAM_PART9
- EMAC_INT_CTL_REG
- EMAC_INT_EN
- EMAC_INT_FLOW
- EMAC_INT_MASK
- EMAC_INT_MASK_CLEAR
- EMAC_INT_MIB
- EMAC_INT_MII
- EMAC_INT_STA
- EMAC_INT_STATUS
- EMAC_INT_STA_REG
- EMAC_IRQ_MOD_TIM_INIT
- EMAC_ISR_ALE
- EMAC_ISR_BFCS
- EMAC_ISR_BP
- EMAC_ISR_IRE
- EMAC_ISR_MOF
- EMAC_ISR_MOS
- EMAC_ISR_ORE
- EMAC_ISR_OVR
- EMAC_ISR_PP
- EMAC_ISR_PTLE
- EMAC_ISR_RP
- EMAC_ISR_SE
- EMAC_ISR_SQE
- EMAC_ISR_TE
- EMAC_IS_BAD_TX
- EMAC_IS_BAD_TX_TAH
- EMAC_LED_1000MB_OVERRIDE
- EMAC_LED_100MB_OVERRIDE
- EMAC_LED_10MB_OVERRIDE
- EMAC_LED_2500MB_OVERRIDE
- EMAC_LED_OVERRIDE
- EMAC_LED_TRAFFIC
- EMAC_LINK_SPEED_100_FULL
- EMAC_LINK_SPEED_100_HALF
- EMAC_LINK_SPEED_10_FULL
- EMAC_LINK_SPEED_10_HALF
- EMAC_LINK_SPEED_1GB_FULL
- EMAC_LINK_SPEED_UNKNOWN
- EMAC_LOOPBACK
- EMAC_MACADDRHI
- EMAC_MACADDRLO
- EMAC_MACADDR_HI
- EMAC_MACADDR_LO
- EMAC_MACCONFIG
- EMAC_MACCONTROL
- EMAC_MACCONTROL_FULLDUPLEXEN
- EMAC_MACCONTROL_GIGABITEN
- EMAC_MACCONTROL_GMIIEN
- EMAC_MACCONTROL_RMIISPEED_MASK
- EMAC_MACCONTROL_TXPACEEN
- EMAC_MACCONTROL_TXPTYPE
- EMAC_MACHASH1
- EMAC_MACHASH2
- EMAC_MACINDEX
- EMAC_MACINTMASKCLEAR
- EMAC_MACINTMASKSET
- EMAC_MACINTSTATMASKED
- EMAC_MACINTSTATRAW
- EMAC_MACINVECTOR
- EMAC_MACSRCADDRHI
- EMAC_MACSRCADDRLO
- EMAC_MACSTATUS
- EMAC_MACSTATUS_RXERRCH_MASK
- EMAC_MACSTATUS_RXERRCH_SHIFT
- EMAC_MACSTATUS_RXERRCODE_MASK
- EMAC_MACSTATUS_RXERRCODE_SHIFT
- EMAC_MACSTATUS_TXERRCH_MASK
- EMAC_MACSTATUS_TXERRCH_SHIFT
- EMAC_MACSTATUS_TXERRCODE_MASK
- EMAC_MACSTATUS_TXERRCODE_SHIFT
- EMAC_MAC_A0_REG
- EMAC_MAC_A1_REG
- EMAC_MAC_A2_REG
- EMAC_MAC_CLRT_COLLISION_WINDOW
- EMAC_MAC_CLRT_REG
- EMAC_MAC_CLRT_RM
- EMAC_MAC_CTL0_REG
- EMAC_MAC_CTL0_RX_FLOW_CTL_EN
- EMAC_MAC_CTL0_SOFT_RESET
- EMAC_MAC_CTL0_TX_FLOW_CTL_EN
- EMAC_MAC_CTL1_AD_SHORT_FRAME_EN
- EMAC_MAC_CTL1_BACKOFF_DIS
- EMAC_MAC_CTL1_CRC_EN
- EMAC_MAC_CTL1_DELAYED_CRC_EN
- EMAC_MAC_CTL1_DUPLEX_EN
- EMAC_MAC_CTL1_HUGE_FRAME_EN
- EMAC_MAC_CTL1_LEN_CHECK_EN
- EMAC_MAC_CTL1_PAD_CRC_EN
- EMAC_MAC_CTL1_PAD_EN
- EMAC_MAC_CTL1_REG
- EMAC_MAC_CTRL
- EMAC_MAC_HALF_DPLX_CTRL
- EMAC_MAC_HOST_ERR_INTMASK_VAL
- EMAC_MAC_IPGIFG_CTRL
- EMAC_MAC_IPGR_IPG1
- EMAC_MAC_IPGR_IPG2
- EMAC_MAC_IPGR_REG
- EMAC_MAC_IPGT_FULL_DUPLEX
- EMAC_MAC_IPGT_HALF_DUPLEX
- EMAC_MAC_IPGT_REG
- EMAC_MAC_MADR_REG
- EMAC_MAC_MAXF_REG
- EMAC_MAC_MCFG_REG
- EMAC_MAC_MCMD_REG
- EMAC_MAC_MIND_REG
- EMAC_MAC_MRDD_REG
- EMAC_MAC_MWTD_REG
- EMAC_MAC_SSRR_REG
- EMAC_MAC_STA_ADDR0
- EMAC_MAC_STA_ADDR1
- EMAC_MAC_SUPP_REG
- EMAC_MAC_TEST_REG
- EMAC_MAILBOX_0
- EMAC_MAILBOX_10
- EMAC_MAILBOX_11
- EMAC_MAILBOX_12
- EMAC_MAILBOX_13
- EMAC_MAILBOX_15
- EMAC_MAILBOX_16
- EMAC_MAILBOX_2
- EMAC_MAILBOX_3
- EMAC_MAILBOX_5
- EMAC_MAILBOX_6
- EMAC_MAILBOX_7
- EMAC_MAILBOX_8
- EMAC_MAILBOX_9
- EMAC_MAJOR_VERSION
- EMAC_MAX_ETH_FRAME_SIZE
- EMAC_MAX_FRAME_LEN
- EMAC_MAX_FRAM_LEN_CTRL
- EMAC_MAX_JUMBO_PKT_SIZE
- EMAC_MAX_REG_SIZE
- EMAC_MAX_RX_DESCS
- EMAC_MAX_SETUP_LNK_CYCLE
- EMAC_MAX_TXRX_CHANNELS
- EMAC_MAX_TX_DESCS
- EMAC_MAX_TX_OFFLOAD_THRESH
- EMAC_MBP_BCASTCHAN
- EMAC_MBP_MCASTCHAN
- EMAC_MBP_PROMISCCH
- EMAC_MBP_RXBCAST
- EMAC_MBP_RXMCAST
- EMAC_MBP_RXPROMISC
- EMAC_MDIO_CMD
- EMAC_MDIO_COMM_COMMAND_ADDRESS
- EMAC_MDIO_COMM_COMMAND_READ_22
- EMAC_MDIO_COMM_COMMAND_READ_45
- EMAC_MDIO_COMM_COMMAND_WRITE_22
- EMAC_MDIO_COMM_COMMAND_WRITE_45
- EMAC_MDIO_COMM_DATA
- EMAC_MDIO_COMM_START_BUSY
- EMAC_MDIO_CTRL
- EMAC_MDIO_DATA
- EMAC_MDIO_EX_CTRL
- EMAC_MDIO_MODE_AUTO_POLL
- EMAC_MDIO_MODE_CLAUSE_45
- EMAC_MDIO_MODE_CLOCK_CNT
- EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT
- EMAC_MDIO_STATUS_10MB
- EMAC_MINOR_VERSION
- EMAC_MIN_ETH_FRAME_SIZE
- EMAC_MIN_MTU
- EMAC_MIN_RX_DESCS
- EMAC_MIN_TX_DESCS
- EMAC_MISC_CTRL
- EMAC_MODE_25G_MODE
- EMAC_MODE_HALF_DUPLEX
- EMAC_MODE_PORT_GMII
- EMAC_MODE_PORT_MII
- EMAC_MODE_PORT_MII_10M
- EMAC_MODE_RESET
- EMAC_MODULE_VERSION
- EMAC_MR0_RXE
- EMAC_MR0_RXI
- EMAC_MR0_SRST
- EMAC_MR0_TXE
- EMAC_MR0_TXI
- EMAC_MR0_WKE
- EMAC_MR1_APP
- EMAC_MR1_BASE
- EMAC_MR1_EIFC
- EMAC_MR1_FDE
- EMAC_MR1_ILE
- EMAC_MR1_IST
- EMAC_MR1_JPSM
- EMAC_MR1_MF_10
- EMAC_MR1_MF_100
- EMAC_MR1_MF_1000
- EMAC_MR1_MF_1000GPCS
- EMAC_MR1_MF_IPPA
- EMAC_MR1_MF_MASK
- EMAC_MR1_MWSW_001
- EMAC_MR1_RFS_16K
- EMAC_MR1_RFS_4K
- EMAC_MR1_TFS_2K
- EMAC_MR1_TR0_MULT
- EMAC_MR1_VLE
- EMAC_MSG_DEFAULT
- EMAC_MTU_OVERHEAD
- EMAC_MULTICAST_ADD
- EMAC_MULTICAST_DEL
- EMAC_NETOCTETS
- EMAC_NUM_MULTICAST_BITS
- EMAC_PHY_DUPLEX
- EMAC_PHY_LINK_DELAY
- EMAC_PHY_STS
- EMAC_POLL_WEIGHT
- EMAC_PREAMBLE_DEF
- EMAC_PRIV_ENABLE_SINGLE_PAUSE
- EMAC_PROBE_DEP_TIMEOUT
- EMAC_PTP_RESET
- EMAC_QSERDES_COM_DEC_START1
- EMAC_QSERDES_COM_DEC_START2
- EMAC_QSERDES_COM_DIV_FRAC_START1
- EMAC_QSERDES_COM_DIV_FRAC_START2
- EMAC_QSERDES_COM_DIV_FRAC_START3
- EMAC_QSERDES_COM_PLLLOCK_CMP1
- EMAC_QSERDES_COM_PLLLOCK_CMP2
- EMAC_QSERDES_COM_PLLLOCK_CMP3
- EMAC_QSERDES_COM_PLLLOCK_CMP_EN
- EMAC_QSERDES_COM_PLL_CNTRL
- EMAC_QSERDES_COM_PLL_CP_SETI
- EMAC_QSERDES_COM_PLL_CP_SETP
- EMAC_QSERDES_COM_PLL_CRCTRL
- EMAC_QSERDES_COM_PLL_IP_SETI
- EMAC_QSERDES_COM_PLL_IP_SETP
- EMAC_QSERDES_COM_RESETSM_CNTRL
- EMAC_QSERDES_COM_RESET_SM
- EMAC_QSERDES_COM_SYSCLK_EN_SEL
- EMAC_QSERDES_COM_SYS_CLK_CTRL
- EMAC_QSERDES_RX_CDR_CONTROL
- EMAC_QSERDES_RX_CDR_CONTROL2
- EMAC_QSERDES_RX_RX_EQ_GAIN12
- EMAC_QSERDES_TX_BIST_MODE_LANENO
- EMAC_QSERDES_TX_LANE_MODE
- EMAC_QSERDES_TX_TRAN_DRVR_EMP_EN
- EMAC_QSERDES_TX_TX_DRV_LVL
- EMAC_QSERDES_TX_TX_EMP_POST1_LVL
- EMAC_RD
- EMAC_REGS_VERSION
- EMAC_REG_EMAC_LED
- EMAC_REG_EMAC_MAC_MATCH
- EMAC_REG_EMAC_MDIO_COMM
- EMAC_REG_EMAC_MDIO_MODE
- EMAC_REG_EMAC_MDIO_STATUS
- EMAC_REG_EMAC_MODE
- EMAC_REG_EMAC_RX_MODE
- EMAC_REG_EMAC_RX_MTU_SIZE
- EMAC_REG_EMAC_RX_STAT_AC
- EMAC_REG_EMAC_RX_STAT_AC_28
- EMAC_REG_EMAC_RX_STAT_AC_COUNT
- EMAC_REG_EMAC_TX_MODE
- EMAC_REG_EMAC_TX_STAT_AC
- EMAC_REG_EMAC_TX_STAT_AC_COUNT
- EMAC_REG_RX_PFC_MODE
- EMAC_REG_RX_PFC_MODE_PRIORITIES
- EMAC_REG_RX_PFC_MODE_RX_EN
- EMAC_REG_RX_PFC_MODE_TX_EN
- EMAC_REG_RX_PFC_PARAM
- EMAC_REG_RX_PFC_PARAM_OPCODE_BITSHIFT
- EMAC_REG_RX_PFC_PARAM_PRIORITY_EN_BITSHIFT
- EMAC_REG_RX_PFC_STATS_XOFF_RCVD
- EMAC_REG_RX_PFC_STATS_XOFF_RCVD_COUNT
- EMAC_REG_RX_PFC_STATS_XOFF_SENT
- EMAC_REG_RX_PFC_STATS_XOFF_SENT_COUNT
- EMAC_REG_RX_PFC_STATS_XON_RCVD
- EMAC_REG_RX_PFC_STATS_XON_RCVD_COUNT
- EMAC_REG_RX_PFC_STATS_XON_SENT
- EMAC_REG_RX_PFC_STATS_XON_SENT_COUNT
- EMAC_RESET
- EMAC_RFD
- EMAC_RFD_SIZE
- EMAC_RGMII_FLAG_HAS_MDIO
- EMAC_RGMII_STA_INT
- EMAC_RMR_BAE
- EMAC_RMR_BASE
- EMAC_RMR_IAE
- EMAC_RMR_MAE
- EMAC_RMR_MIAE
- EMAC_RMR_PME
- EMAC_RMR_PMME
- EMAC_RMR_PPP
- EMAC_RMR_RFP
- EMAC_RMR_ROP
- EMAC_RMR_RPIR
- EMAC_RMR_RRP
- EMAC_RMR_SFCS
- EMAC_RMR_SP
- EMAC_RRD
- EMAC_RRD_CRC
- EMAC_RRD_ERROR
- EMAC_RRD_FAE
- EMAC_RRD_FOV
- EMAC_RRD_INC
- EMAC_RRD_IPF
- EMAC_RRD_L4F
- EMAC_RRD_LEN
- EMAC_RRD_RNT
- EMAC_RRD_SIZE
- EMAC_RRD_STATS_DW_IDX
- EMAC_RRD_TRN
- EMAC_RSS_HSTYP_ALL_EN
- EMAC_RSS_HSTYP_IPV4_EN
- EMAC_RSS_HSTYP_IPV6_EN
- EMAC_RSS_HSTYP_TCP4_EN
- EMAC_RSS_HSTYP_TCP6_EN
- EMAC_RSS_IDT_SIZE
- EMAC_RSS_KEY
- EMAC_RSS_KEY0
- EMAC_RSS_TBL
- EMAC_RXALIGNCODEERRORS
- EMAC_RXBCASTFRAMES
- EMAC_RXBUFFEROFFSET
- EMAC_RXCRCERRORS
- EMAC_RXDMAOVERRUNS
- EMAC_RXFILTERED
- EMAC_RXFILTERLOWTHRESH
- EMAC_RXFRAGMENTS
- EMAC_RXGOODFRAMES
- EMAC_RXJABBER
- EMAC_RXMAC_STATC_REG0
- EMAC_RXMAC_STATC_REG22
- EMAC_RXMAC_STATC_REG23
- EMAC_RXMAC_STATC_REG24
- EMAC_RXMAXLEN
- EMAC_RXMBPENABLE
- EMAC_RXMBP_BROADCH_MASK
- EMAC_RXMBP_BROADCH_SHIFT
- EMAC_RXMBP_BROADEN_MASK
- EMAC_RXMBP_CAFEN_MASK
- EMAC_RXMBP_CEFEN_MASK
- EMAC_RXMBP_CHMASK
- EMAC_RXMBP_CMFEN_MASK
- EMAC_RXMBP_CSFEN_MASK
- EMAC_RXMBP_MULTICH_MASK
- EMAC_RXMBP_MULTICH_SHIFT
- EMAC_RXMBP_MULTIEN_MASK
- EMAC_RXMBP_NOCHAIN_MASK
- EMAC_RXMBP_PASSCRC_MASK
- EMAC_RXMBP_PROMCH_MASK
- EMAC_RXMBP_PROMCH_SHIFT
- EMAC_RXMBP_QOSEN_MASK
- EMAC_RXMCASTFRAMES
- EMAC_RXMOFOVERRUNS
- EMAC_RXOCTETS
- EMAC_RXOVERSIZED
- EMAC_RXPAUSEFRAMES
- EMAC_RXQOSFILTERED
- EMAC_RXQ_CTRL_0
- EMAC_RXQ_CTRL_1
- EMAC_RXQ_CTRL_2
- EMAC_RXQ_CTRL_3
- EMAC_RXSOFOVERRUNS
- EMAC_RXUNDERSIZED
- EMAC_RXUNICASTCLEAR
- EMAC_RXUNICASTSET
- EMAC_RX_BD_BUF_SIZE
- EMAC_RX_BD_PKT_LENGTH_MASK
- EMAC_RX_BUFFER_OFFSET_MASK
- EMAC_RX_BUF_UA_INT
- EMAC_RX_CONTROL_RX_ENABLE_VAL
- EMAC_RX_COPY_THRESH
- EMAC_RX_CTL0
- EMAC_RX_CTL1
- EMAC_RX_CTL_ACCEPT_BROADCAST_EN
- EMAC_RX_CTL_ACCEPT_MULTICAST_EN
- EMAC_RX_CTL_ACCEPT_UNICAST_EN
- EMAC_RX_CTL_AUTO_DRQ_EN
- EMAC_RX_CTL_DA_FILTER_EN
- EMAC_RX_CTL_DMA_EN
- EMAC_RX_CTL_HASH_FILTER_EN
- EMAC_RX_CTL_PASS_ALL_EN
- EMAC_RX_CTL_PASS_CRC_ERR_EN
- EMAC_RX_CTL_PASS_CTL_EN
- EMAC_RX_CTL_PASS_LEN_ERR_EN
- EMAC_RX_CTL_PASS_LEN_OOR_EN
- EMAC_RX_CTL_REG
- EMAC_RX_CTL_SA_FILTER_EN
- EMAC_RX_CTL_SA_FILTER_INVERT_EN
- EMAC_RX_CUR_BUF
- EMAC_RX_CUR_DESC
- EMAC_RX_DESC_LIST
- EMAC_RX_DMA_EN
- EMAC_RX_DMA_STA
- EMAC_RX_DMA_START
- EMAC_RX_DMA_STOP_INT
- EMAC_RX_DO_CRC
- EMAC_RX_EARLY_INT
- EMAC_RX_FBC_REG
- EMAC_RX_FLOW_CTL_EN
- EMAC_RX_FRM_FLT
- EMAC_RX_HASH0_REG
- EMAC_RX_HASH1_REG
- EMAC_RX_INT
- EMAC_RX_IO_DATA_LEN
- EMAC_RX_IO_DATA_REG
- EMAC_RX_IO_DATA_STATUS
- EMAC_RX_IO_DATA_STATUS_CRC_ERR
- EMAC_RX_IO_DATA_STATUS_LEN_ERR
- EMAC_RX_IO_DATA_STATUS_OK
- EMAC_RX_MAX_LEN_MASK
- EMAC_RX_MD
- EMAC_RX_MODE_FLOW_EN
- EMAC_RX_MODE_KEEP_MAC_CONTROL
- EMAC_RX_MODE_KEEP_VLAN_TAG
- EMAC_RX_MODE_PROMISCUOUS
- EMAC_RX_MODE_RESET
- EMAC_RX_MTU_SIZE_JUMBO_ENA
- EMAC_RX_OVERFLOW_INT
- EMAC_RX_RECEIVER_EN
- EMAC_RX_STA_REG
- EMAC_RX_ST_AE
- EMAC_RX_ST_BFCS
- EMAC_RX_ST_BP
- EMAC_RX_ST_IRE
- EMAC_RX_ST_OE
- EMAC_RX_ST_ORE
- EMAC_RX_ST_PP
- EMAC_RX_ST_PTL
- EMAC_RX_ST_RP
- EMAC_RX_ST_SE
- EMAC_RX_TAH_BAD_CSUM
- EMAC_RX_TH_128
- EMAC_RX_TH_32
- EMAC_RX_TH_64
- EMAC_RX_TH_96
- EMAC_RX_TH_MASK
- EMAC_RX_TIMEOUT_INT
- EMAC_RX_UNICAST_CLEAR_ALL
- EMAC_SAFX_H_REG0
- EMAC_SAFX_H_REG1
- EMAC_SAFX_H_REG2
- EMAC_SAFX_H_REG3
- EMAC_SAFX_L_REG0
- EMAC_SAFX_L_REG1
- EMAC_SAFX_L_REG2
- EMAC_SAFX_L_REG3
- EMAC_SGMII_LN_CML_CTRL_MODE0
- EMAC_SGMII_LN_DRVR_CTRL0
- EMAC_SGMII_LN_DRVR_CTRL1
- EMAC_SGMII_LN_DRVR_LOGIC_CLKDIV
- EMAC_SGMII_LN_DRVR_TAP_EN
- EMAC_SGMII_LN_LANE_MODE
- EMAC_SGMII_LN_MIXER_CTRL_MODE0
- EMAC_SGMII_LN_PARALLEL_RATE
- EMAC_SGMII_LN_RSM_CONFIG
- EMAC_SGMII_LN_RX_BAND
- EMAC_SGMII_LN_RX_EN_SIGNAL
- EMAC_SGMII_LN_RX_MISC_CNTRL0
- EMAC_SGMII_LN_RX_RCVR_PATH1_MODE0
- EMAC_SGMII_LN_RX_RESECODE_OFFSET
- EMAC_SGMII_LN_SIGDET_CNTRL
- EMAC_SGMII_LN_SIGDET_DEGLITCH_CNTRL
- EMAC_SGMII_LN_SIGDET_ENABLES
- EMAC_SGMII_LN_TX_BAND_MODE
- EMAC_SGMII_LN_TX_MARGINING
- EMAC_SGMII_LN_TX_POST
- EMAC_SGMII_LN_TX_PRE
- EMAC_SGMII_LN_UCDR_FO_GAIN_MODE0
- EMAC_SGMII_LN_UCDR_SO_CONFIG
- EMAC_SGMII_LN_UCDR_SO_GAIN_MODE0
- EMAC_SGMII_LN_VGA_INITVAL
- EMAC_SGMII_PHY_AUTONEG_CFG2
- EMAC_SGMII_PHY_CDR_CTRL0
- EMAC_SGMII_PHY_CMN_PWR_CTRL
- EMAC_SGMII_PHY_INTERRUPT_CLEAR
- EMAC_SGMII_PHY_INTERRUPT_MASK
- EMAC_SGMII_PHY_INTERRUPT_STATUS
- EMAC_SGMII_PHY_IRQ_CMD
- EMAC_SGMII_PHY_LANE_CTRL1
- EMAC_SGMII_PHY_POW_DWN_CTRL0
- EMAC_SGMII_PHY_RESET_CTRL
- EMAC_SGMII_PHY_RX_CHK_STATUS
- EMAC_SGMII_PHY_RX_PWR_CTRL
- EMAC_SGMII_PHY_SERDES_START
- EMAC_SGMII_PHY_SPEED_CFG1
- EMAC_SGMII_PHY_TX_PWR_CTRL
- EMAC_SKB_CB
- EMAC_SOFTRESET
- EMAC_SPEED_10
- EMAC_SPEED_100
- EMAC_SPEED_1000
- EMAC_SPLITTER_CTRL_REG
- EMAC_SPLITTER_CTRL_SPEED_10
- EMAC_SPLITTER_CTRL_SPEED_100
- EMAC_SPLITTER_CTRL_SPEED_1000
- EMAC_SPLITTER_CTRL_SPEED_MASK
- EMAC_STACR_BASE
- EMAC_STACR_OC
- EMAC_STACR_OPBC
- EMAC_STACR_OPBC_100
- EMAC_STACR_OPBC_50
- EMAC_STACR_OPBC_66
- EMAC_STACR_OPBC_83
- EMAC_STACR_OPBC_MASK
- EMAC_STACR_PCDA_MASK
- EMAC_STACR_PCDA_SHIFT
- EMAC_STACR_PHYD_MASK
- EMAC_STACR_PHYD_SHIFT
- EMAC_STACR_PHYE
- EMAC_STACR_PRA_MASK
- EMAC_STACR_STAC_MASK
- EMAC_STACR_STAC_READ
- EMAC_STACR_STAC_WRITE
- EMAC_STATS_CLR_MASK
- EMAC_STATS_LEN
- EMAC_SYSTEM_LOW_POWER_DEBUG
- EMAC_SYS_ALIV_CTRL
- EMAC_TAG_TO_VLAN
- EMAC_TMR0_DEFAULT
- EMAC_TMR0_GNP
- EMAC_TMR0_XMIT
- EMAC_TMR1
- EMAC_TPD
- EMAC_TPD_LAST_FRAGMENT
- EMAC_TPD_SIZE
- EMAC_TPD_TSTAMP_SAVE
- EMAC_TRTR_SHIFT
- EMAC_TRTR_SHIFT_EMAC4
- EMAC_TRY_LINK_TIMEOUT
- EMAC_TS_RRD_SIZE
- EMAC_TXBCASTFRAMES
- EMAC_TXCARRIERSENSE
- EMAC_TXCOLLISION
- EMAC_TXDEFERRED
- EMAC_TXEXCESSIVECOLL
- EMAC_TXGOODFRAMES
- EMAC_TXLATECOLL
- EMAC_TXMAC_STATC_REG0
- EMAC_TXMAC_STATC_REG24
- EMAC_TXMAC_STATC_REG25
- EMAC_TXMCASTFRAMES
- EMAC_TXMULTICOLL
- EMAC_TXOCTETS
- EMAC_TXPAUSEFRAMES
- EMAC_TXQ_CTRL_0
- EMAC_TXQ_CTRL_1
- EMAC_TXQ_CTRL_2
- EMAC_TXSINGLECOLL
- EMAC_TXUNDERRUN
- EMAC_TX_BUF_UA_INT
- EMAC_TX_CONTROL_TX_ENABLE_VAL
- EMAC_TX_CTL0
- EMAC_TX_CTL0_REG
- EMAC_TX_CTL1
- EMAC_TX_CTL1_REG
- EMAC_TX_CTRL_GFCS
- EMAC_TX_CTRL_GP
- EMAC_TX_CTRL_ISA
- EMAC_TX_CTRL_IVT
- EMAC_TX_CTRL_RSA
- EMAC_TX_CTRL_RVT
- EMAC_TX_CTRL_TAH_CSUM
- EMAC_TX_CUR_BUF
- EMAC_TX_CUR_DESC
- EMAC_TX_DESC_LIST
- EMAC_TX_DMA_EN
- EMAC_TX_DMA_STA
- EMAC_TX_DMA_START
- EMAC_TX_DMA_STOP_INT
- EMAC_TX_EARLY_INT
- EMAC_TX_FLOW_CTL
- EMAC_TX_FLOW_CTL_EN
- EMAC_TX_FLOW_REG
- EMAC_TX_INS_REG
- EMAC_TX_INT
- EMAC_TX_IO_DATA1_REG
- EMAC_TX_IO_DATA_REG
- EMAC_TX_MD
- EMAC_TX_MODE_ABORTED_FRAME_EN
- EMAC_TX_MODE_DMA_EN
- EMAC_TX_MODE_EXT_PAUSE_EN
- EMAC_TX_MODE_FLOW_EN
- EMAC_TX_MODE_REG
- EMAC_TX_MODE_RESET
- EMAC_TX_NEXT_FRM
- EMAC_TX_PL0_REG
- EMAC_TX_PL1_REG
- EMAC_TX_POLL_HWTXTSTAMP_THRESHOLD
- EMAC_TX_STA_REG
- EMAC_TX_ST_BFCS
- EMAC_TX_ST_EC
- EMAC_TX_ST_ED
- EMAC_TX_ST_LC
- EMAC_TX_ST_LCS
- EMAC_TX_ST_MC
- EMAC_TX_ST_SC
- EMAC_TX_ST_SQE
- EMAC_TX_ST_UR
- EMAC_TX_TH_128
- EMAC_TX_TH_192
- EMAC_TX_TH_256
- EMAC_TX_TH_64
- EMAC_TX_TH_MASK
- EMAC_TX_TIMEOUT_INT
- EMAC_TX_TRANSMITTER_EN
- EMAC_TX_TSVH0_REG
- EMAC_TX_TSVH1_REG
- EMAC_TX_TSVL0_REG
- EMAC_TX_TSVL1_REG
- EMAC_TX_UNDERFLOW_INT
- EMAC_TX_WAKEUP_THRESH
- EMAC_UNDOCUMENTED_MAGIC
- EMAC_VERSION_1
- EMAC_VERSION_2
- EMAC_VLAN_TO_TAG
- EMAC_WATCHDOG_TIME
- EMAC_WOL_CTRL0
- EMAC_WR
- EMAC_WRAPPER_TX_TS_EMPTY
- EMAC_WRAPPER_TX_TS_INX_BMSK
- EMAC_XAHT_CRC_TO_SLOT
- EMAC_XAHT_MAX_REGS
- EMAC_XAHT_REGS
- EMAC_XAHT_SLOTS
- EMAC_XAHT_SLOT_TO_MASK
- EMAC_XAHT_SLOT_TO_REG
- EMAC_XAHT_WIDTH
- EMASK_FBD
- EMASK_FBD_ERR_MASK
- EMASK_FBD_M10ERR
- EMASK_FBD_M11ERR
- EMASK_FBD_M12ERR
- EMASK_FBD_M13ERR
- EMASK_FBD_M14ERR
- EMASK_FBD_M15ERR
- EMASK_FBD_M17ERR
- EMASK_FBD_M18ERR
- EMASK_FBD_M19ERR
- EMASK_FBD_M1ERR
- EMASK_FBD_M20ERR
- EMASK_FBD_M21ERR
- EMASK_FBD_M22ERR
- EMASK_FBD_M23ERR
- EMASK_FBD_M24ERR
- EMASK_FBD_M25ERR
- EMASK_FBD_M26ERR
- EMASK_FBD_M27ERR
- EMASK_FBD_M28ERR
- EMASK_FBD_M2ERR
- EMASK_FBD_M3ERR
- EMASK_FBD_M4ERR
- EMASK_FBD_M5ERR
- EMASK_FBD_M6ERR
- EMASK_FBD_M7ERR
- EMASK_FBD_M8ERR
- EMASK_FBD_M9ERR
- EMASK_M1
- EMASK_M10
- EMASK_M11
- EMASK_M12
- EMASK_M13
- EMASK_M14
- EMASK_M15
- EMASK_M16
- EMASK_M17
- EMASK_M18
- EMASK_M19
- EMASK_M2
- EMASK_M20
- EMASK_M21
- EMASK_M22
- EMASK_M23
- EMASK_M24
- EMASK_M25
- EMASK_M26
- EMASK_M27
- EMASK_M28
- EMASK_M29
- EMASK_M3
- EMASK_M4
- EMASK_M5
- EMASK_M6
- EMASK_M7
- EMASK_M8
- EMASK_M9
- EMAXERRNO
- EMAXPS
- EMA_ALPHA_SHIFT
- EMA_ALPHA_VAL
- EMBA
- EMBCMD_EDONE
- EMBCMD_ERD
- EMBCMD_EWDIS
- EMBCMD_EWEN
- EMBCMD_EWR
- EMBEDDED_LEVELS
- EMBEDDED_NAME_MAX
- EMBEDDED_SYNC
- EMBED_FH_OFF
- EMBED_MBX_MAX_PAYLOAD_SIZE
- EMBSYNC_EN
- EMBSYNC_R_CR_EN
- EMC6D100_REG_ALARM3
- EMC6D100_REG_IN
- EMC6D100_REG_IN_MAX
- EMC6D100_REG_IN_MIN
- EMC6D102_REG_EXTEND_ADC1
- EMC6D102_REG_EXTEND_ADC2
- EMC6D102_REG_EXTEND_ADC3
- EMC6D102_REG_EXTEND_ADC4
- EMC6W201_REG_COMPANY
- EMC6W201_REG_CONFIG
- EMC6W201_REG_FAN
- EMC6W201_REG_FAN_MIN
- EMC6W201_REG_IN
- EMC6W201_REG_IN_HIGH
- EMC6W201_REG_IN_LOW
- EMC6W201_REG_TEMP
- EMC6W201_REG_TEMP_HIGH
- EMC6W201_REG_TEMP_LOW
- EMC6W201_REG_VERSTEP
- EMCA_BUG
- EMCBASE_REG
- EMCR_ARB_DIAG
- EMCR_ARB_DIAG_IDLE
- EMCR_BADPAR
- EMCR_BUFSIZ
- EMCR_DUPLEX
- EMCR_LOOPBACK
- EMCR_PADEN
- EMCR_PROMISC
- EMCR_RAMPAR
- EMCR_RST
- EMCR_RXDMAEN
- EMCR_RXEN
- EMCR_RXOFF_MASK
- EMCR_RXOFF_SHIFT
- EMCR_TXDMAEN
- EMCR_TXEN
- EMC_ACT2PDEN
- EMC_ADR_CFG
- EMC_AR2PDEN
- EMC_AUTO_CAL_CONFIG
- EMC_AUTO_CAL_CONFIG2
- EMC_AUTO_CAL_CONFIG3
- EMC_AUTO_CAL_CONFIG_AUTO_CAL_START
- EMC_AUTO_CAL_INTERVAL
- EMC_AUTO_CAL_STATUS
- EMC_AUTO_CAL_STATUS_ACTIVE
- EMC_BGBIAS_CTL0
- EMC_BGBIAS_CTL0_BIAS0_DSC_E_PWRD
- EMC_BGBIAS_CTL0_BIAS0_DSC_E_PWRD_IBIAS_RX
- EMC_BGBIAS_CTL0_BIAS0_DSC_E_PWRD_IBIAS_VTTGEN
- EMC_BURST_REFRESH_NUM
- EMC_CCFIFO_ADDR
- EMC_CCFIFO_DATA
- EMC_CCFIFO_STATUS
- EMC_CDB_CNTL_1
- EMC_CDB_CNTL_2
- EMC_CDB_CNTL_3
- EMC_CFG
- EMC_CFG_2
- EMC_CFG_2_DIS_STP_OB_CLK_DURING_NON_WR
- EMC_CFG_2_MODE_SHIFT
- EMC_CFG_CLKTRIM_0
- EMC_CFG_CLKTRIM_1
- EMC_CFG_CLKTRIM_2
- EMC_CFG_DIG_DLL
- EMC_CFG_DIG_DLL_PERIOD
- EMC_CFG_DRAM_ACPD
- EMC_CFG_DRAM_CLKSTOP_PD
- EMC_CFG_DRAM_CLKSTOP_SR
- EMC_CFG_DSR_VTTGEN_DRV_EN
- EMC_CFG_DYN_SREF
- EMC_CFG_PIPE
- EMC_CFG_POWER_FEATURES_MASK
- EMC_CFG_PWR_MASK
- EMC_CLKCHANGE_COMPLETE_INT
- EMC_CLKCHANGE_PD_ENABLE
- EMC_CLKCHANGE_REQ_ENABLE
- EMC_CLKCHANGE_SR_ENABLE
- EMC_CTRL_REG
- EMC_CTT
- EMC_CTT_DURATION
- EMC_CTT_TERM_CTRL
- EMC_DLI_TRIM_TXDQS0
- EMC_DLI_TRIM_TXDQS1
- EMC_DLI_TRIM_TXDQS10
- EMC_DLI_TRIM_TXDQS11
- EMC_DLI_TRIM_TXDQS12
- EMC_DLI_TRIM_TXDQS13
- EMC_DLI_TRIM_TXDQS14
- EMC_DLI_TRIM_TXDQS15
- EMC_DLI_TRIM_TXDQS2
- EMC_DLI_TRIM_TXDQS3
- EMC_DLI_TRIM_TXDQS4
- EMC_DLI_TRIM_TXDQS5
- EMC_DLI_TRIM_TXDQS6
- EMC_DLI_TRIM_TXDQS7
- EMC_DLI_TRIM_TXDQS8
- EMC_DLI_TRIM_TXDQS9
- EMC_DLL_XFORM_ADDR0
- EMC_DLL_XFORM_ADDR1
- EMC_DLL_XFORM_ADDR2
- EMC_DLL_XFORM_ADDR3
- EMC_DLL_XFORM_ADDR4
- EMC_DLL_XFORM_ADDR5
- EMC_DLL_XFORM_DQ0
- EMC_DLL_XFORM_DQ1
- EMC_DLL_XFORM_DQ2
- EMC_DLL_XFORM_DQ3
- EMC_DLL_XFORM_DQ4
- EMC_DLL_XFORM_DQ5
- EMC_DLL_XFORM_DQ6
- EMC_DLL_XFORM_DQ7
- EMC_DLL_XFORM_DQS
- EMC_DLL_XFORM_DQS0
- EMC_DLL_XFORM_DQS1
- EMC_DLL_XFORM_DQS10
- EMC_DLL_XFORM_DQS11
- EMC_DLL_XFORM_DQS12
- EMC_DLL_XFORM_DQS13
- EMC_DLL_XFORM_DQS14
- EMC_DLL_XFORM_DQS15
- EMC_DLL_XFORM_DQS2
- EMC_DLL_XFORM_DQS3
- EMC_DLL_XFORM_DQS4
- EMC_DLL_XFORM_DQS5
- EMC_DLL_XFORM_DQS6
- EMC_DLL_XFORM_DQS7
- EMC_DLL_XFORM_DQS8
- EMC_DLL_XFORM_DQS9
- EMC_DLL_XFORM_QUSE
- EMC_DLL_XFORM_QUSE0
- EMC_DLL_XFORM_QUSE1
- EMC_DLL_XFORM_QUSE10
- EMC_DLL_XFORM_QUSE11
- EMC_DLL_XFORM_QUSE12
- EMC_DLL_XFORM_QUSE13
- EMC_DLL_XFORM_QUSE14
- EMC_DLL_XFORM_QUSE15
- EMC_DLL_XFORM_QUSE2
- EMC_DLL_XFORM_QUSE3
- EMC_DLL_XFORM_QUSE4
- EMC_DLL_XFORM_QUSE5
- EMC_DLL_XFORM_QUSE6
- EMC_DLL_XFORM_QUSE7
- EMC_DLL_XFORM_QUSE8
- EMC_DLL_XFORM_QUSE9
- EMC_DRAM_DEV_SEL
- EMC_DSR_VTTGEN_DRV
- EMC_DVFS_LATENCY_MAX_SIZE
- EMC_DYN_MEM_CTRL_OFS
- EMC_DYN_SELF_REF_CONTROL
- EMC_EINPUT
- EMC_EINPUT_DURATION
- EMC_EMC_STATUS
- EMC_EMRS
- EMC_EMRS2
- EMC_FBIO_CFG5
- EMC_FBIO_CFG5_DRAM_TYPE_MASK
- EMC_FBIO_CFG5_DRAM_TYPE_SHIFT
- EMC_FBIO_CFG6
- EMC_FBIO_SPARE
- EMC_GATHER_CLEAR
- EMC_GATHER_ENABLE
- EMC_IBDLY
- EMC_INTMASK
- EMC_INTSTATUS
- EMC_INTSTATUS_CLKCHANGE_COMPLETE
- EMC_MODE_SET_DLL_RESET
- EMC_MODE_SET_LONG_CNT
- EMC_MRR
- EMC_MRR_MA_SHIFT
- EMC_MRS
- EMC_MRS_WAIT_CNT
- EMC_MRS_WAIT_CNT2
- EMC_MRS_WAIT_CNT_LONG_WAIT_MASK
- EMC_MRS_WAIT_CNT_LONG_WAIT_SHIFT
- EMC_MRS_WAIT_CNT_SHORT_WAIT_MASK
- EMC_MRS_WAIT_CNT_SHORT_WAIT_SHIFT
- EMC_MRW
- EMC_MRW2
- EMC_MRW4
- EMC_NOP
- EMC_ODT_READ
- EMC_ODT_WRITE
- EMC_PCHG2PDEN
- EMC_PDEX2RD
- EMC_PDEX2WR
- EMC_PRE
- EMC_PRE_REFRESH_REQ_CNT
- EMC_PUTERM_ADJ
- EMC_PUTERM_EXTRA
- EMC_PUTERM_WIDTH
- EMC_QPOP
- EMC_QRST
- EMC_QSAFE
- EMC_QUSE
- EMC_QUSE_EXTRA
- EMC_QUSE_WIDTH
- EMC_R2P
- EMC_R2W
- EMC_RAS
- EMC_RC
- EMC_RDV
- EMC_RDV_MASK
- EMC_RD_RCD
- EMC_READ_PROP
- EMC_REF
- EMC_REFCTRL
- EMC_REFCTRL_DEV_SEL
- EMC_REFCTRL_DEV_SEL_SHIFT
- EMC_REFCTRL_ENABLE
- EMC_REFRESH
- EMC_REFRESH_OVERFLOW_INT
- EMC_REQ_CTRL
- EMC_REXT
- EMC_RFC
- EMC_RFC_SLR
- EMC_RP
- EMC_RRD
- EMC_RW2PDEN
- EMC_SELF_REF
- EMC_SELF_REF_CMD_ENABLED
- EMC_SELF_REF_DEV_SEL_SHIFT
- EMC_SEL_DPD_CTRL
- EMC_SEL_DPD_CTRL_CA_SEL_DPD
- EMC_SEL_DPD_CTRL_CLK_SEL_DPD
- EMC_SEL_DPD_CTRL_DATA_SEL_DPD
- EMC_SEL_DPD_CTRL_DDR3_MASK
- EMC_SEL_DPD_CTRL_MASK
- EMC_SEL_DPD_CTRL_ODT_SEL_DPD
- EMC_SEL_DPD_CTRL_RESET_SEL_DPD
- EMC_SRC_CLK_M
- EMC_SRC_PLL_C
- EMC_SRC_PLL_C2
- EMC_SRC_PLL_C3
- EMC_SRC_PLL_M
- EMC_SRC_PLL_P
- EMC_SRMMC
- EMC_STALL_THEN_EXE_AFTER_CLKCHANGE
- EMC_STATUS
- EMC_STATUS_TIMING_UPDATE_STALLED
- EMC_STATUS_UPDATE_TIMEOUT
- EMC_TCKE
- EMC_TCKESR
- EMC_TCLKSTABLE
- EMC_TCLKSTOP
- EMC_TFAW
- EMC_TIMING_CONTROL
- EMC_TIMING_UPDATE
- EMC_TPD
- EMC_TREFBW
- EMC_TRPAB
- EMC_TXDSRVTTGEN
- EMC_TXSR
- EMC_TXSRDLL
- EMC_W2P
- EMC_W2R
- EMC_WDV
- EMC_WDV_MASK
- EMC_WEXT
- EMC_WR_RCD
- EMC_XM2CLKPADCTRL
- EMC_XM2CLKPADCTRL2
- EMC_XM2CMDPADCTRL
- EMC_XM2CMDPADCTRL4
- EMC_XM2CMDPADCTRL5
- EMC_XM2COMPPADCTRL
- EMC_XM2DQPADCTRL
- EMC_XM2DQPADCTRL2
- EMC_XM2DQPADCTRL3
- EMC_XM2DQSPADCTRL
- EMC_XM2DQSPADCTRL2
- EMC_XM2DQSPADCTRL2_RX_FT_REC_ENABLE
- EMC_XM2DQSPADCTRL2_VREF_ENABLE
- EMC_XM2DQSPADCTRL3
- EMC_XM2DQSPADCTRL4
- EMC_XM2DQSPADCTRL5
- EMC_XM2DQSPADCTRL6
- EMC_XM2VTTGENPADCTRL
- EMC_XM2VTTGENPADCTRL2
- EMC_XM2VTTGENPADCTRL3
- EMC_ZCAL_INTERVAL
- EMC_ZCAL_REF_CNT
- EMC_ZCAL_WAIT_CNT
- EMC_ZQ_CAL
- EMC_ZQ_CAL_CMD
- EMC_ZQ_CAL_LONG
- EMC_ZQ_CAL_LONG_CMD_DEV0
- EMC_ZQ_CAL_LONG_CMD_DEV1
- EMEDIUMTYPE
- EMEM_CHK_RPT
- EMEM_CODE_DONE
- EMERGENCY_PRINT_LOAD_GPR4
- EMERGENCY_PRINT_LOAD_GPR5
- EMERGENCY_PRINT_LOAD_GPR6
- EMERGENCY_PRINT_LOAD_GPR7
- EMERGENCY_PRINT_LOAD_GPR8
- EMERGENCY_PRINT_LOAD_GPR9
- EMERGENCY_PRINT_STORE_GPR4
- EMERGENCY_PRINT_STORE_GPR5
- EMERGENCY_PRINT_STORE_GPR6
- EMERGENCY_PRINT_STORE_GPR7
- EMERGENCY_PRINT_STORE_GPR8
- EMERGENCY_PRINT_STORE_GPR9
- EMETA_VERSION_MAJOR
- EMETA_VERSION_MINOR
- EMETC_MAC_ADDR_FILT_RES
- EMEV2_SCU_BASE
- EMEV2_SMU_BASE
- EMEV_MUX_PIN
- EMFILE
- EMFL_VALID
- EMI
- EMI26B_PRODUCT_ID
- EMI26_PRODUCT_ID
- EMI26_VENDOR_ID
- EMI62_PRODUCT_ID
- EMI62_VENDOR_ID
- EMIFF_MRS
- EMIFF_SDRAM_CONFIG
- EMIFF_SDRAM_CONFIG_2
- EMIFF_SDRAM_CONFIG_ASM_OFFSET
- EMIFS_ACS
- EMIFS_ACS0
- EMIFS_ACS1
- EMIFS_ACS2
- EMIFS_ACS3
- EMIFS_CCS
- EMIFS_CONFIG
- EMIFS_CONFIG_ASM_OFFSET
- EMIFS_CS0_CONFIG
- EMIFS_CS1_CONFIG
- EMIFS_CS2_CONFIG
- EMIFS_CS3_CONFIG
- EMIFS_CS3_VAL
- EMIF_1B_ECC_ERR
- EMIF_1B_ECC_ERR_ADDR_LOG
- EMIF_1B_ECC_ERR_CNT
- EMIF_1B_ECC_ERR_THRSH
- EMIF_1B_ECC_ERR_THRSH_SHIFT
- EMIF_2B_ECC_ERR
- EMIF_2B_ECC_ERR_ADDR_LOG
- EMIF_4D
- EMIF_4D5
- EMIF_AM437X_REGISTERS
- EMIF_CFG_DYNAMIC_WS
- EMIF_CONNECTION_ID_TO_CLASS_OF_SERVICE_1_MAPPING
- EMIF_CONNECTION_ID_TO_CLASS_OF_SERVICE_2_MAPPING
- EMIF_COS_CONFIG
- EMIF_CUSTOM_CONFIG_EXTENDED_TEMP_PART
- EMIF_CUSTOM_CONFIG_LPMODE
- EMIF_CUSTOM_CONFIG_TEMP_ALERT_POLL_INTERVAL
- EMIF_DDR_PHY_CTRL_1
- EMIF_DDR_PHY_CTRL_1_BASE_VAL_ATTILAPHY
- EMIF_DDR_PHY_CTRL_1_BASE_VAL_INTELLIPHY
- EMIF_DDR_PHY_CTRL_1_SHDW
- EMIF_DDR_PHY_CTRL_2
- EMIF_DERATED_TIMINGS
- EMIF_DLL_CALIB_CTRL
- EMIF_DLL_CALIB_CTRL_SHDW
- EMIF_DLL_SLAVE_DLY_CTRL_100_MHZ_AND_LESS_ATTILAPHY
- EMIF_DLL_SLAVE_DLY_CTRL_200_MHZ_ATTILAPHY
- EMIF_DLL_SLAVE_DLY_CTRL_400_MHZ_ATTILAPHY
- EMIF_ECC_CTRL
- EMIF_END_OF_INTERRUPT
- EMIF_EXT_PHY_CTRL_1
- EMIF_EXT_PHY_CTRL_10
- EMIF_EXT_PHY_CTRL_10_SHDW
- EMIF_EXT_PHY_CTRL_10_VAL
- EMIF_EXT_PHY_CTRL_11
- EMIF_EXT_PHY_CTRL_11_SHDW
- EMIF_EXT_PHY_CTRL_11_VAL
- EMIF_EXT_PHY_CTRL_12
- EMIF_EXT_PHY_CTRL_12_SHDW
- EMIF_EXT_PHY_CTRL_12_VAL
- EMIF_EXT_PHY_CTRL_13
- EMIF_EXT_PHY_CTRL_13_SHDW
- EMIF_EXT_PHY_CTRL_13_VAL
- EMIF_EXT_PHY_CTRL_14
- EMIF_EXT_PHY_CTRL_14_SHDW
- EMIF_EXT_PHY_CTRL_14_VAL
- EMIF_EXT_PHY_CTRL_15
- EMIF_EXT_PHY_CTRL_15_SHDW
- EMIF_EXT_PHY_CTRL_15_VAL
- EMIF_EXT_PHY_CTRL_16
- EMIF_EXT_PHY_CTRL_16_SHDW
- EMIF_EXT_PHY_CTRL_16_VAL
- EMIF_EXT_PHY_CTRL_17
- EMIF_EXT_PHY_CTRL_17_SHDW
- EMIF_EXT_PHY_CTRL_17_VAL
- EMIF_EXT_PHY_CTRL_18
- EMIF_EXT_PHY_CTRL_18_SHDW
- EMIF_EXT_PHY_CTRL_18_VAL
- EMIF_EXT_PHY_CTRL_19
- EMIF_EXT_PHY_CTRL_19_SHDW
- EMIF_EXT_PHY_CTRL_19_VAL
- EMIF_EXT_PHY_CTRL_1_SHDW
- EMIF_EXT_PHY_CTRL_1_VAL
- EMIF_EXT_PHY_CTRL_2
- EMIF_EXT_PHY_CTRL_20
- EMIF_EXT_PHY_CTRL_20_SHDW
- EMIF_EXT_PHY_CTRL_20_VAL
- EMIF_EXT_PHY_CTRL_21
- EMIF_EXT_PHY_CTRL_21_SHDW
- EMIF_EXT_PHY_CTRL_21_VAL
- EMIF_EXT_PHY_CTRL_22
- EMIF_EXT_PHY_CTRL_22_SHDW
- EMIF_EXT_PHY_CTRL_22_VAL
- EMIF_EXT_PHY_CTRL_23
- EMIF_EXT_PHY_CTRL_23_SHDW
- EMIF_EXT_PHY_CTRL_23_VAL
- EMIF_EXT_PHY_CTRL_24
- EMIF_EXT_PHY_CTRL_24_SHDW
- EMIF_EXT_PHY_CTRL_24_VAL
- EMIF_EXT_PHY_CTRL_25
- EMIF_EXT_PHY_CTRL_25_SHDW
- EMIF_EXT_PHY_CTRL_26
- EMIF_EXT_PHY_CTRL_26_SHDW
- EMIF_EXT_PHY_CTRL_27
- EMIF_EXT_PHY_CTRL_27_SHDW
- EMIF_EXT_PHY_CTRL_28
- EMIF_EXT_PHY_CTRL_28_SHDW
- EMIF_EXT_PHY_CTRL_29
- EMIF_EXT_PHY_CTRL_29_SHDW
- EMIF_EXT_PHY_CTRL_2_SHDW
- EMIF_EXT_PHY_CTRL_3
- EMIF_EXT_PHY_CTRL_30
- EMIF_EXT_PHY_CTRL_30_SHDW
- EMIF_EXT_PHY_CTRL_3_SHDW
- EMIF_EXT_PHY_CTRL_4
- EMIF_EXT_PHY_CTRL_4_SHDW
- EMIF_EXT_PHY_CTRL_5
- EMIF_EXT_PHY_CTRL_5_SHDW
- EMIF_EXT_PHY_CTRL_5_VAL
- EMIF_EXT_PHY_CTRL_6
- EMIF_EXT_PHY_CTRL_6_SHDW
- EMIF_EXT_PHY_CTRL_6_VAL
- EMIF_EXT_PHY_CTRL_7
- EMIF_EXT_PHY_CTRL_7_SHDW
- EMIF_EXT_PHY_CTRL_7_VAL
- EMIF_EXT_PHY_CTRL_8
- EMIF_EXT_PHY_CTRL_8_SHDW
- EMIF_EXT_PHY_CTRL_8_VAL
- EMIF_EXT_PHY_CTRL_9
- EMIF_EXT_PHY_CTRL_9_SHDW
- EMIF_EXT_PHY_CTRL_9_VAL
- EMIF_HW_CAPS_LL_INTERFACE
- EMIF_INTELLI_PHY_DQS_GATE_OPENING_DELAY_PS
- EMIF_IODFT_TEST_LOGIC_ADDRESS_MISR_RESULT
- EMIF_IODFT_TEST_LOGIC_CTRL_MISR_RESULT
- EMIF_IODFT_TEST_LOGIC_DATA_MISR_RESULT_1
- EMIF_IODFT_TEST_LOGIC_DATA_MISR_RESULT_2
- EMIF_IODFT_TEST_LOGIC_DATA_MISR_RESULT_3
- EMIF_IODFT_TEST_LOGIC_GLOBAL_CONTROL
- EMIF_IRQ_ENABLE_SET
- EMIF_IRQ_STATUS
- EMIF_LL_OCP_INTERRUPT_ENABLE_CLEAR
- EMIF_LL_OCP_INTERRUPT_ENABLE_SET
- EMIF_LL_OCP_INTERRUPT_RAW_STATUS
- EMIF_LL_OCP_INTERRUPT_STATUS
- EMIF_LPDDR2_MODE_REG_CONFIG
- EMIF_LPDDR2_MODE_REG_DATA
- EMIF_LPDDR2_NVM_TIMING
- EMIF_LPDDR2_NVM_TIMING_SHDW
- EMIF_LP_MODE_CLOCK_STOP
- EMIF_LP_MODE_DISABLE
- EMIF_LP_MODE_FREQ_THRESHOLD
- EMIF_LP_MODE_PWR_DN
- EMIF_LP_MODE_SELF_REFRESH
- EMIF_LP_MODE_TIMEOUT_PERFORMANCE
- EMIF_LP_MODE_TIMEOUT_POWER
- EMIF_MAX_NUM_FREQUENCIES
- EMIF_MISC_REG
- EMIF_MODULE_ID_AND_REVISION
- EMIF_NORMAL_TIMINGS
- EMIF_OCP_CONFIG
- EMIF_OCP_CONFIG_VALUE_1
- EMIF_OCP_CONFIG_VALUE_2
- EMIF_OCP_ERROR_LOG
- EMIF_PERFORMANCE_COUNTER_1
- EMIF_PERFORMANCE_COUNTER_2
- EMIF_PERFORMANCE_COUNTER_CONFIG
- EMIF_PERFORMANCE_COUNTER_MASTER_REGION_SELECT
- EMIF_PERFORMANCE_COUNTER_TIME
- EMIF_PHY_STATUS_1
- EMIF_PHY_STATUS_10
- EMIF_PHY_STATUS_11
- EMIF_PHY_STATUS_12
- EMIF_PHY_STATUS_13
- EMIF_PHY_STATUS_14
- EMIF_PHY_STATUS_15
- EMIF_PHY_STATUS_16
- EMIF_PHY_STATUS_17
- EMIF_PHY_STATUS_18
- EMIF_PHY_STATUS_19
- EMIF_PHY_STATUS_2
- EMIF_PHY_STATUS_20
- EMIF_PHY_STATUS_21
- EMIF_PHY_STATUS_3
- EMIF_PHY_STATUS_4
- EMIF_PHY_STATUS_5
- EMIF_PHY_STATUS_6
- EMIF_PHY_STATUS_7
- EMIF_PHY_STATUS_8
- EMIF_PHY_STATUS_9
- EMIF_PHY_TOTAL_READ_LATENCY_INTELLIPHY_PS
- EMIF_PHY_TYPE_ATTILAPHY
- EMIF_PHY_TYPE_INTELLIPHY
- EMIF_POWER_MANAGEMENT_CONTROL
- EMIF_POWER_MANAGEMENT_CTRL_SHDW
- EMIF_POWER_MGMT_SELF_REFRESH_MODE
- EMIF_POWER_MGMT_SELF_REFRESH_MODE_MASK
- EMIF_POWER_MGMT_SR_TIMER_MASK
- EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES
- EMIF_PRIORITY_TO_CLASS_OF_SERVICE_MAPPING
- EMIF_READ_IDLE_LEN_VAL
- EMIF_READ_WRITE_EXECUTION_THRESHOLD
- EMIF_READ_WRITE_LEVELING_CONTROL
- EMIF_READ_WRITE_LEVELING_RAMP_CONTROL
- EMIF_READ_WRITE_LEVELING_RAMP_WINDOW
- EMIF_SDCFG_TYPE_DDR2
- EMIF_SDCFG_TYPE_DDR3
- EMIF_SDRAM_CONFIG
- EMIF_SDRAM_CONFIG_2
- EMIF_SDRAM_OUTPUT_IMPEDANCE_CALIBRATION_CONFIG
- EMIF_SDRAM_REFRESH_CONTROL
- EMIF_SDRAM_REFRESH_CTRL_SHDW
- EMIF_SDRAM_TIMING_1
- EMIF_SDRAM_TIMING_1_SHDW
- EMIF_SDRAM_TIMING_2
- EMIF_SDRAM_TIMING_2_SHDW
- EMIF_SDRAM_TIMING_3
- EMIF_SDRAM_TIMING_3_SHDW
- EMIF_SRAM_AM33_REG_LAYOUT
- EMIF_SRAM_AM43_REG_LAYOUT
- EMIF_STATUS
- EMIF_STATUS_READY
- EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_CLEAR
- EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET
- EMIF_SYSTEM_OCP_INTERRUPT_RAW_STATUS
- EMIF_SYSTEM_OCP_INTERRUPT_STATUS
- EMIF_SYS_ERR
- EMIF_TEMPERATURE_ALERT_CONFIG
- EMIF_TYPE_DRA7
- EMIF_TYPE_K2
- EMIF_T_CSTA
- EMIF_T_PDLL_UL
- EMIF_WR_ECC_ERR
- EMIF_ZQCS_INTERVAL_US
- EMIQ_IRQ_NUM
- EMIT
- EMIT1
- EMIT1_off32
- EMIT2
- EMIT2_off32
- EMIT3
- EMIT3_off32
- EMIT4
- EMIT4_DISP
- EMIT4_IMM
- EMIT4_PCREL
- EMIT4_RRF
- EMIT4_off32
- EMIT6_DISP_LH
- EMIT6_IMM
- EMIT6_PCREL
- EMIT6_PCREL_IMM_LABEL
- EMIT6_PCREL_LABEL
- EMIT6_PCREL_RIL
- EMIT6_PCREL_RILB
- EMITTED
- EMITTING
- EMIT_ALG
- EMIT_BARRIER
- EMIT_CONST_U32
- EMIT_CONST_U64
- EMIT_FLUSH
- EMIT_INVALIDATE
- EMIT_VVAR
- EMIT_ZERO
- EMIT_mov
- EMI_A00
- EMI_A01
- EMI_A02
- EMI_A03
- EMI_A04
- EMI_A05
- EMI_A06
- EMI_A07
- EMI_A08
- EMI_A09
- EMI_A10
- EMI_A11
- EMI_A12
- EMI_A13
- EMI_A14
- EMI_BA0
- EMI_BA1
- EMI_BA2
- EMI_CASN
- EMI_CE0N
- EMI_CE1N
- EMI_CKE
- EMI_CLK
- EMI_CLKN
- EMI_D00
- EMI_D01
- EMI_D02
- EMI_D03
- EMI_D04
- EMI_D05
- EMI_D06
- EMI_D07
- EMI_D08
- EMI_D09
- EMI_D10
- EMI_D11
- EMI_D12
- EMI_D13
- EMI_D14
- EMI_D15
- EMI_DDR_OPEN
- EMI_DDR_OPEN_FB
- EMI_DQM0
- EMI_DQM1
- EMI_DQS0
- EMI_DQS1
- EMI_ERR
- EMI_FSMC_DYNAMIC_MUX_MASK
- EMI_ODT0
- EMI_ODT1
- EMI_RASN
- EMI_WEN
- EMLINK
- EMMA2RH_BASE
- EMMA2RH_BHIF_EXCEPT_VECT_BASE_ADDRESS
- EMMA2RH_BHIF_INT1_EN_0
- EMMA2RH_BHIF_INT1_EN_1
- EMMA2RH_BHIF_INT1_EN_2
- EMMA2RH_BHIF_INT_EN_0
- EMMA2RH_BHIF_INT_EN_1
- EMMA2RH_BHIF_INT_EN_2
- EMMA2RH_BHIF_INT_ST_0
- EMMA2RH_BHIF_INT_ST_1
- EMMA2RH_BHIF_INT_ST_2
- EMMA2RH_BHIF_MAIN_CTRL
- EMMA2RH_BHIF_STRAP_0
- EMMA2RH_BHIF_SW_INT
- EMMA2RH_BHIF_SW_INT_CLR
- EMMA2RH_BHIF_SW_INT_EN
- EMMA2RH_GENERALIO_BASE
- EMMA2RH_GENERALIO_SIZE
- EMMA2RH_GPIO_CASCADE
- EMMA2RH_GPIO_DIR
- EMMA2RH_GPIO_INT_CND_A
- EMMA2RH_GPIO_INT_CND_B
- EMMA2RH_GPIO_INT_MASK
- EMMA2RH_GPIO_INT_MODE
- EMMA2RH_GPIO_INT_ST
- EMMA2RH_GPIO_IRQ_BASE
- EMMA2RH_IO_BASE
- EMMA2RH_IO_SIZE
- EMMA2RH_IRQ_BASE
- EMMA2RH_IRQ_INT
- EMMA2RH_IRQ_PFUR0
- EMMA2RH_IRQ_PFUR1
- EMMA2RH_IRQ_PFUR2
- EMMA2RH_IRQ_PIIC0
- EMMA2RH_IRQ_PIIC1
- EMMA2RH_IRQ_PIIC2
- EMMA2RH_PBRD_CLKSEL
- EMMA2RH_PBRD_INT_EN
- EMMA2RH_PCI_ARBIT_CTR
- EMMA2RH_PCI_CONFIG_BASE
- EMMA2RH_PCI_CONFIG_SIZE
- EMMA2RH_PCI_CONTROL
- EMMA2RH_PCI_HOST_SLOT
- EMMA2RH_PCI_INIT_ESWP
- EMMA2RH_PCI_INT
- EMMA2RH_PCI_INT_EN
- EMMA2RH_PCI_IO_BASE
- EMMA2RH_PCI_IO_SIZE
- EMMA2RH_PCI_IWIN0_CTR
- EMMA2RH_PCI_IWIN1_CTR
- EMMA2RH_PCI_MEM_BASE
- EMMA2RH_PCI_MEM_SIZE
- EMMA2RH_PCI_SLOT_NUM
- EMMA2RH_PCI_TWIN0_DADR
- EMMA2RH_PCI_TWIN1_DADR
- EMMA2RH_PCI_TWIN_BADR
- EMMA2RH_PCI_TWIN_CTR
- EMMA2RH_PFUR0_BASE
- EMMA2RH_PFUR1_BASE
- EMMA2RH_PFUR2_BASE
- EMMA2RH_PIIC0_BASE
- EMMA2RH_PIIC1_BASE
- EMMA2RH_PIIC2_BASE
- EMMA2RH_RAM_BASE
- EMMA2RH_RAM_SIZE
- EMMA2RH_ROM_BASE
- EMMA2RH_ROM_SIZE
- EMMA2RH_SERIAL_CLOCK
- EMMA2RH_SERIAL_FLAGS
- EMMA2RH_SW_CASCADE
- EMMA2RH_SW_IRQ_BASE
- EMMA2RH_SW_IRQ_INT
- EMMA2RH_USB_SLOT
- EMMAPRP_MODULE_NAME
- EMMC50_CFG0
- EMMC50_CFG3
- EMMC50_CFG3_OUTS_WR
- EMMC50_CFG_CFCSTS_SEL
- EMMC50_CFG_CRCSTS_EDGE
- EMMC50_CFG_PADCMD_LATCHCK
- EMMC50_PAD_DS_TUNE
- EMMC_5_0_PHY
- EMMC_5_1_PHY
- EMMC_IOCON
- EMMC_NAND_AHB
- EMMC_NAND_AXI
- EMMC_PLL
- EMMC_TOP_CMD
- EMMC_TOP_CONTROL
- EMMC_WCLK
- EMMH32_MSGLEN_MAX
- EMMX
- EMM_STREAM
- EMONREPEAT
- EMONREPEAT_ENDLESS
- EMONREPEAT_PERIOD
- EMONREPEAT_PERIOD_1000000
- EMPEG_PRODUCT_ID
- EMPEG_VENDOR_ID
- EMPSYNC_B_CB_EN
- EMPSYNC_G_Y_EN
- EMPTY
- EMPTYWAIT
- EMPTY_ARRAY
- EMPTY_DIR_SIZE
- EMPTY_DIR_SIZE_V1
- EMPTY_ENTRY
- EMPTY_FW_IMAGE_STR
- EMPTY_FW_VERSION_STR
- EMPTY_HASH
- EMPTY_INTEN
- EMPTY_PGE
- EMPTY_PGT
- EMPTY_QUEUE
- EMPTY_REGS
- EMPTY_REG_OFFSET
- EMPTY_RX_REFILL
- EMPTY_SCAN_SIZE
- EMPTY_SCB
- EMPTY_SLOT
- EMPTY_SLOT_INDEX
- EMPTY_STATUS
- EMPTY_TIMER_MAPPING
- EMPTY_UML_PT_REGS
- EMPTY_VALUE
- EMP_EN
- EMP_EN_MUX
- EMR
- EMR_BASE
- EMR_MASK
- EMSGSIZE
- EMS_CMD_MAP
- EMS_CMD_RESET
- EMS_CMD_UMAP
- EMS_PCI_BASE_SIZE
- EMS_PCI_CAN_BASE_OFFSET
- EMS_PCI_CAN_CLOCK
- EMS_PCI_CAN_CTRL_SIZE
- EMS_PCI_CDR
- EMS_PCI_MAX_CHAN
- EMS_PCI_OCR
- EMS_PCI_V1_BASE_BAR
- EMS_PCI_V1_CONF_SIZE
- EMS_PCI_V1_MAX_CHAN
- EMS_PCI_V2_BASE_BAR
- EMS_PCI_V2_CONF_SIZE
- EMS_PCI_V2_MAX_CHAN
- EMS_PCMCIA_CAN_BASE_OFFSET
- EMS_PCMCIA_CAN_CLOCK
- EMS_PCMCIA_CAN_CTRL_SIZE
- EMS_PCMCIA_CDR
- EMS_PCMCIA_MAX_CHAN
- EMS_PCMCIA_MEM_SIZE
- EMS_PCMCIA_OCR
- EMS_USB_ARM7_CLOCK
- EMT_ENABLE
- EMT_TAGOVF
- EMU0404_FILENAME
- EMU1010B_FILENAME
- EMU1010_ADC_PADS
- EMU1010_DAC_PADS
- EMU1010_NOTEBOOK_FILENAME
- EMU1010_SOURCE_INPUT
- EMU1010_SOURCE_OUTPUT
- EMU10K1X_MIDI_MODE_INPUT
- EMU10K1X_MIDI_MODE_OUTPUT
- EMU10K1_CAPTURE_DIGITAL_OUT
- EMU10K1_CARD_CREATIVE
- EMU10K1_CARD_EMUAPS
- EMU10K1_CENTER_LFE_FROM_FRONT
- EMU10K1_DBG_CONDITION_CODE
- EMU10K1_DBG_SATURATION_ADDR
- EMU10K1_DBG_SATURATION_OCCURED
- EMU10K1_DBG_SINGLE_STEP
- EMU10K1_DBG_SINGLE_STEP_ADDR
- EMU10K1_DBG_STEP
- EMU10K1_DBG_ZC
- EMU10K1_DMA_MASK
- EMU10K1_EFX
- EMU10K1_FX8010_PCM_COUNT
- EMU10K1_GPR_TRANSLATION_BASS
- EMU10K1_GPR_TRANSLATION_NONE
- EMU10K1_GPR_TRANSLATION_ONOFF
- EMU10K1_GPR_TRANSLATION_TABLE100
- EMU10K1_GPR_TRANSLATION_TREBLE
- EMU10K1_MAX_MEMSIZE
- EMU10K1_MAX_TRAM_BLOCKS_PER_CODE
- EMU10K1_MIDI
- EMU10K1_MIDI_MODE_INPUT
- EMU10K1_MIDI_MODE_OUTPUT
- EMU10K1_PCM
- EMU10K1_SET_AC3_IEC958
- EMU10K1_SYNTH
- EMU8000_0080_WRITE
- EMU8000_00A0_WRITE
- EMU8000_ATKHLDV_READ
- EMU8000_ATKHLDV_WRITE
- EMU8000_ATKHLD_READ
- EMU8000_ATKHLD_WRITE
- EMU8000_CCCA_READ
- EMU8000_CCCA_WRITE
- EMU8000_CHANNELS
- EMU8000_CMD
- EMU8000_CONTROL_BASS
- EMU8000_CONTROL_CHORUS_MODE
- EMU8000_CONTROL_FM_CHORUS_DEPTH
- EMU8000_CONTROL_FM_REVERB_DEPTH
- EMU8000_CONTROL_REVERB_MODE
- EMU8000_CONTROL_TREBLE
- EMU8000_CPF_READ
- EMU8000_CPF_WRITE
- EMU8000_CSL_READ
- EMU8000_CSL_WRITE
- EMU8000_CVCF_READ
- EMU8000_CVCF_WRITE
- EMU8000_DATA0
- EMU8000_DATA1
- EMU8000_DATA2
- EMU8000_DATA3
- EMU8000_DCYSUSV_READ
- EMU8000_DCYSUSV_WRITE
- EMU8000_DCYSUS_READ
- EMU8000_DCYSUS_WRITE
- EMU8000_DRAM_OFFSET
- EMU8000_DRAM_VOICES
- EMU8000_ENVVAL_READ
- EMU8000_ENVVAL_WRITE
- EMU8000_ENVVOL_READ
- EMU8000_ENVVOL_WRITE
- EMU8000_FM2FRQ2_READ
- EMU8000_FM2FRQ2_WRITE
- EMU8000_FMMOD_READ
- EMU8000_FMMOD_WRITE
- EMU8000_HWCF1_READ
- EMU8000_HWCF1_WRITE
- EMU8000_HWCF2_READ
- EMU8000_HWCF2_WRITE
- EMU8000_HWCF3_READ
- EMU8000_HWCF3_WRITE
- EMU8000_HWCF4_READ
- EMU8000_HWCF4_WRITE
- EMU8000_HWCF5_READ
- EMU8000_HWCF5_WRITE
- EMU8000_HWCF6_READ
- EMU8000_HWCF6_WRITE
- EMU8000_HWCF7_WRITE
- EMU8000_IFATN_READ
- EMU8000_IFATN_WRITE
- EMU8000_INIT1_READ
- EMU8000_INIT1_WRITE
- EMU8000_INIT2_READ
- EMU8000_INIT2_WRITE
- EMU8000_INIT3_READ
- EMU8000_INIT3_WRITE
- EMU8000_INIT4_READ
- EMU8000_INIT4_WRITE
- EMU8000_IP_READ
- EMU8000_IP_WRITE
- EMU8000_LFO1VAL_READ
- EMU8000_LFO1VAL_WRITE
- EMU8000_LFO2VAL_READ
- EMU8000_LFO2VAL_WRITE
- EMU8000_MAX_DRAM
- EMU8000_NUM_CONTROLS
- EMU8000_PEFE_READ
- EMU8000_PEFE_WRITE
- EMU8000_PSST_READ
- EMU8000_PSST_WRITE
- EMU8000_PTR
- EMU8000_PTRX_READ
- EMU8000_PTRX_WRITE
- EMU8000_RAM_CLOSE
- EMU8000_RAM_MODE_MASK
- EMU8000_RAM_READ
- EMU8000_RAM_RIGHT
- EMU8000_RAM_WRITE
- EMU8000_SMALR_READ
- EMU8000_SMALR_WRITE
- EMU8000_SMALW_READ
- EMU8000_SMALW_WRITE
- EMU8000_SMARR_READ
- EMU8000_SMARR_WRITE
- EMU8000_SMARW_READ
- EMU8000_SMARW_WRITE
- EMU8000_SMLD_READ
- EMU8000_SMLD_WRITE
- EMU8000_SMRD_READ
- EMU8000_SMRD_WRITE
- EMU8000_TREMFRQ_READ
- EMU8000_TREMFRQ_WRITE
- EMU8000_VTFT_READ
- EMU8000_VTFT_WRITE
- EMU8000_WC_READ
- EMU8000_WC_WRITE
- EMUCS
- EMUCS_ADDR
- EMUCS_WS_MASK
- EMUCS_WS_SHIFT
- EMULATE
- EMULATED_HD_DISK_MINOR_OFFSET
- EMULATED_HD_DISK_NAME_OFFSET
- EMULATED_INST_EXITS
- EMULATED_MFMSR_EXITS
- EMULATED_MFSPR_EXITS
- EMULATED_MTMSRWE_EXITS
- EMULATED_MTMSR_EXITS
- EMULATED_MTSPR_EXITS
- EMULATED_RFCI_EXITS
- EMULATED_RFDI_EXITS
- EMULATED_RFI_EXITS
- EMULATED_SD_DISK_MINOR_OFFSET
- EMULATED_SD_DISK_NAME_OFFSET
- EMULATED_TLBSX_EXITS
- EMULATED_TLBWE_EXITS
- EMULATED_WRTEE_EXITS
- EMULATE_AGAIN
- EMULATE_DONE
- EMULATE_DO_MMIO
- EMULATE_EXCEPT
- EMULATE_EXIT_USER
- EMULATE_FAIL
- EMULATE_HYPERCALL
- EMULATE_PRIV_FAIL
- EMULATE_WAIT
- EMULATION_FAILED
- EMULATION_INTERCEPTED
- EMULATION_OK
- EMULATION_PREVENTION_THREE_BYTE
- EMULATION_RESTART
- EMULATION_VERSION
- EMULEX_VENDOR_ID
- EMULTIHOP
- EMULTYPE_ALLOW_RETRY
- EMULTYPE_NO_DECODE
- EMULTYPE_SKIP
- EMULTYPE_TRAP_UD
- EMULTYPE_TRAP_UD_FORCED
- EMULTYPE_VMWARE_GP
- EMUMGT
- EMUPAGESIZE
- EMUX_FX_ATTEN
- EMUX_FX_CHORUS
- EMUX_FX_COARSE_LOOP_END
- EMUX_FX_COARSE_LOOP_START
- EMUX_FX_COARSE_SAMPLE_START
- EMUX_FX_CUTOFF
- EMUX_FX_END
- EMUX_FX_ENV1_ATTACK
- EMUX_FX_ENV1_CUTOFF
- EMUX_FX_ENV1_DECAY
- EMUX_FX_ENV1_DELAY
- EMUX_FX_ENV1_HOLD
- EMUX_FX_ENV1_PITCH
- EMUX_FX_ENV1_RELEASE
- EMUX_FX_ENV1_SUSTAIN
- EMUX_FX_ENV2_ATTACK
- EMUX_FX_ENV2_DECAY
- EMUX_FX_ENV2_DELAY
- EMUX_FX_ENV2_HOLD
- EMUX_FX_ENV2_RELEASE
- EMUX_FX_ENV2_SUSTAIN
- EMUX_FX_FILTERQ
- EMUX_FX_FLAG_ADD
- EMUX_FX_FLAG_OFF
- EMUX_FX_FLAG_SET
- EMUX_FX_INIT_PITCH
- EMUX_FX_LFO1_CUTOFF
- EMUX_FX_LFO1_DELAY
- EMUX_FX_LFO1_FREQ
- EMUX_FX_LFO1_PITCH
- EMUX_FX_LFO1_VOLUME
- EMUX_FX_LFO2_DELAY
- EMUX_FX_LFO2_FREQ
- EMUX_FX_LFO2_PITCH
- EMUX_FX_LOOP_END
- EMUX_FX_LOOP_START
- EMUX_FX_REVERB
- EMUX_FX_SAMPLE_START
- EMUX_MD_BASS_LEVEL
- EMUX_MD_CHN_PRIOR
- EMUX_MD_CHORUS_MODE
- EMUX_MD_DEBUG_MODE
- EMUX_MD_DEF_BANK
- EMUX_MD_DEF_DRUM
- EMUX_MD_DEF_PRESET
- EMUX_MD_END
- EMUX_MD_EXCLUSIVE_OFF
- EMUX_MD_EXCLUSIVE_ON
- EMUX_MD_EXCLUSIVE_SOUND
- EMUX_MD_GUS_BANK
- EMUX_MD_KEEP_EFFECT
- EMUX_MD_MOD_SENSE
- EMUX_MD_NEW_VOLUME_CALC
- EMUX_MD_PAN_EXCHANGE
- EMUX_MD_REALTIME_PAN
- EMUX_MD_REVERB_MODE
- EMUX_MD_TOGGLE_DRUM_BANK
- EMUX_MD_TREBLE_LEVEL
- EMUX_MD_VERSION
- EMUX_MD_ZERO_ATTEN
- EMUX_NUM_EFFECTS
- EMU_ADDRESSING
- EMU_AE_ENABLEX
- EMU_BIST_STATUSX
- EMU_DOCK_BOARD_ID
- EMU_DOCK_BOARD_ID0
- EMU_DOCK_BOARD_ID1
- EMU_DOCK_MAJOR_REV
- EMU_DOCK_MINOR_REV
- EMU_DST_ALICE2_EMU32_0
- EMU_DST_ALICE2_EMU32_1
- EMU_DST_ALICE2_EMU32_2
- EMU_DST_ALICE2_EMU32_3
- EMU_DST_ALICE2_EMU32_4
- EMU_DST_ALICE2_EMU32_5
- EMU_DST_ALICE2_EMU32_6
- EMU_DST_ALICE2_EMU32_7
- EMU_DST_ALICE2_EMU32_8
- EMU_DST_ALICE2_EMU32_9
- EMU_DST_ALICE2_EMU32_A
- EMU_DST_ALICE2_EMU32_B
- EMU_DST_ALICE2_EMU32_C
- EMU_DST_ALICE2_EMU32_D
- EMU_DST_ALICE2_EMU32_E
- EMU_DST_ALICE2_EMU32_F
- EMU_DST_ALICE_I2S0_LEFT
- EMU_DST_ALICE_I2S0_RIGHT
- EMU_DST_ALICE_I2S1_LEFT
- EMU_DST_ALICE_I2S1_RIGHT
- EMU_DST_ALICE_I2S2_LEFT
- EMU_DST_ALICE_I2S2_RIGHT
- EMU_DST_DOCK_DAC1_LEFT1
- EMU_DST_DOCK_DAC1_LEFT2
- EMU_DST_DOCK_DAC1_LEFT3
- EMU_DST_DOCK_DAC1_LEFT4
- EMU_DST_DOCK_DAC1_RIGHT1
- EMU_DST_DOCK_DAC1_RIGHT2
- EMU_DST_DOCK_DAC1_RIGHT3
- EMU_DST_DOCK_DAC1_RIGHT4
- EMU_DST_DOCK_DAC2_LEFT1
- EMU_DST_DOCK_DAC2_LEFT2
- EMU_DST_DOCK_DAC2_LEFT3
- EMU_DST_DOCK_DAC2_LEFT4
- EMU_DST_DOCK_DAC2_RIGHT1
- EMU_DST_DOCK_DAC2_RIGHT2
- EMU_DST_DOCK_DAC2_RIGHT3
- EMU_DST_DOCK_DAC2_RIGHT4
- EMU_DST_DOCK_DAC3_LEFT1
- EMU_DST_DOCK_DAC3_LEFT2
- EMU_DST_DOCK_DAC3_LEFT3
- EMU_DST_DOCK_DAC3_LEFT4
- EMU_DST_DOCK_DAC3_RIGHT1
- EMU_DST_DOCK_DAC3_RIGHT2
- EMU_DST_DOCK_DAC3_RIGHT3
- EMU_DST_DOCK_DAC3_RIGHT4
- EMU_DST_DOCK_DAC4_LEFT1
- EMU_DST_DOCK_DAC4_LEFT2
- EMU_DST_DOCK_DAC4_LEFT3
- EMU_DST_DOCK_DAC4_LEFT4
- EMU_DST_DOCK_DAC4_RIGHT1
- EMU_DST_DOCK_DAC4_RIGHT2
- EMU_DST_DOCK_DAC4_RIGHT3
- EMU_DST_DOCK_DAC4_RIGHT4
- EMU_DST_DOCK_PHONES_LEFT1
- EMU_DST_DOCK_PHONES_LEFT2
- EMU_DST_DOCK_PHONES_RIGHT1
- EMU_DST_DOCK_PHONES_RIGHT2
- EMU_DST_DOCK_SPDIF_LEFT1
- EMU_DST_DOCK_SPDIF_LEFT2
- EMU_DST_DOCK_SPDIF_RIGHT1
- EMU_DST_DOCK_SPDIF_RIGHT2
- EMU_DST_HAMOA_DAC_LEFT1
- EMU_DST_HAMOA_DAC_LEFT2
- EMU_DST_HAMOA_DAC_LEFT3
- EMU_DST_HAMOA_DAC_LEFT4
- EMU_DST_HAMOA_DAC_RIGHT1
- EMU_DST_HAMOA_DAC_RIGHT2
- EMU_DST_HAMOA_DAC_RIGHT3
- EMU_DST_HAMOA_DAC_RIGHT4
- EMU_DST_HANA_ADAT
- EMU_DST_HANA_SPDIF_LEFT1
- EMU_DST_HANA_SPDIF_LEFT2
- EMU_DST_HANA_SPDIF_RIGHT1
- EMU_DST_HANA_SPDIF_RIGHT2
- EMU_DST_MANA_DAC_LEFT
- EMU_DST_MANA_DAC_RIGHT
- EMU_DST_MDOCK_ADAT
- EMU_DST_MDOCK_SPDIF_LEFT1
- EMU_DST_MDOCK_SPDIF_LEFT2
- EMU_DST_MDOCK_SPDIF_RIGHT1
- EMU_DST_MDOCK_SPDIF_RIGHT2
- EMU_FLOAT_X
- EMU_FTRC_X
- EMU_FUSE_MAPX
- EMU_GE_INT_ENA_W1SX
- EMU_HANA2_WC_SPDIF_HI
- EMU_HANA2_WC_SPDIF_LO
- EMU_HANA_0202_ADC_PAD1
- EMU_HANA_0202_DAC_PAD1
- EMU_HANA_ADC_PADS
- EMU_HANA_DAC_PADS
- EMU_HANA_DEFCLOCK
- EMU_HANA_DEFCLOCK_44_1K
- EMU_HANA_DEFCLOCK_48K
- EMU_HANA_DESTHI
- EMU_HANA_DESTLO
- EMU_HANA_DOCK_ADC_PAD1
- EMU_HANA_DOCK_ADC_PAD2
- EMU_HANA_DOCK_ADC_PAD3
- EMU_HANA_DOCK_DAC1_MUTE
- EMU_HANA_DOCK_DAC2_MUTE
- EMU_HANA_DOCK_DAC3_MUTE
- EMU_HANA_DOCK_DAC4_MUTE
- EMU_HANA_DOCK_DAC_PAD1
- EMU_HANA_DOCK_DAC_PAD2
- EMU_HANA_DOCK_DAC_PAD3
- EMU_HANA_DOCK_DAC_PAD4
- EMU_HANA_DOCK_LEDS_1
- EMU_HANA_DOCK_LEDS_1_MIDI1
- EMU_HANA_DOCK_LEDS_1_MIDI2
- EMU_HANA_DOCK_LEDS_1_SMPTE_IN
- EMU_HANA_DOCK_LEDS_1_SMPTE_OUT
- EMU_HANA_DOCK_LEDS_2
- EMU_HANA_DOCK_LEDS_2_192K
- EMU_HANA_DOCK_LEDS_2_44K
- EMU_HANA_DOCK_LEDS_2_48K
- EMU_HANA_DOCK_LEDS_2_96K
- EMU_HANA_DOCK_LEDS_2_EXT
- EMU_HANA_DOCK_LEDS_2_LOCK
- EMU_HANA_DOCK_LEDS_3
- EMU_HANA_DOCK_LEDS_3_CLIP_A
- EMU_HANA_DOCK_LEDS_3_CLIP_B
- EMU_HANA_DOCK_LEDS_3_MANUAL_CLIP
- EMU_HANA_DOCK_LEDS_3_MANUAL_SIGNAL
- EMU_HANA_DOCK_LEDS_3_SIGNAL_A
- EMU_HANA_DOCK_LEDS_3_SIGNAL_B
- EMU_HANA_DOCK_MISC
- EMU_HANA_DOCK_PHONES_192_DAC1
- EMU_HANA_DOCK_PHONES_192_DAC2
- EMU_HANA_DOCK_PHONES_192_DAC3
- EMU_HANA_DOCK_PHONES_192_DAC4
- EMU_HANA_DOCK_PWR
- EMU_HANA_DOCK_PWR_ON
- EMU_HANA_FPGA_CONFIG
- EMU_HANA_FPGA_CONFIG_AUDIODOCK
- EMU_HANA_FPGA_CONFIG_HANA
- EMU_HANA_ID
- EMU_HANA_IRQ_ADAT
- EMU_HANA_IRQ_DOCK
- EMU_HANA_IRQ_DOCK_LOST
- EMU_HANA_IRQ_ENABLE
- EMU_HANA_IRQ_STATUS
- EMU_HANA_IRQ_WCLK_CHANGED
- EMU_HANA_MAJOR_REV
- EMU_HANA_MIDI_IN
- EMU_HANA_MIDI_IN_FROM_DOCK
- EMU_HANA_MIDI_IN_FROM_HAMOA
- EMU_HANA_MIDI_OUT
- EMU_HANA_MIDI_OUT_0202
- EMU_HANA_MIDI_OUT_DOCK1
- EMU_HANA_MIDI_OUT_DOCK2
- EMU_HANA_MIDI_OUT_LOOP
- EMU_HANA_MIDI_OUT_SYNC2
- EMU_HANA_MINOR_REV
- EMU_HANA_OPTICAL_IN_ADAT
- EMU_HANA_OPTICAL_IN_SPDIF
- EMU_HANA_OPTICAL_OUT_ADAT
- EMU_HANA_OPTICAL_OUT_SPDIF
- EMU_HANA_OPTICAL_TYPE
- EMU_HANA_OPTION_CARDS
- EMU_HANA_OPTION_DOCK_OFFLINE
- EMU_HANA_OPTION_DOCK_ONLINE
- EMU_HANA_OPTION_HAMOA
- EMU_HANA_OPTION_SYNC
- EMU_HANA_SPDIF_MODE
- EMU_HANA_SPDIF_MODE_RX_COMSUMER
- EMU_HANA_SPDIF_MODE_RX_INVALID
- EMU_HANA_SPDIF_MODE_RX_NOCOPY
- EMU_HANA_SPDIF_MODE_RX_PRO
- EMU_HANA_SPDIF_MODE_TX_COMSUMER
- EMU_HANA_SPDIF_MODE_TX_NOCOPY
- EMU_HANA_SPDIF_MODE_TX_PRO
- EMU_HANA_SRCHI
- EMU_HANA_SRCLO
- EMU_HANA_UNMUTE
- EMU_HANA_WCLOCK
- EMU_HANA_WCLOCK_1X
- EMU_HANA_WCLOCK_2ND_HANA
- EMU_HANA_WCLOCK_2X
- EMU_HANA_WCLOCK_4X
- EMU_HANA_WCLOCK_HANA_ADAT_IN
- EMU_HANA_WCLOCK_HANA_SPDIF_IN
- EMU_HANA_WCLOCK_INT_44_1K
- EMU_HANA_WCLOCK_INT_48K
- EMU_HANA_WCLOCK_MULT_MASK
- EMU_HANA_WCLOCK_MULT_RESERVED
- EMU_HANA_WCLOCK_OFF
- EMU_HANA_WCLOCK_SRC_MASK
- EMU_HANA_WCLOCK_SRC_RESERVED
- EMU_HANA_WCLOCK_SYNC_BNCN
- EMU_HANA_WC_ADAT_HI
- EMU_HANA_WC_ADAT_LO
- EMU_HANA_WC_BNC_HI
- EMU_HANA_WC_BNC_LO
- EMU_HANA_WC_SPDIF_HI
- EMU_HANA_WC_SPDIF_LO
- EMU_ILLEGAL_OP
- EMU_MODEL_EMU0404
- EMU_MODEL_EMU1010
- EMU_MODEL_EMU1010B
- EMU_MODEL_EMU1616
- EMU_MODEL_SB
- EMU_MUTE
- EMU_NODE_DIST
- EMU_QUIRK_SR_176400HZ
- EMU_QUIRK_SR_192000HZ
- EMU_QUIRK_SR_44100HZ
- EMU_QUIRK_SR_48000HZ
- EMU_QUIRK_SR_88200HZ
- EMU_QUIRK_SR_96000HZ
- EMU_SE_ENABLEX
- EMU_SPECIFICATION
- EMU_SRC_ALICE_EMU32A
- EMU_SRC_ALICE_EMU32B
- EMU_SRC_DOCK_ADC1_LEFT1
- EMU_SRC_DOCK_ADC1_LEFT2
- EMU_SRC_DOCK_ADC1_LEFT3
- EMU_SRC_DOCK_ADC1_LEFT4
- EMU_SRC_DOCK_ADC1_RIGHT1
- EMU_SRC_DOCK_ADC1_RIGHT2
- EMU_SRC_DOCK_ADC1_RIGHT3
- EMU_SRC_DOCK_ADC1_RIGHT4
- EMU_SRC_DOCK_ADC2_LEFT1
- EMU_SRC_DOCK_ADC2_LEFT2
- EMU_SRC_DOCK_ADC2_LEFT3
- EMU_SRC_DOCK_ADC2_LEFT4
- EMU_SRC_DOCK_ADC2_RIGHT1
- EMU_SRC_DOCK_ADC2_RIGHT2
- EMU_SRC_DOCK_ADC2_RIGHT3
- EMU_SRC_DOCK_ADC2_RIGHT4
- EMU_SRC_DOCK_ADC3_LEFT1
- EMU_SRC_DOCK_ADC3_LEFT2
- EMU_SRC_DOCK_ADC3_LEFT3
- EMU_SRC_DOCK_ADC3_LEFT4
- EMU_SRC_DOCK_ADC3_RIGHT1
- EMU_SRC_DOCK_ADC3_RIGHT2
- EMU_SRC_DOCK_ADC3_RIGHT3
- EMU_SRC_DOCK_ADC3_RIGHT4
- EMU_SRC_DOCK_MIC_A1
- EMU_SRC_DOCK_MIC_A2
- EMU_SRC_DOCK_MIC_A3
- EMU_SRC_DOCK_MIC_A4
- EMU_SRC_DOCK_MIC_B1
- EMU_SRC_DOCK_MIC_B2
- EMU_SRC_DOCK_MIC_B3
- EMU_SRC_DOCK_MIC_B4
- EMU_SRC_HAMOA_ADC_LEFT1
- EMU_SRC_HAMOA_ADC_LEFT2
- EMU_SRC_HAMOA_ADC_LEFT3
- EMU_SRC_HAMOA_ADC_LEFT4
- EMU_SRC_HAMOA_ADC_RIGHT1
- EMU_SRC_HAMOA_ADC_RIGHT2
- EMU_SRC_HAMOA_ADC_RIGHT3
- EMU_SRC_HAMOA_ADC_RIGHT4
- EMU_SRC_HANA_ADAT
- EMU_SRC_HANA_SPDIF_LEFT1
- EMU_SRC_HANA_SPDIF_LEFT2
- EMU_SRC_HANA_SPDIF_RIGHT1
- EMU_SRC_HANA_SPDIF_RIGHT2
- EMU_SRC_MDOCK_ADAT
- EMU_SRC_MDOCK_SPDIF_LEFT1
- EMU_SRC_MDOCK_SPDIF_LEFT2
- EMU_SRC_MDOCK_SPDIF_RIGHT1
- EMU_SRC_MDOCK_SPDIF_RIGHT2
- EMU_SRC_SILENCE
- EMU_UNMUTE
- EMU_WD_INT_ENA_W1SX
- EM_386
- EM_486
- EM_68K
- EM_860
- EM_88K
- EM_AARCH64
- EM_ALPHA
- EM_ALTERA_NIOS2
- EM_ARCOMPACT
- EM_ARCV2
- EM_ARC_INUSE
- EM_ARM
- EM_BLACKFIN
- EM_BPF
- EM_CAN_RULES_MAX
- EM_CPU_MAX_POWER
- EM_CRIS
- EM_CSKY
- EM_CSKY_OLD
- EM_CTL_ALHD
- EM_CTL_LED
- EM_CTL_MR
- EM_CTL_RST
- EM_CTL_SAFTE
- EM_CTL_SES
- EM_CTL_SGPIO
- EM_CTL_SMB
- EM_CTL_TM
- EM_CTL_XMT
- EM_CTRL_MSG_TYPE
- EM_CYGNUS_M32R
- EM_CYGNUS_MN10300
- EM_DATA_CB
- EM_DRIVE_INSERTION
- EM_DRIVE_REMOVAL
- EM_FPU_TYPE_OFFSET
- EM_FRV
- EM_GPIO_0
- EM_GPIO_1
- EM_GPIO_2
- EM_GPIO_3
- EM_GPIO_4
- EM_GPIO_5
- EM_GPIO_6
- EM_GPIO_7
- EM_GPO_0
- EM_GPO_1
- EM_GPO_2
- EM_GPO_3
- EM_H8_300
- EM_HDR_LEN
- EM_HEXAGON
- EM_IA_64
- EM_M32
- EM_M32R
- EM_MAX_COMPLEXITY
- EM_MAX_RETRY
- EM_MAX_SLOTS
- EM_MICROBLAZE
- EM_MICROBLAZE_OLD
- EM_MIPS
- EM_MIPS_RS3_LE
- EM_MIPS_RS4_BE
- EM_MN10300
- EM_MSG_LED_HBA_PORT
- EM_MSG_LED_PMP_SLOT
- EM_MSG_LED_VALUE
- EM_MSG_LED_VALUE_ACTIVITY
- EM_MSG_LED_VALUE_OFF
- EM_MSG_LED_VALUE_ON
- EM_MSG_TYPE_LED
- EM_MSG_TYPE_SAFTE
- EM_MSG_TYPE_SES2
- EM_MSG_TYPE_SGPIO
- EM_NDS32
- EM_NONE
- EM_OPENRISC
- EM_OR32
- EM_PARISC
- EM_PPC
- EM_PPC64
- EM_RISCV
- EM_S390
- EM_S390_OLD
- EM_SES_DRIVE_INSERTION
- EM_SES_DRIVE_REMOVAL
- EM_SH
- EM_SPARC
- EM_SPARC32PLUS
- EM_SPARCV9
- EM_SPU
- EM_TEXT_PRIV
- EM_TILEGX
- EM_TILEPRO
- EM_TI_C6000
- EM_UNICORE
- EM_X270_ETHIRQ
- EM_X86_64
- EM_XTENSA
- EM_XTENSA_OLD
- EMe
- EModeIDTablePtrOffset
- EN
- EN0
- EN0_BOUNDARY
- EN0_CLDAHI
- EN0_CLDALO
- EN0_COUNTER0
- EN0_COUNTER1
- EN0_COUNTER2
- EN0_CRDAHI
- EN0_CRDALO
- EN0_DCFG
- EN0_ERWCNT
- EN0_FIFO
- EN0_IMR
- EN0_ISR
- EN0_NCR
- EN0_PORT
- EN0_RCNTHI
- EN0_RCNTLO
- EN0_RSARHI
- EN0_RSARLO
- EN0_RSR
- EN0_RXCR
- EN0_STARTPG
- EN0_STOPPG
- EN0_TCNTHI
- EN0_TCNTLO
- EN0_TPSR
- EN0_TSR
- EN0_TXCR
- EN1
- EN1_CURPAG
- EN1_LDO_ASS_VAUX1_EN1_MASK
- EN1_LDO_ASS_VAUX1_EN1_SHIFT
- EN1_LDO_ASS_VAUX2_EN1_MASK
- EN1_LDO_ASS_VAUX2_EN1_SHIFT
- EN1_LDO_ASS_VAUX33_EN1_MASK
- EN1_LDO_ASS_VAUX33_EN1_SHIFT
- EN1_LDO_ASS_VDAC_EN1_MASK
- EN1_LDO_ASS_VDAC_EN1_SHIFT
- EN1_LDO_ASS_VDIG1_EN1_MASK
- EN1_LDO_ASS_VDIG1_EN1_SHIFT
- EN1_LDO_ASS_VDIG2_EN1_MASK
- EN1_LDO_ASS_VDIG2_EN1_SHIFT
- EN1_LDO_ASS_VMMC_EN1_MASK
- EN1_LDO_ASS_VMMC_EN1_SHIFT
- EN1_LDO_ASS_VPLL_EN1_MASK
- EN1_LDO_ASS_VPLL_EN1_SHIFT
- EN1_MULT
- EN1_MULT_SHIFT
- EN1_PHYS
- EN1_PHYS_SHIFT
- EN1_SMPS_ASS_RSVD_MASK
- EN1_SMPS_ASS_RSVD_SHIFT
- EN1_SMPS_ASS_SPARE_EN1_MASK
- EN1_SMPS_ASS_SPARE_EN1_SHIFT
- EN1_SMPS_ASS_VDD1_EN1_MASK
- EN1_SMPS_ASS_VDD1_EN1_SHIFT
- EN1_SMPS_ASS_VDD2_EN1_MASK
- EN1_SMPS_ASS_VDD2_EN1_SHIFT
- EN1_SMPS_ASS_VDD3_EN1_MASK
- EN1_SMPS_ASS_VDD3_EN1_SHIFT
- EN1_SMPS_ASS_VIO_EN1_MASK
- EN1_SMPS_ASS_VIO_EN1_SHIFT
- EN29LV400AB
- EN29LV400AT
- EN29SL800BB
- EN29SL800BT
- EN2_LDO_ASS_VAUX1_EN2_MASK
- EN2_LDO_ASS_VAUX1_EN2_SHIFT
- EN2_LDO_ASS_VAUX2_EN2_MASK
- EN2_LDO_ASS_VAUX2_EN2_SHIFT
- EN2_LDO_ASS_VAUX33_EN2_MASK
- EN2_LDO_ASS_VAUX33_EN2_SHIFT
- EN2_LDO_ASS_VDAC_EN2_MASK
- EN2_LDO_ASS_VDAC_EN2_SHIFT
- EN2_LDO_ASS_VDIG1_EN2_MASK
- EN2_LDO_ASS_VDIG1_EN2_SHIFT
- EN2_LDO_ASS_VDIG2_EN2_MASK
- EN2_LDO_ASS_VDIG2_EN2_SHIFT
- EN2_LDO_ASS_VMMC_EN2_MASK
- EN2_LDO_ASS_VMMC_EN2_SHIFT
- EN2_LDO_ASS_VPLL_EN2_MASK
- EN2_LDO_ASS_VPLL_EN2_SHIFT
- EN2_SMPS_ASS_RSVD_MASK
- EN2_SMPS_ASS_RSVD_SHIFT
- EN2_SMPS_ASS_SPARE_EN2_MASK
- EN2_SMPS_ASS_SPARE_EN2_SHIFT
- EN2_SMPS_ASS_VDD1_EN2_MASK
- EN2_SMPS_ASS_VDD1_EN2_SHIFT
- EN2_SMPS_ASS_VDD2_EN2_MASK
- EN2_SMPS_ASS_VDD2_EN2_SHIFT
- EN2_SMPS_ASS_VDD3_EN2_MASK
- EN2_SMPS_ASS_VDD3_EN2_SHIFT
- EN2_SMPS_ASS_VIO_EN2_MASK
- EN2_SMPS_ASS_VIO_EN2_SHIFT
- EN3_LDO_ASS_VAUX1_EN3_MASK
- EN3_LDO_ASS_VAUX1_EN3_SHIFT
- EN3_LDO_ASS_VAUX2_EN3_MASK
- EN3_LDO_ASS_VAUX2_EN3_SHIFT
- EN3_LDO_ASS_VAUX33_EN3_MASK
- EN3_LDO_ASS_VAUX33_EN3_SHIFT
- EN3_LDO_ASS_VDAC_EN3_MASK
- EN3_LDO_ASS_VDAC_EN3_SHIFT
- EN3_LDO_ASS_VDIG1_EN3_MASK
- EN3_LDO_ASS_VDIG1_EN3_SHIFT
- EN3_LDO_ASS_VDIG2_EN3_MASK
- EN3_LDO_ASS_VDIG2_EN3_SHIFT
- EN3_LDO_ASS_VMMC_EN3_MASK
- EN3_LDO_ASS_VMMC_EN3_SHIFT
- EN3_LDO_ASS_VPLL_EN3_MASK
- EN3_LDO_ASS_VPLL_EN3_SHIFT
- EN50221_LIST_MANAGEMENT_ONLY
- EN50221_TAG_APP_INFO
- EN50221_TAG_APP_INFO_ENQUIRY
- EN50221_TAG_CA_INFO
- EN50221_TAG_CA_INFO_ENQUIRY
- EN50221_TAG_CA_PMT
- EN50221_TAG_ENTER_MENU
- EN85C30
- ENA
- ENA0
- ENA1
- ENAB
- ENABLE
- ENABLE0_BIT
- ENABLE16flag
- ENABLE1_BIT
- ENABLED
- ENABLED_
- ENABLED_CU_IRQS
- ENABLED_DOU_IRQS
- ENABLED_GCU_IRQS
- ENABLED_IRQS
- ENABLED_IRQS_DMA
- ENABLED_IRQS_DMA_IP
- ENABLED_LPU_IRQS
- ENABLEFORCE
- ENABLERX
- ENABLEUDPHASH_F
- ENABLEUDPHASH_S
- ENABLEUDPHASH_V
- ENABLEUP0_F
- ENABLEUP0_S
- ENABLEUP0_V
- ENABLEWAKEUP
- ENABLE_11D
- ENABLE_1510_MODE
- ENABLE_16XX_MODE
- ENABLE_5V
- ENABLE_ACLK_APOLLO
- ENABLE_ACLK_ATLAS
- ENABLE_ACLK_AUD
- ENABLE_ACLK_BUS
- ENABLE_ACLK_CAM00
- ENABLE_ACLK_CAM01
- ENABLE_ACLK_CAM02
- ENABLE_ACLK_CAM10
- ENABLE_ACLK_CAM11
- ENABLE_ACLK_CAM12
- ENABLE_ACLK_CCORE0
- ENABLE_ACLK_CCORE1
- ENABLE_ACLK_DISP0
- ENABLE_ACLK_DISP1
- ENABLE_ACLK_FSYS0
- ENABLE_ACLK_FSYS00
- ENABLE_ACLK_FSYS01
- ENABLE_ACLK_FSYS1
- ENABLE_ACLK_G3D
- ENABLE_ACLK_GSCL
- ENABLE_ACLK_GSCL_SECURE_SMMU_GSCL0
- ENABLE_ACLK_GSCL_SECURE_SMMU_GSCL1
- ENABLE_ACLK_GSCL_SECURE_SMMU_GSCL2
- ENABLE_ACLK_HEVC
- ENABLE_ACLK_HEVC_SECURE_SMMU_HEVC
- ENABLE_ACLK_IMEM_SLIMSSS
- ENABLE_ACLK_ISP0
- ENABLE_ACLK_ISP1
- ENABLE_ACLK_ISP2
- ENABLE_ACLK_MFC
- ENABLE_ACLK_MFC_SECURE_SMMU_MFC
- ENABLE_ACLK_MIF0
- ENABLE_ACLK_MIF1
- ENABLE_ACLK_MIF2
- ENABLE_ACLK_MIF3
- ENABLE_ACLK_MSCL
- ENABLE_ACLK_MSCL_SECURE_SMMU_JPEG
- ENABLE_ACLK_MSCL_SECURE_SMMU_M2MSCALER0
- ENABLE_ACLK_MSCL_SECURE_SMMU_M2MSCALER1
- ENABLE_ACLK_PERIC
- ENABLE_ACLK_PERIS
- ENABLE_ACLK_TOP
- ENABLE_ACLK_TOP03
- ENABLE_ACLK_TOP13
- ENABLE_ACLK_TOPC0
- ENABLE_ACLK_TOPC1
- ENABLE_ACTIVE_NEGATION
- ENABLE_ADVANCED_DRIVER_MODEL
- ENABLE_ALARM_INT
- ENABLE_ALL_INTERRUPTS
- ENABLE_ALL_TRIGGERS
- ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS
- ENABLE_ASIC_STATIC_PWR_MGT_PS_ALLOCATION
- ENABLE_ASSP_CLOCK
- ENABLE_AUDIO_CLK_TO_AUDIO_BLK
- ENABLE_AUTO_CTRL_FLAGS
- ENABLE_AUTO_CTS
- ENABLE_AUTO_DCD
- ENABLE_AUTO_INFO_FIFO
- ENABLE_BASE
- ENABLE_BCH_ECC
- ENABLE_BIC
- ENABLE_BL
- ENABLE_BOARD
- ENABLE_BVME6000_NET
- ENABLE_CE
- ENABLE_CF8_EXT_CFG
- ENABLE_CLOCK
- ENABLE_CLOCK_STOPPING
- ENABLE_CMD_MODE
- ENABLE_CMU_TOP
- ENABLE_CMU_TOP_DIV_STAT
- ENABLE_COAL
- ENABLE_CONTEXT
- ENABLE_CRTC_PARAMETERS
- ENABLE_CRTC_PS_ALLOCATION
- ENABLE_DATA_CACHE
- ENABLE_DCBX
- ENABLE_DEBUGFS_CACHEBUF
- ENABLE_DEBUG_FEATURES
- ENABLE_DEV_NOTE
- ENABLE_DHCP_FILTERING
- ENABLE_DISABLE_DISPLAY
- ENABLE_DISP_POWER_GATING_PARAMETERS_V2_1
- ENABLE_DISP_POWER_GATING_PS_ALLOCATION
- ENABLE_DROP_F
- ENABLE_DROP_S
- ENABLE_DROP_V
- ENABLE_DS
- ENABLE_ECC_ON_ME_PIPE
- ENABLE_EEPROM_WRITE
- ENABLE_EMASK_ALL
- ENABLE_EMASK_FBD_CORRECTABLE
- ENABLE_EMASK_FBD_DIMM_SPARE
- ENABLE_EMASK_FBD_FATAL_ERRORS
- ENABLE_EMASK_FBD_NON_RETRY
- ENABLE_EMASK_FBD_NORTH_CRC
- ENABLE_EMASK_FBD_SPD_PROTOCOL
- ENABLE_EMASK_FBD_THERMALS
- ENABLE_EMASK_FBD_UNCORRECTABLE
- ENABLE_ENUM
- ENABLE_ENUM_DISABLED
- ENABLE_ENUM_ENABLED
- ENABLE_EP1
- ENABLE_EP2
- ENABLE_EP3
- ENABLE_EP4
- ENABLE_EP5
- ENABLE_EP6
- ENABLE_EVENT_STR
- ENABLE_EXCHANGE_OFFLD
- ENABLE_EXTENDED_LOGIN
- ENABLE_EXTERNAL_LOOPBACK
- ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS
- ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS_V2
- ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION
- ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION_V2
- ENABLE_EXTRA_DESC
- ENABLE_EXTRA_SRAM
- ENABLE_EXT_DEV_CONFIG_SHIFT
- ENABLE_F
- ENABLE_FCP_RING_POLLING
- ENABLE_FOR_ALL_AC
- ENABLE_FOR_THIS_AC
- ENABLE_FOUR_BYTE
- ENABLE_FV_THROT
- ENABLE_FV_THROT_IO
- ENABLE_FV_UPDATE
- ENABLE_GEN2PCIE
- ENABLE_GEN2XSP
- ENABLE_GRAPH_SURFACE_PARAMETERS
- ENABLE_GRAPH_SURFACE_PARAMETERS_V1_2
- ENABLE_GRAPH_SURFACE_PARAMETERS_V1_3
- ENABLE_GRAPH_SURFACE_PARAMETERS_V1_4
- ENABLE_GRAPH_SURFACE_PS_ALLOCATION
- ENABLE_GUC_LOAD_HUC
- ENABLE_GUC_SUBMISSION
- ENABLE_HARDWARE_ICON_CURSOR_PARAMETERS
- ENABLE_HARDWARE_ICON_CURSOR_PS_ALLOCATION
- ENABLE_HEXDUMP
- ENABLE_HIST_STR
- ENABLE_INT9
- ENABLE_INTERNAL_LOOPBACK
- ENABLE_INTERRUPT
- ENABLE_INTERRUPTS
- ENABLE_INTERRUPT_MASK
- ENABLE_INTR
- ENABLE_INTRS
- ENABLE_INTR_BYTE
- ENABLE_IN_SUSPEND
- ENABLE_IP_APOLLO0
- ENABLE_IP_APOLLO1
- ENABLE_IP_ATLAS0
- ENABLE_IP_ATLAS1
- ENABLE_IP_AUD0
- ENABLE_IP_AUD1
- ENABLE_IP_BUS0
- ENABLE_IP_BUS1
- ENABLE_IP_CAM00
- ENABLE_IP_CAM01
- ENABLE_IP_CAM02
- ENABLE_IP_CAM03
- ENABLE_IP_CAM10
- ENABLE_IP_CAM11
- ENABLE_IP_CAM12
- ENABLE_IP_DISP0
- ENABLE_IP_DISP1
- ENABLE_IP_FSYS0
- ENABLE_IP_FSYS1
- ENABLE_IP_G3D0
- ENABLE_IP_G3D1
- ENABLE_IP_GSCL0
- ENABLE_IP_GSCL1
- ENABLE_IP_GSCL_SECURE_SMMU_GSCL0
- ENABLE_IP_GSCL_SECURE_SMMU_GSCL1
- ENABLE_IP_GSCL_SECURE_SMMU_GSCL2
- ENABLE_IP_HEVC0
- ENABLE_IP_HEVC1
- ENABLE_IP_HEVC_SECURE_SMMU_HEVC
- ENABLE_IP_ISP0
- ENABLE_IP_ISP1
- ENABLE_IP_ISP2
- ENABLE_IP_ISP3
- ENABLE_IP_MFC0
- ENABLE_IP_MFC1
- ENABLE_IP_MFC_SECURE_SMMU_MFC
- ENABLE_IP_MIF0
- ENABLE_IP_MIF1
- ENABLE_IP_MIF2
- ENABLE_IP_MIF3
- ENABLE_IP_MIF_SECURE_DREX0_TZ
- ENABLE_IP_MIF_SECURE_DREX1_TZ
- ENABLE_IP_MIF_SECURE_MONOTONIC_CNT
- ENABLE_IP_MIF_SECURE_RTC
- ENABLE_IP_MSCL0
- ENABLE_IP_MSCL1
- ENABLE_IP_MSCL_SECURE_SMMU_JPEG
- ENABLE_IP_MSCL_SECURE_SMMU_M2MSCALER0
- ENABLE_IP_MSCL_SECURE_SMMU_M2MSCALER1
- ENABLE_IP_PERIC0
- ENABLE_IP_PERIC1
- ENABLE_IP_PERIC2
- ENABLE_IP_PERIS0
- ENABLE_IP_PERIS1
- ENABLE_IP_PERIS_SECURE_ANTIBRK_CNT
- ENABLE_IP_PERIS_SECURE_CHIPID
- ENABLE_IP_PERIS_SECURE_CUSTOM_EFUSE
- ENABLE_IP_PERIS_SECURE_OTP_CON
- ENABLE_IP_PERIS_SECURE_SECKEY
- ENABLE_IP_PERIS_SECURE_TOPRTC
- ENABLE_IP_PERIS_SECURE_TZPC
- ENABLE_IP_TOP
- ENABLE_IRQ
- ENABLE_IRQS
- ENABLE_IRQs
- ENABLE_JITTER_REMOVAL
- ENABLE_KBD
- ENABLE_L1_FRAGMENT_PROCESSING
- ENABLE_L1_STRICT_ORDERING
- ENABLE_L1_TLB
- ENABLE_L2_CACHE
- ENABLE_L2_FRAGMENT_PROCESSING
- ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE
- ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE
- ENABLE_L3_FILTERING
- ENABLE_LAM_END_OFFSET
- ENABLE_LAM_INFO_ECC_MASK
- ENABLE_LAM_INFO_HIDDEN_FLAG
- ENABLE_LAM_INFO_OFFSET
- ENABLE_LAM_OUT_SIZE
- ENABLE_LAM_START_OFFSET
- ENABLE_LANE_RX_MASK
- ENABLE_LANE_RX_SHIFT
- ENABLE_LANE_TX_MASK
- ENABLE_LANE_TX_SHIFT
- ENABLE_LEGACY_PIPELINE
- ENABLE_LOW_POWER
- ENABLE_LOW_POWER_MASK
- ENABLE_LUN_TYPE
- ENABLE_LVDS_SS_PARAMETERS
- ENABLE_LVDS_SS_PARAMETERS_V2
- ENABLE_LVDS_SS_PARAMETERS_V3
- ENABLE_LWS_DEBUG
- ENABLE_MAC_SPOOFCHK
- ENABLE_MARK_CLEAN
- ENABLE_MASK
- ENABLE_MBOX_BYTE
- ENABLE_MBOX_REGION
- ENABLE_MEM_PWR_CTRL
- ENABLE_MIC_INPUT
- ENABLE_MOUSE
- ENABLE_MVME16x_NET
- ENABLE_NBNS_FILTERING
- ENABLE_NEW_CON
- ENABLE_NEW_SMX_ADDRESS
- ENABLE_NGG_PIPELINE
- ENABLE_NOTIFY_SPINUP_INTS
- ENABLE_NUMA_STAT
- ENABLE_ONE_BYTE
- ENABLE_ON_INIT
- ENABLE_PARITY
- ENABLE_PA_SC_OUT_OF_ORDER
- ENABLE_PCLK_APOLLO
- ENABLE_PCLK_ATLAS
- ENABLE_PCLK_AUD
- ENABLE_PCLK_BUS
- ENABLE_PCLK_CAM0
- ENABLE_PCLK_CAM1
- ENABLE_PCLK_CCORE
- ENABLE_PCLK_DISP
- ENABLE_PCLK_FSYS
- ENABLE_PCLK_FSYS1
- ENABLE_PCLK_G3D
- ENABLE_PCLK_GSCL
- ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL0
- ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL1
- ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL2
- ENABLE_PCLK_HEVC
- ENABLE_PCLK_HEVC_SECURE_SMMU_HEVC
- ENABLE_PCLK_IMEM_SLIMSSS
- ENABLE_PCLK_ISP
- ENABLE_PCLK_MFC
- ENABLE_PCLK_MFC_SECURE_SMMU_MFC
- ENABLE_PCLK_MIF
- ENABLE_PCLK_MIF_SECURE_DREX0_TZ
- ENABLE_PCLK_MIF_SECURE_DREX1_TZ
- ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT
- ENABLE_PCLK_MIF_SECURE_RTC
- ENABLE_PCLK_MSCL
- ENABLE_PCLK_MSCL_SECURE_SMMU_JPEG
- ENABLE_PCLK_MSCL_SECURE_SMMU_M2MSCALER0
- ENABLE_PCLK_MSCL_SECURE_SMMU_M2MSCALER1
- ENABLE_PCLK_PERIC0
- ENABLE_PCLK_PERIC1
- ENABLE_PCLK_PERIS
- ENABLE_PCLK_PERIS_SECURE_ANTIRBK_CNT_APBIF
- ENABLE_PCLK_PERIS_SECURE_CHIPID
- ENABLE_PCLK_PERIS_SECURE_CHIPID_APBIF
- ENABLE_PCLK_PERIS_SECURE_CUSTOM_EFUSE_APBIF
- ENABLE_PCLK_PERIS_SECURE_OTP_CON_APBIF
- ENABLE_PCLK_PERIS_SECURE_SECKEY_APBIF
- ENABLE_PCLK_PERIS_SECURE_TOPRTC
- ENABLE_PCLK_PERIS_SECURE_TZPC
- ENABLE_PER_HART
- ENABLE_PHY
- ENABLE_PHY_NO_SAS_OOB
- ENABLE_PHY_NO_SATA_OOB
- ENABLE_PI
- ENABLE_PORT1
- ENABLE_PORT2
- ENABLE_PORT3
- ENABLE_PORT_ALL
- ENABLE_PREFETCH
- ENABLE_RC5
- ENABLE_RC6
- ENABLE_REALMODE
- ENABLE_REGISTER_PAIR
- ENABLE_REGWRITE_BUFFER
- ENABLE_REG_32BIT
- ENABLE_REG_RMW_BUFFER
- ENABLE_RESET_MODIFIER
- ENABLE_RNG_SET
- ENABLE_ROTATION_0
- ENABLE_ROTATION_180
- ENABLE_ROTATION_270
- ENABLE_ROTATION_90
- ENABLE_RRD_TIMESTAMP
- ENABLE_RTXINT
- ENABLE_RXINT
- ENABLE_RX_VMM
- ENABLE_S
- ENABLE_SCALER_PARAMETERS
- ENABLE_SCALER_PS_ALLOCATION
- ENABLE_SCAN_ABORT_EVENT
- ENABLE_SCLK_APOLLO
- ENABLE_SCLK_ATLAS
- ENABLE_SCLK_AUD
- ENABLE_SCLK_AUD0
- ENABLE_SCLK_AUD1
- ENABLE_SCLK_CAM0
- ENABLE_SCLK_CAM1
- ENABLE_SCLK_CPIF
- ENABLE_SCLK_DISP
- ENABLE_SCLK_FSYS
- ENABLE_SCLK_FSYS01
- ENABLE_SCLK_FSYS02
- ENABLE_SCLK_FSYS04
- ENABLE_SCLK_FSYS11
- ENABLE_SCLK_FSYS12
- ENABLE_SCLK_FSYS13
- ENABLE_SCLK_G3D
- ENABLE_SCLK_ISP
- ENABLE_SCLK_MIF
- ENABLE_SCLK_MSCL
- ENABLE_SCLK_PERIC
- ENABLE_SCLK_PERIC0
- ENABLE_SCLK_PERIC10
- ENABLE_SCLK_PERIS
- ENABLE_SCLK_PERIS_SECURE_ANTIRBK_CNT
- ENABLE_SCLK_PERIS_SECURE_CHIPID
- ENABLE_SCLK_PERIS_SECURE_CUSTOM_EFUSE
- ENABLE_SCLK_PERIS_SECURE_OTP_CON
- ENABLE_SCLK_PERIS_SECURE_SECKEY
- ENABLE_SCLK_PERIS_SECURE_TOPRTC
- ENABLE_SCLK_TOP
- ENABLE_SCLK_TOP0_PERIC0
- ENABLE_SCLK_TOP0_PERIC1
- ENABLE_SCLK_TOP0_PERIC2
- ENABLE_SCLK_TOP0_PERIC3
- ENABLE_SCLK_TOP1_FSYS0
- ENABLE_SCLK_TOP1_FSYS1
- ENABLE_SCLK_TOP1_FSYS11
- ENABLE_SCLK_TOPC1
- ENABLE_SCLK_TOP_CAM1
- ENABLE_SCLK_TOP_DISP
- ENABLE_SCLK_TOP_FSYS
- ENABLE_SCLK_TOP_MSCL
- ENABLE_SCLK_TOP_PERIC
- ENABLE_SCSI_PREFETCH
- ENABLE_SEL
- ENABLE_SELECT
- ENABLE_SEMAPHORE_MODE
- ENABLE_SERIAL_TXX9_PCI
- ENABLE_SHIFT_MAX_SMPL
- ENABLE_SHIFT_MIN_SMPL
- ENABLE_SHORTGI_RATE
- ENABLE_SMC_DEBUG_DMA
- ENABLE_SMC_DEBUG_FUNC
- ENABLE_SMC_DEBUG_MISC
- ENABLE_SMC_DEBUG_PKTS
- ENABLE_SMC_DEBUG_RX
- ENABLE_SMC_DEBUG_TX
- ENABLE_SPICO_SMASK
- ENABLE_SPREAD_SPECTRUM_ON_PPLL
- ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION
- ENABLE_SPREAD_SPECTRUM_ON_PPLL_V2
- ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3
- ENABLE_STORE_BEACON
- ENABLE_STRONG
- ENABLE_SURFACE
- ENABLE_SYNTH
- ENABLE_TC128
- ENABLE_THE_CLOCK
- ENABLE_THE_FEATURE
- ENABLE_THE_INTERRUPT
- ENABLE_THREE_BYTE
- ENABLE_TILING
- ENABLE_TIMER
- ENABLE_TIME_USEC
- ENABLE_TSI
- ENABLE_TSQFIE
- ENABLE_TUNER_BIT
- ENABLE_TUNER_IIC
- ENABLE_TWE_BYTE
- ENABLE_TX
- ENABLE_TXINT
- ENABLE_TX_VMM
- ENABLE_UDF_IEX_TRAP
- ENABLE_UNCONDITIONAL
- ENABLE_UNIT_ATTN
- ENABLE_V
- ENABLE_VAL
- ENABLE_VCS
- ENABLE_VGA_RENDER_PS_ALLOCATION
- ENABLE_VIDEO_MODE
- ENABLE_VINTCORE12_SUPPLY
- ENABLE_VPP
- ENABLE_VTG
- ENABLE_W83877F
- ENABLE_W83877F_PORT
- ENABLE_WAIT_L2_QUERY
- ENABLE_WD1
- ENABLE_WD2
- ENABLE_WEAK
- ENABLE_WFPM
- ENABLE_WIN
- ENABLE_XORCLK
- ENABLE_YUV_PARAMETERS
- ENABLE_YUV_PS_ALLOCATION
- ENAB_1x1
- ENAB_2x2
- ENAB_3x3
- ENAB_4x4
- ENAB_DISP
- ENAMETOOLONG
- ENAMODE12_DISABLED
- ENAMODE12_ONESHOT
- ENAMODE12_PERIODIC
- ENARXDIRECTCFG2
- ENARXDIRECTCFG3
- ENARXDIRECTCFG4
- ENATNTARG
- ENAUTOATNI
- ENAUTOATNO
- ENAUTOATNP
- ENAVAIL
- ENAWAKEUP
- ENA_16_COL
- ENA_ADMIN_ACQ_COMMON_DESC_COMMAND_ID_MASK
- ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK
- ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK
- ENA_ADMIN_AENQ_CONFIG
- ENA_ADMIN_AENQ_GROUPS_NUM
- ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK
- ENA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK
- ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK
- ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_SHIFT
- ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK
- ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_SHIFT
- ENA_ADMIN_AQ_COMMON_DESC_PHASE_MASK
- ENA_ADMIN_AQ_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK
- ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_MASK
- ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_SHIFT
- ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_MASK
- ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_SHIFT
- ENA_ADMIN_AQ_CREATE_SQ_CMD_IS_PHYSICALLY_CONTIGUOUS_MASK
- ENA_ADMIN_AQ_CREATE_SQ_CMD_PLACEMENT_POLICY_MASK
- ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_MASK
- ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_SHIFT
- ENA_ADMIN_BAD_OPCODE
- ENA_ADMIN_COMPLETION_POLICY_DESC
- ENA_ADMIN_COMPLETION_POLICY_DESC_ON_DEMAND
- ENA_ADMIN_COMPLETION_POLICY_HEAD
- ENA_ADMIN_COMPLETION_POLICY_HEAD_ON_DEMAND
- ENA_ADMIN_CRC32
- ENA_ADMIN_CREATE_CQ
- ENA_ADMIN_CREATE_SQ
- ENA_ADMIN_DESTROY_CQ
- ENA_ADMIN_DESTROY_SQ
- ENA_ADMIN_DEVICE_ATTRIBUTES
- ENA_ADMIN_ETH_TRAFFIC
- ENA_ADMIN_FATAL_ERROR
- ENA_ADMIN_FEATURES_OPCODE_NUM
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_HASH_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_HASH_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_SHIFT
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK
- ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_SHIFT
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_FUNCTION_FUNCS_MASK
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_FUNCTION_SELECTED_FUNC_MASK
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L3_SORT_MASK
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L3_SORT_SHIFT
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L4_SORT_MASK
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L4_SORT_SHIFT
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_MASK
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_SHIFT
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_MASK
- ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_SHIFT
- ENA_ADMIN_GET_FEATURE
- ENA_ADMIN_GET_FEATURE_LINK_DESC_AUTONEG_MASK
- ENA_ADMIN_GET_FEATURE_LINK_DESC_DUPLEX_MASK
- ENA_ADMIN_GET_FEATURE_LINK_DESC_DUPLEX_SHIFT
- ENA_ADMIN_GET_SET_FEATURE_COMMON_DESC_SELECT_MASK
- ENA_ADMIN_GET_STATS
- ENA_ADMIN_GET_STATS_TYPE_BASIC
- ENA_ADMIN_GET_STATS_TYPE_EXTENDED
- ENA_ADMIN_HEADER_RING
- ENA_ADMIN_HOST_ATTR_CONFIG
- ENA_ADMIN_HOST_INFO_BUS_MASK
- ENA_ADMIN_HOST_INFO_BUS_SHIFT
- ENA_ADMIN_HOST_INFO_DEVICE_MASK
- ENA_ADMIN_HOST_INFO_DEVICE_SHIFT
- ENA_ADMIN_HOST_INFO_FUNCTION_MASK
- ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK
- ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_SHIFT
- ENA_ADMIN_HOST_INFO_MAJOR_MASK
- ENA_ADMIN_HOST_INFO_MINOR_MASK
- ENA_ADMIN_HOST_INFO_MINOR_SHIFT
- ENA_ADMIN_HOST_INFO_MODULE_TYPE_MASK
- ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT
- ENA_ADMIN_HOST_INFO_SUB_MINOR_MASK
- ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT
- ENA_ADMIN_HW_HINTS
- ENA_ADMIN_ILLEGAL_PARAMETER
- ENA_ADMIN_INLINE_HEADER
- ENA_ADMIN_INTERRUPT_MODERATION
- ENA_ADMIN_KEEP_ALIVE
- ENA_ADMIN_LINK_CHANGE
- ENA_ADMIN_LINK_CONFIG
- ENA_ADMIN_LINK_SPEED_100G
- ENA_ADMIN_LINK_SPEED_10G
- ENA_ADMIN_LINK_SPEED_1G
- ENA_ADMIN_LINK_SPEED_200G
- ENA_ADMIN_LINK_SPEED_25G
- ENA_ADMIN_LINK_SPEED_2_HALF_G
- ENA_ADMIN_LINK_SPEED_400G
- ENA_ADMIN_LINK_SPEED_40G
- ENA_ADMIN_LINK_SPEED_50G
- ENA_ADMIN_LINK_SPEED_5G
- ENA_ADMIN_LIST_ENTRY_SIZE_128B
- ENA_ADMIN_LIST_ENTRY_SIZE_192B
- ENA_ADMIN_LIST_ENTRY_SIZE_256B
- ENA_ADMIN_LLQ
- ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_0
- ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_1
- ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2
- ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_4
- ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_8
- ENA_ADMIN_MALFORMED_REQUEST
- ENA_ADMIN_MAX_QUEUES_EXT
- ENA_ADMIN_MAX_QUEUES_NUM
- ENA_ADMIN_MSIX_VEC
- ENA_ADMIN_MTU
- ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY
- ENA_ADMIN_NOTIFICATION
- ENA_ADMIN_OS_DPDK
- ENA_ADMIN_OS_ESXI
- ENA_ADMIN_OS_FREEBSD
- ENA_ADMIN_OS_GROUPS_NUM
- ENA_ADMIN_OS_IPXE
- ENA_ADMIN_OS_LINUX
- ENA_ADMIN_OS_WIN
- ENA_ADMIN_PLACEMENT_POLICY_DEV
- ENA_ADMIN_PLACEMENT_POLICY_HOST
- ENA_ADMIN_QUEUE_DEPTH
- ENA_ADMIN_RESOURCE_ALLOCATION_FAILURE
- ENA_ADMIN_RESOURCE_BUSY
- ENA_ADMIN_RESUME
- ENA_ADMIN_RSS_HASH_FUNCTION
- ENA_ADMIN_RSS_HASH_INPUT
- ENA_ADMIN_RSS_IP4
- ENA_ADMIN_RSS_IP4_FRAG
- ENA_ADMIN_RSS_IP6
- ENA_ADMIN_RSS_IP6_EX
- ENA_ADMIN_RSS_L2_DA
- ENA_ADMIN_RSS_L2_SA
- ENA_ADMIN_RSS_L3_DA
- ENA_ADMIN_RSS_L3_SA
- ENA_ADMIN_RSS_L4_DP
- ENA_ADMIN_RSS_L4_SP
- ENA_ADMIN_RSS_NOT_IP
- ENA_ADMIN_RSS_PROTO_NUM
- ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG
- ENA_ADMIN_RSS_TCP4
- ENA_ADMIN_RSS_TCP6
- ENA_ADMIN_RSS_TCP6_EX
- ENA_ADMIN_RSS_UDP4
- ENA_ADMIN_RSS_UDP6
- ENA_ADMIN_SET_FEATURE
- ENA_ADMIN_SINGLE_DESC_PER_ENTRY
- ENA_ADMIN_SPECIFIC_QUEUE
- ENA_ADMIN_SQ_DIRECTION_RX
- ENA_ADMIN_SQ_DIRECTION_TX
- ENA_ADMIN_SQ_SQ_DIRECTION_MASK
- ENA_ADMIN_SQ_SQ_DIRECTION_SHIFT
- ENA_ADMIN_STATELESS_OFFLOAD_CONFIG
- ENA_ADMIN_SUCCESS
- ENA_ADMIN_SUSPEND
- ENA_ADMIN_TOEPLITZ
- ENA_ADMIN_UNKNOWN_ERROR
- ENA_ADMIN_UNSUPPORTED_OPCODE
- ENA_ADMIN_UPDATE_HINTS
- ENA_ADMIN_WARNING
- ENA_ALG_ERR
- ENA_ALL_INTRS
- ENA_ASYNC_QUEUE_DEPTH
- ENA_ATN
- ENA_BAR_MASK
- ENA_BUS_ERR
- ENA_CMD_ABORTED
- ENA_CMD_COMPLETED
- ENA_CMD_SUBMITTED
- ENA_COL
- ENA_COLOR_FILL
- ENA_COM
- ENA_COMMON_SPEC_VERSION_MAJOR
- ENA_COMMON_SPEC_VERSION_MINOR
- ENA_COMP_HEAD_THRESH
- ENA_COM_BOUNCE_BUFFER_CNTRL_CNT
- ENA_COM_IO_QUEUE_DIRECTION_RX
- ENA_COM_IO_QUEUE_DIRECTION_TX
- ENA_CRC_ERR
- ENA_CTRL_MAJOR
- ENA_CTRL_MINOR
- ENA_CTRL_SUB_MINOR
- ENA_DEFAULT_INTR_DELAY_RESOLUTION
- ENA_DEFAULT_MIN_RX_BUFF_ALLOC_SIZE
- ENA_DEFAULT_RING_SIZE
- ENA_DEFAULT_RX_COPYBREAK
- ENA_DEVICE_KALIVE_TIMEOUT
- ENA_DMA_ADDR_TO_UINT32_HIGH
- ENA_DMA_ADDR_TO_UINT32_LOW
- ENA_ETH_COM_H_
- ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK
- ENA_ETH_IO_INTR_REG_INTR_UNMASK_SHIFT
- ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK
- ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK
- ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT
- ENA_ETH_IO_L3_PROTO_FCOE
- ENA_ETH_IO_L3_PROTO_IPV4
- ENA_ETH_IO_L3_PROTO_IPV6
- ENA_ETH_IO_L3_PROTO_ROCE
- ENA_ETH_IO_L3_PROTO_UNKNOWN
- ENA_ETH_IO_L4_PROTO_ROUTEABLE_ROCE
- ENA_ETH_IO_L4_PROTO_TCP
- ENA_ETH_IO_L4_PROTO_UDP
- ENA_ETH_IO_L4_PROTO_UNKNOWN
- ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_MASK
- ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_SHIFT
- ENA_ETH_IO_NUMA_NODE_CFG_REG_NUMA_MASK
- ENA_ETH_IO_RX_CDESC_BASE_BUFFER_MASK
- ENA_ETH_IO_RX_CDESC_BASE_BUFFER_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK
- ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK
- ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_MASK
- ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_MASK
- ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_L3_PROTO_IDX_MASK
- ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK
- ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK
- ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK
- ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK
- ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK
- ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT
- ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_MASK
- ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_SHIFT
- ENA_ETH_IO_RX_DESC_COMP_REQ_MASK
- ENA_ETH_IO_RX_DESC_COMP_REQ_SHIFT
- ENA_ETH_IO_RX_DESC_FIRST_MASK
- ENA_ETH_IO_RX_DESC_FIRST_SHIFT
- ENA_ETH_IO_RX_DESC_LAST_MASK
- ENA_ETH_IO_RX_DESC_LAST_SHIFT
- ENA_ETH_IO_RX_DESC_PHASE_MASK
- ENA_ETH_IO_TX_CDESC_PHASE_MASK
- ENA_ETH_IO_TX_DESC_ADDR_HI_MASK
- ENA_ETH_IO_TX_DESC_COMP_REQ_MASK
- ENA_ETH_IO_TX_DESC_COMP_REQ_SHIFT
- ENA_ETH_IO_TX_DESC_DF_MASK
- ENA_ETH_IO_TX_DESC_DF_SHIFT
- ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_MASK
- ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_SHIFT
- ENA_ETH_IO_TX_DESC_FIRST_MASK
- ENA_ETH_IO_TX_DESC_FIRST_SHIFT
- ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK
- ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT
- ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK
- ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT
- ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK
- ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK
- ENA_ETH_IO_TX_DESC_L4_CSUM_EN_SHIFT
- ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_MASK
- ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_SHIFT
- ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_MASK
- ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_SHIFT
- ENA_ETH_IO_TX_DESC_LAST_MASK
- ENA_ETH_IO_TX_DESC_LAST_SHIFT
- ENA_ETH_IO_TX_DESC_LENGTH_MASK
- ENA_ETH_IO_TX_DESC_META_DESC_MASK
- ENA_ETH_IO_TX_DESC_META_DESC_SHIFT
- ENA_ETH_IO_TX_DESC_PHASE_MASK
- ENA_ETH_IO_TX_DESC_PHASE_SHIFT
- ENA_ETH_IO_TX_DESC_REQ_ID_HI_MASK
- ENA_ETH_IO_TX_DESC_REQ_ID_HI_SHIFT
- ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK
- ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT
- ENA_ETH_IO_TX_DESC_TSO_EN_MASK
- ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT
- ENA_ETH_IO_TX_META_DESC_COMP_REQ_MASK
- ENA_ETH_IO_TX_META_DESC_COMP_REQ_SHIFT
- ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK
- ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_SHIFT
- ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK
- ENA_ETH_IO_TX_META_DESC_EXT_VALID_SHIFT
- ENA_ETH_IO_TX_META_DESC_FIRST_MASK
- ENA_ETH_IO_TX_META_DESC_FIRST_SHIFT
- ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK
- ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK
- ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT
- ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK
- ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT
- ENA_ETH_IO_TX_META_DESC_LAST_MASK
- ENA_ETH_IO_TX_META_DESC_LAST_SHIFT
- ENA_ETH_IO_TX_META_DESC_META_DESC_MASK
- ENA_ETH_IO_TX_META_DESC_META_DESC_SHIFT
- ENA_ETH_IO_TX_META_DESC_META_STORE_MASK
- ENA_ETH_IO_TX_META_DESC_META_STORE_SHIFT
- ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK
- ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT
- ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK
- ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT
- ENA_ETH_IO_TX_META_DESC_PHASE_MASK
- ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT
- ENA_ETH_IO_TX_META_DESC_REQ_ID_HI_MASK
- ENA_ETH_IO_TX_META_DESC_REQ_ID_LO_MASK
- ENA_FEATURE_MAX_QUEUE_EXT_VER
- ENA_FLAG_DEVICE_RUNNING
- ENA_FLAG_DEV_UP
- ENA_FLAG_LINK_UP
- ENA_FLAG_MSIX_ENABLED
- ENA_FLAG_ONGOING_RESET
- ENA_FLAG_TRIGGER_RESET
- ENA_H
- ENA_HASH_KEY_SIZE
- ENA_HW_HINTS_NO_TIMEOUT
- ENA_INTR_INITIAL_RX_INTERVAL_USECS
- ENA_INTR_INITIAL_TX_INTERVAL_USECS
- ENA_IO_IRQ_FIRST_IDX
- ENA_IO_IRQ_IDX
- ENA_IO_RXQ_IDX
- ENA_IO_RXQ_IDX_TO_COMBINED_IDX
- ENA_IO_TXQ_IDX
- ENA_IO_TXQ_IDX_TO_COMBINED_IDX
- ENA_IRQNAME_SIZE
- ENA_LEN_ERR
- ENA_MAX_HANDLERS
- ENA_MAX_MSIX_VEC
- ENA_MAX_NO_INTERRUPT_ITERATIONS
- ENA_MAX_NUM_IO_QUEUES
- ENA_MAX_PHYS_ADDR_SIZE_BITS
- ENA_MEM_BAR
- ENA_MGMNT_IRQ_IDX
- ENA_MIN_MSIX_VEC
- ENA_MIN_MTU
- ENA_MIN_RING_SIZE
- ENA_MMIO_DISABLE_REG_READ
- ENA_MMIO_READ_TIMEOUT
- ENA_MONITORED_TX_QUEUES
- ENA_NAME_MAX_LEN
- ENA_NAPI_BUDGET
- ENA_OVR_FLO
- ENA_PAGE_SIZE
- ENA_PCI_ID_TABLE_ENTRY
- ENA_PCI_ID_TBL_H_
- ENA_PKT_MAX_BUFS
- ENA_PKT_RDY
- ENA_PMU_INT
- ENA_POLL_MS
- ENA_REGS_ACQ_BASE_HI_OFF
- ENA_REGS_ACQ_BASE_LO_OFF
- ENA_REGS_ACQ_CAPS_ACQ_DEPTH_MASK
- ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_MASK
- ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_SHIFT
- ENA_REGS_ACQ_CAPS_OFF
- ENA_REGS_ACQ_TAIL_OFF
- ENA_REGS_ADMIN_INTR_MASK
- ENA_REGS_AENQ_BASE_HI_OFF
- ENA_REGS_AENQ_BASE_LO_OFF
- ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK
- ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_MASK
- ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_SHIFT
- ENA_REGS_AENQ_CAPS_OFF
- ENA_REGS_AENQ_HEAD_DB_OFF
- ENA_REGS_AENQ_TAIL_OFF
- ENA_REGS_AQ_BASE_HI_OFF
- ENA_REGS_AQ_BASE_LO_OFF
- ENA_REGS_AQ_CAPS_AQ_DEPTH_MASK
- ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_MASK
- ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_SHIFT
- ENA_REGS_AQ_CAPS_OFF
- ENA_REGS_AQ_DB_OFF
- ENA_REGS_CAPS_ADMIN_CMD_TO_MASK
- ENA_REGS_CAPS_ADMIN_CMD_TO_SHIFT
- ENA_REGS_CAPS_CONTIGUOUS_QUEUE_REQUIRED_MASK
- ENA_REGS_CAPS_DMA_ADDR_WIDTH_MASK
- ENA_REGS_CAPS_DMA_ADDR_WIDTH_SHIFT
- ENA_REGS_CAPS_EXT_OFF
- ENA_REGS_CAPS_OFF
- ENA_REGS_CAPS_RESET_TIMEOUT_MASK
- ENA_REGS_CAPS_RESET_TIMEOUT_SHIFT
- ENA_REGS_CONTROLLER_VERSION_IMPL_ID_MASK
- ENA_REGS_CONTROLLER_VERSION_IMPL_ID_SHIFT
- ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK
- ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_SHIFT
- ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK
- ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_SHIFT
- ENA_REGS_CONTROLLER_VERSION_OFF
- ENA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK
- ENA_REGS_DEV_CTL_AQ_RESTART_MASK
- ENA_REGS_DEV_CTL_AQ_RESTART_SHIFT
- ENA_REGS_DEV_CTL_DEV_RESET_MASK
- ENA_REGS_DEV_CTL_IO_RESUME_MASK
- ENA_REGS_DEV_CTL_IO_RESUME_SHIFT
- ENA_REGS_DEV_CTL_OFF
- ENA_REGS_DEV_CTL_QUIESCENT_MASK
- ENA_REGS_DEV_CTL_QUIESCENT_SHIFT
- ENA_REGS_DEV_CTL_RESET_REASON_MASK
- ENA_REGS_DEV_CTL_RESET_REASON_SHIFT
- ENA_REGS_DEV_STS_AQ_RESTART_FINISHED_MASK
- ENA_REGS_DEV_STS_AQ_RESTART_FINISHED_SHIFT
- ENA_REGS_DEV_STS_AQ_RESTART_IN_PROGRESS_MASK
- ENA_REGS_DEV_STS_AQ_RESTART_IN_PROGRESS_SHIFT
- ENA_REGS_DEV_STS_FATAL_ERROR_MASK
- ENA_REGS_DEV_STS_FATAL_ERROR_SHIFT
- ENA_REGS_DEV_STS_OFF
- ENA_REGS_DEV_STS_QUIESCENT_STATE_ACHIEVED_MASK
- ENA_REGS_DEV_STS_QUIESCENT_STATE_ACHIEVED_SHIFT
- ENA_REGS_DEV_STS_QUIESCENT_STATE_IN_PROGRESS_MASK
- ENA_REGS_DEV_STS_QUIESCENT_STATE_IN_PROGRESS_SHIFT
- ENA_REGS_DEV_STS_READY_MASK
- ENA_REGS_DEV_STS_RESET_FINISHED_MASK
- ENA_REGS_DEV_STS_RESET_FINISHED_SHIFT
- ENA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK
- ENA_REGS_DEV_STS_RESET_IN_PROGRESS_SHIFT
- ENA_REGS_INTR_MASK_OFF
- ENA_REGS_MMIO_REG_READ_OFF
- ENA_REGS_MMIO_REG_READ_REG_OFF_MASK
- ENA_REGS_MMIO_REG_READ_REG_OFF_SHIFT
- ENA_REGS_MMIO_REG_READ_REQ_ID_MASK
- ENA_REGS_MMIO_RESP_HI_OFF
- ENA_REGS_MMIO_RESP_LO_OFF
- ENA_REGS_RESET_ADMIN_TO
- ENA_REGS_RESET_DRIVER_INVALID_STATE
- ENA_REGS_RESET_GENERIC
- ENA_REGS_RESET_INIT_ERR
- ENA_REGS_RESET_INV_RX_REQ_ID
- ENA_REGS_RESET_INV_TX_REQ_ID
- ENA_REGS_RESET_KEEP_ALIVE_TO
- ENA_REGS_RESET_MISS_INTERRUPT
- ENA_REGS_RESET_MISS_TX_CMPL
- ENA_REGS_RESET_NORMAL
- ENA_REGS_RESET_OS_NETDEV_WD
- ENA_REGS_RESET_OS_TRIGGER
- ENA_REGS_RESET_SHUTDOWN
- ENA_REGS_RESET_TOO_MANY_RX_DESCS
- ENA_REGS_RESET_USER_TRIGGER
- ENA_REGS_RSS_IND_ENTRY_UPDATE_CQ_IDX_MASK
- ENA_REGS_RSS_IND_ENTRY_UPDATE_CQ_IDX_SHIFT
- ENA_REGS_RSS_IND_ENTRY_UPDATE_INDEX_MASK
- ENA_REGS_RSS_IND_ENTRY_UPDATE_OFF
- ENA_REGS_VERSION_MAJOR_VERSION_MASK
- ENA_REGS_VERSION_MAJOR_VERSION_SHIFT
- ENA_REGS_VERSION_MINOR_VERSION_MASK
- ENA_REGS_VERSION_OFF
- ENA_REG_BAR
- ENA_REG_READ_TIMEOUT
- ENA_RESEL
- ENA_RX_REFILL_THRESH_DIVIDER
- ENA_RX_REFILL_THRESH_PACKET
- ENA_RX_RING_IDX_ADD
- ENA_RX_RING_IDX_NEXT
- ENA_RX_RSS_TABLE_LOG_SIZE
- ENA_RX_RSS_TABLE_SIZE
- ENA_SCAM_SEL
- ENA_STATS_ARRAY_ENA_COM
- ENA_STATS_ARRAY_GLOBAL
- ENA_STATS_ARRAY_RX
- ENA_STATS_ARRAY_TX
- ENA_STAT_ENA_COM_ENTRY
- ENA_STAT_ENTRY
- ENA_STAT_GLOBAL_ENTRY
- ENA_STAT_RX_ENTRY
- ENA_STAT_TX_ENTRY
- ENA_TBUS_ERR
- ENA_TMT_OK
- ENA_TMT_REC
- ENA_TOTAL_NUM_QUEUES
- ENA_TX_POLL_BUDGET_DIVIDER
- ENA_TX_RING_IDX_NEXT
- ENA_TX_WAKEUP_THRESH
- ENA_XMIT
- ENB
- ENB0
- ENB1
- ENBBM
- ENBDSIRX
- ENBHDCP
- ENBI2C
- ENBL1
- ENBL2
- ENBLCD0
- ENBL_64
- ENBREG
- ENBT
- ENBUSFREE
- ENB_FAST_REARBITRATE
- ENC28J60_BIT_FIELD_CLR
- ENC28J60_BIT_FIELD_SET
- ENC28J60_LAMPS_MODE
- ENC28J60_MSG_DEFAULT
- ENC28J60_READ_BUF_MEM
- ENC28J60_READ_CTRL_REG
- ENC28J60_SOFT_RESET
- ENC28J60_WRITE_BUF_MEM
- ENC28J60_WRITE_CTRL_REG
- ENCAPS_OVERHEAD
- ENCAP_MGMT_PKT
- ENCAP_TYPE_ETHER
- ENCAP_TYPE_IPPROTO
- ENCAP_VNI_BITWIDTH
- ENCCYCLE
- ENCI_CFILT7
- ENCI_CFILT_CMPT_CB_DLY
- ENCI_CFILT_CMPT_CR_DLY
- ENCI_CFILT_CMPT_SEL_HIGH
- ENCI_CFILT_CTRL
- ENCI_CFILT_CTRL2
- ENCI_CFILT_CVBS_CB_DLY
- ENCI_CFILT_CVBS_CR_DLY
- ENCI_DACSEL_0
- ENCI_DACSEL_1
- ENCI_DBG_FLDLN_INT
- ENCI_DBG_FLDLN_RST
- ENCI_DBG_MAXLN
- ENCI_DBG_MAXPX
- ENCI_DBG_PX_INT
- ENCI_DBG_PX_RST
- ENCI_DE_H_BEGIN
- ENCI_DE_H_END
- ENCI_DE_V_BEGIN_EVEN
- ENCI_DE_V_BEGIN_ODD
- ENCI_DE_V_END_EVEN
- ENCI_DE_V_END_ODD
- ENCI_DVI_HSO_BEGIN
- ENCI_DVI_HSO_END
- ENCI_DVI_VSO_BEGIN_EVN
- ENCI_DVI_VSO_BEGIN_ODD
- ENCI_DVI_VSO_BLINE_EVN
- ENCI_DVI_VSO_BLINE_ODD
- ENCI_DVI_VSO_ELINE_EVN
- ENCI_DVI_VSO_ELINE_ODD
- ENCI_DVI_VSO_END_EVN
- ENCI_DVI_VSO_END_ODD
- ENCI_INFO_READ
- ENCI_MACV_BKP_MAX
- ENCI_MACV_MAX_AMP
- ENCI_MACV_MAX_AMP_ENABLE_CHANGE
- ENCI_MACV_MAX_AMP_VAL
- ENCI_MACV_N0
- ENCI_MACV_N1
- ENCI_MACV_N10
- ENCI_MACV_N11
- ENCI_MACV_N12
- ENCI_MACV_N13
- ENCI_MACV_N14
- ENCI_MACV_N15
- ENCI_MACV_N16
- ENCI_MACV_N17
- ENCI_MACV_N18
- ENCI_MACV_N19
- ENCI_MACV_N2
- ENCI_MACV_N20
- ENCI_MACV_N21
- ENCI_MACV_N22
- ENCI_MACV_N3
- ENCI_MACV_N4
- ENCI_MACV_N5
- ENCI_MACV_N6
- ENCI_MACV_N7
- ENCI_MACV_N8
- ENCI_MACV_N9
- ENCI_MACV_PULSE_HI
- ENCI_MACV_PULSE_LO
- ENCI_RGB_SETTING
- ENCI_SYNC_ADJ
- ENCI_SYNC_CTRL
- ENCI_SYNC_HOFFST
- ENCI_SYNC_HSO_BEGIN
- ENCI_SYNC_HSO_END
- ENCI_SYNC_LINE_LENGTH
- ENCI_SYNC_MODE
- ENCI_SYNC_PIXEL_EN
- ENCI_SYNC_TO_LINE_EN
- ENCI_SYNC_TO_PIXEL
- ENCI_SYNC_VOFFST
- ENCI_SYNC_VSO_EVN
- ENCI_SYNC_VSO_EVNLN
- ENCI_SYNC_VSO_ODD
- ENCI_SYNC_VSO_ODDLN
- ENCI_TST_CB
- ENCI_TST_CLRBAR_STRT
- ENCI_TST_CLRBAR_WIDTH
- ENCI_TST_CR
- ENCI_TST_EN
- ENCI_TST_MDSEL
- ENCI_TST_VDCNT_STSET
- ENCI_TST_Y
- ENCI_VBI_CC525_LN
- ENCI_VBI_CC625_LN
- ENCI_VBI_CCDT_EVN
- ENCI_VBI_CCDT_ODD
- ENCI_VBI_CGMSDT_H
- ENCI_VBI_CGMSDT_L
- ENCI_VBI_CGMS_LN
- ENCI_VBI_SETTING
- ENCI_VBI_TTXDT0
- ENCI_VBI_TTXDT1
- ENCI_VBI_TTXDT2
- ENCI_VBI_TTXDT3
- ENCI_VBI_TTX_HTIME
- ENCI_VBI_TTX_LN
- ENCI_VBI_WSSDT
- ENCI_VBI_WSS_LN
- ENCI_VFIFO2VD_CTL
- ENCI_VFIFO2VD_CTL2
- ENCI_VFIFO2VD_CTL_ENABLE
- ENCI_VFIFO2VD_CTL_VD_SEL
- ENCI_VFIFO2VD_LINE_BOT_END
- ENCI_VFIFO2VD_LINE_BOT_START
- ENCI_VFIFO2VD_LINE_TOP_END
- ENCI_VFIFO2VD_LINE_TOP_START
- ENCI_VFIFO2VD_PIXEL_END
- ENCI_VFIFO2VD_PIXEL_START
- ENCI_VIDEO_BRIGHT
- ENCI_VIDEO_CONT
- ENCI_VIDEO_EN
- ENCI_VIDEO_EN_ENABLE
- ENCI_VIDEO_FSC_ADJ
- ENCI_VIDEO_HUE
- ENCI_VIDEO_MODE
- ENCI_VIDEO_MODE_ADV
- ENCI_VIDEO_MODE_ADV_DMXMD
- ENCI_VIDEO_MODE_ADV_VBICTL_LINE_17_22
- ENCI_VIDEO_MODE_ADV_YBW_HIGH
- ENCI_VIDEO_MODE_ADV_YBW_LOW
- ENCI_VIDEO_MODE_ADV_YBW_MEDIUM
- ENCI_VIDEO_SAT
- ENCI_VIDEO_SCH
- ENCI_YC_DELAY
- ENCLOSURE_CHANNEL
- ENCLOSURE_COMPONENT_ARRAY_DEVICE
- ENCLOSURE_COMPONENT_CONTROLLER_ELECTRONICS
- ENCLOSURE_COMPONENT_DEVICE
- ENCLOSURE_COMPONENT_SAS_EXPANDER
- ENCLOSURE_COMPONENT_SCSI_INITIATOR_PORT
- ENCLOSURE_COMPONENT_SCSI_TARGET_PORT
- ENCLOSURE_NAME_SIZE
- ENCLOSURE_SETTING_BLINK_A_OFF_ON
- ENCLOSURE_SETTING_BLINK_A_ON_OFF
- ENCLOSURE_SETTING_BLINK_B_OFF_ON
- ENCLOSURE_SETTING_BLINK_B_ON_OFF
- ENCLOSURE_SETTING_DISABLED
- ENCLOSURE_SETTING_ENABLED
- ENCLOSURE_STATUS_CRITICAL
- ENCLOSURE_STATUS_MAX
- ENCLOSURE_STATUS_NON_CRITICAL
- ENCLOSURE_STATUS_NOT_INSTALLED
- ENCLOSURE_STATUS_OK
- ENCLOSURE_STATUS_UNAVAILABLE
- ENCLOSURE_STATUS_UNKNOWN
- ENCLOSURE_STATUS_UNRECOVERABLE
- ENCLOSURE_STATUS_UNSUPPORTED
- ENCLOSURE_SWITCH
- ENCLS_EXITING_BITMAP
- ENCLS_EXITING_BITMAP_HIGH
- ENCL_DACSEL_0
- ENCL_DACSEL_1
- ENCL_DBG_LN_INT
- ENCL_DBG_LN_RST
- ENCL_DBG_PX_INT
- ENCL_DBG_PX_RST
- ENCL_INFO_READ
- ENCL_MAX_LINE_SWITCH_POINT
- ENCL_SYNC_LINE_LENGTH
- ENCL_SYNC_PIXEL_EN
- ENCL_SYNC_TO_LINE_EN
- ENCL_SYNC_TO_PIXEL
- ENCL_TCON_INVERT_CTL
- ENCL_TST_CB
- ENCL_TST_CLRBAR_STRT
- ENCL_TST_CLRBAR_WIDTH
- ENCL_TST_CR
- ENCL_TST_EN
- ENCL_TST_MDSEL
- ENCL_TST_VDCNT_STSET
- ENCL_TST_Y
- ENCL_VFIFO2VD_CTL
- ENCL_VFIFO2VD_CTL2
- ENCL_VFIFO2VD_LINE_BOT_END
- ENCL_VFIFO2VD_LINE_BOT_START
- ENCL_VFIFO2VD_LINE_TOP_END
- ENCL_VFIFO2VD_LINE_TOP_START
- ENCL_VFIFO2VD_PIXEL_END
- ENCL_VFIFO2VD_PIXEL_START
- ENCL_VIDEO_BLANKPB_VAL
- ENCL_VIDEO_BLANKPR_VAL
- ENCL_VIDEO_BLANKY_VAL
- ENCL_VIDEO_EN
- ENCL_VIDEO_FILT_CTRL
- ENCL_VIDEO_HAVON_BEGIN
- ENCL_VIDEO_HAVON_END
- ENCL_VIDEO_HOFFST
- ENCL_VIDEO_HSO_BEGIN
- ENCL_VIDEO_HSO_END
- ENCL_VIDEO_MATRIX_CB
- ENCL_VIDEO_MATRIX_CR
- ENCL_VIDEO_MAX_LNCNT
- ENCL_VIDEO_MAX_PXCNT
- ENCL_VIDEO_MODE
- ENCL_VIDEO_MODE_ADV
- ENCL_VIDEO_OFLD_VOAV_OFST
- ENCL_VIDEO_OFLD_VPEQ_OFST
- ENCL_VIDEO_PB_OFFST
- ENCL_VIDEO_PB_SCL
- ENCL_VIDEO_PR_OFFST
- ENCL_VIDEO_PR_SCL
- ENCL_VIDEO_RGBIN_CTRL
- ENCL_VIDEO_RGB_CTRL
- ENCL_VIDEO_VAVON_BLINE
- ENCL_VIDEO_VAVON_ELINE
- ENCL_VIDEO_VOFFST
- ENCL_VIDEO_VSO_BEGIN
- ENCL_VIDEO_VSO_BLINE
- ENCL_VIDEO_VSO_ELINE
- ENCL_VIDEO_VSO_END
- ENCL_VIDEO_YC_DLY
- ENCL_VIDEO_YFP1_HTIME
- ENCL_VIDEO_YFP2_HTIME
- ENCL_VIDEO_Y_OFFST
- ENCL_VIDEO_Y_SCL
- ENCODE
- ENCODE64
- ENCODER_ALMOND_ENUM_ID1
- ENCODER_ALMOND_ENUM_ID2
- ENCODER_CH7301_ENUM_ID1
- ENCODER_CH7303_ENUM_ID1
- ENCODER_CONTROL_DISABLE
- ENCODER_CONTROL_ENABLE
- ENCODER_CONTROL_INIT
- ENCODER_CONTROL_SETUP
- ENCODER_CRTC_MASK
- ENCODER_DEF_BITRATE
- ENCODER_DP_AN9801_ENUM_ID1
- ENCODER_DP_DP501_ENUM_ID1
- ENCODER_EXTERNAL_SDVOA_ENUM_ID1
- ENCODER_EXTERNAL_SDVOA_ENUM_ID2
- ENCODER_EXTERNAL_SDVOB_ENUM_ID1
- ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1
- ENCODER_GENERIC_CMD_PARAMETERS_V5
- ENCODER_HDMI_ANX9805_ENUM_ID1
- ENCODER_HDMI_INTERNAL_ENUM_ID1
- ENCODER_HDMI_SI1930_ENUM_ID1
- ENCODER_HDMI_SI1932_ENUM_ID1
- ENCODER_ID_EXTERNAL_MVPU_FPGA
- ENCODER_ID_EXTERNAL_NUTMEG
- ENCODER_ID_EXTERNAL_TRAVIS
- ENCODER_ID_INTERNAL_DAC1
- ENCODER_ID_INTERNAL_DAC2
- ENCODER_ID_INTERNAL_DDI
- ENCODER_ID_INTERNAL_HDMI
- ENCODER_ID_INTERNAL_KLDSCP_DAC1
- ENCODER_ID_INTERNAL_KLDSCP_DAC2
- ENCODER_ID_INTERNAL_KLDSCP_LVTMA
- ENCODER_ID_INTERNAL_KLDSCP_TMDS1
- ENCODER_ID_INTERNAL_LVDS
- ENCODER_ID_INTERNAL_LVTM1
- ENCODER_ID_INTERNAL_TMDS1
- ENCODER_ID_INTERNAL_TMDS2
- ENCODER_ID_INTERNAL_UNIPHY
- ENCODER_ID_INTERNAL_UNIPHY1
- ENCODER_ID_INTERNAL_UNIPHY2
- ENCODER_ID_INTERNAL_UNIPHY3
- ENCODER_ID_INTERNAL_VIRTUAL
- ENCODER_ID_INTERNAL_WIRELESS
- ENCODER_ID_UNKNOWN
- ENCODER_INTERNAL_DAC1_ENUM_ID1
- ENCODER_INTERNAL_DAC2_ENUM_ID1
- ENCODER_INTERNAL_DDI_ENUM_ID1
- ENCODER_INTERNAL_DVO1_ENUM_ID1
- ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1
- ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1
- ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1
- ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1
- ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1
- ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2
- ENCODER_INTERNAL_LVDS_ENUM_ID1
- ENCODER_INTERNAL_LVTM1_ENUM_ID1
- ENCODER_INTERNAL_SDVOA_ENUM_ID1
- ENCODER_INTERNAL_SDVOA_ENUM_ID2
- ENCODER_INTERNAL_SDVOB_ENUM_ID1
- ENCODER_INTERNAL_TMDS1_ENUM_ID1
- ENCODER_INTERNAL_TMDS2_ENUM_ID1
- ENCODER_INTERNAL_UNIPHY1_ENUM_ID1
- ENCODER_INTERNAL_UNIPHY1_ENUM_ID2
- ENCODER_INTERNAL_UNIPHY2_ENUM_ID1
- ENCODER_INTERNAL_UNIPHY2_ENUM_ID2
- ENCODER_INTERNAL_UNIPHY3_ENUM_ID1
- ENCODER_INTERNAL_UNIPHY3_ENUM_ID2
- ENCODER_INTERNAL_UNIPHY_ENUM_ID1
- ENCODER_INTERNAL_UNIPHY_ENUM_ID2
- ENCODER_LINK_SETUP_PARAMETERS_V5
- ENCODER_MAX_BITRATE
- ENCODER_MIN_BITRATE
- ENCODER_MODE_IS_DP
- ENCODER_MVPU_FPGA_ENUM_ID1
- ENCODER_NUTMEG_ENUM_ID1
- ENCODER_OBJECT_ID_ALMOND
- ENCODER_OBJECT_ID_CH7301
- ENCODER_OBJECT_ID_CH7303
- ENCODER_OBJECT_ID_DP_AN9801
- ENCODER_OBJECT_ID_DP_DP501
- ENCODER_OBJECT_ID_EXTERNAL_SDVOA
- ENCODER_OBJECT_ID_EXTERNAL_SDVOB
- ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO
- ENCODER_OBJECT_ID_HDMI_ANX9805
- ENCODER_OBJECT_ID_HDMI_INTERNAL
- ENCODER_OBJECT_ID_HDMI_SI1930
- ENCODER_OBJECT_ID_HDMI_SI1932
- ENCODER_OBJECT_ID_INTERNAL_AMCLK
- ENCODER_OBJECT_ID_INTERNAL_DAC1
- ENCODER_OBJECT_ID_INTERNAL_DAC2
- ENCODER_OBJECT_ID_INTERNAL_DDI
- ENCODER_OBJECT_ID_INTERNAL_DVO1
- ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1
- ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2
- ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1
- ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA
- ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1
- ENCODER_OBJECT_ID_INTERNAL_LVDS
- ENCODER_OBJECT_ID_INTERNAL_LVTM1
- ENCODER_OBJECT_ID_INTERNAL_SDVOA
- ENCODER_OBJECT_ID_INTERNAL_SDVOB
- ENCODER_OBJECT_ID_INTERNAL_TMDS1
- ENCODER_OBJECT_ID_INTERNAL_TMDS2
- ENCODER_OBJECT_ID_INTERNAL_UNIPHY
- ENCODER_OBJECT_ID_INTERNAL_UNIPHY1
- ENCODER_OBJECT_ID_INTERNAL_UNIPHY2
- ENCODER_OBJECT_ID_INTERNAL_UNIPHY3
- ENCODER_OBJECT_ID_INTERNAL_VCE
- ENCODER_OBJECT_ID_MVPU_FPGA
- ENCODER_OBJECT_ID_NONE
- ENCODER_OBJECT_ID_NUTMEG
- ENCODER_OBJECT_ID_SI170B
- ENCODER_OBJECT_ID_SI178
- ENCODER_OBJECT_ID_TITFP513
- ENCODER_OBJECT_ID_TRAVIS
- ENCODER_OBJECT_ID_VT1623
- ENCODER_OBJECT_ID_VT1625
- ENCODER_REFCLK_SRC_DCPLL
- ENCODER_REFCLK_SRC_EXTCLK
- ENCODER_REFCLK_SRC_INVALID
- ENCODER_REFCLK_SRC_P1PLL
- ENCODER_REFCLK_SRC_P2PLL
- ENCODER_REFCLK_SRC_P3PLL
- ENCODER_SI178_ENUM_ID1
- ENCODER_SIL170B_ENUM_ID1
- ENCODER_STREAM_OFFSET
- ENCODER_STREAM_SETUP_PARAMETERS_V5
- ENCODER_TITFP513_ENUM_ID1
- ENCODER_TRAVIS_ENUM_ID1
- ENCODER_TRAVIS_ENUM_ID2
- ENCODER_UNIT
- ENCODER_VCE_ENUM_ID1
- ENCODER_VT1623_ENUM_ID1
- ENCODER_VT1625_ENUM_ID1
- ENCODE_BIT
- ENCODE_BUSDEVFN
- ENCODE_CMD
- ENCODE_CTXID
- ENCODE_DATA
- ENCODE_FRAME_POINTER
- ENCODE_LANES
- ENCODE_PGU_XY
- ENCODE_SHIFT
- ENCODE_STR
- ENCODING_DEFAULT
- ENCODING_FM_MARK
- ENCODING_FM_SPACE
- ENCODING_MANCHESTER
- ENCODING_NRZ
- ENCODING_NRZI
- ENCOLOREXP
- ENCP_DACSEL_0
- ENCP_DACSEL_1
- ENCP_DBG_LN_INT
- ENCP_DBG_LN_RST
- ENCP_DBG_PX_INT
- ENCP_DBG_PX_RST
- ENCP_DE_H_BEGIN
- ENCP_DE_H_END
- ENCP_DE_V_BEGIN_EVEN
- ENCP_DE_V_BEGIN_ODD
- ENCP_DE_V_END_EVEN
- ENCP_DE_V_END_ODD
- ENCP_DVI_HSO_BEGIN
- ENCP_DVI_HSO_END
- ENCP_DVI_VSO_BEGIN_EVN
- ENCP_DVI_VSO_BEGIN_ODD
- ENCP_DVI_VSO_BLINE_EVN
- ENCP_DVI_VSO_BLINE_ODD
- ENCP_DVI_VSO_ELINE_EVN
- ENCP_DVI_VSO_ELINE_ODD
- ENCP_DVI_VSO_END_EVN
- ENCP_DVI_VSO_END_ODD
- ENCP_INFO_READ
- ENCP_MACV_1ST_PSSYNC_STRT
- ENCP_MACV_AGC_END
- ENCP_MACV_AGC_STRT
- ENCP_MACV_BLANKY_VAL
- ENCP_MACV_EN
- ENCP_MACV_ENDLINE
- ENCP_MACV_MAXY_VAL
- ENCP_MACV_PSSYNC_STRT
- ENCP_MACV_STRTLINE
- ENCP_MACV_TIME_DOWN
- ENCP_MACV_TIME_LO
- ENCP_MACV_TIME_RST
- ENCP_MACV_TIME_UP
- ENCP_MACV_TS_CNT_MAX_H
- ENCP_MACV_TS_CNT_MAX_L
- ENCP_MACV_WAVE_END
- ENCP_MAX_LINE_SWITCH_POINT
- ENCP_SYNC_LINE_LENGTH
- ENCP_SYNC_PIXEL_EN
- ENCP_SYNC_TO_LINE_EN
- ENCP_SYNC_TO_PIXEL
- ENCP_VBI_BEGIN
- ENCP_VBI_CTRL
- ENCP_VBI_DATA0
- ENCP_VBI_DATA1
- ENCP_VBI_HVAL
- ENCP_VBI_SETTING
- ENCP_VBI_WIDTH
- ENCP_VFIFO2VD_CTL
- ENCP_VFIFO2VD_CTL2
- ENCP_VFIFO2VD_LINE_BOT_END
- ENCP_VFIFO2VD_LINE_BOT_START
- ENCP_VFIFO2VD_LINE_TOP_END
- ENCP_VFIFO2VD_LINE_TOP_START
- ENCP_VFIFO2VD_PIXEL_END
- ENCP_VFIFO2VD_PIXEL_START
- ENCP_VIDEO_BLANKPB_VAL
- ENCP_VIDEO_BLANKPR_VAL
- ENCP_VIDEO_BLANKY_VAL
- ENCP_VIDEO_EN
- ENCP_VIDEO_EQPULS_BEGIN
- ENCP_VIDEO_EQPULS_BLINE
- ENCP_VIDEO_EQPULS_ELINE
- ENCP_VIDEO_EQPULS_END
- ENCP_VIDEO_FILT_CTRL
- ENCP_VIDEO_HAVON_BEGIN
- ENCP_VIDEO_HAVON_END
- ENCP_VIDEO_HOFFST
- ENCP_VIDEO_HSO_BEGIN
- ENCP_VIDEO_HSO_END
- ENCP_VIDEO_HSPULS_BEGIN
- ENCP_VIDEO_HSPULS_END
- ENCP_VIDEO_HSPULS_SWITCH
- ENCP_VIDEO_MACV_OFFST
- ENCP_VIDEO_MACV_SCL
- ENCP_VIDEO_MATRIX_CB
- ENCP_VIDEO_MATRIX_CR
- ENCP_VIDEO_MAX_LNCNT
- ENCP_VIDEO_MAX_PXCNT
- ENCP_VIDEO_MODE
- ENCP_VIDEO_MODE_ADV
- ENCP_VIDEO_MODE_DE_V_HIGH
- ENCP_VIDEO_OFLD_VOAV_OFST
- ENCP_VIDEO_OFLD_VPEQ_OFST
- ENCP_VIDEO_PB_OFFST
- ENCP_VIDEO_PB_SCL
- ENCP_VIDEO_PR_OFFST
- ENCP_VIDEO_PR_SCL
- ENCP_VIDEO_RGBIN_CTRL
- ENCP_VIDEO_RGB_CTRL
- ENCP_VIDEO_SY2_VAL
- ENCP_VIDEO_SYNC_MODE
- ENCP_VIDEO_SYNC_OFFST
- ENCP_VIDEO_SYNC_SCL
- ENCP_VIDEO_SYNC_WAVE_CURVE
- ENCP_VIDEO_SY_VAL
- ENCP_VIDEO_VAVON_BLINE
- ENCP_VIDEO_VAVON_ELINE
- ENCP_VIDEO_VOFFST
- ENCP_VIDEO_VSO_BEGIN
- ENCP_VIDEO_VSO_BLINE
- ENCP_VIDEO_VSO_ELINE
- ENCP_VIDEO_VSO_END
- ENCP_VIDEO_VSPULS_BEGIN
- ENCP_VIDEO_VSPULS_BLINE
- ENCP_VIDEO_VSPULS_ELINE
- ENCP_VIDEO_VSPULS_END
- ENCP_VIDEO_YC_DLY
- ENCP_VIDEO_YFP1_HTIME
- ENCP_VIDEO_YFP2_HTIME
- ENCP_VIDEO_Y_OFFST
- ENCP_VIDEO_Y_SCL
- ENCROUND
- ENCRYPT
- ENCRYPTED
- ENCRYPTED_DEBUG
- ENCRYPTION_MAX_OVERHEAD
- ENCRYPT_128
- ENCRYPT_128_2
- ENCRYPT_192
- ENCRYPT_192_2
- ENCRYPT_256
- ENCRYPT_256_2
- ENCRYPT_256_TWO_ROUNDS_2
- ENCRYPT_BOTH
- ENCRYPT_DISABLED
- ENCRYPT_P2P
- ENCRYPT_SINGLE_BLOCK
- ENCRYPT_STATUS_CHANGE_TIMEOUT_MS
- ENCRYPT_TWO_ROUNDS
- ENCRYPT_TWO_ROUNDS_2
- ENCRYPT_TWO_ROUNDS_LAST
- ENCRYPT_TWO_ROUNDS_LAST_2
- ENCRYP_PROTOCOL_MAX
- ENCRYP_PROTOCOL_OPENSYS
- ENCRYP_PROTOCOL_WAPI
- ENCRYP_PROTOCOL_WEP
- ENCRYP_PROTOCOL_WPA
- ENCRYP_PROTOCOL_WPA2
- ENCRY_CTRL_STATE
- ENCR_AES_SEL_SHIFT
- ENCR_ALG_AES
- ENCR_ALG_DES
- ENCR_ALG_KASUMI
- ENCR_ALG_MASK
- ENCR_ALG_NONE
- ENCR_ALG_SHIFT
- ENCR_ALG_SNOW_3G
- ENCR_ALG_ZUC
- ENCR_BUSY_SHIFT
- ENCR_KASUMI_SEL_SHIFT
- ENCR_KEY_SZ_3DES
- ENCR_KEY_SZ_AES128
- ENCR_KEY_SZ_AES256
- ENCR_KEY_SZ_DES
- ENCR_KEY_SZ_MASK
- ENCR_KEY_SZ_SHIFT
- ENCR_MODE_CBC
- ENCR_MODE_CCM
- ENCR_MODE_CTR
- ENCR_MODE_ECB
- ENCR_MODE_MASK
- ENCR_MODE_SHIFT
- ENCR_MODE_XTS
- ENCR_SNOW3G_SEL_SHIFT
- ENCR_XTS_DU_SIZE_MASK
- ENCR_XTS_DU_SIZE_SHIFT
- ENCR_ZUC_SEL_SHIFT
- ENCTYPE_AES128_CTS_HMAC_SHA1_96
- ENCTYPE_AES256_CTS_HMAC_SHA1_96
- ENCTYPE_ARCFOUR_HMAC
- ENCTYPE_ARCFOUR_HMAC_EXP
- ENCTYPE_DES3_CBC_RAW
- ENCTYPE_DES3_CBC_SHA
- ENCTYPE_DES3_CBC_SHA1
- ENCTYPE_DES_CBC_CRC
- ENCTYPE_DES_CBC_MD4
- ENCTYPE_DES_CBC_MD5
- ENCTYPE_DES_CBC_RAW
- ENCTYPE_DES_HMAC_SHA1
- ENCTYPE_NULL
- ENCTYPE_UNKNOWN
- ENCT_DACSEL_0
- ENCT_DACSEL_1
- ENCT_DBG_LN_INT
- ENCT_DBG_LN_RST
- ENCT_DBG_PX_INT
- ENCT_DBG_PX_RST
- ENCT_INFO_READ
- ENCT_MAX_LINE_SWITCH_POINT
- ENCT_SYNC_LINE_LENGTH
- ENCT_SYNC_PIXEL_EN
- ENCT_SYNC_TO_LINE_EN
- ENCT_SYNC_TO_PIXEL
- ENCT_TST_CB
- ENCT_TST_CLRBAR_STRT
- ENCT_TST_CLRBAR_WIDTH
- ENCT_TST_CR
- ENCT_TST_EN
- ENCT_TST_MDSEL
- ENCT_TST_VDCNT_STSET
- ENCT_TST_Y
- ENCT_VFIFO2VD_CTL
- ENCT_VFIFO2VD_CTL2
- ENCT_VFIFO2VD_LINE_BOT_END
- ENCT_VFIFO2VD_LINE_BOT_START
- ENCT_VFIFO2VD_LINE_TOP_END
- ENCT_VFIFO2VD_LINE_TOP_START
- ENCT_VFIFO2VD_PIXEL_END
- ENCT_VFIFO2VD_PIXEL_START
- ENCT_VIDEO_BLANKPB_VAL
- ENCT_VIDEO_BLANKPR_VAL
- ENCT_VIDEO_BLANKY_VAL
- ENCT_VIDEO_EN
- ENCT_VIDEO_FILT_CTRL
- ENCT_VIDEO_HAVON_BEGIN
- ENCT_VIDEO_HAVON_END
- ENCT_VIDEO_HOFFST
- ENCT_VIDEO_HSO_BEGIN
- ENCT_VIDEO_HSO_END
- ENCT_VIDEO_MATRIX_CB
- ENCT_VIDEO_MATRIX_CR
- ENCT_VIDEO_MAX_LNCNT
- ENCT_VIDEO_MAX_PXCNT
- ENCT_VIDEO_MODE
- ENCT_VIDEO_MODE_ADV
- ENCT_VIDEO_OFLD_VOAV_OFST
- ENCT_VIDEO_OFLD_VPEQ_OFST
- ENCT_VIDEO_PB_OFFST
- ENCT_VIDEO_PB_SCL
- ENCT_VIDEO_PR_OFFST
- ENCT_VIDEO_PR_SCL
- ENCT_VIDEO_RGBIN_CTRL
- ENCT_VIDEO_RGB_CTRL
- ENCT_VIDEO_VAVON_BLINE
- ENCT_VIDEO_VAVON_ELINE
- ENCT_VIDEO_VOFFST
- ENCT_VIDEO_VSO_BEGIN
- ENCT_VIDEO_VSO_BLINE
- ENCT_VIDEO_VSO_ELINE
- ENCT_VIDEO_VSO_END
- ENCT_VIDEO_YC_DLY
- ENCT_VIDEO_YFP1_HTIME
- ENCT_VIDEO_YFP2_HTIME
- ENCT_VIDEO_Y_OFFST
- ENCT_VIDEO_Y_SCL
- ENCX24J600_DEV_ID
- ENC_AUTHTAG_SIZE
- ENC_BUF_SIZE
- ENC_CNTRL_CTL_CODE
- ENC_CNTRL_RST_ENC
- ENC_CNTRL_RST_SEL
- ENC_DEINTERLACE_CAPABILITY
- ENC_EN_CHG
- ENC_H263_RC_FRAME_RATE_MAX
- ENC_H264_LEVEL_MAX
- ENC_H264_LOOP_FILTER_AB_MAX
- ENC_H264_LOOP_FILTER_AB_MIN
- ENC_H264_PROFILE_MAX
- ENC_H264_RC_FRAME_RATE_MAX
- ENC_HEVC_LEVEL_MAX
- ENC_HEVC_LOOP_FILTER_MAX
- ENC_HEVC_LOOP_FILTER_MIN
- ENC_HEVC_QP_INDEX_MAX
- ENC_HEVC_QP_INDEX_MIN
- ENC_HEVC_RC_FRAME_RATE_MAX
- ENC_INTRA_REFRESH_MB_MAX
- ENC_KEY
- ENC_KEY_SIZE
- ENC_MPEG4_VOP_TIME_RES_MAX
- ENC_MULTI_SLICE_BIT_MIN
- ENC_MULTI_SLICE_MB_MAX
- ENC_NAME_MAX_BLOCKLEN_8_OR_16
- ENC_PAGE0
- ENC_PAGE3
- ENC_PARAM_CHANGE
- ENC_ROLE_MASTER
- ENC_ROLE_SLAVE
- ENC_ROLE_SOLO
- ENC_ROTATION_CAPABILITY
- ENC_RX_BUF_END
- ENC_RX_BUF_START
- ENC_SCALING_CAPABILITY
- ENC_SNIFFER
- ENC_SRAM_SIZE
- ENC_TVDAC_SLEW_FAST
- ENC_TX_BUF_START
- ENC_TYPE_ALG_3DES
- ENC_TYPE_ALG_AES128
- ENC_TYPE_ALG_AES192
- ENC_TYPE_ALG_AES256
- ENC_TYPE_ALG_DES
- ENC_TYPE_ALG_MASK
- ENC_TYPE_ALG_RC4_NOSTREAM
- ENC_TYPE_ALG_RC4_STREAM
- ENC_TYPE_ALG_RESERVED
- ENC_TYPE_CHAINING_CBC
- ENC_TYPE_CHAINING_CFB
- ENC_TYPE_CHAINING_COUNTER
- ENC_TYPE_CHAINING_ECB
- ENC_TYPE_CHAINING_MASK
- ENC_V100_BASE_SIZE
- ENC_V100_H264_ME_SIZE
- ENC_V100_HEVC_ME_SIZE
- ENC_V100_MPEG4_ME_SIZE
- ENC_V100_VP8_ME_SIZE
- ENC_VBV_BUF_SIZE_MAX
- END
- END2D
- ENDA
- ENDB
- ENDBLK_COMMENT
- ENDCFG_BOS
- ENDCFG_WTS
- ENDDEF
- ENDEC_LOOPBACK
- ENDEV1
- ENDEV2
- ENDIAN
- ENDIANFLAG_LEN
- ENDIANNESS
- ENDIANNESS_BIG
- ENDIANNESS_LITTLE
- ENDIANNESS_MAP
- ENDIANNESS_MAX
- ENDIANNESS_MIDDLE
- ENDIANNESS_MIN
- ENDIANNESS_UNKNOWN
- ENDIANSEL
- ENDIAN_16IN32
- ENDIAN_8IN128
- ENDIAN_8IN16
- ENDIAN_8IN32
- ENDIAN_8IN64
- ENDIAN_BYTE_SWAP
- ENDIAN_CONVERT
- ENDIAN_CTR
- ENDIAN_FLAG
- ENDIAN_HALF_WORD_SWAP
- ENDIAN_MASK
- ENDIAN_MODE_NO_SWAP
- ENDIAN_MODE_SWAP_16
- ENDIAN_MODE_SWAP_32
- ENDIAN_NONE
- ENDIAN_SETTINGS
- ENDIAN_SET_EL1
- ENDIAN_SET_EL2
- ENDIAN_SWAP
- ENDIAN_SWAP_FULL
- ENDIAN_SWAP_NONE
- ENDIO_HOOK_POOL_SIZE
- ENDIO_LATENCY
- ENDLL_MASK
- ENDLL_SHIFT
- ENDLP_IE
- ENDMA
- ENDMADONE
- ENDMANUF
- ENDMARKER
- ENDNODE_COMMENT
- ENDN_MASK
- ENDN_SHIFT
- ENDP
- ENDPIPROC
- ENDPOINT0
- ENDPOINT1
- ENDPOINT2
- ENDPOINT3
- ENDPOINT4
- ENDPOINT5
- ENDPOINT6
- ENDPOINT7
- ENDPOINT8
- ENDPOINT_0
- ENDPOINT_0_INTERRUPT
- ENDPOINT_0_INTERRUPT_ENABLE
- ENDPOINT_1
- ENDPOINT_2
- ENDPOINT_3
- ENDPOINT_4
- ENDPOINT_5
- ENDPOINT_6
- ENDPOINT_7
- ENDPOINT_8
- ENDPOINT_A_INTERRUPT
- ENDPOINT_A_INTERRUPT_ENABLE
- ENDPOINT_BULK_DATA
- ENDPOINT_BYTE_COUNT
- ENDPOINT_B_INTERRUPT
- ENDPOINT_B_INTERRUPT_ENABLE
- ENDPOINT_CAPTURE
- ENDPOINT_C_INTERRUPT
- ENDPOINT_C_INTERRUPT_ENABLE
- ENDPOINT_DIRECTION
- ENDPOINT_D_INTERRUPT
- ENDPOINT_D_INTERRUPT_ENABLE
- ENDPOINT_ENABLE
- ENDPOINT_E_INTERRUPT
- ENDPOINT_E_INTERRUPT_ENABLE
- ENDPOINT_FIRMWARE
- ENDPOINT_F_INTERRUPT
- ENDPOINT_F_INTERRUPT_ENABLE
- ENDPOINT_HALT
- ENDPOINT_INT
- ENDPOINT_ISOC_DATA
- ENDPOINT_MASK_HIGH
- ENDPOINT_MASK_HIGH_OFF
- ENDPOINT_MASK_LOW
- ENDPOINT_MASK_LOW_OFF
- ENDPOINT_MAX
- ENDPOINT_NUMBER
- ENDPOINT_PLAYBACK
- ENDPOINT_SELECT
- ENDPOINT_SET_CLEAR_HALT
- ENDPOINT_TOGGLE
- ENDPOINT_TYPE
- ENDPOINT_UNUSED
- ENDPROC
- ENDPROC_CFI
- ENDPTCTRL_RXE
- ENDPTCTRL_RXR
- ENDPTCTRL_RXS
- ENDPTCTRL_RXT
- ENDPTCTRL_TXE
- ENDPTCTRL_TXR
- ENDPTCTRL_TXS
- ENDPTCTRL_TXT
- ENDPT_MAX
- ENDP_QUEUE_MASK
- ENDP_QUEUE_SHIFT
- ENDP_QUEUE_SIZE
- END_BLOCK
- END_BTB_FLUSH_SECTION
- END_CFI
- END_CMD_RES
- END_DATA
- END_DATA_START
- END_DEFBLK_COMMENT
- END_DS
- END_EALIST
- END_EXTCONTEXT_MAGIC
- END_FIX
- END_FIXUP
- END_FR
- END_FRAME_LOST
- END_FS
- END_FTR_SECTION
- END_FTR_SECTION_IFCLR
- END_FTR_SECTION_IFSET
- END_FTR_SECTION_NESTED
- END_FTR_SECTION_NESTED_IFSET
- END_FW_FTR_SECTION
- END_FW_FTR_SECTION_IFCLR
- END_FW_FTR_SECTION_IFSET
- END_FW_FTR_SECTION_NESTED
- END_MEM
- END_MMU_FTR_SECTION
- END_MMU_FTR_SECTION_IFCLR
- END_MMU_FTR_SECTION_IFSET
- END_MMU_FTR_SECTION_NESTED
- END_MMU_FTR_SECTION_NESTED_IFSET
- END_OF_AES_KEYS
- END_OF_BLOCK
- END_OF_BUFFER_EVENTS_PENDING
- END_OF_CHAIN
- END_OF_CLK_NAME
- END_OF_KEYS
- END_OF_PARENTS
- END_OF_PIPE_IB_END
- END_OF_PIPE_INCR_DE
- END_OF_REG_DATA_BLOCK
- END_OF_REG_INDEX_BLOCK
- END_OF_RESET_WAIT_TIME
- END_OF_SCRIPT
- END_OF_SEQ
- END_OF_SEQUENCE
- END_OF_SPACE_NR
- END_OF_TABLE
- END_OF_TASK_LIST
- END_OF_TOPOLOGY_NODE
- END_PRIMARY_CLK
- END_PRIMARY_CLK_F7
- END_SIG
- END_SIGN
- END_SWAP_BYTE
- END_SWAP_DMA
- END_SWAP_WORD
- END_SWR
- END_TRANS
- END_USE
- END_WMIFLAG
- ENEB_IRQ
- ENEB_IRQ_STATUS
- ENEB_IRQ_STATUS_IR
- ENEB_IRQ_UNK1
- ENEC_ISA_IO_B
- ENEC_ISA_IO_W
- ENEC_ISA_MEM_B
- ENEC_ISA_MEM_W
- ENERGY
- ENERGY_COUNTER
- ENERGY_PERF
- ENERGY_PERF_BIAS_BALANCE_PERFORMANCE
- ENERGY_PERF_BIAS_BALANCE_POWERSAVE
- ENERGY_PERF_BIAS_NORMAL
- ENERGY_PERF_BIAS_PERFORMANCE
- ENERGY_PERF_BIAS_POWERSAVE
- ENERGY_STATUS_MASK
- ENERGY_UNIT
- ENERGY_UNIT_MASK
- ENERGY_UNIT_OFFSET
- ENERGY_UNIT_SCALE
- ENERGY_UTIL
- ENET
- ENET0_COL
- ENET0_CRS
- ENET0_MDC
- ENET0_MDIO
- ENET0_RXD0
- ENET0_RXD1
- ENET0_RXD2
- ENET0_RXD3
- ENET0_RX_CLK
- ENET0_RX_EN
- ENET0_TXD0
- ENET0_TXD1
- ENET0_TXD2
- ENET0_TXD3
- ENET0_TX_CLK
- ENET0_TX_EN
- ENETBUFS_BASE
- ENETBUFS_SIZE
- ENETC_BAR_REGS
- ENETC_BDR
- ENETC_BDR_DEFAULT_SIZE
- ENETC_BDR_INT_BASE_IDX
- ENETC_BDR_OFF
- ENETC_CBD
- ENETC_CBDR_DEFAULT_SIZE
- ENETC_CBDR_TIMEOUT
- ENETC_CBD_FLAGS_SF
- ENETC_CBD_STATUS_MASK
- ENETC_DEFAULT_MSG_SIZE
- ENETC_DEFAULT_TX_WORK
- ENETC_DEV_ID_PF
- ENETC_DEV_ID_PTP
- ENETC_DEV_ID_VF
- ENETC_DRV_NAME_STR
- ENETC_DRV_VER_MAJ
- ENETC_DRV_VER_MIN
- ENETC_DRV_VER_STR
- ENETC_ERR_TXCSUM
- ENETC_ERR_UCMCSWP
- ENETC_ERR_VLAN_ISOL
- ENETC_F_RX_TSTAMP
- ENETC_F_TX_TSTAMP
- ENETC_GLOBAL_BASE
- ENETC_G_EIPBRR0
- ENETC_G_EIPBRR1
- ENETC_G_EPFBLPR
- ENETC_G_EPFBLPR1_XGMII
- ENETC_INT_NAME_MAX
- ENETC_MAC_ADDR_FILT_CNT
- ENETC_MAC_MAXFRM_SIZE
- ENETC_MADDR_HASH_TBL_SZ
- ENETC_MAX_BDR_INT
- ENETC_MAX_MTU
- ENETC_MAX_NUM_MAC_FLT
- ENETC_MAX_NUM_TXQS
- ENETC_MAX_NUM_VFS
- ENETC_MAX_RFS_SIZE
- ENETC_MAX_SKB_FRAGS
- ENETC_MDC_DIV
- ENETC_MDIO_ADDR
- ENETC_MDIO_BUS_NAME
- ENETC_MDIO_CFG
- ENETC_MDIO_CTL
- ENETC_MDIO_DATA
- ENETC_MDIO_DEV_ID
- ENETC_MDIO_DEV_NAME
- ENETC_MDIO_DRV_NAME
- ENETC_MDIO_REG_OFFSET
- ENETC_MFDMF
- ENETC_MMCSR
- ENETC_MMCSR_ME
- ENETC_MSG_CMD_MNG_ADD
- ENETC_MSG_CMD_MNG_MAC
- ENETC_MSG_CMD_MNG_REMOVE
- ENETC_MSG_CMD_MNG_RX_MAC_FILTER
- ENETC_MSG_CMD_MNG_RX_VLAN_FILTER
- ENETC_MSG_CMD_STATUS_FAIL
- ENETC_MSG_CMD_STATUS_OK
- ENETC_PBFDSIR
- ENETC_PBFDVFR
- ENETC_PCAPR0
- ENETC_PCAPR0_RXBDR
- ENETC_PCAPR0_TXBDR
- ENETC_PCAPR1
- ENETC_PFDMSAPR
- ENETC_PFPMR
- ENETC_PFPMR_MWLM
- ENETC_PFPMR_PMACE
- ENETC_PF_NUM_RINGS
- ENETC_PICDR
- ENETC_PM0_CMD_CFG
- ENETC_PM0_CMD_PHY_TX_EN
- ENETC_PM0_CMD_SFD
- ENETC_PM0_CMD_TXP
- ENETC_PM0_CMD_XGLP
- ENETC_PM0_IFM_RGAUTO
- ENETC_PM0_IFM_RLP
- ENETC_PM0_IFM_XGMII
- ENETC_PM0_IF_MODE
- ENETC_PM0_MAXFRM
- ENETC_PM0_PROMISC
- ENETC_PM0_R1023
- ENETC_PM0_R127
- ENETC_PM0_R1518
- ENETC_PM0_R1519X
- ENETC_PM0_R255
- ENETC_PM0_R511
- ENETC_PM0_R64
- ENETC_PM0_RALN
- ENETC_PM0_RBCA
- ENETC_PM0_RCNP
- ENETC_PM0_RDRNTP
- ENETC_PM0_RDRP
- ENETC_PM0_REOCT
- ENETC_PM0_RERR
- ENETC_PM0_RFCS
- ENETC_PM0_RFRG
- ENETC_PM0_RFRM
- ENETC_PM0_RJBR
- ENETC_PM0_RMCA
- ENETC_PM0_ROVR
- ENETC_PM0_RPKT
- ENETC_PM0_RUCA
- ENETC_PM0_RUND
- ENETC_PM0_RVLAN
- ENETC_PM0_RXPF
- ENETC_PM0_RX_EN
- ENETC_PM0_T1023
- ENETC_PM0_T127
- ENETC_PM0_T1518
- ENETC_PM0_TBCA
- ENETC_PM0_TCNP
- ENETC_PM0_TCRSE
- ENETC_PM0_TDFR
- ENETC_PM0_TECOL
- ENETC_PM0_TEOCT
- ENETC_PM0_TERR
- ENETC_PM0_TFCS
- ENETC_PM0_TFRM
- ENETC_PM0_TLCOL
- ENETC_PM0_TMCA
- ENETC_PM0_TMCOL
- ENETC_PM0_TOCT
- ENETC_PM0_TPKT
- ENETC_PM0_TSCOL
- ENETC_PM0_TUCA
- ENETC_PM0_TUND
- ENETC_PM0_TVLAN
- ENETC_PM0_TXPF
- ENETC_PM0_TX_EN
- ENETC_PM1_CMD_CFG
- ENETC_PMFDVFR
- ENETC_PMO_IFM_RG
- ENETC_PMR
- ENETC_PMR_EN
- ENETC_PORT_BASE
- ENETC_PRFSCAPR
- ENETC_PRFSCAPR_GET_NUM_RFS
- ENETC_PRFSMR
- ENETC_PRFSMR_RFSE
- ENETC_PRSSK
- ENETC_PSICFGR0
- ENETC_PSICFGR0_ASE
- ENETC_PSICFGR0_SET_RXBDR
- ENETC_PSICFGR0_SET_TXBDR
- ENETC_PSICFGR0_SIVC
- ENETC_PSICFGR0_SIVIE
- ENETC_PSICFGR0_VTE
- ENETC_PSIIDR
- ENETC_PSIIER
- ENETC_PSIIER_MR_MASK
- ENETC_PSIMMHFR0
- ENETC_PSIMMHFR1
- ENETC_PSIMSGRR
- ENETC_PSIMSGRR_MR
- ENETC_PSIMSGRR_MR_MASK
- ENETC_PSIPMAR0
- ENETC_PSIPMAR1
- ENETC_PSIPMR
- ENETC_PSIPMR_SET_MP
- ENETC_PSIPMR_SET_UP
- ENETC_PSIPVMR
- ENETC_PSIPVMR_SET_VP
- ENETC_PSIPVMR_SET_VUTA
- ENETC_PSIRFSCFGR
- ENETC_PSIUMHFR0
- ENETC_PSIUMHFR1
- ENETC_PSIVHFR0
- ENETC_PSIVHFR1
- ENETC_PSIVLANFMR
- ENETC_PSIVLANFMR_VS
- ENETC_PSIVLANR
- ENETC_PSIVLAN_EN
- ENETC_PSIVLAN_SET_QOS
- ENETC_PSIVMSGRCVAR0
- ENETC_PSIVMSGRCVAR1
- ENETC_PSR
- ENETC_PTCCBSR0
- ENETC_PTCCBSR1
- ENETC_PTCMSDUR
- ENETC_PTXMBAR
- ENETC_PUFDVFR
- ENETC_PVCLCTR
- ENETC_PVCLCTR_OVTPIDL
- ENETC_RBBAR0
- ENETC_RBBAR1
- ENETC_RBBSR
- ENETC_RBCIR
- ENETC_RBDCR
- ENETC_RBICIR0
- ENETC_RBICIR0_ICEN
- ENETC_RBIDR
- ENETC_RBIER
- ENETC_RBIER_RXTIE
- ENETC_RBLENR
- ENETC_RBMR
- ENETC_RBMR_BDS
- ENETC_RBMR_EN
- ENETC_RBMR_VTE
- ENETC_RBPIR
- ENETC_RBSR
- ENETC_REV1
- ENETC_RFSE_EN
- ENETC_RFSE_MODE_BD
- ENETC_RSSHASH_KEY_SIZE
- ENETC_RSSHASH_L3
- ENETC_RSSHASH_L4
- ENETC_RTBLENR_LEN
- ENETC_RXBD
- ENETC_RXBD_BUNDLE
- ENETC_RXBD_ERR_MASK
- ENETC_RXBD_FLAG_TSTMP
- ENETC_RXBD_FLAG_VLAN
- ENETC_RXBD_LSTATUS
- ENETC_RXBD_LSTATUS_F
- ENETC_RXBD_LSTATUS_R
- ENETC_RXB_DMA_SIZE
- ENETC_RXB_PAD
- ENETC_RXB_TRUESIZE
- ENETC_RX_MAXFRM_SIZE
- ENETC_SET_MAXFRM
- ENETC_SET_TX_MTU
- ENETC_SICAPR0
- ENETC_SICAPR1
- ENETC_SICAR0
- ENETC_SICAR1
- ENETC_SICAR2
- ENETC_SICAR_MSI
- ENETC_SICAR_RD_COHERENT
- ENETC_SICAR_WR_COHERENT
- ENETC_SICBDRBAR0
- ENETC_SICBDRBAR1
- ENETC_SICBDRCIR
- ENETC_SICBDRLENR
- ENETC_SICBDRMR
- ENETC_SICBDRPIR
- ENETC_SICBDRSR
- ENETC_SICTR0
- ENETC_SICTR1
- ENETC_SIMR
- ENETC_SIMR_EN
- ENETC_SIMR_RSSE
- ENETC_SIMSGSR_GET_MC
- ENETC_SIMSGSR_SET_MC
- ENETC_SIMSIRRV
- ENETC_SIMSITRV
- ENETC_SIMSIVR
- ENETC_SIPCAPR0
- ENETC_SIPCAPR0_RSS
- ENETC_SIPCAPR1
- ENETC_SIPMAR0
- ENETC_SIPMAR1
- ENETC_SIRBGCR
- ENETC_SIRFRM
- ENETC_SIRFSCAPR
- ENETC_SIRFSCAPR_GET_NUM_RFS
- ENETC_SIRMCA
- ENETC_SIROCT
- ENETC_SIRSSCAPR
- ENETC_SIRSSCAPR_GET_NUM_RSS
- ENETC_SIRUCA
- ENETC_SIRXIDR
- ENETC_SITFRM
- ENETC_SITGTGR
- ENETC_SITMCA
- ENETC_SITOCT
- ENETC_SITUCA
- ENETC_SITXIDR
- ENETC_SIUEFDCR
- ENETC_SI_ALIGN
- ENETC_SI_INT_IDX
- ENETC_TBBAR0
- ENETC_TBBAR1
- ENETC_TBCIR
- ENETC_TBCIR_IDX_MASK
- ENETC_TBICIR0
- ENETC_TBICIR0_ICEN
- ENETC_TBIDR
- ENETC_TBIER
- ENETC_TBIER_TXTIE
- ENETC_TBLENR
- ENETC_TBMR
- ENETC_TBMR_EN
- ENETC_TBMR_PRIO_MASK
- ENETC_TBMR_SET_PRIO
- ENETC_TBMR_VIH
- ENETC_TBPIR
- ENETC_TBSR
- ENETC_TBSR_BUSY
- ENETC_TXBD
- ENETC_TXBDS_MAX_NEEDED
- ENETC_TXBDS_NEEDED
- ENETC_TXBD_E_FLAGS_TWO_STEP_PTP
- ENETC_TXBD_E_FLAGS_VLAN_INS
- ENETC_TXBD_FLAGS_CSUM
- ENETC_TXBD_FLAGS_EX
- ENETC_TXBD_FLAGS_F
- ENETC_TXBD_FLAGS_L4CS
- ENETC_TXBD_FLAGS_W
- ENETC_TXBD_L3_IPCS
- ENETC_TXBD_L3_IPV6
- ENETC_TXBD_L3_SET_HSIZE
- ENETC_TXBD_L3_START_MASK
- ENETC_TXBD_L4_TCP
- ENETC_TXBD_L4_UDP
- ENETC_UFDMF
- ENETC_VF_FLAG_PF_SET_MAC
- ENETC_VLAN_HT_SIZE
- ENETC_VLAN_PROMISC_MAP_ALL
- ENETC_VLAN_TYPE_C
- ENETC_VLAN_TYPE_S
- ENETC_VSIMSGSNDAR0
- ENETC_VSIMSGSNDAR1
- ENETC_VSIMSGSR
- ENETC_VSIMSGSR_MB
- ENETC_VSIMSGSR_MS
- ENETDMAC_BUFALLOC
- ENETDMAC_CHANCFG
- ENETDMAC_CHANCFG_BUFHALT_MASK
- ENETDMAC_CHANCFG_BUFHALT_SHIFT
- ENETDMAC_CHANCFG_CHAINING_MASK
- ENETDMAC_CHANCFG_CHAINING_SHIFT
- ENETDMAC_CHANCFG_EN_MASK
- ENETDMAC_CHANCFG_EN_SHIFT
- ENETDMAC_CHANCFG_FLOWC_EN_MASK
- ENETDMAC_CHANCFG_FLOWC_EN_SHIFT
- ENETDMAC_CHANCFG_PKTHALT_MASK
- ENETDMAC_CHANCFG_PKTHALT_SHIFT
- ENETDMAC_CHANCFG_REG
- ENETDMAC_CHANCFG_WRAP_EN_MASK
- ENETDMAC_CHANCFG_WRAP_EN_SHIFT
- ENETDMAC_FC
- ENETDMAC_IR
- ENETDMAC_IRMASK
- ENETDMAC_IRMASK_REG
- ENETDMAC_IR_BUFDONE_MASK
- ENETDMAC_IR_NOTOWNER_MASK
- ENETDMAC_IR_PKTDONE_MASK
- ENETDMAC_IR_REG
- ENETDMAC_LEN
- ENETDMAC_MAXBURST
- ENETDMAC_MAXBURST_REG
- ENETDMAC_RSTART
- ENETDMAS_RSTART_REG
- ENETDMAS_SRAM2_REG
- ENETDMAS_SRAM3_REG
- ENETDMAS_SRAM4_REG
- ENETDMA_6345_BUFALLOC_REG
- ENETDMA_6345_CHANCFG_REG
- ENETDMA_6345_CHAN_WIDTH
- ENETDMA_6345_DESC_SHIFT
- ENETDMA_6345_FC_REG
- ENETDMA_6345_IRMASK_REG
- ENETDMA_6345_IR_REG
- ENETDMA_6345_LEN_REG
- ENETDMA_6345_MAXBURST_REG
- ENETDMA_6345_RSTART_REG
- ENETDMA_BUFALLOC_FORCE_MASK
- ENETDMA_BUFALLOC_FORCE_SHIFT
- ENETDMA_BUFALLOC_REG
- ENETDMA_CFG_EN_MASK
- ENETDMA_CFG_EN_SHIFT
- ENETDMA_CFG_FLOWCH_MASK
- ENETDMA_CFG_REG
- ENETDMA_CHANCFG_EN_MASK
- ENETDMA_CHANCFG_EN_SHIFT
- ENETDMA_CHANCFG_PKTHALT_MASK
- ENETDMA_CHANCFG_PKTHALT_SHIFT
- ENETDMA_CHANCFG_REG
- ENETDMA_CHAN_WIDTH
- ENETDMA_FLOWCH_REG
- ENETDMA_FLOWCL_REG
- ENETDMA_GLB_IRQMASK_REG
- ENETDMA_GLB_IRQSTAT_REG
- ENETDMA_IRMASK_REG
- ENETDMA_IR_BUFDONE_MASK
- ENETDMA_IR_NOTOWNER_MASK
- ENETDMA_IR_PKTDONE_MASK
- ENETDMA_IR_REG
- ENETDMA_MAXBURST_REG
- ENETDMA_RSTART_REG
- ENETDMA_SRAM2_REG
- ENETDMA_SRAM3_REG
- ENETDMA_SRAM4_REG
- ENETDOWN
- ENETRESET
- ENETSW_GMCR_REG
- ENETSW_GMCR_RST_MIB_MASK
- ENETSW_IMPOV_1000_MASK
- ENETSW_IMPOV_100_MASK
- ENETSW_IMPOV_FDX_MASK
- ENETSW_IMPOV_FORCE_MASK
- ENETSW_IMPOV_LINKUP_MASK
- ENETSW_IMPOV_REG
- ENETSW_IMPOV_RXFLOW_MASK
- ENETSW_IMPOV_TXFLOW_MASK
- ENETSW_JMBCTL_MAXSIZE_REG
- ENETSW_JMBCTL_PORT_REG
- ENETSW_MAX_PORT
- ENETSW_MDIOC_EXT_MASK
- ENETSW_MDIOC_PHYID_SHIFT
- ENETSW_MDIOC_RD_MASK
- ENETSW_MDIOC_REG
- ENETSW_MDIOC_REG_SHIFT
- ENETSW_MDIOC_WR_MASK
- ENETSW_MDIOD_REG
- ENETSW_MIB_REG
- ENETSW_MIB_REG_COUNT
- ENETSW_PORTOV_1000_MASK
- ENETSW_PORTOV_100_MASK
- ENETSW_PORTOV_ENABLE_MASK
- ENETSW_PORTOV_FDX_MASK
- ENETSW_PORTOV_LINKUP_MASK
- ENETSW_PORTOV_REG
- ENETSW_PORTOV_RXFLOW_MASK
- ENETSW_PORTOV_TXFLOW_MASK
- ENETSW_PORTS_6328
- ENETSW_PORTS_6368
- ENETSW_PTCTRL_REG
- ENETSW_PTCTRL_RXDIS_MASK
- ENETSW_PTCTRL_TXDIS_MASK
- ENETSW_RGMII_PORT0
- ENETSW_SWMODE_FWD_EN_MASK
- ENETSW_SWMODE_REG
- ENETTXD_FALLING
- ENETTXD_KEY
- ENETTXD_RISING
- ENETUNREACH
- ENET_ADDR_CONT_ENTRY
- ENET_ADDR_TO_UINT64
- ENET_ADDR_TYPE_BROADCAST
- ENET_ADDR_TYPE_GROUP
- ENET_ADDR_TYPE_INDIVIDUAL
- ENET_BLOCK_MEM_RDY_ADDR
- ENET_BRCM_TAG_LEN
- ENET_CFGSSQMIFPQASSOC_ADDR
- ENET_CFGSSQMIFPRESET_ADDR
- ENET_CFGSSQMIQMLITEFPQASSOC_ADDR
- ENET_CFGSSQMIQMLITEWQASSOC_ADDR
- ENET_CFGSSQMIWQASSOC_ADDR
- ENET_CFGSSQMIWQRESET_ADDR
- ENET_CFG_MEM_RAM_SHUTDOWN_ADDR
- ENET_CLK
- ENET_CLKEN
- ENET_CTL_DISABLE_MASK
- ENET_CTL_DISABLE_SHIFT
- ENET_CTL_ENABLE_MASK
- ENET_CTL_ENABLE_SHIFT
- ENET_CTL_EPHYSEL_MASK
- ENET_CTL_EPHYSEL_SHIFT
- ENET_CTL_REG
- ENET_CTL_SRESET_MASK
- ENET_CTL_SRESET_SHIFT
- ENET_CTRL_DISABLE
- ENET_CTRL_ENABLE
- ENET_CTRL_EPSEL
- ENET_CTRL_SRST
- ENET_E_CHLD_STOPPED
- ENET_E_FAIL
- ENET_E_FWRESP_PAUSE
- ENET_E_MTU_CFG
- ENET_E_PAUSE_CFG
- ENET_E_START
- ENET_E_STOP
- ENET_FCS_LENGTH
- ENET_GHD_MODE
- ENET_GROUP_ADDR
- ENET_HEADER_SIZE
- ENET_INIT_PARAM_MAGIC_RES_INIT1
- ENET_INIT_PARAM_MAGIC_RES_INIT2
- ENET_INIT_PARAM_MAGIC_RES_INIT3
- ENET_INIT_PARAM_MAGIC_RES_INIT4
- ENET_INIT_PARAM_MAGIC_RES_INIT5
- ENET_INIT_PARAM_MAX_ENTRIES_RX
- ENET_INIT_PARAM_MAX_ENTRIES_TX
- ENET_INIT_PARAM_PTR_MASK
- ENET_INIT_PARAM_RGF_SHIFT
- ENET_INIT_PARAM_RISC_MASK
- ENET_INIT_PARAM_SNUM_MASK
- ENET_INIT_PARAM_SNUM_SHIFT
- ENET_INIT_PARAM_TGF_SHIFT
- ENET_INTERFACE_MODE2_SET
- ENET_IRMASK_REG
- ENET_IR_FLOWC
- ENET_IR_MIB
- ENET_IR_MII
- ENET_IR_REG
- ENET_KEY
- ENET_LHD_MODE
- ENET_MAXF_SIZE
- ENET_MAX_MTU_SIZE
- ENET_MIBCTL_RDCLEAR_MASK
- ENET_MIBCTL_RDCLEAR_SHIFT
- ENET_MIBCTL_REG
- ENET_MIB_REG
- ENET_MIB_REG_COUNT
- ENET_MII
- ENET_MIIDATA_DATA_MASK
- ENET_MIIDATA_DATA_SHIFT
- ENET_MIIDATA_OP_READ_MASK
- ENET_MIIDATA_OP_WRITE_MASK
- ENET_MIIDATA_PHYID_MASK
- ENET_MIIDATA_PHYID_SHIFT
- ENET_MIIDATA_REG
- ENET_MIIDATA_REG_MASK
- ENET_MIIDATA_REG_SHIFT
- ENET_MIIDATA_TA_MASK
- ENET_MIIDATA_TA_SHIFT
- ENET_MIISC_MDCFREQDIV_MASK
- ENET_MIISC_MDCFREQDIV_SHIFT
- ENET_MIISC_PREAMBLEEN_MASK
- ENET_MIISC_PREAMBLEEN_SHIFT
- ENET_MIISC_REG
- ENET_PACKET_SIZE
- ENET_PAD
- ENET_PMH_DATAVALID_MASK
- ENET_PMH_DATAVALID_SHIFT
- ENET_PMH_REG
- ENET_PML_REG
- ENET_RGMII_CFG_REG
- ENET_RMII
- ENET_RXCFG_ALLMCAST_MASK
- ENET_RXCFG_ALLMCAST_SHIFT
- ENET_RXCFG_ENFLOW_MASK
- ENET_RXCFG_ENFLOW_SHIFT
- ENET_RXCFG_LOOPBACK_MASK
- ENET_RXCFG_LOOPBACK_SHIFT
- ENET_RXCFG_PROMISC_MASK
- ENET_RXCFG_PROMISC_SHIFT
- ENET_RXCFG_REG
- ENET_RXMAXLEN_MASK
- ENET_RXMAXLEN_REG
- ENET_RXMAXLEN_SHIFT
- ENET_RX_ALIGN
- ENET_RX_DESC
- ENET_RX_FRSIZE
- ENET_SERDES_0_CTRL_CFG
- ENET_SERDES_0_PLL_CFG
- ENET_SERDES_0_TEST_CFG
- ENET_SERDES_1_CTRL_CFG
- ENET_SERDES_1_PLL_CFG
- ENET_SERDES_1_TEST_CFG
- ENET_SERDES_BE_LOOPBACK
- ENET_SERDES_CFG
- ENET_SERDES_CFG_FORCE_RDY
- ENET_SERDES_CTRL_EMPH_0
- ENET_SERDES_CTRL_EMPH_0_SHIFT
- ENET_SERDES_CTRL_EMPH_1
- ENET_SERDES_CTRL_EMPH_1_SHIFT
- ENET_SERDES_CTRL_EMPH_2
- ENET_SERDES_CTRL_EMPH_2_SHIFT
- ENET_SERDES_CTRL_EMPH_3
- ENET_SERDES_CTRL_EMPH_3_SHIFT
- ENET_SERDES_CTRL_LADJ_0
- ENET_SERDES_CTRL_LADJ_0_SHIFT
- ENET_SERDES_CTRL_LADJ_1
- ENET_SERDES_CTRL_LADJ_1_SHIFT
- ENET_SERDES_CTRL_LADJ_2
- ENET_SERDES_CTRL_LADJ_2_SHIFT
- ENET_SERDES_CTRL_LADJ_3
- ENET_SERDES_CTRL_LADJ_3_SHIFT
- ENET_SERDES_CTRL_RXITERM_0
- ENET_SERDES_CTRL_RXITERM_1
- ENET_SERDES_CTRL_RXITERM_2
- ENET_SERDES_CTRL_RXITERM_3
- ENET_SERDES_CTRL_SDET_0
- ENET_SERDES_CTRL_SDET_1
- ENET_SERDES_CTRL_SDET_2
- ENET_SERDES_CTRL_SDET_3
- ENET_SERDES_PLL_FBDIV0
- ENET_SERDES_PLL_FBDIV1
- ENET_SERDES_PLL_FBDIV2
- ENET_SERDES_PLL_HRATE0
- ENET_SERDES_PLL_HRATE1
- ENET_SERDES_PLL_HRATE2
- ENET_SERDES_PLL_HRATE3
- ENET_SERDES_RESET
- ENET_SERDES_RESET_0
- ENET_SERDES_RESET_1
- ENET_SERDES_TEST_MD_0
- ENET_SERDES_TEST_MD_0_SHIFT
- ENET_SERDES_TEST_MD_1
- ENET_SERDES_TEST_MD_1_SHIFT
- ENET_SERDES_TEST_MD_2
- ENET_SERDES_TEST_MD_2_SHIFT
- ENET_SERDES_TEST_MD_3
- ENET_SERDES_TEST_MD_3_SHIFT
- ENET_SHIM
- ENET_SPARE_CFG_REG_ADDR
- ENET_SRST
- ENET_TBI_MII_ANA
- ENET_TBI_MII_ANEX
- ENET_TBI_MII_ANLPANP
- ENET_TBI_MII_ANLPBPA
- ENET_TBI_MII_ANNPT
- ENET_TBI_MII_CR
- ENET_TBI_MII_EXST
- ENET_TBI_MII_JD
- ENET_TBI_MII_SR
- ENET_TBI_MII_TBICON
- ENET_TEST_MD_EWRAP
- ENET_TEST_MD_NO_LOOPBACK
- ENET_TEST_MD_PAD_LOOPBACK
- ENET_TEST_MD_REV_LOOPBACK
- ENET_TXCTL_FD_MASK
- ENET_TXCTL_FD_SHIFT
- ENET_TXCTL_REG
- ENET_TXMAXLEN_MASK
- ENET_TXMAXLEN_REG
- ENET_TXMAXLEN_SHIFT
- ENET_TXWMARK_REG
- ENET_TXWMARK_WM_MASK
- ENET_TXWMARK_WM_SHIFT
- ENET_TX_DESC
- ENET_VLAN_TBL
- ENET_VLAN_TBL_NUM_ENTRIES
- ENET_VLAN_TBL_PARITY0
- ENET_VLAN_TBL_PARITY1
- ENET_VLAN_TBL_SHIFT
- ENET_VLAN_TBL_VLANRDCTBLN
- ENET_VLAN_TBL_VPR
- ENEXREAD
- ENE_ADDR_HI
- ENE_ADDR_LO
- ENE_BIN_CODE_LEN
- ENE_CIRBIT
- ENE_CIRCAR_HPRD
- ENE_CIRCAR_PRD
- ENE_CIRCAR_PRD_VALID
- ENE_CIRCAR_PULS
- ENE_CIRCFG
- ENE_CIRCFG2
- ENE_CIRCFG2_CARR_DETECT
- ENE_CIRCFG2_FAST_SAMPL1
- ENE_CIRCFG2_FAST_SAMPL2
- ENE_CIRCFG2_GPIO0A
- ENE_CIRCFG2_NEC
- ENE_CIRCFG2_RC5
- ENE_CIRCFG2_RC6
- ENE_CIRCFG2_RLC
- ENE_CIRCFG_CARR_DEMOD
- ENE_CIRCFG_REV_POL
- ENE_CIRCFG_RX_EN
- ENE_CIRCFG_RX_IRQ
- ENE_CIRCFG_TX_CARR
- ENE_CIRCFG_TX_EN
- ENE_CIRCFG_TX_IRQ
- ENE_CIRCFG_TX_POL_REV
- ENE_CIRDAT_IN
- ENE_CIRHIGH
- ENE_CIRMOD_HPRD
- ENE_CIRMOD_PRD
- ENE_CIRMOD_PRD_MAX
- ENE_CIRMOD_PRD_MIN
- ENE_CIRMOD_PRD_POL
- ENE_CIRPF
- ENE_CIRRLC_CFG
- ENE_CIRRLC_CFG_OVERFLOW
- ENE_CIRRLC_OUT0
- ENE_CIRRLC_OUT1
- ENE_CIRRLC_OUT_MASK
- ENE_CIRRLC_OUT_PULSE
- ENE_CIRSTART
- ENE_CIRSTART2
- ENE_DEFAULT_PLL_FREQ
- ENE_DEFAULT_SAMPLE_PERIOD
- ENE_DRIVER_NAME
- ENE_ECHV
- ENE_ECSTS
- ENE_ECSTS_RSRVD
- ENE_ECVER_MAJOR
- ENE_ECVER_MINOR
- ENE_FAN_AS_IN1
- ENE_FAN_AS_IN1_EN
- ENE_FAN_AS_IN2
- ENE_FAN_AS_IN2_EN
- ENE_FW1
- ENE_FW1_ENABLE
- ENE_FW1_EXTRA_BUF_HND
- ENE_FW1_HAS_EXTRA_BUF
- ENE_FW1_IRQ
- ENE_FW1_LED_ON
- ENE_FW1_TXIRQ
- ENE_FW1_WAKE
- ENE_FW1_WPATTERN
- ENE_FW2
- ENE_FW2_BUF_WPTR
- ENE_FW2_EMMITER1_CONN
- ENE_FW2_EMMITER2_CONN
- ENE_FW2_FAN_INPUT
- ENE_FW2_GP0A
- ENE_FW2_LEARNING
- ENE_FW2_RXIRQ
- ENE_FW_PACKET_SIZE
- ENE_FW_RX_POINTER
- ENE_FW_SAMPLE_BUFFER
- ENE_FW_SAMPLE_PERIOD_FAN
- ENE_FW_SAMPLE_SPACE
- ENE_FW_SMPL_BUF_FAN
- ENE_FW_SMPL_BUF_FAN_MSK
- ENE_FW_SMPL_BUF_FAN_PLS
- ENE_GPIOFS1
- ENE_GPIOFS1_GPIO0D
- ENE_GPIOFS8
- ENE_GPIOFS8_GPIO41
- ENE_HW_B
- ENE_HW_C
- ENE_HW_D
- ENE_HW_VER_OLD
- ENE_IO
- ENE_IO_SIZE
- ENE_IRQ
- ENE_IRQ_MASK
- ENE_IRQ_RX
- ENE_IRQ_STATUS
- ENE_IRQ_TX
- ENE_IRQ_UNK_EN
- ENE_PLLFRH
- ENE_PLLFRL
- ENE_STATUS
- ENE_TEST_C9
- ENE_TEST_C9_PFENABLE
- ENE_TEST_C9_PFENABLE_F0
- ENE_TEST_C9_PFENABLE_F1
- ENE_TEST_C9_TLTENABLE
- ENE_TEST_C9_WPDISALBLE
- ENE_TEST_C9_WPDISALBLE_F0
- ENE_TEST_C9_WPDISALBLE_F1
- ENFAIRMST
- ENFILE
- ENFL_MASK
- ENFORCE_BUFEND
- ENFORCE_FIELDS
- ENFORCE_RESOURCES_LAX
- ENFORCE_RESOURCES_NO
- ENFORCE_RESOURCES_STRICT
- ENGG_CSB_DELAY_BIN00
- ENGG_CSB_DELAY_BIN01
- ENGG_CSB_DELAY_BIN02
- ENGG_CSB_DELAY_BIN03
- ENGG_CSB_DELAY_BIN04
- ENGG_CSB_DELAY_BIN05
- ENGG_CSB_DELAY_BIN06
- ENGG_CSB_DELAY_BIN07
- ENGG_CSB_DELAY_BIN08
- ENGG_CSB_DELAY_BIN09
- ENGG_CSB_DELAY_BIN10
- ENGG_CSB_DELAY_BIN11
- ENGG_CSB_DELAY_BIN12
- ENGG_CSB_DELAY_BIN13
- ENGG_CSB_DELAY_BIN14
- ENGG_CSB_DELAY_BIN15
- ENGG_CSB_GE_INPUT_FIFO_FULL
- ENGG_CSB_GE_SENDING_SUBGROUP
- ENGG_CSB_MACHINE_IS_STARVED
- ENGG_CSB_MACHINE_STALLED_BY_CSB_MEMORY
- ENGG_CSB_MACHINE_STALLED_BY_SPI
- ENGG_CSB_OBJECTID_INPUT_FIFO_FULL
- ENGG_CSB_PRIM_COUNT_EQ0
- ENGG_CSB_SPI_DELAY_BIN00
- ENGG_CSB_SPI_DELAY_BIN01
- ENGG_CSB_SPI_DELAY_BIN02
- ENGG_CSB_SPI_DELAY_BIN03
- ENGG_CSB_SPI_DELAY_BIN04
- ENGG_CSB_SPI_DELAY_BIN05
- ENGG_CSB_SPI_DELAY_BIN06
- ENGG_CSB_SPI_DELAY_BIN07
- ENGG_CSB_SPI_DELAY_BIN08
- ENGG_CSB_SPI_DELAY_BIN09
- ENGG_CSB_SPI_DELAY_BIN10
- ENGG_CSB_SPI_DELAY_BIN11
- ENGG_CSB_SPI_DELAY_BIN12
- ENGG_CSB_SPI_DELAY_BIN13
- ENGG_CSB_SPI_DELAY_BIN14
- ENGG_CSB_SPI_DELAY_BIN15
- ENGG_CSB_SPI_INPUT_FIFO_FULL
- ENGG_INDEX_PRIM_IF_FETCH_TO_PRIMIC_P_FIFO_NO_WRITE
- ENGG_INDEX_PRIM_IF_FETCH_TO_PRIMIC_P_FIFO_WRITE
- ENGG_INDEX_PRIM_IF_QUALIFIED_BUSY
- ENGG_INDEX_PRIM_IF_QUALIFIED_STARVED
- ENGG_INDEX_PRIM_IF_REUSE_0_NEW_VERTS_THIS_PRIM
- ENGG_INDEX_PRIM_IF_REUSE_1_NEW_VERTS_THIS_PRIM
- ENGG_INDEX_PRIM_IF_REUSE_2_NEW_VERTS_THIS_PRIM
- ENGG_INDEX_PRIM_IF_REUSE_3_NEW_VERTS_THIS_PRIM
- ENGG_INDEX_PRIM_IF_STALLED_BY_FULL_FETCH_TO_PRIMIC_P_FIFO
- ENGG_INDEX_PRIM_IF_STALLED_BY_FULL_FETCH_TO_PRIMIC_S_FIFO
- ENGG_INDEX_PRIM_IF_STARVED_BY_NO_PRIM
- ENGG_INDEX_REQ_BUSY_AND_STALLED_BY_REQ2RTN_FIFO_FULL
- ENGG_INDEX_REQ_IDLE_AND_STALLED_BY_REQ2RTN_FIFO_FULL
- ENGG_INDEX_REQ_STALLED_BY_SX_CREDITS
- ENGG_INDEX_REQ_STARVED
- ENGG_INDEX_RET_REQ2RTN_FIFO_EMPTY
- ENGG_INDEX_RET_REQ2RTN_FIFO_FULL
- ENGG_INDEX_RET_SXRX_READING_EVENT
- ENGG_INDEX_RET_SXRX_READING_NULL_SUBGROUP
- ENGG_INDEX_RET_SXRX_READING_QDWORD_0_VALID_PRIMS_NOPL
- ENGG_INDEX_RET_SXRX_READING_QDWORD_0_VALID_PRIMS_PL
- ENGG_INDEX_RET_SXRX_READING_QDWORD_1_VALID_PRIMS_NOPL
- ENGG_INDEX_RET_SXRX_READING_QDWORD_1_VALID_PRIMS_PL
- ENGG_INDEX_RET_SXRX_READING_QDWORD_2_VALID_PRIMS
- ENGG_INDEX_RET_SXRX_READING_QDWORD_3_VALID_PRIMS
- ENGG_INDEX_RET_SXRX_READING_QDWORD_4_VALID_PRIMS
- ENGG_INDEX_RET_SXRX_READING_SUBGROUP_PRIMCOUNT_EQ0
- ENGG_INDEX_RET_SXRX_STALLED_BY_PRIM_INDICES_CSB_FIFO
- ENGG_INDEX_RET_SXRX_STALLED_BY_PRIM_INDICES_FIFO
- ENGG_INDEX_RET_SXRX_STARVED_BY_CSB
- ENGG_INDEX_RET_SXRX_STARVED_BY_PRIMS
- ENGG_INDEX_RET_SX_RECEIVE_FIFO_FULL
- ENGG_POS_REQ_STALLED_BY_FULL_CLIPV_FIFO
- ENGG_POS_REQ_STARVED
- ENGINE
- ENGINE0_MASK
- ENGINE1_MASK
- ENGINE_A
- ENGINE_ACTIVE_HEAD
- ENGINE_ACTIVE_SEQNO
- ENGINE_ACTIVE_SUBUNITS
- ENGINE_B
- ENGINE_BUSY
- ENGINE_CAP_PRESENT_MASK
- ENGINE_DEAD
- ENGINE_IDLE
- ENGINE_ID_COUNT
- ENGINE_ID_DACA
- ENGINE_ID_DACB
- ENGINE_ID_DIGA
- ENGINE_ID_DIGB
- ENGINE_ID_DIGC
- ENGINE_ID_DIGD
- ENGINE_ID_DIGE
- ENGINE_ID_DIGF
- ENGINE_ID_DIGG
- ENGINE_ID_UNKNOWN
- ENGINE_ID_VCE
- ENGINE_ID_VIRTUAL
- ENGINE_INIT
- ENGINE_INSTANCES_MASK
- ENGINE_INVERT_Y
- ENGINE_MAX_X
- ENGINE_MAX_Y
- ENGINE_MIN_X
- ENGINE_MIN_Y
- ENGINE_MOCK
- ENGINE_NAME_LEN
- ENGINE_PHYSICAL
- ENGINE_POSTING_READ
- ENGINE_POSTING_READ16
- ENGINE_READ
- ENGINE_READ16
- ENGINE_READ64
- ENGINE_READ_FW
- ENGINE_READ_IDX
- ENGINE_SAMPLE_BITS
- ENGINE_SAMPLE_MASK
- ENGINE_VIRTUAL
- ENGINE_WAIT
- ENGINE_WAIT_KICK
- ENGINE_WRITE
- ENGINE_WRITE16
- ENGINE_WRITE_FW
- ENGINE__
- ENGX1_PORTX1
- ENGX1_PORTX2
- ENGX1_PORTX4
- ENGX2_PORTX1
- ENGX2_PORTX2
- ENG_CAP_CARD_ADDR_SIZE_MASK
- ENG_CAP_DESC_MAX_BYTE_CNT_MASK
- ENG_CAP_DIRECTION
- ENG_CAP_NUMBER_MASK
- ENG_CAP_PERF_SCALE_MASK
- ENG_CAP_PRESENT
- ENG_CAP_TYPE_MASK
- ENG_CTL_DESC_ALIGN_ERR
- ENG_CTL_DESC_CHAIN_END
- ENG_CTL_DESC_COMPLETE
- ENG_CTL_DESC_FETCH_ERR
- ENG_CTL_DESC_FETCH_ERR_CLASS_MASK
- ENG_CTL_DMA_ENABLE
- ENG_CTL_DMA_RESET
- ENG_CTL_DMA_RESET_REQUEST
- ENG_CTL_DMA_RUNNING
- ENG_CTL_DMA_WAITING
- ENG_CTL_DMA_WAITING_PERSIST
- ENG_CTL_IRQ_ACTIVE
- ENG_CTL_IRQ_ENABLE
- ENG_CTL_SW_ABORT_ERR
- ENHANCED
- ENHANCED_REGULAR_PRESET
- ENHANCED_TXBD_COMPLETION
- ENHANCEMENT
- ENHANCE_HD_TABLE_ENTRIES
- ENHANCE_HD_TABLE_SIZE
- ENHDP
- ENHSTRB_MODE
- ENH_ORDER_MODE
- ENH_PS_MODES
- ENI155_MAGIC
- ENI2CFILTER
- ENIC_AIC_LARGE_PKT_DIFF
- ENIC_AIC_TS_BREAK
- ENIC_BARS_MAX
- ENIC_CLSF_EXPIRE_COUNT
- ENIC_CQ_MAX
- ENIC_DESC_MAX_SPLITS
- ENIC_DEVCMD_PROXY_BY_INDEX
- ENIC_GEN_STAT
- ENIC_INTR_MAX
- ENIC_LARGE_PKT_THRESHOLD
- ENIC_LINK_10G_INDEX
- ENIC_LINK_40G_INDEX
- ENIC_LINK_4G_INDEX
- ENIC_LINK_SPEED_10G
- ENIC_LINK_SPEED_4G
- ENIC_MAX_COALESCE_TIMERS
- ENIC_MAX_LINK_SPEEDS
- ENIC_MAX_MTU
- ENIC_MAX_RQ_DESCS
- ENIC_MAX_WQ_DESCS
- ENIC_MIN_MTU
- ENIC_MIN_RQ_DESCS
- ENIC_MIN_WQ_DESCS
- ENIC_MULTICAST_PERFECT_FILTERS
- ENIC_NON_TSO_MAX_DESC
- ENIC_NOTIFY_TIMER_PERIOD
- ENIC_POLL_STATE_IDLE
- ENIC_POLL_STATE_NAPI
- ENIC_POLL_STATE_POLL
- ENIC_PORT_REQUEST_APPLIED
- ENIC_PP_BY_INDEX
- ENIC_RFS_FLW_BITSHIFT
- ENIC_RFS_FLW_MASK
- ENIC_RQ_MAX
- ENIC_RSS_BYTES_PER_KEY
- ENIC_RSS_KEYS
- ENIC_RSS_LEN
- ENIC_RX_COALESCE_RANGE_END
- ENIC_RX_STAT
- ENIC_SETTING
- ENIC_SET_HOST
- ENIC_SET_INSTANCE
- ENIC_SET_NAME
- ENIC_SET_REQUEST
- ENIC_SRIOV_ENABLED
- ENIC_TEST_INTR
- ENIC_TX_STAT
- ENIC_UNICAST_PERFECT_FILTERS
- ENIC_VXLAN_INNER_IPV6
- ENIC_VXLAN_MULTI_WQ
- ENIC_VXLAN_OUTER_IPV6
- ENIC_WQ_MAX
- ENIC_WQ_NAPI_BUDGET
- ENISR_ALL
- ENISR_COUNTERS
- ENISR_OVER
- ENISR_RDC
- ENISR_RESET
- ENISR_RX
- ENISR_RX_ERR
- ENISR_TX
- ENISR_TX_ERR
- ENI_DEV
- ENI_MEMDUMP
- ENI_PRV_PADDR
- ENI_PRV_POS
- ENI_PRV_SIZE
- ENI_SETMULT
- ENI_VCC
- ENI_VCC_NOS
- ENI_ZEROES_SIZE
- ENJTAG
- ENMBID
- ENMII
- ENMII_MASK
- ENNDJ
- ENOANO
- ENOATTR
- ENOBUFS
- ENOCSI
- ENODATA
- ENODEV
- ENOENT
- ENOERR
- ENOEXEC
- ENOIOCTLCMD
- ENOKEY
- ENOLCK
- ENOLINK
- ENOMEDIUM
- ENOMEM
- ENOMSG
- ENONET
- ENOPARAM
- ENOPKG
- ENOPROTOOPT
- ENOSPC
- ENOSR
- ENOSTR
- ENOSYM
- ENOSYS
- ENOTBLK
- ENOTCONN
- ENOTDIR
- ENOTEMPTY
- ENOTNAM
- ENOTRECOVERABLE
- ENOTSOCK
- ENOTSUPP
- ENOTSYNC
- ENOTTY
- ENOTUNIQ
- ENOUGH
- ENPDN
- ENPDNPS
- ENPHASECHG
- ENPHASEMIS
- ENPLSIO
- ENPMAC
- ENPMJ
- ENPWRSAVE
- ENP_BIT
- ENQ
- ENQ3_GET_SOLICITED_FULL
- ENQUEUE_DEPTH
- ENQUEUE_HEAD
- ENQUEUE_KG_DFLT_NIA
- ENQUEUE_MIGRATED
- ENQUEUE_MOVE
- ENQUEUE_NOCLOCK
- ENQUEUE_REPLENISH
- ENQUEUE_RESTORE
- ENQUEUE_WAKEUP
- ENRCV
- ENREQINIT
- ENRESELI
- ENRSR_CRC
- ENRSR_DEF
- ENRSR_DIS
- ENRSR_FAE
- ENRSR_FO
- ENRSR_MPA
- ENRSR_PHY
- ENRSR_RXOK
- ENRX_IN_HALFTX
- ENSCSIPERR
- ENSCSIRST
- ENSDONE
- ENSEC
- ENSELDI
- ENSELDO
- ENSELI
- ENSELINGO
- ENSELO
- ENSELTIMO
- ENSIC
- ENSONIQ_CONTROL
- ENSPCHK
- ENSPIORDY
- ENSTFIFO
- ENSTIMER
- ENSURE
- ENSWBCN
- ENSWRAP
- ENT
- ENTER
- ENTERING_ULPS
- ENTERNOW__TJ320
- ENTER_ASPM
- ENTER_ATOMIC_MODE_SET
- ENTER_DFU_MODE
- ENTER_DRAM_SELFREFRESH_MODE
- ENTER_INTR
- ENTER_IRQ_STACK
- ENTER_PM_STATE
- ENTER_SHARED_FUNCTION
- ENTER_U0_INTR
- ENTER_U1_INTR
- ENTER_U2_INTR
- ENTER_U3_INTR
- ENTER_VMX_OPS
- ENTIRE_REPORT
- ENTIRE_REPORT_SIZE
- ENTITYIDSUFFIX_FLAGS_HARDWRITEPROTECT
- ENTITYIDSUFFIX_FLAGS_SOFTWRITEPROTECT
- ENTITYID_FLAGS_DIRTY
- ENTITYID_FLAGS_PROTECTED
- ENTITY_BIT
- ENTITY_MAC
- ENTITY_NAME
- ENTITY_PHY
- ENTITY_TEMPERATURES_1__CORE0_MASK
- ENTITY_TEMPERATURES_1__CORE0__SHIFT
- ENTITY_TEMPERATURES_1__GPU_MASK
- ENTITY_TEMPERATURES_1__GPU__SHIFT
- ENTITY_TEMPERATURES_2__CORE1_MASK
- ENTITY_TEMPERATURES_2__CORE1__SHIFT
- ENTITY_TEMPERATURES_3__GPU_MASK
- ENTITY_TEMPERATURES_3__GPU__SHIFT
- ENTREGA_FAKE_ID
- ENTREGA_VENDOR_ID
- ENTRIES
- ENTRIES_EXTENDED_MAX
- ENTRIES_IN_SUM
- ENTRIES_PER_BLOCK
- ENTRIES_PER_BYTE
- ENTRIES_PER_LINE
- ENTRIES_PER_PAGE
- ENTRIES_PER_WORD
- ENTRIES_SHIFT
- ENTROPY_BITS
- ENTROPY_LVL_ACEPTABLE
- ENTROPY_LVL_HIGH
- ENTROPY_MODE_ENCRYPT
- ENTROPY_MODE_KEY_MASK
- ENTROPY_RESET_DES_IO
- ENTROPY_RESET_IV
- ENTROPY_RESET_KEY_CACHE
- ENTROPY_RESET_STC_MODE
- ENTROPY_SHIFT
- ENTROPY_STATUS_BUSY
- ENTROPY_STATUS_BYPASS_MASK
- ENTROPY_STATUS_CIPHER
- ENTROPY_STATUS_DRDY
- ENTRY
- ENTRYLO
- ENTRYLO_C
- ENTRYLO_C_SHIFT
- ENTRYLO_D
- ENTRYLO_G
- ENTRYLO_V
- ENTRYMODE_CMD
- ENTRYTYPE_LOCKED
- ENTRYTYPE_MACv4
- ENTRYTYPE_MACv6
- ENTRYTYPE_NORMAL
- ENTRY_ALIGN64
- ENTRY_BCN_ASSIGNED
- ENTRY_BCN_ENABLED
- ENTRY_BEEN_USED
- ENTRY_BITPOS_C
- ENTRY_BITPOS_DESCRIPTOR
- ENTRY_BITPOS_O
- ENTRY_BITPOS_QWORDS
- ENTRY_BITS_C
- ENTRY_BITS_DESCRIPTOR
- ENTRY_BITS_O
- ENTRY_BITS_QWORDS
- ENTRY_BITS_TOTAL
- ENTRY_BLOCK_INDEX
- ENTRY_BLOCK_PTR_FOR_FN
- ENTRY_CFI
- ENTRY_COMMAND
- ENTRY_CONTINUATION
- ENTRY_DATA_IO_FAILED
- ENTRY_DATA_PENDING
- ENTRY_DATA_STATUS_PENDING
- ENTRY_DEBUG_RELATED
- ENTRY_EXTENDED_COMMAND
- ENTRY_FAIL_DEFAULT
- ENTRY_FAIL_NMI
- ENTRY_FAIL_PDPTE
- ENTRY_FAIL_VMCS_LINK_PTR
- ENTRY_FOUND
- ENTRY_GENERAL_EXCPETION
- ENTRY_INDEX_M
- ENTRY_INIT_DEV
- ENTRY_INIT_MOD
- ENTRY_INIT_MOD_DEV
- ENTRY_INIT_MSG
- ENTRY_INIT_SRCH_FRST
- ENTRY_INIT_SRCH_NEXT
- ENTRY_IN_USE
- ENTRY_IO_BBLOCK_IN
- ENTRY_IO_BBLOCK_OUT
- ENTRY_IO_BOOTIN
- ENTRY_IO_BOOTOUT
- ENTRY_IO_CIN
- ENTRY_IO_CLOSE
- ENTRY_IO_COUT
- ENTRY_IO_GETMSG
- ENTRY_MACHINE_ERROR
- ENTRY_MAPPING_BOOT_SETUP
- ENTRY_MAPPING_KEXEC_SETUP
- ENTRY_MARKER
- ENTRY_MASK
- ENTRY_MASK_C
- ENTRY_MASK_DESCRIPTOR
- ENTRY_MASK_NOSTATE
- ENTRY_MASK_O
- ENTRY_MASK_QWORDS
- ENTRY_MIN_ALIGN
- ENTRY_MODE
- ENTRY_NOT_FOUND
- ENTRY_OWNER_DEVICE_DATA
- ENTRY_POINT
- ENTRY_PTE_NOT_PRESENT
- ENTRY_RESET_NMI
- ENTRY_SIZE
- ENTRY_STATUS
- ENTRY_SYSCALL
- ENTRY_TEXT
- ENTRY_TIMEOUT
- ENTRY_TLB_FILL
- ENTRY_TLB_MISC
- ENTRY_TLB_VLPT_MISS
- ENTRY_TRAMPOLINE_NAME
- ENTRY_TXD_ACK
- ENTRY_TXD_BURST
- ENTRY_TXD_CTS_FRAME
- ENTRY_TXD_ENCRYPT
- ENTRY_TXD_ENCRYPT_IV
- ENTRY_TXD_ENCRYPT_MMIC
- ENTRY_TXD_ENCRYPT_PAIRWISE
- ENTRY_TXD_FIRST_FRAGMENT
- ENTRY_TXD_GENERATE_SEQ
- ENTRY_TXD_HT_AMPDU
- ENTRY_TXD_HT_BW_40
- ENTRY_TXD_HT_MIMO_PS
- ENTRY_TXD_HT_SHORT_GI
- ENTRY_TXD_MORE_FRAG
- ENTRY_TXD_REQ_TIMESTAMP
- ENTRY_TXD_RETRY_MODE
- ENTRY_TXD_RTS_FRAME
- ENTRY_TYPE_CONDITIONAL
- ENTRY_TYPE_DIS_INTR
- ENTRY_TYPE_GET_FCE
- ENTRY_TYPE_GET_HBUF
- ENTRY_TYPE_GET_QUEUE
- ENTRY_TYPE_GET_SHADOW
- ENTRY_TYPE_NOP
- ENTRY_TYPE_PCICFG
- ENTRY_TYPE_PSE_RISC
- ENTRY_TYPE_RDPEPREG
- ENTRY_TYPE_RDREMRAM
- ENTRY_TYPE_RDREMREG
- ENTRY_TYPE_RD_IOB_T1
- ENTRY_TYPE_RD_IOB_T2
- ENTRY_TYPE_RD_PCI
- ENTRY_TYPE_RD_RAM
- ENTRY_TYPE_RST_RISC
- ENTRY_TYPE_SCRATCH
- ENTRY_TYPE_TMP_END
- ENTRY_TYPE_WRITE_BUF
- ENTRY_TYPE_WRPEPREG
- ENTRY_TYPE_WRREMREG
- ENTRY_TYPE_WR_IOB_T1
- ENTRY_TYPE_WR_IOB_T2
- ENTRY_TYPE_WR_PCI
- ENTRY_WIDTH
- ENTSR_ABT
- ENTSR_CDH
- ENTSR_COL
- ENTSR_CRS
- ENTSR_FU
- ENTSR_ND
- ENTSR_OWC
- ENTSR_PTX
- ENTST
- ENT_HASHBITS
- ENT_HASHMAX
- ENT_HM
- ENT_INT_COAL_CNT
- ENT_INT_COAL_TIME
- ENT_INT_SRC1
- ENT_INT_SRC1_D2H_FIS_CH0_MSK
- ENT_INT_SRC1_D2H_FIS_CH0_OFF
- ENT_INT_SRC1_D2H_FIS_CH1_MSK
- ENT_INT_SRC1_D2H_FIS_CH1_OFF
- ENT_INT_SRC2
- ENT_INT_SRC2_AXI_OVERLF_INT_MSK
- ENT_INT_SRC2_AXI_OVERLF_INT_OFF
- ENT_INT_SRC2_AXI_WRONG_INT_MSK
- ENT_INT_SRC2_AXI_WRONG_INT_OFF
- ENT_INT_SRC2_CQ_CFG_ERR_MSK
- ENT_INT_SRC2_CQ_CFG_ERR_OFF
- ENT_INT_SRC2_DQ_CFG_ERR_MSK
- ENT_INT_SRC2_DQ_CFG_ERR_OFF
- ENT_INT_SRC3
- ENT_INT_SRC3_ABT_OFF
- ENT_INT_SRC3_AXI_OFF
- ENT_INT_SRC3_DQE_POISON_OFF
- ENT_INT_SRC3_FIFO_OFF
- ENT_INT_SRC3_IOST_POISON_OFF
- ENT_INT_SRC3_IPTT_SLOT_NOMATCH_OFF
- ENT_INT_SRC3_ITCT_NCQ_POISON_OFF
- ENT_INT_SRC3_ITCT_POISON_OFF
- ENT_INT_SRC3_ITC_INT_MSK
- ENT_INT_SRC3_ITC_INT_OFF
- ENT_INT_SRC3_LM_OFF
- ENT_INT_SRC3_RP_DEPTH_OFF
- ENT_INT_SRC3_WP_DEPTH_OFF
- ENT_INT_SRC_MSK1
- ENT_INT_SRC_MSK2
- ENT_INT_SRC_MSK3
- ENT_INT_SRC_MSK3_ENT95_MSK_MSK
- ENT_INT_SRC_MSK3_ENT95_MSK_OFF
- ENT_STATUS
- ENT_STATUS_MASK
- ENUART
- ENUM
- ENUMERATED_CTL_INFO
- ENUMS_GDS_PERFCOUNT_SELECT_H
- ENUM_1_QUEUED_REQS
- ENUM_2_QUEUED_REQS
- ENUM_3_QUEUED_REQS
- ENUM_BRD_TYPE_CASE
- ENUM_BUS_16BIT
- ENUM_BUS_32BIT
- ENUM_BUS_8BIT
- ENUM_BUS_NONE
- ENUM_CHIP_TYPE_CASE
- ENUM_DPG_BIT_DEPTH
- ENUM_DPG_BIT_DEPTH_10BPC
- ENUM_DPG_BIT_DEPTH_12BPC
- ENUM_DPG_BIT_DEPTH_6BPC
- ENUM_DPG_BIT_DEPTH_8BPC
- ENUM_DPG_DISABLE
- ENUM_DPG_DYNAMIC_RANGE
- ENUM_DPG_DYNAMIC_RANGE_CEA
- ENUM_DPG_DYNAMIC_RANGE_VESA
- ENUM_DPG_EN
- ENUM_DPG_ENABLE
- ENUM_DPG_FIELD_POLARITY
- ENUM_DPG_FIELD_POLARITY_TOP_EVEN_BOTTOM_ODD
- ENUM_DPG_FIELD_POLARITY_TOP_ODD_BOTTOM_EVEN
- ENUM_DPG_MODE
- ENUM_DPG_MODE_HORIZONTAL_BAR
- ENUM_DPG_MODE_RGB_COLOUR_BLOCK
- ENUM_DPG_MODE_RGB_DUAL_RAMP
- ENUM_DPG_MODE_RGB_SINGLE_RAMP
- ENUM_DPG_MODE_RGB_XR_BIAS
- ENUM_DPG_MODE_VERTICAL_BAR
- ENUM_DPG_MODE_YCBCR_601_COLOUR_BLOCK
- ENUM_DPG_MODE_YCBCR_709_COLOUR_BLOCK
- ENUM_ENTRY
- ENUM_FMT_PTI_FIELD_POLARITY
- ENUM_FMT_PTI_FIELD_POLARITY_TOP_EVEN_BOTTOM_ODD
- ENUM_FMT_PTI_FIELD_POLARITY_TOP_ODD_BOTTOM_EVEN
- ENUM_ID_1
- ENUM_ID_2
- ENUM_ID_3
- ENUM_ID_4
- ENUM_ID_5
- ENUM_ID_6
- ENUM_ID_7
- ENUM_ID_COUNT
- ENUM_ID_MASK
- ENUM_ID_SHIFT
- ENUM_ID_UNKNOWN
- ENUM_INT_MASK
- ENUM_MASK
- ENUM_NUM_SIMD_PER_CU
- ENUM_ONE
- ENUM_PORT
- ENUM_SQ_EXPORT_RAT_INST
- ENUM_THREE
- ENUM_TIMER_STOP
- ENUM_TWO
- ENUM_XDMA_LOCAL_SW_MODE
- ENUM_XDMA_MSTR_ALPHA_POSITION
- ENUM_XDMA_MSTR_VSYNC_GSL_CHECK_SEL
- ENUM_XDMA_SLV_ALPHA_POSITION
- ENUM_ZERO
- ENV
- ENVCTRL_ALL_FANS_BAD
- ENVCTRL_ALL_FANS_GOOD
- ENVCTRL_CPCI_IGNORED_NODE
- ENVCTRL_CPUTEMP_MON
- ENVCTRL_CPUVOLTAGE_MON
- ENVCTRL_ETHERTEMP_MON
- ENVCTRL_FAN0_FAILURE_MASK
- ENVCTRL_FAN1_FAILURE_MASK
- ENVCTRL_FAN2_FAILURE_MASK
- ENVCTRL_FAN3_FAILURE_MASK
- ENVCTRL_FAN4_FAILURE_MASK
- ENVCTRL_FAN5_FAILURE_MASK
- ENVCTRL_FAN6_FAILURE_MASK
- ENVCTRL_FAN7_FAILURE_MASK
- ENVCTRL_FANSTAT_MON
- ENVCTRL_GLOBALADDR_ADDR_MASK
- ENVCTRL_GLOBALADDR_MON
- ENVCTRL_GLOBALADDR_PSTAT_MASK
- ENVCTRL_MAX_CPU
- ENVCTRL_MINOR
- ENVCTRL_MTHRBDTEMP_MON
- ENVCTRL_NOMON
- ENVCTRL_POWERSUPPLY_BAD
- ENVCTRL_RD_CPU_TEMPERATURE
- ENVCTRL_RD_CPU_VOLTAGE
- ENVCTRL_RD_ETHERNET_TEMPERATURE
- ENVCTRL_RD_FAN_STATUS
- ENVCTRL_RD_GLOBALADDRESS
- ENVCTRL_RD_MTHRBD_TEMPERATURE
- ENVCTRL_RD_SCSI_TEMPERATURE
- ENVCTRL_RD_SHUTDOWN_TEMPERATURE
- ENVCTRL_RD_VOLTAGE_STATUS
- ENVCTRL_RD_WARNING_TEMPERATURE
- ENVCTRL_SCSITEMP_MON
- ENVCTRL_TRACE
- ENVCTRL_TRANSLATE_COMBINED
- ENVCTRL_TRANSLATE_FULL
- ENVCTRL_TRANSLATE_NO
- ENVCTRL_TRANSLATE_PARTIAL
- ENVCTRL_TRANSLATE_SCALE
- ENVCTRL_VOLTAGESTAT_MON
- ENVCTRL_VOLTAGE_BAD
- ENVCTRL_VOLTAGE_POWERSUPPLY_BAD
- ENVCTRL_VOLTAGE_POWERSUPPLY_GOOD
- ENVELOPE_IRQ
- ENVIRON_ANY
- ENVIRON_INDOOR
- ENVIRON_OUTDOOR
- ENVVAL
- ENVVAL_MASK
- ENVVOL
- ENVVOL_MASK
- ENV_AUTO_ACTION
- ENV_BOOTDEF_DEV
- ENV_BOOTED_DEV
- ENV_BOOTED_FILE
- ENV_BOOTED_OSFLAGS
- ENV_BOOT_DEV
- ENV_BOOT_FILE
- ENV_BOOT_OSFLAGS
- ENV_BOOT_RESET
- ENV_CHAR_SET
- ENV_DUMP_DEV
- ENV_ENABLE_AUDIT
- ENV_LANGUAGE
- ENV_LICENSE
- ENV_PREFIX_LEN
- ENV_PREFIX_STR
- ENV_SENDER_LEN
- ENV_SENDER_STR
- ENV_TEXT_LEN
- ENV_TEXT_STR
- ENV_TTY_DEV
- ENWAITTO
- ENXIO
- ENXMT
- EN_10M_BGOFF
- EN_10M_CLKDIV
- EN_10M_PLLOFF
- EN_24BPP
- EN_3P
- EN_A2P_TRANSFERS
- EN_A2_AUTO_MONO2
- EN_A2_AUTO_STEREO
- EN_A2_FORCE_MONO1
- EN_A2_FORCE_MONO2
- EN_A2_FORCE_STEREO
- EN_AAF
- EN_AC98
- EN_ACLK_AUD
- EN_ACLK_DISP
- EN_ACLK_EGL
- EN_ACLK_FSYS
- EN_ACLK_FSYS_SECURE_RTIC
- EN_ACLK_FSYS_SECURE_SMMU_RTIC
- EN_ACLK_G2D
- EN_ACLK_G2D_SECURE_SLIM_SSS
- EN_ACLK_G2D_SECURE_SMMU_G2D
- EN_ACLK_G2D_SECURE_SMMU_MDMA
- EN_ACLK_G2D_SECURE_SMMU_SLIM_SSS
- EN_ACLK_G2D_SECURE_SMMU_SSS
- EN_ACLK_G2D_SECURE_SSS
- EN_ACLK_G3D
- EN_ACLK_GSCL
- EN_ACLK_GSCL_FIMC
- EN_ACLK_GSCL_SECURE_SMMU_GSCL0
- EN_ACLK_GSCL_SECURE_SMMU_GSCL1
- EN_ACLK_GSCL_SECURE_SMMU_MSCL0
- EN_ACLK_GSCL_SECURE_SMMU_MSCL1
- EN_ACLK_ISP0
- EN_ACLK_ISP1
- EN_ACLK_KFC
- EN_ACLK_MFC
- EN_ACLK_MIF
- EN_ACLK_MIF_SECURE_DREX0_TZ
- EN_ACLK_MIF_SECURE_DREX1_TZ
- EN_ACLK_MIF_SECURE_INTMEM
- EN_ACLK_SECURE_SMMU2_MFC
- EN_ACLK_TOP
- EN_ADC_ACTIVE_INTR_BIT
- EN_ADC_DONE_INTR_BIT
- EN_ADC_INTR_SRC_BIT
- EN_ADC_OVERRUN_BIT
- EN_ADC_STOP_INTR_BIT
- EN_AGE_DYNAMIC
- EN_AGE_MCAST
- EN_AGE_PORT
- EN_AGE_SPT
- EN_AGE_VLAN
- EN_ALDO1
- EN_ALDO234
- EN_ALDO5
- EN_ALDO7
- EN_ALDPS
- EN_ALPHA_WRITE
- EN_AMPDU_RTY_NEW
- EN_APICK
- EN_APLL_LOCKED
- EN_ARP2BREAK0
- EN_ARP2BREAK1
- EN_ARP2BREAK2
- EN_ARP2BREAK3
- EN_ARP2CIOPERR
- EN_ARP2HALTC
- EN_ARP2ILLOPC
- EN_ARP2PERR
- EN_ARP2WAITTO
- EN_ATN_STOP
- EN_AUDIO0
- EN_AUDIO1
- EN_AUTONEG_ERR_TIMER
- EN_AUTO_DS
- EN_AUTO_PD_WAR
- EN_AUTO_PS
- EN_AUX_3P
- EN_BB
- EN_BCN_FUNCTION
- EN_BIAS
- EN_BLANKING
- EN_BLANK_OE
- EN_BTSC_AUTO_SAP
- EN_BTSC_AUTO_STEREO
- EN_BTSC_FORCE_MONO
- EN_BTSC_FORCE_SAP
- EN_BTSC_FORCE_STEREO
- EN_BUF
- EN_BUSSERVICE
- EN_CAB
- EN_CCMD
- EN_CE
- EN_CFIFTOERR
- EN_CHIP_RST
- EN_CHP_LIN_B
- EN_CH_RST
- EN_CKOUT_ARM
- EN_CLIPPING
- EN_CLOCK_PM
- EN_CMDDONE
- EN_CMnRSPMBXF
- EN_CODEC
- EN_CODEC0
- EN_CODEC1
- EN_COHERENCY
- EN_CRYSTAL
- EN_CSBUFPERR
- EN_CSERR
- EN_D
- EN_DAC_ACTIVE_INTR_BIT
- EN_DAC_DONE_INTR_BIT
- EN_DAC_ENABLE
- EN_DAC_INTR_SRC_BIT
- EN_DAC_UNDERRUN_BIT
- EN_DATA_OE
- EN_DC2_SLEEP
- EN_DC3_SLEEP
- EN_DCLK_OE
- EN_DIGCLK
- EN_DIGIT_SIGNAL_CHECK
- EN_DISCONNECT
- EN_DLDO7
- EN_DLDO911
- EN_DLL_MODE0
- EN_DMAXFERABORT
- EN_DMAXFERCOMP
- EN_DMAXFERERROR
- EN_DMD_RACQ
- EN_DMD_RACQ_REG_VAL
- EN_DMD_RACQ_REG_VAL_14
- EN_DMTRX_BYPASS
- EN_DMTRX_LR
- EN_DMTRX_MONO
- EN_DMTRX_SUMDIFF
- EN_DMTRX_SUMR
- EN_DNV_LL_MASK
- EN_DNV_LL_SHIFT
- EN_DNV_SYS_MASK
- EN_DNV_SYS_SHIFT
- EN_DRAM_OE
- EN_DRAM_REFRESH
- EN_DRV_NAME
- EN_DSPCK
- EN_DSPTIMCK
- EN_EEE_100
- EN_EEE_1000
- EN_EEE_CMODE
- EN_EEPROM
- EN_EIAJ_AUTO_MONO2
- EN_EIAJ_AUTO_STEREO
- EN_EIAJ_FORCE_MONO1
- EN_EIAJ_FORCE_MONO2
- EN_EIAJ_FORCE_STEREO
- EN_EMI_L
- EN_ERR_LL_MASK
- EN_ERR_LL_SHIFT
- EN_ERR_SYS_MASK
- EN_ERR_SYS_SHIFT
- EN_ETHTOOL_QP_ATTACH
- EN_ETHTOOL_SHORT_MASK
- EN_ETHTOOL_WORD_MASK
- EN_FALLING
- EN_FAST_AGE_STATIC
- EN_FAST_RAS_READ
- EN_FAST_RD_AHEAD_WR
- EN_FEW_WAIT_MASK
- EN_FEW_WAIT_VAL
- EN_FIRST_HALF
- EN_FMRADIO_AUTO_STEREO
- EN_FMRADIO_EN_RDS
- EN_FMRADIO_FORCE_MONO
- EN_FMRADIO_FORCE_STEREO
- EN_FORCEDMACOMP
- EN_GESTURE
- EN_GPADC
- EN_GPIOCK
- EN_HS_DET
- EN_HVSYNC_OE
- EN_HWSEQ
- EN_I2SIN_ENABLE
- EN_I2SIN_STR2DAC
- EN_I2SOUT_ENABLE
- EN_ICHAR
- EN_INFINITE_MODE
- EN_INT
- EN_INTVL
- EN_IP_AUD
- EN_IP_DISP
- EN_IP_DISP_BUS
- EN_IP_EGL
- EN_IP_FSYS
- EN_IP_FSYS_SECURE_RTIC
- EN_IP_FSYS_SECURE_SMMU_RTIC
- EN_IP_G2D
- EN_IP_G2D_SECURE_SLIM_SSS
- EN_IP_G2D_SECURE_SMMU_G2D
- EN_IP_G2D_SECURE_SMMU_MDMA
- EN_IP_G2D_SECURE_SMMU_SLIM_SSS
- EN_IP_G2D_SECURE_SMMU_SSS
- EN_IP_G2D_SECURE_SSS
- EN_IP_G3D
- EN_IP_GSCL
- EN_IP_GSCL_FIMC
- EN_IP_GSCL_SECURE_SMMU_GSCL0
- EN_IP_GSCL_SECURE_SMMU_GSCL1
- EN_IP_GSCL_SECURE_SMMU_MSCL0
- EN_IP_GSCL_SECURE_SMMU_MSCL1
- EN_IP_ISP0
- EN_IP_ISP1
- EN_IP_KFC
- EN_IP_MFC
- EN_IP_MFC_SECURE_SMMU2_MFC
- EN_IP_MIF
- EN_IP_MIF_SECURE_DREX0_TZ
- EN_IP_MIF_SECURE_DREX1_TZ
- EN_IP_MIF_SECURE_INTEMEM
- EN_IP_MIF_SECURE_MONOCNT
- EN_IP_MIF_SECURE_RTC_APBIF
- EN_IP_PERI0
- EN_IP_PERI1
- EN_IP_PERI2
- EN_IP_PERI_SECURE_ANTIRBKCNT
- EN_IP_PERI_SECURE_CHIPID
- EN_IP_PERI_SECURE_PROVKEY0
- EN_IP_PERI_SECURE_PROVKEY1
- EN_IP_PERI_SECURE_SECKEY
- EN_IP_PERI_SECURE_TOP_RTC
- EN_IP_PERI_SECURE_TZPC
- EN_IP_TOP
- EN_IQADC
- EN_IQANA
- EN_IQCAL_MODE0
- EN_IQ_DCC_MODE0
- EN_IRQ_EOF
- EN_LBCK
- EN_LBD
- EN_LCDCK
- EN_LDOS_MAX
- EN_LFB_READ
- EN_LNA0
- EN_LNA1
- EN_LNA2
- EN_LNA3
- EN_LO
- EN_LPI_RX_PAUSE
- EN_LPI_TX_PAUSE
- EN_LPI_TX_PFC
- EN_LmACK
- EN_LmACKREQ
- EN_LmACRCERR
- EN_LmADDRRCV
- EN_LmAIPNRML
- EN_LmAIPRV0
- EN_LmAIPRV1
- EN_LmAIPRV2
- EN_LmAIPRVWP
- EN_LmAIPWC
- EN_LmAIPWD
- EN_LmAIPWP
- EN_LmANTTTO
- EN_LmBITLTTO
- EN_LmBREAK
- EN_LmBROADCH
- EN_LmBROADRV0
- EN_LmBROADRV1
- EN_LmBROADRV2
- EN_LmBROADRV3
- EN_LmBROADRV4
- EN_LmBROADRVCH0
- EN_LmBROADRVCH1
- EN_LmCLOSECLAF
- EN_LmCLOSENORM
- EN_LmCLOSERV0
- EN_LmCLOSERV1
- EN_LmCRBLK
- EN_LmCRTTTO
- EN_LmDMAT
- EN_LmDONE
- EN_LmDONETO
- EN_LmDWSEVENT
- EN_LmERROR
- EN_LmFRMBAD
- EN_LmHARDRST
- EN_LmHOLD
- EN_LmHWTINT
- EN_LmINVDISP
- EN_LmINVDW
- EN_LmM2REQMBXF
- EN_LmM2RSPMBXE
- EN_LmM5OOBSVC
- EN_LmMISSEOAF
- EN_LmMISSEOF
- EN_LmMISSSOAF
- EN_LmMISSSOF
- EN_LmMnCFGCMPLT
- EN_LmMnCFGEXPSATA
- EN_LmMnCFGHDR
- EN_LmMnCFGICL
- EN_LmMnCFGRBUF
- EN_LmMnCFGRDAT
- EN_LmMnCFGSATA
- EN_LmMnCRCERR
- EN_LmMnCTXDONE
- EN_LmMnDMAERR
- EN_LmMnFETCHSG
- EN_LmMnHDRMISS
- EN_LmMnLOADCTX
- EN_LmMnRLSSCB
- EN_LmMnSAVECTX
- EN_LmMnSAVETTR
- EN_LmMnWAITSCB
- EN_LmMnXMTERR
- EN_LmMnZERODATA
- EN_LmNAK
- EN_LmNAKREQ
- EN_LmNOTIFYRV0
- EN_LmNOTIFYRV1
- EN_LmNOTIFYRV2
- EN_LmNOTIFYSPIN
- EN_LmOBOVRN
- EN_LmOPENACPT
- EN_LmOPENRJCT
- EN_LmOPENRTRY
- EN_LmPHYOVRN
- EN_LmPMACK
- EN_LmPMNAK
- EN_LmPMREQP
- EN_LmPMREQS
- EN_LmRCVERR
- EN_LmRCVPRIM
- EN_LmRERR
- EN_LmRIP
- EN_LmROK
- EN_LmRRDY
- EN_LmRRDYOVRN
- EN_LmSATAINTLK
- EN_LmSYNC
- EN_LmSYNCSRST
- EN_LmUNKNOWNP
- EN_LmXHOLD
- EN_LmXRDY
- EN_MASK
- EN_MBSSID
- EN_MCLK_TRISTATE_IN_SUSPEND
- EN_MIC_DET
- EN_MIS00
- EN_MIX0
- EN_MIX1
- EN_MIX2
- EN_MIX3
- EN_MODEM
- EN_MULTI
- EN_NDP
- EN_NICAM_AUTO_FALLBACK
- EN_NICAM_AUTO_MONO2
- EN_NICAM_AUTO_STEREO
- EN_NICAM_FORCE_MONO1
- EN_NICAM_FORCE_MONO2
- EN_NICAM_FORCE_STEREO
- EN_NICAM_TRY_AGAIN_BIT
- EN_OCPI_CK
- EN_OOB_RESET
- EN_OVLYDONE
- EN_OVLYERR
- EN_P2A_TRANSFERS
- EN_PACKETS_CSI2
- EN_PARALLEL_DET
- EN_PATCH_RAM_TRAP_ADDR
- EN_PCLK_AUD
- EN_PCLK_DISP
- EN_PCLK_EGL
- EN_PCLK_FSYS
- EN_PCLK_G2D
- EN_PCLK_G2D_SECURE_SMMU_G2D
- EN_PCLK_G2D_SECURE_SMMU_MDMA
- EN_PCLK_G2D_SECURE_SMMU_SLIM_SSS
- EN_PCLK_G2D_SECURE_SMMU_SSS
- EN_PCLK_G3D
- EN_PCLK_GSCL
- EN_PCLK_GSCL_FIMC
- EN_PCLK_GSCL_SECURE_SMMU_GSCL0
- EN_PCLK_GSCL_SECURE_SMMU_GSCL1
- EN_PCLK_GSCL_SECURE_SMMU_MSCL0
- EN_PCLK_GSCL_SECURE_SMMU_MSCL1
- EN_PCLK_ISP0
- EN_PCLK_ISP1
- EN_PCLK_KFC
- EN_PCLK_MFC
- EN_PCLK_MIF
- EN_PCLK_MIF_SECURE_DREX0_TZ
- EN_PCLK_MIF_SECURE_DREX1_TZ
- EN_PCLK_MIF_SECURE_MONOCNT
- EN_PCLK_MIF_SECURE_RTC_APBIF
- EN_PCLK_PERI0
- EN_PCLK_PERI1
- EN_PCLK_PERI2
- EN_PCLK_PERI3
- EN_PCLK_PERI_SECURE_ANTIRBKCNT
- EN_PCLK_PERI_SECURE_CHIPID
- EN_PCLK_PERI_SECURE_PROVKEY0
- EN_PCLK_PERI_SECURE_PROVKEY1
- EN_PCLK_PERI_SECURE_SECKEY
- EN_PCLK_PERI_SECURE_TOP_RTC
- EN_PCLK_PERI_SECURE_TZPC
- EN_PCLK_SECURE_SMMU2_MFC
- EN_PERCK
- EN_PERCK_BIT
- EN_PLL
- EN_PMGR
- EN_PS
- EN_PXL_PIPELINE
- EN_RD_AHEAD_FIFO
- EN_READ_TC_INT
- EN_REG
- EN_REQMBXREAD
- EN_RESELECTED
- EN_REST_WAIT_MASK
- EN_REST_WAIT_VAL
- EN_RGB_WRITE
- EN_RSPMBXAVAIL
- EN_RX_TC_INT
- EN_SBD
- EN_SCAM
- EN_SCLK_AUD
- EN_SCLK_DISP0
- EN_SCLK_DISP1
- EN_SCLK_EGL
- EN_SCLK_FSYS
- EN_SCLK_G3D
- EN_SCLK_GSCL
- EN_SCLK_GSCL_FIMC
- EN_SCLK_ISP
- EN_SCLK_KFC
- EN_SCLK_MIF
- EN_SCLK_PERI
- EN_SCLK_PERI_SECURE_TOP_RTC
- EN_SCLK_TOP
- EN_SCSIINTR
- EN_SCSIRESET
- EN_SECOND_HALF
- EN_SELECT
- EN_SELTIMEOUT
- EN_SLEEP
- EN_SPDIF
- EN_SPORT
- EN_SW_RESET
- EN_SW_RST
- EN_TAG_QUEUEING
- EN_TA_LL_MASK
- EN_TA_LL_SHIFT
- EN_TA_SYS_MASK
- EN_TA_SYS_SHIFT
- EN_TC1_CK
- EN_TC2_CK
- EN_TIMCK
- EN_TRIG_EDGE
- EN_TX
- EN_TXBCN_RPT
- EN_TX_TC_INT
- EN_UHF
- EN_ULTRA_LOW_POWER
- EN_VABT_LOW_SHUT_DOWN
- EN_VAUX_SLEEP
- EN_VBAT_LOW_IRQ
- EN_VBIAS_XTAL_TEMP
- EN_VC_SLEEP
- EN_VHF
- EN_VINTCORE12
- EN_VIO_SLEEP
- EN_VMEM_SLEEP
- EN_VMM
- EN_VMMC_SLEEP
- EN_VPLL_SLEEP
- EN_VTVOUT
- EN_WDTCK
- EN_WRITE_TC_INT
- EN_XORPCK
- EN_set
- EOB_STATUS
- EOC
- EOC_COND_CNT
- EOC_POLARITY_BIT
- EOC_STATUS
- EOE_LDEC
- EOE_LDECFE
- EOE_LDECFEL
- EOE_LDECL
- EOE_LDECPE
- EOE_LDECPEL
- EOE_RAC
- EOE_RAD
- EOE_RAI
- EOE_RAS
- EOE_READ
- EOE_READI
- EOE_RSA
- EOE_RSAU
- EOE_RWNITC
- EOE_VALID
- EOE_WCI
- EOE_WRITE
- EOE_WWSA
- EOE_WWSAL
- EOE_WWSAO
- EOE_WWSAOL
- EOF
- EOFBYTE
- EOFERR
- EOFERRE
- EOFIE_BIT
- EOF_BIT
- EOF_CHAR
- EOF_FAT12
- EOF_FAT16
- EOF_FAT32
- EOF_REACHED
- EOI
- EOI_EXIT_BITMAP0
- EOI_EXIT_BITMAP0_HIGH
- EOI_EXIT_BITMAP1
- EOI_EXIT_BITMAP1_HIGH
- EOI_EXIT_BITMAP2
- EOI_EXIT_BITMAP2_HIGH
- EOI_EXIT_BITMAP3
- EOI_EXIT_BITMAP3_HIGH
- EOI_MARKER
- EOI_MASK
- EOI_REGISTER__Vector_MASK
- EOI_REGISTER__Vector__SHIFT
- EOI_SHIFT
- EOL
- EOL2_CHAR
- EOLDSNAPC
- EOL_CHAR
- EOM
- EOM_BIT
- EOM_EN
- EOP
- EOPENSTALE
- EOPNOTSUPP
- EOP_CACHE_POLICY
- EOP_ERR_ADD
- EOP_ERR_AND
- EOP_ERR_CSWAP
- EOP_ERR_EPOLL
- EOP_ERR_NPOLL
- EOP_ERR_OR
- EOP_ERR_SWAP
- EOP_ERR_XOR
- EOP_ER_ADD
- EOP_ER_AND
- EOP_ER_CADD
- EOP_ER_CSWAP
- EOP_ER_OR
- EOP_ER_SWAP
- EOP_ER_XOR
- EOP_IRR_CLR
- EOP_IRR_DEC
- EOP_IRR_DECZ
- EOP_IRR_FETCH
- EOP_IRR_INC
- EOP_IR_CLR
- EOP_IR_DEC
- EOP_IR_FETCH
- EOP_IR_INC
- EOP_IR_QCHK1
- EOP_IR_QCHK2
- EOP_SIZE
- EOP_SIZE_MASK
- EOP_TCL1_ACTION_EN
- EOP_TCL1_VOL_ACTION_EN
- EOP_TCL2_VOLATILE
- EOP_TC_ACTION_EN
- EOP_TC_MD_ACTION_EN
- EOP_TC_NC_ACTION_EN
- EOP_TC_VOL_ACTION_EN
- EOP_TC_WB_ACTION_EN
- EOP_XR_CSWAP
- EOR
- EOSP_INDICATION
- EOSP_NOTIFICATION
- EOS_STATUS
- EOT
- EOTF_COEFF_NORM
- EOTF_COEFF_RIGHTSHIFT
- EOTF_COEFF_SIZE
- EOTP_DISABLED
- EOTP_RX_EN
- EOTP_TX_EN
- EOT_DISABLE
- EOT_DISABLE_REG
- EOT_ENABLE
- EOT_INT
- EOT_POLARITY
- EOVERFL
- EOVERFLOW
- EOW
- EOWNERDEAD
- EP
- EP0ISR
- EP0_AUTO
- EP0_BCLR
- EP0_DATAEND
- EP0_DATA_PHASE
- EP0_DEND
- EP0_DISCONNECT
- EP0_DPHTX
- EP0_DW
- EP0_DW1
- EP0_DW2
- EP0_DW3
- EP0_DW4
- EP0_EN
- EP0_END_XFER
- EP0_EPT_SIZE
- EP0_FIFOFULL
- EP0_FIFO_SIZE
- EP0_FLAG
- EP0_HS_MAX_PACKET_SIZE
- EP0_IDLE
- EP0_IN
- EP0_INAK
- EP0_INAK_EN
- EP0_INT
- EP0_INT_EN_BIT
- EP0_IN_DATA
- EP0_IN_DATA_PHASE
- EP0_IN_DATA_PHASE_COMPLETE
- EP0_IN_DATA_PHASE_SETUP
- EP0_IN_EMPTY
- EP0_IN_EN
- EP0_IN_FAKE_STATUS_PHASE
- EP0_IN_FULL
- EP0_IN_INT
- EP0_IN_NAK_EN
- EP0_IN_NAK_INT
- EP0_IN_STATUS_PHASE
- EP0_IRQ_FLG
- EP0_LDATA
- EP0_MAXPKTSZ
- EP0_MAXPKTSZ_MSK
- EP0_MAX_PACKET
- EP0_MAX_PKT_SIZE
- EP0_MPS_LIMIT
- EP0_NR_BANKS
- EP0_ONAK
- EP0_OP_SHIFT
- EP0_OUT
- EP0_OUT_DATA_PHASE
- EP0_OUT_DATA_PHASE_COMPLETE
- EP0_OUT_DATA_PHASE_SETUP
- EP0_OUT_EMPTY
- EP0_OUT_EN
- EP0_OUT_FULL
- EP0_OUT_INT
- EP0_OUT_NAK_EN
- EP0_OUT_NAK_INT
- EP0_OUT_NULL
- EP0_OUT_NULL_EN
- EP0_OUT_NULL_INT
- EP0_OUT_OR_EN
- EP0_OUT_OR_INT
- EP0_OUT_STATUS_PAHSE
- EP0_OUT_STATUS_PHASE
- EP0_OVERSEL
- EP0_PACKETSIZE
- EP0_PERR_NAK
- EP0_PERR_NAK_CLR
- EP0_PERR_NAK_EN
- EP0_PERR_NAK_INT
- EP0_PID
- EP0_PIDCLR
- EP0_READ_REG_CMD
- EP0_REQUEUE
- EP0_RESPONSE_BUF
- EP0_RESPONSE_BUFF
- EP0_RST
- EP0_RXPKTRDY
- EP0_SENDSTALL
- EP0_SENTSTALL
- EP0_SETUPA
- EP0_SETUPB
- EP0_SETUPPKTRDY
- EP0_SETUP_PHASE
- EP0_SHUTDOWN
- EP0_SS_MAX_PACKET_SIZE
- EP0_STALL
- EP0_STALL_EN
- EP0_STALL_INT
- EP0_STATUS
- EP0_STATUS_PHASE
- EP0_STATUS_RW_BIT
- EP0_STGSEL
- EP0_STL
- EP0_STNAME
- EP0_SUSPEND
- EP0_TXPKTRDY
- EP0_UNCONNECTED
- EP0_W1C_BITS
- EP0_WRITE_REG_CMD
- EP0_in_PIO
- EP0_receive_NULL
- EP0_send_NULL
- EP1
- EP10_EN
- EP10_INT
- EP11_EN
- EP11_INT
- EP12_EN
- EP12_INT
- EP13_EN
- EP13_INT
- EP14_EN
- EP14_INT
- EP15_0_EN
- EP15_EN
- EP15_INT
- EP1_BUFSIZE
- EP1_CMD_AUDIO_PARAMS
- EP1_CMD_AUTO_MSG
- EP1_CMD_DIMM_LEDS
- EP1_CMD_GET_DEVICE_INFO
- EP1_CMD_MIDI_READ
- EP1_CMD_MIDI_WRITE
- EP1_CMD_READ_ANALOG
- EP1_CMD_READ_ERP
- EP1_CMD_READ_IO
- EP1_CMD_WRITE_IO
- EP1_EN
- EP1_INT
- EP1_IN_RST
- EP1_IRQ_FLG
- EP1_OUT_RST
- EP2
- EP2_EN
- EP2_INT
- EP2_IRQ_FLG
- EP3
- EP3_EN
- EP3_INT
- EP3_IRQ_FLG
- EP4
- EP4_BUFSIZE
- EP4_EN
- EP4_FULL_FC
- EP4_INT
- EP4_IRQ_FLG
- EP5
- EP5_EN
- EP5_INT
- EP5_IRQ_FLG
- EP6_EN
- EP6_INT
- EP6_IRQ_FLG
- EP7_EN
- EP7_INT
- EP7_IRQ_FLG
- EP8_EN
- EP8_INT
- EP93XXFB_AC_RATE
- EP93XXFB_ATTRIBS
- EP93XXFB_BKGRND_OFFSET
- EP93XXFB_BLINK_MASK
- EP93XXFB_BLINK_PATTRN
- EP93XXFB_BLINK_RATE
- EP93XXFB_BRIGHTNESS
- EP93XXFB_COLOR_LUT
- EP93XXFB_COMPOSITE_SYNC
- EP93XXFB_CURSOR_ADR_RESET
- EP93XXFB_CURSOR_ADR_START
- EP93XXFB_CURSOR_BLINK_COLOR1
- EP93XXFB_CURSOR_BLINK_COLOR2
- EP93XXFB_CURSOR_BLINK_RATE_CTRL
- EP93XXFB_CURSOR_COLOR1
- EP93XXFB_CURSOR_COLOR2
- EP93XXFB_CURSOR_DSCAN_HY_LOC
- EP93XXFB_CURSOR_SIZE
- EP93XXFB_CURSOR_XY_LOC
- EP93XXFB_ENABLE
- EP93XXFB_ENABLE_AC
- EP93XXFB_ENABLE_CCIR
- EP93XXFB_ENABLE_INTERRUPT
- EP93XXFB_ENABLE_LCD
- EP93XXFB_EOL_OFFSET
- EP93XXFB_FIFO_LEVEL
- EP93XXFB_GRY_SCL_LUTB
- EP93XXFB_GRY_SCL_LUTG
- EP93XXFB_GRY_SCL_LUTR
- EP93XXFB_HACTIVE
- EP93XXFB_HBLANK
- EP93XXFB_HCLK
- EP93XXFB_HCLKS_TOTAL
- EP93XXFB_HSIG
- EP93XXFB_HSYNC
- EP93XXFB_LINE_CARRY
- EP93XXFB_LINE_LENGTH
- EP93XXFB_LUT_SW_CONTROL
- EP93XXFB_LUT_SW_CONTROL_SSTAT
- EP93XXFB_LUT_SW_CONTROL_SWTCH
- EP93XXFB_MAX_XRES
- EP93XXFB_MAX_YRES
- EP93XXFB_MIN_XRES
- EP93XXFB_MIN_YRES
- EP93XXFB_PARL_IF_IN
- EP93XXFB_PARL_IF_OUT
- EP93XXFB_PATTRN_MASK
- EP93XXFB_PCLK_FALLING
- EP93XXFB_PIXELMODE
- EP93XXFB_PIXELMODE_16BPP
- EP93XXFB_PIXELMODE_24BPP
- EP93XXFB_PIXELMODE_32BPP
- EP93XXFB_PIXELMODE_8BPP
- EP93XXFB_PIXELMODE_COLOR_555
- EP93XXFB_PIXELMODE_COLOR_888
- EP93XXFB_PIXELMODE_COLOR_LUT
- EP93XXFB_PIXELMODE_SHIFT_1P_18B
- EP93XXFB_PIXELMODE_SHIFT_1P_24B
- EP93XXFB_PIXEL_CLOCK_ENABLE
- EP93XXFB_PIXEL_DATA_ENABLE
- EP93XXFB_SCREEN_HPAGE
- EP93XXFB_SCREEN_LINES
- EP93XXFB_SCREEN_PAGE
- EP93XXFB_SIG_CLR_STR
- EP93XXFB_STATE_MACHINE_ENABLE
- EP93XXFB_SWLOCK
- EP93XXFB_SYNC_BLANK_HIGH
- EP93XXFB_SYNC_HORIZ_HIGH
- EP93XXFB_SYNC_VERT_HIGH
- EP93XXFB_USB_INTERLACE
- EP93XXFB_USE_BLANK_PIXEL
- EP93XXFB_USE_DOUBLE_HORZ
- EP93XXFB_USE_DOUBLE_VERT
- EP93XXFB_USE_EQUALIZATION
- EP93XXFB_USE_PARALLEL_INTERFACE
- EP93XXFB_USE_SDCSN0
- EP93XXFB_USE_SDCSN1
- EP93XXFB_USE_SDCSN2
- EP93XXFB_USE_SDCSN3
- EP93XXFB_VACTIVE
- EP93XXFB_VBLANK
- EP93XXFB_VCLK
- EP93XXFB_VID_SIG_CTRL
- EP93XXFB_VID_SIG_RSLT_VAL
- EP93XXFB_VLINES_TOTAL
- EP93XXFB_VLINE_STEP
- EP93XXFB_VSIG
- EP93XXFB_VSYNC
- EP93XXFB_VSYNC_ENABLE
- EP93XX_AAC_BASE
- EP93XX_AAC_PHYS_BASE
- EP93XX_ADC_BASE
- EP93XX_ADC_CH
- EP93XX_ADC_PHYS_BASE
- EP93XX_ADC_RESULT
- EP93XX_ADC_SDR
- EP93XX_ADC_SWITCH
- EP93XX_ADC_SW_LOCK
- EP93XX_AHB_IOMEM
- EP93XX_AHB_PHYS
- EP93XX_AHB_PHYS_BASE
- EP93XX_AHB_SIZE
- EP93XX_AHB_VIRT_BASE
- EP93XX_APB_IOMEM
- EP93XX_APB_PHYS
- EP93XX_APB_PHYS_BASE
- EP93XX_APB_SIZE
- EP93XX_APB_VIRT_BASE
- EP93XX_BOARD_IRQ
- EP93XX_BOARD_IRQS
- EP93XX_BOOT_ROM_BASE
- EP93XX_CHIP_REV_D0
- EP93XX_CHIP_REV_D1
- EP93XX_CHIP_REV_E0
- EP93XX_CHIP_REV_E1
- EP93XX_CHIP_REV_E2
- EP93XX_CS0_PHYS_BASE_ASYNC
- EP93XX_CS0_PHYS_BASE_SYNC
- EP93XX_CS1_PHYS_BASE
- EP93XX_CS2_PHYS_BASE
- EP93XX_CS3_PHYS_BASE
- EP93XX_CS6_PHYS_BASE
- EP93XX_CS7_PHYS_BASE
- EP93XX_DEF_BRIGHT
- EP93XX_DMA_AAC1
- EP93XX_DMA_AAC2
- EP93XX_DMA_AAC3
- EP93XX_DMA_BASE
- EP93XX_DMA_I2S1
- EP93XX_DMA_I2S2
- EP93XX_DMA_I2S3
- EP93XX_DMA_IDE
- EP93XX_DMA_IRDA
- EP93XX_DMA_IS_CYCLIC
- EP93XX_DMA_SSP
- EP93XX_DMA_UART1
- EP93XX_DMA_UART2
- EP93XX_DMA_UART3
- EP93XX_ETHERNET_BASE
- EP93XX_ETHERNET_PHYS_BASE
- EP93XX_EXT_CLK_RATE
- EP93XX_EXT_RTC_RATE
- EP93XX_GPIO_A_INT_STATUS
- EP93XX_GPIO_BANK
- EP93XX_GPIO_BASE
- EP93XX_GPIO_B_INT_STATUS
- EP93XX_GPIO_EEDRIVE
- EP93XX_GPIO_F_INT_STATUS
- EP93XX_GPIO_F_IRQ_BASE
- EP93XX_GPIO_LINE_A
- EP93XX_GPIO_LINE_B
- EP93XX_GPIO_LINE_C
- EP93XX_GPIO_LINE_COL0
- EP93XX_GPIO_LINE_COL1
- EP93XX_GPIO_LINE_COL2
- EP93XX_GPIO_LINE_COL3
- EP93XX_GPIO_LINE_COL4
- EP93XX_GPIO_LINE_COL5
- EP93XX_GPIO_LINE_COL6
- EP93XX_GPIO_LINE_COL7
- EP93XX_GPIO_LINE_D
- EP93XX_GPIO_LINE_DD0
- EP93XX_GPIO_LINE_DD1
- EP93XX_GPIO_LINE_DD12
- EP93XX_GPIO_LINE_DD13
- EP93XX_GPIO_LINE_DD14
- EP93XX_GPIO_LINE_DD15
- EP93XX_GPIO_LINE_DD2
- EP93XX_GPIO_LINE_DD3
- EP93XX_GPIO_LINE_DD4
- EP93XX_GPIO_LINE_DD5
- EP93XX_GPIO_LINE_DD6
- EP93XX_GPIO_LINE_DD7
- EP93XX_GPIO_LINE_DIORn
- EP93XX_GPIO_LINE_E
- EP93XX_GPIO_LINE_EECLK
- EP93XX_GPIO_LINE_EEDAT
- EP93XX_GPIO_LINE_EGPIO0
- EP93XX_GPIO_LINE_EGPIO1
- EP93XX_GPIO_LINE_EGPIO10
- EP93XX_GPIO_LINE_EGPIO11
- EP93XX_GPIO_LINE_EGPIO12
- EP93XX_GPIO_LINE_EGPIO13
- EP93XX_GPIO_LINE_EGPIO14
- EP93XX_GPIO_LINE_EGPIO15
- EP93XX_GPIO_LINE_EGPIO2
- EP93XX_GPIO_LINE_EGPIO3
- EP93XX_GPIO_LINE_EGPIO4
- EP93XX_GPIO_LINE_EGPIO5
- EP93XX_GPIO_LINE_EGPIO6
- EP93XX_GPIO_LINE_EGPIO7
- EP93XX_GPIO_LINE_EGPIO8
- EP93XX_GPIO_LINE_EGPIO9
- EP93XX_GPIO_LINE_F
- EP93XX_GPIO_LINE_G
- EP93XX_GPIO_LINE_GRLED
- EP93XX_GPIO_LINE_H
- EP93XX_GPIO_LINE_IDECS1n
- EP93XX_GPIO_LINE_IDECS2n
- EP93XX_GPIO_LINE_IDEDA0
- EP93XX_GPIO_LINE_IDEDA1
- EP93XX_GPIO_LINE_IDEDA2
- EP93XX_GPIO_LINE_MAX
- EP93XX_GPIO_LINE_MAX_IRQ
- EP93XX_GPIO_LINE_MCBVD1
- EP93XX_GPIO_LINE_MCBVD2
- EP93XX_GPIO_LINE_MCCD1
- EP93XX_GPIO_LINE_MCCD2
- EP93XX_GPIO_LINE_RDLED
- EP93XX_GPIO_LINE_READY
- EP93XX_GPIO_LINE_ROW0
- EP93XX_GPIO_LINE_ROW1
- EP93XX_GPIO_LINE_ROW2
- EP93XX_GPIO_LINE_ROW3
- EP93XX_GPIO_LINE_ROW4
- EP93XX_GPIO_LINE_ROW5
- EP93XX_GPIO_LINE_ROW6
- EP93XX_GPIO_LINE_ROW7
- EP93XX_GPIO_LINE_SLA0
- EP93XX_GPIO_LINE_SLA1
- EP93XX_GPIO_LINE_VS1
- EP93XX_GPIO_LINE_VS2
- EP93XX_GPIO_LINE_WP
- EP93XX_GPIO_PHYS_BASE
- EP93XX_GPIO_REG
- EP93XX_GRAPHICS_ACCEL_BASE
- EP93XX_I2SCLKDIV_LRDIV128
- EP93XX_I2SCLKDIV_LRDIV32
- EP93XX_I2SCLKDIV_LRDIV64
- EP93XX_I2SCLKDIV_LRDIV_MASK
- EP93XX_I2SCLKDIV_MASK
- EP93XX_I2SCLKDIV_SDIV
- EP93XX_I2S_BASE
- EP93XX_I2S_CLKCFG_CKP
- EP93XX_I2S_CLKCFG_LRS
- EP93XX_I2S_CLKCFG_MASTER
- EP93XX_I2S_CLKCFG_NBCG
- EP93XX_I2S_CLKCFG_REL
- EP93XX_I2S_FORMATS
- EP93XX_I2S_GLCTRL
- EP93XX_I2S_GLSTS
- EP93XX_I2S_GLSTS_TX0_FIFO_FULL
- EP93XX_I2S_I2STX0LFT
- EP93XX_I2S_I2STX0RT
- EP93XX_I2S_PHYS_BASE
- EP93XX_I2S_RX0EN
- EP93XX_I2S_RXCLKCFG
- EP93XX_I2S_RXCTRL
- EP93XX_I2S_RXLINCTRLDATA
- EP93XX_I2S_RXLINCTRLDATA_R_JUST
- EP93XX_I2S_RXWRDLEN
- EP93XX_I2S_TX0EN
- EP93XX_I2S_TXCLKCFG
- EP93XX_I2S_TXCTRL
- EP93XX_I2S_TXCTRL_TXEMPTY_LVL
- EP93XX_I2S_TXCTRL_TXUFIE
- EP93XX_I2S_TXLINCTRLDATA
- EP93XX_I2S_TXLINCTRLDATA_R_JUST
- EP93XX_I2S_TXWRDLEN
- EP93XX_I2S_WRDLEN_16
- EP93XX_I2S_WRDLEN_24
- EP93XX_I2S_WRDLEN_32
- EP93XX_IDE_BASE
- EP93XX_IDE_PHYS_BASE
- EP93XX_IRDA_BASE
- EP93XX_KEYPAD_AUTOREPEAT
- EP93XX_KEYPAD_BACK_DRIVE
- EP93XX_KEYPAD_DIAG_MODE
- EP93XX_KEYPAD_DISABLE_3_KEY
- EP93XX_KEYPAD_TEST_MODE
- EP93XX_KEYTCHCLK_DIV16
- EP93XX_KEYTCHCLK_DIV4
- EP93XX_KEY_MATRIX_BASE
- EP93XX_KEY_MATRIX_PHYS_BASE
- EP93XX_MATRIX_COLS
- EP93XX_MATRIX_ROWS
- EP93XX_MATRIX_SIZE
- EP93XX_MAX_BRIGHT
- EP93XX_MAX_COUNT
- EP93XX_PCMCIA_CONTROLLER_BASE
- EP93XX_PCMCIA_PHYS_BASE
- EP93XX_PWM_BASE
- EP93XX_PWM_PHYS_BASE
- EP93XX_PWMx_DUTY_CYCLE
- EP93XX_PWMx_ENABLE
- EP93XX_PWMx_INVERT
- EP93XX_PWMx_TERM_COUNT
- EP93XX_RASTER_BASE
- EP93XX_RASTER_PHYS_BASE
- EP93XX_RASTER_REG_BRIGHTNESS
- EP93XX_RTC_BASE
- EP93XX_RTC_CONTROL
- EP93XX_RTC_CONTROL_MIE
- EP93XX_RTC_DATA
- EP93XX_RTC_LOAD
- EP93XX_RTC_MATCH
- EP93XX_RTC_PHYS_BASE
- EP93XX_RTC_STATUS
- EP93XX_RTC_STATUS_INTR
- EP93XX_RTC_SWCOMP
- EP93XX_RTC_SWCOMP_DEL_MASK
- EP93XX_RTC_SWCOMP_DEL_SHIFT
- EP93XX_RTC_SWCOMP_INT_MASK
- EP93XX_RTC_SWCOMP_INT_SHIFT
- EP93XX_SDCE0_PHYS_BASE
- EP93XX_SDCE1_PHYS_BASE
- EP93XX_SDCE2_PHYS_BASE
- EP93XX_SDCE3_PHYS_BASE_ASYNC
- EP93XX_SDCE3_PHYS_BASE_SYNC
- EP93XX_SDRAM_CONTROLLER_BASE
- EP93XX_SECURITY_BASE
- EP93XX_SECURITY_FUSEFLG
- EP93XX_SECURITY_REG
- EP93XX_SECURITY_SECCHK1
- EP93XX_SECURITY_SECCHK2
- EP93XX_SECURITY_SECFLG
- EP93XX_SECURITY_SECID1
- EP93XX_SECURITY_SECID2
- EP93XX_SECURITY_UNIQCHK
- EP93XX_SECURITY_UNIQID
- EP93XX_SECURITY_UNIQID2
- EP93XX_SECURITY_UNIQID3
- EP93XX_SECURITY_UNIQID4
- EP93XX_SECURITY_UNIQID5
- EP93XX_SECURITY_UNIQVAL
- EP93XX_SPI_BASE
- EP93XX_SPI_PHYS_BASE
- EP93XX_SYSCON_BASE
- EP93XX_SYSCON_CLKDIV_ENABLE
- EP93XX_SYSCON_CLKDIV_ESEL
- EP93XX_SYSCON_CLKDIV_PDIV_SHIFT
- EP93XX_SYSCON_CLKDIV_PSEL
- EP93XX_SYSCON_CLKSET1
- EP93XX_SYSCON_CLKSET1_NBYP1
- EP93XX_SYSCON_CLKSET2
- EP93XX_SYSCON_CLKSET2_NBYP2
- EP93XX_SYSCON_CLKSET2_PLL2_EN
- EP93XX_SYSCON_DEVCFG
- EP93XX_SYSCON_DEVCFG_A1ONG
- EP93XX_SYSCON_DEVCFG_A2ONG
- EP93XX_SYSCON_DEVCFG_ADCPD
- EP93XX_SYSCON_DEVCFG_CPENA
- EP93XX_SYSCON_DEVCFG_D0ONG
- EP93XX_SYSCON_DEVCFG_D1ONG
- EP93XX_SYSCON_DEVCFG_EONIDE
- EP93XX_SYSCON_DEVCFG_EXVC
- EP93XX_SYSCON_DEVCFG_GONIDE
- EP93XX_SYSCON_DEVCFG_GONK
- EP93XX_SYSCON_DEVCFG_HC1EN
- EP93XX_SYSCON_DEVCFG_HC1IN
- EP93XX_SYSCON_DEVCFG_HC3EN
- EP93XX_SYSCON_DEVCFG_HC3IN
- EP93XX_SYSCON_DEVCFG_HONIDE
- EP93XX_SYSCON_DEVCFG_I2SONAC97
- EP93XX_SYSCON_DEVCFG_I2SONSSP
- EP93XX_SYSCON_DEVCFG_I2S_MASK
- EP93XX_SYSCON_DEVCFG_IONU2
- EP93XX_SYSCON_DEVCFG_KEYS
- EP93XX_SYSCON_DEVCFG_MONG
- EP93XX_SYSCON_DEVCFG_PONG
- EP93XX_SYSCON_DEVCFG_RAS
- EP93XX_SYSCON_DEVCFG_RASONP3
- EP93XX_SYSCON_DEVCFG_SHENA
- EP93XX_SYSCON_DEVCFG_SWRST
- EP93XX_SYSCON_DEVCFG_TIN
- EP93XX_SYSCON_DEVCFG_TONG
- EP93XX_SYSCON_DEVCFG_U1EN
- EP93XX_SYSCON_DEVCFG_U2EN
- EP93XX_SYSCON_DEVCFG_U3EN
- EP93XX_SYSCON_HALT
- EP93XX_SYSCON_I2SCLKDIV
- EP93XX_SYSCON_I2SCLKDIV_ORIDE
- EP93XX_SYSCON_I2SCLKDIV_SENA
- EP93XX_SYSCON_I2SCLKDIV_SPOL
- EP93XX_SYSCON_KEYTCHCLKDIV
- EP93XX_SYSCON_KEYTCHCLKDIV_ADIV
- EP93XX_SYSCON_KEYTCHCLKDIV_KDIV
- EP93XX_SYSCON_KEYTCHCLKDIV_KEN
- EP93XX_SYSCON_KEYTCHCLKDIV_TSEN
- EP93XX_SYSCON_POWER_STATE
- EP93XX_SYSCON_PWRCNT
- EP93XX_SYSCON_PWRCNT_DMA_M2M0
- EP93XX_SYSCON_PWRCNT_DMA_M2M1
- EP93XX_SYSCON_PWRCNT_DMA_M2P0
- EP93XX_SYSCON_PWRCNT_DMA_M2P1
- EP93XX_SYSCON_PWRCNT_DMA_M2P2
- EP93XX_SYSCON_PWRCNT_DMA_M2P3
- EP93XX_SYSCON_PWRCNT_DMA_M2P4
- EP93XX_SYSCON_PWRCNT_DMA_M2P5
- EP93XX_SYSCON_PWRCNT_DMA_M2P6
- EP93XX_SYSCON_PWRCNT_DMA_M2P7
- EP93XX_SYSCON_PWRCNT_DMA_M2P8
- EP93XX_SYSCON_PWRCNT_DMA_M2P9
- EP93XX_SYSCON_PWRCNT_FIR_EN
- EP93XX_SYSCON_PWRCNT_UARTBAUD
- EP93XX_SYSCON_PWRCNT_USH_EN
- EP93XX_SYSCON_REG
- EP93XX_SYSCON_STANDBY
- EP93XX_SYSCON_SWLOCK
- EP93XX_SYSCON_SYSCFG
- EP93XX_SYSCON_SYSCFG_LASDO
- EP93XX_SYSCON_SYSCFG_LCSN1
- EP93XX_SYSCON_SYSCFG_LCSN2
- EP93XX_SYSCON_SYSCFG_LCSN6
- EP93XX_SYSCON_SYSCFG_LCSN7
- EP93XX_SYSCON_SYSCFG_LEECLK
- EP93XX_SYSCON_SYSCFG_LEEDA
- EP93XX_SYSCON_SYSCFG_REV_MASK
- EP93XX_SYSCON_SYSCFG_REV_SHIFT
- EP93XX_SYSCON_SYSCFG_SBOOT
- EP93XX_SYSCON_VIDCLKDIV
- EP93XX_TIMER123_CONTROL_CLKSEL
- EP93XX_TIMER123_CONTROL_ENABLE
- EP93XX_TIMER123_CONTROL_MODE
- EP93XX_TIMER123_RATE
- EP93XX_TIMER1_CLEAR
- EP93XX_TIMER1_CONTROL
- EP93XX_TIMER1_LOAD
- EP93XX_TIMER1_VALUE
- EP93XX_TIMER2_CLEAR
- EP93XX_TIMER2_CONTROL
- EP93XX_TIMER2_LOAD
- EP93XX_TIMER2_VALUE
- EP93XX_TIMER3_CLEAR
- EP93XX_TIMER3_CONTROL
- EP93XX_TIMER3_LOAD
- EP93XX_TIMER3_VALUE
- EP93XX_TIMER4_RATE
- EP93XX_TIMER4_VALUE_HIGH
- EP93XX_TIMER4_VALUE_HIGH_ENABLE
- EP93XX_TIMER4_VALUE_LOW
- EP93XX_TIMER_BASE
- EP93XX_TIMER_REG
- EP93XX_TOUCHSCREEN_BASE
- EP93XX_UART1_BASE
- EP93XX_UART1_PHYS_BASE
- EP93XX_UART2_BASE
- EP93XX_UART2_PHYS_BASE
- EP93XX_UART3_BASE
- EP93XX_UART3_PHYS_BASE
- EP93XX_UART_MCR_OFFSET
- EP93XX_USB_BASE
- EP93XX_USB_PHYS_BASE
- EP93XX_VIC1_BASE
- EP93XX_VIC1_VALID_IRQ_MASK
- EP93XX_VIC2_BASE
- EP93XX_VIC2_VALID_IRQ_MASK
- EP93XX_WATCHDOG
- EP93XX_WATCHDOG_BASE
- EP93XX_WATCHDOG_PHYS_BASE
- EP93XX_WDSTATUS
- EP9_EN
- EP9_INT
- EPADDR
- EPAGERANGE
- EPAPR_EMAGIC
- EPAPR_EV_IDLE_LOOP
- EPAPR_SMAGIC
- EPAR_EROA
- EPAR_PHY_ADR
- EPAR_PHY_ADR_MASK
- EPAT_VERSION
- EPAUS
- EPAUSE
- EPAUSH
- EPAUSL
- EPB_ACC_GNT
- EPB_ACC_REQ
- EPB_ADDR_SHF
- EPB_DATA_MASK
- EPB_GLOBAL_WR
- EPB_IB_QUAD0_CS
- EPB_IB_QUAD0_CS_SHF
- EPB_IB_UC_CS_SHF
- EPB_LOC
- EPB_MADDRH
- EPB_MADDRL
- EPB_MASK
- EPB_PCIE_UC_CS_SHF
- EPB_RAMDATA
- EPB_RD
- EPB_ROMDATA
- EPB_ROM_R
- EPB_ROM_W
- EPB_SAVED
- EPB_TRANS_ERR
- EPB_TRANS_RDY
- EPB_TRANS_TRIES
- EPB_UC_CTL
- EPCIPMC_FSPC
- EPCIPMC_GWU
- EPCOMPLETE_MAX_ENDPOINTS
- EPCPR
- EPCR_EPOS
- EPCR_ERPRR
- EPCR_ERPRW
- EPCR_ERRE
- EPCR_GMII_MODE
- EPCR_MODE_MASK
- EPCR_REEP
- EPCR_RGMII_MODE
- EPCR_RTBI_MODE
- EPCR_TBI_MODE
- EPCR_WEP
- EPCTRL_BULK
- EPCTRL_CONTROL
- EPCTRL_DATA_TOGGLE_INHIBIT
- EPCTRL_EP_TYPE_BULK
- EPCTRL_EP_TYPE_CONTROL
- EPCTRL_EP_TYPE_INTERRUPT
- EPCTRL_EP_TYPE_ISO
- EPCTRL_INT
- EPCTRL_ISOCHRONOUS
- EPCTRL_RX_ALL_MASK
- EPCTRL_RX_DATA_SINK
- EPCTRL_RX_DATA_TOGGLE_INH
- EPCTRL_RX_DATA_TOGGLE_RST
- EPCTRL_RX_ENABLE
- EPCTRL_RX_EP_STALL
- EPCTRL_RX_EP_TYPE_SHIFT
- EPCTRL_RX_TYPE
- EPCTRL_TX_ALL_MASK
- EPCTRL_TX_DATA_SOURCE
- EPCTRL_TX_DATA_TOGGLE_INH
- EPCTRL_TX_DATA_TOGGLE_RST
- EPCTRL_TX_ENABLE
- EPCTRL_TX_EP_STALL
- EPCTRL_TX_EP_TYPE_SHIFT
- EPCTRL_TX_TYPE
- EPC_DIRPD_DISABLE_TIME
- EPC_EAS
- EPC_EAS_SHIFT
- EPC_EGS
- EPC_EGS_SHIFT
- EPC_ELPID
- EPC_ELPID_SHIFT
- EPC_EPID
- EPC_EPID_SHIFT
- EPC_EPR
- EPC_EPR_SHIFT
- EPC_OFF
- EPC_PLL_LOCK_COUNT
- EPC_RST
- EPC_RST_DISABLE_TIME
- EPC_VER
- EPDBG
- EPD_ELS_ACC
- EPD_ELS_COMMAND
- EPD_ELS_RJT
- EPD_RX_XCHG
- EPERM
- EPERM_GETSOCKOPT
- EPERM_SETSOCKOPT
- EPFIFO
- EPFLUSH_RX_OFFSET
- EPFLUSH_TX_OFFSET
- EPFNOSUPPORT
- EPH
- EPHYAR
- EPHYAR_DATA_MASK
- EPHYAR_FLAG
- EPHYAR_REG_MASK
- EPHYAR_REG_SHIFT
- EPHYAR_WRITE_CMD
- EPHY_DFLT_ADD
- EPHY_G12A_ID
- EPHY_MODE_RMII
- EPHY_RXER_NUM
- EPH_16COL
- EPH_CTR_ROL
- EPH_EXC_DEF
- EPH_LAT_COL
- EPH_LINK_OK
- EPH_LOST_CAR
- EPH_LTX_BRD
- EPH_LTX_MULT
- EPH_MULCOL
- EPH_RX_OVRN
- EPH_SNGLCOL
- EPH_SQET
- EPH_STATUS
- EPH_STATUS_REG
- EPH_TX_DEFR
- EPH_TX_SUC
- EPH_TX_UNRN
- EPI
- EPIA_VERSION
- EPIC_BAR
- EPIC_TOTAL_SIZE
- EPIDX
- EPID_IN
- EPID_OUT
- EPILOGUE_SIZE
- EPIN
- EPIN_EN
- EPIOWR_F
- EPIOWR_S
- EPIOWR_V
- EPIO_CFG_EPIO0
- EPIO_CFG_EPIO1
- EPIO_CFG_EPIO10
- EPIO_CFG_EPIO11
- EPIO_CFG_EPIO12
- EPIO_CFG_EPIO13
- EPIO_CFG_EPIO14
- EPIO_CFG_EPIO15
- EPIO_CFG_EPIO16
- EPIO_CFG_EPIO17
- EPIO_CFG_EPIO18
- EPIO_CFG_EPIO19
- EPIO_CFG_EPIO2
- EPIO_CFG_EPIO20
- EPIO_CFG_EPIO21
- EPIO_CFG_EPIO22
- EPIO_CFG_EPIO23
- EPIO_CFG_EPIO24
- EPIO_CFG_EPIO25
- EPIO_CFG_EPIO26
- EPIO_CFG_EPIO27
- EPIO_CFG_EPIO28
- EPIO_CFG_EPIO29
- EPIO_CFG_EPIO3
- EPIO_CFG_EPIO30
- EPIO_CFG_EPIO31
- EPIO_CFG_EPIO4
- EPIO_CFG_EPIO5
- EPIO_CFG_EPIO6
- EPIO_CFG_EPIO7
- EPIO_CFG_EPIO8
- EPIO_CFG_EPIO9
- EPIO_CFG_NA
- EPIPE
- EPI_1
- EPKTCNT
- EPLD_BASE
- EPLD_DMA_CONTROLLER_ENABLE
- EPLD_DMA_CONTROL_REGISTER
- EPLD_DMA_ENABLE
- EPLD_DMA_MODE
- EPLD_IO_CONTROL_REGISTER
- EPLD_MASK_BASE
- EPLD_REVISION_REGISTER
- EPLD_STATUS_BASE
- EPLL
- EPLLCON
- EPLLCON_K
- EPLL_CON0
- EPLL_CON1
- EPLL_CON2
- EPLL_LOCK
- EPMAP_FIFONO
- EPMAP_FIFONOMSK
- EPMCS
- EPMCSH
- EPMCSL
- EPMM0
- EPMM1
- EPMM2
- EPMM3
- EPMM4
- EPMM5
- EPMM6
- EPMM7
- EPMO
- EPMOH
- EPMOL
- EPM_SHIFT
- EPNAME
- EPNAME_SIZE
- EPN_AUTO
- EPN_BASEAD
- EPN_BCLR
- EPN_BUF_SINGLE
- EPN_BUF_TYPE
- EPN_BULK
- EPN_BURST_SET
- EPN_CBCLR
- EPN_DEND
- EPN_DEND_SET
- EPN_DIR0
- EPN_DMACNT
- EPN_DMAMODE0
- EPN_DMA_EN
- EPN_DW
- EPN_DW1
- EPN_DW2
- EPN_DW3
- EPN_DW4
- EPN_EN
- EPN_INT
- EPN_INTERRUPT
- EPN_INT_EN
- EPN_IN_DATA
- EPN_IN_EMPTY
- EPN_IN_EN
- EPN_IN_END_EN
- EPN_IN_END_INT
- EPN_IN_FULL
- EPN_IN_INT
- EPN_IN_NAK_ERR_EN
- EPN_IN_NAK_ERR_INT
- EPN_IN_NOTKN
- EPN_IN_STALL_EN
- EPN_IN_STALL_INT
- EPN_IPID
- EPN_IPIDCLR
- EPN_ISO
- EPN_ISO_CRC
- EPN_ISO_OR
- EPN_ISO_PIDERR
- EPN_ISO_UR
- EPN_ISTL
- EPN_LDATA
- EPN_MODE
- EPN_MPKT
- EPN_ONAK
- EPN_OPID
- EPN_OPIDCLR
- EPN_OSTL
- EPN_OSTL_EN
- EPN_OUT_EMPTY
- EPN_OUT_EN
- EPN_OUT_END_EN
- EPN_OUT_END_INT
- EPN_OUT_FULL
- EPN_OUT_INT
- EPN_OUT_NAK_ERR_EN
- EPN_OUT_NAK_ERR_INT
- EPN_OUT_NOTKN
- EPN_OUT_NULL_EN
- EPN_OUT_NULL_INT
- EPN_OUT_OR_EN
- EPN_OUT_OR_INT
- EPN_OUT_STALL_EN
- EPN_OUT_STALL_INT
- EPN_OVERSEL
- EPN_STOP_MODE
- EPN_STOP_SET
- EPN_TADR
- EPOD_ID_B2R2_MCDE
- EPOD_ID_ESRAM12
- EPOD_ID_ESRAM34
- EPOD_ID_SGA
- EPOD_ID_SIAMMDSP
- EPOD_ID_SIAPIPE
- EPOD_ID_SVAMMDSP
- EPOD_ID_SVAPIPE
- EPOD_STATE_NO_CHANGE
- EPOD_STATE_OFF
- EPOD_STATE_ON
- EPOD_STATE_ON_CLK_OFF
- EPOD_STATE_RAMRET
- EPOF_BAD_IMG_SIZE
- EPOF_BAD_MAGIC
- EPOF_INTERNAL
- EPOLLERR
- EPOLLET
- EPOLLEXCLUSIVE
- EPOLLEXCLUSIVE_OK_BITS
- EPOLLHUP
- EPOLLIN
- EPOLLINOUT_BITS
- EPOLLMSG
- EPOLLNVAL
- EPOLLONESHOT
- EPOLLOUT
- EPOLLPRI
- EPOLLRDBAND
- EPOLLRDHUP
- EPOLLRDNORM
- EPOLLWAKEUP
- EPOLLWRBAND
- EPOLLWRNORM
- EPOLL_CLOEXEC
- EPOLL_CTL_ADD
- EPOLL_CTL_DEL
- EPOLL_CTL_MOD
- EPOLL_MAXNESTS
- EPOLL_NR_OPS
- EPOLL_PACKED
- EPOUT_EN
- EPOW_MAIN_ENCLOSURE
- EPOW_POWER_OFF
- EPOW_RESET
- EPOW_SENSOR
- EPOW_SENSOR_INDEX
- EPOW_SENSOR_TOKEN
- EPOW_SHUTDOWN_AMBIENT_TEMPERATURE_TOO_HIGH
- EPOW_SHUTDOWN_LOSS_OF_CRITICAL_FUNCTIONS
- EPOW_SHUTDOWN_NORMAL
- EPOW_SHUTDOWN_ON_UPS
- EPOW_SYSTEM_HALT
- EPOW_SYSTEM_SHUTDOWN
- EPOW_WARN_COOLING
- EPOW_WARN_POWER
- EPPADDR
- EPPDATA
- EPPING_ALIGNMENT_PAD
- EPPI_BASE_INTID
- EPPI_RANGE
- EPP_CONVENTIONAL
- EPP_DCDBIT
- EPP_FPGA
- EPP_FPGAEXTSTATUS
- EPP_IRQ_ENABLE
- EPP_LEDS
- EPP_MODEM_ENABLE
- EPP_NRAEF
- EPP_NREF
- EPP_NRHF
- EPP_NTAEF
- EPP_NTEF
- EPP_NTHF
- EPP_PTTBIT
- EPP_RXAEBIT
- EPP_RXEBIT
- EPP_RXHFULL
- EPP_RX_FIFO_ENABLE
- EPP_TX_FIFO_ENABLE
- EPRD_FLAG_END_OF_TBL
- EPREAM
- EPRISR
- EPROBE_DEFER
- EPROCLIM
- EPROM_93c46
- EPROM_93c56
- EPROM_CK_BIT
- EPROM_CMD
- EPROM_CMD_9356SEL
- EPROM_CMD_CONFIG
- EPROM_CMD_LOAD
- EPROM_CMD_NORMAL
- EPROM_CMD_OPERATING_MODE_MASK
- EPROM_CMD_OPERATING_MODE_SHIFT
- EPROM_CMD_PROGRAM
- EPROM_CMD_RESERVED_MASK
- EPROM_CS_BIT
- EPROM_DELAY
- EPROM_DONE
- EPROM_LOAD
- EPROM_PAGE_SIZE
- EPROM_READ
- EPROM_R_BIT
- EPROM_SIZE
- EPROM_TIMEOUT
- EPROM_WRITE
- EPROM_WR_ENABLE
- EPROM_W_BIT
- EPROTO
- EPROTONOSUPPORT
- EPROTOTYPE
- EPSI
- EPSILON
- EPSONFBLEN
- EPSONFBSTART
- EPSONREGLEN
- EPSONREGSTART
- EPSTAT
- EPSTATUS_TIMEOUT
- EPS_BRAND_C3
- EPS_BRAND_C7
- EPS_BRAND_C7D
- EPS_BRAND_C7M
- EPS_BRAND_EDEN
- EPTISR
- EPTP_LIST_ADDRESS
- EPTP_LIST_ADDRESS_HIGH
- EPT_NT_CANT_CREATE
- EPT_NT_CANT_PERFORM_OP
- EPT_NT_INVALID_ENTRY
- EPT_NT_NOT_REGISTERED
- EPT_POINTER
- EPT_POINTERS_CHECK
- EPT_POINTERS_MATCH
- EPT_POINTERS_MISMATCH
- EPT_POINTER_HIGH
- EPT_SHIFT
- EPT_VIOLATION_ACC_INSTR
- EPT_VIOLATION_ACC_INSTR_BIT
- EPT_VIOLATION_ACC_READ
- EPT_VIOLATION_ACC_READ_BIT
- EPT_VIOLATION_ACC_WRITE
- EPT_VIOLATION_ACC_WRITE_BIT
- EPT_VIOLATION_EXECUTABLE
- EPT_VIOLATION_EXECUTABLE_BIT
- EPT_VIOLATION_GVA_TRANSLATED
- EPT_VIOLATION_GVA_TRANSLATED_BIT
- EPT_VIOLATION_READABLE
- EPT_VIOLATION_READABLE_BIT
- EPT_VIOLATION_WRITABLE
- EPT_VIOLATION_WRITABLE_BIT
- EPU
- EPU_CMD_MASK
- EPU_CMD_MASK_DE
- EPU_CMD_MASK_DEBUG
- EPVDBG
- EPXC3_WATCHDOG_CTL_REG
- EPXC3_WATCHDOG_PET_REG
- EPXFERTYPE
- EPXFERTYPE_is_ISO
- EP_2GHZ_20MHZ
- EP_2GHZ_40MHZ
- EP_5GHZ_20MHZ
- EP_5GHZ_40MHZ
- EP_AVAIL0
- EP_AVAIL1
- EP_AVAILABLE
- EP_AVG_TRB_LENGTH
- EP_BBM
- EP_BCSCOUNT
- EP_BLK
- EP_BLK_TYPE
- EP_BOFFSET
- EP_BPKTS
- EP_BREPEAT
- EP_BUFFER_INFO_SIZE
- EP_BUFFER_SIZE
- EP_BUFFER_SUPPORT_VLAN_MAX
- EP_BUFF_STATES
- EP_BULK_IN
- EP_BULK_OUT
- EP_CALL_HELPER
- EP_CFG
- EP_CFG_BUFFERING
- EP_CFG_BUFFERING_MASK
- EP_CFG_ENABLE
- EP_CFG_EPENDIAN
- EP_CFG_EPTYPE
- EP_CFG_EPTYPE_MASK
- EP_CFG_MAXBURST
- EP_CFG_MAXBURST_MASK
- EP_CFG_MAXPKTSIZE
- EP_CFG_MAXPKTSIZE_MASK
- EP_CFG_MULT
- EP_CFG_MULT_MASK
- EP_CFG_SID_CHK
- EP_CFG_STREAM_EN
- EP_CFG_TDL_CHK
- EP_CHECKSUM
- EP_CLAIMED
- EP_CLEARING_TT
- EP_CMD_CSTALL
- EP_CMD_DFLUSH
- EP_CMD_DRDY
- EP_CMD_EPRST
- EP_CMD_ERDY
- EP_CMD_ERDY_SID
- EP_CMD_ERDY_SID_MASK
- EP_CMD_REQ_CMPL
- EP_CMD_SSTALL
- EP_CMD_STDL
- EP_CMD_TDL_GET
- EP_CMD_TDL_MASK
- EP_CMD_TDL_SET
- EP_CONTROL
- EP_CTL_TYPE
- EP_CTRL
- EP_CTRL_INTR
- EP_CTX_CYCLE_MASK
- EP_DATA
- EP_DATA_IN
- EP_DATA_OUT
- EP_DEFERRED_DRDY
- EP_DETACH
- EP_DIR_IN
- EP_DIR_OUT
- EP_DISC_ABORT
- EP_DISC_CLOSE
- EP_DISC_FAIL
- EP_DMA_PROC_RX_IDLE
- EP_DMA_PROC_TX_IDLE
- EP_DONTUSE
- EP_ENABLED
- EP_FAST_INT
- EP_FIFO_BYTE_COUNT
- EP_FIFO_SIZE
- EP_FLAG_RUNNING
- EP_FLAG_STOPPING
- EP_GETTING_NO_STREAMS
- EP_GETTING_STREAMS
- EP_HALTED
- EP_HARD_CLEAR_TOGGLE
- EP_HARD_RESET
- EP_HAS_LSA
- EP_HAS_STREAMS
- EP_HBW
- EP_ID_FOR_TRB
- EP_IEN
- EP_IEN_EP_IN0
- EP_IEN_EP_OUT0
- EP_IN
- EP_INFO
- EP_INITIALIZED
- EP_INREQUEST
- EP_INT
- EP_INTERVAL
- EP_INTERVAL_TO_UFRAMES
- EP_INTR_IN
- EP_INTR_MASK_CLEAR_REG
- EP_INTR_MASK_REG
- EP_INTR_MASK_SET_REG
- EP_INTR_SRC_CLEAR_REG
- EP_INTR_SRC_MASKED_REG
- EP_INTR_SRC_REG
- EP_INTR_SRC_SET_REG
- EP_INT_IN
- EP_INT_TYPE
- EP_IRQENB
- EP_ISO
- EP_ISO_TYPE
- EP_ISTS
- EP_ISTS_EP_IN0
- EP_ISTS_EP_OUT0
- EP_IS_ADDED
- EP_IS_DROPPED
- EP_IS_IMPLEMENTED
- EP_ITEM_COST
- EP_LENGTH
- EP_MASK_SEL
- EP_MAXPKT0
- EP_MAXPKT1
- EP_MAXPSTREAMS
- EP_MAXPSTREAMS_MASK
- EP_MAX_ESIT_PAYLOAD_HI
- EP_MAX_ESIT_PAYLOAD_LO
- EP_MAX_EVENTS
- EP_MAX_LENGTH_TRANSFER
- EP_MAX_NESTS
- EP_MODE_AUTOREQ_ALL_NEOP
- EP_MODE_AUTOREQ_ALWAYS
- EP_MODE_AUTOREQ_NONE
- EP_MODE_DMA_GEN_RNDIS
- EP_MODE_DMA_RNDIS
- EP_MODE_DMA_TRANSPARENT
- EP_MODE_SET
- EP_MODE_SURVIVE_PERST
- EP_MODE_SURVIVE_PERST_SHIFT
- EP_MULT
- EP_NAME_INTEL_VSS
- EP_NAME_SIZE
- EP_NOP
- EP_NUL
- EP_OFFSET
- EP_OUT
- EP_PACKETSIZE
- EP_PAGE_DWORDS
- EP_PAGE_MASK
- EP_PAGE_SIZE
- EP_PARTNER_COMPLETE
- EP_PARTNER_SHARED
- EP_PARTNER_STATUS_MAX
- EP_PARTNER_UNSHARE
- EP_PARTNER_WAITING
- EP_PASS_ON
- EP_PCIEP_RESERVED__PCIEP_RESERVED_MASK
- EP_PCIEP_RESERVED__PCIEP_RESERVED__MASK
- EP_PCIEP_RESERVED__PCIEP_RESERVED__SHIFT
- EP_PCIE_BUS_CNTL__IMMEDIATE_PMI_DIS_MASK
- EP_PCIE_BUS_CNTL__IMMEDIATE_PMI_DIS__MASK
- EP_PCIE_BUS_CNTL__IMMEDIATE_PMI_DIS__SHIFT
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_GEN2_HIDDEN_REG_MASK
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_GEN2_HIDDEN_REG__MASK
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_GEN2_HIDDEN_REG__SHIFT
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_GEN3_HIDDEN_REG_MASK
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_GEN3_HIDDEN_REG__MASK
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_GEN3_HIDDEN_REG__SHIFT
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_GEN4_HIDDEN_REG_MASK
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_GEN4_HIDDEN_REG__SHIFT
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_HIDDEN_REG_MASK
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_HIDDEN_REG__MASK
- EP_PCIE_CFG_CNTL__CFG_EN_DEC_TO_HIDDEN_REG__SHIFT
- EP_PCIE_CNTL__PCIE_MALFORM_ATOMIC_OPS_MASK
- EP_PCIE_CNTL__PCIE_MALFORM_ATOMIC_OPS__MASK
- EP_PCIE_CNTL__PCIE_MALFORM_ATOMIC_OPS__SHIFT
- EP_PCIE_CNTL__RX_IGNORE_LTR_MSG_UR_MASK
- EP_PCIE_CNTL__RX_IGNORE_LTR_MSG_UR__MASK
- EP_PCIE_CNTL__RX_IGNORE_LTR_MSG_UR__SHIFT
- EP_PCIE_CNTL__UR_ERR_REPORT_DIS_MASK
- EP_PCIE_CNTL__UR_ERR_REPORT_DIS__MASK
- EP_PCIE_CNTL__UR_ERR_REPORT_DIS__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F0_TIMER_EXPIRED_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F0_TIMER_EXPIRED__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F0_TIMER_EXPIRED__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F1_TIMER_EXPIRED_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F1_TIMER_EXPIRED__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F1_TIMER_EXPIRED__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F2_TIMER_EXPIRED_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F2_TIMER_EXPIRED__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F2_TIMER_EXPIRED__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F3_TIMER_EXPIRED_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F3_TIMER_EXPIRED__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F3_TIMER_EXPIRED__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F4_TIMER_EXPIRED_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F4_TIMER_EXPIRED__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F4_TIMER_EXPIRED__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F5_TIMER_EXPIRED_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F5_TIMER_EXPIRED__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F5_TIMER_EXPIRED__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F6_TIMER_EXPIRED_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F6_TIMER_EXPIRED__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F6_TIMER_EXPIRED__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F7_TIMER_EXPIRED_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F7_TIMER_EXPIRED__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_F7_TIMER_EXPIRED__SHIFT
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_TIMEOUT_MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_TIMEOUT__MASK
- EP_PCIE_ERR_CNTL__AER_HDR_LOG_TIMEOUT__SHIFT
- EP_PCIE_ERR_CNTL__ERR_REPORTING_DIS_MASK
- EP_PCIE_ERR_CNTL__ERR_REPORTING_DIS__MASK
- EP_PCIE_ERR_CNTL__ERR_REPORTING_DIS__SHIFT
- EP_PCIE_ERR_CNTL__SEND_ERR_MSG_IMMEDIATELY_MASK
- EP_PCIE_ERR_CNTL__SEND_ERR_MSG_IMMEDIATELY__MASK
- EP_PCIE_ERR_CNTL__SEND_ERR_MSG_IMMEDIATELY__SHIFT
- EP_PCIE_ERR_CNTL__STRAP_POISONED_ADVISORY_NONFATAL_MASK
- EP_PCIE_ERR_CNTL__STRAP_POISONED_ADVISORY_NONFATAL__MASK
- EP_PCIE_ERR_CNTL__STRAP_POISONED_ADVISORY_NONFATAL__SHIFT
- EP_PCIE_F0_DPA_CAP__PWR_ALLOC_SCALE_MASK
- EP_PCIE_F0_DPA_CAP__PWR_ALLOC_SCALE__MASK
- EP_PCIE_F0_DPA_CAP__PWR_ALLOC_SCALE__SHIFT
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_UNIT_MASK
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_UNIT__MASK
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_UNIT__SHIFT
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_0_MASK
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_0__MASK
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_0__SHIFT
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_1_MASK
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_1__MASK
- EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_1__SHIFT
- EP_PCIE_F0_DPA_CNTL__DPA_COMPLIANCE_MODE_MASK
- EP_PCIE_F0_DPA_CNTL__DPA_COMPLIANCE_MODE__MASK
- EP_PCIE_F0_DPA_CNTL__DPA_COMPLIANCE_MODE__SHIFT
- EP_PCIE_F0_DPA_CNTL__SUBSTATE_STATUS_MASK
- EP_PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__MASK
- EP_PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT
- EP_PCIE_F0_DPA_LATENCY_INDICATOR__TRANS_LAT_INDICATOR_BITS_MASK
- EP_PCIE_F0_DPA_LATENCY_INDICATOR__TRANS_LAT_INDICATOR_BITS__MASK
- EP_PCIE_F0_DPA_LATENCY_INDICATOR__TRANS_LAT_INDICATOR_BITS__SHIFT
- EP_PCIE_INT_CNTL__CORR_ERR_INT_EN_MASK
- EP_PCIE_INT_CNTL__CORR_ERR_INT_EN__MASK
- EP_PCIE_INT_CNTL__CORR_ERR_INT_EN__SHIFT
- EP_PCIE_INT_CNTL__FATAL_ERR_INT_EN_MASK
- EP_PCIE_INT_CNTL__FATAL_ERR_INT_EN__MASK
- EP_PCIE_INT_CNTL__FATAL_ERR_INT_EN__SHIFT
- EP_PCIE_INT_CNTL__MISC_ERR_INT_EN_MASK
- EP_PCIE_INT_CNTL__MISC_ERR_INT_EN__MASK
- EP_PCIE_INT_CNTL__MISC_ERR_INT_EN__SHIFT
- EP_PCIE_INT_CNTL__NON_FATAL_ERR_INT_EN_MASK
- EP_PCIE_INT_CNTL__NON_FATAL_ERR_INT_EN__MASK
- EP_PCIE_INT_CNTL__NON_FATAL_ERR_INT_EN__SHIFT
- EP_PCIE_INT_CNTL__POWER_STATE_CHG_INT_EN_MASK
- EP_PCIE_INT_CNTL__POWER_STATE_CHG_INT_EN__MASK
- EP_PCIE_INT_CNTL__POWER_STATE_CHG_INT_EN__SHIFT
- EP_PCIE_INT_CNTL__USR_DETECTED_INT_EN_MASK
- EP_PCIE_INT_CNTL__USR_DETECTED_INT_EN__MASK
- EP_PCIE_INT_CNTL__USR_DETECTED_INT_EN__SHIFT
- EP_PCIE_INT_STATUS__CORR_ERR_INT_STATUS_MASK
- EP_PCIE_INT_STATUS__CORR_ERR_INT_STATUS__MASK
- EP_PCIE_INT_STATUS__CORR_ERR_INT_STATUS__SHIFT
- EP_PCIE_INT_STATUS__FATAL_ERR_INT_STATUS_MASK
- EP_PCIE_INT_STATUS__FATAL_ERR_INT_STATUS__MASK
- EP_PCIE_INT_STATUS__FATAL_ERR_INT_STATUS__SHIFT
- EP_PCIE_INT_STATUS__MISC_ERR_INT_STATUS_MASK
- EP_PCIE_INT_STATUS__MISC_ERR_INT_STATUS__MASK
- EP_PCIE_INT_STATUS__MISC_ERR_INT_STATUS__SHIFT
- EP_PCIE_INT_STATUS__NON_FATAL_ERR_INT_STATUS_MASK
- EP_PCIE_INT_STATUS__NON_FATAL_ERR_INT_STATUS__MASK
- EP_PCIE_INT_STATUS__NON_FATAL_ERR_INT_STATUS__SHIFT
- EP_PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS_MASK
- EP_PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS__MASK
- EP_PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS__SHIFT
- EP_PCIE_INT_STATUS__USR_DETECTED_INT_STATUS_MASK
- EP_PCIE_INT_STATUS__USR_DETECTED_INT_STATUS__MASK
- EP_PCIE_INT_STATUS__USR_DETECTED_INT_STATUS__SHIFT
- EP_PCIE_LC_SPEED_CNTL__LC_GEN2_EN_STRAP_MASK
- EP_PCIE_LC_SPEED_CNTL__LC_GEN2_EN_STRAP__MASK
- EP_PCIE_LC_SPEED_CNTL__LC_GEN2_EN_STRAP__SHIFT
- EP_PCIE_LC_SPEED_CNTL__LC_GEN3_EN_STRAP_MASK
- EP_PCIE_LC_SPEED_CNTL__LC_GEN3_EN_STRAP__MASK
- EP_PCIE_LC_SPEED_CNTL__LC_GEN3_EN_STRAP__SHIFT
- EP_PCIE_LC_SPEED_CNTL__LC_GEN4_EN_STRAP_MASK
- EP_PCIE_LC_SPEED_CNTL__LC_GEN4_EN_STRAP__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_ACCEPT_IN_NOND0__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_ACCEPT_IN_NOND0__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_ANY_MSG_TO_ACTIVE__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_ANY_MSG_TO_ACTIVE__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_ERR_TO_ACTIVE__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_ERR_TO_ACTIVE__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_HOSTMEM_TO_ACTIVE__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_HOSTMEM_TO_ACTIVE__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_INTR_TO_ACTIVE__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_INTR_TO_ACTIVE__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_PENDING_REQ_TO_ACTIVE__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_PENDING_REQ_TO_ACTIVE__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_PRIV_DISABLE__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_PRIV_DISABLE__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_SLVCPL_TO_ACTIVE__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_SLVCPL_TO_ACTIVE__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_WAKE_MAX_PULSE_WIDTH__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_WAKE_MAX_PULSE_WIDTH__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_WAKE_MAX_TWO_FALLING_WIDTH__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_WAKE_MAX_TWO_FALLING_WIDTH__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_WAKE_SAMPLING_PERIOD__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_WAKE_SAMPLING_PERIOD__SHIFT
- EP_PCIE_OBFF_CNTL__TX_OBFF_WAKE_SIMPLE_MODE_EN__MASK
- EP_PCIE_OBFF_CNTL__TX_OBFF_WAKE_SIMPLE_MODE_EN__SHIFT
- EP_PCIE_PME_CONTROL__PME_SERVICE_TIMER_MASK
- EP_PCIE_PME_CONTROL__PME_SERVICE_TIMER__MASK
- EP_PCIE_PME_CONTROL__PME_SERVICE_TIMER__SHIFT
- EP_PCIE_RX_CNTL2__RX_IGNORE_EP_INVALIDPASID_UR_MASK
- EP_PCIE_RX_CNTL2__RX_IGNORE_EP_INVALIDPASID_UR__MASK
- EP_PCIE_RX_CNTL2__RX_IGNORE_EP_INVALIDPASID_UR__SHIFT
- EP_PCIE_RX_CNTL__RX_IGNORE_INVALIDPASID_ERR_MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_INVALIDPASID_ERR__MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_INVALIDPASID_ERR__SHIFT
- EP_PCIE_RX_CNTL__RX_IGNORE_MAXPREFIX_ERR_MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_MAXPREFIX_ERR__MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_MAXPREFIX_ERR__SHIFT
- EP_PCIE_RX_CNTL__RX_IGNORE_MAX_PAYLOAD_ERR_MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_MAX_PAYLOAD_ERR__MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_MAX_PAYLOAD_ERR__SHIFT
- EP_PCIE_RX_CNTL__RX_IGNORE_NOT_PASID_UR_MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_NOT_PASID_UR__MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_NOT_PASID_UR__SHIFT
- EP_PCIE_RX_CNTL__RX_IGNORE_SHORTPREFIX_ERR_MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_SHORTPREFIX_ERR__MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_SHORTPREFIX_ERR__SHIFT
- EP_PCIE_RX_CNTL__RX_IGNORE_TC_ERR_MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_TC_ERR__MASK
- EP_PCIE_RX_CNTL__RX_IGNORE_TC_ERR__SHIFT
- EP_PCIE_RX_CNTL__RX_PCIE_CPL_TIMEOUT_DIS_MASK
- EP_PCIE_RX_CNTL__RX_PCIE_CPL_TIMEOUT_DIS__MASK
- EP_PCIE_RX_CNTL__RX_PCIE_CPL_TIMEOUT_DIS__SHIFT
- EP_PCIE_RX_CNTL__RX_TPH_DIS_MASK
- EP_PCIE_RX_CNTL__RX_TPH_DIS__MASK
- EP_PCIE_RX_CNTL__RX_TPH_DIS__SHIFT
- EP_PCIE_SCRATCH__PCIE_SCRATCH_MASK
- EP_PCIE_SCRATCH__PCIE_SCRATCH__MASK
- EP_PCIE_SCRATCH__PCIE_SCRATCH__SHIFT
- EP_PCIE_STRAP_MISC2__STRAP_TPH_SUPPORTED_MASK
- EP_PCIE_STRAP_MISC2__STRAP_TPH_SUPPORTED__MASK
- EP_PCIE_STRAP_MISC2__STRAP_TPH_SUPPORTED__SHIFT
- EP_PCIE_STRAP_MISC__STRAP_MST_ADR64_EN_MASK
- EP_PCIE_STRAP_MISC__STRAP_MST_ADR64_EN__MASK
- EP_PCIE_STRAP_MISC__STRAP_MST_ADR64_EN__SHIFT
- EP_PCIE_TX_CNTL__TX_F0_TPH_DIS_MASK
- EP_PCIE_TX_CNTL__TX_F0_TPH_DIS__MASK
- EP_PCIE_TX_CNTL__TX_F0_TPH_DIS__SHIFT
- EP_PCIE_TX_CNTL__TX_F1_TPH_DIS_MASK
- EP_PCIE_TX_CNTL__TX_F1_TPH_DIS__MASK
- EP_PCIE_TX_CNTL__TX_F1_TPH_DIS__SHIFT
- EP_PCIE_TX_CNTL__TX_F2_TPH_DIS_MASK
- EP_PCIE_TX_CNTL__TX_F2_TPH_DIS__MASK
- EP_PCIE_TX_CNTL__TX_F2_TPH_DIS__SHIFT
- EP_PCIE_TX_CNTL__TX_RO_OVERRIDE_MASK
- EP_PCIE_TX_CNTL__TX_RO_OVERRIDE__MASK
- EP_PCIE_TX_CNTL__TX_RO_OVERRIDE__SHIFT
- EP_PCIE_TX_CNTL__TX_SNR_OVERRIDE_MASK
- EP_PCIE_TX_CNTL__TX_SNR_OVERRIDE__MASK
- EP_PCIE_TX_CNTL__TX_SNR_OVERRIDE__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_DSTATE_USING_WDATA_EN_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_DSTATE_USING_WDATA_EN__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_MSG_DIS_IN_PM_NON_D0_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_MSG_DIS_IN_PM_NON_D0__MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_MSG_DIS_IN_PM_NON_D0__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_LONG_VALUE_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_LONG_VALUE__MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_LONG_VALUE__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_REQUIREMENT_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_REQUIREMENT__MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_REQUIREMENT__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_SHORT_VALUE_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_SHORT_VALUE__MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_NS_SHORT_VALUE__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_RST_LTR_IN_DL_DOWN_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_RST_LTR_IN_DL_DOWN__MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_RST_LTR_IN_DL_DOWN__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_LONG_VALUE_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_LONG_VALUE__MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_LONG_VALUE__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_REQUIREMENT_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_REQUIREMENT__MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_REQUIREMENT__SHIFT
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_SHORT_VALUE_MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_SHORT_VALUE__MASK
- EP_PCIE_TX_LTR_CNTL__LTR_PRIV_S_SHORT_VALUE__SHIFT
- EP_PCIE_TX_LTR_CNTL__TX_CHK_FC_FOR_L1_MASK
- EP_PCIE_TX_LTR_CNTL__TX_CHK_FC_FOR_L1__MASK
- EP_PCIE_TX_LTR_CNTL__TX_CHK_FC_FOR_L1__SHIFT
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_BUS_MASK
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_BUS__MASK
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_BUS__SHIFT
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_DEVICE_MASK
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_DEVICE__MASK
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_DEVICE__SHIFT
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_FUNCTION_MASK
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_FUNCTION__MASK
- EP_PCIE_TX_REQUESTER_ID__TX_REQUESTER_ID_FUNCTION__SHIFT
- EP_PENDING_REQUEST
- EP_PERST_SOURCE_SELECT
- EP_PERST_SOURCE_SELECT_SHIFT
- EP_PRIVATE_BITS
- EP_QUEUE_CURRENT_OFFSET_MASK
- EP_QUEUE_FRINDEX_MASK
- EP_QUEUE_HEAD_IOC
- EP_QUEUE_HEAD_IOS
- EP_QUEUE_HEAD_MAX_PKT_LEN
- EP_QUEUE_HEAD_MAX_PKT_LEN_POS
- EP_QUEUE_HEAD_MULTO
- EP_QUEUE_HEAD_MULT_POS
- EP_QUEUE_HEAD_NEXT_POINTER_MASK
- EP_QUEUE_HEAD_NEXT_TERMINATE
- EP_QUEUE_HEAD_STATUS_ACTIVE
- EP_QUEUE_HEAD_STATUS_HALT
- EP_QUEUE_HEAD_ZLT_SEL
- EP_QUIRK_END_TRANSFER
- EP_QUIRK_EXTRA_BUF_DET
- EP_QUIRK_EXTRA_BUF_EN
- EP_QUIRK_ISO_OUT_EN
- EP_REGS_OUT
- EP_REG_ADDR
- EP_REG_DATA
- EP_REQUEST
- EP_REV
- EP_RING_EMPTY
- EP_RING_FULL
- EP_RING_INDEX
- EP_RING_INDEX_INC
- EP_RING_NUM
- EP_RLZED_INT
- EP_RSPCLR
- EP_RSPSET
- EP_RST
- EP_SEL_B_1_FULL
- EP_SEL_B_2_FULL
- EP_SEL_DIR
- EP_SEL_EPN
- EP_SEL_EPNO
- EP_SEL_EPNO_MASK
- EP_SEL_F
- EP_SEL_PO
- EP_SEL_ST
- EP_SEL_STP
- EP_SETUP_STATUS_EP0
- EP_SETUP_STATUS_MASK
- EP_SLOW_INT
- EP_SOFT_CLEAR_TOGGLE
- EP_SOFT_RESET
- EP_SPEED_FULL
- EP_STALLED
- EP_STALL_PENDING
- EP_STAT0
- EP_STAT1
- EP_STATE_ACQRCONN_COMPL
- EP_STATE_ACQRCONN_START
- EP_STATE_CLEANUP_CMPL
- EP_STATE_CLEANUP_FAILED
- EP_STATE_CLEANUP_START
- EP_STATE_CONNECT_COMPL
- EP_STATE_CONNECT_FAILED
- EP_STATE_CONNECT_START
- EP_STATE_DISABLED
- EP_STATE_DISCONN_COMPL
- EP_STATE_DISCONN_START
- EP_STATE_DISCONN_TIMEDOUT
- EP_STATE_ERROR
- EP_STATE_HALTED
- EP_STATE_IDLE
- EP_STATE_LOGOUT_RESP_RCVD
- EP_STATE_LOGOUT_SENT
- EP_STATE_MASK
- EP_STATE_NACK
- EP_STATE_OFLDCONN_COMPL
- EP_STATE_OFLDCONN_FAILED
- EP_STATE_OFLDCONN_NONE
- EP_STATE_OFLDCONN_START
- EP_STATE_OFLD_COMPL
- EP_STATE_OFLD_FAILED
- EP_STATE_OFLD_FAILED_CID_BUSY
- EP_STATE_OFLD_START
- EP_STATE_PG_OFLD_COMPL
- EP_STATE_PG_OFLD_FAILED
- EP_STATE_PG_OFLD_START
- EP_STATE_RUNNING
- EP_STATE_STALL
- EP_STATE_STOPPED
- EP_STATE_TCP_FIN_RCVD
- EP_STATE_TCP_RST_RCVD
- EP_STATE_ULP_UPDATE_COMPL
- EP_STATE_ULP_UPDATE_FAILED
- EP_STATE_ULP_UPDATE_START
- EP_STATUS
- EP_STAT_CND_ST
- EP_STAT_DA
- EP_STAT_RF_MO
- EP_STAT_ST
- EP_STOP_CMD_PENDING
- EP_STRING
- EP_STS_BUFFEMPTY
- EP_STS_CCS
- EP_STS_DBUSY
- EP_STS_DESCMIS
- EP_STS_EN_DESCMISEN
- EP_STS_EN_IOTEN
- EP_STS_EN_ISOERREN
- EP_STS_EN_MD_EXITEN
- EP_STS_EN_NRDYEN
- EP_STS_EN_OUTSMMEN
- EP_STS_EN_PRIMEEEN
- EP_STS_EN_SETUPEN
- EP_STS_EN_SIDERREN
- EP_STS_EN_STPWAITEN
- EP_STS_EN_STREAMREN
- EP_STS_EN_TRBERREN
- EP_STS_HOSTPP
- EP_STS_IOC
- EP_STS_IOT
- EP_STS_ISOERR
- EP_STS_ISP
- EP_STS_MD_EXIT
- EP_STS_NRDY
- EP_STS_OUTQ_NO
- EP_STS_OUTQ_NO_MASK
- EP_STS_OUTQ_VAL
- EP_STS_OUTQ_VAL_MASK
- EP_STS_OUTSMM
- EP_STS_PRIME
- EP_STS_SETUP
- EP_STS_SID
- EP_STS_SIDERR
- EP_STS_SID_MASK
- EP_STS_SPSMST_DISABLED
- EP_STS_SPSMST_IDLE
- EP_STS_SPSMST_MASK
- EP_STS_SPSMST_MOVE_DATA
- EP_STS_SPSMST_START_STREAM
- EP_STS_STALL
- EP_STS_STPWAIT
- EP_STS_STREAMR
- EP_STS_TRBERR
- EP_SUPPORT_ISO
- EP_SUPPORT_STREAM
- EP_TRADDR_TRADDR
- EP_TRANSFER0
- EP_TRANSFER1
- EP_TRANSFER2
- EP_TRANSFER_STARTED
- EP_TYPE
- EP_TYPE_BULK
- EP_TYPE_INT
- EP_TYPE_ISO
- EP_TYPE_OFF
- EP_UNACTIVE_PTR
- EP_UPDATE_EP_TRBADDR
- EP_WEDGE
- EP_ZERO
- EPdec
- EPecma
- EPeq
- EPgt
- EPlt
- EPxSTATUS_EP_BUSY
- EPxSTATUS_EP_DATAIN
- EPxSTATUS_EP_FULL
- EPxSTATUS_EP_INVALID
- EPxSTATUS_EP_MASK
- EPxSTATUS_EP_READY
- EPxSTATUS_EP_RX_ERR
- EPxSTATUS_EP_STALL
- EPxSTATUS_EP_TX_ERR
- EPxSTATUS_FIFO_DISABLE
- EPxSTATUS_STAGE_ERROR
- EPxSTATUS_SUSPEND
- EPxSTATUS_TOGGLE
- EQAR_IDX
- EQAR_SUCCESS
- EQAR_VB
- EQCR_CARRY
- EQCR_ITHRESH
- EQCR_SHIFT
- EQC_WR_PROHIBIT
- EQE_MAJORCODE_MASK
- EQE_RESID_MASK
- EQE_VALID_MASK
- EQFRM_LEN
- EQL_DEFAULT_MAX_SLAVES
- EQL_DEFAULT_MTU
- EQL_DEFAULT_RESCHED_IVAL
- EQL_DEFAULT_SLAVE_PRIORITY
- EQL_EMANCIPATE
- EQL_ENSLAVE
- EQL_GETMASTRCFG
- EQL_GETSLAVECFG
- EQL_SETMASTRCFG
- EQL_SETSLAVECFG
- EQT
- EQTEMM_OFFSET
- EQUAI1
- EQUAI2
- EQUAI3
- EQUAI4
- EQUAI5
- EQUAI6
- EQUAI7
- EQUAI8
- EQUAL
- EQUALCFG
- EQUALIZER
- EQUALIZER_BAND_0
- EQUALIZER_BAND_1
- EQUALIZER_BAND_2
- EQUALIZER_BAND_3
- EQUALIZER_BAND_4
- EQUALIZER_BAND_5
- EQUALIZER_BAND_6
- EQUALIZER_BAND_7
- EQUALIZER_BAND_8
- EQUALIZER_BAND_9
- EQUALIZER_LONG
- EQUALIZER_SHORT
- EQUALIZER_TRAINING
- EQUAL_READ32
- EQUAL_SPACING
- EQUAL_VTCLOCK
- EQUAQ1
- EQUAQ2
- EQUAQ3
- EQUAQ4
- EQUAQ5
- EQUAQ6
- EQUAQ7
- EQUAQ8
- EQUEUEMASK
- EQUEUESIZE
- EQUIV_TABLE
- EQWR
- EQ_0
- EQ_1
- EQ_2
- EQ_3
- EQ_4
- EQ_5
- EQ_ADDR
- EQ_AIC_MAX_EQD
- EQ_AIC_MIN_EQD
- EQ_ARMED
- EQ_BOOST_GAIN
- EQ_COMM_EXEC__A
- EQ_CONS_IDX_REG_ADDR
- EQ_CTL_EVENT_TYPE_MASK
- EQ_CTL_EVENT_TYPE_SHIFT
- EQ_CTL_READY_MASK
- EQ_CTL_READY_SHIFT
- EQ_DC_GAIN
- EQ_DEPTH_COEFF
- EQ_DESC
- EQ_DESC_CNT_PAGE
- EQ_DESC_MASK
- EQ_DESC_MAX_PAGE
- EQ_DISABLE
- EQ_ENABLE
- EQ_ENTRY_RES_ID_MASK
- EQ_ENTRY_RES_ID_SHIFT
- EQ_ENTRY_VALID_MASK
- EQ_FBEQAB
- EQ_FBEQCD
- EQ_FBEQE
- EQ_HI_PHYS_ADDR_REG
- EQ_IDX
- EQ_INTR
- EQ_INTR_PER_SEC_THRSH_HI
- EQ_INTR_PER_SEC_THRSH_LOW
- EQ_INT_MODE_ALWAYS
- EQ_INT_MODE_ARMED
- EQ_LEN
- EQ_LOG_PG_SZ
- EQ_LO_PHYS_ADDR_REG
- EQ_MAP
- EQ_MAX_CREDIT
- EQ_MAX_PAGES
- EQ_MEM_REGION_SIZE
- EQ_NOT_ARMED
- EQ_NUM_EQES
- EQ_PHASE_FAILED
- EQ_PHASE_FINISHED
- EQ_PRESET_ENUM
- EQ_PRESET_MAX_PARAM_COUNT
- EQ_PROD_IDX_REG_ADDR
- EQ_REG_COMM_EXEC__A
- EQ_REG_COMM_MB__A
- EQ_REG_IS_CLIP_EXP__A
- EQ_REG_IS_GAIN_EXP__A
- EQ_REG_IS_GAIN_MAN__A
- EQ_REG_OFFSET
- EQ_REG_OT_ALPHA__A
- EQ_REG_OT_CONST__A
- EQ_REG_OT_CSI_OFFSET__A
- EQ_REG_OT_CSI_STEP__A
- EQ_REG_OT_QNT_THRES0__A
- EQ_REG_OT_QNT_THRES1__A
- EQ_REG_RC_SEL_CAR_DIV_ON
- EQ_REG_RC_SEL_CAR_INIT
- EQ_REG_RC_SEL_CAR_LOCAL_A_CC
- EQ_REG_RC_SEL_CAR_LOCAL_B_CE
- EQ_REG_RC_SEL_CAR_MEAS_A_CC
- EQ_REG_RC_SEL_CAR_MEAS_B_CE
- EQ_REG_RC_SEL_CAR_PASS_A_CC
- EQ_REG_RC_SEL_CAR_PASS_B_CE
- EQ_REG_RC_SEL_CAR__A
- EQ_REG_SN_CEGAIN__A
- EQ_REG_SN_OFFSET__A
- EQ_REG_TD_REQ_SMB_CNT__A
- EQ_REG_TD_TPS_PWR_OFS__A
- EQ_SET_HW_ELEM_SIZE_VAL
- EQ_SET_HW_PAGE_SIZE_VAL
- EQ_STORE_BAND_IDX
- EQ_STORE_PARAM_IDX
- EQ_TD_TPS_PWR_QAM16_ALPHA1
- EQ_TD_TPS_PWR_QAM16_ALPHA2
- EQ_TD_TPS_PWR_QAM16_ALPHA4
- EQ_TD_TPS_PWR_QAM16_ALPHAN
- EQ_TD_TPS_PWR_QAM64_ALPHA1
- EQ_TD_TPS_PWR_QAM64_ALPHA2
- EQ_TD_TPS_PWR_QAM64_ALPHA4
- EQ_TD_TPS_PWR_QAM64_ALPHAN
- EQ_TD_TPS_PWR_QPSK
- EQ_TD_TPS_PWR_UNKNOWN
- EQ_UNIT
- EQ_X
- EQ_cqe_cnt
- EQ_max_eqe
- EQ_no_entry
- EQ_processed
- ER
- ER0_BMW
- ER0_BSW
- ER0_EPT
- ER0_INTL
- ER0_INTT
- ER0_ISTS
- ER0_LI
- ER1_IAE
- ER1_IAM
- ER1_UPIN
- ER2_BRA
- ER2_BRS
- ER3_BRE
- ER3_BWE
- ER3_LSR
- ERAL
- ERAM_A10
- ERAM_A11
- ERAM_A5
- ERAM_A6
- ERAM_A7
- ERAM_A8
- ERAM_A9
- ERANGE
- ERASE
- ERASED_CW
- ERASED_CW_ECC_MASK
- ERASED_PAGE
- ERASEINFO
- ERASER
- ERASER_DEVICE_ID
- ERASE_64K_OPCODE_MASK
- ERASE_64K_OPCODE_SHIFT
- ERASE_BLOCKSIZE
- ERASE_CHAR
- ERASE_CMD
- ERASE_CONFIRM
- ERASE_EEPROM2
- ERASE_GAP
- ERASE_MARK
- ERASE_OPCODE_MASK
- ERASE_OPCODE_SHIFT
- ERASE_PAGE_COMMAND
- ERASE_SETUP
- ERASE_START_VLD
- ERASE_WAIT_CNT
- ERASE_WAIT_CNT__VALUE
- ERASE_WR_BLK_END
- ERASE_WR_BLK_START
- ERATILX_T_ALL
- ERATILX_T_CLASS0
- ERATILX_T_CLASS1
- ERATILX_T_CLASS2
- ERATILX_T_CLASS3
- ERATILX_T_FULLMATCH
- ERATILX_T_TGS
- ERATILX_T_TID
- ERATIVAX_CLASS_00
- ERATIVAX_CLASS_01
- ERATIVAX_CLASS_10
- ERATIVAX_CLASS_11
- ERATIVAX_PSIZE_16M
- ERATIVAX_PSIZE_1G
- ERATIVAX_PSIZE_1M
- ERATIVAX_PSIZE_4K
- ERATIVAX_PSIZE_64K
- ERATIVAX_RS_IS_ALL
- ERATIVAX_RS_IS_CLASS
- ERATIVAX_RS_IS_FULLMATCH
- ERATIVAX_RS_IS_TID
- ERAT_T
- ERA_MAX_CONCURRENT_LOCKS
- ERBAR_BARRIER_BIT
- ERBAR_RXBARR_MASK
- ERBAR_RXBARR_SHIFT
- ERBAR_VAL
- ERBR_ALIGNMENT
- ERBR_L_RXRINGBASE_MASK
- ERCIR_RXCONSUME_MASK
- ERCR
- ERCSR_DIAG_OFLO
- ERCSR_RX_TMR
- ERCSR_THRESH_MASK
- ERCV
- ERCV_RCV_DISCRD
- ERCV_REG
- ERCV_THRESHOLD
- ERDES0_RX_MAC_ADDR
- ERDES1_BUFFER1_SIZE_MASK
- ERDES1_BUFFER2_SIZE_MASK
- ERDES1_BUFFER2_SIZE_SHIFT
- ERDES1_DISABLE_IC
- ERDES1_END_RING
- ERDES1_SECOND_ADDRESS_CHAINED
- ERDES4_AV_PKT_RCVD
- ERDES4_AV_TAGGED_PKT_RCVD
- ERDES4_IPV4_PKT_RCVD
- ERDES4_IPV6_PKT_RCVD
- ERDES4_IP_CSUM_BYPASSED
- ERDES4_IP_HDR_ERR
- ERDES4_IP_PAYLOAD_ERR
- ERDES4_IP_PAYLOAD_TYPE_MASK
- ERDES4_L3_FILTER_MATCH
- ERDES4_L3_L4_FILT_NO_MATCH_MASK
- ERDES4_L4_FILTER_MATCH
- ERDES4_MSG_TYPE_MASK
- ERDES4_PTP_FRAME_TYPE
- ERDES4_PTP_VER
- ERDES4_TIMESTAMP_DROPPED
- ERDES4_VLAN_TAG_PRI_VAL_MASK
- ERDPTH
- ERDPTL
- ERECALLCONFLICT
- EREFUSED
- EREMCHG
- EREMDEV
- EREMOTE
- EREMOTEIO
- EREMOTERELEASE
- ERESTART
- ERESTARTNOHAND
- ERESTARTNOINTR
- ERESTARTSYS
- ERESTART_RESTARTBLOCK
- ERETSTK
- EREVID
- ERF1
- ERF2
- ERFKILL
- ERFOFF
- ERFON
- ERFSLEEP
- ERF_DD_EVQ_IND_RPTR_FLAGS_LBN
- ERF_DD_EVQ_IND_RPTR_FLAGS_WIDTH
- ERF_DD_EVQ_IND_RPTR_LBN
- ERF_DD_EVQ_IND_RPTR_WIDTH
- ERF_DD_EVQ_IND_TIMER_FLAGS_LBN
- ERF_DD_EVQ_IND_TIMER_FLAGS_WIDTH
- ERF_DD_EVQ_IND_TIMER_MODE_LBN
- ERF_DD_EVQ_IND_TIMER_MODE_WIDTH
- ERF_DD_EVQ_IND_TIMER_VAL_LBN
- ERF_DD_EVQ_IND_TIMER_VAL_WIDTH
- ERF_DZ_EVQ_RPTR_LBN
- ERF_DZ_EVQ_RPTR_VLD_LBN
- ERF_DZ_EVQ_RPTR_VLD_WIDTH
- ERF_DZ_EVQ_RPTR_WIDTH
- ERF_DZ_HW_REV_ID_LBN
- ERF_DZ_HW_REV_ID_WIDTH
- ERF_DZ_ISR_REG_LBN
- ERF_DZ_ISR_REG_WIDTH
- ERF_DZ_MC_DOORBELL_H_LBN
- ERF_DZ_MC_DOORBELL_H_WIDTH
- ERF_DZ_MC_DOORBELL_L_LBN
- ERF_DZ_MC_DOORBELL_L_WIDTH
- ERF_DZ_MC_SFT_STATUS_LBN
- ERF_DZ_MC_SFT_STATUS_WIDTH
- ERF_DZ_RSVD_LBN
- ERF_DZ_RSVD_WIDTH
- ERF_DZ_RX_DESC_WPTR_LBN
- ERF_DZ_RX_DESC_WPTR_WIDTH
- ERF_DZ_TC_TIMER_MODE_LBN
- ERF_DZ_TC_TIMER_MODE_WIDTH
- ERF_DZ_TC_TIMER_VAL_LBN
- ERF_DZ_TC_TIMER_VAL_WIDTH
- ERF_DZ_TX_DESC_HWORD_LBN
- ERF_DZ_TX_DESC_HWORD_WIDTH
- ERF_DZ_TX_DESC_LWORD_LBN
- ERF_DZ_TX_DESC_LWORD_WIDTH
- ERF_DZ_TX_DESC_WPTR_DWORD_LBN
- ERF_DZ_TX_DESC_WPTR_DWORD_WIDTH
- ERF_DZ_TX_DESC_WPTR_LBN
- ERF_DZ_TX_DESC_WPTR_WIDTH
- ERF_FZ_TC_TMR_REL_VAL_LBN
- ERF_FZ_TC_TMR_REL_VAL_WIDTH
- ERG_DPRAM_FILL_SIZE
- ERG_DPRAM_PAGE_SIZE
- ERG_TO_HY_BUF_SIZE
- ERG_TO_PC_BUF_SIZE
- ERI
- ERI1
- ERIAR
- ERIAR_ADDR_BYTE_ALIGN
- ERIAR_ASF
- ERIAR_EXGMAC
- ERIAR_FLAG
- ERIAR_MASK_0001
- ERIAR_MASK_0011
- ERIAR_MASK_0100
- ERIAR_MASK_0101
- ERIAR_MASK_1111
- ERIAR_MASK_SHIFT
- ERIAR_MSIX
- ERIAR_OOB
- ERIAR_READ_CMD
- ERIAR_TYPE_SHIFT
- ERIAR_WRITE_CMD
- ERIDR
- ERING_WAS_FULL
- ERI_COMPONENT_RESET
- ERI_CONTAINMENT_WARN
- ERI_CORR_ERROR_LOG
- ERI_CORR_ERROR_THRESH
- ERI_NOT_ACCESSIBLE
- ERI_NOT_VALID
- ERI_UNCORRECTED_ERROR
- ERL
- ERMP
- EROFS
- EROFS_ALL_FEATURE_INCOMPAT
- EROFS_BLKSIZ
- EROFS_FEATURE_INCOMPAT_LZ4_0PADDING
- EROFS_GET_BLOCKS_RAW
- EROFS_I
- EROFS_INODE_DATALAYOUT_MAX
- EROFS_INODE_FLAT_COMPRESSION
- EROFS_INODE_FLAT_COMPRESSION_LEGACY
- EROFS_INODE_FLAT_INLINE
- EROFS_INODE_FLAT_PLAIN
- EROFS_INODE_LAYOUT_COMPACT
- EROFS_INODE_LAYOUT_EXTENDED
- EROFS_I_BL_XATTR_BIT
- EROFS_I_BL_Z_BIT
- EROFS_I_DATALAYOUT_BIT
- EROFS_I_DATALAYOUT_BITS
- EROFS_I_EA_INITED_BIT
- EROFS_I_SB
- EROFS_I_VERSION_BIT
- EROFS_I_VERSION_BITS
- EROFS_I_Z_INITED_BIT
- EROFS_LOCKED_MAGIC
- EROFS_MAP_FULL_MAPPED
- EROFS_MAP_MAPPED
- EROFS_MAP_META
- EROFS_MAP_ZIPPED
- EROFS_MAX_SHARED_XATTRS
- EROFS_MOUNT_POSIX_ACL
- EROFS_MOUNT_XATTR_USER
- EROFS_NAME_LEN
- EROFS_PCPUBUF_NR_PAGES
- EROFS_SB
- EROFS_SHARED_XATTR_EXTENT
- EROFS_SUPER_MAGIC
- EROFS_SUPER_MAGIC_V1
- EROFS_SUPER_OFFSET
- EROFS_XATTR_ALIGN
- EROFS_XATTR_INDEX_LUSTRE
- EROFS_XATTR_INDEX_POSIX_ACL_ACCESS
- EROFS_XATTR_INDEX_POSIX_ACL_DEFAULT
- EROFS_XATTR_INDEX_SECURITY
- EROFS_XATTR_INDEX_TRUSTED
- EROFS_XATTR_INDEX_USER
- EROFS_ZIP_CACHE_DISABLED
- EROFS_ZIP_CACHE_READAHEAD
- EROFS_ZIP_CACHE_READAROUND
- EROM_EN
- EROUND
- ERPIR_ARM
- ERPIR_RXPRODUCE_MASK
- ERP_BarkerPreambleMode
- ERP_IE_handler
- ERP_INFO_BYTE_OFFSET
- ERP_NonERPpresent
- ERP_UseProtection
- ERR
- ERR0_FBD
- ERR1_FBD
- ERR2_FBD
- ERRADDRH_F2_RD
- ERRADDRH_RD
- ERRADDR_RD
- ERRATA_MIDR_ALL_VERSIONS
- ERRATA_MIDR_RANGE
- ERRATA_MIDR_RANGE_LIST
- ERRATA_MIDR_REV
- ERRATA_MIDR_REV_RANGE
- ERRBITS
- ERRBUF_LEN
- ERRCK
- ERRCMD
- ERRCNT10
- ERRCNT11
- ERRCNT12
- ERRCNT20
- ERRCNT21
- ERRCNT22
- ERRCODE_OFFSET
- ERRCONFIG_ERRMAXLIMIT_SHIFT
- ERRCONFIG_ERRMINLIMIT_SHIFT
- ERRCONFIG_ERRWEIGHT_SHIFT
- ERRCONFIG_MCUACCUMINTEN
- ERRCONFIG_MCUACCUMINTST
- ERRCONFIG_MCUBOUNDINTEN
- ERRCONFIG_MCUBOUNDINTST
- ERRCONFIG_MCUDISACKINTEN
- ERRCONFIG_MCUDISACKINTST
- ERRCONFIG_MCUVALIDINTEN
- ERRCONFIG_MCUVALIDINTST
- ERRCONFIG_STATUS_V1_MASK
- ERRCONFIG_V1
- ERRCONFIG_V2
- ERRCONFIG_VPBOUNDINTEN_V1
- ERRCONFIG_VPBOUNDINTEN_V2
- ERRCONFIG_VPBOUNDINTST_V1
- ERRCONFIG_VPBOUNDINTST_V2
- ERRCTL_L2P
- ERRCTL_PE
- ERRCTL_SPRAM
- ERRCTRL1
- ERRCTRL2
- ERRCTRL_CHN_FAL
- ERRCTRL_CRC_NF
- ERRCTRL_EOC_NF
- ERRCTRL_OVF_NF
- ERRCTRL_PROT_NF
- ERRCTRL_RSP_ERR
- ERRCTRL_RSP_NF
- ERRCTRL_SERR_NF
- ERRDET_CAP
- ERRDET_CTYPE_MASK
- ERRDET_CTYPE_SHIFT
- ERRDET_CV
- ERRDET_LAE
- ERRDET_MCST
- ERRDET_UTID
- ERRDISPLAYTOOSMALL
- ERRDOS
- ERREMOTE
- ERRFLG_T
- ERRFLG_T_BERDOVF
- ERRFLG_T_BERVOVFA
- ERRFLG_T_BERVOVFB
- ERRFLG_T_BERVOVFC
- ERRFLG_T_NERRF
- ERRFLG_T_NERRFA
- ERRFLG_T_NERRFB
- ERRFLG_T_NERRFC
- ERRHASHSZ
- ERRHRD
- ERRINFO_STRUCT
- ERRINTSTATUS
- ERRINTSTATUSMASK
- ERRLOGMASK
- ERRLOG_CMD_REQ
- ERRLOG_CMD_REQ_SIZE
- ERRLOG_CMD_STOP
- ERRLOG_CMD_STOP_SIZE
- ERRLOG_ENTRY_SIZE
- ERRLOG_STATE_OFF
- ERRLOG_STATE_ON
- ERRLOG_STATE_START
- ERRLOG_STATE_STOP
- ERRLOG_TEXT_SIZE
- ERRMASK
- ERRNO_FILTER
- ERRNO_OFFSET
- ERROR
- ERROR0_OBF_WAIT_JIFFIES
- ERRORCODE
- ERRORLENGTH
- ERRORRECOVERYLEVEL
- ERRORS
- ERROR_ADDR_LOG
- ERROR_ADDR_MASK
- ERROR_ADDR_SHFT
- ERROR_ALLOCBSY
- ERROR_APIC_VECTOR
- ERROR_APLIST
- ERROR_AUTH
- ERROR_AUTOWAKE
- ERROR_BADLEN
- ERROR_BINTER
- ERROR_CHECK
- ERROR_CODE
- ERROR_COMMON_CMD
- ERROR_COMMON_INPUT_INIT
- ERROR_COMMON_INPUT_PATH
- ERROR_COMMON_NONE
- ERROR_COMMON_OUTPUT_INIT
- ERROR_COMMON_OUTPUT_PATH
- ERROR_COMMON_PARAMETER
- ERROR_COMMON_SETFILE_ADJUST
- ERROR_COMMON_SETFILE_INDEX
- ERROR_COMMON_SETFILE_LOAD
- ERROR_CONTROL_BYPASS
- ERROR_CONTROL_NONE
- ERROR_COUNT
- ERROR_CTRL
- ERROR_DATA_LENGTH
- ERROR_DATA_LOG
- ERROR_DATA_TYPE
- ERROR_DECODE
- ERROR_DELAY_JIFFIES
- ERROR_DELAY_MS
- ERROR_DESCUNAV
- ERROR_DIVER
- ERROR_DMA_INPUT_BIT_WIDTH
- ERROR_DMA_INPUT_FORMAT
- ERROR_DMA_INPUT_HEIGHT
- ERROR_DMA_INPUT_NONE
- ERROR_DMA_INPUT_ORDER
- ERROR_DMA_INPUT_PLANE
- ERROR_DMA_INPUT_WIDTH
- ERROR_DMA_OUTPUT_BIT_WIDTH
- ERROR_DMA_OUTPUT_FORMAT
- ERROR_DMA_OUTPUT_HEIGHT
- ERROR_DMA_OUTPUT_NONE
- ERROR_DMA_OUTPUT_ORDER
- ERROR_DMA_OUTPUT_PLANE
- ERROR_DMA_OUTPUT_WIDTH
- ERROR_ELEM_SIZE
- ERROR_EPC_OFF
- ERROR_EXT_RESET
- ERROR_FAT_MASK
- ERROR_FD_CONFIG_BLINK_MODE_INVALID
- ERROR_FD_CONFIG_EYES_DETECT_INVALID
- ERROR_FD_CONFIG_MAX_NUMBER_INVALID
- ERROR_FD_CONFIG_MAX_NUMBER_STATE
- ERROR_FD_CONFIG_MOUTH_DETECT_INVALID
- ERROR_FD_CONFIG_ORIENTATION_INVALID
- ERROR_FD_CONFIG_ORIENTATION_STATE
- ERROR_FD_CONFIG_ORIENTATION_VALUE_INVALID
- ERROR_FD_CONFIG_ROLL_ANGLE_INVALID
- ERROR_FD_CONFIG_ROLL_ANGLE_STATE
- ERROR_FD_CONFIG_SMILE_MODE_INVALID
- ERROR_FD_CONFIG_YAW_ANGLE_INVALID
- ERROR_FD_CONFIG_YAW_ANGLE_STATE
- ERROR_FD_MODE
- ERROR_FD_NONE
- ERROR_FD_RESULT
- ERROR_GEN6
- ERROR_GLOBAL_SHOTMODE_NONE
- ERROR_HOP
- ERROR_HSPEC_MASK
- ERROR_HSPEC_SHFT
- ERROR_H_MODULE
- ERROR_IF_NOT_CELL
- ERROR_IF_NOT_STRING
- ERROR_IF_NOT_STRING_LIST
- ERROR_ILLCMD
- ERROR_ILLFMT
- ERROR_INDICATION
- ERROR_INJECT_WHITELIST
- ERROR_INTERRUPTS
- ERROR_INTERRUPT_COMBINED
- ERROR_INTR
- ERROR_INT_RESET
- ERROR_INT_STATUS_ADDRESS
- ERROR_INT_STATUS_RX_UNDERFLOW
- ERROR_INT_STATUS_RX_UNDERFLOW_LSB
- ERROR_INT_STATUS_RX_UNDERFLOW_MASK
- ERROR_INT_STATUS_RX_UNDERFLOW_S
- ERROR_INT_STATUS_TX_OVERFLOW
- ERROR_INT_STATUS_TX_OVERFLOW_LSB
- ERROR_INT_STATUS_TX_OVERFLOW_MASK
- ERROR_INT_STATUS_TX_OVERFLOW_S
- ERROR_INT_STATUS_WAKEUP
- ERROR_INT_STATUS_WAKEUP_LSB
- ERROR_INT_STATUS_WAKEUP_MASK
- ERROR_INT_STATUS_WAKEUP_S
- ERROR_INVALID_REG_ADDRESS
- ERROR_INVALID_REG_VALUE
- ERROR_INVFID
- ERROR_INVFIDTX
- ERROR_INVRID
- ERROR_ISP_ADJUST_NONE
- ERROR_ISP_AFC_NONE
- ERROR_ISP_AF_BUSY
- ERROR_ISP_AF_INVALID_COMMAND
- ERROR_ISP_AF_INVALID_MODE
- ERROR_ISP_AF_NONE
- ERROR_ISP_AWB_NONE
- ERROR_ISP_FLASH_NONE
- ERROR_ISP_IMAGE_EFFECT_NONE
- ERROR_ISP_ISO_NONE
- ERROR_ISP_METERING_NONE
- ERROR_LARGE
- ERROR_LEAP
- ERROR_LOCATION_SIZE
- ERROR_MACADDR
- ERROR_MASK
- ERROR_MAX
- ERROR_MODE
- ERROR_MSK
- ERROR_NDISABL
- ERROR_NF_CORRECTABLE
- ERROR_NF_DIMM_SPARE
- ERROR_NF_MASK
- ERROR_NF_NORTH_CRC
- ERROR_NF_RECOVERABLE
- ERROR_NF_SPD_PROTOCOL
- ERROR_NF_UNCORRECTABLE
- ERROR_NO
- ERROR_NORD
- ERROR_NOT_READY
- ERROR_NOT_SUPPORTED
- ERROR_NOWR
- ERROR_OFFSET
- ERROR_ORDER
- ERROR_OTF_INPUT_BIT_WIDTH
- ERROR_OTF_INPUT_CMD
- ERROR_OTF_INPUT_FORMAT
- ERROR_OTF_INPUT_HEIGHT
- ERROR_OTF_INPUT_NONE
- ERROR_OTF_INPUT_USER_FRAMETIIME
- ERROR_OTF_INPUT_WIDTH
- ERROR_OTF_OUTPUT_BIT_WIDTH
- ERROR_OTF_OUTPUT_FORMAT
- ERROR_OTF_OUTPUT_HEIGHT
- ERROR_OTF_OUTPUT_NONE
- ERROR_OTF_OUTPUT_WIDTH
- ERROR_PACKET
- ERROR_POWER_ON_RESET
- ERROR_PSMODE
- ERROR_QID_G
- ERROR_QID_M
- ERROR_QID_S
- ERROR_QID_VALID_F
- ERROR_QID_VALID_S
- ERROR_QID_VALID_V
- ERROR_QUALIF
- ERROR_RATES
- ERROR_RECAL
- ERROR_RECOVERY_END_OF_RECOVERY
- ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU
- ERROR_RECOVERY_QCFG_RESP_FLAGS_HOST
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_MASK
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SFT
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_BAR0
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_BAR1
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_GRC
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_LAST
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_MASK
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_PCIE_CFG
- ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_SFT
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_MASK
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SFT
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_BAR0
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_BAR1
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_GRC
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_LAST
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_MASK
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_PCIE_CFG
- ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_SFT
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_MASK
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SFT
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_BAR0
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_BAR1
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_GRC
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_LAST
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_MASK
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_PCIE_CFG
- ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_SFT
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_MASK
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SFT
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_BAR0
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_BAR1
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_GRC
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_LAST
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_MASK
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_PCIE_CFG
- ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_SFT
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_MASK
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SFT
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_BAR0
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_BAR1
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_GRC
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_LAST
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_MASK
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_PCIE_CFG
- ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_SFT
- ERROR_RECOVERY_UPDATE_DB
- ERROR_REPORT
- ERROR_RESET
- ERROR_RESPONSE
- ERROR_RETRIES
- ERROR_RETRY_DELAY_MS
- ERROR_RTYPE
- ERROR_RXMODE
- ERROR_SCALER_DMA_OUTSEL
- ERROR_SCALER_FLIP
- ERROR_SCALER_H_RATIO
- ERROR_SCALER_IMAGE_EFFECT
- ERROR_SCALER_NO_NONE
- ERROR_SCALER_ROTATE
- ERROR_SCALER_V_RATIO
- ERROR_SCAN
- ERROR_SENSE
- ERROR_SENSOR_ACTUATOR_INIT_FAIL
- ERROR_SENSOR_I2C_FAIL
- ERROR_SENSOR_INVALID_AF_POS
- ERROR_SENSOR_INVALID_EXPOSURETIME
- ERROR_SENSOR_INVALID_FRAMERATE
- ERROR_SENSOR_INVALID_SETTING
- ERROR_SENSOR_INVALID_SIZE
- ERROR_SENSOR_NONE
- ERROR_SENSOR_UNSUPPORT_AF
- ERROR_SENSOR_UNSUPPORT_FUNC
- ERROR_SENSOR_UNSUPPORT_PERI
- ERROR_SSID
- ERROR_START_OFFSET
- ERROR_STATE
- ERROR_STATUS_ENABLE_ADDRESS
- ERROR_STATUS_ENABLE_RX_UNDERFLOW
- ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB
- ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK
- ERROR_STATUS_ENABLE_RX_UNDERFLOW_S
- ERROR_STATUS_ENABLE_TX_OVERFLOW
- ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB
- ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK
- ERROR_STATUS_ENABLE_TX_OVERFLOW_S
- ERROR_SUCCESS
- ERROR_SUMMARY
- ERROR_SYNDROME
- ERROR_TAGNFND
- ERROR_TESTACT
- ERROR_UNKNOWN_DOMAIN
- ERROR_UNKNOWN_PACKET
- ERROR_VALUE
- ERROR_VECTOR_MAX
- ERROR_WRITES
- ERRSEQ_CTR_INC
- ERRSEQ_SEEN
- ERRSEQ_SHIFT
- ERRSRV
- ERRSTR
- ERRSTR1
- ERRSTR2
- ERRSTR3
- ERRS_PIBP
- ERR_1bit_ECC
- ERR_8712
- ERR_ABRT
- ERR_ADDR_CRC
- ERR_AER
- ERR_ALREADY_BOOT
- ERR_AMNF
- ERR_AND_DBG
- ERR_ASYNC_TIME
- ERR_AUTH_ALG
- ERR_AUTH_ALG_ND
- ERR_AXI
- ERR_BADPAR
- ERR_BAD_DB_PIDX0_F
- ERR_BAD_DB_PIDX0_S
- ERR_BAD_DB_PIDX0_V
- ERR_BAD_DB_PIDX1_F
- ERR_BAD_DB_PIDX1_S
- ERR_BAD_DB_PIDX1_V
- ERR_BAD_DB_PIDX2_F
- ERR_BAD_DB_PIDX2_S
- ERR_BAD_DB_PIDX2_V
- ERR_BAD_DB_PIDX3_F
- ERR_BAD_DB_PIDX3_S
- ERR_BAD_DB_PIDX3_V
- ERR_BAD_DESC
- ERR_BAD_DESC_INT
- ERR_BAD_DX_DIR
- ERR_BAD_STARTUP
- ERR_BDCLAIM_DISK
- ERR_BDCLAIM_MD_DISK
- ERR_BIT
- ERR_BLOCK_ADDR
- ERR_BLOCK_NOT_ERASABLE
- ERR_BLOCK_READ_ONLY
- ERR_BLOCK_TOO_BIG
- ERR_BOARD_DPRAM
- ERR_BOOTIMG_FAIL
- ERR_BOOTSEQ_FAIL
- ERR_BTSTF
- ERR_BUFF_MAX_COPY_SIZE
- ERR_BURST_WRITE
- ERR_BYTE
- ERR_B_OVRN
- ERR_CAST
- ERR_CFG_USE
- ERR_CHANNEL
- ERR_CHECKSUM
- ERR_CHKSUM
- ERR_CHUNK
- ERR_CMDUNK
- ERR_CNT10
- ERR_CNT11
- ERR_CNT12
- ERR_CNT20
- ERR_CNT21
- ERR_CNT22
- ERR_CNTR
- ERR_CNTR_NC
- ERR_CNT_ADDR_A
- ERR_CNT_ADDR_B
- ERR_CNT_CODE_ERR
- ERR_CNT_DISP_ERR
- ERR_CNT_DWS_LOST
- ERR_CNT_INVLD_DW
- ERR_CNT_MASK
- ERR_CNT_REC_MASK
- ERR_CNT_REC_SHIFT
- ERR_CNT_RESET_PROB
- ERR_CNT_RP_MASK
- ERR_CNT_RP_SHIFT
- ERR_CNT_TEC_MASK
- ERR_CNT_TEC_SHIFT
- ERR_CODE_BASE
- ERR_CODE_DIS_TOO_FAR_BACK
- ERR_CODE_ENDPOINT_ERROR
- ERR_CODE_FATAL_ERROR
- ERR_CODE_INCOMPLETE_LEN
- ERR_CODE_INVALID
- ERR_CODE_INVALID_BLOCK_TYPE
- ERR_CODE_INV_DIS_CODE_LEN
- ERR_CODE_INV_LIT_LEN_CODE_LEN
- ERR_CODE_INV_LIT_LEN_DIS_IN_BLK
- ERR_CODE_NO_ERROR
- ERR_CODE_NO_MATCH_ONES_COMP
- ERR_CODE_OVERFLOW_ERROR
- ERR_CODE_RPT_GT_SPEC_LEN
- ERR_CODE_RPT_LEN_NO_FIRST_LEN
- ERR_CODE_SOFT_ERROR
- ERR_CODE_SSM_ERROR
- ERR_CODE_TOO_MANY_LEN_OR_DIS
- ERR_CONF_LONG
- ERR_CONG_NOT_PROTO_A
- ERR_CONNECTED
- ERR_CONTROL
- ERR_CONTROL_EDGE
- ERR_CONT_LP
- ERR_CONT_LP_EDGE
- ERR_COR
- ERR_CORR
- ERR_CORRECTED
- ERR_CORRECTION_INFO
- ERR_CORRECTION_INFO__BYTE
- ERR_CORRECTION_INFO__DEVICE
- ERR_CORRECTION_INFO__LAST_ERR
- ERR_CORRECTION_INFO__UNCOR
- ERR_COR_ID
- ERR_COUNTER
- ERR_COUNT_PKT_0
- ERR_COUNT_PKT_N
- ERR_CPL_EXCEED_IQE_SIZE_F
- ERR_CPL_EXCEED_IQE_SIZE_S
- ERR_CPL_EXCEED_IQE_SIZE_V
- ERR_CPL_OPCODE_0_F
- ERR_CPL_OPCODE_0_S
- ERR_CPL_OPCODE_0_V
- ERR_CPU_MASK_PARSE
- ERR_CRC_ERR
- ERR_CSROW
- ERR_CSUMS_ALG
- ERR_CSUMS_ALG_ND
- ERR_CSUMS_RESYNC_RUNNING
- ERR_DATA_BUFFER_SIZE
- ERR_DATA_CPL_ON_HIGH_QID0_F
- ERR_DATA_CPL_ON_HIGH_QID0_S
- ERR_DATA_CPL_ON_HIGH_QID0_V
- ERR_DATA_CPL_ON_HIGH_QID1_F
- ERR_DATA_CPL_ON_HIGH_QID1_S
- ERR_DATA_CPL_ON_HIGH_QID1_V
- ERR_DATA_CRC
- ERR_DATA_MISSING
- ERR_DATA_NOT_CURRENT
- ERR_DBG
- ERR_DCRC
- ERR_DEC_INVALID_FORMAT
- ERR_DEEP_STATE_ESL_MISMATCH
- ERR_DESC_AXI
- ERR_DESC_DST_INT
- ERR_DESC_SRC_INT
- ERR_DETECTION_DELAY
- ERR_DIF
- ERR_DIFF_SIZE
- ERR_DIF_SIZE_INT
- ERR_DISCARD_IMPOSSIBLE
- ERR_DISCONNECT
- ERR_DISCONNECTED
- ERR_DISCONNECTING
- ERR_DISCONNECT_RECONNECT
- ERR_DISK_CONFIGURED
- ERR_DISK_NOT_BDEV
- ERR_DISK_TOO_SMALL
- ERR_DMA_V
- ERR_DMA_VB
- ERR_DROPPED_DB_F
- ERR_DROPPED_DB_S
- ERR_DROPPED_DB_V
- ERR_DR_PEND_CMND_FULL
- ERR_DR_PEND_DATA_FULL
- ERR_DW_PEND_CMND_FULL
- ERR_DW_PEND_DATA_FULL
- ERR_EA
- ERR_EBADSTATE
- ERR_EBUSY
- ERR_ECC
- ERR_ECMDUNKNOWN
- ERR_ECRC
- ERR_EC_ESL_MISMATCH
- ERR_EC_MASK
- ERR_EFAULT
- ERR_EGR_CTXT_PRIO_F
- ERR_EGR_CTXT_PRIO_S
- ERR_EGR_CTXT_PRIO_V
- ERR_EINPROGRESS
- ERR_EINVAL
- ERR_ELINKDOWN
- ERR_EMAXRES
- ERR_EN
- ERR_ENOMEM
- ERR_ENOTSUPPORTED
- ERR_EOP
- ERR_EOT_WITH_ERR
- ERR_EPERM
- ERR_ESC
- ERR_ESC_EDGE
- ERR_ETIMEDOUT
- ERR_EVENT_BITS
- ERR_EVENT_RING_FULL
- ERR_EXT_SERIAL
- ERR_FATAL
- ERR_FBP_TIMEOUT
- ERR_FIFOOVER
- ERR_FIFO_OVERFLOW
- ERR_FIFO_UNDERFLOW
- ERR_FIXED
- ERR_FLAGS
- ERR_FLAG_ALREADY_LOGGED
- ERR_FLAG_BOOT
- ERR_FLAG_CODE
- ERR_FLAG_CRC
- ERR_FLAG_DES_ADDR
- ERR_FLAG_DRIBBLE
- ERR_FLAG_IP_CHKSUM
- ERR_FLAG_L4_CHKSUM
- ERR_FLAG_LEN
- ERR_FLAG_OV
- ERR_FLAG_RUNT
- ERR_FLAG_TRUNC
- ERR_FLM_DBP_F
- ERR_FLM_DBP_S
- ERR_FLM_DBP_V
- ERR_FLM_HINT_F
- ERR_FLM_HINT_S
- ERR_FLM_HINT_V
- ERR_FLM_IDMA0_F
- ERR_FLM_IDMA0_S
- ERR_FLM_IDMA0_V
- ERR_FLM_IDMA1_F
- ERR_FLM_IDMA1_S
- ERR_FLM_IDMA1_V
- ERR_FPB_TIMEO_INT
- ERR_FRAME
- ERR_GPIO_PIN
- ERR_GS_ERR_INT
- ERR_H
- ERR_HALTED_ON_ERR
- ERR_HDLC_ABORT
- ERR_HDLC_ALIGN
- ERR_HDLC_FCS
- ERR_HDLC_TOO_LONG
- ERR_HDR_DMA_RX_ERR_TYPE_MSK
- ERR_HDR_DMA_RX_ERR_TYPE_OFF
- ERR_HDR_DMA_TX_ERR_TYPE_MSK
- ERR_HDR_DMA_TX_ERR_TYPE_OFF
- ERR_IDLE_HR
- ERR_IDNF
- ERR_IF_CNT_IS_NEGATIVE
- ERR_IF_UNDERRUN
- ERR_ILLEGAL_JUMP
- ERR_ILLEGAL_MODE
- ERR_IMPLICIT_SHRINK
- ERR_ING_CTXT_PRIO_F
- ERR_ING_CTXT_PRIO_S
- ERR_ING_CTXT_PRIO_V
- ERR_INJ_DEBUG
- ERR_INT
- ERR_INTEGRITY_ALG
- ERR_INTEGRITY_ALG_ND
- ERR_INTERVAL_HR
- ERR_INTM
- ERR_INTR
- ERR_INTR_EN_BMI
- ERR_INTR_EN_DMA
- ERR_INTR_EN_FPM
- ERR_INTR_EN_MAC0
- ERR_INTR_EN_MAC1
- ERR_INTR_EN_MAC2
- ERR_INTR_EN_MAC3
- ERR_INTR_EN_MAC4
- ERR_INTR_EN_MAC5
- ERR_INTR_EN_MAC6
- ERR_INTR_EN_MAC7
- ERR_INTR_EN_MAC8
- ERR_INTR_EN_MAC9
- ERR_INTR_EN_MURAM
- ERR_INTR_EN_QMI
- ERR_INTR_SHIFT
- ERR_INTR_START
- ERR_INT_FIFO_UNDERRUN
- ERR_INT_FIFO_UNDERRUN_A
- ERR_INT_FIFO_UNDERRUN_B
- ERR_INT_FIFO_UNDERRUN_C
- ERR_INT_MMIO_UNCLAIMED
- ERR_INT_PIPE_CRC_DONE
- ERR_INT_PIPE_CRC_DONE_A
- ERR_INT_PIPE_CRC_DONE_B
- ERR_INT_PIPE_CRC_DONE_C
- ERR_INT_POISON
- ERR_INVALID_CHKSUM
- ERR_INVALID_CIDX_INC_F
- ERR_INVALID_CIDX_INC_S
- ERR_INVALID_CIDX_INC_V
- ERR_INVALID_CMD_LEN
- ERR_INVALID_DATA_LEN
- ERR_INVALID_MAGIC
- ERR_INVALID_REQUEST
- ERR_INVALID_SIZE
- ERR_INV_CHAN
- ERR_IO_MD_DISK
- ERR_IRQ
- ERR_IRQ_ALL
- ERR_IRQ_ENA
- ERR_IRQ_ENABLE_SET
- ERR_IRQ_ENA_MASK
- ERR_IRQ_MASK
- ERR_IRQ_STATUS
- ERR_KEYOVR
- ERR_LEVEL_NON_FATAL
- ERR_LEVEL_RECOVERABLE_FATAL
- ERR_LEVEL_UNRECOVERABLE_FATAL
- ERR_LINE_TOO_LONG
- ERR_LINE_TOO_SHORT
- ERR_LINE_WRITE
- ERR_LL_MASK
- ERR_LL_SHIFT
- ERR_LOCAL_ADDR
- ERR_LONG_READ
- ERR_MAIN_TIMEOUT
- ERR_MANDATORY_TAG
- ERR_MASK
- ERR_MASK_N
- ERR_MASTER
- ERR_MAX
- ERR_MAX_LEN
- ERR_MAX_RING
- ERR_MC
- ERR_MCR
- ERR_MD_DISK_TOO_SMALL
- ERR_MD_IDX_INVALID
- ERR_MD_INVALID
- ERR_MD_LAYOUT_CONNECTED
- ERR_MD_LAYOUT_NO_FIT
- ERR_MD_LAYOUT_TOO_BIG
- ERR_MD_LAYOUT_TOO_SMALL
- ERR_MD_NOT_BDEV
- ERR_MD_UNCLEAN
- ERR_MINOR_CONFIGURED
- ERR_MINOR_INVALID
- ERR_MINOR_OR_VOLUME_EXISTS
- ERR_MISSING_DATA
- ERR_MISSING_EOT
- ERR_MISSING_HSYNC
- ERR_MISSING_VSYNC
- ERR_MORE_ECC
- ERR_MREF
- ERR_MSG
- ERR_MULTI_SCAN
- ERR_NEED_ALLOW_TWO_PRI
- ERR_NEED_APV_100
- ERR_NEED_APV_93
- ERR_NET_CONFIGURED
- ERR_NO
- ERR_NODE
- ERR_NOMEM
- ERR_NOMEM_BITMAP
- ERR_NONE
- ERR_NONFATAL
- ERR_NORM_ADDR
- ERR_NOTHANDLED
- ERR_NOTIFY_ENUM_DIR
- ERR_NOT_BOOTED
- ERR_NOT_ENOUGH_LINE
- ERR_NOT_PROTO_C
- ERR_NO_DISK
- ERR_NO_PKT_END
- ERR_NO_PRIMARY
- ERR_NO_TE
- ERR_ON_RX_PHASE
- ERR_ON_TX_PHASE
- ERR_OPEN_DISK
- ERR_OPEN_MD_DISK
- ERR_OVER
- ERR_OVERRUN
- ERR_OVERSIZE
- ERR_PACKET_NR
- ERR_PAGEFAULT
- ERR_PAGE_ADDR
- ERR_PARAMETER_MISSING
- ERR_PARITY
- ERR_PAUSE_IS_CLEAR
- ERR_PAUSE_IS_SET
- ERR_PCIE_ERROR0_F
- ERR_PCIE_ERROR0_S
- ERR_PCIE_ERROR0_V
- ERR_PCIE_ERROR1_F
- ERR_PCIE_ERROR1_S
- ERR_PCIE_ERROR1_V
- ERR_PCIE_ERROR2_F
- ERR_PCIE_ERROR2_S
- ERR_PCIE_ERROR2_V
- ERR_PCIE_ERROR3_F
- ERR_PCIE_ERROR3_S
- ERR_PCIE_ERROR3_V
- ERR_PEER_ADDR
- ERR_PERM
- ERR_PIC_AFTER_DEP
- ERR_PIC_PEER_DEP
- ERR_PID
- ERR_PK_LIMIT
- ERR_POF_TIMEOUT
- ERR_PROT
- ERR_PTR
- ERR_RD_ERR_INT
- ERR_RD_TIMEO_INT
- ERR_READ_DATA_AXI
- ERR_READ_DMA
- ERR_RECEIVE
- ERR_RECOVERY_DETECTION_DELAY
- ERR_RECOVERY_IDLE_TIME
- ERR_RECOVERY_INTERVAL
- ERR_RECOVERY_MAX_RETRY_COUNT
- ERR_RECOVERY_RETRY_DELAY
- ERR_RECOVERY_ST_DETECT
- ERR_RECOVERY_ST_NONE
- ERR_RECOVERY_ST_PRE_POLL
- ERR_RECOVERY_ST_REINIT
- ERR_RECOVERY_ST_RESET
- ERR_RECOVERY_UE_DETECT_DURATION
- ERR_RES
- ERR_RESIZE_RESYNC
- ERR_RESYNC_AFTER
- ERR_RESYNC_AFTER_CYCLE
- ERR_RES_IN_USE
- ERR_RES_NOT_KNOWN
- ERR_RFIFO_OVF_INT
- ERR_RING_CLOSED
- ERR_RING_OPEN
- ERR_RST_REQB_MARK
- ERR_RUN_COMMAND_EXEC
- ERR_RUN_COMMAND_FORK
- ERR_RUN_COMMAND_PIPE
- ERR_RUN_COMMAND_WAITPID
- ERR_RUN_COMMAND_WAITPID_NOEXIT
- ERR_RUN_COMMAND_WAITPID_SIGNAL
- ERR_RUN_COMMAND_WAITPID_WRONG_PID
- ERR_RXFREE_Q_EMPTY
- ERR_RX_INFO_FULL
- ERR_SCSIRESET
- ERR_SCT_GAT_LEN
- ERR_SECTION_OVERFLOW
- ERR_SEQERR
- ERR_SET_REG
- ERR_SHUTDOWN
- ERR_SMALL_HEIGHT
- ERR_SMALL_LEN
- ERR_STACK_SIZE_BYTES
- ERR_STAT
- ERR_STAT0_ADDR_SHFT
- ERR_STATIC
- ERR_STATUS
- ERR_STAT_REG
- ERR_STK_ADDR_SHFT
- ERR_STONITH_AND_PROT_A
- ERR_STRING_SZ
- ERR_STS
- ERR_STS_ALERR_
- ERR_STS_ALIGN_ERR
- ERR_STS_COLLISION_ERR
- ERR_STS_DRP
- ERR_STS_ECERR_
- ERR_STS_FCS_ERR
- ERR_STS_FERR_
- ERR_STS_FIC
- ERR_STS_FIF
- ERR_STS_FIU
- ERR_STS_FOC
- ERR_STS_FOF
- ERR_STS_FOU
- ERR_STS_FOW
- ERR_STS_LERR_
- ERR_STS_LFRM_ERR
- ERR_STS_LOC_SHIFT
- ERR_STS_MA
- ERR_STS_MCH
- ERR_STS_MOF
- ERR_STS_MPE
- ERR_STS_NIF
- ERR_STS_NOF
- ERR_STS_RFERR_
- ERR_STS_RUNT_ERR
- ERR_STS_SCE
- ERR_STS_STE
- ERR_STS_TA
- ERR_STS_UE
- ERR_STS_URERR_
- ERR_STS_URUN_ERR
- ERR_STS_WAR_ADDR
- ERR_STS_WAR_PHYSADDR
- ERR_STS_WAR_REGISTER
- ERR_STS_XGP
- ERR_SUCCESS
- ERR_SYND
- ERR_SYNESC
- ERR_SYN_ESC_EDGE
- ERR_SYS
- ERR_SYS_MASK
- ERR_SYS_SHIFT
- ERR_TERM
- ERR_TE_MISS
- ERR_TGL
- ERR_TIMER_NO_FREE
- ERR_TIMER_QUEUE_EMPTY
- ERR_TIMER_QUEUE_FULL
- ERR_TIMOUT
- ERR_TK0NF
- ERR_TMO
- ERR_TOO_MANG_LINES
- ERR_TX_INFO_FULL
- ERR_TX_INT_PARITY
- ERR_TYPE_BUS
- ERR_TYPE_CACHE
- ERR_TYPE_KERNEL_PANIC
- ERR_TYPE_KERNEL_PANIC_GZ
- ERR_TYPE_MASK
- ERR_TYPE_MS
- ERR_TYPE_RTAS_LOG
- ERR_TYPE_TLB
- ERR_UEPKT
- ERR_UNC
- ERR_UNCORRECTABLE
- ERR_UNCORRECTED
- ERR_UNCOR_ID
- ERR_UNDECODABLE
- ERR_UNDER
- ERR_UNDERRUN
- ERR_UNEXPDISC
- ERR_UNIMPLEMENTED
- ERR_UNKNOWN
- ERR_UNKNOWN_CMD
- ERR_UNKNOWN_MBOX
- ERR_UNPEND_FULL
- ERR_UNWANTED_READ
- ERR_VERIFY_ALG
- ERR_VERIFY_ALG_ND
- ERR_VERIFY_RUNNING
- ERR_VERS
- ERR_VRS_WRONG_LEN
- ERR_WFIFO_OVF_INT
- ERR_WRITE_DATA_AXI
- ERR_WRITE_DMA
- ERR_WRONG_LENGTH
- ERR_WR_ERR_INT
- ERR_WR_TIMEO_INT
- ERR_ZONE
- ERR_enum
- ERR_getErrorCode
- ERR_isError
- ERRaccess
- ERRaccountexpired
- ERRalreadyexists
- ERRbadBID
- ERRbadLink
- ERRbadLogonTime
- ERRbadPID
- ERRbadaccess
- ERRbadclient
- ERRbaddata
- ERRbaddrive
- ERRbadenv
- ERRbadfid
- ERRbadfile
- ERRbadformat
- ERRbadfunc
- ERRbadmcb
- ERRbadmem
- ERRbadpath
- ERRbadpermits
- ERRbadpipe
- ERRbadpw
- ERRbadshare
- ERRbadtype
- ERRbaduid
- ERRcancelviolation
- ERRdiffdevice
- ERRdirnotempty
- ERRdiskfull
- ERReasnotsupported
- ERRerror
- ERRfilespecs
- ERRfilexists
- ERRgeneral
- ERRinvdevice
- ERRinvlevel
- ERRinvname
- ERRinvnetname
- ERRinvparm
- ERRinvpfid
- ERRinvtid
- ERRlock
- ERRmoredata
- ERRmsgoff
- ERRnetlogonNotStarted
- ERRnoSuchUser
- ERRnoaccess
- ERRnofids
- ERRnofiles
- ERRnomem
- ERRnoresource
- ERRnoroom
- ERRnosuchshare
- ERRnosupport
- ERRnotconnected
- ERRnotlocked
- ERRpasswordExpired
- ERRpaused
- ERRpipebusy
- ERRpipeclosing
- ERRqeof
- ERRqfull
- ERRqtoobig
- ERRremcd
- ERRrmuns
- ERRsetattrmode
- ERRsmbcmd
- ERRsrverror
- ERRsymlink
- ERRtimeout
- ERRtoomanyuids
- ERRunsup
- ERRusempx
- ERRusestd
- ERRwriteprot
- ERSE_WR_DISABLE
- ERSE_WR_ENBL
- ERSN
- ERSPAN_ENCAP_8021Q
- ERSPAN_ENCAP_INFRAME
- ERSPAN_ENCAP_ISL
- ERSPAN_ENCAP_NOVLAN
- ERSPAN_V1_MDSIZE
- ERSPAN_V2_MDSIZE
- ERSPAN_VERSION
- ERSPAN_VERSION2
- ERSR
- ERST_DBG_PFX
- ERST_DBG_RECORD_LEN_MAX
- ERST_DESI_MASK
- ERST_EHB
- ERST_ENTRIES
- ERST_NUM_SEGS
- ERST_PTR_MASK
- ERST_RANGE_NVRAM
- ERST_RANGE_RESERVED
- ERST_RANGE_SLOW
- ERST_RECORD_ID_CACHE_SIZE_MAX
- ERST_RECORD_ID_CACHE_SIZE_MIN
- ERST_SIZE
- ERST_SIZE_MASK
- ERST_STATUS_FAILED
- ERST_STATUS_HARDWARE_NOT_AVAILABLE
- ERST_STATUS_NOT_ENOUGH_SPACE
- ERST_STATUS_RECORD_NOT_FOUND
- ERST_STATUS_RECORD_STORE_EMPTY
- ERST_STATUS_SUCCESS
- ERST_TAB_ENTRY
- ERS_CMP
- ERS_FAIL
- ERTB_MEMLIST
- ERTF_MEMLIST
- ERTR_CNT_MASK
- ERT_TYPEMASK
- ERT_ZORROII
- ERT_ZORROIII
- ERXBUF_BADPKT
- ERXBUF_BROADCAST
- ERXBUF_BYTECNT_MASK
- ERXBUF_BYTECNT_SHIFT
- ERXBUF_CARRIER
- ERXBUF_CODERR
- ERXBUF_CRCERR
- ERXBUF_FRAMERR
- ERXBUF_GOODPKT
- ERXBUF_HILEN
- ERXBUF_INVPREAMB
- ERXBUF_IPCKSUM_MASK
- ERXBUF_LOLEN
- ERXBUF_LONGEVENT
- ERXBUF_MULTICAST
- ERXBUF_V
- ERXDATA
- ERXFCON
- ERXFCON_ANDOR
- ERXFCON_BCEN
- ERXFCON_CRCEN
- ERXFCON_HTEN
- ERXFCON_MCEN
- ERXFCON_MPEN
- ERXFCON_PMEN
- ERXFCON_UCEN
- ERXHEAD
- ERXNDH
- ERXNDL
- ERXRDPT
- ERXRDPTH
- ERXRDPTL
- ERXST
- ERXSTH
- ERXSTL
- ERXST_VAL
- ERXTAIL
- ERXWM
- ERXWRPT
- ERXWRPTH
- ERXWRPTL
- ERX_BPTR
- ERX_CFG
- ERX_CFG_BYTEOFFSET
- ERX_CFG_CSUMSTART
- ERX_CFG_DEFAULT
- ERX_CFG_DMAENABLE
- ERX_CFG_RESV1
- ERX_CFG_RESV2
- ERX_CFG_RESV3
- ERX_CFG_SIZE128
- ERX_CFG_SIZE256
- ERX_CFG_SIZE32
- ERX_CFG_SIZE64
- ERX_FIFORPTR
- ERX_FIFOSRPTR
- ERX_FIFOSWPTR
- ERX_FIFOWPTR
- ERX_REG_SIZE
- ERX_RING
- ERX_SMACHINE
- ER_ADD
- ER_BAD
- ER_CI
- ER_DATA_OVERUN
- ER_DATA_UNDERUN
- ER_DD_EVQ_INDIRECT
- ER_DZ_BIU_HW_REV_ID
- ER_DZ_BIU_INT_ISR
- ER_DZ_BIU_MC_SFT_STATUS
- ER_DZ_BIU_MC_SFT_STATUS_ROWS
- ER_DZ_BIU_MC_SFT_STATUS_STEP
- ER_DZ_EVQ_RPTR
- ER_DZ_EVQ_RPTR_ROWS
- ER_DZ_EVQ_RPTR_STEP
- ER_DZ_EVQ_TMR
- ER_DZ_EVQ_TMR_ROWS
- ER_DZ_EVQ_TMR_STEP
- ER_DZ_MC_DB_HWRD
- ER_DZ_MC_DB_LWRD
- ER_DZ_RX_DESC_UPD
- ER_DZ_RX_DESC_UPD_ROWS
- ER_DZ_RX_DESC_UPD_STEP
- ER_DZ_TX_DESC_UPD
- ER_DZ_TX_DESC_UPD_DWORD
- ER_DZ_TX_DESC_UPD_ROWS
- ER_DZ_TX_DESC_UPD_STEP
- ER_DZ_TX_PIOBUF
- ER_DZ_TX_PIOBUF_SIZE
- ER_ENABLE
- ER_END
- ER_EROMENTRY
- ER_IRQ_CLEAR
- ER_IRQ_COUNTER_MASK
- ER_IRQ_DISABLE
- ER_IRQ_ENABLE
- ER_IRQ_INTERVAL_MASK
- ER_IRQ_PENDING
- ER_ITCR
- ER_ITIP
- ER_MASTERSELECT
- ER_MP
- ER_REMAPCONTROL
- ER_REMAPSELECT
- ER_TAG
- ER_TAG1
- ER_VALID
- ERegister
- ES
- ES1370_CONTROLS
- ES1371REV_CT5880_A
- ES1371REV_ES1371_B
- ES1371REV_ES1373_8
- ES1371REV_ES1373_A
- ES1371REV_ES1373_B
- ES1371_SPDIF
- ES1688P
- ES1688_AUX_DEV
- ES1688_CD_DEV
- ES1688_DOUBLE
- ES1688_DSP_CMD_DMAOFF
- ES1688_DSP_CMD_DMAON
- ES1688_DSP_CMD_SPKOFF
- ES1688_DSP_CMD_SPKON
- ES1688_FM_DEV
- ES1688_HW_1688
- ES1688_HW_688
- ES1688_HW_AUTO
- ES1688_HW_UNDEF
- ES1688_INIT_TABLE_SIZE
- ES1688_LINE_DEV
- ES1688_MASTER_DEV
- ES1688_MIC_DEV
- ES1688_MIXS_AOUT
- ES1688_MIXS_CD
- ES1688_MIXS_LINE
- ES1688_MIXS_MASK
- ES1688_MIXS_MASTER
- ES1688_MIXS_MIC
- ES1688_MIXS_MIC1
- ES1688_MIXS_MIC_MASTER
- ES1688_MIXS_MUTE
- ES1688_MIXS_REC_MIX
- ES1688_PCM_DEV
- ES1688_RECLEV_DEV
- ES1688_REC_DEV
- ES1688_SINGLE
- ES1688_SPEAKER_DEV
- ES18XX_AUXB
- ES18XX_CONTROL
- ES18XX_DOUBLE
- ES18XX_DUPLEX_MONO
- ES18XX_DUPLEX_SAME
- ES18XX_FL_INVERT
- ES18XX_FL_PMPORT
- ES18XX_GPO_2BIT
- ES18XX_HWV
- ES18XX_I2S
- ES18XX_MONO
- ES18XX_MUTEREC
- ES18XX_NEW_RATE
- ES18XX_PCM2
- ES18XX_PM
- ES18XX_PM_ANA
- ES18XX_PM_FM
- ES18XX_PM_GPO0
- ES18XX_PM_GPO1
- ES18XX_PM_PDR
- ES18XX_PM_SUS
- ES18XX_RECMIX
- ES18XX_SINGLE
- ES18XX_SPATIALIZER
- ES1938_DMA_SIZE
- ES1938_DOUBLE
- ES1938_DOUBLE_TLV
- ES1938_PM_OPS
- ES1938_SINGLE
- ES1938_SINGLE_TLV
- ES1968_PM_OPS
- ES2_APB_CDSI0_CPORT
- ES2_APB_CDSI1_CPORT
- ES2_ARPC_CPORT_TIMEOUT
- ES2_CPORT_CDSI0
- ES2_CPORT_CDSI1
- ES2_GBUF_MSG_SIZE_MAX
- ES2_USB_CTRL_TIMEOUT
- ES8316_ADC_ALC1
- ES8316_ADC_ALC2
- ES8316_ADC_ALC3
- ES8316_ADC_ALC4
- ES8316_ADC_ALC5
- ES8316_ADC_ALC_NG
- ES8316_ADC_D2SEPGA
- ES8316_ADC_DMIC
- ES8316_ADC_MUTE
- ES8316_ADC_PDN_LINSEL
- ES8316_ADC_PGAGAIN
- ES8316_ADC_VOLUME
- ES8316_CAL_HPLIV
- ES8316_CAL_HPLMV
- ES8316_CAL_HPRIV
- ES8316_CAL_HPRMV
- ES8316_CAL_SET
- ES8316_CAL_TYPE
- ES8316_CLKMGR_ADCDIV1
- ES8316_CLKMGR_ADCDIV2
- ES8316_CLKMGR_ADCOSR
- ES8316_CLKMGR_CLKSEL
- ES8316_CLKMGR_CLKSW
- ES8316_CLKMGR_CLKSW_BCLK_ON
- ES8316_CLKMGR_CLKSW_MCLK_ON
- ES8316_CLKMGR_CPDIV
- ES8316_CLKMGR_DACDIV1
- ES8316_CLKMGR_DACDIV2
- ES8316_CPHP_ICAL_VOL
- ES8316_CPHP_LDOCTL
- ES8316_CPHP_OUTEN
- ES8316_CPHP_PDN1
- ES8316_CPHP_PDN2
- ES8316_DAC_PDN
- ES8316_DAC_SET1
- ES8316_DAC_SET2
- ES8316_DAC_SET3
- ES8316_DAC_VOLL
- ES8316_DAC_VOLR
- ES8316_FORMATS
- ES8316_GPIO_DEBOUNCE
- ES8316_GPIO_ENABLE_INTERRUPT
- ES8316_GPIO_FLAG
- ES8316_GPIO_FLAG_GM_NOT_SHORTED
- ES8316_GPIO_FLAG_HP_NOT_INSERTED
- ES8316_GPIO_SEL
- ES8316_HPMIX_PDN
- ES8316_HPMIX_SEL
- ES8316_HPMIX_SWITCH
- ES8316_HPMIX_VOL
- ES8316_RESET
- ES8316_RESET_CSM_ON
- ES8316_SERDATA1
- ES8316_SERDATA1_BCLK_INV
- ES8316_SERDATA1_MASTER
- ES8316_SERDATA2_ADCLRP
- ES8316_SERDATA2_FMT_I2S
- ES8316_SERDATA2_FMT_LEFTJ
- ES8316_SERDATA2_FMT_MASK
- ES8316_SERDATA2_FMT_PCM
- ES8316_SERDATA2_FMT_RIGHTJ
- ES8316_SERDATA2_LEN_16
- ES8316_SERDATA2_LEN_18
- ES8316_SERDATA2_LEN_20
- ES8316_SERDATA2_LEN_24
- ES8316_SERDATA2_LEN_32
- ES8316_SERDATA2_LEN_MASK
- ES8316_SERDATA_ADC
- ES8316_SERDATA_DAC
- ES8316_SYS_LP1
- ES8316_SYS_LP2
- ES8316_SYS_PDN
- ES8316_SYS_REF
- ES8316_SYS_VMIDLOW
- ES8316_SYS_VMIDSEL
- ES8316_SYS_VSEL
- ES8316_TEST1
- ES8316_TEST2
- ES8316_TEST3
- ES8316_TESTMODE
- ES8328_1024FS
- ES8328_128FS
- ES8328_1536FS
- ES8328_256FS
- ES8328_384FS
- ES8328_512FS
- ES8328_768FS
- ES8328_ADCCONTROL1
- ES8328_ADCCONTROL10
- ES8328_ADCCONTROL11
- ES8328_ADCCONTROL12
- ES8328_ADCCONTROL13
- ES8328_ADCCONTROL14
- ES8328_ADCCONTROL2
- ES8328_ADCCONTROL3
- ES8328_ADCCONTROL4
- ES8328_ADCCONTROL4_ADCFORMAT_I2S
- ES8328_ADCCONTROL4_ADCFORMAT_LJUST
- ES8328_ADCCONTROL4_ADCFORMAT_MASK
- ES8328_ADCCONTROL4_ADCFORMAT_PCM
- ES8328_ADCCONTROL4_ADCFORMAT_RJUST
- ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV
- ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL
- ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK1
- ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK2
- ES8328_ADCCONTROL4_ADCWL_MASK
- ES8328_ADCCONTROL4_ADCWL_SHIFT
- ES8328_ADCCONTROL5
- ES8328_ADCCONTROL5_RATEMASK
- ES8328_ADCCONTROL6
- ES8328_ADCCONTROL7
- ES8328_ADCCONTROL7_ADC_LER
- ES8328_ADCCONTROL7_ADC_MUTE
- ES8328_ADCCONTROL7_ADC_RAMP_RATE_16
- ES8328_ADCCONTROL7_ADC_RAMP_RATE_32
- ES8328_ADCCONTROL7_ADC_RAMP_RATE_4
- ES8328_ADCCONTROL7_ADC_RAMP_RATE_8
- ES8328_ADCCONTROL7_ADC_SOFT_RAMP
- ES8328_ADCCONTROL7_ADC_ZERO_CROSS
- ES8328_ADCCONTROL8
- ES8328_ADCCONTROL9
- ES8328_ADCPOWER
- ES8328_ADCPOWER_ADCL_OFF
- ES8328_ADCPOWER_ADCR_OFF
- ES8328_ADCPOWER_ADC_BIAS_GEN_OFF
- ES8328_ADCPOWER_AINL_OFF
- ES8328_ADCPOWER_AINR_OFF
- ES8328_ADCPOWER_FLASH_ADC_LOWPOWER
- ES8328_ADCPOWER_INT1_LOWPOWER
- ES8328_ADCPOWER_MIC_BIAS_OFF
- ES8328_ANAVOLMANAG
- ES8328_CHIPLOPOW1
- ES8328_CHIPLOPOW2
- ES8328_CHIPPOWER
- ES8328_CHIPPOWER_ADCDIG_OFF
- ES8328_CHIPPOWER_ADCDLL_OFF
- ES8328_CHIPPOWER_ADCSTM_RESET
- ES8328_CHIPPOWER_ADCVREF_OFF
- ES8328_CHIPPOWER_DACDIG_OFF
- ES8328_CHIPPOWER_DACDLL_OFF
- ES8328_CHIPPOWER_DACSTM_RESET
- ES8328_CHIPPOWER_DACVREF_OFF
- ES8328_CONTROL1
- ES8328_CONTROL1_DACMCLK_ADC
- ES8328_CONTROL1_DACMCLK_DAC
- ES8328_CONTROL1_ENREF
- ES8328_CONTROL1_LRCM
- ES8328_CONTROL1_SAMEFS
- ES8328_CONTROL1_SCP_RESET
- ES8328_CONTROL1_SEQEN
- ES8328_CONTROL1_VMIDSEL_500k
- ES8328_CONTROL1_VMIDSEL_50k
- ES8328_CONTROL1_VMIDSEL_5k
- ES8328_CONTROL1_VMIDSEL_MASK
- ES8328_CONTROL1_VMIDSEL_OFF
- ES8328_CONTROL2
- ES8328_CONTROL2_ANALOG_OFF
- ES8328_CONTROL2_IBIASGEN_OFF
- ES8328_CONTROL2_OVERCURRENT_ON
- ES8328_CONTROL2_THERMAL_SHUTDOWN_ON
- ES8328_CONTROL2_VCM_MOD_LOWPOWER
- ES8328_CONTROL2_VREF_BUF_LOWPOWER
- ES8328_CONTROL2_VREF_BUF_OFF
- ES8328_CONTROL2_VREF_LOWPOWER
- ES8328_DACCONTROL1
- ES8328_DACCONTROL10
- ES8328_DACCONTROL11
- ES8328_DACCONTROL12
- ES8328_DACCONTROL13
- ES8328_DACCONTROL14
- ES8328_DACCONTROL15
- ES8328_DACCONTROL16
- ES8328_DACCONTROL16_LMIXSEL_LADC
- ES8328_DACCONTROL16_LMIXSEL_LIN1
- ES8328_DACCONTROL16_LMIXSEL_LIN2
- ES8328_DACCONTROL16_LMIXSEL_LIN3
- ES8328_DACCONTROL16_RMIXSEL_RADC
- ES8328_DACCONTROL16_RMIXSEL_RIN1
- ES8328_DACCONTROL16_RMIXSEL_RIN2
- ES8328_DACCONTROL16_RMIXSEL_RIN3
- ES8328_DACCONTROL17
- ES8328_DACCONTROL17_LD2LO
- ES8328_DACCONTROL17_LI2LO
- ES8328_DACCONTROL17_LI2LOVOL
- ES8328_DACCONTROL18
- ES8328_DACCONTROL18_RD2LO
- ES8328_DACCONTROL18_RI2LO
- ES8328_DACCONTROL18_RI2LOVOL
- ES8328_DACCONTROL19
- ES8328_DACCONTROL19_LD2RO
- ES8328_DACCONTROL19_LI2RO
- ES8328_DACCONTROL19_LI2ROVOL
- ES8328_DACCONTROL1_DACFORMAT_I2S
- ES8328_DACCONTROL1_DACFORMAT_LJUST
- ES8328_DACCONTROL1_DACFORMAT_MASK
- ES8328_DACCONTROL1_DACFORMAT_PCM
- ES8328_DACCONTROL1_DACFORMAT_RJUST
- ES8328_DACCONTROL1_DACLRP_I2S_POL_INV
- ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL
- ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK1
- ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK2
- ES8328_DACCONTROL1_DACWL_MASK
- ES8328_DACCONTROL1_DACWL_SHIFT
- ES8328_DACCONTROL1_LRSWAP
- ES8328_DACCONTROL2
- ES8328_DACCONTROL20
- ES8328_DACCONTROL20_RD2RO
- ES8328_DACCONTROL20_RI2RO
- ES8328_DACCONTROL20_RI2ROVOL
- ES8328_DACCONTROL21
- ES8328_DACCONTROL21_LD2MO
- ES8328_DACCONTROL21_LI2MO
- ES8328_DACCONTROL21_LI2MOVOL
- ES8328_DACCONTROL22
- ES8328_DACCONTROL22_RD2MO
- ES8328_DACCONTROL22_RI2MO
- ES8328_DACCONTROL22_RI2MOVOL
- ES8328_DACCONTROL23
- ES8328_DACCONTROL23_HPSWEN
- ES8328_DACCONTROL23_HPSWPOL
- ES8328_DACCONTROL23_MOUTINV
- ES8328_DACCONTROL23_OUT3_MONOOUT
- ES8328_DACCONTROL23_OUT3_RIGHT_MIXER
- ES8328_DACCONTROL23_OUT3_ROUT1
- ES8328_DACCONTROL23_OUT3_VREF
- ES8328_DACCONTROL23_ROUT2INV
- ES8328_DACCONTROL23_VROI_1p5k
- ES8328_DACCONTROL23_VROI_40k
- ES8328_DACCONTROL29
- ES8328_DACCONTROL2_DOUBLESPEED
- ES8328_DACCONTROL2_RATEMASK
- ES8328_DACCONTROL3
- ES8328_DACCONTROL30
- ES8328_DACCONTROL3_AUTOMUTE
- ES8328_DACCONTROL3_DACMUTE
- ES8328_DACCONTROL3_DACRAMPRATE
- ES8328_DACCONTROL3_DACSOFTRAMP
- ES8328_DACCONTROL3_DACZEROCROSS
- ES8328_DACCONTROL3_LEFTGAINVOL
- ES8328_DACCONTROL4
- ES8328_DACCONTROL5
- ES8328_DACCONTROL6
- ES8328_DACCONTROL6_CLICKFREE
- ES8328_DACCONTROL6_DAC_INVL
- ES8328_DACCONTROL6_DAC_INVR
- ES8328_DACCONTROL6_DEEMPH_32k
- ES8328_DACCONTROL6_DEEMPH_44_1k
- ES8328_DACCONTROL6_DEEMPH_48k
- ES8328_DACCONTROL6_DEEMPH_MASK
- ES8328_DACCONTROL6_DEEMPH_OFF
- ES8328_DACCONTROL7
- ES8328_DACCONTROL7_MONO
- ES8328_DACCONTROL7_SHELVING_STRENGTH
- ES8328_DACCONTROL7_VPP_SCALE_2p5
- ES8328_DACCONTROL7_VPP_SCALE_3p0
- ES8328_DACCONTROL7_VPP_SCALE_3p5
- ES8328_DACCONTROL7_VPP_SCALE_4p0
- ES8328_DACCONTROL7_ZEROL
- ES8328_DACCONTROL7_ZEROR
- ES8328_DACCONTROL8
- ES8328_DACCONTROL9
- ES8328_DACCTL
- ES8328_DACLVOL
- ES8328_DACPOWER
- ES8328_DACPOWER_LDAC_OFF
- ES8328_DACPOWER_LOUT1_ON
- ES8328_DACPOWER_LOUT2_ON
- ES8328_DACPOWER_MONO_ON
- ES8328_DACPOWER_OUT3_ON
- ES8328_DACPOWER_RDAC_OFF
- ES8328_DACPOWER_ROUT1_ON
- ES8328_DACPOWER_ROUT2_ON
- ES8328_DACRVOL
- ES8328_DACVOL_MAX
- ES8328_FORMATS
- ES8328_LDACVOL
- ES8328_LDACVOL_MASK
- ES8328_LDACVOL_MAX
- ES8328_LOUT1VOL
- ES8328_LOUT1VOL_MASK
- ES8328_LOUT1VOL_MAX
- ES8328_LOUT2VOL
- ES8328_LOUT2VOL_MASK
- ES8328_LOUT2VOL_MAX
- ES8328_MASTERMODE
- ES8328_MASTERMODE_BCLKDIV
- ES8328_MASTERMODE_BCLK_INV
- ES8328_MASTERMODE_MCLKDIV2
- ES8328_MASTERMODE_MSC
- ES8328_MONOOUTVOL
- ES8328_MONOOUTVOL_MASK
- ES8328_MONOOUTVOL_MAX
- ES8328_OUT1VOL_MAX
- ES8328_OUT2VOL_MAX
- ES8328_RATEMASK
- ES8328_RATES
- ES8328_RDACVOL
- ES8328_RDACVOL_MASK
- ES8328_RDACVOL_MAX
- ES8328_REG_MAX
- ES8328_ROUT1VOL
- ES8328_ROUT1VOL_MASK
- ES8328_ROUT1VOL_MAX
- ES8328_ROUT2VOL
- ES8328_ROUT2VOL_MASK
- ES8328_ROUT2VOL_MAX
- ES8328_SUPPLY_NUM
- ES8328_SYSCLK
- ESAI_ECR_ERI
- ESAI_ECR_ERI_MASK
- ESAI_ECR_ERI_SHIFT
- ESAI_ECR_ERO
- ESAI_ECR_ERO_MASK
- ESAI_ECR_ERO_SHIFT
- ESAI_ECR_ERST
- ESAI_ECR_ERST_MASK
- ESAI_ECR_ERST_SHIFT
- ESAI_ECR_ESAIEN
- ESAI_ECR_ESAIEN_MASK
- ESAI_ECR_ESAIEN_SHIFT
- ESAI_ECR_ETI
- ESAI_ECR_ETI_MASK
- ESAI_ECR_ETI_SHIFT
- ESAI_ECR_ETO
- ESAI_ECR_ETO_MASK
- ESAI_ECR_ETO_SHIFT
- ESAI_ESR_RD
- ESAI_ESR_RDE
- ESAI_ESR_RDE_MASK
- ESAI_ESR_RDE_SHIFT
- ESAI_ESR_RD_MASK
- ESAI_ESR_RD_SHIFT
- ESAI_ESR_RED
- ESAI_ESR_RED_MASK
- ESAI_ESR_RED_SHIFT
- ESAI_ESR_RFF
- ESAI_ESR_RFF_MASK
- ESAI_ESR_RFF_SHIFT
- ESAI_ESR_RLS
- ESAI_ESR_RLS_MASK
- ESAI_ESR_RLS_SHIFT
- ESAI_ESR_TD
- ESAI_ESR_TDE
- ESAI_ESR_TDE_MASK
- ESAI_ESR_TDE_SHIFT
- ESAI_ESR_TD_MASK
- ESAI_ESR_TD_SHIFT
- ESAI_ESR_TED
- ESAI_ESR_TED_MASK
- ESAI_ESR_TED_SHIFT
- ESAI_ESR_TFE
- ESAI_ESR_TFE_MASK
- ESAI_ESR_TFE_SHIFT
- ESAI_ESR_TINIT
- ESAI_ESR_TINIT_MASK
- ESAI_ESR_TINIT_SHIFT
- ESAI_ESR_TLS
- ESAI_ESR_TLS_MASK
- ESAI_ESR_TLS_SHIFT
- ESAI_GPIO
- ESAI_HCKR_EXTAL
- ESAI_HCKR_FSYS
- ESAI_HCKT_EXTAL
- ESAI_HCKT_FSYS
- ESAI_PCRC_PC
- ESAI_PCRC_PC_MASK
- ESAI_PCRC_PC_SHIFT
- ESAI_PCRC_PC_WIDTH
- ESAI_PRRC_PDC
- ESAI_PRRC_PDC_MASK
- ESAI_PRRC_PDC_SHIFT
- ESAI_PRRC_PDC_WIDTH
- ESAI_RX_DIV_FP
- ESAI_RX_DIV_PM
- ESAI_RX_DIV_PSR
- ESAI_SAICR_ALC
- ESAI_SAICR_ALC_MASK
- ESAI_SAICR_ALC_SHIFT
- ESAI_SAICR_OF0
- ESAI_SAICR_OF0_MASK
- ESAI_SAICR_OF0_SHIFT
- ESAI_SAICR_OF1
- ESAI_SAICR_OF1_MASK
- ESAI_SAICR_OF1_SHIFT
- ESAI_SAICR_OF2
- ESAI_SAICR_OF2_MASK
- ESAI_SAICR_OF2_SHIFT
- ESAI_SAICR_SYNC
- ESAI_SAICR_SYNC_MASK
- ESAI_SAICR_SYNC_SHIFT
- ESAI_SAICR_TEBE
- ESAI_SAICR_TEBE_MASK
- ESAI_SAICR_TEBE_SHIFT
- ESAI_SAISR_IF0
- ESAI_SAISR_IF0_MASK
- ESAI_SAISR_IF0_SHIFT
- ESAI_SAISR_IF1
- ESAI_SAISR_IF1_MASK
- ESAI_SAISR_IF1_SHIFT
- ESAI_SAISR_IF2
- ESAI_SAISR_IF2_MASK
- ESAI_SAISR_IF2_SHIFT
- ESAI_SAISR_RDF
- ESAI_SAISR_RDF_MASK
- ESAI_SAISR_RDF_SHIFT
- ESAI_SAISR_REDF
- ESAI_SAISR_REDF_MASK
- ESAI_SAISR_REDF_SHIFT
- ESAI_SAISR_RFS
- ESAI_SAISR_RFS_MASK
- ESAI_SAISR_RFS_SHIFT
- ESAI_SAISR_RODF
- ESAI_SAISR_RODF_MASK
- ESAI_SAISR_RODF_SHIFT
- ESAI_SAISR_ROE
- ESAI_SAISR_ROE_MASK
- ESAI_SAISR_ROE_SHIFT
- ESAI_SAISR_TDE
- ESAI_SAISR_TDE_MASK
- ESAI_SAISR_TDE_SHIFT
- ESAI_SAISR_TEDE
- ESAI_SAISR_TEDE_MASK
- ESAI_SAISR_TEDE_SHIFT
- ESAI_SAISR_TFS
- ESAI_SAISR_TFS_MASK
- ESAI_SAISR_TFS_SHIFT
- ESAI_SAISR_TODFE
- ESAI_SAISR_TODFE_MASK
- ESAI_SAISR_TODFE_SHIFT
- ESAI_SAISR_TUE
- ESAI_SAISR_TUE_MASK
- ESAI_SAISR_TUE_SHIFT
- ESAI_TSR_MASK
- ESAI_TSR_SHIFT
- ESAI_TSR_WIDTH
- ESAI_TX_DIV_FP
- ESAI_TX_DIV_PM
- ESAI_TX_DIV_PSR
- ESAI_xCCR_xCKD
- ESAI_xCCR_xCKD_MASK
- ESAI_xCCR_xCKD_SHIFT
- ESAI_xCCR_xCKP
- ESAI_xCCR_xCKP_MASK
- ESAI_xCCR_xCKP_SHIFT
- ESAI_xCCR_xDC
- ESAI_xCCR_xDC_MASK
- ESAI_xCCR_xDC_SHIFT
- ESAI_xCCR_xDC_WIDTH
- ESAI_xCCR_xFP
- ESAI_xCCR_xFP_MASK
- ESAI_xCCR_xFP_SHIFT
- ESAI_xCCR_xFP_WIDTH
- ESAI_xCCR_xFSD
- ESAI_xCCR_xFSD_MASK
- ESAI_xCCR_xFSD_SHIFT
- ESAI_xCCR_xFSP
- ESAI_xCCR_xFSP_MASK
- ESAI_xCCR_xFSP_SHIFT
- ESAI_xCCR_xHCKD
- ESAI_xCCR_xHCKD_MASK
- ESAI_xCCR_xHCKD_SHIFT
- ESAI_xCCR_xHCKP
- ESAI_xCCR_xHCKP_MASK
- ESAI_xCCR_xHCKP_SHIFT
- ESAI_xCCR_xPM
- ESAI_xCCR_xPM_MASK
- ESAI_xCCR_xPM_SHIFT
- ESAI_xCCR_xPM_WIDTH
- ESAI_xCCR_xPSR_BYPASS
- ESAI_xCCR_xPSR_DIV8
- ESAI_xCCR_xPSR_MASK
- ESAI_xCCR_xPSR_SHIFT
- ESAI_xCR_PADC
- ESAI_xCR_PADC_MASK
- ESAI_xCR_PADC_SHIFT
- ESAI_xCR_RE
- ESAI_xCR_RE_MASK
- ESAI_xCR_RE_WIDTH
- ESAI_xCR_TE
- ESAI_xCR_TE_MASK
- ESAI_xCR_TE_WIDTH
- ESAI_xCR_xEDIE
- ESAI_xCR_xEDIE_MASK
- ESAI_xCR_xEDIE_SHIFT
- ESAI_xCR_xEIE
- ESAI_xCR_xEIE_MASK
- ESAI_xCR_xEIE_SHIFT
- ESAI_xCR_xE_SHIFT
- ESAI_xCR_xFSL
- ESAI_xCR_xFSL_MASK
- ESAI_xCR_xFSL_SHIFT
- ESAI_xCR_xFSR
- ESAI_xCR_xFSR_MASK
- ESAI_xCR_xFSR_SHIFT
- ESAI_xCR_xIE
- ESAI_xCR_xIE_MASK
- ESAI_xCR_xIE_SHIFT
- ESAI_xCR_xLIE
- ESAI_xCR_xLIE_MASK
- ESAI_xCR_xLIE_SHIFT
- ESAI_xCR_xMOD_AC97
- ESAI_xCR_xMOD_MASK
- ESAI_xCR_xMOD_NETWORK
- ESAI_xCR_xMOD_ONDEMAND
- ESAI_xCR_xMOD_SHIFT
- ESAI_xCR_xMOD_WIDTH
- ESAI_xCR_xPR
- ESAI_xCR_xPR_MASK
- ESAI_xCR_xPR_SHIFT
- ESAI_xCR_xSHFD
- ESAI_xCR_xSHFD_MASK
- ESAI_xCR_xSHFD_SHIFT
- ESAI_xCR_xSWS
- ESAI_xCR_xSWS_MASK
- ESAI_xCR_xSWS_SHIFT
- ESAI_xCR_xSWS_WIDTH
- ESAI_xCR_xWA
- ESAI_xCR_xWA_MASK
- ESAI_xCR_xWA_SHIFT
- ESAI_xFCR_RE
- ESAI_xFCR_REXT
- ESAI_xFCR_REXT_MASK
- ESAI_xFCR_REXT_SHIFT
- ESAI_xFCR_RE_MASK
- ESAI_xFCR_RE_WIDTH
- ESAI_xFCR_TE
- ESAI_xFCR_TE_MASK
- ESAI_xFCR_TE_WIDTH
- ESAI_xFCR_TIEN
- ESAI_xFCR_TIEN_MASK
- ESAI_xFCR_TIEN_SHIFT
- ESAI_xFCR_xE_SHIFT
- ESAI_xFCR_xFEN
- ESAI_xFCR_xFEN_MASK
- ESAI_xFCR_xFEN_SHIFT
- ESAI_xFCR_xFR
- ESAI_xFCR_xFR_MASK
- ESAI_xFCR_xFR_SHIFT
- ESAI_xFCR_xFWM
- ESAI_xFCR_xFWM_MASK
- ESAI_xFCR_xFWM_SHIFT
- ESAI_xFCR_xFWM_WIDTH
- ESAI_xFCR_xWA
- ESAI_xFCR_xWA_MASK
- ESAI_xFCR_xWA_SHIFT
- ESAI_xFCR_xWA_WIDTH
- ESAI_xFSR_NRFI_MASK
- ESAI_xFSR_NRFI_SHIFT
- ESAI_xFSR_NRFO_MASK
- ESAI_xFSR_NRFO_SHIFT
- ESAI_xFSR_NRFx_WIDTH
- ESAI_xFSR_NTFI_MASK
- ESAI_xFSR_NTFI_SHIFT
- ESAI_xFSR_NTFO_MASK
- ESAI_xFSR_NTFO_SHIFT
- ESAI_xFSR_NTFx_WIDTH
- ESAI_xFSR_xFCNT_MASK
- ESAI_xFSR_xFCNT_SHIFT
- ESAI_xFSR_xFCNT_WIDTH
- ESAI_xSMA_xS
- ESAI_xSMA_xS_MASK
- ESAI_xSMA_xS_SHIFT
- ESAI_xSMA_xS_WIDTH
- ESAI_xSMB_xS
- ESAI_xSMB_xS_MASK
- ESAI_xSMB_xS_SHIFT
- ESAI_xSMB_xS_WIDTH
- ESAS2R_CHPRST_TIME
- ESAS2R_CHPRST_WAIT_TIME
- ESAS2R_CHP_UPTIME_CNT
- ESAS2R_CHP_UPTIME_MAX
- ESAS2R_COPYRIGHT_YEARS
- ESAS2R_DATA_BUF_LEN
- ESAS2R_DEFAULT_CMD_PER_LUN
- ESAS2R_DEFAULT_NUM_SG_LISTS
- ESAS2R_DEFAULT_SGL_PAGE_SIZE
- ESAS2R_DEFAULT_TMO
- ESAS2R_DISC_BUF_LEN
- ESAS2R_DRVR_NAME
- ESAS2R_FS_AT_ESASRAID2
- ESAS2R_FS_AT_TLSASHBA
- ESAS2R_FS_AT_TSSASRAID2
- ESAS2R_FS_AT_TSSASRAID2E
- ESAS2R_FS_CMD_BEGINW
- ESAS2R_FS_CMD_CANCEL
- ESAS2R_FS_CMD_COMMIT
- ESAS2R_FS_CMD_ERASE
- ESAS2R_FS_CMD_READ
- ESAS2R_FS_CMD_WRITE
- ESAS2R_FS_DRVR_VER
- ESAS2R_FS_VER
- ESAS2R_FWCOREDUMP_SZ
- ESAS2R_H
- ESAS2R_HEARTBEAT_TIME
- ESAS2R_INIT_MSG_GET_INIT
- ESAS2R_INIT_MSG_INIT
- ESAS2R_INIT_MSG_REINIT
- ESAS2R_INIT_MSG_START
- ESAS2R_INT_DIS_MASK
- ESAS2R_INT_ENB_MASK
- ESAS2R_INT_STS_MASK
- ESAS2R_KOBJ_NAME_LEN
- ESAS2R_LIST_ALIGN
- ESAS2R_LIST_EXTRA
- ESAS2R_LOG_CRIT
- ESAS2R_LOG_DEBG
- ESAS2R_LOG_DFLT
- ESAS2R_LOG_INFO
- ESAS2R_LOG_NONE
- ESAS2R_LOG_TRCE
- ESAS2R_LOG_WARN
- ESAS2R_LONGNAME
- ESAS2R_MAJOR_REV
- ESAS2R_MAX_COMM_LIST_SIZE
- ESAS2R_MAX_DEVICES
- ESAS2R_MAX_ID
- ESAS2R_MAX_NUM_REQS
- ESAS2R_MAX_TARGETS
- ESAS2R_MINOR_REV
- ESAS2R_NUM_EXTRA
- ESAS2R_NUM_PHYS
- ESAS2R_RW_BIN_ATTR
- ESAS2R_SGL_ALIGN
- ESAS2R_TARG_ID_INV
- ESAS2R_VDA_EVENT_PORT1
- ESAS2R_VDA_EVENT_PORT2
- ESAS2R_VDA_EVENT_SIG
- ESAS2R_VDA_EVENT_SOCK_COUNT
- ESAS2R_VERSION_STR
- ESAV_CODE0
- ESAV_CODE1
- ESAV_CODE2
- ESAV_CODE3_MSB
- ESAV_CODE_MAN
- ESAV_FOFST_EVEN
- ESAV_FOFST_ODD
- ESAV_F_INV
- ESAV_H_INV
- ESAV_VOFST_LEVEN
- ESAV_VOFST_LODD
- ESAV_VOFST_REVEN
- ESAV_VOFST_RODD
- ESAV_VWID_LEVEN
- ESAV_VWID_LODD
- ESAV_VWID_REVEN
- ESAV_VWID_RODD
- ESAV_V_INV
- ESB_CONFIG_REG
- ESB_GINTSR_REG
- ESB_HEARTBEAT_DEFAULT
- ESB_HEARTBEAT_MAX
- ESB_HEARTBEAT_MIN
- ESB_HEARTBEAT_RANGE
- ESB_LOCK_REG
- ESB_MODULE_NAME
- ESB_RELOAD_REG
- ESB_ST_ABNORMAL
- ESB_ST_COMPLETE
- ESB_ST_ERRP_BIT
- ESB_ST_ERRP_IMM
- ESB_ST_ERRP_INF
- ESB_ST_ERRP_MASK
- ESB_ST_ERRP_MULT
- ESB_ST_ERRP_SING
- ESB_ST_OX_ID_INVL
- ESB_ST_PRI_INUSE
- ESB_ST_REC_QUAL
- ESB_ST_RESP
- ESB_ST_RX_ID_INVL
- ESB_ST_SEQ_INIT
- ESB_TIMER1_REG
- ESB_TIMER2_REG
- ESB_UNLOCK1
- ESB_UNLOCK2
- ESB_WDT_ENABLE
- ESB_WDT_FREQ
- ESB_WDT_FUNC
- ESB_WDT_INTTYPE
- ESB_WDT_LOCK
- ESB_WDT_REBOOT
- ESB_WDT_RELOAD
- ESB_WDT_TIMEOUT
- ESC
- ESC0_CLK_SRC
- ESC1_CLK_SRC
- ESCAPE_ANY
- ESCAPE_ANY_NP
- ESCAPE_CLOCK_DIVIDER_1
- ESCAPE_CLOCK_DIVIDER_2
- ESCAPE_CLOCK_DIVIDER_4
- ESCAPE_CLOCK_DIVIDER_MASK
- ESCAPE_CLOCK_DIVIDER_SHIFT
- ESCAPE_CODE
- ESCAPE_DELAY
- ESCAPE_HEX
- ESCAPE_NP
- ESCAPE_NPAR
- ESCAPE_NULL
- ESCAPE_OCTAL
- ESCAPE_SPACE
- ESCAPE_SPECIAL
- ESCAPE_UDELAY
- ESCB_RECVD
- ESCD
- ESCD_BUFFER_TOO_SMALL
- ESCD_FUNCTION_NOT_SUPPORTED
- ESCD_INVALID
- ESCD_IO_ERROR_READING
- ESCD_NVRAM_TOO_SMALL
- ESCD_SUCCESS
- ESCEND
- ESCO_2EV3
- ESCO_2EV5
- ESCO_3EV3
- ESCO_3EV5
- ESCO_EV3
- ESCO_EV4
- ESCO_EV5
- ESCO_HV1
- ESCO_HV2
- ESCO_HV3
- ESCO_LINK
- ESCO_RE_TX
- ESCR02
- ESCR13
- ESCR_CLEAR
- ESCR_DCLKDIS
- ESCR_DCLKOINV
- ESCR_DCLKSEL_CLKS
- ESCR_DCLKSEL_DCLKIN
- ESCR_DCLKSEL_MASK
- ESCR_FLAG
- ESCR_FRQSEL_MASK
- ESCR_RESERVED_BITS
- ESCR_SET_EVENT_MASK
- ESCR_SET_EVENT_SELECT
- ESCR_SET_OS_0
- ESCR_SET_OS_1
- ESCR_SET_USR_0
- ESCR_SET_USR_1
- ESCR_SYNCSEL_EXHSYNC
- ESCR_SYNCSEL_EXVSYNC
- ESCR_SYNCSEL_OFF
- ESCSR_CLEAR
- ESC_END
- ESC_ESC
- ESC_TIME_NS
- ESDHC_BURST_LEN_EN_INCR
- ESDHC_CAPABILITIES_1
- ESDHC_CD_CONTROLLER
- ESDHC_CD_GPIO
- ESDHC_CD_NONE
- ESDHC_CD_PERMANENT
- ESDHC_CLOCK_HCKEN
- ESDHC_CLOCK_IPGEN
- ESDHC_CLOCK_MASK
- ESDHC_CLOCK_PEREN
- ESDHC_CLOCK_SDCLKEN
- ESDHC_CLOCK_STABLE
- ESDHC_CMD_CLK_CTL
- ESDHC_CQHCI_ADDR_OFFSET
- ESDHC_CTRL_4BITBUS
- ESDHC_CTRL_8BITBUS
- ESDHC_CTRL_BUSWIDTH_MASK
- ESDHC_CTRL_D3CD
- ESDHC_DEFAULT_QUIRKS
- ESDHC_DIVIDER_SHIFT
- ESDHC_DLLCFG0
- ESDHC_DLLCFG1
- ESDHC_DLLSTAT0
- ESDHC_DLL_CTRL
- ESDHC_DLL_ENABLE
- ESDHC_DLL_FREQ_SEL
- ESDHC_DLL_OVERRIDE_EN_SHIFT
- ESDHC_DLL_OVERRIDE_VAL_SHIFT
- ESDHC_DLL_PD_PULSE_STRETCH_SEL
- ESDHC_DLL_STS_SLV_LOCK
- ESDHC_DMA_SNOOP
- ESDHC_DMA_SYSCTL
- ESDHC_EXTN
- ESDHC_FLAG_CQHCI
- ESDHC_FLAG_ERR004536
- ESDHC_FLAG_ERR010450
- ESDHC_FLAG_HAVE_CAP1
- ESDHC_FLAG_HS200
- ESDHC_FLAG_HS400
- ESDHC_FLAG_HS400_ES
- ESDHC_FLAG_MAN_TUNING
- ESDHC_FLAG_MULTIBLK_NO_INT
- ESDHC_FLAG_PMQOS
- ESDHC_FLAG_STD_TUNING
- ESDHC_FLAG_USDHC
- ESDHC_FLUSH_ASYNC_FIFO
- ESDHC_FLW_CTL_BG
- ESDHC_HOST_CONTROL_LE
- ESDHC_HOST_CONTROL_RES
- ESDHC_HS400_MODE
- ESDHC_HS400_WNDW_ADJUST
- ESDHC_INT_VENDOR_SPEC_DMA_ERR
- ESDHC_LPBK_CLK_SEL
- ESDHC_MIX_CTRL
- ESDHC_MIX_CTRL_AC23EN
- ESDHC_MIX_CTRL_AUTO_TUNE_EN
- ESDHC_MIX_CTRL_DDREN
- ESDHC_MIX_CTRL_EXE_TUNE
- ESDHC_MIX_CTRL_FBCLK_SEL
- ESDHC_MIX_CTRL_HS400_EN
- ESDHC_MIX_CTRL_HS400_ES_EN
- ESDHC_MIX_CTRL_SDHCI_MASK
- ESDHC_MIX_CTRL_SMPCLK_SEL
- ESDHC_MIX_CTRL_TUNING_MASK
- ESDHC_PERIPHERAL_CLK_SEL
- ESDHC_PINCTRL_STATE_100MHZ
- ESDHC_PINCTRL_STATE_200MHZ
- ESDHC_PREDIV_SHIFT
- ESDHC_PROCTL
- ESDHC_PRSSTAT
- ESDHC_SDCLKCTL
- ESDHC_SDTIMNGCTL
- ESDHC_SMPCLKSEL
- ESDHC_STD_TUNING_EN
- ESDHC_STROBE_DLL_CTRL
- ESDHC_STROBE_DLL_CTRL_ENABLE
- ESDHC_STROBE_DLL_CTRL_RESET
- ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT
- ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT
- ESDHC_STROBE_DLL_STATUS
- ESDHC_STROBE_DLL_STS_REF_LOCK
- ESDHC_STROBE_DLL_STS_SLV_LOCK
- ESDHC_SYSTEM_CONTROL
- ESDHC_SYSTEM_CONTROL_2
- ESDHC_SYS_CTRL_DTOCV_MASK
- ESDHC_TBCTL
- ESDHC_TBPTR
- ESDHC_TBSTAT
- ESDHC_TB_EN
- ESDHC_TB_MODE_3
- ESDHC_TB_MODE_MASK
- ESDHC_TB_MODE_SW
- ESDHC_TUNE_CTRL_MAX
- ESDHC_TUNE_CTRL_MIN
- ESDHC_TUNE_CTRL_STATUS
- ESDHC_TUNE_CTRL_STEP
- ESDHC_TUNING_CTRL
- ESDHC_TUNING_START_TAP_DEFAULT
- ESDHC_TUNING_START_TAP_MASK
- ESDHC_TUNING_STEP_MASK
- ESDHC_TUNING_STEP_SHIFT
- ESDHC_VENDOR_SPEC
- ESDHC_VENDOR_SPEC_FRC_SDCLK_ON
- ESDHC_VENDOR_SPEC_SDIO_QUIRK
- ESDHC_VENDOR_SPEC_VSELECT
- ESDHC_VEND_SPEC2
- ESDHC_VEND_SPEC2_EN_BUSY_IRQ
- ESDHC_VOLT_SEL
- ESDHC_WNDW_END_PTR_MASK
- ESDHC_WNDW_STRT_PTR_MASK
- ESDHC_WNDW_STRT_PTR_SHIFT
- ESDHC_WP_CONTROLLER
- ESDHC_WP_GPIO
- ESDHC_WP_NONE
- ESDHC_WTMK_DEFAULT_VAL
- ESDHC_WTMK_LVL
- ESDHC_WTMK_LVL_RD_WML_MASK
- ESDHC_WTMK_LVL_RD_WML_SHIFT
- ESDHC_WTMK_LVL_WML_VAL_DEF
- ESDHC_WTMK_LVL_WML_VAL_MAX
- ESDHC_WTMK_LVL_WR_WML_MASK
- ESDHC_WTMK_LVL_WR_WML_SHIFT
- ESDMEOF
- ESD_BUSSTATE_BUSOFF
- ESD_BUSSTATE_ERRPASSIVE
- ESD_BUSSTATE_MASK
- ESD_BUSSTATE_WARN
- ESD_EVENT
- ESD_EV_CAN_ERROR_EXT
- ESD_EXTID
- ESD_IDMASK
- ESD_ID_ENABLE
- ESD_MAX_ID_SEGMENT
- ESD_PCI_SUB_SYS_ID_CPCI200
- ESD_PCI_SUB_SYS_ID_PCI104200
- ESD_PCI_SUB_SYS_ID_PCI200
- ESD_PCI_SUB_SYS_ID_PCI266
- ESD_PCI_SUB_SYS_ID_PCIE2000
- ESD_PCI_SUB_SYS_ID_PMC266
- ESD_RTR
- ESD_USB2_3_SAMPLES
- ESD_USB2_BRP_INC
- ESD_USB2_BRP_MAX
- ESD_USB2_BRP_MIN
- ESD_USB2_CAN_CLOCK
- ESD_USB2_LOM
- ESD_USB2_MAX_NETS
- ESD_USB2_NO_BAUDRATE
- ESD_USB2_SJW_MAX
- ESD_USB2_SJW_SHIFT
- ESD_USB2_TSEG1_MAX
- ESD_USB2_TSEG1_MIN
- ESD_USB2_TSEG1_SHIFT
- ESD_USB2_TSEG2_MAX
- ESD_USB2_TSEG2_MIN
- ESD_USB2_TSEG2_SHIFT
- ESD_USB2_UBR
- ESD_USBM_CAN_CLOCK
- ESD_USBM_SJW_SHIFT
- ESERIES_NR_IRQS
- ESERVERFAULT
- ESE_DE_L4_CLASS_RSVD3
- ESE_DE_L4_CLASS_RSVD4
- ESE_DE_L4_CLASS_RSVD5
- ESE_DE_L4_CLASS_RSVD6
- ESE_DE_L4_CLASS_RSVD7
- ESE_DE_L4_CLASS_TCP
- ESE_DE_L4_CLASS_UDP
- ESE_DE_L4_CLASS_UNKNOWN
- ESE_DZ_DRV_START_UP_EV
- ESE_DZ_DRV_TIMER_EV
- ESE_DZ_DRV_WAKE_UP_EV
- ESE_DZ_ETH_BASE_CLASS_ETH2
- ESE_DZ_ETH_BASE_CLASS_LLC
- ESE_DZ_ETH_BASE_CLASS_LLC_SNAP
- ESE_DZ_ETH_TAG_CLASS_NONE
- ESE_DZ_ETH_TAG_CLASS_RSVD3
- ESE_DZ_ETH_TAG_CLASS_RSVD4
- ESE_DZ_ETH_TAG_CLASS_RSVD5
- ESE_DZ_ETH_TAG_CLASS_RSVD6
- ESE_DZ_ETH_TAG_CLASS_RSVD7
- ESE_DZ_ETH_TAG_CLASS_VLAN1
- ESE_DZ_ETH_TAG_CLASS_VLAN2
- ESE_DZ_EV_CODE_DRIVER_EV
- ESE_DZ_EV_CODE_MCDI_EV
- ESE_DZ_EV_CODE_RX_EV
- ESE_DZ_EV_CODE_TX_EV
- ESE_DZ_L3_CLASS_ARP
- ESE_DZ_L3_CLASS_FCOE
- ESE_DZ_L3_CLASS_IP4
- ESE_DZ_L3_CLASS_IP4_FRAG
- ESE_DZ_L3_CLASS_IP6
- ESE_DZ_L3_CLASS_IP6_FRAG
- ESE_DZ_L3_CLASS_RSVD7
- ESE_DZ_L3_CLASS_UNKNOWN
- ESE_DZ_MAC_CLASS_MCAST
- ESE_DZ_MAC_CLASS_UCAST
- ESE_DZ_OTHER
- ESE_DZ_TX_OPTION_CRC_FCOE
- ESE_DZ_TX_OPTION_CRC_FCOIP_FCOE
- ESE_DZ_TX_OPTION_CRC_FCOIP_MPA
- ESE_DZ_TX_OPTION_CRC_ISCSI_HDR
- ESE_DZ_TX_OPTION_CRC_ISCSI_HDR_AND_PYLD
- ESE_DZ_TX_OPTION_CRC_OFF
- ESE_DZ_TX_OPTION_DESC_CRC_CSUM
- ESE_DZ_TX_OPTION_DESC_PIO
- ESE_DZ_TX_OPTION_DESC_TSO
- ESE_DZ_TX_OPTION_DESC_VLAN
- ESE_DZ_TX_TSO_OPTION_DESC_ENCAP
- ESE_DZ_TX_TSO_OPTION_DESC_FATSO2A
- ESE_DZ_TX_TSO_OPTION_DESC_FATSO2B
- ESE_DZ_TX_TSO_OPTION_DESC_NORMAL
- ESE_EZ_ENCAP_HDR_GRE
- ESE_EZ_ENCAP_HDR_NONE
- ESE_EZ_ENCAP_HDR_VXLAN
- ESE_FZ_L4_CLASS_RSVD3
- ESE_FZ_L4_CLASS_TCP
- ESE_FZ_L4_CLASS_UDP
- ESE_FZ_L4_CLASS_UNKNOWN
- ESFDE
- ESFDP
- ESF_DD_RX_EV_RSVD1_LBN
- ESF_DD_RX_EV_RSVD1_WIDTH
- ESF_DD_RX_EV_RSVD2_LBN
- ESF_DD_RX_EV_RSVD2_WIDTH
- ESF_DD_RX_EV_SOFT1_LBN
- ESF_DD_RX_EV_SOFT1_WIDTH
- ESF_DD_TX_EV_RSVD_LBN
- ESF_DD_TX_EV_RSVD_WIDTH
- ESF_DD_TX_SOFT1_LBN
- ESF_DD_TX_SOFT1_WIDTH
- ESF_DE_RX_L4_CLASS_LBN
- ESF_DE_RX_L4_CLASS_WIDTH
- ESF_DZ_DRV_CODE_LBN
- ESF_DZ_DRV_CODE_WIDTH
- ESF_DZ_DRV_EVQ_ID_LBN
- ESF_DZ_DRV_EVQ_ID_WIDTH
- ESF_DZ_DRV_SUB_CODE_LBN
- ESF_DZ_DRV_SUB_CODE_WIDTH
- ESF_DZ_DRV_SUB_DATA_LBN
- ESF_DZ_DRV_SUB_DATA_WIDTH
- ESF_DZ_DRV_TMR_ID_LBN
- ESF_DZ_DRV_TMR_ID_WIDTH
- ESF_DZ_EV_CODE_LBN
- ESF_DZ_EV_CODE_WIDTH
- ESF_DZ_EV_DATA_LBN
- ESF_DZ_EV_DATA_WIDTH
- ESF_DZ_MC_CODE_LBN
- ESF_DZ_MC_CODE_WIDTH
- ESF_DZ_MC_DROP_EVENT_LBN
- ESF_DZ_MC_DROP_EVENT_WIDTH
- ESF_DZ_MC_OVERRIDE_HOLDOFF_LBN
- ESF_DZ_MC_OVERRIDE_HOLDOFF_WIDTH
- ESF_DZ_MC_SOFT_LBN
- ESF_DZ_MC_SOFT_WIDTH
- ESF_DZ_RX_BYTES_LBN
- ESF_DZ_RX_BYTES_WIDTH
- ESF_DZ_RX_CODE_LBN
- ESF_DZ_RX_CODE_WIDTH
- ESF_DZ_RX_CONT_LBN
- ESF_DZ_RX_CONT_WIDTH
- ESF_DZ_RX_CRC0_ERR_LBN
- ESF_DZ_RX_CRC0_ERR_WIDTH
- ESF_DZ_RX_CRC1_ERR_LBN
- ESF_DZ_RX_CRC1_ERR_WIDTH
- ESF_DZ_RX_DROP_EVENT_LBN
- ESF_DZ_RX_DROP_EVENT_WIDTH
- ESF_DZ_RX_DSC_PTR_LBITS_LBN
- ESF_DZ_RX_DSC_PTR_LBITS_WIDTH
- ESF_DZ_RX_ECC_ERR_LBN
- ESF_DZ_RX_ECC_ERR_WIDTH
- ESF_DZ_RX_ECRC_ERR_LBN
- ESF_DZ_RX_ECRC_ERR_WIDTH
- ESF_DZ_RX_ETH_BASE_CLASS_LBN
- ESF_DZ_RX_ETH_BASE_CLASS_WIDTH
- ESF_DZ_RX_ETH_TAG_CLASS_LBN
- ESF_DZ_RX_ETH_TAG_CLASS_WIDTH
- ESF_DZ_RX_EV_SOFT2_LBN
- ESF_DZ_RX_EV_SOFT2_WIDTH
- ESF_DZ_RX_IPCKSUM_ERR_LBN
- ESF_DZ_RX_IPCKSUM_ERR_WIDTH
- ESF_DZ_RX_KER_BUF_ADDR_LBN
- ESF_DZ_RX_KER_BUF_ADDR_WIDTH
- ESF_DZ_RX_KER_BYTE_CNT_LBN
- ESF_DZ_RX_KER_BYTE_CNT_WIDTH
- ESF_DZ_RX_KER_RESERVED_LBN
- ESF_DZ_RX_KER_RESERVED_WIDTH
- ESF_DZ_RX_L3_CLASS_LBN
- ESF_DZ_RX_L3_CLASS_WIDTH
- ESF_DZ_RX_MAC_CLASS_LBN
- ESF_DZ_RX_MAC_CLASS_WIDTH
- ESF_DZ_RX_OVERRIDE_HOLDOFF_LBN
- ESF_DZ_RX_OVERRIDE_HOLDOFF_WIDTH
- ESF_DZ_RX_PARSE_INCOMPLETE_LBN
- ESF_DZ_RX_PARSE_INCOMPLETE_WIDTH
- ESF_DZ_RX_QLABEL_LBN
- ESF_DZ_RX_QLABEL_WIDTH
- ESF_DZ_RX_TCPUDP_CKSUM_ERR_LBN
- ESF_DZ_RX_TCPUDP_CKSUM_ERR_WIDTH
- ESF_DZ_RX_TRUNC_ERR_LBN
- ESF_DZ_RX_TRUNC_ERR_WIDTH
- ESF_DZ_TX_CODE_LBN
- ESF_DZ_TX_CODE_WIDTH
- ESF_DZ_TX_DESCR_INDX_LBN
- ESF_DZ_TX_DESCR_INDX_WIDTH
- ESF_DZ_TX_DESC_IS_OPT_LBN
- ESF_DZ_TX_DESC_IS_OPT_WIDTH
- ESF_DZ_TX_DROP_EVENT_LBN
- ESF_DZ_TX_DROP_EVENT_WIDTH
- ESF_DZ_TX_KER_BUF_ADDR_LBN
- ESF_DZ_TX_KER_BUF_ADDR_WIDTH
- ESF_DZ_TX_KER_BYTE_CNT_LBN
- ESF_DZ_TX_KER_BYTE_CNT_WIDTH
- ESF_DZ_TX_KER_CONT_LBN
- ESF_DZ_TX_KER_CONT_WIDTH
- ESF_DZ_TX_KER_TYPE_LBN
- ESF_DZ_TX_KER_TYPE_WIDTH
- ESF_DZ_TX_OPTION_CRC_MODE_LBN
- ESF_DZ_TX_OPTION_CRC_MODE_WIDTH
- ESF_DZ_TX_OPTION_INNER_IP_CSUM_LBN
- ESF_DZ_TX_OPTION_INNER_IP_CSUM_WIDTH
- ESF_DZ_TX_OPTION_INNER_UDP_TCP_CSUM_LBN
- ESF_DZ_TX_OPTION_INNER_UDP_TCP_CSUM_WIDTH
- ESF_DZ_TX_OPTION_IP_CSUM_LBN
- ESF_DZ_TX_OPTION_IP_CSUM_WIDTH
- ESF_DZ_TX_OPTION_TS_AT_TXDP_LBN
- ESF_DZ_TX_OPTION_TS_AT_TXDP_WIDTH
- ESF_DZ_TX_OPTION_TYPE_LBN
- ESF_DZ_TX_OPTION_TYPE_WIDTH
- ESF_DZ_TX_OPTION_UDP_TCP_CSUM_LBN
- ESF_DZ_TX_OPTION_UDP_TCP_CSUM_WIDTH
- ESF_DZ_TX_OVERRIDE_HOLDOFF_LBN
- ESF_DZ_TX_OVERRIDE_HOLDOFF_WIDTH
- ESF_DZ_TX_PIO_BUF_ADDR_LBN
- ESF_DZ_TX_PIO_BUF_ADDR_WIDTH
- ESF_DZ_TX_PIO_BYTE_CNT_LBN
- ESF_DZ_TX_PIO_BYTE_CNT_WIDTH
- ESF_DZ_TX_PIO_CONT_LBN
- ESF_DZ_TX_PIO_CONT_WIDTH
- ESF_DZ_TX_PIO_OPT_LBN
- ESF_DZ_TX_PIO_OPT_WIDTH
- ESF_DZ_TX_PIO_TYPE_LBN
- ESF_DZ_TX_PIO_TYPE_WIDTH
- ESF_DZ_TX_QLABEL_LBN
- ESF_DZ_TX_QLABEL_WIDTH
- ESF_DZ_TX_SOFT2_LBN
- ESF_DZ_TX_SOFT2_WIDTH
- ESF_DZ_TX_TIMESTAMP_LBN
- ESF_DZ_TX_TIMESTAMP_WIDTH
- ESF_DZ_TX_TSO_IP_ID_LBN
- ESF_DZ_TX_TSO_IP_ID_WIDTH
- ESF_DZ_TX_TSO_OPTION_TYPE_LBN
- ESF_DZ_TX_TSO_OPTION_TYPE_WIDTH
- ESF_DZ_TX_TSO_OUTER_IPID_LBN
- ESF_DZ_TX_TSO_OUTER_IPID_WIDTH
- ESF_DZ_TX_TSO_TCP_FLAGS_LBN
- ESF_DZ_TX_TSO_TCP_FLAGS_WIDTH
- ESF_DZ_TX_TSO_TCP_MSS_LBN
- ESF_DZ_TX_TSO_TCP_MSS_WIDTH
- ESF_DZ_TX_TSO_TCP_SEQNO_LBN
- ESF_DZ_TX_TSO_TCP_SEQNO_WIDTH
- ESF_EZ_IP_INNER_CHKSUM_ERR_LBN
- ESF_EZ_IP_INNER_CHKSUM_ERR_WIDTH
- ESF_EZ_RX_ABORT_LBN
- ESF_EZ_RX_ABORT_WIDTH
- ESF_EZ_RX_ENCAP_HDR_LBN
- ESF_EZ_RX_ENCAP_HDR_WIDTH
- ESF_EZ_RX_EV_RSVD1_LBN
- ESF_EZ_RX_EV_RSVD1_WIDTH
- ESF_EZ_RX_EV_RSVD2_LBN
- ESF_EZ_RX_EV_RSVD2_WIDTH
- ESF_EZ_RX_EV_SOFT1_LBN
- ESF_EZ_RX_EV_SOFT1_WIDTH
- ESF_EZ_RX_IP_INNER_CHKSUM_ERR_LBN
- ESF_EZ_RX_IP_INNER_CHKSUM_ERR_WIDTH
- ESF_EZ_RX_TCP_UDP_INNER_CHKSUM_ERR_LBN
- ESF_EZ_RX_TCP_UDP_INNER_CHKSUM_ERR_WIDTH
- ESF_EZ_TCP_UDP_INNER_CHKSUM_ERR_LBN
- ESF_EZ_TCP_UDP_INNER_CHKSUM_ERR_WIDTH
- ESF_EZ_TX_CAN_MERGE_LBN
- ESF_EZ_TX_CAN_MERGE_WIDTH
- ESF_EZ_TX_EV_RSVD_LBN
- ESF_EZ_TX_EV_RSVD_WIDTH
- ESF_EZ_TX_SOFT1_LBN
- ESF_EZ_TX_SOFT1_WIDTH
- ESF_FZ_RX_FASTPD_INDCTR_LBN
- ESF_FZ_RX_FASTPD_INDCTR_WIDTH
- ESF_FZ_RX_L4_CLASS_LBN
- ESF_FZ_RX_L4_CLASS_WIDTH
- ESG
- ESHUTDOWN
- ESI
- ESID_BITS
- ESID_BITS_1T
- ESID_BITS_1T_MASK
- ESID_BITS_MASK
- ESID_MASK
- ESID_MASK_1T
- ESI_ARP_PENDING
- ESI_CLOSE_HANDLE
- ESI_DESC_ENTRY_POINT
- ESI_DESC_SIZE
- ESI_FLUSH_PENDING
- ESI_FORWARD_DIRECT
- ESI_LEN
- ESI_OPEN_HANDLE
- ESI_PROC_MP_SAFE
- ESI_PROC_REENTRANT
- ESI_PROC_SERIALIZED
- ESI_QUERY
- ESI_TABLE_GUID
- ESI_UNKNOWN
- ESI_VC_PENDING
- ESKAPE_LABS_MYTV2GO
- ESMT
- ESM_AC97_DATA
- ESM_AC97_INDEX
- ESM_ACPI_COMMAND
- ESM_APM_CMD
- ESM_APM_POWER_CYCLE
- ESM_APU_16BITLINEAR
- ESM_APU_16BITPINGPONG
- ESM_APU_16BITSTEREO
- ESM_APU_6dB
- ESM_APU_8BITDIFF
- ESM_APU_8BITLINEAR
- ESM_APU_8BITSTEREO
- ESM_APU_AMPLITUDE_NOW_MASK
- ESM_APU_AMPLITUDE_NOW_SHIFT
- ESM_APU_ATFP_AMPLITUDE
- ESM_APU_ATFP_FILTER
- ESM_APU_ATFP_FLG_DONE
- ESM_APU_ATFP_FLG_INPROCESS
- ESM_APU_ATFP_FLG_OFF
- ESM_APU_ATFP_FLG_WAIT
- ESM_APU_ATFP_PAN
- ESM_APU_ATFP_TREMELO
- ESM_APU_CORRELATOR
- ESM_APU_DATA_SRC_A_MASK
- ESM_APU_DATA_SRC_A_SHIFT
- ESM_APU_DATA_SRC_B_MASK
- ESM_APU_DATA_SRC_B_SHIFT
- ESM_APU_DIGITALDELAY
- ESM_APU_DMA_ENABLE
- ESM_APU_DUALTAP
- ESM_APU_DUAL_EFFECT
- ESM_APU_EFFECT_CHANNELS_MASK
- ESM_APU_EFFECT_CHANNELS_SHIFT
- ESM_APU_EFFECT_GAIN_MASK
- ESM_APU_EFFECT_GAIN_SHIFT
- ESM_APU_END_CURVE
- ESM_APU_ENV_STATE_MASK
- ESM_APU_ENV_STATE_SHIFT
- ESM_APU_ENV_TYPE_MASK
- ESM_APU_ENV_TYPE_SHIFT
- ESM_APU_FILTER_1POLE_HIPASS
- ESM_APU_FILTER_1POLE_LOPASS
- ESM_APU_FILTER_2POLE_BANDPASS
- ESM_APU_FILTER_2POLE_HIPASS
- ESM_APU_FILTER_2POLE_LOPASS
- ESM_APU_FILTER_LESSQ
- ESM_APU_FILTER_MOREQ
- ESM_APU_FILTER_OFF
- ESM_APU_FILTER_Q_MASK
- ESM_APU_FILTER_Q_SHIFT
- ESM_APU_FILTER_TUNING_MASK
- ESM_APU_FILTER_TUNING_SHIFT
- ESM_APU_FILTER_TYPE_MASK
- ESM_APU_FILTER_TYPE_SHIFT
- ESM_APU_FREE
- ESM_APU_INPUTMIXER
- ESM_APU_INT_ON_LOOP
- ESM_APU_INV_POL_A
- ESM_APU_INV_POL_B
- ESM_APU_MODE_MASK
- ESM_APU_MODE_SHIFT
- ESM_APU_OFF
- ESM_APU_PAN_CENTER_CIRCLE
- ESM_APU_PAN_MIDDLE_RADIUS
- ESM_APU_PAN_OUTSIDE_RADIUS
- ESM_APU_PCM_CAPTURE
- ESM_APU_PCM_PLAY
- ESM_APU_PCM_RATECONV
- ESM_APU_PHASE_MASK
- ESM_APU_PHASE_SHIFT
- ESM_APU_POLAR_PAN_MASK
- ESM_APU_POLAR_PAN_SHIFT
- ESM_APU_RADIUS_SELECT
- ESM_APU_RESERVED1
- ESM_APU_RESERVED2
- ESM_APU_RESERVED3
- ESM_APU_SRCONVERTOR
- ESM_APU_STEP_SIZE_MASK
- ESM_APU_SUBMIX_GROUP_MASK
- ESM_APU_SUBMIX_GROUP_SHIRT
- ESM_APU_SUBMIX_MODE
- ESM_APU_TREMOLO_DEPTH_MASK
- ESM_APU_TREMOLO_DEPTH_SHIFT
- ESM_APU_TREMOLO_RATE_MASK
- ESM_APU_TREMOLO_RATE_SHIFT
- ESM_APU_VIBRATO_DEPTH_MASK
- ESM_APU_VIBRATO_DEPTH_SHIFT
- ESM_APU_VIBRATO_PHASE_MASK
- ESM_APU_VIBRATO_PHASE_SHIFT
- ESM_APU_VIBRATO_RATE_MASK
- ESM_APU_VIBRATO_RATE_SHIFT
- ESM_APU_WAVE64K_PAGE_MASK
- ESM_APU_WAVE64K_PAGE_SHIFT
- ESM_APU_WAVETABLE
- ESM_ASSP_IRQ
- ESM_BOB_ENABLE
- ESM_BOB_FREQ
- ESM_BOB_FREQ_MAX
- ESM_BOB_START
- ESM_CONFIG_A
- ESM_CONFIG_B
- ESM_DATA
- ESM_DDMA
- ESM_FREQ_ESM1
- ESM_FREQ_ESM2
- ESM_HIRQ_ASSP
- ESM_HIRQ_ClkRun
- ESM_HIRQ_DSIE
- ESM_HIRQ_HARPO
- ESM_HIRQ_HW_VOLUME
- ESM_HIRQ_MPU401
- ESM_HIRQ_SB
- ESM_HWVOL_IRQ
- ESM_INDEX
- ESM_LEGACY_AUDIO_CONTROL
- ESM_MEM_ALIGN
- ESM_MIXBUF_SIZE
- ESM_MODE_CAPTURE
- ESM_MODE_PLAY
- ESM_MPU401_IRQ
- ESM_MPU401_PORT
- ESM_PORT_HOST_IRQ
- ESM_RESET_DIRECTSOUND
- ESM_RESET_MAESTRO
- ESM_RING_BUS_CONTR_A
- ESM_RING_BUS_CONTR_B
- ESM_RING_BUS_DEST
- ESM_RING_BUS_SDO
- ESM_SB_IRQ
- ESM_SOUND_IRQ
- ESM_STATUS_CMD_UNSUCCESSFUL
- ESN_IV_INSERT_OFFSET
- ESOCKTNOSUPPORT
- ESP
- ESP100
- ESP100A
- ESP236
- ESPARSER_MIN_PACKET_SIZE
- ESPC_BD_MOD_STR_1
- ESPC_BD_MOD_STR_2
- ESPC_BD_MOD_STR_3
- ESPC_BD_MOD_STR_4
- ESPC_BD_MOD_STR_LEN
- ESPC_CHKSUM
- ESPC_CHKSUM_SUM
- ESPC_EEPROM_SIZE
- ESPC_INTR_NUM
- ESPC_INTR_NUM_PORT0
- ESPC_INTR_NUM_PORT1
- ESPC_INTR_NUM_PORT2
- ESPC_INTR_NUM_PORT3
- ESPC_MAC_ADDR0
- ESPC_MAC_ADDR1
- ESPC_MAX_FM_SZ
- ESPC_MOD_STR_1
- ESPC_MOD_STR_2
- ESPC_MOD_STR_3
- ESPC_MOD_STR_4
- ESPC_MOD_STR_5
- ESPC_MOD_STR_6
- ESPC_MOD_STR_7
- ESPC_MOD_STR_8
- ESPC_MOD_STR_LEN
- ESPC_NCR
- ESPC_NCR_VAL
- ESPC_NUM_PORTS_MACS
- ESPC_NUM_PORTS_MACS_VAL
- ESPC_PHY_TYPE
- ESPC_PHY_TYPE_10G_COPPER
- ESPC_PHY_TYPE_10G_FIBER
- ESPC_PHY_TYPE_1G_COPPER
- ESPC_PHY_TYPE_1G_FIBER
- ESPC_PHY_TYPE_PORT0
- ESPC_PHY_TYPE_PORT0_SHIFT
- ESPC_PHY_TYPE_PORT1
- ESPC_PHY_TYPE_PORT1_SHIFT
- ESPC_PHY_TYPE_PORT2
- ESPC_PHY_TYPE_PORT2_SHIFT
- ESPC_PHY_TYPE_PORT3
- ESPC_PHY_TYPE_PORT3_SHIFT
- ESPC_PIO_EN
- ESPC_PIO_EN_ENABLE
- ESPC_PIO_STAT
- ESPC_PIO_STAT_ADDR
- ESPC_PIO_STAT_ADDR_SHIFT
- ESPC_PIO_STAT_DATA
- ESPC_PIO_STAT_DATA_SHIFT
- ESPC_PIO_STAT_READ_END
- ESPC_PIO_STAT_READ_START
- ESPC_PIO_STAT_WRITE_END
- ESPC_PIO_STAT_WRITE_INIT
- ESPC_VER_IMGSZ
- ESPC_VER_IMGSZ_IMGSZ
- ESPC_VER_IMGSZ_IMGSZ_SHIFT
- ESPC_VER_IMGSZ_VER
- ESPC_VER_IMGSZ_VER_SHIFT
- ESPFIX_BASE_ADDR
- ESPFIX_MAX_CPUS
- ESPFIX_MAX_PAGES
- ESPFIX_PAGE_SPACE
- ESPFIX_PGD_ENTRY
- ESPFIX_PMD_CLONES
- ESPFIX_PTE_CLONES
- ESPFIX_PUD_CLONES
- ESPFIX_STACKS_PER_PAGE
- ESPFIX_STACK_SIZE
- ESPFIX_START_NR
- ESPIPE
- ESPI_BASE_INTID
- ESPI_DESC
- ESPI_INTR_MASK
- ESPI_RANGE
- ESPI_SPCOM
- ESPI_SPIE
- ESPI_SPIM
- ESPI_SPIRF
- ESPI_SPITF
- ESPI_SPMODE
- ESPI_SPMODE0
- ESPI_SPMODEx
- ESP_BUSID
- ESP_BUSID_CTR32BIT
- ESP_BUSID_RESELID
- ESP_BUS_TIMEOUT
- ESP_CCF_F0
- ESP_CCF_F2
- ESP_CCF_F3
- ESP_CCF_F4
- ESP_CCF_F5
- ESP_CCF_F6
- ESP_CCF_F7
- ESP_CCF_NEVER
- ESP_CFACT
- ESP_CFG1
- ESP_CFG2
- ESP_CFG3
- ESP_CFG4
- ESP_CMD
- ESP_CMDP
- ESP_CMD_DCNCT
- ESP_CMD_DMA
- ESP_CMD_DSEL
- ESP_CMD_DSEQ
- ESP_CMD_ESEL
- ESP_CMD_FLAG_AUTOSENSE
- ESP_CMD_FLAG_RESIDUAL
- ESP_CMD_FLAG_WRITE
- ESP_CMD_FLUSH
- ESP_CMD_ICCSEQ
- ESP_CMD_MOK
- ESP_CMD_NULL
- ESP_CMD_PRIV
- ESP_CMD_RATN
- ESP_CMD_RC
- ESP_CMD_RCMD
- ESP_CMD_RCSEQ
- ESP_CMD_RDATA
- ESP_CMD_RMSG
- ESP_CMD_RS
- ESP_CMD_RSEL
- ESP_CMD_RSEL3
- ESP_CMD_SA3
- ESP_CMD_SATN
- ESP_CMD_SDATA
- ESP_CMD_SEL
- ESP_CMD_SELA
- ESP_CMD_SELAS
- ESP_CMD_SMSG
- ESP_CMD_SSTAT
- ESP_CMD_TCCSEQ
- ESP_CMD_TI
- ESP_CMD_TPAD
- ESP_CMD_TSEQ
- ESP_CONFIG1_CHTEST
- ESP_CONFIG1_ID
- ESP_CONFIG1_PARTEST
- ESP_CONFIG1_PENABLE
- ESP_CONFIG1_SLCABLE
- ESP_CONFIG1_SRRDISAB
- ESP_CONFIG2_BADPARITY
- ESP_CONFIG2_BCM
- ESP_CONFIG2_DISPINT
- ESP_CONFIG2_DMAPARITY
- ESP_CONFIG2_FENAB
- ESP_CONFIG2_HI
- ESP_CONFIG2_HME32
- ESP_CONFIG2_HMEFENAB
- ESP_CONFIG2_MAGIC
- ESP_CONFIG2_MKDONE
- ESP_CONFIG2_REGPARITY
- ESP_CONFIG2_SCSI2ENAB
- ESP_CONFIG2_SPL
- ESP_CONFIG3_ADMA
- ESP_CONFIG3_EWIDE
- ESP_CONFIG3_FAST
- ESP_CONFIG3_FCLK
- ESP_CONFIG3_FCLOCK
- ESP_CONFIG3_FSCSI
- ESP_CONFIG3_GTM
- ESP_CONFIG3_IDBIT3
- ESP_CONFIG3_IDMSG
- ESP_CONFIG3_IMS
- ESP_CONFIG3_OBPUSH
- ESP_CONFIG3_SRB
- ESP_CONFIG3_TBMS
- ESP_CONFIG3_TEM
- ESP_CONFIG3_TENB
- ESP_CONFIG3_TMS
- ESP_CONFIG4_GE0
- ESP_CONFIG4_GE1
- ESP_CONFIG4_PWD
- ESP_CONFIG4_RADE
- ESP_CONFIG4_RAE
- ESP_CONFIG_GE_0NS
- ESP_CONFIG_GE_12NS
- ESP_CONFIG_GE_25NS
- ESP_CONFIG_GE_35NS
- ESP_CTEST
- ESP_DEBUG_AUTOSENSE
- ESP_DEBUG_CMDDONE
- ESP_DEBUG_COMMAND
- ESP_DEBUG_DATADONE
- ESP_DEBUG_DATASTART
- ESP_DEBUG_DISCONNECT
- ESP_DEBUG_EVENT
- ESP_DEBUG_INTR
- ESP_DEBUG_MSGIN
- ESP_DEBUG_MSGOUT
- ESP_DEBUG_RECONNECT
- ESP_DEBUG_RESET
- ESP_DEBUG_SCSICMD
- ESP_DEFAULT_TAGS
- ESP_DIP
- ESP_DMA_CMD
- ESP_DMA_CMD_ABORT
- ESP_DMA_CMD_BLAST
- ESP_DMA_CMD_DIAG
- ESP_DMA_CMD_DIR
- ESP_DMA_CMD_IDLE
- ESP_DMA_CMD_INTE_D
- ESP_DMA_CMD_INTE_P
- ESP_DMA_CMD_MASK
- ESP_DMA_CMD_MDL
- ESP_DMA_CMD_START
- ESP_DMA_SMDLA
- ESP_DMA_SPA
- ESP_DMA_STATUS
- ESP_DMA_STAT_ABORT
- ESP_DMA_STAT_BCMPLT
- ESP_DMA_STAT_DONE
- ESP_DMA_STAT_ERROR
- ESP_DMA_STAT_PWDN
- ESP_DMA_STAT_SCSIINT
- ESP_DMA_STC
- ESP_DMA_WAC
- ESP_DMA_WBC
- ESP_DMA_WMAC
- ESP_DOP
- ESP_EVENT_CHECK_PHASE
- ESP_EVENT_CMD_DONE
- ESP_EVENT_CMD_START
- ESP_EVENT_DATA_DONE
- ESP_EVENT_DATA_IN
- ESP_EVENT_DATA_OUT
- ESP_EVENT_FREE_BUS
- ESP_EVENT_LOG_SZ
- ESP_EVENT_MSGIN
- ESP_EVENT_MSGIN_DONE
- ESP_EVENT_MSGIN_MORE
- ESP_EVENT_MSGOUT
- ESP_EVENT_MSGOUT_DONE
- ESP_EVENT_NONE
- ESP_EVENT_RESET
- ESP_EVENT_STATUS
- ESP_EVENT_TYPE_CMD
- ESP_EVENT_TYPE_EVENT
- ESP_FDATA
- ESP_FFLAGS
- ESP_FF_FBYTES
- ESP_FF_ONOTZERO
- ESP_FF_SSTEP
- ESP_FGRND
- ESP_FIFO_SIZE
- ESP_FLAG_DIFFERENTIAL
- ESP_FLAG_DISABLE_SYNC
- ESP_FLAG_NO_DMA_MAP
- ESP_FLAG_QUICKIRQ_CHECK
- ESP_FLAG_RESETTING
- ESP_FLAG_USE_FIFO
- ESP_FLAG_WIDE_CAPABLE
- ESP_HZ_TO_CYCLE
- ESP_INTRPT
- ESP_INTR_BSERV
- ESP_INTR_DC
- ESP_INTR_FDONE
- ESP_INTR_IC
- ESP_INTR_RSEL
- ESP_INTR_S
- ESP_INTR_SATN
- ESP_INTR_SR
- ESP_LAST_SUPPORTED_FLAG
- ESP_MAX_LUN
- ESP_MAX_MSG_SZ
- ESP_MAX_TAG
- ESP_MAX_TARGET
- ESP_MIP
- ESP_MOP
- ESP_NEG_DEFP
- ESP_QUICKIRQ_LIMIT
- ESP_RESELECT_TAG_LIMIT
- ESP_SELECT_BASIC
- ESP_SELECT_MSGOUT
- ESP_SELECT_NONE
- ESP_SKB_CB
- ESP_SOFF
- ESP_SSTEP
- ESP_STAT2_CREGA
- ESP_STAT2_F1BYTE
- ESP_STAT2_FEMPTY
- ESP_STAT2_FFLAGS
- ESP_STAT2_FMSB
- ESP_STAT2_SCHBIT
- ESP_STAT2_WIDE
- ESP_STAT2_XCNT
- ESP_STATP
- ESP_STATUS
- ESP_STATUS2
- ESP_STAT_INTR
- ESP_STAT_PCD
- ESP_STAT_PERR
- ESP_STAT_PIO
- ESP_STAT_PMASK
- ESP_STAT_PMSG
- ESP_STAT_SPAM
- ESP_STAT_TCNT
- ESP_STAT_TDONE
- ESP_STEP_ASEL
- ESP_STEP_FINI4
- ESP_STEP_FINI5
- ESP_STEP_FINI6
- ESP_STEP_FINI7
- ESP_STEP_NCMD
- ESP_STEP_PPC
- ESP_STEP_SID
- ESP_STEP_VBITS
- ESP_STP
- ESP_TCHI
- ESP_TCLOW
- ESP_TCMED
- ESP_TEST_INI
- ESP_TEST_TARG
- ESP_TEST_TS
- ESP_TGT_BROKEN
- ESP_TGT_CHECK_NEGO
- ESP_TGT_DISCONNECT
- ESP_TGT_NEGO_SYNC
- ESP_TGT_NEGO_WIDE
- ESP_TGT_WIDE
- ESP_TICK
- ESP_TIMEO
- ESP_TIMEO_CONST
- ESP_UID
- ESP_UID_F100A
- ESP_UID_F236
- ESP_UID_FAM
- ESP_UID_REV
- ESP_V4_FLOW
- ESP_V6_FLOW
- ESR
- ESR0_MASK_CLR_OFFSET
- ESR0_MASK_SET_OFFSET
- ESR0_MASK_STATUS_OFFSET
- ESR0_STATUS_CLR_OFFSET
- ESR0_STATUS_OFFSET
- ESR1_MASK_CLR_OFFSET
- ESR1_MASK_SET_OFFSET
- ESR1_MASK_STATUS_OFFSET
- ESR1_STATUS_CLR_OFFSET
- ESR1_STATUS_OFFSET
- ESR2_BASE
- ESR2_MASK_CLR_OFFSET
- ESR2_MASK_SET_OFFSET
- ESR2_MASK_STATUS_OFFSET
- ESR2_STATUS_CLR_OFFSET
- ESR2_STATUS_OFFSET
- ESR2_TI_PLL_CFG_H
- ESR2_TI_PLL_CFG_L
- ESR2_TI_PLL_RX_CFG_H
- ESR2_TI_PLL_RX_CFG_L
- ESR2_TI_PLL_RX_STS_H
- ESR2_TI_PLL_RX_STS_L
- ESR2_TI_PLL_STS_H
- ESR2_TI_PLL_STS_L
- ESR2_TI_PLL_TEST_CFG_H
- ESR2_TI_PLL_TEST_CFG_L
- ESR2_TI_PLL_TX_CFG_H
- ESR2_TI_PLL_TX_CFG_L
- ESR2_TI_PLL_TX_STS_H
- ESR2_TI_PLL_TX_STS_L
- ESR3_MASK_CLR_OFFSET
- ESR3_MASK_SET_OFFSET
- ESR3_MASK_STATUS_OFFSET
- ESR3_STATUS_CLR_OFFSET
- ESR3_STATUS_OFFSET
- ESR4_MASK_CLR_OFFSET
- ESR4_MASK_SET_OFFSET
- ESR4_MASK_STATUS_OFFSET
- ESR4_STATUS_CLR_OFFSET
- ESR4_STATUS_OFFSET
- ESRAM0_DEEP_SLEEP_STATE_OFF
- ESRAM0_DEEP_SLEEP_STATE_RET
- ESRAM12
- ESRAM34
- ESRAM_AUTO_INIT_CSR_OFFSET
- ESRAM_AUTO_INIT_USED_CYCLES
- ESRAM_AUTO_TINIT
- ESRAM_AUTO_TINIT_DONE
- ESRCH
- ESRMNT
- ESRRESTORE
- ESR_BASE
- ESR_BIT
- ESR_BO
- ESR_CEE
- ESR_CTE
- ESR_DEBUG_SEL
- ESR_DEBUG_SEL_VAL
- ESR_DIZ
- ESR_DLK
- ESR_DST
- ESR_EAV
- ESR_EIL
- ESR_EL1
- ESR_ELx_AET
- ESR_ELx_AET_CE
- ESR_ELx_AET_SHIFT
- ESR_ELx_AET_UC
- ESR_ELx_AET_UEO
- ESR_ELx_AET_UER
- ESR_ELx_AET_UEU
- ESR_ELx_AR
- ESR_ELx_AR_SHIFT
- ESR_ELx_BRK64_ISS_COMMENT_MASK
- ESR_ELx_CM
- ESR_ELx_CM_SHIFT
- ESR_ELx_COND_MASK
- ESR_ELx_COND_SHIFT
- ESR_ELx_CP15_32_ISS_CRM_MASK
- ESR_ELx_CP15_32_ISS_CRM_SHIFT
- ESR_ELx_CP15_32_ISS_CRN_MASK
- ESR_ELx_CP15_32_ISS_CRN_SHIFT
- ESR_ELx_CP15_32_ISS_DIR_MASK
- ESR_ELx_CP15_32_ISS_DIR_READ
- ESR_ELx_CP15_32_ISS_DIR_WRITE
- ESR_ELx_CP15_32_ISS_OP1_MASK
- ESR_ELx_CP15_32_ISS_OP1_SHIFT
- ESR_ELx_CP15_32_ISS_OP2_MASK
- ESR_ELx_CP15_32_ISS_OP2_SHIFT
- ESR_ELx_CP15_32_ISS_RT_MASK
- ESR_ELx_CP15_32_ISS_RT_SHIFT
- ESR_ELx_CP15_32_ISS_SYS_CNTFRQ
- ESR_ELx_CP15_32_ISS_SYS_MASK
- ESR_ELx_CP15_32_ISS_SYS_VAL
- ESR_ELx_CP15_64_ISS_CRM_MASK
- ESR_ELx_CP15_64_ISS_CRM_SHIFT
- ESR_ELx_CP15_64_ISS_DIR_MASK
- ESR_ELx_CP15_64_ISS_DIR_READ
- ESR_ELx_CP15_64_ISS_DIR_WRITE
- ESR_ELx_CP15_64_ISS_OP1_MASK
- ESR_ELx_CP15_64_ISS_OP1_SHIFT
- ESR_ELx_CP15_64_ISS_RT2_MASK
- ESR_ELx_CP15_64_ISS_RT2_SHIFT
- ESR_ELx_CP15_64_ISS_RT_MASK
- ESR_ELx_CP15_64_ISS_RT_SHIFT
- ESR_ELx_CP15_64_ISS_SYS_CNTVCT
- ESR_ELx_CP15_64_ISS_SYS_MASK
- ESR_ELx_CP15_64_ISS_SYS_VAL
- ESR_ELx_CV
- ESR_ELx_EA
- ESR_ELx_EA_SHIFT
- ESR_ELx_EC
- ESR_ELx_EC_BKPT32
- ESR_ELx_EC_BREAKPT_CUR
- ESR_ELx_EC_BREAKPT_LOW
- ESR_ELx_EC_BRK64
- ESR_ELx_EC_CP10_ID
- ESR_ELx_EC_CP14_64
- ESR_ELx_EC_CP14_LS
- ESR_ELx_EC_CP14_MR
- ESR_ELx_EC_CP15_32
- ESR_ELx_EC_CP15_64
- ESR_ELx_EC_DABT_CUR
- ESR_ELx_EC_DABT_LOW
- ESR_ELx_EC_ERET
- ESR_ELx_EC_FP_ASIMD
- ESR_ELx_EC_FP_EXC32
- ESR_ELx_EC_FP_EXC64
- ESR_ELx_EC_HVC32
- ESR_ELx_EC_HVC64
- ESR_ELx_EC_IABT_CUR
- ESR_ELx_EC_IABT_LOW
- ESR_ELx_EC_ILL
- ESR_ELx_EC_IMP_DEF
- ESR_ELx_EC_MASK
- ESR_ELx_EC_MAX
- ESR_ELx_EC_PAC
- ESR_ELx_EC_PC_ALIGN
- ESR_ELx_EC_SERROR
- ESR_ELx_EC_SHIFT
- ESR_ELx_EC_SMC32
- ESR_ELx_EC_SMC64
- ESR_ELx_EC_SOFTSTP_CUR
- ESR_ELx_EC_SOFTSTP_LOW
- ESR_ELx_EC_SP_ALIGN
- ESR_ELx_EC_SVC32
- ESR_ELx_EC_SVC64
- ESR_ELx_EC_SVE
- ESR_ELx_EC_SYS64
- ESR_ELx_EC_UNKNOWN
- ESR_ELx_EC_VECTOR32
- ESR_ELx_EC_WATCHPT_CUR
- ESR_ELx_EC_WATCHPT_LOW
- ESR_ELx_EC_WFx
- ESR_ELx_FP_EXC_TFV
- ESR_ELx_FSC
- ESR_ELx_FSC_ACCESS
- ESR_ELx_FSC_EXTABT
- ESR_ELx_FSC_FAULT
- ESR_ELx_FSC_PERM
- ESR_ELx_FSC_SERROR
- ESR_ELx_FSC_TYPE
- ESR_ELx_FnV
- ESR_ELx_FnV_SHIFT
- ESR_ELx_IDS
- ESR_ELx_IDS_SHIFT
- ESR_ELx_IL
- ESR_ELx_IL_SHIFT
- ESR_ELx_ISS_MASK
- ESR_ELx_ISV
- ESR_ELx_ISV_SHIFT
- ESR_ELx_S1PTW
- ESR_ELx_S1PTW_SHIFT
- ESR_ELx_SAS
- ESR_ELx_SAS_SHIFT
- ESR_ELx_SET_MASK
- ESR_ELx_SET_SHIFT
- ESR_ELx_SF
- ESR_ELx_SF_SHIFT
- ESR_ELx_SRT_MASK
- ESR_ELx_SRT_SHIFT
- ESR_ELx_SSE
- ESR_ELx_SSE_SHIFT
- ESR_ELx_SYS64_ISS_CRM_DC_CIVAC
- ESR_ELx_SYS64_ISS_CRM_DC_CVAC
- ESR_ELx_SYS64_ISS_CRM_DC_CVADP
- ESR_ELx_SYS64_ISS_CRM_DC_CVAP
- ESR_ELx_SYS64_ISS_CRM_DC_CVAU
- ESR_ELx_SYS64_ISS_CRM_IC_IVAU
- ESR_ELx_SYS64_ISS_CRM_MASK
- ESR_ELx_SYS64_ISS_CRM_SHIFT
- ESR_ELx_SYS64_ISS_CRN_MASK
- ESR_ELx_SYS64_ISS_CRN_SHIFT
- ESR_ELx_SYS64_ISS_DIR_MASK
- ESR_ELx_SYS64_ISS_DIR_READ
- ESR_ELx_SYS64_ISS_DIR_WRITE
- ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK
- ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL
- ESR_ELx_SYS64_ISS_OP0_MASK
- ESR_ELx_SYS64_ISS_OP0_SHIFT
- ESR_ELx_SYS64_ISS_OP1_MASK
- ESR_ELx_SYS64_ISS_OP1_SHIFT
- ESR_ELx_SYS64_ISS_OP2_MASK
- ESR_ELx_SYS64_ISS_OP2_SHIFT
- ESR_ELx_SYS64_ISS_RES0_MASK
- ESR_ELx_SYS64_ISS_RES0_SHIFT
- ESR_ELx_SYS64_ISS_RT
- ESR_ELx_SYS64_ISS_RT_MASK
- ESR_ELx_SYS64_ISS_RT_SHIFT
- ESR_ELx_SYS64_ISS_SYS_CNTFRQ
- ESR_ELx_SYS64_ISS_SYS_CNTVCT
- ESR_ELx_SYS64_ISS_SYS_CTR
- ESR_ELx_SYS64_ISS_SYS_CTR_READ
- ESR_ELx_SYS64_ISS_SYS_MASK
- ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK
- ESR_ELx_SYS64_ISS_SYS_MRS_OP_VAL
- ESR_ELx_SYS64_ISS_SYS_OP_MASK
- ESR_ELx_SYS64_ISS_SYS_VAL
- ESR_ELx_WFx_ISS_TI
- ESR_ELx_WFx_ISS_WFE
- ESR_ELx_WFx_ISS_WFI
- ESR_ELx_WFx_MASK
- ESR_ELx_WFx_WFI_VAL
- ESR_ELx_WNR
- ESR_ELx_WNR_SHIFT
- ESR_ELx_xVC_IMM_MASK
- ESR_EQN
- ESR_ET
- ESR_FP
- ESR_GLUE_CTRL0_BLTIME
- ESR_GLUE_CTRL0_BLTIME_SHIFT
- ESR_GLUE_CTRL0_FASTRESYNC
- ESR_GLUE_CTRL0_H
- ESR_GLUE_CTRL0_L
- ESR_GLUE_CTRL0_RESV1
- ESR_GLUE_CTRL0_RESV2
- ESR_GLUE_CTRL0_RESV3
- ESR_GLUE_CTRL0_RXLOSENAB
- ESR_GLUE_CTRL0_RXLOS_TEST
- ESR_GLUE_CTRL0_SRATE
- ESR_GLUE_CTRL0_SRATE_SHIFT
- ESR_GLUE_CTRL0_THCNT
- ESR_GLUE_CTRL0_THCNT_SHIFT
- ESR_GLUE_CTRL1_H
- ESR_GLUE_CTRL1_L
- ESR_ILK
- ESR_IMCB
- ESR_IMCN
- ESR_IMCP
- ESR_IMCT
- ESR_INT_DET0_P0
- ESR_INT_DET0_P1
- ESR_INT_SIGNALS
- ESR_INT_SIGNALS_ALL
- ESR_INT_SIGNALS_P0_BITS
- ESR_INT_SIGNALS_P1_BITS
- ESR_INT_SLOSS_P0_CH0
- ESR_INT_SLOSS_P0_CH1
- ESR_INT_SLOSS_P0_CH2
- ESR_INT_SLOSS_P0_CH3
- ESR_INT_SLOSS_P1_CH0
- ESR_INT_SLOSS_P1_CH1
- ESR_INT_SLOSS_P1_CH2
- ESR_INT_SLOSS_P1_CH3
- ESR_INT_SRDY0_P0
- ESR_INT_SRDY0_P1
- ESR_INT_XDP_P0_CH0
- ESR_INT_XDP_P0_CH1
- ESR_INT_XDP_P0_CH2
- ESR_INT_XDP_P0_CH3
- ESR_INT_XDP_P1_CH0
- ESR_INT_XDP_P1_CH1
- ESR_INT_XDP_P1_CH2
- ESR_INT_XDP_P1_CH3
- ESR_INT_XSRDY_P0
- ESR_INT_XSRDY_P1
- ESR_MAGIC
- ESR_MCI
- ESR_MHE
- ESR_MISC_POWER_CTRL_H
- ESR_MISC_POWER_CTRL_L
- ESR_MSE
- ESR_MULTI
- ESR_MULTI_MASK
- ESR_MULTI_SHIFT
- ESR_NXM
- ESR_OFFSET
- ESR_PIL
- ESR_PPR
- ESR_PTR
- ESR_PUO
- ESR_REQ_ATTN
- ESR_REQ_ATTN_ENA
- ESR_RXTX_COMM_CTRL_H
- ESR_RXTX_COMM_CTRL_L
- ESR_RXTX_CTRL_BIASCNTL
- ESR_RXTX_CTRL_ENSTRETCH
- ESR_RXTX_CTRL_H
- ESR_RXTX_CTRL_L
- ESR_RXTX_CTRL_RESV1
- ESR_RXTX_CTRL_RESV2
- ESR_RXTX_CTRL_RESV3
- ESR_RXTX_CTRL_RESV4
- ESR_RXTX_CTRL_RESV5
- ESR_RXTX_CTRL_RISEFALL
- ESR_RXTX_CTRL_RISEFALL_SHIFT
- ESR_RXTX_CTRL_RXPRESWIN
- ESR_RXTX_CTRL_RXPRESWIN_SHIFT
- ESR_RXTX_CTRL_TDENFIFO
- ESR_RXTX_CTRL_TDWS20
- ESR_RXTX_CTRL_VMUXLO
- ESR_RXTX_CTRL_VMUXLO_SHIFT
- ESR_RXTX_CTRL_VPULSELO
- ESR_RXTX_CTRL_VPULSELO_SHIFT
- ESR_RXTX_RESET_CTRL_H
- ESR_RXTX_RESET_CTRL_L
- ESR_RXTX_TEST_H
- ESR_RXTX_TEST_L
- ESR_RXTX_TUNING1_H
- ESR_RXTX_TUNING1_L
- ESR_RXTX_TUNING2_H
- ESR_RXTX_TUNING2_L
- ESR_RXTX_TUNING3_H
- ESR_RXTX_TUNING3_L
- ESR_RXTX_TUNING_H
- ESR_RXTX_TUNING_L
- ESR_RX_POWER_CTRL_H
- ESR_RX_POWER_CTRL_L
- ESR_RX_SYNCCHAR_H
- ESR_RX_SYNCCHAR_L
- ESR_S
- ESR_SOR
- ESR_SPV
- ESR_ST
- ESR_TX_POWER_CTRL_H
- ESR_TX_POWER_CTRL_L
- ESR_UEE
- ESR_WRE
- ESS
- ESSA_GET_STATE
- ESSA_MAX
- ESSA_SET_POT_VOLATILE
- ESSA_SET_STABLE
- ESSA_SET_STABLE_IF_RESIDENT
- ESSA_SET_STABLE_NODAT
- ESSA_SET_STABLE_RESIDENT
- ESSA_SET_UNUSED
- ESSA_SET_VOLATILE
- ESSDM_REG_DMAADDR
- ESSDM_REG_DMACLEAR
- ESSDM_REG_DMACOMMAND
- ESSDM_REG_DMACOUNT
- ESSDM_REG_DMAMASK
- ESSDM_REG_DMAMODE
- ESSDM_REG_DMASTATUS
- ESSID_SIZE
- ESSIO_REG_AUDIO2DMAADDR
- ESSIO_REG_AUDIO2DMACOUNT
- ESSIO_REG_AUDIO2MODE
- ESSIO_REG_IRQCONTROL
- ESSSB_IREG_AUDIO1
- ESSSB_IREG_AUDIO2
- ESSSB_IREG_AUDIO2CONTROL1
- ESSSB_IREG_AUDIO2CONTROL2
- ESSSB_IREG_AUDIO2FILTER
- ESSSB_IREG_AUDIO2MODE
- ESSSB_IREG_AUDIO2RECORD
- ESSSB_IREG_AUDIO2SAMPLE
- ESSSB_IREG_AUDIO2TCOUNTH
- ESSSB_IREG_AUDIO2TCOUNTL
- ESSSB_IREG_AUXACD
- ESSSB_IREG_AUXACDRECORD
- ESSSB_IREG_AUXB
- ESSSB_IREG_AUXBRECORD
- ESSSB_IREG_FM
- ESSSB_IREG_FMRECORD
- ESSSB_IREG_LINE
- ESSSB_IREG_LINERECORD
- ESSSB_IREG_MASTER
- ESSSB_IREG_MASTER_LEFT
- ESSSB_IREG_MASTER_RIGHT
- ESSSB_IREG_MICMIX
- ESSSB_IREG_MICMIXRECORD
- ESSSB_IREG_MONO
- ESSSB_IREG_MONORECORD
- ESSSB_IREG_MPU401CONTROL
- ESSSB_IREG_PCSPEAKER
- ESSSB_IREG_RECSRC
- ESSSB_IREG_SPATCONTROL
- ESSSB_IREG_SPATLEVEL
- ESSSB_REG_FMHIGHADDR
- ESSSB_REG_FMLOWADDR
- ESSSB_REG_MIXERADDR
- ESSSB_REG_MIXERDATA
- ESSSB_REG_READDATA
- ESSSB_REG_READSTATUS
- ESSSB_REG_RESET
- ESSSB_REG_STATUS
- ESSSB_REG_WRITEDATA
- ESS_CMD_ANALOGCONTROL
- ESS_CMD_AUDIO1STATUS
- ESS_CMD_CONTDMA
- ESS_CMD_DMACNTRELOADH
- ESS_CMD_DMACNTRELOADL
- ESS_CMD_DMACONTROL
- ESS_CMD_DMATYPE
- ESS_CMD_DRQCONTROL
- ESS_CMD_ENABLEAUDIO1
- ESS_CMD_ENABLEEXT
- ESS_CMD_EXTSAMPLERATE
- ESS_CMD_FILTERDIV
- ESS_CMD_IRQCONTROL
- ESS_CMD_OFFSETLEFT
- ESS_CMD_OFFSETRIGHT
- ESS_CMD_PAUSEDMA
- ESS_CMD_READREG
- ESS_CMD_RECLEVEL
- ESS_CMD_SETFORMAT
- ESS_CMD_SETFORMAT2
- ESS_CMD_STOPAUDIO1
- ESS_CMD_TESTIRQ
- ESS_DISABLE_AUDIO
- ESS_ENABLE_SERIAL_IRQ
- ESS_FMT_16BIT
- ESS_FMT_STEREO
- ESS_RECSRC_AUXACD
- ESS_RECSRC_AUXB
- ESS_RECSRC_LINE
- ESS_RECSRC_MIC
- ESS_RECSRC_NONE
- ESS_RESET
- ESS_SYSCLK
- ESTABLISHED_TIMING1_BITS
- ESTABLISHED_TIMING2_BITS
- ESTABLISHED_TIMING3_BITS
- ESTABLISHED_TIMING_1
- ESTABLISHED_TIMING_2
- ESTABLISH_NEXUS_ESCB
- ESTAB_UPCALL
- ESTACKS_MEMBERS
- ESTACK_DB
- ESTACK_DB1
- ESTACK_DB2
- ESTACK_DF
- ESTACK_MCE
- ESTACK_NMI
- ESTALE
- ESTAR_MODE_DIV_1
- ESTAR_MODE_DIV_2
- ESTAR_MODE_DIV_4
- ESTAR_MODE_DIV_6
- ESTAR_MODE_DIV_8
- ESTAR_MODE_DIV_MASK
- ESTAT
- ESTATE_ERROR_CEEN
- ESTATE_ERROR_FDECC
- ESTATE_ERROR_FMD
- ESTATE_ERROR_FMESS
- ESTATE_ERROR_FMT
- ESTATE_ERROR_NCEEN
- ESTATE_ERROR_UCEEN
- ESTATE_ERR_ALL
- ESTATE_ERR_CE
- ESTATE_ERR_ISAP
- ESTATE_ERR_NCE
- ESTATUS_1000_TFULL
- ESTATUS_1000_THALF
- ESTATUS_1000_XFULL
- ESTATUS_1000_XHALF
- ESTATUS_EH
- ESTATUS_EPIE
- ESTATUS_EU
- ESTAT_ADD
- ESTAT_CLKRDY
- ESTAT_INT
- ESTAT_LATECOL
- ESTAT_RXBUSY
- ESTAT_TXABRT
- ESTB
- ESTERINTE
- ESTRPIPE
- EST_ICL_TARG_WINDOW
- EST_SOFI2
- EST_SOFI3
- ESW_ALLOWED
- ESW_FDB_CHAINS_AND_PRIOS_SUPPORTED
- ESW_OFFLOADS_DEVCOM_PAIR
- ESW_OFFLOADS_DEVCOM_UNPAIR
- ESW_OFFLOADS_NUM_GROUPS
- ESW_SIZE
- ESYNC
- ESYND_ERRORS
- ESYNR0
- ESYNR0_ABID
- ESYNR0_ABID_MASK
- ESYNR0_ABID_SHIFT
- ESYNR0_AMID
- ESYNR0_AMID_MASK
- ESYNR0_AMID_SHIFT
- ESYNR0_APID
- ESYNR0_APID_MASK
- ESYNR0_APID_SHIFT
- ESYNR0_ATID
- ESYNR0_ATID_MASK
- ESYNR0_ATID_SHIFT
- ESYNR0_AVMID
- ESYNR0_AVMID_MASK
- ESYNR0_AVMID_SHIFT
- ESYNR1
- ESYNR1_ABURST
- ESYNR1_ABURST_MASK
- ESYNR1_ABURST_SHIFT
- ESYNR1_AC
- ESYNR1_AC_MASK
- ESYNR1_AC_SHIFT
- ESYNR1_AFULL
- ESYNR1_AFULL_MASK
- ESYNR1_AFULL_SHIFT
- ESYNR1_AINNERSHARED
- ESYNR1_AINNERSHARED_MASK
- ESYNR1_AINNERSHARED_SHIFT
- ESYNR1_AINST
- ESYNR1_AINST_MASK
- ESYNR1_AINST_SHIFT
- ESYNR1_ALEN
- ESYNR1_ALEN_MASK
- ESYNR1_ALEN_SHIFT
- ESYNR1_ALOCK
- ESYNR1_ALOCK_MASK
- ESYNR1_ALOCK_SHIFT
- ESYNR1_AMEMTYPE
- ESYNR1_AMEMTYPE_MASK
- ESYNR1_AMEMTYPE_SHIFT
- ESYNR1_AOOO
- ESYNR1_AOOO_MASK
- ESYNR1_AOOO_SHIFT
- ESYNR1_APRIV
- ESYNR1_APRIV_MASK
- ESYNR1_APRIV_SHIFT
- ESYNR1_APROTNS
- ESYNR1_APROTNS_MASK
- ESYNR1_APROTNS_SHIFT
- ESYNR1_ASHARED
- ESYNR1_ASHARED_MASK
- ESYNR1_ASHARED_SHIFT
- ESYNR1_ASIZE
- ESYNR1_ASIZE_MASK
- ESYNR1_ASIZE_SHIFT
- ESYNR1_AWRITE
- ESYNR1_AWRITE_MASK
- ESYNR1_AWRITE_SHIFT
- ESYNR1_DCD
- ESYNR1_DCD_MASK
- ESYNR1_DCD_SHIFT
- ESYSCLK
- ESZ_MAX
- ES_1370_ADC_STOP
- ES_1370_CBUSY
- ES_1370_CDC_EN
- ES_1370_CODEC_WRITE
- ES_1370_CSTAT
- ES_1370_CWRIP
- ES_1370_DAC_SYNC
- ES_1370_M_CB
- ES_1370_M_SBB
- ES_1370_PCLKDIVI
- ES_1370_PCLKDIVM
- ES_1370_PCLKDIVO
- ES_1370_SERR_DISABLE
- ES_1370_SRCLOCK
- ES_1370_SRTODIV
- ES_1370_VC
- ES_1370_WTSRSEL
- ES_1370_WTSRSELM
- ES_1370_XCTL0
- ES_1370_XCTL1
- ES_1371_ADCAP
- ES_1371_ADC_STOP
- ES_1371_AI
- ES_1371_BACAP
- ES_1371_CDCCAP
- ES_1371_CODEC_PIRD
- ES_1371_CODEC_RDY
- ES_1371_CODEC_READ
- ES_1371_CODEC_READS
- ES_1371_CODEC_WIP
- ES_1371_CODEC_WRITE
- ES_1371_DAC_TEST
- ES_1371_DIS_P1
- ES_1371_DIS_P2
- ES_1371_DIS_R1
- ES_1371_EXI
- ES_1371_FIRQ
- ES_1371_GPIO_IN
- ES_1371_GPIO_OUT
- ES_1371_GPIO_OUTM
- ES_1371_HIB
- ES_1371_JFAST
- ES_1371_JOY_ASEL
- ES_1371_JOY_ASELI
- ES_1371_JOY_ASELM
- ES_1371_LEGINT
- ES_1371_MDMACAP
- ES_1371_MPICAP
- ES_1371_MPWR
- ES_1371_M_CB
- ES_1371_PCICLKDIS
- ES_1371_PDLEV
- ES_1371_PDLEVM
- ES_1371_PWR_INTRM
- ES_1371_SDMACAP
- ES_1371_SPICAP
- ES_1371_SRC_DISABLE
- ES_1371_SRC_RAM_ADDRI
- ES_1371_SRC_RAM_ADDRM
- ES_1371_SRC_RAM_ADDRO
- ES_1371_SRC_RAM_BUSY
- ES_1371_SRC_RAM_DATAI
- ES_1371_SRC_RAM_DATAM
- ES_1371_SRC_RAM_DATAO
- ES_1371_SRC_RAM_WE
- ES_1371_ST_AC97_RST
- ES_1371_SVCAP
- ES_1371_SYNC_ERR
- ES_1371_SYNC_RES
- ES_1371_TEST
- ES_1371_VC
- ES_1371_VCDCI
- ES_1371_VCDCM
- ES_1371_VCDCO
- ES_1371_VMPUI
- ES_1371_VMPUM
- ES_1371_VMPUO
- ES_1371_VSB
- ES_1371_WR
- ES_1371_XTALCKDIS
- ES_1373_BYPASS_P1
- ES_1373_BYPASS_P2
- ES_1373_BYPASS_R
- ES_1373_GPIO_INT
- ES_1373_GPIO_INT_EN
- ES_1373_REAR_BIT24
- ES_1373_REAR_BIT26
- ES_1373_REAR_BIT27
- ES_1373_RECEN_B
- ES_1373_SPDIF_EN
- ES_1373_SPDIF_TEST
- ES_1373_SPDIF_THRU
- ES_1373_TEST_BIT
- ES_16COL
- ES_2_ENTRIES
- ES_3_ENTRIES
- ES_ADC
- ES_ADC_EN
- ES_AGGRESSIVE_TEST__
- ES_ALL_ENTRIES
- ES_AND_GS_AUTO
- ES_ASYNC
- ES_AUTO
- ES_BREQ
- ES_CCB_INTRM
- ES_CNTRL
- ES_CNTRLM
- ES_CTR_ROL
- ES_DAC1
- ES_DAC1_EN
- ES_DAC2
- ES_DAC2_EN
- ES_DELAYED_B
- ES_DRIVER
- ES_DZ_RX_PREFIX_HASH_OFST
- ES_DZ_RX_PREFIX_PKTLEN_OFST
- ES_DZ_RX_PREFIX_SIZE
- ES_DZ_RX_PREFIX_TSTAMP_OFST
- ES_DZ_RX_PREFIX_VLAN1_OFST
- ES_DZ_RX_PREFIX_VLAN2_OFST
- ES_EXCESSIVE_BUFFER_OVERRUN_INFO
- ES_EXC_DEF
- ES_FLAGS
- ES_FLUSH_CTL
- ES_FM_CONFIG_ERROR_INFO
- ES_HOLE_B
- ES_INTR
- ES_JYSTK_EN
- ES_LATCOL
- ES_LINK_OK
- ES_LOSTCARR
- ES_LTXBRD
- ES_LTX_MULT
- ES_MASK
- ES_MCCB
- ES_MEM_PAGEI
- ES_MEM_PAGEM
- ES_MEM_PAGEO
- ES_MODE_CAPTURE
- ES_MODE_GET_CRITICAL_SEC_ENTRY
- ES_MODE_GET_FILE_ENTRY
- ES_MODE_GET_NAME_ENTRY
- ES_MODE_GET_STRM_ENTRY
- ES_MODE_INPUT
- ES_MODE_OUTPUT
- ES_MODE_PLAY1
- ES_MODE_PLAY2
- ES_MODE_STARTED
- ES_MSFMTSEL
- ES_MUL_COL
- ES_P1_INT_EN
- ES_P1_LOOP_SEL
- ES_P1_MODEI
- ES_P1_MODEM
- ES_P1_MODEO
- ES_P1_PAUSE
- ES_P1_SCT_RLD
- ES_P2_DAC_SEN
- ES_P2_END_INCI
- ES_P2_END_INCM
- ES_P2_END_INCO
- ES_P2_INT_EN
- ES_P2_LOOP_SEL
- ES_P2_MODEI
- ES_P2_MODEM
- ES_P2_MODEO
- ES_P2_PAUSE
- ES_P2_ST_INCI
- ES_P2_ST_INCM
- ES_P2_ST_INCO
- ES_PACK_SIZE_BIT
- ES_PAGE_ADC
- ES_PAGE_DAC
- ES_PAGE_UART
- ES_PAGE_UART1
- ES_PARSER_START
- ES_PORT_RCV_CONSTRAINT_ERROR_INFO
- ES_PORT_RCV_ERROR_INFO
- ES_PORT_RCV_SWITCH_RELAY_ERROR_INFO
- ES_PORT_XMIT_CONSTRAINT_ERROR_INFO
- ES_PRIO
- ES_PRI_IND
- ES_R1_INT_EN
- ES_R1_LOOP_SEL
- ES_R1_MODEI
- ES_R1_MODEM
- ES_R1_MODEO
- ES_RATE_FLAG
- ES_REFERENCED_B
- ES_REG
- ES_REG_1370_CODEC
- ES_REG_1371_CODEC
- ES_REG_1371_LEGACY
- ES_REG_1371_SMPRATE
- ES_REG_ADC_COUNT
- ES_REG_ADC_FRAME
- ES_REG_ADC_SIZE
- ES_REG_CHANNEL_STATUS
- ES_REG_CONTROL
- ES_REG_COUNTI
- ES_REG_COUNTM
- ES_REG_COUNTO
- ES_REG_CURR_COUNT
- ES_REG_DAC1_COUNT
- ES_REG_DAC1_FRAME
- ES_REG_DAC1_SIZE
- ES_REG_DAC2_COUNT
- ES_REG_DAC2_FRAME
- ES_REG_DAC2_SIZE
- ES_REG_FCURR_COUNTI
- ES_REG_FCURR_COUNTM
- ES_REG_FCURR_COUNTO
- ES_REG_FSIZEI
- ES_REG_FSIZEM
- ES_REG_FSIZEO
- ES_REG_MEM_PAGE
- ES_REG_PHANTOM_COUNT
- ES_REG_PHANTOM_FRAME
- ES_REG_SERIAL
- ES_REG_STATUS
- ES_REG_UART_CONTROL
- ES_REG_UART_DATA
- ES_REG_UART_FIFO
- ES_REG_UART_RES
- ES_REG_UART_STATUS
- ES_REG_UF_BYTEI
- ES_REG_UF_BYTEM
- ES_REG_UF_BYTEO
- ES_REG_UF_VALID
- ES_RXINT
- ES_RXINTEN
- ES_RXRDY
- ES_SEARCH
- ES_SHIFT
- ES_SMPREG_ACCUM_FRAC
- ES_SMPREG_ADC
- ES_SMPREG_DAC1
- ES_SMPREG_DAC2
- ES_SMPREG_INT_REGS
- ES_SMPREG_TRUNC_N
- ES_SMPREG_VFREQ_FRAC
- ES_SMPREG_VOL_ADC
- ES_SMPREG_VOL_DAC1
- ES_SMPREG_VOL_DAC2
- ES_SNGL_COL
- ES_SQET
- ES_STAGE_DS
- ES_STAGE_OFF
- ES_STAGE_REAL
- ES_START_CODE_MASK
- ES_START_CODE_PATTERN
- ES_SYNC
- ES_TEST
- ES_TEST_MODE
- ES_TXDEFR
- ES_TXINT
- ES_TXINTENI
- ES_TXINTENM
- ES_TXINTENO
- ES_TXRDY
- ES_TXUNRN
- ES_TX_SUC
- ES_TYPE_MASK
- ES_UART
- ES_UART_EN
- ES_UNCORRECTABLE_ERROR_INFO
- ES_UNWRITTEN_B
- ES_WRITE
- ES_WRITTEN_B
- ES_cmd_free
- ES_cmd_processing
- ES_read_finishing
- ES_read_pending
- EScsiignore
- ESesc
- ESfunckey
- ESgetpars
- EShash
- ESnonstd
- ESnormal
- ESosc
- ESpalette
- ESpercent
- ESsetG0
- ESsetG1
- ESsquare
- ET0_COL_MARK
- ET0_CRS_MARK
- ET0_ERXD0_MARK
- ET0_ERXD1_MARK
- ET0_ERXD2_A_MARK
- ET0_ERXD2_B_MARK
- ET0_ERXD3_A_MARK
- ET0_ERXD3_B_MARK
- ET0_ERXD4_MARK
- ET0_ERXD5_MARK
- ET0_ERXD6_MARK
- ET0_ERXD7_MARK
- ET0_ETXD0_MARK
- ET0_ETXD1_A_MARK
- ET0_ETXD1_B_MARK
- ET0_ETXD2_A_MARK
- ET0_ETXD2_B_MARK
- ET0_ETXD3_A_MARK
- ET0_ETXD3_B_MARK
- ET0_ETXD4_MARK
- ET0_ETXD5_A_MARK
- ET0_ETXD5_B_MARK
- ET0_ETXD6_A_MARK
- ET0_ETXD6_B_MARK
- ET0_ETXD7_MARK
- ET0_GTX_CLK_A_MARK
- ET0_GTX_CLK_B_MARK
- ET0_LINK_A_MARK
- ET0_LINK_B_MARK
- ET0_LINK_C_MARK
- ET0_MAGIC_A_MARK
- ET0_MAGIC_B_MARK
- ET0_MAGIC_C_MARK
- ET0_MDC_MARK
- ET0_MDIO_A_MARK
- ET0_MDIO_B_MARK
- ET0_MDIO_MARK
- ET0_PHY_INT_A_MARK
- ET0_PHY_INT_B_MARK
- ET0_PHY_INT_C_MARK
- ET0_RX_CLK_A_MARK
- ET0_RX_CLK_B_MARK
- ET0_RX_DV_MARK
- ET0_RX_ER_MARK
- ET0_TX_CLK_A_MARK
- ET0_TX_CLK_B_MARK
- ET0_TX_EN_MARK
- ET0_TX_ER_MARK
- ET1011C_CONFIG_REG
- ET1011C_GIGABIT_SPEED
- ET1011C_GMII_INTERFACE
- ET1011C_INTERFACE_MASK
- ET1011C_SPEED_MASK
- ET1011C_STATUS_REG
- ET1011C_SYS_CLK_EN
- ET1011C_TX_FIFO_DEPTH_16
- ET1011C_TX_FIFO_DEPTH_8
- ET1011C_TX_FIFO_MASK
- ET1310_PCI_ACK_NACK
- ET1310_PCI_EEPROM_STATUS
- ET1310_PCI_L0L1LATENCY
- ET1310_PCI_MAC_ADDRESS
- ET1310_PCI_REPLAY
- ET131X_MAX_MTU
- ET131X_MIN_MTU
- ET131X_PACKET_TYPE_ALL_MULTICAST
- ET131X_PACKET_TYPE_BROADCAST
- ET131X_PACKET_TYPE_DIRECTED
- ET131X_PACKET_TYPE_MULTICAST
- ET131X_PACKET_TYPE_PROMISCUOUS
- ET131X_PCI_DEVICE_ID_FAST
- ET131X_PCI_DEVICE_ID_GIG
- ET131X_REGS_LEN
- ET131X_TX_TIMEOUT
- ET1_MDC_MARK
- ET1_MDIO_MARK
- ET8EK8REGS_H
- ET8EK8_I2C_DELAY
- ET8EK8_MAX_LEN
- ET8EK8_MAX_MSG
- ET8EK8_NAME
- ET8EK8_PRIV_MEM_SIZE
- ET8EK8_REGLIST_ANR_DISABLE
- ET8EK8_REGLIST_ANR_ENABLE
- ET8EK8_REGLIST_DISABLED
- ET8EK8_REGLIST_LSC_DISABLE
- ET8EK8_REGLIST_LSC_ENABLE
- ET8EK8_REGLIST_MODE
- ET8EK8_REGLIST_POWERON
- ET8EK8_REGLIST_RESUME
- ET8EK8_REGLIST_STANDBY
- ET8EK8_REGLIST_STREAMOFF
- ET8EK8_REGLIST_STREAMON
- ET8EK8_REG_16BIT
- ET8EK8_REG_8BIT
- ET8EK8_REG_DELAY
- ET8EK8_REG_TERM
- ET8EK8_REV_1
- ET8EK8_REV_2
- ETAG_CTRL_P
- ETAG_CTRL_P_MASK
- ETBR_ALIGNMENT
- ETBR_L_RINGSZ128
- ETBR_L_RINGSZ512
- ETBR_L_RINGSZ_MASK
- ETBR_L_TXRINGBASE_MASK
- ETB_CTL_CAPT_EN
- ETB_CTL_REG
- ETB_FFCR
- ETB_FFCR_BIT
- ETB_FFCR_EN_FTC
- ETB_FFCR_FON_MAN
- ETB_FFCR_STOP_FI
- ETB_FFCR_STOP_TRIGGER
- ETB_FFSR
- ETB_FFSR_BIT
- ETB_FRAME_SIZE_WORDS
- ETB_ITATBCTR0
- ETB_ITATBCTR1
- ETB_ITATBCTR2
- ETB_ITATBDATA0
- ETB_ITMISCOP0
- ETB_ITTRFLIN
- ETB_ITTRFLINACK
- ETB_RAM_DEPTH_REG
- ETB_RAM_READ_DATA_REG
- ETB_RAM_READ_POINTER
- ETB_RAM_WRITE_POINTER
- ETB_RWD_REG
- ETB_STATUS_RAM_FULL
- ETB_STATUS_REG
- ETB_TRG
- ETC
- ETCDC_COLLCNT_MASK
- ETCDC_DEFERCNT_MASK
- ETCDC_DEFERCNT_SHIFT
- ETCIR_IDLE
- ETCIR_TXCONSUME_MASK
- ETCSR_FD
- ETCSR_HD
- ETCSR_IPGR1_MASK
- ETCSR_IPGR1_SHIFT
- ETCSR_IPGR2_MASK
- ETCSR_IPGR2_SHIFT
- ETCSR_IPGT_MASK
- ETCSR_NOTXCLK
- ETDES0_CHECKSUM_INSERTION_MASK
- ETDES0_CHECKSUM_INSERTION_SHIFT
- ETDES0_COLLISION_COUNT_MASK
- ETDES0_CRC_DISABLE
- ETDES0_DEFERRED
- ETDES0_DISABLE_PADDING
- ETDES0_END_RING
- ETDES0_ERROR_SUMMARY
- ETDES0_EXCESSIVE_COLLISIONS
- ETDES0_EXCESSIVE_DEFERRAL
- ETDES0_FIRST_SEGMENT
- ETDES0_FRAME_FLUSHED
- ETDES0_INTERRUPT
- ETDES0_IP_HEADER_ERROR
- ETDES0_JABBER_TIMEOUT
- ETDES0_LAST_SEGMENT
- ETDES0_LATE_COLLISION
- ETDES0_LOSS_CARRIER
- ETDES0_NO_CARRIER
- ETDES0_OWN
- ETDES0_PAYLOAD_ERROR
- ETDES0_SECOND_ADDRESS_CHAINED
- ETDES0_TIME_STAMP_ENABLE
- ETDES0_TIME_STAMP_STATUS
- ETDES0_UNDERFLOW_ERROR
- ETDES0_VLAN_FRAME
- ETDES1_BUFFER1_SIZE_MASK
- ETDES1_BUFFER2_SIZE_MASK
- ETDES1_BUFFER2_SIZE_SHIFT
- ETDUMP_BUF_BO
- ETDUMP_BUF_BOMAP
- ETDUMP_BUF_CMD
- ETDUMP_BUF_END
- ETDUMP_BUF_MMU
- ETDUMP_BUF_REG
- ETDUMP_BUF_RING
- ETDUMP_MAGIC
- ETEP1
- ETEP2
- ETEXT_ALIGN_SIZE
- ETH
- ETH0_BASE_ADDR
- ETH0_DMA_RX_IRQ
- ETH0_DMA_TX_IRQ
- ETH0_IRQ
- ETH0_RX_DMA_ADDR
- ETH0_RX_OVR_IRQ
- ETH0_TX_DMA_ADDR
- ETH0_TX_UND_IRQ
- ETH1MAC_CK
- ETH1RX_CK
- ETH1TX_CK
- ETH1_IRQ
- ETHCK
- ETHCK_K
- ETHEN
- ETHEND
- ETHER0_CLOCK
- ETHER1_CLOCK
- ETHER1_RAM
- ETHERC
- ETHERCARD_TOTAL_SIZE
- ETHERCAT_MASTER_ID
- ETHERCRC
- ETHERH500_CTRLPORT
- ETHERH500_DATAPORT
- ETHERH500_NS8390
- ETHERH600_CTRLPORT
- ETHERH600_DATAPORT
- ETHERH600_NS8390
- ETHERH_CP_HEARTBEAT
- ETHERH_CP_IE
- ETHERH_CP_IF
- ETHERH_STOP_PAGE
- ETHERH_TX_START_PAGE
- ETHERMINPACKET
- ETHERMTU
- ETHERM_CTRLPORT
- ETHERM_DATAPORT
- ETHERM_NS8390
- ETHERM_STOP_PAGE
- ETHERM_TX_START_PAGE
- ETHERNET_ADDRESS
- ETHERNET_ARP_TYPE
- ETHERNET_CRC_SIZE
- ETHERNET_FCS_SIZE
- ETHERNET_HDR_LEN
- ETHERNET_HEADER_SIZE
- ETHERNET_IEEE_VLAN_TYPE
- ETHERNET_IP_TYPE
- ETHERNET_IRQ
- ETHERNET_IRQ_EDGE
- ETHERPORTSR_OFS
- ETHERTYPE_F
- ETHERTYPE_IP
- ETHERTYPE_IPV4
- ETHERTYPE_IPV6
- ETHERTYPE_PAE
- ETHERTYPE_S
- ETHERTYPE_V
- ETHER_ADDR_LEN
- ETHER_ADDR_STR_LEN
- ETHER_FLOW
- ETHER_HDR_SIZE
- ETHER_MAX_LEN
- ETHER_MIN_PACKET
- ETHER_STD_PACKET
- ETHER_TYPE_FULL_MASK
- ETHHDR_LEN
- ETHHDR_POS
- ETHI
- ETHMAC
- ETHMAC_R
- ETHMAC_SPEED_100
- ETHOC_BD_BASE
- ETHOC_BUFSIZ
- ETHOC_MII_TIMEOUT
- ETHOC_TIMEOUT
- ETHOC_ZLEN
- ETHOFFSET
- ETHPORT_E_DOWN
- ETHPORT_E_FAIL
- ETHPORT_E_FWRESP_DOWN
- ETHPORT_E_FWRESP_UP_FAIL
- ETHPORT_E_FWRESP_UP_OK
- ETHPORT_E_START
- ETHPORT_E_STOP
- ETHPORT_E_UP
- ETHPTP_K
- ETHRST
- ETHRX
- ETHSTP
- ETHSW_L2_MAX_FRM
- ETHSW_MAX_FRAME_LENGTH
- ETHSW_MIB_RX_1024_1522
- ETHSW_MIB_RX_128_255
- ETHSW_MIB_RX_1523_2047
- ETHSW_MIB_RX_2048_4095
- ETHSW_MIB_RX_256_511
- ETHSW_MIB_RX_4096_8191
- ETHSW_MIB_RX_512_1023
- ETHSW_MIB_RX_64
- ETHSW_MIB_RX_65_127
- ETHSW_MIB_RX_8192_9728
- ETHSW_MIB_RX_ALIGN
- ETHSW_MIB_RX_ALL_OCT
- ETHSW_MIB_RX_BRDCAST
- ETHSW_MIB_RX_CRC
- ETHSW_MIB_RX_DROP
- ETHSW_MIB_RX_FRAG
- ETHSW_MIB_RX_GD_OCT
- ETHSW_MIB_RX_JAB
- ETHSW_MIB_RX_MULT
- ETHSW_MIB_RX_OVR
- ETHSW_MIB_RX_OVR_DISC
- ETHSW_MIB_RX_PAUSE
- ETHSW_MIB_RX_QOS_OCT
- ETHSW_MIB_RX_QOS_PKTS
- ETHSW_MIB_RX_SA_CHANGE
- ETHSW_MIB_RX_SYM
- ETHSW_MIB_RX_UND
- ETHSW_MIB_RX_UNI
- ETHSW_MIB_TX_1_COL
- ETHSW_MIB_TX_ALL_OCT
- ETHSW_MIB_TX_BRDCAST
- ETHSW_MIB_TX_COL
- ETHSW_MIB_TX_DEF
- ETHSW_MIB_TX_DROP_PKTS
- ETHSW_MIB_TX_EX_COL
- ETHSW_MIB_TX_LATE
- ETHSW_MIB_TX_MULT
- ETHSW_MIB_TX_M_COL
- ETHSW_MIB_TX_PAUSE
- ETHSW_MIB_TX_QOS_OCT
- ETHSW_MIB_TX_QOS_PKTS
- ETHSW_MIB_TX_UNI
- ETHSW_NUM_COUNTERS
- ETHSW_VLAN_GLOBAL
- ETHSW_VLAN_MEMBER
- ETHSW_VLAN_PVID
- ETHSW_VLAN_UNTAGGED
- ETHSYS_CHIPID0_3
- ETHSYS_CHIPID4_7
- ETHSYS_CLKCFG0
- ETHSYS_RSTCTRL
- ETHSYS_SYSCFG
- ETHSYS_SYSCFG0
- ETHSYS_TRGMII_CLK_SEL362_5
- ETHSYS_TRGMII_MT7621_APLL
- ETHSYS_TRGMII_MT7621_DDR_PLL
- ETHSYS_TRGMII_MT7621_MASK
- ETHTOOL_ALL_COPPER_SPEED
- ETHTOOL_ALL_FIBRE_SPEED
- ETHTOOL_BUSINFO_LEN
- ETHTOOL_DEV_FEATURE_WORDS
- ETHTOOL_DMA_OFFSET
- ETHTOOL_EROMVERS_LEN
- ETHTOOL_FEC_AUTO
- ETHTOOL_FEC_AUTO_BIT
- ETHTOOL_FEC_BASER
- ETHTOOL_FEC_BASER_BIT
- ETHTOOL_FEC_NONE
- ETHTOOL_FEC_NONE_BIT
- ETHTOOL_FEC_OFF
- ETHTOOL_FEC_OFF_BIT
- ETHTOOL_FEC_RS
- ETHTOOL_FEC_RS_BIT
- ETHTOOL_FLASHDEV
- ETHTOOL_FLASH_ALL_REGIONS
- ETHTOOL_FLASH_MAX_FILENAME
- ETHTOOL_FWVERS_LEN
- ETHTOOL_F_COMPAT
- ETHTOOL_F_COMPAT__BIT
- ETHTOOL_F_UNSUPPORTED
- ETHTOOL_F_UNSUPPORTED__BIT
- ETHTOOL_F_WISH
- ETHTOOL_F_WISH__BIT
- ETHTOOL_GCHANNELS
- ETHTOOL_GCOALESCE
- ETHTOOL_GDRVINFO
- ETHTOOL_GEEE
- ETHTOOL_GEEPROM
- ETHTOOL_GET_DUMP_DATA
- ETHTOOL_GET_DUMP_FLAG
- ETHTOOL_GET_TS_INFO
- ETHTOOL_GFEATURES
- ETHTOOL_GFECPARAM
- ETHTOOL_GFLAGS
- ETHTOOL_GGRO
- ETHTOOL_GGSO
- ETHTOOL_GLINK
- ETHTOOL_GLINKSETTINGS
- ETHTOOL_GMODULEEEPROM
- ETHTOOL_GMODULEINFO
- ETHTOOL_GMSGLVL
- ETHTOOL_GPAUSEPARAM
- ETHTOOL_GPERMADDR
- ETHTOOL_GPFLAGS
- ETHTOOL_GPHYSTATS
- ETHTOOL_GREGS
- ETHTOOL_GRINGPARAM
- ETHTOOL_GRSSH
- ETHTOOL_GRXCLSRLALL
- ETHTOOL_GRXCLSRLCNT
- ETHTOOL_GRXCLSRULE
- ETHTOOL_GRXCSUM
- ETHTOOL_GRXFH
- ETHTOOL_GRXFHINDIR
- ETHTOOL_GRXNTUPLE
- ETHTOOL_GRXRINGS
- ETHTOOL_GSET
- ETHTOOL_GSG
- ETHTOOL_GSSET_INFO
- ETHTOOL_GSTATS
- ETHTOOL_GSTRINGS
- ETHTOOL_GTSO
- ETHTOOL_GTUNABLE
- ETHTOOL_GTXCSUM
- ETHTOOL_GUFO
- ETHTOOL_GWOL
- ETHTOOL_ID_ACTIVE
- ETHTOOL_ID_INACTIVE
- ETHTOOL_ID_OFF
- ETHTOOL_ID_ON
- ETHTOOL_ID_UNSPEC
- ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT
- ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT
- ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT
- ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT
- ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT
- ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT
- ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT
- ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT
- ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT
- ETHTOOL_LINK_MODE_10000baseCR_Full_BIT
- ETHTOOL_LINK_MODE_10000baseER_Full_BIT
- ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
- ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT
- ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT
- ETHTOOL_LINK_MODE_10000baseLR_Full_BIT
- ETHTOOL_LINK_MODE_10000baseR_FEC_BIT
- ETHTOOL_LINK_MODE_10000baseSR_Full_BIT
- ETHTOOL_LINK_MODE_10000baseT_Full_BIT
- ETHTOOL_LINK_MODE_1000baseKX_Full_BIT
- ETHTOOL_LINK_MODE_1000baseT1_Full_BIT
- ETHTOOL_LINK_MODE_1000baseT_Full_BIT
- ETHTOOL_LINK_MODE_1000baseT_Half_BIT
- ETHTOOL_LINK_MODE_1000baseX_Full_BIT
- ETHTOOL_LINK_MODE_100baseT1_Full_BIT
- ETHTOOL_LINK_MODE_100baseT_Full_BIT
- ETHTOOL_LINK_MODE_100baseT_Half_BIT
- ETHTOOL_LINK_MODE_10baseT_Full_BIT
- ETHTOOL_LINK_MODE_10baseT_Half_BIT
- ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT
- ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT
- ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT
- ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT
- ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT
- ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT
- ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT
- ETHTOOL_LINK_MODE_25000baseCR_Full_BIT
- ETHTOOL_LINK_MODE_25000baseKR_Full_BIT
- ETHTOOL_LINK_MODE_25000baseSR_Full_BIT
- ETHTOOL_LINK_MODE_2500baseT_Full_BIT
- ETHTOOL_LINK_MODE_2500baseX_Full_BIT
- ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT
- ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT
- ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT
- ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT
- ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT
- ETHTOOL_LINK_MODE_50000baseCR_Full_BIT
- ETHTOOL_LINK_MODE_50000baseDR_Full_BIT
- ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT
- ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
- ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT
- ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT
- ETHTOOL_LINK_MODE_50000baseSR_Full_BIT
- ETHTOOL_LINK_MODE_5000baseT_Full_BIT
- ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT
- ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT
- ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT
- ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT
- ETHTOOL_LINK_MODE_AUI_BIT
- ETHTOOL_LINK_MODE_Asym_Pause_BIT
- ETHTOOL_LINK_MODE_Autoneg_BIT
- ETHTOOL_LINK_MODE_BNC_BIT
- ETHTOOL_LINK_MODE_Backplane_BIT
- ETHTOOL_LINK_MODE_FEC_BASER_BIT
- ETHTOOL_LINK_MODE_FEC_NONE_BIT
- ETHTOOL_LINK_MODE_FEC_RS_BIT
- ETHTOOL_LINK_MODE_FIBRE_BIT
- ETHTOOL_LINK_MODE_MII_BIT
- ETHTOOL_LINK_MODE_Pause_BIT
- ETHTOOL_LINK_MODE_TP_BIT
- ETHTOOL_MAX_STATS
- ETHTOOL_MIN_LEVEL
- ETHTOOL_NUM_L2_FTS
- ETHTOOL_NUM_L3_L4_FTS
- ETHTOOL_NUM_PRIOS
- ETHTOOL_NWAY_RST
- ETHTOOL_PERQUEUE
- ETHTOOL_PFC_PREVENTION_TOUT
- ETHTOOL_PHYS_ID
- ETHTOOL_PHY_DOWNSHIFT
- ETHTOOL_PHY_EDPD
- ETHTOOL_PHY_EDPD_DFLT_TX_MSECS
- ETHTOOL_PHY_EDPD_DISABLE
- ETHTOOL_PHY_EDPD_NO_TX
- ETHTOOL_PHY_FAST_LINK_DOWN
- ETHTOOL_PHY_FAST_LINK_DOWN_OFF
- ETHTOOL_PHY_FAST_LINK_DOWN_ON
- ETHTOOL_PHY_GTUNABLE
- ETHTOOL_PHY_ID_UNSPEC
- ETHTOOL_PHY_STUNABLE
- ETHTOOL_PRIO_NUM_LEVELS
- ETHTOOL_RESET
- ETHTOOL_RXNTUPLE_ACTION_CLEAR
- ETHTOOL_RXNTUPLE_ACTION_DROP
- ETHTOOL_RXSTATS_NUM
- ETHTOOL_RX_COPYBREAK
- ETHTOOL_RX_FLOW_SPEC_RING
- ETHTOOL_RX_FLOW_SPEC_RING_VF
- ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF
- ETHTOOL_SCHANNELS
- ETHTOOL_SCOALESCE
- ETHTOOL_SEEE
- ETHTOOL_SEEPROM
- ETHTOOL_SET_DUMP
- ETHTOOL_SFEATURES
- ETHTOOL_SFECPARAM
- ETHTOOL_SFLAGS
- ETHTOOL_SGRO
- ETHTOOL_SGSO
- ETHTOOL_SLINKSETTINGS
- ETHTOOL_SMSGLVL
- ETHTOOL_SPAUSEPARAM
- ETHTOOL_SPFLAGS
- ETHTOOL_SRINGPARAM
- ETHTOOL_SRSSH
- ETHTOOL_SRXCLSRLDEL
- ETHTOOL_SRXCLSRLINS
- ETHTOOL_SRXCSUM
- ETHTOOL_SRXFH
- ETHTOOL_SRXFHINDIR
- ETHTOOL_SRXNTUPLE
- ETHTOOL_SSET
- ETHTOOL_SSG
- ETHTOOL_STATS_NUM
- ETHTOOL_STAT_EEE_WAKEUP
- ETHTOOL_STAT_REFILL_ERR
- ETHTOOL_STAT_SKB_ALLOC_ERR
- ETHTOOL_STSO
- ETHTOOL_STUNABLE
- ETHTOOL_STXCSUM
- ETHTOOL_SUFO
- ETHTOOL_SWOL
- ETHTOOL_TEST
- ETHTOOL_TESTS_NUM
- ETHTOOL_TUNABLE_S16
- ETHTOOL_TUNABLE_S32
- ETHTOOL_TUNABLE_S64
- ETHTOOL_TUNABLE_S8
- ETHTOOL_TUNABLE_STRING
- ETHTOOL_TUNABLE_U16
- ETHTOOL_TUNABLE_U32
- ETHTOOL_TUNABLE_U64
- ETHTOOL_TUNABLE_U8
- ETHTOOL_TUNABLE_UNSPEC
- ETHTOOL_TXSTATS_NUM
- ETHTOOL_TX_COPYBREAK
- ETHTX
- ETHTXQ_MAX_FLITS
- ETHTXQ_MAX_FRAGS
- ETHTXQ_MAX_HDR
- ETHTXQ_MAX_SGL_LEN
- ETHTXQ_STOP_THRES
- ETHTYPE_BITWIDTH
- ETH_2ND_PARSE_BD_TYPE_LSO_TUNNEL
- ETH_ADDR_LEN
- ETH_AGG_END_LAST_SEG
- ETH_AGG_END_MAX_LEN
- ETH_AGG_END_NON_TPA_SEG
- ETH_AGG_END_NOT_CONSISTENT
- ETH_AGG_END_OUT_OF_ORDER
- ETH_AGG_END_SP_UPDATE
- ETH_AGG_END_TIMEOUT
- ETH_AGG_END_UNUSED
- ETH_ALEN
- ETH_ALL_FEATURES
- ETH_ALL_FLAGS
- ETH_ANTI_SPOOFING_ERR
- ETH_ARC_AB
- ETH_ARC_AFM
- ETH_ARC_AM
- ETH_ARC_PRO
- ETH_BCAST
- ETH_CACHE_LINE_SIZE
- ETH_CFSA0_CFSA4
- ETH_CFSA0_CFSA5
- ETH_CFSA1_CFSA0
- ETH_CFSA1_CFSA1
- ETH_CFSA1_CFSA2
- ETH_CFSA1_CFSA3
- ETH_CLASSIFY_CMD_HEADER_IS_ADD
- ETH_CLASSIFY_CMD_HEADER_IS_ADD_SHIFT
- ETH_CLASSIFY_CMD_HEADER_OPCODE
- ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT
- ETH_CLASSIFY_CMD_HEADER_RESERVED0
- ETH_CLASSIFY_CMD_HEADER_RESERVED0_SHIFT
- ETH_CLASSIFY_CMD_HEADER_RX_CMD
- ETH_CLASSIFY_CMD_HEADER_RX_CMD_SHIFT
- ETH_CLASSIFY_CMD_HEADER_TX_CMD
- ETH_CLASSIFY_CMD_HEADER_TX_CMD_SHIFT
- ETH_CLRT_COL_WIN
- ETH_CLRT_MAX_RET
- ETH_COL_MARK
- ETH_CONF
- ETH_CONFIG_PKT_HDR_LEN
- ETH_CONFIG_PKT_HDR_OFFSET
- ETH_CONNECTION_TYPE
- ETH_CONTROL_PACKET_VIOLATION
- ETH_CRC32_HASH_BIT_SIZE
- ETH_CRC32_HASH_MASK
- ETH_CRC32_HASH_SEED
- ETH_CRC_LEN
- ETH_CRS_DV
- ETH_CRS_DV_B_MARK
- ETH_CRS_DV_MARK
- ETH_CRS_MARK
- ETH_CTL_FRAME_ETH_TYPE_NUM
- ETH_C_RX_DESC_0
- ETH_C_TX_DESC_1
- ETH_DATA_LEN
- ETH_DB_DATA_AGG_CMD_MASK
- ETH_DB_DATA_AGG_CMD_SHIFT
- ETH_DB_DATA_AGG_VAL_SEL_MASK
- ETH_DB_DATA_AGG_VAL_SEL_SHIFT
- ETH_DB_DATA_BYPASS_EN_MASK
- ETH_DB_DATA_BYPASS_EN_SHIFT
- ETH_DB_DATA_DEST_MASK
- ETH_DB_DATA_DEST_SHIFT
- ETH_DB_DATA_RESERVED_MASK
- ETH_DB_DATA_RESERVED_SHIFT
- ETH_DLY_GTXC_ENABLE
- ETH_DLY_GTXC_INV
- ETH_DLY_GTXC_STAGES
- ETH_DLY_RXC_ENABLE
- ETH_DLY_RXC_INV
- ETH_DLY_RXC_STAGES
- ETH_DLY_TXC_ENABLE
- ETH_DLY_TXC_INV
- ETH_DLY_TXC_STAGES
- ETH_DMAC_31_0
- ETH_DMAC_47_32
- ETH_DUMP_REG
- ETH_EDPM_OUT_OF_SYNC
- ETH_EEE_MODE_ADV_LPI
- ETH_ENCAP_HDR_SIZE
- ETH_END
- ETH_END_AGG_RX_CQE_RESERVED0
- ETH_END_AGG_RX_CQE_RESERVED0_SHIFT
- ETH_END_AGG_RX_CQE_SGL_RAW_SEL
- ETH_END_AGG_RX_CQE_SGL_RAW_SEL_SHIFT
- ETH_END_AGG_RX_CQE_TYPE
- ETH_END_AGG_RX_CQE_TYPE_SHIFT
- ETH_ETHERNET_HDR_OFFSET
- ETH_EVENT_FILTERS_UPDATE
- ETH_EVENT_RX_ADD_OPENFLOW_FILTER
- ETH_EVENT_RX_ADD_UDP_FILTER
- ETH_EVENT_RX_CREATE_GFT_ACTION
- ETH_EVENT_RX_CREATE_OPENFLOW_ACTION
- ETH_EVENT_RX_DELETE_OPENFLOW_FILTER
- ETH_EVENT_RX_DELETE_UDP_FILTER
- ETH_EVENT_RX_GFT_UPDATE_FILTER
- ETH_EVENT_RX_QUEUE_START
- ETH_EVENT_RX_QUEUE_STOP
- ETH_EVENT_RX_QUEUE_UPDATE
- ETH_EVENT_TX_QUEUE_START
- ETH_EVENT_TX_QUEUE_STOP
- ETH_EVENT_TX_QUEUE_UPDATE
- ETH_EVENT_UNUSED
- ETH_EVENT_VPORT_START
- ETH_EVENT_VPORT_STOP
- ETH_EVENT_VPORT_UPDATE
- ETH_FAST_PATH_RX_CQE_BROADCAST_FLG
- ETH_FAST_PATH_RX_CQE_BROADCAST_FLG_SHIFT
- ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG
- ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT
- ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG
- ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG_SHIFT
- ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG
- ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT
- ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG
- ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG_SHIFT
- ETH_FAST_PATH_RX_CQE_MAC_MATCH_FLG
- ETH_FAST_PATH_RX_CQE_MAC_MATCH_FLG_SHIFT
- ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG
- ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT
- ETH_FAST_PATH_RX_CQE_PTP_PKT
- ETH_FAST_PATH_RX_CQE_PTP_PKT_SHIFT
- ETH_FAST_PATH_RX_CQE_RESERVED0
- ETH_FAST_PATH_RX_CQE_RESERVED0_SHIFT
- ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG
- ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG_SHIFT
- ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE
- ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE_SHIFT
- ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL
- ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL_SHIFT
- ETH_FAST_PATH_RX_CQE_TYPE
- ETH_FAST_PATH_RX_CQE_TYPE_SHIFT
- ETH_FAST_PATH_RX_REG_CQE_RESERVED0_MASK
- ETH_FAST_PATH_RX_REG_CQE_RESERVED0_SHIFT
- ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_MASK
- ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_SHIFT
- ETH_FAST_PATH_RX_REG_CQE_TC_MASK
- ETH_FAST_PATH_RX_REG_CQE_TC_SHIFT
- ETH_FAST_PATH_RX_TPA_START_CQE_RESERVED0_MASK
- ETH_FAST_PATH_RX_TPA_START_CQE_RESERVED0_SHIFT
- ETH_FAST_PATH_RX_TPA_START_CQE_RSS_HASH_TYPE_MASK
- ETH_FAST_PATH_RX_TPA_START_CQE_RSS_HASH_TYPE_SHIFT
- ETH_FAST_PATH_RX_TPA_START_CQE_TC_MASK
- ETH_FAST_PATH_RX_TPA_START_CQE_TC_SHIFT
- ETH_FCS_LEN
- ETH_FIFI_TT_TTH_BIT
- ETH_FIFO_TT_TTH
- ETH_FILTERS_GFT_UPDATE_FAIL
- ETH_FILTERS_MAC_ADD_FAIL_DUP_MTT2
- ETH_FILTERS_MAC_ADD_FAIL_DUP_STT2
- ETH_FILTERS_MAC_ADD_FAIL_FULL
- ETH_FILTERS_MAC_ADD_FAIL_FULL_MTT2
- ETH_FILTERS_MAC_ADD_FAIL_ZERO_MAC
- ETH_FILTERS_MAC_DEL_FAIL_NOF
- ETH_FILTERS_MAC_DEL_FAIL_NOF_MTT2
- ETH_FILTERS_MAC_DEL_FAIL_NOF_STT2
- ETH_FILTERS_PAIR_ADD_FAIL_DUP
- ETH_FILTERS_PAIR_ADD_FAIL_FULL
- ETH_FILTERS_PAIR_ADD_FAIL_FULL_MAC
- ETH_FILTERS_PAIR_ADD_FAIL_ZERO_MAC
- ETH_FILTERS_PAIR_DEL_FAIL_NOF
- ETH_FILTERS_PAIR_DEL_FAIL_NOF_TT1
- ETH_FILTERS_VLAN_ADD_FAIL_DUP
- ETH_FILTERS_VLAN_ADD_FAIL_FULL
- ETH_FILTERS_VLAN_DEL_FAIL_NOF
- ETH_FILTERS_VLAN_DEL_FAIL_NOF_TT1
- ETH_FILTERS_VNI_ADD_FAIL_DUP
- ETH_FILTERS_VNI_ADD_FAIL_FULL
- ETH_FILTER_ACTION_ADD
- ETH_FILTER_ACTION_REMOVE
- ETH_FILTER_ACTION_REMOVE_ALL
- ETH_FILTER_ACTION_UNUSED
- ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN
- ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN_SHIFT
- ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL
- ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL_SHIFT
- ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL
- ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL_SHIFT
- ETH_FILTER_RULES_CMD_MCAST_DROP_ALL
- ETH_FILTER_RULES_CMD_MCAST_DROP_ALL_SHIFT
- ETH_FILTER_RULES_CMD_RESERVED0
- ETH_FILTER_RULES_CMD_RESERVED0_SHIFT
- ETH_FILTER_RULES_CMD_RESERVED2
- ETH_FILTER_RULES_CMD_RESERVED2_SHIFT
- ETH_FILTER_RULES_CMD_RX_CMD
- ETH_FILTER_RULES_CMD_RX_CMD_SHIFT
- ETH_FILTER_RULES_CMD_TX_CMD
- ETH_FILTER_RULES_CMD_TX_CMD_SHIFT
- ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL
- ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL_SHIFT
- ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED
- ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED_SHIFT
- ETH_FILTER_RULES_CMD_UCAST_DROP_ALL
- ETH_FILTER_RULES_CMD_UCAST_DROP_ALL_SHIFT
- ETH_FILTER_RULES_COUNT
- ETH_FILTER_TYPE_INNER_MAC
- ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR
- ETH_FILTER_TYPE_INNER_PAIR
- ETH_FILTER_TYPE_INNER_VLAN
- ETH_FILTER_TYPE_MAC
- ETH_FILTER_TYPE_MAC_VNI_PAIR
- ETH_FILTER_TYPE_PAIR
- ETH_FILTER_TYPE_UNUSED
- ETH_FILTER_TYPE_VLAN
- ETH_FILTER_TYPE_VNI
- ETH_FINE_DLY_GTXC
- ETH_FINE_DLY_RXC
- ETH_FIRST_BD_WO_SOP
- ETH_FLAG_LRO
- ETH_FLAG_NTUPLE
- ETH_FLAG_RXHASH
- ETH_FLAG_RXVLAN
- ETH_FLAG_TXVLAN
- ETH_FP_CQE_RAW
- ETH_FP_CQE_REGULAR
- ETH_FP_HSI_VERSION
- ETH_FP_HSI_VER_0
- ETH_FP_HSI_VER_1
- ETH_FP_HSI_VER_2
- ETH_FRAME_LEN
- ETH_FW_DUMP_DISABLE
- ETH_F_RX_DESC_0
- ETH_GFT_TRASHCAN_VPORT
- ETH_GMAC_DUMP_NUM
- ETH_GPF_PTV
- ETH_GSTRING_LEN
- ETH_HASH0
- ETH_HASH1
- ETH_HASH_ENTRY_OBJ
- ETH_HDR_LEN_G
- ETH_HDR_LEN_M
- ETH_HDR_LEN_S
- ETH_HDR_LEN_V
- ETH_HEADER_ETHERTAP
- ETH_HEADER_OTHER
- ETH_HLEN
- ETH_HSI_VER_MAJOR
- ETH_HSI_VER_MINOR
- ETH_HSI_VER_NO_PKT_LEN_TUNN
- ETH_HW_IP_ALIGN
- ETH_H_LEN
- ETH_ILLEGAL_BD_LENGTHS
- ETH_ILLEGAL_ETH_TYPE
- ETH_ILLEGAL_INBAND_TAGS
- ETH_ILLEGAL_LSO_HDR_LEN
- ETH_ILLEGAL_LSO_HDR_NBDS
- ETH_ILLEGAL_LSO_MSS
- ETH_ILLEGAL_NBDS
- ETH_ILLEGAL_PARSE_NBDS
- ETH_ILLEGAL_VLAN_MODE
- ETH_INSUFFICIENT_BDS
- ETH_INSUFFICIENT_PAYLOAD
- ETH_INT_FC_EN
- ETH_INT_FC_IOC
- ETH_INT_FC_ITS
- ETH_INT_FC_JAM
- ETH_INT_FC_OVR
- ETH_INT_FC_RIP
- ETH_INT_FC_UND
- ETH_IN_TO_IN_PRI_MAP_UPDATE_DISABLED
- ETH_IN_TO_IN_PRI_MAP_UPDATE_NON_RDMA_TBL
- ETH_IN_TO_IN_PRI_MAP_UPDATE_RDMA_TBL
- ETH_IPGR_IPGR1
- ETH_IPGR_IPGR2
- ETH_IPGT
- ETH_IPV4
- ETH_IPV4_FIRST_FRAG
- ETH_IPV4_NON_FIRST_FRAG
- ETH_IPV4_NOT_FRAG
- ETH_IPV6
- ETH_IPV6_AND_CHECKSUM
- ETH_IRQ_BIT
- ETH_JUMBO_MTU
- ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH
- ETH_L4_PSEUDO_CSUM_ZERO_LENGTH
- ETH_LINK_B_MARK
- ETH_LINK_MARK
- ETH_LOOPBACK_EXT
- ETH_LOOPBACK_EXT_PHY
- ETH_LOOPBACK_INT_PHY
- ETH_LOOPBACK_MAC
- ETH_LOOPBACK_NONE
- ETH_MAC1_LB
- ETH_MAC1_MR
- ETH_MAC1_PAF
- ETH_MAC1_RE
- ETH_MAC1_RFC
- ETH_MAC1_TFC
- ETH_MAC2_APE
- ETH_MAC2_BP
- ETH_MAC2_CEN
- ETH_MAC2_DC
- ETH_MAC2_ED
- ETH_MAC2_FD
- ETH_MAC2_FLC
- ETH_MAC2_HFE
- ETH_MAC2_LPE
- ETH_MAC2_NB
- ETH_MAC2_PE
- ETH_MAC2_PPE
- ETH_MAC2_VPE
- ETH_MAC_SER_REG
- ETH_MAGIC_B_MARK
- ETH_MAGIC_MARK
- ETH_MAXF
- ETH_MAX_AGGREGATION_QUEUES_E1
- ETH_MAX_AGGREGATION_QUEUES_E1H_E2
- ETH_MAX_JUMBO_PACKET_SIZE
- ETH_MAX_MTU
- ETH_MAX_NUM_RX_QUEUES_PER_VF_DEFAULT
- ETH_MAX_NUM_RX_QUEUES_PER_VF_DOUBLE
- ETH_MAX_NUM_RX_QUEUES_PER_VF_QUAD
- ETH_MAX_PACKET
- ETH_MAX_PACKET_SIZE
- ETH_MAX_RAMROD_PER_CON
- ETH_MAX_RX_CLIENTS_E1
- ETH_MAX_RX_CLIENTS_E1H
- ETH_MAX_RX_CLIENTS_E2
- ETH_MAX_TPA_HEADER_SIZE
- ETH_MAX_TUNN_LSO_INNER_IPV4_OFFSET
- ETH_MAX_TUNN_LSO_INNER_IPV6_OFFSET
- ETH_MCP_DIV
- ETH_MDC
- ETH_MDC_B_MARK
- ETH_MDC_MARK
- ETH_MDIO
- ETH_MDIO_B_MARK
- ETH_MDIO_MARK
- ETH_MDIO_SUPPORTS_C22
- ETH_MDIO_SUPPORTS_C45
- ETH_MIB_RX_1024_MAX
- ETH_MIB_RX_128_255
- ETH_MIB_RX_256_511
- ETH_MIB_RX_512_1023
- ETH_MIB_RX_64
- ETH_MIB_RX_65_127
- ETH_MIB_RX_ALIGN
- ETH_MIB_RX_ALL_OCTETS
- ETH_MIB_RX_ALL_PKTS
- ETH_MIB_RX_BRDCAST
- ETH_MIB_RX_CNTRL
- ETH_MIB_RX_CRC
- ETH_MIB_RX_CRC_ALIGN
- ETH_MIB_RX_DROP
- ETH_MIB_RX_FRAG
- ETH_MIB_RX_GD_OCTETS
- ETH_MIB_RX_GD_PKTS
- ETH_MIB_RX_JAB
- ETH_MIB_RX_MULT
- ETH_MIB_RX_OVR
- ETH_MIB_RX_PAUSE
- ETH_MIB_RX_SYM
- ETH_MIB_RX_UND
- ETH_MIB_TX_1024_MAX
- ETH_MIB_TX_128_255
- ETH_MIB_TX_1_COL
- ETH_MIB_TX_256_511
- ETH_MIB_TX_512_1023
- ETH_MIB_TX_64
- ETH_MIB_TX_65_127
- ETH_MIB_TX_ALL_OCTETS
- ETH_MIB_TX_ALL_PKTS
- ETH_MIB_TX_BRDCAST
- ETH_MIB_TX_COL
- ETH_MIB_TX_CRS
- ETH_MIB_TX_DEF
- ETH_MIB_TX_EX_COL
- ETH_MIB_TX_FRAG
- ETH_MIB_TX_GD_OCTETS
- ETH_MIB_TX_GD_PKTS
- ETH_MIB_TX_JAB
- ETH_MIB_TX_LATE
- ETH_MIB_TX_MULT
- ETH_MIB_TX_M_COL
- ETH_MIB_TX_OVR
- ETH_MIB_TX_PAUSE
- ETH_MIB_TX_UNDERRUN
- ETH_MII_CFG_RSVD
- ETH_MII_CMD_RD
- ETH_MII_CMD_SCN
- ETH_MII_IND_BSY
- ETH_MII_IND_NV
- ETH_MII_IND_SCN
- ETH_MII_PHY_ADDR
- ETH_MII_RDD_DATA
- ETH_MII_REG_ADDR
- ETH_MII_WTD_DATA
- ETH_MIN_DATA_SIZE
- ETH_MIN_MTU
- ETH_MIN_PACKET_SIZE
- ETH_MIN_RX_CQES_WITHOUT_TPA
- ETH_MIN_RX_CQES_WITH_TPA_E1
- ETH_MIN_RX_CQES_WITH_TPA_E1H_E2
- ETH_MODULE_SFF_8079
- ETH_MODULE_SFF_8079_LEN
- ETH_MODULE_SFF_8436
- ETH_MODULE_SFF_8436_LEN
- ETH_MODULE_SFF_8436_MAX_LEN
- ETH_MODULE_SFF_8472
- ETH_MODULE_SFF_8472_LEN
- ETH_MODULE_SFF_8636
- ETH_MODULE_SFF_8636_LEN
- ETH_MODULE_SFF_8636_MAX_LEN
- ETH_MTU_VIOLATION
- ETH_MULTICAST_BIN_FROM_MAC_SEED
- ETH_MULTICAST_MAC_BINS
- ETH_MULTICAST_MAC_BINS_IN_REGS
- ETH_MULTICAST_RULES_CMD_IS_ADD
- ETH_MULTICAST_RULES_CMD_IS_ADD_SHIFT
- ETH_MULTICAST_RULES_CMD_RESERVED0
- ETH_MULTICAST_RULES_CMD_RESERVED0_SHIFT
- ETH_MULTICAST_RULES_CMD_RX_CMD
- ETH_MULTICAST_RULES_CMD_RX_CMD_SHIFT
- ETH_MULTICAST_RULES_CMD_TX_CMD
- ETH_MULTICAST_RULES_CMD_TX_CMD_SHIFT
- ETH_NUM_MAC_FILTERS
- ETH_NUM_OF_MCAST_BINS
- ETH_NUM_OF_MCAST_ENGINES_E2
- ETH_NUM_OF_RSS_ENGINES_E2
- ETH_NUM_STATISTIC_COUNTERS
- ETH_NUM_STATISTIC_COUNTERS_DOUBLE_VF_ZONE
- ETH_NUM_STATISTIC_COUNTERS_QUAD_VF_ZONE
- ETH_NUM_VLAN_FILTERS
- ETH_OK
- ETH_OVERHEAD
- ETH_OVER_UDP_PORT
- ETH_PACKET_SIZE_TOO_LARGE
- ETH_PACKET_TOO_SHORT
- ETH_PACKET_TOO_SMALL
- ETH_PAUSE_AUTONEG
- ETH_PAUSE_NONE
- ETH_PAUSE_RX
- ETH_PAUSE_TX
- ETH_PAYLOAD_TOO_BIG
- ETH_PFS_PFD
- ETH_PF_PARAMS_VF_CONS_DEFAULT
- ETH_PHY_BASE_T
- ETH_PHY_CNTL0
- ETH_PHY_CNTL1
- ETH_PHY_CNTL2
- ETH_PHY_CX4
- ETH_PHY_DA_TWINAX
- ETH_PHY_KR
- ETH_PHY_NOT_PRESENT
- ETH_PHY_SEL_GMII
- ETH_PHY_SEL_MII
- ETH_PHY_SEL_RGMII
- ETH_PHY_SEL_RMII
- ETH_PHY_SEL_SGMII
- ETH_PHY_SFPP_10G_FIBER
- ETH_PHY_SFP_1G_FIBER
- ETH_PHY_UNSPECIFIED
- ETH_PHY_XFP_FIBER
- ETH_PLL_CTL0
- ETH_PLL_CTL1
- ETH_PLL_CTL2
- ETH_PLL_CTL3
- ETH_PLL_CTL4
- ETH_PLL_CTL5
- ETH_PLL_CTL6
- ETH_PLL_CTL7
- ETH_PLL_STS
- ETH_PMD_FLOW_FLAGS_RESERVED_MASK
- ETH_PMD_FLOW_FLAGS_RESERVED_SHIFT
- ETH_PMD_FLOW_FLAGS_TOGGLE_MASK
- ETH_PMD_FLOW_FLAGS_TOGGLE_SHIFT
- ETH_PMD_FLOW_FLAGS_VALID_MASK
- ETH_PMD_FLOW_FLAGS_VALID_SHIFT
- ETH_PME_BIT
- ETH_PPE_DUMP_NUM
- ETH_PPE_STATIC_NUM
- ETH_PROM_SIG
- ETH_P_1588
- ETH_P_80211_RAW
- ETH_P_80211_STATS
- ETH_P_8021AD
- ETH_P_8021AH
- ETH_P_8021Q
- ETH_P_80221
- ETH_P_802_2
- ETH_P_802_3
- ETH_P_802_3_MIN
- ETH_P_802_EX1
- ETH_P_AARP
- ETH_P_AF_IUCV
- ETH_P_ALL
- ETH_P_AOE
- ETH_P_ARCNET
- ETH_P_ARP
- ETH_P_ATALK
- ETH_P_ATMFATE
- ETH_P_ATMMPOA
- ETH_P_AX25
- ETH_P_BATMAN
- ETH_P_BPQ
- ETH_P_CAIF
- ETH_P_CAN
- ETH_P_CANFD
- ETH_P_CONTROL
- ETH_P_CPL5
- ETH_P_CUST
- ETH_P_DDCMP
- ETH_P_DEC
- ETH_P_DIAG
- ETH_P_DNA_DL
- ETH_P_DNA_RC
- ETH_P_DNA_RT
- ETH_P_DSA
- ETH_P_DSA_8021Q
- ETH_P_ECONET
- ETH_P_EDSA
- ETH_P_ERSPAN
- ETH_P_ERSPAN2
- ETH_P_FCOE
- ETH_P_FIP
- ETH_P_HDLC
- ETH_P_HOSTAP
- ETH_P_HSR
- ETH_P_IBOE
- ETH_P_IEEE802154
- ETH_P_IEEEPUP
- ETH_P_IEEEPUPAT
- ETH_P_IFE
- ETH_P_IP
- ETH_P_IPV6
- ETH_P_IPX
- ETH_P_IRDA
- ETH_P_LAT
- ETH_P_LINK_CTL
- ETH_P_LLDP
- ETH_P_LOCALTALK
- ETH_P_LOOP
- ETH_P_LOOPBACK
- ETH_P_MACSEC
- ETH_P_MAP
- ETH_P_MOBITEX
- ETH_P_MPLS_MC
- ETH_P_MPLS_UC
- ETH_P_MVRP
- ETH_P_NCSI
- ETH_P_NSH
- ETH_P_PAE
- ETH_P_PAUSE
- ETH_P_PHONET
- ETH_P_PPPTALK
- ETH_P_PPP_DISC
- ETH_P_PPP_MP
- ETH_P_PPP_SES
- ETH_P_PREAUTH
- ETH_P_PRP
- ETH_P_PUP
- ETH_P_PUPAT
- ETH_P_QINQ1
- ETH_P_QINQ2
- ETH_P_QINQ3
- ETH_P_RARP
- ETH_P_SCA
- ETH_P_SJA1105
- ETH_P_SJA1105_META
- ETH_P_SLOW
- ETH_P_SNAP
- ETH_P_SNA_DIX
- ETH_P_TDLS
- ETH_P_TEB
- ETH_P_TIPC
- ETH_P_TRAILER
- ETH_P_TR_802_2
- ETH_P_TSN
- ETH_P_WAN_PPP
- ETH_P_WAPI
- ETH_P_WCCP
- ETH_P_X25
- ETH_P_XDSA
- ETH_RAMROD_FILTERS_UPDATE
- ETH_RAMROD_GFT_UPDATE_FILTER
- ETH_RAMROD_RX_ADD_OPENFLOW_FILTER
- ETH_RAMROD_RX_ADD_UDP_FILTER
- ETH_RAMROD_RX_CREATE_GFT_ACTION
- ETH_RAMROD_RX_CREATE_OPENFLOW_ACTION
- ETH_RAMROD_RX_DELETE_OPENFLOW_FILTER
- ETH_RAMROD_RX_DELETE_UDP_FILTER
- ETH_RAMROD_RX_QUEUE_START
- ETH_RAMROD_RX_QUEUE_STOP
- ETH_RAMROD_RX_QUEUE_UPDATE
- ETH_RAMROD_TX_QUEUE_START
- ETH_RAMROD_TX_QUEUE_STOP
- ETH_RAMROD_TX_QUEUE_UPDATE
- ETH_RAMROD_UNUSED
- ETH_RAMROD_VPORT_START
- ETH_RAMROD_VPORT_STOP
- ETH_RAMROD_VPORT_UPDATE
- ETH_REFCLK_B_MARK
- ETH_REFCLK_MARK
- ETH_REF_CLK
- ETH_REF_CLK_MARK
- ETH_RESET_ALL
- ETH_RESET_AP
- ETH_RESET_DEDICATED
- ETH_RESET_DMA
- ETH_RESET_FILTER
- ETH_RESET_IRQ
- ETH_RESET_MAC
- ETH_RESET_MGMT
- ETH_RESET_OFFLOAD
- ETH_RESET_PHY
- ETH_RESET_RAM
- ETH_RESET_SHARED_SHIFT
- ETH_RETURN_CODE_ERR_CODE_MASK
- ETH_RETURN_CODE_ERR_CODE_SHIFT
- ETH_RETURN_CODE_RESERVED_MASK
- ETH_RETURN_CODE_RESERVED_SHIFT
- ETH_RETURN_CODE_RX_TX_MASK
- ETH_RETURN_CODE_RX_TX_SHIFT
- ETH_RMII_DLY_TX_INV
- ETH_RSS_ENGINE_NUM_BB
- ETH_RSS_ENGINE_NUM_K2
- ETH_RSS_HASH_CRC32
- ETH_RSS_HASH_CRC32_BIT
- ETH_RSS_HASH_FUNCS_COUNT
- ETH_RSS_HASH_NO_CHANGE
- ETH_RSS_HASH_TOP
- ETH_RSS_HASH_TOP_BIT
- ETH_RSS_HASH_UNKNOWN
- ETH_RSS_HASH_XOR
- ETH_RSS_HASH_XOR_BIT
- ETH_RSS_IND_TABLE_ENTRIES_NUM
- ETH_RSS_KEY_SIZE_REGS
- ETH_RSS_MODE_DISABLED
- ETH_RSS_MODE_E1HOV_PRI
- ETH_RSS_MODE_IP_DSCP
- ETH_RSS_MODE_REGULAR
- ETH_RSS_MODE_VLAN_PRI
- ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_IPV4_UDP_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_IPV4_UDP_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_IPV4_VXLAN_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_IPV4_VXLAN_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_IPV6_VXLAN_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_IPV6_VXLAN_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_RESERVED
- ETH_RSS_UPDATE_RAMROD_DATA_RESERVED_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_TUNN_INNER_HDRS_CAPABILITY
- ETH_RSS_UPDATE_RAMROD_DATA_TUNN_INNER_HDRS_CAPABILITY_SHIFT
- ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY
- ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY_SHIFT
- ETH_RXBD
- ETH_RXD0
- ETH_RXD0_B_MARK
- ETH_RXD0_MARK
- ETH_RXD1
- ETH_RXD1_B_MARK
- ETH_RXD1_MARK
- ETH_RXD2
- ETH_RXD2_MARK
- ETH_RXD3
- ETH_RXD3_MARK
- ETH_RXER
- ETH_RXFH_CONTEXT_ALLOC
- ETH_RXFH_INDIR_NO_CHANGE
- ETH_RX_BD_PAGE_SIZE_BYTES
- ETH_RX_BD_THRESHOLD
- ETH_RX_BP
- ETH_RX_CES
- ETH_RX_CF
- ETH_RX_CLK_MARK
- ETH_RX_CQE_GAP
- ETH_RX_CQE_PAGE_SIZE_BYTES
- ETH_RX_CQE_TYPE_REGULAR
- ETH_RX_CQE_TYPE_SLOW_PATH
- ETH_RX_CQE_TYPE_TPA_CONT
- ETH_RX_CQE_TYPE_TPA_END
- ETH_RX_CQE_TYPE_TPA_START
- ETH_RX_CQE_TYPE_UNUSED
- ETH_RX_CRC
- ETH_RX_CV
- ETH_RX_DB
- ETH_RX_DV_MARK
- ETH_RX_ERROR_FALGS
- ETH_RX_ER_B_MARK
- ETH_RX_ER_MARK
- ETH_RX_FD
- ETH_RX_FIFO_DEPTH
- ETH_RX_FM
- ETH_RX_LD
- ETH_RX_LE
- ETH_RX_LEN
- ETH_RX_LEN_BIT
- ETH_RX_LOR
- ETH_RX_MAX_BUFF_PER_PKT
- ETH_RX_MP
- ETH_RX_NFC_IP4
- ETH_RX_NO_TUNN
- ETH_RX_NUM_NEXT_PAGE_BDS
- ETH_RX_OVR
- ETH_RX_RATE_LIMIT_OFFSET
- ETH_RX_RATE_LIMIT_SIZE
- ETH_RX_ROK
- ETH_RX_TUNN_GENEVE
- ETH_RX_TUNN_GRE
- ETH_RX_TUNN_VXLAN
- ETH_RX_VLT
- ETH_SAH_BYTE0
- ETH_SAH_BYTE1
- ETH_SAL_BYTE_2
- ETH_SAL_BYTE_3
- ETH_SAL_BYTE_4
- ETH_SAL_BYTE_5
- ETH_SELF_CTL_RESET
- ETH_SMAC_15_0
- ETH_SMAC_47_16
- ETH_SMI_REG
- ETH_SPEED_AUTONEG
- ETH_SPEED_SMARTLINQ
- ETH_SS_FEATURES
- ETH_SS_NTUPLE_FILTERS
- ETH_SS_PHY_STATS
- ETH_SS_PHY_TUNABLES
- ETH_SS_PRIV_FLAGS
- ETH_SS_RSS_HASH_FUNCS
- ETH_SS_STATS
- ETH_SS_TEST
- ETH_SS_TUNABLES
- ETH_START_BD_NOT_SET
- ETH_STATE
- ETH_STATIC_REG
- ETH_STATS_OPCODE
- ETH_STAT_INFO_VERSION_LEN
- ETH_SWITCH_HEADER_LEN
- ETH_SW_CAN_REMOVE_ETH_FCS
- ETH_SW_CTL_P0_TX_CRC_REMOVE
- ETH_TEST_FL_EXTERNAL_LB
- ETH_TEST_FL_EXTERNAL_LB_DONE
- ETH_TEST_FL_FAILED
- ETH_TEST_FL_OFFLINE
- ETH_TEST_REG
- ETH_TLEN
- ETH_TOO_MANY_BDS
- ETH_TPA_CQE_CONT_LEN_LIST_SIZE
- ETH_TPA_CQE_END_LEN_LIST_SIZE
- ETH_TPA_CQE_START_LEN_LIST_SIZE
- ETH_TPA_MAX_AGGS_NUM
- ETH_TP_MDI
- ETH_TP_MDI_AUTO
- ETH_TP_MDI_INVALID
- ETH_TP_MDI_X
- ETH_TRANSCEIVER_STATE_MASK
- ETH_TRANSCEIVER_STATE_OFFSET
- ETH_TRANSCEIVER_STATE_PRESENT
- ETH_TRANSCEIVER_STATE_SHIFT
- ETH_TRANSCEIVER_STATE_UNPLUGGED
- ETH_TRANSCEIVER_STATE_UPDATING
- ETH_TRANSCEIVER_STATE_VALID
- ETH_TRANSCEIVER_TYPE_1000BASET
- ETH_TRANSCEIVER_TYPE_100G_ACC
- ETH_TRANSCEIVER_TYPE_100G_AOC
- ETH_TRANSCEIVER_TYPE_100G_CR4
- ETH_TRANSCEIVER_TYPE_100G_ER4
- ETH_TRANSCEIVER_TYPE_100G_LR4
- ETH_TRANSCEIVER_TYPE_100G_SR4
- ETH_TRANSCEIVER_TYPE_10G_ACC
- ETH_TRANSCEIVER_TYPE_10G_BASET
- ETH_TRANSCEIVER_TYPE_10G_ER
- ETH_TRANSCEIVER_TYPE_10G_LR
- ETH_TRANSCEIVER_TYPE_10G_LRM
- ETH_TRANSCEIVER_TYPE_10G_PCC
- ETH_TRANSCEIVER_TYPE_10G_SR
- ETH_TRANSCEIVER_TYPE_1G_ACC
- ETH_TRANSCEIVER_TYPE_1G_LX
- ETH_TRANSCEIVER_TYPE_1G_PCC
- ETH_TRANSCEIVER_TYPE_1G_SX
- ETH_TRANSCEIVER_TYPE_25G_ACC_L
- ETH_TRANSCEIVER_TYPE_25G_ACC_M
- ETH_TRANSCEIVER_TYPE_25G_ACC_S
- ETH_TRANSCEIVER_TYPE_25G_AOC
- ETH_TRANSCEIVER_TYPE_25G_CA_L
- ETH_TRANSCEIVER_TYPE_25G_CA_N
- ETH_TRANSCEIVER_TYPE_25G_CA_S
- ETH_TRANSCEIVER_TYPE_25G_LR
- ETH_TRANSCEIVER_TYPE_25G_SR
- ETH_TRANSCEIVER_TYPE_40G_CR4
- ETH_TRANSCEIVER_TYPE_40G_LR4
- ETH_TRANSCEIVER_TYPE_40G_SR4
- ETH_TRANSCEIVER_TYPE_4x10G
- ETH_TRANSCEIVER_TYPE_4x10G_SR
- ETH_TRANSCEIVER_TYPE_4x25G_CR
- ETH_TRANSCEIVER_TYPE_MASK
- ETH_TRANSCEIVER_TYPE_MULTI_RATE_10G_40G_CR
- ETH_TRANSCEIVER_TYPE_MULTI_RATE_10G_40G_LR
- ETH_TRANSCEIVER_TYPE_MULTI_RATE_10G_40G_SR
- ETH_TRANSCEIVER_TYPE_MULTI_RATE_40G_100G_AOC
- ETH_TRANSCEIVER_TYPE_MULTI_RATE_40G_100G_CR
- ETH_TRANSCEIVER_TYPE_MULTI_RATE_40G_100G_LR
- ETH_TRANSCEIVER_TYPE_MULTI_RATE_40G_100G_SR
- ETH_TRANSCEIVER_TYPE_NONE
- ETH_TRANSCEIVER_TYPE_OFFSET
- ETH_TRANSCEIVER_TYPE_UNKNOWN
- ETH_TRANSCEIVER_TYPE_XLPPI
- ETH_TUNNEL_DATA_IPV6_OUTER
- ETH_TUNNEL_DATA_IPV6_OUTER_SHIFT
- ETH_TUNNEL_DATA_RESERVED
- ETH_TUNNEL_DATA_RESERVED_SHIFT
- ETH_TUNNEL_NOT_SUPPORTED
- ETH_TUNNEL_PARSING_FLAGS_FIRSTHDRIPMATCH_MASK
- ETH_TUNNEL_PARSING_FLAGS_FIRSTHDRIPMATCH_SHIFT
- ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK
- ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT
- ETH_TUNNEL_PARSING_FLAGS_IPV4_OPTIONS_MASK
- ETH_TUNNEL_PARSING_FLAGS_IPV4_OPTIONS_SHIFT
- ETH_TUNNEL_PARSING_FLAGS_NEXT_PROTOCOL_MASK
- ETH_TUNNEL_PARSING_FLAGS_NEXT_PROTOCOL_SHIFT
- ETH_TUNNEL_PARSING_FLAGS_TENNANT_ID_EXIST_MASK
- ETH_TUNNEL_PARSING_FLAGS_TENNANT_ID_EXIST_SHIFT
- ETH_TUNNEL_PARSING_FLAGS_TYPE_MASK
- ETH_TUNNEL_PARSING_FLAGS_TYPE_SHIFT
- ETH_TUNN_IPV6_EXT_NBD_ERR
- ETH_TXBD
- ETH_TXCTRL
- ETH_TXD0
- ETH_TXD0_B_MARK
- ETH_TXD0_MARK
- ETH_TXD1
- ETH_TXD1_B_MARK
- ETH_TXD1_MARK
- ETH_TXD2
- ETH_TXD2_MARK
- ETH_TXD3
- ETH_TXD3_MARK
- ETH_TXEN
- ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_MASK
- ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_SHIFT
- ETH_TX_1ST_BD_FLAGS_IP_CSUM_MASK
- ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT
- ETH_TX_1ST_BD_FLAGS_L4_CSUM_MASK
- ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT
- ETH_TX_1ST_BD_FLAGS_LSO_MASK
- ETH_TX_1ST_BD_FLAGS_LSO_SHIFT
- ETH_TX_1ST_BD_FLAGS_START_BD_MASK
- ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT
- ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_MASK
- ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT
- ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_MASK
- ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT
- ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_MASK
- ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT
- ETH_TX_BD_FLAGS_IPV6
- ETH_TX_BD_FLAGS_IPV6_SHIFT
- ETH_TX_BD_FLAGS_IP_CSUM
- ETH_TX_BD_FLAGS_IP_CSUM_SHIFT
- ETH_TX_BD_FLAGS_IS_UDP
- ETH_TX_BD_FLAGS_IS_UDP_SHIFT
- ETH_TX_BD_FLAGS_L4_CSUM
- ETH_TX_BD_FLAGS_L4_CSUM_SHIFT
- ETH_TX_BD_FLAGS_START_BD
- ETH_TX_BD_FLAGS_START_BD_SHIFT
- ETH_TX_BD_FLAGS_SW_LSO
- ETH_TX_BD_FLAGS_SW_LSO_SHIFT
- ETH_TX_BD_FLAGS_VLAN_MODE
- ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT
- ETH_TX_BD_PAGE_SIZE_BYTES
- ETH_TX_BP
- ETH_TX_CC
- ETH_TX_CEN
- ETH_TX_CLK_MARK
- ETH_TX_CRC
- ETH_TX_DATA_1ST_BD_PKT_LEN_MASK
- ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT
- ETH_TX_DATA_1ST_BD_RESERVED0_MASK
- ETH_TX_DATA_1ST_BD_RESERVED0_SHIFT
- ETH_TX_DATA_1ST_BD_TUNN_FLAG_MASK
- ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT
- ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_MASK
- ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_SHIFT
- ETH_TX_DATA_2ND_BD_IPV6_EXT_MASK
- ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT
- ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK
- ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT
- ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_MASK
- ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT
- ETH_TX_DATA_2ND_BD_L4_UDP_MASK
- ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT
- ETH_TX_DATA_2ND_BD_RESERVED0_MASK
- ETH_TX_DATA_2ND_BD_RESERVED0_SHIFT
- ETH_TX_DATA_2ND_BD_START_BD_MASK
- ETH_TX_DATA_2ND_BD_START_BD_SHIFT
- ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_MASK
- ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_SHIFT
- ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_MASK
- ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_SHIFT
- ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_MASK
- ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_SHIFT
- ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_MASK
- ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_SHIFT
- ETH_TX_DATA_2ND_BD_TUNN_TYPE_MASK
- ETH_TX_DATA_2ND_BD_TUNN_TYPE_SHIFT
- ETH_TX_DATA_3RD_BD_HDR_NBD_MASK
- ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT
- ETH_TX_DATA_3RD_BD_RESERVED0_MASK
- ETH_TX_DATA_3RD_BD_RESERVED0_SHIFT
- ETH_TX_DATA_3RD_BD_START_BD_MASK
- ETH_TX_DATA_3RD_BD_START_BD_SHIFT
- ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK
- ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT
- ETH_TX_DATA_BD_RESERVED1_MASK
- ETH_TX_DATA_BD_RESERVED1_SHIFT
- ETH_TX_DATA_BD_RESERVED2_MASK
- ETH_TX_DATA_BD_RESERVED2_SHIFT
- ETH_TX_DATA_BD_START_BD_MASK
- ETH_TX_DATA_BD_START_BD_SHIFT
- ETH_TX_DOORBELL_NUM_BDS
- ETH_TX_DOORBELL_NUM_BDS_SHIFT
- ETH_TX_DOORBELL_RESERVED_TX_FIN_FLAG
- ETH_TX_DOORBELL_RESERVED_TX_FIN_FLAG_SHIFT
- ETH_TX_DOORBELL_SPARE
- ETH_TX_DOORBELL_SPARE_SHIFT
- ETH_TX_EC
- ETH_TX_ED
- ETH_TX_EN_B_MARK
- ETH_TX_EN_MARK
- ETH_TX_ERR_ASSERT_MALICIOUS
- ETH_TX_ERR_DROP
- ETH_TX_ERR_VALS_ANTI_SPOOFING_ERR_MASK
- ETH_TX_ERR_VALS_ANTI_SPOOFING_ERR_SHIFT
- ETH_TX_ERR_VALS_ILLEGAL_CONTROL_FRAME_MASK
- ETH_TX_ERR_VALS_ILLEGAL_CONTROL_FRAME_SHIFT
- ETH_TX_ERR_VALS_ILLEGAL_INBAND_TAGS_MASK
- ETH_TX_ERR_VALS_ILLEGAL_INBAND_TAGS_SHIFT
- ETH_TX_ERR_VALS_ILLEGAL_VLAN_MODE_MASK
- ETH_TX_ERR_VALS_ILLEGAL_VLAN_MODE_SHIFT
- ETH_TX_ERR_VALS_MTU_VIOLATION_MASK
- ETH_TX_ERR_VALS_MTU_VIOLATION_SHIFT
- ETH_TX_ERR_VALS_PACKET_TOO_SMALL_MASK
- ETH_TX_ERR_VALS_PACKET_TOO_SMALL_SHIFT
- ETH_TX_ERR_VALS_RESERVED_MASK
- ETH_TX_ERR_VALS_RESERVED_SHIFT
- ETH_TX_ERR_VALS_VLAN_INSERTION_W_INBAND_TAG_MASK
- ETH_TX_ERR_VALS_VLAN_INSERTION_W_INBAND_TAG_SHIFT
- ETH_TX_ER_MARK
- ETH_TX_FD
- ETH_TX_HEN
- ETH_TX_INACTIVE_SAME_AS_LAST
- ETH_TX_LC
- ETH_TX_LD
- ETH_TX_LE
- ETH_TX_LSO_WINDOW_BDS_NUM
- ETH_TX_LSO_WINDOW_MIN_LEN
- ETH_TX_MAX_BDS_PER_LSO_PACKET
- ETH_TX_MAX_BDS_PER_NON_LSO_PACKET
- ETH_TX_MAX_LSO_HDR_BYTES
- ETH_TX_MAX_LSO_HDR_NBD
- ETH_TX_MAX_LSO_PAYLOAD_LEN
- ETH_TX_MAX_NON_LSO_PKT_LEN
- ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT
- ETH_TX_MIN_BDS_PER_LSO_PKT
- ETH_TX_MIN_BDS_PER_NON_LSO_PKT
- ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE
- ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT
- ETH_TX_MP
- ETH_TX_NUM_SAME_AS_LAST_ENTRIES
- ETH_TX_OEN
- ETH_TX_OF
- ETH_TX_PARSE_2ND_BD_ACK_FLG
- ETH_TX_PARSE_2ND_BD_ACK_FLG_SHIFT
- ETH_TX_PARSE_2ND_BD_CWR_FLG
- ETH_TX_PARSE_2ND_BD_CWR_FLG_SHIFT
- ETH_TX_PARSE_2ND_BD_ECE_FLG
- ETH_TX_PARSE_2ND_BD_ECE_FLG_SHIFT
- ETH_TX_PARSE_2ND_BD_FIN_FLG
- ETH_TX_PARSE_2ND_BD_FIN_FLG_SHIFT
- ETH_TX_PARSE_2ND_BD_IP_HDR_LEN_OUTER_W
- ETH_TX_PARSE_2ND_BD_IP_HDR_LEN_OUTER_W_SHIFT
- ETH_TX_PARSE_2ND_BD_IP_HDR_START_OUTER_W
- ETH_TX_PARSE_2ND_BD_IP_HDR_START_OUTER_W_SHIFT
- ETH_TX_PARSE_2ND_BD_LLC_SNAP_EN
- ETH_TX_PARSE_2ND_BD_LLC_SNAP_EN_SHIFT
- ETH_TX_PARSE_2ND_BD_NS_FLG
- ETH_TX_PARSE_2ND_BD_NS_FLG_SHIFT
- ETH_TX_PARSE_2ND_BD_PSH_FLG
- ETH_TX_PARSE_2ND_BD_PSH_FLG_SHIFT
- ETH_TX_PARSE_2ND_BD_RESERVED0
- ETH_TX_PARSE_2ND_BD_RESERVED0_SHIFT
- ETH_TX_PARSE_2ND_BD_RESERVED1
- ETH_TX_PARSE_2ND_BD_RESERVED1_SHIFT
- ETH_TX_PARSE_2ND_BD_RESERVED2
- ETH_TX_PARSE_2ND_BD_RESERVED2_SHIFT
- ETH_TX_PARSE_2ND_BD_RST_FLG
- ETH_TX_PARSE_2ND_BD_RST_FLG_SHIFT
- ETH_TX_PARSE_2ND_BD_SYN_FLG
- ETH_TX_PARSE_2ND_BD_SYN_FLG_SHIFT
- ETH_TX_PARSE_2ND_BD_TUNNEL_UDP_EXIST
- ETH_TX_PARSE_2ND_BD_TUNNEL_UDP_EXIST_SHIFT
- ETH_TX_PARSE_2ND_BD_TYPE
- ETH_TX_PARSE_2ND_BD_TYPE_SHIFT
- ETH_TX_PARSE_2ND_BD_URG_FLG
- ETH_TX_PARSE_2ND_BD_URG_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_ACK_FLG
- ETH_TX_PARSE_BD_E1X_ACK_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_CWR_FLG
- ETH_TX_PARSE_BD_E1X_CWR_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_ECE_FLG
- ETH_TX_PARSE_BD_E1X_ECE_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE
- ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE_SHIFT
- ETH_TX_PARSE_BD_E1X_FIN_FLG
- ETH_TX_PARSE_BD_E1X_FIN_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_IP_HDR_START_OFFSET_W
- ETH_TX_PARSE_BD_E1X_IP_HDR_START_OFFSET_W_SHIFT
- ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN
- ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT
- ETH_TX_PARSE_BD_E1X_NS_FLG
- ETH_TX_PARSE_BD_E1X_NS_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN
- ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN_SHIFT
- ETH_TX_PARSE_BD_E1X_PSH_FLG
- ETH_TX_PARSE_BD_E1X_PSH_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_RESERVED0
- ETH_TX_PARSE_BD_E1X_RESERVED0_SHIFT
- ETH_TX_PARSE_BD_E1X_RST_FLG
- ETH_TX_PARSE_BD_E1X_RST_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_SYN_FLG
- ETH_TX_PARSE_BD_E1X_SYN_FLG_SHIFT
- ETH_TX_PARSE_BD_E1X_URG_FLG
- ETH_TX_PARSE_BD_E1X_URG_FLG_SHIFT
- ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE
- ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE_SHIFT
- ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR
- ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR_SHIFT
- ETH_TX_PARSE_BD_E2_L4_HDR_START_OFFSET_W
- ETH_TX_PARSE_BD_E2_L4_HDR_START_OFFSET_W_SHIFT
- ETH_TX_PARSE_BD_E2_LSO_MSS
- ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT
- ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW
- ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT
- ETH_TX_PEN
- ETH_TX_START_BD_FORCE_VLAN_MODE
- ETH_TX_START_BD_FORCE_VLAN_MODE_SHIFT
- ETH_TX_START_BD_HDR_NBDS
- ETH_TX_START_BD_HDR_NBDS_SHIFT
- ETH_TX_START_BD_NO_ADDED_TAGS
- ETH_TX_START_BD_NO_ADDED_TAGS_SHIFT
- ETH_TX_START_BD_PARSE_NBDS
- ETH_TX_START_BD_PARSE_NBDS_SHIFT
- ETH_TX_START_BD_TUNNEL_EXIST
- ETH_TX_START_BD_TUNNEL_EXIST_SHIFT
- ETH_TX_TD
- ETH_TX_TIMEOUT
- ETH_TX_TOK
- ETH_TX_TUNN_GENEVE
- ETH_TX_TUNN_GRE
- ETH_TX_TUNN_TTAG
- ETH_TX_TUNN_VXLAN
- ETH_TX_UND
- ETH_TYPE_FCOE
- ETH_TYPE_LEN
- ETH_VER_KEY
- ETH_VLAN_FILTER_ANY_VLAN
- ETH_VLAN_FILTER_CLASSIFY
- ETH_VLAN_FILTER_SPECIFIC_VLAN
- ETH_VLAN_FLG_INCORRECT
- ETH_VLAN_INSERT_AND_INBAND_VLAN
- ETH_VPORT_RSS_CONFIG_EN_5_TUPLE_CAPABILITY_MASK
- ETH_VPORT_RSS_CONFIG_EN_5_TUPLE_CAPABILITY_SHIFT
- ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY_MASK
- ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY_SHIFT
- ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY_MASK
- ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY_SHIFT
- ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY_MASK
- ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY_SHIFT
- ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY_MASK
- ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY_SHIFT
- ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY_MASK
- ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY_SHIFT
- ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY_MASK
- ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY_SHIFT
- ETH_VPORT_RSS_CONFIG_RESERVED0_MASK
- ETH_VPORT_RSS_CONFIG_RESERVED0_SHIFT
- ETH_VPORT_RSS_MODE_DISABLED
- ETH_VPORT_RSS_MODE_REGULAR
- ETH_VPORT_RX_MODE_ACCEPT_ANY_VNI_MASK
- ETH_VPORT_RX_MODE_ACCEPT_ANY_VNI_SHIFT
- ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL_MASK
- ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL_SHIFT
- ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL_MASK
- ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL_SHIFT
- ETH_VPORT_RX_MODE_MCAST_DROP_ALL_MASK
- ETH_VPORT_RX_MODE_MCAST_DROP_ALL_SHIFT
- ETH_VPORT_RX_MODE_RESERVED1_MASK
- ETH_VPORT_RX_MODE_RESERVED1_SHIFT
- ETH_VPORT_RX_MODE_UCAST_ACCEPT_ALL_MASK
- ETH_VPORT_RX_MODE_UCAST_ACCEPT_ALL_SHIFT
- ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED_MASK
- ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED_SHIFT
- ETH_VPORT_RX_MODE_UCAST_DROP_ALL_MASK
- ETH_VPORT_RX_MODE_UCAST_DROP_ALL_SHIFT
- ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL_MASK
- ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL_SHIFT
- ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL_MASK
- ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL_SHIFT
- ETH_VPORT_TX_MODE_MCAST_DROP_ALL_MASK
- ETH_VPORT_TX_MODE_MCAST_DROP_ALL_SHIFT
- ETH_VPORT_TX_MODE_RESERVED1_MASK
- ETH_VPORT_TX_MODE_RESERVED1_SHIFT
- ETH_VPORT_TX_MODE_UCAST_ACCEPT_ALL_MASK
- ETH_VPORT_TX_MODE_UCAST_ACCEPT_ALL_SHIFT
- ETH_VPORT_TX_MODE_UCAST_DROP_ALL_MASK
- ETH_VPORT_TX_MODE_UCAST_DROP_ALL_SHIFT
- ETH_WRB_FRAG_LEN_MASK
- ETH_ZERO_HDR_NBDS
- ETH_ZERO_SIZE_BD
- ETH_ZLEN
- ETI
- ETIControl
- ETIME
- ETIMEDOUT
- ETIMEHREG
- ETIMELREG
- ETIMEMREG
- ETM
- ETM3X_SUPPORTED_OPTIONS
- ETM4_CFG_BIT_CTXTID
- ETM4_CFG_BIT_CYCACC
- ETM4_CFG_BIT_RETSTK
- ETM4_CFG_BIT_TS
- ETMACTRn
- ETMACVRn
- ETMAUXCR
- ETMCCER
- ETMCCER_RETSTACK
- ETMCCER_TIMESTAMP
- ETMCCR
- ETMCCR_FIFOFULL
- ETMCIDCMR
- ETMCIDCVRn
- ETMCNTENRn
- ETMCNTRLDEVRn
- ETMCNTRLDVRn
- ETMCNTVRn
- ETMCR
- ETMCR_BRANCH_BROADCAST
- ETMCR_CTXID_SIZE
- ETMCR_CYC_ACC
- ETMCR_ETM_EN
- ETMCR_ETM_PRG
- ETMCR_PWD_DWN
- ETMCR_RETURN_STACK
- ETMCR_STALL_MODE
- ETMCR_TIMESTAMP_EN
- ETMEIBCR
- ETMEXTINSELR
- ETMEXTOUTEVRn
- ETMFFLR
- ETMIDR
- ETMIDR_PTM_VERSION
- ETMIMPSPEC0
- ETMIMPSPEC1
- ETMIMPSPEC2
- ETMIMPSPEC3
- ETMIMPSPEC4
- ETMIMPSPEC5
- ETMIMPSPEC6
- ETMIMPSPEC7
- ETMOSLAR
- ETMOSLSR
- ETMOSSRR
- ETMPDCR
- ETMPDCR_PWD_UP
- ETMPDSR
- ETMSCR
- ETMSQ12EVR
- ETMSQ13EVR
- ETMSQ21EVR
- ETMSQ23EVR
- ETMSQ31EVR
- ETMSQ32EVR
- ETMSQR
- ETMSR
- ETMSR_PROG_BIT
- ETMSYNCFR
- ETMTECR1
- ETMTECR1_ADDR_COMP_1
- ETMTECR1_INC_EXC
- ETMTECR1_START_STOP
- ETMTECR2
- ETMTEEVR
- ETMTESSEICR
- ETMTRACEIDR
- ETMTRIGGER
- ETMTSEVR
- ETMTSSCR
- ETMVMIDCVR
- ETM_ADDR_CMP_MAX
- ETM_ADDR_TYPE_NONE
- ETM_ADDR_TYPE_RANGE
- ETM_ADDR_TYPE_SINGLE
- ETM_ADDR_TYPE_START
- ETM_ADDR_TYPE_STOP
- ETM_ADD_COMP_0
- ETM_ALL_MASK
- ETM_ARCH_V3_3
- ETM_ARCH_V3_5
- ETM_ARCH_V4
- ETM_CNTR_MAX_VAL
- ETM_CTX_CTXID
- ETM_CTX_CTXID_VMID
- ETM_CTX_NONE
- ETM_CTX_VMID
- ETM_CYC_THRESHOLD_DEFAULT
- ETM_CYC_THRESHOLD_MASK
- ETM_DATA_LOAD_ADDR
- ETM_DATA_LOAD_STORE_ADDR
- ETM_DATA_STORE_ADDR
- ETM_DEFAULT_ADDR_COMP
- ETM_DEFAULT_EVENT_VAL
- ETM_EVENT_MASK
- ETM_EVENT_NOT_A
- ETM_EXLEVEL_NS_APP
- ETM_EXLEVEL_NS_HYP
- ETM_EXLEVEL_NS_NA
- ETM_EXLEVEL_NS_OS
- ETM_EXLEVEL_S_APP
- ETM_EXLEVEL_S_HYP
- ETM_EXLEVEL_S_NA
- ETM_EXLEVEL_S_OS
- ETM_HARD_WIRE_RES_A
- ETM_INSTR_ADDR
- ETM_MAX_ADDR_CMP
- ETM_MAX_ADDR_RANGE_CMP
- ETM_MAX_CNTR
- ETM_MAX_CTXID_CMP
- ETM_MAX_DATA_VAL_CMP
- ETM_MAX_EXT_INP
- ETM_MAX_EXT_INP_SEL
- ETM_MAX_EXT_OUT
- ETM_MAX_NR_PE
- ETM_MAX_PE_CMP
- ETM_MAX_RES_SEL
- ETM_MAX_SEQ_STATES
- ETM_MAX_SINGLE_ADDR_CMP
- ETM_MAX_SS_CMP
- ETM_MAX_VMID_CMP
- ETM_MODE_ALL
- ETM_MODE_ATB_TRIGGER
- ETM_MODE_BB
- ETM_MODE_BBROAD
- ETM_MODE_COND
- ETM_MODE_CTXID
- ETM_MODE_CYCACC
- ETM_MODE_DATA_TRACE_ADDR
- ETM_MODE_DATA_TRACE_VAL
- ETM_MODE_DSTALL
- ETM_MODE_DSTALL_EN
- ETM_MODE_EXCLUDE
- ETM_MODE_EXCL_KERN
- ETM_MODE_EXCL_USER
- ETM_MODE_INSTPRIO
- ETM_MODE_ISTALL
- ETM_MODE_ISTALL_EN
- ETM_MODE_LOAD
- ETM_MODE_LOAD_STORE
- ETM_MODE_LPOVERRIDE
- ETM_MODE_NOOVERFLOW
- ETM_MODE_QELEM
- ETM_MODE_RETURNSTACK
- ETM_MODE_RET_STACK
- ETM_MODE_STALL
- ETM_MODE_STORE
- ETM_MODE_TIMESTAMP
- ETM_MODE_TRACE_ERR
- ETM_MODE_TRACE_RESET
- ETM_MODE_VIEWINST_STARTSTOP
- ETM_MODE_VMID
- ETM_OPT_CTXTID
- ETM_OPT_CYCACC
- ETM_OPT_RETSTK
- ETM_OPT_TS
- ETM_SEQ_STATE_MAX_VAL
- ETM_SQR_MASK
- ETM_SYNC_MASK
- ETM_TRACEID_MASK
- ETMv4_EVENT_MASK
- ETMv4_MAX_CNTR
- ETMv4_MAX_CTXID_CMP
- ETMv4_MODE_ALL
- ETMv4_MODE_CTXID
- ETMv4_MODE_CYCACC
- ETMv4_MODE_TIMESTAMP
- ETMv4_SYNC_MASK
- ETNAVIV_DUMP_H
- ETNAVIV_IOMMU_V1
- ETNAVIV_IOMMU_V2
- ETNAVIV_PARAM_GPU_BUFFER_SIZE
- ETNAVIV_PARAM_GPU_FEATURES_0
- ETNAVIV_PARAM_GPU_FEATURES_1
- ETNAVIV_PARAM_GPU_FEATURES_10
- ETNAVIV_PARAM_GPU_FEATURES_11
- ETNAVIV_PARAM_GPU_FEATURES_12
- ETNAVIV_PARAM_GPU_FEATURES_2
- ETNAVIV_PARAM_GPU_FEATURES_3
- ETNAVIV_PARAM_GPU_FEATURES_4
- ETNAVIV_PARAM_GPU_FEATURES_5
- ETNAVIV_PARAM_GPU_FEATURES_6
- ETNAVIV_PARAM_GPU_FEATURES_7
- ETNAVIV_PARAM_GPU_FEATURES_8
- ETNAVIV_PARAM_GPU_FEATURES_9
- ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT
- ETNAVIV_PARAM_GPU_MODEL
- ETNAVIV_PARAM_GPU_NUM_CONSTANTS
- ETNAVIV_PARAM_GPU_NUM_VARYINGS
- ETNAVIV_PARAM_GPU_PIXEL_PIPES
- ETNAVIV_PARAM_GPU_REGISTER_MAX
- ETNAVIV_PARAM_GPU_REVISION
- ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT
- ETNAVIV_PARAM_GPU_STREAM_COUNT
- ETNAVIV_PARAM_GPU_THREAD_COUNT
- ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE
- ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE
- ETNAVIV_PARAM_SOFTPIN_START_ADDR
- ETNAVIV_PROT_READ
- ETNAVIV_PROT_WRITE
- ETNAVIV_PTA_ENTRIES
- ETNAVIV_PTA_SIZE
- ETNAVIV_SOFTPIN_START_ADDRESS
- ETNAVIV_STATES_SIZE
- ETNA_BO_CACHED
- ETNA_BO_CACHE_MASK
- ETNA_BO_FORCE_MMU
- ETNA_BO_UNCACHED
- ETNA_BO_WC
- ETNA_IOCTL
- ETNA_MAX_PIPES
- ETNA_NR_EVENTS
- ETNA_PIPE_2D
- ETNA_PIPE_3D
- ETNA_PIPE_VG
- ETNA_PM_PROCESS_POST
- ETNA_PM_PROCESS_PRE
- ETNA_PREP_NOSYNC
- ETNA_PREP_READ
- ETNA_PREP_WRITE
- ETNA_SEC_KERNEL
- ETNA_SEC_NONE
- ETNA_SEC_TZ
- ETNA_SUBMIT_BO_READ
- ETNA_SUBMIT_BO_WRITE
- ETNA_SUBMIT_FENCE_FD_IN
- ETNA_SUBMIT_FENCE_FD_OUT
- ETNA_SUBMIT_FLAGS
- ETNA_SUBMIT_NO_IMPLICIT
- ETNA_SUBMIT_SOFTPIN
- ETNA_USERPTR_READ
- ETNA_USERPTR_WRITE
- ETNA_WAIT_NONBLOCK
- ETN_TX_FIFO_DEPTH
- ETOG_IE
- ETOMS_ALT_SIZE_1000
- ETOOMANYREFS
- ETOOSMALL
- ETOP_CGEN
- ETOP_FTCU
- ETOP_MII_MASK
- ETOP_MII_NORMAL
- ETOP_MII_REVERSE
- ETOP_PLEN_UNDER
- ETOUCH_PKT_TYPE_DIAG
- ETOUCH_PKT_TYPE_MASK
- ETOUCH_PKT_TYPE_REPT
- ETOUCH_PKT_TYPE_REPT2
- ETPIR_TXPRODUCE_MASK
- ETP_BUS_PS2_ONLY
- ETP_BUS_PS2_SMB_ALERT
- ETP_BUS_PS2_SMB_HST_NTFY
- ETP_BUS_SMB_ALERT_ONLY
- ETP_BUS_SMB_HST_NTFY_ONLY
- ETP_CALIBRATE_MAX_LEN
- ETP_CAPABILITIES_QUERY
- ETP_CAP_HAS_ROCKER
- ETP_DISABLE_CALIBRATE
- ETP_DISABLE_POWER
- ETP_EDGE_FUZZ_V1
- ETP_ENABLE_ABS
- ETP_ENABLE_CALIBRATE
- ETP_FINGER_DATA_LEN
- ETP_FINGER_DATA_OFFSET
- ETP_FINGER_WIDTH
- ETP_FWIDTH_REDUCE
- ETP_FW_IAP_INTF_ERR
- ETP_FW_IAP_PAGE_ERR
- ETP_FW_ID_QUERY
- ETP_FW_NAME
- ETP_FW_PAGE_SIZE
- ETP_FW_SIGNATURE_SIZE
- ETP_FW_VERSION_QUERY
- ETP_HOVER_INFO_OFFSET
- ETP_I2C_CALIBRATE_CMD
- ETP_I2C_DESC_CMD
- ETP_I2C_DESC_LENGTH
- ETP_I2C_FW_CHECKSUM_CMD
- ETP_I2C_FW_VERSION_CMD
- ETP_I2C_IAP_CHECKSUM_CMD
- ETP_I2C_IAP_CMD
- ETP_I2C_IAP_CTRL_CMD
- ETP_I2C_IAP_PASSWORD
- ETP_I2C_IAP_REG_H
- ETP_I2C_IAP_REG_L
- ETP_I2C_IAP_RESET
- ETP_I2C_IAP_RESET_CMD
- ETP_I2C_IAP_VERSION_CMD
- ETP_I2C_IC_TYPE_CMD
- ETP_I2C_INF_LENGTH
- ETP_I2C_MAIN_MODE_ON
- ETP_I2C_MAX_BASELINE_CMD
- ETP_I2C_MAX_X_AXIS_CMD
- ETP_I2C_MAX_Y_AXIS_CMD
- ETP_I2C_MIN_BASELINE_CMD
- ETP_I2C_NSM_VERSION_CMD
- ETP_I2C_OSM_VERSION_CMD
- ETP_I2C_PATTERN_CMD
- ETP_I2C_POWER_CMD
- ETP_I2C_PRESSURE_CMD
- ETP_I2C_REPORT_DESC_CMD
- ETP_I2C_REPORT_DESC_LENGTH
- ETP_I2C_REPORT_LEN
- ETP_I2C_RESET
- ETP_I2C_RESOLUTION_CMD
- ETP_I2C_SET_CMD
- ETP_I2C_SLEEP
- ETP_I2C_STAND_CMD
- ETP_I2C_UNIQUEID_CMD
- ETP_I2C_WAKE_UP
- ETP_I2C_XY_TRACENUM_CMD
- ETP_IAP_START_ADDR
- ETP_MAX_FINGERS
- ETP_MAX_PRESSURE
- ETP_MAX_REPORT_LEN
- ETP_NEW_IC_SMBUS_HOST_NOTIFY
- ETP_PMAX_V2
- ETP_PMIN_V2
- ETP_PRESSURE_OFFSET
- ETP_PRODUCT_ID_FORMAT_STRING
- ETP_PS2_COMMAND_DELAY
- ETP_PS2_COMMAND_TRIES
- ETP_PS2_CUSTOM_COMMAND
- ETP_R10_ABSOLUTE_MODE
- ETP_R11_4_BYTE_MODE
- ETP_READ_BACK_DELAY
- ETP_READ_BACK_TRIES
- ETP_REGISTER_READ
- ETP_REGISTER_READWRITE
- ETP_REGISTER_WRITE
- ETP_REPORT_ID
- ETP_REPORT_ID_OFFSET
- ETP_RESOLUTION_QUERY
- ETP_RETRY_COUNT
- ETP_SAMPLE_QUERY
- ETP_SMBUS_CALIBRATE_QUERY
- ETP_SMBUS_ENABLE_TP
- ETP_SMBUS_FW_CHECKSUM_CMD
- ETP_SMBUS_FW_VERSION_CMD
- ETP_SMBUS_HELLOPACKET_CMD
- ETP_SMBUS_HELLOPACKET_LEN
- ETP_SMBUS_IAP_CHECKSUM_CMD
- ETP_SMBUS_IAP_CMD
- ETP_SMBUS_IAP_CTRL_CMD
- ETP_SMBUS_IAP_MODE_ON
- ETP_SMBUS_IAP_PASSWORD
- ETP_SMBUS_IAP_PASSWORD_READ
- ETP_SMBUS_IAP_PASSWORD_WRITE
- ETP_SMBUS_IAP_RESET_CMD
- ETP_SMBUS_IAP_VERSION_CMD
- ETP_SMBUS_MAX_BASELINE_CMD
- ETP_SMBUS_MIN_BASELINE_CMD
- ETP_SMBUS_PACKET_QUERY
- ETP_SMBUS_RANGE_CMD
- ETP_SMBUS_REPORT_LEN
- ETP_SMBUS_REPORT_OFFSET
- ETP_SMBUS_RESOLUTION_CMD
- ETP_SMBUS_SLEEP_CMD
- ETP_SMBUS_SM_VERSION_CMD
- ETP_SMBUS_UNIQUEID_CMD
- ETP_SMBUS_WRITE_FW_BLOCK
- ETP_SMBUS_XY_TRACENUM_CMD
- ETP_TOUCH_INFO_OFFSET
- ETP_TP_REPORT_ID
- ETP_WEIGHT_VALUE
- ETP_WMAX_V2
- ETP_WMIN_V2
- ETP_XMAX_V1
- ETP_XMAX_V2
- ETP_XMIN_V1
- ETP_XMIN_V2
- ETP_YMAX_V1
- ETP_YMAX_V2
- ETP_YMIN_V1
- ETP_YMIN_V2
- ETRAM_ADDR
- ETRAM_DATA
- ETRAP_PSTATE1
- ETRAP_PSTATE2
- ETRON
- ETR_MODE_CATU
- ETR_MODE_ETR_SG
- ETR_MODE_FLAT
- ETR_SG_ADDR
- ETR_SG_ADDR_SHIFT
- ETR_SG_ENTRY
- ETR_SG_ET
- ETR_SG_ET_LAST
- ETR_SG_ET_LINK
- ETR_SG_ET_MASK
- ETR_SG_ET_NORMAL
- ETR_SG_PAGES_PER_SYSPAGE
- ETR_SG_PAGE_SHIFT
- ETR_SG_PAGE_SIZE
- ETR_SG_PTRS_PER_PAGE
- ETR_SG_PTRS_PER_SYSPAGE
- ETS1
- ETS1EN
- ETS1_VLD
- ETS2
- ETS2EN
- ETS2_VLD
- ETSEC_ALARM_REGS_OFFSET
- ETSEC_CTRL_REGS_OFFSET
- ETSEC_ETTS_REGS_OFFSET
- ETSEC_FIPER_REGS_OFFSET
- ETSI1_WORLD
- ETSI2_WORLD
- ETSI3_ETSIA
- ETSI3_WORLD
- ETSI4_ETSIC
- ETSI4_WORLD
- ETSI5_WORLD
- ETSI6_WORLD
- ETSI8_WORLD
- ETSI9_WORLD
- ETSI_PATTERN
- ETSI_RESERVED
- ETS_BW_LIMIT_CREDIT_UPPER_BOUND
- ETS_BW_LIMIT_CREDIT_WEIGHT
- ETS_DWRR
- ETS_E3B0_NIG_MIN_W_VAL_20GBPS
- ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS
- ETS_E3B0_PBF_MIN_W_VAL
- ETS_FC_COS_SHIFT
- ETS_P
- ETS_QUEUE_SHIFT
- ETS_REF
- ETS_REGS_DUMP_WORD_COUNT
- ETS_RS
- ETS_RST
- ETS_SEG_NUM
- ETS_WFQ
- ETS_WRR
- ETTS_REGS_OFFSET
- ETT_EVENT_ENABLE
- ETT_EVENT_HIST
- ETT_HIST_ENABLE
- ETT_NONE
- ETT_SNAPSHOT
- ETT_STACKTRACE
- ETT_TRACE_ONOFF
- ETX
- ETXD_B1CNT_MASK
- ETXD_B1CNT_SHIFT
- ETXD_B1V
- ETXD_B2CNT_MASK
- ETXD_B2CNT_SHIFT
- ETXD_B2V
- ETXD_BYTECNT_MASK
- ETXD_CHKOFF_MASK
- ETXD_CHKOFF_SHIFT
- ETXD_D0CNT_MASK
- ETXD_D0V
- ETXD_DATALEN
- ETXD_DOCHECKSUM
- ETXD_INTWHENDONE
- ETXLEN
- ETXNDH
- ETXNDL
- ETXST
- ETXSTAT
- ETXSTATL_DEFER
- ETXSTH
- ETXSTL
- ETXTBSY
- ETXWIRE
- ETX_BBASE
- ETX_BDISP
- ETX_BPTR
- ETX_CFG
- ETX_CFG_DMAENABLE
- ETX_CFG_FIFOTHRESH
- ETX_CFG_IRQDAFTER
- ETX_CFG_IRQDBEFORE
- ETX_FIFOPCNT
- ETX_FIFORPTR
- ETX_FIFOSRPTR
- ETX_FIFOSWPTR
- ETX_FIFOWPTR
- ETX_PENDING
- ETX_REG_SIZE
- ETX_RING
- ETX_RSIZE
- ETX_RSIZE_SHIFT
- ETX_SMACHINE
- ETX_TP_DMAWAKEUP
- ETYPE_ALG_ENDPARSE
- ETYPE_ALG_NONE
- ETYPE_ALG_SKIP
- ETYPE_ALG_VLAN
- ETYPE_ALG_VLAN_STRIP
- ETYPE_ALIGNMENT_CHECK
- ETYPE_ARITHMETIC
- ETYPE_COPROCESSOR
- ETYPE_DSTIP_OFFSET
- ETYPE_IMPRECISE_BUS_ERROR
- ETYPE_KEEPALIVE_TIMEOUT
- ETYPE_LEAF_PTE_NOT_PRESENT
- ETYPE_MPZIU_CONTROL
- ETYPE_NEXT_PRECISE_STACK_OFL
- ETYPE_NONEXISTENT_MEM_ADDRESS
- ETYPE_NON_LEAF_PTE_NOT_PRESENT
- ETYPE_PRECISE_BUS_ERROR
- ETYPE_RESERVED_INSTRUCTION
- ETYPE_RESERVED_VALUE
- ETYPE_SKIP1
- ETYPE_SKIP2
- ETYPE_SRCIP_OFFSET
- ETYPE_TRAP
- ET_1000BT_MSTR_SLV
- ET_CHIP_ID
- ET_CMD_BL
- ET_CMD_CL
- ET_CMD_TP_INI
- ET_CMND_T3
- ET_COL_MARK
- ET_COMMAND
- ET_COMP
- ET_COMP_VAL0
- ET_COMP_VAL1
- ET_CONTINUE
- ET_CONT_T1
- ET_CORE
- ET_CRS_MARK
- ET_CTRL
- ET_ClCK
- ET_DMA10_MASK
- ET_DMA10_WRAP
- ET_DMA12_MASK
- ET_DMA12_WRAP
- ET_DMA4_MASK
- ET_DMA4_WRAP
- ET_DYN
- ET_ERXD0_MARK
- ET_ERXD1_MARK
- ET_ERXD2_MARK
- ET_ERXD3_MARK
- ET_ERXD4_MARK
- ET_ERXD5_MARK
- ET_ERXD6_MARK
- ET_ERXD7_MARK
- ET_ETXD0_MARK
- ET_ETXD1_MARK
- ET_ETXD2_MARK
- ET_ETXD3_MARK
- ET_ETXD4_MARK
- ET_ETXD5_MARK
- ET_ETXD6_MARK
- ET_ETXD7_MARK
- ET_EXEC
- ET_GPIO_DIR_CTRL
- ET_GPIO_IN
- ET_GPIO_OUT
- ET_GTX_CLK_MARK
- ET_G_BLUE
- ET_G_GB_H
- ET_G_GREEN1
- ET_G_GREEN2
- ET_G_GR_H
- ET_G_RED
- ET_HEIGTH_LOW
- ET_HIPROC
- ET_I2C_BASE
- ET_I2C_CLK
- ET_I2C_COUNT
- ET_I2C_DATA0
- ET_I2C_DATA1
- ET_I2C_DATA2
- ET_I2C_DATA3
- ET_I2C_DATA4
- ET_I2C_DATA5
- ET_I2C_DATA6
- ET_I2C_DATA7
- ET_I2C_PREFETCH
- ET_I2C_REG
- ET_INTR_MAC_STAT
- ET_INTR_PHY
- ET_INTR_RXDMA_ERR
- ET_INTR_RXDMA_FB_R0_LOW
- ET_INTR_RXDMA_FB_R1_LOW
- ET_INTR_RXDMA_STAT_LOW
- ET_INTR_RXDMA_XFR_DONE
- ET_INTR_RXMAC
- ET_INTR_SLV_TIMEOUT
- ET_INTR_TXDMA_ERR
- ET_INTR_TXDMA_ISR
- ET_INTR_TXMAC
- ET_INTR_WATCHDOG
- ET_INTR_WOL
- ET_LED2_LED_1000T
- ET_LED2_LED_100TX
- ET_LED2_LED_LINK
- ET_LED2_LED_TXRX
- ET_LINK_MARK
- ET_LOOP_DMA
- ET_LOOP_MAC
- ET_LOPROC
- ET_LUMA_CENTER
- ET_MAC_CFG1_LOOPBACK
- ET_MAC_CFG1_RESET_RXFUNC
- ET_MAC_CFG1_RESET_RXMC
- ET_MAC_CFG1_RESET_TXFUNC
- ET_MAC_CFG1_RESET_TXMC
- ET_MAC_CFG1_RX_ENABLE
- ET_MAC_CFG1_RX_FLOW
- ET_MAC_CFG1_SIM_RESET
- ET_MAC_CFG1_SOFT_RESET
- ET_MAC_CFG1_TX_ENABLE
- ET_MAC_CFG1_TX_FLOW
- ET_MAC_CFG1_WAIT
- ET_MAC_CFG2_IFMODE_100
- ET_MAC_CFG2_IFMODE_1000
- ET_MAC_CFG2_IFMODE_CRC_ENABLE
- ET_MAC_CFG2_IFMODE_FULL_DPLX
- ET_MAC_CFG2_IFMODE_HUGE_FRAME
- ET_MAC_CFG2_IFMODE_LEN_CHECK
- ET_MAC_CFG2_IFMODE_MASK
- ET_MAC_CFG2_IFMODE_PAD_CRC
- ET_MAC_CFG2_PREAMBLE_SHIFT
- ET_MAC_IFCTRL_GHDMODE
- ET_MAC_IFCTRL_PHYMODE
- ET_MAC_MGMT_BUSY
- ET_MAC_MGMT_WAIT
- ET_MAC_MIIMGMT_CLK_RST
- ET_MAC_MIIMGMT_STAT_PHYCRTL_MASK
- ET_MAC_MII_ADDR
- ET_MAC_STATION_ADDR1_OC4_SHIFT
- ET_MAC_STATION_ADDR1_OC5_SHIFT
- ET_MAC_STATION_ADDR1_OC6_SHIFT
- ET_MAC_STATION_ADDR2_OC1_SHIFT
- ET_MAC_STATION_ADDR2_OC2_SHIFT
- ET_MARKER
- ET_MAXQt
- ET_MBOX_CMD
- ET_MBOX_STATUS
- ET_MDC_MARK
- ET_MDIO_MARK
- ET_MINQt
- ET_MMC_ARB_DISABLE
- ET_MMC_ENABLE
- ET_MMC_FORCE_CE
- ET_MMC_RXDMA_DISABLE
- ET_MMC_RXMAC_DISABLE
- ET_MMC_TXDMA_DISABLE
- ET_MMC_TXMAC_DISABLE
- ET_MSI_TC
- ET_MSI_VECTOR
- ET_NONE
- ET_O_BLUE
- ET_O_GREEN1
- ET_O_GREEN2
- ET_O_RED
- ET_PASSTHRU0
- ET_PASSTHRU_STATUS
- ET_PHY_AUTONEG_ENABLE
- ET_PHY_AUTONEG_STATUS
- ET_PHY_CONFIG_FIFO_DEPTH_16
- ET_PHY_CONFIG_FIFO_DEPTH_32
- ET_PHY_CONFIG_FIFO_DEPTH_64
- ET_PHY_CONFIG_FIFO_DEPTH_8
- ET_PHY_CONFIG_TX_FIFO_DEPTH
- ET_PHY_DUPLEX_STATUS
- ET_PHY_INT_MARK
- ET_PHY_LSTATUS
- ET_PHY_POLARITY_STATUS
- ET_PHY_SPEED_STATUS
- ET_PMCSR_INIT
- ET_PM_PHY_SW_COMA
- ET_POS
- ET_PROT
- ET_PROT_DEF
- ET_PXL_CLK
- ET_RD_CRC
- ET_RD_IRQ
- ET_RD_KEYB
- ET_RD_TPAD
- ET_RD_UNKN
- ET_REG1d
- ET_REG1e
- ET_REG1f
- ET_REG20
- ET_REG21
- ET_REG22
- ET_REG23
- ET_REG24
- ET_REG25
- ET_REG6e
- ET_REG6f
- ET_REG70
- ET_REG71
- ET_REG72
- ET_REG73
- ET_REG74
- ET_REG75
- ET_REL
- ET_RESET_ALL
- ET_RXDMA_CSR_FBR0_ENABLE
- ET_RXDMA_CSR_FBR0_SIZE_HI
- ET_RXDMA_CSR_FBR0_SIZE_LO
- ET_RXDMA_CSR_FBR1_ENABLE
- ET_RXDMA_CSR_FBR1_SIZE_HI
- ET_RXDMA_CSR_FBR1_SIZE_LO
- ET_RXDMA_CSR_HALT
- ET_RXDMA_CSR_HALT_STATUS
- ET_RXDMA_PSR_NUM_DES_MASK
- ET_RX_CLK_MARK
- ET_RX_CTRL_RXMAC_ENABLE
- ET_RX_CTRL_WOL_DISABLE
- ET_RX_DV_MARK
- ET_RX_ER_MARK
- ET_RX_MCIF_CTRL_MAX_SEG_ENABLE
- ET_RX_MCIF_CTRL_MAX_SEG_FC_ENABLE
- ET_RX_MCIF_CTRL_MAX_SEG_SIZE_SHIFT
- ET_RX_PFCTRL_BRDCST_FILTER_ENABLE
- ET_RX_PFCTRL_FRAG_FILTER_ENABLE
- ET_RX_PFCTRL_MIN_PKT_SZ_SHIFT
- ET_RX_PFCTRL_MLTCST_FILTER_ENABLE
- ET_RX_PFCTRL_UNICST_FILTER_ENABLE
- ET_RX_UNI_PF_ADDR1_1_SHIFT
- ET_RX_UNI_PF_ADDR1_3_SHIFT
- ET_RX_UNI_PF_ADDR1_4_SHIFT
- ET_RX_UNI_PF_ADDR1_5_SHIFT
- ET_RX_UNI_PF_ADDR2_1_SHIFT
- ET_RX_UNI_PF_ADDR2_2_SHIFT
- ET_RX_UNI_PF_ADDR2_3_SHIFT
- ET_RX_UNI_PF_ADDR2_4_SHIFT
- ET_RX_UNI_PF_ADDR2_5_SHIFT
- ET_RX_WOL_HI_SA1_SHIFT
- ET_RX_WOL_LO_SA3_SHIFT
- ET_RX_WOL_LO_SA4_SHIFT
- ET_RX_WOL_LO_SA5_SHIFT
- ET_SRAM_IS_CTRL
- ET_SRAM_REQ_ACCESS
- ET_SRAM_WR_ACCESS
- ET_STARTX
- ET_STARTY
- ET_STATUS
- ET_STATUS_CONTINUATION
- ET_SYNCHRO
- ET_TXDMA_CACHE_SHIFT
- ET_TXDMA_CACHE_THRS
- ET_TXDMA_CLASS
- ET_TXDMA_CSR_HALT
- ET_TXDMA_DROP_TLP
- ET_TXDMA_SNGL_EPKT
- ET_TX_CLK_MARK
- ET_TX_CTRL_FC_DISABLE
- ET_TX_CTRL_TXMAC_ENABLE
- ET_TX_EN_MARK
- ET_TX_ER_MARK
- ET_WIDTH_LOW
- ET_WOL_MARK
- ET_W_H_HEIGTH
- EU1_WORLD
- EUCLEAN
- EUDADATA
- EUDAND
- EUDARDPT
- EUDAST
- EUDAST_TEST_VAL
- EUDAWRPT
- EUI64_ADDR_LEN
- EUNATCH
- EUROPE
- EUROPE_HI_IF_FREQ_36_MHZ
- EUROPE_HOP_MOD
- EUSERS
- EU_AUDIO_BIT_RATE_CONTROL
- EU_AUDIO_FORMAT_CONTROL
- EU_IF
- EU_PERF_CNTL0
- EU_PERF_CNTL1
- EU_PERF_CNTL2
- EU_PERF_CNTL3
- EU_PERF_CNTL4
- EU_PERF_CNTL5
- EU_PERF_CNTL6
- EU_PROFILE_CONTROL
- EU_PROFILE_PS_DVD
- EU_PROFILE_TS_HQ
- EU_VIDEO_BIT_RATE_CONTROL
- EU_VIDEO_BIT_RATE_MODE_CONSTANT
- EU_VIDEO_BIT_RATE_MODE_VARIABLE_AVERAGE
- EU_VIDEO_BIT_RATE_MODE_VARIABLE_PEAK
- EU_VIDEO_FORMAT_CONTROL
- EU_VIDEO_FORMAT_MPEG_2
- EU_VIDEO_GOP_STRUCTURE_CONTROL
- EU_VIDEO_INPUT_ASPECT_CONTROL
- EU_VIDEO_RESOLUTION_CONTROL
- EV
- EV1938REV_EV1938_A
- EV3_CPU
- EV45_CPU
- EV4_CPU
- EV4_MAX_ASN
- EV56_CPU
- EV5_CPU
- EV5_MAX_ASN
- EV5_PCTR_0
- EV5_PCTR_0_COUNT_MASK
- EV5_PCTR_0_COUNT_SHIFT
- EV5_PCTR_1
- EV5_PCTR_1_COUNT_MASK
- EV5_PCTR_1_COUNT_SHIFT
- EV5_PCTR_2
- EV5_PCTR_2_COUNT_MASK
- EV5_PCTR_2_COUNT_SHIFT
- EV67_BCACHEMISS
- EV67_CPU
- EV67_CYCLES
- EV67_INSTRUCTIONS
- EV67_LAST_ET
- EV67_MBOXREPLAY
- EV67_NUM_EVENT_TYPES
- EV67_PCTR_0
- EV67_PCTR_0_COUNT_MASK
- EV67_PCTR_0_COUNT_SHIFT
- EV67_PCTR_1
- EV67_PCTR_1_COUNT_MASK
- EV67_PCTR_1_COUNT_SHIFT
- EV67_PCTR_CYCLES_MBOX
- EV67_PCTR_CYCLES_UNDEF
- EV67_PCTR_EVENT_MASK
- EV67_PCTR_INSTR_BCACHEMISS
- EV67_PCTR_INSTR_CYCLES
- EV67_PCTR_MODE_AGGREGATE
- EV67_PCTR_MODE_MASK
- EV67_PCTR_MODE_PROFILEME
- EV68AL_CPU
- EV68CB_CPU
- EV68CX_CPU
- EV69_CPU
- EV6_CPU
- EV6_MAX_ASN
- EV6_PCTR_0
- EV6_PCTR_0_COUNT_MASK
- EV6_PCTR_0_COUNT_SHIFT
- EV6_PCTR_0_CYCLES
- EV6_PCTR_0_EVENT_MASK
- EV6_PCTR_0_INSTRUCTIONS
- EV6_PCTR_1
- EV6_PCTR_1_BRANCHES
- EV6_PCTR_1_BRANCH_MISPREDICTS
- EV6_PCTR_1_COUNT_MASK
- EV6_PCTR_1_COUNT_SHIFT
- EV6_PCTR_1_CYCLES
- EV6_PCTR_1_DTB_DOUBLE_MISSES
- EV6_PCTR_1_DTB_SINGLE_MISSES
- EV6_PCTR_1_EVENT_MASK
- EV6_PCTR_1_ITB_MISSES
- EV6_PCTR_1_REPLY_TRAPS
- EV6_PCTR_1_UNALIGNED_TRAPS
- EV6__C_STAT__BC_PERR
- EV6__C_STAT__DC_PERR
- EV6__C_STAT__DOUBLE__M
- EV6__C_STAT__DOUBLE__S
- EV6__C_STAT__DSTREAM_BC_DBL
- EV6__C_STAT__DSTREAM_BC_ERR
- EV6__C_STAT__DSTREAM_DC_ERR
- EV6__C_STAT__DSTREAM_MEM_DBL
- EV6__C_STAT__DSTREAM_MEM_ERR
- EV6__C_STAT__ERRMASK
- EV6__C_STAT__ISTREAM_BC_DBL
- EV6__C_STAT__ISTREAM_BC_ERR
- EV6__C_STAT__ISTREAM_MEM_DBL
- EV6__C_STAT__ISTREAM_MEM_ERR
- EV6__C_STAT__ISTREAM__M
- EV6__C_STAT__ISTREAM__S
- EV6__C_STAT__PROBE_BC_ERR0
- EV6__C_STAT__PROBE_BC_ERR1
- EV6__C_STAT__SOURCE_BCACHE
- EV6__C_STAT__SOURCE_MEMORY
- EV6__C_STAT__SOURCE__M
- EV6__C_STAT__SOURCE__S
- EV6__C_STS__DIRTY
- EV6__C_STS__PARITY
- EV6__C_STS__SHARED
- EV6__C_STS__VALID
- EV6__D_STAT__ECC_ERR_LD
- EV6__D_STAT__ECC_ERR_ST
- EV6__D_STAT__ERRMASK
- EV6__D_STAT__SEO
- EV6__D_STAT__TPERR_P0
- EV6__D_STAT__TPERR_P1
- EV6__I_STAT__ERRMASK
- EV6__I_STAT__PAR
- EV6__MM_STAT__DC_TAG_PERR
- EV6__MM_STAT__ERRMASK
- EV79_CPU
- EV7_CPU
- EV7_CSRS_KERN
- EV7_CSRS_PHYS
- EV7_CSR_KERN
- EV7_CSR_OFFSET
- EV7_CSR_PHYS
- EV7_IPE
- EV7_KERN_ADDR
- EV7_MASK40
- EV7_PE_MASK
- EV7__RBOX_INT__IO_ERROR__MASK
- EVACK
- EVAL
- EVAL1
- EVAL2
- EVAL3
- EVAL4
- EVAL5
- EVAL6
- EVA_MODE
- EVB_MASK
- EVB_PORT_ID_ASSIGNED
- EVB_PORT_ID_LEN
- EVB_PORT_ID_MAC0
- EVB_PORT_ID_MAC1
- EVB_PORT_ID_MAC2
- EVB_PORT_ID_MAC3
- EVB_PORT_ID_NULL
- EVB_PORT_ID_PORT_ID_LBN
- EVB_PORT_ID_PORT_ID_LEN
- EVB_PORT_ID_PORT_ID_OFST
- EVB_PORT_ID_PORT_ID_WIDTH
- EVB_STACK_ID
- EVB_VLAN_TAG_INSERT
- EVB_VLAN_TAG_LEN
- EVB_VLAN_TAG_MODE_LBN
- EVB_VLAN_TAG_MODE_WIDTH
- EVB_VLAN_TAG_REPLACE
- EVB_VLAN_TAG_VLAN_ID_LBN
- EVB_VLAN_TAG_VLAN_ID_WIDTH
- EVCLK_SRC_SEL
- EVCLK_SRC_SEL_MASK
- EVCR_QUAD_EN_MICRON
- EVDEV_BUF_PACKETS
- EVDEV_MINORS
- EVDEV_MINOR_BASE
- EVDEV_MIN_BUFFER_SIZE
- EVDPTERR_ADDR_OFF
- EVEA_FORMATS
- EVEA_RATES
- EVEN
- EVENT
- EVENT0_MARK
- EVENT1_MARK
- EVENT2_MARK
- EVENT3_MARK
- EVENT4_MARK
- EVENT5_MARK
- EVENT6_MARK
- EVENT7_MARK
- EVENTQ_0
- EVENTQ_1
- EVENTQ_2
- EVENTQ_3
- EVENTQ_DEFAULT
- EVENTS
- EVENTS_BITS
- EVENTS_CACHE_SIZE
- EVENTS_HELP_MAX
- EVENTS_WRITE_BUFSIZE
- EVENT_AC_BAT
- EVENT_AC_CHANGE
- EVENT_ADDBA
- EVENT_ADHOC_BCN_LOST
- EVENT_ALL
- EVENT_AMSDU_AGGR_CTRL
- EVENT_ATTR
- EVENT_ATTR_NAME
- EVENT_ATTR_NAME_
- EVENT_ATTR_NAME__
- EVENT_ATTR_STR
- EVENT_ATTR_STR_HT
- EVENT_AUDIO_MUTE
- EVENT_AUDIO_VOLUME
- EVENT_BATTERY_CRITICAL
- EVENT_BATTERY_ERROR
- EVENT_BATTERY_LEVEL_STATUS_BROADCAST
- EVENT_BATTERY_SOC_CHANGE
- EVENT_BATTERY_STATUS
- EVENT_BA_STREAM_TIEMOUT
- EVENT_BG_SCAN_REPORT
- EVENT_BG_SCAN_STOPPED
- EVENT_BHRB_MASK
- EVENT_BHRB_SHIFT
- EVENT_BIT
- EVENT_BLACK_SCREEN
- EVENT_BROADCAST_ASYNCH_EVENT
- EVENT_BT_COEX_WLAN_PARA_CHANGE
- EVENT_BUFFER
- EVENT_BUFFER_H
- EVENT_BUFFER_SIZE
- EVENT_BUF_SIZE
- EVENT_BW_CHANGE
- EVENT_CACHE_SEL_MASK
- EVENT_CACHE_SEL_SHIFT
- EVENT_CAMERA
- EVENT_CARRIER_DETECT_RSP
- EVENT_CAUSE_DC
- EVENT_CAUSE_FBOF
- EVENT_CAUSE_FBON
- EVENT_CFM
- EVENT_CHANNEL_REPORT_RDY
- EVENT_CHANNEL_SWITCH_ANN
- EVENT_CLASS_NAME
- EVENT_CMD_COMPLETE
- EVENT_CMD_FL_NEEDS_REC
- EVENT_CMD_FL_POST_TRIGGER
- EVENT_CMD_RDY
- EVENT_CODE
- EVENT_COMBINE
- EVENT_COMBINE_MASK
- EVENT_COMBINE_SHIFT
- EVENT_CONNECT_RESULT
- EVENT_CONSTRAINT
- EVENT_CONSTRAINT_END
- EVENT_CONSTRAINT_OVERLAP
- EVENT_CONSTRAINT_RANGE
- EVENT_COUNT
- EVENT_COUNTER_ALL_CLEAR
- EVENT_COUNTER_ENABLE_ALL
- EVENT_COUNTER_ENABLE_SHIFT
- EVENT_COUNTER_EVENT_L1
- EVENT_COUNTER_EVENT_L1_1
- EVENT_COUNTER_EVENT_L1_2
- EVENT_COUNTER_EVENT_Rx_L0S
- EVENT_COUNTER_EVENT_SEL_MASK
- EVENT_COUNTER_EVENT_SEL_SHIFT
- EVENT_COUNTER_EVENT_Tx_L0S
- EVENT_COUNTER_GROUP_5
- EVENT_COUNTER_GROUP_SEL_SHIFT
- EVENT_COUNT_A
- EVENT_COUNT_B
- EVENT_CPU
- EVENT_CRT_DETECT
- EVENT_CYCLES_COUNTER
- EVENT_CYCLES_ID
- EVENT_DATA
- EVENT_DATA1_RECOVERY_ENABLED
- EVENT_DATA1_RECOVERY_MASTER_FUNC
- EVENT_DATA1_RESET_NOTIFY_FATAL
- EVENT_DATA_COMPLETE
- EVENT_DATA_DISCOVERY_ERROR
- EVENT_DATA_ERROR
- EVENT_DATA_EVENT_CHANGE
- EVENT_DATA_LINK_STATUS
- EVENT_DATA_LOGOUT
- EVENT_DATA_LOG_ENTRY
- EVENT_DATA_LOG_ENTRY_ADDED
- EVENT_DATA_LOOP_STATE
- EVENT_DATA_QUEUE_FULL
- EVENT_DATA_RAID
- EVENT_DATA_RSSI_HIGH
- EVENT_DATA_RSSI_LOW
- EVENT_DATA_SAS_BROADCAST_PRIMITIVE
- EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
- EVENT_DATA_SAS_DISCOVERY
- EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
- EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
- EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
- EVENT_DATA_SAS_PHY_LINK_STATUS
- EVENT_DATA_SAS_SES
- EVENT_DATA_SAS_SMP_ERROR
- EVENT_DATA_SCSI
- EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
- EVENT_DATA_SNR_HIGH
- EVENT_DATA_SNR_LOW
- EVENT_DEAUTHENTICATED
- EVENT_DEBUG
- EVENT_DEEP_SLEEP_AWAKE
- EVENT_DEFINE_RANGE
- EVENT_DEFINE_RANGE_FORMAT
- EVENT_DEFINE_RANGE_FORMAT_LITE
- EVENT_DELBA
- EVENT_DESCR_STR_SZ
- EVENT_DET
- EVENT_DEVICE_REPORT_IDLE
- EVENT_DEVID_MASK
- EVENT_DEVID_SHIFT
- EVENT_DEV_ASLEEP
- EVENT_DEV_NAME
- EVENT_DEV_NAME_FMT
- EVENT_DEV_OPEN
- EVENT_DEV_WAKING
- EVENT_DFS_DETECT_RSP
- EVENT_DISASSOCIATED
- EVENT_DISCONNECTED
- EVENT_DISPLAY_BRIGHTNESS
- EVENT_DISPLAY_TOGGLE
- EVENT_DOMID_MASK_HI
- EVENT_DOMID_MASK_LO
- EVENT_DOWN_UP
- EVENT_DROPPED
- EVENT_DUMMY_HOST_WAKEUP_SIGNAL
- EVENT_EBB_MASK
- EVENT_EBB_SHIFT
- EVENT_ECM
- EVENT_ELEM_SIZE
- EVENT_END
- EVENT_ENTER_POWER_SAVE_FAIL
- EVENT_ENTER_POWER_SAVE_SUCCESS
- EVENT_ENTRY_SIZE
- EVENT_EXIT_POWER_SAVE_FAIL
- EVENT_EXIT_POWER_SAVE_SUCCESS
- EVENT_EXTRA_END
- EVENT_EXTRA_REG
- EVENT_EXT_SCAN_REPORT
- EVENT_FAULT_NOT_TLB
- EVENT_FAULT_TLB
- EVENT_FIFO_END
- EVENT_FILE_FL_ENABLED_BIT
- EVENT_FILE_FL_FILTERED_BIT
- EVENT_FILE_FL_NO_SET_FILTER_BIT
- EVENT_FILE_FL_PID_FILTER_BIT
- EVENT_FILE_FL_RECORDED_CMD_BIT
- EVENT_FILE_FL_RECORDED_TGID_BIT
- EVENT_FILE_FL_SOFT_DISABLED_BIT
- EVENT_FILE_FL_SOFT_MODE_BIT
- EVENT_FILE_FL_TRIGGER_COND_BIT
- EVENT_FILE_FL_TRIGGER_MODE_BIT
- EVENT_FILE_FL_WAS_ENABLED_BIT
- EVENT_FLAGS_MASK
- EVENT_FLAGS_SHIFT
- EVENT_FLEXIBLE
- EVENT_FOUND
- EVENT_FW_DUMP_INFO
- EVENT_GET_BSS_NUM
- EVENT_GET_BSS_TYPE
- EVENT_GROUP
- EVENT_GUID1
- EVENT_GUID2
- EVENT_HANDLED
- EVENT_HASHSIZE
- EVENT_HOSTWAKE_STAIE
- EVENT_HS_ACT_REQ
- EVENT_IBSS_COALESCED
- EVENT_IBSS_JOINED
- EVENT_IBSS_STA_CONNECT
- EVENT_IBSS_STA_DISCONNECT
- EVENT_ID_MASK
- EVENT_ID_OFFSET
- EVENT_IE
- EVENT_IEN
- EVENT_IFM_MASK
- EVENT_IFM_SHIFT
- EVENT_INDEX
- EVENT_INIT
- EVENT_INIT_DONE
- EVENT_INT
- EVENT_INTERRUPT
- EVENT_INTERRUPT_ENABLE
- EVENT_IN_RANGE
- EVENT_IS_L1
- EVENT_IS_MARKED
- EVENT_LENGTH
- EVENT_LID
- EVENT_LINK_CHANGE
- EVENT_LINK_LOST
- EVENT_LINK_QUALITY
- EVENT_LINK_RESET
- EVENT_LINK_SENSED
- EVENT_LINUX_MASK
- EVENT_LOG_AUX_REP
- EVENT_LOG_AUX_REQ
- EVENT_LOG_BUFF_SIZE
- EVENT_LOG_CUST_MSG
- EVENT_MAGIC
- EVENT_MARKED_MASK
- EVENT_MARKED_SHIFT
- EVENT_MASK
- EVENT_MAX
- EVENT_MAX_DEV
- EVENT_MAX_FAIL
- EVENT_MBOX_ALL_EVENT_ID
- EVENT_MIB_CHANGED
- EVENT_MIC_ERR_MULTICAST
- EVENT_MIC_ERR_UNICAST
- EVENT_MIDDLE
- EVENT_MSG_BITS
- EVENT_MSG_BUFFER_FULL
- EVENT_MULTI_CHAN_INFO
- EVENT_NOTBUSY
- EVENT_NO_IP_ALIGN
- EVENT_NO_RUNTIME_PM
- EVENT_OLS_HIGH_LIMIT
- EVENT_OLS_LOW_LIMIT
- EVENT_OVERTEMP
- EVENT_OVFL
- EVENT_OVRFL
- EVENT_PCM
- EVENT_PCMA
- EVENT_PCMB
- EVENT_PENDING
- EVENT_PENDOWN
- EVENT_PENUP
- EVENT_PEN_DOWN
- EVENT_PEN_UP
- EVENT_PINNED
- EVENT_PMC_MASK
- EVENT_PMC_SHIFT
- EVENT_POP
- EVENT_PORT_AUTHORIZED
- EVENT_PORT_RELEASE
- EVENT_POWER_PRESSED
- EVENT_POWER_PRESS_WAKE
- EVENT_PRE_BEACON_LOST
- EVENT_PSEL_MASK
- EVENT_PS_AWAKE
- EVENT_PS_SLEEP
- EVENT_PTR
- EVENT_PWR_RSP
- EVENT_QUEUE_BASE_ADDR_ALL_ONES
- EVENT_QUEUE_BASE_ADDR_REG
- EVENT_QUEUE_CONTROL_CLEAR
- EVENT_QUEUE_CONTROL_CLEAR_DIS
- EVENT_QUEUE_CONTROL_CLEAR_E2I
- EVENT_QUEUE_CONTROL_CLEAR_OF
- EVENT_QUEUE_CONTROL_SET
- EVENT_QUEUE_CONTROL_SET_EN
- EVENT_QUEUE_CONTROL_SET_OFLOW
- EVENT_QUEUE_HEAD
- EVENT_QUEUE_HEAD_VAL
- EVENT_QUEUE_SIZE
- EVENT_QUEUE_STATE
- EVENT_QUEUE_STATE_ACTIVE
- EVENT_QUEUE_STATE_ERROR
- EVENT_QUEUE_STATE_IDLE
- EVENT_QUEUE_STATE_MASK
- EVENT_QUEUE_TAIL
- EVENT_QUEUE_TAIL_OFLOW
- EVENT_QUEUE_TAIL_VAL
- EVENT_RADAR_DETECTED
- EVENT_RDY
- EVENT_REGION
- EVENT_RELEASE
- EVENT_REMAIN_ON_CHAN_EXPIRED
- EVENT_REMAP_CELLS
- EVENT_REPEAT
- EVENT_RING_ENTRY_ASYNC_MASK
- EVENT_RING_ENTRY_ASYNC_SHIFT
- EVENT_RING_ENTRY_RESERVED1_MASK
- EVENT_RING_ENTRY_RESERVED1_SHIFT
- EVENT_RING_OPCODE_AFEX_VIF_LISTS
- EVENT_RING_OPCODE_CFC_DEL
- EVENT_RING_OPCODE_CFC_DEL_WB
- EVENT_RING_OPCODE_CLASSIFICATION_RULES
- EVENT_RING_OPCODE_FILTERS_RULES
- EVENT_RING_OPCODE_FORWARD_SETUP
- EVENT_RING_OPCODE_FUNCTION_START
- EVENT_RING_OPCODE_FUNCTION_STOP
- EVENT_RING_OPCODE_FUNCTION_UPDATE
- EVENT_RING_OPCODE_MALICIOUS_VF
- EVENT_RING_OPCODE_MULTICAST_RULES
- EVENT_RING_OPCODE_RSS_UPDATE_RULES
- EVENT_RING_OPCODE_SET_MAC
- EVENT_RING_OPCODE_SET_TIMESYNC
- EVENT_RING_OPCODE_START_TRAFFIC
- EVENT_RING_OPCODE_STAT_QUERY
- EVENT_RING_OPCODE_STOP_TRAFFIC
- EVENT_RING_OPCODE_VF_FLR
- EVENT_RING_OPCODE_VF_PF_CHANNEL
- EVENT_RING_PAGE_SIZE_BYTES
- EVENT_RMT
- EVENT_ROAMED
- EVENT_RSSI_HIGH
- EVENT_RSSI_LOW
- EVENT_RST_PEND
- EVENT_RXBA_SYNC
- EVENT_RX_HALT
- EVENT_RX_KILL
- EVENT_RX_MEMORY
- EVENT_RX_PAUSED
- EVENT_RX_STALL
- EVENT_SAMPLE_MASK
- EVENT_SAMPLE_SHIFT
- EVENT_SCAN_ALL_EVENTS
- EVENT_SET_RX_MODE
- EVENT_SIZE
- EVENT_SLEEP
- EVENT_SMT
- EVENT_SNR_HIGH
- EVENT_SNR_LOW
- EVENT_SOLAR_BATTERY_BROADCAST
- EVENT_SOLAR_BATTERY_LIGHT_MEASURE
- EVENT_SOLAR_CHECK_LIGHT_BUTTON
- EVENT_SOURCE_DEVICE_PATH
- EVENT_START_OFFSET
- EVENT_STAT_UPDATE
- EVENT_STOPPED
- EVENT_STS_SPLIT
- EVENT_TAG
- EVENT_TAG_MASK
- EVENT_TAG_OFFSET
- EVENT_TDLS_GENERIC_EVENT
- EVENT_THRESH_MASK
- EVENT_THRESH_SHIFT
- EVENT_THR_CMP_MASK
- EVENT_THR_CMP_SHIFT
- EVENT_THR_CTL_MASK
- EVENT_THR_CTL_SHIFT
- EVENT_THR_SEL_MASK
- EVENT_THR_SEL_SHIFT
- EVENT_TIME
- EVENT_TIMEDOUT
- EVENT_TIMED_HOST_WAKE
- EVENT_TOUCHPAD_RAW_XY
- EVENT_TRB_LEN
- EVENT_TRIGGERS_FILE_NAME
- EVENT_TSI_READY
- EVENT_TTY_WAKEUP
- EVENT_TX_DATA_PAUSE
- EVENT_TX_HALT
- EVENT_TX_STATUS_REPORT
- EVENT_TYPE
- EVENT_TYPE_BUS_RESET
- EVENT_TYPE_CMD_HARD_ERR
- EVENT_TYPE_CQ
- EVENT_TYPE_DEV_TAB_ERR
- EVENT_TYPE_ILL_CMD
- EVENT_TYPE_ILL_DEV
- EVENT_TYPE_INT
- EVENT_TYPE_INV_DEV_REQ
- EVENT_TYPE_INV_PPR_REQ
- EVENT_TYPE_IOTLB_INV_TO
- EVENT_TYPE_IO_FAULT
- EVENT_TYPE_MASK
- EVENT_TYPE_NOT_DEFINED
- EVENT_TYPE_PAGE_TAB_ERR
- EVENT_TYPE_QP
- EVENT_TYPE_SHIFT
- EVENT_TYPE_SRQ
- EVENT_TYPE_STRING
- EVENT_TYPE_UNKNOWN
- EVENT_UAP_BSS_ACTIVE
- EVENT_UAP_BSS_IDLE
- EVENT_UAP_BSS_START
- EVENT_UAP_MIC_COUNTERMEASURES
- EVENT_UAP_STA_ASSOC
- EVENT_UAP_STA_DEAUTH
- EVENT_UNIT_MASK
- EVENT_UNIT_SHIFT
- EVENT_UNKNOWN_DEBUG
- EVENT_USB_OC0
- EVENT_USB_OC2
- EVENT_VALID_MASK
- EVENT_VALID_OFFSET
- EVENT_VAR
- EVENT_VENUM
- EVENT_WAIT_FOREVER
- EVENT_WAIT_MSEC
- EVENT_WANTS_BHRB
- EVENT_WEP_ICV_ERR
- EVENT_WLAN
- EVENT_WMM_STATUS_CHANGE
- EVENT_WORDS_PER_PAGE
- EVENT_WOW_RSP
- EVENT_XFER_COMPLETE
- EVEN_COUNTERS
- EVEN_CSR
- EVEN_DMA_START
- EVEN_DMA_STRIDE
- EVEN_FLD_MASK
- EVEN_PAR
- EVEN_PARITY
- EVEN_PIXEL_FMT
- EVEN_SPACING
- EVEREST_GEN_ATTN_IN_USE_MASK
- EVEREST_LATCHED_ATTN_IN_USE_MASK
- EVERGREEND_H
- EVERGREEN_ADDR_SURF_16_BANK
- EVERGREEN_ADDR_SURF_2_BANK
- EVERGREEN_ADDR_SURF_4_BANK
- EVERGREEN_ADDR_SURF_8_BANK
- EVERGREEN_ADDR_SURF_BANK_HEIGHT_1
- EVERGREEN_ADDR_SURF_BANK_HEIGHT_2
- EVERGREEN_ADDR_SURF_BANK_HEIGHT_4
- EVERGREEN_ADDR_SURF_BANK_HEIGHT_8
- EVERGREEN_ADDR_SURF_BANK_WIDTH_1
- EVERGREEN_ADDR_SURF_BANK_WIDTH_2
- EVERGREEN_ADDR_SURF_BANK_WIDTH_4
- EVERGREEN_ADDR_SURF_BANK_WIDTH_8
- EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_1
- EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_2
- EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_4
- EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_8
- EVERGREEN_ADDR_SURF_TILE_SPLIT_128B
- EVERGREEN_ADDR_SURF_TILE_SPLIT_1KB
- EVERGREEN_ADDR_SURF_TILE_SPLIT_256B
- EVERGREEN_ADDR_SURF_TILE_SPLIT_2KB
- EVERGREEN_ADDR_SURF_TILE_SPLIT_4KB
- EVERGREEN_ADDR_SURF_TILE_SPLIT_512B
- EVERGREEN_ADDR_SURF_TILE_SPLIT_64B
- EVERGREEN_AUDIO_ENABLE
- EVERGREEN_AUDIO_PLL1_DIV
- EVERGREEN_AUDIO_PLL1_MUL
- EVERGREEN_AUDIO_PLL1_UNK
- EVERGREEN_AUDIO_VENDOR_ID
- EVERGREEN_BLIT_SHADERS_H
- EVERGREEN_CG_IND_ADDR
- EVERGREEN_CG_IND_DATA
- EVERGREEN_CRTC0_REGISTER_OFFSET
- EVERGREEN_CRTC1_REGISTER_OFFSET
- EVERGREEN_CRTC2_REGISTER_OFFSET
- EVERGREEN_CRTC3_REGISTER_OFFSET
- EVERGREEN_CRTC4_REGISTER_OFFSET
- EVERGREEN_CRTC5_REGISTER_OFFSET
- EVERGREEN_CRTC_BLANK_CONTROL
- EVERGREEN_CRTC_BLANK_DATA_EN
- EVERGREEN_CRTC_CONTROL
- EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE
- EVERGREEN_CRTC_MASTER_EN
- EVERGREEN_CRTC_STATUS
- EVERGREEN_CRTC_STATUS_HV_COUNT
- EVERGREEN_CRTC_STATUS_POSITION
- EVERGREEN_CRTC_UPDATE_LOCK
- EVERGREEN_CRTC_V_BLANK
- EVERGREEN_CRTC_V_BLANK_START_END
- EVERGREEN_CURSOR_24_1
- EVERGREEN_CURSOR_24_8_PRE_MULT
- EVERGREEN_CURSOR_24_8_UNPRE_MULT
- EVERGREEN_CURSOR_2X_MAGNIFY
- EVERGREEN_CURSOR_DISABLE_MULTIPLE_UPDATE
- EVERGREEN_CURSOR_EN
- EVERGREEN_CURSOR_FORCE_MC_ON
- EVERGREEN_CURSOR_MODE
- EVERGREEN_CURSOR_MONO
- EVERGREEN_CURSOR_UPDATE_LOCK
- EVERGREEN_CURSOR_UPDATE_PENDING
- EVERGREEN_CURSOR_UPDATE_TAKEN
- EVERGREEN_CURSOR_URGENT_1_2
- EVERGREEN_CURSOR_URGENT_1_4
- EVERGREEN_CURSOR_URGENT_1_8
- EVERGREEN_CURSOR_URGENT_3_8
- EVERGREEN_CURSOR_URGENT_ALWAYS
- EVERGREEN_CURSOR_URGENT_CONTROL
- EVERGREEN_CUR_COLOR1
- EVERGREEN_CUR_COLOR2
- EVERGREEN_CUR_CONTROL
- EVERGREEN_CUR_HOT_SPOT
- EVERGREEN_CUR_POSITION
- EVERGREEN_CUR_SIZE
- EVERGREEN_CUR_SURFACE_ADDRESS
- EVERGREEN_CUR_SURFACE_ADDRESS_HIGH
- EVERGREEN_CUR_SURFACE_ADDRESS_MASK
- EVERGREEN_CUR_UPDATE
- EVERGREEN_D3VGA_CONTROL
- EVERGREEN_D4VGA_CONTROL
- EVERGREEN_D5VGA_CONTROL
- EVERGREEN_D6VGA_CONTROL
- EVERGREEN_DATA_FORMAT
- EVERGREEN_DC_GPIO_HPD_A
- EVERGREEN_DC_GPIO_HPD_EN
- EVERGREEN_DC_GPIO_HPD_MASK
- EVERGREEN_DC_GPIO_HPD_Y
- EVERGREEN_DC_LUT_30_COLOR
- EVERGREEN_DC_LUT_AUTOFILL
- EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE
- EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN
- EVERGREEN_DC_LUT_BLACK_OFFSET_RED
- EVERGREEN_DC_LUT_CONTROL
- EVERGREEN_DC_LUT_PWL_DATA
- EVERGREEN_DC_LUT_RW_INDEX
- EVERGREEN_DC_LUT_RW_MODE
- EVERGREEN_DC_LUT_SEQ_COLOR
- EVERGREEN_DC_LUT_VGA_ACCESS_ENABLE
- EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE
- EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN
- EVERGREEN_DC_LUT_WHITE_OFFSET_RED
- EVERGREEN_DC_LUT_WRITE_EN_MASK
- EVERGREEN_DESKTOP_HEIGHT
- EVERGREEN_DP0_REGISTER_OFFSET
- EVERGREEN_DP1_REGISTER_OFFSET
- EVERGREEN_DP2_REGISTER_OFFSET
- EVERGREEN_DP3_REGISTER_OFFSET
- EVERGREEN_DP4_REGISTER_OFFSET
- EVERGREEN_DP5_REGISTER_OFFSET
- EVERGREEN_DP_SEC_AIP_ENABLE
- EVERGREEN_DP_SEC_ASP_ENABLE
- EVERGREEN_DP_SEC_ATP_ENABLE
- EVERGREEN_DP_SEC_AUD_N
- EVERGREEN_DP_SEC_AVI_ENABLE
- EVERGREEN_DP_SEC_CNTL
- EVERGREEN_DP_SEC_GSP_ENABLE
- EVERGREEN_DP_SEC_MPG_ENABLE
- EVERGREEN_DP_SEC_N_BASE_MULTIPLE
- EVERGREEN_DP_SEC_SS_EN
- EVERGREEN_DP_SEC_STREAM_ENABLE
- EVERGREEN_DP_SEC_TIMESTAMP
- EVERGREEN_DP_SEC_TIMESTAMP_MODE
- EVERGREEN_DP_STEER_FIFO
- EVERGREEN_DP_STEER_FIFO_RESET
- EVERGREEN_DP_VID_STREAM_CNTL
- EVERGREEN_DP_VID_STREAM_CNTL_ENABLE
- EVERGREEN_DP_VID_STREAM_STATUS
- EVERGREEN_GRPH_ALPHA_CROSSBAR
- EVERGREEN_GRPH_ALPHA_SEL_A
- EVERGREEN_GRPH_ALPHA_SEL_B
- EVERGREEN_GRPH_ALPHA_SEL_G
- EVERGREEN_GRPH_ALPHA_SEL_R
- EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1
- EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1
- EVERGREEN_GRPH_ARRAY_LINEAR_ALIGNED
- EVERGREEN_GRPH_ARRAY_LINEAR_GENERAL
- EVERGREEN_GRPH_ARRAY_MODE
- EVERGREEN_GRPH_BANK_HEIGHT
- EVERGREEN_GRPH_BANK_WIDTH
- EVERGREEN_GRPH_BLUE_CROSSBAR
- EVERGREEN_GRPH_BLUE_SEL_A
- EVERGREEN_GRPH_BLUE_SEL_B
- EVERGREEN_GRPH_BLUE_SEL_G
- EVERGREEN_GRPH_BLUE_SEL_R
- EVERGREEN_GRPH_CONTROL
- EVERGREEN_GRPH_DEPTH
- EVERGREEN_GRPH_DEPTH_16BPP
- EVERGREEN_GRPH_DEPTH_32BPP
- EVERGREEN_GRPH_DEPTH_8BPP
- EVERGREEN_GRPH_DFQ_ENABLE
- EVERGREEN_GRPH_ENABLE
- EVERGREEN_GRPH_ENDIAN_8IN16
- EVERGREEN_GRPH_ENDIAN_8IN32
- EVERGREEN_GRPH_ENDIAN_8IN64
- EVERGREEN_GRPH_ENDIAN_NONE
- EVERGREEN_GRPH_ENDIAN_SWAP
- EVERGREEN_GRPH_FLIP_CONTROL
- EVERGREEN_GRPH_FORMAT
- EVERGREEN_GRPH_FORMAT_32BPP_DIG
- EVERGREEN_GRPH_FORMAT_8B_ARGB2101010
- EVERGREEN_GRPH_FORMAT_8B_BGRA1010102
- EVERGREEN_GRPH_FORMAT_AI88
- EVERGREEN_GRPH_FORMAT_ARGB1555
- EVERGREEN_GRPH_FORMAT_ARGB2101010
- EVERGREEN_GRPH_FORMAT_ARGB4444
- EVERGREEN_GRPH_FORMAT_ARGB565
- EVERGREEN_GRPH_FORMAT_ARGB8888
- EVERGREEN_GRPH_FORMAT_BGR101111
- EVERGREEN_GRPH_FORMAT_BGRA1010102
- EVERGREEN_GRPH_FORMAT_BGRA5551
- EVERGREEN_GRPH_FORMAT_INDEXED
- EVERGREEN_GRPH_FORMAT_MONO16
- EVERGREEN_GRPH_FORMAT_RGB111110
- EVERGREEN_GRPH_GREEN_CROSSBAR
- EVERGREEN_GRPH_GREEN_SEL_A
- EVERGREEN_GRPH_GREEN_SEL_B
- EVERGREEN_GRPH_GREEN_SEL_G
- EVERGREEN_GRPH_GREEN_SEL_R
- EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL
- EVERGREEN_GRPH_MACRO_TILE_ASPECT
- EVERGREEN_GRPH_NUM_BANKS
- EVERGREEN_GRPH_PITCH
- EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS
- EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH
- EVERGREEN_GRPH_RED_CROSSBAR
- EVERGREEN_GRPH_RED_SEL_A
- EVERGREEN_GRPH_RED_SEL_B
- EVERGREEN_GRPH_RED_SEL_G
- EVERGREEN_GRPH_RED_SEL_R
- EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS
- EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH
- EVERGREEN_GRPH_SURFACE_ADDRESS_MASK
- EVERGREEN_GRPH_SURFACE_OFFSET_X
- EVERGREEN_GRPH_SURFACE_OFFSET_Y
- EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN
- EVERGREEN_GRPH_SURFACE_UPDATE_PENDING
- EVERGREEN_GRPH_SWAP_CONTROL
- EVERGREEN_GRPH_TILE_SPLIT
- EVERGREEN_GRPH_UPDATE
- EVERGREEN_GRPH_UPDATE_LOCK
- EVERGREEN_GRPH_X_END
- EVERGREEN_GRPH_X_START
- EVERGREEN_GRPH_Y_END
- EVERGREEN_GRPH_Y_START
- EVERGREEN_GRPH_Z
- EVERGREEN_HDMI_BASE
- EVERGREEN_INTERLEAVE_EN
- EVERGREEN_LUT_10BIT_BYPASS_EN
- EVERGREEN_MASTER_UPDATE_LOCK
- EVERGREEN_MASTER_UPDATE_MODE
- EVERGREEN_MAX_BACKENDS
- EVERGREEN_MAX_BACKENDS_MASK
- EVERGREEN_MAX_FRC_EOV_CNT
- EVERGREEN_MAX_LDS_NUM
- EVERGREEN_MAX_PIPES
- EVERGREEN_MAX_PIPES_MASK
- EVERGREEN_MAX_SH_GPRS
- EVERGREEN_MAX_SH_STACK_ENTRIES
- EVERGREEN_MAX_SH_THREADS
- EVERGREEN_MAX_SIMDS
- EVERGREEN_MAX_SIMDS_MASK
- EVERGREEN_MAX_TEMP_GPRS
- EVERGREEN_MM_INDEX_HI
- EVERGREEN_P1PLL_SS_CNTL
- EVERGREEN_P2PLL_SS_CNTL
- EVERGREEN_PFP_UCODE_SIZE
- EVERGREEN_PIF_PHY0_DATA
- EVERGREEN_PIF_PHY0_INDEX
- EVERGREEN_PIF_PHY1_DATA
- EVERGREEN_PIF_PHY1_INDEX
- EVERGREEN_PM4_UCODE_SIZE
- EVERGREEN_PxPLL_SS_EN
- EVERGREEN_RLC_UCODE_SIZE
- EVERGREEN_SMC_FIRMWARE_HEADER_LOCATION
- EVERGREEN_SMC_FIRMWARE_HEADER_mcRegisterTable
- EVERGREEN_SMC_FIRMWARE_HEADER_softRegisters
- EVERGREEN_SMC_FIRMWARE_HEADER_stateTable
- EVERGREEN_VGA_MEMORY_BASE_ADDRESS
- EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH
- EVERGREEN_VIEWPORT_SIZE
- EVERGREEN_VIEWPORT_START
- EVERGREEN_VLINE_START_END
- EVERGREEN_VLINE_STAT
- EVERGREEN_VLINE_STATUS
- EVER_ECO_PRO_CDS
- EVFSABS
- EVFSADD
- EVFSCMPEQ
- EVFSCMPGT
- EVFSCMPLT
- EVFSCTSF
- EVFSCTSI
- EVFSCTSIZ
- EVFSCTUF
- EVFSCTUI
- EVFSCTUIZ
- EVFSDIV
- EVFSMUL
- EVFSNABS
- EVFSNEG
- EVFSSUB
- EVICT
- EVICTION_MASK
- EVICTION_SHIFT
- EVINTEN
- EVIOCGABS
- EVIOCGBIT
- EVIOCGEFFECTS
- EVIOCGID
- EVIOCGKEY
- EVIOCGKEYCODE
- EVIOCGKEYCODE_V2
- EVIOCGLED
- EVIOCGMASK
- EVIOCGMTSLOTS
- EVIOCGNAME
- EVIOCGPHYS
- EVIOCGPROP
- EVIOCGRAB
- EVIOCGREP
- EVIOCGSND
- EVIOCGSW
- EVIOCGUNIQ
- EVIOCGVERSION
- EVIOCREVOKE
- EVIOCRMFF
- EVIOCSABS
- EVIOCSCLOCKID
- EVIOCSFF
- EVIOCSKEYCODE
- EVIOCSKEYCODE_V2
- EVIOCSMASK
- EVIOCSREP
- EVIOC_MASK_SIZE
- EVLDD
- EVLDH
- EVLDW
- EVLHHESPLAT
- EVLHHOSSPLAT
- EVLHHOUSPLAT
- EVLWHE
- EVLWHOS
- EVLWHOU
- EVLWHSPLAT
- EVLWWSPLAT
- EVMCS1_FIELD
- EVMCS1_OFFSET
- EVMCS1_UNSUPPORTED_2NDEXEC
- EVMCS1_UNSUPPORTED_PINCTRL
- EVMCS1_UNSUPPORTED_VMENTRY_CTRL
- EVMCS1_UNSUPPORTED_VMEXIT_CTRL
- EVMCS1_UNSUPPORTED_VMFUNC
- EVMKEY
- EVM_ALLOW_METADATA_WRITES
- EVM_ATTR_FSUUID
- EVM_IMA_XATTR_DIGSIG
- EVM_IMMUTABLE_DIGSIG
- EVM_INIT_HMAC
- EVM_INIT_MASK
- EVM_INIT_X509
- EVM_KEY_MASK
- EVM_SETUP_COMPLETE
- EVM_SET_KEY_BUSY
- EVM_XATTR_HMAC
- EVM_XATTR_PORTABLE_DIGSIG
- EVNTS_MISSED_MASK
- EVNTS_MISSED_SHIFT
- EVNT_FALL
- EVNT_GPIO_MASK
- EVNT_GPIO_SHIFT
- EVNT_NUM_MASK
- EVNT_NUM_SHIFT
- EVNT_Q_LEN
- EVNT_RF
- EVNT_RISE
- EVNT_SEL_MASK
- EVNT_SEL_SHIFT
- EVNT_SINGLE
- EVNT_TS_LEN_MASK
- EVNT_TS_LEN_SHIFT
- EVNT_WR
- EVOLUTION_ER1_PID
- EVOLUTION_VID
- EVO_8U232AM_PID
- EVO_HYBRID_PID
- EVO_RCM4_PID
- EVP
- EVPE_ENABLE
- EVRB_AUXID
- EVRB_AUXIE
- EVRB_FULL
- EVRB_SFTWRID
- EVRB_SFTWRIE
- EVRB_SYSES
- EVRB_XCVR
- EVROMEDIA_FULL_HYBRID_FULLHD
- EVR_X
- EVR_XY
- EVR_XY_DEFAULT
- EVR_X_DEFAULT
- EVR_Y
- EVR_Y_DEFAULT
- EVSEL
- EVSEL_MASK
- EVSEL__PRINT_CALLCHAIN_ARROW
- EVSEL__PRINT_DSO
- EVSEL__PRINT_IP
- EVSEL__PRINT_ONELINE
- EVSEL__PRINT_SKIP_IGNORED
- EVSEL__PRINT_SRCLINE
- EVSEL__PRINT_SYM
- EVSEL__PRINT_SYMOFFSET
- EVSEL__PRINT_UNKNOWN_AS_ADDR
- EVSTAT
- EVSTDD
- EVSTDH
- EVSTDW
- EVSTWHE
- EVSTWHO
- EVSTWWE
- EVSTWWO
- EVSYNC_EVEN_IRQ_SHIFT
- EVSYNC_ODD_IRQ_SHIFT
- EVTCHNL_STATE_CONNECTED
- EVTCHNL_STATE_DISCONNECTED
- EVTCHNL_TYPE_EVT
- EVTCHNL_TYPE_REQ
- EVTCHNOP_alloc_unbound
- EVTCHNOP_bind_interdomain
- EVTCHNOP_bind_ipi
- EVTCHNOP_bind_pirq
- EVTCHNOP_bind_vcpu
- EVTCHNOP_bind_virq
- EVTCHNOP_close
- EVTCHNOP_expand_array
- EVTCHNOP_init_control
- EVTCHNOP_reset
- EVTCHNOP_send
- EVTCHNOP_set_priority
- EVTCHNOP_status
- EVTCHNOP_unmask
- EVTCHNSTAT_closed
- EVTCHNSTAT_interdomain
- EVTCHNSTAT_ipi
- EVTCHNSTAT_pirq
- EVTCHNSTAT_unbound
- EVTCHNSTAT_virq
- EVTCHN_2L_NR_CHANNELS
- EVTCHN_COL
- EVTCHN_FIFO_BIT
- EVTCHN_FIFO_BUSY
- EVTCHN_FIFO_LINKED
- EVTCHN_FIFO_LINK_BITS
- EVTCHN_FIFO_LINK_MASK
- EVTCHN_FIFO_MASKED
- EVTCHN_FIFO_MAX_QUEUES
- EVTCHN_FIFO_NR_CHANNELS
- EVTCHN_FIFO_PENDING
- EVTCHN_FIFO_PRIORITY_DEFAULT
- EVTCHN_FIFO_PRIORITY_MAX
- EVTCHN_FIFO_PRIORITY_MIN
- EVTCHN_FIRST_BIT
- EVTCHN_MASK_SIZE
- EVTCHN_PER_ROW
- EVTCHN_ROW
- EVTMUX
- EVTQ_0_ID
- EVTQ_ENT_DWORDS
- EVTQ_ENT_SZ_SHIFT
- EVTQ_MAX_SZ_SHIFT
- EVTQ_MSI_INDEX
- EVTREG_ACK
- EVTREG_ERRTYPE
- EVTREG_EVT_TYPE
- EVTREG_ID
- EVTREG_STAT
- EVTYP_ASYNC
- EVTYP_ASYNC_MASK
- EVTYP_CONFMGMDATA
- EVTYP_CONFMGMDATA_MASK
- EVTYP_CTLPROGIDENT
- EVTYP_CTLPROGIDENT_MASK
- EVTYP_DIAG_TEST
- EVTYP_DIAG_TEST_MASK
- EVTYP_ERRNOTIFY
- EVTYP_ERRNOTIFY_MASK
- EVTYP_MSG
- EVTYP_MSG_MASK
- EVTYP_OCF
- EVTYP_OCF_MASK
- EVTYP_OPCMD
- EVTYP_OPCMD_MASK
- EVTYP_PMSGCMD
- EVTYP_PMSGCMD_MASK
- EVTYP_SDIAS
- EVTYP_SDIAS_MASK
- EVTYP_SIGQUIESCE
- EVTYP_SIGQUIESCE_MASK
- EVTYP_STATECHANGE
- EVTYP_STATECHANGE_MASK
- EVTYP_STORE_DATA
- EVTYP_STORE_DATA_MASK
- EVTYP_VT220MSG
- EVTYP_VT220MSG_MASK
- EVT_ALIVE
- EVT_BUFFER_SIZE
- EVT_CFG
- EVT_CMD_DONE
- EVT_CMD_ERROR
- EVT_CMD_RETRY
- EVT_DEVICE
- EVT_DISC
- EVT_DONE
- EVT_ERR
- EVT_EVENT_CARRIER_DETECT_RSP
- EVT_EVENT_DFS_DETECT_RSP
- EVT_EVENT_PWR_RSP
- EVT_EVENT_WOW_RSP
- EVT_GSER
- EVT_HOST
- EVT_HS
- EVT_LEN_MASK
- EVT_RING_ENTRIES
- EVT_RING_SIZE
- EVT_SESSION_ERROR
- EVT_SYS_ERROR
- EVT_SYS_EVENT_CHANGE
- EVT_SYS_WATCHDOG_TIMEOUT
- EVT_VBI_B
- EVUIMM
- EVUIMM_2
- EVUIMM_4
- EVUIMM_8
- EV_1938_CODEC_MAGIC
- EV_ABS
- EV_ACCEPT
- EV_ACTIVATE
- EV_ACTIVATE_IND
- EV_ACT_ANY
- EV_ACT_ASSERTED
- EV_ACT_DEASSERTED
- EV_ALLOC
- EV_AMCC_VENDOR_ID
- EV_ANYSIG_IND
- EV_ASSIGN
- EV_ASSIGN_REQ
- EV_AWAKE
- EV_AWAKEN
- EV_BC_CLOSED
- EV_BC_OPEN
- EV_BECAME_LAST
- EV_BUFFER_OVERFLOW
- EV_BYTE_CHANNEL_MAX_BYTES
- EV_BYTE_CHANNEL_POLL
- EV_BYTE_CHANNEL_RECEIVE
- EV_BYTE_CHANNEL_SEND
- EV_CHKREQ
- EV_CHKRESP
- EV_CHN_COMMON
- EV_CHN_VOICE
- EV_CLEANUP
- EV_CLEARCOMMANDBUSY
- EV_CMD
- EV_CNT
- EV_CONFIG
- EV_CURRENT
- EV_DATIMER
- EV_DCError
- EV_DEACTIVATE
- EV_DEACTIVATE_IND
- EV_DEACT_CNF
- EV_DEACT_IND
- EV_DENIED
- EV_DIAL
- EV_DOORBELL_SEND
- EV_DivZero
- EV_EAGAIN
- EV_EFAULT
- EV_EINVAL
- EV_EIO
- EV_ENEA_VENDOR_ID
- EV_ENODEV
- EV_ENOENT
- EV_ENOMEM
- EV_EPAPR_VENDOR_ID
- EV_EPERM
- EV_Extension
- EV_FF
- EV_FF_STATUS
- EV_FSL_VENDOR_ID
- EV_FT
- EV_GHS_VENDOR_ID
- EV_GLB
- EV_GOT_BARRIER_NR
- EV_HCALL_CLOBBERS
- EV_HCALL_CLOBBERS1
- EV_HCALL_CLOBBERS2
- EV_HCALL_CLOBBERS3
- EV_HCALL_CLOBBERS4
- EV_HCALL_CLOBBERS5
- EV_HCALL_CLOBBERS6
- EV_HCALL_CLOBBERS7
- EV_HCALL_CLOBBERS8
- EV_HCALL_TOKEN
- EV_HUP
- EV_IBM_VENDOR_ID
- EV_IDLE
- EV_IDREQ
- EV_IF_LOCK
- EV_IF_VER
- EV_INFO2_IND
- EV_INFO4_IND
- EV_INTERNAL
- EV_INT_EOI
- EV_INT_GET_CONFIG
- EV_INT_GET_MASK
- EV_INT_GET_TASK_PRIORITY
- EV_INT_IACK
- EV_INT_SEND_IPI
- EV_INT_SET_CONFIG
- EV_INT_SET_MASK
- EV_INT_SET_TASK_PRIORITY
- EV_INVALID_STATE
- EV_KEY
- EV_KVM_VENDOR_ID
- EV_L1_DEACTIVATE
- EV_L2_ACK_PULL
- EV_L2_CLEAR_OWN_BUSY
- EV_L2_DISC
- EV_L2_DL_DATA
- EV_L2_DL_ESTABLISH_REQ
- EV_L2_DL_RELEASE_REQ
- EV_L2_DL_UNITDATA
- EV_L2_DM
- EV_L2_FRAME_ERROR
- EV_L2_FRMR
- EV_L2_I
- EV_L2_MDL_ASSIGN
- EV_L2_MDL_ERROR
- EV_L2_MDL_REMOVE
- EV_L2_SABME
- EV_L2_SET_OWN_BUSY
- EV_L2_SUPER
- EV_L2_T200
- EV_L2_T200I
- EV_L2_T203
- EV_L2_T203I
- EV_L2_UA
- EV_L2_UI
- EV_LED
- EV_LINK
- EV_LOCAL_VENDOR_ID
- EV_MAX
- EV_MIC
- EV_MSC
- EV_MSGSND
- EV_MachineCheck
- EV_Misaligned
- EV_NONE
- EV_NUM
- EV_PAR
- EV_PFF
- EV_PH_ACTIVATE
- EV_PH_DEACTIVATE
- EV_POWER_UP
- EV_PROC_CIDMODE
- EV_PUT
- EV_PWR
- EV_PrivilegeV
- EV_QUAL_CAP_CHANGE
- EV_QUAL_CPU_CHANGE
- EV_QUAL_OPEN4BUSINESS
- EV_REGISTER_GAIN
- EV_REGISTER_OFFSET_X
- EV_REGISTER_OFFSET_Y
- EV_REGISTER_THRESHOLD
- EV_REL
- EV_REMOVE
- EV_REP
- EV_RESET_IND
- EV_RX
- EV_SEQ_LOCAL
- EV_SHUTDOWN
- EV_SND
- EV_START
- EV_STOP
- EV_SUCCESS
- EV_SW
- EV_SWI
- EV_SYN
- EV_SYSEX
- EV_TIMEOUT
- EV_TIMER
- EV_TIMER3
- EV_TIMER_ACT
- EV_TIMER_DEACT
- EV_TIMING
- EV_TLBMissD
- EV_TLBMissI
- EV_TLBProtV
- EV_TOKEN
- EV_TX
- EV_TXCPY
- EV_TXEXC
- EV_T_CLASS
- EV_T_EVENT
- EV_Trap
- EV_UI
- EV_UINPUT
- EV_UNIMPLEMENTED
- EV_UNKNOWN
- EV_VERIFY
- EV_VERSION
- EV_WR_VENDOR_ID
- EW
- EWDN
- EWDS
- EWDS_ADDR
- EWEN
- EWEN_ADDR
- EWMA_DIV
- EWMA_LEVEL
- EWOLIE
- EWOLIR
- EWOULDBLOCK
- EWRONGFS
- EWRPTH
- EWRPTL
- EWS
- EWS88D_CONTROL
- EWS_DEVICE_DESC
- EWS_I2C_6FIRE
- EWS_I2C_88D
- EWS_I2C_CS8404
- EWS_I2C_PCF1
- EWS_I2C_PCF2
- EW_MAX
- EW_SHIFT
- EW_VAL
- EX
- EX2
- EX3
- EXABYTE_ENABLE_NEST
- EXACT_ADDR_FILTERS
- EXACT_BURST_LIMIT
- EXAMPLES
- EXAR_DEVICE
- EXAR_OFFSET_MPIOLVL_HI
- EXAR_OFFSET_MPIOLVL_LO
- EXAR_OFFSET_MPIOSEL_HI
- EXAR_OFFSET_MPIOSEL_LO
- EXBUF_ENB_MARK
- EXBUS_ATA
- EXC
- EXC3000_LEN_FRAME
- EXC3000_LEN_POINT
- EXC3000_MT_EVENT
- EXC3000_NUM_SLOTS
- EXC3000_SLOTS_PER_FRAME
- EXC3000_TIMEOUT_MS
- EXCA_REGS_BASE
- EXCA_REGS_SIZE
- EXCA_REG_RST_EN
- EXCCAUSE_ALLOCA
- EXCCAUSE_COPROCESSOR0_DISABLED
- EXCCAUSE_COPROCESSOR1_DISABLED
- EXCCAUSE_COPROCESSOR2_DISABLED
- EXCCAUSE_COPROCESSOR3_DISABLED
- EXCCAUSE_COPROCESSOR4_DISABLED
- EXCCAUSE_COPROCESSOR5_DISABLED
- EXCCAUSE_COPROCESSOR6_DISABLED
- EXCCAUSE_COPROCESSOR7_DISABLED
- EXCCAUSE_DTLB_MISS
- EXCCAUSE_DTLB_MULTIHIT
- EXCCAUSE_DTLB_PRIVILEGE
- EXCCAUSE_DTLB_SIZE_RESTRICTION
- EXCCAUSE_EXCCAUSE_MASK
- EXCCAUSE_EXCCAUSE_SHIFT
- EXCCAUSE_FETCH_CACHE_ATTRIBUTE
- EXCCAUSE_ILLEGAL_INSTRUCTION
- EXCCAUSE_INSTRUCTION_FETCH_ERROR
- EXCCAUSE_INSTR_ADDR_ERROR
- EXCCAUSE_INSTR_DATA_ERROR
- EXCCAUSE_INTEGER_DIVIDE_BY_ZERO
- EXCCAUSE_ITLB_MISS
- EXCCAUSE_ITLB_MULTIHIT
- EXCCAUSE_ITLB_PRIVILEGE
- EXCCAUSE_ITLB_SIZE_RESTRICTION
- EXCCAUSE_LEVEL1_INTERRUPT
- EXCCAUSE_LOAD_CACHE_ATTRIBUTE
- EXCCAUSE_LOAD_STORE_ADDR_ERROR
- EXCCAUSE_LOAD_STORE_DATA_ERROR
- EXCCAUSE_LOAD_STORE_ERROR
- EXCCAUSE_MAPPED_DEBUG
- EXCCAUSE_MAPPED_NMI
- EXCCAUSE_N
- EXCCAUSE_PRIVILEGED
- EXCCAUSE_SPECULATION
- EXCCAUSE_STORE_CACHE_ATTRIBUTE
- EXCCAUSE_SYSTEM_CALL
- EXCCAUSE_UNALIGNED
- EXCCODE_ADEL
- EXCCODE_ADES
- EXCCODE_BP
- EXCCODE_CPU
- EXCCODE_DBE
- EXCCODE_DSPDIS
- EXCCODE_FPE
- EXCCODE_GE
- EXCCODE_IBE
- EXCCODE_INT
- EXCCODE_MCHECK
- EXCCODE_MDMX
- EXCCODE_MOD
- EXCCODE_MSADIS
- EXCCODE_MSAFPE
- EXCCODE_OV
- EXCCODE_RI
- EXCCODE_SYS
- EXCCODE_THREAD
- EXCCODE_TLBL
- EXCCODE_TLBRI
- EXCCODE_TLBS
- EXCCODE_TLBXI
- EXCCODE_TR
- EXCCODE_WATCH
- EXCCOLL
- EXCDEFER
- EXCELLENT
- EXCEPTION
- EXCEPTION_BASE_BASE
- EXCEPTION_BASE_INCR
- EXCEPTION_BITMAP
- EXCEPTION_COMMON
- EXCEPTION_COMMON_CRIT
- EXCEPTION_COMMON_DBG
- EXCEPTION_COMMON_LVL
- EXCEPTION_COMMON_MC
- EXCEPTION_ENTRY
- EXCEPTION_ERRCODE_MASK
- EXCEPTION_HANDLE
- EXCEPTION_LOAD_GPR2
- EXCEPTION_LOAD_GPR3
- EXCEPTION_LOAD_GPR4
- EXCEPTION_LOAD_GPR5
- EXCEPTION_LOAD_GPR6
- EXCEPTION_PROLOG
- EXCEPTION_Q
- EXCEPTION_RESTORE_REGS
- EXCEPTION_RETRY_BITS
- EXCEPTION_RETRY_LIMIT
- EXCEPTION_SR
- EXCEPTION_STACK_ORDER
- EXCEPTION_STKSZ
- EXCEPTION_STORE_GPR2
- EXCEPTION_STORE_GPR3
- EXCEPTION_STORE_GPR4
- EXCEPTION_STORE_GPR5
- EXCEPTION_STORE_GPR6
- EXCEPTION_STUB
- EXCEPTION_TABLE
- EXCEPTION_T_LOAD_GPR10
- EXCEPTION_T_LOAD_GPR30
- EXCEPTION_T_LOAD_SP
- EXCEPTION_T_STORE_GPR10
- EXCEPTION_T_STORE_GPR30
- EXCEPTION_T_STORE_SP
- EXCEPTION_VECTOR
- EXCEPTION_VECTOR_DEBUG
- EXCEPT_CAUSE_EPX
- EXCEPT_CAUSE_FPX
- EXCEPT_CAUSE_IFX
- EXCEPT_CAUSE_LBX
- EXCEPT_CAUSE_OPX
- EXCEPT_CAUSE_PRX
- EXCEPT_CAUSE_RAX
- EXCEPT_CAUSE_RCX
- EXCEPT_MAX_HDR_SIZE
- EXCEPT_OFFSET
- EXCEPT_TYPE_EXC
- EXCEPT_TYPE_IXF
- EXCEPT_TYPE_NXF
- EXCEPT_TYPE_SXF
- EXCEP_AML
- EXCEP_CTL
- EXCEP_ENV
- EXCEP_PGM
- EXCEP_TBL
- EXCEP_TXT
- EXCESSIVE_COL
- EXCHANGE_MEDIUM
- EXCHANGE_PINS
- EXCHGID4_FLAG_BIND_PRINC_STATEID
- EXCHGID4_FLAG_CONFIRMED_R
- EXCHGID4_FLAG_MASK_A
- EXCHGID4_FLAG_MASK_PNFS
- EXCHGID4_FLAG_MASK_R
- EXCHGID4_FLAG_SUPP_MOVED_MIGR
- EXCHGID4_FLAG_SUPP_MOVED_REFER
- EXCHGID4_FLAG_UPD_CONFIRMED_REC_A
- EXCHGID4_FLAG_USE_NON_PNFS
- EXCHGID4_FLAG_USE_PNFS_DS
- EXCHGID4_FLAG_USE_PNFS_MDS
- EXCLR
- EXCLUSIVE
- EXCLUSIVE_GET
- EXCNAKclear
- EXCNAKflag
- EXCNT
- EXCP
- EXCPQ_EMPTY
- EXCPT_ABORT
- EXCPT_BENIGN
- EXCPT_CONTRIBUTORY
- EXCPT_FAULT
- EXCPT_INTERRUPT
- EXCPT_PF
- EXCPT_TRAP
- EXCP_CONTEXT
- EXCP_Q_ED_ADR
- EXCP_Q_RD_PTR
- EXCP_Q_ST_ADR
- EXCP_Q_WR_PTR
- EXC_ARBLOST
- EXC_BREAKPOINT
- EXC_COMMON
- EXC_COMMON_ASYNC
- EXC_COMMON_BEGIN
- EXC_HV
- EXC_HV_OR_STD
- EXC_INST_ACCESS
- EXC_INST_MISALIGNED
- EXC_INST_PAGE_FAULT
- EXC_LEVEL_EXCEPTION_PROLOG
- EXC_LOAD_ACCESS
- EXC_LOAD_PAGE_FAULT
- EXC_LVL_FRAME_OVERHEAD
- EXC_PHASEMM
- EXC_REAL_BEGIN
- EXC_REAL_END
- EXC_REAL_NONE
- EXC_RESELECTED
- EXC_RET_STACK_MASK
- EXC_RET_THREADMODE_PROCESSSTACK
- EXC_R_PROTECTION_FAULT
- EXC_SELECTED
- EXC_SELTO
- EXC_SELWATN
- EXC_STD
- EXC_STORE_ACCESS
- EXC_STORE_PAGE_FAULT
- EXC_SUPERV_DATA_ACCESS
- EXC_SUPERV_INSN_ACCESS
- EXC_SYSCALL
- EXC_VIRT_BEGIN
- EXC_VIRT_END
- EXC_VIRT_NONE
- EXC_W_PROTECTION_FAULT
- EXC_XFER_LITE
- EXC_XFER_STD
- EXC_XFER_TEMPLATE
- EXC_X_PROTECTION_FAULT
- EXD
- EXDBMV
- EXDEF
- EXDEFER
- EXDEV
- EXECINSTR
- EXECLISTS_REQUEST_SIZE
- EXECLIST_MAX_PORTS
- EXECUTE_HARD_RESET
- EXECUTE_SYSCALL
- EXECUTE_TO_DEEPSLEEP
- EXECUTE_TO_IDLE
- EXECUTE_TO_SLEEP
- EXECUTIONS
- EXECUTION_TIMEOUT_RESET
- EXEC_BIOS_CMD_TABLE
- EXEC_BIT
- EXEC_OBJECT_ASYNC
- EXEC_OBJECT_CAPTURE
- EXEC_OBJECT_NEEDS_FENCE
- EXEC_OBJECT_NEEDS_GTT
- EXEC_OBJECT_PAD_TO_SIZE
- EXEC_OBJECT_PINNED
- EXEC_OBJECT_SUPPORTS_48B_ADDRESS
- EXEC_OBJECT_WRITE
- EXEC_PAGESIZE
- EXEC_PATH_ENVIRONMENT
- EXEC_Q
- EXEC_QUEUE_TAIL
- EXEC_SIZE
- EXEC_SS_DELAY_SHIFT
- EXEC_SS_STEP_SIZE_SHIFT
- EXETOIDLE_RETURNTOEXE
- EXETOSLEEP_RETURNTOEXE
- EXE_PWR_IPS
- EXE_PWR_LPS
- EXE_PWR_NONE
- EXFAT
- EXFAT_DEBUGFLAGS_ERROR_RW
- EXFAT_DEBUGFLAGS_INVALID_UMOUNT
- EXFAT_ERRORS_CONT
- EXFAT_ERRORS_PANIC
- EXFAT_ERRORS_RO
- EXFAT_HASH_BITS
- EXFAT_HASH_SIZE
- EXFAT_I
- EXFAT_IOCTL_GET_VOLUME_ID
- EXFAT_IOC_GET_DEBUGFLAGS
- EXFAT_IOC_SET_DEBUGFLAGS
- EXFAT_ROOT_INO
- EXFAT_SB
- EXFAT_SUPER_MAGIC
- EXFAT_THRESHOLD
- EXFAT_VERSION
- EXFULL
- EXFUN
- EXHCH
- EXHCH_HSIZE_SHIFT
- EXHCH_VSIZE_SHIFT
- EXHCL
- EXI
- EXIF_INFO_AV_DE
- EXIF_INFO_AV_NU
- EXIF_INFO_BV_DE
- EXIF_INFO_BV_NU
- EXIF_INFO_EBV_DE
- EXIF_INFO_EBV_NU
- EXIF_INFO_EXPTIME_DE
- EXIF_INFO_EXPTIME_NU
- EXIF_INFO_FLASH
- EXIF_INFO_ISO
- EXIF_INFO_QVAL
- EXIF_INFO_SDR
- EXIF_INFO_TV_DE
- EXIF_INFO_TV_NU
- EXINT
- EXIT
- EXITING
- EXITING_GUEST_MODE
- EXITING_ULPS
- EXITSLREQ_BIT
- EXIT_BLOCK_INDEX
- EXIT_BLOCK_PTR_FOR_FN
- EXIT_CALL
- EXIT_DATA
- EXIT_DEAD
- EXIT_DRAM_SELFRESH_MODE
- EXIT_FAIL
- EXIT_FAIL_BPF
- EXIT_FAIL_LIBBPF
- EXIT_FAIL_MEM
- EXIT_FAIL_OPTION
- EXIT_FAIL_XDP
- EXIT_KEY
- EXIT_OK
- EXIT_ON_MISMATCH
- EXIT_PM_STATE
- EXIT_POWER_DOWN_RESET
- EXIT_QUALIFICATION
- EXIT_REASON_APIC_ACCESS
- EXIT_REASON_APIC_WRITE
- EXIT_REASON_CPUID
- EXIT_REASON_CR_ACCESS
- EXIT_REASON_DR_ACCESS
- EXIT_REASON_ENCLS
- EXIT_REASON_EOI_INDUCED
- EXIT_REASON_EPT_MISCONFIG
- EXIT_REASON_EPT_VIOLATION
- EXIT_REASON_EXCEPTION_NMI
- EXIT_REASON_EXTERNAL_INTERRUPT
- EXIT_REASON_FAILED_VMENTRY
- EXIT_REASON_GDTR_IDTR
- EXIT_REASON_HLT
- EXIT_REASON_INIT_SIGNAL
- EXIT_REASON_INVALID_STATE
- EXIT_REASON_INVD
- EXIT_REASON_INVEPT
- EXIT_REASON_INVLPG
- EXIT_REASON_INVPCID
- EXIT_REASON_INVVPID
- EXIT_REASON_IO_INSTRUCTION
- EXIT_REASON_LDTR_TR
- EXIT_REASON_MCE_DURING_VMENTRY
- EXIT_REASON_MONITOR_INSTRUCTION
- EXIT_REASON_MONITOR_TRAP_FLAG
- EXIT_REASON_MSR_LOAD_FAIL
- EXIT_REASON_MSR_READ
- EXIT_REASON_MSR_WRITE
- EXIT_REASON_MWAIT_INSTRUCTION
- EXIT_REASON_NMI_WINDOW
- EXIT_REASON_PAUSE_INSTRUCTION
- EXIT_REASON_PENDING_INTERRUPT
- EXIT_REASON_PML_FULL
- EXIT_REASON_PREEMPTION_TIMER
- EXIT_REASON_RDPMC
- EXIT_REASON_RDRAND
- EXIT_REASON_RDSEED
- EXIT_REASON_RDTSC
- EXIT_REASON_RDTSCP
- EXIT_REASON_TASK_SWITCH
- EXIT_REASON_TPAUSE
- EXIT_REASON_TPR_BELOW_THRESHOLD
- EXIT_REASON_TRIPLE_FAULT
- EXIT_REASON_UMWAIT
- EXIT_REASON_VMCALL
- EXIT_REASON_VMCLEAR
- EXIT_REASON_VMFUNC
- EXIT_REASON_VMLAUNCH
- EXIT_REASON_VMOFF
- EXIT_REASON_VMON
- EXIT_REASON_VMPTRLD
- EXIT_REASON_VMPTRST
- EXIT_REASON_VMREAD
- EXIT_REASON_VMRESUME
- EXIT_REASON_VMWRITE
- EXIT_REASON_WBINVD
- EXIT_REASON_XRSTORS
- EXIT_REASON_XSAVES
- EXIT_REASON_XSETBV
- EXIT_SECTIONS
- EXIT_SHARED_FUNCTION
- EXIT_TEXT
- EXIT_TEXT_SECTIONS
- EXIT_TO_USERMODE_LOOP_FLAGS
- EXIT_TRACE
- EXIT_U1_INTR
- EXIT_U2_INTR
- EXIT_U3_INTR
- EXIT_ULPS_DEV_READY
- EXIT_VMX_OPS
- EXIT_ZERO_CNT_MAX
- EXIT_ZERO_COUNT_MASK
- EXIT_ZERO_COUNT_SHIFT
- EXIT_ZOMBIE
- EXI_CLK_32MHZ
- EXI_CR
- EXI_CR_READ_WRITE
- EXI_CR_TLEN
- EXI_CR_TSTART
- EXI_CR_WRITE
- EXI_CSR
- EXI_CSR_CLKMASK
- EXI_CSR_CLK_32MHZ
- EXI_CSR_CSMASK
- EXI_CSR_CS_0
- EXI_CTRL
- EXI_CTRL_ENABLE
- EXI_DATA
- EXLEN
- EXLOOP
- EXNUMBER
- EXO
- EXO2
- EXP
- EXP0__RESERVED_MASK
- EXP0__RESERVED__SHIFT
- EXP1__RESERVED_MASK
- EXP1__RESERVED__SHIFT
- EXP2__RESERVED_MASK
- EXP2__RESERVED__SHIFT
- EXP3__RESERVED_MASK
- EXP3__RESERVED__SHIFT
- EXP4__RESERVED_MASK
- EXP4__RESERVED__SHIFT
- EXP5__RESERVED_MASK
- EXP5__RESERVED__SHIFT
- EXP6__RESERVED_MASK
- EXP6__RESERVED__SHIFT
- EXP7__RESERVED_MASK
- EXP7__RESERVED__SHIFT
- EXPAND
- EXPANDER
- EXPAND_GRANULARITY
- EXPANSION_ENABLENPAGE
- EXPANSION_LCWP
- EXPANSION_MFAULTS
- EXPANSION_MODE_DYNAMIC
- EXPANSION_MODE_ZERO
- EXPANSION_NPCAPABLE
- EXPANSION_NWAY
- EXPANSION_RESV
- EXPANSION_ROM_SIZE
- EXPAN_ROM
- EXPBOARD_BIT0
- EXPBOARD_BIT1
- EXPBOARD_BIT2
- EXPBOARD_SHIFT
- EXPCAP
- EXPECT
- EXPECTED
- EXPECTED_CLK_PARENT_COUNT
- EXPECTED_FLAGS
- EXPECTED_PTYPE
- EXPECT_DATA
- EXPECT_DELTA_DEC
- EXPECT_DELTA_INC
- EXPECT_DELTA_SAME
- EXPECT_DISC
- EXPECT_EQ
- EXPECT_FALSE
- EXPECT_GE
- EXPECT_GT
- EXPECT_HDR1
- EXPECT_HDR2
- EXPECT_HDR3
- EXPECT_LAST
- EXPECT_LE
- EXPECT_LT
- EXPECT_NE
- EXPECT_NULL
- EXPECT_ROOT_DEC
- EXPECT_ROOT_INC
- EXPECT_ROOT_SAME
- EXPECT_STATS
- EXPECT_STREQ
- EXPECT_STRNE
- EXPECT_SYSCALL_RETURN
- EXPECT_TRUE
- EXPENSIVE
- EXPEVT
- EXPIO_INT_BUTTON_A
- EXPIO_INT_BUTTON_B
- EXPIO_INT_ENET
- EXPIO_INT_ENET_INT
- EXPIO_INT_XUART_A
- EXPIO_INT_XUART_B
- EXPIO_INT_XUART_INTA
- EXPIO_INT_XUART_INTB
- EXPIRED_TIMER
- EXPIRE_DIRTY_ATIME
- EXPIRE_PERIOD
- EXPKEY_HASHBITS
- EXPKEY_HASHMASK
- EXPKEY_HASHMAX
- EXPLICIT_IV
- EXPLICIT_IV_SHIFT
- EXPLICIT_RESET_ASSERT
- EXPLODEDP
- EXPLODESP
- EXPLODEXDP
- EXPLODEXSP
- EXPLODEYDP
- EXPLODEYSP
- EXPLODEZDP
- EXPLODEZSP
- EXPLORED
- EXPMASK
- EXPMASK_BASE
- EXPMASK_BRDSSLP
- EXPMASK_ENABLE
- EXPMASK_MMCAW
- EXPMASK_RTEDS
- EXPMASK_STATUS
- EXPO12A_DEF
- EXPONENT_SIZE
- EXPORT
- EXPORT_16_16_FLOAT_8PIX
- EXPORT_16_16_SIGNED_8PIX
- EXPORT_16_16_UNSIGNED_8PIX
- EXPORT_2C_32BPC_AR
- EXPORT_2C_32BPC_GR
- EXPORT_2P_32BPC_ABGR
- EXPORT_32BPP_8PIX
- EXPORT_32_ABGR
- EXPORT_32_AR
- EXPORT_32_GR
- EXPORT_32_R
- EXPORT_4C_16BPC
- EXPORT_4C_32BPC
- EXPORT_4P_16BPC_ABGR
- EXPORT_4P_32BPC_ABGR
- EXPORT_4P_32BPC_AR
- EXPORT_4P_32BPC_GR
- EXPORT_8P_32BPC_R
- EXPORT_ACPI_INTERFACES
- EXPORT_ANY_Z
- EXPORT_DATA_SYMBOL
- EXPORT_DATA_SYMBOL_GPL
- EXPORT_EARLY_PER_CPU_SYMBOL
- EXPORT_FOR_TESTS
- EXPORT_FP16_ABGR
- EXPORT_GREATER_THAN_Z
- EXPORT_HASHBITS
- EXPORT_HASHMAX
- EXPORT_LESS_THAN_Z
- EXPORT_PER_CPU_SYMBOL
- EXPORT_PER_CPU_SYMBOL_GPL
- EXPORT_RESERVED
- EXPORT_SIGNED16_ABGR
- EXPORT_SRC_C
- EXPORT_SYMBOL
- EXPORT_SYMBOL_FOR_TESTS_ONLY
- EXPORT_SYMBOL_GPL
- EXPORT_SYMBOL_GPL_FUTURE
- EXPORT_SYMBOL_KASAN
- EXPORT_SYMBOL_NOKASAN
- EXPORT_SYMBOL_NS
- EXPORT_SYMBOL_NS_GPL
- EXPORT_SYMBOL_PROTO
- EXPORT_THUNK
- EXPORT_TO_INIT_EXIT
- EXPORT_TRACEPOINT_SYMBOL
- EXPORT_TRACEPOINT_SYMBOL_GPL
- EXPORT_UNSIGNED16_ABGR
- EXPORT_UNUSED
- EXPORT_UNUSED_SYMBOL
- EXPORT_UNUSED_SYMBOL_GPL
- EXPORT_WEXT_HANDLER
- EXPOSURE_DARK
- EXPOSURE_DEFAULT
- EXPOSURE_LIGHT
- EXPOSURE_MAX
- EXPOSURE_NORMAL
- EXPOSURE_VERY_DARK
- EXPOSURE_VERY_LIGHT
- EXPOS_MAX_MS
- EXPOS_MIN_MS
- EXPO_CHANGE
- EXPO_CHANGED
- EXPO_DROP_FRAME
- EXPO_NO_CHANGE
- EXPRESS_ADDR_MEMORY
- EXPRESS_CSMI
- EXPRESS_IOCTL_CHAN_INFO
- EXPRESS_IOCTL_DEFAULT_PARAMS
- EXPRESS_IOCTL_FC_API
- EXPRESS_IOCTL_GET_CHANNELS
- EXPRESS_IOCTL_GET_ID
- EXPRESS_IOCTL_GET_MOD_INFO
- EXPRESS_IOCTL_HBA
- EXPRESS_IOCTL_MAX
- EXPRESS_IOCTL_MIN
- EXPRESS_IOCTL_READ_PARAMS
- EXPRESS_IOCTL_RW_FIRMWARE
- EXPRESS_IOCTL_SIGNATURE
- EXPRESS_IOCTL_SIGNATURE_SIZE
- EXPRESS_IOCTL_SMP
- EXPRESS_IOCTL_VDA
- EXPRESS_IOCTL_WRITE_PARAMS
- EXPRESS_RW_MEMORY
- EXPRESS_TSDK_DUMP
- EXPROM_WRITE_ENABLE
- EXPR_AND
- EXPR_H
- EXPR_MAX_OTHER
- EXPR_NOT
- EXPR_OR
- EXPSIZE
- EXPSIZE2
- EXP_1
- EXP_10s
- EXP_15
- EXP_300s
- EXP_5
- EXP_60s
- EXP_ACC_DARK
- EXP_ACC_LIGHT
- EXP_ACK_TIME
- EXP_B
- EXP_BIAS
- EXP_BRCT_CHG
- EXP_BYTES
- EXP_B_1
- EXP_B_2
- EXP_B_3
- EXP_B_4
- EXP_B_5
- EXP_CAP_ID_OFFSET
- EXP_CODE
- EXP_CSR_MBAR
- EXP_CTS_TIME
- EXP_FROM_COMP
- EXP_FW_API_VER_BRANCH
- EXP_FW_API_VER_MAJOR
- EXP_FW_API_VER_MINOR
- EXP_IV_SIZE
- EXP_Infinity
- EXP_M1
- EXP_M1_1
- EXP_M1_2
- EXP_M1_3
- EXP_M1_4
- EXP_M1_5
- EXP_M2
- EXP_M2_1
- EXP_M2_2
- EXP_M2_3
- EXP_M2_4
- EXP_M2_5
- EXP_MMAXH_REG
- EXP_MMAXL_REG
- EXP_MMAXM_REG
- EXP_MMINH_REG
- EXP_MMINL_REG
- EXP_NaN
- EXP_OVER
- EXP_ROM_ADR
- EXP_ROM_CONTROL
- EXP_ROM_DATA
- EXP_TID_CLEAR
- EXP_TID_GET
- EXP_TID_RESET
- EXP_TID_SET
- EXP_TID_SET_EMPTY
- EXP_TID_TIDCTRL_MASK
- EXP_TID_TIDCTRL_SHIFT
- EXP_TID_TIDIDX_MASK
- EXP_TID_TIDIDX_SHIFT
- EXP_TID_TIDLEN_MASK
- EXP_TID_TIDLEN_SHIFT
- EXP_TIMEH_REG
- EXP_TIMEL_REG
- EXP_TIMEM_REG
- EXP_TIMING_CS0
- EXP_UNDER
- EXP_WAY_UNDER
- EXP_WIN_MBAR
- EXR_MASK
- EXR_TRACE
- EXS
- EXSIBLKRST
- EXSICNFGR
- EXSICNTRLR
- EXSI_REG_BASE_ADR
- EXSTACK_DEFAULT
- EXSTACK_DISABLE_X
- EXSTACK_ENABLE_X
- EXS_RES0
- EXS_RES1
- EXS_RES2
- EXS_TES0
- EXS_TES1
- EXS_TES2
- EXT
- EXT0
- EXT0_GPIO
- EXT0_GPIO_BASE
- EXT1
- EXT2
- EXT2FS_DATE
- EXT2FS_DEBUG
- EXT2FS_VERSION
- EXT2_ACL_VERSION
- EXT2_ADDR_PER_BLOCK
- EXT2_ADDR_PER_BLOCK_BITS
- EXT2_APPEND_FL
- EXT2_BAD_INO
- EXT2_BLOCKS_PER_GROUP
- EXT2_BLOCK_SIZE
- EXT2_BLOCK_SIZE_BITS
- EXT2_BOOT_LOADER_INO
- EXT2_BTREE_FL
- EXT2_CLEAR_COMPAT_FEATURE
- EXT2_CLEAR_INCOMPAT_FEATURE
- EXT2_CLEAR_RO_COMPAT_FEATURE
- EXT2_COMPRBLK_FL
- EXT2_COMPR_FL
- EXT2_CURRENT_REV
- EXT2_DEFAULT_RESERVE_BLOCKS
- EXT2_DEFM_ACL
- EXT2_DEFM_BSDGROUPS
- EXT2_DEFM_DEBUG
- EXT2_DEFM_UID16
- EXT2_DEFM_XATTR_USER
- EXT2_DEF_RESGID
- EXT2_DEF_RESUID
- EXT2_DESC_PER_BLOCK
- EXT2_DESC_PER_BLOCK_BITS
- EXT2_DFL_CHECKINTERVAL
- EXT2_DFL_MAX_MNT_COUNT
- EXT2_DIND_BLOCK
- EXT2_DIRSYNC_FL
- EXT2_DIRTY_FL
- EXT2_DIR_PAD
- EXT2_DIR_REC_LEN
- EXT2_DIR_ROUND
- EXT2_DYNAMIC_REV
- EXT2_ECOMPR_FL
- EXT2_ERRORS_CONTINUE
- EXT2_ERRORS_DEFAULT
- EXT2_ERRORS_PANIC
- EXT2_ERRORS_RO
- EXT2_ERROR_FS
- EXT2_FEATURE_COMPAT_ANY
- EXT2_FEATURE_COMPAT_DIR_INDEX
- EXT2_FEATURE_COMPAT_DIR_PREALLOC
- EXT2_FEATURE_COMPAT_EXT_ATTR
- EXT2_FEATURE_COMPAT_IMAGIC_INODES
- EXT2_FEATURE_COMPAT_RESIZE_INO
- EXT2_FEATURE_COMPAT_SUPP
- EXT2_FEATURE_INCOMPAT_ANY
- EXT2_FEATURE_INCOMPAT_COMPRESSION
- EXT2_FEATURE_INCOMPAT_FILETYPE
- EXT2_FEATURE_INCOMPAT_META_BG
- EXT2_FEATURE_INCOMPAT_SUPP
- EXT2_FEATURE_INCOMPAT_UNSUPPORTED
- EXT2_FEATURE_RO_COMPAT_ANY
- EXT2_FEATURE_RO_COMPAT_BTREE_DIR
- EXT2_FEATURE_RO_COMPAT_LARGE_FILE
- EXT2_FEATURE_RO_COMPAT_SPARSE_SUPER
- EXT2_FEATURE_RO_COMPAT_SUPP
- EXT2_FEATURE_RO_COMPAT_UNSUPPORTED
- EXT2_FIRST_INO
- EXT2_FLAGS_SIGNED_HASH
- EXT2_FLAGS_TEST_FILESYS
- EXT2_FLAGS_UNSIGNED_HASH
- EXT2_FL_INHERITED
- EXT2_FL_USER_MODIFIABLE
- EXT2_FL_USER_VISIBLE
- EXT2_FRAGS_PER_BLOCK
- EXT2_FRAG_SIZE
- EXT2_GOOD_OLD_FIRST_INO
- EXT2_GOOD_OLD_INODE_SIZE
- EXT2_GOOD_OLD_REV
- EXT2_HAS_COMPAT_FEATURE
- EXT2_HAS_INCOMPAT_FEATURE
- EXT2_HAS_RO_COMPAT_FEATURE
- EXT2_I
- EXT2_IMAGIC_FL
- EXT2_IMMUTABLE_FL
- EXT2_INDEX_FL
- EXT2_IND_BLOCK
- EXT2_INODES_PER_GROUP
- EXT2_INODE_SIZE
- EXT2_IOC32_GETFLAGS
- EXT2_IOC32_GETVERSION
- EXT2_IOC32_SETFLAGS
- EXT2_IOC32_SETVERSION
- EXT2_IOC_GETFLAGS
- EXT2_IOC_GETRSVSZ
- EXT2_IOC_GETVERSION
- EXT2_IOC_SETFLAGS
- EXT2_IOC_SETRSVSZ
- EXT2_IOC_SETVERSION
- EXT2_JOURNAL_DATA_FL
- EXT2_LINK_MAX
- EXT2_MAX_BLOCK_SIZE
- EXT2_MAX_FRAG_SIZE
- EXT2_MAX_REC_LEN
- EXT2_MAX_RESERVE_BLOCKS
- EXT2_MAX_SUPP_REV
- EXT2_MIN_BLOCK_LOG_SIZE
- EXT2_MIN_BLOCK_SIZE
- EXT2_MIN_FRAG_LOG_SIZE
- EXT2_MIN_FRAG_SIZE
- EXT2_MOUNT_CHECK
- EXT2_MOUNT_DAX
- EXT2_MOUNT_DEBUG
- EXT2_MOUNT_ERRORS_CONT
- EXT2_MOUNT_ERRORS_PANIC
- EXT2_MOUNT_ERRORS_RO
- EXT2_MOUNT_GRPID
- EXT2_MOUNT_GRPQUOTA
- EXT2_MOUNT_MINIX_DF
- EXT2_MOUNT_NOBH
- EXT2_MOUNT_NO_UID32
- EXT2_MOUNT_OLDALLOC
- EXT2_MOUNT_POSIX_ACL
- EXT2_MOUNT_RESERVATION
- EXT2_MOUNT_USRQUOTA
- EXT2_MOUNT_XATTR_USER
- EXT2_MOUNT_XIP
- EXT2_NAME_LEN
- EXT2_NDIR_BLOCKS
- EXT2_NOATIME_FL
- EXT2_NOCOMP_FL
- EXT2_NODUMP_FL
- EXT2_NOTAIL_FL
- EXT2_N_BLOCKS
- EXT2_OS_FREEBSD
- EXT2_OS_HURD
- EXT2_OS_LINUX
- EXT2_OS_LITES
- EXT2_OS_MASIX
- EXT2_OTHER_FLMASK
- EXT2_REG_FLMASK
- EXT2_RESERVED_FL
- EXT2_RESERVE_WINDOW_NOT_ALLOCATED
- EXT2_ROOT_INO
- EXT2_SB
- EXT2_SB_BLOCKS_OFFSET
- EXT2_SB_BSIZE_OFFSET
- EXT2_SB_MAGIC_OFFSET
- EXT2_SECRM_FL
- EXT2_SET_COMPAT_FEATURE
- EXT2_SET_INCOMPAT_FEATURE
- EXT2_SET_RO_COMPAT_FEATURE
- EXT2_STATE_NEW
- EXT2_SUPER_MAGIC
- EXT2_SYNC_FL
- EXT2_TIND_BLOCK
- EXT2_TOPDIR_FL
- EXT2_UNDEL_DIR_INO
- EXT2_UNRM_FL
- EXT2_VALID_FS
- EXT2_XATTR_INDEX_LUSTRE
- EXT2_XATTR_INDEX_POSIX_ACL_ACCESS
- EXT2_XATTR_INDEX_POSIX_ACL_DEFAULT
- EXT2_XATTR_INDEX_SECURITY
- EXT2_XATTR_INDEX_TRUSTED
- EXT2_XATTR_INDEX_USER
- EXT2_XATTR_LEN
- EXT2_XATTR_MAGIC
- EXT2_XATTR_NEXT
- EXT2_XATTR_PAD
- EXT2_XATTR_PAD_BITS
- EXT2_XATTR_REFCOUNT_MAX
- EXT2_XATTR_ROUND
- EXT2_XATTR_SIZE
- EXT3
- EXT3_DEFM_JMODE
- EXT3_DEFM_JMODE_DATA
- EXT3_DEFM_JMODE_ORDERED
- EXT3_DEFM_JMODE_WBACK
- EXT3_FEATURE_COMPAT_HAS_JOURNAL
- EXT3_FEATURE_COMPAT_SUPP
- EXT3_FEATURE_INCOMPAT_JOURNAL_DEV
- EXT3_FEATURE_INCOMPAT_RECOVER
- EXT3_FEATURE_INCOMPAT_SUPP
- EXT3_FEATURE_RO_COMPAT_SUPP
- EXT3_SUPER_MAGIC
- EXT4
- EXT4FS_DEBUG
- EXT4_ACL_VERSION
- EXT4_ADDR_PER_BLOCK
- EXT4_ADDR_PER_BLOCK_BITS
- EXT4_APPEND_FL
- EXT4_ATTR
- EXT4_ATTR_FEATURE
- EXT4_ATTR_FUNC
- EXT4_ATTR_OFFSET
- EXT4_ATTR_PTR
- EXT4_B2C
- EXT4_BAD_INO
- EXT4_BG_BLOCK_BITMAP_CSUM_HI_END
- EXT4_BG_BLOCK_UNINIT
- EXT4_BG_INODE_BITMAP_CSUM_HI_END
- EXT4_BG_INODE_UNINIT
- EXT4_BG_INODE_ZEROED
- EXT4_BLOCKS_PER_GROUP
- EXT4_BLOCK_ALIGN
- EXT4_BLOCK_SIZE
- EXT4_BLOCK_SIZE_BITS
- EXT4_BOOT_LOADER_INO
- EXT4_C2B
- EXT4_CASEFOLD_FL
- EXT4_CLUSTERS_PER_GROUP
- EXT4_CLUSTER_BITS
- EXT4_CLUSTER_SIZE
- EXT4_COMPRBLK_FL
- EXT4_COMPR_FL
- EXT4_CONTENTION_THRESHOLD
- EXT4_CRC32C_CHKSUM
- EXT4_CURRENT_REV
- EXT4_DATA_TRANS_BLOCKS
- EXT4_DEFM_ACL
- EXT4_DEFM_BLOCK_VALIDITY
- EXT4_DEFM_BSDGROUPS
- EXT4_DEFM_DEBUG
- EXT4_DEFM_DISCARD
- EXT4_DEFM_JMODE
- EXT4_DEFM_JMODE_DATA
- EXT4_DEFM_JMODE_ORDERED
- EXT4_DEFM_JMODE_WBACK
- EXT4_DEFM_NOBARRIER
- EXT4_DEFM_NODELALLOC
- EXT4_DEFM_UID16
- EXT4_DEFM_XATTR_USER
- EXT4_DEF_INODE_READAHEAD_BLKS
- EXT4_DEF_LI_MAX_START_DELAY
- EXT4_DEF_LI_WAIT_MULT
- EXT4_DEF_MAX_BATCH_TIME
- EXT4_DEF_MIN_BATCH_TIME
- EXT4_DEF_PROJID
- EXT4_DEF_RESGID
- EXT4_DEF_RESUID
- EXT4_DESC_PER_BLOCK
- EXT4_DESC_PER_BLOCK_BITS
- EXT4_DESC_SIZE
- EXT4_DFL_CHECKINTERVAL
- EXT4_DFL_MAX_MNT_COUNT
- EXT4_DIND_BLOCK
- EXT4_DIRENT_TAIL
- EXT4_DIRSYNC_FL
- EXT4_DIRTY_FL
- EXT4_DIR_LINK_EMPTY
- EXT4_DIR_LINK_MAX
- EXT4_DIR_PAD
- EXT4_DIR_REC_LEN
- EXT4_DIR_ROUND
- EXT4_DYNAMIC_REV
- EXT4_EA_INODE_FL
- EXT4_EINODE_GET_XTIME
- EXT4_EINODE_SET_XTIME
- EXT4_ENCRYPT_FL
- EXT4_ENC_STRICT_MODE_FL
- EXT4_ENC_UTF8_12_1
- EXT4_EOFBLOCKS_FL
- EXT4_EPOCH_BITS
- EXT4_EPOCH_MASK
- EXT4_ERRORS_CONTINUE
- EXT4_ERRORS_DEFAULT
- EXT4_ERRORS_PANIC
- EXT4_ERRORS_RO
- EXT4_ERROR_FILE
- EXT4_ERROR_FS
- EXT4_ERROR_INODE
- EXT4_ERROR_INODE_BLOCK
- EXT4_EXTENTS_FL
- EXT4_EXTENT_TAIL_OFFSET
- EXT4_EXTRA_TIMESTAMP_MAX
- EXT4_EXT_DATA_VALID1
- EXT4_EXT_DATA_VALID2
- EXT4_EXT_MAGIC
- EXT4_EXT_MARK_UNWRIT1
- EXT4_EXT_MARK_UNWRIT2
- EXT4_EXT_MAY_ZEROOUT
- EXT4_EX_FORCE_CACHE
- EXT4_EX_NOCACHE
- EXT4_FEATURE_COMPAT_DIR_INDEX
- EXT4_FEATURE_COMPAT_DIR_PREALLOC
- EXT4_FEATURE_COMPAT_EXT_ATTR
- EXT4_FEATURE_COMPAT_FUNCS
- EXT4_FEATURE_COMPAT_HAS_JOURNAL
- EXT4_FEATURE_COMPAT_IMAGIC_INODES
- EXT4_FEATURE_COMPAT_RESIZE_INODE
- EXT4_FEATURE_COMPAT_SPARSE_SUPER2
- EXT4_FEATURE_COMPAT_SUPP
- EXT4_FEATURE_INCOMPAT_64BIT
- EXT4_FEATURE_INCOMPAT_CASEFOLD
- EXT4_FEATURE_INCOMPAT_COMPRESSION
- EXT4_FEATURE_INCOMPAT_CSUM_SEED
- EXT4_FEATURE_INCOMPAT_DIRDATA
- EXT4_FEATURE_INCOMPAT_EA_INODE
- EXT4_FEATURE_INCOMPAT_ENCRYPT
- EXT4_FEATURE_INCOMPAT_EXTENTS
- EXT4_FEATURE_INCOMPAT_FILETYPE
- EXT4_FEATURE_INCOMPAT_FLEX_BG
- EXT4_FEATURE_INCOMPAT_FUNCS
- EXT4_FEATURE_INCOMPAT_INLINE_DATA
- EXT4_FEATURE_INCOMPAT_JOURNAL_DEV
- EXT4_FEATURE_INCOMPAT_LARGEDIR
- EXT4_FEATURE_INCOMPAT_META_BG
- EXT4_FEATURE_INCOMPAT_MMP
- EXT4_FEATURE_INCOMPAT_RECOVER
- EXT4_FEATURE_INCOMPAT_SUPP
- EXT4_FEATURE_RO_COMPAT_BIGALLOC
- EXT4_FEATURE_RO_COMPAT_BTREE_DIR
- EXT4_FEATURE_RO_COMPAT_DIR_NLINK
- EXT4_FEATURE_RO_COMPAT_EXTRA_ISIZE
- EXT4_FEATURE_RO_COMPAT_FUNCS
- EXT4_FEATURE_RO_COMPAT_GDT_CSUM
- EXT4_FEATURE_RO_COMPAT_HUGE_FILE
- EXT4_FEATURE_RO_COMPAT_LARGE_FILE
- EXT4_FEATURE_RO_COMPAT_METADATA_CSUM
- EXT4_FEATURE_RO_COMPAT_PROJECT
- EXT4_FEATURE_RO_COMPAT_QUOTA
- EXT4_FEATURE_RO_COMPAT_READONLY
- EXT4_FEATURE_RO_COMPAT_SPARSE_SUPER
- EXT4_FEATURE_RO_COMPAT_SUPP
- EXT4_FEATURE_RO_COMPAT_VERITY
- EXT4_FIEMAP_EXTENT_HOLE
- EXT4_FIRST_INO
- EXT4_FITS_IN_INODE
- EXT4_FLAGS_RESIZING
- EXT4_FLAGS_SHUTDOWN
- EXT4_FLEX_SIZE_DIR_ALLOC_SCHEME
- EXT4_FL_INHERITED
- EXT4_FL_SHOULD_SWAP
- EXT4_FL_USER_MODIFIABLE
- EXT4_FL_USER_VISIBLE
- EXT4_FL_XFLAG_VISIBLE
- EXT4_FMR_OWN_BLKBM
- EXT4_FMR_OWN_FREE
- EXT4_FMR_OWN_FS
- EXT4_FMR_OWN_GDT
- EXT4_FMR_OWN_INOBM
- EXT4_FMR_OWN_INODES
- EXT4_FMR_OWN_LOG
- EXT4_FMR_OWN_RESV_GDT
- EXT4_FMR_OWN_UNKNOWN
- EXT4_FREECLUSTERS_WATERMARK
- EXT4_FREE_BLOCKS_FORGET
- EXT4_FREE_BLOCKS_METADATA
- EXT4_FREE_BLOCKS_NOFREE_FIRST_CLUSTER
- EXT4_FREE_BLOCKS_NOFREE_LAST_CLUSTER
- EXT4_FREE_BLOCKS_NO_QUOT_UPDATE
- EXT4_FREE_BLOCKS_RERESERVE_CLUSTER
- EXT4_FREE_BLOCKS_VALIDATED
- EXT4_FT_BLKDEV
- EXT4_FT_CHRDEV
- EXT4_FT_DIR
- EXT4_FT_DIR_CSUM
- EXT4_FT_FIFO
- EXT4_FT_MAX
- EXT4_FT_REG_FILE
- EXT4_FT_SOCK
- EXT4_FT_SYMLINK
- EXT4_FT_UNKNOWN
- EXT4_GETFSMAP_DEVS
- EXT4_GET_BLOCKS_CONVERT
- EXT4_GET_BLOCKS_CONVERT_UNWRITTEN
- EXT4_GET_BLOCKS_CREATE
- EXT4_GET_BLOCKS_CREATE_UNWRIT_EXT
- EXT4_GET_BLOCKS_CREATE_ZERO
- EXT4_GET_BLOCKS_DELALLOC_RESERVE
- EXT4_GET_BLOCKS_IO_CONVERT_EXT
- EXT4_GET_BLOCKS_IO_CREATE_EXT
- EXT4_GET_BLOCKS_IO_SUBMIT
- EXT4_GET_BLOCKS_KEEP_SIZE
- EXT4_GET_BLOCKS_METADATA_NOFAIL
- EXT4_GET_BLOCKS_NO_NORMALIZE
- EXT4_GET_BLOCKS_PRE_IO
- EXT4_GET_BLOCKS_UNWRIT_EXT
- EXT4_GET_BLOCKS_ZERO
- EXT4_GOING_FLAGS_DEFAULT
- EXT4_GOING_FLAGS_LOGFLUSH
- EXT4_GOING_FLAGS_NOLOGFLUSH
- EXT4_GOOD_OLD_FIRST_INO
- EXT4_GOOD_OLD_INODE_SIZE
- EXT4_GOOD_OLD_REV
- EXT4_GROUP_INFO_BBITMAP_CORRUPT
- EXT4_GROUP_INFO_BBITMAP_CORRUPT_BIT
- EXT4_GROUP_INFO_IBITMAP_CORRUPT
- EXT4_GROUP_INFO_IBITMAP_CORRUPT_BIT
- EXT4_GROUP_INFO_NEED_INIT_BIT
- EXT4_GROUP_INFO_WAS_TRIMMED_BIT
- EXT4_GRP_QUOTA_INO
- EXT4_HTREE_EOF_32BIT
- EXT4_HTREE_EOF_64BIT
- EXT4_HTREE_LEVEL
- EXT4_HTREE_LEVEL_COMPAT
- EXT4_HT_DIR
- EXT4_HT_EXT_CONVERT
- EXT4_HT_INODE
- EXT4_HT_MAP_BLOCKS
- EXT4_HT_MAX
- EXT4_HT_MIGRATE
- EXT4_HT_MISC
- EXT4_HT_MOVE_EXTENTS
- EXT4_HT_QUOTA
- EXT4_HT_RESIZE
- EXT4_HT_TRUNCATE
- EXT4_HT_WRITE_PAGE
- EXT4_HT_XATTR
- EXT4_HUGE_FILE_FL
- EXT4_I
- EXT4_IGET_HANDLE
- EXT4_IGET_NORMAL
- EXT4_IGET_SPECIAL
- EXT4_IMAGIC_FL
- EXT4_IMMUTABLE_FL
- EXT4_INDEX_EXTRA_TRANS_BLOCKS
- EXT4_INDEX_FL
- EXT4_IND_BLOCK
- EXT4_INLINE_DATA_FL
- EXT4_INLINE_DOTDOT_OFFSET
- EXT4_INLINE_DOTDOT_SIZE
- EXT4_INODES_PER_GROUP
- EXT4_INODE_APPEND
- EXT4_INODE_BIT_FNS
- EXT4_INODE_COMPR
- EXT4_INODE_COMPRBLK
- EXT4_INODE_DIRSYNC
- EXT4_INODE_DIRTY
- EXT4_INODE_EA_INODE
- EXT4_INODE_ENCRYPT
- EXT4_INODE_EOFBLOCKS
- EXT4_INODE_EXTENTS
- EXT4_INODE_GET_XTIME
- EXT4_INODE_HUGE_FILE
- EXT4_INODE_IMAGIC
- EXT4_INODE_IMMUTABLE
- EXT4_INODE_INDEX
- EXT4_INODE_INLINE_DATA
- EXT4_INODE_JOURNAL_DATA
- EXT4_INODE_JOURNAL_DATA_MODE
- EXT4_INODE_NOATIME
- EXT4_INODE_NOCOMPR
- EXT4_INODE_NODUMP
- EXT4_INODE_NOTAIL
- EXT4_INODE_ORDERED_DATA_MODE
- EXT4_INODE_PROJINHERIT
- EXT4_INODE_RESERVED
- EXT4_INODE_SECRM
- EXT4_INODE_SET_XTIME
- EXT4_INODE_SIZE
- EXT4_INODE_SYNC
- EXT4_INODE_TOPDIR
- EXT4_INODE_UNRM
- EXT4_INODE_VERITY
- EXT4_INODE_WRITEBACK_DATA_MODE
- EXT4_IOC32_GETFLAGS
- EXT4_IOC32_GETRSVSZ
- EXT4_IOC32_GETVERSION
- EXT4_IOC32_GETVERSION_OLD
- EXT4_IOC32_GROUP_ADD
- EXT4_IOC32_GROUP_EXTEND
- EXT4_IOC32_SETFLAGS
- EXT4_IOC32_SETRSVSZ
- EXT4_IOC32_SETVERSION
- EXT4_IOC32_SETVERSION_OLD
- EXT4_IOC_ALLOC_DA_BLKS
- EXT4_IOC_CLEAR_ES_CACHE
- EXT4_IOC_FSGETXATTR
- EXT4_IOC_FSSETXATTR
- EXT4_IOC_GETFLAGS
- EXT4_IOC_GETRSVSZ
- EXT4_IOC_GETSTATE
- EXT4_IOC_GETVERSION
- EXT4_IOC_GETVERSION_OLD
- EXT4_IOC_GET_ENCRYPTION_POLICY
- EXT4_IOC_GET_ENCRYPTION_PWSALT
- EXT4_IOC_GET_ES_CACHE
- EXT4_IOC_GROUP_ADD
- EXT4_IOC_GROUP_EXTEND
- EXT4_IOC_MIGRATE
- EXT4_IOC_MOVE_EXT
- EXT4_IOC_PRECACHE_EXTENTS
- EXT4_IOC_RESIZE_FS
- EXT4_IOC_SETFLAGS
- EXT4_IOC_SETRSVSZ
- EXT4_IOC_SETVERSION
- EXT4_IOC_SETVERSION_OLD
- EXT4_IOC_SET_ENCRYPTION_POLICY
- EXT4_IOC_SHUTDOWN
- EXT4_IOC_SWAP_BOOT
- EXT4_IO_END_UNWRITTEN
- EXT4_JOURNAL
- EXT4_JOURNAL_DATA_FL
- EXT4_JOURNAL_INO
- EXT4_LAZYINIT_QUIT
- EXT4_LAZYINIT_RUNNING
- EXT4_LBLK_CFILL
- EXT4_LBLK_CMASK
- EXT4_LBLK_COFF
- EXT4_LINK_MAX
- EXT4_MAP_BOUNDARY
- EXT4_MAP_FLAGS
- EXT4_MAP_MAPPED
- EXT4_MAP_NEW
- EXT4_MAP_UNWRITTEN
- EXT4_MAXQUOTAS
- EXT4_MAXQUOTAS_DEL_BLOCKS
- EXT4_MAXQUOTAS_INIT_BLOCKS
- EXT4_MAXQUOTAS_TRANS_BLOCKS
- EXT4_MAX_BLOCKS
- EXT4_MAX_BLOCK_FILE_PHYS
- EXT4_MAX_BLOCK_LOG_SIZE
- EXT4_MAX_BLOCK_SIZE
- EXT4_MAX_CLUSTER_LOG_SIZE
- EXT4_MAX_CONTENTION
- EXT4_MAX_DESC_SIZE
- EXT4_MAX_EXTENT_DEPTH
- EXT4_MAX_LOGICAL_BLOCK
- EXT4_MAX_REC_LEN
- EXT4_MAX_SUPP_REV
- EXT4_MAX_TRANS_DATA
- EXT4_MB_DELALLOC_RESERVED
- EXT4_MB_GRP_BBITMAP_CORRUPT
- EXT4_MB_GRP_CLEAR_TRIMMED
- EXT4_MB_GRP_IBITMAP_CORRUPT
- EXT4_MB_GRP_NEED_INIT
- EXT4_MB_GRP_SET_TRIMMED
- EXT4_MB_GRP_WAS_TRIMMED
- EXT4_MB_HINT_BEST
- EXT4_MB_HINT_DATA
- EXT4_MB_HINT_FIRST
- EXT4_MB_HINT_GOAL_ONLY
- EXT4_MB_HINT_GROUP_ALLOC
- EXT4_MB_HINT_MERGE
- EXT4_MB_HINT_METADATA
- EXT4_MB_HINT_NOPREALLOC
- EXT4_MB_HINT_RESERVED
- EXT4_MB_HINT_TRY_GOAL
- EXT4_MB_HISTORY_ALLOC
- EXT4_MB_HISTORY_PREALLOC
- EXT4_MB_STREAM_ALLOC
- EXT4_MB_USE_RESERVED
- EXT4_MB_USE_ROOT_BLOCKS
- EXT4_META_TRANS_BLOCKS
- EXT4_MF_FS_ABORTED
- EXT4_MF_MNTDIR_SAMPLED
- EXT4_MF_TEST_DUMMY_ENCRYPTION
- EXT4_MIN_BLOCK_LOG_SIZE
- EXT4_MIN_BLOCK_SIZE
- EXT4_MIN_DESC_SIZE
- EXT4_MIN_DESC_SIZE_64BIT
- EXT4_MIN_INLINE_DATA_SIZE
- EXT4_MMP_CHECK_MULT
- EXT4_MMP_MAGIC
- EXT4_MMP_MAX_CHECK_INTERVAL
- EXT4_MMP_MIN_CHECK_INTERVAL
- EXT4_MMP_SEQ_CLEAN
- EXT4_MMP_SEQ_FSCK
- EXT4_MMP_SEQ_MAX
- EXT4_MOUNT2_EXPLICIT_DELALLOC
- EXT4_MOUNT2_EXPLICIT_JOURNAL_CHECKSUM
- EXT4_MOUNT2_HURD_COMPAT
- EXT4_MOUNT2_STD_GROUP_SIZE
- EXT4_MOUNT_BARRIER
- EXT4_MOUNT_BLOCK_VALIDITY
- EXT4_MOUNT_DATA_ERR_ABORT
- EXT4_MOUNT_DATA_FLAGS
- EXT4_MOUNT_DAX
- EXT4_MOUNT_DEBUG
- EXT4_MOUNT_DELALLOC
- EXT4_MOUNT_DIOREAD_NOLOCK
- EXT4_MOUNT_DISCARD
- EXT4_MOUNT_ERRORS_CONT
- EXT4_MOUNT_ERRORS_MASK
- EXT4_MOUNT_ERRORS_PANIC
- EXT4_MOUNT_ERRORS_RO
- EXT4_MOUNT_GRPID
- EXT4_MOUNT_GRPQUOTA
- EXT4_MOUNT_INIT_INODE_TABLE
- EXT4_MOUNT_JOURNAL_ASYNC_COMMIT
- EXT4_MOUNT_JOURNAL_CHECKSUM
- EXT4_MOUNT_JOURNAL_DATA
- EXT4_MOUNT_MINIX_DF
- EXT4_MOUNT_NOLOAD
- EXT4_MOUNT_NO_AUTO_DA_ALLOC
- EXT4_MOUNT_NO_MBCACHE
- EXT4_MOUNT_NO_UID32
- EXT4_MOUNT_ORDERED_DATA
- EXT4_MOUNT_POSIX_ACL
- EXT4_MOUNT_PRJQUOTA
- EXT4_MOUNT_QUOTA
- EXT4_MOUNT_UPDATE_JOURNAL
- EXT4_MOUNT_USRQUOTA
- EXT4_MOUNT_WARN_ON_ERROR
- EXT4_MOUNT_WRITEBACK_DATA
- EXT4_MOUNT_XATTR_USER
- EXT4_NAME_LEN
- EXT4_NDIR_BLOCKS
- EXT4_NOATIME_FL
- EXT4_NOCOMPR_FL
- EXT4_NODUMP_FL
- EXT4_NOJOURNAL_MAX_REF_COUNT
- EXT4_NON_EXTRA_TIMESTAMP_MAX
- EXT4_NOTAIL_FL
- EXT4_NSEC_MASK
- EXT4_NUM_B2C
- EXT4_N_BLOCKS
- EXT4_ORPHAN_FS
- EXT4_OS_FREEBSD
- EXT4_OS_HURD
- EXT4_OS_LINUX
- EXT4_OS_LITES
- EXT4_OS_MASIX
- EXT4_OTHER_FLMASK
- EXT4_PBLK_CMASK
- EXT4_PBLK_COFF
- EXT4_PROJINHERIT_FL
- EXT4_QUERY_RANGE_ABORT
- EXT4_QUERY_RANGE_CONTINUE
- EXT4_QUOTA_DEL_BLOCKS
- EXT4_QUOTA_INIT_BLOCKS
- EXT4_QUOTA_TRANS_BLOCKS
- EXT4_REG_FLMASK
- EXT4_RESERVED_FL
- EXT4_RESERVE_TRANS_BLOCKS
- EXT4_RESIZE_INO
- EXT4_ROOT_INO
- EXT4_RO_ATTR_ES_UI
- EXT4_RW_ATTR_SBI_UI
- EXT4_SB
- EXT4_SECRM_FL
- EXT4_SINGLEDATA_TRANS_BLOCKS
- EXT4_STATE_DA_ALLOC_CLOSE
- EXT4_STATE_DIO_UNWRITTEN
- EXT4_STATE_EXT_MIGRATE
- EXT4_STATE_EXT_PRECACHED
- EXT4_STATE_FLAG_DA_ALLOC_CLOSE
- EXT4_STATE_FLAG_EXT_PRECACHED
- EXT4_STATE_FLAG_NEW
- EXT4_STATE_FLAG_NEWENTRY
- EXT4_STATE_JDATA
- EXT4_STATE_LUSTRE_EA_INODE
- EXT4_STATE_MAY_INLINE_DATA
- EXT4_STATE_NEW
- EXT4_STATE_NEWENTRY
- EXT4_STATE_NO_EXPAND
- EXT4_STATE_VERITY_IN_PROGRESS
- EXT4_STATE_XATTR
- EXT4_SUPER_MAGIC
- EXT4_SUPPORTED_FS_XFLAGS
- EXT4_SYNC_FL
- EXT4_S_ERR_END
- EXT4_S_ERR_LEN
- EXT4_S_ERR_START
- EXT4_TIMESTAMP_MIN
- EXT4_TIND_BLOCK
- EXT4_TOPDIR_FL
- EXT4_UNDEL_DIR_INO
- EXT4_UNRM_FL
- EXT4_USR_QUOTA_INO
- EXT4_VALID_FS
- EXT4_VERITY_FL
- EXT4_WQ_HASH_SZ
- EXT4_XATTR_BLOCK_RESERVE
- EXT4_XATTR_INDEX_ENCRYPTION
- EXT4_XATTR_INDEX_HURD
- EXT4_XATTR_INDEX_LUSTRE
- EXT4_XATTR_INDEX_POSIX_ACL_ACCESS
- EXT4_XATTR_INDEX_POSIX_ACL_DEFAULT
- EXT4_XATTR_INDEX_RICHACL
- EXT4_XATTR_INDEX_SECURITY
- EXT4_XATTR_INDEX_SYSTEM
- EXT4_XATTR_INDEX_TRUSTED
- EXT4_XATTR_INDEX_USER
- EXT4_XATTR_INODE_GET_PARENT
- EXT4_XATTR_LEN
- EXT4_XATTR_MAGIC
- EXT4_XATTR_MIN_LARGE_EA_SIZE
- EXT4_XATTR_NAME_ENCRYPTION_CONTEXT
- EXT4_XATTR_NEXT
- EXT4_XATTR_PAD
- EXT4_XATTR_PAD_BITS
- EXT4_XATTR_REFCOUNT_MAX
- EXT4_XATTR_ROUND
- EXT4_XATTR_SIZE
- EXT4_XATTR_SIZE_MAX
- EXT4_XATTR_SYSTEM_DATA
- EXT4_XATTR_TRANS_BLOCKS
- EXT4_ZERO_XATTR_VALUE
- EXT5
- EXT6
- EXT68HIGH
- EXT7
- EXTA
- EXTABLE_TO_NON_TEXT
- EXTAD
- EXTAL2OUT_MARK
- EXTASR
- EXTATTR_ALT_PERMS
- EXTATTR_APP_USE
- EXTATTR_CHAR_SET
- EXTATTR_DEV_SPEC
- EXTATTR_FILE_TIMES
- EXTATTR_IMP_USE
- EXTATTR_INFO_TIMES
- EXTB
- EXTBUSCTRL
- EXTCHNL_OFFSET
- EXTCHNL_OFFSET_LOWER
- EXTCHNL_OFFSET_NO_DEF
- EXTCHNL_OFFSET_NO_EXT
- EXTCHNL_OFFSET_UPPER
- EXTCLK
- EXTCLKGATE
- EXTCODE_BOUNDED_ADD
- EXTCODE_COMPARE_SWAP
- EXTCODE_FETCH_ADD
- EXTCODE_LITTLE_ADD
- EXTCODE_MASK_SWAP
- EXTCODE_VENDOR_DEPENDENT
- EXTCODE_WRAP_ADD
- EXTCON_CHG_USB_ACA
- EXTCON_CHG_USB_CDP
- EXTCON_CHG_USB_DCP
- EXTCON_CHG_USB_FAST
- EXTCON_CHG_USB_PD
- EXTCON_CHG_USB_SDP
- EXTCON_CHG_USB_SLOW
- EXTCON_CHG_WPT
- EXTCON_DISP_DP
- EXTCON_DISP_DVI
- EXTCON_DISP_HDMI
- EXTCON_DISP_HMD
- EXTCON_DISP_MHL
- EXTCON_DISP_VGA
- EXTCON_DOCK
- EXTCON_IRQ_END
- EXTCON_JACK_HEADPHONE
- EXTCON_JACK_LINE_IN
- EXTCON_JACK_LINE_OUT
- EXTCON_JACK_MICROPHONE
- EXTCON_JACK_SPDIF_IN
- EXTCON_JACK_SPDIF_OUT
- EXTCON_JACK_VIDEO_IN
- EXTCON_JACK_VIDEO_OUT
- EXTCON_JIG
- EXTCON_MECHANICAL
- EXTCON_NONE
- EXTCON_NUM
- EXTCON_PROP_CHG_CNT
- EXTCON_PROP_CHG_MAX
- EXTCON_PROP_CHG_MIN
- EXTCON_PROP_DISP_CNT
- EXTCON_PROP_DISP_HPD
- EXTCON_PROP_DISP_MAX
- EXTCON_PROP_DISP_MIN
- EXTCON_PROP_JACK_CNT
- EXTCON_PROP_JACK_MAX
- EXTCON_PROP_JACK_MIN
- EXTCON_PROP_USB_CNT
- EXTCON_PROP_USB_MAX
- EXTCON_PROP_USB_MIN
- EXTCON_PROP_USB_SS
- EXTCON_PROP_USB_TYPEC_POLARITY
- EXTCON_PROP_USB_VBUS
- EXTCON_TYPE_CHG
- EXTCON_TYPE_DISP
- EXTCON_TYPE_JACK
- EXTCON_TYPE_MISC
- EXTCON_TYPE_USB
- EXTCON_USB
- EXTCON_USB_HOST
- EXTCP
- EXTEN
- EXTEND
- EXTEND4
- EXTEND8
- EXTENDED
- EXTENDED_ACE_COLORIMETRY_MASK
- EXTENDED_ATTR_CNTL
- EXTENDED_BB_CREDITS
- EXTENDED_CAPABILITY
- EXTENDED_CLR
- EXTENDED_CMD_TYPE
- EXTENDED_COLORIMETRY_MASK
- EXTENDED_COPY
- EXTENDED_CRTC_CNTL
- EXTENDED_DIR_EXISTS
- EXTENDED_DISABLE
- EXTENDED_ENABLE
- EXTENDED_EXTENDED_IDENTIFY
- EXTENDED_Ebias
- EXTENDED_Emin
- EXTENDED_FULL_MASK
- EXTENDED_GPIO1_REG
- EXTENDED_GPIO2_REG
- EXTENDED_GPIO_REG
- EXTENDED_HASH_TABLE_SIZE
- EXTENDED_ID_NAND
- EXTENDED_INT
- EXTENDED_INT_MASK
- EXTENDED_INT_TIMER
- EXTENDED_MAX_HEIGHT
- EXTENDED_MESSAGE
- EXTENDED_MODE
- EXTENDED_MODIFY_BIDI_DATA_PTR
- EXTENDED_MODIFY_DATA_POINTER
- EXTENDED_NSOFFLOAD_SLOT
- EXTENDED_OFFSET_GPIO
- EXTENDED_PALETTE
- EXTENDED_PAR
- EXTENDED_PPR
- EXTENDED_REG_CLR
- EXTENDED_REG_DISABLE
- EXTENDED_REG_ENABLE
- EXTENDED_REG_SET
- EXTENDED_SAP
- EXTENDED_SAR
- EXTENDED_SCAN
- EXTENDED_SDTR
- EXTENDED_SDTR_LEN
- EXTENDED_SENSE_START
- EXTENDED_SET
- EXTENDED_TRANSLATION
- EXTENDED_VGA
- EXTENDED_WDTR
- EXTEND_CMD_TOV
- EXTEND_DMA1_ASYNC_SIGNAL
- EXTEND_HDEC
- EXTEND_TOGGLE_CHK
- EXTEND_WITH_PROM
- EXTENEDED_DECODE_STATUS
- EXTENSION_UNIT
- EXTENTS_BTREE_MUTEX
- EXTENTS_STATS__
- EXTENT_ALLOC_SYSTEM_INODE
- EXTENT_BIO_COMPRESSED
- EXTENT_BIO_FLAG_SHIFT
- EXTENT_BOUNDARY
- EXTENT_BUFFER_CORRUPT
- EXTENT_BUFFER_DIRTY
- EXTENT_BUFFER_IN_TREE
- EXTENT_BUFFER_READAHEAD
- EXTENT_BUFFER_READ_ERR
- EXTENT_BUFFER_STALE
- EXTENT_BUFFER_TREE_REF
- EXTENT_BUFFER_UNMAPPED
- EXTENT_BUFFER_UPTODATE
- EXTENT_BUFFER_WRITEBACK
- EXTENT_BUFFER_WRITE_ERR
- EXTENT_CACHE
- EXTENT_CACHE_SHRINK_NUMBER
- EXTENT_CLEAR_DATA_RESV
- EXTENT_CLEAR_META_RESV
- EXTENT_COMMITTING
- EXTENT_CTLBITS
- EXTENT_DAMAGED
- EXTENT_DEFRAG
- EXTENT_DELALLOC
- EXTENT_DELALLOC_NEW
- EXTENT_DIRTY
- EXTENT_DO_ACCOUNTING
- EXTENT_FLAGS
- EXTENT_FLAG_COMPRESSED
- EXTENT_FLAG_FILLING
- EXTENT_FLAG_FS_MAPPING
- EXTENT_FLAG_LOGGING
- EXTENT_FLAG_PINNED
- EXTENT_FLAG_PREALLOC
- EXTENT_LOCKED
- EXTENT_MAP_DELALLOC
- EXTENT_MAP_HOLE
- EXTENT_MAP_INLINE
- EXTENT_MAP_LAST_BYTE
- EXTENT_MERGE_SIZE
- EXTENT_NEED_WAIT
- EXTENT_NEW
- EXTENT_NODATASUM
- EXTENT_NORESERVE
- EXTENT_ORDER
- EXTENT_PAGE_PRIVATE
- EXTENT_QGROUP_RESERVED
- EXTENT_SIZE_PER_ITEM
- EXTENT_STATUS_DELAYED
- EXTENT_STATUS_HOLE
- EXTENT_STATUS_REFERENCED
- EXTENT_STATUS_UNWRITTEN
- EXTENT_STATUS_WRITTEN
- EXTENT_UPTODATE
- EXTENT_WRITTEN
- EXTERANL_ENCODER_ACTION_V3_DISABLE_OUTPUT
- EXTERANL_ENCODER_ACTION_V3_ENABLE_OUTPUT
- EXTERN
- EXTERNAL_AV
- EXTERNAL_CHARGER_DISABLE_REG_VAL
- EXTERNAL_CHARGER_ENABLE_REG_VAL
- EXTERNAL_DEVICE_REQ_TIMEOUT
- EXTERNAL_DRIVE
- EXTERNAL_ENCODER_ACTION_V3_DACLOAD_DETECTION
- EXTERNAL_ENCODER_ACTION_V3_DDC_SETUP
- EXTERNAL_ENCODER_ACTION_V3_DISABLE_OUTPUT
- EXTERNAL_ENCODER_ACTION_V3_ENABLE_OUTPUT
- EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING
- EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING_OFF
- EXTERNAL_ENCODER_ACTION_V3_ENCODER_INIT
- EXTERNAL_ENCODER_ACTION_V3_ENCODER_SETUP
- EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_1_62GHZ
- EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ
- EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_3_24GHZ
- EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_5_40GHZ
- EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_MASK
- EXTERNAL_ENCODER_CONFIG_V3_ENCODER1
- EXTERNAL_ENCODER_CONFIG_V3_ENCODER2
- EXTERNAL_ENCODER_CONFIG_V3_ENCODER3
- EXTERNAL_ENCODER_CONFIG_V3_ENCODER_SEL_MAKS
- EXTERNAL_ENCODER_CONFIG_V3_ENCODER_SEL_MASK
- EXTERNAL_ENCODER_CONTROL_BLANK
- EXTERNAL_ENCODER_CONTROL_DISABLE
- EXTERNAL_ENCODER_CONTROL_ENABLE
- EXTERNAL_ENCODER_CONTROL_INIT
- EXTERNAL_ENCODER_CONTROL_PARAMETER
- EXTERNAL_ENCODER_CONTROL_PARAMETERS_V3
- EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION
- EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION_V3
- EXTERNAL_ENCODER_CONTROL_SETUP
- EXTERNAL_ENCODER_CONTROL_UNBLANK
- EXTERNAL_LOOPBACK
- EXTERNAL_LOOP_BACK
- EXTERNAL_MODE
- EXTERNAL_PORT
- EXTERNAL_QD
- EXTERNAL_REQUESTOR
- EXTERNAL_REQUESTOR_TPS65917
- EXTERNAL_SYNC
- EXTERN_DVS_USED
- EXTGVBBRF
- EXTIBMV
- EXTIGY_FIRMWARE_SIZE_NEW
- EXTIGY_FIRMWARE_SIZE_OLD
- EXTIN
- EXTIN_AC97_L
- EXTIN_AC97_R
- EXTIN_COAX_SPDIF_L
- EXTIN_COAX_SPDIF_R
- EXTIN_LINE1_L
- EXTIN_LINE1_R
- EXTIN_LINE2_L
- EXTIN_LINE2_R
- EXTIN_SPDIF_CD_L
- EXTIN_SPDIF_CD_R
- EXTIN_TOSLINK_L
- EXTIN_TOSLINK_R
- EXTIN_ZOOM_L
- EXTIN_ZOOM_R
- EXTIO_EISA_BUSERR
- EXTIO_GIO_33MHZ
- EXTIO_HPC3_BUSERR
- EXTIO_MC_BUSERR
- EXTIO_S0_IRQ_1
- EXTIO_S0_IRQ_2
- EXTIO_S0_IRQ_3
- EXTIO_S0_RETRACE
- EXTIO_S0_STAT_0
- EXTIO_S0_STAT_1
- EXTIO_SG_IRQ_1
- EXTIO_SG_IRQ_2
- EXTIO_SG_IRQ_3
- EXTIO_SG_RETRACE
- EXTIO_SG_STAT_0
- EXTIO_SG_STAT_1
- EXTIRQ_CFG_BOTHEDGE
- EXTIRQ_CFG_BOTHEDGE_6348
- EXTIRQ_CFG_CLEAR
- EXTIRQ_CFG_CLEAR_6348
- EXTIRQ_CFG_CLEAR_ALL
- EXTIRQ_CFG_CLEAR_ALL_6348
- EXTIRQ_CFG_LEVELSENSE
- EXTIRQ_CFG_LEVELSENSE_6348
- EXTIRQ_CFG_MASK
- EXTIRQ_CFG_MASK_6348
- EXTIRQ_CFG_MASK_ALL
- EXTIRQ_CFG_MASK_ALL_6348
- EXTIRQ_CFG_SENSE
- EXTIRQ_CFG_SENSE_6348
- EXTIRQ_CFG_STAT
- EXTIRQ_CFG_STAT_6348
- EXTLOG_DSM_REV
- EXTLOG_FN_ADDR
- EXTLP
- EXTLP0
- EXTLP_MARK
- EXTN_FEATURE_FUNCS
- EXTN_FLAG_SENSOR_ID
- EXTN_MODE
- EXTOUT
- EXTOUT_AC97_CENTER
- EXTOUT_AC97_L
- EXTOUT_AC97_LFE
- EXTOUT_AC97_R
- EXTOUT_AC97_REAR_L
- EXTOUT_AC97_REAR_R
- EXTOUT_ACENTER
- EXTOUT_ADC_CAP_L
- EXTOUT_ADC_CAP_R
- EXTOUT_ALFE
- EXTOUT_HEADPHONE_L
- EXTOUT_HEADPHONE_R
- EXTOUT_MIC_CAP
- EXTOUT_REAR_L
- EXTOUT_REAR_R
- EXTOUT_TOSLINK_L
- EXTOUT_TOSLINK_R
- EXTPA_BIAS_MODE
- EXTPA_BIAS_SRC
- EXTPCLK_CLK_SRC
- EXTPIN
- EXTPROC
- EXTRA
- EXTRACT
- EXTRACT_1
- EXTRACT_2
- EXTRACT_ASSOCIATIVITY
- EXTRACT_BIT
- EXTRACT_BITS
- EXTRACT_BIT_SET
- EXTRACT_BYTE
- EXTRACT_FBDCHAN_INDX
- EXTRACT_INFO_FIELDS
- EXTRACT_LINE_SIZE
- EXTRACT_PPC_BIT
- EXTRACT_PPC_BITS
- EXTRACT_REG_NUM
- EXTRACT_SIZE
- EXTRACT_TOPOLOGY
- EXTRADATA_ADDR
- EXTRA_CAPS_MMC_8BIT
- EXTRA_CAPS_MMC_HS200
- EXTRA_CAPS_MMC_HSDDR
- EXTRA_CAPS_SD_DDR50
- EXTRA_CAPS_SD_SDR104
- EXTRA_CAPS_SD_SDR50
- EXTRA_CHECKS
- EXTRA_CLOBBERS
- EXTRA_CONTEXT_SIZE
- EXTRA_DEBUG
- EXTRA_ERROR
- EXTRA_EVENTS_WTERR
- EXTRA_FID_READ_TESTS
- EXTRA_FIELD
- EXTRA_FLOPPY_PARAMS
- EXTRA_FRAME_SIZE
- EXTRA_INFO
- EXTRA_INFO_NEW
- EXTRA_INFO_RESERVED
- EXTRA_INFO_VER
- EXTRA_LEN
- EXTRA_MAGIC
- EXTRA_MEM_RATIO
- EXTRA_PREAMBLE
- EXTRA_PTRS
- EXTRA_REG_FE
- EXTRA_REG_LBR
- EXTRA_REG_LDLAT
- EXTRA_REG_MAX
- EXTRA_REG_NHMEX_M_DSP
- EXTRA_REG_NHMEX_M_FILTER
- EXTRA_REG_NHMEX_M_ISS
- EXTRA_REG_NHMEX_M_MAP
- EXTRA_REG_NHMEX_M_MSC_THR
- EXTRA_REG_NHMEX_M_PGT
- EXTRA_REG_NHMEX_M_PLD
- EXTRA_REG_NHMEX_M_ZDP_CTL_FVC
- EXTRA_REG_NONE
- EXTRA_REG_RSP_0
- EXTRA_REG_RSP_1
- EXTRA_SHIFT
- EXTRA_SPACE
- EXTRA_TEXT
- EXTRA_VECS
- EXTRDEN
- EXTREGS
- EXTSCBPEN
- EXTSCBTIME
- EXTSG
- EXTSPERIAG
- EXTSPERSUM
- EXTSTS_BCS_FREE
- EXTSTS_BCS_MASK
- EXTSTS_ICT
- EXTSTS_IPPKT
- EXTSTS_IRQD
- EXTSTS_IRQP
- EXTSTS_LA
- EXTSTS_TCPPKT
- EXTSTS_UDPPKT
- EXTSTS_VPKT
- EXTSTS_VTG_MASK
- EXTSTS_XFRA
- EXTSYNC
- EXTTS0_GPIO
- EXTTS1_GPIO
- EXTTS2_GPIO
- EXTTS3_GPIO
- EXTTS4_GPIO
- EXTTS5_GPIO
- EXTTS_BUFSIZE
- EXTVBASE
- EXT_3GBOX_NC
- EXT_3GBOX_NOT_SET
- EXT_ADDITIVE
- EXT_AGATE_BNC_BIT
- EXT_API_IN_DATA_0_0__byte0_MASK
- EXT_API_IN_DATA_0_0__byte0__SHIFT
- EXT_API_IN_DATA_0_0__byte1_MASK
- EXT_API_IN_DATA_0_0__byte1__SHIFT
- EXT_API_IN_DATA_0_0__byte2_MASK
- EXT_API_IN_DATA_0_0__byte2__SHIFT
- EXT_API_IN_DATA_0_0__byte3_MASK
- EXT_API_IN_DATA_0_0__byte3__SHIFT
- EXT_API_IN_DATA_0_1__byte0_MASK
- EXT_API_IN_DATA_0_1__byte0__SHIFT
- EXT_API_IN_DATA_0_1__byte1_MASK
- EXT_API_IN_DATA_0_1__byte1__SHIFT
- EXT_API_IN_DATA_0_1__byte2_MASK
- EXT_API_IN_DATA_0_1__byte2__SHIFT
- EXT_API_IN_DATA_0_1__byte3_MASK
- EXT_API_IN_DATA_0_1__byte3__SHIFT
- EXT_API_IN_DATA_0_2__byte0_MASK
- EXT_API_IN_DATA_0_2__byte0__SHIFT
- EXT_API_IN_DATA_0_2__byte1_MASK
- EXT_API_IN_DATA_0_2__byte1__SHIFT
- EXT_API_IN_DATA_0_2__byte2_MASK
- EXT_API_IN_DATA_0_2__byte2__SHIFT
- EXT_API_IN_DATA_0_2__byte3_MASK
- EXT_API_IN_DATA_0_2__byte3__SHIFT
- EXT_API_IN_DATA_0_3__byte0_MASK
- EXT_API_IN_DATA_0_3__byte0__SHIFT
- EXT_API_IN_DATA_0_3__byte1_MASK
- EXT_API_IN_DATA_0_3__byte1__SHIFT
- EXT_API_IN_DATA_0_3__byte2_MASK
- EXT_API_IN_DATA_0_3__byte2__SHIFT
- EXT_API_IN_DATA_0_3__byte3_MASK
- EXT_API_IN_DATA_0_3__byte3__SHIFT
- EXT_API_OUT_DATA_0_0__byte0_MASK
- EXT_API_OUT_DATA_0_0__byte0__SHIFT
- EXT_API_OUT_DATA_0_0__byte1_MASK
- EXT_API_OUT_DATA_0_0__byte1__SHIFT
- EXT_API_OUT_DATA_0_0__byte2_MASK
- EXT_API_OUT_DATA_0_0__byte2__SHIFT
- EXT_API_OUT_DATA_0_0__byte3_MASK
- EXT_API_OUT_DATA_0_0__byte3__SHIFT
- EXT_API_OUT_DATA_0_1__byte0_MASK
- EXT_API_OUT_DATA_0_1__byte0__SHIFT
- EXT_API_OUT_DATA_0_1__byte1_MASK
- EXT_API_OUT_DATA_0_1__byte1__SHIFT
- EXT_API_OUT_DATA_0_1__byte2_MASK
- EXT_API_OUT_DATA_0_1__byte2__SHIFT
- EXT_API_OUT_DATA_0_1__byte3_MASK
- EXT_API_OUT_DATA_0_1__byte3__SHIFT
- EXT_API_OUT_DATA_0_2__byte0_MASK
- EXT_API_OUT_DATA_0_2__byte0__SHIFT
- EXT_API_OUT_DATA_0_2__byte1_MASK
- EXT_API_OUT_DATA_0_2__byte1__SHIFT
- EXT_API_OUT_DATA_0_2__byte2_MASK
- EXT_API_OUT_DATA_0_2__byte2__SHIFT
- EXT_API_OUT_DATA_0_2__byte3_MASK
- EXT_API_OUT_DATA_0_2__byte3__SHIFT
- EXT_API_OUT_DATA_0_3__byte0_MASK
- EXT_API_OUT_DATA_0_3__byte0__SHIFT
- EXT_API_OUT_DATA_0_3__byte1_MASK
- EXT_API_OUT_DATA_0_3__byte1__SHIFT
- EXT_API_OUT_DATA_0_3__byte2_MASK
- EXT_API_OUT_DATA_0_3__byte2__SHIFT
- EXT_API_OUT_DATA_0_3__byte3_MASK
- EXT_API_OUT_DATA_0_3__byte3__SHIFT
- EXT_APP_AC3
- EXT_APP_CONFIG_HIGH_ROUTER
- EXT_APP_CONFIG_HIGH_STREAM
- EXT_APP_CONFIG_LOW_ROUTER
- EXT_APP_CONFIG_LOW_STREAM
- EXT_APP_CONFIG_MIDDLE_ROUTER
- EXT_APP_CONFIG_MIDDLE_STREAM
- EXT_APP_NAMES
- EXT_APP_NAMES_SIZE
- EXT_APP_NUMBER_AUDIO
- EXT_APP_NUMBER_MIDI
- EXT_APP_STREAM_ENTRIES
- EXT_APP_STREAM_ENTRY_SIZE
- EXT_APP_STREAM_RX_NUMBER
- EXT_APP_STREAM_TX_NUMBER
- EXT_ARB_ACK
- EXT_ARB_MODE
- EXT_ATTRIB_CTL
- EXT_ATTRIB_CTL_EXT
- EXT_AUXDDC_LUTINDEX_0
- EXT_AUXDDC_LUTINDEX_1
- EXT_AUXDDC_LUTINDEX_2
- EXT_AUXDDC_LUTINDEX_3
- EXT_AUXDDC_LUTINDEX_4
- EXT_AUXDDC_LUTINDEX_5
- EXT_AUXDDC_LUTINDEX_6
- EXT_AUXDDC_LUTINDEX_7
- EXT_BITS
- EXT_BIU_MISC
- EXT_BIU_MISC_COP_BFC
- EXT_BIU_MISC_COP_ENABLE
- EXT_BIU_MISC_LIN_ENABLE
- EXT_BOARD_ADDRESS_OFFSET
- EXT_BRIDGE_CNTL__IO_PORT_80_EN_MASK
- EXT_BRIDGE_CNTL__IO_PORT_80_EN__SHIFT
- EXT_BSSID_1
- EXT_BSSID_10
- EXT_BSSID_11
- EXT_BSSID_12
- EXT_BSSID_13
- EXT_BSSID_14
- EXT_BSSID_15
- EXT_BSSID_2
- EXT_BSSID_3
- EXT_BSSID_4
- EXT_BSSID_5
- EXT_BSSID_6
- EXT_BSSID_7
- EXT_BSSID_8
- EXT_BSSID_9
- EXT_BSSID_END
- EXT_BSSID_START
- EXT_BUS_CTL
- EXT_BUS_CTL_LIN_1MB
- EXT_BUS_CTL_LIN_2MB
- EXT_BUS_CTL_LIN_4MB
- EXT_BUS_CTL_PCIBURST_READ
- EXT_BUS_CTL_PCIBURST_WRITE
- EXT_BUS_CTL_ZEROWAIT
- EXT_BUS_START_ADDR
- EXT_CAP_CTL1
- EXT_CAP_CTL2
- EXT_CAP_CTL2_ANYFRAMEIRQ
- EXT_CAP_CTL2_ODDFRAMEIRQ
- EXT_CAP_MODE1
- EXT_CAP_MODE1_8BIT
- EXT_CAP_MODE1_ALTFIFO
- EXT_CAP_MODE1_CCIR656
- EXT_CAP_MODE1_IGNOREVGT
- EXT_CAP_MODE1_MIRRORX
- EXT_CAP_MODE1_MIRRORY
- EXT_CAP_MODE1_SWAPUV
- EXT_CAP_MODE2
- EXT_CAP_MODE2_CCIRDGH
- EXT_CAP_MODE2_CCIRINVDG
- EXT_CAP_MODE2_CCIRINVHGT
- EXT_CAP_MODE2_CCIRINVOE
- EXT_CAP_MODE2_CCIRINVVGT
- EXT_CAP_MODE2_DATEND
- EXT_CAP_MODE2_FIXSONY
- EXT_CAP_MODE2_SYNCFREEZE
- EXT_CFG_IDDQ_BIAS
- EXT_CFG_LCB_RESET_SUPPORTED_SHIFT
- EXT_CFG_PWR_DOWN
- EXT_CFG_RESET_N
- EXT_CH_RADAR_FOUND
- EXT_CK25_DIS
- EXT_CLKI_MARK
- EXT_CLK_AUDIO_IN
- EXT_CLK_CGC_ON
- EXT_CLK_CNTL
- EXT_CLK_EN
- EXT_CLK_ENET_IN
- EXT_CLK_NR_CLKS
- EXT_CLK_PIN
- EXT_CLOCK
- EXT_CLOCK_4020_BITS
- EXT_CLOCK_MODE
- EXT_COLOUR_COMPARE
- EXT_CONTROL_REG_BITS
- EXT_CRT_IRQ
- EXT_CRT_IRQ_ACT_HIGH
- EXT_CRT_IRQ_ENABLE
- EXT_CRT_TEST
- EXT_CRT_VRTOFL
- EXT_CRT_VRTOFL_INTERLACE
- EXT_CRT_VRTOFL_LINECOMP10
- EXT_CSD_AUTO_BKOPS_MASK
- EXT_CSD_BKOPS_EN
- EXT_CSD_BKOPS_LEVEL_2
- EXT_CSD_BKOPS_START
- EXT_CSD_BKOPS_STATUS
- EXT_CSD_BKOPS_SUPPORT
- EXT_CSD_BOOT_MULT
- EXT_CSD_BOOT_WP
- EXT_CSD_BOOT_WP_B_PERM_WP_DIS
- EXT_CSD_BOOT_WP_B_PERM_WP_EN
- EXT_CSD_BOOT_WP_B_PWR_WP_DIS
- EXT_CSD_BOOT_WP_B_PWR_WP_EN
- EXT_CSD_BUS_WIDTH
- EXT_CSD_BUS_WIDTH_1
- EXT_CSD_BUS_WIDTH_4
- EXT_CSD_BUS_WIDTH_8
- EXT_CSD_BUS_WIDTH_STROBE
- EXT_CSD_CACHE_CTRL
- EXT_CSD_CACHE_SIZE
- EXT_CSD_CARD_TYPE
- EXT_CSD_CARD_TYPE_DDR_1_2V
- EXT_CSD_CARD_TYPE_DDR_1_8V
- EXT_CSD_CARD_TYPE_DDR_52
- EXT_CSD_CARD_TYPE_HS
- EXT_CSD_CARD_TYPE_HS200
- EXT_CSD_CARD_TYPE_HS200_1_2V
- EXT_CSD_CARD_TYPE_HS200_1_8V
- EXT_CSD_CARD_TYPE_HS400
- EXT_CSD_CARD_TYPE_HS400ES
- EXT_CSD_CARD_TYPE_HS400_1_2V
- EXT_CSD_CARD_TYPE_HS400_1_8V
- EXT_CSD_CARD_TYPE_HS_26
- EXT_CSD_CARD_TYPE_HS_52
- EXT_CSD_CMDQ_DEPTH
- EXT_CSD_CMDQ_DEPTH_MASK
- EXT_CSD_CMDQ_MODE_EN
- EXT_CSD_CMDQ_MODE_ENABLED
- EXT_CSD_CMDQ_SUPPORT
- EXT_CSD_CMDQ_SUPPORTED
- EXT_CSD_CMD_SET_CPSECURE
- EXT_CSD_CMD_SET_NORMAL
- EXT_CSD_CMD_SET_SECURE
- EXT_CSD_DATA_SECTOR_SIZE
- EXT_CSD_DATA_TAG_SUPPORT
- EXT_CSD_DDR_BUS_WIDTH_4
- EXT_CSD_DDR_BUS_WIDTH_8
- EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A
- EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B
- EXT_CSD_DRIVER_STRENGTH
- EXT_CSD_DRV_STR_SHIFT
- EXT_CSD_DYNCAP_NEEDED
- EXT_CSD_ERASED_MEM_CONT
- EXT_CSD_ERASE_GROUP_DEF
- EXT_CSD_ERASE_TIMEOUT_MULT
- EXT_CSD_EXP_EVENTS_CTRL
- EXT_CSD_EXP_EVENTS_STATUS
- EXT_CSD_FIRMWARE_VERSION
- EXT_CSD_FLUSH_CACHE
- EXT_CSD_FW_CONFIG
- EXT_CSD_GENERIC_CMD6_TIME
- EXT_CSD_GP_SIZE_MULT
- EXT_CSD_HC_ERASE_GRP_SIZE
- EXT_CSD_HC_WP_GRP_SIZE
- EXT_CSD_HPI_FEATURES
- EXT_CSD_HPI_MGMT
- EXT_CSD_HS_TIMING
- EXT_CSD_MANUAL_BKOPS_MASK
- EXT_CSD_MAX_PACKED_READS
- EXT_CSD_MAX_PACKED_WRITES
- EXT_CSD_NO_POWER_NOTIFICATION
- EXT_CSD_OUT_OF_INTERRUPT_TIME
- EXT_CSD_PACKED_CMD_STATUS
- EXT_CSD_PACKED_EVENT_EN
- EXT_CSD_PACKED_FAILURE
- EXT_CSD_PACKED_FAILURE_INDEX
- EXT_CSD_PACKED_GENERIC_ERROR
- EXT_CSD_PACKED_INDEXED_ERROR
- EXT_CSD_PARTITION_ATTRIBUTE
- EXT_CSD_PARTITION_SETTING_COMPLETED
- EXT_CSD_PARTITION_SUPPORT
- EXT_CSD_PART_CONFIG
- EXT_CSD_PART_CONFIG_ACC_BOOT0
- EXT_CSD_PART_CONFIG_ACC_GP0
- EXT_CSD_PART_CONFIG_ACC_MASK
- EXT_CSD_PART_CONFIG_ACC_RPMB
- EXT_CSD_PART_SETTING_COMPLETED
- EXT_CSD_PART_SUPPORT_PART_EN
- EXT_CSD_PART_SWITCH_TIME
- EXT_CSD_POWER_CLASS
- EXT_CSD_POWER_OFF_LONG
- EXT_CSD_POWER_OFF_LONG_TIME
- EXT_CSD_POWER_OFF_NOTIFICATION
- EXT_CSD_POWER_OFF_SHORT
- EXT_CSD_POWER_ON
- EXT_CSD_PRE_EOL_INFO
- EXT_CSD_PWR_CL_200_195
- EXT_CSD_PWR_CL_200_360
- EXT_CSD_PWR_CL_26_195
- EXT_CSD_PWR_CL_26_360
- EXT_CSD_PWR_CL_4BIT_MASK
- EXT_CSD_PWR_CL_4BIT_SHIFT
- EXT_CSD_PWR_CL_52_195
- EXT_CSD_PWR_CL_52_360
- EXT_CSD_PWR_CL_8BIT_MASK
- EXT_CSD_PWR_CL_8BIT_SHIFT
- EXT_CSD_PWR_CL_DDR_200_360
- EXT_CSD_PWR_CL_DDR_52_195
- EXT_CSD_PWR_CL_DDR_52_360
- EXT_CSD_REL_WR_SEC_C
- EXT_CSD_REV
- EXT_CSD_REV_ANY
- EXT_CSD_RPMB_MULT
- EXT_CSD_RST_N_ENABLED
- EXT_CSD_RST_N_EN_MASK
- EXT_CSD_RST_N_FUNCTION
- EXT_CSD_SANITIZE_START
- EXT_CSD_SEC_BD_BLK_EN
- EXT_CSD_SEC_CNT
- EXT_CSD_SEC_ERASE_MULT
- EXT_CSD_SEC_ER_EN
- EXT_CSD_SEC_FEATURE_SUPPORT
- EXT_CSD_SEC_GB_CL_EN
- EXT_CSD_SEC_SANITIZE
- EXT_CSD_SEC_TRIM_MULT
- EXT_CSD_STROBE_SUPPORT
- EXT_CSD_STRUCTURE
- EXT_CSD_STR_LEN
- EXT_CSD_SUPPORTED_MODE
- EXT_CSD_SYSPOOL_EXHAUSTED
- EXT_CSD_S_A_TIMEOUT
- EXT_CSD_TAG_UNIT_SIZE
- EXT_CSD_TIMING_BC
- EXT_CSD_TIMING_HS
- EXT_CSD_TIMING_HS200
- EXT_CSD_TIMING_HS400
- EXT_CSD_TRIM_MULT
- EXT_CSD_URGENT_BKOPS
- EXT_CSD_WR_REL_PARAM
- EXT_CSD_WR_REL_PARAM_EN
- EXT_CTRL_REG
- EXT_DAC_REGS
- EXT_DCLK_DIV
- EXT_DCLK_DIV_VFSEL
- EXT_DCLK_MULT
- EXT_DDA_X_INC
- EXT_DDA_X_INIT
- EXT_DDA_Y_INC
- EXT_DDA_Y_INIT
- EXT_DEBUG__
- EXT_DEF_TYPE_WWPN
- EXT_DEVICE_CFG_REQ
- EXT_DISPLAY_PATH
- EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN
- EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK
- EXT_DISPLAY_PATH_CAPS__HBR2_DISABLE
- EXT_DISPLAY_PATH_CAPS__HDMI20_PARADE_PS175
- EXT_DISPLAY_PATH_CAPS__HDMI20_PI3EQX1204
- EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT
- EXT_DISP_IFACE_CTRL_1
- EXT_DISP_IFACE_CTRL_2
- EXT_DSP_BIT_DCAL
- EXT_DSP_BIT_MIDI_CON
- EXT_E2PROM_ON
- EXT_EIGHTBIT
- EXT_ELOG_ENTRY_MASK
- EXT_ENABLE_REG
- EXT_ENC_CONTROL
- EXT_END_OF_FILE
- EXT_ENERGY_DET
- EXT_ENERGY_DET_MASK
- EXT_EPHY
- EXT_EVENT
- EXT_EXT_PWR_MGMT
- EXT_FEATURE
- EXT_FEATURE_1682
- EXT_FEATURE_BUS_MASK
- EXT_FEATURE_BUS_PCI
- EXT_FEATURE_BUS_VL_LINEAR
- EXT_FEATURE_BUS_VL_STD
- EXT_FID_MASK
- EXT_FIELD
- EXT_FIFO_CTL
- EXT_FIRST_EXTENT
- EXT_FIRST_INDEX
- EXT_FRAC_BITS
- EXT_FS_RCAL_DIV
- EXT_FS_RCAL_EN
- EXT_FUNC_CTL
- EXT_FUNC_CTL_EXTREGENBL
- EXT_GOTO_CMD_REC
- EXT_GPHY
- EXT_GPHY_CTRL
- EXT_GPHY_RESET
- EXT_GPIO
- EXT_HAS_FREE_INDEX
- EXT_HEADER
- EXT_HEADER_SIZE
- EXT_HIDDEN_CTL1
- EXT_HIDDEN_CTL4
- EXT_HORIZ_BLANK
- EXT_HORIZ_TOTAL
- EXT_HPDPIN_LUTINDEX_0
- EXT_HPDPIN_LUTINDEX_1
- EXT_HPDPIN_LUTINDEX_2
- EXT_HPDPIN_LUTINDEX_3
- EXT_HPDPIN_LUTINDEX_4
- EXT_HPDPIN_LUTINDEX_5
- EXT_HPDPIN_LUTINDEX_6
- EXT_HPDPIN_LUTINDEX_7
- EXT_HS_RCAL_EN
- EXT_HW_CONFIG_DCS_15MA
- EXT_HW_CONFIG_DCS_18MA
- EXT_HW_CONFIG_DCS_24MA
- EXT_HW_CONFIG_DCS_9MA
- EXT_HW_CONFIG_DCS_MASK
- EXT_HW_CONFIG_DDS_15MA
- EXT_HW_CONFIG_DDS_18MA
- EXT_HW_CONFIG_DDS_24MA
- EXT_HW_CONFIG_DDS_9MA
- EXT_HW_CONFIG_DDS_MASK
- EXT_HW_CONFIG_FW
- EXT_HW_CONFIG_PD
- EXT_HW_CONFIG_SIZE_128M
- EXT_HW_CONFIG_SIZE_256M
- EXT_HW_CONFIG_SIZE_512M
- EXT_HW_CONFIG_SIZE_INVALID
- EXT_HW_CONFIG_SIZE_MASK
- EXT_HW_CONFIG_SP_BYTE_PARITY
- EXT_HW_CONFIG_SP_ECC
- EXT_HW_CONFIG_SP_ECCx
- EXT_HW_CONFIG_SP_MASK
- EXT_HW_CONFIG_SP_NONE
- EXT_HW_CONFIG_US
- EXT_IDDQ_FROM_PHY
- EXT_IDDQ_GLBL_PWR
- EXT_ILP_HZ
- EXT_IMEM_CHK_RPT
- EXT_IMEM_CODE_DONE
- EXT_INDIRECT_SEG_PRD_FLAG
- EXT_INIT_MAX_LEN
- EXT_INT0
- EXT_INT1
- EXT_INTERRUPT
- EXT_INTR_EXITS
- EXT_INTR_PENDING_BIT
- EXT_INT_EDGE
- EXT_INT_ENAB
- EXT_INT_POL
- EXT_IOCTL_SIGN
- EXT_IOCTL_SIGN_SZ
- EXT_IRQ0
- EXT_IRQS
- EXT_IRQ_CLK_COMP
- EXT_IRQ_CPU_TIMER
- EXT_IRQ_CP_SERVICE
- EXT_IRQ_EMERGENCY_SIG
- EXT_IRQ_EXTERNAL_CALL
- EXT_IRQ_INTERRUPT_KEY
- EXT_IRQ_IUCV
- EXT_IRQ_MALFUNC_ALERT
- EXT_IRQ_MEASURE_ALERT
- EXT_IRQ_SERVICE_SIG
- EXT_IRQ_TIMING_ALERT
- EXT_IRQ_WARNING_TRACK
- EXT_LAST_EXTENT
- EXT_LAST_INDEX
- EXT_LATCH1
- EXT_LATCH1_VAFC_EN
- EXT_LATCH2
- EXT_LATCH2_I2C_CLK
- EXT_LATCH2_I2C_CLKEN
- EXT_LATCH2_I2C_DAT
- EXT_LATCH2_I2C_DATEN
- EXT_LIN_ADDR_REC
- EXT_LL_STAT
- EXT_MARK
- EXT_MASTER_PAIR_SEL
- EXT_MATCH0
- EXT_MAX_BLOCKS
- EXT_MAX_EXTENT
- EXT_MAX_INDEX
- EXT_MCLK_DIV
- EXT_MCLK_MULT
- EXT_MEM0_BASE_G
- EXT_MEM0_BASE_M
- EXT_MEM0_BASE_S
- EXT_MEM0_ENABLE_F
- EXT_MEM0_ENABLE_S
- EXT_MEM0_ENABLE_V
- EXT_MEM0_SIZE_G
- EXT_MEM0_SIZE_M
- EXT_MEM0_SIZE_S
- EXT_MEM0_SIZE_V
- EXT_MEM1_BASE_G
- EXT_MEM1_BASE_M
- EXT_MEM1_BASE_S
- EXT_MEM1_ENABLE_F
- EXT_MEM1_ENABLE_S
- EXT_MEM1_ENABLE_V
- EXT_MEM1_SIZE_G
- EXT_MEM1_SIZE_M
- EXT_MEM1_SIZE_S
- EXT_MEM1_SIZE_V
- EXT_MEM_BASE_G
- EXT_MEM_BASE_M
- EXT_MEM_BASE_S
- EXT_MEM_BASE_V
- EXT_MEM_CNTL
- EXT_MEM_CTL0
- EXT_MEM_CTL0_7CLK
- EXT_MEM_CTL0_ASYM
- EXT_MEM_CTL0_CAS1ON
- EXT_MEM_CTL0_FIFOFLUSH
- EXT_MEM_CTL0_MULTCAS
- EXT_MEM_CTL0_RAS2CAS_1
- EXT_MEM_CTL0_RAS_1
- EXT_MEM_CTL0_SEQRESET
- EXT_MEM_CTL1
- EXT_MEM_CTL1_1Mx16
- EXT_MEM_CTL1_256Kx4
- EXT_MEM_CTL1_4K_REFRESH
- EXT_MEM_CTL1_512Kx8
- EXT_MEM_CTL1_PAR
- EXT_MEM_CTL1_SER
- EXT_MEM_CTL1_SERPAR
- EXT_MEM_CTL1_SYNC
- EXT_MEM_CTL1_VRAM
- EXT_MEM_CTL2
- EXT_MEM_ENABLE_F
- EXT_MEM_ENABLE_S
- EXT_MEM_ENABLE_V
- EXT_MEM_SIZE_G
- EXT_MEM_SIZE_M
- EXT_MEM_SIZE_S
- EXT_MEM_SIZE_V
- EXT_MEM_START
- EXT_METADATA_START_ADDR
- EXT_MSG
- EXT_NB_MCA_CFG
- EXT_NEXT_EXTENT_ALLOCDECS
- EXT_NOT_RECORDED_ALLOCATED
- EXT_NOT_RECORDED_NOT_ALLOCATED
- EXT_NVM_RF_CFG_DASH_MSK
- EXT_NVM_RF_CFG_FLAVOR_MSK
- EXT_NVM_RF_CFG_RX_ANT_MSK
- EXT_NVM_RF_CFG_STEP_MSK
- EXT_NVM_RF_CFG_TX_ANT_MSK
- EXT_NVM_RF_CFG_TYPE_MSK
- EXT_NVM_WORD1_ID
- EXT_NVM_WORD2_LEN
- EXT_OFFSET
- EXT_OVERSCAN_BLUE
- EXT_OVERSCAN_GREEN
- EXT_OVERSCAN_LEFT_RIGHT__EXT_OVERSCAN_LEFT_MASK
- EXT_OVERSCAN_LEFT_RIGHT__EXT_OVERSCAN_LEFT__SHIFT
- EXT_OVERSCAN_LEFT_RIGHT__EXT_OVERSCAN_RIGHT_MASK
- EXT_OVERSCAN_LEFT_RIGHT__EXT_OVERSCAN_RIGHT__SHIFT
- EXT_OVERSCAN_RED
- EXT_OVERSCAN_TOP_BOTTOM__EXT_OVERSCAN_BOTTOM_MASK
- EXT_OVERSCAN_TOP_BOTTOM__EXT_OVERSCAN_BOTTOM__SHIFT
- EXT_OVERSCAN_TOP_BOTTOM__EXT_OVERSCAN_TOP_MASK
- EXT_OVERSCAN_TOP_BOTTOM__EXT_OVERSCAN_TOP__SHIFT
- EXT_PCI_MASTER_ENABLE
- EXT_PHY1
- EXT_PHY2
- EXT_PHY_CRS_MODE
- EXT_PHY_OPTION
- EXT_PHY_RESET
- EXT_PORT
- EXT_PORT_DDR
- EXT_PWR_DN_EN_LD
- EXT_PWR_DOWN
- EXT_PWR_DOWN_BIAS
- EXT_PWR_DOWN_DLL
- EXT_PWR_DOWN_PHY
- EXT_PWR_DOWN_PHY_EN
- EXT_PWR_DOWN_PHY_RD
- EXT_PWR_DOWN_PHY_RX
- EXT_PWR_DOWN_PHY_SD
- EXT_PWR_DOWN_PHY_TX
- EXT_PWR_REQ
- EXT_QUEUE_BIT
- EXT_R
- EXT_RD_EN
- EXT_READ_PORT
- EXT_RECORDED_ALLOCATED
- EXT_REFCLK
- EXT_REF_SEL
- EXT_REG
- EXT_REGULATOR_COREBLK_DURATION
- EXT_REGULATOR_DURATION
- EXT_REQ_EN
- EXT_REVMII
- EXT_RGMII_OOB_CTRL
- EXT_ROM_UCB4GH
- EXT_ROM_UCB4GH_1HL
- EXT_ROM_UCB4GH_FREEZE
- EXT_ROM_UCB4GH_INTSTAT
- EXT_ROM_UCB4GH_ODD
- EXT_ROM_UCB4GH_ODDFRAME
- EXT_RS_RCAL_DIV
- EXT_SCAN_ENHANCED
- EXT_SEG_ADDR_REC
- EXT_SEG_READ_PTR
- EXT_SEG_WRITE_PTR
- EXT_SEQ_MISC
- EXT_SEQ_MISC_16_RGB444
- EXT_SEQ_MISC_16_RGB555
- EXT_SEQ_MISC_16_RGB565
- EXT_SEQ_MISC_24_RGB888
- EXT_SEQ_MISC_32
- EXT_SEQ_MISC_8
- EXT_SEQ_MISC_8_RGB332
- EXT_SHIFT
- EXT_SIA
- EXT_SIA_SUSPECT
- EXT_SIGNATURE
- EXT_SIGNATURE_SIZE
- EXT_SIZE
- EXT_SLEEP_CONTROL
- EXT_SPDIF_TYPE
- EXT_SRAM_ADDRESS
- EXT_SRC_HEIGHT
- EXT_SRC_WIDTH
- EXT_SRC_WIN_WIDTH
- EXT_START_ADDR
- EXT_START_ADDR_ENABLE
- EXT_START_ADDR_HI
- EXT_START_TRIG_BNC_BIT
- EXT_STATS_
- EXT_STATUS_ADAT_LOCKED
- EXT_STATUS_ADAT_SLIP
- EXT_STATUS_AES1_LOCKED
- EXT_STATUS_AES1_SLIP
- EXT_STATUS_AES2_LOCKED
- EXT_STATUS_AES2_SLIP
- EXT_STATUS_AES3_LOCKED
- EXT_STATUS_AES3_SLIP
- EXT_STATUS_AES4_LOCKED
- EXT_STATUS_AES4_SLIP
- EXT_STATUS_ARX1_LOCKED
- EXT_STATUS_ARX1_SLIP
- EXT_STATUS_ARX2_LOCKED
- EXT_STATUS_ARX2_SLIP
- EXT_STATUS_ARX3_LOCKED
- EXT_STATUS_ARX3_SLIP
- EXT_STATUS_ARX4_LOCKED
- EXT_STATUS_ARX4_SLIP
- EXT_STATUS_BUSY
- EXT_STATUS_DATA_CMP_FAILED
- EXT_STATUS_DATA_OVERRUN
- EXT_STATUS_DATA_UNDERRUN
- EXT_STATUS_DEVICE_OFFLINE
- EXT_STATUS_DMA_ERR
- EXT_STATUS_ERR
- EXT_STATUS_INVALID_CFG
- EXT_STATUS_INVALID_PARAM
- EXT_STATUS_MAILBOX
- EXT_STATUS_MDIX
- EXT_STATUS_NOT_SUPPORTED
- EXT_STATUS_NO_MEMORY
- EXT_STATUS_OK
- EXT_STATUS_ON
- EXT_STATUS_TDIF_LOCKED
- EXT_STATUS_TDIF_SLIP
- EXT_STATUS_THREAD_FAILED
- EXT_STATUS_TIMEOUT
- EXT_STATUS_WC_LOCKED
- EXT_STATUS_WC_SLIP
- EXT_STOP_TRIG_BNC_BIT
- EXT_STROBE_REG
- EXT_SYNC_ADAT_USER_DATA
- EXT_SYNC_CLOCK_SOURCE
- EXT_SYNC_CTL
- EXT_SYNC_CTL_HS_0
- EXT_SYNC_CTL_HS_1
- EXT_SYNC_CTL_HS_HSVS
- EXT_SYNC_CTL_HS_NORMAL
- EXT_SYNC_CTL_VS_0
- EXT_SYNC_CTL_VS_1
- EXT_SYNC_CTL_VS_COMP
- EXT_SYNC_CTL_VS_NORMAL
- EXT_SYNC_LOCKED
- EXT_SYNC_RATE
- EXT_TE_EDGE
- EXT_TE_EN
- EXT_TE_RDY_INT_FLAG
- EXT_TRANS
- EXT_TRIG_DOWN
- EXT_TRIG_UP
- EXT_TV_CTL
- EXT_TV_PLL
- EXT_TYPE_MASK
- EXT_TYPE_SHIFT
- EXT_UNWRITTEN_MAX_LEN
- EXT_V2PLL_FB_DIV
- EXT_V2PLL_MSB
- EXT_V2PLL_REF_DIV
- EXT_VC_TABLE
- EXT_VENDOR_ID
- EXT_VENDOR_ID_SHIFT
- EXT_VERT_BLANK_START
- EXT_VERT_DISPLAY
- EXT_VERT_STRETCH
- EXT_VERT_SYNC_START
- EXT_VERT_TOTAL
- EXT_VIDEO_CAPABILITY_BLOCK
- EXT_VIDEO_CAP_BLOCK_Y420CMDB
- EXT_VIDEO_DATA_BLOCK_420
- EXT_VID_DISP_CTL1
- EXT_VID_DISP_CTL1_ENABLE_WINDOW
- EXT_VID_DISP_CTL1_FULL_WIN
- EXT_VID_DISP_CTL1_IGNORE_CCOMP
- EXT_VID_DISP_CTL1_INTRAM
- EXT_VID_DISP_CTL1_NOCLIP
- EXT_VID_DISP_CTL1_UV_AVG
- EXT_VID_DISP_CTL1_VINTERPOL_OFF
- EXT_VID_DISP_CTL1_Y128
- EXT_VID_FIFO_CTL
- EXT_VID_FIFO_CTL1
- EXT_VID_FIFO_CTL1_INTERLEAVE
- EXT_VID_FIFO_CTL1_OE_HIGH
- EXT_VID_FMT
- EXT_VID_FMT_DBL_H_PIX
- EXT_VID_FMT_DUP_PIX_ZOON
- EXT_VID_FMT_MOD_3RD_PIX
- EXT_VID_FMT_RGB4444
- EXT_VID_FMT_RGB555
- EXT_VID_FMT_RGB565
- EXT_VID_FMT_RGB8
- EXT_VID_FMT_RGB888_24
- EXT_VID_FMT_RGB888_32
- EXT_VID_FMT_RGB8T
- EXT_VID_FMT_YUV128
- EXT_VID_FMT_YUV422
- EXT_VID_MASK
- EXT_VIRT_MEM
- EXT_VIRT_MEM_2
- EXT_VPLL_CNTL
- EXT_VPLL_EN
- EXT_VPLL_FB_DIV
- EXT_VPLL_INSYNC
- EXT_VPLL_MSB
- EXT_VPLL_REF_DIV
- EXT_VPLL_VGA_EN
- EXT_WORDCLOCK_1FS_TYPE
- EXT_WORDCLOCK_256FS_TYPE
- EXT_WRITE_PORT
- EXT_XT_CAP16
- EXT_XT_CTL
- EXT_XT_LINEARFB
- EXT_XT_PAL
- EXT_X_END
- EXT_X_START
- EXT_Y_END
- EXT_Y_START
- EXTconf
- EXU_GPIO_CONTROL
- EXU_GPIO_GROUP_CONTROL
- EXU_INTERRUPT_CONTROL
- EXU_REGISTER_ACCESS_CONTROL
- EXWRBK
- EXYNOS3250_CHROMA_BASE
- EXYNOS3250_CHROMA_CR_BASE
- EXYNOS3250_CHROMA_CR_STRIDE
- EXYNOS3250_CHROMA_CR_XY_OFFSET
- EXYNOS3250_CHROMA_CR_YX_OFFSET_MASK
- EXYNOS3250_CHROMA_CR_YX_OFFSET_SHIFT
- EXYNOS3250_CHROMA_CR_YY_OFFSET_MASK
- EXYNOS3250_CHROMA_CR_YY_OFFSET_SHIFT
- EXYNOS3250_CHROMA_STRIDE
- EXYNOS3250_CHROMA_XY_OFFSET
- EXYNOS3250_CHROMA_YX_OFFSET_MASK
- EXYNOS3250_CHROMA_YX_OFFSET_SHIFT
- EXYNOS3250_CHROMA_YY_OFFSET_MASK
- EXYNOS3250_CHROMA_YY_OFFSET_SHIFT
- EXYNOS3250_CLK_DOWN_READY
- EXYNOS3250_COEF_MASK
- EXYNOS3250_COEF_SHIFT
- EXYNOS3250_COMSTAT
- EXYNOS3250_CORE_DONE_EN
- EXYNOS3250_CRC_RESULT
- EXYNOS3250_CUR_COM_MODE
- EXYNOS3250_CUR_PROC_MODE
- EXYNOS3250_DEC_SCALE_FACTOR_1_8
- EXYNOS3250_DEC_SCALE_FACTOR_2_8
- EXYNOS3250_DEC_SCALE_FACTOR_4_8
- EXYNOS3250_DEC_SCALE_FACTOR_8_8
- EXYNOS3250_DEC_SCALE_FACTOR_MASK
- EXYNOS3250_DEC_SCALING_RATIO
- EXYNOS3250_DEC_STREAM_MASK
- EXYNOS3250_DEC_STREAM_SIZE
- EXYNOS3250_DMA_ISSUE_NUM
- EXYNOS3250_DMA_MO_COUNT
- EXYNOS3250_DMA_OPER_STATUS
- EXYNOS3250_ENC_STREAM_BOUND
- EXYNOS3250_ENC_STREAM_BOUND_MASK
- EXYNOS3250_ENC_STREAM_INT_EN
- EXYNOS3250_ENC_STREAM_STAT
- EXYNOS3250_ERR_INT_EN
- EXYNOS3250_HALF_EN
- EXYNOS3250_HALF_EN_MASK
- EXYNOS3250_HEADER_STAT
- EXYNOS3250_HEAD_INT_EN
- EXYNOS3250_HT_NUM_AC_MASK
- EXYNOS3250_HT_NUM_AC_SHIFT
- EXYNOS3250_HT_NUM_DC_MASK
- EXYNOS3250_HT_NUM_DC_SHIFT
- EXYNOS3250_IRQ_TIMEOUT
- EXYNOS3250_ISSUE_GATHER_NUM_MASK
- EXYNOS3250_ISSUE_GATHER_NUM_SHIFT
- EXYNOS3250_JPEG_DEC_COEF1
- EXYNOS3250_JPEG_DEC_COEF2
- EXYNOS3250_JPEG_DEC_COEF3
- EXYNOS3250_JPEG_DONE
- EXYNOS3250_JPEG_DONE_EN
- EXYNOS3250_JPEG_ENC_COEF1
- EXYNOS3250_JPEG_ENC_COEF2
- EXYNOS3250_JPEG_ENC_COEF3
- EXYNOS3250_JPGCLKCON
- EXYNOS3250_JPGCMOD
- EXYNOS3250_JPGCNT
- EXYNOS3250_JPGCNT_MASK
- EXYNOS3250_JPGDRI
- EXYNOS3250_JPGDRI_MASK
- EXYNOS3250_JPGINTSE
- EXYNOS3250_JPGINTST
- EXYNOS3250_JPGMOD
- EXYNOS3250_JPGOPR
- EXYNOS3250_JPGOPR_MASK
- EXYNOS3250_JPGX
- EXYNOS3250_JPGX_MASK
- EXYNOS3250_JPGY
- EXYNOS3250_JPGY_MASK
- EXYNOS3250_JPG_COEF
- EXYNOS3250_JPG_IMGADR
- EXYNOS3250_JPG_JPGADR
- EXYNOS3250_JRSTART
- EXYNOS3250_JSTART
- EXYNOS3250_LUMA_BASE
- EXYNOS3250_LUMA_STRIDE
- EXYNOS3250_LUMA_XY_OFFSET
- EXYNOS3250_LUMA_YX_OFFSET_MASK
- EXYNOS3250_LUMA_YX_OFFSET_SHIFT
- EXYNOS3250_LUMA_YY_OFFSET_MASK
- EXYNOS3250_LUMA_YY_OFFSET_SHIFT
- EXYNOS3250_MODE_SEL_420_2P
- EXYNOS3250_MODE_SEL_420_3P
- EXYNOS3250_MODE_SEL_422_1P_CHR_LUM
- EXYNOS3250_MODE_SEL_422_1P_LUM_CHR
- EXYNOS3250_MODE_SEL_ARGB8888
- EXYNOS3250_MODE_SEL_MASK
- EXYNOS3250_MODE_SEL_RGB565
- EXYNOS3250_MODE_Y16
- EXYNOS3250_MODE_Y16_MASK
- EXYNOS3250_OUTFORM
- EXYNOS3250_OUT_ALPHA_MASK
- EXYNOS3250_OUT_BIG_ENDIAN
- EXYNOS3250_OUT_BIG_ENDIAN_MASK
- EXYNOS3250_OUT_FMT_420_2P
- EXYNOS3250_OUT_FMT_420_3P
- EXYNOS3250_OUT_FMT_422_1P_CHR_LUM
- EXYNOS3250_OUT_FMT_422_1P_LUM_CHR
- EXYNOS3250_OUT_FMT_ARGB8888
- EXYNOS3250_OUT_FMT_MASK
- EXYNOS3250_OUT_FMT_RGB565
- EXYNOS3250_OUT_NV12
- EXYNOS3250_OUT_NV21
- EXYNOS3250_OUT_NV_MASK
- EXYNOS3250_OUT_SWAP_RGB
- EXYNOS3250_OUT_SWAP_UV
- EXYNOS3250_OUT_TILE_EN
- EXYNOS3250_POWER_ON
- EXYNOS3250_PROC_MODE_COMPR
- EXYNOS3250_PROC_MODE_DECOMPR
- EXYNOS3250_PROC_MODE_MASK
- EXYNOS3250_QHTBL
- EXYNOS3250_QT_NUM_MASK
- EXYNOS3250_QT_NUM_SHIFT
- EXYNOS3250_RDMA_DONE
- EXYNOS3250_RDMA_DONE_EN
- EXYNOS3250_RDMA_ISSUE_NUM_MASK
- EXYNOS3250_RDMA_ISSUE_NUM_SHIFT
- EXYNOS3250_RDMA_OPER_STATUS
- EXYNOS3250_RESULT_STAT
- EXYNOS3250_SOC_ID
- EXYNOS3250_SRC_BIG_ENDIAN
- EXYNOS3250_SRC_BIG_ENDIAN_MASK
- EXYNOS3250_SRC_NV12
- EXYNOS3250_SRC_NV21
- EXYNOS3250_SRC_NV_MASK
- EXYNOS3250_SRC_SWAP_RGB
- EXYNOS3250_SRC_SWAP_UV
- EXYNOS3250_SRC_TILE_EN
- EXYNOS3250_SRC_TILE_EN_MASK
- EXYNOS3250_STREAM_STAT
- EXYNOS3250_SUBSAMPLING_MODE_411
- EXYNOS3250_SUBSAMPLING_MODE_420
- EXYNOS3250_SUBSAMPLING_MODE_422
- EXYNOS3250_SUBSAMPLING_MODE_444
- EXYNOS3250_SUBSAMPLING_MODE_GRAY
- EXYNOS3250_SUBSAMPLING_MODE_MASK
- EXYNOS3250_SW_RESET
- EXYNOS3250_TIMER_CNT_MASK
- EXYNOS3250_TIMER_CNT_SHIFT
- EXYNOS3250_TIMER_INIT_MASK
- EXYNOS3250_TIMER_INT_EN
- EXYNOS3250_TIMER_INT_EN_SHIFT
- EXYNOS3250_TIMER_INT_STAT
- EXYNOS3250_TIMER_INT_STAT_SHIFT
- EXYNOS3250_TIMER_SE
- EXYNOS3250_TIMER_ST
- EXYNOS3250_VERSION
- EXYNOS3250_WDMA_DONE
- EXYNOS3250_WDMA_DONE_EN
- EXYNOS3250_WDMA_ISSUE_NUM_MASK
- EXYNOS3250_WDMA_ISSUE_NUM_SHIFT
- EXYNOS3250_WDMA_OPER_STATUS
- EXYNOS3_APLL_SYSCLK_SYS_PWR_REG
- EXYNOS3_ARM_COMMON_OPTION
- EXYNOS3_ARM_COMMON_SYS_PWR_REG
- EXYNOS3_ARM_CORE0_OPTION
- EXYNOS3_ARM_CORE0_SYS_PWR_REG
- EXYNOS3_ARM_CORE1_SYS_PWR_REG
- EXYNOS3_ARM_CORE_OPTION
- EXYNOS3_ARM_L2_OPTION
- EXYNOS3_ARM_L2_SYS_PWR_REG
- EXYNOS3_BPLLUSER_SYSCLK_SYS_PWR_REG
- EXYNOS3_BPLL_SYSCLK_SYS_PWR_REG
- EXYNOS3_CAM_SYS_PWR_REG
- EXYNOS3_CMU_ACLKSTOP_COREBLK_SYS_PWR_REG
- EXYNOS3_CMU_ACLKSTOP_SYS_PWR_REG
- EXYNOS3_CMU_CLKSTOP_CAM_SYS_PWR_REG
- EXYNOS3_CMU_CLKSTOP_G3D_SYS_PWR_REG
- EXYNOS3_CMU_CLKSTOP_ISP_SYS_PWR_REG
- EXYNOS3_CMU_CLKSTOP_LCD0_SYS_PWR_REG
- EXYNOS3_CMU_CLKSTOP_MAUDIO_SYS_PWR_REG
- EXYNOS3_CMU_CLKSTOP_MFC_SYS_PWR_REG
- EXYNOS3_CMU_RESET_CAM_SYS_PWR_REG
- EXYNOS3_CMU_RESET_COREBLK_SYS_PWR_REG
- EXYNOS3_CMU_RESET_G3D_SYS_PWR_REG
- EXYNOS3_CMU_RESET_ISP_SYS_PWR_REG
- EXYNOS3_CMU_RESET_LCD0_SYS_PWR_REG
- EXYNOS3_CMU_RESET_MAUDIO_SYS_PWR_REG
- EXYNOS3_CMU_RESET_MFC_SYS_PWR_REG
- EXYNOS3_CMU_RESET_SYS_PWR_REG
- EXYNOS3_CMU_SCLKSTOP_COREBLK_SYS_PWR_REG
- EXYNOS3_CMU_SCLKSTOP_SYS_PWR_REG
- EXYNOS3_CMU_SYSCLK_ISP_SYS_PWR_REG
- EXYNOS3_CORE_TOP_PWR_OPTION
- EXYNOS3_DDRPHY_DLLOFF_SYS_PWR_REG
- EXYNOS3_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG
- EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG
- EXYNOS3_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG
- EXYNOS3_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG
- EXYNOS3_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG
- EXYNOS3_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG
- EXYNOS3_DRAM_FREQ_DOWN_SYS_PWR_REG
- EXYNOS3_EPLLUSER_SYSCLK_SYS_PWR_REG
- EXYNOS3_EPLL_SYSCLK_SYS_PWR_REG
- EXYNOS3_EXT_REGULATOR_COREBLK_DURATION
- EXYNOS3_EXT_REGULATOR_COREBLK_SYS_PWR_REG
- EXYNOS3_EXT_REGULATOR_DURATION
- EXYNOS3_EXT_REGULATOR_SYS_PWR_REG
- EXYNOS3_G3D_SYS_PWR_REG
- EXYNOS3_GPIO_MODE_MAUDIO_SYS_PWR_REG
- EXYNOS3_GPIO_MODE_SYS_PWR_REG
- EXYNOS3_ISP_ARM_SYS_PWR_REG
- EXYNOS3_ISP_SYS_PWR_REG
- EXYNOS3_LCD0_SYS_PWR_REG
- EXYNOS3_LOGIC_RESET_COREBLK_SYS_PWR_REG
- EXYNOS3_LOGIC_RESET_SYS_PWR_REG
- EXYNOS3_LPDDR_PHY_DLL_LOCK_SYS_PWR_REG
- EXYNOS3_MAUDIO_SYS_PWR_REG
- EXYNOS3_MFC_SYS_PWR_REG
- EXYNOS3_MPLLUSER_SYSCLK_SYS_PWR_REG
- EXYNOS3_MPLL_SYSCLK_SYS_PWR_REG
- EXYNOS3_OPTION_SKIP_DEACTIVATE_ACEACP_IN_PWDN
- EXYNOS3_OPTION_USE_SC_COUNTER
- EXYNOS3_OPTION_USE_SC_FEEDBACK
- EXYNOS3_OSCCLK_GATE_COREBLK_SYS_PWR_REG
- EXYNOS3_OSCCLK_GATE_SYS_PWR_REG
- EXYNOS3_PAD_ALV_SEL_SYS_PWR_REG
- EXYNOS3_PAD_ISOLATION_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_DRAM_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_EBIA_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_EBIB_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_GPIO_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_JTAG_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_MAUDIO_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_MMC0_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_MMC1_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_MMC2_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_SPI_SYS_PWR_REG
- EXYNOS3_PAD_RETENTION_UART_SYS_PWR_REG
- EXYNOS3_SOC_MASK
- EXYNOS3_TOP_ASB_ISOLATION_COREBLK_SYS_PWR_REG
- EXYNOS3_TOP_ASB_ISOLATION_SYS_PWR_REG
- EXYNOS3_TOP_ASB_RESET_COREBLK_SYS_PWR_REG
- EXYNOS3_TOP_ASB_RESET_SYS_PWR_REG
- EXYNOS3_TOP_BUS_COREBLK_SYS_PWR_REG
- EXYNOS3_TOP_BUS_SYS_PWR_REG
- EXYNOS3_TOP_PWR_COREBLK_SYS_PWR_REG
- EXYNOS3_TOP_PWR_OPTION
- EXYNOS3_TOP_PWR_SYS_PWR_REG
- EXYNOS3_TOP_RETENTION_COREBLK_SYS_PWR_REG
- EXYNOS3_TOP_RETENTION_SYS_PWR_REG
- EXYNOS3_UPLL_SYSCLK_SYS_PWR_REG
- EXYNOS3_VPLL_SYSCLK_SYS_PWR_REG
- EXYNOS3_XUSBXTI_DURATION
- EXYNOS3_XUSBXTI_SYS_PWR_REG
- EXYNOS3_XXTI_DURATION
- EXYNOS3_XXTI_SYS_PWR_REG
- EXYNOS4210
- EXYNOS4210_CPU_ID
- EXYNOS4210_DEVICE
- EXYNOS4210_FIXED_CIU_CLK_DIV
- EXYNOS4210_HOST
- EXYNOS4210_HSIC0
- EXYNOS4210_HSIC1
- EXYNOS4210_NUM_PHYS
- EXYNOS4210_REV_0
- EXYNOS4210_REV_1_0
- EXYNOS4210_REV_1_1
- EXYNOS4210_SERIAL_DRV_DATA
- EXYNOS4210_TMU_REG_THRESHOLD_TEMP
- EXYNOS4210_TMU_REG_TRIG_LEVEL0
- EXYNOS4412_CPU_ID
- EXYNOS4412_FIXED_CIU_CLK_DIV
- EXYNOS4412_MUX_ADDR_SHIFT
- EXYNOS4412_MUX_ADDR_VALUE
- EXYNOS4X12
- EXYNOS4_AUTO_RST_MARKER
- EXYNOS4_BITSTREAM_SIZE_REG
- EXYNOS4_CLKOUT_MUX_MASK
- EXYNOS4_CPU_MASK
- EXYNOS4_DECODED_IMG_FMT_MASK
- EXYNOS4_DECODED_SIZE_MASK
- EXYNOS4_DECODE_IMG_FMT_REG
- EXYNOS4_DECODE_XY_SIZE_REG
- EXYNOS4_DEC_GRAY_IMG
- EXYNOS4_DEC_INVALID_FORMAT_EN
- EXYNOS4_DEC_MODE
- EXYNOS4_DEC_RGB_IMG
- EXYNOS4_DEC_YUV_420_IMG
- EXYNOS4_DEC_YUV_422_IMG
- EXYNOS4_DEC_YUV_444_IMG
- EXYNOS4_ENC_DEC_MODE_MASK
- EXYNOS4_ENC_FMT_GRAY
- EXYNOS4_ENC_FMT_MASK
- EXYNOS4_ENC_FMT_SHIFT
- EXYNOS4_ENC_FMT_YUV_420
- EXYNOS4_ENC_FMT_YUV_422
- EXYNOS4_ENC_FMT_YUV_444
- EXYNOS4_ENC_GRAY_IMG
- EXYNOS4_ENC_IN_FMT_MASK
- EXYNOS4_ENC_MODE
- EXYNOS4_ENC_RGB_IMG
- EXYNOS4_ENC_YUV_422_IMG
- EXYNOS4_ENC_YUV_440_IMG
- EXYNOS4_ENC_YUV_444_IMG
- EXYNOS4_FIFO_STATUS_REG
- EXYNOS4_FRAME_ERR_EN
- EXYNOS4_GRAY_IMG_IP
- EXYNOS4_GRAY_IMG_IP_MASK
- EXYNOS4_GRAY_IMG_IP_SHIFT
- EXYNOS4_HOR_SCALING
- EXYNOS4_HOR_SCALING_MASK
- EXYNOS4_HOR_SCALING_SHIFT
- EXYNOS4_HUFF_CNT_REG
- EXYNOS4_HUFF_COUNT_MASK
- EXYNOS4_HUFF_TBL_COMP
- EXYNOS4_HUFF_TBL_COMP1_AC_0_DC_0
- EXYNOS4_HUFF_TBL_COMP1_AC_0_DC_1
- EXYNOS4_HUFF_TBL_COMP1_AC_1_DC_0
- EXYNOS4_HUFF_TBL_COMP1_AC_1_DC_1
- EXYNOS4_HUFF_TBL_COMP2_AC_0_DC_0
- EXYNOS4_HUFF_TBL_COMP2_AC_0_DC_1
- EXYNOS4_HUFF_TBL_COMP2_AC_1_DC_0
- EXYNOS4_HUFF_TBL_COMP2_AC_1_DC_1
- EXYNOS4_HUFF_TBL_COMP3_AC_0_DC_0
- EXYNOS4_HUFF_TBL_COMP3_AC_0_DC_1
- EXYNOS4_HUFF_TBL_COMP3_AC_1_DC_0
- EXYNOS4_HUFF_TBL_COMP3_AC_1_DC_1
- EXYNOS4_HUFF_TBL_ENTRY_REG
- EXYNOS4_HUFF_TBL_HACCL
- EXYNOS4_HUFF_TBL_HACCV
- EXYNOS4_HUFF_TBL_HACLL
- EXYNOS4_HUFF_TBL_HACLV
- EXYNOS4_HUFF_TBL_HDCCL
- EXYNOS4_HUFF_TBL_HDCCV
- EXYNOS4_HUFF_TBL_HDCLL
- EXYNOS4_HUFF_TBL_HDCLV
- EXYNOS4_HUF_TBL_EN
- EXYNOS4_IMG_BA_PLANE_1_REG
- EXYNOS4_IMG_BA_PLANE_2_REG
- EXYNOS4_IMG_BA_PLANE_3_REG
- EXYNOS4_IMG_COMPLETION_INT_EN
- EXYNOS4_IMG_FMT_REG
- EXYNOS4_IMG_PO_PLANE_1_REG
- EXYNOS4_IMG_PO_PLANE_2_REG
- EXYNOS4_IMG_PO_PLANE_3_REG
- EXYNOS4_IMG_SO_PLANE_1_REG
- EXYNOS4_IMG_SO_PLANE_2_REG
- EXYNOS4_IMG_SO_PLANE_3_REG
- EXYNOS4_INT_EN_ALL
- EXYNOS4_INT_EN_MASK
- EXYNOS4_INT_EN_REG
- EXYNOS4_INT_STATUS_REG
- EXYNOS4_INT_TIMER_COUNT_REG
- EXYNOS4_JPEG_CNTL_REG
- EXYNOS4_JPEG_DECODED_IMG_FMT_MASK
- EXYNOS4_JPEG_IMG_SIZE_REG
- EXYNOS4_MCTREG
- EXYNOS4_MCT_G_CNT_L
- EXYNOS4_MCT_G_CNT_U
- EXYNOS4_MCT_G_CNT_WSTAT
- EXYNOS4_MCT_G_COMP0_ADD_INCR
- EXYNOS4_MCT_G_COMP0_L
- EXYNOS4_MCT_G_COMP0_U
- EXYNOS4_MCT_G_INT_CSTAT
- EXYNOS4_MCT_G_INT_ENB
- EXYNOS4_MCT_G_TCON
- EXYNOS4_MCT_G_WSTAT
- EXYNOS4_MCT_L_BASE
- EXYNOS4_MCT_L_MASK
- EXYNOS4_MIPI_PHY_CONTROL
- EXYNOS4_MIPI_PHY_MRESETN
- EXYNOS4_MIPI_PHY_RESET_MASK
- EXYNOS4_MIPI_PHY_SRESETN
- EXYNOS4_MOD_REG_PROC_DEC
- EXYNOS4_MOD_REG_PROC_ENC
- EXYNOS4_MOD_REG_SUBSAMPLE_420
- EXYNOS4_MOD_REG_SUBSAMPLE_422
- EXYNOS4_MOD_REG_SUBSAMPLE_444
- EXYNOS4_MOD_REG_SUBSAMPLE_GRAY
- EXYNOS4_MULTI_SCAN_ERROR_EN
- EXYNOS4_NF
- EXYNOS4_NF_MASK
- EXYNOS4_NF_SHIFT
- EXYNOS4_OUT_MEM_BASE_REG
- EXYNOS4_PADDING
- EXYNOS4_PADDING_REG
- EXYNOS4_PA_UART
- EXYNOS4_PHY_ENABLE
- EXYNOS4_PIN_DRV_LV1
- EXYNOS4_PIN_DRV_LV2
- EXYNOS4_PIN_DRV_LV3
- EXYNOS4_PIN_DRV_LV4
- EXYNOS4_PROT_ERR_INT_EN
- EXYNOS4_QTBL_CONTENT
- EXYNOS4_QUAN_TBL_ENTRY_REG
- EXYNOS4_Q_TBL_COMP
- EXYNOS4_Q_TBL_COMP1_0
- EXYNOS4_Q_TBL_COMP1_1
- EXYNOS4_Q_TBL_COMP1_2
- EXYNOS4_Q_TBL_COMP1_3
- EXYNOS4_Q_TBL_COMP2_0
- EXYNOS4_Q_TBL_COMP2_1
- EXYNOS4_Q_TBL_COMP2_2
- EXYNOS4_Q_TBL_COMP2_3
- EXYNOS4_Q_TBL_COMP3_0
- EXYNOS4_Q_TBL_COMP3_1
- EXYNOS4_Q_TBL_COMP3_2
- EXYNOS4_Q_TBL_COMP3_3
- EXYNOS4_RGB_IP_MASK
- EXYNOS4_RGB_IP_RGB_16BIT_IMG
- EXYNOS4_RGB_IP_RGB_32BIT_IMG
- EXYNOS4_RGB_IP_SHIFT
- EXYNOS4_RST_INTERVAL
- EXYNOS4_RST_INTERVAL_SHIFT
- EXYNOS4_SOFT_RESET_HI
- EXYNOS4_SWAP_CHROMA_CBCR
- EXYNOS4_SWAP_CHROMA_CRCB
- EXYNOS4_SYS_INT_EN
- EXYNOS4_TBL_SEL_REG
- EXYNOS4_VER_SCALING
- EXYNOS4_VER_SCALING_MASK
- EXYNOS4_VER_SCALING_SHIFT
- EXYNOS4_X_SIZE
- EXYNOS4_X_SIZE_MASK
- EXYNOS4_X_SIZE_SHIFT
- EXYNOS4_YUV_420_IP_MASK
- EXYNOS4_YUV_420_IP_SHIFT
- EXYNOS4_YUV_420_IP_YUV_420_2P_IMG
- EXYNOS4_YUV_420_IP_YUV_420_3P_IMG
- EXYNOS4_YUV_422_IP_MASK
- EXYNOS4_YUV_422_IP_SHIFT
- EXYNOS4_YUV_422_IP_YUV_422_1P_IMG
- EXYNOS4_YUV_422_IP_YUV_422_2P_IMG
- EXYNOS4_YUV_422_IP_YUV_422_3P_IMG
- EXYNOS4_YUV_444_IP_MASK
- EXYNOS4_YUV_444_IP_SHIFT
- EXYNOS4_YUV_444_IP_YUV_444_2P_IMG
- EXYNOS4_YUV_444_IP_YUV_444_3P_IMG
- EXYNOS4_Y_SIZE
- EXYNOS4_Y_SIZE_MASK
- EXYNOS4_Y_SIZE_SHIFT
- EXYNOS4x12_DEVICE
- EXYNOS4x12_HOST
- EXYNOS4x12_HSIC0
- EXYNOS4x12_HSIC1
- EXYNOS4x12_NUM_PHYS
- EXYNOS5250_DEVICE
- EXYNOS5250_HOST
- EXYNOS5250_HSIC0
- EXYNOS5250_HSIC1
- EXYNOS5250_NUM_PHYS
- EXYNOS5250_SOC_ID
- EXYNOS5260_EMUL_CON
- EXYNOS5260_PIN_DRV_LV1
- EXYNOS5260_PIN_DRV_LV2
- EXYNOS5260_PIN_DRV_LV4
- EXYNOS5260_PIN_DRV_LV6
- EXYNOS5260_TMU_REG_INTCLEAR
- EXYNOS5260_TMU_REG_INTEN
- EXYNOS5260_TMU_REG_INTSTAT
- EXYNOS5410_SOC_ID
- EXYNOS5420
- EXYNOS5420_ARM_COMMON_OPTION
- EXYNOS5420_ARM_COMMON_SYS_PWR_REG
- EXYNOS5420_ARM_CORE2_SYS_PWR_REG
- EXYNOS5420_ARM_CORE3_SYS_PWR_REG
- EXYNOS5420_ARM_INTR_SPREAD_ENABLE
- EXYNOS5420_ARM_INTR_SPREAD_USE_STANDBYWFI
- EXYNOS5420_ARM_USE_STANDBY_WFE0
- EXYNOS5420_ARM_USE_STANDBY_WFE1
- EXYNOS5420_ARM_USE_STANDBY_WFE2
- EXYNOS5420_ARM_USE_STANDBY_WFE3
- EXYNOS5420_ARM_USE_STANDBY_WFI0
- EXYNOS5420_ARM_USE_STANDBY_WFI1
- EXYNOS5420_ARM_USE_STANDBY_WFI2
- EXYNOS5420_ARM_USE_STANDBY_WFI3
- EXYNOS5420_ATB_ISP_ARM
- EXYNOS5420_ATB_KFC
- EXYNOS5420_CMU_CLKSTOP_DISP1_SYS_PWR_REG
- EXYNOS5420_CMU_CLKSTOP_FSYS2_SYS_PWR_REG
- EXYNOS5420_CMU_CLKSTOP_FSYS_SYS_PWR_REG
- EXYNOS5420_CMU_CLKSTOP_G2D_SYS_PWR_REG
- EXYNOS5420_CMU_CLKSTOP_MAU_SYS_PWR_REG
- EXYNOS5420_CMU_CLKSTOP_MSC_SYS_PWR_REG
- EXYNOS5420_CMU_CLKSTOP_PERIC_SYS_PWR_REG
- EXYNOS5420_CMU_CLKSTOP_PSGEN_SYS_PWR_REG
- EXYNOS5420_CMU_CLKSTOP_WCORE_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_DISP1_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_FSYS2_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_FSYS_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_G2D_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_MAU_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_MSC_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_PERIC_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_PSGEN_SYS_PWR_REG
- EXYNOS5420_CMU_RESET_WCORE_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_DISP1_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_FSYS2_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_FSYS_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_G2D_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_MAU_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_MSC_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_PERIC_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_PSGEN_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_SYSMEM_TOPPWR_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_TOPPWR_SYS_PWR_REG
- EXYNOS5420_CMU_SYSCLK_WCORE_SYS_PWR_REG
- EXYNOS5420_CPUS_PER_CLUSTER
- EXYNOS5420_CPU_STATE
- EXYNOS5420_DISP1_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_ARM_CORE3_CENTRAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_ARM_CORE3_LOCAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_KFC_CORE0_CENTRAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_KFC_CORE0_LOCAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_KFC_CORE1_CENTRAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_KFC_CORE1_LOCAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_KFC_CORE2_CENTRAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_KFC_CORE2_LOCAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_KFC_CORE3_CENTRAL_SYS_PWR_REG
- EXYNOS5420_DIS_IRQ_KFC_CORE3_LOCAL_SYS_PWR_REG
- EXYNOS5420_DPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5420_DPTX_PHY_CONTROL
- EXYNOS5420_EMULATION
- EXYNOS5420_ENABLE_AUTOMATIC_CORE_DOWN
- EXYNOS5420_FSYS2_OPTION
- EXYNOS5420_FSYS2_SYS_PWR_REG
- EXYNOS5420_FSYS_SYS_PWR_REG
- EXYNOS5420_G2D_SYS_PWR_REG
- EXYNOS5420_INTRAM_MEM_SYS_PWR_REG
- EXYNOS5420_INTROM_MEM_SYS_PWR_REG
- EXYNOS5420_IPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5420_ISP_ARM_SYS_PWR_REG
- EXYNOS5420_KFC_COMMON_OPTION
- EXYNOS5420_KFC_COMMON_SYS_PWR_REG
- EXYNOS5420_KFC_CORE0_SYS_PWR_REG
- EXYNOS5420_KFC_CORE1_SYS_PWR_REG
- EXYNOS5420_KFC_CORE2_SYS_PWR_REG
- EXYNOS5420_KFC_CORE3_SYS_PWR_REG
- EXYNOS5420_KFC_CORE_RESET
- EXYNOS5420_KFC_CORE_RESET0
- EXYNOS5420_KFC_ETM_RESET0
- EXYNOS5420_KFC_L2_SYS_PWR_REG
- EXYNOS5420_KFC_USE_STANDBY_WFE0
- EXYNOS5420_KFC_USE_STANDBY_WFE1
- EXYNOS5420_KFC_USE_STANDBY_WFE2
- EXYNOS5420_KFC_USE_STANDBY_WFE3
- EXYNOS5420_KFC_USE_STANDBY_WFI0
- EXYNOS5420_KFC_USE_STANDBY_WFI1
- EXYNOS5420_KFC_USE_STANDBY_WFI2
- EXYNOS5420_KFC_USE_STANDBY_WFI3
- EXYNOS5420_KPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5420_L2RSTDISABLE_VALUE
- EXYNOS5420_LOGIC_RESET_DURATION3
- EXYNOS5420_LPI_MASK
- EXYNOS5420_LPI_MASK1
- EXYNOS5420_MAU_SYS_PWR_REG
- EXYNOS5420_MIPI_PHY_CONTROL
- EXYNOS5420_MOD_BCLK_128FS
- EXYNOS5420_MOD_BCLK_192FS
- EXYNOS5420_MOD_BCLK_256FS
- EXYNOS5420_MOD_BCLK_64FS
- EXYNOS5420_MOD_BCLK_96FS
- EXYNOS5420_MOD_BCLK_MASK
- EXYNOS5420_MOD_BCLK_SHIFT
- EXYNOS5420_MOD_LRP_SHIFT
- EXYNOS5420_MOD_RCLK_SHIFT
- EXYNOS5420_MOD_SDF_SHIFT
- EXYNOS5420_MSC_SYS_PWR_REG
- EXYNOS5420_NR_CLUSTERS
- EXYNOS5420_PAD_RETENTION_DRAM_COREBLK_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_DRAM_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_EBIA_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_EBIB_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_HSI_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_JTAG_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_MMC0_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_MMC1_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_MMC2_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_SPI_SYS_PWR_REG
- EXYNOS5420_PAD_RETENTION_UART_SYS_PWR_REG
- EXYNOS5420_PAD_RET_DRAM_COREBLK_OPTION
- EXYNOS5420_PAD_RET_GPIO_OPTION
- EXYNOS5420_PAD_RET_HSI_OPTION
- EXYNOS5420_PAD_RET_MMCA_OPTION
- EXYNOS5420_PAD_RET_MMCB_OPTION
- EXYNOS5420_PAD_RET_MMCC_OPTION
- EXYNOS5420_PAD_RET_SPI_OPTION
- EXYNOS5420_PAD_RET_UART_OPTION
- EXYNOS5420_PERIC_SYS_PWR_REG
- EXYNOS5420_PIN_DRV_LV1
- EXYNOS5420_PIN_DRV_LV2
- EXYNOS5420_PIN_DRV_LV3
- EXYNOS5420_PIN_DRV_LV4
- EXYNOS5420_PSGEN_OPTION
- EXYNOS5420_PSGEN_SYS_PWR_REG
- EXYNOS5420_RPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5420_SFR_AXI_CGDIS1
- EXYNOS5420_SOC_ID
- EXYNOS5420_SPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5420_SWRESET_KFC_SEL
- EXYNOS5420_UFS
- EXYNOS5420_UP_SCHEDULER
- EXYNOS5420_USBDRD1_PHY_CONTROL
- EXYNOS5420_USE_ARM_CORE_DOWN_STATE
- EXYNOS5420_USE_L2_COMMON_UP_STATE
- EXYNOS5420_USE_STANDBY_WFI_ALL
- EXYNOS5420_WCORE_SYS_PWR_REG
- EXYNOS5422_ARM_DN_MASK
- EXYNOS5422_ARM_DN_OFFSET
- EXYNOS5422_ARM_UP_MASK
- EXYNOS5422_ARM_UP_OFFSET
- EXYNOS5422_BIN2_MASK
- EXYNOS5422_BIN2_OFFSET
- EXYNOS5422_IDS_MASK
- EXYNOS5422_IDS_OFFSET
- EXYNOS5422_KFC_DN_MASK
- EXYNOS5422_KFC_DN_OFFSET
- EXYNOS5422_KFC_UP_MASK
- EXYNOS5422_KFC_UP_OFFSET
- EXYNOS5422_SG_A_MASK
- EXYNOS5422_SG_A_OFFSET
- EXYNOS5422_SG_BSIGN_MASK
- EXYNOS5422_SG_BSIGN_OFFSET
- EXYNOS5422_SG_B_MASK
- EXYNOS5422_SG_B_OFFSET
- EXYNOS5422_SG_MASK
- EXYNOS5422_SG_OFFSET
- EXYNOS5422_TABLE_MASK
- EXYNOS5422_TABLE_OFFSET
- EXYNOS5422_TMCB_MASK
- EXYNOS5422_TMCB_OFFSET
- EXYNOS5422_USESG_MASK
- EXYNOS5422_USESG_OFFSET
- EXYNOS5433_EINT_WAKEUP_MASK
- EXYNOS5433_ENC_FMT_MASK
- EXYNOS5433_G3D_BASE
- EXYNOS5433_INT_EN_ALL
- EXYNOS5433_INT_EN_MASK
- EXYNOS5433_PAD_RETENTION_AUD_OPTION
- EXYNOS5433_PAD_RETENTION_BOOTLDO_OPTION
- EXYNOS5433_PAD_RETENTION_EBIA_OPTION
- EXYNOS5433_PAD_RETENTION_EBIB_OPTION
- EXYNOS5433_PAD_RETENTION_FSYSGENIO_OPTION
- EXYNOS5433_PAD_RETENTION_MIF_OPTION
- EXYNOS5433_PAD_RETENTION_MMC0_OPTION
- EXYNOS5433_PAD_RETENTION_MMC1_OPTION
- EXYNOS5433_PAD_RETENTION_MMC2_OPTION
- EXYNOS5433_PAD_RETENTION_SPI_OPTION
- EXYNOS5433_PAD_RETENTION_TOP_OPTION
- EXYNOS5433_PAD_RETENTION_UART_OPTION
- EXYNOS5433_PAD_RETENTION_UFS_OPTION
- EXYNOS5433_PAD_RETENTION_USBXTI_OPTION
- EXYNOS5433_PD_DET_EN
- EXYNOS5433_PIN_BANK_EINTG
- EXYNOS5433_PIN_BANK_EINTW
- EXYNOS5433_PIN_BANK_EINTW_EXT
- EXYNOS5433_PIN_DRV_FAST_SR1
- EXYNOS5433_PIN_DRV_FAST_SR2
- EXYNOS5433_PIN_DRV_FAST_SR3
- EXYNOS5433_PIN_DRV_FAST_SR4
- EXYNOS5433_PIN_DRV_FAST_SR5
- EXYNOS5433_PIN_DRV_FAST_SR6
- EXYNOS5433_PIN_DRV_SLOW_SR1
- EXYNOS5433_PIN_DRV_SLOW_SR2
- EXYNOS5433_PIN_DRV_SLOW_SR3
- EXYNOS5433_PIN_DRV_SLOW_SR4
- EXYNOS5433_PIN_DRV_SLOW_SR5
- EXYNOS5433_PIN_DRV_SLOW_SR6
- EXYNOS5433_SERIAL_DRV_DATA
- EXYNOS5433_SWAP_CHROMA_CBCR
- EXYNOS5433_SWAP_CHROMA_CRCB
- EXYNOS5433_SYSREG_CAM0_MIPI_DPHY_CON
- EXYNOS5433_SYSREG_CAM1_MIPI_DPHY_CON
- EXYNOS5433_SYSREG_DISP_HDMI_PHY
- EXYNOS5433_SYSREG_DISP_MIPI_PHY
- EXYNOS5433_THD_TEMP_FALL3_0
- EXYNOS5433_THD_TEMP_FALL7_4
- EXYNOS5433_THD_TEMP_RISE3_0
- EXYNOS5433_THD_TEMP_RISE7_4
- EXYNOS5433_TMU_EMUL_CON
- EXYNOS5433_TMU_PD_DET_EN
- EXYNOS5433_TMU_REG_INTEN
- EXYNOS5433_TMU_REG_INTPEND
- EXYNOS5433_TRIMINFO_CALIB_SEL_MASK
- EXYNOS5433_TRIMINFO_CALIB_SEL_SHIFT
- EXYNOS5433_TRIMINFO_ONE_POINT_TRIMMING
- EXYNOS5433_TRIMINFO_SENSOR_ID_MASK
- EXYNOS5433_TRIMINFO_SENSOR_ID_SHIFT
- EXYNOS5433_TRIMINFO_TWO_POINT_TRIMMING
- EXYNOS5433_USBHOST30_PHY_CONTROL
- EXYNOS5800
- EXYNOS5800_SOC_ID
- EXYNOS5_APLL_SYSCLK_SYS_PWR_REG
- EXYNOS5_ARM_COMMON_OPTION
- EXYNOS5_ARM_COMMON_SYS_PWR_REG
- EXYNOS5_ARM_CORE0_OPTION
- EXYNOS5_ARM_CORE0_SYS_PWR_REG
- EXYNOS5_ARM_CORE1_OPTION
- EXYNOS5_ARM_CORE1_SYS_PWR_REG
- EXYNOS5_ARM_L2_OPTION
- EXYNOS5_ARM_L2_SYS_PWR_REG
- EXYNOS5_AUTO_WDTRESET_DISABLE
- EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG
- EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5_CLKOUT_MUX_MASK
- EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG
- EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG
- EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG
- EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG
- EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG
- EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG
- EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG
- EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG
- EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG
- EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG
- EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG
- EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG
- EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG
- EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG
- EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG
- EXYNOS5_CMU_RESET_SYS_PWR_REG
- EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG
- EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG
- EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG
- EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG
- EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG
- EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG
- EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG
- EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG
- EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5_CSSYS_MEM_SYS_PWR_REG
- EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG
- EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG
- EXYNOS5_DISP1_OPTION
- EXYNOS5_DISP1_SYS_PWR_REG
- EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG
- EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG
- EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG
- EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG
- EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG
- EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG
- EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG
- EXYNOS5_DPTX_PHY_CONTROL
- EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG
- EXYNOS5_DRDPHYS_NUM
- EXYNOS5_DRDPHY_PIPE3
- EXYNOS5_DRDPHY_UTMI
- EXYNOS5_DRD_LINKPORT
- EXYNOS5_DRD_LINKSYSTEM
- EXYNOS5_DRD_PHYADP
- EXYNOS5_DRD_PHYCLKRST
- EXYNOS5_DRD_PHYPARAM0
- EXYNOS5_DRD_PHYPARAM1
- EXYNOS5_DRD_PHYPIPE
- EXYNOS5_DRD_PHYREG0
- EXYNOS5_DRD_PHYREG1
- EXYNOS5_DRD_PHYRESUME
- EXYNOS5_DRD_PHYSS_LANE0_TX_DEBUG
- EXYNOS5_DRD_PHYSS_LOSLEVEL_OVRD_IN
- EXYNOS5_DRD_PHYSS_TX_VBOOSTLEVEL_OVRD_IN
- EXYNOS5_DRD_PHYTERM
- EXYNOS5_DRD_PHYTEST
- EXYNOS5_DRD_PHYUTMI
- EXYNOS5_DRD_PHYUTMICLKSEL
- EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5_EXT_REGULATOR_SYS_PWR_REG
- EXYNOS5_FSEL_10MHZ
- EXYNOS5_FSEL_12MHZ
- EXYNOS5_FSEL_19MHZ2
- EXYNOS5_FSEL_20MHZ
- EXYNOS5_FSEL_24MHZ
- EXYNOS5_FSEL_50MHZ
- EXYNOS5_FSEL_9MHZ6
- EXYNOS5_FSYS_ARM_OPTION
- EXYNOS5_FSYS_ARM_SYS_PWR_REG
- EXYNOS5_G2D_MEM_SYS_PWR_REG
- EXYNOS5_G3D_OPTION
- EXYNOS5_G3D_SYS_PWR_REG
- EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG
- EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG
- EXYNOS5_GPIO_MODE_SYS_PWR_REG
- EXYNOS5_GSCL_OPTION
- EXYNOS5_GSCL_SYS_PWR_REG
- EXYNOS5_HSI_MEM_SYS_PWR_REG
- EXYNOS5_I2C_TIMEOUT
- EXYNOS5_INTRAM_MEM_SYS_PWR_REG
- EXYNOS5_INTROM_MEM_SYS_PWR_REG
- EXYNOS5_ISP_ARM_OPTION
- EXYNOS5_ISP_ARM_SYS_PWR_REG
- EXYNOS5_ISP_OPTION
- EXYNOS5_ISP_SYS_PWR_REG
- EXYNOS5_JPEG_MEM_OPTION
- EXYNOS5_JPEG_MEM_SYS_PWR_REG
- EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG
- EXYNOS5_LOGIC_RESET_SYS_PWR_REG
- EXYNOS5_MASK_WDTRESET_REQUEST
- EXYNOS5_MAU_OPTION
- EXYNOS5_MAU_SYS_PWR_REG
- EXYNOS5_MCUIOP_MEM_SYS_PWR_REG
- EXYNOS5_MFC_OPTION
- EXYNOS5_MFC_SYS_PWR_REG
- EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG
- EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5_OPTION_USE_RETENTION
- EXYNOS5_OPTION_USE_STANDBYWFE
- EXYNOS5_OPTION_USE_STANDBYWFI
- EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG
- EXYNOS5_OSCCLK_GATE_SYS_PWR_REG
- EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG
- EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG
- EXYNOS5_PAD_ISOLATION_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG
- EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG
- EXYNOS5_PA_UART
- EXYNOS5_ROTATOR_MEM_SYS_PWR_REG
- EXYNOS5_RST_STAT_REG_OFFSET
- EXYNOS5_SATAPHY_PMU_ENABLE
- EXYNOS5_SATA_CTRL0
- EXYNOS5_SATA_MEM_SYS_PWR_REG
- EXYNOS5_SATA_MODE0
- EXYNOS5_SATA_PHSATA_CTRLM
- EXYNOS5_SATA_PHSATA_STATM
- EXYNOS5_SATA_RESET
- EXYNOS5_SDMMC_MEM_SYS_PWR_REG
- EXYNOS5_SECSS_MEM_SYS_PWR_REG
- EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN
- EXYNOS5_SOC_MASK
- EXYNOS5_SYS_I2C_CFG
- EXYNOS5_SYS_WDTRESET
- EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG
- EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG
- EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG
- EXYNOS5_TOP_BUS_SYS_PWR_REG
- EXYNOS5_TOP_PWR_OPTION
- EXYNOS5_TOP_PWR_SYSMEM_OPTION
- EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG
- EXYNOS5_TOP_PWR_SYS_PWR_REG
- EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG
- EXYNOS5_TOP_RETENTION_SYS_PWR_REG
- EXYNOS5_USBDRD_MEM_SYS_PWR_REG
- EXYNOS5_USBDRD_PHY_CONTROL
- EXYNOS5_USBOTG_MEM_SYS_PWR_REG
- EXYNOS5_USE_RETENTION
- EXYNOS5_USE_SC_COUNTER
- EXYNOS5_USE_SC_FEEDBACK
- EXYNOS5_USE_STANDBYWFE_ARM_CORE0
- EXYNOS5_USE_STANDBYWFE_ARM_CORE1
- EXYNOS5_USE_STANDBYWFI_ARM_CORE0
- EXYNOS5_USE_STANDBYWFI_ARM_CORE1
- EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG
- EXYNOS5_WDT_DISABLE_REG_OFFSET
- EXYNOS5_WDT_MASK_RESET_REG_OFFSET
- EXYNOS5_XUSBXTI_SYS_PWR_REG
- EXYNOS5_XXTI_SYS_PWR_REG
- EXYNOS7_EMUL_DATA_MASK
- EXYNOS7_EMUL_DATA_SHIFT
- EXYNOS7_FSYS1_PIN_DRV_LV1
- EXYNOS7_FSYS1_PIN_DRV_LV2
- EXYNOS7_FSYS1_PIN_DRV_LV3
- EXYNOS7_FSYS1_PIN_DRV_LV4
- EXYNOS7_FSYS1_PIN_DRV_LV5
- EXYNOS7_FSYS1_PIN_DRV_LV6
- EXYNOS7_MOD_RCLK_128FS
- EXYNOS7_MOD_RCLK_192FS
- EXYNOS7_MOD_RCLK_64FS
- EXYNOS7_MOD_RCLK_96FS
- EXYNOS7_PD_DET_EN_SHIFT
- EXYNOS7_THD_TEMP_FALL7_6
- EXYNOS7_THD_TEMP_RISE7_6
- EXYNOS7_TMU_INTEN_RISE0_SHIFT
- EXYNOS7_TMU_REG_EMUL_CON
- EXYNOS7_TMU_REG_INTEN
- EXYNOS7_TMU_REG_INTPEND
- EXYNOS7_TMU_TEMP_MASK
- EXYNOS7_WKUP_ECON_OFFSET
- EXYNOS7_WKUP_EMASK_OFFSET
- EXYNOS7_WKUP_EPEND_OFFSET
- EXYNOS_3250_UPHYCLK_REFCLKSEL
- EXYNOS_4210_MODE_SWITCH_DEVICE
- EXYNOS_4210_MODE_SWITCH_HOST
- EXYNOS_4210_MODE_SWITCH_MASK
- EXYNOS_4210_MODE_SWITCH_OFFSET
- EXYNOS_4210_UPHY1CON
- EXYNOS_4210_UPHY1CON_FLOAT_PREVENTION
- EXYNOS_4210_UPHYCLK
- EXYNOS_4210_UPHYCLK_PHY0_COMMON_ON
- EXYNOS_4210_UPHYCLK_PHY0_ID_PULLUP
- EXYNOS_4210_UPHYCLK_PHY1_COMMON_ON
- EXYNOS_4210_UPHYCLK_PHYFSEL_12MHZ
- EXYNOS_4210_UPHYCLK_PHYFSEL_24MHZ
- EXYNOS_4210_UPHYCLK_PHYFSEL_48MHZ
- EXYNOS_4210_UPHYCLK_PHYFSEL_MASK
- EXYNOS_4210_UPHYCLK_PHYFSEL_OFFSET
- EXYNOS_4210_UPHYPWR
- EXYNOS_4210_UPHYPWR_HSIC0
- EXYNOS_4210_UPHYPWR_HSIC0_SLEEP
- EXYNOS_4210_UPHYPWR_HSIC0_SUSPEND
- EXYNOS_4210_UPHYPWR_HSIC1
- EXYNOS_4210_UPHYPWR_HSIC1_SLEEP
- EXYNOS_4210_UPHYPWR_HSIC1_SUSPEND
- EXYNOS_4210_UPHYPWR_PHY0
- EXYNOS_4210_UPHYPWR_PHY0_OTG_PWR
- EXYNOS_4210_UPHYPWR_PHY0_PWR
- EXYNOS_4210_UPHYPWR_PHY0_SLEEP
- EXYNOS_4210_UPHYPWR_PHY0_SUSPEND
- EXYNOS_4210_UPHYPWR_PHY1
- EXYNOS_4210_UPHYPWR_PHY1_PWR
- EXYNOS_4210_UPHYPWR_PHY1_SLEEP
- EXYNOS_4210_UPHYPWR_PHY1_SUSPEND
- EXYNOS_4210_UPHYRST
- EXYNOS_4210_URSTCON_HOST_LINK_ALL
- EXYNOS_4210_URSTCON_HOST_LINK_P0
- EXYNOS_4210_URSTCON_HOST_LINK_P1
- EXYNOS_4210_URSTCON_HOST_LINK_P2
- EXYNOS_4210_URSTCON_OTG_HLINK
- EXYNOS_4210_URSTCON_OTG_PHYLINK
- EXYNOS_4210_URSTCON_PHY0
- EXYNOS_4210_URSTCON_PHY1_ALL
- EXYNOS_4210_URSTCON_PHY1_P0
- EXYNOS_4210_URSTCON_PHY1_P1P2
- EXYNOS_4210_USB_ISOL_DEVICE
- EXYNOS_4210_USB_ISOL_DEVICE_OFFSET
- EXYNOS_4210_USB_ISOL_HOST
- EXYNOS_4210_USB_ISOL_HOST_OFFSET
- EXYNOS_4x12_MODE_SWITCH_DEVICE
- EXYNOS_4x12_MODE_SWITCH_HOST
- EXYNOS_4x12_MODE_SWITCH_MASK
- EXYNOS_4x12_MODE_SWITCH_OFFSET
- EXYNOS_4x12_UPHYCLK
- EXYNOS_4x12_UPHYCLK_HSIC_REFCLK_12MHZ
- EXYNOS_4x12_UPHYCLK_HSIC_REFCLK_15MHZ
- EXYNOS_4x12_UPHYCLK_HSIC_REFCLK_16MHZ
- EXYNOS_4x12_UPHYCLK_HSIC_REFCLK_19MHZ2
- EXYNOS_4x12_UPHYCLK_HSIC_REFCLK_20MHZ
- EXYNOS_4x12_UPHYCLK_HSIC_REFCLK_MASK
- EXYNOS_4x12_UPHYCLK_HSIC_REFCLK_OFFSET
- EXYNOS_4x12_UPHYCLK_PHY0_COMMON_ON
- EXYNOS_4x12_UPHYCLK_PHY0_ID_PULLUP
- EXYNOS_4x12_UPHYCLK_PHY1_COMMON_ON
- EXYNOS_4x12_UPHYCLK_PHYFSEL_10MHZ
- EXYNOS_4x12_UPHYCLK_PHYFSEL_12MHZ
- EXYNOS_4x12_UPHYCLK_PHYFSEL_19MHZ2
- EXYNOS_4x12_UPHYCLK_PHYFSEL_20MHZ
- EXYNOS_4x12_UPHYCLK_PHYFSEL_24MHZ
- EXYNOS_4x12_UPHYCLK_PHYFSEL_50MHZ
- EXYNOS_4x12_UPHYCLK_PHYFSEL_9MHZ6
- EXYNOS_4x12_UPHYCLK_PHYFSEL_MASK
- EXYNOS_4x12_UPHYCLK_PHYFSEL_OFFSET
- EXYNOS_4x12_UPHYPWR
- EXYNOS_4x12_UPHYPWR_HSIC0
- EXYNOS_4x12_UPHYPWR_HSIC0_PWR
- EXYNOS_4x12_UPHYPWR_HSIC0_SLEEP
- EXYNOS_4x12_UPHYPWR_HSIC0_SUSPEND
- EXYNOS_4x12_UPHYPWR_HSIC1
- EXYNOS_4x12_UPHYPWR_HSIC1_PWR
- EXYNOS_4x12_UPHYPWR_HSIC1_SLEEP
- EXYNOS_4x12_UPHYPWR_HSIC1_SUSPEND
- EXYNOS_4x12_UPHYPWR_PHY0
- EXYNOS_4x12_UPHYPWR_PHY0_OTG_PWR
- EXYNOS_4x12_UPHYPWR_PHY0_PWR
- EXYNOS_4x12_UPHYPWR_PHY0_SLEEP
- EXYNOS_4x12_UPHYPWR_PHY0_SUSPEND
- EXYNOS_4x12_UPHYPWR_PHY1
- EXYNOS_4x12_UPHYPWR_PHY1_PWR
- EXYNOS_4x12_UPHYPWR_PHY1_SLEEP
- EXYNOS_4x12_UPHYPWR_PHY1_SUSPEND
- EXYNOS_4x12_UPHYRST
- EXYNOS_4x12_URSTCON_HOST_LINK_ALL
- EXYNOS_4x12_URSTCON_HOST_LINK_P0
- EXYNOS_4x12_URSTCON_HOST_LINK_P1
- EXYNOS_4x12_URSTCON_HOST_LINK_P2
- EXYNOS_4x12_URSTCON_HOST_PHY
- EXYNOS_4x12_URSTCON_HSIC0
- EXYNOS_4x12_URSTCON_HSIC1
- EXYNOS_4x12_URSTCON_OTG_HLINK
- EXYNOS_4x12_URSTCON_OTG_PHYLINK
- EXYNOS_4x12_URSTCON_PHY0
- EXYNOS_4x12_URSTCON_PHY1
- EXYNOS_4x12_USB_ISOL_HSIC0
- EXYNOS_4x12_USB_ISOL_HSIC0_OFFSET
- EXYNOS_4x12_USB_ISOL_HSIC1
- EXYNOS_4x12_USB_ISOL_HSIC1_OFFSET
- EXYNOS_4x12_USB_ISOL_OFFSET
- EXYNOS_4x12_USB_ISOL_OTG
- EXYNOS_5250_FSEL_10MHZ
- EXYNOS_5250_FSEL_12MHZ
- EXYNOS_5250_FSEL_19MHZ2
- EXYNOS_5250_FSEL_20MHZ
- EXYNOS_5250_FSEL_24MHZ
- EXYNOS_5250_FSEL_50MHZ
- EXYNOS_5250_FSEL_9MHZ6
- EXYNOS_5250_HOSTEHCICTRL
- EXYNOS_5250_HOSTEHCICTRL_AUTOPPDONOVRCUREN
- EXYNOS_5250_HOSTEHCICTRL_ENAINCR16
- EXYNOS_5250_HOSTEHCICTRL_ENAINCR4
- EXYNOS_5250_HOSTEHCICTRL_ENAINCR8
- EXYNOS_5250_HOSTEHCICTRL_ENAINCRXALIGN
- EXYNOS_5250_HOSTEHCICTRL_FLADJVAL0_MASK
- EXYNOS_5250_HOSTEHCICTRL_FLADJVAL0_SHIFT
- EXYNOS_5250_HOSTEHCICTRL_FLADJVAL1_MASK
- EXYNOS_5250_HOSTEHCICTRL_FLADJVAL1_SHIFT
- EXYNOS_5250_HOSTEHCICTRL_FLADJVAL2_SHIFT
- EXYNOS_5250_HOSTEHCICTRL_FLADJVALHOST_MASK
- EXYNOS_5250_HOSTEHCICTRL_FLADJVALHOST_SHIFT
- EXYNOS_5250_HOSTEHCICTRL_SIMULATIONMODE
- EXYNOS_5250_HOSTOHCICTRL
- EXYNOS_5250_HOSTOHCICTRL_FRAMELENVALEN
- EXYNOS_5250_HOSTOHCICTRL_FRAMELENVAL_MASK
- EXYNOS_5250_HOSTOHCICTRL_FRAMELENVAL_SHIFT
- EXYNOS_5250_HOSTPHYCTRL0
- EXYNOS_5250_HOSTPHYCTRL0_COMMON_ON_N
- EXYNOS_5250_HOSTPHYCTRL0_FORCESLEEP
- EXYNOS_5250_HOSTPHYCTRL0_FORCESUSPEND
- EXYNOS_5250_HOSTPHYCTRL0_FSEL_MASK
- EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT
- EXYNOS_5250_HOSTPHYCTRL0_LINKSWRST
- EXYNOS_5250_HOSTPHYCTRL0_PHYSWRST
- EXYNOS_5250_HOSTPHYCTRL0_PHYSWRSTALL
- EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_MASK
- EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT
- EXYNOS_5250_HOSTPHYCTRL0_RETENABLE
- EXYNOS_5250_HOSTPHYCTRL0_SIDDQ
- EXYNOS_5250_HOSTPHYCTRL0_TESTBURNIN
- EXYNOS_5250_HOSTPHYCTRL0_UTMISWRST
- EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ANALOGTEST
- EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_DUAL
- EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ID0
- EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_MASK
- EXYNOS_5250_HOSTPHYCTRL0_WORDINTERFACE
- EXYNOS_5250_HSICPHYCTRL1
- EXYNOS_5250_HSICPHYCTRL2
- EXYNOS_5250_HSICPHYCTRLX_FORCESLEEP
- EXYNOS_5250_HSICPHYCTRLX_FORCESUSPEND
- EXYNOS_5250_HSICPHYCTRLX_PHYSWRST
- EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_12
- EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_15
- EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_16
- EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_19_2
- EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_20
- EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_MASK
- EXYNOS_5250_HSICPHYCTRLX_REFCLKSEL_DEFAULT
- EXYNOS_5250_HSICPHYCTRLX_REFCLKSEL_MASK
- EXYNOS_5250_HSICPHYCTRLX_SIDDQ
- EXYNOS_5250_HSICPHYCTRLX_UTMISWRST
- EXYNOS_5250_HSICPHYCTRLX_WORDINTERFACE
- EXYNOS_5250_MODE_SWITCH_DEVICE
- EXYNOS_5250_MODE_SWITCH_HOST
- EXYNOS_5250_MODE_SWITCH_MASK
- EXYNOS_5250_MODE_SWITCH_OFFSET
- EXYNOS_5250_REFCLKSEL_CLKCORE
- EXYNOS_5250_REFCLKSEL_CRYSTAL
- EXYNOS_5250_REFCLKSEL_XO
- EXYNOS_5250_USBOTGSYS
- EXYNOS_5250_USBOTGSYS_COMMON_ON
- EXYNOS_5250_USBOTGSYS_FORCE_SLEEP
- EXYNOS_5250_USBOTGSYS_FORCE_SUSPEND
- EXYNOS_5250_USBOTGSYS_FSEL_MASK
- EXYNOS_5250_USBOTGSYS_FSEL_SHIFT
- EXYNOS_5250_USBOTGSYS_ID_PULLUP
- EXYNOS_5250_USBOTGSYS_LINK_SW_RST_UOTG
- EXYNOS_5250_USBOTGSYS_OTGDISABLE
- EXYNOS_5250_USBOTGSYS_PHYLINK_SW_RESET
- EXYNOS_5250_USBOTGSYS_PHY_SW_RST
- EXYNOS_5250_USBOTGSYS_REFCLKSEL_MASK
- EXYNOS_5250_USBOTGSYS_REFCLKSEL_SHIFT
- EXYNOS_5250_USBOTGSYS_SIDDQ_UOTG
- EXYNOS_5250_USB_ISOL_HOST
- EXYNOS_5250_USB_ISOL_HOST_OFFSET
- EXYNOS_5250_USB_ISOL_OTG
- EXYNOS_5250_USB_ISOL_OTG_OFFSET
- EXYNOS_ADCV1_PHY_OFFSET
- EXYNOS_ADCV2_PHY_OFFSET
- EXYNOS_ADC_TIMEOUT
- EXYNOS_ADMA
- EXYNOS_AFTR_MAGIC
- EXYNOS_ARM_COMMON_CONFIGURATION
- EXYNOS_ARM_CORE0_CONFIGURATION
- EXYNOS_ARM_CORE_CONFIGURATION
- EXYNOS_ARM_CORE_OPTION
- EXYNOS_ARM_CORE_STATUS
- EXYNOS_ARM_L2_CONFIGURATION
- EXYNOS_AUDSS_MAX_CLKS
- EXYNOS_BOOT_ADDR
- EXYNOS_BOOT_FLAG
- EXYNOS_BO_CACHABLE
- EXYNOS_BO_CONTIG
- EXYNOS_BO_MASK
- EXYNOS_BO_NONCACHABLE
- EXYNOS_BO_NONCONTIG
- EXYNOS_BO_WC
- EXYNOS_CCLKIN_MIN
- EXYNOS_CHIPID_REG_AUX_INFO
- EXYNOS_CHIPID_REG_LOT_ID
- EXYNOS_CHIPID_REG_PKG_ID
- EXYNOS_CHIPID_REG_PRO_ID
- EXYNOS_CICPTSEQ
- EXYNOS_CIDMAPARAM
- EXYNOS_CIDMAPARAM_R_MODE_16X16
- EXYNOS_CIDMAPARAM_R_MODE_64X32
- EXYNOS_CIDMAPARAM_R_MODE_CONFTILE
- EXYNOS_CIDMAPARAM_R_MODE_LINEAR
- EXYNOS_CIDMAPARAM_R_MODE_MASK
- EXYNOS_CIDMAPARAM_R_TILE_HSIZE_1024
- EXYNOS_CIDMAPARAM_R_TILE_HSIZE_128
- EXYNOS_CIDMAPARAM_R_TILE_HSIZE_2048
- EXYNOS_CIDMAPARAM_R_TILE_HSIZE_256
- EXYNOS_CIDMAPARAM_R_TILE_HSIZE_4096
- EXYNOS_CIDMAPARAM_R_TILE_HSIZE_512
- EXYNOS_CIDMAPARAM_R_TILE_HSIZE_64
- EXYNOS_CIDMAPARAM_R_TILE_VSIZE_1
- EXYNOS_CIDMAPARAM_R_TILE_VSIZE_16
- EXYNOS_CIDMAPARAM_R_TILE_VSIZE_2
- EXYNOS_CIDMAPARAM_R_TILE_VSIZE_32
- EXYNOS_CIDMAPARAM_R_TILE_VSIZE_4
- EXYNOS_CIDMAPARAM_R_TILE_VSIZE_8
- EXYNOS_CIDMAPARAM_W_MODE_16X16
- EXYNOS_CIDMAPARAM_W_MODE_64X32
- EXYNOS_CIDMAPARAM_W_MODE_CONFTILE
- EXYNOS_CIDMAPARAM_W_MODE_LINEAR
- EXYNOS_CIDMAPARAM_W_MODE_MASK
- EXYNOS_CIDMAPARAM_W_TILE_HSIZE_1024
- EXYNOS_CIDMAPARAM_W_TILE_HSIZE_128
- EXYNOS_CIDMAPARAM_W_TILE_HSIZE_2048
- EXYNOS_CIDMAPARAM_W_TILE_HSIZE_256
- EXYNOS_CIDMAPARAM_W_TILE_HSIZE_4096
- EXYNOS_CIDMAPARAM_W_TILE_HSIZE_512
- EXYNOS_CIDMAPARAM_W_TILE_HSIZE_64
- EXYNOS_CIDMAPARAM_W_TILE_VSIZE_1
- EXYNOS_CIDMAPARAM_W_TILE_VSIZE_16
- EXYNOS_CIDMAPARAM_W_TILE_VSIZE_2
- EXYNOS_CIDMAPARAM_W_TILE_VSIZE_32
- EXYNOS_CIDMAPARAM_W_TILE_VSIZE_4
- EXYNOS_CIDMAPARAM_W_TILE_VSIZE_8
- EXYNOS_CIEXTEN
- EXYNOS_CIEXTEN_MAINHORRATIO_EXT
- EXYNOS_CIEXTEN_MAINHORRATIO_EXT_MASK
- EXYNOS_CIEXTEN_MAINVERRATIO_EXT
- EXYNOS_CIEXTEN_MAINVERRATIO_EXT_MASK
- EXYNOS_CIEXTEN_TARGETH_EXT
- EXYNOS_CIEXTEN_TARGETH_EXT_MASK
- EXYNOS_CIEXTEN_TARGETV_EXT
- EXYNOS_CIEXTEN_TARGETV_EXT_MASK
- EXYNOS_CIEXTEN_YUV444_OUT
- EXYNOS_CIFCNTSEQ
- EXYNOS_CIGCTRL
- EXYNOS_CIGCTRL_CAMRST_A
- EXYNOS_CIGCTRL_CAM_JPEG
- EXYNOS_CIGCTRL_CSC_ITU601
- EXYNOS_CIGCTRL_CSC_ITU709
- EXYNOS_CIGCTRL_CSC_MASK
- EXYNOS_CIGCTRL_HREF_MASK
- EXYNOS_CIGCTRL_INTERLACE
- EXYNOS_CIGCTRL_INVPOLHREF
- EXYNOS_CIGCTRL_INVPOLHSYNC
- EXYNOS_CIGCTRL_INVPOLPCLK
- EXYNOS_CIGCTRL_INVPOLVSYNC
- EXYNOS_CIGCTRL_IRQ_CLR
- EXYNOS_CIGCTRL_IRQ_DISABLE
- EXYNOS_CIGCTRL_IRQ_EDGE
- EXYNOS_CIGCTRL_IRQ_ENABLE
- EXYNOS_CIGCTRL_IRQ_END_DISABLE
- EXYNOS_CIGCTRL_IRQ_LEVEL
- EXYNOS_CIGCTRL_IRQ_OVFEN
- EXYNOS_CIGCTRL_PROGRESSIVE
- EXYNOS_CIGCTRL_SELCAM_FIMC_ITU
- EXYNOS_CIGCTRL_SELCAM_FIMC_MASK
- EXYNOS_CIGCTRL_SELCAM_FIMC_MIPI
- EXYNOS_CIGCTRL_SELCAM_ITU_A
- EXYNOS_CIGCTRL_SELCAM_ITU_B
- EXYNOS_CIGCTRL_SELCAM_ITU_MASK
- EXYNOS_CIGCTRL_SELCAM_MIPI_A
- EXYNOS_CIGCTRL_SELCAM_MIPI_B
- EXYNOS_CIGCTRL_SELCAM_MIPI_MASK
- EXYNOS_CIGCTRL_SELWB_CAMIF_CAMERA
- EXYNOS_CIGCTRL_SELWB_CAMIF_MASK
- EXYNOS_CIGCTRL_SELWB_CAMIF_WRITEBACK
- EXYNOS_CIGCTRL_SELWRITEBACK_A
- EXYNOS_CIGCTRL_SELWRITEBACK_B
- EXYNOS_CIGCTRL_SELWRITEBACK_MASK
- EXYNOS_CIGCTRL_SHADOW_DISABLE
- EXYNOS_CIGCTRL_SWRST
- EXYNOS_CIGCTRL_TESTPATTERN_COLOR_BAR
- EXYNOS_CIGCTRL_TESTPATTERN_HOR_INC
- EXYNOS_CIGCTRL_TESTPATTERN_MASK
- EXYNOS_CIGCTRL_TESTPATTERN_NORMAL
- EXYNOS_CIGCTRL_TESTPATTERN_SHIFT
- EXYNOS_CIGCTRL_TESTPATTERN_VER_INC
- EXYNOS_CIICBOFF
- EXYNOS_CIICBOFF_HORIZONTAL
- EXYNOS_CIICBOFF_VERTICAL
- EXYNOS_CIICBSA
- EXYNOS_CIICBSA0
- EXYNOS_CIICBSA1
- EXYNOS_CIICROFF
- EXYNOS_CIICROFF_HORIZONTAL
- EXYNOS_CIICROFF_VERTICAL
- EXYNOS_CIICRSA
- EXYNOS_CIICRSA0
- EXYNOS_CIICRSA1
- EXYNOS_CIILINESKIP
- EXYNOS_CIILINESKIP_CB
- EXYNOS_CIILINESKIP_CR
- EXYNOS_CIILINESKIP_Y
- EXYNOS_CIIMGCPT
- EXYNOS_CIIMGCPT_CPT_FREN_ENABLE
- EXYNOS_CIIMGCPT_CPT_FRMOD_CNT
- EXYNOS_CIIMGCPT_CPT_FRMOD_EN
- EXYNOS_CIIMGCPT_IMGCPTEN
- EXYNOS_CIIMGCPT_IMGCPTEN_SC
- EXYNOS_CIIMGEFF
- EXYNOS_CIIMGEFF_FIN
- EXYNOS_CIIMGEFF_FIN_ARBITRARY
- EXYNOS_CIIMGEFF_FIN_ARTFREEZE
- EXYNOS_CIIMGEFF_FIN_BYPASS
- EXYNOS_CIIMGEFF_FIN_EMBOSSING
- EXYNOS_CIIMGEFF_FIN_MASK
- EXYNOS_CIIMGEFF_FIN_NEGATIVE
- EXYNOS_CIIMGEFF_FIN_SILHOUETTE
- EXYNOS_CIIMGEFF_IE_DISABLE
- EXYNOS_CIIMGEFF_IE_ENABLE
- EXYNOS_CIIMGEFF_IE_SC_AFTER
- EXYNOS_CIIMGEFF_IE_SC_BEFORE
- EXYNOS_CIIMGEFF_PAT_CB
- EXYNOS_CIIMGEFF_PAT_CBCR_MASK
- EXYNOS_CIIMGEFF_PAT_CR
- EXYNOS_CIIYOFF
- EXYNOS_CIIYOFF_HORIZONTAL
- EXYNOS_CIIYOFF_VERTICAL
- EXYNOS_CIIYSA
- EXYNOS_CIIYSA0
- EXYNOS_CIIYSA1
- EXYNOS_CIOCBOFF
- EXYNOS_CIOCBOFF_HORIZONTAL
- EXYNOS_CIOCBOFF_VERTICAL
- EXYNOS_CIOCBSA
- EXYNOS_CIOCBSA1
- EXYNOS_CIOCBSA10
- EXYNOS_CIOCBSA11
- EXYNOS_CIOCBSA12
- EXYNOS_CIOCBSA13
- EXYNOS_CIOCBSA14
- EXYNOS_CIOCBSA15
- EXYNOS_CIOCBSA16
- EXYNOS_CIOCBSA17
- EXYNOS_CIOCBSA18
- EXYNOS_CIOCBSA19
- EXYNOS_CIOCBSA2
- EXYNOS_CIOCBSA20
- EXYNOS_CIOCBSA21
- EXYNOS_CIOCBSA22
- EXYNOS_CIOCBSA23
- EXYNOS_CIOCBSA24
- EXYNOS_CIOCBSA25
- EXYNOS_CIOCBSA26
- EXYNOS_CIOCBSA27
- EXYNOS_CIOCBSA28
- EXYNOS_CIOCBSA29
- EXYNOS_CIOCBSA3
- EXYNOS_CIOCBSA30
- EXYNOS_CIOCBSA31
- EXYNOS_CIOCBSA32
- EXYNOS_CIOCBSA4
- EXYNOS_CIOCBSA5
- EXYNOS_CIOCBSA6
- EXYNOS_CIOCBSA7
- EXYNOS_CIOCBSA8
- EXYNOS_CIOCBSA9
- EXYNOS_CIOCROFF
- EXYNOS_CIOCROFF_HORIZONTAL
- EXYNOS_CIOCROFF_VERTICAL
- EXYNOS_CIOCRSA
- EXYNOS_CIOCRSA1
- EXYNOS_CIOCRSA10
- EXYNOS_CIOCRSA11
- EXYNOS_CIOCRSA12
- EXYNOS_CIOCRSA13
- EXYNOS_CIOCRSA14
- EXYNOS_CIOCRSA15
- EXYNOS_CIOCRSA16
- EXYNOS_CIOCRSA17
- EXYNOS_CIOCRSA18
- EXYNOS_CIOCRSA19
- EXYNOS_CIOCRSA2
- EXYNOS_CIOCRSA20
- EXYNOS_CIOCRSA21
- EXYNOS_CIOCRSA22
- EXYNOS_CIOCRSA23
- EXYNOS_CIOCRSA24
- EXYNOS_CIOCRSA25
- EXYNOS_CIOCRSA26
- EXYNOS_CIOCRSA27
- EXYNOS_CIOCRSA28
- EXYNOS_CIOCRSA29
- EXYNOS_CIOCRSA3
- EXYNOS_CIOCRSA30
- EXYNOS_CIOCRSA31
- EXYNOS_CIOCRSA32
- EXYNOS_CIOCRSA4
- EXYNOS_CIOCRSA5
- EXYNOS_CIOCRSA6
- EXYNOS_CIOCRSA7
- EXYNOS_CIOCRSA8
- EXYNOS_CIOCRSA9
- EXYNOS_CIOCTRL
- EXYNOS_CIOCTRL_ALPHA_OUT
- EXYNOS_CIOCTRL_LASTENDEN
- EXYNOS_CIOCTRL_LASTIRQ_ENABLE
- EXYNOS_CIOCTRL_ORDER2P_LSB_CBCR
- EXYNOS_CIOCTRL_ORDER2P_LSB_CRCB
- EXYNOS_CIOCTRL_ORDER2P_MASK
- EXYNOS_CIOCTRL_ORDER2P_MSB_CBCR
- EXYNOS_CIOCTRL_ORDER2P_MSB_CRCB
- EXYNOS_CIOCTRL_ORDER2P_SHIFT
- EXYNOS_CIOCTRL_ORDER422_CBYCRY
- EXYNOS_CIOCTRL_ORDER422_CRYCBY
- EXYNOS_CIOCTRL_ORDER422_MASK
- EXYNOS_CIOCTRL_ORDER422_YCBYCR
- EXYNOS_CIOCTRL_ORDER422_YCRYCB
- EXYNOS_CIOCTRL_WEAVE_MASK
- EXYNOS_CIOCTRL_WEAVE_OUT
- EXYNOS_CIOCTRL_YCBCR_2PLANE
- EXYNOS_CIOCTRL_YCBCR_3PLANE
- EXYNOS_CIOCTRL_YCBCR_PLANE_MASK
- EXYNOS_CIOYOFF
- EXYNOS_CIOYOFF_HORIZONTAL
- EXYNOS_CIOYOFF_VERTICAL
- EXYNOS_CIOYSA
- EXYNOS_CIOYSA1
- EXYNOS_CIOYSA10
- EXYNOS_CIOYSA11
- EXYNOS_CIOYSA12
- EXYNOS_CIOYSA13
- EXYNOS_CIOYSA14
- EXYNOS_CIOYSA15
- EXYNOS_CIOYSA16
- EXYNOS_CIOYSA17
- EXYNOS_CIOYSA18
- EXYNOS_CIOYSA19
- EXYNOS_CIOYSA2
- EXYNOS_CIOYSA20
- EXYNOS_CIOYSA21
- EXYNOS_CIOYSA22
- EXYNOS_CIOYSA23
- EXYNOS_CIOYSA24
- EXYNOS_CIOYSA25
- EXYNOS_CIOYSA26
- EXYNOS_CIOYSA27
- EXYNOS_CIOYSA28
- EXYNOS_CIOYSA29
- EXYNOS_CIOYSA3
- EXYNOS_CIOYSA30
- EXYNOS_CIOYSA31
- EXYNOS_CIOYSA32
- EXYNOS_CIOYSA4
- EXYNOS_CIOYSA5
- EXYNOS_CIOYSA6
- EXYNOS_CIOYSA7
- EXYNOS_CIOYSA8
- EXYNOS_CIOYSA9
- EXYNOS_CIREAL_ISIZE
- EXYNOS_CIREAL_ISIZE_ADDR_CH_DISABLE
- EXYNOS_CIREAL_ISIZE_AUTOLOAD_ENABLE
- EXYNOS_CIREAL_ISIZE_HEIGHT
- EXYNOS_CIREAL_ISIZE_HEIGHT_MASK
- EXYNOS_CIREAL_ISIZE_WIDTH
- EXYNOS_CIREAL_ISIZE_WIDTH_MASK
- EXYNOS_CISCCTRL
- EXYNOS_CISCCTRL_CSCR2Y_NARROW
- EXYNOS_CISCCTRL_CSCR2Y_WIDE
- EXYNOS_CISCCTRL_CSCY2R_NARROW
- EXYNOS_CISCCTRL_CSCY2R_WIDE
- EXYNOS_CISCCTRL_EXTRGB_EXTENSION
- EXYNOS_CISCCTRL_EXTRGB_NORMAL
- EXYNOS_CISCCTRL_INRGB_FMT_RGB565
- EXYNOS_CISCCTRL_INRGB_FMT_RGB666
- EXYNOS_CISCCTRL_INRGB_FMT_RGB888
- EXYNOS_CISCCTRL_INRGB_FMT_RGB_MASK
- EXYNOS_CISCCTRL_INTERLACE
- EXYNOS_CISCCTRL_LCDPATHEN_FIFO
- EXYNOS_CISCCTRL_MAINHORRATIO
- EXYNOS_CISCCTRL_MAINVERRATIO
- EXYNOS_CISCCTRL_MAIN_H_RATIO_MASK
- EXYNOS_CISCCTRL_MAIN_V_RATIO_MASK
- EXYNOS_CISCCTRL_ONE2ONE
- EXYNOS_CISCCTRL_OUTRGB_FMT_RGB565
- EXYNOS_CISCCTRL_OUTRGB_FMT_RGB666
- EXYNOS_CISCCTRL_OUTRGB_FMT_RGB888
- EXYNOS_CISCCTRL_OUTRGB_FMT_RGB_MASK
- EXYNOS_CISCCTRL_PROGRESSIVE
- EXYNOS_CISCCTRL_SCALERBYPASS
- EXYNOS_CISCCTRL_SCALERSTART
- EXYNOS_CISCCTRL_SCALEUP_H
- EXYNOS_CISCCTRL_SCALEUP_V
- EXYNOS_CISCCTRL_SCAN_MASK
- EXYNOS_CISCPREDST
- EXYNOS_CISCPREDST_PREDSTHEIGHT
- EXYNOS_CISCPREDST_PREDSTWIDTH
- EXYNOS_CISCPRERATIO
- EXYNOS_CISCPRERATIO_PREHORRATIO
- EXYNOS_CISCPRERATIO_PREVERRATIO
- EXYNOS_CISCPRERATIO_SHFACTOR
- EXYNOS_CISRCFMT
- EXYNOS_CISRCFMT_ITU601_16BIT
- EXYNOS_CISRCFMT_ITU601_8BIT
- EXYNOS_CISRCFMT_ITU656_8BIT
- EXYNOS_CISRCFMT_ORDER422_CBYCRY
- EXYNOS_CISRCFMT_ORDER422_CRYCBY
- EXYNOS_CISRCFMT_ORDER422_Y4CBCRCBCR
- EXYNOS_CISRCFMT_ORDER422_Y4CRCBCRCB
- EXYNOS_CISRCFMT_ORDER422_YCBYCR
- EXYNOS_CISRCFMT_ORDER422_YCRYCB
- EXYNOS_CISRCFMT_SOURCEHSIZE
- EXYNOS_CISRCFMT_SOURCEVSIZE
- EXYNOS_CISTATUS
- EXYNOS_CISTATUS2
- EXYNOS_CISTATUS2_GET_FRAMECOUNT_BEFORE
- EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT
- EXYNOS_CISTATUS_FRAMEEND
- EXYNOS_CISTATUS_GET_ENVID_STATUS
- EXYNOS_CISTATUS_GET_FRAME_COUNT
- EXYNOS_CISTATUS_GET_FRAME_END
- EXYNOS_CISTATUS_GET_LAST_CAPTURE_END
- EXYNOS_CISTATUS_GET_LCD_STATUS
- EXYNOS_CISTATUS_IMGCPTEN
- EXYNOS_CISTATUS_IMGCPTENSC
- EXYNOS_CISTATUS_LASTCAPTUREEND
- EXYNOS_CISTATUS_OVFICB
- EXYNOS_CISTATUS_OVFICR
- EXYNOS_CISTATUS_OVFIY
- EXYNOS_CISTATUS_OVRLB
- EXYNOS_CISTATUS_SCALERSTART
- EXYNOS_CISTATUS_VSYNC
- EXYNOS_CISTATUS_VSYNC_A
- EXYNOS_CISTATUS_VSYNC_B
- EXYNOS_CISTATUS_VVALID_A
- EXYNOS_CISTATUS_VVALID_B
- EXYNOS_CISTATUS_WINOFSTEN
- EXYNOS_CITAREA
- EXYNOS_CITAREA_TARGET_AREA
- EXYNOS_CITRGFMT
- EXYNOS_CITRGFMT_FLIP_180
- EXYNOS_CITRGFMT_FLIP_MASK
- EXYNOS_CITRGFMT_FLIP_NORMAL
- EXYNOS_CITRGFMT_FLIP_SHIFT
- EXYNOS_CITRGFMT_FLIP_X_MIRROR
- EXYNOS_CITRGFMT_FLIP_Y_MIRROR
- EXYNOS_CITRGFMT_INROT90_CLOCKWISE
- EXYNOS_CITRGFMT_OUTFORMAT_MASK
- EXYNOS_CITRGFMT_OUTFORMAT_RGB
- EXYNOS_CITRGFMT_OUTFORMAT_YCBCR420
- EXYNOS_CITRGFMT_OUTFORMAT_YCBCR422
- EXYNOS_CITRGFMT_OUTFORMAT_YCBCR422_1PLANE
- EXYNOS_CITRGFMT_OUTROT90_CLOCKWISE
- EXYNOS_CITRGFMT_TARGETHSIZE
- EXYNOS_CITRGFMT_TARGETH_MASK
- EXYNOS_CITRGFMT_TARGETVSIZE
- EXYNOS_CITRGFMT_TARGETV_MASK
- EXYNOS_CIWDOFST
- EXYNOS_CIWDOFST2
- EXYNOS_CIWDOFST2_WINHOROFST2
- EXYNOS_CIWDOFST2_WINVEROFST2
- EXYNOS_CIWDOFST_CLROVFICB
- EXYNOS_CIWDOFST_CLROVFICR
- EXYNOS_CIWDOFST_CLROVFIY
- EXYNOS_CIWDOFST_CLROVRLB
- EXYNOS_CIWDOFST_WINHOROFST
- EXYNOS_CIWDOFST_WINHOROFST2_MASK
- EXYNOS_CIWDOFST_WINHOROFST_MASK
- EXYNOS_CIWDOFST_WINOFSEN
- EXYNOS_CIWDOFST_WINVEROFST
- EXYNOS_CIWDOFST_WINVEROFST2_MASK
- EXYNOS_CIWDOFST_WINVEROFST_MASK
- EXYNOS_CLKOUT_DISABLE_SHIFT
- EXYNOS_CLKOUT_MUX_SHIFT
- EXYNOS_CLKOUT_NR_CLKS
- EXYNOS_CLKOUT_PARENTS
- EXYNOS_CLKSRC_HCLK
- EXYNOS_CLKSRC_HCLK_MASK
- EXYNOS_CLKSRC_SCLK
- EXYNOS_COMMON_CONFIGURATION
- EXYNOS_COMMON_OPTION
- EXYNOS_COMMON_SERIAL_DRV_DATA
- EXYNOS_COMMON_STATUS
- EXYNOS_CORE_PO_RESET
- EXYNOS_CSIIMGFMT
- EXYNOS_DEV_ADDR_SIZE
- EXYNOS_DEV_ADDR_START
- EXYNOS_DISPLAY_TYPE_HDMI
- EXYNOS_DISPLAY_TYPE_LCD
- EXYNOS_DISPLAY_TYPE_NONE
- EXYNOS_DISPLAY_TYPE_VIDI
- EXYNOS_DOUT_AUD_BUS
- EXYNOS_DOUT_I2S
- EXYNOS_DOUT_SRP
- EXYNOS_DP
- EXYNOS_DRM_PLANE_CAP_DOUBLE
- EXYNOS_DRM_PLANE_CAP_PIX_BLEND
- EXYNOS_DRM_PLANE_CAP_SCALE
- EXYNOS_DRM_PLANE_CAP_TILE
- EXYNOS_DRM_PLANE_CAP_WIN_BLEND
- EXYNOS_DRM_PLANE_CAP_ZPOS
- EXYNOS_DSI_RX
- EXYNOS_DSI_TX
- EXYNOS_EINT_CON_LEN
- EXYNOS_EINT_CON_MASK
- EXYNOS_EINT_EDGE_BOTH
- EXYNOS_EINT_EDGE_FALLING
- EXYNOS_EINT_EDGE_RISING
- EXYNOS_EINT_LEVEL_HIGH
- EXYNOS_EINT_LEVEL_LOW
- EXYNOS_EINT_MAX_PER_BANK
- EXYNOS_EINT_NR_WKUP_EINT
- EXYNOS_EINT_WAKEUP_MASK
- EXYNOS_EINT_WAKEUP_MASK_DISABLED
- EXYNOS_EMUL_CON
- EXYNOS_EMUL_DATA_MASK
- EXYNOS_EMUL_DATA_SHIFT
- EXYNOS_EMUL_ENABLE
- EXYNOS_EMUL_TIME
- EXYNOS_EMUL_TIME_MASK
- EXYNOS_EMUL_TIME_SHIFT
- EXYNOS_FIRST_POINT_TRIM
- EXYNOS_GPIO_ECON_OFFSET
- EXYNOS_GPIO_EFLTCON_OFFSET
- EXYNOS_GPIO_EMASK_OFFSET
- EXYNOS_GPIO_EPEND_OFFSET
- EXYNOS_HDMI_PHY_CONTROL
- EXYNOS_I2S_BUS
- EXYNOS_IROM_DATA2
- EXYNOS_L2_CONFIGURATION
- EXYNOS_L2_OPTION
- EXYNOS_L2_STATUS
- EXYNOS_L2_USE_RETENTION
- EXYNOS_MAINREV_MASK
- EXYNOS_MASK
- EXYNOS_MIPI_PHYS_NUM
- EXYNOS_MIPI_PHY_ID_CSIS0
- EXYNOS_MIPI_PHY_ID_CSIS1
- EXYNOS_MIPI_PHY_ID_CSIS2
- EXYNOS_MIPI_PHY_ID_DSIM0
- EXYNOS_MIPI_PHY_ID_DSIM1
- EXYNOS_MIPI_PHY_ID_NONE
- EXYNOS_MIPI_REGMAPS_NUM
- EXYNOS_MIPI_REGMAP_CAM0
- EXYNOS_MIPI_REGMAP_CAM1
- EXYNOS_MIPI_REGMAP_DISP
- EXYNOS_MIPI_REGMAP_PMU
- EXYNOS_MISC_FIMC
- EXYNOS_MOUT_AUDSS
- EXYNOS_MOUT_I2S
- EXYNOS_MSCTRL
- EXYNOS_MSCTRL_BURST_CNT
- EXYNOS_MSCTRL_BURST_CNT_MASK
- EXYNOS_MSCTRL_C_INT_IN_2PLANE
- EXYNOS_MSCTRL_C_INT_IN_3PLANE
- EXYNOS_MSCTRL_ENVID
- EXYNOS_MSCTRL_FIELD_MASK
- EXYNOS_MSCTRL_FIELD_NORMAL
- EXYNOS_MSCTRL_FIELD_WEAVE
- EXYNOS_MSCTRL_FLIP_180
- EXYNOS_MSCTRL_FLIP_MASK
- EXYNOS_MSCTRL_FLIP_NORMAL
- EXYNOS_MSCTRL_FLIP_SHIFT
- EXYNOS_MSCTRL_FLIP_X_MIRROR
- EXYNOS_MSCTRL_FLIP_Y_MIRROR
- EXYNOS_MSCTRL_GET_INDMA_STATUS
- EXYNOS_MSCTRL_INFORMAT_RGB
- EXYNOS_MSCTRL_INFORMAT_YCBCR420
- EXYNOS_MSCTRL_INFORMAT_YCBCR422
- EXYNOS_MSCTRL_INFORMAT_YCBCR422_1PLANE
- EXYNOS_MSCTRL_INPUT_EXTCAM
- EXYNOS_MSCTRL_INPUT_MASK
- EXYNOS_MSCTRL_INPUT_MEMORY
- EXYNOS_MSCTRL_ORDER2P_LSB_CBCR
- EXYNOS_MSCTRL_ORDER2P_LSB_CRCB
- EXYNOS_MSCTRL_ORDER2P_MSB_CBCR
- EXYNOS_MSCTRL_ORDER2P_MSB_CRCB
- EXYNOS_MSCTRL_ORDER2P_SHIFT
- EXYNOS_MSCTRL_ORDER2P_SHIFT_MASK
- EXYNOS_MSCTRL_ORDER422_CBYCRY
- EXYNOS_MSCTRL_ORDER422_CRYCBY
- EXYNOS_MSCTRL_ORDER422_YCBYCR
- EXYNOS_MSCTRL_ORDER422_YCRYCB
- EXYNOS_MSCTRL_SUCCESSIVE_COUNT
- EXYNOS_NOISE_CANCEL_MODE
- EXYNOS_ORGISIZE
- EXYNOS_ORGISIZE_HORIZONTAL
- EXYNOS_ORGISIZE_VERTICAL
- EXYNOS_ORGOSIZE
- EXYNOS_ORGOSIZE_HORIZONTAL
- EXYNOS_ORGOSIZE_VERTICAL
- EXYNOS_PAD_RET_DRAM_OPTION
- EXYNOS_PAD_RET_EBIA_OPTION
- EXYNOS_PAD_RET_EBIB_OPTION
- EXYNOS_PAD_RET_JTAG_OPTION
- EXYNOS_PAD_RET_MAUDIO_OPTION
- EXYNOS_PA_CHIPID
- EXYNOS_PCM_BUS
- EXYNOS_PIN_BANK_EINTG
- EXYNOS_PIN_BANK_EINTN
- EXYNOS_PIN_BANK_EINTW
- EXYNOS_PIN_FUNC_2
- EXYNOS_PIN_FUNC_3
- EXYNOS_PIN_FUNC_4
- EXYNOS_PIN_FUNC_5
- EXYNOS_PIN_FUNC_6
- EXYNOS_PIN_FUNC_EINT
- EXYNOS_PIN_FUNC_F
- EXYNOS_PIN_FUNC_INPUT
- EXYNOS_PIN_FUNC_OUTPUT
- EXYNOS_PIN_PDN_INPUT
- EXYNOS_PIN_PDN_OUT0
- EXYNOS_PIN_PDN_OUT1
- EXYNOS_PIN_PDN_PREV
- EXYNOS_PIN_PULL_DOWN
- EXYNOS_PIN_PULL_NONE
- EXYNOS_PIN_PULL_UP
- EXYNOS_PMU_DEBUG_REG
- EXYNOS_PMU_IRQ
- EXYNOS_PRNG_EXYNOS4
- EXYNOS_PRNG_EXYNOS5
- EXYNOS_PRNG_UNKNOWN
- EXYNOS_REGS_DECON5433_H
- EXYNOS_REGS_DECON7_H
- EXYNOS_REGS_FIMC_H
- EXYNOS_REGS_GSC_H_
- EXYNOS_REGS_ROTATOR_H
- EXYNOS_REGS_SCALER_H
- EXYNOS_REV_MASK
- EXYNOS_RNG_CONTROL
- EXYNOS_RNG_CONTROL_START
- EXYNOS_RNG_GEN_PRNG
- EXYNOS_RNG_OUT
- EXYNOS_RNG_OUT_BASE
- EXYNOS_RNG_RESEED_BYTES
- EXYNOS_RNG_RESEED_TIME
- EXYNOS_RNG_SEED
- EXYNOS_RNG_SEED_BASE
- EXYNOS_RNG_SEED_CONF
- EXYNOS_RNG_SEED_REGS
- EXYNOS_RNG_SEED_SIZE
- EXYNOS_RNG_STATUS
- EXYNOS_RNG_STATUS_RNG_DONE
- EXYNOS_RNG_STATUS_SEED_SETTING_DONE
- EXYNOS_RNG_WAIT_RETRIES
- EXYNOS_SCLK_I2S
- EXYNOS_SCLK_PCM
- EXYNOS_SECOND_POINT_TRIM
- EXYNOS_SLEEP_MAGIC
- EXYNOS_SROMREG
- EXYNOS_SROM_BC0
- EXYNOS_SROM_BC1
- EXYNOS_SROM_BC2
- EXYNOS_SROM_BC3
- EXYNOS_SROM_BC4
- EXYNOS_SROM_BC5
- EXYNOS_SROM_BCX__PMC__SHIFT
- EXYNOS_SROM_BCX__TACC__SHIFT
- EXYNOS_SROM_BCX__TACP__SHIFT
- EXYNOS_SROM_BCX__TACS__SHIFT
- EXYNOS_SROM_BCX__TCAH__SHIFT
- EXYNOS_SROM_BCX__TCOH__SHIFT
- EXYNOS_SROM_BCX__TCOS__SHIFT
- EXYNOS_SROM_BW
- EXYNOS_SROM_BW__ADDRMODE__SHIFT
- EXYNOS_SROM_BW__BYTEENABLE__SHIFT
- EXYNOS_SROM_BW__CS_MASK
- EXYNOS_SROM_BW__DATAWIDTH__SHIFT
- EXYNOS_SROM_BW__NCS0__SHIFT
- EXYNOS_SROM_BW__NCS1__SHIFT
- EXYNOS_SROM_BW__NCS2__SHIFT
- EXYNOS_SROM_BW__NCS3__SHIFT
- EXYNOS_SROM_BW__NCS4__SHIFT
- EXYNOS_SROM_BW__NCS5__SHIFT
- EXYNOS_SROM_BW__WAITENABLE__SHIFT
- EXYNOS_SRP_CLK
- EXYNOS_SUBREV_MASK
- EXYNOS_SVC_GROUP
- EXYNOS_SVC_GROUP_MASK
- EXYNOS_SVC_GROUP_SHIFT
- EXYNOS_SVC_NUM_MASK
- EXYNOS_SVC_OFFSET
- EXYNOS_SWRESET
- EXYNOS_THD_TEMP_FALL
- EXYNOS_THD_TEMP_RISE
- EXYNOS_TMU_BUF_SLOPE_SEL_MASK
- EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT
- EXYNOS_TMU_CORE_EN_SHIFT
- EXYNOS_TMU_INTEN_FALL0_SHIFT
- EXYNOS_TMU_INTEN_RISE0_SHIFT
- EXYNOS_TMU_PM
- EXYNOS_TMU_REF_VOLTAGE_MASK
- EXYNOS_TMU_REF_VOLTAGE_SHIFT
- EXYNOS_TMU_REG_CONTROL
- EXYNOS_TMU_REG_CURRENT_TEMP
- EXYNOS_TMU_REG_INTCLEAR
- EXYNOS_TMU_REG_INTEN
- EXYNOS_TMU_REG_INTSTAT
- EXYNOS_TMU_REG_STATUS
- EXYNOS_TMU_REG_TRIMINFO
- EXYNOS_TMU_TEMP_MASK
- EXYNOS_TMU_THERM_TRIP_EN_SHIFT
- EXYNOS_TMU_TRIMINFO_CON1
- EXYNOS_TMU_TRIMINFO_CON2
- EXYNOS_TMU_TRIP_MODE_MASK
- EXYNOS_TMU_TRIP_MODE_SHIFT
- EXYNOS_TRIMINFO_25_SHIFT
- EXYNOS_TRIMINFO_85_SHIFT
- EXYNOS_TRIMINFO_RELOAD_ENABLE
- EXYNOS_TRNG_CLKDIV
- EXYNOS_TRNG_CLOCK_RATE
- EXYNOS_TRNG_CTRL
- EXYNOS_TRNG_CTRL_RNGEN
- EXYNOS_TRNG_FIFO_0
- EXYNOS_TRNG_FIFO_1
- EXYNOS_TRNG_FIFO_2
- EXYNOS_TRNG_FIFO_3
- EXYNOS_TRNG_FIFO_4
- EXYNOS_TRNG_FIFO_5
- EXYNOS_TRNG_FIFO_6
- EXYNOS_TRNG_FIFO_7
- EXYNOS_TRNG_FIFO_CTRL
- EXYNOS_TRNG_FIFO_LEN
- EXYNOS_TRNG_ONLINE_CTRL
- EXYNOS_TRNG_ONLINE_MAXCHI2
- EXYNOS_TRNG_ONLINE_STAT
- EXYNOS_TRNG_POST_CTRL
- EXYNOS_TYPE_PPMU
- EXYNOS_TYPE_PPMU_V2
- EXYNOS_WAKEUP_FROM_LOWPWR
- EXYNOS_WKUP_ECON_OFFSET
- EXYNOS_WKUP_EMASK_OFFSET
- EXYNOS_WKUP_EPEND_OFFSET
- EX_ADDR_H
- EX_ADDR_L
- EX_BMI_DISPATCH_RAM_ECC
- EX_BMI_LIST_RAM_ECC
- EX_BMI_STATISTICS_RAM_ECC
- EX_BMI_STORAGE_PROFILE_ECC
- EX_CCR
- EX_CFAR
- EX_CHK_SUM1
- EX_CHK_SUM2
- EX_CHK_SUM3
- EX_CR
- EX_CRIT
- EX_CS0_MARK
- EX_CS0_N_MARK
- EX_CS1_MARK
- EX_CS1_N_MARK
- EX_CS2_MARK
- EX_CS2_N_MARK
- EX_CS3_MARK
- EX_CS3_N_MARK
- EX_CS4_MARK
- EX_CS4_N_MARK
- EX_CS5_MARK
- EX_CS5_N_MARK
- EX_CTR
- EX_DAR
- EX_DBG
- EX_DMA_BUS_ERROR
- EX_DMA_FM_WRITE_ECC
- EX_DMA_READ_ECC
- EX_DMA_SINGLE_PORT_ECC
- EX_DMA_SYSTEM_WRITE_ECC
- EX_DSISR
- EX_Denormal
- EX_ENTRY_SIZE
- EX_ErrorSummary
- EX_FPM_DOUBLE_ECC
- EX_FPM_SINGLE_ECC
- EX_FPM_STALL_ON_TASKS
- EX_FRAME_ADDR
- EX_FRAME_OFFSET
- EX_FRAME_SIZE
- EX_GDBELL
- EX_GEN
- EX_HANDLER_ADDR
- EX_HANDLER_OFFSET
- EX_HANDLER_SIZE
- EX_HANDLER_STACK_SIZ
- EX_INTERNAL
- EX_IRAM_ECC
- EX_ISSYNC
- EX_Invalid
- EX_LD
- EX_LD_FP
- EX_LINK_SERVICE_SEND_DID_MASK
- EX_LINK_SERVICE_SEND_DID_SHIFT
- EX_LINK_SERVICE_SEND_MSGFLAGS_MASK
- EX_LINK_SERVICE_SEND_MSGFLAGS_SHIFT
- EX_MASK
- EX_MC
- EX_MURAM_ECC
- EX_NEW_OFFSET
- EX_NOHIDE
- EX_NO_POP
- EX_NO_SINGLE_STEP
- EX_O2_1
- EX_O2_4
- EX_O4
- EX_ORIG_OFFSET
- EX_Overflow
- EX_PARAMS
- EX_PARAMS_TLB
- EX_PIN_CONTROL_MASK
- EX_PIN_ENABLE_MASK
- EX_PPR
- EX_Precision
- EX_QMI_DEQ_FROM_UNKNOWN_PORTID
- EX_QMI_DOUBLE_ECC
- EX_QMI_SINGLE_ECC
- EX_R1
- EX_R10
- EX_R11
- EX_R12
- EX_R13
- EX_R14
- EX_R15
- EX_R9
- EX_RDAT
- EX_RETVAL
- EX_SINGLE_STEP
- EX_SIZE
- EX_ST
- EX_ST_FP
- EX_StackOver
- EX_StackUnder
- EX_TABLE
- EX_TABLE_DMA
- EX_TLB
- EX_TLB_CR
- EX_TLB_DEAR
- EX_TLB_ESR
- EX_TLB_LR
- EX_TLB_R10
- EX_TLB_R11
- EX_TLB_R12
- EX_TLB_R13
- EX_TLB_R14
- EX_TLB_R15
- EX_TLB_R16
- EX_TLB_R7
- EX_TLB_R8
- EX_TLB_R9
- EX_TLB_SIZE
- EX_TLB_SRR0
- EX_TLB_SRR1
- EX_UUID_LEN
- EX_Underflow
- EX_WAIT0_B_MARK
- EX_WAIT0_MARK
- EX_WAIT1_A_MARK
- EX_WAIT1_B_MARK
- EX_WAIT1_MARK
- EX_WAIT2_A_MARK
- EX_WAIT2_B_MARK
- EX_WAIT2_MARK
- EX_WDAT
- EX_WGATHER
- EX_ZeroDiv
- EXhalbtc8723b1ant_BtInfoNotify
- EXhalbtc8723b1ant_ConnectNotify
- EXhalbtc8723b1ant_DisplayCoexInfo
- EXhalbtc8723b1ant_HaltNotify
- EXhalbtc8723b1ant_InitCoexDm
- EXhalbtc8723b1ant_InitHwConfig
- EXhalbtc8723b1ant_IpsNotify
- EXhalbtc8723b1ant_LpsNotify
- EXhalbtc8723b1ant_MediaStatusNotify
- EXhalbtc8723b1ant_Periodical
- EXhalbtc8723b1ant_PnpNotify
- EXhalbtc8723b1ant_PowerOnSetting
- EXhalbtc8723b1ant_ScanNotify
- EXhalbtc8723b1ant_SpecialPacketNotify
- EXhalbtc8723b2ant_BtInfoNotify
- EXhalbtc8723b2ant_ConnectNotify
- EXhalbtc8723b2ant_DisplayCoexInfo
- EXhalbtc8723b2ant_HaltNotify
- EXhalbtc8723b2ant_InitCoexDm
- EXhalbtc8723b2ant_InitHwConfig
- EXhalbtc8723b2ant_IpsNotify
- EXhalbtc8723b2ant_LpsNotify
- EXhalbtc8723b2ant_MediaStatusNotify
- EXhalbtc8723b2ant_Periodical
- EXhalbtc8723b2ant_PnpNotify
- EXhalbtc8723b2ant_PowerOnSetting
- EXhalbtc8723b2ant_ScanNotify
- EXhalbtc8723b2ant_SpecialPacketNotify
- EXhalbtcoutsrc_BindBtCoexWithAdapter
- EXhalbtcoutsrc_BtInfoNotify
- EXhalbtcoutsrc_ConnectNotify
- EXhalbtcoutsrc_DisplayBtCoexInfo
- EXhalbtcoutsrc_HaltNotify
- EXhalbtcoutsrc_InitCoexDm
- EXhalbtcoutsrc_InitHwConfig
- EXhalbtcoutsrc_IpsNotify
- EXhalbtcoutsrc_LpsNotify
- EXhalbtcoutsrc_MediaStatusNotify
- EXhalbtcoutsrc_Periodical
- EXhalbtcoutsrc_PnpNotify
- EXhalbtcoutsrc_PowerOnSetting
- EXhalbtcoutsrc_ScanNotify
- EXhalbtcoutsrc_SetAntNum
- EXhalbtcoutsrc_SetChipType
- EXhalbtcoutsrc_SetSingleAntPath
- EXhalbtcoutsrc_SpecialPacketNotify
- EYE_PATTERN_PARA
- EZ
- EZD_PARTITION
- EZPROTOTYPES_VID
- EZTIMEOUT
- EZUSB_CPUCS_REG
- EZUSB_CTX_COMPLETE
- EZUSB_CTX_QUEUED
- EZUSB_CTX_REQSUBMIT_FAIL
- EZUSB_CTX_REQ_COMPLETE
- EZUSB_CTX_REQ_FAILED
- EZUSB_CTX_REQ_SUBMITTED
- EZUSB_CTX_REQ_TIMEOUT
- EZUSB_CTX_RESP_RECEIVED
- EZUSB_CTX_RESP_TIMEOUT
- EZUSB_CTX_START
- EZUSB_FRAME_CONTROL
- EZUSB_FRAME_DATA
- EZUSB_IS_INFO
- EZUSB_MAGIC
- EZUSB_REQUEST_FW_TRANS
- EZUSB_REQUEST_TRIGER
- EZUSB_REQUEST_TRIG_AC
- EZUSB_RID_ACK
- EZUSB_RID_DOCMD
- EZUSB_RID_INIT1
- EZUSB_RID_PROG_BYTES
- EZUSB_RID_PROG_END
- EZUSB_RID_PROG_INIT
- EZUSB_RID_PROG_SET_ADDR
- EZUSB_RID_READ_PDA
- EZUSB_RID_RX
- EZUSB_RID_TX
- EZX_NR_IRQS
- EZX_PCAP_H
- E_
- E_ACCESS_OK
- E_ACCESS_PERM
- E_AND
- E_AUTO
- E_BAD_COMMAND
- E_BAD_FWMTHD
- E_BASE_BOUNDS
- E_BFR_SPC
- E_BITS
- E_BREG_BASE_HI
- E_BREG_BASE_LO
- E_BREG_CAPABILITIES
- E_BREG_CONTROL
- E_CLASS_BAD_SPECIFIC_PARAMETER
- E_CLASS_DIRECTSHOW
- E_CLASS_FREE
- E_CLASS_GENERAL
- E_CLASS_INVALID_CMD
- E_CLASS_INVALID_STD_OBJECT
- E_CLASS_REAL_TIME_ERROR
- E_CLASS_RSRC_IMPOSSIBLE
- E_CLASS_WRONG_CONTEXT
- E_CMD_OVERFLOW
- E_CON_NC_TMOUT
- E_CON_REJ
- E_CON_TMOUT
- E_CUT_VERSION
- E_C_ERR_BAD_CFG
- E_C_ERR_INVAL_CMD
- E_C_ERR_UNIMP_CMD
- E_C_LINK_10_100
- E_C_LINK_DOWN
- E_C_LINK_UP
- E_C_MCAST_ADDR_ADD
- E_C_MCAST_ADDR_DEL
- E_DEC
- E_DEFAULT
- E_DIMNUM
- E_DISC_ERR
- E_DTA_CKSM_ERR
- E_ECAM_BASE_HI
- E_ECAM_BASE_LO
- E_ECAM_CAPABILITIES
- E_ECAM_CONTROL
- E_ECAM_CR_ENABLE
- E_ECAM_PRESENT
- E_ECAM_SIZE_LOC
- E_ECAM_SIZE_SHIFT
- E_ELAN_INFO_BC_VER
- E_ELAN_INFO_FW_ID
- E_ELAN_INFO_FW_VER
- E_ELAN_INFO_TEST_VER
- E_EQUAL
- E_ERROR
- E_EXCLK
- E_FILNMLEN
- E_FLG_SYN_ERR
- E_FOR_TX_POWER_TRACK
- E_FRM_ERR
- E_FW_RUNNING
- E_GEQ
- E_GTH
- E_HOST_ERR
- E_HSIZE
- E_IDENT
- E_INC
- E_INDICATOR
- E_INFO_EVT
- E_INFO_OSR
- E_INFO_PHY_DRIVER
- E_INFO_PHY_SCAN
- E_INTERN_ERR
- E_INT_PRTY
- E_INVAL_CMD
- E_INV_RNG
- E_INV_ULP
- E_IP_CKSM_ERR
- E_ITS_CLEAR_UNMAPPED_INTERRUPT
- E_ITS_DISCARD_UNMAPPED_INTERRUPT
- E_ITS_INT_UNMAPPED_INTERRUPT
- E_ITS_INVALL_UNMAPPED_COLLECTION
- E_ITS_INV_UNMAPPED_INTERRUPT
- E_ITS_MAPC_COLLECTION_OOR
- E_ITS_MAPC_PROCNUM_OOR
- E_ITS_MAPD_DEVICE_OOR
- E_ITS_MAPD_ITTSIZE_OOR
- E_ITS_MAPTI_ID_OOR
- E_ITS_MAPTI_PHYSICALID_OOR
- E_ITS_MAPTI_UNMAPPED_DEVICE
- E_ITS_MOVALL_PROCNUM_OOR
- E_ITS_MOVI_UNMAPPED_COLLECTION
- E_ITS_MOVI_UNMAPPED_INTERRUPT
- E_In84
- E_LEN
- E_LEQ
- E_LINK_OFF
- E_LINK_ON
- E_LIST
- E_LNK_STATE
- E_LST_LNK_ERR
- E_LTH
- E_MASK
- E_MCAST_LIST
- E_NEW_DEFAULT
- E_NIC_UP
- E_NONE
- E_NOT
- E_NOT_IMPLEMENTED
- E_OR
- E_P16
- E_P24
- E_PD_MISMATCH
- E_PHENTSIZE
- E_PHNUM
- E_PHOFF
- E_PKT_DISCARD
- E_PKT_LN_ERR
- E_POS
- E_P_AUTO
- E_RANGE
- E_REJECTING
- E_RESET_JUMBO_RNG
- E_RNG_BLK
- E_RX_IDLE
- E_RX_INV_BUF
- E_RX_INV_DSC
- E_RX_LLRC_ERR
- E_RX_PAR_ERR
- E_RX_RNG_ENER
- E_RX_RNG_OUT
- E_RX_RNG_SPC
- E_RX_TO
- E_SET
- E_SET_CMD_CONS
- E_SHT_BST
- E_SOURCE_API
- E_SOURCE_AUDIO
- E_SOURCE_BOARD
- E_SOURCE_COBRANET
- E_SOURCE_DISPATCHER
- E_SOURCE_DRV
- E_SOURCE_TOOLS
- E_SOURCE_USER
- E_SOURCE_VPCX
- E_SPKT_ERRS_IGNORE
- E_STAG_INVALID
- E_STATE_ERR
- E_STATS_UPDATE
- E_STATS_UPDATED
- E_STAT_UPD
- E_SUM_ERRS
- E_SUM_LINK_PKTERRS
- E_SUM_PKTERRS
- E_SYMBOL
- E_SYMNMLEN
- E_TABSZ
- E_TX_IDLE
- E_TX_INV_BUF
- E_TX_INV_DSC
- E_TX_INV_RNG
- E_TX_LINK_DROP
- E_UNEQUAL
- E_UNEXP_DATA
- E_VAL_RNG
- E_WATCHDOG
- E_fsconfig
- E_md4hash
- EarlyRx
- EarlySize
- EarlyTxThres
- EarlyTxThresShift
- EdramMemType
- Eelif
- Eelse
- Eendif
- Eeof
- EepromCtrl
- EepromData
- EepromMemType
- EepromReload
- EfiPciIoAttributeOperationDisable
- EfiPciIoAttributeOperationEnable
- EfiPciIoAttributeOperationGet
- EfiPciIoAttributeOperationMaximum
- EfiPciIoAttributeOperationSet
- EfiPciIoAttributeOperationSupported
- EfiPciIoWidthFifoUint16
- EfiPciIoWidthFifoUint32
- EfiPciIoWidthFifoUint64
- EfiPciIoWidthFifoUint8
- EfiPciIoWidthFillUint16
- EfiPciIoWidthFillUint32
- EfiPciIoWidthFillUint64
- EfiPciIoWidthFillUint8
- EfiPciIoWidthMaximum
- EfiPciIoWidthUint16
- EfiPciIoWidthUint32
- EfiPciIoWidthUint64
- EfiPciIoWidthUint8
- Efuse_CalculateWordCnts
- Efuse_GetCurrentSize
- Efuse_PgPacketRead
- Efuse_PgPacketWrite
- Efuse_PowerSwitch
- Efuse_Read1ByteFromFakeContent
- Efuse_ReadAllMap
- Efuse_WordEnableDataWrite
- Efuse_Write1ByteToFakeContent
- EhnMIIdataShift
- EhnMIInotDone
- EhnMIIpmdShift
- EhnMIIread
- EhnMIIregShift
- EhnMIIreq
- EhnMIIwrite
- Eioccc
- Elf32_Addr
- Elf32_Dyn
- Elf32_Ehdr
- Elf32_Fdesc
- Elf32_Half
- Elf32_Nhdr
- Elf32_Off
- Elf32_Phdr
- Elf32_Rel
- Elf32_Rela
- Elf32_Shdr
- Elf32_Sword
- Elf32_Sym
- Elf32_Word
- Elf64_Addr
- Elf64_Byte
- Elf64_Dyn
- Elf64_Ehdr
- Elf64_Fdesc
- Elf64_Half
- Elf64_Mips_Rel
- Elf64_Mips_Rela
- Elf64_Nhdr
- Elf64_Off
- Elf64_Phdr
- Elf64_Rel
- Elf64_Rela
- Elf64_SHalf
- Elf64_Shdr
- Elf64_Sword
- Elf64_Sxword
- Elf64_Sym
- Elf64_Word
- Elf64_Xword
- ElfW
- Elf_Addr
- Elf_Dyn
- Elf_Ehdr
- Elf_Fdesc
- Elf_Half
- Elf_Mips_Rel
- Elf_Mips_Rela
- Elf_Note
- Elf_Phdr
- Elf_Rel
- Elf_Rela
- Elf_Section
- Elf_Shdr
- Elf_Sword
- Elf_Sym
- Elf_Word
- Elf_r_info
- Elf_r_sym
- EmulateAll
- EmulateCPDO
- EmulateCPDT
- EmulateCPRT
- EmulateOnUD
- EnCFG_BBType_MASK
- EnCFG_BBType_a
- EnCFG_BBType_b
- EnCFG_BBType_g
- EnCFG_BarkerPream
- EnCFG_BcnSusClr
- EnCFG_BcnSusInd
- EnCFG_CFNULRSP
- EnCFG_CFP_ProtectEn
- EnCFG_HwParCFP
- EnCFG_NXTBTTCFPSTR
- EnCFG_PktBurstMode
- EnCFG_ProtectMd
- EnMBID
- EnPDN
- Enable302LV_DualLink
- EnableAll
- EnableAllCompares
- EnableAndResetMB
- EnableBist
- EnableCHScart
- EnableCHYPbPr
- EnableDualEdge
- EnableErrors
- EnableExternalTMDS_Encoder
- EnableHWSecurityConfig8192
- EnableHW_IconCursor
- EnableInterrupt8723BSdio
- EnableIntr
- EnableIntrMasking
- EnableLVDSDDA
- EnableLVDS_SS
- EnableNTSCJ
- EnableNormal
- EnableOverlayPlane
- EnablePALM
- EnablePALMN
- EnablePALN
- EnableRamdacOutput
- EnableRecv
- EnableSRAM
- EnableSiSYPbPr
- EnableVGA_Access
- EnableYPbPr1080i
- EnableYPbPr525i
- EnableYPbPr525p
- EnableYPbPr750p
- EnableYUV
- Enable_SRAM
- Enabled
- EnbFlowCtrl
- EnbFullDuplex
- EnbPassRxCRC
- EnbRcvLargeFrame
- EndPage_rxb
- EndPage_txb
- Endian_Reg
- EndpointOutRequest
- EndpointRequest
- EnetAddressOffset
- EnhancedVRAMx16
- EnhancedVRAMx16ssr
- Enhancement0
- EnterFunction
- Entry_header
- EnumRd
- Ep_InRequest
- Ep_Request
- EpicNapiEvent
- EpicNormalEvent
- EpicRemoved
- EpromCtrl
- EpromData
- EpromMemType
- EpromOffset
- Equal
- Equalbit
- ErgDpram_tag
- Err01
- Err02
- Err03
- Err04
- ErrDescriptor
- ErrEvent_ACTION_CONTROL__APML_ERR_En_MASK
- ErrEvent_ACTION_CONTROL__APML_ERR_En__SHIFT
- ErrEvent_ACTION_CONTROL__IntrGenSel_MASK
- ErrEvent_ACTION_CONTROL__IntrGenSel__SHIFT
- ErrEvent_ACTION_CONTROL__LinkDis_En_MASK
- ErrEvent_ACTION_CONTROL__LinkDis_En__SHIFT
- ErrEvent_ACTION_CONTROL__SyncFlood_En_MASK
- ErrEvent_ACTION_CONTROL__SyncFlood_En__SHIFT
- ErrLogEntry_tag
- ErrMask
- ErrMsg
- ErrNotALink
- ErrQuota
- ErrTooManyLinks
- ErrorInfo
- ErrorInfo_struct
- ErrorSummary
- Escape
- Et_WaitStatus
- Et_getgainG
- Et_init1
- Et_init2
- Et_setgainG
- EthCtrl0
- EthCtrl1
- EthCtrl2
- EthID
- EthRxStat
- EthStats
- EthStatus
- EthTxStat0
- EthTxStat1
- Eth_0
- Eth_1
- EtherLink3ID
- EtherStats64Octets
- EtherStats65to127OctetsTransmit
- EtherStatsCRCAlignErrors
- EtherStatsCollisions
- EtherStatsFragments
- EtherStatsJabbers
- EtherStatsOctets
- EtherStatsOctetsTransmit
- EtherStatsPkts
- EtherStatsPkts1024to1518Octets
- EtherStatsPkts1024to1518OctetsTransmit
- EtherStatsPkts128to255Octets
- EtherStatsPkts128to255OctetsTransmit
- EtherStatsPkts256to511Octets
- EtherStatsPkts256to511OctetsTransmit
- EtherStatsPkts512to1023Octets
- EtherStatsPkts512to1023OctetsTransmit
- EtherStatsPkts64OctetTransmit
- EtherStatsPkts65to127Octets
- EtherStatsPktsTransmit
- EtherStatsUndersizePkts
- EvalSysrTokData
- Event
- EventAckReply_t
- EventAck_t
- EventData
- EventDataDiscoveryError_t
- EventDataEventChange_t
- EventDataLinkStatus_t
- EventDataLogout_t
- EventDataLoopState_t
- EventDataQueueFull_t
- EventDataSasDiscovery_t
- EventDataScsi_t
- EventNotificationReply_t
- EventNotification_t
- EventStatus
- ExLinkServiceSendReply_t
- ExLinkServiceSendRequest_t
- Exception
- ExceptionBlock
- Exceptionbit
- Exceptiontype
- Excp_format
- Excp_instr
- Excp_type
- ExecSCSI
- ExpansionRom
- Exprodata
- ExpromAddr
- ExtHiTVHT
- ExtHiTVVT
- ExtLED_IB1_GRN
- ExtLED_IB1_MASK
- ExtLED_IB1_YEL
- ExtLED_IB2_GRN
- ExtLED_IB2_MASK
- ExtLED_IB2_YEL
- Ext_Command_Entry
- Ext_isnotzero
- Ext_isnotzero_lower
- Ext_isone_sign
- Ext_leftshiftby1
- Ext_negate
- Ext_setone_low
- Ext_setzero
- Extall
- ExtendedCPDO
- Extern_size
- Extern_table
- ExternalBbl
- ExternalDFPOutputControl
- Exthigh31
- Extlow
- Extlow31
- Extsign
[..]