[C]

[..]
  1. C
  2. C0
  3. C0DRB3
  4. C0_1030
  5. C0_ADDR
  6. C0_BADINSTR
  7. C0_BADINSTRP
  8. C0_BADVADDR
  9. C0_C2_CHANGE_DISABLE
  10. C0_C2_CHANGE_ENABLE
  11. C0_CAUSE
  12. C0_CERR_D
  13. C0_CERR_I
  14. C0_CONFIG5
  15. C0_CONTEXT
  16. C0_DDATA_LO
  17. C0_DF_BAYER
  18. C0_DF_MASK
  19. C0_DF_RGB
  20. C0_DF_YUV
  21. C0_DOWNSCALE
  22. C0_DUMP
  23. C0_EBASE
  24. C0_ENABLE
  25. C0_ENTRYHI
  26. C0_ENTRYLO0
  27. C0_ENTRYLO1
  28. C0_EOF_VSYNC
  29. C0_EPC
  30. C0_ERRCTL
  31. C0_ERROREPC
  32. C0_GETCTX
  33. C0_GETDM
  34. C0_GETPM
  35. C0_GUESTCTL0
  36. C0_GUESTCTL1
  37. C0_G_Y
  38. C0_HPOL_LOW
  39. C0_HWRENA
  40. C0_INDEX
  41. C0_LOAD
  42. C0_PAGEMASK
  43. C0_PGD
  44. C0_PWBASE
  45. C0_PWCTL
  46. C0_PWFIELD
  47. C0_PWSIZE
  48. C0_RGB4_BGRX
  49. C0_RGB4_RGBX
  50. C0_RGB4_XBGR
  51. C0_RGB4_XRGB
  52. C0_RGB5_BGGR
  53. C0_RGB5_GBRG
  54. C0_RGB5_GRBG
  55. C0_RGB5_RGGB
  56. C0_RGBF_444
  57. C0_RGBF_565
  58. C0_RGB_BGR
  59. C0_SETCTX
  60. C0_SETDM
  61. C0_SETPM
  62. C0_SIFM_MASK
  63. C0_SIF_HVSYNC
  64. C0_SOF_NOSYNC
  65. C0_STATUS
  66. C0_TCBIND
  67. C0_VCLK_LOW
  68. C0_VEDGE_CTRL
  69. C0_VPOL_LOW
  70. C0_XCONTEXT
  71. C0_YUVE_NOSWAP
  72. C0_YUVE_SWAP13
  73. C0_YUVE_SWAP1324
  74. C0_YUVE_SWAP24
  75. C0_YUVE_UYVY
  76. C0_YUVE_VYUY
  77. C0_YUVE_YUYV
  78. C0_YUVE_YVYU
  79. C0_YUV_420PL
  80. C0_YUV_PACKED
  81. C0_YUV_PLANAR
  82. C1
  83. C10
  84. C101_DTR
  85. C101_MAPPED_RAM_SIZE
  86. C101_PAGE
  87. C101_SCA
  88. C101_WINDOW_SIZE
  89. C102_ASIC_ID
  90. C104_ASIC_ID
  91. C11
  92. C12
  93. C13
  94. C14
  95. C15
  96. C16
  97. C168_ASIC_ID
  98. C17
  99. C18
  100. C19
  101. C1DRB3
  102. C1RXR
  103. C1_444ALPHA
  104. C1_ALPHA_SHFT
  105. C1_B_Cb
  106. C1_CLKGATE
  107. C1_DESC_3WORD
  108. C1_DESC_ENA
  109. C1_DMAB16
  110. C1_DMAB32
  111. C1_DMAB64
  112. C1_DMAB_MASK
  113. C1_IMG
  114. C1_PWRDWN
  115. C1_TWOBUFS
  116. C2
  117. C20
  118. C21
  119. C218DLoad_len
  120. C218_ConfBase
  121. C218_ErrFlag
  122. C218_KeyCode
  123. C218_LoadBuf
  124. C218_RXerr
  125. C218_TestRx
  126. C218_TestTx
  127. C218_diag
  128. C218_key
  129. C218_start
  130. C218_status
  131. C218buf_pageno
  132. C218check_sum
  133. C218chksum_ok
  134. C218rx_mask
  135. C218rx_pageno
  136. C218rx_size
  137. C218rx_spage
  138. C218tx_mask
  139. C218tx_pageno
  140. C218tx_size
  141. C218tx_spage
  142. C21_1610_KBC4
  143. C22
  144. C22EXT_MSTSLV_CTRL
  145. C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN
  146. C22EXT_MSTSLV_CTRL_ADV_1000_HD_LBN
  147. C22EXT_MSTSLV_STATUS
  148. C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN
  149. C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN
  150. C22EXT_STATUS_LINK_LBN
  151. C22EXT_STATUS_LINK_WIDTH
  152. C22EXT_STATUS_REG
  153. C23
  154. C24
  155. C25
  156. C26
  157. C28_IDF_MASK
  158. C28_NDIV_MASK
  159. C28_ODF_MASK
  160. C2CK
  161. C2C_HEADER_MAX
  162. C2D
  163. C2HCMD_UDT_ADDR
  164. C2HCMD_UDT_SIZE
  165. C2HEVENT_SZ
  166. C2HEvent_Header
  167. C2HFF_RDPTR
  168. C2HFF_WTPTR
  169. C2HPacketHandler_8723B
  170. C2H_8723B_AP_RPT_RSP
  171. C2H_8723B_BT_INFO
  172. C2H_8723B_BT_MP_INFO
  173. C2H_8723B_BT_OP_MODE
  174. C2H_8723B_BT_RSSI
  175. C2H_8723B_CCX_TX_RPT
  176. C2H_8723B_DEBUG
  177. C2H_8723B_EXT_RA_RPT
  178. C2H_8723B_FW_DEBUG
  179. C2H_8723B_HW_INFO_EXCH
  180. C2H_8723B_RA_REPORT
  181. C2H_8723B_TSF
  182. C2H_AP_RPT_RSP
  183. C2H_BT_INFO
  184. C2H_BT_MP
  185. C2H_BT_MP_INFO
  186. C2H_BT_OP_MODE
  187. C2H_BT_RSSI
  188. C2H_CCX_RPT
  189. C2H_CCX_TX_RPT
  190. C2H_DATA_OFFSET
  191. C2H_DBG
  192. C2H_EVT
  193. C2H_EVT_FW_CLOSE
  194. C2H_EVT_HDR
  195. C2H_EVT_HOST_CLOSE
  196. C2H_EXT_RA_RPT
  197. C2H_EXT_V2
  198. C2H_FW_SWCHNL
  199. C2H_HALMAC
  200. C2H_HW_FEATURE_DUMP
  201. C2H_HW_FEATURE_REPORT
  202. C2H_HW_INFO_EXCH
  203. C2H_IQK_FINISH
  204. C2H_LB
  205. C2H_MEM_SZ
  206. C2H_PACKET
  207. C2H_PKT_BUF
  208. C2H_QUEUE_MAX_LEN
  209. C2H_RA_RPT
  210. C2H_RX_CMD_HDR_LEN
  211. C2H_TSF
  212. C2H_TXBF
  213. C2H_TX_REPORT
  214. C2H_V0_AP_RPT_RSP
  215. C2H_V0_BT_INFO
  216. C2H_V0_BT_OP_MODE
  217. C2H_V0_BT_RSSI
  218. C2H_V0_C2H_H2C_TEST
  219. C2H_V0_CCX_TX_RPT
  220. C2H_V0_DBG
  221. C2H_V0_HW_INFO_EXCH
  222. C2H_V0_TSF
  223. C2H_V2_CCX_RPT
  224. C2H_WK_CID
  225. C2H_WLAN_INFO
  226. C2K
  227. C2PORT_BLOCK_READ
  228. C2PORT_BLOCK_WRITE
  229. C2PORT_COMMAND_FAILED
  230. C2PORT_COMMAND_OK
  231. C2PORT_DEVICEID
  232. C2PORT_DEVICE_ERASE
  233. C2PORT_FPCTL
  234. C2PORT_FPDAT
  235. C2PORT_GET_VERSION
  236. C2PORT_INVALID_COMMAND
  237. C2PORT_NAME_LEN
  238. C2PORT_PAGE_ERASE
  239. C2PORT_REVID
  240. C2RXR
  241. C2S
  242. C2_7XX_KBC0
  243. C2_IMG
  244. C2_R_Cr
  245. C2_STATE
  246. C3
  247. C30
  248. C32
  249. C320DLoad_len
  250. C320UART_no
  251. C320_ConfBase
  252. C320_KeyCode
  253. C320_LoadBuf
  254. C320_diag
  255. C320_key
  256. C320_status
  257. C320bapi_len
  258. C320check_sum
  259. C320chksum_ok
  260. C320p16buf_pgno
  261. C320p16rx_mask
  262. C320p16rx_pgno
  263. C320p16rx_size
  264. C320p16rx_spage
  265. C320p16tx_mask
  266. C320p16tx_pgno
  267. C320p16tx_size
  268. C320p16tx_spage
  269. C320p24buf_pgno
  270. C320p24rx_mask
  271. C320p24rx_pgno
  272. C320p24rx_size
  273. C320p24rx_spage
  274. C320p24tx_mask
  275. C320p24tx_pgno
  276. C320p24tx_size
  277. C320p24tx_spage
  278. C320p32buf_pgno
  279. C320p32rx_mask
  280. C320p32rx_size
  281. C320p32rx_spage
  282. C320p32tx_mask
  283. C320p32tx_ofs
  284. C320p32tx_size
  285. C320p32tx_spage
  286. C320p8buf_pgno
  287. C320p8rx_mask
  288. C320p8rx_pgno
  289. C320p8rx_size
  290. C320p8rx_spage
  291. C320p8tx_mask
  292. C320p8tx_pgno
  293. C320p8tx_size
  294. C320p8tx_spage
  295. C32_CP_MASK
  296. C32_IDF_MASK
  297. C32_LDF_MASK
  298. C32_MAX_ODFS
  299. C32_NDIV_MASK
  300. C32_ODF_MASK
  301. C3_ALPHA
  302. C3_CLK_ENB
  303. C3_IMG
  304. C4
  305. C45
  306. C46
  307. C4IW_64B_CQE
  308. C4IW_ID_TABLE_F_EMPTY
  309. C4IW_ID_TABLE_F_RANDOM
  310. C4IW_INLINE_THRESHOLD
  311. C4IW_MAX_INLINE_SIZE
  312. C4IW_NODE_DESC
  313. C4IW_QPF_ONCHIP
  314. C4IW_QPF_WRITE_W_IMM
  315. C4IW_QP_ATTR_ENABLE_RDMA_BIND
  316. C4IW_QP_ATTR_ENABLE_RDMA_READ
  317. C4IW_QP_ATTR_ENABLE_RDMA_WRITE
  318. C4IW_QP_ATTR_LLP_STREAM_HANDLE
  319. C4IW_QP_ATTR_MAX_IRD
  320. C4IW_QP_ATTR_MAX_ORD
  321. C4IW_QP_ATTR_MPA_ATTR
  322. C4IW_QP_ATTR_NEXT_STATE
  323. C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE
  324. C4IW_QP_ATTR_RQ_DB
  325. C4IW_QP_ATTR_SQ_DB
  326. C4IW_QP_ATTR_STREAM_MSG_BUFFER
  327. C4IW_QP_ATTR_VALID_MODIFY
  328. C4IW_QP_STATE_CLOSING
  329. C4IW_QP_STATE_ERROR
  330. C4IW_QP_STATE_IDLE
  331. C4IW_QP_STATE_RTS
  332. C4IW_QP_STATE_TERMINATE
  333. C4IW_QP_STATE_TOT
  334. C4IW_STAG_STATE_INVALID
  335. C4IW_STAG_STATE_VALID
  336. C4IW_UVERBS_ABI_VERSION
  337. C4IW_WR_TO
  338. C4_EXTEND_CFG
  339. C4_IMG
  340. C5
  341. C56_66
  342. C5_IMG
  343. C6
  344. C6205_BAR0_TIMER1_CTL
  345. C6205_BAR1_DSPP
  346. C6205_BAR1_HDCR
  347. C6205_BAR1_HSR
  348. C6205_BAR1_PCI_IO_OFFSET
  349. C6205_DSPP_MAP1
  350. C6205_HDCR_DSPINT
  351. C6205_HDCR_PCIBOOT
  352. C6205_HDCR_WARMRESET
  353. C6205_HSR_CFGERR
  354. C6205_HSR_EEREAD
  355. C6205_HSR_INTAM
  356. C6205_HSR_INTAVAL
  357. C6205_HSR_INTSRC
  358. C656_FS_LNED
  359. C656_FS_LNST
  360. C656_HS_ED
  361. C656_HS_ST
  362. C656_VS_LNED_E
  363. C656_VS_LNED_O
  364. C656_VS_LNST_E
  365. C656_VS_LNST_O
  366. C6713_EMIF_CE0
  367. C6713_EMIF_CE1
  368. C6713_EMIF_CE2
  369. C6713_EMIF_CE3
  370. C6713_EMIF_GCTL
  371. C6713_EMIF_SDRAMCTL
  372. C6713_EMIF_SDRAMEXT
  373. C6713_EMIF_SDRAMTIMING
  374. C67X00_IRQ
  375. C67X00_PADDR
  376. C67X00_PORTS
  377. C67X00_SIE1_HOST
  378. C67X00_SIE1_PERIPHERAL_A
  379. C67X00_SIE1_PERIPHERAL_B
  380. C67X00_SIE1_UNUSED
  381. C67X00_SIE2_HOST
  382. C67X00_SIE2_PERIPHERAL_A
  383. C67X00_SIE2_PERIPHERAL_B
  384. C67X00_SIE2_UNUSED
  385. C67X00_SIES
  386. C67X00_SIE_HOST
  387. C67X00_SIE_PERIPHERAL_A
  388. C67X00_SIE_PERIPHERAL_B
  389. C67X00_SIE_UNUSED
  390. C67X00_SIZE
  391. C6XDIGIO_CTRL_REG
  392. C6XDIGIO_DATA_CHAN
  393. C6XDIGIO_DATA_ENCODER
  394. C6XDIGIO_DATA_PWM
  395. C6XDIGIO_DATA_REG
  396. C6XDIGIO_STATUS_REG
  397. C6XDIGIO_TIME_OUT
  398. C6X_NDELAY_SCALE
  399. C7
  400. C7_IMG
  401. C8
  402. C8SECTPFEI_MAXADAPTER
  403. C8SECTPFEI_MAXCHANNEL
  404. C8SECTPFE_ALIGN_BYTE_SOP
  405. C8SECTPFE_ASYNC_NOT_SYNC
  406. C8SECTPFE_BYTE_ENDIANNESS_MSB
  407. C8SECTPFE_CHANNEL_OFFSET
  408. C8SECTPFE_DROP
  409. C8SECTPFE_IB_BUFF_END
  410. C8SECTPFE_IB_BUFF_STRT
  411. C8SECTPFE_IB_IP_FMT_CFG
  412. C8SECTPFE_IB_MASK
  413. C8SECTPFE_IB_PID_SET
  414. C8SECTPFE_IB_PKT_LEN
  415. C8SECTPFE_IB_PRI_THRLD
  416. C8SECTPFE_IB_READ_PNT
  417. C8SECTPFE_IB_STAT
  418. C8SECTPFE_IB_SYNCLCKDRP_CFG
  419. C8SECTPFE_IB_SYS
  420. C8SECTPFE_IB_TAGBYTES_CFG
  421. C8SECTPFE_IB_WRT_PNT
  422. C8SECTPFE_IGNORE_ERR_AT_SOP
  423. C8SECTPFE_IGNORE_ERR_IN_BYTE
  424. C8SECTPFE_IGNORE_ERR_IN_PKT
  425. C8SECTPFE_INPUTBLK_OFFSET
  426. C8SECTPFE_INVERT_TSCLK
  427. C8SECTPFE_MASK_BUFFER_OVERFLOW
  428. C8SECTPFE_MASK_ERROR_PACKETS
  429. C8SECTPFE_MASK_FIFO_OVERFLOW
  430. C8SECTPFE_MASK_OUTOFORDERRP
  431. C8SECTPFE_MASK_PID_OVERFLOW
  432. C8SECTPFE_MASK_PKT_OVERFLOW
  433. C8SECTPFE_MASK_SHORT_PACKETS
  434. C8SECTPFE_MAXADAPTER
  435. C8SECTPFE_MAXCHANNEL
  436. C8SECTPFE_MAX_TSIN_CHAN
  437. C8SECTPFE_PID_ENABLE
  438. C8SECTPFE_PID_NUMBITS
  439. C8SECTPFE_PID_OFFSET
  440. C8SECTPFE_PRI_HIGHPRI
  441. C8SECTPFE_PRI_LOWPRI
  442. C8SECTPFE_PRI_VALUE
  443. C8SECTPFE_SERIAL_NOT_PARALLEL
  444. C8SECTPFE_SLDENDIANNESS
  445. C8SECTPFE_STAT_BUFFER_OVERFLOW
  446. C8SECTPFE_STAT_ERROR_PACKETS
  447. C8SECTPFE_STAT_FIFO_OVERFLOW
  448. C8SECTPFE_STAT_OUTOFORDERRP
  449. C8SECTPFE_STAT_PID_OVERFLOW
  450. C8SECTPFE_STAT_PKT_OVERFLOW
  451. C8SECTPFE_STAT_SHORT_PACKETS
  452. C8SECTPFE_SYNC
  453. C8SECTPFE_SYS_ENABLE
  454. C8SECTPFE_SYS_RESET
  455. C8SECTPFE_TAG_COUNTER
  456. C8SECTPFE_TAG_ENABLE
  457. C8SECTPFE_TAG_HEADER
  458. C8SECTPFE_TOKEN
  459. C9
  460. CA
  461. CA0106_MIDI_CHAN_A
  462. CA0106_MIDI_CHAN_B
  463. CA0106_MIDI_INPUT_AVAIL
  464. CA0106_MIDI_OUTPUT_READY
  465. CA0106_MPU401_ACK
  466. CA0106_MPU401_ENTER_UART
  467. CA0106_MPU401_RESET
  468. CA0132_ALT_CODEC_VOL
  469. CA0132_ALT_CODEC_VOL_MONO
  470. CA0132_CODEC_MUTE
  471. CA0132_CODEC_MUTE_MONO
  472. CA0132_CODEC_VOL
  473. CA0132_CODEC_VOL_MONO
  474. CA15BAR
  475. CA15RESCNT
  476. CA15RESCNT_CODE
  477. CA15RESCNT_CPUS
  478. CA15_DVFS
  479. CA3dIO_WriteReg
  480. CA53_MAX_OFFSET
  481. CA53_RESET
  482. CA53_SECTION
  483. CA7BAR
  484. CA7RESCNT
  485. CA7RESCNT_CODE
  486. CA7RESCNT_CPUS
  487. CA7_DVFS
  488. CA8210_IOCTL_HARD_RESET
  489. CA8210_MAC_MPW
  490. CA8210_MAC_WORKAROUNDS
  491. CA8210_MAX_ED_LEVELS
  492. CA8210_MAX_TX_POWERS
  493. CA8210_SFR_LNAGX40
  494. CA8210_SFR_LNAGX41
  495. CA8210_SFR_LNAGX42
  496. CA8210_SFR_LNAGX43
  497. CA8210_SFR_LNAGX44
  498. CA8210_SFR_LNAGX45
  499. CA8210_SFR_LNAGX46
  500. CA8210_SFR_LNAGX47
  501. CA8210_SFR_LOTXCAL
  502. CA8210_SFR_MACCON
  503. CA8210_SFR_PACFG
  504. CA8210_SFR_PACFGIB
  505. CA8210_SFR_PRECFG
  506. CA8210_SFR_PTHRH
  507. CA8210_SPI_BUF_SIZE
  508. CA8210_SYNC_TIMEOUT
  509. CA8210_TEST_INT_FIFO_SIZE
  510. CA8210_TEST_INT_FILE_NAME
  511. CA8210_VALID_CHANNELS
  512. CA91C142_MAX_DMA
  513. CA91C142_MAX_MAILBOX
  514. CA91C142_MAX_MASTER
  515. CA91C142_MAX_SLAVE
  516. CA91CX42_BM_LMISC_CRT
  517. CA91CX42_BM_LMISC_CWT
  518. CA91CX42_BM_MAST_CTL_BUS_NO
  519. CA91CX42_BM_MAST_CTL_MAXRTRY
  520. CA91CX42_BM_MAST_CTL_PABS
  521. CA91CX42_BM_MAST_CTL_PWON
  522. CA91CX42_BM_MAST_CTL_VOWN
  523. CA91CX42_BM_MAST_CTL_VOWN_ACK
  524. CA91CX42_BM_MAST_CTL_VREL
  525. CA91CX42_BM_MAST_CTL_VRL
  526. CA91CX42_BM_MAST_CTL_VRM
  527. CA91CX42_BM_MISC_STAT_DY4AUTO
  528. CA91CX42_BM_MISC_STAT_DY4AUTOID
  529. CA91CX42_BM_MISC_STAT_DY4DONE
  530. CA91CX42_BM_MISC_STAT_ENDIAN
  531. CA91CX42_BM_MISC_STAT_LCLSIZE
  532. CA91CX42_BM_MISC_STAT_MYBBSY
  533. CA91CX42_BM_MISC_STAT_RXFE
  534. CA91CX42_BM_MISC_STAT_TXFE
  535. CA91CX42_BM_PCI_CLASS_BASE
  536. CA91CX42_BM_PCI_CLASS_PROG
  537. CA91CX42_BM_PCI_CLASS_RID
  538. CA91CX42_BM_PCI_CLASS_SUB
  539. CA91CX42_BM_PCI_MISC0_BISTC
  540. CA91CX42_BM_PCI_MISC0_CCODE
  541. CA91CX42_BM_PCI_MISC0_LAYOUT
  542. CA91CX42_BM_PCI_MISC0_LTIMER
  543. CA91CX42_BM_PCI_MISC0_MFUNCT
  544. CA91CX42_BM_PCI_MISC0_SBIST
  545. CA91CX42_BM_SLSI_BS
  546. CA91CX42_BM_SLSI_EN
  547. CA91CX42_BM_SLSI_LAS
  548. CA91CX42_BM_SLSI_PGM
  549. CA91CX42_BM_SLSI_PWEN
  550. CA91CX42_BM_SLSI_RESERVED
  551. CA91CX42_BM_SLSI_SUPER
  552. CA91CX42_BM_SLSI_VDW
  553. CA91CX42_BM_VRAI_CTL_EN
  554. CA91CX42_BM_VRAI_CTL_PGM
  555. CA91CX42_BM_VRAI_CTL_SUPER
  556. CA91CX42_BM_VRAI_CTL_VAS
  557. CA91CX42_DCPP_M
  558. CA91CX42_DCPP_NULL
  559. CA91CX42_DCTL_L2V
  560. CA91CX42_DCTL_LD64EN
  561. CA91CX42_DCTL_PGM_DATA
  562. CA91CX42_DCTL_PGM_M
  563. CA91CX42_DCTL_PGM_PGM
  564. CA91CX42_DCTL_SUPER_M
  565. CA91CX42_DCTL_SUPER_NPRIV
  566. CA91CX42_DCTL_SUPER_SUPR
  567. CA91CX42_DCTL_VAS_A16
  568. CA91CX42_DCTL_VAS_A24
  569. CA91CX42_DCTL_VAS_A32
  570. CA91CX42_DCTL_VAS_M
  571. CA91CX42_DCTL_VAS_USER1
  572. CA91CX42_DCTL_VAS_USER2
  573. CA91CX42_DCTL_VCT_BLT
  574. CA91CX42_DCTL_VCT_M
  575. CA91CX42_DCTL_VDW_D16
  576. CA91CX42_DCTL_VDW_D32
  577. CA91CX42_DCTL_VDW_D64
  578. CA91CX42_DCTL_VDW_D8
  579. CA91CX42_DCTL_VDW_M
  580. CA91CX42_DGCS_ACT
  581. CA91CX42_DGCS_CHAIN
  582. CA91CX42_DGCS_DONE
  583. CA91CX42_DGCS_GO
  584. CA91CX42_DGCS_HALT
  585. CA91CX42_DGCS_HALT_REQ
  586. CA91CX42_DGCS_INT_DONE
  587. CA91CX42_DGCS_INT_HALT
  588. CA91CX42_DGCS_INT_LERR
  589. CA91CX42_DGCS_INT_PERR
  590. CA91CX42_DGCS_INT_STOP
  591. CA91CX42_DGCS_INT_VERR
  592. CA91CX42_DGCS_LERR
  593. CA91CX42_DGCS_PERR
  594. CA91CX42_DGCS_STOP
  595. CA91CX42_DGCS_STOP_REQ
  596. CA91CX42_DGCS_VERR
  597. CA91CX42_DGCS_VOFF_M
  598. CA91CX42_DGCS_VON_M
  599. CA91CX42_LINT_ACFAIL
  600. CA91CX42_LINT_DMA
  601. CA91CX42_LINT_LERR
  602. CA91CX42_LINT_LM0
  603. CA91CX42_LINT_LM1
  604. CA91CX42_LINT_LM2
  605. CA91CX42_LINT_LM3
  606. CA91CX42_LINT_MBOX
  607. CA91CX42_LINT_MBOX0
  608. CA91CX42_LINT_MBOX1
  609. CA91CX42_LINT_MBOX2
  610. CA91CX42_LINT_MBOX3
  611. CA91CX42_LINT_SW_IACK
  612. CA91CX42_LINT_SW_INT
  613. CA91CX42_LINT_SYSFAIL
  614. CA91CX42_LINT_VERR
  615. CA91CX42_LINT_VIRQ1
  616. CA91CX42_LINT_VIRQ2
  617. CA91CX42_LINT_VIRQ3
  618. CA91CX42_LINT_VIRQ4
  619. CA91CX42_LINT_VIRQ5
  620. CA91CX42_LINT_VIRQ6
  621. CA91CX42_LINT_VIRQ7
  622. CA91CX42_LINT_VOWN
  623. CA91CX42_LM_CTL_AS_A16
  624. CA91CX42_LM_CTL_AS_A24
  625. CA91CX42_LM_CTL_AS_A32
  626. CA91CX42_LM_CTL_AS_M
  627. CA91CX42_LM_CTL_DATA
  628. CA91CX42_LM_CTL_EN
  629. CA91CX42_LM_CTL_NPRIV
  630. CA91CX42_LM_CTL_PGM
  631. CA91CX42_LM_CTL_SUPR
  632. CA91CX42_LSI_CTL_EN
  633. CA91CX42_LSI_CTL_LAS
  634. CA91CX42_LSI_CTL_PGM_DATA
  635. CA91CX42_LSI_CTL_PGM_M
  636. CA91CX42_LSI_CTL_PGM_PGM
  637. CA91CX42_LSI_CTL_PWEN
  638. CA91CX42_LSI_CTL_SUPER_M
  639. CA91CX42_LSI_CTL_SUPER_NPRIV
  640. CA91CX42_LSI_CTL_SUPER_SUPR
  641. CA91CX42_LSI_CTL_VAS_A16
  642. CA91CX42_LSI_CTL_VAS_A24
  643. CA91CX42_LSI_CTL_VAS_A32
  644. CA91CX42_LSI_CTL_VAS_CRCSR
  645. CA91CX42_LSI_CTL_VAS_M
  646. CA91CX42_LSI_CTL_VAS_USER1
  647. CA91CX42_LSI_CTL_VAS_USER2
  648. CA91CX42_LSI_CTL_VCT_BLT
  649. CA91CX42_LSI_CTL_VCT_M
  650. CA91CX42_LSI_CTL_VCT_MBLT
  651. CA91CX42_LSI_CTL_VDW_D16
  652. CA91CX42_LSI_CTL_VDW_D32
  653. CA91CX42_LSI_CTL_VDW_D64
  654. CA91CX42_LSI_CTL_VDW_D8
  655. CA91CX42_LSI_CTL_VDW_M
  656. CA91CX42_MISC_CTL_BI
  657. CA91CX42_MISC_CTL_ENGBI
  658. CA91CX42_MISC_CTL_RESCIND
  659. CA91CX42_MISC_CTL_RESERVED
  660. CA91CX42_MISC_CTL_SW_LRST
  661. CA91CX42_MISC_CTL_SW_SRST
  662. CA91CX42_MISC_CTL_SYSCON
  663. CA91CX42_MISC_CTL_V64AUTO
  664. CA91CX42_MISC_CTL_VARB
  665. CA91CX42_MISC_CTL_VARBTO
  666. CA91CX42_MISC_CTL_VBTO
  667. CA91CX42_OF_LMISC_CRT
  668. CA91CX42_OF_LMISC_CWT
  669. CA91CX42_OF_MAST_CTL_BUS_NO
  670. CA91CX42_OF_MAST_CTL_MAXRTRY
  671. CA91CX42_OF_MAST_CTL_PWON
  672. CA91CX42_OF_MAST_CTL_VRL
  673. CA91CX42_OF_MISC_CTL_VARBTO
  674. CA91CX42_OF_MISC_CTL_VBTO
  675. CA91CX42_OF_MISC_STAT_DY4AUTOID
  676. CA91CX42_OF_PCI_CLASS_BASE
  677. CA91CX42_OF_PCI_CLASS_PROG
  678. CA91CX42_OF_PCI_CLASS_RID
  679. CA91CX42_OF_PCI_CLASS_RID_UNIVERSE_I
  680. CA91CX42_OF_PCI_CLASS_RID_UNIVERSE_II
  681. CA91CX42_OF_PCI_CLASS_SUB
  682. CA91CX42_OF_PCI_MISC0_LTIMER
  683. CA91CX42_OF_SLSI_BS
  684. CA91CX42_OF_SLSI_LAS
  685. CA91CX42_OF_SLSI_PGM
  686. CA91CX42_OF_SLSI_SUPER
  687. CA91CX42_OF_SLSI_VDW
  688. CA91CX42_OF_VRAI_CTL_PGM
  689. CA91CX42_OF_VRAI_CTL_SUPER
  690. CA91CX42_OF_VRAI_CTL_VAS
  691. CA91CX42_PCI_BS
  692. CA91CX42_PCI_CLASS
  693. CA91CX42_PCI_CSR
  694. CA91CX42_PCI_ID
  695. CA91CX42_PCI_MISC0
  696. CA91CX42_PCI_MISC1
  697. CA91CX42_SCYC_CTL_CYC_ADOH
  698. CA91CX42_SCYC_CTL_CYC_M
  699. CA91CX42_SCYC_CTL_CYC_RMW
  700. CA91CX42_SCYC_CTL_LAS_PCIIO
  701. CA91CX42_SCYC_CTL_LAS_PCIMEM
  702. CA91CX42_VCSR_BS_SLOT_M
  703. CA91CX42_VCSR_CTL_EN
  704. CA91CX42_VCSR_CTL_LAS_M
  705. CA91CX42_VCSR_CTL_LAS_PCI_CONF
  706. CA91CX42_VCSR_CTL_LAS_PCI_IO
  707. CA91CX42_VCSR_CTL_LAS_PCI_MS
  708. CA91CX42_VSI_CTL_EN
  709. CA91CX42_VSI_CTL_LAS_M
  710. CA91CX42_VSI_CTL_LAS_PCI_CONF
  711. CA91CX42_VSI_CTL_LAS_PCI_IO
  712. CA91CX42_VSI_CTL_LAS_PCI_MS
  713. CA91CX42_VSI_CTL_LD64EN
  714. CA91CX42_VSI_CTL_LLRMW
  715. CA91CX42_VSI_CTL_PGM_DATA
  716. CA91CX42_VSI_CTL_PGM_M
  717. CA91CX42_VSI_CTL_PGM_PGM
  718. CA91CX42_VSI_CTL_PREN
  719. CA91CX42_VSI_CTL_PWEN
  720. CA91CX42_VSI_CTL_SUPER_M
  721. CA91CX42_VSI_CTL_SUPER_NPRIV
  722. CA91CX42_VSI_CTL_SUPER_SUPR
  723. CA91CX42_VSI_CTL_VAS_A16
  724. CA91CX42_VSI_CTL_VAS_A24
  725. CA91CX42_VSI_CTL_VAS_A32
  726. CA91CX42_VSI_CTL_VAS_M
  727. CA91CX42_VSI_CTL_VAS_USER1
  728. CA91CX42_VSI_CTL_VAS_USER2
  729. CAAM_CMD_SZ
  730. CAAM_COMPAT_H
  731. CAAM_CRA_PRIORITY
  732. CAAM_DESC_BYTES_MAX
  733. CAAM_ERROR_H
  734. CAAM_ERROR_STR_MAX
  735. CAAM_MAX_HASH_BLOCK_SIZE
  736. CAAM_MAX_HASH_DIGEST_SIZE
  737. CAAM_MAX_HASH_KEY_SIZE
  738. CAAM_MAX_KEY_SIZE
  739. CAAM_NAPI_WEIGHT
  740. CAAM_PDB_H
  741. CAAM_PTR_SZ
  742. CAAM_PTR_SZ_MAX
  743. CAAM_PTR_SZ_MIN
  744. CAAM_QI_ENQUEUE_RETRIES
  745. CAAM_QI_MEMCACHE_SIZE
  746. CAAM_RSA_MAX_INPUT_SIZE
  747. CABAC
  748. CABAC_CONTEXT_BUFFER_MAX_SIZE
  749. CABAC_INIT_BUFFER_SIZE
  750. CABD_STAT_FAIL
  751. CABD_STAT_NORMAL
  752. CABD_STAT_OPEN
  753. CABD_STAT_SHORT
  754. CABLE1TH_DET_EN
  755. CABLESTAR_HD2
  756. CABLETRON_8390_BASE
  757. CABLETRON_8390_MEM
  758. CABLETRON_RX_START_PG
  759. CABLETRON_RX_STOP_PG
  760. CABLETRON_TX_START_PG
  761. CABLE_ATYPE
  762. CABLE_BTYPE
  763. CABLE_CTYPE
  764. CABLE_CURR_1A5
  765. CABLE_CURR_3A
  766. CABLE_CURR_5A
  767. CABLE_DETECT
  768. CABLE_DIAG_LEN
  769. CABLE_ILLEGAL_A
  770. CABLE_ILLEGAL_B
  771. CABLE_INF_I2C_ADDR
  772. CABLE_INF_I2C_BUSY
  773. CABLE_INF_INV_ADDR
  774. CABLE_INF_INV_PORT
  775. CABLE_INF_NOT_CONN
  776. CABLE_INF_NO_EEPRM
  777. CABLE_INF_OP_NOSUP
  778. CABLE_INF_PAGE_ERR
  779. CABLE_INF_QSFP_VIO
  780. CABLE_OVERRIDE_DISABLED
  781. CABLE_PLUG
  782. CABLE_RECEPTACLE
  783. CABLE_THROTTLE_ENABLE_BIT
  784. CABLE_USBSS_U2_ONLY
  785. CABLE_USBSS_U31_GEN1
  786. CABLE_USBSS_U31_GEN2
  787. CABLE_VALID_BOTH
  788. CABLE_VALID_CAPTURE
  789. CABLE_VALID_PLAYBACK
  790. CABRT
  791. CAB_STAT_INC
  792. CAB_TIMEOUT_VAL
  793. CACCUM
  794. CACHE
  795. CACHE32_UNROLL32_ALIGN
  796. CACHE32_UNROLL32_ALIGN2
  797. CACHEABILITY_ALIGN
  798. CACHEABLE
  799. CACHECTL_REG
  800. CACHEDEF
  801. CACHED_ID
  802. CACHED_IO
  803. CACHED_NET_BUFLIST
  804. CACHEFILES_CULLING
  805. CACHEFILES_DEAD
  806. CACHEFILES_DEBUG_KDEBUG
  807. CACHEFILES_DEBUG_KENTER
  808. CACHEFILES_DEBUG_KLEAVE
  809. CACHEFILES_KEYBUF_SIZE
  810. CACHEFILES_OBJECT_ACTIVE
  811. CACHEFILES_READY
  812. CACHEFILES_STATE_CHANGED
  813. CACHEFLUSH_D_INVAL
  814. CACHEFLUSH_D_PURGE
  815. CACHEFLUSH_D_WB
  816. CACHEFLUSH_I
  817. CACHEID_ASID_TAGGED
  818. CACHEID_PIPT
  819. CACHEID_VIPT
  820. CACHEID_VIPT_ALIASING
  821. CACHEID_VIPT_I_ALIASING
  822. CACHEID_VIPT_NONALIASING
  823. CACHEID_VIVT
  824. CACHELINESIZE
  825. CACHELINES_PER_PAGE
  826. CACHELINE_ALIGNED_DATA
  827. CACHELINE_BITS
  828. CACHELINE_BYTES
  829. CACHELINE_DWORDS
  830. CACHELINE_FREE
  831. CACHELINE_PER_PAGE_SHIFT
  832. CACHELINE_SIZE
  833. CACHELSREG
  834. CACHEMISS
  835. CACHEOP
  836. CACHEOP_MASK
  837. CACHESERVICE
  838. CACHESIZE
  839. CACHETAG_LEN
  840. CACHE_ALIGN
  841. CACHE_ALLOCATE_POLICY_MASK
  842. CACHE_ALL_EN
  843. CACHE_ALL_LOOP
  844. CACHE_ATTR
  845. CACHE_BYPASS
  846. CACHE_CACHABLE_COW
  847. CACHE_CACHE
  848. CACHE_CLEANED
  849. CACHE_CLR
  850. CACHE_CNTL
  851. CACHE_COLOR
  852. CACHE_COLORS_MSK
  853. CACHE_COLORS_NUM
  854. CACHE_COLOUR
  855. CACHE_CONFIG
  856. CACHE_CREATE_MASK
  857. CACHE_CSTABLE
  858. CACHE_CTL_mskDCALCK
  859. CACHE_CTL_mskDCCWF
  860. CACHE_CTL_mskDCPMW
  861. CACHE_CTL_mskDC_EN
  862. CACHE_CTL_mskICALCK
  863. CACHE_CTL_mskIC_EN
  864. CACHE_CTL_offDCALCK
  865. CACHE_CTL_offDCCWF
  866. CACHE_CTL_offDCPMW
  867. CACHE_CTL_offDC_EN
  868. CACHE_CTL_offICALCK
  869. CACHE_CTL_offIC_EN
  870. CACHE_DEFAULT
  871. CACHE_DENTRIES
  872. CACHE_DEPTH
  873. CACHE_DESC_SHAPE
  874. CACHE_DISABLE
  875. CACHE_DLIMIT
  876. CACHE_DLINESIZE
  877. CACHE_DRV_CNT
  878. CACHE_DRV_INFO
  879. CACHE_DRV_LIST
  880. CACHE_DSEGMENTS
  881. CACHE_DSIZE
  882. CACHE_ENABLE
  883. CACHE_ERR_AREA_SIZE
  884. CACHE_ERR_ECCFRAME
  885. CACHE_ERR_EFRAME
  886. CACHE_ERR_IBASE_PTR
  887. CACHE_ERR_OFF
  888. CACHE_ERR_SP
  889. CACHE_ERR_SP_PTR
  890. CACHE_EVENT_ATTR
  891. CACHE_EVENT_PTR
  892. CACHE_FIFO_SIZE
  893. CACHE_FLUSH
  894. CACHE_FLUSH_AND_INV_EVENT
  895. CACHE_FLUSH_AND_INV_EVENT_TS
  896. CACHE_FLUSH_AND_INV_TS_EVENT
  897. CACHE_FLUSH_IS_SAFE
  898. CACHE_FLUSH_TS
  899. CACHE_FSCACHE
  900. CACHE_IC_ADDRESS_ARRAY
  901. CACHE_ID
  902. CACHE_IMPOS_RCVD
  903. CACHE_INFO
  904. CACHE_INIT
  905. CACHE_INV
  906. CACHE_INVALIDATE
  907. CACHE_INVALIDATED
  908. CACHE_INVALIDATEI
  909. CACHE_INVALIDATION
  910. CACHE_INVTYPED
  911. CACHE_INVTYPEI
  912. CACHE_ITS
  913. CACHE_LICF
  914. CACHE_LINE
  915. CACHE_LINESIZE
  916. CACHE_LINE_MASK
  917. CACHE_LINE_SHIFT
  918. CACHE_LINE_SIZE
  919. CACHE_LINE_SIZE_SHIFT
  920. CACHE_LINE__CACHE_LINE_SIZE_MASK
  921. CACHE_LINE__CACHE_LINE_SIZE__MASK
  922. CACHE_LINE__CACHE_LINE_SIZE__SHIFT
  923. CACHE_LOOP_LIMITS
  924. CACHE_LOOSE
  925. CACHE_LRU_RD
  926. CACHE_LRU_WR
  927. CACHE_MAX_CONCURRENT_LOCKS
  928. CACHE_MAX_LEVEL
  929. CACHE_MMAP
  930. CACHE_MODE
  931. CACHE_MODE_0
  932. CACHE_MODE_0_GEN7
  933. CACHE_MODE_1
  934. CACHE_MODE_NONE
  935. CACHE_MODE_WRITEAROUND
  936. CACHE_MODE_WRITEBACK
  937. CACHE_MODE_WRITETHROUGH
  938. CACHE_MPAGE
  939. CACHE_MPAGE_LEN
  940. CACHE_NEGATIVE
  941. CACHE_NEW_EXPIRY
  942. CACHE_NOA
  943. CACHE_NONE
  944. CACHE_NR_BANKS
  945. CACHE_NR_REGS
  946. CACHE_OC_ADDRESS_ARRAY
  947. CACHE_OC_DATA_ARRAY
  948. CACHE_OC_N_SYNBITS
  949. CACHE_OC_SYN_MASK
  950. CACHE_OC_SYN_SHIFT
  951. CACHE_OFFSET
  952. CACHE_OMS
  953. CACHE_OP_ERR
  954. CACHE_OP_NONSENSE
  955. CACHE_OP_UNSUPPORTED
  956. CACHE_PAGE_COUNT
  957. CACHE_PAGE_DIRTY
  958. CACHE_PAGE_PRESENT
  959. CACHE_PAGE_SIZE
  960. CACHE_PENDING
  961. CACHE_PHYSADDR_MASK
  962. CACHE_POLICY_NAME_SIZE
  963. CACHE_POLICY_VERSION_SIZE
  964. CACHE_PREFETCH
  965. CACHE_PRG
  966. CACHE_PUSH
  967. CACHE_RANGE_LOOP_1
  968. CACHE_RANGE_LOOP_2
  969. CACHE_READ
  970. CACHE_READ_ALLOCATE
  971. CACHE_READ_ENABLE
  972. CACHE_READ_ENABLE__FLAG
  973. CACHE_READ_OEM_STRING_RECORD
  974. CACHE_READ_POLICY_L2__DEFAULT
  975. CACHE_READ_POLICY_L2__LRU
  976. CACHE_READ_POLICY_L2__NOA
  977. CACHE_READ_POLICY_L2__STREAM
  978. CACHE_REGION_END
  979. CACHE_REGION_START
  980. CACHE_REPLACEMENT_FIFO
  981. CACHE_REPLACEMENT_LRU
  982. CACHE_REPLACEMENT_RANDOM
  983. CACHE_SCOPE_NOTEXISTS
  984. CACHE_SCOPE_PRIVATE
  985. CACHE_SCOPE_RESERVED
  986. CACHE_SCOPE_SHARED
  987. CACHE_SET
  988. CACHE_SET_IO_DISABLE
  989. CACHE_SET_RUNNING
  990. CACHE_SET_SIZE
  991. CACHE_SET_STOPPING
  992. CACHE_SET_UNREGISTERING
  993. CACHE_SIZE
  994. CACHE_SLINE_SIZE
  995. CACHE_STREAM
  996. CACHE_STRIDE_SHIFT
  997. CACHE_SUPERBLOCK_LOCATION
  998. CACHE_SUPERBLOCK_MAGIC
  999. CACHE_TAUROS2_LINEFILL_BURST8
  1000. CACHE_TAUROS2_PREFETCH_ON
  1001. CACHE_TIME
  1002. CACHE_TIMEOUT
  1003. CACHE_TI_DATA
  1004. CACHE_TI_INSTRUCTION
  1005. CACHE_TI_UNIFIED
  1006. CACHE_TYPE
  1007. CACHE_TYPE_DATA
  1008. CACHE_TYPE_DCACHE
  1009. CACHE_TYPE_ICACHE
  1010. CACHE_TYPE_INST
  1011. CACHE_TYPE_INSTRUCTION
  1012. CACHE_TYPE_NOCACHE
  1013. CACHE_TYPE_SEPARATE
  1014. CACHE_TYPE_UNIFIED
  1015. CACHE_TYPE_UNIFIED_D
  1016. CACHE_UNSTABLE
  1017. CACHE_UPDATE_MODE
  1018. CACHE_UPDATE_PERIOD
  1019. CACHE_VALID
  1020. CACHE_VALID_JIFFIES
  1021. CACHE_WAY
  1022. CACHE_WAYS
  1023. CACHE_WAY_PER_SET
  1024. CACHE_WAY_SIZE
  1025. CACHE_WB_NO_ALLOC
  1026. CACHE_WRITE
  1027. CACHE_WRITE_ALLOCATE
  1028. CACHE_WRITE_BACK
  1029. CACHE_WRITE_ENABLE
  1030. CACHE_WRITE_ENABLE__FLAG
  1031. CACHE_WRITE_POLICY_L2__BYPASS
  1032. CACHE_WRITE_POLICY_L2__DEFAULT
  1033. CACHE_WRITE_POLICY_L2__LRU
  1034. CACHE_WRITE_POLICY_L2__NOA
  1035. CACHE_WRITE_POLICY_L2__STREAM
  1036. CACHE_WRITE_POLICY_MASK
  1037. CACHE_WRITE_THROUGH
  1038. CACHING_CTL_WAKE_UP
  1039. CACK
  1040. CACRR
  1041. CACR_BCINVA
  1042. CACR_BEC
  1043. CACR_CDPI
  1044. CACR_CEIB
  1045. CACR_CENB
  1046. CACR_CFRZ
  1047. CACR_CINV
  1048. CACR_CINVA
  1049. CACR_DBWE
  1050. CACR_DCINVA
  1051. CACR_DCM
  1052. CACR_DCM_CB
  1053. CACR_DCM_IMPRE
  1054. CACR_DCM_PRE
  1055. CACR_DCM_WT
  1056. CACR_DDCM_CP
  1057. CACR_DDCM_IMP
  1058. CACR_DDCM_P
  1059. CACR_DDCM_WT
  1060. CACR_DDPI
  1061. CACR_DEC
  1062. CACR_DESB
  1063. CACR_DHCLK
  1064. CACR_DISD
  1065. CACR_DISI
  1066. CACR_DNFB
  1067. CACR_DPI
  1068. CACR_DWP
  1069. CACR_EC
  1070. CACR_ESB
  1071. CACR_EUSP
  1072. CACR_HLCK
  1073. CACR_ICINVA
  1074. CACR_IDCM
  1075. CACR_IDPI
  1076. CACR_IEC
  1077. CACR_IHLCK
  1078. CACR_INVD
  1079. CACR_INVI
  1080. CACR_WPROTECT
  1081. CAC_ACC_NW_NUM_OF_SIGNALS
  1082. CAC_ADDR
  1083. CAC_BASE
  1084. CAC_EN
  1085. CAC_INDICATION_ADMISSION
  1086. CAC_INDICATION_ADMISSION_RESP
  1087. CAC_INDICATION_DELETE
  1088. CAC_INDICATION_NO_RESP
  1089. CAC_WEIGHT_LKG_DC_3__WEIGHT_LKG_DC_SIG4_MASK
  1090. CAC_WEIGHT_LKG_DC_3__WEIGHT_LKG_DC_SIG4__SHIFT
  1091. CAC_WEIGHT_LKG_DC_3__WEIGHT_LKG_DC_SIG5_MASK
  1092. CAC_WEIGHT_LKG_DC_3__WEIGHT_LKG_DC_SIG5__SHIFT
  1093. CAC_WINDOW
  1094. CAC_WINDOW_MASK
  1095. CADL
  1096. CADU
  1097. CAFE_GLOBAL_CTRL
  1098. CAFE_GLOBAL_IRQ
  1099. CAFE_GLOBAL_IRQ_MASK
  1100. CAFE_NAND_ADDR1
  1101. CAFE_NAND_ADDR2
  1102. CAFE_NAND_CTRL1
  1103. CAFE_NAND_CTRL2
  1104. CAFE_NAND_CTRL3
  1105. CAFE_NAND_DATA_LEN
  1106. CAFE_NAND_DMA_ADDR0
  1107. CAFE_NAND_DMA_ADDR1
  1108. CAFE_NAND_DMA_CTRL
  1109. CAFE_NAND_ECC_RESULT
  1110. CAFE_NAND_ECC_SYN01
  1111. CAFE_NAND_ECC_SYN23
  1112. CAFE_NAND_ECC_SYN45
  1113. CAFE_NAND_ECC_SYN67
  1114. CAFE_NAND_IRQ
  1115. CAFE_NAND_IRQ_MASK
  1116. CAFE_NAND_NONMEM
  1117. CAFE_NAND_READ_DATA
  1118. CAFE_NAND_RESET
  1119. CAFE_NAND_STATUS
  1120. CAFE_NAND_TIMING1
  1121. CAFE_NAND_TIMING2
  1122. CAFE_NAND_TIMING3
  1123. CAFE_NAND_WRITE_DATA
  1124. CAFE_SMBUS_TIMEOUT
  1125. CAFE_VERSION
  1126. CAFL_STRIDE
  1127. CAIAQ_AUDIO_H
  1128. CAIAQ_CONTROL_H
  1129. CAIAQ_DEVICE_H
  1130. CAIAQ_INPUT_H
  1131. CAIAQ_MIDI_H
  1132. CAIAQ_USB_STR_LEN
  1133. CAICOS_CGCG_CGLS_DEFAULT_LENGTH
  1134. CAICOS_CGCG_CGLS_DISABLE_LENGTH
  1135. CAICOS_CGCG_CGLS_ENABLE_LENGTH
  1136. CAICOS_GB_ADDR_CONFIG_GOLDEN
  1137. CAICOS_MGCGCGTSSMCTRL_DFLT
  1138. CAICOS_MGCG_DEFAULT_LENGTH
  1139. CAICOS_MGCG_DISABLE_LENGTH
  1140. CAICOS_MGCG_ENABLE_LENGTH
  1141. CAICOS_SMC_INT_VECTOR_SIZE
  1142. CAICOS_SMC_INT_VECTOR_START
  1143. CAICOS_SMC_UCODE_SIZE
  1144. CAICOS_SMC_UCODE_START
  1145. CAICOS_SYSLS_DEFAULT_LENGTH
  1146. CAICOS_SYSLS_DISABLE_LENGTH
  1147. CAICOS_SYSLS_ENABLE_LENGTH
  1148. CAIFPROTO_AT
  1149. CAIFPROTO_DATAGRAM
  1150. CAIFPROTO_DATAGRAM_LOOP
  1151. CAIFPROTO_DEBUG
  1152. CAIFPROTO_MAX
  1153. CAIFPROTO_RFM
  1154. CAIFPROTO_UTIL
  1155. CAIFSO_LINK_SELECT
  1156. CAIFSO_REQ_PARAM
  1157. CAIFSO_RSP_PARAM
  1158. CAIF_APP_DEBUG_SERVICE
  1159. CAIF_ATTYPE_PLAIN
  1160. CAIF_CONNECTED
  1161. CAIF_CONNECTING
  1162. CAIF_CTRLCMD_DEINIT_RSP
  1163. CAIF_CTRLCMD_FLOW_OFF_IND
  1164. CAIF_CTRLCMD_FLOW_ON_IND
  1165. CAIF_CTRLCMD_INIT_FAIL_RSP
  1166. CAIF_CTRLCMD_INIT_RSP
  1167. CAIF_CTRLCMD_REMOTE_SHUTDOWN_IND
  1168. CAIF_CTRL_CHANNEL
  1169. CAIF_DEBUG_INTERACTIVE
  1170. CAIF_DEBUG_TRACE
  1171. CAIF_DEBUG_TRACE_INTERACTIVE
  1172. CAIF_DEVICE_H_
  1173. CAIF_DEV_H_
  1174. CAIF_DIR_IN
  1175. CAIF_DIR_OUT
  1176. CAIF_DISCONNECTED
  1177. CAIF_FLOW_OFF_SENT
  1178. CAIF_HSI_H_
  1179. CAIF_LAYER_H_
  1180. CAIF_LAYER_NAME_SZ
  1181. CAIF_LINK_HIGH_BANDW
  1182. CAIF_LINK_LOW_LATENCY
  1183. CAIF_MAX_MTU
  1184. CAIF_MAX_SPI_FRAME
  1185. CAIF_MAX_SPI_PKTS
  1186. CAIF_MODEMCMD_FLOW_OFF_REQ
  1187. CAIF_MODEMCMD_FLOW_ON_REQ
  1188. CAIF_NET_DEFAULT_QUEUE_LEN
  1189. CAIF_PRIO_HIGH
  1190. CAIF_PRIO_LOW
  1191. CAIF_PRIO_MAX
  1192. CAIF_PRIO_MIN
  1193. CAIF_PRIO_NORMAL
  1194. CAIF_RADIO_DEBUG_SERVICE
  1195. CAIF_SENDING
  1196. CAIF_SHUTDOWN
  1197. CAIF_SPI_H_
  1198. CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1
  1199. CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2
  1200. CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3
  1201. CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN4
  1202. CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_MASK
  1203. CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_SHIFT
  1204. CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1
  1205. CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2
  1206. CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3
  1207. CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4
  1208. CAIL_PCIE_LINK_SPEED_SUPPORT_MASK
  1209. CAIL_PCIE_LINK_SPEED_SUPPORT_SHIFT
  1210. CAIL_PCIE_LINK_WIDTH_SUPPORT_SHIFT
  1211. CAIL_PCIE_LINK_WIDTH_SUPPORT_X1
  1212. CAIL_PCIE_LINK_WIDTH_SUPPORT_X12
  1213. CAIL_PCIE_LINK_WIDTH_SUPPORT_X16
  1214. CAIL_PCIE_LINK_WIDTH_SUPPORT_X2
  1215. CAIL_PCIE_LINK_WIDTH_SUPPORT_X32
  1216. CAIL_PCIE_LINK_WIDTH_SUPPORT_X4
  1217. CAIL_PCIE_LINK_WIDTH_SUPPORT_X8
  1218. CAKE_ACK_AGGRESSIVE
  1219. CAKE_ACK_FILTER
  1220. CAKE_ACK_MAX
  1221. CAKE_ACK_NONE
  1222. CAKE_ATM_ATM
  1223. CAKE_ATM_MAX
  1224. CAKE_ATM_NONE
  1225. CAKE_ATM_PTM
  1226. CAKE_DIFFSERV_BESTEFFORT
  1227. CAKE_DIFFSERV_DIFFSERV3
  1228. CAKE_DIFFSERV_DIFFSERV4
  1229. CAKE_DIFFSERV_DIFFSERV8
  1230. CAKE_DIFFSERV_MAX
  1231. CAKE_DIFFSERV_PRECEDENCE
  1232. CAKE_FLAG_AUTORATE_INGRESS
  1233. CAKE_FLAG_INGRESS
  1234. CAKE_FLAG_OVERHEAD
  1235. CAKE_FLAG_SPLIT_GSO
  1236. CAKE_FLAG_WASH
  1237. CAKE_FLOW_DST_IP
  1238. CAKE_FLOW_DUAL_DST
  1239. CAKE_FLOW_DUAL_SRC
  1240. CAKE_FLOW_FLOWS
  1241. CAKE_FLOW_HOSTS
  1242. CAKE_FLOW_MASK
  1243. CAKE_FLOW_MAX
  1244. CAKE_FLOW_NAT_FLAG
  1245. CAKE_FLOW_NONE
  1246. CAKE_FLOW_SRC_IP
  1247. CAKE_FLOW_TRIPLE
  1248. CAKE_MAX_TINS
  1249. CAKE_QUEUES
  1250. CAKE_SET_BULK
  1251. CAKE_SET_DECAYING
  1252. CAKE_SET_NONE
  1253. CAKE_SET_SPARSE
  1254. CAKE_SET_SPARSE_WAIT
  1255. CAKE_SET_WAYS
  1256. CAL2_LATCH
  1257. CAL2_MS
  1258. CAL2_PIT_LOOPS
  1259. CALCULATED_M
  1260. CALCULATE_BER
  1261. CALCULATE_SNR
  1262. CALCULATE_SWINGTALBE_OFFSET
  1263. CALCULATE_WD_LOAD_VALUE
  1264. CALC_AAD_HASH
  1265. CALC_BURST_RATE
  1266. CALC_CLKCYC
  1267. CALC_DENT_SIZE
  1268. CALC_DIV
  1269. CALC_K
  1270. CALC_K192
  1271. CALC_K192_2
  1272. CALC_K256
  1273. CALC_K256_2
  1274. CALC_K_2
  1275. CALC_MODE_MASK_REG
  1276. CALC_OSCSET
  1277. CALC_PLL_CLK_SRC_ERR_TOLERANCE
  1278. CALC_RATIOSET
  1279. CALC_REGADDR
  1280. CALC_S
  1281. CALC_SB192_2
  1282. CALC_SB256_2
  1283. CALC_SB_2
  1284. CALC_TARGET_NEED_RESEND
  1285. CALC_TARGET_NO_ACTION
  1286. CALC_TARGET_POOL_DNE
  1287. CALC_TXRX_PADDED_LEN
  1288. CALC_WORD
  1289. CALC_XATTR_BYTES
  1290. CALDAC0_I2C_ADDR
  1291. CALDAC1_I2C_ADDR
  1292. CALDONE_MASK
  1293. CALDONE_SHIFT
  1294. CALDUTY
  1295. CALGARY_CONFIG_REG
  1296. CALGN
  1297. CALIAS_BASE
  1298. CALIBRATE_CMD
  1299. CALIBRATE_GPIO
  1300. CALIBRATE_LATCH
  1301. CALIBRATE_TIME_MSEC
  1302. CALIBRATION_ADJUST
  1303. CALIBRATION_ADJUST_DEFAULT
  1304. CALIBRATION_CFG_CMD
  1305. CALIBRATION_COMPLETE_EVENT_ID
  1306. CALIBRATION_COMPLETE_NOTIFICATION
  1307. CALIBRATION_CONTROL
  1308. CALIBRATION_DISABLED
  1309. CALIBRATION_DONE
  1310. CALIBRATION_ENABLED_INITIAL_ONLY
  1311. CALIBRATION_ENABLED_INITIAL_PERIODIC
  1312. CALIBRATION_ERR
  1313. CALIBRATION_MASK
  1314. CALIBRATION_REG
  1315. CALIBRATION_REG1
  1316. CALIBRATION_REG1_DEFAULT
  1317. CALIBRATION_REG2
  1318. CALIBRATION_REG2_DEFAULT
  1319. CALIBRATION_REG3
  1320. CALIBRATION_REG3_DEFAULT
  1321. CALIBRATION_REQUEST
  1322. CALIBRATION_RES_NOTIFICATION
  1323. CALIBRATION_RETRY_MAX
  1324. CALIBRATION_STATUS
  1325. CALIBRATION_TYPE_DEFAULT
  1326. CALIBRATION_TYPE_SPECIAL
  1327. CALIB_BASE_SYSFS
  1328. CALIB_BUF0_DEGC_CALI
  1329. CALIB_BUF0_O_SLOPE
  1330. CALIB_BUF0_O_SLOPE_SIGN
  1331. CALIB_BUF0_VALID
  1332. CALIB_BUF0_VTS_TS1
  1333. CALIB_BUF0_VTS_TS2
  1334. CALIB_BUF1_ADC_GE
  1335. CALIB_BUF1_ID
  1336. CALIB_BUF1_VTS_TS3
  1337. CALIB_BUF2_VTS_TS4
  1338. CALIB_BUF2_VTS_TS5
  1339. CALIB_BUF2_VTS_TSABB
  1340. CALIB_CH_GROUP_1
  1341. CALIB_CH_GROUP_2
  1342. CALIB_CH_GROUP_3
  1343. CALIB_CH_GROUP_4
  1344. CALIB_CH_GROUP_5
  1345. CALIB_CH_GROUP_MAX
  1346. CALIB_COEFFICIENT
  1347. CALIB_FRAC
  1348. CALIB_FRAC_BITS
  1349. CALIB_FRAC_HALF
  1350. CALIB_H
  1351. CALIB_IL_TX_ATTEN_GR1_FCH
  1352. CALIB_IL_TX_ATTEN_GR1_LCH
  1353. CALIB_IL_TX_ATTEN_GR2_FCH
  1354. CALIB_IL_TX_ATTEN_GR2_LCH
  1355. CALIB_IL_TX_ATTEN_GR3_FCH
  1356. CALIB_IL_TX_ATTEN_GR3_LCH
  1357. CALIB_IL_TX_ATTEN_GR4_FCH
  1358. CALIB_IL_TX_ATTEN_GR4_LCH
  1359. CALIB_IL_TX_ATTEN_GR5_FCH
  1360. CALIB_IL_TX_ATTEN_GR5_LCH
  1361. CALIB_RESULT_SIGNATURE
  1362. CALIB_RES_NOTIF_PHY_DB
  1363. CALIB_SCALE
  1364. CALIB_SHIFT_IBAT
  1365. CALIPSO_CACHE_BUCKETBITS
  1366. CALIPSO_CACHE_BUCKETS
  1367. CALIPSO_CACHE_REORDERLIMIT
  1368. CALIPSO_DOI_UNKNOWN
  1369. CALIPSO_HDR_LEN
  1370. CALIPSO_MAP_PASS
  1371. CALIPSO_MAP_UNKNOWN
  1372. CALIPSO_MAX_BUFFER
  1373. CALIPSO_OPT_LEN_MAX
  1374. CALIPSO_OPT_LEN_MAX_WITH_PAD
  1375. CALL
  1376. CALLBACK
  1377. CALLBACKF_mask_events
  1378. CALLBACKOP_register
  1379. CALLBACKOP_unregister
  1380. CALLBACKTYPE_event
  1381. CALLBACKTYPE_failsafe
  1382. CALLBACKTYPE_nmi
  1383. CALLBACKTYPE_syscall
  1384. CALLBACKTYPE_syscall32
  1385. CALLBACKTYPE_sysenter
  1386. CALLBACKTYPE_sysenter_deprecated
  1387. CALLBACK_CONTEXT
  1388. CALLBACK_PENDING
  1389. CALLBACK_TIMEOUT
  1390. CALLBACK_TIMEOUT_MS
  1391. CALLCHAIN_DEFAULT_OPT
  1392. CALLCHAIN_DWARF
  1393. CALLCHAIN_FP
  1394. CALLCHAIN_HELP
  1395. CALLCHAIN_LBR
  1396. CALLCHAIN_MAX
  1397. CALLCHAIN_NONE
  1398. CALLCHAIN_PARAM_DEFAULT
  1399. CALLCHAIN_RECORD_HELP
  1400. CALLCHAIN_REPORT_HELP
  1401. CALLEE_FLOAT_FRAME_SIZE
  1402. CALLEE_MASK
  1403. CALLEE_POP_MASK
  1404. CALLEE_PUSH_MASK
  1405. CALLEE_REG_FRAME_SIZE
  1406. CALLEE_SAVE_FRAME_SIZE
  1407. CALLER_ADDR
  1408. CALLER_ADDR0
  1409. CALLER_ADDR1
  1410. CALLER_ADDR2
  1411. CALLER_ADDR3
  1412. CALLER_ADDR4
  1413. CALLER_ADDR5
  1414. CALLER_ADDR6
  1415. CALLER_FRAME
  1416. CALLER_SAVED_REGS
  1417. CALLER_SYNDROME
  1418. CALLFRAME_SIZ
  1419. CALLONES
  1420. CALLPTR
  1421. CALLS_PER_LOOP
  1422. CALLZEROS
  1423. CALL_ADDR
  1424. CALL_AGAIN
  1425. CALL_ARGS_0
  1426. CALL_ARGS_1
  1427. CALL_ARGS_2
  1428. CALL_ARGS_3
  1429. CALL_ARGS_4
  1430. CALL_ARGS_5
  1431. CALL_CLOBBER_0
  1432. CALL_CLOBBER_1
  1433. CALL_CLOBBER_2
  1434. CALL_CLOBBER_3
  1435. CALL_CLOBBER_4
  1436. CALL_CLOBBER_5
  1437. CALL_FMT_0
  1438. CALL_FMT_1
  1439. CALL_FMT_2
  1440. CALL_FMT_3
  1441. CALL_FMT_4
  1442. CALL_FMT_5
  1443. CALL_FUNCTION_SINGLE_VECTOR
  1444. CALL_FUNCTION_VECTOR
  1445. CALL_INSN_SIZE
  1446. CALL_INT
  1447. CALL_IS_READ
  1448. CALL_IS_SET_FRONTEND
  1449. CALL_NOSPEC
  1450. CALL_ON_STACK
  1451. CALL_PATH_BLOCK_MASK
  1452. CALL_PATH_BLOCK_SHIFT
  1453. CALL_PATH_BLOCK_SIZE
  1454. CALL_RAW_FUNC
  1455. CALL_RETURN_NON_CALL
  1456. CALL_RETURN_NO_CALL
  1457. CALL_RETURN_NO_RETURN
  1458. CALL_RXH
  1459. CALL_TXH
  1460. CALPRESCALE
  1461. CALSUM
  1462. CALShift
  1463. CALTMODE
  1464. CALTMR_EN
  1465. CALXEDA_IDLE_PARAM
  1466. CAL_16LONG
  1467. CAL_32LONG
  1468. CAL_8LONG
  1469. CAL_BYS_CTRL1
  1470. CAL_BYS_CTRL1_BYSINEN_MASK
  1471. CAL_BYS_CTRL1_PCLK_MASK
  1472. CAL_BYS_CTRL1_XBLK_MASK
  1473. CAL_BYS_CTRL1_YBLK_MASK
  1474. CAL_BYS_CTRL2
  1475. CAL_BYS_CTRL2_CPORTIN_MASK
  1476. CAL_BYS_CTRL2_CPORTOUT_MASK
  1477. CAL_BYS_CTRL2_DUPLICATEDDATA_MASK
  1478. CAL_BYS_CTRL2_DUPLICATEDDATA_NO
  1479. CAL_BYS_CTRL2_DUPLICATEDDATA_YES
  1480. CAL_BYS_CTRL2_FREERUNNING_MASK
  1481. CAL_BYS_CTRL2_FREERUNNING_NO
  1482. CAL_BYS_CTRL2_FREERUNNING_YES
  1483. CAL_CHANNEL_BITS
  1484. CAL_CHANNEL_MASK
  1485. CAL_COUNTER_MASK
  1486. CAL_COUNTER_OVERFLOW_BIT
  1487. CAL_CSI2_COMPLEXIO_CFG
  1488. CAL_CSI2_COMPLEXIO_CFG_CLOCK_POL_MASK
  1489. CAL_CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK
  1490. CAL_CSI2_COMPLEXIO_CFG_DATA1_POL_MASK
  1491. CAL_CSI2_COMPLEXIO_CFG_DATA1_POSITION_MASK
  1492. CAL_CSI2_COMPLEXIO_CFG_DATA2_POL_MASK
  1493. CAL_CSI2_COMPLEXIO_CFG_DATA2_POSITION_MASK
  1494. CAL_CSI2_COMPLEXIO_CFG_DATA3_POL_MASK
  1495. CAL_CSI2_COMPLEXIO_CFG_DATA3_POSITION_MASK
  1496. CAL_CSI2_COMPLEXIO_CFG_DATA4_POL_MASK
  1497. CAL_CSI2_COMPLEXIO_CFG_DATA4_POSITION_MASK
  1498. CAL_CSI2_COMPLEXIO_CFG_POL_MINUSPLUS
  1499. CAL_CSI2_COMPLEXIO_CFG_POL_PLUSMINUS
  1500. CAL_CSI2_COMPLEXIO_CFG_POSITION_1
  1501. CAL_CSI2_COMPLEXIO_CFG_POSITION_2
  1502. CAL_CSI2_COMPLEXIO_CFG_POSITION_3
  1503. CAL_CSI2_COMPLEXIO_CFG_POSITION_4
  1504. CAL_CSI2_COMPLEXIO_CFG_POSITION_5
  1505. CAL_CSI2_COMPLEXIO_CFG_POSITION_NOT_USED
  1506. CAL_CSI2_COMPLEXIO_CFG_PWR_AUTO_MASK
  1507. CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK
  1508. CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF
  1509. CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON
  1510. CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ULP
  1511. CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK
  1512. CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_STATE_OFF
  1513. CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_STATE_ON
  1514. CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_STATE_ULP
  1515. CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL
  1516. CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK
  1517. CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_OPERATIONAL
  1518. CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK
  1519. CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED
  1520. CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETONGOING
  1521. CAL_CSI2_COMPLEXIO_IRQENABLE
  1522. CAL_CSI2_COMPLEXIO_IRQSTATUS
  1523. CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK
  1524. CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL1_MASK
  1525. CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL2_MASK
  1526. CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL3_MASK
  1527. CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL4_MASK
  1528. CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL5_MASK
  1529. CAL_CSI2_COMPLEXIO_IRQ_ERRESC1_MASK
  1530. CAL_CSI2_COMPLEXIO_IRQ_ERRESC2_MASK
  1531. CAL_CSI2_COMPLEXIO_IRQ_ERRESC3_MASK
  1532. CAL_CSI2_COMPLEXIO_IRQ_ERRESC4_MASK
  1533. CAL_CSI2_COMPLEXIO_IRQ_ERRESC5_MASK
  1534. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTHS1_MASK
  1535. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTHS2_MASK
  1536. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTHS3_MASK
  1537. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTHS4_MASK
  1538. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTHS5_MASK
  1539. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS1_MASK
  1540. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS2_MASK
  1541. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS3_MASK
  1542. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS4_MASK
  1543. CAL_CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS5_MASK
  1544. CAL_CSI2_COMPLEXIO_IRQ_FIFO_OVR_MASK
  1545. CAL_CSI2_COMPLEXIO_IRQ_SHORT_PACKET_MASK
  1546. CAL_CSI2_COMPLEXIO_IRQ_STATEALLULPMENTER_MASK
  1547. CAL_CSI2_COMPLEXIO_IRQ_STATEALLULPMEXIT_MASK
  1548. CAL_CSI2_COMPLEXIO_IRQ_STATEULPM1_MASK
  1549. CAL_CSI2_COMPLEXIO_IRQ_STATEULPM2_MASK
  1550. CAL_CSI2_COMPLEXIO_IRQ_STATEULPM3_MASK
  1551. CAL_CSI2_COMPLEXIO_IRQ_STATEULPM4_MASK
  1552. CAL_CSI2_COMPLEXIO_IRQ_STATEULPM5_MASK
  1553. CAL_CSI2_CTX0
  1554. CAL_CSI2_CTX1
  1555. CAL_CSI2_CTX2
  1556. CAL_CSI2_CTX3
  1557. CAL_CSI2_CTX4
  1558. CAL_CSI2_CTX5
  1559. CAL_CSI2_CTX6
  1560. CAL_CSI2_CTX7
  1561. CAL_CSI2_CTX_ATT
  1562. CAL_CSI2_CTX_ATT_MASK
  1563. CAL_CSI2_CTX_ATT_PIX
  1564. CAL_CSI2_CTX_CPORT_MASK
  1565. CAL_CSI2_CTX_DT_MASK
  1566. CAL_CSI2_CTX_LINES_MASK
  1567. CAL_CSI2_CTX_PACK_MODE_FRAME
  1568. CAL_CSI2_CTX_PACK_MODE_LINE
  1569. CAL_CSI2_CTX_PACK_MODE_MASK
  1570. CAL_CSI2_CTX_VC_MASK
  1571. CAL_CSI2_PHY_REG0
  1572. CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE
  1573. CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_ENABLE
  1574. CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_MASK
  1575. CAL_CSI2_PHY_REG0_THS_SETTLE_MASK
  1576. CAL_CSI2_PHY_REG0_THS_TERM_MASK
  1577. CAL_CSI2_PHY_REG1
  1578. CAL_CSI2_PHY_REG1_CLOCK_MISS_DETECTOR_STATUS_ERROR
  1579. CAL_CSI2_PHY_REG1_CLOCK_MISS_DETECTOR_STATUS_MASK
  1580. CAL_CSI2_PHY_REG1_CLOCK_MISS_DETECTOR_STATUS_SUCCESS
  1581. CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK
  1582. CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK
  1583. CAL_CSI2_PHY_REG1_RESET_DONE_STATUS_MASK
  1584. CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK
  1585. CAL_CSI2_PHY_REG1_TCLK_TERM_MASK
  1586. CAL_CSI2_PHY_REG2
  1587. CAL_CSI2_PHY_REG2_CCP2_SYNC_PATTERN_MASK
  1588. CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC0_MASK
  1589. CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC1_MASK
  1590. CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC2_MASK
  1591. CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC3_MASK
  1592. CAL_CSI2_PPI_CTRL
  1593. CAL_CSI2_PPI_CTRL_ECC_EN_MASK
  1594. CAL_CSI2_PPI_CTRL_FRAME
  1595. CAL_CSI2_PPI_CTRL_FRAME_IMMEDIATE
  1596. CAL_CSI2_PPI_CTRL_FRAME_MASK
  1597. CAL_CSI2_PPI_CTRL_IF_EN_MASK
  1598. CAL_CSI2_SHORT_PACKET
  1599. CAL_CSI2_SHORT_PACKET_MASK
  1600. CAL_CSI2_STATUS0
  1601. CAL_CSI2_STATUS1
  1602. CAL_CSI2_STATUS2
  1603. CAL_CSI2_STATUS3
  1604. CAL_CSI2_STATUS4
  1605. CAL_CSI2_STATUS5
  1606. CAL_CSI2_STATUS6
  1607. CAL_CSI2_STATUS7
  1608. CAL_CSI2_STATUS_FRAME_MASK
  1609. CAL_CSI2_TIMING
  1610. CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK
  1611. CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK
  1612. CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK
  1613. CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK
  1614. CAL_CSI2_VC_IRQENABLE
  1615. CAL_CSI2_VC_IRQSTATUS
  1616. CAL_CSI2_VC_IRQ_CS_IRQ_0_MASK
  1617. CAL_CSI2_VC_IRQ_CS_IRQ_1_MASK
  1618. CAL_CSI2_VC_IRQ_CS_IRQ_2_MASK
  1619. CAL_CSI2_VC_IRQ_CS_IRQ_3_MASK
  1620. CAL_CSI2_VC_IRQ_ECC_CORRECTION0_IRQ_0_MASK
  1621. CAL_CSI2_VC_IRQ_ECC_CORRECTION0_IRQ_1_MASK
  1622. CAL_CSI2_VC_IRQ_ECC_CORRECTION0_IRQ_2_MASK
  1623. CAL_CSI2_VC_IRQ_ECC_CORRECTION0_IRQ_3_MASK
  1624. CAL_CSI2_VC_IRQ_FE_IRQ_0_MASK
  1625. CAL_CSI2_VC_IRQ_FE_IRQ_1_MASK
  1626. CAL_CSI2_VC_IRQ_FE_IRQ_2_MASK
  1627. CAL_CSI2_VC_IRQ_FE_IRQ_3_MASK
  1628. CAL_CSI2_VC_IRQ_FS_IRQ_0_MASK
  1629. CAL_CSI2_VC_IRQ_FS_IRQ_1_MASK
  1630. CAL_CSI2_VC_IRQ_FS_IRQ_2_MASK
  1631. CAL_CSI2_VC_IRQ_FS_IRQ_3_MASK
  1632. CAL_CSI2_VC_IRQ_LE_IRQ_0_MASK
  1633. CAL_CSI2_VC_IRQ_LE_IRQ_1_MASK
  1634. CAL_CSI2_VC_IRQ_LE_IRQ_2_MASK
  1635. CAL_CSI2_VC_IRQ_LE_IRQ_3_MASK
  1636. CAL_CSI2_VC_IRQ_LS_IRQ_0_MASK
  1637. CAL_CSI2_VC_IRQ_LS_IRQ_1_MASK
  1638. CAL_CSI2_VC_IRQ_LS_IRQ_2_MASK
  1639. CAL_CSI2_VC_IRQ_LS_IRQ_3_MASK
  1640. CAL_CTRL
  1641. CAL_CTRL1
  1642. CAL_CTRL1_INTERLEAVE01_DISABLED
  1643. CAL_CTRL1_INTERLEAVE01_MASK
  1644. CAL_CTRL1_INTERLEAVE01_PIX1
  1645. CAL_CTRL1_INTERLEAVE01_PIX4
  1646. CAL_CTRL1_INTERLEAVE01_RESERVED
  1647. CAL_CTRL1_INTERLEAVE23_DISABLED
  1648. CAL_CTRL1_INTERLEAVE23_MASK
  1649. CAL_CTRL1_INTERLEAVE23_PIX1
  1650. CAL_CTRL1_INTERLEAVE23_PIX4
  1651. CAL_CTRL1_INTERLEAVE23_RESERVED
  1652. CAL_CTRL1_PPI_GROUPING_0
  1653. CAL_CTRL1_PPI_GROUPING_1
  1654. CAL_CTRL1_PPI_GROUPING_DISABLED
  1655. CAL_CTRL1_PPI_GROUPING_MASK
  1656. CAL_CTRL1_PPI_GROUPING_RESERVED
  1657. CAL_CTRL_BURSTSIZE_BURST128
  1658. CAL_CTRL_BURSTSIZE_BURST16
  1659. CAL_CTRL_BURSTSIZE_BURST32
  1660. CAL_CTRL_BURSTSIZE_BURST64
  1661. CAL_CTRL_BURSTSIZE_MASK
  1662. CAL_CTRL_LL_FORCE_STATE_MASK
  1663. CAL_CTRL_MFLAGH_MASK
  1664. CAL_CTRL_MFLAGL_MASK
  1665. CAL_CTRL_POSTED_WRITES
  1666. CAL_CTRL_POSTED_WRITES_MASK
  1667. CAL_CTRL_POSTED_WRITES_NONPOSTED
  1668. CAL_CTRL_PWRSCPCLK_AUTO
  1669. CAL_CTRL_PWRSCPCLK_FORCE
  1670. CAL_CTRL_PWRSCPCLK_MASK
  1671. CAL_CTRL_RD_DMA_STALL_MASK
  1672. CAL_CTRL_TAGCNT_MASK
  1673. CAL_CTRL__bypass_freq_lock_MASK
  1674. CAL_CTRL__bypass_freq_lock__SHIFT
  1675. CAL_CTRL__kdco_cal_dis_MASK
  1676. CAL_CTRL__kdco_cal_dis__SHIFT
  1677. CAL_CTRL__kdco_incr_cal_dis_MASK
  1678. CAL_CTRL__kdco_incr_cal_dis__SHIFT
  1679. CAL_CTRL__kdco_ratio_MASK
  1680. CAL_CTRL__kdco_ratio__SHIFT
  1681. CAL_CTRL__meas_win_sel_MASK
  1682. CAL_CTRL__meas_win_sel__SHIFT
  1683. CAL_CTRL__nctl_adj_dis_MASK
  1684. CAL_CTRL__nctl_adj_dis__SHIFT
  1685. CAL_CTRL__refclk_rate_MASK
  1686. CAL_CTRL__refclk_rate__SHIFT
  1687. CAL_CTRL__tdc_cal_ctrl_MASK
  1688. CAL_CTRL__tdc_cal_ctrl__SHIFT
  1689. CAL_CTRL__tdc_cal_en_MASK
  1690. CAL_CTRL__tdc_cal_en__SHIFT
  1691. CAL_CURRECAL
  1692. CAL_DEGC_PT1
  1693. CAL_DEGC_PT2
  1694. CAL_DIGCAL
  1695. CAL_DIGLO
  1696. CAL_DONE
  1697. CAL_EN_60XX_BIT
  1698. CAL_EN_64XX_BIT
  1699. CAL_EVENT
  1700. CAL_FULL
  1701. CAL_GAIN_BIT
  1702. CAL_GCTRL
  1703. CAL_GEN_DISABLE
  1704. CAL_GEN_ENABLE
  1705. CAL_GEN_FALSE
  1706. CAL_GEN_TRUE
  1707. CAL_HL_HWINFO
  1708. CAL_HL_HWINFO_NCPORT_MASK
  1709. CAL_HL_HWINFO_NPPI_CONTEXTS_EIGHT
  1710. CAL_HL_HWINFO_NPPI_CONTEXTS_FOUR
  1711. CAL_HL_HWINFO_NPPI_CONTEXTS_RESERVED
  1712. CAL_HL_HWINFO_NPPI_CONTEXTS_ZERO
  1713. CAL_HL_HWINFO_NPPI_CTXS0_MASK
  1714. CAL_HL_HWINFO_NPPI_CTXS1_MASK
  1715. CAL_HL_HWINFO_PCTX_MASK
  1716. CAL_HL_HWINFO_RFIFO_MASK
  1717. CAL_HL_HWINFO_VFIFO_MASK
  1718. CAL_HL_HWINFO_WCTX_MASK
  1719. CAL_HL_HWINFO_WFIFO_MASK
  1720. CAL_HL_IRQENABLE_CLR
  1721. CAL_HL_IRQENABLE_SET
  1722. CAL_HL_IRQSTATUS
  1723. CAL_HL_IRQSTATUS_RAW
  1724. CAL_HL_IRQ_CLEAR
  1725. CAL_HL_IRQ_DISABLED
  1726. CAL_HL_IRQ_ENABLE
  1727. CAL_HL_IRQ_ENABLED
  1728. CAL_HL_IRQ_EOI
  1729. CAL_HL_IRQ_EOI_LINE_NUMBER_EOI0
  1730. CAL_HL_IRQ_EOI_LINE_NUMBER_MASK
  1731. CAL_HL_IRQ_EOI_LINE_NUMBER_READ0
  1732. CAL_HL_IRQ_MASK
  1733. CAL_HL_IRQ_NOACTION
  1734. CAL_HL_IRQ_PENDING
  1735. CAL_HL_REVISION
  1736. CAL_HL_REVISION_CUSTOM_MASK
  1737. CAL_HL_REVISION_FUNC_MASK
  1738. CAL_HL_REVISION_MAJOR_MASK
  1739. CAL_HL_REVISION_MINOR_MASK
  1740. CAL_HL_REVISION_RTL_MASK
  1741. CAL_HL_REVISION_SCHEME_H08
  1742. CAL_HL_REVISION_SCHEME_LEGACY
  1743. CAL_HL_REVISION_SCHEME_MASK
  1744. CAL_HL_SYSCONFIG
  1745. CAL_HL_SYSCONFIG_IDLEMODE_FORCE
  1746. CAL_HL_SYSCONFIG_IDLEMODE_NO
  1747. CAL_HL_SYSCONFIG_IDLEMODE_SMART1
  1748. CAL_HL_SYSCONFIG_IDLEMODE_SMART2
  1749. CAL_HL_SYSCONFIG_IDLE_MASK
  1750. CAL_HL_SYSCONFIG_SOFTRESET_DONE
  1751. CAL_HL_SYSCONFIG_SOFTRESET_MASK
  1752. CAL_HL_SYSCONFIG_SOFTRESET_NOACTION
  1753. CAL_HL_SYSCONFIG_SOFTRESET_PENDING
  1754. CAL_HL_SYSCONFIG_SOFTRESET_RESET
  1755. CAL_INACTIVE
  1756. CAL_LATCH
  1757. CAL_LINE_NUMBER_EVT
  1758. CAL_LINE_NUMBER_EVT_CPORT_MASK
  1759. CAL_LINE_NUMBER_EVT_MASK
  1760. CAL_MDEGC
  1761. CAL_MODULE_NAME
  1762. CAL_MS
  1763. CAL_NF
  1764. CAL_NOUSE
  1765. CAL_NUM_CONTEXT
  1766. CAL_NUM_CSI2_PORTS
  1767. CAL_NUM_INPUT
  1768. CAL_OFFSET_THRESHOLD_64
  1769. CAL_OFFSET_VGA_64
  1770. CAL_PIT_LOOPS
  1771. CAL_PIX_PROC
  1772. CAL_PIX_PROC_CPORT_MASK
  1773. CAL_PIX_PROC_DPCMD_BYPASS
  1774. CAL_PIX_PROC_DPCMD_DPCM_10_6_1
  1775. CAL_PIX_PROC_DPCMD_DPCM_10_6_2
  1776. CAL_PIX_PROC_DPCMD_DPCM_10_7_1
  1777. CAL_PIX_PROC_DPCMD_DPCM_10_7_2
  1778. CAL_PIX_PROC_DPCMD_DPCM_10_8_1
  1779. CAL_PIX_PROC_DPCMD_DPCM_12_6_1
  1780. CAL_PIX_PROC_DPCMD_DPCM_12_7_1
  1781. CAL_PIX_PROC_DPCMD_DPCM_12_8_1
  1782. CAL_PIX_PROC_DPCMD_DPCM_14_10
  1783. CAL_PIX_PROC_DPCMD_DPCM_14_8_1
  1784. CAL_PIX_PROC_DPCMD_DPCM_16_10_1
  1785. CAL_PIX_PROC_DPCMD_DPCM_16_12_1
  1786. CAL_PIX_PROC_DPCMD_DPCM_16_8_1
  1787. CAL_PIX_PROC_DPCMD_MASK
  1788. CAL_PIX_PROC_DPCME_BYPASS
  1789. CAL_PIX_PROC_DPCME_DPCM_10_8_1
  1790. CAL_PIX_PROC_DPCME_DPCM_12_8_1
  1791. CAL_PIX_PROC_DPCME_DPCM_14_10
  1792. CAL_PIX_PROC_DPCME_DPCM_14_8_1
  1793. CAL_PIX_PROC_DPCME_DPCM_16_10_1
  1794. CAL_PIX_PROC_DPCME_DPCM_16_12_1
  1795. CAL_PIX_PROC_DPCME_DPCM_16_8_1
  1796. CAL_PIX_PROC_DPCME_MASK
  1797. CAL_PIX_PROC_EN_MASK
  1798. CAL_PIX_PROC_EXTRACT_B10
  1799. CAL_PIX_PROC_EXTRACT_B10_MIPI
  1800. CAL_PIX_PROC_EXTRACT_B12
  1801. CAL_PIX_PROC_EXTRACT_B12_MIPI
  1802. CAL_PIX_PROC_EXTRACT_B14
  1803. CAL_PIX_PROC_EXTRACT_B14_MIPI
  1804. CAL_PIX_PROC_EXTRACT_B16_BE
  1805. CAL_PIX_PROC_EXTRACT_B16_LE
  1806. CAL_PIX_PROC_EXTRACT_B6
  1807. CAL_PIX_PROC_EXTRACT_B7
  1808. CAL_PIX_PROC_EXTRACT_B8
  1809. CAL_PIX_PROC_EXTRACT_MASK
  1810. CAL_PIX_PROC_PACK_ARGB
  1811. CAL_PIX_PROC_PACK_B10_MIPI
  1812. CAL_PIX_PROC_PACK_B12
  1813. CAL_PIX_PROC_PACK_B12_MIPI
  1814. CAL_PIX_PROC_PACK_B16
  1815. CAL_PIX_PROC_PACK_B8
  1816. CAL_PIX_PROC_PACK_MASK
  1817. CAL_PLL
  1818. CAL_RD_DMA_CTRL
  1819. CAL_RD_DMA_CTRL2
  1820. CAL_RD_DMA_CTRL2_BYSOUT_LE_WAIT_FREERUNNING
  1821. CAL_RD_DMA_CTRL2_BYSOUT_LE_WAIT_MASK
  1822. CAL_RD_DMA_CTRL2_BYSOUT_LE_WAIT_WAITFORBYSOUT
  1823. CAL_RD_DMA_CTRL2_CIRC_MODE_DIS
  1824. CAL_RD_DMA_CTRL2_CIRC_MODE_FOUR
  1825. CAL_RD_DMA_CTRL2_CIRC_MODE_MASK
  1826. CAL_RD_DMA_CTRL2_CIRC_MODE_ONE
  1827. CAL_RD_DMA_CTRL2_CIRC_MODE_RESERVED
  1828. CAL_RD_DMA_CTRL2_CIRC_MODE_SIXTEEN
  1829. CAL_RD_DMA_CTRL2_CIRC_MODE_SIXTYFOUR
  1830. CAL_RD_DMA_CTRL2_CIRC_SIZE_MASK
  1831. CAL_RD_DMA_CTRL2_ICM_CSTART_MASK
  1832. CAL_RD_DMA_CTRL2_PATTERN_LINEAR
  1833. CAL_RD_DMA_CTRL2_PATTERN_MASK
  1834. CAL_RD_DMA_CTRL2_PATTERN_RD2SKIP2
  1835. CAL_RD_DMA_CTRL2_PATTERN_RD2SKIP4
  1836. CAL_RD_DMA_CTRL2_PATTERN_YUV420
  1837. CAL_RD_DMA_CTRL_BW_LIMITER_MASK
  1838. CAL_RD_DMA_CTRL_GO_BUSY
  1839. CAL_RD_DMA_CTRL_GO_DIS
  1840. CAL_RD_DMA_CTRL_GO_EN
  1841. CAL_RD_DMA_CTRL_GO_IDLE
  1842. CAL_RD_DMA_CTRL_GO_MASK
  1843. CAL_RD_DMA_CTRL_INIT_MASK
  1844. CAL_RD_DMA_CTRL_OCP_TAG_CNT_MASK
  1845. CAL_RD_DMA_CTRL_PCLK_MASK
  1846. CAL_RD_DMA_INIT_ADDR
  1847. CAL_RD_DMA_INIT_ADDR_MASK
  1848. CAL_RD_DMA_INIT_OFST
  1849. CAL_RD_DMA_INIT_OFST_MASK
  1850. CAL_RD_DMA_PIX_ADDR
  1851. CAL_RD_DMA_PIX_ADDR_MASK
  1852. CAL_RD_DMA_PIX_OFST
  1853. CAL_RD_DMA_PIX_OFST_MASK
  1854. CAL_RD_DMA_XSIZE
  1855. CAL_RD_DMA_XSIZE_MASK
  1856. CAL_RD_DMA_YSIZE
  1857. CAL_RD_DMA_YSIZE_MASK
  1858. CAL_RECAL
  1859. CAL_RETRY_CNT
  1860. CAL_RSSI
  1861. CAL_RUNNING
  1862. CAL_SEL_0_1
  1863. CAL_SEL_2
  1864. CAL_SEL_MASK
  1865. CAL_SEL_SHIFT
  1866. CAL_SEL_SHIFT_2
  1867. CAL_SNR
  1868. CAL_SOFT
  1869. CAL_SWING_OFF
  1870. CAL_TRIGGER
  1871. CAL_VERSION
  1872. CAL_VPORT_CTRL1
  1873. CAL_VPORT_CTRL1_PCLK_MASK
  1874. CAL_VPORT_CTRL1_WIDTH_MASK
  1875. CAL_VPORT_CTRL1_WIDTH_ONE
  1876. CAL_VPORT_CTRL1_WIDTH_TWO
  1877. CAL_VPORT_CTRL1_XBLK_MASK
  1878. CAL_VPORT_CTRL1_YBLK_MASK
  1879. CAL_VPORT_CTRL2
  1880. CAL_VPORT_CTRL2_CPORT_MASK
  1881. CAL_VPORT_CTRL2_FREERUNNING_FREE
  1882. CAL_VPORT_CTRL2_FREERUNNING_GATED
  1883. CAL_VPORT_CTRL2_FREERUNNING_MASK
  1884. CAL_VPORT_CTRL2_FSM_RESET
  1885. CAL_VPORT_CTRL2_FSM_RESET_MASK
  1886. CAL_VPORT_CTRL2_FSM_RESET_NOEFFECT
  1887. CAL_VPORT_CTRL2_FS_RESETS_MASK
  1888. CAL_VPORT_CTRL2_FS_RESETS_NO
  1889. CAL_VPORT_CTRL2_FS_RESETS_YES
  1890. CAL_VPORT_CTRL2_RDY_THR_MASK
  1891. CAL_WAITING
  1892. CAL_WR_DMA_ADDR
  1893. CAL_WR_DMA_ADDR_MASK
  1894. CAL_WR_DMA_CTRL
  1895. CAL_WR_DMA_CTRL_CPORT_MASK
  1896. CAL_WR_DMA_CTRL_DTAG
  1897. CAL_WR_DMA_CTRL_DTAG_ATT_DAT
  1898. CAL_WR_DMA_CTRL_DTAG_ATT_HDR
  1899. CAL_WR_DMA_CTRL_DTAG_D5
  1900. CAL_WR_DMA_CTRL_DTAG_D6
  1901. CAL_WR_DMA_CTRL_DTAG_D7
  1902. CAL_WR_DMA_CTRL_DTAG_MASK
  1903. CAL_WR_DMA_CTRL_DTAG_PIX_DAT
  1904. CAL_WR_DMA_CTRL_DTAG_PIX_HDR
  1905. CAL_WR_DMA_CTRL_ICM_PSTART_MASK
  1906. CAL_WR_DMA_CTRL_MODE_CNT
  1907. CAL_WR_DMA_CTRL_MODE_CNT_INIT
  1908. CAL_WR_DMA_CTRL_MODE_CONST
  1909. CAL_WR_DMA_CTRL_MODE_DIS
  1910. CAL_WR_DMA_CTRL_MODE_MASK
  1911. CAL_WR_DMA_CTRL_MODE_RESERVED
  1912. CAL_WR_DMA_CTRL_MODE_SHD
  1913. CAL_WR_DMA_CTRL_PATTERN_LINEAR
  1914. CAL_WR_DMA_CTRL_PATTERN_MASK
  1915. CAL_WR_DMA_CTRL_PATTERN_RESERVED
  1916. CAL_WR_DMA_CTRL_PATTERN_WR2SKIP2
  1917. CAL_WR_DMA_CTRL_PATTERN_WR2SKIP4
  1918. CAL_WR_DMA_CTRL_STALL_RD_MASK
  1919. CAL_WR_DMA_CTRL_YSIZE_MASK
  1920. CAL_WR_DMA_OFST
  1921. CAL_WR_DMA_OFST_CIRC_MODE_DISABLED
  1922. CAL_WR_DMA_OFST_CIRC_MODE_FOUR
  1923. CAL_WR_DMA_OFST_CIRC_MODE_MASK
  1924. CAL_WR_DMA_OFST_CIRC_MODE_ONE
  1925. CAL_WR_DMA_OFST_CIRC_MODE_SIXTYFOUR
  1926. CAL_WR_DMA_OFST_CIRC_SIZE_MASK
  1927. CAL_WR_DMA_OFST_MASK
  1928. CAL_WR_DMA_XSIZE
  1929. CAL_WR_DMA_XSIZE_MASK
  1930. CAL_WR_DMA_XSIZE_XSKIP_MASK
  1931. CAM0_CONFIG
  1932. CAM0_IO
  1933. CAM0_MASK
  1934. CAM0_MEM
  1935. CAM0_NR_CLK
  1936. CAM0_SZ
  1937. CAM1_CONFIG
  1938. CAM1_IO
  1939. CAM1_MASK
  1940. CAM1_MEM
  1941. CAM1_NR_CLK
  1942. CAM1_SHIFT
  1943. CAM1_SZ
  1944. CAM2_MASK
  1945. CAM3_MASK
  1946. CAMACC_CIF
  1947. CAMACC_QCIF
  1948. CAMACC_QVGA
  1949. CAMACC_VGA
  1950. CAMADDR_CAMEN
  1951. CAMADDR_VCAMSL
  1952. CAMCLK0_CLK
  1953. CAMCLK0_SRC
  1954. CAMCLK1_CLK
  1955. CAMCLK1_SRC
  1956. CAMCLK2_CLK
  1957. CAMCLK2_SRC
  1958. CAMCR_AITR16
  1959. CAMCR_AITRPKT
  1960. CAMCR_CAMRD
  1961. CAMCR_CAMWR
  1962. CAMCR_PS0
  1963. CAMCR_PS1
  1964. CAMCR_PS_CAM_DATA
  1965. CAMCR_PS_CAM_MASK
  1966. CAMCR_PS_MAR
  1967. CAMC_CAMEN
  1968. CAMC_CAMRD
  1969. CAMC_CAMWR
  1970. CAMC_VCAMSL
  1971. CAMDBG
  1972. CAMDBG_8723B
  1973. CAMDIVN
  1974. CAMDIVN_HCLK_HALF
  1975. CAMELLIA_6ROUNDS
  1976. CAMELLIA_6ROUNDS_FL_FLI
  1977. CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS
  1978. CAMELLIA_AESNI_PARALLEL_BLOCKS
  1979. CAMELLIA_BLOCK_MASK
  1980. CAMELLIA_BLOCK_SIZE
  1981. CAMELLIA_F
  1982. CAMELLIA_FL
  1983. CAMELLIA_FLI
  1984. CAMELLIA_FLS
  1985. CAMELLIA_MAX_KEY_SIZE
  1986. CAMELLIA_MIN_KEY_SIZE
  1987. CAMELLIA_PARALLEL_BLOCKS
  1988. CAMELLIA_ROUNDSM
  1989. CAMELLIA_SIGMA1L
  1990. CAMELLIA_SIGMA1R
  1991. CAMELLIA_SIGMA2L
  1992. CAMELLIA_SIGMA2R
  1993. CAMELLIA_SIGMA3L
  1994. CAMELLIA_SIGMA3R
  1995. CAMELLIA_SIGMA4L
  1996. CAMELLIA_SIGMA4R
  1997. CAMELLIA_SIGMA5L
  1998. CAMELLIA_SIGMA5R
  1999. CAMELLIA_SIGMA6L
  2000. CAMELLIA_SIGMA6R
  2001. CAMELLIA_TABLE_BYTE_LEN
  2002. CAMERAACCESS_IDATA
  2003. CAMERAACCESS_SYSTEM
  2004. CAMERAACCESS_TYPE_BLOCK
  2005. CAMERAACCESS_TYPE_MASK
  2006. CAMERAACCESS_TYPE_RANDOM
  2007. CAMERAACCESS_TYPE_REPEAT
  2008. CAMERAACCESS_VC
  2009. CAMERAACCESS_VP
  2010. CAMERA_DATA
  2011. CAMERA_MODULE_INFO
  2012. CAMIF
  2013. CAMIF_CORE_H_
  2014. CAMIF_DEF_HEIGHT
  2015. CAMIF_DEF_WIDTH
  2016. CAMIF_MAX_OUT_BUFS
  2017. CAMIF_MAX_PIX_HEIGHT
  2018. CAMIF_MAX_PIX_WIDTH
  2019. CAMIF_REGS_H_
  2020. CAMIF_REQ_BUFS_MIN
  2021. CAMIF_SD_PADS_NUM
  2022. CAMIF_SD_PAD_SINK
  2023. CAMIF_SD_PAD_SOURCE_C
  2024. CAMIF_SD_PAD_SOURCE_P
  2025. CAMIF_STOP_TIMEOUT
  2026. CAMIF_TIMEOUT_ALL_US
  2027. CAMIF_TIMEOUT_SLEEP_US
  2028. CAMIF_VP_NUM
  2029. CAMITF_CK
  2030. CAMITF_R
  2031. CAML_LCDW_MODE
  2032. CAML_LCD_MODE
  2033. CAMQUALITY_MAX
  2034. CAMQUALITY_MIN
  2035. CAMSS_8x16
  2036. CAMSS_8x96
  2037. CAMSS_AHB_BCR
  2038. CAMSS_AHB_CLK
  2039. CAMSS_AHB_CLK_SRC
  2040. CAMSS_AHB_RESET
  2041. CAMSS_CCI_AHB_CLK
  2042. CAMSS_CCI_BCR
  2043. CAMSS_CCI_CCI_AHB_CLK
  2044. CAMSS_CCI_CCI_CLK
  2045. CAMSS_CCI_CLK
  2046. CAMSS_CCI_RESET
  2047. CAMSS_CLOCK_MARGIN_DENOMINATOR
  2048. CAMSS_CLOCK_MARGIN_NUMERATOR
  2049. CAMSS_CPP_AHB_CLK
  2050. CAMSS_CPP_AXI_CLK
  2051. CAMSS_CPP_BCR
  2052. CAMSS_CPP_CLK
  2053. CAMSS_CPP_TOP_BCR
  2054. CAMSS_CPP_VBIF_AHB_CLK
  2055. CAMSS_CSI0PHYTIMER_CLK
  2056. CAMSS_CSI0PHY_CLK
  2057. CAMSS_CSI0PHY_RESET
  2058. CAMSS_CSI0PIX_BCR
  2059. CAMSS_CSI0PIX_CLK
  2060. CAMSS_CSI0PIX_RESET
  2061. CAMSS_CSI0RDI_BCR
  2062. CAMSS_CSI0RDI_CLK
  2063. CAMSS_CSI0RDI_RESET
  2064. CAMSS_CSI0_AHB_CLK
  2065. CAMSS_CSI0_BCR
  2066. CAMSS_CSI0_CLK
  2067. CAMSS_CSI0_RESET
  2068. CAMSS_CSI1PHYTIMER_CLK
  2069. CAMSS_CSI1PHY_CLK
  2070. CAMSS_CSI1PHY_RESET
  2071. CAMSS_CSI1PIX_BCR
  2072. CAMSS_CSI1PIX_CLK
  2073. CAMSS_CSI1PIX_RESET
  2074. CAMSS_CSI1RDI_BCR
  2075. CAMSS_CSI1RDI_CLK
  2076. CAMSS_CSI1RDI_RESET
  2077. CAMSS_CSI1_AHB_CLK
  2078. CAMSS_CSI1_BCR
  2079. CAMSS_CSI1_CLK
  2080. CAMSS_CSI1_RESET
  2081. CAMSS_CSI2PHYTIMER_CLK
  2082. CAMSS_CSI2PHY_CLK
  2083. CAMSS_CSI2PHY_RESET
  2084. CAMSS_CSI2PIX_BCR
  2085. CAMSS_CSI2PIX_CLK
  2086. CAMSS_CSI2PIX_RESET
  2087. CAMSS_CSI2RDI_BCR
  2088. CAMSS_CSI2RDI_CLK
  2089. CAMSS_CSI2RDI_RESET
  2090. CAMSS_CSI2_AHB_CLK
  2091. CAMSS_CSI2_BCR
  2092. CAMSS_CSI2_CLK
  2093. CAMSS_CSI2_RESET
  2094. CAMSS_CSI3PHY_CLK
  2095. CAMSS_CSI3PHY_RESET
  2096. CAMSS_CSI3PIX_BCR
  2097. CAMSS_CSI3PIX_CLK
  2098. CAMSS_CSI3PIX_RESET
  2099. CAMSS_CSI3RDI_BCR
  2100. CAMSS_CSI3RDI_CLK
  2101. CAMSS_CSI3RDI_RESET
  2102. CAMSS_CSI3_AHB_CLK
  2103. CAMSS_CSI3_BCR
  2104. CAMSS_CSI3_CLK
  2105. CAMSS_CSI3_RESET
  2106. CAMSS_CSID_CID_LUT_VC_n
  2107. CAMSS_CSID_CID_n_CFG
  2108. CAMSS_CSID_CID_n_CFG_DECODE_FORMAT_SHIFT
  2109. CAMSS_CSID_CID_n_CFG_ISPIF_EN
  2110. CAMSS_CSID_CID_n_CFG_PLAIN_ALIGNMENT_LSB
  2111. CAMSS_CSID_CID_n_CFG_PLAIN_ALIGNMENT_MSB
  2112. CAMSS_CSID_CID_n_CFG_PLAIN_FORMAT_16
  2113. CAMSS_CSID_CID_n_CFG_PLAIN_FORMAT_8
  2114. CAMSS_CSID_CID_n_CFG_RDI_EN
  2115. CAMSS_CSID_CID_n_CFG_RDI_MODE_PLAIN_PACKING
  2116. CAMSS_CSID_CID_n_CFG_RDI_MODE_RAW_DUMP
  2117. CAMSS_CSID_CORE_CTRL_0
  2118. CAMSS_CSID_CORE_CTRL_1
  2119. CAMSS_CSID_HW_VERSION
  2120. CAMSS_CSID_IRQ_CLEAR_CMD
  2121. CAMSS_CSID_IRQ_MASK
  2122. CAMSS_CSID_IRQ_STATUS
  2123. CAMSS_CSID_RST_CMD
  2124. CAMSS_CSID_TG_CTRL
  2125. CAMSS_CSID_TG_CTRL_DISABLE
  2126. CAMSS_CSID_TG_CTRL_ENABLE
  2127. CAMSS_CSID_TG_DT_n_CGG_0
  2128. CAMSS_CSID_TG_DT_n_CGG_1
  2129. CAMSS_CSID_TG_DT_n_CGG_2
  2130. CAMSS_CSID_TG_VC_CFG
  2131. CAMSS_CSID_TG_VC_CFG_H_BLANKING
  2132. CAMSS_CSID_TG_VC_CFG_V_BLANKING
  2133. CAMSS_CSIPHY0_3P_BCR
  2134. CAMSS_CSIPHY0_3P_CLK
  2135. CAMSS_CSIPHY1_3P_BCR
  2136. CAMSS_CSIPHY1_3P_CLK
  2137. CAMSS_CSIPHY2_3P_BCR
  2138. CAMSS_CSIPHY2_3P_CLK
  2139. CAMSS_CSI_PHY_GLBL_IRQ_CMD
  2140. CAMSS_CSI_PHY_GLBL_PWR_CFG
  2141. CAMSS_CSI_PHY_GLBL_RESET
  2142. CAMSS_CSI_PHY_GLBL_T_INIT_CFG0
  2143. CAMSS_CSI_PHY_HW_VERSION
  2144. CAMSS_CSI_PHY_INTERRUPT_CLEARn
  2145. CAMSS_CSI_PHY_INTERRUPT_MASKn
  2146. CAMSS_CSI_PHY_INTERRUPT_STATUSn
  2147. CAMSS_CSI_PHY_LNn_CFG2
  2148. CAMSS_CSI_PHY_LNn_CFG3
  2149. CAMSS_CSI_PHY_T_WAKEUP_CFG0
  2150. CAMSS_CSI_VFE0_BCR
  2151. CAMSS_CSI_VFE0_CLK
  2152. CAMSS_CSI_VFE0_RESET
  2153. CAMSS_CSI_VFE1_BCR
  2154. CAMSS_CSI_VFE1_CLK
  2155. CAMSS_CSI_VFE1_RESET
  2156. CAMSS_GDSC
  2157. CAMSS_GP0_CLK
  2158. CAMSS_GP0_CLK_SRC
  2159. CAMSS_GP0_RESET
  2160. CAMSS_GP1_CLK
  2161. CAMSS_GP1_CLK_SRC
  2162. CAMSS_GP1_RESET
  2163. CAMSS_ISPIF_AHB_CLK
  2164. CAMSS_ISPIF_BCR
  2165. CAMSS_ISPIF_RESET
  2166. CAMSS_JPEG0_CLK
  2167. CAMSS_JPEG2_CLK
  2168. CAMSS_JPEG_AHB_CLK
  2169. CAMSS_JPEG_AXI_CLK
  2170. CAMSS_JPEG_BCR
  2171. CAMSS_JPEG_DMA_CLK
  2172. CAMSS_JPEG_GDSC
  2173. CAMSS_JPEG_JPEG0_CLK
  2174. CAMSS_JPEG_JPEG1_CLK
  2175. CAMSS_JPEG_JPEG2_CLK
  2176. CAMSS_JPEG_JPEG_AHB_CLK
  2177. CAMSS_JPEG_JPEG_AXI_CLK
  2178. CAMSS_JPEG_JPEG_OCMEMNOC_CLK
  2179. CAMSS_JPEG_RESET
  2180. CAMSS_MCLK0_CLK
  2181. CAMSS_MCLK0_RESET
  2182. CAMSS_MCLK1_CLK
  2183. CAMSS_MCLK1_RESET
  2184. CAMSS_MCLK2_CLK
  2185. CAMSS_MCLK2_RESET
  2186. CAMSS_MCLK3_CLK
  2187. CAMSS_MCLK3_RESET
  2188. CAMSS_MICRO_AHB_CLK
  2189. CAMSS_MICRO_BCR
  2190. CAMSS_MICRO_RESET
  2191. CAMSS_PHY0_BCR
  2192. CAMSS_PHY0_CSI0PHYTIMER_CLK
  2193. CAMSS_PHY0_RESET
  2194. CAMSS_PHY1_BCR
  2195. CAMSS_PHY1_CSI1PHYTIMER_CLK
  2196. CAMSS_PHY1_RESET
  2197. CAMSS_PHY2_BCR
  2198. CAMSS_PHY2_CSI2PHYTIMER_CLK
  2199. CAMSS_PHY2_RESET
  2200. CAMSS_RES_MAX
  2201. CAMSS_TOP_AHB_CLK
  2202. CAMSS_TOP_BCR
  2203. CAMSS_TOP_RESET
  2204. CAMSS_VFE0_AHB_CLK
  2205. CAMSS_VFE0_BCR
  2206. CAMSS_VFE0_CLK
  2207. CAMSS_VFE0_STREAM_CLK
  2208. CAMSS_VFE1_AHB_CLK
  2209. CAMSS_VFE1_BCR
  2210. CAMSS_VFE1_CLK
  2211. CAMSS_VFE1_STREAM_CLK
  2212. CAMSS_VFE_AHB_CLK
  2213. CAMSS_VFE_AXI_CLK
  2214. CAMSS_VFE_BCR
  2215. CAMSS_VFE_CPP_AHB_CLK
  2216. CAMSS_VFE_CPP_CLK
  2217. CAMSS_VFE_GDSC
  2218. CAMSS_VFE_RESET
  2219. CAMSS_VFE_VFE0_CLK
  2220. CAMSS_VFE_VFE1_CLK
  2221. CAMSS_VFE_VFE_AHB_CLK
  2222. CAMSS_VFE_VFE_AXI_CLK
  2223. CAMSS_VFE_VFE_OCMEMNOC_CLK
  2224. CAMTEL_TVB330
  2225. CAMU_LCD_MODE
  2226. CAMU_WLCD_MODE
  2227. CAM_ACCEPT
  2228. CAM_AES
  2229. CAM_AUTOSENSE_FAIL
  2230. CAM_BDR_SENT
  2231. CAM_BUSY
  2232. CAM_BUS_WILDCARD
  2233. CAM_BroadAcc
  2234. CAM_CCB_LEN_ERR
  2235. CAM_CC_BPS_AHB_CLK
  2236. CAM_CC_BPS_AREG_CLK
  2237. CAM_CC_BPS_AXI_CLK
  2238. CAM_CC_BPS_CLK
  2239. CAM_CC_BPS_CLK_SRC
  2240. CAM_CC_CAMNOC_ATB_CLK
  2241. CAM_CC_CAMNOC_AXI_CLK
  2242. CAM_CC_CCI_CLK
  2243. CAM_CC_CCI_CLK_SRC
  2244. CAM_CC_CPAS_AHB_CLK
  2245. CAM_CC_CPHY_RX_CLK_SRC
  2246. CAM_CC_CSI0PHYTIMER_CLK
  2247. CAM_CC_CSI0PHYTIMER_CLK_SRC
  2248. CAM_CC_CSI1PHYTIMER_CLK
  2249. CAM_CC_CSI1PHYTIMER_CLK_SRC
  2250. CAM_CC_CSI2PHYTIMER_CLK
  2251. CAM_CC_CSI2PHYTIMER_CLK_SRC
  2252. CAM_CC_CSI3PHYTIMER_CLK
  2253. CAM_CC_CSI3PHYTIMER_CLK_SRC
  2254. CAM_CC_CSIPHY0_CLK
  2255. CAM_CC_CSIPHY1_CLK
  2256. CAM_CC_CSIPHY2_CLK
  2257. CAM_CC_CSIPHY3_CLK
  2258. CAM_CC_FAST_AHB_CLK_SRC
  2259. CAM_CC_FD_CORE_CLK
  2260. CAM_CC_FD_CORE_CLK_SRC
  2261. CAM_CC_FD_CORE_UAR_CLK
  2262. CAM_CC_ICP_APB_CLK
  2263. CAM_CC_ICP_ATB_CLK
  2264. CAM_CC_ICP_CLK
  2265. CAM_CC_ICP_CLK_SRC
  2266. CAM_CC_ICP_CTI_CLK
  2267. CAM_CC_ICP_TS_CLK
  2268. CAM_CC_IFE_0_AXI_CLK
  2269. CAM_CC_IFE_0_CLK
  2270. CAM_CC_IFE_0_CLK_SRC
  2271. CAM_CC_IFE_0_CPHY_RX_CLK
  2272. CAM_CC_IFE_0_CSID_CLK
  2273. CAM_CC_IFE_0_CSID_CLK_SRC
  2274. CAM_CC_IFE_0_DSP_CLK
  2275. CAM_CC_IFE_1_AXI_CLK
  2276. CAM_CC_IFE_1_CLK
  2277. CAM_CC_IFE_1_CLK_SRC
  2278. CAM_CC_IFE_1_CPHY_RX_CLK
  2279. CAM_CC_IFE_1_CSID_CLK
  2280. CAM_CC_IFE_1_CSID_CLK_SRC
  2281. CAM_CC_IFE_1_DSP_CLK
  2282. CAM_CC_IFE_LITE_CLK
  2283. CAM_CC_IFE_LITE_CLK_SRC
  2284. CAM_CC_IFE_LITE_CPHY_RX_CLK
  2285. CAM_CC_IFE_LITE_CSID_CLK
  2286. CAM_CC_IFE_LITE_CSID_CLK_SRC
  2287. CAM_CC_IPE_0_AHB_CLK
  2288. CAM_CC_IPE_0_AREG_CLK
  2289. CAM_CC_IPE_0_AXI_CLK
  2290. CAM_CC_IPE_0_CLK
  2291. CAM_CC_IPE_0_CLK_SRC
  2292. CAM_CC_IPE_1_AHB_CLK
  2293. CAM_CC_IPE_1_AREG_CLK
  2294. CAM_CC_IPE_1_AXI_CLK
  2295. CAM_CC_IPE_1_CLK
  2296. CAM_CC_IPE_1_CLK_SRC
  2297. CAM_CC_JPEG_CLK
  2298. CAM_CC_JPEG_CLK_SRC
  2299. CAM_CC_LRME_CLK
  2300. CAM_CC_LRME_CLK_SRC
  2301. CAM_CC_MCLK0_CLK
  2302. CAM_CC_MCLK0_CLK_SRC
  2303. CAM_CC_MCLK1_CLK
  2304. CAM_CC_MCLK1_CLK_SRC
  2305. CAM_CC_MCLK2_CLK
  2306. CAM_CC_MCLK2_CLK_SRC
  2307. CAM_CC_MCLK3_CLK
  2308. CAM_CC_MCLK3_CLK_SRC
  2309. CAM_CC_PLL0
  2310. CAM_CC_PLL0_OUT_EVEN
  2311. CAM_CC_PLL1
  2312. CAM_CC_PLL1_OUT_EVEN
  2313. CAM_CC_PLL2
  2314. CAM_CC_PLL2_OUT_EVEN
  2315. CAM_CC_PLL3
  2316. CAM_CC_PLL3_OUT_EVEN
  2317. CAM_CC_SLOW_AHB_CLK_SRC
  2318. CAM_CC_SOC_AHB_CLK
  2319. CAM_CC_SYS_TMR_CLK
  2320. CAM_CLKI_MARK
  2321. CAM_CLKO_MARK
  2322. CAM_CMD_KEY_SHIFT
  2323. CAM_CMD_POLLING
  2324. CAM_CMD_TIMEOUT
  2325. CAM_CMD_WRITE
  2326. CAM_CM_SecCAMClr
  2327. CAM_CM_SecCAMPolling
  2328. CAM_CM_SecCAMWE
  2329. CAM_CONFIG_NO_USEDK
  2330. CAM_CONFIG_USEDK
  2331. CAM_CONTENT_COUNT
  2332. CAM_CONTROL__AccessType_MASK
  2333. CAM_CONTROL__AccessType__SHIFT
  2334. CAM_CONTROL__CAM_En_MASK
  2335. CAM_CONTROL__CAM_En__SHIFT
  2336. CAM_CONTROL__CrossTrigger_MASK
  2337. CAM_CONTROL__CrossTrigger__SHIFT
  2338. CAM_CONTROL__DataMatchEn_MASK
  2339. CAM_CONTROL__DataMatchEn__SHIFT
  2340. CAM_CONTROL__Op_MASK
  2341. CAM_CONTROL__Op__SHIFT
  2342. CAM_CONTROL__VC_MASK
  2343. CAM_CONTROL__VC__SHIFT
  2344. CAM_CTRLSTAT_CLR
  2345. CAM_CTRLSTAT_READ_SET
  2346. CAM_CTRL_BUSY
  2347. CAM_CTRL_ENABLE
  2348. CAM_CTRL_INDEX_MASK
  2349. CAM_CTRL_INDEX_SHIFT
  2350. CAM_CTRL_MSEL
  2351. CAM_CTRL_READ
  2352. CAM_CTRL_WRITE
  2353. CAM_CompEn
  2354. CAM_DATA_HI_VALID
  2355. CAM_DATA_RUN_ERR
  2356. CAM_DESCRIPTORS
  2357. CAM_DEV_NOT_THERE
  2358. CAM_DEV_QFRZN
  2359. CAM_DIR_IN
  2360. CAM_DIR_NONE
  2361. CAM_DIR_OUT
  2362. CAM_ENTRIES_SEG_NUM
  2363. CAM_ENTRY_DESTINATION
  2364. CAM_ENTRY_MACCTL
  2365. CAM_ENTRY_MAX
  2366. CAM_ENTRY_SOURCE
  2367. CAM_Ena_Bit
  2368. CAM_Ena_Mask
  2369. CAM_GPIO_SEL
  2370. CAM_GroupAcc
  2371. CAM_HS_MARK
  2372. CAM_IS_INVALID
  2373. CAM_LINE_SIZE
  2374. CAM_LOOKUP_ERR_EVENT
  2375. CAM_LUN_WILDCARD
  2376. CAM_MASK
  2377. CAM_MSG_REJECT_REC
  2378. CAM_NONE
  2379. CAM_NOTVALID
  2380. CAM_NO_HBA
  2381. CAM_NegCAM
  2382. CAM_OUT_CQ_ID_SHIFT
  2383. CAM_OUT_FUNC_SHIFT
  2384. CAM_OUT_ROUTE_FC
  2385. CAM_OUT_ROUTE_NIC
  2386. CAM_OUT_RV
  2387. CAM_OUT_SH
  2388. CAM_PAIRWISE_KEY_POSITION
  2389. CAM_PATH_INVALID
  2390. CAM_POLLINIG
  2391. CAM_PORT_CAPTURE
  2392. CAM_PORT_COUNT
  2393. CAM_PORT_PREVIEW
  2394. CAM_PORT_VIDEO
  2395. CAM_PROVIDE_FAIL
  2396. CAM_READ
  2397. CAM_REQUEUE_REQ
  2398. CAM_REQ_ABORTED
  2399. CAM_REQ_CMP
  2400. CAM_REQ_CMP_ERR
  2401. CAM_REQ_INPROG
  2402. CAM_REQ_INVALID
  2403. CAM_REQ_TERMIO
  2404. CAM_REQ_TOO_BIG
  2405. CAM_RESRC_UNAVAIL
  2406. CAM_SCSI_BUS_RESET
  2407. CAM_SCSI_STATUS_ERROR
  2408. CAM_SEL_TIMEOUT
  2409. CAM_SEQUENCE_FAIL
  2410. CAM_SHUT
  2411. CAM_SMS4
  2412. CAM_STATUS_MASK
  2413. CAM_StationAcc
  2414. CAM_TARGET_DATA_ADDR_BOTTOM__DataAddrBottom_MASK
  2415. CAM_TARGET_DATA_ADDR_BOTTOM__DataAddrBottom__SHIFT
  2416. CAM_TARGET_DATA_ADDR_TOP__DataAddrTop_MASK
  2417. CAM_TARGET_DATA_ADDR_TOP__DataAddrTop__SHIFT
  2418. CAM_TARGET_DATA_MASK__DataMask_MASK
  2419. CAM_TARGET_DATA_MASK__DataMask__SHIFT
  2420. CAM_TARGET_DATA__Data_MASK
  2421. CAM_TARGET_DATA__Data__SHIFT
  2422. CAM_TARGET_INDEX_ADDR_BOTTOM__IndexAddrBottom_MASK
  2423. CAM_TARGET_INDEX_ADDR_BOTTOM__IndexAddrBottom__SHIFT
  2424. CAM_TARGET_INDEX_ADDR_TOP__IndexAddrTop_MASK
  2425. CAM_TARGET_INDEX_ADDR_TOP__IndexAddrTop__SHIFT
  2426. CAM_TARGET_INDEX_DATA_MASK__IndexDataMask_MASK
  2427. CAM_TARGET_INDEX_DATA_MASK__IndexDataMask__SHIFT
  2428. CAM_TARGET_INDEX_DATA__IndexData_MASK
  2429. CAM_TARGET_INDEX_DATA__IndexData__SHIFT
  2430. CAM_TARGET_WILDCARD
  2431. CAM_TKIP
  2432. CAM_TYPE_CIF
  2433. CAM_TYPE_VGA
  2434. CAM_UA_ABORT
  2435. CAM_UA_TERMIO
  2436. CAM_UNCOR_PARITY
  2437. CAM_UNEXP_BUSFREE
  2438. CAM_UNREC_HBA_ERROR
  2439. CAM_USEDK
  2440. CAM_VALID
  2441. CAM_VS_MARK
  2442. CAM_WEP104
  2443. CAM_WEP40
  2444. CAM_WRITE
  2445. CAM_WRITE_VALID
  2446. CAM_YUV0_MARK
  2447. CAM_YUV1_MARK
  2448. CAM_YUV2_MARK
  2449. CAM_YUV3_MARK
  2450. CAM_YUV4_MARK
  2451. CAM_YUV5_MARK
  2452. CAM_YUV6_MARK
  2453. CAM_YUV7_MARK
  2454. CAN
  2455. CAN0
  2456. CAN0_MIO
  2457. CAN0_REF
  2458. CAN0_RESET
  2459. CAN0_RX_A_MARK
  2460. CAN0_RX_B_MARK
  2461. CAN0_RX_C_MARK
  2462. CAN0_RX_D_MARK
  2463. CAN0_RX_E_MARK
  2464. CAN0_RX_F_MARK
  2465. CAN0_RX_MARK
  2466. CAN0_SHUT
  2467. CAN0_TX_A_MARK
  2468. CAN0_TX_B_MARK
  2469. CAN0_TX_C_MARK
  2470. CAN0_TX_D_MARK
  2471. CAN0_TX_E_MARK
  2472. CAN0_TX_F_MARK
  2473. CAN0_TX_MARK
  2474. CAN1
  2475. CAN1_MIO
  2476. CAN1_REF
  2477. CAN1_RESET
  2478. CAN1_RX_A_MARK
  2479. CAN1_RX_B_MARK
  2480. CAN1_RX_C_MARK
  2481. CAN1_RX_D_MARK
  2482. CAN1_RX_MARK
  2483. CAN1_SHUT
  2484. CAN1_TX_A_MARK
  2485. CAN1_TX_B_MARK
  2486. CAN1_TX_C_MARK
  2487. CAN1_TX_D_MARK
  2488. CAN1_TX_MARK
  2489. CAN200PCI_DEVICE_ID
  2490. CAN200PCI_SUB_DEVICE_ID
  2491. CAN200PCI_SUB_VENDOR_ID
  2492. CAN200PCI_VENDOR_ID
  2493. CANARY_MASK
  2494. CANCEL_AUTO_RECEIVE
  2495. CANCEL_FCOPY
  2496. CANCEL_FORCE_HIGH
  2497. CANCTRL
  2498. CANCTRL_ABAT
  2499. CANCTRL_OSM
  2500. CANCTRL_REQOP_CONF
  2501. CANCTRL_REQOP_LISTEN_ONLY
  2502. CANCTRL_REQOP_LOOPBACK
  2503. CANCTRL_REQOP_MASK
  2504. CANCTRL_REQOP_NORMAL
  2505. CANCTRL_REQOP_SLEEP
  2506. CANFD_BRS
  2507. CANFD_CLK_SEL_20MHZ
  2508. CANFD_CLK_SEL_24MHZ
  2509. CANFD_CLK_SEL_30MHZ
  2510. CANFD_CLK_SEL_40MHZ
  2511. CANFD_CLK_SEL_60MHZ
  2512. CANFD_CLK_SEL_80MHZ
  2513. CANFD_CLK_SEL_DIV_20MHZ
  2514. CANFD_CLK_SEL_DIV_24MHZ
  2515. CANFD_CLK_SEL_DIV_30MHZ
  2516. CANFD_CLK_SEL_DIV_40MHZ
  2517. CANFD_CLK_SEL_DIV_60MHZ
  2518. CANFD_CLK_SEL_DIV_MASK
  2519. CANFD_CLK_SEL_SRC_240MHZ
  2520. CANFD_CLK_SEL_SRC_80MHZ
  2521. CANFD_CLK_SEL_SRC_MASK
  2522. CANFD_CTL_IEN_BIT
  2523. CANFD_CTL_IRQ_CL_DEF
  2524. CANFD_CTL_IRQ_TL_DEF
  2525. CANFD_CTL_RST_BIT
  2526. CANFD_CTL_UNC_BIT
  2527. CANFD_ESI
  2528. CANFD_MAX_DLC
  2529. CANFD_MAX_DLEN
  2530. CANFD_MISC_TS_RST
  2531. CANFD_MSG_LNK_TX
  2532. CANFD_MTU
  2533. CANFD_OPTIONS_SET
  2534. CANINTE
  2535. CANINTE_ERRIE
  2536. CANINTE_MERRE
  2537. CANINTE_RX0IE
  2538. CANINTE_RX1IE
  2539. CANINTE_TX0IE
  2540. CANINTE_TX1IE
  2541. CANINTE_TX2IE
  2542. CANINTE_WAKIE
  2543. CANINTF
  2544. CANINTF_ERR
  2545. CANINTF_ERRIF
  2546. CANINTF_MERRF
  2547. CANINTF_RX
  2548. CANINTF_RX0IF
  2549. CANINTF_RX1IF
  2550. CANINTF_TX
  2551. CANINTF_TX0IF
  2552. CANINTF_TX1IF
  2553. CANINTF_TX2IF
  2554. CANINTF_WAKIF
  2555. CANNOT_LOCK_FROM_DEVICE
  2556. CANNOT_RETURN_REQUESTED_LENGTH
  2557. CANON_OUI
  2558. CANSTAT
  2559. CANVAS_ADDR0
  2560. CANVAS_ADDR1
  2561. CANVAS_ADDR2
  2562. CANVAS_BLKMODE_BIT
  2563. CANVAS_ENDIAN_BIT
  2564. CANVAS_HEIGHT_BIT
  2565. CANVAS_LUT_RD_EN
  2566. CANVAS_LUT_WR_EN
  2567. CANVAS_WIDTH_HBIT
  2568. CANVAS_WIDTH_LBIT
  2569. CANVAS_WIDTH_LWID
  2570. CANVAS_WRAP_BIT
  2571. CAN_ABI_VERSION
  2572. CAN_ABORT_STATUS
  2573. CAN_BCM
  2574. CAN_BCM_VERSION
  2575. CAN_CALC_MAX_ERROR
  2576. CAN_CALC_SYNC_SEG
  2577. CAN_CLK_A_MARK
  2578. CAN_CLK_B_MARK
  2579. CAN_CLK_C_MARK
  2580. CAN_CLK_D_MARK
  2581. CAN_CLK_MARK
  2582. CAN_CTRLMODE_3_SAMPLES
  2583. CAN_CTRLMODE_BERR_REPORTING
  2584. CAN_CTRLMODE_FD
  2585. CAN_CTRLMODE_FD_NON_ISO
  2586. CAN_CTRLMODE_LISTENONLY
  2587. CAN_CTRLMODE_LOOPBACK
  2588. CAN_CTRLMODE_ONE_SHOT
  2589. CAN_CTRLMODE_PRESUME_ACK
  2590. CAN_DEBUGOUT0_MARK
  2591. CAN_DEBUGOUT10_MARK
  2592. CAN_DEBUGOUT11_MARK
  2593. CAN_DEBUGOUT12_MARK
  2594. CAN_DEBUGOUT13_MARK
  2595. CAN_DEBUGOUT14_MARK
  2596. CAN_DEBUGOUT15_MARK
  2597. CAN_DEBUGOUT1_MARK
  2598. CAN_DEBUGOUT2_MARK
  2599. CAN_DEBUGOUT3_MARK
  2600. CAN_DEBUGOUT4_MARK
  2601. CAN_DEBUGOUT5_MARK
  2602. CAN_DEBUGOUT6_MARK
  2603. CAN_DEBUGOUT7_MARK
  2604. CAN_DEBUGOUT8_MARK
  2605. CAN_DEBUGOUT9_MARK
  2606. CAN_DEBUG_HW_TRIGGER_MARK
  2607. CAN_EFF_FLAG
  2608. CAN_EFF_ID_BITS
  2609. CAN_EFF_MASK
  2610. CAN_EFF_RCV_ARRAY_SZ
  2611. CAN_EFF_RCV_HASH_BITS
  2612. CAN_EFF_RTR_FLAGS
  2613. CAN_ERR_ACK
  2614. CAN_ERR_BUSERROR
  2615. CAN_ERR_BUSOFF
  2616. CAN_ERR_CRTL
  2617. CAN_ERR_CRTL_ACTIVE
  2618. CAN_ERR_CRTL_RX_OVERFLOW
  2619. CAN_ERR_CRTL_RX_PASSIVE
  2620. CAN_ERR_CRTL_RX_WARNING
  2621. CAN_ERR_CRTL_TX_OVERFLOW
  2622. CAN_ERR_CRTL_TX_PASSIVE
  2623. CAN_ERR_CRTL_TX_WARNING
  2624. CAN_ERR_CRTL_UNSPEC
  2625. CAN_ERR_DLC
  2626. CAN_ERR_FLAG
  2627. CAN_ERR_LOSTARB
  2628. CAN_ERR_LOSTARB_UNSPEC
  2629. CAN_ERR_MASK
  2630. CAN_ERR_PROT
  2631. CAN_ERR_PROT_ACTIVE
  2632. CAN_ERR_PROT_BIT
  2633. CAN_ERR_PROT_BIT0
  2634. CAN_ERR_PROT_BIT1
  2635. CAN_ERR_PROT_FORM
  2636. CAN_ERR_PROT_LOC_ACK
  2637. CAN_ERR_PROT_LOC_ACK_DEL
  2638. CAN_ERR_PROT_LOC_CRC_DEL
  2639. CAN_ERR_PROT_LOC_CRC_SEQ
  2640. CAN_ERR_PROT_LOC_DATA
  2641. CAN_ERR_PROT_LOC_DLC
  2642. CAN_ERR_PROT_LOC_EOF
  2643. CAN_ERR_PROT_LOC_ID04_00
  2644. CAN_ERR_PROT_LOC_ID12_05
  2645. CAN_ERR_PROT_LOC_ID17_13
  2646. CAN_ERR_PROT_LOC_ID20_18
  2647. CAN_ERR_PROT_LOC_ID28_21
  2648. CAN_ERR_PROT_LOC_IDE
  2649. CAN_ERR_PROT_LOC_INTERM
  2650. CAN_ERR_PROT_LOC_RES0
  2651. CAN_ERR_PROT_LOC_RES1
  2652. CAN_ERR_PROT_LOC_RTR
  2653. CAN_ERR_PROT_LOC_SOF
  2654. CAN_ERR_PROT_LOC_SRTR
  2655. CAN_ERR_PROT_LOC_UNSPEC
  2656. CAN_ERR_PROT_OVERLOAD
  2657. CAN_ERR_PROT_STUFF
  2658. CAN_ERR_PROT_TX
  2659. CAN_ERR_PROT_UNSPEC
  2660. CAN_ERR_RESTARTED
  2661. CAN_ERR_TRX
  2662. CAN_ERR_TRX_CANH_NO_WIRE
  2663. CAN_ERR_TRX_CANH_SHORT_TO_BAT
  2664. CAN_ERR_TRX_CANH_SHORT_TO_GND
  2665. CAN_ERR_TRX_CANH_SHORT_TO_VCC
  2666. CAN_ERR_TRX_CANL_NO_WIRE
  2667. CAN_ERR_TRX_CANL_SHORT_TO_BAT
  2668. CAN_ERR_TRX_CANL_SHORT_TO_CANH
  2669. CAN_ERR_TRX_CANL_SHORT_TO_GND
  2670. CAN_ERR_TRX_CANL_SHORT_TO_VCC
  2671. CAN_ERR_TRX_UNSPEC
  2672. CAN_ERR_TX_TIMEOUT
  2673. CAN_FD_FRAME
  2674. CAN_FRAME_MAX_BITS
  2675. CAN_FRAME_MAX_DATA_LEN
  2676. CAN_GW_NAME
  2677. CAN_GW_VERSION
  2678. CAN_HI3110_HI3110
  2679. CAN_INV_FILTER
  2680. CAN_ISOTP
  2681. CAN_J1939
  2682. CAN_LED_EVENT_OPEN
  2683. CAN_LED_EVENT_RX
  2684. CAN_LED_EVENT_STOP
  2685. CAN_LED_EVENT_TX
  2686. CAN_LED_NAME_SZ
  2687. CAN_LOCK_FROM_DEVICE
  2688. CAN_MAX_DLC
  2689. CAN_MAX_DLEN
  2690. CAN_MCNET
  2691. CAN_MCP251X_MCP2510
  2692. CAN_MCP251X_MCP2515
  2693. CAN_MCP251X_MCP25625
  2694. CAN_ML_H
  2695. CAN_MODE_SLEEP
  2696. CAN_MODE_START
  2697. CAN_MODE_STOP
  2698. CAN_MTU
  2699. CAN_NPROTO
  2700. CAN_PFC_CLK
  2701. CAN_PFC_DATA
  2702. CAN_PFC_PINS
  2703. CAN_PROC_RCVLIST_ALL
  2704. CAN_PROC_RCVLIST_EFF
  2705. CAN_PROC_RCVLIST_ERR
  2706. CAN_PROC_RCVLIST_FIL
  2707. CAN_PROC_RCVLIST_INV
  2708. CAN_PROC_RCVLIST_SFF
  2709. CAN_PROC_RESET_STATS
  2710. CAN_PROC_STATS
  2711. CAN_PROC_VERSION
  2712. CAN_PSR
  2713. CAN_QUEUE
  2714. CAN_RAW
  2715. CAN_RAW_ERR_FILTER
  2716. CAN_RAW_FD_FRAMES
  2717. CAN_RAW_FILTER
  2718. CAN_RAW_FILTER_MAX
  2719. CAN_RAW_JOIN_FILTERS
  2720. CAN_RAW_LOOPBACK
  2721. CAN_RAW_RECV_OWN_MSGS
  2722. CAN_RAW_VERSION
  2723. CAN_REDIRECT
  2724. CAN_REQUIRED_SIZE
  2725. CAN_RTR_FLAG
  2726. CAN_SCHEDULE_FRAMES
  2727. CAN_SFF_ID_BITS
  2728. CAN_SFF_MASK
  2729. CAN_SFF_RCV_ARRAY_SZ
  2730. CAN_SLEEP
  2731. CAN_START_DELAY
  2732. CAN_STATE_BUS_OFF
  2733. CAN_STATE_ERROR_ACTIVE
  2734. CAN_STATE_ERROR_PASSIVE
  2735. CAN_STATE_ERROR_WARNING
  2736. CAN_STATE_MAX
  2737. CAN_STATE_SLEEPING
  2738. CAN_STATE_STOPPED
  2739. CAN_STEP0_MARK
  2740. CAN_TERMINATION_DISABLED
  2741. CAN_TP16
  2742. CAN_TP20
  2743. CAN_TXCLK_MARK
  2744. CAN_USB_CLOCK
  2745. CAN_USE_HEAP
  2746. CAN_VERSION
  2747. CAN_VERSION_STRING
  2748. CAP0_TRIG_CNTL
  2749. CAP1
  2750. CAP1106
  2751. CAP1126
  2752. CAP1188
  2753. CAP11XX_MANUFACTURER_ID
  2754. CAP11XX_REG_CALIBRATION
  2755. CAP11XX_REG_CONFIG
  2756. CAP11XX_REG_CONFIG2
  2757. CAP11XX_REG_CONFIG2_ALT_POL
  2758. CAP11XX_REG_GENERAL_STATUS
  2759. CAP11XX_REG_INT_ENABLE
  2760. CAP11XX_REG_LED_DUTY_CYCLE_1
  2761. CAP11XX_REG_LED_DUTY_CYCLE_2
  2762. CAP11XX_REG_LED_DUTY_CYCLE_3
  2763. CAP11XX_REG_LED_DUTY_CYCLE_4
  2764. CAP11XX_REG_LED_DUTY_MAX_MASK
  2765. CAP11XX_REG_LED_DUTY_MAX_MASK_SHIFT
  2766. CAP11XX_REG_LED_DUTY_MAX_VALUE
  2767. CAP11XX_REG_LED_DUTY_MIN_MASK
  2768. CAP11XX_REG_LED_DUTY_MIN_MASK_SHIFT
  2769. CAP11XX_REG_LED_OUTPUT_CONTROL
  2770. CAP11XX_REG_LED_POLARITY
  2771. CAP11XX_REG_MAIN_CONTROL
  2772. CAP11XX_REG_MAIN_CONTROL_DLSEEP
  2773. CAP11XX_REG_MAIN_CONTROL_GAIN_MASK
  2774. CAP11XX_REG_MAIN_CONTROL_GAIN_SHIFT
  2775. CAP11XX_REG_MANUFACTURER_ID
  2776. CAP11XX_REG_MT_CONFIG
  2777. CAP11XX_REG_MT_PATTERN
  2778. CAP11XX_REG_MT_PATTERN_CONFIG
  2779. CAP11XX_REG_NOISE_FLAG_STATUS
  2780. CAP11XX_REG_PRODUCT_ID
  2781. CAP11XX_REG_RECALIB_CONFIG
  2782. CAP11XX_REG_REPEAT_RATE
  2783. CAP11XX_REG_REVISION
  2784. CAP11XX_REG_SAMPLING_CONFIG
  2785. CAP11XX_REG_SENOR_DELTA
  2786. CAP11XX_REG_SENSITIVITY_CONTROL
  2787. CAP11XX_REG_SENSOR_BASE_CNT
  2788. CAP11XX_REG_SENSOR_CALIB
  2789. CAP11XX_REG_SENSOR_CALIB_LSB1
  2790. CAP11XX_REG_SENSOR_CALIB_LSB2
  2791. CAP11XX_REG_SENSOR_CONFIG
  2792. CAP11XX_REG_SENSOR_CONFIG2
  2793. CAP11XX_REG_SENSOR_ENABLE
  2794. CAP11XX_REG_SENSOR_INPUT
  2795. CAP11XX_REG_SENSOR_NOISE_THRESH
  2796. CAP11XX_REG_SENSOR_THRESH
  2797. CAP11XX_REG_STANDBY_CHANNEL
  2798. CAP11XX_REG_STANDBY_CONFIG
  2799. CAP11XX_REG_STANDBY_SENSITIVITY
  2800. CAP11XX_REG_STANDBY_THRESH
  2801. CAP16_TO_CAP32
  2802. CAP1_TRIG_CNTL
  2803. CAP2
  2804. CAP3
  2805. CAP32_FEC
  2806. CAP32_SPEED
  2807. CAP32_TO_CAP16
  2808. CAP4
  2809. CAP9_BARSIZE_OFS
  2810. CAP9_BAR_OFS
  2811. CAP9_CTRL_OFS
  2812. CAP9_IOMAP_OFS
  2813. CAPA2_TSDR50
  2814. CAPABILITIES_PTR
  2815. CAPABILITY
  2816. CAPABILITY_BE3_NATIVE_ERX_API
  2817. CAPABILITY_BTN_MASK
  2818. CAPABILITY_BTN_SHIFT
  2819. CAPABILITY_BT_COEXIST
  2820. CAPABILITY_CONTROL_FILTERS
  2821. CAPABILITY_CONTROL_FILTER_PSPOLL
  2822. CAPABILITY_DMA
  2823. CAPABILITY_DOUBLE_ANTENNA
  2824. CAPABILITY_EXTERNAL_LNA_A
  2825. CAPABILITY_EXTERNAL_LNA_BG
  2826. CAPABILITY_EXTERNAL_PA_TX0
  2827. CAPABILITY_EXTERNAL_PA_TX1
  2828. CAPABILITY_FRAME_TYPE
  2829. CAPABILITY_HEADER
  2830. CAPABILITY_HW_BUTTON
  2831. CAPABILITY_HW_CRYPTO
  2832. CAPABILITY_LBA
  2833. CAPABILITY_LEFT_BTN_MASK
  2834. CAPABILITY_LINK_TUNING
  2835. CAPABILITY_MIDDLE_BTN_MASK
  2836. CAPABILITY_POWER_LIMIT
  2837. CAPABILITY_PRE_TBTT_INTERRUPT
  2838. CAPABILITY_REGISTER
  2839. CAPABILITY_RESTART_HW
  2840. CAPABILITY_RF_SEQUENCE
  2841. CAPABILITY_RIGHT_BTN_MASK
  2842. CAPABILITY_SW_TIMESTAMPS
  2843. CAPABILITY_VCO_RECALIBRATION
  2844. CAPACITY_CHANGED_ASCQ
  2845. CAPACITY_CURRENT
  2846. CAPACITY_INVALID
  2847. CAPACITY_NO_CARTRIDGE
  2848. CAPACITY_REMAINING
  2849. CAPACITY_UNFORMATTED
  2850. CAPA_VS18
  2851. CAPA_VS30
  2852. CAPA_VS33
  2853. CAPBUF0_INT
  2854. CAPBUF0_INT_AK
  2855. CAPBUF0_INT_EN
  2856. CAPBUF1_INT
  2857. CAPBUF1_INT_AK
  2858. CAPBUF1_INT_EN
  2859. CAPCACHE_KOBJ_ID
  2860. CAPC_IMAGE_SIZE
  2861. CAPC_MODE
  2862. CAPC_SEL_FRAME
  2863. CAPC_START
  2864. CAPC_THUMB_SIZE
  2865. CAPICMD
  2866. CAPICTR_DOWN
  2867. CAPICTR_UP
  2868. CAPIFLAG_HIGHJACKING
  2869. CAPIMSG_APPID
  2870. CAPIMSG_BASELEN
  2871. CAPIMSG_CMD
  2872. CAPIMSG_COMMAND
  2873. CAPIMSG_CONTROL
  2874. CAPIMSG_CONTROLLER
  2875. CAPIMSG_DATALEN
  2876. CAPIMSG_FLAGS
  2877. CAPIMSG_HANDLE_REQ
  2878. CAPIMSG_LEN
  2879. CAPIMSG_MSGID
  2880. CAPIMSG_NCCI
  2881. CAPIMSG_NCCI_PART
  2882. CAPIMSG_PLCI_PART
  2883. CAPIMSG_SETAPPID
  2884. CAPIMSG_SETCOMMAND
  2885. CAPIMSG_SETCONTROL
  2886. CAPIMSG_SETCONTROLLER
  2887. CAPIMSG_SETDATALEN
  2888. CAPIMSG_SETFLAGS
  2889. CAPIMSG_SETHANDLE_CONF
  2890. CAPIMSG_SETINFO_CONF
  2891. CAPIMSG_SETLEN
  2892. CAPIMSG_SETMSGID
  2893. CAPIMSG_SETNCCI_PART
  2894. CAPIMSG_SETPLCI_PART
  2895. CAPIMSG_SETSUBCOMMAND
  2896. CAPIMSG_SUBCOMMAND
  2897. CAPIMSG_U16
  2898. CAPIMSG_U32
  2899. CAPIMSG_U8
  2900. CAPINC_MAX_PORTS
  2901. CAPINC_MAX_RECVQUEUE
  2902. CAPINC_MAX_SENDQUEUE
  2903. CAPINC_NR_PORTS
  2904. CAPINFO_MASK
  2905. CAPI_ALERT
  2906. CAPI_ALERT_CONF
  2907. CAPI_ALERT_REQ
  2908. CAPI_ANZLOGCONNNOTSUPPORTED
  2909. CAPI_BUFFEXECEEDS64K
  2910. CAPI_CLR_FLAGS
  2911. CAPI_COMPOSE
  2912. CAPI_CONF
  2913. CAPI_CONNECT
  2914. CAPI_CONNECT_ACTIVE
  2915. CAPI_CONNECT_ACTIVE_CONF
  2916. CAPI_CONNECT_ACTIVE_IND
  2917. CAPI_CONNECT_ACTIVE_IND_BASELEN
  2918. CAPI_CONNECT_ACTIVE_REQ
  2919. CAPI_CONNECT_ACTIVE_RESP
  2920. CAPI_CONNECT_B3
  2921. CAPI_CONNECT_B3_ACTIVE
  2922. CAPI_CONNECT_B3_ACTIVE_CONF
  2923. CAPI_CONNECT_B3_ACTIVE_IND
  2924. CAPI_CONNECT_B3_ACTIVE_IND_BASELEN
  2925. CAPI_CONNECT_B3_ACTIVE_REQ
  2926. CAPI_CONNECT_B3_ACTIVE_RESP
  2927. CAPI_CONNECT_B3_CONF
  2928. CAPI_CONNECT_B3_IND
  2929. CAPI_CONNECT_B3_IND_BASELEN
  2930. CAPI_CONNECT_B3_REQ
  2931. CAPI_CONNECT_B3_RESP
  2932. CAPI_CONNECT_B3_T90_ACTIVE
  2933. CAPI_CONNECT_B3_T90_ACTIVE_IND
  2934. CAPI_CONNECT_B3_T90_ACTIVE_RESP
  2935. CAPI_CONNECT_CONF
  2936. CAPI_CONNECT_IND
  2937. CAPI_CONNECT_IND_BASELEN
  2938. CAPI_CONNECT_REQ
  2939. CAPI_CONNECT_RESP
  2940. CAPI_CTR_DETACHED
  2941. CAPI_CTR_DETECTED
  2942. CAPI_CTR_LOADING
  2943. CAPI_CTR_RUNNING
  2944. CAPI_DATA_B3
  2945. CAPI_DATA_B3_CONF
  2946. CAPI_DATA_B3_CONF_LEN
  2947. CAPI_DATA_B3_IND
  2948. CAPI_DATA_B3_REQ
  2949. CAPI_DATA_B3_REQ_LEN
  2950. CAPI_DATA_B3_REQ_LEN64
  2951. CAPI_DATA_B3_RESP
  2952. CAPI_DATA_B3_RESP_LEN
  2953. CAPI_DEFAULT
  2954. CAPI_DISCONNECT
  2955. CAPI_DISCONNECT_B3
  2956. CAPI_DISCONNECT_B3_CONF
  2957. CAPI_DISCONNECT_B3_IND
  2958. CAPI_DISCONNECT_B3_IND_BASELEN
  2959. CAPI_DISCONNECT_B3_REQ
  2960. CAPI_DISCONNECT_B3_RESP
  2961. CAPI_DISCONNECT_B3_RESP_LEN
  2962. CAPI_DISCONNECT_CONF
  2963. CAPI_DISCONNECT_IND
  2964. CAPI_DISCONNECT_IND_LEN
  2965. CAPI_DISCONNECT_REQ
  2966. CAPI_DISCONNECT_RESP
  2967. CAPI_FACILITY
  2968. CAPI_FACILITY_CONF
  2969. CAPI_FACILITY_CONF_BASELEN
  2970. CAPI_FACILITY_DTMF
  2971. CAPI_FACILITY_HANDSET
  2972. CAPI_FACILITY_IND
  2973. CAPI_FACILITY_LI
  2974. CAPI_FACILITY_REQ
  2975. CAPI_FACILITY_RESP
  2976. CAPI_FACILITY_SUPPSVC
  2977. CAPI_FACILITY_V42BIS
  2978. CAPI_FACILITY_WAKEUP
  2979. CAPI_FLAGS_DELIVERY_CONFIRMATION
  2980. CAPI_FLAGS_RESERVED
  2981. CAPI_FUNCTION_GET_MANUFACTURER
  2982. CAPI_FUNCTION_GET_PROFILE
  2983. CAPI_FUNCTION_GET_SERIAL_NUMBER
  2984. CAPI_FUNCTION_GET_VERSION
  2985. CAPI_FUNCTION_LOOPBACK
  2986. CAPI_FUNCTION_MANUFACTURER
  2987. CAPI_FUNCTION_REGISTER
  2988. CAPI_FUNCTION_RELEASE
  2989. CAPI_GET_ERRCODE
  2990. CAPI_GET_FLAGS
  2991. CAPI_GET_MANUFACTURER
  2992. CAPI_GET_PROFILE
  2993. CAPI_GET_SERIAL
  2994. CAPI_GET_VERSION
  2995. CAPI_ILLAPPNR
  2996. CAPI_ILLCMDORSUBCMDORMSGTOSMALL
  2997. CAPI_IND
  2998. CAPI_INFO
  2999. CAPI_INFO_CONF
  3000. CAPI_INFO_IND
  3001. CAPI_INFO_REQ
  3002. CAPI_INFO_RESP
  3003. CAPI_INSTALLED
  3004. CAPI_INTEROPERABILITY
  3005. CAPI_INTEROPERABILITY_CONF
  3006. CAPI_INTEROPERABILITY_CONF_LEN
  3007. CAPI_INTEROPERABILITY_IND
  3008. CAPI_INTEROPERABILITY_IND_LEN
  3009. CAPI_INTEROPERABILITY_REQ
  3010. CAPI_INTEROPERABILITY_REQ_LEN
  3011. CAPI_INTEROPERABILITY_RESP
  3012. CAPI_INTEROPERABILITY_RESP_LEN
  3013. CAPI_LISTEN
  3014. CAPI_LISTEN_CONF
  3015. CAPI_LISTEN_REQ
  3016. CAPI_LOGBLKSIZETOSMALL
  3017. CAPI_MANUFACTURER
  3018. CAPI_MANUFACTURER_CMD
  3019. CAPI_MANUFACTURER_CONF
  3020. CAPI_MANUFACTURER_IND
  3021. CAPI_MANUFACTURER_LEN
  3022. CAPI_MANUFACTURER_REQ
  3023. CAPI_MANUFACTURER_RESP
  3024. CAPI_MAXAPPL
  3025. CAPI_MAXCONTR
  3026. CAPI_MAXDATAWINDOW
  3027. CAPI_MAX_BLKSIZE
  3028. CAPI_MSGBUFSIZETOOSMALL
  3029. CAPI_MSGBUSY
  3030. CAPI_MSGCTRLERNOTSUPPORTEXTEQUIP
  3031. CAPI_MSGCTRLERONLYSUPPORTEXTEQUIP
  3032. CAPI_MSGNOTINSTALLED
  3033. CAPI_MSGOSRESOURCEERR
  3034. CAPI_MSG_BASELEN
  3035. CAPI_NCCI_GETUNIT
  3036. CAPI_NCCI_OPENCOUNT
  3037. CAPI_NOERROR
  3038. CAPI_REASON
  3039. CAPI_RECEIVEOVERFLOW
  3040. CAPI_RECEIVEQUEUEEMPTY
  3041. CAPI_REGBUSY
  3042. CAPI_REGCTRLERNOTSUPPORTEXTEQUIP
  3043. CAPI_REGCTRLERONLYSUPPORTEXTEQUIP
  3044. CAPI_REGISTER
  3045. CAPI_REGNOTINSTALLED
  3046. CAPI_REGOSRESOURCEERR
  3047. CAPI_REGRESERVED
  3048. CAPI_REQ
  3049. CAPI_RESET_B3
  3050. CAPI_RESET_B3_CONF
  3051. CAPI_RESET_B3_IND
  3052. CAPI_RESET_B3_REQ
  3053. CAPI_RESET_B3_RESP
  3054. CAPI_RESP
  3055. CAPI_SELECT_B_PROTOCOL
  3056. CAPI_SELECT_B_PROTOCOL_CONF
  3057. CAPI_SELECT_B_PROTOCOL_REQ
  3058. CAPI_SENDQUEUEFULL
  3059. CAPI_SERIAL_LEN
  3060. CAPI_SET_FLAGS
  3061. CAPI_STDCONF_LEN
  3062. CAPI_SUPPSVC_GETSUPPORTED
  3063. CAPI_SUPPSVC_LISTEN
  3064. CAPI_TOOMANYAPPLS
  3065. CAPI_UNKNOWNNOTPAR
  3066. CAPLENGTH_MASK
  3067. CAPP_FLASH_CTRL
  3068. CAPP_JPEG_RATIO
  3069. CAPP_JPEG_SIZE_MAX
  3070. CAPP_LIGHT_CTRL
  3071. CAPP_MAIN_IMAGE_SIZE
  3072. CAPP_MCC_MODE
  3073. CAPP_WDR_EN
  3074. CAPP_YUVOUT_MAIN
  3075. CAPSULE_DIS_TOKEN
  3076. CAPSULE_EN_TOKEN
  3077. CAPS_0
  3078. CAPS_0_SUPPORT_LL123
  3079. CAPS_0_SUPPORT_LL4
  3080. CAPS_1
  3081. CAPS_2
  3082. CAPS_3
  3083. CAPS_4
  3084. CAPS_HI_1000BASET_FD_EEE
  3085. CAPS_HI_100BASETX_EEE
  3086. CAPS_HI_10BASET_EEE
  3087. CAPS_HI_10GBASET_FD_EEE
  3088. CAPS_HI_2P5GBASET_FD_EEE
  3089. CAPS_HI_5GBASET_FD_EEE
  3090. CAPS_HI_ASYMMETRIC_PAUSE
  3091. CAPS_HI_CABLE_DIAG
  3092. CAPS_HI_DOWNSHIFT
  3093. CAPS_HI_EFUSE_AGENT
  3094. CAPS_HI_EXT_LOOPBACK
  3095. CAPS_HI_INT_LOOPBACK
  3096. CAPS_HI_LINK_DROP
  3097. CAPS_HI_MAC_STOP
  3098. CAPS_HI_MEDIA_DETECT
  3099. CAPS_HI_PAUSE
  3100. CAPS_HI_PTP_AVB_EN
  3101. CAPS_HI_RESERVED1
  3102. CAPS_HI_RESERVED2
  3103. CAPS_HI_RESERVED3
  3104. CAPS_HI_RESERVED4
  3105. CAPS_HI_RESERVED5
  3106. CAPS_HI_RESERVED6
  3107. CAPS_HI_RESERVED7
  3108. CAPS_HI_RESERVED8
  3109. CAPS_HI_RESERVED9
  3110. CAPS_HI_SLEEP_PROXY
  3111. CAPS_HI_STATISTICS
  3112. CAPS_HI_TEMPERATURE
  3113. CAPS_HI_TRANSACTION_ID
  3114. CAPS_HI_WOL
  3115. CAPS_HI_WOL_TIMER
  3116. CAPS_LO_1000BASET_FD
  3117. CAPS_LO_1000BASET_HD
  3118. CAPS_LO_100BASET2_FD
  3119. CAPS_LO_100BASET2_HD
  3120. CAPS_LO_100BASET4_HD
  3121. CAPS_LO_100BASETX_FD
  3122. CAPS_LO_100BASETX_HD
  3123. CAPS_LO_10BASET_FD
  3124. CAPS_LO_10BASET_HD
  3125. CAPS_LO_10GBASET_FD
  3126. CAPS_LO_2P5GBASET_FD
  3127. CAPS_LO_5GBASET_FD
  3128. CAPS_START
  3129. CAPS_STOP
  3130. CAPT
  3131. CAPTRIM_CAL
  3132. CAPTUREOFFSET
  3133. CAPTURE_0_FROM_I2S_1
  3134. CAPTURE_0_FROM_I2S_2
  3135. CAPTURE_1_FROM_SPDIF
  3136. CAPTURE_2_FROM_AC97_1
  3137. CAPTURE_2_FROM_I2S_2
  3138. CAPTURE_3_FROM_I2S_3
  3139. CAPTURE_AC97
  3140. CAPTURE_AC97ADC
  3141. CAPTURE_AC97MIC
  3142. CAPTURE_BUF0_OFFSET
  3143. CAPTURE_BUF1_OFFSET
  3144. CAPTURE_BUFFER_SIZE
  3145. CAPTURE_BUF_PITCH
  3146. CAPTURE_CACHE_DATA
  3147. CAPTURE_CHANNEL_TYPE_INDEX
  3148. CAPTURE_CHANNEL_TYPE_MAX
  3149. CAPTURE_CHANNEL_TYPE_MPEG
  3150. CAPTURE_CHANNEL_TYPE_NONE
  3151. CAPTURE_CHANNEL_TYPE_PCM
  3152. CAPTURE_CHANNEL_TYPE_SLICED_VBI
  3153. CAPTURE_CHANNEL_TYPE_TS
  3154. CAPTURE_CHANNEL_TYPE_VBI
  3155. CAPTURE_CHANNEL_TYPE_YUV
  3156. CAPTURE_CONFIG
  3157. CAPTURE_CONFIGURED
  3158. CAPTURE_CONTROL
  3159. CAPTURE_DEBUG
  3160. CAPTURE_DMA_ADDR
  3161. CAPTURE_DRV_NAME
  3162. CAPTURE_EFX
  3163. CAPTURE_ENABLED
  3164. CAPTURE_END_DMA_DESCR_CH10
  3165. CAPTURE_END_DMA_DESCR_CH11
  3166. CAPTURE_END_DMA_DESCR_CH14
  3167. CAPTURE_END_DMA_DESCR_CH15
  3168. CAPTURE_EVENT_INTERRUPT
  3169. CAPTURE_FCI_ID_BASE
  3170. CAPTURE_FIFO_ADDR_OFFSET
  3171. CAPTURE_FIFO_OFFSET_ADDRESS
  3172. CAPTURE_FIFO_POINTER
  3173. CAPTURE_FLAG
  3174. CAPTURE_FLAG_PHYS_ONLY
  3175. CAPTURE_FLAG_PHYS_VIRT
  3176. CAPTURE_H
  3177. CAPTURE_HORIZ_COUNT
  3178. CAPTURE_HOST_BUSNUM_IND__CHECK_EN_MASK
  3179. CAPTURE_HOST_BUSNUM_IND__CHECK_EN__SHIFT
  3180. CAPTURE_HOST_BUSNUM__CHECK_EN_MASK
  3181. CAPTURE_HOST_BUSNUM__CHECK_EN__SHIFT
  3182. CAPTURE_MAX_NUM_PERIODS
  3183. CAPTURE_MAX_PERIOD_SIZE
  3184. CAPTURE_MIN_NUM_PERIODS
  3185. CAPTURE_MIN_PERIOD_SIZE
  3186. CAPTURE_MUTE
  3187. CAPTURE_P16V_SOURCE
  3188. CAPTURE_P16V_VOLUME1
  3189. CAPTURE_P16V_VOLUME2
  3190. CAPTURE_POINTER
  3191. CAPTURE_RATE_STATUS
  3192. CAPTURE_REC
  3193. CAPTURE_ROUTING1
  3194. CAPTURE_ROUTING2
  3195. CAPTURE_SOURCE
  3196. CAPTURE_SOURCE_CHANNEL0
  3197. CAPTURE_SOURCE_CHANNEL1
  3198. CAPTURE_SOURCE_CHANNEL2
  3199. CAPTURE_SOURCE_CHANNEL3
  3200. CAPTURE_SOURCE_RECORD_MAP
  3201. CAPTURE_SPDIF_CONTROL
  3202. CAPTURE_SPDIF_STATUS
  3203. CAPTURE_SRC_AUX
  3204. CAPTURE_SRC_FP_MIC
  3205. CAPTURE_SRC_LINE
  3206. CAPTURE_SRC_MIC
  3207. CAPTURE_START_DMA_DESCR_CH10
  3208. CAPTURE_START_DMA_DESCR_CH11
  3209. CAPTURE_START_DMA_DESCR_CH14
  3210. CAPTURE_START_DMA_DESCR_CH15
  3211. CAPTURE_START_END
  3212. CAPTURE_STREAM_MASK
  3213. CAPTURE_UNKNOWN
  3214. CAPTURE_URB_COMPLETED
  3215. CAPTURE_VOLUME1
  3216. CAPTURE_VOLUME2
  3217. CAPTURE_VSYNC
  3218. CAPTURE_X_WIDTH
  3219. CAPT_RANGE
  3220. CAPURE_SPDIF_USER_DATA0
  3221. CAPURE_SPDIF_USER_DATA1
  3222. CAPURE_SPDIF_USER_DATA2
  3223. CAP_ABOVE16MB
  3224. CAP_ALL
  3225. CAP_ALL_MOD
  3226. CAP_ANALOG_2GHz_REVISION
  3227. CAP_ANALOG_5GHz_REVISION
  3228. CAP_ASPI
  3229. CAP_AUDIT_CONTROL
  3230. CAP_AUDIT_READ
  3231. CAP_AUDIT_WRITE
  3232. CAP_AUTH_IMS_PRI
  3233. CAP_AUTH_IMS_RSA
  3234. CAP_AUTH_IMS_SEC
  3235. CAP_AUTH_RESULT_CR_BAD_TYPE
  3236. CAP_AUTH_RESULT_CR_NO_KEY
  3237. CAP_AUTH_RESULT_CR_SIG_FAIL
  3238. CAP_AUTH_RESULT_CR_SUCCESS
  3239. CAP_AUTH_RESULT_CR_WRONG_EP
  3240. CAP_BLOCK_SUSPEND
  3241. CAP_BOP_ALL
  3242. CAP_BSET
  3243. CAP_BULK_TRANSFER
  3244. CAP_BURST_SUPPORT
  3245. CAP_CACHEMODE
  3246. CAP_CAPLENGTH
  3247. CAP_CERTIFICATE_MAX_SIZE
  3248. CAP_CERT_IMS_EAPC
  3249. CAP_CERT_IMS_EARC
  3250. CAP_CERT_IMS_EASC
  3251. CAP_CERT_IMS_IAPC
  3252. CAP_CERT_IMS_IARC
  3253. CAP_CERT_IMS_IASC
  3254. CAP_CHANNEL0
  3255. CAP_CHANNEL1
  3256. CAP_CHAN_SPREAD_SUPPORT
  3257. CAP_CHAP_TUNING_SUPPORT
  3258. CAP_CHOWN
  3259. CAP_CIPHER_AES_CCM
  3260. CAP_CIPHER_CKIP
  3261. CAP_CIPHER_TKIP
  3262. CAP_COMPAT_HWCAP
  3263. CAP_COMPAT_HWCAP2
  3264. CAP_COMPRESSED_DATA
  3265. CAP_COMPRESS_SUPPORT
  3266. CAP_CONNECTION_ID_MAX
  3267. CAP_CONT_EVEN
  3268. CAP_CONT_ODD
  3269. CAP_COUNTRY_CODE
  3270. CAP_CRC_12B_16B_PER_LANE
  3271. CAP_CRC_14B
  3272. CAP_CRC_48B
  3273. CAP_CRYPT
  3274. CAP_CS5535
  3275. CAP_CS5536
  3276. CAP_CTL_MISC
  3277. CAP_CTL_MISC_DISPUSED
  3278. CAP_CTL_MISC_HDIV
  3279. CAP_CTL_MISC_HDIV4
  3280. CAP_CTL_MISC_HSYNCDIV2
  3281. CAP_CTL_MISC_ODDEVEN
  3282. CAP_CTL_MISC_SYNCTZHIGH
  3283. CAP_CTL_MISC_SYNCTZOR
  3284. CAP_DAC_OVERRIDE
  3285. CAP_DAC_READ_SEARCH
  3286. CAP_DATADGST
  3287. CAP_DATA_PATH_OFFLOAD
  3288. CAP_DCCPARAMS
  3289. CAP_DDA_X_INC
  3290. CAP_DDA_X_INIT
  3291. CAP_DDA_Y_INC
  3292. CAP_DDA_Y_INIT
  3293. CAP_DEBUG_WDCMSG_SUPPORT
  3294. CAP_DEVICE_TYPE
  3295. CAP_DFS
  3296. CAP_DIGEST_OFFLOAD
  3297. CAP_DYNAMIC_REAUTH
  3298. CAP_EMPTY_SET
  3299. CAP_ESS
  3300. CAP_EXTEND
  3301. CAP_EXTENDED_SECURITY
  3302. CAP_FAST_FRAMES_SUPPORT
  3303. CAP_FMT_IDX
  3304. CAP_FOR_EACH_U32
  3305. CAP_FOWNER
  3306. CAP_FREQ_RANGE_MSK
  3307. CAP_FSETID
  3308. CAP_FS_MASK_B0
  3309. CAP_FS_MASK_B1
  3310. CAP_FS_SET
  3311. CAP_FULL_SET
  3312. CAP_FW_DB
  3313. CAP_HCCPARAMS
  3314. CAP_HDRDGST
  3315. CAP_HIGH_2GHZ_CHAN
  3316. CAP_HIGH_5GHZ_CHAN
  3317. CAP_HWCAP
  3318. CAP_IBSS
  3319. CAP_IH_SRC_ID_END
  3320. CAP_IH_SRC_ID_START
  3321. CAP_IMS_RESULT_CERT_CLASS_INVAL
  3322. CAP_IMS_RESULT_CERT_CORRUPT
  3323. CAP_IMS_RESULT_CERT_FOUND
  3324. CAP_IMS_RESULT_CERT_NOT_FOUND
  3325. CAP_INFOLEVEL_PASSTHRU
  3326. CAP_IOCTL_BASE
  3327. CAP_IOC_AUTHENTICATE
  3328. CAP_IOC_GET_ENDPOINT_UID
  3329. CAP_IOC_GET_IMS_CERTIFICATE
  3330. CAP_IPC_LOCK
  3331. CAP_IPC_OWNER
  3332. CAP_KILL
  3333. CAP_LARGE_FILES
  3334. CAP_LARGE_READ_X
  3335. CAP_LARGE_WRITE_X
  3336. CAP_LAST
  3337. CAP_LAST_CAP
  3338. CAP_LAST_U32
  3339. CAP_LAST_U32_VALID_MASK
  3340. CAP_LEASE
  3341. CAP_LEVEL_II_OPLOCKS
  3342. CAP_LINUX_IMMUTABLE
  3343. CAP_LIST
  3344. CAP_LIST_DATA
  3345. CAP_LIST_SUPPORTED
  3346. CAP_LOCK_AND_READ
  3347. CAP_LOGIN_OFFLOAD
  3348. CAP_LOW_2GHZ_CHAN
  3349. CAP_LOW_5GHZ_CHAN
  3350. CAP_LWIO
  3351. CAP_MAC_ADMIN
  3352. CAP_MAC_OVERRIDE
  3353. CAP_MAC_REVISION
  3354. CAP_MAC_VERSION
  3355. CAP_MAP_WIDTH
  3356. CAP_MARKERS
  3357. CAP_MASK
  3358. CAP_MEM_START
  3359. CAP_MIC_AES_CCM
  3360. CAP_MIC_CKIP
  3361. CAP_MIC_TKIP
  3362. CAP_MIC_TKIP_WME
  3363. CAP_MIDR_ALL_VERSIONS
  3364. CAP_MIDR_RANGE
  3365. CAP_MIDR_RANGE_LIST
  3366. CAP_MKNOD
  3367. CAP_MODE0
  3368. CAP_MODE2
  3369. CAP_MODE_80211A
  3370. CAP_MODE_80211B
  3371. CAP_MODE_80211G
  3372. CAP_MODE_MASK
  3373. CAP_MPX_MODE
  3374. CAP_MULTI_CONN
  3375. CAP_MULTI_R2T
  3376. CAP_NET_ADMIN
  3377. CAP_NET_BIND_SERVICE
  3378. CAP_NET_BROADCAST
  3379. CAP_NET_RAW
  3380. CAP_NFSD_SET
  3381. CAP_NONE
  3382. CAP_NT_FIND
  3383. CAP_NT_SMBS
  3384. CAP_OFFSET_MAX
  3385. CAP_OPT_INSETID
  3386. CAP_OPT_NOAUDIT
  3387. CAP_OPT_NONE
  3388. CAP_OVERLAP
  3389. CAP_PADDING_OFFLOAD
  3390. CAP_PASS
  3391. CAP_PERSISTENT_HANDLES
  3392. CAP_PHY_REVISION
  3393. CAP_PI
  3394. CAP_PIP_X_END
  3395. CAP_PIP_X_START
  3396. CAP_PIP_Y_END
  3397. CAP_PIP_Y_START
  3398. CAP_PITCH
  3399. CAP_PORT_MASK
  3400. CAP_PRIVACY
  3401. CAP_PRIVACY_ON
  3402. CAP_PTR__CAP_PTR_MASK
  3403. CAP_PTR__CAP_PTR__MASK
  3404. CAP_PTR__CAP_PTR__SHIFT
  3405. CAP_RAID0
  3406. CAP_RAID1
  3407. CAP_RAID3
  3408. CAP_RAID5
  3409. CAP_RAW_MODE
  3410. CAP_RECOVERY_L0
  3411. CAP_RECOVERY_L1
  3412. CAP_RECOVERY_L2
  3413. CAP_REG_CAP_BITS
  3414. CAP_REG_DOMAIN
  3415. CAP_RPC_REMOTE_APIS
  3416. CAP_RX_EP_NUM
  3417. CAP_SENDTARGETS_OFFLOAD
  3418. CAP_SETFCAP
  3419. CAP_SETGID
  3420. CAP_SETPCAP
  3421. CAP_SETUID
  3422. CAP_SHARED_KEY
  3423. CAP_SHORTHDR
  3424. CAP_SIGNATURE_MAX_SIZE
  3425. CAP_SLEEP_AFTER_BEACON_BROKEN
  3426. CAP_SPAN
  3427. CAP_SPCIE_CAP_OFF
  3428. CAP_SPCIE_CAP_OFF_DSP_TX_PRESET0_MASK
  3429. CAP_SPCIE_CAP_OFF_USP_TX_PRESET0_MASK
  3430. CAP_SPCIE_CAP_OFF_USP_TX_PRESET0_SHIFT
  3431. CAP_STATE_REGISTERED
  3432. CAP_STATE_REG_SENT
  3433. CAP_STATE_UNKNOWN
  3434. CAP_STATUS32
  3435. CAP_SYSLOG
  3436. CAP_SYS_ADMIN
  3437. CAP_SYS_BOOT
  3438. CAP_SYS_CHROOT
  3439. CAP_SYS_MODULE
  3440. CAP_SYS_NICE
  3441. CAP_SYS_PACCT
  3442. CAP_SYS_PTRACE
  3443. CAP_SYS_RAWIO
  3444. CAP_SYS_RESOURCE
  3445. CAP_SYS_TIME
  3446. CAP_SYS_TTY_CONFIG
  3447. CAP_TARGET_REVISION
  3448. CAP_TARGET_VERSION
  3449. CAP_TESTMODE
  3450. CAP_TEXT_NEGO
  3451. CAP_TIMEOUT_MS
  3452. CAP_TOTAL_QUEUES
  3453. CAP_TO_GID_TABLE_SIZE
  3454. CAP_TO_INDEX
  3455. CAP_TO_MASK
  3456. CAP_TURBOG_SUPPORT
  3457. CAP_TURBO_PRIME_SUPPORT
  3458. CAP_TWICE_ANTENNAGAIN_2G
  3459. CAP_TWICE_ANTENNAGAIN_5G
  3460. CAP_TX_EP_NUM
  3461. CAP_U2_PORT_NUM
  3462. CAP_U3_PORT_NUM
  3463. CAP_UNICODE
  3464. CAP_UNIX
  3465. CAP_UOP_ALL
  3466. CAP_VALUE_MAX
  3467. CAP_VALUE_MIN
  3468. CAP_WAKE_ALARM
  3469. CAP_WIRELESS_MODES
  3470. CAP_WME_SUPPORT
  3471. CAP_XR_SUPPORT
  3472. CAP_X_END
  3473. CAP_X_START
  3474. CAP_Y_END
  3475. CAP_Y_START
  3476. CAR
  3477. CAR2CFG
  3478. CARCFG
  3479. CARD
  3480. CARDBUS
  3481. CARDBUS_LATENCY_TIMER
  3482. CARDBUS_PCI_IDSEL
  3483. CARDBUS_RESERVE_BUSNR
  3484. CARDBUS_SOCKET_REGS_BASE
  3485. CARDBUS_SOCKET_REGS_SIZE
  3486. CARDBUS_TYPE_DEFAULT
  3487. CARDBUS_TYPE_ENE
  3488. CARDBUS_TYPE_O2MICRO
  3489. CARDBUS_TYPE_RICOH
  3490. CARDBUS_TYPE_TI
  3491. CARDBUS_TYPE_TI113X
  3492. CARDBUS_TYPE_TI1250
  3493. CARDBUS_TYPE_TI12XX
  3494. CARDBUS_TYPE_TOPIC95
  3495. CARDBUS_TYPE_TOPIC97
  3496. CARDNAME
  3497. CARDS_WITH_FAULTY_LINK_INDICATORS
  3498. CARDU1
  3499. CARDU2
  3500. CARDU_MAX_SOCKETS
  3501. CARDVCC_SIZE
  3502. CARD_0
  3503. CARD_1
  3504. CARD_2
  3505. CARD_3
  3506. CARD_3V
  3507. CARD_4
  3508. CARD_5
  3509. CARD_5V
  3510. CARD_6
  3511. CARD_ACQ_COMPLETE
  3512. CARD_ACQ_FAILED
  3513. CARD_ACTIVITY
  3514. CARD_ASSOC_COMPLETE
  3515. CARD_ASSOC_FAILED
  3516. CARD_AUTH_COMPLETE
  3517. CARD_AUTH_REFUSED
  3518. CARD_AUTO_BLINK
  3519. CARD_AWAITING_PARAM
  3520. CARD_BOOT_DELAY_IN_MS
  3521. CARD_BOOT_TIMEOUT
  3522. CARD_BUSY
  3523. CARD_BUS_ID
  3524. CARD_CAP_SUBPAGE_WRITES
  3525. CARD_CARDBUS
  3526. CARD_CHANGE
  3527. CARD_CLK_EN
  3528. CARD_CLK_SOURCE
  3529. CARD_CLK_SWITCH
  3530. CARD_CMD_BACKUP
  3531. CARD_CMD_DSTROY_ABORT
  3532. CARD_CMD_DSTROY_EMERGENCY
  3533. CARD_CMD_DSTROY_EXTENDED
  3534. CARD_CMD_DSTROY_NORMAL
  3535. CARD_CMD_FPGA_RECONFIG_BR
  3536. CARD_CMD_FPGA_RECONFIG_MAIN
  3537. CARD_CMD_LOW_LEVEL_FORMAT
  3538. CARD_CMD_RESET
  3539. CARD_CMD_SHUTDOWN
  3540. CARD_CMD_STARTUP
  3541. CARD_CMD_UNINITIALIZE
  3542. CARD_CMD_deprecated
  3543. CARD_CONTROLLER_DATA
  3544. CARD_CONTROLLER_END
  3545. CARD_CONTROLLER_INDEX
  3546. CARD_CONTROLLER_START
  3547. CARD_DATA_SOURCE
  3548. CARD_DDEV
  3549. CARD_DDEV_ID
  3550. CARD_DEFAULT_AP_SSID
  3551. CARD_DEFAULT_AUTHEN
  3552. CARD_DEFAULT_BSSTYPE
  3553. CARD_DEFAULT_CHANNEL
  3554. CARD_DEFAULT_CLIENT_SSID
  3555. CARD_DEFAULT_CONFORMANCE
  3556. CARD_DEFAULT_DOT1X
  3557. CARD_DEFAULT_FILTER
  3558. CARD_DEFAULT_IW_MODE
  3559. CARD_DEFAULT_KEY1
  3560. CARD_DEFAULT_KEY2
  3561. CARD_DEFAULT_KEY3
  3562. CARD_DEFAULT_KEY4
  3563. CARD_DEFAULT_MAXFRAMEBURST
  3564. CARD_DEFAULT_MLME_MODE
  3565. CARD_DEFAULT_MODE
  3566. CARD_DEFAULT_PROFILE
  3567. CARD_DEFAULT_WDS
  3568. CARD_DEFAULT_WEP
  3569. CARD_DETECT
  3570. CARD_DETECT1
  3571. CARD_DETECT2
  3572. CARD_DETECT_EN
  3573. CARD_DETECT_IRQ
  3574. CARD_DEVID
  3575. CARD_DISABLE
  3576. CARD_DISABLED_MSK
  3577. CARD_DISABLE_PHY_OFF
  3578. CARD_DL_PARAM
  3579. CARD_DL_PARAM_ERROR
  3580. CARD_DMA1_CTL
  3581. CARD_DOING_ACQ
  3582. CARD_DRIVE_SEL
  3583. CARD_DT_CHG
  3584. CARD_DT_EN
  3585. CARD_ENABLED
  3586. CARD_EXIST
  3587. CARD_FROM_DEV
  3588. CARD_FUNCTIONING
  3589. CARD_GPIO
  3590. CARD_GPIO_DIR
  3591. CARD_HAS_ACTIVITY_LED
  3592. CARD_HAS_PCCARD_ID
  3593. CARD_HAS_POWER_LED
  3594. CARD_INFO
  3595. CARD_INFO_PORTM_FULLDUPLEX
  3596. CARD_INFO_PORTM_HALFDUPLEX
  3597. CARD_INFO_PORTS_100M
  3598. CARD_INFO_PORTS_10G
  3599. CARD_INFO_PORTS_10M
  3600. CARD_INFO_PORTS_1G
  3601. CARD_INFO_PORTS_25G
  3602. CARD_INFO_TYPE_10G_FIBRE_A
  3603. CARD_INFO_TYPE_10G_FIBRE_B
  3604. CARD_INFO_TYPE_1G_COPPER_A
  3605. CARD_INFO_TYPE_1G_COPPER_B
  3606. CARD_INFO_TYPE_1G_FIBRE_A
  3607. CARD_INFO_TYPE_1G_FIBRE_B
  3608. CARD_INIT_ERROR
  3609. CARD_INSERTED
  3610. CARD_INT
  3611. CARD_INT_PEND
  3612. CARD_INT_STATUS_REG
  3613. CARD_IO_READY
  3614. CARD_IS_RX_ON
  3615. CARD_LB_MAC
  3616. CARD_LB_NONE
  3617. CARD_LB_PHY
  3618. CARD_MAX_MEM_OFFSET
  3619. CARD_MAX_MEM_SPEED
  3620. CARD_MAX_SLOTS
  3621. CARD_MEM_END
  3622. CARD_MEM_START
  3623. CARD_MINOR_BITS
  3624. CARD_MODE_IDENTIFY
  3625. CARD_MODE_MASK
  3626. CARD_NAME
  3627. CARD_NAME_MAX_LEN
  3628. CARD_NAME_SHORT
  3629. CARD_NOT_EXIST
  3630. CARD_OCP_DETECT
  3631. CARD_OC_CLR
  3632. CARD_OC_EVER
  3633. CARD_OC_INT_CLR
  3634. CARD_OC_INT_EN
  3635. CARD_OC_NOW
  3636. CARD_OE
  3637. CARD_OPT_WIDTH
  3638. CARD_OPT_WIDTH8
  3639. CARD_OUT_EN
  3640. CARD_PCCARD
  3641. CARD_PRESENT_VALUE
  3642. CARD_PULL_CTL1
  3643. CARD_PULL_CTL2
  3644. CARD_PULL_CTL3
  3645. CARD_PULL_CTL4
  3646. CARD_PULL_CTL5
  3647. CARD_PULL_CTL6
  3648. CARD_PWR
  3649. CARD_PWR_CTL
  3650. CARD_RDEV
  3651. CARD_RDEV_ID
  3652. CARD_READY
  3653. CARD_READY_IND
  3654. CARD_RESET
  3655. CARD_REST0
  3656. CARD_RST
  3657. CARD_SC
  3658. CARD_SCI
  3659. CARD_SELECT
  3660. CARD_SHARE_48_MS
  3661. CARD_SHARE_48_SD
  3662. CARD_SHARE_48_XD
  3663. CARD_SHARE_BAROSSA_MS
  3664. CARD_SHARE_BAROSSA_SD
  3665. CARD_SHARE_BAROSSA_XD
  3666. CARD_SHARE_LQFP48
  3667. CARD_SHARE_LQFP_SEL
  3668. CARD_SHARE_MASK
  3669. CARD_SHARE_MODE
  3670. CARD_SHARE_MS
  3671. CARD_SHARE_MULTI_LUN
  3672. CARD_SHARE_NORMAL
  3673. CARD_SHARE_QFN24
  3674. CARD_SHARE_SD
  3675. CARD_SHARE_XD
  3676. CARD_SLOTA
  3677. CARD_SLOTB
  3678. CARD_SLOTB_OFFSET
  3679. CARD_STATE_BOOTERR
  3680. CARD_STATE_BOOTING
  3681. CARD_STATE_CMD_DISABLE
  3682. CARD_STATE_CMD_ENABLE
  3683. CARD_STATE_CMD_HALT
  3684. CARD_STATE_DOWN
  3685. CARD_STATE_DSTROYING
  3686. CARD_STATE_FAULT
  3687. CARD_STATE_FORMATTING
  3688. CARD_STATE_GOOD
  3689. CARD_STATE_HARDSETUP
  3690. CARD_STATE_NOTIFICATION
  3691. CARD_STATE_RD_ONLY_FAULT
  3692. CARD_STATE_RUN
  3693. CARD_STATE_SHUTDOWN
  3694. CARD_STATE_SHUTTING_DOWN
  3695. CARD_STATE_SOFTSETUP
  3696. CARD_STATE_STARTING
  3697. CARD_STATE_UNINITIALIZED
  3698. CARD_STATE_UNUSED
  3699. CARD_STATS_LEN
  3700. CARD_STOP
  3701. CARD_TO_DEV
  3702. CARD_TYPE_EEPROM
  3703. CARD_TYPE_IO
  3704. CARD_TYPE_MASK
  3705. CARD_TYPE_MEM
  3706. CARD_TYPE_PARALLEL_FLASH
  3707. CARD_TYPE_SPI_FLASH
  3708. CARD_VOLTAGE_SELECT
  3709. CARD_VOLTAGE_SENSE
  3710. CARD_WDEV
  3711. CARD_WDEV_ID
  3712. CARD_WP
  3713. CARD_XV
  3714. CARD_YV
  3715. CARDbGetCurrentTSF
  3716. CARDbIsOFDMinBasicRate
  3717. CARDbRadioPowerOff
  3718. CARDbRadioPowerOn
  3719. CARDbSetBeaconPeriod
  3720. CARDbSetPhyParameter
  3721. CARDbSoftwareReset
  3722. CARDbUpdateTSF
  3723. CARDbyGetPktType
  3724. CARDqGetNextTBTT
  3725. CARDqGetTSFOffset
  3726. CARDvSafeResetRx
  3727. CARDvSafeResetTx
  3728. CARDvSetFirstNextTBTT
  3729. CARDvSetLoopbackMode
  3730. CARDvSetRSPINF
  3731. CARDvUpdateBasicTopRate
  3732. CARDvUpdateNextTBTT
  3733. CARDwGetCCKControlRate
  3734. CARDwGetOFDMControlRate
  3735. CARELINK_IDS
  3736. CARFREQ
  3737. CARHDR
  3738. CARKIT
  3739. CARL9170FW_API_MAX_VER
  3740. CARL9170FW_API_MIN_VER
  3741. CARL9170FW_CHK_DESC_CUR_VER
  3742. CARL9170FW_CHK_DESC_MIN_VER
  3743. CARL9170FW_CHK_DESC_SIZE
  3744. CARL9170FW_COMMAND_CAM
  3745. CARL9170FW_COMMAND_PHY
  3746. CARL9170FW_DBG_DESC_CUR_VER
  3747. CARL9170FW_DBG_DESC_MIN_VER
  3748. CARL9170FW_DBG_DESC_SIZE
  3749. CARL9170FW_DESC_HEAD_SIZE
  3750. CARL9170FW_DESC_MAX_LENGTH
  3751. CARL9170FW_DUMMY_FEATURE
  3752. CARL9170FW_FILL_DESC
  3753. CARL9170FW_FIXED_5GHZ_PSM
  3754. CARL9170FW_FIX_DESC_CUR_VER
  3755. CARL9170FW_FIX_DESC_MIN_VER
  3756. CARL9170FW_FIX_DESC_SIZE
  3757. CARL9170FW_GET_DAY
  3758. CARL9170FW_GET_MONTH
  3759. CARL9170FW_GET_YEAR
  3760. CARL9170FW_GPIO_INTERRUPT
  3761. CARL9170FW_HANDLE_BACK_REQ
  3762. CARL9170FW_HAS_WREGB_CMD
  3763. CARL9170FW_HW_COUNTERS
  3764. CARL9170FW_LAST_DESC_CUR_VER
  3765. CARL9170FW_LAST_DESC_MIN_VER
  3766. CARL9170FW_LAST_DESC_SIZE
  3767. CARL9170FW_MAGIC_SIZE
  3768. CARL9170FW_MAX_SIZE
  3769. CARL9170FW_MINIBOOT
  3770. CARL9170FW_MIN_SIZE
  3771. CARL9170FW_MOTD_DESC_CUR_VER
  3772. CARL9170FW_MOTD_DESC_MIN_VER
  3773. CARL9170FW_MOTD_DESC_SIZE
  3774. CARL9170FW_MOTD_RELEASE_LEN
  3775. CARL9170FW_MOTD_STRING_LEN
  3776. CARL9170FW_NAME
  3777. CARL9170FW_OTUS_DESC_CUR_VER
  3778. CARL9170FW_OTUS_DESC_MIN_VER
  3779. CARL9170FW_OTUS_DESC_SIZE
  3780. CARL9170FW_PATTERN_GENERATOR
  3781. CARL9170FW_PHY_HT_DYN2040
  3782. CARL9170FW_PHY_HT_ENABLE
  3783. CARL9170FW_PHY_HT_EXT_CHAN_OFF
  3784. CARL9170FW_PHY_HT_EXT_CHAN_OFF_S
  3785. CARL9170FW_PSM
  3786. CARL9170FW_RX_BA_FILTER
  3787. CARL9170FW_RX_FILTER
  3788. CARL9170FW_SET_DAY
  3789. CARL9170FW_SET_MONTH
  3790. CARL9170FW_SET_YEAR
  3791. CARL9170FW_TXSQ_DESC_CUR_VER
  3792. CARL9170FW_TXSQ_DESC_MIN_VER
  3793. CARL9170FW_TXSQ_DESC_SIZE
  3794. CARL9170FW_UNUSABLE
  3795. CARL9170FW_USB_DOWN_STREAM
  3796. CARL9170FW_USB_INIT_FIRMWARE
  3797. CARL9170FW_USB_RESP_EP2
  3798. CARL9170FW_USB_UP_STREAM
  3799. CARL9170FW_VERSION_DAY
  3800. CARL9170FW_VERSION_GIT
  3801. CARL9170FW_VERSION_MONTH
  3802. CARL9170FW_VERSION_YEAR
  3803. CARL9170FW_WLANTX_CAB
  3804. CARL9170FW_WOL
  3805. CARL9170FW_WOL_DESC_CUR_VER
  3806. CARL9170FW_WOL_DESC_MIN_VER
  3807. CARL9170FW_WOL_DESC_SIZE
  3808. CARL9170_BAW_BITS
  3809. CARL9170_BAW_LEN
  3810. CARL9170_BAW_SIZE
  3811. CARL9170_BCN_CTRL_CAB_TRIGGER
  3812. CARL9170_BCN_CTRL_CMD_SIZE
  3813. CARL9170_BCN_CTRL_DRAIN
  3814. CARL9170_BUG_MAGIC
  3815. CARL9170_BUMP_QUEUE
  3816. CARL9170_BW_20
  3817. CARL9170_BW_40_ABOVE
  3818. CARL9170_BW_40_BELOW
  3819. CARL9170_CMD_ASYNC_FLAG
  3820. CARL9170_CMD_BCN_CTRL
  3821. CARL9170_CMD_BCN_CTRL_ASYNC
  3822. CARL9170_CMD_DKEY
  3823. CARL9170_CMD_ECHO
  3824. CARL9170_CMD_EKEY
  3825. CARL9170_CMD_FREQUENCY
  3826. CARL9170_CMD_FREQ_START
  3827. CARL9170_CMD_PSM
  3828. CARL9170_CMD_PSM_ASYNC
  3829. CARL9170_CMD_READ_TSF
  3830. CARL9170_CMD_REBOOT
  3831. CARL9170_CMD_REBOOT_ASYNC
  3832. CARL9170_CMD_RF_INIT
  3833. CARL9170_CMD_RREG
  3834. CARL9170_CMD_RX_FILTER
  3835. CARL9170_CMD_SWRST
  3836. CARL9170_CMD_SYNTH
  3837. CARL9170_CMD_TALLY
  3838. CARL9170_CMD_WOL
  3839. CARL9170_CMD_WREG
  3840. CARL9170_CMD_WREGB
  3841. CARL9170_CMD_WREG_ASYNC
  3842. CARL9170_DEBUG_RING_SIZE
  3843. CARL9170_DISABLE_KEY_CMD_SIZE
  3844. CARL9170_ERP_AUTO
  3845. CARL9170_ERP_CTS
  3846. CARL9170_ERP_INVALID
  3847. CARL9170_ERP_MAC80211
  3848. CARL9170_ERP_OFF
  3849. CARL9170_ERP_RTS
  3850. CARL9170_ERR_MAGIC
  3851. CARL9170_FILL_QUEUE
  3852. CARL9170_GPIO_SIZE
  3853. CARL9170_HT_CAP
  3854. CARL9170_HWRNG_CACHE_SIZE
  3855. CARL9170_IDLE
  3856. CARL9170_JANITOR_DELAY
  3857. CARL9170_MAX_CMD_LEN
  3858. CARL9170_MAX_CMD_PAYLOAD_LEN
  3859. CARL9170_MAX_RX_BUFFER_SIZE
  3860. CARL9170_NUM_TX_AGG_MAX
  3861. CARL9170_NUM_TX_LIMIT_HARD
  3862. CARL9170_NUM_TX_LIMIT_SOFT
  3863. CARL9170_ONE_LED
  3864. CARL9170_PRETBTT_KUS
  3865. CARL9170_PSM_COUNTER
  3866. CARL9170_PSM_COUNTER_S
  3867. CARL9170_PSM_SIZE
  3868. CARL9170_PSM_SLEEP
  3869. CARL9170_PSM_SOFTWARE
  3870. CARL9170_PSM_WAKE
  3871. CARL9170_QUEUE_STUCK_TIMEOUT
  3872. CARL9170_QUEUE_TIMEOUT
  3873. CARL9170_RF_INIT_RESULT_SIZE
  3874. CARL9170_RF_INIT_SIZE
  3875. CARL9170_RR_COMMAND_TIMEOUT
  3876. CARL9170_RR_FATAL_FIRMWARE_ERROR
  3877. CARL9170_RR_INVALID_RSP
  3878. CARL9170_RR_LOST_RSP
  3879. CARL9170_RR_NO_REASON
  3880. CARL9170_RR_STUCK_TX
  3881. CARL9170_RR_TOO_MANY_FIRMWARE_ERRORS
  3882. CARL9170_RR_TOO_MANY_PHY_ERRORS
  3883. CARL9170_RR_UNRESPONSIVE_DEVICE
  3884. CARL9170_RR_USER_REQUEST
  3885. CARL9170_RR_WATCHDOG
  3886. CARL9170_RSP_ATIM
  3887. CARL9170_RSP_BEACON_CONFIG
  3888. CARL9170_RSP_BOOT
  3889. CARL9170_RSP_FLAG
  3890. CARL9170_RSP_GPIO
  3891. CARL9170_RSP_HEXDUMP
  3892. CARL9170_RSP_PRETBTT
  3893. CARL9170_RSP_RADAR
  3894. CARL9170_RSP_TEXT
  3895. CARL9170_RSP_TXCOMP
  3896. CARL9170_RSP_TX_STATUS_NUM
  3897. CARL9170_RSP_WATCHDOG
  3898. CARL9170_RX_FILTER_BAD
  3899. CARL9170_RX_FILTER_CMD_SIZE
  3900. CARL9170_RX_FILTER_CTL_BACKR
  3901. CARL9170_RX_FILTER_CTL_OTHER
  3902. CARL9170_RX_FILTER_CTL_PSPOLL
  3903. CARL9170_RX_FILTER_DATA
  3904. CARL9170_RX_FILTER_DECRY_FAIL
  3905. CARL9170_RX_FILTER_EVERYTHING
  3906. CARL9170_RX_FILTER_MGMT
  3907. CARL9170_RX_FILTER_OTHER_RA
  3908. CARL9170_SET_KEY_CMD_SIZE
  3909. CARL9170_STARTED
  3910. CARL9170_STAT_WORK
  3911. CARL9170_STOPPED
  3912. CARL9170_TID_STATE_IDLE
  3913. CARL9170_TID_STATE_INVALID
  3914. CARL9170_TID_STATE_KILLED
  3915. CARL9170_TID_STATE_PROGRESS
  3916. CARL9170_TID_STATE_SHUTDOWN
  3917. CARL9170_TID_STATE_SUSPEND
  3918. CARL9170_TID_STATE_XMIT
  3919. CARL9170_TSF_RSP_SIZE
  3920. CARL9170_TX_MAX_RATES
  3921. CARL9170_TX_MAX_RATE_TRIES
  3922. CARL9170_TX_MAX_RETRY_RATES
  3923. CARL9170_TX_STATUS_QUEUE
  3924. CARL9170_TX_STATUS_QUEUE_S
  3925. CARL9170_TX_STATUS_RIX
  3926. CARL9170_TX_STATUS_RIX_S
  3927. CARL9170_TX_STATUS_SIZE
  3928. CARL9170_TX_STATUS_SUCCESS
  3929. CARL9170_TX_STATUS_TRIES
  3930. CARL9170_TX_STATUS_TRIES_S
  3931. CARL9170_TX_SUPERDESC_LEN
  3932. CARL9170_TX_SUPERFRAME_LEN
  3933. CARL9170_TX_SUPER_AMPDU_COMMIT_DENSITY
  3934. CARL9170_TX_SUPER_AMPDU_COMMIT_DENSITY_S
  3935. CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR
  3936. CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR_S
  3937. CARL9170_TX_SUPER_AMPDU_DENSITY
  3938. CARL9170_TX_SUPER_AMPDU_DENSITY_S
  3939. CARL9170_TX_SUPER_AMPDU_FACTOR
  3940. CARL9170_TX_SUPER_AMPDU_FACTOR_S
  3941. CARL9170_TX_SUPER_MISC_ASSIGN_SEQ
  3942. CARL9170_TX_SUPER_MISC_CAB
  3943. CARL9170_TX_SUPER_MISC_FILL_IN_TSF
  3944. CARL9170_TX_SUPER_MISC_QUEUE
  3945. CARL9170_TX_SUPER_MISC_QUEUE_S
  3946. CARL9170_TX_SUPER_MISC_VIF_ID
  3947. CARL9170_TX_SUPER_MISC_VIF_ID_S
  3948. CARL9170_TX_SUPER_RI_AMPDU
  3949. CARL9170_TX_SUPER_RI_AMPDU_S
  3950. CARL9170_TX_SUPER_RI_ERP_PROT
  3951. CARL9170_TX_SUPER_RI_ERP_PROT_S
  3952. CARL9170_TX_SUPER_RI_TRIES
  3953. CARL9170_TX_SUPER_RI_TRIES_S
  3954. CARL9170_TX_TIMEOUT
  3955. CARL9170_TX_USER_RATE_TRIES
  3956. CARL9170_UNKNOWN_STATE
  3957. CARL9170_WOL_CMD_SIZE
  3958. CARL9170_WOL_DISCONNECT
  3959. CARL9170_WOL_MAGIC_PKT
  3960. CARL9170_WPS_BUTTON
  3961. CARMINEFB_DEFAULT_VIDEO_MODE
  3962. CARMINE_CARMINE_H
  3963. CARMINE_CONFIG_BAR
  3964. CARMINE_CTL_REG
  3965. CARMINE_CTL_REG_CLOCK_ENABLE
  3966. CARMINE_CTL_REG_IST_MASK_ALL
  3967. CARMINE_CTL_REG_SOFTWARE_RESET
  3968. CARMINE_CURSOR0_PRIORITY_MASK
  3969. CARMINE_CURSOR1_PRIORITY_MASK
  3970. CARMINE_CURSOR_CUTZ_MASK
  3971. CARMINE_DCTL_DLL_RESET
  3972. CARMINE_DCTL_INIT_WAIT_INTERVAL
  3973. CARMINE_DCTL_INIT_WAIT_LIMIT
  3974. CARMINE_DCTL_REG
  3975. CARMINE_DCTL_REG_DDRIF2_DDRIF1
  3976. CARMINE_DCTL_REG_IOCONT1_IOCONT0
  3977. CARMINE_DCTL_REG_MODE_ADD
  3978. CARMINE_DCTL_REG_REFRESH_SETTIME2
  3979. CARMINE_DCTL_REG_RSV0_STATES
  3980. CARMINE_DCTL_REG_RSV2_RSV1
  3981. CARMINE_DCTL_REG_SETTIME1_EMODE
  3982. CARMINE_DCTL_REG_STATES_MASK
  3983. CARMINE_DEN
  3984. CARMINE_DFLT_IP_CLOCK_ENABLE
  3985. CARMINE_DFLT_IP_DCTL_ADD
  3986. CARMINE_DFLT_IP_DCTL_DDRIF1
  3987. CARMINE_DFLT_IP_DCTL_DDRIF2
  3988. CARMINE_DFLT_IP_DCTL_EMODE
  3989. CARMINE_DFLT_IP_DCTL_FIFO_DEPTH
  3990. CARMINE_DFLT_IP_DCTL_IO_CONT0
  3991. CARMINE_DFLT_IP_DCTL_IO_CONT1
  3992. CARMINE_DFLT_IP_DCTL_MODE
  3993. CARMINE_DFLT_IP_DCTL_MODE_AFT_RST
  3994. CARMINE_DFLT_IP_DCTL_REFRESH
  3995. CARMINE_DFLT_IP_DCTL_RESERVE0
  3996. CARMINE_DFLT_IP_DCTL_RESERVE2
  3997. CARMINE_DFLT_IP_DCTL_SET_TIME1
  3998. CARMINE_DFLT_IP_DCTL_SET_TIME2
  3999. CARMINE_DFLT_IP_DCTL_STATES
  4000. CARMINE_DFLT_IP_DCTL_STATES_AFT_RST
  4001. CARMINE_DISP0_REG
  4002. CARMINE_DISP1_REG
  4003. CARMINE_DISPLAY_MEM
  4004. CARMINE_DISP_DCM_MASK
  4005. CARMINE_DISP_HDB_SHIFT
  4006. CARMINE_DISP_HSW_SHIFT
  4007. CARMINE_DISP_HTP_SHIFT
  4008. CARMINE_DISP_REG_BLEND_MODE_L0
  4009. CARMINE_DISP_REG_BLEND_MODE_L1
  4010. CARMINE_DISP_REG_BLEND_MODE_L2
  4011. CARMINE_DISP_REG_BLEND_MODE_L3
  4012. CARMINE_DISP_REG_BLEND_MODE_L4
  4013. CARMINE_DISP_REG_BLEND_MODE_L5
  4014. CARMINE_DISP_REG_BLEND_MODE_L6
  4015. CARMINE_DISP_REG_BLEND_MODE_L7
  4016. CARMINE_DISP_REG_CUR1_POS
  4017. CARMINE_DISP_REG_CUR2_POS
  4018. CARMINE_DISP_REG_CURSOR_MODE
  4019. CARMINE_DISP_REG_C_TRANS
  4020. CARMINE_DISP_REG_DCM1
  4021. CARMINE_DISP_REG_H_PERIOD
  4022. CARMINE_DISP_REG_H_TOTAL
  4023. CARMINE_DISP_REG_L0PX
  4024. CARMINE_DISP_REG_L0PY
  4025. CARMINE_DISP_REG_L0RM
  4026. CARMINE_DISP_REG_L0_DISP_ADR
  4027. CARMINE_DISP_REG_L0_DISP_POS
  4028. CARMINE_DISP_REG_L0_EXT_MODE
  4029. CARMINE_DISP_REG_L0_MODE_W_H
  4030. CARMINE_DISP_REG_L0_ORG_ADR
  4031. CARMINE_DISP_REG_L0_TRANS
  4032. CARMINE_DISP_REG_L0_WIN_POS
  4033. CARMINE_DISP_REG_L0_WIN_SIZE
  4034. CARMINE_DISP_REG_L1_EXT_MODE
  4035. CARMINE_DISP_REG_L1_ORG_ADR
  4036. CARMINE_DISP_REG_L1_TRANS
  4037. CARMINE_DISP_REG_L1_WIDTH
  4038. CARMINE_DISP_REG_L1_WIN_POS
  4039. CARMINE_DISP_REG_L1_WIN_SIZE
  4040. CARMINE_DISP_REG_L2PX
  4041. CARMINE_DISP_REG_L2PY
  4042. CARMINE_DISP_REG_L2RM
  4043. CARMINE_DISP_REG_L2_DISP_ADR1
  4044. CARMINE_DISP_REG_L2_DISP_POS
  4045. CARMINE_DISP_REG_L2_EXT_MODE
  4046. CARMINE_DISP_REG_L2_MODE_W_H
  4047. CARMINE_DISP_REG_L2_ORG_ADR1
  4048. CARMINE_DISP_REG_L2_TRANS
  4049. CARMINE_DISP_REG_L2_WIN_POS
  4050. CARMINE_DISP_REG_L2_WIN_SIZE
  4051. CARMINE_DISP_REG_L3PX
  4052. CARMINE_DISP_REG_L3PY
  4053. CARMINE_DISP_REG_L3RM
  4054. CARMINE_DISP_REG_L3_DISP_ADR1
  4055. CARMINE_DISP_REG_L3_DISP_POS
  4056. CARMINE_DISP_REG_L3_EXT_MODE
  4057. CARMINE_DISP_REG_L3_MODE_W_H
  4058. CARMINE_DISP_REG_L3_ORG_ADR1
  4059. CARMINE_DISP_REG_L3_TRANS
  4060. CARMINE_DISP_REG_L3_WIN_POS
  4061. CARMINE_DISP_REG_L3_WIN_SIZE
  4062. CARMINE_DISP_REG_L4PX
  4063. CARMINE_DISP_REG_L4PY
  4064. CARMINE_DISP_REG_L4RM
  4065. CARMINE_DISP_REG_L4_DISP_ADR1
  4066. CARMINE_DISP_REG_L4_DISP_POS
  4067. CARMINE_DISP_REG_L4_EXT_MODE
  4068. CARMINE_DISP_REG_L4_MODE_W_H
  4069. CARMINE_DISP_REG_L4_ORG_ADR1
  4070. CARMINE_DISP_REG_L4_TRANS
  4071. CARMINE_DISP_REG_L4_WIN_POS
  4072. CARMINE_DISP_REG_L4_WIN_SIZE
  4073. CARMINE_DISP_REG_L5PX
  4074. CARMINE_DISP_REG_L5PY
  4075. CARMINE_DISP_REG_L5RM
  4076. CARMINE_DISP_REG_L5_DISP_ADR1
  4077. CARMINE_DISP_REG_L5_DISP_POS
  4078. CARMINE_DISP_REG_L5_EXT_MODE
  4079. CARMINE_DISP_REG_L5_MODE_W_H
  4080. CARMINE_DISP_REG_L5_ORG_ADR1
  4081. CARMINE_DISP_REG_L5_TRANS
  4082. CARMINE_DISP_REG_L5_WIN_POS
  4083. CARMINE_DISP_REG_L5_WIN_SIZE
  4084. CARMINE_DISP_REG_L6PX
  4085. CARMINE_DISP_REG_L6PY
  4086. CARMINE_DISP_REG_L6RM
  4087. CARMINE_DISP_REG_L6_DISP_ADR0
  4088. CARMINE_DISP_REG_L6_DISP_POS
  4089. CARMINE_DISP_REG_L6_EXT_MODE
  4090. CARMINE_DISP_REG_L6_MODE_W_H
  4091. CARMINE_DISP_REG_L6_ORG_ADR1
  4092. CARMINE_DISP_REG_L6_TRANS
  4093. CARMINE_DISP_REG_L6_WIN_POS
  4094. CARMINE_DISP_REG_L6_WIN_SIZE
  4095. CARMINE_DISP_REG_L7PX
  4096. CARMINE_DISP_REG_L7PY
  4097. CARMINE_DISP_REG_L7RM
  4098. CARMINE_DISP_REG_L7_DISP_ADR0
  4099. CARMINE_DISP_REG_L7_DISP_POS
  4100. CARMINE_DISP_REG_L7_EXT_MODE
  4101. CARMINE_DISP_REG_L7_MODE_W_H
  4102. CARMINE_DISP_REG_L7_ORG_ADR1
  4103. CARMINE_DISP_REG_L7_TRANS
  4104. CARMINE_DISP_REG_L7_WIN_POS
  4105. CARMINE_DISP_REG_L7_WIN_SIZE
  4106. CARMINE_DISP_REG_MLMR_TRANS
  4107. CARMINE_DISP_REG_V_H_W_H_POS
  4108. CARMINE_DISP_REG_V_PERIOD_POS
  4109. CARMINE_DISP_REG_V_TOTAL
  4110. CARMINE_DISP_VDP_SHIFT
  4111. CARMINE_DISP_VSW_SHIFT
  4112. CARMINE_DISP_VTR_SHIFT
  4113. CARMINE_DISP_WIDTH_SHIFT
  4114. CARMINE_DISP_WIDTH_UNIT
  4115. CARMINE_DISP_WIN_H_SHIFT
  4116. CARMINE_EXTEND_MODE
  4117. CARMINE_EXTEND_MODE_MASK
  4118. CARMINE_EXT_CMODE_DIRECT24_RGBA
  4119. CARMINE_GRAPH_REG
  4120. CARMINE_GRAPH_REG_DC_OFFSET_LX
  4121. CARMINE_GRAPH_REG_DC_OFFSET_LY
  4122. CARMINE_GRAPH_REG_DC_OFFSET_PX
  4123. CARMINE_GRAPH_REG_DC_OFFSET_PY
  4124. CARMINE_GRAPH_REG_DC_OFFSET_TX
  4125. CARMINE_GRAPH_REG_DC_OFFSET_TY
  4126. CARMINE_GRAPH_REG_VRERRM
  4127. CARMINE_GRAPH_REG_VRINTM
  4128. CARMINE_L0E
  4129. CARMINE_L2E
  4130. CARMINE_MEMORY_BAR
  4131. CARMINE_MEM_SIZE
  4132. CARMINE_OVERLAY_EXT_MODE
  4133. CARMINE_TOTAL_DIPLAY_MEM
  4134. CARMINE_USE_DISPLAY0
  4135. CARMINE_USE_DISPLAY1
  4136. CARMINE_WB_REG
  4137. CARMINE_WB_REG_WBM
  4138. CARMINE_WB_REG_WBM_DEFAULT
  4139. CARMINE_WINDOW_MODE
  4140. CARM_ARRAY_INFO
  4141. CARM_CME
  4142. CARM_CMS0
  4143. CARM_DEBUG
  4144. CARM_HAVE_RESP
  4145. CARM_HMPHA
  4146. CARM_HMUC
  4147. CARM_IHQP
  4148. CARM_INITC
  4149. CARM_INT_MASK
  4150. CARM_INT_STAT
  4151. CARM_IOC_GET_TCQ
  4152. CARM_IOC_SCAN_CHAN
  4153. CARM_IOC_SET_TCQ
  4154. CARM_LMUC
  4155. CARM_MAX_HOST_SG
  4156. CARM_MAX_PORTS
  4157. CARM_MAX_REQ
  4158. CARM_MAX_REQ_SG
  4159. CARM_MAX_WAIT_Q
  4160. CARM_MINORS_PER_MAJOR
  4161. CARM_MSG_ARRAY
  4162. CARM_MSG_FLUSH
  4163. CARM_MSG_GET_CAPACITY
  4164. CARM_MSG_IOCTL
  4165. CARM_MSG_LOW_WATER
  4166. CARM_MSG_MISC
  4167. CARM_MSG_READ
  4168. CARM_MSG_SIZE
  4169. CARM_MSG_VERIFY
  4170. CARM_MSG_WRITE
  4171. CARM_NDEBUG
  4172. CARM_Q_FULL
  4173. CARM_Q_LEN
  4174. CARM_RESP_IDX
  4175. CARM_RME
  4176. CARM_RMI
  4177. CARM_SG_BOUNDARY
  4178. CARM_SG_LOW_WATER
  4179. CARM_SHM_SIZE
  4180. CARM_VERBOSE_DEBUG
  4181. CARM_WZBC
  4182. CARP2BREAKADR01
  4183. CARP2BREAKADR23
  4184. CARP2CTL
  4185. CARP2HALTCODE
  4186. CARP2INT
  4187. CARP2INTCTL
  4188. CARP2INTEN
  4189. CARRIEROK
  4190. CARRIER_CHECK_DELAY
  4191. CARRIER_EXTENSION
  4192. CARRIER_EXT_ERR_DET
  4193. CARRIER_LOCK
  4194. CARRIER_MSEQAM1
  4195. CARRIER_MSEQAM2
  4196. CARRIZO_GB_ADDR_CONFIG_GOLDEN
  4197. CARRIZO_IV_SRCID_CP_COMPUTE_QUERY_STATUS
  4198. CARRY
  4199. CARRYSET
  4200. CARRY_INT
  4201. CARRY_ON
  4202. CARRY_REG_1
  4203. CARRY_REG_2
  4204. CARVEOUT_SZ
  4205. CAR_CAIP
  4206. CAR_FREQ0
  4207. CAR_FREQ1
  4208. CAR_FREQ2
  4209. CAR_SUPER_CCLKG_DIVIDER
  4210. CAS
  4211. CASC
  4212. CASE
  4213. CASE_COND
  4214. CASE_DELIMITER
  4215. CASE_LOWER_BASE
  4216. CASE_LOWER_EXT
  4217. CASE_PIPExTRE
  4218. CASE_PIPExTRN
  4219. CASE_SENSITIVE
  4220. CASL_MARK
  4221. CAST
  4222. CAST5_BLOCK_SIZE
  4223. CAST5_MAX_KEY_SIZE
  4224. CAST5_MIN_KEY_SIZE
  4225. CAST5_PARALLEL_BLOCKS
  4226. CAST64
  4227. CAST6_BLOCK_SIZE
  4228. CAST6_MAX_KEY_SIZE
  4229. CAST6_MIN_KEY_SIZE
  4230. CAST6_PARALLEL_BLOCKS
  4231. CASTPTR
  4232. CAST_PTR_TO_U32
  4233. CAST_TO_U64
  4234. CAST_U32_TO_PTR
  4235. CASU_MARK
  4236. CASX
  4237. CAS_1000MB_MIN_FRAME
  4238. CAS_ADVERTISE_1000FULL
  4239. CAS_ADVERTISE_1000HALF
  4240. CAS_ADVERTISE_ASYM_PAUSE
  4241. CAS_ADVERTISE_PAUSE
  4242. CAS_ALIGN
  4243. CAS_BASE
  4244. CAS_BMCR_SPEED1000
  4245. CAS_BMSR_1000_EXTEND
  4246. CAS_DEF_MSG_ENABLE
  4247. CAS_EXTEND_1000TFULL
  4248. CAS_EXTEND_1000THALF
  4249. CAS_EXTEND_1000XFULL
  4250. CAS_EXTEND_1000XHALF
  4251. CAS_FLAG_1000MB_CAP
  4252. CAS_FLAG_ENTROPY_DEV
  4253. CAS_FLAG_NO_HW_CSUM
  4254. CAS_FLAG_REG_PLUS
  4255. CAS_FLAG_RXD_POST
  4256. CAS_FLAG_RXD_POST_MASK
  4257. CAS_FLAG_RXD_POST_SHIFT
  4258. CAS_FLAG_SATURN
  4259. CAS_FLAG_TARGET_ABORT
  4260. CAS_FREQ
  4261. CAS_HP_ALT_FIRMWARE
  4262. CAS_HP_FIRMWARE
  4263. CAS_ID_REV2
  4264. CAS_ID_REVPLUS
  4265. CAS_ID_REVPLUS02u
  4266. CAS_ID_REVSATURNB2
  4267. CAS_JUMBO_PAGE_SHIFT
  4268. CAS_LINK_FAST_TIMEOUT
  4269. CAS_LINK_TIMEOUT
  4270. CAS_LPA_1000FULL
  4271. CAS_LPA_1000HALF
  4272. CAS_LPA_ASYM_PAUSE
  4273. CAS_LPA_PAUSE
  4274. CAS_MARK
  4275. CAS_MAX_MTU
  4276. CAS_MAX_PAGE_SHIFT
  4277. CAS_MAX_REGS
  4278. CAS_MC_EXACT_MATCH_SIZE
  4279. CAS_MC_HASH_MAX
  4280. CAS_MC_HASH_SIZE
  4281. CAS_MII_1000_CTRL
  4282. CAS_MII_1000_EXTEND
  4283. CAS_MII_1000_STATUS
  4284. CAS_MII_ANNPRR
  4285. CAS_MII_ANNPTR
  4286. CAS_MIN_FRAME
  4287. CAS_MIN_MTU
  4288. CAS_MIN_PAGE_SHIFT
  4289. CAS_NCPUS
  4290. CAS_NUM_STAT_KEYS
  4291. CAS_OFFSET
  4292. CAS_PHY_MII
  4293. CAS_PHY_MII_MDIO0
  4294. CAS_PHY_MII_MDIO1
  4295. CAS_PHY_SERDES
  4296. CAS_PHY_UNKNOWN
  4297. CAS_PREF_CACHELINE_SIZE
  4298. CAS_PROG_IP46TCP4_PREAMBLE
  4299. CAS_REG_LEN
  4300. CAS_RESET_ALL
  4301. CAS_RESET_MTU
  4302. CAS_RESET_SPARE
  4303. CAS_ROUND_PAGE
  4304. CAS_TABORT
  4305. CAS_TX_RINGN_BASE
  4306. CAS_TX_TIMEOUT
  4307. CAS_VAL
  4308. CAT
  4309. CAT1
  4310. CAT2
  4311. CAT25_INFO
  4312. CAT2_
  4313. CAT2_STR
  4314. CAT2_STR_
  4315. CAT3
  4316. CAT34TS02C_DEVID
  4317. CAT34TS02C_DEVID_MASK
  4318. CAT34TS04_DEVID
  4319. CAT34TS04_DEVID_MASK
  4320. CAT3_
  4321. CAT5140_104
  4322. CAT5140_503
  4323. CAT6095_DEVID
  4324. CAT6095_DEVID_MASK
  4325. CATALOG_BTREE_MUTEX
  4326. CATCH_EINTR
  4327. CATN
  4328. CATOMICXCHG
  4329. CATU_ADDR_MASK
  4330. CATU_ADDR_SHIFT
  4331. CATU_AXICTRL
  4332. CATU_AXICTRL_ARCACHE
  4333. CATU_AXICTRL_ARCACHE_MASK
  4334. CATU_AXICTRL_ARCACHE_SHIFT
  4335. CATU_AXICTRL_ARPROT_MASK
  4336. CATU_AXICTRL_VAL
  4337. CATU_CONTROL
  4338. CATU_CONTROL_ENABLE
  4339. CATU_DEFAULT_INADDR
  4340. CATU_DEVARCH
  4341. CATU_ENTRY_ADDR
  4342. CATU_ENTRY_VALID
  4343. CATU_INADDRHI
  4344. CATU_INADDRLO
  4345. CATU_IRQEN
  4346. CATU_IRQEN_OFF
  4347. CATU_IRQEN_ON
  4348. CATU_LINK_NEXT
  4349. CATU_LINK_PREV
  4350. CATU_MODE
  4351. CATU_MODE_PASS_THROUGH
  4352. CATU_MODE_TRANSLATE
  4353. CATU_OS_ARPROT
  4354. CATU_OS_AXICTRL
  4355. CATU_PAGES_PER_SYSPAGE
  4356. CATU_PAGE_SHIFT
  4357. CATU_PAGE_SIZE
  4358. CATU_PTRS_PER_PAGE
  4359. CATU_PTRS_PER_SYSPAGE
  4360. CATU_REG32
  4361. CATU_REG_PAIR
  4362. CATU_SLADDRHI
  4363. CATU_SLADDRLO
  4364. CATU_STATUS
  4365. CATU_STATUS_ADRERR
  4366. CATU_STATUS_AXIERR
  4367. CATU_STATUS_READY
  4368. CATU_VALID_ENTRY
  4369. CATWEASEL_NUM_HWIFS
  4370. CAT_AE
  4371. CAT_CAPT_CTRL
  4372. CAT_CAPT_PARM
  4373. CAT_CE_BIT
  4374. CAT_CL_MASK
  4375. CAT_CL_SHIFT
  4376. CAT_CT_SHIFT
  4377. CAT_CT_VAL_ASYNC
  4378. CAT_CT_VAL_CONTROL
  4379. CAT_CT_VAL_ISOC
  4380. CAT_CT_VAL_SYNC
  4381. CAT_EXIF
  4382. CAT_FCE_BIT
  4383. CAT_FD
  4384. CAT_FLASH
  4385. CAT_LENS
  4386. CAT_MFE_BIT
  4387. CAT_MONITOR
  4388. CAT_MT_BIT
  4389. CAT_PARAM
  4390. CAT_RNW_BIT
  4391. CAT_SYSTEM
  4392. CAT_WB
  4393. CAUSE
  4394. CAUSEB_BD
  4395. CAUSEB_CE
  4396. CAUSEB_DC
  4397. CAUSEB_EXCCODE
  4398. CAUSEB_FDCI
  4399. CAUSEB_IP
  4400. CAUSEB_IP0
  4401. CAUSEB_IP1
  4402. CAUSEB_IP2
  4403. CAUSEB_IP3
  4404. CAUSEB_IP4
  4405. CAUSEB_IP5
  4406. CAUSEB_IP6
  4407. CAUSEB_IP7
  4408. CAUSEB_IV
  4409. CAUSEB_PCI
  4410. CAUSEB_TI
  4411. CAUSEB_WP
  4412. CAUSEF_BD
  4413. CAUSEF_CE
  4414. CAUSEF_DC
  4415. CAUSEF_EXCCODE
  4416. CAUSEF_FDCI
  4417. CAUSEF_IP
  4418. CAUSEF_IP0
  4419. CAUSEF_IP1
  4420. CAUSEF_IP2
  4421. CAUSEF_IP3
  4422. CAUSEF_IP4
  4423. CAUSEF_IP5
  4424. CAUSEF_IP6
  4425. CAUSEF_IP7
  4426. CAUSEF_IV
  4427. CAUSEF_PCI
  4428. CAUSEF_TI
  4429. CAUSEF_WP
  4430. CAUSE_BERRINTR
  4431. CAUSE_OFF
  4432. CAU_FSM_ETH_RX
  4433. CAU_FSM_ETH_TX
  4434. CAU_HC_DISABLE_STATE
  4435. CAU_HC_ENABLE_STATE
  4436. CAU_HC_STOPPED_STATE
  4437. CAU_PI_ENTRY_FSM_SEL_MASK
  4438. CAU_PI_ENTRY_FSM_SEL_SHIFT
  4439. CAU_PI_ENTRY_PI_TIMESET_MASK
  4440. CAU_PI_ENTRY_PI_TIMESET_SHIFT
  4441. CAU_PI_ENTRY_PROD_VAL_MASK
  4442. CAU_PI_ENTRY_PROD_VAL_SHIFT
  4443. CAU_PI_ENTRY_RESERVED_MASK
  4444. CAU_PI_ENTRY_RESERVED_SHIFT
  4445. CAU_REG_CQE_AGG_UNIT_SIZE_RT_OFFSET
  4446. CAU_REG_DBG_DWORD_ENABLE
  4447. CAU_REG_DBG_FORCE_FRAME
  4448. CAU_REG_DBG_FORCE_VALID
  4449. CAU_REG_DBG_SELECT
  4450. CAU_REG_DBG_SHIFT
  4451. CAU_REG_LONG_TIMEOUT_THRESHOLD
  4452. CAU_REG_PI_MEMORY
  4453. CAU_REG_PI_MEMORY_RT_OFFSET
  4454. CAU_REG_PI_MEMORY_RT_SIZE
  4455. CAU_REG_SB_ADDR_MEMORY
  4456. CAU_REG_SB_ADDR_MEMORY_RT_OFFSET
  4457. CAU_REG_SB_ADDR_MEMORY_RT_SIZE
  4458. CAU_REG_SB_VAR_MEMORY
  4459. CAU_REG_SB_VAR_MEMORY_RT_OFFSET
  4460. CAU_REG_SB_VAR_MEMORY_RT_SIZE
  4461. CAU_SB_ENTRY_PF_NUMBER_MASK
  4462. CAU_SB_ENTRY_PF_NUMBER_SHIFT
  4463. CAU_SB_ENTRY_SB_PROD_MASK
  4464. CAU_SB_ENTRY_SB_PROD_SHIFT
  4465. CAU_SB_ENTRY_SB_TIMESET0_MASK
  4466. CAU_SB_ENTRY_SB_TIMESET0_SHIFT
  4467. CAU_SB_ENTRY_SB_TIMESET1_MASK
  4468. CAU_SB_ENTRY_SB_TIMESET1_SHIFT
  4469. CAU_SB_ENTRY_STATE0_MASK
  4470. CAU_SB_ENTRY_STATE0_SHIFT
  4471. CAU_SB_ENTRY_STATE1_MASK
  4472. CAU_SB_ENTRY_STATE1_SHIFT
  4473. CAU_SB_ENTRY_TIMER_RES0_MASK
  4474. CAU_SB_ENTRY_TIMER_RES0_SHIFT
  4475. CAU_SB_ENTRY_TIMER_RES1_MASK
  4476. CAU_SB_ENTRY_TIMER_RES1_SHIFT
  4477. CAU_SB_ENTRY_TPH_MASK
  4478. CAU_SB_ENTRY_TPH_SHIFT
  4479. CAU_SB_ENTRY_VF_NUMBER_MASK
  4480. CAU_SB_ENTRY_VF_NUMBER_SHIFT
  4481. CAU_SB_ENTRY_VF_VALID_MASK
  4482. CAU_SB_ENTRY_VF_VALID_SHIFT
  4483. CAVIUM_CPU_PART_THUNDERX
  4484. CAVIUM_CPU_PART_THUNDERX2
  4485. CAVIUM_CPU_PART_THUNDERX_81XX
  4486. CAVIUM_CPU_PART_THUNDERX_83XX
  4487. CAVIUM_MAX_MMC
  4488. CAVIUM_OCTEON_DCACHE_PREFETCH_WAR
  4489. CAVIUM_PTP_H
  4490. CAVIUM_SMMUV2
  4491. CAVLC
  4492. CAWR_RR_DIS
  4493. CAWR_RX_DMA_WEIGHT_MASK
  4494. CAWR_RX_DMA_WEIGHT_SHIFT
  4495. CAWR_TX_DMA_WEIGHT_MASK
  4496. CAWR_TX_DMA_WEIGHT_SHIFT
  4497. CAYMAN_BLIT_SHADERS_H
  4498. CAYMAN_CGCG_CGLS_DEFAULT_LENGTH
  4499. CAYMAN_CGCG_CGLS_DISABLE_LENGTH
  4500. CAYMAN_CGCG_CGLS_ENABLE_LENGTH
  4501. CAYMAN_DB_DEPTH_INFO
  4502. CAYMAN_DB_EQAA
  4503. CAYMAN_DMA1_CNTL
  4504. CAYMAN_GB_ADDR_CONFIG_GOLDEN
  4505. CAYMAN_MAX_BACKENDS
  4506. CAYMAN_MAX_BACKENDS_MASK
  4507. CAYMAN_MAX_BACKENDS_PER_SE_MASK
  4508. CAYMAN_MAX_FRC_EOV_CNT
  4509. CAYMAN_MAX_LDS_NUM
  4510. CAYMAN_MAX_PIPES
  4511. CAYMAN_MAX_PIPES_MASK
  4512. CAYMAN_MAX_SH_GPRS
  4513. CAYMAN_MAX_SH_STACK_ENTRIES
  4514. CAYMAN_MAX_SH_THREADS
  4515. CAYMAN_MAX_SIMDS
  4516. CAYMAN_MAX_SIMDS_MASK
  4517. CAYMAN_MAX_SIMDS_PER_SE_MASK
  4518. CAYMAN_MAX_TCC
  4519. CAYMAN_MAX_TCC_MASK
  4520. CAYMAN_MAX_TEMP_GPRS
  4521. CAYMAN_MC_UCODE_SIZE
  4522. CAYMAN_MGCG_DEFAULT_LENGTH
  4523. CAYMAN_MGCG_DISABLE_LENGTH
  4524. CAYMAN_MGCG_ENABLE_LENGTH
  4525. CAYMAN_MSAA_NUM_SAMPLES_MASK
  4526. CAYMAN_MSAA_NUM_SAMPLES_SHIFT
  4527. CAYMAN_PACKET3_DEALLOC_STATE
  4528. CAYMAN_PA_SC_AA_CONFIG
  4529. CAYMAN_PFP_UCODE_SIZE
  4530. CAYMAN_PM4_UCODE_SIZE
  4531. CAYMAN_RING_TYPE_CP1_INDEX
  4532. CAYMAN_RING_TYPE_CP2_INDEX
  4533. CAYMAN_RING_TYPE_DMA1_INDEX
  4534. CAYMAN_RLC_UCODE_SIZE
  4535. CAYMAN_SMC_INT_VECTOR_SIZE
  4536. CAYMAN_SMC_INT_VECTOR_START
  4537. CAYMAN_SMC_UCODE_SIZE
  4538. CAYMAN_SMC_UCODE_START
  4539. CAYMAN_SQ_EX_ALLOC_TABLE_SLOTS
  4540. CAYMAN_SX_SCATTER_EXPORT_BASE
  4541. CAYMAN_SYSLS_DEFAULT_LENGTH
  4542. CAYMAN_SYSLS_DISABLE_LENGTH
  4543. CAYMAN_SYSLS_ENABLE_LENGTH
  4544. CAYMAN_VGT_OFFCHIP_LDS_BASE
  4545. CAYMAN_WB_DMA1_RING_TEST_OFFSET
  4546. CAYMAN_WB_DMA1_RPTR_OFFSET
  4547. CA_42_CA42_PRODUCT_ID
  4548. CA_42_CA42_VENDOR_ID
  4549. CA_ACK_ECE
  4550. CA_ACK_SLOWPATH
  4551. CA_ACK_WIN_UPDATE
  4552. CA_ANSWER
  4553. CA_APP_INFO
  4554. CA_APP_INFO_ENQUIRY
  4555. CA_BYPASS
  4556. CA_CI
  4557. CA_CI_LINK
  4558. CA_CI_MODULE_PRESENT
  4559. CA_CI_MODULE_READY
  4560. CA_CI_PHYS
  4561. CA_CLOSE_MMI
  4562. CA_DESCR
  4563. CA_DISPLAY_CONTROL
  4564. CA_DISPLAY_REPLY
  4565. CA_DSS
  4566. CA_ECD
  4567. CA_ENQUIRY
  4568. CA_ENTER_MENU
  4569. CA_EVENT_COMPLETE_CWR
  4570. CA_EVENT_CWND_RESTART
  4571. CA_EVENT_ECN_IS_CE
  4572. CA_EVENT_ECN_NO_CE
  4573. CA_EVENT_LOSS
  4574. CA_EVENT_TX_START
  4575. CA_GET_CAP
  4576. CA_GET_DESCR_INFO
  4577. CA_GET_MSG
  4578. CA_GET_SLOT_INFO
  4579. CA_I2S_CA_I2S
  4580. CA_I2S_HBR_CHSTAT
  4581. CA_INFO
  4582. CA_INFO_ENQUIRY
  4583. CA_KEYPAD_CONTROL
  4584. CA_KEYPRESS
  4585. CA_LIST_LAST
  4586. CA_LIST_MORE
  4587. CA_MASK
  4588. CA_MBATT
  4589. CA_MENU_ANSWER
  4590. CA_MENU_LAST
  4591. CA_MENU_MORE
  4592. CA_MIDI_MODE_INPUT
  4593. CA_MIDI_MODE_OUTPUT
  4594. CA_NDS
  4595. CA_PMT
  4596. CA_PMT_REPLY
  4597. CA_R0ATT
  4598. CA_R0CE_REQ
  4599. CA_R0RE_RSP
  4600. CA_R1ATT
  4601. CA_R1CE_REQ
  4602. CA_R1RE_RSP
  4603. CA_R2ATT
  4604. CA_R2CE_REQ
  4605. CA_R2RE_RSP
  4606. CA_R3ATT
  4607. CA_R3CE_REQ
  4608. CA_R3RE_RSP
  4609. CA_REG_OFFSET
  4610. CA_RESET
  4611. CA_SC
  4612. CA_SEND_MSG
  4613. CA_SET_DESCR
  4614. CA_TEXT_LAST
  4615. CA_TEXT_MORE
  4616. CA_VOLUME
  4617. CA_WRITEBACK
  4618. CB1_INT
  4619. CB2_INT
  4620. CB710_DUMP_ACCESS_16
  4621. CB710_DUMP_ACCESS_32
  4622. CB710_DUMP_ACCESS_8
  4623. CB710_DUMP_ACCESS_ALL
  4624. CB710_DUMP_ACCESS_MASK
  4625. CB710_DUMP_REGS_ALL
  4626. CB710_DUMP_REGS_MASK
  4627. CB710_DUMP_REGS_MMC
  4628. CB710_DUMP_REGS_MS
  4629. CB710_DUMP_REGS_SM
  4630. CB710_DUMP_REGS_TEMPLATE
  4631. CB710_MAX_DIVIDER_IDX
  4632. CB710_MMC_C1_4BIT_DATA_BUS
  4633. CB710_MMC_C2_READ_PIO_SIZE_MASK
  4634. CB710_MMC_CMD_AC
  4635. CB710_MMC_CMD_ADTC
  4636. CB710_MMC_CMD_BC
  4637. CB710_MMC_CMD_BCR
  4638. CB710_MMC_CMD_CODE_MASK
  4639. CB710_MMC_CMD_CODE_SHIFT
  4640. CB710_MMC_CMD_PARAM_PORT
  4641. CB710_MMC_CMD_TYPE_MASK
  4642. CB710_MMC_CMD_TYPE_PORT
  4643. CB710_MMC_CONFIG0_PORT
  4644. CB710_MMC_CONFIG1_PORT
  4645. CB710_MMC_CONFIG2_PORT
  4646. CB710_MMC_CONFIG3_PORT
  4647. CB710_MMC_CONFIGB_PORT
  4648. CB710_MMC_CONFIG_PORT
  4649. CB710_MMC_DATA_PORT
  4650. CB710_MMC_DATA_READ
  4651. CB710_MMC_IE_CARD_INSERTION_STATUS
  4652. CB710_MMC_IE_CISTATUS_MASK
  4653. CB710_MMC_IE_IRQ_ENABLE
  4654. CB710_MMC_IE_TEST_MASK
  4655. CB710_MMC_IRQ_ENABLE_PORT
  4656. CB710_MMC_IS_APP_CMD
  4657. CB710_MMC_RESPONSE0_PORT
  4658. CB710_MMC_RESPONSE1_PORT
  4659. CB710_MMC_RESPONSE2_PORT
  4660. CB710_MMC_RESPONSE3_PORT
  4661. CB710_MMC_RSP_136
  4662. CB710_MMC_RSP_BUSY
  4663. CB710_MMC_RSP_NONE
  4664. CB710_MMC_RSP_NO_CRC
  4665. CB710_MMC_RSP_PRESENT
  4666. CB710_MMC_RSP_PRESENT_MASK
  4667. CB710_MMC_RSP_PRESENT_X
  4668. CB710_MMC_RSP_R1
  4669. CB710_MMC_RSP_TYPE_MASK
  4670. CB710_MMC_S0_FIFO_UNDERFLOW
  4671. CB710_MMC_S1_CARD_CHANGED
  4672. CB710_MMC_S1_COMMAND_SENT
  4673. CB710_MMC_S1_DATA_TRANSFER_DONE
  4674. CB710_MMC_S1_PIO_TRANSFER_DONE
  4675. CB710_MMC_S1_RESET
  4676. CB710_MMC_S2_BUSY_10
  4677. CB710_MMC_S2_BUSY_20
  4678. CB710_MMC_S2_FIFO_EMPTY
  4679. CB710_MMC_S2_FIFO_READY
  4680. CB710_MMC_S3_CARD_DETECTED
  4681. CB710_MMC_S3_WRITE_PROTECTED
  4682. CB710_MMC_STATUS0_PORT
  4683. CB710_MMC_STATUS1_PORT
  4684. CB710_MMC_STATUS2_PORT
  4685. CB710_MMC_STATUS3_PORT
  4686. CB710_MMC_STATUS_ERROR_EVENTS
  4687. CB710_MMC_STATUS_PORT
  4688. CB710_MMC_TRANSFER_SIZE_PORT
  4689. CB710_PORT_ACCESSORS
  4690. CB710_READ_AND_DUMP_REGS_TEMPLATE
  4691. CB710_READ_REGS_TEMPLATE
  4692. CB710_REG_ACCESS_TEMPLATES
  4693. CB710_REG_COUNT
  4694. CB710_SLOT_MMC
  4695. CB710_SLOT_MS
  4696. CB710_SLOT_SM
  4697. CBA2R_VA64
  4698. CBA2R_VMID16
  4699. CBACR_N
  4700. CBAF_IFACECLASS
  4701. CBAF_IFACEPROTOCOL
  4702. CBAF_IFACESUBCLASS
  4703. CBAF_REQ_GET_ASSOCIATION_INFORMATION
  4704. CBAF_REQ_GET_ASSOCIATION_REQUEST
  4705. CBAF_REQ_SET_ASSOCIATION_RESPONSE
  4706. CBAR
  4707. CBAR_ENB
  4708. CBAR_IRPTNDX
  4709. CBAR_KEY
  4710. CBAR_MASK
  4711. CBAR_OFF
  4712. CBAR_ON
  4713. CBAR_S1_BPSHCFG
  4714. CBAR_S1_BPSHCFG_NSH
  4715. CBAR_S1_MEMATTR
  4716. CBAR_S1_MEMATTR_WB
  4717. CBAR_TYPE
  4718. CBAR_TYPE_S1_TRANS_S2_BYPASS
  4719. CBAR_TYPE_S1_TRANS_S2_FAULT
  4720. CBAR_TYPE_S1_TRANS_S2_TRANS
  4721. CBAR_TYPE_S2_TRANS
  4722. CBAR_VMID
  4723. CBAUD
  4724. CBAUDEX
  4725. CBA_NAME_LEN
  4726. CBCMAC_DIGEST_SIZE
  4727. CBCOND
  4728. CBCONDCC
  4729. CBCONDCS
  4730. CBCONDE
  4731. CBCONDG
  4732. CBCONDGE
  4733. CBCONDGEU
  4734. CBCONDGU
  4735. CBCONDL
  4736. CBCONDLE
  4737. CBCONDLEU
  4738. CBCONDLU
  4739. CBCONDN
  4740. CBCONDNE
  4741. CBCONDPOS
  4742. CBCONDVC
  4743. CBCONDVS
  4744. CBCOND_OP
  4745. CBC_DEC
  4746. CBC_ENABLE
  4747. CBCallBack
  4748. CBDCOCTRL5
  4749. CBDC_SC
  4750. CBDIVFACTOR
  4751. CBDR_BUFADDR
  4752. CBDR_DATLEN
  4753. CBDR_SC
  4754. CBDS_SC
  4755. CBDW_BUFADDR
  4756. CBDW_DATLEN
  4757. CBDW_SC
  4758. CBD_RESET_REG_PRINCETON_RESET
  4759. CBEQ
  4760. CBER_MASK
  4761. CBER_ROME
  4762. CBE_CAUSE_ADDRESS_SPACE_DECODE_ERROR
  4763. CBE_CAUSE_DATA_SEGMENT_LIMIT_EXCEPTION
  4764. CBE_CAUSE_EXECUTION_HW_ERROR
  4765. CBE_CAUSE_FORCED_ERROR
  4766. CBE_CAUSE_HA_REQUEST_TIMEOUT
  4767. CBE_CAUSE_HA_RESPONSE_DATA_ERROR
  4768. CBE_CAUSE_HA_RESPONSE_FATAL
  4769. CBE_CAUSE_HA_RESPONSE_NON_FATAL
  4770. CBE_CAUSE_IAA_GAA_MISMATCH
  4771. CBE_CAUSE_INVALID_INSTRUCTION
  4772. CBE_CAUSE_OS_FATAL_TLB_FAULT
  4773. CBE_CAUSE_PE_CHECK_DATA_ERROR
  4774. CBE_CAUSE_PROTOCOL_STATE_DATA_ERROR
  4775. CBE_CAUSE_RA_REQUEST_TIMEOUT
  4776. CBE_CAUSE_RA_RESPONSE_DATA_ERROR
  4777. CBE_CAUSE_RA_RESPONSE_FATAL
  4778. CBE_CAUSE_RA_RESPONSE_NON_FATAL
  4779. CBE_CAUSE_RI
  4780. CBE_CAUSE_TLBHW_ERROR
  4781. CBE_CAUSE_UNMAPPED_MODE_FORBIDDEN
  4782. CBE_COUNT_ALL_CYCLES
  4783. CBE_COUNT_ALL_MODES
  4784. CBE_COUNT_HYPERVISOR_MODE
  4785. CBE_COUNT_PROBLEM_MODE
  4786. CBE_COUNT_SUPERVISOR_MODE
  4787. CBE_IIC_IRQ_IPI
  4788. CBE_IIC_IRQ_VALID
  4789. CBE_IIC_IR_DEST_NODE
  4790. CBE_IIC_IR_DEST_UNIT
  4791. CBE_IIC_IR_IOC_0
  4792. CBE_IIC_IR_IOC_1S
  4793. CBE_IIC_IR_PRIO
  4794. CBE_IIC_IR_PT_0
  4795. CBE_IIC_IR_PT_1
  4796. CBE_IIC_IS_PMI
  4797. CBE_IOPTE_H
  4798. CBE_IOPTE_IOID_Mask
  4799. CBE_IOPTE_M
  4800. CBE_IOPTE_PP_R
  4801. CBE_IOPTE_PP_W
  4802. CBE_IOPTE_RPN_Mask
  4803. CBE_IOPTE_SO_R
  4804. CBE_IOPTE_SO_RW
  4805. CBE_MIC_DISABLE_AUX_TRC_WRAP
  4806. CBE_MIC_DISABLE_PWR_SAV_0
  4807. CBE_MIC_DISABLE_PWR_SAV_1
  4808. CBE_MIC_DISABLE_PWR_SAV_2
  4809. CBE_MIC_ECC_DISABLE_0
  4810. CBE_MIC_ECC_DISABLE_1
  4811. CBE_MIC_ECC_REP_SINGLE_0
  4812. CBE_MIC_ECC_REP_SINGLE_1
  4813. CBE_MIC_ENABLE_AUX_TRC
  4814. CBE_MIC_ENABLE_AUX_TRC_INT
  4815. CBE_MIC_EXC_BLOCK_SCRUB
  4816. CBE_MIC_EXC_FAST_SCRUB
  4817. CBE_MIC_FIR_ECC_CTE_MASK
  4818. CBE_MIC_FIR_ECC_ERR_MASK
  4819. CBE_MIC_FIR_ECC_MULTI_0_CTE
  4820. CBE_MIC_FIR_ECC_MULTI_0_ERR
  4821. CBE_MIC_FIR_ECC_MULTI_0_RESET
  4822. CBE_MIC_FIR_ECC_MULTI_0_SET
  4823. CBE_MIC_FIR_ECC_MULTI_1_CTE
  4824. CBE_MIC_FIR_ECC_MULTI_1_ERR
  4825. CBE_MIC_FIR_ECC_MULTI_1_RESET
  4826. CBE_MIC_FIR_ECC_MULTI_1_SET
  4827. CBE_MIC_FIR_ECC_RESET_MASK
  4828. CBE_MIC_FIR_ECC_SET_MASK
  4829. CBE_MIC_FIR_ECC_SINGLE_0_CTE
  4830. CBE_MIC_FIR_ECC_SINGLE_0_ERR
  4831. CBE_MIC_FIR_ECC_SINGLE_0_RESET
  4832. CBE_MIC_FIR_ECC_SINGLE_0_SET
  4833. CBE_MIC_FIR_ECC_SINGLE_1_CTE
  4834. CBE_MIC_FIR_ECC_SINGLE_1_ERR
  4835. CBE_MIC_FIR_ECC_SINGLE_1_RESET
  4836. CBE_MIC_FIR_ECC_SINGLE_1_SET
  4837. CBE_MIC_MNT_CFG_CHAN_0_POP
  4838. CBE_MIC_MNT_CFG_CHAN_1_POP
  4839. CBE_PMD_FIR_MODE_M8
  4840. CBE_PMD_PAUSE_ZERO_CONTROL
  4841. CBE_PM_16BIT_CTR
  4842. CBE_PM_COUNT_MODE_SET
  4843. CBE_PM_CTR_COUNT_CYCLES
  4844. CBE_PM_CTR_ENABLE
  4845. CBE_PM_CTR_INPUT_CONTROL
  4846. CBE_PM_CTR_INPUT_MUX
  4847. CBE_PM_CTR_OVERFLOW_INTR
  4848. CBE_PM_CTR_POLARITY
  4849. CBE_PM_ENABLE_EXT_TRACE
  4850. CBE_PM_ENABLE_PERF_MON
  4851. CBE_PM_FREEZE_ALL_CTRS
  4852. CBE_PM_SPU_ADDR_TRACE_SET
  4853. CBE_PM_STOP_AT_MAX
  4854. CBE_PM_TRACE_BUF_DATA_COUNT
  4855. CBE_PM_TRACE_BUF_EMPTY
  4856. CBE_PM_TRACE_BUF_FULL
  4857. CBE_PM_TRACE_BUF_MAX_COUNT
  4858. CBE_PM_TRACE_BUF_OVFLW
  4859. CBE_PM_TRACE_MODE_GET
  4860. CBE_PM_TRACE_MODE_SET
  4861. CBE_REGS_H
  4862. CBFN_BVD1
  4863. CBFN_BVD2
  4864. CBFN_EVENT
  4865. CBFN_FORCE
  4866. CBFN_GWAKE
  4867. CBFN_INTR
  4868. CBFN_MASK
  4869. CBFN_READY
  4870. CBFN_STATE
  4871. CBFN_WP
  4872. CBGAIN
  4873. CBGT
  4874. CBGetCE
  4875. CBGetLock
  4876. CBGetXStats
  4877. CBGetXStatsVersion
  4878. CBIO_IOSI
  4879. CBIO_MASK
  4880. CBISTCTL
  4881. CBIT
  4882. CBIT_INT
  4883. CBIT_INTM
  4884. CBI_GET_RELOAD
  4885. CBI_SET_INIT
  4886. CBI_SET_NO_SYNC
  4887. CBI_TAG_BOARD_VERSION
  4888. CBI_TAG_COUNT
  4889. CBI_TAG_DRAM_PART_NUM
  4890. CBI_TAG_MODEL_ID
  4891. CBI_TAG_OEM_ID
  4892. CBI_TAG_OEM_NAME
  4893. CBI_TAG_SKU_ID
  4894. CBInitCallBackState
  4895. CBInitCallBackState3
  4896. CBLT
  4897. CBMode
  4898. CBNDX
  4899. CBNDX_MASK
  4900. CBNDX_SHIFT
  4901. CBNOR
  4902. CBPRGPLL2
  4903. CBPRGTUNING
  4904. CBPerfClearFilterSel
  4905. CBPerfOpFilterSel
  4906. CBPerfSel
  4907. CBProbe
  4908. CBProbeUuid
  4909. CBR
  4910. CBR1_VLV
  4911. CBR4_VLV
  4912. CBRICG_FRAC_BITS
  4913. CBRICG_MAX
  4914. CBRSTATE_BUSY_INTERRUPT
  4915. CBRSTATE_BUSY_INTERRUPTED_MISS_UPM
  4916. CBRSTATE_BUSY_INTERRUPT_MISS_FMM
  4917. CBRSTATE_IDLE
  4918. CBRSTATE_INACTIVE
  4919. CBRSTATE_INTERRUPTED
  4920. CBRSTATE_INTERRUPTED_MISS_FMM
  4921. CBRSTATE_INTERRUPTED_MISS_UPM
  4922. CBRSTATE_PE_CHECK
  4923. CBRSTATE_QUEUED
  4924. CBRSTATE_REQUEST_ISSUE
  4925. CBRSTATE_WAIT_RESPONSE
  4926. CBR_BYTES
  4927. CBR_DPLLBMD_PIPE
  4928. CBR_EN
  4929. CBR_EXS_ABORT_OCC
  4930. CBR_EXS_ABORT_OCC_BIT
  4931. CBR_EXS_CB_INT_PENDING
  4932. CBR_EXS_CB_INT_PENDING_BIT
  4933. CBR_EXS_EXCEPTION
  4934. CBR_EXS_EXCEPTION_BIT
  4935. CBR_EXS_INT_OCC
  4936. CBR_EXS_INT_OCC_BIT
  4937. CBR_EXS_PENDING
  4938. CBR_EXS_PENDING_BIT
  4939. CBR_EXS_QUEUED
  4940. CBR_EXS_QUEUED_BIT
  4941. CBR_EXS_TLB_INVAL
  4942. CBR_EXS_TLB_INVAL_BIT
  4943. CBR_ICG_Reg
  4944. CBR_PASSNUM
  4945. CBR_PASSNUM2
  4946. CBR_PASSNUM_AST2150
  4947. CBR_PATNUM
  4948. CBR_PATNUM_AST2150
  4949. CBR_PND_DEADLINE_DISABLE
  4950. CBR_PTR_BASE
  4951. CBR_PTR_Reg
  4952. CBR_PWM_CLOCK_MUX_SELECT
  4953. CBR_RATE_TYPE
  4954. CBR_SCHED_TABLE
  4955. CBR_SCQSIZE
  4956. CBR_SCQ_NUM_ENTRIES
  4957. CBR_SIZE0
  4958. CBR_SIZE1
  4959. CBR_SIZE2
  4960. CBR_SIZE_AST2150
  4961. CBR_TAB_BEG
  4962. CBR_TAB_END
  4963. CBR_THRESHOLD
  4964. CBR_THRESHOLD2
  4965. CBR_THRESHOLD2_AST2150
  4966. CBR_THRESHOLD_AST2150
  4967. CBR_VC
  4968. CBSO
  4969. CBSSID
  4970. CBSSID_BCN
  4971. CBSSID_DATA
  4972. CBSS_AMO_NACKED
  4973. CBSS_IMPLICIT_ABORT_ACTIVE_MASK
  4974. CBSS_LB_OVERFLOWED
  4975. CBSS_MSG_QUEUE_MASK
  4976. CBSS_NO_ERROR
  4977. CBSS_PAGE_OVERFLOW
  4978. CBSS_PUT_NACKED
  4979. CBSS_QLIMIT_REACHED
  4980. CBSY
  4981. CBS_ACTIVE
  4982. CBS_CALL_OS
  4983. CBS_EXCEPTION
  4984. CBS_IDLE
  4985. CBTO_IRQ
  4986. CBTU_IRQ
  4987. CBTellMeAboutYourself
  4988. CBUF_LEN
  4989. CBUS_ADDR_BITS
  4990. CBUS_DEVCAP_OFFSET
  4991. CBUS_ERR_ADDR
  4992. CBUS_ERR_CMD
  4993. CBUS_ERR_DATA_H
  4994. CBUS_ERR_DATA_L
  4995. CBUS_INTR1_ENABLE_REG
  4996. CBUS_INTR2_ENABLE_REG
  4997. CBUS_INT_STATUS_1_REG
  4998. CBUS_INT_STATUS_2_REG
  4999. CBUS_LINK_CONTROL_2_REG
  5000. CBUS_LKOUT_INT
  5001. CBUS_LKOUT_MASK
  5002. CBUS_MHL_STATUS_REG_0
  5003. CBUS_MHL_STATUS_REG_1
  5004. CBUS_MSC_REQ_ABORT_REASON_REG
  5005. CBUS_REG_BITS
  5006. CBUS_UART_FLAGS
  5007. CBU_INPUT_CTRL_EN
  5008. CBU_NUM_INPUT_IDS
  5009. CBU_NUM_OUTPUT_IDS
  5010. CBVMID
  5011. CBVMID_MASK
  5012. CBVMID_SHIFT
  5013. CB_16BITCARD
  5014. CB_3VCARD
  5015. CB_3VSOCKET
  5016. CB_5VCARD
  5017. CB_5VSOCKET
  5018. CB_ADD_HI
  5019. CB_ADD_LO
  5020. CB_AL2230_INIT_SEQ
  5021. CB_AL7230_INIT_SEQ
  5022. CB_ARG_CNT
  5023. CB_ARRAY_MODE
  5024. CB_BADVCCREQ
  5025. CB_BANK_HEIGHT
  5026. CB_BANK_WIDTH
  5027. CB_BEACON_BUF_SIZE
  5028. CB_BITS
  5029. CB_BLEND0_CONTROL__ALPHA_COMB_FCN_MASK
  5030. CB_BLEND0_CONTROL__ALPHA_COMB_FCN__SHIFT
  5031. CB_BLEND0_CONTROL__ALPHA_DESTBLEND_MASK
  5032. CB_BLEND0_CONTROL__ALPHA_DESTBLEND__SHIFT
  5033. CB_BLEND0_CONTROL__ALPHA_SRCBLEND_MASK
  5034. CB_BLEND0_CONTROL__ALPHA_SRCBLEND__SHIFT
  5035. CB_BLEND0_CONTROL__COLOR_COMB_FCN_MASK
  5036. CB_BLEND0_CONTROL__COLOR_COMB_FCN__SHIFT
  5037. CB_BLEND0_CONTROL__COLOR_DESTBLEND_MASK
  5038. CB_BLEND0_CONTROL__COLOR_DESTBLEND__SHIFT
  5039. CB_BLEND0_CONTROL__COLOR_SRCBLEND_MASK
  5040. CB_BLEND0_CONTROL__COLOR_SRCBLEND__SHIFT
  5041. CB_BLEND0_CONTROL__DISABLE_ROP3_MASK
  5042. CB_BLEND0_CONTROL__DISABLE_ROP3__SHIFT
  5043. CB_BLEND0_CONTROL__ENABLE_MASK
  5044. CB_BLEND0_CONTROL__ENABLE__SHIFT
  5045. CB_BLEND0_CONTROL__SEPARATE_ALPHA_BLEND_MASK
  5046. CB_BLEND0_CONTROL__SEPARATE_ALPHA_BLEND__SHIFT
  5047. CB_BLEND1_CONTROL__ALPHA_COMB_FCN_MASK
  5048. CB_BLEND1_CONTROL__ALPHA_COMB_FCN__SHIFT
  5049. CB_BLEND1_CONTROL__ALPHA_DESTBLEND_MASK
  5050. CB_BLEND1_CONTROL__ALPHA_DESTBLEND__SHIFT
  5051. CB_BLEND1_CONTROL__ALPHA_SRCBLEND_MASK
  5052. CB_BLEND1_CONTROL__ALPHA_SRCBLEND__SHIFT
  5053. CB_BLEND1_CONTROL__COLOR_COMB_FCN_MASK
  5054. CB_BLEND1_CONTROL__COLOR_COMB_FCN__SHIFT
  5055. CB_BLEND1_CONTROL__COLOR_DESTBLEND_MASK
  5056. CB_BLEND1_CONTROL__COLOR_DESTBLEND__SHIFT
  5057. CB_BLEND1_CONTROL__COLOR_SRCBLEND_MASK
  5058. CB_BLEND1_CONTROL__COLOR_SRCBLEND__SHIFT
  5059. CB_BLEND1_CONTROL__DISABLE_ROP3_MASK
  5060. CB_BLEND1_CONTROL__DISABLE_ROP3__SHIFT
  5061. CB_BLEND1_CONTROL__ENABLE_MASK
  5062. CB_BLEND1_CONTROL__ENABLE__SHIFT
  5063. CB_BLEND1_CONTROL__SEPARATE_ALPHA_BLEND_MASK
  5064. CB_BLEND1_CONTROL__SEPARATE_ALPHA_BLEND__SHIFT
  5065. CB_BLEND2_CONTROL__ALPHA_COMB_FCN_MASK
  5066. CB_BLEND2_CONTROL__ALPHA_COMB_FCN__SHIFT
  5067. CB_BLEND2_CONTROL__ALPHA_DESTBLEND_MASK
  5068. CB_BLEND2_CONTROL__ALPHA_DESTBLEND__SHIFT
  5069. CB_BLEND2_CONTROL__ALPHA_SRCBLEND_MASK
  5070. CB_BLEND2_CONTROL__ALPHA_SRCBLEND__SHIFT
  5071. CB_BLEND2_CONTROL__COLOR_COMB_FCN_MASK
  5072. CB_BLEND2_CONTROL__COLOR_COMB_FCN__SHIFT
  5073. CB_BLEND2_CONTROL__COLOR_DESTBLEND_MASK
  5074. CB_BLEND2_CONTROL__COLOR_DESTBLEND__SHIFT
  5075. CB_BLEND2_CONTROL__COLOR_SRCBLEND_MASK
  5076. CB_BLEND2_CONTROL__COLOR_SRCBLEND__SHIFT
  5077. CB_BLEND2_CONTROL__DISABLE_ROP3_MASK
  5078. CB_BLEND2_CONTROL__DISABLE_ROP3__SHIFT
  5079. CB_BLEND2_CONTROL__ENABLE_MASK
  5080. CB_BLEND2_CONTROL__ENABLE__SHIFT
  5081. CB_BLEND2_CONTROL__SEPARATE_ALPHA_BLEND_MASK
  5082. CB_BLEND2_CONTROL__SEPARATE_ALPHA_BLEND__SHIFT
  5083. CB_BLEND3_CONTROL__ALPHA_COMB_FCN_MASK
  5084. CB_BLEND3_CONTROL__ALPHA_COMB_FCN__SHIFT
  5085. CB_BLEND3_CONTROL__ALPHA_DESTBLEND_MASK
  5086. CB_BLEND3_CONTROL__ALPHA_DESTBLEND__SHIFT
  5087. CB_BLEND3_CONTROL__ALPHA_SRCBLEND_MASK
  5088. CB_BLEND3_CONTROL__ALPHA_SRCBLEND__SHIFT
  5089. CB_BLEND3_CONTROL__COLOR_COMB_FCN_MASK
  5090. CB_BLEND3_CONTROL__COLOR_COMB_FCN__SHIFT
  5091. CB_BLEND3_CONTROL__COLOR_DESTBLEND_MASK
  5092. CB_BLEND3_CONTROL__COLOR_DESTBLEND__SHIFT
  5093. CB_BLEND3_CONTROL__COLOR_SRCBLEND_MASK
  5094. CB_BLEND3_CONTROL__COLOR_SRCBLEND__SHIFT
  5095. CB_BLEND3_CONTROL__DISABLE_ROP3_MASK
  5096. CB_BLEND3_CONTROL__DISABLE_ROP3__SHIFT
  5097. CB_BLEND3_CONTROL__ENABLE_MASK
  5098. CB_BLEND3_CONTROL__ENABLE__SHIFT
  5099. CB_BLEND3_CONTROL__SEPARATE_ALPHA_BLEND_MASK
  5100. CB_BLEND3_CONTROL__SEPARATE_ALPHA_BLEND__SHIFT
  5101. CB_BLEND4_CONTROL__ALPHA_COMB_FCN_MASK
  5102. CB_BLEND4_CONTROL__ALPHA_COMB_FCN__SHIFT
  5103. CB_BLEND4_CONTROL__ALPHA_DESTBLEND_MASK
  5104. CB_BLEND4_CONTROL__ALPHA_DESTBLEND__SHIFT
  5105. CB_BLEND4_CONTROL__ALPHA_SRCBLEND_MASK
  5106. CB_BLEND4_CONTROL__ALPHA_SRCBLEND__SHIFT
  5107. CB_BLEND4_CONTROL__COLOR_COMB_FCN_MASK
  5108. CB_BLEND4_CONTROL__COLOR_COMB_FCN__SHIFT
  5109. CB_BLEND4_CONTROL__COLOR_DESTBLEND_MASK
  5110. CB_BLEND4_CONTROL__COLOR_DESTBLEND__SHIFT
  5111. CB_BLEND4_CONTROL__COLOR_SRCBLEND_MASK
  5112. CB_BLEND4_CONTROL__COLOR_SRCBLEND__SHIFT
  5113. CB_BLEND4_CONTROL__DISABLE_ROP3_MASK
  5114. CB_BLEND4_CONTROL__DISABLE_ROP3__SHIFT
  5115. CB_BLEND4_CONTROL__ENABLE_MASK
  5116. CB_BLEND4_CONTROL__ENABLE__SHIFT
  5117. CB_BLEND4_CONTROL__SEPARATE_ALPHA_BLEND_MASK
  5118. CB_BLEND4_CONTROL__SEPARATE_ALPHA_BLEND__SHIFT
  5119. CB_BLEND5_CONTROL__ALPHA_COMB_FCN_MASK
  5120. CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT
  5121. CB_BLEND5_CONTROL__ALPHA_DESTBLEND_MASK
  5122. CB_BLEND5_CONTROL__ALPHA_DESTBLEND__SHIFT
  5123. CB_BLEND5_CONTROL__ALPHA_SRCBLEND_MASK
  5124. CB_BLEND5_CONTROL__ALPHA_SRCBLEND__SHIFT
  5125. CB_BLEND5_CONTROL__COLOR_COMB_FCN_MASK
  5126. CB_BLEND5_CONTROL__COLOR_COMB_FCN__SHIFT
  5127. CB_BLEND5_CONTROL__COLOR_DESTBLEND_MASK
  5128. CB_BLEND5_CONTROL__COLOR_DESTBLEND__SHIFT
  5129. CB_BLEND5_CONTROL__COLOR_SRCBLEND_MASK
  5130. CB_BLEND5_CONTROL__COLOR_SRCBLEND__SHIFT
  5131. CB_BLEND5_CONTROL__DISABLE_ROP3_MASK
  5132. CB_BLEND5_CONTROL__DISABLE_ROP3__SHIFT
  5133. CB_BLEND5_CONTROL__ENABLE_MASK
  5134. CB_BLEND5_CONTROL__ENABLE__SHIFT
  5135. CB_BLEND5_CONTROL__SEPARATE_ALPHA_BLEND_MASK
  5136. CB_BLEND5_CONTROL__SEPARATE_ALPHA_BLEND__SHIFT
  5137. CB_BLEND6_CONTROL__ALPHA_COMB_FCN_MASK
  5138. CB_BLEND6_CONTROL__ALPHA_COMB_FCN__SHIFT
  5139. CB_BLEND6_CONTROL__ALPHA_DESTBLEND_MASK
  5140. CB_BLEND6_CONTROL__ALPHA_DESTBLEND__SHIFT
  5141. CB_BLEND6_CONTROL__ALPHA_SRCBLEND_MASK
  5142. CB_BLEND6_CONTROL__ALPHA_SRCBLEND__SHIFT
  5143. CB_BLEND6_CONTROL__COLOR_COMB_FCN_MASK
  5144. CB_BLEND6_CONTROL__COLOR_COMB_FCN__SHIFT
  5145. CB_BLEND6_CONTROL__COLOR_DESTBLEND_MASK
  5146. CB_BLEND6_CONTROL__COLOR_DESTBLEND__SHIFT
  5147. CB_BLEND6_CONTROL__COLOR_SRCBLEND_MASK
  5148. CB_BLEND6_CONTROL__COLOR_SRCBLEND__SHIFT
  5149. CB_BLEND6_CONTROL__DISABLE_ROP3_MASK
  5150. CB_BLEND6_CONTROL__DISABLE_ROP3__SHIFT
  5151. CB_BLEND6_CONTROL__ENABLE_MASK
  5152. CB_BLEND6_CONTROL__ENABLE__SHIFT
  5153. CB_BLEND6_CONTROL__SEPARATE_ALPHA_BLEND_MASK
  5154. CB_BLEND6_CONTROL__SEPARATE_ALPHA_BLEND__SHIFT
  5155. CB_BLEND7_CONTROL__ALPHA_COMB_FCN_MASK
  5156. CB_BLEND7_CONTROL__ALPHA_COMB_FCN__SHIFT
  5157. CB_BLEND7_CONTROL__ALPHA_DESTBLEND_MASK
  5158. CB_BLEND7_CONTROL__ALPHA_DESTBLEND__SHIFT
  5159. CB_BLEND7_CONTROL__ALPHA_SRCBLEND_MASK
  5160. CB_BLEND7_CONTROL__ALPHA_SRCBLEND__SHIFT
  5161. CB_BLEND7_CONTROL__COLOR_COMB_FCN_MASK
  5162. CB_BLEND7_CONTROL__COLOR_COMB_FCN__SHIFT
  5163. CB_BLEND7_CONTROL__COLOR_DESTBLEND_MASK
  5164. CB_BLEND7_CONTROL__COLOR_DESTBLEND__SHIFT
  5165. CB_BLEND7_CONTROL__COLOR_SRCBLEND_MASK
  5166. CB_BLEND7_CONTROL__COLOR_SRCBLEND__SHIFT
  5167. CB_BLEND7_CONTROL__DISABLE_ROP3_MASK
  5168. CB_BLEND7_CONTROL__DISABLE_ROP3__SHIFT
  5169. CB_BLEND7_CONTROL__ENABLE_MASK
  5170. CB_BLEND7_CONTROL__ENABLE__SHIFT
  5171. CB_BLEND7_CONTROL__SEPARATE_ALPHA_BLEND_MASK
  5172. CB_BLEND7_CONTROL__SEPARATE_ALPHA_BLEND__SHIFT
  5173. CB_BLEND_ALPHA__BLEND_ALPHA_MASK
  5174. CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT
  5175. CB_BLEND_BLUE__BLEND_BLUE_MASK
  5176. CB_BLEND_BLUE__BLEND_BLUE__SHIFT
  5177. CB_BLEND_GREEN__BLEND_GREEN_MASK
  5178. CB_BLEND_GREEN__BLEND_GREEN__SHIFT
  5179. CB_BLEND_RED__BLEND_RED_MASK
  5180. CB_BLEND_RED__BLEND_RED__SHIFT
  5181. CB_BRIDGE_BASE
  5182. CB_BRIDGE_CONTROL
  5183. CB_BRIDGE_CPERREN
  5184. CB_BRIDGE_CRST
  5185. CB_BRIDGE_CSERREN
  5186. CB_BRIDGE_INTR
  5187. CB_BRIDGE_ISAEN
  5188. CB_BRIDGE_LIMIT
  5189. CB_BRIDGE_MABTMODE
  5190. CB_BRIDGE_POSTEN
  5191. CB_BRIDGE_PREFETCH0
  5192. CB_BRIDGE_PREFETCH1
  5193. CB_BRIDGE_VGAEN
  5194. CB_BUSY
  5195. CB_B_DATA_ON_ALPHA_PORT
  5196. CB_B_DATA_ON_CB_B_PORT
  5197. CB_B_DATA_ON_CR_R_PORT
  5198. CB_B_DATA_ON_Y_G_PORT
  5199. CB_CACHE_EVICT_POINTS__CC_CACHE_EVICT_POINT_MASK
  5200. CB_CACHE_EVICT_POINTS__CC_CACHE_EVICT_POINT__SHIFT
  5201. CB_CACHE_EVICT_POINTS__CM_CACHE_EVICT_POINT_MASK
  5202. CB_CACHE_EVICT_POINTS__CM_CACHE_EVICT_POINT__SHIFT
  5203. CB_CACHE_EVICT_POINTS__DCC_CACHE_EVICT_POINT_MASK
  5204. CB_CACHE_EVICT_POINTS__DCC_CACHE_EVICT_POINT__SHIFT
  5205. CB_CACHE_EVICT_POINTS__FC_CACHE_EVICT_POINT_MASK
  5206. CB_CACHE_EVICT_POINTS__FC_CACHE_EVICT_POINT__SHIFT
  5207. CB_CARDSTS
  5208. CB_CARD_DT
  5209. CB_CBCARD
  5210. CB_CD1EVENT
  5211. CB_CD2EVENT
  5212. CB_CDETECT1
  5213. CB_CDETECT2
  5214. CB_CDMASK
  5215. CB_CGTT_SCLK_CTRL
  5216. CB_CGTT_SCLK_CTRL__OFF_HYSTERESIS_MASK
  5217. CB_CGTT_SCLK_CTRL__OFF_HYSTERESIS__SHIFT
  5218. CB_CGTT_SCLK_CTRL__ON_DELAY_MASK
  5219. CB_CGTT_SCLK_CTRL__ON_DELAY__SHIFT
  5220. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE0_MASK
  5221. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE0__SHIFT
  5222. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE1_MASK
  5223. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE1__SHIFT
  5224. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE2_MASK
  5225. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE2__SHIFT
  5226. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE3_MASK
  5227. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE3__SHIFT
  5228. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE4_MASK
  5229. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE4__SHIFT
  5230. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE5_MASK
  5231. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE5__SHIFT
  5232. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE6_MASK
  5233. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE6__SHIFT
  5234. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE7_MASK
  5235. CB_CGTT_SCLK_CTRL__SOFT_OVERRIDE7__SHIFT
  5236. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  5237. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  5238. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  5239. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  5240. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  5241. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  5242. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  5243. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  5244. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  5245. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  5246. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  5247. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  5248. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  5249. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  5250. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  5251. CB_CGTT_SCLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  5252. CB_CLEAN
  5253. CB_CLKCTRL
  5254. CB_CLKCTRLEN
  5255. CB_COLOR0_ATTRIB
  5256. CB_COLOR0_ATTRIB2__MAX_MIP_MASK
  5257. CB_COLOR0_ATTRIB2__MAX_MIP__SHIFT
  5258. CB_COLOR0_ATTRIB2__MIP0_HEIGHT_MASK
  5259. CB_COLOR0_ATTRIB2__MIP0_HEIGHT__SHIFT
  5260. CB_COLOR0_ATTRIB2__MIP0_WIDTH_MASK
  5261. CB_COLOR0_ATTRIB2__MIP0_WIDTH__SHIFT
  5262. CB_COLOR0_ATTRIB3__CMASK_PIPE_ALIGNED_MASK
  5263. CB_COLOR0_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT
  5264. CB_COLOR0_ATTRIB3__COLOR_SW_MODE_MASK
  5265. CB_COLOR0_ATTRIB3__COLOR_SW_MODE__SHIFT
  5266. CB_COLOR0_ATTRIB3__DCC_PIPE_ALIGNED_MASK
  5267. CB_COLOR0_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT
  5268. CB_COLOR0_ATTRIB3__FMASK_SW_MODE_MASK
  5269. CB_COLOR0_ATTRIB3__FMASK_SW_MODE__SHIFT
  5270. CB_COLOR0_ATTRIB3__META_LINEAR_MASK
  5271. CB_COLOR0_ATTRIB3__META_LINEAR__SHIFT
  5272. CB_COLOR0_ATTRIB3__MIP0_DEPTH_MASK
  5273. CB_COLOR0_ATTRIB3__MIP0_DEPTH__SHIFT
  5274. CB_COLOR0_ATTRIB3__RESOURCE_LEVEL_MASK
  5275. CB_COLOR0_ATTRIB3__RESOURCE_LEVEL__SHIFT
  5276. CB_COLOR0_ATTRIB3__RESOURCE_TYPE_MASK
  5277. CB_COLOR0_ATTRIB3__RESOURCE_TYPE__SHIFT
  5278. CB_COLOR0_ATTRIB__COLOR_SW_MODE_MASK
  5279. CB_COLOR0_ATTRIB__COLOR_SW_MODE__SHIFT
  5280. CB_COLOR0_ATTRIB__DISABLE_FMASK_NOFETCH_OPT_MASK
  5281. CB_COLOR0_ATTRIB__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  5282. CB_COLOR0_ATTRIB__FMASK_BANK_HEIGHT_MASK
  5283. CB_COLOR0_ATTRIB__FMASK_BANK_HEIGHT__SHIFT
  5284. CB_COLOR0_ATTRIB__FMASK_SW_MODE_MASK
  5285. CB_COLOR0_ATTRIB__FMASK_SW_MODE__SHIFT
  5286. CB_COLOR0_ATTRIB__FMASK_TILE_MODE_INDEX_MASK
  5287. CB_COLOR0_ATTRIB__FMASK_TILE_MODE_INDEX__SHIFT
  5288. CB_COLOR0_ATTRIB__FORCE_DST_ALPHA_1_MASK
  5289. CB_COLOR0_ATTRIB__FORCE_DST_ALPHA_1__SHIFT
  5290. CB_COLOR0_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX_MASK
  5291. CB_COLOR0_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX__SHIFT
  5292. CB_COLOR0_ATTRIB__META_LINEAR_MASK
  5293. CB_COLOR0_ATTRIB__META_LINEAR__SHIFT
  5294. CB_COLOR0_ATTRIB__MIP0_DEPTH_MASK
  5295. CB_COLOR0_ATTRIB__MIP0_DEPTH__SHIFT
  5296. CB_COLOR0_ATTRIB__NUM_FRAGMENTS_MASK
  5297. CB_COLOR0_ATTRIB__NUM_FRAGMENTS__SHIFT
  5298. CB_COLOR0_ATTRIB__NUM_SAMPLES_MASK
  5299. CB_COLOR0_ATTRIB__NUM_SAMPLES__SHIFT
  5300. CB_COLOR0_ATTRIB__PIPE_ALIGNED_MASK
  5301. CB_COLOR0_ATTRIB__PIPE_ALIGNED__SHIFT
  5302. CB_COLOR0_ATTRIB__RB_ALIGNED_MASK
  5303. CB_COLOR0_ATTRIB__RB_ALIGNED__SHIFT
  5304. CB_COLOR0_ATTRIB__RESOURCE_TYPE_MASK
  5305. CB_COLOR0_ATTRIB__RESOURCE_TYPE__SHIFT
  5306. CB_COLOR0_ATTRIB__TILE_MODE_INDEX_MASK
  5307. CB_COLOR0_ATTRIB__TILE_MODE_INDEX__SHIFT
  5308. CB_COLOR0_BASE
  5309. CB_COLOR0_BASE_EXT__BASE_256B_MASK
  5310. CB_COLOR0_BASE_EXT__BASE_256B__SHIFT
  5311. CB_COLOR0_BASE__BASE_256B_MASK
  5312. CB_COLOR0_BASE__BASE_256B__SHIFT
  5313. CB_COLOR0_CLEAR_WORD0
  5314. CB_COLOR0_CLEAR_WORD0__CLEAR_WORD0_MASK
  5315. CB_COLOR0_CLEAR_WORD0__CLEAR_WORD0__SHIFT
  5316. CB_COLOR0_CLEAR_WORD1
  5317. CB_COLOR0_CLEAR_WORD1__CLEAR_WORD1_MASK
  5318. CB_COLOR0_CLEAR_WORD1__CLEAR_WORD1__SHIFT
  5319. CB_COLOR0_CLEAR_WORD2
  5320. CB_COLOR0_CLEAR_WORD3
  5321. CB_COLOR0_CMASK
  5322. CB_COLOR0_CMASK_BASE_EXT__BASE_256B_MASK
  5323. CB_COLOR0_CMASK_BASE_EXT__BASE_256B__SHIFT
  5324. CB_COLOR0_CMASK_SLICE
  5325. CB_COLOR0_CMASK_SLICE__TILE_MAX_MASK
  5326. CB_COLOR0_CMASK_SLICE__TILE_MAX__SHIFT
  5327. CB_COLOR0_CMASK__BASE_256B_MASK
  5328. CB_COLOR0_CMASK__BASE_256B__SHIFT
  5329. CB_COLOR0_DCC_BASE_EXT__BASE_256B_MASK
  5330. CB_COLOR0_DCC_BASE_EXT__BASE_256B__SHIFT
  5331. CB_COLOR0_DCC_BASE__BASE_256B_MASK
  5332. CB_COLOR0_DCC_BASE__BASE_256B__SHIFT
  5333. CB_COLOR0_DCC_CONTROL__COLOR_TRANSFORM_MASK
  5334. CB_COLOR0_DCC_CONTROL__COLOR_TRANSFORM__SHIFT
  5335. CB_COLOR0_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  5336. CB_COLOR0_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  5337. CB_COLOR0_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE_MASK
  5338. CB_COLOR0_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE__SHIFT
  5339. CB_COLOR0_DCC_CONTROL__INDEPENDENT_128B_BLOCKS_MASK
  5340. CB_COLOR0_DCC_CONTROL__INDEPENDENT_128B_BLOCKS__SHIFT
  5341. CB_COLOR0_DCC_CONTROL__INDEPENDENT_64B_BLOCKS_MASK
  5342. CB_COLOR0_DCC_CONTROL__INDEPENDENT_64B_BLOCKS__SHIFT
  5343. CB_COLOR0_DCC_CONTROL__KEY_CLEAR_ENABLE_MASK
  5344. CB_COLOR0_DCC_CONTROL__KEY_CLEAR_ENABLE__SHIFT
  5345. CB_COLOR0_DCC_CONTROL__LOSSY_ALPHA_PRECISION_MASK
  5346. CB_COLOR0_DCC_CONTROL__LOSSY_ALPHA_PRECISION__SHIFT
  5347. CB_COLOR0_DCC_CONTROL__LOSSY_RGB_PRECISION_MASK
  5348. CB_COLOR0_DCC_CONTROL__LOSSY_RGB_PRECISION__SHIFT
  5349. CB_COLOR0_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE_MASK
  5350. CB_COLOR0_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE__SHIFT
  5351. CB_COLOR0_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE_MASK
  5352. CB_COLOR0_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE__SHIFT
  5353. CB_COLOR0_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE_MASK
  5354. CB_COLOR0_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE__SHIFT
  5355. CB_COLOR0_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  5356. CB_COLOR0_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  5357. CB_COLOR0_DIM
  5358. CB_COLOR0_FMASK
  5359. CB_COLOR0_FMASK_BASE_EXT__BASE_256B_MASK
  5360. CB_COLOR0_FMASK_BASE_EXT__BASE_256B__SHIFT
  5361. CB_COLOR0_FMASK_SLICE
  5362. CB_COLOR0_FMASK_SLICE__TILE_MAX_MASK
  5363. CB_COLOR0_FMASK_SLICE__TILE_MAX__SHIFT
  5364. CB_COLOR0_FMASK__BASE_256B_MASK
  5365. CB_COLOR0_FMASK__BASE_256B__SHIFT
  5366. CB_COLOR0_FRAG
  5367. CB_COLOR0_INFO
  5368. CB_COLOR0_INFO__ALT_TILE_MODE_MASK
  5369. CB_COLOR0_INFO__ALT_TILE_MODE__SHIFT
  5370. CB_COLOR0_INFO__BLEND_BYPASS_MASK
  5371. CB_COLOR0_INFO__BLEND_BYPASS__SHIFT
  5372. CB_COLOR0_INFO__BLEND_CLAMP_MASK
  5373. CB_COLOR0_INFO__BLEND_CLAMP__SHIFT
  5374. CB_COLOR0_INFO__BLEND_OPT_DISCARD_PIXEL_MASK
  5375. CB_COLOR0_INFO__BLEND_OPT_DISCARD_PIXEL__SHIFT
  5376. CB_COLOR0_INFO__BLEND_OPT_DONT_RD_DST_MASK
  5377. CB_COLOR0_INFO__BLEND_OPT_DONT_RD_DST__SHIFT
  5378. CB_COLOR0_INFO__CMASK_ADDR_TYPE_MASK
  5379. CB_COLOR0_INFO__CMASK_ADDR_TYPE__SHIFT
  5380. CB_COLOR0_INFO__CMASK_IS_LINEAR_MASK
  5381. CB_COLOR0_INFO__CMASK_IS_LINEAR__SHIFT
  5382. CB_COLOR0_INFO__COMPRESSION_MASK
  5383. CB_COLOR0_INFO__COMPRESSION__SHIFT
  5384. CB_COLOR0_INFO__COMP_SWAP_MASK
  5385. CB_COLOR0_INFO__COMP_SWAP__SHIFT
  5386. CB_COLOR0_INFO__DCC_ENABLE_MASK
  5387. CB_COLOR0_INFO__DCC_ENABLE__SHIFT
  5388. CB_COLOR0_INFO__ENDIAN_MASK
  5389. CB_COLOR0_INFO__ENDIAN__SHIFT
  5390. CB_COLOR0_INFO__FAST_CLEAR_MASK
  5391. CB_COLOR0_INFO__FAST_CLEAR__SHIFT
  5392. CB_COLOR0_INFO__FMASK_COMPRESSION_DISABLE_MASK
  5393. CB_COLOR0_INFO__FMASK_COMPRESSION_DISABLE__SHIFT
  5394. CB_COLOR0_INFO__FMASK_COMPRESS_1FRAG_ONLY_MASK
  5395. CB_COLOR0_INFO__FMASK_COMPRESS_1FRAG_ONLY__SHIFT
  5396. CB_COLOR0_INFO__FORMAT_MASK
  5397. CB_COLOR0_INFO__FORMAT__SHIFT
  5398. CB_COLOR0_INFO__LINEAR_GENERAL_MASK
  5399. CB_COLOR0_INFO__LINEAR_GENERAL__SHIFT
  5400. CB_COLOR0_INFO__NUMBER_TYPE_MASK
  5401. CB_COLOR0_INFO__NUMBER_TYPE__SHIFT
  5402. CB_COLOR0_INFO__ROUND_MODE_MASK
  5403. CB_COLOR0_INFO__ROUND_MODE__SHIFT
  5404. CB_COLOR0_INFO__SIMPLE_FLOAT_MASK
  5405. CB_COLOR0_INFO__SIMPLE_FLOAT__SHIFT
  5406. CB_COLOR0_MASK
  5407. CB_COLOR0_PITCH
  5408. CB_COLOR0_PITCH__FMASK_TILE_MAX_MASK
  5409. CB_COLOR0_PITCH__FMASK_TILE_MAX__SHIFT
  5410. CB_COLOR0_PITCH__TILE_MAX_MASK
  5411. CB_COLOR0_PITCH__TILE_MAX__SHIFT
  5412. CB_COLOR0_SIZE
  5413. CB_COLOR0_SLICE
  5414. CB_COLOR0_SLICE__TILE_MAX_MASK
  5415. CB_COLOR0_SLICE__TILE_MAX__SHIFT
  5416. CB_COLOR0_TILE
  5417. CB_COLOR0_VIEW
  5418. CB_COLOR0_VIEW__MIP_LEVEL_MASK
  5419. CB_COLOR0_VIEW__MIP_LEVEL__SHIFT
  5420. CB_COLOR0_VIEW__SLICE_MAX_MASK
  5421. CB_COLOR0_VIEW__SLICE_MAX__SHIFT
  5422. CB_COLOR0_VIEW__SLICE_START_MASK
  5423. CB_COLOR0_VIEW__SLICE_START__SHIFT
  5424. CB_COLOR10_ATTRIB
  5425. CB_COLOR10_BASE
  5426. CB_COLOR10_DIM
  5427. CB_COLOR10_INFO
  5428. CB_COLOR10_PITCH
  5429. CB_COLOR10_SLICE
  5430. CB_COLOR10_VIEW
  5431. CB_COLOR11_ATTRIB
  5432. CB_COLOR11_BASE
  5433. CB_COLOR11_DIM
  5434. CB_COLOR11_INFO
  5435. CB_COLOR11_PITCH
  5436. CB_COLOR11_SLICE
  5437. CB_COLOR11_VIEW
  5438. CB_COLOR1_ATTRIB
  5439. CB_COLOR1_ATTRIB2__MAX_MIP_MASK
  5440. CB_COLOR1_ATTRIB2__MAX_MIP__SHIFT
  5441. CB_COLOR1_ATTRIB2__MIP0_HEIGHT_MASK
  5442. CB_COLOR1_ATTRIB2__MIP0_HEIGHT__SHIFT
  5443. CB_COLOR1_ATTRIB2__MIP0_WIDTH_MASK
  5444. CB_COLOR1_ATTRIB2__MIP0_WIDTH__SHIFT
  5445. CB_COLOR1_ATTRIB3__CMASK_PIPE_ALIGNED_MASK
  5446. CB_COLOR1_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT
  5447. CB_COLOR1_ATTRIB3__COLOR_SW_MODE_MASK
  5448. CB_COLOR1_ATTRIB3__COLOR_SW_MODE__SHIFT
  5449. CB_COLOR1_ATTRIB3__DCC_PIPE_ALIGNED_MASK
  5450. CB_COLOR1_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT
  5451. CB_COLOR1_ATTRIB3__FMASK_SW_MODE_MASK
  5452. CB_COLOR1_ATTRIB3__FMASK_SW_MODE__SHIFT
  5453. CB_COLOR1_ATTRIB3__META_LINEAR_MASK
  5454. CB_COLOR1_ATTRIB3__META_LINEAR__SHIFT
  5455. CB_COLOR1_ATTRIB3__MIP0_DEPTH_MASK
  5456. CB_COLOR1_ATTRIB3__MIP0_DEPTH__SHIFT
  5457. CB_COLOR1_ATTRIB3__RESOURCE_LEVEL_MASK
  5458. CB_COLOR1_ATTRIB3__RESOURCE_LEVEL__SHIFT
  5459. CB_COLOR1_ATTRIB3__RESOURCE_TYPE_MASK
  5460. CB_COLOR1_ATTRIB3__RESOURCE_TYPE__SHIFT
  5461. CB_COLOR1_ATTRIB__COLOR_SW_MODE_MASK
  5462. CB_COLOR1_ATTRIB__COLOR_SW_MODE__SHIFT
  5463. CB_COLOR1_ATTRIB__DISABLE_FMASK_NOFETCH_OPT_MASK
  5464. CB_COLOR1_ATTRIB__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  5465. CB_COLOR1_ATTRIB__FMASK_BANK_HEIGHT_MASK
  5466. CB_COLOR1_ATTRIB__FMASK_BANK_HEIGHT__SHIFT
  5467. CB_COLOR1_ATTRIB__FMASK_SW_MODE_MASK
  5468. CB_COLOR1_ATTRIB__FMASK_SW_MODE__SHIFT
  5469. CB_COLOR1_ATTRIB__FMASK_TILE_MODE_INDEX_MASK
  5470. CB_COLOR1_ATTRIB__FMASK_TILE_MODE_INDEX__SHIFT
  5471. CB_COLOR1_ATTRIB__FORCE_DST_ALPHA_1_MASK
  5472. CB_COLOR1_ATTRIB__FORCE_DST_ALPHA_1__SHIFT
  5473. CB_COLOR1_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX_MASK
  5474. CB_COLOR1_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX__SHIFT
  5475. CB_COLOR1_ATTRIB__META_LINEAR_MASK
  5476. CB_COLOR1_ATTRIB__META_LINEAR__SHIFT
  5477. CB_COLOR1_ATTRIB__MIP0_DEPTH_MASK
  5478. CB_COLOR1_ATTRIB__MIP0_DEPTH__SHIFT
  5479. CB_COLOR1_ATTRIB__NUM_FRAGMENTS_MASK
  5480. CB_COLOR1_ATTRIB__NUM_FRAGMENTS__SHIFT
  5481. CB_COLOR1_ATTRIB__NUM_SAMPLES_MASK
  5482. CB_COLOR1_ATTRIB__NUM_SAMPLES__SHIFT
  5483. CB_COLOR1_ATTRIB__PIPE_ALIGNED_MASK
  5484. CB_COLOR1_ATTRIB__PIPE_ALIGNED__SHIFT
  5485. CB_COLOR1_ATTRIB__RB_ALIGNED_MASK
  5486. CB_COLOR1_ATTRIB__RB_ALIGNED__SHIFT
  5487. CB_COLOR1_ATTRIB__RESOURCE_TYPE_MASK
  5488. CB_COLOR1_ATTRIB__RESOURCE_TYPE__SHIFT
  5489. CB_COLOR1_ATTRIB__TILE_MODE_INDEX_MASK
  5490. CB_COLOR1_ATTRIB__TILE_MODE_INDEX__SHIFT
  5491. CB_COLOR1_BASE
  5492. CB_COLOR1_BASE_EXT__BASE_256B_MASK
  5493. CB_COLOR1_BASE_EXT__BASE_256B__SHIFT
  5494. CB_COLOR1_BASE__BASE_256B_MASK
  5495. CB_COLOR1_BASE__BASE_256B__SHIFT
  5496. CB_COLOR1_CLEAR_WORD0
  5497. CB_COLOR1_CLEAR_WORD0__CLEAR_WORD0_MASK
  5498. CB_COLOR1_CLEAR_WORD0__CLEAR_WORD0__SHIFT
  5499. CB_COLOR1_CLEAR_WORD1
  5500. CB_COLOR1_CLEAR_WORD1__CLEAR_WORD1_MASK
  5501. CB_COLOR1_CLEAR_WORD1__CLEAR_WORD1__SHIFT
  5502. CB_COLOR1_CLEAR_WORD2
  5503. CB_COLOR1_CLEAR_WORD3
  5504. CB_COLOR1_CMASK
  5505. CB_COLOR1_CMASK_BASE_EXT__BASE_256B_MASK
  5506. CB_COLOR1_CMASK_BASE_EXT__BASE_256B__SHIFT
  5507. CB_COLOR1_CMASK_SLICE
  5508. CB_COLOR1_CMASK_SLICE__TILE_MAX_MASK
  5509. CB_COLOR1_CMASK_SLICE__TILE_MAX__SHIFT
  5510. CB_COLOR1_CMASK__BASE_256B_MASK
  5511. CB_COLOR1_CMASK__BASE_256B__SHIFT
  5512. CB_COLOR1_DCC_BASE_EXT__BASE_256B_MASK
  5513. CB_COLOR1_DCC_BASE_EXT__BASE_256B__SHIFT
  5514. CB_COLOR1_DCC_BASE__BASE_256B_MASK
  5515. CB_COLOR1_DCC_BASE__BASE_256B__SHIFT
  5516. CB_COLOR1_DCC_CONTROL__COLOR_TRANSFORM_MASK
  5517. CB_COLOR1_DCC_CONTROL__COLOR_TRANSFORM__SHIFT
  5518. CB_COLOR1_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  5519. CB_COLOR1_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  5520. CB_COLOR1_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE_MASK
  5521. CB_COLOR1_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE__SHIFT
  5522. CB_COLOR1_DCC_CONTROL__INDEPENDENT_128B_BLOCKS_MASK
  5523. CB_COLOR1_DCC_CONTROL__INDEPENDENT_128B_BLOCKS__SHIFT
  5524. CB_COLOR1_DCC_CONTROL__INDEPENDENT_64B_BLOCKS_MASK
  5525. CB_COLOR1_DCC_CONTROL__INDEPENDENT_64B_BLOCKS__SHIFT
  5526. CB_COLOR1_DCC_CONTROL__KEY_CLEAR_ENABLE_MASK
  5527. CB_COLOR1_DCC_CONTROL__KEY_CLEAR_ENABLE__SHIFT
  5528. CB_COLOR1_DCC_CONTROL__LOSSY_ALPHA_PRECISION_MASK
  5529. CB_COLOR1_DCC_CONTROL__LOSSY_ALPHA_PRECISION__SHIFT
  5530. CB_COLOR1_DCC_CONTROL__LOSSY_RGB_PRECISION_MASK
  5531. CB_COLOR1_DCC_CONTROL__LOSSY_RGB_PRECISION__SHIFT
  5532. CB_COLOR1_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE_MASK
  5533. CB_COLOR1_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE__SHIFT
  5534. CB_COLOR1_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE_MASK
  5535. CB_COLOR1_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE__SHIFT
  5536. CB_COLOR1_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE_MASK
  5537. CB_COLOR1_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE__SHIFT
  5538. CB_COLOR1_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  5539. CB_COLOR1_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  5540. CB_COLOR1_DIM
  5541. CB_COLOR1_FMASK
  5542. CB_COLOR1_FMASK_BASE_EXT__BASE_256B_MASK
  5543. CB_COLOR1_FMASK_BASE_EXT__BASE_256B__SHIFT
  5544. CB_COLOR1_FMASK_SLICE
  5545. CB_COLOR1_FMASK_SLICE__TILE_MAX_MASK
  5546. CB_COLOR1_FMASK_SLICE__TILE_MAX__SHIFT
  5547. CB_COLOR1_FMASK__BASE_256B_MASK
  5548. CB_COLOR1_FMASK__BASE_256B__SHIFT
  5549. CB_COLOR1_INFO
  5550. CB_COLOR1_INFO__ALT_TILE_MODE_MASK
  5551. CB_COLOR1_INFO__ALT_TILE_MODE__SHIFT
  5552. CB_COLOR1_INFO__BLEND_BYPASS_MASK
  5553. CB_COLOR1_INFO__BLEND_BYPASS__SHIFT
  5554. CB_COLOR1_INFO__BLEND_CLAMP_MASK
  5555. CB_COLOR1_INFO__BLEND_CLAMP__SHIFT
  5556. CB_COLOR1_INFO__BLEND_OPT_DISCARD_PIXEL_MASK
  5557. CB_COLOR1_INFO__BLEND_OPT_DISCARD_PIXEL__SHIFT
  5558. CB_COLOR1_INFO__BLEND_OPT_DONT_RD_DST_MASK
  5559. CB_COLOR1_INFO__BLEND_OPT_DONT_RD_DST__SHIFT
  5560. CB_COLOR1_INFO__CMASK_ADDR_TYPE_MASK
  5561. CB_COLOR1_INFO__CMASK_ADDR_TYPE__SHIFT
  5562. CB_COLOR1_INFO__CMASK_IS_LINEAR_MASK
  5563. CB_COLOR1_INFO__CMASK_IS_LINEAR__SHIFT
  5564. CB_COLOR1_INFO__COMPRESSION_MASK
  5565. CB_COLOR1_INFO__COMPRESSION__SHIFT
  5566. CB_COLOR1_INFO__COMP_SWAP_MASK
  5567. CB_COLOR1_INFO__COMP_SWAP__SHIFT
  5568. CB_COLOR1_INFO__DCC_ENABLE_MASK
  5569. CB_COLOR1_INFO__DCC_ENABLE__SHIFT
  5570. CB_COLOR1_INFO__ENDIAN_MASK
  5571. CB_COLOR1_INFO__ENDIAN__SHIFT
  5572. CB_COLOR1_INFO__FAST_CLEAR_MASK
  5573. CB_COLOR1_INFO__FAST_CLEAR__SHIFT
  5574. CB_COLOR1_INFO__FMASK_COMPRESSION_DISABLE_MASK
  5575. CB_COLOR1_INFO__FMASK_COMPRESSION_DISABLE__SHIFT
  5576. CB_COLOR1_INFO__FMASK_COMPRESS_1FRAG_ONLY_MASK
  5577. CB_COLOR1_INFO__FMASK_COMPRESS_1FRAG_ONLY__SHIFT
  5578. CB_COLOR1_INFO__FORMAT_MASK
  5579. CB_COLOR1_INFO__FORMAT__SHIFT
  5580. CB_COLOR1_INFO__LINEAR_GENERAL_MASK
  5581. CB_COLOR1_INFO__LINEAR_GENERAL__SHIFT
  5582. CB_COLOR1_INFO__NUMBER_TYPE_MASK
  5583. CB_COLOR1_INFO__NUMBER_TYPE__SHIFT
  5584. CB_COLOR1_INFO__ROUND_MODE_MASK
  5585. CB_COLOR1_INFO__ROUND_MODE__SHIFT
  5586. CB_COLOR1_INFO__SIMPLE_FLOAT_MASK
  5587. CB_COLOR1_INFO__SIMPLE_FLOAT__SHIFT
  5588. CB_COLOR1_PITCH
  5589. CB_COLOR1_PITCH__FMASK_TILE_MAX_MASK
  5590. CB_COLOR1_PITCH__FMASK_TILE_MAX__SHIFT
  5591. CB_COLOR1_PITCH__TILE_MAX_MASK
  5592. CB_COLOR1_PITCH__TILE_MAX__SHIFT
  5593. CB_COLOR1_SLICE
  5594. CB_COLOR1_SLICE__TILE_MAX_MASK
  5595. CB_COLOR1_SLICE__TILE_MAX__SHIFT
  5596. CB_COLOR1_VIEW
  5597. CB_COLOR1_VIEW__MIP_LEVEL_MASK
  5598. CB_COLOR1_VIEW__MIP_LEVEL__SHIFT
  5599. CB_COLOR1_VIEW__SLICE_MAX_MASK
  5600. CB_COLOR1_VIEW__SLICE_MAX__SHIFT
  5601. CB_COLOR1_VIEW__SLICE_START_MASK
  5602. CB_COLOR1_VIEW__SLICE_START__SHIFT
  5603. CB_COLOR2_ATTRIB
  5604. CB_COLOR2_ATTRIB2__MAX_MIP_MASK
  5605. CB_COLOR2_ATTRIB2__MAX_MIP__SHIFT
  5606. CB_COLOR2_ATTRIB2__MIP0_HEIGHT_MASK
  5607. CB_COLOR2_ATTRIB2__MIP0_HEIGHT__SHIFT
  5608. CB_COLOR2_ATTRIB2__MIP0_WIDTH_MASK
  5609. CB_COLOR2_ATTRIB2__MIP0_WIDTH__SHIFT
  5610. CB_COLOR2_ATTRIB3__CMASK_PIPE_ALIGNED_MASK
  5611. CB_COLOR2_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT
  5612. CB_COLOR2_ATTRIB3__COLOR_SW_MODE_MASK
  5613. CB_COLOR2_ATTRIB3__COLOR_SW_MODE__SHIFT
  5614. CB_COLOR2_ATTRIB3__DCC_PIPE_ALIGNED_MASK
  5615. CB_COLOR2_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT
  5616. CB_COLOR2_ATTRIB3__FMASK_SW_MODE_MASK
  5617. CB_COLOR2_ATTRIB3__FMASK_SW_MODE__SHIFT
  5618. CB_COLOR2_ATTRIB3__META_LINEAR_MASK
  5619. CB_COLOR2_ATTRIB3__META_LINEAR__SHIFT
  5620. CB_COLOR2_ATTRIB3__MIP0_DEPTH_MASK
  5621. CB_COLOR2_ATTRIB3__MIP0_DEPTH__SHIFT
  5622. CB_COLOR2_ATTRIB3__RESOURCE_LEVEL_MASK
  5623. CB_COLOR2_ATTRIB3__RESOURCE_LEVEL__SHIFT
  5624. CB_COLOR2_ATTRIB3__RESOURCE_TYPE_MASK
  5625. CB_COLOR2_ATTRIB3__RESOURCE_TYPE__SHIFT
  5626. CB_COLOR2_ATTRIB__COLOR_SW_MODE_MASK
  5627. CB_COLOR2_ATTRIB__COLOR_SW_MODE__SHIFT
  5628. CB_COLOR2_ATTRIB__DISABLE_FMASK_NOFETCH_OPT_MASK
  5629. CB_COLOR2_ATTRIB__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  5630. CB_COLOR2_ATTRIB__FMASK_BANK_HEIGHT_MASK
  5631. CB_COLOR2_ATTRIB__FMASK_BANK_HEIGHT__SHIFT
  5632. CB_COLOR2_ATTRIB__FMASK_SW_MODE_MASK
  5633. CB_COLOR2_ATTRIB__FMASK_SW_MODE__SHIFT
  5634. CB_COLOR2_ATTRIB__FMASK_TILE_MODE_INDEX_MASK
  5635. CB_COLOR2_ATTRIB__FMASK_TILE_MODE_INDEX__SHIFT
  5636. CB_COLOR2_ATTRIB__FORCE_DST_ALPHA_1_MASK
  5637. CB_COLOR2_ATTRIB__FORCE_DST_ALPHA_1__SHIFT
  5638. CB_COLOR2_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX_MASK
  5639. CB_COLOR2_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX__SHIFT
  5640. CB_COLOR2_ATTRIB__META_LINEAR_MASK
  5641. CB_COLOR2_ATTRIB__META_LINEAR__SHIFT
  5642. CB_COLOR2_ATTRIB__MIP0_DEPTH_MASK
  5643. CB_COLOR2_ATTRIB__MIP0_DEPTH__SHIFT
  5644. CB_COLOR2_ATTRIB__NUM_FRAGMENTS_MASK
  5645. CB_COLOR2_ATTRIB__NUM_FRAGMENTS__SHIFT
  5646. CB_COLOR2_ATTRIB__NUM_SAMPLES_MASK
  5647. CB_COLOR2_ATTRIB__NUM_SAMPLES__SHIFT
  5648. CB_COLOR2_ATTRIB__PIPE_ALIGNED_MASK
  5649. CB_COLOR2_ATTRIB__PIPE_ALIGNED__SHIFT
  5650. CB_COLOR2_ATTRIB__RB_ALIGNED_MASK
  5651. CB_COLOR2_ATTRIB__RB_ALIGNED__SHIFT
  5652. CB_COLOR2_ATTRIB__RESOURCE_TYPE_MASK
  5653. CB_COLOR2_ATTRIB__RESOURCE_TYPE__SHIFT
  5654. CB_COLOR2_ATTRIB__TILE_MODE_INDEX_MASK
  5655. CB_COLOR2_ATTRIB__TILE_MODE_INDEX__SHIFT
  5656. CB_COLOR2_BASE
  5657. CB_COLOR2_BASE_EXT__BASE_256B_MASK
  5658. CB_COLOR2_BASE_EXT__BASE_256B__SHIFT
  5659. CB_COLOR2_BASE__BASE_256B_MASK
  5660. CB_COLOR2_BASE__BASE_256B__SHIFT
  5661. CB_COLOR2_CLEAR_WORD0
  5662. CB_COLOR2_CLEAR_WORD0__CLEAR_WORD0_MASK
  5663. CB_COLOR2_CLEAR_WORD0__CLEAR_WORD0__SHIFT
  5664. CB_COLOR2_CLEAR_WORD1
  5665. CB_COLOR2_CLEAR_WORD1__CLEAR_WORD1_MASK
  5666. CB_COLOR2_CLEAR_WORD1__CLEAR_WORD1__SHIFT
  5667. CB_COLOR2_CLEAR_WORD2
  5668. CB_COLOR2_CLEAR_WORD3
  5669. CB_COLOR2_CMASK
  5670. CB_COLOR2_CMASK_BASE_EXT__BASE_256B_MASK
  5671. CB_COLOR2_CMASK_BASE_EXT__BASE_256B__SHIFT
  5672. CB_COLOR2_CMASK_SLICE
  5673. CB_COLOR2_CMASK_SLICE__TILE_MAX_MASK
  5674. CB_COLOR2_CMASK_SLICE__TILE_MAX__SHIFT
  5675. CB_COLOR2_CMASK__BASE_256B_MASK
  5676. CB_COLOR2_CMASK__BASE_256B__SHIFT
  5677. CB_COLOR2_DCC_BASE_EXT__BASE_256B_MASK
  5678. CB_COLOR2_DCC_BASE_EXT__BASE_256B__SHIFT
  5679. CB_COLOR2_DCC_BASE__BASE_256B_MASK
  5680. CB_COLOR2_DCC_BASE__BASE_256B__SHIFT
  5681. CB_COLOR2_DCC_CONTROL__COLOR_TRANSFORM_MASK
  5682. CB_COLOR2_DCC_CONTROL__COLOR_TRANSFORM__SHIFT
  5683. CB_COLOR2_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  5684. CB_COLOR2_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  5685. CB_COLOR2_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE_MASK
  5686. CB_COLOR2_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE__SHIFT
  5687. CB_COLOR2_DCC_CONTROL__INDEPENDENT_128B_BLOCKS_MASK
  5688. CB_COLOR2_DCC_CONTROL__INDEPENDENT_128B_BLOCKS__SHIFT
  5689. CB_COLOR2_DCC_CONTROL__INDEPENDENT_64B_BLOCKS_MASK
  5690. CB_COLOR2_DCC_CONTROL__INDEPENDENT_64B_BLOCKS__SHIFT
  5691. CB_COLOR2_DCC_CONTROL__KEY_CLEAR_ENABLE_MASK
  5692. CB_COLOR2_DCC_CONTROL__KEY_CLEAR_ENABLE__SHIFT
  5693. CB_COLOR2_DCC_CONTROL__LOSSY_ALPHA_PRECISION_MASK
  5694. CB_COLOR2_DCC_CONTROL__LOSSY_ALPHA_PRECISION__SHIFT
  5695. CB_COLOR2_DCC_CONTROL__LOSSY_RGB_PRECISION_MASK
  5696. CB_COLOR2_DCC_CONTROL__LOSSY_RGB_PRECISION__SHIFT
  5697. CB_COLOR2_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE_MASK
  5698. CB_COLOR2_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE__SHIFT
  5699. CB_COLOR2_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE_MASK
  5700. CB_COLOR2_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE__SHIFT
  5701. CB_COLOR2_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE_MASK
  5702. CB_COLOR2_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE__SHIFT
  5703. CB_COLOR2_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  5704. CB_COLOR2_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  5705. CB_COLOR2_DIM
  5706. CB_COLOR2_FMASK
  5707. CB_COLOR2_FMASK_BASE_EXT__BASE_256B_MASK
  5708. CB_COLOR2_FMASK_BASE_EXT__BASE_256B__SHIFT
  5709. CB_COLOR2_FMASK_SLICE
  5710. CB_COLOR2_FMASK_SLICE__TILE_MAX_MASK
  5711. CB_COLOR2_FMASK_SLICE__TILE_MAX__SHIFT
  5712. CB_COLOR2_FMASK__BASE_256B_MASK
  5713. CB_COLOR2_FMASK__BASE_256B__SHIFT
  5714. CB_COLOR2_INFO
  5715. CB_COLOR2_INFO__ALT_TILE_MODE_MASK
  5716. CB_COLOR2_INFO__ALT_TILE_MODE__SHIFT
  5717. CB_COLOR2_INFO__BLEND_BYPASS_MASK
  5718. CB_COLOR2_INFO__BLEND_BYPASS__SHIFT
  5719. CB_COLOR2_INFO__BLEND_CLAMP_MASK
  5720. CB_COLOR2_INFO__BLEND_CLAMP__SHIFT
  5721. CB_COLOR2_INFO__BLEND_OPT_DISCARD_PIXEL_MASK
  5722. CB_COLOR2_INFO__BLEND_OPT_DISCARD_PIXEL__SHIFT
  5723. CB_COLOR2_INFO__BLEND_OPT_DONT_RD_DST_MASK
  5724. CB_COLOR2_INFO__BLEND_OPT_DONT_RD_DST__SHIFT
  5725. CB_COLOR2_INFO__CMASK_ADDR_TYPE_MASK
  5726. CB_COLOR2_INFO__CMASK_ADDR_TYPE__SHIFT
  5727. CB_COLOR2_INFO__CMASK_IS_LINEAR_MASK
  5728. CB_COLOR2_INFO__CMASK_IS_LINEAR__SHIFT
  5729. CB_COLOR2_INFO__COMPRESSION_MASK
  5730. CB_COLOR2_INFO__COMPRESSION__SHIFT
  5731. CB_COLOR2_INFO__COMP_SWAP_MASK
  5732. CB_COLOR2_INFO__COMP_SWAP__SHIFT
  5733. CB_COLOR2_INFO__DCC_ENABLE_MASK
  5734. CB_COLOR2_INFO__DCC_ENABLE__SHIFT
  5735. CB_COLOR2_INFO__ENDIAN_MASK
  5736. CB_COLOR2_INFO__ENDIAN__SHIFT
  5737. CB_COLOR2_INFO__FAST_CLEAR_MASK
  5738. CB_COLOR2_INFO__FAST_CLEAR__SHIFT
  5739. CB_COLOR2_INFO__FMASK_COMPRESSION_DISABLE_MASK
  5740. CB_COLOR2_INFO__FMASK_COMPRESSION_DISABLE__SHIFT
  5741. CB_COLOR2_INFO__FMASK_COMPRESS_1FRAG_ONLY_MASK
  5742. CB_COLOR2_INFO__FMASK_COMPRESS_1FRAG_ONLY__SHIFT
  5743. CB_COLOR2_INFO__FORMAT_MASK
  5744. CB_COLOR2_INFO__FORMAT__SHIFT
  5745. CB_COLOR2_INFO__LINEAR_GENERAL_MASK
  5746. CB_COLOR2_INFO__LINEAR_GENERAL__SHIFT
  5747. CB_COLOR2_INFO__NUMBER_TYPE_MASK
  5748. CB_COLOR2_INFO__NUMBER_TYPE__SHIFT
  5749. CB_COLOR2_INFO__ROUND_MODE_MASK
  5750. CB_COLOR2_INFO__ROUND_MODE__SHIFT
  5751. CB_COLOR2_INFO__SIMPLE_FLOAT_MASK
  5752. CB_COLOR2_INFO__SIMPLE_FLOAT__SHIFT
  5753. CB_COLOR2_PITCH
  5754. CB_COLOR2_PITCH__FMASK_TILE_MAX_MASK
  5755. CB_COLOR2_PITCH__FMASK_TILE_MAX__SHIFT
  5756. CB_COLOR2_PITCH__TILE_MAX_MASK
  5757. CB_COLOR2_PITCH__TILE_MAX__SHIFT
  5758. CB_COLOR2_SLICE
  5759. CB_COLOR2_SLICE__TILE_MAX_MASK
  5760. CB_COLOR2_SLICE__TILE_MAX__SHIFT
  5761. CB_COLOR2_VIEW
  5762. CB_COLOR2_VIEW__MIP_LEVEL_MASK
  5763. CB_COLOR2_VIEW__MIP_LEVEL__SHIFT
  5764. CB_COLOR2_VIEW__SLICE_MAX_MASK
  5765. CB_COLOR2_VIEW__SLICE_MAX__SHIFT
  5766. CB_COLOR2_VIEW__SLICE_START_MASK
  5767. CB_COLOR2_VIEW__SLICE_START__SHIFT
  5768. CB_COLOR3_ATTRIB
  5769. CB_COLOR3_ATTRIB2__MAX_MIP_MASK
  5770. CB_COLOR3_ATTRIB2__MAX_MIP__SHIFT
  5771. CB_COLOR3_ATTRIB2__MIP0_HEIGHT_MASK
  5772. CB_COLOR3_ATTRIB2__MIP0_HEIGHT__SHIFT
  5773. CB_COLOR3_ATTRIB2__MIP0_WIDTH_MASK
  5774. CB_COLOR3_ATTRIB2__MIP0_WIDTH__SHIFT
  5775. CB_COLOR3_ATTRIB3__CMASK_PIPE_ALIGNED_MASK
  5776. CB_COLOR3_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT
  5777. CB_COLOR3_ATTRIB3__COLOR_SW_MODE_MASK
  5778. CB_COLOR3_ATTRIB3__COLOR_SW_MODE__SHIFT
  5779. CB_COLOR3_ATTRIB3__DCC_PIPE_ALIGNED_MASK
  5780. CB_COLOR3_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT
  5781. CB_COLOR3_ATTRIB3__FMASK_SW_MODE_MASK
  5782. CB_COLOR3_ATTRIB3__FMASK_SW_MODE__SHIFT
  5783. CB_COLOR3_ATTRIB3__META_LINEAR_MASK
  5784. CB_COLOR3_ATTRIB3__META_LINEAR__SHIFT
  5785. CB_COLOR3_ATTRIB3__MIP0_DEPTH_MASK
  5786. CB_COLOR3_ATTRIB3__MIP0_DEPTH__SHIFT
  5787. CB_COLOR3_ATTRIB3__RESOURCE_LEVEL_MASK
  5788. CB_COLOR3_ATTRIB3__RESOURCE_LEVEL__SHIFT
  5789. CB_COLOR3_ATTRIB3__RESOURCE_TYPE_MASK
  5790. CB_COLOR3_ATTRIB3__RESOURCE_TYPE__SHIFT
  5791. CB_COLOR3_ATTRIB__COLOR_SW_MODE_MASK
  5792. CB_COLOR3_ATTRIB__COLOR_SW_MODE__SHIFT
  5793. CB_COLOR3_ATTRIB__DISABLE_FMASK_NOFETCH_OPT_MASK
  5794. CB_COLOR3_ATTRIB__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  5795. CB_COLOR3_ATTRIB__FMASK_BANK_HEIGHT_MASK
  5796. CB_COLOR3_ATTRIB__FMASK_BANK_HEIGHT__SHIFT
  5797. CB_COLOR3_ATTRIB__FMASK_SW_MODE_MASK
  5798. CB_COLOR3_ATTRIB__FMASK_SW_MODE__SHIFT
  5799. CB_COLOR3_ATTRIB__FMASK_TILE_MODE_INDEX_MASK
  5800. CB_COLOR3_ATTRIB__FMASK_TILE_MODE_INDEX__SHIFT
  5801. CB_COLOR3_ATTRIB__FORCE_DST_ALPHA_1_MASK
  5802. CB_COLOR3_ATTRIB__FORCE_DST_ALPHA_1__SHIFT
  5803. CB_COLOR3_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX_MASK
  5804. CB_COLOR3_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX__SHIFT
  5805. CB_COLOR3_ATTRIB__META_LINEAR_MASK
  5806. CB_COLOR3_ATTRIB__META_LINEAR__SHIFT
  5807. CB_COLOR3_ATTRIB__MIP0_DEPTH_MASK
  5808. CB_COLOR3_ATTRIB__MIP0_DEPTH__SHIFT
  5809. CB_COLOR3_ATTRIB__NUM_FRAGMENTS_MASK
  5810. CB_COLOR3_ATTRIB__NUM_FRAGMENTS__SHIFT
  5811. CB_COLOR3_ATTRIB__NUM_SAMPLES_MASK
  5812. CB_COLOR3_ATTRIB__NUM_SAMPLES__SHIFT
  5813. CB_COLOR3_ATTRIB__PIPE_ALIGNED_MASK
  5814. CB_COLOR3_ATTRIB__PIPE_ALIGNED__SHIFT
  5815. CB_COLOR3_ATTRIB__RB_ALIGNED_MASK
  5816. CB_COLOR3_ATTRIB__RB_ALIGNED__SHIFT
  5817. CB_COLOR3_ATTRIB__RESOURCE_TYPE_MASK
  5818. CB_COLOR3_ATTRIB__RESOURCE_TYPE__SHIFT
  5819. CB_COLOR3_ATTRIB__TILE_MODE_INDEX_MASK
  5820. CB_COLOR3_ATTRIB__TILE_MODE_INDEX__SHIFT
  5821. CB_COLOR3_BASE
  5822. CB_COLOR3_BASE_EXT__BASE_256B_MASK
  5823. CB_COLOR3_BASE_EXT__BASE_256B__SHIFT
  5824. CB_COLOR3_BASE__BASE_256B_MASK
  5825. CB_COLOR3_BASE__BASE_256B__SHIFT
  5826. CB_COLOR3_CLEAR_WORD0
  5827. CB_COLOR3_CLEAR_WORD0__CLEAR_WORD0_MASK
  5828. CB_COLOR3_CLEAR_WORD0__CLEAR_WORD0__SHIFT
  5829. CB_COLOR3_CLEAR_WORD1
  5830. CB_COLOR3_CLEAR_WORD1__CLEAR_WORD1_MASK
  5831. CB_COLOR3_CLEAR_WORD1__CLEAR_WORD1__SHIFT
  5832. CB_COLOR3_CLEAR_WORD2
  5833. CB_COLOR3_CLEAR_WORD3
  5834. CB_COLOR3_CMASK
  5835. CB_COLOR3_CMASK_BASE_EXT__BASE_256B_MASK
  5836. CB_COLOR3_CMASK_BASE_EXT__BASE_256B__SHIFT
  5837. CB_COLOR3_CMASK_SLICE
  5838. CB_COLOR3_CMASK_SLICE__TILE_MAX_MASK
  5839. CB_COLOR3_CMASK_SLICE__TILE_MAX__SHIFT
  5840. CB_COLOR3_CMASK__BASE_256B_MASK
  5841. CB_COLOR3_CMASK__BASE_256B__SHIFT
  5842. CB_COLOR3_DCC_BASE_EXT__BASE_256B_MASK
  5843. CB_COLOR3_DCC_BASE_EXT__BASE_256B__SHIFT
  5844. CB_COLOR3_DCC_BASE__BASE_256B_MASK
  5845. CB_COLOR3_DCC_BASE__BASE_256B__SHIFT
  5846. CB_COLOR3_DCC_CONTROL__COLOR_TRANSFORM_MASK
  5847. CB_COLOR3_DCC_CONTROL__COLOR_TRANSFORM__SHIFT
  5848. CB_COLOR3_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  5849. CB_COLOR3_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  5850. CB_COLOR3_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE_MASK
  5851. CB_COLOR3_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE__SHIFT
  5852. CB_COLOR3_DCC_CONTROL__INDEPENDENT_128B_BLOCKS_MASK
  5853. CB_COLOR3_DCC_CONTROL__INDEPENDENT_128B_BLOCKS__SHIFT
  5854. CB_COLOR3_DCC_CONTROL__INDEPENDENT_64B_BLOCKS_MASK
  5855. CB_COLOR3_DCC_CONTROL__INDEPENDENT_64B_BLOCKS__SHIFT
  5856. CB_COLOR3_DCC_CONTROL__KEY_CLEAR_ENABLE_MASK
  5857. CB_COLOR3_DCC_CONTROL__KEY_CLEAR_ENABLE__SHIFT
  5858. CB_COLOR3_DCC_CONTROL__LOSSY_ALPHA_PRECISION_MASK
  5859. CB_COLOR3_DCC_CONTROL__LOSSY_ALPHA_PRECISION__SHIFT
  5860. CB_COLOR3_DCC_CONTROL__LOSSY_RGB_PRECISION_MASK
  5861. CB_COLOR3_DCC_CONTROL__LOSSY_RGB_PRECISION__SHIFT
  5862. CB_COLOR3_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE_MASK
  5863. CB_COLOR3_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE__SHIFT
  5864. CB_COLOR3_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE_MASK
  5865. CB_COLOR3_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE__SHIFT
  5866. CB_COLOR3_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE_MASK
  5867. CB_COLOR3_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE__SHIFT
  5868. CB_COLOR3_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  5869. CB_COLOR3_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  5870. CB_COLOR3_DIM
  5871. CB_COLOR3_FMASK
  5872. CB_COLOR3_FMASK_BASE_EXT__BASE_256B_MASK
  5873. CB_COLOR3_FMASK_BASE_EXT__BASE_256B__SHIFT
  5874. CB_COLOR3_FMASK_SLICE
  5875. CB_COLOR3_FMASK_SLICE__TILE_MAX_MASK
  5876. CB_COLOR3_FMASK_SLICE__TILE_MAX__SHIFT
  5877. CB_COLOR3_FMASK__BASE_256B_MASK
  5878. CB_COLOR3_FMASK__BASE_256B__SHIFT
  5879. CB_COLOR3_INFO
  5880. CB_COLOR3_INFO__ALT_TILE_MODE_MASK
  5881. CB_COLOR3_INFO__ALT_TILE_MODE__SHIFT
  5882. CB_COLOR3_INFO__BLEND_BYPASS_MASK
  5883. CB_COLOR3_INFO__BLEND_BYPASS__SHIFT
  5884. CB_COLOR3_INFO__BLEND_CLAMP_MASK
  5885. CB_COLOR3_INFO__BLEND_CLAMP__SHIFT
  5886. CB_COLOR3_INFO__BLEND_OPT_DISCARD_PIXEL_MASK
  5887. CB_COLOR3_INFO__BLEND_OPT_DISCARD_PIXEL__SHIFT
  5888. CB_COLOR3_INFO__BLEND_OPT_DONT_RD_DST_MASK
  5889. CB_COLOR3_INFO__BLEND_OPT_DONT_RD_DST__SHIFT
  5890. CB_COLOR3_INFO__CMASK_ADDR_TYPE_MASK
  5891. CB_COLOR3_INFO__CMASK_ADDR_TYPE__SHIFT
  5892. CB_COLOR3_INFO__CMASK_IS_LINEAR_MASK
  5893. CB_COLOR3_INFO__CMASK_IS_LINEAR__SHIFT
  5894. CB_COLOR3_INFO__COMPRESSION_MASK
  5895. CB_COLOR3_INFO__COMPRESSION__SHIFT
  5896. CB_COLOR3_INFO__COMP_SWAP_MASK
  5897. CB_COLOR3_INFO__COMP_SWAP__SHIFT
  5898. CB_COLOR3_INFO__DCC_ENABLE_MASK
  5899. CB_COLOR3_INFO__DCC_ENABLE__SHIFT
  5900. CB_COLOR3_INFO__ENDIAN_MASK
  5901. CB_COLOR3_INFO__ENDIAN__SHIFT
  5902. CB_COLOR3_INFO__FAST_CLEAR_MASK
  5903. CB_COLOR3_INFO__FAST_CLEAR__SHIFT
  5904. CB_COLOR3_INFO__FMASK_COMPRESSION_DISABLE_MASK
  5905. CB_COLOR3_INFO__FMASK_COMPRESSION_DISABLE__SHIFT
  5906. CB_COLOR3_INFO__FMASK_COMPRESS_1FRAG_ONLY_MASK
  5907. CB_COLOR3_INFO__FMASK_COMPRESS_1FRAG_ONLY__SHIFT
  5908. CB_COLOR3_INFO__FORMAT_MASK
  5909. CB_COLOR3_INFO__FORMAT__SHIFT
  5910. CB_COLOR3_INFO__LINEAR_GENERAL_MASK
  5911. CB_COLOR3_INFO__LINEAR_GENERAL__SHIFT
  5912. CB_COLOR3_INFO__NUMBER_TYPE_MASK
  5913. CB_COLOR3_INFO__NUMBER_TYPE__SHIFT
  5914. CB_COLOR3_INFO__ROUND_MODE_MASK
  5915. CB_COLOR3_INFO__ROUND_MODE__SHIFT
  5916. CB_COLOR3_INFO__SIMPLE_FLOAT_MASK
  5917. CB_COLOR3_INFO__SIMPLE_FLOAT__SHIFT
  5918. CB_COLOR3_PITCH
  5919. CB_COLOR3_PITCH__FMASK_TILE_MAX_MASK
  5920. CB_COLOR3_PITCH__FMASK_TILE_MAX__SHIFT
  5921. CB_COLOR3_PITCH__TILE_MAX_MASK
  5922. CB_COLOR3_PITCH__TILE_MAX__SHIFT
  5923. CB_COLOR3_SLICE
  5924. CB_COLOR3_SLICE__TILE_MAX_MASK
  5925. CB_COLOR3_SLICE__TILE_MAX__SHIFT
  5926. CB_COLOR3_VIEW
  5927. CB_COLOR3_VIEW__MIP_LEVEL_MASK
  5928. CB_COLOR3_VIEW__MIP_LEVEL__SHIFT
  5929. CB_COLOR3_VIEW__SLICE_MAX_MASK
  5930. CB_COLOR3_VIEW__SLICE_MAX__SHIFT
  5931. CB_COLOR3_VIEW__SLICE_START_MASK
  5932. CB_COLOR3_VIEW__SLICE_START__SHIFT
  5933. CB_COLOR4_ATTRIB
  5934. CB_COLOR4_ATTRIB2__MAX_MIP_MASK
  5935. CB_COLOR4_ATTRIB2__MAX_MIP__SHIFT
  5936. CB_COLOR4_ATTRIB2__MIP0_HEIGHT_MASK
  5937. CB_COLOR4_ATTRIB2__MIP0_HEIGHT__SHIFT
  5938. CB_COLOR4_ATTRIB2__MIP0_WIDTH_MASK
  5939. CB_COLOR4_ATTRIB2__MIP0_WIDTH__SHIFT
  5940. CB_COLOR4_ATTRIB3__CMASK_PIPE_ALIGNED_MASK
  5941. CB_COLOR4_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT
  5942. CB_COLOR4_ATTRIB3__COLOR_SW_MODE_MASK
  5943. CB_COLOR4_ATTRIB3__COLOR_SW_MODE__SHIFT
  5944. CB_COLOR4_ATTRIB3__DCC_PIPE_ALIGNED_MASK
  5945. CB_COLOR4_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT
  5946. CB_COLOR4_ATTRIB3__FMASK_SW_MODE_MASK
  5947. CB_COLOR4_ATTRIB3__FMASK_SW_MODE__SHIFT
  5948. CB_COLOR4_ATTRIB3__META_LINEAR_MASK
  5949. CB_COLOR4_ATTRIB3__META_LINEAR__SHIFT
  5950. CB_COLOR4_ATTRIB3__MIP0_DEPTH_MASK
  5951. CB_COLOR4_ATTRIB3__MIP0_DEPTH__SHIFT
  5952. CB_COLOR4_ATTRIB3__RESOURCE_LEVEL_MASK
  5953. CB_COLOR4_ATTRIB3__RESOURCE_LEVEL__SHIFT
  5954. CB_COLOR4_ATTRIB3__RESOURCE_TYPE_MASK
  5955. CB_COLOR4_ATTRIB3__RESOURCE_TYPE__SHIFT
  5956. CB_COLOR4_ATTRIB__COLOR_SW_MODE_MASK
  5957. CB_COLOR4_ATTRIB__COLOR_SW_MODE__SHIFT
  5958. CB_COLOR4_ATTRIB__DISABLE_FMASK_NOFETCH_OPT_MASK
  5959. CB_COLOR4_ATTRIB__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  5960. CB_COLOR4_ATTRIB__FMASK_BANK_HEIGHT_MASK
  5961. CB_COLOR4_ATTRIB__FMASK_BANK_HEIGHT__SHIFT
  5962. CB_COLOR4_ATTRIB__FMASK_SW_MODE_MASK
  5963. CB_COLOR4_ATTRIB__FMASK_SW_MODE__SHIFT
  5964. CB_COLOR4_ATTRIB__FMASK_TILE_MODE_INDEX_MASK
  5965. CB_COLOR4_ATTRIB__FMASK_TILE_MODE_INDEX__SHIFT
  5966. CB_COLOR4_ATTRIB__FORCE_DST_ALPHA_1_MASK
  5967. CB_COLOR4_ATTRIB__FORCE_DST_ALPHA_1__SHIFT
  5968. CB_COLOR4_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX_MASK
  5969. CB_COLOR4_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX__SHIFT
  5970. CB_COLOR4_ATTRIB__META_LINEAR_MASK
  5971. CB_COLOR4_ATTRIB__META_LINEAR__SHIFT
  5972. CB_COLOR4_ATTRIB__MIP0_DEPTH_MASK
  5973. CB_COLOR4_ATTRIB__MIP0_DEPTH__SHIFT
  5974. CB_COLOR4_ATTRIB__NUM_FRAGMENTS_MASK
  5975. CB_COLOR4_ATTRIB__NUM_FRAGMENTS__SHIFT
  5976. CB_COLOR4_ATTRIB__NUM_SAMPLES_MASK
  5977. CB_COLOR4_ATTRIB__NUM_SAMPLES__SHIFT
  5978. CB_COLOR4_ATTRIB__PIPE_ALIGNED_MASK
  5979. CB_COLOR4_ATTRIB__PIPE_ALIGNED__SHIFT
  5980. CB_COLOR4_ATTRIB__RB_ALIGNED_MASK
  5981. CB_COLOR4_ATTRIB__RB_ALIGNED__SHIFT
  5982. CB_COLOR4_ATTRIB__RESOURCE_TYPE_MASK
  5983. CB_COLOR4_ATTRIB__RESOURCE_TYPE__SHIFT
  5984. CB_COLOR4_ATTRIB__TILE_MODE_INDEX_MASK
  5985. CB_COLOR4_ATTRIB__TILE_MODE_INDEX__SHIFT
  5986. CB_COLOR4_BASE
  5987. CB_COLOR4_BASE_EXT__BASE_256B_MASK
  5988. CB_COLOR4_BASE_EXT__BASE_256B__SHIFT
  5989. CB_COLOR4_BASE__BASE_256B_MASK
  5990. CB_COLOR4_BASE__BASE_256B__SHIFT
  5991. CB_COLOR4_CLEAR_WORD0
  5992. CB_COLOR4_CLEAR_WORD0__CLEAR_WORD0_MASK
  5993. CB_COLOR4_CLEAR_WORD0__CLEAR_WORD0__SHIFT
  5994. CB_COLOR4_CLEAR_WORD1
  5995. CB_COLOR4_CLEAR_WORD1__CLEAR_WORD1_MASK
  5996. CB_COLOR4_CLEAR_WORD1__CLEAR_WORD1__SHIFT
  5997. CB_COLOR4_CLEAR_WORD2
  5998. CB_COLOR4_CLEAR_WORD3
  5999. CB_COLOR4_CMASK
  6000. CB_COLOR4_CMASK_BASE_EXT__BASE_256B_MASK
  6001. CB_COLOR4_CMASK_BASE_EXT__BASE_256B__SHIFT
  6002. CB_COLOR4_CMASK_SLICE
  6003. CB_COLOR4_CMASK_SLICE__TILE_MAX_MASK
  6004. CB_COLOR4_CMASK_SLICE__TILE_MAX__SHIFT
  6005. CB_COLOR4_CMASK__BASE_256B_MASK
  6006. CB_COLOR4_CMASK__BASE_256B__SHIFT
  6007. CB_COLOR4_DCC_BASE_EXT__BASE_256B_MASK
  6008. CB_COLOR4_DCC_BASE_EXT__BASE_256B__SHIFT
  6009. CB_COLOR4_DCC_BASE__BASE_256B_MASK
  6010. CB_COLOR4_DCC_BASE__BASE_256B__SHIFT
  6011. CB_COLOR4_DCC_CONTROL__COLOR_TRANSFORM_MASK
  6012. CB_COLOR4_DCC_CONTROL__COLOR_TRANSFORM__SHIFT
  6013. CB_COLOR4_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  6014. CB_COLOR4_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  6015. CB_COLOR4_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE_MASK
  6016. CB_COLOR4_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE__SHIFT
  6017. CB_COLOR4_DCC_CONTROL__INDEPENDENT_128B_BLOCKS_MASK
  6018. CB_COLOR4_DCC_CONTROL__INDEPENDENT_128B_BLOCKS__SHIFT
  6019. CB_COLOR4_DCC_CONTROL__INDEPENDENT_64B_BLOCKS_MASK
  6020. CB_COLOR4_DCC_CONTROL__INDEPENDENT_64B_BLOCKS__SHIFT
  6021. CB_COLOR4_DCC_CONTROL__KEY_CLEAR_ENABLE_MASK
  6022. CB_COLOR4_DCC_CONTROL__KEY_CLEAR_ENABLE__SHIFT
  6023. CB_COLOR4_DCC_CONTROL__LOSSY_ALPHA_PRECISION_MASK
  6024. CB_COLOR4_DCC_CONTROL__LOSSY_ALPHA_PRECISION__SHIFT
  6025. CB_COLOR4_DCC_CONTROL__LOSSY_RGB_PRECISION_MASK
  6026. CB_COLOR4_DCC_CONTROL__LOSSY_RGB_PRECISION__SHIFT
  6027. CB_COLOR4_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE_MASK
  6028. CB_COLOR4_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE__SHIFT
  6029. CB_COLOR4_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE_MASK
  6030. CB_COLOR4_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE__SHIFT
  6031. CB_COLOR4_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE_MASK
  6032. CB_COLOR4_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE__SHIFT
  6033. CB_COLOR4_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  6034. CB_COLOR4_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  6035. CB_COLOR4_DIM
  6036. CB_COLOR4_FMASK
  6037. CB_COLOR4_FMASK_BASE_EXT__BASE_256B_MASK
  6038. CB_COLOR4_FMASK_BASE_EXT__BASE_256B__SHIFT
  6039. CB_COLOR4_FMASK_SLICE
  6040. CB_COLOR4_FMASK_SLICE__TILE_MAX_MASK
  6041. CB_COLOR4_FMASK_SLICE__TILE_MAX__SHIFT
  6042. CB_COLOR4_FMASK__BASE_256B_MASK
  6043. CB_COLOR4_FMASK__BASE_256B__SHIFT
  6044. CB_COLOR4_INFO
  6045. CB_COLOR4_INFO__ALT_TILE_MODE_MASK
  6046. CB_COLOR4_INFO__ALT_TILE_MODE__SHIFT
  6047. CB_COLOR4_INFO__BLEND_BYPASS_MASK
  6048. CB_COLOR4_INFO__BLEND_BYPASS__SHIFT
  6049. CB_COLOR4_INFO__BLEND_CLAMP_MASK
  6050. CB_COLOR4_INFO__BLEND_CLAMP__SHIFT
  6051. CB_COLOR4_INFO__BLEND_OPT_DISCARD_PIXEL_MASK
  6052. CB_COLOR4_INFO__BLEND_OPT_DISCARD_PIXEL__SHIFT
  6053. CB_COLOR4_INFO__BLEND_OPT_DONT_RD_DST_MASK
  6054. CB_COLOR4_INFO__BLEND_OPT_DONT_RD_DST__SHIFT
  6055. CB_COLOR4_INFO__CMASK_ADDR_TYPE_MASK
  6056. CB_COLOR4_INFO__CMASK_ADDR_TYPE__SHIFT
  6057. CB_COLOR4_INFO__CMASK_IS_LINEAR_MASK
  6058. CB_COLOR4_INFO__CMASK_IS_LINEAR__SHIFT
  6059. CB_COLOR4_INFO__COMPRESSION_MASK
  6060. CB_COLOR4_INFO__COMPRESSION__SHIFT
  6061. CB_COLOR4_INFO__COMP_SWAP_MASK
  6062. CB_COLOR4_INFO__COMP_SWAP__SHIFT
  6063. CB_COLOR4_INFO__DCC_ENABLE_MASK
  6064. CB_COLOR4_INFO__DCC_ENABLE__SHIFT
  6065. CB_COLOR4_INFO__ENDIAN_MASK
  6066. CB_COLOR4_INFO__ENDIAN__SHIFT
  6067. CB_COLOR4_INFO__FAST_CLEAR_MASK
  6068. CB_COLOR4_INFO__FAST_CLEAR__SHIFT
  6069. CB_COLOR4_INFO__FMASK_COMPRESSION_DISABLE_MASK
  6070. CB_COLOR4_INFO__FMASK_COMPRESSION_DISABLE__SHIFT
  6071. CB_COLOR4_INFO__FMASK_COMPRESS_1FRAG_ONLY_MASK
  6072. CB_COLOR4_INFO__FMASK_COMPRESS_1FRAG_ONLY__SHIFT
  6073. CB_COLOR4_INFO__FORMAT_MASK
  6074. CB_COLOR4_INFO__FORMAT__SHIFT
  6075. CB_COLOR4_INFO__LINEAR_GENERAL_MASK
  6076. CB_COLOR4_INFO__LINEAR_GENERAL__SHIFT
  6077. CB_COLOR4_INFO__NUMBER_TYPE_MASK
  6078. CB_COLOR4_INFO__NUMBER_TYPE__SHIFT
  6079. CB_COLOR4_INFO__ROUND_MODE_MASK
  6080. CB_COLOR4_INFO__ROUND_MODE__SHIFT
  6081. CB_COLOR4_INFO__SIMPLE_FLOAT_MASK
  6082. CB_COLOR4_INFO__SIMPLE_FLOAT__SHIFT
  6083. CB_COLOR4_PITCH
  6084. CB_COLOR4_PITCH__FMASK_TILE_MAX_MASK
  6085. CB_COLOR4_PITCH__FMASK_TILE_MAX__SHIFT
  6086. CB_COLOR4_PITCH__TILE_MAX_MASK
  6087. CB_COLOR4_PITCH__TILE_MAX__SHIFT
  6088. CB_COLOR4_SLICE
  6089. CB_COLOR4_SLICE__TILE_MAX_MASK
  6090. CB_COLOR4_SLICE__TILE_MAX__SHIFT
  6091. CB_COLOR4_VIEW
  6092. CB_COLOR4_VIEW__MIP_LEVEL_MASK
  6093. CB_COLOR4_VIEW__MIP_LEVEL__SHIFT
  6094. CB_COLOR4_VIEW__SLICE_MAX_MASK
  6095. CB_COLOR4_VIEW__SLICE_MAX__SHIFT
  6096. CB_COLOR4_VIEW__SLICE_START_MASK
  6097. CB_COLOR4_VIEW__SLICE_START__SHIFT
  6098. CB_COLOR5_ATTRIB
  6099. CB_COLOR5_ATTRIB2__MAX_MIP_MASK
  6100. CB_COLOR5_ATTRIB2__MAX_MIP__SHIFT
  6101. CB_COLOR5_ATTRIB2__MIP0_HEIGHT_MASK
  6102. CB_COLOR5_ATTRIB2__MIP0_HEIGHT__SHIFT
  6103. CB_COLOR5_ATTRIB2__MIP0_WIDTH_MASK
  6104. CB_COLOR5_ATTRIB2__MIP0_WIDTH__SHIFT
  6105. CB_COLOR5_ATTRIB3__CMASK_PIPE_ALIGNED_MASK
  6106. CB_COLOR5_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT
  6107. CB_COLOR5_ATTRIB3__COLOR_SW_MODE_MASK
  6108. CB_COLOR5_ATTRIB3__COLOR_SW_MODE__SHIFT
  6109. CB_COLOR5_ATTRIB3__DCC_PIPE_ALIGNED_MASK
  6110. CB_COLOR5_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT
  6111. CB_COLOR5_ATTRIB3__FMASK_SW_MODE_MASK
  6112. CB_COLOR5_ATTRIB3__FMASK_SW_MODE__SHIFT
  6113. CB_COLOR5_ATTRIB3__META_LINEAR_MASK
  6114. CB_COLOR5_ATTRIB3__META_LINEAR__SHIFT
  6115. CB_COLOR5_ATTRIB3__MIP0_DEPTH_MASK
  6116. CB_COLOR5_ATTRIB3__MIP0_DEPTH__SHIFT
  6117. CB_COLOR5_ATTRIB3__RESOURCE_LEVEL_MASK
  6118. CB_COLOR5_ATTRIB3__RESOURCE_LEVEL__SHIFT
  6119. CB_COLOR5_ATTRIB3__RESOURCE_TYPE_MASK
  6120. CB_COLOR5_ATTRIB3__RESOURCE_TYPE__SHIFT
  6121. CB_COLOR5_ATTRIB__COLOR_SW_MODE_MASK
  6122. CB_COLOR5_ATTRIB__COLOR_SW_MODE__SHIFT
  6123. CB_COLOR5_ATTRIB__DISABLE_FMASK_NOFETCH_OPT_MASK
  6124. CB_COLOR5_ATTRIB__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  6125. CB_COLOR5_ATTRIB__FMASK_BANK_HEIGHT_MASK
  6126. CB_COLOR5_ATTRIB__FMASK_BANK_HEIGHT__SHIFT
  6127. CB_COLOR5_ATTRIB__FMASK_SW_MODE_MASK
  6128. CB_COLOR5_ATTRIB__FMASK_SW_MODE__SHIFT
  6129. CB_COLOR5_ATTRIB__FMASK_TILE_MODE_INDEX_MASK
  6130. CB_COLOR5_ATTRIB__FMASK_TILE_MODE_INDEX__SHIFT
  6131. CB_COLOR5_ATTRIB__FORCE_DST_ALPHA_1_MASK
  6132. CB_COLOR5_ATTRIB__FORCE_DST_ALPHA_1__SHIFT
  6133. CB_COLOR5_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX_MASK
  6134. CB_COLOR5_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX__SHIFT
  6135. CB_COLOR5_ATTRIB__META_LINEAR_MASK
  6136. CB_COLOR5_ATTRIB__META_LINEAR__SHIFT
  6137. CB_COLOR5_ATTRIB__MIP0_DEPTH_MASK
  6138. CB_COLOR5_ATTRIB__MIP0_DEPTH__SHIFT
  6139. CB_COLOR5_ATTRIB__NUM_FRAGMENTS_MASK
  6140. CB_COLOR5_ATTRIB__NUM_FRAGMENTS__SHIFT
  6141. CB_COLOR5_ATTRIB__NUM_SAMPLES_MASK
  6142. CB_COLOR5_ATTRIB__NUM_SAMPLES__SHIFT
  6143. CB_COLOR5_ATTRIB__PIPE_ALIGNED_MASK
  6144. CB_COLOR5_ATTRIB__PIPE_ALIGNED__SHIFT
  6145. CB_COLOR5_ATTRIB__RB_ALIGNED_MASK
  6146. CB_COLOR5_ATTRIB__RB_ALIGNED__SHIFT
  6147. CB_COLOR5_ATTRIB__RESOURCE_TYPE_MASK
  6148. CB_COLOR5_ATTRIB__RESOURCE_TYPE__SHIFT
  6149. CB_COLOR5_ATTRIB__TILE_MODE_INDEX_MASK
  6150. CB_COLOR5_ATTRIB__TILE_MODE_INDEX__SHIFT
  6151. CB_COLOR5_BASE
  6152. CB_COLOR5_BASE_EXT__BASE_256B_MASK
  6153. CB_COLOR5_BASE_EXT__BASE_256B__SHIFT
  6154. CB_COLOR5_BASE__BASE_256B_MASK
  6155. CB_COLOR5_BASE__BASE_256B__SHIFT
  6156. CB_COLOR5_CLEAR_WORD0
  6157. CB_COLOR5_CLEAR_WORD0__CLEAR_WORD0_MASK
  6158. CB_COLOR5_CLEAR_WORD0__CLEAR_WORD0__SHIFT
  6159. CB_COLOR5_CLEAR_WORD1
  6160. CB_COLOR5_CLEAR_WORD1__CLEAR_WORD1_MASK
  6161. CB_COLOR5_CLEAR_WORD1__CLEAR_WORD1__SHIFT
  6162. CB_COLOR5_CLEAR_WORD2
  6163. CB_COLOR5_CLEAR_WORD3
  6164. CB_COLOR5_CMASK
  6165. CB_COLOR5_CMASK_BASE_EXT__BASE_256B_MASK
  6166. CB_COLOR5_CMASK_BASE_EXT__BASE_256B__SHIFT
  6167. CB_COLOR5_CMASK_SLICE
  6168. CB_COLOR5_CMASK_SLICE__TILE_MAX_MASK
  6169. CB_COLOR5_CMASK_SLICE__TILE_MAX__SHIFT
  6170. CB_COLOR5_CMASK__BASE_256B_MASK
  6171. CB_COLOR5_CMASK__BASE_256B__SHIFT
  6172. CB_COLOR5_DCC_BASE_EXT__BASE_256B_MASK
  6173. CB_COLOR5_DCC_BASE_EXT__BASE_256B__SHIFT
  6174. CB_COLOR5_DCC_BASE__BASE_256B_MASK
  6175. CB_COLOR5_DCC_BASE__BASE_256B__SHIFT
  6176. CB_COLOR5_DCC_CONTROL__COLOR_TRANSFORM_MASK
  6177. CB_COLOR5_DCC_CONTROL__COLOR_TRANSFORM__SHIFT
  6178. CB_COLOR5_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  6179. CB_COLOR5_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  6180. CB_COLOR5_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE_MASK
  6181. CB_COLOR5_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE__SHIFT
  6182. CB_COLOR5_DCC_CONTROL__INDEPENDENT_128B_BLOCKS_MASK
  6183. CB_COLOR5_DCC_CONTROL__INDEPENDENT_128B_BLOCKS__SHIFT
  6184. CB_COLOR5_DCC_CONTROL__INDEPENDENT_64B_BLOCKS_MASK
  6185. CB_COLOR5_DCC_CONTROL__INDEPENDENT_64B_BLOCKS__SHIFT
  6186. CB_COLOR5_DCC_CONTROL__KEY_CLEAR_ENABLE_MASK
  6187. CB_COLOR5_DCC_CONTROL__KEY_CLEAR_ENABLE__SHIFT
  6188. CB_COLOR5_DCC_CONTROL__LOSSY_ALPHA_PRECISION_MASK
  6189. CB_COLOR5_DCC_CONTROL__LOSSY_ALPHA_PRECISION__SHIFT
  6190. CB_COLOR5_DCC_CONTROL__LOSSY_RGB_PRECISION_MASK
  6191. CB_COLOR5_DCC_CONTROL__LOSSY_RGB_PRECISION__SHIFT
  6192. CB_COLOR5_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE_MASK
  6193. CB_COLOR5_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE__SHIFT
  6194. CB_COLOR5_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE_MASK
  6195. CB_COLOR5_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE__SHIFT
  6196. CB_COLOR5_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE_MASK
  6197. CB_COLOR5_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE__SHIFT
  6198. CB_COLOR5_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  6199. CB_COLOR5_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  6200. CB_COLOR5_DIM
  6201. CB_COLOR5_FMASK
  6202. CB_COLOR5_FMASK_BASE_EXT__BASE_256B_MASK
  6203. CB_COLOR5_FMASK_BASE_EXT__BASE_256B__SHIFT
  6204. CB_COLOR5_FMASK_SLICE
  6205. CB_COLOR5_FMASK_SLICE__TILE_MAX_MASK
  6206. CB_COLOR5_FMASK_SLICE__TILE_MAX__SHIFT
  6207. CB_COLOR5_FMASK__BASE_256B_MASK
  6208. CB_COLOR5_FMASK__BASE_256B__SHIFT
  6209. CB_COLOR5_INFO
  6210. CB_COLOR5_INFO__ALT_TILE_MODE_MASK
  6211. CB_COLOR5_INFO__ALT_TILE_MODE__SHIFT
  6212. CB_COLOR5_INFO__BLEND_BYPASS_MASK
  6213. CB_COLOR5_INFO__BLEND_BYPASS__SHIFT
  6214. CB_COLOR5_INFO__BLEND_CLAMP_MASK
  6215. CB_COLOR5_INFO__BLEND_CLAMP__SHIFT
  6216. CB_COLOR5_INFO__BLEND_OPT_DISCARD_PIXEL_MASK
  6217. CB_COLOR5_INFO__BLEND_OPT_DISCARD_PIXEL__SHIFT
  6218. CB_COLOR5_INFO__BLEND_OPT_DONT_RD_DST_MASK
  6219. CB_COLOR5_INFO__BLEND_OPT_DONT_RD_DST__SHIFT
  6220. CB_COLOR5_INFO__CMASK_ADDR_TYPE_MASK
  6221. CB_COLOR5_INFO__CMASK_ADDR_TYPE__SHIFT
  6222. CB_COLOR5_INFO__CMASK_IS_LINEAR_MASK
  6223. CB_COLOR5_INFO__CMASK_IS_LINEAR__SHIFT
  6224. CB_COLOR5_INFO__COMPRESSION_MASK
  6225. CB_COLOR5_INFO__COMPRESSION__SHIFT
  6226. CB_COLOR5_INFO__COMP_SWAP_MASK
  6227. CB_COLOR5_INFO__COMP_SWAP__SHIFT
  6228. CB_COLOR5_INFO__DCC_ENABLE_MASK
  6229. CB_COLOR5_INFO__DCC_ENABLE__SHIFT
  6230. CB_COLOR5_INFO__ENDIAN_MASK
  6231. CB_COLOR5_INFO__ENDIAN__SHIFT
  6232. CB_COLOR5_INFO__FAST_CLEAR_MASK
  6233. CB_COLOR5_INFO__FAST_CLEAR__SHIFT
  6234. CB_COLOR5_INFO__FMASK_COMPRESSION_DISABLE_MASK
  6235. CB_COLOR5_INFO__FMASK_COMPRESSION_DISABLE__SHIFT
  6236. CB_COLOR5_INFO__FMASK_COMPRESS_1FRAG_ONLY_MASK
  6237. CB_COLOR5_INFO__FMASK_COMPRESS_1FRAG_ONLY__SHIFT
  6238. CB_COLOR5_INFO__FORMAT_MASK
  6239. CB_COLOR5_INFO__FORMAT__SHIFT
  6240. CB_COLOR5_INFO__LINEAR_GENERAL_MASK
  6241. CB_COLOR5_INFO__LINEAR_GENERAL__SHIFT
  6242. CB_COLOR5_INFO__NUMBER_TYPE_MASK
  6243. CB_COLOR5_INFO__NUMBER_TYPE__SHIFT
  6244. CB_COLOR5_INFO__ROUND_MODE_MASK
  6245. CB_COLOR5_INFO__ROUND_MODE__SHIFT
  6246. CB_COLOR5_INFO__SIMPLE_FLOAT_MASK
  6247. CB_COLOR5_INFO__SIMPLE_FLOAT__SHIFT
  6248. CB_COLOR5_PITCH
  6249. CB_COLOR5_PITCH__FMASK_TILE_MAX_MASK
  6250. CB_COLOR5_PITCH__FMASK_TILE_MAX__SHIFT
  6251. CB_COLOR5_PITCH__TILE_MAX_MASK
  6252. CB_COLOR5_PITCH__TILE_MAX__SHIFT
  6253. CB_COLOR5_SLICE
  6254. CB_COLOR5_SLICE__TILE_MAX_MASK
  6255. CB_COLOR5_SLICE__TILE_MAX__SHIFT
  6256. CB_COLOR5_VIEW
  6257. CB_COLOR5_VIEW__MIP_LEVEL_MASK
  6258. CB_COLOR5_VIEW__MIP_LEVEL__SHIFT
  6259. CB_COLOR5_VIEW__SLICE_MAX_MASK
  6260. CB_COLOR5_VIEW__SLICE_MAX__SHIFT
  6261. CB_COLOR5_VIEW__SLICE_START_MASK
  6262. CB_COLOR5_VIEW__SLICE_START__SHIFT
  6263. CB_COLOR6_ATTRIB
  6264. CB_COLOR6_ATTRIB2__MAX_MIP_MASK
  6265. CB_COLOR6_ATTRIB2__MAX_MIP__SHIFT
  6266. CB_COLOR6_ATTRIB2__MIP0_HEIGHT_MASK
  6267. CB_COLOR6_ATTRIB2__MIP0_HEIGHT__SHIFT
  6268. CB_COLOR6_ATTRIB2__MIP0_WIDTH_MASK
  6269. CB_COLOR6_ATTRIB2__MIP0_WIDTH__SHIFT
  6270. CB_COLOR6_ATTRIB3__CMASK_PIPE_ALIGNED_MASK
  6271. CB_COLOR6_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT
  6272. CB_COLOR6_ATTRIB3__COLOR_SW_MODE_MASK
  6273. CB_COLOR6_ATTRIB3__COLOR_SW_MODE__SHIFT
  6274. CB_COLOR6_ATTRIB3__DCC_PIPE_ALIGNED_MASK
  6275. CB_COLOR6_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT
  6276. CB_COLOR6_ATTRIB3__FMASK_SW_MODE_MASK
  6277. CB_COLOR6_ATTRIB3__FMASK_SW_MODE__SHIFT
  6278. CB_COLOR6_ATTRIB3__META_LINEAR_MASK
  6279. CB_COLOR6_ATTRIB3__META_LINEAR__SHIFT
  6280. CB_COLOR6_ATTRIB3__MIP0_DEPTH_MASK
  6281. CB_COLOR6_ATTRIB3__MIP0_DEPTH__SHIFT
  6282. CB_COLOR6_ATTRIB3__RESOURCE_LEVEL_MASK
  6283. CB_COLOR6_ATTRIB3__RESOURCE_LEVEL__SHIFT
  6284. CB_COLOR6_ATTRIB3__RESOURCE_TYPE_MASK
  6285. CB_COLOR6_ATTRIB3__RESOURCE_TYPE__SHIFT
  6286. CB_COLOR6_ATTRIB__COLOR_SW_MODE_MASK
  6287. CB_COLOR6_ATTRIB__COLOR_SW_MODE__SHIFT
  6288. CB_COLOR6_ATTRIB__DISABLE_FMASK_NOFETCH_OPT_MASK
  6289. CB_COLOR6_ATTRIB__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  6290. CB_COLOR6_ATTRIB__FMASK_BANK_HEIGHT_MASK
  6291. CB_COLOR6_ATTRIB__FMASK_BANK_HEIGHT__SHIFT
  6292. CB_COLOR6_ATTRIB__FMASK_SW_MODE_MASK
  6293. CB_COLOR6_ATTRIB__FMASK_SW_MODE__SHIFT
  6294. CB_COLOR6_ATTRIB__FMASK_TILE_MODE_INDEX_MASK
  6295. CB_COLOR6_ATTRIB__FMASK_TILE_MODE_INDEX__SHIFT
  6296. CB_COLOR6_ATTRIB__FORCE_DST_ALPHA_1_MASK
  6297. CB_COLOR6_ATTRIB__FORCE_DST_ALPHA_1__SHIFT
  6298. CB_COLOR6_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX_MASK
  6299. CB_COLOR6_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX__SHIFT
  6300. CB_COLOR6_ATTRIB__META_LINEAR_MASK
  6301. CB_COLOR6_ATTRIB__META_LINEAR__SHIFT
  6302. CB_COLOR6_ATTRIB__MIP0_DEPTH_MASK
  6303. CB_COLOR6_ATTRIB__MIP0_DEPTH__SHIFT
  6304. CB_COLOR6_ATTRIB__NUM_FRAGMENTS_MASK
  6305. CB_COLOR6_ATTRIB__NUM_FRAGMENTS__SHIFT
  6306. CB_COLOR6_ATTRIB__NUM_SAMPLES_MASK
  6307. CB_COLOR6_ATTRIB__NUM_SAMPLES__SHIFT
  6308. CB_COLOR6_ATTRIB__PIPE_ALIGNED_MASK
  6309. CB_COLOR6_ATTRIB__PIPE_ALIGNED__SHIFT
  6310. CB_COLOR6_ATTRIB__RB_ALIGNED_MASK
  6311. CB_COLOR6_ATTRIB__RB_ALIGNED__SHIFT
  6312. CB_COLOR6_ATTRIB__RESOURCE_TYPE_MASK
  6313. CB_COLOR6_ATTRIB__RESOURCE_TYPE__SHIFT
  6314. CB_COLOR6_ATTRIB__TILE_MODE_INDEX_MASK
  6315. CB_COLOR6_ATTRIB__TILE_MODE_INDEX__SHIFT
  6316. CB_COLOR6_BASE
  6317. CB_COLOR6_BASE_EXT__BASE_256B_MASK
  6318. CB_COLOR6_BASE_EXT__BASE_256B__SHIFT
  6319. CB_COLOR6_BASE__BASE_256B_MASK
  6320. CB_COLOR6_BASE__BASE_256B__SHIFT
  6321. CB_COLOR6_CLEAR_WORD0
  6322. CB_COLOR6_CLEAR_WORD0__CLEAR_WORD0_MASK
  6323. CB_COLOR6_CLEAR_WORD0__CLEAR_WORD0__SHIFT
  6324. CB_COLOR6_CLEAR_WORD1
  6325. CB_COLOR6_CLEAR_WORD1__CLEAR_WORD1_MASK
  6326. CB_COLOR6_CLEAR_WORD1__CLEAR_WORD1__SHIFT
  6327. CB_COLOR6_CLEAR_WORD2
  6328. CB_COLOR6_CLEAR_WORD3
  6329. CB_COLOR6_CMASK
  6330. CB_COLOR6_CMASK_BASE_EXT__BASE_256B_MASK
  6331. CB_COLOR6_CMASK_BASE_EXT__BASE_256B__SHIFT
  6332. CB_COLOR6_CMASK_SLICE
  6333. CB_COLOR6_CMASK_SLICE__TILE_MAX_MASK
  6334. CB_COLOR6_CMASK_SLICE__TILE_MAX__SHIFT
  6335. CB_COLOR6_CMASK__BASE_256B_MASK
  6336. CB_COLOR6_CMASK__BASE_256B__SHIFT
  6337. CB_COLOR6_DCC_BASE_EXT__BASE_256B_MASK
  6338. CB_COLOR6_DCC_BASE_EXT__BASE_256B__SHIFT
  6339. CB_COLOR6_DCC_BASE__BASE_256B_MASK
  6340. CB_COLOR6_DCC_BASE__BASE_256B__SHIFT
  6341. CB_COLOR6_DCC_CONTROL__COLOR_TRANSFORM_MASK
  6342. CB_COLOR6_DCC_CONTROL__COLOR_TRANSFORM__SHIFT
  6343. CB_COLOR6_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  6344. CB_COLOR6_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  6345. CB_COLOR6_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE_MASK
  6346. CB_COLOR6_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE__SHIFT
  6347. CB_COLOR6_DCC_CONTROL__INDEPENDENT_128B_BLOCKS_MASK
  6348. CB_COLOR6_DCC_CONTROL__INDEPENDENT_128B_BLOCKS__SHIFT
  6349. CB_COLOR6_DCC_CONTROL__INDEPENDENT_64B_BLOCKS_MASK
  6350. CB_COLOR6_DCC_CONTROL__INDEPENDENT_64B_BLOCKS__SHIFT
  6351. CB_COLOR6_DCC_CONTROL__KEY_CLEAR_ENABLE_MASK
  6352. CB_COLOR6_DCC_CONTROL__KEY_CLEAR_ENABLE__SHIFT
  6353. CB_COLOR6_DCC_CONTROL__LOSSY_ALPHA_PRECISION_MASK
  6354. CB_COLOR6_DCC_CONTROL__LOSSY_ALPHA_PRECISION__SHIFT
  6355. CB_COLOR6_DCC_CONTROL__LOSSY_RGB_PRECISION_MASK
  6356. CB_COLOR6_DCC_CONTROL__LOSSY_RGB_PRECISION__SHIFT
  6357. CB_COLOR6_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE_MASK
  6358. CB_COLOR6_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE__SHIFT
  6359. CB_COLOR6_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE_MASK
  6360. CB_COLOR6_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE__SHIFT
  6361. CB_COLOR6_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE_MASK
  6362. CB_COLOR6_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE__SHIFT
  6363. CB_COLOR6_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  6364. CB_COLOR6_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  6365. CB_COLOR6_DIM
  6366. CB_COLOR6_FMASK
  6367. CB_COLOR6_FMASK_BASE_EXT__BASE_256B_MASK
  6368. CB_COLOR6_FMASK_BASE_EXT__BASE_256B__SHIFT
  6369. CB_COLOR6_FMASK_SLICE
  6370. CB_COLOR6_FMASK_SLICE__TILE_MAX_MASK
  6371. CB_COLOR6_FMASK_SLICE__TILE_MAX__SHIFT
  6372. CB_COLOR6_FMASK__BASE_256B_MASK
  6373. CB_COLOR6_FMASK__BASE_256B__SHIFT
  6374. CB_COLOR6_INFO
  6375. CB_COLOR6_INFO__ALT_TILE_MODE_MASK
  6376. CB_COLOR6_INFO__ALT_TILE_MODE__SHIFT
  6377. CB_COLOR6_INFO__BLEND_BYPASS_MASK
  6378. CB_COLOR6_INFO__BLEND_BYPASS__SHIFT
  6379. CB_COLOR6_INFO__BLEND_CLAMP_MASK
  6380. CB_COLOR6_INFO__BLEND_CLAMP__SHIFT
  6381. CB_COLOR6_INFO__BLEND_OPT_DISCARD_PIXEL_MASK
  6382. CB_COLOR6_INFO__BLEND_OPT_DISCARD_PIXEL__SHIFT
  6383. CB_COLOR6_INFO__BLEND_OPT_DONT_RD_DST_MASK
  6384. CB_COLOR6_INFO__BLEND_OPT_DONT_RD_DST__SHIFT
  6385. CB_COLOR6_INFO__CMASK_ADDR_TYPE_MASK
  6386. CB_COLOR6_INFO__CMASK_ADDR_TYPE__SHIFT
  6387. CB_COLOR6_INFO__CMASK_IS_LINEAR_MASK
  6388. CB_COLOR6_INFO__CMASK_IS_LINEAR__SHIFT
  6389. CB_COLOR6_INFO__COMPRESSION_MASK
  6390. CB_COLOR6_INFO__COMPRESSION__SHIFT
  6391. CB_COLOR6_INFO__COMP_SWAP_MASK
  6392. CB_COLOR6_INFO__COMP_SWAP__SHIFT
  6393. CB_COLOR6_INFO__DCC_ENABLE_MASK
  6394. CB_COLOR6_INFO__DCC_ENABLE__SHIFT
  6395. CB_COLOR6_INFO__ENDIAN_MASK
  6396. CB_COLOR6_INFO__ENDIAN__SHIFT
  6397. CB_COLOR6_INFO__FAST_CLEAR_MASK
  6398. CB_COLOR6_INFO__FAST_CLEAR__SHIFT
  6399. CB_COLOR6_INFO__FMASK_COMPRESSION_DISABLE_MASK
  6400. CB_COLOR6_INFO__FMASK_COMPRESSION_DISABLE__SHIFT
  6401. CB_COLOR6_INFO__FMASK_COMPRESS_1FRAG_ONLY_MASK
  6402. CB_COLOR6_INFO__FMASK_COMPRESS_1FRAG_ONLY__SHIFT
  6403. CB_COLOR6_INFO__FORMAT_MASK
  6404. CB_COLOR6_INFO__FORMAT__SHIFT
  6405. CB_COLOR6_INFO__LINEAR_GENERAL_MASK
  6406. CB_COLOR6_INFO__LINEAR_GENERAL__SHIFT
  6407. CB_COLOR6_INFO__NUMBER_TYPE_MASK
  6408. CB_COLOR6_INFO__NUMBER_TYPE__SHIFT
  6409. CB_COLOR6_INFO__ROUND_MODE_MASK
  6410. CB_COLOR6_INFO__ROUND_MODE__SHIFT
  6411. CB_COLOR6_INFO__SIMPLE_FLOAT_MASK
  6412. CB_COLOR6_INFO__SIMPLE_FLOAT__SHIFT
  6413. CB_COLOR6_PITCH
  6414. CB_COLOR6_PITCH__FMASK_TILE_MAX_MASK
  6415. CB_COLOR6_PITCH__FMASK_TILE_MAX__SHIFT
  6416. CB_COLOR6_PITCH__TILE_MAX_MASK
  6417. CB_COLOR6_PITCH__TILE_MAX__SHIFT
  6418. CB_COLOR6_SLICE
  6419. CB_COLOR6_SLICE__TILE_MAX_MASK
  6420. CB_COLOR6_SLICE__TILE_MAX__SHIFT
  6421. CB_COLOR6_VIEW
  6422. CB_COLOR6_VIEW__MIP_LEVEL_MASK
  6423. CB_COLOR6_VIEW__MIP_LEVEL__SHIFT
  6424. CB_COLOR6_VIEW__SLICE_MAX_MASK
  6425. CB_COLOR6_VIEW__SLICE_MAX__SHIFT
  6426. CB_COLOR6_VIEW__SLICE_START_MASK
  6427. CB_COLOR6_VIEW__SLICE_START__SHIFT
  6428. CB_COLOR7_ATTRIB
  6429. CB_COLOR7_ATTRIB2__MAX_MIP_MASK
  6430. CB_COLOR7_ATTRIB2__MAX_MIP__SHIFT
  6431. CB_COLOR7_ATTRIB2__MIP0_HEIGHT_MASK
  6432. CB_COLOR7_ATTRIB2__MIP0_HEIGHT__SHIFT
  6433. CB_COLOR7_ATTRIB2__MIP0_WIDTH_MASK
  6434. CB_COLOR7_ATTRIB2__MIP0_WIDTH__SHIFT
  6435. CB_COLOR7_ATTRIB3__CMASK_PIPE_ALIGNED_MASK
  6436. CB_COLOR7_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT
  6437. CB_COLOR7_ATTRIB3__COLOR_SW_MODE_MASK
  6438. CB_COLOR7_ATTRIB3__COLOR_SW_MODE__SHIFT
  6439. CB_COLOR7_ATTRIB3__DCC_PIPE_ALIGNED_MASK
  6440. CB_COLOR7_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT
  6441. CB_COLOR7_ATTRIB3__FMASK_SW_MODE_MASK
  6442. CB_COLOR7_ATTRIB3__FMASK_SW_MODE__SHIFT
  6443. CB_COLOR7_ATTRIB3__META_LINEAR_MASK
  6444. CB_COLOR7_ATTRIB3__META_LINEAR__SHIFT
  6445. CB_COLOR7_ATTRIB3__MIP0_DEPTH_MASK
  6446. CB_COLOR7_ATTRIB3__MIP0_DEPTH__SHIFT
  6447. CB_COLOR7_ATTRIB3__RESOURCE_LEVEL_MASK
  6448. CB_COLOR7_ATTRIB3__RESOURCE_LEVEL__SHIFT
  6449. CB_COLOR7_ATTRIB3__RESOURCE_TYPE_MASK
  6450. CB_COLOR7_ATTRIB3__RESOURCE_TYPE__SHIFT
  6451. CB_COLOR7_ATTRIB__COLOR_SW_MODE_MASK
  6452. CB_COLOR7_ATTRIB__COLOR_SW_MODE__SHIFT
  6453. CB_COLOR7_ATTRIB__DISABLE_FMASK_NOFETCH_OPT_MASK
  6454. CB_COLOR7_ATTRIB__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  6455. CB_COLOR7_ATTRIB__FMASK_BANK_HEIGHT_MASK
  6456. CB_COLOR7_ATTRIB__FMASK_BANK_HEIGHT__SHIFT
  6457. CB_COLOR7_ATTRIB__FMASK_SW_MODE_MASK
  6458. CB_COLOR7_ATTRIB__FMASK_SW_MODE__SHIFT
  6459. CB_COLOR7_ATTRIB__FMASK_TILE_MODE_INDEX_MASK
  6460. CB_COLOR7_ATTRIB__FMASK_TILE_MODE_INDEX__SHIFT
  6461. CB_COLOR7_ATTRIB__FORCE_DST_ALPHA_1_MASK
  6462. CB_COLOR7_ATTRIB__FORCE_DST_ALPHA_1__SHIFT
  6463. CB_COLOR7_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX_MASK
  6464. CB_COLOR7_ATTRIB__LIMIT_COLOR_FETCH_TO_256B_MAX__SHIFT
  6465. CB_COLOR7_ATTRIB__META_LINEAR_MASK
  6466. CB_COLOR7_ATTRIB__META_LINEAR__SHIFT
  6467. CB_COLOR7_ATTRIB__MIP0_DEPTH_MASK
  6468. CB_COLOR7_ATTRIB__MIP0_DEPTH__SHIFT
  6469. CB_COLOR7_ATTRIB__NUM_FRAGMENTS_MASK
  6470. CB_COLOR7_ATTRIB__NUM_FRAGMENTS__SHIFT
  6471. CB_COLOR7_ATTRIB__NUM_SAMPLES_MASK
  6472. CB_COLOR7_ATTRIB__NUM_SAMPLES__SHIFT
  6473. CB_COLOR7_ATTRIB__PIPE_ALIGNED_MASK
  6474. CB_COLOR7_ATTRIB__PIPE_ALIGNED__SHIFT
  6475. CB_COLOR7_ATTRIB__RB_ALIGNED_MASK
  6476. CB_COLOR7_ATTRIB__RB_ALIGNED__SHIFT
  6477. CB_COLOR7_ATTRIB__RESOURCE_TYPE_MASK
  6478. CB_COLOR7_ATTRIB__RESOURCE_TYPE__SHIFT
  6479. CB_COLOR7_ATTRIB__TILE_MODE_INDEX_MASK
  6480. CB_COLOR7_ATTRIB__TILE_MODE_INDEX__SHIFT
  6481. CB_COLOR7_BASE
  6482. CB_COLOR7_BASE_EXT__BASE_256B_MASK
  6483. CB_COLOR7_BASE_EXT__BASE_256B__SHIFT
  6484. CB_COLOR7_BASE__BASE_256B_MASK
  6485. CB_COLOR7_BASE__BASE_256B__SHIFT
  6486. CB_COLOR7_CLEAR_WORD0
  6487. CB_COLOR7_CLEAR_WORD0__CLEAR_WORD0_MASK
  6488. CB_COLOR7_CLEAR_WORD0__CLEAR_WORD0__SHIFT
  6489. CB_COLOR7_CLEAR_WORD1
  6490. CB_COLOR7_CLEAR_WORD1__CLEAR_WORD1_MASK
  6491. CB_COLOR7_CLEAR_WORD1__CLEAR_WORD1__SHIFT
  6492. CB_COLOR7_CLEAR_WORD2
  6493. CB_COLOR7_CLEAR_WORD3
  6494. CB_COLOR7_CMASK
  6495. CB_COLOR7_CMASK_BASE_EXT__BASE_256B_MASK
  6496. CB_COLOR7_CMASK_BASE_EXT__BASE_256B__SHIFT
  6497. CB_COLOR7_CMASK_SLICE
  6498. CB_COLOR7_CMASK_SLICE__TILE_MAX_MASK
  6499. CB_COLOR7_CMASK_SLICE__TILE_MAX__SHIFT
  6500. CB_COLOR7_CMASK__BASE_256B_MASK
  6501. CB_COLOR7_CMASK__BASE_256B__SHIFT
  6502. CB_COLOR7_DCC_BASE_EXT__BASE_256B_MASK
  6503. CB_COLOR7_DCC_BASE_EXT__BASE_256B__SHIFT
  6504. CB_COLOR7_DCC_BASE__BASE_256B_MASK
  6505. CB_COLOR7_DCC_BASE__BASE_256B__SHIFT
  6506. CB_COLOR7_DCC_CONTROL__COLOR_TRANSFORM_MASK
  6507. CB_COLOR7_DCC_CONTROL__COLOR_TRANSFORM__SHIFT
  6508. CB_COLOR7_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  6509. CB_COLOR7_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  6510. CB_COLOR7_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE_MASK
  6511. CB_COLOR7_DCC_CONTROL__ENABLE_CONSTANT_ENCODE_REG_WRITE__SHIFT
  6512. CB_COLOR7_DCC_CONTROL__INDEPENDENT_128B_BLOCKS_MASK
  6513. CB_COLOR7_DCC_CONTROL__INDEPENDENT_128B_BLOCKS__SHIFT
  6514. CB_COLOR7_DCC_CONTROL__INDEPENDENT_64B_BLOCKS_MASK
  6515. CB_COLOR7_DCC_CONTROL__INDEPENDENT_64B_BLOCKS__SHIFT
  6516. CB_COLOR7_DCC_CONTROL__KEY_CLEAR_ENABLE_MASK
  6517. CB_COLOR7_DCC_CONTROL__KEY_CLEAR_ENABLE__SHIFT
  6518. CB_COLOR7_DCC_CONTROL__LOSSY_ALPHA_PRECISION_MASK
  6519. CB_COLOR7_DCC_CONTROL__LOSSY_ALPHA_PRECISION__SHIFT
  6520. CB_COLOR7_DCC_CONTROL__LOSSY_RGB_PRECISION_MASK
  6521. CB_COLOR7_DCC_CONTROL__LOSSY_RGB_PRECISION__SHIFT
  6522. CB_COLOR7_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE_MASK
  6523. CB_COLOR7_DCC_CONTROL__MAX_COMPRESSED_BLOCK_SIZE__SHIFT
  6524. CB_COLOR7_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE_MASK
  6525. CB_COLOR7_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE__SHIFT
  6526. CB_COLOR7_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE_MASK
  6527. CB_COLOR7_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE__SHIFT
  6528. CB_COLOR7_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  6529. CB_COLOR7_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  6530. CB_COLOR7_DIM
  6531. CB_COLOR7_FMASK
  6532. CB_COLOR7_FMASK_BASE_EXT__BASE_256B_MASK
  6533. CB_COLOR7_FMASK_BASE_EXT__BASE_256B__SHIFT
  6534. CB_COLOR7_FMASK_SLICE
  6535. CB_COLOR7_FMASK_SLICE__TILE_MAX_MASK
  6536. CB_COLOR7_FMASK_SLICE__TILE_MAX__SHIFT
  6537. CB_COLOR7_FMASK__BASE_256B_MASK
  6538. CB_COLOR7_FMASK__BASE_256B__SHIFT
  6539. CB_COLOR7_FRAG
  6540. CB_COLOR7_INFO
  6541. CB_COLOR7_INFO__ALT_TILE_MODE_MASK
  6542. CB_COLOR7_INFO__ALT_TILE_MODE__SHIFT
  6543. CB_COLOR7_INFO__BLEND_BYPASS_MASK
  6544. CB_COLOR7_INFO__BLEND_BYPASS__SHIFT
  6545. CB_COLOR7_INFO__BLEND_CLAMP_MASK
  6546. CB_COLOR7_INFO__BLEND_CLAMP__SHIFT
  6547. CB_COLOR7_INFO__BLEND_OPT_DISCARD_PIXEL_MASK
  6548. CB_COLOR7_INFO__BLEND_OPT_DISCARD_PIXEL__SHIFT
  6549. CB_COLOR7_INFO__BLEND_OPT_DONT_RD_DST_MASK
  6550. CB_COLOR7_INFO__BLEND_OPT_DONT_RD_DST__SHIFT
  6551. CB_COLOR7_INFO__CMASK_ADDR_TYPE_MASK
  6552. CB_COLOR7_INFO__CMASK_ADDR_TYPE__SHIFT
  6553. CB_COLOR7_INFO__CMASK_IS_LINEAR_MASK
  6554. CB_COLOR7_INFO__CMASK_IS_LINEAR__SHIFT
  6555. CB_COLOR7_INFO__COMPRESSION_MASK
  6556. CB_COLOR7_INFO__COMPRESSION__SHIFT
  6557. CB_COLOR7_INFO__COMP_SWAP_MASK
  6558. CB_COLOR7_INFO__COMP_SWAP__SHIFT
  6559. CB_COLOR7_INFO__DCC_ENABLE_MASK
  6560. CB_COLOR7_INFO__DCC_ENABLE__SHIFT
  6561. CB_COLOR7_INFO__ENDIAN_MASK
  6562. CB_COLOR7_INFO__ENDIAN__SHIFT
  6563. CB_COLOR7_INFO__FAST_CLEAR_MASK
  6564. CB_COLOR7_INFO__FAST_CLEAR__SHIFT
  6565. CB_COLOR7_INFO__FMASK_COMPRESSION_DISABLE_MASK
  6566. CB_COLOR7_INFO__FMASK_COMPRESSION_DISABLE__SHIFT
  6567. CB_COLOR7_INFO__FMASK_COMPRESS_1FRAG_ONLY_MASK
  6568. CB_COLOR7_INFO__FMASK_COMPRESS_1FRAG_ONLY__SHIFT
  6569. CB_COLOR7_INFO__FORMAT_MASK
  6570. CB_COLOR7_INFO__FORMAT__SHIFT
  6571. CB_COLOR7_INFO__LINEAR_GENERAL_MASK
  6572. CB_COLOR7_INFO__LINEAR_GENERAL__SHIFT
  6573. CB_COLOR7_INFO__NUMBER_TYPE_MASK
  6574. CB_COLOR7_INFO__NUMBER_TYPE__SHIFT
  6575. CB_COLOR7_INFO__ROUND_MODE_MASK
  6576. CB_COLOR7_INFO__ROUND_MODE__SHIFT
  6577. CB_COLOR7_INFO__SIMPLE_FLOAT_MASK
  6578. CB_COLOR7_INFO__SIMPLE_FLOAT__SHIFT
  6579. CB_COLOR7_PITCH
  6580. CB_COLOR7_PITCH__FMASK_TILE_MAX_MASK
  6581. CB_COLOR7_PITCH__FMASK_TILE_MAX__SHIFT
  6582. CB_COLOR7_PITCH__TILE_MAX_MASK
  6583. CB_COLOR7_PITCH__TILE_MAX__SHIFT
  6584. CB_COLOR7_SLICE
  6585. CB_COLOR7_SLICE__TILE_MAX_MASK
  6586. CB_COLOR7_SLICE__TILE_MAX__SHIFT
  6587. CB_COLOR7_VIEW
  6588. CB_COLOR7_VIEW__MIP_LEVEL_MASK
  6589. CB_COLOR7_VIEW__MIP_LEVEL__SHIFT
  6590. CB_COLOR7_VIEW__SLICE_MAX_MASK
  6591. CB_COLOR7_VIEW__SLICE_MAX__SHIFT
  6592. CB_COLOR7_VIEW__SLICE_START_MASK
  6593. CB_COLOR7_VIEW__SLICE_START__SHIFT
  6594. CB_COLOR8_ATTRIB
  6595. CB_COLOR8_BASE
  6596. CB_COLOR8_DIM
  6597. CB_COLOR8_INFO
  6598. CB_COLOR8_PITCH
  6599. CB_COLOR8_SLICE
  6600. CB_COLOR8_VIEW
  6601. CB_COLOR9_ATTRIB
  6602. CB_COLOR9_BASE
  6603. CB_COLOR9_DIM
  6604. CB_COLOR9_INFO
  6605. CB_COLOR9_PITCH
  6606. CB_COLOR9_SLICE
  6607. CB_COLOR9_VIEW
  6608. CB_COLOR_CONTROL__DEGAMMA_ENABLE_MASK
  6609. CB_COLOR_CONTROL__DEGAMMA_ENABLE__SHIFT
  6610. CB_COLOR_CONTROL__DISABLE_DUAL_QUAD_MASK
  6611. CB_COLOR_CONTROL__DISABLE_DUAL_QUAD__SHIFT
  6612. CB_COLOR_CONTROL__MODE_MASK
  6613. CB_COLOR_CONTROL__MODE__SHIFT
  6614. CB_COLOR_CONTROL__ROP3_MASK
  6615. CB_COLOR_CONTROL__ROP3__SHIFT
  6616. CB_COMPOUND
  6617. CB_COVERAGE_OUT_CONTROL__COVERAGE_OUT_CHANNEL_MASK
  6618. CB_COVERAGE_OUT_CONTROL__COVERAGE_OUT_CHANNEL__SHIFT
  6619. CB_COVERAGE_OUT_CONTROL__COVERAGE_OUT_ENABLE_MASK
  6620. CB_COVERAGE_OUT_CONTROL__COVERAGE_OUT_ENABLE__SHIFT
  6621. CB_COVERAGE_OUT_CONTROL__COVERAGE_OUT_MRT_MASK
  6622. CB_COVERAGE_OUT_CONTROL__COVERAGE_OUT_MRT__SHIFT
  6623. CB_COVERAGE_OUT_CONTROL__COVERAGE_OUT_SAMPLES_MASK
  6624. CB_COVERAGE_OUT_CONTROL__COVERAGE_OUT_SAMPLES__SHIFT
  6625. CB_CSTSEVENT
  6626. CB_CSTSMASK
  6627. CB_CVSTEST
  6628. CB_DATALOST
  6629. CB_DCC_CONFIG__DCC_CACHE_EVICT_POINT_MASK
  6630. CB_DCC_CONFIG__DCC_CACHE_EVICT_POINT__SHIFT
  6631. CB_DCC_CONFIG__DCC_CACHE_NUM_TAGS_MASK
  6632. CB_DCC_CONFIG__DCC_CACHE_NUM_TAGS__SHIFT
  6633. CB_DCC_CONFIG__DISABLE_CONSTANT_ENCODE_MASK
  6634. CB_DCC_CONFIG__DISABLE_CONSTANT_ENCODE__SHIFT
  6635. CB_DCC_CONFIG__FC_RDLAT_KEYID_FIFO_DEPTH_MASK
  6636. CB_DCC_CONFIG__FC_RDLAT_KEYID_FIFO_DEPTH__SHIFT
  6637. CB_DCC_CONFIG__OVERWRITE_COMBINER_CC_POP_DISABLE_MASK
  6638. CB_DCC_CONFIG__OVERWRITE_COMBINER_CC_POP_DISABLE__SHIFT
  6639. CB_DCC_CONFIG__OVERWRITE_COMBINER_DEPTH_MASK
  6640. CB_DCC_CONFIG__OVERWRITE_COMBINER_DEPTH__SHIFT
  6641. CB_DCC_CONFIG__OVERWRITE_COMBINER_DISABLE_MASK
  6642. CB_DCC_CONFIG__OVERWRITE_COMBINER_DISABLE__SHIFT
  6643. CB_DCC_CONFIG__READ_RETURN_SKID_FIFO_DEPTH_MASK
  6644. CB_DCC_CONFIG__READ_RETURN_SKID_FIFO_DEPTH__SHIFT
  6645. CB_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_AC01_MASK
  6646. CB_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_AC01__SHIFT
  6647. CB_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG_MASK
  6648. CB_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_REG__SHIFT
  6649. CB_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_SINGLE_MASK
  6650. CB_DCC_CONTROL__DISABLE_CONSTANT_ENCODE_SINGLE__SHIFT
  6651. CB_DCC_CONTROL__DISABLE_ELIMFC_SKIP_OF_AC01_MASK
  6652. CB_DCC_CONTROL__DISABLE_ELIMFC_SKIP_OF_AC01__SHIFT
  6653. CB_DCC_CONTROL__DISABLE_ELIMFC_SKIP_OF_SINGLE_MASK
  6654. CB_DCC_CONTROL__DISABLE_ELIMFC_SKIP_OF_SINGLE__SHIFT
  6655. CB_DCC_CONTROL__ENABLE_ELIMFC_SKIP_OF_REG_MASK
  6656. CB_DCC_CONTROL__ENABLE_ELIMFC_SKIP_OF_REG__SHIFT
  6657. CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK
  6658. CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT
  6659. CB_DCC_CONTROL__OVERWRITE_COMBINER_MRT_SHARING_DISABLE_MASK
  6660. CB_DCC_CONTROL__OVERWRITE_COMBINER_MRT_SHARING_DISABLE__SHIFT
  6661. CB_DCC_CONTROL__OVERWRITE_COMBINER_WATERMARK_MASK
  6662. CB_DCC_CONTROL__OVERWRITE_COMBINER_WATERMARK__SHIFT
  6663. CB_DCC_DECOMPRESS
  6664. CB_DDA_CALDAC_COURSE_GAIN
  6665. CB_DDA_CALDAC_COURSE_OFFSET
  6666. CB_DDA_CALDAC_FINE_GAIN
  6667. CB_DDA_CALDAC_FINE_OFFSET
  6668. CB_DDA_DA_CTRL_DAC
  6669. CB_DDA_DA_CTRL_EN
  6670. CB_DDA_DA_CTRL_RANGE10V
  6671. CB_DDA_DA_CTRL_RANGE2V5
  6672. CB_DDA_DA_CTRL_RANGE5V
  6673. CB_DDA_DA_CTRL_REG
  6674. CB_DDA_DA_CTRL_SU
  6675. CB_DDA_DA_CTRL_UNIP
  6676. CB_DDA_DA_DATA_REG
  6677. CB_DDA_DIO0_8255_BASE
  6678. CB_DDA_DIO1_8255_BASE
  6679. CB_DEBUG_BUS_10__CMASK_READ_DATA_0XC_MASK
  6680. CB_DEBUG_BUS_10__CMASK_READ_DATA_0XC__SHIFT
  6681. CB_DEBUG_BUS_10__CMASK_READ_DATA_0XD_MASK
  6682. CB_DEBUG_BUS_10__CMASK_READ_DATA_0XD__SHIFT
  6683. CB_DEBUG_BUS_10__CMASK_READ_DATA_0XE_MASK
  6684. CB_DEBUG_BUS_10__CMASK_READ_DATA_0XE__SHIFT
  6685. CB_DEBUG_BUS_10__CMASK_READ_DATA_0XF_MASK
  6686. CB_DEBUG_BUS_10__CMASK_READ_DATA_0XF__SHIFT
  6687. CB_DEBUG_BUS_10__CMASK_WRITE_DATA_0XC_MASK
  6688. CB_DEBUG_BUS_10__CMASK_WRITE_DATA_0XC__SHIFT
  6689. CB_DEBUG_BUS_10__CMASK_WRITE_DATA_0XD_MASK
  6690. CB_DEBUG_BUS_10__CMASK_WRITE_DATA_0XD__SHIFT
  6691. CB_DEBUG_BUS_10__CMASK_WRITE_DATA_0XE_MASK
  6692. CB_DEBUG_BUS_10__CMASK_WRITE_DATA_0XE__SHIFT
  6693. CB_DEBUG_BUS_10__CMASK_WRITE_DATA_0XF_MASK
  6694. CB_DEBUG_BUS_10__CMASK_WRITE_DATA_0XF__SHIFT
  6695. CB_DEBUG_BUS_10__CORE_SCLK_VLD_MASK
  6696. CB_DEBUG_BUS_10__CORE_SCLK_VLD__SHIFT
  6697. CB_DEBUG_BUS_10__EVENT_CACHE_FLUSH_AND_INV_EVENT_MASK
  6698. CB_DEBUG_BUS_10__EVENT_CACHE_FLUSH_AND_INV_EVENT__SHIFT
  6699. CB_DEBUG_BUS_10__EVENT_CACHE_FLUSH_AND_INV_TS_EVENT_MASK
  6700. CB_DEBUG_BUS_10__EVENT_CACHE_FLUSH_AND_INV_TS_EVENT__SHIFT
  6701. CB_DEBUG_BUS_10__EVENT_CACHE_FLUSH_MASK
  6702. CB_DEBUG_BUS_10__EVENT_CACHE_FLUSH__SHIFT
  6703. CB_DEBUG_BUS_10__EVENT_FLUSH_AND_INV_CB_DATA_TS_MASK
  6704. CB_DEBUG_BUS_10__EVENT_FLUSH_AND_INV_CB_DATA_TS__SHIFT
  6705. CB_DEBUG_BUS_10__EVENT_FLUSH_AND_INV_CB_META_MASK
  6706. CB_DEBUG_BUS_10__EVENT_FLUSH_AND_INV_CB_META__SHIFT
  6707. CB_DEBUG_BUS_10__FC_QUAD_RDLAT_FIFO_FULL_MASK
  6708. CB_DEBUG_BUS_10__FC_QUAD_RDLAT_FIFO_FULL__SHIFT
  6709. CB_DEBUG_BUS_10__FC_TILE_RDLAT_FIFO_FULL_MASK
  6710. CB_DEBUG_BUS_10__FC_TILE_RDLAT_FIFO_FULL__SHIFT
  6711. CB_DEBUG_BUS_10__FOP_QUAD_HAS_1_FRAGMENT_BEFORE_UPDATE_MASK
  6712. CB_DEBUG_BUS_10__FOP_QUAD_HAS_1_FRAGMENT_BEFORE_UPDATE__SHIFT
  6713. CB_DEBUG_BUS_10__FOP_QUAD_HAS_2_FRAGMENTS_BEFORE_UPDATE_MASK
  6714. CB_DEBUG_BUS_10__FOP_QUAD_HAS_2_FRAGMENTS_BEFORE_UPDATE__SHIFT
  6715. CB_DEBUG_BUS_10__FOP_QUAD_HAS_3_FRAGMENTS_BEFORE_UPDATE_MASK
  6716. CB_DEBUG_BUS_10__FOP_QUAD_HAS_3_FRAGMENTS_BEFORE_UPDATE__SHIFT
  6717. CB_DEBUG_BUS_10__FOP_QUAD_HAS_4_FRAGMENTS_BEFORE_UPDATE_MASK
  6718. CB_DEBUG_BUS_10__FOP_QUAD_HAS_4_FRAGMENTS_BEFORE_UPDATE__SHIFT
  6719. CB_DEBUG_BUS_10__MERGE_TILE_ONLY_VALID_READYB_MASK
  6720. CB_DEBUG_BUS_10__MERGE_TILE_ONLY_VALID_READYB__SHIFT
  6721. CB_DEBUG_BUS_10__MERGE_TILE_ONLY_VALID_READY_MASK
  6722. CB_DEBUG_BUS_10__MERGE_TILE_ONLY_VALID_READY__SHIFT
  6723. CB_DEBUG_BUS_10__REG_SCLK0_VLD_MASK
  6724. CB_DEBUG_BUS_10__REG_SCLK0_VLD__SHIFT
  6725. CB_DEBUG_BUS_10__REG_SCLK1_VLD_MASK
  6726. CB_DEBUG_BUS_10__REG_SCLK1_VLD__SHIFT
  6727. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_1_FRAGMENT_MASK
  6728. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_1_FRAGMENT__SHIFT
  6729. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_2_FRAGMENTS_MASK
  6730. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_2_FRAGMENTS__SHIFT
  6731. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_3_FRAGMENTS_MASK
  6732. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_3_FRAGMENTS__SHIFT
  6733. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_4_FRAGMENTS_MASK
  6734. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_4_FRAGMENTS__SHIFT
  6735. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_5_FRAGMENTS_MASK
  6736. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_5_FRAGMENTS__SHIFT
  6737. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_6_FRAGMENTS_MASK
  6738. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_6_FRAGMENTS__SHIFT
  6739. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_7_FRAGMENTS_MASK
  6740. CB_DEBUG_BUS_11__FOP_QUAD_ADDED_7_FRAGMENTS__SHIFT
  6741. CB_DEBUG_BUS_11__FOP_QUAD_HAS_1_FRAGMENT_AFTER_UPDATE_MASK
  6742. CB_DEBUG_BUS_11__FOP_QUAD_HAS_1_FRAGMENT_AFTER_UPDATE__SHIFT
  6743. CB_DEBUG_BUS_11__FOP_QUAD_HAS_2_FRAGMENTS_AFTER_UPDATE_MASK
  6744. CB_DEBUG_BUS_11__FOP_QUAD_HAS_2_FRAGMENTS_AFTER_UPDATE__SHIFT
  6745. CB_DEBUG_BUS_11__FOP_QUAD_HAS_3_FRAGMENTS_AFTER_UPDATE_MASK
  6746. CB_DEBUG_BUS_11__FOP_QUAD_HAS_3_FRAGMENTS_AFTER_UPDATE__SHIFT
  6747. CB_DEBUG_BUS_11__FOP_QUAD_HAS_4_FRAGMENTS_AFTER_UPDATE_MASK
  6748. CB_DEBUG_BUS_11__FOP_QUAD_HAS_4_FRAGMENTS_AFTER_UPDATE__SHIFT
  6749. CB_DEBUG_BUS_11__FOP_QUAD_HAS_5_FRAGMENTS_AFTER_UPDATE_MASK
  6750. CB_DEBUG_BUS_11__FOP_QUAD_HAS_5_FRAGMENTS_AFTER_UPDATE__SHIFT
  6751. CB_DEBUG_BUS_11__FOP_QUAD_HAS_5_FRAGMENTS_BEFORE_UPDATE_MASK
  6752. CB_DEBUG_BUS_11__FOP_QUAD_HAS_5_FRAGMENTS_BEFORE_UPDATE__SHIFT
  6753. CB_DEBUG_BUS_11__FOP_QUAD_HAS_6_FRAGMENTS_AFTER_UPDATE_MASK
  6754. CB_DEBUG_BUS_11__FOP_QUAD_HAS_6_FRAGMENTS_AFTER_UPDATE__SHIFT
  6755. CB_DEBUG_BUS_11__FOP_QUAD_HAS_6_FRAGMENTS_BEFORE_UPDATE_MASK
  6756. CB_DEBUG_BUS_11__FOP_QUAD_HAS_6_FRAGMENTS_BEFORE_UPDATE__SHIFT
  6757. CB_DEBUG_BUS_11__FOP_QUAD_HAS_7_FRAGMENTS_AFTER_UPDATE_MASK
  6758. CB_DEBUG_BUS_11__FOP_QUAD_HAS_7_FRAGMENTS_AFTER_UPDATE__SHIFT
  6759. CB_DEBUG_BUS_11__FOP_QUAD_HAS_7_FRAGMENTS_BEFORE_UPDATE_MASK
  6760. CB_DEBUG_BUS_11__FOP_QUAD_HAS_7_FRAGMENTS_BEFORE_UPDATE__SHIFT
  6761. CB_DEBUG_BUS_11__FOP_QUAD_HAS_8_FRAGMENTS_AFTER_UPDATE_MASK
  6762. CB_DEBUG_BUS_11__FOP_QUAD_HAS_8_FRAGMENTS_AFTER_UPDATE__SHIFT
  6763. CB_DEBUG_BUS_11__FOP_QUAD_HAS_8_FRAGMENTS_BEFORE_UPDATE_MASK
  6764. CB_DEBUG_BUS_11__FOP_QUAD_HAS_8_FRAGMENTS_BEFORE_UPDATE__SHIFT
  6765. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_1_FRAGMENT_MASK
  6766. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_1_FRAGMENT__SHIFT
  6767. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_2_FRAGMENTS_MASK
  6768. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_2_FRAGMENTS__SHIFT
  6769. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_3_FRAGMENTS_MASK
  6770. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_3_FRAGMENTS__SHIFT
  6771. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_4_FRAGMENTS_MASK
  6772. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_4_FRAGMENTS__SHIFT
  6773. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_5_FRAGMENTS_MASK
  6774. CB_DEBUG_BUS_11__FOP_QUAD_REMOVED_5_FRAGMENTS__SHIFT
  6775. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_0_MASK
  6776. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_0__SHIFT
  6777. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_1_MASK
  6778. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_1__SHIFT
  6779. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_2_MASK
  6780. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_2__SHIFT
  6781. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_3_MASK
  6782. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_3__SHIFT
  6783. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_4_MASK
  6784. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_4__SHIFT
  6785. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_5_MASK
  6786. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_5__SHIFT
  6787. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_6_MASK
  6788. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_6__SHIFT
  6789. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_7_MASK
  6790. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_READS_FRAGMENT_7__SHIFT
  6791. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_0_MASK
  6792. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_0__SHIFT
  6793. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_1_MASK
  6794. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_1__SHIFT
  6795. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_2_MASK
  6796. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_2__SHIFT
  6797. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_3_MASK
  6798. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_3__SHIFT
  6799. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_4_MASK
  6800. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_4__SHIFT
  6801. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_5_MASK
  6802. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_5__SHIFT
  6803. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_6_MASK
  6804. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_6__SHIFT
  6805. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_7_MASK
  6806. CB_DEBUG_BUS_12__FC_CC_QUADFRAG_WRITES_FRAGMENT_7__SHIFT
  6807. CB_DEBUG_BUS_12__FC_QUAD_BLEND_OPT_BLEND_BYPASS_MASK
  6808. CB_DEBUG_BUS_12__FC_QUAD_BLEND_OPT_BLEND_BYPASS__SHIFT
  6809. CB_DEBUG_BUS_12__FC_QUAD_BLEND_OPT_DISCARD_PIXELS_MASK
  6810. CB_DEBUG_BUS_12__FC_QUAD_BLEND_OPT_DISCARD_PIXELS__SHIFT
  6811. CB_DEBUG_BUS_12__FC_QUAD_BLEND_OPT_DONT_READ_DST_MASK
  6812. CB_DEBUG_BUS_12__FC_QUAD_BLEND_OPT_DONT_READ_DST__SHIFT
  6813. CB_DEBUG_BUS_12__FC_QUAD_KILLED_BY_COLOR_INVALID_MASK
  6814. CB_DEBUG_BUS_12__FC_QUAD_KILLED_BY_COLOR_INVALID__SHIFT
  6815. CB_DEBUG_BUS_12__FC_QUAD_KILLED_BY_EXTRA_PIXEL_EXPORT_MASK
  6816. CB_DEBUG_BUS_12__FC_QUAD_KILLED_BY_EXTRA_PIXEL_EXPORT__SHIFT
  6817. CB_DEBUG_BUS_12__FC_QUAD_KILLED_BY_NULL_TARGET_SHADER_MASK_MASK
  6818. CB_DEBUG_BUS_12__FC_QUAD_KILLED_BY_NULL_TARGET_SHADER_MASK__SHIFT
  6819. CB_DEBUG_BUS_12__FOP_QUAD_REMOVED_6_FRAGMENTS_MASK
  6820. CB_DEBUG_BUS_12__FOP_QUAD_REMOVED_6_FRAGMENTS__SHIFT
  6821. CB_DEBUG_BUS_12__FOP_QUAD_REMOVED_7_FRAGMENTS_MASK
  6822. CB_DEBUG_BUS_12__FOP_QUAD_REMOVED_7_FRAGMENTS__SHIFT
  6823. CB_DEBUG_BUS_13__AC_BUSY_MASK
  6824. CB_DEBUG_BUS_13__AC_BUSY__SHIFT
  6825. CB_DEBUG_BUS_13__CACHE_CTRL_BUSY_MASK
  6826. CB_DEBUG_BUS_13__CACHE_CTRL_BUSY__SHIFT
  6827. CB_DEBUG_BUS_13__CRW_BUSY_MASK
  6828. CB_DEBUG_BUS_13__CRW_BUSY__SHIFT
  6829. CB_DEBUG_BUS_13__EVICT_PENDING_MASK
  6830. CB_DEBUG_BUS_13__EVICT_PENDING__SHIFT
  6831. CB_DEBUG_BUS_13__FC_DOC_CLINE_CAM_HIT_MASK
  6832. CB_DEBUG_BUS_13__FC_DOC_CLINE_CAM_HIT__SHIFT
  6833. CB_DEBUG_BUS_13__FC_DOC_CLINE_CAM_MISS_MASK
  6834. CB_DEBUG_BUS_13__FC_DOC_CLINE_CAM_MISS__SHIFT
  6835. CB_DEBUG_BUS_13__FC_DOC_OVERWROTE_1_SECTOR_MASK
  6836. CB_DEBUG_BUS_13__FC_DOC_OVERWROTE_1_SECTOR__SHIFT
  6837. CB_DEBUG_BUS_13__FC_DOC_OVERWROTE_2_SECTORS_MASK
  6838. CB_DEBUG_BUS_13__FC_DOC_OVERWROTE_2_SECTORS__SHIFT
  6839. CB_DEBUG_BUS_13__FC_DOC_OVERWROTE_3_SECTORS_MASK
  6840. CB_DEBUG_BUS_13__FC_DOC_OVERWROTE_3_SECTORS__SHIFT
  6841. CB_DEBUG_BUS_13__FC_DOC_OVERWROTE_4_SECTORS_MASK
  6842. CB_DEBUG_BUS_13__FC_DOC_OVERWROTE_4_SECTORS__SHIFT
  6843. CB_DEBUG_BUS_13__FC_DOC_QTILE_CAM_HIT_MASK
  6844. CB_DEBUG_BUS_13__FC_DOC_QTILE_CAM_HIT__SHIFT
  6845. CB_DEBUG_BUS_13__FC_DOC_QTILE_CAM_MISS_MASK
  6846. CB_DEBUG_BUS_13__FC_DOC_QTILE_CAM_MISS__SHIFT
  6847. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_ACK_OUTPUT_STALL_MASK
  6848. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_ACK_OUTPUT_STALL__SHIFT
  6849. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_DIRTY_SECTORS_FLUSHED_MASK
  6850. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_DIRTY_SECTORS_FLUSHED__SHIFT
  6851. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_EVICT_NONZERO_INFLIGHT_STALL_MASK
  6852. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_EVICT_NONZERO_INFLIGHT_STALL__SHIFT
  6853. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_FLUSH_MASK
  6854. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_FLUSH__SHIFT
  6855. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_HIT_MASK
  6856. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_HIT__SHIFT
  6857. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL_MASK
  6858. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL__SHIFT
  6859. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_READ_OUTPUT_STALL_MASK
  6860. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_READ_OUTPUT_STALL__SHIFT
  6861. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_REEVICTION_STALL_MASK
  6862. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_REEVICTION_STALL__SHIFT
  6863. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_REPLACE_PENDING_EVICT_STALL_MASK
  6864. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_REPLACE_PENDING_EVICT_STALL__SHIFT
  6865. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_SECTORS_FLUSHED_MASK
  6866. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_SECTORS_FLUSHED__SHIFT
  6867. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_SECTOR_MISS_MASK
  6868. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_SECTOR_MISS__SHIFT
  6869. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_STALL_MASK
  6870. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_STALL__SHIFT
  6871. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_TAGS_FLUSHED_MASK
  6872. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_TAGS_FLUSHED__SHIFT
  6873. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_TAG_MISS_MASK
  6874. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_TAG_MISS__SHIFT
  6875. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_WRITE_OUTPUT_STALL_MASK
  6876. CB_DEBUG_BUS_13__FC_PF_DCC_CACHE_WRITE_OUTPUT_STALL__SHIFT
  6877. CB_DEBUG_BUS_13__FC_PF_FC_KEYID_RDLAT_FIFO_FULL_MASK
  6878. CB_DEBUG_BUS_13__FC_PF_FC_KEYID_RDLAT_FIFO_FULL__SHIFT
  6879. CB_DEBUG_BUS_13__FC_RD_PENDING_MASK
  6880. CB_DEBUG_BUS_13__FC_RD_PENDING__SHIFT
  6881. CB_DEBUG_BUS_13__FC_WR_PENDING_MASK
  6882. CB_DEBUG_BUS_13__FC_WR_PENDING__SHIFT
  6883. CB_DEBUG_BUS_13__LAST_RD_ARB_WINNER_MASK
  6884. CB_DEBUG_BUS_13__LAST_RD_ARB_WINNER__SHIFT
  6885. CB_DEBUG_BUS_13__MC_WR_PENDING_MASK
  6886. CB_DEBUG_BUS_13__MC_WR_PENDING__SHIFT
  6887. CB_DEBUG_BUS_13__MU_BUSY_MASK
  6888. CB_DEBUG_BUS_13__MU_BUSY__SHIFT
  6889. CB_DEBUG_BUS_13__MU_STATE_MASK
  6890. CB_DEBUG_BUS_13__MU_STATE__SHIFT
  6891. CB_DEBUG_BUS_13__TILE_INTFC_BUSY_MASK
  6892. CB_DEBUG_BUS_13__TILE_INTFC_BUSY__SHIFT
  6893. CB_DEBUG_BUS_13__TQ_BUSY_MASK
  6894. CB_DEBUG_BUS_13__TQ_BUSY__SHIFT
  6895. CB_DEBUG_BUS_14__ADDR_BUSY_MASK
  6896. CB_DEBUG_BUS_14__ADDR_BUSY__SHIFT
  6897. CB_DEBUG_BUS_14__CACHE_CTL_BUSY_MASK
  6898. CB_DEBUG_BUS_14__CACHE_CTL_BUSY__SHIFT
  6899. CB_DEBUG_BUS_14__CC_PF_DCC_BEYOND_TILE_SPLIT_MASK
  6900. CB_DEBUG_BUS_14__CC_PF_DCC_BEYOND_TILE_SPLIT__SHIFT
  6901. CB_DEBUG_BUS_14__CC_PF_DCC_RDREQ_STALL_MASK
  6902. CB_DEBUG_BUS_14__CC_PF_DCC_RDREQ_STALL__SHIFT
  6903. CB_DEBUG_BUS_14__CLEAR_BUSY_MASK
  6904. CB_DEBUG_BUS_14__CLEAR_BUSY__SHIFT
  6905. CB_DEBUG_BUS_14__FC_MC_DCC_READ_REQUESTS_IN_FLIGHT_MASK
  6906. CB_DEBUG_BUS_14__FC_MC_DCC_READ_REQUESTS_IN_FLIGHT__SHIFT
  6907. CB_DEBUG_BUS_14__FC_MC_DCC_WRITE_REQUESTS_IN_FLIGHT_MASK
  6908. CB_DEBUG_BUS_14__FC_MC_DCC_WRITE_REQUESTS_IN_FLIGHT__SHIFT
  6909. CB_DEBUG_BUS_14__FOP_BUSY_MASK
  6910. CB_DEBUG_BUS_14__FOP_BUSY__SHIFT
  6911. CB_DEBUG_BUS_14__LAT_BUSY_MASK
  6912. CB_DEBUG_BUS_14__LAT_BUSY__SHIFT
  6913. CB_DEBUG_BUS_14__MERGE_BUSY_MASK
  6914. CB_DEBUG_BUS_14__MERGE_BUSY__SHIFT
  6915. CB_DEBUG_BUS_14__QUAD_BUSY_MASK
  6916. CB_DEBUG_BUS_14__QUAD_BUSY__SHIFT
  6917. CB_DEBUG_BUS_14__TILE_BUSY_MASK
  6918. CB_DEBUG_BUS_14__TILE_BUSY__SHIFT
  6919. CB_DEBUG_BUS_14__TILE_RETIREMENT_BUSY_MASK
  6920. CB_DEBUG_BUS_14__TILE_RETIREMENT_BUSY__SHIFT
  6921. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_2TO1_MASK
  6922. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_2TO1__SHIFT
  6923. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_4TO1_MASK
  6924. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_4TO1__SHIFT
  6925. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_4TO2_MASK
  6926. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_4TO2__SHIFT
  6927. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_4TO3_MASK
  6928. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_4TO3__SHIFT
  6929. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO1_MASK
  6930. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO1__SHIFT
  6931. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO2_MASK
  6932. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO2__SHIFT
  6933. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO3_MASK
  6934. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO3__SHIFT
  6935. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO4_MASK
  6936. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO4__SHIFT
  6937. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO5_MASK
  6938. CB_DEBUG_BUS_15__CC_PF_DCC_COMPRESS_RATIO_6TO5__SHIFT
  6939. CB_DEBUG_BUS_15__CS_BUSY_MASK
  6940. CB_DEBUG_BUS_15__CS_BUSY__SHIFT
  6941. CB_DEBUG_BUS_15__DS_BUSY_MASK
  6942. CB_DEBUG_BUS_15__DS_BUSY__SHIFT
  6943. CB_DEBUG_BUS_15__IB_BUSY_MASK
  6944. CB_DEBUG_BUS_15__IB_BUSY__SHIFT
  6945. CB_DEBUG_BUS_15__RB_BUSY_MASK
  6946. CB_DEBUG_BUS_15__RB_BUSY__SHIFT
  6947. CB_DEBUG_BUS_15__SF_BUSY_MASK
  6948. CB_DEBUG_BUS_15__SF_BUSY__SHIFT
  6949. CB_DEBUG_BUS_15__SURF_SYNC_START_MASK
  6950. CB_DEBUG_BUS_15__SURF_SYNC_START__SHIFT
  6951. CB_DEBUG_BUS_15__SURF_SYNC_STATE_MASK
  6952. CB_DEBUG_BUS_15__SURF_SYNC_STATE__SHIFT
  6953. CB_DEBUG_BUS_15__TB_BUSY_MASK
  6954. CB_DEBUG_BUS_15__TB_BUSY__SHIFT
  6955. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO1_MASK
  6956. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO1__SHIFT
  6957. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO2_MASK
  6958. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO2__SHIFT
  6959. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO3_MASK
  6960. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO3__SHIFT
  6961. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO4_MASK
  6962. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO4__SHIFT
  6963. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO5_MASK
  6964. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO5__SHIFT
  6965. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO6_MASK
  6966. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO6__SHIFT
  6967. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO7_MASK
  6968. CB_DEBUG_BUS_16__CC_PF_DCC_COMPRESS_RATIO_8TO7__SHIFT
  6969. CB_DEBUG_BUS_16__CC_WRREQ_FIFO_EMPTY_MASK
  6970. CB_DEBUG_BUS_16__CC_WRREQ_FIFO_EMPTY__SHIFT
  6971. CB_DEBUG_BUS_16__CM_WRREQ_FIFO_EMPTY_MASK
  6972. CB_DEBUG_BUS_16__CM_WRREQ_FIFO_EMPTY__SHIFT
  6973. CB_DEBUG_BUS_16__FC_WRREQ_FIFO_EMPTY_MASK
  6974. CB_DEBUG_BUS_16__FC_WRREQ_FIFO_EMPTY__SHIFT
  6975. CB_DEBUG_BUS_16__LAST_RD_GRANT_VEC_MASK
  6976. CB_DEBUG_BUS_16__LAST_RD_GRANT_VEC__SHIFT
  6977. CB_DEBUG_BUS_16__LAST_WR_GRANT_VEC_MASK
  6978. CB_DEBUG_BUS_16__LAST_WR_GRANT_VEC__SHIFT
  6979. CB_DEBUG_BUS_16__MC_RDREQ_CREDITS_MASK
  6980. CB_DEBUG_BUS_16__MC_RDREQ_CREDITS__SHIFT
  6981. CB_DEBUG_BUS_16__MC_WRREQ_CREDITS_MASK
  6982. CB_DEBUG_BUS_16__MC_WRREQ_CREDITS__SHIFT
  6983. CB_DEBUG_BUS_17__AC_BUSY_MASK
  6984. CB_DEBUG_BUS_17__AC_BUSY__SHIFT
  6985. CB_DEBUG_BUS_17__BB_BUSY_MASK
  6986. CB_DEBUG_BUS_17__BB_BUSY__SHIFT
  6987. CB_DEBUG_BUS_17__CACHE_CTRL_BUSY_MASK
  6988. CB_DEBUG_BUS_17__CACHE_CTRL_BUSY__SHIFT
  6989. CB_DEBUG_BUS_17__CC_BUSY_MASK
  6990. CB_DEBUG_BUS_17__CC_BUSY__SHIFT
  6991. CB_DEBUG_BUS_17__CM_BUSY_MASK
  6992. CB_DEBUG_BUS_17__CM_BUSY__SHIFT
  6993. CB_DEBUG_BUS_17__CORE_SCLK_VLD_MASK
  6994. CB_DEBUG_BUS_17__CORE_SCLK_VLD__SHIFT
  6995. CB_DEBUG_BUS_17__CRW_BUSY_MASK
  6996. CB_DEBUG_BUS_17__CRW_BUSY__SHIFT
  6997. CB_DEBUG_BUS_17__EVICT_PENDING_MASK
  6998. CB_DEBUG_BUS_17__EVICT_PENDING__SHIFT
  6999. CB_DEBUG_BUS_17__FC_BUSY_MASK
  7000. CB_DEBUG_BUS_17__FC_BUSY__SHIFT
  7001. CB_DEBUG_BUS_17__FC_RD_PENDING_MASK
  7002. CB_DEBUG_BUS_17__FC_RD_PENDING__SHIFT
  7003. CB_DEBUG_BUS_17__FC_WR_PENDING_MASK
  7004. CB_DEBUG_BUS_17__FC_WR_PENDING__SHIFT
  7005. CB_DEBUG_BUS_17__LAST_RD_ARB_WINNER_MASK
  7006. CB_DEBUG_BUS_17__LAST_RD_ARB_WINNER__SHIFT
  7007. CB_DEBUG_BUS_17__MA_BUSY_MASK
  7008. CB_DEBUG_BUS_17__MA_BUSY__SHIFT
  7009. CB_DEBUG_BUS_17__MC_WR_PENDING_MASK
  7010. CB_DEBUG_BUS_17__MC_WR_PENDING__SHIFT
  7011. CB_DEBUG_BUS_17__MU_BUSY_MASK
  7012. CB_DEBUG_BUS_17__MU_BUSY__SHIFT
  7013. CB_DEBUG_BUS_17__MU_STATE_MASK
  7014. CB_DEBUG_BUS_17__MU_STATE__SHIFT
  7015. CB_DEBUG_BUS_17__REG_SCLK0_VLD_MASK
  7016. CB_DEBUG_BUS_17__REG_SCLK0_VLD__SHIFT
  7017. CB_DEBUG_BUS_17__REG_SCLK1_VLD_MASK
  7018. CB_DEBUG_BUS_17__REG_SCLK1_VLD__SHIFT
  7019. CB_DEBUG_BUS_17__TILE_INTFC_BUSY_MASK
  7020. CB_DEBUG_BUS_17__TILE_INTFC_BUSY__SHIFT
  7021. CB_DEBUG_BUS_17__TQ_BUSY_MASK
  7022. CB_DEBUG_BUS_17__TQ_BUSY__SHIFT
  7023. CB_DEBUG_BUS_18__ADDR_BUSY_MASK
  7024. CB_DEBUG_BUS_18__ADDR_BUSY__SHIFT
  7025. CB_DEBUG_BUS_18__CACHE_CTL_BUSY_MASK
  7026. CB_DEBUG_BUS_18__CACHE_CTL_BUSY__SHIFT
  7027. CB_DEBUG_BUS_18__CLEAR_BUSY_MASK
  7028. CB_DEBUG_BUS_18__CLEAR_BUSY__SHIFT
  7029. CB_DEBUG_BUS_18__DAG_BUSY_MASK
  7030. CB_DEBUG_BUS_18__DAG_BUSY__SHIFT
  7031. CB_DEBUG_BUS_18__DCC_BUSY_MASK
  7032. CB_DEBUG_BUS_18__DCC_BUSY__SHIFT
  7033. CB_DEBUG_BUS_18__DCS_READ_CC_PENDING_MASK
  7034. CB_DEBUG_BUS_18__DCS_READ_CC_PENDING__SHIFT
  7035. CB_DEBUG_BUS_18__DCS_READ_EV_PENDING_MASK
  7036. CB_DEBUG_BUS_18__DCS_READ_EV_PENDING__SHIFT
  7037. CB_DEBUG_BUS_18__DCS_READ_WINNER_LAST_MASK
  7038. CB_DEBUG_BUS_18__DCS_READ_WINNER_LAST__SHIFT
  7039. CB_DEBUG_BUS_18__DCS_WRITE_CC_PENDING_MASK
  7040. CB_DEBUG_BUS_18__DCS_WRITE_CC_PENDING__SHIFT
  7041. CB_DEBUG_BUS_18__DCS_WRITE_MC_PENDING_MASK
  7042. CB_DEBUG_BUS_18__DCS_WRITE_MC_PENDING__SHIFT
  7043. CB_DEBUG_BUS_18__DOC_BUSY_MASK
  7044. CB_DEBUG_BUS_18__DOC_BUSY__SHIFT
  7045. CB_DEBUG_BUS_18__DOC_CL_CAM_FULL_MASK
  7046. CB_DEBUG_BUS_18__DOC_CL_CAM_FULL__SHIFT
  7047. CB_DEBUG_BUS_18__DOC_QT_CAM_FULL_MASK
  7048. CB_DEBUG_BUS_18__DOC_QT_CAM_FULL__SHIFT
  7049. CB_DEBUG_BUS_18__DOC_QUAD_PTR_FIFO_FULL_MASK
  7050. CB_DEBUG_BUS_18__DOC_QUAD_PTR_FIFO_FULL__SHIFT
  7051. CB_DEBUG_BUS_18__DOC_SECTOR_MASK_FIFO_FULL_MASK
  7052. CB_DEBUG_BUS_18__DOC_SECTOR_MASK_FIFO_FULL__SHIFT
  7053. CB_DEBUG_BUS_18__DOC_STALL_MASK
  7054. CB_DEBUG_BUS_18__DOC_STALL__SHIFT
  7055. CB_DEBUG_BUS_18__FOP_BUSY_MASK
  7056. CB_DEBUG_BUS_18__FOP_BUSY__SHIFT
  7057. CB_DEBUG_BUS_18__LAT_BUSY_MASK
  7058. CB_DEBUG_BUS_18__LAT_BUSY__SHIFT
  7059. CB_DEBUG_BUS_18__MERGE_BUSY_MASK
  7060. CB_DEBUG_BUS_18__MERGE_BUSY__SHIFT
  7061. CB_DEBUG_BUS_18__NOT_USED_MASK
  7062. CB_DEBUG_BUS_18__NOT_USED__SHIFT
  7063. CB_DEBUG_BUS_18__QUAD_BUSY_MASK
  7064. CB_DEBUG_BUS_18__QUAD_BUSY__SHIFT
  7065. CB_DEBUG_BUS_18__TILE_BUSY_MASK
  7066. CB_DEBUG_BUS_18__TILE_BUSY__SHIFT
  7067. CB_DEBUG_BUS_18__TILE_RETIREMENT_BUSY_MASK
  7068. CB_DEBUG_BUS_18__TILE_RETIREMENT_BUSY__SHIFT
  7069. CB_DEBUG_BUS_19__CS_BUSY_MASK
  7070. CB_DEBUG_BUS_19__CS_BUSY__SHIFT
  7071. CB_DEBUG_BUS_19__DC_BUSY_MASK
  7072. CB_DEBUG_BUS_19__DC_BUSY__SHIFT
  7073. CB_DEBUG_BUS_19__DC_FIFO_FULL_MASK
  7074. CB_DEBUG_BUS_19__DC_FIFO_FULL__SHIFT
  7075. CB_DEBUG_BUS_19__DC_READY_MASK
  7076. CB_DEBUG_BUS_19__DC_READY__SHIFT
  7077. CB_DEBUG_BUS_19__DD_BUSY_MASK
  7078. CB_DEBUG_BUS_19__DD_BUSY__SHIFT
  7079. CB_DEBUG_BUS_19__DD_READY_MASK
  7080. CB_DEBUG_BUS_19__DD_READY__SHIFT
  7081. CB_DEBUG_BUS_19__DF_BUSY_MASK
  7082. CB_DEBUG_BUS_19__DF_BUSY__SHIFT
  7083. CB_DEBUG_BUS_19__DF_CLEAR_FIFO_EMPTY_MASK
  7084. CB_DEBUG_BUS_19__DF_CLEAR_FIFO_EMPTY__SHIFT
  7085. CB_DEBUG_BUS_19__DF_SKID_FIFO_EMPTY_MASK
  7086. CB_DEBUG_BUS_19__DF_SKID_FIFO_EMPTY__SHIFT
  7087. CB_DEBUG_BUS_19__DK_BUSY_MASK
  7088. CB_DEBUG_BUS_19__DK_BUSY__SHIFT
  7089. CB_DEBUG_BUS_19__DRR_BUSY_MASK
  7090. CB_DEBUG_BUS_19__DRR_BUSY__SHIFT
  7091. CB_DEBUG_BUS_19__DS_BUSY_MASK
  7092. CB_DEBUG_BUS_19__DS_BUSY__SHIFT
  7093. CB_DEBUG_BUS_19__IB_BUSY_MASK
  7094. CB_DEBUG_BUS_19__IB_BUSY__SHIFT
  7095. CB_DEBUG_BUS_19__RB_BUSY_MASK
  7096. CB_DEBUG_BUS_19__RB_BUSY__SHIFT
  7097. CB_DEBUG_BUS_19__SF_BUSY_MASK
  7098. CB_DEBUG_BUS_19__SF_BUSY__SHIFT
  7099. CB_DEBUG_BUS_19__SURF_SYNC_START_MASK
  7100. CB_DEBUG_BUS_19__SURF_SYNC_START__SHIFT
  7101. CB_DEBUG_BUS_19__SURF_SYNC_STATE_MASK
  7102. CB_DEBUG_BUS_19__SURF_SYNC_STATE__SHIFT
  7103. CB_DEBUG_BUS_19__TB_BUSY_MASK
  7104. CB_DEBUG_BUS_19__TB_BUSY__SHIFT
  7105. CB_DEBUG_BUS_1__CB_BUSY_MASK
  7106. CB_DEBUG_BUS_1__CB_BUSY__SHIFT
  7107. CB_DEBUG_BUS_1__CB_TAP_RDREQ_VALIDB_READYB_MASK
  7108. CB_DEBUG_BUS_1__CB_TAP_RDREQ_VALIDB_READYB__SHIFT
  7109. CB_DEBUG_BUS_1__CB_TAP_RDREQ_VALIDB_READY_MASK
  7110. CB_DEBUG_BUS_1__CB_TAP_RDREQ_VALIDB_READY__SHIFT
  7111. CB_DEBUG_BUS_1__CB_TAP_RDREQ_VALID_READYB_MASK
  7112. CB_DEBUG_BUS_1__CB_TAP_RDREQ_VALID_READYB__SHIFT
  7113. CB_DEBUG_BUS_1__CB_TAP_RDREQ_VALID_READY_MASK
  7114. CB_DEBUG_BUS_1__CB_TAP_RDREQ_VALID_READY__SHIFT
  7115. CB_DEBUG_BUS_1__CB_TAP_WRREQ_VALIDB_READYB_MASK
  7116. CB_DEBUG_BUS_1__CB_TAP_WRREQ_VALIDB_READYB__SHIFT
  7117. CB_DEBUG_BUS_1__CB_TAP_WRREQ_VALIDB_READY_MASK
  7118. CB_DEBUG_BUS_1__CB_TAP_WRREQ_VALIDB_READY__SHIFT
  7119. CB_DEBUG_BUS_1__CB_TAP_WRREQ_VALID_READYB_MASK
  7120. CB_DEBUG_BUS_1__CB_TAP_WRREQ_VALID_READYB__SHIFT
  7121. CB_DEBUG_BUS_1__CB_TAP_WRREQ_VALID_READY_MASK
  7122. CB_DEBUG_BUS_1__CB_TAP_WRREQ_VALID_READY__SHIFT
  7123. CB_DEBUG_BUS_1__CM_FC_TILE_VALIDB_READYB_MASK
  7124. CB_DEBUG_BUS_1__CM_FC_TILE_VALIDB_READYB__SHIFT
  7125. CB_DEBUG_BUS_1__CM_FC_TILE_VALIDB_READY_MASK
  7126. CB_DEBUG_BUS_1__CM_FC_TILE_VALIDB_READY__SHIFT
  7127. CB_DEBUG_BUS_1__CM_FC_TILE_VALID_READYB_MASK
  7128. CB_DEBUG_BUS_1__CM_FC_TILE_VALID_READYB__SHIFT
  7129. CB_DEBUG_BUS_1__CM_FC_TILE_VALID_READY_MASK
  7130. CB_DEBUG_BUS_1__CM_FC_TILE_VALID_READY__SHIFT
  7131. CB_DEBUG_BUS_1__DB_CB_LQUAD_VALIDB_READYB_MASK
  7132. CB_DEBUG_BUS_1__DB_CB_LQUAD_VALIDB_READYB__SHIFT
  7133. CB_DEBUG_BUS_1__DB_CB_LQUAD_VALIDB_READY_MASK
  7134. CB_DEBUG_BUS_1__DB_CB_LQUAD_VALIDB_READY__SHIFT
  7135. CB_DEBUG_BUS_1__DB_CB_LQUAD_VALID_READYB_MASK
  7136. CB_DEBUG_BUS_1__DB_CB_LQUAD_VALID_READYB__SHIFT
  7137. CB_DEBUG_BUS_1__DB_CB_LQUAD_VALID_READY_MASK
  7138. CB_DEBUG_BUS_1__DB_CB_LQUAD_VALID_READY__SHIFT
  7139. CB_DEBUG_BUS_1__DB_CB_TILE_VALIDB_READYB_MASK
  7140. CB_DEBUG_BUS_1__DB_CB_TILE_VALIDB_READYB__SHIFT
  7141. CB_DEBUG_BUS_1__DB_CB_TILE_VALIDB_READY_MASK
  7142. CB_DEBUG_BUS_1__DB_CB_TILE_VALIDB_READY__SHIFT
  7143. CB_DEBUG_BUS_1__DB_CB_TILE_VALID_READYB_MASK
  7144. CB_DEBUG_BUS_1__DB_CB_TILE_VALID_READYB__SHIFT
  7145. CB_DEBUG_BUS_1__DB_CB_TILE_VALID_READY_MASK
  7146. CB_DEBUG_BUS_1__DB_CB_TILE_VALID_READY__SHIFT
  7147. CB_DEBUG_BUS_1__FC_CLEAR_QUAD_VALIDB_READY_MASK
  7148. CB_DEBUG_BUS_1__FC_CLEAR_QUAD_VALIDB_READY__SHIFT
  7149. CB_DEBUG_BUS_1__FC_CLEAR_QUAD_VALID_READYB_MASK
  7150. CB_DEBUG_BUS_1__FC_CLEAR_QUAD_VALID_READYB__SHIFT
  7151. CB_DEBUG_BUS_1__FC_CLEAR_QUAD_VALID_READY_MASK
  7152. CB_DEBUG_BUS_1__FC_CLEAR_QUAD_VALID_READY__SHIFT
  7153. CB_DEBUG_BUS_20__CC_RDREQ_HAD_ITS_TURN_MASK
  7154. CB_DEBUG_BUS_20__CC_RDREQ_HAD_ITS_TURN__SHIFT
  7155. CB_DEBUG_BUS_20__CC_WRREQ_FIFO_EMPTY_MASK
  7156. CB_DEBUG_BUS_20__CC_WRREQ_FIFO_EMPTY__SHIFT
  7157. CB_DEBUG_BUS_20__CC_WRREQ_HAD_ITS_TURN_MASK
  7158. CB_DEBUG_BUS_20__CC_WRREQ_HAD_ITS_TURN__SHIFT
  7159. CB_DEBUG_BUS_20__CM_RDREQ_HAD_ITS_TURN_MASK
  7160. CB_DEBUG_BUS_20__CM_RDREQ_HAD_ITS_TURN__SHIFT
  7161. CB_DEBUG_BUS_20__CM_WRREQ_FIFO_EMPTY_MASK
  7162. CB_DEBUG_BUS_20__CM_WRREQ_FIFO_EMPTY__SHIFT
  7163. CB_DEBUG_BUS_20__CM_WRREQ_HAD_ITS_TURN_MASK
  7164. CB_DEBUG_BUS_20__CM_WRREQ_HAD_ITS_TURN__SHIFT
  7165. CB_DEBUG_BUS_20__DCC_WRREQ_FIFO_EMPTY_MASK
  7166. CB_DEBUG_BUS_20__DCC_WRREQ_FIFO_EMPTY__SHIFT
  7167. CB_DEBUG_BUS_20__FC_RDREQ_HAD_ITS_TURN_MASK
  7168. CB_DEBUG_BUS_20__FC_RDREQ_HAD_ITS_TURN__SHIFT
  7169. CB_DEBUG_BUS_20__FC_WRREQ_FIFO_EMPTY_MASK
  7170. CB_DEBUG_BUS_20__FC_WRREQ_FIFO_EMPTY__SHIFT
  7171. CB_DEBUG_BUS_20__FC_WRREQ_HAD_ITS_TURN_MASK
  7172. CB_DEBUG_BUS_20__FC_WRREQ_HAD_ITS_TURN__SHIFT
  7173. CB_DEBUG_BUS_20__MC_RDREQ_CREDITS_MASK
  7174. CB_DEBUG_BUS_20__MC_RDREQ_CREDITS__SHIFT
  7175. CB_DEBUG_BUS_20__MC_WRREQ_CREDITS_MASK
  7176. CB_DEBUG_BUS_20__MC_WRREQ_CREDITS__SHIFT
  7177. CB_DEBUG_BUS_21__BB_BUSY_MASK
  7178. CB_DEBUG_BUS_21__BB_BUSY__SHIFT
  7179. CB_DEBUG_BUS_21__CC_BUSY_MASK
  7180. CB_DEBUG_BUS_21__CC_BUSY__SHIFT
  7181. CB_DEBUG_BUS_21__CM_BUSY_MASK
  7182. CB_DEBUG_BUS_21__CM_BUSY__SHIFT
  7183. CB_DEBUG_BUS_21__CORE_SCLK_VLD_MASK
  7184. CB_DEBUG_BUS_21__CORE_SCLK_VLD__SHIFT
  7185. CB_DEBUG_BUS_21__FC_BUSY_MASK
  7186. CB_DEBUG_BUS_21__FC_BUSY__SHIFT
  7187. CB_DEBUG_BUS_21__MA_BUSY_MASK
  7188. CB_DEBUG_BUS_21__MA_BUSY__SHIFT
  7189. CB_DEBUG_BUS_21__REG_SCLK0_VLD_MASK
  7190. CB_DEBUG_BUS_21__REG_SCLK0_VLD__SHIFT
  7191. CB_DEBUG_BUS_21__REG_SCLK1_VLD_MASK
  7192. CB_DEBUG_BUS_21__REG_SCLK1_VLD__SHIFT
  7193. CB_DEBUG_BUS_22__OUTSTANDING_MC_READS_MASK
  7194. CB_DEBUG_BUS_22__OUTSTANDING_MC_READS__SHIFT
  7195. CB_DEBUG_BUS_22__OUTSTANDING_MC_WRITES_MASK
  7196. CB_DEBUG_BUS_22__OUTSTANDING_MC_WRITES__SHIFT
  7197. CB_DEBUG_BUS_2__CC_IB_SR_FRAG_VALIDB_READYB_MASK
  7198. CB_DEBUG_BUS_2__CC_IB_SR_FRAG_VALIDB_READYB__SHIFT
  7199. CB_DEBUG_BUS_2__CC_IB_SR_FRAG_VALIDB_READY_MASK
  7200. CB_DEBUG_BUS_2__CC_IB_SR_FRAG_VALIDB_READY__SHIFT
  7201. CB_DEBUG_BUS_2__CC_IB_SR_FRAG_VALID_READYB_MASK
  7202. CB_DEBUG_BUS_2__CC_IB_SR_FRAG_VALID_READYB__SHIFT
  7203. CB_DEBUG_BUS_2__CC_IB_SR_FRAG_VALID_READY_MASK
  7204. CB_DEBUG_BUS_2__CC_IB_SR_FRAG_VALID_READY__SHIFT
  7205. CB_DEBUG_BUS_2__CC_IB_TB_FRAG_VALIDB_READYB_MASK
  7206. CB_DEBUG_BUS_2__CC_IB_TB_FRAG_VALIDB_READYB__SHIFT
  7207. CB_DEBUG_BUS_2__CC_IB_TB_FRAG_VALIDB_READY_MASK
  7208. CB_DEBUG_BUS_2__CC_IB_TB_FRAG_VALIDB_READY__SHIFT
  7209. CB_DEBUG_BUS_2__CC_IB_TB_FRAG_VALID_READYB_MASK
  7210. CB_DEBUG_BUS_2__CC_IB_TB_FRAG_VALID_READYB__SHIFT
  7211. CB_DEBUG_BUS_2__CC_IB_TB_FRAG_VALID_READY_MASK
  7212. CB_DEBUG_BUS_2__CC_IB_TB_FRAG_VALID_READY__SHIFT
  7213. CB_DEBUG_BUS_2__CC_RB_BC_EVENFRAG_VALIDB_READYB_MASK
  7214. CB_DEBUG_BUS_2__CC_RB_BC_EVENFRAG_VALIDB_READYB__SHIFT
  7215. CB_DEBUG_BUS_2__CC_RB_BC_EVENFRAG_VALIDB_READY_MASK
  7216. CB_DEBUG_BUS_2__CC_RB_BC_EVENFRAG_VALIDB_READY__SHIFT
  7217. CB_DEBUG_BUS_2__CC_RB_BC_EVENFRAG_VALID_READYB_MASK
  7218. CB_DEBUG_BUS_2__CC_RB_BC_EVENFRAG_VALID_READYB__SHIFT
  7219. CB_DEBUG_BUS_2__CC_RB_BC_EVENFRAG_VALID_READY_MASK
  7220. CB_DEBUG_BUS_2__CC_RB_BC_EVENFRAG_VALID_READY__SHIFT
  7221. CB_DEBUG_BUS_2__FC_CC_QUADFRAG_VALIDB_READYB_MASK
  7222. CB_DEBUG_BUS_2__FC_CC_QUADFRAG_VALIDB_READYB__SHIFT
  7223. CB_DEBUG_BUS_2__FC_CC_QUADFRAG_VALIDB_READY_MASK
  7224. CB_DEBUG_BUS_2__FC_CC_QUADFRAG_VALIDB_READY__SHIFT
  7225. CB_DEBUG_BUS_2__FC_CC_QUADFRAG_VALID_READYB_MASK
  7226. CB_DEBUG_BUS_2__FC_CC_QUADFRAG_VALID_READYB__SHIFT
  7227. CB_DEBUG_BUS_2__FC_CC_QUADFRAG_VALID_READY_MASK
  7228. CB_DEBUG_BUS_2__FC_CC_QUADFRAG_VALID_READY__SHIFT
  7229. CB_DEBUG_BUS_2__FC_CLEAR_QUAD_VALIDB_READYB_MASK
  7230. CB_DEBUG_BUS_2__FC_CLEAR_QUAD_VALIDB_READYB__SHIFT
  7231. CB_DEBUG_BUS_2__FC_QUAD_RESIDENCY_STALL_MASK
  7232. CB_DEBUG_BUS_2__FC_QUAD_RESIDENCY_STALL__SHIFT
  7233. CB_DEBUG_BUS_2__FOP_FMASK_BYPASS_STALL_MASK
  7234. CB_DEBUG_BUS_2__FOP_FMASK_BYPASS_STALL__SHIFT
  7235. CB_DEBUG_BUS_2__FOP_FMASK_RAW_STALL_MASK
  7236. CB_DEBUG_BUS_2__FOP_FMASK_RAW_STALL__SHIFT
  7237. CB_DEBUG_BUS_2__FOP_IN_VALIDB_READYB_MASK
  7238. CB_DEBUG_BUS_2__FOP_IN_VALIDB_READYB__SHIFT
  7239. CB_DEBUG_BUS_2__FOP_IN_VALIDB_READY_MASK
  7240. CB_DEBUG_BUS_2__FOP_IN_VALIDB_READY__SHIFT
  7241. CB_DEBUG_BUS_2__FOP_IN_VALID_READYB_MASK
  7242. CB_DEBUG_BUS_2__FOP_IN_VALID_READYB__SHIFT
  7243. CB_DEBUG_BUS_2__FOP_IN_VALID_READY_MASK
  7244. CB_DEBUG_BUS_2__FOP_IN_VALID_READY__SHIFT
  7245. CB_DEBUG_BUS_3__CC_BC_CS_FRAG_VALID_MASK
  7246. CB_DEBUG_BUS_3__CC_BC_CS_FRAG_VALID__SHIFT
  7247. CB_DEBUG_BUS_3__CC_EVENFIFO_QUAD_RESIDENCY_STALL_MASK
  7248. CB_DEBUG_BUS_3__CC_EVENFIFO_QUAD_RESIDENCY_STALL__SHIFT
  7249. CB_DEBUG_BUS_3__CC_ODDFIFO_QUAD_RESIDENCY_STALL_MASK
  7250. CB_DEBUG_BUS_3__CC_ODDFIFO_QUAD_RESIDENCY_STALL__SHIFT
  7251. CB_DEBUG_BUS_3__CC_RB_BC_ODDFRAG_VALIDB_READYB_MASK
  7252. CB_DEBUG_BUS_3__CC_RB_BC_ODDFRAG_VALIDB_READYB__SHIFT
  7253. CB_DEBUG_BUS_3__CC_RB_BC_ODDFRAG_VALIDB_READY_MASK
  7254. CB_DEBUG_BUS_3__CC_RB_BC_ODDFRAG_VALIDB_READY__SHIFT
  7255. CB_DEBUG_BUS_3__CC_RB_BC_ODDFRAG_VALID_READYB_MASK
  7256. CB_DEBUG_BUS_3__CC_RB_BC_ODDFRAG_VALID_READYB__SHIFT
  7257. CB_DEBUG_BUS_3__CC_RB_BC_ODDFRAG_VALID_READY_MASK
  7258. CB_DEBUG_BUS_3__CC_RB_BC_ODDFRAG_VALID_READY__SHIFT
  7259. CB_DEBUG_BUS_3__CC_RB_FULL_MASK
  7260. CB_DEBUG_BUS_3__CC_RB_FULL__SHIFT
  7261. CB_DEBUG_BUS_3__CC_SF_FULL_MASK
  7262. CB_DEBUG_BUS_3__CC_SF_FULL__SHIFT
  7263. CB_DEBUG_BUS_3__CM_CACHE_EVICT_NONZERO_INFLIGHT_STALL_MASK
  7264. CB_DEBUG_BUS_3__CM_CACHE_EVICT_NONZERO_INFLIGHT_STALL__SHIFT
  7265. CB_DEBUG_BUS_3__CM_CACHE_HIT_MASK
  7266. CB_DEBUG_BUS_3__CM_CACHE_HIT__SHIFT
  7267. CB_DEBUG_BUS_3__CM_CACHE_REEVICTION_STALL_MASK
  7268. CB_DEBUG_BUS_3__CM_CACHE_REEVICTION_STALL__SHIFT
  7269. CB_DEBUG_BUS_3__CM_CACHE_SECTOR_MISS_MASK
  7270. CB_DEBUG_BUS_3__CM_CACHE_SECTOR_MISS__SHIFT
  7271. CB_DEBUG_BUS_3__CM_CACHE_TAG_MISS_MASK
  7272. CB_DEBUG_BUS_3__CM_CACHE_TAG_MISS__SHIFT
  7273. CB_DEBUG_BUS_3__CM_TILE_RESIDENCY_STALL_MASK
  7274. CB_DEBUG_BUS_3__CM_TILE_RESIDENCY_STALL__SHIFT
  7275. CB_DEBUG_BUS_3__CM_TQ_FULL_MASK
  7276. CB_DEBUG_BUS_3__CM_TQ_FULL__SHIFT
  7277. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_32_ABGR_MASK
  7278. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_32_ABGR__SHIFT
  7279. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_32_AR_MASK
  7280. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_32_AR__SHIFT
  7281. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_32_GR_MASK
  7282. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_32_GR__SHIFT
  7283. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_32_R_MASK
  7284. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_32_R__SHIFT
  7285. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_FP16_ABGR_MASK
  7286. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_FP16_ABGR__SHIFT
  7287. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_SIGNED16_ABGR_MASK
  7288. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_SIGNED16_ABGR__SHIFT
  7289. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_UNSIGNED16_ABGR_MASK
  7290. CB_DEBUG_BUS_3__LQUAD_FORMAT_IS_EXPORT_UNSIGNED16_ABGR__SHIFT
  7291. CB_DEBUG_BUS_3__LQUAD_NO_TILE_MASK
  7292. CB_DEBUG_BUS_3__LQUAD_NO_TILE__SHIFT
  7293. CB_DEBUG_BUS_4__CC_CACHE_EVICT_NONZERO_INFLIGHT_STALL_MASK
  7294. CB_DEBUG_BUS_4__CC_CACHE_EVICT_NONZERO_INFLIGHT_STALL__SHIFT
  7295. CB_DEBUG_BUS_4__CC_CACHE_HIT_MASK
  7296. CB_DEBUG_BUS_4__CC_CACHE_HIT__SHIFT
  7297. CB_DEBUG_BUS_4__CC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL_MASK
  7298. CB_DEBUG_BUS_4__CC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL__SHIFT
  7299. CB_DEBUG_BUS_4__CC_CACHE_REEVICTION_STALL_MASK
  7300. CB_DEBUG_BUS_4__CC_CACHE_REEVICTION_STALL__SHIFT
  7301. CB_DEBUG_BUS_4__CC_CACHE_REPLACE_PENDING_EVICT_STALL_MASK
  7302. CB_DEBUG_BUS_4__CC_CACHE_REPLACE_PENDING_EVICT_STALL__SHIFT
  7303. CB_DEBUG_BUS_4__CC_CACHE_SECTOR_MISS_MASK
  7304. CB_DEBUG_BUS_4__CC_CACHE_SECTOR_MISS__SHIFT
  7305. CB_DEBUG_BUS_4__CC_CACHE_TAG_MISS_MASK
  7306. CB_DEBUG_BUS_4__CC_CACHE_TAG_MISS__SHIFT
  7307. CB_DEBUG_BUS_4__CM_CACHE_ACK_OUTPUT_STALL_MASK
  7308. CB_DEBUG_BUS_4__CM_CACHE_ACK_OUTPUT_STALL__SHIFT
  7309. CB_DEBUG_BUS_4__CM_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL_MASK
  7310. CB_DEBUG_BUS_4__CM_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL__SHIFT
  7311. CB_DEBUG_BUS_4__CM_CACHE_READ_OUTPUT_STALL_MASK
  7312. CB_DEBUG_BUS_4__CM_CACHE_READ_OUTPUT_STALL__SHIFT
  7313. CB_DEBUG_BUS_4__CM_CACHE_REPLACE_PENDING_EVICT_STALL_MASK
  7314. CB_DEBUG_BUS_4__CM_CACHE_REPLACE_PENDING_EVICT_STALL__SHIFT
  7315. CB_DEBUG_BUS_4__CM_CACHE_STALL_MASK
  7316. CB_DEBUG_BUS_4__CM_CACHE_STALL__SHIFT
  7317. CB_DEBUG_BUS_4__CM_CACHE_WRITE_OUTPUT_STALL_MASK
  7318. CB_DEBUG_BUS_4__CM_CACHE_WRITE_OUTPUT_STALL__SHIFT
  7319. CB_DEBUG_BUS_4__FC_CACHE_ACK_OUTPUT_STALL_MASK
  7320. CB_DEBUG_BUS_4__FC_CACHE_ACK_OUTPUT_STALL__SHIFT
  7321. CB_DEBUG_BUS_4__FC_CACHE_EVICT_NONZERO_INFLIGHT_STALL_MASK
  7322. CB_DEBUG_BUS_4__FC_CACHE_EVICT_NONZERO_INFLIGHT_STALL__SHIFT
  7323. CB_DEBUG_BUS_4__FC_CACHE_HIT_MASK
  7324. CB_DEBUG_BUS_4__FC_CACHE_HIT__SHIFT
  7325. CB_DEBUG_BUS_4__FC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL_MASK
  7326. CB_DEBUG_BUS_4__FC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL__SHIFT
  7327. CB_DEBUG_BUS_4__FC_CACHE_READ_OUTPUT_STALL_MASK
  7328. CB_DEBUG_BUS_4__FC_CACHE_READ_OUTPUT_STALL__SHIFT
  7329. CB_DEBUG_BUS_4__FC_CACHE_REEVICTION_STALL_MASK
  7330. CB_DEBUG_BUS_4__FC_CACHE_REEVICTION_STALL__SHIFT
  7331. CB_DEBUG_BUS_4__FC_CACHE_REPLACE_PENDING_EVICT_STALL_MASK
  7332. CB_DEBUG_BUS_4__FC_CACHE_REPLACE_PENDING_EVICT_STALL__SHIFT
  7333. CB_DEBUG_BUS_4__FC_CACHE_SECTOR_MISS_MASK
  7334. CB_DEBUG_BUS_4__FC_CACHE_SECTOR_MISS__SHIFT
  7335. CB_DEBUG_BUS_4__FC_CACHE_STALL_MASK
  7336. CB_DEBUG_BUS_4__FC_CACHE_STALL__SHIFT
  7337. CB_DEBUG_BUS_4__FC_CACHE_TAG_MISS_MASK
  7338. CB_DEBUG_BUS_4__FC_CACHE_TAG_MISS__SHIFT
  7339. CB_DEBUG_BUS_4__FC_CACHE_WRITE_OUTPUT_STALL_MASK
  7340. CB_DEBUG_BUS_4__FC_CACHE_WRITE_OUTPUT_STALL__SHIFT
  7341. CB_DEBUG_BUS_5__CC_CACHE_ACK_OUTPUT_STALL_MASK
  7342. CB_DEBUG_BUS_5__CC_CACHE_ACK_OUTPUT_STALL__SHIFT
  7343. CB_DEBUG_BUS_5__CC_CACHE_FLUSH_MASK
  7344. CB_DEBUG_BUS_5__CC_CACHE_FLUSH__SHIFT
  7345. CB_DEBUG_BUS_5__CC_CACHE_READ_OUTPUT_STALL_MASK
  7346. CB_DEBUG_BUS_5__CC_CACHE_READ_OUTPUT_STALL__SHIFT
  7347. CB_DEBUG_BUS_5__CC_CACHE_SECTORS_FLUSHED_MASK
  7348. CB_DEBUG_BUS_5__CC_CACHE_SECTORS_FLUSHED__SHIFT
  7349. CB_DEBUG_BUS_5__CC_CACHE_STALL_MASK
  7350. CB_DEBUG_BUS_5__CC_CACHE_STALL__SHIFT
  7351. CB_DEBUG_BUS_5__CC_CACHE_TAGS_FLUSHED_MASK
  7352. CB_DEBUG_BUS_5__CC_CACHE_TAGS_FLUSHED__SHIFT
  7353. CB_DEBUG_BUS_5__CC_CACHE_WA_TO_RMW_CONVERSION_MASK
  7354. CB_DEBUG_BUS_5__CC_CACHE_WA_TO_RMW_CONVERSION__SHIFT
  7355. CB_DEBUG_BUS_5__CC_CACHE_WRITE_OUTPUT_STALL_MASK
  7356. CB_DEBUG_BUS_5__CC_CACHE_WRITE_OUTPUT_STALL__SHIFT
  7357. CB_DEBUG_BUS_5__CM_CACHE_DIRTY_SECTORS_FLUSHED_MASK
  7358. CB_DEBUG_BUS_5__CM_CACHE_DIRTY_SECTORS_FLUSHED__SHIFT
  7359. CB_DEBUG_BUS_5__CM_CACHE_FLUSH_MASK
  7360. CB_DEBUG_BUS_5__CM_CACHE_FLUSH__SHIFT
  7361. CB_DEBUG_BUS_5__CM_CACHE_SECTORS_FLUSHED_MASK
  7362. CB_DEBUG_BUS_5__CM_CACHE_SECTORS_FLUSHED__SHIFT
  7363. CB_DEBUG_BUS_5__CM_CACHE_TAGS_FLUSHED_MASK
  7364. CB_DEBUG_BUS_5__CM_CACHE_TAGS_FLUSHED__SHIFT
  7365. CB_DEBUG_BUS_5__FC_CACHE_DIRTY_SECTORS_FLUSHED_MASK
  7366. CB_DEBUG_BUS_5__FC_CACHE_DIRTY_SECTORS_FLUSHED__SHIFT
  7367. CB_DEBUG_BUS_5__FC_CACHE_FLUSH_MASK
  7368. CB_DEBUG_BUS_5__FC_CACHE_FLUSH__SHIFT
  7369. CB_DEBUG_BUS_5__FC_CACHE_SECTORS_FLUSHED_MASK
  7370. CB_DEBUG_BUS_5__FC_CACHE_SECTORS_FLUSHED__SHIFT
  7371. CB_DEBUG_BUS_5__FC_CACHE_TAGS_FLUSHED_MASK
  7372. CB_DEBUG_BUS_5__FC_CACHE_TAGS_FLUSHED__SHIFT
  7373. CB_DEBUG_BUS_6__CC_CACHE_DIRTY_SECTORS_FLUSHED_MASK
  7374. CB_DEBUG_BUS_6__CC_CACHE_DIRTY_SECTORS_FLUSHED__SHIFT
  7375. CB_DEBUG_BUS_6__CC_MC_READ_REQUEST_MASK
  7376. CB_DEBUG_BUS_6__CC_MC_READ_REQUEST__SHIFT
  7377. CB_DEBUG_BUS_6__CC_MC_WRITE_REQUEST_MASK
  7378. CB_DEBUG_BUS_6__CC_MC_WRITE_REQUEST__SHIFT
  7379. CB_DEBUG_BUS_6__CM_MC_READ_REQUESTS_IN_FLIGHT_MASK
  7380. CB_DEBUG_BUS_6__CM_MC_READ_REQUESTS_IN_FLIGHT__SHIFT
  7381. CB_DEBUG_BUS_6__CM_MC_READ_REQUEST_MASK
  7382. CB_DEBUG_BUS_6__CM_MC_READ_REQUEST__SHIFT
  7383. CB_DEBUG_BUS_6__CM_MC_WRITE_REQUEST_MASK
  7384. CB_DEBUG_BUS_6__CM_MC_WRITE_REQUEST__SHIFT
  7385. CB_DEBUG_BUS_6__FC_MC_READ_REQUEST_MASK
  7386. CB_DEBUG_BUS_6__FC_MC_READ_REQUEST__SHIFT
  7387. CB_DEBUG_BUS_6__FC_MC_WRITE_REQUEST_MASK
  7388. CB_DEBUG_BUS_6__FC_MC_WRITE_REQUEST__SHIFT
  7389. CB_DEBUG_BUS_7__CC_MC_READ_REQUESTS_IN_FLIGHT_MASK
  7390. CB_DEBUG_BUS_7__CC_MC_READ_REQUESTS_IN_FLIGHT__SHIFT
  7391. CB_DEBUG_BUS_7__FC_MC_READ_REQUESTS_IN_FLIGHT_MASK
  7392. CB_DEBUG_BUS_7__FC_MC_READ_REQUESTS_IN_FLIGHT__SHIFT
  7393. CB_DEBUG_BUS_8__CM_MC_WRITE_REQUESTS_IN_FLIGHT_MASK
  7394. CB_DEBUG_BUS_8__CM_MC_WRITE_REQUESTS_IN_FLIGHT__SHIFT
  7395. CB_DEBUG_BUS_8__FC_MC_WRITE_REQUESTS_IN_FLIGHT_MASK
  7396. CB_DEBUG_BUS_8__FC_MC_WRITE_REQUESTS_IN_FLIGHT__SHIFT
  7397. CB_DEBUG_BUS_8__FC_SEQUENCER_CLEAR_MASK
  7398. CB_DEBUG_BUS_8__FC_SEQUENCER_CLEAR__SHIFT
  7399. CB_DEBUG_BUS_8__FC_SEQUENCER_ELIMINATE_FAST_CLEAR_MASK
  7400. CB_DEBUG_BUS_8__FC_SEQUENCER_ELIMINATE_FAST_CLEAR__SHIFT
  7401. CB_DEBUG_BUS_8__FC_SEQUENCER_FMASK_COMPRESSION_DISABLE_MASK
  7402. CB_DEBUG_BUS_8__FC_SEQUENCER_FMASK_COMPRESSION_DISABLE__SHIFT
  7403. CB_DEBUG_BUS_8__FC_SEQUENCER_FMASK_DECOMPRESS_MASK
  7404. CB_DEBUG_BUS_8__FC_SEQUENCER_FMASK_DECOMPRESS__SHIFT
  7405. CB_DEBUG_BUS_9__CC_MC_WRITE_REQUESTS_IN_FLIGHT_MASK
  7406. CB_DEBUG_BUS_9__CC_MC_WRITE_REQUESTS_IN_FLIGHT__SHIFT
  7407. CB_DEBUG_BUS_9__CC_SURFACE_SYNC_MASK
  7408. CB_DEBUG_BUS_9__CC_SURFACE_SYNC__SHIFT
  7409. CB_DEBUG_BUS_9__DEBUG_BUS_DRAWN_PIXEL_MASK
  7410. CB_DEBUG_BUS_9__DEBUG_BUS_DRAWN_PIXEL__SHIFT
  7411. CB_DEBUG_BUS_9__DEBUG_BUS_DRAWN_QUAD_FRAGMENT_MASK
  7412. CB_DEBUG_BUS_9__DEBUG_BUS_DRAWN_QUAD_FRAGMENT__SHIFT
  7413. CB_DEBUG_BUS_9__DEBUG_BUS_DRAWN_QUAD_MASK
  7414. CB_DEBUG_BUS_9__DEBUG_BUS_DRAWN_QUAD__SHIFT
  7415. CB_DEBUG_BUS_9__DEBUG_BUS_DRAWN_TILE_MASK
  7416. CB_DEBUG_BUS_9__DEBUG_BUS_DRAWN_TILE__SHIFT
  7417. CB_DEBUG_BUS_9__DUAL_SOURCE_COLOR_QUAD_FRAGMENT_MASK
  7418. CB_DEBUG_BUS_9__DUAL_SOURCE_COLOR_QUAD_FRAGMENT__SHIFT
  7419. CB_DEBUG_BUS_9__EVENT_ALL_MASK
  7420. CB_DEBUG_BUS_9__EVENT_ALL__SHIFT
  7421. CB_DEBUG_BUS_9__EVENT_CACHE_FLUSH_TS_MASK
  7422. CB_DEBUG_BUS_9__EVENT_CACHE_FLUSH_TS__SHIFT
  7423. CB_DEBUG_BUS_9__EVENT_CONTEXT_DONE_MASK
  7424. CB_DEBUG_BUS_9__EVENT_CONTEXT_DONE__SHIFT
  7425. CB_DEBUG_BUS_9__EXPORT_32_ABGR_QUAD_FRAGMENT_MASK
  7426. CB_DEBUG_BUS_9__EXPORT_32_ABGR_QUAD_FRAGMENT__SHIFT
  7427. CB_DEBUG_BUS_9__TWO_PROBE_QUAD_FRAGMENT_MASK
  7428. CB_DEBUG_BUS_9__TWO_PROBE_QUAD_FRAGMENT__SHIFT
  7429. CB_DECOMPRESS
  7430. CB_DELAY_LOOP_WAIT
  7431. CB_DELSEL
  7432. CB_DEST_AUTOINC
  7433. CB_DEST_LE
  7434. CB_DEST_SIZE_LONG
  7435. CB_DEV
  7436. CB_DISABLE
  7437. CB_DRV
  7438. CB_EEPROM_READBYTE_WAIT
  7439. CB_ELIMINATE_FAST_CLEAR
  7440. CB_EXTRA_RD_NUM
  7441. CB_F16BITCARD
  7442. CB_F3VCARD
  7443. CB_F5VCARD
  7444. CB_FBADVCCREQ
  7445. CB_FCARDSTS
  7446. CB_FCBCARD
  7447. CB_FCDETECT1
  7448. CB_FCDETECT2
  7449. CB_FDATALOST
  7450. CB_FMASK_DECOMPRESS
  7451. CB_FNOTACARD
  7452. CB_FORMAT
  7453. CB_FPWRCYCLE
  7454. CB_FXVCARD
  7455. CB_FYVCARD
  7456. CB_GPIO_DFLY
  7457. CB_GPIO_FC4P1
  7458. CB_GPIO_FC4P2
  7459. CB_GPIO_FC8P1
  7460. CB_GPIO_FC8P2
  7461. CB_GPIO_PROTO
  7462. CB_GPIO_TTV
  7463. CB_HW_CONTROL
  7464. CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK
  7465. CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS__SHIFT
  7466. CB_HW_CONTROL_1__CHICKEN_BITS_MASK
  7467. CB_HW_CONTROL_1__CHICKEN_BITS__SHIFT
  7468. CB_HW_CONTROL_1__CM_CACHE_NUM_TAGS_MASK
  7469. CB_HW_CONTROL_1__CM_CACHE_NUM_TAGS__SHIFT
  7470. CB_HW_CONTROL_1__CM_TILE_FIFO_DEPTH_MASK
  7471. CB_HW_CONTROL_1__CM_TILE_FIFO_DEPTH__SHIFT
  7472. CB_HW_CONTROL_1__FC_CACHE_NUM_TAGS_MASK
  7473. CB_HW_CONTROL_1__FC_CACHE_NUM_TAGS__SHIFT
  7474. CB_HW_CONTROL_1__RMI_CREDITS_MASK
  7475. CB_HW_CONTROL_1__RMI_CREDITS__SHIFT
  7476. CB_HW_CONTROL_2__CC_EVEN_ODD_FIFO_DEPTH_MASK
  7477. CB_HW_CONTROL_2__CC_EVEN_ODD_FIFO_DEPTH__SHIFT
  7478. CB_HW_CONTROL_2__CHICKEN_BITS_MASK
  7479. CB_HW_CONTROL_2__CHICKEN_BITS__SHIFT
  7480. CB_HW_CONTROL_2__DRR_ASSUMED_FIFO_DEPTH_DIV8_MASK
  7481. CB_HW_CONTROL_2__DRR_ASSUMED_FIFO_DEPTH_DIV8__SHIFT
  7482. CB_HW_CONTROL_2__FC_RDLAT_QUAD_FIFO_DEPTH_MASK
  7483. CB_HW_CONTROL_2__FC_RDLAT_QUAD_FIFO_DEPTH__SHIFT
  7484. CB_HW_CONTROL_2__FC_RDLAT_TILE_FIFO_DEPTH_MASK
  7485. CB_HW_CONTROL_2__FC_RDLAT_TILE_FIFO_DEPTH__SHIFT
  7486. CB_HW_CONTROL_3__COLOR_CACHE_PREFETCH_NUM_CLS_MASK
  7487. CB_HW_CONTROL_3__COLOR_CACHE_PREFETCH_NUM_CLS__SHIFT
  7488. CB_HW_CONTROL_3__DISABLE_BLENDER_CLOCK_GATING_MASK
  7489. CB_HW_CONTROL_3__DISABLE_BLENDER_CLOCK_GATING__SHIFT
  7490. CB_HW_CONTROL_3__DISABLE_CC_CACHE_OVWR_KEY_MOD_MASK
  7491. CB_HW_CONTROL_3__DISABLE_CC_CACHE_OVWR_KEY_MOD__SHIFT
  7492. CB_HW_CONTROL_3__DISABLE_CC_CACHE_OVWR_STATUS_ACCUM_MASK
  7493. CB_HW_CONTROL_3__DISABLE_CC_CACHE_OVWR_STATUS_ACCUM__SHIFT
  7494. CB_HW_CONTROL_3__DISABLE_CC_CACHE_PANIC_GATING_MASK
  7495. CB_HW_CONTROL_3__DISABLE_CC_CACHE_PANIC_GATING__SHIFT
  7496. CB_HW_CONTROL_3__DISABLE_CMASK_LAST_QUAD_INSERTION_MASK
  7497. CB_HW_CONTROL_3__DISABLE_CMASK_LAST_QUAD_INSERTION__SHIFT
  7498. CB_HW_CONTROL_3__DISABLE_DUALSRC_WITH_OBJPRIMID_FIX_MASK
  7499. CB_HW_CONTROL_3__DISABLE_DUALSRC_WITH_OBJPRIMID_FIX__SHIFT
  7500. CB_HW_CONTROL_3__DISABLE_EARLY_WRACKS_CC_MASK
  7501. CB_HW_CONTROL_3__DISABLE_EARLY_WRACKS_CC__SHIFT
  7502. CB_HW_CONTROL_3__DISABLE_EARLY_WRACKS_CM_MASK
  7503. CB_HW_CONTROL_3__DISABLE_EARLY_WRACKS_CM__SHIFT
  7504. CB_HW_CONTROL_3__DISABLE_EARLY_WRACKS_DC_MASK
  7505. CB_HW_CONTROL_3__DISABLE_EARLY_WRACKS_DC__SHIFT
  7506. CB_HW_CONTROL_3__DISABLE_EARLY_WRACKS_FC_MASK
  7507. CB_HW_CONTROL_3__DISABLE_EARLY_WRACKS_FC__SHIFT
  7508. CB_HW_CONTROL_3__DISABLE_FAST_CLEAR_FETCH_OPT_MASK
  7509. CB_HW_CONTROL_3__DISABLE_FAST_CLEAR_FETCH_OPT__SHIFT
  7510. CB_HW_CONTROL_3__DISABLE_FMASK_NOFETCH_OPT_BC_MASK
  7511. CB_HW_CONTROL_3__DISABLE_FMASK_NOFETCH_OPT_BC__SHIFT
  7512. CB_HW_CONTROL_3__DISABLE_FMASK_NOFETCH_OPT_MASK
  7513. CB_HW_CONTROL_3__DISABLE_FMASK_NOFETCH_OPT__SHIFT
  7514. CB_HW_CONTROL_3__DISABLE_NACK_COLOR_RD_WR_OPT_MASK
  7515. CB_HW_CONTROL_3__DISABLE_NACK_COLOR_RD_WR_OPT__SHIFT
  7516. CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_CC_MASK
  7517. CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_CC__SHIFT
  7518. CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_CM_MASK
  7519. CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_CM__SHIFT
  7520. CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_DC_MASK
  7521. CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_DC__SHIFT
  7522. CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_FC_MASK
  7523. CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_FC__SHIFT
  7524. CB_HW_CONTROL_3__DISABLE_OC_FIXES_OF_BUG_522542_MASK
  7525. CB_HW_CONTROL_3__DISABLE_OC_FIXES_OF_BUG_522542__SHIFT
  7526. CB_HW_CONTROL_3__DISABLE_OVERWRITE_COMBINER_CAM_CLR_MASK
  7527. CB_HW_CONTROL_3__DISABLE_OVERWRITE_COMBINER_CAM_CLR__SHIFT
  7528. CB_HW_CONTROL_3__DISABLE_OVERWRITE_COMBINER_TARGET_MASK_VALIDATION_MASK
  7529. CB_HW_CONTROL_3__DISABLE_OVERWRITE_COMBINER_TARGET_MASK_VALIDATION__SHIFT
  7530. CB_HW_CONTROL_3__DISABLE_QUAD_MARKER_DROP_STOP_MASK
  7531. CB_HW_CONTROL_3__DISABLE_QUAD_MARKER_DROP_STOP__SHIFT
  7532. CB_HW_CONTROL_3__DISABLE_ROP3_FIXES_OF_BUG_511967_MASK
  7533. CB_HW_CONTROL_3__DISABLE_ROP3_FIXES_OF_BUG_511967__SHIFT
  7534. CB_HW_CONTROL_3__DISABLE_ROP3_FIXES_OF_BUG_520657_MASK
  7535. CB_HW_CONTROL_3__DISABLE_ROP3_FIXES_OF_BUG_520657__SHIFT
  7536. CB_HW_CONTROL_3__DISABLE_SHADER_BLEND_OPTS_MASK
  7537. CB_HW_CONTROL_3__DISABLE_SHADER_BLEND_OPTS__SHIFT
  7538. CB_HW_CONTROL_3__DISABLE_SLOW_MODE_EMPTY_HALF_QUAD_KILL_MASK
  7539. CB_HW_CONTROL_3__DISABLE_SLOW_MODE_EMPTY_HALF_QUAD_KILL__SHIFT
  7540. CB_HW_CONTROL_3__FORCE_RMI_CLKEN_HIGH_MASK
  7541. CB_HW_CONTROL_3__FORCE_RMI_CLKEN_HIGH__SHIFT
  7542. CB_HW_CONTROL_3__FORCE_RMI_LAST_HIGH_MASK
  7543. CB_HW_CONTROL_3__FORCE_RMI_LAST_HIGH__SHIFT
  7544. CB_HW_CONTROL_3__RAM_ADDRESS_CONFLICTS_DISALLOWED_MASK
  7545. CB_HW_CONTROL_3__RAM_ADDRESS_CONFLICTS_DISALLOWED__SHIFT
  7546. CB_HW_CONTROL_3__SPLIT_ALL_FAST_MODE_TRANSFERS_MASK
  7547. CB_HW_CONTROL_3__SPLIT_ALL_FAST_MODE_TRANSFERS__SHIFT
  7548. CB_HW_CONTROL_4__COLOR_CACHE_FETCH_NUM_CLS_LOG2_MASK
  7549. CB_HW_CONTROL_4__COLOR_CACHE_FETCH_NUM_CLS_LOG2__SHIFT
  7550. CB_HW_CONTROL_4__DISABLE_BC_COLOR_CACHE_PREFETCH_MASK
  7551. CB_HW_CONTROL_4__DISABLE_BC_COLOR_CACHE_PREFETCH__SHIFT
  7552. CB_HW_CONTROL_4__DISABLE_CMASK_CLOCK_GATING_MASK
  7553. CB_HW_CONTROL_4__DISABLE_CMASK_CLOCK_GATING__SHIFT
  7554. CB_HW_CONTROL_4__DISABLE_COLOR_CLOCK_GATING_MASK
  7555. CB_HW_CONTROL_4__DISABLE_COLOR_CLOCK_GATING__SHIFT
  7556. CB_HW_CONTROL_4__DISABLE_FMASK_CLOCK_GATING_MASK
  7557. CB_HW_CONTROL_4__DISABLE_FMASK_CLOCK_GATING__SHIFT
  7558. CB_HW_CONTROL_4__DISABLE_KEYXFR_HIT_RETURNS_MASK
  7559. CB_HW_CONTROL_4__DISABLE_KEYXFR_HIT_RETURNS__SHIFT
  7560. CB_HW_CONTROL_4__DISABLE_LQUAD_FGCG_MASK
  7561. CB_HW_CONTROL_4__DISABLE_LQUAD_FGCG__SHIFT
  7562. CB_HW_CONTROL_4__DISABLE_MA_WAIT_FOR_LAST_MASK
  7563. CB_HW_CONTROL_4__DISABLE_MA_WAIT_FOR_LAST__SHIFT
  7564. CB_HW_CONTROL_4__DISABLE_QSB_AA_MODE_MASK
  7565. CB_HW_CONTROL_4__DISABLE_QSB_AA_MODE__SHIFT
  7566. CB_HW_CONTROL_4__DISABLE_QSB_FRAG_GT0_MASK
  7567. CB_HW_CONTROL_4__DISABLE_QSB_FRAG_GT0__SHIFT
  7568. CB_HW_CONTROL_4__DISABLE_QSB_SPECULATIVE_MASK
  7569. CB_HW_CONTROL_4__DISABLE_QSB_SPECULATIVE__SHIFT
  7570. CB_HW_CONTROL_4__DISABLE_QSB_WAIT_FOR_SCORE_MASK
  7571. CB_HW_CONTROL_4__DISABLE_QSB_WAIT_FOR_SCORE__SHIFT
  7572. CB_HW_CONTROL_4__DISABLE_TILE_FGCG_MASK
  7573. CB_HW_CONTROL_4__DISABLE_TILE_FGCG__SHIFT
  7574. CB_HW_CONTROL_4__DISABLE_USE_OF_QUAD_SCOREBOARD_MASK
  7575. CB_HW_CONTROL_4__DISABLE_USE_OF_QUAD_SCOREBOARD__SHIFT
  7576. CB_HW_CONTROL_4__FC_QSB_FIFO_DEPTH_MASK
  7577. CB_HW_CONTROL_4__FC_QSB_FIFO_DEPTH__SHIFT
  7578. CB_HW_CONTROL_4__FMASK_CACHE_FETCH_NUM_CLS_LOG2_MASK
  7579. CB_HW_CONTROL_4__FMASK_CACHE_FETCH_NUM_CLS_LOG2__SHIFT
  7580. CB_HW_CONTROL_4__QSB_WAIT_FOR_SCORE_MASK
  7581. CB_HW_CONTROL_4__QSB_WAIT_FOR_SCORE__SHIFT
  7582. CB_HW_CONTROL_4__REVERSE_KEYXFR_RD_PRIORITY_MASK
  7583. CB_HW_CONTROL_4__REVERSE_KEYXFR_RD_PRIORITY__SHIFT
  7584. CB_HW_CONTROL__ALLOW_MRT_WITH_DUAL_SOURCE_MASK
  7585. CB_HW_CONTROL__ALLOW_MRT_WITH_DUAL_SOURCE__SHIFT
  7586. CB_HW_CONTROL__CC_CACHE_EVICT_POINT_MASK
  7587. CB_HW_CONTROL__CC_CACHE_EVICT_POINT__SHIFT
  7588. CB_HW_CONTROL__CM_CACHE_EVICT_POINT_MASK
  7589. CB_HW_CONTROL__CM_CACHE_EVICT_POINT__SHIFT
  7590. CB_HW_CONTROL__DISABLE_BLEND_OPT_BYPASS_MASK
  7591. CB_HW_CONTROL__DISABLE_BLEND_OPT_BYPASS__SHIFT
  7592. CB_HW_CONTROL__DISABLE_BLEND_OPT_DISCARD_PIXEL_MASK
  7593. CB_HW_CONTROL__DISABLE_BLEND_OPT_DISCARD_PIXEL__SHIFT
  7594. CB_HW_CONTROL__DISABLE_BLEND_OPT_DONT_RD_DST_MASK
  7595. CB_HW_CONTROL__DISABLE_BLEND_OPT_DONT_RD_DST__SHIFT
  7596. CB_HW_CONTROL__DISABLE_BLEND_OPT_RESULT_EQ_DEST_MASK
  7597. CB_HW_CONTROL__DISABLE_BLEND_OPT_RESULT_EQ_DEST__SHIFT
  7598. CB_HW_CONTROL__DISABLE_BLEND_OPT_WHEN_DISABLED_SRCALPHA_IS_USED_MASK
  7599. CB_HW_CONTROL__DISABLE_BLEND_OPT_WHEN_DISABLED_SRCALPHA_IS_USED__SHIFT
  7600. CB_HW_CONTROL__DISABLE_CC_IB_SERIALIZER_STATE_OPT_MASK
  7601. CB_HW_CONTROL__DISABLE_CC_IB_SERIALIZER_STATE_OPT__SHIFT
  7602. CB_HW_CONTROL__DISABLE_FULL_WRITE_MASK_MASK
  7603. CB_HW_CONTROL__DISABLE_FULL_WRITE_MASK__SHIFT
  7604. CB_HW_CONTROL__DISABLE_INTNORM_LE11BPC_CLAMPING_MASK
  7605. CB_HW_CONTROL__DISABLE_INTNORM_LE11BPC_CLAMPING__SHIFT
  7606. CB_HW_CONTROL__DISABLE_PIXEL_IN_QUAD_FIX_FOR_LINEAR_SURFACE_MASK
  7607. CB_HW_CONTROL__DISABLE_PIXEL_IN_QUAD_FIX_FOR_LINEAR_SURFACE__SHIFT
  7608. CB_HW_CONTROL__DISABLE_RESOLVE_OPT_FOR_SINGLE_FRAG_MASK
  7609. CB_HW_CONTROL__DISABLE_RESOLVE_OPT_FOR_SINGLE_FRAG__SHIFT
  7610. CB_HW_CONTROL__FC_CACHE_EVICT_POINT_MASK
  7611. CB_HW_CONTROL__FC_CACHE_EVICT_POINT__SHIFT
  7612. CB_HW_CONTROL__FORCE_ALWAYS_TOGGLE_MASK
  7613. CB_HW_CONTROL__FORCE_ALWAYS_TOGGLE__SHIFT
  7614. CB_HW_CONTROL__FORCE_NEEDS_DST_MASK
  7615. CB_HW_CONTROL__FORCE_NEEDS_DST__SHIFT
  7616. CB_HW_CONTROL__PRIORITIZE_FC_EVICT_OVER_FOP_RD_ON_BANK_CONFLICT_MASK
  7617. CB_HW_CONTROL__PRIORITIZE_FC_EVICT_OVER_FOP_RD_ON_BANK_CONFLICT__SHIFT
  7618. CB_HW_CONTROL__PRIORITIZE_FC_WR_OVER_FC_RD_ON_CMASK_CONFLICT_MASK
  7619. CB_HW_CONTROL__PRIORITIZE_FC_WR_OVER_FC_RD_ON_CMASK_CONFLICT__SHIFT
  7620. CB_HW_MEM_ARBITER_RD__BREAK_GROUP_AGE_MASK
  7621. CB_HW_MEM_ARBITER_RD__BREAK_GROUP_AGE__SHIFT
  7622. CB_HW_MEM_ARBITER_RD__IGNORE_URGENT_AGE_MASK
  7623. CB_HW_MEM_ARBITER_RD__IGNORE_URGENT_AGE__SHIFT
  7624. CB_HW_MEM_ARBITER_RD__MODE_MASK
  7625. CB_HW_MEM_ARBITER_RD__MODE__SHIFT
  7626. CB_HW_MEM_ARBITER_RD__SCALE_AGE_MASK
  7627. CB_HW_MEM_ARBITER_RD__SCALE_AGE__SHIFT
  7628. CB_HW_MEM_ARBITER_RD__SCALE_WEIGHT_MASK
  7629. CB_HW_MEM_ARBITER_RD__SCALE_WEIGHT__SHIFT
  7630. CB_HW_MEM_ARBITER_RD__SEND_LASTS_WITHIN_GROUPS_MASK
  7631. CB_HW_MEM_ARBITER_RD__SEND_LASTS_WITHIN_GROUPS__SHIFT
  7632. CB_HW_MEM_ARBITER_RD__WEIGHT_CC_MASK
  7633. CB_HW_MEM_ARBITER_RD__WEIGHT_CC__SHIFT
  7634. CB_HW_MEM_ARBITER_RD__WEIGHT_CM_MASK
  7635. CB_HW_MEM_ARBITER_RD__WEIGHT_CM__SHIFT
  7636. CB_HW_MEM_ARBITER_RD__WEIGHT_DC_MASK
  7637. CB_HW_MEM_ARBITER_RD__WEIGHT_DC__SHIFT
  7638. CB_HW_MEM_ARBITER_RD__WEIGHT_DECAY_NOREQS_MASK
  7639. CB_HW_MEM_ARBITER_RD__WEIGHT_DECAY_NOREQS__SHIFT
  7640. CB_HW_MEM_ARBITER_RD__WEIGHT_DECAY_REQS_MASK
  7641. CB_HW_MEM_ARBITER_RD__WEIGHT_DECAY_REQS__SHIFT
  7642. CB_HW_MEM_ARBITER_RD__WEIGHT_FC_MASK
  7643. CB_HW_MEM_ARBITER_RD__WEIGHT_FC__SHIFT
  7644. CB_HW_MEM_ARBITER_RD__WEIGHT_IGNORE_NUM_TIDS_MASK
  7645. CB_HW_MEM_ARBITER_RD__WEIGHT_IGNORE_NUM_TIDS__SHIFT
  7646. CB_HW_MEM_ARBITER_WR__BREAK_GROUP_AGE_MASK
  7647. CB_HW_MEM_ARBITER_WR__BREAK_GROUP_AGE__SHIFT
  7648. CB_HW_MEM_ARBITER_WR__IGNORE_URGENT_AGE_MASK
  7649. CB_HW_MEM_ARBITER_WR__IGNORE_URGENT_AGE__SHIFT
  7650. CB_HW_MEM_ARBITER_WR__MODE_MASK
  7651. CB_HW_MEM_ARBITER_WR__MODE__SHIFT
  7652. CB_HW_MEM_ARBITER_WR__SCALE_AGE_MASK
  7653. CB_HW_MEM_ARBITER_WR__SCALE_AGE__SHIFT
  7654. CB_HW_MEM_ARBITER_WR__SCALE_WEIGHT_MASK
  7655. CB_HW_MEM_ARBITER_WR__SCALE_WEIGHT__SHIFT
  7656. CB_HW_MEM_ARBITER_WR__SEND_LASTS_WITHIN_GROUPS_MASK
  7657. CB_HW_MEM_ARBITER_WR__SEND_LASTS_WITHIN_GROUPS__SHIFT
  7658. CB_HW_MEM_ARBITER_WR__WEIGHT_CC_MASK
  7659. CB_HW_MEM_ARBITER_WR__WEIGHT_CC__SHIFT
  7660. CB_HW_MEM_ARBITER_WR__WEIGHT_CM_MASK
  7661. CB_HW_MEM_ARBITER_WR__WEIGHT_CM__SHIFT
  7662. CB_HW_MEM_ARBITER_WR__WEIGHT_DC_MASK
  7663. CB_HW_MEM_ARBITER_WR__WEIGHT_DC__SHIFT
  7664. CB_HW_MEM_ARBITER_WR__WEIGHT_DECAY_NOREQS_MASK
  7665. CB_HW_MEM_ARBITER_WR__WEIGHT_DECAY_NOREQS__SHIFT
  7666. CB_HW_MEM_ARBITER_WR__WEIGHT_DECAY_REQS_MASK
  7667. CB_HW_MEM_ARBITER_WR__WEIGHT_DECAY_REQS__SHIFT
  7668. CB_HW_MEM_ARBITER_WR__WEIGHT_FC_MASK
  7669. CB_HW_MEM_ARBITER_WR__WEIGHT_FC__SHIFT
  7670. CB_HW_MEM_ARBITER_WR__WEIGHT_IGNORE_BYTE_MASK_MASK
  7671. CB_HW_MEM_ARBITER_WR__WEIGHT_IGNORE_BYTE_MASK__SHIFT
  7672. CB_ID
  7673. CB_IMA
  7674. CB_IMMED0_BASE
  7675. CB_IMMED10_BASE
  7676. CB_IMMED11_BASE
  7677. CB_IMMED1_BASE
  7678. CB_IMMED2_BASE
  7679. CB_IMMED3_BASE
  7680. CB_IMMED4_BASE
  7681. CB_IMMED5_BASE
  7682. CB_IMMED6_BASE
  7683. CB_IMMED7_BASE
  7684. CB_IMMED8_BASE
  7685. CB_IMMED9_BASE
  7686. CB_INIT_RD_NUM
  7687. CB_INIT_RD_NUM_3119
  7688. CB_INIT_TD_NUM
  7689. CB_INIT_TD_NUM_3119
  7690. CB_INT_ENABLED
  7691. CB_IO_MODE
  7692. CB_IREQCINT
  7693. CB_LAST_VALID
  7694. CB_LEGACY_MODE_BASE
  7695. CB_MACRO_TILE_ASPECT
  7696. CB_MAGIC
  7697. CB_MAXIM2829_CHANNEL_5G_HIGH
  7698. CB_MAX_BUF_SIZE
  7699. CB_MAX_CHANNEL
  7700. CB_MAX_CHANNEL_24G
  7701. CB_MAX_CHANNEL_5G
  7702. CB_MAX_LENGTH
  7703. CB_MAX_MAP_REG_NUM
  7704. CB_MAX_RD_NUM
  7705. CB_MAX_RECEIVED_PACKETS
  7706. CB_MAX_RX_BUF_SIZE_NORMAL
  7707. CB_MAX_RX_DESC
  7708. CB_MAX_SEGMENT
  7709. CB_MAX_SEG_PER_PKT
  7710. CB_MAX_TD_NUM
  7711. CB_MAX_TX_ABORT_RETRY
  7712. CB_MAX_TX_BUF_SIZE
  7713. CB_MAX_TX_DESC
  7714. CB_MEM_PAGE
  7715. CB_MIN_MAP_REG_NUM
  7716. CB_MIN_RX_DESC
  7717. CB_MIN_TX_DESC
  7718. CB_MMIO_MODE
  7719. CB_MRT0_EPITCH__EPITCH_MASK
  7720. CB_MRT0_EPITCH__EPITCH__SHIFT
  7721. CB_MRT1_EPITCH__EPITCH_MASK
  7722. CB_MRT1_EPITCH__EPITCH__SHIFT
  7723. CB_MRT2_EPITCH__EPITCH_MASK
  7724. CB_MRT2_EPITCH__EPITCH__SHIFT
  7725. CB_MRT3_EPITCH__EPITCH_MASK
  7726. CB_MRT3_EPITCH__EPITCH__SHIFT
  7727. CB_MRT4_EPITCH__EPITCH_MASK
  7728. CB_MRT4_EPITCH__EPITCH__SHIFT
  7729. CB_MRT5_EPITCH__EPITCH_MASK
  7730. CB_MRT5_EPITCH__EPITCH__SHIFT
  7731. CB_MRT6_EPITCH__EPITCH_MASK
  7732. CB_MRT6_EPITCH__EPITCH__SHIFT
  7733. CB_MRT7_EPITCH__EPITCH_MASK
  7734. CB_MRT7_EPITCH__EPITCH__SHIFT
  7735. CB_NORMAL
  7736. CB_NOTACARD
  7737. CB_NULL
  7738. CB_NUMBER_OF_ELEMENTS_SMALL
  7739. CB_NUM_BANKS
  7740. CB_OP_DEVICENOTIFY_RES_MAXSZ
  7741. CB_OP_GETATTR_BITMAP_MAXSZ
  7742. CB_OP_GETATTR_RES_MAXSZ
  7743. CB_OP_HDR_RES_MAXSZ
  7744. CB_OP_LAYOUTRECALL_RES_MAXSZ
  7745. CB_OP_NOTIFY_LOCK_RES_MAXSZ
  7746. CB_OP_OFFLOAD_RES_MAXSZ
  7747. CB_OP_RECALLANY_RES_MAXSZ
  7748. CB_OP_RECALLSLOT_RES_MAXSZ
  7749. CB_OP_RECALL_RES_MAXSZ
  7750. CB_OP_SEQUENCE_RES_MAXSZ
  7751. CB_OP_TAGLEN_MAXSZ
  7752. CB_PAR_F
  7753. CB_PAYLOAD_SIZE
  7754. CB_PERFCOUNTER0_HI__PERFCOUNTER_HI_MASK
  7755. CB_PERFCOUNTER0_HI__PERFCOUNTER_HI__SHIFT
  7756. CB_PERFCOUNTER0_LO__PERFCOUNTER_LO_MASK
  7757. CB_PERFCOUNTER0_LO__PERFCOUNTER_LO__SHIFT
  7758. CB_PERFCOUNTER0_SELECT0
  7759. CB_PERFCOUNTER0_SELECT1
  7760. CB_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK
  7761. CB_PERFCOUNTER0_SELECT1__PERF_MODE2__SHIFT
  7762. CB_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK
  7763. CB_PERFCOUNTER0_SELECT1__PERF_MODE3__SHIFT
  7764. CB_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK
  7765. CB_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT
  7766. CB_PERFCOUNTER0_SELECT1__PERF_SEL3_MASK
  7767. CB_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT
  7768. CB_PERFCOUNTER0_SELECT__CNTR_MODE_MASK
  7769. CB_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT
  7770. CB_PERFCOUNTER0_SELECT__PERF_MODE1_MASK
  7771. CB_PERFCOUNTER0_SELECT__PERF_MODE1__SHIFT
  7772. CB_PERFCOUNTER0_SELECT__PERF_MODE_MASK
  7773. CB_PERFCOUNTER0_SELECT__PERF_MODE__SHIFT
  7774. CB_PERFCOUNTER0_SELECT__PERF_SEL1_MASK
  7775. CB_PERFCOUNTER0_SELECT__PERF_SEL1__SHIFT
  7776. CB_PERFCOUNTER0_SELECT__PERF_SEL_MASK
  7777. CB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT
  7778. CB_PERFCOUNTER1_HI__PERFCOUNTER_HI_MASK
  7779. CB_PERFCOUNTER1_HI__PERFCOUNTER_HI__SHIFT
  7780. CB_PERFCOUNTER1_LO__PERFCOUNTER_LO_MASK
  7781. CB_PERFCOUNTER1_LO__PERFCOUNTER_LO__SHIFT
  7782. CB_PERFCOUNTER1_SELECT0
  7783. CB_PERFCOUNTER1_SELECT1
  7784. CB_PERFCOUNTER1_SELECT__PERF_MODE_MASK
  7785. CB_PERFCOUNTER1_SELECT__PERF_MODE__SHIFT
  7786. CB_PERFCOUNTER1_SELECT__PERF_SEL_MASK
  7787. CB_PERFCOUNTER1_SELECT__PERF_SEL__SHIFT
  7788. CB_PERFCOUNTER2_HI__PERFCOUNTER_HI_MASK
  7789. CB_PERFCOUNTER2_HI__PERFCOUNTER_HI__SHIFT
  7790. CB_PERFCOUNTER2_LO__PERFCOUNTER_LO_MASK
  7791. CB_PERFCOUNTER2_LO__PERFCOUNTER_LO__SHIFT
  7792. CB_PERFCOUNTER2_SELECT0
  7793. CB_PERFCOUNTER2_SELECT1
  7794. CB_PERFCOUNTER2_SELECT__PERF_MODE_MASK
  7795. CB_PERFCOUNTER2_SELECT__PERF_MODE__SHIFT
  7796. CB_PERFCOUNTER2_SELECT__PERF_SEL_MASK
  7797. CB_PERFCOUNTER2_SELECT__PERF_SEL__SHIFT
  7798. CB_PERFCOUNTER3_HI__PERFCOUNTER_HI_MASK
  7799. CB_PERFCOUNTER3_HI__PERFCOUNTER_HI__SHIFT
  7800. CB_PERFCOUNTER3_LO__PERFCOUNTER_LO_MASK
  7801. CB_PERFCOUNTER3_LO__PERFCOUNTER_LO__SHIFT
  7802. CB_PERFCOUNTER3_SELECT0
  7803. CB_PERFCOUNTER3_SELECT1
  7804. CB_PERFCOUNTER3_SELECT__PERF_MODE_MASK
  7805. CB_PERFCOUNTER3_SELECT__PERF_MODE__SHIFT
  7806. CB_PERFCOUNTER3_SELECT__PERF_SEL_MASK
  7807. CB_PERFCOUNTER3_SELECT__PERF_SEL__SHIFT
  7808. CB_PERFCOUNTER_FILTER__CLEAR_FILTER_ENABLE_MASK
  7809. CB_PERFCOUNTER_FILTER__CLEAR_FILTER_ENABLE__SHIFT
  7810. CB_PERFCOUNTER_FILTER__CLEAR_FILTER_SEL_MASK
  7811. CB_PERFCOUNTER_FILTER__CLEAR_FILTER_SEL__SHIFT
  7812. CB_PERFCOUNTER_FILTER__FORMAT_FILTER_ENABLE_MASK
  7813. CB_PERFCOUNTER_FILTER__FORMAT_FILTER_ENABLE__SHIFT
  7814. CB_PERFCOUNTER_FILTER__FORMAT_FILTER_SEL_MASK
  7815. CB_PERFCOUNTER_FILTER__FORMAT_FILTER_SEL__SHIFT
  7816. CB_PERFCOUNTER_FILTER__MRT_FILTER_ENABLE_MASK
  7817. CB_PERFCOUNTER_FILTER__MRT_FILTER_ENABLE__SHIFT
  7818. CB_PERFCOUNTER_FILTER__MRT_FILTER_SEL_MASK
  7819. CB_PERFCOUNTER_FILTER__MRT_FILTER_SEL__SHIFT
  7820. CB_PERFCOUNTER_FILTER__NUM_FRAGMENTS_FILTER_ENABLE_MASK
  7821. CB_PERFCOUNTER_FILTER__NUM_FRAGMENTS_FILTER_ENABLE__SHIFT
  7822. CB_PERFCOUNTER_FILTER__NUM_FRAGMENTS_FILTER_SEL_MASK
  7823. CB_PERFCOUNTER_FILTER__NUM_FRAGMENTS_FILTER_SEL__SHIFT
  7824. CB_PERFCOUNTER_FILTER__NUM_SAMPLES_FILTER_ENABLE_MASK
  7825. CB_PERFCOUNTER_FILTER__NUM_SAMPLES_FILTER_ENABLE__SHIFT
  7826. CB_PERFCOUNTER_FILTER__NUM_SAMPLES_FILTER_SEL_MASK
  7827. CB_PERFCOUNTER_FILTER__NUM_SAMPLES_FILTER_SEL__SHIFT
  7828. CB_PERFCOUNTER_FILTER__OP_FILTER_ENABLE_MASK
  7829. CB_PERFCOUNTER_FILTER__OP_FILTER_ENABLE__SHIFT
  7830. CB_PERFCOUNTER_FILTER__OP_FILTER_SEL_MASK
  7831. CB_PERFCOUNTER_FILTER__OP_FILTER_SEL__SHIFT
  7832. CB_PERF_CLEAR_FILTER_SEL_CLEAR
  7833. CB_PERF_CLEAR_FILTER_SEL_NONCLEAR
  7834. CB_PERF_CTR0_SEL_0
  7835. CB_PERF_CTR0_SEL_1
  7836. CB_PERF_CTR1_SEL_0
  7837. CB_PERF_CTR1_SEL_1
  7838. CB_PERF_CTR2_SEL_0
  7839. CB_PERF_CTR2_SEL_1
  7840. CB_PERF_CTR3_SEL_0
  7841. CB_PERF_CTR3_SEL_1
  7842. CB_PERF_OP_FILTER_SEL_DECOMPRESS
  7843. CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR
  7844. CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS
  7845. CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION
  7846. CB_PERF_OP_FILTER_SEL_RESOLVE
  7847. CB_PERF_OP_FILTER_SEL_WRITE_ONLY
  7848. CB_PERF_SEL_BLENDER_RAW_HAZARD_STALL
  7849. CB_PERF_SEL_BLEND_OPT_PIXELS_RESULT_EQ_DEST
  7850. CB_PERF_SEL_BUSY
  7851. CB_PERF_SEL_CB_TAP_RDREQ_VALIDB_READY
  7852. CB_PERF_SEL_CB_TAP_RDREQ_VALIDB_READYB
  7853. CB_PERF_SEL_CB_TAP_RDREQ_VALID_READY
  7854. CB_PERF_SEL_CB_TAP_RDREQ_VALID_READYB
  7855. CB_PERF_SEL_CB_TAP_WRREQ_VALIDB_READY
  7856. CB_PERF_SEL_CB_TAP_WRREQ_VALIDB_READYB
  7857. CB_PERF_SEL_CB_TAP_WRREQ_VALID_READY
  7858. CB_PERF_SEL_CB_TAP_WRREQ_VALID_READYB
  7859. CB_PERF_SEL_CCR_TO_CCW_REGION_BUSY
  7860. CB_PERF_SEL_CC_BB_BLEND_PIXEL_VLD
  7861. CB_PERF_SEL_CC_BC_CS_FRAG_VALID
  7862. CB_PERF_SEL_CC_CACHE_ACK_OUTPUT_STALL
  7863. CB_PERF_SEL_CC_CACHE_DIRTY_SECTORS_FLUSHED
  7864. CB_PERF_SEL_CC_CACHE_EVICT_NONZERO_INFLIGHT_STALL
  7865. CB_PERF_SEL_CC_CACHE_FLUSH
  7866. CB_PERF_SEL_CC_CACHE_HIT
  7867. CB_PERF_SEL_CC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL
  7868. CB_PERF_SEL_CC_CACHE_READS_SAVED_DUE_TO_DCC
  7869. CB_PERF_SEL_CC_CACHE_READ_OUTPUT_STALL
  7870. CB_PERF_SEL_CC_CACHE_REEVICTION_STALL
  7871. CB_PERF_SEL_CC_CACHE_REPLACE_PENDING_EVICT_STALL
  7872. CB_PERF_SEL_CC_CACHE_SECTORS_FLUSHED
  7873. CB_PERF_SEL_CC_CACHE_SECTOR_MISS
  7874. CB_PERF_SEL_CC_CACHE_STALL
  7875. CB_PERF_SEL_CC_CACHE_TAGS_FLUSHED
  7876. CB_PERF_SEL_CC_CACHE_TAG_MISS
  7877. CB_PERF_SEL_CC_CACHE_WA_TO_RMW_CONVERSION
  7878. CB_PERF_SEL_CC_CACHE_WRITE_OUTPUT_STALL
  7879. CB_PERF_SEL_CC_DCC_BEYOND_TILE_SPLIT
  7880. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_2TO1
  7881. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_4TO1
  7882. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_4TO2
  7883. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_4TO3
  7884. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO1
  7885. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO2
  7886. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO3
  7887. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO4
  7888. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO5
  7889. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO1
  7890. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO2
  7891. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO3
  7892. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO4
  7893. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO5
  7894. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO6
  7895. CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO7
  7896. CB_PERF_SEL_CC_DCC_COMPRESS_TIDS_IN
  7897. CB_PERF_SEL_CC_DCC_COMPRESS_TIDS_OUT
  7898. CB_PERF_SEL_CC_DCC_DECOMPRESS_TIDS_IN
  7899. CB_PERF_SEL_CC_DCC_DECOMPRESS_TIDS_OUT
  7900. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_2TO2__1BLOCK_2TO1__1BLOCK_2TO2
  7901. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_2TO2__1BLOCK_4TO1
  7902. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_2TO2__1BLOCK_4TO2
  7903. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_2TO2__1BLOCK_4TO3
  7904. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_2TO2__1BLOCK_4TO4
  7905. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_2TO2__2BLOCKS_2TO1
  7906. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO1__1BLOCK_2TO1
  7907. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO1__1BLOCK_2TO2
  7908. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO2__1BLOCK_2TO1
  7909. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO2__1BLOCK_2TO2
  7910. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO3__1BLOCK_2TO1
  7911. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO3__1BLOCK_2TO2
  7912. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO4__1BLOCK_2TO1
  7913. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO4__1BLOCK_2TO2
  7914. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_6TO1
  7915. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_6TO2
  7916. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_6TO3
  7917. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_6TO4
  7918. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_6TO5
  7919. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_6TO6
  7920. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__2BLOCKS_2TO2__1BLOCK_2TO1
  7921. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__3BLOCKS_2TO2
  7922. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__INV0
  7923. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__INV1
  7924. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_2TO1__1BLOCK_2TO2__1BLOCK_2TO1
  7925. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_2TO1__1BLOCK_4TO1
  7926. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_2TO1__1BLOCK_4TO2
  7927. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_2TO1__1BLOCK_4TO3
  7928. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_2TO1__1BLOCK_4TO4
  7929. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_2TO1__2BLOCKS_2TO2
  7930. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_4TO1__1BLOCK_2TO1
  7931. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_4TO1__1BLOCK_2TO2
  7932. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_4TO2__1BLOCK_2TO1
  7933. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_4TO2__1BLOCK_2TO2
  7934. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_4TO3__1BLOCK_2TO1
  7935. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_4TO3__1BLOCK_2TO2
  7936. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_4TO4__1BLOCK_2TO1
  7937. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_6TO1
  7938. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_6TO2
  7939. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_6TO3
  7940. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_6TO4
  7941. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__1BLOCK_6TO5
  7942. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__2BLOCKS_2TO1__1BLOCK_2TO2
  7943. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__3BLOCKS_2TO1
  7944. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__INV0
  7945. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__INV1
  7946. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO1__1BLOCK_2TO1__1BLOCK_2TO2
  7947. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO1__1BLOCK_2TO2__1BLOCK_2TO1
  7948. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO1__1BLOCK_4TO2
  7949. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO1__1BLOCK_4TO3
  7950. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO1__1BLOCK_4TO4
  7951. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO1__2BLOCKS_2TO1
  7952. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO1__2BLOCKS_2TO2
  7953. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO2__1BLOCK_2TO1__1BLOCK_2TO2
  7954. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO2__1BLOCK_2TO2__1BLOCK_2TO1
  7955. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO2__1BLOCK_4TO1
  7956. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO2__1BLOCK_4TO3
  7957. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO2__1BLOCK_4TO4
  7958. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO2__2BLOCKS_2TO1
  7959. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO2__2BLOCKS_2TO2
  7960. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO3__1BLOCK_2TO1__1BLOCK_2TO2
  7961. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO3__1BLOCK_2TO2__1BLOCK_2TO1
  7962. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO3__1BLOCK_4TO1
  7963. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO3__1BLOCK_4TO2
  7964. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO3__1BLOCK_4TO4
  7965. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO3__2BLOCKS_2TO1
  7966. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO3__2BLOCKS_2TO2
  7967. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO4__1BLOCK_2TO1__1BLOCK_2TO2
  7968. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO4__1BLOCK_2TO2__1BLOCK_2TO1
  7969. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO4__1BLOCK_4TO1
  7970. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO4__1BLOCK_4TO2
  7971. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO4__1BLOCK_4TO3
  7972. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_4TO4__2BLOCKS_2TO1
  7973. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO1__1BLOCK_2TO1
  7974. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO1__1BLOCK_2TO2
  7975. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO2__1BLOCK_2TO1
  7976. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO2__1BLOCK_2TO2
  7977. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO3__1BLOCK_2TO1
  7978. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO3__1BLOCK_2TO2
  7979. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO4__1BLOCK_2TO1
  7980. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO4__1BLOCK_2TO2
  7981. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO5__1BLOCK_2TO1
  7982. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO5__1BLOCK_2TO2
  7983. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_6TO6__1BLOCK_2TO1
  7984. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO1
  7985. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO2
  7986. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO3
  7987. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO4
  7988. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO5
  7989. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO6
  7990. CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO7
  7991. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO1__1BLOCK_2TO2__1BLOCK_2TO1
  7992. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO1__1BLOCK_4TO1
  7993. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO1__1BLOCK_4TO2
  7994. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO1__1BLOCK_4TO3
  7995. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO1__1BLOCK_4TO4
  7996. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO1__2BLOCKS_2TO2
  7997. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO2__1BLOCK_2TO1__1BLOCK_2TO2
  7998. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO2__1BLOCK_4TO1
  7999. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO2__1BLOCK_4TO2
  8000. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO2__1BLOCK_4TO3
  8001. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_2TO2__2BLOCKS_2TO1
  8002. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_4TO1
  8003. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_4TO2
  8004. CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_4TO3
  8005. CB_PERF_SEL_CC_DCC_KEY_VALUE__3BLOCKS_2TO1__1BLOCK_2TO2
  8006. CB_PERF_SEL_CC_DCC_KEY_VALUE__3BLOCKS_2TO2__1BLOCK_2TO1
  8007. CB_PERF_SEL_CC_DCC_KEY_VALUE__4_BLOCKS__2TO1
  8008. CB_PERF_SEL_CC_DCC_KEY_VALUE__INV0__1BLOCK_2TO1
  8009. CB_PERF_SEL_CC_DCC_KEY_VALUE__INV0__1BLOCK_2TO2
  8010. CB_PERF_SEL_CC_DCC_KEY_VALUE__INV1__1BLOCK_2TO1
  8011. CB_PERF_SEL_CC_DCC_KEY_VALUE__INV1__1BLOCK_2TO2
  8012. CB_PERF_SEL_CC_DCC_KEY_VALUE__UNCOMPRESSED
  8013. CB_PERF_SEL_CC_DCC_RDREQ_STALL
  8014. CB_PERF_SEL_CC_EVENFIFO_QUAD_RESIDENCY_STALL
  8015. CB_PERF_SEL_CC_EVENFIFO_STUTTER_STALL
  8016. CB_PERF_SEL_CC_IB_SR_FRAG_VALIDB_READY
  8017. CB_PERF_SEL_CC_IB_SR_FRAG_VALIDB_READYB
  8018. CB_PERF_SEL_CC_IB_SR_FRAG_VALID_READY
  8019. CB_PERF_SEL_CC_IB_SR_FRAG_VALID_READYB
  8020. CB_PERF_SEL_CC_IB_TB_FRAG_VALIDB_READY
  8021. CB_PERF_SEL_CC_IB_TB_FRAG_VALIDB_READYB
  8022. CB_PERF_SEL_CC_IB_TB_FRAG_VALID_READY
  8023. CB_PERF_SEL_CC_IB_TB_FRAG_VALID_READYB
  8024. CB_PERF_SEL_CC_MC_EARLY_WRITE_REQUESTS_IN_FLIGHT
  8025. CB_PERF_SEL_CC_MC_EARLY_WRITE_RETURN
  8026. CB_PERF_SEL_CC_MC_READ_REQUEST
  8027. CB_PERF_SEL_CC_MC_READ_REQUESTS_IN_FLIGHT
  8028. CB_PERF_SEL_CC_MC_WRITE_ACK64B
  8029. CB_PERF_SEL_CC_MC_WRITE_REQUEST
  8030. CB_PERF_SEL_CC_MC_WRITE_REQUESTS_IN_FLIGHT
  8031. CB_PERF_SEL_CC_MC_WRITE_REQUEST_PARTIAL
  8032. CB_PERF_SEL_CC_ODDFIFO_QUAD_RESIDENCY_STALL
  8033. CB_PERF_SEL_CC_ODDFIFO_STUTTER_STALL
  8034. CB_PERF_SEL_CC_RB_BC_EVENFRAG_VALIDB_READY
  8035. CB_PERF_SEL_CC_RB_BC_EVENFRAG_VALIDB_READYB
  8036. CB_PERF_SEL_CC_RB_BC_EVENFRAG_VALID_READY
  8037. CB_PERF_SEL_CC_RB_BC_EVENFRAG_VALID_READYB
  8038. CB_PERF_SEL_CC_RB_BC_ODDFRAG_VALIDB_READY
  8039. CB_PERF_SEL_CC_RB_BC_ODDFRAG_VALIDB_READYB
  8040. CB_PERF_SEL_CC_RB_BC_ODDFRAG_VALID_READY
  8041. CB_PERF_SEL_CC_RB_BC_ODDFRAG_VALID_READYB
  8042. CB_PERF_SEL_CC_RB_FULL
  8043. CB_PERF_SEL_CC_SF_FULL
  8044. CB_PERF_SEL_CC_SURFACE_SYNC
  8045. CB_PERF_SEL_CMASK_READ_DATA_0xC
  8046. CB_PERF_SEL_CMASK_READ_DATA_0xD
  8047. CB_PERF_SEL_CMASK_READ_DATA_0xE
  8048. CB_PERF_SEL_CMASK_READ_DATA_0xF
  8049. CB_PERF_SEL_CMASK_WRITE_DATA_0xC
  8050. CB_PERF_SEL_CMASK_WRITE_DATA_0xD
  8051. CB_PERF_SEL_CMASK_WRITE_DATA_0xE
  8052. CB_PERF_SEL_CMASK_WRITE_DATA_0xF
  8053. CB_PERF_SEL_CMR_TO_FCR_REGION_BUSY
  8054. CB_PERF_SEL_CM_CACHE_ACK_OUTPUT_STALL
  8055. CB_PERF_SEL_CM_CACHE_DIRTY_SECTORS_FLUSHED
  8056. CB_PERF_SEL_CM_CACHE_EVICT_NONZERO_INFLIGHT_STALL
  8057. CB_PERF_SEL_CM_CACHE_FLUSH
  8058. CB_PERF_SEL_CM_CACHE_HIT
  8059. CB_PERF_SEL_CM_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL
  8060. CB_PERF_SEL_CM_CACHE_READ_OUTPUT_STALL
  8061. CB_PERF_SEL_CM_CACHE_REEVICTION_STALL
  8062. CB_PERF_SEL_CM_CACHE_REPLACE_PENDING_EVICT_STALL
  8063. CB_PERF_SEL_CM_CACHE_SECTORS_FLUSHED
  8064. CB_PERF_SEL_CM_CACHE_SECTOR_MISS
  8065. CB_PERF_SEL_CM_CACHE_STALL
  8066. CB_PERF_SEL_CM_CACHE_TAGS_FLUSHED
  8067. CB_PERF_SEL_CM_CACHE_TAG_MISS
  8068. CB_PERF_SEL_CM_CACHE_WRITE_OUTPUT_STALL
  8069. CB_PERF_SEL_CM_FC_TILE_VALIDB_READY
  8070. CB_PERF_SEL_CM_FC_TILE_VALIDB_READYB
  8071. CB_PERF_SEL_CM_FC_TILE_VALID_READY
  8072. CB_PERF_SEL_CM_FC_TILE_VALID_READYB
  8073. CB_PERF_SEL_CM_MC_EARLY_WRITE_REQUESTS_IN_FLIGHT
  8074. CB_PERF_SEL_CM_MC_EARLY_WRITE_RETURN
  8075. CB_PERF_SEL_CM_MC_READ_REQUEST
  8076. CB_PERF_SEL_CM_MC_READ_REQUESTS_IN_FLIGHT
  8077. CB_PERF_SEL_CM_MC_WRITE_ACK64B
  8078. CB_PERF_SEL_CM_MC_WRITE_REQUEST
  8079. CB_PERF_SEL_CM_MC_WRITE_REQUESTS_IN_FLIGHT
  8080. CB_PERF_SEL_CM_TQ_FIFO_STUTTER_STALL
  8081. CB_PERF_SEL_CM_TQ_FIFO_TILE_RESIDENCY_STALL
  8082. CB_PERF_SEL_CM_TQ_FULL
  8083. CB_PERF_SEL_CORE_SCLK_VLD
  8084. CB_PERF_SEL_DB_CB_CONTEXT_DONE
  8085. CB_PERF_SEL_DB_CB_EOP_DONE
  8086. CB_PERF_SEL_DB_CB_LQUAD_VALIDB_READY
  8087. CB_PERF_SEL_DB_CB_LQUAD_VALIDB_READYB
  8088. CB_PERF_SEL_DB_CB_LQUAD_VALID_READY
  8089. CB_PERF_SEL_DB_CB_LQUAD_VALID_READYB
  8090. CB_PERF_SEL_DB_CB_TILE_TILENOTEVENT
  8091. CB_PERF_SEL_DB_CB_TILE_VALIDB_READY
  8092. CB_PERF_SEL_DB_CB_TILE_VALIDB_READYB
  8093. CB_PERF_SEL_DB_CB_TILE_VALID_READY
  8094. CB_PERF_SEL_DB_CB_TILE_VALID_READYB
  8095. CB_PERF_SEL_DC_MC_EARLY_WRITE_REQUESTS_IN_FLIGHT
  8096. CB_PERF_SEL_DC_MC_EARLY_WRITE_RETURN
  8097. CB_PERF_SEL_DC_MC_WRITE_ACK64B
  8098. CB_PERF_SEL_DRAWN_BUSY
  8099. CB_PERF_SEL_DRAWN_PIXEL
  8100. CB_PERF_SEL_DRAWN_QUAD
  8101. CB_PERF_SEL_DRAWN_QUAD_FRAGMENT
  8102. CB_PERF_SEL_DRAWN_TILE
  8103. CB_PERF_SEL_DUAL_SOURCE_COLOR_QUAD_FRAGMENT
  8104. CB_PERF_SEL_EVENT
  8105. CB_PERF_SEL_EVENT_BOTTOM_OF_PIPE_TS
  8106. CB_PERF_SEL_EVENT_CACHE_FLUSH
  8107. CB_PERF_SEL_EVENT_CACHE_FLUSH_AND_INV_EVENT
  8108. CB_PERF_SEL_EVENT_CACHE_FLUSH_AND_INV_TS_EVENT
  8109. CB_PERF_SEL_EVENT_CACHE_FLUSH_TS
  8110. CB_PERF_SEL_EVENT_CONTEXT_DONE
  8111. CB_PERF_SEL_EVENT_FLUSH_AND_INV_CB_DATA_TS
  8112. CB_PERF_SEL_EVENT_FLUSH_AND_INV_CB_META
  8113. CB_PERF_SEL_EVENT_FLUSH_AND_INV_CB_PIXEL_DATA
  8114. CB_PERF_SEL_EVENT_FLUSH_AND_INV_DB_DATA_TS
  8115. CB_PERF_SEL_EXPORT_32_ABGR_QUAD_FRAGMENT
  8116. CB_PERF_SEL_FCR_TO_CCR_REGION_BUSY
  8117. CB_PERF_SEL_FC_CACHE_ACK_OUTPUT_STALL
  8118. CB_PERF_SEL_FC_CACHE_DIRTY_SECTORS_FLUSHED
  8119. CB_PERF_SEL_FC_CACHE_EVICT_NONZERO_INFLIGHT_STALL
  8120. CB_PERF_SEL_FC_CACHE_FLUSH
  8121. CB_PERF_SEL_FC_CACHE_HIT
  8122. CB_PERF_SEL_FC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL
  8123. CB_PERF_SEL_FC_CACHE_READ_OUTPUT_STALL
  8124. CB_PERF_SEL_FC_CACHE_REEVICTION_STALL
  8125. CB_PERF_SEL_FC_CACHE_REPLACE_PENDING_EVICT_STALL
  8126. CB_PERF_SEL_FC_CACHE_SECTORS_FLUSHED
  8127. CB_PERF_SEL_FC_CACHE_SECTOR_MISS
  8128. CB_PERF_SEL_FC_CACHE_STALL
  8129. CB_PERF_SEL_FC_CACHE_TAGS_FLUSHED
  8130. CB_PERF_SEL_FC_CACHE_TAG_MISS
  8131. CB_PERF_SEL_FC_CACHE_WRITE_OUTPUT_STALL
  8132. CB_PERF_SEL_FC_CC_QUADFRAG_VALIDB_READY
  8133. CB_PERF_SEL_FC_CC_QUADFRAG_VALIDB_READYB
  8134. CB_PERF_SEL_FC_CC_QUADFRAG_VALID_READY
  8135. CB_PERF_SEL_FC_CC_QUADFRAG_VALID_READYB
  8136. CB_PERF_SEL_FC_CLEAR_QUAD_VALIDB_READY
  8137. CB_PERF_SEL_FC_CLEAR_QUAD_VALIDB_READYB
  8138. CB_PERF_SEL_FC_CLEAR_QUAD_VALID_READY
  8139. CB_PERF_SEL_FC_CLEAR_QUAD_VALID_READYB
  8140. CB_PERF_SEL_FC_DCC_CACHE_ACK_OUTPUT_STALL
  8141. CB_PERF_SEL_FC_DCC_CACHE_DIRTY_SECTORS_FLUSHED
  8142. CB_PERF_SEL_FC_DCC_CACHE_EVICT_NONZERO_INFLIGHT_STALL
  8143. CB_PERF_SEL_FC_DCC_CACHE_FLUSH
  8144. CB_PERF_SEL_FC_DCC_CACHE_HIT
  8145. CB_PERF_SEL_FC_DCC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL
  8146. CB_PERF_SEL_FC_DCC_CACHE_READ_OUTPUT_STALL
  8147. CB_PERF_SEL_FC_DCC_CACHE_REEVICTION_STALL
  8148. CB_PERF_SEL_FC_DCC_CACHE_REPLACE_PENDING_EVICT_STALL
  8149. CB_PERF_SEL_FC_DCC_CACHE_SECTORS_FLUSHED
  8150. CB_PERF_SEL_FC_DCC_CACHE_SECTOR_MISS
  8151. CB_PERF_SEL_FC_DCC_CACHE_STALL
  8152. CB_PERF_SEL_FC_DCC_CACHE_TAGS_FLUSHED
  8153. CB_PERF_SEL_FC_DCC_CACHE_TAG_MISS
  8154. CB_PERF_SEL_FC_DCC_CACHE_WRITE_OUTPUT_STALL
  8155. CB_PERF_SEL_FC_DCC_KEY_VALUE__CLEAR
  8156. CB_PERF_SEL_FC_DOC_CLINE_CAM_HIT
  8157. CB_PERF_SEL_FC_DOC_CLINE_CAM_MISS
  8158. CB_PERF_SEL_FC_DOC_IS_STALLED
  8159. CB_PERF_SEL_FC_DOC_MRTS_COMBINED
  8160. CB_PERF_SEL_FC_DOC_MRTS_NOT_COMBINED
  8161. CB_PERF_SEL_FC_DOC_OVERWROTE_1_SECTOR
  8162. CB_PERF_SEL_FC_DOC_OVERWROTE_2_SECTORS
  8163. CB_PERF_SEL_FC_DOC_OVERWROTE_3_SECTORS
  8164. CB_PERF_SEL_FC_DOC_OVERWROTE_4_SECTORS
  8165. CB_PERF_SEL_FC_DOC_QTILE_CAM_HIT
  8166. CB_PERF_SEL_FC_DOC_QTILE_CAM_MISS
  8167. CB_PERF_SEL_FC_DOC_QUAD_PTR_FIFO_IS_FULL
  8168. CB_PERF_SEL_FC_DOC_TOTAL_OVERWRITTEN_SECTORS
  8169. CB_PERF_SEL_FC_KEYID_RDLAT_FIFO_FULL
  8170. CB_PERF_SEL_FC_KEYID_STUTTER_STALL
  8171. CB_PERF_SEL_FC_MC_DCC_READ_REQUEST
  8172. CB_PERF_SEL_FC_MC_DCC_READ_REQUESTS_IN_FLIGHT
  8173. CB_PERF_SEL_FC_MC_DCC_WRITE_REQUEST
  8174. CB_PERF_SEL_FC_MC_DCC_WRITE_REQUESTS_IN_FLIGHT
  8175. CB_PERF_SEL_FC_MC_EARLY_WRITE_REQUESTS_IN_FLIGHT
  8176. CB_PERF_SEL_FC_MC_EARLY_WRITE_RETURN
  8177. CB_PERF_SEL_FC_MC_READ_REQUEST
  8178. CB_PERF_SEL_FC_MC_READ_REQUESTS_IN_FLIGHT
  8179. CB_PERF_SEL_FC_MC_WRITE_ACK64B
  8180. CB_PERF_SEL_FC_MC_WRITE_REQUEST
  8181. CB_PERF_SEL_FC_MC_WRITE_REQUESTS_IN_FLIGHT
  8182. CB_PERF_SEL_FC_PF_SLOW_MODE_QUAD_EMPTY_HALF_DROPPED
  8183. CB_PERF_SEL_FC_QUAD_RDLAT_FIFO_FULL
  8184. CB_PERF_SEL_FC_QUAD_STUTTER_STALL
  8185. CB_PERF_SEL_FC_RDLAT_FIFO_QUAD_RESIDENCY_STALL
  8186. CB_PERF_SEL_FC_SEQUENCER_CLEAR
  8187. CB_PERF_SEL_FC_SEQUENCER_ELIMINATE_FAST_CLEAR
  8188. CB_PERF_SEL_FC_SEQUENCER_FMASK_COMPRESSION_DISABLE
  8189. CB_PERF_SEL_FC_SEQUENCER_FMASK_DECOMPRESS
  8190. CB_PERF_SEL_FC_TILE_RDLAT_FIFO_FULL
  8191. CB_PERF_SEL_FC_TILE_STUTTER_STALL
  8192. CB_PERF_SEL_FOP_FMASK_BYPASS_STALL
  8193. CB_PERF_SEL_FOP_FMASK_RAW_STALL
  8194. CB_PERF_SEL_FOP_IN_VALIDB_READY
  8195. CB_PERF_SEL_FOP_IN_VALIDB_READYB
  8196. CB_PERF_SEL_FOP_IN_VALID_READY
  8197. CB_PERF_SEL_FOP_IN_VALID_READYB
  8198. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_16_16_FLOAT_8PIX
  8199. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_16_16_SIGNED_8PIX
  8200. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_16_16_UNSIGNED_8PIX
  8201. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32BPP_8PIX
  8202. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32_ABGR
  8203. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32_AR
  8204. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32_GR
  8205. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32_R
  8206. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_FP16_ABGR
  8207. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_SIGNED16_ABGR
  8208. CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_UNSIGNED16_ABGR
  8209. CB_PERF_SEL_LQUAD_NO_TILE
  8210. CB_PERF_SEL_MERGE_PIXELS_WITH_BLEND_ENABLED
  8211. CB_PERF_SEL_MERGE_TILE_ONLY_VALID_READY
  8212. CB_PERF_SEL_MERGE_TILE_ONLY_VALID_READYB
  8213. CB_PERF_SEL_NACK_CC_READ
  8214. CB_PERF_SEL_NACK_CC_WRITE
  8215. CB_PERF_SEL_NACK_CM_READ
  8216. CB_PERF_SEL_NACK_CM_WRITE
  8217. CB_PERF_SEL_NACK_DC_READ
  8218. CB_PERF_SEL_NACK_DC_WRITE
  8219. CB_PERF_SEL_NACK_FC_READ
  8220. CB_PERF_SEL_NACK_FC_WRITE
  8221. CB_PERF_SEL_NONE
  8222. CB_PERF_SEL_QUAD_ADDED_1_FRAGMENT
  8223. CB_PERF_SEL_QUAD_ADDED_2_FRAGMENTS
  8224. CB_PERF_SEL_QUAD_ADDED_3_FRAGMENTS
  8225. CB_PERF_SEL_QUAD_ADDED_4_FRAGMENTS
  8226. CB_PERF_SEL_QUAD_ADDED_5_FRAGMENTS
  8227. CB_PERF_SEL_QUAD_ADDED_6_FRAGMENTS
  8228. CB_PERF_SEL_QUAD_ADDED_7_FRAGMENTS
  8229. CB_PERF_SEL_QUAD_BLENDING_COULD_HAVE_BEEN_BYPASSED
  8230. CB_PERF_SEL_QUAD_BLEND_OPT_BLEND_BYPASS
  8231. CB_PERF_SEL_QUAD_BLEND_OPT_DISCARD_PIXELS
  8232. CB_PERF_SEL_QUAD_BLEND_OPT_DONT_READ_DST
  8233. CB_PERF_SEL_QUAD_COULD_HAVE_BEEN_DISCARDED
  8234. CB_PERF_SEL_QUAD_DST_READ_COULD_HAVE_BEEN_OPTIMIZED
  8235. CB_PERF_SEL_QUAD_HAS_1_FRAGMENT_AFTER_UPDATE
  8236. CB_PERF_SEL_QUAD_HAS_1_FRAGMENT_BEFORE_UPDATE
  8237. CB_PERF_SEL_QUAD_HAS_2_FRAGMENTS_AFTER_UPDATE
  8238. CB_PERF_SEL_QUAD_HAS_2_FRAGMENTS_BEFORE_UPDATE
  8239. CB_PERF_SEL_QUAD_HAS_3_FRAGMENTS_AFTER_UPDATE
  8240. CB_PERF_SEL_QUAD_HAS_3_FRAGMENTS_BEFORE_UPDATE
  8241. CB_PERF_SEL_QUAD_HAS_4_FRAGMENTS_AFTER_UPDATE
  8242. CB_PERF_SEL_QUAD_HAS_4_FRAGMENTS_BEFORE_UPDATE
  8243. CB_PERF_SEL_QUAD_HAS_5_FRAGMENTS_AFTER_UPDATE
  8244. CB_PERF_SEL_QUAD_HAS_5_FRAGMENTS_BEFORE_UPDATE
  8245. CB_PERF_SEL_QUAD_HAS_6_FRAGMENTS_AFTER_UPDATE
  8246. CB_PERF_SEL_QUAD_HAS_6_FRAGMENTS_BEFORE_UPDATE
  8247. CB_PERF_SEL_QUAD_HAS_7_FRAGMENTS_AFTER_UPDATE
  8248. CB_PERF_SEL_QUAD_HAS_7_FRAGMENTS_BEFORE_UPDATE
  8249. CB_PERF_SEL_QUAD_HAS_8_FRAGMENTS_AFTER_UPDATE
  8250. CB_PERF_SEL_QUAD_HAS_8_FRAGMENTS_BEFORE_UPDATE
  8251. CB_PERF_SEL_QUAD_KILLED_BY_COLOR_INVALID
  8252. CB_PERF_SEL_QUAD_KILLED_BY_DISCARD_PIXEL
  8253. CB_PERF_SEL_QUAD_KILLED_BY_EXTRA_PIXEL_EXPORT
  8254. CB_PERF_SEL_QUAD_KILLED_BY_NULL_SAMPLE_MASK
  8255. CB_PERF_SEL_QUAD_KILLED_BY_NULL_TARGET_SHADER_MASK
  8256. CB_PERF_SEL_QUAD_READS_FRAGMENT_0
  8257. CB_PERF_SEL_QUAD_READS_FRAGMENT_1
  8258. CB_PERF_SEL_QUAD_READS_FRAGMENT_2
  8259. CB_PERF_SEL_QUAD_READS_FRAGMENT_3
  8260. CB_PERF_SEL_QUAD_READS_FRAGMENT_4
  8261. CB_PERF_SEL_QUAD_READS_FRAGMENT_5
  8262. CB_PERF_SEL_QUAD_READS_FRAGMENT_6
  8263. CB_PERF_SEL_QUAD_READS_FRAGMENT_7
  8264. CB_PERF_SEL_QUAD_REMOVED_1_FRAGMENT
  8265. CB_PERF_SEL_QUAD_REMOVED_2_FRAGMENTS
  8266. CB_PERF_SEL_QUAD_REMOVED_3_FRAGMENTS
  8267. CB_PERF_SEL_QUAD_REMOVED_4_FRAGMENTS
  8268. CB_PERF_SEL_QUAD_REMOVED_5_FRAGMENTS
  8269. CB_PERF_SEL_QUAD_REMOVED_6_FRAGMENTS
  8270. CB_PERF_SEL_QUAD_REMOVED_7_FRAGMENTS
  8271. CB_PERF_SEL_QUAD_WRITES_FRAGMENT_0
  8272. CB_PERF_SEL_QUAD_WRITES_FRAGMENT_1
  8273. CB_PERF_SEL_QUAD_WRITES_FRAGMENT_2
  8274. CB_PERF_SEL_QUAD_WRITES_FRAGMENT_3
  8275. CB_PERF_SEL_QUAD_WRITES_FRAGMENT_4
  8276. CB_PERF_SEL_QUAD_WRITES_FRAGMENT_5
  8277. CB_PERF_SEL_QUAD_WRITES_FRAGMENT_6
  8278. CB_PERF_SEL_QUAD_WRITES_FRAGMENT_7
  8279. CB_PERF_SEL_RBP_EXPORT_8PIX_LIT_BOTH
  8280. CB_PERF_SEL_RBP_EXPORT_8PIX_LIT_LEFT
  8281. CB_PERF_SEL_RBP_EXPORT_8PIX_LIT_RIGHT
  8282. CB_PERF_SEL_RBP_INSERT_MISSING_LAST_QUAD
  8283. CB_PERF_SEL_RBP_SPLIT_AA_NO_FMASK_COMPRESS
  8284. CB_PERF_SEL_RBP_SPLIT_AA_SAMPLE_MASK
  8285. CB_PERF_SEL_RBP_SPLIT_LINEAR_ADDRESSING
  8286. CB_PERF_SEL_RBP_SPLIT_MICROTILE
  8287. CB_PERF_SEL_RBP_SPLIT_PARTIAL_TARGET_MASK
  8288. CB_PERF_SEL_REG_SCLK0_VLD
  8289. CB_PERF_SEL_REG_SCLK1_VLD
  8290. CB_PERF_SEL_TILE_TO_CMR_REGION_BUSY
  8291. CB_PERF_SEL_TWO_PROBE_QUAD_FRAGMENT
  8292. CB_PROTOCOL_RESERVED_SECTION
  8293. CB_PWRCYCLE
  8294. CB_PWREVENT
  8295. CB_PWRMASK
  8296. CB_RD_NUM
  8297. CB_RESERVED
  8298. CB_RESET_CMD_SIZE
  8299. CB_RESOLVE
  8300. CB_RMI_BC_GL2_CACHE_CONTROL__CMASK_RD_POLICY_MASK
  8301. CB_RMI_BC_GL2_CACHE_CONTROL__CMASK_RD_POLICY__SHIFT
  8302. CB_RMI_BC_GL2_CACHE_CONTROL__CMASK_WR_POLICY_MASK
  8303. CB_RMI_BC_GL2_CACHE_CONTROL__CMASK_WR_POLICY__SHIFT
  8304. CB_RMI_BC_GL2_CACHE_CONTROL__COLOR_RD_POLICY_MASK
  8305. CB_RMI_BC_GL2_CACHE_CONTROL__COLOR_RD_POLICY__SHIFT
  8306. CB_RMI_BC_GL2_CACHE_CONTROL__COLOR_WR_POLICY_MASK
  8307. CB_RMI_BC_GL2_CACHE_CONTROL__COLOR_WR_POLICY__SHIFT
  8308. CB_RMI_BC_GL2_CACHE_CONTROL__DCC_RD_POLICY_MASK
  8309. CB_RMI_BC_GL2_CACHE_CONTROL__DCC_RD_POLICY__SHIFT
  8310. CB_RMI_BC_GL2_CACHE_CONTROL__DCC_WR_POLICY_MASK
  8311. CB_RMI_BC_GL2_CACHE_CONTROL__DCC_WR_POLICY__SHIFT
  8312. CB_RMI_BC_GL2_CACHE_CONTROL__FMASK_RD_POLICY_MASK
  8313. CB_RMI_BC_GL2_CACHE_CONTROL__FMASK_RD_POLICY__SHIFT
  8314. CB_RMI_BC_GL2_CACHE_CONTROL__FMASK_WR_POLICY_MASK
  8315. CB_RMI_BC_GL2_CACHE_CONTROL__FMASK_WR_POLICY__SHIFT
  8316. CB_RMI_BC_GL2_CACHE_CONTROL__VOLAT_MASK
  8317. CB_RMI_BC_GL2_CACHE_CONTROL__VOLAT__SHIFT
  8318. CB_RMI_GL2_CACHE_CONTROL__CMASK_RD_POLICY_MASK
  8319. CB_RMI_GL2_CACHE_CONTROL__CMASK_RD_POLICY__SHIFT
  8320. CB_RMI_GL2_CACHE_CONTROL__CMASK_WR_POLICY_MASK
  8321. CB_RMI_GL2_CACHE_CONTROL__CMASK_WR_POLICY__SHIFT
  8322. CB_RMI_GL2_CACHE_CONTROL__COLOR_BIG_PAGE_MASK
  8323. CB_RMI_GL2_CACHE_CONTROL__COLOR_BIG_PAGE__SHIFT
  8324. CB_RMI_GL2_CACHE_CONTROL__COLOR_RD_POLICY_MASK
  8325. CB_RMI_GL2_CACHE_CONTROL__COLOR_RD_POLICY__SHIFT
  8326. CB_RMI_GL2_CACHE_CONTROL__COLOR_WR_POLICY_MASK
  8327. CB_RMI_GL2_CACHE_CONTROL__COLOR_WR_POLICY__SHIFT
  8328. CB_RMI_GL2_CACHE_CONTROL__DCC_RD_POLICY_MASK
  8329. CB_RMI_GL2_CACHE_CONTROL__DCC_RD_POLICY__SHIFT
  8330. CB_RMI_GL2_CACHE_CONTROL__DCC_WR_POLICY_MASK
  8331. CB_RMI_GL2_CACHE_CONTROL__DCC_WR_POLICY__SHIFT
  8332. CB_RMI_GL2_CACHE_CONTROL__FMASK_BIG_PAGE_MASK
  8333. CB_RMI_GL2_CACHE_CONTROL__FMASK_BIG_PAGE__SHIFT
  8334. CB_RMI_GL2_CACHE_CONTROL__FMASK_RD_POLICY_MASK
  8335. CB_RMI_GL2_CACHE_CONTROL__FMASK_RD_POLICY__SHIFT
  8336. CB_RMI_GL2_CACHE_CONTROL__FMASK_WR_POLICY_MASK
  8337. CB_RMI_GL2_CACHE_CONTROL__FMASK_WR_POLICY__SHIFT
  8338. CB_RX_BUF_SIZE
  8339. CB_SC_CCLK_STOP
  8340. CB_SC_VCC_3V
  8341. CB_SC_VCC_5V
  8342. CB_SC_VCC_MASK
  8343. CB_SC_VCC_OFF
  8344. CB_SC_VCC_XV
  8345. CB_SC_VCC_YV
  8346. CB_SC_VPP_12V
  8347. CB_SC_VPP_3V
  8348. CB_SC_VPP_5V
  8349. CB_SC_VPP_MASK
  8350. CB_SC_VPP_OFF
  8351. CB_SC_VPP_XV
  8352. CB_SC_VPP_YV
  8353. CB_SF_EXPORT_FULL
  8354. CB_SF_EXPORT_NORM
  8355. CB_SHADER_MASK
  8356. CB_SHADER_MASK__OUTPUT0_ENABLE_MASK
  8357. CB_SHADER_MASK__OUTPUT0_ENABLE__SHIFT
  8358. CB_SHADER_MASK__OUTPUT1_ENABLE_MASK
  8359. CB_SHADER_MASK__OUTPUT1_ENABLE__SHIFT
  8360. CB_SHADER_MASK__OUTPUT2_ENABLE_MASK
  8361. CB_SHADER_MASK__OUTPUT2_ENABLE__SHIFT
  8362. CB_SHADER_MASK__OUTPUT3_ENABLE_MASK
  8363. CB_SHADER_MASK__OUTPUT3_ENABLE__SHIFT
  8364. CB_SHADER_MASK__OUTPUT4_ENABLE_MASK
  8365. CB_SHADER_MASK__OUTPUT4_ENABLE__SHIFT
  8366. CB_SHADER_MASK__OUTPUT5_ENABLE_MASK
  8367. CB_SHADER_MASK__OUTPUT5_ENABLE__SHIFT
  8368. CB_SHADER_MASK__OUTPUT6_ENABLE_MASK
  8369. CB_SHADER_MASK__OUTPUT6_ENABLE__SHIFT
  8370. CB_SHADER_MASK__OUTPUT7_ENABLE_MASK
  8371. CB_SHADER_MASK__OUTPUT7_ENABLE__SHIFT
  8372. CB_SKTACCES
  8373. CB_SKTMODE
  8374. CB_SOCKET_CONTROL
  8375. CB_SOCKET_EVENT
  8376. CB_SOCKET_FORCE
  8377. CB_SOCKET_MASK
  8378. CB_SOCKET_POWER
  8379. CB_SOCKET_STATE
  8380. CB_SOURCE_FORMAT
  8381. CB_SRC_AUTOINC
  8382. CB_SRC_IO_GATED
  8383. CB_SRC_LE
  8384. CB_SRC_SIZE_LONG
  8385. CB_STUTTER_CONTROL_CMASK_RDLAT__THRESHOLD_MASK
  8386. CB_STUTTER_CONTROL_CMASK_RDLAT__THRESHOLD__SHIFT
  8387. CB_STUTTER_CONTROL_CMASK_RDLAT__TIMEOUT_MASK
  8388. CB_STUTTER_CONTROL_CMASK_RDLAT__TIMEOUT__SHIFT
  8389. CB_STUTTER_CONTROL_COLOR_RDLAT__THRESHOLD_MASK
  8390. CB_STUTTER_CONTROL_COLOR_RDLAT__THRESHOLD__SHIFT
  8391. CB_STUTTER_CONTROL_COLOR_RDLAT__TIMEOUT_MASK
  8392. CB_STUTTER_CONTROL_COLOR_RDLAT__TIMEOUT__SHIFT
  8393. CB_STUTTER_CONTROL_FMASK_RDLAT__THRESHOLD_MASK
  8394. CB_STUTTER_CONTROL_FMASK_RDLAT__THRESHOLD__SHIFT
  8395. CB_STUTTER_CONTROL_FMASK_RDLAT__TIMEOUT_MASK
  8396. CB_STUTTER_CONTROL_FMASK_RDLAT__TIMEOUT__SHIFT
  8397. CB_TAG_CBMEM_CONSOLE
  8398. CB_TAG_FRAMEBUFFER
  8399. CB_TAG_VPD
  8400. CB_TARGET_MASK
  8401. CB_TARGET_MASK__TARGET0_ENABLE_MASK
  8402. CB_TARGET_MASK__TARGET0_ENABLE__SHIFT
  8403. CB_TARGET_MASK__TARGET1_ENABLE_MASK
  8404. CB_TARGET_MASK__TARGET1_ENABLE__SHIFT
  8405. CB_TARGET_MASK__TARGET2_ENABLE_MASK
  8406. CB_TARGET_MASK__TARGET2_ENABLE__SHIFT
  8407. CB_TARGET_MASK__TARGET3_ENABLE_MASK
  8408. CB_TARGET_MASK__TARGET3_ENABLE__SHIFT
  8409. CB_TARGET_MASK__TARGET4_ENABLE_MASK
  8410. CB_TARGET_MASK__TARGET4_ENABLE__SHIFT
  8411. CB_TARGET_MASK__TARGET5_ENABLE_MASK
  8412. CB_TARGET_MASK__TARGET5_ENABLE__SHIFT
  8413. CB_TARGET_MASK__TARGET6_ENABLE_MASK
  8414. CB_TARGET_MASK__TARGET6_ENABLE__SHIFT
  8415. CB_TARGET_MASK__TARGET7_ENABLE_MASK
  8416. CB_TARGET_MASK__TARGET7_ENABLE__SHIFT
  8417. CB_TD_NUM
  8418. CB_TD_RING_NUM
  8419. CB_TILE_SPLIT
  8420. CB_UW2452_CHANNEL_5G_HIGH
  8421. CB_VALID
  8422. CB_VT3226_INIT_SEQ
  8423. CB_VT3253B0_AGC
  8424. CB_VT3253B0_AGC_FOR_RFMD2959
  8425. CB_VT3253B0_INIT_FOR_AIROHA2230
  8426. CB_VT3253B0_INIT_FOR_RFMD
  8427. CB_VT3253B0_INIT_FOR_UW2451
  8428. CB_VT3253_INIT_FOR_RFMD
  8429. CB_VT3342_INIT_SEQ
  8430. CB_XVCARD
  8431. CB_XVSOCKET
  8432. CB_YVCARD
  8433. CB_YVSOCKET
  8434. CC
  8435. CC10001_ADC_CHSEL_SAMPLED
  8436. CC10001_ADC_CH_MASK
  8437. CC10001_ADC_CONFIG
  8438. CC10001_ADC_DATA_COUNT
  8439. CC10001_ADC_DATA_MASK
  8440. CC10001_ADC_DDATA_OUT
  8441. CC10001_ADC_DEBUG
  8442. CC10001_ADC_EOC
  8443. CC10001_ADC_EOC_SET
  8444. CC10001_ADC_MODE_SINGLE_CONV
  8445. CC10001_ADC_NUM_CHANNELS
  8446. CC10001_ADC_POWER_DOWN
  8447. CC10001_ADC_POWER_DOWN_SET
  8448. CC10001_ADC_START_CONV
  8449. CC10001_INVALID_SAMPLED
  8450. CC10001_MAX_POLL_COUNT
  8451. CC10001_WAIT_CYCLES
  8452. CC1_ITERM_20MA
  8453. CC1_ITERM_60MA
  8454. CC1_MODE_FASTCHARGE
  8455. CC1_MODE_OFF
  8456. CC1_MODE_PRECHARGE
  8457. CC1_MODE_PULSECHARGE
  8458. CC1_VFCHG_4_2V
  8459. CC2520RAM_IEEEADDR
  8460. CC2520RAM_PANID
  8461. CC2520RAM_RXFIFO
  8462. CC2520RAM_SHORTADDR
  8463. CC2520RAM_TXFIFO
  8464. CC2520_ACTBIST
  8465. CC2520_ADCTEST0
  8466. CC2520_ADCTEST1
  8467. CC2520_ADCTEST2
  8468. CC2520_AGCCTRL0
  8469. CC2520_AGCCTRL1
  8470. CC2520_AGCCTRL2
  8471. CC2520_AGCCTRL3
  8472. CC2520_ATEST
  8473. CC2520_CC2591_MAX_TX_POWERS
  8474. CC2520_CCACTRL0
  8475. CC2520_CCACTRL1
  8476. CC2520_CHANNEL_SPACING
  8477. CC2520_CHIPID
  8478. CC2520_CMD_ABORT
  8479. CC2520_CMD_BCLR
  8480. CC2520_CMD_BSET
  8481. CC2520_CMD_CBCMAC
  8482. CC2520_CMD_CCM
  8483. CC2520_CMD_CTR_UCTR
  8484. CC2520_CMD_ECB
  8485. CC2520_CMD_ECBO
  8486. CC2520_CMD_ECBX
  8487. CC2520_CMD_IBUFLD
  8488. CC2520_CMD_INC
  8489. CC2520_CMD_MEMCP
  8490. CC2520_CMD_MEMCPR
  8491. CC2520_CMD_MEMORY_MASK
  8492. CC2520_CMD_MEMORY_READ
  8493. CC2520_CMD_MEMORY_WRITE
  8494. CC2520_CMD_MEMXCP
  8495. CC2520_CMD_MEMXWR
  8496. CC2520_CMD_RANDOM
  8497. CC2520_CMD_REGISTER_READ
  8498. CC2520_CMD_REGISTER_WRITE
  8499. CC2520_CMD_RXBUF
  8500. CC2520_CMD_RXBUFCP
  8501. CC2520_CMD_RXBUFMOV
  8502. CC2520_CMD_RXMASKAND
  8503. CC2520_CMD_RXMASKOR
  8504. CC2520_CMD_SACK
  8505. CC2520_CMD_SACKPEND
  8506. CC2520_CMD_SFLUSHRX
  8507. CC2520_CMD_SFLUSHTX
  8508. CC2520_CMD_SIBUFEX
  8509. CC2520_CMD_SNACK
  8510. CC2520_CMD_SNOP
  8511. CC2520_CMD_SRES
  8512. CC2520_CMD_SRFOFF
  8513. CC2520_CMD_SRXMASKBITCLR
  8514. CC2520_CMD_SRXMASKBITSET
  8515. CC2520_CMD_SRXON
  8516. CC2520_CMD_SSAMPLECCA
  8517. CC2520_CMD_STXCAL
  8518. CC2520_CMD_STXON
  8519. CC2520_CMD_STXONCCA
  8520. CC2520_CMD_SXOSCOFF
  8521. CC2520_CMD_SXOSCON
  8522. CC2520_CMD_TXBUF
  8523. CC2520_CMD_TXBUFCP
  8524. CC2520_CMD_UCBCMAC
  8525. CC2520_CMD_UCCM
  8526. CC2520_DACTEST0
  8527. CC2520_DACTEST1
  8528. CC2520_DACTEST2
  8529. CC2520_DPUBIST
  8530. CC2520_DPUCON
  8531. CC2520_DPUSTAT
  8532. CC2520_EXCBINDX0
  8533. CC2520_EXCBINDX1
  8534. CC2520_EXCBINDY0
  8535. CC2520_EXCBINDY1
  8536. CC2520_EXCFLAG0
  8537. CC2520_EXCFLAG1
  8538. CC2520_EXCFLAG2
  8539. CC2520_EXCMASKA0
  8540. CC2520_EXCMASKA1
  8541. CC2520_EXCMASKA2
  8542. CC2520_EXCMASKB0
  8543. CC2520_EXCMASKB1
  8544. CC2520_EXCMASKB2
  8545. CC2520_EXTCLOCK
  8546. CC2520_FIFOPCTRL
  8547. CC2520_FIFO_SIZE
  8548. CC2520_FREG_MASK
  8549. CC2520_FREQCTRL
  8550. CC2520_FREQEST
  8551. CC2520_FREQTUNE
  8552. CC2520_FRMCTRL0
  8553. CC2520_FRMCTRL1
  8554. CC2520_FRMFILT0
  8555. CC2520_FRMFILT1
  8556. CC2520_FSCAL0
  8557. CC2520_FSCAL1
  8558. CC2520_FSCAL2
  8559. CC2520_FSCAL3
  8560. CC2520_FSCTRL
  8561. CC2520_FSMCTRL
  8562. CC2520_FSMSTAT0
  8563. CC2520_FSMSTAT1
  8564. CC2520_GPIOCTRL
  8565. CC2520_GPIOCTRL0
  8566. CC2520_GPIOCTRL1
  8567. CC2520_GPIOCTRL2
  8568. CC2520_GPIOCTRL3
  8569. CC2520_GPIOCTRL4
  8570. CC2520_GPIOCTRL5
  8571. CC2520_GPIOPOLARITY
  8572. CC2520_MAXCHANNEL
  8573. CC2520_MAX_TX_POWERS
  8574. CC2520_MDMCTRL0
  8575. CC2520_MDMCTRL1
  8576. CC2520_MDMTEST0
  8577. CC2520_MDMTEST1
  8578. CC2520_MINCHANNEL
  8579. CC2520_PTEST0
  8580. CC2520_PTEST1
  8581. CC2520_RAMBIST
  8582. CC2520_RAM_SIZE
  8583. CC2520_RESERVED
  8584. CC2520_RSSI
  8585. CC2520_RSSISTAT
  8586. CC2520_RXCTRL
  8587. CC2520_RXENABLE0
  8588. CC2520_RXENABLE1
  8589. CC2520_RXFIFOCNT
  8590. CC2520_RXFIRST
  8591. CC2520_SRCEXTEN0
  8592. CC2520_SRCEXTEN1
  8593. CC2520_SRCEXTEN2
  8594. CC2520_SRCMATCH
  8595. CC2520_SRCSHORTEN0
  8596. CC2520_SRCSHORTEN1
  8597. CC2520_SRCSHORTEN2
  8598. CC2520_STATUS_RSSI_VALID
  8599. CC2520_STATUS_TX_UNDERFLOW
  8600. CC2520_STATUS_XOSC32M_STABLE
  8601. CC2520_TXCTRL
  8602. CC2520_TXFIFOCNT
  8603. CC2520_TXPOWER
  8604. CC2520_VERSION
  8605. CC2_ICHG_1000MA
  8606. CC2_ICHG_100MA
  8607. CC2_ICHG_500MA
  8608. CC3_180MIN_TIMEOUT
  8609. CC3_270MIN_TIMEOUT
  8610. CC3_360MIN_TIMEOUT
  8611. CC3_DISABLE_TIMEOUT
  8612. CC4_BTEMP_MON_EN
  8613. CC4_IFCHG_MON_EN
  8614. CC4_IPRE_40MA
  8615. CC4_VPCHG_3_2V
  8616. CC5_OSCOUT_MARK
  8617. CC5_STATE0_MARK
  8618. CC5_STATE10_MARK
  8619. CC5_STATE11_MARK
  8620. CC5_STATE12_MARK
  8621. CC5_STATE13_MARK
  8622. CC5_STATE14_MARK
  8623. CC5_STATE15_MARK
  8624. CC5_STATE16_MARK
  8625. CC5_STATE17_MARK
  8626. CC5_STATE18_MARK
  8627. CC5_STATE19_MARK
  8628. CC5_STATE1_MARK
  8629. CC5_STATE20_MARK
  8630. CC5_STATE21_MARK
  8631. CC5_STATE22_MARK
  8632. CC5_STATE23_MARK
  8633. CC5_STATE24_MARK
  8634. CC5_STATE25_MARK
  8635. CC5_STATE26_MARK
  8636. CC5_STATE27_MARK
  8637. CC5_STATE28_MARK
  8638. CC5_STATE29_MARK
  8639. CC5_STATE2_MARK
  8640. CC5_STATE30_MARK
  8641. CC5_STATE31_MARK
  8642. CC5_STATE32_MARK
  8643. CC5_STATE33_MARK
  8644. CC5_STATE34_MARK
  8645. CC5_STATE35_MARK
  8646. CC5_STATE36_MARK
  8647. CC5_STATE37_MARK
  8648. CC5_STATE38_MARK
  8649. CC5_STATE39_MARK
  8650. CC5_STATE3_MARK
  8651. CC5_STATE4_MARK
  8652. CC5_STATE5_MARK
  8653. CC5_STATE6_MARK
  8654. CC5_STATE7_MARK
  8655. CC5_STATE8_MARK
  8656. CC5_STATE9_MARK
  8657. CC5_TCK_MARK
  8658. CC5_TDI_MARK
  8659. CC5_TDO_MARK
  8660. CC5_TMS_MARK
  8661. CC5_TRST_MARK
  8662. CC6_BAT_DET_GPADC1
  8663. CC6_BAT_OV_EN
  8664. CC6_BAT_UV_EN
  8665. CC6_UV_VBAT_SET
  8666. CC770_DEV_H
  8667. CC770_ECHO_SKB_MAX
  8668. CC770_IOSIZE
  8669. CC770_IOSIZE_INDIRECT
  8670. CC770_IO_SIZE
  8671. CC770_MAX_IRQ
  8672. CC770_MAX_MSG
  8673. CC770_OBJ_FLAG_EFF
  8674. CC770_OBJ_FLAG_RTR
  8675. CC770_OBJ_FLAG_RX
  8676. CC770_OBJ_MAX
  8677. CC770_OBJ_RX0
  8678. CC770_OBJ_RX1
  8679. CC770_OBJ_RX_RTR0
  8680. CC770_OBJ_RX_RTR1
  8681. CC770_OBJ_TX
  8682. CC770_PLATFORM_CAN_CLOCK
  8683. CC7_BAT_REM_EN
  8684. CC7_IFSM_EN
  8685. CCACHE_KOBJ_ID
  8686. CCACIPHERTOKENSIZE
  8687. CCAR
  8688. CCA_1R
  8689. CCA_2R
  8690. CCA_ASSIGN
  8691. CCA_ENTRY
  8692. CCA_ERR_ADI
  8693. CCA_ERR_DATA_FMT
  8694. CCA_ERR_DECODE
  8695. CCA_ERR_KILLED
  8696. CCA_ERR_OTHER_NO_RETRY
  8697. CCA_ERR_OTHER_RETRY
  8698. CCA_ERR_OVERFLOW
  8699. CCA_ERR_PAGE_OVERFLOW
  8700. CCA_ERR_PARTIAL_SYMBOL
  8701. CCA_ERR_SUCCESS
  8702. CCA_ERR_TIMEOUT
  8703. CCA_MAX
  8704. CCA_PR_ARG
  8705. CCA_PR_FMT
  8706. CCA_PVT_EXT_CRT_SEC_FMT_CL
  8707. CCA_PVT_EXT_CRT_SEC_ID_PVT
  8708. CCA_PVT_USAGE_ALL
  8709. CCA_STAT_COMPLETED
  8710. CCA_STAT_FAILED
  8711. CCA_STAT_KILLED
  8712. CCA_STAT_NOT_COMPLETED
  8713. CCA_STAT_NOT_RUN
  8714. CCA_STAT_PIPE_DST
  8715. CCA_STAT_PIPE_OUT
  8716. CCA_STAT_PIPE_SRC
  8717. CCA_THRSH_DISABLE_ENERGY_D
  8718. CCA_THRSH_ENABLE_ENERGY_D
  8719. CCA_TKN_HDR_ID_EXT
  8720. CCBR_CIT_MASK
  8721. CCBR_CMDS
  8722. CCBR_DUC
  8723. CCBR_PPCE
  8724. CCBVID_ERA_MASK
  8725. CCBVID_ERA_SHIFT
  8726. CCB_ADDRESS
  8727. CCB_ALIGN
  8728. CCB_BA
  8729. CCB_BIOS_EMUL
  8730. CCB_CLOSE
  8731. CCB_CLOSE_CONSOLE
  8732. CCB_CM
  8733. CCB_CM0
  8734. CCB_CM0_ALL_COMPLETIONS
  8735. CCB_CM0_LAST_IN_CHAIN
  8736. CCB_CM12
  8737. CCB_CM12_INTERRUPT
  8738. CCB_CM12_STORE
  8739. CCB_CM_EXTRA_WRITE
  8740. CCB_CM_INTERRUPT
  8741. CCB_DEQUEUE
  8742. CCB_DONE_EMPTY
  8743. CCB_DONE_VALID
  8744. CCB_FLAG_ERROR
  8745. CCB_FLAG_FLUSHCACHE
  8746. CCB_FLAG_MASTER_ABORTED
  8747. CCB_FLAG_READ
  8748. CCB_FLAG_WRITE
  8749. CCB_GETC
  8750. CCB_GET_ENV
  8751. CCB_HASH_CODE
  8752. CCB_HASH_MASK
  8753. CCB_HASH_SHIFT
  8754. CCB_HASH_SIZE
  8755. CCB_INFO
  8756. CCB_INFO_OFFSET_CCB_STATE
  8757. CCB_INFO_OFFSET_DAX_UNIT
  8758. CCB_INFO_OFFSET_QUEUE_NUM
  8759. CCB_INFO_OFFSET_QUEUE_POS
  8760. CCB_IOCTL
  8761. CCB_KILL
  8762. CCB_MAGIC
  8763. CCB_MEM
  8764. CCB_OPEN
  8765. CCB_OPEN_CONSOLE
  8766. CCB_PHYS
  8767. CCB_PROCESS_KEYCODE
  8768. CCB_PSWITCH
  8769. CCB_PUTS
  8770. CCB_READ
  8771. CCB_RESET_ENV
  8772. CCB_RESET_TERM
  8773. CCB_SAVE_ENV
  8774. CCB_SET_ENV
  8775. CCB_SET_TERM_CTL
  8776. CCB_SET_TERM_INT
  8777. CCB_SIZE
  8778. CCB_VALUE
  8779. CCB_WRITE
  8780. CCC
  8781. CCCA
  8782. CCCA_8BITSELECT
  8783. CCCA_CURRADDR
  8784. CCCA_CURRADDR_MASK
  8785. CCCA_INTERPROMMASK
  8786. CCCA_INTERPROM_0
  8787. CCCA_INTERPROM_1
  8788. CCCA_INTERPROM_2
  8789. CCCA_INTERPROM_3
  8790. CCCA_INTERPROM_4
  8791. CCCA_INTERPROM_5
  8792. CCCA_INTERPROM_6
  8793. CCCA_INTERPROM_7
  8794. CCCA_RESONANCE
  8795. CCCR
  8796. CCCR_ASM
  8797. CCCR_A_BIT
  8798. CCCR_BRSE
  8799. CCCR_CANFD
  8800. CCCR_CCE
  8801. CCCR_CLEAR
  8802. CCCR_CLEAR_OVF
  8803. CCCR_CME_CAN
  8804. CCCR_CME_CANFD
  8805. CCCR_CME_CANFD_BRS
  8806. CCCR_CME_MASK
  8807. CCCR_CME_SHIFT
  8808. CCCR_CMR_CAN
  8809. CCCR_CMR_CANFD
  8810. CCCR_CMR_CANFD_BRS
  8811. CCCR_CMR_MASK
  8812. CCCR_CMR_SHIFT
  8813. CCCR_CPDIS_BIT
  8814. CCCR_CSA
  8815. CCCR_CSR
  8816. CCCR_EFBI
  8817. CCCR_FDOE
  8818. CCCR_INIT
  8819. CCCR_LCD_26_BIT
  8820. CCCR_L_MASK
  8821. CCCR_MON
  8822. CCCR_M_MASK
  8823. CCCR_NISO
  8824. CCCR_N_MASK
  8825. CCCR_OVF_P
  8826. CCCR_PPDIS_BIT
  8827. CCCR_PXHD
  8828. CCCR_RESERVED_BITS
  8829. CCCR_SDIO_ASYNC_INT_DELAY_ADDRESS
  8830. CCCR_SDIO_ASYNC_INT_DELAY_MASK
  8831. CCCR_SDIO_DRIVER_STRENGTH_ENABLE_A
  8832. CCCR_SDIO_DRIVER_STRENGTH_ENABLE_ADDR
  8833. CCCR_SDIO_DRIVER_STRENGTH_ENABLE_C
  8834. CCCR_SDIO_DRIVER_STRENGTH_ENABLE_D
  8835. CCCR_SDIO_IRQ_MODE_REG
  8836. CCCR_SDIO_IRQ_MODE_REG_SDIO3
  8837. CCCR_SET_DISABLE
  8838. CCCR_SET_ENABLE
  8839. CCCR_SET_ESCR_SELECT
  8840. CCCR_SET_PMI_OVF_0
  8841. CCCR_SET_PMI_OVF_1
  8842. CCCR_SET_REQUIRED_BITS
  8843. CCCR_SLEEP
  8844. CCCR_TEST
  8845. CCCR_TXP
  8846. CCC_APP_SPEC
  8847. CCC_BASIC
  8848. CCC_BIT
  8849. CCC_BLOCK_READ
  8850. CCC_BLOCK_WRITE
  8851. CCC_CSEL
  8852. CCC_CSEL_ETH_TX
  8853. CCC_CSEL_GMII_REF
  8854. CCC_CSEL_HPB
  8855. CCC_DEVICE_STATUS
  8856. CCC_DTSR
  8857. CCC_ERASE
  8858. CCC_GAC
  8859. CCC_IO_MODE
  8860. CCC_LBME
  8861. CCC_LOCK_CARD
  8862. CCC_NAME
  8863. CCC_OPC
  8864. CCC_OPC_CONFIG
  8865. CCC_OPC_OPERATION
  8866. CCC_OPC_RESET
  8867. CCC_STREAM_READ
  8868. CCC_STREAM_WRITE
  8869. CCC_SWITCH
  8870. CCC_WRITE_PROT
  8871. CCD10
  8872. CCD1_EV
  8873. CCD20
  8874. CCD2_EV
  8875. CCDCFG
  8876. CCDC_32BYTE_ALIGN_VAL
  8877. CCDC_ADP_INIT_MASK
  8878. CCDC_ADP_LINE_MASK
  8879. CCDC_ADP_LINE_SHIFT
  8880. CCDC_ALAW
  8881. CCDC_ALAW_ENABLE
  8882. CCDC_ALAW_GAMMA_WD_MASK
  8883. CCDC_AVERAGE_FILTER1
  8884. CCDC_AVERAGE_FILTER2
  8885. CCDC_BLKCMP
  8886. CCDC_BLK_CLAMP_ENABLE
  8887. CCDC_BLK_COMP_GB_COMP_SHIFT
  8888. CCDC_BLK_COMP_GR_COMP_SHIFT
  8889. CCDC_BLK_COMP_MASK
  8890. CCDC_BLK_COMP_R_COMP_SHIFT
  8891. CCDC_BLK_DC_SUB_MASK
  8892. CCDC_BLK_SAMPLE_LINE_MASK
  8893. CCDC_BLK_SAMPLE_LINE_SHIFT
  8894. CCDC_BLK_SAMPLE_LN_MASK
  8895. CCDC_BLK_SAMPLE_LN_SHIFT
  8896. CCDC_BLK_SGAIN_MASK
  8897. CCDC_BLK_ST_PXL_MASK
  8898. CCDC_BLK_ST_PXL_SHIFT
  8899. CCDC_BLUE
  8900. CCDC_BUFTYPE_FLD_INTERLEAVED
  8901. CCDC_BUFTYPE_FLD_SEPARATED
  8902. CCDC_CCDCFG
  8903. CCDC_CCDCFG_BW656_10BIT
  8904. CCDC_CCDCFG_EXTRG_DISABLE
  8905. CCDC_CCDCFG_EXTRG_SHIFT
  8906. CCDC_CCDCFG_FIDMD_LATCH_VSYNC
  8907. CCDC_CCDCFG_FIDMD_NO_LATCH_VSYNC
  8908. CCDC_CCDCFG_FIDMD_SHIFT
  8909. CCDC_CCDCFG_MSBINVI_SHIFT
  8910. CCDC_CCDCFG_TRGSEL_SHIFT
  8911. CCDC_CCDCFG_TRGSEL_WEN
  8912. CCDC_CCDCFG_WENLOG_AND
  8913. CCDC_CCDCFG_WENLOG_SHIFT
  8914. CCDC_CCDCFG_Y8POS_SHIFT
  8915. CCDC_CFA_MOSAIC
  8916. CCDC_CLAMP
  8917. CCDC_CLAMP_DEFAULT_VAL
  8918. CCDC_COLPTN
  8919. CCDC_COLPTN_VAL
  8920. CCDC_CSCM_MSB_SHIFT
  8921. CCDC_CSC_COEFF_TABLE_SIZE
  8922. CCDC_CSC_COEF_DECIMAL_MASK
  8923. CCDC_CSC_COEF_INTEG_MASK
  8924. CCDC_CSC_COEF_INTEG_SHIFT
  8925. CCDC_CSC_DEC_MAX
  8926. CCDC_CSC_ENABLE
  8927. CCDC_CULLING
  8928. CCDC_DATAOFST_H_SHIFT
  8929. CCDC_DATAOFST_MASK
  8930. CCDC_DATAOFST_V_SHIFT
  8931. CCDC_DATAPOL_MASK
  8932. CCDC_DATAPOL_NORMAL
  8933. CCDC_DATAPOL_SHIFT
  8934. CCDC_DATASFT_MASK
  8935. CCDC_DATASFT_SHIFT
  8936. CCDC_DATA_10BITS
  8937. CCDC_DATA_11BITS
  8938. CCDC_DATA_12BITS
  8939. CCDC_DATA_13BITS
  8940. CCDC_DATA_14BITS
  8941. CCDC_DATA_15BITS
  8942. CCDC_DATA_16BITS
  8943. CCDC_DATA_8BITS
  8944. CCDC_DATA_NO_SHIFT
  8945. CCDC_DATA_PACK_ENABLE
  8946. CCDC_DATA_SHIFT_1BIT
  8947. CCDC_DATA_SHIFT_2BIT
  8948. CCDC_DATA_SHIFT_3BIT
  8949. CCDC_DATA_SHIFT_4BIT
  8950. CCDC_DATA_SHIFT_5BIT
  8951. CCDC_DATA_SHIFT_6BIT
  8952. CCDC_DATA_SZ_MASK
  8953. CCDC_DATA_SZ_SHIFT
  8954. CCDC_DCSUB
  8955. CCDC_DCSUB_DEFAULT_VAL
  8956. CCDC_DFCCTL_GDFCEN_MASK
  8957. CCDC_DFCCTL_VDFCEN_MASK
  8958. CCDC_DFCCTL_VDFCEN_SHIFT
  8959. CCDC_DFCCTL_VDFCSL_MASK
  8960. CCDC_DFCCTL_VDFCSL_SHIFT
  8961. CCDC_DFCCTL_VDFCUDA_MASK
  8962. CCDC_DFCCTL_VDFCUDA_SHIFT
  8963. CCDC_DFCCTL_VDFC_DISABLE
  8964. CCDC_DFCCTL_VDFLSFT_MASK
  8965. CCDC_DFCCTL_VDFLSFT_SHIFT
  8966. CCDC_DFCMEMCTL_DFCMARST_MASK
  8967. CCDC_DFCMEMCTL_DFCMARST_SHIFT
  8968. CCDC_DFCMEMCTL_DFCMWR_MASK
  8969. CCDC_DFCMEMCTL_DFCMWR_SHIFT
  8970. CCDC_DFCMEMCTL_INC_ADDR
  8971. CCDC_DFC_CLEAR
  8972. CCDC_DFC_CLEAR_COMPLETE
  8973. CCDC_DFC_CLR_ADDR
  8974. CCDC_DFC_INCR_ADDR
  8975. CCDC_DFC_MWR_WRITE_COMPLETE
  8976. CCDC_DFC_READ_COMPLETE
  8977. CCDC_DFC_READ_REG
  8978. CCDC_DFC_WRITE_REG
  8979. CCDC_DFT_TABLE_SIZE
  8980. CCDC_DF_ENABLE
  8981. CCDC_DISABLE_VIDEO_PORT
  8982. CCDC_ENABLE_VIDEO_PORT
  8983. CCDC_EVENT_LSC_DONE
  8984. CCDC_EVENT_VD0
  8985. CCDC_EVENT_VD1
  8986. CCDC_EXWEN_DISABLE
  8987. CCDC_EXWEN_MASK
  8988. CCDC_EXWEN_SHIFT
  8989. CCDC_FID_POL_MASK
  8990. CCDC_FID_POL_SHIFT
  8991. CCDC_FIELD_BOTH
  8992. CCDC_FIELD_BOTTOM
  8993. CCDC_FIELD_TOP
  8994. CCDC_FMTCFG
  8995. CCDC_FMTCFG_ADDRINC_MASK
  8996. CCDC_FMTCFG_ADDRINC_SHIFT
  8997. CCDC_FMTCFG_FMTMODE_MASK
  8998. CCDC_FMTCFG_FMTMODE_SHIFT
  8999. CCDC_FMTCFG_LNUM_MASK
  9000. CCDC_FMTCFG_LNUM_SHIFT
  9001. CCDC_FMTCFG_VPIN_MASK
  9002. CCDC_FMTCFG_VPIN_SHIFT
  9003. CCDC_FMTHCNT_MASK
  9004. CCDC_FMTLNH_MASK
  9005. CCDC_FMTLNV_MASK
  9006. CCDC_FMTPGN_APTR_MASK
  9007. CCDC_FMTPLEN_P0_MASK
  9008. CCDC_FMTPLEN_P0_SHIFT
  9009. CCDC_FMTPLEN_P1_MASK
  9010. CCDC_FMTPLEN_P1_SHIFT
  9011. CCDC_FMTPLEN_P2_MASK
  9012. CCDC_FMTPLEN_P2_SHIFT
  9013. CCDC_FMTPLEN_P3_MASK
  9014. CCDC_FMTPLEN_P3_SHIFT
  9015. CCDC_FMTRLEN_MASK
  9016. CCDC_FMTSLV_MASK
  9017. CCDC_FMTSPH_MASK
  9018. CCDC_FMT_ADDR0
  9019. CCDC_FMT_ADDR1
  9020. CCDC_FMT_ADDR2
  9021. CCDC_FMT_ADDR3
  9022. CCDC_FMT_ADDR4
  9023. CCDC_FMT_ADDR5
  9024. CCDC_FMT_ADDR6
  9025. CCDC_FMT_ADDR7
  9026. CCDC_FMT_HORZ
  9027. CCDC_FMT_HORZ_FMTLNH_MASK
  9028. CCDC_FMT_HORZ_FMTSPH_MASK
  9029. CCDC_FMT_HORZ_FMTSPH_SHIFT
  9030. CCDC_FMT_VERT
  9031. CCDC_FMT_VERT_FMTLNV_MASK
  9032. CCDC_FMT_VERT_FMTSLV_MASK
  9033. CCDC_FMT_VERT_FMTSLV_SHIFT
  9034. CCDC_FPC
  9035. CCDC_FPC_ADDR
  9036. CCDC_FPC_DISABLE
  9037. CCDC_FPC_ENABLE
  9038. CCDC_FPC_FPC_NUM_MASK
  9039. CCDC_FRMFMT_INTERLACED
  9040. CCDC_FRMFMT_PROGRESSIVE
  9041. CCDC_FRM_FMT_MASK
  9042. CCDC_FRM_FMT_SHIFT
  9043. CCDC_GAIN_MASK
  9044. CCDC_GAMMAWD_CFA_MASK
  9045. CCDC_GAMMAWD_CFA_SHIFT
  9046. CCDC_GAMMAWD_INPUT_SHIFT
  9047. CCDC_GAMMA_BITS_09_0
  9048. CCDC_GAMMA_BITS_10_1
  9049. CCDC_GAMMA_BITS_11_2
  9050. CCDC_GAMMA_BITS_12_3
  9051. CCDC_GAMMA_BITS_13_4
  9052. CCDC_GAMMA_BITS_14_5
  9053. CCDC_GAMMA_BITS_15_6
  9054. CCDC_GREEN_BLUE
  9055. CCDC_GREEN_RED
  9056. CCDC_HD_POL_MASK
  9057. CCDC_HD_POL_SHIFT
  9058. CCDC_HD_VD_WID
  9059. CCDC_HORZ_INFO
  9060. CCDC_HORZ_INFO_SPH_SHIFT
  9061. CCDC_HSIZE_FLIP_MASK
  9062. CCDC_HSIZE_FLIP_SHIFT
  9063. CCDC_HSIZE_OFF
  9064. CCDC_HSIZE_OFF_MASK
  9065. CCDC_HSIZE_VAL_MASK
  9066. CCDC_INPUT_CCP2B
  9067. CCDC_INPUT_CSI2A
  9068. CCDC_INPUT_CSI2C
  9069. CCDC_INPUT_MODE_MASK
  9070. CCDC_INPUT_MODE_SHIFT
  9071. CCDC_INPUT_NONE
  9072. CCDC_INPUT_PARALLEL
  9073. CCDC_INTERLACED_HEIGHT_SHIFT
  9074. CCDC_INTERLACED_IMAGE_INVERT
  9075. CCDC_INTERLACED_NO_IMAGE_INVERT
  9076. CCDC_LATCH_ON_VSYNC_DISABLE
  9077. CCDC_LATCH_ON_VSYNC_ENABLE
  9078. CCDC_LPF_ENABLE
  9079. CCDC_LPF_MASK
  9080. CCDC_LPF_SHIFT
  9081. CCDC_LSCCFG_GFTINV_MASK
  9082. CCDC_LSCCFG_GFTINV_SHIFT
  9083. CCDC_LSCCFG_GFTSF_MASK
  9084. CCDC_LSCCFG_GFTSF_SHIFT
  9085. CCDC_LSC_CENTRE_MASK
  9086. CCDC_LSC_COEFL_SHIFT
  9087. CCDC_LSC_COEFU_SHIFT
  9088. CCDC_LSC_COEF_MASK
  9089. CCDC_LSC_DISABLE
  9090. CCDC_LSC_ENABLE
  9091. CCDC_LSC_FRAC_MASK
  9092. CCDC_LSC_FRAC_MASK_T1
  9093. CCDC_LSC_GFMODE_MASK
  9094. CCDC_LSC_GFMODE_SHIFT
  9095. CCDC_LSC_GFTABLE_EPEL_SHIFT
  9096. CCDC_LSC_GFTABLE_EPOL_SHIFT
  9097. CCDC_LSC_GFTABLE_OPEL_SHIFT
  9098. CCDC_LSC_GFTABLE_OPOL_SHIFT
  9099. CCDC_LSC_GFTABLE_SEL_MASK
  9100. CCDC_LSC_INT_MASK
  9101. CCDC_LSC_MEMADDR_INCR
  9102. CCDC_LSC_MEMADDR_RESET
  9103. CCDC_LSC_TABLE1_SLC
  9104. CCDC_LSC_TABLE2_SLC
  9105. CCDC_LSC_TABLE3_SLC
  9106. CCDC_MAX_RAW_YUV_FORMATS
  9107. CCDC_MEDIAN_FILTER1
  9108. CCDC_MEDIAN_FILTER2
  9109. CCDC_MED_FILT_THRESH
  9110. CCDC_MFILT1_SHIFT
  9111. CCDC_MFILT2_SHIFT
  9112. CCDC_MIN_HEIGHT
  9113. CCDC_MIN_WIDTH
  9114. CCDC_NO_CULLING
  9115. CCDC_NO_MEDIAN_FILTER1
  9116. CCDC_NO_MEDIAN_FILTER2
  9117. CCDC_NUM_LINES_VER
  9118. CCDC_NUM_LINE_CALC_MASK
  9119. CCDC_NUM_LINE_CALC_SHIFT
  9120. CCDC_NUM_PX_HOR_MASK
  9121. CCDC_OFFSET_MASK
  9122. CCDC_OUTPUT_MEMORY
  9123. CCDC_OUTPUT_PREVIEW
  9124. CCDC_OUTPUT_RESIZER
  9125. CCDC_PADS_NUM
  9126. CCDC_PAD_SINK
  9127. CCDC_PAD_SOURCE_OF
  9128. CCDC_PAD_SOURCE_VP
  9129. CCDC_PCR
  9130. CCDC_PID
  9131. CCDC_PIXFMT_RAW
  9132. CCDC_PIXFMT_YCBCR_16BIT
  9133. CCDC_PIXFMT_YCBCR_8BIT
  9134. CCDC_PIXORDER_CBYCRY
  9135. CCDC_PIXORDER_YCBYCR
  9136. CCDC_PIX_FMT_MASK
  9137. CCDC_PIX_FMT_SHIFT
  9138. CCDC_PIX_LINES
  9139. CCDC_PPC_RAW
  9140. CCDC_PRGEVEN_0
  9141. CCDC_PRGEVEN_1
  9142. CCDC_PRGODD_0
  9143. CCDC_PRGODD_1
  9144. CCDC_PRINT_REGISTER
  9145. CCDC_PROGRESSIVE_IMAGE_INVERT
  9146. CCDC_PROGRESSIVE_NO_IMAGE_INVERT
  9147. CCDC_RAW_IP_MODE
  9148. CCDC_REC656IF
  9149. CCDC_REC656IF_BT656_EN
  9150. CCDC_RED
  9151. CCDC_REG_END
  9152. CCDC_REG_LAST
  9153. CCDC_SAMPLE_16LINES
  9154. CCDC_SAMPLE_16PIXELS
  9155. CCDC_SAMPLE_1LINES
  9156. CCDC_SAMPLE_1PIXELS
  9157. CCDC_SAMPLE_2LINES
  9158. CCDC_SAMPLE_2PIXELS
  9159. CCDC_SAMPLE_4LINES
  9160. CCDC_SAMPLE_4PIXELS
  9161. CCDC_SAMPLE_8LINES
  9162. CCDC_SAMPLE_8PIXELS
  9163. CCDC_SDOFST
  9164. CCDC_SDOFST_FIELD_INTERLEAVED
  9165. CCDC_SDOFST_INTERLACE_INVERSE
  9166. CCDC_SDOFST_INTERLACE_NORMAL
  9167. CCDC_SDOFST_PROGRESSIVE_INVERSE
  9168. CCDC_SDOFST_PROGRESSIVE_NORMAL
  9169. CCDC_SDR2RSZ_DISABLE
  9170. CCDC_SDR_ADDR
  9171. CCDC_START_PX_HOR_MASK
  9172. CCDC_START_VER_ONE_MASK
  9173. CCDC_START_VER_TWO_MASK
  9174. CCDC_STOP_CCDC_FINISHED
  9175. CCDC_STOP_EXECUTED
  9176. CCDC_STOP_FINISHED
  9177. CCDC_STOP_LSC_FINISHED
  9178. CCDC_STOP_NOT_REQUESTED
  9179. CCDC_STOP_REQUEST
  9180. CCDC_SYNCEN_VDHDEN_MASK
  9181. CCDC_SYNCEN_WEN_MASK
  9182. CCDC_SYNCEN_WEN_SHIFT
  9183. CCDC_SYN_FLDMODE_MASK
  9184. CCDC_SYN_FLDMODE_SHIFT
  9185. CCDC_SYN_MODE
  9186. CCDC_SYN_MODE_10BITS
  9187. CCDC_SYN_MODE_11BITS
  9188. CCDC_SYN_MODE_12BITS
  9189. CCDC_SYN_MODE_13BITS
  9190. CCDC_SYN_MODE_14BITS
  9191. CCDC_SYN_MODE_15BITS
  9192. CCDC_SYN_MODE_16BITS
  9193. CCDC_SYN_MODE_8BITS
  9194. CCDC_SYN_MODE_INPMOD_MASK
  9195. CCDC_SYN_MODE_INPMOD_SHIFT
  9196. CCDC_SYN_MODE_VD_POL_NEGATIVE
  9197. CCDC_TWO_BYTES_PER_PIXEL
  9198. CCDC_VDC_DFCVSAT_MASK
  9199. CCDC_VDF_HORZ_INTERPOL
  9200. CCDC_VDF_HORZ_INTERPOL_SAT
  9201. CCDC_VDF_NORMAL
  9202. CCDC_VDF_UPPER_DISABLE
  9203. CCDC_VDF_WHOLE_LINE_CORRECT
  9204. CCDC_VDHDEN_ENABLE
  9205. CCDC_VDHDOUT_INPUT
  9206. CCDC_VDHDOUT_MASK
  9207. CCDC_VDHDOUT_SHIFT
  9208. CCDC_VDINT
  9209. CCDC_VDINT_VDINT0_SHIFT
  9210. CCDC_VDINT_VDINT1_MASK
  9211. CCDC_VD_POL_MASK
  9212. CCDC_VD_POL_NEGATIVE
  9213. CCDC_VD_POL_SHIFT
  9214. CCDC_VERT_LINES
  9215. CCDC_VERT_START
  9216. CCDC_VERT_START_SLV0_SHIFT
  9217. CCDC_VP2SDR_DISABLE
  9218. CCDC_VP_OUT
  9219. CCDC_VP_OUT_HORZ_NUM_MASK
  9220. CCDC_VP_OUT_HORZ_NUM_SHIFT
  9221. CCDC_VP_OUT_HORZ_ST_MASK
  9222. CCDC_VP_OUT_VERT_NUM_MASK
  9223. CCDC_VP_OUT_VERT_NUM_SHIFT
  9224. CCDC_WEN_ENABLE
  9225. CCDC_WIN_PAL
  9226. CCDC_WIN_VGA
  9227. CCDC_Y8POS_SHIFT
  9228. CCDC_YCINSWP_RAW
  9229. CCDN
  9230. CCDR_MMDC_CH0_MASK
  9231. CCDR_MMDC_CH1_MASK
  9232. CCDSP_SET
  9233. CCD_MASK
  9234. CCD_SRC_SEL_MASK
  9235. CCD_SRC_SEL_SHIFT
  9236. CCE
  9237. CCEMTY_INT
  9238. CCEN
  9239. CCE_COUNTER_ARRAY32
  9240. CCE_CTRL
  9241. CCE_CTRL_RXE_RESUME_SMASK
  9242. CCE_CTRL_SPC_FREEZE_SMASK
  9243. CCE_CTRL_SPC_UNFREEZE_SMASK
  9244. CCE_CTRL_TXE_RESUME_SMASK
  9245. CCE_DC_CTRL
  9246. CCE_DC_CTRL_DC_RESET_SMASK
  9247. CCE_DC_CTRL_RESETCSR
  9248. CCE_ERR_CLEAR
  9249. CCE_ERR_INT
  9250. CCE_ERR_INT_CNT
  9251. CCE_ERR_MASK
  9252. CCE_ERR_STATUS
  9253. CCE_ERR_STATUS_CCE_CLI0_ASYNC_FIFO_PARITY_ERR_SMASK
  9254. CCE_ERR_STATUS_CCE_CLI1_ASYNC_FIFO_DBG_PARITY_ERROR_SMASK
  9255. CCE_ERR_STATUS_CCE_CLI1_ASYNC_FIFO_PIO_CRDT_PARITY_ERR_SMASK
  9256. CCE_ERR_STATUS_CCE_CLI1_ASYNC_FIFO_RXDMA_PARITY_ERROR_SMASK
  9257. CCE_ERR_STATUS_CCE_CLI1_ASYNC_FIFO_SDMA_HD_PARITY_ERR_SMASK
  9258. CCE_ERR_STATUS_CCE_CLI2_ASYNC_FIFO_PARITY_ERR_SMASK
  9259. CCE_ERR_STATUS_CCE_CSR_CFG_BUS_PARITY_ERR_SMASK
  9260. CCE_ERR_STATUS_CCE_CSR_PARITY_ERR_SMASK
  9261. CCE_ERR_STATUS_CCE_CSR_READ_BAD_ADDR_ERR_SMASK
  9262. CCE_ERR_STATUS_CCE_CSR_WRITE_BAD_ADDR_ERR_SMASK
  9263. CCE_ERR_STATUS_CCE_INT_MAP_COR_ERR_SMASK
  9264. CCE_ERR_STATUS_CCE_INT_MAP_UNC_ERR_SMASK
  9265. CCE_ERR_STATUS_CCE_MSIX_CSR_PARITY_ERR_SMASK
  9266. CCE_ERR_STATUS_CCE_MSIX_TABLE_COR_ERR_SMASK
  9267. CCE_ERR_STATUS_CCE_MSIX_TABLE_UNC_ERR_SMASK
  9268. CCE_ERR_STATUS_CCE_RCPL_ASYNC_FIFO_PARITY_ERR_SMASK
  9269. CCE_ERR_STATUS_CCE_RSPD_DATA_PARITY_ERR_SMASK
  9270. CCE_ERR_STATUS_CCE_RXDMA_CONV_FIFO_PARITY_ERR_SMASK
  9271. CCE_ERR_STATUS_CCE_SEG_READ_BAD_ADDR_ERR_SMASK
  9272. CCE_ERR_STATUS_CCE_SEG_WRITE_BAD_ADDR_ERR_SMASK
  9273. CCE_ERR_STATUS_CCE_TRGT_ACCESS_ERR_SMASK
  9274. CCE_ERR_STATUS_CCE_TRGT_ASYNC_FIFO_PARITY_ERR_SMASK
  9275. CCE_ERR_STATUS_CCE_TRGT_CPL_TIMEOUT_ERR_SMASK
  9276. CCE_ERR_STATUS_LA_TRIGGERED_SMASK
  9277. CCE_ERR_STATUS_PCIC_CPL_DAT_QCOR_ERR_SMASK
  9278. CCE_ERR_STATUS_PCIC_CPL_DAT_QUNC_ERR_SMASK
  9279. CCE_ERR_STATUS_PCIC_CPL_HD_QCOR_ERR_SMASK
  9280. CCE_ERR_STATUS_PCIC_CPL_HD_QUNC_ERR_SMASK
  9281. CCE_ERR_STATUS_PCIC_NPOST_DAT_QPARITY_ERR_SMASK
  9282. CCE_ERR_STATUS_PCIC_NPOST_HQ_PARITY_ERR_SMASK
  9283. CCE_ERR_STATUS_PCIC_POST_DAT_QCOR_ERR_SMASK
  9284. CCE_ERR_STATUS_PCIC_POST_DAT_QUNC_ERR_SMASK
  9285. CCE_ERR_STATUS_PCIC_POST_HD_QCOR_ERR_SMASK
  9286. CCE_ERR_STATUS_PCIC_POST_HD_QUNC_ERR_SMASK
  9287. CCE_ERR_STATUS_PCIC_RECEIVE_PARITY_ERR_SMASK
  9288. CCE_ERR_STATUS_PCIC_RETRY_MEM_COR_ERR_SMASK
  9289. CCE_ERR_STATUS_PCIC_RETRY_MEM_UNC_ERR_SMASK
  9290. CCE_ERR_STATUS_PCIC_RETRY_SOT_MEM_COR_ERR_SMASK
  9291. CCE_ERR_STATUS_PCIC_RETRY_SOT_MEM_UNC_ERR_SMASK
  9292. CCE_ERR_STATUS_PCIC_TRANSMIT_BACK_PARITY_ERR_SMASK
  9293. CCE_ERR_STATUS_PCIC_TRANSMIT_FRONT_PARITY_ERR_SMASK
  9294. CCE_INT_BLOCKED
  9295. CCE_INT_CLEAR
  9296. CCE_INT_COUNTER_ARRAY32
  9297. CCE_INT_DEV_CNTR_ELEM
  9298. CCE_INT_FORCE
  9299. CCE_INT_MAP
  9300. CCE_INT_MASK
  9301. CCE_INT_STATUS
  9302. CCE_MISC_INT_CNT
  9303. CCE_MSIX_INT_GRANTED
  9304. CCE_MSIX_PBA_OFFSET
  9305. CCE_MSIX_TABLE_LOWER
  9306. CCE_MSIX_TABLE_UPPER
  9307. CCE_MSIX_TABLE_UPPER_RESETCSR
  9308. CCE_MSIX_VEC_CLR_WITHOUT_INT
  9309. CCE_NUM_32_BIT_COUNTERS
  9310. CCE_NUM_32_BIT_INT_COUNTERS
  9311. CCE_NUM_INT_CSRS
  9312. CCE_NUM_INT_MAP_CSRS
  9313. CCE_NUM_MSIX_PBAS
  9314. CCE_NUM_MSIX_VECTORS
  9315. CCE_NUM_SCRATCH
  9316. CCE_PACKET0
  9317. CCE_PACKET1
  9318. CCE_PACKET2
  9319. CCE_PACKET3
  9320. CCE_PCIE_CTRL
  9321. CCE_PCIE_CTRL_PCIE_LANE_BUNDLE_MASK
  9322. CCE_PCIE_CTRL_PCIE_LANE_BUNDLE_SHIFT
  9323. CCE_PCIE_CTRL_PCIE_LANE_DELAY_MASK
  9324. CCE_PCIE_CTRL_PCIE_LANE_DELAY_SHIFT
  9325. CCE_PCIE_CTRL_XMT_MARGIN_GEN1_GEN2_MASK
  9326. CCE_PCIE_CTRL_XMT_MARGIN_GEN1_GEN2_OVERWRITE_ENABLE_MASK
  9327. CCE_PCIE_CTRL_XMT_MARGIN_GEN1_GEN2_OVERWRITE_ENABLE_SHIFT
  9328. CCE_PCIE_CTRL_XMT_MARGIN_GEN1_GEN2_SHIFT
  9329. CCE_PCIE_CTRL_XMT_MARGIN_OVERWRITE_ENABLE_SHIFT
  9330. CCE_PCIE_CTRL_XMT_MARGIN_SHIFT
  9331. CCE_PCIE_POSTED_CRDT_STALL_CNT
  9332. CCE_PCIE_TRGT_STALL_CNT
  9333. CCE_PERF_DEV_CNTR_ELEM
  9334. CCE_PIO_WR_STALL_CNT
  9335. CCE_RCV_AVAIL_INT_CNT
  9336. CCE_RCV_URGENT_INT_CNT
  9337. CCE_REVISION
  9338. CCE_REVISION2
  9339. CCE_REVISION2_HFI_ID_MASK
  9340. CCE_REVISION2_HFI_ID_SHIFT
  9341. CCE_REVISION2_IMPL_CODE_SHIFT
  9342. CCE_REVISION2_IMPL_REVISION_SHIFT
  9343. CCE_REVISION_BOARD_ID_LOWER_NIBBLE_MASK
  9344. CCE_REVISION_BOARD_ID_LOWER_NIBBLE_SHIFT
  9345. CCE_REVISION_CHIP_REV_MAJOR_MASK
  9346. CCE_REVISION_CHIP_REV_MAJOR_SHIFT
  9347. CCE_REVISION_CHIP_REV_MINOR_MASK
  9348. CCE_REVISION_CHIP_REV_MINOR_SHIFT
  9349. CCE_REVISION_SW_MASK
  9350. CCE_REVISION_SW_SHIFT
  9351. CCE_SCRATCH
  9352. CCE_SDMA_INT_CNT
  9353. CCE_SEND_CREDIT_INT_CNT
  9354. CCE_STATUS
  9355. CCE_STATUS_RXE_FROZE_SMASK
  9356. CCE_STATUS_RXE_PAUSED_SMASK
  9357. CCE_STATUS_SDMA_FROZE_SMASK
  9358. CCE_STATUS_SDMA_PAUSED_SMASK
  9359. CCE_STATUS_TIMEOUT
  9360. CCE_STATUS_TXE_FROZE_SMASK
  9361. CCE_STATUS_TXE_PAUSED_SMASK
  9362. CCE_STATUS_TXE_PIO_FROZE_SMASK
  9363. CCE_STATUS_TXE_PIO_PAUSED_SMASK
  9364. CCF1
  9365. CCF2
  9366. CCFC_REG_ACTIVITY_COUNTER
  9367. CCFC_REG_DBG_DWORD_ENABLE
  9368. CCFC_REG_DBG_FORCE_FRAME
  9369. CCFC_REG_DBG_FORCE_VALID
  9370. CCFC_REG_DBG_SELECT
  9371. CCFC_REG_DBG_SHIFT
  9372. CCFC_REG_STRONG_ENABLE_PF
  9373. CCFC_REG_STRONG_ENABLE_VF
  9374. CCFC_REG_WEAK_ENABLE_VF
  9375. CCFG_ID
  9376. CCFG_IP
  9377. CCFN
  9378. CCF_BRR
  9379. CCF_BRR_IPID
  9380. CCF_BRR_IPID_T1040
  9381. CCG4_ROW_SIZE
  9382. CCGX_RAB_DEVICE_MODE
  9383. CCGX_RAB_ENTER_FLASHING
  9384. CCGX_RAB_FLASH_ROW_RW
  9385. CCGX_RAB_INTR_REG
  9386. CCGX_RAB_JUMP_TO_BOOT
  9387. CCGX_RAB_PDPORT_ENABLE
  9388. CCGX_RAB_READ_ALL_VER
  9389. CCGX_RAB_READ_FW2_VER
  9390. CCGX_RAB_RESET_REQ
  9391. CCGX_RAB_RESPONSE
  9392. CCGX_RAB_UCSI_CONTROL
  9393. CCGX_RAB_UCSI_CONTROL_START
  9394. CCGX_RAB_UCSI_CONTROL_STOP
  9395. CCGX_RAB_UCSI_DATA_BLOCK
  9396. CCGX_RAB_VALIDATE_FW
  9397. CCG_DEVINFO_FWMODE_MASK
  9398. CCG_DEVINFO_FWMODE_SHIFT
  9399. CCG_DEVINFO_PDPORTS_MASK
  9400. CCG_DEVINFO_PDPORTS_SHIFT
  9401. CCG_EVENT_MAX
  9402. CCG_FW_BUILD_NVIDIA
  9403. CCG_OLD_FW_VERSION
  9404. CCG_VERSION
  9405. CCG_VERSION_MAJ_MASK
  9406. CCG_VERSION_MAJ_SHIFT
  9407. CCG_VERSION_MIN_MASK
  9408. CCG_VERSION_MIN_SHIFT
  9409. CCG_VERSION_PATCH
  9410. CCHCAUSE_BAD_TFM_CONFIG
  9411. CCHCAUSE_CBR_DEALLOCATION_ERROR
  9412. CCHCAUSE_CBR_RESOURCES_OVERSUBSCRIPED
  9413. CCHCAUSE_CCH_BUSY
  9414. CCHCAUSE_DSR_RESOURCES_OVERSUBSCRIPED
  9415. CCHCAUSE_ILLEGAL_OPCODE
  9416. CCHCAUSE_INVALID_ALLOCATION_REQUEST
  9417. CCHCAUSE_INVALID_DEALLOCATION_REQUEST
  9418. CCHCAUSE_INVALID_INTERRUPT_REQUEST
  9419. CCHCAUSE_INVALID_START_REQUEST
  9420. CCHCAUSE_NO_CBRS_TO_ALLOCATE
  9421. CCHCAUSE_REGION_REGISTER_WRITE_ERROR
  9422. CCHOP_ALLOCATE
  9423. CCHOP_DEALLOCATE
  9424. CCHOP_INTERRUPT
  9425. CCHOP_INTERRUPT_SYNC
  9426. CCHOP_START
  9427. CCHSTATE_ACTIVE
  9428. CCHSTATE_INACTIVE
  9429. CCHSTATE_INTERRUPTED
  9430. CCHSTATE_MAPPED
  9431. CCHSTATUS_ACTIVE
  9432. CCHSTATUS_EXCEPTION
  9433. CCHSTATUS_IDLE
  9434. CCH_LOCK_ATTEMPTS
  9435. CCI400_CYCLE_EVENT_EXT_ATTR_ENTRY
  9436. CCI400_PMU_CNTR0_IDX
  9437. CCI400_PMU_CYCLES
  9438. CCI400_PMU_CYCLE_CNTR_IDX
  9439. CCI400_PMU_EVENT_CODE
  9440. CCI400_PMU_EVENT_CODE_MASK
  9441. CCI400_PMU_EVENT_CODE_SHIFT
  9442. CCI400_PMU_EVENT_MASK
  9443. CCI400_PMU_EVENT_SOURCE
  9444. CCI400_PMU_EVENT_SOURCE_MASK
  9445. CCI400_PMU_EVENT_SOURCE_SHIFT
  9446. CCI400_PORTS_DATA
  9447. CCI400_PORT_M0
  9448. CCI400_PORT_M1
  9449. CCI400_PORT_M2
  9450. CCI400_PORT_S0
  9451. CCI400_PORT_S1
  9452. CCI400_PORT_S2
  9453. CCI400_PORT_S3
  9454. CCI400_PORT_S4
  9455. CCI400_R0
  9456. CCI400_R0_MASTER_PORT_MAX_EV
  9457. CCI400_R0_MASTER_PORT_MIN_EV
  9458. CCI400_R0_SLAVE_PORT_MAX_EV
  9459. CCI400_R0_SLAVE_PORT_MIN_EV
  9460. CCI400_R1
  9461. CCI400_R1_MASTER_PORT_MAX_EV
  9462. CCI400_R1_MASTER_PORT_MIN_EV
  9463. CCI400_R1_PX
  9464. CCI400_R1_SLAVE_PORT_MAX_EV
  9465. CCI400_R1_SLAVE_PORT_MIN_EV
  9466. CCI500_R0
  9467. CCI550_R0
  9468. CCI5xx_GLOBAL_EVENT_EXT_ATTR_ENTRY
  9469. CCI5xx_GLOBAL_PORT_MAX_EV
  9470. CCI5xx_GLOBAL_PORT_MIN_EV
  9471. CCI5xx_INVALID_EVENT
  9472. CCI5xx_MASTER_PORT_MAX_EV
  9473. CCI5xx_MASTER_PORT_MIN_EV
  9474. CCI5xx_PMU_EVENT_CODE
  9475. CCI5xx_PMU_EVENT_CODE_MASK
  9476. CCI5xx_PMU_EVENT_CODE_SHIFT
  9477. CCI5xx_PMU_EVENT_MASK
  9478. CCI5xx_PMU_EVENT_SOURCE
  9479. CCI5xx_PMU_EVENT_SOURCE_MASK
  9480. CCI5xx_PMU_EVENT_SOURCE_SHIFT
  9481. CCI5xx_PORT_GLOBAL
  9482. CCI5xx_PORT_M0
  9483. CCI5xx_PORT_M1
  9484. CCI5xx_PORT_M2
  9485. CCI5xx_PORT_M3
  9486. CCI5xx_PORT_M4
  9487. CCI5xx_PORT_M5
  9488. CCI5xx_PORT_M6
  9489. CCI5xx_PORT_S0
  9490. CCI5xx_PORT_S1
  9491. CCI5xx_PORT_S2
  9492. CCI5xx_PORT_S3
  9493. CCI5xx_PORT_S4
  9494. CCI5xx_PORT_S5
  9495. CCI5xx_PORT_S6
  9496. CCI5xx_SLAVE_PORT_MAX_EV
  9497. CCI5xx_SLAVE_PORT_MIN_EV
  9498. CCIACC
  9499. CCID
  9500. CCID2_SEQBUF_LEN
  9501. CCID2_SEQBUF_MAX
  9502. CCID2_WIN_CHANGE_FACTOR
  9503. CCID3_FBACK_INITIAL
  9504. CCID3_FBACK_NONE
  9505. CCID3_FBACK_PARAM_CHANGE
  9506. CCID3_FBACK_PERIODIC
  9507. CCID_DRIVER_ASYNC_POWERUP_TIMEOUT
  9508. CCID_DRIVER_BULK_DEFAULT_TIMEOUT
  9509. CCID_DRIVER_MINIMUM_TIMEOUT
  9510. CCID_EN
  9511. CCID_EXTENDED_STATE_RESTORE
  9512. CCID_EXTENDED_STATE_SAVE
  9513. CCID_HEADER_SIZE
  9514. CCID_LENGTH_OFFSET
  9515. CCID_MAX
  9516. CCID_MAX_LEN
  9517. CCID_PACKET_DELAY
  9518. CCID_PACKET_DELAY_MAX
  9519. CCID_PACKET_ERR
  9520. CCID_PACKET_SEND_AT_ONCE
  9521. CCID_PACKET_WILL_DEQUEUE_LATER
  9522. CCID_SLAB_NAME_LENGTH
  9523. CCIOAACESS
  9524. CCIO_CHAINID_MASK
  9525. CCIO_CHAINID_SHIFT
  9526. CCIO_COLLECT_STATS
  9527. CCIO_FIND_FREE_MAPPING
  9528. CCIO_FREE_MAPPINGS
  9529. CCIO_INLINE
  9530. CCIO_IOVA
  9531. CCIO_IOVP
  9532. CCIO_SEARCH_LOOP
  9533. CCIO_SEARCH_SAMPLE
  9534. CCIQUANT
  9535. CCIR0
  9536. CCIR656
  9537. CCISS_BIG_PASSTHRU
  9538. CCISS_BIG_PASSTHRU32
  9539. CCISS_DEFS_H
  9540. CCISS_DEREGDISK
  9541. CCISS_GETBUSTYPES
  9542. CCISS_GETDRIVVER
  9543. CCISS_GETFIRMVER
  9544. CCISS_GETHEARTBEAT
  9545. CCISS_GETINTINFO
  9546. CCISS_GETLUNINFO
  9547. CCISS_GETNODENAME
  9548. CCISS_GETPCIINFO
  9549. CCISS_IOCTLH
  9550. CCISS_IOC_MAGIC
  9551. CCISS_PASSTHRU
  9552. CCISS_PASSTHRU32
  9553. CCISS_REGNEWD
  9554. CCISS_REGNEWDISK
  9555. CCISS_RESCANDISK
  9556. CCISS_REVALIDVOLS
  9557. CCISS_SETINTINFO
  9558. CCISS_SETNODENAME
  9559. CCIS_ASI
  9560. CCIS_ASO
  9561. CCIS_ROMI
  9562. CCITHRES
  9563. CCI_ACD_FUNC_RSTB_MASK
  9564. CCI_ACD_FUNC_RSTB_MASK_SFT
  9565. CCI_ACD_FUNC_RSTB_SFT
  9566. CCI_ACD_MODE_MASK
  9567. CCI_ACD_MODE_MASK_SFT
  9568. CCI_ACD_MODE_SFT
  9569. CCI_AFIFO_CLK_PWDB_MASK
  9570. CCI_AFIFO_CLK_PWDB_MASK_SFT
  9571. CCI_AFIFO_CLK_PWDB_SFT
  9572. CCI_AUDIO_FIFO_CLKIN_INV_MASK
  9573. CCI_AUDIO_FIFO_CLKIN_INV_MASK_SFT
  9574. CCI_AUDIO_FIFO_CLKIN_INV_SFT
  9575. CCI_AUDIO_FIFO_ENABLE_MASK
  9576. CCI_AUDIO_FIFO_ENABLE_MASK_SFT
  9577. CCI_AUDIO_FIFO_ENABLE_SFT
  9578. CCI_AUDIO_FIFO_WPTR_MASK
  9579. CCI_AUDIO_FIFO_WPTR_MASK_SFT
  9580. CCI_AUDIO_FIFO_WPTR_SFT
  9581. CCI_AUD_ANACK_SEL_MASK
  9582. CCI_AUD_ANACK_SEL_MASK_SFT
  9583. CCI_AUD_ANACK_SEL_SFT
  9584. CCI_AUD_DAC_ANA_MUTE_MASK
  9585. CCI_AUD_DAC_ANA_MUTE_MASK_SFT
  9586. CCI_AUD_DAC_ANA_MUTE_SFT
  9587. CCI_AUD_DAC_ANA_RSTB_SEL_MASK
  9588. CCI_AUD_DAC_ANA_RSTB_SEL_MASK_SFT
  9589. CCI_AUD_DAC_ANA_RSTB_SEL_SFT
  9590. CCI_AUD_IDAC_TEST_EN_MASK
  9591. CCI_AUD_IDAC_TEST_EN_MASK_SFT
  9592. CCI_AUD_IDAC_TEST_EN_SFT
  9593. CCI_AUD_SDM_7BIT_SEL_MASK
  9594. CCI_AUD_SDM_7BIT_SEL_MASK_SFT
  9595. CCI_AUD_SDM_7BIT_SEL_SFT
  9596. CCI_AUD_SDM_MUTEL_MASK
  9597. CCI_AUD_SDM_MUTEL_MASK_SFT
  9598. CCI_AUD_SDM_MUTEL_SFT
  9599. CCI_AUD_SDM_MUTER_MASK
  9600. CCI_AUD_SDM_MUTER_MASK_SFT
  9601. CCI_AUD_SDM_MUTER_SFT
  9602. CCI_AUD_SPLIT_TEST_EN_MASK
  9603. CCI_AUD_SPLIT_TEST_EN_MASK_SFT
  9604. CCI_AUD_SPLIT_TEST_EN_SFT
  9605. CCI_CLK_SRC
  9606. CCI_CTRL_STATUS
  9607. CCI_ENABLE_DVM_REQ
  9608. CCI_ENABLE_REQ
  9609. CCI_ENABLE_SNOOP_REQ
  9610. CCI_EVENT_EXT_ATTR_ENTRY
  9611. CCI_EXT_ATTR_ENTRY
  9612. CCI_FORMAT_EXT_ATTR_ENTRY
  9613. CCI_IF_GLOBAL
  9614. CCI_IF_MASTER
  9615. CCI_IF_MAX
  9616. CCI_IF_SLAVE
  9617. CCI_LCH_INV_MASK
  9618. CCI_LCH_INV_MASK_SFT
  9619. CCI_LCH_INV_SFT
  9620. CCI_MODEL_MAX
  9621. CCI_PID2
  9622. CCI_PID2_REV_MASK
  9623. CCI_PID2_REV_SHIFT
  9624. CCI_PMCR
  9625. CCI_PMCR_CEN
  9626. CCI_PMCR_NCNT_MASK
  9627. CCI_PMCR_NCNT_SHIFT
  9628. CCI_PMU_CNTR
  9629. CCI_PMU_CNTR_BASE
  9630. CCI_PMU_CNTR_CTRL
  9631. CCI_PMU_CNTR_LAST
  9632. CCI_PMU_CNTR_MASK
  9633. CCI_PMU_CNTR_SIZE
  9634. CCI_PMU_EVT_SEL
  9635. CCI_PMU_MAX_HW_CNTRS
  9636. CCI_PMU_OVRFLW
  9637. CCI_PMU_OVRFLW_FLAG
  9638. CCI_PORT_CTRL
  9639. CCI_RAND_EN_MASK
  9640. CCI_RAND_EN_MASK_SFT
  9641. CCI_RAND_EN_SFT
  9642. CCI_SCRAMBLER_CG_EN_MASK
  9643. CCI_SCRAMBLER_CG_EN_MASK_SFT
  9644. CCI_SCRAMBLER_CG_EN_SFT
  9645. CCI_SCRAMBLER_EN_MASK
  9646. CCI_SCRAMBLER_EN_MASK_SFT
  9647. CCI_SCRAMBLER_EN_SFT
  9648. CCI_SPLT_SCRMB_CLK_ON_MASK
  9649. CCI_SPLT_SCRMB_CLK_ON_MASK_SFT
  9650. CCI_SPLT_SCRMB_CLK_ON_SFT
  9651. CCI_SPLT_SCRMB_ON_MASK
  9652. CCI_SPLT_SCRMB_ON_MASK_SFT
  9653. CCI_SPLT_SCRMB_ON_SFT
  9654. CCI_ZERO_PAD_DISABLE_MASK
  9655. CCI_ZERO_PAD_DISABLE_MASK_SFT
  9656. CCI_ZERO_PAD_DISABLE_SFT
  9657. CCK
  9658. CCK0_AFE_RX_ANT_A
  9659. CCK0_AFE_RX_ANT_AB
  9660. CCK0_AFE_RX_ANT_B
  9661. CCK0_AFE_RX_MASK
  9662. CCK0_SIDEBAND
  9663. CCKEY_ADDRESS
  9664. CCKEY_FUNCTION
  9665. CCKEY_SRCLINE
  9666. CCKM_KRK_CIPHER_SUITE
  9667. CCKTxBBGainTableLength
  9668. CCK_ACK_DURATION
  9669. CCK_ACK_TOUT_VALUE
  9670. CCK_CZ_CLOCK_CONTROL
  9671. CCK_DELTA
  9672. CCK_DISPLAY_CLOCK_CONTROL
  9673. CCK_DISPLAY_REF_CLOCK_CONTROL
  9674. CCK_DURATION
  9675. CCK_DURATION_LIST
  9676. CCK_FA_AVG_RESET
  9677. CCK_FA_STAGE_HIGH
  9678. CCK_FA_STAGE_LOW
  9679. CCK_FREQUENCY_STATUS
  9680. CCK_FREQUENCY_STATUS_SHIFT
  9681. CCK_FREQUENCY_VALUES
  9682. CCK_FUSE_HPLL_FREQ_MASK
  9683. CCK_FUSE_REG
  9684. CCK_GPLL_CLOCK_CONTROL
  9685. CCK_GROUP
  9686. CCK_GROUP_SHIFT
  9687. CCK_LONG
  9688. CCK_MPDU_FAIL_BIT
  9689. CCK_MPDU_OK_BIT
  9690. CCK_PD_FA_LV0_MAX
  9691. CCK_PD_FA_LV1_MIN
  9692. CCK_PD_IGI_LV2_VAL
  9693. CCK_PD_IGI_LV3_VAL
  9694. CCK_PD_IGI_LV4_VAL
  9695. CCK_PD_LV0
  9696. CCK_PD_LV1
  9697. CCK_PD_LV2
  9698. CCK_PD_LV3
  9699. CCK_PD_LV4
  9700. CCK_PD_LV_MAX
  9701. CCK_PD_RSSI_LV2_VAL
  9702. CCK_PD_RSSI_LV3_VAL
  9703. CCK_PD_RSSI_LV4_VAL
  9704. CCK_PD_STAGE_HIGHRSSI
  9705. CCK_PD_STAGE_LOWRSSI
  9706. CCK_PD_STAGE_MAX
  9707. CCK_PHY
  9708. CCK_PLCP_BITS
  9709. CCK_PPDU_BIT
  9710. CCK_PREAMBLE_BITS
  9711. CCK_PROT_CFG
  9712. CCK_PROT_CFG_PROTECT_CTRL
  9713. CCK_PROT_CFG_PROTECT_NAV_LONG
  9714. CCK_PROT_CFG_PROTECT_NAV_SHORT
  9715. CCK_PROT_CFG_PROTECT_RATE
  9716. CCK_PROT_CFG_RTS_TH_EN
  9717. CCK_PROT_CFG_TX_OP_ALLOW_CCK
  9718. CCK_PROT_CFG_TX_OP_ALLOW_GF20
  9719. CCK_PROT_CFG_TX_OP_ALLOW_GF40
  9720. CCK_PROT_CFG_TX_OP_ALLOW_MM20
  9721. CCK_PROT_CFG_TX_OP_ALLOW_MM40
  9722. CCK_PROT_CFG_TX_OP_ALLOW_OFDM
  9723. CCK_RATE
  9724. CCK_REG_DSI_PLL_CONTROL
  9725. CCK_REG_DSI_PLL_DIVIDER
  9726. CCK_REG_DSI_PLL_FUSE
  9727. CCK_RX_VERSION_1
  9728. CCK_RX_VERSION_2
  9729. CCK_Rx_Version_1
  9730. CCK_Rx_Version_2
  9731. CCK_Rx_Version_MAX
  9732. CCK_SHORT
  9733. CCK_SIFS_TIME
  9734. CCK_TABLE_LENGTH
  9735. CCK_TABLE_SIZE
  9736. CCK_TRUNK_FORCE_OFF
  9737. CCK_TRUNK_FORCE_ON
  9738. CCK_TXAGC
  9739. CCK_Table_length
  9740. CCLKG_BURST_POLICY
  9741. CCLKLP_BURST_POLICY
  9742. CCLK_BURST_POLICY
  9743. CCLK_BURST_POLICY_PLLX
  9744. CCLK_BURST_POLICY_SHIFT
  9745. CCLK_IDLE_POLICY
  9746. CCLK_IDLE_POLICY_SHIFT
  9747. CCLK_RUN_POLICY
  9748. CCLK_RUN_POLICY_SHIFT
  9749. CCL_CHP_TYPE_CAP
  9750. CCL_CSS_IMG
  9751. CCL_CSS_IMG_CONF_CHAR
  9752. CCL_CU_ON_CHP
  9753. CCL_IOP_CHP
  9754. CCMP_FC_MUTE
  9755. CCMP_HDR_LEN
  9756. CCMP_MIC_LEN
  9757. CCMP_PN_LEN
  9758. CCMP_TK_LEN
  9759. CCMR_CHANNEL_MASK
  9760. CCMR_CHANNEL_SHIFT
  9761. CCM_A0_OFFSET
  9762. CCM_AAD_FIELD_SIZE
  9763. CCM_AAD_LEN
  9764. CCM_AES_IV_SIZE
  9765. CCM_ANALOG_PFD_480
  9766. CCM_ANALOG_PFD_528
  9767. CCM_ANALOG_PLL_BYPASS
  9768. CCM_ANALOG_PLL_VIDEO
  9769. CCM_B0_ADATA
  9770. CCM_B0_ADATA_SHIFT
  9771. CCM_B0_L_PRIME
  9772. CCM_B0_L_PRIME_SHIFT
  9773. CCM_B0_M_PRIME
  9774. CCM_B0_M_PRIME_SHIFT
  9775. CCM_B0_OFFSET
  9776. CCM_B0_SIZE
  9777. CCM_BLOCK_IV_OFFSET
  9778. CCM_BLOCK_IV_SIZE
  9779. CCM_BLOCK_NONCE_OFFSET
  9780. CCM_BLOCK_NONCE_SIZE
  9781. CCM_CACRR
  9782. CCM_CCDR
  9783. CCM_CCGR0
  9784. CCM_CCGR1
  9785. CCM_CCGR10
  9786. CCM_CCGR11
  9787. CCM_CCGR2
  9788. CCM_CCGR3
  9789. CCM_CCGR4
  9790. CCM_CCGR5
  9791. CCM_CCGR6
  9792. CCM_CCGR7
  9793. CCM_CCGR8
  9794. CCM_CCGR9
  9795. CCM_CCGRx
  9796. CCM_CCGRx_CGn
  9797. CCM_CCOWR
  9798. CCM_CCPGR0
  9799. CCM_CCPGR1
  9800. CCM_CCPGR2
  9801. CCM_CCPGR3
  9802. CCM_CCR
  9803. CCM_CCSR
  9804. CCM_CCTL
  9805. CCM_CGCR0
  9806. CCM_CGCR1
  9807. CCM_CGCR2
  9808. CCM_CGPR
  9809. CCM_CIMR
  9810. CCM_CISR
  9811. CCM_CLPCR
  9812. CCM_CMEOR0
  9813. CCM_CMEOR1
  9814. CCM_CMEOR2
  9815. CCM_CMEOR3
  9816. CCM_CMEOR4
  9817. CCM_CMEOR5
  9818. CCM_CONFIG_BUF_SIZE
  9819. CCM_CPPDSR
  9820. CCM_CRDR
  9821. CCM_CS2CDR
  9822. CCM_CSCDR1
  9823. CCM_CSCDR2
  9824. CCM_CSCDR3
  9825. CCM_CSCDR4
  9826. CCM_CSCMR1
  9827. CCM_CSCMR2
  9828. CCM_CSCR
  9829. CCM_CSR
  9830. CCM_CTR_COUNT_0_OFFSET
  9831. CCM_DCVR0
  9832. CCM_DCVR1
  9833. CCM_DCVR2
  9834. CCM_DCVR3
  9835. CCM_ESP_IV_SIZE
  9836. CCM_ESP_L_VALUE
  9837. CCM_ESP_SALT_OFFSET
  9838. CCM_ESP_SALT_SIZE
  9839. CCM_LTR0
  9840. CCM_LTR1
  9841. CCM_LTR2
  9842. CCM_LTR3
  9843. CCM_MCR
  9844. CCM_MPCTL
  9845. CCM_MPCTL0
  9846. CCM_MPCTL1
  9847. CCM_PCCR0
  9848. CCM_PCCR1
  9849. CCM_PCDR
  9850. CCM_PCDR0
  9851. CCM_PCDR1
  9852. CCM_PCDR2
  9853. CCM_PCDR3
  9854. CCM_RCSR
  9855. CCM_REG_CAM_OCCUP
  9856. CCM_REG_CCM_CFC_IFEN
  9857. CCM_REG_CCM_CQM_IFEN
  9858. CCM_REG_CCM_CQM_USE_Q
  9859. CCM_REG_CCM_INT_MASK
  9860. CCM_REG_CCM_INT_STS
  9861. CCM_REG_CCM_PRTY_MASK
  9862. CCM_REG_CCM_PRTY_STS
  9863. CCM_REG_CCM_PRTY_STS_CLR
  9864. CCM_REG_CCM_REG0_SZ
  9865. CCM_REG_CCM_STORM0_IFEN
  9866. CCM_REG_CCM_STORM1_IFEN
  9867. CCM_REG_CDU_AG_RD_IFEN
  9868. CCM_REG_CDU_AG_WR_IFEN
  9869. CCM_REG_CDU_SM_RD_IFEN
  9870. CCM_REG_CDU_SM_WR_IFEN
  9871. CCM_REG_CFC_INIT_CRD
  9872. CCM_REG_CNT_AUX1_Q
  9873. CCM_REG_CNT_AUX2_Q
  9874. CCM_REG_CQM_CCM_HDR_P
  9875. CCM_REG_CQM_CCM_HDR_S
  9876. CCM_REG_CQM_CCM_IFEN
  9877. CCM_REG_CQM_INIT_CRD
  9878. CCM_REG_CQM_P_WEIGHT
  9879. CCM_REG_CQM_S_WEIGHT
  9880. CCM_REG_CSDM_IFEN
  9881. CCM_REG_CSDM_LENGTH_MIS
  9882. CCM_REG_CSDM_WEIGHT
  9883. CCM_REG_ERR_CCM_HDR
  9884. CCM_REG_ERR_EVNT_ID
  9885. CCM_REG_FIC0_INIT_CRD
  9886. CCM_REG_FIC1_INIT_CRD
  9887. CCM_REG_GR_ARB_TYPE
  9888. CCM_REG_GR_LD0_PR
  9889. CCM_REG_GR_LD1_PR
  9890. CCM_REG_INV_DONE_Q
  9891. CCM_REG_N_SM_CTX_LD_0
  9892. CCM_REG_N_SM_CTX_LD_1
  9893. CCM_REG_N_SM_CTX_LD_2
  9894. CCM_REG_N_SM_CTX_LD_3
  9895. CCM_REG_N_SM_CTX_LD_4
  9896. CCM_REG_PBF_IFEN
  9897. CCM_REG_PBF_LENGTH_MIS
  9898. CCM_REG_PBF_WEIGHT
  9899. CCM_REG_PHYS_QNUM1_0
  9900. CCM_REG_PHYS_QNUM1_1
  9901. CCM_REG_PHYS_QNUM2_0
  9902. CCM_REG_PHYS_QNUM2_1
  9903. CCM_REG_PHYS_QNUM3_0
  9904. CCM_REG_PHYS_QNUM3_1
  9905. CCM_REG_QOS_PHYS_QNUM0_0
  9906. CCM_REG_QOS_PHYS_QNUM0_1
  9907. CCM_REG_QOS_PHYS_QNUM1_0
  9908. CCM_REG_QOS_PHYS_QNUM1_1
  9909. CCM_REG_QOS_PHYS_QNUM2_0
  9910. CCM_REG_QOS_PHYS_QNUM2_1
  9911. CCM_REG_QOS_PHYS_QNUM3_0
  9912. CCM_REG_QOS_PHYS_QNUM3_1
  9913. CCM_REG_STORM_CCM_IFEN
  9914. CCM_REG_STORM_LENGTH_MIS
  9915. CCM_REG_STORM_WEIGHT
  9916. CCM_REG_TSEM_IFEN
  9917. CCM_REG_TSEM_LENGTH_MIS
  9918. CCM_REG_TSEM_WEIGHT
  9919. CCM_REG_USEM_IFEN
  9920. CCM_REG_USEM_LENGTH_MIS
  9921. CCM_REG_USEM_WEIGHT
  9922. CCM_REG_XSEM_IFEN
  9923. CCM_REG_XSEM_LENGTH_MIS
  9924. CCM_REG_XSEM_WEIGHT
  9925. CCM_REG_XX_DESCR_TABLE
  9926. CCM_REG_XX_DESCR_TABLE_SIZE
  9927. CCM_REG_XX_FREE
  9928. CCM_REG_XX_INIT_CRD
  9929. CCM_REG_XX_MSG_NUM
  9930. CCM_REG_XX_OVFL_EVNT_ID
  9931. CCM_REG_XX_TABLE
  9932. CCM_SPCTL0
  9933. CCM_SPCTL1
  9934. CCM_UPCTL
  9935. CCNTPERR_F
  9936. CCNTPERR_S
  9937. CCNTPERR_V
  9938. CCNT_AVG_SEL
  9939. CCNT_NEG1
  9940. CCNT_NEG2
  9941. CCNT_POS1
  9942. CCNT_POS2
  9943. CCNT_SNEG
  9944. CCNT_SPOS
  9945. CCNT_TO_MSEC
  9946. CCN_ALL_OLY_ID
  9947. CCN_ALL_OLY_ID__NODE_ID__MASK
  9948. CCN_ALL_OLY_ID__NODE_ID__SHIFT
  9949. CCN_ALL_OLY_ID__OLY_ID__MASK
  9950. CCN_ALL_OLY_ID__OLY_ID__SHIFT
  9951. CCN_CMP_MASK_ATTR
  9952. CCN_CMP_MASK_ATTR_RO
  9953. CCN_CONFIG_BUS
  9954. CCN_CONFIG_DIR
  9955. CCN_CONFIG_EVENT
  9956. CCN_CONFIG_MASK
  9957. CCN_CONFIG_NODE
  9958. CCN_CONFIG_PORT
  9959. CCN_CONFIG_TYPE
  9960. CCN_CONFIG_VC
  9961. CCN_CONFIG_XP
  9962. CCN_CVR
  9963. CCN_DT_ACTIVE_DSM
  9964. CCN_DT_ACTIVE_DSM__DSM_ID__MASK
  9965. CCN_DT_ACTIVE_DSM__DSM_ID__SHIFT
  9966. CCN_DT_CTL
  9967. CCN_DT_CTL__DT_EN
  9968. CCN_DT_PMCCNTR
  9969. CCN_DT_PMCCNTRSR
  9970. CCN_DT_PMCR
  9971. CCN_DT_PMCR__OVFL_INTR_EN
  9972. CCN_DT_PMCR__PMU_EN
  9973. CCN_DT_PMEVCNT
  9974. CCN_DT_PMOVSR
  9975. CCN_DT_PMOVSR_CLR
  9976. CCN_DT_PMOVSR_CLR__MASK
  9977. CCN_DT_PMSR
  9978. CCN_DT_PMSR_CLR
  9979. CCN_DT_PMSR_REQ
  9980. CCN_EVENT_ATTR
  9981. CCN_EVENT_CYCLES
  9982. CCN_EVENT_HNF
  9983. CCN_EVENT_HNI
  9984. CCN_EVENT_MN
  9985. CCN_EVENT_RNI
  9986. CCN_EVENT_SBAS
  9987. CCN_EVENT_SBSX
  9988. CCN_EVENT_WATCHPOINT
  9989. CCN_EVENT_XP
  9990. CCN_FORMAT_ATTR
  9991. CCN_HNF_PMU_EVENT_SEL
  9992. CCN_HNF_PMU_EVENT_SEL__ID__MASK
  9993. CCN_HNF_PMU_EVENT_SEL__ID__SHIFT
  9994. CCN_IDX_MASK_ANY
  9995. CCN_IDX_MASK_EXACT
  9996. CCN_IDX_MASK_OPCODE
  9997. CCN_IDX_MASK_ORDER
  9998. CCN_IDX_PMU_CYCLE_COUNTER
  9999. CCN_MN_ERRINT_STATUS
  10000. CCN_MN_ERRINT_STATUS__ALL_ERRORS__DISABLE
  10001. CCN_MN_ERRINT_STATUS__ALL_ERRORS__DISABLED
  10002. CCN_MN_ERRINT_STATUS__ALL_ERRORS__ENABLE
  10003. CCN_MN_ERRINT_STATUS__CORRECTED_ERRORS_DISABLE
  10004. CCN_MN_ERRINT_STATUS__CORRECTED_ERRORS_DISABLED
  10005. CCN_MN_ERRINT_STATUS__CORRECTED_ERRORS_ENABLE
  10006. CCN_MN_ERRINT_STATUS__INTREQ__DESSERT
  10007. CCN_MN_ERRINT_STATUS__PMU_EVENTS__DISABLE
  10008. CCN_MN_ERRINT_STATUS__PMU_EVENTS__DISABLED
  10009. CCN_MN_ERRINT_STATUS__PMU_EVENTS__ENABLE
  10010. CCN_MN_ERR_SIG_VAL_63_0
  10011. CCN_MN_ERR_SIG_VAL_63_0__DT
  10012. CCN_MN_OLY_COMP_LIST_63_0
  10013. CCN_NUM_PMU_EVENTS
  10014. CCN_NUM_PMU_EVENT_COUNTERS
  10015. CCN_NUM_PREDEFINED_MASKS
  10016. CCN_NUM_REGIONS
  10017. CCN_NUM_VCS
  10018. CCN_NUM_XP_PORTS
  10019. CCN_NUM_XP_WATCHPOINTS
  10020. CCN_PRR
  10021. CCN_PVR
  10022. CCN_REGION_SIZE
  10023. CCN_RNI_PMU_EVENT_SEL
  10024. CCN_RNI_PMU_EVENT_SEL__ID__MASK
  10025. CCN_RNI_PMU_EVENT_SEL__ID__SHIFT
  10026. CCN_SBAS_PMU_EVENT_SEL
  10027. CCN_SBAS_PMU_EVENT_SEL__ID__MASK
  10028. CCN_SBAS_PMU_EVENT_SEL__ID__SHIFT
  10029. CCN_TYPE_CYCLES
  10030. CCN_TYPE_DT
  10031. CCN_TYPE_HNF
  10032. CCN_TYPE_HNI
  10033. CCN_TYPE_MN
  10034. CCN_TYPE_RND_1P
  10035. CCN_TYPE_RND_2P
  10036. CCN_TYPE_RND_3P
  10037. CCN_TYPE_RNI_1P
  10038. CCN_TYPE_RNI_2P
  10039. CCN_TYPE_RNI_3P
  10040. CCN_TYPE_SBAS
  10041. CCN_TYPE_SBSX
  10042. CCN_TYPE_XP
  10043. CCN_XP_DT_CMP_MASK_H
  10044. CCN_XP_DT_CMP_MASK_L
  10045. CCN_XP_DT_CMP_VAL_H
  10046. CCN_XP_DT_CMP_VAL_L
  10047. CCN_XP_DT_CONFIG
  10048. CCN_XP_DT_CONFIG__DT_CFG__DEVICE_PMU_EVENT
  10049. CCN_XP_DT_CONFIG__DT_CFG__MASK
  10050. CCN_XP_DT_CONFIG__DT_CFG__PASS_THROUGH
  10051. CCN_XP_DT_CONFIG__DT_CFG__SHIFT
  10052. CCN_XP_DT_CONFIG__DT_CFG__WATCHPOINT
  10053. CCN_XP_DT_CONFIG__DT_CFG__WATCHPOINT_0_OR_1
  10054. CCN_XP_DT_CONFIG__DT_CFG__XP_PMU_EVENT
  10055. CCN_XP_DT_CONTROL
  10056. CCN_XP_DT_CONTROL__DT_ENABLE
  10057. CCN_XP_DT_CONTROL__WP_ARM_SEL__ALWAYS
  10058. CCN_XP_DT_CONTROL__WP_ARM_SEL__MASK
  10059. CCN_XP_DT_CONTROL__WP_ARM_SEL__SHIFT
  10060. CCN_XP_DT_INTERFACE_SEL
  10061. CCN_XP_DT_INTERFACE_SEL__DT_DEV_SEL__MASK
  10062. CCN_XP_DT_INTERFACE_SEL__DT_DEV_SEL__SHIFT
  10063. CCN_XP_DT_INTERFACE_SEL__DT_IO_SEL__MASK
  10064. CCN_XP_DT_INTERFACE_SEL__DT_IO_SEL__SHIFT
  10065. CCN_XP_DT_INTERFACE_SEL__DT_VC_SEL__MASK
  10066. CCN_XP_DT_INTERFACE_SEL__DT_VC_SEL__SHIFT
  10067. CCN_XP_PMU_EVENT_SEL
  10068. CCN_XP_PMU_EVENT_SEL__ID__MASK
  10069. CCN_XP_PMU_EVENT_SEL__ID__SHIFT
  10070. CCODE_BLOCK
  10071. CCODE_BYTE
  10072. CCODE_CSR
  10073. CCODE_EEPROM
  10074. CCODE_END
  10075. CCODE_PEC
  10076. CCODE_START
  10077. CCODE_WORD
  10078. CCOLP
  10079. CCON
  10080. CCONEXIST
  10081. CCONMODE
  10082. CCONMSK
  10083. CCONR_ENABLE_ERROR
  10084. CCONR_RETRY_MASK
  10085. CCORE_NR_CLK
  10086. CCP
  10087. CCP2_INPUT_MEMORY
  10088. CCP2_INPUT_NONE
  10089. CCP2_INPUT_SENSOR
  10090. CCP2_LCx_CHANS_NUM
  10091. CCP2_OUTPUT_CCDC
  10092. CCP2_OUTPUT_MEMORY
  10093. CCP2_OUTPUT_NONE
  10094. CCP2_PADS_NUM
  10095. CCP2_PAD_SINK
  10096. CCP2_PAD_SOURCE
  10097. CCP2_PRINT_REGISTER
  10098. CCP5_CMD_DST_HI
  10099. CCP5_CMD_DST_LO
  10100. CCP5_CMD_DST_MEM
  10101. CCP5_CMD_DW0
  10102. CCP5_CMD_DW1
  10103. CCP5_CMD_DW2
  10104. CCP5_CMD_DW3
  10105. CCP5_CMD_DW4
  10106. CCP5_CMD_DW5
  10107. CCP5_CMD_DW6
  10108. CCP5_CMD_DW7
  10109. CCP5_CMD_ENGINE
  10110. CCP5_CMD_EOM
  10111. CCP5_CMD_FIX_DST
  10112. CCP5_CMD_FIX_SRC
  10113. CCP5_CMD_FUNCTION
  10114. CCP5_CMD_INIT
  10115. CCP5_CMD_IOC
  10116. CCP5_CMD_KEY_HI
  10117. CCP5_CMD_KEY_LO
  10118. CCP5_CMD_KEY_MEM
  10119. CCP5_CMD_LEN
  10120. CCP5_CMD_LSB_ID
  10121. CCP5_CMD_PROT
  10122. CCP5_CMD_SHA_HI
  10123. CCP5_CMD_SHA_LO
  10124. CCP5_CMD_SOC
  10125. CCP5_CMD_SRC_HI
  10126. CCP5_CMD_SRC_LO
  10127. CCP5_CMD_SRC_MEM
  10128. CCP5_RSA_MAXMOD
  10129. CCP5_RSA_MAX_WIDTH
  10130. CCP5_XTS_AES_KEY_SB_COUNT
  10131. CCPL
  10132. CCP_AES_ACTION_DECRYPT
  10133. CCP_AES_ACTION_ENCRYPT
  10134. CCP_AES_ACTION__LAST
  10135. CCP_AES_CTX_SB_COUNT
  10136. CCP_AES_ENCRYPT
  10137. CCP_AES_GHASHAAD
  10138. CCP_AES_GHASHFINAL
  10139. CCP_AES_KEY_SB_COUNT
  10140. CCP_AES_MODE
  10141. CCP_AES_MODE_CBC
  10142. CCP_AES_MODE_CFB
  10143. CCP_AES_MODE_CMAC
  10144. CCP_AES_MODE_CTR
  10145. CCP_AES_MODE_ECB
  10146. CCP_AES_MODE_GCM
  10147. CCP_AES_MODE_GCTR
  10148. CCP_AES_MODE_GHASH
  10149. CCP_AES_MODE_GMAC
  10150. CCP_AES_MODE_OFB
  10151. CCP_AES_MODE__LAST
  10152. CCP_AES_SIZE
  10153. CCP_AES_TYPE
  10154. CCP_AES_TYPE_128
  10155. CCP_AES_TYPE_192
  10156. CCP_AES_TYPE_256
  10157. CCP_AES_TYPE__LAST
  10158. CCP_CMD_MAY_BACKLOG
  10159. CCP_CMD_PASSTHRU_NO_DMA_MAP
  10160. CCP_CODE
  10161. CCP_CONFACK
  10162. CCP_CONFREQ
  10163. CCP_CRA_PRIORITY
  10164. CCP_CRYPTO_MAX_QLEN
  10165. CCP_DES3_ACTION_DECRYPT
  10166. CCP_DES3_ACTION_ENCRYPT
  10167. CCP_DES3_ACTION__LAST
  10168. CCP_DES3_CTX_SB_COUNT
  10169. CCP_DES3_ENCRYPT
  10170. CCP_DES3_KEY_SB_COUNT
  10171. CCP_DES3_MODE
  10172. CCP_DES3_MODE_CBC
  10173. CCP_DES3_MODE_CFB
  10174. CCP_DES3_MODE_ECB
  10175. CCP_DES3_MODE__LAST
  10176. CCP_DES3_SIZE
  10177. CCP_DES3_TYPE
  10178. CCP_DES3_TYPE_168
  10179. CCP_DES3_TYPE__LAST
  10180. CCP_DMAPOOL_ALIGN
  10181. CCP_DMAPOOL_MAX_SIZE
  10182. CCP_DMA_DFLT
  10183. CCP_DMA_PRIV
  10184. CCP_DMA_PUB
  10185. CCP_DMA_WIDTH
  10186. CCP_ECC_AFFINE
  10187. CCP_ECC_DST_BUF_SIZE
  10188. CCP_ECC_FUNCTION_MADD_384BIT
  10189. CCP_ECC_FUNCTION_MINV_384BIT
  10190. CCP_ECC_FUNCTION_MMUL_384BIT
  10191. CCP_ECC_FUNCTION_PADD_384BIT
  10192. CCP_ECC_FUNCTION_PDBL_384BIT
  10193. CCP_ECC_FUNCTION_PMUL_384BIT
  10194. CCP_ECC_MAX_OPERANDS
  10195. CCP_ECC_MAX_OUTPUTS
  10196. CCP_ECC_MODE
  10197. CCP_ECC_MODULUS_BYTES
  10198. CCP_ECC_OPERAND_SIZE
  10199. CCP_ECC_OUTPUT_SIZE
  10200. CCP_ECC_RESULT_OFFSET
  10201. CCP_ECC_RESULT_SUCCESS
  10202. CCP_ECC_SRC_BUF_SIZE
  10203. CCP_ENGINE_AES
  10204. CCP_ENGINE_DES3
  10205. CCP_ENGINE_ECC
  10206. CCP_ENGINE_PASSTHRU
  10207. CCP_ENGINE_RSA
  10208. CCP_ENGINE_SHA
  10209. CCP_ENGINE_XTS_AES_128
  10210. CCP_ENGINE_ZLIB_DECOMPRESS
  10211. CCP_ENGINE__LAST
  10212. CCP_HDRLEN
  10213. CCP_ID
  10214. CCP_JOBID_MASK
  10215. CCP_LENGTH
  10216. CCP_LOG_LEVEL
  10217. CCP_MAX_ERROR_CODE
  10218. CCP_MAX_OPTION_LENGTH
  10219. CCP_MEMTYPE_LOCAL
  10220. CCP_MEMTYPE_LSB
  10221. CCP_MEMTYPE_SB
  10222. CCP_MEMTYPE_SYSTEM
  10223. CCP_MEMTYPE__LAST
  10224. CCP_NEW_JOBID
  10225. CCP_OPT_CODE
  10226. CCP_OPT_LENGTH
  10227. CCP_OPT_MINLEN
  10228. CCP_PASSTHRU_BITWISE_AND
  10229. CCP_PASSTHRU_BITWISE_MASK
  10230. CCP_PASSTHRU_BITWISE_NOOP
  10231. CCP_PASSTHRU_BITWISE_OR
  10232. CCP_PASSTHRU_BITWISE_XOR
  10233. CCP_PASSTHRU_BITWISE__LAST
  10234. CCP_PASSTHRU_BLOCKSIZE
  10235. CCP_PASSTHRU_BYTESWAP_256BIT
  10236. CCP_PASSTHRU_BYTESWAP_32BIT
  10237. CCP_PASSTHRU_BYTESWAP_NOOP
  10238. CCP_PASSTHRU_BYTESWAP__LAST
  10239. CCP_PASSTHRU_MASKSIZE
  10240. CCP_PASSTHRU_SB_COUNT
  10241. CCP_PT_BITWISE
  10242. CCP_PT_BYTESWAP
  10243. CCP_RESETACK
  10244. CCP_RESETREQ
  10245. CCP_REVERSE_BUF_SIZE
  10246. CCP_RSA_MAXMOD
  10247. CCP_RSA_MAX_WIDTH
  10248. CCP_RSA_SIZE
  10249. CCP_SB_BITS
  10250. CCP_SB_BYTES
  10251. CCP_SHA_SB_COUNT
  10252. CCP_SHA_TYPE
  10253. CCP_SHA_TYPE_1
  10254. CCP_SHA_TYPE_224
  10255. CCP_SHA_TYPE_256
  10256. CCP_SHA_TYPE_384
  10257. CCP_SHA_TYPE_512
  10258. CCP_SHA_TYPE__LAST
  10259. CCP_TERMACK
  10260. CCP_TERMREQ
  10261. CCP_VERSION
  10262. CCP_VMASK
  10263. CCP_VSIZE
  10264. CCP_XTS_AES_CTX_SB_COUNT
  10265. CCP_XTS_AES_KEY_SB_COUNT
  10266. CCP_XTS_AES_UNIT_SIZE_1024
  10267. CCP_XTS_AES_UNIT_SIZE_16
  10268. CCP_XTS_AES_UNIT_SIZE_2048
  10269. CCP_XTS_AES_UNIT_SIZE_4096
  10270. CCP_XTS_AES_UNIT_SIZE_512
  10271. CCP_XTS_AES_UNIT_SIZE__LAST
  10272. CCP_XTS_ENCRYPT
  10273. CCP_XTS_SIZE
  10274. CCP_XTS_TYPE
  10275. CCQ_CREATED
  10276. CCR
  10277. CCR0
  10278. CCR1
  10279. CCR1_DPC
  10280. CCR1_TCS
  10281. CCR2
  10282. CCR2_L2E
  10283. CCR3
  10284. CCR3_REG
  10285. CCR4
  10286. CCRC_EN
  10287. CCROC_GLOBAL_CFG
  10288. CCROC_SUPER_CCLKG_DIVIDER
  10289. CCROC_THROT_OFFSET
  10290. CCROC_THROT_PSKIP_CTRL_CPU
  10291. CCROC_THROT_PSKIP_CTRL_CPU_REG
  10292. CCROC_THROT_PSKIP_CTRL_DIVIDEND_MASK
  10293. CCROC_THROT_PSKIP_CTRL_DIVISOR_MASK
  10294. CCROC_THROT_PSKIP_CTRL_ENB_MASK
  10295. CCROC_THROT_PSKIP_RAMP_CPU
  10296. CCROC_THROT_PSKIP_RAMP_CPU_REG
  10297. CCROC_THROT_PSKIP_RAMP_DURATION_MASK
  10298. CCROC_THROT_PSKIP_RAMP_SEQ_BYPASS_MODE_MASK
  10299. CCROC_THROT_PSKIP_RAMP_STEP_MASK
  10300. CCR_16BIT
  10301. CCR_2SEC_TIMEOUT
  10302. CCR_32BIT
  10303. CCR_32PIN
  10304. CCR_48PIN
  10305. CCR_8BIT
  10306. CCR_ACRPT
  10307. CCR_ADMODE_MASK
  10308. CCR_ADSIZE_MASK
  10309. CCR_AUTO_INIT
  10310. CCR_BASE
  10311. CCR_BASEH
  10312. CCR_BASEL
  10313. CCR_BS
  10314. CCR_BUFFERING_DISABLE
  10315. CCR_BUSWIDTH_0
  10316. CCR_BUSWIDTH_1
  10317. CCR_BUSWIDTH_2
  10318. CCR_BUSWIDTH_4
  10319. CCR_CACHEINVALIDSIZE
  10320. CCR_CACHEINVALIDSIZE_MASK
  10321. CCR_CACHELOOPADDRHI
  10322. CCR_CACHELOOPFLAG
  10323. CCR_CACHE_16KB
  10324. CCR_CACHE_32KB
  10325. CCR_CACHE_CB
  10326. CCR_CACHE_CE
  10327. CCR_CACHE_CF
  10328. CCR_CACHE_EMODE
  10329. CCR_CACHE_ENABLE
  10330. CCR_CACHE_IBE
  10331. CCR_CACHE_ICE
  10332. CCR_CACHE_ICI
  10333. CCR_CACHE_IIX
  10334. CCR_CACHE_INVALIDATE
  10335. CCR_CACHE_OCE
  10336. CCR_CACHE_OCI
  10337. CCR_CACHE_OIX
  10338. CCR_CACHE_ORA
  10339. CCR_CACHE_SNM
  10340. CCR_CACHE_WT
  10341. CCR_CEN
  10342. CCR_CMD
  10343. CCR_COMMAND
  10344. CCR_CONSTANT_FILL
  10345. CCR_DCYC_MASK
  10346. CCR_DMODE_MASK
  10347. CCR_DMOD_2D
  10348. CCR_DMOD_EOBFIFO
  10349. CCR_DMOD_FIFO
  10350. CCR_DMOD_LINEAR
  10351. CCR_DSIZ_16
  10352. CCR_DSIZ_32
  10353. CCR_DSIZ_8
  10354. CCR_DST_AMODE_CONSTANT
  10355. CCR_DST_AMODE_DBLIDX
  10356. CCR_DST_AMODE_POSTINC
  10357. CCR_DST_AMODE_SGLIDX
  10358. CCR_EC
  10359. CCR_ECCC
  10360. CCR_EEPROM
  10361. CCR_ENABLE
  10362. CCR_FMODE_APM
  10363. CCR_FMODE_INDR
  10364. CCR_FMODE_INDW
  10365. CCR_FMODE_MASK
  10366. CCR_FMODE_MM
  10367. CCR_FRC
  10368. CCR_FS
  10369. CCR_GCC
  10370. CCR_HOUR
  10371. CCR_ICACHE_INVALIDATE
  10372. CCR_ICC
  10373. CCR_ILME
  10374. CCR_IMODE_MASK
  10375. CCR_INST_MASK
  10376. CCR_INTC
  10377. CCR_INTE
  10378. CCR_INTERLEAVEDSAMPLES
  10379. CCR_INTP
  10380. CCR_L2C_BURST8_ENABLE
  10381. CCR_L2C_ECC_ENABLE
  10382. CCR_L2C_PREFETCH_DISABLE
  10383. CCR_L2C_WAY7_4_DISABLE
  10384. CCR_LE
  10385. CCR_LMW1BH
  10386. CCR_LMW1BL
  10387. CCR_LMW1H
  10388. CCR_LMW1L
  10389. CCR_LMW2BH
  10390. CCR_LMW2BL
  10391. CCR_LMW2H
  10392. CCR_LMW2L
  10393. CCR_LOOPBACK
  10394. CCR_LOOPFLAG
  10395. CCR_LOOPINVALSIZE
  10396. CCR_MASK
  10397. CCR_MDAY
  10398. CCR_MDIR_DEC
  10399. CCR_MEN
  10400. CCR_MIB_ACTIVATE
  10401. CCR_MIB_ENABLE
  10402. CCR_MIB_FLUSH
  10403. CCR_MIEN
  10404. CCR_MIN
  10405. CCR_MISC
  10406. CCR_MONTH
  10407. CCR_MSEL_B
  10408. CCR_MSTA
  10409. CCR_MTX
  10410. CCR_NFDC
  10411. CCR_NFM
  10412. CCR_NFPSC
  10413. CCR_NFTC
  10414. CCR_NPE_HFIFO_2_HDLC
  10415. CCR_NPE_HFIFO_3_OR_4HDLC
  10416. CCR_OCACHE_INVALIDATE
  10417. CCR_OFFSET
  10418. CCR_OMAP31_DISABLE
  10419. CCR_ON
  10420. CCR_PM
  10421. CCR_PM_CKRNEN
  10422. CCR_PM_GKEN
  10423. CCR_PM_PMEE
  10424. CCR_PM_PMES
  10425. CCR_PM_USBPW1
  10426. CCR_PM_USBPW2
  10427. CCR_PM_USBPW3
  10428. CCR_PR
  10429. CCR_PREFETCH
  10430. CCR_RD_ACTIVE
  10431. CCR_READADDRESS
  10432. CCR_READADDRESS_MASK
  10433. CCR_READ_PRIORITY
  10434. CCR_REN
  10435. CCR_REPEAT
  10436. CCR_RESET
  10437. CCR_REVID
  10438. CCR_RPT
  10439. CCR_RSTA
  10440. CCR_RX_OCT_CNT_BAD
  10441. CCR_RX_OCT_CNT_GOOD
  10442. CCR_SAVE
  10443. CCR_SEC
  10444. CCR_SECOND_HSS
  10445. CCR_SHARED
  10446. CCR_SMOD_2D
  10447. CCR_SMOD_EOBFIFO
  10448. CCR_SMOD_FIFO
  10449. CCR_SMOD_LINEAR
  10450. CCR_SPI
  10451. CCR_SRC_AMODE_CONSTANT
  10452. CCR_SRC_AMODE_DBLIDX
  10453. CCR_SRC_AMODE_POSTINC
  10454. CCR_SRC_AMODE_SGLIDX
  10455. CCR_SSIZ_16
  10456. CCR_SSIZ_32
  10457. CCR_SSIZ_8
  10458. CCR_SUPERVISOR
  10459. CCR_SUSPEND_SENSITIVE
  10460. CCR_SYNC_BLOCK
  10461. CCR_SYNC_ELEMENT
  10462. CCR_SYNC_FRAME
  10463. CCR_SYNC_PACKET
  10464. CCR_TRANSPARENT_COPY
  10465. CCR_TRIGGER_SRC
  10466. CCR_TXAK
  10467. CCR_TX_OCT_CNT_BAD
  10468. CCR_TX_OCT_CNT_GOOD
  10469. CCR_UGCC
  10470. CCR_USC
  10471. CCR_VRAMBC
  10472. CCR_VRAMRTC
  10473. CCR_VRAMSAC
  10474. CCR_WDAY
  10475. CCR_WORDSIZEDSAMPLES
  10476. CCR_WRITE_PRIORITY
  10477. CCR_WR_ACTIVE
  10478. CCR_Y2K
  10479. CCR_YEAR
  10480. CCS0_ALPAVAIL
  10481. CCS0_HTAVAIL
  10482. CCS811_ALG_RESULT_DATA
  10483. CCS811_APP_START
  10484. CCS811_ERR
  10485. CCS811_HW_ID
  10486. CCS811_HW_ID_VALUE
  10487. CCS811_HW_VERSION
  10488. CCS811_HW_VERSION_MASK
  10489. CCS811_HW_VERSION_VALUE
  10490. CCS811_MEAS_MODE
  10491. CCS811_MEAS_MODE_INTERRUPT
  10492. CCS811_MODE_IAQ_10SEC
  10493. CCS811_MODE_IAQ_1SEC
  10494. CCS811_MODE_IAQ_60SEC
  10495. CCS811_MODE_IDLE
  10496. CCS811_MODE_RAW_DATA
  10497. CCS811_RAW_DATA
  10498. CCS811_STATUS
  10499. CCS811_STATUS_APP_VALID_LOADED
  10500. CCS811_STATUS_APP_VALID_MASK
  10501. CCS811_STATUS_DATA_READY
  10502. CCS811_STATUS_ERROR
  10503. CCS811_STATUS_FW_MODE_APPLICATION
  10504. CCS811_STATUS_FW_MODE_MASK
  10505. CCS811_VOLTAGE_MASK
  10506. CCSC00_OFFSET
  10507. CCSC01_OFFSET
  10508. CCSC10_OFFSET
  10509. CCSC11_OFFSET
  10510. CCSEN
  10511. CCSR
  10512. CCSR_AUDIO_ENA
  10513. CCSR_CHANGED
  10514. CCSR_DMA_ATR_ESAD_MASK
  10515. CCSR_DMA_ATR_NOSNOOP
  10516. CCSR_DMA_ATR_PBATMU
  10517. CCSR_DMA_ATR_PCIORDER
  10518. CCSR_DMA_ATR_SME
  10519. CCSR_DMA_ATR_SNOOP
  10520. CCSR_DMA_ATR_TFLOWLVL_0
  10521. CCSR_DMA_ATR_TFLOWLVL_1
  10522. CCSR_DMA_ATR_TFLOWLVL_2
  10523. CCSR_DMA_ATR_TFLOWLVL_3
  10524. CCSR_DMA_CLNDAR_ADDR
  10525. CCSR_DMA_CLNDAR_EOSIE
  10526. CCSR_DMA_ECLNDAR_ADDR
  10527. CCSR_DMA_MR_BWC
  10528. CCSR_DMA_MR_BWC_DISABLED
  10529. CCSR_DMA_MR_BWC_MASK
  10530. CCSR_DMA_MR_BWC_SHIFT
  10531. CCSR_DMA_MR_CA
  10532. CCSR_DMA_MR_CC
  10533. CCSR_DMA_MR_CDSM_SWSM
  10534. CCSR_DMA_MR_CS
  10535. CCSR_DMA_MR_CTM
  10536. CCSR_DMA_MR_DAHE
  10537. CCSR_DMA_MR_DAHTS_1
  10538. CCSR_DMA_MR_DAHTS_2
  10539. CCSR_DMA_MR_DAHTS_4
  10540. CCSR_DMA_MR_DAHTS_8
  10541. CCSR_DMA_MR_DAHTS_MASK
  10542. CCSR_DMA_MR_EIE
  10543. CCSR_DMA_MR_EMP_EN
  10544. CCSR_DMA_MR_EMS_EN
  10545. CCSR_DMA_MR_EOLNIE
  10546. CCSR_DMA_MR_EOLSIE
  10547. CCSR_DMA_MR_EOSIE
  10548. CCSR_DMA_MR_SAHE
  10549. CCSR_DMA_MR_SAHTS_1
  10550. CCSR_DMA_MR_SAHTS_2
  10551. CCSR_DMA_MR_SAHTS_4
  10552. CCSR_DMA_MR_SAHTS_8
  10553. CCSR_DMA_MR_SAHTS_MASK
  10554. CCSR_DMA_MR_SRW
  10555. CCSR_DMA_MR_XFE
  10556. CCSR_DMA_SR_CB
  10557. CCSR_DMA_SR_CH
  10558. CCSR_DMA_SR_EOLNI
  10559. CCSR_DMA_SR_EOLSI
  10560. CCSR_DMA_SR_EOSI
  10561. CCSR_DMA_SR_PE
  10562. CCSR_DMA_SR_TE
  10563. CCSR_GUTS_CLKDVDR_PXCKDLY
  10564. CCSR_GUTS_CLKDVDR_PXCKDLY_MASK
  10565. CCSR_GUTS_CLKDVDR_PXCKDLY_SHIFT
  10566. CCSR_GUTS_CLKDVDR_PXCKEN
  10567. CCSR_GUTS_CLKDVDR_PXCKINV
  10568. CCSR_GUTS_CLKDVDR_PXCLK
  10569. CCSR_GUTS_CLKDVDR_PXCLK_MASK
  10570. CCSR_GUTS_CLKDVDR_PXCLK_SHIFT
  10571. CCSR_GUTS_CLKDVDR_SSICKEN
  10572. CCSR_GUTS_CLKDVDR_SSICLK
  10573. CCSR_GUTS_CLKDVDR_SSICLK_MASK
  10574. CCSR_GUTS_DEVDISR_TB0
  10575. CCSR_GUTS_DEVDISR_TB1
  10576. CCSR_GUTS_DMACR_DEV_IR
  10577. CCSR_GUTS_DMACR_DEV_SSI
  10578. CCSR_GUTS_DMUXCR_PAD
  10579. CCSR_GUTS_DMUXCR_SSI
  10580. CCSR_GUTS_PMUXCR_DBGDRV
  10581. CCSR_GUTS_PMUXCR_DMA1_0
  10582. CCSR_GUTS_PMUXCR_DMA1_3
  10583. CCSR_GUTS_PMUXCR_DMA2_0
  10584. CCSR_GUTS_PMUXCR_DMA2_3
  10585. CCSR_GUTS_PMUXCR_LA_22_25_HI
  10586. CCSR_GUTS_PMUXCR_LA_22_25_LA
  10587. CCSR_GUTS_PMUXCR_LDPSEL
  10588. CCSR_GUTS_PMUXCR_SSI1_HI
  10589. CCSR_GUTS_PMUXCR_SSI1_LA
  10590. CCSR_GUTS_PMUXCR_SSI1_MASK
  10591. CCSR_GUTS_PMUXCR_SSI1_SSI
  10592. CCSR_GUTS_PMUXCR_SSI2_HI
  10593. CCSR_GUTS_PMUXCR_SSI2_LA
  10594. CCSR_GUTS_PMUXCR_SSI2_MASK
  10595. CCSR_GUTS_PMUXCR_SSI2_SSI
  10596. CCSR_GUTS_PMUXCR_SSI_DMA_TDM_MASK
  10597. CCSR_GUTS_PMUXCR_SSI_DMA_TDM_SSI
  10598. CCSR_GUTS_PMUXCR_UART0_I2C1_MASK
  10599. CCSR_GUTS_PMUXCR_UART0_I2C1_SSI
  10600. CCSR_GUTS_PMUXCR_UART0_I2C1_UART0_SSI
  10601. CCSR_HOST_INTR_PENDING
  10602. CCSR_INTR_ACK
  10603. CCSR_INTR_PENDING
  10604. CCSR_IOIS8
  10605. CCSR_L_MASK
  10606. CCSR_M_MASK
  10607. CCSR_N2_MASK
  10608. CCSR_N2_SHIFT
  10609. CCSR_OFFSET
  10610. CCSR_PLL3_SW_CLK_SEL
  10611. CCSR_POWER_DOWN
  10612. CCSR_SCFG_PIXCLKCR
  10613. CCSR_SIGCHG_ENA
  10614. CCS_ALPAREQ
  10615. CCS_ALPAVAIL
  10616. CCS_BASE
  10617. CCS_BP_ON_APL
  10618. CCS_BP_ON_HT
  10619. CCS_BUFFER_BUSY
  10620. CCS_BUFFER_FREE
  10621. CCS_COMMAND_COMPLETE
  10622. CCS_COMMAND_FAILED
  10623. CCS_DOWNLOAD_STARTUP_PARAMS
  10624. CCS_DUMP_MEMORY
  10625. CCS_END_LIST
  10626. CCS_ERSRC_AVAIL_D11PLL
  10627. CCS_ERSRC_AVAIL_HT
  10628. CCS_ERSRC_AVAIL_PHYPLL
  10629. CCS_ERSRC_REQ_D11PLL
  10630. CCS_ERSRC_REQ_HT
  10631. CCS_ERSRC_REQ_MASK
  10632. CCS_ERSRC_REQ_PHYPLL
  10633. CCS_ERSRC_REQ_SHIFT
  10634. CCS_ERSRC_STS_MASK
  10635. CCS_ERSRC_STS_SHIFT
  10636. CCS_FORCEALP
  10637. CCS_FORCEHT
  10638. CCS_FORCEHWREQOFF
  10639. CCS_FORCEILP
  10640. CCS_HTAREQ
  10641. CCS_HTAVAIL
  10642. CCS_JOIN_NETWORK
  10643. CCS_LAST_CMD
  10644. CCS_REPORT_PARAMS
  10645. CCS_SHUTDOWN
  10646. CCS_START_ASSOCIATION
  10647. CCS_START_NETWORK
  10648. CCS_START_TIMER
  10649. CCS_TEST_MEMORY
  10650. CCS_TX_REQUEST
  10651. CCS_UPDATE_MULTICAST_LIST
  10652. CCS_UPDATE_PARAMS
  10653. CCS_UPDATE_POWER_SAVINGS_MODE
  10654. CCTL0_MCO2
  10655. CCTL0_MCO3
  10656. CCTL0_MCO4
  10657. CCTL0_MCO5
  10658. CCTL0_MCO6
  10659. CCTL_ALL_CMD
  10660. CCTL_BLOCK_CMD
  10661. CCTL_CMD_L2_IX_INVAL
  10662. CCTL_CMD_L2_IX_WB
  10663. CCTL_CMD_L2_PA_INVAL
  10664. CCTL_CMD_L2_PA_WB
  10665. CCTL_CMD_L2_PA_WBINVAL
  10666. CCTL_CMD_L2_SYNC
  10667. CCTL_ENDIAN_CMD
  10668. CCTL_ENDIAN_DATA
  10669. CCTL_ENDIAN_OPEN
  10670. CCTL_ENDIAN_RSP
  10671. CCTL_RST
  10672. CCTL_SINGLE_CMD
  10673. CCTRL0
  10674. CCTRL1
  10675. CCTRL2
  10676. CCTRL3
  10677. CCTRL43224_GPIO_TOGGLE
  10678. CCTRL4331_BT_COEXIST
  10679. CCTRL4331_BT_SHD0_ON_GPIO4
  10680. CCTRL4331_BT_SHD1_ON_GPIO5
  10681. CCTRL4331_EXTPA_EN
  10682. CCTRL4331_EXTPA_ON_GPIO2_5
  10683. CCTRL4331_EXT_LNA
  10684. CCTRL4331_GPIOCLK_ON_SPROMCS
  10685. CCTRL4331_OVR_PIPEAUXCLKEN
  10686. CCTRL4331_OVR_PIPEAUXPWRDOWN
  10687. CCTRL4331_PCIE_AUXCLKEN
  10688. CCTRL4331_PCIE_MDIO_ON_SPROMCS
  10689. CCTRL4331_PCIE_PIPE_PLLDOWN
  10690. CCTRL4331_SECI
  10691. CCTRL4331_SPROM_GPIO13_15
  10692. CCTRL5357_ANT_MUX_2o3
  10693. CCTRL5357_EXTPA
  10694. CCTRL6
  10695. CCTRL7
  10696. CCTRL_4313_12MA_LED_DRIVE
  10697. CCTRL_43224A0_12MA_LED_DRIVE
  10698. CCTRL_43224B0_12MA_LED_DRIVE
  10699. CCTRL_ECN_F
  10700. CCTRL_ECN_S
  10701. CCTRL_ECN_V
  10702. CCTS
  10703. CCURRADDR
  10704. CCUT_IDX_1R_2G
  10705. CCUT_IDX_1R_5G
  10706. CCUT_IDX_2R_2G
  10707. CCUT_IDX_2R_5G
  10708. CCUT_IDX_NR
  10709. CCU_ACCESS_PASSWORD
  10710. CCU_BRANCH_HAVE_DIV2
  10711. CCU_BRANCH_IS_BUS
  10712. CCU_BUSY_CYCLES
  10713. CCU_COLOR_BLOCKS
  10714. CCU_COLOR_BLOCK_HIT
  10715. CCU_COLOR_FLAG1_COUNT
  10716. CCU_COLOR_FLAG2_COUNT
  10717. CCU_COLOR_FLAG3_COUNT
  10718. CCU_COLOR_FLAG4_COUNT
  10719. CCU_DEPTH_BLOCKS
  10720. CCU_DEPTH_BLOCK_HIT
  10721. CCU_DEPTH_FLAG1_COUNT
  10722. CCU_DEPTH_FLAG2_COUNT
  10723. CCU_DEPTH_FLAG3_COUNT
  10724. CCU_DEPTH_FLAG4_COUNT
  10725. CCU_FEATURE_ALL_PREDIV
  10726. CCU_FEATURE_FIXED_POSTDIV
  10727. CCU_FEATURE_FIXED_PREDIV
  10728. CCU_FEATURE_FRACTIONAL
  10729. CCU_FEATURE_LOCK_REG
  10730. CCU_FEATURE_MMC_TIMING_SWITCH
  10731. CCU_FEATURE_SIGMA_DELTA_MOD
  10732. CCU_FEATURE_VARIABLE_PREDIV
  10733. CCU_LVM_EN
  10734. CCU_MMC_NEW_TIMING_MODE
  10735. CCU_PARTIAL_BLOCK_READ
  10736. CCU_POLICY_COUNT
  10737. CCU_POLICY_CTL
  10738. CCU_RB_COLOR_RETURN_STALL
  10739. CCU_RB_DEPTH_RETURN_STALL
  10740. CCU_SUN8I_A83T_LOCK_REG
  10741. CCU_SUN9I_LOCK_REG
  10742. CCVAL_COUNT
  10743. CCVAL_PERCENT
  10744. CCVAL_PERIOD
  10745. CCWCHAIN_LEN_MAX
  10746. CCWDEV_ALLOW_FORCE
  10747. CCWDEV_CU_DI
  10748. CCWDEV_DO_MULTIPATH
  10749. CCWDEV_DO_PATHGROUP
  10750. CCWDEV_EARLY_NOTIFICATION
  10751. CCWDEV_REPORT_ALL
  10752. CCWGROUP_OFFLINE
  10753. CCWGROUP_ONLINE
  10754. CCW_BLOCK_SIZE
  10755. CCW_BUS_ID_SIZE
  10756. CCW_CD
  10757. CCW_CHAIN
  10758. CCW_CI_842
  10759. CCW_CL
  10760. CCW_CMD_BASIC_SENSE
  10761. CCW_CMD_DCTL
  10762. CCW_CMD_NOOP
  10763. CCW_CMD_PREPARE
  10764. CCW_CMD_RDC
  10765. CCW_CMD_READ
  10766. CCW_CMD_READ_CONF
  10767. CCW_CMD_READ_FEAT
  10768. CCW_CMD_READ_IPL
  10769. CCW_CMD_READ_STATUS
  10770. CCW_CMD_READ_VQ_CONF
  10771. CCW_CMD_RELEASE
  10772. CCW_CMD_SENSE_CMD
  10773. CCW_CMD_SENSE_ID
  10774. CCW_CMD_SENSE_PGID
  10775. CCW_CMD_SET_CONF_IND
  10776. CCW_CMD_SET_EXTENDED
  10777. CCW_CMD_SET_IND
  10778. CCW_CMD_SET_IND_ADAPTER
  10779. CCW_CMD_SET_PGID
  10780. CCW_CMD_SET_VIRTIO_REV
  10781. CCW_CMD_SET_VQ
  10782. CCW_CMD_STLCK
  10783. CCW_CMD_SUSPEND_RECONN
  10784. CCW_CMD_TIC
  10785. CCW_CMD_VDEV_RESET
  10786. CCW_CMD_WRITE
  10787. CCW_CMD_WRITE_CONF
  10788. CCW_CMD_WRITE_CTL
  10789. CCW_CMD_WRITE_FEAT
  10790. CCW_CMD_WRITE_STATUS
  10791. CCW_CT
  10792. CCW_DEC_SEM
  10793. CCW_DEVICE
  10794. CCW_DEVICE_DEVTYPE
  10795. CCW_DEVICE_ID_MATCH_CU_MODEL
  10796. CCW_DEVICE_ID_MATCH_CU_TYPE
  10797. CCW_DEVICE_ID_MATCH_DEVICE_MODEL
  10798. CCW_DEVICE_ID_MATCH_DEVICE_TYPE
  10799. CCW_DEVID
  10800. CCW_FC_842
  10801. CCW_FC_842_COMP_CRC
  10802. CCW_FC_842_COMP_NOCRC
  10803. CCW_FC_842_DECOMP_CRC
  10804. CCW_FC_842_DECOMP_NOCRC
  10805. CCW_FC_842_MOVE
  10806. CCW_FLAG_CC
  10807. CCW_FLAG_DC
  10808. CCW_FLAG_IDA
  10809. CCW_FLAG_PCI
  10810. CCW_FLAG_SKIP
  10811. CCW_FLAG_SLI
  10812. CCW_FLAG_SUSPEND
  10813. CCW_HALT_ON_TERM
  10814. CCW_IRQ
  10815. CCW_PS
  10816. CCW_TERM_FLUSH
  10817. CCW_WAIT4END
  10818. CCW_WAIT4RDY
  10819. CCXSEC_HWID
  10820. CCX_CLM_RESULT_READY
  10821. CCX_CMD_CLM_ENABLE
  10822. CCX_CMD_FUNCTION_ENABLE
  10823. CCX_CMD_IGNORE_CCA
  10824. CCX_CMD_IGNORE_TXON
  10825. CCX_CMD_NHM_ENABLE
  10826. CCX_CMD_RESET
  10827. CCX_COMMAND_REG
  10828. CCX_FwC2HTxRpt_8723b
  10829. CCX_NHM_RESULT_READY
  10830. CCX_PERIOD
  10831. CC_ACP_EFUSE__ACP_DISABLE_MASK
  10832. CC_ACP_EFUSE__ACP_DISABLE__SHIFT
  10833. CC_ACP_EFUSE__DSP0_DISABLE_MASK
  10834. CC_ACP_EFUSE__DSP0_DISABLE__SHIFT
  10835. CC_ACP_EFUSE__DSP1_DISABLE_MASK
  10836. CC_ACP_EFUSE__DSP1_DISABLE__SHIFT
  10837. CC_ACP_EFUSE__DSP2_DISABLE_MASK
  10838. CC_ACP_EFUSE__DSP2_DISABLE__SHIFT
  10839. CC_AES_128_BIT_KEY_SIZE
  10840. CC_AES_128_BIT_KEY_SIZE_WORDS
  10841. CC_AES_192_BIT_KEY_SIZE
  10842. CC_AES_192_BIT_KEY_SIZE_WORDS
  10843. CC_AES_256_BIT_KEY_SIZE
  10844. CC_AES_256_BIT_KEY_SIZE_WORDS
  10845. CC_AES_BLOCK_SIZE
  10846. CC_AES_BLOCK_SIZE_WORDS
  10847. CC_AES_IV_SIZE
  10848. CC_AES_IV_SIZE_WORDS
  10849. CC_AES_KEY_SIZE_MAX
  10850. CC_AES_KEY_SIZE_WORDS_MAX
  10851. CC_AL
  10852. CC_AXIM_ACE_CONST_ARBAR_BIT_SHIFT
  10853. CC_AXIM_ACE_CONST_ARBAR_BIT_SIZE
  10854. CC_AXIM_ACE_CONST_ARDOMAIN_BIT_SHIFT
  10855. CC_AXIM_ACE_CONST_ARDOMAIN_BIT_SIZE
  10856. CC_AXIM_ACE_CONST_ARSNOOP_BIT_SHIFT
  10857. CC_AXIM_ACE_CONST_ARSNOOP_BIT_SIZE
  10858. CC_AXIM_ACE_CONST_AWADDR_NOT_MASKED_BIT_SHIFT
  10859. CC_AXIM_ACE_CONST_AWADDR_NOT_MASKED_BIT_SIZE
  10860. CC_AXIM_ACE_CONST_AWBAR_BIT_SHIFT
  10861. CC_AXIM_ACE_CONST_AWBAR_BIT_SIZE
  10862. CC_AXIM_ACE_CONST_AWDOMAIN_BIT_SHIFT
  10863. CC_AXIM_ACE_CONST_AWDOMAIN_BIT_SIZE
  10864. CC_AXIM_ACE_CONST_AWLEN_VAL_BIT_SHIFT
  10865. CC_AXIM_ACE_CONST_AWLEN_VAL_BIT_SIZE
  10866. CC_AXIM_ACE_CONST_AWSNOOP_ALIGNED_BIT_SHIFT
  10867. CC_AXIM_ACE_CONST_AWSNOOP_ALIGNED_BIT_SIZE
  10868. CC_AXIM_ACE_CONST_AWSNOOP_NOT_ALIGNED_BIT_SHIFT
  10869. CC_AXIM_ACE_CONST_AWSNOOP_NOT_ALIGNED_BIT_SIZE
  10870. CC_AXIM_ACE_CONST_REG_OFFSET
  10871. CC_AXIM_CACHE_PARAMS_ARCACHE_BIT_SHIFT
  10872. CC_AXIM_CACHE_PARAMS_ARCACHE_BIT_SIZE
  10873. CC_AXIM_CACHE_PARAMS_AWCACHE_BIT_SHIFT
  10874. CC_AXIM_CACHE_PARAMS_AWCACHE_BIT_SIZE
  10875. CC_AXIM_CACHE_PARAMS_AWCACHE_LAST_BIT_SHIFT
  10876. CC_AXIM_CACHE_PARAMS_AWCACHE_LAST_BIT_SIZE
  10877. CC_AXIM_CACHE_PARAMS_REG_OFFSET
  10878. CC_AXIM_CFG_BRESPMASK_BIT_SHIFT
  10879. CC_AXIM_CFG_BRESPMASK_BIT_SIZE
  10880. CC_AXIM_CFG_COMPMASK_BIT_SHIFT
  10881. CC_AXIM_CFG_COMPMASK_BIT_SIZE
  10882. CC_AXIM_CFG_INFLTMASK_BIT_SHIFT
  10883. CC_AXIM_CFG_INFLTMASK_BIT_SIZE
  10884. CC_AXIM_CFG_REG_OFFSET
  10885. CC_AXIM_CFG_RRESPMASK_BIT_SHIFT
  10886. CC_AXIM_CFG_RRESPMASK_BIT_SIZE
  10887. CC_AXIM_MON_COMP8_REG_OFFSET
  10888. CC_AXIM_MON_COMP_REG_OFFSET
  10889. CC_AXIM_MON_COMP_VALUE_BIT_SHIFT
  10890. CC_AXIM_MON_COMP_VALUE_BIT_SIZE
  10891. CC_AXIM_MON_ERR_BID_BIT_SHIFT
  10892. CC_AXIM_MON_ERR_BID_BIT_SIZE
  10893. CC_AXIM_MON_ERR_BRESP_BIT_SHIFT
  10894. CC_AXIM_MON_ERR_BRESP_BIT_SIZE
  10895. CC_AXIM_MON_ERR_REG_OFFSET
  10896. CC_AXIM_MON_ERR_RID_BIT_SHIFT
  10897. CC_AXIM_MON_ERR_RID_BIT_SIZE
  10898. CC_AXIM_MON_ERR_RRESP_BIT_SHIFT
  10899. CC_AXIM_MON_ERR_RRESP_BIT_SIZE
  10900. CC_AXIM_MON_INFLIGHTLAST_REG_OFFSET
  10901. CC_AXIM_MON_INFLIGHTLAST_VALUE_BIT_SHIFT
  10902. CC_AXIM_MON_INFLIGHTLAST_VALUE_BIT_SIZE
  10903. CC_AXIM_MON_INFLIGHT_REG_OFFSET
  10904. CC_AXIM_MON_INFLIGHT_VALUE_BIT_SHIFT
  10905. CC_AXIM_MON_INFLIGHT_VALUE_BIT_SIZE
  10906. CC_AXI_ERR_IRQ_MASK
  10907. CC_AXI_IRQ_MASK
  10908. CC_BANK_ONE
  10909. CC_BASE
  10910. CC_BIF_BX_STRAP0__STRAP_RESERVED_MASK
  10911. CC_BIF_BX_STRAP0__STRAP_RESERVED__SHIFT
  10912. CC_BPRESEN
  10913. CC_CALIB
  10914. CC_CAP2_GSIO
  10915. CC_CAP2_SECI
  10916. CC_CAP_BKPLN64
  10917. CC_CAP_EXTBUS_FULL
  10918. CC_CAP_EXTBUS_MASK
  10919. CC_CAP_EXTBUS_NONE
  10920. CC_CAP_EXTBUS_PROG
  10921. CC_CAP_FLASH_MASK
  10922. CC_CAP_JTAGP
  10923. CC_CAP_MIPSEB
  10924. CC_CAP_NFLASH
  10925. CC_CAP_OTPSIZE
  10926. CC_CAP_OTPSIZE_BASE
  10927. CC_CAP_OTPSIZE_SHIFT
  10928. CC_CAP_PLL_MASK
  10929. CC_CAP_PMU
  10930. CC_CAP_PWR_CTL
  10931. CC_CAP_ROM
  10932. CC_CAP_SROM
  10933. CC_CAP_UARTGPIO
  10934. CC_CAP_UARTS_MASK
  10935. CC_CAP_UCLKSEL
  10936. CC_CAP_UINTCLK
  10937. CC_CARRY
  10938. CC_CC
  10939. CC_CC_SRAM_SIZE
  10940. CC_CHIP_RESET
  10941. CC_CID
  10942. CC_CISRDY
  10943. CC_CLRPADSISO
  10944. CC_COHERENT_CACHE_PARAMS
  10945. CC_COMPONENT_ID_0_REG_OFFSET
  10946. CC_COMPONENT_ID_0_VALUE_BIT_SHIFT
  10947. CC_COMPONENT_ID_0_VALUE_BIT_SIZE
  10948. CC_COMPONENT_ID_1_CLASS_BIT_SHIFT
  10949. CC_COMPONENT_ID_1_CLASS_BIT_SIZE
  10950. CC_COMPONENT_ID_1_PRMBL_1_BIT_SHIFT
  10951. CC_COMPONENT_ID_1_PRMBL_1_BIT_SIZE
  10952. CC_COMPONENT_ID_1_REG_OFFSET
  10953. CC_COMPONENT_ID_2_REG_OFFSET
  10954. CC_COMPONENT_ID_2_VALUE_BIT_SHIFT
  10955. CC_COMPONENT_ID_2_VALUE_BIT_SIZE
  10956. CC_COMPONENT_ID_3_REG_OFFSET
  10957. CC_COMPONENT_ID_3_VALUE_BIT_SHIFT
  10958. CC_COMPONENT_ID_3_VALUE_BIT_SIZE
  10959. CC_COMP_IRQ_MASK
  10960. CC_CPP_AES
  10961. CC_CPP_AES_ABORT_MASK
  10962. CC_CPP_DIN_ADDR
  10963. CC_CPP_DIN_SIZE
  10964. CC_CPP_NUM_ALGS
  10965. CC_CPP_NUM_SLOTS
  10966. CC_CPP_SM4
  10967. CC_CPP_SM4_ABORT_MASK
  10968. CC_CRA_PRIO
  10969. CC_CREG
  10970. CC_CS
  10971. CC_D
  10972. CC_DATSIZE
  10973. CC_DATSTREAM
  10974. CC_DC_HDMI_STRAPS__AUDIO_STREAM_NUMBER_MASK
  10975. CC_DC_HDMI_STRAPS__AUDIO_STREAM_NUMBER__SHIFT
  10976. CC_DC_HDMI_STRAPS__HDMI_DISABLE_MASK
  10977. CC_DC_HDMI_STRAPS__HDMI_DISABLE__SHIFT
  10978. CC_DC_MISC_STRAPS__AUDIO_STREAM_NUMBER_MASK
  10979. CC_DC_MISC_STRAPS__AUDIO_STREAM_NUMBER__SHIFT
  10980. CC_DC_MISC_STRAPS__HDMI_DISABLE_MASK
  10981. CC_DC_MISC_STRAPS__HDMI_DISABLE__SHIFT
  10982. CC_DC_PIPE_DIS__DC_DMCUB_ENABLE_MASK
  10983. CC_DC_PIPE_DIS__DC_DMCUB_ENABLE__SHIFT
  10984. CC_DC_PIPE_DIS__DC_PIPE_DIS_MASK
  10985. CC_DC_PIPE_DIS__DC_PIPE_DIS__SHIFT
  10986. CC_DC_PIPE_DIS__DC_UNDERLAY_PIPE_DIS_MASK
  10987. CC_DC_PIPE_DIS__DC_UNDERLAY_PIPE_DIS__SHIFT
  10988. CC_DC_PIPE_DIS__MCIF_WB_URG_LVL_MASK
  10989. CC_DC_PIPE_DIS__MCIF_WB_URG_LVL__SHIFT
  10990. CC_DC_PIPE_DIS__MCIF_WB_URG_OVRD_MASK
  10991. CC_DC_PIPE_DIS__MCIF_WB_URG_OVRD__SHIFT
  10992. CC_DEBUG_REG
  10993. CC_DEEP_SLEEP_ENA
  10994. CC_DESSTREAM
  10995. CC_DEV_SHA_MAX
  10996. CC_DIAG
  10997. CC_DIGEST_SIZE_MAX
  10998. CC_DIGITALIN
  10999. CC_DIGITALOUT
  11000. CC_DMA_ABLE
  11001. CC_DMA_BUF_DLLI
  11002. CC_DMA_BUF_MLLI
  11003. CC_DMA_BUF_NULL
  11004. CC_DRCCCTRL_MASK
  11005. CC_DRM_ID_STRAPS
  11006. CC_DRM_ID_STRAPS__ATI_REV_ID_MASK
  11007. CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT
  11008. CC_DRM_ID_STRAPS__DEVICE_ID_MASK
  11009. CC_DRM_ID_STRAPS__DEVICE_ID__SHIFT
  11010. CC_DRM_ID_STRAPS__MAJOR_REV_ID_MASK
  11011. CC_DRM_ID_STRAPS__MAJOR_REV_ID__SHIFT
  11012. CC_DRM_ID_STRAPS__MINOR_REV_ID_MASK
  11013. CC_DRM_ID_STRAPS__MINOR_REV_ID__SHIFT
  11014. CC_DRV_ALG_MAX_BLOCK_SIZE
  11015. CC_DRV_DES_BLOCK_SIZE
  11016. CC_DRV_DES_DOUBLE_KEY_SIZE
  11017. CC_DRV_DES_IV_SIZE
  11018. CC_DRV_DES_KEY_SIZE_MAX
  11019. CC_DRV_DES_ONE_KEY_SIZE
  11020. CC_DRV_DES_TRIPLE_KEY_SIZE
  11021. CC_DSCRPTR_COMPLETION_COUNTER_COMPLETION_COUNTER_BIT_SHIFT
  11022. CC_DSCRPTR_COMPLETION_COUNTER_COMPLETION_COUNTER_BIT_SIZE
  11023. CC_DSCRPTR_COMPLETION_COUNTER_OVERFLOW_COUNTER_BIT_SHIFT
  11024. CC_DSCRPTR_COMPLETION_COUNTER_OVERFLOW_COUNTER_BIT_SIZE
  11025. CC_DSCRPTR_COMPLETION_COUNTER_REG_OFFSET
  11026. CC_DSCRPTR_MEASURE_CNTR_REG_OFFSET
  11027. CC_DSCRPTR_MEASURE_CNTR_VALUE_BIT_SHIFT
  11028. CC_DSCRPTR_MEASURE_CNTR_VALUE_BIT_SIZE
  11029. CC_DSCRPTR_QUEUE_CONTENT_REG_OFFSET
  11030. CC_DSCRPTR_QUEUE_CONTENT_VALUE_BIT_SHIFT
  11031. CC_DSCRPTR_QUEUE_CONTENT_VALUE_BIT_SIZE
  11032. CC_DSCRPTR_QUEUE_SRAM_SIZE_DSCRPTR_SRAM_SIZE_BIT_SHIFT
  11033. CC_DSCRPTR_QUEUE_SRAM_SIZE_DSCRPTR_SRAM_SIZE_BIT_SIZE
  11034. CC_DSCRPTR_QUEUE_SRAM_SIZE_NUM_OF_DSCRPTR_BIT_SHIFT
  11035. CC_DSCRPTR_QUEUE_SRAM_SIZE_NUM_OF_DSCRPTR_BIT_SIZE
  11036. CC_DSCRPTR_QUEUE_SRAM_SIZE_REG_OFFSET
  11037. CC_DSCRPTR_QUEUE_SRAM_SIZE_SRAM_SIZE_BIT_SHIFT
  11038. CC_DSCRPTR_QUEUE_SRAM_SIZE_SRAM_SIZE_BIT_SIZE
  11039. CC_DSCRPTR_QUEUE_WATERMARK_REG_OFFSET
  11040. CC_DSCRPTR_QUEUE_WATERMARK_VALUE_BIT_SHIFT
  11041. CC_DSCRPTR_QUEUE_WATERMARK_VALUE_BIT_SIZE
  11042. CC_DSCRPTR_QUEUE_WORD0_REG_OFFSET
  11043. CC_DSCRPTR_QUEUE_WORD0_VALUE_BIT_SHIFT
  11044. CC_DSCRPTR_QUEUE_WORD0_VALUE_BIT_SIZE
  11045. CC_DSCRPTR_QUEUE_WORD1_DIN_CONST_VALUE_BIT_SHIFT
  11046. CC_DSCRPTR_QUEUE_WORD1_DIN_CONST_VALUE_BIT_SIZE
  11047. CC_DSCRPTR_QUEUE_WORD1_DIN_DMA_MODE_BIT_SHIFT
  11048. CC_DSCRPTR_QUEUE_WORD1_DIN_DMA_MODE_BIT_SIZE
  11049. CC_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SHIFT
  11050. CC_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SIZE
  11051. CC_DSCRPTR_QUEUE_WORD1_LOCK_QUEUE_BIT_SHIFT
  11052. CC_DSCRPTR_QUEUE_WORD1_LOCK_QUEUE_BIT_SIZE
  11053. CC_DSCRPTR_QUEUE_WORD1_NOT_LAST_BIT_SHIFT
  11054. CC_DSCRPTR_QUEUE_WORD1_NOT_LAST_BIT_SIZE
  11055. CC_DSCRPTR_QUEUE_WORD1_NOT_USED_BIT_SHIFT
  11056. CC_DSCRPTR_QUEUE_WORD1_NOT_USED_BIT_SIZE
  11057. CC_DSCRPTR_QUEUE_WORD1_NS_BIT_BIT_SHIFT
  11058. CC_DSCRPTR_QUEUE_WORD1_NS_BIT_BIT_SIZE
  11059. CC_DSCRPTR_QUEUE_WORD1_REG_OFFSET
  11060. CC_DSCRPTR_QUEUE_WORD2_REG_OFFSET
  11061. CC_DSCRPTR_QUEUE_WORD2_VALUE_BIT_SHIFT
  11062. CC_DSCRPTR_QUEUE_WORD2_VALUE_BIT_SIZE
  11063. CC_DSCRPTR_QUEUE_WORD3_DOUT_DMA_MODE_BIT_SHIFT
  11064. CC_DSCRPTR_QUEUE_WORD3_DOUT_DMA_MODE_BIT_SIZE
  11065. CC_DSCRPTR_QUEUE_WORD3_DOUT_LAST_IND_BIT_SHIFT
  11066. CC_DSCRPTR_QUEUE_WORD3_DOUT_LAST_IND_BIT_SIZE
  11067. CC_DSCRPTR_QUEUE_WORD3_DOUT_SIZE_BIT_SHIFT
  11068. CC_DSCRPTR_QUEUE_WORD3_DOUT_SIZE_BIT_SIZE
  11069. CC_DSCRPTR_QUEUE_WORD3_HASH_XOR_BIT_BIT_SHIFT
  11070. CC_DSCRPTR_QUEUE_WORD3_HASH_XOR_BIT_BIT_SIZE
  11071. CC_DSCRPTR_QUEUE_WORD3_NOT_USED_BIT_SHIFT
  11072. CC_DSCRPTR_QUEUE_WORD3_NOT_USED_BIT_SIZE
  11073. CC_DSCRPTR_QUEUE_WORD3_NS_BIT_BIT_SHIFT
  11074. CC_DSCRPTR_QUEUE_WORD3_NS_BIT_BIT_SIZE
  11075. CC_DSCRPTR_QUEUE_WORD3_QUEUE_LAST_IND_BIT_SHIFT
  11076. CC_DSCRPTR_QUEUE_WORD3_QUEUE_LAST_IND_BIT_SIZE
  11077. CC_DSCRPTR_QUEUE_WORD3_REG_OFFSET
  11078. CC_DSCRPTR_QUEUE_WORD4_ACK_NEEDED_BIT_SHIFT
  11079. CC_DSCRPTR_QUEUE_WORD4_ACK_NEEDED_BIT_SIZE
  11080. CC_DSCRPTR_QUEUE_WORD4_AES_SEL_N_HASH_BIT_SHIFT
  11081. CC_DSCRPTR_QUEUE_WORD4_AES_SEL_N_HASH_BIT_SIZE
  11082. CC_DSCRPTR_QUEUE_WORD4_AES_XOR_CRYPTO_KEY_BIT_SHIFT
  11083. CC_DSCRPTR_QUEUE_WORD4_AES_XOR_CRYPTO_KEY_BIT_SIZE
  11084. CC_DSCRPTR_QUEUE_WORD4_BYTES_SWAP_BIT_SHIFT
  11085. CC_DSCRPTR_QUEUE_WORD4_BYTES_SWAP_BIT_SIZE
  11086. CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF0_BIT_SHIFT
  11087. CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF0_BIT_SIZE
  11088. CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF1_BIT_SHIFT
  11089. CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF1_BIT_SIZE
  11090. CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF2_BIT_SHIFT
  11091. CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF2_BIT_SIZE
  11092. CC_DSCRPTR_QUEUE_WORD4_CIPHER_DO_BIT_SHIFT
  11093. CC_DSCRPTR_QUEUE_WORD4_CIPHER_DO_BIT_SIZE
  11094. CC_DSCRPTR_QUEUE_WORD4_CIPHER_MODE_BIT_SHIFT
  11095. CC_DSCRPTR_QUEUE_WORD4_CIPHER_MODE_BIT_SIZE
  11096. CC_DSCRPTR_QUEUE_WORD4_CMAC_SIZE0_BIT_SHIFT
  11097. CC_DSCRPTR_QUEUE_WORD4_CMAC_SIZE0_BIT_SIZE
  11098. CC_DSCRPTR_QUEUE_WORD4_DATA_FLOW_MODE_BIT_SHIFT
  11099. CC_DSCRPTR_QUEUE_WORD4_DATA_FLOW_MODE_BIT_SIZE
  11100. CC_DSCRPTR_QUEUE_WORD4_DIN_SRAM_ENDIANNESS_BIT_SHIFT
  11101. CC_DSCRPTR_QUEUE_WORD4_DIN_SRAM_ENDIANNESS_BIT_SIZE
  11102. CC_DSCRPTR_QUEUE_WORD4_DOUT_SRAM_ENDIANNESS_BIT_SHIFT
  11103. CC_DSCRPTR_QUEUE_WORD4_DOUT_SRAM_ENDIANNESS_BIT_SIZE
  11104. CC_DSCRPTR_QUEUE_WORD4_KEY_SIZE_BIT_SHIFT
  11105. CC_DSCRPTR_QUEUE_WORD4_KEY_SIZE_BIT_SIZE
  11106. CC_DSCRPTR_QUEUE_WORD4_REG_OFFSET
  11107. CC_DSCRPTR_QUEUE_WORD4_SETUP_OPERATION_BIT_SHIFT
  11108. CC_DSCRPTR_QUEUE_WORD4_SETUP_OPERATION_BIT_SIZE
  11109. CC_DSCRPTR_QUEUE_WORD4_WORD_SWAP_BIT_SHIFT
  11110. CC_DSCRPTR_QUEUE_WORD4_WORD_SWAP_BIT_SIZE
  11111. CC_DSCRPTR_QUEUE_WORD5_DIN_ADDR_HIGH_BIT_SHIFT
  11112. CC_DSCRPTR_QUEUE_WORD5_DIN_ADDR_HIGH_BIT_SIZE
  11113. CC_DSCRPTR_QUEUE_WORD5_DOUT_ADDR_HIGH_BIT_SHIFT
  11114. CC_DSCRPTR_QUEUE_WORD5_DOUT_ADDR_HIGH_BIT_SIZE
  11115. CC_DSCRPTR_QUEUE_WORD5_REG_OFFSET
  11116. CC_DSCRPTR_SINGLE_ADDR_EN_REG_OFFSET
  11117. CC_DSCRPTR_SINGLE_ADDR_EN_VALUE_BIT_SHIFT
  11118. CC_DSCRPTR_SINGLE_ADDR_EN_VALUE_BIT_SIZE
  11119. CC_DSCRPTR_SW_RESET_REG_OFFSET
  11120. CC_DSCRPTR_SW_RESET_VALUE_BIT_SHIFT
  11121. CC_DSCRPTR_SW_RESET_VALUE_BIT_SIZE
  11122. CC_DSTBRSTLEN_SHFT
  11123. CC_DSTBRSTSIZE_SHFT
  11124. CC_DSTCCTRL_SHFT
  11125. CC_DSTIA
  11126. CC_DSTINC
  11127. CC_DSTNS
  11128. CC_DSTPRI
  11129. CC_EN
  11130. CC_ENABLE
  11131. CC_EQ
  11132. CC_EREG
  11133. CC_ERRATUM_MASK
  11134. CC_EXPORT_MAGIC
  11135. CC_F2RDY
  11136. CC_FCTRL_FUSES__EXT_EFUSE_MACRO_PRESENT_MASK
  11137. CC_FCTRL_FUSES__EXT_EFUSE_MACRO_PRESENT__SHIFT
  11138. CC_FIFO_ED_ADR
  11139. CC_FIFO_RD_PTR
  11140. CC_FIFO_ST_ADR
  11141. CC_FIFO_WR_PTR
  11142. CC_FIPS_SYNC_MODULE_ERROR
  11143. CC_FIPS_SYNC_MODULE_OK
  11144. CC_FIPS_SYNC_REE_STATUS
  11145. CC_FIPS_SYNC_STATUS_RESERVE32B
  11146. CC_FIPS_SYNC_TEE_STATUS
  11147. CC_FIRST_CPP_KEY_SLOT
  11148. CC_FIRST_HW_KEY_SLOT
  11149. CC_GC_EDC_CONFIG__DIS_EDC_MASK
  11150. CC_GC_EDC_CONFIG__DIS_EDC__SHIFT
  11151. CC_GC_PRIM_CONFIG__INACTIVE_IA_MASK
  11152. CC_GC_PRIM_CONFIG__INACTIVE_IA__SHIFT
  11153. CC_GC_PRIM_CONFIG__INACTIVE_VGT_PA_MASK
  11154. CC_GC_PRIM_CONFIG__INACTIVE_VGT_PA__SHIFT
  11155. CC_GC_SHADER_ARRAY_CONFIG
  11156. CC_GC_SHADER_ARRAY_CONFIG_GEN0__GEN0_INACTIVE_CU_MASK
  11157. CC_GC_SHADER_ARRAY_CONFIG_GEN0__GEN0_INACTIVE_CU__SHIFT
  11158. CC_GC_SHADER_ARRAY_CONFIG__DPFP_RATE_MASK
  11159. CC_GC_SHADER_ARRAY_CONFIG__DPFP_RATE__SHIFT
  11160. CC_GC_SHADER_ARRAY_CONFIG__HALF_LDS_MASK
  11161. CC_GC_SHADER_ARRAY_CONFIG__HALF_LDS__SHIFT
  11162. CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS_MASK
  11163. CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS__SHIFT
  11164. CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_WGPS_MASK
  11165. CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_WGPS__SHIFT
  11166. CC_GC_SHADER_ARRAY_CONFIG__SQC_BALANCE_DISABLE_MASK
  11167. CC_GC_SHADER_ARRAY_CONFIG__SQC_BALANCE_DISABLE__SHIFT
  11168. CC_GC_SHADER_PIPE_CONFIG
  11169. CC_GC_SHADER_RATE_CONFIG__DPFP_RATE_MASK
  11170. CC_GC_SHADER_RATE_CONFIG__DPFP_RATE__SHIFT
  11171. CC_GC_SHADER_RATE_CONFIG__HALF_LDS_MASK
  11172. CC_GC_SHADER_RATE_CONFIG__HALF_LDS__SHIFT
  11173. CC_GC_SHADER_RATE_CONFIG__SQC_BALANCE_DISABLE_MASK
  11174. CC_GC_SHADER_RATE_CONFIG__SQC_BALANCE_DISABLE__SHIFT
  11175. CC_GE
  11176. CC_GENMASK
  11177. CC_GIO_IOCCFG_FUSES__NB_REV_ID_MASK
  11178. CC_GIO_IOCCFG_FUSES__NB_REV_ID__SHIFT
  11179. CC_GIO_IOC_FUSES__IOC_FUSES_MASK
  11180. CC_GIO_IOC_FUSES__IOC_FUSES__SHIFT
  11181. CC_GPR0_IRQ_MASK
  11182. CC_GPR_HOST_REG_OFFSET
  11183. CC_GPR_HOST_VALUE_BIT_SHIFT
  11184. CC_GPR_HOST_VALUE_BIT_SIZE
  11185. CC_GT
  11186. CC_HALT
  11187. CC_HARVEST_FUSES__ACP_DISABLE_MASK
  11188. CC_HARVEST_FUSES__ACP_DISABLE__SHIFT
  11189. CC_HARVEST_FUSES__ACP_EXISTS_MASK
  11190. CC_HARVEST_FUSES__ACP_EXISTS__SHIFT
  11191. CC_HARVEST_FUSES__DC_DISABLE_MASK
  11192. CC_HARVEST_FUSES__DC_DISABLE__SHIFT
  11193. CC_HARVEST_FUSES__UVD_DISABLE_MASK
  11194. CC_HARVEST_FUSES__UVD_DISABLE__SHIFT
  11195. CC_HARVEST_FUSES__VCE_DISABLE_MASK
  11196. CC_HARVEST_FUSES__VCE_DISABLE__SHIFT
  11197. CC_HASH_BLOCK_SIZE_MAX
  11198. CC_HEADPHONE
  11199. CC_HI
  11200. CC_HMAC_BLOCK_SIZE_MAX
  11201. CC_HOST_BOOT_AES_CCM_EXISTS_LOCAL_BIT_SHIFT
  11202. CC_HOST_BOOT_AES_CCM_EXISTS_LOCAL_BIT_SIZE
  11203. CC_HOST_BOOT_AES_CMAC_EXISTS_LOCAL_BIT_SHIFT
  11204. CC_HOST_BOOT_AES_CMAC_EXISTS_LOCAL_BIT_SIZE
  11205. CC_HOST_BOOT_AES_DIN_BYTE_RESOLUTION_LOCAL_BIT_SHIFT
  11206. CC_HOST_BOOT_AES_DIN_BYTE_RESOLUTION_LOCAL_BIT_SIZE
  11207. CC_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SHIFT
  11208. CC_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SIZE
  11209. CC_HOST_BOOT_AES_XCBC_MAC_EXISTS_LOCAL_BIT_SHIFT
  11210. CC_HOST_BOOT_AES_XCBC_MAC_EXISTS_LOCAL_BIT_SIZE
  11211. CC_HOST_BOOT_AES_XEX_EXISTS_LOCAL_BIT_SHIFT
  11212. CC_HOST_BOOT_AES_XEX_EXISTS_LOCAL_BIT_SIZE
  11213. CC_HOST_BOOT_AES_XEX_HW_T_CALC_LOCAL_BIT_SHIFT
  11214. CC_HOST_BOOT_AES_XEX_HW_T_CALC_LOCAL_BIT_SIZE
  11215. CC_HOST_BOOT_C2_EXISTS_LOCAL_BIT_SHIFT
  11216. CC_HOST_BOOT_C2_EXISTS_LOCAL_BIT_SIZE
  11217. CC_HOST_BOOT_CTR_EXISTS_LOCAL_BIT_SHIFT
  11218. CC_HOST_BOOT_CTR_EXISTS_LOCAL_BIT_SIZE
  11219. CC_HOST_BOOT_DES_EXISTS_LOCAL_BIT_SHIFT
  11220. CC_HOST_BOOT_DES_EXISTS_LOCAL_BIT_SIZE
  11221. CC_HOST_BOOT_DSCRPTR_EXISTS_LOCAL_BIT_SHIFT
  11222. CC_HOST_BOOT_DSCRPTR_EXISTS_LOCAL_BIT_SIZE
  11223. CC_HOST_BOOT_EXT_MEM_SECURED_LOCAL_BIT_SHIFT
  11224. CC_HOST_BOOT_EXT_MEM_SECURED_LOCAL_BIT_SIZE
  11225. CC_HOST_BOOT_HASH_EXISTS_LOCAL_BIT_SHIFT
  11226. CC_HOST_BOOT_HASH_EXISTS_LOCAL_BIT_SIZE
  11227. CC_HOST_BOOT_HASH_IN_FUSES_LOCAL_BIT_SHIFT
  11228. CC_HOST_BOOT_HASH_IN_FUSES_LOCAL_BIT_SIZE
  11229. CC_HOST_BOOT_LARGE_RKEK_LOCAL_BIT_SHIFT
  11230. CC_HOST_BOOT_LARGE_RKEK_LOCAL_BIT_SIZE
  11231. CC_HOST_BOOT_MD5_PRSNT_LOCAL_BIT_SHIFT
  11232. CC_HOST_BOOT_MD5_PRSNT_LOCAL_BIT_SIZE
  11233. CC_HOST_BOOT_ONLY_ENCRYPT_LOCAL_BIT_SHIFT
  11234. CC_HOST_BOOT_ONLY_ENCRYPT_LOCAL_BIT_SIZE
  11235. CC_HOST_BOOT_PAU_EXISTS_LOCAL_BIT_SHIFT
  11236. CC_HOST_BOOT_PAU_EXISTS_LOCAL_BIT_SIZE
  11237. CC_HOST_BOOT_PKA_EXISTS_LOCAL_BIT_SHIFT
  11238. CC_HOST_BOOT_PKA_EXISTS_LOCAL_BIT_SIZE
  11239. CC_HOST_BOOT_RC4_EXISTS_LOCAL_BIT_SHIFT
  11240. CC_HOST_BOOT_RC4_EXISTS_LOCAL_BIT_SIZE
  11241. CC_HOST_BOOT_REG_OFFSET
  11242. CC_HOST_BOOT_RKEK_ECC_EXISTS_LOCAL_N_BIT_SHIFT
  11243. CC_HOST_BOOT_RKEK_ECC_EXISTS_LOCAL_N_BIT_SIZE
  11244. CC_HOST_BOOT_RNG_EXISTS_LOCAL_BIT_SHIFT
  11245. CC_HOST_BOOT_RNG_EXISTS_LOCAL_BIT_SIZE
  11246. CC_HOST_BOOT_SHA_256_PRSNT_LOCAL_BIT_SHIFT
  11247. CC_HOST_BOOT_SHA_256_PRSNT_LOCAL_BIT_SIZE
  11248. CC_HOST_BOOT_SHA_512_PRSNT_LOCAL_BIT_SHIFT
  11249. CC_HOST_BOOT_SHA_512_PRSNT_LOCAL_BIT_SIZE
  11250. CC_HOST_BOOT_SRAM_SIZE_LOCAL_BIT_SHIFT
  11251. CC_HOST_BOOT_SRAM_SIZE_LOCAL_BIT_SIZE
  11252. CC_HOST_BOOT_SUPPORT_256_192_KEY_LOCAL_BIT_SHIFT
  11253. CC_HOST_BOOT_SUPPORT_256_192_KEY_LOCAL_BIT_SIZE
  11254. CC_HOST_BOOT_SYNTHESIS_CONFIG_BIT_SHIFT
  11255. CC_HOST_BOOT_SYNTHESIS_CONFIG_BIT_SIZE
  11256. CC_HOST_BOOT_TUNNELING_ENB_LOCAL_BIT_SHIFT
  11257. CC_HOST_BOOT_TUNNELING_ENB_LOCAL_BIT_SIZE
  11258. CC_HOST_GPR0_REG_OFFSET
  11259. CC_HOST_GPR0_VALUE_BIT_SHIFT
  11260. CC_HOST_GPR0_VALUE_BIT_SIZE
  11261. CC_HOST_ICR_AXIM_COMP_INT_CLEAR_BIT_SHIFT
  11262. CC_HOST_ICR_AXIM_COMP_INT_CLEAR_BIT_SIZE
  11263. CC_HOST_ICR_AXI_ERR_CLEAR_BIT_SHIFT
  11264. CC_HOST_ICR_AXI_ERR_CLEAR_BIT_SIZE
  11265. CC_HOST_ICR_DSCRPTR_COMPLETION_BIT_SHIFT
  11266. CC_HOST_ICR_DSCRPTR_COMPLETION_BIT_SIZE
  11267. CC_HOST_ICR_DSCRPTR_WATERMARK_QUEUE0_CLEAR_BIT_SHIFT
  11268. CC_HOST_ICR_DSCRPTR_WATERMARK_QUEUE0_CLEAR_BIT_SIZE
  11269. CC_HOST_ICR_GPR_INT_CLEAR_BIT_SHIFT
  11270. CC_HOST_ICR_GPR_INT_CLEAR_BIT_SIZE
  11271. CC_HOST_ICR_REG_OFFSET
  11272. CC_HOST_IMR_AXIM_COMP_INT_MASK_BIT_SHIFT
  11273. CC_HOST_IMR_AXIM_COMP_INT_MASK_BIT_SIZE
  11274. CC_HOST_IMR_AXI_ERR_MASK_BIT_SHIFT
  11275. CC_HOST_IMR_AXI_ERR_MASK_BIT_SIZE
  11276. CC_HOST_IMR_DSCRPTR_COMPLETION_MASK_BIT_SHIFT
  11277. CC_HOST_IMR_DSCRPTR_COMPLETION_MASK_BIT_SIZE
  11278. CC_HOST_IMR_DSCRPTR_WATERMARK_MASK0_BIT_SHIFT
  11279. CC_HOST_IMR_DSCRPTR_WATERMARK_MASK0_BIT_SIZE
  11280. CC_HOST_IMR_GPR0_BIT_SHIFT
  11281. CC_HOST_IMR_GPR0_BIT_SIZE
  11282. CC_HOST_IMR_REE_OP_ABORTED_AES_0_MASK_BIT_SHIFT
  11283. CC_HOST_IMR_REE_OP_ABORTED_AES_0_MASK_BIT_SIZE
  11284. CC_HOST_IMR_REE_OP_ABORTED_AES_1_MASK_BIT_SHIFT
  11285. CC_HOST_IMR_REE_OP_ABORTED_AES_1_MASK_BIT_SIZE
  11286. CC_HOST_IMR_REE_OP_ABORTED_AES_2_MASK_BIT_SHIFT
  11287. CC_HOST_IMR_REE_OP_ABORTED_AES_2_MASK_BIT_SIZE
  11288. CC_HOST_IMR_REE_OP_ABORTED_AES_3_MASK_BIT_SHIFT
  11289. CC_HOST_IMR_REE_OP_ABORTED_AES_3_MASK_BIT_SIZE
  11290. CC_HOST_IMR_REE_OP_ABORTED_AES_4_MASK_BIT_SHIFT
  11291. CC_HOST_IMR_REE_OP_ABORTED_AES_4_MASK_BIT_SIZE
  11292. CC_HOST_IMR_REE_OP_ABORTED_AES_5_MASK_BIT_SHIFT
  11293. CC_HOST_IMR_REE_OP_ABORTED_AES_5_MASK_BIT_SIZE
  11294. CC_HOST_IMR_REE_OP_ABORTED_AES_6_MASK_BIT_SHIFT
  11295. CC_HOST_IMR_REE_OP_ABORTED_AES_6_MASK_BIT_SIZE
  11296. CC_HOST_IMR_REE_OP_ABORTED_AES_7_MASK_BIT_SHIFT
  11297. CC_HOST_IMR_REE_OP_ABORTED_AES_7_MASK_BIT_SIZE
  11298. CC_HOST_IMR_REE_OP_ABORTED_SM_0_MASK_BIT_SHIFT
  11299. CC_HOST_IMR_REE_OP_ABORTED_SM_0_MASK_BIT_SIZE
  11300. CC_HOST_IMR_REE_OP_ABORTED_SM_1_MASK_BIT_SHIFT
  11301. CC_HOST_IMR_REE_OP_ABORTED_SM_1_MASK_BIT_SIZE
  11302. CC_HOST_IMR_REE_OP_ABORTED_SM_2_MASK_BIT_SHIFT
  11303. CC_HOST_IMR_REE_OP_ABORTED_SM_2_MASK_BIT_SIZE
  11304. CC_HOST_IMR_REE_OP_ABORTED_SM_3_MASK_BIT_SHIFT
  11305. CC_HOST_IMR_REE_OP_ABORTED_SM_3_MASK_BIT_SIZE
  11306. CC_HOST_IMR_REE_OP_ABORTED_SM_4_MASK_BIT_SHIFT
  11307. CC_HOST_IMR_REE_OP_ABORTED_SM_4_MASK_BIT_SIZE
  11308. CC_HOST_IMR_REE_OP_ABORTED_SM_5_MASK_BIT_SHIFT
  11309. CC_HOST_IMR_REE_OP_ABORTED_SM_5_MASK_BIT_SIZE
  11310. CC_HOST_IMR_REE_OP_ABORTED_SM_6_MASK_BIT_SHIFT
  11311. CC_HOST_IMR_REE_OP_ABORTED_SM_6_MASK_BIT_SIZE
  11312. CC_HOST_IMR_REE_OP_ABORTED_SM_7_MASK_BIT_SHIFT
  11313. CC_HOST_IMR_REE_OP_ABORTED_SM_7_MASK_BIT_SIZE
  11314. CC_HOST_IMR_REG_OFFSET
  11315. CC_HOST_IRR_AXIM_COMP_INT_BIT_SHIFT
  11316. CC_HOST_IRR_AXIM_COMP_INT_BIT_SIZE
  11317. CC_HOST_IRR_AXI_ERR_INT_BIT_SHIFT
  11318. CC_HOST_IRR_AXI_ERR_INT_BIT_SIZE
  11319. CC_HOST_IRR_DSCRPTR_COMPLETION_LOW_INT_BIT_SHIFT
  11320. CC_HOST_IRR_DSCRPTR_COMPLETION_LOW_INT_BIT_SIZE
  11321. CC_HOST_IRR_DSCRPTR_WATERMARK_INT_BIT_SHIFT
  11322. CC_HOST_IRR_DSCRPTR_WATERMARK_INT_BIT_SIZE
  11323. CC_HOST_IRR_GPR0_BIT_SHIFT
  11324. CC_HOST_IRR_GPR0_BIT_SIZE
  11325. CC_HOST_IRR_REE_OP_ABORTED_AES_0_INT_BIT_SHIFT
  11326. CC_HOST_IRR_REE_OP_ABORTED_AES_0_INT_BIT_SIZE
  11327. CC_HOST_IRR_REE_OP_ABORTED_AES_1_INT_BIT_SHIFT
  11328. CC_HOST_IRR_REE_OP_ABORTED_AES_1_INT_BIT_SIZE
  11329. CC_HOST_IRR_REE_OP_ABORTED_AES_2_INT_BIT_SHIFT
  11330. CC_HOST_IRR_REE_OP_ABORTED_AES_2_INT_BIT_SIZE
  11331. CC_HOST_IRR_REE_OP_ABORTED_AES_3_INT_BIT_SHIFT
  11332. CC_HOST_IRR_REE_OP_ABORTED_AES_3_INT_BIT_SIZE
  11333. CC_HOST_IRR_REE_OP_ABORTED_AES_4_INT_BIT_SHIFT
  11334. CC_HOST_IRR_REE_OP_ABORTED_AES_4_INT_BIT_SIZE
  11335. CC_HOST_IRR_REE_OP_ABORTED_AES_5_INT_BIT_SHIFT
  11336. CC_HOST_IRR_REE_OP_ABORTED_AES_5_INT_BIT_SIZE
  11337. CC_HOST_IRR_REE_OP_ABORTED_AES_6_INT_BIT_SHIFT
  11338. CC_HOST_IRR_REE_OP_ABORTED_AES_6_INT_BIT_SIZE
  11339. CC_HOST_IRR_REE_OP_ABORTED_AES_7_INT_BIT_SHIFT
  11340. CC_HOST_IRR_REE_OP_ABORTED_AES_7_INT_BIT_SIZE
  11341. CC_HOST_IRR_REE_OP_ABORTED_SM_0_INT_BIT_SHIFT
  11342. CC_HOST_IRR_REE_OP_ABORTED_SM_0_INT_BIT_SIZE
  11343. CC_HOST_IRR_REE_OP_ABORTED_SM_1_INT_BIT_SHIFT
  11344. CC_HOST_IRR_REE_OP_ABORTED_SM_1_INT_BIT_SIZE
  11345. CC_HOST_IRR_REE_OP_ABORTED_SM_2_INT_BIT_SHIFT
  11346. CC_HOST_IRR_REE_OP_ABORTED_SM_2_INT_BIT_SIZE
  11347. CC_HOST_IRR_REE_OP_ABORTED_SM_3_INT_BIT_SHIFT
  11348. CC_HOST_IRR_REE_OP_ABORTED_SM_3_INT_BIT_SIZE
  11349. CC_HOST_IRR_REE_OP_ABORTED_SM_4_INT_BIT_SHIFT
  11350. CC_HOST_IRR_REE_OP_ABORTED_SM_4_INT_BIT_SIZE
  11351. CC_HOST_IRR_REE_OP_ABORTED_SM_5_INT_BIT_SHIFT
  11352. CC_HOST_IRR_REE_OP_ABORTED_SM_5_INT_BIT_SIZE
  11353. CC_HOST_IRR_REE_OP_ABORTED_SM_6_INT_BIT_SHIFT
  11354. CC_HOST_IRR_REE_OP_ABORTED_SM_6_INT_BIT_SIZE
  11355. CC_HOST_IRR_REE_OP_ABORTED_SM_7_INT_BIT_SHIFT
  11356. CC_HOST_IRR_REE_OP_ABORTED_SM_7_INT_BIT_SIZE
  11357. CC_HOST_IRR_REG_OFFSET
  11358. CC_HOST_KFDE0_VALID_REG_OFFSET
  11359. CC_HOST_KFDE0_VALID_VALUE_BIT_SHIFT
  11360. CC_HOST_KFDE0_VALID_VALUE_BIT_SIZE
  11361. CC_HOST_KFDE1_VALID_REG_OFFSET
  11362. CC_HOST_KFDE1_VALID_VALUE_BIT_SHIFT
  11363. CC_HOST_KFDE1_VALID_VALUE_BIT_SIZE
  11364. CC_HOST_KFDE2_VALID_REG_OFFSET
  11365. CC_HOST_KFDE2_VALID_VALUE_BIT_SHIFT
  11366. CC_HOST_KFDE2_VALID_VALUE_BIT_SIZE
  11367. CC_HOST_KFDE3_VALID_REG_OFFSET
  11368. CC_HOST_KFDE3_VALID_VALUE_BIT_SHIFT
  11369. CC_HOST_KFDE3_VALID_VALUE_BIT_SIZE
  11370. CC_HOST_POWER_DOWN_EN_REG_OFFSET
  11371. CC_HOST_POWER_DOWN_EN_VALUE_BIT_SHIFT
  11372. CC_HOST_POWER_DOWN_EN_VALUE_BIT_SIZE
  11373. CC_HOST_REMOVE_INPUT_PINS_OTP_DISCONNECTED_BIT_SHIFT
  11374. CC_HOST_REMOVE_INPUT_PINS_OTP_DISCONNECTED_BIT_SIZE
  11375. CC_HOST_REMOVE_INPUT_PINS_REG_OFFSET
  11376. CC_HOST_REMOVE_INPUT_PINS_REMOVE_AES_ENGINE_BIT_SHIFT
  11377. CC_HOST_REMOVE_INPUT_PINS_REMOVE_AES_ENGINE_BIT_SIZE
  11378. CC_HOST_REMOVE_INPUT_PINS_REMOVE_AES_MAC_ENGINE_BIT_SHIFT
  11379. CC_HOST_REMOVE_INPUT_PINS_REMOVE_AES_MAC_ENGINE_BIT_SIZE
  11380. CC_HOST_REMOVE_INPUT_PINS_REMOVE_DES_ENGINE_BIT_SHIFT
  11381. CC_HOST_REMOVE_INPUT_PINS_REMOVE_DES_ENGINE_BIT_SIZE
  11382. CC_HOST_REMOVE_INPUT_PINS_REMOVE_GHASH_ENGINE_BIT_SHIFT
  11383. CC_HOST_REMOVE_INPUT_PINS_REMOVE_GHASH_ENGINE_BIT_SIZE
  11384. CC_HOST_REMOVE_INPUT_PINS_REMOVE_HASH_ENGINE_BIT_SHIFT
  11385. CC_HOST_REMOVE_INPUT_PINS_REMOVE_HASH_ENGINE_BIT_SIZE
  11386. CC_HOST_REMOVE_INPUT_PINS_REMOVE_SM3_ENGINE_BIT_SHIFT
  11387. CC_HOST_REMOVE_INPUT_PINS_REMOVE_SM3_ENGINE_BIT_SIZE
  11388. CC_HOST_REMOVE_INPUT_PINS_REMOVE_SM4_ENGINE_BIT_SHIFT
  11389. CC_HOST_REMOVE_INPUT_PINS_REMOVE_SM4_ENGINE_BIT_SIZE
  11390. CC_HOST_SEP_SRAM_THRESHOLD_REG_OFFSET
  11391. CC_HOST_SEP_SRAM_THRESHOLD_VALUE_BIT_SHIFT
  11392. CC_HOST_SEP_SRAM_THRESHOLD_VALUE_BIT_SIZE
  11393. CC_HOST_SIGNATURE_630_REG_OFFSET
  11394. CC_HOST_SIGNATURE_712_REG_OFFSET
  11395. CC_HOST_SIGNATURE_VALUE_BIT_SHIFT
  11396. CC_HOST_SIGNATURE_VALUE_BIT_SIZE
  11397. CC_HOST_VERSION_630_REG_OFFSET
  11398. CC_HOST_VERSION_712_REG_OFFSET
  11399. CC_HOST_VERSION_VALUE_BIT_SHIFT
  11400. CC_HOST_VERSION_VALUE_BIT_SIZE
  11401. CC_HS
  11402. CC_HW_KEY_SIZE
  11403. CC_HW_PROTECTED_KEY
  11404. CC_HW_RESET_LOOP_COUNT
  11405. CC_HW_REV_630
  11406. CC_HW_REV_710
  11407. CC_HW_REV_712
  11408. CC_HW_REV_713
  11409. CC_ICLR
  11410. CC_IGEN
  11411. CC_IMSK
  11412. CC_INTAVGOFFSET_ENA
  11413. CC_INT_CAL_N_AVG_MASK
  11414. CC_INT_CAL_SAMPLES_16
  11415. CC_INT_CAL_SAMPLES_4
  11416. CC_INT_CAL_SAMPLES_8
  11417. CC_INVALID_PROTECTED_KEY
  11418. CC_IPEN
  11419. CC_LAST_CPP_KEY_SLOT
  11420. CC_LAST_HW_KEY_SLOT
  11421. CC_LE
  11422. CC_LINEIN
  11423. CC_LINEOUT
  11424. CC_LINEOUT_LABELLED_HEADPHONE
  11425. CC_LO
  11426. CC_LS
  11427. CC_LT
  11428. CC_MASK
  11429. CC_MAX_DESC_SEQ_LEN
  11430. CC_MAX_HASH_BLCK_SIZE
  11431. CC_MAX_HASH_DIGEST_SIZE
  11432. CC_MAX_HASH_SEQ_LEN
  11433. CC_MAX_IVGEN_DMA_ADDRESSES
  11434. CC_MAX_MLLI_ENTRY_SIZE
  11435. CC_MAX_OPAD_KEYS_SIZE
  11436. CC_MAX_POLL_ITER
  11437. CC_MC_MAX_CHANNEL__NOOFCHAN_MASK
  11438. CC_MC_MAX_CHANNEL__NOOFCHAN__SHIFT
  11439. CC_MD5_BLOCK_SIZE
  11440. CC_MD5_BLOCK_SIZE_IN_WORDS
  11441. CC_MD5_DIGEST_SIZE
  11442. CC_MI
  11443. CC_MICROPHONE
  11444. CC_MIN_INCR
  11445. CC_MUXOFFSET
  11446. CC_NE
  11447. CC_NEGATIVE
  11448. CC_NUM_CPP_KEY_SLOTS
  11449. CC_NUM_HW_KEY_SLOTS
  11450. CC_NUM_IDRS
  11451. CC_NV
  11452. CC_NVM_IS_IDLE_MASK
  11453. CC_NVM_IS_IDLE_REG_OFFSET
  11454. CC_NVM_IS_IDLE_VALUE_BIT_SHIFT
  11455. CC_NVM_IS_IDLE_VALUE_BIT_SIZE
  11456. CC_OUT
  11457. CC_OVERFLOW
  11458. CC_PEND_A
  11459. CC_PEND_B
  11460. CC_PERIPHERAL_ID_0_REG_OFFSET
  11461. CC_PERIPHERAL_ID_0_VALUE_BIT_SHIFT
  11462. CC_PERIPHERAL_ID_0_VALUE_BIT_SIZE
  11463. CC_PERIPHERAL_ID_1_DES_0_JEP106_BIT_SHIFT
  11464. CC_PERIPHERAL_ID_1_DES_0_JEP106_BIT_SIZE
  11465. CC_PERIPHERAL_ID_1_PART_1_BIT_SHIFT
  11466. CC_PERIPHERAL_ID_1_PART_1_BIT_SIZE
  11467. CC_PERIPHERAL_ID_1_REG_OFFSET
  11468. CC_PERIPHERAL_ID_2_DES_1_JEP106_BIT_SHIFT
  11469. CC_PERIPHERAL_ID_2_DES_1_JEP106_BIT_SIZE
  11470. CC_PERIPHERAL_ID_2_JEDEC_BIT_SHIFT
  11471. CC_PERIPHERAL_ID_2_JEDEC_BIT_SIZE
  11472. CC_PERIPHERAL_ID_2_REG_OFFSET
  11473. CC_PERIPHERAL_ID_2_REVISION_BIT_SHIFT
  11474. CC_PERIPHERAL_ID_2_REVISION_BIT_SIZE
  11475. CC_PERIPHERAL_ID_3_CMOD_BIT_SHIFT
  11476. CC_PERIPHERAL_ID_3_CMOD_BIT_SIZE
  11477. CC_PERIPHERAL_ID_3_REG_OFFSET
  11478. CC_PERIPHERAL_ID_3_REVAND_BIT_SHIFT
  11479. CC_PERIPHERAL_ID_3_REVAND_BIT_SIZE
  11480. CC_PERIPHERAL_ID_4_REG_OFFSET
  11481. CC_PERIPHERAL_ID_4_VALUE_BIT_SHIFT
  11482. CC_PERIPHERAL_ID_4_VALUE_BIT_SIZE
  11483. CC_PIDRESERVED0_REG_OFFSET
  11484. CC_PIDRESERVED1_REG_OFFSET
  11485. CC_PIDRESERVED2_REG_OFFSET
  11486. CC_PINS_FULL
  11487. CC_PINS_SLIM
  11488. CC_PL
  11489. CC_PLL_CON0
  11490. CC_PLL_LOCK
  11491. CC_POLICY_PROTECTED_KEY
  11492. CC_PREAMBLE_BITS
  11493. CC_PRINT
  11494. CC_PWR_UP_ENA
  11495. CC_RB_BACKEND_DISABLE
  11496. CC_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK
  11497. CC_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT
  11498. CC_RB_DAISY_CHAIN__RB_0_MASK
  11499. CC_RB_DAISY_CHAIN__RB_0__SHIFT
  11500. CC_RB_DAISY_CHAIN__RB_1_MASK
  11501. CC_RB_DAISY_CHAIN__RB_1__SHIFT
  11502. CC_RB_DAISY_CHAIN__RB_2_MASK
  11503. CC_RB_DAISY_CHAIN__RB_2__SHIFT
  11504. CC_RB_DAISY_CHAIN__RB_3_MASK
  11505. CC_RB_DAISY_CHAIN__RB_3__SHIFT
  11506. CC_RB_DAISY_CHAIN__RB_4_MASK
  11507. CC_RB_DAISY_CHAIN__RB_4__SHIFT
  11508. CC_RB_DAISY_CHAIN__RB_5_MASK
  11509. CC_RB_DAISY_CHAIN__RB_5__SHIFT
  11510. CC_RB_DAISY_CHAIN__RB_6_MASK
  11511. CC_RB_DAISY_CHAIN__RB_6__SHIFT
  11512. CC_RB_DAISY_CHAIN__RB_7_MASK
  11513. CC_RB_DAISY_CHAIN__RB_7__SHIFT
  11514. CC_RB_REDUNDANCY__EN_REDUNDANCY0_MASK
  11515. CC_RB_REDUNDANCY__EN_REDUNDANCY0__SHIFT
  11516. CC_RB_REDUNDANCY__EN_REDUNDANCY1_MASK
  11517. CC_RB_REDUNDANCY__EN_REDUNDANCY1__SHIFT
  11518. CC_RB_REDUNDANCY__FAILED_RB0_MASK
  11519. CC_RB_REDUNDANCY__FAILED_RB0__SHIFT
  11520. CC_RB_REDUNDANCY__FAILED_RB1_MASK
  11521. CC_RB_REDUNDANCY__FAILED_RB1__SHIFT
  11522. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY
  11523. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY_0
  11524. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY_1
  11525. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY_2
  11526. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY_3
  11527. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY_4
  11528. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY_5
  11529. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY_6
  11530. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_INPUT_PORT_CONNECTIVITY_ALL
  11531. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY__INPUT_PORT_CONNECTIVITY_MASK
  11532. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY__INPUT_PORT_CONNECTIVITY_OVERRIDE_ENABLE_MASK
  11533. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY__INPUT_PORT_CONNECTIVITY_OVERRIDE_ENABLE__SHIFT
  11534. CC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY__INPUT_PORT_CONNECTIVITY__SHIFT
  11535. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY
  11536. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY_0
  11537. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY_1
  11538. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY_2
  11539. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY_3
  11540. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY_4
  11541. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY_5
  11542. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY_6
  11543. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY_PORT_CONNECTIVITY_ALL
  11544. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY__PORT_CONNECTIVITY_MASK
  11545. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY__PORT_CONNECTIVITY_OVERRIDE_ENABLE_MASK
  11546. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY__PORT_CONNECTIVITY_OVERRIDE_ENABLE__SHIFT
  11547. CC_RCU_DC_AUDIO_PORT_CONNECTIVITY__PORT_CONNECTIVITY__SHIFT
  11548. CC_RCU_FUSES__BIF_RST_POLLING_DISABLE_MASK
  11549. CC_RCU_FUSES__BIF_RST_POLLING_DISABLE__SHIFT
  11550. CC_RCU_FUSES__CG_RST_GLB_REQ_DIS_MASK
  11551. CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT
  11552. CC_RCU_FUSES__DEBUG_DISABLE_MASK
  11553. CC_RCU_FUSES__DEBUG_DISABLE__SHIFT
  11554. CC_RCU_FUSES__DRV_RST_MODE_MASK
  11555. CC_RCU_FUSES__DRV_RST_MODE__SHIFT
  11556. CC_RCU_FUSES__DSMU_DISABLE_MASK
  11557. CC_RCU_FUSES__DSMU_DISABLE__SHIFT
  11558. CC_RCU_FUSES__EFUSE_RD_DISABLE_MASK
  11559. CC_RCU_FUSES__EFUSE_RD_DISABLE__SHIFT
  11560. CC_RCU_FUSES__FCH_LOCKOUT_ENABLE_MASK
  11561. CC_RCU_FUSES__FCH_LOCKOUT_ENABLE__SHIFT
  11562. CC_RCU_FUSES__FCH_XFIRE_FILTER_ENABLE_MASK
  11563. CC_RCU_FUSES__FCH_XFIRE_FILTER_ENABLE__SHIFT
  11564. CC_RCU_FUSES__GPU_DIS_MASK
  11565. CC_RCU_FUSES__GPU_DIS__SHIFT
  11566. CC_RCU_FUSES__JPC_REP_DISABLE_MASK
  11567. CC_RCU_FUSES__JPC_REP_DISABLE__SHIFT
  11568. CC_RCU_FUSES__MEM_HARDREP_EN_MASK
  11569. CC_RCU_FUSES__MEM_HARDREP_EN__SHIFT
  11570. CC_RCU_FUSES__PCIE_INIT_DISABLE_MASK
  11571. CC_RCU_FUSES__PCIE_INIT_DISABLE__SHIFT
  11572. CC_RCU_FUSES__PHY_FUSE_VALID_MASK
  11573. CC_RCU_FUSES__PHY_FUSE_VALID__SHIFT
  11574. CC_RCU_FUSES__PSP_ENABLE_MASK
  11575. CC_RCU_FUSES__PSP_ENABLE__SHIFT
  11576. CC_RCU_FUSES__RCU_BREAK_POINT1_MASK
  11577. CC_RCU_FUSES__RCU_BREAK_POINT1__SHIFT
  11578. CC_RCU_FUSES__RCU_BREAK_POINT2_MASK
  11579. CC_RCU_FUSES__RCU_BREAK_POINT2__SHIFT
  11580. CC_RCU_FUSES__RCU_SPARE_MASK
  11581. CC_RCU_FUSES__RCU_SPARE__SHIFT
  11582. CC_RCU_FUSES__ROM_DIS_MASK
  11583. CC_RCU_FUSES__ROM_DIS__SHIFT
  11584. CC_RCU_FUSES__SAMU_FUSE_DISABLE_MASK
  11585. CC_RCU_FUSES__SAMU_FUSE_DISABLE__SHIFT
  11586. CC_RCU_FUSES__SMU_IOC_MST_DISABLE_MASK
  11587. CC_RCU_FUSES__SMU_IOC_MST_DISABLE__SHIFT
  11588. CC_RCU_FUSES__WRP_FUSE_VALID_MASK
  11589. CC_RCU_FUSES__WRP_FUSE_VALID__SHIFT
  11590. CC_RCU_FUSES__XFIRE_DISABLE_MASK
  11591. CC_RCU_FUSES__XFIRE_DISABLE__SHIFT
  11592. CC_REG
  11593. CC_REG_BORROW
  11594. CC_REG_HIGH
  11595. CC_REG_JTAGID_L__A
  11596. CC_REG_LOW
  11597. CC_REG_MINUS
  11598. CC_REG_NONZERO
  11599. CC_REG_NORMALIZED
  11600. CC_REG_OSC_MODE_M20
  11601. CC_REG_OSC_MODE__A
  11602. CC_REG_PLL_MODE_BYPASS_PLL
  11603. CC_REG_PLL_MODE_PUMP_CUR_12
  11604. CC_REG_PLL_MODE__A
  11605. CC_REG_PWD_MODE_DOWN_PLL
  11606. CC_REG_PWD_MODE__A
  11607. CC_REG_REF_DIVIDE__A
  11608. CC_REG_SATURATE
  11609. CC_REG_UPDATE_KEY
  11610. CC_REG_UPDATE__A
  11611. CC_REG_ZERO
  11612. CC_RMCOUNT
  11613. CC_RMI_REDUNDANCY__REPAIR_EN_IN_0_MASK
  11614. CC_RMI_REDUNDANCY__REPAIR_EN_IN_0__SHIFT
  11615. CC_RMI_REDUNDANCY__REPAIR_EN_IN_1_MASK
  11616. CC_RMI_REDUNDANCY__REPAIR_EN_IN_1__SHIFT
  11617. CC_RMI_REDUNDANCY__REPAIR_ID_SWAP_MASK
  11618. CC_RMI_REDUNDANCY__REPAIR_ID_SWAP__SHIFT
  11619. CC_RMI_REDUNDANCY__REPAIR_RMI_OVERRIDE_MASK
  11620. CC_RMI_REDUNDANCY__REPAIR_RMI_OVERRIDE__SHIFT
  11621. CC_RREG
  11622. CC_SAMPLES_40
  11623. CC_SCLK_VID_FUSES__SClkVid0_MASK
  11624. CC_SCLK_VID_FUSES__SClkVid0__SHIFT
  11625. CC_SCLK_VID_FUSES__SClkVid1_MASK
  11626. CC_SCLK_VID_FUSES__SClkVid1__SHIFT
  11627. CC_SCLK_VID_FUSES__SClkVid2_MASK
  11628. CC_SCLK_VID_FUSES__SClkVid2__SHIFT
  11629. CC_SCLK_VID_FUSES__SClkVid3_MASK
  11630. CC_SCLK_VID_FUSES__SClkVid3__SHIFT
  11631. CC_SCSI_RESET
  11632. CC_SECURITY_DISABLED_MASK
  11633. CC_SECURITY_DISABLED_REG_OFFSET
  11634. CC_SECURITY_DISABLED_VALUE_BIT_SHIFT
  11635. CC_SECURITY_DISABLED_VALUE_BIT_SIZE
  11636. CC_SET
  11637. CC_SG_FROM_BUF
  11638. CC_SG_TO_BUF
  11639. CC_SHA1_224_256_BLOCK_SIZE
  11640. CC_SHA1_BLOCK_SIZE
  11641. CC_SHA1_BLOCK_SIZE_IN_WORDS
  11642. CC_SHA1_DIGEST_SIZE
  11643. CC_SHA224_BLOCK_SIZE
  11644. CC_SHA224_DIGEST_SIZE
  11645. CC_SHA256_BLOCK_SIZE
  11646. CC_SHA256_BLOCK_SIZE_IN_WORDS
  11647. CC_SHA256_DIGEST_SIZE
  11648. CC_SHA256_DIGEST_SIZE_IN_WORDS
  11649. CC_SHA384_BLOCK_SIZE
  11650. CC_SHA384_DIGEST_SIZE
  11651. CC_SHA512_BLOCK_SIZE
  11652. CC_SHA512_DIGEST_SIZE
  11653. CC_SINGLE_STEP
  11654. CC_SM3_HASH_LEN_SIZE
  11655. CC_SMU_MISC_FUSES
  11656. CC_SMU_MISC_FUSES__GNB_SPARE_MASK
  11657. CC_SMU_MISC_FUSES__GNB_SPARE__SHIFT
  11658. CC_SMU_MISC_FUSES__IOC_IOMMU_DISABLE_MASK
  11659. CC_SMU_MISC_FUSES__IOC_IOMMU_DISABLE__SHIFT
  11660. CC_SMU_MISC_FUSES__IOMMU_V2_DISABLE_MASK
  11661. CC_SMU_MISC_FUSES__IOMMU_V2_DISABLE__SHIFT
  11662. CC_SMU_MISC_FUSES__L2IMU_tn2_dtc_half_MASK
  11663. CC_SMU_MISC_FUSES__L2IMU_tn2_dtc_half__SHIFT
  11664. CC_SMU_MISC_FUSES__L2IMU_tn2_itc_dis_MASK
  11665. CC_SMU_MISC_FUSES__L2IMU_tn2_itc_dis__SHIFT
  11666. CC_SMU_MISC_FUSES__L2IMU_tn2_itc_half_MASK
  11667. CC_SMU_MISC_FUSES__L2IMU_tn2_itc_half__SHIFT
  11668. CC_SMU_MISC_FUSES__L2IMU_tn2_pdc_half_MASK
  11669. CC_SMU_MISC_FUSES__L2IMU_tn2_pdc_half__SHIFT
  11670. CC_SMU_MISC_FUSES__L2IMU_tn2_ptc_dis_MASK
  11671. CC_SMU_MISC_FUSES__L2IMU_tn2_ptc_dis__SHIFT
  11672. CC_SMU_MISC_FUSES__L2IMU_tn2_ptc_half_MASK
  11673. CC_SMU_MISC_FUSES__L2IMU_tn2_ptc_half__SHIFT
  11674. CC_SMU_MISC_FUSES__MISC_SPARE_MASK
  11675. CC_SMU_MISC_FUSES__MISC_SPARE__SHIFT
  11676. CC_SMU_MISC_FUSES__MinSClkDid_MASK
  11677. CC_SMU_MISC_FUSES__MinSClkDid__SHIFT
  11678. CC_SMU_MISC_FUSES__PostResetGnbClkDid_MASK
  11679. CC_SMU_MISC_FUSES__PostResetGnbClkDid__SHIFT
  11680. CC_SMU_MISC_FUSES__VCE_DISABLE_MASK
  11681. CC_SMU_MISC_FUSES__VCE_DISABLE__SHIFT
  11682. CC_SMU_TST_EFUSE1_MISC
  11683. CC_SMU_TST_EFUSE1_MISC__CRBBMP1500_DISA_MASK
  11684. CC_SMU_TST_EFUSE1_MISC__CRBBMP1500_DISA__SHIFT
  11685. CC_SMU_TST_EFUSE1_MISC__CRBBMP1500_DISB_MASK
  11686. CC_SMU_TST_EFUSE1_MISC__CRBBMP1500_DISB__SHIFT
  11687. CC_SMU_TST_EFUSE1_MISC__DCE_SCAN_DISABLE_MASK
  11688. CC_SMU_TST_EFUSE1_MISC__DCE_SCAN_DISABLE__SHIFT
  11689. CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1_MASK
  11690. CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT
  11691. CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2_MASK
  11692. CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT
  11693. CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3_MASK
  11694. CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT
  11695. CC_SMU_TST_EFUSE1_MISC__GPU_DIS_MASK
  11696. CC_SMU_TST_EFUSE1_MISC__GPU_DIS__SHIFT
  11697. CC_SMU_TST_EFUSE1_MISC__HARD_REPAIR_DISABLE_MASK
  11698. CC_SMU_TST_EFUSE1_MISC__HARD_REPAIR_DISABLE__SHIFT
  11699. CC_SMU_TST_EFUSE1_MISC__MBIST_DISABLE_MASK
  11700. CC_SMU_TST_EFUSE1_MISC__MBIST_DISABLE__SHIFT
  11701. CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2_MASK
  11702. CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT
  11703. CC_SMU_TST_EFUSE1_MISC__RME_MASK
  11704. CC_SMU_TST_EFUSE1_MISC__RME__SHIFT
  11705. CC_SMU_TST_EFUSE1_MISC__RM_RF8_MASK
  11706. CC_SMU_TST_EFUSE1_MISC__RM_RF8__SHIFT
  11707. CC_SMU_TST_EFUSE1_MISC__SMS_PWRDWN_DISABLE_MASK
  11708. CC_SMU_TST_EFUSE1_MISC__SMS_PWRDWN_DISABLE__SHIFT
  11709. CC_SMU_TST_EFUSE1_MISC__SOFT_REPAIR_DISABLE_MASK
  11710. CC_SMU_TST_EFUSE1_MISC__SOFT_REPAIR_DISABLE__SHIFT
  11711. CC_SMU_TST_EFUSE1_MISC__VCE_DISABLE_MASK
  11712. CC_SMU_TST_EFUSE1_MISC__VCE_DISABLE__SHIFT
  11713. CC_SPEAKERS
  11714. CC_SQC_BANK_DISABLE__SQC0_BANK_DISABLE_MASK
  11715. CC_SQC_BANK_DISABLE__SQC0_BANK_DISABLE__SHIFT
  11716. CC_SQC_BANK_DISABLE__SQC1_BANK_DISABLE_MASK
  11717. CC_SQC_BANK_DISABLE__SQC1_BANK_DISABLE__SHIFT
  11718. CC_SQC_BANK_DISABLE__SQC2_BANK_DISABLE_MASK
  11719. CC_SQC_BANK_DISABLE__SQC2_BANK_DISABLE__SHIFT
  11720. CC_SQC_BANK_DISABLE__SQC3_BANK_DISABLE_MASK
  11721. CC_SQC_BANK_DISABLE__SQC3_BANK_DISABLE__SHIFT
  11722. CC_SRAM_ADDR_REG_OFFSET
  11723. CC_SRAM_ADDR_VALUE_BIT_SHIFT
  11724. CC_SRAM_ADDR_VALUE_BIT_SIZE
  11725. CC_SRAM_DATA_READY_REG_OFFSET
  11726. CC_SRAM_DATA_READY_VALUE_BIT_SHIFT
  11727. CC_SRAM_DATA_READY_VALUE_BIT_SIZE
  11728. CC_SRAM_DATA_REG_OFFSET
  11729. CC_SRAM_DATA_VALUE_BIT_SHIFT
  11730. CC_SRAM_DATA_VALUE_BIT_SIZE
  11731. CC_SRCBRSTLEN_SHFT
  11732. CC_SRCBRSTSIZE_SHFT
  11733. CC_SRCCCTRL_MASK
  11734. CC_SRCCCTRL_SHFT
  11735. CC_SRCIA
  11736. CC_SRCINC
  11737. CC_SRCNS
  11738. CC_SRCPRI
  11739. CC_SRCSTREAM
  11740. CC_SREG
  11741. CC_SROM_OTP
  11742. CC_SR_CTL0_ALLOW_PIC_SHIFT
  11743. CC_SR_CTL0_ENABLE_MASK
  11744. CC_SR_CTL0_ENABLE_SHIFT
  11745. CC_SR_CTL0_EN_MEM_DISABLE_FOR_SLEEP
  11746. CC_SR_CTL0_EN_SBC_STBY_SHIFT
  11747. CC_SR_CTL0_EN_SR_ALP_CLK_MASK_SHIFT
  11748. CC_SR_CTL0_EN_SR_ENG_CLK_SHIFT
  11749. CC_SR_CTL0_EN_SR_HT_CLK_SHIFT
  11750. CC_SR_CTL0_MAX_SR_LQ_CLK_CNT_SHIFT
  11751. CC_SR_CTL0_MIN_DIV_SHIFT
  11752. CC_SR_CTL0_RSRC_TRIGGER_SHIFT
  11753. CC_STATE_SIZE
  11754. CC_STD_ALL
  11755. CC_STD_NIST
  11756. CC_STD_OSCCA
  11757. CC_STEST
  11758. CC_SUSPEND_TIMEOUT
  11759. CC_SWAP_SHFT
  11760. CC_SYS_RB_BACKEND_DISABLE
  11761. CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK
  11762. CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT
  11763. CC_SYS_RB_REDUNDANCY__EN_REDUNDANCY0_MASK
  11764. CC_SYS_RB_REDUNDANCY__EN_REDUNDANCY0__SHIFT
  11765. CC_SYS_RB_REDUNDANCY__EN_REDUNDANCY1_MASK
  11766. CC_SYS_RB_REDUNDANCY__EN_REDUNDANCY1__SHIFT
  11767. CC_SYS_RB_REDUNDANCY__FAILED_RB0_MASK
  11768. CC_SYS_RB_REDUNDANCY__FAILED_RB0__SHIFT
  11769. CC_SYS_RB_REDUNDANCY__FAILED_RB1_MASK
  11770. CC_SYS_RB_REDUNDANCY__FAILED_RB1__SHIFT
  11771. CC_TABLE_SHADOW_MAX
  11772. CC_TEST
  11773. CC_THM_STRAPS0__CTF_DISABLE_MASK
  11774. CC_THM_STRAPS0__CTF_DISABLE__SHIFT
  11775. CC_THM_STRAPS0__NUM_ACQ_MASK
  11776. CC_THM_STRAPS0__NUM_ACQ__SHIFT
  11777. CC_THM_STRAPS0__TMON0_BGADJ_MASK
  11778. CC_THM_STRAPS0__TMON0_BGADJ__SHIFT
  11779. CC_THM_STRAPS0__TMON0_DISABLE_MASK
  11780. CC_THM_STRAPS0__TMON0_DISABLE__SHIFT
  11781. CC_THM_STRAPS0__TMON1_BGADJ_MASK
  11782. CC_THM_STRAPS0__TMON1_BGADJ__SHIFT
  11783. CC_THM_STRAPS0__TMON1_DISABLE_MASK
  11784. CC_THM_STRAPS0__TMON1_DISABLE__SHIFT
  11785. CC_THM_STRAPS0__TMON2_DISABLE_MASK
  11786. CC_THM_STRAPS0__TMON2_DISABLE__SHIFT
  11787. CC_THM_STRAPS0__TMON3_DISABLE_MASK
  11788. CC_THM_STRAPS0__TMON3_DISABLE__SHIFT
  11789. CC_THM_STRAPS0__TMON_CLK_SEL_MASK
  11790. CC_THM_STRAPS0__TMON_CLK_SEL__SHIFT
  11791. CC_THM_STRAPS0__TMON_CMON_FUSE_SEL_MASK
  11792. CC_THM_STRAPS0__TMON_CMON_FUSE_SEL__SHIFT
  11793. CC_THM_STRAPS0__TMON_CONFIG_SOURCE_MASK
  11794. CC_THM_STRAPS0__TMON_CONFIG_SOURCE__SHIFT
  11795. CC_THM_STRAPS0__UNUSED_MASK
  11796. CC_THM_STRAPS0__UNUSED__SHIFT
  11797. CC_TST_ID_STRAPS__ATI_REV_ID_MASK
  11798. CC_TST_ID_STRAPS__ATI_REV_ID__SHIFT
  11799. CC_TST_ID_STRAPS__DEVICE_ID_MASK
  11800. CC_TST_ID_STRAPS__DEVICE_ID__SHIFT
  11801. CC_TST_ID_STRAPS__MAJOR_REV_ID_MASK
  11802. CC_TST_ID_STRAPS__MAJOR_REV_ID__SHIFT
  11803. CC_TST_ID_STRAPS__MINOR_REV_ID_MASK
  11804. CC_TST_ID_STRAPS__MINOR_REV_ID__SHIFT
  11805. CC_UNPROTECTED_KEY
  11806. CC_USING_NOP_MCOUNT
  11807. CC_USING_PATCHABLE_FUNCTION_ENTRY
  11808. CC_UVD_HARVESTING__MMSCH_DISABLE_MASK
  11809. CC_UVD_HARVESTING__MMSCH_DISABLE__SHIFT
  11810. CC_UVD_HARVESTING__UVD_DISABLE_MASK
  11811. CC_UVD_HARVESTING__UVD_DISABLE__SHIFT
  11812. CC_VC
  11813. CC_VS
  11814. CC_XMTDATAAVAIL_CTRL
  11815. CC_XMTDATAAVAIL_MODE
  11816. CC_ZERO
  11817. CD
  11818. CD0
  11819. CD1
  11820. CD1400_MAX_SPEED
  11821. CD1400_REV_G
  11822. CD1400_REV_J
  11823. CD180TXirq
  11824. CD2
  11825. CD2401_ADDR
  11826. CD3
  11827. CD4
  11828. CD5
  11829. CD6
  11830. CD7
  11831. CD8
  11832. CD9
  11833. CDA
  11834. CDA2D_CHMXAMODE_AUPDT_FIX
  11835. CDA2D_CHMXAMODE_AUPDT_INC
  11836. CDA2D_CHMXAMODE_AUPDT_MASK
  11837. CDA2D_CHMXAMODE_ENDIAN_0123
  11838. CDA2D_CHMXAMODE_ENDIAN_1032
  11839. CDA2D_CHMXAMODE_ENDIAN_2301
  11840. CDA2D_CHMXAMODE_ENDIAN_3210
  11841. CDA2D_CHMXAMODE_ENDIAN_MASK
  11842. CDA2D_CHMXAMODE_RSSEL_SHIFT
  11843. CDA2D_CHMXAMODE_TYPE_MASK
  11844. CDA2D_CHMXAMODE_TYPE_NORMAL
  11845. CDA2D_CHMXAMODE_TYPE_RING
  11846. CDA2D_CHMXCTRL1
  11847. CDA2D_CHMXCTRL1_INDSIZE_FINITE
  11848. CDA2D_CHMXCTRL1_INDSIZE_INFINITE
  11849. CDA2D_CHMXCTRL1_INDSIZE_MASK
  11850. CDA2D_CHMXCTRL2
  11851. CDA2D_CHMXDSTAMODE
  11852. CDA2D_CHMXDSTSTRTADRS
  11853. CDA2D_CHMXDSTSTRTADRSU
  11854. CDA2D_CHMXSRCAMODE
  11855. CDA2D_CHMXSRCSTRTADRS
  11856. CDA2D_CHMXSRCSTRTADRSU
  11857. CDA2D_RBADRSLOAD
  11858. CDA2D_RBFLUSH0
  11859. CDA2D_RBMXBGNADRS
  11860. CDA2D_RBMXBGNADRSU
  11861. CDA2D_RBMXBTH
  11862. CDA2D_RBMXCNFG
  11863. CDA2D_RBMXENDADRS
  11864. CDA2D_RBMXENDADRSU
  11865. CDA2D_RBMXID
  11866. CDA2D_RBMXIE
  11867. CDA2D_RBMXIR
  11868. CDA2D_RBMXIX_REMAIN
  11869. CDA2D_RBMXIX_SPACE
  11870. CDA2D_RBMXPTRU_PTRU_MASK
  11871. CDA2D_RBMXRDPTR
  11872. CDA2D_RBMXRDPTRU
  11873. CDA2D_RBMXRTH
  11874. CDA2D_RBMXWRPTR
  11875. CDA2D_RBMXWRPTRU
  11876. CDA2D_RDPTRLOAD
  11877. CDA2D_RDPTRLOAD_LSFLAG_LOAD
  11878. CDA2D_RDPTRLOAD_LSFLAG_STORE
  11879. CDA2D_STAT0
  11880. CDA2D_STRT0
  11881. CDA2D_STRT0_STOP_MASK
  11882. CDA2D_STRT0_STOP_START
  11883. CDA2D_STRT0_STOP_STOP
  11884. CDA2D_STRTADRSLOAD
  11885. CDA2D_TEST
  11886. CDA2D_TEST_DDR_MODE_EXTOFF1
  11887. CDA2D_TEST_DDR_MODE_EXTON0
  11888. CDA2D_TEST_DDR_MODE_MASK
  11889. CDA2D_WRPTRLOAD
  11890. CDA2D_WRPTRLOAD_LSFLAG_LOAD
  11891. CDA2D_WRPTRLOAD_LSFLAG_STORE
  11892. CDAB
  11893. CDABH
  11894. CDAC
  11895. CDAH
  11896. CDAL
  11897. CDAR0
  11898. CDAR1
  11899. CDAR10
  11900. CDAR11
  11901. CDAR12
  11902. CDAR13
  11903. CDAR14
  11904. CDAR15
  11905. CDAR16
  11906. CDAR17
  11907. CDAR18
  11908. CDAR19
  11909. CDAR2
  11910. CDAR20
  11911. CDAR21
  11912. CDAR3
  11913. CDAR4
  11914. CDAR5
  11915. CDAR6
  11916. CDAR7
  11917. CDAR8
  11918. CDAR9
  11919. CDATA_DMA_CONTROL
  11920. CDATA_FREQUENCY
  11921. CDATA_HEADER_LEN
  11922. CDATA_HOST_SRC_ADDRH
  11923. CDATA_HOST_SRC_ADDRL
  11924. CDATA_HOST_SRC_CURRENTH
  11925. CDATA_HOST_SRC_CURRENTL
  11926. CDATA_HOST_SRC_END_PLUS_1H
  11927. CDATA_HOST_SRC_END_PLUS_1L
  11928. CDATA_INSTANCE_READY
  11929. CDATA_IN_BUF_BEGIN
  11930. CDATA_IN_BUF_CONNECT
  11931. CDATA_IN_BUF_END_PLUS_1
  11932. CDATA_IN_BUF_HEAD
  11933. CDATA_IN_BUF_TAIL
  11934. CDATA_LEFT_SUR_VOL
  11935. CDATA_LEFT_VOLUME
  11936. CDATA_OUT_BUF_BEGIN
  11937. CDATA_OUT_BUF_CONNECT
  11938. CDATA_OUT_BUF_END_PLUS_1
  11939. CDATA_OUT_BUF_HEAD
  11940. CDATA_OUT_BUF_TAIL
  11941. CDATA_RESERVED
  11942. CDATA_RIGHT_SUR_VOL
  11943. CDATA_RIGHT_VOLUME
  11944. CDA_R0
  11945. CDA_R1
  11946. CDA_R2
  11947. CDB
  11948. CDBGPORT
  11949. CDBGPORTPTR
  11950. CDB_16
  11951. CDB_32
  11952. CDB_CORE_MODULE
  11953. CDB_CORE_SHUTDOWN
  11954. CDB_ILLEGAL
  11955. CDC
  11956. CDCD
  11957. CDCE706_CLKIN_CLOCK
  11958. CDCE706_CLKIN_CLOCK_MASK
  11959. CDCE706_CLKIN_SOURCE
  11960. CDCE706_CLKIN_SOURCE_LVCMOS
  11961. CDCE706_CLKIN_SOURCE_MASK
  11962. CDCE706_CLKIN_SOURCE_SHIFT
  11963. CDCE706_CLKOUT
  11964. CDCE706_CLKOUT_DIVIDER_MASK
  11965. CDCE706_CLKOUT_ENABLE_MASK
  11966. CDCE706_DIVIDER
  11967. CDCE706_DIVIDER_DIVIDER_MASK
  11968. CDCE706_DIVIDER_DIVIDER_MAX
  11969. CDCE706_DIVIDER_PLL
  11970. CDCE706_DIVIDER_PLL_MASK
  11971. CDCE706_DIVIDER_PLL_SHIFT
  11972. CDCE706_PLL_FREQ_HI
  11973. CDCE706_PLL_FREQ_MAX
  11974. CDCE706_PLL_FREQ_MIN
  11975. CDCE706_PLL_FVCO
  11976. CDCE706_PLL_FVCO_MASK
  11977. CDCE706_PLL_HI
  11978. CDCE706_PLL_HI_M_MASK
  11979. CDCE706_PLL_HI_N_MASK
  11980. CDCE706_PLL_HI_N_SHIFT
  11981. CDCE706_PLL_LOW_M_MASK
  11982. CDCE706_PLL_LOW_N_MASK
  11983. CDCE706_PLL_MUX
  11984. CDCE706_PLL_MUX_MASK
  11985. CDCE706_PLL_M_LOW
  11986. CDCE706_PLL_M_MAX
  11987. CDCE706_PLL_N_LOW
  11988. CDCE706_PLL_N_MAX
  11989. CDCE913
  11990. CDCE925
  11991. CDCE925_I2C_COMMAND_BLOCK_TRANSFER
  11992. CDCE925_I2C_COMMAND_BYTE_TRANSFER
  11993. CDCE925_OFFSET_PLL
  11994. CDCE925_PLL_FREQUENCY_MAX
  11995. CDCE925_PLL_FREQUENCY_MIN
  11996. CDCE925_PLL_MULDIV
  11997. CDCE925_PLL_MUX_OUTPUTS
  11998. CDCE925_REG_GLOBAL1
  11999. CDCE925_REG_PDIVL
  12000. CDCE925_REG_XCSEL
  12001. CDCE925_REG_Y1SPIPDIVH
  12002. CDCE937
  12003. CDCE949
  12004. CDCLK_CTL
  12005. CDCLK_DIVMUX_CD_OVERRIDE
  12006. CDCLK_FREQ
  12007. CDCLK_FREQ_337_308
  12008. CDCLK_FREQ_450_432
  12009. CDCLK_FREQ_540
  12010. CDCLK_FREQ_675_617
  12011. CDCLK_FREQ_DECIMAL_MASK
  12012. CDCLK_FREQ_MASK
  12013. CDCLK_FREQ_SEL_MASK
  12014. CDCLK_FREQ_SHIFT
  12015. CDCR
  12016. CDCS
  12017. CDC_A_BOOST_EN_CTL
  12018. CDC_A_CURRENT_LIMIT
  12019. CDC_A_GND_PLUG_TYPE_NO
  12020. CDC_A_HPHL_PLUG_TYPE_NO
  12021. CDC_A_INT_EN_CLR
  12022. CDC_A_INT_EN_SET
  12023. CDC_A_INT_LATCHED_CLR
  12024. CDC_A_INT_LATCHED_STS
  12025. CDC_A_INT_MID_SEL
  12026. CDC_A_INT_PENDING_STS
  12027. CDC_A_INT_POLARITY_HIGH
  12028. CDC_A_INT_POLARITY_LOW
  12029. CDC_A_INT_PRIORITY
  12030. CDC_A_INT_RT_STS
  12031. CDC_A_INT_SET_TYPE
  12032. CDC_A_MASTER_BIAS_CTL
  12033. CDC_A_MBHC_BTN0_ZDET_CTL_0
  12034. CDC_A_MBHC_BTN1_ZDET_CTL_1
  12035. CDC_A_MBHC_BTN2_ZDET_CTL_2
  12036. CDC_A_MBHC_BTN3_CTL
  12037. CDC_A_MBHC_BTN4_CTL
  12038. CDC_A_MBHC_BTN_VREF_COARSE_MASK
  12039. CDC_A_MBHC_BTN_VREF_COARSE_SHIFT
  12040. CDC_A_MBHC_BTN_VREF_FINE_MASK
  12041. CDC_A_MBHC_BTN_VREF_FINE_SHIFT
  12042. CDC_A_MBHC_BTN_VREF_MASK
  12043. CDC_A_MBHC_DBNC_TIMER
  12044. CDC_A_MBHC_DBNC_TIMER_BTN_DBNC_T_16MS
  12045. CDC_A_MBHC_DBNC_TIMER_INSREM_DBNC_T_256_MS
  12046. CDC_A_MBHC_DET_CTL_1
  12047. CDC_A_MBHC_DET_CTL_2
  12048. CDC_A_MBHC_DET_CTL_GND_DET_EN
  12049. CDC_A_MBHC_DET_CTL_HPHL_100K_TO_GND_EN
  12050. CDC_A_MBHC_DET_CTL_HPHL_100K_TO_GND_EN_MASK
  12051. CDC_A_MBHC_DET_CTL_HS_L_DET_COMPA_CTRL_V0P9_VDD
  12052. CDC_A_MBHC_DET_CTL_HS_L_DET_PULL_UP_CTRL_I_3P0
  12053. CDC_A_MBHC_DET_CTL_L_DET_EN
  12054. CDC_A_MBHC_DET_CTL_MBHC_BIAS_EN
  12055. CDC_A_MBHC_DET_CTL_MECH_DET_TYPE_INSERTION
  12056. CDC_A_MBHC_DET_CTL_MECH_DET_TYPE_MASK
  12057. CDC_A_MBHC_DET_CTL_MECH_DET_TYPE_REMOVAL
  12058. CDC_A_MBHC_DET_CTL_MECH_DET_TYPE_SHIFT
  12059. CDC_A_MBHC_DET_CTL_MIC_CLAMP_CTL_AUTO
  12060. CDC_A_MBHC_DET_CTL_MIC_CLAMP_CTL_MANUAL
  12061. CDC_A_MBHC_DET_CTL_MIC_CLAMP_CTL_MASK
  12062. CDC_A_MBHC_FSM_CTL
  12063. CDC_A_MBHC_FSM_CTL_BTN_ISRC_CTRL_I_100UA
  12064. CDC_A_MBHC_FSM_CTL_BTN_ISRC_CTRL_MASK
  12065. CDC_A_MBHC_FSM_CTL_MBHC_FSM_EN
  12066. CDC_A_MBHC_FSM_CTL_MBHC_FSM_EN_MASK
  12067. CDC_A_MBHC_RESULT_1
  12068. CDC_A_MBHC_RESULT_1_BTN_RESULT_MASK
  12069. CDC_A_MICB_1_CTL
  12070. CDC_A_MICB_1_EN
  12071. CDC_A_MICB_1_INT_RBIAS
  12072. CDC_A_MICB_1_VAL
  12073. CDC_A_MICB_2_EN
  12074. CDC_A_MICB_2_EN_ENABLE
  12075. CDC_A_MICB_2_PULL_DOWN_EN
  12076. CDC_A_MICB_2_PULL_DOWN_EN_MASK
  12077. CDC_A_NCP_BIAS
  12078. CDC_A_NCP_CLIM_ADDR
  12079. CDC_A_NCP_CLK
  12080. CDC_A_NCP_EN
  12081. CDC_A_NCP_FBCTRL
  12082. CDC_A_NCP_FBCTRL_FB_CLK_INV
  12083. CDC_A_NCP_FBCTRL_FB_CLK_INV_MASK
  12084. CDC_A_NCP_TEST
  12085. CDC_A_NCP_VCTRL
  12086. CDC_A_PERPH_RESET_CTL3
  12087. CDC_A_PERPH_RESET_CTL4
  12088. CDC_A_PERPH_SUBTYPE
  12089. CDC_A_PERPH_TYPE
  12090. CDC_A_PLUG_TYPE_MASK
  12091. CDC_A_REVISION1
  12092. CDC_A_REVISION2
  12093. CDC_A_REVISION3
  12094. CDC_A_REVISION4
  12095. CDC_A_RX_CLOCK_DIVIDER
  12096. CDC_A_RX_COM_BIAS_DAC
  12097. CDC_A_RX_COM_OCP_COUNT
  12098. CDC_A_RX_COM_OCP_CTL
  12099. CDC_A_RX_EAR_CTL
  12100. CDC_A_RX_HPH_BIAS_CNP
  12101. CDC_A_RX_HPH_BIAS_LDO_OCP
  12102. CDC_A_RX_HPH_BIAS_PA
  12103. CDC_A_RX_HPH_CNP_EN
  12104. CDC_A_RX_HPH_L_PA_DAC_CTL
  12105. CDC_A_RX_HPH_R_PA_DAC_CTL
  12106. CDC_A_SEC_ACCESS
  12107. CDC_A_SLOPE_COMP_IP_ZERO
  12108. CDC_A_SPKR_DAC_CTL
  12109. CDC_A_SPKR_DRV_CTL
  12110. CDC_A_SPKR_DRV_DBG
  12111. CDC_A_SPKR_OCP_CTL
  12112. CDC_A_SPKR_PWRSTG_CTL
  12113. CDC_A_TX_1_2_ATEST_CTL
  12114. CDC_A_TX_1_2_ATEST_CTL_2
  12115. CDC_A_TX_1_2_OPAMP_BIAS
  12116. CDC_A_TX_1_2_TEST_CTL_1
  12117. CDC_A_TX_1_2_TEST_CTL_2
  12118. CDC_A_TX_1_EN
  12119. CDC_A_TX_2_EN
  12120. CDC_A_TX_3_EN
  12121. CDC_CD_R
  12122. CDC_CD_RW
  12123. CDC_CLOSE_TRAY
  12124. CDC_CMD
  12125. CDC_CMD_OFFSET
  12126. CDC_CMD_REG
  12127. CDC_DATA_INTERFACE_TYPE
  12128. CDC_DEVICE_CLASS
  12129. CDC_DRIVE_STATUS
  12130. CDC_DVD
  12131. CDC_DVD_R
  12132. CDC_DVD_RAM
  12133. CDC_D_CDC_ANA_CLK_CTL
  12134. CDC_D_CDC_CONN_HPHR_DAC_CTL
  12135. CDC_D_CDC_CONN_RX1_CTL
  12136. CDC_D_CDC_CONN_RX2_CTL
  12137. CDC_D_CDC_CONN_RX3_CTL
  12138. CDC_D_CDC_CONN_RX_LB_CTL
  12139. CDC_D_CDC_CONN_TX1_CTL
  12140. CDC_D_CDC_CONN_TX2_CTL
  12141. CDC_D_CDC_DIG_CLK_CTL
  12142. CDC_D_CDC_RST_CTL
  12143. CDC_D_CDC_TOP_CLK_CTL
  12144. CDC_D_INT_EN_CLR
  12145. CDC_D_INT_EN_SET
  12146. CDC_D_PERPH_RESET_CTL3
  12147. CDC_D_PERPH_RESET_CTL4
  12148. CDC_D_PERPH_SUBTYPE
  12149. CDC_D_REVISION1
  12150. CDC_D_SEC_ACCESS
  12151. CDC_GENERIC_PACKET
  12152. CDC_INTERFACE_CLASS
  12153. CDC_INTERFACE_SUBCLASS
  12154. CDC_LOCK
  12155. CDC_MBIM_FLAG_AVOID_ALTSETTING_TOGGLE
  12156. CDC_MBIM_MIN_DATAGRAM_SIZE
  12157. CDC_MCN
  12158. CDC_MEDIA_CHANGED
  12159. CDC_MO_DRIVE
  12160. CDC_MRW
  12161. CDC_MRW_W
  12162. CDC_MULTI_SESSION
  12163. CDC_NCM_COMM_ALTSETTING_MBIM
  12164. CDC_NCM_COMM_ALTSETTING_NCM
  12165. CDC_NCM_DATA_ALTSETTING_MBIM
  12166. CDC_NCM_DATA_ALTSETTING_NCM
  12167. CDC_NCM_DPT_DATAGRAMS_MAX
  12168. CDC_NCM_FLAG_NDP_TO_END
  12169. CDC_NCM_FLAG_RESET_NTB16
  12170. CDC_NCM_LOW_MEM_MAX_CNT
  12171. CDC_NCM_MAX_DATAGRAM_SIZE
  12172. CDC_NCM_MIN_DATAGRAM_SIZE
  12173. CDC_NCM_MIN_TX_PKT
  12174. CDC_NCM_NTB_DEF_SIZE_RX
  12175. CDC_NCM_NTB_DEF_SIZE_TX
  12176. CDC_NCM_NTB_MAX_SIZE_RX
  12177. CDC_NCM_NTB_MAX_SIZE_TX
  12178. CDC_NCM_RESTART_TIMER_DATAGRAM_CNT
  12179. CDC_NCM_SIMPLE_STAT
  12180. CDC_NCM_STAT
  12181. CDC_NCM_TIMER_INTERVAL_MAX
  12182. CDC_NCM_TIMER_INTERVAL_MIN
  12183. CDC_NCM_TIMER_INTERVAL_USEC
  12184. CDC_NCM_TIMER_PENDING_CNT
  12185. CDC_OPEN_TRAY
  12186. CDC_PHONET_MAGIC_NUMBER
  12187. CDC_PLAY_AUDIO
  12188. CDC_PRODUCT_NUM
  12189. CDC_RAM
  12190. CDC_RESET
  12191. CDC_RESULT_S0
  12192. CDC_RESULT_S1
  12193. CDC_RESULT_S10
  12194. CDC_RESULT_S11
  12195. CDC_RESULT_S2
  12196. CDC_RESULT_S3
  12197. CDC_RESULT_S4
  12198. CDC_RESULT_S5
  12199. CDC_RESULT_S6
  12200. CDC_RESULT_S7
  12201. CDC_RESULT_S8
  12202. CDC_RESULT_S9
  12203. CDC_SELECT_DISC
  12204. CDC_SELECT_SPEED
  12205. CDC_VENDOR_NUM
  12206. CDC_WAR_DATA_CE
  12207. CDC_WAR_MAGIC_STR
  12208. CDD
  12209. CDDA_BPC_FULL
  12210. CDDA_BPC_SINGLE
  12211. CDDA_OLD
  12212. CDE
  12213. CDEBUG
  12214. CDEBUG_GSIZE
  12215. CDEBUG_SIZE
  12216. CDEI
  12217. CDER
  12218. CDER_RGB
  12219. CDETCTRL1_CDDELAY_MASK
  12220. CDETCTRL1_CDDELAY_SHIFT
  12221. CDETCTRL1_CDPDET_MASK
  12222. CDETCTRL1_CDPDET_SHIFT
  12223. CDETCTRL1_CHGDETEN_MASK
  12224. CDETCTRL1_CHGDETEN_SHIFT
  12225. CDETCTRL1_CHGTYPMAN_MASK
  12226. CDETCTRL1_CHGTYPMAN_SHIFT
  12227. CDETCTRL1_DBIDLE_MASK
  12228. CDETCTRL1_DBIDLE_SHIFT
  12229. CDETCTRL1_DCD2SCT_MASK
  12230. CDETCTRL1_DCD2SCT_SHIFT
  12231. CDETCTRL1_DCDCPL_MASK
  12232. CDETCTRL1_DCDCPL_SHIFT
  12233. CDETCTRL1_DCDEN_MASK
  12234. CDETCTRL1_DCDEN_SHIFT
  12235. CDETCTRL2_DXOVPEN_MASK
  12236. CDETCTRL2_DXOVPEN_SHIFT
  12237. CDETCTRL2_VIDRMEN_MASK
  12238. CDETCTRL2_VIDRMEN_SHIFT
  12239. CDEV
  12240. CDEV_DDP_ENABLE
  12241. CDEV_FLAG_IN_CONTROL
  12242. CDEV_ISO_ENABLE
  12243. CDEV_NAME_SIZE
  12244. CDEV_NESTED_FIRST
  12245. CDEV_NESTED_SECOND
  12246. CDEV_STATE_UP
  12247. CDEV_TODO_ENABLE_CMF
  12248. CDEV_TODO_NOTHING
  12249. CDEV_TODO_REBIND
  12250. CDEV_TODO_REGISTER
  12251. CDEV_TODO_UNREG
  12252. CDEV_TODO_UNREG_EVAL
  12253. CDEV_TYPE_FAN
  12254. CDEV_TYPE_MEM
  12255. CDEV_TYPE_NR
  12256. CDEV_TYPE_PROC
  12257. CDE_MARK
  12258. CDF
  12259. CDFCODE
  12260. CDFI
  12261. CDFULL_INT
  12262. CDF_COMMUNITY
  12263. CDF_GPI_IE
  12264. CDF_GPI_IS
  12265. CDF_GPP
  12266. CDF_HOSTSW_OWN
  12267. CDF_HWDM
  12268. CDF_MRW
  12269. CDF_PADCFGLOCK
  12270. CDF_PAD_OWN
  12271. CDF_RWRT
  12272. CDGH_SAVE
  12273. CDG_BACKOFF
  12274. CDG_FULL
  12275. CDG_NONFULL
  12276. CDG_UNKNOWN
  12277. CDHIPR
  12278. CDINDEX
  12279. CDINDIR
  12280. CDIR
  12281. CDIRECTCTRL6
  12282. CDIT_OEMID_LENGTH
  12283. CDIT_OEMTABLEID_LENGTH
  12284. CDIT_SIGNATURE
  12285. CDIVG_USE_THERM_CONTROLS_MASK
  12286. CDMA_CONF_BENAB
  12287. CDMA_CONF_DIR
  12288. CDMA_CONF_RIRQ
  12289. CDMA_CONF_SENAB
  12290. CDMA_EVENT_NONE
  12291. CDMA_EVENT_PUSH_BUFFER_SPACE
  12292. CDMA_EVENT_SYNC_QUEUE_EMPTY
  12293. CDMA_GATHER_FETCHES_MAX_NB
  12294. CDMM_ACSR_DEVREV
  12295. CDMM_ACSR_DEVREV_SHIFT
  12296. CDMM_ACSR_DEVSIZE
  12297. CDMM_ACSR_DEVSIZE_SHIFT
  12298. CDMM_ACSR_DEVTYPE
  12299. CDMM_ACSR_DEVTYPE_SHIFT
  12300. CDMM_ACSR_SR
  12301. CDMM_ACSR_SW
  12302. CDMM_ACSR_UR
  12303. CDMM_ACSR_UW
  12304. CDMM_ATTR
  12305. CDMM_DRB_SIZE
  12306. CDM_CE
  12307. CDM_MRW_BGFORMAT_ACTIVE
  12308. CDM_MRW_BGFORMAT_COMPLETE
  12309. CDM_MRW_BGFORMAT_INACTIVE
  12310. CDM_MRW_NOTMRW
  12311. CDM_SDRAM
  12312. CDNS3_CONTROLLER_V0
  12313. CDNS3_CONTROLLER_V1
  12314. CDNS3_DATA_STAGE
  12315. CDNS3_DESCMIS_BUF_SIZE
  12316. CDNS3_ENDPOINTS_MAX_COUNT
  12317. CDNS3_EP0_MAX_PACKET_LIMIT
  12318. CDNS3_EP_BUF_SIZE
  12319. CDNS3_EP_ISO_HS_MULT
  12320. CDNS3_EP_ISO_SS_BURST
  12321. CDNS3_EP_MAX_PACKET_LIMIT
  12322. CDNS3_EP_MAX_STREAMS
  12323. CDNS3_EP_ZLP_BUF_SIZE
  12324. CDNS3_MAX_NUM_DESCMISS_BUF
  12325. CDNS3_MSG_MAX
  12326. CDNS3_ROLE_STATE_ACTIVE
  12327. CDNS3_ROLE_STATE_INACTIVE
  12328. CDNS3_SETUP_STAGE
  12329. CDNS3_STATUS_STAGE
  12330. CDNS3_WA2_NUM_BUFFERS
  12331. CDNS3_XHCI_RESOURCES_NUM
  12332. CDNS_DEFAULT_SSP_INTERVAL
  12333. CDNS_DEVICE_ID
  12334. CDNS_DID
  12335. CDNS_DPI_INPUT
  12336. CDNS_DPN_B0_ASYNC_CTRL
  12337. CDNS_DPN_B0_CH_EN
  12338. CDNS_DPN_B0_CONFIG
  12339. CDNS_DPN_B0_HCTRL
  12340. CDNS_DPN_B0_OFFSET_CTRL
  12341. CDNS_DPN_B0_SAMPLE_CTRL
  12342. CDNS_DPN_B1_ASYNC_CTRL
  12343. CDNS_DPN_B1_CH_EN
  12344. CDNS_DPN_B1_CONFIG
  12345. CDNS_DPN_B1_HCTRL
  12346. CDNS_DPN_B1_OFFSET_CTRL
  12347. CDNS_DPN_B1_SAMPLE_CTRL
  12348. CDNS_DPN_CONFIG_BGC
  12349. CDNS_DPN_CONFIG_BPM
  12350. CDNS_DPN_CONFIG_PORT_DAT
  12351. CDNS_DPN_CONFIG_PORT_FLOW
  12352. CDNS_DPN_CONFIG_WL
  12353. CDNS_DPN_HCTRL_HSTART
  12354. CDNS_DPN_HCTRL_HSTOP
  12355. CDNS_DPN_HCTRL_LCTRL
  12356. CDNS_DPN_OFFSET_CTRL_1
  12357. CDNS_DPN_OFFSET_CTRL_2
  12358. CDNS_DPN_SAMPLE_CTRL_SI
  12359. CDNS_DP_SIZE
  12360. CDNS_DSC_INPUT
  12361. CDNS_GPIO_BYPASS_MODE
  12362. CDNS_GPIO_DIRECTION_MODE
  12363. CDNS_GPIO_INPUT_VALUE
  12364. CDNS_GPIO_IRQ_ANY_EDGE
  12365. CDNS_GPIO_IRQ_DIS
  12366. CDNS_GPIO_IRQ_EN
  12367. CDNS_GPIO_IRQ_MASK
  12368. CDNS_GPIO_IRQ_STATUS
  12369. CDNS_GPIO_IRQ_TYPE
  12370. CDNS_GPIO_IRQ_VALUE
  12371. CDNS_GPIO_OUTPUT_EN
  12372. CDNS_GPIO_OUTPUT_VALUE
  12373. CDNS_I2C_ADDR_MASK
  12374. CDNS_I2C_ADDR_OFFSET
  12375. CDNS_I2C_BROKEN_HOLD_BIT
  12376. CDNS_I2C_CR_ACK_EN
  12377. CDNS_I2C_CR_CLR_FIFO
  12378. CDNS_I2C_CR_DIVA_MASK
  12379. CDNS_I2C_CR_DIVA_SHIFT
  12380. CDNS_I2C_CR_DIVB_MASK
  12381. CDNS_I2C_CR_DIVB_SHIFT
  12382. CDNS_I2C_CR_HOLD
  12383. CDNS_I2C_CR_MS
  12384. CDNS_I2C_CR_NEA
  12385. CDNS_I2C_CR_OFFSET
  12386. CDNS_I2C_CR_RW
  12387. CDNS_I2C_DATA_INTR_DEPTH
  12388. CDNS_I2C_DATA_OFFSET
  12389. CDNS_I2C_DIVA_MAX
  12390. CDNS_I2C_DIVB_MAX
  12391. CDNS_I2C_ENABLED_INTR_MASK
  12392. CDNS_I2C_FIFO_DEPTH
  12393. CDNS_I2C_IDR_OFFSET
  12394. CDNS_I2C_IER_OFFSET
  12395. CDNS_I2C_ISR_OFFSET
  12396. CDNS_I2C_IXR_ALL_INTR_MASK
  12397. CDNS_I2C_IXR_ARB_LOST
  12398. CDNS_I2C_IXR_COMP
  12399. CDNS_I2C_IXR_DATA
  12400. CDNS_I2C_IXR_ERR_INTR_MASK
  12401. CDNS_I2C_IXR_NACK
  12402. CDNS_I2C_IXR_RX_OVF
  12403. CDNS_I2C_IXR_RX_UNF
  12404. CDNS_I2C_IXR_SLV_RDY
  12405. CDNS_I2C_IXR_TO
  12406. CDNS_I2C_IXR_TX_OVF
  12407. CDNS_I2C_MAX_TRANSFER_SIZE
  12408. CDNS_I2C_SPEED_DEFAULT
  12409. CDNS_I2C_SPEED_MAX
  12410. CDNS_I2C_SR_BA
  12411. CDNS_I2C_SR_OFFSET
  12412. CDNS_I2C_SR_RXDV
  12413. CDNS_I2C_TIMEOUT
  12414. CDNS_I2C_TIMEOUT_MAX
  12415. CDNS_I2C_TIME_OUT_OFFSET
  12416. CDNS_I2C_TRANSFER_SIZE
  12417. CDNS_I2C_XFER_SIZE_OFFSET
  12418. CDNS_MCP_CLK_CTRL0
  12419. CDNS_MCP_CLK_CTRL1
  12420. CDNS_MCP_CLK_MCLKD_MASK
  12421. CDNS_MCP_CMDCTRL
  12422. CDNS_MCP_CMD_BASE
  12423. CDNS_MCP_CMD_COMMAND
  12424. CDNS_MCP_CMD_DEV_ADDR
  12425. CDNS_MCP_CMD_LEN
  12426. CDNS_MCP_CMD_READ
  12427. CDNS_MCP_CMD_REG_ADDR_H
  12428. CDNS_MCP_CMD_REG_ADDR_L
  12429. CDNS_MCP_CMD_REG_DATA
  12430. CDNS_MCP_CMD_SSP_TAG
  12431. CDNS_MCP_CMD_WORD_LEN
  12432. CDNS_MCP_CMD_WRITE
  12433. CDNS_MCP_CONFIG
  12434. CDNS_MCP_CONFIG_BUS_REL
  12435. CDNS_MCP_CONFIG_CMD
  12436. CDNS_MCP_CONFIG_MCMD_RETRY
  12437. CDNS_MCP_CONFIG_MMASTER
  12438. CDNS_MCP_CONFIG_MPREQ_DELAY
  12439. CDNS_MCP_CONFIG_OP
  12440. CDNS_MCP_CONFIG_OP_NORMAL
  12441. CDNS_MCP_CONFIG_SNIFFER
  12442. CDNS_MCP_CONFIG_SSPMOD
  12443. CDNS_MCP_CONFIG_UPDATE
  12444. CDNS_MCP_CONFIG_UPDATE_BIT
  12445. CDNS_MCP_CONTROL
  12446. CDNS_MCP_CONTROL_BLOCK_WAKEUP
  12447. CDNS_MCP_CONTROL_CLK_PAUSE
  12448. CDNS_MCP_CONTROL_CLK_STOP_CLR
  12449. CDNS_MCP_CONTROL_CMD_ACCEPT
  12450. CDNS_MCP_CONTROL_CMD_RST
  12451. CDNS_MCP_CONTROL_HW_RST
  12452. CDNS_MCP_CONTROL_RST_DELAY
  12453. CDNS_MCP_CONTROL_SOFT_RST
  12454. CDNS_MCP_CONTROL_SW_RST
  12455. CDNS_MCP_FIFOLEVEL
  12456. CDNS_MCP_FIFOSTAT
  12457. CDNS_MCP_FRAME_SHAPE
  12458. CDNS_MCP_FRAME_SHAPE_COL_MASK
  12459. CDNS_MCP_FRAME_SHAPE_INIT
  12460. CDNS_MCP_FRAME_SHAPE_ROW_OFFSET
  12461. CDNS_MCP_INTMASK
  12462. CDNS_MCP_INTSET
  12463. CDNS_MCP_INTSTAT
  12464. CDNS_MCP_INT_CMD_ERR
  12465. CDNS_MCP_INT_CTRL_CLASH
  12466. CDNS_MCP_INT_DATA_CLASH
  12467. CDNS_MCP_INT_DPINT
  12468. CDNS_MCP_INT_IRQ
  12469. CDNS_MCP_INT_PARITY
  12470. CDNS_MCP_INT_RX_NE
  12471. CDNS_MCP_INT_RX_WL
  12472. CDNS_MCP_INT_SLAVE_ALERT
  12473. CDNS_MCP_INT_SLAVE_ATTACH
  12474. CDNS_MCP_INT_SLAVE_MASK
  12475. CDNS_MCP_INT_SLAVE_NATTACH
  12476. CDNS_MCP_INT_SLAVE_RSVD
  12477. CDNS_MCP_INT_TXE
  12478. CDNS_MCP_INT_TXF
  12479. CDNS_MCP_INT_WAKEUP
  12480. CDNS_MCP_PDI_STAT
  12481. CDNS_MCP_PHYCTRL
  12482. CDNS_MCP_PORT_INTSTAT
  12483. CDNS_MCP_RESP_ACK
  12484. CDNS_MCP_RESP_BASE
  12485. CDNS_MCP_RESP_NACK
  12486. CDNS_MCP_RESP_RDATA
  12487. CDNS_MCP_RX_FIFO_AVAIL
  12488. CDNS_MCP_SLAVE_INTMASK0
  12489. CDNS_MCP_SLAVE_INTMASK0_MASK
  12490. CDNS_MCP_SLAVE_INTMASK1
  12491. CDNS_MCP_SLAVE_INTMASK1_MASK
  12492. CDNS_MCP_SLAVE_INTSTAT0
  12493. CDNS_MCP_SLAVE_INTSTAT1
  12494. CDNS_MCP_SLAVE_INTSTAT_ALERT
  12495. CDNS_MCP_SLAVE_INTSTAT_ATTACHED
  12496. CDNS_MCP_SLAVE_INTSTAT_NPRESENT
  12497. CDNS_MCP_SLAVE_INTSTAT_RESERVED
  12498. CDNS_MCP_SLAVE_STAT
  12499. CDNS_MCP_SLAVE_STATUS_BITS
  12500. CDNS_MCP_SLAVE_STATUS_NUM
  12501. CDNS_MCP_SLAVE_STAT_MASK
  12502. CDNS_MCP_SSPSTAT
  12503. CDNS_MCP_SSP_CTRL0
  12504. CDNS_MCP_SSP_CTRL1
  12505. CDNS_MCP_STAT
  12506. CDNS_MCP_STAT_ACTIVE_BANK
  12507. CDNS_MCP_STAT_CLK_STOP
  12508. CDNS_PCIE_AT_BASE
  12509. CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR0
  12510. CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1
  12511. CDNS_PCIE_AT_IB_RP_BAR_ADDR0
  12512. CDNS_PCIE_AT_IB_RP_BAR_ADDR0_NBITS
  12513. CDNS_PCIE_AT_IB_RP_BAR_ADDR0_NBITS_MASK
  12514. CDNS_PCIE_AT_IB_RP_BAR_ADDR1
  12515. CDNS_PCIE_AT_LINKDOWN
  12516. CDNS_PCIE_AT_OB_REGION_CPU_ADDR0
  12517. CDNS_PCIE_AT_OB_REGION_CPU_ADDR0_NBITS
  12518. CDNS_PCIE_AT_OB_REGION_CPU_ADDR0_NBITS_MASK
  12519. CDNS_PCIE_AT_OB_REGION_CPU_ADDR1
  12520. CDNS_PCIE_AT_OB_REGION_DESC0
  12521. CDNS_PCIE_AT_OB_REGION_DESC0_DEVFN
  12522. CDNS_PCIE_AT_OB_REGION_DESC0_DEVFN_MASK
  12523. CDNS_PCIE_AT_OB_REGION_DESC0_HARDCODED_RID
  12524. CDNS_PCIE_AT_OB_REGION_DESC0_TYPE_CONF_TYPE0
  12525. CDNS_PCIE_AT_OB_REGION_DESC0_TYPE_CONF_TYPE1
  12526. CDNS_PCIE_AT_OB_REGION_DESC0_TYPE_IO
  12527. CDNS_PCIE_AT_OB_REGION_DESC0_TYPE_MASK
  12528. CDNS_PCIE_AT_OB_REGION_DESC0_TYPE_MEM
  12529. CDNS_PCIE_AT_OB_REGION_DESC0_TYPE_NORMAL_MSG
  12530. CDNS_PCIE_AT_OB_REGION_DESC0_TYPE_VENDOR_MSG
  12531. CDNS_PCIE_AT_OB_REGION_DESC1
  12532. CDNS_PCIE_AT_OB_REGION_DESC1_BUS
  12533. CDNS_PCIE_AT_OB_REGION_DESC1_BUS_MASK
  12534. CDNS_PCIE_AT_OB_REGION_PCI_ADDR0
  12535. CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_BUS
  12536. CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_BUS_MASK
  12537. CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_DEVFN
  12538. CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_DEVFN_MASK
  12539. CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_NBITS
  12540. CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_NBITS_MASK
  12541. CDNS_PCIE_AT_OB_REGION_PCI_ADDR1
  12542. CDNS_PCIE_EP_FUNC_BASE
  12543. CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET
  12544. CDNS_PCIE_EP_IRQ_PCI_ADDR_LEGACY
  12545. CDNS_PCIE_EP_IRQ_PCI_ADDR_NONE
  12546. CDNS_PCIE_EP_MIN_APERTURE
  12547. CDNS_PCIE_LM_BAR_CFG_CTRL_DISABLED
  12548. CDNS_PCIE_LM_BAR_CFG_CTRL_IO_32BITS
  12549. CDNS_PCIE_LM_BAR_CFG_CTRL_MEM_32BITS
  12550. CDNS_PCIE_LM_BAR_CFG_CTRL_MEM_64BITS
  12551. CDNS_PCIE_LM_BAR_CFG_CTRL_PREFETCH_MEM_32BITS
  12552. CDNS_PCIE_LM_BAR_CFG_CTRL_PREFETCH_MEM_64BITS
  12553. CDNS_PCIE_LM_BASE
  12554. CDNS_PCIE_LM_EP_FUNC_BAR_CFG0
  12555. CDNS_PCIE_LM_EP_FUNC_BAR_CFG1
  12556. CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE
  12557. CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE_MASK
  12558. CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_CTRL
  12559. CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_CTRL_MASK
  12560. CDNS_PCIE_LM_EP_FUNC_CFG
  12561. CDNS_PCIE_LM_EP_ID
  12562. CDNS_PCIE_LM_EP_ID_BUS_MASK
  12563. CDNS_PCIE_LM_EP_ID_BUS_SHIFT
  12564. CDNS_PCIE_LM_EP_ID_DEV_MASK
  12565. CDNS_PCIE_LM_EP_ID_DEV_SHIFT
  12566. CDNS_PCIE_LM_ID
  12567. CDNS_PCIE_LM_ID_SUBSYS
  12568. CDNS_PCIE_LM_ID_SUBSYS_MASK
  12569. CDNS_PCIE_LM_ID_SUBSYS_SHIFT
  12570. CDNS_PCIE_LM_ID_VENDOR
  12571. CDNS_PCIE_LM_ID_VENDOR_MASK
  12572. CDNS_PCIE_LM_ID_VENDOR_SHIFT
  12573. CDNS_PCIE_LM_RC_BAR_CFG
  12574. CDNS_PCIE_LM_RC_BAR_CFG_BAR0_APERTURE
  12575. CDNS_PCIE_LM_RC_BAR_CFG_BAR0_APERTURE_MASK
  12576. CDNS_PCIE_LM_RC_BAR_CFG_BAR0_CTRL
  12577. CDNS_PCIE_LM_RC_BAR_CFG_BAR0_CTRL_MASK
  12578. CDNS_PCIE_LM_RC_BAR_CFG_BAR1_APERTURE
  12579. CDNS_PCIE_LM_RC_BAR_CFG_BAR1_APERTURE_MASK
  12580. CDNS_PCIE_LM_RC_BAR_CFG_BAR1_CTRL
  12581. CDNS_PCIE_LM_RC_BAR_CFG_BAR1_CTRL_MASK
  12582. CDNS_PCIE_LM_RC_BAR_CFG_CHECK_ENABLE
  12583. CDNS_PCIE_LM_RC_BAR_CFG_IO_16BITS
  12584. CDNS_PCIE_LM_RC_BAR_CFG_IO_32BITS
  12585. CDNS_PCIE_LM_RC_BAR_CFG_IO_ENABLE
  12586. CDNS_PCIE_LM_RC_BAR_CFG_PREFETCH_MEM_32BITS
  12587. CDNS_PCIE_LM_RC_BAR_CFG_PREFETCH_MEM_64BITS
  12588. CDNS_PCIE_LM_RC_BAR_CFG_PREFETCH_MEM_ENABLE
  12589. CDNS_PCIE_LM_RP_RID
  12590. CDNS_PCIE_LM_RP_RID_
  12591. CDNS_PCIE_LM_RP_RID_MASK
  12592. CDNS_PCIE_LM_RP_RID_SHIFT
  12593. CDNS_PCIE_MSG_NO_DATA
  12594. CDNS_PCIE_NORMAL_MSG_CODE
  12595. CDNS_PCIE_NORMAL_MSG_CODE_MASK
  12596. CDNS_PCIE_NORMAL_MSG_ROUTING
  12597. CDNS_PCIE_NORMAL_MSG_ROUTING_MASK
  12598. CDNS_PCIE_RP_BASE
  12599. CDNS_PCM_PDI_OFFSET
  12600. CDNS_PDI_CONFIG
  12601. CDNS_PDI_CONFIG_CHANNEL
  12602. CDNS_PDI_CONFIG_PORT
  12603. CDNS_PDI_CONFIG_SOFT_RESET
  12604. CDNS_PDM_PDI_OFFSET
  12605. CDNS_PORTCTRL
  12606. CDNS_PORTCTRL_BANK_INVERT
  12607. CDNS_PORTCTRL_DIRN
  12608. CDNS_PORT_OFFSET
  12609. CDNS_REVISION_V0
  12610. CDNS_REVISION_V1
  12611. CDNS_RID
  12612. CDNS_RTC_AEI_ALRM
  12613. CDNS_RTC_AEI_DATE
  12614. CDNS_RTC_AEI_HOS
  12615. CDNS_RTC_AEI_HOUR
  12616. CDNS_RTC_AEI_MIN
  12617. CDNS_RTC_AEI_MNTH
  12618. CDNS_RTC_AEI_SEC
  12619. CDNS_RTC_AENR
  12620. CDNS_RTC_CALAR
  12621. CDNS_RTC_CALR
  12622. CDNS_RTC_CAL_C
  12623. CDNS_RTC_CAL_CH
  12624. CDNS_RTC_CAL_D
  12625. CDNS_RTC_CAL_DAY
  12626. CDNS_RTC_CAL_M
  12627. CDNS_RTC_CAL_Y
  12628. CDNS_RTC_CTLR
  12629. CDNS_RTC_CTLR_CAL
  12630. CDNS_RTC_CTLR_TIME
  12631. CDNS_RTC_CTLR_TIME_CAL
  12632. CDNS_RTC_EFLR
  12633. CDNS_RTC_HMR
  12634. CDNS_RTC_IDISR
  12635. CDNS_RTC_IENR
  12636. CDNS_RTC_IMSKR
  12637. CDNS_RTC_KRTCR
  12638. CDNS_RTC_KRTCR_KRTC
  12639. CDNS_RTC_MAX_REGS_TRIES
  12640. CDNS_RTC_STSR
  12641. CDNS_RTC_STSR_VC
  12642. CDNS_RTC_STSR_VCA
  12643. CDNS_RTC_STSR_VT
  12644. CDNS_RTC_STSR_VTA
  12645. CDNS_RTC_STSR_VTA_VCA
  12646. CDNS_RTC_STSR_VT_VC
  12647. CDNS_RTC_TIMAR
  12648. CDNS_RTC_TIME_CH
  12649. CDNS_RTC_TIME_H
  12650. CDNS_RTC_TIME_HR
  12651. CDNS_RTC_TIME_M
  12652. CDNS_RTC_TIME_PM
  12653. CDNS_RTC_TIME_S
  12654. CDNS_RTC_TIMR
  12655. CDNS_SCP_RX_FIFOLEVEL
  12656. CDNS_SDI_INPUT
  12657. CDNS_SPI_BAUD_DIV_MAX
  12658. CDNS_SPI_BAUD_DIV_MIN
  12659. CDNS_SPI_BAUD_DIV_SHIFT
  12660. CDNS_SPI_CR
  12661. CDNS_SPI_CR_BAUD_DIV
  12662. CDNS_SPI_CR_BAUD_DIV_4
  12663. CDNS_SPI_CR_CPHA
  12664. CDNS_SPI_CR_CPOL
  12665. CDNS_SPI_CR_DEFAULT
  12666. CDNS_SPI_CR_MANSTRT
  12667. CDNS_SPI_CR_MANSTRTEN
  12668. CDNS_SPI_CR_MSTREN
  12669. CDNS_SPI_CR_PERI_SEL
  12670. CDNS_SPI_CR_SSCTRL
  12671. CDNS_SPI_CR_SSFORCE
  12672. CDNS_SPI_DEFAULT_NUM_CS
  12673. CDNS_SPI_DR
  12674. CDNS_SPI_ER
  12675. CDNS_SPI_ER_DISABLE
  12676. CDNS_SPI_ER_ENABLE
  12677. CDNS_SPI_FIFO_DEPTH
  12678. CDNS_SPI_IDR
  12679. CDNS_SPI_IER
  12680. CDNS_SPI_IMR
  12681. CDNS_SPI_ISR
  12682. CDNS_SPI_IXR_ALL
  12683. CDNS_SPI_IXR_DEFAULT
  12684. CDNS_SPI_IXR_MODF
  12685. CDNS_SPI_IXR_RXNEMTY
  12686. CDNS_SPI_IXR_TXFULL
  12687. CDNS_SPI_IXR_TXOW
  12688. CDNS_SPI_NAME
  12689. CDNS_SPI_RXD
  12690. CDNS_SPI_SICR
  12691. CDNS_SPI_SS0
  12692. CDNS_SPI_SS_SHIFT
  12693. CDNS_SPI_THLD
  12694. CDNS_SPI_TXD
  12695. CDNS_TX_TIMEOUT
  12696. CDNS_UART_BAUDDIV
  12697. CDNS_UART_BAUDGEN
  12698. CDNS_UART_BDIV_MAX
  12699. CDNS_UART_BDIV_MIN
  12700. CDNS_UART_CD_MAX
  12701. CDNS_UART_CR
  12702. CDNS_UART_CR_RST_TO
  12703. CDNS_UART_CR_RXRST
  12704. CDNS_UART_CR_RX_DIS
  12705. CDNS_UART_CR_RX_EN
  12706. CDNS_UART_CR_STARTBRK
  12707. CDNS_UART_CR_STOPBRK
  12708. CDNS_UART_CR_TXRST
  12709. CDNS_UART_CR_TX_DIS
  12710. CDNS_UART_CR_TX_EN
  12711. CDNS_UART_FIFO
  12712. CDNS_UART_FIFO_SIZE
  12713. CDNS_UART_FLOWDEL
  12714. CDNS_UART_IDR
  12715. CDNS_UART_IER
  12716. CDNS_UART_IMR
  12717. CDNS_UART_IRRX_PWIDTH
  12718. CDNS_UART_IRTX_PWIDTH
  12719. CDNS_UART_ISR
  12720. CDNS_UART_ISR_RXEMPTY
  12721. CDNS_UART_IXR_BRK
  12722. CDNS_UART_IXR_FRAMING
  12723. CDNS_UART_IXR_OVERRUN
  12724. CDNS_UART_IXR_PARITY
  12725. CDNS_UART_IXR_RXEMPTY
  12726. CDNS_UART_IXR_RXFULL
  12727. CDNS_UART_IXR_RXMASK
  12728. CDNS_UART_IXR_RXTRIG
  12729. CDNS_UART_IXR_TOUT
  12730. CDNS_UART_IXR_TXEMPTY
  12731. CDNS_UART_IXR_TXFULL
  12732. CDNS_UART_MAJOR
  12733. CDNS_UART_MINOR
  12734. CDNS_UART_MODEMCR
  12735. CDNS_UART_MODEMCR_DTR
  12736. CDNS_UART_MODEMCR_FCM
  12737. CDNS_UART_MODEMCR_RTS
  12738. CDNS_UART_MODEMSR
  12739. CDNS_UART_MR
  12740. CDNS_UART_MR_CHARLEN_6_BIT
  12741. CDNS_UART_MR_CHARLEN_7_BIT
  12742. CDNS_UART_MR_CHARLEN_8_BIT
  12743. CDNS_UART_MR_CHMODE_L_LOOP
  12744. CDNS_UART_MR_CHMODE_MASK
  12745. CDNS_UART_MR_CHMODE_NORM
  12746. CDNS_UART_MR_CLKSEL
  12747. CDNS_UART_MR_PARITY_EVEN
  12748. CDNS_UART_MR_PARITY_MARK
  12749. CDNS_UART_MR_PARITY_NONE
  12750. CDNS_UART_MR_PARITY_ODD
  12751. CDNS_UART_MR_PARITY_SPACE
  12752. CDNS_UART_MR_STOPMODE_1_BIT
  12753. CDNS_UART_MR_STOPMODE_2_BIT
  12754. CDNS_UART_NAME
  12755. CDNS_UART_NR_PORTS
  12756. CDNS_UART_REGISTER_SPACE
  12757. CDNS_UART_RXBS
  12758. CDNS_UART_RXBS_BRK
  12759. CDNS_UART_RXBS_FRAMING
  12760. CDNS_UART_RXBS_PARITY
  12761. CDNS_UART_RXBS_SUPPORT
  12762. CDNS_UART_RXTOUT
  12763. CDNS_UART_RXWM
  12764. CDNS_UART_RX_IRQS
  12765. CDNS_UART_SR
  12766. CDNS_UART_SR_RXEMPTY
  12767. CDNS_UART_SR_RXTRIG
  12768. CDNS_UART_SR_TACTIVE
  12769. CDNS_UART_SR_TXEMPTY
  12770. CDNS_UART_SR_TXFULL
  12771. CDNS_UART_TTY_NAME
  12772. CDNS_UART_TXWM
  12773. CDNS_UFS_REG_HCLKDIV
  12774. CDNS_UFS_REG_PHY_XCFGD1
  12775. CDNS_VENDOR_ID
  12776. CDNS_WDT_CCR_CRV_MASK
  12777. CDNS_WDT_CCR_OFFSET
  12778. CDNS_WDT_CLK_10MHZ
  12779. CDNS_WDT_CLK_75MHZ
  12780. CDNS_WDT_COUNTER_MAX
  12781. CDNS_WDT_COUNTER_VALUE_DIVISOR
  12782. CDNS_WDT_DEFAULT_TIMEOUT
  12783. CDNS_WDT_MAX_TIMEOUT
  12784. CDNS_WDT_MIN_TIMEOUT
  12785. CDNS_WDT_PRESCALE_4096
  12786. CDNS_WDT_PRESCALE_512
  12787. CDNS_WDT_PRESCALE_64
  12788. CDNS_WDT_PRESCALE_SELECT_4096
  12789. CDNS_WDT_PRESCALE_SELECT_512
  12790. CDNS_WDT_PRESCALE_SELECT_64
  12791. CDNS_WDT_REGISTER_ACCESS_KEY
  12792. CDNS_WDT_RESTART_KEY
  12793. CDNS_WDT_RESTART_OFFSET
  12794. CDNS_WDT_SR_OFFSET
  12795. CDNS_WDT_ZMR_IRQEN_MASK
  12796. CDNS_WDT_ZMR_OFFSET
  12797. CDNS_WDT_ZMR_RSTEN_MASK
  12798. CDNS_WDT_ZMR_RSTLEN_16
  12799. CDNS_WDT_ZMR_WDEN_MASK
  12800. CDNS_WDT_ZMR_ZKEY_VAL
  12801. CDN_DPCD_TIMEOUT_MS
  12802. CDN_DP_FIRMWARE
  12803. CDN_DP_MAX_LINK_RATE
  12804. CDN_DP_SPDIF_CLK
  12805. CDN_FW_TIMEOUT_MS
  12806. CDO_AUTO_CLOSE
  12807. CDO_AUTO_EJECT
  12808. CDO_CHECK_TYPE
  12809. CDO_LOCK
  12810. CDO_USE_FFLAGS
  12811. CDP
  12812. CDP_DST_VALID_INC
  12813. CDP_DST_VALID_RELOAD
  12814. CDP_DST_VALID_REUSE
  12815. CDP_FAST
  12816. CDP_NTYPE_TYPE1
  12817. CDP_NTYPE_TYPE2
  12818. CDP_NTYPE_TYPE3
  12819. CDP_SRC_VALID_INC
  12820. CDP_SRC_VALID_RELOAD
  12821. CDP_SRC_VALID_REUSE
  12822. CDP_TMODE_LLIST
  12823. CDP_TMODE_NORMAL
  12824. CDP_TYPE
  12825. CDR1_CNF
  12826. CDR1_ERR
  12827. CDR1_IER
  12828. CDR1_IND
  12829. CDR1_REQ
  12830. CDR2_CNF_ARB_ERROR
  12831. CDR2_CNF_BAD_REQ
  12832. CDR2_CNF_BAD_TIMING
  12833. CDR2_CNF_CEC_ACCESS
  12834. CDR2_CNF_NACK_ADDR
  12835. CDR2_CNF_NACK_DATA
  12836. CDR2_CNF_OFF_STATE
  12837. CDR2_CNF_SUCCESS
  12838. CDRATIO_X1
  12839. CDRATIO_X2
  12840. CDRATIO_X4
  12841. CDRATIO_X8
  12842. CDRATIO_x1
  12843. CDRATIO_x2
  12844. CDRATIO_x4
  12845. CDRATIO_x8
  12846. CDRESUMECTL
  12847. CDROMAUDIOBUFSIZ
  12848. CDROMCLOSETRAY
  12849. CDROMController
  12850. CDROMEJECT
  12851. CDROMEJECT_SW
  12852. CDROMGETSPINDOWN
  12853. CDROMMULTISESSION
  12854. CDROMPAUSE
  12855. CDROMPLAYBLK
  12856. CDROMPLAYMSF
  12857. CDROMPLAYTRKIND
  12858. CDROMREADALL
  12859. CDROMREADAUDIO
  12860. CDROMREADCOOKED
  12861. CDROMREADMODE1
  12862. CDROMREADMODE2
  12863. CDROMREADRAW
  12864. CDROMREADTOCENTRY
  12865. CDROMREADTOCHDR
  12866. CDROMRESET
  12867. CDROMRESUME
  12868. CDROMSEEK
  12869. CDROMSETSPINDOWN
  12870. CDROMSTART
  12871. CDROMSTOP
  12872. CDROMSUBCHNL
  12873. CDROMVOLCTRL
  12874. CDROMVOLREAD
  12875. CDROM_AUDIO_COMPLETED
  12876. CDROM_AUDIO_ERROR
  12877. CDROM_AUDIO_INVALID
  12878. CDROM_AUDIO_NO_STATUS
  12879. CDROM_AUDIO_PAUSED
  12880. CDROM_AUDIO_PLAY
  12881. CDROM_CAN
  12882. CDROM_CHANGER_NSLOTS
  12883. CDROM_CLEAR_OPTIONS
  12884. CDROM_DATA_TRACK
  12885. CDROM_DEBUG
  12886. CDROM_DEF_TIMEOUT
  12887. CDROM_DISC_STATUS
  12888. CDROM_DRIVE_STATUS
  12889. CDROM_GET_CAPABILITY
  12890. CDROM_GET_MCN
  12891. CDROM_GET_UPC
  12892. CDROM_LAST_WRITTEN
  12893. CDROM_LBA
  12894. CDROM_LEADOUT
  12895. CDROM_LOCKDOOR
  12896. CDROM_MAX_SLOTS
  12897. CDROM_MEDIA_CHANGED
  12898. CDROM_MSF
  12899. CDROM_NEXT_WRITABLE
  12900. CDROM_PACKET_SIZE
  12901. CDROM_SELECT_DISC
  12902. CDROM_SELECT_SPEED
  12903. CDROM_SEND_PACKET
  12904. CDROM_SET_OPTIONS
  12905. CDROM_STR_SIZE
  12906. CDRU_STRAP_DATA_LSW_OFFSET
  12907. CDRXD
  12908. CDR_ACD_BASE_ADDR_HI
  12909. CDR_ACD_BASE_ADDR_LO
  12910. CDR_ALIGN_DET
  12911. CDR_BASE_ADDR_HI
  12912. CDR_BASE_ADDR_LO
  12913. CDR_CBP
  12914. CDR_CFG
  12915. CDR_CLKOUT_MASK
  12916. CDR_CLK_OFF
  12917. CDR_CPD_TRIM
  12918. CDR_CPF_TRIM
  12919. CDR_DATA_BASE_ADDR_HI
  12920. CDR_DATA_BASE_ADDR_LO
  12921. CDR_DEFAULT
  12922. CDR_DESC_SIZE
  12923. CDR_DMA_CFG
  12924. CDR_ISO_EN
  12925. CDR_MAX_CNT
  12926. CDR_PD_SEL_MODE0
  12927. CDR_PELICAN
  12928. CDR_PREP_COUNT
  12929. CDR_PREP_PNTR
  12930. CDR_PROC_COUNT
  12931. CDR_PROC_PNTR
  12932. CDR_PWR_ON
  12933. CDR_RING_SIZE
  12934. CDR_RXINPEN
  12935. CDR_SELEXT_MASK
  12936. CDR_SELEXT_SHIFT
  12937. CDR_STAT
  12938. CDR_THRESH
  12939. CDR_TRIM
  12940. CDSA
  12941. CDSL_CURRENT
  12942. CDSL_NONE
  12943. CDSN_CTRL_ALE
  12944. CDSN_CTRL_CE
  12945. CDSN_CTRL_CLE
  12946. CDSN_CTRL_ECC_IO
  12947. CDSN_CTRL_FLASH_IO
  12948. CDSN_CTRL_FR_B
  12949. CDSN_CTRL_FR_B0
  12950. CDSN_CTRL_FR_B1
  12951. CDSN_CTRL_FR_B_MASK
  12952. CDSN_CTRL_MSK
  12953. CDSN_CTRL_WP
  12954. CDSO
  12955. CDSP_DOMAIN_ID
  12956. CDSP_MAGIC
  12957. CDSRCS
  12958. CDSRC_E
  12959. CDS_AUDIO
  12960. CDS_DATA_1
  12961. CDS_DATA_2
  12962. CDS_DISC_OK
  12963. CDS_DRIVE_NOT_READY
  12964. CDS_MIXED
  12965. CDS_NO_DISC
  12966. CDS_NO_INFO
  12967. CDS_TRAY_OPEN
  12968. CDS_XA_2_1
  12969. CDS_XA_2_2
  12970. CDT
  12971. CDT0_RPC_MASK
  12972. CDT0_RPC_SHIFT
  12973. CDT1_BS_ISOC_MASK
  12974. CDT1_BS_ISOC_SHIFT
  12975. CDT2DT
  12976. CDT3_BA_SHIFT
  12977. CDT3_BD_ISOC_MASK
  12978. CDT3_BD_MASK
  12979. CDT3_BD_SHIFT
  12980. CDTC_EN_BITS
  12981. CDTC_EN_OFF
  12982. CDTC_PAIR_BIT
  12983. CDTC_PAIR_OFF
  12984. CDTS_STATUS_BITS
  12985. CDTS_STATUS_INVALID
  12986. CDTS_STATUS_NORMAL
  12987. CDTS_STATUS_OFF
  12988. CDTS_STATUS_OPEN
  12989. CDTS_STATUS_SHORT
  12990. CDTTOIF
  12991. CDT_BLK
  12992. CDT_CHR
  12993. CDT_DIR
  12994. CDT_FIFO
  12995. CDT_LNK
  12996. CDT_REG
  12997. CDT_SOCK
  12998. CDT_UNKNOWN
  12999. CDT_WHT
  13000. CDU31A_CDROM_MAJOR
  13001. CDU535_CDROM_MAJOR
  13002. CDUC_BLK
  13003. CDUC_BLOCK_WASTE_MASK
  13004. CDUC_BLOCK_WASTE_SHIFT
  13005. CDUC_CXT_SIZE_MASK
  13006. CDUC_CXT_SIZE_SHIFT
  13007. CDUC_NCIB_MASK
  13008. CDUC_NCIB_SHIFT
  13009. CDUMP_MAX_COMP_BUF_SIZE
  13010. CDUTY_CDC
  13011. CDUT_FL_SEG_BLK
  13012. CDUT_SEG_ALIGNMET
  13013. CDUT_SEG_ALIGNMET_IN_BYTES
  13014. CDUT_SEG_BLK
  13015. CDUT_TYPE0_BLOCK_WASTE_MASK
  13016. CDUT_TYPE0_BLOCK_WASTE_SHIFT
  13017. CDUT_TYPE0_CXT_SIZE_MASK
  13018. CDUT_TYPE0_CXT_SIZE_SHIFT
  13019. CDUT_TYPE0_NCIB_MASK
  13020. CDUT_TYPE0_NCIB_SHIFT
  13021. CDUT_TYPE1_BLOCK_WASTE_MASK
  13022. CDUT_TYPE1_BLOCK_WASTE_SHIFT
  13023. CDUT_TYPE1_CXT_SIZE_MASK
  13024. CDUT_TYPE1_CXT_SIZE_SHIFT
  13025. CDUT_TYPE1_NCIB_MASK
  13026. CDUT_TYPE1_NCIB_SHIFT
  13027. CDU_CONTEXT_VALIDATION_CFG_ENABLE_SHIFT
  13028. CDU_CONTEXT_VALIDATION_CFG_USE_ACTIVE
  13029. CDU_CONTEXT_VALIDATION_CFG_USE_CID
  13030. CDU_CONTEXT_VALIDATION_CFG_USE_REGION
  13031. CDU_CONTEXT_VALIDATION_CFG_USE_TYPE
  13032. CDU_CONTEXT_VALIDATION_CFG_VALIDATION_TYPE_SHIFT
  13033. CDU_CRC8
  13034. CDU_ILT_PAGE_SZ
  13035. CDU_ILT_PAGE_SZ_HW
  13036. CDU_REGION_NUMBER_UCM_AG
  13037. CDU_REGION_NUMBER_XCM_AG
  13038. CDU_REG_CCFC_CTX_VALID0
  13039. CDU_REG_CCFC_CTX_VALID1
  13040. CDU_REG_CDU_CHK_MASK0
  13041. CDU_REG_CDU_CHK_MASK1
  13042. CDU_REG_CDU_CONTROL0
  13043. CDU_REG_CDU_DEBUG
  13044. CDU_REG_CDU_GLOBAL_PARAMS
  13045. CDU_REG_CDU_INT_MASK
  13046. CDU_REG_CDU_INT_STS
  13047. CDU_REG_CDU_PRTY_MASK
  13048. CDU_REG_CDU_PRTY_STS
  13049. CDU_REG_CDU_PRTY_STS_CLR
  13050. CDU_REG_CID_ADDR_PARAMS
  13051. CDU_REG_CID_ADDR_PARAMS_BLOCK_WASTE
  13052. CDU_REG_CID_ADDR_PARAMS_BLOCK_WASTE_SHIFT
  13053. CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE
  13054. CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE_SHIFT
  13055. CDU_REG_CID_ADDR_PARAMS_NCIB
  13056. CDU_REG_CID_ADDR_PARAMS_NCIB_SHIFT
  13057. CDU_REG_CID_ADDR_PARAMS_RT_OFFSET
  13058. CDU_REG_DBG_DWORD_ENABLE
  13059. CDU_REG_DBG_FORCE_FRAME
  13060. CDU_REG_DBG_FORCE_VALID
  13061. CDU_REG_DBG_SELECT
  13062. CDU_REG_DBG_SHIFT
  13063. CDU_REG_ERROR_DATA
  13064. CDU_REG_L1TT
  13065. CDU_REG_MATT
  13066. CDU_REG_MF_MODE
  13067. CDU_REG_PF_FL_SEG0_TYPE_OFFSET_RT_OFFSET
  13068. CDU_REG_PF_FL_SEG1_TYPE_OFFSET_RT_OFFSET
  13069. CDU_REG_PF_FL_SEG2_TYPE_OFFSET_RT_OFFSET
  13070. CDU_REG_PF_FL_SEG3_TYPE_OFFSET_RT_OFFSET
  13071. CDU_REG_PF_SEG0_TYPE_OFFSET_RT_OFFSET
  13072. CDU_REG_PF_SEG1_TYPE_OFFSET_RT_OFFSET
  13073. CDU_REG_PF_SEG2_TYPE_OFFSET_RT_OFFSET
  13074. CDU_REG_PF_SEG3_TYPE_OFFSET_RT_OFFSET
  13075. CDU_REG_SEGMENT0_PARAMS
  13076. CDU_REG_SEGMENT0_PARAMS_RT_OFFSET
  13077. CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK
  13078. CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK_SHIFT
  13079. CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE
  13080. CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE_SHIFT
  13081. CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE
  13082. CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE_SHIFT
  13083. CDU_REG_SEGMENT1_PARAMS
  13084. CDU_REG_SEGMENT1_PARAMS_RT_OFFSET
  13085. CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK
  13086. CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK_SHIFT
  13087. CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE
  13088. CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE_SHIFT
  13089. CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE
  13090. CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE_SHIFT
  13091. CDU_REG_TCFC_CTX_VALID0
  13092. CDU_REG_VF_FL_SEG_TYPE_OFFSET_RT_OFFSET
  13093. CDU_REG_VF_SEG_TYPE_OFFSET_RT_OFFSET
  13094. CDU_RSRVD_INVALIDATE_CONTEXT_VALUE
  13095. CDU_RSRVD_VALUE_TYPE_A
  13096. CDU_RSRVD_VALUE_TYPE_B
  13097. CDU_SEG_REG_OFFSET_MASK
  13098. CDU_SEG_REG_OFFSET_SHIFT
  13099. CDU_SEG_REG_TYPE_MASK
  13100. CDU_SEG_REG_TYPE_SHIFT
  13101. CDU_SEG_TYPE_OFFSET_REG_OFFSET_MASK
  13102. CDU_SEG_TYPE_OFFSET_REG_TYPE_SHIFT
  13103. CDU_VALIDATION_DEFAULT_CFG
  13104. CDU_VALID_DATA
  13105. CDU_VF_FL_SEG_TYPE_OFFSET_REG_OFFSET_MASK
  13106. CDU_VF_FL_SEG_TYPE_OFFSET_REG_TYPE_SHIFT
  13107. CDVO_DFT
  13108. CDVO_RCOMP
  13109. CDVO_SLEWRATE
  13110. CDVO_STRENGTH
  13111. CDVR0
  13112. CDVR1
  13113. CDV_DP_VOLTAGE_MAX
  13114. CDV_FAST_LINK_TRAIN
  13115. CDV_LIMIT_DAC_HDMI_27
  13116. CDV_LIMIT_DAC_HDMI_96
  13117. CDV_LIMIT_DP_100
  13118. CDV_LIMIT_DP_27
  13119. CDV_LIMIT_SINGLE_LVDS_100
  13120. CDV_LIMIT_SINGLE_LVDS_96
  13121. CDV_MSG_READ32
  13122. CDV_MSG_WRITE32
  13123. CD_ACT
  13124. CD_AUTO_DISABLE
  13125. CD_CHANGER
  13126. CD_CHUNK_SIZE
  13127. CD_CLOSE
  13128. CD_COUNT_TRACKS
  13129. CD_DEGLITCH_EN
  13130. CD_DEGLITCH_WIDTH
  13131. CD_DISABLE
  13132. CD_DISABLE_MASK
  13133. CD_DO_IOCTL
  13134. CD_DVD
  13135. CD_ECC_SIZE
  13136. CD_EDC_SIZE
  13137. CD_ENABLE
  13138. CD_FRAMES
  13139. CD_FRAMESIZE
  13140. CD_FRAMESIZE_RAW
  13141. CD_FRAMESIZE_RAW0
  13142. CD_FRAMESIZE_RAW1
  13143. CD_FRAMESIZE_RAWER
  13144. CD_FRAMESIZE_SUB
  13145. CD_HEAD_SIZE
  13146. CD_MASK
  13147. CD_MINS
  13148. CD_MSF_OFFSET
  13149. CD_NOTHING
  13150. CD_NUM_OF_CHUNKS
  13151. CD_OPEN
  13152. CD_PAD_CTL
  13153. CD_PART_MASK
  13154. CD_PART_MAX
  13155. CD_REG_UNREG
  13156. CD_RESUME_EN_MASK
  13157. CD_ROMD
  13158. CD_SECS
  13159. CD_SUBHEAD_SIZE
  13160. CD_SYNC_SIZE
  13161. CD_TMR_1HZ
  13162. CD_TMR_4096KHZ
  13163. CD_TMR_60th_HZ
  13164. CD_TMR_64HZ
  13165. CD_TMR_TE
  13166. CD_WARNING
  13167. CD_XA_HEAD
  13168. CD_XA_SYNC_HEAD
  13169. CD_XA_TAIL
  13170. CD_ZERO_SIZE
  13171. CDrxdState
  13172. CE
  13173. CE0_BASE_ADDRESS
  13174. CE0_ENABLE
  13175. CE1_BASE_ADDRESS
  13176. CE1_CLK_SRC
  13177. CE1_CORE_CLK
  13178. CE1_CORE_RESET
  13179. CE1_ENABLE
  13180. CE1_H_CLK
  13181. CE1_H_RESET
  13182. CE1_RESET
  13183. CE1_SLEEP_CLK
  13184. CE1_SLEEP_RESET
  13185. CE2A_MARK
  13186. CE2B_MARK
  13187. CE2_BASE_ADDRESS
  13188. CE2_CLK_SRC
  13189. CE2_CORE_CLK
  13190. CE2_CORE_RESET
  13191. CE2_H_CLK
  13192. CE2_H_RESET
  13193. CE2_RESET
  13194. CE3_BASE_ADDRESS
  13195. CE3_CLK_SRC
  13196. CE3_CORE_CLK
  13197. CE3_H_CLK
  13198. CE3_H_RESET
  13199. CE3_RESET
  13200. CE3_SLEEP_CLK
  13201. CE3_SLEEP_RESET
  13202. CE3_SRC
  13203. CE4100_PCI_I2C_DEVS
  13204. CE4100_SSCR1_CHANGE_MASK
  13205. CE4100_SSCR1_RFT
  13206. CE4100_SSCR1_RxTresh
  13207. CE4100_SSCR1_TFT
  13208. CE4100_SSCR1_TxTresh
  13209. CE4100_SSP
  13210. CE4100_SSSR_RFL_MASK
  13211. CE4100_SSSR_TFL_MASK
  13212. CE4_BASE_ADDRESS
  13213. CE5_BASE_ADDRESS
  13214. CE5_CORE_CLK
  13215. CE5_H_CLK
  13216. CE5_SRC
  13217. CE6230_H
  13218. CE6230_USB_TIMEOUT
  13219. CE6_BASE_ADDRESS
  13220. CE7_BASE_ADDRESS
  13221. CEA
  13222. CEA861_AUDIO_INFOFRAME_DB1CC
  13223. CEA861_AUDIO_INFOFRAME_DB1CT
  13224. CEA861_AUDIO_INFOFRAME_DB1CT_AAC
  13225. CEA861_AUDIO_INFOFRAME_DB1CT_AC3
  13226. CEA861_AUDIO_INFOFRAME_DB1CT_ATRAC
  13227. CEA861_AUDIO_INFOFRAME_DB1CT_DOLBY_DIG_PLUS
  13228. CEA861_AUDIO_INFOFRAME_DB1CT_DST
  13229. CEA861_AUDIO_INFOFRAME_DB1CT_DTS
  13230. CEA861_AUDIO_INFOFRAME_DB1CT_DTS_HD
  13231. CEA861_AUDIO_INFOFRAME_DB1CT_FROM_STREAM
  13232. CEA861_AUDIO_INFOFRAME_DB1CT_IEC60958
  13233. CEA861_AUDIO_INFOFRAME_DB1CT_MAT
  13234. CEA861_AUDIO_INFOFRAME_DB1CT_MP3
  13235. CEA861_AUDIO_INFOFRAME_DB1CT_MPEG1
  13236. CEA861_AUDIO_INFOFRAME_DB1CT_MPEG2_MULTICH
  13237. CEA861_AUDIO_INFOFRAME_DB1CT_ONEBIT
  13238. CEA861_AUDIO_INFOFRAME_DB1CT_WMA_PRO
  13239. CEA861_AUDIO_INFOFRAME_DB2SF
  13240. CEA861_AUDIO_INFOFRAME_DB2SF_176400
  13241. CEA861_AUDIO_INFOFRAME_DB2SF_192000
  13242. CEA861_AUDIO_INFOFRAME_DB2SF_32000
  13243. CEA861_AUDIO_INFOFRAME_DB2SF_44100
  13244. CEA861_AUDIO_INFOFRAME_DB2SF_48000
  13245. CEA861_AUDIO_INFOFRAME_DB2SF_88200
  13246. CEA861_AUDIO_INFOFRAME_DB2SF_96000
  13247. CEA861_AUDIO_INFOFRAME_DB2SF_FROM_STREAM
  13248. CEA861_AUDIO_INFOFRAME_DB2SS
  13249. CEA861_AUDIO_INFOFRAME_DB2SS_16BIT
  13250. CEA861_AUDIO_INFOFRAME_DB2SS_20BIT
  13251. CEA861_AUDIO_INFOFRAME_DB2SS_24BIT
  13252. CEA861_AUDIO_INFOFRAME_DB2SS_FROM_STREAM
  13253. CEA861_AUDIO_INFOFRAME_DB5_DM_INH
  13254. CEA861_AUDIO_INFOFRAME_DB5_DM_INH_PERMITTED
  13255. CEA861_AUDIO_INFOFRAME_DB5_DM_INH_PROHIBITED
  13256. CEA861_AUDIO_INFOFRAME_DB5_LSV
  13257. CEA_EDID_VER_CEA861
  13258. CEA_EDID_VER_CEA861A
  13259. CEA_EDID_VER_CEA861BCD
  13260. CEA_EDID_VER_NONE
  13261. CEA_EDID_VER_RESERVED
  13262. CEA_ESTACK_BOT
  13263. CEA_ESTACK_OFFS
  13264. CEA_ESTACK_PAGES
  13265. CEA_ESTACK_SIZE
  13266. CEA_ESTACK_TOP
  13267. CEA_EXT
  13268. CEB_EN
  13269. CEC
  13270. CEC0_REG4_MASK
  13271. CEC1_REG4_MASK
  13272. CECADD
  13273. CECADDRH_ADDRH
  13274. CECAR_SRCID_MASK_CCF1
  13275. CECAR_SRCID_MASK_CCF2
  13276. CECAR_SRCID_SHIFT_CCF1
  13277. CECAR_SRCID_SHIFT_CCF2
  13278. CECAR_UVT
  13279. CECAR_VAL
  13280. CECB_CLK_CNTL_BYPASS_EN
  13281. CECB_CLK_CNTL_DUAL_EN
  13282. CECB_CLK_CNTL_INPUT_EN
  13283. CECB_CLK_CNTL_M1
  13284. CECB_CLK_CNTL_M2
  13285. CECB_CLK_CNTL_N1
  13286. CECB_CLK_CNTL_N2
  13287. CECB_CLK_CNTL_OUTPUT_EN
  13288. CECB_CLK_CNTL_REG0
  13289. CECB_CLK_CNTL_REG1
  13290. CECB_CTRL
  13291. CECB_CTRL2
  13292. CECB_CTRL2_RISE_DEL_MAX
  13293. CECB_CTRL_SEND
  13294. CECB_CTRL_TYPE
  13295. CECB_CTRL_TYPE_NEW
  13296. CECB_CTRL_TYPE_NEXT
  13297. CECB_CTRL_TYPE_RETRY
  13298. CECB_GEN_CNTL_CLK_CTRL_MASK
  13299. CECB_GEN_CNTL_CLK_DISABLE
  13300. CECB_GEN_CNTL_CLK_ENABLE
  13301. CECB_GEN_CNTL_CLK_ENABLE_DBG
  13302. CECB_GEN_CNTL_FILTER_DEL
  13303. CECB_GEN_CNTL_FILTER_TICK_100US
  13304. CECB_GEN_CNTL_FILTER_TICK_10US
  13305. CECB_GEN_CNTL_FILTER_TICK_125NS
  13306. CECB_GEN_CNTL_FILTER_TICK_1US
  13307. CECB_GEN_CNTL_FILTER_TICK_SEL
  13308. CECB_GEN_CNTL_REG
  13309. CECB_GEN_CNTL_RESET
  13310. CECB_GEN_CNTL_SYS_CLK_EN
  13311. CECB_INTR_ARB_LOSS
  13312. CECB_INTR_CLR_REG
  13313. CECB_INTR_DONE
  13314. CECB_INTR_EOM
  13315. CECB_INTR_FOLLOWER_ERR
  13316. CECB_INTR_INITIATOR_ERR
  13317. CECB_INTR_MASK
  13318. CECB_INTR_MASKN_REG
  13319. CECB_INTR_NACK
  13320. CECB_INTR_STAT_REG
  13321. CECB_INTR_WAKE_UP
  13322. CECB_LADD_HIGH
  13323. CECB_LADD_LOW
  13324. CECB_LOCK_BUF
  13325. CECB_LOCK_BUF_EN
  13326. CECB_RW_ADDR
  13327. CECB_RW_BUS_BUSY
  13328. CECB_RW_RD_DATA
  13329. CECB_RW_REG
  13330. CECB_RW_WRITE_EN
  13331. CECB_RW_WR_DATA
  13332. CECB_RX_CNT
  13333. CECB_RX_DATA00
  13334. CECB_RX_DATA01
  13335. CECB_RX_DATA02
  13336. CECB_RX_DATA03
  13337. CECB_RX_DATA04
  13338. CECB_RX_DATA05
  13339. CECB_RX_DATA06
  13340. CECB_RX_DATA07
  13341. CECB_RX_DATA08
  13342. CECB_RX_DATA09
  13343. CECB_RX_DATA10
  13344. CECB_RX_DATA11
  13345. CECB_RX_DATA12
  13346. CECB_RX_DATA13
  13347. CECB_RX_DATA14
  13348. CECB_RX_DATA15
  13349. CECB_STAT0
  13350. CECB_TX_CNT
  13351. CECB_TX_DATA00
  13352. CECB_TX_DATA01
  13353. CECB_TX_DATA02
  13354. CECB_TX_DATA03
  13355. CECB_TX_DATA04
  13356. CECB_TX_DATA05
  13357. CECB_TX_DATA06
  13358. CECB_TX_DATA07
  13359. CECB_TX_DATA08
  13360. CECB_TX_DATA09
  13361. CECB_TX_DATA10
  13362. CECB_TX_DATA11
  13363. CECB_TX_DATA12
  13364. CECB_TX_DATA13
  13365. CECB_TX_DATA14
  13366. CECB_TX_DATA15
  13367. CECB_WAKEUPCTRL
  13368. CECCR
  13369. CECC_EXCP_DETECTED
  13370. CECEN
  13371. CECHCLK
  13372. CECICLR
  13373. CECIMSK
  13374. CECLCLK
  13375. CECNTH
  13376. CECNTL
  13377. CECRBUF1
  13378. CECRCTL1
  13379. CECRCTL2
  13380. CECRCTL3
  13381. CECRCTR
  13382. CECREN
  13383. CECRST
  13384. CECRSTAT
  13385. CECTBUF1
  13386. CECTCTL
  13387. CECTEN
  13388. CECTSTAT
  13389. CEC_32K_PDN
  13390. CEC_ACK0NOML2H_1MS5_BIT7_0
  13391. CEC_ACK0NOML2H_1MS5_BIT8
  13392. CEC_ACK_CTRL
  13393. CEC_ADAP_G_CAPS
  13394. CEC_ADAP_G_LOG_ADDRS
  13395. CEC_ADAP_G_PHYS_ADDR
  13396. CEC_ADAP_S_LOG_ADDRS
  13397. CEC_ADAP_S_PHYS_ADDR
  13398. CEC_ADDR_TABLE
  13399. CEC_AUTO_BUS_ERR_EN
  13400. CEC_BIT_HPULSE_03MS
  13401. CEC_BIT_LPULSE_03MS
  13402. CEC_BIT_PULSE_THRESH
  13403. CEC_BIT_TOUT_THRESH
  13404. CEC_BUGFIX_DISABLE_0
  13405. CEC_BUGFIX_DISABLE_1
  13406. CEC_CAL_XOSC_CTRL1_ENA_CAL
  13407. CEC_CAP_CONNECTOR_INFO
  13408. CEC_CAP_DEFAULTS
  13409. CEC_CAP_LOG_ADDRS
  13410. CEC_CAP_MONITOR_ALL
  13411. CEC_CAP_MONITOR_PIN
  13412. CEC_CAP_NEEDS_HPD
  13413. CEC_CAP_PASSTHROUGH
  13414. CEC_CAP_PHYS_ADDR
  13415. CEC_CAP_RC
  13416. CEC_CAP_TRANSMIT
  13417. CEC_CFGR
  13418. CEC_CHKCONTENTION_0MS1
  13419. CEC_CKGEN
  13420. CEC_CLK_DIV
  13421. CEC_CLK_FRO
  13422. CEC_CLK_RATE
  13423. CEC_CLOCK_DIV
  13424. CEC_CLOCK_DIV_H
  13425. CEC_CLOCK_DIV_L
  13426. CEC_CLOCK_FREQ
  13427. CEC_CMD_ENABLE
  13428. CEC_CMD_LOGICAL_ADDRESS
  13429. CEC_CONNECTOR_TYPE_DRM
  13430. CEC_CONNECTOR_TYPE_NO_CONNECTOR
  13431. CEC_CR
  13432. CEC_CTRL
  13433. CEC_CTRL2
  13434. CEC_CTRL_FRAME_TYP
  13435. CEC_CTRL_IMMED
  13436. CEC_CTRL_NORMAL
  13437. CEC_CTRL_RETRY
  13438. CEC_CTRL_START
  13439. CEC_DATA
  13440. CEC_DATA_ARRAY_CTRL
  13441. CEC_DATA_ARRAY_STATUS
  13442. CEC_DBIT_TOUT_27MS
  13443. CEC_DBIT_TOUT_28MS
  13444. CEC_DBIT_TOUT_29MS
  13445. CEC_DBIT_TOUT_STS
  13446. CEC_DECAY_DEFAULT_INTERVAL
  13447. CEC_DECAY_MAX_INTERVAL
  13448. CEC_DECAY_MIN_INTERVAL
  13449. CEC_DELCNTR_LOGICERR
  13450. CEC_DES_FREQ2_DIS_AUTOCAL
  13451. CEC_DIV_RATIO
  13452. CEC_DQEVENT
  13453. CEC_EN
  13454. CEC_ENAMODS_DIS_CCLK
  13455. CEC_ENAMODS_DIS_FRO
  13456. CEC_ENAMODS_EN_CEC
  13457. CEC_ENAMODS_EN_CEC_CLK
  13458. CEC_ENAMODS_EN_HDMI
  13459. CEC_ENAMODS_EN_RXSENS
  13460. CEC_ERROR_INJ_MODE_ALWAYS
  13461. CEC_ERROR_INJ_MODE_MASK
  13462. CEC_ERROR_INJ_MODE_OFF
  13463. CEC_ERROR_INJ_MODE_ONCE
  13464. CEC_ERROR_INJ_MODE_TOGGLE
  13465. CEC_ERROR_INJ_NUM_ARGS
  13466. CEC_ERROR_INJ_OP_ANY
  13467. CEC_ERROR_INJ_RX_ADD_BYTE_OFFSET
  13468. CEC_ERROR_INJ_RX_ARB_LOST_ARG_IDX
  13469. CEC_ERROR_INJ_RX_ARB_LOST_OFFSET
  13470. CEC_ERROR_INJ_RX_LOW_DRIVE_ARG_IDX
  13471. CEC_ERROR_INJ_RX_LOW_DRIVE_OFFSET
  13472. CEC_ERROR_INJ_RX_MASK
  13473. CEC_ERROR_INJ_RX_NACK_OFFSET
  13474. CEC_ERROR_INJ_RX_REMOVE_BYTE_OFFSET
  13475. CEC_ERROR_INJ_TX_ADD_BYTES_ARG_IDX
  13476. CEC_ERROR_INJ_TX_ADD_BYTES_OFFSET
  13477. CEC_ERROR_INJ_TX_CUSTOM_BIT_ARG_IDX
  13478. CEC_ERROR_INJ_TX_CUSTOM_BIT_OFFSET
  13479. CEC_ERROR_INJ_TX_CUSTOM_START_OFFSET
  13480. CEC_ERROR_INJ_TX_EARLY_EOM_OFFSET
  13481. CEC_ERROR_INJ_TX_LAST_BIT_ARG_IDX
  13482. CEC_ERROR_INJ_TX_LAST_BIT_OFFSET
  13483. CEC_ERROR_INJ_TX_LONG_BIT_ARG_IDX
  13484. CEC_ERROR_INJ_TX_LONG_BIT_OFFSET
  13485. CEC_ERROR_INJ_TX_LONG_START_OFFSET
  13486. CEC_ERROR_INJ_TX_LOW_DRIVE_ARG_IDX
  13487. CEC_ERROR_INJ_TX_LOW_DRIVE_OFFSET
  13488. CEC_ERROR_INJ_TX_MASK
  13489. CEC_ERROR_INJ_TX_NO_EOM_OFFSET
  13490. CEC_ERROR_INJ_TX_REMOVE_BYTE_OFFSET
  13491. CEC_ERROR_INJ_TX_SHORT_BIT_ARG_IDX
  13492. CEC_ERROR_INJ_TX_SHORT_BIT_OFFSET
  13493. CEC_ERROR_INJ_TX_SHORT_START_OFFSET
  13494. CEC_ERROR_IRQ_EN
  13495. CEC_ERROR_STS
  13496. CEC_EVENT_FL_DROPPED_EVENTS
  13497. CEC_EVENT_FL_INITIAL_STATE
  13498. CEC_EVENT_LOST_MSGS
  13499. CEC_EVENT_PIN_5V_HIGH
  13500. CEC_EVENT_PIN_5V_LOW
  13501. CEC_EVENT_PIN_CEC_HIGH
  13502. CEC_EVENT_PIN_CEC_LOW
  13503. CEC_EVENT_PIN_HPD_HIGH
  13504. CEC_EVENT_PIN_HPD_LOW
  13505. CEC_EVENT_STATE_CHANGE
  13506. CEC_EXT_STATUS
  13507. CEC_FILTER_THRESHOLD
  13508. CEC_FREE_TIME_IRQ_EN
  13509. CEC_FREE_TIME_IRQ_STS
  13510. CEC_FREE_TIME_THRESH
  13511. CEC_FREE_TIME_TO_USEC
  13512. CEC_FRO_IM_CLK_CTRL_ENA_OTP
  13513. CEC_FRO_IM_CLK_CTRL_FRO_DIV
  13514. CEC_FRO_IM_CLK_CTRL_GHOST_DIS
  13515. CEC_FRO_IM_CLK_CTRL_IMCLK_SEL
  13516. CEC_GEN_CNTL_CLK_CTRL_MASK
  13517. CEC_GEN_CNTL_CLK_DISABLE
  13518. CEC_GEN_CNTL_CLK_ENABLE
  13519. CEC_GEN_CNTL_CLK_ENABLE_DBG
  13520. CEC_GEN_CNTL_REG
  13521. CEC_GEN_CNTL_RESET
  13522. CEC_G_MODE
  13523. CEC_HPULSE_ERROR_STS
  13524. CEC_IER
  13525. CEC_IGNORE_RX_ERROR
  13526. CEC_INTR_CLR_REG
  13527. CEC_INTR_MASKN_REG
  13528. CEC_INTR_RX
  13529. CEC_INTR_STAT_REG
  13530. CEC_INTR_TX
  13531. CEC_INTSTATUS_CEC
  13532. CEC_INTSTATUS_HDMI
  13533. CEC_IN_FILTER_EN
  13534. CEC_IRQ_CTRL
  13535. CEC_ISR
  13536. CEC_K
  13537. CEC_LINE_INACTIVE_EN
  13538. CEC_LOGIC0MAXL2H_1MS7_BIT7_0
  13539. CEC_LOGIC0MAXL2H_1MS7_BIT8
  13540. CEC_LOGIC0MINL2H_1MS3_BIT7_0
  13541. CEC_LOGIC0MINL2H_1MS3_BIT8
  13542. CEC_LOGIC0NOMH_0MS9_BIT7_0
  13543. CEC_LOGIC0NOMH_0MS9_BIT8
  13544. CEC_LOGIC0NOML2H_1MS5_BIT7_0
  13545. CEC_LOGIC0NOML2H_1MS5_BIT8
  13546. CEC_LOGIC1MAXL2H_0MS8_BIT7_0
  13547. CEC_LOGIC1MAXL2H_0MS8_BIT8
  13548. CEC_LOGIC1MINL2H_0MS4_BIT7_0
  13549. CEC_LOGIC1MINL2H_0MS4_BIT8
  13550. CEC_LOGIC1NOMH_1MS8_BIT7_0
  13551. CEC_LOGIC1NOMH_1MS8_BIT8
  13552. CEC_LOGIC1NOML2H_0MS6_BIT7_0
  13553. CEC_LOGIC1NOML2H_0MS6_BIT8
  13554. CEC_LOGICAL_ADDR0
  13555. CEC_LOGICAL_ADDR1
  13556. CEC_LOGICAL_ADDR2
  13557. CEC_LOGICAL_ADDR3
  13558. CEC_LOGICAL_ADDR4
  13559. CEC_LOGICERRLOW_3MS4_BIT7_0
  13560. CEC_LOGICERRLOW_3MS4_BIT8
  13561. CEC_LOGICERRLOW_3MS6_BIT7_0
  13562. CEC_LOGICERRLOW_3MS6_BIT8
  13563. CEC_LOGICMAXHIGH_2MS8_BIT7_0
  13564. CEC_LOGICMAXHIGH_2MS8_BIT8
  13565. CEC_LOGICMINTOTAL_2MS05_BIT7_0
  13566. CEC_LOGICMINTOTAL_2MS05_BIT9_8
  13567. CEC_LOG_ADDRS_FL_ALLOW_RC_PASSTHRU
  13568. CEC_LOG_ADDRS_FL_ALLOW_UNREG_FALLBACK
  13569. CEC_LOG_ADDRS_FL_CDC_ONLY
  13570. CEC_LOG_ADDR_AUDIOSYSTEM
  13571. CEC_LOG_ADDR_BACKUP_1
  13572. CEC_LOG_ADDR_BACKUP_2
  13573. CEC_LOG_ADDR_BROADCAST
  13574. CEC_LOG_ADDR_INVALID
  13575. CEC_LOG_ADDR_MASK_AUDIOSYSTEM
  13576. CEC_LOG_ADDR_MASK_BACKUP
  13577. CEC_LOG_ADDR_MASK_PLAYBACK
  13578. CEC_LOG_ADDR_MASK_RECORD
  13579. CEC_LOG_ADDR_MASK_SPECIFIC
  13580. CEC_LOG_ADDR_MASK_TUNER
  13581. CEC_LOG_ADDR_MASK_TV
  13582. CEC_LOG_ADDR_MASK_UNREGISTERED
  13583. CEC_LOG_ADDR_PLAYBACK_1
  13584. CEC_LOG_ADDR_PLAYBACK_2
  13585. CEC_LOG_ADDR_PLAYBACK_3
  13586. CEC_LOG_ADDR_RECORD_1
  13587. CEC_LOG_ADDR_RECORD_2
  13588. CEC_LOG_ADDR_RECORD_3
  13589. CEC_LOG_ADDR_SPECIFIC
  13590. CEC_LOG_ADDR_TUNER_1
  13591. CEC_LOG_ADDR_TUNER_2
  13592. CEC_LOG_ADDR_TUNER_3
  13593. CEC_LOG_ADDR_TUNER_4
  13594. CEC_LOG_ADDR_TV
  13595. CEC_LOG_ADDR_TYPE_AUDIOSYSTEM
  13596. CEC_LOG_ADDR_TYPE_PLAYBACK
  13597. CEC_LOG_ADDR_TYPE_RECORD
  13598. CEC_LOG_ADDR_TYPE_SPECIFIC
  13599. CEC_LOG_ADDR_TYPE_TUNER
  13600. CEC_LOG_ADDR_TYPE_TV
  13601. CEC_LOG_ADDR_TYPE_UNREGISTERED
  13602. CEC_LOG_ADDR_UNREGISTERED
  13603. CEC_LPULSE_ERROR_STS
  13604. CEC_MAX_LOG_ADDRS
  13605. CEC_MAX_MSG_RX_QUEUE_SZ
  13606. CEC_MAX_MSG_SIZE
  13607. CEC_MAX_MSG_TX_QUEUE_SZ
  13608. CEC_MESSAGE_BROADCAST
  13609. CEC_MESSAGE_BROADCAST_MASK
  13610. CEC_MODE_EXCL_FOLLOWER
  13611. CEC_MODE_EXCL_FOLLOWER_PASSTHRU
  13612. CEC_MODE_EXCL_INITIATOR
  13613. CEC_MODE_FOLLOWER
  13614. CEC_MODE_FOLLOWER_MSK
  13615. CEC_MODE_INITIATOR
  13616. CEC_MODE_INITIATOR_MSK
  13617. CEC_MODE_MONITOR
  13618. CEC_MODE_MONITOR_ALL
  13619. CEC_MODE_MONITOR_PIN
  13620. CEC_MODE_NO_FOLLOWER
  13621. CEC_MODE_NO_INITIATOR
  13622. CEC_MSG_ABORT
  13623. CEC_MSG_ACTIVE_SOURCE
  13624. CEC_MSG_CDC_HEC_DISCOVER
  13625. CEC_MSG_CDC_HEC_INQUIRE_STATE
  13626. CEC_MSG_CDC_HEC_NOTIFY_ALIVE
  13627. CEC_MSG_CDC_HEC_REPORT_STATE
  13628. CEC_MSG_CDC_HEC_REQUEST_DEACTIVATION
  13629. CEC_MSG_CDC_HEC_SET_STATE
  13630. CEC_MSG_CDC_HEC_SET_STATE_ADJACENT
  13631. CEC_MSG_CDC_HPD_REPORT_STATE
  13632. CEC_MSG_CDC_HPD_SET_STATE
  13633. CEC_MSG_CDC_MESSAGE
  13634. CEC_MSG_CEC_VERSION
  13635. CEC_MSG_CLEAR_ANALOGUE_TIMER
  13636. CEC_MSG_CLEAR_DIGITAL_TIMER
  13637. CEC_MSG_CLEAR_EXT_TIMER
  13638. CEC_MSG_DECK_CONTROL
  13639. CEC_MSG_DECK_STATUS
  13640. CEC_MSG_DEVICE_VENDOR_ID
  13641. CEC_MSG_FEATURE_ABORT
  13642. CEC_MSG_FL_RAW
  13643. CEC_MSG_FL_REPLY_TO_FOLLOWERS
  13644. CEC_MSG_GET_CEC_VERSION
  13645. CEC_MSG_GET_MENU_LANGUAGE
  13646. CEC_MSG_GIVE_AUDIO_STATUS
  13647. CEC_MSG_GIVE_DECK_STATUS
  13648. CEC_MSG_GIVE_DEVICE_POWER_STATUS
  13649. CEC_MSG_GIVE_DEVICE_VENDOR_ID
  13650. CEC_MSG_GIVE_FEATURES
  13651. CEC_MSG_GIVE_OSD_NAME
  13652. CEC_MSG_GIVE_PHYSICAL_ADDR
  13653. CEC_MSG_GIVE_SYSTEM_AUDIO_MODE_STATUS
  13654. CEC_MSG_GIVE_TUNER_DEVICE_STATUS
  13655. CEC_MSG_IMAGE_VIEW_ON
  13656. CEC_MSG_INACTIVE_SOURCE
  13657. CEC_MSG_INITIATE_ARC
  13658. CEC_MSG_MENU_REQUEST
  13659. CEC_MSG_MENU_STATUS
  13660. CEC_MSG_PLAY
  13661. CEC_MSG_RECORD_OFF
  13662. CEC_MSG_RECORD_ON
  13663. CEC_MSG_RECORD_STATUS
  13664. CEC_MSG_RECORD_TV_SCREEN
  13665. CEC_MSG_REPORT_ARC_INITIATED
  13666. CEC_MSG_REPORT_ARC_TERMINATED
  13667. CEC_MSG_REPORT_AUDIO_STATUS
  13668. CEC_MSG_REPORT_CURRENT_LATENCY
  13669. CEC_MSG_REPORT_FEATURES
  13670. CEC_MSG_REPORT_PHYSICAL_ADDR
  13671. CEC_MSG_REPORT_POWER_STATUS
  13672. CEC_MSG_REPORT_SHORT_AUDIO_DESCRIPTOR
  13673. CEC_MSG_REQUEST_ACTIVE_SOURCE
  13674. CEC_MSG_REQUEST_ARC_INITIATION
  13675. CEC_MSG_REQUEST_ARC_TERMINATION
  13676. CEC_MSG_REQUEST_CURRENT_LATENCY
  13677. CEC_MSG_REQUEST_SHORT_AUDIO_DESCRIPTOR
  13678. CEC_MSG_ROUTING_CHANGE
  13679. CEC_MSG_ROUTING_INFORMATION
  13680. CEC_MSG_SELECT_ANALOGUE_SERVICE
  13681. CEC_MSG_SELECT_DIGITAL_SERVICE
  13682. CEC_MSG_SET_ANALOGUE_TIMER
  13683. CEC_MSG_SET_AUDIO_RATE
  13684. CEC_MSG_SET_DIGITAL_TIMER
  13685. CEC_MSG_SET_EXT_TIMER
  13686. CEC_MSG_SET_MENU_LANGUAGE
  13687. CEC_MSG_SET_OSD_NAME
  13688. CEC_MSG_SET_OSD_STRING
  13689. CEC_MSG_SET_STREAM_PATH
  13690. CEC_MSG_SET_SYSTEM_AUDIO_MODE
  13691. CEC_MSG_SET_TIMER_PROGRAM_TITLE
  13692. CEC_MSG_STANDBY
  13693. CEC_MSG_SYSTEM_AUDIO_MODE_REQUEST
  13694. CEC_MSG_SYSTEM_AUDIO_MODE_STATUS
  13695. CEC_MSG_TERMINATE_ARC
  13696. CEC_MSG_TEXT_VIEW_ON
  13697. CEC_MSG_TIMER_CLEARED_STATUS
  13698. CEC_MSG_TIMER_STATUS
  13699. CEC_MSG_TUNER_DEVICE_STATUS
  13700. CEC_MSG_TUNER_STEP_DECREMENT
  13701. CEC_MSG_TUNER_STEP_INCREMENT
  13702. CEC_MSG_USER_CONTROL_PRESSED
  13703. CEC_MSG_USER_CONTROL_RELEASED
  13704. CEC_MSG_VENDOR_COMMAND
  13705. CEC_MSG_VENDOR_COMMAND_WITH_ID
  13706. CEC_MSG_VENDOR_REMOTE_BUTTON_DOWN
  13707. CEC_MSG_VENDOR_REMOTE_BUTTON_UP
  13708. CEC_NAME
  13709. CEC_NEW_INIT_SFT
  13710. CEC_NOMSMPACKPOINT_0MS45
  13711. CEC_NOMSMPPOINT_1MS05
  13712. CEC_NUM_CORE_EVENTS
  13713. CEC_NUM_DEVICES
  13714. CEC_NUM_EVENTS
  13715. CEC_NUM_PIN_EVENTS
  13716. CEC_OP_ABORT_INCORRECT_MODE
  13717. CEC_OP_ABORT_INVALID_OP
  13718. CEC_OP_ABORT_NO_SOURCE
  13719. CEC_OP_ABORT_REFUSED
  13720. CEC_OP_ABORT_UNDETERMINED
  13721. CEC_OP_ABORT_UNRECOGNIZED_OP
  13722. CEC_OP_ALL_DEVTYPE_AUDIOSYSTEM
  13723. CEC_OP_ALL_DEVTYPE_PLAYBACK
  13724. CEC_OP_ALL_DEVTYPE_RECORD
  13725. CEC_OP_ALL_DEVTYPE_SWITCH
  13726. CEC_OP_ALL_DEVTYPE_TUNER
  13727. CEC_OP_ALL_DEVTYPE_TV
  13728. CEC_OP_ANA_BCAST_TYPE_CABLE
  13729. CEC_OP_ANA_BCAST_TYPE_SATELLITE
  13730. CEC_OP_ANA_BCAST_TYPE_TERRESTRIAL
  13731. CEC_OP_AUD_FMT_ID_CEA861
  13732. CEC_OP_AUD_FMT_ID_CEA861_CXT
  13733. CEC_OP_AUD_MUTE_STATUS_OFF
  13734. CEC_OP_AUD_MUTE_STATUS_ON
  13735. CEC_OP_AUD_OUT_COMPENSATED_DELAY
  13736. CEC_OP_AUD_OUT_COMPENSATED_NA
  13737. CEC_OP_AUD_OUT_COMPENSATED_NO_DELAY
  13738. CEC_OP_AUD_OUT_COMPENSATED_PARTIAL_DELAY
  13739. CEC_OP_AUD_RATE_NARROW_FAST
  13740. CEC_OP_AUD_RATE_NARROW_SLOW
  13741. CEC_OP_AUD_RATE_NARROW_STD
  13742. CEC_OP_AUD_RATE_OFF
  13743. CEC_OP_AUD_RATE_WIDE_FAST
  13744. CEC_OP_AUD_RATE_WIDE_SLOW
  13745. CEC_OP_AUD_RATE_WIDE_STD
  13746. CEC_OP_BCAST_SYSTEM_NTSC_M
  13747. CEC_OP_BCAST_SYSTEM_OTHER
  13748. CEC_OP_BCAST_SYSTEM_PAL_BG
  13749. CEC_OP_BCAST_SYSTEM_PAL_DK
  13750. CEC_OP_BCAST_SYSTEM_PAL_I
  13751. CEC_OP_BCAST_SYSTEM_PAL_M
  13752. CEC_OP_BCAST_SYSTEM_SECAM_BG
  13753. CEC_OP_BCAST_SYSTEM_SECAM_DK
  13754. CEC_OP_BCAST_SYSTEM_SECAM_L
  13755. CEC_OP_BCAST_SYSTEM_SECAM_LQ
  13756. CEC_OP_CDC_ERROR_CODE_CAP_UNSUPPORTED
  13757. CEC_OP_CDC_ERROR_CODE_NONE
  13758. CEC_OP_CDC_ERROR_CODE_OTHER
  13759. CEC_OP_CDC_ERROR_CODE_WRONG_STATE
  13760. CEC_OP_CEC_VERSION_1_3A
  13761. CEC_OP_CEC_VERSION_1_4
  13762. CEC_OP_CEC_VERSION_2_0
  13763. CEC_OP_CHANNEL_NUMBER_FMT_1_PART
  13764. CEC_OP_CHANNEL_NUMBER_FMT_2_PART
  13765. CEC_OP_DECK_CTL_MODE_EJECT
  13766. CEC_OP_DECK_CTL_MODE_SKIP_FWD
  13767. CEC_OP_DECK_CTL_MODE_SKIP_REV
  13768. CEC_OP_DECK_CTL_MODE_STOP
  13769. CEC_OP_DECK_INFO_FAST_FWD
  13770. CEC_OP_DECK_INFO_FAST_REV
  13771. CEC_OP_DECK_INFO_INDEX_SEARCH_FWD
  13772. CEC_OP_DECK_INFO_INDEX_SEARCH_REV
  13773. CEC_OP_DECK_INFO_NO_MEDIA
  13774. CEC_OP_DECK_INFO_OTHER
  13775. CEC_OP_DECK_INFO_PLAY
  13776. CEC_OP_DECK_INFO_PLAY_REV
  13777. CEC_OP_DECK_INFO_RECORD
  13778. CEC_OP_DECK_INFO_SKIP_FWD
  13779. CEC_OP_DECK_INFO_SKIP_REV
  13780. CEC_OP_DECK_INFO_SLOW
  13781. CEC_OP_DECK_INFO_SLOW_REV
  13782. CEC_OP_DECK_INFO_STILL
  13783. CEC_OP_DECK_INFO_STOP
  13784. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_BS
  13785. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_CS
  13786. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_GEN
  13787. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_T
  13788. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_CABLE
  13789. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_GEN
  13790. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_SAT
  13791. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_T
  13792. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_C
  13793. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_GEN
  13794. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_S
  13795. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_S2
  13796. CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_T
  13797. CEC_OP_DISP_CTL_CLEAR
  13798. CEC_OP_DISP_CTL_DEFAULT
  13799. CEC_OP_DISP_CTL_UNTIL_CLEARED
  13800. CEC_OP_ENC_FUNC_STATE_EXT_CON_ACTIVE
  13801. CEC_OP_ENC_FUNC_STATE_EXT_CON_INACTIVE
  13802. CEC_OP_ENC_FUNC_STATE_EXT_CON_NOT_SUPPORTED
  13803. CEC_OP_EXT_SRC_PHYS_ADDR
  13804. CEC_OP_EXT_SRC_PLUG
  13805. CEC_OP_FEAT_DEV_HAS_DECK_CONTROL
  13806. CEC_OP_FEAT_DEV_HAS_RECORD_TV_SCREEN
  13807. CEC_OP_FEAT_DEV_HAS_SET_AUDIO_RATE
  13808. CEC_OP_FEAT_DEV_HAS_SET_OSD_STRING
  13809. CEC_OP_FEAT_DEV_SINK_HAS_ARC_TX
  13810. CEC_OP_FEAT_DEV_SOURCE_HAS_ARC_RX
  13811. CEC_OP_FEAT_EXT
  13812. CEC_OP_FEAT_RC_SRC_HAS_CONTENTS_MENU
  13813. CEC_OP_FEAT_RC_SRC_HAS_DEV_ROOT_MENU
  13814. CEC_OP_FEAT_RC_SRC_HAS_DEV_SETUP_MENU
  13815. CEC_OP_FEAT_RC_SRC_HAS_MEDIA_CONTEXT_MENU
  13816. CEC_OP_FEAT_RC_SRC_HAS_MEDIA_TOP_MENU
  13817. CEC_OP_FEAT_RC_TV_PROFILE_1
  13818. CEC_OP_FEAT_RC_TV_PROFILE_2
  13819. CEC_OP_FEAT_RC_TV_PROFILE_3
  13820. CEC_OP_FEAT_RC_TV_PROFILE_4
  13821. CEC_OP_FEAT_RC_TV_PROFILE_NONE
  13822. CEC_OP_HEC_ACTIVATION_OFF
  13823. CEC_OP_HEC_ACTIVATION_ON
  13824. CEC_OP_HEC_FUNC_STATE_ACTIVATION_FIELD
  13825. CEC_OP_HEC_FUNC_STATE_ACTIVE
  13826. CEC_OP_HEC_FUNC_STATE_INACTIVE
  13827. CEC_OP_HEC_FUNC_STATE_NOT_SUPPORTED
  13828. CEC_OP_HEC_SET_STATE_ACTIVATE
  13829. CEC_OP_HEC_SET_STATE_DEACTIVATE
  13830. CEC_OP_HEC_SUPPORT_NO
  13831. CEC_OP_HEC_SUPPORT_YES
  13832. CEC_OP_HOST_FUNC_STATE_ACTIVE
  13833. CEC_OP_HOST_FUNC_STATE_INACTIVE
  13834. CEC_OP_HOST_FUNC_STATE_NOT_SUPPORTED
  13835. CEC_OP_HPD_ERROR_INITIATOR_NOT_CAPABLE
  13836. CEC_OP_HPD_ERROR_INITIATOR_WRONG_STATE
  13837. CEC_OP_HPD_ERROR_NONE
  13838. CEC_OP_HPD_ERROR_NONE_NO_VIDEO
  13839. CEC_OP_HPD_ERROR_OTHER
  13840. CEC_OP_HPD_STATE_CP_EDID_DISABLE
  13841. CEC_OP_HPD_STATE_CP_EDID_DISABLE_ENABLE
  13842. CEC_OP_HPD_STATE_CP_EDID_ENABLE
  13843. CEC_OP_HPD_STATE_EDID_DISABLE
  13844. CEC_OP_HPD_STATE_EDID_DISABLE_ENABLE
  13845. CEC_OP_HPD_STATE_EDID_ENABLE
  13846. CEC_OP_LOW_LATENCY_MODE_OFF
  13847. CEC_OP_LOW_LATENCY_MODE_ON
  13848. CEC_OP_MEDIA_INFO_NO_MEDIA
  13849. CEC_OP_MEDIA_INFO_PROT_MEDIA
  13850. CEC_OP_MEDIA_INFO_UNPROT_MEDIA
  13851. CEC_OP_MENU_REQUEST_ACTIVATE
  13852. CEC_OP_MENU_REQUEST_DEACTIVATE
  13853. CEC_OP_MENU_REQUEST_QUERY
  13854. CEC_OP_MENU_STATE_ACTIVATED
  13855. CEC_OP_MENU_STATE_DEACTIVATED
  13856. CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MAX
  13857. CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MED
  13858. CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MIN
  13859. CEC_OP_PLAY_MODE_PLAY_FAST_REV_MAX
  13860. CEC_OP_PLAY_MODE_PLAY_FAST_REV_MED
  13861. CEC_OP_PLAY_MODE_PLAY_FAST_REV_MIN
  13862. CEC_OP_PLAY_MODE_PLAY_FWD
  13863. CEC_OP_PLAY_MODE_PLAY_REV
  13864. CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MAX
  13865. CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MED
  13866. CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MIN
  13867. CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MAX
  13868. CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MED
  13869. CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MIN
  13870. CEC_OP_PLAY_MODE_PLAY_STILL
  13871. CEC_OP_POWER_STATUS_ON
  13872. CEC_OP_POWER_STATUS_STANDBY
  13873. CEC_OP_POWER_STATUS_TO_ON
  13874. CEC_OP_POWER_STATUS_TO_STANDBY
  13875. CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM
  13876. CEC_OP_PRIM_DEVTYPE_PLAYBACK
  13877. CEC_OP_PRIM_DEVTYPE_PROCESSOR
  13878. CEC_OP_PRIM_DEVTYPE_RECORD
  13879. CEC_OP_PRIM_DEVTYPE_SWITCH
  13880. CEC_OP_PRIM_DEVTYPE_TUNER
  13881. CEC_OP_PRIM_DEVTYPE_TV
  13882. CEC_OP_PROG_ERROR_CA_UNSUPP
  13883. CEC_OP_PROG_ERROR_CLOCK_FAILURE
  13884. CEC_OP_PROG_ERROR_DATE_OUT_OF_RANGE
  13885. CEC_OP_PROG_ERROR_DUPLICATE
  13886. CEC_OP_PROG_ERROR_INSUF_CA_ENTITLEMENTS
  13887. CEC_OP_PROG_ERROR_INV_EXT_PHYS_ADDR
  13888. CEC_OP_PROG_ERROR_INV_EXT_PLUG
  13889. CEC_OP_PROG_ERROR_NO_FREE_TIMER
  13890. CEC_OP_PROG_ERROR_PARENTAL_LOCK
  13891. CEC_OP_PROG_ERROR_REC_SEQ_ERROR
  13892. CEC_OP_PROG_ERROR_RESOLUTION_UNSUPP
  13893. CEC_OP_PROG_IND_NOT_PROGRAMMED
  13894. CEC_OP_PROG_IND_PROGRAMMED
  13895. CEC_OP_PROG_INFO_ENOUGH_SPACE
  13896. CEC_OP_PROG_INFO_MIGHT_NOT_BE_ENOUGH_SPACE
  13897. CEC_OP_PROG_INFO_NONE_AVAILABLE
  13898. CEC_OP_PROG_INFO_NOT_ENOUGH_SPACE
  13899. CEC_OP_RECORD_SRC_ANALOG
  13900. CEC_OP_RECORD_SRC_DIGITAL
  13901. CEC_OP_RECORD_SRC_EXT_PHYS_ADDR
  13902. CEC_OP_RECORD_SRC_EXT_PLUG
  13903. CEC_OP_RECORD_SRC_OWN
  13904. CEC_OP_RECORD_STATUS_ALREADY_RECORDING
  13905. CEC_OP_RECORD_STATUS_ALREADY_TERM
  13906. CEC_OP_RECORD_STATUS_ANA_SERVICE
  13907. CEC_OP_RECORD_STATUS_CANT_COPY_SRC
  13908. CEC_OP_RECORD_STATUS_CUR_SRC
  13909. CEC_OP_RECORD_STATUS_DIG_SERVICE
  13910. CEC_OP_RECORD_STATUS_EXT_INPUT
  13911. CEC_OP_RECORD_STATUS_INVALID_EXT_PHYS_ADDR
  13912. CEC_OP_RECORD_STATUS_INVALID_EXT_PLUG
  13913. CEC_OP_RECORD_STATUS_MEDIA_PROBLEM
  13914. CEC_OP_RECORD_STATUS_MEDIA_PROT
  13915. CEC_OP_RECORD_STATUS_NO_ANA_SERVICE
  13916. CEC_OP_RECORD_STATUS_NO_CA_ENTITLEMENTS
  13917. CEC_OP_RECORD_STATUS_NO_DIG_SERVICE
  13918. CEC_OP_RECORD_STATUS_NO_MEDIA
  13919. CEC_OP_RECORD_STATUS_NO_MORE_COPIES
  13920. CEC_OP_RECORD_STATUS_NO_SERVICE
  13921. CEC_OP_RECORD_STATUS_NO_SIGNAL
  13922. CEC_OP_RECORD_STATUS_NO_SPACE
  13923. CEC_OP_RECORD_STATUS_OTHER
  13924. CEC_OP_RECORD_STATUS_PARENTAL_LOCK
  13925. CEC_OP_RECORD_STATUS_PLAYING
  13926. CEC_OP_RECORD_STATUS_TERMINATED_OK
  13927. CEC_OP_RECORD_STATUS_UNSUP_CA
  13928. CEC_OP_REC_FLAG_NOT_USED
  13929. CEC_OP_REC_FLAG_USED
  13930. CEC_OP_REC_SEQ_FRIDAY
  13931. CEC_OP_REC_SEQ_MONDAY
  13932. CEC_OP_REC_SEQ_ONCE_ONLY
  13933. CEC_OP_REC_SEQ_SATERDAY
  13934. CEC_OP_REC_SEQ_SUNDAY
  13935. CEC_OP_REC_SEQ_THURSDAY
  13936. CEC_OP_REC_SEQ_TUESDAY
  13937. CEC_OP_REC_SEQ_WEDNESDAY
  13938. CEC_OP_SERVICE_ID_METHOD_BY_CHANNEL
  13939. CEC_OP_SERVICE_ID_METHOD_BY_DIG_ID
  13940. CEC_OP_STATUS_REQ_OFF
  13941. CEC_OP_STATUS_REQ_ON
  13942. CEC_OP_STATUS_REQ_ONCE
  13943. CEC_OP_SYS_AUD_STATUS_OFF
  13944. CEC_OP_SYS_AUD_STATUS_ON
  13945. CEC_OP_TIMER_CLR_STAT_CLEARED
  13946. CEC_OP_TIMER_CLR_STAT_NO_INFO
  13947. CEC_OP_TIMER_CLR_STAT_NO_MATCHING
  13948. CEC_OP_TIMER_CLR_STAT_RECORDING
  13949. CEC_OP_TIMER_OVERLAP_WARNING_NO_OVERLAP
  13950. CEC_OP_TIMER_OVERLAP_WARNING_OVERLAP
  13951. CEC_OP_TUNER_DISPLAY_INFO_ANALOGUE
  13952. CEC_OP_TUNER_DISPLAY_INFO_DIGITAL
  13953. CEC_OP_TUNER_DISPLAY_INFO_NONE
  13954. CEC_OP_UI_BCAST_TYPE_ANALOGUE
  13955. CEC_OP_UI_BCAST_TYPE_ANALOGUE_CABLE
  13956. CEC_OP_UI_BCAST_TYPE_ANALOGUE_SAT
  13957. CEC_OP_UI_BCAST_TYPE_ANALOGUE_T
  13958. CEC_OP_UI_BCAST_TYPE_DIGITAL
  13959. CEC_OP_UI_BCAST_TYPE_DIGITAL_CABLE
  13960. CEC_OP_UI_BCAST_TYPE_DIGITAL_COM_SAT
  13961. CEC_OP_UI_BCAST_TYPE_DIGITAL_COM_SAT2
  13962. CEC_OP_UI_BCAST_TYPE_DIGITAL_SAT
  13963. CEC_OP_UI_BCAST_TYPE_DIGITAL_T
  13964. CEC_OP_UI_BCAST_TYPE_IP
  13965. CEC_OP_UI_BCAST_TYPE_TOGGLE_ALL
  13966. CEC_OP_UI_BCAST_TYPE_TOGGLE_DIG_ANA
  13967. CEC_OP_UI_SND_PRES_CTL_BASS_DOWN
  13968. CEC_OP_UI_SND_PRES_CTL_BASS_NEUTRAL
  13969. CEC_OP_UI_SND_PRES_CTL_BASS_UP
  13970. CEC_OP_UI_SND_PRES_CTL_DOWNMIX
  13971. CEC_OP_UI_SND_PRES_CTL_DUAL_MONO
  13972. CEC_OP_UI_SND_PRES_CTL_EQUALIZER
  13973. CEC_OP_UI_SND_PRES_CTL_KARAOKE
  13974. CEC_OP_UI_SND_PRES_CTL_REVERB
  13975. CEC_OP_UI_SND_PRES_CTL_TREBLE_DOWN
  13976. CEC_OP_UI_SND_PRES_CTL_TREBLE_NEUTRAL
  13977. CEC_OP_UI_SND_PRES_CTL_TREBLE_UP
  13978. CEC_PHYS_ADDR_INVALID
  13979. CEC_PIN_EVENT_FL_DROPPED
  13980. CEC_PIN_EVENT_FL_IS_HIGH
  13981. CEC_PIN_IRQ_DISABLE
  13982. CEC_PIN_IRQ_ENABLE
  13983. CEC_PIN_IRQ_UNCHANGED
  13984. CEC_PIN_STATES
  13985. CEC_PIN_STS
  13986. CEC_PIN_STS_IRQ_EN
  13987. CEC_PREPARENXTBIT_0MS05_BIT7_0
  13988. CEC_PREPARENXTBIT_0MS05_BIT8
  13989. CEC_PRESENT_INIT_SFT
  13990. CEC_PWR_SAVE_EN
  13991. CEC_QUIESCENT_25MS_BIT11_8
  13992. CEC_QUIESCENT_25MS_BIT7_0
  13993. CEC_R
  13994. CEC_RECEIVE
  13995. CEC_RETRANSMIT_SFT
  13996. CEC_RW_ADDR
  13997. CEC_RW_BUS_BUSY
  13998. CEC_RW_RD_DATA
  13999. CEC_RW_REG
  14000. CEC_RW_WRITE_EN
  14001. CEC_RW_WR_DATA
  14002. CEC_RXDR
  14003. CEC_RXSHPDINT_HPD
  14004. CEC_RXSHPDINT_RXSENS
  14005. CEC_RXSHPDLEV_HPD
  14006. CEC_RXSHPDLEV_RXSENS
  14007. CEC_RX_ARRAY_EN
  14008. CEC_RX_ARRAY_RESET
  14009. CEC_RX_BUFF_SIZE
  14010. CEC_RX_CLEAR_BUF
  14011. CEC_RX_DATA_BASE
  14012. CEC_RX_DATA_SIZE
  14013. CEC_RX_DATA_TOP
  14014. CEC_RX_DONE_IRQ_EN
  14015. CEC_RX_DONE_STS
  14016. CEC_RX_EOM_IRQ_EN
  14017. CEC_RX_EOM_STS
  14018. CEC_RX_ERROR_MAX
  14019. CEC_RX_ERROR_MIN
  14020. CEC_RX_MSG_0_HEADER
  14021. CEC_RX_MSG_1_OPCODE
  14022. CEC_RX_MSG_2_OP1
  14023. CEC_RX_MSG_3_OP2
  14024. CEC_RX_MSG_4_OP3
  14025. CEC_RX_MSG_5_OP4
  14026. CEC_RX_MSG_6_OP5
  14027. CEC_RX_MSG_7_OP6
  14028. CEC_RX_MSG_8_OP7
  14029. CEC_RX_MSG_9_OP8
  14030. CEC_RX_MSG_A_OP9
  14031. CEC_RX_MSG_B_OP10
  14032. CEC_RX_MSG_CMD
  14033. CEC_RX_MSG_C_OP11
  14034. CEC_RX_MSG_D_OP12
  14035. CEC_RX_MSG_E_OP13
  14036. CEC_RX_MSG_F_OP14
  14037. CEC_RX_MSG_LENGTH
  14038. CEC_RX_MSG_STATUS
  14039. CEC_RX_NUM_MSG
  14040. CEC_RX_N_OF_BYTES
  14041. CEC_RX_OVERRUN
  14042. CEC_RX_RESET_EN
  14043. CEC_RX_SOM_IRQ_EN
  14044. CEC_RX_SOM_STS
  14045. CEC_RX_STATUS_ABORTED
  14046. CEC_RX_STATUS_FEATURE_ABORT
  14047. CEC_RX_STATUS_OK
  14048. CEC_RX_STATUS_TIMEOUT
  14049. CEC_SBIT_TOUT_47MS
  14050. CEC_SBIT_TOUT_48MS
  14051. CEC_SBIT_TOUT_50MS
  14052. CEC_SBIT_TOUT_STS
  14053. CEC_SIGNAL_FREE_TIME_NEW_INITIATOR
  14054. CEC_SIGNAL_FREE_TIME_NEXT_XFER
  14055. CEC_SIGNAL_FREE_TIME_RETRY
  14056. CEC_STARTBITMAXH_1MS0_BIT7_0
  14057. CEC_STARTBITMAXH_1MS0_BIT8
  14058. CEC_STARTBITMAXL2H_3MS9_BIT7_0
  14059. CEC_STARTBITMAXL2H_3MS9_BIT8
  14060. CEC_STARTBITMAXTOT_4MS7_BIT7_0
  14061. CEC_STARTBITMAXTOT_4MS7_BIT9_8
  14062. CEC_STARTBITMINH_0MS6_BIT7_0
  14063. CEC_STARTBITMINH_0MS6_BIT8
  14064. CEC_STARTBITMINL2H_3MS5_BIT7_0
  14065. CEC_STARTBITMINL2H_3MS5_BIT8
  14066. CEC_STARTBITMINTOT_4MS3_BIT7_0
  14067. CEC_STARTBITMINTOT_4MS3_BIT9_8
  14068. CEC_STARTBITNOMH_0MS8_BIT7_0
  14069. CEC_STARTBITNOMH_0MS8_BIT8
  14070. CEC_STARTBITNOML2H_3MS7_BIT7_0
  14071. CEC_STARTBITNOML2H_3MS7_BIT8
  14072. CEC_STATUS
  14073. CEC_STATUS_RX_BCAST
  14074. CEC_STATUS_RX_BYTES
  14075. CEC_STATUS_RX_DONE
  14076. CEC_STATUS_RX_ERROR
  14077. CEC_STATUS_RX_RECEIVING
  14078. CEC_STATUS_RX_RUNNING
  14079. CEC_STATUS_TX_BYTES
  14080. CEC_STATUS_TX_DONE
  14081. CEC_STATUS_TX_ERROR
  14082. CEC_STATUS_TX_NACK
  14083. CEC_STATUS_TX_RUNNING
  14084. CEC_STATUS_TX_TRANSFERRING
  14085. CEC_STAT_ARBLOST
  14086. CEC_STAT_DONE
  14087. CEC_STAT_EOM
  14088. CEC_STAT_ERROR_FOLL
  14089. CEC_STAT_ERROR_INIT
  14090. CEC_STAT_NACK
  14091. CEC_STAT_WAKEUP
  14092. CEC_STOP_ON_ARB_ERR_EN
  14093. CEC_ST_IDLE
  14094. CEC_ST_OFF
  14095. CEC_ST_RX_ACK_FINISH
  14096. CEC_ST_RX_ACK_HIGH_POST
  14097. CEC_ST_RX_ACK_LOW
  14098. CEC_ST_RX_ACK_LOW_POST
  14099. CEC_ST_RX_DATA_POST_SAMPLE
  14100. CEC_ST_RX_DATA_SAMPLE
  14101. CEC_ST_RX_DATA_WAIT_FOR_LOW
  14102. CEC_ST_RX_IRQ
  14103. CEC_ST_RX_LOW_DRIVE
  14104. CEC_ST_RX_START_BIT_HIGH
  14105. CEC_ST_RX_START_BIT_LOW
  14106. CEC_ST_TX_DATA_BIT_0_HIGH
  14107. CEC_ST_TX_DATA_BIT_0_HIGH_LONG
  14108. CEC_ST_TX_DATA_BIT_0_HIGH_SHORT
  14109. CEC_ST_TX_DATA_BIT_0_LOW
  14110. CEC_ST_TX_DATA_BIT_1_HIGH
  14111. CEC_ST_TX_DATA_BIT_1_HIGH_LONG
  14112. CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE
  14113. CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG
  14114. CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT
  14115. CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE
  14116. CEC_ST_TX_DATA_BIT_1_HIGH_SHORT
  14117. CEC_ST_TX_DATA_BIT_1_LOW
  14118. CEC_ST_TX_DATA_BIT_HIGH_CUSTOM
  14119. CEC_ST_TX_DATA_BIT_LOW_CUSTOM
  14120. CEC_ST_TX_LOW_DRIVE
  14121. CEC_ST_TX_PULSE_HIGH_CUSTOM
  14122. CEC_ST_TX_PULSE_LOW_CUSTOM
  14123. CEC_ST_TX_START_BIT_HIGH
  14124. CEC_ST_TX_START_BIT_HIGH_CUSTOM
  14125. CEC_ST_TX_START_BIT_HIGH_LONG
  14126. CEC_ST_TX_START_BIT_HIGH_SHORT
  14127. CEC_ST_TX_START_BIT_LOW
  14128. CEC_ST_TX_START_BIT_LOW_CUSTOM
  14129. CEC_ST_TX_WAIT
  14130. CEC_ST_TX_WAIT_FOR_HIGH
  14131. CEC_S_MODE
  14132. CEC_TIM_CUSTOM_DEFAULT
  14133. CEC_TIM_DATA_BIT_0_HIGH
  14134. CEC_TIM_DATA_BIT_0_LOW
  14135. CEC_TIM_DATA_BIT_0_LOW_MAX
  14136. CEC_TIM_DATA_BIT_0_LOW_MIN
  14137. CEC_TIM_DATA_BIT_1_HIGH
  14138. CEC_TIM_DATA_BIT_1_LOW
  14139. CEC_TIM_DATA_BIT_1_LOW_MAX
  14140. CEC_TIM_DATA_BIT_1_LOW_MIN
  14141. CEC_TIM_DATA_BIT_HIGH
  14142. CEC_TIM_DATA_BIT_SAMPLE
  14143. CEC_TIM_DATA_BIT_TOTAL
  14144. CEC_TIM_DATA_BIT_TOTAL_LONG
  14145. CEC_TIM_DATA_BIT_TOTAL_MAX
  14146. CEC_TIM_DATA_BIT_TOTAL_MIN
  14147. CEC_TIM_DATA_BIT_TOTAL_SHORT
  14148. CEC_TIM_IDLE_SAMPLE
  14149. CEC_TIM_LOW_DRIVE_ERROR
  14150. CEC_TIM_SAMPLE
  14151. CEC_TIM_START_BIT_HIGH
  14152. CEC_TIM_START_BIT_LOW
  14153. CEC_TIM_START_BIT_LOW_MAX
  14154. CEC_TIM_START_BIT_LOW_MIN
  14155. CEC_TIM_START_BIT_SAMPLE
  14156. CEC_TIM_START_BIT_TOTAL
  14157. CEC_TIM_START_BIT_TOTAL_LONG
  14158. CEC_TIM_START_BIT_TOTAL_MAX
  14159. CEC_TIM_START_BIT_TOTAL_MIN
  14160. CEC_TIM_START_BIT_TOTAL_SHORT
  14161. CEC_TRANSMIT
  14162. CEC_TXDR
  14163. CEC_TXTIME_17MS_BIT10_8
  14164. CEC_TXTIME_17MS_BIT7_0
  14165. CEC_TXTIME_2BIT_BIT10_8
  14166. CEC_TXTIME_2BIT_BIT7_0
  14167. CEC_TXTIME_4BIT_BIT10_8
  14168. CEC_TXTIME_4BIT_BIT7_0
  14169. CEC_TX_ACK_GET_STS
  14170. CEC_TX_ARB_ERROR
  14171. CEC_TX_ARRAY_CTRL
  14172. CEC_TX_ARRAY_EN
  14173. CEC_TX_ARRAY_RESET
  14174. CEC_TX_AUTO_EOM_EN
  14175. CEC_TX_AUTO_SOM_EN
  14176. CEC_TX_BUFF_SIZE
  14177. CEC_TX_CLEAR_BUF
  14178. CEC_TX_CTRL
  14179. CEC_TX_DATA_BASE
  14180. CEC_TX_DATA_SIZE
  14181. CEC_TX_DATA_TOP
  14182. CEC_TX_DONE_IRQ_EN
  14183. CEC_TX_DONE_STS
  14184. CEC_TX_ERROR
  14185. CEC_TX_ERROR_STS
  14186. CEC_TX_MSG_0_HEADER
  14187. CEC_TX_MSG_1_OPCODE
  14188. CEC_TX_MSG_2_OP1
  14189. CEC_TX_MSG_3_OP2
  14190. CEC_TX_MSG_4_OP3
  14191. CEC_TX_MSG_5_OP4
  14192. CEC_TX_MSG_6_OP5
  14193. CEC_TX_MSG_7_OP6
  14194. CEC_TX_MSG_8_OP7
  14195. CEC_TX_MSG_9_OP8
  14196. CEC_TX_MSG_A_OP9
  14197. CEC_TX_MSG_B_OP10
  14198. CEC_TX_MSG_CMD
  14199. CEC_TX_MSG_C_OP11
  14200. CEC_TX_MSG_D_OP12
  14201. CEC_TX_MSG_E_OP13
  14202. CEC_TX_MSG_F_OP14
  14203. CEC_TX_MSG_LENGTH
  14204. CEC_TX_MSG_STATUS
  14205. CEC_TX_NUM_MSG
  14206. CEC_TX_N_OF_BYTES
  14207. CEC_TX_N_OF_BYTES_IRQ_EN
  14208. CEC_TX_N_OF_BYTES_SENT
  14209. CEC_TX_REQ_WAIT_EN
  14210. CEC_TX_START
  14211. CEC_TX_STATUS_ABORTED
  14212. CEC_TX_STATUS_ARB_LOST
  14213. CEC_TX_STATUS_ERROR
  14214. CEC_TX_STATUS_LOW_DRIVE
  14215. CEC_TX_STATUS_MAX_RETRIES
  14216. CEC_TX_STATUS_NACK
  14217. CEC_TX_STATUS_OK
  14218. CEC_TX_STATUS_TIMEOUT
  14219. CEC_TX_STOP_ON_NACK
  14220. CEC_TX_WRITE_BUF
  14221. CEC_VENDOR_ID_NONE
  14222. CEC_WORKER_RX_MSG
  14223. CEC_WORKER_TX_DONE
  14224. CEC_XFER_TIMEOUT_MS
  14225. CEDAR_GB_ADDR_CONFIG_GOLDEN
  14226. CEDAR_MGCGCGTSSMCTRL_DFLT
  14227. CEDAR_SMC_INT_VECTOR_SIZE
  14228. CEDAR_SMC_INT_VECTOR_START
  14229. CEDAR_SMC_UCODE_SIZE
  14230. CEDAR_SMC_UCODE_START
  14231. CEDE_LATENCY_PARAM_LENGTH
  14232. CEDE_LATENCY_PARAM_MAX_LENGTH
  14233. CEDE_LATENCY_TOKEN
  14234. CEDRUS_CAPABILITY_UNTILED
  14235. CEDRUS_CODEC_H264
  14236. CEDRUS_CODEC_LAST
  14237. CEDRUS_CODEC_MPEG2
  14238. CEDRUS_CONTROLS_COUNT
  14239. CEDRUS_DECODE_DST
  14240. CEDRUS_DECODE_SRC
  14241. CEDRUS_FORMATS_COUNT
  14242. CEDRUS_H264_FRAME_NUM
  14243. CEDRUS_H264_PIC_TYPE_FIELD
  14244. CEDRUS_H264_PIC_TYPE_FRAME
  14245. CEDRUS_H264_PIC_TYPE_MBAFF
  14246. CEDRUS_IRQ_ERROR
  14247. CEDRUS_IRQ_NONE
  14248. CEDRUS_IRQ_OK
  14249. CEDRUS_MAX_HEIGHT
  14250. CEDRUS_MAX_REF_IDX
  14251. CEDRUS_MAX_WIDTH
  14252. CEDRUS_MIN_HEIGHT
  14253. CEDRUS_MIN_WIDTH
  14254. CEDRUS_NAME
  14255. CEDRUS_NEIGHBOR_INFO_BUF_SIZE
  14256. CEDRUS_PIC_INFO_BUF_SIZE
  14257. CEDRUS_QUIRK_NO_DMA_OFFSET
  14258. CEDRUS_SRAM_H264_FRAMEBUFFER_LIST
  14259. CEDRUS_SRAM_H264_PRED_WEIGHT_TABLE
  14260. CEDRUS_SRAM_H264_REF_LIST_0
  14261. CEDRUS_SRAM_H264_REF_LIST_1
  14262. CEDRUS_SRAM_H264_SCALING_LIST_4x4
  14263. CEDRUS_SRAM_H264_SCALING_LIST_8x8_0
  14264. CEDRUS_SRAM_H264_SCALING_LIST_8x8_1
  14265. CEECR
  14266. CEE_APPLY_NEW_CFG
  14267. CEE_BAD_APP_PRI_RCVD
  14268. CEE_BAD_BW_RCVD
  14269. CEE_BAD_PFC_RCVD
  14270. CEE_BAD_PG_RCVD
  14271. CEE_DCBX_MAX_PGS
  14272. CEE_DCBX_MAX_PRIO
  14273. CEE_DUP_CONTROL_TLV_RCVD
  14274. CEE_DUP_FEAT_TLV_RCVD
  14275. CEE_FCOE_NOT_COMPATIBLE
  14276. CEE_FCOE_PRI_PFC_OFF
  14277. CEE_ISCSI_NOT_COMPATIBLE
  14278. CEE_ISCSI_PRI_OVERLAP_FCOE_PRI
  14279. CEE_ISCSI_PRI_PFC_OFF
  14280. CEE_LLDP_INFO_AGED_OUT
  14281. CEE_LLDP_SHUTDOWN_TLV_RCVD
  14282. CEE_LLS_DOWN
  14283. CEE_LLS_DOWN_NO_TLV
  14284. CEE_LLS_FCOE_ABSENT
  14285. CEE_LLS_FCOE_DOWN
  14286. CEE_LLS_UP
  14287. CEE_LOOPBACK
  14288. CEE_PEER_NOT_ADVERTISE_DCBX
  14289. CEE_PEER_NOT_ADVERTISE_FCOE
  14290. CEE_PEER_NOT_ADVERTISE_PFC
  14291. CEE_PEER_NOT_ADVERTISE_PG
  14292. CEE_PFC_NOT_COMPATIBLE
  14293. CEE_PG_NOT_COMPATIBLE
  14294. CEE_PHY_DOWN
  14295. CEE_PHY_LINK_DOWN
  14296. CEE_PHY_UP
  14297. CEE_PROTOCOL_INIT
  14298. CEE_UP
  14299. CEFCR
  14300. CEIL
  14301. CEIL4
  14302. CEIL_DWORDS
  14303. CELL
  14304. CELLIENT_PRODUCT_MEN200
  14305. CELLIENT_VENDOR_ID
  14306. CELLOSCONF
  14307. CELLOSCONF_CEN
  14308. CELLOSCONF_COBS
  14309. CELLOSCONF_COPK
  14310. CELLOSCONF_COST
  14311. CELLOSCONF_COTS
  14312. CELLOSCONF_SC1
  14313. CELLOSCONF_SC2
  14314. CELLOSCONF_SC4
  14315. CELLOSCONF_SC8
  14316. CELL_4K
  14317. CELL_CNTR0_NC
  14318. CELL_CNTR1_NC
  14319. CELL_CTR0
  14320. CELL_CTR1
  14321. CELL_CTR_HIGH_AUTO
  14322. CELL_CTR_HIGH_NOAUTO
  14323. CELL_CTR_LO_AUTO
  14324. CELL_CTR_LO_NOAUTO
  14325. CELL_H
  14326. CELL_IOMMU_REAL_UNMAP
  14327. CELL_IOMMU_STRICT_PROTECTION
  14328. CELL_SORT_ARRAY_SIZE
  14329. CELOT_PRODUCT_CT680M
  14330. CELOT_VENDOR_ID
  14331. CELSIUS_TO_DECI_KELVIN
  14332. CELSIUS_TO_KELVIN
  14333. CELSIUS_TO_mCELSIUS
  14334. CEM_PST_DOWN
  14335. CEM_PST_HOLD
  14336. CEM_PST_UP
  14337. CEN
  14338. CEND
  14339. CENSOR_4PORT
  14340. CENSOR_8PORT
  14341. CENTAUR_1G_JEDEC_ID
  14342. CENTAUR_2G_JEDEC_ID
  14343. CENTER
  14344. CENTEROUT
  14345. CENTERS_ONLY
  14346. CENTRAL_BUS_ADDR
  14347. CENTRAL_INT_BASE_ADDR
  14348. CENTROIDS_AND_CENTERS
  14349. CENTROIDS_ONLY
  14350. CEPHFS_FEATURES_CLIENT_REQUIRED
  14351. CEPHFS_FEATURES_CLIENT_SUPPORTED
  14352. CEPHFS_FEATURE_LAZY_CAP_WANTED
  14353. CEPHFS_FEATURE_MIMIC
  14354. CEPHFS_FEATURE_MULTI_RECONNECT
  14355. CEPHFS_FEATURE_RECLAIM_CLIENT
  14356. CEPHFS_FEATURE_REPLY_ENCODING
  14357. CEPHX_AU_ENC_BUF_LEN
  14358. CEPHX_ENC_MAGIC
  14359. CEPHX_GET_AUTH_SESSION_KEY
  14360. CEPHX_GET_PRINCIPAL_SESSION_KEY
  14361. CEPHX_GET_ROTATING_KEY
  14362. CEPH_AES_IV
  14363. CEPH_AUTH_CEPHX
  14364. CEPH_AUTH_NAME_DEFAULT
  14365. CEPH_AUTH_NONE
  14366. CEPH_AUTH_UID_DEFAULT
  14367. CEPH_AUTH_UNKNOWN
  14368. CEPH_BANNER
  14369. CEPH_BANNER_MAX_LEN
  14370. CEPH_BLOCK
  14371. CEPH_BLOCK_SHIFT
  14372. CEPH_CAPS_PER_RELEASE
  14373. CEPH_CAPS_WANTED_DELAY_MAX_DEFAULT
  14374. CEPH_CAPS_WANTED_DELAY_MIN_DEFAULT
  14375. CEPH_CAP_ANY
  14376. CEPH_CAP_ANY_EXCL
  14377. CEPH_CAP_ANY_FILE_RD
  14378. CEPH_CAP_ANY_FILE_WR
  14379. CEPH_CAP_ANY_RD
  14380. CEPH_CAP_ANY_SHARED
  14381. CEPH_CAP_ANY_WR
  14382. CEPH_CAP_AUTH_EXCL
  14383. CEPH_CAP_AUTH_SHARED
  14384. CEPH_CAP_BITS
  14385. CEPH_CAP_FILE
  14386. CEPH_CAP_FILE_BITS
  14387. CEPH_CAP_FILE_BUFFER
  14388. CEPH_CAP_FILE_CACHE
  14389. CEPH_CAP_FILE_EXCL
  14390. CEPH_CAP_FILE_LAZYIO
  14391. CEPH_CAP_FILE_RD
  14392. CEPH_CAP_FILE_SHARED
  14393. CEPH_CAP_FILE_WR
  14394. CEPH_CAP_FILE_WREXTEND
  14395. CEPH_CAP_FLAG_AUTH
  14396. CEPH_CAP_FLAG_RELEASE
  14397. CEPH_CAP_FLOCK_EXCL
  14398. CEPH_CAP_FLOCK_SHARED
  14399. CEPH_CAP_GBUFFER
  14400. CEPH_CAP_GCACHE
  14401. CEPH_CAP_GEXCL
  14402. CEPH_CAP_GLAZYIO
  14403. CEPH_CAP_GRD
  14404. CEPH_CAP_GSHARED
  14405. CEPH_CAP_GWR
  14406. CEPH_CAP_GWREXTEND
  14407. CEPH_CAP_LINK_EXCL
  14408. CEPH_CAP_LINK_SHARED
  14409. CEPH_CAP_LOCKS
  14410. CEPH_CAP_OP_DROP
  14411. CEPH_CAP_OP_EXPORT
  14412. CEPH_CAP_OP_FLUSH
  14413. CEPH_CAP_OP_FLUSHSNAP
  14414. CEPH_CAP_OP_FLUSHSNAP_ACK
  14415. CEPH_CAP_OP_FLUSH_ACK
  14416. CEPH_CAP_OP_GRANT
  14417. CEPH_CAP_OP_IMPORT
  14418. CEPH_CAP_OP_RELEASE
  14419. CEPH_CAP_OP_RENEW
  14420. CEPH_CAP_OP_REVOKE
  14421. CEPH_CAP_OP_TRUNC
  14422. CEPH_CAP_OP_UPDATE
  14423. CEPH_CAP_PIN
  14424. CEPH_CAP_SAUTH
  14425. CEPH_CAP_SFILE
  14426. CEPH_CAP_SFLOCK
  14427. CEPH_CAP_SIMPLE_BITS
  14428. CEPH_CAP_SLINK
  14429. CEPH_CAP_SXATTR
  14430. CEPH_CAP_XATTR_EXCL
  14431. CEPH_CAP_XATTR_SHARED
  14432. CEPH_CLIENT_CAPS_NO_CAPSNAP
  14433. CEPH_CLIENT_CAPS_PENDING_CAPSNAP
  14434. CEPH_CLIENT_CAPS_SYNC
  14435. CEPH_CLS_LOCK_EXCLUSIVE
  14436. CEPH_CLS_LOCK_NONE
  14437. CEPH_CLS_LOCK_SHARED
  14438. CEPH_CRUSH_CRUSH_H
  14439. CEPH_CRUSH_HASH_H
  14440. CEPH_CRUSH_LN_H
  14441. CEPH_CRUSH_MAPPER_H
  14442. CEPH_CRYPTO_AES
  14443. CEPH_CRYPTO_NONE
  14444. CEPH_DEFAULT_CHOOSE_ARGS
  14445. CEPH_DEFINE_OID_ONSTACK
  14446. CEPH_DEFINE_RW_CONTEXT
  14447. CEPH_DEFINE_SHOW_FUNC
  14448. CEPH_DENTRY_LEASE_LIST
  14449. CEPH_DENTRY_REFERENCED
  14450. CEPH_DENTRY_SHRINK_LIST
  14451. CEPH_ENCODING_START_BLK_LEN
  14452. CEPH_ENTITY_ADDR_TYPE_LEGACY
  14453. CEPH_ENTITY_ADDR_TYPE_NONE
  14454. CEPH_ENTITY_TYPE_ANY
  14455. CEPH_ENTITY_TYPE_AUTH
  14456. CEPH_ENTITY_TYPE_CLIENT
  14457. CEPH_ENTITY_TYPE_MDS
  14458. CEPH_ENTITY_TYPE_MON
  14459. CEPH_ENTITY_TYPE_OSD
  14460. CEPH_FEATURES_REQUIRED_DEFAULT
  14461. CEPH_FEATURES_SUPPORTED_DEFAULT
  14462. CEPH_FEATURE_INCARNATION_1
  14463. CEPH_FEATURE_INCARNATION_2
  14464. CEPH_FILE_MODE_BITS
  14465. CEPH_FILE_MODE_LAZY
  14466. CEPH_FILE_MODE_PIN
  14467. CEPH_FILE_MODE_RD
  14468. CEPH_FILE_MODE_RDWR
  14469. CEPH_FILE_MODE_WR
  14470. CEPH_FS_CLUSTER_ID_NONE
  14471. CEPH_FS_H
  14472. CEPH_F_ATEND
  14473. CEPH_F_SYNC
  14474. CEPH_HAVE_FEATURE
  14475. CEPH_HOMELESS_OSD
  14476. CEPH_INLINE_NONE
  14477. CEPH_INO_CEPH
  14478. CEPH_INO_DOTDOT
  14479. CEPH_INO_ROOT
  14480. CEPH_IOCTL_MAGIC
  14481. CEPH_IOC_GET_DATALOC
  14482. CEPH_IOC_GET_LAYOUT
  14483. CEPH_IOC_LAZYIO
  14484. CEPH_IOC_SET_LAYOUT
  14485. CEPH_IOC_SET_LAYOUT_POLICY
  14486. CEPH_IOC_SYNCIO
  14487. CEPH_I_CAP_DROPPED
  14488. CEPH_I_DIR_ORDERED
  14489. CEPH_I_ERROR_FILELOCK
  14490. CEPH_I_ERROR_WRITE
  14491. CEPH_I_FLUSH
  14492. CEPH_I_FLUSH_SNAPS
  14493. CEPH_I_KICK_FLUSH
  14494. CEPH_I_NODELAY
  14495. CEPH_I_ODIRECT
  14496. CEPH_I_POOL_PERM
  14497. CEPH_I_POOL_RD
  14498. CEPH_I_POOL_WR
  14499. CEPH_I_SEC_INITED
  14500. CEPH_I_WORK_INVALIDATE_PAGES
  14501. CEPH_I_WORK_VMTRUNCATE
  14502. CEPH_I_WORK_WRITEBACK
  14503. CEPH_LINGER_ID_START
  14504. CEPH_LOCK_DN
  14505. CEPH_LOCK_DVERSION
  14506. CEPH_LOCK_EXCL
  14507. CEPH_LOCK_FCNTL
  14508. CEPH_LOCK_FCNTL_INTR
  14509. CEPH_LOCK_FLOCK
  14510. CEPH_LOCK_FLOCK_INTR
  14511. CEPH_LOCK_IAUTH
  14512. CEPH_LOCK_IDFT
  14513. CEPH_LOCK_IFILE
  14514. CEPH_LOCK_IFLOCK
  14515. CEPH_LOCK_ILINK
  14516. CEPH_LOCK_INEST
  14517. CEPH_LOCK_INO
  14518. CEPH_LOCK_IPOLICY
  14519. CEPH_LOCK_ISNAP
  14520. CEPH_LOCK_IVERSION
  14521. CEPH_LOCK_IXATTR
  14522. CEPH_LOCK_SHARED
  14523. CEPH_LOCK_UNLOCK
  14524. CEPH_MAXSNAP
  14525. CEPH_MAX_DIRFRAG_REP
  14526. CEPH_MAX_MON
  14527. CEPH_MAX_READDIR_BYTES_DEFAULT
  14528. CEPH_MAX_READDIR_DEFAULT
  14529. CEPH_MAX_READ_SIZE
  14530. CEPH_MAX_WRITE_SIZE
  14531. CEPH_MDSC_PROTOCOL
  14532. CEPH_MDSMAP_DOWN
  14533. CEPH_MDS_FLAG_REPLAY
  14534. CEPH_MDS_FLAG_WANT_DENTRY
  14535. CEPH_MDS_LEASE_RELEASE
  14536. CEPH_MDS_LEASE_RENEW
  14537. CEPH_MDS_LEASE_REVOKE
  14538. CEPH_MDS_LEASE_REVOKE_ACK
  14539. CEPH_MDS_OP_CREATE
  14540. CEPH_MDS_OP_GETATTR
  14541. CEPH_MDS_OP_GETFILELOCK
  14542. CEPH_MDS_OP_LINK
  14543. CEPH_MDS_OP_LOOKUP
  14544. CEPH_MDS_OP_LOOKUPHASH
  14545. CEPH_MDS_OP_LOOKUPINO
  14546. CEPH_MDS_OP_LOOKUPNAME
  14547. CEPH_MDS_OP_LOOKUPPARENT
  14548. CEPH_MDS_OP_LOOKUPSNAP
  14549. CEPH_MDS_OP_LSSNAP
  14550. CEPH_MDS_OP_MKDIR
  14551. CEPH_MDS_OP_MKNOD
  14552. CEPH_MDS_OP_MKSNAP
  14553. CEPH_MDS_OP_OPEN
  14554. CEPH_MDS_OP_READDIR
  14555. CEPH_MDS_OP_RENAME
  14556. CEPH_MDS_OP_RENAMESNAP
  14557. CEPH_MDS_OP_RMDIR
  14558. CEPH_MDS_OP_RMSNAP
  14559. CEPH_MDS_OP_RMXATTR
  14560. CEPH_MDS_OP_SETATTR
  14561. CEPH_MDS_OP_SETDIRLAYOUT
  14562. CEPH_MDS_OP_SETFILELOCK
  14563. CEPH_MDS_OP_SETLAYOUT
  14564. CEPH_MDS_OP_SETXATTR
  14565. CEPH_MDS_OP_SYMLINK
  14566. CEPH_MDS_OP_UNLINK
  14567. CEPH_MDS_OP_WRITE
  14568. CEPH_MDS_R_ABORTED
  14569. CEPH_MDS_R_DID_PREPOPULATE
  14570. CEPH_MDS_R_DIRECT_IS_HASH
  14571. CEPH_MDS_R_GOT_RESULT
  14572. CEPH_MDS_R_GOT_SAFE
  14573. CEPH_MDS_R_GOT_UNSAFE
  14574. CEPH_MDS_R_PARENT_LOCKED
  14575. CEPH_MDS_SESSION_CLOSING
  14576. CEPH_MDS_SESSION_HUNG
  14577. CEPH_MDS_SESSION_NEW
  14578. CEPH_MDS_SESSION_OPEN
  14579. CEPH_MDS_SESSION_OPENING
  14580. CEPH_MDS_SESSION_RECONNECTING
  14581. CEPH_MDS_SESSION_REJECTED
  14582. CEPH_MDS_SESSION_RESTARTING
  14583. CEPH_MDS_STATE_ACTIVE
  14584. CEPH_MDS_STATE_BOOT
  14585. CEPH_MDS_STATE_CLIENTREPLAY
  14586. CEPH_MDS_STATE_CREATING
  14587. CEPH_MDS_STATE_DNE
  14588. CEPH_MDS_STATE_RECONNECT
  14589. CEPH_MDS_STATE_REJOIN
  14590. CEPH_MDS_STATE_REPLAY
  14591. CEPH_MDS_STATE_REPLAYONCE
  14592. CEPH_MDS_STATE_RESOLVE
  14593. CEPH_MDS_STATE_STANDBY
  14594. CEPH_MDS_STATE_STANDBY_REPLAY
  14595. CEPH_MDS_STATE_STARTING
  14596. CEPH_MDS_STATE_STOPPED
  14597. CEPH_MDS_STATE_STOPPING
  14598. CEPH_MIN_STRIPE_UNIT
  14599. CEPH_MONC_HUNT_BACKOFF
  14600. CEPH_MONC_HUNT_INTERVAL
  14601. CEPH_MONC_HUNT_MAX_MULT
  14602. CEPH_MONC_PING_INTERVAL
  14603. CEPH_MONC_PING_TIMEOUT
  14604. CEPH_MONC_PROTOCOL
  14605. CEPH_MON_PORT
  14606. CEPH_MOUNT_MOUNTED
  14607. CEPH_MOUNT_MOUNTING
  14608. CEPH_MOUNT_OPT_CLEANRECOVER
  14609. CEPH_MOUNT_OPT_DCACHE
  14610. CEPH_MOUNT_OPT_DEFAULT
  14611. CEPH_MOUNT_OPT_DIRSTAT
  14612. CEPH_MOUNT_OPT_FSCACHE
  14613. CEPH_MOUNT_OPT_INO32
  14614. CEPH_MOUNT_OPT_MOUNTWAIT
  14615. CEPH_MOUNT_OPT_NOASYNCREADDIR
  14616. CEPH_MOUNT_OPT_NOCOPYFROM
  14617. CEPH_MOUNT_OPT_NOPOOLPERM
  14618. CEPH_MOUNT_OPT_NOQUOTADF
  14619. CEPH_MOUNT_OPT_RBYTES
  14620. CEPH_MOUNT_SHUTDOWN
  14621. CEPH_MOUNT_TIMEOUT_DEFAULT
  14622. CEPH_MOUNT_UNMOUNTED
  14623. CEPH_MOUNT_UNMOUNTING
  14624. CEPH_MSGR_H
  14625. CEPH_MSGR_TAG_ACK
  14626. CEPH_MSGR_TAG_BADAUTHORIZER
  14627. CEPH_MSGR_TAG_BADPROTOVER
  14628. CEPH_MSGR_TAG_CHALLENGE_AUTHORIZER
  14629. CEPH_MSGR_TAG_CLOSE
  14630. CEPH_MSGR_TAG_FEATURES
  14631. CEPH_MSGR_TAG_KEEPALIVE
  14632. CEPH_MSGR_TAG_KEEPALIVE2
  14633. CEPH_MSGR_TAG_KEEPALIVE2_ACK
  14634. CEPH_MSGR_TAG_MSG
  14635. CEPH_MSGR_TAG_READY
  14636. CEPH_MSGR_TAG_RESETSESSION
  14637. CEPH_MSGR_TAG_RETRY_GLOBAL
  14638. CEPH_MSGR_TAG_RETRY_SESSION
  14639. CEPH_MSGR_TAG_SEQ
  14640. CEPH_MSGR_TAG_WAIT
  14641. CEPH_MSG_AUTH
  14642. CEPH_MSG_AUTH_REPLY
  14643. CEPH_MSG_CLIENT_CAPRELEASE
  14644. CEPH_MSG_CLIENT_CAPS
  14645. CEPH_MSG_CLIENT_LEASE
  14646. CEPH_MSG_CLIENT_QUOTA
  14647. CEPH_MSG_CLIENT_RECONNECT
  14648. CEPH_MSG_CLIENT_REPLY
  14649. CEPH_MSG_CLIENT_REQUEST
  14650. CEPH_MSG_CLIENT_REQUEST_FORWARD
  14651. CEPH_MSG_CLIENT_SESSION
  14652. CEPH_MSG_CLIENT_SNAP
  14653. CEPH_MSG_CONNECT_LOSSY
  14654. CEPH_MSG_DATA_BIO
  14655. CEPH_MSG_DATA_BVECS
  14656. CEPH_MSG_DATA_NONE
  14657. CEPH_MSG_DATA_PAGELIST
  14658. CEPH_MSG_DATA_PAGES
  14659. CEPH_MSG_FOOTER_COMPLETE
  14660. CEPH_MSG_FOOTER_NOCRC
  14661. CEPH_MSG_FOOTER_SIGNED
  14662. CEPH_MSG_FS_MAP_USER
  14663. CEPH_MSG_MAX_DATA_LEN
  14664. CEPH_MSG_MAX_FRONT_LEN
  14665. CEPH_MSG_MAX_MIDDLE_LEN
  14666. CEPH_MSG_MDS_MAP
  14667. CEPH_MSG_MON_COMMAND
  14668. CEPH_MSG_MON_COMMAND_ACK
  14669. CEPH_MSG_MON_GET_MAP
  14670. CEPH_MSG_MON_GET_VERSION
  14671. CEPH_MSG_MON_GET_VERSION_REPLY
  14672. CEPH_MSG_MON_MAP
  14673. CEPH_MSG_MON_SUBSCRIBE
  14674. CEPH_MSG_MON_SUBSCRIBE_ACK
  14675. CEPH_MSG_OSD_BACKOFF
  14676. CEPH_MSG_OSD_MAP
  14677. CEPH_MSG_OSD_OP
  14678. CEPH_MSG_OSD_OPREPLY
  14679. CEPH_MSG_PING
  14680. CEPH_MSG_POOLOP
  14681. CEPH_MSG_POOLOP_REPLY
  14682. CEPH_MSG_PRIO_DEFAULT
  14683. CEPH_MSG_PRIO_HIGH
  14684. CEPH_MSG_PRIO_HIGHEST
  14685. CEPH_MSG_PRIO_LOW
  14686. CEPH_MSG_SHUTDOWN
  14687. CEPH_MSG_STATFS
  14688. CEPH_MSG_STATFS_REPLY
  14689. CEPH_MSG_WATCH_NOTIFY
  14690. CEPH_NOPOOL
  14691. CEPH_NOSNAP
  14692. CEPH_OBJECT_LAYOUT_HASH
  14693. CEPH_OBJECT_LAYOUT_HASHINO
  14694. CEPH_OBJECT_LAYOUT_LINEAR
  14695. CEPH_OID_INLINE_LEN
  14696. CEPH_OPT_ABORT_ON_FULL
  14697. CEPH_OPT_DEFAULT
  14698. CEPH_OPT_FSID
  14699. CEPH_OPT_MYIP
  14700. CEPH_OPT_NOCRC
  14701. CEPH_OPT_NOMSGAUTH
  14702. CEPH_OPT_NOMSGSIGN
  14703. CEPH_OPT_NOSHARE
  14704. CEPH_OPT_TCP_NODELAY
  14705. CEPH_OSDC_PROTOCOL
  14706. CEPH_OSDMAP_FULL
  14707. CEPH_OSDMAP_NEARFULL
  14708. CEPH_OSDMAP_NOBACKFILL
  14709. CEPH_OSDMAP_NODEEP_SCRUB
  14710. CEPH_OSDMAP_NODOWN
  14711. CEPH_OSDMAP_NOIN
  14712. CEPH_OSDMAP_NOOUT
  14713. CEPH_OSDMAP_NOREBALANCE
  14714. CEPH_OSDMAP_NORECOVER
  14715. CEPH_OSDMAP_NOSCRUB
  14716. CEPH_OSDMAP_NOTIERAGENT
  14717. CEPH_OSDMAP_NOUP
  14718. CEPH_OSDMAP_PAUSERD
  14719. CEPH_OSDMAP_PAUSEREC
  14720. CEPH_OSDMAP_PAUSEWR
  14721. CEPH_OSDMAP_RECOVERY_DELETES
  14722. CEPH_OSDMAP_REQUIRE_JEWEL
  14723. CEPH_OSDMAP_REQUIRE_KRAKEN
  14724. CEPH_OSDMAP_REQUIRE_LUMINOUS
  14725. CEPH_OSDMAP_SORTBITWISE
  14726. CEPH_OSD_AUTOOUT
  14727. CEPH_OSD_BACKOFF_OP_ACK_BLOCK
  14728. CEPH_OSD_BACKOFF_OP_BLOCK
  14729. CEPH_OSD_BACKOFF_OP_UNBLOCK
  14730. CEPH_OSD_CMPXATTR_MODE_STRING
  14731. CEPH_OSD_CMPXATTR_MODE_U64
  14732. CEPH_OSD_CMPXATTR_OP_EQ
  14733. CEPH_OSD_CMPXATTR_OP_GT
  14734. CEPH_OSD_CMPXATTR_OP_GTE
  14735. CEPH_OSD_CMPXATTR_OP_LT
  14736. CEPH_OSD_CMPXATTR_OP_LTE
  14737. CEPH_OSD_CMPXATTR_OP_NE
  14738. CEPH_OSD_CMPXATTR_OP_NOP
  14739. CEPH_OSD_COPY_FROM_FLAG_FLUSH
  14740. CEPH_OSD_COPY_FROM_FLAG_IGNORE_CACHE
  14741. CEPH_OSD_COPY_FROM_FLAG_IGNORE_OVERLAY
  14742. CEPH_OSD_COPY_FROM_FLAG_MAP_SNAP_CLONE
  14743. CEPH_OSD_COPY_FROM_FLAG_RWORDERED
  14744. CEPH_OSD_DATA_TYPE_BIO
  14745. CEPH_OSD_DATA_TYPE_BVECS
  14746. CEPH_OSD_DATA_TYPE_NONE
  14747. CEPH_OSD_DATA_TYPE_PAGELIST
  14748. CEPH_OSD_DATA_TYPE_PAGES
  14749. CEPH_OSD_DEFAULT_PRIMARY_AFFINITY
  14750. CEPH_OSD_EXISTS
  14751. CEPH_OSD_FLAG_ACK
  14752. CEPH_OSD_FLAG_BALANCE_READS
  14753. CEPH_OSD_FLAG_ENFORCE_SNAPC
  14754. CEPH_OSD_FLAG_EXEC
  14755. CEPH_OSD_FLAG_EXEC_PUBLIC
  14756. CEPH_OSD_FLAG_FLUSH
  14757. CEPH_OSD_FLAG_FULL_FORCE
  14758. CEPH_OSD_FLAG_FULL_TRY
  14759. CEPH_OSD_FLAG_IGNORE_CACHE
  14760. CEPH_OSD_FLAG_IGNORE_OVERLAY
  14761. CEPH_OSD_FLAG_KNOWN_REDIR
  14762. CEPH_OSD_FLAG_LOCALIZE_READS
  14763. CEPH_OSD_FLAG_MAP_SNAP_CLONE
  14764. CEPH_OSD_FLAG_ONDISK
  14765. CEPH_OSD_FLAG_ONNVRAM
  14766. CEPH_OSD_FLAG_ORDERSNAP
  14767. CEPH_OSD_FLAG_PARALLELEXEC
  14768. CEPH_OSD_FLAG_PEERSTAT_OLD
  14769. CEPH_OSD_FLAG_PGOP
  14770. CEPH_OSD_FLAG_READ
  14771. CEPH_OSD_FLAG_REDIRECTED
  14772. CEPH_OSD_FLAG_RETRY
  14773. CEPH_OSD_FLAG_RWORDERED
  14774. CEPH_OSD_FLAG_SKIPRWLOCKS
  14775. CEPH_OSD_FLAG_WRITE
  14776. CEPH_OSD_IDLE_TTL_DEFAULT
  14777. CEPH_OSD_IN
  14778. CEPH_OSD_KEEPALIVE_DEFAULT
  14779. CEPH_OSD_MAX_OPS
  14780. CEPH_OSD_MAX_PRIMARY_AFFINITY
  14781. CEPH_OSD_NEW
  14782. CEPH_OSD_OP_
  14783. CEPH_OSD_OP_FLAG_EXCL
  14784. CEPH_OSD_OP_FLAG_FADVISE_DONTNEED
  14785. CEPH_OSD_OP_FLAG_FADVISE_NOCACHE
  14786. CEPH_OSD_OP_FLAG_FADVISE_RANDOM
  14787. CEPH_OSD_OP_FLAG_FADVISE_SEQUENTIAL
  14788. CEPH_OSD_OP_FLAG_FADVISE_WILLNEED
  14789. CEPH_OSD_OP_FLAG_FAILOK
  14790. CEPH_OSD_OP_MODE
  14791. CEPH_OSD_OP_MODE_CACHE
  14792. CEPH_OSD_OP_MODE_RD
  14793. CEPH_OSD_OP_MODE_RMW
  14794. CEPH_OSD_OP_MODE_SUB
  14795. CEPH_OSD_OP_MODE_WR
  14796. CEPH_OSD_OP_TYPE
  14797. CEPH_OSD_OP_TYPE_ATTR
  14798. CEPH_OSD_OP_TYPE_DATA
  14799. CEPH_OSD_OP_TYPE_EXEC
  14800. CEPH_OSD_OP_TYPE_LOCK
  14801. CEPH_OSD_OP_TYPE_MULTI
  14802. CEPH_OSD_OP_TYPE_PG
  14803. CEPH_OSD_OUT
  14804. CEPH_OSD_REQUEST_TIMEOUT_DEFAULT
  14805. CEPH_OSD_SLAB_OPS
  14806. CEPH_OSD_TMAP_CREATE
  14807. CEPH_OSD_TMAP_HDR
  14808. CEPH_OSD_TMAP_RM
  14809. CEPH_OSD_TMAP_RMSLOPPY
  14810. CEPH_OSD_TMAP_SET
  14811. CEPH_OSD_UP
  14812. CEPH_OSD_WATCH_OP_LEGACY_WATCH
  14813. CEPH_OSD_WATCH_OP_PING
  14814. CEPH_OSD_WATCH_OP_RECONNECT
  14815. CEPH_OSD_WATCH_OP_UNWATCH
  14816. CEPH_OSD_WATCH_OP_WATCH
  14817. CEPH_O_CREAT
  14818. CEPH_O_DIRECTORY
  14819. CEPH_O_EXCL
  14820. CEPH_O_NOFOLLOW
  14821. CEPH_O_RDONLY
  14822. CEPH_O_RDWR
  14823. CEPH_O_TRUNC
  14824. CEPH_O_WRONLY
  14825. CEPH_PGID_ENCODING_LEN
  14826. CEPH_PG_LAYOUT_CRUSH
  14827. CEPH_PG_LAYOUT_HASH
  14828. CEPH_PG_LAYOUT_HYBRID
  14829. CEPH_PG_LAYOUT_LINEAR
  14830. CEPH_PG_MAX_SIZE
  14831. CEPH_POOL_FLAG_FULL
  14832. CEPH_POOL_FLAG_FULL_QUOTA
  14833. CEPH_POOL_FLAG_HASHPSPOOL
  14834. CEPH_POOL_FLAG_NEARFULL
  14835. CEPH_POOL_TYPE_EC
  14836. CEPH_POOL_TYPE_RAID4
  14837. CEPH_POOL_TYPE_REP
  14838. CEPH_PORT_FIRST
  14839. CEPH_PORT_LAST
  14840. CEPH_PORT_START
  14841. CEPH_RADOS_H
  14842. CEPH_RASIZE_DEFAULT
  14843. CEPH_RBD_TYPES_H
  14844. CEPH_READDIR_FRAG_COMPLETE
  14845. CEPH_READDIR_FRAG_END
  14846. CEPH_READDIR_HASH_ORDER
  14847. CEPH_READDIR_OFFSET_HASH
  14848. CEPH_READDIR_REPLY_BITFLAGS
  14849. CEPH_SESSION_CLOSE
  14850. CEPH_SESSION_FLUSHMSG
  14851. CEPH_SESSION_FLUSHMSG_ACK
  14852. CEPH_SESSION_FORCE_RO
  14853. CEPH_SESSION_OPEN
  14854. CEPH_SESSION_RECALL_STATE
  14855. CEPH_SESSION_REJECT
  14856. CEPH_SESSION_RENEWCAPS
  14857. CEPH_SESSION_REQUEST_CLOSE
  14858. CEPH_SESSION_REQUEST_OPEN
  14859. CEPH_SESSION_REQUEST_RENEWCAPS
  14860. CEPH_SESSION_STALE
  14861. CEPH_SETATTR_ATIME
  14862. CEPH_SETATTR_CTIME
  14863. CEPH_SETATTR_GID
  14864. CEPH_SETATTR_MODE
  14865. CEPH_SETATTR_MTIME
  14866. CEPH_SETATTR_SIZE
  14867. CEPH_SETATTR_UID
  14868. CEPH_SNAPDIR
  14869. CEPH_SNAPDIRNAME_DEFAULT
  14870. CEPH_SNAPID_MAP_TIMEOUT
  14871. CEPH_SNAP_OP_CREATE
  14872. CEPH_SNAP_OP_DESTROY
  14873. CEPH_SNAP_OP_SPLIT
  14874. CEPH_SNAP_OP_UPDATE
  14875. CEPH_SPG_NOSHARD
  14876. CEPH_STAT_CAP_ATIME
  14877. CEPH_STAT_CAP_GID
  14878. CEPH_STAT_CAP_INLINE_DATA
  14879. CEPH_STAT_CAP_INODE
  14880. CEPH_STAT_CAP_INODE_ALL
  14881. CEPH_STAT_CAP_LAYOUT
  14882. CEPH_STAT_CAP_MODE
  14883. CEPH_STAT_CAP_MTIME
  14884. CEPH_STAT_CAP_NLINK
  14885. CEPH_STAT_CAP_SIZE
  14886. CEPH_STAT_CAP_SYMLINK
  14887. CEPH_STAT_CAP_TYPE
  14888. CEPH_STAT_CAP_UID
  14889. CEPH_STAT_CAP_XATTR
  14890. CEPH_STAT_RSTAT
  14891. CEPH_STR_HASH_LINUX
  14892. CEPH_STR_HASH_RJENKINS
  14893. CEPH_SUBSCRIBE_ONETIME
  14894. CEPH_SUB_FSMAP
  14895. CEPH_SUB_MDSMAP
  14896. CEPH_SUB_MONMAP
  14897. CEPH_SUB_OSDMAP
  14898. CEPH_SUPER_MAGIC
  14899. CEPH_WATCH_EVENT_DISCONNECT
  14900. CEPH_WATCH_EVENT_NOTIFY
  14901. CEPH_WATCH_EVENT_NOTIFY_COMPLETE
  14902. CEPH_XATTR_CREATE
  14903. CEPH_XATTR_NAME
  14904. CEPH_XATTR_NAME2
  14905. CEPH_XATTR_REMOVE
  14906. CEPH_XATTR_REPLACE
  14907. CEQE_DATA
  14908. CEQE_DATA_MASK
  14909. CEQE_TYPE
  14910. CEQE_TYPE_MASK
  14911. CEQE_TYPE_SHIFT
  14912. CEQ_CREATED
  14913. CEQ_REG_OFFSET
  14914. CEQ_SET
  14915. CER
  14916. CERCR
  14917. CERF_ETH_IO
  14918. CERF_ETH_IRQ
  14919. CERF_FLASH_SIZE
  14920. CERF_GPIO_CF_BVD1
  14921. CERF_GPIO_CF_BVD2
  14922. CERF_GPIO_CF_CD
  14923. CERF_GPIO_CF_IRQ
  14924. CERF_GPIO_CF_RESET
  14925. CERR
  14926. CERR_EN
  14927. CERT_SYM
  14928. CESA_CRYPTO_DEFAULT_MAX_QLEN
  14929. CESA_DMA_REQ
  14930. CESA_ENGINE_OFF
  14931. CESA_HASH_BLOCK_SIZE_MSK
  14932. CESA_IVDIG
  14933. CESA_MAX_HASH_BLOCK_SIZE
  14934. CESA_SA_ACCEL_STATUS
  14935. CESA_SA_CFG
  14936. CESA_SA_CFG_ACT_CH0_IDMA
  14937. CESA_SA_CFG_ACT_CH1_IDMA
  14938. CESA_SA_CFG_CH0_W_IDMA
  14939. CESA_SA_CFG_CH1_W_IDMA
  14940. CESA_SA_CFG_DIG_ERR_CONT
  14941. CESA_SA_CFG_DIG_ERR_SKIP
  14942. CESA_SA_CFG_DIG_ERR_STOP
  14943. CESA_SA_CFG_MULTI_PKT
  14944. CESA_SA_CFG_PARA_DIS
  14945. CESA_SA_CFG_SRAM_OFFSET
  14946. CESA_SA_CFG_STOP_DIG_ERR
  14947. CESA_SA_CMD
  14948. CESA_SA_CMD_DISABLE_SEC
  14949. CESA_SA_CMD_EN_CESA_SA_ACCL0
  14950. CESA_SA_CMD_EN_CESA_SA_ACCL1
  14951. CESA_SA_CRYPT_IV_SRAM_OFFSET
  14952. CESA_SA_CRYPT_KEY_SRAM_OFFSET
  14953. CESA_SA_DATA_SRAM_OFFSET
  14954. CESA_SA_DEFAULT_SRAM_SIZE
  14955. CESA_SA_DESC_CFG_3DES_EDE
  14956. CESA_SA_DESC_CFG_3DES_EEE
  14957. CESA_SA_DESC_CFG_AES_LEN_128
  14958. CESA_SA_DESC_CFG_AES_LEN_192
  14959. CESA_SA_DESC_CFG_AES_LEN_256
  14960. CESA_SA_DESC_CFG_AES_LEN_MSK
  14961. CESA_SA_DESC_CFG_CRYPTCM_CBC
  14962. CESA_SA_DESC_CFG_CRYPTCM_ECB
  14963. CESA_SA_DESC_CFG_CRYPTCM_MSK
  14964. CESA_SA_DESC_CFG_CRYPTM_3DES
  14965. CESA_SA_DESC_CFG_CRYPTM_AES
  14966. CESA_SA_DESC_CFG_CRYPTM_DES
  14967. CESA_SA_DESC_CFG_CRYPTM_MSK
  14968. CESA_SA_DESC_CFG_DIR_DEC
  14969. CESA_SA_DESC_CFG_DIR_ENC
  14970. CESA_SA_DESC_CFG_FIRST_FRAG
  14971. CESA_SA_DESC_CFG_FRAG_MSK
  14972. CESA_SA_DESC_CFG_LAST_FRAG
  14973. CESA_SA_DESC_CFG_MACM_HMAC_MD5
  14974. CESA_SA_DESC_CFG_MACM_HMAC_SHA1
  14975. CESA_SA_DESC_CFG_MACM_HMAC_SHA256
  14976. CESA_SA_DESC_CFG_MACM_MD5
  14977. CESA_SA_DESC_CFG_MACM_MSK
  14978. CESA_SA_DESC_CFG_MACM_SHA1
  14979. CESA_SA_DESC_CFG_MACM_SHA256
  14980. CESA_SA_DESC_CFG_MID_FRAG
  14981. CESA_SA_DESC_CFG_NOT_FRAG
  14982. CESA_SA_DESC_CFG_OP_CRYPT_MAC
  14983. CESA_SA_DESC_CFG_OP_CRYPT_ONLY
  14984. CESA_SA_DESC_CFG_OP_MAC_CRYPT
  14985. CESA_SA_DESC_CFG_OP_MAC_ONLY
  14986. CESA_SA_DESC_CFG_OP_MSK
  14987. CESA_SA_DESC_CRYPT_DATA
  14988. CESA_SA_DESC_CRYPT_IV
  14989. CESA_SA_DESC_CRYPT_KEY
  14990. CESA_SA_DESC_MAC_DATA
  14991. CESA_SA_DESC_MAC_DATA_MSK
  14992. CESA_SA_DESC_MAC_DIGEST
  14993. CESA_SA_DESC_MAC_DIGEST_MSK
  14994. CESA_SA_DESC_MAC_FRAG_LEN
  14995. CESA_SA_DESC_MAC_FRAG_LEN_MSK
  14996. CESA_SA_DESC_MAC_IV
  14997. CESA_SA_DESC_MAC_SRC_TOTAL_LEN_MAX
  14998. CESA_SA_DESC_MAC_TOTAL_LEN
  14999. CESA_SA_DESC_MAC_TOTAL_LEN_MSK
  15000. CESA_SA_DESC_P0
  15001. CESA_SA_DESC_P1
  15002. CESA_SA_FPGA_INT_STATUS
  15003. CESA_SA_INT_ACC0_IDMA_DONE
  15004. CESA_SA_INT_ACC1_IDMA_DONE
  15005. CESA_SA_INT_ACCEL0_DONE
  15006. CESA_SA_INT_ACCEL1_DONE
  15007. CESA_SA_INT_AES_D_DONE
  15008. CESA_SA_INT_AES_E_DONE
  15009. CESA_SA_INT_AUTH_DONE
  15010. CESA_SA_INT_DES_E_DONE
  15011. CESA_SA_INT_ENC_DONE
  15012. CESA_SA_INT_IDMA_DONE
  15013. CESA_SA_INT_IDMA_OWN_ERR
  15014. CESA_SA_INT_MSK
  15015. CESA_SA_INT_STATUS
  15016. CESA_SA_MAC_DIG_SRAM_OFFSET
  15017. CESA_SA_MAC_IIV_SRAM_OFFSET
  15018. CESA_SA_MAC_OIV_SRAM_OFFSET
  15019. CESA_SA_MIN_SRAM_SIZE
  15020. CESA_SA_SRAM_MSK
  15021. CESA_SA_SRAM_PAYLOAD_SIZE
  15022. CESA_SA_SRAM_SIZE
  15023. CESA_SA_ST_ACT_0
  15024. CESA_SA_ST_ACT_1
  15025. CESA_STD_REQ
  15026. CESA_TDMA_ACT
  15027. CESA_TDMA_BREAK_CHAIN
  15028. CESA_TDMA_BYTE_CNT
  15029. CESA_TDMA_BYTE_SWAP
  15030. CESA_TDMA_CHAIN
  15031. CESA_TDMA_CONTROL
  15032. CESA_TDMA_CUR
  15033. CESA_TDMA_DATA
  15034. CESA_TDMA_DST_ADDR
  15035. CESA_TDMA_DST_BURST
  15036. CESA_TDMA_DST_BURST_128B
  15037. CESA_TDMA_DST_BURST_32B
  15038. CESA_TDMA_DST_IN_SRAM
  15039. CESA_TDMA_DUMMY
  15040. CESA_TDMA_EN
  15041. CESA_TDMA_END_OF_REQ
  15042. CESA_TDMA_ERROR_CAUSE
  15043. CESA_TDMA_ERROR_MSK
  15044. CESA_TDMA_FETCH_ND
  15045. CESA_TDMA_NEXT_ADDR
  15046. CESA_TDMA_NO_BYTE_SWAP
  15047. CESA_TDMA_OP
  15048. CESA_TDMA_OUT_RD_EN
  15049. CESA_TDMA_RESULT
  15050. CESA_TDMA_SET_STATE
  15051. CESA_TDMA_SRC_ADDR
  15052. CESA_TDMA_SRC_BURST
  15053. CESA_TDMA_SRC_BURST_128B
  15054. CESA_TDMA_SRC_BURST_32B
  15055. CESA_TDMA_SRC_IN_SRAM
  15056. CESA_TDMA_TYPE_MSK
  15057. CESA_TDMA_WINDOW_BASE
  15058. CESA_TDMA_WINDOW_CTRL
  15059. CESTATUS_ACCESS
  15060. CESTATUS_EXCEPT
  15061. CESTATUS_EXENAB
  15062. CESTATUS_FULL
  15063. CESTATUS_IMPEXP
  15064. CESTATUS_INENAB
  15065. CET1180
  15066. CET1376
  15067. CET1573
  15068. CET1769
  15069. CET1966
  15070. CET197
  15071. CET2163
  15072. CET2359
  15073. CET2556
  15074. CET2763
  15075. CET2949
  15076. CET3146
  15077. CET393
  15078. CET590
  15079. CET786
  15080. CEU1
  15081. CEU_BUFFER_MEMORY_SIZE
  15082. CEU_CAIFR
  15083. CEU_CAMCR
  15084. CEU_CAMCR_DTARY_8_UYVY
  15085. CEU_CAMCR_DTARY_8_VYUY
  15086. CEU_CAMCR_DTARY_8_YUYV
  15087. CEU_CAMCR_DTARY_8_YVYU
  15088. CEU_CAMCR_DTIF_16BITS
  15089. CEU_CAMCR_JPEG
  15090. CEU_CAMOR
  15091. CEU_CAPCR
  15092. CEU_CAPCR_BUS_WIDTH256
  15093. CEU_CAPCR_CTNCP
  15094. CEU_CAPSR
  15095. CEU_CAPSR_CE
  15096. CEU_CAPSR_CPKIL
  15097. CEU_CAPWR
  15098. CEU_CDACR
  15099. CEU_CDAYR
  15100. CEU_CDOCR
  15101. CEU_CDOCR_NO_DOWSAMPLE
  15102. CEU_CDOCR_SWAP_ENDIANNESS
  15103. CEU_CDWDR
  15104. CEU_CEIER
  15105. CEU_CEIER_CPE
  15106. CEU_CEIER_MASK
  15107. CEU_CEIER_VBP
  15108. CEU_CETCR
  15109. CEU_CETCR_ALL_IRQS_RZ
  15110. CEU_CETCR_ALL_IRQS_SH4
  15111. CEU_CETCR_IGRW
  15112. CEU_CFLCR
  15113. CEU_CFSZR
  15114. CEU_CFWCR
  15115. CEU_CLOCK
  15116. CEU_CRCMPR
  15117. CEU_CRCNTR
  15118. CEU_CSRTR
  15119. CEU_CSTRST_CPTON
  15120. CEU_CSTSR
  15121. CEU_H_MAX
  15122. CEU_IRQ
  15123. CEU_MAX_BPL
  15124. CEU_MAX_HEIGHT
  15125. CEU_MAX_SUBDEVS
  15126. CEU_MAX_WIDTH
  15127. CEU_MCLK_FREQ
  15128. CEU_W_MAX
  15129. CEVA_FLAG_BROKEN_GEN2
  15130. CEVTIND_BEI
  15131. CEVTIND_CHIP_SJA1000
  15132. CEVTIND_DOI
  15133. CEVTIND_EI
  15134. CEVTIND_FULL
  15135. CEVTIND_LOST
  15136. CEV_ISR0_OFFSET
  15137. CEV_ISR_SIZE
  15138. CEX2A_CLEANUP_TIME
  15139. CEX2A_MAX_MESSAGE_SIZE
  15140. CEX2A_MAX_MOD_SIZE
  15141. CEX2A_MAX_RESPONSE_SIZE
  15142. CEX2A_MIN_MOD_SIZE
  15143. CEX2C_CLEANUP_TIME
  15144. CEX2C_MAX_MOD_SIZE
  15145. CEX2C_MAX_XCRB_MESSAGE_SIZE
  15146. CEX2C_MIN_MOD_SIZE
  15147. CEX3A_CLEANUP_TIME
  15148. CEX3A_MAX_MESSAGE_SIZE
  15149. CEX3A_MAX_MOD_SIZE
  15150. CEX3A_MAX_RESPONSE_SIZE
  15151. CEX3A_MIN_MOD_SIZE
  15152. CEX3C_MAX_MOD_SIZE
  15153. CEX3C_MIN_MOD_SIZE
  15154. CEX4A_MAX_MESSAGE_SIZE
  15155. CEX4A_MAX_MOD_SIZE_2K
  15156. CEX4A_MAX_MOD_SIZE_4K
  15157. CEX4A_MIN_MOD_SIZE
  15158. CEX4C_MAX_MESSAGE_SIZE
  15159. CEX4C_MAX_MOD_SIZE
  15160. CEX4C_MIN_MOD_SIZE
  15161. CEX4_CLEANUP_TIME
  15162. CEXPR_AND
  15163. CEXPR_ATTR
  15164. CEXPR_DOM
  15165. CEXPR_DOMBY
  15166. CEXPR_EQ
  15167. CEXPR_H1H2
  15168. CEXPR_H1L2
  15169. CEXPR_INCOMP
  15170. CEXPR_L1H1
  15171. CEXPR_L1H2
  15172. CEXPR_L1L2
  15173. CEXPR_L2H2
  15174. CEXPR_MAXDEPTH
  15175. CEXPR_NAMES
  15176. CEXPR_NEQ
  15177. CEXPR_NOT
  15178. CEXPR_OR
  15179. CEXPR_ROLE
  15180. CEXPR_TARGET
  15181. CEXPR_TYPE
  15182. CEXPR_USER
  15183. CEXPR_XTARGET
  15184. CEXXC_MAX_ICA_RESPONSE_SIZE
  15185. CEXXC_RESPONSE_TYPE_EP11
  15186. CEXXC_RESPONSE_TYPE_ICA
  15187. CEXXC_RESPONSE_TYPE_XCRB
  15188. CE_ADDR_OFST
  15189. CE_ATTR_BYTE_SWAP_DATA
  15190. CE_ATTR_DIS_INTR
  15191. CE_ATTR_FLAGS
  15192. CE_ATTR_NO_SNOOP
  15193. CE_ATTR_POLL
  15194. CE_ATTR_SWIZZLE_DESCRIPTORS
  15195. CE_BREAKPOINT_BITPOS
  15196. CE_BUFFER_SIZE
  15197. CE_CNTL_STORE_PARITY_ERROR_BITPOS
  15198. CE_COMM_EXEC__A
  15199. CE_CONTROL_REG
  15200. CE_COUNT
  15201. CE_COUNT_MAX
  15202. CE_DATA_31_0_OFST
  15203. CE_DDR_DRRI_SHIFT
  15204. CE_DDR_RRI_MASK
  15205. CE_DESC_ADDR_HI_MASK
  15206. CE_DESC_ADDR_MASK
  15207. CE_DESC_FLAGS_BYTE_SWAP
  15208. CE_DESC_FLAGS_GATHER
  15209. CE_DESC_FLAGS_HOST_INT_DIS
  15210. CE_DESC_FLAGS_META_DATA_LSB
  15211. CE_DESC_FLAGS_META_DATA_MASK
  15212. CE_DESC_FLAGS_TGT_INT_DIS
  15213. CE_DESC_RING_ALIGN
  15214. CE_DESC_SIZE
  15215. CE_DESC_SIZE_64
  15216. CE_DEST_RING_TO_DESC
  15217. CE_DEST_RING_TO_DESC_64
  15218. CE_DIAG_PIPE
  15219. CE_ENABLE_BITPOS
  15220. CE_ERR
  15221. CE_HTT_H2T_MSG_SRC_NENTRIES
  15222. CE_INTERRUPT_SUMMARY
  15223. CE_INUSE_CONTEXTS
  15224. CE_INUSE_CONTEXTS_BITPOS
  15225. CE_INVERT1
  15226. CE_INVERT2
  15227. CE_LMADDR_0_GLOBAL_BITPOS
  15228. CE_LMADDR_1_GLOBAL_BITPOS
  15229. CE_LOG_BITPOS_MASK
  15230. CE_LOG_BITPOS_SHIFT
  15231. CE_LOG_OFST
  15232. CE_NN_MODE
  15233. CE_NN_MODE_BITPOS
  15234. CE_PARTITION_BASE
  15235. CE_POLL_PIPE
  15236. CE_RECV_FLAG_SWAPPED
  15237. CE_REG_ATT__A
  15238. CE_REG_AVG_POW__A
  15239. CE_REG_COMM_EXEC__A
  15240. CE_REG_FI_EXP_NORM__A
  15241. CE_REG_FI_SHT_INCR__A
  15242. CE_REG_FR_BYPASS__A
  15243. CE_REG_FR_ERR_SH__A
  15244. CE_REG_FR_MAN_SH__A
  15245. CE_REG_FR_MID_TAP__A
  15246. CE_REG_FR_MODE__A
  15247. CE_REG_FR_PM_SET__A
  15248. CE_REG_FR_RIO_G00__A
  15249. CE_REG_FR_RIO_G01__A
  15250. CE_REG_FR_RIO_G02__A
  15251. CE_REG_FR_RIO_G03__A
  15252. CE_REG_FR_RIO_G04__A
  15253. CE_REG_FR_RIO_G05__A
  15254. CE_REG_FR_RIO_G06__A
  15255. CE_REG_FR_RIO_G07__A
  15256. CE_REG_FR_RIO_G08__A
  15257. CE_REG_FR_RIO_G09__A
  15258. CE_REG_FR_RIO_G10__A
  15259. CE_REG_FR_RIO_GAIN__A
  15260. CE_REG_FR_SQS_G00__A
  15261. CE_REG_FR_SQS_G01__A
  15262. CE_REG_FR_SQS_G02__A
  15263. CE_REG_FR_SQS_G03__A
  15264. CE_REG_FR_SQS_G04__A
  15265. CE_REG_FR_SQS_G05__A
  15266. CE_REG_FR_SQS_G06__A
  15267. CE_REG_FR_SQS_G07__A
  15268. CE_REG_FR_SQS_G08__A
  15269. CE_REG_FR_SQS_G09__A
  15270. CE_REG_FR_SQS_G10__A
  15271. CE_REG_FR_SQS_G11__A
  15272. CE_REG_FR_SQS_G12__A
  15273. CE_REG_FR_SQS_TRH__A
  15274. CE_REG_FR_TAP_SH__A
  15275. CE_REG_FR_TIMAG00__A
  15276. CE_REG_FR_TIMAG01__A
  15277. CE_REG_FR_TIMAG02__A
  15278. CE_REG_FR_TIMAG03__A
  15279. CE_REG_FR_TIMAG04__A
  15280. CE_REG_FR_TIMAG05__A
  15281. CE_REG_FR_TIMAG06__A
  15282. CE_REG_FR_TIMAG07__A
  15283. CE_REG_FR_TIMAG08__A
  15284. CE_REG_FR_TIMAG09__A
  15285. CE_REG_FR_TIMAG10__A
  15286. CE_REG_FR_TIMAG11__A
  15287. CE_REG_FR_TREAL00__A
  15288. CE_REG_FR_TREAL01__A
  15289. CE_REG_FR_TREAL02__A
  15290. CE_REG_FR_TREAL03__A
  15291. CE_REG_FR_TREAL04__A
  15292. CE_REG_FR_TREAL05__A
  15293. CE_REG_FR_TREAL06__A
  15294. CE_REG_FR_TREAL07__A
  15295. CE_REG_FR_TREAL08__A
  15296. CE_REG_FR_TREAL09__A
  15297. CE_REG_FR_TREAL10__A
  15298. CE_REG_FR_TREAL11__A
  15299. CE_REG_IR_INPUTSEL__A
  15300. CE_REG_IR_NEXP_THRES__A
  15301. CE_REG_IR_STARTPOS__A
  15302. CE_REG_MAX_POW__A
  15303. CE_REG_NE_ERR_SELECT__A
  15304. CE_REG_NE_MIXAVG__A
  15305. CE_REG_NE_NUPD_OFS__A
  15306. CE_REG_NE_TD_CAL__A
  15307. CE_REG_NRED__A
  15308. CE_REG_PAR_ERR_BITPOS
  15309. CE_REG_PE_NEXP_OFFS__A
  15310. CE_REG_PE_TIMESHIFT__A
  15311. CE_REG_TAPSET__A
  15312. CE_REG_TI_NEXP_OFFS__A
  15313. CE_REG_TP_A0_MU_LMS_STEP__A
  15314. CE_REG_TP_A0_TAP_NEW_VALID__A
  15315. CE_REG_TP_A0_TAP_NEW__A
  15316. CE_REG_TP_A1_MU_LMS_STEP__A
  15317. CE_REG_TP_A1_TAP_NEW_VALID__A
  15318. CE_REG_TP_A1_TAP_NEW__A
  15319. CE_RING_DELTA
  15320. CE_RING_IDX_ADD
  15321. CE_RING_IDX_INCR
  15322. CE_SEND_FLAG_BYTE_SWAP
  15323. CE_SEND_FLAG_GATHER
  15324. CE_SRC_RING_TO_DESC
  15325. CE_SRC_RING_TO_DESC_64
  15326. CE_WCN3990_DESC_FLAGS_GATHER
  15327. CE_WRAPPER_BASE_ADDRESS
  15328. CE_WRAPPER_INTERRUPT_SUMMARY_ADDRESS
  15329. CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_GET
  15330. CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_LSB
  15331. CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_MASK
  15332. CF
  15333. CF1_MY_ID
  15334. CF1_NO_RES_REP
  15335. CF1_PAR_ENABLE
  15336. CF1_PAR_TEST
  15337. CF1_SLOW_CABLE
  15338. CF1_TEST
  15339. CF284XEXTEND
  15340. CF284XFIFO
  15341. CF284XSELTO
  15342. CF284XSTERM
  15343. CF2_BYTECTRL
  15344. CF2_DMA_PARERR
  15345. CF2_DREQ_HIZ
  15346. CF2_FEATURE_EN
  15347. CF2_PAR_ABORT
  15348. CF2_REG_PARERR
  15349. CF2_RFB
  15350. CF2_SCSI2
  15351. CF3_3B_MSGS
  15352. CF3_ALT_DMA
  15353. CF3_CDB10
  15354. CF3_FASTCLOCK
  15355. CF3_FASTSCSI
  15356. CF3_ID_MSG_CHK
  15357. CF3_SAVERESID
  15358. CF3_THRESH_8
  15359. CF4_BBTE
  15360. CF4_EAN
  15361. CF4_TEST
  15362. CF8305_CARDID
  15363. CF8305_MANFID
  15364. CF8381_CARDID
  15365. CF8381_MANFID
  15366. CF8385_CARDID
  15367. CF8385_MANFID
  15368. CFACT_ABORT
  15369. CFACT_CONTINUE
  15370. CFACT_PAUSE
  15371. CFAG12864BFB_NAME
  15372. CFAG12864B_ADDRESS
  15373. CFAG12864B_ADDRESSES
  15374. CFAG12864B_BIT
  15375. CFAG12864B_BIT_CS1
  15376. CFAG12864B_BIT_CS2
  15377. CFAG12864B_BIT_DI
  15378. CFAG12864B_BIT_E
  15379. CFAG12864B_BPB
  15380. CFAG12864B_CHECK
  15381. CFAG12864B_CONTROLLERS
  15382. CFAG12864B_DOCHECK
  15383. CFAG12864B_HEIGHT
  15384. CFAG12864B_NAME
  15385. CFAG12864B_PAGES
  15386. CFAG12864B_SIZE
  15387. CFAG12864B_WIDTH
  15388. CFAM_GP_MBOX_SBM_ADDR
  15389. CFAM_SBM_SBE_ASYNC_FFDC
  15390. CFAM_SBM_SBE_BOOTED
  15391. CFAM_SBM_SBE_STATE_MASK
  15392. CFAM_SBM_SBE_STATE_SHIFT
  15393. CFAUTOTERM
  15394. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_BATCH_DELETE_SUPPORTED
  15395. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_COUNTER_ALLOC_SUPPORTED
  15396. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_HND_16BIT_SUPPORTED
  15397. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_HND_64BIT_SUPPORTED
  15398. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_RESET_ALL_SUPPORTED
  15399. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_L2_HEADER_SOURCE_FIELDS_SUPPORTED
  15400. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NTUPLE_FLOW_DEST_FUNC_SUPPORTED
  15401. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_RFS_RING_TBL_IDX_SUPPORTED
  15402. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_RX_EEM_FLOW_SUPPORTED
  15403. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_TX_EEM_FLOW_SUPPORTED
  15404. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_UNTAGGED_VLAN_SUPPORTED
  15405. CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_XDP_SUPPORTED
  15406. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_ID
  15407. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_IPADDR
  15408. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_MACADDR
  15409. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_PORT
  15410. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_ETHERTYPE
  15411. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_IPADDR_TYPE
  15412. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_IP_PROTOCOL
  15413. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_IVLAN_VID
  15414. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_MIRROR_VNIC_ID
  15415. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_OVLAN_VID
  15416. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_SRC_IPADDR
  15417. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_SRC_MACADDR
  15418. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_SRC_PORT
  15419. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_TUNNEL_ID
  15420. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE
  15421. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_T_IVLAN_VID
  15422. CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_T_OVLAN_VID
  15423. CFA_DECAP_FILTER_ALLOC_REQ_FLAGS_OVS_TUNNEL
  15424. CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4
  15425. CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV6
  15426. CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_LAST
  15427. CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_UNKNOWN
  15428. CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_LAST
  15429. CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_TCP
  15430. CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_UDP
  15431. CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_UNKNOWN
  15432. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL
  15433. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_GENEVE
  15434. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE
  15435. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1
  15436. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPIP
  15437. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2GRE
  15438. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE
  15439. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_LAST
  15440. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_MPLS
  15441. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL
  15442. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE
  15443. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_STT
  15444. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN
  15445. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6
  15446. CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4
  15447. CFA_EEM_CFG_REQ_FLAGS_PATH_RX
  15448. CFA_EEM_CFG_REQ_FLAGS_PATH_TX
  15449. CFA_EEM_CFG_REQ_FLAGS_PREFERRED_OFFLOAD
  15450. CFA_EEM_CFG_REQ_FLAGS_SECONDARY_PF
  15451. CFA_EEM_OP_REQ_FLAGS_PATH_RX
  15452. CFA_EEM_OP_REQ_FLAGS_PATH_TX
  15453. CFA_EEM_OP_REQ_OP_EEM_CLEANUP
  15454. CFA_EEM_OP_REQ_OP_EEM_DISABLE
  15455. CFA_EEM_OP_REQ_OP_EEM_ENABLE
  15456. CFA_EEM_OP_REQ_OP_LAST
  15457. CFA_EEM_OP_REQ_OP_RESERVED
  15458. CFA_EEM_QCAPS_REQ_FLAGS_PATH_RX
  15459. CFA_EEM_QCAPS_REQ_FLAGS_PATH_TX
  15460. CFA_EEM_QCAPS_REQ_FLAGS_PREFERRED_OFFLOAD
  15461. CFA_EEM_QCAPS_RESP_FLAGS_CENTRALIZED_MEMORY_MODEL_SUPPORTED
  15462. CFA_EEM_QCAPS_RESP_FLAGS_DETACHED_CENTRALIZED_MEMORY_MODEL_SUPPORTED
  15463. CFA_EEM_QCAPS_RESP_FLAGS_PATH_RX
  15464. CFA_EEM_QCAPS_RESP_FLAGS_PATH_TX
  15465. CFA_EEM_QCAPS_RESP_SUPPORTED_EXTERNAL_FLOW_COUNTERS_TABLE
  15466. CFA_EEM_QCAPS_RESP_SUPPORTED_EXTERNAL_RECORD_TABLE
  15467. CFA_EEM_QCAPS_RESP_SUPPORTED_FID_TABLE
  15468. CFA_EEM_QCAPS_RESP_SUPPORTED_KEY0_TABLE
  15469. CFA_EEM_QCAPS_RESP_SUPPORTED_KEY1_TABLE
  15470. CFA_EEM_QCFG_REQ_FLAGS_PATH_RX
  15471. CFA_EEM_QCFG_REQ_FLAGS_PATH_TX
  15472. CFA_EEM_QCFG_RESP_FLAGS_PATH_RX
  15473. CFA_EEM_QCFG_RESP_FLAGS_PATH_TX
  15474. CFA_EEM_QCFG_RESP_FLAGS_PREFERRED_OFFLOAD
  15475. CFA_ENABLE
  15476. CFA_ENCAP_DATA_VXLAN_L3_LAST
  15477. CFA_ENCAP_DATA_VXLAN_L3_VER_IPV4
  15478. CFA_ENCAP_DATA_VXLAN_L3_VER_IPV6
  15479. CFA_ENCAP_DATA_VXLAN_L3_VER_MASK
  15480. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_GENEVE
  15481. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_IPGRE
  15482. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_IPGRE_V1
  15483. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_IPIP
  15484. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_L2GRE
  15485. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_L2_ETYPE
  15486. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_LAST
  15487. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_MPLS
  15488. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_NVGRE
  15489. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VLAN
  15490. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN
  15491. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN_GPE_V6
  15492. CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN_V4
  15493. CFA_ENCAP_RECORD_ALLOC_REQ_FLAGS_EXTERNAL
  15494. CFA_ENCAP_RECORD_ALLOC_REQ_FLAGS_LOOPBACK
  15495. CFA_ERASE_SECTORS
  15496. CFA_FLOW_ALLOC_CMD_ERR_CODE_ACTION_RECORD
  15497. CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_COUNTER
  15498. CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_CTXT_DB
  15499. CFA_FLOW_ALLOC_CMD_ERR_CODE_HASH_COLLISION
  15500. CFA_FLOW_ALLOC_CMD_ERR_CODE_KEY_EXISTS
  15501. CFA_FLOW_ALLOC_CMD_ERR_CODE_L2_CONTEXT_TCAM
  15502. CFA_FLOW_ALLOC_CMD_ERR_CODE_LAST
  15503. CFA_FLOW_ALLOC_CMD_ERR_CODE_UNKNOWN
  15504. CFA_FLOW_ALLOC_CMD_ERR_CODE_WILD_CARD_TCAM
  15505. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_DROP
  15506. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_FLOW_AGING_ENABLED
  15507. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_FWD
  15508. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_L2_HEADER_REWRITE
  15509. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_METER
  15510. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_DEST
  15511. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_IPV4_ADDRESS
  15512. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_SRC
  15513. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NO_FLOW_COUNTER_ALLOC
  15514. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_PRI_HINT
  15515. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_RECYCLE
  15516. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_TTL_DECREMENT
  15517. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_TUNNEL
  15518. CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_TUNNEL_IP
  15519. CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_IPV4
  15520. CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_IPV6
  15521. CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_L2
  15522. CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_LAST
  15523. CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_MASK
  15524. CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_SFT
  15525. CFA_FLOW_ALLOC_REQ_FLAGS_MATCH_VXLAN_IP_VNI
  15526. CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_LAST
  15527. CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_MASK
  15528. CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_NONE
  15529. CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_ONE
  15530. CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_SFT
  15531. CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_TWO
  15532. CFA_FLOW_ALLOC_REQ_FLAGS_PATH_RX
  15533. CFA_FLOW_ALLOC_REQ_FLAGS_PATH_TX
  15534. CFA_FLOW_ALLOC_REQ_FLAGS_TUNNEL
  15535. CFA_FLOW_ALLOC_REQ_FLAGS_VHOST_ID_USE_VLAN
  15536. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL
  15537. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_GENEVE
  15538. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_IPGRE
  15539. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1
  15540. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_IPIP
  15541. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_L2GRE
  15542. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE
  15543. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_LAST
  15544. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_MPLS
  15545. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL
  15546. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_NVGRE
  15547. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_STT
  15548. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_VXLAN
  15549. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6
  15550. CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4
  15551. CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR
  15552. CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR_LAST
  15553. CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR_RX
  15554. CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR_TX
  15555. CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE
  15556. CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE_EXT
  15557. CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE_INT
  15558. CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE_LAST
  15559. CFA_FLOW_ALLOC_RESP_FLOW_ID_VALUE_MASK
  15560. CFA_FLOW_ALLOC_RESP_FLOW_ID_VALUE_SFT
  15561. CFA_FLOW_INFO_REQ_FLOW_HANDLE_CNP_CNT
  15562. CFA_FLOW_INFO_REQ_FLOW_HANDLE_DIR_RX
  15563. CFA_FLOW_INFO_REQ_FLOW_HANDLE_MAX_MASK
  15564. CFA_FLOW_INFO_REQ_FLOW_HANDLE_MAX_SFT
  15565. CFA_FLOW_INFO_REQ_FLOW_HANDLE_ROCEV1_CNT
  15566. CFA_FLOW_INFO_REQ_FLOW_HANDLE_ROCEV2_CNT
  15567. CFA_FLOW_INFO_RESP_FLAGS_PATH_RX
  15568. CFA_FLOW_INFO_RESP_FLAGS_PATH_TX
  15569. CFA_HANDLE_INVALID
  15570. CFA_L2_FILTER_ALLOC_REQ_ENABLES_DST_ID
  15571. CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR
  15572. CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR_MASK
  15573. CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN
  15574. CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN_MASK
  15575. CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_OVLAN
  15576. CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_OVLAN_MASK
  15577. CFA_L2_FILTER_ALLOC_REQ_ENABLES_MIRROR_VNIC_ID
  15578. CFA_L2_FILTER_ALLOC_REQ_ENABLES_NUM_VLANS
  15579. CFA_L2_FILTER_ALLOC_REQ_ENABLES_SRC_ID
  15580. CFA_L2_FILTER_ALLOC_REQ_ENABLES_SRC_TYPE
  15581. CFA_L2_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE
  15582. CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_ADDR
  15583. CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_ADDR_MASK
  15584. CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_IVLAN
  15585. CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_IVLAN_MASK
  15586. CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_OVLAN
  15587. CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_OVLAN_MASK
  15588. CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_NUM_VLANS
  15589. CFA_L2_FILTER_ALLOC_REQ_FLAGS_DROP
  15590. CFA_L2_FILTER_ALLOC_REQ_FLAGS_LOOPBACK
  15591. CFA_L2_FILTER_ALLOC_REQ_FLAGS_OUTERMOST
  15592. CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH
  15593. CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_LAST
  15594. CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX
  15595. CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_TX
  15596. CFA_L2_FILTER_ALLOC_REQ_FLAGS_SOURCE_VALID
  15597. CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_L2
  15598. CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_LAST
  15599. CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_MASK
  15600. CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_NO_ROCE_L2
  15601. CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_ROCE
  15602. CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_SFT
  15603. CFA_L2_FILTER_ALLOC_REQ_FLAGS_XDP_DISABLE
  15604. CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_ABOVE_FILTER
  15605. CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_BELOW_FILTER
  15606. CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_LAST
  15607. CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_MAX
  15608. CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_MIN
  15609. CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_NO_PREFER
  15610. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_APE
  15611. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_BONO
  15612. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_KONG
  15613. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_LAST
  15614. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_NPORT
  15615. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_PF
  15616. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_TANG
  15617. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_VF
  15618. CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_VNIC
  15619. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL
  15620. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_GENEVE
  15621. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE
  15622. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1
  15623. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPIP
  15624. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2GRE
  15625. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE
  15626. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_LAST
  15627. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_MPLS
  15628. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL
  15629. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE
  15630. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_STT
  15631. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN
  15632. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6
  15633. CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4
  15634. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR
  15635. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR_LAST
  15636. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR_RX
  15637. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX
  15638. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE
  15639. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT
  15640. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE_INT
  15641. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE_LAST
  15642. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_VALUE_MASK
  15643. CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_VALUE_SFT
  15644. CFA_L2_FILTER_CFG_REQ_ENABLES_DST_ID
  15645. CFA_L2_FILTER_CFG_REQ_ENABLES_NEW_MIRROR_VNIC_ID
  15646. CFA_L2_FILTER_CFG_REQ_FLAGS_DROP
  15647. CFA_L2_FILTER_CFG_REQ_FLAGS_PATH
  15648. CFA_L2_FILTER_CFG_REQ_FLAGS_PATH_LAST
  15649. CFA_L2_FILTER_CFG_REQ_FLAGS_PATH_RX
  15650. CFA_L2_FILTER_CFG_REQ_FLAGS_PATH_TX
  15651. CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_L2
  15652. CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_LAST
  15653. CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_MASK
  15654. CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_NO_ROCE_L2
  15655. CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_ROCE
  15656. CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_SFT
  15657. CFA_L2_SET_RX_MASK_CMD_ERR_CODE_LAST
  15658. CFA_L2_SET_RX_MASK_CMD_ERR_CODE_NTUPLE_FILTER_CONFLICT_ERR
  15659. CFA_L2_SET_RX_MASK_CMD_ERR_CODE_UNKNOWN
  15660. CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST
  15661. CFA_L2_SET_RX_MASK_REQ_MASK_ANYVLAN_NONVLAN
  15662. CFA_L2_SET_RX_MASK_REQ_MASK_BCAST
  15663. CFA_L2_SET_RX_MASK_REQ_MASK_MCAST
  15664. CFA_L2_SET_RX_MASK_REQ_MASK_OUTERMOST
  15665. CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS
  15666. CFA_L2_SET_RX_MASK_REQ_MASK_VLANONLY
  15667. CFA_L2_SET_RX_MASK_REQ_MASK_VLAN_NONVLAN
  15668. CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_LAST
  15669. CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_RX_MASK_VLAN_CONFLICT_ERR
  15670. CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_UNKNOWN
  15671. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_ID
  15672. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_IPADDR
  15673. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_IPADDR_MASK
  15674. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_MACADDR
  15675. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_PORT
  15676. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_PORT_MASK
  15677. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_ETHERTYPE
  15678. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_IPADDR_TYPE
  15679. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_IP_PROTOCOL
  15680. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_L2_FILTER_ID
  15681. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_MIRROR_VNIC_ID
  15682. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_NTUPLE_FILTER_ID
  15683. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_PRI_HINT
  15684. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_RFS_RING_TBL_IDX
  15685. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_IPADDR
  15686. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_IPADDR_MASK
  15687. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_MACADDR
  15688. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_PORT
  15689. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_PORT_MASK
  15690. CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE
  15691. CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DEST_FID
  15692. CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DROP
  15693. CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_LOOPBACK
  15694. CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_METER
  15695. CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4
  15696. CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV6
  15697. CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_LAST
  15698. CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_UNKNOWN
  15699. CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_LAST
  15700. CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_TCP
  15701. CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_UDP
  15702. CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_UNKNOWN
  15703. CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_ABOVE
  15704. CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_BELOW
  15705. CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_HIGHEST
  15706. CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_LAST
  15707. CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_LOWEST
  15708. CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_NO_PREFER
  15709. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL
  15710. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_GENEVE
  15711. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE
  15712. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1
  15713. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPIP
  15714. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2GRE
  15715. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE
  15716. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_LAST
  15717. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_MPLS
  15718. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL
  15719. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE
  15720. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_STT
  15721. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN
  15722. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6
  15723. CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4
  15724. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR
  15725. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR_LAST
  15726. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR_RX
  15727. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX
  15728. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE
  15729. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT
  15730. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE_INT
  15731. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE_LAST
  15732. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_VALUE_MASK
  15733. CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_VALUE_SFT
  15734. CFA_NTUPLE_FILTER_CFG_REQ_ENABLES_NEW_DST_ID
  15735. CFA_NTUPLE_FILTER_CFG_REQ_ENABLES_NEW_METER_INSTANCE_ID
  15736. CFA_NTUPLE_FILTER_CFG_REQ_ENABLES_NEW_MIRROR_VNIC_ID
  15737. CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_DEST_FID
  15738. CFA_NTUPLE_FILTER_CFG_REQ_NEW_METER_INSTANCE_ID_INVALID
  15739. CFA_NTUPLE_FILTER_CFG_REQ_NEW_METER_INSTANCE_ID_LAST
  15740. CFA_REQ_EXT_ERROR_CODE
  15741. CFA_TRANSLATE_SECTOR
  15742. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_DST_VNIC_ID
  15743. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L2_ADDR
  15744. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L2_FILTER_ID
  15745. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN
  15746. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L3_ADDR
  15747. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L3_ADDR_TYPE
  15748. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_MIRROR_VNIC_ID
  15749. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE
  15750. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_T_L3_ADDR
  15751. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_T_L3_ADDR_TYPE
  15752. CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_VNI
  15753. CFA_TUNNEL_FILTER_ALLOC_REQ_FLAGS_LOOPBACK
  15754. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_FLAGS_TUN_FLAGS_CRITICAL_OPT_S1
  15755. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_FLAGS_TUN_FLAGS_EXTHDR_SEQNUM_S0
  15756. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_FLAGS_TUN_FLAGS_OAM_CHECKSUM_EXPLHDR
  15757. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL
  15758. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_GENEVE
  15759. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE
  15760. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1
  15761. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPIP
  15762. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2GRE
  15763. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE
  15764. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_LAST
  15765. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_MPLS
  15766. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL
  15767. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE
  15768. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_STT
  15769. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN
  15770. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6
  15771. CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4
  15772. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR
  15773. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR_LAST
  15774. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR_RX
  15775. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX
  15776. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE
  15777. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT
  15778. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE_INT
  15779. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE_LAST
  15780. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_VALUE_MASK
  15781. CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_VALUE_SFT
  15782. CFA_WRITE_MULTI_WO_ERASE
  15783. CFA_WRITE_SECT_WO_ERASE
  15784. CFB16_BLOCK_SIZE
  15785. CFB32_BLOCK_SIZE
  15786. CFB64_BLOCK_SIZE
  15787. CFB8_BLOCK_SIZE
  15788. CFBIOSAUTOTERM
  15789. CFBIOSEN
  15790. CFBIOSSTATE
  15791. CFBIOS_BUSSCAN
  15792. CFBOOTCD
  15793. CFBOOTCHAN
  15794. CFBOOTCHANSHIFT
  15795. CFBOOTID
  15796. CFBOOTLUN
  15797. CFBP0_RESET
  15798. CFBP1_RESET
  15799. CFBP2_RESET
  15800. CFBRTIME
  15801. CFBS_DISABLED
  15802. CFBS_DISABLED_SCAN
  15803. CFBS_ENABLED
  15804. CFCFG
  15805. CFCFG_MASK
  15806. CFCFG_SHIFT
  15807. CFCLUSTERENB
  15808. CFCNFG_H_
  15809. CFCS_DPE
  15810. CFCS_DPR
  15811. CFCS_DST
  15812. CFCS_FBB
  15813. CFCS_IOSA
  15814. CFCS_MO
  15815. CFCS_MSA
  15816. CFCS_PER
  15817. CFCS_RMA
  15818. CFCS_RTA
  15819. CFCS_SEE
  15820. CFCS_SSE
  15821. CFCTRL_A
  15822. CFCTRL_CMD_ENUM
  15823. CFCTRL_CMD_LINK_DESTROY
  15824. CFCTRL_CMD_LINK_ERR
  15825. CFCTRL_CMD_LINK_RECONF
  15826. CFCTRL_CMD_LINK_SETUP
  15827. CFCTRL_CMD_MASK
  15828. CFCTRL_CMD_MODEM_SET
  15829. CFCTRL_CMD_RADIO_SET
  15830. CFCTRL_CMD_SLEEP
  15831. CFCTRL_CMD_START_REASON
  15832. CFCTRL_CMD_WAKE
  15833. CFCTRL_ERR_BIT
  15834. CFCTRL_H_
  15835. CFCTRL_RSP_BIT
  15836. CFCTRL_SRV_DATAGRAM
  15837. CFCTRL_SRV_DBG
  15838. CFCTRL_SRV_DECM
  15839. CFCTRL_SRV_MASK
  15840. CFCTRL_SRV_RFM
  15841. CFCTRL_SRV_UTIL
  15842. CFCTRL_SRV_VEI
  15843. CFCTRL_SRV_VIDEO
  15844. CFC_REG_ACTIVITY_COUNTER
  15845. CFC_REG_ACTIVITY_COUNTER_SIZE
  15846. CFC_REG_AC_INIT_DONE
  15847. CFC_REG_CAM_INIT_DONE
  15848. CFC_REG_CFC_INT_MASK
  15849. CFC_REG_CFC_INT_STS
  15850. CFC_REG_CFC_INT_STS_CLR
  15851. CFC_REG_CFC_PRTY_MASK
  15852. CFC_REG_CFC_PRTY_STS
  15853. CFC_REG_CFC_PRTY_STS_CLR
  15854. CFC_REG_CID_CAM
  15855. CFC_REG_CONTROL0
  15856. CFC_REG_DEBUG0
  15857. CFC_REG_DISABLE_ON_ERROR
  15858. CFC_REG_ERROR_VECTOR
  15859. CFC_REG_INFO_RAM
  15860. CFC_REG_INFO_RAM_SIZE
  15861. CFC_REG_INIT_REG
  15862. CFC_REG_INTERFACES
  15863. CFC_REG_LCREQ_WEIGHTS
  15864. CFC_REG_LINK_LIST
  15865. CFC_REG_LINK_LIST_SIZE
  15866. CFC_REG_LL_INIT_DONE
  15867. CFC_REG_NUM_LCIDS_ALLOC
  15868. CFC_REG_NUM_LCIDS_ARRIVING
  15869. CFC_REG_NUM_LCIDS_INSIDE_PF
  15870. CFC_REG_NUM_LCIDS_LEAVING
  15871. CFC_REG_WEAK_ENABLE_PF
  15872. CFDD
  15873. CFDD_Sleep
  15874. CFDD_Snooze
  15875. CFDISC
  15876. CFD_CLASS_MASK
  15877. CFD_CLASS_SHFT
  15878. CFD_CLS_ADB
  15879. CFD_CLS_BLOCK
  15880. CFD_DEST_MASK
  15881. CFD_DEST_SHFT
  15882. CFD_DIRECT
  15883. CFD_DIRECT_MASK
  15884. CFD_DIRECT_SHFT
  15885. CFD_INDIRECT
  15886. CFD_MMR_CLIENT
  15887. CFD_PAYLOAD_LEN_MASK
  15888. CFD_PAYLOAD_LEN_SHFT
  15889. CFD_PKT_TYPE
  15890. CFD_PKT_TYPE_MASK
  15891. CFD_PKT_TYPE_SHFT
  15892. CFD_SC_CLIENT
  15893. CFD__BLOCK_LEN_MASK
  15894. CFD__BLOCK_LEN_SHFT
  15895. CFEIE
  15896. CFEIE_MASK
  15897. CFEIE_SHIFT
  15898. CFENABLEDV
  15899. CFENDFORM
  15900. CFEND_TH
  15901. CFERE
  15902. CFERE_MASK
  15903. CFERE_SHIFT
  15904. CFEXTEND
  15905. CFE_API_H
  15906. CFE_API_INT_H
  15907. CFE_CACHE_FLUSH_D
  15908. CFE_CACHE_INVAL_D
  15909. CFE_CACHE_INVAL_I
  15910. CFE_CACHE_INVAL_L2
  15911. CFE_CMD_DEV_CLOSE
  15912. CFE_CMD_DEV_ENUM
  15913. CFE_CMD_DEV_GETHANDLE
  15914. CFE_CMD_DEV_GETINFO
  15915. CFE_CMD_DEV_INPSTAT
  15916. CFE_CMD_DEV_IOCTL
  15917. CFE_CMD_DEV_OPEN
  15918. CFE_CMD_DEV_READ
  15919. CFE_CMD_DEV_WRITE
  15920. CFE_CMD_ENV_DEL
  15921. CFE_CMD_ENV_ENUM
  15922. CFE_CMD_ENV_GET
  15923. CFE_CMD_ENV_SET
  15924. CFE_CMD_FW_BOOT
  15925. CFE_CMD_FW_CPUCTL
  15926. CFE_CMD_FW_FLUSHCACHE
  15927. CFE_CMD_FW_GETINFO
  15928. CFE_CMD_FW_GETTIME
  15929. CFE_CMD_FW_MEMENUM
  15930. CFE_CMD_FW_RESTART
  15931. CFE_CMD_MAX
  15932. CFE_CMD_VENDOR_USE
  15933. CFE_CPU_CMD_START
  15934. CFE_CPU_CMD_STOP
  15935. CFE_DEV_CLOCK
  15936. CFE_DEV_CPU
  15937. CFE_DEV_DISK
  15938. CFE_DEV_FLASH
  15939. CFE_DEV_MASK
  15940. CFE_DEV_NETWORK
  15941. CFE_DEV_NVRAM
  15942. CFE_DEV_OTHER
  15943. CFE_DEV_SERIAL
  15944. CFE_EPTSEAL
  15945. CFE_ERR
  15946. CFE_ERR_ADDRINUSE
  15947. CFE_ERR_ALREADYBOUND
  15948. CFE_ERR_BADADDR
  15949. CFE_ERR_BADELFFMT
  15950. CFE_ERR_BADELFVERS
  15951. CFE_ERR_BADFILESYS
  15952. CFE_ERR_BBCHECKSUM
  15953. CFE_ERR_BOOTPROGCHKSUM
  15954. CFE_ERR_CANNOTSET
  15955. CFE_ERR_DEVNOTFOUND
  15956. CFE_ERR_DEVOPEN
  15957. CFE_ERR_ENVNOTFOUND
  15958. CFE_ERR_ENVREADONLY
  15959. CFE_ERR_EOF
  15960. CFE_ERR_FILENOTFOUND
  15961. CFE_ERR_FSNOTAVAIL
  15962. CFE_ERR_GETMEM
  15963. CFE_ERR_HOSTUNKNOWN
  15964. CFE_ERR_INVBOOTBLOCK
  15965. CFE_ERR_INV_COMMAND
  15966. CFE_ERR_INV_PARAM
  15967. CFE_ERR_IOERR
  15968. CFE_ERR_LDRNOTAVAIL
  15969. CFE_ERR_NETDOWN
  15970. CFE_ERR_NOHANDLES
  15971. CFE_ERR_NOMEM
  15972. CFE_ERR_NOMORE
  15973. CFE_ERR_NONAMESERVER
  15974. CFE_ERR_NOT32BIT
  15975. CFE_ERR_NOTCONN
  15976. CFE_ERR_NOTELF
  15977. CFE_ERR_NOTMIPS
  15978. CFE_ERR_NOTREADY
  15979. CFE_ERR_PROTOCOLERR
  15980. CFE_ERR_SETMEM
  15981. CFE_ERR_TIMEOUT
  15982. CFE_ERR_UNSUPPORTED
  15983. CFE_ERR_WRONGDEVTYPE
  15984. CFE_ERR_WRONGENDIAN
  15985. CFE_FLG_ENV_PERMANENT
  15986. CFE_FLG_FULL_ARENA
  15987. CFE_FLG_WARMSTART
  15988. CFE_FWI_32BIT
  15989. CFE_FWI_64BIT
  15990. CFE_FWI_FUNCSIM
  15991. CFE_FWI_MULTICPU
  15992. CFE_FWI_RELOC
  15993. CFE_FWI_RTLSIM
  15994. CFE_FWI_UNCACHED
  15995. CFE_MAGIC
  15996. CFE_MI_AVAILABLE
  15997. CFE_MI_RESERVED
  15998. CFE_OK
  15999. CFE_STDHANDLE_CONSOLE
  16000. CFFPS1_FW_NUM_BYTES
  16001. CFFPS2_FW_NUM_WORDS
  16002. CFFPS_BLINK_RATE_MS
  16003. CFFPS_CCIN_CMD
  16004. CFFPS_DEBUGFS_CCIN
  16005. CFFPS_DEBUGFS_FRU
  16006. CFFPS_DEBUGFS_FW
  16007. CFFPS_DEBUGFS_INPUT_HISTORY
  16008. CFFPS_DEBUGFS_NUM_ENTRIES
  16009. CFFPS_DEBUGFS_PN
  16010. CFFPS_DEBUGFS_SN
  16011. CFFPS_FRU_CMD
  16012. CFFPS_FW_CMD
  16013. CFFPS_INPUT_HISTORY_CMD
  16014. CFFPS_INPUT_HISTORY_SIZE
  16015. CFFPS_LED_BLINK
  16016. CFFPS_LED_OFF
  16017. CFFPS_LED_ON
  16018. CFFPS_MFR_CURRENT_SHARE_WARNING
  16019. CFFPS_MFR_FAN_FAULT
  16020. CFFPS_MFR_OC_FAULT
  16021. CFFPS_MFR_OV_FAULT
  16022. CFFPS_MFR_PS_KILL
  16023. CFFPS_MFR_THERMAL_FAULT
  16024. CFFPS_MFR_UV_FAULT
  16025. CFFPS_MFR_VAUX_FAULT
  16026. CFFPS_PN_CMD
  16027. CFFPS_SN_CMD
  16028. CFFPS_SYS_CONFIG_CMD
  16029. CFFRML_H_
  16030. CFG
  16031. CFG0_CFG1_OFFSET
  16032. CFG0_I2S_MODE_I2S
  16033. CFG0_I2S_MODE_LTJ
  16034. CFG0_I2S_MODE_MASK
  16035. CFG0_I2S_MODE_RTJ
  16036. CFG0_W_LENGTH_16BIT
  16037. CFG0_W_LENGTH_24BIT
  16038. CFG0_W_LENGTH_MASK
  16039. CFG1
  16040. CFG10_DVI
  16041. CFG1_ADDRPROM
  16042. CFG1_AIN8_9
  16043. CFG1_BIOS_MASK
  16044. CFG1_BUFSELSTAT0
  16045. CFG1_BUFSELSTAT1
  16046. CFG1_BUFSELSTAT2
  16047. CFG1_BUFSELSTAT3
  16048. CFG1_BUFSELSTAT4
  16049. CFG1_BUFSELSTAT5
  16050. CFG1_BUS
  16051. CFG1_DAC_AFC
  16052. CFG1_DMABURST1
  16053. CFG1_DMABURST16
  16054. CFG1_DMABURST1600NS
  16055. CFG1_DMABURST3200NS
  16056. CFG1_DMABURST4
  16057. CFG1_DMABURST8
  16058. CFG1_DMABURST800NS
  16059. CFG1_DMABURSTCONT
  16060. CFG1_DVI
  16061. CFG1_EDG_SEL
  16062. CFG1_GAMEPORT
  16063. CFG1_HDCP_DEBUG
  16064. CFG1_INTVECTOR
  16065. CFG1_INT_CLEAR
  16066. CFG1_INT_ENABLE
  16067. CFG1_IO_MASK
  16068. CFG1_IRQ_MASK
  16069. CFG1_LOCBUFMEM
  16070. CFG1_MONITOR
  16071. CFG1_PWM_AFC
  16072. CFG1_RECVCOMPSTAT0
  16073. CFG1_RECVCOMPSTAT1
  16074. CFG1_RECVCOMPSTAT2
  16075. CFG1_RECVCOMPSTAT3
  16076. CFG1_RECVCOMPSTAT4
  16077. CFG1_RECVCOMPSTAT5
  16078. CFG1_RECVPROMISC
  16079. CFG1_RECVSPECBRMULTI
  16080. CFG1_RECVSPECBROAD
  16081. CFG1_RECVSPECONLY
  16082. CFG1_RESET
  16083. CFG1_SB_DISABLE
  16084. CFG1_SPDIF
  16085. CFG1_THERM_HOT
  16086. CFG1_TRANSEND
  16087. CFG2
  16088. CFG2_32BIT
  16089. CFG2_ACLK_INV
  16090. CFG2_ADDRLENGTH
  16091. CFG2_BYTESWAP
  16092. CFG2_CTRLO
  16093. CFG2_DIODE_FAULT_OS
  16094. CFG2_DIODE_FAULT_TCRIT
  16095. CFG2_ERRENCRC
  16096. CFG2_ERRENDRIBBLE
  16097. CFG2_ERRSHORTFRAME
  16098. CFG2_IRQEDGE
  16099. CFG2_LOOPBACK
  16100. CFG2_MHL_DATA_REMAP
  16101. CFG2_MHL_DE_SEL
  16102. CFG2_MHL_FAKE_DE_SEL
  16103. CFG2_MPU_ENABLE
  16104. CFG2_NOTICE_EN
  16105. CFG2_NOWS
  16106. CFG2_OS_A0
  16107. CFG2_PREAMSELECT
  16108. CFG2_RAMDIS
  16109. CFG2_RECVCRC
  16110. CFG2_REMOTE_FILTER_DIS
  16111. CFG2_REMOTE_FILTER_EN
  16112. CFG2_REMOTE_TT
  16113. CFG2_RESET
  16114. CFG2_ROMDIS
  16115. CFG2_SLOTSELECT
  16116. CFG2_WIDEFIFO
  16117. CFG2_XMITNOCRC
  16118. CFG3
  16119. CFG3_AES_KEY_INDEX_MASK
  16120. CFG3_CI_CLEAR
  16121. CFG3_CONTROL_PACKET_DELAY
  16122. CFG3_GPIO16_DIR
  16123. CFG3_GPIO16_ENABLE
  16124. CFG3_GPIO16_POL
  16125. CFG3_KSV_LOAD_START
  16126. CFG3_VREF_250
  16127. CFG4_AES_KEY_LOAD
  16128. CFG4_AV_UNMUTE_EN
  16129. CFG4_AV_UNMUTE_SET
  16130. CFG4_MHL_MODE
  16131. CFG5_CD_RATIO_MASK
  16132. CFG5_FS128
  16133. CFG5_FS256
  16134. CFG5_FS384
  16135. CFG5_FS512
  16136. CFG5_FS768
  16137. CFG80211_BSS_FTYPE_BEACON
  16138. CFG80211_BSS_FTYPE_PRESP
  16139. CFG80211_BSS_FTYPE_UNKNOWN
  16140. CFG80211_CONN_ABANDON
  16141. CFG80211_CONN_ASSOCIATE_NEXT
  16142. CFG80211_CONN_ASSOCIATING
  16143. CFG80211_CONN_ASSOC_FAILED
  16144. CFG80211_CONN_ASSOC_FAILED_TIMEOUT
  16145. CFG80211_CONN_AUTHENTICATE_NEXT
  16146. CFG80211_CONN_AUTHENTICATING
  16147. CFG80211_CONN_AUTH_FAILED_TIMEOUT
  16148. CFG80211_CONN_CONNECTED
  16149. CFG80211_CONN_DEAUTH
  16150. CFG80211_CONN_SCANNING
  16151. CFG80211_CONN_SCAN_AGAIN
  16152. CFG80211_DEV_WARN_ON
  16153. CFG80211_MAX_NUM_DIFFERENT_CHANNELS
  16154. CFG80211_MAX_WEP_KEYS
  16155. CFG80211_NAN_CONF_CHANGED_BANDS
  16156. CFG80211_NAN_CONF_CHANGED_PREF
  16157. CFG80211_SIGNAL_TYPE_MBM
  16158. CFG80211_SIGNAL_TYPE_NONE
  16159. CFG80211_SIGNAL_TYPE_UNSPEC
  16160. CFG80211_STA_AP_CLIENT
  16161. CFG80211_STA_AP_CLIENT_UNASSOC
  16162. CFG80211_STA_AP_MLME_CLIENT
  16163. CFG80211_STA_AP_STA
  16164. CFG80211_STA_IBSS
  16165. CFG80211_STA_MESH_PEER_KERNEL
  16166. CFG80211_STA_MESH_PEER_USER
  16167. CFG80211_STA_TDLS_PEER_ACTIVE
  16168. CFG80211_STA_TDLS_PEER_SETUP
  16169. CFG80211_TESTMODE_CMD
  16170. CFG80211_TESTMODE_DUMP
  16171. CFGADDR
  16172. CFGADDR0
  16173. CFGADDR1
  16174. CFGA_ABSHDN
  16175. CFGA_GPIO1PD
  16176. CFGA_PACPI
  16177. CFGA_PMHCTG
  16178. CFGBARH
  16179. CFGBARL
  16180. CFGB_BAKOPT
  16181. CFGB_CAP
  16182. CFGB_CRANDOM
  16183. CFGB_CRSEOPT
  16184. CFGB_GTCKOPT
  16185. CFGB_MBA
  16186. CFGB_MIIOPT
  16187. CFGB_OFSET
  16188. CFGCHIP
  16189. CFGCHIP0_EDMA30TC0DBS
  16190. CFGCHIP0_EDMA30TC0DBS_16
  16191. CFGCHIP0_EDMA30TC0DBS_32
  16192. CFGCHIP0_EDMA30TC0DBS_64
  16193. CFGCHIP0_EDMA30TC0DBS_MASK
  16194. CFGCHIP0_EDMA30TC1DBS
  16195. CFGCHIP0_EDMA30TC1DBS_16
  16196. CFGCHIP0_EDMA30TC1DBS_32
  16197. CFGCHIP0_EDMA30TC1DBS_64
  16198. CFGCHIP0_EDMA30TC1DBS_MASK
  16199. CFGCHIP0_EDMA31TC0DBS
  16200. CFGCHIP0_EDMA31TC0DBS_16
  16201. CFGCHIP0_EDMA31TC0DBS_32
  16202. CFGCHIP0_EDMA31TC0DBS_64
  16203. CFGCHIP0_EDMA31TC0DBS_MASK
  16204. CFGCHIP0_PLL_MASTER_LOCK
  16205. CFGCHIP1_AMUTESEL0
  16206. CFGCHIP1_AMUTESEL0_BANK_0
  16207. CFGCHIP1_AMUTESEL0_BANK_1
  16208. CFGCHIP1_AMUTESEL0_BANK_2
  16209. CFGCHIP1_AMUTESEL0_BANK_3
  16210. CFGCHIP1_AMUTESEL0_BANK_4
  16211. CFGCHIP1_AMUTESEL0_BANK_5
  16212. CFGCHIP1_AMUTESEL0_BANK_6
  16213. CFGCHIP1_AMUTESEL0_BANK_7
  16214. CFGCHIP1_AMUTESEL0_LOW
  16215. CFGCHIP1_AMUTESEL0_MASK
  16216. CFGCHIP1_CAP0SRC
  16217. CFGCHIP1_CAP0SRC_ECAP_PIN
  16218. CFGCHIP1_CAP0SRC_EMAC_C0_MISC
  16219. CFGCHIP1_CAP0SRC_EMAC_C0_RX
  16220. CFGCHIP1_CAP0SRC_EMAC_C0_RX_THRESHOLD
  16221. CFGCHIP1_CAP0SRC_EMAC_C0_TX
  16222. CFGCHIP1_CAP0SRC_EMAC_C1_MISC
  16223. CFGCHIP1_CAP0SRC_EMAC_C1_RX
  16224. CFGCHIP1_CAP0SRC_EMAC_C1_RX_THRESHOLD
  16225. CFGCHIP1_CAP0SRC_EMAC_C1_TX
  16226. CFGCHIP1_CAP0SRC_EMAC_C2_MISC
  16227. CFGCHIP1_CAP0SRC_EMAC_C2_RX
  16228. CFGCHIP1_CAP0SRC_EMAC_C2_RX_THRESHOLD
  16229. CFGCHIP1_CAP0SRC_EMAC_C2_TX
  16230. CFGCHIP1_CAP0SRC_MASK
  16231. CFGCHIP1_CAP0SRC_MCASP0_RX
  16232. CFGCHIP1_CAP0SRC_MCASP0_TX
  16233. CFGCHIP1_CAP1SRC
  16234. CFGCHIP1_CAP1SRC_ECAP_PIN
  16235. CFGCHIP1_CAP1SRC_EMAC_C0_MISC
  16236. CFGCHIP1_CAP1SRC_EMAC_C0_RX
  16237. CFGCHIP1_CAP1SRC_EMAC_C0_RX_THRESHOLD
  16238. CFGCHIP1_CAP1SRC_EMAC_C0_TX
  16239. CFGCHIP1_CAP1SRC_EMAC_C1_MISC
  16240. CFGCHIP1_CAP1SRC_EMAC_C1_RX
  16241. CFGCHIP1_CAP1SRC_EMAC_C1_RX_THRESHOLD
  16242. CFGCHIP1_CAP1SRC_EMAC_C1_TX
  16243. CFGCHIP1_CAP1SRC_EMAC_C2_MISC
  16244. CFGCHIP1_CAP1SRC_EMAC_C2_RX
  16245. CFGCHIP1_CAP1SRC_EMAC_C2_RX_THRESHOLD
  16246. CFGCHIP1_CAP1SRC_EMAC_C2_TX
  16247. CFGCHIP1_CAP1SRC_MASK
  16248. CFGCHIP1_CAP1SRC_MCASP0_RX
  16249. CFGCHIP1_CAP1SRC_MCASP0_TX
  16250. CFGCHIP1_CAP2SRC
  16251. CFGCHIP1_CAP2SRC_ECAP_PIN
  16252. CFGCHIP1_CAP2SRC_EMAC_C0_MISC
  16253. CFGCHIP1_CAP2SRC_EMAC_C0_RX
  16254. CFGCHIP1_CAP2SRC_EMAC_C0_RX_THRESHOLD
  16255. CFGCHIP1_CAP2SRC_EMAC_C0_TX
  16256. CFGCHIP1_CAP2SRC_EMAC_C1_MISC
  16257. CFGCHIP1_CAP2SRC_EMAC_C1_RX
  16258. CFGCHIP1_CAP2SRC_EMAC_C1_RX_THRESHOLD
  16259. CFGCHIP1_CAP2SRC_EMAC_C1_TX
  16260. CFGCHIP1_CAP2SRC_EMAC_C2_MISC
  16261. CFGCHIP1_CAP2SRC_EMAC_C2_RX
  16262. CFGCHIP1_CAP2SRC_EMAC_C2_RX_THRESHOLD
  16263. CFGCHIP1_CAP2SRC_EMAC_C2_TX
  16264. CFGCHIP1_CAP2SRC_MASK
  16265. CFGCHIP1_CAP2SRC_MCASP0_RX
  16266. CFGCHIP1_CAP2SRC_MCASP0_TX
  16267. CFGCHIP1_HPIBYTEAD
  16268. CFGCHIP1_HPIENA
  16269. CFGCHIP1_TBCLKSYNC
  16270. CFGCHIP2_DATPOL
  16271. CFGCHIP2_OTGMODE
  16272. CFGCHIP2_OTGMODE_FORCE_DEVICE
  16273. CFGCHIP2_OTGMODE_FORCE_HOST
  16274. CFGCHIP2_OTGMODE_FORCE_HOST_VBUS_LOW
  16275. CFGCHIP2_OTGMODE_MASK
  16276. CFGCHIP2_OTGMODE_NO_OVERRIDE
  16277. CFGCHIP2_OTGPWRDN
  16278. CFGCHIP2_PHYCLKGD
  16279. CFGCHIP2_PHYPWRDN
  16280. CFGCHIP2_PHY_PLLON
  16281. CFGCHIP2_REFFREQ
  16282. CFGCHIP2_REFFREQ_12MHZ
  16283. CFGCHIP2_REFFREQ_13MHZ
  16284. CFGCHIP2_REFFREQ_19_2MHZ
  16285. CFGCHIP2_REFFREQ_20MHZ
  16286. CFGCHIP2_REFFREQ_24MHZ
  16287. CFGCHIP2_REFFREQ_26MHZ
  16288. CFGCHIP2_REFFREQ_38_4MHZ
  16289. CFGCHIP2_REFFREQ_40MHZ
  16290. CFGCHIP2_REFFREQ_48MHZ
  16291. CFGCHIP2_REFFREQ_MASK
  16292. CFGCHIP2_RESET
  16293. CFGCHIP2_SESENDEN
  16294. CFGCHIP2_USB1PHYCLKMUX
  16295. CFGCHIP2_USB1SUSPENDM
  16296. CFGCHIP2_USB2PHYCLKMUX
  16297. CFGCHIP2_VBDTCTEN
  16298. CFGCHIP2_VBUSSENSE
  16299. CFGCHIP3_ASYNC3_CLKSRC
  16300. CFGCHIP3_DIV45PENA
  16301. CFGCHIP3_EMA_CLKSRC
  16302. CFGCHIP3_PLL1_MASTER_LOCK
  16303. CFGCHIP3_PRUEVTSEL
  16304. CFGCHIP3_RMII_SEL
  16305. CFGCHIP3_UPP_TX_CLKSRC
  16306. CFGCHIP4_AMUTECLR0
  16307. CFGCS
  16308. CFGCTL
  16309. CFGC_BPS0
  16310. CFGC_BPS1
  16311. CFGC_BPS2
  16312. CFGC_BROPT
  16313. CFGC_BTSEL
  16314. CFGC_DLYEN
  16315. CFGC_DTSEL
  16316. CFGC_EELOAD
  16317. CFGDATA0
  16318. CFGDATA1
  16319. CFGDATA2
  16320. CFGDATA3
  16321. CFGD_CFGDACEN
  16322. CFGD_HTMRL4
  16323. CFGD_IODIS
  16324. CFGD_MSLVDACEN
  16325. CFGD_PCI64EN
  16326. CFGEXTRATTR
  16327. CFGI_CLK
  16328. CFGI_DIN_EEN
  16329. CFGI_DOUT
  16330. CFGI_EELD
  16331. CFGLPSPD_RSTCNT_CLK125SW
  16332. CFGLPSPD_RSTCNT_MASK
  16333. CFGLPSPD_RSTCNT_SHIFT
  16334. CFGOFFSET
  16335. CFGPMC
  16336. CFGPMCSR
  16337. CFGR1_MASTER
  16338. CFGR1_NOSTALL
  16339. CFGR1_PCSCFG
  16340. CFGR1_PCSPOL
  16341. CFGR1_PINCFG
  16342. CFGRWCTL
  16343. CFGRXCDR8
  16344. CFGRXOVR4
  16345. CFGRXOVR6
  16346. CFGRXOVR8
  16347. CFGR_BLV_MASK
  16348. CFGR_BLV_SHIFT
  16349. CFGSNPPERR_F
  16350. CFGSNPPERR_S
  16351. CFGSNPPERR_V
  16352. CFGSTAT_CTO
  16353. CFGSTAT_CTO_BIT
  16354. CFGSTAT_HOST
  16355. CFGSTAT_HOST_BIT
  16356. CFGTBL_AccCmds
  16357. CFGTBL_BusType_Fibre1G
  16358. CFGTBL_BusType_Fibre2G
  16359. CFGTBL_BusType_Ultra2
  16360. CFGTBL_BusType_Ultra3
  16361. CFGTBL_ChangeReq
  16362. CFGTBL_Trans_Performant
  16363. CFGTBL_Trans_Simple
  16364. CFGTBL_Trans_enable_directed_msix
  16365. CFGTBL_Trans_io_accel1
  16366. CFGTBL_Trans_io_accel2
  16367. CFGTBL_Trans_use_short_tags
  16368. CFGWDTH_16
  16369. CFGWDTH_32
  16370. CFGWIDEINLN
  16371. CFG_0_NIB_MODE_MASK
  16372. CFG_0_NIB_MODE_SHIFT
  16373. CFG_0_RX_CRC_IGNORE_MASK
  16374. CFG_0_RX_CRC_IGNORE_SHIFT
  16375. CFG_0_RX_CRC_STRIP_MASK
  16376. CFG_0_RX_CRC_STRIP_SHIFT
  16377. CFG_0_RX_EN_MASK
  16378. CFG_0_RX_EN_SHIFT
  16379. CFG_0_RX_FC_EN_MASK
  16380. CFG_0_RX_FC_EN_SHIFT
  16381. CFG_0_RX_IFG_MASK
  16382. CFG_0_RX_IFG_SHIFT
  16383. CFG_0_RX_LENGTH_CHECK_EN_MASK
  16384. CFG_0_RX_LENGTH_CHECK_EN_SHIFT
  16385. CFG_0_RX_PR_CHECK_EN_MASK
  16386. CFG_0_RX_PR_CHECK_EN_SHIFT
  16387. CFG_0_TX_CRC_EN_MASK
  16388. CFG_0_TX_CRC_EN_SHIFT
  16389. CFG_0_TX_EN_MASK
  16390. CFG_0_TX_EN_SHIFT
  16391. CFG_0_TX_FC_EN_MASK
  16392. CFG_0_TX_FC_EN_SHIFT
  16393. CFG_0_TX_FC_RETR_MASK
  16394. CFG_0_TX_FC_RETR_SHIFT
  16395. CFG_0_TX_IFG_MASK
  16396. CFG_0_TX_IFG_NIB_MASK
  16397. CFG_0_TX_IFG_NIB_SHIFT
  16398. CFG_0_TX_IFG_SHIFT
  16399. CFG_0_TX_PAD_EN_MASK
  16400. CFG_0_TX_PAD_EN_SHIFT
  16401. CFG_0_TX_PR_LEN_MASK
  16402. CFG_0_TX_PR_LEN_SHIFT
  16403. CFG_1555
  16404. CFG_16BIT
  16405. CFG_1SHOT
  16406. CFG_1US_TIMER_TRSH
  16407. CFG_1_OCTET_0_MASK
  16408. CFG_1_OCTET_0_SHIFT
  16409. CFG_1_OCTET_1_MASK
  16410. CFG_1_OCTET_1_SHIFT
  16411. CFG_1_OCTET_2_MASK
  16412. CFG_1_OCTET_2_SHIFT
  16413. CFG_1_OCTET_3_MASK
  16414. CFG_1_OCTET_3_SHIFT
  16415. CFG_2_DISK_BC_MASK
  16416. CFG_2_DISK_BC_SHIFT
  16417. CFG_2_DISK_DA_MASK
  16418. CFG_2_DISK_DA_SHIFT
  16419. CFG_2_DISK_MC_MASK
  16420. CFG_2_DISK_MC_SHIFT
  16421. CFG_2_OCTET_4_MASK
  16422. CFG_2_OCTET_4_SHIFT
  16423. CFG_2_OCTET_5_MASK
  16424. CFG_2_OCTET_5_SHIFT
  16425. CFG_2_STAT_EN_MASK
  16426. CFG_2_STAT_EN_SHIFT
  16427. CFG_2_TRANSMIT_FLUSH_EN_MASK
  16428. CFG_2_TRANSMIT_FLUSH_EN_SHIFT
  16429. CFG_3G_BIT
  16430. CFG_3_CF_DROP_MASK
  16431. CFG_3_CF_DROP_SHIFT
  16432. CFG_3_CF_TIMEOUT_MASK
  16433. CFG_3_CF_TIMEOUT_SHIFT
  16434. CFG_3_EXT_OOB_CBFC_SEL_MASK
  16435. CFG_3_EXT_OOB_CBFC_SEL_SHIFT
  16436. CFG_3_MAX_LEN_MASK
  16437. CFG_3_MAX_LEN_SHIFT
  16438. CFG_3_REDIRECT_CBFC_SEL_MASK
  16439. CFG_3_REDIRECT_CBFC_SEL_SHIFT
  16440. CFG_3_RX_CBFC_EN_MASK
  16441. CFG_3_RX_CBFC_EN_SHIFT
  16442. CFG_3_RX_CBFC_REDIR_EN_MASK
  16443. CFG_3_RX_CBFC_REDIR_EN_SHIFT
  16444. CFG_3_RX_IFG_TH_MASK
  16445. CFG_3_RX_IFG_TH_SHIFT
  16446. CFG_3_TM_HD_MODE_MASK
  16447. CFG_3_TM_HD_MODE_SHIFT
  16448. CFG_3_TX_CBFC_EN_MASK
  16449. CFG_3_TX_CBFC_EN_SHIFT
  16450. CFG_420
  16451. CFG_422
  16452. CFG_422PACK
  16453. CFG_565
  16454. CFG_8888
  16455. CFG_888PACK
  16456. CFG_ABOLT
  16457. CFG_ABT_SET_IPTT_DONE
  16458. CFG_ABT_SET_IPTT_DONE_OFF
  16459. CFG_ABT_SET_QUERY_IPTT
  16460. CFG_ACGEN
  16461. CFG_ADAPTER_ID
  16462. CFG_ADAPTER_MODE
  16463. CFG_ADDR
  16464. CFG_ADDRESS
  16465. CFG_ADDR_BUS_NUM_MASK
  16466. CFG_ADDR_BUS_NUM_SHIFT
  16467. CFG_ADDR_CFG_TYPE_MASK
  16468. CFG_ADDR_CFG_TYPE_SHIFT
  16469. CFG_ADDR_DEV_NUM_MASK
  16470. CFG_ADDR_DEV_NUM_SHIFT
  16471. CFG_ADDR_FUNC_NUM_MASK
  16472. CFG_ADDR_FUNC_NUM_SHIFT
  16473. CFG_ADDR_REG_NUM_MASK
  16474. CFG_ADDR_REG_NUM_SHIFT
  16475. CFG_ADHOC_CREATE
  16476. CFG_ADHOC_PERSIST
  16477. CFG_AGING_TIME
  16478. CFG_AGING_TIME_ITCT_REL_MSK
  16479. CFG_AGING_TIME_ITCT_REL_OFF
  16480. CFG_AHB_CLK_CGC_ON
  16481. CFG_AHB_WR_ACLK_CGC_ON
  16482. CFG_AI
  16483. CFG_ALOS_CHK_DISABLE_MSK
  16484. CFG_ALOS_CHK_DISABLE_OFF
  16485. CFG_ALPHA
  16486. CFG_ALPHAM_CFG
  16487. CFG_ALPHAM_GRA
  16488. CFG_ALPHAM_MASK
  16489. CFG_ALPHAM_VIDEO
  16490. CFG_ALPHA_MASK
  16491. CFG_ALPHA_MODE
  16492. CFG_ALPHA_MODE_MASK
  16493. CFG_ALPHA_U
  16494. CFG_ALPHA_U_MASK
  16495. CFG_ALPHA_V
  16496. CFG_ALPHA_V_MASK
  16497. CFG_ALPHA_Y
  16498. CFG_ALPHA_Y_MASK
  16499. CFG_AMI_CK_DIV_OVERRIDE_EN
  16500. CFG_AMI_CK_DIV_OVERRIDE_VAL
  16501. CFG_AMI_CK_DIV_OVERRIDE_VAL_MASK
  16502. CFG_AND
  16503. CFG_ARBFAST_ENA
  16504. CFG_ARBFAST_ENA_MASK
  16505. CFG_ASSOCIATE
  16506. CFG_ATI_REV_A11
  16507. CFG_ATI_REV_A12
  16508. CFG_ATI_REV_A13
  16509. CFG_ATI_REV_ID_MASK
  16510. CFG_AUI_SELECT
  16511. CFG_AUTO_1000
  16512. CFG_AUTO_CLK
  16513. CFG_AUTO_HS
  16514. CFG_AWG_ASYNC_EN
  16515. CFG_AWG_ASYNC_HSYNC_MTD
  16516. CFG_AWG_ASYNC_VSYNC_MTD
  16517. CFG_AWG_FLTR_MODE_ED
  16518. CFG_AWG_FLTR_MODE_HD
  16519. CFG_AWG_FLTR_MODE_MASK
  16520. CFG_AWG_FLTR_MODE_SD
  16521. CFG_AWG_FLTR_MODE_SHIFT
  16522. CFG_AWG_SYNC_DEL
  16523. CFG_AXICTRL
  16524. CFG_AXICTRL_MASK
  16525. CFG_BACKGROUND_SCAN
  16526. CFG_BAR_SIZE
  16527. CFG_BASE
  16528. CFG_BASE_ADR_1
  16529. CFG_BASE_ADR_2
  16530. CFG_BCNSUSEN
  16531. CFG_BC_REJECT_EN
  16532. CFG_BEM
  16533. CFG_BIAS_OUT
  16534. CFG_BIAS_OUT_MASK
  16535. CFG_BIN_CMD
  16536. CFG_BIST_MODE_SEL_MSK
  16537. CFG_BIST_MODE_SEL_OFF
  16538. CFG_BIST_TEST_MSK
  16539. CFG_BIST_TEST_OFF
  16540. CFG_BLANKCOLOR_B_MASK
  16541. CFG_BLANKCOLOR_G_MASK
  16542. CFG_BLANKCOLOR_MASK
  16543. CFG_BLANKCOLOR_R_MASK
  16544. CFG_BLK_ADR_BYTES_SHIFT
  16545. CFG_BLK_LEN_MASK
  16546. CFG_BLK_SIZE_SHIFT
  16547. CFG_BME_EVT
  16548. CFG_BOUNDARY
  16549. CFG_BOUNDARY_1KB
  16550. CFG_BOUNDARY_4KB
  16551. CFG_BOUNDARY_MASK
  16552. CFG_BRIDGE_SB_INIT
  16553. CFG_BRIGHTNESS
  16554. CFG_BRIGHTNESS_MASK
  16555. CFG_BROM_DIS
  16556. CFG_BSSID_FILTER_EN
  16557. CFG_BT_ATTR_DATA_0_VF_QPC_BA_PGSZ_M
  16558. CFG_BT_ATTR_DATA_0_VF_QPC_BA_PGSZ_S
  16559. CFG_BT_ATTR_DATA_0_VF_QPC_BUF_PGSZ_M
  16560. CFG_BT_ATTR_DATA_0_VF_QPC_BUF_PGSZ_S
  16561. CFG_BT_ATTR_DATA_0_VF_QPC_HOPNUM_M
  16562. CFG_BT_ATTR_DATA_0_VF_QPC_HOPNUM_S
  16563. CFG_BT_ATTR_DATA_1_VF_SRQC_BA_PGSZ_M
  16564. CFG_BT_ATTR_DATA_1_VF_SRQC_BA_PGSZ_S
  16565. CFG_BT_ATTR_DATA_1_VF_SRQC_BUF_PGSZ_M
  16566. CFG_BT_ATTR_DATA_1_VF_SRQC_BUF_PGSZ_S
  16567. CFG_BT_ATTR_DATA_1_VF_SRQC_HOPNUM_M
  16568. CFG_BT_ATTR_DATA_1_VF_SRQC_HOPNUM_S
  16569. CFG_BT_ATTR_DATA_2_VF_CQC_BA_PGSZ_M
  16570. CFG_BT_ATTR_DATA_2_VF_CQC_BA_PGSZ_S
  16571. CFG_BT_ATTR_DATA_2_VF_CQC_BUF_PGSZ_M
  16572. CFG_BT_ATTR_DATA_2_VF_CQC_BUF_PGSZ_S
  16573. CFG_BT_ATTR_DATA_2_VF_CQC_HOPNUM_M
  16574. CFG_BT_ATTR_DATA_2_VF_CQC_HOPNUM_S
  16575. CFG_BT_ATTR_DATA_3_VF_MPT_BA_PGSZ_M
  16576. CFG_BT_ATTR_DATA_3_VF_MPT_BA_PGSZ_S
  16577. CFG_BT_ATTR_DATA_3_VF_MPT_BUF_PGSZ_M
  16578. CFG_BT_ATTR_DATA_3_VF_MPT_BUF_PGSZ_S
  16579. CFG_BT_ATTR_DATA_3_VF_MPT_HOPNUM_M
  16580. CFG_BT_ATTR_DATA_3_VF_MPT_HOPNUM_S
  16581. CFG_BT_ATTR_DATA_4_VF_SCCC_BA_PGSZ_M
  16582. CFG_BT_ATTR_DATA_4_VF_SCCC_BA_PGSZ_S
  16583. CFG_BT_ATTR_DATA_4_VF_SCCC_BUF_PGSZ_M
  16584. CFG_BT_ATTR_DATA_4_VF_SCCC_BUF_PGSZ_S
  16585. CFG_BT_ATTR_DATA_4_VF_SCCC_HOPNUM_M
  16586. CFG_BT_ATTR_DATA_4_VF_SCCC_HOPNUM_S
  16587. CFG_BT_BIT
  16588. CFG_BT_COEXISTENCE_DEFER
  16589. CFG_BT_COEXISTENCE_KILL
  16590. CFG_BT_COEXISTENCE_OOB
  16591. CFG_BT_COEXISTENCE_SIGNAL_CHNL
  16592. CFG_BT_COEXISTENCE_WME_OVER_BT
  16593. CFG_BURST
  16594. CFG_BURST_MASK
  16595. CFG_BURST_SEQ_THRESHOLD
  16596. CFG_BUS
  16597. CFG_BUS_TYPE
  16598. CFG_BUS_WIDTH
  16599. CFG_BUS_WIDTH_1
  16600. CFG_BUS_WIDTH_4
  16601. CFG_BUS_WIDTH_8
  16602. CFG_BUS_WIDTH_MASK
  16603. CFG_BUS_WIDTH_SHIFT
  16604. CFG_BYPASS_ADDR
  16605. CFG_BYPASS_UNISEC_RX
  16606. CFG_BYPASS_UNISEC_TX
  16607. CFG_BYTE_CMD
  16608. CFG_CAMERA_BIT
  16609. CFG_CAPABILITY_SRST
  16610. CFG_CARRY
  16611. CFG_CARRY_MASK
  16612. CFG_CBSH_ENA
  16613. CFG_CBSH_ENA_MASK
  16614. CFG_CFPENDOPT
  16615. CFG_CHANNEL_MASK
  16616. CFG_CHARGE_CURRENT
  16617. CFG_CHARGE_CURRENT_FCC_MASK
  16618. CFG_CHARGE_CURRENT_FCC_SHIFT
  16619. CFG_CHARGE_CURRENT_PCC_MASK
  16620. CFG_CHARGE_CURRENT_PCC_SHIFT
  16621. CFG_CHARGE_CURRENT_TC_MASK
  16622. CFG_CHG_INTR_MASK
  16623. CFG_CHIP_CLASS
  16624. CFG_CHIP_FND_ID
  16625. CFG_CHIP_MAJOR
  16626. CFG_CHIP_MINOR
  16627. CFG_CHIP_REV
  16628. CFG_CHIP_R_MSK
  16629. CFG_CHIP_TYPE
  16630. CFG_CHK_DS
  16631. CFG_CHNG_ERR_SHIFT
  16632. CFG_CHROMA_INTP_THR_MASK
  16633. CFG_CHROMA_INTP_THR_SHIFT
  16634. CFG_CKEY_DMA
  16635. CFG_CKEY_GRA
  16636. CFG_CKEY_U
  16637. CFG_CKEY_U1
  16638. CFG_CKEY_U1_MASK
  16639. CFG_CKEY_U2
  16640. CFG_CKEY_U2_MASK
  16641. CFG_CKEY_U_MASK
  16642. CFG_CKEY_V
  16643. CFG_CKEY_V1
  16644. CFG_CKEY_V1_MASK
  16645. CFG_CKEY_V2
  16646. CFG_CKEY_V2_MASK
  16647. CFG_CKEY_V_MASK
  16648. CFG_CKEY_Y
  16649. CFG_CKEY_Y1
  16650. CFG_CKEY_Y1_MASK
  16651. CFG_CKEY_Y2
  16652. CFG_CKEY_Y2_MASK
  16653. CFG_CKEY_Y_MASK
  16654. CFG_CKMODE
  16655. CFG_CKMODE_MASK
  16656. CFG_CLE_BYPASS_EN0
  16657. CFG_CLE_DSTQID0
  16658. CFG_CLE_DSTQID0_SET
  16659. CFG_CLE_FPSEL0
  16660. CFG_CLE_FPSEL0_SET
  16661. CFG_CLE_IP_HDR_LEN_SET
  16662. CFG_CLE_IP_PROTOCOL0_SET
  16663. CFG_CLE_NXTFPSEL0
  16664. CFG_CLE_NXTFPSEL0_SET
  16665. CFG_CLKINV
  16666. CFG_CLKINV_MASK
  16667. CFG_CLK_ALWAYS_ON
  16668. CFG_CMD_STR
  16669. CFG_CMD_VM_ENA
  16670. CFG_CMD_VM_ENA_MASK
  16671. CFG_CMPLT
  16672. CFG_CNT_EN
  16673. CFG_COLOR_KEY_MASK
  16674. CFG_COLOR_KEY_MODE
  16675. CFG_COL_ACC_OFFSET_MASK
  16676. CFG_COL_ACC_OFFSET_SHIFT
  16677. CFG_COL_ADR_BYTES_SHIFT
  16678. CFG_COMP_PROC
  16679. CFG_COMP_WIN_SZ
  16680. CFG_CONF_DEFAULT_MASK
  16681. CFG_CONF_DEFAULT_SHIFT
  16682. CFG_CONTRAST
  16683. CFG_CONTRAST_MASK
  16684. CFG_CONTROL
  16685. CFG_CONTROL_SEC_BUS_MASK
  16686. CFG_CONTROL_SUBBUS_MASK
  16687. CFG_COS0
  16688. CFG_COS0_MASK
  16689. CFG_CPU
  16690. CFG_CR0076
  16691. CFG_CR0182
  16692. CFG_CR1000
  16693. CFG_CR2700
  16694. CFG_CRC_CHECK
  16695. CFG_CRMASK
  16696. CFG_CSB_256x24
  16697. CFG_CSB_256x24_MASK
  16698. CFG_CSB_256x32
  16699. CFG_CSB_256x32_MASK
  16700. CFG_CSB_256x8
  16701. CFG_CSB_256x8_MASK
  16702. CFG_CSC
  16703. CFG_CSC_MASK
  16704. CFG_CSC_RGB_COMPUTER
  16705. CFG_CSC_RGB_STUDIO
  16706. CFG_CSC_YUV_CCIR601
  16707. CFG_CSC_YUV_CCIR709
  16708. CFG_CTS_TO_ITSELF_ENABLED_DEF
  16709. CFG_CTS_TO_ITSELF_ENABLED_MAX
  16710. CFG_CTS_TO_ITSELF_ENABLED_MIN
  16711. CFG_CURRENT_LIMIT
  16712. CFG_CURRENT_LIMIT_DC_MASK
  16713. CFG_CURRENT_LIMIT_DC_SHIFT
  16714. CFG_CURRENT_LIMIT_USB_MASK
  16715. CFG_CUSTOM_MAC
  16716. CFG_CYC_BURST_LEN16
  16717. CFG_CYC_BURST_LEN8
  16718. CFG_C_MULTS
  16719. CFG_C_MULTS_MASK
  16720. CFG_DATA64_EN
  16721. CFG_DATA_BLOCK_SIZE
  16722. CFG_DBG_MSG_STRUCT
  16723. CFG_DCBX
  16724. CFG_DCM_2X
  16725. CFG_DCM_4X
  16726. CFG_DCQ
  16727. CFG_DDR
  16728. CFG_DEBUG_EAR
  16729. CFG_DEBUG_ID
  16730. CFG_DEFAULT_MAX_FRAME_SIZE
  16731. CFG_DEF_XMIT_DATA_RATE
  16732. CFG_DELTA_CHROMA_THR_MASK
  16733. CFG_DELTA_CHROMA_THR_SHIFT
  16734. CFG_DELTA_EV_THR_MASK
  16735. CFG_DELTA_EV_THR_SHIFT
  16736. CFG_DELTA_LUMA_THR_MASK
  16737. CFG_DELTA_LUMA_THR_SHIFT
  16738. CFG_DEVICE
  16739. CFG_DEVICEID
  16740. CFG_DEVICE_SIZE_SHIFT
  16741. CFG_DEV_MODE
  16742. CFG_DIS_LINK
  16743. CFG_DIS_M2_CLK
  16744. CFG_DIVERSITY_CTL
  16745. CFG_DMAFORMAT
  16746. CFG_DMAFORMAT_MASK
  16747. CFG_DMA_ARB
  16748. CFG_DMA_ENA
  16749. CFG_DMA_ENA_MASK
  16750. CFG_DMA_FMT
  16751. CFG_DMA_FTOGGLE
  16752. CFG_DMA_FTOGGLE_MASK
  16753. CFG_DMA_HPXL
  16754. CFG_DMA_HSMOOTH
  16755. CFG_DMA_HSMOOTH_MASK
  16756. CFG_DMA_MOD
  16757. CFG_DMA_OVSA_HPXL
  16758. CFG_DMA_OVSA_VLN
  16759. CFG_DMA_REG_BAR
  16760. CFG_DMA_SWAPRB
  16761. CFG_DMA_SWAPRB_MASK
  16762. CFG_DMA_SWAPUV
  16763. CFG_DMA_SWAPUV_MASK
  16764. CFG_DMA_SWAPYU
  16765. CFG_DMA_SWAPYU_MASK
  16766. CFG_DMA_SWAP_MASK
  16767. CFG_DMA_TSTMODE
  16768. CFG_DMA_TSTMODE_MASK
  16769. CFG_DMA_VLN
  16770. CFG_DMA_VM_ENA
  16771. CFG_DMA_VM_ENA_MASK
  16772. CFG_DMA_WM
  16773. CFG_DMA_WM_EN
  16774. CFG_DMA_WM_MASK
  16775. CFG_DPTX_VIF_CLK_EN
  16776. CFG_DPTX_VIF_CLK_RSTN_EN
  16777. CFG_DR
  16778. CFG_DRIVER_TYPE_A
  16779. CFG_DRIVER_TYPE_B
  16780. CFG_DRIVER_TYPE_C
  16781. CFG_DRIVER_TYPE_D
  16782. CFG_DRQ
  16783. CFG_DSCALE
  16784. CFG_DSCALE_HALF
  16785. CFG_DSCALE_MASK
  16786. CFG_DSCALE_NONE
  16787. CFG_DSCALE_QUAR
  16788. CFG_DUAL_MAC_MSK
  16789. CFG_DUMBMODE
  16790. CFG_DUMBMODE_MASK
  16791. CFG_DUMB_ENA
  16792. CFG_DUMB_ENA_MASK
  16793. CFG_DUPSTS
  16794. CFG_DW0_FMT
  16795. CFG_DW0_LENGTH
  16796. CFG_DW0_TYPE
  16797. CFG_DW2_BUS
  16798. CFG_DW2_DEV
  16799. CFG_DW2_FUN
  16800. CFG_DW2_REGN
  16801. CFG_DZM_HPXL
  16802. CFG_DZM_VLN
  16803. CFG_EAP
  16804. CFG_ECC_ENABLE
  16805. CFG_ENABLE_ERR_MSG_FWD
  16806. CFG_ENABLE_EV
  16807. CFG_ENABLE_INT_MSG_FWD
  16808. CFG_ENABLE_MSG_FILTER_MASK
  16809. CFG_ENABLE_PM_MSG_FWD
  16810. CFG_ENABLE_SIN2_VER_INTP
  16811. CFG_ENDIAN0
  16812. CFG_EN_SHIFT
  16813. CFG_ERASESEC_TOGGLE_32BIT_ADDR
  16814. CFG_ERROR_RANGE
  16815. CFG_ERR_ABORT
  16816. CFG_ETH0_ADDRESS
  16817. CFG_ETH1_ADDRESS
  16818. CFG_EV_THR_MASK
  16819. CFG_EV_THR_SHIFT
  16820. CFG_EXD
  16821. CFG_EXTSTS_EN
  16822. CFG_EXT_125
  16823. CFG_EXT_BLK_SIZE_SHIFT
  16824. CFG_EXT_PAGE_SIZE_SHIFT
  16825. CFG_EXT_STK_EN
  16826. CFG_FAULT_IRQ
  16827. CFG_FAULT_IRQ_DCIN_UV
  16828. CFG_FIELD_BAR
  16829. CFG_FIELD_ROM
  16830. CFG_FIXED_RATE
  16831. CFG_FLAGS
  16832. CFG_FLOAT_VOLTAGE
  16833. CFG_FLOAT_VOLTAGE_FLOAT_MASK
  16834. CFG_FLOAT_VOLTAGE_THRESHOLD_MASK
  16835. CFG_FLOAT_VOLTAGE_THRESHOLD_SHIFT
  16836. CFG_FLPDCACHE
  16837. CFG_FM_I2S
  16838. CFG_FM_LJ
  16839. CFG_FM_MASK
  16840. CFG_FM_RJ
  16841. CFG_FORCE_LINK_STATUS_EN
  16842. CFG_FRAME_TRIG
  16843. CFG_FRAME_TRIG_MASK
  16844. CFG_FULL_STEP
  16845. CFG_FUL_ADR_BYTES_SHIFT
  16846. CFG_FUNC
  16847. CFG_GAMMA_ENA
  16848. CFG_GAMMA_ENA_MASK
  16849. CFG_GAMMA_RDDAT_MASK
  16850. CFG_GATED_CLK
  16851. CFG_GATED_ENA
  16852. CFG_GATED_ENA_MASK
  16853. CFG_GDSCR_OFFSET
  16854. CFG_GET_BASE_QUE_NIC_IF
  16855. CFG_GET_CTRL_Q_GRP
  16856. CFG_GET_DEF_RX_BUF_SIZE
  16857. CFG_GET_DMA_INTR_PKT
  16858. CFG_GET_DMA_INTR_TIME
  16859. CFG_GET_GMXID_NIC_IF
  16860. CFG_GET_HOST_LINK_QUERY_INTERVAL
  16861. CFG_GET_IQ_CFG
  16862. CFG_GET_IQ_DB_MIN
  16863. CFG_GET_IQ_DB_TIMEOUT
  16864. CFG_GET_IQ_INSTR_TYPE
  16865. CFG_GET_IQ_INTR_PKT
  16866. CFG_GET_IQ_MAX_Q
  16867. CFG_GET_IQ_PENDING_LIST_SIZE
  16868. CFG_GET_IS_SLI_BP_ON
  16869. CFG_GET_MAX_RXQS_NIC_IF
  16870. CFG_GET_MAX_TXQS_NIC_IF
  16871. CFG_GET_NUM_DEF_RX_DESCS
  16872. CFG_GET_NUM_DEF_TX_DESCS
  16873. CFG_GET_NUM_NIC_PORTS
  16874. CFG_GET_NUM_RXQS_NIC_IF
  16875. CFG_GET_NUM_RX_BUF_SIZE_NIC_IF
  16876. CFG_GET_NUM_RX_DESCS_NIC_IF
  16877. CFG_GET_NUM_TXQS_NIC_IF
  16878. CFG_GET_NUM_TX_DESCS_NIC_IF
  16879. CFG_GET_OCT_LINK_QUERY_INTERVAL
  16880. CFG_GET_OQ_INTR_PKT
  16881. CFG_GET_OQ_INTR_TIME
  16882. CFG_GET_OQ_MAX_Q
  16883. CFG_GET_OQ_PKTS_PER_INTR
  16884. CFG_GET_OQ_REFILL_THRESHOLD
  16885. CFG_GLOBAL_PARAM_DATA_0_ROCEE_TIME_1US_CFG_M
  16886. CFG_GLOBAL_PARAM_DATA_0_ROCEE_TIME_1US_CFG_S
  16887. CFG_GLOBAL_PARAM_DATA_0_ROCEE_UDP_PORT_M
  16888. CFG_GLOBAL_PARAM_DATA_0_ROCEE_UDP_PORT_S
  16889. CFG_GMODE_NON_ERP_PREAMBLE
  16890. CFG_GMODE_PROTECTION
  16891. CFG_GMODE_PROTECT_RATE_INDEX
  16892. CFG_GPIO_PIN
  16893. CFG_GPI_E_CFG
  16894. CFG_GPI_IEN
  16895. CFG_GPRS_CBR_PERIOD
  16896. CFG_GRADIENT_THR_MASK
  16897. CFG_GRADIENT_THR_RANGE_MASK
  16898. CFG_GRADIENT_THR_RANGE_SHIFT
  16899. CFG_GRADIENT_THR_SHIFT
  16900. CFG_GRAFORMAT
  16901. CFG_GRAFORMAT_MASK
  16902. CFG_GRA_ENA
  16903. CFG_GRA_ENA_MASK
  16904. CFG_GRA_FMT
  16905. CFG_GRA_FTOGGLE
  16906. CFG_GRA_FTOGGLE_MASK
  16907. CFG_GRA_HPXL
  16908. CFG_GRA_HSMOOTH
  16909. CFG_GRA_HSMOOTH_MASK
  16910. CFG_GRA_MOD
  16911. CFG_GRA_OVSA_HPXL
  16912. CFG_GRA_OVSA_VLN
  16913. CFG_GRA_SWAPRB
  16914. CFG_GRA_SWAPRB_MASK
  16915. CFG_GRA_SWAPUV
  16916. CFG_GRA_SWAPUV_MASK
  16917. CFG_GRA_SWAPYU
  16918. CFG_GRA_SWAPYU_MASK
  16919. CFG_GRA_SWAP_MASK
  16920. CFG_GRA_TSTMODE
  16921. CFG_GRA_TSTMODE_MASK
  16922. CFG_GRA_VLN
  16923. CFG_GRA_VM_ENA
  16924. CFG_GRA_VM_ENA_MASK
  16925. CFG_GZM_HPXL
  16926. CFG_GZM_VLN
  16927. CFG_HEADER_DW0
  16928. CFG_HEADER_DW1
  16929. CFG_HEADER_DW2
  16930. CFG_HPF_COEFF0_MASK
  16931. CFG_HPF_COEFF0_SHIFT
  16932. CFG_HPF_COEFF1_MASK
  16933. CFG_HPF_COEFF1_SHIFT
  16934. CFG_HPF_COEFF2_MASK
  16935. CFG_HPF_COEFF2_SHIFT
  16936. CFG_HPF_COEFF3_MASK
  16937. CFG_HPF_COEFF3_SHIFT
  16938. CFG_HPF_COEFF4_MASK
  16939. CFG_HPF_COEFF4_SHIFT
  16940. CFG_HPF_COEFF5_MASK
  16941. CFG_HPF_COEFF5_SHIFT
  16942. CFG_HPF_NORM_SHIFT_MASK
  16943. CFG_HPF_NORM_SHIFT_SHIFT
  16944. CFG_HP_BYPASS
  16945. CFG_HS_FACTOR_MASK
  16946. CFG_HS_FACTOR_SHIFT
  16947. CFG_HT_MPDU_DENSITY_16USEC
  16948. CFG_HT_MPDU_DENSITY_2USEC
  16949. CFG_HT_MPDU_DENSITY_4USEC
  16950. CFG_HT_MPDU_DENSITY_8USEC
  16951. CFG_HT_MPDU_DENSITY_DEF
  16952. CFG_HT_MPDU_DENSITY_MAX
  16953. CFG_HT_MPDU_DENSITY_MIN
  16954. CFG_HT_RX_AMPDU_FACTOR_16K
  16955. CFG_HT_RX_AMPDU_FACTOR_32K
  16956. CFG_HT_RX_AMPDU_FACTOR_64K
  16957. CFG_HT_RX_AMPDU_FACTOR_8K
  16958. CFG_HT_RX_AMPDU_FACTOR_DEF
  16959. CFG_HT_RX_AMPDU_FACTOR_MAX
  16960. CFG_HT_RX_AMPDU_FACTOR_MIN
  16961. CFG_HWC_1BITENA
  16962. CFG_HWC_1BITENA_MASK
  16963. CFG_HWC_1BITMOD
  16964. CFG_HWC_1BITMOD_MASK
  16965. CFG_HWC_COLOR1
  16966. CFG_HWC_COLOR1_B
  16967. CFG_HWC_COLOR1_B_MASK
  16968. CFG_HWC_COLOR1_G
  16969. CFG_HWC_COLOR1_G_MASK
  16970. CFG_HWC_COLOR1_R
  16971. CFG_HWC_COLOR1_R_MASK
  16972. CFG_HWC_COLOR2
  16973. CFG_HWC_COLOR2_B_MASK
  16974. CFG_HWC_COLOR2_G_MASK
  16975. CFG_HWC_COLOR2_R_MASK
  16976. CFG_HWC_ENA
  16977. CFG_HWC_ENA_MASK
  16978. CFG_HWC_HPXL
  16979. CFG_HWC_OVSA_HPXL
  16980. CFG_HWC_OVSA_VLN
  16981. CFG_HWC_VLN
  16982. CFG_HWORD_CMD
  16983. CFG_HW_BITS
  16984. CFG_HW_CLK_CTRL_MASK
  16985. CFG_HW_HAS_EEPROM
  16986. CFG_HW_HAS_ETH0
  16987. CFG_HW_HAS_ETH1
  16988. CFG_HW_HAS_HSS0
  16989. CFG_HW_HAS_HSS1
  16990. CFG_HW_HAS_PCI_SLOT
  16991. CFG_HW_HAS_UART0
  16992. CFG_HW_HAS_UART1
  16993. CFG_HW_TX_RETRIES
  16994. CFG_HW_USB_PORTS
  16995. CFG_H_ACTIVE
  16996. CFG_H_BACK_PORCH
  16997. CFG_H_FRONT_PORCH
  16998. CFG_H_TOTAL
  16999. CFG_I2OBAR
  17000. CFG_IC
  17001. CFG_ICK
  17002. CFG_IDX_MIX
  17003. CFG_IEEE80211_COMPUTE_FCS
  17004. CFG_IEEE80211_RESERVE_FCS
  17005. CFG_IEEE80211_RTS
  17006. CFG_IND_ADDR_MASK
  17007. CFG_IND_ADDR_SET
  17008. CFG_IND_CMD_DONE_MASK
  17009. CFG_IND_RD_CMD_MASK
  17010. CFG_IND_WR_CMD_MASK
  17011. CFG_INIT_DAC_TYPE
  17012. CFG_INIT_REGS
  17013. CFG_INLINE
  17014. CFG_INTERLACE_I
  17015. CFG_INTERLACE_O
  17016. CFG_INTFRBSWAP
  17017. CFG_INTFRBSWAP_MASK
  17018. CFG_INT_CFG
  17019. CFG_INVT_FID
  17020. CFG_INV_CBLANK
  17021. CFG_INV_COMPBLANK
  17022. CFG_INV_COMPBLANK_MASK
  17023. CFG_INV_COMPSYNC
  17024. CFG_INV_COMPSYNC_MASK
  17025. CFG_INV_CSYNC
  17026. CFG_INV_HENA
  17027. CFG_INV_HENA_MASK
  17028. CFG_INV_HSYNC
  17029. CFG_INV_HSYNC_MASK
  17030. CFG_INV_PCLK
  17031. CFG_INV_PCLK_MASK
  17032. CFG_INV_VSYNC
  17033. CFG_INV_VSYNC_MASK
  17034. CFG_IOHC_PCI__CFG_IOHC_PCI_Dev0Fn2RegEn_MASK
  17035. CFG_IOHC_PCI__CFG_IOHC_PCI_Dev0Fn2RegEn__SHIFT
  17036. CFG_IOHC_PCI__IOMMU_DIS_MASK
  17037. CFG_IOHC_PCI__IOMMU_DIS__SHIFT
  17038. CFG_IOPADMODE
  17039. CFG_IOPADMODE_MASK
  17040. CFG_IOPAD_DUMB12GPIO
  17041. CFG_IOPAD_DUMB16GPIO
  17042. CFG_IOPAD_DUMB16SPI
  17043. CFG_IOPAD_DUMB18GPIO
  17044. CFG_IOPAD_DUMB18SPI
  17045. CFG_IOPAD_DUMB24
  17046. CFG_IOPAD_IN_MASK
  17047. CFG_IOPAD_MASK
  17048. CFG_IOPAD_SMART16
  17049. CFG_IOPAD_SMART18
  17050. CFG_IOPAD_SMART8
  17051. CFG_IQ_LOG_COUNT_MAX
  17052. CFG_IRQ_SEL_0
  17053. CFG_IRQ_SEL_1
  17054. CFG_IR_ACPI
  17055. CFG_IR_FXBUS
  17056. CFG_IR_HIGH
  17057. CFG_IR_IDE
  17058. CFG_IR_INTAB
  17059. CFG_IR_INTCD
  17060. CFG_IR_LOW
  17061. CFG_IR_PFD
  17062. CFG_IR_PS2
  17063. CFG_IR_SER
  17064. CFG_IR_USB
  17065. CFG_I_SPD_SEL_CDR_OVR1_SET
  17066. CFG_JUMBO_FRAME_SIZE
  17067. CFG_KEEPXFER
  17068. CFG_KEEPXFER_MASK
  17069. CFG_KE_IEN
  17070. CFG_K_LCK_IEN
  17071. CFG_L1_0_CRC_MISC_RET_VALUE
  17072. CFG_L1_0_CRC_MISC_RET_VALUE_DEFAULT
  17073. CFG_L1_0_CRC_SD30_RET_VALUE
  17074. CFG_L1_0_CRC_SD40_RET_VALUE
  17075. CFG_L1_0_PCIE_DPHY_RET_VALUE
  17076. CFG_L1_0_PCIE_MAC_RET_VALUE
  17077. CFG_L1_0_RET_VALUE_DEFAULT
  17078. CFG_L1_0_SYS_RET_VALUE
  17079. CFG_LAST_DATA_BLOCK_SIZE
  17080. CFG_LATE_CACHE
  17081. CFG_LB
  17082. CFG_LCDGPIO_ENA
  17083. CFG_LCDGPIO_ENA_MASK
  17084. CFG_LCDGPIO_O
  17085. CFG_LCDGPIO_O_MASK
  17086. CFG_LCQ
  17087. CFG_LE
  17088. CFG_LED_MODE
  17089. CFG_LED_MODE_MSK
  17090. CFG_LIBIPW_COMPUTE_FCS
  17091. CFG_LIBIPW_RESERVE_FCS
  17092. CFG_LIBIPW_RTS
  17093. CFG_LINEAR
  17094. CFG_LINK_1_AVAIL
  17095. CFG_LINK_2_AVAIL
  17096. CFG_LINK_AGGR_RESUME
  17097. CFG_LINK_AGGR_RESUME_0_ADDR
  17098. CFG_LIN_ACC_INC
  17099. CFG_LIN_ACC_INC_U_MASK
  17100. CFG_LIN_ACC_INC_U_SHIFT
  17101. CFG_LLM_HEAD_PTR_M
  17102. CFG_LLM_HEAD_PTR_S
  17103. CFG_LLM_INIT_EN_M
  17104. CFG_LLM_INIT_EN_S
  17105. CFG_LLM_QUE_DEPTH_M
  17106. CFG_LLM_QUE_DEPTH_S
  17107. CFG_LLM_QUE_PGSZ_M
  17108. CFG_LLM_QUE_PGSZ_S
  17109. CFG_LLM_TAIL_BA_H_M
  17110. CFG_LLM_TAIL_BA_H_S
  17111. CFG_LLM_TAIL_PTR_M
  17112. CFG_LLM_TAIL_PTR_S
  17113. CFG_LNBUF_ENA
  17114. CFG_LNBUF_ENA_MASK
  17115. CFG_LNC_WINDOW_REGISTER__CFG_LNC_WINDOW_MASK
  17116. CFG_LNC_WINDOW_REGISTER__CFG_LNC_WINDOW__SHIFT
  17117. CFG_LNC_WINDOW__CFG_LNC_WINDOW0_MASK
  17118. CFG_LNC_WINDOW__CFG_LNC_WINDOW0__SHIFT
  17119. CFG_LNKSTS
  17120. CFG_LOCAL_OS_MASK
  17121. CFG_LOCAL_TCRIT_MASK
  17122. CFG_LONG_PREAMBLE
  17123. CFG_LOOPBACK_EXT
  17124. CFG_LOOPBACK_HSS
  17125. CFG_LOOPBACK_MASK
  17126. CFG_LOOPBACK_PCS
  17127. CFG_LOOP_TEST_MODE_MSK
  17128. CFG_LOOP_TEST_MODE_OFF
  17129. CFG_LOW_RATE_LKREN_EN
  17130. CFG_LP_FPWM_VALUE
  17131. CFG_LP_FPWM_VALUE_DEFAULT
  17132. CFG_LR
  17133. CFG_LRQ
  17134. CFG_LRU
  17135. CFG_M64ADDR
  17136. CFG_MACMODE_LEN
  17137. CFG_MACMODE_POS
  17138. CFG_MACMODE_SET
  17139. CFG_MAC_ADDR
  17140. CFG_MASK
  17141. CFG_MAX_SPEED
  17142. CFG_MAX_TAG
  17143. CFG_MC_ADDR0_EN
  17144. CFG_MC_ADDR1_EN
  17145. CFG_MC_FILTER_EN
  17146. CFG_MEM1BAR
  17147. CFG_MEM_RAM_SHUTDOWN
  17148. CFG_MEM_TYPE
  17149. CFG_MEM_TYPE_xT
  17150. CFG_META_DATA_SIZE
  17151. CFG_MII_SELECT
  17152. CFG_MIN_GY_THR_MASK
  17153. CFG_MIN_GY_THR_RANGE_MASK
  17154. CFG_MIN_GY_THR_RANGE_SHIFT
  17155. CFG_MIN_GY_THR_SHIFT
  17156. CFG_MM2S_CH_MASK
  17157. CFG_MM2S_CH_SHIFT
  17158. CFG_MM2S_PKG_MASK
  17159. CFG_MM2S_XFER_MASK
  17160. CFG_MM2S_XFER_SHIFT
  17161. CFG_MODE
  17162. CFG_MODE_1
  17163. CFG_MODE_1000
  17164. CFG_MODE_AUTO
  17165. CFG_MODE_CTS
  17166. CFG_MODE_DUAL_EDGE
  17167. CFG_MODE_MASK
  17168. CFG_MODE_ODSP_RESUME
  17169. CFG_MODE_ODSP_SUSPEND
  17170. CFG_MODE_OFF
  17171. CFG_MODE_ON
  17172. CFG_MODE_SHIFT
  17173. CFG_MRM_DIS
  17174. CFG_MSE_EVT
  17175. CFG_MUX1EN
  17176. CFG_MUX1SEL
  17177. CFG_MUX2EN
  17178. CFG_MUX2SEL
  17179. CFG_MWI_DIS
  17180. CFG_M_RETRY_CNT_MASK
  17181. CFG_M_RETRY_CNT_SHIFT
  17182. CFG_NET_STATS
  17183. CFG_NLIN_ACC_INC
  17184. CFG_NLIN_ACC_INC_U_MASK
  17185. CFG_NLIN_ACC_INC_U_SHIFT
  17186. CFG_NLIN_ACC_INIT
  17187. CFG_NLIN_ACC_INIT_U_MASK
  17188. CFG_NLIN_ACC_INIT_U_SHIFT
  17189. CFG_NLIN_LEFT_MASK
  17190. CFG_NLIN_LEFT_SHIFT
  17191. CFG_NLIN_RIGHT_MASK
  17192. CFG_NLIN_RIGHT_SHIFT
  17193. CFG_NL_HI_SLOPE_SH_MASK
  17194. CFG_NL_HI_SLOPE_SH_SHIFT
  17195. CFG_NL_HI_THR_MASK
  17196. CFG_NL_HI_THR_SHIFT
  17197. CFG_NL_LIMIT_MASK
  17198. CFG_NL_LIMIT_SHIFT
  17199. CFG_NL_LO_SLOPE_MASK
  17200. CFG_NL_LO_SLOPE_SHIFT
  17201. CFG_NL_LO_THR_MASK
  17202. CFG_NL_LO_THR_SHIFT
  17203. CFG_NOBLENDING
  17204. CFG_NOBLENDING_MASK
  17205. CFG_NOBUFOPT
  17206. CFG_NONE
  17207. CFG_NOTXTIMEOUT
  17208. CFG_NO_LED
  17209. CFG_NO_WAIT
  17210. CFG_NUM
  17211. CFG_NUM_DATA_BLOCKS
  17212. CFG_OFFSET
  17213. CFG_OFF_H_MASK
  17214. CFG_OFF_H_SHIFT
  17215. CFG_OFF_W_MASK
  17216. CFG_OFF_W_SHIFT
  17217. CFG_OR
  17218. CFG_ORG_H_MASK
  17219. CFG_ORG_H_SHIFT
  17220. CFG_ORG_W_MASK
  17221. CFG_ORG_W_SHIFT
  17222. CFG_OTG
  17223. CFG_OTG_CC_COMPENSATION_MASK
  17224. CFG_OTG_CC_COMPENSATION_SHIFT
  17225. CFG_OTG_TEMP_THRESHOLD_MASK
  17226. CFG_OTG_TEMP_THRESHOLD_SHIFT
  17227. CFG_OTHER
  17228. CFG_OTHER_RID_ENABLED_AUTO_OTG
  17229. CFG_OTHER_RID_MASK
  17230. CFG_OTP_ENABLE
  17231. CFG_OVERRD_TX_POWER
  17232. CFG_OVR_FLOW_IEN
  17233. CFG_OVR_FLOW_M
  17234. CFG_PAGE_OFFSET
  17235. CFG_PAGE_SIZE
  17236. CFG_PAGE_SIZE_SHIFT
  17237. CFG_PALETTE_ENA
  17238. CFG_PALETTE_ENA_MASK
  17239. CFG_PALETTE_RDDAT_MASK
  17240. CFG_PARAM_UNSET
  17241. CFG_PASSIVE_SCAN
  17242. CFG_PAUSE_MASK
  17243. CFG_PAUSE_PRI
  17244. CFG_PAUSE_STD
  17245. CFG_PBPR_SYNC_OFF_MASK
  17246. CFG_PBPR_SYNC_OFF_SHIFT
  17247. CFG_PBPR_SYNC_OFF_VAL
  17248. CFG_PCI64_DET
  17249. CFG_PCIE_APHY_OFF_0
  17250. CFG_PCIE_APHY_OFF_0_DEFAULT
  17251. CFG_PCIE_APHY_OFF_1
  17252. CFG_PCIE_APHY_OFF_1_DEFAULT
  17253. CFG_PCIE_APHY_OFF_2
  17254. CFG_PCIE_APHY_OFF_2_DEFAULT
  17255. CFG_PCIE_APHY_OFF_3
  17256. CFG_PCIE_APHY_OFF_3_DEFAULT
  17257. CFG_PCI_CACHE_LINE_SIZE
  17258. CFG_PCI_INTERRUPT_LINE
  17259. CFG_PCI_VENDOR_ID
  17260. CFG_PD
  17261. CFG_PDWN16x66
  17262. CFG_PDWN16x66_MASK
  17263. CFG_PDWN1920x32
  17264. CFG_PDWN256x24
  17265. CFG_PDWN256x24_MASK
  17266. CFG_PDWN256x32
  17267. CFG_PDWN256x32_MASK
  17268. CFG_PDWN256x8
  17269. CFG_PDWN256x8_MASK
  17270. CFG_PDWN32x32
  17271. CFG_PDWN32x32_MASK
  17272. CFG_PDWN32x66
  17273. CFG_PDWN32x66_MASK
  17274. CFG_PDWN64x66
  17275. CFG_PDWN64x66_MASK
  17276. CFG_PDWNHWC
  17277. CFG_PESEL
  17278. CFG_PHY_DIS
  17279. CFG_PHY_RST
  17280. CFG_PIN
  17281. CFG_PINT_CTL
  17282. CFG_PINT_DUPSTS
  17283. CFG_PINT_LNKSTS
  17284. CFG_PINT_SPDSTS
  17285. CFG_PIN_EN_APSD_IRQ
  17286. CFG_PIN_EN_CHARGER_ERROR
  17287. CFG_PIN_EN_CTRL_ACTIVE_HIGH
  17288. CFG_PIN_EN_CTRL_ACTIVE_LOW
  17289. CFG_PIN_EN_CTRL_MASK
  17290. CFG_PIXCMD_MASK
  17291. CFG_PLL_SYNC_CNT
  17292. CFG_PORT
  17293. CFG_PORT_INNER
  17294. CFG_PORT_V1
  17295. CFG_PORT_V2
  17296. CFG_POW
  17297. CFG_PREAMBLE_LONG
  17298. CFG_PREFILTER_EN_MASK
  17299. CFG_PREF_MEM_LIMIT_BASE_MEM_DECODE
  17300. CFG_PREF_MEM_LIMIT_BASE_MEM_LIMIT_DECODE
  17301. CFG_PROG_PHY_LINK_RATE_MSK
  17302. CFG_PROG_PHY_LINK_RATE_OFF
  17303. CFG_PROTECTION_TYPE
  17304. CFG_PSEUDO4
  17305. CFG_PSEUDO8
  17306. CFG_PSIZE
  17307. CFG_PWRDN_ENA
  17308. CFG_PWRDN_ENA_MASK
  17309. CFG_PXLCMD
  17310. CFG_PXLCMD_MASK
  17311. CFG_QOS
  17312. CFG_QUAD_ENABLE
  17313. CFG_Q_MASK
  17314. CFG_Q_SHIFT
  17315. CFG_RATE_CONTROL_ENABLE
  17316. CFG_RC
  17317. CFG_RCGR
  17318. CFG_RC_CC_MASK
  17319. CFG_RD_CA
  17320. CFG_RD_CRS
  17321. CFG_RD_FMT
  17322. CFG_RD_SUCCESS
  17323. CFG_RD_UR
  17324. CFG_READ_OR_WRITE
  17325. CFG_READ_TOGGLE_32BIT_ADDR
  17326. CFG_REG
  17327. CFG_REG_DOMAIN
  17328. CFG_REMOTE_OS_MASK
  17329. CFG_REMOTE_RD_REQ_BRIDGE_SIZE_2K
  17330. CFG_REMOTE_RD_REQ_BRIDGE_SIZE_4K
  17331. CFG_REMOTE_TCRIT_MASK
  17332. CFG_REQALG
  17333. CFG_RESET_DELAY
  17334. CFG_RESET_SAVE
  17335. CFG_RESET_SHIFT
  17336. CFG_RESP_TIMEOUT_MASK
  17337. CFG_RETRY_STATUS
  17338. CFG_RETRY_STATUS_TIMEOUT_US
  17339. CFG_REV
  17340. CFG_REVERSE_RGB
  17341. CFG_REVERSE_RGB_MASK
  17342. CFG_REV_RGB
  17343. CFG_RF
  17344. CFG_RN
  17345. CFG_RO
  17346. CFG_ROTEN
  17347. CFG_ROW_ACC_INC_MASK
  17348. CFG_ROW_ACC_INC_SHIFT
  17349. CFG_ROW_ACC_INIT_RAV_B_MASK
  17350. CFG_ROW_ACC_INIT_RAV_B_SHIFT
  17351. CFG_ROW_ACC_INIT_RAV_MASK
  17352. CFG_ROW_ACC_INIT_RAV_SHIFT
  17353. CFG_ROW_ACC_OFFSET_B_MASK
  17354. CFG_ROW_ACC_OFFSET_B_SHIFT
  17355. CFG_ROW_ACC_OFFSET_MASK
  17356. CFG_ROW_ACC_OFFSET_SHIFT
  17357. CFG_RR
  17358. CFG_RS
  17359. CFG_RSIF_FPBUFF_TIMEOUT_EN
  17360. CFG_RTLLIB_COMPUTE_FCS
  17361. CFG_RTLLIB_RESERVE_FCS
  17362. CFG_RU
  17363. CFG_RXBITS
  17364. CFG_RXBITSTO0
  17365. CFG_RXBITSTO0_MASK
  17366. CFG_RXBITS_MASK
  17367. CFG_RXCLK_MUXSEL0_SET
  17368. CFG_RXDMAOPT
  17369. CFG_RX_ALL_GOOD
  17370. CFG_RX_ASSOC_EN
  17371. CFG_RX_AUTH_EN
  17372. CFG_RX_BCN_EN
  17373. CFG_RX_BIST_EN_MSK
  17374. CFG_RX_BIST_EN_OFF
  17375. CFG_RX_CF_EN
  17376. CFG_RX_CTL_EN
  17377. CFG_RX_DATA_EN
  17378. CFG_RX_FCS
  17379. CFG_RX_FCS_ERROR
  17380. CFG_RX_FILTER_NULTI
  17381. CFG_RX_INT_ENCRYPTED
  17382. CFG_RX_INT_FCS_ERROR
  17383. CFG_RX_MGMT_EN
  17384. CFG_RX_PREQ_EN
  17385. CFG_RX_PRSP_EN
  17386. CFG_RX_RCTS_ACK
  17387. CFG_RX_RESERVE
  17388. CFG_RX_RSV_EN
  17389. CFG_RX_TIMESTAMP_TSF
  17390. CFG_RX_WR_RX_STATUS
  17391. CFG_S25FL_CHECK_ERROR_FLAGS
  17392. CFG_S2MM_CH_MASK
  17393. CFG_S2MM_CH_SHIFT
  17394. CFG_S2MM_PKG_MASK
  17395. CFG_S2MM_XFER_MASK
  17396. CFG_S2MM_XFER_SHIFT
  17397. CFG_SAS_CONFIG
  17398. CFG_SAS_RAS_INTR_MASK
  17399. CFG_SATA_ENET_SELECT_MASK
  17400. CFG_SATURATION
  17401. CFG_SATURATION_MASK
  17402. CFG_SB
  17403. CFG_SC0
  17404. CFG_SC1
  17405. CFG_SC10
  17406. CFG_SC11
  17407. CFG_SC12
  17408. CFG_SC13
  17409. CFG_SC17
  17410. CFG_SC18
  17411. CFG_SC19
  17412. CFG_SC2
  17413. CFG_SC20
  17414. CFG_SC21
  17415. CFG_SC22
  17416. CFG_SC23
  17417. CFG_SC24
  17418. CFG_SC25
  17419. CFG_SC3
  17420. CFG_SC4
  17421. CFG_SC5
  17422. CFG_SC6
  17423. CFG_SC8
  17424. CFG_SC9
  17425. CFG_SCLKCNT
  17426. CFG_SCLKCNT_MASK
  17427. CFG_SC_BYPASS
  17428. CFG_SC_FACTOR_RAV_MASK
  17429. CFG_SC_FACTOR_RAV_SHIFT
  17430. CFG_SDRAM_CONF
  17431. CFG_SDRAM_MODE
  17432. CFG_SDRAM_REFRESH
  17433. CFG_SDRAM_SIZE
  17434. CFG_SELFGEN_FID
  17435. CFG_SERVICE_TYPE
  17436. CFG_SETUP
  17437. CFG_SET_ABORTED_EN_OFF
  17438. CFG_SET_ABORTED_IPTT_MSK
  17439. CFG_SET_ABORTED_IPTT_OFF
  17440. CFG_SET_IQ_INTR_PKT
  17441. CFG_SET_NUM_RX_DESCS_NIC_IF
  17442. CFG_SET_NUM_TX_DESCS_NIC_IF
  17443. CFG_SET_OQ_INTR_PKT
  17444. CFG_SET_OQ_INTR_TIME
  17445. CFG_SET_SQLCH
  17446. CFG_SG
  17447. CFG_SGID_TB_TABLE_IDX_M
  17448. CFG_SGID_TB_TABLE_IDX_S
  17449. CFG_SGID_TB_VF_SGID_TYPE_M
  17450. CFG_SGID_TB_VF_SGID_TYPE_S
  17451. CFG_SHIFT
  17452. CFG_SIN0
  17453. CFG_SIN0_MASK
  17454. CFG_SIZE
  17455. CFG_SLAVE_ADDR_0_SHIFT
  17456. CFG_SLEEPING
  17457. CFG_SLOW_CLOCK_ENABLE
  17458. CFG_SMAC_TB_IDX_M
  17459. CFG_SMAC_TB_IDX_S
  17460. CFG_SMAC_TB_VF_SMAC_H_M
  17461. CFG_SMAC_TB_VF_SMAC_H_S
  17462. CFG_SMPN_FASTTX
  17463. CFG_SN
  17464. CFG_SNG_MAC
  17465. CFG_SOFT_RESET
  17466. CFG_SPACE_REG
  17467. CFG_SPDSTS
  17468. CFG_SPDSTS0
  17469. CFG_SPDSTS1
  17470. CFG_SPEED_1250
  17471. CFG_SPEED_125_POS
  17472. CFG_SPEED_SCAN
  17473. CFG_SPI_3W4WB
  17474. CFG_SPI_3W4WB_MASK
  17475. CFG_SPI_ENA
  17476. CFG_SPI_ENA_MASK
  17477. CFG_SPI_SEL
  17478. CFG_SPI_SEL_MASK
  17479. CFG_SPI_START
  17480. CFG_SPI_START_MASK
  17481. CFG_SRAM_ADDR
  17482. CFG_SRAM_ADDR_LCDID
  17483. CFG_SRAM_ADDR_LCDID_MASK
  17484. CFG_SRAM_ADDR_MASK
  17485. CFG_SRAM_INIT_WR_RD
  17486. CFG_SRAM_INIT_WR_RD_MASK
  17487. CFG_SRAM_WAIT
  17488. CFG_SRC_DIV_SHIFT
  17489. CFG_SRC_H_MASK
  17490. CFG_SRC_H_SHIFT
  17491. CFG_SRC_SEL_MASK
  17492. CFG_SRC_SEL_SHIFT
  17493. CFG_SRC_W_MASK
  17494. CFG_SRC_W_SHIFT
  17495. CFG_SSID_FILTER_EN
  17496. CFG_STAT
  17497. CFG_STATIC
  17498. CFG_STATIC_BSSID
  17499. CFG_STATIC_CHANNEL
  17500. CFG_STATIC_ESSID
  17501. CFG_STATUS_IRQ
  17502. CFG_STATUS_IRQ_CHARGE_TIMEOUT
  17503. CFG_STATUS_IRQ_TERMINATION_OR_TAPER
  17504. CFG_STAT_ACTIVE_HIGH
  17505. CFG_STAT_DISABLED
  17506. CFG_STOP
  17507. CFG_STOP_CLOCK
  17508. CFG_STR_CMD
  17509. CFG_SUB_PCKT_NUM
  17510. CFG_SWAPRB
  17511. CFG_SWAPUV
  17512. CFG_SWAPYU
  17513. CFG_SW_TX_RETRIES
  17514. CFG_SYNC_ON_PBPR_MASK
  17515. CFG_SYSOK
  17516. CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED
  17517. CFG_SYSSEL
  17518. CFG_SYS_ANTENNA_A
  17519. CFG_SYS_ANTENNA_B
  17520. CFG_SYS_ANTENNA_BOTH
  17521. CFG_SYS_ANTENNA_SLOW_DIV
  17522. CFG_SZ_16
  17523. CFG_SZ_18
  17524. CFG_SZ_20
  17525. CFG_SZ_24
  17526. CFG_SZ_8
  17527. CFG_SZ_MASK
  17528. CFG_T64ADDR
  17529. CFG_TAGS
  17530. CFG_TARGET_BUS
  17531. CFG_TARGET_BUS_BUSNUM_MASK
  17532. CFG_TARGET_BUS_MASK_MASK
  17533. CFG_TAR_H_MASK
  17534. CFG_TAR_H_SHIFT
  17535. CFG_TAR_W_MASK
  17536. CFG_TAR_W_SHIFT
  17537. CFG_TBI_EN
  17538. CFG_TE
  17539. CFG_TEMP_LIMIT
  17540. CFG_TEMP_LIMIT_HARD_COLD_MASK
  17541. CFG_TEMP_LIMIT_HARD_COLD_SHIFT
  17542. CFG_TEMP_LIMIT_HARD_HOT_MASK
  17543. CFG_TEMP_LIMIT_HARD_HOT_SHIFT
  17544. CFG_TEMP_LIMIT_SOFT_COLD_MASK
  17545. CFG_TEMP_LIMIT_SOFT_COLD_SHIFT
  17546. CFG_TEMP_LIMIT_SOFT_HOT_MASK
  17547. CFG_TEMP_LIMIT_SOFT_HOT_SHIFT
  17548. CFG_TF
  17549. CFG_THERM
  17550. CFG_THERM_MONITOR_DISABLED
  17551. CFG_THERM_SOFT_COLD_COMPENSATION_MASK
  17552. CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT
  17553. CFG_THERM_SOFT_HOT_COMPENSATION_MASK
  17554. CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT
  17555. CFG_TIMER_CTRL_ACK_NAK_SHIFT
  17556. CFG_TIMER_CTRL_MAX_FUNC_NUM_OFF
  17557. CFG_TKIPOPT
  17558. CFG_TMOT_HW
  17559. CFG_TMOT_HWLONG
  17560. CFG_TMOT_SW
  17561. CFG_TMRTEST
  17562. CFG_TN
  17563. CFG_TPC_HALF_DBM2
  17564. CFG_TPC_HALF_DBM5
  17565. CFG_TP_SCALE
  17566. CFG_TR
  17567. CFG_TRIM
  17568. CFG_TV_INTERLACE_EN
  17569. CFG_TV_NIB
  17570. CFG_TXBITS
  17571. CFG_TXBITSTO0
  17572. CFG_TXBITSTO0_MASK
  17573. CFG_TXBITS_MASK
  17574. CFG_TXCLK_MUXSEL0_SET
  17575. CFG_TX_BIST_EN_MSK
  17576. CFG_TX_BIST_EN_OFF
  17577. CFG_TYPE1
  17578. CFG_UDF_EOL2
  17579. CFG_UDF_EOL3
  17580. CFG_UDF_OFFSET_BASE_SHIFT
  17581. CFG_UDF_OFFSET_MASK
  17582. CFG_UDF_SOF
  17583. CFG_UNI_FILTER_EN
  17584. CFG_USER_RTS_THRESHOLD
  17585. CFG_USE_32KHZ_CLOCK
  17586. CFG_USE_RAV
  17587. CFG_VALID
  17588. CFG_VENDORID
  17589. CFG_VGA_RAM_EN
  17590. CFG_VSCALE_LN_EN
  17591. CFG_VSYNC_INV
  17592. CFG_VSYNC_INV_MASK
  17593. CFG_VSYNC_TRIG
  17594. CFG_VSYNC_TRIG_MASK
  17595. CFG_VUPDATE_LOCK_SET0__CFG_VUPDATE_LOCK_SET_MASK
  17596. CFG_VUPDATE_LOCK_SET0__CFG_VUPDATE_LOCK_SET__SHIFT
  17597. CFG_VUPDATE_LOCK_SET1__CFG_VUPDATE_LOCK_SET_MASK
  17598. CFG_VUPDATE_LOCK_SET1__CFG_VUPDATE_LOCK_SET__SHIFT
  17599. CFG_VUPDATE_LOCK_SET2__CFG_VUPDATE_LOCK_SET_MASK
  17600. CFG_VUPDATE_LOCK_SET2__CFG_VUPDATE_LOCK_SET__SHIFT
  17601. CFG_VUPDATE_LOCK_SET3__CFG_VUPDATE_LOCK_SET_MASK
  17602. CFG_VUPDATE_LOCK_SET3__CFG_VUPDATE_LOCK_SET__SHIFT
  17603. CFG_VUPDATE_LOCK_SET4__CFG_VUPDATE_LOCK_SET_MASK
  17604. CFG_VUPDATE_LOCK_SET4__CFG_VUPDATE_LOCK_SET__SHIFT
  17605. CFG_VUPDATE_LOCK_SET5__CFG_VUPDATE_LOCK_SET_MASK
  17606. CFG_VUPDATE_LOCK_SET5__CFG_VUPDATE_LOCK_SET__SHIFT
  17607. CFG_V_ACTIVE
  17608. CFG_V_BACK_PORCH
  17609. CFG_V_FRONT_PORCH
  17610. CFG_V_TOTAL
  17611. CFG_WAITASYNCRD_EN
  17612. CFG_WAITASYNCRD_LEN
  17613. CFG_WAITASYNCRD_POS
  17614. CFG_WAITASYNCRD_SET
  17615. CFG_WDC_TRANSPORT_CHUNK_SIZE
  17616. CFG_WFIFOFULLTHR_LEN
  17617. CFG_WFIFOFULLTHR_POS
  17618. CFG_WIFI_BIT
  17619. CFG_WINDOW_TYPE
  17620. CFG_WME_ENABLED
  17621. CFG_WORD_CMD
  17622. CFG_WRITE_TOGGLE_32BIT_ADDR
  17623. CFG_WRRD_TYPE_0
  17624. CFG_WR_FMT
  17625. CFG_X888
  17626. CFG_XO
  17627. CFG_XR2NORM_RATE_THRESHOLD
  17628. CFG_XRMODE_SWITCH_COUNT
  17629. CFG_XS
  17630. CFG_XU
  17631. CFG_YUV2RGB
  17632. CFG_YUV2RGB_DMA
  17633. CFG_YUV2RGB_DMA_MASK
  17634. CFG_YUV2RGB_GRA
  17635. CFG_YUV2RGB_GRA_MASK
  17636. CFG_Y_PK_EN
  17637. CFHOSTMANAGED
  17638. CFHOST_ENB
  17639. CFHSI_AWAKE
  17640. CFHSI_BUF_SZ_RX
  17641. CFHSI_BUF_SZ_TX
  17642. CFHSI_DBG_PREFILL
  17643. CFHSI_DESC_SHORT_SZ
  17644. CFHSI_DESC_SZ
  17645. CFHSI_FLUSH_FIFO
  17646. CFHSI_INACTIVITY_TOUT
  17647. CFHSI_MAX_CAIF_FRAME_SZ
  17648. CFHSI_MAX_EMB_FRM_SZ
  17649. CFHSI_MAX_PAYLOAD_SZ
  17650. CFHSI_MAX_PKTS
  17651. CFHSI_MAX_RX_RETRIES
  17652. CFHSI_PIGGY_DESC
  17653. CFHSI_PRIO_BEBK
  17654. CFHSI_PRIO_CTL
  17655. CFHSI_PRIO_LAST
  17656. CFHSI_PRIO_VI
  17657. CFHSI_PRIO_VO
  17658. CFHSI_RX_STATE_DESC
  17659. CFHSI_RX_STATE_PAYLOAD
  17660. CFHSI_SHUTDOWN
  17661. CFHSI_TX_STATE_IDLE
  17662. CFHSI_TX_STATE_XFER
  17663. CFHSI_WAKELOCK_HELD
  17664. CFHSI_WAKE_DOWN_ACK
  17665. CFHSI_WAKE_TOUT
  17666. CFHSI_WAKE_UP
  17667. CFHSI_WAKE_UP_ACK
  17668. CFID_DID
  17669. CFID_VID
  17670. CFID_X25_2X
  17671. CFIFO
  17672. CFIFOCTR
  17673. CFIFOSEL
  17674. CFIFOSIE
  17675. CFIFO_ECC
  17676. CFIFO_ECC_1ST_LINE
  17677. CFIFO_ECC_2ND_LINE
  17678. CFIFO_ECC_ALL_PKT
  17679. CFIFO_ECC_DBLBIT_ERR
  17680. CFIFO_ECC_DIS_DBLBIT_ERR
  17681. CFIFO_ECC_LAST_LINE
  17682. CFIFO_ECC_SINGLEBIT_ERR
  17683. CFIFTOERR
  17684. CFINCBIOS
  17685. CFINIT
  17686. CFIS_CF
  17687. CFIS_IS
  17688. CFIT_IRQL
  17689. CFIT_IRQP
  17690. CFIT_MNGT
  17691. CFIT_MXLT
  17692. CFI_ADJUST_CFA_OFFSET
  17693. CFI_AX
  17694. CFI_BIG_ENDIAN
  17695. CFI_BP
  17696. CFI_BP_INDIRECT
  17697. CFI_BX
  17698. CFI_CFA
  17699. CFI_CX
  17700. CFI_DEFAULT_ENDIAN
  17701. CFI_DEF_CFA
  17702. CFI_DEF_CFA_OFFSET
  17703. CFI_DEF_CFA_REGISTER
  17704. CFI_DEVICETYPE_X16
  17705. CFI_DEVICETYPE_X32
  17706. CFI_DEVICETYPE_X64
  17707. CFI_DEVICETYPE_X8
  17708. CFI_DI
  17709. CFI_DX
  17710. CFI_ENDPROC
  17711. CFI_END_FRAME
  17712. CFI_END_OSF_FRAME
  17713. CFI_ESCAPE
  17714. CFI_HOST_ENDIAN
  17715. CFI_ID_ANY
  17716. CFI_IGNORE
  17717. CFI_INTERFACE_NOT_ALLOWED
  17718. CFI_INTERFACE_X16_ASYNC
  17719. CFI_INTERFACE_X16_BY_X32_ASYNC
  17720. CFI_INTERFACE_X32_ASYNC
  17721. CFI_INTERFACE_X8_ASYNC
  17722. CFI_INTERFACE_X8_BY_X16_ASYNC
  17723. CFI_LITTLE_ENDIAN
  17724. CFI_MFR_AMD
  17725. CFI_MFR_AMIC
  17726. CFI_MFR_ANY
  17727. CFI_MFR_ATMEL
  17728. CFI_MFR_CONTINUATION
  17729. CFI_MFR_EON
  17730. CFI_MFR_FUJITSU
  17731. CFI_MFR_HYUNDAI
  17732. CFI_MFR_INTEL
  17733. CFI_MFR_MACRONIX
  17734. CFI_MFR_MICRON
  17735. CFI_MFR_NEC
  17736. CFI_MFR_PMC
  17737. CFI_MFR_SAMSUNG
  17738. CFI_MFR_SHARP
  17739. CFI_MFR_SST
  17740. CFI_MFR_ST
  17741. CFI_MFR_TOSHIBA
  17742. CFI_MFR_WINBOND
  17743. CFI_MODE_CFI
  17744. CFI_MODE_JEDEC
  17745. CFI_NUM_REGS
  17746. CFI_OFFSET
  17747. CFI_POLL_DQ
  17748. CFI_POLL_STATUS_REG
  17749. CFI_R10
  17750. CFI_R11
  17751. CFI_R12
  17752. CFI_R13
  17753. CFI_R14
  17754. CFI_R15
  17755. CFI_R8
  17756. CFI_R9
  17757. CFI_RA
  17758. CFI_REGISTER
  17759. CFI_REL_OFFSET
  17760. CFI_REMEMBER_STATE
  17761. CFI_RESTORE
  17762. CFI_RESTORE_STATE
  17763. CFI_SHIFT
  17764. CFI_SI
  17765. CFI_SIGNAL_FRAME
  17766. CFI_SP
  17767. CFI_SP_INDIRECT
  17768. CFI_SR_DRB
  17769. CFI_SR_ESB
  17770. CFI_SR_PSB
  17771. CFI_SR_SLSB
  17772. CFI_SR_WBASB
  17773. CFI_STARTPROC
  17774. CFI_START_OSF_FRAME
  17775. CFI_STS
  17776. CFI_UNDEFINED
  17777. CFI_VAL_OFFSET
  17778. CFL1_CLOCK_SOURCE_AC97
  17779. CFL1_CLOCK_SOURCE_CRYSTAL
  17780. CFL1_CLOCK_SOURCE_CS423X
  17781. CFL1_CLOCK_SOURCE_DUAL_AC97
  17782. CFL1_CLOCK_SOURCE_MASK
  17783. CFL1_VALID_DATA_MASK
  17784. CFL2_VALID_DATA_MASK
  17785. CFLAG
  17786. CFLAGScmd
  17787. CFLAG_HEAD_TAG
  17788. CFLAG_NODISC
  17789. CFLAG_ORDERED_TAG
  17790. CFLAG_READ
  17791. CFLAG_SIMPLE_TAG
  17792. CFLAG_TAR_RTN
  17793. CFLAG_WRITE
  17794. CFLGS_OBJFREELIST_SLAB
  17795. CFLGS_OFF_SLAB
  17796. CFLT_BC
  17797. CFL_PLATFORM
  17798. CFL_UNC_CBO_7_PERFEVTSEL0
  17799. CFL_UNC_CBO_7_PER_CTR0
  17800. CFMAXTARG
  17801. CFMSG_DIAG
  17802. CFMSG_LEVEL
  17803. CFMSG_SILENT
  17804. CFMSG_VERBOSE
  17805. CFMULTILUN
  17806. CFMULTILUNDEV
  17807. CFMUXL_H_
  17808. CFM_DESCR_LEN
  17809. CFM_IMAGE_SIZE
  17810. CFM_LOAD_BUFSZ
  17811. CFM_MAX_CYCX
  17812. CFM_OFF
  17813. CFM_PASSKEY
  17814. CFM_SIGNATURE
  17815. CFM_VERSION
  17816. CFN
  17817. CFO_ERROR_REG_H
  17818. CFO_ERROR_REG_L
  17819. CFO_ESTIMATOR_CTRL_REG_1
  17820. CFO_ESTIMATOR_CTRL_REG_2
  17821. CFO_ESTIMATOR_CTRL_REG_3
  17822. CFO_ESTIMATOR_OFFSET_REG_H
  17823. CFO_ESTIMATOR_OFFSET_REG_L
  17824. CFO_THRESHOLD_ATC
  17825. CFO_THRESHOLD_XTAL
  17826. CFO_TH_ATC
  17827. CFO_TH_XTAL_HIGH
  17828. CFO_TH_XTAL_LOW
  17829. CFO_TRACKING
  17830. CFPACKETIZED
  17831. CFPB0_C0_H_CLK
  17832. CFPB0_C1_H_CLK
  17833. CFPB0_D0_H_CLK
  17834. CFPB0_D1_H_CLK
  17835. CFPB0_H_CLK
  17836. CFPB1_H_CLK
  17837. CFPB2_H_CLK
  17838. CFPB_2X_CLK_SRC
  17839. CFPB_CLK
  17840. CFPB_MASTER_H_CLK
  17841. CFPB_MASTER_RESET
  17842. CFPB_SPLITTER_H_CLK
  17843. CFPB_SPLITTER_RESET
  17844. CFPHYPREF_HIGH_BW
  17845. CFPHYPREF_LOOP
  17846. CFPHYPREF_LOW_LAT
  17847. CFPHYPREF_UNSPECIFIED
  17848. CFPKT_CTRL_PKT_LEN
  17849. CFPKT_H_
  17850. CFPREP_CBI_MASK
  17851. CFPREP_CBI_SHIFT
  17852. CFPREP_CFPP
  17853. CFP_EN_MAP_MASK
  17854. CFP_NUM_RULES
  17855. CFP_RAM_CLEAR
  17856. CFQAS
  17857. CFR
  17858. CFR0
  17859. CFR0_VALUE
  17860. CFR1
  17861. CFR1_VALUE
  17862. CFR2
  17863. CFR20
  17864. CFR21
  17865. CFR22
  17866. CFR2AVRGE0
  17867. CFR2AVRGE1
  17868. CFR2CFR1
  17869. CFR2_VALUE
  17870. CFR3_VALUE
  17871. CFRESETB
  17872. CFRICFG
  17873. CFRINC0
  17874. CFRINC1
  17875. CFRINIT0
  17876. CFRINIT1
  17877. CFRLOW0
  17878. CFRLOW1
  17879. CFRM_ID
  17880. CFRNFOUND
  17881. CFRUP0
  17882. CFRUP1
  17883. CFRV_BC
  17884. CFRV_MASK
  17885. CFRV_RN
  17886. CFRV_SC
  17887. CFRV_SN
  17888. CFR_AES
  17889. CFR_AT_VESA_078h
  17890. CFR_AUTOSCAN
  17891. CFR_CAMELLIA
  17892. CFR_CRC32C
  17893. CFR_DES
  17894. CFR_DEVID
  17895. CFR_DEVREV
  17896. CFR_DSA0
  17897. CFR_DSA1
  17898. CFR_IDE01INTR
  17899. CFR_INIT0
  17900. CFR_INIT1
  17901. CFR_INTR_CH0
  17902. CFR_KASUMI
  17903. CFR_LOW0
  17904. CFR_LOW1
  17905. CFR_MD5
  17906. CFR_MONTMUL
  17907. CFR_MONTSQR
  17908. CFR_MPMUL
  17909. CFR_SHA1
  17910. CFR_SHA256
  17911. CFR_SHA512
  17912. CFR_UP0
  17913. CFR_UP1
  17914. CFSCAMEN
  17915. CFSCSIID
  17916. CFSEAUTOTERM
  17917. CFSEHIGHTERM
  17918. CFSELOWTERM
  17919. CFSERL_H_
  17920. CFSERL_STX
  17921. CFSIGNATURE
  17922. CFSIGNATURE2
  17923. CFSIZ
  17924. CFSM2DRV
  17925. CFSPARITY
  17926. CFSPI_DBG_PREFILL
  17927. CFSPI_STATE_AWAKE
  17928. CFSPI_STATE_DELIVER_PKT
  17929. CFSPI_STATE_FETCH_PKT
  17930. CFSPI_STATE_GET_NEXT
  17931. CFSPI_STATE_INIT_XFER
  17932. CFSPI_STATE_MAX
  17933. CFSPI_STATE_SIG_ACTIVE
  17934. CFSPI_STATE_SIG_INACTIVE
  17935. CFSPI_STATE_WAITING
  17936. CFSPI_STATE_WAIT_ACTIVE
  17937. CFSPI_STATE_WAIT_INACTIVE
  17938. CFSPI_STATE_WAIT_XFER_DONE
  17939. CFSPI_STATE_XFER_DONE
  17940. CFSRVL_H_
  17941. CFSR_P2V
  17942. CFSR_V2P
  17943. CFSR_readw
  17944. CFSTART
  17945. CFSTERM
  17946. CFSTPWLEVEL
  17947. CFSUPREM
  17948. CFSUPREMB
  17949. CFSYNCH
  17950. CFSYNCHISULTRA
  17951. CFSYNCSINGLE
  17952. CFTERM_MENU
  17953. CFTYPE_DEBUG
  17954. CFTYPE_NOT_ON_ROOT
  17955. CFTYPE_NO_PREFIX
  17956. CFTYPE_NS_DELEGATABLE
  17957. CFTYPE_ONLY_ON_ROOT
  17958. CFTYPE_WORLD_WRITABLE
  17959. CFULTRAEN
  17960. CFUNCTION1
  17961. CFUSB_ALIGNMENT
  17962. CFUSB_MAX_HEADLEN
  17963. CFUSB_PAD_DESCR_SZ
  17964. CFV_DEFAULT_QUOTA
  17965. CFV_DEF_HEADROOM
  17966. CFV_DEF_MTU_SIZE
  17967. CFV_DEF_TAILROOM
  17968. CFWBCACHEENB
  17969. CFWBCACHENOP
  17970. CFWIDEB
  17971. CFWSTERM
  17972. CFXFER
  17973. CFXFER_ASYNC
  17974. CF_A00_MARK
  17975. CF_A01_MARK
  17976. CF_A02_MARK
  17977. CF_APP_LIMITED
  17978. CF_ATTR_PHYS
  17979. CF_BASE
  17980. CF_BROKEN_MWDMA
  17981. CF_BROKEN_PIO
  17982. CF_BROKEN_UDMA
  17983. CF_BUF0_VALID
  17984. CF_BUF1_VALID
  17985. CF_BUF2_VALID
  17986. CF_CACHEMASK
  17987. CF_CARD
  17988. CF_CD
  17989. CF_CDB1_MARK
  17990. CF_CDB2_MARK
  17991. CF_CFG
  17992. CF_CLOSE
  17993. CF_CLOSING
  17994. CF_CONFIG_NEEDED
  17995. CF_CONNECTED
  17996. CF_CONTROL
  17997. CF_CONTROL_RESET
  17998. CF_CRC_STRIP
  17999. CF_CSB0_MARK
  18000. CF_CSB1_MARK
  18001. CF_D00_MARK
  18002. CF_D01_MARK
  18003. CF_D02_MARK
  18004. CF_D03_MARK
  18005. CF_D04_MARK
  18006. CF_D05_MARK
  18007. CF_D06_MARK
  18008. CF_D07_MARK
  18009. CF_D08_MARK
  18010. CF_D09_MARK
  18011. CF_D10_MARK
  18012. CF_D11_MARK
  18013. CF_D12_MARK
  18014. CF_D13_MARK
  18015. CF_D14_MARK
  18016. CF_D15_MARK
  18017. CF_DATA_SEG_DESCR_ENABLE
  18018. CF_DEFAULT
  18019. CF_DIAG_CTRSET_DEF
  18020. CF_DIF_SEG_DESCR_ENABLE
  18021. CF_DISCARD_MY_DATA
  18022. CF_DMA_ACTIVE
  18023. CF_DRY_RUN
  18024. CF_D_FLUSH
  18025. CF_D_FLUSH_INV
  18026. CF_EN
  18027. CF_FRAME_SOF0
  18028. CF_FRAME_SOF1
  18029. CF_FRAME_SOF2
  18030. CF_GPIO_NUM
  18031. CF_HEAD_TAG
  18032. CF_IDE
  18033. CF_IF_CLK_100M
  18034. CF_IF_CLK_125M
  18035. CF_IF_CLK_150M
  18036. CF_IF_CLK_166M
  18037. CF_IF_CLK_200M
  18038. CF_IF_CLK_25M
  18039. CF_IF_CLK_33M
  18040. CF_IF_CLK_40M
  18041. CF_IF_CLK_50M
  18042. CF_IF_CLK_66M
  18043. CF_IF_CLK_75M
  18044. CF_IF_CLK_MASK
  18045. CF_INIT_PENDING
  18046. CF_INPACKB_MARK
  18047. CF_INTRQ_MARK
  18048. CF_IORDB_MARK
  18049. CF_IORDY_MARK
  18050. CF_IOWRB_MARK
  18051. CF_IO_PHYS
  18052. CF_IS_OTHERCON
  18053. CF_I_INV
  18054. CF_JOIN
  18055. CF_JOIN_A
  18056. CF_JOIN_B
  18057. CF_LE_L
  18058. CF_LE_W
  18059. CF_LOOP
  18060. CF_LOOP_A
  18061. CF_LOOP_B
  18062. CF_LS4_ORIGINATOR
  18063. CF_LS4_RESPONDER
  18064. CF_LS4_RESPONDER_TERM
  18065. CF_LS4_SHIFT
  18066. CF_MASK
  18067. CF_MEM_PHYS
  18068. CF_MIN_3DB_150HZ
  18069. CF_MIN_3DB_4HZ
  18070. CF_MIN_3DB_75HZ
  18071. CF_NO_DATA
  18072. CF_NVME_FIRST_BURST_ENABLE
  18073. CF_OFFSET
  18074. CF_ORDERED_TAG
  18075. CF_PAGE_ACCESSED
  18076. CF_PAGE_CHG_MASK
  18077. CF_PAGE_COPYBACK
  18078. CF_PAGE_DIRTY
  18079. CF_PAGE_EXEC
  18080. CF_PAGE_LOCKED
  18081. CF_PAGE_MMUDR_MASK
  18082. CF_PAGE_MMUTR_MASK
  18083. CF_PAGE_MMUTR_SHIFT
  18084. CF_PAGE_NOCACHE
  18085. CF_PAGE_READABLE
  18086. CF_PAGE_SHARED
  18087. CF_PAGE_SYSTEM
  18088. CF_PAGE_VALID
  18089. CF_PAGE_WRITABLE
  18090. CF_PLUS_CARD
  18091. CF_PWEN_GPIO
  18092. CF_READ
  18093. CF_READ_DATA
  18094. CF_READ_PENDING
  18095. CF_RESET_D0
  18096. CF_RESET_D1
  18097. CF_RESET_MARK
  18098. CF_RQ_PENDING
  18099. CF_SERVER
  18100. CF_SG_RESTART
  18101. CF_SIMPLE_TAG
  18102. CF_SINGLE_BUFFER
  18103. CF_STARTED
  18104. CF_STATUS
  18105. CF_STATUS_BAD_READ
  18106. CF_STATUS_BAD_WRITE
  18107. CF_STATUS_CARD_DETECT
  18108. CF_WRITE
  18109. CF_WRITE_DATA
  18110. CF_WRITE_PENDING
  18111. CG14_AUTO
  18112. CG14_CCR_ENABLE
  18113. CG14_CCR_SELECT
  18114. CG14_CLUT1
  18115. CG14_CLUT2
  18116. CG14_CLUT3
  18117. CG14_CURSORREGS
  18118. CG14_DACREGS
  18119. CG14_FLAG_BLANKED
  18120. CG14_MCR_INTENABLE_MASK
  18121. CG14_MCR_INTENABLE_SHIFT
  18122. CG14_MCR_PIXMODE_16
  18123. CG14_MCR_PIXMODE_32
  18124. CG14_MCR_PIXMODE_8
  18125. CG14_MCR_PIXMODE_MASK
  18126. CG14_MCR_PIXMODE_SHIFT
  18127. CG14_MCR_RESET_MASK
  18128. CG14_MCR_RESET_SHIFT
  18129. CG14_MCR_TMENABLE_MASK
  18130. CG14_MCR_TMENABLE_SHIFT
  18131. CG14_MCR_TMR_MASK
  18132. CG14_MCR_TMR_SHIFT
  18133. CG14_MCR_VIDENABLE_MASK
  18134. CG14_MCR_VIDENABLE_SHIFT
  18135. CG14_MMAP_ENTRIES
  18136. CG14_REGS
  18137. CG14_REV_IMPL_MASK
  18138. CG14_REV_IMPL_SHIFT
  18139. CG14_REV_REVISION_MASK
  18140. CG14_REV_REVISION_SHIFT
  18141. CG14_VBR_FRAMEBASE_MASK
  18142. CG14_VBR_FRAMEBASE_SHIFT
  18143. CG14_VCA_8MB_MASK
  18144. CG14_VCA_8MB_SHIFT
  18145. CG14_VCA_CAD_MASK
  18146. CG14_VCA_CAD_SHIFT
  18147. CG14_VCA_RAMSPEED_MASK
  18148. CG14_VCA_RAMSPEED_SHIFT
  18149. CG14_VCA_VERS_MASK
  18150. CG14_VCA_VERS_SHIFT
  18151. CG14_VCR1_REFRESHENA_MASK
  18152. CG14_VCR1_REFRESHENA_SHIFT
  18153. CG14_VCR_REFRESHREQ_MASK
  18154. CG14_VCR_REFRESHREQ_SHIFT
  18155. CG14_VMCR1_SETUP_MASK
  18156. CG14_VMCR1_SETUP_SHIFT
  18157. CG14_VMCR1_VCONFIG_MASK
  18158. CG14_VMCR1_VCONFIG_SHIFT
  18159. CG14_VMCR2_FBCONFIG_MASK
  18160. CG14_VMCR2_FBCONFIG_SHIFT
  18161. CG14_VMCR2_REFRESH_MASK
  18162. CG14_VMCR2_REFRESH_SHIFT
  18163. CG14_VMCR2_TESTROWCNT_MASK
  18164. CG14_VMCR2_TESTROWCNT_SHIFT
  18165. CG14_XLUT
  18166. CG200_ADDR
  18167. CG200_SIZE
  18168. CG3_AT_66HZ
  18169. CG3_AT_76HZ
  18170. CG3_CR_DIVISOR_MASK
  18171. CG3_CR_ENABLE_CURCMP
  18172. CG3_CR_ENABLE_INTS
  18173. CG3_CR_ENABLE_TIMING
  18174. CG3_CR_ENABLE_VIDEO
  18175. CG3_CR_XTAL_MASK
  18176. CG3_FLAG_BLANKED
  18177. CG3_FLAG_RDI
  18178. CG3_MMAP_OFFSET
  18179. CG3_RAM_OFFSET
  18180. CG3_RDI
  18181. CG3_REGS_OFFSET
  18182. CG3_SR_1152_900_76_A
  18183. CG3_SR_1152_900_76_B
  18184. CG3_SR_ID_COLOR
  18185. CG3_SR_ID_MASK
  18186. CG3_SR_ID_MONO
  18187. CG3_SR_ID_MONO_ECL
  18188. CG3_SR_PENDING_INT
  18189. CG3_SR_RES_MASK
  18190. CG6_ALT_OFFSET
  18191. CG6_BROOKTREE_OFFSET
  18192. CG6_BTREGS
  18193. CG6_DHC
  18194. CG6_DHC_OFFSET
  18195. CG6_FBC
  18196. CG6_FBC_BDISP_0
  18197. CG6_FBC_BDISP_1
  18198. CG6_FBC_BDISP_IGNORE
  18199. CG6_FBC_BDISP_ILLEGAL
  18200. CG6_FBC_BDISP_MASK
  18201. CG6_FBC_BLIT_IGNORE
  18202. CG6_FBC_BLIT_ILLEGAL
  18203. CG6_FBC_BLIT_MASK
  18204. CG6_FBC_BLIT_NOSRC
  18205. CG6_FBC_BLIT_SRC
  18206. CG6_FBC_BREAD_0
  18207. CG6_FBC_BREAD_1
  18208. CG6_FBC_BREAD_IGNORE
  18209. CG6_FBC_BREAD_ILLEGAL
  18210. CG6_FBC_BREAD_MASK
  18211. CG6_FBC_BWRITE0_DISABLE
  18212. CG6_FBC_BWRITE0_ENABLE
  18213. CG6_FBC_BWRITE0_IGNORE
  18214. CG6_FBC_BWRITE0_ILLEGAL
  18215. CG6_FBC_BWRITE0_MASK
  18216. CG6_FBC_BWRITE1_DISABLE
  18217. CG6_FBC_BWRITE1_ENABLE
  18218. CG6_FBC_BWRITE1_IGNORE
  18219. CG6_FBC_BWRITE1_ILLEGAL
  18220. CG6_FBC_BWRITE1_MASK
  18221. CG6_FBC_DRAW_IGNORE
  18222. CG6_FBC_DRAW_ILLEGAL
  18223. CG6_FBC_DRAW_MASK
  18224. CG6_FBC_DRAW_PICK
  18225. CG6_FBC_DRAW_RENDER
  18226. CG6_FBC_INDEX_MASK
  18227. CG6_FBC_INDEX_MOD
  18228. CG6_FBC_MODE_COLOR1
  18229. CG6_FBC_MODE_COLOR8
  18230. CG6_FBC_MODE_HRMONO
  18231. CG6_FBC_MODE_IGNORE
  18232. CG6_FBC_MODE_MASK
  18233. CG6_FBC_OFFSET
  18234. CG6_FBC_VBLANK
  18235. CG6_FHC
  18236. CG6_FHC_1024
  18237. CG6_FHC_1152
  18238. CG6_FHC_1280
  18239. CG6_FHC_1600
  18240. CG6_FHC_CPU_386
  18241. CG6_FHC_CPU_68020
  18242. CG6_FHC_CPU_MASK
  18243. CG6_FHC_CPU_SPARC
  18244. CG6_FHC_DST_DISABLE
  18245. CG6_FHC_FBID_MASK
  18246. CG6_FHC_FBID_SHIFT
  18247. CG6_FHC_FROP_DISABLE
  18248. CG6_FHC_LITTLE_ENDIAN
  18249. CG6_FHC_OFFSET
  18250. CG6_FHC_RESET
  18251. CG6_FHC_RES_MASK
  18252. CG6_FHC_REV_MASK
  18253. CG6_FHC_REV_SHIFT
  18254. CG6_FHC_ROW_DISABLE
  18255. CG6_FHC_SRC_DISABLE
  18256. CG6_FHC_TEST
  18257. CG6_FHC_TEST_X_MASK
  18258. CG6_FHC_TEST_X_SHIFT
  18259. CG6_FHC_TEST_Y_MASK
  18260. CG6_FHC_TEST_Y_SHIFT
  18261. CG6_FLAG_BLANKED
  18262. CG6_RAM
  18263. CG6_RAM_OFFSET
  18264. CG6_ROM
  18265. CG6_ROM_OFFSET
  18266. CG6_TEC
  18267. CG6_TEC_OFFSET
  18268. CG6_THC
  18269. CG6_THC_CURSOFF
  18270. CG6_THC_MISC_CURS_RES
  18271. CG6_THC_MISC_INIT
  18272. CG6_THC_MISC_INT
  18273. CG6_THC_MISC_INT_ENAB
  18274. CG6_THC_MISC_RESET
  18275. CG6_THC_MISC_REV_MASK
  18276. CG6_THC_MISC_REV_SHIFT
  18277. CG6_THC_MISC_SYNC
  18278. CG6_THC_MISC_SYNC_ENAB
  18279. CG6_THC_MISC_VIDEO
  18280. CG6_THC_MISC_VSYNC
  18281. CG6_THC_OFFSET
  18282. CGAMMAWD
  18283. CGA_BASE
  18284. CGA_PLL1
  18285. CGA_PLL2
  18286. CGA_PLL3
  18287. CGA_PLL4
  18288. CGBGAIN
  18289. CGB_PLL1
  18290. CGB_PLL2
  18291. CGCG_CGTT_LOCAL0_MASK
  18292. CGCG_CGTT_LOCAL1_MASK
  18293. CGCG_EN
  18294. CGCG_OVERRIDE_0
  18295. CGCS_RX_HW_ANTDIV
  18296. CGCS_RX_SW_ANTDIV
  18297. CGC_CLK_GATER_OFF_DLY_TIMER
  18298. CGC_CLK_GATER_OFF_DLY_TIMER_MASK
  18299. CGC_CLK_GATE_DLY_TIMER
  18300. CGC_CLK_GATE_DLY_TIMER_MASK
  18301. CGC_DATA_NONE
  18302. CGC_DATA_READ
  18303. CGC_DATA_UNKNOWN
  18304. CGC_DATA_WRITE
  18305. CGC_DYN_CLOCK_MODE
  18306. CGC_UENC_WAIT_AWAKE
  18307. CGEN
  18308. CGE_AVOLTAG
  18309. CGE_ERRNO
  18310. CGE_IDLUN
  18311. CGE_INVERT
  18312. CGE_PVOLTAG
  18313. CGE_SRC
  18314. CGLS_EN
  18315. CGLS_ENABLE
  18316. CGM_PIPE_CSC_COEFF01
  18317. CGM_PIPE_CSC_COEFF23
  18318. CGM_PIPE_CSC_COEFF45
  18319. CGM_PIPE_CSC_COEFF67
  18320. CGM_PIPE_CSC_COEFF8
  18321. CGM_PIPE_DEGAMMA
  18322. CGM_PIPE_GAMMA
  18323. CGM_PIPE_MODE
  18324. CGM_PIPE_MODE_CSC
  18325. CGM_PIPE_MODE_DEGAMMA
  18326. CGM_PIPE_MODE_GAMMA
  18327. CGPR
  18328. CGPSF_CLKGATE_DIS
  18329. CGP_OFFSET
  18330. CGRGAIN
  18331. CGROUP2_SUPER_MAGIC
  18332. CGROUPSTATS_CMD_ATTR_FD
  18333. CGROUPSTATS_CMD_ATTR_MAX
  18334. CGROUPSTATS_CMD_ATTR_UNSPEC
  18335. CGROUPSTATS_CMD_GET
  18336. CGROUPSTATS_CMD_MAX
  18337. CGROUPSTATS_CMD_NEW
  18338. CGROUPSTATS_CMD_UNSPEC
  18339. CGROUPSTATS_TYPE_CGROUP_STATS
  18340. CGROUPSTATS_TYPE_MAX
  18341. CGROUPSTATS_TYPE_UNSPEC
  18342. CGROUP_FILE_NAME_MAX
  18343. CGROUP_FILE_NOTIFY_MIN_INTV
  18344. CGROUP_FILE_PROCS
  18345. CGROUP_FILE_TASKS
  18346. CGROUP_FREEZER_ONLINE
  18347. CGROUP_FREEZING
  18348. CGROUP_FREEZING_PARENT
  18349. CGROUP_FREEZING_SELF
  18350. CGROUP_FROZEN
  18351. CGROUP_MGCTX_INIT
  18352. CGROUP_MOUNT_PATH
  18353. CGROUP_NS_INDEX
  18354. CGROUP_PATH
  18355. CGROUP_PIDLIST_DESTROY_DELAY
  18356. CGROUP_SUBSYS_COUNT
  18357. CGROUP_SUPER_MAGIC
  18358. CGROUP_TASKSET_INIT
  18359. CGROUP_WEIGHT_DFL
  18360. CGROUP_WEIGHT_MAX
  18361. CGROUP_WEIGHT_MIN
  18362. CGROUP_WORK_DIR
  18363. CGRP_CPUSET_CLONE_CHILDREN
  18364. CGRP_FREEZE
  18365. CGRP_FROZEN
  18366. CGRP_NOTIFY_ON_RELEASE
  18367. CGRP_ROOT_CPUSET_V2_MODE
  18368. CGRP_ROOT_MEMORY_LOCAL_EVENTS
  18369. CGRP_ROOT_NOPREFIX
  18370. CGRP_ROOT_NS_DELEGATE
  18371. CGRP_ROOT_XATTR
  18372. CGR_BIT
  18373. CGR_BITS_PER_WORD
  18374. CGR_ID
  18375. CGR_NUM
  18376. CGR_WORD
  18377. CGSL
  18378. CGS_CALL
  18379. CGS_FUNC_ADEV
  18380. CGS_IND_REG_GC_CAC
  18381. CGS_IND_REG_SE_CAC
  18382. CGS_IND_REG__AUDIO_ENDPT
  18383. CGS_IND_REG__DIDT
  18384. CGS_IND_REG__MMIO
  18385. CGS_IND_REG__PCIE
  18386. CGS_IND_REG__SMC
  18387. CGS_IND_REG__UVD_CTX
  18388. CGS_OS_CALL
  18389. CGS_REG_FIELD_MASK
  18390. CGS_REG_FIELD_SHIFT
  18391. CGS_REG_GET_FIELD
  18392. CGS_REG_SET_FIELD
  18393. CGS_UCODE_ID_CP_CE
  18394. CGS_UCODE_ID_CP_ME
  18395. CGS_UCODE_ID_CP_MEC
  18396. CGS_UCODE_ID_CP_MEC_JT1
  18397. CGS_UCODE_ID_CP_MEC_JT2
  18398. CGS_UCODE_ID_CP_PFP
  18399. CGS_UCODE_ID_GMCON_RENG
  18400. CGS_UCODE_ID_MAXIMUM
  18401. CGS_UCODE_ID_RLC_G
  18402. CGS_UCODE_ID_SDMA0
  18403. CGS_UCODE_ID_SDMA1
  18404. CGS_UCODE_ID_SMU
  18405. CGS_UCODE_ID_SMU_SK
  18406. CGS_UCODE_ID_STORAGE
  18407. CGS_WREG32_FIELD
  18408. CGS_WREG32_FIELD_IND
  18409. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  18410. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  18411. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  18412. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  18413. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_MASK
  18414. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  18415. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  18416. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  18417. CGTS_CU0_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  18418. CGTS_CU0_LDS_SQ_CTRL_REG__LDS__SHIFT
  18419. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  18420. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  18421. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  18422. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  18423. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_MASK
  18424. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  18425. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  18426. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  18427. CGTS_CU0_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  18428. CGTS_CU0_LDS_SQ_CTRL_REG__SQ__SHIFT
  18429. CGTS_CU0_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  18430. CGTS_CU0_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  18431. CGTS_CU0_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  18432. CGTS_CU0_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  18433. CGTS_CU0_SP0_CTRL_REG__SP00_MASK
  18434. CGTS_CU0_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  18435. CGTS_CU0_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  18436. CGTS_CU0_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  18437. CGTS_CU0_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  18438. CGTS_CU0_SP0_CTRL_REG__SP00__SHIFT
  18439. CGTS_CU0_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  18440. CGTS_CU0_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  18441. CGTS_CU0_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  18442. CGTS_CU0_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  18443. CGTS_CU0_SP0_CTRL_REG__SP01_MASK
  18444. CGTS_CU0_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  18445. CGTS_CU0_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  18446. CGTS_CU0_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  18447. CGTS_CU0_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  18448. CGTS_CU0_SP0_CTRL_REG__SP01__SHIFT
  18449. CGTS_CU0_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  18450. CGTS_CU0_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  18451. CGTS_CU0_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  18452. CGTS_CU0_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  18453. CGTS_CU0_SP1_CTRL_REG__SP10_MASK
  18454. CGTS_CU0_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  18455. CGTS_CU0_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  18456. CGTS_CU0_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  18457. CGTS_CU0_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  18458. CGTS_CU0_SP1_CTRL_REG__SP10__SHIFT
  18459. CGTS_CU0_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  18460. CGTS_CU0_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  18461. CGTS_CU0_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  18462. CGTS_CU0_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  18463. CGTS_CU0_SP1_CTRL_REG__SP11_MASK
  18464. CGTS_CU0_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  18465. CGTS_CU0_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  18466. CGTS_CU0_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  18467. CGTS_CU0_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  18468. CGTS_CU0_SP1_CTRL_REG__SP11__SHIFT
  18469. CGTS_CU0_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  18470. CGTS_CU0_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  18471. CGTS_CU0_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE_MASK
  18472. CGTS_CU0_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  18473. CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK
  18474. CGTS_CU0_TA_SQC_CTRL_REG__SQC_OVERRIDE_MASK
  18475. CGTS_CU0_TA_SQC_CTRL_REG__SQC_OVERRIDE__SHIFT
  18476. CGTS_CU0_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  18477. CGTS_CU0_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  18478. CGTS_CU0_TA_SQC_CTRL_REG__SQC__SHIFT
  18479. CGTS_CU0_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  18480. CGTS_CU0_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  18481. CGTS_CU0_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  18482. CGTS_CU0_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  18483. CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK
  18484. CGTS_CU0_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  18485. CGTS_CU0_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  18486. CGTS_CU0_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  18487. CGTS_CU0_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  18488. CGTS_CU0_TA_SQC_CTRL_REG__TA__SHIFT
  18489. CGTS_CU0_TCPI_CTRL_REG__RESERVED_MASK
  18490. CGTS_CU0_TCPI_CTRL_REG__RESERVED__SHIFT
  18491. CGTS_CU0_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  18492. CGTS_CU0_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  18493. CGTS_CU0_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  18494. CGTS_CU0_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  18495. CGTS_CU0_TCPI_CTRL_REG__TCPI_MASK
  18496. CGTS_CU0_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  18497. CGTS_CU0_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  18498. CGTS_CU0_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  18499. CGTS_CU0_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  18500. CGTS_CU0_TCPI_CTRL_REG__TCPI__SHIFT
  18501. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  18502. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  18503. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  18504. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  18505. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_MASK
  18506. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  18507. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  18508. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  18509. CGTS_CU0_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  18510. CGTS_CU0_TD_TCP_CTRL_REG__TCPF__SHIFT
  18511. CGTS_CU0_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  18512. CGTS_CU0_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  18513. CGTS_CU0_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  18514. CGTS_CU0_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  18515. CGTS_CU0_TD_TCP_CTRL_REG__TCP_MASK
  18516. CGTS_CU0_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  18517. CGTS_CU0_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  18518. CGTS_CU0_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  18519. CGTS_CU0_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  18520. CGTS_CU0_TD_TCP_CTRL_REG__TCP__SHIFT
  18521. CGTS_CU0_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  18522. CGTS_CU0_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  18523. CGTS_CU0_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  18524. CGTS_CU0_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  18525. CGTS_CU0_TD_TCP_CTRL_REG__TD_MASK
  18526. CGTS_CU0_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  18527. CGTS_CU0_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  18528. CGTS_CU0_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  18529. CGTS_CU0_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  18530. CGTS_CU0_TD_TCP_CTRL_REG__TD__SHIFT
  18531. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  18532. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  18533. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  18534. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  18535. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_MASK
  18536. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  18537. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  18538. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  18539. CGTS_CU10_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  18540. CGTS_CU10_LDS_SQ_CTRL_REG__LDS__SHIFT
  18541. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  18542. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  18543. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  18544. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  18545. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_MASK
  18546. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  18547. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  18548. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  18549. CGTS_CU10_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  18550. CGTS_CU10_LDS_SQ_CTRL_REG__SQ__SHIFT
  18551. CGTS_CU10_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  18552. CGTS_CU10_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  18553. CGTS_CU10_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  18554. CGTS_CU10_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  18555. CGTS_CU10_SP0_CTRL_REG__SP00_MASK
  18556. CGTS_CU10_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  18557. CGTS_CU10_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  18558. CGTS_CU10_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  18559. CGTS_CU10_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  18560. CGTS_CU10_SP0_CTRL_REG__SP00__SHIFT
  18561. CGTS_CU10_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  18562. CGTS_CU10_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  18563. CGTS_CU10_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  18564. CGTS_CU10_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  18565. CGTS_CU10_SP0_CTRL_REG__SP01_MASK
  18566. CGTS_CU10_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  18567. CGTS_CU10_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  18568. CGTS_CU10_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  18569. CGTS_CU10_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  18570. CGTS_CU10_SP0_CTRL_REG__SP01__SHIFT
  18571. CGTS_CU10_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  18572. CGTS_CU10_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  18573. CGTS_CU10_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  18574. CGTS_CU10_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  18575. CGTS_CU10_SP1_CTRL_REG__SP10_MASK
  18576. CGTS_CU10_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  18577. CGTS_CU10_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  18578. CGTS_CU10_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  18579. CGTS_CU10_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  18580. CGTS_CU10_SP1_CTRL_REG__SP10__SHIFT
  18581. CGTS_CU10_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  18582. CGTS_CU10_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  18583. CGTS_CU10_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  18584. CGTS_CU10_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  18585. CGTS_CU10_SP1_CTRL_REG__SP11_MASK
  18586. CGTS_CU10_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  18587. CGTS_CU10_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  18588. CGTS_CU10_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  18589. CGTS_CU10_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  18590. CGTS_CU10_SP1_CTRL_REG__SP11__SHIFT
  18591. CGTS_CU10_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  18592. CGTS_CU10_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  18593. CGTS_CU10_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  18594. CGTS_CU10_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  18595. CGTS_CU10_TA_CTRL_REG__TA_MASK
  18596. CGTS_CU10_TA_CTRL_REG__TA_OVERRIDE_MASK
  18597. CGTS_CU10_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  18598. CGTS_CU10_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  18599. CGTS_CU10_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  18600. CGTS_CU10_TA_CTRL_REG__TA__SHIFT
  18601. CGTS_CU10_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  18602. CGTS_CU10_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  18603. CGTS_CU10_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  18604. CGTS_CU10_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  18605. CGTS_CU10_TA_SQC_CTRL_REG__TA_MASK
  18606. CGTS_CU10_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  18607. CGTS_CU10_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  18608. CGTS_CU10_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  18609. CGTS_CU10_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  18610. CGTS_CU10_TA_SQC_CTRL_REG__TA__SHIFT
  18611. CGTS_CU10_TCPI_CTRL_REG__RESERVED_MASK
  18612. CGTS_CU10_TCPI_CTRL_REG__RESERVED__SHIFT
  18613. CGTS_CU10_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  18614. CGTS_CU10_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  18615. CGTS_CU10_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  18616. CGTS_CU10_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  18617. CGTS_CU10_TCPI_CTRL_REG__TCPI_MASK
  18618. CGTS_CU10_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  18619. CGTS_CU10_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  18620. CGTS_CU10_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  18621. CGTS_CU10_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  18622. CGTS_CU10_TCPI_CTRL_REG__TCPI__SHIFT
  18623. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  18624. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  18625. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  18626. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  18627. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_MASK
  18628. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  18629. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  18630. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  18631. CGTS_CU10_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  18632. CGTS_CU10_TD_TCP_CTRL_REG__TCPF__SHIFT
  18633. CGTS_CU10_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  18634. CGTS_CU10_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  18635. CGTS_CU10_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  18636. CGTS_CU10_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  18637. CGTS_CU10_TD_TCP_CTRL_REG__TCP_MASK
  18638. CGTS_CU10_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  18639. CGTS_CU10_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  18640. CGTS_CU10_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  18641. CGTS_CU10_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  18642. CGTS_CU10_TD_TCP_CTRL_REG__TCP__SHIFT
  18643. CGTS_CU10_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  18644. CGTS_CU10_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  18645. CGTS_CU10_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  18646. CGTS_CU10_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  18647. CGTS_CU10_TD_TCP_CTRL_REG__TD_MASK
  18648. CGTS_CU10_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  18649. CGTS_CU10_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  18650. CGTS_CU10_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  18651. CGTS_CU10_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  18652. CGTS_CU10_TD_TCP_CTRL_REG__TD__SHIFT
  18653. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  18654. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  18655. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  18656. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  18657. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_MASK
  18658. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  18659. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  18660. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  18661. CGTS_CU11_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  18662. CGTS_CU11_LDS_SQ_CTRL_REG__LDS__SHIFT
  18663. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  18664. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  18665. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  18666. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  18667. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_MASK
  18668. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  18669. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  18670. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  18671. CGTS_CU11_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  18672. CGTS_CU11_LDS_SQ_CTRL_REG__SQ__SHIFT
  18673. CGTS_CU11_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  18674. CGTS_CU11_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  18675. CGTS_CU11_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  18676. CGTS_CU11_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  18677. CGTS_CU11_SP0_CTRL_REG__SP00_MASK
  18678. CGTS_CU11_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  18679. CGTS_CU11_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  18680. CGTS_CU11_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  18681. CGTS_CU11_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  18682. CGTS_CU11_SP0_CTRL_REG__SP00__SHIFT
  18683. CGTS_CU11_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  18684. CGTS_CU11_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  18685. CGTS_CU11_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  18686. CGTS_CU11_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  18687. CGTS_CU11_SP0_CTRL_REG__SP01_MASK
  18688. CGTS_CU11_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  18689. CGTS_CU11_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  18690. CGTS_CU11_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  18691. CGTS_CU11_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  18692. CGTS_CU11_SP0_CTRL_REG__SP01__SHIFT
  18693. CGTS_CU11_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  18694. CGTS_CU11_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  18695. CGTS_CU11_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  18696. CGTS_CU11_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  18697. CGTS_CU11_SP1_CTRL_REG__SP10_MASK
  18698. CGTS_CU11_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  18699. CGTS_CU11_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  18700. CGTS_CU11_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  18701. CGTS_CU11_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  18702. CGTS_CU11_SP1_CTRL_REG__SP10__SHIFT
  18703. CGTS_CU11_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  18704. CGTS_CU11_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  18705. CGTS_CU11_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  18706. CGTS_CU11_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  18707. CGTS_CU11_SP1_CTRL_REG__SP11_MASK
  18708. CGTS_CU11_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  18709. CGTS_CU11_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  18710. CGTS_CU11_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  18711. CGTS_CU11_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  18712. CGTS_CU11_SP1_CTRL_REG__SP11__SHIFT
  18713. CGTS_CU11_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  18714. CGTS_CU11_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  18715. CGTS_CU11_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  18716. CGTS_CU11_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  18717. CGTS_CU11_TA_CTRL_REG__TA_MASK
  18718. CGTS_CU11_TA_CTRL_REG__TA_OVERRIDE_MASK
  18719. CGTS_CU11_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  18720. CGTS_CU11_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  18721. CGTS_CU11_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  18722. CGTS_CU11_TA_CTRL_REG__TA__SHIFT
  18723. CGTS_CU11_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  18724. CGTS_CU11_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  18725. CGTS_CU11_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  18726. CGTS_CU11_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  18727. CGTS_CU11_TA_SQC_CTRL_REG__TA_MASK
  18728. CGTS_CU11_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  18729. CGTS_CU11_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  18730. CGTS_CU11_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  18731. CGTS_CU11_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  18732. CGTS_CU11_TA_SQC_CTRL_REG__TA__SHIFT
  18733. CGTS_CU11_TCPI_CTRL_REG__RESERVED_MASK
  18734. CGTS_CU11_TCPI_CTRL_REG__RESERVED__SHIFT
  18735. CGTS_CU11_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  18736. CGTS_CU11_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  18737. CGTS_CU11_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  18738. CGTS_CU11_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  18739. CGTS_CU11_TCPI_CTRL_REG__TCPI_MASK
  18740. CGTS_CU11_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  18741. CGTS_CU11_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  18742. CGTS_CU11_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  18743. CGTS_CU11_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  18744. CGTS_CU11_TCPI_CTRL_REG__TCPI__SHIFT
  18745. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  18746. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  18747. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  18748. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  18749. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_MASK
  18750. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  18751. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  18752. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  18753. CGTS_CU11_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  18754. CGTS_CU11_TD_TCP_CTRL_REG__TCPF__SHIFT
  18755. CGTS_CU11_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  18756. CGTS_CU11_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  18757. CGTS_CU11_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  18758. CGTS_CU11_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  18759. CGTS_CU11_TD_TCP_CTRL_REG__TCP_MASK
  18760. CGTS_CU11_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  18761. CGTS_CU11_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  18762. CGTS_CU11_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  18763. CGTS_CU11_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  18764. CGTS_CU11_TD_TCP_CTRL_REG__TCP__SHIFT
  18765. CGTS_CU11_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  18766. CGTS_CU11_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  18767. CGTS_CU11_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  18768. CGTS_CU11_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  18769. CGTS_CU11_TD_TCP_CTRL_REG__TD_MASK
  18770. CGTS_CU11_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  18771. CGTS_CU11_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  18772. CGTS_CU11_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  18773. CGTS_CU11_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  18774. CGTS_CU11_TD_TCP_CTRL_REG__TD__SHIFT
  18775. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  18776. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  18777. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  18778. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  18779. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_MASK
  18780. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  18781. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  18782. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  18783. CGTS_CU12_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  18784. CGTS_CU12_LDS_SQ_CTRL_REG__LDS__SHIFT
  18785. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  18786. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  18787. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  18788. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  18789. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_MASK
  18790. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  18791. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  18792. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  18793. CGTS_CU12_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  18794. CGTS_CU12_LDS_SQ_CTRL_REG__SQ__SHIFT
  18795. CGTS_CU12_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  18796. CGTS_CU12_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  18797. CGTS_CU12_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  18798. CGTS_CU12_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  18799. CGTS_CU12_SP0_CTRL_REG__SP00_MASK
  18800. CGTS_CU12_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  18801. CGTS_CU12_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  18802. CGTS_CU12_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  18803. CGTS_CU12_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  18804. CGTS_CU12_SP0_CTRL_REG__SP00__SHIFT
  18805. CGTS_CU12_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  18806. CGTS_CU12_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  18807. CGTS_CU12_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  18808. CGTS_CU12_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  18809. CGTS_CU12_SP0_CTRL_REG__SP01_MASK
  18810. CGTS_CU12_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  18811. CGTS_CU12_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  18812. CGTS_CU12_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  18813. CGTS_CU12_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  18814. CGTS_CU12_SP0_CTRL_REG__SP01__SHIFT
  18815. CGTS_CU12_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  18816. CGTS_CU12_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  18817. CGTS_CU12_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  18818. CGTS_CU12_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  18819. CGTS_CU12_SP1_CTRL_REG__SP10_MASK
  18820. CGTS_CU12_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  18821. CGTS_CU12_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  18822. CGTS_CU12_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  18823. CGTS_CU12_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  18824. CGTS_CU12_SP1_CTRL_REG__SP10__SHIFT
  18825. CGTS_CU12_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  18826. CGTS_CU12_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  18827. CGTS_CU12_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  18828. CGTS_CU12_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  18829. CGTS_CU12_SP1_CTRL_REG__SP11_MASK
  18830. CGTS_CU12_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  18831. CGTS_CU12_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  18832. CGTS_CU12_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  18833. CGTS_CU12_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  18834. CGTS_CU12_SP1_CTRL_REG__SP11__SHIFT
  18835. CGTS_CU12_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  18836. CGTS_CU12_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  18837. CGTS_CU12_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE_MASK
  18838. CGTS_CU12_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  18839. CGTS_CU12_TA_SQC_CTRL_REG__SQC_MASK
  18840. CGTS_CU12_TA_SQC_CTRL_REG__SQC_OVERRIDE_MASK
  18841. CGTS_CU12_TA_SQC_CTRL_REG__SQC_OVERRIDE__SHIFT
  18842. CGTS_CU12_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  18843. CGTS_CU12_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  18844. CGTS_CU12_TA_SQC_CTRL_REG__SQC__SHIFT
  18845. CGTS_CU12_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  18846. CGTS_CU12_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  18847. CGTS_CU12_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  18848. CGTS_CU12_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  18849. CGTS_CU12_TA_SQC_CTRL_REG__TA_MASK
  18850. CGTS_CU12_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  18851. CGTS_CU12_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  18852. CGTS_CU12_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  18853. CGTS_CU12_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  18854. CGTS_CU12_TA_SQC_CTRL_REG__TA__SHIFT
  18855. CGTS_CU12_TCPI_CTRL_REG__RESERVED_MASK
  18856. CGTS_CU12_TCPI_CTRL_REG__RESERVED__SHIFT
  18857. CGTS_CU12_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  18858. CGTS_CU12_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  18859. CGTS_CU12_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  18860. CGTS_CU12_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  18861. CGTS_CU12_TCPI_CTRL_REG__TCPI_MASK
  18862. CGTS_CU12_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  18863. CGTS_CU12_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  18864. CGTS_CU12_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  18865. CGTS_CU12_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  18866. CGTS_CU12_TCPI_CTRL_REG__TCPI__SHIFT
  18867. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  18868. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  18869. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  18870. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  18871. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_MASK
  18872. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  18873. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  18874. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  18875. CGTS_CU12_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  18876. CGTS_CU12_TD_TCP_CTRL_REG__TCPF__SHIFT
  18877. CGTS_CU12_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  18878. CGTS_CU12_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  18879. CGTS_CU12_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  18880. CGTS_CU12_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  18881. CGTS_CU12_TD_TCP_CTRL_REG__TCP_MASK
  18882. CGTS_CU12_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  18883. CGTS_CU12_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  18884. CGTS_CU12_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  18885. CGTS_CU12_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  18886. CGTS_CU12_TD_TCP_CTRL_REG__TCP__SHIFT
  18887. CGTS_CU12_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  18888. CGTS_CU12_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  18889. CGTS_CU12_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  18890. CGTS_CU12_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  18891. CGTS_CU12_TD_TCP_CTRL_REG__TD_MASK
  18892. CGTS_CU12_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  18893. CGTS_CU12_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  18894. CGTS_CU12_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  18895. CGTS_CU12_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  18896. CGTS_CU12_TD_TCP_CTRL_REG__TD__SHIFT
  18897. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  18898. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  18899. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  18900. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  18901. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_MASK
  18902. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  18903. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  18904. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  18905. CGTS_CU13_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  18906. CGTS_CU13_LDS_SQ_CTRL_REG__LDS__SHIFT
  18907. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  18908. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  18909. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  18910. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  18911. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_MASK
  18912. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  18913. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  18914. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  18915. CGTS_CU13_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  18916. CGTS_CU13_LDS_SQ_CTRL_REG__SQ__SHIFT
  18917. CGTS_CU13_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  18918. CGTS_CU13_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  18919. CGTS_CU13_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  18920. CGTS_CU13_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  18921. CGTS_CU13_SP0_CTRL_REG__SP00_MASK
  18922. CGTS_CU13_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  18923. CGTS_CU13_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  18924. CGTS_CU13_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  18925. CGTS_CU13_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  18926. CGTS_CU13_SP0_CTRL_REG__SP00__SHIFT
  18927. CGTS_CU13_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  18928. CGTS_CU13_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  18929. CGTS_CU13_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  18930. CGTS_CU13_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  18931. CGTS_CU13_SP0_CTRL_REG__SP01_MASK
  18932. CGTS_CU13_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  18933. CGTS_CU13_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  18934. CGTS_CU13_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  18935. CGTS_CU13_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  18936. CGTS_CU13_SP0_CTRL_REG__SP01__SHIFT
  18937. CGTS_CU13_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  18938. CGTS_CU13_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  18939. CGTS_CU13_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  18940. CGTS_CU13_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  18941. CGTS_CU13_SP1_CTRL_REG__SP10_MASK
  18942. CGTS_CU13_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  18943. CGTS_CU13_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  18944. CGTS_CU13_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  18945. CGTS_CU13_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  18946. CGTS_CU13_SP1_CTRL_REG__SP10__SHIFT
  18947. CGTS_CU13_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  18948. CGTS_CU13_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  18949. CGTS_CU13_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  18950. CGTS_CU13_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  18951. CGTS_CU13_SP1_CTRL_REG__SP11_MASK
  18952. CGTS_CU13_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  18953. CGTS_CU13_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  18954. CGTS_CU13_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  18955. CGTS_CU13_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  18956. CGTS_CU13_SP1_CTRL_REG__SP11__SHIFT
  18957. CGTS_CU13_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  18958. CGTS_CU13_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  18959. CGTS_CU13_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  18960. CGTS_CU13_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  18961. CGTS_CU13_TA_CTRL_REG__TA_MASK
  18962. CGTS_CU13_TA_CTRL_REG__TA_OVERRIDE_MASK
  18963. CGTS_CU13_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  18964. CGTS_CU13_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  18965. CGTS_CU13_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  18966. CGTS_CU13_TA_CTRL_REG__TA__SHIFT
  18967. CGTS_CU13_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  18968. CGTS_CU13_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  18969. CGTS_CU13_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  18970. CGTS_CU13_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  18971. CGTS_CU13_TA_SQC_CTRL_REG__TA_MASK
  18972. CGTS_CU13_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  18973. CGTS_CU13_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  18974. CGTS_CU13_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  18975. CGTS_CU13_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  18976. CGTS_CU13_TA_SQC_CTRL_REG__TA__SHIFT
  18977. CGTS_CU13_TCPI_CTRL_REG__RESERVED_MASK
  18978. CGTS_CU13_TCPI_CTRL_REG__RESERVED__SHIFT
  18979. CGTS_CU13_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  18980. CGTS_CU13_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  18981. CGTS_CU13_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  18982. CGTS_CU13_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  18983. CGTS_CU13_TCPI_CTRL_REG__TCPI_MASK
  18984. CGTS_CU13_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  18985. CGTS_CU13_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  18986. CGTS_CU13_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  18987. CGTS_CU13_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  18988. CGTS_CU13_TCPI_CTRL_REG__TCPI__SHIFT
  18989. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  18990. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  18991. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  18992. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  18993. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_MASK
  18994. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  18995. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  18996. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  18997. CGTS_CU13_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  18998. CGTS_CU13_TD_TCP_CTRL_REG__TCPF__SHIFT
  18999. CGTS_CU13_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  19000. CGTS_CU13_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  19001. CGTS_CU13_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  19002. CGTS_CU13_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  19003. CGTS_CU13_TD_TCP_CTRL_REG__TCP_MASK
  19004. CGTS_CU13_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  19005. CGTS_CU13_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  19006. CGTS_CU13_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  19007. CGTS_CU13_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  19008. CGTS_CU13_TD_TCP_CTRL_REG__TCP__SHIFT
  19009. CGTS_CU13_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  19010. CGTS_CU13_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  19011. CGTS_CU13_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  19012. CGTS_CU13_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  19013. CGTS_CU13_TD_TCP_CTRL_REG__TD_MASK
  19014. CGTS_CU13_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  19015. CGTS_CU13_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  19016. CGTS_CU13_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  19017. CGTS_CU13_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  19018. CGTS_CU13_TD_TCP_CTRL_REG__TD__SHIFT
  19019. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  19020. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  19021. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  19022. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  19023. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_MASK
  19024. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  19025. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  19026. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  19027. CGTS_CU14_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  19028. CGTS_CU14_LDS_SQ_CTRL_REG__LDS__SHIFT
  19029. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  19030. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  19031. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  19032. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  19033. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_MASK
  19034. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  19035. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  19036. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  19037. CGTS_CU14_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  19038. CGTS_CU14_LDS_SQ_CTRL_REG__SQ__SHIFT
  19039. CGTS_CU14_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  19040. CGTS_CU14_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  19041. CGTS_CU14_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  19042. CGTS_CU14_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  19043. CGTS_CU14_SP0_CTRL_REG__SP00_MASK
  19044. CGTS_CU14_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  19045. CGTS_CU14_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  19046. CGTS_CU14_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  19047. CGTS_CU14_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  19048. CGTS_CU14_SP0_CTRL_REG__SP00__SHIFT
  19049. CGTS_CU14_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  19050. CGTS_CU14_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  19051. CGTS_CU14_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  19052. CGTS_CU14_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  19053. CGTS_CU14_SP0_CTRL_REG__SP01_MASK
  19054. CGTS_CU14_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  19055. CGTS_CU14_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  19056. CGTS_CU14_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  19057. CGTS_CU14_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  19058. CGTS_CU14_SP0_CTRL_REG__SP01__SHIFT
  19059. CGTS_CU14_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  19060. CGTS_CU14_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  19061. CGTS_CU14_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  19062. CGTS_CU14_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  19063. CGTS_CU14_SP1_CTRL_REG__SP10_MASK
  19064. CGTS_CU14_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  19065. CGTS_CU14_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  19066. CGTS_CU14_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  19067. CGTS_CU14_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  19068. CGTS_CU14_SP1_CTRL_REG__SP10__SHIFT
  19069. CGTS_CU14_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  19070. CGTS_CU14_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  19071. CGTS_CU14_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  19072. CGTS_CU14_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  19073. CGTS_CU14_SP1_CTRL_REG__SP11_MASK
  19074. CGTS_CU14_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  19075. CGTS_CU14_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  19076. CGTS_CU14_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  19077. CGTS_CU14_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  19078. CGTS_CU14_SP1_CTRL_REG__SP11__SHIFT
  19079. CGTS_CU14_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19080. CGTS_CU14_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19081. CGTS_CU14_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  19082. CGTS_CU14_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19083. CGTS_CU14_TA_CTRL_REG__TA_MASK
  19084. CGTS_CU14_TA_CTRL_REG__TA_OVERRIDE_MASK
  19085. CGTS_CU14_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  19086. CGTS_CU14_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19087. CGTS_CU14_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19088. CGTS_CU14_TA_CTRL_REG__TA__SHIFT
  19089. CGTS_CU14_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19090. CGTS_CU14_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19091. CGTS_CU14_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  19092. CGTS_CU14_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19093. CGTS_CU14_TA_SQC_CTRL_REG__TA_MASK
  19094. CGTS_CU14_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  19095. CGTS_CU14_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  19096. CGTS_CU14_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19097. CGTS_CU14_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19098. CGTS_CU14_TA_SQC_CTRL_REG__TA__SHIFT
  19099. CGTS_CU14_TCPI_CTRL_REG__RESERVED_MASK
  19100. CGTS_CU14_TCPI_CTRL_REG__RESERVED__SHIFT
  19101. CGTS_CU14_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  19102. CGTS_CU14_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  19103. CGTS_CU14_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  19104. CGTS_CU14_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  19105. CGTS_CU14_TCPI_CTRL_REG__TCPI_MASK
  19106. CGTS_CU14_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  19107. CGTS_CU14_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  19108. CGTS_CU14_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  19109. CGTS_CU14_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  19110. CGTS_CU14_TCPI_CTRL_REG__TCPI__SHIFT
  19111. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  19112. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  19113. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  19114. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  19115. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_MASK
  19116. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  19117. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  19118. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  19119. CGTS_CU14_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  19120. CGTS_CU14_TD_TCP_CTRL_REG__TCPF__SHIFT
  19121. CGTS_CU14_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  19122. CGTS_CU14_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  19123. CGTS_CU14_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  19124. CGTS_CU14_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  19125. CGTS_CU14_TD_TCP_CTRL_REG__TCP_MASK
  19126. CGTS_CU14_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  19127. CGTS_CU14_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  19128. CGTS_CU14_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  19129. CGTS_CU14_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  19130. CGTS_CU14_TD_TCP_CTRL_REG__TCP__SHIFT
  19131. CGTS_CU14_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  19132. CGTS_CU14_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  19133. CGTS_CU14_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  19134. CGTS_CU14_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  19135. CGTS_CU14_TD_TCP_CTRL_REG__TD_MASK
  19136. CGTS_CU14_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  19137. CGTS_CU14_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  19138. CGTS_CU14_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  19139. CGTS_CU14_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  19140. CGTS_CU14_TD_TCP_CTRL_REG__TD__SHIFT
  19141. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  19142. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  19143. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  19144. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  19145. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_MASK
  19146. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  19147. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  19148. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  19149. CGTS_CU15_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  19150. CGTS_CU15_LDS_SQ_CTRL_REG__LDS__SHIFT
  19151. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  19152. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  19153. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  19154. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  19155. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_MASK
  19156. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  19157. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  19158. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  19159. CGTS_CU15_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  19160. CGTS_CU15_LDS_SQ_CTRL_REG__SQ__SHIFT
  19161. CGTS_CU15_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  19162. CGTS_CU15_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  19163. CGTS_CU15_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  19164. CGTS_CU15_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  19165. CGTS_CU15_SP0_CTRL_REG__SP00_MASK
  19166. CGTS_CU15_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  19167. CGTS_CU15_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  19168. CGTS_CU15_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  19169. CGTS_CU15_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  19170. CGTS_CU15_SP0_CTRL_REG__SP00__SHIFT
  19171. CGTS_CU15_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  19172. CGTS_CU15_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  19173. CGTS_CU15_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  19174. CGTS_CU15_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  19175. CGTS_CU15_SP0_CTRL_REG__SP01_MASK
  19176. CGTS_CU15_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  19177. CGTS_CU15_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  19178. CGTS_CU15_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  19179. CGTS_CU15_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  19180. CGTS_CU15_SP0_CTRL_REG__SP01__SHIFT
  19181. CGTS_CU15_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  19182. CGTS_CU15_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  19183. CGTS_CU15_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  19184. CGTS_CU15_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  19185. CGTS_CU15_SP1_CTRL_REG__SP10_MASK
  19186. CGTS_CU15_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  19187. CGTS_CU15_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  19188. CGTS_CU15_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  19189. CGTS_CU15_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  19190. CGTS_CU15_SP1_CTRL_REG__SP10__SHIFT
  19191. CGTS_CU15_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  19192. CGTS_CU15_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  19193. CGTS_CU15_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  19194. CGTS_CU15_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  19195. CGTS_CU15_SP1_CTRL_REG__SP11_MASK
  19196. CGTS_CU15_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  19197. CGTS_CU15_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  19198. CGTS_CU15_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  19199. CGTS_CU15_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  19200. CGTS_CU15_SP1_CTRL_REG__SP11__SHIFT
  19201. CGTS_CU15_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19202. CGTS_CU15_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19203. CGTS_CU15_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  19204. CGTS_CU15_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19205. CGTS_CU15_TA_CTRL_REG__TA_MASK
  19206. CGTS_CU15_TA_CTRL_REG__TA_OVERRIDE_MASK
  19207. CGTS_CU15_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  19208. CGTS_CU15_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19209. CGTS_CU15_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19210. CGTS_CU15_TA_CTRL_REG__TA__SHIFT
  19211. CGTS_CU15_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  19212. CGTS_CU15_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  19213. CGTS_CU15_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE_MASK
  19214. CGTS_CU15_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  19215. CGTS_CU15_TA_SQC_CTRL_REG__SQC_MASK
  19216. CGTS_CU15_TA_SQC_CTRL_REG__SQC_OVERRIDE_MASK
  19217. CGTS_CU15_TA_SQC_CTRL_REG__SQC_OVERRIDE__SHIFT
  19218. CGTS_CU15_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  19219. CGTS_CU15_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  19220. CGTS_CU15_TA_SQC_CTRL_REG__SQC__SHIFT
  19221. CGTS_CU15_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19222. CGTS_CU15_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19223. CGTS_CU15_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  19224. CGTS_CU15_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19225. CGTS_CU15_TA_SQC_CTRL_REG__TA_MASK
  19226. CGTS_CU15_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  19227. CGTS_CU15_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  19228. CGTS_CU15_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19229. CGTS_CU15_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19230. CGTS_CU15_TA_SQC_CTRL_REG__TA__SHIFT
  19231. CGTS_CU15_TCPI_CTRL_REG__RESERVED_MASK
  19232. CGTS_CU15_TCPI_CTRL_REG__RESERVED__SHIFT
  19233. CGTS_CU15_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  19234. CGTS_CU15_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  19235. CGTS_CU15_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  19236. CGTS_CU15_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  19237. CGTS_CU15_TCPI_CTRL_REG__TCPI_MASK
  19238. CGTS_CU15_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  19239. CGTS_CU15_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  19240. CGTS_CU15_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  19241. CGTS_CU15_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  19242. CGTS_CU15_TCPI_CTRL_REG__TCPI__SHIFT
  19243. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  19244. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  19245. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  19246. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  19247. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_MASK
  19248. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  19249. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  19250. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  19251. CGTS_CU15_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  19252. CGTS_CU15_TD_TCP_CTRL_REG__TCPF__SHIFT
  19253. CGTS_CU15_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  19254. CGTS_CU15_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  19255. CGTS_CU15_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  19256. CGTS_CU15_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  19257. CGTS_CU15_TD_TCP_CTRL_REG__TCP_MASK
  19258. CGTS_CU15_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  19259. CGTS_CU15_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  19260. CGTS_CU15_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  19261. CGTS_CU15_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  19262. CGTS_CU15_TD_TCP_CTRL_REG__TCP__SHIFT
  19263. CGTS_CU15_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  19264. CGTS_CU15_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  19265. CGTS_CU15_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  19266. CGTS_CU15_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  19267. CGTS_CU15_TD_TCP_CTRL_REG__TD_MASK
  19268. CGTS_CU15_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  19269. CGTS_CU15_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  19270. CGTS_CU15_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  19271. CGTS_CU15_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  19272. CGTS_CU15_TD_TCP_CTRL_REG__TD__SHIFT
  19273. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  19274. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  19275. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  19276. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  19277. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_MASK
  19278. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  19279. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  19280. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  19281. CGTS_CU1_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  19282. CGTS_CU1_LDS_SQ_CTRL_REG__LDS__SHIFT
  19283. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  19284. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  19285. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  19286. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  19287. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_MASK
  19288. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  19289. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  19290. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  19291. CGTS_CU1_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  19292. CGTS_CU1_LDS_SQ_CTRL_REG__SQ__SHIFT
  19293. CGTS_CU1_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  19294. CGTS_CU1_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  19295. CGTS_CU1_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  19296. CGTS_CU1_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  19297. CGTS_CU1_SP0_CTRL_REG__SP00_MASK
  19298. CGTS_CU1_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  19299. CGTS_CU1_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  19300. CGTS_CU1_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  19301. CGTS_CU1_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  19302. CGTS_CU1_SP0_CTRL_REG__SP00__SHIFT
  19303. CGTS_CU1_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  19304. CGTS_CU1_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  19305. CGTS_CU1_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  19306. CGTS_CU1_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  19307. CGTS_CU1_SP0_CTRL_REG__SP01_MASK
  19308. CGTS_CU1_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  19309. CGTS_CU1_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  19310. CGTS_CU1_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  19311. CGTS_CU1_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  19312. CGTS_CU1_SP0_CTRL_REG__SP01__SHIFT
  19313. CGTS_CU1_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  19314. CGTS_CU1_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  19315. CGTS_CU1_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  19316. CGTS_CU1_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  19317. CGTS_CU1_SP1_CTRL_REG__SP10_MASK
  19318. CGTS_CU1_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  19319. CGTS_CU1_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  19320. CGTS_CU1_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  19321. CGTS_CU1_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  19322. CGTS_CU1_SP1_CTRL_REG__SP10__SHIFT
  19323. CGTS_CU1_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  19324. CGTS_CU1_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  19325. CGTS_CU1_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  19326. CGTS_CU1_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  19327. CGTS_CU1_SP1_CTRL_REG__SP11_MASK
  19328. CGTS_CU1_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  19329. CGTS_CU1_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  19330. CGTS_CU1_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  19331. CGTS_CU1_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  19332. CGTS_CU1_SP1_CTRL_REG__SP11__SHIFT
  19333. CGTS_CU1_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19334. CGTS_CU1_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19335. CGTS_CU1_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  19336. CGTS_CU1_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19337. CGTS_CU1_TA_CTRL_REG__TA_MASK
  19338. CGTS_CU1_TA_CTRL_REG__TA_OVERRIDE_MASK
  19339. CGTS_CU1_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  19340. CGTS_CU1_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19341. CGTS_CU1_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19342. CGTS_CU1_TA_CTRL_REG__TA__SHIFT
  19343. CGTS_CU1_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19344. CGTS_CU1_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19345. CGTS_CU1_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  19346. CGTS_CU1_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19347. CGTS_CU1_TA_SQC_CTRL_REG__TA_MASK
  19348. CGTS_CU1_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  19349. CGTS_CU1_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  19350. CGTS_CU1_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19351. CGTS_CU1_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19352. CGTS_CU1_TA_SQC_CTRL_REG__TA__SHIFT
  19353. CGTS_CU1_TCPI_CTRL_REG__RESERVED_MASK
  19354. CGTS_CU1_TCPI_CTRL_REG__RESERVED__SHIFT
  19355. CGTS_CU1_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  19356. CGTS_CU1_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  19357. CGTS_CU1_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  19358. CGTS_CU1_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  19359. CGTS_CU1_TCPI_CTRL_REG__TCPI_MASK
  19360. CGTS_CU1_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  19361. CGTS_CU1_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  19362. CGTS_CU1_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  19363. CGTS_CU1_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  19364. CGTS_CU1_TCPI_CTRL_REG__TCPI__SHIFT
  19365. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  19366. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  19367. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  19368. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  19369. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_MASK
  19370. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  19371. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  19372. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  19373. CGTS_CU1_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  19374. CGTS_CU1_TD_TCP_CTRL_REG__TCPF__SHIFT
  19375. CGTS_CU1_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  19376. CGTS_CU1_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  19377. CGTS_CU1_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  19378. CGTS_CU1_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  19379. CGTS_CU1_TD_TCP_CTRL_REG__TCP_MASK
  19380. CGTS_CU1_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  19381. CGTS_CU1_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  19382. CGTS_CU1_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  19383. CGTS_CU1_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  19384. CGTS_CU1_TD_TCP_CTRL_REG__TCP__SHIFT
  19385. CGTS_CU1_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  19386. CGTS_CU1_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  19387. CGTS_CU1_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  19388. CGTS_CU1_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  19389. CGTS_CU1_TD_TCP_CTRL_REG__TD_MASK
  19390. CGTS_CU1_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  19391. CGTS_CU1_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  19392. CGTS_CU1_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  19393. CGTS_CU1_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  19394. CGTS_CU1_TD_TCP_CTRL_REG__TD__SHIFT
  19395. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  19396. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  19397. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  19398. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  19399. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_MASK
  19400. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  19401. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  19402. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  19403. CGTS_CU2_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  19404. CGTS_CU2_LDS_SQ_CTRL_REG__LDS__SHIFT
  19405. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  19406. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  19407. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  19408. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  19409. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_MASK
  19410. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  19411. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  19412. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  19413. CGTS_CU2_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  19414. CGTS_CU2_LDS_SQ_CTRL_REG__SQ__SHIFT
  19415. CGTS_CU2_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  19416. CGTS_CU2_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  19417. CGTS_CU2_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  19418. CGTS_CU2_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  19419. CGTS_CU2_SP0_CTRL_REG__SP00_MASK
  19420. CGTS_CU2_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  19421. CGTS_CU2_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  19422. CGTS_CU2_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  19423. CGTS_CU2_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  19424. CGTS_CU2_SP0_CTRL_REG__SP00__SHIFT
  19425. CGTS_CU2_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  19426. CGTS_CU2_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  19427. CGTS_CU2_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  19428. CGTS_CU2_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  19429. CGTS_CU2_SP0_CTRL_REG__SP01_MASK
  19430. CGTS_CU2_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  19431. CGTS_CU2_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  19432. CGTS_CU2_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  19433. CGTS_CU2_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  19434. CGTS_CU2_SP0_CTRL_REG__SP01__SHIFT
  19435. CGTS_CU2_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  19436. CGTS_CU2_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  19437. CGTS_CU2_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  19438. CGTS_CU2_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  19439. CGTS_CU2_SP1_CTRL_REG__SP10_MASK
  19440. CGTS_CU2_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  19441. CGTS_CU2_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  19442. CGTS_CU2_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  19443. CGTS_CU2_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  19444. CGTS_CU2_SP1_CTRL_REG__SP10__SHIFT
  19445. CGTS_CU2_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  19446. CGTS_CU2_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  19447. CGTS_CU2_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  19448. CGTS_CU2_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  19449. CGTS_CU2_SP1_CTRL_REG__SP11_MASK
  19450. CGTS_CU2_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  19451. CGTS_CU2_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  19452. CGTS_CU2_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  19453. CGTS_CU2_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  19454. CGTS_CU2_SP1_CTRL_REG__SP11__SHIFT
  19455. CGTS_CU2_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19456. CGTS_CU2_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19457. CGTS_CU2_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  19458. CGTS_CU2_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19459. CGTS_CU2_TA_CTRL_REG__TA_MASK
  19460. CGTS_CU2_TA_CTRL_REG__TA_OVERRIDE_MASK
  19461. CGTS_CU2_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  19462. CGTS_CU2_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19463. CGTS_CU2_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19464. CGTS_CU2_TA_CTRL_REG__TA__SHIFT
  19465. CGTS_CU2_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19466. CGTS_CU2_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19467. CGTS_CU2_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  19468. CGTS_CU2_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19469. CGTS_CU2_TA_SQC_CTRL_REG__TA_MASK
  19470. CGTS_CU2_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  19471. CGTS_CU2_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  19472. CGTS_CU2_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19473. CGTS_CU2_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19474. CGTS_CU2_TA_SQC_CTRL_REG__TA__SHIFT
  19475. CGTS_CU2_TCPI_CTRL_REG__RESERVED_MASK
  19476. CGTS_CU2_TCPI_CTRL_REG__RESERVED__SHIFT
  19477. CGTS_CU2_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  19478. CGTS_CU2_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  19479. CGTS_CU2_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  19480. CGTS_CU2_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  19481. CGTS_CU2_TCPI_CTRL_REG__TCPI_MASK
  19482. CGTS_CU2_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  19483. CGTS_CU2_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  19484. CGTS_CU2_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  19485. CGTS_CU2_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  19486. CGTS_CU2_TCPI_CTRL_REG__TCPI__SHIFT
  19487. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  19488. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  19489. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  19490. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  19491. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_MASK
  19492. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  19493. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  19494. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  19495. CGTS_CU2_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  19496. CGTS_CU2_TD_TCP_CTRL_REG__TCPF__SHIFT
  19497. CGTS_CU2_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  19498. CGTS_CU2_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  19499. CGTS_CU2_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  19500. CGTS_CU2_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  19501. CGTS_CU2_TD_TCP_CTRL_REG__TCP_MASK
  19502. CGTS_CU2_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  19503. CGTS_CU2_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  19504. CGTS_CU2_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  19505. CGTS_CU2_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  19506. CGTS_CU2_TD_TCP_CTRL_REG__TCP__SHIFT
  19507. CGTS_CU2_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  19508. CGTS_CU2_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  19509. CGTS_CU2_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  19510. CGTS_CU2_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  19511. CGTS_CU2_TD_TCP_CTRL_REG__TD_MASK
  19512. CGTS_CU2_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  19513. CGTS_CU2_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  19514. CGTS_CU2_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  19515. CGTS_CU2_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  19516. CGTS_CU2_TD_TCP_CTRL_REG__TD__SHIFT
  19517. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  19518. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  19519. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  19520. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  19521. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_MASK
  19522. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  19523. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  19524. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  19525. CGTS_CU3_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  19526. CGTS_CU3_LDS_SQ_CTRL_REG__LDS__SHIFT
  19527. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  19528. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  19529. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  19530. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  19531. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_MASK
  19532. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  19533. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  19534. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  19535. CGTS_CU3_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  19536. CGTS_CU3_LDS_SQ_CTRL_REG__SQ__SHIFT
  19537. CGTS_CU3_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  19538. CGTS_CU3_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  19539. CGTS_CU3_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  19540. CGTS_CU3_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  19541. CGTS_CU3_SP0_CTRL_REG__SP00_MASK
  19542. CGTS_CU3_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  19543. CGTS_CU3_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  19544. CGTS_CU3_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  19545. CGTS_CU3_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  19546. CGTS_CU3_SP0_CTRL_REG__SP00__SHIFT
  19547. CGTS_CU3_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  19548. CGTS_CU3_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  19549. CGTS_CU3_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  19550. CGTS_CU3_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  19551. CGTS_CU3_SP0_CTRL_REG__SP01_MASK
  19552. CGTS_CU3_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  19553. CGTS_CU3_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  19554. CGTS_CU3_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  19555. CGTS_CU3_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  19556. CGTS_CU3_SP0_CTRL_REG__SP01__SHIFT
  19557. CGTS_CU3_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  19558. CGTS_CU3_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  19559. CGTS_CU3_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  19560. CGTS_CU3_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  19561. CGTS_CU3_SP1_CTRL_REG__SP10_MASK
  19562. CGTS_CU3_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  19563. CGTS_CU3_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  19564. CGTS_CU3_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  19565. CGTS_CU3_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  19566. CGTS_CU3_SP1_CTRL_REG__SP10__SHIFT
  19567. CGTS_CU3_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  19568. CGTS_CU3_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  19569. CGTS_CU3_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  19570. CGTS_CU3_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  19571. CGTS_CU3_SP1_CTRL_REG__SP11_MASK
  19572. CGTS_CU3_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  19573. CGTS_CU3_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  19574. CGTS_CU3_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  19575. CGTS_CU3_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  19576. CGTS_CU3_SP1_CTRL_REG__SP11__SHIFT
  19577. CGTS_CU3_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19578. CGTS_CU3_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19579. CGTS_CU3_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  19580. CGTS_CU3_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19581. CGTS_CU3_TA_CTRL_REG__TA_MASK
  19582. CGTS_CU3_TA_CTRL_REG__TA_OVERRIDE_MASK
  19583. CGTS_CU3_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  19584. CGTS_CU3_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19585. CGTS_CU3_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19586. CGTS_CU3_TA_CTRL_REG__TA__SHIFT
  19587. CGTS_CU3_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  19588. CGTS_CU3_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  19589. CGTS_CU3_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE_MASK
  19590. CGTS_CU3_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  19591. CGTS_CU3_TA_SQC_CTRL_REG__SQC_MASK
  19592. CGTS_CU3_TA_SQC_CTRL_REG__SQC_OVERRIDE_MASK
  19593. CGTS_CU3_TA_SQC_CTRL_REG__SQC_OVERRIDE__SHIFT
  19594. CGTS_CU3_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  19595. CGTS_CU3_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  19596. CGTS_CU3_TA_SQC_CTRL_REG__SQC__SHIFT
  19597. CGTS_CU3_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19598. CGTS_CU3_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19599. CGTS_CU3_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  19600. CGTS_CU3_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19601. CGTS_CU3_TA_SQC_CTRL_REG__TA_MASK
  19602. CGTS_CU3_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  19603. CGTS_CU3_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  19604. CGTS_CU3_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19605. CGTS_CU3_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19606. CGTS_CU3_TA_SQC_CTRL_REG__TA__SHIFT
  19607. CGTS_CU3_TCPI_CTRL_REG__RESERVED_MASK
  19608. CGTS_CU3_TCPI_CTRL_REG__RESERVED__SHIFT
  19609. CGTS_CU3_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  19610. CGTS_CU3_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  19611. CGTS_CU3_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  19612. CGTS_CU3_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  19613. CGTS_CU3_TCPI_CTRL_REG__TCPI_MASK
  19614. CGTS_CU3_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  19615. CGTS_CU3_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  19616. CGTS_CU3_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  19617. CGTS_CU3_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  19618. CGTS_CU3_TCPI_CTRL_REG__TCPI__SHIFT
  19619. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  19620. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  19621. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  19622. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  19623. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_MASK
  19624. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  19625. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  19626. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  19627. CGTS_CU3_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  19628. CGTS_CU3_TD_TCP_CTRL_REG__TCPF__SHIFT
  19629. CGTS_CU3_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  19630. CGTS_CU3_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  19631. CGTS_CU3_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  19632. CGTS_CU3_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  19633. CGTS_CU3_TD_TCP_CTRL_REG__TCP_MASK
  19634. CGTS_CU3_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  19635. CGTS_CU3_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  19636. CGTS_CU3_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  19637. CGTS_CU3_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  19638. CGTS_CU3_TD_TCP_CTRL_REG__TCP__SHIFT
  19639. CGTS_CU3_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  19640. CGTS_CU3_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  19641. CGTS_CU3_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  19642. CGTS_CU3_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  19643. CGTS_CU3_TD_TCP_CTRL_REG__TD_MASK
  19644. CGTS_CU3_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  19645. CGTS_CU3_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  19646. CGTS_CU3_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  19647. CGTS_CU3_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  19648. CGTS_CU3_TD_TCP_CTRL_REG__TD__SHIFT
  19649. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  19650. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  19651. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  19652. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  19653. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_MASK
  19654. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  19655. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  19656. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  19657. CGTS_CU4_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  19658. CGTS_CU4_LDS_SQ_CTRL_REG__LDS__SHIFT
  19659. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  19660. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  19661. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  19662. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  19663. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_MASK
  19664. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  19665. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  19666. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  19667. CGTS_CU4_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  19668. CGTS_CU4_LDS_SQ_CTRL_REG__SQ__SHIFT
  19669. CGTS_CU4_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  19670. CGTS_CU4_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  19671. CGTS_CU4_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  19672. CGTS_CU4_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  19673. CGTS_CU4_SP0_CTRL_REG__SP00_MASK
  19674. CGTS_CU4_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  19675. CGTS_CU4_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  19676. CGTS_CU4_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  19677. CGTS_CU4_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  19678. CGTS_CU4_SP0_CTRL_REG__SP00__SHIFT
  19679. CGTS_CU4_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  19680. CGTS_CU4_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  19681. CGTS_CU4_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  19682. CGTS_CU4_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  19683. CGTS_CU4_SP0_CTRL_REG__SP01_MASK
  19684. CGTS_CU4_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  19685. CGTS_CU4_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  19686. CGTS_CU4_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  19687. CGTS_CU4_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  19688. CGTS_CU4_SP0_CTRL_REG__SP01__SHIFT
  19689. CGTS_CU4_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  19690. CGTS_CU4_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  19691. CGTS_CU4_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  19692. CGTS_CU4_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  19693. CGTS_CU4_SP1_CTRL_REG__SP10_MASK
  19694. CGTS_CU4_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  19695. CGTS_CU4_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  19696. CGTS_CU4_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  19697. CGTS_CU4_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  19698. CGTS_CU4_SP1_CTRL_REG__SP10__SHIFT
  19699. CGTS_CU4_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  19700. CGTS_CU4_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  19701. CGTS_CU4_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  19702. CGTS_CU4_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  19703. CGTS_CU4_SP1_CTRL_REG__SP11_MASK
  19704. CGTS_CU4_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  19705. CGTS_CU4_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  19706. CGTS_CU4_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  19707. CGTS_CU4_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  19708. CGTS_CU4_SP1_CTRL_REG__SP11__SHIFT
  19709. CGTS_CU4_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  19710. CGTS_CU4_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  19711. CGTS_CU4_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE_MASK
  19712. CGTS_CU4_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  19713. CGTS_CU4_TA_SQC_CTRL_REG__SQC_MASK
  19714. CGTS_CU4_TA_SQC_CTRL_REG__SQC_OVERRIDE_MASK
  19715. CGTS_CU4_TA_SQC_CTRL_REG__SQC_OVERRIDE__SHIFT
  19716. CGTS_CU4_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  19717. CGTS_CU4_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  19718. CGTS_CU4_TA_SQC_CTRL_REG__SQC__SHIFT
  19719. CGTS_CU4_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19720. CGTS_CU4_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19721. CGTS_CU4_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  19722. CGTS_CU4_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19723. CGTS_CU4_TA_SQC_CTRL_REG__TA_MASK
  19724. CGTS_CU4_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  19725. CGTS_CU4_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  19726. CGTS_CU4_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19727. CGTS_CU4_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19728. CGTS_CU4_TA_SQC_CTRL_REG__TA__SHIFT
  19729. CGTS_CU4_TCPI_CTRL_REG__RESERVED_MASK
  19730. CGTS_CU4_TCPI_CTRL_REG__RESERVED__SHIFT
  19731. CGTS_CU4_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  19732. CGTS_CU4_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  19733. CGTS_CU4_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  19734. CGTS_CU4_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  19735. CGTS_CU4_TCPI_CTRL_REG__TCPI_MASK
  19736. CGTS_CU4_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  19737. CGTS_CU4_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  19738. CGTS_CU4_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  19739. CGTS_CU4_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  19740. CGTS_CU4_TCPI_CTRL_REG__TCPI__SHIFT
  19741. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  19742. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  19743. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  19744. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  19745. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_MASK
  19746. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  19747. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  19748. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  19749. CGTS_CU4_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  19750. CGTS_CU4_TD_TCP_CTRL_REG__TCPF__SHIFT
  19751. CGTS_CU4_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  19752. CGTS_CU4_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  19753. CGTS_CU4_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  19754. CGTS_CU4_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  19755. CGTS_CU4_TD_TCP_CTRL_REG__TCP_MASK
  19756. CGTS_CU4_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  19757. CGTS_CU4_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  19758. CGTS_CU4_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  19759. CGTS_CU4_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  19760. CGTS_CU4_TD_TCP_CTRL_REG__TCP__SHIFT
  19761. CGTS_CU4_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  19762. CGTS_CU4_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  19763. CGTS_CU4_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  19764. CGTS_CU4_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  19765. CGTS_CU4_TD_TCP_CTRL_REG__TD_MASK
  19766. CGTS_CU4_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  19767. CGTS_CU4_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  19768. CGTS_CU4_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  19769. CGTS_CU4_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  19770. CGTS_CU4_TD_TCP_CTRL_REG__TD__SHIFT
  19771. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  19772. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  19773. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  19774. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  19775. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_MASK
  19776. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  19777. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  19778. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  19779. CGTS_CU5_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  19780. CGTS_CU5_LDS_SQ_CTRL_REG__LDS__SHIFT
  19781. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  19782. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  19783. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  19784. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  19785. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_MASK
  19786. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  19787. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  19788. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  19789. CGTS_CU5_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  19790. CGTS_CU5_LDS_SQ_CTRL_REG__SQ__SHIFT
  19791. CGTS_CU5_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  19792. CGTS_CU5_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  19793. CGTS_CU5_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  19794. CGTS_CU5_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  19795. CGTS_CU5_SP0_CTRL_REG__SP00_MASK
  19796. CGTS_CU5_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  19797. CGTS_CU5_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  19798. CGTS_CU5_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  19799. CGTS_CU5_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  19800. CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT
  19801. CGTS_CU5_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  19802. CGTS_CU5_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  19803. CGTS_CU5_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  19804. CGTS_CU5_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  19805. CGTS_CU5_SP0_CTRL_REG__SP01_MASK
  19806. CGTS_CU5_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  19807. CGTS_CU5_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  19808. CGTS_CU5_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  19809. CGTS_CU5_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  19810. CGTS_CU5_SP0_CTRL_REG__SP01__SHIFT
  19811. CGTS_CU5_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  19812. CGTS_CU5_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  19813. CGTS_CU5_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  19814. CGTS_CU5_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  19815. CGTS_CU5_SP1_CTRL_REG__SP10_MASK
  19816. CGTS_CU5_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  19817. CGTS_CU5_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  19818. CGTS_CU5_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  19819. CGTS_CU5_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  19820. CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT
  19821. CGTS_CU5_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  19822. CGTS_CU5_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  19823. CGTS_CU5_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  19824. CGTS_CU5_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  19825. CGTS_CU5_SP1_CTRL_REG__SP11_MASK
  19826. CGTS_CU5_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  19827. CGTS_CU5_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  19828. CGTS_CU5_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  19829. CGTS_CU5_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  19830. CGTS_CU5_SP1_CTRL_REG__SP11__SHIFT
  19831. CGTS_CU5_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19832. CGTS_CU5_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19833. CGTS_CU5_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  19834. CGTS_CU5_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19835. CGTS_CU5_TA_CTRL_REG__TA_MASK
  19836. CGTS_CU5_TA_CTRL_REG__TA_OVERRIDE_MASK
  19837. CGTS_CU5_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  19838. CGTS_CU5_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19839. CGTS_CU5_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19840. CGTS_CU5_TA_CTRL_REG__TA__SHIFT
  19841. CGTS_CU5_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19842. CGTS_CU5_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19843. CGTS_CU5_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  19844. CGTS_CU5_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19845. CGTS_CU5_TA_SQC_CTRL_REG__TA_MASK
  19846. CGTS_CU5_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  19847. CGTS_CU5_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  19848. CGTS_CU5_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19849. CGTS_CU5_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19850. CGTS_CU5_TA_SQC_CTRL_REG__TA__SHIFT
  19851. CGTS_CU5_TCPI_CTRL_REG__RESERVED_MASK
  19852. CGTS_CU5_TCPI_CTRL_REG__RESERVED__SHIFT
  19853. CGTS_CU5_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  19854. CGTS_CU5_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  19855. CGTS_CU5_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  19856. CGTS_CU5_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  19857. CGTS_CU5_TCPI_CTRL_REG__TCPI_MASK
  19858. CGTS_CU5_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  19859. CGTS_CU5_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  19860. CGTS_CU5_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  19861. CGTS_CU5_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  19862. CGTS_CU5_TCPI_CTRL_REG__TCPI__SHIFT
  19863. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  19864. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  19865. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  19866. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  19867. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_MASK
  19868. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  19869. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  19870. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  19871. CGTS_CU5_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  19872. CGTS_CU5_TD_TCP_CTRL_REG__TCPF__SHIFT
  19873. CGTS_CU5_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  19874. CGTS_CU5_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  19875. CGTS_CU5_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  19876. CGTS_CU5_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  19877. CGTS_CU5_TD_TCP_CTRL_REG__TCP_MASK
  19878. CGTS_CU5_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  19879. CGTS_CU5_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  19880. CGTS_CU5_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  19881. CGTS_CU5_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  19882. CGTS_CU5_TD_TCP_CTRL_REG__TCP__SHIFT
  19883. CGTS_CU5_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  19884. CGTS_CU5_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  19885. CGTS_CU5_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  19886. CGTS_CU5_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  19887. CGTS_CU5_TD_TCP_CTRL_REG__TD_MASK
  19888. CGTS_CU5_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  19889. CGTS_CU5_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  19890. CGTS_CU5_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  19891. CGTS_CU5_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  19892. CGTS_CU5_TD_TCP_CTRL_REG__TD__SHIFT
  19893. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  19894. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  19895. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  19896. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  19897. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_MASK
  19898. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  19899. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  19900. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  19901. CGTS_CU6_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  19902. CGTS_CU6_LDS_SQ_CTRL_REG__LDS__SHIFT
  19903. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  19904. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  19905. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  19906. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  19907. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_MASK
  19908. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  19909. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  19910. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  19911. CGTS_CU6_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  19912. CGTS_CU6_LDS_SQ_CTRL_REG__SQ__SHIFT
  19913. CGTS_CU6_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  19914. CGTS_CU6_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  19915. CGTS_CU6_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  19916. CGTS_CU6_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  19917. CGTS_CU6_SP0_CTRL_REG__SP00_MASK
  19918. CGTS_CU6_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  19919. CGTS_CU6_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  19920. CGTS_CU6_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  19921. CGTS_CU6_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  19922. CGTS_CU6_SP0_CTRL_REG__SP00__SHIFT
  19923. CGTS_CU6_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  19924. CGTS_CU6_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  19925. CGTS_CU6_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  19926. CGTS_CU6_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  19927. CGTS_CU6_SP0_CTRL_REG__SP01_MASK
  19928. CGTS_CU6_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  19929. CGTS_CU6_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  19930. CGTS_CU6_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  19931. CGTS_CU6_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  19932. CGTS_CU6_SP0_CTRL_REG__SP01__SHIFT
  19933. CGTS_CU6_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  19934. CGTS_CU6_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  19935. CGTS_CU6_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  19936. CGTS_CU6_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  19937. CGTS_CU6_SP1_CTRL_REG__SP10_MASK
  19938. CGTS_CU6_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  19939. CGTS_CU6_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  19940. CGTS_CU6_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  19941. CGTS_CU6_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  19942. CGTS_CU6_SP1_CTRL_REG__SP10__SHIFT
  19943. CGTS_CU6_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  19944. CGTS_CU6_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  19945. CGTS_CU6_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  19946. CGTS_CU6_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  19947. CGTS_CU6_SP1_CTRL_REG__SP11_MASK
  19948. CGTS_CU6_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  19949. CGTS_CU6_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  19950. CGTS_CU6_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  19951. CGTS_CU6_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  19952. CGTS_CU6_SP1_CTRL_REG__SP11__SHIFT
  19953. CGTS_CU6_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19954. CGTS_CU6_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19955. CGTS_CU6_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  19956. CGTS_CU6_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19957. CGTS_CU6_TA_CTRL_REG__TA_MASK
  19958. CGTS_CU6_TA_CTRL_REG__TA_OVERRIDE_MASK
  19959. CGTS_CU6_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  19960. CGTS_CU6_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19961. CGTS_CU6_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19962. CGTS_CU6_TA_CTRL_REG__TA__SHIFT
  19963. CGTS_CU6_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  19964. CGTS_CU6_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  19965. CGTS_CU6_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE_MASK
  19966. CGTS_CU6_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  19967. CGTS_CU6_TA_SQC_CTRL_REG__SQC_MASK
  19968. CGTS_CU6_TA_SQC_CTRL_REG__SQC_OVERRIDE_MASK
  19969. CGTS_CU6_TA_SQC_CTRL_REG__SQC_OVERRIDE__SHIFT
  19970. CGTS_CU6_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  19971. CGTS_CU6_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  19972. CGTS_CU6_TA_SQC_CTRL_REG__SQC__SHIFT
  19973. CGTS_CU6_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  19974. CGTS_CU6_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  19975. CGTS_CU6_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  19976. CGTS_CU6_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  19977. CGTS_CU6_TA_SQC_CTRL_REG__TA_MASK
  19978. CGTS_CU6_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  19979. CGTS_CU6_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  19980. CGTS_CU6_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  19981. CGTS_CU6_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  19982. CGTS_CU6_TA_SQC_CTRL_REG__TA__SHIFT
  19983. CGTS_CU6_TCPI_CTRL_REG__RESERVED_MASK
  19984. CGTS_CU6_TCPI_CTRL_REG__RESERVED__SHIFT
  19985. CGTS_CU6_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  19986. CGTS_CU6_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  19987. CGTS_CU6_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  19988. CGTS_CU6_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  19989. CGTS_CU6_TCPI_CTRL_REG__TCPI_MASK
  19990. CGTS_CU6_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  19991. CGTS_CU6_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  19992. CGTS_CU6_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  19993. CGTS_CU6_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  19994. CGTS_CU6_TCPI_CTRL_REG__TCPI__SHIFT
  19995. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  19996. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  19997. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  19998. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  19999. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_MASK
  20000. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20001. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20002. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20003. CGTS_CU6_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20004. CGTS_CU6_TD_TCP_CTRL_REG__TCPF__SHIFT
  20005. CGTS_CU6_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  20006. CGTS_CU6_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  20007. CGTS_CU6_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  20008. CGTS_CU6_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  20009. CGTS_CU6_TD_TCP_CTRL_REG__TCP_MASK
  20010. CGTS_CU6_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  20011. CGTS_CU6_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  20012. CGTS_CU6_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  20013. CGTS_CU6_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  20014. CGTS_CU6_TD_TCP_CTRL_REG__TCP__SHIFT
  20015. CGTS_CU6_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20016. CGTS_CU6_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20017. CGTS_CU6_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  20018. CGTS_CU6_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20019. CGTS_CU6_TD_TCP_CTRL_REG__TD_MASK
  20020. CGTS_CU6_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  20021. CGTS_CU6_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  20022. CGTS_CU6_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20023. CGTS_CU6_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20024. CGTS_CU6_TD_TCP_CTRL_REG__TD__SHIFT
  20025. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  20026. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  20027. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  20028. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  20029. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_MASK
  20030. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  20031. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  20032. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  20033. CGTS_CU7_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  20034. CGTS_CU7_LDS_SQ_CTRL_REG__LDS__SHIFT
  20035. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  20036. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  20037. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  20038. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  20039. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_MASK
  20040. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  20041. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  20042. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  20043. CGTS_CU7_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  20044. CGTS_CU7_LDS_SQ_CTRL_REG__SQ__SHIFT
  20045. CGTS_CU7_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  20046. CGTS_CU7_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  20047. CGTS_CU7_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  20048. CGTS_CU7_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  20049. CGTS_CU7_SP0_CTRL_REG__SP00_MASK
  20050. CGTS_CU7_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  20051. CGTS_CU7_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  20052. CGTS_CU7_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  20053. CGTS_CU7_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  20054. CGTS_CU7_SP0_CTRL_REG__SP00__SHIFT
  20055. CGTS_CU7_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  20056. CGTS_CU7_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  20057. CGTS_CU7_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  20058. CGTS_CU7_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  20059. CGTS_CU7_SP0_CTRL_REG__SP01_MASK
  20060. CGTS_CU7_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  20061. CGTS_CU7_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  20062. CGTS_CU7_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  20063. CGTS_CU7_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  20064. CGTS_CU7_SP0_CTRL_REG__SP01__SHIFT
  20065. CGTS_CU7_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  20066. CGTS_CU7_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  20067. CGTS_CU7_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  20068. CGTS_CU7_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  20069. CGTS_CU7_SP1_CTRL_REG__SP10_MASK
  20070. CGTS_CU7_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  20071. CGTS_CU7_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  20072. CGTS_CU7_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  20073. CGTS_CU7_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  20074. CGTS_CU7_SP1_CTRL_REG__SP10__SHIFT
  20075. CGTS_CU7_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  20076. CGTS_CU7_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  20077. CGTS_CU7_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  20078. CGTS_CU7_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  20079. CGTS_CU7_SP1_CTRL_REG__SP11_MASK
  20080. CGTS_CU7_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  20081. CGTS_CU7_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  20082. CGTS_CU7_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  20083. CGTS_CU7_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  20084. CGTS_CU7_SP1_CTRL_REG__SP11__SHIFT
  20085. CGTS_CU7_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20086. CGTS_CU7_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20087. CGTS_CU7_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  20088. CGTS_CU7_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20089. CGTS_CU7_TA_CTRL_REG__TA_MASK
  20090. CGTS_CU7_TA_CTRL_REG__TA_OVERRIDE_MASK
  20091. CGTS_CU7_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  20092. CGTS_CU7_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20093. CGTS_CU7_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20094. CGTS_CU7_TA_CTRL_REG__TA__SHIFT
  20095. CGTS_CU7_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20096. CGTS_CU7_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20097. CGTS_CU7_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  20098. CGTS_CU7_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20099. CGTS_CU7_TA_SQC_CTRL_REG__TA_MASK
  20100. CGTS_CU7_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  20101. CGTS_CU7_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  20102. CGTS_CU7_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20103. CGTS_CU7_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20104. CGTS_CU7_TA_SQC_CTRL_REG__TA__SHIFT
  20105. CGTS_CU7_TCPI_CTRL_REG__RESERVED_MASK
  20106. CGTS_CU7_TCPI_CTRL_REG__RESERVED__SHIFT
  20107. CGTS_CU7_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20108. CGTS_CU7_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20109. CGTS_CU7_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20110. CGTS_CU7_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20111. CGTS_CU7_TCPI_CTRL_REG__TCPI_MASK
  20112. CGTS_CU7_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  20113. CGTS_CU7_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  20114. CGTS_CU7_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  20115. CGTS_CU7_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  20116. CGTS_CU7_TCPI_CTRL_REG__TCPI__SHIFT
  20117. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20118. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20119. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20120. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20121. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_MASK
  20122. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20123. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20124. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20125. CGTS_CU7_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20126. CGTS_CU7_TD_TCP_CTRL_REG__TCPF__SHIFT
  20127. CGTS_CU7_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  20128. CGTS_CU7_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  20129. CGTS_CU7_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  20130. CGTS_CU7_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  20131. CGTS_CU7_TD_TCP_CTRL_REG__TCP_MASK
  20132. CGTS_CU7_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  20133. CGTS_CU7_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  20134. CGTS_CU7_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  20135. CGTS_CU7_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  20136. CGTS_CU7_TD_TCP_CTRL_REG__TCP__SHIFT
  20137. CGTS_CU7_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20138. CGTS_CU7_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20139. CGTS_CU7_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  20140. CGTS_CU7_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20141. CGTS_CU7_TD_TCP_CTRL_REG__TD_MASK
  20142. CGTS_CU7_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  20143. CGTS_CU7_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  20144. CGTS_CU7_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20145. CGTS_CU7_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20146. CGTS_CU7_TD_TCP_CTRL_REG__TD__SHIFT
  20147. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  20148. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  20149. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  20150. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  20151. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_MASK
  20152. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  20153. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  20154. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  20155. CGTS_CU8_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  20156. CGTS_CU8_LDS_SQ_CTRL_REG__LDS__SHIFT
  20157. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  20158. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  20159. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  20160. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  20161. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_MASK
  20162. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  20163. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  20164. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  20165. CGTS_CU8_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  20166. CGTS_CU8_LDS_SQ_CTRL_REG__SQ__SHIFT
  20167. CGTS_CU8_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  20168. CGTS_CU8_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  20169. CGTS_CU8_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  20170. CGTS_CU8_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  20171. CGTS_CU8_SP0_CTRL_REG__SP00_MASK
  20172. CGTS_CU8_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  20173. CGTS_CU8_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  20174. CGTS_CU8_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  20175. CGTS_CU8_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  20176. CGTS_CU8_SP0_CTRL_REG__SP00__SHIFT
  20177. CGTS_CU8_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  20178. CGTS_CU8_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  20179. CGTS_CU8_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  20180. CGTS_CU8_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  20181. CGTS_CU8_SP0_CTRL_REG__SP01_MASK
  20182. CGTS_CU8_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  20183. CGTS_CU8_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  20184. CGTS_CU8_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  20185. CGTS_CU8_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  20186. CGTS_CU8_SP0_CTRL_REG__SP01__SHIFT
  20187. CGTS_CU8_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  20188. CGTS_CU8_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  20189. CGTS_CU8_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  20190. CGTS_CU8_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  20191. CGTS_CU8_SP1_CTRL_REG__SP10_MASK
  20192. CGTS_CU8_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  20193. CGTS_CU8_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  20194. CGTS_CU8_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  20195. CGTS_CU8_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  20196. CGTS_CU8_SP1_CTRL_REG__SP10__SHIFT
  20197. CGTS_CU8_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  20198. CGTS_CU8_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  20199. CGTS_CU8_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  20200. CGTS_CU8_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  20201. CGTS_CU8_SP1_CTRL_REG__SP11_MASK
  20202. CGTS_CU8_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  20203. CGTS_CU8_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  20204. CGTS_CU8_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  20205. CGTS_CU8_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  20206. CGTS_CU8_SP1_CTRL_REG__SP11__SHIFT
  20207. CGTS_CU8_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  20208. CGTS_CU8_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  20209. CGTS_CU8_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE_MASK
  20210. CGTS_CU8_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  20211. CGTS_CU8_TA_SQC_CTRL_REG__SQC_MASK
  20212. CGTS_CU8_TA_SQC_CTRL_REG__SQC_OVERRIDE_MASK
  20213. CGTS_CU8_TA_SQC_CTRL_REG__SQC_OVERRIDE__SHIFT
  20214. CGTS_CU8_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  20215. CGTS_CU8_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  20216. CGTS_CU8_TA_SQC_CTRL_REG__SQC__SHIFT
  20217. CGTS_CU8_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20218. CGTS_CU8_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20219. CGTS_CU8_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  20220. CGTS_CU8_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20221. CGTS_CU8_TA_SQC_CTRL_REG__TA_MASK
  20222. CGTS_CU8_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  20223. CGTS_CU8_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  20224. CGTS_CU8_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20225. CGTS_CU8_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20226. CGTS_CU8_TA_SQC_CTRL_REG__TA__SHIFT
  20227. CGTS_CU8_TCPI_CTRL_REG__RESERVED_MASK
  20228. CGTS_CU8_TCPI_CTRL_REG__RESERVED__SHIFT
  20229. CGTS_CU8_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20230. CGTS_CU8_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20231. CGTS_CU8_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20232. CGTS_CU8_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20233. CGTS_CU8_TCPI_CTRL_REG__TCPI_MASK
  20234. CGTS_CU8_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  20235. CGTS_CU8_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  20236. CGTS_CU8_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  20237. CGTS_CU8_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  20238. CGTS_CU8_TCPI_CTRL_REG__TCPI__SHIFT
  20239. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20240. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20241. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20242. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20243. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_MASK
  20244. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20245. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20246. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20247. CGTS_CU8_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20248. CGTS_CU8_TD_TCP_CTRL_REG__TCPF__SHIFT
  20249. CGTS_CU8_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  20250. CGTS_CU8_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  20251. CGTS_CU8_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  20252. CGTS_CU8_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  20253. CGTS_CU8_TD_TCP_CTRL_REG__TCP_MASK
  20254. CGTS_CU8_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  20255. CGTS_CU8_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  20256. CGTS_CU8_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  20257. CGTS_CU8_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  20258. CGTS_CU8_TD_TCP_CTRL_REG__TCP__SHIFT
  20259. CGTS_CU8_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20260. CGTS_CU8_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20261. CGTS_CU8_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  20262. CGTS_CU8_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20263. CGTS_CU8_TD_TCP_CTRL_REG__TD_MASK
  20264. CGTS_CU8_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  20265. CGTS_CU8_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  20266. CGTS_CU8_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20267. CGTS_CU8_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20268. CGTS_CU8_TD_TCP_CTRL_REG__TD__SHIFT
  20269. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  20270. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  20271. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE_MASK
  20272. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  20273. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_MASK
  20274. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_OVERRIDE_MASK
  20275. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_OVERRIDE__SHIFT
  20276. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  20277. CGTS_CU9_LDS_SQ_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  20278. CGTS_CU9_LDS_SQ_CTRL_REG__LDS__SHIFT
  20279. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE_MASK
  20280. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_BUSY_OVERRIDE__SHIFT
  20281. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE_MASK
  20282. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_LS_OVERRIDE__SHIFT
  20283. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_MASK
  20284. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_OVERRIDE_MASK
  20285. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_OVERRIDE__SHIFT
  20286. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE_MASK
  20287. CGTS_CU9_LDS_SQ_CTRL_REG__SQ_SIMDBUSY_OVERRIDE__SHIFT
  20288. CGTS_CU9_LDS_SQ_CTRL_REG__SQ__SHIFT
  20289. CGTS_CU9_SP0_CTRL_REG__SP00_BUSY_OVERRIDE_MASK
  20290. CGTS_CU9_SP0_CTRL_REG__SP00_BUSY_OVERRIDE__SHIFT
  20291. CGTS_CU9_SP0_CTRL_REG__SP00_LS_OVERRIDE_MASK
  20292. CGTS_CU9_SP0_CTRL_REG__SP00_LS_OVERRIDE__SHIFT
  20293. CGTS_CU9_SP0_CTRL_REG__SP00_MASK
  20294. CGTS_CU9_SP0_CTRL_REG__SP00_OVERRIDE_MASK
  20295. CGTS_CU9_SP0_CTRL_REG__SP00_OVERRIDE__SHIFT
  20296. CGTS_CU9_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE_MASK
  20297. CGTS_CU9_SP0_CTRL_REG__SP00_SIMDBUSY_OVERRIDE__SHIFT
  20298. CGTS_CU9_SP0_CTRL_REG__SP00__SHIFT
  20299. CGTS_CU9_SP0_CTRL_REG__SP01_BUSY_OVERRIDE_MASK
  20300. CGTS_CU9_SP0_CTRL_REG__SP01_BUSY_OVERRIDE__SHIFT
  20301. CGTS_CU9_SP0_CTRL_REG__SP01_LS_OVERRIDE_MASK
  20302. CGTS_CU9_SP0_CTRL_REG__SP01_LS_OVERRIDE__SHIFT
  20303. CGTS_CU9_SP0_CTRL_REG__SP01_MASK
  20304. CGTS_CU9_SP0_CTRL_REG__SP01_OVERRIDE_MASK
  20305. CGTS_CU9_SP0_CTRL_REG__SP01_OVERRIDE__SHIFT
  20306. CGTS_CU9_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE_MASK
  20307. CGTS_CU9_SP0_CTRL_REG__SP01_SIMDBUSY_OVERRIDE__SHIFT
  20308. CGTS_CU9_SP0_CTRL_REG__SP01__SHIFT
  20309. CGTS_CU9_SP1_CTRL_REG__SP10_BUSY_OVERRIDE_MASK
  20310. CGTS_CU9_SP1_CTRL_REG__SP10_BUSY_OVERRIDE__SHIFT
  20311. CGTS_CU9_SP1_CTRL_REG__SP10_LS_OVERRIDE_MASK
  20312. CGTS_CU9_SP1_CTRL_REG__SP10_LS_OVERRIDE__SHIFT
  20313. CGTS_CU9_SP1_CTRL_REG__SP10_MASK
  20314. CGTS_CU9_SP1_CTRL_REG__SP10_OVERRIDE_MASK
  20315. CGTS_CU9_SP1_CTRL_REG__SP10_OVERRIDE__SHIFT
  20316. CGTS_CU9_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE_MASK
  20317. CGTS_CU9_SP1_CTRL_REG__SP10_SIMDBUSY_OVERRIDE__SHIFT
  20318. CGTS_CU9_SP1_CTRL_REG__SP10__SHIFT
  20319. CGTS_CU9_SP1_CTRL_REG__SP11_BUSY_OVERRIDE_MASK
  20320. CGTS_CU9_SP1_CTRL_REG__SP11_BUSY_OVERRIDE__SHIFT
  20321. CGTS_CU9_SP1_CTRL_REG__SP11_LS_OVERRIDE_MASK
  20322. CGTS_CU9_SP1_CTRL_REG__SP11_LS_OVERRIDE__SHIFT
  20323. CGTS_CU9_SP1_CTRL_REG__SP11_MASK
  20324. CGTS_CU9_SP1_CTRL_REG__SP11_OVERRIDE_MASK
  20325. CGTS_CU9_SP1_CTRL_REG__SP11_OVERRIDE__SHIFT
  20326. CGTS_CU9_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE_MASK
  20327. CGTS_CU9_SP1_CTRL_REG__SP11_SIMDBUSY_OVERRIDE__SHIFT
  20328. CGTS_CU9_SP1_CTRL_REG__SP11__SHIFT
  20329. CGTS_CU9_TA_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20330. CGTS_CU9_TA_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20331. CGTS_CU9_TA_CTRL_REG__TA_LS_OVERRIDE_MASK
  20332. CGTS_CU9_TA_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20333. CGTS_CU9_TA_CTRL_REG__TA_MASK
  20334. CGTS_CU9_TA_CTRL_REG__TA_OVERRIDE_MASK
  20335. CGTS_CU9_TA_CTRL_REG__TA_OVERRIDE__SHIFT
  20336. CGTS_CU9_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20337. CGTS_CU9_TA_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20338. CGTS_CU9_TA_CTRL_REG__TA__SHIFT
  20339. CGTS_CU9_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  20340. CGTS_CU9_TA_SQC_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  20341. CGTS_CU9_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE_MASK
  20342. CGTS_CU9_TA_SQC_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  20343. CGTS_CU9_TA_SQC_CTRL_REG__SQC_MASK
  20344. CGTS_CU9_TA_SQC_CTRL_REG__SQC_OVERRIDE_MASK
  20345. CGTS_CU9_TA_SQC_CTRL_REG__SQC_OVERRIDE__SHIFT
  20346. CGTS_CU9_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  20347. CGTS_CU9_TA_SQC_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  20348. CGTS_CU9_TA_SQC_CTRL_REG__SQC__SHIFT
  20349. CGTS_CU9_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20350. CGTS_CU9_TA_SQC_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20351. CGTS_CU9_TA_SQC_CTRL_REG__TA_LS_OVERRIDE_MASK
  20352. CGTS_CU9_TA_SQC_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20353. CGTS_CU9_TA_SQC_CTRL_REG__TA_MASK
  20354. CGTS_CU9_TA_SQC_CTRL_REG__TA_OVERRIDE_MASK
  20355. CGTS_CU9_TA_SQC_CTRL_REG__TA_OVERRIDE__SHIFT
  20356. CGTS_CU9_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20357. CGTS_CU9_TA_SQC_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20358. CGTS_CU9_TA_SQC_CTRL_REG__TA__SHIFT
  20359. CGTS_CU9_TCPI_CTRL_REG__RESERVED_MASK
  20360. CGTS_CU9_TCPI_CTRL_REG__RESERVED__SHIFT
  20361. CGTS_CU9_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20362. CGTS_CU9_TCPI_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20363. CGTS_CU9_TCPI_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20364. CGTS_CU9_TCPI_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20365. CGTS_CU9_TCPI_CTRL_REG__TCPI_MASK
  20366. CGTS_CU9_TCPI_CTRL_REG__TCPI_OVERRIDE_MASK
  20367. CGTS_CU9_TCPI_CTRL_REG__TCPI_OVERRIDE__SHIFT
  20368. CGTS_CU9_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  20369. CGTS_CU9_TCPI_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  20370. CGTS_CU9_TCPI_CTRL_REG__TCPI__SHIFT
  20371. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20372. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20373. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20374. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20375. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_MASK
  20376. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20377. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20378. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20379. CGTS_CU9_TD_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20380. CGTS_CU9_TD_TCP_CTRL_REG__TCPF__SHIFT
  20381. CGTS_CU9_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE_MASK
  20382. CGTS_CU9_TD_TCP_CTRL_REG__TCP_BUSY_OVERRIDE__SHIFT
  20383. CGTS_CU9_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE_MASK
  20384. CGTS_CU9_TD_TCP_CTRL_REG__TCP_LS_OVERRIDE__SHIFT
  20385. CGTS_CU9_TD_TCP_CTRL_REG__TCP_MASK
  20386. CGTS_CU9_TD_TCP_CTRL_REG__TCP_OVERRIDE_MASK
  20387. CGTS_CU9_TD_TCP_CTRL_REG__TCP_OVERRIDE__SHIFT
  20388. CGTS_CU9_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE_MASK
  20389. CGTS_CU9_TD_TCP_CTRL_REG__TCP_SIMDBUSY_OVERRIDE__SHIFT
  20390. CGTS_CU9_TD_TCP_CTRL_REG__TCP__SHIFT
  20391. CGTS_CU9_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20392. CGTS_CU9_TD_TCP_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20393. CGTS_CU9_TD_TCP_CTRL_REG__TD_LS_OVERRIDE_MASK
  20394. CGTS_CU9_TD_TCP_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20395. CGTS_CU9_TD_TCP_CTRL_REG__TD_MASK
  20396. CGTS_CU9_TD_TCP_CTRL_REG__TD_OVERRIDE_MASK
  20397. CGTS_CU9_TD_TCP_CTRL_REG__TD_OVERRIDE__SHIFT
  20398. CGTS_CU9_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20399. CGTS_CU9_TD_TCP_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20400. CGTS_CU9_TD_TCP_CTRL_REG__TD__SHIFT
  20401. CGTS_LS_OVERRIDE
  20402. CGTS_OVERRIDE
  20403. CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK
  20404. CGTS_RD_CTRL_REG__REG_MUX_SEL__SHIFT
  20405. CGTS_RD_CTRL_REG__ROW_MUX_SEL_MASK
  20406. CGTS_RD_CTRL_REG__ROW_MUX_SEL__SHIFT
  20407. CGTS_RD_REG__READ_DATA_MASK
  20408. CGTS_RD_REG__READ_DATA__SHIFT
  20409. CGTS_SA0_QUAD0_CLK_MONITOR_DELAY_REG__OFF_MONITOR_DELAY_MASK
  20410. CGTS_SA0_QUAD0_CLK_MONITOR_DELAY_REG__OFF_MONITOR_DELAY__SHIFT
  20411. CGTS_SA0_QUAD0_CLK_MONITOR_DELAY_REG__ON_MONITOR_DELAY_MASK
  20412. CGTS_SA0_QUAD0_CLK_MONITOR_DELAY_REG__ON_MONITOR_DELAY__SHIFT
  20413. CGTS_SA0_QUAD0_SM_CTRL_REG__BASE_MODE_MASK
  20414. CGTS_SA0_QUAD0_SM_CTRL_REG__BASE_MODE__SHIFT
  20415. CGTS_SA0_QUAD0_SM_CTRL_REG__CGTS_CLKEN_DELAY_MASK
  20416. CGTS_SA0_QUAD0_SM_CTRL_REG__CGTS_CLKEN_DELAY__SHIFT
  20417. CGTS_SA0_QUAD0_SM_CTRL_REG__CGTS_CLKEN_MODE_MASK
  20418. CGTS_SA0_QUAD0_SM_CTRL_REG__CGTS_CLKEN_MODE__SHIFT
  20419. CGTS_SA0_QUAD0_SM_CTRL_REG__CGTS_MGCG_EN_MASK
  20420. CGTS_SA0_QUAD0_SM_CTRL_REG__CGTS_MGCG_EN__SHIFT
  20421. CGTS_SA0_QUAD0_SM_CTRL_REG__CGTS_SW_CLKEN_MASK
  20422. CGTS_SA0_QUAD0_SM_CTRL_REG__CGTS_SW_CLKEN__SHIFT
  20423. CGTS_SA0_QUAD0_SM_CTRL_REG__LS_OVERRIDE_MASK
  20424. CGTS_SA0_QUAD0_SM_CTRL_REG__LS_OVERRIDE__SHIFT
  20425. CGTS_SA0_QUAD0_SM_CTRL_REG__MASK_OVERRIDE_MASK
  20426. CGTS_SA0_QUAD0_SM_CTRL_REG__MASK_OVERRIDE__SHIFT
  20427. CGTS_SA0_QUAD0_SM_CTRL_REG__OFF_SEQ_DELAY_MASK
  20428. CGTS_SA0_QUAD0_SM_CTRL_REG__OFF_SEQ_DELAY__SHIFT
  20429. CGTS_SA0_QUAD0_SM_CTRL_REG__ON_SEQ_DELAY_MASK
  20430. CGTS_SA0_QUAD0_SM_CTRL_REG__ON_SEQ_DELAY__SHIFT
  20431. CGTS_SA0_QUAD0_SM_CTRL_REG__OVERRIDE_MASK
  20432. CGTS_SA0_QUAD0_SM_CTRL_REG__OVERRIDE__SHIFT
  20433. CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE_ENABLE_MASK
  20434. CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE_ENABLE__SHIFT
  20435. CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE_MASK
  20436. CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE__SHIFT
  20437. CGTS_SA0_QUAD1_CLK_MONITOR_DELAY_REG__OFF_MONITOR_DELAY_MASK
  20438. CGTS_SA0_QUAD1_CLK_MONITOR_DELAY_REG__OFF_MONITOR_DELAY__SHIFT
  20439. CGTS_SA0_QUAD1_CLK_MONITOR_DELAY_REG__ON_MONITOR_DELAY_MASK
  20440. CGTS_SA0_QUAD1_CLK_MONITOR_DELAY_REG__ON_MONITOR_DELAY__SHIFT
  20441. CGTS_SA0_QUAD1_SM_CTRL_REG__BASE_MODE_MASK
  20442. CGTS_SA0_QUAD1_SM_CTRL_REG__BASE_MODE__SHIFT
  20443. CGTS_SA0_QUAD1_SM_CTRL_REG__CGTS_CLKEN_DELAY_MASK
  20444. CGTS_SA0_QUAD1_SM_CTRL_REG__CGTS_CLKEN_DELAY__SHIFT
  20445. CGTS_SA0_QUAD1_SM_CTRL_REG__CGTS_CLKEN_MODE_MASK
  20446. CGTS_SA0_QUAD1_SM_CTRL_REG__CGTS_CLKEN_MODE__SHIFT
  20447. CGTS_SA0_QUAD1_SM_CTRL_REG__CGTS_MGCG_EN_MASK
  20448. CGTS_SA0_QUAD1_SM_CTRL_REG__CGTS_MGCG_EN__SHIFT
  20449. CGTS_SA0_QUAD1_SM_CTRL_REG__CGTS_SW_CLKEN_MASK
  20450. CGTS_SA0_QUAD1_SM_CTRL_REG__CGTS_SW_CLKEN__SHIFT
  20451. CGTS_SA0_QUAD1_SM_CTRL_REG__LS_OVERRIDE_MASK
  20452. CGTS_SA0_QUAD1_SM_CTRL_REG__LS_OVERRIDE__SHIFT
  20453. CGTS_SA0_QUAD1_SM_CTRL_REG__MASK_OVERRIDE_MASK
  20454. CGTS_SA0_QUAD1_SM_CTRL_REG__MASK_OVERRIDE__SHIFT
  20455. CGTS_SA0_QUAD1_SM_CTRL_REG__OFF_SEQ_DELAY_MASK
  20456. CGTS_SA0_QUAD1_SM_CTRL_REG__OFF_SEQ_DELAY__SHIFT
  20457. CGTS_SA0_QUAD1_SM_CTRL_REG__ON_SEQ_DELAY_MASK
  20458. CGTS_SA0_QUAD1_SM_CTRL_REG__ON_SEQ_DELAY__SHIFT
  20459. CGTS_SA0_QUAD1_SM_CTRL_REG__OVERRIDE_MASK
  20460. CGTS_SA0_QUAD1_SM_CTRL_REG__OVERRIDE__SHIFT
  20461. CGTS_SA0_QUAD1_SM_CTRL_REG__SM_MODE_ENABLE_MASK
  20462. CGTS_SA0_QUAD1_SM_CTRL_REG__SM_MODE_ENABLE__SHIFT
  20463. CGTS_SA0_QUAD1_SM_CTRL_REG__SM_MODE_MASK
  20464. CGTS_SA0_QUAD1_SM_CTRL_REG__SM_MODE__SHIFT
  20465. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  20466. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  20467. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  20468. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  20469. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  20470. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  20471. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  20472. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  20473. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  20474. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  20475. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  20476. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  20477. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  20478. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  20479. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_MASK
  20480. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  20481. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  20482. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  20483. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  20484. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  20485. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  20486. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  20487. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  20488. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  20489. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_MASK
  20490. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  20491. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  20492. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  20493. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  20494. CGTS_SA0_WGP00_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  20495. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  20496. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  20497. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  20498. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  20499. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_MASK
  20500. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  20501. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  20502. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  20503. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  20504. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  20505. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  20506. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  20507. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  20508. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  20509. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  20510. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  20511. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  20512. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  20513. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  20514. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  20515. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  20516. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  20517. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  20518. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  20519. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_MASK
  20520. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  20521. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  20522. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  20523. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  20524. CGTS_SA0_WGP00_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  20525. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20526. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20527. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  20528. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20529. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_MASK
  20530. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  20531. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  20532. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20533. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20534. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TA__SHIFT
  20535. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20536. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20537. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  20538. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20539. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_MASK
  20540. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  20541. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  20542. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20543. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20544. CGTS_SA0_WGP00_CU0_TATD_CTRL_REG__TD__SHIFT
  20545. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20546. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20547. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20548. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20549. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_MASK
  20550. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20551. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20552. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20553. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20554. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPF__SHIFT
  20555. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20556. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20557. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20558. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20559. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_MASK
  20560. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  20561. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  20562. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  20563. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  20564. CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI__SHIFT
  20565. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  20566. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  20567. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  20568. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  20569. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  20570. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  20571. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  20572. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  20573. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  20574. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  20575. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  20576. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  20577. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  20578. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  20579. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_MASK
  20580. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  20581. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  20582. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  20583. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  20584. CGTS_SA0_WGP00_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  20585. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  20586. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  20587. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  20588. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  20589. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  20590. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  20591. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  20592. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  20593. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  20594. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  20595. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  20596. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  20597. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  20598. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  20599. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_MASK
  20600. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  20601. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  20602. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  20603. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  20604. CGTS_SA0_WGP00_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  20605. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20606. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20607. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  20608. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20609. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_MASK
  20610. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  20611. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  20612. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20613. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20614. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TA__SHIFT
  20615. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20616. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20617. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  20618. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20619. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_MASK
  20620. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  20621. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  20622. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20623. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20624. CGTS_SA0_WGP00_CU1_TATD_CTRL_REG__TD__SHIFT
  20625. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20626. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20627. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20628. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20629. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_MASK
  20630. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20631. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20632. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20633. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20634. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPF__SHIFT
  20635. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20636. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20637. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20638. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20639. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_MASK
  20640. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  20641. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  20642. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  20643. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  20644. CGTS_SA0_WGP00_CU1_TCP_CTRL_REG__TCPI__SHIFT
  20645. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  20646. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  20647. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  20648. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  20649. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  20650. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  20651. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  20652. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  20653. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  20654. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  20655. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  20656. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  20657. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  20658. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  20659. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_MASK
  20660. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  20661. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  20662. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  20663. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  20664. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  20665. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  20666. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  20667. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  20668. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  20669. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_MASK
  20670. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  20671. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  20672. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  20673. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  20674. CGTS_SA0_WGP01_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  20675. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  20676. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  20677. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  20678. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  20679. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_MASK
  20680. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  20681. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  20682. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  20683. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  20684. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  20685. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  20686. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  20687. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  20688. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  20689. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  20690. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  20691. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  20692. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  20693. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  20694. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  20695. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  20696. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  20697. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  20698. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  20699. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_MASK
  20700. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  20701. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  20702. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  20703. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  20704. CGTS_SA0_WGP01_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  20705. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20706. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20707. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  20708. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20709. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_MASK
  20710. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  20711. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  20712. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20713. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20714. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TA__SHIFT
  20715. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20716. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20717. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  20718. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20719. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_MASK
  20720. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  20721. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  20722. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20723. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20724. CGTS_SA0_WGP01_CU0_TATD_CTRL_REG__TD__SHIFT
  20725. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20726. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20727. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20728. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20729. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_MASK
  20730. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20731. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20732. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20733. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20734. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPF__SHIFT
  20735. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20736. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20737. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20738. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20739. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_MASK
  20740. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  20741. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  20742. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  20743. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  20744. CGTS_SA0_WGP01_CU0_TCP_CTRL_REG__TCPI__SHIFT
  20745. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  20746. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  20747. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  20748. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  20749. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  20750. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  20751. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  20752. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  20753. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  20754. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  20755. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  20756. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  20757. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  20758. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  20759. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_MASK
  20760. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  20761. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  20762. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  20763. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  20764. CGTS_SA0_WGP01_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  20765. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  20766. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  20767. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  20768. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  20769. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  20770. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  20771. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  20772. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  20773. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  20774. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  20775. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  20776. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  20777. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  20778. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  20779. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_MASK
  20780. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  20781. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  20782. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  20783. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  20784. CGTS_SA0_WGP01_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  20785. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20786. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20787. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  20788. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20789. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_MASK
  20790. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  20791. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  20792. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20793. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20794. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TA__SHIFT
  20795. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20796. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20797. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  20798. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20799. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_MASK
  20800. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  20801. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  20802. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20803. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20804. CGTS_SA0_WGP01_CU1_TATD_CTRL_REG__TD__SHIFT
  20805. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20806. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20807. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20808. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20809. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_MASK
  20810. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20811. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20812. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20813. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20814. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPF__SHIFT
  20815. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20816. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20817. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20818. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20819. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_MASK
  20820. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  20821. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  20822. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  20823. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  20824. CGTS_SA0_WGP01_CU1_TCP_CTRL_REG__TCPI__SHIFT
  20825. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  20826. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  20827. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  20828. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  20829. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  20830. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  20831. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  20832. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  20833. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  20834. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  20835. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  20836. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  20837. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  20838. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  20839. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_MASK
  20840. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  20841. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  20842. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  20843. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  20844. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  20845. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  20846. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  20847. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  20848. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  20849. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_MASK
  20850. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  20851. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  20852. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  20853. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  20854. CGTS_SA0_WGP02_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  20855. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  20856. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  20857. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  20858. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  20859. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_MASK
  20860. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  20861. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  20862. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  20863. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  20864. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  20865. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  20866. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  20867. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  20868. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  20869. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  20870. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  20871. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  20872. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  20873. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  20874. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  20875. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  20876. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  20877. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  20878. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  20879. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_MASK
  20880. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  20881. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  20882. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  20883. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  20884. CGTS_SA0_WGP02_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  20885. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20886. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20887. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  20888. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20889. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_MASK
  20890. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  20891. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  20892. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20893. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20894. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TA__SHIFT
  20895. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20896. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20897. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  20898. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20899. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_MASK
  20900. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  20901. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  20902. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20903. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20904. CGTS_SA0_WGP02_CU0_TATD_CTRL_REG__TD__SHIFT
  20905. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20906. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20907. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20908. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20909. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_MASK
  20910. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20911. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20912. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20913. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20914. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPF__SHIFT
  20915. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20916. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20917. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20918. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20919. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_MASK
  20920. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  20921. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  20922. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  20923. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  20924. CGTS_SA0_WGP02_CU0_TCP_CTRL_REG__TCPI__SHIFT
  20925. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  20926. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  20927. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  20928. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  20929. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  20930. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  20931. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  20932. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  20933. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  20934. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  20935. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  20936. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  20937. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  20938. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  20939. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_MASK
  20940. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  20941. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  20942. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  20943. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  20944. CGTS_SA0_WGP02_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  20945. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  20946. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  20947. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  20948. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  20949. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  20950. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  20951. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  20952. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  20953. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  20954. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  20955. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  20956. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  20957. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  20958. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  20959. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_MASK
  20960. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  20961. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  20962. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  20963. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  20964. CGTS_SA0_WGP02_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  20965. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  20966. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  20967. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  20968. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  20969. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_MASK
  20970. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  20971. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  20972. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  20973. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  20974. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TA__SHIFT
  20975. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  20976. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  20977. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  20978. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  20979. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_MASK
  20980. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  20981. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  20982. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  20983. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  20984. CGTS_SA0_WGP02_CU1_TATD_CTRL_REG__TD__SHIFT
  20985. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  20986. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  20987. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  20988. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  20989. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_MASK
  20990. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  20991. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  20992. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  20993. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  20994. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPF__SHIFT
  20995. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  20996. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  20997. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  20998. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  20999. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_MASK
  21000. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21001. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21002. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21003. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21004. CGTS_SA0_WGP02_CU1_TCP_CTRL_REG__TCPI__SHIFT
  21005. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21006. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21007. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21008. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21009. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  21010. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21011. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21012. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21013. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21014. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  21015. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21016. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21017. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21018. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21019. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_MASK
  21020. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21021. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21022. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21023. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21024. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  21025. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  21026. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  21027. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  21028. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  21029. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_MASK
  21030. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  21031. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  21032. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  21033. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  21034. CGTS_SA0_WGP10_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  21035. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  21036. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  21037. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  21038. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  21039. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_MASK
  21040. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  21041. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  21042. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  21043. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  21044. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  21045. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21046. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21047. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21048. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21049. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  21050. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21051. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21052. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21053. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21054. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  21055. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21056. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21057. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21058. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21059. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_MASK
  21060. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21061. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21062. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21063. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21064. CGTS_SA0_WGP10_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  21065. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21066. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21067. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21068. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21069. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_MASK
  21070. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21071. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21072. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21073. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21074. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TA__SHIFT
  21075. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21076. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21077. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21078. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21079. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_MASK
  21080. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21081. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21082. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21083. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21084. CGTS_SA0_WGP10_CU0_TATD_CTRL_REG__TD__SHIFT
  21085. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21086. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21087. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21088. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21089. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_MASK
  21090. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21091. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21092. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21093. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21094. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPF__SHIFT
  21095. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21096. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21097. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21098. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21099. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_MASK
  21100. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21101. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21102. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21103. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21104. CGTS_SA0_WGP10_CU0_TCP_CTRL_REG__TCPI__SHIFT
  21105. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21106. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21107. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21108. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21109. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  21110. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21111. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21112. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21113. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21114. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  21115. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21116. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21117. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21118. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21119. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_MASK
  21120. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21121. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21122. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21123. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21124. CGTS_SA0_WGP10_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  21125. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21126. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21127. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21128. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21129. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  21130. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21131. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21132. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21133. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21134. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  21135. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21136. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21137. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21138. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21139. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_MASK
  21140. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21141. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21142. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21143. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21144. CGTS_SA0_WGP10_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  21145. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21146. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21147. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21148. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21149. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_MASK
  21150. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21151. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21152. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21153. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21154. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TA__SHIFT
  21155. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21156. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21157. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21158. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21159. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_MASK
  21160. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21161. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21162. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21163. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21164. CGTS_SA0_WGP10_CU1_TATD_CTRL_REG__TD__SHIFT
  21165. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21166. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21167. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21168. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21169. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_MASK
  21170. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21171. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21172. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21173. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21174. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPF__SHIFT
  21175. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21176. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21177. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21178. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21179. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_MASK
  21180. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21181. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21182. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21183. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21184. CGTS_SA0_WGP10_CU1_TCP_CTRL_REG__TCPI__SHIFT
  21185. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21186. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21187. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21188. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21189. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  21190. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21191. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21192. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21193. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21194. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  21195. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21196. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21197. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21198. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21199. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_MASK
  21200. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21201. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21202. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21203. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21204. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  21205. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  21206. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  21207. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  21208. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  21209. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_MASK
  21210. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  21211. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  21212. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  21213. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  21214. CGTS_SA0_WGP11_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  21215. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  21216. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  21217. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  21218. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  21219. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_MASK
  21220. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  21221. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  21222. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  21223. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  21224. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  21225. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21226. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21227. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21228. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21229. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  21230. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21231. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21232. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21233. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21234. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  21235. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21236. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21237. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21238. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21239. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_MASK
  21240. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21241. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21242. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21243. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21244. CGTS_SA0_WGP11_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  21245. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21246. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21247. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21248. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21249. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_MASK
  21250. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21251. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21252. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21253. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21254. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TA__SHIFT
  21255. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21256. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21257. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21258. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21259. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_MASK
  21260. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21261. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21262. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21263. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21264. CGTS_SA0_WGP11_CU0_TATD_CTRL_REG__TD__SHIFT
  21265. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21266. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21267. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21268. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21269. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_MASK
  21270. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21271. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21272. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21273. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21274. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPF__SHIFT
  21275. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21276. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21277. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21278. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21279. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_MASK
  21280. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21281. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21282. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21283. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21284. CGTS_SA0_WGP11_CU0_TCP_CTRL_REG__TCPI__SHIFT
  21285. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21286. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21287. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21288. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21289. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  21290. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21291. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21292. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21293. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21294. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  21295. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21296. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21297. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21298. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21299. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_MASK
  21300. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21301. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21302. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21303. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21304. CGTS_SA0_WGP11_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  21305. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21306. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21307. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21308. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21309. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  21310. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21311. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21312. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21313. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21314. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  21315. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21316. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21317. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21318. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21319. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_MASK
  21320. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21321. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21322. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21323. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21324. CGTS_SA0_WGP11_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  21325. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21326. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21327. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21328. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21329. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_MASK
  21330. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21331. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21332. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21333. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21334. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TA__SHIFT
  21335. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21336. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21337. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21338. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21339. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_MASK
  21340. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21341. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21342. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21343. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21344. CGTS_SA0_WGP11_CU1_TATD_CTRL_REG__TD__SHIFT
  21345. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21346. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21347. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21348. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21349. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_MASK
  21350. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21351. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21352. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21353. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21354. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPF__SHIFT
  21355. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21356. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21357. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21358. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21359. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_MASK
  21360. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21361. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21362. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21363. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21364. CGTS_SA0_WGP11_CU1_TCP_CTRL_REG__TCPI__SHIFT
  21365. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21366. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21367. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21368. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21369. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  21370. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21371. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21372. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21373. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21374. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  21375. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21376. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21377. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21378. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21379. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_MASK
  21380. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21381. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21382. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21383. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21384. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  21385. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  21386. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  21387. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  21388. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  21389. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_MASK
  21390. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  21391. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  21392. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  21393. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  21394. CGTS_SA0_WGP12_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  21395. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  21396. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  21397. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  21398. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  21399. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_MASK
  21400. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  21401. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  21402. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  21403. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  21404. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  21405. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21406. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21407. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21408. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21409. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  21410. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21411. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21412. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21413. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21414. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  21415. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21416. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21417. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21418. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21419. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_MASK
  21420. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21421. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21422. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21423. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21424. CGTS_SA0_WGP12_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  21425. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21426. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21427. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21428. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21429. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_MASK
  21430. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21431. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21432. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21433. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21434. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TA__SHIFT
  21435. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21436. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21437. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21438. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21439. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_MASK
  21440. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21441. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21442. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21443. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21444. CGTS_SA0_WGP12_CU0_TATD_CTRL_REG__TD__SHIFT
  21445. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21446. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21447. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21448. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21449. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_MASK
  21450. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21451. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21452. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21453. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21454. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPF__SHIFT
  21455. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21456. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21457. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21458. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21459. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_MASK
  21460. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21461. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21462. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21463. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21464. CGTS_SA0_WGP12_CU0_TCP_CTRL_REG__TCPI__SHIFT
  21465. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21466. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21467. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21468. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21469. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  21470. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21471. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21472. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21473. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21474. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  21475. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21476. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21477. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21478. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21479. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_MASK
  21480. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21481. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21482. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21483. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21484. CGTS_SA0_WGP12_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  21485. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21486. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21487. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21488. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21489. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  21490. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21491. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21492. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21493. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21494. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  21495. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21496. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21497. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21498. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21499. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_MASK
  21500. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21501. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21502. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21503. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21504. CGTS_SA0_WGP12_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  21505. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21506. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21507. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21508. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21509. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_MASK
  21510. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21511. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21512. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21513. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21514. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TA__SHIFT
  21515. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21516. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21517. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21518. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21519. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_MASK
  21520. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21521. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21522. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21523. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21524. CGTS_SA0_WGP12_CU1_TATD_CTRL_REG__TD__SHIFT
  21525. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21526. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21527. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21528. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21529. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_MASK
  21530. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21531. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21532. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21533. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21534. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPF__SHIFT
  21535. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21536. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21537. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21538. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21539. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_MASK
  21540. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21541. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21542. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21543. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21544. CGTS_SA0_WGP12_CU1_TCP_CTRL_REG__TCPI__SHIFT
  21545. CGTS_SA1_QUAD0_CLK_MONITOR_DELAY_REG__OFF_MONITOR_DELAY_MASK
  21546. CGTS_SA1_QUAD0_CLK_MONITOR_DELAY_REG__OFF_MONITOR_DELAY__SHIFT
  21547. CGTS_SA1_QUAD0_CLK_MONITOR_DELAY_REG__ON_MONITOR_DELAY_MASK
  21548. CGTS_SA1_QUAD0_CLK_MONITOR_DELAY_REG__ON_MONITOR_DELAY__SHIFT
  21549. CGTS_SA1_QUAD0_SM_CTRL_REG__BASE_MODE_MASK
  21550. CGTS_SA1_QUAD0_SM_CTRL_REG__BASE_MODE__SHIFT
  21551. CGTS_SA1_QUAD0_SM_CTRL_REG__CGTS_CLKEN_DELAY_MASK
  21552. CGTS_SA1_QUAD0_SM_CTRL_REG__CGTS_CLKEN_DELAY__SHIFT
  21553. CGTS_SA1_QUAD0_SM_CTRL_REG__CGTS_CLKEN_MODE_MASK
  21554. CGTS_SA1_QUAD0_SM_CTRL_REG__CGTS_CLKEN_MODE__SHIFT
  21555. CGTS_SA1_QUAD0_SM_CTRL_REG__CGTS_MGCG_EN_MASK
  21556. CGTS_SA1_QUAD0_SM_CTRL_REG__CGTS_MGCG_EN__SHIFT
  21557. CGTS_SA1_QUAD0_SM_CTRL_REG__CGTS_SW_CLKEN_MASK
  21558. CGTS_SA1_QUAD0_SM_CTRL_REG__CGTS_SW_CLKEN__SHIFT
  21559. CGTS_SA1_QUAD0_SM_CTRL_REG__LS_OVERRIDE_MASK
  21560. CGTS_SA1_QUAD0_SM_CTRL_REG__LS_OVERRIDE__SHIFT
  21561. CGTS_SA1_QUAD0_SM_CTRL_REG__MASK_OVERRIDE_MASK
  21562. CGTS_SA1_QUAD0_SM_CTRL_REG__MASK_OVERRIDE__SHIFT
  21563. CGTS_SA1_QUAD0_SM_CTRL_REG__OFF_SEQ_DELAY_MASK
  21564. CGTS_SA1_QUAD0_SM_CTRL_REG__OFF_SEQ_DELAY__SHIFT
  21565. CGTS_SA1_QUAD0_SM_CTRL_REG__ON_SEQ_DELAY_MASK
  21566. CGTS_SA1_QUAD0_SM_CTRL_REG__ON_SEQ_DELAY__SHIFT
  21567. CGTS_SA1_QUAD0_SM_CTRL_REG__OVERRIDE_MASK
  21568. CGTS_SA1_QUAD0_SM_CTRL_REG__OVERRIDE__SHIFT
  21569. CGTS_SA1_QUAD0_SM_CTRL_REG__SM_MODE_ENABLE_MASK
  21570. CGTS_SA1_QUAD0_SM_CTRL_REG__SM_MODE_ENABLE__SHIFT
  21571. CGTS_SA1_QUAD0_SM_CTRL_REG__SM_MODE_MASK
  21572. CGTS_SA1_QUAD0_SM_CTRL_REG__SM_MODE__SHIFT
  21573. CGTS_SA1_QUAD1_CLK_MONITOR_DELAY_REG__OFF_MONITOR_DELAY_MASK
  21574. CGTS_SA1_QUAD1_CLK_MONITOR_DELAY_REG__OFF_MONITOR_DELAY__SHIFT
  21575. CGTS_SA1_QUAD1_CLK_MONITOR_DELAY_REG__ON_MONITOR_DELAY_MASK
  21576. CGTS_SA1_QUAD1_CLK_MONITOR_DELAY_REG__ON_MONITOR_DELAY__SHIFT
  21577. CGTS_SA1_QUAD1_SM_CTRL_REG__BASE_MODE_MASK
  21578. CGTS_SA1_QUAD1_SM_CTRL_REG__BASE_MODE__SHIFT
  21579. CGTS_SA1_QUAD1_SM_CTRL_REG__CGTS_CLKEN_DELAY_MASK
  21580. CGTS_SA1_QUAD1_SM_CTRL_REG__CGTS_CLKEN_DELAY__SHIFT
  21581. CGTS_SA1_QUAD1_SM_CTRL_REG__CGTS_CLKEN_MODE_MASK
  21582. CGTS_SA1_QUAD1_SM_CTRL_REG__CGTS_CLKEN_MODE__SHIFT
  21583. CGTS_SA1_QUAD1_SM_CTRL_REG__CGTS_MGCG_EN_MASK
  21584. CGTS_SA1_QUAD1_SM_CTRL_REG__CGTS_MGCG_EN__SHIFT
  21585. CGTS_SA1_QUAD1_SM_CTRL_REG__CGTS_SW_CLKEN_MASK
  21586. CGTS_SA1_QUAD1_SM_CTRL_REG__CGTS_SW_CLKEN__SHIFT
  21587. CGTS_SA1_QUAD1_SM_CTRL_REG__LS_OVERRIDE_MASK
  21588. CGTS_SA1_QUAD1_SM_CTRL_REG__LS_OVERRIDE__SHIFT
  21589. CGTS_SA1_QUAD1_SM_CTRL_REG__MASK_OVERRIDE_MASK
  21590. CGTS_SA1_QUAD1_SM_CTRL_REG__MASK_OVERRIDE__SHIFT
  21591. CGTS_SA1_QUAD1_SM_CTRL_REG__OFF_SEQ_DELAY_MASK
  21592. CGTS_SA1_QUAD1_SM_CTRL_REG__OFF_SEQ_DELAY__SHIFT
  21593. CGTS_SA1_QUAD1_SM_CTRL_REG__ON_SEQ_DELAY_MASK
  21594. CGTS_SA1_QUAD1_SM_CTRL_REG__ON_SEQ_DELAY__SHIFT
  21595. CGTS_SA1_QUAD1_SM_CTRL_REG__OVERRIDE_MASK
  21596. CGTS_SA1_QUAD1_SM_CTRL_REG__OVERRIDE__SHIFT
  21597. CGTS_SA1_QUAD1_SM_CTRL_REG__SM_MODE_ENABLE_MASK
  21598. CGTS_SA1_QUAD1_SM_CTRL_REG__SM_MODE_ENABLE__SHIFT
  21599. CGTS_SA1_QUAD1_SM_CTRL_REG__SM_MODE_MASK
  21600. CGTS_SA1_QUAD1_SM_CTRL_REG__SM_MODE__SHIFT
  21601. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21602. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21603. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21604. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21605. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  21606. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21607. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21608. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21609. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21610. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  21611. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21612. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21613. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21614. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21615. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_MASK
  21616. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21617. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21618. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21619. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21620. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  21621. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  21622. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  21623. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  21624. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  21625. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_MASK
  21626. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  21627. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  21628. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  21629. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  21630. CGTS_SA1_WGP00_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  21631. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  21632. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  21633. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  21634. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  21635. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_MASK
  21636. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  21637. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  21638. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  21639. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  21640. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  21641. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21642. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21643. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21644. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21645. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  21646. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21647. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21648. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21649. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21650. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  21651. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21652. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21653. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21654. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21655. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_MASK
  21656. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21657. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21658. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21659. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21660. CGTS_SA1_WGP00_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  21661. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21662. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21663. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21664. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21665. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_MASK
  21666. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21667. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21668. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21669. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21670. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TA__SHIFT
  21671. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21672. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21673. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21674. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21675. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_MASK
  21676. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21677. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21678. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21679. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21680. CGTS_SA1_WGP00_CU0_TATD_CTRL_REG__TD__SHIFT
  21681. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21682. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21683. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21684. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21685. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_MASK
  21686. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21687. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21688. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21689. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21690. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPF__SHIFT
  21691. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21692. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21693. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21694. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21695. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_MASK
  21696. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21697. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21698. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21699. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21700. CGTS_SA1_WGP00_CU0_TCP_CTRL_REG__TCPI__SHIFT
  21701. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21702. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21703. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21704. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21705. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  21706. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21707. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21708. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21709. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21710. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  21711. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21712. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21713. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21714. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21715. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_MASK
  21716. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21717. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21718. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21719. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21720. CGTS_SA1_WGP00_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  21721. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21722. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21723. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21724. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21725. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  21726. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21727. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21728. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21729. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21730. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  21731. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21732. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21733. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21734. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21735. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_MASK
  21736. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21737. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21738. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21739. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21740. CGTS_SA1_WGP00_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  21741. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21742. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21743. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21744. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21745. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_MASK
  21746. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21747. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21748. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21749. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21750. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TA__SHIFT
  21751. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21752. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21753. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21754. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21755. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_MASK
  21756. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21757. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21758. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21759. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21760. CGTS_SA1_WGP00_CU1_TATD_CTRL_REG__TD__SHIFT
  21761. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21762. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21763. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21764. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21765. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_MASK
  21766. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21767. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21768. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21769. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21770. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPF__SHIFT
  21771. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21772. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21773. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21774. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21775. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_MASK
  21776. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21777. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21778. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21779. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21780. CGTS_SA1_WGP00_CU1_TCP_CTRL_REG__TCPI__SHIFT
  21781. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21782. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21783. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21784. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21785. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  21786. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21787. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21788. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21789. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21790. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  21791. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21792. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21793. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21794. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21795. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_MASK
  21796. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21797. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21798. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21799. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21800. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  21801. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  21802. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  21803. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  21804. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  21805. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_MASK
  21806. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  21807. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  21808. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  21809. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  21810. CGTS_SA1_WGP01_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  21811. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  21812. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  21813. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  21814. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  21815. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_MASK
  21816. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  21817. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  21818. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  21819. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  21820. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  21821. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21822. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21823. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21824. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21825. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  21826. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21827. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21828. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21829. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21830. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  21831. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21832. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21833. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21834. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21835. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_MASK
  21836. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21837. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21838. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21839. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21840. CGTS_SA1_WGP01_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  21841. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21842. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21843. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21844. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21845. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_MASK
  21846. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21847. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21848. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21849. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21850. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TA__SHIFT
  21851. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21852. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21853. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21854. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21855. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_MASK
  21856. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21857. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21858. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21859. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21860. CGTS_SA1_WGP01_CU0_TATD_CTRL_REG__TD__SHIFT
  21861. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21862. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21863. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21864. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21865. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_MASK
  21866. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21867. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21868. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21869. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21870. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPF__SHIFT
  21871. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21872. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21873. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21874. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21875. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_MASK
  21876. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21877. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21878. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21879. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21880. CGTS_SA1_WGP01_CU0_TCP_CTRL_REG__TCPI__SHIFT
  21881. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21882. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21883. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21884. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21885. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  21886. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21887. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21888. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21889. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21890. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  21891. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21892. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21893. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21894. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21895. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_MASK
  21896. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21897. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21898. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21899. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21900. CGTS_SA1_WGP01_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  21901. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  21902. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  21903. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  21904. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  21905. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  21906. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  21907. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  21908. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  21909. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  21910. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  21911. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  21912. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  21913. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  21914. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  21915. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_MASK
  21916. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  21917. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  21918. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  21919. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  21920. CGTS_SA1_WGP01_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  21921. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  21922. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  21923. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  21924. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  21925. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_MASK
  21926. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  21927. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  21928. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  21929. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  21930. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TA__SHIFT
  21931. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  21932. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  21933. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  21934. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  21935. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_MASK
  21936. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  21937. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  21938. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  21939. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  21940. CGTS_SA1_WGP01_CU1_TATD_CTRL_REG__TD__SHIFT
  21941. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  21942. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  21943. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  21944. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  21945. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_MASK
  21946. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  21947. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  21948. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  21949. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  21950. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPF__SHIFT
  21951. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  21952. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  21953. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  21954. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  21955. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_MASK
  21956. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  21957. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  21958. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  21959. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  21960. CGTS_SA1_WGP01_CU1_TCP_CTRL_REG__TCPI__SHIFT
  21961. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  21962. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  21963. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  21964. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  21965. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  21966. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  21967. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  21968. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  21969. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  21970. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  21971. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  21972. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  21973. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  21974. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  21975. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_MASK
  21976. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  21977. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  21978. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  21979. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  21980. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  21981. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  21982. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  21983. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  21984. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  21985. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_MASK
  21986. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  21987. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  21988. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  21989. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  21990. CGTS_SA1_WGP02_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  21991. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  21992. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  21993. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  21994. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  21995. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_MASK
  21996. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  21997. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  21998. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  21999. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  22000. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  22001. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  22002. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  22003. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  22004. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  22005. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  22006. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  22007. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  22008. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  22009. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  22010. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  22011. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  22012. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  22013. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  22014. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  22015. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_MASK
  22016. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  22017. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  22018. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  22019. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  22020. CGTS_SA1_WGP02_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  22021. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  22022. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  22023. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  22024. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  22025. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_MASK
  22026. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  22027. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  22028. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  22029. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  22030. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TA__SHIFT
  22031. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  22032. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  22033. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  22034. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  22035. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_MASK
  22036. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  22037. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  22038. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  22039. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  22040. CGTS_SA1_WGP02_CU0_TATD_CTRL_REG__TD__SHIFT
  22041. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  22042. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  22043. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  22044. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  22045. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_MASK
  22046. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  22047. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  22048. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  22049. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  22050. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPF__SHIFT
  22051. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  22052. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  22053. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  22054. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  22055. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_MASK
  22056. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  22057. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  22058. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  22059. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  22060. CGTS_SA1_WGP02_CU0_TCP_CTRL_REG__TCPI__SHIFT
  22061. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  22062. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  22063. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  22064. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  22065. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  22066. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  22067. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  22068. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  22069. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  22070. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  22071. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  22072. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  22073. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  22074. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  22075. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_MASK
  22076. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  22077. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  22078. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  22079. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  22080. CGTS_SA1_WGP02_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  22081. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  22082. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  22083. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  22084. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  22085. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  22086. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  22087. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  22088. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  22089. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  22090. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  22091. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  22092. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  22093. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  22094. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  22095. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_MASK
  22096. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  22097. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  22098. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  22099. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  22100. CGTS_SA1_WGP02_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  22101. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  22102. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  22103. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  22104. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  22105. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_MASK
  22106. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  22107. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  22108. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  22109. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  22110. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TA__SHIFT
  22111. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  22112. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  22113. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  22114. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  22115. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_MASK
  22116. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  22117. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  22118. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  22119. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  22120. CGTS_SA1_WGP02_CU1_TATD_CTRL_REG__TD__SHIFT
  22121. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  22122. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  22123. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  22124. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  22125. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_MASK
  22126. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  22127. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  22128. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  22129. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  22130. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPF__SHIFT
  22131. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  22132. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  22133. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  22134. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  22135. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_MASK
  22136. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  22137. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  22138. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  22139. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  22140. CGTS_SA1_WGP02_CU1_TCP_CTRL_REG__TCPI__SHIFT
  22141. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  22142. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  22143. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  22144. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  22145. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  22146. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  22147. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  22148. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  22149. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  22150. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  22151. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  22152. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  22153. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  22154. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  22155. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_MASK
  22156. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  22157. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  22158. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  22159. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  22160. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  22161. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  22162. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  22163. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  22164. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  22165. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_MASK
  22166. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  22167. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  22168. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  22169. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  22170. CGTS_SA1_WGP10_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  22171. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  22172. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  22173. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  22174. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  22175. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_MASK
  22176. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  22177. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  22178. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  22179. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  22180. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  22181. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  22182. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  22183. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  22184. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  22185. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  22186. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  22187. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  22188. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  22189. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  22190. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  22191. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  22192. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  22193. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  22194. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  22195. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_MASK
  22196. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  22197. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  22198. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  22199. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  22200. CGTS_SA1_WGP10_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  22201. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  22202. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  22203. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  22204. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  22205. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_MASK
  22206. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  22207. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  22208. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  22209. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  22210. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TA__SHIFT
  22211. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  22212. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  22213. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  22214. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  22215. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_MASK
  22216. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  22217. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  22218. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  22219. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  22220. CGTS_SA1_WGP10_CU0_TATD_CTRL_REG__TD__SHIFT
  22221. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  22222. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  22223. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  22224. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  22225. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_MASK
  22226. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  22227. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  22228. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  22229. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  22230. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPF__SHIFT
  22231. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  22232. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  22233. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  22234. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  22235. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_MASK
  22236. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  22237. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  22238. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  22239. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  22240. CGTS_SA1_WGP10_CU0_TCP_CTRL_REG__TCPI__SHIFT
  22241. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  22242. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  22243. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  22244. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  22245. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  22246. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  22247. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  22248. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  22249. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  22250. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  22251. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  22252. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  22253. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  22254. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  22255. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_MASK
  22256. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  22257. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  22258. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  22259. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  22260. CGTS_SA1_WGP10_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  22261. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  22262. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  22263. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  22264. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  22265. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  22266. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  22267. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  22268. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  22269. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  22270. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  22271. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  22272. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  22273. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  22274. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  22275. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_MASK
  22276. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  22277. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  22278. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  22279. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  22280. CGTS_SA1_WGP10_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  22281. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  22282. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  22283. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  22284. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  22285. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_MASK
  22286. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  22287. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  22288. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  22289. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  22290. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TA__SHIFT
  22291. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  22292. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  22293. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  22294. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  22295. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_MASK
  22296. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  22297. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  22298. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  22299. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  22300. CGTS_SA1_WGP10_CU1_TATD_CTRL_REG__TD__SHIFT
  22301. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  22302. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  22303. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  22304. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  22305. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_MASK
  22306. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  22307. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  22308. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  22309. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  22310. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPF__SHIFT
  22311. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  22312. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  22313. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  22314. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  22315. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_MASK
  22316. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  22317. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  22318. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  22319. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  22320. CGTS_SA1_WGP10_CU1_TCP_CTRL_REG__TCPI__SHIFT
  22321. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  22322. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  22323. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  22324. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  22325. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  22326. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  22327. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  22328. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  22329. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  22330. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  22331. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  22332. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  22333. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  22334. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  22335. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_MASK
  22336. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  22337. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  22338. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  22339. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  22340. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  22341. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  22342. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  22343. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  22344. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  22345. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_MASK
  22346. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  22347. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  22348. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  22349. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  22350. CGTS_SA1_WGP11_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  22351. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  22352. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  22353. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  22354. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  22355. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_MASK
  22356. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  22357. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  22358. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  22359. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  22360. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  22361. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  22362. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  22363. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  22364. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  22365. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  22366. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  22367. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  22368. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  22369. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  22370. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  22371. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  22372. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  22373. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  22374. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  22375. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_MASK
  22376. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  22377. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  22378. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  22379. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  22380. CGTS_SA1_WGP11_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  22381. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  22382. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  22383. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  22384. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  22385. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_MASK
  22386. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  22387. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  22388. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  22389. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  22390. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TA__SHIFT
  22391. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  22392. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  22393. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  22394. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  22395. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_MASK
  22396. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  22397. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  22398. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  22399. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  22400. CGTS_SA1_WGP11_CU0_TATD_CTRL_REG__TD__SHIFT
  22401. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  22402. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  22403. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  22404. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  22405. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_MASK
  22406. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  22407. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  22408. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  22409. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  22410. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPF__SHIFT
  22411. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  22412. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  22413. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  22414. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  22415. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_MASK
  22416. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  22417. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  22418. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  22419. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  22420. CGTS_SA1_WGP11_CU0_TCP_CTRL_REG__TCPI__SHIFT
  22421. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  22422. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  22423. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  22424. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  22425. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  22426. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  22427. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  22428. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  22429. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  22430. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  22431. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  22432. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  22433. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  22434. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  22435. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_MASK
  22436. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  22437. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  22438. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  22439. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  22440. CGTS_SA1_WGP11_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  22441. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  22442. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  22443. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  22444. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  22445. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  22446. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  22447. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  22448. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  22449. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  22450. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  22451. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  22452. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  22453. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  22454. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  22455. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_MASK
  22456. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  22457. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  22458. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  22459. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  22460. CGTS_SA1_WGP11_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  22461. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  22462. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  22463. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  22464. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  22465. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_MASK
  22466. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  22467. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  22468. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  22469. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  22470. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TA__SHIFT
  22471. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  22472. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  22473. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  22474. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  22475. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_MASK
  22476. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  22477. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  22478. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  22479. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  22480. CGTS_SA1_WGP11_CU1_TATD_CTRL_REG__TD__SHIFT
  22481. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  22482. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  22483. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  22484. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  22485. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_MASK
  22486. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  22487. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  22488. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  22489. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  22490. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPF__SHIFT
  22491. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  22492. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  22493. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  22494. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  22495. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_MASK
  22496. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  22497. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  22498. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  22499. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  22500. CGTS_SA1_WGP11_CU1_TCP_CTRL_REG__TCPI__SHIFT
  22501. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  22502. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  22503. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  22504. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  22505. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_MASK
  22506. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  22507. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  22508. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  22509. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  22510. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SIMD0__SHIFT
  22511. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  22512. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  22513. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  22514. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  22515. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_MASK
  22516. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  22517. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  22518. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  22519. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  22520. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQ0__SHIFT
  22521. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE_MASK
  22522. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_BUSY_OVERRIDE__SHIFT
  22523. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE_MASK
  22524. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_LS_OVERRIDE__SHIFT
  22525. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_MASK
  22526. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE_MASK
  22527. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_OVERRIDE__SHIFT
  22528. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE_MASK
  22529. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC_SIMDBUSY_OVERRIDE__SHIFT
  22530. CGTS_SA1_WGP12_CU0_SIMD0_CTRL_REG__SQC__SHIFT
  22531. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE_MASK
  22532. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_BUSY_OVERRIDE__SHIFT
  22533. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE_MASK
  22534. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_LS_OVERRIDE__SHIFT
  22535. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_MASK
  22536. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE_MASK
  22537. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_OVERRIDE__SHIFT
  22538. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE_MASK
  22539. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS_SIMDBUSY_OVERRIDE__SHIFT
  22540. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__LDS__SHIFT
  22541. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  22542. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  22543. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  22544. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  22545. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_MASK
  22546. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  22547. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  22548. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  22549. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  22550. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SIMD1__SHIFT
  22551. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  22552. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  22553. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  22554. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  22555. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_MASK
  22556. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  22557. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  22558. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  22559. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  22560. CGTS_SA1_WGP12_CU0_SIMD1_CTRL_REG__SQ1__SHIFT
  22561. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  22562. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  22563. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  22564. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  22565. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_MASK
  22566. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_OVERRIDE_MASK
  22567. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  22568. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  22569. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  22570. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TA__SHIFT
  22571. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  22572. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  22573. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  22574. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  22575. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_MASK
  22576. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_OVERRIDE_MASK
  22577. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  22578. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  22579. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  22580. CGTS_SA1_WGP12_CU0_TATD_CTRL_REG__TD__SHIFT
  22581. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  22582. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  22583. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  22584. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  22585. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_MASK
  22586. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  22587. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  22588. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  22589. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  22590. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPF__SHIFT
  22591. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  22592. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  22593. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  22594. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  22595. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_MASK
  22596. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  22597. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  22598. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  22599. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  22600. CGTS_SA1_WGP12_CU0_TCP_CTRL_REG__TCPI__SHIFT
  22601. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE_MASK
  22602. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_BUSY_OVERRIDE__SHIFT
  22603. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE_MASK
  22604. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_LS_OVERRIDE__SHIFT
  22605. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_MASK
  22606. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE_MASK
  22607. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_OVERRIDE__SHIFT
  22608. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE_MASK
  22609. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0_SIMDBUSY_OVERRIDE__SHIFT
  22610. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SIMD0__SHIFT
  22611. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE_MASK
  22612. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_BUSY_OVERRIDE__SHIFT
  22613. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE_MASK
  22614. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_LS_OVERRIDE__SHIFT
  22615. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_MASK
  22616. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE_MASK
  22617. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_OVERRIDE__SHIFT
  22618. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE_MASK
  22619. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0_SIMDBUSY_OVERRIDE__SHIFT
  22620. CGTS_SA1_WGP12_CU1_SIMD0_CTRL_REG__SQ0__SHIFT
  22621. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE_MASK
  22622. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_BUSY_OVERRIDE__SHIFT
  22623. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE_MASK
  22624. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_LS_OVERRIDE__SHIFT
  22625. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_MASK
  22626. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE_MASK
  22627. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_OVERRIDE__SHIFT
  22628. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE_MASK
  22629. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1_SIMDBUSY_OVERRIDE__SHIFT
  22630. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SIMD1__SHIFT
  22631. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE_MASK
  22632. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_BUSY_OVERRIDE__SHIFT
  22633. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE_MASK
  22634. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_LS_OVERRIDE__SHIFT
  22635. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_MASK
  22636. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE_MASK
  22637. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_OVERRIDE__SHIFT
  22638. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE_MASK
  22639. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1_SIMDBUSY_OVERRIDE__SHIFT
  22640. CGTS_SA1_WGP12_CU1_SIMD1_CTRL_REG__SQ1__SHIFT
  22641. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE_MASK
  22642. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_BUSY_OVERRIDE__SHIFT
  22643. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE_MASK
  22644. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_LS_OVERRIDE__SHIFT
  22645. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_MASK
  22646. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_OVERRIDE_MASK
  22647. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_OVERRIDE__SHIFT
  22648. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE_MASK
  22649. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA_SIMDBUSY_OVERRIDE__SHIFT
  22650. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TA__SHIFT
  22651. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE_MASK
  22652. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_BUSY_OVERRIDE__SHIFT
  22653. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE_MASK
  22654. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_LS_OVERRIDE__SHIFT
  22655. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_MASK
  22656. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_OVERRIDE_MASK
  22657. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_OVERRIDE__SHIFT
  22658. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE_MASK
  22659. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD_SIMDBUSY_OVERRIDE__SHIFT
  22660. CGTS_SA1_WGP12_CU1_TATD_CTRL_REG__TD__SHIFT
  22661. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE_MASK
  22662. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_BUSY_OVERRIDE__SHIFT
  22663. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE_MASK
  22664. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_LS_OVERRIDE__SHIFT
  22665. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_MASK
  22666. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_OVERRIDE_MASK
  22667. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_OVERRIDE__SHIFT
  22668. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE_MASK
  22669. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF_SIMDBUSY_OVERRIDE__SHIFT
  22670. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPF__SHIFT
  22671. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE_MASK
  22672. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_BUSY_OVERRIDE__SHIFT
  22673. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK
  22674. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_LS_OVERRIDE__SHIFT
  22675. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_MASK
  22676. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_OVERRIDE_MASK
  22677. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_OVERRIDE__SHIFT
  22678. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE_MASK
  22679. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI_SIMDBUSY_OVERRIDE__SHIFT
  22680. CGTS_SA1_WGP12_CU1_TCP_CTRL_REG__TCPI__SHIFT
  22681. CGTS_SM_CTRL_REG
  22682. CGTS_SM_CTRL_REG_DISABLE
  22683. CGTS_SM_CTRL_REG_ENABLE
  22684. CGTS_SM_CTRL_REG__BASE_MODE_MASK
  22685. CGTS_SM_CTRL_REG__BASE_MODE__SHIFT
  22686. CGTS_SM_CTRL_REG__LS_OVERRIDE_MASK
  22687. CGTS_SM_CTRL_REG__LS_OVERRIDE__SHIFT
  22688. CGTS_SM_CTRL_REG__MGCG_ENABLED_MASK
  22689. CGTS_SM_CTRL_REG__MGCG_ENABLED__SHIFT
  22690. CGTS_SM_CTRL_REG__OFF_SEQ_DELAY_MASK
  22691. CGTS_SM_CTRL_REG__OFF_SEQ_DELAY__SHIFT
  22692. CGTS_SM_CTRL_REG__ON_MONITOR_ADD_EN_MASK
  22693. CGTS_SM_CTRL_REG__ON_MONITOR_ADD_EN__SHIFT
  22694. CGTS_SM_CTRL_REG__ON_MONITOR_ADD_MASK
  22695. CGTS_SM_CTRL_REG__ON_MONITOR_ADD__SHIFT
  22696. CGTS_SM_CTRL_REG__ON_SEQ_DELAY_MASK
  22697. CGTS_SM_CTRL_REG__ON_SEQ_DELAY__SHIFT
  22698. CGTS_SM_CTRL_REG__OVERRIDE_MASK
  22699. CGTS_SM_CTRL_REG__OVERRIDE__SHIFT
  22700. CGTS_SM_CTRL_REG__SM_MODE_ENABLE_MASK
  22701. CGTS_SM_CTRL_REG__SM_MODE_ENABLE__SHIFT
  22702. CGTS_SM_CTRL_REG__SM_MODE_MASK
  22703. CGTS_SM_CTRL_REG__SM_MODE__SHIFT
  22704. CGTS_STATUS_REG__SA0_QUAD0_CG_STATUS_MASK
  22705. CGTS_STATUS_REG__SA0_QUAD0_CG_STATUS__SHIFT
  22706. CGTS_STATUS_REG__SA0_QUAD0_MGCG_ENABLED_MASK
  22707. CGTS_STATUS_REG__SA0_QUAD0_MGCG_ENABLED__SHIFT
  22708. CGTS_STATUS_REG__SA0_QUAD1_CG_STATUS_MASK
  22709. CGTS_STATUS_REG__SA0_QUAD1_CG_STATUS__SHIFT
  22710. CGTS_STATUS_REG__SA0_QUAD1_MGCG_ENABLED_MASK
  22711. CGTS_STATUS_REG__SA0_QUAD1_MGCG_ENABLED__SHIFT
  22712. CGTS_STATUS_REG__SA1_QUAD0_CG_STATUS_MASK
  22713. CGTS_STATUS_REG__SA1_QUAD0_CG_STATUS__SHIFT
  22714. CGTS_STATUS_REG__SA1_QUAD0_MGCG_ENABLED_MASK
  22715. CGTS_STATUS_REG__SA1_QUAD0_MGCG_ENABLED__SHIFT
  22716. CGTS_STATUS_REG__SA1_QUAD1_CG_STATUS_MASK
  22717. CGTS_STATUS_REG__SA1_QUAD1_CG_STATUS__SHIFT
  22718. CGTS_STATUS_REG__SA1_QUAD1_MGCG_ENABLED_MASK
  22719. CGTS_STATUS_REG__SA1_QUAD1_MGCG_ENABLED__SHIFT
  22720. CGTS_SYS_TCC_DISABLE
  22721. CGTS_TCC_DISABLE
  22722. CGTS_TCC_DISABLE__HI_TCC_DISABLE_MASK
  22723. CGTS_TCC_DISABLE__HI_TCC_DISABLE__SHIFT
  22724. CGTS_TCC_DISABLE__TCC_DISABLE_MASK
  22725. CGTS_TCC_DISABLE__TCC_DISABLE__SHIFT
  22726. CGTS_USER_SYS_TCC_DISABLE
  22727. CGTS_USER_TCC_DISABLE
  22728. CGTS_USER_TCC_DISABLE__HI_TCC_DISABLE_MASK
  22729. CGTS_USER_TCC_DISABLE__HI_TCC_DISABLE__SHIFT
  22730. CGTS_USER_TCC_DISABLE__TCC_DISABLE_MASK
  22731. CGTS_USER_TCC_DISABLE__TCC_DISABLE__SHIFT
  22732. CGTT_BCI_CLK_CTRL__CORE0_OVERRIDE_MASK
  22733. CGTT_BCI_CLK_CTRL__CORE0_OVERRIDE__SHIFT
  22734. CGTT_BCI_CLK_CTRL__CORE1_OVERRIDE_MASK
  22735. CGTT_BCI_CLK_CTRL__CORE1_OVERRIDE__SHIFT
  22736. CGTT_BCI_CLK_CTRL__CORE2_OVERRIDE_MASK
  22737. CGTT_BCI_CLK_CTRL__CORE2_OVERRIDE__SHIFT
  22738. CGTT_BCI_CLK_CTRL__CORE3_OVERRIDE_MASK
  22739. CGTT_BCI_CLK_CTRL__CORE3_OVERRIDE__SHIFT
  22740. CGTT_BCI_CLK_CTRL__CORE4_OVERRIDE_MASK
  22741. CGTT_BCI_CLK_CTRL__CORE4_OVERRIDE__SHIFT
  22742. CGTT_BCI_CLK_CTRL__CORE5_OVERRIDE_MASK
  22743. CGTT_BCI_CLK_CTRL__CORE5_OVERRIDE__SHIFT
  22744. CGTT_BCI_CLK_CTRL__CORE6_OVERRIDE_MASK
  22745. CGTT_BCI_CLK_CTRL__CORE6_OVERRIDE__SHIFT
  22746. CGTT_BCI_CLK_CTRL__OFF_HYSTERESIS_MASK
  22747. CGTT_BCI_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  22748. CGTT_BCI_CLK_CTRL__ON_DELAY_MASK
  22749. CGTT_BCI_CLK_CTRL__ON_DELAY__SHIFT
  22750. CGTT_BCI_CLK_CTRL__REG_OVERRIDE_MASK
  22751. CGTT_BCI_CLK_CTRL__REG_OVERRIDE__SHIFT
  22752. CGTT_BCI_CLK_CTRL__RESERVED_MASK
  22753. CGTT_BCI_CLK_CTRL__RESERVED__SHIFT
  22754. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  22755. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  22756. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  22757. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  22758. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  22759. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  22760. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  22761. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  22762. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  22763. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  22764. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  22765. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  22766. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  22767. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  22768. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  22769. CGTT_BCI_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  22770. CGTT_CHA_CLK_CTRL__MGLS_OVERRIDE_MASK
  22771. CGTT_CHA_CLK_CTRL__MGLS_OVERRIDE__SHIFT
  22772. CGTT_CHA_CLK_CTRL__OFF_HYSTERESIS_MASK
  22773. CGTT_CHA_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  22774. CGTT_CHA_CLK_CTRL__ON_DELAY_MASK
  22775. CGTT_CHA_CLK_CTRL__ON_DELAY__SHIFT
  22776. CGTT_CHA_CLK_CTRL__RESERVED_MASK
  22777. CGTT_CHA_CLK_CTRL__RESERVED__SHIFT
  22778. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE0_MASK
  22779. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  22780. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE1_MASK
  22781. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  22782. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE2_MASK
  22783. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  22784. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE3_MASK
  22785. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  22786. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE4_MASK
  22787. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  22788. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE5_MASK
  22789. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  22790. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE6_MASK
  22791. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  22792. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE7_MASK
  22793. CGTT_CHA_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  22794. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  22795. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  22796. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  22797. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  22798. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  22799. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  22800. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  22801. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  22802. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  22803. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  22804. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  22805. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  22806. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  22807. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  22808. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  22809. CGTT_CHA_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  22810. CGTT_CHCG_CLK_CTRL__MGLS_OVERRIDE_MASK
  22811. CGTT_CHCG_CLK_CTRL__MGLS_OVERRIDE__SHIFT
  22812. CGTT_CHCG_CLK_CTRL__OFF_HYSTERESIS_MASK
  22813. CGTT_CHCG_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  22814. CGTT_CHCG_CLK_CTRL__ON_DELAY_MASK
  22815. CGTT_CHCG_CLK_CTRL__ON_DELAY__SHIFT
  22816. CGTT_CHCG_CLK_CTRL__RESERVED_MASK
  22817. CGTT_CHCG_CLK_CTRL__RESERVED__SHIFT
  22818. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE0_MASK
  22819. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  22820. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE1_MASK
  22821. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  22822. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE2_MASK
  22823. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  22824. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE3_MASK
  22825. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  22826. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE4_MASK
  22827. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  22828. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE5_MASK
  22829. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  22830. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE6_MASK
  22831. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  22832. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE7_MASK
  22833. CGTT_CHCG_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  22834. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  22835. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  22836. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  22837. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  22838. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  22839. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  22840. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  22841. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  22842. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  22843. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  22844. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  22845. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  22846. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  22847. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  22848. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  22849. CGTT_CHCG_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  22850. CGTT_CHC_CLK_CTRL__MGLS_OVERRIDE_MASK
  22851. CGTT_CHC_CLK_CTRL__MGLS_OVERRIDE__SHIFT
  22852. CGTT_CHC_CLK_CTRL__OFF_HYSTERESIS_MASK
  22853. CGTT_CHC_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  22854. CGTT_CHC_CLK_CTRL__ON_DELAY_MASK
  22855. CGTT_CHC_CLK_CTRL__ON_DELAY__SHIFT
  22856. CGTT_CHC_CLK_CTRL__RESERVED_MASK
  22857. CGTT_CHC_CLK_CTRL__RESERVED__SHIFT
  22858. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE0_MASK
  22859. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  22860. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE1_MASK
  22861. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  22862. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE2_MASK
  22863. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  22864. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE3_MASK
  22865. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  22866. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE4_MASK
  22867. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  22868. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE5_MASK
  22869. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  22870. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE6_MASK
  22871. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  22872. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE7_MASK
  22873. CGTT_CHC_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  22874. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  22875. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  22876. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  22877. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  22878. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  22879. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  22880. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  22881. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  22882. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  22883. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  22884. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  22885. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  22886. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  22887. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  22888. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  22889. CGTT_CHC_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  22890. CGTT_CPC_CLK_CTRL__MGLS_OVERRIDE_MASK
  22891. CGTT_CPC_CLK_CTRL__MGLS_OVERRIDE__SHIFT
  22892. CGTT_CPC_CLK_CTRL__OFF_HYSTERESIS_MASK
  22893. CGTT_CPC_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  22894. CGTT_CPC_CLK_CTRL__ON_DELAY_MASK
  22895. CGTT_CPC_CLK_CTRL__ON_DELAY__SHIFT
  22896. CGTT_CPC_CLK_CTRL__SOFT_OVERRIDE_DYN_MASK
  22897. CGTT_CPC_CLK_CTRL__SOFT_OVERRIDE_DYN__SHIFT
  22898. CGTT_CPC_CLK_CTRL__SOFT_OVERRIDE_PERFMON_MASK
  22899. CGTT_CPC_CLK_CTRL__SOFT_OVERRIDE_PERFMON__SHIFT
  22900. CGTT_CPC_CLK_CTRL__SOFT_OVERRIDE_REG_MASK
  22901. CGTT_CPC_CLK_CTRL__SOFT_OVERRIDE_REG__SHIFT
  22902. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  22903. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  22904. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  22905. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  22906. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  22907. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  22908. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  22909. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  22910. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  22911. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  22912. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  22913. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  22914. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  22915. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  22916. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  22917. CGTT_CPC_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  22918. CGTT_CPF_CLK_CTRL__MGLS_OVERRIDE_MASK
  22919. CGTT_CPF_CLK_CTRL__MGLS_OVERRIDE__SHIFT
  22920. CGTT_CPF_CLK_CTRL__OFF_HYSTERESIS_MASK
  22921. CGTT_CPF_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  22922. CGTT_CPF_CLK_CTRL__ON_DELAY_MASK
  22923. CGTT_CPF_CLK_CTRL__ON_DELAY__SHIFT
  22924. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_CMP_MASK
  22925. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_CMP__SHIFT
  22926. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_DYN_MASK
  22927. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_DYN__SHIFT
  22928. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_GFX_MASK
  22929. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_GFX__SHIFT
  22930. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_PERFMON_MASK
  22931. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_PERFMON__SHIFT
  22932. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_PRT_MASK
  22933. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_PRT__SHIFT
  22934. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_REG_MASK
  22935. CGTT_CPF_CLK_CTRL__SOFT_OVERRIDE_REG__SHIFT
  22936. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  22937. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  22938. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  22939. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  22940. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  22941. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  22942. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  22943. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  22944. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  22945. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  22946. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  22947. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  22948. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  22949. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  22950. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  22951. CGTT_CPF_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  22952. CGTT_CP_CLK_CTRL__MGLS_OVERRIDE_MASK
  22953. CGTT_CP_CLK_CTRL__MGLS_OVERRIDE__SHIFT
  22954. CGTT_CP_CLK_CTRL__OFF_HYSTERESIS_MASK
  22955. CGTT_CP_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  22956. CGTT_CP_CLK_CTRL__ON_DELAY_MASK
  22957. CGTT_CP_CLK_CTRL__ON_DELAY__SHIFT
  22958. CGTT_CP_CLK_CTRL__SOFT_OVERRIDE_DYN_MASK
  22959. CGTT_CP_CLK_CTRL__SOFT_OVERRIDE_DYN__SHIFT
  22960. CGTT_CP_CLK_CTRL__SOFT_OVERRIDE_PERFMON_MASK
  22961. CGTT_CP_CLK_CTRL__SOFT_OVERRIDE_PERFMON__SHIFT
  22962. CGTT_CP_CLK_CTRL__SOFT_OVERRIDE_REG_MASK
  22963. CGTT_CP_CLK_CTRL__SOFT_OVERRIDE_REG__SHIFT
  22964. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  22965. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  22966. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  22967. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  22968. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  22969. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  22970. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  22971. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  22972. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  22973. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  22974. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  22975. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  22976. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  22977. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  22978. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  22979. CGTT_CP_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  22980. CGTT_DRM_CLK_CTRL0__DIV_ID_MASK
  22981. CGTT_DRM_CLK_CTRL0__DIV_ID__SHIFT
  22982. CGTT_DRM_CLK_CTRL0__OFF_HYSTERESIS_MASK
  22983. CGTT_DRM_CLK_CTRL0__OFF_HYSTERESIS__SHIFT
  22984. CGTT_DRM_CLK_CTRL0__ON_DELAY_MASK
  22985. CGTT_DRM_CLK_CTRL0__ON_DELAY__SHIFT
  22986. CGTT_DRM_CLK_CTRL0__RAMP_DIS_CLK_0_MASK
  22987. CGTT_DRM_CLK_CTRL0__RAMP_DIS_CLK_0__SHIFT
  22988. CGTT_DRM_CLK_CTRL0__RAMP_DIS_CLK_REG_MASK
  22989. CGTT_DRM_CLK_CTRL0__RAMP_DIS_CLK_REG__SHIFT
  22990. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE0_MASK
  22991. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE0__SHIFT
  22992. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE1_MASK
  22993. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE1__SHIFT
  22994. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE2_MASK
  22995. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE2__SHIFT
  22996. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE3_MASK
  22997. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE3__SHIFT
  22998. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE4_MASK
  22999. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE4__SHIFT
  23000. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE5_MASK
  23001. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE5__SHIFT
  23002. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE6_MASK
  23003. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE6__SHIFT
  23004. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE7_MASK
  23005. CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE7__SHIFT
  23006. CGTT_GDS_CLK_CTRL__OFF_HYSTERESIS_MASK
  23007. CGTT_GDS_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23008. CGTT_GDS_CLK_CTRL__ON_DELAY_MASK
  23009. CGTT_GDS_CLK_CTRL__ON_DELAY__SHIFT
  23010. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE0_MASK
  23011. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  23012. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE1_MASK
  23013. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  23014. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23015. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23016. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23017. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23018. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23019. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23020. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23021. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23022. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23023. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23024. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23025. CGTT_GDS_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23026. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23027. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23028. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23029. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23030. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23031. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23032. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23033. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23034. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23035. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23036. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23037. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23038. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23039. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23040. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23041. CGTT_GDS_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23042. CGTT_GDS_CLK_CTRL__UNUSED_MASK
  23043. CGTT_GDS_CLK_CTRL__UNUSED__SHIFT
  23044. CGTT_GL1A_CLK_CTRL__MGLS_OVERRIDE_MASK
  23045. CGTT_GL1A_CLK_CTRL__MGLS_OVERRIDE__SHIFT
  23046. CGTT_GL1A_CLK_CTRL__OFF_HYSTERESIS_MASK
  23047. CGTT_GL1A_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23048. CGTT_GL1A_CLK_CTRL__ON_DELAY_MASK
  23049. CGTT_GL1A_CLK_CTRL__ON_DELAY__SHIFT
  23050. CGTT_GL1A_CLK_CTRL__RESERVED_MASK
  23051. CGTT_GL1A_CLK_CTRL__RESERVED__SHIFT
  23052. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE0_MASK
  23053. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  23054. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE1_MASK
  23055. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  23056. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23057. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23058. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23059. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23060. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23061. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23062. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23063. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23064. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23065. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23066. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23067. CGTT_GL1A_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23068. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23069. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23070. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23071. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23072. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23073. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23074. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23075. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23076. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23077. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23078. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23079. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23080. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23081. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23082. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23083. CGTT_GL1A_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23084. CGTT_GL1C_CLK_CTRL__MGLS_OVERRIDE_MASK
  23085. CGTT_GL1C_CLK_CTRL__MGLS_OVERRIDE__SHIFT
  23086. CGTT_GL1C_CLK_CTRL__OFF_HYSTERESIS_MASK
  23087. CGTT_GL1C_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23088. CGTT_GL1C_CLK_CTRL__ON_DELAY_MASK
  23089. CGTT_GL1C_CLK_CTRL__ON_DELAY__SHIFT
  23090. CGTT_GL1C_CLK_CTRL__RESERVED_MASK
  23091. CGTT_GL1C_CLK_CTRL__RESERVED__SHIFT
  23092. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE0_MASK
  23093. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  23094. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE1_MASK
  23095. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  23096. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23097. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23098. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23099. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23100. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23101. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23102. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23103. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23104. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23105. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23106. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23107. CGTT_GL1C_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23108. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23109. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23110. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23111. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23112. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23113. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23114. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23115. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23116. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23117. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23118. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23119. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23120. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23121. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23122. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23123. CGTT_GL1C_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23124. CGTT_GS_NGG_CLK_CTRL__DBG_ENABLE_MASK
  23125. CGTT_GS_NGG_CLK_CTRL__DBG_ENABLE__SHIFT
  23126. CGTT_GS_NGG_CLK_CTRL__GS0_OVERRIDE_MASK
  23127. CGTT_GS_NGG_CLK_CTRL__GS0_OVERRIDE__SHIFT
  23128. CGTT_GS_NGG_CLK_CTRL__GS1_OVERRIDE_MASK
  23129. CGTT_GS_NGG_CLK_CTRL__GS1_OVERRIDE__SHIFT
  23130. CGTT_GS_NGG_CLK_CTRL__OFF_HYSTERESIS_MASK
  23131. CGTT_GS_NGG_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23132. CGTT_GS_NGG_CLK_CTRL__ON_DELAY_MASK
  23133. CGTT_GS_NGG_CLK_CTRL__ON_DELAY__SHIFT
  23134. CGTT_GS_NGG_CLK_CTRL__PERF_ENABLE_MASK
  23135. CGTT_GS_NGG_CLK_CTRL__PERF_ENABLE__SHIFT
  23136. CGTT_GS_NGG_CLK_CTRL__PRIMGEN_OVERRIDE_MASK
  23137. CGTT_GS_NGG_CLK_CTRL__PRIMGEN_OVERRIDE__SHIFT
  23138. CGTT_GS_NGG_CLK_CTRL__RBIU_INPUT_OVERRIDE_MASK
  23139. CGTT_GS_NGG_CLK_CTRL__RBIU_INPUT_OVERRIDE__SHIFT
  23140. CGTT_GS_NGG_CLK_CTRL__REG_OVERRIDE_MASK
  23141. CGTT_GS_NGG_CLK_CTRL__REG_OVERRIDE__SHIFT
  23142. CGTT_GS_NGG_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23143. CGTT_GS_NGG_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23144. CGTT_GS_NGG_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23145. CGTT_GS_NGG_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23146. CGTT_GS_NGG_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23147. CGTT_GS_NGG_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23148. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23149. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23150. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23151. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23152. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23153. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23154. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23155. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23156. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23157. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23158. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23159. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23160. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23161. CGTT_GS_NGG_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23162. CGTT_IA_CLK_CTRL__CORE_OVERRIDE_MASK
  23163. CGTT_IA_CLK_CTRL__CORE_OVERRIDE__SHIFT
  23164. CGTT_IA_CLK_CTRL__DBG_ENABLE_MASK
  23165. CGTT_IA_CLK_CTRL__DBG_ENABLE__SHIFT
  23166. CGTT_IA_CLK_CTRL__OFF_HYSTERESIS_MASK
  23167. CGTT_IA_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23168. CGTT_IA_CLK_CTRL__ON_DELAY_MASK
  23169. CGTT_IA_CLK_CTRL__ON_DELAY__SHIFT
  23170. CGTT_IA_CLK_CTRL__PERF_ENABLE_MASK
  23171. CGTT_IA_CLK_CTRL__PERF_ENABLE__SHIFT
  23172. CGTT_IA_CLK_CTRL__REG_OVERRIDE_MASK
  23173. CGTT_IA_CLK_CTRL__REG_OVERRIDE__SHIFT
  23174. CGTT_IA_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23175. CGTT_IA_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23176. CGTT_IA_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23177. CGTT_IA_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23178. CGTT_IA_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23179. CGTT_IA_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23180. CGTT_IA_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23181. CGTT_IA_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23182. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23183. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23184. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23185. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23186. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23187. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23188. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23189. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23190. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23191. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23192. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23193. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23194. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23195. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23196. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23197. CGTT_IA_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23198. CGTT_PA_CLK_CTRL__CL_CLK_OVERRIDE_MASK
  23199. CGTT_PA_CLK_CTRL__CL_CLK_OVERRIDE__SHIFT
  23200. CGTT_PA_CLK_CTRL__DEBUG_BUS_EN_MASK
  23201. CGTT_PA_CLK_CTRL__DEBUG_BUS_EN__SHIFT
  23202. CGTT_PA_CLK_CTRL__OFF_HYSTERESIS_MASK
  23203. CGTT_PA_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23204. CGTT_PA_CLK_CTRL__ON_DELAY_MASK
  23205. CGTT_PA_CLK_CTRL__ON_DELAY__SHIFT
  23206. CGTT_PA_CLK_CTRL__REG_CLK_OVERRIDE_MASK
  23207. CGTT_PA_CLK_CTRL__REG_CLK_OVERRIDE__SHIFT
  23208. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23209. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23210. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23211. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23212. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23213. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23214. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23215. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23216. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23217. CGTT_PA_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23218. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23219. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23220. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23221. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23222. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23223. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23224. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23225. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23226. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23227. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23228. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23229. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23230. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23231. CGTT_PA_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23232. CGTT_PA_CLK_CTRL__SU_CLK_OVERRIDE_MASK
  23233. CGTT_PA_CLK_CTRL__SU_CLK_OVERRIDE__SHIFT
  23234. CGTT_PC_CLK_CTRL__BACK_CLK_ON_OVERRIDE_MASK
  23235. CGTT_PC_CLK_CTRL__BACK_CLK_ON_OVERRIDE__SHIFT
  23236. CGTT_PC_CLK_CTRL__CORE0_OVERRIDE_MASK
  23237. CGTT_PC_CLK_CTRL__CORE0_OVERRIDE__SHIFT
  23238. CGTT_PC_CLK_CTRL__CORE1_OVERRIDE_MASK
  23239. CGTT_PC_CLK_CTRL__CORE1_OVERRIDE__SHIFT
  23240. CGTT_PC_CLK_CTRL__CORE2_OVERRIDE_MASK
  23241. CGTT_PC_CLK_CTRL__CORE2_OVERRIDE__SHIFT
  23242. CGTT_PC_CLK_CTRL__CORE3_OVERRIDE_MASK
  23243. CGTT_PC_CLK_CTRL__CORE3_OVERRIDE__SHIFT
  23244. CGTT_PC_CLK_CTRL__FRONT_CLK_ON_OVERRIDE_MASK
  23245. CGTT_PC_CLK_CTRL__FRONT_CLK_ON_OVERRIDE__SHIFT
  23246. CGTT_PC_CLK_CTRL__GRP5_CG_OFF_HYST_MASK
  23247. CGTT_PC_CLK_CTRL__GRP5_CG_OFF_HYST__SHIFT
  23248. CGTT_PC_CLK_CTRL__GRP5_CG_OVERRIDE_MASK
  23249. CGTT_PC_CLK_CTRL__GRP5_CG_OVERRIDE__SHIFT
  23250. CGTT_PC_CLK_CTRL__OFF_HYSTERESIS_MASK
  23251. CGTT_PC_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23252. CGTT_PC_CLK_CTRL__ON_DELAY_MASK
  23253. CGTT_PC_CLK_CTRL__ON_DELAY__SHIFT
  23254. CGTT_PC_CLK_CTRL__PC_RAM_FGCG_OVERRIDE_MASK
  23255. CGTT_PC_CLK_CTRL__PC_RAM_FGCG_OVERRIDE__SHIFT
  23256. CGTT_PC_CLK_CTRL__PC_READ_CLK_EN_OVERRIDE_MASK
  23257. CGTT_PC_CLK_CTRL__PC_READ_CLK_EN_OVERRIDE__SHIFT
  23258. CGTT_PC_CLK_CTRL__PC_WRITE_CLK_EN_OVERRIDE_MASK
  23259. CGTT_PC_CLK_CTRL__PC_WRITE_CLK_EN_OVERRIDE__SHIFT
  23260. CGTT_PC_CLK_CTRL__REG_OVERRIDE_MASK
  23261. CGTT_PC_CLK_CTRL__REG_OVERRIDE__SHIFT
  23262. CGTT_PH_CLK_CTRL0__OFF_HYSTERESIS_MASK
  23263. CGTT_PH_CLK_CTRL0__OFF_HYSTERESIS__SHIFT
  23264. CGTT_PH_CLK_CTRL0__ON_DELAY_MASK
  23265. CGTT_PH_CLK_CTRL0__ON_DELAY__SHIFT
  23266. CGTT_PH_CLK_CTRL0__PERFMON_CLK_OVERRIDE_MASK
  23267. CGTT_PH_CLK_CTRL0__PERFMON_CLK_OVERRIDE__SHIFT
  23268. CGTT_PH_CLK_CTRL0__REG_CLK_OVERRIDE_MASK
  23269. CGTT_PH_CLK_CTRL0__REG_CLK_OVERRIDE__SHIFT
  23270. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE2_MASK
  23271. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE2__SHIFT
  23272. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE3_MASK
  23273. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE3__SHIFT
  23274. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE4_MASK
  23275. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE4__SHIFT
  23276. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE5_MASK
  23277. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE5__SHIFT
  23278. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE6_MASK
  23279. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE6__SHIFT
  23280. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE7_MASK
  23281. CGTT_PH_CLK_CTRL0__SOFT_OVERRIDE7__SHIFT
  23282. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE1_MASK
  23283. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE1__SHIFT
  23284. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE2_MASK
  23285. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE2__SHIFT
  23286. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE3_MASK
  23287. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE3__SHIFT
  23288. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE4_MASK
  23289. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE4__SHIFT
  23290. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE5_MASK
  23291. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE5__SHIFT
  23292. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE6_MASK
  23293. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE6__SHIFT
  23294. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE7_MASK
  23295. CGTT_PH_CLK_CTRL0__SOFT_STALL_OVERRIDE7__SHIFT
  23296. CGTT_PH_CLK_CTRL1__OFF_HYSTERESIS_MASK
  23297. CGTT_PH_CLK_CTRL1__OFF_HYSTERESIS__SHIFT
  23298. CGTT_PH_CLK_CTRL1__ON_DELAY_MASK
  23299. CGTT_PH_CLK_CTRL1__ON_DELAY__SHIFT
  23300. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE1_MASK
  23301. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE1__SHIFT
  23302. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE2_MASK
  23303. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE2__SHIFT
  23304. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE3_MASK
  23305. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE3__SHIFT
  23306. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE4_MASK
  23307. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE4__SHIFT
  23308. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE5_MASK
  23309. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE5__SHIFT
  23310. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE6_MASK
  23311. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE6__SHIFT
  23312. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE7_MASK
  23313. CGTT_PH_CLK_CTRL1__SOFT_OVERRIDE7__SHIFT
  23314. CGTT_PH_CLK_CTRL2__OFF_HYSTERESIS_MASK
  23315. CGTT_PH_CLK_CTRL2__OFF_HYSTERESIS__SHIFT
  23316. CGTT_PH_CLK_CTRL2__ON_DELAY_MASK
  23317. CGTT_PH_CLK_CTRL2__ON_DELAY__SHIFT
  23318. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE1_MASK
  23319. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE1__SHIFT
  23320. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE2_MASK
  23321. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE2__SHIFT
  23322. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE3_MASK
  23323. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE3__SHIFT
  23324. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE4_MASK
  23325. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE4__SHIFT
  23326. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE5_MASK
  23327. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE5__SHIFT
  23328. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE6_MASK
  23329. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE6__SHIFT
  23330. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE7_MASK
  23331. CGTT_PH_CLK_CTRL2__SOFT_OVERRIDE7__SHIFT
  23332. CGTT_PH_CLK_CTRL3__OFF_HYSTERESIS_MASK
  23333. CGTT_PH_CLK_CTRL3__OFF_HYSTERESIS__SHIFT
  23334. CGTT_PH_CLK_CTRL3__ON_DELAY_MASK
  23335. CGTT_PH_CLK_CTRL3__ON_DELAY__SHIFT
  23336. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE1_MASK
  23337. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE1__SHIFT
  23338. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE2_MASK
  23339. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE2__SHIFT
  23340. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE3_MASK
  23341. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE3__SHIFT
  23342. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE4_MASK
  23343. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE4__SHIFT
  23344. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE5_MASK
  23345. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE5__SHIFT
  23346. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE6_MASK
  23347. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE6__SHIFT
  23348. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE7_MASK
  23349. CGTT_PH_CLK_CTRL3__SOFT_OVERRIDE7__SHIFT
  23350. CGTT_RLC_CLK_CTRL__OFF_HYSTERESIS_MASK
  23351. CGTT_RLC_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23352. CGTT_RLC_CLK_CTRL__ON_DELAY_MASK
  23353. CGTT_RLC_CLK_CTRL__ON_DELAY__SHIFT
  23354. CGTT_RLC_CLK_CTRL__RESERVED_MASK
  23355. CGTT_RLC_CLK_CTRL__RESERVED__SHIFT
  23356. CGTT_RLC_CLK_CTRL__SOFT_OVERRIDE_DYN_MASK
  23357. CGTT_RLC_CLK_CTRL__SOFT_OVERRIDE_DYN__SHIFT
  23358. CGTT_RLC_CLK_CTRL__SOFT_OVERRIDE_REG_MASK
  23359. CGTT_RLC_CLK_CTRL__SOFT_OVERRIDE_REG__SHIFT
  23360. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23361. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23362. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23363. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23364. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23365. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23366. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23367. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23368. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23369. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23370. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23371. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23372. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23373. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23374. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23375. CGTT_RLC_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23376. CGTT_ROM_CLK_CTRL0__OFF_HYSTERESIS_MASK
  23377. CGTT_ROM_CLK_CTRL0__OFF_HYSTERESIS__SHIFT
  23378. CGTT_ROM_CLK_CTRL0__ON_DELAY_MASK
  23379. CGTT_ROM_CLK_CTRL0__ON_DELAY__SHIFT
  23380. CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE0_MASK
  23381. CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE0__SHIFT
  23382. CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE1_MASK
  23383. CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE1__SHIFT
  23384. CGTT_SC_CLK_CTRL0__OFF_HYSTERESIS_MASK
  23385. CGTT_SC_CLK_CTRL0__OFF_HYSTERESIS__SHIFT
  23386. CGTT_SC_CLK_CTRL0__ON_DELAY_MASK
  23387. CGTT_SC_CLK_CTRL0__ON_DELAY__SHIFT
  23388. CGTT_SC_CLK_CTRL0__PFF_ZFF_MEM_CLK_OVERRIDE_MASK
  23389. CGTT_SC_CLK_CTRL0__PFF_ZFF_MEM_CLK_OVERRIDE__SHIFT
  23390. CGTT_SC_CLK_CTRL0__PFF_ZFF_MEM_CLK_STALL_OVERRIDE_MASK
  23391. CGTT_SC_CLK_CTRL0__PFF_ZFF_MEM_CLK_STALL_OVERRIDE__SHIFT
  23392. CGTT_SC_CLK_CTRL0__REG_CLK_OVERRIDE_MASK
  23393. CGTT_SC_CLK_CTRL0__REG_CLK_OVERRIDE__SHIFT
  23394. CGTT_SC_CLK_CTRL0__REG_CLK_STALL_OVERRIDE_MASK
  23395. CGTT_SC_CLK_CTRL0__REG_CLK_STALL_OVERRIDE__SHIFT
  23396. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE0_MASK
  23397. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE0__SHIFT
  23398. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE1_MASK
  23399. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE1__SHIFT
  23400. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE2_MASK
  23401. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE2__SHIFT
  23402. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE3_MASK
  23403. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE3__SHIFT
  23404. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE4_MASK
  23405. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE4__SHIFT
  23406. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE5_MASK
  23407. CGTT_SC_CLK_CTRL0__SOFT_OVERRIDE5__SHIFT
  23408. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE0_MASK
  23409. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE0__SHIFT
  23410. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE1_MASK
  23411. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE1__SHIFT
  23412. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE2_MASK
  23413. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE2__SHIFT
  23414. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE3_MASK
  23415. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE3__SHIFT
  23416. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE4_MASK
  23417. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE4__SHIFT
  23418. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE5_MASK
  23419. CGTT_SC_CLK_CTRL0__SOFT_STALL_OVERRIDE5__SHIFT
  23420. CGTT_SC_CLK_CTRL1__OFF_HYSTERESIS_MASK
  23421. CGTT_SC_CLK_CTRL1__OFF_HYSTERESIS__SHIFT
  23422. CGTT_SC_CLK_CTRL1__ON_DELAY_MASK
  23423. CGTT_SC_CLK_CTRL1__ON_DELAY__SHIFT
  23424. CGTT_SC_CLK_CTRL1__OTHER_SPECIAL_SC_REG_CLK_OVERRIDE_MASK
  23425. CGTT_SC_CLK_CTRL1__OTHER_SPECIAL_SC_REG_CLK_OVERRIDE__SHIFT
  23426. CGTT_SC_CLK_CTRL1__OTHER_SPECIAL_SC_REG_CLK_STALL_OVERRIDE_MASK
  23427. CGTT_SC_CLK_CTRL1__OTHER_SPECIAL_SC_REG_CLK_STALL_OVERRIDE__SHIFT
  23428. CGTT_SC_CLK_CTRL1__PBB_BINNING_CLK_OVERRIDE0_MASK
  23429. CGTT_SC_CLK_CTRL1__PBB_BINNING_CLK_OVERRIDE0__SHIFT
  23430. CGTT_SC_CLK_CTRL1__PBB_BINNING_CLK_OVERRIDE_MASK
  23431. CGTT_SC_CLK_CTRL1__PBB_BINNING_CLK_OVERRIDE__SHIFT
  23432. CGTT_SC_CLK_CTRL1__PBB_BINNING_CLK_STALL_OVERRIDE0_MASK
  23433. CGTT_SC_CLK_CTRL1__PBB_BINNING_CLK_STALL_OVERRIDE0__SHIFT
  23434. CGTT_SC_CLK_CTRL1__PBB_BINNING_CLK_STALL_OVERRIDE_MASK
  23435. CGTT_SC_CLK_CTRL1__PBB_BINNING_CLK_STALL_OVERRIDE__SHIFT
  23436. CGTT_SC_CLK_CTRL1__PBB_CLK_OVERRIDE_MASK
  23437. CGTT_SC_CLK_CTRL1__PBB_CLK_OVERRIDE__SHIFT
  23438. CGTT_SC_CLK_CTRL1__PBB_CLK_STALL_OVERRIDE_MASK
  23439. CGTT_SC_CLK_CTRL1__PBB_CLK_STALL_OVERRIDE__SHIFT
  23440. CGTT_SC_CLK_CTRL1__PBB_SCISSOR_CLK_OVERRIDE_MASK
  23441. CGTT_SC_CLK_CTRL1__PBB_SCISSOR_CLK_OVERRIDE__SHIFT
  23442. CGTT_SC_CLK_CTRL1__PBB_SCISSOR_CLK_STALL_OVERRIDE_MASK
  23443. CGTT_SC_CLK_CTRL1__PBB_SCISSOR_CLK_STALL_OVERRIDE__SHIFT
  23444. CGTT_SC_CLK_CTRL1__PBB_WARP_CLK_OVERRIDE_MASK
  23445. CGTT_SC_CLK_CTRL1__PBB_WARP_CLK_OVERRIDE__SHIFT
  23446. CGTT_SC_CLK_CTRL1__PBB_WARP_CLK_STALL_OVERRIDE_MASK
  23447. CGTT_SC_CLK_CTRL1__PBB_WARP_CLK_STALL_OVERRIDE__SHIFT
  23448. CGTT_SC_CLK_CTRL1__SCREEN_EXT_REG_CLK_OVERRIDE_MASK
  23449. CGTT_SC_CLK_CTRL1__SCREEN_EXT_REG_CLK_OVERRIDE__SHIFT
  23450. CGTT_SC_CLK_CTRL1__SCREEN_EXT_REG_CLK_STALL_OVERRIDE_MASK
  23451. CGTT_SC_CLK_CTRL1__SCREEN_EXT_REG_CLK_STALL_OVERRIDE__SHIFT
  23452. CGTT_SC_CLK_CTRL1__VPORT_REG_MEM_CLK_OVERRIDE_MASK
  23453. CGTT_SC_CLK_CTRL1__VPORT_REG_MEM_CLK_OVERRIDE__SHIFT
  23454. CGTT_SC_CLK_CTRL1__VPORT_REG_MEM_CLK_STALL_OVERRIDE_MASK
  23455. CGTT_SC_CLK_CTRL1__VPORT_REG_MEM_CLK_STALL_OVERRIDE__SHIFT
  23456. CGTT_SC_CLK_CTRL2__DBR_CLK_OVERRIDE_MASK
  23457. CGTT_SC_CLK_CTRL2__DBR_CLK_OVERRIDE__SHIFT
  23458. CGTT_SC_CLK_CTRL2__OFF_HYSTERESIS_MASK
  23459. CGTT_SC_CLK_CTRL2__OFF_HYSTERESIS__SHIFT
  23460. CGTT_SC_CLK_CTRL2__ON_DELAY_MASK
  23461. CGTT_SC_CLK_CTRL2__ON_DELAY__SHIFT
  23462. CGTT_SC_CLK_CTRL2__PA_SC_INTF_CLK_OVERRIDE_MASK
  23463. CGTT_SC_CLK_CTRL2__PA_SC_INTF_CLK_OVERRIDE__SHIFT
  23464. CGTT_SC_CLK_CTRL2__SCF_SCB_INTF_CLK_OVERRIDE_MASK
  23465. CGTT_SC_CLK_CTRL2__SCF_SCB_INTF_CLK_OVERRIDE__SHIFT
  23466. CGTT_SC_CLK_CTRL2__SC_DB_INTF_CLK_OVERRIDE_MASK
  23467. CGTT_SC_CLK_CTRL2__SC_DB_INTF_CLK_OVERRIDE__SHIFT
  23468. CGTT_SC_CLK_CTRL2__SC_PKR_INTF_CLK_OVERRIDE_MASK
  23469. CGTT_SC_CLK_CTRL2__SC_PKR_INTF_CLK_OVERRIDE__SHIFT
  23470. CGTT_SC_CLK_CTRL__OFF_HYSTERESIS_MASK
  23471. CGTT_SC_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23472. CGTT_SC_CLK_CTRL__ON_DELAY_MASK
  23473. CGTT_SC_CLK_CTRL__ON_DELAY__SHIFT
  23474. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE0_MASK
  23475. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  23476. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE1_MASK
  23477. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  23478. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23479. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23480. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23481. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23482. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23483. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23484. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23485. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23486. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23487. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23488. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23489. CGTT_SC_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23490. CGTT_SPIS_CLK_CTRL__GRP0_OVERRIDE_MASK
  23491. CGTT_SPIS_CLK_CTRL__GRP0_OVERRIDE__SHIFT
  23492. CGTT_SPIS_CLK_CTRL__GRP1_OVERRIDE_MASK
  23493. CGTT_SPIS_CLK_CTRL__GRP1_OVERRIDE__SHIFT
  23494. CGTT_SPIS_CLK_CTRL__GRP2_OVERRIDE_MASK
  23495. CGTT_SPIS_CLK_CTRL__GRP2_OVERRIDE__SHIFT
  23496. CGTT_SPIS_CLK_CTRL__GRP3_OVERRIDE_MASK
  23497. CGTT_SPIS_CLK_CTRL__GRP3_OVERRIDE__SHIFT
  23498. CGTT_SPIS_CLK_CTRL__GRP4_OVERRIDE_MASK
  23499. CGTT_SPIS_CLK_CTRL__GRP4_OVERRIDE__SHIFT
  23500. CGTT_SPIS_CLK_CTRL__GRP5_OVERRIDE_MASK
  23501. CGTT_SPIS_CLK_CTRL__GRP5_OVERRIDE__SHIFT
  23502. CGTT_SPIS_CLK_CTRL__GRP6_OVERRIDE_MASK
  23503. CGTT_SPIS_CLK_CTRL__GRP6_OVERRIDE__SHIFT
  23504. CGTT_SPIS_CLK_CTRL__OFF_HYSTERESIS_MASK
  23505. CGTT_SPIS_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23506. CGTT_SPIS_CLK_CTRL__ON_DELAY_MASK
  23507. CGTT_SPIS_CLK_CTRL__ON_DELAY__SHIFT
  23508. CGTT_SPIS_CLK_CTRL__REG_OVERRIDE_MASK
  23509. CGTT_SPIS_CLK_CTRL__REG_OVERRIDE__SHIFT
  23510. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23511. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23512. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23513. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23514. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23515. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23516. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23517. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23518. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23519. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23520. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23521. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23522. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23523. CGTT_SPIS_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23524. CGTT_SPI_CGTSSM_CLK_CTRL__GRP0_OVERRIDE_MASK
  23525. CGTT_SPI_CGTSSM_CLK_CTRL__GRP0_OVERRIDE__SHIFT
  23526. CGTT_SPI_CGTSSM_CLK_CTRL__GRP1_OVERRIDE_MASK
  23527. CGTT_SPI_CGTSSM_CLK_CTRL__GRP1_OVERRIDE__SHIFT
  23528. CGTT_SPI_CGTSSM_CLK_CTRL__GRP2_OVERRIDE_MASK
  23529. CGTT_SPI_CGTSSM_CLK_CTRL__GRP2_OVERRIDE__SHIFT
  23530. CGTT_SPI_CGTSSM_CLK_CTRL__GRP3_OVERRIDE_MASK
  23531. CGTT_SPI_CGTSSM_CLK_CTRL__GRP3_OVERRIDE__SHIFT
  23532. CGTT_SPI_CLK_CTRL__ALL_CLK_ON_OVERRIDE_MASK
  23533. CGTT_SPI_CLK_CTRL__ALL_CLK_ON_OVERRIDE__SHIFT
  23534. CGTT_SPI_CLK_CTRL__GRP0_OVERRIDE_MASK
  23535. CGTT_SPI_CLK_CTRL__GRP0_OVERRIDE__SHIFT
  23536. CGTT_SPI_CLK_CTRL__GRP1_OVERRIDE_MASK
  23537. CGTT_SPI_CLK_CTRL__GRP1_OVERRIDE__SHIFT
  23538. CGTT_SPI_CLK_CTRL__GRP2_OVERRIDE_MASK
  23539. CGTT_SPI_CLK_CTRL__GRP2_OVERRIDE__SHIFT
  23540. CGTT_SPI_CLK_CTRL__GRP3_OVERRIDE_MASK
  23541. CGTT_SPI_CLK_CTRL__GRP3_OVERRIDE__SHIFT
  23542. CGTT_SPI_CLK_CTRL__GRP4_OVERRIDE_MASK
  23543. CGTT_SPI_CLK_CTRL__GRP4_OVERRIDE__SHIFT
  23544. CGTT_SPI_CLK_CTRL__GRP5_CG_OFF_HYST_MASK
  23545. CGTT_SPI_CLK_CTRL__GRP5_CG_OFF_HYST__SHIFT
  23546. CGTT_SPI_CLK_CTRL__GRP5_CG_OVERRIDE_MASK
  23547. CGTT_SPI_CLK_CTRL__GRP5_CG_OVERRIDE__SHIFT
  23548. CGTT_SPI_CLK_CTRL__GRP5_OVERRIDE_MASK
  23549. CGTT_SPI_CLK_CTRL__GRP5_OVERRIDE__SHIFT
  23550. CGTT_SPI_CLK_CTRL__GRP6_OVERRIDE_MASK
  23551. CGTT_SPI_CLK_CTRL__GRP6_OVERRIDE__SHIFT
  23552. CGTT_SPI_CLK_CTRL__OFF_HYSTERESIS_MASK
  23553. CGTT_SPI_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23554. CGTT_SPI_CLK_CTRL__ON_DELAY_MASK
  23555. CGTT_SPI_CLK_CTRL__ON_DELAY__SHIFT
  23556. CGTT_SPI_CLK_CTRL__REG_OVERRIDE_MASK
  23557. CGTT_SPI_CLK_CTRL__REG_OVERRIDE__SHIFT
  23558. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23559. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23560. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23561. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23562. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23563. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23564. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23565. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23566. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23567. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23568. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23569. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23570. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23571. CGTT_SPI_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23572. CGTT_SPI_PS_CLK_CTRL__GRP0_OVERRIDE_MASK
  23573. CGTT_SPI_PS_CLK_CTRL__GRP0_OVERRIDE__SHIFT
  23574. CGTT_SPI_PS_CLK_CTRL__GRP1_OVERRIDE_MASK
  23575. CGTT_SPI_PS_CLK_CTRL__GRP1_OVERRIDE__SHIFT
  23576. CGTT_SPI_PS_CLK_CTRL__GRP2_OVERRIDE_MASK
  23577. CGTT_SPI_PS_CLK_CTRL__GRP2_OVERRIDE__SHIFT
  23578. CGTT_SPI_PS_CLK_CTRL__GRP3_OVERRIDE_MASK
  23579. CGTT_SPI_PS_CLK_CTRL__GRP3_OVERRIDE__SHIFT
  23580. CGTT_SPI_PS_CLK_CTRL__GRP4_OVERRIDE_MASK
  23581. CGTT_SPI_PS_CLK_CTRL__GRP4_OVERRIDE__SHIFT
  23582. CGTT_SPI_PS_CLK_CTRL__GRP5_OVERRIDE_MASK
  23583. CGTT_SPI_PS_CLK_CTRL__GRP5_OVERRIDE__SHIFT
  23584. CGTT_SPI_PS_CLK_CTRL__GRP6_OVERRIDE_MASK
  23585. CGTT_SPI_PS_CLK_CTRL__GRP6_OVERRIDE__SHIFT
  23586. CGTT_SPI_PS_CLK_CTRL__OFF_HYSTERESIS_MASK
  23587. CGTT_SPI_PS_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23588. CGTT_SPI_PS_CLK_CTRL__ON_DELAY_MASK
  23589. CGTT_SPI_PS_CLK_CTRL__ON_DELAY__SHIFT
  23590. CGTT_SPI_PS_CLK_CTRL__REG_OVERRIDE_MASK
  23591. CGTT_SPI_PS_CLK_CTRL__REG_OVERRIDE__SHIFT
  23592. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23593. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23594. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23595. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23596. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23597. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23598. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23599. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23600. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23601. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23602. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23603. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23604. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23605. CGTT_SPI_PS_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23606. CGTT_SQG_CLK_CTRL__CORE_OVERRIDE_MASK
  23607. CGTT_SQG_CLK_CTRL__CORE_OVERRIDE__SHIFT
  23608. CGTT_SQG_CLK_CTRL__OFF_HYSTERESIS_MASK
  23609. CGTT_SQG_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23610. CGTT_SQG_CLK_CTRL__ON_DELAY_MASK
  23611. CGTT_SQG_CLK_CTRL__ON_DELAY__SHIFT
  23612. CGTT_SQG_CLK_CTRL__PERFMON_OVERRIDE_MASK
  23613. CGTT_SQG_CLK_CTRL__PERFMON_OVERRIDE__SHIFT
  23614. CGTT_SQG_CLK_CTRL__REG_OVERRIDE_MASK
  23615. CGTT_SQG_CLK_CTRL__REG_OVERRIDE__SHIFT
  23616. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23617. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23618. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23619. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23620. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23621. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23622. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23623. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23624. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23625. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23626. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23627. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23628. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23629. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23630. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23631. CGTT_SQG_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23632. CGTT_SQG_CLK_CTRL__TTRACE_OVERRIDE_MASK
  23633. CGTT_SQG_CLK_CTRL__TTRACE_OVERRIDE__SHIFT
  23634. CGTT_SQ_CLK_CTRL__CORE_OVERRIDE_MASK
  23635. CGTT_SQ_CLK_CTRL__CORE_OVERRIDE__SHIFT
  23636. CGTT_SQ_CLK_CTRL__OFF_HYSTERESIS_MASK
  23637. CGTT_SQ_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23638. CGTT_SQ_CLK_CTRL__ON_DELAY_MASK
  23639. CGTT_SQ_CLK_CTRL__ON_DELAY__SHIFT
  23640. CGTT_SQ_CLK_CTRL__PERFMON_OVERRIDE_MASK
  23641. CGTT_SQ_CLK_CTRL__PERFMON_OVERRIDE__SHIFT
  23642. CGTT_SQ_CLK_CTRL__REG_OVERRIDE_MASK
  23643. CGTT_SQ_CLK_CTRL__REG_OVERRIDE__SHIFT
  23644. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23645. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23646. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23647. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23648. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23649. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23650. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23651. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23652. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23653. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23654. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23655. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23656. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23657. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23658. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23659. CGTT_SQ_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23660. CGTT_SQ_CLK_CTRL__WCLK2DCLK_OVERRIDE_MASK
  23661. CGTT_SQ_CLK_CTRL__WCLK2DCLK_OVERRIDE__SHIFT
  23662. CGTT_SQ_CLK_CTRL__WCLK_OVERRIDE_MASK
  23663. CGTT_SQ_CLK_CTRL__WCLK_OVERRIDE__SHIFT
  23664. CGTT_SX_CLK_CTRL0__OFF_HYSTERESIS_MASK
  23665. CGTT_SX_CLK_CTRL0__OFF_HYSTERESIS__SHIFT
  23666. CGTT_SX_CLK_CTRL0__ON_DELAY_MASK
  23667. CGTT_SX_CLK_CTRL0__ON_DELAY__SHIFT
  23668. CGTT_SX_CLK_CTRL0__RESERVED_MASK
  23669. CGTT_SX_CLK_CTRL0__RESERVED__SHIFT
  23670. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE0_MASK
  23671. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE0__SHIFT
  23672. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE1_MASK
  23673. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE1__SHIFT
  23674. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE2_MASK
  23675. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE2__SHIFT
  23676. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE3_MASK
  23677. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE3__SHIFT
  23678. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE4_MASK
  23679. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE4__SHIFT
  23680. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE5_MASK
  23681. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE5__SHIFT
  23682. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE6_MASK
  23683. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE6__SHIFT
  23684. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE7_MASK
  23685. CGTT_SX_CLK_CTRL0__SOFT_OVERRIDE7__SHIFT
  23686. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE0_MASK
  23687. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE0__SHIFT
  23688. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE1_MASK
  23689. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE1__SHIFT
  23690. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE2_MASK
  23691. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE2__SHIFT
  23692. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE3_MASK
  23693. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE3__SHIFT
  23694. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE4_MASK
  23695. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE4__SHIFT
  23696. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE5_MASK
  23697. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE5__SHIFT
  23698. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE6_MASK
  23699. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE6__SHIFT
  23700. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE7_MASK
  23701. CGTT_SX_CLK_CTRL0__SOFT_STALL_OVERRIDE7__SHIFT
  23702. CGTT_SX_CLK_CTRL1__DBG_EN_MASK
  23703. CGTT_SX_CLK_CTRL1__DBG_EN__SHIFT
  23704. CGTT_SX_CLK_CTRL1__OFF_HYSTERESIS_MASK
  23705. CGTT_SX_CLK_CTRL1__OFF_HYSTERESIS__SHIFT
  23706. CGTT_SX_CLK_CTRL1__ON_DELAY_MASK
  23707. CGTT_SX_CLK_CTRL1__ON_DELAY__SHIFT
  23708. CGTT_SX_CLK_CTRL1__RESERVED_MASK
  23709. CGTT_SX_CLK_CTRL1__RESERVED__SHIFT
  23710. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE0_MASK
  23711. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE0__SHIFT
  23712. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE1_MASK
  23713. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE1__SHIFT
  23714. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE2_MASK
  23715. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE2__SHIFT
  23716. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE3_MASK
  23717. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE3__SHIFT
  23718. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE4_MASK
  23719. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE4__SHIFT
  23720. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE5_MASK
  23721. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE5__SHIFT
  23722. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE6_MASK
  23723. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE6__SHIFT
  23724. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE7_MASK
  23725. CGTT_SX_CLK_CTRL1__SOFT_OVERRIDE7__SHIFT
  23726. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE0_MASK
  23727. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE0__SHIFT
  23728. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE1_MASK
  23729. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE1__SHIFT
  23730. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE2_MASK
  23731. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE2__SHIFT
  23732. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE3_MASK
  23733. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE3__SHIFT
  23734. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE4_MASK
  23735. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE4__SHIFT
  23736. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE5_MASK
  23737. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE5__SHIFT
  23738. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE6_MASK
  23739. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE6__SHIFT
  23740. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE7_MASK
  23741. CGTT_SX_CLK_CTRL1__SOFT_STALL_OVERRIDE7__SHIFT
  23742. CGTT_SX_CLK_CTRL2__DBG_EN_MASK
  23743. CGTT_SX_CLK_CTRL2__DBG_EN__SHIFT
  23744. CGTT_SX_CLK_CTRL2__OFF_HYSTERESIS_MASK
  23745. CGTT_SX_CLK_CTRL2__OFF_HYSTERESIS__SHIFT
  23746. CGTT_SX_CLK_CTRL2__ON_DELAY_MASK
  23747. CGTT_SX_CLK_CTRL2__ON_DELAY__SHIFT
  23748. CGTT_SX_CLK_CTRL2__RESERVED_MASK
  23749. CGTT_SX_CLK_CTRL2__RESERVED__SHIFT
  23750. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE0_MASK
  23751. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE0__SHIFT
  23752. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE1_MASK
  23753. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE1__SHIFT
  23754. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE2_MASK
  23755. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE2__SHIFT
  23756. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE3_MASK
  23757. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE3__SHIFT
  23758. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE4_MASK
  23759. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE4__SHIFT
  23760. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE5_MASK
  23761. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE5__SHIFT
  23762. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE6_MASK
  23763. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE6__SHIFT
  23764. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE7_MASK
  23765. CGTT_SX_CLK_CTRL2__SOFT_OVERRIDE7__SHIFT
  23766. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE0_MASK
  23767. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE0__SHIFT
  23768. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE1_MASK
  23769. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE1__SHIFT
  23770. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE2_MASK
  23771. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE2__SHIFT
  23772. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE3_MASK
  23773. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE3__SHIFT
  23774. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE4_MASK
  23775. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE4__SHIFT
  23776. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE5_MASK
  23777. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE5__SHIFT
  23778. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE6_MASK
  23779. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE6__SHIFT
  23780. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE7_MASK
  23781. CGTT_SX_CLK_CTRL2__SOFT_STALL_OVERRIDE7__SHIFT
  23782. CGTT_SX_CLK_CTRL3__DBG_EN_MASK
  23783. CGTT_SX_CLK_CTRL3__DBG_EN__SHIFT
  23784. CGTT_SX_CLK_CTRL3__OFF_HYSTERESIS_MASK
  23785. CGTT_SX_CLK_CTRL3__OFF_HYSTERESIS__SHIFT
  23786. CGTT_SX_CLK_CTRL3__ON_DELAY_MASK
  23787. CGTT_SX_CLK_CTRL3__ON_DELAY__SHIFT
  23788. CGTT_SX_CLK_CTRL3__RESERVED_MASK
  23789. CGTT_SX_CLK_CTRL3__RESERVED__SHIFT
  23790. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE0_MASK
  23791. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE0__SHIFT
  23792. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE1_MASK
  23793. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE1__SHIFT
  23794. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE2_MASK
  23795. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE2__SHIFT
  23796. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE3_MASK
  23797. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE3__SHIFT
  23798. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE4_MASK
  23799. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE4__SHIFT
  23800. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE5_MASK
  23801. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE5__SHIFT
  23802. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE6_MASK
  23803. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE6__SHIFT
  23804. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE7_MASK
  23805. CGTT_SX_CLK_CTRL3__SOFT_OVERRIDE7__SHIFT
  23806. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE0_MASK
  23807. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE0__SHIFT
  23808. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE1_MASK
  23809. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE1__SHIFT
  23810. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE2_MASK
  23811. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE2__SHIFT
  23812. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE3_MASK
  23813. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE3__SHIFT
  23814. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE4_MASK
  23815. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE4__SHIFT
  23816. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE5_MASK
  23817. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE5__SHIFT
  23818. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE6_MASK
  23819. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE6__SHIFT
  23820. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE7_MASK
  23821. CGTT_SX_CLK_CTRL3__SOFT_STALL_OVERRIDE7__SHIFT
  23822. CGTT_SX_CLK_CTRL4__DBG_EN_MASK
  23823. CGTT_SX_CLK_CTRL4__DBG_EN__SHIFT
  23824. CGTT_SX_CLK_CTRL4__OFF_HYSTERESIS_MASK
  23825. CGTT_SX_CLK_CTRL4__OFF_HYSTERESIS__SHIFT
  23826. CGTT_SX_CLK_CTRL4__ON_DELAY_MASK
  23827. CGTT_SX_CLK_CTRL4__ON_DELAY__SHIFT
  23828. CGTT_SX_CLK_CTRL4__RESERVED_MASK
  23829. CGTT_SX_CLK_CTRL4__RESERVED__SHIFT
  23830. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE0_MASK
  23831. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE0__SHIFT
  23832. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE1_MASK
  23833. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE1__SHIFT
  23834. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE2_MASK
  23835. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE2__SHIFT
  23836. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE3_MASK
  23837. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE3__SHIFT
  23838. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE4_MASK
  23839. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE4__SHIFT
  23840. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE5_MASK
  23841. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE5__SHIFT
  23842. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE6_MASK
  23843. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE6__SHIFT
  23844. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE7_MASK
  23845. CGTT_SX_CLK_CTRL4__SOFT_OVERRIDE7__SHIFT
  23846. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE0_MASK
  23847. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE0__SHIFT
  23848. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE1_MASK
  23849. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE1__SHIFT
  23850. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE2_MASK
  23851. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE2__SHIFT
  23852. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE3_MASK
  23853. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE3__SHIFT
  23854. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE4_MASK
  23855. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE4__SHIFT
  23856. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE5_MASK
  23857. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE5__SHIFT
  23858. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE6_MASK
  23859. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE6__SHIFT
  23860. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE7_MASK
  23861. CGTT_SX_CLK_CTRL4__SOFT_STALL_OVERRIDE7__SHIFT
  23862. CGTT_TCI_CLK_CTRL__OFF_HYSTERESIS_MASK
  23863. CGTT_TCI_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23864. CGTT_TCI_CLK_CTRL__ON_DELAY_MASK
  23865. CGTT_TCI_CLK_CTRL__ON_DELAY__SHIFT
  23866. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE0_MASK
  23867. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  23868. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE1_MASK
  23869. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  23870. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23871. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23872. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23873. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23874. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23875. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23876. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23877. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23878. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23879. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23880. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23881. CGTT_TCI_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23882. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23883. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23884. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23885. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23886. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23887. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23888. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23889. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23890. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23891. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23892. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23893. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23894. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23895. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23896. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23897. CGTT_TCI_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23898. CGTT_TCPF_CLK_CTRL__OFF_HYSTERESIS_MASK
  23899. CGTT_TCPF_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23900. CGTT_TCPF_CLK_CTRL__ON_DELAY_MASK
  23901. CGTT_TCPF_CLK_CTRL__ON_DELAY__SHIFT
  23902. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE0_MASK
  23903. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  23904. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE1_MASK
  23905. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  23906. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23907. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23908. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23909. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23910. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23911. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23912. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23913. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23914. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23915. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23916. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23917. CGTT_TCPF_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23918. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23919. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23920. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23921. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23922. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23923. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23924. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23925. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23926. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23927. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23928. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23929. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23930. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23931. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23932. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23933. CGTT_TCPF_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23934. CGTT_TCPF_CLK_CTRL__SPARE_MASK
  23935. CGTT_TCPF_CLK_CTRL__SPARE__SHIFT
  23936. CGTT_TCPI_CLK_CTRL__OFF_HYSTERESIS_MASK
  23937. CGTT_TCPI_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23938. CGTT_TCPI_CLK_CTRL__ON_DELAY_MASK
  23939. CGTT_TCPI_CLK_CTRL__ON_DELAY__SHIFT
  23940. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE0_MASK
  23941. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  23942. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE1_MASK
  23943. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  23944. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23945. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23946. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23947. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23948. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23949. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23950. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23951. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23952. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23953. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23954. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23955. CGTT_TCPI_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23956. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  23957. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  23958. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  23959. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  23960. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  23961. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  23962. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  23963. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  23964. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  23965. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  23966. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  23967. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  23968. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  23969. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  23970. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE7_MASK
  23971. CGTT_TCPI_CLK_CTRL__SOFT_STALL_OVERRIDE7__SHIFT
  23972. CGTT_TCPI_CLK_CTRL__SPARE_MASK
  23973. CGTT_TCPI_CLK_CTRL__SPARE__SHIFT
  23974. CGTT_TCP_CLK_CTRL__OFF_HYSTERESIS_MASK
  23975. CGTT_TCP_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  23976. CGTT_TCP_CLK_CTRL__ON_DELAY_MASK
  23977. CGTT_TCP_CLK_CTRL__ON_DELAY__SHIFT
  23978. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE0_MASK
  23979. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE0__SHIFT
  23980. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE1_MASK
  23981. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE1__SHIFT
  23982. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE2_MASK
  23983. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE2__SHIFT
  23984. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE3_MASK
  23985. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  23986. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE4_MASK
  23987. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  23988. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE5_MASK
  23989. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE5__SHIFT
  23990. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE6_MASK
  23991. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE6__SHIFT
  23992. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE7_MASK
  23993. CGTT_TCP_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  23994. CGTT_VGT_CLK_CTRL__CORE_OVERRIDE_MASK
  23995. CGTT_VGT_CLK_CTRL__CORE_OVERRIDE__SHIFT
  23996. CGTT_VGT_CLK_CTRL__DBG_ENABLE_MASK
  23997. CGTT_VGT_CLK_CTRL__DBG_ENABLE__SHIFT
  23998. CGTT_VGT_CLK_CTRL__GS_OVERRIDE_MASK
  23999. CGTT_VGT_CLK_CTRL__GS_OVERRIDE__SHIFT
  24000. CGTT_VGT_CLK_CTRL__OFF_HYSTERESIS_MASK
  24001. CGTT_VGT_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  24002. CGTT_VGT_CLK_CTRL__ON_DELAY_MASK
  24003. CGTT_VGT_CLK_CTRL__ON_DELAY__SHIFT
  24004. CGTT_VGT_CLK_CTRL__PERF_ENABLE_MASK
  24005. CGTT_VGT_CLK_CTRL__PERF_ENABLE__SHIFT
  24006. CGTT_VGT_CLK_CTRL__PRIMGEN_OVERRIDE_MASK
  24007. CGTT_VGT_CLK_CTRL__PRIMGEN_OVERRIDE__SHIFT
  24008. CGTT_VGT_CLK_CTRL__REG_OVERRIDE_MASK
  24009. CGTT_VGT_CLK_CTRL__REG_OVERRIDE__SHIFT
  24010. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE3_MASK
  24011. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE3__SHIFT
  24012. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE4_MASK
  24013. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  24014. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE7_MASK
  24015. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  24016. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE8_MASK
  24017. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE8__SHIFT
  24018. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE9_MASK
  24019. CGTT_VGT_CLK_CTRL__SOFT_OVERRIDE9__SHIFT
  24020. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  24021. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  24022. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  24023. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  24024. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  24025. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  24026. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  24027. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  24028. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  24029. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  24030. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  24031. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  24032. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  24033. CGTT_VGT_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  24034. CGTT_VGT_CLK_CTRL__TESS_OVERRIDE_MASK
  24035. CGTT_VGT_CLK_CTRL__TESS_OVERRIDE__SHIFT
  24036. CGTT_WD_CLK_CTRL__ADC_OVERRIDE_MASK
  24037. CGTT_WD_CLK_CTRL__ADC_OVERRIDE__SHIFT
  24038. CGTT_WD_CLK_CTRL__CORE_OVERRIDE_MASK
  24039. CGTT_WD_CLK_CTRL__CORE_OVERRIDE__SHIFT
  24040. CGTT_WD_CLK_CTRL__DBG_ENABLE_MASK
  24041. CGTT_WD_CLK_CTRL__DBG_ENABLE__SHIFT
  24042. CGTT_WD_CLK_CTRL__OFF_HYSTERESIS_MASK
  24043. CGTT_WD_CLK_CTRL__OFF_HYSTERESIS__SHIFT
  24044. CGTT_WD_CLK_CTRL__ON_DELAY_MASK
  24045. CGTT_WD_CLK_CTRL__ON_DELAY__SHIFT
  24046. CGTT_WD_CLK_CTRL__PERF_ENABLE_MASK
  24047. CGTT_WD_CLK_CTRL__PERF_ENABLE__SHIFT
  24048. CGTT_WD_CLK_CTRL__PRIMGEN_OVERRIDE_MASK
  24049. CGTT_WD_CLK_CTRL__PRIMGEN_OVERRIDE__SHIFT
  24050. CGTT_WD_CLK_CTRL__RBIU_INPUT_OVERRIDE_MASK
  24051. CGTT_WD_CLK_CTRL__RBIU_INPUT_OVERRIDE__SHIFT
  24052. CGTT_WD_CLK_CTRL__REG_OVERRIDE_MASK
  24053. CGTT_WD_CLK_CTRL__REG_OVERRIDE__SHIFT
  24054. CGTT_WD_CLK_CTRL__SOFT_OVERRIDE4_MASK
  24055. CGTT_WD_CLK_CTRL__SOFT_OVERRIDE4__SHIFT
  24056. CGTT_WD_CLK_CTRL__SOFT_OVERRIDE7_MASK
  24057. CGTT_WD_CLK_CTRL__SOFT_OVERRIDE7__SHIFT
  24058. CGTT_WD_CLK_CTRL__SOFT_OVERRIDE8_MASK
  24059. CGTT_WD_CLK_CTRL__SOFT_OVERRIDE8__SHIFT
  24060. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE0_MASK
  24061. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE0__SHIFT
  24062. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE1_MASK
  24063. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE1__SHIFT
  24064. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE2_MASK
  24065. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE2__SHIFT
  24066. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE3_MASK
  24067. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE3__SHIFT
  24068. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE4_MASK
  24069. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE4__SHIFT
  24070. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE5_MASK
  24071. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE5__SHIFT
  24072. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE6_MASK
  24073. CGTT_WD_CLK_CTRL__SOFT_STALL_OVERRIDE6__SHIFT
  24074. CGTT_WD_CLK_CTRL__TESS_OVERRIDE_MASK
  24075. CGTT_WD_CLK_CTRL__TESS_OVERRIDE__SHIFT
  24076. CGTX_SPI_DEBUG_CLK_CTRL__ALL_CLK_ON_OVERRIDE_MASK
  24077. CGTX_SPI_DEBUG_CLK_CTRL__ALL_CLK_ON_OVERRIDE__SHIFT
  24078. CGTX_SPI_DEBUG_CLK_CTRL__GRP5_CG_OFF_HYST_MASK
  24079. CGTX_SPI_DEBUG_CLK_CTRL__GRP5_CG_OFF_HYST__SHIFT
  24080. CGTX_SPI_DEBUG_CLK_CTRL__GRP5_CG_OVERRIDE_MASK
  24081. CGTX_SPI_DEBUG_CLK_CTRL__GRP5_CG_OVERRIDE__SHIFT
  24082. CGTX_SPI_DEBUG_CLK_CTRL__SPI_SH_CLK_CONTROL_MASK
  24083. CGTX_SPI_DEBUG_CLK_CTRL__SPI_SH_CLK_CONTROL__SHIFT
  24084. CGT_CURRENT_CLOCK
  24085. CGT_EXTERNAL_CLOCK
  24086. CGT_INTERNAL_CLOCK
  24087. CGT_INTERNAL_ENSLAVED_CLOCK
  24088. CGT_NO_CLOCK
  24089. CGT_PROGRAMMABLE_CLOCK
  24090. CGU_CLK_CUSTOM
  24091. CGU_CLK_DIV
  24092. CGU_CLK_EXT
  24093. CGU_CLK_FIXDIV
  24094. CGU_CLK_GATE
  24095. CGU_CLK_MUX
  24096. CGU_CLK_MUX_GLITCHFREE
  24097. CGU_CLK_NONE
  24098. CGU_CLK_PLL
  24099. CGU_DBG_CLK_SEL_MASK
  24100. CGU_DBG_CLK_SEL_SHIFT
  24101. CGU_DBG_PIX_CLK_SEL
  24102. CGU_DBG_VDP_CLK_SEL
  24103. CGU_DBG_XO_FRO_SEL
  24104. CGU_EPHY
  24105. CGU_GPHY1_CR
  24106. CGU_IFCCR
  24107. CGU_IFCCR_VR9
  24108. CGU_IF_CLK_AR10
  24109. CGU_IP_SW_RESET
  24110. CGU_IP_SW_RESET_DELAY
  24111. CGU_IP_SW_RESET_DELAY_MASK
  24112. CGU_IP_SW_RESET_DELAY_SHIFT
  24113. CGU_IP_SW_RESET_RESET
  24114. CGU_PCICR
  24115. CGU_PCICR_VR9
  24116. CGU_PLL_CTRL
  24117. CGU_PLL_CTRL_BAND_SHIFT
  24118. CGU_PLL_CTRL_BYPASS
  24119. CGU_PLL_CTRL_FBDIV_MASK
  24120. CGU_PLL_CTRL_FBDIV_SHIFT
  24121. CGU_PLL_CTRL_IDIV_MASK
  24122. CGU_PLL_CTRL_IDIV_SHIFT
  24123. CGU_PLL_CTRL_ODIV_MASK
  24124. CGU_PLL_CTRL_ODIV_SHIFT
  24125. CGU_PLL_CTRL_PD
  24126. CGU_PLL_FMEAS
  24127. CGU_PLL_MON
  24128. CGU_PLL_SOURCE_MAX
  24129. CGU_PLL_STATUS
  24130. CGU_PLL_STATUS_ERR
  24131. CGU_PLL_STATUS_LOCK
  24132. CGU_REG_APLL
  24133. CGU_REG_BCHCDR
  24134. CGU_REG_CIMCDR
  24135. CGU_REG_CLKGR
  24136. CGU_REG_CLKGR0
  24137. CGU_REG_CLKGR1
  24138. CGU_REG_CLOCKCONTROL
  24139. CGU_REG_CLOCKSTATUS
  24140. CGU_REG_CPCCR
  24141. CGU_REG_CPPCR
  24142. CGU_REG_CPPCR0
  24143. CGU_REG_CPPCR1
  24144. CGU_REG_DDRCDR
  24145. CGU_REG_EPLL
  24146. CGU_REG_GPSCDR
  24147. CGU_REG_GPUCDR
  24148. CGU_REG_HDMICDR
  24149. CGU_REG_I2SCDR
  24150. CGU_REG_LCR
  24151. CGU_REG_LP0CDR
  24152. CGU_REG_LP1CDR
  24153. CGU_REG_LPCDR
  24154. CGU_REG_MPLL
  24155. CGU_REG_MSC0CDR
  24156. CGU_REG_MSC1CDR
  24157. CGU_REG_MSC2CDR
  24158. CGU_REG_MSCCDR
  24159. CGU_REG_OPCR
  24160. CGU_REG_PCMCDR
  24161. CGU_REG_PLLCONTROL
  24162. CGU_REG_SCR
  24163. CGU_REG_SSICDR
  24164. CGU_REG_UHCCDR
  24165. CGU_REG_USBCDR
  24166. CGU_REG_USBPCR
  24167. CGU_REG_USBPCR1
  24168. CGU_REG_USBRDT
  24169. CGU_REG_USBVBFIL
  24170. CGU_REG_VPLL
  24171. CGU_REG_VPUCDR
  24172. CGU_SYS
  24173. CGU_SYS_RST_CTRL
  24174. CGU_SYS_XRX
  24175. CGU_TEMP_PD
  24176. CGW_CRC8PRF_16U8
  24177. CGW_CRC8PRF_1U8
  24178. CGW_CRC8PRF_MAX
  24179. CGW_CRC8PRF_SFFID_XOR
  24180. CGW_CRC8PRF_UNSPEC
  24181. CGW_CS_CRC8
  24182. CGW_CS_CRC8_LEN
  24183. CGW_CS_XOR
  24184. CGW_CS_XOR_LEN
  24185. CGW_DEFAULT_HOPS
  24186. CGW_DELETED
  24187. CGW_DROPPED
  24188. CGW_DST_IF
  24189. CGW_FDMODATTR_LEN
  24190. CGW_FDMOD_AND
  24191. CGW_FDMOD_OR
  24192. CGW_FDMOD_SET
  24193. CGW_FDMOD_XOR
  24194. CGW_FILTER
  24195. CGW_FLAGS_CAN_ECHO
  24196. CGW_FLAGS_CAN_FD
  24197. CGW_FLAGS_CAN_IIF_TX_OK
  24198. CGW_FLAGS_CAN_SRC_TSTAMP
  24199. CGW_FRAME_MODS
  24200. CGW_HANDLED
  24201. CGW_LIM_HOPS
  24202. CGW_MAX
  24203. CGW_MAX_HOPS
  24204. CGW_MIN_HOPS
  24205. CGW_MODATTR_LEN
  24206. CGW_MOD_AND
  24207. CGW_MOD_DATA
  24208. CGW_MOD_DLC
  24209. CGW_MOD_FLAGS
  24210. CGW_MOD_FUNCS
  24211. CGW_MOD_ID
  24212. CGW_MOD_LEN
  24213. CGW_MOD_OR
  24214. CGW_MOD_SET
  24215. CGW_MOD_UID
  24216. CGW_MOD_XOR
  24217. CGW_SRC_IF
  24218. CGW_TYPE_CAN_CAN
  24219. CGW_TYPE_MAX
  24220. CGW_TYPE_UNSPEC
  24221. CGW_UNSPEC
  24222. CGXX_CMRX_CFG
  24223. CGXX_CMRX_INT
  24224. CGXX_CMRX_INT_ENA_W1S
  24225. CGXX_CMRX_RX_DMAC_CAM0
  24226. CGXX_CMRX_RX_DMAC_CAM1
  24227. CGXX_CMRX_RX_DMAC_CTL0
  24228. CGXX_CMRX_RX_ID_MAP
  24229. CGXX_CMRX_RX_LMACS
  24230. CGXX_CMRX_RX_STAT0
  24231. CGXX_CMRX_TX_STAT0
  24232. CGXX_GMP_PCS_MRX_CTL
  24233. CGXX_GMP_PCS_MRX_CTL_LBK
  24234. CGXX_SCRATCH0_REG
  24235. CGXX_SCRATCH1_REG
  24236. CGXX_SPUX_CONTROL1
  24237. CGXX_SPUX_CONTROL1_LBK
  24238. CGX_CMD_EXTERNAL_LBK
  24239. CGX_CMD_GET_FW_VER
  24240. CGX_CMD_GET_LINK_STS
  24241. CGX_CMD_GET_MAC_ADDR
  24242. CGX_CMD_GET_MKEX_PRFL_ADDR
  24243. CGX_CMD_GET_MKEX_PRFL_SIZE
  24244. CGX_CMD_HIGIG
  24245. CGX_CMD_INTERNAL_LBK
  24246. CGX_CMD_INTF_SHUTDOWN
  24247. CGX_CMD_LINK_BRING_DOWN
  24248. CGX_CMD_LINK_BRING_UP
  24249. CGX_CMD_LINK_STATE_CHANGE
  24250. CGX_CMD_MODE_CHANGE
  24251. CGX_CMD_NONE
  24252. CGX_CMD_OWN_FIRMWARE
  24253. CGX_CMD_OWN_NS
  24254. CGX_CMD_SET_MTU
  24255. CGX_CMD_TIMEOUT
  24256. CGX_COMMAND_REG
  24257. CGX_CONST
  24258. CGX_DMAC_BCAST_MODE
  24259. CGX_DMAC_CAM_ACCEPT
  24260. CGX_DMAC_CAM_ADDR_ENABLE
  24261. CGX_DMAC_CTL0_CAM_ENABLE
  24262. CGX_DMAC_MCAST_MODE
  24263. CGX_ERR_AN_CPT_FAIL
  24264. CGX_ERR_LMAC_MODE_INVALID
  24265. CGX_ERR_LMAC_NOT_ENABLED
  24266. CGX_ERR_NONE
  24267. CGX_ERR_PCS_RECV_LINK_FAIL
  24268. CGX_ERR_PCS_RESET_FAIL
  24269. CGX_ERR_PHY_LINK_DOWN
  24270. CGX_ERR_PREV_ACK_NOT_CLEAR
  24271. CGX_ERR_REQUEST_ID_INVALID
  24272. CGX_ERR_RX_EQU_FAIL
  24273. CGX_ERR_RX_NOT_IDLE
  24274. CGX_ERR_SMUX_RX_LINK_NOT_OK
  24275. CGX_ERR_SPUX_AN_RESET_FAIL
  24276. CGX_ERR_SPUX_BER_FAIL
  24277. CGX_ERR_SPUX_BR_BLKLOCK_FAIL
  24278. CGX_ERR_SPUX_RESET_FAIL
  24279. CGX_ERR_SPUX_RSFEC_ALGN_FAIL
  24280. CGX_ERR_SPUX_RX_ALIGN_FAIL
  24281. CGX_ERR_SPUX_RX_FAULT
  24282. CGX_ERR_SPUX_TX_FAULT
  24283. CGX_ERR_SPUX_USX_AN_RESET_FAIL
  24284. CGX_ERR_TRAINING_FAIL
  24285. CGX_ERR_TX_NOT_IDLE
  24286. CGX_EVENT_ACK
  24287. CGX_EVENT_REG
  24288. CGX_EVT_ASYNC
  24289. CGX_EVT_CMD_RESP
  24290. CGX_EVT_LINK_CHANGE
  24291. CGX_EVT_NONE
  24292. CGX_FIFO_LEN
  24293. CGX_FIRMWARE_MAJOR_VER
  24294. CGX_FIRMWARE_MINOR_VER
  24295. CGX_H
  24296. CGX_ID_MASK
  24297. CGX_LINK_100G
  24298. CGX_LINK_100M
  24299. CGX_LINK_10G
  24300. CGX_LINK_10M
  24301. CGX_LINK_1G
  24302. CGX_LINK_20G
  24303. CGX_LINK_25G
  24304. CGX_LINK_2HG
  24305. CGX_LINK_40G
  24306. CGX_LINK_50G
  24307. CGX_LINK_5G
  24308. CGX_LINK_NONE
  24309. CGX_LINK_SPEED_MAX
  24310. CGX_LMAC_FWI
  24311. CGX_LMAC_TYPE_MASK
  24312. CGX_LMAC_TYPE_SHIFT
  24313. CGX_NVEC
  24314. CGX_OFFSET
  24315. CGX_RX_DMAC_ADR_MASK
  24316. CGX_RX_STATS_COUNT
  24317. CGX_STAT_FAIL
  24318. CGX_STAT_SUCCESS
  24319. CGX_TX_STATS_COUNT
  24320. CG_ACLK_CNTL__ACLK_DIR_CNTL_DIVIDER_MASK
  24321. CG_ACLK_CNTL__ACLK_DIR_CNTL_DIVIDER__SHIFT
  24322. CG_ACLK_CNTL__ACLK_DIR_CNTL_EN_MASK
  24323. CG_ACLK_CNTL__ACLK_DIR_CNTL_EN__SHIFT
  24324. CG_ACLK_CNTL__ACLK_DIR_CNTL_TOG_MASK
  24325. CG_ACLK_CNTL__ACLK_DIR_CNTL_TOG__SHIFT
  24326. CG_ACLK_CNTL__ACLK_DIVIDER_MASK
  24327. CG_ACLK_CNTL__ACLK_DIVIDER__SHIFT
  24328. CG_ACPI_CNTL
  24329. CG_ACPI_CNTL__SCLK_ACPI_DIV_MASK
  24330. CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT
  24331. CG_ACPI_CNTL__SCLK_CHANGE_SKIP_MASK
  24332. CG_ACPI_CNTL__SCLK_CHANGE_SKIP__SHIFT
  24333. CG_ACPI_VOLTAGE_CNTL
  24334. CG_ARB_REQ
  24335. CG_ARB_REQ_MASK
  24336. CG_ARB_REQ_SHIFT
  24337. CG_ARB_RESP
  24338. CG_ARB_RESP_MASK
  24339. CG_ARB_RESP_SHIFT
  24340. CG_AT
  24341. CG_AT_0
  24342. CG_AT_1
  24343. CG_AT_2
  24344. CG_AT_3
  24345. CG_AT_4
  24346. CG_AT_5
  24347. CG_AT_6
  24348. CG_AT_7
  24349. CG_BIF_MASK
  24350. CG_BIF_REQ_AND_RSP
  24351. CG_BIF_SHIFT
  24352. CG_BSP
  24353. CG_BSP_0
  24354. CG_CAC_CTRL
  24355. CG_CAC_REGION_1_WEIGHT_0
  24356. CG_CAC_REGION_1_WEIGHT_1
  24357. CG_CAC_REGION_2_WEIGHT_0
  24358. CG_CAC_REGION_2_WEIGHT_1
  24359. CG_CAC_REGION_2_WEIGHT_2
  24360. CG_CAC_REGION_3_WEIGHT_0
  24361. CG_CAC_REGION_3_WEIGHT_1
  24362. CG_CAC_REGION_4_OVERRIDE_4
  24363. CG_CAC_REGION_4_WEIGHT_0
  24364. CG_CAC_REGION_4_WEIGHT_1
  24365. CG_CAC_REGION_4_WEIGHT_2
  24366. CG_CAC_REGION_4_WEIGHT_3
  24367. CG_CAC_REGION_5_WEIGHT_0
  24368. CG_CAC_REGION_5_WEIGHT_1
  24369. CG_CGLS_TILE_0
  24370. CG_CGLS_TILE_1
  24371. CG_CGLS_TILE_10
  24372. CG_CGLS_TILE_11
  24373. CG_CGLS_TILE_2
  24374. CG_CGLS_TILE_3
  24375. CG_CGLS_TILE_4
  24376. CG_CGLS_TILE_5
  24377. CG_CGLS_TILE_6
  24378. CG_CGLS_TILE_7
  24379. CG_CGLS_TILE_8
  24380. CG_CGLS_TILE_9
  24381. CG_CGTT_LOCAL_0
  24382. CG_CGTT_LOCAL_1
  24383. CG_CGTT_LOCAL_2
  24384. CG_CGTT_LOCAL_3
  24385. CG_CG_VOLTAGE_CNTL
  24386. CG_CLIENT_REQ
  24387. CG_CLIENT_REQ_MASK
  24388. CG_CLIENT_REQ_SHIFT
  24389. CG_CLIENT_RESP
  24390. CG_CLIENT_RESP_MASK
  24391. CG_CLIENT_RESP_SHIFT
  24392. CG_CLKPIN_CNTL
  24393. CG_CLKPIN_CNTL_2
  24394. CG_CLKPIN_CNTL_2__CLK_SPARE_MASK
  24395. CG_CLKPIN_CNTL_2__CLK_SPARE__SHIFT
  24396. CG_CLKPIN_CNTL_2__CML_CTRL_MASK
  24397. CG_CLKPIN_CNTL_2__CML_CTRL__SHIFT
  24398. CG_CLKPIN_CNTL_2__ENABLE_XCLK_MASK
  24399. CG_CLKPIN_CNTL_2__ENABLE_XCLK__SHIFT
  24400. CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN_MASK
  24401. CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT
  24402. CG_CLKPIN_CNTL_2__MUX_TCLK_TO_XCLK_MASK
  24403. CG_CLKPIN_CNTL_2__MUX_TCLK_TO_XCLK__SHIFT
  24404. CG_CLKPIN_CNTL_2__XO_IN2_BIDIR_CML_OE_MASK
  24405. CG_CLKPIN_CNTL_2__XO_IN2_BIDIR_CML_OE__SHIFT
  24406. CG_CLKPIN_CNTL_2__XO_IN2_CML_RXEN_MASK
  24407. CG_CLKPIN_CNTL_2__XO_IN2_CML_RXEN__SHIFT
  24408. CG_CLKPIN_CNTL_2__XO_IN2_ICORE_CLK_OE_MASK
  24409. CG_CLKPIN_CNTL_2__XO_IN2_ICORE_CLK_OE__SHIFT
  24410. CG_CLKPIN_CNTL_2__XO_IN2_OSCIN_EN_MASK
  24411. CG_CLKPIN_CNTL_2__XO_IN2_OSCIN_EN__SHIFT
  24412. CG_CLKPIN_CNTL_2__XO_IN_BIDIR_CML_OE_MASK
  24413. CG_CLKPIN_CNTL_2__XO_IN_BIDIR_CML_OE__SHIFT
  24414. CG_CLKPIN_CNTL_2__XO_IN_CML_RXEN_MASK
  24415. CG_CLKPIN_CNTL_2__XO_IN_CML_RXEN__SHIFT
  24416. CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE_MASK
  24417. CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE__SHIFT
  24418. CG_CLKPIN_CNTL_2__XO_IN_OSCIN_EN_MASK
  24419. CG_CLKPIN_CNTL_2__XO_IN_OSCIN_EN__SHIFT
  24420. CG_CLKPIN_CNTL_DC__OSC_EN_MASK
  24421. CG_CLKPIN_CNTL_DC__OSC_EN__SHIFT
  24422. CG_CLKPIN_CNTL_DC__XTALIN_SEL_MASK
  24423. CG_CLKPIN_CNTL_DC__XTALIN_SEL__SHIFT
  24424. CG_CLKPIN_CNTL_DC__XTL_LOW_GAIN_MASK
  24425. CG_CLKPIN_CNTL_DC__XTL_LOW_GAIN__SHIFT
  24426. CG_CLKPIN_CNTL_DC__XTL_XOCLK_DRV_R_EN_MASK
  24427. CG_CLKPIN_CNTL_DC__XTL_XOCLK_DRV_R_EN__SHIFT
  24428. CG_CLKPIN_CNTL__BCLK_AS_XCLK_MASK
  24429. CG_CLKPIN_CNTL__BCLK_AS_XCLK__SHIFT
  24430. CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK
  24431. CG_CLKPIN_CNTL__XTALIN_DIVIDE__SHIFT
  24432. CG_CMUX_GE_PLAT
  24433. CG_CPF_MGCG_MASK
  24434. CG_CPF_MGCG_SHIFT
  24435. CG_CTX_CGTT3D_R
  24436. CG_DCLK_CNTL
  24437. CG_DCLK_CNTL__DCLK_DIR_CNTL_DIVIDER_MASK
  24438. CG_DCLK_CNTL__DCLK_DIR_CNTL_DIVIDER__SHIFT
  24439. CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK
  24440. CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT
  24441. CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG_MASK
  24442. CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG__SHIFT
  24443. CG_DCLK_CNTL__DCLK_DIVIDER_MASK
  24444. CG_DCLK_CNTL__DCLK_DIVIDER__SHIFT
  24445. CG_DCLK_STATUS
  24446. CG_DCLK_STATUS__DCLK_DIR_CNTL_DONETOG_MASK
  24447. CG_DCLK_STATUS__DCLK_DIR_CNTL_DONETOG__SHIFT
  24448. CG_DCLK_STATUS__DCLK_STATUS_MASK
  24449. CG_DCLK_STATUS__DCLK_STATUS__SHIFT
  24450. CG_DISPLAY_GAP_CNTL
  24451. CG_DISPLAY_GAP_CNTL2
  24452. CG_DISPLAY_GAP_CNTL2__VBI_PREDICTION_MASK
  24453. CG_DISPLAY_GAP_CNTL2__VBI_PREDICTION__SHIFT
  24454. CG_DISPLAY_GAP_CNTL__DISP_GAP_MASK
  24455. CG_DISPLAY_GAP_CNTL__DISP_GAP_MCHG_MASK
  24456. CG_DISPLAY_GAP_CNTL__DISP_GAP_MCHG__SHIFT
  24457. CG_DISPLAY_GAP_CNTL__DISP_GAP__SHIFT
  24458. CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT_MASK
  24459. CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT
  24460. CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK
  24461. CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE__SHIFT
  24462. CG_DISPLAY_GAP_CNTL__VBI_TIMER_UNIT_MASK
  24463. CG_DISPLAY_GAP_CNTL__VBI_TIMER_UNIT__SHIFT
  24464. CG_DPM_VOLTAGE_CNTL
  24465. CG_DRM_MASK
  24466. CG_DRM_SHIFT
  24467. CG_DT
  24468. CG_DT_MASK
  24469. CG_ECLK_CNTL
  24470. CG_ECLK_CNTL__ECLK_DIR_CNTL_DIVIDER_MASK
  24471. CG_ECLK_CNTL__ECLK_DIR_CNTL_DIVIDER__SHIFT
  24472. CG_ECLK_CNTL__ECLK_DIR_CNTL_EN_MASK
  24473. CG_ECLK_CNTL__ECLK_DIR_CNTL_EN__SHIFT
  24474. CG_ECLK_CNTL__ECLK_DIR_CNTL_TOG_MASK
  24475. CG_ECLK_CNTL__ECLK_DIR_CNTL_TOG__SHIFT
  24476. CG_ECLK_CNTL__ECLK_DIVIDER_MASK
  24477. CG_ECLK_CNTL__ECLK_DIVIDER__SHIFT
  24478. CG_ECLK_STATUS
  24479. CG_ECLK_STATUS__ECLK_DIR_CNTL_DONETOG_MASK
  24480. CG_ECLK_STATUS__ECLK_DIR_CNTL_DONETOG__SHIFT
  24481. CG_ECLK_STATUS__ECLK_STATUS_MASK
  24482. CG_ECLK_STATUS__ECLK_STATUS__SHIFT
  24483. CG_FC_T
  24484. CG_FDO_CTRL0
  24485. CG_FDO_CTRL0__FAN_SPINUP_DUTY_MASK
  24486. CG_FDO_CTRL0__FAN_SPINUP_DUTY__SHIFT
  24487. CG_FDO_CTRL0__FDO_PWM_HYSTER_MASK
  24488. CG_FDO_CTRL0__FDO_PWM_HYSTER__SHIFT
  24489. CG_FDO_CTRL0__FDO_PWM_MANUAL_MASK
  24490. CG_FDO_CTRL0__FDO_PWM_MANUAL__SHIFT
  24491. CG_FDO_CTRL0__FDO_PWM_RAMP_EN_MASK
  24492. CG_FDO_CTRL0__FDO_PWM_RAMP_EN__SHIFT
  24493. CG_FDO_CTRL0__FDO_PWM_RAMP_MASK
  24494. CG_FDO_CTRL0__FDO_PWM_RAMP__SHIFT
  24495. CG_FDO_CTRL0__FDO_STATIC_DUTY_MASK
  24496. CG_FDO_CTRL0__FDO_STATIC_DUTY__SHIFT
  24497. CG_FDO_CTRL1
  24498. CG_FDO_CTRL1__FDO_PWRDNB_MASK
  24499. CG_FDO_CTRL1__FDO_PWRDNB__SHIFT
  24500. CG_FDO_CTRL1__FMAX_DUTY100_MASK
  24501. CG_FDO_CTRL1__FMAX_DUTY100__SHIFT
  24502. CG_FDO_CTRL1__FMIN_DUTY_MASK
  24503. CG_FDO_CTRL1__FMIN_DUTY__SHIFT
  24504. CG_FDO_CTRL1__M_MASK
  24505. CG_FDO_CTRL1__M__SHIFT
  24506. CG_FDO_CTRL1__RESERVED_MASK
  24507. CG_FDO_CTRL1__RESERVED__SHIFT
  24508. CG_FDO_CTRL2
  24509. CG_FDO_CTRL2__FAN_SPINUP_TIME_MASK
  24510. CG_FDO_CTRL2__FAN_SPINUP_TIME__SHIFT
  24511. CG_FDO_CTRL2__FDO_PWM_MODE_MASK
  24512. CG_FDO_CTRL2__FDO_PWM_MODE__SHIFT
  24513. CG_FDO_CTRL2__TACH_PWM_RESP_RATE_MASK
  24514. CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT
  24515. CG_FDO_CTRL2__TMAX_MASK
  24516. CG_FDO_CTRL2__TMAX__SHIFT
  24517. CG_FDO_CTRL2__TMIN_HYSTER_MASK
  24518. CG_FDO_CTRL2__TMIN_HYSTER__SHIFT
  24519. CG_FDO_CTRL2__TMIN_MASK
  24520. CG_FDO_CTRL2__TMIN__SHIFT
  24521. CG_FFCT_0
  24522. CG_FPS_CNT__FPS_CNT_MASK
  24523. CG_FPS_CNT__FPS_CNT__SHIFT
  24524. CG_FREQ_TRAN_VOTING_0__ACP_FREQ_THROTTLING_VOTE_EN_MASK
  24525. CG_FREQ_TRAN_VOTING_0__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24526. CG_FREQ_TRAN_VOTING_0__AVP_FREQ_THROTTLING_VOTE_EN_MASK
  24527. CG_FREQ_TRAN_VOTING_0__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24528. CG_FREQ_TRAN_VOTING_0__BIF_FREQ_THROTTLING_VOTE_EN_MASK
  24529. CG_FREQ_TRAN_VOTING_0__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT
  24530. CG_FREQ_TRAN_VOTING_0__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK
  24531. CG_FREQ_TRAN_VOTING_0__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT
  24532. CG_FREQ_TRAN_VOTING_0__DRM_FREQ_THROTTLING_VOTE_EN_MASK
  24533. CG_FREQ_TRAN_VOTING_0__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24534. CG_FREQ_TRAN_VOTING_0__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK
  24535. CG_FREQ_TRAN_VOTING_0__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24536. CG_FREQ_TRAN_VOTING_0__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK
  24537. CG_FREQ_TRAN_VOTING_0__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT
  24538. CG_FREQ_TRAN_VOTING_0__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK
  24539. CG_FREQ_TRAN_VOTING_0__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT
  24540. CG_FREQ_TRAN_VOTING_0__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK
  24541. CG_FREQ_TRAN_VOTING_0__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT
  24542. CG_FREQ_TRAN_VOTING_0__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK
  24543. CG_FREQ_TRAN_VOTING_0__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT
  24544. CG_FREQ_TRAN_VOTING_0__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK
  24545. CG_FREQ_TRAN_VOTING_0__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT
  24546. CG_FREQ_TRAN_VOTING_0__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK
  24547. CG_FREQ_TRAN_VOTING_0__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT
  24548. CG_FREQ_TRAN_VOTING_0__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK
  24549. CG_FREQ_TRAN_VOTING_0__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24550. CG_FREQ_TRAN_VOTING_0__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK
  24551. CG_FREQ_TRAN_VOTING_0__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT
  24552. CG_FREQ_TRAN_VOTING_0__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK
  24553. CG_FREQ_TRAN_VOTING_0__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT
  24554. CG_FREQ_TRAN_VOTING_0__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK
  24555. CG_FREQ_TRAN_VOTING_0__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT
  24556. CG_FREQ_TRAN_VOTING_0__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK
  24557. CG_FREQ_TRAN_VOTING_0__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT
  24558. CG_FREQ_TRAN_VOTING_0__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK
  24559. CG_FREQ_TRAN_VOTING_0__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT
  24560. CG_FREQ_TRAN_VOTING_0__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK
  24561. CG_FREQ_TRAN_VOTING_0__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT
  24562. CG_FREQ_TRAN_VOTING_0__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK
  24563. CG_FREQ_TRAN_VOTING_0__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT
  24564. CG_FREQ_TRAN_VOTING_0__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK
  24565. CG_FREQ_TRAN_VOTING_0__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT
  24566. CG_FREQ_TRAN_VOTING_0__HDP_FREQ_THROTTLING_VOTE_EN_MASK
  24567. CG_FREQ_TRAN_VOTING_0__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24568. CG_FREQ_TRAN_VOTING_0__IDCT_FREQ_THROTTLING_VOTE_EN_MASK
  24569. CG_FREQ_TRAN_VOTING_0__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT
  24570. CG_FREQ_TRAN_VOTING_0__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK
  24571. CG_FREQ_TRAN_VOTING_0__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24572. CG_FREQ_TRAN_VOTING_0__PDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24573. CG_FREQ_TRAN_VOTING_0__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24574. CG_FREQ_TRAN_VOTING_0__RLC_FREQ_THROTTLING_VOTE_EN_MASK
  24575. CG_FREQ_TRAN_VOTING_0__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT
  24576. CG_FREQ_TRAN_VOTING_0__ROM_FREQ_THROTTLING_VOTE_EN_MASK
  24577. CG_FREQ_TRAN_VOTING_0__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24578. CG_FREQ_TRAN_VOTING_0__SAM_FREQ_THROTTLING_VOTE_EN_MASK
  24579. CG_FREQ_TRAN_VOTING_0__SAM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24580. CG_FREQ_TRAN_VOTING_0__SDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24581. CG_FREQ_TRAN_VOTING_0__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24582. CG_FREQ_TRAN_VOTING_0__UVD_FREQ_THROTTLING_VOTE_EN_MASK
  24583. CG_FREQ_TRAN_VOTING_0__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT
  24584. CG_FREQ_TRAN_VOTING_0__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK
  24585. CG_FREQ_TRAN_VOTING_0__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24586. CG_FREQ_TRAN_VOTING_0__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK
  24587. CG_FREQ_TRAN_VOTING_0__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24588. CG_FREQ_TRAN_VOTING_0__VCE_FREQ_THROTTLING_VOTE_EN_MASK
  24589. CG_FREQ_TRAN_VOTING_0__VCE_FREQ_THROTTLING_VOTE_EN__SHIFT
  24590. CG_FREQ_TRAN_VOTING_1__ACP_FREQ_THROTTLING_VOTE_EN_MASK
  24591. CG_FREQ_TRAN_VOTING_1__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24592. CG_FREQ_TRAN_VOTING_1__AVP_FREQ_THROTTLING_VOTE_EN_MASK
  24593. CG_FREQ_TRAN_VOTING_1__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24594. CG_FREQ_TRAN_VOTING_1__BIF_FREQ_THROTTLING_VOTE_EN_MASK
  24595. CG_FREQ_TRAN_VOTING_1__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT
  24596. CG_FREQ_TRAN_VOTING_1__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK
  24597. CG_FREQ_TRAN_VOTING_1__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT
  24598. CG_FREQ_TRAN_VOTING_1__DRM_FREQ_THROTTLING_VOTE_EN_MASK
  24599. CG_FREQ_TRAN_VOTING_1__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24600. CG_FREQ_TRAN_VOTING_1__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK
  24601. CG_FREQ_TRAN_VOTING_1__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24602. CG_FREQ_TRAN_VOTING_1__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK
  24603. CG_FREQ_TRAN_VOTING_1__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT
  24604. CG_FREQ_TRAN_VOTING_1__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK
  24605. CG_FREQ_TRAN_VOTING_1__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT
  24606. CG_FREQ_TRAN_VOTING_1__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK
  24607. CG_FREQ_TRAN_VOTING_1__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT
  24608. CG_FREQ_TRAN_VOTING_1__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK
  24609. CG_FREQ_TRAN_VOTING_1__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT
  24610. CG_FREQ_TRAN_VOTING_1__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK
  24611. CG_FREQ_TRAN_VOTING_1__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT
  24612. CG_FREQ_TRAN_VOTING_1__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK
  24613. CG_FREQ_TRAN_VOTING_1__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT
  24614. CG_FREQ_TRAN_VOTING_1__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK
  24615. CG_FREQ_TRAN_VOTING_1__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24616. CG_FREQ_TRAN_VOTING_1__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK
  24617. CG_FREQ_TRAN_VOTING_1__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT
  24618. CG_FREQ_TRAN_VOTING_1__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK
  24619. CG_FREQ_TRAN_VOTING_1__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT
  24620. CG_FREQ_TRAN_VOTING_1__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK
  24621. CG_FREQ_TRAN_VOTING_1__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT
  24622. CG_FREQ_TRAN_VOTING_1__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK
  24623. CG_FREQ_TRAN_VOTING_1__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT
  24624. CG_FREQ_TRAN_VOTING_1__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK
  24625. CG_FREQ_TRAN_VOTING_1__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT
  24626. CG_FREQ_TRAN_VOTING_1__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK
  24627. CG_FREQ_TRAN_VOTING_1__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT
  24628. CG_FREQ_TRAN_VOTING_1__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK
  24629. CG_FREQ_TRAN_VOTING_1__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT
  24630. CG_FREQ_TRAN_VOTING_1__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK
  24631. CG_FREQ_TRAN_VOTING_1__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT
  24632. CG_FREQ_TRAN_VOTING_1__HDP_FREQ_THROTTLING_VOTE_EN_MASK
  24633. CG_FREQ_TRAN_VOTING_1__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24634. CG_FREQ_TRAN_VOTING_1__IDCT_FREQ_THROTTLING_VOTE_EN_MASK
  24635. CG_FREQ_TRAN_VOTING_1__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT
  24636. CG_FREQ_TRAN_VOTING_1__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK
  24637. CG_FREQ_TRAN_VOTING_1__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24638. CG_FREQ_TRAN_VOTING_1__PDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24639. CG_FREQ_TRAN_VOTING_1__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24640. CG_FREQ_TRAN_VOTING_1__RLC_FREQ_THROTTLING_VOTE_EN_MASK
  24641. CG_FREQ_TRAN_VOTING_1__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT
  24642. CG_FREQ_TRAN_VOTING_1__ROM_FREQ_THROTTLING_VOTE_EN_MASK
  24643. CG_FREQ_TRAN_VOTING_1__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24644. CG_FREQ_TRAN_VOTING_1__SAM_FREQ_THROTTLING_VOTE_EN_MASK
  24645. CG_FREQ_TRAN_VOTING_1__SAM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24646. CG_FREQ_TRAN_VOTING_1__SDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24647. CG_FREQ_TRAN_VOTING_1__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24648. CG_FREQ_TRAN_VOTING_1__UVD_FREQ_THROTTLING_VOTE_EN_MASK
  24649. CG_FREQ_TRAN_VOTING_1__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT
  24650. CG_FREQ_TRAN_VOTING_1__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK
  24651. CG_FREQ_TRAN_VOTING_1__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24652. CG_FREQ_TRAN_VOTING_1__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK
  24653. CG_FREQ_TRAN_VOTING_1__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24654. CG_FREQ_TRAN_VOTING_1__VCE_FREQ_THROTTLING_VOTE_EN_MASK
  24655. CG_FREQ_TRAN_VOTING_1__VCE_FREQ_THROTTLING_VOTE_EN__SHIFT
  24656. CG_FREQ_TRAN_VOTING_2__ACP_FREQ_THROTTLING_VOTE_EN_MASK
  24657. CG_FREQ_TRAN_VOTING_2__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24658. CG_FREQ_TRAN_VOTING_2__AVP_FREQ_THROTTLING_VOTE_EN_MASK
  24659. CG_FREQ_TRAN_VOTING_2__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24660. CG_FREQ_TRAN_VOTING_2__BIF_FREQ_THROTTLING_VOTE_EN_MASK
  24661. CG_FREQ_TRAN_VOTING_2__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT
  24662. CG_FREQ_TRAN_VOTING_2__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK
  24663. CG_FREQ_TRAN_VOTING_2__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT
  24664. CG_FREQ_TRAN_VOTING_2__DRM_FREQ_THROTTLING_VOTE_EN_MASK
  24665. CG_FREQ_TRAN_VOTING_2__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24666. CG_FREQ_TRAN_VOTING_2__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK
  24667. CG_FREQ_TRAN_VOTING_2__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24668. CG_FREQ_TRAN_VOTING_2__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK
  24669. CG_FREQ_TRAN_VOTING_2__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT
  24670. CG_FREQ_TRAN_VOTING_2__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK
  24671. CG_FREQ_TRAN_VOTING_2__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT
  24672. CG_FREQ_TRAN_VOTING_2__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK
  24673. CG_FREQ_TRAN_VOTING_2__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT
  24674. CG_FREQ_TRAN_VOTING_2__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK
  24675. CG_FREQ_TRAN_VOTING_2__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT
  24676. CG_FREQ_TRAN_VOTING_2__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK
  24677. CG_FREQ_TRAN_VOTING_2__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT
  24678. CG_FREQ_TRAN_VOTING_2__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK
  24679. CG_FREQ_TRAN_VOTING_2__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT
  24680. CG_FREQ_TRAN_VOTING_2__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK
  24681. CG_FREQ_TRAN_VOTING_2__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24682. CG_FREQ_TRAN_VOTING_2__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK
  24683. CG_FREQ_TRAN_VOTING_2__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT
  24684. CG_FREQ_TRAN_VOTING_2__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK
  24685. CG_FREQ_TRAN_VOTING_2__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT
  24686. CG_FREQ_TRAN_VOTING_2__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK
  24687. CG_FREQ_TRAN_VOTING_2__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT
  24688. CG_FREQ_TRAN_VOTING_2__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK
  24689. CG_FREQ_TRAN_VOTING_2__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT
  24690. CG_FREQ_TRAN_VOTING_2__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK
  24691. CG_FREQ_TRAN_VOTING_2__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT
  24692. CG_FREQ_TRAN_VOTING_2__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK
  24693. CG_FREQ_TRAN_VOTING_2__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT
  24694. CG_FREQ_TRAN_VOTING_2__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK
  24695. CG_FREQ_TRAN_VOTING_2__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT
  24696. CG_FREQ_TRAN_VOTING_2__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK
  24697. CG_FREQ_TRAN_VOTING_2__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT
  24698. CG_FREQ_TRAN_VOTING_2__HDP_FREQ_THROTTLING_VOTE_EN_MASK
  24699. CG_FREQ_TRAN_VOTING_2__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24700. CG_FREQ_TRAN_VOTING_2__IDCT_FREQ_THROTTLING_VOTE_EN_MASK
  24701. CG_FREQ_TRAN_VOTING_2__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT
  24702. CG_FREQ_TRAN_VOTING_2__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK
  24703. CG_FREQ_TRAN_VOTING_2__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24704. CG_FREQ_TRAN_VOTING_2__PDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24705. CG_FREQ_TRAN_VOTING_2__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24706. CG_FREQ_TRAN_VOTING_2__RLC_FREQ_THROTTLING_VOTE_EN_MASK
  24707. CG_FREQ_TRAN_VOTING_2__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT
  24708. CG_FREQ_TRAN_VOTING_2__ROM_FREQ_THROTTLING_VOTE_EN_MASK
  24709. CG_FREQ_TRAN_VOTING_2__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24710. CG_FREQ_TRAN_VOTING_2__SAM_FREQ_THROTTLING_VOTE_EN_MASK
  24711. CG_FREQ_TRAN_VOTING_2__SAM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24712. CG_FREQ_TRAN_VOTING_2__SDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24713. CG_FREQ_TRAN_VOTING_2__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24714. CG_FREQ_TRAN_VOTING_2__UVD_FREQ_THROTTLING_VOTE_EN_MASK
  24715. CG_FREQ_TRAN_VOTING_2__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT
  24716. CG_FREQ_TRAN_VOTING_2__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK
  24717. CG_FREQ_TRAN_VOTING_2__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24718. CG_FREQ_TRAN_VOTING_2__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK
  24719. CG_FREQ_TRAN_VOTING_2__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24720. CG_FREQ_TRAN_VOTING_2__VCE_FREQ_THROTTLING_VOTE_EN_MASK
  24721. CG_FREQ_TRAN_VOTING_2__VCE_FREQ_THROTTLING_VOTE_EN__SHIFT
  24722. CG_FREQ_TRAN_VOTING_3__ACP_FREQ_THROTTLING_VOTE_EN_MASK
  24723. CG_FREQ_TRAN_VOTING_3__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24724. CG_FREQ_TRAN_VOTING_3__AVP_FREQ_THROTTLING_VOTE_EN_MASK
  24725. CG_FREQ_TRAN_VOTING_3__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24726. CG_FREQ_TRAN_VOTING_3__BIF_FREQ_THROTTLING_VOTE_EN_MASK
  24727. CG_FREQ_TRAN_VOTING_3__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT
  24728. CG_FREQ_TRAN_VOTING_3__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK
  24729. CG_FREQ_TRAN_VOTING_3__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT
  24730. CG_FREQ_TRAN_VOTING_3__DRM_FREQ_THROTTLING_VOTE_EN_MASK
  24731. CG_FREQ_TRAN_VOTING_3__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24732. CG_FREQ_TRAN_VOTING_3__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK
  24733. CG_FREQ_TRAN_VOTING_3__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24734. CG_FREQ_TRAN_VOTING_3__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK
  24735. CG_FREQ_TRAN_VOTING_3__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT
  24736. CG_FREQ_TRAN_VOTING_3__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK
  24737. CG_FREQ_TRAN_VOTING_3__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT
  24738. CG_FREQ_TRAN_VOTING_3__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK
  24739. CG_FREQ_TRAN_VOTING_3__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT
  24740. CG_FREQ_TRAN_VOTING_3__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK
  24741. CG_FREQ_TRAN_VOTING_3__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT
  24742. CG_FREQ_TRAN_VOTING_3__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK
  24743. CG_FREQ_TRAN_VOTING_3__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT
  24744. CG_FREQ_TRAN_VOTING_3__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK
  24745. CG_FREQ_TRAN_VOTING_3__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT
  24746. CG_FREQ_TRAN_VOTING_3__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK
  24747. CG_FREQ_TRAN_VOTING_3__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24748. CG_FREQ_TRAN_VOTING_3__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK
  24749. CG_FREQ_TRAN_VOTING_3__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT
  24750. CG_FREQ_TRAN_VOTING_3__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK
  24751. CG_FREQ_TRAN_VOTING_3__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT
  24752. CG_FREQ_TRAN_VOTING_3__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK
  24753. CG_FREQ_TRAN_VOTING_3__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT
  24754. CG_FREQ_TRAN_VOTING_3__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK
  24755. CG_FREQ_TRAN_VOTING_3__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT
  24756. CG_FREQ_TRAN_VOTING_3__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK
  24757. CG_FREQ_TRAN_VOTING_3__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT
  24758. CG_FREQ_TRAN_VOTING_3__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK
  24759. CG_FREQ_TRAN_VOTING_3__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT
  24760. CG_FREQ_TRAN_VOTING_3__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK
  24761. CG_FREQ_TRAN_VOTING_3__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT
  24762. CG_FREQ_TRAN_VOTING_3__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK
  24763. CG_FREQ_TRAN_VOTING_3__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT
  24764. CG_FREQ_TRAN_VOTING_3__HDP_FREQ_THROTTLING_VOTE_EN_MASK
  24765. CG_FREQ_TRAN_VOTING_3__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24766. CG_FREQ_TRAN_VOTING_3__IDCT_FREQ_THROTTLING_VOTE_EN_MASK
  24767. CG_FREQ_TRAN_VOTING_3__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT
  24768. CG_FREQ_TRAN_VOTING_3__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK
  24769. CG_FREQ_TRAN_VOTING_3__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24770. CG_FREQ_TRAN_VOTING_3__PDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24771. CG_FREQ_TRAN_VOTING_3__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24772. CG_FREQ_TRAN_VOTING_3__RLC_FREQ_THROTTLING_VOTE_EN_MASK
  24773. CG_FREQ_TRAN_VOTING_3__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT
  24774. CG_FREQ_TRAN_VOTING_3__ROM_FREQ_THROTTLING_VOTE_EN_MASK
  24775. CG_FREQ_TRAN_VOTING_3__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24776. CG_FREQ_TRAN_VOTING_3__SAM_FREQ_THROTTLING_VOTE_EN_MASK
  24777. CG_FREQ_TRAN_VOTING_3__SAM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24778. CG_FREQ_TRAN_VOTING_3__SDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24779. CG_FREQ_TRAN_VOTING_3__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24780. CG_FREQ_TRAN_VOTING_3__UVD_FREQ_THROTTLING_VOTE_EN_MASK
  24781. CG_FREQ_TRAN_VOTING_3__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT
  24782. CG_FREQ_TRAN_VOTING_3__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK
  24783. CG_FREQ_TRAN_VOTING_3__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24784. CG_FREQ_TRAN_VOTING_3__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK
  24785. CG_FREQ_TRAN_VOTING_3__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24786. CG_FREQ_TRAN_VOTING_3__VCE_FREQ_THROTTLING_VOTE_EN_MASK
  24787. CG_FREQ_TRAN_VOTING_3__VCE_FREQ_THROTTLING_VOTE_EN__SHIFT
  24788. CG_FREQ_TRAN_VOTING_4__ACP_FREQ_THROTTLING_VOTE_EN_MASK
  24789. CG_FREQ_TRAN_VOTING_4__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24790. CG_FREQ_TRAN_VOTING_4__AVP_FREQ_THROTTLING_VOTE_EN_MASK
  24791. CG_FREQ_TRAN_VOTING_4__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24792. CG_FREQ_TRAN_VOTING_4__BIF_FREQ_THROTTLING_VOTE_EN_MASK
  24793. CG_FREQ_TRAN_VOTING_4__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT
  24794. CG_FREQ_TRAN_VOTING_4__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK
  24795. CG_FREQ_TRAN_VOTING_4__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT
  24796. CG_FREQ_TRAN_VOTING_4__DRM_FREQ_THROTTLING_VOTE_EN_MASK
  24797. CG_FREQ_TRAN_VOTING_4__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24798. CG_FREQ_TRAN_VOTING_4__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK
  24799. CG_FREQ_TRAN_VOTING_4__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24800. CG_FREQ_TRAN_VOTING_4__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK
  24801. CG_FREQ_TRAN_VOTING_4__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT
  24802. CG_FREQ_TRAN_VOTING_4__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK
  24803. CG_FREQ_TRAN_VOTING_4__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT
  24804. CG_FREQ_TRAN_VOTING_4__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK
  24805. CG_FREQ_TRAN_VOTING_4__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT
  24806. CG_FREQ_TRAN_VOTING_4__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK
  24807. CG_FREQ_TRAN_VOTING_4__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT
  24808. CG_FREQ_TRAN_VOTING_4__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK
  24809. CG_FREQ_TRAN_VOTING_4__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT
  24810. CG_FREQ_TRAN_VOTING_4__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK
  24811. CG_FREQ_TRAN_VOTING_4__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT
  24812. CG_FREQ_TRAN_VOTING_4__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK
  24813. CG_FREQ_TRAN_VOTING_4__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24814. CG_FREQ_TRAN_VOTING_4__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK
  24815. CG_FREQ_TRAN_VOTING_4__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT
  24816. CG_FREQ_TRAN_VOTING_4__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK
  24817. CG_FREQ_TRAN_VOTING_4__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT
  24818. CG_FREQ_TRAN_VOTING_4__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK
  24819. CG_FREQ_TRAN_VOTING_4__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT
  24820. CG_FREQ_TRAN_VOTING_4__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK
  24821. CG_FREQ_TRAN_VOTING_4__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT
  24822. CG_FREQ_TRAN_VOTING_4__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK
  24823. CG_FREQ_TRAN_VOTING_4__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT
  24824. CG_FREQ_TRAN_VOTING_4__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK
  24825. CG_FREQ_TRAN_VOTING_4__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT
  24826. CG_FREQ_TRAN_VOTING_4__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK
  24827. CG_FREQ_TRAN_VOTING_4__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT
  24828. CG_FREQ_TRAN_VOTING_4__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK
  24829. CG_FREQ_TRAN_VOTING_4__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT
  24830. CG_FREQ_TRAN_VOTING_4__HDP_FREQ_THROTTLING_VOTE_EN_MASK
  24831. CG_FREQ_TRAN_VOTING_4__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24832. CG_FREQ_TRAN_VOTING_4__IDCT_FREQ_THROTTLING_VOTE_EN_MASK
  24833. CG_FREQ_TRAN_VOTING_4__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT
  24834. CG_FREQ_TRAN_VOTING_4__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK
  24835. CG_FREQ_TRAN_VOTING_4__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24836. CG_FREQ_TRAN_VOTING_4__PDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24837. CG_FREQ_TRAN_VOTING_4__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24838. CG_FREQ_TRAN_VOTING_4__RLC_FREQ_THROTTLING_VOTE_EN_MASK
  24839. CG_FREQ_TRAN_VOTING_4__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT
  24840. CG_FREQ_TRAN_VOTING_4__ROM_FREQ_THROTTLING_VOTE_EN_MASK
  24841. CG_FREQ_TRAN_VOTING_4__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24842. CG_FREQ_TRAN_VOTING_4__SAM_FREQ_THROTTLING_VOTE_EN_MASK
  24843. CG_FREQ_TRAN_VOTING_4__SAM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24844. CG_FREQ_TRAN_VOTING_4__SDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24845. CG_FREQ_TRAN_VOTING_4__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24846. CG_FREQ_TRAN_VOTING_4__UVD_FREQ_THROTTLING_VOTE_EN_MASK
  24847. CG_FREQ_TRAN_VOTING_4__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT
  24848. CG_FREQ_TRAN_VOTING_4__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK
  24849. CG_FREQ_TRAN_VOTING_4__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24850. CG_FREQ_TRAN_VOTING_4__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK
  24851. CG_FREQ_TRAN_VOTING_4__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24852. CG_FREQ_TRAN_VOTING_4__VCE_FREQ_THROTTLING_VOTE_EN_MASK
  24853. CG_FREQ_TRAN_VOTING_4__VCE_FREQ_THROTTLING_VOTE_EN__SHIFT
  24854. CG_FREQ_TRAN_VOTING_5__ACP_FREQ_THROTTLING_VOTE_EN_MASK
  24855. CG_FREQ_TRAN_VOTING_5__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24856. CG_FREQ_TRAN_VOTING_5__AVP_FREQ_THROTTLING_VOTE_EN_MASK
  24857. CG_FREQ_TRAN_VOTING_5__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24858. CG_FREQ_TRAN_VOTING_5__BIF_FREQ_THROTTLING_VOTE_EN_MASK
  24859. CG_FREQ_TRAN_VOTING_5__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT
  24860. CG_FREQ_TRAN_VOTING_5__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK
  24861. CG_FREQ_TRAN_VOTING_5__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT
  24862. CG_FREQ_TRAN_VOTING_5__DRM_FREQ_THROTTLING_VOTE_EN_MASK
  24863. CG_FREQ_TRAN_VOTING_5__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24864. CG_FREQ_TRAN_VOTING_5__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK
  24865. CG_FREQ_TRAN_VOTING_5__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24866. CG_FREQ_TRAN_VOTING_5__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK
  24867. CG_FREQ_TRAN_VOTING_5__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT
  24868. CG_FREQ_TRAN_VOTING_5__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK
  24869. CG_FREQ_TRAN_VOTING_5__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT
  24870. CG_FREQ_TRAN_VOTING_5__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK
  24871. CG_FREQ_TRAN_VOTING_5__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT
  24872. CG_FREQ_TRAN_VOTING_5__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK
  24873. CG_FREQ_TRAN_VOTING_5__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT
  24874. CG_FREQ_TRAN_VOTING_5__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK
  24875. CG_FREQ_TRAN_VOTING_5__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT
  24876. CG_FREQ_TRAN_VOTING_5__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK
  24877. CG_FREQ_TRAN_VOTING_5__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT
  24878. CG_FREQ_TRAN_VOTING_5__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK
  24879. CG_FREQ_TRAN_VOTING_5__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24880. CG_FREQ_TRAN_VOTING_5__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK
  24881. CG_FREQ_TRAN_VOTING_5__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT
  24882. CG_FREQ_TRAN_VOTING_5__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK
  24883. CG_FREQ_TRAN_VOTING_5__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT
  24884. CG_FREQ_TRAN_VOTING_5__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK
  24885. CG_FREQ_TRAN_VOTING_5__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT
  24886. CG_FREQ_TRAN_VOTING_5__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK
  24887. CG_FREQ_TRAN_VOTING_5__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT
  24888. CG_FREQ_TRAN_VOTING_5__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK
  24889. CG_FREQ_TRAN_VOTING_5__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT
  24890. CG_FREQ_TRAN_VOTING_5__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK
  24891. CG_FREQ_TRAN_VOTING_5__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT
  24892. CG_FREQ_TRAN_VOTING_5__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK
  24893. CG_FREQ_TRAN_VOTING_5__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT
  24894. CG_FREQ_TRAN_VOTING_5__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK
  24895. CG_FREQ_TRAN_VOTING_5__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT
  24896. CG_FREQ_TRAN_VOTING_5__HDP_FREQ_THROTTLING_VOTE_EN_MASK
  24897. CG_FREQ_TRAN_VOTING_5__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24898. CG_FREQ_TRAN_VOTING_5__IDCT_FREQ_THROTTLING_VOTE_EN_MASK
  24899. CG_FREQ_TRAN_VOTING_5__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT
  24900. CG_FREQ_TRAN_VOTING_5__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK
  24901. CG_FREQ_TRAN_VOTING_5__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24902. CG_FREQ_TRAN_VOTING_5__PDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24903. CG_FREQ_TRAN_VOTING_5__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24904. CG_FREQ_TRAN_VOTING_5__RLC_FREQ_THROTTLING_VOTE_EN_MASK
  24905. CG_FREQ_TRAN_VOTING_5__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT
  24906. CG_FREQ_TRAN_VOTING_5__ROM_FREQ_THROTTLING_VOTE_EN_MASK
  24907. CG_FREQ_TRAN_VOTING_5__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24908. CG_FREQ_TRAN_VOTING_5__SAM_FREQ_THROTTLING_VOTE_EN_MASK
  24909. CG_FREQ_TRAN_VOTING_5__SAM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24910. CG_FREQ_TRAN_VOTING_5__SDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24911. CG_FREQ_TRAN_VOTING_5__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24912. CG_FREQ_TRAN_VOTING_5__UVD_FREQ_THROTTLING_VOTE_EN_MASK
  24913. CG_FREQ_TRAN_VOTING_5__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT
  24914. CG_FREQ_TRAN_VOTING_5__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK
  24915. CG_FREQ_TRAN_VOTING_5__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24916. CG_FREQ_TRAN_VOTING_5__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK
  24917. CG_FREQ_TRAN_VOTING_5__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24918. CG_FREQ_TRAN_VOTING_5__VCE_FREQ_THROTTLING_VOTE_EN_MASK
  24919. CG_FREQ_TRAN_VOTING_5__VCE_FREQ_THROTTLING_VOTE_EN__SHIFT
  24920. CG_FREQ_TRAN_VOTING_6__ACP_FREQ_THROTTLING_VOTE_EN_MASK
  24921. CG_FREQ_TRAN_VOTING_6__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24922. CG_FREQ_TRAN_VOTING_6__AVP_FREQ_THROTTLING_VOTE_EN_MASK
  24923. CG_FREQ_TRAN_VOTING_6__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24924. CG_FREQ_TRAN_VOTING_6__BIF_FREQ_THROTTLING_VOTE_EN_MASK
  24925. CG_FREQ_TRAN_VOTING_6__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT
  24926. CG_FREQ_TRAN_VOTING_6__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK
  24927. CG_FREQ_TRAN_VOTING_6__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT
  24928. CG_FREQ_TRAN_VOTING_6__DRM_FREQ_THROTTLING_VOTE_EN_MASK
  24929. CG_FREQ_TRAN_VOTING_6__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24930. CG_FREQ_TRAN_VOTING_6__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK
  24931. CG_FREQ_TRAN_VOTING_6__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24932. CG_FREQ_TRAN_VOTING_6__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK
  24933. CG_FREQ_TRAN_VOTING_6__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT
  24934. CG_FREQ_TRAN_VOTING_6__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK
  24935. CG_FREQ_TRAN_VOTING_6__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT
  24936. CG_FREQ_TRAN_VOTING_6__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK
  24937. CG_FREQ_TRAN_VOTING_6__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT
  24938. CG_FREQ_TRAN_VOTING_6__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK
  24939. CG_FREQ_TRAN_VOTING_6__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT
  24940. CG_FREQ_TRAN_VOTING_6__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK
  24941. CG_FREQ_TRAN_VOTING_6__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT
  24942. CG_FREQ_TRAN_VOTING_6__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK
  24943. CG_FREQ_TRAN_VOTING_6__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT
  24944. CG_FREQ_TRAN_VOTING_6__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK
  24945. CG_FREQ_TRAN_VOTING_6__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24946. CG_FREQ_TRAN_VOTING_6__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK
  24947. CG_FREQ_TRAN_VOTING_6__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT
  24948. CG_FREQ_TRAN_VOTING_6__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK
  24949. CG_FREQ_TRAN_VOTING_6__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT
  24950. CG_FREQ_TRAN_VOTING_6__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK
  24951. CG_FREQ_TRAN_VOTING_6__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT
  24952. CG_FREQ_TRAN_VOTING_6__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK
  24953. CG_FREQ_TRAN_VOTING_6__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT
  24954. CG_FREQ_TRAN_VOTING_6__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK
  24955. CG_FREQ_TRAN_VOTING_6__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT
  24956. CG_FREQ_TRAN_VOTING_6__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK
  24957. CG_FREQ_TRAN_VOTING_6__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT
  24958. CG_FREQ_TRAN_VOTING_6__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK
  24959. CG_FREQ_TRAN_VOTING_6__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT
  24960. CG_FREQ_TRAN_VOTING_6__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK
  24961. CG_FREQ_TRAN_VOTING_6__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT
  24962. CG_FREQ_TRAN_VOTING_6__HDP_FREQ_THROTTLING_VOTE_EN_MASK
  24963. CG_FREQ_TRAN_VOTING_6__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24964. CG_FREQ_TRAN_VOTING_6__IDCT_FREQ_THROTTLING_VOTE_EN_MASK
  24965. CG_FREQ_TRAN_VOTING_6__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT
  24966. CG_FREQ_TRAN_VOTING_6__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK
  24967. CG_FREQ_TRAN_VOTING_6__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24968. CG_FREQ_TRAN_VOTING_6__PDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24969. CG_FREQ_TRAN_VOTING_6__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24970. CG_FREQ_TRAN_VOTING_6__RLC_FREQ_THROTTLING_VOTE_EN_MASK
  24971. CG_FREQ_TRAN_VOTING_6__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT
  24972. CG_FREQ_TRAN_VOTING_6__ROM_FREQ_THROTTLING_VOTE_EN_MASK
  24973. CG_FREQ_TRAN_VOTING_6__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24974. CG_FREQ_TRAN_VOTING_6__SAM_FREQ_THROTTLING_VOTE_EN_MASK
  24975. CG_FREQ_TRAN_VOTING_6__SAM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24976. CG_FREQ_TRAN_VOTING_6__SDMA_FREQ_THROTTLING_VOTE_EN_MASK
  24977. CG_FREQ_TRAN_VOTING_6__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  24978. CG_FREQ_TRAN_VOTING_6__UVD_FREQ_THROTTLING_VOTE_EN_MASK
  24979. CG_FREQ_TRAN_VOTING_6__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT
  24980. CG_FREQ_TRAN_VOTING_6__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK
  24981. CG_FREQ_TRAN_VOTING_6__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24982. CG_FREQ_TRAN_VOTING_6__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK
  24983. CG_FREQ_TRAN_VOTING_6__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  24984. CG_FREQ_TRAN_VOTING_6__VCE_FREQ_THROTTLING_VOTE_EN_MASK
  24985. CG_FREQ_TRAN_VOTING_6__VCE_FREQ_THROTTLING_VOTE_EN__SHIFT
  24986. CG_FREQ_TRAN_VOTING_7__ACP_FREQ_THROTTLING_VOTE_EN_MASK
  24987. CG_FREQ_TRAN_VOTING_7__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24988. CG_FREQ_TRAN_VOTING_7__AVP_FREQ_THROTTLING_VOTE_EN_MASK
  24989. CG_FREQ_TRAN_VOTING_7__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT
  24990. CG_FREQ_TRAN_VOTING_7__BIF_FREQ_THROTTLING_VOTE_EN_MASK
  24991. CG_FREQ_TRAN_VOTING_7__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT
  24992. CG_FREQ_TRAN_VOTING_7__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK
  24993. CG_FREQ_TRAN_VOTING_7__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT
  24994. CG_FREQ_TRAN_VOTING_7__DRM_FREQ_THROTTLING_VOTE_EN_MASK
  24995. CG_FREQ_TRAN_VOTING_7__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT
  24996. CG_FREQ_TRAN_VOTING_7__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK
  24997. CG_FREQ_TRAN_VOTING_7__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  24998. CG_FREQ_TRAN_VOTING_7__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK
  24999. CG_FREQ_TRAN_VOTING_7__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT
  25000. CG_FREQ_TRAN_VOTING_7__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK
  25001. CG_FREQ_TRAN_VOTING_7__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT
  25002. CG_FREQ_TRAN_VOTING_7__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK
  25003. CG_FREQ_TRAN_VOTING_7__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT
  25004. CG_FREQ_TRAN_VOTING_7__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK
  25005. CG_FREQ_TRAN_VOTING_7__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT
  25006. CG_FREQ_TRAN_VOTING_7__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK
  25007. CG_FREQ_TRAN_VOTING_7__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT
  25008. CG_FREQ_TRAN_VOTING_7__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK
  25009. CG_FREQ_TRAN_VOTING_7__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT
  25010. CG_FREQ_TRAN_VOTING_7__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK
  25011. CG_FREQ_TRAN_VOTING_7__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  25012. CG_FREQ_TRAN_VOTING_7__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK
  25013. CG_FREQ_TRAN_VOTING_7__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT
  25014. CG_FREQ_TRAN_VOTING_7__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK
  25015. CG_FREQ_TRAN_VOTING_7__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT
  25016. CG_FREQ_TRAN_VOTING_7__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK
  25017. CG_FREQ_TRAN_VOTING_7__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT
  25018. CG_FREQ_TRAN_VOTING_7__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK
  25019. CG_FREQ_TRAN_VOTING_7__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT
  25020. CG_FREQ_TRAN_VOTING_7__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK
  25021. CG_FREQ_TRAN_VOTING_7__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT
  25022. CG_FREQ_TRAN_VOTING_7__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK
  25023. CG_FREQ_TRAN_VOTING_7__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT
  25024. CG_FREQ_TRAN_VOTING_7__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK
  25025. CG_FREQ_TRAN_VOTING_7__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT
  25026. CG_FREQ_TRAN_VOTING_7__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK
  25027. CG_FREQ_TRAN_VOTING_7__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT
  25028. CG_FREQ_TRAN_VOTING_7__HDP_FREQ_THROTTLING_VOTE_EN_MASK
  25029. CG_FREQ_TRAN_VOTING_7__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT
  25030. CG_FREQ_TRAN_VOTING_7__IDCT_FREQ_THROTTLING_VOTE_EN_MASK
  25031. CG_FREQ_TRAN_VOTING_7__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT
  25032. CG_FREQ_TRAN_VOTING_7__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK
  25033. CG_FREQ_TRAN_VOTING_7__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT
  25034. CG_FREQ_TRAN_VOTING_7__PDMA_FREQ_THROTTLING_VOTE_EN_MASK
  25035. CG_FREQ_TRAN_VOTING_7__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  25036. CG_FREQ_TRAN_VOTING_7__RLC_FREQ_THROTTLING_VOTE_EN_MASK
  25037. CG_FREQ_TRAN_VOTING_7__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT
  25038. CG_FREQ_TRAN_VOTING_7__ROM_FREQ_THROTTLING_VOTE_EN_MASK
  25039. CG_FREQ_TRAN_VOTING_7__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT
  25040. CG_FREQ_TRAN_VOTING_7__SAM_FREQ_THROTTLING_VOTE_EN_MASK
  25041. CG_FREQ_TRAN_VOTING_7__SAM_FREQ_THROTTLING_VOTE_EN__SHIFT
  25042. CG_FREQ_TRAN_VOTING_7__SDMA_FREQ_THROTTLING_VOTE_EN_MASK
  25043. CG_FREQ_TRAN_VOTING_7__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT
  25044. CG_FREQ_TRAN_VOTING_7__UVD_FREQ_THROTTLING_VOTE_EN_MASK
  25045. CG_FREQ_TRAN_VOTING_7__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT
  25046. CG_FREQ_TRAN_VOTING_7__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK
  25047. CG_FREQ_TRAN_VOTING_7__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT
  25048. CG_FREQ_TRAN_VOTING_7__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK
  25049. CG_FREQ_TRAN_VOTING_7__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT
  25050. CG_FREQ_TRAN_VOTING_7__VCE_FREQ_THROTTLING_VOTE_EN_MASK
  25051. CG_FREQ_TRAN_VOTING_7__VCE_FREQ_THROTTLING_VOTE_EN__SHIFT
  25052. CG_FTV
  25053. CG_FTV_0
  25054. CG_FTV_1
  25055. CG_FTV_2
  25056. CG_FTV_3
  25057. CG_FTV_4
  25058. CG_FTV_5
  25059. CG_FTV_6
  25060. CG_FTV_7
  25061. CG_GCOOR
  25062. CG_GFX_3DCG_MASK
  25063. CG_GFX_3DCG_SHIFT
  25064. CG_GFX_3DLS_MASK
  25065. CG_GFX_3DLS_SHIFT
  25066. CG_GFX_BITMASK_FIRST_BIT
  25067. CG_GFX_BITMASK_LAST_BIT
  25068. CG_GFX_CGCG_MASK
  25069. CG_GFX_CGCG_SHIFT
  25070. CG_GFX_CGLS_MASK
  25071. CG_GFX_CGLS_SHIFT
  25072. CG_GFX_CP_LS_MASK
  25073. CG_GFX_CP_LS_SHIFT
  25074. CG_GFX_MASK
  25075. CG_GFX_OTHERS_MGCG_MASK
  25076. CG_GFX_OTHERS_MGCG_SHIFT
  25077. CG_GFX_RLC_LS_MASK
  25078. CG_GFX_RLC_LS_SHIFT
  25079. CG_GFX_SHIFT
  25080. CG_GICST
  25081. CG_GICST_MASK
  25082. CG_GICST_SHIFT
  25083. CG_GIPOT
  25084. CG_GIPOTS
  25085. CG_GIPOT_MASK
  25086. CG_GIPOT_SHIFT
  25087. CG_GIT
  25088. CG_HDP_MASK
  25089. CG_HDP_SHIFT
  25090. CG_IDLE_CG_DLY_CNT
  25091. CG_IDLE_CG_EN
  25092. CG_IH_SRC_ID_END
  25093. CG_IH_SRC_ID_START
  25094. CG_IND_ADDR
  25095. CG_IND_DATA
  25096. CG_INTGFX_MISC
  25097. CG_L
  25098. CG_LITTLE_ENDIAN
  25099. CG_LT
  25100. CG_L_MASK
  25101. CG_L_SHIFT
  25102. CG_MAGIC
  25103. CG_MCLK_CNTL__MCLK_DIR_CNTL_DIVIDER_MASK
  25104. CG_MCLK_CNTL__MCLK_DIR_CNTL_DIVIDER__SHIFT
  25105. CG_MCLK_CNTL__MCLK_DIR_CNTL_EN_MASK
  25106. CG_MCLK_CNTL__MCLK_DIR_CNTL_EN__SHIFT
  25107. CG_MCLK_CNTL__MCLK_DIR_CNTL_TOG_MASK
  25108. CG_MCLK_CNTL__MCLK_DIR_CNTL_TOG__SHIFT
  25109. CG_MCLK_CNTL__MCLK_DIVIDER_MASK
  25110. CG_MCLK_CNTL__MCLK_DIVIDER__SHIFT
  25111. CG_MCLK_STATUS__MCLK_DIR_CNTL_DONETOG_MASK
  25112. CG_MCLK_STATUS__MCLK_DIR_CNTL_DONETOG__SHIFT
  25113. CG_MCLK_STATUS__MCLK_STATUS_MASK
  25114. CG_MCLK_STATUS__MCLK_STATUS__SHIFT
  25115. CG_MC_MASK
  25116. CG_MC_SHIFT
  25117. CG_MISC_REG
  25118. CG_MPLL_FUNC_CNTL
  25119. CG_MPLL_FUNC_CNTL_2
  25120. CG_MPLL_FUNC_CNTL_3
  25121. CG_MPLL_SPREAD_SPECTRUM
  25122. CG_MULT_THERMAL_CTRL
  25123. CG_MULT_THERMAL_CTRL__TEMP_SEL_MASK
  25124. CG_MULT_THERMAL_CTRL__TEMP_SEL__SHIFT
  25125. CG_MULT_THERMAL_CTRL__THERMAL_RANGE_RST_MASK
  25126. CG_MULT_THERMAL_CTRL__THERMAL_RANGE_RST__SHIFT
  25127. CG_MULT_THERMAL_CTRL__THM_READY_CLEAR_MASK
  25128. CG_MULT_THERMAL_CTRL__THM_READY_CLEAR__SHIFT
  25129. CG_MULT_THERMAL_CTRL__TS_FILTER_MASK
  25130. CG_MULT_THERMAL_CTRL__TS_FILTER__SHIFT
  25131. CG_MULT_THERMAL_CTRL__UNUSED_MASK
  25132. CG_MULT_THERMAL_CTRL__UNUSED__SHIFT
  25133. CG_MULT_THERMAL_STATUS
  25134. CG_MULT_THERMAL_STATUS__ASIC_MAX_TEMP_MASK
  25135. CG_MULT_THERMAL_STATUS__ASIC_MAX_TEMP__SHIFT
  25136. CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK
  25137. CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT
  25138. CG_PATH
  25139. CG_PG_CNTL
  25140. CG_PG_CTRL
  25141. CG_PLL_8BIT
  25142. CG_PUMP_CTRL0__PUMP_PWM_HYSTER_MASK
  25143. CG_PUMP_CTRL0__PUMP_PWM_HYSTER__SHIFT
  25144. CG_PUMP_CTRL0__PUMP_PWM_MANUAL_MASK
  25145. CG_PUMP_CTRL0__PUMP_PWM_MANUAL__SHIFT
  25146. CG_PUMP_CTRL0__PUMP_PWM_RAMP_EN_MASK
  25147. CG_PUMP_CTRL0__PUMP_PWM_RAMP_EN__SHIFT
  25148. CG_PUMP_CTRL0__PUMP_PWM_RAMP_MASK
  25149. CG_PUMP_CTRL0__PUMP_PWM_RAMP__SHIFT
  25150. CG_PUMP_CTRL0__PUMP_SPINUP_DUTY_MASK
  25151. CG_PUMP_CTRL0__PUMP_SPINUP_DUTY__SHIFT
  25152. CG_PUMP_CTRL0__PUMP_STATIC_DUTY_MASK
  25153. CG_PUMP_CTRL0__PUMP_STATIC_DUTY__SHIFT
  25154. CG_PUMP_CTRL1__M_MASK
  25155. CG_PUMP_CTRL1__M__SHIFT
  25156. CG_PUMP_CTRL1__PMAX_DUTY100_MASK
  25157. CG_PUMP_CTRL1__PMAX_DUTY100__SHIFT
  25158. CG_PUMP_CTRL1__PMIN_DUTY_MASK
  25159. CG_PUMP_CTRL1__PMIN_DUTY__SHIFT
  25160. CG_PUMP_CTRL1__RESERVED_MASK
  25161. CG_PUMP_CTRL1__RESERVED__SHIFT
  25162. CG_PUMP_CTRL2__PUMP_PWM_MODE_MASK
  25163. CG_PUMP_CTRL2__PUMP_PWM_MODE__SHIFT
  25164. CG_PUMP_CTRL2__PUMP_SPINUP_TIME_MASK
  25165. CG_PUMP_CTRL2__PUMP_SPINUP_TIME__SHIFT
  25166. CG_PUMP_CTRL2__TACH_PWM_RESP_RATE_MASK
  25167. CG_PUMP_CTRL2__TACH_PWM_RESP_RATE__SHIFT
  25168. CG_PUMP_CTRL2__TMAX_MASK
  25169. CG_PUMP_CTRL2__TMAX__SHIFT
  25170. CG_PUMP_CTRL2__TMIN_HYSTER_MASK
  25171. CG_PUMP_CTRL2__TMIN_HYSTER__SHIFT
  25172. CG_PUMP_CTRL2__TMIN_MASK
  25173. CG_PUMP_CTRL2__TMIN__SHIFT
  25174. CG_PUMP_STATUS__PUMP_PWM_DUTY_MASK
  25175. CG_PUMP_STATUS__PUMP_PWM_DUTY__SHIFT
  25176. CG_PUMP_TACH_CTRL__EDGE_PER_REV_MASK
  25177. CG_PUMP_TACH_CTRL__EDGE_PER_REV__SHIFT
  25178. CG_PUMP_TACH_CTRL__TARGET_PERIOD_MASK
  25179. CG_PUMP_TACH_CTRL__TARGET_PERIOD__SHIFT
  25180. CG_PUMP_TACH_STATUS__TACH_PERIOD_MASK
  25181. CG_PUMP_TACH_STATUS__TACH_PERIOD__SHIFT
  25182. CG_PWR_GATING_CNTL
  25183. CG_R
  25184. CG_RLC_MGCG_MASK
  25185. CG_RLC_MGCG_SHIFT
  25186. CG_RLC_REQ_AND_RSP
  25187. CG_RLC_RSP_TYPE_MASK
  25188. CG_RLC_RSP_TYPE_SHIFT
  25189. CG_ROM_MASK
  25190. CG_ROM_SHIFT
  25191. CG_RT
  25192. CG_R_MASK
  25193. CG_R_SHIFT
  25194. CG_SAMU_MASK
  25195. CG_SAMU_SHIFT
  25196. CG_SCLK_CNTL
  25197. CG_SCLK_DPM_CTRL
  25198. CG_SCLK_DPM_CTRL_11
  25199. CG_SCLK_DPM_CTRL_2
  25200. CG_SCLK_DPM_CTRL_3
  25201. CG_SCLK_DPM_CTRL_4
  25202. CG_SCLK_DPM_CTRL_5
  25203. CG_SCLK_DPM_CTRL_6
  25204. CG_SCLK_STATUS
  25205. CG_SCRATCH1
  25206. CG_SCRATCH2
  25207. CG_SDMA_MASK
  25208. CG_SDMA_SHIFT
  25209. CG_SEQ_REQ
  25210. CG_SEQ_REQ_MASK
  25211. CG_SEQ_REQ_SHIFT
  25212. CG_SEQ_RESP
  25213. CG_SEQ_RESP_MASK
  25214. CG_SEQ_RESP_SHIFT
  25215. CG_SOCKOPT_ACCESS_FIELD
  25216. CG_SPLL_AUTOSCALE_CNTL
  25217. CG_SPLL_FUNC_CNTL
  25218. CG_SPLL_FUNC_CNTL_2
  25219. CG_SPLL_FUNC_CNTL_2__SCLK_MUX_SEL_MASK
  25220. CG_SPLL_FUNC_CNTL_2__SCLK_MUX_SEL__SHIFT
  25221. CG_SPLL_FUNC_CNTL_2__SCLK_MUX_UPDATE_MASK
  25222. CG_SPLL_FUNC_CNTL_2__SCLK_MUX_UPDATE__SHIFT
  25223. CG_SPLL_FUNC_CNTL_2__SPLL_BABY_STEP_CHG_MASK
  25224. CG_SPLL_FUNC_CNTL_2__SPLL_BABY_STEP_CHG__SHIFT
  25225. CG_SPLL_FUNC_CNTL_2__SPLL_BYPASS_CHG_MASK
  25226. CG_SPLL_FUNC_CNTL_2__SPLL_BYPASS_CHG__SHIFT
  25227. CG_SPLL_FUNC_CNTL_2__SPLL_CLKF_UPDATE_MASK
  25228. CG_SPLL_FUNC_CNTL_2__SPLL_CLKF_UPDATE__SHIFT
  25229. CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK
  25230. CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT
  25231. CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_MASK
  25232. CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ__SHIFT
  25233. CG_SPLL_FUNC_CNTL_2__SPLL_RESET_CHG_MASK
  25234. CG_SPLL_FUNC_CNTL_2__SPLL_RESET_CHG__SHIFT
  25235. CG_SPLL_FUNC_CNTL_2__SPLL_TEST_UNLOCK_CLR_MASK
  25236. CG_SPLL_FUNC_CNTL_2__SPLL_TEST_UNLOCK_CLR__SHIFT
  25237. CG_SPLL_FUNC_CNTL_2__SPLL_UNLOCK_CLEAR_MASK
  25238. CG_SPLL_FUNC_CNTL_2__SPLL_UNLOCK_CLEAR__SHIFT
  25239. CG_SPLL_FUNC_CNTL_3
  25240. CG_SPLL_FUNC_CNTL_3__SPLL_DITHEN_MASK
  25241. CG_SPLL_FUNC_CNTL_3__SPLL_DITHEN__SHIFT
  25242. CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK
  25243. CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV__SHIFT
  25244. CG_SPLL_FUNC_CNTL_4
  25245. CG_SPLL_FUNC_CNTL_4__PCC_INC_DIV_MASK
  25246. CG_SPLL_FUNC_CNTL_4__PCC_INC_DIV__SHIFT
  25247. CG_SPLL_FUNC_CNTL_4__SPLL_FBCLK_SEL_MASK
  25248. CG_SPLL_FUNC_CNTL_4__SPLL_FBCLK_SEL__SHIFT
  25249. CG_SPLL_FUNC_CNTL_4__SPLL_ILOCK_MASK
  25250. CG_SPLL_FUNC_CNTL_4__SPLL_ILOCK__SHIFT
  25251. CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_EN_MASK
  25252. CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_EN__SHIFT
  25253. CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_EXT_MASK
  25254. CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_EXT_SEL_MASK
  25255. CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_EXT_SEL__SHIFT
  25256. CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_EXT__SHIFT
  25257. CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL_MASK
  25258. CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL__SHIFT
  25259. CG_SPLL_FUNC_CNTL_4__SPLL_SPARE_EXT_MASK
  25260. CG_SPLL_FUNC_CNTL_4__SPLL_SPARE_EXT__SHIFT
  25261. CG_SPLL_FUNC_CNTL_4__SPLL_SPARE_MASK
  25262. CG_SPLL_FUNC_CNTL_4__SPLL_SPARE__SHIFT
  25263. CG_SPLL_FUNC_CNTL_4__SPLL_SSAMP_EN_MASK
  25264. CG_SPLL_FUNC_CNTL_4__SPLL_SSAMP_EN__SHIFT
  25265. CG_SPLL_FUNC_CNTL_4__SPLL_VCTRLADC_EN_MASK
  25266. CG_SPLL_FUNC_CNTL_4__SPLL_VCTRLADC_EN__SHIFT
  25267. CG_SPLL_FUNC_CNTL_4__SPLL_VTOI_BIAS_CNTL_MASK
  25268. CG_SPLL_FUNC_CNTL_4__SPLL_VTOI_BIAS_CNTL__SHIFT
  25269. CG_SPLL_FUNC_CNTL_4__TEST_FRAC_BYPASS_MASK
  25270. CG_SPLL_FUNC_CNTL_4__TEST_FRAC_BYPASS__SHIFT
  25271. CG_SPLL_FUNC_CNTL_5__FAST_LOCK_CNTRL_MASK
  25272. CG_SPLL_FUNC_CNTL_5__FAST_LOCK_CNTRL__SHIFT
  25273. CG_SPLL_FUNC_CNTL_5__FAST_LOCK_EN_MASK
  25274. CG_SPLL_FUNC_CNTL_5__FAST_LOCK_EN__SHIFT
  25275. CG_SPLL_FUNC_CNTL_5__FBDIV_SSC_BYPASS_MASK
  25276. CG_SPLL_FUNC_CNTL_5__FBDIV_SSC_BYPASS__SHIFT
  25277. CG_SPLL_FUNC_CNTL_5__PFD_RESET_CNTRL_MASK
  25278. CG_SPLL_FUNC_CNTL_5__PFD_RESET_CNTRL__SHIFT
  25279. CG_SPLL_FUNC_CNTL_5__PLLBYPASS_MASK
  25280. CG_SPLL_FUNC_CNTL_5__PLLBYPASS__SHIFT
  25281. CG_SPLL_FUNC_CNTL_5__REFCLK_BYPASS_EN_MASK
  25282. CG_SPLL_FUNC_CNTL_5__REFCLK_BYPASS_EN__SHIFT
  25283. CG_SPLL_FUNC_CNTL_5__RESET_ANTI_MUX_MASK
  25284. CG_SPLL_FUNC_CNTL_5__RESET_ANTI_MUX__SHIFT
  25285. CG_SPLL_FUNC_CNTL_5__RESET_TIMER_MASK
  25286. CG_SPLL_FUNC_CNTL_5__RESET_TIMER__SHIFT
  25287. CG_SPLL_FUNC_CNTL_5__RISEFBVCO_EN_MASK
  25288. CG_SPLL_FUNC_CNTL_5__RISEFBVCO_EN__SHIFT
  25289. CG_SPLL_FUNC_CNTL_6__SCLKMUX0_CLKOFF_CNT_MASK
  25290. CG_SPLL_FUNC_CNTL_6__SCLKMUX0_CLKOFF_CNT__SHIFT
  25291. CG_SPLL_FUNC_CNTL_6__SCLKMUX1_CLKOFF_CNT_MASK
  25292. CG_SPLL_FUNC_CNTL_6__SCLKMUX1_CLKOFF_CNT__SHIFT
  25293. CG_SPLL_FUNC_CNTL_6__SPLL_LF_CNTR_MASK
  25294. CG_SPLL_FUNC_CNTL_6__SPLL_LF_CNTR__SHIFT
  25295. CG_SPLL_FUNC_CNTL_6__SPLL_VCTL_CNTRL_IN_MASK
  25296. CG_SPLL_FUNC_CNTL_6__SPLL_VCTL_CNTRL_IN__SHIFT
  25297. CG_SPLL_FUNC_CNTL_6__SPLL_VCTL_CNTRL_OUT_MASK
  25298. CG_SPLL_FUNC_CNTL_6__SPLL_VCTL_CNTRL_OUT__SHIFT
  25299. CG_SPLL_FUNC_CNTL_6__SPLL_VCTL_EN_MASK
  25300. CG_SPLL_FUNC_CNTL_6__SPLL_VCTL_EN__SHIFT
  25301. CG_SPLL_FUNC_CNTL_7__SPLL_BW_CNTRL_MASK
  25302. CG_SPLL_FUNC_CNTL_7__SPLL_BW_CNTRL__SHIFT
  25303. CG_SPLL_FUNC_CNTL__SPLL_BGADJ_MASK
  25304. CG_SPLL_FUNC_CNTL__SPLL_BGADJ__SHIFT
  25305. CG_SPLL_FUNC_CNTL__SPLL_BG_PWRON_MASK
  25306. CG_SPLL_FUNC_CNTL__SPLL_BG_PWRON__SHIFT
  25307. CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN_MASK
  25308. CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN__SHIFT
  25309. CG_SPLL_FUNC_CNTL__SPLL_BYPASS_THRU_DFS_MASK
  25310. CG_SPLL_FUNC_CNTL__SPLL_BYPASS_THRU_DFS__SHIFT
  25311. CG_SPLL_FUNC_CNTL__SPLL_DIVA_ACK_MASK
  25312. CG_SPLL_FUNC_CNTL__SPLL_DIVA_ACK__SHIFT
  25313. CG_SPLL_FUNC_CNTL__SPLL_DIVEN_MASK
  25314. CG_SPLL_FUNC_CNTL__SPLL_DIVEN__SHIFT
  25315. CG_SPLL_FUNC_CNTL__SPLL_OTEST_LOCK_EN_MASK
  25316. CG_SPLL_FUNC_CNTL__SPLL_OTEST_LOCK_EN__SHIFT
  25317. CG_SPLL_FUNC_CNTL__SPLL_PDIV_A_EN_MASK
  25318. CG_SPLL_FUNC_CNTL__SPLL_PDIV_A_EN__SHIFT
  25319. CG_SPLL_FUNC_CNTL__SPLL_PDIV_A_MASK
  25320. CG_SPLL_FUNC_CNTL__SPLL_PDIV_A_UPDATE_MASK
  25321. CG_SPLL_FUNC_CNTL__SPLL_PDIV_A_UPDATE__SHIFT
  25322. CG_SPLL_FUNC_CNTL__SPLL_PDIV_A__SHIFT
  25323. CG_SPLL_FUNC_CNTL__SPLL_PWRON_MASK
  25324. CG_SPLL_FUNC_CNTL__SPLL_PWRON__SHIFT
  25325. CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK
  25326. CG_SPLL_FUNC_CNTL__SPLL_REF_DIV__SHIFT
  25327. CG_SPLL_FUNC_CNTL__SPLL_REG_BIAS_MASK
  25328. CG_SPLL_FUNC_CNTL__SPLL_REG_BIAS__SHIFT
  25329. CG_SPLL_FUNC_CNTL__SPLL_RESET_MASK
  25330. CG_SPLL_FUNC_CNTL__SPLL_RESET__SHIFT
  25331. CG_SPLL_SPREAD_SPECTRUM
  25332. CG_SPLL_SPREAD_SPECTRUM_2
  25333. CG_SPLL_SPREAD_SPECTRUM_2__CLKV_MASK
  25334. CG_SPLL_SPREAD_SPECTRUM_2__CLKV__SHIFT
  25335. CG_SPLL_SPREAD_SPECTRUM_LOW
  25336. CG_SPLL_SPREAD_SPECTRUM__CLKS_MASK
  25337. CG_SPLL_SPREAD_SPECTRUM__CLKS__SHIFT
  25338. CG_SPLL_SPREAD_SPECTRUM__SSEN_MASK
  25339. CG_SPLL_SPREAD_SPECTRUM__SSEN__SHIFT
  25340. CG_SPLL_STATUS
  25341. CG_SRBM_DEC0_END_ADDR
  25342. CG_SRBM_DEC0_START_ADDR
  25343. CG_SRBM_END_ADDR
  25344. CG_SRBM_START_ADDR
  25345. CG_SSP
  25346. CG_SST
  25347. CG_SSTU
  25348. CG_SSTU_MASK
  25349. CG_SST_MASK
  25350. CG_STATIC_SCREEN_PARAMETER__STATIC_SCREEN_THRESHOLD_MASK
  25351. CG_STATIC_SCREEN_PARAMETER__STATIC_SCREEN_THRESHOLD_UNIT_MASK
  25352. CG_STATIC_SCREEN_PARAMETER__STATIC_SCREEN_THRESHOLD_UNIT__SHIFT
  25353. CG_STATIC_SCREEN_PARAMETER__STATIC_SCREEN_THRESHOLD__SHIFT
  25354. CG_SYS_BIF_MGCG_MASK
  25355. CG_SYS_BIF_MGCG_SHIFT
  25356. CG_SYS_BIF_MGLS_MASK
  25357. CG_SYS_BIF_MGLS_SHIFT
  25358. CG_SYS_BITMASK_FIRST_BIT
  25359. CG_SYS_BITMASK_LAST_BIT
  25360. CG_SYS_DRM_MGCG_MASK
  25361. CG_SYS_DRM_MGCG_SHIFT
  25362. CG_SYS_DRM_MGLS_MASK
  25363. CG_SYS_DRM_MGLS_SHIFT
  25364. CG_SYS_HDP_MGCG_MASK
  25365. CG_SYS_HDP_MGCG_SHIFT
  25366. CG_SYS_HDP_MGLS_MASK
  25367. CG_SYS_HDP_MGLS_SHIFT
  25368. CG_SYS_MC_MGCG_MASK
  25369. CG_SYS_MC_MGCG_SHIFT
  25370. CG_SYS_MC_MGLS_MASK
  25371. CG_SYS_MC_MGLS_SHIFT
  25372. CG_SYS_ROM_MASK
  25373. CG_SYS_ROM_SHIFT
  25374. CG_SYS_SDMA_MGCG_MASK
  25375. CG_SYS_SDMA_MGCG_SHIFT
  25376. CG_SYS_SDMA_MGLS_MASK
  25377. CG_SYS_SDMA_MGLS_SHIFT
  25378. CG_TACH_CTRL
  25379. CG_TACH_CTRL__EDGE_PER_REV_MASK
  25380. CG_TACH_CTRL__EDGE_PER_REV__SHIFT
  25381. CG_TACH_CTRL__TARGET_PERIOD_MASK
  25382. CG_TACH_CTRL__TARGET_PERIOD__SHIFT
  25383. CG_TACH_STATUS
  25384. CG_TACH_STATUS__TACH_PERIOD_MASK
  25385. CG_TACH_STATUS__TACH_PERIOD__SHIFT
  25386. CG_TCI_MPLL_SPREAD_SPECTRUM
  25387. CG_TCI_MPLL_SPREAD_SPECTRUM_2
  25388. CG_THERMAL_CTRL
  25389. CG_THERMAL_CTRL__CTF_PAD_EN_MASK
  25390. CG_THERMAL_CTRL__CTF_PAD_EN__SHIFT
  25391. CG_THERMAL_CTRL__CTF_PAD_POLARITY_MASK
  25392. CG_THERMAL_CTRL__CTF_PAD_POLARITY__SHIFT
  25393. CG_THERMAL_CTRL__DIG_THERM_DPM_MASK
  25394. CG_THERMAL_CTRL__DIG_THERM_DPM__SHIFT
  25395. CG_THERMAL_CTRL__DPM_EVENT_SRC_MASK
  25396. CG_THERMAL_CTRL__DPM_EVENT_SRC__SHIFT
  25397. CG_THERMAL_CTRL__RESERVED_MASK
  25398. CG_THERMAL_CTRL__RESERVED__SHIFT
  25399. CG_THERMAL_CTRL__SPARE_MASK
  25400. CG_THERMAL_CTRL__SPARE__SHIFT
  25401. CG_THERMAL_CTRL__THERM_INC_CLK_MASK
  25402. CG_THERMAL_CTRL__THERM_INC_CLK__SHIFT
  25403. CG_THERMAL_INT
  25404. CG_THERMAL_INT_CTRL
  25405. CG_THERMAL_INT_CTRL__DIG_THERM_INTH_MASK
  25406. CG_THERMAL_INT_CTRL__DIG_THERM_INTH__SHIFT
  25407. CG_THERMAL_INT_CTRL__DIG_THERM_INTL_MASK
  25408. CG_THERMAL_INT_CTRL__DIG_THERM_INTL__SHIFT
  25409. CG_THERMAL_INT_CTRL__GNB_TEMP_THRESHOLD_MASK
  25410. CG_THERMAL_INT_CTRL__GNB_TEMP_THRESHOLD__SHIFT
  25411. CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK
  25412. CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA__SHIFT
  25413. CG_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK
  25414. CG_THERMAL_INT_CTRL__THERM_INTH_MASK__SHIFT
  25415. CG_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK
  25416. CG_THERMAL_INT_CTRL__THERM_INTL_MASK__SHIFT
  25417. CG_THERMAL_INT_CTRL__THERM_TRIGGER_CNB_MASK_MASK
  25418. CG_THERMAL_INT_CTRL__THERM_TRIGGER_CNB_MASK__SHIFT
  25419. CG_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK
  25420. CG_THERMAL_INT_CTRL__THERM_TRIGGER_MASK__SHIFT
  25421. CG_THERMAL_INT_ENA__THERM_INTH_CLR_MASK
  25422. CG_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT
  25423. CG_THERMAL_INT_ENA__THERM_INTH_SET_MASK
  25424. CG_THERMAL_INT_ENA__THERM_INTH_SET__SHIFT
  25425. CG_THERMAL_INT_ENA__THERM_INTL_CLR_MASK
  25426. CG_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT
  25427. CG_THERMAL_INT_ENA__THERM_INTL_SET_MASK
  25428. CG_THERMAL_INT_ENA__THERM_INTL_SET__SHIFT
  25429. CG_THERMAL_INT_ENA__THERM_TRIGGER_CLR_MASK
  25430. CG_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT
  25431. CG_THERMAL_INT_ENA__THERM_TRIGGER_SET_MASK
  25432. CG_THERMAL_INT_ENA__THERM_TRIGGER_SET__SHIFT
  25433. CG_THERMAL_INT_STATUS__THERM_INTH_DETECT_MASK
  25434. CG_THERMAL_INT_STATUS__THERM_INTH_DETECT__SHIFT
  25435. CG_THERMAL_INT_STATUS__THERM_INTL_DETECT_MASK
  25436. CG_THERMAL_INT_STATUS__THERM_INTL_DETECT__SHIFT
  25437. CG_THERMAL_INT_STATUS__THERM_TRIGGER_CNB_DETECT_MASK
  25438. CG_THERMAL_INT_STATUS__THERM_TRIGGER_CNB_DETECT__SHIFT
  25439. CG_THERMAL_INT_STATUS__THERM_TRIGGER_DETECT_MASK
  25440. CG_THERMAL_INT_STATUS__THERM_TRIGGER_DETECT__SHIFT
  25441. CG_THERMAL_INT__DIG_THERM_CTF_MASK
  25442. CG_THERMAL_INT__DIG_THERM_CTF__SHIFT
  25443. CG_THERMAL_INT__DIG_THERM_INTH_MASK
  25444. CG_THERMAL_INT__DIG_THERM_INTH__SHIFT
  25445. CG_THERMAL_INT__DIG_THERM_INTL_MASK
  25446. CG_THERMAL_INT__DIG_THERM_INTL__SHIFT
  25447. CG_THERMAL_INT__THERM_INT_MASK_MASK
  25448. CG_THERMAL_INT__THERM_INT_MASK__SHIFT
  25449. CG_THERMAL_RANGE__ASIC_T_MAX_MASK
  25450. CG_THERMAL_RANGE__ASIC_T_MAX__SHIFT
  25451. CG_THERMAL_RANGE__ASIC_T_MIN_MASK
  25452. CG_THERMAL_RANGE__ASIC_T_MIN__SHIFT
  25453. CG_THERMAL_STATUS
  25454. CG_THERMAL_STATUS__FDO_PWM_DUTY_MASK
  25455. CG_THERMAL_STATUS__FDO_PWM_DUTY__SHIFT
  25456. CG_THERMAL_STATUS__GEN_STATUS_MASK
  25457. CG_THERMAL_STATUS__GEN_STATUS__SHIFT
  25458. CG_THERMAL_STATUS__SPARE_MASK
  25459. CG_THERMAL_STATUS__SPARE__SHIFT
  25460. CG_THERMAL_STATUS__THERM_ALERT_MASK
  25461. CG_THERMAL_STATUS__THERM_ALERT__SHIFT
  25462. CG_TIMESTAMP_HIGH__CG_HIGH_MASK
  25463. CG_TIMESTAMP_HIGH__CG_HIGH__SHIFT
  25464. CG_TIMESTAMP_LOW__CG_LOW_MASK
  25465. CG_TIMESTAMP_LOW__CG_LOW__SHIFT
  25466. CG_TPC
  25467. CG_TRX_HW_ANTDIV
  25468. CG_TRX_SMART_ANTDIV
  25469. CG_TS0_STATUS
  25470. CG_ULV_CONTROL
  25471. CG_ULV_PARAMETER
  25472. CG_ULV_PARAMETER__ULV_THRESHOLD_MASK
  25473. CG_ULV_PARAMETER__ULV_THRESHOLD_UNIT_MASK
  25474. CG_ULV_PARAMETER__ULV_THRESHOLD_UNIT__SHIFT
  25475. CG_ULV_PARAMETER__ULV_THRESHOLD__SHIFT
  25476. CG_UPLL_FUNC_CNTL
  25477. CG_UPLL_FUNC_CNTL_2
  25478. CG_UPLL_FUNC_CNTL_3
  25479. CG_UPLL_FUNC_CNTL_4
  25480. CG_UPLL_FUNC_CNTL_5
  25481. CG_UPLL_SPREAD_SPECTRUM
  25482. CG_UVD_MASK
  25483. CG_UVD_SHIFT
  25484. CG_VCEPLL_FUNC_CNTL
  25485. CG_VCEPLL_FUNC_CNTL_2
  25486. CG_VCEPLL_FUNC_CNTL_3
  25487. CG_VCEPLL_FUNC_CNTL_4
  25488. CG_VCEPLL_FUNC_CNTL_5
  25489. CG_VCEPLL_SPREAD_SPECTRUM
  25490. CG_VCE_MASK
  25491. CG_VCE_SHIFT
  25492. CG_VCLK_CNTL
  25493. CG_VCLK_CNTL__VCLK_DIR_CNTL_DIVIDER_MASK
  25494. CG_VCLK_CNTL__VCLK_DIR_CNTL_DIVIDER__SHIFT
  25495. CG_VCLK_CNTL__VCLK_DIR_CNTL_EN_MASK
  25496. CG_VCLK_CNTL__VCLK_DIR_CNTL_EN__SHIFT
  25497. CG_VCLK_CNTL__VCLK_DIR_CNTL_TOG_MASK
  25498. CG_VCLK_CNTL__VCLK_DIR_CNTL_TOG__SHIFT
  25499. CG_VCLK_CNTL__VCLK_DIVIDER_MASK
  25500. CG_VCLK_CNTL__VCLK_DIVIDER__SHIFT
  25501. CG_VCLK_STATUS
  25502. CG_VCLK_STATUS__VCLK_DIR_CNTL_DONETOG_MASK
  25503. CG_VCLK_STATUS__VCLK_DIR_CNTL_DONETOG__SHIFT
  25504. CG_VCLK_STATUS__VCLK_STATUS_MASK
  25505. CG_VCLK_STATUS__VCLK_STATUS__SHIFT
  25506. CG_VDDC3D_OOR
  25507. CG_VER3
  25508. CG_VOLTAGE_EN
  25509. CG_WAKEUP_DLY_CNT
  25510. CG_XDMA_MASK
  25511. CG_XDMA_SHIFT
  25512. CH0BA
  25513. CH0BBC
  25514. CH0BUFS
  25515. CH0BUFW
  25516. CH0CA
  25517. CH0CBC
  25518. CH0CFG
  25519. CH0DEFAULTQUEUE_G
  25520. CH0DEFAULTQUEUE_M
  25521. CH0DEFAULTQUEUE_S
  25522. CH0DEFAULTQUEUE_V
  25523. CH0DEN
  25524. CH0ENDC
  25525. CH0ENDE
  25526. CH0ENDS
  25527. CH0ERRC
  25528. CH0ERRE
  25529. CH0ERRS
  25530. CH0INT0
  25531. CH0INT0EN
  25532. CH0SHCTRL
  25533. CH0STCLR
  25534. CH0TMR0EN
  25535. CH0_AMP_400_MV
  25536. CH0_BLOCK
  25537. CH0_CNT
  25538. CH0_CTL
  25539. CH0_PD
  25540. CH0_REL
  25541. CH0_TEST
  25542. CH1
  25543. CH1BA
  25544. CH1BBC
  25545. CH1BUFS
  25546. CH1BUFW
  25547. CH1CA
  25548. CH1CBC
  25549. CH1CFG
  25550. CH1DEFAULTQUEUE_G
  25551. CH1DEFAULTQUEUE_M
  25552. CH1DEFAULTQUEUE_S
  25553. CH1DEFAULTQUEUE_V
  25554. CH1DEN
  25555. CH1ENDC
  25556. CH1ENDE
  25557. CH1ENDS
  25558. CH1ERRC
  25559. CH1ERRE
  25560. CH1ERRS
  25561. CH1SHCTRL
  25562. CH1STCLR
  25563. CH1TMR0EN
  25564. CH1_AMP_400_MV
  25565. CH1_BLOCK
  25566. CH1_CNT
  25567. CH1_CTL
  25568. CH1_PD
  25569. CH1_REL
  25570. CH1_TEST
  25571. CH2_AMP_400_MV
  25572. CH2_BLOCK
  25573. CH2_PD
  25574. CH341_BAUDBASE_DIVMAX
  25575. CH341_BAUDBASE_FACTOR
  25576. CH341_BITS_MODEM_STAT
  25577. CH341_BIT_CTS
  25578. CH341_BIT_DCD
  25579. CH341_BIT_DSR
  25580. CH341_BIT_DTR
  25581. CH341_BIT_RI
  25582. CH341_BIT_RTS
  25583. CH341_LCR_CS5
  25584. CH341_LCR_CS6
  25585. CH341_LCR_CS7
  25586. CH341_LCR_CS8
  25587. CH341_LCR_ENABLE_PAR
  25588. CH341_LCR_ENABLE_RX
  25589. CH341_LCR_ENABLE_TX
  25590. CH341_LCR_MARK_SPACE
  25591. CH341_LCR_PAR_EVEN
  25592. CH341_LCR_STOP_BITS_2
  25593. CH341_MULT_STAT
  25594. CH341_NBREAK_BITS
  25595. CH341_REG_BREAK
  25596. CH341_REG_LCR
  25597. CH341_REQ_MODEM_CTRL
  25598. CH341_REQ_READ_REG
  25599. CH341_REQ_READ_VERSION
  25600. CH341_REQ_SERIAL_INIT
  25601. CH341_REQ_WRITE_REG
  25602. CH3_AMP_400_MV
  25603. CH3_BLOCK
  25604. CH3_PD
  25605. CH4SCSI_BRIDGE_INDEX
  25606. CH7006_ACTIVE_DSTART
  25607. CH7006_ACTIVE_HSYNC
  25608. CH7006_BCLKOUT
  25609. CH7006_BLACK_LEVEL
  25610. CH7006_BLACK_LEVEL_0
  25611. CH7006_BWIDTH
  25612. CH7006_BWIDTH_5L_FFILER
  25613. CH7006_BWIDTH_CHROMA
  25614. CH7006_BWIDTH_CVBS_LUMA
  25615. CH7006_BWIDTH_CVBS_NO_CHROMA
  25616. CH7006_BWIDTH_SVIDEO_LUMA
  25617. CH7006_BWIDTH_SVIDEO_YPEAK
  25618. CH7006_CALC_SUBC_INC0
  25619. CH7006_CALC_SUBC_INC0_24
  25620. CH7006_CALC_SUBC_INC0_AUTO
  25621. CH7006_CALC_SUBC_INC0_HYST
  25622. CH7006_CALC_SUBC_INC1
  25623. CH7006_CALC_SUBC_INC1_16
  25624. CH7006_CALC_SUBC_INC2
  25625. CH7006_CALC_SUBC_INC2_8
  25626. CH7006_CALC_SUBC_INC3
  25627. CH7006_CALC_SUBC_INC3_0
  25628. CH7006_CLKMODE
  25629. CH7006_CLKMODE_MASTER
  25630. CH7006_CLKMODE_PCM
  25631. CH7006_CLKMODE_POS_EDGE
  25632. CH7006_CLKMODE_SUBC_LOCK
  25633. CH7006_CLKMODE_XCM
  25634. CH7006_CLOCK_EDGE_NEG
  25635. CH7006_CLOCK_EDGE_POS
  25636. CH7006_CLOCK_MASTER
  25637. CH7006_CLOCK_SLAVE
  25638. CH7006_CONTRAST
  25639. CH7006_CONTRAST_0
  25640. CH7006_DETECT
  25641. CH7006_DETECT_CVBS_TEST
  25642. CH7006_DETECT_SENSE
  25643. CH7006_DETECT_SVIDEO_C_TEST
  25644. CH7006_DETECT_SVIDEO_Y_TEST
  25645. CH7006_DISPMODE
  25646. CH7006_DISPMODE_INPUT_RES
  25647. CH7006_DISPMODE_INPUT_RES_512x384
  25648. CH7006_DISPMODE_INPUT_RES_640x400
  25649. CH7006_DISPMODE_INPUT_RES_640x480
  25650. CH7006_DISPMODE_INPUT_RES_720x400
  25651. CH7006_DISPMODE_INPUT_RES_800x600
  25652. CH7006_DISPMODE_INPUT_RES_NATIVE
  25653. CH7006_DISPMODE_OUTPUT_STD
  25654. CH7006_DISPMODE_OUTPUT_STD_NTSC
  25655. CH7006_DISPMODE_OUTPUT_STD_NTSC_J
  25656. CH7006_DISPMODE_OUTPUT_STD_PAL
  25657. CH7006_DISPMODE_OUTPUT_STD_PAL_M
  25658. CH7006_DISPMODE_SCALING_RATIO
  25659. CH7006_DISPMODE_SCALING_RATIO_1_1
  25660. CH7006_DISPMODE_SCALING_RATIO_3_4
  25661. CH7006_DISPMODE_SCALING_RATIO_5_4
  25662. CH7006_DISPMODE_SCALING_RATIO_5_6
  25663. CH7006_DISPMODE_SCALING_RATIO_7_10
  25664. CH7006_DISPMODE_SCALING_RATIO_7_8
  25665. CH7006_FFILTER
  25666. CH7006_FFILTER_CHROMA
  25667. CH7006_FFILTER_CHROMA_NO_DCRAWL
  25668. CH7006_FFILTER_LUMA
  25669. CH7006_FFILTER_TEXT
  25670. CH7006_FORMAT_RGB15
  25671. CH7006_FORMAT_RGB15m8
  25672. CH7006_FORMAT_RGB16
  25673. CH7006_FORMAT_RGB16m8
  25674. CH7006_FORMAT_RGB24m12C
  25675. CH7006_FORMAT_RGB24m12I
  25676. CH7006_FORMAT_RGB24m16
  25677. CH7006_FORMAT_RGB24m8
  25678. CH7006_FORMAT_YCrCb24m16
  25679. CH7006_FORMAT_YCrCb24m8
  25680. CH7006_FREQ0
  25681. CH7006_HPOS
  25682. CH7006_HPOS_0
  25683. CH7006_INPUT_FORMAT
  25684. CH7006_INPUT_FORMAT_DAC_GAIN
  25685. CH7006_INPUT_FORMAT_FORMAT
  25686. CH7006_INPUT_FORMAT_FORMAT_RGB15
  25687. CH7006_INPUT_FORMAT_FORMAT_RGB15m8
  25688. CH7006_INPUT_FORMAT_FORMAT_RGB16
  25689. CH7006_INPUT_FORMAT_FORMAT_RGB16m8
  25690. CH7006_INPUT_FORMAT_FORMAT_RGB24m12C
  25691. CH7006_INPUT_FORMAT_FORMAT_RGB24m12I
  25692. CH7006_INPUT_FORMAT_FORMAT_RGB24m16
  25693. CH7006_INPUT_FORMAT_FORMAT_RGB24m8
  25694. CH7006_INPUT_FORMAT_FORMAT_YCrCb24m16
  25695. CH7006_INPUT_FORMAT_FORMAT_YCrCb24m8
  25696. CH7006_INPUT_FORMAT_RGB_PASS_THROUGH
  25697. CH7006_INPUT_SYNC
  25698. CH7006_INPUT_SYNC_EMBEDDED
  25699. CH7006_INPUT_SYNC_OUTPUT
  25700. CH7006_INPUT_SYNC_PHSYNC
  25701. CH7006_INPUT_SYNC_PVSYNC
  25702. CH7006_MAXM
  25703. CH7006_MAXN
  25704. CH7006_PLLM
  25705. CH7006_PLLM_0
  25706. CH7006_PLLN
  25707. CH7006_PLLN_0
  25708. CH7006_PLLOV
  25709. CH7006_PLLOV_M_8
  25710. CH7006_PLLOV_N_8
  25711. CH7006_PLL_CONTROL
  25712. CH7006_PLL_CONTROL_7STAGES
  25713. CH7006_PLL_CONTROL_ANALOG_5V
  25714. CH7006_PLL_CONTROL_CAPACITOR
  25715. CH7006_PLL_CONTROL_CPI
  25716. CH7006_PLL_CONTROL_DIGITAL_5V
  25717. CH7006_PLL_CONTROL_MEMORY_5V
  25718. CH7006_POUT_1_8V
  25719. CH7006_POUT_3_3V
  25720. CH7006_POV
  25721. CH7006_POV_HPOS_8
  25722. CH7006_POV_START_ACTIVE_8
  25723. CH7006_POV_VPOS_8
  25724. CH7006_POWER
  25725. CH7006_POWER_LEVEL
  25726. CH7006_POWER_LEVEL_CVBS_OFF
  25727. CH7006_POWER_LEVEL_FULL_POWER_OFF
  25728. CH7006_POWER_LEVEL_NORMAL
  25729. CH7006_POWER_LEVEL_POWER_OFF
  25730. CH7006_POWER_LEVEL_SVIDEO_OFF
  25731. CH7006_POWER_RESET
  25732. CH7006_POWER_SCART
  25733. CH7006_START_ACTIVE
  25734. CH7006_START_ACTIVE_0
  25735. CH7006_SUBC_INC0
  25736. CH7006_SUBC_INC0_28
  25737. CH7006_SUBC_INC1
  25738. CH7006_SUBC_INC1_24
  25739. CH7006_SUBC_INC2
  25740. CH7006_SUBC_INC2_20
  25741. CH7006_SUBC_INC3
  25742. CH7006_SUBC_INC3_16
  25743. CH7006_SUBC_INC3_GPIO0_VAL
  25744. CH7006_SUBC_INC3_GPIO1_VAL
  25745. CH7006_SUBC_INC3_POUT_3_3V
  25746. CH7006_SUBC_INC3_POUT_INV
  25747. CH7006_SUBC_INC4
  25748. CH7006_SUBC_INC4_12
  25749. CH7006_SUBC_INC4_DS_INPUT
  25750. CH7006_SUBC_INC4_GPIO0_IN
  25751. CH7006_SUBC_INC4_GPIO1_IN
  25752. CH7006_SUBC_INC5
  25753. CH7006_SUBC_INC5_8
  25754. CH7006_SUBC_INC6
  25755. CH7006_SUBC_INC6_4
  25756. CH7006_SUBC_INC7
  25757. CH7006_SUBC_INC7_0
  25758. CH7006_SYNC_EMBEDDED
  25759. CH7006_SYNC_MASTER
  25760. CH7006_SYNC_SEPARATED
  25761. CH7006_SYNC_SLAVE
  25762. CH7006_VERSION_ID
  25763. CH7006_VPOS
  25764. CH7006_VPOS_0
  25765. CH7009A_VID
  25766. CH7009B_VID
  25767. CH7010B_VID
  25768. CH7010_DID
  25769. CH7011_VID
  25770. CH7017_ACTIVE_INPUT_LINE_OUTPUT
  25771. CH7017_BANG_LIMIT_CONTROL
  25772. CH7017_BLACK_LEVEL
  25773. CH7017_BUFFERED_CLOCK_OUTPUT
  25774. CH7017_CHARGE_PUMP_HIGH
  25775. CH7017_CHARGE_PUMP_LOW
  25776. CH7017_CHROMA_BOOST
  25777. CH7017_CIV_0
  25778. CH7017_CIV_CONTROL
  25779. CH7017_CLOCK_MODE
  25780. CH7017_CONNECTION_DETECT
  25781. CH7017_CONTRAST_ENHANCEMENT
  25782. CH7017_DAC0_POWER_DOWN
  25783. CH7017_DAC1_POWER_DOWN
  25784. CH7017_DAC2_POWER_DOWN
  25785. CH7017_DAC3_POWER_DOWN
  25786. CH7017_DAC_CONTROL
  25787. CH7017_DDC_SELECT_DC2
  25788. CH7017_DEFEAT_VSYNC
  25789. CH7017_DEVICE_ID
  25790. CH7017_DEVICE_ID_VALUE
  25791. CH7017_FLICKER_FILTER
  25792. CH7017_GPIO_CONTROL
  25793. CH7017_GPIO_DATA
  25794. CH7017_GPIO_DIRECTION_CONTROL
  25795. CH7017_GPIO_DRIVER_TYPE
  25796. CH7017_GPIO_INVERT
  25797. CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT
  25798. CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT
  25799. CH7017_HORIZONTAL_POSITION
  25800. CH7017_INPUT_CLOCK
  25801. CH7017_INPUT_DATA_FORMAT
  25802. CH7017_LOOP_FILTER_SHIFT
  25803. CH7017_LVDS_24_BIT
  25804. CH7017_LVDS_BKLEN
  25805. CH7017_LVDS_CHANNEL_A
  25806. CH7017_LVDS_CHANNEL_B
  25807. CH7017_LVDS_CONTROL_2
  25808. CH7017_LVDS_DITHER_2D
  25809. CH7017_LVDS_DITHER_DIS
  25810. CH7017_LVDS_DUAL_CHANNEL_EN
  25811. CH7017_LVDS_ENCODING
  25812. CH7017_LVDS_ENCODING_2
  25813. CH7017_LVDS_HAP_HIGH_MASK
  25814. CH7017_LVDS_HAP_INPUT_MASK
  25815. CH7017_LVDS_OUTPUT_AMPLITUDE
  25816. CH7017_LVDS_PANEN
  25817. CH7017_LVDS_PLL_CONTROL
  25818. CH7017_LVDS_PLL_EMI_REDUCTION
  25819. CH7017_LVDS_PLL_FEEDBACK_DEFAULT_RESERVED
  25820. CH7017_LVDS_PLL_FEEDBACK_DIV
  25821. CH7017_LVDS_PLL_FEED_BACK_DIVIDER_SHIFT
  25822. CH7017_LVDS_PLL_FEED_FORWARD_DIVIDER_SHIFT
  25823. CH7017_LVDS_PLL_POST_SCALE_DIV_SHIFT
  25824. CH7017_LVDS_PLL_VCO_CONTROL
  25825. CH7017_LVDS_PLL_VCO_DEFAULT_RESERVED
  25826. CH7017_LVDS_PLL_VCO_SHIFT
  25827. CH7017_LVDS_POWER_DOWN
  25828. CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED
  25829. CH7017_LVDS_POWER_DOWN_EN
  25830. CH7017_LVDS_POWER_DOWN_FLICKER
  25831. CH7017_LVDS_UPSCALER_EN
  25832. CH7017_LVDS_VAL_HIGH_MASK
  25833. CH7017_OUTPUTS_ENABLE
  25834. CH7017_PHASE_DETECTOR_SHIFT
  25835. CH7017_POWER_MANAGEMENT
  25836. CH7017_POWER_SEQUENCING_T1
  25837. CH7017_POWER_SEQUENCING_T2
  25838. CH7017_POWER_SEQUENCING_T3
  25839. CH7017_POWER_SEQUENCING_T4
  25840. CH7017_POWER_SEQUENCING_T5
  25841. CH7017_START_ACTIVE_VIDEO
  25842. CH7017_SUB_CARRIER_0
  25843. CH7017_TEST_PATTERN
  25844. CH7017_TEXT_ENHANCEMENT
  25845. CH7017_TV_DAC_A
  25846. CH7017_TV_DAC_B
  25847. CH7017_TV_DISPLAY_MODE
  25848. CH7017_TV_EN
  25849. CH7017_TV_PLL
  25850. CH7017_TV_PLL_M
  25851. CH7017_TV_PLL_N
  25852. CH7017_TV_POWER_DOWN_EN
  25853. CH7017_UP_SCALER_COEFF_0
  25854. CH7017_UP_SCALER_COEFF_1
  25855. CH7017_UP_SCALER_COEFF_2
  25856. CH7017_UP_SCALER_COEFF_3
  25857. CH7017_UP_SCALER_COEFF_4
  25858. CH7017_UP_SCALER_HORIZONTAL_INC_0
  25859. CH7017_UP_SCALER_HORIZONTAL_INC_1
  25860. CH7017_UP_SCALER_VERTICAL_INC_0
  25861. CH7017_UP_SCALER_VERTICAL_INC_1
  25862. CH7017_VERSION_ID
  25863. CH7017_VERTICAL_ACTIVE_LINE_OUTPUT
  25864. CH7017_VERTICAL_POSITION
  25865. CH7017_VIDEO_BANDWIDTH
  25866. CH7017_XCLK_D2_ADJUST
  25867. CH7018_DEVICE_ID_VALUE
  25868. CH7019_DEVICE_ID_VALUE
  25869. CH7301_DAC_CNTL
  25870. CH7301_HOTPLUG
  25871. CH7301_PM_DACPD0
  25872. CH7301_PM_DACPD1
  25873. CH7301_PM_DACPD2
  25874. CH7301_SYNC_POLARITY
  25875. CH7301_SYNC_POL_DVI
  25876. CH7301_SYNC_RGB_YUV
  25877. CH7301_TEST_PATTERN
  25878. CH7301_VID
  25879. CH7xxx_ADDR
  25880. CH7xxx_CDET_DVI
  25881. CH7xxx_CM
  25882. CH7xxx_CM_MCP
  25883. CH7xxx_CM_XCM
  25884. CH7xxx_CONNECTION_DETECT
  25885. CH7xxx_DID
  25886. CH7xxx_GPIO
  25887. CH7xxx_GPIO_HPIR
  25888. CH7xxx_IDF
  25889. CH7xxx_IDF_HSP
  25890. CH7xxx_IDF_VSP
  25891. CH7xxx_INPUT_CLOCK
  25892. CH7xxx_NUM_REGS
  25893. CH7xxx_PM
  25894. CH7xxx_PM_DVIL
  25895. CH7xxx_PM_DVIP
  25896. CH7xxx_PM_FPD
  25897. CH7xxx_REG_DID
  25898. CH7xxx_REG_VID
  25899. CH7xxx_TCT
  25900. CH7xxx_TCTL
  25901. CH7xxx_TLPF
  25902. CH7xxx_TPCP
  25903. CH7xxx_TPD
  25904. CH7xxx_TPVT
  25905. CH7xxx_TVCO
  25906. CH7xxx_VID
  25907. CH9200_PID_E092
  25908. CH9200_VID
  25909. CHA
  25910. CHACHAPOLY_DESC_JOB_IO_LEN
  25911. CHACHAPOLY_IV_SIZE
  25912. CHACHA_BLOCK_SIZE
  25913. CHACHA_IV_SIZE
  25914. CHACHA_KEY_SIZE
  25915. CHACHA_STATE_ALIGN
  25916. CHAEXT
  25917. CHAFSR_BERR
  25918. CHAFSR_CE
  25919. CHAFSR_CPC
  25920. CHAFSR_CPU
  25921. CHAFSR_EDC
  25922. CHAFSR_EDU
  25923. CHAFSR_EMC
  25924. CHAFSR_EMU
  25925. CHAFSR_ERRORS
  25926. CHAFSR_E_SYNDROME
  25927. CHAFSR_E_SYNDROME_SHIFT
  25928. CHAFSR_IERR
  25929. CHAFSR_INVALID
  25930. CHAFSR_ISAP
  25931. CHAFSR_IVC
  25932. CHAFSR_IVU
  25933. CHAFSR_ME
  25934. CHAFSR_M_SYNDROME
  25935. CHAFSR_M_SYNDROME_SHIFT
  25936. CHAFSR_PERR
  25937. CHAFSR_PRIV
  25938. CHAFSR_TL1
  25939. CHAFSR_TO
  25940. CHAFSR_UCC
  25941. CHAFSR_UCU
  25942. CHAFSR_UE
  25943. CHAFSR_WDC
  25944. CHAFSR_WDU
  25945. CHAIN
  25946. CHAINED_REQUEST
  25947. CHAINHASH_BITS
  25948. CHAINHASH_SIZE
  25949. CHAIN_A
  25950. CHAIN_B
  25951. CHAIN_C
  25952. CHAIN_FLAT
  25953. CHAIN_FOLDED
  25954. CHAIN_GRAPH_ABS
  25955. CHAIN_GRAPH_REL
  25956. CHAIN_ID_MASK
  25957. CHAIN_ID_SHIFT
  25958. CHAIN_NOISE_DELTA_GAIN_INIT_VAL
  25959. CHAIN_NOISE_MAX_DELTA_GAIN_CODE
  25960. CHAIN_NONE
  25961. CHALLENGE_LEN
  25962. CHALLENGE_MESSAGE
  25963. CHAMELEONV2_MAGIC
  25964. CHAMELEON_BAR_MAX
  25965. CHAMELEON_BUS_AVALON
  25966. CHAMELEON_BUS_ISA
  25967. CHAMELEON_BUS_LPC
  25968. CHAMELEON_BUS_WISHBONE
  25969. CHAMELEON_DTYPE_BAR
  25970. CHAMELEON_DTYPE_BRIDGE
  25971. CHAMELEON_DTYPE_CPU
  25972. CHAMELEON_DTYPE_END
  25973. CHAMELEON_DTYPE_GENERAL
  25974. CHAMELEON_FILENAME_LEN
  25975. CHAM_HEADER_SIZE
  25976. CHAN
  25977. CHAN0
  25978. CHAN0_ALRDY_HOLD_IRQ
  25979. CHAN0_DATA_IRQ
  25980. CHAN0_EN
  25981. CHAN0_HOLD_IRQ
  25982. CHAN0_KEYDOWN_IRQ
  25983. CHAN0_KEYUP_IRQ
  25984. CHAN1
  25985. CHAN1_ALRDY_HOLD_IRQ
  25986. CHAN1_DATA_IRQ
  25987. CHAN1_EN
  25988. CHAN1_HOLD_IRQ
  25989. CHAN1_KEYDOWN_IRQ
  25990. CHAN1_KEYUP_IRQ
  25991. CHAN2
  25992. CHAN2BANKPORT
  25993. CHAN2G
  25994. CHAN2GHZ
  25995. CHAN2G_FREQ
  25996. CHAN2PORTBANK
  25997. CHAN2PORTMASK
  25998. CHAN2_EN
  25999. CHAN3_EN
  26000. CHAN4G
  26001. CHAN5G
  26002. CHAN5GHZ
  26003. CHAN5G_FREQ
  26004. CHAN60G
  26005. CHAN7_MUX_CH7_INPUT
  26006. CHAN7_MUX_VDD
  26007. CHAN7_MUX_VDD_DIV2
  26008. CHAN7_MUX_VDD_DIV4
  26009. CHAN7_MUX_VDD_MUL3_DIV4
  26010. CHAN7_MUX_VSS
  26011. CHANCTRL
  26012. CHANCTX_ASSIGN
  26013. CHANCTX_ENTRY
  26014. CHANCTX_PR_ARG
  26015. CHANCTX_PR_FMT
  26016. CHANCTX_SWMODE_REASSIGN_VIF
  26017. CHANCTX_SWMODE_SWAP_CONTEXTS
  26018. CHANDEF_ASSIGN
  26019. CHANDEF_ENTRY
  26020. CHANDEF_PR_ARG
  26021. CHANDEF_PR_FMT
  26022. CHANGE
  26023. CHANGE_ADDR_ADD_ADDR
  26024. CHANGE_ADDR_ADD_MAC
  26025. CHANGE_ADDR_DEL_ADDR
  26026. CHANGE_ADDR_DEL_MAC
  26027. CHANGE_ADDR_FLUSH_ADDR_TABLE
  26028. CHANGE_ADDR_NASID
  26029. CHANGE_ADDR_READ_ADDR
  26030. CHANGE_ADDR_READ_MAC
  26031. CHANGE_ADDR_REPLACE_MAC
  26032. CHANGE_ADDR_RESET_MAC
  26033. CHANGE_ALLOCATION
  26034. CHANGE_AUTO_MODE_TIMEOUT_EVENT_ID
  26035. CHANGE_CAPACITY
  26036. CHANGE_CLK
  26037. CHANGE_COLOR
  26038. CHANGE_DEFINITION
  26039. CHANGE_DSCP_IB
  26040. CHANGE_DSCP_OB
  26041. CHANGE_ENDIANNESS
  26042. CHANGE_FWRD_MAP_IB_ADD_DST
  26043. CHANGE_FWRD_MAP_IB_MASK
  26044. CHANGE_FWRD_MAP_IB_NO_DEST
  26045. CHANGE_FWRD_MAP_IB_REM_ARL
  26046. CHANGE_FWRD_MAP_IB_REP_ARL
  26047. CHANGE_FWRD_MAP_IB_SHIFT
  26048. CHANGE_FWRD_MAP_OB_MASK
  26049. CHANGE_FWRD_MAP_OB_SHIT
  26050. CHANGE_JSRI_TO_LRW
  26051. CHANGE_LEVEL_START_TICKS
  26052. CHANGE_LINK_STATE
  26053. CHANGE_MAC_ADDR
  26054. CHANGE_MAC_ADDR_RSP
  26055. CHANGE_REQUIRED
  26056. CHANGE_RESP
  26057. CHANGE_RX
  26058. CHANGE_RX_ISOC_COMM_STATE
  26059. CHANGE_TC
  26060. CHANGE_TC_O
  26061. CHANGE_TX
  26062. CHANGE_TX_ISOC_COMM_STATE
  26063. CHANGHONG_PRODUCT_CH690
  26064. CHANGHONG_VENDOR_ID
  26065. CHANINT_EN
  26066. CHANLIST_ATTR_ID
  26067. CHANL_BW_SET
  26068. CHANL_SET
  26069. CHANMASK
  26070. CHANNEL
  26071. CHANNELCLI_ATTACHED
  26072. CHANNELCLI_ATTACHING
  26073. CHANNELCLI_BUSY
  26074. CHANNELCLI_DETACHED
  26075. CHANNELCLI_DISABLED
  26076. CHANNELCLI_OWNED
  26077. CHANNELENABLE_F
  26078. CHANNELENABLE_S
  26079. CHANNELENABLE_V
  26080. CHANNELLISTEP
  26081. CHANNELMSG_18
  26082. CHANNELMSG_19
  26083. CHANNELMSG_20
  26084. CHANNELMSG_ALLOFFERS_DELIVERED
  26085. CHANNELMSG_CLOSECHANNEL
  26086. CHANNELMSG_COUNT
  26087. CHANNELMSG_GPADL_BODY
  26088. CHANNELMSG_GPADL_CREATED
  26089. CHANNELMSG_GPADL_HEADER
  26090. CHANNELMSG_GPADL_TEARDOWN
  26091. CHANNELMSG_GPADL_TORNDOWN
  26092. CHANNELMSG_INITIATE_CONTACT
  26093. CHANNELMSG_INVALID
  26094. CHANNELMSG_OFFERCHANNEL
  26095. CHANNELMSG_OPENCHANNEL
  26096. CHANNELMSG_OPENCHANNEL_RESULT
  26097. CHANNELMSG_RELID_RELEASED
  26098. CHANNELMSG_REQUESTOFFERS
  26099. CHANNELMSG_RESCIND_CHANNELOFFER
  26100. CHANNELMSG_TL_CONNECT_REQUEST
  26101. CHANNELMSG_UNLOAD
  26102. CHANNELMSG_UNLOAD_RESPONSE
  26103. CHANNELMSG_VERSION_RESPONSE
  26104. CHANNELSRV_READY
  26105. CHANNELSRV_UNINITIALIZED
  26106. CHANNELS_IDX
  26107. CHANNELS_PER_BRANCH
  26108. CHANNELS_PER_STREAM
  26109. CHANNEL_0
  26110. CHANNEL_1
  26111. CHANNEL_2
  26112. CHANNEL_3
  26113. CHANNEL_5GHZ
  26114. CHANNEL_ABORT
  26115. CHANNEL_ACCESS_SETTING
  26116. CHANNEL_AUD_DN
  26117. CHANNEL_AUD_RDS_DN
  26118. CHANNEL_AUD_UP
  26119. CHANNEL_BANDUNIT
  26120. CHANNEL_BCK_CYCLES_MASK
  26121. CHANNEL_BCK_CYCLES_MASK_SFT
  26122. CHANNEL_BCK_CYCLES_SFT
  26123. CHANNEL_BITS
  26124. CHANNEL_CHAN
  26125. CHANNEL_CLEAR_INTERRUPT
  26126. CHANNEL_CONTROL_RESET
  26127. CHANNEL_CURRENT
  26128. CHANNEL_DESC_SZ
  26129. CHANNEL_DIRECTION
  26130. CHANNEL_DMA_ENABLE
  26131. CHANNEL_DONE
  26132. CHANNEL_DOWN
  26133. CHANNEL_ENABLE
  26134. CHANNEL_EQ_BITS
  26135. CHANNEL_FIRST
  26136. CHANNEL_FLAGS_BUFSIZE_CHANGED
  26137. CHANNEL_FLAGS_FAILED
  26138. CHANNEL_FLAGS_INUSE
  26139. CHANNEL_FLAGS_READ
  26140. CHANNEL_FLAGS_RWMASK
  26141. CHANNEL_FLAGS_WAITIRQ
  26142. CHANNEL_FLAGS_WRITE
  26143. CHANNEL_GROUP_IDX_5GH
  26144. CHANNEL_GROUP_IDX_5GL
  26145. CHANNEL_GROUP_IDX_5GM
  26146. CHANNEL_GROUP_MAX
  26147. CHANNEL_GROUP_MAX_2G
  26148. CHANNEL_GROUP_MAX_5G
  26149. CHANNEL_GROUP_MAX_88E
  26150. CHANNEL_HALF
  26151. CHANNEL_HALF_BW
  26152. CHANNEL_HOST_DN
  26153. CHANNEL_HOST_UP
  26154. CHANNEL_HT
  26155. CHANNEL_HT40MINUS
  26156. CHANNEL_HT40PLUS
  26157. CHANNEL_IDX
  26158. CHANNEL_ID_COUNT
  26159. CHANNEL_ID_COUNTER
  26160. CHANNEL_ID_DDC1
  26161. CHANNEL_ID_DDC2
  26162. CHANNEL_ID_DDC3
  26163. CHANNEL_ID_DDC4
  26164. CHANNEL_ID_DDC5
  26165. CHANNEL_ID_DDC6
  26166. CHANNEL_ID_DDC_VGA
  26167. CHANNEL_ID_I2C_PAD
  26168. CHANNEL_ID_UNKNOWN
  26169. CHANNEL_INT_THRESHOLD_25
  26170. CHANNEL_INT_THRESHOLD_50
  26171. CHANNEL_INT_THRESHOLD_75
  26172. CHANNEL_INT_THRESHOLD_DISABLED
  26173. CHANNEL_INT_THRESHOLD_EMPTY
  26174. CHANNEL_INT_THRESHOLD_FULL
  26175. CHANNEL_INT_THRESHOLD_NOT_EMPTY
  26176. CHANNEL_INT_THRESHOLD_NOT_FULL
  26177. CHANNEL_LAST
  26178. CHANNEL_LEFT_SHIFT
  26179. CHANNEL_LIST
  26180. CHANNEL_LIST_MAX_SIZE
  26181. CHANNEL_LOSS_SETTINGS
  26182. CHANNEL_MASK
  26183. CHANNEL_MAX_NUMBER
  26184. CHANNEL_MAX_NUMBER_2G
  26185. CHANNEL_MAX_NUMBER_5G
  26186. CHANNEL_MAX_NUMBER_5G_80M
  26187. CHANNEL_MODE_4020_MASK
  26188. CHANNEL_MODE_LEGACY
  26189. CHANNEL_MODE_MIXED
  26190. CHANNEL_MODE_PURE_40
  26191. CHANNEL_MODE_RESERVED
  26192. CHANNEL_MPEG_DN
  26193. CHANNEL_NAME_BLUE
  26194. CHANNEL_NAME_GREEN
  26195. CHANNEL_NAME_RED
  26196. CHANNEL_NUM_MASK
  26197. CHANNEL_NUM_MASK_SFT
  26198. CHANNEL_NUM_SFT
  26199. CHANNEL_NUM_SIZE
  26200. CHANNEL_OFFER_STATE
  26201. CHANNEL_OFFSET
  26202. CHANNEL_OPENED_STATE
  26203. CHANNEL_OPENING_STATE
  26204. CHANNEL_OPEN_STATE
  26205. CHANNEL_PLAN_LEN
  26206. CHANNEL_POWER_IDX_5G
  26207. CHANNEL_QUARTER
  26208. CHANNEL_QUARTER_BW
  26209. CHANNEL_RIGHT_SHIFT
  26210. CHANNEL_RING_MASK
  26211. CHANNEL_RING_SHIFT
  26212. CHANNEL_RING_SIZE
  26213. CHANNEL_SCAN_INDEX_DAY
  26214. CHANNEL_SCAN_INDEX_HOUR
  26215. CHANNEL_SCAN_INDEX_ILLUM
  26216. CHANNEL_SCAN_INDEX_INTENSITY
  26217. CHANNEL_SCAN_INDEX_MAX
  26218. CHANNEL_SCAN_INDEX_MINUTE
  26219. CHANNEL_SCAN_INDEX_MONTH
  26220. CHANNEL_SCAN_INDEX_NORTH_MAGN
  26221. CHANNEL_SCAN_INDEX_NORTH_MAGN_TILT_COMP
  26222. CHANNEL_SCAN_INDEX_NORTH_TRUE
  26223. CHANNEL_SCAN_INDEX_NORTH_TRUE_TILT_COMP
  26224. CHANNEL_SCAN_INDEX_PRESENCE
  26225. CHANNEL_SCAN_INDEX_PRESSURE
  26226. CHANNEL_SCAN_INDEX_SECOND
  26227. CHANNEL_SCAN_INDEX_X
  26228. CHANNEL_SCAN_INDEX_Y
  26229. CHANNEL_SCAN_INDEX_YEAR
  26230. CHANNEL_SCAN_INDEX_Z
  26231. CHANNEL_SCAN_MAX
  26232. CHANNEL_SHIFT
  26233. CHANNEL_SPLIT_MAPPINGCHANG
  26234. CHANNEL_START
  26235. CHANNEL_STATUS_PARAMETERS_SET
  26236. CHANNEL_STATUS_PARAMETERS_UNKNOWN
  26237. CHANNEL_STR
  26238. CHANNEL_SWITCH_COMPLETE_EVENT_ID
  26239. CHANNEL_SWITCH_NOA_NOTIF
  26240. CHANNEL_SWITCH_NOTIFICATION
  26241. CHANNEL_SWITCH_TIME_EVENT_CMD
  26242. CHANNEL_T
  26243. CHANNEL_TLV_ACQUIRE
  26244. CHANNEL_TLV_ACTIVATE_Q
  26245. CHANNEL_TLV_BULLETIN_UPDATE_MAC
  26246. CHANNEL_TLV_CLOSE
  26247. CHANNEL_TLV_COALESCE_READ
  26248. CHANNEL_TLV_COALESCE_UPDATE
  26249. CHANNEL_TLV_DEACTIVATE_Q
  26250. CHANNEL_TLV_FLR
  26251. CHANNEL_TLV_FP_HSI_SUPPORT
  26252. CHANNEL_TLV_INIT
  26253. CHANNEL_TLV_INT_CLEANUP
  26254. CHANNEL_TLV_LIST_END
  26255. CHANNEL_TLV_MAX
  26256. CHANNEL_TLV_NONE
  26257. CHANNEL_TLV_PF_RELEASE_VF
  26258. CHANNEL_TLV_PF_SET_MAC
  26259. CHANNEL_TLV_PF_SET_VLAN
  26260. CHANNEL_TLV_PHYS_PORT_ID
  26261. CHANNEL_TLV_QID
  26262. CHANNEL_TLV_RELEASE
  26263. CHANNEL_TLV_SETUP_Q
  26264. CHANNEL_TLV_SET_Q_FILTERS
  26265. CHANNEL_TLV_START_RXQ
  26266. CHANNEL_TLV_START_TXQ
  26267. CHANNEL_TLV_STOP_RXQS
  26268. CHANNEL_TLV_STOP_TXQS
  26269. CHANNEL_TLV_TEARDOWN_Q
  26270. CHANNEL_TLV_UCAST_FILTER
  26271. CHANNEL_TLV_UPDATE_RSS
  26272. CHANNEL_TLV_UPDATE_RSS_DEPRECATED
  26273. CHANNEL_TLV_UPDATE_RXQ
  26274. CHANNEL_TLV_UPDATE_TPA
  26275. CHANNEL_TLV_UPDATE_TUNN_PARAM
  26276. CHANNEL_TLV_VPORT_START
  26277. CHANNEL_TLV_VPORT_TEARDOWN
  26278. CHANNEL_TLV_VPORT_UPDATE
  26279. CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN
  26280. CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM
  26281. CHANNEL_TLV_VPORT_UPDATE_ACTIVATE
  26282. CHANNEL_TLV_VPORT_UPDATE_MAX
  26283. CHANNEL_TLV_VPORT_UPDATE_MCAST
  26284. CHANNEL_TLV_VPORT_UPDATE_RSS
  26285. CHANNEL_TLV_VPORT_UPDATE_SGE_TPA
  26286. CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH
  26287. CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP
  26288. CHANNEL_TUNE
  26289. CHANNEL_TYPE_AAL3_4
  26290. CHANNEL_TYPE_AAL5
  26291. CHANNEL_TYPE_DCF
  26292. CHANNEL_TYPE_EDCF
  26293. CHANNEL_TYPE_HCCA
  26294. CHANNEL_TYPE_RAW_CELLS
  26295. CHANNEL_UNSPECIFIED
  26296. CHANNEL_VID_U
  26297. CHANNEL_VID_V
  26298. CHANNEL_VID_VBI
  26299. CHANNEL_VID_Y
  26300. CHANNEL_VIP_DN
  26301. CHANNEL_VIP_UP
  26302. CHANNEL_WIDTH
  26303. CHANNEL_WIDTH_160
  26304. CHANNEL_WIDTH_20
  26305. CHANNEL_WIDTH_40
  26306. CHANNEL_WIDTH_80
  26307. CHANNEL_WIDTH_80_80
  26308. CHANNEL_WIDTH_MAX
  26309. CHANNEL_t
  26310. CHANPTR_T
  26311. CHANSEL_2G
  26312. CHANSEL_5G
  26313. CHANSEL_DIV
  26314. CHANSET
  26315. CHANSIZE_MASK
  26316. CHANSIZE_OVERRIDE
  26317. CHANSIZE_SHIFT
  26318. CHANSPEC_STR_LEN
  26319. CHANSTATUS
  26320. CHANTAB_ENT
  26321. CHAN_1_CONTROL
  26322. CHAN_2_CONTROL
  26323. CHAN_AIOP_SIZE
  26324. CHAN_ALLOCATION_ASCENDING
  26325. CHAN_ALLOCATION_DESCENDING
  26326. CHAN_ALM_ENA
  26327. CHAN_ALM_MAX
  26328. CHAN_ALM_MIN
  26329. CHAN_ARG
  26330. CHAN_ASSIGN
  26331. CHAN_BW_10MHZ
  26332. CHAN_BW_160MHZ
  26333. CHAN_BW_20MHZ
  26334. CHAN_BW_40MHZ
  26335. CHAN_BW_5MHZ
  26336. CHAN_BW_8080MHZ
  26337. CHAN_BW_80MHZ
  26338. CHAN_CAPI
  26339. CHAN_CMD_ERROR
  26340. CHAN_CMD_RESP
  26341. CHAN_CNVRTD
  26342. CHAN_DEBUG
  26343. CHAN_DEF_ASSIGN
  26344. CHAN_DEF_ENTRY
  26345. CHAN_DEF_PR_ARG
  26346. CHAN_DEF_PR_FMT
  26347. CHAN_ENA
  26348. CHAN_ENTRY
  26349. CHAN_ERRLOG
  26350. CHAN_ERR_RETRY
  26351. CHAN_EVENT
  26352. CHAN_FMT
  26353. CHAN_FREQ_0
  26354. CHAN_FREQ_1
  26355. CHAN_HAS_ALL
  26356. CHAN_HAS_CAL
  26357. CHAN_HAS_CURVE
  26358. CHAN_HAS_EPIB
  26359. CHAN_HAS_LIMIT
  26360. CHAN_HAS_PSINFO
  26361. CHAN_KEYBOARD
  26362. CHAN_MASK
  26363. CHAN_MASK_TOUCHBUTTON
  26364. CHAN_MASK_TOUCHSCREEN_4WIRE
  26365. CHAN_MASK_TOUCHSCREEN_5WIRE
  26366. CHAN_MASTRSTAT
  26367. CHAN_MAX_OUTPUT_INT
  26368. CHAN_MINTDIS
  26369. CHAN_MIX_BOTH
  26370. CHAN_MIX_NORMAL
  26371. CHAN_MIX_SWAP
  26372. CHAN_MODE_EXCLUSIVE
  26373. CHAN_MODE_SHARED
  26374. CHAN_MODE_UNDEFINED
  26375. CHAN_NDIS_DATA
  26376. CHAN_NONE
  26377. CHAN_NO_FAN
  26378. CHAN_NO_VID
  26379. CHAN_PLAN_HW
  26380. CHAN_PRIORITY_ASCENDING
  26381. CHAN_PRIORITY_DESCENDING
  26382. CHAN_PROTCTL_BUFFERABLE
  26383. CHAN_PROTCTL_CACHEABLE
  26384. CHAN_PROTCTL_MASK
  26385. CHAN_PROTCTL_PRIVILEGED
  26386. CHAN_PR_ARG
  26387. CHAN_PR_FMT
  26388. CHAN_PSINFO_AT_SOP
  26389. CHAN_QNUM_MASK
  26390. CHAN_READY
  26391. CHAN_REG_LEN
  26392. CHAN_SELECT
  26393. CHAN_SOP_OFF_MASK
  26394. CHAN_SOP_OFF_SHIFT
  26395. CHAN_START_0
  26396. CHAN_START_1
  26397. CHAN_STEP_0
  26398. CHAN_STEP_1
  26399. CHAN_STOP_0
  26400. CHAN_STOP_1
  26401. CHAN_SWITCH
  26402. CHAN_SYSTEM
  26403. CHAN_TEMP3
  26404. CHAN_TLV_MAX_SIZE
  26405. CHAN_TOUCHPAD
  26406. CHAN_TO_IDX
  26407. CHAN_TO_PAIRIDX
  26408. CHAN_VCC_5V
  26409. CHAOSKEY_BUF_LEN
  26410. CHAOSKEY_PRODUCT_ID
  26411. CHAOSKEY_VENDOR_ID
  26412. CHAP
  26413. CHAP_CHALLENGE_LENGTH
  26414. CHAP_CHALLENGE_STR_LEN
  26415. CHAP_DIGEST_MD5
  26416. CHAP_DIGEST_SHA
  26417. CHAP_DIGEST_UNKNOWN
  26418. CHAP_DMA_BLOCK_SIZE
  26419. CHAP_INVALID_COOKIE
  26420. CHAP_STAGE_CLIENT_A
  26421. CHAP_STAGE_CLIENT_NR
  26422. CHAP_STAGE_CLIENT_NRIC
  26423. CHAP_STAGE_SERVER_AIC
  26424. CHAP_STAGE_SERVER_NR
  26425. CHAP_TYPE_IN
  26426. CHAP_TYPE_OUT
  26427. CHAP_VALID_COOKIE
  26428. CHAR
  26429. CHAR2INT16
  26430. CHAR8
  26431. CHARGALG_CURR_STEP_HIGH
  26432. CHARGALG_CURR_STEP_LOW
  26433. CHARGEDLY_OPEN
  26434. CHARGEDLY_OPENDLY
  26435. CHARGEDLY_OPEN_MASK
  26436. CHARGER
  26437. CHARGERFAULT_INTR_OFFSET
  26438. CHARGERUSB_CTRL1
  26439. CHARGER_CACHE_UPDATE_DELAY
  26440. CHARGER_DEDICATED_DIR_NAME
  26441. CHARGER_DETECTED
  26442. CHARGER_DIR_NAME_LENGTH
  26443. CHARGER_INTR_OFFSET
  26444. CHARGER_MANUFACTURER_MODEL_LENGTH
  26445. CHARGER_STATUS_POLL
  26446. CHARGER_STATUS_PRESENT
  26447. CHARGER_USBPD_DIR_NAME
  26448. CHARGE_AUTO
  26449. CHARGE_CHARGING_IRQ
  26450. CHARGE_CONTROL_DISCHARGE
  26451. CHARGE_CONTROL_IDLE
  26452. CHARGE_CONTROL_NORMAL
  26453. CHARGE_DONE_IRQ
  26454. CHARGE_FLAGS_DELAYED_OVERRIDE
  26455. CHARGE_FLAGS_DUAL_ROLE
  26456. CHARGE_FLAGS_OVERRIDE
  26457. CHARGE_FLAGS_ROLE_MASK
  26458. CHARGE_FLAGS_TYPE_MASK
  26459. CHARGE_FLAGS_TYPE_SHIFT
  26460. CHARGE_LINEAR
  26461. CHARGE_LOWER_LIMIT_MAX
  26462. CHARGE_LOWER_LIMIT_MIN
  26463. CHARGE_MODE_AC
  26464. CHARGE_MODE_AUTO
  26465. CHARGE_MODE_CUSTOM
  26466. CHARGE_MODE_EXP
  26467. CHARGE_MODE_STD
  26468. CHARGE_OFF
  26469. CHARGE_STATE_CMD_GET_PARAM
  26470. CHARGE_STATE_CMD_GET_STATE
  26471. CHARGE_STATE_CMD_SET_PARAM
  26472. CHARGE_STATE_NUM_CMDS
  26473. CHARGE_STEP
  26474. CHARGE_THRESHOLD
  26475. CHARGE_UPPER_LIMIT_MAX
  26476. CHARGE_UPPER_LIMIT_MIN
  26477. CHARGING_STATE
  26478. CHARG_WD_KICK
  26479. CHARLCD_TIMEOUT
  26480. CHARLED_OFS
  26481. CHARNAME
  26482. CHARS
  26483. CHARSPEC_TYPE_CS0
  26484. CHARSPEC_TYPE_CS1
  26485. CHARSPEC_TYPE_CS2
  26486. CHARSPEC_TYPE_CS3
  26487. CHARSPEC_TYPE_CS4
  26488. CHARSPEC_TYPE_CS5
  26489. CHARSPEC_TYPE_CS6
  26490. CHARSPEC_TYPE_CS7
  26491. CHARSPEC_TYPE_CS8
  26492. CHARTAB
  26493. CHAR_API_WHAT_BIT
  26494. CHAR_BIT
  26495. CHAR_BITS
  26496. CHAR_COM
  26497. CHAR_DAT
  26498. CHAR_LITERAL
  26499. CHAR_MASK
  26500. CHAR_RAW
  26501. CHAR_RAW_CLEAR
  26502. CHAR_RAW_VALID
  26503. CHAR_RD
  26504. CHAR_SOF
  26505. CHAR_STAT
  26506. CHAR_count_1
  26507. CHAR_count_2
  26508. CHAR_count_3
  26509. CHARxIP
  26510. CHASHBITS
  26511. CHASHSZ
  26512. CHASSIS_CLK_REQ_DURATION
  26513. CHASSIS_CLK_REQ_DURATION_MASK
  26514. CHATGER_TIME
  26515. CHATxIP
  26516. CHA_CRI
  26517. CHA_CTRL
  26518. CHA_DSI_LANES
  26519. CHA_DSI_LANES_MASK
  26520. CHA_EXT_STAT
  26521. CHA_HSYNC_POLARITY
  26522. CHA_ID_LS_AES_MASK
  26523. CHA_ID_LS_AES_SHIFT
  26524. CHA_ID_LS_ARC4_MASK
  26525. CHA_ID_LS_ARC4_SHIFT
  26526. CHA_ID_LS_DES_MASK
  26527. CHA_ID_LS_DES_SHIFT
  26528. CHA_ID_LS_KAS_MASK
  26529. CHA_ID_LS_KAS_SHIFT
  26530. CHA_ID_LS_MD_MASK
  26531. CHA_ID_LS_MD_SHIFT
  26532. CHA_ID_LS_PK_MASK
  26533. CHA_ID_LS_PK_SHIFT
  26534. CHA_ID_LS_RNG_MASK
  26535. CHA_ID_LS_RNG_SHIFT
  26536. CHA_ID_LS_SNW8_MASK
  26537. CHA_ID_LS_SNW8_SHIFT
  26538. CHA_ID_MS_CRC_MASK
  26539. CHA_ID_MS_CRC_SHIFT
  26540. CHA_ID_MS_DECO_MASK
  26541. CHA_ID_MS_DECO_SHIFT
  26542. CHA_ID_MS_JR_MASK
  26543. CHA_ID_MS_JR_SHIFT
  26544. CHA_ID_MS_SNW9_MASK
  26545. CHA_ID_MS_SNW9_SHIFT
  26546. CHA_NUM_MS_DECONUM_MASK
  26547. CHA_NUM_MS_DECONUM_SHIFT
  26548. CHA_PERFCOUNTER0_HI__PERFCOUNTER_HI_MASK
  26549. CHA_PERFCOUNTER0_HI__PERFCOUNTER_HI__SHIFT
  26550. CHA_PERFCOUNTER0_LO__PERFCOUNTER_LO_MASK
  26551. CHA_PERFCOUNTER0_LO__PERFCOUNTER_LO__SHIFT
  26552. CHA_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK
  26553. CHA_PERFCOUNTER0_SELECT1__PERF_MODE2__SHIFT
  26554. CHA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK
  26555. CHA_PERFCOUNTER0_SELECT1__PERF_MODE3__SHIFT
  26556. CHA_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK
  26557. CHA_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT
  26558. CHA_PERFCOUNTER0_SELECT1__PERF_SEL3_MASK
  26559. CHA_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT
  26560. CHA_PERFCOUNTER0_SELECT__CNTR_MODE_MASK
  26561. CHA_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT
  26562. CHA_PERFCOUNTER0_SELECT__PERF_MODE1_MASK
  26563. CHA_PERFCOUNTER0_SELECT__PERF_MODE1__SHIFT
  26564. CHA_PERFCOUNTER0_SELECT__PERF_MODE_MASK
  26565. CHA_PERFCOUNTER0_SELECT__PERF_MODE__SHIFT
  26566. CHA_PERFCOUNTER0_SELECT__PERF_SEL1_MASK
  26567. CHA_PERFCOUNTER0_SELECT__PERF_SEL1__SHIFT
  26568. CHA_PERFCOUNTER0_SELECT__PERF_SEL_MASK
  26569. CHA_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT
  26570. CHA_PERFCOUNTER1_HI__PERFCOUNTER_HI_MASK
  26571. CHA_PERFCOUNTER1_HI__PERFCOUNTER_HI__SHIFT
  26572. CHA_PERFCOUNTER1_LO__PERFCOUNTER_LO_MASK
  26573. CHA_PERFCOUNTER1_LO__PERFCOUNTER_LO__SHIFT
  26574. CHA_PERFCOUNTER1_SELECT__CNTR_MODE_MASK
  26575. CHA_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT
  26576. CHA_PERFCOUNTER1_SELECT__PERF_MODE_MASK
  26577. CHA_PERFCOUNTER1_SELECT__PERF_MODE__SHIFT
  26578. CHA_PERFCOUNTER1_SELECT__PERF_SEL_MASK
  26579. CHA_PERFCOUNTER1_SELECT__PERF_SEL__SHIFT
  26580. CHA_PERFCOUNTER2_HI__PERFCOUNTER_HI_MASK
  26581. CHA_PERFCOUNTER2_HI__PERFCOUNTER_HI__SHIFT
  26582. CHA_PERFCOUNTER2_LO__PERFCOUNTER_LO_MASK
  26583. CHA_PERFCOUNTER2_LO__PERFCOUNTER_LO__SHIFT
  26584. CHA_PERFCOUNTER2_SELECT__CNTR_MODE_MASK
  26585. CHA_PERFCOUNTER2_SELECT__CNTR_MODE__SHIFT
  26586. CHA_PERFCOUNTER2_SELECT__PERF_MODE_MASK
  26587. CHA_PERFCOUNTER2_SELECT__PERF_MODE__SHIFT
  26588. CHA_PERFCOUNTER2_SELECT__PERF_SEL_MASK
  26589. CHA_PERFCOUNTER2_SELECT__PERF_SEL__SHIFT
  26590. CHA_PERFCOUNTER3_HI__PERFCOUNTER_HI_MASK
  26591. CHA_PERFCOUNTER3_HI__PERFCOUNTER_HI__SHIFT
  26592. CHA_PERFCOUNTER3_LO__PERFCOUNTER_LO_MASK
  26593. CHA_PERFCOUNTER3_LO__PERFCOUNTER_LO__SHIFT
  26594. CHA_PERFCOUNTER3_SELECT__CNTR_MODE_MASK
  26595. CHA_PERFCOUNTER3_SELECT__CNTR_MODE__SHIFT
  26596. CHA_PERFCOUNTER3_SELECT__PERF_MODE_MASK
  26597. CHA_PERFCOUNTER3_SELECT__PERF_MODE__SHIFT
  26598. CHA_PERFCOUNTER3_SELECT__PERF_SEL_MASK
  26599. CHA_PERFCOUNTER3_SELECT__PERF_SEL__SHIFT
  26600. CHA_PERF_SEL
  26601. CHA_PERF_SEL_ARB_REQUESTS
  26602. CHA_PERF_SEL_BUSY
  26603. CHA_PERF_SEL_CYCLE
  26604. CHA_PERF_SEL_IO_32B_WDS_CHC0
  26605. CHA_PERF_SEL_IO_32B_WDS_CHC1
  26606. CHA_PERF_SEL_IO_32B_WDS_CHC2
  26607. CHA_PERF_SEL_IO_32B_WDS_CHC3
  26608. CHA_PERF_SEL_IO_32B_WDS_CHC4
  26609. CHA_PERF_SEL_IO_BURST_COUNT_CHC0
  26610. CHA_PERF_SEL_IO_BURST_COUNT_CHC1
  26611. CHA_PERF_SEL_IO_BURST_COUNT_CHC2
  26612. CHA_PERF_SEL_IO_BURST_COUNT_CHC3
  26613. CHA_PERF_SEL_IO_BURST_COUNT_CHC4
  26614. CHA_PERF_SEL_MEM_32B_WDS_CHC0
  26615. CHA_PERF_SEL_MEM_32B_WDS_CHC1
  26616. CHA_PERF_SEL_MEM_32B_WDS_CHC2
  26617. CHA_PERF_SEL_MEM_32B_WDS_CHC3
  26618. CHA_PERF_SEL_MEM_32B_WDS_CHC4
  26619. CHA_PERF_SEL_MEM_BURST_COUNT_CHC0
  26620. CHA_PERF_SEL_MEM_BURST_COUNT_CHC1
  26621. CHA_PERF_SEL_MEM_BURST_COUNT_CHC2
  26622. CHA_PERF_SEL_MEM_BURST_COUNT_CHC3
  26623. CHA_PERF_SEL_MEM_BURST_COUNT_CHC4
  26624. CHA_PERF_SEL_REQUEST_CHC0
  26625. CHA_PERF_SEL_REQUEST_CHC1
  26626. CHA_PERF_SEL_REQUEST_CHC2
  26627. CHA_PERF_SEL_REQUEST_CHC3
  26628. CHA_PERF_SEL_REQUEST_CHC4
  26629. CHA_PERF_SEL_REQUEST_CHC5
  26630. CHA_PERF_SEL_REQ_INFLIGHT_LEVEL
  26631. CHA_PERF_SEL_STALL_CHC0
  26632. CHA_PERF_SEL_STALL_CHC1
  26633. CHA_PERF_SEL_STALL_CHC2
  26634. CHA_PERF_SEL_STALL_CHC3
  26635. CHA_PERF_SEL_STALL_CHC4
  26636. CHA_PERF_SEL_STALL_RET_CONFLICT_CHC0
  26637. CHA_PERF_SEL_STALL_RET_CONFLICT_CHC1
  26638. CHA_PERF_SEL_STALL_RET_CONFLICT_CHC2
  26639. CHA_PERF_SEL_STALL_RET_CONFLICT_CHC3
  26640. CHA_PERF_SEL_STALL_RET_CONFLICT_CHC4
  26641. CHA_Rx_AVAIL
  26642. CHA_SPECIAL
  26643. CHA_STA
  26644. CHA_Tx_EMPTY
  26645. CHA_VER_MISC_AES_GCM
  26646. CHA_VER_MISC_MASK
  26647. CHA_VER_MISC_SHIFT
  26648. CHA_VER_NUM_MASK
  26649. CHA_VER_REV_MASK
  26650. CHA_VER_REV_SHIFT
  26651. CHA_VER_VID_AES_HP
  26652. CHA_VER_VID_AES_LP
  26653. CHA_VER_VID_MASK
  26654. CHA_VER_VID_MD_HP
  26655. CHA_VER_VID_MD_LP256
  26656. CHA_VER_VID_MD_LP512
  26657. CHA_VER_VID_SHIFT
  26658. CHA_VSYNC_POLARITY
  26659. CHB
  26660. CHBA
  26661. CHBEXT
  26662. CHBRxIP
  26663. CHBT_BOARD_6800
  26664. CHBT_BOARD_7500
  26665. CHBT_BOARD_8000
  26666. CHBT_BOARD_CHN204
  26667. CHBT_BOARD_CHT101
  26668. CHBT_BOARD_CHT110
  26669. CHBT_BOARD_CHT204
  26670. CHBT_BOARD_CHT204E
  26671. CHBT_BOARD_CHT204V
  26672. CHBT_BOARD_CHT210
  26673. CHBT_BOARD_COUGAR
  26674. CHBT_BOARD_N110
  26675. CHBT_BOARD_N210
  26676. CHBT_BOARD_SIMUL
  26677. CHBT_MAC_CHELSIO_A
  26678. CHBT_MAC_DUMMY
  26679. CHBT_MAC_IXF1010
  26680. CHBT_MAC_PM3393
  26681. CHBT_MAC_VSC7321
  26682. CHBT_PHY_8244
  26683. CHBT_PHY_88E1041
  26684. CHBT_PHY_88E1111
  26685. CHBT_PHY_88X2010
  26686. CHBT_PHY_DUMMY
  26687. CHBT_PHY_MY3126
  26688. CHBT_PHY_XPAK
  26689. CHBT_TERM_FPGA
  26690. CHBT_TERM_T1
  26691. CHBT_TERM_T2
  26692. CHBT_TERM_T3
  26693. CHBTxIP
  26694. CHB_EXT_STAT
  26695. CHB_Rx_AVAIL
  26696. CHB_SPECIAL
  26697. CHB_Tx_EMPTY
  26698. CHCAL_EN_INT_RF
  26699. CHCAL_FRAC_MOD_IF
  26700. CHCAL_FRAC_MOD_RF
  26701. CHCAL_INT_MOD_IF
  26702. CHCAL_INT_MOD_RF
  26703. CHCFIR
  26704. CHCG_CTRL__BUFFER_DEPTH_MAX_MASK
  26705. CHCG_CTRL__BUFFER_DEPTH_MAX__SHIFT
  26706. CHCG_CTRL__VC0_BUFFER_DEPTH_MAX_MASK
  26707. CHCG_CTRL__VC0_BUFFER_DEPTH_MAX__SHIFT
  26708. CHCG_PERFCOUNTER0_HI__PERFCOUNTER_HI_MASK
  26709. CHCG_PERFCOUNTER0_HI__PERFCOUNTER_HI__SHIFT
  26710. CHCG_PERFCOUNTER0_LO__PERFCOUNTER_LO_MASK
  26711. CHCG_PERFCOUNTER0_LO__PERFCOUNTER_LO__SHIFT
  26712. CHCG_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK
  26713. CHCG_PERFCOUNTER0_SELECT1__PERF_MODE2__SHIFT
  26714. CHCG_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK
  26715. CHCG_PERFCOUNTER0_SELECT1__PERF_MODE3__SHIFT
  26716. CHCG_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK
  26717. CHCG_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT
  26718. CHCG_PERFCOUNTER0_SELECT1__PERF_SEL3_MASK
  26719. CHCG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT
  26720. CHCG_PERFCOUNTER0_SELECT__CNTR_MODE_MASK
  26721. CHCG_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT
  26722. CHCG_PERFCOUNTER0_SELECT__PERF_MODE1_MASK
  26723. CHCG_PERFCOUNTER0_SELECT__PERF_MODE1__SHIFT
  26724. CHCG_PERFCOUNTER0_SELECT__PERF_MODE_MASK
  26725. CHCG_PERFCOUNTER0_SELECT__PERF_MODE__SHIFT
  26726. CHCG_PERFCOUNTER0_SELECT__PERF_SEL1_MASK
  26727. CHCG_PERFCOUNTER0_SELECT__PERF_SEL1__SHIFT
  26728. CHCG_PERFCOUNTER0_SELECT__PERF_SEL_MASK
  26729. CHCG_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT
  26730. CHCG_PERFCOUNTER1_HI__PERFCOUNTER_HI_MASK
  26731. CHCG_PERFCOUNTER1_HI__PERFCOUNTER_HI__SHIFT
  26732. CHCG_PERFCOUNTER1_LO__PERFCOUNTER_LO_MASK
  26733. CHCG_PERFCOUNTER1_LO__PERFCOUNTER_LO__SHIFT
  26734. CHCG_PERFCOUNTER1_SELECT__CNTR_MODE_MASK
  26735. CHCG_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT
  26736. CHCG_PERFCOUNTER1_SELECT__PERF_MODE_MASK
  26737. CHCG_PERFCOUNTER1_SELECT__PERF_MODE__SHIFT
  26738. CHCG_PERFCOUNTER1_SELECT__PERF_SEL_MASK
  26739. CHCG_PERFCOUNTER1_SELECT__PERF_SEL__SHIFT
  26740. CHCG_PERFCOUNTER2_HI__PERFCOUNTER_HI_MASK
  26741. CHCG_PERFCOUNTER2_HI__PERFCOUNTER_HI__SHIFT
  26742. CHCG_PERFCOUNTER2_LO__PERFCOUNTER_LO_MASK
  26743. CHCG_PERFCOUNTER2_LO__PERFCOUNTER_LO__SHIFT
  26744. CHCG_PERFCOUNTER2_SELECT__CNTR_MODE_MASK
  26745. CHCG_PERFCOUNTER2_SELECT__CNTR_MODE__SHIFT
  26746. CHCG_PERFCOUNTER2_SELECT__PERF_MODE_MASK
  26747. CHCG_PERFCOUNTER2_SELECT__PERF_MODE__SHIFT
  26748. CHCG_PERFCOUNTER2_SELECT__PERF_SEL_MASK
  26749. CHCG_PERFCOUNTER2_SELECT__PERF_SEL__SHIFT
  26750. CHCG_PERFCOUNTER3_HI__PERFCOUNTER_HI_MASK
  26751. CHCG_PERFCOUNTER3_HI__PERFCOUNTER_HI__SHIFT
  26752. CHCG_PERFCOUNTER3_LO__PERFCOUNTER_LO_MASK
  26753. CHCG_PERFCOUNTER3_LO__PERFCOUNTER_LO__SHIFT
  26754. CHCG_PERFCOUNTER3_SELECT__CNTR_MODE_MASK
  26755. CHCG_PERFCOUNTER3_SELECT__CNTR_MODE__SHIFT
  26756. CHCG_PERFCOUNTER3_SELECT__PERF_MODE_MASK
  26757. CHCG_PERFCOUNTER3_SELECT__PERF_MODE__SHIFT
  26758. CHCG_PERFCOUNTER3_SELECT__PERF_SEL_MASK
  26759. CHCG_PERFCOUNTER3_SELECT__PERF_SEL__SHIFT
  26760. CHCG_PERF_SEL
  26761. CHCG_PERF_SEL_CORE_REG_SCLK_VLD
  26762. CHCG_PERF_SEL_CYCLE
  26763. CHCG_PERF_SEL_GATE_EN1
  26764. CHCG_PERF_SEL_GATE_EN2
  26765. CHCG_PERF_SEL_REQ
  26766. CHCG_PERF_SEL_TA_CHC_ADDR_STARVE_CYCLES
  26767. CHCG_PERF_SEL_TA_CHC_DATA_STARVE_CYCLES
  26768. CHCG_STATUS__BUFFER_FULL_MASK
  26769. CHCG_STATUS__BUFFER_FULL__SHIFT
  26770. CHCG_STATUS__GL2_DATA_VC0_STALL_MASK
  26771. CHCG_STATUS__GL2_DATA_VC0_STALL__SHIFT
  26772. CHCG_STATUS__GL2_DATA_VC1_STALL_MASK
  26773. CHCG_STATUS__GL2_DATA_VC1_STALL__SHIFT
  26774. CHCG_STATUS__GL2_REQ_VC0_STALL_MASK
  26775. CHCG_STATUS__GL2_REQ_VC0_STALL__SHIFT
  26776. CHCG_STATUS__GL2_REQ_VC1_STALL_MASK
  26777. CHCG_STATUS__GL2_REQ_VC1_STALL__SHIFT
  26778. CHCG_STATUS__GL2_RH_BUSY_MASK
  26779. CHCG_STATUS__GL2_RH_BUSY__SHIFT
  26780. CHCG_STATUS__INPUT_BUFFER_VC0_BUSY_MASK
  26781. CHCG_STATUS__INPUT_BUFFER_VC0_BUSY__SHIFT
  26782. CHCG_STATUS__INPUT_BUFFER_VC0_FIFO_FULL_MASK
  26783. CHCG_STATUS__INPUT_BUFFER_VC0_FIFO_FULL__SHIFT
  26784. CHCG_STATUS__INPUT_BUFFER_VC1_BUSY_MASK
  26785. CHCG_STATUS__INPUT_BUFFER_VC1_BUSY__SHIFT
  26786. CHCG_STATUS__INPUT_BUFFER_VC1_FIFO_FULL_MASK
  26787. CHCG_STATUS__INPUT_BUFFER_VC1_FIFO_FULL__SHIFT
  26788. CHCG_STATUS__NUM_REQ_PENDING_FROM_L2_MASK
  26789. CHCG_STATUS__NUM_REQ_PENDING_FROM_L2__SHIFT
  26790. CHCG_STATUS__OUTPUT_FIFOS_BUSY_MASK
  26791. CHCG_STATUS__OUTPUT_FIFOS_BUSY__SHIFT
  26792. CHCG_STATUS__REQUEST_TRACKER_BUFFER_STALL_MASK
  26793. CHCG_STATUS__REQUEST_TRACKER_BUFFER_STALL__SHIFT
  26794. CHCG_STATUS__REQUEST_TRACKER_BUSY_MASK
  26795. CHCG_STATUS__REQUEST_TRACKER_BUSY__SHIFT
  26796. CHCG_STATUS__SRC_DATA_FIFO_VC0_BUSY_MASK
  26797. CHCG_STATUS__SRC_DATA_FIFO_VC0_BUSY__SHIFT
  26798. CHCG_STATUS__SRC_DATA_FIFO_VC0_FULL_MASK
  26799. CHCG_STATUS__SRC_DATA_FIFO_VC0_FULL__SHIFT
  26800. CHCG_STATUS__SRC_DATA_FIFO_VC1_BUSY_MASK
  26801. CHCG_STATUS__SRC_DATA_FIFO_VC1_BUSY__SHIFT
  26802. CHCG_STATUS__SRC_DATA_FIFO_VC1_FULL_MASK
  26803. CHCG_STATUS__SRC_DATA_FIFO_VC1_FULL__SHIFT
  26804. CHCG_STATUS__VIRTUAL_FIFO_FULL_STALL_MASK
  26805. CHCG_STATUS__VIRTUAL_FIFO_FULL_STALL__SHIFT
  26806. CHCR
  26807. CHCR_AEAD_PRIORITY
  26808. CHCR_AES_MAX_KEY_LEN
  26809. CHCR_ATTACH
  26810. CHCR_BURST
  26811. CHCR_BURSTEN
  26812. CHCR_BYTE_SWAP_DEVICE
  26813. CHCR_BYTE_SWAP_MEMORY
  26814. CHCR_CLR_CONT_RB_IE
  26815. CHCR_CLR_DMA_IE
  26816. CHCR_CLR_DONE_IE
  26817. CHCR_CLR_DRDY_IE
  26818. CHCR_CLR_LC_IE
  26819. CHCR_CLR_LINKP_IE
  26820. CHCR_CLR_MRDY_IE
  26821. CHCR_CLR_SAR_IE
  26822. CHCR_CONTINUE
  26823. CHCR_CPL_FW4_PLD_DATA_SIZE
  26824. CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET
  26825. CHCR_CPL_FW4_PLD_IV_OFFSET
  26826. CHCR_CRA_PRIORITY
  26827. CHCR_DE
  26828. CHCR_DECRYPT_OP
  26829. CHCR_DETACH
  26830. CHCR_DEV_TO_MEM
  26831. CHCR_DIR
  26832. CHCR_DST_SG_SIZE
  26833. CHCR_ENCRYPT_OP
  26834. CHCR_FIFO
  26835. CHCR_FIFODIS
  26836. CHCR_FIFO_ON
  26837. CHCR_GIVENCRYPT_OP
  26838. CHCR_HASH_MAX_BLOCK_SIZE_128
  26839. CHCR_HASH_MAX_BLOCK_SIZE_64
  26840. CHCR_HASH_MAX_DIGEST_SIZE
  26841. CHCR_IE
  26842. CHCR_INIT
  26843. CHCR_KEYCTX_CIPHER_KEY_SIZE_128
  26844. CHCR_KEYCTX_CIPHER_KEY_SIZE_192
  26845. CHCR_KEYCTX_CIPHER_KEY_SIZE_256
  26846. CHCR_KEYCTX_MAC_KEY_SIZE_128
  26847. CHCR_KEYCTX_MAC_KEY_SIZE_160
  26848. CHCR_KEYCTX_MAC_KEY_SIZE_192
  26849. CHCR_KEYCTX_MAC_KEY_SIZE_256
  26850. CHCR_KEYCTX_MAC_KEY_SIZE_512
  26851. CHCR_KEYCTX_NO_KEY
  26852. CHCR_LINKLONG
  26853. CHCR_LINKSHORT
  26854. CHCR_MAX_AUTHENC_AES_KEY_LEN
  26855. CHCR_MAX_AUTHENC_SHA_KEY_LEN
  26856. CHCR_MAX_CRYPTO_IV_LEN
  26857. CHCR_MAX_SHA_DIGEST_SIZE
  26858. CHCR_MEM_TO_DEV
  26859. CHCR_MODE
  26860. CHCR_NORMAL
  26861. CHCR_NO_BURSTEN
  26862. CHCR_RINGBUFF
  26863. CHCR_RX
  26864. CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER
  26865. CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH
  26866. CHCR_SCMD_AUTH_MODE_CBCMAC
  26867. CHCR_SCMD_AUTH_MODE_CMAC
  26868. CHCR_SCMD_AUTH_MODE_GHASH
  26869. CHCR_SCMD_AUTH_MODE_NOP
  26870. CHCR_SCMD_AUTH_MODE_SHA1
  26871. CHCR_SCMD_AUTH_MODE_SHA224
  26872. CHCR_SCMD_AUTH_MODE_SHA256
  26873. CHCR_SCMD_AUTH_MODE_SHA512_224
  26874. CHCR_SCMD_AUTH_MODE_SHA512_256
  26875. CHCR_SCMD_AUTH_MODE_SHA512_384
  26876. CHCR_SCMD_AUTH_MODE_SHA512_512
  26877. CHCR_SCMD_CIPHER_MODE_AES_CBC
  26878. CHCR_SCMD_CIPHER_MODE_AES_CCM
  26879. CHCR_SCMD_CIPHER_MODE_AES_CTR
  26880. CHCR_SCMD_CIPHER_MODE_AES_GCM
  26881. CHCR_SCMD_CIPHER_MODE_AES_XTS
  26882. CHCR_SCMD_CIPHER_MODE_GENERIC_AES
  26883. CHCR_SCMD_CIPHER_MODE_NOP
  26884. CHCR_SCMD_HMAC_CTRL_DIV2
  26885. CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT
  26886. CHCR_SCMD_HMAC_CTRL_NOP
  26887. CHCR_SCMD_HMAC_CTRL_NO_TRUNC
  26888. CHCR_SCMD_HMAC_CTRL_PL1
  26889. CHCR_SCMD_HMAC_CTRL_PL2
  26890. CHCR_SCMD_HMAC_CTRL_PL3
  26891. CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366
  26892. CHCR_SCMD_IVGEN_CTRL_HW
  26893. CHCR_SCMD_IVGEN_CTRL_SW
  26894. CHCR_SCMD_PROTO_VERSION_GENERIC
  26895. CHCR_SCMD_SEQ_NO_CTRL_32BIT
  26896. CHCR_SCMD_SEQ_NO_CTRL_48BIT
  26897. CHCR_SCMD_SEQ_NO_CTRL_64BIT
  26898. CHCR_SET_CONT_RB_IE
  26899. CHCR_SET_DMA_IE
  26900. CHCR_SET_DONE_IE
  26901. CHCR_SET_DRDY_IE
  26902. CHCR_SET_LC_IE
  26903. CHCR_SET_LINKP_IE
  26904. CHCR_SET_MRDY_IE
  26905. CHCR_SET_SAR_IE
  26906. CHCR_SRC_SG_SIZE
  26907. CHCR_TE
  26908. CHCR_TEST_RESPONSE_TIMEOUT
  26909. CHCR_TS_HIGH_MASK
  26910. CHCR_TS_HIGH_SHIFT
  26911. CHCR_TS_LOW_MASK
  26912. CHCR_TS_LOW_SHIFT
  26913. CHCR_TX
  26914. CHCTRL_NUM
  26915. CHC_CTRL__BUFFER_DEPTH_MAX_MASK
  26916. CHC_CTRL__BUFFER_DEPTH_MAX__SHIFT
  26917. CHC_PERFCOUNTER0_HI__PERFCOUNTER_HI_MASK
  26918. CHC_PERFCOUNTER0_HI__PERFCOUNTER_HI__SHIFT
  26919. CHC_PERFCOUNTER0_LO__PERFCOUNTER_LO_MASK
  26920. CHC_PERFCOUNTER0_LO__PERFCOUNTER_LO__SHIFT
  26921. CHC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK
  26922. CHC_PERFCOUNTER0_SELECT1__PERF_MODE2__SHIFT
  26923. CHC_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK
  26924. CHC_PERFCOUNTER0_SELECT1__PERF_MODE3__SHIFT
  26925. CHC_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK
  26926. CHC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT
  26927. CHC_PERFCOUNTER0_SELECT1__PERF_SEL3_MASK
  26928. CHC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT
  26929. CHC_PERFCOUNTER0_SELECT__CNTR_MODE_MASK
  26930. CHC_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT
  26931. CHC_PERFCOUNTER0_SELECT__PERF_MODE1_MASK
  26932. CHC_PERFCOUNTER0_SELECT__PERF_MODE1__SHIFT
  26933. CHC_PERFCOUNTER0_SELECT__PERF_MODE_MASK
  26934. CHC_PERFCOUNTER0_SELECT__PERF_MODE__SHIFT
  26935. CHC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK
  26936. CHC_PERFCOUNTER0_SELECT__PERF_SEL1__SHIFT
  26937. CHC_PERFCOUNTER0_SELECT__PERF_SEL_MASK
  26938. CHC_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT
  26939. CHC_PERFCOUNTER1_HI__PERFCOUNTER_HI_MASK
  26940. CHC_PERFCOUNTER1_HI__PERFCOUNTER_HI__SHIFT
  26941. CHC_PERFCOUNTER1_LO__PERFCOUNTER_LO_MASK
  26942. CHC_PERFCOUNTER1_LO__PERFCOUNTER_LO__SHIFT
  26943. CHC_PERFCOUNTER1_SELECT__CNTR_MODE_MASK
  26944. CHC_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT
  26945. CHC_PERFCOUNTER1_SELECT__PERF_MODE_MASK
  26946. CHC_PERFCOUNTER1_SELECT__PERF_MODE__SHIFT
  26947. CHC_PERFCOUNTER1_SELECT__PERF_SEL_MASK
  26948. CHC_PERFCOUNTER1_SELECT__PERF_SEL__SHIFT
  26949. CHC_PERFCOUNTER2_HI__PERFCOUNTER_HI_MASK
  26950. CHC_PERFCOUNTER2_HI__PERFCOUNTER_HI__SHIFT
  26951. CHC_PERFCOUNTER2_LO__PERFCOUNTER_LO_MASK
  26952. CHC_PERFCOUNTER2_LO__PERFCOUNTER_LO__SHIFT
  26953. CHC_PERFCOUNTER2_SELECT__CNTR_MODE_MASK
  26954. CHC_PERFCOUNTER2_SELECT__CNTR_MODE__SHIFT
  26955. CHC_PERFCOUNTER2_SELECT__PERF_MODE_MASK
  26956. CHC_PERFCOUNTER2_SELECT__PERF_MODE__SHIFT
  26957. CHC_PERFCOUNTER2_SELECT__PERF_SEL_MASK
  26958. CHC_PERFCOUNTER2_SELECT__PERF_SEL__SHIFT
  26959. CHC_PERFCOUNTER3_HI__PERFCOUNTER_HI_MASK
  26960. CHC_PERFCOUNTER3_HI__PERFCOUNTER_HI__SHIFT
  26961. CHC_PERFCOUNTER3_LO__PERFCOUNTER_LO_MASK
  26962. CHC_PERFCOUNTER3_LO__PERFCOUNTER_LO__SHIFT
  26963. CHC_PERFCOUNTER3_SELECT__CNTR_MODE_MASK
  26964. CHC_PERFCOUNTER3_SELECT__CNTR_MODE__SHIFT
  26965. CHC_PERFCOUNTER3_SELECT__PERF_MODE_MASK
  26966. CHC_PERFCOUNTER3_SELECT__PERF_MODE__SHIFT
  26967. CHC_PERFCOUNTER3_SELECT__PERF_SEL_MASK
  26968. CHC_PERFCOUNTER3_SELECT__PERF_SEL__SHIFT
  26969. CHC_PERF_SEL
  26970. CHC_PERF_SEL_CORE_REG_SCLK_VLD
  26971. CHC_PERF_SEL_CYCLE
  26972. CHC_PERF_SEL_GATE_EN1
  26973. CHC_PERF_SEL_GATE_EN2
  26974. CHC_PERF_SEL_REQ
  26975. CHC_PERF_SEL_TA_CHC_ADDR_STARVE_CYCLES
  26976. CHC_PERF_SEL_TA_CHC_DATA_STARVE_CYCLES
  26977. CHC_STATUS__BUFFER_FULL_MASK
  26978. CHC_STATUS__BUFFER_FULL__SHIFT
  26979. CHC_STATUS__GL2_DATA_VC0_STALL_MASK
  26980. CHC_STATUS__GL2_DATA_VC0_STALL__SHIFT
  26981. CHC_STATUS__GL2_DATA_VC1_STALL_MASK
  26982. CHC_STATUS__GL2_DATA_VC1_STALL__SHIFT
  26983. CHC_STATUS__GL2_REQ_VC0_STALL_MASK
  26984. CHC_STATUS__GL2_REQ_VC0_STALL__SHIFT
  26985. CHC_STATUS__GL2_REQ_VC1_STALL_MASK
  26986. CHC_STATUS__GL2_REQ_VC1_STALL__SHIFT
  26987. CHC_STATUS__GL2_RH_BUSY_MASK
  26988. CHC_STATUS__GL2_RH_BUSY__SHIFT
  26989. CHC_STATUS__INPUT_BUFFER_VC0_BUSY_MASK
  26990. CHC_STATUS__INPUT_BUFFER_VC0_BUSY__SHIFT
  26991. CHC_STATUS__INPUT_BUFFER_VC0_FIFO_FULL_MASK
  26992. CHC_STATUS__INPUT_BUFFER_VC0_FIFO_FULL__SHIFT
  26993. CHC_STATUS__NUM_REQ_PENDING_FROM_L2_MASK
  26994. CHC_STATUS__NUM_REQ_PENDING_FROM_L2__SHIFT
  26995. CHC_STATUS__OUTPUT_FIFOS_BUSY_MASK
  26996. CHC_STATUS__OUTPUT_FIFOS_BUSY__SHIFT
  26997. CHC_STATUS__REQUEST_TRACKER_BUFFER_STALL_MASK
  26998. CHC_STATUS__REQUEST_TRACKER_BUFFER_STALL__SHIFT
  26999. CHC_STATUS__REQUEST_TRACKER_BUSY_MASK
  27000. CHC_STATUS__REQUEST_TRACKER_BUSY__SHIFT
  27001. CHC_STATUS__SRC_DATA_FIFO_VC0_BUSY_MASK
  27002. CHC_STATUS__SRC_DATA_FIFO_VC0_BUSY__SHIFT
  27003. CHC_STATUS__SRC_DATA_FIFO_VC0_FULL_MASK
  27004. CHC_STATUS__SRC_DATA_FIFO_VC0_FULL__SHIFT
  27005. CHC_STATUS__VIRTUAL_FIFO_FULL_STALL_MASK
  27006. CHC_STATUS__VIRTUAL_FIFO_FULL_STALL__SHIFT
  27007. CHEAP
  27008. CHECK
  27009. CHECKBIT
  27010. CHECKEXTENSIONSPRESENT
  27011. CHECKINGSTATUS
  27012. CHECKLIST_HEIGTH_MIN
  27013. CHECKLIST_WIDTH_MIN
  27014. CHECKSTOP_TYPE_CORE
  27015. CHECKSTOP_TYPE_NPU
  27016. CHECKSTOP_TYPE_NX
  27017. CHECKSTOP_TYPE_UNKNOWN
  27018. CHECKSUM
  27019. CHECKSUM_BREAK
  27020. CHECKSUM_COMPLETE
  27021. CHECKSUM_LEN
  27022. CHECKSUM_MASK
  27023. CHECKSUM_NONE
  27024. CHECKSUM_OFFLOAD_DISABLED
  27025. CHECKSUM_OFFLOAD_ENABLED
  27026. CHECKSUM_OFFLOAD_FAKE_RX
  27027. CHECKSUM_OFFLOAD_INVALID
  27028. CHECKSUM_PARTIAL
  27029. CHECKSUM_SHIFT
  27030. CHECKSUM_SMASK
  27031. CHECKSUM_TYPE_CRC64
  27032. CHECKSUM_TYPE_NONE
  27033. CHECKSUM_TYPE_UNCHANGED
  27034. CHECKSUM_UNNECESSARY
  27035. CHECK_AND_APPLY_ESPFIX
  27036. CHECK_AND_PRINT
  27037. CHECK_AND_PRINT_I
  27038. CHECK_AND_RET
  27039. CHECK_ANI
  27040. CHECK_APPEND_1ARG
  27041. CHECK_APPEND_2ARG
  27042. CHECK_APPEND_NOARG
  27043. CHECK_ATTR
  27044. CHECK_BARO_PKG
  27045. CHECK_BA_TRIGGER
  27046. CHECK_BINSEARCH__
  27047. CHECK_BIT_IN_MASK_WORD
  27048. CHECK_BOOL
  27049. CHECK_BUS_ADDR_SPACE
  27050. CHECK_BUS_PART_TYPE
  27051. CHECK_BUS_TIME_OUT
  27052. CHECK_BW
  27053. CHECK_CAM
  27054. CHECK_CAPS_AUTHONLY
  27055. CHECK_CAPS_FLUSH
  27056. CHECK_CAPS_NODELAY
  27057. CHECK_CHANGE_DELAY
  27058. CHECK_CHUNKSIZE
  27059. CHECK_CONDITION
  27060. CHECK_CONDITION_
  27061. CHECK_CRC
  27062. CHECK_CSI_OFFSET
  27063. CHECK_CSI_SIZE
  27064. CHECK_CUDA_AMP
  27065. CHECK_DATA
  27066. CHECK_DATA_CORRUPTION
  27067. CHECK_DMA_MASK
  27068. CHECK_E
  27069. CHECK_ENC_GET
  27070. CHECK_ENC_GET_BE
  27071. CHECK_ENC_GET_LE
  27072. CHECK_ENC_GET_U
  27073. CHECK_ENTRY
  27074. CHECK_EOF
  27075. CHECK_ERR
  27076. CHECK_EXPIRE_INTERVAL
  27077. CHECK_EXTRA_BITS
  27078. CHECK_F
  27079. CHECK_FAIL
  27080. CHECK_FE_ALIGNED
  27081. CHECK_FILELOCK
  27082. CHECK_FLAG_VALUE
  27083. CHECK_FLOW_KEYS
  27084. CHECK_FOR_NEWLINE
  27085. CHECK_FREQ_REG
  27086. CHECK_FULL_REGS
  27087. CHECK_FW_VER
  27088. CHECK_GAP
  27089. CHECK_GI
  27090. CHECK_HDR_VERSION
  27091. CHECK_HIQ_WK_CID
  27092. CHECK_HW_PARAMS
  27093. CHECK_ICV
  27094. CHECK_ICV_SHIFT
  27095. CHECK_ID
  27096. CHECK_IF_IN_TRAP
  27097. CHECK_INTERVAL
  27098. CHECK_IOVEC_ONLY
  27099. CHECK_ISR
  27100. CHECK_ISR_SMP
  27101. CHECK_KR2_RECOVERY_CNT
  27102. CHECK_LED
  27103. CHECK_LEVEL
  27104. CHECK_LUN_MODE
  27105. CHECK_MEMBER_AT_END_OF
  27106. CHECK_META
  27107. CHECK_MLME_TRIGGER
  27108. CHECK_MODE_ERR
  27109. CHECK_MS_ERR_TYPE
  27110. CHECK_MS_OVERFLOW
  27111. CHECK_MS_PCC
  27112. CHECK_MS_PRECISE_IP
  27113. CHECK_MS_RESTARTABLE_IP
  27114. CHECK_MS_UNCORRECTED
  27115. CHECK_NAPPING
  27116. CHECK_NOT_NULL__
  27117. CHECK_NOT_READY
  27118. CHECK_NPP
  27119. CHECK_OFFSET
  27120. CHECK_OPERATION
  27121. CHECK_OP_TYPE
  27122. CHECK_OVERFLOW
  27123. CHECK_PATTERN
  27124. CHECK_PCC
  27125. CHECK_PERROR_RET
  27126. CHECK_PHY_INTERVAL
  27127. CHECK_PID
  27128. CHECK_PIPE
  27129. CHECK_PKG
  27130. CHECK_PRECISE_IP
  27131. CHECK_PROPERTY
  27132. CHECK_QSTATE
  27133. CHECK_RANGE
  27134. CHECK_RATE
  27135. CHECK_RC5X_NBITS
  27136. CHECK_REG_CMD
  27137. CHECK_RELOC
  27138. CHECK_RESTARTABLE_IP
  27139. CHECK_RU_ALLOC
  27140. CHECK_SCHEDULER
  27141. CHECK_SET_TYPE
  27142. CHECK_SI_SIZE
  27143. CHECK_SKB_FIELD
  27144. CHECK_SLAB_OKAY
  27145. CHECK_STACK
  27146. CHECK_STRUCTURE
  27147. CHECK_SUM_OFFSET
  27148. CHECK_TABLE
  27149. CHECK_TRANS_TYPE
  27150. CHECK_TTY_COUNT
  27151. CHECK_TUNER_POWER
  27152. CHECK_TYPE
  27153. CHECK_TYPE_VAL
  27154. CHECK_UNCORRECTED
  27155. CHECK_UNLINK
  27156. CHECK_VALID_BITS
  27157. CHECK_VALID_BUS_ADDR_SPACE
  27158. CHECK_VALID_BUS_PART_TYPE
  27159. CHECK_VALID_BUS_TIME_OUT
  27160. CHECK_VALID_LEVEL
  27161. CHECK_VALID_MS_ERR_TYPE
  27162. CHECK_VALID_MS_OVERFLOW
  27163. CHECK_VALID_MS_PCC
  27164. CHECK_VALID_MS_PRECISE_IP
  27165. CHECK_VALID_MS_RESTARTABLE_IP
  27166. CHECK_VALID_MS_UNCORRECTED
  27167. CHECK_VALID_OPERATION
  27168. CHECK_VALID_OVERFLOW
  27169. CHECK_VALID_PCC
  27170. CHECK_VALID_PRECISE_IP
  27171. CHECK_VALID_RESTARTABLE_IP
  27172. CHECK_VALID_TRANS_TYPE
  27173. CHECK_VALID_UNCORRECTED
  27174. CHECK_VMAP_STACK
  27175. CHECK_V_F
  27176. CHECK_WD33C93
  27177. CHECK_XFEATURE
  27178. CHECK__
  27179. CHEETAH_HIGHEST_LOCKED_TLBENT
  27180. CHEETAH_IMPL
  27181. CHEETAH_MANUF
  27182. CHEETAH_PLUS_IMPL
  27183. CHELSIO_CHIP_CODE
  27184. CHELSIO_CHIP_FPGA
  27185. CHELSIO_CHIP_RELEASE
  27186. CHELSIO_CHIP_VERSION
  27187. CHELSIO_GETMTUTAB
  27188. CHELSIO_GET_MEM
  27189. CHELSIO_GET_PM
  27190. CHELSIO_GET_QSET_NUM
  27191. CHELSIO_GET_QSET_PARAMS
  27192. CHELSIO_LOAD_FW
  27193. CHELSIO_MV8E1XXX_H
  27194. CHELSIO_PCI_ID_VER
  27195. CHELSIO_SETMTUTAB
  27196. CHELSIO_SET_PM
  27197. CHELSIO_SET_QSET_NUM
  27198. CHELSIO_SET_QSET_PARAMS
  27199. CHELSIO_SET_TRACE_FILTER
  27200. CHELSIO_T4
  27201. CHELSIO_T5
  27202. CHELSIO_T6
  27203. CHELSIO_TP_H
  27204. CHELSIO_VPD_UNIQUE_ID
  27205. CHEST_COLLECTOR_FILTER_CONFIG_CMD
  27206. CHETCO_SEAGAUGE_PID
  27207. CHETCO_SEASMART_ANALOG_PID
  27208. CHETCO_SEASMART_DISPLAY_PID
  27209. CHETCO_SEASMART_ETHERNET_PID
  27210. CHETCO_SEASMART_LITE_PID
  27211. CHETCO_SEASMART_NMEA2000_PID
  27212. CHETCO_SEASMART_WIFI_PID
  27213. CHETCO_SEASWITCH_PID
  27214. CHET_DT
  27215. CHET_IE
  27216. CHET_MT
  27217. CHET_ST
  27218. CHET_V1
  27219. CHET_V2
  27220. CHET_V3
  27221. CHET_V4
  27222. CHGCTRL1_TCHW_MASK
  27223. CHGCTRL1_TCHW_SHIFT
  27224. CHGCTRL2_MBCHOSTEN_MASK
  27225. CHGCTRL2_MBCHOSTEN_SHIFT
  27226. CHGCTRL2_VCHGR_RC_MASK
  27227. CHGCTRL2_VCHGR_RC_SHIFT
  27228. CHGCTRL3_MBCCVWRC_MASK
  27229. CHGCTRL3_MBCCVWRC_SHIFT
  27230. CHGCTRL4_MBCICHWRCH_MASK
  27231. CHGCTRL4_MBCICHWRCH_SHIFT
  27232. CHGCTRL4_MBCICHWRCL_MASK
  27233. CHGCTRL4_MBCICHWRCL_SHIFT
  27234. CHGCTRL5_EOCS_MASK
  27235. CHGCTRL5_EOCS_SHIFT
  27236. CHGCTRL6_AUTOSTOP_MASK
  27237. CHGCTRL6_AUTOSTOP_SHIFT
  27238. CHGCTRL7_OTPCGHCVS_MASK
  27239. CHGCTRL7_OTPCGHCVS_SHIFT
  27240. CHG_CNFG_00_BUCK_MASK
  27241. CHG_CNFG_00_CHG_MASK
  27242. CHG_CNFG_01_CHGRSTRT_MASK
  27243. CHG_CNFG_01_CHGRSTRT_SHIFT
  27244. CHG_CNFG_01_FCHGTIME_MASK
  27245. CHG_CNFG_01_FCHGTIME_SHIFT
  27246. CHG_CNFG_01_PQEN_MAKS
  27247. CHG_CNFG_01_PQEN_SHIFT
  27248. CHG_CNFG_03_TOITH_MASK
  27249. CHG_CNFG_03_TOITH_SHIFT
  27250. CHG_CNFG_03_TOTIME_MASK
  27251. CHG_CNFG_03_TOTIME_SHIFT
  27252. CHG_CNFG_04_CHGCVPRM_MASK
  27253. CHG_CNFG_04_CHGCVPRM_SHIFT
  27254. CHG_CNFG_04_MINVSYS_MASK
  27255. CHG_CNFG_04_MINVSYS_SHIFT
  27256. CHG_CNFG_06_CHGPROT_MASK
  27257. CHG_CNFG_06_CHGPROT_SHIFT
  27258. CHG_CNFG_07_REGTEMP_MASK
  27259. CHG_CNFG_07_REGTEMP_SHIFT
  27260. CHG_CNFG_09_CHGIN_ILIM_MASK
  27261. CHG_CNFG_12_B2SOVRC_MASK
  27262. CHG_CNFG_12_B2SOVRC_SHIFT
  27263. CHG_CNFG_12_VCHGINREG_MASK
  27264. CHG_CNFG_12_VCHGINREG_SHIFT
  27265. CHG_DAT_IN_1
  27266. CHG_DAT_OUT_1
  27267. CHG_DAT_OUT_2
  27268. CHG_DCD_MAX_RETRIES
  27269. CHG_DCD_POLL_TIME
  27270. CHG_DETAILS_00_CHGIN_MASK
  27271. CHG_DETAILS_00_CHGIN_SHIFT
  27272. CHG_DETAILS_01_BAT_MASK
  27273. CHG_DETAILS_01_BAT_SHIFT
  27274. CHG_DETAILS_01_CHG_MASK
  27275. CHG_DETAILS_01_CHG_SHIFT
  27276. CHG_DETAILS_01_TREG_MASK
  27277. CHG_DETAILS_01_TREG_SHIFT
  27278. CHG_DETAILS_02_BYP_MASK
  27279. CHG_DETAILS_02_BYP_SHIFT
  27280. CHG_DET_INTR_EN
  27281. CHG_INT
  27282. CHG_INT_OK_BAT_MASK
  27283. CHG_INT_OK_BAT_SHIFT
  27284. CHG_INT_OK_BYP_MASK
  27285. CHG_INT_OK_BYP_SHIFT
  27286. CHG_INT_OK_CHGIN_MASK
  27287. CHG_INT_OK_CHGIN_SHIFT
  27288. CHG_INT_OK_CHG_MASK
  27289. CHG_INT_OK_CHG_SHIFT
  27290. CHG_INT_OK_DETBAT_MASK
  27291. CHG_INT_OK_DETBAT_SHIFT
  27292. CHG_IRQ1_MASK
  27293. CHG_IRQ2_MASK
  27294. CHG_IRQ_BAT_I
  27295. CHG_IRQ_BYP_I
  27296. CHG_IRQ_CHGIN_I
  27297. CHG_IRQ_CHG_I
  27298. CHG_IRQ_THM_I
  27299. CHG_PRIMARY_DET_TIME
  27300. CHG_SECONDARY_DET_TIME
  27301. CHG_STAT_BAT_ERR
  27302. CHG_STAT_DONE
  27303. CHG_STAT_FAST
  27304. CHG_STAT_OTP_DONE
  27305. CHG_STAT_OTP_FAST
  27306. CHG_STAT_OTP_TRICKLE
  27307. CHG_STAT_SUSPEND
  27308. CHG_STAT_TOPOFF
  27309. CHG_STAT_TRICKLE
  27310. CHG_STAT_TSD_FAST
  27311. CHG_STAT_TSD_TOPOFF
  27312. CHG_STAT_TSD_TRICKLE
  27313. CHG_TYPE_INT_MASK
  27314. CHG_WD_INTERVAL
  27315. CHI32_CONTROL_REG
  27316. CHI32_DATA_REG
  27317. CHI32_STATUS_HOST_READ_FULL
  27318. CHI32_STATUS_HOST_WRITE_EMPTY
  27319. CHI32_STATUS_IRQ
  27320. CHI32_STATUS_REG
  27321. CHI32_STATUS_REG_HF3
  27322. CHI32_STATUS_REG_HF4
  27323. CHI32_STATUS_REG_HF5
  27324. CHI32_VECTOR_BUSY
  27325. CHI32_VECTOR_REG
  27326. CHICKEN3_DGMG_DONE_FIX_DISABLE
  27327. CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE
  27328. CHICKEN_MISC_2
  27329. CHICKEN_MISC_4
  27330. CHICKEN_PAR1_1
  27331. CHICKEN_PAR2_1
  27332. CHICKEN_PIPESL_1
  27333. CHICKEN_TRANS_A
  27334. CHICKEN_TRANS_B
  27335. CHICKEN_TRANS_C
  27336. CHICKEN_TRANS_EDP
  27337. CHILDREN_PER_NODE
  27338. CHILD_FAIL_IF
  27339. CHILD_THREAD_MIN_WAIT
  27340. CHILD_TOKEN
  27341. CHIMINT
  27342. CHIMINTEN
  27343. CHIMINT_MASK
  27344. CHIMREQMBX
  27345. CHIMRSPMBX
  27346. CHINA
  27347. CHIOEXCHANGE
  27348. CHIOGELEM
  27349. CHIOGPARAMS
  27350. CHIOGPICKER
  27351. CHIOGSTATUS
  27352. CHIOGSTATUS32
  27353. CHIOGVPARAMS
  27354. CHIOINITELEM
  27355. CHIOMOVE
  27356. CHIOPOSITION
  27357. CHIOSPICKER
  27358. CHIOSVOLTAG
  27359. CHIP
  27360. CHIP1370
  27361. CHIP1371
  27362. CHIPCNT
  27363. CHIPCREGOFFS
  27364. CHIPCTLEND
  27365. CHIPCTLOFFSET
  27366. CHIPCTLSIZE
  27367. CHIPDESC
  27368. CHIPGCR_FCFDX
  27369. CHIPGCR_FCGMII
  27370. CHIPGCR_FCMODE
  27371. CHIPGCR_FCRESV
  27372. CHIPGCR_LPSOPT
  27373. CHIPGCR_PHYINTEN
  27374. CHIPGCR_TM0US
  27375. CHIPGCR_TM1US
  27376. CHIPID
  27377. CHIPID_BASE
  27378. CHIPID_HUB
  27379. CHIPID_LEN
  27380. CHIPID_M
  27381. CHIPID_ROUTER
  27382. CHIPMEM_END
  27383. CHIPMEM_START
  27384. CHIPNAMES
  27385. CHIPRAM_SAFETY_LIMIT
  27386. CHIPREG_PIO_READ32
  27387. CHIPREG_PIO_WRITE32
  27388. CHIPREG_READ32
  27389. CHIPREG_READ32_dmasync
  27390. CHIPREG_WRITE32
  27391. CHIPREV
  27392. CHIPREV_1
  27393. CHIPREV_1A
  27394. CHIPREV_2272
  27395. CHIPREV_5700_AX
  27396. CHIPREV_5700_BX
  27397. CHIPREV_5700_CX
  27398. CHIPREV_5701_AX
  27399. CHIPREV_5703_AX
  27400. CHIPREV_5704_AX
  27401. CHIPREV_5704_BX
  27402. CHIPREV_5750_AX
  27403. CHIPREV_5750_BX
  27404. CHIPREV_5761_AX
  27405. CHIPREV_57765_AX
  27406. CHIPREV_5784_AX
  27407. CHIPREV_ID_5700_A0
  27408. CHIPREV_ID_5700_A1
  27409. CHIPREV_ID_5700_ALTIMA
  27410. CHIPREV_ID_5700_B0
  27411. CHIPREV_ID_5700_B1
  27412. CHIPREV_ID_5700_B3
  27413. CHIPREV_ID_5700_C0
  27414. CHIPREV_ID_5701_A0
  27415. CHIPREV_ID_5701_B0
  27416. CHIPREV_ID_5701_B2
  27417. CHIPREV_ID_5701_B5
  27418. CHIPREV_ID_5703_A0
  27419. CHIPREV_ID_5703_A1
  27420. CHIPREV_ID_5703_A2
  27421. CHIPREV_ID_5703_A3
  27422. CHIPREV_ID_5704_A0
  27423. CHIPREV_ID_5704_A1
  27424. CHIPREV_ID_5704_A2
  27425. CHIPREV_ID_5704_A3
  27426. CHIPREV_ID_5705_A0
  27427. CHIPREV_ID_5705_A1
  27428. CHIPREV_ID_5705_A2
  27429. CHIPREV_ID_5705_A3
  27430. CHIPREV_ID_5714_A2
  27431. CHIPREV_ID_5717_A0
  27432. CHIPREV_ID_5717_C0
  27433. CHIPREV_ID_5719_A0
  27434. CHIPREV_ID_5720_A0
  27435. CHIPREV_ID_5750_A0
  27436. CHIPREV_ID_5750_A1
  27437. CHIPREV_ID_5750_A3
  27438. CHIPREV_ID_5750_C2
  27439. CHIPREV_ID_5752_A0
  27440. CHIPREV_ID_5752_A0_HW
  27441. CHIPREV_ID_5752_A1
  27442. CHIPREV_ID_5762_A0
  27443. CHIPREV_ID_57765_A0
  27444. CHIPREV_ID_57780_A0
  27445. CHIPREV_ID_57780_A1
  27446. CHIPREV_ID_5906_A1
  27447. CHIPREV_LEGACY
  27448. CHIPREV_NET2272_R1
  27449. CHIPREV_NET2272_R1A
  27450. CHIPR_DM9000A
  27451. CHIPR_DM9000B
  27452. CHIPSC_RESET_XILINX
  27453. CHIPSET_NFORCE
  27454. CHIPSET_NFORCE2
  27455. CHIPSTATE
  27456. CHIPTYP
  27457. CHIP_260_VIRGE_MX
  27458. CHIP_2_PORT_MODE
  27459. CHIP_325_VIRGE
  27460. CHIP_357_VIRGE_GX2
  27461. CHIP_359_VIRGE_GX2P
  27462. CHIP_360_TRIO3D_1X
  27463. CHIP_362_TRIO3D_2X
  27464. CHIP_365_TRIO3D
  27465. CHIP_368_TRIO3D_2X
  27466. CHIP_36X_TRIO3D_1X_2X
  27467. CHIP_375_VIRGE_DX
  27468. CHIP_385_VIRGE_GX
  27469. CHIP_4_PORT_MODE
  27470. CHIP_551_PLATO_PX
  27471. CHIP_732_TRIO32
  27472. CHIP_764_TRIO64
  27473. CHIP_765_TRIO64VP
  27474. CHIP_767_TRIO64UVP
  27475. CHIP_775_TRIO64V2_DX
  27476. CHIP_785_TRIO64V2_GX
  27477. CHIP_8006_PORT_RECOVERY_TIMEOUT
  27478. CHIP_8188C
  27479. CHIP_8188E
  27480. CHIP_8192C
  27481. CHIP_8192D
  27482. CHIP_8192E
  27483. CHIP_8192S
  27484. CHIP_8723
  27485. CHIP_8723A
  27486. CHIP_8723B
  27487. CHIP_8812
  27488. CHIP_8821
  27489. CHIP_8821A
  27490. CHIP_88C
  27491. CHIP_91100
  27492. CHIP_91100FD
  27493. CHIP_91111FD
  27494. CHIP_9115
  27495. CHIP_9116
  27496. CHIP_9117
  27497. CHIP_9118
  27498. CHIP_9190
  27499. CHIP_9192
  27500. CHIP_9194
  27501. CHIP_9195
  27502. CHIP_9196
  27503. CHIP_9211
  27504. CHIP_9215
  27505. CHIP_9217
  27506. CHIP_9218
  27507. CHIP_92C
  27508. CHIP_92C_1T2R
  27509. CHIP_92C_BITMASK
  27510. CHIP_92D
  27511. CHIP_92D_B_CUT
  27512. CHIP_92D_C_CUT
  27513. CHIP_92D_D_CUT
  27514. CHIP_92D_E_CUT
  27515. CHIP_92D_SINGLEPHY
  27516. CHIP_988_VIRGE_VX
  27517. CHIP_ACTIVE_MODE
  27518. CHIP_ARCTURUS
  27519. CHIP_ARUBA
  27520. CHIP_AU8810
  27521. CHIP_AU8820
  27522. CHIP_AU8830
  27523. CHIP_A_PAGE_NUM_PUBQ
  27524. CHIP_BARTS
  27525. CHIP_BB
  27526. CHIP_BONAIRE
  27527. CHIP_BONDING_88C_USB_HP
  27528. CHIP_BONDING_88C_USB_MCARD
  27529. CHIP_BONDING_92C_1T2R
  27530. CHIP_BONDING_IDENTIFIER
  27531. CHIP_BOND_ID
  27532. CHIP_BOND_ID_MASK
  27533. CHIP_BOND_ID_SHIFT
  27534. CHIP_BUFFER_TEST
  27535. CHIP_B_PAGE_NUM_PUBQ
  27536. CHIP_CAICOS
  27537. CHIP_CARRIZO
  27538. CHIP_CAYMAN
  27539. CHIP_CEDAR
  27540. CHIP_CONF
  27541. CHIP_CS
  27542. CHIP_CTRL
  27543. CHIP_CYPRESS
  27544. CHIP_DEBUG
  27545. CHIP_DEBUGMODE
  27546. CHIP_DEF
  27547. CHIP_DI
  27548. CHIP_DO
  27549. CHIP_EISA_ID_SIG
  27550. CHIP_EISA_ID_SIG_STR
  27551. CHIP_ENABLE_DONT_CARE
  27552. CHIP_EN_DONT_CARE__FLAG
  27553. CHIP_ERASE
  27554. CHIP_ERASE_2MB_READY_WAIT_JIFFIES
  27555. CHIP_ERRATA_PLL_DELAY
  27556. CHIP_ERRATA_PLL_DUMMYREADS
  27557. CHIP_ERRATA_R300_CG
  27558. CHIP_FAMILY_LAST
  27559. CHIP_FAMILY_LEGACY
  27560. CHIP_FAMILY_MASK
  27561. CHIP_FAMILY_R200
  27562. CHIP_FAMILY_R300
  27563. CHIP_FAMILY_R350
  27564. CHIP_FAMILY_R420
  27565. CHIP_FAMILY_RADEON
  27566. CHIP_FAMILY_RC410
  27567. CHIP_FAMILY_RS100
  27568. CHIP_FAMILY_RS200
  27569. CHIP_FAMILY_RS300
  27570. CHIP_FAMILY_RS400
  27571. CHIP_FAMILY_RS480
  27572. CHIP_FAMILY_RV100
  27573. CHIP_FAMILY_RV200
  27574. CHIP_FAMILY_RV250
  27575. CHIP_FAMILY_RV280
  27576. CHIP_FAMILY_RV350
  27577. CHIP_FAMILY_RV380
  27578. CHIP_FAMILY_UNKNOW
  27579. CHIP_FIJI
  27580. CHIP_FLAGS_MASK
  27581. CHIP_HAINAN
  27582. CHIP_HAS_BASSTREBLE
  27583. CHIP_HAS_CRTC2
  27584. CHIP_HAS_INPUTSEL
  27585. CHIP_HAS_VOLUME
  27586. CHIP_HAWAII
  27587. CHIP_HEMLOCK
  27588. CHIP_ID
  27589. CHIP_ID1
  27590. CHIP_ID2
  27591. CHIP_ID_1251_PG10
  27592. CHIP_ID_1251_PG11
  27593. CHIP_ID_1251_PG12
  27594. CHIP_ID_1271_PG10
  27595. CHIP_ID_1271_PG20
  27596. CHIP_ID_127X_PG10
  27597. CHIP_ID_127X_PG20
  27598. CHIP_ID_128X_PG10
  27599. CHIP_ID_128X_PG20
  27600. CHIP_ID_185x_PG10
  27601. CHIP_ID_185x_PG20
  27602. CHIP_ID_63
  27603. CHIP_ID_66
  27604. CHIP_ID_67
  27605. CHIP_ID_77
  27606. CHIP_ID_93
  27607. CHIP_ID_94
  27608. CHIP_ID_95
  27609. CHIP_ID_96
  27610. CHIP_ID_97
  27611. CHIP_ID_B
  27612. CHIP_ID_D
  27613. CHIP_ID_EM2710
  27614. CHIP_ID_EM2750
  27615. CHIP_ID_EM2765
  27616. CHIP_ID_EM2800
  27617. CHIP_ID_EM28174
  27618. CHIP_ID_EM28178
  27619. CHIP_ID_EM2820
  27620. CHIP_ID_EM2840
  27621. CHIP_ID_EM2860
  27622. CHIP_ID_EM2870
  27623. CHIP_ID_EM2874
  27624. CHIP_ID_EM2883
  27625. CHIP_ID_EM2884
  27626. CHIP_ID_F81216
  27627. CHIP_ID_F81216AD
  27628. CHIP_ID_F81216H
  27629. CHIP_ID_F81865
  27630. CHIP_ID_F81866
  27631. CHIP_ID_GENESIS
  27632. CHIP_ID_HIGH_F71809U
  27633. CHIP_ID_I
  27634. CHIP_ID_ID_MASK
  27635. CHIP_ID_ID_SHIFT
  27636. CHIP_ID_LOW_F71809U
  27637. CHIP_ID_NONE
  27638. CHIP_ID_O
  27639. CHIP_ID_PART_ID
  27640. CHIP_ID_REG
  27641. CHIP_ID_REV_MASK
  27642. CHIP_ID_RTL2831U
  27643. CHIP_ID_RTL2832U
  27644. CHIP_ID_W100
  27645. CHIP_ID_W3200
  27646. CHIP_ID_W3220
  27647. CHIP_ID_YUKON
  27648. CHIP_ID_YUKON_EC
  27649. CHIP_ID_YUKON_EC_U
  27650. CHIP_ID_YUKON_EX
  27651. CHIP_ID_YUKON_FE
  27652. CHIP_ID_YUKON_FE_P
  27653. CHIP_ID_YUKON_LITE
  27654. CHIP_ID_YUKON_LP
  27655. CHIP_ID_YUKON_OPT
  27656. CHIP_ID_YUKON_OP_2
  27657. CHIP_ID_YUKON_PRM
  27658. CHIP_ID_YUKON_SUPR
  27659. CHIP_ID_YUKON_UL_2
  27660. CHIP_ID_YUKON_XL
  27661. CHIP_INDEX
  27662. CHIP_INT_MODE_IS_BC
  27663. CHIP_INT_MODE_IS_NBC
  27664. CHIP_INVALID
  27665. CHIP_IP1000A
  27666. CHIP_IP_41_M
  27667. CHIP_IP_41_P
  27668. CHIP_IP_42_M
  27669. CHIP_IP_42_P
  27670. CHIP_IP_61_M
  27671. CHIP_IP_61_P
  27672. CHIP_IP_62_M
  27673. CHIP_IP_62_P
  27674. CHIP_IS_57711
  27675. CHIP_IS_57711E
  27676. CHIP_IS_57712
  27677. CHIP_IS_57712_MF
  27678. CHIP_IS_57712_VF
  27679. CHIP_IS_57800
  27680. CHIP_IS_57800_MF
  27681. CHIP_IS_57800_VF
  27682. CHIP_IS_57810
  27683. CHIP_IS_57810_MF
  27684. CHIP_IS_57810_VF
  27685. CHIP_IS_57811
  27686. CHIP_IS_57811_MF
  27687. CHIP_IS_57811_VF
  27688. CHIP_IS_57811xx
  27689. CHIP_IS_57840
  27690. CHIP_IS_57840_MF
  27691. CHIP_IS_57840_VF
  27692. CHIP_IS_E1
  27693. CHIP_IS_E1H
  27694. CHIP_IS_E1x
  27695. CHIP_IS_E2
  27696. CHIP_IS_E3
  27697. CHIP_IS_E3A0
  27698. CHIP_IS_E3B0
  27699. CHIP_IS_IGP
  27700. CHIP_IS_MOBILITY
  27701. CHIP_JUNIPER
  27702. CHIP_K2
  27703. CHIP_KABINI
  27704. CHIP_KAVERI
  27705. CHIP_LAST
  27706. CHIP_LM3554
  27707. CHIP_LM3556
  27708. CHIP_LM36010
  27709. CHIP_LM36011
  27710. CHIP_M65_AURORA64VP
  27711. CHIP_MAGIC_VALUE
  27712. CHIP_MASK
  27713. CHIP_MAX
  27714. CHIP_MAX77620
  27715. CHIP_MAX77686
  27716. CHIP_MAX77802
  27717. CHIP_METAL
  27718. CHIP_METAL_MASK
  27719. CHIP_METAL_SHIFT
  27720. CHIP_MFLD_0130
  27721. CHIP_MIN_VOLUME
  27722. CHIP_MODE
  27723. CHIP_MODE_IS_4_PORT
  27724. CHIP_MRST_4100
  27725. CHIP_MULLINS
  27726. CHIP_NAME
  27727. CHIP_NAME_SHIFT
  27728. CHIP_NAVI10
  27729. CHIP_NAVI12
  27730. CHIP_NAVI14
  27731. CHIP_NEED_CHECKMODE
  27732. CHIP_NONE
  27733. CHIP_NORMALMODE
  27734. CHIP_NUM
  27735. CHIP_NUM_57301
  27736. CHIP_NUM_57302
  27737. CHIP_NUM_57304
  27738. CHIP_NUM_57311
  27739. CHIP_NUM_57312
  27740. CHIP_NUM_57314
  27741. CHIP_NUM_57317
  27742. CHIP_NUM_57402
  27743. CHIP_NUM_57404
  27744. CHIP_NUM_57406
  27745. CHIP_NUM_57407
  27746. CHIP_NUM_57412
  27747. CHIP_NUM_57412L
  27748. CHIP_NUM_57414
  27749. CHIP_NUM_57414L
  27750. CHIP_NUM_57416
  27751. CHIP_NUM_57417
  27752. CHIP_NUM_5745X
  27753. CHIP_NUM_57502
  27754. CHIP_NUM_57504
  27755. CHIP_NUM_57508
  27756. CHIP_NUM_57710
  27757. CHIP_NUM_57711
  27758. CHIP_NUM_57711E
  27759. CHIP_NUM_57712
  27760. CHIP_NUM_57712_MF
  27761. CHIP_NUM_57712_VF
  27762. CHIP_NUM_57713
  27763. CHIP_NUM_57713E
  27764. CHIP_NUM_57800
  27765. CHIP_NUM_57800_MF
  27766. CHIP_NUM_57800_VF
  27767. CHIP_NUM_57810
  27768. CHIP_NUM_57810_MF
  27769. CHIP_NUM_57810_VF
  27770. CHIP_NUM_57811
  27771. CHIP_NUM_57811_MF
  27772. CHIP_NUM_57811_VF
  27773. CHIP_NUM_57840_2_20
  27774. CHIP_NUM_57840_4_10
  27775. CHIP_NUM_57840_MF
  27776. CHIP_NUM_57840_MF_OBSOLETE
  27777. CHIP_NUM_57840_OBSOLETE
  27778. CHIP_NUM_57840_VF
  27779. CHIP_NUM_57980S_10
  27780. CHIP_NUM_57980S_100
  27781. CHIP_NUM_57980S_25
  27782. CHIP_NUM_57980S_40
  27783. CHIP_NUM_57980S_50
  27784. CHIP_NUM_57980S_IOV
  27785. CHIP_NUM_57980S_MF
  27786. CHIP_NUM_58700
  27787. CHIP_NUM_58802
  27788. CHIP_NUM_58804
  27789. CHIP_NUM_58808
  27790. CHIP_NUM_AH
  27791. CHIP_NUM_AH_IOV
  27792. CHIP_NUM_MASK
  27793. CHIP_NUM_SHIFT
  27794. CHIP_OFF
  27795. CHIP_OLAND
  27796. CHIP_OZ163T
  27797. CHIP_OZ711M3
  27798. CHIP_OZ992C
  27799. CHIP_PALM
  27800. CHIP_PHYSADDR
  27801. CHIP_PITCAIRN
  27802. CHIP_PM800
  27803. CHIP_PM805
  27804. CHIP_PM860
  27805. CHIP_PM8606
  27806. CHIP_PM8607
  27807. CHIP_POLARIS10
  27808. CHIP_POLARIS11
  27809. CHIP_POLARIS12
  27810. CHIP_PORT_MODE_NONE
  27811. CHIP_POWER_SAVE_MODE
  27812. CHIP_PSB_8108
  27813. CHIP_PSB_8109
  27814. CHIP_R100
  27815. CHIP_R200
  27816. CHIP_R300
  27817. CHIP_R350
  27818. CHIP_R420
  27819. CHIP_R423
  27820. CHIP_R520
  27821. CHIP_R580
  27822. CHIP_R600
  27823. CHIP_R620D
  27824. CHIP_R820C
  27825. CHIP_R820T
  27826. CHIP_R828
  27827. CHIP_R828D
  27828. CHIP_R828S
  27829. CHIP_RAVEN
  27830. CHIP_READ
  27831. CHIP_REDWOOD
  27832. CHIP_RENOIR
  27833. CHIP_RESERVED
  27834. CHIP_RESET
  27835. CHIP_REV
  27836. CHIP_REV_Ax
  27837. CHIP_REV_Bx
  27838. CHIP_REV_ECO_MASK
  27839. CHIP_REV_IS_B0
  27840. CHIP_REV_IS_EMUL
  27841. CHIP_REV_IS_FPGA
  27842. CHIP_REV_IS_SLOW
  27843. CHIP_REV_MASK
  27844. CHIP_REV_PKG_MASK
  27845. CHIP_REV_PKG_SHIFT
  27846. CHIP_REV_SHIFT
  27847. CHIP_REV_SIM
  27848. CHIP_REV_VAL
  27849. CHIP_REV_VER_MASK
  27850. CHIP_REV_VER_SHIFT
  27851. CHIP_REV_YU_EC_A1
  27852. CHIP_REV_YU_EC_A2
  27853. CHIP_REV_YU_EC_A3
  27854. CHIP_REV_YU_EC_U_A0
  27855. CHIP_REV_YU_EC_U_A1
  27856. CHIP_REV_YU_EC_U_B0
  27857. CHIP_REV_YU_EC_U_B1
  27858. CHIP_REV_YU_EX_A0
  27859. CHIP_REV_YU_EX_B0
  27860. CHIP_REV_YU_FE2_A0
  27861. CHIP_REV_YU_FE_A1
  27862. CHIP_REV_YU_FE_A2
  27863. CHIP_REV_YU_LITE_A1
  27864. CHIP_REV_YU_LITE_A3
  27865. CHIP_REV_YU_PRM_A0
  27866. CHIP_REV_YU_PRM_Z1
  27867. CHIP_REV_YU_SU_A0
  27868. CHIP_REV_YU_SU_B0
  27869. CHIP_REV_YU_SU_B1
  27870. CHIP_REV_YU_XL_A0
  27871. CHIP_REV_YU_XL_A1
  27872. CHIP_REV_YU_XL_A2
  27873. CHIP_REV_YU_XL_A3
  27874. CHIP_RS100
  27875. CHIP_RS200
  27876. CHIP_RS300
  27877. CHIP_RS400
  27878. CHIP_RS480
  27879. CHIP_RS600
  27880. CHIP_RS690
  27881. CHIP_RS740
  27882. CHIP_RS780
  27883. CHIP_RS880
  27884. CHIP_RV100
  27885. CHIP_RV200
  27886. CHIP_RV250
  27887. CHIP_RV280
  27888. CHIP_RV350
  27889. CHIP_RV380
  27890. CHIP_RV410
  27891. CHIP_RV515
  27892. CHIP_RV530
  27893. CHIP_RV560
  27894. CHIP_RV570
  27895. CHIP_RV610
  27896. CHIP_RV620
  27897. CHIP_RV630
  27898. CHIP_RV635
  27899. CHIP_RV670
  27900. CHIP_RV710
  27901. CHIP_RV730
  27902. CHIP_RV740
  27903. CHIP_RV770
  27904. CHIP_SELECT
  27905. CHIP_SELECT_NUM
  27906. CHIP_SIG_AND_MAP_SPI
  27907. CHIP_SIZE
  27908. CHIP_SK
  27909. CHIP_STONEY
  27910. CHIP_SUMO
  27911. CHIP_SUMO2
  27912. CHIP_TAHITI
  27913. CHIP_TIME
  27914. CHIP_TONGA
  27915. CHIP_TOPAZ
  27916. CHIP_TURKS
  27917. CHIP_TYPE_MASK
  27918. CHIP_TYPE_VT6110
  27919. CHIP_UNDECIDED_FLAG
  27920. CHIP_UNKNOWN
  27921. CHIP_VEGA10
  27922. CHIP_VEGA12
  27923. CHIP_VEGA20
  27924. CHIP_VEGAM
  27925. CHIP_VENDOR_SMIC
  27926. CHIP_VENDOR_TSMC
  27927. CHIP_VENDOR_UMC
  27928. CHIP_VENDOR_UMC_B_CUT
  27929. CHIP_VER
  27930. CHIP_VERDE
  27931. CHIP_VERSION
  27932. CHIP_VER_B
  27933. CHIP_VER_PCIEUART
  27934. CHIP_VER_RTL_MASK
  27935. CHIP_VER_RTL_SHIFT
  27936. CHIP_VER_SIZE
  27937. CHIP_WINDOW
  27938. CHIP_XXX_TRIO
  27939. CHIP_XXX_TRIO64V2_DXGX
  27940. CHIP_XXX_VIRGE_DXGX
  27941. CHI_CONFB
  27942. CHImaster
  27943. CHIslave
  27944. CHK
  27945. CHKCOND
  27946. CHKINFO
  27947. CHKRANGE
  27948. CHKRES_NEW_SESSION
  27949. CHKRES_NOT_READY
  27950. CHKRES_NO_TAPE
  27951. CHKRES_READY
  27952. CHKSUM_BLOCK_SIZE
  27953. CHKSUM_CRC_EN
  27954. CHKSUM_DIGEST_SIZE
  27955. CHKSUM_ECC_EN
  27956. CHKSUM_LEN
  27957. CHKSUM_REG
  27958. CHKSUM_VAL
  27959. CHK_1STEP
  27960. CHK_AUTO_DELINK
  27961. CHK_BIT
  27962. CHK_BIT_DATA
  27963. CHK_BIT_DATA_DATA
  27964. CHK_DEV_STATE
  27965. CHK_FLAGS
  27966. CHK_HG8BIT
  27967. CHK_IO_SIZE
  27968. CHK_MAC_ERR_BIT
  27969. CHK_MAGIC
  27970. CHK_MMC
  27971. CHK_MMC_26M
  27972. CHK_MMC_4BIT
  27973. CHK_MMC_52M
  27974. CHK_MMC_8BIT
  27975. CHK_MMC_DDR52
  27976. CHK_MMC_HS
  27977. CHK_MMC_SECTOR_MODE
  27978. CHK_MS4BIT
  27979. CHK_MS8BIT
  27980. CHK_MSHG
  27981. CHK_MSPRO
  27982. CHK_MSXC
  27983. CHK_NEQ
  27984. CHK_PAD_ERR_BIT
  27985. CHK_PCI_PID
  27986. CHK_SCSI_P
  27987. CHK_SD
  27988. CHK_SD30_SPEED
  27989. CHK_SDIO_EXIST
  27990. CHK_SDIO_IGNORED
  27991. CHK_SD_DDR50
  27992. CHK_SD_HC
  27993. CHK_SD_HCXC
  27994. CHK_SD_HS
  27995. CHK_SD_SDR104
  27996. CHK_SD_SDR50
  27997. CHK_SD_XC
  27998. CHK_SVID_SMID
  27999. CHL_INT0
  28000. CHL_INT0_DWS_LOST_MSK
  28001. CHL_INT0_DWS_LOST_OFF
  28002. CHL_INT0_HOTPLUG_TOUT_MSK
  28003. CHL_INT0_HOTPLUG_TOUT_OFF
  28004. CHL_INT0_ID_TIMEOUT_MSK
  28005. CHL_INT0_ID_TIMEOUT_OFF
  28006. CHL_INT0_MSK
  28007. CHL_INT0_MSK_PHYCTRL_NOTRDY_MSK
  28008. CHL_INT0_MSK_PHYCTRL_NOTRDY_OFF
  28009. CHL_INT0_NOT_RDY_MSK
  28010. CHL_INT0_NOT_RDY_OFF
  28011. CHL_INT0_PHYCTRL_NOTRDY_MSK
  28012. CHL_INT0_PHYCTRL_NOTRDY_OFF
  28013. CHL_INT0_PHY_RDY_MSK
  28014. CHL_INT0_PHY_RDY_OFF
  28015. CHL_INT0_SL_IDAF_FAIL_MSK
  28016. CHL_INT0_SL_IDAF_FAIL_OFF
  28017. CHL_INT0_SL_OPAF_FAIL_MSK
  28018. CHL_INT0_SL_OPAF_FAIL_OFF
  28019. CHL_INT0_SL_PHY_ENABLE_MSK
  28020. CHL_INT0_SL_PHY_ENABLE_OFF
  28021. CHL_INT0_SL_PS_FAIL_MSK
  28022. CHL_INT0_SL_PS_FAIL_OFF
  28023. CHL_INT0_SL_RX_BCST_ACK_MSK
  28024. CHL_INT0_SL_RX_BCST_ACK_OFF
  28025. CHL_INT0_SN_FAIL_NGR_MSK
  28026. CHL_INT0_SN_FAIL_NGR_OFF
  28027. CHL_INT1
  28028. CHL_INT1_DMAC_RX_AXI_RD_ERR_OFF
  28029. CHL_INT1_DMAC_RX_AXI_RUSER_ERR_OFF
  28030. CHL_INT1_DMAC_RX_AXI_WR_ERR_OFF
  28031. CHL_INT1_DMAC_RX_ECC_1B_ERR_OFF
  28032. CHL_INT1_DMAC_RX_ECC_ERR_MSK
  28033. CHL_INT1_DMAC_RX_ECC_ERR_OFF
  28034. CHL_INT1_DMAC_RX_ECC_MB_ERR_OFF
  28035. CHL_INT1_DMAC_RX_FIFO_ERR_OFF
  28036. CHL_INT1_DMAC_TX_AXI_RD_ERR_OFF
  28037. CHL_INT1_DMAC_TX_AXI_RUSER_ERR_OFF
  28038. CHL_INT1_DMAC_TX_AXI_WR_ERR_OFF
  28039. CHL_INT1_DMAC_TX_ECC_1B_ERR_OFF
  28040. CHL_INT1_DMAC_TX_ECC_ERR_MSK
  28041. CHL_INT1_DMAC_TX_ECC_ERR_OFF
  28042. CHL_INT1_DMAC_TX_ECC_MB_ERR_OFF
  28043. CHL_INT1_DMAC_TX_FIFO_ERR_OFF
  28044. CHL_INT1_MSK
  28045. CHL_INT2
  28046. CHL_INT2_MSK
  28047. CHL_INT2_RX_CODE_ERR_OFF
  28048. CHL_INT2_RX_DISP_ERR_OFF
  28049. CHL_INT2_RX_INVLD_DW_OFF
  28050. CHL_INT2_SL_IDAF_TOUT_CONF_OFF
  28051. CHL_INT2_SL_PHY_ENA_MSK
  28052. CHL_INT2_SL_PHY_ENA_OFF
  28053. CHL_INT2_SL_RX_BC_ACK_MSK
  28054. CHL_INT2_SL_RX_BC_ACK_OFF
  28055. CHL_INT2_STP_LINK_TIMEOUT_OFF
  28056. CHL_INT_COAL_EN
  28057. CHL_SEQN_LSB
  28058. CHL_SEQ_N
  28059. CHM
  28060. CHM1_SEL
  28061. CHM2_SEL
  28062. CHMAP
  28063. CHMAP_EXIST
  28064. CHMCTRL_DECODE1
  28065. CHMCTRL_DECODE2
  28066. CHMCTRL_DECODE3
  28067. CHMCTRL_DECODE4
  28068. CHMCTRL_MACTRL
  28069. CHMCTRL_NBANKS
  28070. CHMCTRL_NDGRPS
  28071. CHMCTRL_NDIMMS
  28072. CHMCTRL_TCTRL1
  28073. CHMCTRL_TCTRL2
  28074. CHMCTRL_TCTRL3
  28075. CHMCTRL_TCTRL4
  28076. CHMC_DIMMS_PER_MC
  28077. CHMIX_MASK
  28078. CHMO_SEL
  28079. CHNCOUNT0_F
  28080. CHNCOUNT0_S
  28081. CHNCOUNT0_V
  28082. CHNCOUNT1_F
  28083. CHNCOUNT1_S
  28084. CHNCOUNT1_V
  28085. CHNCOUNT2_F
  28086. CHNCOUNT2_S
  28087. CHNCOUNT2_V
  28088. CHNCOUNT3_F
  28089. CHNCOUNT3_S
  28090. CHNCOUNT3_V
  28091. CHNENABLE_F
  28092. CHNENABLE_S
  28093. CHNENABLE_V
  28094. CHNLS_OFFSET
  28095. CHNL_4
  28096. CHNL_6
  28097. CHNL_8
  28098. CHNL_ACTIVE
  28099. CHNL_ACTIVE__CHANNEL0
  28100. CHNL_ACTIVE__CHANNEL1
  28101. CHNL_ACTIVE__CHANNEL2
  28102. CHNL_ACTIVE__CHANNEL3
  28103. CHNL_CLASS
  28104. CHNL_CTRL_IRQ_COAL_EN
  28105. CHNL_CTRL_IRQ_DLY_EN
  28106. CHNL_CTRL_IRQ_EN
  28107. CHNL_CTRL_IRQ_ERR_EN
  28108. CHNL_CTRL_IRQ_IOE
  28109. CHNL_ENT_INT_MSK
  28110. CHNL_INT_STATUS
  28111. CHNL_OFFSET
  28112. CHNL_PHYUPDOWN_INT_MSK
  28113. CHNL_STS_ADDRERR
  28114. CHNL_STS_BSYWR
  28115. CHNL_STS_CMPERR
  28116. CHNL_STS_CMPLT
  28117. CHNL_STS_CURPERR
  28118. CHNL_STS_ENGBUSY
  28119. CHNL_STS_EOP
  28120. CHNL_STS_ERR
  28121. CHNL_STS_IOE
  28122. CHNL_STS_NXTPERR
  28123. CHNL_STS_SOE
  28124. CHNL_STS_SOP
  28125. CHNL_STS_TAILERR
  28126. CHNUNDFLOW0_F
  28127. CHNUNDFLOW0_S
  28128. CHNUNDFLOW0_V
  28129. CHNUNDFLOW1_F
  28130. CHNUNDFLOW1_S
  28131. CHNUNDFLOW1_V
  28132. CHNUNDFLOW2_F
  28133. CHNUNDFLOW2_S
  28134. CHNUNDFLOW2_V
  28135. CHNUNDFLOW3_F
  28136. CHNUNDFLOW3_S
  28137. CHNUNDFLOW3_V
  28138. CHN_CTRL0
  28139. CHN_CTRL1
  28140. CHN_ENABLE
  28141. CHN_IDX_OFFSET
  28142. CHN_INTERLACE_BUF_CTRL
  28143. CHN_INTERLACE_EN
  28144. CHN_NUM
  28145. CHN_SCREEN_H_MASK
  28146. CHN_SCREEN_H_SHIFT
  28147. CHN_SCREEN_W_MASK
  28148. CHN_SCREEN_W_SHIFT
  28149. CHN_UPDATE
  28150. CHOICE
  28151. CHOKE_MAX_QUEUE
  28152. CHOOSE_LOAD_FUNC
  28153. CHOP_SHIFTCOUNT
  28154. CHOR_ABORT
  28155. CHOR_CLRDONE
  28156. CHOR_CLRLC
  28157. CHOR_CLRRB
  28158. CHOR_CLR_LPAUSE
  28159. CHOR_CLR_SEND_TC
  28160. CHOR_CONT
  28161. CHOR_DMARESET
  28162. CHOR_FRESET
  28163. CHOR_SET_LPAUSE
  28164. CHOR_SET_SEND_TC
  28165. CHOR_START
  28166. CHOR_STOP
  28167. CHPAFSR_DBERR
  28168. CHPAFSR_DTO
  28169. CHPAFSR_DUE
  28170. CHPAFSR_ERRORS
  28171. CHPAFSR_THCE
  28172. CHPAFSR_TSCE
  28173. CHPAFSR_TUE
  28174. CHPL_ETSI
  28175. CHPL_FCC
  28176. CHPL_FRANCE
  28177. CHPL_GLOBAL
  28178. CHPL_IC
  28179. CHPL_ISRAEL
  28180. CHPL_MKK
  28181. CHPL_MKK1
  28182. CHPL_SPA
  28183. CHPL_SPAIN
  28184. CHPL_TELEC
  28185. CHPL_WORLD
  28186. CHP_CLK_CTRL1
  28187. CHP_CLK_CTRL2
  28188. CHP_EN_CTRL
  28189. CHP_INFO_UPDATE_INTERVAL
  28190. CHP_OFFLINE
  28191. CHP_ONLINE
  28192. CHP_STATUS_CONFIGURED
  28193. CHP_STATUS_NOT_RECOGNIZED
  28194. CHP_STATUS_RESERVED
  28195. CHP_STATUS_STANDBY
  28196. CHP_VARY_OFF
  28197. CHP_VARY_ON
  28198. CHRA
  28199. CHRB
  28200. CHRCA_MODE_MASK
  28201. CHRCA_MODE_SHIFT
  28202. CHRCA_REG
  28203. CHRDEV
  28204. CHRDEV_MAJOR_DYN_END
  28205. CHRDEV_MAJOR_DYN_EXT_END
  28206. CHRDEV_MAJOR_DYN_EXT_START
  28207. CHRDEV_MAJOR_HASH_SIZE
  28208. CHRDEV_MAJOR_MAX
  28209. CHRDEV_REGION_SIZE
  28210. CHRESET
  28211. CHRG_CCCV_CC_BIT_POS
  28212. CHRG_CCCV_CC_LSB_RES
  28213. CHRG_CCCV_CC_MASK
  28214. CHRG_CCCV_CC_OFFSET
  28215. CHRG_CCCV_CHG_EN
  28216. CHRG_CCCV_CV_4100MV
  28217. CHRG_CCCV_CV_4150MV
  28218. CHRG_CCCV_CV_4200MV
  28219. CHRG_CCCV_CV_4350MV
  28220. CHRG_CCCV_CV_BIT_POS
  28221. CHRG_CCCV_CV_MASK
  28222. CHRG_CCCV_ITERM_20P
  28223. CHRG_DONE
  28224. CHRG_ERROR
  28225. CHRG_FAULT_INPUT
  28226. CHRG_FAULT_NORMAL
  28227. CHRG_FAULT_THERMAL_SHUTDOWN
  28228. CHRG_FAULT_TIMER_EXPIRED
  28229. CHRG_ILIM_TEMP_LOOP_EN
  28230. CHRG_INTR_END
  28231. CHRG_OFF
  28232. CHRG_ON
  28233. CHRG_STAT_BAT_PRESENT
  28234. CHRG_STAT_BAT_SAFE_MODE
  28235. CHRG_STAT_BAT_VALID
  28236. CHRG_STAT_CHARGING
  28237. CHRG_STAT_PMIC_OTP
  28238. CHRG_VBUS_ILIM_100MA
  28239. CHRG_VBUS_ILIM_1500MA
  28240. CHRG_VBUS_ILIM_2000MA
  28241. CHRG_VBUS_ILIM_2500MA
  28242. CHRG_VBUS_ILIM_3000MA
  28243. CHRG_VBUS_ILIM_3500MA
  28244. CHRG_VBUS_ILIM_4000MA
  28245. CHRG_VBUS_ILIM_500MA
  28246. CHRG_VBUS_ILIM_900MA
  28247. CHRG_VBUS_ILIM_BIT_POS
  28248. CHRG_VBUS_ILIM_MASK
  28249. CHRG_VHTFC_45C
  28250. CHRG_VLTFC_0C
  28251. CHROMA_420
  28252. CHROMA_CTRL
  28253. CHROMA_FULL
  28254. CHROMA_H1V2
  28255. CHROMA_H2V1
  28256. CHROMA_KEY_RANGE
  28257. CHROMA_QUANT_OFF
  28258. CHROMA_STRIDE
  28259. CHROMA_STRIDE_MASK
  28260. CHROMA_STRIDE_SHIFT
  28261. CHROMA_VBIOFF_CFG
  28262. CHROM_FILT
  28263. CHROOT_NSCONNECT
  28264. CHSCIF0_HCTS
  28265. CHSCIF0_HRTS
  28266. CHSCIF0_HRX
  28267. CHSCIF0_HSCK
  28268. CHSCIF0_HTX
  28269. CHSCIF1_HCTS
  28270. CHSCIF1_HRTS
  28271. CHSCIF1_HRX
  28272. CHSCIF1_HSCK
  28273. CHSCIF1_HTX
  28274. CHSC_AC1_INITIATE_INPUTQ
  28275. CHSC_AC2_DATA_DIV_AVAILABLE
  28276. CHSC_AC2_DATA_DIV_ENABLED
  28277. CHSC_AC2_MULTI_BUFFER_AVAILABLE
  28278. CHSC_AC2_MULTI_BUFFER_ENABLED
  28279. CHSC_AC3_FORMAT2_CQ_AVAILABLE
  28280. CHSC_FLAG_QDIO_CAPABILITY
  28281. CHSC_FLAG_VALIDITY
  28282. CHSC_INFO_CCL
  28283. CHSC_INFO_CHANNEL_PATH
  28284. CHSC_INFO_CI
  28285. CHSC_INFO_CPD
  28286. CHSC_INFO_CU
  28287. CHSC_INFO_DCAL
  28288. CHSC_INFO_SCH_CU
  28289. CHSC_IOCTL_MAGIC
  28290. CHSC_LOG
  28291. CHSC_LOG_HEX
  28292. CHSC_MAX_REQUEST_LEN
  28293. CHSC_MAX_RESPONSE_LEN
  28294. CHSC_MSG
  28295. CHSC_ON_CLOSE_REMOVE
  28296. CHSC_ON_CLOSE_SET
  28297. CHSC_SCH_ISC
  28298. CHSC_SDA_OC_MSS
  28299. CHSC_SEI_NT0
  28300. CHSC_SEI_NT2
  28301. CHSC_SIZE
  28302. CHSC_START
  28303. CHSC_START_SYNC
  28304. CHSPEC2BAND
  28305. CHSPEC_BAND
  28306. CHSPEC_BW
  28307. CHSPEC_CHANNEL
  28308. CHSPEC_CTL_CHAN
  28309. CHSPEC_CTL_SB
  28310. CHSPEC_IS10
  28311. CHSPEC_IS20
  28312. CHSPEC_IS2G
  28313. CHSPEC_IS40
  28314. CHSPEC_IS5G
  28315. CHSPEC_IS80
  28316. CHSPEC_SB_LOWER
  28317. CHSPEC_SB_NONE
  28318. CHSPEC_SB_UPPER
  28319. CHSR_CONTS_RB
  28320. CHSR_DBERR
  28321. CHSR_DERR
  28322. CHSR_DERR_MASK
  28323. CHSR_DOERR
  28324. CHSR_DONE
  28325. CHSR_DRDY
  28326. CHSR_DRERR
  28327. CHSR_DRQ0
  28328. CHSR_DRQ1
  28329. CHSR_END
  28330. CHSR_ERROR
  28331. CHSR_HABORT
  28332. CHSR_INT
  28333. CHSR_LBERR
  28334. CHSR_LERR
  28335. CHSR_LERR_MASK
  28336. CHSR_LINKC
  28337. CHSR_LOERR
  28338. CHSR_LPAUSES
  28339. CHSR_LRERR
  28340. CHSR_MBERR
  28341. CHSR_MERR
  28342. CHSR_MERR_MASK
  28343. CHSR_MOERR
  28344. CHSR_MRDY
  28345. CHSR_MRERR
  28346. CHSR_OPERR
  28347. CHSR_OPERR_FIFOERROR
  28348. CHSR_OPERR_LINKERROR
  28349. CHSR_OPERR_MASK
  28350. CHSR_OPERR_NOERROR
  28351. CHSR_SABORT
  28352. CHSR_SARS
  28353. CHSR_STOPS
  28354. CHSR_XFERR
  28355. CHS_B_UP
  28356. CHS_D_UP
  28357. CHS_NOTIFY_LL
  28358. CHTDC_TI_ADCCMPL
  28359. CHTDC_TI_BPTHERM
  28360. CHTDC_TI_CCEOCAL
  28361. CHTDC_TI_DIETEMP
  28362. CHTDC_TI_DIETMPWARN
  28363. CHTDC_TI_GPADC
  28364. CHTDC_TI_IRQLVL1
  28365. CHTDC_TI_MASK_IRQLVL1
  28366. CHTDC_TI_PWRBTN
  28367. CHTDC_TI_SIRQ_REG
  28368. CHTDC_TI_VBAT
  28369. CHTDC_TI_VBATLOW
  28370. CHTDC_TI_VBUSDET
  28371. CHTEN_STS
  28372. CHTLS_10G_RCVWIN
  28373. CHTLS_10G_SNDWIN
  28374. CHTLS_CDEV_STATE_UP
  28375. CHTLS_KEY_CONTEXT_DDR
  28376. CHTLS_KEY_CONTEXT_DSGL
  28377. CHTLS_KEY_CONTEXT_IMM
  28378. CHTLS_LISTEN_START
  28379. CHTLS_LISTEN_STOP
  28380. CHT_CODEC_DAI
  28381. CHT_CODEC_DAI1
  28382. CHT_CODEC_DAI2
  28383. CHT_CRC_HRV
  28384. CHT_DSP_SSS
  28385. CHT_DSP_SSS_POS
  28386. CHT_PLAT_CLK_3_HZ
  28387. CHT_RT5645_MAP
  28388. CHT_RT5645_PMC_PLT_CLK_0
  28389. CHT_RT5645_SSP0_AIF1
  28390. CHT_RT5645_SSP0_AIF2
  28391. CHT_RT5645_SSP2_AIF2
  28392. CHT_SURFACE_MACH
  28393. CHT_WC_ADC_IRQ
  28394. CHT_WC_BCU_IRQ
  28395. CHT_WC_CHGDISCTRL
  28396. CHT_WC_CHGDISCTRL_DRV
  28397. CHT_WC_CHGDISCTRL_FN
  28398. CHT_WC_CHGDISCTRL_OUT
  28399. CHT_WC_CHGRCTRL0
  28400. CHT_WC_CHGRCTRL0_CCSM_OFF
  28401. CHT_WC_CHGRCTRL0_CHGRRESET
  28402. CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK
  28403. CHT_WC_CHGRCTRL0_DBPOFF
  28404. CHT_WC_CHGRCTRL0_EMRGCHREN
  28405. CHT_WC_CHGRCTRL0_EXTCHRDIS
  28406. CHT_WC_CHGRCTRL0_SWCONTROL
  28407. CHT_WC_CHGRCTRL0_TTLCK
  28408. CHT_WC_CHGRCTRL1
  28409. CHT_WC_CHGRCTRL1_DBPEN
  28410. CHT_WC_CHGRCTRL1_FTEMP_EVENT
  28411. CHT_WC_CHGRCTRL1_FUSB_INLMT_100
  28412. CHT_WC_CHGRCTRL1_FUSB_INLMT_150
  28413. CHT_WC_CHGRCTRL1_FUSB_INLMT_1500
  28414. CHT_WC_CHGRCTRL1_FUSB_INLMT_500
  28415. CHT_WC_CHGRCTRL1_FUSB_INLMT_900
  28416. CHT_WC_CHGRCTRL1_OTGMODE
  28417. CHT_WC_CRIT_IRQ
  28418. CHT_WC_EXTCHGRIRQ
  28419. CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK
  28420. CHT_WC_EXTCHGRIRQ_CLIENT_IRQ
  28421. CHT_WC_EXTCHGRIRQ_MSK
  28422. CHT_WC_EXTCHGRIRQ_NACK_IRQ
  28423. CHT_WC_EXTCHGRIRQ_READ_IRQ
  28424. CHT_WC_EXTCHGRIRQ_WRITE_IRQ
  28425. CHT_WC_EXT_CHGR_IRQ
  28426. CHT_WC_GPIO_IRQ
  28427. CHT_WC_HRV
  28428. CHT_WC_I2C_CLIENT_ADDR
  28429. CHT_WC_I2C_CTRL
  28430. CHT_WC_I2C_CTRL_RD
  28431. CHT_WC_I2C_CTRL_WR
  28432. CHT_WC_I2C_RDDATA
  28433. CHT_WC_I2C_REG_OFFSET
  28434. CHT_WC_I2C_WRDATA
  28435. CHT_WC_IRQLVL1
  28436. CHT_WC_IRQLVL1_MASK
  28437. CHT_WC_PHYCTRL
  28438. CHT_WC_PWRSRC_BATT
  28439. CHT_WC_PWRSRC_DC
  28440. CHT_WC_PWRSRC_IRQ
  28441. CHT_WC_PWRSRC_IRQ_MASK
  28442. CHT_WC_PWRSRC_RID_ACA
  28443. CHT_WC_PWRSRC_RID_FLOAT
  28444. CHT_WC_PWRSRC_RID_GND
  28445. CHT_WC_PWRSRC_STS
  28446. CHT_WC_PWRSRC_USBID_MASK
  28447. CHT_WC_PWRSRC_USBID_SHIFT
  28448. CHT_WC_PWRSRC_VBUS
  28449. CHT_WC_THRM_IRQ
  28450. CHT_WC_USBSRC
  28451. CHT_WC_USBSRC_STS_FAIL
  28452. CHT_WC_USBSRC_STS_MASK
  28453. CHT_WC_USBSRC_STS_SUCCESS
  28454. CHT_WC_USBSRC_TYPE_ACA
  28455. CHT_WC_USBSRC_TYPE_CDP
  28456. CHT_WC_USBSRC_TYPE_DCP
  28457. CHT_WC_USBSRC_TYPE_DCP_EXTPHY
  28458. CHT_WC_USBSRC_TYPE_FLOATING
  28459. CHT_WC_USBSRC_TYPE_MASK
  28460. CHT_WC_USBSRC_TYPE_MHL
  28461. CHT_WC_USBSRC_TYPE_NONE
  28462. CHT_WC_USBSRC_TYPE_OTHER
  28463. CHT_WC_USBSRC_TYPE_SDP
  28464. CHT_WC_USBSRC_TYPE_SE1
  28465. CHT_WC_USBSRC_TYPE_SHIFT
  28466. CHT_WC_V1P05A_CTRL
  28467. CHT_WC_V1P05A_VSEL
  28468. CHT_WC_V1P15_CTRL
  28469. CHT_WC_V1P15_VSEL
  28470. CHT_WC_V1P2A_CTRL
  28471. CHT_WC_V1P2A_VSEL
  28472. CHT_WC_V1P2SX_CTRL
  28473. CHT_WC_V1P2SX_VSEL
  28474. CHT_WC_V1P8A_CTRL
  28475. CHT_WC_V1P8A_VSEL
  28476. CHT_WC_V1P8SX_CTRL
  28477. CHT_WC_V1P8SX_VSEL
  28478. CHT_WC_V2P8SX_CTRL
  28479. CHT_WC_V2P8SX_VSEL
  28480. CHT_WC_V3P3A_CTRL
  28481. CHT_WC_V3P3A_VSEL
  28482. CHT_WC_V3P3SD_CTRL
  28483. CHT_WC_V3P3SD_VSEL
  28484. CHT_WC_VBUS_GPIO_CTLO
  28485. CHT_WC_VBUS_GPIO_CTLO_DIR_OUT
  28486. CHT_WC_VBUS_GPIO_CTLO_DRV_OD
  28487. CHT_WC_VBUS_GPIO_CTLO_OUTPUT
  28488. CHT_WC_VDDQ_CTRL
  28489. CHT_WC_VDDQ_VSEL
  28490. CHT_WC_VPROG1A_CTRL
  28491. CHT_WC_VPROG1A_VSEL
  28492. CHT_WC_VPROG1B_CTRL
  28493. CHT_WC_VPROG1B_VSEL
  28494. CHT_WC_VPROG1F_CTRL
  28495. CHT_WC_VPROG1F_VSEL
  28496. CHT_WC_VPROG2D_CTRL
  28497. CHT_WC_VPROG2D_VSEL
  28498. CHT_WC_VPROG3A_CTRL
  28499. CHT_WC_VPROG3A_VSEL
  28500. CHT_WC_VPROG3B_CTRL
  28501. CHT_WC_VPROG3B_VSEL
  28502. CHT_WC_VPROG4A_CTRL
  28503. CHT_WC_VPROG4A_VSEL
  28504. CHT_WC_VPROG4B_CTRL
  28505. CHT_WC_VPROG4B_VSEL
  28506. CHT_WC_VPROG4C_CTRL
  28507. CHT_WC_VPROG4C_VSEL
  28508. CHT_WC_VPROG4D_CTRL
  28509. CHT_WC_VPROG4D_VSEL
  28510. CHT_WC_VPROG5A_CTRL
  28511. CHT_WC_VPROG5A_VSEL
  28512. CHT_WC_VPROG5B_CTRL
  28513. CHT_WC_VPROG5B_VSEL
  28514. CHT_WC_VPROG6A_CTRL
  28515. CHT_WC_VPROG6A_VSEL
  28516. CHT_WC_VPROG6B_CTRL
  28517. CHT_WC_VPROG6B_VSEL
  28518. CHT_WC_VSDIO_CTRL
  28519. CHT_WC_VSDIO_VSEL
  28520. CHUB_ATC_L1_DEBUG_TLB__CREDITS_L1_L2_MASK
  28521. CHUB_ATC_L1_DEBUG_TLB__CREDITS_L1_L2__SHIFT
  28522. CHUB_ATC_L1_DEBUG_TLB__CREDITS_L1_RPB_MASK
  28523. CHUB_ATC_L1_DEBUG_TLB__CREDITS_L1_RPB__SHIFT
  28524. CHUB_ATC_L1_DEBUG_TLB__DEBUG_ECO_MASK
  28525. CHUB_ATC_L1_DEBUG_TLB__DEBUG_ECO__SHIFT
  28526. CHUB_ATC_L1_DEBUG_TLB__DISABLE_CACHING_UNTRANSLATED_RETURNS_MASK
  28527. CHUB_ATC_L1_DEBUG_TLB__DISABLE_CACHING_UNTRANSLATED_RETURNS__SHIFT
  28528. CHUB_ATC_L1_DEBUG_TLB__DISABLE_FRAGMENTS_MASK
  28529. CHUB_ATC_L1_DEBUG_TLB__DISABLE_FRAGMENTS__SHIFT
  28530. CHUB_ATC_L1_DEBUG_TLB__DISABLE_INVALIDATE_BY_ADDRESS_RANGE_MASK
  28531. CHUB_ATC_L1_DEBUG_TLB__DISABLE_INVALIDATE_BY_ADDRESS_RANGE__SHIFT
  28532. CHUB_ATC_L1_DEBUG_TLB__EFFECTIVE_CAM_SIZE_MASK
  28533. CHUB_ATC_L1_DEBUG_TLB__EFFECTIVE_CAM_SIZE__SHIFT
  28534. CHUB_ATC_L1_DEBUG_TLB__EFFECTIVE_WORK_QUEUE_SIZE_MASK
  28535. CHUB_ATC_L1_DEBUG_TLB__EFFECTIVE_WORK_QUEUE_SIZE__SHIFT
  28536. CHUB_ATC_L1_DEBUG_TLB__INVALIDATE_ALL_MASK
  28537. CHUB_ATC_L1_DEBUG_TLB__INVALIDATE_ALL__SHIFT
  28538. CHUB_ATC_L1_STATUS__BAD_NEED_ATS_MASK
  28539. CHUB_ATC_L1_STATUS__BAD_NEED_ATS__SHIFT
  28540. CHUB_ATC_L1_STATUS__BUSY_MASK
  28541. CHUB_ATC_L1_STATUS__BUSY__SHIFT
  28542. CHUB_ATC_L1_STATUS__DEADLOCK_DETECTION_MASK
  28543. CHUB_ATC_L1_STATUS__DEADLOCK_DETECTION__SHIFT
  28544. CHUB_ATC_PERFCOUNTER0_CFG__CLEAR_MASK
  28545. CHUB_ATC_PERFCOUNTER0_CFG__CLEAR__SHIFT
  28546. CHUB_ATC_PERFCOUNTER0_CFG__ENABLE_MASK
  28547. CHUB_ATC_PERFCOUNTER0_CFG__ENABLE__SHIFT
  28548. CHUB_ATC_PERFCOUNTER0_CFG__PERF_MODE_MASK
  28549. CHUB_ATC_PERFCOUNTER0_CFG__PERF_MODE__SHIFT
  28550. CHUB_ATC_PERFCOUNTER0_CFG__PERF_SEL_END_MASK
  28551. CHUB_ATC_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT
  28552. CHUB_ATC_PERFCOUNTER0_CFG__PERF_SEL_MASK
  28553. CHUB_ATC_PERFCOUNTER0_CFG__PERF_SEL__SHIFT
  28554. CHUB_ATC_PERFCOUNTER1_CFG__CLEAR_MASK
  28555. CHUB_ATC_PERFCOUNTER1_CFG__CLEAR__SHIFT
  28556. CHUB_ATC_PERFCOUNTER1_CFG__ENABLE_MASK
  28557. CHUB_ATC_PERFCOUNTER1_CFG__ENABLE__SHIFT
  28558. CHUB_ATC_PERFCOUNTER1_CFG__PERF_MODE_MASK
  28559. CHUB_ATC_PERFCOUNTER1_CFG__PERF_MODE__SHIFT
  28560. CHUB_ATC_PERFCOUNTER1_CFG__PERF_SEL_END_MASK
  28561. CHUB_ATC_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT
  28562. CHUB_ATC_PERFCOUNTER1_CFG__PERF_SEL_MASK
  28563. CHUB_ATC_PERFCOUNTER1_CFG__PERF_SEL__SHIFT
  28564. CHUB_ATC_PERFCOUNTER_HI__COMPARE_VALUE_MASK
  28565. CHUB_ATC_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT
  28566. CHUB_ATC_PERFCOUNTER_HI__COUNTER_HI_MASK
  28567. CHUB_ATC_PERFCOUNTER_HI__COUNTER_HI__SHIFT
  28568. CHUB_ATC_PERFCOUNTER_LO__COUNTER_LO_MASK
  28569. CHUB_ATC_PERFCOUNTER_LO__COUNTER_LO__SHIFT
  28570. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK
  28571. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT
  28572. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK
  28573. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT
  28574. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK
  28575. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT
  28576. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK
  28577. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT
  28578. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK
  28579. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT
  28580. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK
  28581. CHUB_ATC_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT
  28582. CHUB_CONTROL
  28583. CHUB_TC_RET_CREDITS
  28584. CHUB_TC_RET_CREDITS_ENUM
  28585. CHUNKSZ
  28586. CHUNKS_MAX
  28587. CHUNK_ALIGN
  28588. CHUNK_ALLOCATED
  28589. CHUNK_ALLOC_FORCE
  28590. CHUNK_ALLOC_LIMITED
  28591. CHUNK_ALLOC_NO_FORCE
  28592. CHUNK_COUNT
  28593. CHUNK_DATA
  28594. CHUNK_ID_CNFG
  28595. CHUNK_ID_FRMT
  28596. CHUNK_ID_FRWR
  28597. CHUNK_INFO_SIZE
  28598. CHUNK_MASK
  28599. CHUNK_SHIFT
  28600. CHUNK_SIZE
  28601. CHUNK_SIZE_16KB
  28602. CHUNK_SIZE_1KB
  28603. CHUNK_SIZE_2KB
  28604. CHUNK_SIZE_32KB
  28605. CHUNK_SIZE_4KB
  28606. CHUNK_SIZE_64KB
  28607. CHUNK_SIZE_8KB
  28608. CHUNK_TRIMMED
  28609. CHUNK_UNIT
  28610. CHV_BIAS_CPU_50_SOC_50
  28611. CHV_BLEND
  28612. CHV_BLEND_ANDROID
  28613. CHV_BLEND_LEGACY
  28614. CHV_BLEND_MASK
  28615. CHV_BLEND_MPO
  28616. CHV_BUFLEFTENA1_DISABLE
  28617. CHV_BUFLEFTENA1_FORCE
  28618. CHV_BUFLEFTENA1_MASK
  28619. CHV_BUFLEFTENA1_NORMAL
  28620. CHV_BUFLEFTENA2_DISABLE
  28621. CHV_BUFLEFTENA2_FORCE
  28622. CHV_BUFLEFTENA2_MASK
  28623. CHV_BUFLEFTENA2_NORMAL
  28624. CHV_BUFRIGHTENA1_DISABLE
  28625. CHV_BUFRIGHTENA1_FORCE
  28626. CHV_BUFRIGHTENA1_MASK
  28627. CHV_BUFRIGHTENA1_NORMAL
  28628. CHV_BUFRIGHTENA2_DISABLE
  28629. CHV_BUFRIGHTENA2_FORCE
  28630. CHV_BUFRIGHTENA2_MASK
  28631. CHV_BUFRIGHTENA2_NORMAL
  28632. CHV_CANVAS
  28633. CHV_CLK_CTL1
  28634. CHV_CMN_DW13
  28635. CHV_CMN_DW14
  28636. CHV_CMN_DW19
  28637. CHV_CMN_DW28
  28638. CHV_CMN_DW30
  28639. CHV_CMN_USEDCLKCHANNEL
  28640. CHV_COLORS
  28641. CHV_CURSOR_C_OFFSET
  28642. CHV_CURSOR_OFFSETS
  28643. CHV_DEVICE_ID
  28644. CHV_DISPLAY_POWER_DOMAINS
  28645. CHV_DISP_PW_DPIO_CMN_D
  28646. CHV_DPIO_CMN_BC_POWER_DOMAINS
  28647. CHV_DPIO_CMN_D_POWER_DOMAINS
  28648. CHV_DP_D
  28649. CHV_EU08_PG_ENABLE
  28650. CHV_EU19_PG_ENABLE
  28651. CHV_EU210_PG_ENABLE
  28652. CHV_EU311_PG_ENABLE
  28653. CHV_FGT_DISABLE_SS0
  28654. CHV_FGT_DISABLE_SS1
  28655. CHV_FGT_EU_DIS_SS0_R0_MASK
  28656. CHV_FGT_EU_DIS_SS0_R0_SHIFT
  28657. CHV_FGT_EU_DIS_SS0_R1_MASK
  28658. CHV_FGT_EU_DIS_SS0_R1_SHIFT
  28659. CHV_FGT_EU_DIS_SS1_R0_MASK
  28660. CHV_FGT_EU_DIS_SS1_R0_SHIFT
  28661. CHV_FGT_EU_DIS_SS1_R1_MASK
  28662. CHV_FGT_EU_DIS_SS1_R1_SHIFT
  28663. CHV_FUSE_GT
  28664. CHV_GPIO_CFGLOCK
  28665. CHV_GPIO_GPIOCFG_GPI
  28666. CHV_GPIO_GPIOCFG_GPIO
  28667. CHV_GPIO_GPIOCFG_GPO
  28668. CHV_GPIO_GPIOCFG_HIZ
  28669. CHV_GPIO_GPIOEN
  28670. CHV_GPIO_GPIOTXSTATE
  28671. CHV_GPIO_IDX_START_E
  28672. CHV_GPIO_IDX_START_N
  28673. CHV_GPIO_IDX_START_SE
  28674. CHV_GPIO_IDX_START_SW
  28675. CHV_GPIO_PAD_CFG0
  28676. CHV_GPIO_PAD_CFG1
  28677. CHV_HDMID
  28678. CHV_HZ_8X8_MODE_IN_1X
  28679. CHV_INTMASK
  28680. CHV_INTSTAT
  28681. CHV_IOSF_PORT_GPIO_E
  28682. CHV_IOSF_PORT_GPIO_N
  28683. CHV_IOSF_PORT_GPIO_SE
  28684. CHV_IOSF_PORT_GPIO_SW
  28685. CHV_PADCTRL0
  28686. CHV_PADCTRL0_GPIOCFG_GPI
  28687. CHV_PADCTRL0_GPIOCFG_GPIO
  28688. CHV_PADCTRL0_GPIOCFG_GPO
  28689. CHV_PADCTRL0_GPIOCFG_HIZ
  28690. CHV_PADCTRL0_GPIOCFG_MASK
  28691. CHV_PADCTRL0_GPIOCFG_SHIFT
  28692. CHV_PADCTRL0_GPIOEN
  28693. CHV_PADCTRL0_GPIORXSTATE
  28694. CHV_PADCTRL0_GPIOTXSTATE
  28695. CHV_PADCTRL0_INTSEL_MASK
  28696. CHV_PADCTRL0_INTSEL_SHIFT
  28697. CHV_PADCTRL0_PMODE_MASK
  28698. CHV_PADCTRL0_PMODE_SHIFT
  28699. CHV_PADCTRL0_TERM_1K
  28700. CHV_PADCTRL0_TERM_20K
  28701. CHV_PADCTRL0_TERM_5K
  28702. CHV_PADCTRL0_TERM_MASK
  28703. CHV_PADCTRL0_TERM_SHIFT
  28704. CHV_PADCTRL0_TERM_UP
  28705. CHV_PADCTRL1
  28706. CHV_PADCTRL1_CFGLOCK
  28707. CHV_PADCTRL1_INTWAKECFG_BOTH
  28708. CHV_PADCTRL1_INTWAKECFG_FALLING
  28709. CHV_PADCTRL1_INTWAKECFG_LEVEL
  28710. CHV_PADCTRL1_INTWAKECFG_MASK
  28711. CHV_PADCTRL1_INTWAKECFG_RISING
  28712. CHV_PADCTRL1_INVRXTX_MASK
  28713. CHV_PADCTRL1_INVRXTX_RXDATA
  28714. CHV_PADCTRL1_INVRXTX_SHIFT
  28715. CHV_PADCTRL1_INVRXTX_TXENABLE
  28716. CHV_PADCTRL1_ODEN
  28717. CHV_PCS_DW10
  28718. CHV_PCS_REQ_SOFTRESET_EN
  28719. CHV_PCS_USEDCLKCHANNEL
  28720. CHV_PCS_USEDCLKCHANNEL_OVRRIDE
  28721. CHV_PIPE_C_OFFSET
  28722. CHV_PIPE_OFFSETS
  28723. CHV_PLL_DW0
  28724. CHV_PLL_DW1
  28725. CHV_PLL_DW2
  28726. CHV_PLL_DW3
  28727. CHV_PLL_DW6
  28728. CHV_PLL_DW8
  28729. CHV_PLL_DW9
  28730. CHV_POWER_SS0_SIG1
  28731. CHV_POWER_SS0_SIG2
  28732. CHV_POWER_SS1_SIG1
  28733. CHV_POWER_SS1_SIG2
  28734. CHV_PPAT_SNOOP
  28735. CHV_SS_PG_ENABLE
  28736. CHV_TRANSCODER_C_OFFSET
  28737. CHV_TX_DW0
  28738. CHV_TX_DW1
  28739. CHV_TX_DW10
  28740. CHV_TX_DW11
  28741. CHV_TX_DW14
  28742. CHV_TX_DW2
  28743. CHV_TX_DW3
  28744. CHV_TX_DW4
  28745. CHV_TX_DW5
  28746. CHV_TX_DW6
  28747. CHV_TX_DW7
  28748. CHV_TX_DW8
  28749. CHV_TX_DW9
  28750. CHV_VBT_MAX_PINS_PER_FMLY
  28751. CH_10MHZ_APART
  28752. CH_20MHZ_APART
  28753. CH_2G_GROUP
  28754. CH_30MHZ_APART
  28755. CH_3C450
  28756. CH_3C555
  28757. CH_3C556
  28758. CH_3C556B
  28759. CH_3C575
  28760. CH_3C575_1
  28761. CH_3C590
  28762. CH_3C592
  28763. CH_3C595_1
  28764. CH_3C595_2
  28765. CH_3C595_3
  28766. CH_3C597
  28767. CH_3C900B_FL
  28768. CH_3C900_1
  28769. CH_3C900_2
  28770. CH_3C900_3
  28771. CH_3C900_4
  28772. CH_3C900_5
  28773. CH_3C905B_1
  28774. CH_3C905B_2
  28775. CH_3C905B_FX
  28776. CH_3C905B_TX
  28777. CH_3C905C
  28778. CH_3C905_1
  28779. CH_3C905_2
  28780. CH_3C920
  28781. CH_3C9202
  28782. CH_3C980
  28783. CH_3C9805
  28784. CH_3C982A
  28785. CH_3C982B
  28786. CH_3CCFE575
  28787. CH_3CCFE575CT
  28788. CH_3CCFE656
  28789. CH_3CCFEM656
  28790. CH_3CCFEM656_1
  28791. CH_3CSOHO100_TX
  28792. CH_50MHZ_APART
  28793. CH_5G_GROUP
  28794. CH_5MHZ_APART
  28795. CH_6915
  28796. CH_70MHZ_APART
  28797. CH_8100
  28798. CH_8100B_8139D
  28799. CH_8101
  28800. CH_8130
  28801. CH_8139
  28802. CH_8139A
  28803. CH_8139A_G
  28804. CH_8139B
  28805. CH_8139C
  28806. CH_8139_K
  28807. CH_905BT4
  28808. CH_920B_EMB_WNM
  28809. CH_A
  28810. CH_ACTIVE
  28811. CH_ALERT
  28812. CH_ALP_GBL_OFST
  28813. CH_ALP_MODE_OFST
  28814. CH_ALP_SEL_OFST
  28815. CH_ARB_CTRL__NUM_MEM_PIPES_MASK
  28816. CH_ARB_CTRL__NUM_MEM_PIPES__SHIFT
  28817. CH_ARB_CTRL__UC_IO_WR_PATH_MASK
  28818. CH_ARB_CTRL__UC_IO_WR_PATH__SHIFT
  28819. CH_ARB_STATUS__REQ_ARB_BUSY_MASK
  28820. CH_ARB_STATUS__REQ_ARB_BUSY__SHIFT
  28821. CH_ARB_STATUS__RET_ARB_BUSY_MASK
  28822. CH_ARB_STATUS__RET_ARB_BUSY__SHIFT
  28823. CH_ASSIGN_MASK
  28824. CH_ASSIGN_NODMA
  28825. CH_AXI_ID
  28826. CH_AXI_QOS
  28827. CH_B
  28828. CH_BAUD0
  28829. CH_BLK_TFR_RESUMEREQ
  28830. CH_BLOCK_TS
  28831. CH_BRD_N110_1F
  28832. CH_BRD_N204_4CU
  28833. CH_BRD_N210_1F
  28834. CH_BRD_T110_1CU
  28835. CH_BRD_T210_1CU
  28836. CH_BRD_T210_1F
  28837. CH_BREAK_SENDING
  28838. CH_BUSY_STA
  28839. CH_BUSY_STA_SEC
  28840. CH_CD
  28841. CH_CFG
  28842. CH_CFG_H
  28843. CH_CFG_H_HS_SEL_DST_POS
  28844. CH_CFG_H_HS_SEL_SRC_POS
  28845. CH_CFG_H_PRIORITY_POS
  28846. CH_CFG_H_TT_FC_POS
  28847. CH_CFG_L
  28848. CH_CFG_L_DST_MULTBLK_TYPE_POS
  28849. CH_CFG_L_SRC_MULTBLK_TYPE_POS
  28850. CH_CLOSING
  28851. CH_CONNECTING
  28852. CH_CTL
  28853. CH_CTL_H
  28854. CH_CTL_H_ARLEN_EN
  28855. CH_CTL_H_ARLEN_POS
  28856. CH_CTL_H_AWLEN_EN
  28857. CH_CTL_H_AWLEN_POS
  28858. CH_CTL_H_LLI_LAST
  28859. CH_CTL_H_LLI_VALID
  28860. CH_CTL_L
  28861. CH_CTL_L_DST_INC_POS
  28862. CH_CTL_L_DST_MAST
  28863. CH_CTL_L_DST_MSIZE_POS
  28864. CH_CTL_L_DST_WIDTH_POS
  28865. CH_CTL_L_LAST_WRITE_EN
  28866. CH_CTL_L_SRC_INC_POS
  28867. CH_CTL_L_SRC_MAST
  28868. CH_CTL_L_SRC_MSIZE_POS
  28869. CH_CTL_L_SRC_WIDTH_POS
  28870. CH_CTRL
  28871. CH_Compex_RL2000
  28872. CH_DAR
  28873. CH_DBG
  28874. CH_DEVICE
  28875. CH_DISABLED
  28876. CH_DISCONNECTED
  28877. CH_DISCONNECTING
  28878. CH_DRAINING
  28879. CH_DRAM_BURST_CTRL__BURST_DISABLE_MASK
  28880. CH_DRAM_BURST_CTRL__BURST_DISABLE__SHIFT
  28881. CH_DRAM_BURST_CTRL__GATHER_64B_IO_BURST_DISABLE_MASK
  28882. CH_DRAM_BURST_CTRL__GATHER_64B_IO_BURST_DISABLE__SHIFT
  28883. CH_DRAM_BURST_CTRL__GATHER_64B_MEMORY_BURST_DISABLE_MASK
  28884. CH_DRAM_BURST_CTRL__GATHER_64B_MEMORY_BURST_DISABLE__SHIFT
  28885. CH_DRAM_BURST_CTRL__MAX_DRAM_BURST_MASK
  28886. CH_DRAM_BURST_CTRL__MAX_DRAM_BURST__SHIFT
  28887. CH_DRAM_BURST_MASK__DRAM_BURST_ADDR_MASK_MASK
  28888. CH_DRAM_BURST_MASK__DRAM_BURST_ADDR_MASK__SHIFT
  28889. CH_DSTAT
  28890. CH_DSTATAR
  28891. CH_DT_MAX
  28892. CH_DX_CSO_ALPHA_FMS
  28893. CH_DX_ESO_DELTA
  28894. CH_DX_FMC_RVOL_CVOL
  28895. CH_EBUF1
  28896. CH_EBUF2
  28897. CH_EN
  28898. CH_EN_OFST
  28899. CH_ERR
  28900. CH_EWA_VALID
  28901. CH_FCAR
  28902. CH_FIFO_ENABLED
  28903. CH_GRP_STEREO
  28904. CH_GVSEL_PAN_VOL_CTRL_EC
  28905. CH_H
  28906. CH_HANGUP
  28907. CH_HASH_MASK_LSB
  28908. CH_Holtek_HT80229
  28909. CH_Holtek_HT80232
  28910. CH_IDLE_STA
  28911. CH_INTCLEAR
  28912. CH_INTSIGNAL_ENA
  28913. CH_INTSTATUS
  28914. CH_INTSTATUS_ENA
  28915. CH_INT_EN
  28916. CH_IT_BIOS
  28917. CH_IT_CFG
  28918. CH_IT_EFI
  28919. CH_IT_FW
  28920. CH_IT_MAC
  28921. CH_IT_NVR
  28922. CH_KTI_ET32P2
  28923. CH_L
  28924. CH_LBA
  28925. CH_LIVE
  28926. CH_LLP
  28927. CH_LOOPBACK
  28928. CH_LOWER_SB
  28929. CH_MASK
  28930. CH_MAX
  28931. CH_MAX_2G_CHANNEL
  28932. CH_MAX_DEVS
  28933. CH_MIN_2G_CHANNEL
  28934. CH_MIN_5G_CHANNEL
  28935. CH_MODE_ADC
  28936. CH_MODE_DAC
  28937. CH_MODE_DAC_AND_ADC
  28938. CH_MODE_GPIO
  28939. CH_MODE_UNUSED
  28940. CH_MSG
  28941. CH_NX_ALPHA_FMS_FMC_RVOL_CVOL
  28942. CH_NX_DELTA_CSO
  28943. CH_NX_DELTA_ESO
  28944. CH_NetVin_NV5000SC
  28945. CH_OFFSTATE_OUT_HIGH
  28946. CH_OFFSTATE_OUT_LOW
  28947. CH_OFFSTATE_OUT_TRISTATE
  28948. CH_OFFSTATE_PULLDOWN
  28949. CH_OPENING
  28950. CH_OP_CUR_LVL_0P1
  28951. CH_OP_CUR_LVL_0P2
  28952. CH_OP_CUR_LVL_0P3
  28953. CH_OP_CUR_LVL_0P4
  28954. CH_OP_CUR_LVL_0P5
  28955. CH_OP_CUR_LVL_0P6
  28956. CH_OP_CUR_LVL_0P7
  28957. CH_OP_CUR_LVL_0P8
  28958. CH_OP_CUR_LVL_0P9
  28959. CH_OP_CUR_LVL_1P4
  28960. CH_OP_CUR_LVL_1P5
  28961. CH_OP_CUR_LVL_1P6
  28962. CH_OP_CUR_LVL_2P
  28963. CH_OVLY_SEL_MASK
  28964. CH_OVLY_SEL_OFST
  28965. CH_OVLY_SEL_VAL
  28966. CH_PCI_DEVICE_ID_FUNCTION
  28967. CH_PCI_DEVICE_ID_FUNCTION2
  28968. CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
  28969. CH_PCI_DEVICE_ID_TABLE_DEFINE_END
  28970. CH_PCI_ID_TABLE_ENTRY
  28971. CH_PCI_ID_TABLE_FENTRY
  28972. CH_PIPE_STEER__PIPE0_MASK
  28973. CH_PIPE_STEER__PIPE0__SHIFT
  28974. CH_PIPE_STEER__PIPE10_MASK
  28975. CH_PIPE_STEER__PIPE10__SHIFT
  28976. CH_PIPE_STEER__PIPE11_MASK
  28977. CH_PIPE_STEER__PIPE11__SHIFT
  28978. CH_PIPE_STEER__PIPE12_MASK
  28979. CH_PIPE_STEER__PIPE12__SHIFT
  28980. CH_PIPE_STEER__PIPE13_MASK
  28981. CH_PIPE_STEER__PIPE13__SHIFT
  28982. CH_PIPE_STEER__PIPE14_MASK
  28983. CH_PIPE_STEER__PIPE14__SHIFT
  28984. CH_PIPE_STEER__PIPE15_MASK
  28985. CH_PIPE_STEER__PIPE15__SHIFT
  28986. CH_PIPE_STEER__PIPE1_MASK
  28987. CH_PIPE_STEER__PIPE1__SHIFT
  28988. CH_PIPE_STEER__PIPE2_MASK
  28989. CH_PIPE_STEER__PIPE2__SHIFT
  28990. CH_PIPE_STEER__PIPE3_MASK
  28991. CH_PIPE_STEER__PIPE3__SHIFT
  28992. CH_PIPE_STEER__PIPE4_MASK
  28993. CH_PIPE_STEER__PIPE4__SHIFT
  28994. CH_PIPE_STEER__PIPE5_MASK
  28995. CH_PIPE_STEER__PIPE5__SHIFT
  28996. CH_PIPE_STEER__PIPE6_MASK
  28997. CH_PIPE_STEER__PIPE6__SHIFT
  28998. CH_PIPE_STEER__PIPE7_MASK
  28999. CH_PIPE_STEER__PIPE7__SHIFT
  29000. CH_PIPE_STEER__PIPE8_MASK
  29001. CH_PIPE_STEER__PIPE8__SHIFT
  29002. CH_PIPE_STEER__PIPE9_MASK
  29003. CH_PIPE_STEER__PIPE9__SHIFT
  29004. CH_PRI
  29005. CH_PRON
  29006. CH_PWR_CTRL1
  29007. CH_PWR_CTRL2
  29008. CH_R
  29009. CH_RAID
  29010. CH_RECEIVER_OFF
  29011. CH_RINGS_SIZE
  29012. CH_RPT
  29013. CH_RX
  29014. CH_RealTek_RTL_8029
  29015. CH_SAR
  29016. CH_SCSI
  29017. CH_SEL_OFST
  29018. CH_SIZE_ERR
  29019. CH_SSTAT
  29020. CH_SSTATAR
  29021. CH_START
  29022. CH_STAT
  29023. CH_STATE_DOWN
  29024. CH_STATE_HALTED
  29025. CH_STATE_STOPPED
  29026. CH_STATE_UP
  29027. CH_STATUS
  29028. CH_STATUS_MAP_176KHZ
  29029. CH_STATUS_MAP_192KHZ
  29030. CH_STATUS_MAP_32KHZ
  29031. CH_STATUS_MAP_44KHZ
  29032. CH_STATUS_MAP_48KHZ
  29033. CH_STATUS_MAP_88KHZ
  29034. CH_STATUS_MAP_96KHZ
  29035. CH_STATUS_UPDATE_TIMEOUT
  29036. CH_STAT_FAILED
  29037. CH_STAT_INVALID
  29038. CH_STAT_PENDING
  29039. CH_STAT_RETRY
  29040. CH_STAT_SUCCESS
  29041. CH_STOP
  29042. CH_STOPI
  29043. CH_SWAP
  29044. CH_SWAP_MASK
  29045. CH_SWHSDST
  29046. CH_SWHSSRC
  29047. CH_SWITCH
  29048. CH_SWITCH_BACKGROUND_SCAN_RUNNING
  29049. CH_SWITCH_BACKGROUND_SCAN_START
  29050. CH_SWITCH_BACKGROUND_SCAN_STOP
  29051. CH_SWITCH_DFS
  29052. CH_SWITCH_MCC
  29053. CH_SWITCH_NORMAL
  29054. CH_SWITCH_SCAN
  29055. CH_SWITCH_SCAN_BYPASS_DPD
  29056. CH_SWITCH_V1
  29057. CH_SureCom_NE34
  29058. CH_TIME_CFG
  29059. CH_TIME_CFG_EIFS_BUSY
  29060. CH_TIME_CFG_NAV_BUSY
  29061. CH_TIME_CFG_RX_BUSY
  29062. CH_TIME_CFG_TMR_EN
  29063. CH_TIME_CFG_TX_BUSY
  29064. CH_TX
  29065. CH_TX_FIFO_EMPTY
  29066. CH_TX_FIFO_LWM
  29067. CH_TYPES
  29068. CH_UNDER_ALP_SEL_OFST
  29069. CH_UPPER_SB
  29070. CH_VC5_ENABLE__UTCL2_VC5_ENABLE_MASK
  29071. CH_VC5_ENABLE__UTCL2_VC5_ENABLE__SHIFT
  29072. CH_VOL_LVL_3P5
  29073. CH_VOL_LVL_4P0
  29074. CH_VOL_LVL_4P05
  29075. CH_VOL_LVL_4P1
  29076. CH_VOL_LVL_4P15
  29077. CH_VOL_LVL_4P2
  29078. CH_VOL_LVL_4P6
  29079. CH_Via_86C926
  29080. CH_WARN
  29081. CH_Winbond_89C940
  29082. CH_Winbond_89C940_8c4a
  29083. CH_Winbond_W89C940F
  29084. CH_X
  29085. CH_XID0_INPROGRESS
  29086. CH_XID0_PENDING
  29087. CH_XID7_PENDING
  29088. CH_XID7_PENDING1
  29089. CH_XID7_PENDING2
  29090. CH_XID7_PENDING3
  29091. CH_XID7_PENDING4
  29092. CH_Y
  29093. CI
  29094. CI104J_ASIC_ID
  29095. CI132_ASIC_ID
  29096. CI134_ASIC_ID
  29097. CI2CA_POL
  29098. CI2CA_WKUP
  29099. CIA
  29100. CIAA_PHYSADDR
  29101. CIABR_PRIV
  29102. CIABR_PRIV_HYPER
  29103. CIABR_PRIV_SUPER
  29104. CIABR_PRIV_USER
  29105. CIAB_PHYSADDR
  29106. CIA_BROKEN_TBIA_BASE
  29107. CIA_BROKEN_TBIA_SIZE
  29108. CIA_BW_CFG_0
  29109. CIA_BW_CFG_1
  29110. CIA_BW_IO
  29111. CIA_BW_MEM
  29112. CIA_CACK_EN_BC_VICTIM_EN
  29113. CIA_CACK_EN_LOCK_EN
  29114. CIA_CACK_EN_MB_EN
  29115. CIA_CACK_EN_SET_DIRTY_EN
  29116. CIA_CCL_MASK
  29117. CIA_CCL_SHIFT
  29118. CIA_CID_MASK
  29119. CIA_CID_SHIFT
  29120. CIA_CNFG_IOA_BWEN
  29121. CIA_CNFG_PCI_DWEN
  29122. CIA_CNFG_PCI_MWEN
  29123. CIA_CNFG_PCI_WLEN
  29124. CIA_CONF
  29125. CIA_CTRL_ADDR_PE_EN
  29126. CIA_CTRL_ARB_CPU_EN
  29127. CIA_CTRL_ASSERT_IDLE_BC
  29128. CIA_CTRL_COM_IDLE_BC
  29129. CIA_CTRL_CPU_FLUSHREQ_EN
  29130. CIA_CTRL_CSR_IOA_BYPASS
  29131. CIA_CTRL_ECC_CHK_EN
  29132. CIA_CTRL_EN_ARB_LINK
  29133. CIA_CTRL_EN_DMA_RD_PERF
  29134. CIA_CTRL_FILL_ERR_EN
  29135. CIA_CTRL_FST_BB_EN
  29136. CIA_CTRL_IO_FLUSHREQ_EN
  29137. CIA_CTRL_MCHK_ERR_EN
  29138. CIA_CTRL_PCI_ACK64_EN
  29139. CIA_CTRL_PCI_EN
  29140. CIA_CTRL_PCI_LOCK_EN
  29141. CIA_CTRL_PCI_LOOP_EN
  29142. CIA_CTRL_PCI_MEM_EN
  29143. CIA_CTRL_PCI_MST_EN
  29144. CIA_CTRL_PCI_REQ64_EN
  29145. CIA_CTRL_PERR_EN
  29146. CIA_CTRL_RD_TYPE_SHIFT
  29147. CIA_CTRL_RL_TYPE_SHIFT
  29148. CIA_CTRL_RM_TYPE_SHIFT
  29149. CIA_DEFAULT_MEM_BASE
  29150. CIA_DENSE_MEM
  29151. CIA_ERR_COR_ERR
  29152. CIA_ERR_CPU_PE
  29153. CIA_ERR_FROM_WRT_ERR
  29154. CIA_ERR_IOA_TIMEOUT
  29155. CIA_ERR_LOST_CORR_ERR
  29156. CIA_ERR_LOST_CPU_PE
  29157. CIA_ERR_LOST_FROM_WRT_ERR
  29158. CIA_ERR_LOST_IOA_TIMEOUT
  29159. CIA_ERR_LOST_MEM_NEM
  29160. CIA_ERR_LOST_PA_PTE_INV
  29161. CIA_ERR_LOST_PCI_ADDR_PE
  29162. CIA_ERR_LOST_PERR
  29163. CIA_ERR_LOST_RCVD_MAS_ABT
  29164. CIA_ERR_LOST_RCVD_TAR_ABT
  29165. CIA_ERR_LOST_UN_CORR_ERR
  29166. CIA_ERR_MEM_NEM
  29167. CIA_ERR_PA_PTE_INV
  29168. CIA_ERR_PCI_ADDR_PE
  29169. CIA_ERR_PCI_SERR
  29170. CIA_ERR_PERR
  29171. CIA_ERR_RCVD_MAS_ABT
  29172. CIA_ERR_RCVD_TAR_ABT
  29173. CIA_ERR_UN_COR_ERR
  29174. CIA_ERR_VALID
  29175. CIA_HAE_ADDRESS
  29176. CIA_IACK_SC
  29177. CIA_ICR_ALL
  29178. CIA_ICR_ALRM
  29179. CIA_ICR_FLG
  29180. CIA_ICR_SETCLR
  29181. CIA_ICR_SP
  29182. CIA_ICR_TA
  29183. CIA_ICR_TB
  29184. CIA_IO
  29185. CIA_IOC_CACK_EN
  29186. CIA_IOC_CFG
  29187. CIA_IOC_CIA_CNFG
  29188. CIA_IOC_CIA_CTRL
  29189. CIA_IOC_CIA_DIAG
  29190. CIA_IOC_CIA_ERR
  29191. CIA_IOC_CIA_REV
  29192. CIA_IOC_CIA_STAT
  29193. CIA_IOC_CIA_SYN
  29194. CIA_IOC_CPU_ERR0
  29195. CIA_IOC_CPU_ERR1
  29196. CIA_IOC_DIAG_CHECK
  29197. CIA_IOC_ERR_MASK
  29198. CIA_IOC_FLASH_CTRL
  29199. CIA_IOC_HAE_IO
  29200. CIA_IOC_HAE_MEM
  29201. CIA_IOC_MBA0
  29202. CIA_IOC_MBA2
  29203. CIA_IOC_MBA4
  29204. CIA_IOC_MBA6
  29205. CIA_IOC_MBA8
  29206. CIA_IOC_MBAA
  29207. CIA_IOC_MBAC
  29208. CIA_IOC_MBAE
  29209. CIA_IOC_MCR
  29210. CIA_IOC_MEM_ERR0
  29211. CIA_IOC_MEM_ERR1
  29212. CIA_IOC_PCI_ERR0
  29213. CIA_IOC_PCI_ERR1
  29214. CIA_IOC_PCI_ERR3
  29215. CIA_IOC_PCI_LAT
  29216. CIA_IOC_PCI_T0_BASE
  29217. CIA_IOC_PCI_T1_BASE
  29218. CIA_IOC_PCI_T2_BASE
  29219. CIA_IOC_PCI_T3_BASE
  29220. CIA_IOC_PCI_TBIA
  29221. CIA_IOC_PCI_Tn_BASE
  29222. CIA_IOC_PCI_W0_BASE
  29223. CIA_IOC_PCI_W0_MASK
  29224. CIA_IOC_PCI_W1_BASE
  29225. CIA_IOC_PCI_W1_MASK
  29226. CIA_IOC_PCI_W2_BASE
  29227. CIA_IOC_PCI_W2_MASK
  29228. CIA_IOC_PCI_W3_BASE
  29229. CIA_IOC_PCI_W3_MASK
  29230. CIA_IOC_PCI_W_DAC
  29231. CIA_IOC_PCI_Wn_BASE
  29232. CIA_IOC_PCI_Wn_MASK
  29233. CIA_IOC_PERF_CONTROL
  29234. CIA_IOC_PERF_MONITOR
  29235. CIA_IOC_TB_TAGn
  29236. CIA_IOC_TBn_PAGEm
  29237. CIA_IOC_TMG0
  29238. CIA_IOC_TMG1
  29239. CIA_IOC_TMG2
  29240. CIA_IRQS
  29241. CIA_MEM_R1_MASK
  29242. CIA_MEM_R2_MASK
  29243. CIA_MEM_R3_MASK
  29244. CIA_MFG_MASK
  29245. CIA_MFG_SHIFT
  29246. CIA_ONE_HAE_WINDOW
  29247. CIA_REV_MASK
  29248. CIA_SPARSE_MEM
  29249. CIA_SPARSE_MEM_R2
  29250. CIA_SPARSE_MEM_R3
  29251. CIBAUD
  29252. CIBR0
  29253. CIBR1
  29254. CIBR2
  29255. CIB_NMP_MASK
  29256. CIB_NMP_SHIFT
  29257. CIB_NMW_MASK
  29258. CIB_NMW_SHIFT
  29259. CIB_NSP_MASK
  29260. CIB_NSP_SHIFT
  29261. CIB_NSW_MASK
  29262. CIB_NSW_SHIFT
  29263. CIB_REV_MASK
  29264. CIB_REV_SHIFT
  29265. CICNR_WCC1T_SHIFT
  29266. CICNR_XCC1T_SHIFT
  29267. CICNR_YCC1T_SHIFT
  29268. CICNR_ZCC1T_SHIFT
  29269. CICONTROL_CAMDETECT
  29270. CICONTROL_ENABLETS
  29271. CICONTROL_RESET
  29272. CICR
  29273. CICR0
  29274. CICR0_CDM
  29275. CICR0_DIS
  29276. CICR0_DMAEN
  29277. CICR0_ENB
  29278. CICR0_EOFM
  29279. CICR0_EOLM
  29280. CICR0_FEM
  29281. CICR0_FOM
  29282. CICR0_IRQ_MASK
  29283. CICR0_PAR_EN
  29284. CICR0_PERRM
  29285. CICR0_QDM
  29286. CICR0_RDAVM
  29287. CICR0_SIM
  29288. CICR0_SIM_EP
  29289. CICR0_SIM_ES
  29290. CICR0_SIM_MP
  29291. CICR0_SIM_MS
  29292. CICR0_SIM_SP
  29293. CICR0_SL_CAP_EN
  29294. CICR0_SOFM
  29295. CICR0_TOM
  29296. CICR1
  29297. CICR1_COLOR_SP
  29298. CICR1_COLOR_SP_VAL
  29299. CICR1_DW
  29300. CICR1_DW_VAL
  29301. CICR1_PPL
  29302. CICR1_PPL_VAL
  29303. CICR1_RAW_BPP
  29304. CICR1_RGBT_CONV
  29305. CICR1_RGBT_CONV_VAL
  29306. CICR1_RGB_BPP
  29307. CICR1_RGB_BPP_VAL
  29308. CICR1_RGB_CONV
  29309. CICR1_RGB_F
  29310. CICR1_TBIT
  29311. CICR1_YCBCR_F
  29312. CICR2
  29313. CICR2_BFPW
  29314. CICR2_BFPW_VAL
  29315. CICR2_BLW
  29316. CICR2_BLW_VAL
  29317. CICR2_ELW
  29318. CICR2_ELW_VAL
  29319. CICR2_FSW
  29320. CICR2_FSW_VAL
  29321. CICR2_HSW
  29322. CICR2_HSW_VAL
  29323. CICR3
  29324. CICR3_BFPW
  29325. CICR3_BFW
  29326. CICR3_BFW_VAL
  29327. CICR3_EFW
  29328. CICR3_EFW_VAL
  29329. CICR3_LPF
  29330. CICR3_LPF_VAL
  29331. CICR3_VSW
  29332. CICR3_VSW_VAL
  29333. CICR4
  29334. CICR4_DIV
  29335. CICR4_FR_RATE
  29336. CICR4_HSP
  29337. CICR4_MCLK_DLY
  29338. CICR4_MCLK_EN
  29339. CICR4_PCLK_EN
  29340. CICR4_PCP
  29341. CICR4_VSP
  29342. CICR_BLOCK_IE
  29343. CICR_DRAIN_IE
  29344. CICR_DROP_IE
  29345. CICR_FRAME_IE
  29346. CICR_GRTA
  29347. CICR_GRTB
  29348. CICR_GWCC
  29349. CICR_GXCC
  29350. CICR_GYCC
  29351. CICR_GZCC
  29352. CICR_HALF_IE
  29353. CICR_HPIT_MASK
  29354. CICR_HPIT_SHIFT
  29355. CICR_HP_MASK
  29356. CICR_HP_SHIFT
  29357. CICR_IEN
  29358. CICR_IRL_MASK
  29359. CICR_LAST_IE
  29360. CICR_MISALIGNED_ERR_IE
  29361. CICR_PKT_IE
  29362. CICR_SCA_SCC1
  29363. CICR_SCB_SCC2
  29364. CICR_SCC_SCC3
  29365. CICR_SCD_SCC4
  29366. CICR_SPS
  29367. CICR_SUPERVISOR_ERR_IE
  29368. CICR_SUPER_BLOCK_IE
  29369. CICR_TOUT_IE
  29370. CICR_TRANS_ERR_IE
  29371. CICTRL_BURST_MASK
  29372. CICTRL_CBURST1
  29373. CICTRL_CBURST2
  29374. CICTRL_LASTIRQ_ENABLE
  29375. CICTRL_ORDER422_MASK
  29376. CICTRL_RGBBURST1
  29377. CICTRL_RGBBURST2
  29378. CICTRL_YBURST1
  29379. CICTRL_YBURST2
  29380. CIC_EXT_CFG_REG
  29381. CIC_EXT_IS_ACTIVE_FALLING
  29382. CIC_EXT_IS_ACTIVE_HI
  29383. CIC_EXT_IS_ACTIVE_LO
  29384. CIC_EXT_IS_ACTIVE_RISING
  29385. CIC_EXT_IS_TRIGGER_EDGE
  29386. CIC_EXT_IS_TRIGGER_LEVEL
  29387. CIC_EXT_SET_ACTIVE_FALLING
  29388. CIC_EXT_SET_ACTIVE_HI
  29389. CIC_EXT_SET_ACTIVE_LO
  29390. CIC_EXT_SET_ACTIVE_RISING
  29391. CIC_EXT_SET_TRIGGER_EDGE
  29392. CIC_EXT_SET_TRIGGER_LEVEL
  29393. CIC_PCIFLSH_REG
  29394. CIC_PCIMSI_MSK_REG
  29395. CIC_PCIMSI_STS_REG
  29396. CIC_STS_REG
  29397. CIC_TC0_MSK_REG
  29398. CIC_TC1_MSK_REG
  29399. CIC_TC2_MSK_REG
  29400. CIC_TC3_MSK_REG
  29401. CIC_TC4_MSK_REG
  29402. CIC_VPE0_MSK_REG
  29403. CIC_VPE0_SWINT_REG
  29404. CIC_VPE1_MSK_REG
  29405. CID
  29406. CIDER_ID
  29407. CIDER_REV_GET
  29408. CIDER_REV_MASK
  29409. CIDER_REV_SHIFT
  29410. CIDR_POS
  29411. CIDXFLUSHTHRESH_128_X
  29412. CIDXFLUSHTHRESH_32_X
  29413. CIDXINC_M
  29414. CIDXINC_S
  29415. CIDXINC_V
  29416. CIDXTID_CID_LEN
  29417. CIDXTID_CID_MSK
  29418. CIDXTID_CID_POS
  29419. CIDXTID_EXTENDED_CID_TID
  29420. CIDXTID_TID_LEN
  29421. CIDXTID_TID_MSK
  29422. CIDXTID_TID_POS
  29423. CID_BITS
  29424. CID_BROADCAST
  29425. CID_CC_MASK
  29426. CID_CC_SHIFT
  29427. CID_COS_TO_TX_ONLY_CID
  29428. CID_ID_MASK
  29429. CID_MANFID_ANY
  29430. CID_MANFID_APACER
  29431. CID_MANFID_ATP
  29432. CID_MANFID_HYNIX
  29433. CID_MANFID_KINGSTON
  29434. CID_MANFID_MICRON
  29435. CID_MANFID_NUMONYX
  29436. CID_MANFID_SAMSUNG
  29437. CID_MANFID_SANDISK
  29438. CID_MANFID_TOSHIBA
  29439. CID_NAME_ANY
  29440. CID_OEMID_ANY
  29441. CID_PKG_MASK
  29442. CID_PKG_SHIFT
  29443. CID_REV_MASK
  29444. CID_REV_SHIFT
  29445. CID_TO_FP
  29446. CID_TYPE_MASK
  29447. CID_TYPE_SHIFT
  29448. CID_UNUSED
  29449. CIE
  29450. CIE_BIT
  29451. CIE_CL0M
  29452. CIE_CRIE
  29453. CIE_CTIE
  29454. CIE_EN
  29455. CIE_ID
  29456. CIE_RFFL
  29457. CIE_RFWL
  29458. CIE_RQFM
  29459. CIF
  29460. CIFR
  29461. CIFR_FEN0
  29462. CIFR_FEN1
  29463. CIFR_FEN2
  29464. CIFR_FLVL0
  29465. CIFR_FLVL1
  29466. CIFR_FLVL2
  29467. CIFR_RESET_F
  29468. CIFR_THL_0
  29469. CIFSCREDS_DESC_SIZE
  29470. CIFSCreateHardLink
  29471. CIFSFindClose
  29472. CIFSFindFirst
  29473. CIFSFindNext
  29474. CIFSGetDFSRefer
  29475. CIFSGetExtAttr
  29476. CIFSGetSrvInodeNumber
  29477. CIFSPOSIXCreate
  29478. CIFSPOSIXDelFile
  29479. CIFSSEC_AUTH_MASK
  29480. CIFSSEC_DEF
  29481. CIFSSEC_MASK
  29482. CIFSSEC_MAX
  29483. CIFSSEC_MAY_KRB5
  29484. CIFSSEC_MAY_LANMAN
  29485. CIFSSEC_MAY_NTLM
  29486. CIFSSEC_MAY_NTLMSSP
  29487. CIFSSEC_MAY_NTLMV2
  29488. CIFSSEC_MAY_PLNTXT
  29489. CIFSSEC_MAY_SEAL
  29490. CIFSSEC_MAY_SIGN
  29491. CIFSSEC_MUST_KRB5
  29492. CIFSSEC_MUST_LANMAN
  29493. CIFSSEC_MUST_NTLM
  29494. CIFSSEC_MUST_NTLMSSP
  29495. CIFSSEC_MUST_NTLMV2
  29496. CIFSSEC_MUST_PLNTXT
  29497. CIFSSEC_MUST_SEAL
  29498. CIFSSEC_MUST_SIGN
  29499. CIFSSMBClose
  29500. CIFSSMBCopy
  29501. CIFSSMBDelFile
  29502. CIFSSMBEcho
  29503. CIFSSMBFlush
  29504. CIFSSMBGetCIFSACL
  29505. CIFSSMBGetPosixACL
  29506. CIFSSMBLock
  29507. CIFSSMBLogoff
  29508. CIFSSMBMkDir
  29509. CIFSSMBNegotiate
  29510. CIFSSMBPosixLock
  29511. CIFSSMBQAllEAs
  29512. CIFSSMBQFSAttributeInfo
  29513. CIFSSMBQFSDeviceInfo
  29514. CIFSSMBQFSInfo
  29515. CIFSSMBQFSPosixInfo
  29516. CIFSSMBQFSUnixInfo
  29517. CIFSSMBQFileInfo
  29518. CIFSSMBQPathInfo
  29519. CIFSSMBQuerySymLink
  29520. CIFSSMBRead
  29521. CIFSSMBRename
  29522. CIFSSMBRenameOpenFile
  29523. CIFSSMBRmDir
  29524. CIFSSMBSetAttrLegacy
  29525. CIFSSMBSetCIFSACL
  29526. CIFSSMBSetEA
  29527. CIFSSMBSetEOF
  29528. CIFSSMBSetFSUnixInfo
  29529. CIFSSMBSetFileDisposition
  29530. CIFSSMBSetFileInfo
  29531. CIFSSMBSetFileSize
  29532. CIFSSMBSetPathInfo
  29533. CIFSSMBSetPosixACL
  29534. CIFSSMBTDis
  29535. CIFSSMBUnixQFileInfo
  29536. CIFSSMBUnixQPathInfo
  29537. CIFSSMBUnixQuerySymLink
  29538. CIFSSMBUnixSetFileInfo
  29539. CIFSSMBUnixSetPathInfo
  29540. CIFSSMBWrite
  29541. CIFSSMBWrite2
  29542. CIFSSMB_set_compression
  29543. CIFSTCon
  29544. CIFSUnixCreateHardLink
  29545. CIFSUnixCreateSymLink
  29546. CIFS_ACL_DACL
  29547. CIFS_ACL_GROUP
  29548. CIFS_ACL_OWNER
  29549. CIFS_ACL_SACL
  29550. CIFS_ACL_VERSION
  29551. CIFS_AIO_KMALLOC_LIMIT
  29552. CIFS_ALIAS_TYPE_FILE
  29553. CIFS_AUTH_RESP_SIZE
  29554. CIFS_BLOCKING_OP
  29555. CIFS_CACHE_HANDLE
  29556. CIFS_CACHE_HANDLE_FLG
  29557. CIFS_CACHE_READ
  29558. CIFS_CACHE_READ_FLG
  29559. CIFS_CACHE_RHW_FLG
  29560. CIFS_CACHE_RH_FLG
  29561. CIFS_CACHE_RW_FLG
  29562. CIFS_CACHE_WRITE
  29563. CIFS_CACHE_WRITE_FLG
  29564. CIFS_CLIENT_CHALLENGE_SIZE
  29565. CIFS_COPY_OP
  29566. CIFS_CPHTXT_SIZE
  29567. CIFS_CREATE_ACTION
  29568. CIFS_CRYPTO_KEY_SIZE
  29569. CIFS_DEFAULT_IOSIZE
  29570. CIFS_DEFAULT_NON_POSIX_RSIZE
  29571. CIFS_DEFAULT_NON_POSIX_WSIZE
  29572. CIFS_DEF_ACTIMEO
  29573. CIFS_DFT_PID
  29574. CIFS_DIR_SEP
  29575. CIFS_DUMP_KEY
  29576. CIFS_ECHO_OP
  29577. CIFS_ENCPWD_SIZE
  29578. CIFS_ENUMERATE_SNAPSHOTS
  29579. CIFS_FATTR_DELETE_PENDING
  29580. CIFS_FATTR_DFS_REFERRAL
  29581. CIFS_FATTR_FAKE_ROOT_INO
  29582. CIFS_FATTR_INO_COLLISION
  29583. CIFS_FATTR_NEED_REVAL
  29584. CIFS_FATTR_UNKNOWN_NLINK
  29585. CIFS_FILE_SB
  29586. CIFS_HAS_CREDITS
  29587. CIFS_HMAC_MD5_HASH_SIZE
  29588. CIFS_I
  29589. CIFS_INFO
  29590. CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2
  29591. CIFS_INODE_PENDING_OPLOCK_BREAK
  29592. CIFS_INODE_PENDING_WRITERS
  29593. CIFS_INO_DELETE_PENDING
  29594. CIFS_INO_INVALID_MAPPING
  29595. CIFS_INO_LOCK
  29596. CIFS_IOCTL_MAGIC
  29597. CIFS_IOC_COPYCHUNK_FILE
  29598. CIFS_IOC_GET_MNT_INFO
  29599. CIFS_IOC_SET_INTEGRITY
  29600. CIFS_IOVEC
  29601. CIFS_IPC_RESOURCE
  29602. CIFS_IPC_UNICODE_RESOURCE
  29603. CIFS_LARGE_BUFFER
  29604. CIFS_LARGE_BUF_OP
  29605. CIFS_LOCK_OP
  29606. CIFS_LOG_ERROR
  29607. CIFS_MAGIC_NUMBER
  29608. CIFS_MAX_ACTIMEO
  29609. CIFS_MAX_DOMAINNAME_LEN
  29610. CIFS_MAX_IOV_SIZE
  29611. CIFS_MAX_MSGSIZE
  29612. CIFS_MAX_PASSWORD_LEN
  29613. CIFS_MAX_REQ
  29614. CIFS_MAX_RFC1002_RSIZE
  29615. CIFS_MAX_RFC1002_WSIZE
  29616. CIFS_MAX_RSIZE
  29617. CIFS_MAX_SHARE_LEN
  29618. CIFS_MAX_USERNAME_LEN
  29619. CIFS_MAX_WSIZE
  29620. CIFS_MF_SYMLINK_FILE_SIZE
  29621. CIFS_MF_SYMLINK_LEN_FORMAT
  29622. CIFS_MF_SYMLINK_LEN_OFFSET
  29623. CIFS_MF_SYMLINK_LINK_MAXLEN
  29624. CIFS_MF_SYMLINK_LINK_OFFSET
  29625. CIFS_MF_SYMLINK_MD5_ARGS
  29626. CIFS_MF_SYMLINK_MD5_FORMAT
  29627. CIFS_MF_SYMLINK_MD5_OFFSET
  29628. CIFS_MIN_RCV_POOL
  29629. CIFS_MOUNT_CIFS_ACL
  29630. CIFS_MOUNT_CIFS_BACKUPGID
  29631. CIFS_MOUNT_CIFS_BACKUPUID
  29632. CIFS_MOUNT_DIRECT_IO
  29633. CIFS_MOUNT_DYNPERM
  29634. CIFS_MOUNT_FSCACHE
  29635. CIFS_MOUNT_MAP_SFM_CHR
  29636. CIFS_MOUNT_MAP_SPECIAL_CHR
  29637. CIFS_MOUNT_MASK
  29638. CIFS_MOUNT_MF_SYMLINKS
  29639. CIFS_MOUNT_MODE_FROM_SID
  29640. CIFS_MOUNT_MULTIUSER
  29641. CIFS_MOUNT_NOPOSIXBRL
  29642. CIFS_MOUNT_NOSSYNC
  29643. CIFS_MOUNT_NO_BRL
  29644. CIFS_MOUNT_NO_DFS
  29645. CIFS_MOUNT_NO_HANDLE_CACHE
  29646. CIFS_MOUNT_NO_PERM
  29647. CIFS_MOUNT_NO_XATTR
  29648. CIFS_MOUNT_OVERR_GID
  29649. CIFS_MOUNT_OVERR_UID
  29650. CIFS_MOUNT_POSIXACL
  29651. CIFS_MOUNT_POSIX_PATHS
  29652. CIFS_MOUNT_RO_CACHE
  29653. CIFS_MOUNT_RWPIDFORWARD
  29654. CIFS_MOUNT_RW_CACHE
  29655. CIFS_MOUNT_SERVER_INUM
  29656. CIFS_MOUNT_SET_UID
  29657. CIFS_MOUNT_STRICT_IO
  29658. CIFS_MOUNT_UID_FROM_ACL
  29659. CIFS_MOUNT_UNX_EMUL
  29660. CIFS_MOUNT_USE_PREFIX_PATH
  29661. CIFS_MS_MASK
  29662. CIFS_NEGFLAVOR_EXTENDED
  29663. CIFS_NEGFLAVOR_LANMAN
  29664. CIFS_NEGFLAVOR_UNENCAP
  29665. CIFS_NEG_OP
  29666. CIFS_NETWORK_OPSYS
  29667. CIFS_NI_MAXHOST
  29668. CIFS_NON_BLOCKING
  29669. CIFS_NO_BUFFER
  29670. CIFS_NO_HANDLE
  29671. CIFS_NO_RSP_BUF
  29672. CIFS_NO_SRV_RSP
  29673. CIFS_NTHASH_SIZE
  29674. CIFS_NUM_PROT
  29675. CIFS_OBREAK_OP
  29676. CIFS_OPLOCK_NO_CHANGE
  29677. CIFS_OP_MASK
  29678. CIFS_PORT
  29679. CIFS_POSIX_EXTENSIONS
  29680. CIFS_POSIX_LOCK
  29681. CIFS_PROT
  29682. CIFS_QUERY_INFO
  29683. CIFS_RC
  29684. CIFS_RDLCK
  29685. CIFS_READ_OP
  29686. CIFS_RENAME_OP
  29687. CIFS_SB
  29688. CIFS_SEARCH_BACKUP_SEARCH
  29689. CIFS_SEARCH_CLOSE_ALWAYS
  29690. CIFS_SEARCH_CLOSE_AT_END
  29691. CIFS_SEARCH_CONTINUE_FROM_LAST
  29692. CIFS_SEARCH_RETURN_RESUME
  29693. CIFS_SERVER_CHALLENGE_SIZE
  29694. CIFS_SESS_KEY_SIZE
  29695. CIFS_SHARE_TYPE_FILE
  29696. CIFS_SID_BASE_SIZE
  29697. CIFS_SMALL_BUFFER
  29698. CIFS_SMALL_PATH
  29699. CIFS_SMB_RESUME_KEY_SIZE
  29700. CIFS_SPNEGO_UPCALL_VERSION
  29701. CIFS_SV_TYPE_BACKDC
  29702. CIFS_SV_TYPE_DC
  29703. CIFS_SessSetup
  29704. CIFS_TIMEOUT_MASK
  29705. CIFS_TIMER
  29706. CIFS_TRANSFORM_REQ
  29707. CIFS_UNIX_CAP_MASK
  29708. CIFS_UNIX_EXTATTR_CAP
  29709. CIFS_UNIX_FCNTL_CAP
  29710. CIFS_UNIX_LARGE_READ_CAP
  29711. CIFS_UNIX_LARGE_WRITE_CAP
  29712. CIFS_UNIX_MAJOR_VERSION
  29713. CIFS_UNIX_MINOR_VERSION
  29714. CIFS_UNIX_POSIX_ACL_CAP
  29715. CIFS_UNIX_POSIX_PATHNAMES_CAP
  29716. CIFS_UNIX_POSIX_PATH_OPS_CAP
  29717. CIFS_UNIX_PROXY_CAP
  29718. CIFS_UNIX_TRANSPORT_ENCRYPTION_CAP
  29719. CIFS_UNIX_TRANSPORT_ENCRYPTION_MANDATORY_CAP
  29720. CIFS_UNIX_XATTR_CAP
  29721. CIFS_UNLCK
  29722. CIFS_UNLEN
  29723. CIFS_VERSION
  29724. CIFS_WRITE_OP
  29725. CIFS_WRLCK
  29726. CIFS_XATTR_ATTRIB
  29727. CIFS_XATTR_CIFS_ACL
  29728. CIFS_XATTR_CREATETIME
  29729. CIFS_open
  29730. CIF_ASCE_PRIMARY
  29731. CIF_ASCE_SECONDARY
  29732. CIF_DEDICATED_CPU
  29733. CIF_ENABLED_WAIT
  29734. CIF_FPU
  29735. CIF_HEIGHT
  29736. CIF_IGNORE_IRQ
  29737. CIF_MCCK_GUEST
  29738. CIF_MCCK_PENDING
  29739. CIF_NOHZ_DELAY
  29740. CIF_SUBDEVICE_DEVICENET
  29741. CIF_SUBDEVICE_PROFIBUS
  29742. CIF_WIDTH
  29743. CIGCTRL_CAMRST
  29744. CIGCTRL_CAM_INTERLACE
  29745. CIGCTRL_FIELDMODE
  29746. CIGCTRL_HREF_MASK
  29747. CIGCTRL_INVPOLFIELD
  29748. CIGCTRL_INVPOLHREF
  29749. CIGCTRL_INVPOLPCLK
  29750. CIGCTRL_INVPOLVSYNC
  29751. CIGCTRL_IRQ_CLR
  29752. CIGCTRL_IRQ_LEVEL
  29753. CIGCTRL_IRQ_OVFEN
  29754. CIGCTRL_SWRST
  29755. CIGCTRL_TESTPATTERN_COLOR_BAR
  29756. CIGCTRL_TESTPATTERN_HOR_INC
  29757. CIGCTRL_TESTPATTERN_MASK
  29758. CIGCTRL_TESTPATTERN_NORMAL
  29759. CIGCTRL_TESTPATTERN_VER_INC
  29760. CIIMGCPT_CPT_FREN_ENABLE
  29761. CIIMGCPT_CPT_FRMOD_CNT
  29762. CIIMGCPT_CPT_FRMOD_ENABLE
  29763. CIIMGCPT_IMGCPTEN
  29764. CIIMGCPT_IMGCPTEN_SC
  29765. CIIMGEFF_FIN_ARBITRARY
  29766. CIIMGEFF_FIN_ARTFREEZE
  29767. CIIMGEFF_FIN_BYPASS
  29768. CIIMGEFF_FIN_EMBOSSING
  29769. CIIMGEFF_FIN_MASK
  29770. CIIMGEFF_FIN_NEGATIVE
  29771. CIIMGEFF_FIN_SILHOUETTE
  29772. CIIMGEFF_IE_AFTER_SC
  29773. CIIMGEFF_IE_ENABLE
  29774. CIIMGEFF_IE_ENABLE_MASK
  29775. CIIMGEFF_PAT_CB
  29776. CIIMGEFF_PAT_CBCR_MASK
  29777. CIIMGEFF_PAT_CR
  29778. CIK_ADDR_SURF_16_BANK
  29779. CIK_ADDR_SURF_2_BANK
  29780. CIK_ADDR_SURF_4_BANK
  29781. CIK_ADDR_SURF_8_BANK
  29782. CIK_ADDR_SURF_BANK_HEIGHT_1
  29783. CIK_ADDR_SURF_BANK_HEIGHT_2
  29784. CIK_ADDR_SURF_BANK_HEIGHT_4
  29785. CIK_ADDR_SURF_BANK_HEIGHT_8
  29786. CIK_ADDR_SURF_BANK_WIDTH_1
  29787. CIK_ADDR_SURF_BANK_WIDTH_2
  29788. CIK_ADDR_SURF_BANK_WIDTH_4
  29789. CIK_ADDR_SURF_BANK_WIDTH_8
  29790. CIK_ADDR_SURF_MACRO_TILE_ASPECT_1
  29791. CIK_ADDR_SURF_MACRO_TILE_ASPECT_2
  29792. CIK_ADDR_SURF_MACRO_TILE_ASPECT_4
  29793. CIK_ADDR_SURF_MACRO_TILE_ASPECT_8
  29794. CIK_ADDR_SURF_P2
  29795. CIK_ADDR_SURF_P4_16x16
  29796. CIK_ADDR_SURF_P4_16x32
  29797. CIK_ADDR_SURF_P4_32x32
  29798. CIK_ADDR_SURF_P4_8x16
  29799. CIK_ADDR_SURF_P8_16x16_8x16
  29800. CIK_ADDR_SURF_P8_16x32_16x16
  29801. CIK_ADDR_SURF_P8_16x32_8x16
  29802. CIK_ADDR_SURF_P8_32x32_16x16
  29803. CIK_ADDR_SURF_P8_32x32_16x32
  29804. CIK_ADDR_SURF_P8_32x32_8x16
  29805. CIK_ADDR_SURF_P8_32x64_32x32
  29806. CIK_ADDR_SURF_TILE_SPLIT_128B
  29807. CIK_ADDR_SURF_TILE_SPLIT_1KB
  29808. CIK_ADDR_SURF_TILE_SPLIT_256B
  29809. CIK_ADDR_SURF_TILE_SPLIT_2KB
  29810. CIK_ADDR_SURF_TILE_SPLIT_4KB
  29811. CIK_ADDR_SURF_TILE_SPLIT_512B
  29812. CIK_ADDR_SURF_TILE_SPLIT_64B
  29813. CIK_ALPHA_CONTROL
  29814. CIK_BLIT_SHADERS_H
  29815. CIK_CE_UCODE_SIZE
  29816. CIK_CURSOR_24_1
  29817. CIK_CURSOR_24_8_PRE_MULT
  29818. CIK_CURSOR_24_8_UNPRE_MULT
  29819. CIK_CURSOR_2X_MAGNIFY
  29820. CIK_CURSOR_ALPHA_BLND_ENA
  29821. CIK_CURSOR_DISABLE_MULTIPLE_UPDATE
  29822. CIK_CURSOR_EN
  29823. CIK_CURSOR_FORCE_MC_ON
  29824. CIK_CURSOR_HEIGHT
  29825. CIK_CURSOR_MODE
  29826. CIK_CURSOR_MONO
  29827. CIK_CURSOR_UPDATE_LOCK
  29828. CIK_CURSOR_UPDATE_PENDING
  29829. CIK_CURSOR_UPDATE_TAKEN
  29830. CIK_CURSOR_URGENT_1_2
  29831. CIK_CURSOR_URGENT_1_4
  29832. CIK_CURSOR_URGENT_1_8
  29833. CIK_CURSOR_URGENT_3_8
  29834. CIK_CURSOR_URGENT_ALWAYS
  29835. CIK_CURSOR_URGENT_CONTROL
  29836. CIK_CURSOR_WIDTH
  29837. CIK_CUR_COLOR1
  29838. CIK_CUR_COLOR2
  29839. CIK_CUR_CONTROL
  29840. CIK_CUR_HOT_SPOT
  29841. CIK_CUR_POSITION
  29842. CIK_CUR_SIZE
  29843. CIK_CUR_SURFACE_ADDRESS
  29844. CIK_CUR_SURFACE_ADDRESS_HIGH
  29845. CIK_CUR_SURFACE_ADDRESS_MASK
  29846. CIK_CUR_UPDATE
  29847. CIK_DC_GPIO_HPD_A
  29848. CIK_DC_GPIO_HPD_EN
  29849. CIK_DC_GPIO_HPD_MASK
  29850. CIK_DC_GPIO_HPD_Y
  29851. CIK_DEPTH_MICRO_TILING
  29852. CIK_DIDT_IND_DATA
  29853. CIK_DIDT_IND_INDEX
  29854. CIK_DISPLAY_MICRO_TILING
  29855. CIK_FLUSH_GPU_TLB_NUM_WREG
  29856. CIK_GRPH_ARRAY_1D_TILED_THIN1
  29857. CIK_GRPH_ARRAY_2D_TILED_THIN1
  29858. CIK_GRPH_ARRAY_LINEAR_ALIGNED
  29859. CIK_GRPH_ARRAY_LINEAR_GENERAL
  29860. CIK_GRPH_ARRAY_MODE
  29861. CIK_GRPH_BANK_HEIGHT
  29862. CIK_GRPH_BANK_WIDTH
  29863. CIK_GRPH_CONTROL
  29864. CIK_GRPH_DEPTH
  29865. CIK_GRPH_DEPTH_16BPP
  29866. CIK_GRPH_DEPTH_32BPP
  29867. CIK_GRPH_DEPTH_8BPP
  29868. CIK_GRPH_FORMAT
  29869. CIK_GRPH_FORMAT_32BPP_DIG
  29870. CIK_GRPH_FORMAT_8B_ARGB2101010
  29871. CIK_GRPH_FORMAT_8B_BGRA1010102
  29872. CIK_GRPH_FORMAT_AI88
  29873. CIK_GRPH_FORMAT_ARGB1555
  29874. CIK_GRPH_FORMAT_ARGB2101010
  29875. CIK_GRPH_FORMAT_ARGB4444
  29876. CIK_GRPH_FORMAT_ARGB565
  29877. CIK_GRPH_FORMAT_ARGB8888
  29878. CIK_GRPH_FORMAT_BGR101111
  29879. CIK_GRPH_FORMAT_BGRA1010102
  29880. CIK_GRPH_FORMAT_BGRA5551
  29881. CIK_GRPH_FORMAT_INDEXED
  29882. CIK_GRPH_FORMAT_MONO16
  29883. CIK_GRPH_FORMAT_RGB111110
  29884. CIK_GRPH_MACRO_TILE_ASPECT
  29885. CIK_GRPH_MICRO_TILE_MODE
  29886. CIK_GRPH_NUM_BANKS
  29887. CIK_GRPH_PIPE_CONFIG
  29888. CIK_GRPH_TILE_SPLIT
  29889. CIK_GRPH_Z
  29890. CIK_H
  29891. CIK_HPD_EOP_BYTES
  29892. CIK_HPD_EOP_BYTES_LOG2
  29893. CIK_INTERLEAVE_EN
  29894. CIK_INTSRC_CP_BAD_OPCODE
  29895. CIK_INTSRC_CP_END_OF_PIPE
  29896. CIK_INTSRC_GFX_MEM_PROT_FAULT
  29897. CIK_INTSRC_GFX_PAGE_INV_FAULT
  29898. CIK_INTSRC_SDMA_TRAP
  29899. CIK_INTSRC_SQ_INTERRUPT_MSG
  29900. CIK_INT_H_INCLUDED
  29901. CIK_LB_DATA_FORMAT
  29902. CIK_LB_DESKTOP_HEIGHT
  29903. CIK_MEC_UCODE_SIZE
  29904. CIK_ME_UCODE_SIZE
  29905. CIK_PFP_UCODE_SIZE
  29906. CIK_RB_BITMAP_WIDTH_PER_SH
  29907. CIK_REGS_H
  29908. CIK_ROTATED_MICRO_TILING
  29909. CIK_SDMA_UCODE_SIZE
  29910. CIK_SDMA_UCODE_VERSION
  29911. CIK_STRUCTS_H_
  29912. CIK_THIN_MICRO_TILING
  29913. CIK_TILE_MODE_DEPTH_STENCIL_1D
  29914. CIK_WB_CP1_WPTR_OFFSET
  29915. CIK_WB_CP2_WPTR_OFFSET
  29916. CILEN_BSD_COMPRESS
  29917. CILEN_DEFLATE
  29918. CILEN_MPPE
  29919. CILEN_PREDICTOR_1
  29920. CILEN_PREDICTOR_2
  29921. CIM
  29922. CIMAX2_H
  29923. CIMLA_SIZE
  29924. CIMQBASE_G
  29925. CIMQBASE_M
  29926. CIMQBASE_S
  29927. CIMQSIZE_G
  29928. CIMQSIZE_M
  29929. CIMQSIZE_S
  29930. CIM_BOOT_CFG_A
  29931. CIM_CTL_BASE
  29932. CIM_DEBUGCFG_A
  29933. CIM_DEBUGSTS_A
  29934. CIM_DM_PRTY_ERR_F
  29935. CIM_DM_PRTY_ERR_S
  29936. CIM_DM_PRTY_ERR_V
  29937. CIM_EXTMEM2_ADDR_SIZE_A
  29938. CIM_EXTMEM2_BASE_ADDR_A
  29939. CIM_F
  29940. CIM_FRAMING_ERROR_F
  29941. CIM_FRAMING_ERROR_S
  29942. CIM_FRAMING_ERROR_V
  29943. CIM_HOST_ACC_CTRL_A
  29944. CIM_HOST_ACC_DATA_A
  29945. CIM_HOST_INT_CAUSE_A
  29946. CIM_HOST_UPACC_INT_CAUSE_A
  29947. CIM_IBQ_DBG_CFG_A
  29948. CIM_IBQ_DBG_DATA_A
  29949. CIM_IBQ_INTR
  29950. CIM_IBQ_SIZE
  29951. CIM_INTR_MASK
  29952. CIM_MALA_SIZE
  29953. CIM_NUM_IBQ
  29954. CIM_NUM_OBQ
  29955. CIM_NUM_OBQ_T5
  29956. CIM_OBQ_DBG_CFG_A
  29957. CIM_OBQ_DBG_DATA_A
  29958. CIM_OBQ_INTR
  29959. CIM_OBQ_SIZE
  29960. CIM_OP_MAP_PERR_F
  29961. CIM_OP_MAP_PERR_S
  29962. CIM_OP_MAP_PERR_V
  29963. CIM_OVFL_ERROR_F
  29964. CIM_OVFL_ERROR_S
  29965. CIM_OVFL_ERROR_V
  29966. CIM_PF_HOST_INT_CAUSE_A
  29967. CIM_PF_HOST_INT_ENABLE_A
  29968. CIM_PF_MAILBOX_CTRL_A
  29969. CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A
  29970. CIM_PF_MAILBOX_DATA_A
  29971. CIM_PF_NOACCESS
  29972. CIM_PIFLA_SIZE
  29973. CIM_PI_LA_DEBUGDATA_A
  29974. CIM_PI_LA_MADEBUGDATA_A
  29975. CIM_PO_LA_DEBUGDATA_A
  29976. CIM_PO_LA_MADEBUGDATA_A
  29977. CIM_QUEUE_CONFIG_CTRL_A
  29978. CIM_QUEUE_CONFIG_REF_A
  29979. CIM_S
  29980. CIM_SDRAM_ADDR_SIZE_A
  29981. CIM_SDRAM_BASE_ADDR_A
  29982. CIM_V
  29983. CIM_VF_EXT_MAILBOX_CTRL
  29984. CIM_VF_EXT_MAILBOX_STATUS
  29985. CIN1
  29986. CIN1_DIFF
  29987. CIN2
  29988. CIN2_DIFF
  29989. CINERGYT2_EP1_CONTINUE_SCAN
  29990. CINERGYT2_EP1_CONTROL_STREAM_TRANSFER
  29991. CINERGYT2_EP1_GET_FIRMWARE_VERSION
  29992. CINERGYT2_EP1_GET_RC_EVENTS
  29993. CINERGYT2_EP1_GET_TUNER_STATUS
  29994. CINERGYT2_EP1_PID_SETUP
  29995. CINERGYT2_EP1_PID_TABLE_RESET
  29996. CINERGYT2_EP1_SET_TUNER_PARAMETERS
  29997. CINERGYT2_EP1_SLEEP_MODE
  29998. CINERGYT2_EP1_START_SCAN
  29999. CINERGY_C
  30000. CINERGY_S2_PCI_HD
  30001. CINFO_FMT
  30002. CINTDIS
  30003. CINTEGRATOR_FLMASK
  30004. CINTEGRATOR_FLVPPEN
  30005. CINTEGRATOR_FLWREN
  30006. CINTERION_PRODUCT_AHXX
  30007. CINTERION_PRODUCT_AHXX_2RMNET
  30008. CINTERION_PRODUCT_AHXX_AUDIO
  30009. CINTERION_PRODUCT_CLS8
  30010. CINTERION_PRODUCT_EU3_E
  30011. CINTERION_PRODUCT_EU3_P
  30012. CINTERION_PRODUCT_HC25_MDM
  30013. CINTERION_PRODUCT_HC25_MDMNET
  30014. CINTERION_PRODUCT_HC28_MDM
  30015. CINTERION_PRODUCT_HC28_MDMNET
  30016. CINTERION_PRODUCT_PH8
  30017. CINTERION_PRODUCT_PH8_2RMNET
  30018. CINTERION_PRODUCT_PH8_AUDIO
  30019. CINTERION_PRODUCT_PLXX
  30020. CINTERION_VENDOR_ID
  30021. CINTIQ
  30022. CINTIQ_COMPANION_2
  30023. CINTIQ_HYBRID
  30024. CINT_CI_STOP
  30025. CINT_DMA_PCIE
  30026. CINT_DONE
  30027. CINT_I2C
  30028. CINT_I2C_SLAVE
  30029. CINT_MEM
  30030. CINT_NON_SPEC_NCQ_ERROR
  30031. CINT_PHY_MASK
  30032. CINT_PHY_MASK_OFFSET
  30033. CINT_PORT
  30034. CINT_PORT_MASK
  30035. CINT_PORT_MASK_OFFSET
  30036. CINT_PORT_STOPPED
  30037. CINT_PRD_BC
  30038. CINT_SRS
  30039. CINT_SW0
  30040. CINT_SW1
  30041. CIO
  30042. CIO2_CDMAC0_DMA_EN
  30043. CIO2_CDMAC0_DMA_HALTED
  30044. CIO2_CDMAC0_DMA_INTR_ON_FE
  30045. CIO2_CDMAC0_DMA_INTR_ON_FS
  30046. CIO2_CDMAC0_FBPT_FIFO_FULL_FIX_DIS
  30047. CIO2_CDMAC0_FBPT_LEN_SHIFT
  30048. CIO2_CDMAC0_FBPT_NS
  30049. CIO2_CDMAC0_FBPT_UPDATE_FIFO_FULL
  30050. CIO2_CDMAC0_FBPT_WIDTH_SHIFT
  30051. CIO2_CDMAC1_LINENUMINT_SHIFT
  30052. CIO2_CDMAC1_LINENUMUPDATE_SHIFT
  30053. CIO2_CDMARI_FBPT_RP_MASK
  30054. CIO2_CDMARI_FBPT_RP_SHIFT
  30055. CIO2_CGC_CLKGATE_HOLDOFF
  30056. CIO2_CGC_CLKGATE_HOLDOFF_SHIFT
  30057. CIO2_CGC_CSI2_DCGE
  30058. CIO2_CGC_CSI2_INTERFRAME_TGE
  30059. CIO2_CGC_CSI2_PORT_DCGE
  30060. CIO2_CGC_CSI2_TGE
  30061. CIO2_CGC_CSI_CLKGATE_HOLDOFF
  30062. CIO2_CGC_CSI_CLKGATE_HOLDOFF_SHIFT
  30063. CIO2_CGC_D3I3_TGE
  30064. CIO2_CGC_FLIS_DCGE
  30065. CIO2_CGC_MPLL_SHUTDOWN_EN
  30066. CIO2_CGC_PRIM_DCGE
  30067. CIO2_CGC_PRIM_TGE
  30068. CIO2_CGC_ROSC_DCGE
  30069. CIO2_CGC_SIDE_DCGE
  30070. CIO2_CGC_SIDE_TGE
  30071. CIO2_CGC_XOSC_DCGE
  30072. CIO2_CGC_XOSC_TGE
  30073. CIO2_CSIRX_DLY_CNT_CLANE_IDX
  30074. CIO2_CSIRX_DLY_CNT_SETTLE_CLANE_A
  30075. CIO2_CSIRX_DLY_CNT_SETTLE_CLANE_B
  30076. CIO2_CSIRX_DLY_CNT_SETTLE_DEFAULT
  30077. CIO2_CSIRX_DLY_CNT_SETTLE_DLANE_A
  30078. CIO2_CSIRX_DLY_CNT_SETTLE_DLANE_B
  30079. CIO2_CSIRX_DLY_CNT_TERMEN_CLANE_A
  30080. CIO2_CSIRX_DLY_CNT_TERMEN_CLANE_B
  30081. CIO2_CSIRX_DLY_CNT_TERMEN_DEFAULT
  30082. CIO2_CSIRX_DLY_CNT_TERMEN_DLANE_A
  30083. CIO2_CSIRX_DLY_CNT_TERMEN_DLANE_B
  30084. CIO2_CSIRX_IF_CONFIG_FILTEROUT
  30085. CIO2_CSIRX_IF_CONFIG_FILTEROUT_VC_INACTIVE
  30086. CIO2_CSIRX_IF_CONFIG_FLAG_ERROR
  30087. CIO2_CSIRX_IF_CONFIG_PASS
  30088. CIO2_CSIRX_STATUS_DLANE_HS_MASK
  30089. CIO2_CSIRX_STATUS_DLANE_LP_MASK
  30090. CIO2_D0I3C_I3
  30091. CIO2_D0I3C_RR
  30092. CIO2_DEVICE_NAME
  30093. CIO2_DMA_CHAN
  30094. CIO2_DMA_MASK
  30095. CIO2_ENTITY_NAME
  30096. CIO2_FBPT_CTRL_CMPLCODE_SHIFT
  30097. CIO2_FBPT_CTRL_IOC
  30098. CIO2_FBPT_CTRL_IOS
  30099. CIO2_FBPT_CTRL_SUCCXFAIL
  30100. CIO2_FBPT_CTRL_VALID
  30101. CIO2_FBPT_SIZE
  30102. CIO2_FBPT_SUBENTRY_UNIT
  30103. CIO2_FB_HPLL_FREQ
  30104. CIO2_GPREG_SRST_ALL
  30105. CIO2_IMAGE_MAX_LENGTH
  30106. CIO2_IMAGE_MAX_WIDTH
  30107. CIO2_INT_EN_EXT_IE_MASK
  30108. CIO2_INT_EN_EXT_OE_MASK
  30109. CIO2_INT_EXT_IE_CRCERR
  30110. CIO2_INT_EXT_IE_DPHY_NR
  30111. CIO2_INT_EXT_IE_ECC_NR
  30112. CIO2_INT_EXT_IE_ECC_RE
  30113. CIO2_INT_EXT_IE_INTERFRAMEDATA
  30114. CIO2_INT_EXT_IE_IRQ
  30115. CIO2_INT_EXT_IE_PKT2LONG
  30116. CIO2_INT_EXT_IE_PKT2SHORT
  30117. CIO2_INT_EXT_OE_DMAOE_MASK
  30118. CIO2_INT_EXT_OE_DMAOE_SHIFT
  30119. CIO2_INT_EXT_OE_OES_MASK
  30120. CIO2_INT_EXT_OE_OES_SHIFT
  30121. CIO2_INT_IOC
  30122. CIO2_INT_IOC_MASK
  30123. CIO2_INT_IOC_SHIFT
  30124. CIO2_INT_IOIE
  30125. CIO2_INT_IOIRQ
  30126. CIO2_INT_IOOE
  30127. CIO2_INT_IOS_IOLN
  30128. CIO2_INT_IOS_IOLN_MASK
  30129. CIO2_INT_IOS_IOLN_SHIFT
  30130. CIO2_IRQCTRL_MASK
  30131. CIO2_ISCLK_RATIO
  30132. CIO2_LTRCTRL_LTRDYNEN
  30133. CIO2_LTRCTRL_LTRSEL1S0
  30134. CIO2_LTRCTRL_LTRSEL1S1
  30135. CIO2_LTRCTRL_LTRSEL1S2
  30136. CIO2_LTRCTRL_LTRSEL1S3
  30137. CIO2_LTRCTRL_LTRSEL2S0
  30138. CIO2_LTRCTRL_LTRSEL2S1
  30139. CIO2_LTRCTRL_LTRSEL2S2
  30140. CIO2_LTRCTRL_LTRSEL2S3
  30141. CIO2_LTRCTRL_LTRSTABLETIME_MASK
  30142. CIO2_LTRCTRL_LTRSTABLETIME_SHIFT
  30143. CIO2_LTRVAL02_SCALE_SHIFT
  30144. CIO2_LTRVAL02_VAL_SHIFT
  30145. CIO2_LTRVAL0_SCALE
  30146. CIO2_LTRVAL0_VAL
  30147. CIO2_LTRVAL13_SCALE_SHIFT
  30148. CIO2_LTRVAL13_VAL_SHIFT
  30149. CIO2_LTRVAL1_SCALE
  30150. CIO2_LTRVAL1_VAL
  30151. CIO2_LTRVAL2_SCALE
  30152. CIO2_LTRVAL2_VAL
  30153. CIO2_LTRVAL3_SCALE
  30154. CIO2_LTRVAL3_VAL
  30155. CIO2_MAX_BUFFERS
  30156. CIO2_MAX_LOPS
  30157. CIO2_MIPIBE_GLOBAL_LUT_DISREGARD
  30158. CIO2_MIPIBE_LP_LUT_ENTRY_DISREGARD
  30159. CIO2_MIPIBE_LP_LUT_ENTRY_FORMAT_TYPE_SHIFT
  30160. CIO2_MIPIBE_LP_LUT_ENTRY_SID_SHIFT
  30161. CIO2_MIPIBE_LP_LUT_ENTRY_VC_SHIFT
  30162. CIO2_NAME
  30163. CIO2_NUM_DMA_CHAN
  30164. CIO2_NUM_PORTS
  30165. CIO2_PADS
  30166. CIO2_PAD_SINK
  30167. CIO2_PAD_SOURCE
  30168. CIO2_PAGE_SIZE
  30169. CIO2_PBM_ARB_CTRL_LANES_DIV
  30170. CIO2_PBM_ARB_CTRL_LANES_DIV_SHIFT
  30171. CIO2_PBM_ARB_CTRL_LE_EN
  30172. CIO2_PBM_ARB_CTRL_PLL_AHD_WK_UP
  30173. CIO2_PBM_ARB_CTRL_PLL_AHD_WK_UP_SHIFT
  30174. CIO2_PBM_ARB_CTRL_PLL_POST_SHTDN
  30175. CIO2_PBM_ARB_CTRL_PLL_POST_SHTDN_SHIFT
  30176. CIO2_PBM_FOPN_ABORT
  30177. CIO2_PBM_FOPN_FORCE_ABORT
  30178. CIO2_PBM_FOPN_FRAMEOPEN
  30179. CIO2_PBM_WMCTRL1_MID1_2CK
  30180. CIO2_PBM_WMCTRL1_MID1_2CK_SHIFT
  30181. CIO2_PBM_WMCTRL1_MID2_2CK
  30182. CIO2_PBM_WMCTRL1_MID2_2CK_SHIFT
  30183. CIO2_PBM_WMCTRL1_MIN_2CK
  30184. CIO2_PBM_WMCTRL1_MIN_2CK_SHIFT
  30185. CIO2_PBM_WMCTRL1_TS_COUNT_DISABLE
  30186. CIO2_PBM_WMCTRL2_DRAINNOW
  30187. CIO2_PBM_WMCTRL2_DYNWMEN
  30188. CIO2_PBM_WMCTRL2_HWM_2CK
  30189. CIO2_PBM_WMCTRL2_HWM_2CK_SHIFT
  30190. CIO2_PBM_WMCTRL2_LWM_2CK
  30191. CIO2_PBM_WMCTRL2_LWM_2CK_SHIFT
  30192. CIO2_PBM_WMCTRL2_OBFFWM_2CK
  30193. CIO2_PBM_WMCTRL2_OBFFWM_2CK_SHIFT
  30194. CIO2_PBM_WMCTRL2_OBFF_CPU_EN
  30195. CIO2_PBM_WMCTRL2_OBFF_MEM_EN
  30196. CIO2_PBM_WMCTRL2_TRANSDYN
  30197. CIO2_PBM_WMCTRL2_TRANSDYN_SHIFT
  30198. CIO2_PCI_BAR
  30199. CIO2_PCI_ID
  30200. CIO2_PMCSR_D0D3_SHIFT
  30201. CIO2_PMCSR_D3
  30202. CIO2_PMCSR_OFFSET
  30203. CIO2_PXM_FRF_CFG_ABORT
  30204. CIO2_PXM_FRF_CFG_CIOHC_FRST_FRM_SHIFT
  30205. CIO2_PXM_FRF_CFG_CIOHC_FS_MODE
  30206. CIO2_PXM_FRF_CFG_CRC_TH
  30207. CIO2_PXM_FRF_CFG_CRC_TH_SHIFT
  30208. CIO2_PXM_FRF_CFG_EVEN_ODD_MODE_SHIFT
  30209. CIO2_PXM_FRF_CFG_FNSEL
  30210. CIO2_PXM_FRF_CFG_FN_RST
  30211. CIO2_PXM_FRF_CFG_MASK_CRC_THRES
  30212. CIO2_PXM_FRF_CFG_MASK_CSI_ACCEPT
  30213. CIO2_PXM_FRF_CFG_MSK_ECC_DPHY_NE
  30214. CIO2_PXM_FRF_CFG_MSK_ECC_DPHY_NR
  30215. CIO2_PXM_FRF_CFG_MSK_ECC_RE
  30216. CIO2_PXM_PXF_FMT_CFG_BPP_08
  30217. CIO2_PXM_PXF_FMT_CFG_BPP_10
  30218. CIO2_PXM_PXF_FMT_CFG_BPP_12
  30219. CIO2_PXM_PXF_FMT_CFG_BPP_14
  30220. CIO2_PXM_PXF_FMT_CFG_PCK_32B
  30221. CIO2_PXM_PXF_FMT_CFG_PCK_64B
  30222. CIO2_PXM_PXF_FMT_CFG_PSWAP4_1ST_AB
  30223. CIO2_PXM_PXF_FMT_CFG_PSWAP4_1ST_CD
  30224. CIO2_PXM_PXF_FMT_CFG_PSWAP4_2ND_AC
  30225. CIO2_PXM_PXF_FMT_CFG_PSWAP4_2ND_BD
  30226. CIO2_PXM_PXF_FMT_CFG_SID0_SHIFT
  30227. CIO2_PXM_PXF_FMT_CFG_SID1_SHIFT
  30228. CIO2_PXM_PXF_FMT_CFG_SPEC_3PPC_ARGB
  30229. CIO2_PXM_PXF_FMT_CFG_SPEC_3PPC_RGBA
  30230. CIO2_PXM_PXF_FMT_CFG_SPEC_4PPC
  30231. CIO2_PXM_PXF_FMT_CFG_SPEC_NV16
  30232. CIO2_PXM_PXF_FMT_CFG_SPEC_PLANAR2
  30233. CIO2_PXM_PXF_FMT_CFG_SPEC_PLANAR3
  30234. CIO2_QUEUES
  30235. CIO2_REG_CDMABA
  30236. CIO2_REG_CDMAC0
  30237. CIO2_REG_CDMAC1
  30238. CIO2_REG_CDMARI
  30239. CIO2_REG_CGC
  30240. CIO2_REG_CSIRX_BASE
  30241. CIO2_REG_CSIRX_DLY_CNT_SETTLE
  30242. CIO2_REG_CSIRX_DLY_CNT_TERMEN
  30243. CIO2_REG_CSIRX_ENABLE
  30244. CIO2_REG_CSIRX_LP_IF_CONFIG
  30245. CIO2_REG_CSIRX_NOF_ENABLED_LANES
  30246. CIO2_REG_CSIRX_SP_IF_CONFIG
  30247. CIO2_REG_CSIRX_STATUS
  30248. CIO2_REG_CSIRX_STATUS_DLANE_HS
  30249. CIO2_REG_CSIRX_STATUS_DLANE_LP
  30250. CIO2_REG_D0I3C
  30251. CIO2_REG_DMA_DBG
  30252. CIO2_REG_DMA_DBG_DMA_INDEX_SHIFT
  30253. CIO2_REG_FB_HPLL_FREQ
  30254. CIO2_REG_GPREG_BASE
  30255. CIO2_REG_GPREG_SRST
  30256. CIO2_REG_INT_EN
  30257. CIO2_REG_INT_EN_EXT_IE
  30258. CIO2_REG_INT_EN_EXT_OE
  30259. CIO2_REG_INT_EN_IOS
  30260. CIO2_REG_INT_EN_IRQ
  30261. CIO2_REG_INT_STS
  30262. CIO2_REG_INT_STS_EXT_IE
  30263. CIO2_REG_INT_STS_EXT_OE
  30264. CIO2_REG_IRQCTRL_BASE
  30265. CIO2_REG_IRQCTRL_CLEAR
  30266. CIO2_REG_IRQCTRL_EDGE
  30267. CIO2_REG_IRQCTRL_ENABLE
  30268. CIO2_REG_IRQCTRL_LEVEL_NOT_PULSE
  30269. CIO2_REG_IRQCTRL_MASK
  30270. CIO2_REG_IRQCTRL_STATUS
  30271. CIO2_REG_ISCLK_RATIO
  30272. CIO2_REG_LTRCTRL
  30273. CIO2_REG_LTRVAL01
  30274. CIO2_REG_LTRVAL23
  30275. CIO2_REG_MIPIBE_BASE
  30276. CIO2_REG_MIPIBE_COMP_FORMAT
  30277. CIO2_REG_MIPIBE_ENABLE
  30278. CIO2_REG_MIPIBE_FORCE_RAW8
  30279. CIO2_REG_MIPIBE_FORCE_RAW8_ENABLE
  30280. CIO2_REG_MIPIBE_FORCE_RAW8_TYPEID_SHIFT
  30281. CIO2_REG_MIPIBE_FORCE_RAW8_USE_TYPEID
  30282. CIO2_REG_MIPIBE_GLOBAL_LUT_DISREGARD
  30283. CIO2_REG_MIPIBE_IRQ_CLEAR
  30284. CIO2_REG_MIPIBE_IRQ_STATUS
  30285. CIO2_REG_MIPIBE_LP_LUT_ENTRY
  30286. CIO2_REG_MIPIBE_PARSE_GSP_THROUGH_LP_LUT_REG_IDX
  30287. CIO2_REG_MIPIBE_PKT_STALL_STATUS
  30288. CIO2_REG_MIPIBE_SP_LUT_ENTRY
  30289. CIO2_REG_MIPIBE_STATUS
  30290. CIO2_REG_PBM_ARB_CTRL
  30291. CIO2_REG_PBM_FOPN_ABORT
  30292. CIO2_REG_PBM_TS_COUNT
  30293. CIO2_REG_PBM_WMCTRL1
  30294. CIO2_REG_PBM_WMCTRL2
  30295. CIO2_REG_PIPE_BASE
  30296. CIO2_REG_PIXELGEN_BAS
  30297. CIO2_REG_PXM_FRF_CFG
  30298. CIO2_REG_PXM_PXF_FMT_CFG0
  30299. CIO2_REG_PXM_SID2BID0
  30300. CIO2_REG_SENSOR_ACTIVE
  30301. CIO2_REG_SWRESET
  30302. CIO2_SWRESET_SWRESET
  30303. CIOC_KERNEL_VERSION
  30304. CIOPERRDIS
  30305. CIO_BOXED
  30306. CIO_CRW_EVENT
  30307. CIO_DAC_CHAN
  30308. CIO_DAC_EXTENT
  30309. CIO_DAC_NUM_CHAN
  30310. CIO_DEBUG_H
  30311. CIO_DMA_GFP
  30312. CIO_ENHF
  30313. CIO_FFOV
  30314. CIO_GONE
  30315. CIO_HEX_EVENT
  30316. CIO_MSG_EVENT
  30317. CIO_NO_PATH
  30318. CIO_OPER
  30319. CIO_REVALIDATE
  30320. CIO_TRACE_EVENT
  30321. CIPCC_SHIFT_PRI0
  30322. CIPCC_SHIFT_PRI1
  30323. CIPCC_SHIFT_PRI2
  30324. CIPCC_SHIFT_PRI3
  30325. CIPCC_SHIFT_PRI4
  30326. CIPCC_SHIFT_PRI5
  30327. CIPCC_SHIFT_PRI6
  30328. CIPCC_SHIFT_PRI7
  30329. CIPH
  30330. CIPHER14_AN_0
  30331. CIPHER14_AN_1
  30332. CIPHER14_BOOTSTRAP
  30333. CIPHER14_KM_0
  30334. CIPHER14_KM_1
  30335. CIPHER14_R0_DP_STATUS
  30336. CIPHER14_RI_PJ_STATUS
  30337. CIPHER14_STATUS
  30338. CIPHER22_AUTH
  30339. CIPHER_3DES_CBC
  30340. CIPHER_3DES_ECB
  30341. CIPHER_AES
  30342. CIPHER_AES_CBC
  30343. CIPHER_AES_CBC_CTS
  30344. CIPHER_AES_CCM
  30345. CIPHER_AES_CCMP
  30346. CIPHER_AES_CFB
  30347. CIPHER_AES_CTR
  30348. CIPHER_AES_ECB
  30349. CIPHER_AES_ECB_CTS
  30350. CIPHER_AES_GCM
  30351. CIPHER_AES_XTS
  30352. CIPHER_ALG
  30353. CIPHER_ALG_3DES
  30354. CIPHER_ALG_AES
  30355. CIPHER_ALG_DES
  30356. CIPHER_ALG_LAST
  30357. CIPHER_ALG_NONE
  30358. CIPHER_ALG_RC4
  30359. CIPHER_ALG_SHIFT
  30360. CIPHER_BLOCK_SIZE
  30361. CIPHER_CKIP128
  30362. CIPHER_CKIP64
  30363. CIPHER_ID_LEN
  30364. CIPHER_ID_WPA2_CCMP
  30365. CIPHER_ID_WPA2_NONE
  30366. CIPHER_ID_WPA2_TKIP
  30367. CIPHER_ID_WPA2_WEP104
  30368. CIPHER_ID_WPA2_WEP40
  30369. CIPHER_ID_WPA_CCMP
  30370. CIPHER_ID_WPA_NONE
  30371. CIPHER_ID_WPA_TKIP
  30372. CIPHER_ID_WPA_WEP104
  30373. CIPHER_ID_WPA_WEP40
  30374. CIPHER_IE
  30375. CIPHER_INBOUND
  30376. CIPHER_INBOUND_SHIFT
  30377. CIPHER_INVALID
  30378. CIPHER_MAX
  30379. CIPHER_MODE
  30380. CIPHER_MODE_CBC
  30381. CIPHER_MODE_CCM
  30382. CIPHER_MODE_CFB
  30383. CIPHER_MODE_CTR
  30384. CIPHER_MODE_ECB
  30385. CIPHER_MODE_GCM
  30386. CIPHER_MODE_LAST
  30387. CIPHER_MODE_NONE
  30388. CIPHER_MODE_OFB
  30389. CIPHER_MODE_SHIFT
  30390. CIPHER_MODE_XTS
  30391. CIPHER_NONE
  30392. CIPHER_NULL
  30393. CIPHER_ORDER
  30394. CIPHER_ORDER_SHIFT
  30395. CIPHER_SUITE_AES
  30396. CIPHER_SUITE_CCMP
  30397. CIPHER_SUITE_CCX
  30398. CIPHER_SUITE_MAX
  30399. CIPHER_SUITE_NONE
  30400. CIPHER_SUITE_TKIP
  30401. CIPHER_SUITE_WEP_128
  30402. CIPHER_SUITE_WEP_64
  30403. CIPHER_TKIP
  30404. CIPHER_TKIP_NO_MIC
  30405. CIPHER_TRANSHDR_SIZE
  30406. CIPHER_TYPE
  30407. CIPHER_TYPE_3DES
  30408. CIPHER_TYPE_AES128
  30409. CIPHER_TYPE_AES192
  30410. CIPHER_TYPE_AES256
  30411. CIPHER_TYPE_DES
  30412. CIPHER_TYPE_INIT
  30413. CIPHER_TYPE_NONE
  30414. CIPHER_TYPE_SHIFT
  30415. CIPHER_TYPE_UPDT
  30416. CIPHER_WEP128
  30417. CIPHER_WEP64
  30418. CIPHER_WPA_EAP
  30419. CIPHER_WPA_PSK
  30420. CIPH_DECR
  30421. CIPH_ENCR
  30422. CIPRSCCTRL_RGB_FORMAT_24BIT
  30423. CIPRSCCTRL_SAMPLE
  30424. CIPRSCCTRL_SCALEUP_H
  30425. CIPRSCCTRL_SCALEUP_V
  30426. CIPRSTATUS_OVF_MASK
  30427. CIPSO_V4_CACHE_BUCKETBITS
  30428. CIPSO_V4_CACHE_BUCKETS
  30429. CIPSO_V4_CACHE_REORDERLIMIT
  30430. CIPSO_V4_DOI_UNKNOWN
  30431. CIPSO_V4_HDR_LEN
  30432. CIPSO_V4_INV_CAT
  30433. CIPSO_V4_INV_LVL
  30434. CIPSO_V4_MAP_LOCAL
  30435. CIPSO_V4_MAP_PASS
  30436. CIPSO_V4_MAP_TRANS
  30437. CIPSO_V4_MAP_UNKNOWN
  30438. CIPSO_V4_MAX_LOC_CATS
  30439. CIPSO_V4_MAX_LOC_LVLS
  30440. CIPSO_V4_MAX_REM_CATS
  30441. CIPSO_V4_MAX_REM_LVLS
  30442. CIPSO_V4_OPT_LEN_MAX
  30443. CIPSO_V4_TAG_ENUM
  30444. CIPSO_V4_TAG_ENUM_BLEN
  30445. CIPSO_V4_TAG_FREEFORM
  30446. CIPSO_V4_TAG_INVALID
  30447. CIPSO_V4_TAG_LOCAL
  30448. CIPSO_V4_TAG_LOC_BLEN
  30449. CIPSO_V4_TAG_MAXCNT
  30450. CIPSO_V4_TAG_PBITMAP
  30451. CIPSO_V4_TAG_RANGE
  30452. CIPSO_V4_TAG_RBITMAP
  30453. CIPSO_V4_TAG_RBM_BLEN
  30454. CIPSO_V4_TAG_RNG_BLEN
  30455. CIPSO_V4_TAG_RNG_CAT_MAX
  30456. CIP_BLOCKING
  30457. CIP_DBC_IS_END_EVENT
  30458. CIP_DBC_MASK
  30459. CIP_DBS_MASK
  30460. CIP_DBS_SHIFT
  30461. CIP_EMPTY_HAS_WRONG_DBC
  30462. CIP_EMPTY_WITH_TAG0
  30463. CIP_EOH
  30464. CIP_EOH_MASK
  30465. CIP_EOH_SHIFT
  30466. CIP_FDF_MASK
  30467. CIP_FDF_SHIFT
  30468. CIP_FMT_AM
  30469. CIP_FMT_MASK
  30470. CIP_FMT_MOTU
  30471. CIP_FMT_MOTU_TX_V3
  30472. CIP_FMT_SHIFT
  30473. CIP_HEADER_SIZE
  30474. CIP_HEADER_WITHOUT_EOH
  30475. CIP_JUMBO_PAYLOAD
  30476. CIP_NONBLOCKING
  30477. CIP_NO_HEADER
  30478. CIP_SFC_176400
  30479. CIP_SFC_192000
  30480. CIP_SFC_32000
  30481. CIP_SFC_44100
  30482. CIP_SFC_48000
  30483. CIP_SFC_88200
  30484. CIP_SFC_96000
  30485. CIP_SFC_COUNT
  30486. CIP_SID_MASK
  30487. CIP_SID_SHIFT
  30488. CIP_SKIP_DBC_ZERO_CHECK
  30489. CIP_SPACE_LEFT
  30490. CIP_SPH_MASK
  30491. CIP_SPH_SHIFT
  30492. CIP_SYT_MASK
  30493. CIP_SYT_NO_INFO
  30494. CIP_UNALIGHED_DBC
  30495. CIP_WRONG_DBS
  30496. CIP_WR_MIN_LEN
  30497. CIRCLEQ_EMPTY
  30498. CIRCLEQ_ENTRY
  30499. CIRCLEQ_FIRST
  30500. CIRCLEQ_FOREACH
  30501. CIRCLEQ_FOREACH_REVERSE
  30502. CIRCLEQ_HEAD
  30503. CIRCLEQ_HEAD_INITIALIZER
  30504. CIRCLEQ_INIT
  30505. CIRCLEQ_INSERT_AFTER
  30506. CIRCLEQ_INSERT_BEFORE
  30507. CIRCLEQ_INSERT_HEAD
  30508. CIRCLEQ_INSERT_TAIL
  30509. CIRCLEQ_LAST
  30510. CIRCLEQ_NEXT
  30511. CIRCLEQ_PREV
  30512. CIRCLEQ_REMOVE
  30513. CIRCULAR_BUF_INC_IDX
  30514. CIRC_ADD
  30515. CIRC_CNT
  30516. CIRC_CNT_TO_END
  30517. CIRC_INC
  30518. CIRC_NEXT
  30519. CIRC_PREV
  30520. CIRC_SPACE
  30521. CIRC_SPACE_TO_END
  30522. CIRQ_ACK
  30523. CIRQ_CONTROL
  30524. CIRQ_EDGE
  30525. CIRQ_EN
  30526. CIRQ_FLUSH
  30527. CIRQ_MASK_CLR
  30528. CIRQ_MASK_SET
  30529. CIRQ_POL_CLR
  30530. CIRQ_POL_SET
  30531. CIRQ_SENS_CLR
  30532. CIRQ_SENS_SET
  30533. CIRRUSFB_CONN_LIMIT
  30534. CIRRUS_DPMS_CLEARED
  30535. CIRRUS_LOCHNAGAR_H
  30536. CIRRUS_MAX_FB_HEIGHT
  30537. CIRRUS_MAX_FB_WIDTH
  30538. CIRRUS_MAX_PITCH
  30539. CIRRUS_VRAM_SIZE
  30540. CIR_BKT_SIZE_MASK
  30541. CIR_CAR_REG
  30542. CIR_CC
  30543. CIR_CONTROL
  30544. CIR_CP
  30545. CIR_CR_BASE_ADDR_HI
  30546. CIR_CR_BASE_ADDR_LO
  30547. CIR_CR_CLASS
  30548. CIR_CR_COMMAND_DATA
  30549. CIR_CR_COMMAND_INDEX
  30550. CIR_CR_DEV_EN
  30551. CIR_CR_IRCS
  30552. CIR_CR_IRQ_SEL
  30553. CIR_CR_PSOUT_STATUS
  30554. CIR_CR_WAKE_CONTROL
  30555. CIR_CR_WAKE_KEY12_ADDR
  30556. CIR_CR_WAKE_KEY3_ADDR
  30557. CIR_CR_WAKE_KEY3_CODE
  30558. CIR_CR_WAKE_KEY3_DC
  30559. CIR_CR_WAKE_KEY4_ADDR
  30560. CIR_CR_WAKE_KEY5_ADDR
  30561. CIR_FCCH
  30562. CIR_FCCL
  30563. CIR_FIFOCON
  30564. CIR_FIFOCON_RXFIFOCLR
  30565. CIR_FIFOCON_RX_TRIGGER_LEV
  30566. CIR_FIFOCON_RX_TRIGGER_LEV_1
  30567. CIR_FIFOCON_RX_TRIGGER_LEV_16
  30568. CIR_FIFOCON_RX_TRIGGER_LEV_24
  30569. CIR_FIFOCON_RX_TRIGGER_LEV_8
  30570. CIR_FIFOCON_TXFIFOCLR
  30571. CIR_FIFOCON_TX_TRIGGER_LEV
  30572. CIR_FIFOCON_TX_TRIGGER_LEV_16
  30573. CIR_FIFOCON_TX_TRIGGER_LEV_24
  30574. CIR_FIFOCON_TX_TRIGGER_LEV_31
  30575. CIR_FIFOCON_TX_TRIGGER_LEV_8
  30576. CIR_GAIN
  30577. CIR_GPIO
  30578. CIR_IOREG_LENGTH
  30579. CIR_IRCON
  30580. CIR_IRCON_RECV
  30581. CIR_IRCON_RXEN
  30582. CIR_IRCON_RXINV
  30583. CIR_IRCON_SAMPLE_PERIOD_SEL
  30584. CIR_IRCON_SAMPLE_PERIOD_SEL_1
  30585. CIR_IRCON_SAMPLE_PERIOD_SEL_100
  30586. CIR_IRCON_SAMPLE_PERIOD_SEL_25
  30587. CIR_IRCON_SAMPLE_PERIOD_SEL_50
  30588. CIR_IRCON_TXEN
  30589. CIR_IRCON_WIREN
  30590. CIR_IRCON_WRXINV
  30591. CIR_IREN
  30592. CIR_IREN_GH
  30593. CIR_IREN_PE
  30594. CIR_IREN_RDR
  30595. CIR_IREN_RFO
  30596. CIR_IREN_RTR
  30597. CIR_IREN_TE
  30598. CIR_IREN_TFU
  30599. CIR_IREN_TTR
  30600. CIR_IRFIFOSTS
  30601. CIR_IRFIFOSTS_IR_PENDING
  30602. CIR_IRFIFOSTS_RX_EMPTY
  30603. CIR_IRFIFOSTS_RX_FTA
  30604. CIR_IRFIFOSTS_RX_FULL
  30605. CIR_IRFIFOSTS_RX_GS
  30606. CIR_IRFIFOSTS_TX_EMPTY
  30607. CIR_IRFIFOSTS_TX_FTA
  30608. CIR_IRFIFOSTS_TX_FULL
  30609. CIR_IRFSM
  30610. CIR_IRSTS
  30611. CIR_IRSTS_GH
  30612. CIR_IRSTS_PE
  30613. CIR_IRSTS_RDR
  30614. CIR_IRSTS_RFO
  30615. CIR_IRSTS_RTR
  30616. CIR_IRSTS_TE
  30617. CIR_IRSTS_TFU
  30618. CIR_IRSTS_TTR
  30619. CIR_OT_CFG1
  30620. CIR_OT_CFG2
  30621. CIR_PORT
  30622. CIR_PWR_MASK0
  30623. CIR_PWR_MASK1
  30624. CIR_PWR_MASK2
  30625. CIR_PWR_PTN1
  30626. CIR_PWR_PTN2
  30627. CIR_PWR_PTN3
  30628. CIR_REF_CNT_MASK
  30629. CIR_RXFCONT
  30630. CIR_RX_DATA
  30631. CIR_RX_LIMIT_COUNT
  30632. CIR_SAMPLE_LOW_INACCURACY
  30633. CIR_SAMPLE_PERIOD
  30634. CIR_SLCH
  30635. CIR_SLCL
  30636. CIR_SRXFIFO
  30637. CIR_STATUS
  30638. CIR_STATUS_IRQ_EN
  30639. CIR_STATUS_IRQ_MASK
  30640. CIR_STATUS_RX_RECEIVE
  30641. CIR_STATUS_RX_TIMEOUT
  30642. CIR_STATUS_TX_FINISH
  30643. CIR_STATUS_TX_UNDERRUN
  30644. CIR_STXFIFO
  30645. CIR_TK_BKT_MASK
  30646. CIR_TXFCONT
  30647. CIR_TX_CONTROL
  30648. CIR_TX_CONTROL_TX_END
  30649. CIR_TX_CONTROL_TX_START
  30650. CIR_TX_DATA
  30651. CIR_WAKE_CMP_TOLERANCE
  30652. CIR_WAKE_ENABLE_BIT
  30653. CIR_WAKE_FIFOCON
  30654. CIR_WAKE_FIFOCON_RXFIFOCLR
  30655. CIR_WAKE_FIFOCON_RX_TRIGGER_LEV
  30656. CIR_WAKE_FIFOCON_RX_TRIGGER_LEV_64
  30657. CIR_WAKE_FIFOCON_RX_TRIGGER_LEV_65
  30658. CIR_WAKE_FIFOCON_RX_TRIGGER_LEV_66
  30659. CIR_WAKE_FIFOCON_RX_TRIGGER_LEV_67
  30660. CIR_WAKE_FIFO_CMP_BYTES
  30661. CIR_WAKE_FIFO_CMP_DEEP
  30662. CIR_WAKE_FIFO_CMP_TOL
  30663. CIR_WAKE_FIFO_COUNT
  30664. CIR_WAKE_FIFO_IGNORE
  30665. CIR_WAKE_IRCON
  30666. CIR_WAKE_IRCON_DEC_RST
  30667. CIR_WAKE_IRCON_MODE0
  30668. CIR_WAKE_IRCON_MODE1
  30669. CIR_WAKE_IRCON_R
  30670. CIR_WAKE_IRCON_RXEN
  30671. CIR_WAKE_IRCON_RXINV
  30672. CIR_WAKE_IRCON_SAMPLE_PERIOD_SEL
  30673. CIR_WAKE_IREN
  30674. CIR_WAKE_IREN_GH
  30675. CIR_WAKE_IREN_PE
  30676. CIR_WAKE_IREN_RDR
  30677. CIR_WAKE_IREN_RFO
  30678. CIR_WAKE_IREN_RTR
  30679. CIR_WAKE_IRFIFOSTS_RX_EMPTY
  30680. CIR_WAKE_IRFIFOSTS_RX_FTA
  30681. CIR_WAKE_IRFIFOSTS_RX_FULL
  30682. CIR_WAKE_IRFIFOSTS_RX_GS
  30683. CIR_WAKE_IRFSM
  30684. CIR_WAKE_IRSTS
  30685. CIR_WAKE_IRSTS_GH
  30686. CIR_WAKE_IRSTS_IR_PENDING
  30687. CIR_WAKE_IRSTS_PE
  30688. CIR_WAKE_IRSTS_RDR
  30689. CIR_WAKE_IRSTS_RFO
  30690. CIR_WAKE_IRSTS_RTR
  30691. CIR_WAKE_RD_FIFO_ONLY
  30692. CIR_WAKE_RD_FIFO_ONLY_IDX
  30693. CIR_WAKE_SAMPLE_RX_FIFO
  30694. CIR_WAKE_SLCH
  30695. CIR_WAKE_SLCL
  30696. CIR_WAKE_SRXFSTS
  30697. CIR_WAKE_WR_FIFO_DATA
  30698. CIS0_0
  30699. CIS0_1
  30700. CIS0_2
  30701. CIS0_3
  30702. CIS0_4
  30703. CIS0_5
  30704. CIS0_6
  30705. CIS0_7
  30706. CIS0_8
  30707. CIS0_9
  30708. CIS1_0
  30709. CIS1_1
  30710. CIS1_2
  30711. CIS1_3
  30712. CIS1_4
  30713. CIS1_5
  30714. CIS1_6
  30715. CIS1_7
  30716. CIS1_8
  30717. CIS1_9
  30718. CISC
  30719. CISCCTRL_CSCR2Y_WIDE
  30720. CISCCTRL_CSCY2R_WIDE
  30721. CISCCTRL_EXTRGB_EXTENSION
  30722. CISCCTRL_INRGB_FMT_MASK
  30723. CISCCTRL_INRGB_FMT_RGB565
  30724. CISCCTRL_INRGB_FMT_RGB666
  30725. CISCCTRL_INRGB_FMT_RGB888
  30726. CISCCTRL_INTERLACE
  30727. CISCCTRL_LCDPATHEN_FIFO
  30728. CISCCTRL_MAIN_RATIO_MASK
  30729. CISCCTRL_ONE2ONE
  30730. CISCCTRL_OUTRGB_FMT_MASK
  30731. CISCCTRL_OUTRGB_FMT_RGB565
  30732. CISCCTRL_OUTRGB_FMT_RGB666
  30733. CISCCTRL_OUTRGB_FMT_RGB888
  30734. CISCCTRL_SCALERBYPASS
  30735. CISCCTRL_SCALERSTART
  30736. CISCCTRL_SCALEUP_H
  30737. CISCCTRL_SCALEUP_MASK
  30738. CISCCTRL_SCALEUP_V
  30739. CISCO_ADDR_REPLY
  30740. CISCO_ADDR_REQ
  30741. CISCO_BIG_PACKET_LEN
  30742. CISCO_EXT
  30743. CISCO_KEEPALIVE
  30744. CISCO_KEEPALIVE_REQ
  30745. CISCO_MULTICAST
  30746. CISCO_PACKET_LEN
  30747. CISCO_SYS_INFO
  30748. CISCO_UNICAST
  30749. CISLANDS_CGULVPARAMETER_DFLT
  30750. CISLANDS_CONFIGREG_CACHE
  30751. CISLANDS_CONFIGREG_DIDT_IND
  30752. CISLANDS_CONFIGREG_MAX
  30753. CISLANDS_CONFIGREG_MMR
  30754. CISLANDS_CONFIGREG_SMC_IND
  30755. CISLANDS_MAX_HARDWARE_POWERLEVELS
  30756. CISLANDS_MAX_LEAKAGE_COUNT
  30757. CISLANDS_Q88_FORMAT_CONVERSION_UNIT
  30758. CISLANDS_UNUSED_GPIO_PIN
  30759. CISLANDS_VOLTAGE_CONTROL_BY_GPIO
  30760. CISLANDS_VOLTAGE_CONTROL_BY_SVID2
  30761. CISLANDS_VOLTAGE_CONTROL_NONE
  30762. CISLANDS_VRC_DFLT0
  30763. CISLANDS_VRC_DFLT1
  30764. CISLANDS_VRC_DFLT2
  30765. CISLANDS_VRC_DFLT3
  30766. CISLANDS_VRC_DFLT4
  30767. CISLANDS_VRC_DFLT5
  30768. CISLANDS_VRC_DFLT6
  30769. CISLANDS_VRC_DFLT7
  30770. CISLAND_MAX_DEEPSLEEP_DIVIDER_ID
  30771. CISLAND_MCLK_TARGETACTIVITY_DFLT
  30772. CISLAND_MINIMUM_ENGINE_CLOCK
  30773. CISLAND_TARGETACTIVITY_DFLT
  30774. CISR
  30775. CISRCFMT_ITU601_8BIT
  30776. CISRCFMT_ITU656_8BIT
  30777. CISRCFMT_ORDER422_CBYCRY
  30778. CISRCFMT_ORDER422_CRYCBY
  30779. CISRCFMT_ORDER422_MASK
  30780. CISRCFMT_ORDER422_YCBYCR
  30781. CISRCFMT_ORDER422_YCRYCB
  30782. CISRCFMT_SIZE_CAM_MASK
  30783. CISREG_CCSR
  30784. CISREG_COR
  30785. CISREG_ESR
  30786. CISREG_IADDR0
  30787. CISREG_IADDR1
  30788. CISREG_IADDR2
  30789. CISREG_IADDR3
  30790. CISREG_ICTRL0
  30791. CISREG_ICTRL1
  30792. CISREG_IDATA0
  30793. CISREG_IDATA1
  30794. CISREG_IOBASE_0
  30795. CISREG_IOBASE_1
  30796. CISREG_IOBASE_2
  30797. CISREG_IOBASE_3
  30798. CISREG_IOSIZE
  30799. CISREG_PRR
  30800. CISREG_SCR
  30801. CISR_CDD
  30802. CISR_CQD
  30803. CISR_EOF
  30804. CISR_EOL
  30805. CISR_FEMPTY_0
  30806. CISR_FEMPTY_1
  30807. CISR_FEMPTY_2
  30808. CISR_FTO
  30809. CISR_IFO_0
  30810. CISR_IFO_1
  30811. CISR_IFO_2
  30812. CISR_PAR_ERR
  30813. CISR_RDAV_0
  30814. CISR_RDAV_1
  30815. CISR_RDAV_2
  30816. CISR_SOF
  30817. CISS_CMD_STATUS_ABORTED
  30818. CISS_CMD_STATUS_ABORT_FAILED
  30819. CISS_CMD_STATUS_AIO_DISABLED
  30820. CISS_CMD_STATUS_CONNECTION_LOST
  30821. CISS_CMD_STATUS_DATA_OVERRUN
  30822. CISS_CMD_STATUS_DATA_UNDERRUN
  30823. CISS_CMD_STATUS_HARDWARE_ERROR
  30824. CISS_CMD_STATUS_INVALID
  30825. CISS_CMD_STATUS_PROTOCOL_ERROR
  30826. CISS_CMD_STATUS_SUCCESS
  30827. CISS_CMD_STATUS_TARGET_STATUS
  30828. CISS_CMD_STATUS_TIMEOUT
  30829. CISS_CMD_STATUS_TMF
  30830. CISS_CMD_STATUS_UNABORTABLE
  30831. CISS_CMD_STATUS_UNSOLICITED_ABORT
  30832. CISS_FIBRE1G
  30833. CISS_FIBRE2G
  30834. CISS_GET_DRIVE_NUMBER
  30835. CISS_GET_LEVEL_2_BUS
  30836. CISS_GET_LEVEL_2_TARGET
  30837. CISS_GET_RAID_MAP
  30838. CISS_IDENTIFY_PHYSICAL_DEVICE
  30839. CISS_LV_DEGRADED
  30840. CISS_LV_DISABLED_SCSI_ID_CONFLICT
  30841. CISS_LV_EJECTED
  30842. CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER
  30843. CISS_LV_ENCRYPTED_NO_KEY
  30844. CISS_LV_FAILED
  30845. CISS_LV_FLAGS_NO_HOST_IO
  30846. CISS_LV_HARDWARE_HAS_OVERHEATED
  30847. CISS_LV_HARDWARE_OVERHEATING
  30848. CISS_LV_NOT_AVAILABLE
  30849. CISS_LV_NOT_CONFIGURED
  30850. CISS_LV_NOT_SUPPORTED
  30851. CISS_LV_OK
  30852. CISS_LV_PENDING_ENCRYPTION
  30853. CISS_LV_PENDING_ENCRYPTION_REKEYING
  30854. CISS_LV_PENDING_RPI
  30855. CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM
  30856. CISS_LV_QUEUED_FOR_EXPANSION
  30857. CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD
  30858. CISS_LV_READY_FOR_RECOVERY
  30859. CISS_LV_STATUS_UNAVAILABLE
  30860. CISS_LV_UNDERGOING_ENCRYPTION
  30861. CISS_LV_UNDERGOING_ENCRYPTION_REKEYING
  30862. CISS_LV_UNDERGOING_ERASE
  30863. CISS_LV_UNDERGOING_EXPANSION
  30864. CISS_LV_UNDERGOING_RECOVERY
  30865. CISS_LV_UNDERGOING_RPI
  30866. CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED
  30867. CISS_MAX_LUN
  30868. CISS_PARCSCIU3
  30869. CISS_PARSCSIU2
  30870. CISS_READ
  30871. CISS_REPORT_LOG
  30872. CISS_REPORT_LOG_EXTENDED
  30873. CISS_REPORT_PHYS
  30874. CISS_REPORT_PHYSICAL_LUNS
  30875. CISS_REPORT_PHYS_EXTENDED
  30876. CISS_SG_CHAIN
  30877. CISS_SG_LAST
  30878. CISS_TMF_COMPLETE
  30879. CISS_TMF_FAILED
  30880. CISS_TMF_INVALID_FRAME
  30881. CISS_TMF_NOT_SUPPORTED
  30882. CISS_TMF_OVERLAPPED_TAG
  30883. CISS_TMF_SUCCESS
  30884. CISS_TMF_WRONG_LUN
  30885. CISS_VPD_LV_BYPASS_STATUS
  30886. CISS_VPD_LV_DEVICE_GEOMETRY
  30887. CISS_VPD_LV_STATUS
  30888. CISTATUS_FRAMECNT
  30889. CISTATUS_FRAMECNT_MASK
  30890. CISTATUS_FRAMEEND_STATUS
  30891. CISTATUS_IMGCPTENSC_STATUS
  30892. CISTATUS_IMGCPTEN_STATUS
  30893. CISTATUS_OVFICB_STATUS
  30894. CISTATUS_OVFICR_STATUS
  30895. CISTATUS_OVFIY_STATUS
  30896. CISTATUS_OVF_MASK
  30897. CISTATUS_VSYNC_A_STATUS
  30898. CISTATUS_VSYNC_STATUS
  30899. CISTATUS_WINOFSTEN_STATUS
  30900. CISTPL_ALTSTR
  30901. CISTPL_BAR
  30902. CISTPL_BAR_1MEG_MAP
  30903. CISTPL_BAR_CACHEABLE
  30904. CISTPL_BAR_PREFETCH
  30905. CISTPL_BAR_SPACE
  30906. CISTPL_BAR_SPACE_IO
  30907. CISTPL_BATTERY
  30908. CISTPL_BYTEORDER
  30909. CISTPL_CFTABLE_AUDIO
  30910. CISTPL_CFTABLE_BINARY_AUDIO
  30911. CISTPL_CFTABLE_BVDS
  30912. CISTPL_CFTABLE_DEFAULT
  30913. CISTPL_CFTABLE_ENTRY
  30914. CISTPL_CFTABLE_ENTRY_CB
  30915. CISTPL_CFTABLE_FAST_BACK
  30916. CISTPL_CFTABLE_INVALIDATE
  30917. CISTPL_CFTABLE_MASTER
  30918. CISTPL_CFTABLE_MWAIT
  30919. CISTPL_CFTABLE_PARITY
  30920. CISTPL_CFTABLE_PWM_AUDIO
  30921. CISTPL_CFTABLE_PWRDOWN
  30922. CISTPL_CFTABLE_RDYBSY
  30923. CISTPL_CFTABLE_READONLY
  30924. CISTPL_CFTABLE_SERR
  30925. CISTPL_CFTABLE_VGA_PALETTE
  30926. CISTPL_CFTABLE_WAIT
  30927. CISTPL_CFTABLE_WP
  30928. CISTPL_CHECKSUM
  30929. CISTPL_CONFIG
  30930. CISTPL_CONFIG_CB
  30931. CISTPL_DATE
  30932. CISTPL_DEVICE
  30933. CISTPL_DEVICE_3VCC
  30934. CISTPL_DEVICE_A
  30935. CISTPL_DEVICE_GEO
  30936. CISTPL_DEVICE_GEO_A
  30937. CISTPL_DEVICE_MWAIT
  30938. CISTPL_DEVICE_OA
  30939. CISTPL_DEVICE_OC
  30940. CISTPL_DTYPE_DRAM
  30941. CISTPL_DTYPE_EEPROM
  30942. CISTPL_DTYPE_EPROM
  30943. CISTPL_DTYPE_EXTEND
  30944. CISTPL_DTYPE_FLASH
  30945. CISTPL_DTYPE_FUNCSPEC
  30946. CISTPL_DTYPE_NULL
  30947. CISTPL_DTYPE_OTPROM
  30948. CISTPL_DTYPE_ROM
  30949. CISTPL_DTYPE_SRAM
  30950. CISTPL_EDC_CKSUM
  30951. CISTPL_EDC_CRC
  30952. CISTPL_EDC_NONE
  30953. CISTPL_EDC_PCC
  30954. CISTPL_END
  30955. CISTPL_EXTDEVICE
  30956. CISTPL_FORMAT
  30957. CISTPL_FORMAT_A
  30958. CISTPL_FORMAT_DISK
  30959. CISTPL_FORMAT_MEM
  30960. CISTPL_FUNCE
  30961. CISTPL_FUNCE_IDE_IFACE
  30962. CISTPL_FUNCE_IDE_MASTER
  30963. CISTPL_FUNCE_IDE_SLAVE
  30964. CISTPL_FUNCE_LAN_CONNECTOR
  30965. CISTPL_FUNCE_LAN_MEDIA
  30966. CISTPL_FUNCE_LAN_NODE_ID
  30967. CISTPL_FUNCE_LAN_SPEED
  30968. CISTPL_FUNCE_LAN_TECH
  30969. CISTPL_FUNCE_SERIAL_CAP
  30970. CISTPL_FUNCE_SERIAL_CAP_DATA
  30971. CISTPL_FUNCE_SERIAL_CAP_FAX
  30972. CISTPL_FUNCE_SERIAL_CAP_VOICE
  30973. CISTPL_FUNCE_SERIAL_IF
  30974. CISTPL_FUNCE_SERIAL_IF_DATA
  30975. CISTPL_FUNCE_SERIAL_IF_FAX
  30976. CISTPL_FUNCE_SERIAL_IF_VOICE
  30977. CISTPL_FUNCE_SERIAL_SERV_DATA
  30978. CISTPL_FUNCE_SERIAL_SERV_FAX
  30979. CISTPL_FUNCE_SERIAL_SERV_VOICE
  30980. CISTPL_FUNCID
  30981. CISTPL_FUNCID_AIMS
  30982. CISTPL_FUNCID_FIXED
  30983. CISTPL_FUNCID_MEMORY
  30984. CISTPL_FUNCID_MULTI
  30985. CISTPL_FUNCID_NETWORK
  30986. CISTPL_FUNCID_PARALLEL
  30987. CISTPL_FUNCID_SCSI
  30988. CISTPL_FUNCID_SERIAL
  30989. CISTPL_FUNCID_VIDEO
  30990. CISTPL_GEOMETRY
  30991. CISTPL_IDE_DUAL
  30992. CISTPL_IDE_HAS_IDLE
  30993. CISTPL_IDE_HAS_INDEX
  30994. CISTPL_IDE_HAS_SLEEP
  30995. CISTPL_IDE_HAS_STANDBY
  30996. CISTPL_IDE_INTERFACE
  30997. CISTPL_IDE_IOIS16
  30998. CISTPL_IDE_LOW_POWER
  30999. CISTPL_IDE_REG_INHIBIT
  31000. CISTPL_IDE_SILICON
  31001. CISTPL_IDE_UNIQUE
  31002. CISTPL_INDIRECT
  31003. CISTPL_IO_16BIT
  31004. CISTPL_IO_8BIT
  31005. CISTPL_IO_LINES_MASK
  31006. CISTPL_IO_MAX_WIN
  31007. CISTPL_IO_RANGE
  31008. CISTPL_JEDEC_A
  31009. CISTPL_JEDEC_C
  31010. CISTPL_LAN_MEDIA_2GHZ
  31011. CISTPL_LAN_MEDIA_5GHZ
  31012. CISTPL_LAN_MEDIA_900MHZ
  31013. CISTPL_LAN_MEDIA_DIFF_IR
  31014. CISTPL_LAN_MEDIA_FIBER
  31015. CISTPL_LAN_MEDIA_PTP_IR
  31016. CISTPL_LAN_MEDIA_STP
  31017. CISTPL_LAN_MEDIA_THICK_COAX
  31018. CISTPL_LAN_MEDIA_THIN_COAX
  31019. CISTPL_LAN_MEDIA_UTP
  31020. CISTPL_LAN_TECH_ARCNET
  31021. CISTPL_LAN_TECH_ATM
  31022. CISTPL_LAN_TECH_ETHERNET
  31023. CISTPL_LAN_TECH_FDDI
  31024. CISTPL_LAN_TECH_LOCALTALK
  31025. CISTPL_LAN_TECH_TOKENRING
  31026. CISTPL_LAN_TECH_WIRELESS
  31027. CISTPL_LINKTARGET
  31028. CISTPL_LONGLINK_A
  31029. CISTPL_LONGLINK_C
  31030. CISTPL_LONGLINK_CB
  31031. CISTPL_LONGLINK_MFC
  31032. CISTPL_MANFID
  31033. CISTPL_MAX_ALTSTR_STRINGS
  31034. CISTPL_MAX_CIS_SIZE
  31035. CISTPL_MAX_DEVICES
  31036. CISTPL_MAX_FUNCTIONS
  31037. CISTPL_MEM_MAX_WIN
  31038. CISTPL_MFC_ATTR
  31039. CISTPL_MFC_COMMON
  31040. CISTPL_NO_LINK
  31041. CISTPL_NULL
  31042. CISTPL_ORG
  31043. CISTPL_ORG_APPSPEC
  31044. CISTPL_ORG_FS
  31045. CISTPL_ORG_XIP
  31046. CISTPL_POWER_HIGHZ_OK
  31047. CISTPL_POWER_HIGHZ_REQ
  31048. CISTPL_POWER_IAVG
  31049. CISTPL_POWER_IDOWN
  31050. CISTPL_POWER_IPEAK
  31051. CISTPL_POWER_ISTATIC
  31052. CISTPL_POWER_VMAX
  31053. CISTPL_POWER_VMIN
  31054. CISTPL_POWER_VNOM
  31055. CISTPL_PWR_MGMNT
  31056. CISTPL_SERIAL_CMD_AT1
  31057. CISTPL_SERIAL_CMD_AT2
  31058. CISTPL_SERIAL_CMD_AT3
  31059. CISTPL_SERIAL_CMD_DMCL
  31060. CISTPL_SERIAL_CMD_MNP_AT
  31061. CISTPL_SERIAL_CMD_V25A
  31062. CISTPL_SERIAL_CMD_V25BIS
  31063. CISTPL_SERIAL_CMPR_MNP5
  31064. CISTPL_SERIAL_CMPR_V42BIS
  31065. CISTPL_SERIAL_ERR_MNP2_4
  31066. CISTPL_SERIAL_ERR_V42_LAPM
  31067. CISTPL_SERIAL_MOD_103
  31068. CISTPL_SERIAL_MOD_212A
  31069. CISTPL_SERIAL_MOD_V21
  31070. CISTPL_SERIAL_MOD_V22
  31071. CISTPL_SERIAL_MOD_V22BIS
  31072. CISTPL_SERIAL_MOD_V23
  31073. CISTPL_SERIAL_MOD_V26
  31074. CISTPL_SERIAL_MOD_V26BIS
  31075. CISTPL_SERIAL_MOD_V27BIS
  31076. CISTPL_SERIAL_MOD_V29
  31077. CISTPL_SERIAL_MOD_V32
  31078. CISTPL_SERIAL_MOD_V32BIS
  31079. CISTPL_SERIAL_MOD_V34
  31080. CISTPL_SERIAL_UART_16450
  31081. CISTPL_SERIAL_UART_16550
  31082. CISTPL_SERIAL_UART_1STOP
  31083. CISTPL_SERIAL_UART_2STOP
  31084. CISTPL_SERIAL_UART_5BIT
  31085. CISTPL_SERIAL_UART_6BIT
  31086. CISTPL_SERIAL_UART_7BIT
  31087. CISTPL_SERIAL_UART_8250
  31088. CISTPL_SERIAL_UART_8251
  31089. CISTPL_SERIAL_UART_85230
  31090. CISTPL_SERIAL_UART_8530
  31091. CISTPL_SERIAL_UART_8BIT
  31092. CISTPL_SERIAL_UART_EVEN
  31093. CISTPL_SERIAL_UART_MARK
  31094. CISTPL_SERIAL_UART_MSTOP
  31095. CISTPL_SERIAL_UART_ODD
  31096. CISTPL_SERIAL_UART_SPACE
  31097. CISTPL_SPCL
  31098. CISTPL_SWIL
  31099. CISTPL_SYSINIT_POST
  31100. CISTPL_SYSINIT_ROM
  31101. CISTPL_VERS_1
  31102. CISTPL_VERS_1_MAX_PROD_STRINGS
  31103. CISTPL_VERS_2
  31104. CIS_BLOCK
  31105. CIS_MAX_LEN
  31106. CIS_OFFSET
  31107. CITAREA_MASK
  31108. CITF_CNTL
  31109. CITOR
  31110. CITRGFMT_FLIP_180
  31111. CITRGFMT_FLIP_MASK
  31112. CITRGFMT_FLIP_NORMAL
  31113. CITRGFMT_FLIP_X_MIRROR
  31114. CITRGFMT_FLIP_Y_MIRROR
  31115. CITRGFMT_IN422
  31116. CITRGFMT_OUT422
  31117. CITRGFMT_OUTFORMAT_MASK
  31118. CITRGFMT_OUTFORMAT_RGB
  31119. CITRGFMT_OUTFORMAT_YCBCR420
  31120. CITRGFMT_OUTFORMAT_YCBCR422
  31121. CITRGFMT_OUTFORMAT_YCBCR422I
  31122. CITRGFMT_ROT90_PR
  31123. CITRGFMT_TARGETHSIZE
  31124. CITRGFMT_TARGETSIZE_MASK
  31125. CITRGFMT_TARGETVSIZE
  31126. CIT_IBM_NETCAM_PRO
  31127. CIT_MODEL0
  31128. CIT_MODEL1
  31129. CIT_MODEL2
  31130. CIT_MODEL3
  31131. CIT_MODEL4
  31132. CIU3_CONST
  31133. CIU3_DEST_IO_INT
  31134. CIU3_DEST_PP_INT
  31135. CIU3_IDT_CTL
  31136. CIU3_IDT_IO
  31137. CIU3_IDT_PP
  31138. CIU3_ISC_CTL
  31139. CIU3_ISC_W1C
  31140. CIU3_ISC_W1S
  31141. CIU3_MBOX_PER_CORE
  31142. CIU_REG
  31143. CIU_VIRT_BASE
  31144. CIVERSION
  31145. CIVIC_BASE
  31146. CIVR0
  31147. CIVR1
  31148. CIWDOFST2_OFST2_MASK
  31149. CIWDOFST_CLROVCOFICB
  31150. CIWDOFST_CLROVCOFICR
  31151. CIWDOFST_CLROVCOFIY
  31152. CIWDOFST_CLROVPRFICB
  31153. CIWDOFST_CLROVPRFICR
  31154. CIWDOFST_CLROVRLB_PR
  31155. CIWDOFST_OFST_MASK
  31156. CIWDOFST_WINOFSEN
  31157. CIW_CLR_SCSI_RESET_INT
  31158. CIW_INT_ACK
  31159. CIW_IRQ_ACT
  31160. CIW_SEL_33MHZ
  31161. CIW_TEST1
  31162. CIW_TEST2
  31163. CIW_TYPE_AQUEUE
  31164. CIW_TYPE_EQUEUE
  31165. CIW_TYPE_RCD
  31166. CIW_TYPE_RNI
  31167. CIW_TYPE_SII
  31168. CI_ADDR
  31169. CI_BASE
  31170. CI_BONAIRE_M_A0
  31171. CI_BONAIRE_M_A1
  31172. CI_BSD_COMPRESS
  31173. CI_BUFFER
  31174. CI_BUFFER_BASE
  31175. CI_BUFFER_SIZE
  31176. CI_BYPASS_DISABLE
  31177. CI_CAM_DETECT
  31178. CI_CAM_READY
  31179. CI_CMD_ACK
  31180. CI_CMD_ENTER_MENU
  31181. CI_CMD_ERROR
  31182. CI_CMD_FAST_PSI
  31183. CI_CMD_GET_SLOT_INFO
  31184. CI_CMD_KEYPRESS
  31185. CI_CMD_ON_SWITCH_PROGRAM
  31186. CI_CMD_ON_TUNED
  31187. CI_CMD_SECTION_ARRIVED
  31188. CI_CMD_SECTION_TIMEOUT
  31189. CI_CMD_SYSTEM_READY
  31190. CI_CMD_TIME
  31191. CI_CONTROL
  31192. CI_CamReady
  31193. CI_DEFLATE
  31194. CI_DEFLATE_DRAFT
  31195. CI_DIG_THERM_INTH
  31196. CI_DIG_THERM_INTH_MASK
  31197. CI_DIG_THERM_INTH_SHIFT
  31198. CI_DIG_THERM_INTL
  31199. CI_DIG_THERM_INTL_MASK
  31200. CI_DIG_THERM_INTL_SHIFT
  31201. CI_DO_ATTRIBUTE_RW
  31202. CI_DO_IO_RW
  31203. CI_DO_READ_ATTRIBUTES
  31204. CI_ENABLE
  31205. CI_HAWAII_P_A0
  31206. CI_HDRC_CONTROLLER_RESET_EVENT
  31207. CI_HDRC_CONTROLLER_STOPPED_EVENT
  31208. CI_HDRC_DISABLE_DEVICE_STREAMING
  31209. CI_HDRC_DISABLE_HOST_STREAMING
  31210. CI_HDRC_DISABLE_STREAMING
  31211. CI_HDRC_DUAL_ROLE_NOT_OTG
  31212. CI_HDRC_FORCE_FULLSPEED
  31213. CI_HDRC_IMX28_WRITE_FIX
  31214. CI_HDRC_IMX_HSIC_ACTIVE_EVENT
  31215. CI_HDRC_IMX_HSIC_SUSPEND_EVENT
  31216. CI_HDRC_IMX_IS_HSIC
  31217. CI_HDRC_OVERRIDE_AHB_BURST
  31218. CI_HDRC_OVERRIDE_PHY_CONTROL
  31219. CI_HDRC_OVERRIDE_RX_BURST
  31220. CI_HDRC_OVERRIDE_TX_BURST
  31221. CI_HDRC_PAGE_SIZE
  31222. CI_HDRC_PMQOS
  31223. CI_HDRC_REGS_SHARED
  31224. CI_HDRC_REQUIRES_ALIGNED_DMA
  31225. CI_HDRC_SET_NON_ZERO_TTHA
  31226. CI_HDRC_SUPPORTS_RUNTIME_PM
  31227. CI_HDRC_TURN_VBUS_EARLY_ON
  31228. CI_MASK
  31229. CI_MODULE_READY
  31230. CI_MPPE
  31231. CI_MSG_CA_PMT
  31232. CI_MSG_CI_INFO
  31233. CI_MSG_CLOSE_FILTER
  31234. CI_MSG_CLOSE_MMI_IMM
  31235. CI_MSG_ERROR
  31236. CI_MSG_INPUT_COMPLETE
  31237. CI_MSG_LIST
  31238. CI_MSG_LIST_MORE
  31239. CI_MSG_MENU
  31240. CI_MSG_MENU_MORE
  31241. CI_MSG_NONE
  31242. CI_MSG_REQUEST_INPUT
  31243. CI_MSG_SECTION_REQUEST
  31244. CI_MSG_TEXT
  31245. CI_MSG_TEXT_MORE
  31246. CI_O
  31247. CI_POWER_ON
  31248. CI_PREDICTOR_1
  31249. CI_PREDICTOR_2
  31250. CI_PSI_COMPLETE
  31251. CI_Q_ADDR_SIZE
  31252. CI_READDATA
  31253. CI_READY
  31254. CI_READ_CMD
  31255. CI_RESET_CAM
  31256. CI_REVISION_1X
  31257. CI_REVISION_20
  31258. CI_REVISION_21
  31259. CI_REVISION_22
  31260. CI_REVISION_23
  31261. CI_REVISION_24
  31262. CI_REVISION_25
  31263. CI_REVISION_25_PLUS
  31264. CI_REVISION_UNKNOWN
  31265. CI_ROLE_END
  31266. CI_ROLE_GADGET
  31267. CI_ROLE_HOST
  31268. CI_SWITCH_PRG_REPLY
  31269. CI_TABLE_SIZE
  31270. CI_UNKNOWN
  31271. CI_UPDATE_NO_COALESC
  31272. CI_UPDATE_NO_PENDING
  31273. CI_WRITE_CMD
  31274. CI_handle
  31275. CJUMLDIR
  31276. CK25_DIS
  31277. CK32K_LOWPWR_EN
  31278. CK804
  31279. CKADSEL_L
  31280. CKCTL_3368_ACP_A_EN
  31281. CKCTL_3368_ACP_B_EN
  31282. CKCTL_3368_ALL_SAFE_EN
  31283. CKCTL_3368_APM_EN
  31284. CKCTL_3368_BMU_EN
  31285. CKCTL_3368_DS_TOP_EN
  31286. CKCTL_3368_EMUSB_EN
  31287. CKCTL_3368_ENET0_EN
  31288. CKCTL_3368_ENET1_EN
  31289. CKCTL_3368_EPHY_EN
  31290. CKCTL_3368_MAC_EN
  31291. CKCTL_3368_NTP_EN
  31292. CKCTL_3368_PCM_EN
  31293. CKCTL_3368_SPI_EN
  31294. CKCTL_3368_TC_EN
  31295. CKCTL_3368_USBS_EN
  31296. CKCTL_3368_USBU_EN
  31297. CKCTL_3368_US_TOP_EN
  31298. CKCTL_6328_ADSL_AFE_EN
  31299. CKCTL_6328_ADSL_EN
  31300. CKCTL_6328_ADSL_QPROC_EN
  31301. CKCTL_6328_ALL_SAFE_EN
  31302. CKCTL_6328_HSSPI_EN
  31303. CKCTL_6328_MIPS_EN
  31304. CKCTL_6328_PCIE_EN
  31305. CKCTL_6328_PCM_EN
  31306. CKCTL_6328_PHYMIPS_EN
  31307. CKCTL_6328_ROBOSW_EN
  31308. CKCTL_6328_SAR_EN
  31309. CKCTL_6328_USBD_EN
  31310. CKCTL_6328_USBH_EN
  31311. CKCTL_6338_ADSLPHY_EN
  31312. CKCTL_6338_ALL_SAFE_EN
  31313. CKCTL_6338_DRAM_EN
  31314. CKCTL_6338_ENET_EN
  31315. CKCTL_6338_MPI_EN
  31316. CKCTL_6338_SAR_EN
  31317. CKCTL_6338_SPI_EN
  31318. CKCTL_6338_USBS_EN
  31319. CKCTL_6345_ADSLPHY_EN
  31320. CKCTL_6345_ALL_SAFE_EN
  31321. CKCTL_6345_BUS_EN
  31322. CKCTL_6345_CPU_EN
  31323. CKCTL_6345_EBI_EN
  31324. CKCTL_6345_ENET_EN
  31325. CKCTL_6345_UART_EN
  31326. CKCTL_6345_USBH_EN
  31327. CKCTL_6348_ADSLPHY_EN
  31328. CKCTL_6348_ALL_SAFE_EN
  31329. CKCTL_6348_ENET_EN
  31330. CKCTL_6348_M2M_EN
  31331. CKCTL_6348_MPI_EN
  31332. CKCTL_6348_SAR_EN
  31333. CKCTL_6348_SDRAM_EN
  31334. CKCTL_6348_SPI_EN
  31335. CKCTL_6348_USBH_EN
  31336. CKCTL_6348_USBS_EN
  31337. CKCTL_6358_ADSLPHY_EN
  31338. CKCTL_6358_ALL_SAFE_EN
  31339. CKCTL_6358_EMUSB_EN
  31340. CKCTL_6358_ENET0_EN
  31341. CKCTL_6358_ENET1_EN
  31342. CKCTL_6358_ENET_EN
  31343. CKCTL_6358_EPHY_EN
  31344. CKCTL_6358_PCM_EN
  31345. CKCTL_6358_SAR_EN
  31346. CKCTL_6358_SPI_EN
  31347. CKCTL_6358_USBSU_EN
  31348. CKCTL_6358_USBS_EN
  31349. CKCTL_6362_ADSL_AFE_EN
  31350. CKCTL_6362_ADSL_EN
  31351. CKCTL_6362_ADSL_QPROC_EN
  31352. CKCTL_6362_ALL_SAFE_EN
  31353. CKCTL_6362_FAP_EN
  31354. CKCTL_6362_HSSPI_EN
  31355. CKCTL_6362_IPSEC_EN
  31356. CKCTL_6362_MIPS_EN
  31357. CKCTL_6362_NAND_EN
  31358. CKCTL_6362_PCIE_EN
  31359. CKCTL_6362_PCM_EN
  31360. CKCTL_6362_PHYMIPS_EN
  31361. CKCTL_6362_ROBOSW_EN
  31362. CKCTL_6362_SAR_EN
  31363. CKCTL_6362_SPI_EN
  31364. CKCTL_6362_SWPKT_SAR_EN
  31365. CKCTL_6362_SWPKT_USB_EN
  31366. CKCTL_6362_USBD_EN
  31367. CKCTL_6362_USBH_EN
  31368. CKCTL_6362_WLAN_OCP_EN
  31369. CKCTL_6368_ALL_SAFE_EN
  31370. CKCTL_6368_DISABLE_GLESS_EN
  31371. CKCTL_6368_IPSEC_EN
  31372. CKCTL_6368_NAND_EN
  31373. CKCTL_6368_PCM_EN
  31374. CKCTL_6368_PHYMIPS_EN
  31375. CKCTL_6368_ROBOSW_EN
  31376. CKCTL_6368_SAR_EN
  31377. CKCTL_6368_SPI_EN
  31378. CKCTL_6368_SWPKT_SAR_EN
  31379. CKCTL_6368_SWPKT_USB_EN
  31380. CKCTL_6368_USBD_EN
  31381. CKCTL_6368_USBH_EN
  31382. CKCTL_6368_UTOPIA_EN
  31383. CKCTL_6368_VDSL_AFE_EN
  31384. CKCTL_6368_VDSL_BONDING_EN
  31385. CKCTL_6368_VDSL_EN
  31386. CKCTL_6368_VDSL_QPROC_EN
  31387. CKCTL_ARMDIV_OFFSET
  31388. CKCTL_DSPDIV_OFFSET
  31389. CKCTL_DSPMMUDIV_OFFSET
  31390. CKCTL_DSPPERDIV_OFFSET
  31391. CKCTL_LCDDIV_OFFSET
  31392. CKCTL_PERDIV_OFFSET
  31393. CKCTL_TCDIV_OFFSET
  31394. CKDLY_AFE
  31395. CKDLY_BT
  31396. CKDLY_DIG
  31397. CKDLY_USB
  31398. CKDV
  31399. CKEN
  31400. CKENA
  31401. CKENB
  31402. CKENC
  31403. CKEN_1WIRE
  31404. CKEN_AB
  31405. CKEN_AC97
  31406. CKEN_AC97CONF
  31407. CKEN_ASSP
  31408. CKEN_AUXEN_SHIFT
  31409. CKEN_BOOT
  31410. CKEN_BTUART
  31411. CKEN_CAMERA
  31412. CKEN_CIR
  31413. CKEN_DMC
  31414. CKEN_FFUART
  31415. CKEN_FICP
  31416. CKEN_GPIO
  31417. CKEN_HSIO2
  31418. CKEN_HWUART
  31419. CKEN_I2C
  31420. CKEN_I2S
  31421. CKEN_IM
  31422. CKEN_INTC
  31423. CKEN_ISC
  31424. CKEN_KEYPAD
  31425. CKEN_LCD
  31426. CKEN_MEMC
  31427. CKEN_MEMSTK
  31428. CKEN_MINI_IM
  31429. CKEN_MINI_LCD
  31430. CKEN_MMC
  31431. CKEN_MMC1
  31432. CKEN_MMC2
  31433. CKEN_MMC3
  31434. CKEN_MSL
  31435. CKEN_MSL0
  31436. CKEN_MVED
  31437. CKEN_NAND
  31438. CKEN_NSSP
  31439. CKEN_OBSCLK_SHIFT
  31440. CKEN_OSTIMER
  31441. CKEN_PWM0
  31442. CKEN_PWM1
  31443. CKEN_PWRI2C
  31444. CKEN_PXA300_GCU
  31445. CKEN_PXA320_GCU
  31446. CKEN_SMC
  31447. CKEN_SSP
  31448. CKEN_SSP1
  31449. CKEN_SSP2
  31450. CKEN_SSP3
  31451. CKEN_SSP4
  31452. CKEN_STUART
  31453. CKEN_TOUCH
  31454. CKEN_TPM
  31455. CKEN_UDC
  31456. CKEN_USB
  31457. CKEN_USB2
  31458. CKEN_USBH
  31459. CKEN_USBHOST
  31460. CKEN_USIM
  31461. CKEN_USIM0
  31462. CKEN_USIM1
  31463. CKE_DYN
  31464. CKE_MARK
  31465. CKHY
  31466. CKIH_27MHZ_BIT_SET
  31467. CKIH_CLK_FREQ
  31468. CKIH_CLK_FREQ_27MHZ
  31469. CKILL
  31470. CKIL_CLK_FREQ
  31471. CKMODE_B
  31472. CKMODE_DISABLE
  31473. CKMODE_G
  31474. CKMODE_R
  31475. CKMODE_RGB
  31476. CKMODE_U
  31477. CKMODE_V
  31478. CKMODE_Y
  31479. CKO
  31480. CKO_MARK
  31481. CKSEG0
  31482. CKSEG0ADDR
  31483. CKSEG1
  31484. CKSEG1ADDR
  31485. CKSEG2
  31486. CKSEG2ADDR
  31487. CKSEG3
  31488. CKSEG3ADDR
  31489. CKSEL_MASK
  31490. CKSEL_SHIFT
  31491. CKSSEG
  31492. CKSTAT
  31493. CKSUMTYPE_CRC32
  31494. CKSUMTYPE_DESCBC
  31495. CKSUMTYPE_HMAC_MD5_ARCFOUR
  31496. CKSUMTYPE_HMAC_SHA1_96_AES128
  31497. CKSUMTYPE_HMAC_SHA1_96_AES256
  31498. CKSUMTYPE_HMAC_SHA1_DES3
  31499. CKSUMTYPE_NIST_SHA
  31500. CKSUMTYPE_RSA_MD4
  31501. CKSUMTYPE_RSA_MD4_DES
  31502. CKSUMTYPE_RSA_MD5
  31503. CKSUMTYPE_RSA_MD5_DES
  31504. CKSVII2C_IC_ACK_GENERAL_CALL__ACK_GENERAL_CALL_MASK
  31505. CKSVII2C_IC_ACK_GENERAL_CALL__ACK_GENERAL_CALL__SHIFT
  31506. CKSVII2C_IC_CLR_ACTIVITY__CLR_ACTIVITY_MASK
  31507. CKSVII2C_IC_CLR_ACTIVITY__CLR_ACTIVITY__SHIFT
  31508. CKSVII2C_IC_COMP_PARAM_1__COMP_PARAM_1_MASK
  31509. CKSVII2C_IC_COMP_PARAM_1__COMP_PARAM_1__SHIFT
  31510. CKSVII2C_IC_COMP_TYPE__COMP_TYPE_MASK
  31511. CKSVII2C_IC_COMP_TYPE__COMP_TYPE__SHIFT
  31512. CKSVII2C_IC_COMP_VERSION__COMP_VERSION_MASK
  31513. CKSVII2C_IC_COMP_VERSION__COMP_VERSION__SHIFT
  31514. CKSVII2C_IC_CON__IC_10BITADDR_MASTER_MASK
  31515. CKSVII2C_IC_CON__IC_10BITADDR_MASTER__SHIFT
  31516. CKSVII2C_IC_CON__IC_10BITADDR_SLAVE_MASK
  31517. CKSVII2C_IC_CON__IC_10BITADDR_SLAVE__SHIFT
  31518. CKSVII2C_IC_CON__IC_MASTER_MODE_MASK
  31519. CKSVII2C_IC_CON__IC_MASTER_MODE__SHIFT
  31520. CKSVII2C_IC_CON__IC_MAX_SPEED_MODE_MASK
  31521. CKSVII2C_IC_CON__IC_MAX_SPEED_MODE__SHIFT
  31522. CKSVII2C_IC_CON__IC_RESTART_EN_MASK
  31523. CKSVII2C_IC_CON__IC_RESTART_EN__SHIFT
  31524. CKSVII2C_IC_CON__IC_SLAVE_DISABLE_MASK
  31525. CKSVII2C_IC_CON__IC_SLAVE_DISABLE__SHIFT
  31526. CKSVII2C_IC_CON__RX_FIFO_FULL_HLD_CTRL_MASK
  31527. CKSVII2C_IC_CON__RX_FIFO_FULL_HLD_CTRL__SHIFT
  31528. CKSVII2C_IC_CON__STOP_DET_IFADDRESSED_MASK
  31529. CKSVII2C_IC_CON__STOP_DET_IFADDRESSED__SHIFT
  31530. CKSVII2C_IC_CON__TX_EMPTY_CTRL_MASK
  31531. CKSVII2C_IC_CON__TX_EMPTY_CTRL__SHIFT
  31532. CKSVII2C_IC_DATA_CMD__CMD_MASK
  31533. CKSVII2C_IC_DATA_CMD__CMD__SHIFT
  31534. CKSVII2C_IC_DATA_CMD__DAT_MASK
  31535. CKSVII2C_IC_DATA_CMD__DAT__SHIFT
  31536. CKSVII2C_IC_DATA_CMD__RESTART_MASK
  31537. CKSVII2C_IC_DATA_CMD__RESTART__SHIFT
  31538. CKSVII2C_IC_DATA_CMD__STOP_MASK
  31539. CKSVII2C_IC_DATA_CMD__STOP__SHIFT
  31540. CKSVII2C_IC_ENABLE_STATUS__IC_EN_MASK
  31541. CKSVII2C_IC_ENABLE_STATUS__IC_EN__SHIFT
  31542. CKSVII2C_IC_ENABLE_STATUS__SLV_FIFO_FILLED_AND_FLUSHED_MASK
  31543. CKSVII2C_IC_ENABLE_STATUS__SLV_FIFO_FILLED_AND_FLUSHED__SHIFT
  31544. CKSVII2C_IC_ENABLE_STATUS__SLV_RX_ABORTED_MASK
  31545. CKSVII2C_IC_ENABLE_STATUS__SLV_RX_ABORTED__SHIFT
  31546. CKSVII2C_IC_ENABLE__ABORT_MASK
  31547. CKSVII2C_IC_ENABLE__ABORT__SHIFT
  31548. CKSVII2C_IC_ENABLE__ENABLE_MASK
  31549. CKSVII2C_IC_ENABLE__ENABLE__SHIFT
  31550. CKSVII2C_IC_FS_SCL_HCNT__IC_FS_SCL_HCNT_MASK
  31551. CKSVII2C_IC_FS_SCL_HCNT__IC_FS_SCL_HCNT__SHIFT
  31552. CKSVII2C_IC_FS_SCL_LCNT__IC_FS_SCL_LCNT_MASK
  31553. CKSVII2C_IC_FS_SCL_LCNT__IC_FS_SCL_LCNT__SHIFT
  31554. CKSVII2C_IC_FS_SPKLEN__FS_SPKLEN_MASK
  31555. CKSVII2C_IC_FS_SPKLEN__FS_SPKLEN__SHIFT
  31556. CKSVII2C_IC_HS_MADDR__IC_HS_MADDR_MASK
  31557. CKSVII2C_IC_HS_MADDR__IC_HS_MADDR__SHIFT
  31558. CKSVII2C_IC_HS_SCL_HCNT__IC_HS_SCL_HCNT_MASK
  31559. CKSVII2C_IC_HS_SCL_HCNT__IC_HS_SCL_HCNT__SHIFT
  31560. CKSVII2C_IC_HS_SCL_LCNT__IC_HS_SCL_LCNT_MASK
  31561. CKSVII2C_IC_HS_SCL_LCNT__IC_HS_SCL_LCNT__SHIFT
  31562. CKSVII2C_IC_HS_SPKLEN__HS_SPKLEN_MASK
  31563. CKSVII2C_IC_HS_SPKLEN__HS_SPKLEN__SHIFT
  31564. CKSVII2C_IC_INTR_MASK__M_ACTIVITY_MASK
  31565. CKSVII2C_IC_INTR_MASK__M_ACTIVITY__SHIFT
  31566. CKSVII2C_IC_INTR_MASK__M_GEN_CALL_MASK
  31567. CKSVII2C_IC_INTR_MASK__M_GEN_CALL__SHIFT
  31568. CKSVII2C_IC_INTR_MASK__M_MST_ON_HOLD_MASK
  31569. CKSVII2C_IC_INTR_MASK__M_MST_ON_HOLD__SHIFT
  31570. CKSVII2C_IC_INTR_MASK__M_RD_REQ_MASK
  31571. CKSVII2C_IC_INTR_MASK__M_RD_REQ__SHIFT
  31572. CKSVII2C_IC_INTR_MASK__M_RESTART_DET_MASK
  31573. CKSVII2C_IC_INTR_MASK__M_RESTART_DET__SHIFT
  31574. CKSVII2C_IC_INTR_MASK__M_RX_DONE_MASK
  31575. CKSVII2C_IC_INTR_MASK__M_RX_DONE__SHIFT
  31576. CKSVII2C_IC_INTR_MASK__M_RX_FULL_MASK
  31577. CKSVII2C_IC_INTR_MASK__M_RX_FULL__SHIFT
  31578. CKSVII2C_IC_INTR_MASK__M_RX_OVER_MASK
  31579. CKSVII2C_IC_INTR_MASK__M_RX_OVER__SHIFT
  31580. CKSVII2C_IC_INTR_MASK__M_RX_UNDER_MASK
  31581. CKSVII2C_IC_INTR_MASK__M_RX_UNDER__SHIFT
  31582. CKSVII2C_IC_INTR_MASK__M_START_DET_MASK
  31583. CKSVII2C_IC_INTR_MASK__M_START_DET__SHIFT
  31584. CKSVII2C_IC_INTR_MASK__M_STOP_DET_MASK
  31585. CKSVII2C_IC_INTR_MASK__M_STOP_DET__SHIFT
  31586. CKSVII2C_IC_INTR_MASK__M_TX_ABRT_MASK
  31587. CKSVII2C_IC_INTR_MASK__M_TX_ABRT__SHIFT
  31588. CKSVII2C_IC_INTR_MASK__M_TX_EMPTY_MASK
  31589. CKSVII2C_IC_INTR_MASK__M_TX_EMPTY__SHIFT
  31590. CKSVII2C_IC_INTR_MASK__M_TX_OVER_MASK
  31591. CKSVII2C_IC_INTR_MASK__M_TX_OVER__SHIFT
  31592. CKSVII2C_IC_INTR_STAT__R_ACTIVITY_MASK
  31593. CKSVII2C_IC_INTR_STAT__R_ACTIVITY__SHIFT
  31594. CKSVII2C_IC_INTR_STAT__R_GEN_CALL_MASK
  31595. CKSVII2C_IC_INTR_STAT__R_GEN_CALL__SHIFT
  31596. CKSVII2C_IC_INTR_STAT__R_MST_ON_HOLD_MASK
  31597. CKSVII2C_IC_INTR_STAT__R_MST_ON_HOLD__SHIFT
  31598. CKSVII2C_IC_INTR_STAT__R_RD_REQ_MASK
  31599. CKSVII2C_IC_INTR_STAT__R_RD_REQ__SHIFT
  31600. CKSVII2C_IC_INTR_STAT__R_RESTART_DET_MASK
  31601. CKSVII2C_IC_INTR_STAT__R_RESTART_DET__SHIFT
  31602. CKSVII2C_IC_INTR_STAT__R_RX_DONE_MASK
  31603. CKSVII2C_IC_INTR_STAT__R_RX_DONE__SHIFT
  31604. CKSVII2C_IC_INTR_STAT__R_RX_FULL_MASK
  31605. CKSVII2C_IC_INTR_STAT__R_RX_FULL__SHIFT
  31606. CKSVII2C_IC_INTR_STAT__R_RX_OVER_MASK
  31607. CKSVII2C_IC_INTR_STAT__R_RX_OVER__SHIFT
  31608. CKSVII2C_IC_INTR_STAT__R_RX_UNDER_MASK
  31609. CKSVII2C_IC_INTR_STAT__R_RX_UNDER__SHIFT
  31610. CKSVII2C_IC_INTR_STAT__R_START_DET_MASK
  31611. CKSVII2C_IC_INTR_STAT__R_START_DET__SHIFT
  31612. CKSVII2C_IC_INTR_STAT__R_STOP_DET_MASK
  31613. CKSVII2C_IC_INTR_STAT__R_STOP_DET__SHIFT
  31614. CKSVII2C_IC_INTR_STAT__R_TX_ABRT_MASK
  31615. CKSVII2C_IC_INTR_STAT__R_TX_ABRT__SHIFT
  31616. CKSVII2C_IC_INTR_STAT__R_TX_EMPTY_MASK
  31617. CKSVII2C_IC_INTR_STAT__R_TX_EMPTY__SHIFT
  31618. CKSVII2C_IC_INTR_STAT__R_TX_OVER_MASK
  31619. CKSVII2C_IC_INTR_STAT__R_TX_OVER__SHIFT
  31620. CKSVII2C_IC_RAW_INTR_STAT__R_ACTIVITY_MASK
  31621. CKSVII2C_IC_RAW_INTR_STAT__R_ACTIVITY__SHIFT
  31622. CKSVII2C_IC_RAW_INTR_STAT__R_GEN_CALL_MASK
  31623. CKSVII2C_IC_RAW_INTR_STAT__R_GEN_CALL__SHIFT
  31624. CKSVII2C_IC_RAW_INTR_STAT__R_MST_ON_HOLD_MASK
  31625. CKSVII2C_IC_RAW_INTR_STAT__R_MST_ON_HOLD__SHIFT
  31626. CKSVII2C_IC_RAW_INTR_STAT__R_RD_REQ_MASK
  31627. CKSVII2C_IC_RAW_INTR_STAT__R_RD_REQ__SHIFT
  31628. CKSVII2C_IC_RAW_INTR_STAT__R_RESTART_DET_MASK
  31629. CKSVII2C_IC_RAW_INTR_STAT__R_RESTART_DET__SHIFT
  31630. CKSVII2C_IC_RAW_INTR_STAT__R_RX_DONE_MASK
  31631. CKSVII2C_IC_RAW_INTR_STAT__R_RX_DONE__SHIFT
  31632. CKSVII2C_IC_RAW_INTR_STAT__R_RX_FULL_MASK
  31633. CKSVII2C_IC_RAW_INTR_STAT__R_RX_FULL__SHIFT
  31634. CKSVII2C_IC_RAW_INTR_STAT__R_RX_OVER_MASK
  31635. CKSVII2C_IC_RAW_INTR_STAT__R_RX_OVER__SHIFT
  31636. CKSVII2C_IC_RAW_INTR_STAT__R_RX_UNDER_MASK
  31637. CKSVII2C_IC_RAW_INTR_STAT__R_RX_UNDER__SHIFT
  31638. CKSVII2C_IC_RAW_INTR_STAT__R_START_DET_MASK
  31639. CKSVII2C_IC_RAW_INTR_STAT__R_START_DET__SHIFT
  31640. CKSVII2C_IC_RAW_INTR_STAT__R_STOP_DET_MASK
  31641. CKSVII2C_IC_RAW_INTR_STAT__R_STOP_DET__SHIFT
  31642. CKSVII2C_IC_RAW_INTR_STAT__R_TX_ABRT_MASK
  31643. CKSVII2C_IC_RAW_INTR_STAT__R_TX_ABRT__SHIFT
  31644. CKSVII2C_IC_RAW_INTR_STAT__R_TX_EMPTY_MASK
  31645. CKSVII2C_IC_RAW_INTR_STAT__R_TX_OVER_MASK
  31646. CKSVII2C_IC_RAW_INTR_STAT__R_TX_OVER__SHIFT
  31647. CKSVII2C_IC_SAR__IC_SAR_MASK
  31648. CKSVII2C_IC_SAR__IC_SAR__SHIFT
  31649. CKSVII2C_IC_SDA_HOLD__IC_SDA_HOLD_MASK
  31650. CKSVII2C_IC_SDA_HOLD__IC_SDA_HOLD__SHIFT
  31651. CKSVII2C_IC_SDA_SETUP__SDA_SETUP_MASK
  31652. CKSVII2C_IC_SDA_SETUP__SDA_SETUP__SHIFT
  31653. CKSVII2C_IC_SS_SCL_HCNT__IC_SS_SCL_HCNT_MASK
  31654. CKSVII2C_IC_SS_SCL_HCNT__IC_SS_SCL_HCNT__SHIFT
  31655. CKSVII2C_IC_SS_SCL_LCNT__IC_SS_SCL_LCNT_MASK
  31656. CKSVII2C_IC_SS_SCL_LCNT__IC_SS_SCL_LCNT__SHIFT
  31657. CKSVII2C_IC_STATUS__ACTIVITY_MASK
  31658. CKSVII2C_IC_STATUS__ACTIVITY__SHIFT
  31659. CKSVII2C_IC_STATUS__MST_ACTIVITY_MASK
  31660. CKSVII2C_IC_STATUS__MST_ACTIVITY__SHIFT
  31661. CKSVII2C_IC_STATUS__RFF_MASK
  31662. CKSVII2C_IC_STATUS__RFF__SHIFT
  31663. CKSVII2C_IC_STATUS__RFNE_MASK
  31664. CKSVII2C_IC_STATUS__RFNE__SHIFT
  31665. CKSVII2C_IC_STATUS__SLV_ACTIVITY_MASK
  31666. CKSVII2C_IC_STATUS__SLV_ACTIVITY__SHIFT
  31667. CKSVII2C_IC_STATUS__TFE_MASK
  31668. CKSVII2C_IC_STATUS__TFE__SHIFT
  31669. CKSVII2C_IC_STATUS__TFNF_MASK
  31670. CKSVII2C_IC_STATUS__TFNF__SHIFT
  31671. CKSVII2C_IC_TAR__GC_OR_START_MASK
  31672. CKSVII2C_IC_TAR__GC_OR_START__SHIFT
  31673. CKSVII2C_IC_TAR__IC_10BITADDR_MASTER_MASK
  31674. CKSVII2C_IC_TAR__IC_10BITADDR_MASTER__SHIFT
  31675. CKSVII2C_IC_TAR__IC_TAR_MASK
  31676. CKSVII2C_IC_TAR__IC_TAR__SHIFT
  31677. CKSVII2C_IC_TAR__SPECIAL_MASK
  31678. CKSVII2C_IC_TAR__SPECIAL__SHIFT
  31679. CKSVII2C_IC_TX_ABRT_SOURCE__ABRT_10ADDR1_NOACK_MASK
  31680. CKSVII2C_IC_TX_ABRT_SOURCE__ABRT_10ADDR1_NOACK__SHIFT
  31681. CKSVII2C_IC_TX_ABRT_SOURCE__ABRT_10ADDR2_NOACK_MASK
  31682. CKSVII2C_IC_TX_ABRT_SOURCE__ABRT_10ADDR2_NOACK__SHIFT
  31683. CKSVII2C_IC_TX_ABRT_SOURCE__ABRT_7B_ADDR_NOACK_MASK
  31684. CKSVII2C_IC_TX_ABRT_SOURCE__ABRT_7B_ADDR_NOACK__SHIFT
  31685. CKSVII2C_IC_TX_ABRT_SOURCE__ABRT_TXDATA_NOACK_MASK
  31686. CKSVII2C_IC_TX_ABRT_SOURCE__ABRT_TXDATA_NOACK__SHIFT
  31687. CKSVII2C_IC__RAW_INTR_STAT__R_TX_EMPTY__SHIFT
  31688. CKS_3BIT
  31689. CKS_4BIT
  31690. CKS_LOOKUPTable_MAX_ENTRIES
  31691. CKUSEG
  31692. CK_1510
  31693. CK_16XX
  31694. CK_1710
  31695. CK_310
  31696. CK_7XX
  31697. CK_AXI
  31698. CK_CG_EN_MON_MASK
  31699. CK_CG_EN_MON_MASK_SFT
  31700. CK_CG_EN_MON_SFT
  31701. CK_CSI
  31702. CK_DBG
  31703. CK_DISABLE
  31704. CK_DISABLECORE_CPU_0__CK_DISABLECORE_MASK
  31705. CK_DISABLECORE_CPU_0__CK_DISABLECORE__SHIFT
  31706. CK_DISABLECORE_CPU_1__CK_DISABLECORE_MASK
  31707. CK_DISABLECORE_CPU_1__CK_DISABLECORE__SHIFT
  31708. CK_DSI_PHY
  31709. CK_ENABLEF
  31710. CK_GLOBAL_ALPHA
  31711. CK_HSE
  31712. CK_HSE_DIV2
  31713. CK_HSI
  31714. CK_IDLEF
  31715. CK_INTC_DUAL_BASE
  31716. CK_INTC_ICR
  31717. CK_INTC_NEN31_00
  31718. CK_INTC_NEN63_32
  31719. CK_INTC_PEN31_00
  31720. CK_INTC_PEN63_32
  31721. CK_INTC_SOURCE
  31722. CK_JTCOOLRESET_LATCHED_CPU_0__CK_JTCOOLRESET_LATCHED_MASK
  31723. CK_JTCOOLRESET_LATCHED_CPU_0__CK_JTCOOLRESET_LATCHED__SHIFT
  31724. CK_JTCOOLRESET_LATCHED_CPU_1__CK_JTCOOLRESET_LATCHED_MASK
  31725. CK_JTCOOLRESET_LATCHED_CPU_1__CK_JTCOOLRESET_LATCHED__SHIFT
  31726. CK_LSE
  31727. CK_LSI
  31728. CK_MCO1
  31729. CK_MCO2
  31730. CK_MCU
  31731. CK_MPU
  31732. CK_PER
  31733. CK_PIXEL_ALPHA
  31734. CK_POL
  31735. CK_RATEF
  31736. CK_SELECTF
  31737. CK_TRACE
  31738. CL
  31739. CL22_RD_OVER_CL45
  31740. CL22_WR_OVER_CL45
  31741. CLAIM_ER
  31742. CLAIM_ER_CLR
  31743. CLAIM_ER_CTR_MASK
  31744. CLAIM_ER_OVERFLOW
  31745. CLAIM_FRAME_OFF
  31746. CLAMP
  31747. CLAMPCFG
  31748. CLAMPCHECK
  31749. CLAMPING_FULL_RANGE
  31750. CLAMPING_LIMITED_RANGE_10BPC
  31751. CLAMPING_LIMITED_RANGE_12BPC
  31752. CLAMPING_LIMITED_RANGE_8BPC
  31753. CLAMPING_LIMITED_RANGE_PROGRAMMABLE
  31754. CLAMPSR
  31755. CLAMPWR
  31756. CLAMP_BEFORE_BLEND
  31757. CLAMP_EN
  31758. CLAMP_IO
  31759. CLAMP_N_EN
  31760. CLAMP_ON
  31761. CLAMSHELL_KEY
  31762. CLANG_BPF_CMD_DEFAULT_TEMPLATE
  31763. CLARIION_BUFFER_SIZE
  31764. CLARIION_HONOR_RESERVATIONS
  31765. CLARIION_LUN_BOUND
  31766. CLARIION_LUN_OWNED
  31767. CLARIION_LUN_UNBOUND
  31768. CLARIION_LUN_UNINITIALIZED
  31769. CLARIION_NAME
  31770. CLARIION_RETRIES
  31771. CLARIION_SHORT_TRESPASS
  31772. CLARIION_SP_A
  31773. CLARIION_SP_B
  31774. CLARIION_TIMEOUT
  31775. CLARIION_TRESPASS_PAGE
  31776. CLARIION_UNBOUND_LU
  31777. CLASS0_DMA_ALIGNMENT_INTR
  31778. CLASS0_ENABLE_DMA_ALIGNMENT_INTR
  31779. CLASS0_ENABLE_INVALID_DMA_COMMAND_INTR
  31780. CLASS0_ENABLE_MFC_FIR_INTR
  31781. CLASS0_ENABLE_SPU_ERROR_INTR
  31782. CLASS0_INTR_MASK
  31783. CLASS0_INVALID_DMA_COMMAND_INTR
  31784. CLASS0_SPU_ERROR_INTR
  31785. CLASS1_ENABLE_LS_COMPARE_SUSPEND_ON_GET_INTR
  31786. CLASS1_ENABLE_LS_COMPARE_SUSPEND_ON_PUT_INTR
  31787. CLASS1_ENABLE_SEGMENT_FAULT_INTR
  31788. CLASS1_ENABLE_STORAGE_FAULT_INTR
  31789. CLASS1_INTR_MASK
  31790. CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR
  31791. CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR
  31792. CLASS1_SEGMENT_FAULT_INTR
  31793. CLASS1_STORAGE_FAULT_INTR
  31794. CLASS2_ENABLE_MAILBOX_INTR
  31795. CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR
  31796. CLASS2_ENABLE_SPU_DMA_TAG_GROUP_COMPLETE_INTR
  31797. CLASS2_ENABLE_SPU_HALT_INTR
  31798. CLASS2_ENABLE_SPU_STOP_INTR
  31799. CLASS2_INTR_MASK
  31800. CLASS2_MAILBOX_INTR
  31801. CLASS2_MAILBOX_THRESHOLD_INTR
  31802. CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR
  31803. CLASS2_SPU_HALT_INTR
  31804. CLASS2_SPU_STOP_INTR
  31805. CLASSD_CR
  31806. CLASSD_CR_RESET
  31807. CLASSD_CTRL
  31808. CLASSD_GCLK_RATE_11M2896_MPY_8
  31809. CLASSD_GCLK_RATE_12M288_MPY_8
  31810. CLASSD_IDR
  31811. CLASSD_IER
  31812. CLASSD_IMR
  31813. CLASSD_INTPMR
  31814. CLASSD_INTPMR_ATTL_MASK
  31815. CLASSD_INTPMR_ATTL_SHIFT
  31816. CLASSD_INTPMR_ATTR_MASK
  31817. CLASSD_INTPMR_ATTR_SHIFT
  31818. CLASSD_INTPMR_DEEMP_DIS
  31819. CLASSD_INTPMR_DEEMP_EN
  31820. CLASSD_INTPMR_DEEMP_MASK
  31821. CLASSD_INTPMR_DEEMP_SHIFT
  31822. CLASSD_INTPMR_DSP_CLK_FREQ_11M2896
  31823. CLASSD_INTPMR_DSP_CLK_FREQ_12M288
  31824. CLASSD_INTPMR_DSP_CLK_FREQ_MASK
  31825. CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT
  31826. CLASSD_INTPMR_EQCFG_B_BOOST_12
  31827. CLASSD_INTPMR_EQCFG_B_BOOST_6
  31828. CLASSD_INTPMR_EQCFG_B_CUT_12
  31829. CLASSD_INTPMR_EQCFG_B_CUT_6
  31830. CLASSD_INTPMR_EQCFG_FLAT
  31831. CLASSD_INTPMR_EQCFG_M_BOOST_3
  31832. CLASSD_INTPMR_EQCFG_M_BOOST_8
  31833. CLASSD_INTPMR_EQCFG_M_CUT_3
  31834. CLASSD_INTPMR_EQCFG_M_CUT_8
  31835. CLASSD_INTPMR_EQCFG_SHIFT
  31836. CLASSD_INTPMR_EQCFG_T_BOOST_12
  31837. CLASSD_INTPMR_EQCFG_T_BOOST_6
  31838. CLASSD_INTPMR_EQCFG_T_CUT_12
  31839. CLASSD_INTPMR_EQCFG_T_CUT_6
  31840. CLASSD_INTPMR_FRAME_16K
  31841. CLASSD_INTPMR_FRAME_22K
  31842. CLASSD_INTPMR_FRAME_32K
  31843. CLASSD_INTPMR_FRAME_44K
  31844. CLASSD_INTPMR_FRAME_48K
  31845. CLASSD_INTPMR_FRAME_88K
  31846. CLASSD_INTPMR_FRAME_8K
  31847. CLASSD_INTPMR_FRAME_96K
  31848. CLASSD_INTPMR_FRAME_MASK
  31849. CLASSD_INTPMR_FRAME_SHIFT
  31850. CLASSD_INTPMR_MONO_DIS
  31851. CLASSD_INTPMR_MONO_EN
  31852. CLASSD_INTPMR_MONO_MASK
  31853. CLASSD_INTPMR_MONO_MODE_LEFT
  31854. CLASSD_INTPMR_MONO_MODE_MASK
  31855. CLASSD_INTPMR_MONO_MODE_MIX
  31856. CLASSD_INTPMR_MONO_MODE_RIGHT
  31857. CLASSD_INTPMR_MONO_MODE_SAT
  31858. CLASSD_INTPMR_MONO_MODE_SHIFT
  31859. CLASSD_INTPMR_MONO_SHIFT
  31860. CLASSD_INTPMR_SWAP_LEFT_ON_LSB
  31861. CLASSD_INTPMR_SWAP_MASK
  31862. CLASSD_INTPMR_SWAP_RIGHT_ON_LSB
  31863. CLASSD_INTPMR_SWAP_SHIFT
  31864. CLASSD_INTSR
  31865. CLASSD_ISR
  31866. CLASSD_MR
  31867. CLASSD_MR_LEN_DIS
  31868. CLASSD_MR_LEN_EN
  31869. CLASSD_MR_LEN_MASK
  31870. CLASSD_MR_LEN_SHIFT
  31871. CLASSD_MR_LMUTE_DIS
  31872. CLASSD_MR_LMUTE_EN
  31873. CLASSD_MR_LMUTE_MASK
  31874. CLASSD_MR_LMUTE_SHIFT
  31875. CLASSD_MR_NON_OVERLAP_DIS
  31876. CLASSD_MR_NON_OVERLAP_EN
  31877. CLASSD_MR_NON_OVERLAP_MASK
  31878. CLASSD_MR_NON_OVERLAP_SHIFT
  31879. CLASSD_MR_NOVR_VAL_10NS
  31880. CLASSD_MR_NOVR_VAL_15NS
  31881. CLASSD_MR_NOVR_VAL_20NS
  31882. CLASSD_MR_NOVR_VAL_5NS
  31883. CLASSD_MR_NOVR_VAL_MASK
  31884. CLASSD_MR_NOVR_VAL_SHIFT
  31885. CLASSD_MR_PWMTYP_DIFF
  31886. CLASSD_MR_PWMTYP_MASK
  31887. CLASSD_MR_PWMTYP_SHIFT
  31888. CLASSD_MR_PWMTYP_SINGLE
  31889. CLASSD_MR_REN_DIS
  31890. CLASSD_MR_REN_EN
  31891. CLASSD_MR_REN_MASK
  31892. CLASSD_MR_REN_SHIFT
  31893. CLASSD_MR_RMUTE_DIS
  31894. CLASSD_MR_RMUTE_EN
  31895. CLASSD_MR_RMUTE_MASK
  31896. CLASSD_MR_RMUTE_SHIFT
  31897. CLASSD_THR
  31898. CLASSD_WPMR
  31899. CLASSHASH_BITS
  31900. CLASSHASH_SIZE
  31901. CLASSIC
  31902. CLASSIC_BASE_MASK
  31903. CLASSIC_BASE_SHIFT
  31904. CLASSIFICATION_HANDLE_PKTINFO
  31905. CLASSIFY_RULES_COUNT
  31906. CLASSIFY_RULE_ADD
  31907. CLASSIFY_RULE_OPCODE_IMAC_VNI
  31908. CLASSIFY_RULE_OPCODE_MAC
  31909. CLASSIFY_RULE_OPCODE_PAIR
  31910. CLASSIFY_RULE_OPCODE_VLAN
  31911. CLASSIFY_RULE_REMOVE
  31912. CLASSPORTINFO_REC_FIELD
  31913. CLASSREG
  31914. CLASS_1
  31915. CLASS_2
  31916. CLASS_ADMIN_PROP
  31917. CLASS_ALMOST_EMPTY
  31918. CLASS_ALMOST_FULL
  31919. CLASS_ATTR_RO
  31920. CLASS_ATTR_RW
  31921. CLASS_ATTR_STRING
  31922. CLASS_ATTR_WO
  31923. CLASS_BITS
  31924. CLASS_BOTH
  31925. CLASS_CODE_AH_ESP_IPV4
  31926. CLASS_CODE_AH_ESP_IPV6
  31927. CLASS_CODE_ARP
  31928. CLASS_CODE_DUMMY1
  31929. CLASS_CODE_DUMMY10
  31930. CLASS_CODE_DUMMY11
  31931. CLASS_CODE_DUMMY12
  31932. CLASS_CODE_DUMMY13
  31933. CLASS_CODE_DUMMY14
  31934. CLASS_CODE_DUMMY15
  31935. CLASS_CODE_DUMMY2
  31936. CLASS_CODE_DUMMY3
  31937. CLASS_CODE_DUMMY4
  31938. CLASS_CODE_DUMMY5
  31939. CLASS_CODE_DUMMY6
  31940. CLASS_CODE_DUMMY7
  31941. CLASS_CODE_DUMMY8
  31942. CLASS_CODE_DUMMY9
  31943. CLASS_CODE_ETHERTYPE1
  31944. CLASS_CODE_ETHERTYPE2
  31945. CLASS_CODE_RARP
  31946. CLASS_CODE_SCTP_IPV4
  31947. CLASS_CODE_SCTP_IPV6
  31948. CLASS_CODE_SHIFT
  31949. CLASS_CODE_TCP_IPV4
  31950. CLASS_CODE_TCP_IPV6
  31951. CLASS_CODE_UDP_IPV4
  31952. CLASS_CODE_UDP_IPV6
  31953. CLASS_CODE_UNRECOG
  31954. CLASS_CODE_USER_PROG1
  31955. CLASS_CODE_USER_PROG2
  31956. CLASS_CODE_USER_PROG3
  31957. CLASS_CODE_USER_PROG4
  31958. CLASS_DEFAULT
  31959. CLASS_EMPTY
  31960. CLASS_FLASH_INTERFACE
  31961. CLASS_FULL
  31962. CLASS_INFO
  31963. CLASS_KBD_BACKLIGHT
  31964. CLASS_MASK
  31965. CLASS_NAME
  31966. CLASS_NONE
  31967. CLASS_RX_1TX
  31968. CLASS_RX_2TX
  31969. CLASS_RX_FULL_INT_BIT
  31970. CLASS_RX_FULL_INT_BITS
  31971. CLASS_RX_INT_BIT
  31972. CLASS_RX_ONLY
  31973. CLASS_SHIFT
  31974. CLASS_TOKEN_READ
  31975. CLASS_TOKEN_WRITE
  31976. CLASTADDR
  31977. CLAUSE_SEQ_PRIO
  31978. CLBR_ANY
  31979. CLBR_ARG_REGS
  31980. CLBR_CALLEE_SAVE
  31981. CLBR_EAX
  31982. CLBR_ECX
  31983. CLBR_EDI
  31984. CLBR_EDX
  31985. CLBR_NONE
  31986. CLBR_R10
  31987. CLBR_R11
  31988. CLBR_R8
  31989. CLBR_R9
  31990. CLBR_RAX
  31991. CLBR_RCX
  31992. CLBR_RDI
  31993. CLBR_RDX
  31994. CLBR_RET_REG
  31995. CLBR_RSI
  31996. CLBR_SCRATCH
  31997. CLCD_AND_ARM_TRACE_REG4_MASK
  31998. CLCD_AND_ARM_TRACE_REG5_MASK
  31999. CLCD_AND_ARM_TRACE_REG6_MASK
  32000. CLCD_CAP_444
  32001. CLCD_CAP_5551
  32002. CLCD_CAP_565
  32003. CLCD_CAP_888
  32004. CLCD_CAP_ALL
  32005. CLCD_CAP_BGR
  32006. CLCD_CAP_BGR444
  32007. CLCD_CAP_BGR5551
  32008. CLCD_CAP_BGR565
  32009. CLCD_CAP_BGR888
  32010. CLCD_CAP_RGB
  32011. CLCD_CAP_RGB444
  32012. CLCD_CAP_RGB5551
  32013. CLCD_CAP_RGB565
  32014. CLCD_CAP_RGB888
  32015. CLCD_CLK_ENB
  32016. CLCD_CLK_MASK
  32017. CLCD_CLK_SHIFT
  32018. CLCD_CLK_SYNT
  32019. CLCD_IRQ_NEXTBASE_UPDATE
  32020. CLCD_LBAS
  32021. CLCD_PALETTE
  32022. CLCD_PALL
  32023. CLCD_PL110_CNTL
  32024. CLCD_PL110_IENB
  32025. CLCD_PL110_INTR
  32026. CLCD_PL110_LCUR
  32027. CLCD_PL110_STAT
  32028. CLCD_PL110_UCUR
  32029. CLCD_PL111_CNTL
  32030. CLCD_PL111_ICR
  32031. CLCD_PL111_IENB
  32032. CLCD_PL111_LCUR
  32033. CLCD_PL111_MIS
  32034. CLCD_PL111_RIS
  32035. CLCD_PL111_UCUR
  32036. CLCD_REG4_MASK
  32037. CLCD_TIM0
  32038. CLCD_TIM1
  32039. CLCD_TIM2
  32040. CLCD_TIM3
  32041. CLCD_UBAS
  32042. CLCNTL1
  32043. CLC_CONTRAST_MASK
  32044. CLC_CONTRAST_ONOFF
  32045. CLC_DISABLE
  32046. CLC_REG
  32047. CLC_RMC
  32048. CLC_SUSPEND
  32049. CLC_WAIT_TIME
  32050. CLC_WAIT_TIME_SHORT
  32051. CLD
  32052. CLDCOFST
  32053. CLDCTRL3_AZ_DISAMP
  32054. CLDCTRL3_BP_CABLE1TH_DET_GT
  32055. CLDCTRL6_CAB_LEN_MASK
  32056. CLDCTRL6_CAB_LEN_SHIFT
  32057. CLDCTRL6_CAB_LEN_SHORT
  32058. CLD_CONTINUED
  32059. CLD_DUMPED
  32060. CLD_EXITED
  32061. CLD_KILLED
  32062. CLD_STOPPED
  32063. CLD_TRAPPED
  32064. CLD_UPCALL_VERSION
  32065. CLE266_FUNCTION3
  32066. CLE266_LCD_HOR_SCF_FORMULA
  32067. CLE266_LCD_VER_SCF_FORMULA
  32068. CLE266_POWER_SEQ_FORMULA
  32069. CLE266_POWER_SEQ_UNIT
  32070. CLE266_REVISION_AX
  32071. CLE266_REVISION_CX
  32072. CLEANCACHE_KEY_MAX
  32073. CLEANCACHE_NO_BACKEND
  32074. CLEANCACHE_NO_BACKEND_SHARED
  32075. CLEANCACHE_NO_POOL
  32076. CLEANRX
  32077. CLEANUP_NOT_REQUIRED
  32078. CLEANUP_PERIOD
  32079. CLEANUP_PREFIX_RT_DEL
  32080. CLEANUP_PREFIX_RT_EXPIRE
  32081. CLEANUP_PREFIX_RT_NOP
  32082. CLEANUP_RECV
  32083. CLEANUP_WAIT
  32084. CLEANUP_WAIT_FAILED
  32085. CLEAN_ADDR
  32086. CLEAN_BLOCK_THRESHOLD
  32087. CLEAN_ELEMS
  32088. CLEAN_SHUTDOWN
  32089. CLEAN_SPU_IRQ_ISR
  32090. CLEAN_SPU_IRQ_ISR_MASK
  32091. CLEAN_TARGET
  32092. CLEAN_UP_AND_EXIT
  32093. CLEAN_WINDOW
  32094. CLEAR
  32095. CLEAR0
  32096. CLEAR1
  32097. CLEARCACHE
  32098. CLEARPACKET
  32099. CLEARPAGEFLAG
  32100. CLEARPAGEFLAG_NOOP
  32101. CLEARSTATE_DEFS_H
  32102. CLEAR_ACA
  32103. CLEAR_ACK_ERROR_CODE
  32104. CLEAR_AFTER_FIELD
  32105. CLEAR_ALL
  32106. CLEAR_ALL_HFB
  32107. CLEAR_ALL_INTERRUPTS
  32108. CLEAR_ALL_MULTICAST
  32109. CLEAR_ARRAY
  32110. CLEAR_ATOM_S0_LCD1
  32111. CLEAR_ATOM_S6_ACC_MODE
  32112. CLEAR_ATOM_S6_CRITICAL_STATE
  32113. CLEAR_ATOM_S6_DOCK_STATE
  32114. CLEAR_ATOM_S6_LID_STATE
  32115. CLEAR_ATOM_S6_REQ_SCALER
  32116. CLEAR_ATOM_S6_REQ_SCALER_ARATIO
  32117. CLEAR_ATOM_S7_DOS_8BIT_DAC_EN
  32118. CLEAR_BASE_CHAIN_BIT
  32119. CLEAR_BIT
  32120. CLEAR_BITS_FRM_TO
  32121. CLEAR_BITS_FRM_TO_2
  32122. CLEAR_BIT_2
  32123. CLEAR_BSSFILTER_ON_BEACON
  32124. CLEAR_BUF
  32125. CLEAR_CDB_FIFO_POINTER
  32126. CLEAR_CEC_IRQ
  32127. CLEAR_CMD
  32128. CLEAR_COMMAND_POINTER
  32129. CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE
  32130. CLEAR_CSR_ON_READ
  32131. CLEAR_DDB
  32132. CLEAR_DEPTH
  32133. CLEAR_ENABLE
  32134. CLEAR_ENDPOINT_HALT
  32135. CLEAR_ENDPOINT_TOGGLE
  32136. CLEAR_EP_FORCE_CRC_ERROR
  32137. CLEAR_EP_HIDE_STATUS_PHASE
  32138. CLEAR_ERRLOG
  32139. CLEAR_ERRLOG_ENABLE
  32140. CLEAR_ERROR
  32141. CLEAR_EVENT_WAIT_INTERVAL
  32142. CLEAR_EXPIRED
  32143. CLEAR_FLAG
  32144. CLEAR_FLAGS
  32145. CLEAR_GPR
  32146. CLEAR_HALT_CONDITIONS
  32147. CLEAR_HALT_REQUIRED
  32148. CLEAR_HASH
  32149. CLEAR_IDBEN_MICEN_MASK
  32150. CLEAR_INTA
  32151. CLEAR_INTERRUPT_MODE
  32152. CLEAR_INTR
  32153. CLEAR_INTR_MASK
  32154. CLEAR_KEY_COMBINATION_TABLE
  32155. CLEAR_LA_VAR
  32156. CLEAR_LWA_FLAG
  32157. CLEAR_MGMT_PENDING_STATUS
  32158. CLEAR_MGMT_STATUS
  32159. CLEAR_MNT_MARK
  32160. CLEAR_MNT_SHARED
  32161. CLEAR_NAK_OUT_PACKETS
  32162. CLEAR_NAK_OUT_PACKETS_MODE
  32163. CLEAR_NCQ_ERROR
  32164. CLEAR_NEXUS
  32165. CLEAR_NEXUS_POST
  32166. CLEAR_NEXUS_PRE
  32167. CLEAR_PCI_TX_DESC_CONTENT
  32168. CLEAR_PRIMARY_TC
  32169. CLEAR_REFS_ALL
  32170. CLEAR_REFS_ANON
  32171. CLEAR_REFS_LAST
  32172. CLEAR_REFS_MAPPED
  32173. CLEAR_REFS_MM_HIWATER_RSS
  32174. CLEAR_REFS_SOFT_DIRTY
  32175. CLEAR_REG_BIT
  32176. CLEAR_RESET_MASK
  32177. CLEAR_ROP
  32178. CLEAR_SECONDARY_TC
  32179. CLEAR_SMU_INTR
  32180. CLEAR_START
  32181. CLEAR_STATE_ID
  32182. CLEAR_STATIC_RATE_CONTROL_SMASK
  32183. CLEAR_STATIONS_STAT_BITS
  32184. CLEAR_STATISTICS
  32185. CLEAR_STDERR_LOG
  32186. CLEAR_STOP
  32187. CLEAR_STREAM_DETECTED
  32188. CLEAR_SYNTH
  32189. CLEAR_TASK_SET
  32190. CLEAR_WAITED
  32191. CLEAR_WAIT_MAX
  32192. CLEAR_WAIT_MAX_ERRORS
  32193. CLEAR_WIN
  32194. CLEAR_X1
  32195. CLEAR_X2
  32196. CLEAR_Y1
  32197. CLEAR_Y2
  32198. CLEAR_Z_BUFFER
  32199. CLEVO_MAIL_LED_BLINK_0_5HZ
  32200. CLEVO_MAIL_LED_BLINK_1HZ
  32201. CLEVO_MAIL_LED_OFF
  32202. CLE_BPM_SERDES_CMD
  32203. CLE_BR_DATA_LEN
  32204. CLE_BR_DATA_POS
  32205. CLE_BR_JB_LEN
  32206. CLE_BR_JB_POS
  32207. CLE_BR_JR_LEN
  32208. CLE_BR_JR_POS
  32209. CLE_BR_MASK_LEN
  32210. CLE_BR_MASK_POS
  32211. CLE_BR_NBR_LEN
  32212. CLE_BR_NBR_POS
  32213. CLE_BR_NNODE_LEN
  32214. CLE_BR_NNODE_POS
  32215. CLE_BR_NPPTR_LEN
  32216. CLE_BR_NPPTR_POS
  32217. CLE_BR_OP_LEN
  32218. CLE_BR_OP_POS
  32219. CLE_BR_VALID_LEN
  32220. CLE_BR_VALID_POS
  32221. CLE_BYPASS_REG0_0_ADDR
  32222. CLE_BYPASS_REG1_0_ADDR
  32223. CLE_CMD_AVL_ADD
  32224. CLE_CMD_AVL_DEL
  32225. CLE_CMD_AVL_SRCH
  32226. CLE_CMD_RD
  32227. CLE_CMD_TO
  32228. CLE_CMD_WR
  32229. CLE_DN_BSTOR_LEN
  32230. CLE_DN_BSTOR_POS
  32231. CLE_DN_EXT_LEN
  32232. CLE_DN_EXT_POS
  32233. CLE_DN_HLS_LEN
  32234. CLE_DN_HLS_POS
  32235. CLE_DN_LASTN_LEN
  32236. CLE_DN_LASTN_POS
  32237. CLE_DN_RPTR_LEN
  32238. CLE_DN_RPTR_POS
  32239. CLE_DN_SBSTOR_LEN
  32240. CLE_DN_SBSTOR_POS
  32241. CLE_DN_TYPE_LEN
  32242. CLE_DN_TYPE_POS
  32243. CLE_DRAM_REGS
  32244. CLE_DROP_LEN
  32245. CLE_DROP_POS
  32246. CLE_DSTQIDH_LEN
  32247. CLE_DSTQIDH_POS
  32248. CLE_DSTQIDL_LEN
  32249. CLE_DSTQIDL_POS
  32250. CLE_FPSEL_LEN
  32251. CLE_FPSEL_POS
  32252. CLE_KN_PRIO_LEN
  32253. CLE_KN_PRIO_POS
  32254. CLE_KN_RPTR_LEN
  32255. CLE_KN_RPTR_POS
  32256. CLE_NFPSEL_LEN
  32257. CLE_NFPSEL_POS
  32258. CLE_PIN_CTL
  32259. CLE_PKTRAM_SIZE
  32260. CLE_PORT_OFFSET
  32261. CLE_PRIORITY_LEN
  32262. CLE_PRIORITY_POS
  32263. CLE_TYPE_LEN
  32264. CLE_TYPE_POS
  32265. CLF
  32266. CLFE
  32267. CLFE_CODEC_SCB_ADDR
  32268. CLFE_MIXER_SCB_ADDR
  32269. CLFIFO
  32270. CLFLUSH_AFTER
  32271. CLFLUSH_BEFORE
  32272. CLFLUSH_FLAGS
  32273. CLG_4_STATES
  32274. CLG_GILB_ELL
  32275. CLG_RANDOM
  32276. CLHWIN0
  32277. CLHWIN1
  32278. CLHWIN2
  32279. CLI
  32280. CLICK_CFG
  32281. CLICK_DOUBLE_X
  32282. CLICK_DOUBLE_Y
  32283. CLICK_DOUBLE_Z
  32284. CLICK_IA
  32285. CLICK_LATENCY
  32286. CLICK_SINGLE_X
  32287. CLICK_SINGLE_Y
  32288. CLICK_SINGLE_Z
  32289. CLICK_SRC
  32290. CLICK_THSY_X
  32291. CLICK_THSZ
  32292. CLICK_TIMELIMIT
  32293. CLICK_WINDOW
  32294. CLIDR_CTYPE
  32295. CLIDR_CTYPE_MASK
  32296. CLIDR_CTYPE_SHIFT
  32297. CLIDR_LOC
  32298. CLIDR_LOC_SHIFT
  32299. CLIDR_LOUIS
  32300. CLIDR_LOUIS_SHIFT
  32301. CLIDR_LOUU
  32302. CLIDR_LOUU_SHIFT
  32303. CLIEH
  32304. CLIEL
  32305. CLIENT
  32306. CLIENT0_BM__RESERVED_MASK
  32307. CLIENT0_BM__RESERVED__SHIFT
  32308. CLIENT0_CD0__RESERVED_MASK
  32309. CLIENT0_CD0__RESERVED__SHIFT
  32310. CLIENT0_CD1__RESERVED_MASK
  32311. CLIENT0_CD1__RESERVED__SHIFT
  32312. CLIENT0_CD2__RESERVED_MASK
  32313. CLIENT0_CD2__RESERVED__SHIFT
  32314. CLIENT0_CD3__RESERVED_MASK
  32315. CLIENT0_CD3__RESERVED__SHIFT
  32316. CLIENT0_CK0__RESERVED_MASK
  32317. CLIENT0_CK0__RESERVED__SHIFT
  32318. CLIENT0_CK1__RESERVED_MASK
  32319. CLIENT0_CK1__RESERVED__SHIFT
  32320. CLIENT0_CK2__RESERVED_MASK
  32321. CLIENT0_CK2__RESERVED__SHIFT
  32322. CLIENT0_CK3__RESERVED_MASK
  32323. CLIENT0_CK3__RESERVED__SHIFT
  32324. CLIENT0_K0__RESERVED_MASK
  32325. CLIENT0_K0__RESERVED__SHIFT
  32326. CLIENT0_K1__RESERVED_MASK
  32327. CLIENT0_K1__RESERVED__SHIFT
  32328. CLIENT0_K2__RESERVED_MASK
  32329. CLIENT0_K2__RESERVED__SHIFT
  32330. CLIENT0_K3__RESERVED_MASK
  32331. CLIENT0_K3__RESERVED__SHIFT
  32332. CLIENT0_OFFSET_HI__RESERVED_MASK
  32333. CLIENT0_OFFSET_HI__RESERVED__SHIFT
  32334. CLIENT0_OFFSET__RESERVED_MASK
  32335. CLIENT0_OFFSET__RESERVED__SHIFT
  32336. CLIENT0_STATUS__RESERVED_MASK
  32337. CLIENT0_STATUS__RESERVED__SHIFT
  32338. CLIENT1_BM__RESERVED_MASK
  32339. CLIENT1_BM__RESERVED__SHIFT
  32340. CLIENT1_CD0__RESERVED_MASK
  32341. CLIENT1_CD0__RESERVED__SHIFT
  32342. CLIENT1_CD1__RESERVED_MASK
  32343. CLIENT1_CD1__RESERVED__SHIFT
  32344. CLIENT1_CD2__RESERVED_MASK
  32345. CLIENT1_CD2__RESERVED__SHIFT
  32346. CLIENT1_CD3__RESERVED_MASK
  32347. CLIENT1_CD3__RESERVED__SHIFT
  32348. CLIENT1_CK0__RESERVED_MASK
  32349. CLIENT1_CK0__RESERVED__SHIFT
  32350. CLIENT1_CK1__RESERVED_MASK
  32351. CLIENT1_CK1__RESERVED__SHIFT
  32352. CLIENT1_CK2__RESERVED_MASK
  32353. CLIENT1_CK2__RESERVED__SHIFT
  32354. CLIENT1_CK3__RESERVED_MASK
  32355. CLIENT1_CK3__RESERVED__SHIFT
  32356. CLIENT1_K0__RESERVED_MASK
  32357. CLIENT1_K0__RESERVED__SHIFT
  32358. CLIENT1_K1__RESERVED_MASK
  32359. CLIENT1_K1__RESERVED__SHIFT
  32360. CLIENT1_K2__RESERVED_MASK
  32361. CLIENT1_K2__RESERVED__SHIFT
  32362. CLIENT1_K3__RESERVED_MASK
  32363. CLIENT1_K3__RESERVED__SHIFT
  32364. CLIENT1_OFFSET_HI__RESERVED_MASK
  32365. CLIENT1_OFFSET_HI__RESERVED__SHIFT
  32366. CLIENT1_OFFSET__RESERVED_MASK
  32367. CLIENT1_OFFSET__RESERVED__SHIFT
  32368. CLIENT1_PORT_STATUS__RESERVED_MASK
  32369. CLIENT1_PORT_STATUS__RESERVED__SHIFT
  32370. CLIENT2_BM__RESERVED_MASK
  32371. CLIENT2_BM__RESERVED__SHIFT
  32372. CLIENT2_CD0__RESERVED_MASK
  32373. CLIENT2_CD0__RESERVED__SHIFT
  32374. CLIENT2_CD1__RESERVED_MASK
  32375. CLIENT2_CD1__RESERVED__SHIFT
  32376. CLIENT2_CD2__RESERVED_MASK
  32377. CLIENT2_CD2__RESERVED__SHIFT
  32378. CLIENT2_CD3__RESERVED_MASK
  32379. CLIENT2_CD3__RESERVED__SHIFT
  32380. CLIENT2_CK0__RESERVED_MASK
  32381. CLIENT2_CK0__RESERVED__SHIFT
  32382. CLIENT2_CK1__RESERVED_MASK
  32383. CLIENT2_CK1__RESERVED__SHIFT
  32384. CLIENT2_CK2__RESERVED_MASK
  32385. CLIENT2_CK2__RESERVED__SHIFT
  32386. CLIENT2_CK3__RESERVED_MASK
  32387. CLIENT2_CK3__RESERVED__SHIFT
  32388. CLIENT2_K0__RESERVED_MASK
  32389. CLIENT2_K0__RESERVED__SHIFT
  32390. CLIENT2_K1__RESERVED_MASK
  32391. CLIENT2_K1__RESERVED__SHIFT
  32392. CLIENT2_K2__RESERVED_MASK
  32393. CLIENT2_K2__RESERVED__SHIFT
  32394. CLIENT2_K3__RESERVED_MASK
  32395. CLIENT2_K3__RESERVED__SHIFT
  32396. CLIENT2_OFFSET_HI__RESERVED_MASK
  32397. CLIENT2_OFFSET_HI__RESERVED__SHIFT
  32398. CLIENT2_OFFSET__RESERVED_MASK
  32399. CLIENT2_OFFSET__RESERVED__SHIFT
  32400. CLIENT2_STATUS__RESERVED_MASK
  32401. CLIENT2_STATUS__RESERVED__SHIFT
  32402. CLIENT3_BM__RESERVED_MASK
  32403. CLIENT3_BM__RESERVED__SHIFT
  32404. CLIENT3_CD0__RESERVED_MASK
  32405. CLIENT3_CD0__RESERVED__SHIFT
  32406. CLIENT3_CD1__RESERVED_MASK
  32407. CLIENT3_CD1__RESERVED__SHIFT
  32408. CLIENT3_CD2__RESERVED_MASK
  32409. CLIENT3_CD2__RESERVED__SHIFT
  32410. CLIENT3_CD3__RESERVED_MASK
  32411. CLIENT3_CD3__RESERVED__SHIFT
  32412. CLIENT3_CK0__RESERVED_MASK
  32413. CLIENT3_CK0__RESERVED__SHIFT
  32414. CLIENT3_CK1__RESERVED_MASK
  32415. CLIENT3_CK1__RESERVED__SHIFT
  32416. CLIENT3_CK2__RESERVED_MASK
  32417. CLIENT3_CK2__RESERVED__SHIFT
  32418. CLIENT3_CK3__RESERVED_MASK
  32419. CLIENT3_CK3__RESERVED__SHIFT
  32420. CLIENT3_K0__RESERVED_MASK
  32421. CLIENT3_K0__RESERVED__SHIFT
  32422. CLIENT3_K1__RESERVED_MASK
  32423. CLIENT3_K1__RESERVED__SHIFT
  32424. CLIENT3_K2__RESERVED_MASK
  32425. CLIENT3_K2__RESERVED__SHIFT
  32426. CLIENT3_K3__RESERVED_MASK
  32427. CLIENT3_K3__RESERVED__SHIFT
  32428. CLIENT3_OFFSET_HI__RESERVED_MASK
  32429. CLIENT3_OFFSET_HI__RESERVED__SHIFT
  32430. CLIENT3_OFFSET__RESERVED_MASK
  32431. CLIENT3_OFFSET__RESERVED__SHIFT
  32432. CLIENT3_STATUS__RESERVED_MASK
  32433. CLIENT3_STATUS__RESERVED__SHIFT
  32434. CLIENT4_BM__RESERVED_MASK
  32435. CLIENT4_BM__RESERVED__SHIFT
  32436. CLIENT4_CD0__RESERVED_MASK
  32437. CLIENT4_CD0__RESERVED__SHIFT
  32438. CLIENT4_CD1__RESERVED_MASK
  32439. CLIENT4_CD1__RESERVED__SHIFT
  32440. CLIENT4_CD2__RESERVED_MASK
  32441. CLIENT4_CD2__RESERVED__SHIFT
  32442. CLIENT4_CD3__RESERVED_MASK
  32443. CLIENT4_CD3__RESERVED__SHIFT
  32444. CLIENT4_CK0__RESERVED_MASK
  32445. CLIENT4_CK0__RESERVED__SHIFT
  32446. CLIENT4_CK1__RESERVED_MASK
  32447. CLIENT4_CK1__RESERVED__SHIFT
  32448. CLIENT4_CK2__RESERVED_MASK
  32449. CLIENT4_CK2__RESERVED__SHIFT
  32450. CLIENT4_CK3__RESERVED_MASK
  32451. CLIENT4_CK3__RESERVED__SHIFT
  32452. CLIENT4_K0__RESERVED_MASK
  32453. CLIENT4_K0__RESERVED__SHIFT
  32454. CLIENT4_K1__RESERVED_MASK
  32455. CLIENT4_K1__RESERVED__SHIFT
  32456. CLIENT4_K2__RESERVED_MASK
  32457. CLIENT4_K2__RESERVED__SHIFT
  32458. CLIENT4_K3__RESERVED_MASK
  32459. CLIENT4_K3__RESERVED__SHIFT
  32460. CLIENT4_OFFSET_HI__RESERVED_MASK
  32461. CLIENT4_OFFSET_HI__RESERVED__SHIFT
  32462. CLIENT4_OFFSET__RESERVED_MASK
  32463. CLIENT4_OFFSET__RESERVED__SHIFT
  32464. CLIENT4_STATUS__RESERVED_MASK
  32465. CLIENT4_STATUS__RESERVED__SHIFT
  32466. CLIENTPD
  32467. CLIENTPD_MASK
  32468. CLIENTPD_SHIFT
  32469. CLIENT_2D
  32470. CLIENT_ALLOWED
  32471. CLIENT_CG_REQ
  32472. CLIENT_CG_REQ_MASK
  32473. CLIENT_CG_REQ_SHIFT
  32474. CLIENT_CG_RESP
  32475. CLIENT_CG_RESP_MASK
  32476. CLIENT_CG_RESP_SHIFT
  32477. CLIENT_CONNECT_REQ_CMD
  32478. CLIENT_CONNECT_RES_CMD
  32479. CLIENT_DATA_REGISTERED
  32480. CLIENT_DISCONNECT_REQ_CMD
  32481. CLIENT_DISCONNECT_RES_CMD
  32482. CLIENT_ENABLED
  32483. CLIENT_FAILED
  32484. CLIENT_HASH_BITS
  32485. CLIENT_HASH_MASK
  32486. CLIENT_HASH_SIZE
  32487. CLIENT_INIT_RX_DATA_ACCEPT_ANY_VLAN
  32488. CLIENT_INIT_RX_DATA_ACCEPT_ANY_VLAN_SHIFT
  32489. CLIENT_INIT_RX_DATA_BCAST_ACCEPT_ALL
  32490. CLIENT_INIT_RX_DATA_BCAST_ACCEPT_ALL_SHIFT
  32491. CLIENT_INIT_RX_DATA_MCAST_ACCEPT_ALL
  32492. CLIENT_INIT_RX_DATA_MCAST_ACCEPT_ALL_SHIFT
  32493. CLIENT_INIT_RX_DATA_MCAST_DROP_ALL
  32494. CLIENT_INIT_RX_DATA_MCAST_DROP_ALL_SHIFT
  32495. CLIENT_INIT_RX_DATA_RESERVED2
  32496. CLIENT_INIT_RX_DATA_RESERVED2_SHIFT
  32497. CLIENT_INIT_RX_DATA_RESERVED5
  32498. CLIENT_INIT_RX_DATA_RESERVED5_SHIFT
  32499. CLIENT_INIT_RX_DATA_TPA_EN_IPV4
  32500. CLIENT_INIT_RX_DATA_TPA_EN_IPV4_SHIFT
  32501. CLIENT_INIT_RX_DATA_TPA_EN_IPV6
  32502. CLIENT_INIT_RX_DATA_TPA_EN_IPV6_SHIFT
  32503. CLIENT_INIT_RX_DATA_TPA_MODE
  32504. CLIENT_INIT_RX_DATA_TPA_MODE_SHIFT
  32505. CLIENT_INIT_RX_DATA_TPA_OVER_VLAN_DISABLE
  32506. CLIENT_INIT_RX_DATA_TPA_OVER_VLAN_DISABLE_SHIFT
  32507. CLIENT_INIT_RX_DATA_UCAST_ACCEPT_ALL
  32508. CLIENT_INIT_RX_DATA_UCAST_ACCEPT_ALL_SHIFT
  32509. CLIENT_INIT_RX_DATA_UCAST_ACCEPT_UNMATCHED
  32510. CLIENT_INIT_RX_DATA_UCAST_ACCEPT_UNMATCHED_SHIFT
  32511. CLIENT_INIT_RX_DATA_UCAST_DROP_ALL
  32512. CLIENT_INIT_RX_DATA_UCAST_DROP_ALL_SHIFT
  32513. CLIENT_INIT_TX_DATA_ACCEPT_ANY_VLAN
  32514. CLIENT_INIT_TX_DATA_ACCEPT_ANY_VLAN_SHIFT
  32515. CLIENT_INIT_TX_DATA_BCAST_ACCEPT_ALL
  32516. CLIENT_INIT_TX_DATA_BCAST_ACCEPT_ALL_SHIFT
  32517. CLIENT_INIT_TX_DATA_MCAST_ACCEPT_ALL
  32518. CLIENT_INIT_TX_DATA_MCAST_ACCEPT_ALL_SHIFT
  32519. CLIENT_INIT_TX_DATA_RESERVED0
  32520. CLIENT_INIT_TX_DATA_RESERVED0_SHIFT
  32521. CLIENT_INIT_TX_DATA_UCAST_ACCEPT_ALL
  32522. CLIENT_INIT_TX_DATA_UCAST_ACCEPT_ALL_SHIFT
  32523. CLIENT_IW_INTERFACE_VERSION_BUILD
  32524. CLIENT_IW_INTERFACE_VERSION_MAJOR
  32525. CLIENT_IW_INTERFACE_VERSION_MINOR
  32526. CLIENT_MASK
  32527. CLIENT_MIGRATED
  32528. CLIENT_RECONNECT
  32529. CLIENT_REGISTERED
  32530. CLIENT_RESERVE_SCSI_2
  32531. CLIENT_STRING_EPRT
  32532. CLIENT_STRING_PORT
  32533. CLIENT_WIN_REQ
  32534. CLINKCON
  32535. CLIP
  32536. CLIP0MAX
  32537. CLIP0MIN
  32538. CLIP1MAX
  32539. CLIP1MIN
  32540. CLIPCTRL
  32541. CLIPCTRL_HSKIP
  32542. CLIPCTRL_VSKIP
  32543. CLIPENABLE
  32544. CLIPH
  32545. CLIPL
  32546. CLIPPER_DEBUG_REG00__ALWAYS_ZERO_MASK
  32547. CLIPPER_DEBUG_REG00__ALWAYS_ZERO__SHIFT
  32548. CLIPPER_DEBUG_REG00__ccgen_to_clipcc_fifo_empty_MASK
  32549. CLIPPER_DEBUG_REG00__ccgen_to_clipcc_fifo_empty__SHIFT
  32550. CLIPPER_DEBUG_REG00__ccgen_to_clipcc_fifo_full_MASK
  32551. CLIPPER_DEBUG_REG00__ccgen_to_clipcc_fifo_full__SHIFT
  32552. CLIPPER_DEBUG_REG00__clip_ga_bc_fifo_write_MASK
  32553. CLIPPER_DEBUG_REG00__clip_ga_bc_fifo_write__SHIFT
  32554. CLIPPER_DEBUG_REG00__clip_to_ga_fifo_full_MASK
  32555. CLIPPER_DEBUG_REG00__clip_to_ga_fifo_full__SHIFT
  32556. CLIPPER_DEBUG_REG00__clip_to_ga_fifo_write_MASK
  32557. CLIPPER_DEBUG_REG00__clip_to_ga_fifo_write__SHIFT
  32558. CLIPPER_DEBUG_REG00__clip_to_outsm_fifo_empty_MASK
  32559. CLIPPER_DEBUG_REG00__clip_to_outsm_fifo_empty__SHIFT
  32560. CLIPPER_DEBUG_REG00__clip_to_outsm_fifo_full_MASK
  32561. CLIPPER_DEBUG_REG00__clip_to_outsm_fifo_full__SHIFT
  32562. CLIPPER_DEBUG_REG00__clip_to_outsm_fifo_write_MASK
  32563. CLIPPER_DEBUG_REG00__clip_to_outsm_fifo_write__SHIFT
  32564. CLIPPER_DEBUG_REG00__clipcode_fifo_fifo_empty_MASK
  32565. CLIPPER_DEBUG_REG00__clipcode_fifo_fifo_empty__SHIFT
  32566. CLIPPER_DEBUG_REG00__clipcode_fifo_full_MASK
  32567. CLIPPER_DEBUG_REG00__clipcode_fifo_full__SHIFT
  32568. CLIPPER_DEBUG_REG00__primic_to_clprim_fifo_empty_MASK
  32569. CLIPPER_DEBUG_REG00__primic_to_clprim_fifo_empty__SHIFT
  32570. CLIPPER_DEBUG_REG00__primic_to_clprim_fifo_full_MASK
  32571. CLIPPER_DEBUG_REG00__primic_to_clprim_fifo_full__SHIFT
  32572. CLIPPER_DEBUG_REG00__su_clip_baryc_free_MASK
  32573. CLIPPER_DEBUG_REG00__su_clip_baryc_free__SHIFT
  32574. CLIPPER_DEBUG_REG00__vgt_to_clipp_fifo_empty_MASK
  32575. CLIPPER_DEBUG_REG00__vgt_to_clipp_fifo_empty__SHIFT
  32576. CLIPPER_DEBUG_REG00__vgt_to_clipp_fifo_full_MASK
  32577. CLIPPER_DEBUG_REG00__vgt_to_clipp_fifo_full__SHIFT
  32578. CLIPPER_DEBUG_REG00__vgt_to_clipp_fifo_write_MASK
  32579. CLIPPER_DEBUG_REG00__vgt_to_clipp_fifo_write__SHIFT
  32580. CLIPPER_DEBUG_REG00__vgt_to_clips_fifo_empty_MASK
  32581. CLIPPER_DEBUG_REG00__vgt_to_clips_fifo_empty__SHIFT
  32582. CLIPPER_DEBUG_REG00__vgt_to_clips_fifo_full_MASK
  32583. CLIPPER_DEBUG_REG00__vgt_to_clips_fifo_full__SHIFT
  32584. CLIPPER_DEBUG_REG00__vte_out_clip_fifo_fifo_empty_MASK
  32585. CLIPPER_DEBUG_REG00__vte_out_clip_fifo_fifo_empty__SHIFT
  32586. CLIPPER_DEBUG_REG00__vte_out_clip_fifo_fifo_full_MASK
  32587. CLIPPER_DEBUG_REG00__vte_out_clip_fifo_fifo_full__SHIFT
  32588. CLIPPER_DEBUG_REG00__vte_out_orig_fifo_fifo_empty_MASK
  32589. CLIPPER_DEBUG_REG00__vte_out_orig_fifo_fifo_empty__SHIFT
  32590. CLIPPER_DEBUG_REG00__vte_out_orig_fifo_fifo_full_MASK
  32591. CLIPPER_DEBUG_REG00__vte_out_orig_fifo_fifo_full__SHIFT
  32592. CLIPPER_DEBUG_REG00__vte_out_orig_fifo_fifo_write_MASK
  32593. CLIPPER_DEBUG_REG00__vte_out_orig_fifo_fifo_write__SHIFT
  32594. CLIPPER_DEBUG_REG01__ALWAYS_ZERO_MASK
  32595. CLIPPER_DEBUG_REG01__ALWAYS_ZERO__SHIFT
  32596. CLIPPER_DEBUG_REG01__clip_extra_bc_valid_MASK
  32597. CLIPPER_DEBUG_REG01__clip_extra_bc_valid__SHIFT
  32598. CLIPPER_DEBUG_REG01__clip_ga_bc_fifo_write_MASK
  32599. CLIPPER_DEBUG_REG01__clip_ga_bc_fifo_write__SHIFT
  32600. CLIPPER_DEBUG_REG01__clip_to_ga_fifo_write_MASK
  32601. CLIPPER_DEBUG_REG01__clip_to_ga_fifo_write__SHIFT
  32602. CLIPPER_DEBUG_REG01__clip_to_outsm_deallocate_slot_MASK
  32603. CLIPPER_DEBUG_REG01__clip_to_outsm_deallocate_slot__SHIFT
  32604. CLIPPER_DEBUG_REG01__clip_to_outsm_null_primitive_MASK
  32605. CLIPPER_DEBUG_REG01__clip_to_outsm_null_primitive__SHIFT
  32606. CLIPPER_DEBUG_REG01__clip_to_outsm_vertex_deallocate_MASK
  32607. CLIPPER_DEBUG_REG01__clip_to_outsm_vertex_deallocate__SHIFT
  32608. CLIPPER_DEBUG_REG01__clip_vert_vte_valid_MASK
  32609. CLIPPER_DEBUG_REG01__clip_vert_vte_valid__SHIFT
  32610. CLIPPER_DEBUG_REG01__vte_out_clip_fifo_fifo_advanceread_MASK
  32611. CLIPPER_DEBUG_REG01__vte_out_clip_fifo_fifo_advanceread__SHIFT
  32612. CLIPPER_DEBUG_REG01__vte_out_clip_fifo_fifo_empty_MASK
  32613. CLIPPER_DEBUG_REG01__vte_out_clip_fifo_fifo_empty__SHIFT
  32614. CLIPPER_DEBUG_REG01__vte_out_clip_rd_extra_bc_valid_MASK
  32615. CLIPPER_DEBUG_REG01__vte_out_clip_rd_extra_bc_valid__SHIFT
  32616. CLIPPER_DEBUG_REG01__vte_out_clip_rd_vertex_store_indx_MASK
  32617. CLIPPER_DEBUG_REG01__vte_out_clip_rd_vertex_store_indx__SHIFT
  32618. CLIPPER_DEBUG_REG01__vte_out_clip_rd_vte_naninf_kill_MASK
  32619. CLIPPER_DEBUG_REG01__vte_out_clip_rd_vte_naninf_kill__SHIFT
  32620. CLIPPER_DEBUG_REG01__vte_positions_vte_clip_vte_naninf_kill_0_MASK
  32621. CLIPPER_DEBUG_REG01__vte_positions_vte_clip_vte_naninf_kill_0__SHIFT
  32622. CLIPPER_DEBUG_REG01__vte_positions_vte_clip_vte_naninf_kill_1_MASK
  32623. CLIPPER_DEBUG_REG01__vte_positions_vte_clip_vte_naninf_kill_1__SHIFT
  32624. CLIPPER_DEBUG_REG01__vte_positions_vte_clip_vte_naninf_kill_2_MASK
  32625. CLIPPER_DEBUG_REG01__vte_positions_vte_clip_vte_naninf_kill_2__SHIFT
  32626. CLIPPER_DEBUG_REG02__clip_extra_bc_valid_MASK
  32627. CLIPPER_DEBUG_REG02__clip_extra_bc_valid__SHIFT
  32628. CLIPPER_DEBUG_REG02__clip_ga_bc_fifo_full_MASK
  32629. CLIPPER_DEBUG_REG02__clip_ga_bc_fifo_full__SHIFT
  32630. CLIPPER_DEBUG_REG02__clip_ga_bc_fifo_write_MASK
  32631. CLIPPER_DEBUG_REG02__clip_ga_bc_fifo_write__SHIFT
  32632. CLIPPER_DEBUG_REG02__clip_to_clipga_extra_bc_coords_MASK
  32633. CLIPPER_DEBUG_REG02__clip_to_clipga_extra_bc_coords__SHIFT
  32634. CLIPPER_DEBUG_REG02__clip_to_clipga_vte_naninf_kill_MASK
  32635. CLIPPER_DEBUG_REG02__clip_to_clipga_vte_naninf_kill__SHIFT
  32636. CLIPPER_DEBUG_REG02__clip_to_ga_fifo_full_MASK
  32637. CLIPPER_DEBUG_REG02__clip_to_ga_fifo_full__SHIFT
  32638. CLIPPER_DEBUG_REG02__clip_to_ga_fifo_write_MASK
  32639. CLIPPER_DEBUG_REG02__clip_to_ga_fifo_write__SHIFT
  32640. CLIPPER_DEBUG_REG02__clip_to_outsm_clip_seq_indx_MASK
  32641. CLIPPER_DEBUG_REG02__clip_to_outsm_clip_seq_indx__SHIFT
  32642. CLIPPER_DEBUG_REG02__clip_to_outsm_clipped_prim_MASK
  32643. CLIPPER_DEBUG_REG02__clip_to_outsm_clipped_prim__SHIFT
  32644. CLIPPER_DEBUG_REG02__clip_to_outsm_end_of_packet_MASK
  32645. CLIPPER_DEBUG_REG02__clip_to_outsm_end_of_packet__SHIFT
  32646. CLIPPER_DEBUG_REG02__clip_to_outsm_fifo_advanceread_MASK
  32647. CLIPPER_DEBUG_REG02__clip_to_outsm_fifo_advanceread__SHIFT
  32648. CLIPPER_DEBUG_REG02__clip_to_outsm_fifo_empty_MASK
  32649. CLIPPER_DEBUG_REG02__clip_to_outsm_fifo_empty__SHIFT
  32650. CLIPPER_DEBUG_REG02__clip_to_outsm_first_prim_of_slot_MASK
  32651. CLIPPER_DEBUG_REG02__clip_to_outsm_first_prim_of_slot__SHIFT
  32652. CLIPPER_DEBUG_REG02__clip_to_outsm_null_primitive_MASK
  32653. CLIPPER_DEBUG_REG02__clip_to_outsm_null_primitive__SHIFT
  32654. CLIPPER_DEBUG_REG02__clip_to_outsm_vertex_store_indx_0_MASK
  32655. CLIPPER_DEBUG_REG02__clip_to_outsm_vertex_store_indx_0__SHIFT
  32656. CLIPPER_DEBUG_REG02__clip_to_outsm_vertex_store_indx_1_MASK
  32657. CLIPPER_DEBUG_REG02__clip_to_outsm_vertex_store_indx_1__SHIFT
  32658. CLIPPER_DEBUG_REG02__clip_to_outsm_vertex_store_indx_2_MASK
  32659. CLIPPER_DEBUG_REG02__clip_to_outsm_vertex_store_indx_2__SHIFT
  32660. CLIPPER_DEBUG_REG02__clip_vert_vte_valid_MASK
  32661. CLIPPER_DEBUG_REG02__clip_vert_vte_valid__SHIFT
  32662. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_clip_code_or_MASK
  32663. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_clip_code_or__SHIFT
  32664. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_clip_primitive_MASK
  32665. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_clip_primitive__SHIFT
  32666. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_deallocate_slot_MASK
  32667. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_deallocate_slot__SHIFT
  32668. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_end_of_packet_MASK
  32669. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_end_of_packet__SHIFT
  32670. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_event_MASK
  32671. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_event__SHIFT
  32672. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_event_id_MASK
  32673. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_event_id__SHIFT
  32674. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_first_prim_of_slot_MASK
  32675. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_first_prim_of_slot__SHIFT
  32676. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_null_primitive_MASK
  32677. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_null_primitive__SHIFT
  32678. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_prim_valid_MASK
  32679. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_prim_valid__SHIFT
  32680. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_state_var_indx_MASK
  32681. CLIPPER_DEBUG_REG03__clipsm0_clprim_to_clip_state_var_indx__SHIFT
  32682. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_event_MASK
  32683. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_event__SHIFT
  32684. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_null_primitive_MASK
  32685. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_null_primitive__SHIFT
  32686. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_param_cache_indx_0_MASK
  32687. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_param_cache_indx_0__SHIFT
  32688. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_prim_valid_MASK
  32689. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_prim_valid__SHIFT
  32690. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_vertex_store_indx_0_MASK
  32691. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_vertex_store_indx_0__SHIFT
  32692. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_vertex_store_indx_1_MASK
  32693. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_vertex_store_indx_1__SHIFT
  32694. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_vertex_store_indx_2_MASK
  32695. CLIPPER_DEBUG_REG04__clipsm0_clprim_to_clip_vertex_store_indx_2__SHIFT
  32696. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_clip_code_or_MASK
  32697. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_clip_code_or__SHIFT
  32698. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_clip_primitive_MASK
  32699. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_clip_primitive__SHIFT
  32700. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_deallocate_slot_MASK
  32701. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_deallocate_slot__SHIFT
  32702. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_end_of_packet_MASK
  32703. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_end_of_packet__SHIFT
  32704. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_event_MASK
  32705. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_event__SHIFT
  32706. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_event_id_MASK
  32707. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_event_id__SHIFT
  32708. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_first_prim_of_slot_MASK
  32709. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_first_prim_of_slot__SHIFT
  32710. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_null_primitive_MASK
  32711. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_null_primitive__SHIFT
  32712. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_prim_valid_MASK
  32713. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_prim_valid__SHIFT
  32714. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_state_var_indx_MASK
  32715. CLIPPER_DEBUG_REG05__clipsm1_clprim_to_clip_state_var_indx__SHIFT
  32716. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_event_MASK
  32717. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_event__SHIFT
  32718. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_null_primitive_MASK
  32719. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_null_primitive__SHIFT
  32720. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_param_cache_indx_0_MASK
  32721. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_param_cache_indx_0__SHIFT
  32722. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_prim_valid_MASK
  32723. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_prim_valid__SHIFT
  32724. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_vertex_store_indx_0_MASK
  32725. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_vertex_store_indx_0__SHIFT
  32726. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_vertex_store_indx_1_MASK
  32727. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_vertex_store_indx_1__SHIFT
  32728. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_vertex_store_indx_2_MASK
  32729. CLIPPER_DEBUG_REG06__clipsm1_clprim_to_clip_vertex_store_indx_2__SHIFT
  32730. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_clip_code_or_MASK
  32731. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_clip_code_or__SHIFT
  32732. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_clip_primitive_MASK
  32733. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_clip_primitive__SHIFT
  32734. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_deallocate_slot_MASK
  32735. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_deallocate_slot__SHIFT
  32736. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_end_of_packet_MASK
  32737. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_end_of_packet__SHIFT
  32738. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_event_MASK
  32739. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_event__SHIFT
  32740. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_event_id_MASK
  32741. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_event_id__SHIFT
  32742. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_first_prim_of_slot_MASK
  32743. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_first_prim_of_slot__SHIFT
  32744. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_null_primitive_MASK
  32745. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_null_primitive__SHIFT
  32746. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_prim_valid_MASK
  32747. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_prim_valid__SHIFT
  32748. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_state_var_indx_MASK
  32749. CLIPPER_DEBUG_REG07__clipsm2_clprim_to_clip_state_var_indx__SHIFT
  32750. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_event_MASK
  32751. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_event__SHIFT
  32752. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_null_primitive_MASK
  32753. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_null_primitive__SHIFT
  32754. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_param_cache_indx_0_MASK
  32755. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_param_cache_indx_0__SHIFT
  32756. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_prim_valid_MASK
  32757. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_prim_valid__SHIFT
  32758. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_vertex_store_indx_0_MASK
  32759. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_vertex_store_indx_0__SHIFT
  32760. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_vertex_store_indx_1_MASK
  32761. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_vertex_store_indx_1__SHIFT
  32762. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_vertex_store_indx_2_MASK
  32763. CLIPPER_DEBUG_REG08__clipsm2_clprim_to_clip_vertex_store_indx_2__SHIFT
  32764. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_clip_code_or_MASK
  32765. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_clip_code_or__SHIFT
  32766. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_clip_primitive_MASK
  32767. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_clip_primitive__SHIFT
  32768. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_deallocate_slot_MASK
  32769. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_deallocate_slot__SHIFT
  32770. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_end_of_packet_MASK
  32771. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_end_of_packet__SHIFT
  32772. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_event_MASK
  32773. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_event__SHIFT
  32774. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_event_id_MASK
  32775. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_event_id__SHIFT
  32776. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_first_prim_of_slot_MASK
  32777. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_first_prim_of_slot__SHIFT
  32778. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_null_primitive_MASK
  32779. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_null_primitive__SHIFT
  32780. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_prim_valid_MASK
  32781. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_prim_valid__SHIFT
  32782. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_state_var_indx_MASK
  32783. CLIPPER_DEBUG_REG09__clipsm3_clprim_to_clip_state_var_indx__SHIFT
  32784. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_event_MASK
  32785. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_event__SHIFT
  32786. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_null_primitive_MASK
  32787. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_null_primitive__SHIFT
  32788. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_param_cache_indx_0_MASK
  32789. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_param_cache_indx_0__SHIFT
  32790. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_prim_valid_MASK
  32791. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_prim_valid__SHIFT
  32792. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_vertex_store_indx_0_MASK
  32793. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_vertex_store_indx_0__SHIFT
  32794. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_vertex_store_indx_1_MASK
  32795. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_vertex_store_indx_1__SHIFT
  32796. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_vertex_store_indx_2_MASK
  32797. CLIPPER_DEBUG_REG10__clipsm3_clprim_to_clip_vertex_store_indx_2__SHIFT
  32798. CLIPPER_DEBUG_REG11__clipsm0_clip_to_clipga_clip_primitive_MASK
  32799. CLIPPER_DEBUG_REG11__clipsm0_clip_to_clipga_clip_primitive__SHIFT
  32800. CLIPPER_DEBUG_REG11__clipsm0_clip_to_clipga_clip_to_outsm_cnt_MASK
  32801. CLIPPER_DEBUG_REG11__clipsm0_clip_to_clipga_clip_to_outsm_cnt__SHIFT
  32802. CLIPPER_DEBUG_REG11__clipsm0_clip_to_clipga_event_MASK
  32803. CLIPPER_DEBUG_REG11__clipsm0_clip_to_clipga_event__SHIFT
  32804. CLIPPER_DEBUG_REG11__clipsm0_clip_to_clipga_prim_valid_MASK
  32805. CLIPPER_DEBUG_REG11__clipsm0_clip_to_clipga_prim_valid__SHIFT
  32806. CLIPPER_DEBUG_REG11__clipsm0_inc_clip_to_clipga_clip_to_outsm_cnt_MASK
  32807. CLIPPER_DEBUG_REG11__clipsm0_inc_clip_to_clipga_clip_to_outsm_cnt__SHIFT
  32808. CLIPPER_DEBUG_REG11__clipsm1_clip_to_clipga_clip_primitive_MASK
  32809. CLIPPER_DEBUG_REG11__clipsm1_clip_to_clipga_clip_primitive__SHIFT
  32810. CLIPPER_DEBUG_REG11__clipsm1_clip_to_clipga_clip_to_outsm_cnt_MASK
  32811. CLIPPER_DEBUG_REG11__clipsm1_clip_to_clipga_clip_to_outsm_cnt__SHIFT
  32812. CLIPPER_DEBUG_REG11__clipsm1_clip_to_clipga_event_MASK
  32813. CLIPPER_DEBUG_REG11__clipsm1_clip_to_clipga_event__SHIFT
  32814. CLIPPER_DEBUG_REG11__clipsm1_clip_to_clipga_prim_valid_MASK
  32815. CLIPPER_DEBUG_REG11__clipsm1_clip_to_clipga_prim_valid__SHIFT
  32816. CLIPPER_DEBUG_REG11__clipsm1_inc_clip_to_clipga_clip_to_outsm_cnt_MASK
  32817. CLIPPER_DEBUG_REG11__clipsm1_inc_clip_to_clipga_clip_to_outsm_cnt__SHIFT
  32818. CLIPPER_DEBUG_REG11__clipsm2_clip_to_clipga_clip_primitive_MASK
  32819. CLIPPER_DEBUG_REG11__clipsm2_clip_to_clipga_clip_primitive__SHIFT
  32820. CLIPPER_DEBUG_REG11__clipsm2_clip_to_clipga_clip_to_outsm_cnt_MASK
  32821. CLIPPER_DEBUG_REG11__clipsm2_clip_to_clipga_clip_to_outsm_cnt__SHIFT
  32822. CLIPPER_DEBUG_REG11__clipsm2_clip_to_clipga_event_MASK
  32823. CLIPPER_DEBUG_REG11__clipsm2_clip_to_clipga_event__SHIFT
  32824. CLIPPER_DEBUG_REG11__clipsm2_clip_to_clipga_prim_valid_MASK
  32825. CLIPPER_DEBUG_REG11__clipsm2_clip_to_clipga_prim_valid__SHIFT
  32826. CLIPPER_DEBUG_REG11__clipsm2_inc_clip_to_clipga_clip_to_outsm_cnt_MASK
  32827. CLIPPER_DEBUG_REG11__clipsm2_inc_clip_to_clipga_clip_to_outsm_cnt__SHIFT
  32828. CLIPPER_DEBUG_REG11__clipsm3_clip_to_clipga_clip_primitive_MASK
  32829. CLIPPER_DEBUG_REG11__clipsm3_clip_to_clipga_clip_primitive__SHIFT
  32830. CLIPPER_DEBUG_REG11__clipsm3_clip_to_clipga_clip_to_outsm_cnt_MASK
  32831. CLIPPER_DEBUG_REG11__clipsm3_clip_to_clipga_clip_to_outsm_cnt__SHIFT
  32832. CLIPPER_DEBUG_REG11__clipsm3_clip_to_clipga_event_MASK
  32833. CLIPPER_DEBUG_REG11__clipsm3_clip_to_clipga_event__SHIFT
  32834. CLIPPER_DEBUG_REG11__clipsm3_clip_to_clipga_prim_valid_MASK
  32835. CLIPPER_DEBUG_REG11__clipsm3_clip_to_clipga_prim_valid__SHIFT
  32836. CLIPPER_DEBUG_REG11__clipsm3_inc_clip_to_clipga_clip_to_outsm_cnt_MASK
  32837. CLIPPER_DEBUG_REG11__clipsm3_inc_clip_to_clipga_clip_to_outsm_cnt__SHIFT
  32838. CLIPPER_DEBUG_REG12__ALWAYS_ZERO_MASK
  32839. CLIPPER_DEBUG_REG12__ALWAYS_ZERO__SHIFT
  32840. CLIPPER_DEBUG_REG12__clip_priority_available_clip_verts_MASK
  32841. CLIPPER_DEBUG_REG12__clip_priority_available_clip_verts__SHIFT
  32842. CLIPPER_DEBUG_REG12__clip_priority_available_vte_out_clip_MASK
  32843. CLIPPER_DEBUG_REG12__clip_priority_available_vte_out_clip__SHIFT
  32844. CLIPPER_DEBUG_REG12__clip_priority_seq_indx_load_MASK
  32845. CLIPPER_DEBUG_REG12__clip_priority_seq_indx_load__SHIFT
  32846. CLIPPER_DEBUG_REG12__clip_priority_seq_indx_out_MASK
  32847. CLIPPER_DEBUG_REG12__clip_priority_seq_indx_out__SHIFT
  32848. CLIPPER_DEBUG_REG12__clip_priority_seq_indx_vert_MASK
  32849. CLIPPER_DEBUG_REG12__clip_priority_seq_indx_vert__SHIFT
  32850. CLIPPER_DEBUG_REG12__clipsm0_clprim_to_clip_clip_primitive_MASK
  32851. CLIPPER_DEBUG_REG12__clipsm0_clprim_to_clip_clip_primitive__SHIFT
  32852. CLIPPER_DEBUG_REG12__clipsm0_clprim_to_clip_prim_valid_MASK
  32853. CLIPPER_DEBUG_REG12__clipsm0_clprim_to_clip_prim_valid__SHIFT
  32854. CLIPPER_DEBUG_REG12__clipsm1_clprim_to_clip_clip_primitive_MASK
  32855. CLIPPER_DEBUG_REG12__clipsm1_clprim_to_clip_clip_primitive__SHIFT
  32856. CLIPPER_DEBUG_REG12__clipsm1_clprim_to_clip_prim_valid_MASK
  32857. CLIPPER_DEBUG_REG12__clipsm1_clprim_to_clip_prim_valid__SHIFT
  32858. CLIPPER_DEBUG_REG12__clipsm2_clprim_to_clip_clip_primitive_MASK
  32859. CLIPPER_DEBUG_REG12__clipsm2_clprim_to_clip_clip_primitive__SHIFT
  32860. CLIPPER_DEBUG_REG12__clipsm2_clprim_to_clip_prim_valid_MASK
  32861. CLIPPER_DEBUG_REG12__clipsm2_clprim_to_clip_prim_valid__SHIFT
  32862. CLIPPER_DEBUG_REG12__clipsm3_clprim_to_clip_clip_primitive_MASK
  32863. CLIPPER_DEBUG_REG12__clipsm3_clprim_to_clip_clip_primitive__SHIFT
  32864. CLIPPER_DEBUG_REG12__clipsm3_clprim_to_clip_prim_valid_MASK
  32865. CLIPPER_DEBUG_REG12__clipsm3_clprim_to_clip_prim_valid__SHIFT
  32866. CLIPPER_DEBUG_REG13__ccgen_to_clipcc_fifo_empty_MASK
  32867. CLIPPER_DEBUG_REG13__ccgen_to_clipcc_fifo_empty__SHIFT
  32868. CLIPPER_DEBUG_REG13__clip_priority_seq_indx_out_cnt_MASK
  32869. CLIPPER_DEBUG_REG13__clip_priority_seq_indx_out_cnt__SHIFT
  32870. CLIPPER_DEBUG_REG13__clipcc_vertex_store_indx_MASK
  32871. CLIPPER_DEBUG_REG13__clipcc_vertex_store_indx__SHIFT
  32872. CLIPPER_DEBUG_REG13__clipcode_fifo_fifo_empty_MASK
  32873. CLIPPER_DEBUG_REG13__clipcode_fifo_fifo_empty__SHIFT
  32874. CLIPPER_DEBUG_REG13__clprim_clip_primitive_MASK
  32875. CLIPPER_DEBUG_REG13__clprim_clip_primitive__SHIFT
  32876. CLIPPER_DEBUG_REG13__clprim_cull_primitive_MASK
  32877. CLIPPER_DEBUG_REG13__clprim_cull_primitive__SHIFT
  32878. CLIPPER_DEBUG_REG13__clprim_in_back_state_var_indx_MASK
  32879. CLIPPER_DEBUG_REG13__clprim_in_back_state_var_indx__SHIFT
  32880. CLIPPER_DEBUG_REG13__outsm_clr_fifo_advanceread_MASK
  32881. CLIPPER_DEBUG_REG13__outsm_clr_fifo_advanceread__SHIFT
  32882. CLIPPER_DEBUG_REG13__outsm_clr_fifo_contents_MASK
  32883. CLIPPER_DEBUG_REG13__outsm_clr_fifo_contents__SHIFT
  32884. CLIPPER_DEBUG_REG13__outsm_clr_fifo_full_MASK
  32885. CLIPPER_DEBUG_REG13__outsm_clr_fifo_full__SHIFT
  32886. CLIPPER_DEBUG_REG13__outsm_clr_fifo_write_MASK
  32887. CLIPPER_DEBUG_REG13__outsm_clr_fifo_write__SHIFT
  32888. CLIPPER_DEBUG_REG13__outsm_clr_rd_clipsm_wait_MASK
  32889. CLIPPER_DEBUG_REG13__outsm_clr_rd_clipsm_wait__SHIFT
  32890. CLIPPER_DEBUG_REG13__outsm_clr_rd_orig_vertices_MASK
  32891. CLIPPER_DEBUG_REG13__outsm_clr_rd_orig_vertices__SHIFT
  32892. CLIPPER_DEBUG_REG13__point_clip_candidate_MASK
  32893. CLIPPER_DEBUG_REG13__point_clip_candidate__SHIFT
  32894. CLIPPER_DEBUG_REG13__prim_back_valid_MASK
  32895. CLIPPER_DEBUG_REG13__prim_back_valid__SHIFT
  32896. CLIPPER_DEBUG_REG13__prim_nan_kill_MASK
  32897. CLIPPER_DEBUG_REG13__prim_nan_kill__SHIFT
  32898. CLIPPER_DEBUG_REG13__vertval_bits_vertex_cc_next_valid_MASK
  32899. CLIPPER_DEBUG_REG13__vertval_bits_vertex_cc_next_valid__SHIFT
  32900. CLIPPER_DEBUG_REG13__vte_out_orig_fifo_fifo_empty_MASK
  32901. CLIPPER_DEBUG_REG13__vte_out_orig_fifo_fifo_empty__SHIFT
  32902. CLIPPER_DEBUG_REG14__clprim_in_back_deallocate_slot_MASK
  32903. CLIPPER_DEBUG_REG14__clprim_in_back_deallocate_slot__SHIFT
  32904. CLIPPER_DEBUG_REG14__clprim_in_back_end_of_packet_MASK
  32905. CLIPPER_DEBUG_REG14__clprim_in_back_end_of_packet__SHIFT
  32906. CLIPPER_DEBUG_REG14__clprim_in_back_event_MASK
  32907. CLIPPER_DEBUG_REG14__clprim_in_back_event__SHIFT
  32908. CLIPPER_DEBUG_REG14__clprim_in_back_event_id_MASK
  32909. CLIPPER_DEBUG_REG14__clprim_in_back_event_id__SHIFT
  32910. CLIPPER_DEBUG_REG14__clprim_in_back_first_prim_of_slot_MASK
  32911. CLIPPER_DEBUG_REG14__clprim_in_back_first_prim_of_slot__SHIFT
  32912. CLIPPER_DEBUG_REG14__clprim_in_back_vertex_store_indx_0_MASK
  32913. CLIPPER_DEBUG_REG14__clprim_in_back_vertex_store_indx_0__SHIFT
  32914. CLIPPER_DEBUG_REG14__clprim_in_back_vertex_store_indx_1_MASK
  32915. CLIPPER_DEBUG_REG14__clprim_in_back_vertex_store_indx_1__SHIFT
  32916. CLIPPER_DEBUG_REG14__clprim_in_back_vertex_store_indx_2_MASK
  32917. CLIPPER_DEBUG_REG14__clprim_in_back_vertex_store_indx_2__SHIFT
  32918. CLIPPER_DEBUG_REG14__outputclprimtoclip_null_primitive_MASK
  32919. CLIPPER_DEBUG_REG14__outputclprimtoclip_null_primitive__SHIFT
  32920. CLIPPER_DEBUG_REG14__prim_back_valid_MASK
  32921. CLIPPER_DEBUG_REG14__prim_back_valid__SHIFT
  32922. CLIPPER_DEBUG_REG15__primic_to_clprim_fifo_vertex_store_indx_0_MASK
  32923. CLIPPER_DEBUG_REG15__primic_to_clprim_fifo_vertex_store_indx_0__SHIFT
  32924. CLIPPER_DEBUG_REG15__primic_to_clprim_fifo_vertex_store_indx_1_MASK
  32925. CLIPPER_DEBUG_REG15__primic_to_clprim_fifo_vertex_store_indx_1__SHIFT
  32926. CLIPPER_DEBUG_REG15__primic_to_clprim_fifo_vertex_store_indx_2_MASK
  32927. CLIPPER_DEBUG_REG15__primic_to_clprim_fifo_vertex_store_indx_2__SHIFT
  32928. CLIPPER_DEBUG_REG15__primic_to_clprim_valid_MASK
  32929. CLIPPER_DEBUG_REG15__primic_to_clprim_valid__SHIFT
  32930. CLIPPER_DEBUG_REG15__vertval_bits_vertex_vertex_store_msb_MASK
  32931. CLIPPER_DEBUG_REG15__vertval_bits_vertex_vertex_store_msb__SHIFT
  32932. CLIPPER_DEBUG_REG16__sm0_clip_to_clipga_clip_to_outsm_cnt_eq0_MASK
  32933. CLIPPER_DEBUG_REG16__sm0_clip_to_clipga_clip_to_outsm_cnt_eq0__SHIFT
  32934. CLIPPER_DEBUG_REG16__sm0_clip_to_outsm_fifo_full_MASK
  32935. CLIPPER_DEBUG_REG16__sm0_clip_to_outsm_fifo_full__SHIFT
  32936. CLIPPER_DEBUG_REG16__sm0_clip_vert_cnt_MASK
  32937. CLIPPER_DEBUG_REG16__sm0_clip_vert_cnt__SHIFT
  32938. CLIPPER_DEBUG_REG16__sm0_clprim_to_clip_prim_valid_MASK
  32939. CLIPPER_DEBUG_REG16__sm0_clprim_to_clip_prim_valid__SHIFT
  32940. CLIPPER_DEBUG_REG16__sm0_current_state_MASK
  32941. CLIPPER_DEBUG_REG16__sm0_current_state__SHIFT
  32942. CLIPPER_DEBUG_REG16__sm0_highest_priority_seq_MASK
  32943. CLIPPER_DEBUG_REG16__sm0_highest_priority_seq__SHIFT
  32944. CLIPPER_DEBUG_REG16__sm0_inv_to_clip_data_valid_0_MASK
  32945. CLIPPER_DEBUG_REG16__sm0_inv_to_clip_data_valid_0__SHIFT
  32946. CLIPPER_DEBUG_REG16__sm0_inv_to_clip_data_valid_1_MASK
  32947. CLIPPER_DEBUG_REG16__sm0_inv_to_clip_data_valid_1__SHIFT
  32948. CLIPPER_DEBUG_REG16__sm0_outputcliptoclipga_0_MASK
  32949. CLIPPER_DEBUG_REG16__sm0_outputcliptoclipga_0__SHIFT
  32950. CLIPPER_DEBUG_REG16__sm0_prim_end_state_MASK
  32951. CLIPPER_DEBUG_REG16__sm0_prim_end_state__SHIFT
  32952. CLIPPER_DEBUG_REG16__sm0_ps_expand_MASK
  32953. CLIPPER_DEBUG_REG16__sm0_ps_expand__SHIFT
  32954. CLIPPER_DEBUG_REG16__sm0_vertex_clip_cnt_MASK
  32955. CLIPPER_DEBUG_REG16__sm0_vertex_clip_cnt__SHIFT
  32956. CLIPPER_DEBUG_REG17__sm1_clip_to_clipga_clip_to_outsm_cnt_eq0_MASK
  32957. CLIPPER_DEBUG_REG17__sm1_clip_to_clipga_clip_to_outsm_cnt_eq0__SHIFT
  32958. CLIPPER_DEBUG_REG17__sm1_clip_to_outsm_fifo_full_MASK
  32959. CLIPPER_DEBUG_REG17__sm1_clip_to_outsm_fifo_full__SHIFT
  32960. CLIPPER_DEBUG_REG17__sm1_clip_vert_cnt_MASK
  32961. CLIPPER_DEBUG_REG17__sm1_clip_vert_cnt__SHIFT
  32962. CLIPPER_DEBUG_REG17__sm1_clprim_to_clip_prim_valid_MASK
  32963. CLIPPER_DEBUG_REG17__sm1_clprim_to_clip_prim_valid__SHIFT
  32964. CLIPPER_DEBUG_REG17__sm1_current_state_MASK
  32965. CLIPPER_DEBUG_REG17__sm1_current_state__SHIFT
  32966. CLIPPER_DEBUG_REG17__sm1_highest_priority_seq_MASK
  32967. CLIPPER_DEBUG_REG17__sm1_highest_priority_seq__SHIFT
  32968. CLIPPER_DEBUG_REG17__sm1_inv_to_clip_data_valid_0_MASK
  32969. CLIPPER_DEBUG_REG17__sm1_inv_to_clip_data_valid_0__SHIFT
  32970. CLIPPER_DEBUG_REG17__sm1_inv_to_clip_data_valid_1_MASK
  32971. CLIPPER_DEBUG_REG17__sm1_inv_to_clip_data_valid_1__SHIFT
  32972. CLIPPER_DEBUG_REG17__sm1_outputcliptoclipga_0_MASK
  32973. CLIPPER_DEBUG_REG17__sm1_outputcliptoclipga_0__SHIFT
  32974. CLIPPER_DEBUG_REG17__sm1_prim_end_state_MASK
  32975. CLIPPER_DEBUG_REG17__sm1_prim_end_state__SHIFT
  32976. CLIPPER_DEBUG_REG17__sm1_ps_expand_MASK
  32977. CLIPPER_DEBUG_REG17__sm1_ps_expand__SHIFT
  32978. CLIPPER_DEBUG_REG17__sm1_vertex_clip_cnt_MASK
  32979. CLIPPER_DEBUG_REG17__sm1_vertex_clip_cnt__SHIFT
  32980. CLIPPER_DEBUG_REG18__sm2_clip_to_clipga_clip_to_outsm_cnt_eq0_MASK
  32981. CLIPPER_DEBUG_REG18__sm2_clip_to_clipga_clip_to_outsm_cnt_eq0__SHIFT
  32982. CLIPPER_DEBUG_REG18__sm2_clip_to_outsm_fifo_full_MASK
  32983. CLIPPER_DEBUG_REG18__sm2_clip_to_outsm_fifo_full__SHIFT
  32984. CLIPPER_DEBUG_REG18__sm2_clip_vert_cnt_MASK
  32985. CLIPPER_DEBUG_REG18__sm2_clip_vert_cnt__SHIFT
  32986. CLIPPER_DEBUG_REG18__sm2_clprim_to_clip_prim_valid_MASK
  32987. CLIPPER_DEBUG_REG18__sm2_clprim_to_clip_prim_valid__SHIFT
  32988. CLIPPER_DEBUG_REG18__sm2_current_state_MASK
  32989. CLIPPER_DEBUG_REG18__sm2_current_state__SHIFT
  32990. CLIPPER_DEBUG_REG18__sm2_highest_priority_seq_MASK
  32991. CLIPPER_DEBUG_REG18__sm2_highest_priority_seq__SHIFT
  32992. CLIPPER_DEBUG_REG18__sm2_inv_to_clip_data_valid_0_MASK
  32993. CLIPPER_DEBUG_REG18__sm2_inv_to_clip_data_valid_0__SHIFT
  32994. CLIPPER_DEBUG_REG18__sm2_inv_to_clip_data_valid_1_MASK
  32995. CLIPPER_DEBUG_REG18__sm2_inv_to_clip_data_valid_1__SHIFT
  32996. CLIPPER_DEBUG_REG18__sm2_outputcliptoclipga_0_MASK
  32997. CLIPPER_DEBUG_REG18__sm2_outputcliptoclipga_0__SHIFT
  32998. CLIPPER_DEBUG_REG18__sm2_prim_end_state_MASK
  32999. CLIPPER_DEBUG_REG18__sm2_prim_end_state__SHIFT
  33000. CLIPPER_DEBUG_REG18__sm2_ps_expand_MASK
  33001. CLIPPER_DEBUG_REG18__sm2_ps_expand__SHIFT
  33002. CLIPPER_DEBUG_REG18__sm2_vertex_clip_cnt_MASK
  33003. CLIPPER_DEBUG_REG18__sm2_vertex_clip_cnt__SHIFT
  33004. CLIPPER_DEBUG_REG19__sm3_clip_to_clipga_clip_to_outsm_cnt_eq0_MASK
  33005. CLIPPER_DEBUG_REG19__sm3_clip_to_clipga_clip_to_outsm_cnt_eq0__SHIFT
  33006. CLIPPER_DEBUG_REG19__sm3_clip_to_outsm_fifo_full_MASK
  33007. CLIPPER_DEBUG_REG19__sm3_clip_to_outsm_fifo_full__SHIFT
  33008. CLIPPER_DEBUG_REG19__sm3_clip_vert_cnt_MASK
  33009. CLIPPER_DEBUG_REG19__sm3_clip_vert_cnt__SHIFT
  33010. CLIPPER_DEBUG_REG19__sm3_clprim_to_clip_prim_valid_MASK
  33011. CLIPPER_DEBUG_REG19__sm3_clprim_to_clip_prim_valid__SHIFT
  33012. CLIPPER_DEBUG_REG19__sm3_current_state_MASK
  33013. CLIPPER_DEBUG_REG19__sm3_current_state__SHIFT
  33014. CLIPPER_DEBUG_REG19__sm3_highest_priority_seq_MASK
  33015. CLIPPER_DEBUG_REG19__sm3_highest_priority_seq__SHIFT
  33016. CLIPPER_DEBUG_REG19__sm3_inv_to_clip_data_valid_0_MASK
  33017. CLIPPER_DEBUG_REG19__sm3_inv_to_clip_data_valid_0__SHIFT
  33018. CLIPPER_DEBUG_REG19__sm3_inv_to_clip_data_valid_1_MASK
  33019. CLIPPER_DEBUG_REG19__sm3_inv_to_clip_data_valid_1__SHIFT
  33020. CLIPPER_DEBUG_REG19__sm3_outputcliptoclipga_0_MASK
  33021. CLIPPER_DEBUG_REG19__sm3_outputcliptoclipga_0__SHIFT
  33022. CLIPPER_DEBUG_REG19__sm3_prim_end_state_MASK
  33023. CLIPPER_DEBUG_REG19__sm3_prim_end_state__SHIFT
  33024. CLIPPER_DEBUG_REG19__sm3_ps_expand_MASK
  33025. CLIPPER_DEBUG_REG19__sm3_ps_expand__SHIFT
  33026. CLIPPER_DEBUG_REG19__sm3_vertex_clip_cnt_MASK
  33027. CLIPPER_DEBUG_REG19__sm3_vertex_clip_cnt__SHIFT
  33028. CLIPT_MIN_HASH_BUCKETS
  33029. CLIPWITHOUTMERGE
  33030. CLIP_CHECK_INTERVAL
  33031. CLIP_DEFAULT_IDLETIMER
  33032. CLIP_EN
  33033. CLIP_FORMAT_CTRL
  33034. CLIP_LEFT_RIGHT
  33035. CLIP_LOWY_HIGHY
  33036. CLIP_OFST
  33037. CLIP_POINT
  33038. CLIP_POINT_X
  33039. CLIP_POINT_Y
  33040. CLIP_SIZE
  33041. CLIP_SIZE_HEIGHT
  33042. CLIP_SIZE_WIDTH
  33043. CLIP_VCC
  33044. CLIP_VTX_REORDER_ENA
  33045. CLI_FBI
  33046. CLI_FBI_SMP
  33047. CLK
  33048. CLK125_BYPASS_EN
  33049. CLK1MIS
  33050. CLK1_CLK0_BYPASS_CNTL__CLK0_BYPASS_DIV_MASK
  33051. CLK1_CLK0_BYPASS_CNTL__CLK0_BYPASS_DIV__SHIFT
  33052. CLK1_CLK0_BYPASS_CNTL__CLK0_BYPASS_SEL_MASK
  33053. CLK1_CLK0_BYPASS_CNTL__CLK0_BYPASS_SEL__SHIFT
  33054. CLK1_CLK0_CURRENT_CNT__CURRENT_COUNT_MASK
  33055. CLK1_CLK0_CURRENT_CNT__CURRENT_COUNT__SHIFT
  33056. CLK1_CLK1_BYPASS_CNTL__CLK1_BYPASS_DIV_MASK
  33057. CLK1_CLK1_BYPASS_CNTL__CLK1_BYPASS_DIV__SHIFT
  33058. CLK1_CLK1_BYPASS_CNTL__CLK1_BYPASS_SEL_MASK
  33059. CLK1_CLK1_BYPASS_CNTL__CLK1_BYPASS_SEL__SHIFT
  33060. CLK1_CLK1_CURRENT_CNT__CURRENT_COUNT_MASK
  33061. CLK1_CLK1_CURRENT_CNT__CURRENT_COUNT__SHIFT
  33062. CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_DIV_MASK
  33063. CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_DIV__SHIFT
  33064. CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL_MASK
  33065. CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL__SHIFT
  33066. CLK1_CLK2_CURRENT_CNT__CURRENT_COUNT_MASK
  33067. CLK1_CLK2_CURRENT_CNT__CURRENT_COUNT__SHIFT
  33068. CLK1_CLK3_ALLOW_DS__CLK3_ALLOW_DS_MASK
  33069. CLK1_CLK3_ALLOW_DS__CLK3_ALLOW_DS__SHIFT
  33070. CLK1_CLK3_BYPASS_CNTL__CLK3_BYPASS_DIV_MASK
  33071. CLK1_CLK3_BYPASS_CNTL__CLK3_BYPASS_DIV__SHIFT
  33072. CLK1_CLK3_BYPASS_CNTL__CLK3_BYPASS_SEL_MASK
  33073. CLK1_CLK3_BYPASS_CNTL__CLK3_BYPASS_SEL__SHIFT
  33074. CLK1_CLK3_CURRENT_CNT__CURRENT_COUNT_MASK
  33075. CLK1_CLK3_CURRENT_CNT__CURRENT_COUNT__SHIFT
  33076. CLK1_CLK3_DS_CNTL__CLK3_DS_DIV_ID_MASK
  33077. CLK1_CLK3_DS_CNTL__CLK3_DS_DIV_ID__SHIFT
  33078. CLK1_CLK_PLL_REQ__FbMult_frac_MASK
  33079. CLK1_CLK_PLL_REQ__FbMult_frac__SHIFT
  33080. CLK1_CLK_PLL_REQ__FbMult_int_MASK
  33081. CLK1_CLK_PLL_REQ__FbMult_int__SHIFT
  33082. CLK1_CLK_PLL_REQ__PllSpineDiv_MASK
  33083. CLK1_CLK_PLL_REQ__PllSpineDiv__SHIFT
  33084. CLK20_REG_FIELD_LIST
  33085. CLK27M
  33086. CLK2MIS
  33087. CLK312_EN_LBN
  33088. CLK32KOUT2_EN
  33089. CLK3_0_CLK3_CLK2_DFS_CNTL__CLK2_DIVIDER_MASK
  33090. CLK3_0_CLK3_CLK2_DFS_CNTL__CLK2_DIVIDER__SHIFT
  33091. CLK3_0_CLK3_CLK_PLL_REQ__FbMult_frac_MASK
  33092. CLK3_0_CLK3_CLK_PLL_REQ__FbMult_frac__SHIFT
  33093. CLK3_0_CLK3_CLK_PLL_REQ__FbMult_int_MASK
  33094. CLK3_0_CLK3_CLK_PLL_REQ__FbMult_int__SHIFT
  33095. CLK3_0_CLK3_CLK_PLL_REQ__PllSpineDiv_MASK
  33096. CLK3_0_CLK3_CLK_PLL_REQ__PllSpineDiv__SHIFT
  33097. CLK42X_SPEED_1536KHZ
  33098. CLK42X_SPEED_1544KHZ
  33099. CLK42X_SPEED_2048KHZ
  33100. CLK42X_SPEED_4096KHZ
  33101. CLK42X_SPEED_512KHZ
  33102. CLK42X_SPEED_8192KHZ
  33103. CLK42X_SPEED_EXP
  33104. CLK46X_SPEED_1536KHZ
  33105. CLK46X_SPEED_1544KHZ
  33106. CLK46X_SPEED_2048KHZ
  33107. CLK46X_SPEED_4096KHZ
  33108. CLK46X_SPEED_512KHZ
  33109. CLK46X_SPEED_8192KHZ
  33110. CLK48M
  33111. CLKA
  33112. CLKAUDIOAO_MARK
  33113. CLKAUDIOBO_MARK
  33114. CLKA_HWID
  33115. CLKB
  33116. CLKBUF_L_EN
  33117. CLKBUF_SEL
  33118. CLKBY7
  33119. CLKB_HWID
  33120. CLKC
  33121. CLKCFG
  33122. CLKCFG0_PERI_CLK_SEL
  33123. CLKCFG_BAUDDIV
  33124. CLKCFG_CANCLK_MASK
  33125. CLKCFG_CAN_50MHZ
  33126. CLKCFG_FASTBUS
  33127. CLKCFG_FCS
  33128. CLKCFG_FDIV_MASK
  33129. CLKCFG_FDIV_USB_VAL
  33130. CLKCFG_FFRAC_MASK
  33131. CLKCFG_FFRAC_USB_VAL
  33132. CLKCFG_FSB_1067
  33133. CLKCFG_FSB_1067_ALT
  33134. CLKCFG_FSB_1333
  33135. CLKCFG_FSB_1333_ALT
  33136. CLKCFG_FSB_400
  33137. CLKCFG_FSB_533
  33138. CLKCFG_FSB_667
  33139. CLKCFG_FSB_800
  33140. CLKCFG_FSB_MASK
  33141. CLKCFG_HALFTURBO
  33142. CLKCFG_MEM_533
  33143. CLKCFG_MEM_667
  33144. CLKCFG_MEM_800
  33145. CLKCFG_MEM_MASK
  33146. CLKCFG_PLL2VCO
  33147. CLKCFG_REG_OFFSET
  33148. CLKCFG_SRAM_CS_N_WDT
  33149. CLKCFG_TURBO
  33150. CLKCFG_UARTCLKSEL
  33151. CLKCFG_UART_25MHZ
  33152. CLKCFG_UART_48MHZ
  33153. CLKCFG_UART_MASK
  33154. CLKCON
  33155. CLKCONV
  33156. CLKCR1
  33157. CLKCR1_CKRA
  33158. CLKCR1_OSCP
  33159. CLKCR1_OSCS
  33160. CLKCR1_PLLOS
  33161. CLKCR1_PLLP
  33162. CLKCR1_PLLSS_CRYSTAL
  33163. CLKCR1_PLLSS_MASK
  33164. CLKCR1_PLLSS_PCI
  33165. CLKCR1_PLLSS_RESERVED
  33166. CLKCR1_PLLSS_SERIAL
  33167. CLKCR1_SWCE
  33168. CLKCR2
  33169. CLKCR2_PDIVS_1
  33170. CLKCR2_PDIVS_16
  33171. CLKCR2_PDIVS_2
  33172. CLKCR2_PDIVS_4
  33173. CLKCR2_PDIVS_7
  33174. CLKCR2_PDIVS_8
  33175. CLKCR2_PDIVS_MASK
  33176. CLKCR3
  33177. CLKCTL
  33178. CLKCTL_MASK
  33179. CLKCTL_MCLK_EXT
  33180. CLKCTL_PWR_ON
  33181. CLKCTRL
  33182. CLKCTRL_DEFAULT
  33183. CLKCTRL_IDLEST_DISABLED
  33184. CLKCTRL_IDLEST_FUNCTIONAL
  33185. CLKCTRL_IDLEST_INTERFACE_IDLE
  33186. CLKCTRL_IDLEST_INTRANSITION
  33187. CLKC_RESET_A5_ABP_SOFT_RESET
  33188. CLKC_RESET_A5_AXI_SOFT_RESET
  33189. CLKC_RESET_A5_GLOBAL_RESET
  33190. CLKC_RESET_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET
  33191. CLKC_RESET_AXI_64_TO_128_BRIDGE_MMC_SOFT_RESET
  33192. CLKC_RESET_CPU0_SOFT_RESET
  33193. CLKC_RESET_CPU1_SOFT_RESET
  33194. CLKC_RESET_CPU2_SOFT_RESET
  33195. CLKC_RESET_CPU3_SOFT_RESET
  33196. CLKC_RESET_L2_CACHE_SOFT_RESET
  33197. CLKC_RESET_SCU_SOFT_RESET
  33198. CLKC_RESET_VID_CLK_CNTL_SOFT_RESET
  33199. CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_POST
  33200. CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_PRE
  33201. CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_POST
  33202. CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_PRE
  33203. CLKDEL_NT
  33204. CLKDEL_TE
  33205. CLKDEV_CON_ID
  33206. CLKDEV_DEV_ID
  33207. CLKDEV_EMMC_DATA
  33208. CLKDEV_ICK_ID
  33209. CLKDEV_INIT
  33210. CLKDEV_MMC_DATA
  33211. CLKDIV0
  33212. CLKDIV1
  33213. CLKDIV2
  33214. CLKDIV2_RATIO
  33215. CLKDIVN
  33216. CLKDIV_256
  33217. CLKDIV_4
  33218. CLKDIV_IN_MASK
  33219. CLKDIV_IN_SHIFT
  33220. CLKDIV_MAX
  33221. CLKDM_ACTIVE_WITH_MPU
  33222. CLKDM_CAN_DISABLE_AUTO
  33223. CLKDM_CAN_ENABLE_AUTO
  33224. CLKDM_CAN_FORCE_SLEEP
  33225. CLKDM_CAN_FORCE_WAKEUP
  33226. CLKDM_CAN_HWSUP
  33227. CLKDM_CAN_HWSUP_SWSUP
  33228. CLKDM_CAN_SWSUP
  33229. CLKDM_MISSING_IDLE_REPORTING
  33230. CLKDM_NO_AUTODEPS
  33231. CLKDRVSTR2
  33232. CLKDVDR_PXCKDLY
  33233. CLKDVDR_PXCKEN
  33234. CLKDVDR_PXCKINV
  33235. CLKDVDR_PXCLK_MASK
  33236. CLKD_MASK
  33237. CLKD_MAX
  33238. CLKD_OTP
  33239. CLKD_OTP_SHIFT
  33240. CLKD_SHIFT
  33241. CLKEN_ADDR
  33242. CLKEN_AUTOSENSE_OFF_MASK
  33243. CLKEN_CLKEN_MASK
  33244. CLKEN_M_SHIFT
  33245. CLKEN_N_SHIFT
  33246. CLKEN_OFFSET
  33247. CLKEVT
  33248. CLKEXTFREE
  33249. CLKE_MASK
  33250. CLKF
  33251. CLKFBOUT_100_MHZ
  33252. CLKFBOUT_200_MHZ
  33253. CLKFRAC
  33254. CLKFRAC_MASK
  33255. CLKF_AM35XX
  33256. CLKF_CLKDM
  33257. CLKF_CORE
  33258. CLKF_DSS
  33259. CLKF_F10MHZ
  33260. CLKF_F12MHZ
  33261. CLKF_F17MHZ
  33262. CLKF_F22MHZ
  33263. CLKF_F27MHZ
  33264. CLKF_F32MHZ
  33265. CLKF_F37MHZ
  33266. CLKF_HSDIV
  33267. CLKF_HSOTGUSB
  33268. CLKF_HW_SUP
  33269. CLKF_INDEX_POWER_OF_TWO
  33270. CLKF_INDEX_STARTS_AT_ONE
  33271. CLKF_INTERFACE
  33272. CLKF_J_TYPE
  33273. CLKF_LOCK
  33274. CLKF_LOW_POWER_BYPASS
  33275. CLKF_LOW_POWER_STOP
  33276. CLKF_MASK
  33277. CLKF_NO_IDLEST
  33278. CLKF_NO_WAIT
  33279. CLKF_OMAP3
  33280. CLKF_PER
  33281. CLKF_RD
  33282. CLKF_SET_BIT_TO_DISABLE
  33283. CLKF_SET_RATE_PARENT
  33284. CLKF_SOC_DRA72
  33285. CLKF_SOC_DRA74
  33286. CLKF_SOC_DRA76
  33287. CLKF_SOC_MASK
  33288. CLKF_SOC_NONSEC
  33289. CLKF_SSI
  33290. CLKF_SW_SUP
  33291. CLKF_VAL
  33292. CLKF_WAIT
  33293. CLKGATE_BASE_MODE
  33294. CLKGATE_DIS_PSL
  33295. CLKGATE_SEPERATED_DISABLE
  33296. CLKGATE_SEPERATED_ENABLE
  33297. CLKGATE_SEPERATED_STATUS
  33298. CLKGATE_SM_MODE
  33299. CLKGDV
  33300. CLKGEN_FIELD
  33301. CLKGEN_READ
  33302. CLKGEN_REG_ASM_BASE
  33303. CLKGEN_REG_BASE
  33304. CLKGEN_WRITE
  33305. CLKGR_UDC
  33306. CLKI
  33307. CLKID_32K_CLK
  33308. CLKID_32K_CLK_DIV
  33309. CLKID_32K_CLK_SEL
  33310. CLKID_ABUF
  33311. CLKID_ADC
  33312. CLKID_AHBAPB
  33313. CLKID_AHB_ADC0
  33314. CLKID_AHB_ARB0
  33315. CLKID_AHB_CAMIF
  33316. CLKID_AHB_CAN0
  33317. CLKID_AHB_CAN1
  33318. CLKID_AHB_CTRL_BUS
  33319. CLKID_AHB_DAC0
  33320. CLKID_AHB_DATA_BUS
  33321. CLKID_AHB_DMA0
  33322. CLKID_AHB_DMA1
  33323. CLKID_AHB_EMI
  33324. CLKID_AHB_GPIO
  33325. CLKID_AHB_I2C0
  33326. CLKID_AHB_I2C1
  33327. CLKID_AHB_I2S0
  33328. CLKID_AHB_I2S1
  33329. CLKID_AHB_IOCONFIG
  33330. CLKID_AHB_IRQ
  33331. CLKID_AHB_LCD
  33332. CLKID_AHB_LCDIF
  33333. CLKID_AHB_LED
  33334. CLKID_AHB_MAC
  33335. CLKID_AHB_MAC1
  33336. CLKID_AHB_MPWM
  33337. CLKID_AHB_NAND
  33338. CLKID_AHB_QEI
  33339. CLKID_AHB_QUADSPI0
  33340. CLKID_AHB_RAM
  33341. CLKID_AHB_ROM
  33342. CLKID_AHB_RTC
  33343. CLKID_AHB_SPI0
  33344. CLKID_AHB_SPI1
  33345. CLKID_AHB_SSP0
  33346. CLKID_AHB_TIMER0
  33347. CLKID_AHB_TIMER1
  33348. CLKID_AHB_TIMER2
  33349. CLKID_AHB_TIMER3
  33350. CLKID_AHB_UART0
  33351. CLKID_AHB_UART1
  33352. CLKID_AHB_UART2
  33353. CLKID_AHB_UART3
  33354. CLKID_AHB_UART4
  33355. CLKID_AHB_UART5
  33356. CLKID_AHB_UART6
  33357. CLKID_AHB_UART7
  33358. CLKID_AHB_UART8
  33359. CLKID_AHB_UART9
  33360. CLKID_AHB_USB0
  33361. CLKID_AHB_USB1
  33362. CLKID_AHB_WDT
  33363. CLKID_AIFIFO2
  33364. CLKID_AIU
  33365. CLKID_AIU_GLUE
  33366. CLKID_AMCLK
  33367. CLKID_AOCLK
  33368. CLKID_AOCLK_GATE
  33369. CLKID_AO_32K
  33370. CLKID_AO_32K_DIV
  33371. CLKID_AO_32K_PRE
  33372. CLKID_AO_32K_SEL
  33373. CLKID_AO_AHB
  33374. CLKID_AO_AHB_BUS
  33375. CLKID_AO_AHB_SRAM
  33376. CLKID_AO_CEC
  33377. CLKID_AO_CEC_32K
  33378. CLKID_AO_CEC_DIV
  33379. CLKID_AO_CEC_PRE
  33380. CLKID_AO_CEC_SEL
  33381. CLKID_AO_CLK81
  33382. CLKID_AO_CTS_OSCIN
  33383. CLKID_AO_CTS_RTC_OSCIN
  33384. CLKID_AO_I2C
  33385. CLKID_AO_I2C_M0
  33386. CLKID_AO_I2C_MASTER
  33387. CLKID_AO_I2C_S0
  33388. CLKID_AO_I2C_SLAVE
  33389. CLKID_AO_IFACE
  33390. CLKID_AO_IR_BLASTER
  33391. CLKID_AO_IR_IN
  33392. CLKID_AO_IR_OUT
  33393. CLKID_AO_M3
  33394. CLKID_AO_M4_FCLK
  33395. CLKID_AO_M4_HCLK
  33396. CLKID_AO_MAILBOX
  33397. CLKID_AO_MEDIA_CPU
  33398. CLKID_AO_PROD_I2C
  33399. CLKID_AO_REMOTE
  33400. CLKID_AO_RTI
  33401. CLKID_AO_SAR_ADC
  33402. CLKID_AO_SAR_ADC_CLK
  33403. CLKID_AO_SAR_ADC_DIV
  33404. CLKID_AO_SAR_ADC_SEL
  33405. CLKID_AO_UART
  33406. CLKID_AO_UART1
  33407. CLKID_AO_UART2
  33408. CLKID_APB
  33409. CLKID_APB_SEL
  33410. CLKID_APP
  33411. CLKID_ARC
  33412. CLKID_ASSIST_MISC
  33413. CLKID_ASYNC_FIFO
  33414. CLKID_AUDIO
  33415. CLKID_AUDIO0
  33416. CLKID_AUDIO1
  33417. CLKID_AUDIO2
  33418. CLKID_AUDIO3
  33419. CLKID_AUDIOHD
  33420. CLKID_AUDIO_CODEC
  33421. CLKID_AUDIO_IFIFO
  33422. CLKID_AUDIO_LOCKER
  33423. CLKID_AXI
  33424. CLKID_AXI_SEL
  33425. CLKID_BLKMV
  33426. CLKID_BOOT_ROM
  33427. CLKID_BT656
  33428. CLKID_CFG
  33429. CLKID_CLK81
  33430. CLKID_CLK81_A53
  33431. CLKID_CLK81_A9
  33432. CLKID_CPU
  33433. CLKID_CPU1_CLK
  33434. CLKID_CPU2_CLK
  33435. CLKID_CPU3_CLK
  33436. CLKID_CPUB_CLK
  33437. CLKID_CPUB_CLK_APB
  33438. CLKID_CPUB_CLK_APB_SEL
  33439. CLKID_CPUB_CLK_ATB
  33440. CLKID_CPUB_CLK_ATB_SEL
  33441. CLKID_CPUB_CLK_AXI
  33442. CLKID_CPUB_CLK_AXI_SEL
  33443. CLKID_CPUB_CLK_DIV16
  33444. CLKID_CPUB_CLK_DIV16_EN
  33445. CLKID_CPUB_CLK_DIV2
  33446. CLKID_CPUB_CLK_DIV3
  33447. CLKID_CPUB_CLK_DIV4
  33448. CLKID_CPUB_CLK_DIV5
  33449. CLKID_CPUB_CLK_DIV6
  33450. CLKID_CPUB_CLK_DIV7
  33451. CLKID_CPUB_CLK_DIV8
  33452. CLKID_CPUB_CLK_DYN
  33453. CLKID_CPUB_CLK_DYN0
  33454. CLKID_CPUB_CLK_DYN0_DIV
  33455. CLKID_CPUB_CLK_DYN0_SEL
  33456. CLKID_CPUB_CLK_DYN1
  33457. CLKID_CPUB_CLK_DYN1_DIV
  33458. CLKID_CPUB_CLK_DYN1_SEL
  33459. CLKID_CPUB_CLK_TRACE
  33460. CLKID_CPUB_CLK_TRACE_SEL
  33461. CLKID_CPUCLK
  33462. CLKID_CPU_CLK
  33463. CLKID_CPU_CLK_APB
  33464. CLKID_CPU_CLK_APB_DIV
  33465. CLKID_CPU_CLK_ATB
  33466. CLKID_CPU_CLK_ATB_DIV
  33467. CLKID_CPU_CLK_AXI
  33468. CLKID_CPU_CLK_AXI_DIV
  33469. CLKID_CPU_CLK_DIV16
  33470. CLKID_CPU_CLK_DIV16_EN
  33471. CLKID_CPU_CLK_DIV2
  33472. CLKID_CPU_CLK_DIV3
  33473. CLKID_CPU_CLK_DIV4
  33474. CLKID_CPU_CLK_DIV5
  33475. CLKID_CPU_CLK_DIV6
  33476. CLKID_CPU_CLK_DIV7
  33477. CLKID_CPU_CLK_DIV8
  33478. CLKID_CPU_CLK_DYN
  33479. CLKID_CPU_CLK_DYN0
  33480. CLKID_CPU_CLK_DYN0_DIV
  33481. CLKID_CPU_CLK_DYN0_SEL
  33482. CLKID_CPU_CLK_DYN1
  33483. CLKID_CPU_CLK_DYN1_DIV
  33484. CLKID_CPU_CLK_DYN1_SEL
  33485. CLKID_CPU_CLK_TRACE
  33486. CLKID_CPU_CLK_TRACE_DIV
  33487. CLKID_CPU_IN_DIV2
  33488. CLKID_CPU_IN_DIV3
  33489. CLKID_CPU_IN_SEL
  33490. CLKID_CPU_SCALE_DIV
  33491. CLKID_CPU_SCALE_OUT_SEL
  33492. CLKID_CTS_AMCLK
  33493. CLKID_CTS_AMCLK_DIV
  33494. CLKID_CTS_AMCLK_SEL
  33495. CLKID_CTS_ENCI
  33496. CLKID_CTS_ENCI_SEL
  33497. CLKID_CTS_ENCL
  33498. CLKID_CTS_ENCL_SEL
  33499. CLKID_CTS_ENCP
  33500. CLKID_CTS_ENCP_SEL
  33501. CLKID_CTS_ENCT
  33502. CLKID_CTS_ENCT_SEL
  33503. CLKID_CTS_I958
  33504. CLKID_CTS_MCLK_I958
  33505. CLKID_CTS_MCLK_I958_DIV
  33506. CLKID_CTS_MCLK_I958_SEL
  33507. CLKID_CTS_VDAC
  33508. CLKID_CTS_VDAC0
  33509. CLKID_CTS_VDAC0_SEL
  33510. CLKID_CTS_VDAC_SEL
  33511. CLKID_DAC_CLK
  33512. CLKID_DDR
  33513. CLKID_DEMUX
  33514. CLKID_DMA
  33515. CLKID_DOS
  33516. CLKID_DOS_PARSER
  33517. CLKID_DRMFIGO
  33518. CLKID_DSU_CLK
  33519. CLKID_DSU_CLK_DYN
  33520. CLKID_DSU_CLK_DYN0
  33521. CLKID_DSU_CLK_DYN0_DIV
  33522. CLKID_DSU_CLK_DYN0_SEL
  33523. CLKID_DSU_CLK_DYN1
  33524. CLKID_DSU_CLK_DYN1_DIV
  33525. CLKID_DSU_CLK_DYN1_SEL
  33526. CLKID_DSU_CLK_FINAL
  33527. CLKID_DVIN
  33528. CLKID_EDP
  33529. CLKID_EFUSE
  33530. CLKID_ENC480P
  33531. CLKID_ETH
  33532. CLKID_ETH_PHY
  33533. CLKID_FCLK_DIV2
  33534. CLKID_FCLK_DIV2P5
  33535. CLKID_FCLK_DIV2P5_DIV
  33536. CLKID_FCLK_DIV2_DIV
  33537. CLKID_FCLK_DIV3
  33538. CLKID_FCLK_DIV3_DIV
  33539. CLKID_FCLK_DIV4
  33540. CLKID_FCLK_DIV4_DIV
  33541. CLKID_FCLK_DIV5
  33542. CLKID_FCLK_DIV5_DIV
  33543. CLKID_FCLK_DIV7
  33544. CLKID_FCLK_DIV7_DIV
  33545. CLKID_FIXED_PLL
  33546. CLKID_FIXED_PLL_DCO
  33547. CLKID_G2D
  33548. CLKID_GC360
  33549. CLKID_GCLK_VENCI_INT
  33550. CLKID_GCLK_VENCI_INT0
  33551. CLKID_GCLK_VENCI_INT1
  33552. CLKID_GCLK_VENCL_INT
  33553. CLKID_GCLK_VENCP_INT
  33554. CLKID_GEN_CLK
  33555. CLKID_GEN_CLK_DIV
  33556. CLKID_GEN_CLK_SEL
  33557. CLKID_GETH0
  33558. CLKID_GETH1
  33559. CLKID_GFX
  33560. CLKID_GFX2D
  33561. CLKID_GFX2DAXI
  33562. CLKID_GFX3D_CORE
  33563. CLKID_GFX3D_EXTRA
  33564. CLKID_GFX3D_SYS
  33565. CLKID_GIC
  33566. CLKID_GP0_PLL
  33567. CLKID_GP0_PLL_DCO
  33568. CLKID_GP1_PLL
  33569. CLKID_GP1_PLL_DCO
  33570. CLKID_GP_PLL
  33571. CLKID_GP_PLL_DCO
  33572. CLKID_HDMI
  33573. CLKID_HDMI_DIV
  33574. CLKID_HDMI_INTR_SYNC
  33575. CLKID_HDMI_PCLK
  33576. CLKID_HDMI_PLL
  33577. CLKID_HDMI_PLL_DCO
  33578. CLKID_HDMI_PLL_HDMI_OUT
  33579. CLKID_HDMI_PLL_LVDS_OUT
  33580. CLKID_HDMI_PLL_OD
  33581. CLKID_HDMI_PLL_OD2
  33582. CLKID_HDMI_PLL_PRE_MULT
  33583. CLKID_HDMI_SEL
  33584. CLKID_HDMI_SYS
  33585. CLKID_HDMI_SYS_DIV
  33586. CLKID_HDMI_SYS_SEL
  33587. CLKID_HDMI_TX
  33588. CLKID_HDMI_TX_PIXEL
  33589. CLKID_HDMI_TX_PIXEL_SEL
  33590. CLKID_HDMI_TX_SEL
  33591. CLKID_HIFI_PLL
  33592. CLKID_HIFI_PLL_DCO
  33593. CLKID_HIU_IFACE
  33594. CLKID_HTX_HDCP22
  33595. CLKID_HTX_PCLK
  33596. CLKID_I2C
  33597. CLKID_I2S_OUT
  33598. CLKID_I2S_SPDIF
  33599. CLKID_IEC958
  33600. CLKID_IEC958_GATE
  33601. CLKID_ISA
  33602. CLKID_L2_DRAM
  33603. CLKID_L2_DRAM_SEL
  33604. CLKID_MALI
  33605. CLKID_MALI_0
  33606. CLKID_MALI_0_DIV
  33607. CLKID_MALI_0_SEL
  33608. CLKID_MALI_1
  33609. CLKID_MALI_1_DIV
  33610. CLKID_MALI_1_SEL
  33611. CLKID_MIPI_DSI_HOST
  33612. CLKID_MIPI_DSI_PHY
  33613. CLKID_MIPI_ENABLE
  33614. CLKID_MIXER
  33615. CLKID_MIXER_IFACE
  33616. CLKID_MMC_PCLK
  33617. CLKID_MPEG_DIV
  33618. CLKID_MPEG_SEL
  33619. CLKID_MPLL0
  33620. CLKID_MPLL0_DIV
  33621. CLKID_MPLL1
  33622. CLKID_MPLL1_DIV
  33623. CLKID_MPLL2
  33624. CLKID_MPLL2_DIV
  33625. CLKID_MPLL3
  33626. CLKID_MPLL3_DIV
  33627. CLKID_MPLL_50M
  33628. CLKID_MPLL_50M_DIV
  33629. CLKID_MPLL_PREDIV
  33630. CLKID_NAND
  33631. CLKID_NAND_CLK
  33632. CLKID_NAND_DIV
  33633. CLKID_NAND_SEL
  33634. CLKID_NFC
  33635. CLKID_NFC_ECC
  33636. CLKID_PARSER
  33637. CLKID_PBRIDGE
  33638. CLKID_PCIE
  33639. CLKID_PCIE_A
  33640. CLKID_PCIE_B
  33641. CLKID_PCIE_CML_EN0
  33642. CLKID_PCIE_CML_EN1
  33643. CLKID_PCIE_COMB
  33644. CLKID_PCIE_MUX
  33645. CLKID_PCIE_PHY
  33646. CLKID_PCIE_PLL
  33647. CLKID_PCIE_PLL_DCO
  33648. CLKID_PCIE_PLL_DCO_DIV2
  33649. CLKID_PCIE_PLL_OD
  33650. CLKID_PCIE_REF
  33651. CLKID_PCUBE
  33652. CLKID_PERIF
  33653. CLKID_PERIPH
  33654. CLKID_PERIPHS
  33655. CLKID_PERIPH_SEL
  33656. CLKID_PL301
  33657. CLKID_PLL_FIXED
  33658. CLKID_PLL_FIXED_DCO
  33659. CLKID_PLL_SYS
  33660. CLKID_PLL_SYS_DCO
  33661. CLKID_PLL_VID
  33662. CLKID_RESET
  33663. CLKID_RESET_SEC
  33664. CLKID_RNG0
  33665. CLKID_RNG1
  33666. CLKID_ROM_BOOT
  33667. CLKID_SANA
  33668. CLKID_SAR_ADC
  33669. CLKID_SAR_ADC_CLK
  33670. CLKID_SAR_ADC_DIV
  33671. CLKID_SAR_ADC_SEL
  33672. CLKID_SATA
  33673. CLKID_SD
  33674. CLKID_SDHC
  33675. CLKID_SDIO
  33676. CLKID_SDIO0
  33677. CLKID_SDIO0XIN
  33678. CLKID_SDIO1
  33679. CLKID_SDIO1XIN
  33680. CLKID_SDIO_DLLMST
  33681. CLKID_SD_EMMC_A
  33682. CLKID_SD_EMMC_A_CLK0
  33683. CLKID_SD_EMMC_A_CLK0_DIV
  33684. CLKID_SD_EMMC_A_CLK0_SEL
  33685. CLKID_SD_EMMC_B
  33686. CLKID_SD_EMMC_B_CLK0
  33687. CLKID_SD_EMMC_B_CLK0_DIV
  33688. CLKID_SD_EMMC_B_CLK0_SEL
  33689. CLKID_SD_EMMC_C
  33690. CLKID_SD_EMMC_C_CLK0
  33691. CLKID_SD_EMMC_C_CLK0_DIV
  33692. CLKID_SD_EMMC_C_CLK0_SEL
  33693. CLKID_SEC_AHB_AHB3_BRIDGE
  33694. CLKID_SEC_AHB_APB3
  33695. CLKID_SMART_CARD
  33696. CLKID_SMEMC
  33697. CLKID_SPI
  33698. CLKID_SPICC
  33699. CLKID_SPICC0
  33700. CLKID_SPICC1
  33701. CLKID_STREAM
  33702. CLKID_SYS
  33703. CLKID_SYS1_PLL
  33704. CLKID_SYS1_PLL_DCO
  33705. CLKID_SYS1_PLL_DIV16
  33706. CLKID_SYS1_PLL_DIV16_EN
  33707. CLKID_SYS_ADCANA
  33708. CLKID_SYS_AHB
  33709. CLKID_SYS_CAMM
  33710. CLKID_SYS_CLKOUT
  33711. CLKID_SYS_CPU
  33712. CLKID_SYS_I2S0M
  33713. CLKID_SYS_I2S0S
  33714. CLKID_SYS_I2S1M
  33715. CLKID_SYS_I2S1S
  33716. CLKID_SYS_LCD
  33717. CLKID_SYS_MAC
  33718. CLKID_SYS_NAND
  33719. CLKID_SYS_PLL
  33720. CLKID_SYS_PLL_DCO
  33721. CLKID_SYS_PLL_DIV16
  33722. CLKID_SYS_PLL_DIV16_EN
  33723. CLKID_SYS_QUADSPI
  33724. CLKID_SYS_SPI0
  33725. CLKID_SYS_SPI1
  33726. CLKID_SYS_SSP0
  33727. CLKID_SYS_TRACE
  33728. CLKID_SYS_UART0
  33729. CLKID_SYS_UART1
  33730. CLKID_SYS_UART2
  33731. CLKID_SYS_UART3
  33732. CLKID_SYS_UART4
  33733. CLKID_SYS_UART5
  33734. CLKID_SYS_UART6
  33735. CLKID_SYS_UART7
  33736. CLKID_SYS_UART8
  33737. CLKID_SYS_UART9
  33738. CLKID_SYS_WDT
  33739. CLKID_TS
  33740. CLKID_TS_DIV
  33741. CLKID_TWD
  33742. CLKID_UART0
  33743. CLKID_UART1
  33744. CLKID_UART2
  33745. CLKID_UNUSED
  33746. CLKID_USB
  33747. CLKID_USB0
  33748. CLKID_USB0_DDR_BRIDGE
  33749. CLKID_USB1
  33750. CLKID_USB1_DDR_BRIDGE
  33751. CLKID_USB2
  33752. CLKID_USB3
  33753. CLKID_VAPB
  33754. CLKID_VAPB_0
  33755. CLKID_VAPB_0_DIV
  33756. CLKID_VAPB_0_SEL
  33757. CLKID_VAPB_1
  33758. CLKID_VAPB_1_DIV
  33759. CLKID_VAPB_1_SEL
  33760. CLKID_VAPB_SEL
  33761. CLKID_VCLK
  33762. CLKID_VCLK2
  33763. CLKID_VCLK2_DIV
  33764. CLKID_VCLK2_DIV1
  33765. CLKID_VCLK2_DIV12
  33766. CLKID_VCLK2_DIV12_DIV
  33767. CLKID_VCLK2_DIV12_EN
  33768. CLKID_VCLK2_DIV2
  33769. CLKID_VCLK2_DIV2_DIV
  33770. CLKID_VCLK2_DIV2_EN
  33771. CLKID_VCLK2_DIV4
  33772. CLKID_VCLK2_DIV4_DIV
  33773. CLKID_VCLK2_DIV4_EN
  33774. CLKID_VCLK2_DIV6
  33775. CLKID_VCLK2_DIV6_DIV
  33776. CLKID_VCLK2_DIV6_EN
  33777. CLKID_VCLK2_ENCI
  33778. CLKID_VCLK2_ENCL
  33779. CLKID_VCLK2_ENCP
  33780. CLKID_VCLK2_ENCT
  33781. CLKID_VCLK2_INPUT
  33782. CLKID_VCLK2_IN_EN
  33783. CLKID_VCLK2_IN_SEL
  33784. CLKID_VCLK2_OTHER
  33785. CLKID_VCLK2_OTHER1
  33786. CLKID_VCLK2_SEL
  33787. CLKID_VCLK2_VENCI0
  33788. CLKID_VCLK2_VENCI1
  33789. CLKID_VCLK2_VENCL
  33790. CLKID_VCLK2_VENCLMCC
  33791. CLKID_VCLK2_VENCLMMC
  33792. CLKID_VCLK2_VENCP0
  33793. CLKID_VCLK2_VENCP1
  33794. CLKID_VCLK2_VENCT0
  33795. CLKID_VCLK2_VENCT1
  33796. CLKID_VCLK_DIV
  33797. CLKID_VCLK_DIV1
  33798. CLKID_VCLK_DIV12
  33799. CLKID_VCLK_DIV12_DIV
  33800. CLKID_VCLK_DIV12_EN
  33801. CLKID_VCLK_DIV2
  33802. CLKID_VCLK_DIV2_DIV
  33803. CLKID_VCLK_DIV2_EN
  33804. CLKID_VCLK_DIV4
  33805. CLKID_VCLK_DIV4_DIV
  33806. CLKID_VCLK_DIV4_EN
  33807. CLKID_VCLK_DIV6
  33808. CLKID_VCLK_DIV6_DIV
  33809. CLKID_VCLK_DIV6_EN
  33810. CLKID_VCLK_INPUT
  33811. CLKID_VCLK_IN_EN
  33812. CLKID_VCLK_IN_SEL
  33813. CLKID_VCLK_OTHER
  33814. CLKID_VCLK_SEL
  33815. CLKID_VDEC_1
  33816. CLKID_VDEC_1_1
  33817. CLKID_VDEC_1_1_DIV
  33818. CLKID_VDEC_1_2
  33819. CLKID_VDEC_1_2_DIV
  33820. CLKID_VDEC_1_DIV
  33821. CLKID_VDEC_1_SEL
  33822. CLKID_VDEC_2
  33823. CLKID_VDEC_2_DIV
  33824. CLKID_VDEC_2_SEL
  33825. CLKID_VDEC_HCODEC
  33826. CLKID_VDEC_HCODEC_DIV
  33827. CLKID_VDEC_HCODEC_SEL
  33828. CLKID_VDEC_HEVC
  33829. CLKID_VDEC_HEVCF
  33830. CLKID_VDEC_HEVCF_DIV
  33831. CLKID_VDEC_HEVCF_SEL
  33832. CLKID_VDEC_HEVC_DIV
  33833. CLKID_VDEC_HEVC_EN
  33834. CLKID_VDEC_HEVC_SEL
  33835. CLKID_VDIN1
  33836. CLKID_VIDEO0
  33837. CLKID_VIDEO1
  33838. CLKID_VIDEO2
  33839. CLKID_VID_PLL
  33840. CLKID_VID_PLL_DIV
  33841. CLKID_VID_PLL_FINAL_DIV
  33842. CLKID_VID_PLL_IN_EN
  33843. CLKID_VID_PLL_IN_SEL
  33844. CLKID_VID_PLL_POST_DIV
  33845. CLKID_VID_PLL_PRE_DIV
  33846. CLKID_VID_PLL_SEL
  33847. CLKID_VIP
  33848. CLKID_VPP
  33849. CLKID_VPU
  33850. CLKID_VPU_0
  33851. CLKID_VPU_0_DIV
  33852. CLKID_VPU_0_SEL
  33853. CLKID_VPU_1
  33854. CLKID_VPU_1_DIV
  33855. CLKID_VPU_1_SEL
  33856. CLKID_VPU_INTR
  33857. CLKID_VSCOPE
  33858. CLKID_XTAL
  33859. CLKID_ZERO
  33860. CLKID_ZSP
  33861. CLKINVERSION
  33862. CLKIN_25MHZ_EN
  33863. CLKIN_BCLK
  33864. CLKIN_GPIO2
  33865. CLKIN_MCLK
  33866. CLKLSB1
  33867. CLKMAX
  33868. CLKMGRCOLD_RESET
  33869. CLKMGR_BYPASS
  33870. CLKMGR_CFG
  33871. CLKMGR_CTRL
  33872. CLKMGR_DBCTRL
  33873. CLKMGR_L4SRC
  33874. CLKMGR_PERPLL_SRC
  33875. CLKMSB1
  33876. CLKMSB2
  33877. CLKMSB3
  33878. CLKNAME_MAX
  33879. CLKNOTDATA
  33880. CLKOD_MASK
  33881. CLKOD_RD
  33882. CLKOD_SHIFT
  33883. CLKOUT
  33884. CLKOUT1
  33885. CLKOUT2
  33886. CLKOUT3
  33887. CLKOUTDIS
  33888. CLKOUTENB_MARK
  33889. CLKOUTMAX
  33890. CLKOUT_CD_MASK
  33891. CLKOUT_CMU_APOLLO
  33892. CLKOUT_CMU_APOLLO_DIV_STAT
  33893. CLKOUT_CMU_ATLAS
  33894. CLKOUT_CMU_ATLAS_DIV_STAT
  33895. CLKOUT_CMU_CPU
  33896. CLKOUT_CMU_DISP
  33897. CLKOUT_CMU_DISP_DIV_STAT
  33898. CLKOUT_CMU_DMC
  33899. CLKOUT_CMU_EGL
  33900. CLKOUT_CMU_EGL_DIV_STAT
  33901. CLKOUT_CMU_G3D
  33902. CLKOUT_CMU_G3D_DIV_STAT
  33903. CLKOUT_CMU_KFC
  33904. CLKOUT_CMU_KFC_DIV_STAT
  33905. CLKOUT_CMU_LEFTBUS
  33906. CLKOUT_CMU_MIF
  33907. CLKOUT_CMU_MIF_DIV_STAT
  33908. CLKOUT_CMU_RIGHTBUS
  33909. CLKOUT_CMU_TOP
  33910. CLKOUT_CMU_TOP_DIV_STAT
  33911. CLKOUT_MARK
  33912. CLKOUT_RATE
  33913. CLKOUT_SL_MASK
  33914. CLKOUT_SL_SHIFT
  33915. CLKO_25M
  33916. CLKPLL_LKD
  33917. CLKPLL_PLLLKD
  33918. CLKPLL_RSTEND
  33919. CLKPLL_SFTRST
  33920. CLKPMU_NR_CLKS
  33921. CLKPWD
  33922. CLKPWD_PDIDCK
  33923. CLKPWRBASE_REG
  33924. CLKPWR_PCLK_DIV_MASK
  33925. CLKR
  33926. CLKRC
  33927. CLKRC_12MHz
  33928. CLKRC_16MHz
  33929. CLKRC_24MHz
  33930. CLKRC_6MHz
  33931. CLKRC_DIV
  33932. CLKRC_DIV_MASK
  33933. CLKRC_DIV_SET
  33934. CLKRC_EN
  33935. CLKRC_RESERVED
  33936. CLKRDY
  33937. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_A_MASK
  33938. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_A__SHIFT
  33939. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_CNTL_EN_MASK
  33940. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_CNTL_EN__SHIFT
  33941. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_MODE_MASK
  33942. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_MODE__SHIFT
  33943. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SCHMEN_MASK
  33944. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SCHMEN__SHIFT
  33945. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SEL_MASK
  33946. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SEL__SHIFT
  33947. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SLEWN_MASK
  33948. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SLEWN__SHIFT
  33949. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SN0_MASK
  33950. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SN0__SHIFT
  33951. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SN1_MASK
  33952. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SN1__SHIFT
  33953. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SN2_MASK
  33954. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SN2__SHIFT
  33955. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SN3_MASK
  33956. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SN3__SHIFT
  33957. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SPARE_MASK
  33958. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_SPARE__SHIFT
  33959. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_WAKE_MASK
  33960. CLKREQB_PAD_CNTL_IND__CLKREQB_PAD_WAKE__SHIFT
  33961. CLKREQB_PAD_CNTL__CLKREQB_PAD_A_MASK
  33962. CLKREQB_PAD_CNTL__CLKREQB_PAD_A__MASK
  33963. CLKREQB_PAD_CNTL__CLKREQB_PAD_A__SHIFT
  33964. CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK
  33965. CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN__MASK
  33966. CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN__SHIFT
  33967. CLKREQB_PAD_CNTL__CLKREQB_PAD_MODE_MASK
  33968. CLKREQB_PAD_CNTL__CLKREQB_PAD_MODE__MASK
  33969. CLKREQB_PAD_CNTL__CLKREQB_PAD_MODE__SHIFT
  33970. CLKREQB_PAD_CNTL__CLKREQB_PAD_SCHMEN_MASK
  33971. CLKREQB_PAD_CNTL__CLKREQB_PAD_SCHMEN__MASK
  33972. CLKREQB_PAD_CNTL__CLKREQB_PAD_SCHMEN__SHIFT
  33973. CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK
  33974. CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL__MASK
  33975. CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL__SHIFT
  33976. CLKREQB_PAD_CNTL__CLKREQB_PAD_SLEWN_MASK
  33977. CLKREQB_PAD_CNTL__CLKREQB_PAD_SLEWN__MASK
  33978. CLKREQB_PAD_CNTL__CLKREQB_PAD_SLEWN__SHIFT
  33979. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0_MASK
  33980. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__MASK
  33981. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT
  33982. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1_MASK
  33983. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__MASK
  33984. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT
  33985. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2_MASK
  33986. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__MASK
  33987. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT
  33988. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK
  33989. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3__MASK
  33990. CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3__SHIFT
  33991. CLKREQB_PAD_CNTL__CLKREQB_PAD_SPARE_MASK
  33992. CLKREQB_PAD_CNTL__CLKREQB_PAD_SPARE__MASK
  33993. CLKREQB_PAD_CNTL__CLKREQB_PAD_SPARE__SHIFT
  33994. CLKREQB_PAD_CNTL__CLKREQB_PAD_WAKE_MASK
  33995. CLKREQB_PAD_CNTL__CLKREQB_PAD_WAKE__MASK
  33996. CLKREQB_PAD_CNTL__CLKREQB_PAD_WAKE__SHIFT
  33997. CLKREQB_PAD_CNTL__CLKREQB_PAD_Y_MASK
  33998. CLKREQB_PAD_CNTL__CLKREQB_PAD_Y__MASK
  33999. CLKREQB_PAD_CNTL__CLKREQB_PAD_Y__SHIFT
  34000. CLKREQB_PAD_CNTL__CLKREQB_PERF_COUNTER_UPPER_MASK
  34001. CLKREQB_PAD_CNTL__CLKREQB_PERF_COUNTER_UPPER__MASK
  34002. CLKREQB_PAD_CNTL__CLKREQB_PERF_COUNTER_UPPER__SHIFT
  34003. CLKREQB_PERF_COUNTER__CLKREQB_PERF_COUNTER_LOWER_MASK
  34004. CLKREQB_PERF_COUNTER__CLKREQB_PERF_COUNTER_LOWER__MASK
  34005. CLKREQB_PERF_COUNTER__CLKREQB_PERF_COUNTER_LOWER__SHIFT
  34006. CLKRM
  34007. CLKRP
  34008. CLKRST1_INDEX
  34009. CLKRST2_INDEX
  34010. CLKRST3_INDEX
  34011. CLKRST5_INDEX
  34012. CLKRST6_INDEX
  34013. CLKRST_CTRL
  34014. CLKRST_MAX
  34015. CLKRT_OFF
  34016. CLKRUN_GEN_ENABLE
  34017. CLKRUN_IRQ
  34018. CLKRX_BYP
  34019. CLKR_CLKEXT
  34020. CLKR_CLKP1
  34021. CLKR_CLKP2
  34022. CLKR_MASK
  34023. CLKR_RD
  34024. CLKR_SRC_CLKR
  34025. CLKR_SRC_CLKX
  34026. CLKS
  34027. CLKS2NSEC
  34028. CLKSEL
  34029. CLKSEL_80PCT
  34030. CLKSEL_MASK
  34031. CLKSEL_SHIFT
  34032. CLKSEL_VALID
  34033. CLKSEQ
  34034. CLKSET0_EXTAL_ONLY
  34035. CLKSET0_INTCLK_EN
  34036. CLKSET0_PRIVATE
  34037. CLKSET0_USB30_FSEL_USB_EXTAL
  34038. CLKSET1_PHYRESET
  34039. CLKSET1_PRIVATE_2_1
  34040. CLKSET1_REF_CLKDIV
  34041. CLKSET1_REF_CLK_SEL
  34042. CLKSET1_T
  34043. CLKSET1_USB30_PLL_MULTI_SHIFT
  34044. CLKSET1_USB30_PLL_MULTI_USB_EXTAL
  34045. CLKSKIPEN
  34046. CLKSLEEP
  34047. CLKSLEEP_SLP
  34048. CLKSLOW
  34049. CLKSM
  34050. CLKSP
  34051. CLKSPEEDREG_TYPE1
  34052. CLKSPEEDREG_TYPE2
  34053. CLKSP_VR4133
  34054. CLKSQ_EN_VOW_PERIODIC_MODE_MASK
  34055. CLKSQ_EN_VOW_PERIODIC_MODE_MASK_SFT
  34056. CLKSQ_EN_VOW_PERIODIC_MODE_SFT
  34057. CLKSR
  34058. CLKSRC
  34059. CLKSRC_IDIV0
  34060. CLKSRC_IDIV1
  34061. CLKSRC_IDIV2
  34062. CLKSRC_IDIV3
  34063. CLKSRC_IDIV4
  34064. CLKSRC_MII0_RX_CLK
  34065. CLKSRC_MII0_TX_CLK
  34066. CLKSRC_MII1_RX_CLK
  34067. CLKSRC_MII1_TX_CLK
  34068. CLKSRC_MII2_RX_CLK
  34069. CLKSRC_MII2_TX_CLK
  34070. CLKSRC_MII3_RX_CLK
  34071. CLKSRC_MII3_TX_CLK
  34072. CLKSRC_MII4_RX_CLK
  34073. CLKSRC_MII4_TX_CLK
  34074. CLKSRC_OFFSET
  34075. CLKSRC_PLL0
  34076. CLKSRC_PLL1
  34077. CLKSR_INT1
  34078. CLKSTOP_CTRL
  34079. CLKSTOP_CTRL_KFC
  34080. CLKSTP
  34081. CLKS_MASK
  34082. CLKS_OFF
  34083. CLKS_ON
  34084. CLKS_SHIFT
  34085. CLKS_STAT
  34086. CLKS_X4
  34087. CLKTX_BYP
  34088. CLKV
  34089. CLKV_MASK
  34090. CLKV_SHIFT
  34091. CLKXM
  34092. CLKXP
  34093. CLK_100
  34094. CLK_100KHZ
  34095. CLK_100K_DIV
  34096. CLK_1024FS
  34097. CLK_10KHZ
  34098. CLK_10MHZ
  34099. CLK_11_184MHz
  34100. CLK_12
  34101. CLK_120
  34102. CLK_150
  34103. CLK_16B_12L_4H
  34104. CLK_16B_6L_2H
  34105. CLK_16B_9L_3H
  34106. CLK_16_384MHz
  34107. CLK_19_440MHz
  34108. CLK_1KHZ
  34109. CLK_1MHZ
  34110. CLK_1WIRE
  34111. CLK_1_544MHz
  34112. CLK_20
  34113. CLK_200
  34114. CLK_2048FS
  34115. CLK_24M
  34116. CLK_24M_EDP
  34117. CLK_256FS
  34118. CLK_27M_MCLK
  34119. CLK_27M_MCLK_SHIFT
  34120. CLK_2_048MHz
  34121. CLK_3
  34122. CLK_30
  34123. CLK_3072FS
  34124. CLK_32K
  34125. CLK_32K_OUT2_DISABLE
  34126. CLK_32K_SR_SHIFT
  34127. CLK_34_368MHz
  34128. CLK_40
  34129. CLK_400K_DIV
  34130. CLK_4096FS
  34131. CLK_40MHZ
  34132. CLK_44_736MHz
  34133. CLK_4_096MHz
  34134. CLK_4_43
  34135. CLK_50
  34136. CLK_512FS
  34137. CLK_6
  34138. CLK_60
  34139. CLK_6144FS
  34140. CLK_6_312MHz
  34141. CLK_8
  34142. CLK_80
  34143. CLK_810_AUDIO
  34144. CLK_810_CIPHER
  34145. CLK_810_DMA_SGDMA
  34146. CLK_810_ETHA
  34147. CLK_810_LEON
  34148. CLK_810_NAND
  34149. CLK_810_PCIEA
  34150. CLK_810_SATA
  34151. CLK_810_USBMPH
  34152. CLK_8192FS
  34153. CLK_820_AUDIO
  34154. CLK_820_CIPHER
  34155. CLK_820_DMA_SGDMA
  34156. CLK_820_ETHA
  34157. CLK_820_ETHB
  34158. CLK_820_LEON
  34159. CLK_820_NAND
  34160. CLK_820_PCIEA
  34161. CLK_820_PCIEB
  34162. CLK_820_PLLA
  34163. CLK_820_PLLB
  34164. CLK_820_REF600
  34165. CLK_820_SATA
  34166. CLK_820_SD
  34167. CLK_820_USBDEV
  34168. CLK_820_USBMPH
  34169. CLK_8B_0_5
  34170. CLK_8B_1
  34171. CLK_8B_1_5
  34172. CLK_8B_2
  34173. CLK_8B_3
  34174. CLK_8B_4
  34175. CLK_8_192MHz
  34176. CLK_8_592MHz
  34177. CLK_8kHz
  34178. CLK_A
  34179. CLK_AC97
  34180. CLK_AC97CONF
  34181. CLK_ACE
  34182. CLK_ACLK100
  34183. CLK_ACLK133
  34184. CLK_ACLK160
  34185. CLK_ACLK166
  34186. CLK_ACLK200
  34187. CLK_ACLK200_DISP1
  34188. CLK_ACLK200_FSYS
  34189. CLK_ACLK200_FSYS2
  34190. CLK_ACLK266
  34191. CLK_ACLK266_G2D
  34192. CLK_ACLK300_DISP1
  34193. CLK_ACLK300_GSCL
  34194. CLK_ACLK300_JPEG
  34195. CLK_ACLK333
  34196. CLK_ACLK333_432_GSCL
  34197. CLK_ACLK333_G2D
  34198. CLK_ACLK400_MCUISP
  34199. CLK_ACLK400_MSCL
  34200. CLK_ACLK432_CAM
  34201. CLK_ACLK432_SCALER
  34202. CLK_ACLK550_CAM
  34203. CLK_ACLK66_PSGEN
  34204. CLK_ACLK_3AA0
  34205. CLK_ACLK_3AA1
  34206. CLK_ACLK_3DNR
  34207. CLK_ACLK_ACE_SEL_APOLL
  34208. CLK_ACLK_ACE_SEL_ATLAS
  34209. CLK_ACLK_AHB2APB_APOLLOP
  34210. CLK_ACLK_AHB2APB_ATLASP
  34211. CLK_ACLK_AHB2APB_BUSP
  34212. CLK_ACLK_AHB2APB_DISPSFR0P
  34213. CLK_ACLK_AHB2APB_DISPSFR1P
  34214. CLK_ACLK_AHB2APB_DISPSFR2P
  34215. CLK_ACLK_AHB2APB_FSYSP
  34216. CLK_ACLK_AHB2APB_G2D0P
  34217. CLK_ACLK_AHB2APB_G2D1P
  34218. CLK_ACLK_AHB2APB_G3DP
  34219. CLK_ACLK_AHB2APB_GSCLP
  34220. CLK_ACLK_AHB2APB_HEVCP
  34221. CLK_ACLK_AHB2APB_ISP1P
  34222. CLK_ACLK_AHB2APB_ISP2P
  34223. CLK_ACLK_AHB2APB_ISP3P
  34224. CLK_ACLK_AHB2APB_ISP5P
  34225. CLK_ACLK_AHB2APB_ISPSFRP
  34226. CLK_ACLK_AHB2APB_MFCP
  34227. CLK_ACLK_AHB2APB_MIF0P
  34228. CLK_ACLK_AHB2APB_MIF1P
  34229. CLK_ACLK_AHB2APB_MIF2P
  34230. CLK_ACLK_AHB2APB_MSCL0P
  34231. CLK_ACLK_AHB2APB_PERIC0P
  34232. CLK_ACLK_AHB2APB_PERIC1P
  34233. CLK_ACLK_AHB2APB_PERIC2P
  34234. CLK_ACLK_AHB2APB_PERIS0P
  34235. CLK_ACLK_AHB2APB_PERIS1P
  34236. CLK_ACLK_AHB2AXI_USBHS
  34237. CLK_ACLK_AHBDN_ISP5P
  34238. CLK_ACLK_AHBDN_SFRISP2H
  34239. CLK_ACLK_AHBSYNCDN
  34240. CLK_ACLK_AHB_DISPH
  34241. CLK_ACLK_AHB_FSYSH
  34242. CLK_ACLK_AHB_SFRISP2H
  34243. CLK_ACLK_AHB_USBHS
  34244. CLK_ACLK_AHB_USBLINKH0
  34245. CLK_ACLK_AHB_USBLINKH1
  34246. CLK_ACLK_ALB_G2D
  34247. CLK_ACLK_APOLLONP_200
  34248. CLK_ACLK_ASATBSLV_APOLLO_0_CSSYS
  34249. CLK_ACLK_ASATBSLV_APOLLO_1_CSSYS
  34250. CLK_ACLK_ASATBSLV_APOLLO_2_CSSYS
  34251. CLK_ACLK_ASATBSLV_APOLLO_3_CSSYS
  34252. CLK_ACLK_ASYNCACEM_APOLLO_CCI
  34253. CLK_ACLK_ASYNCACEM_ATLAS_CCI
  34254. CLK_ACLK_ASYNCACES_APOLLO_CCI
  34255. CLK_ACLK_ASYNCACES_ATLAS_CCI
  34256. CLK_ACLK_ASYNCAHBM_ISP1P
  34257. CLK_ACLK_ASYNCAHBM_ISP2P
  34258. CLK_ACLK_ASYNCAHBS_CSSYS_SSS
  34259. CLK_ACLK_ASYNCAHBS_SFRISP2H1
  34260. CLK_ACLK_ASYNCAHBS_SFRISP2H2
  34261. CLK_ACLK_ASYNCAPBM_3AA0
  34262. CLK_ACLK_ASYNCAPBM_3AA1
  34263. CLK_ACLK_ASYNCAPBM_FD
  34264. CLK_ACLK_ASYNCAPBM_G3D
  34265. CLK_ACLK_ASYNCAPBM_LITE_A
  34266. CLK_ACLK_ASYNCAPBM_LITE_B
  34267. CLK_ACLK_ASYNCAPBM_LITE_C
  34268. CLK_ACLK_ASYNCAPBM_LITE_D
  34269. CLK_ACLK_ASYNCAPBS_3AA0
  34270. CLK_ACLK_ASYNCAPBS_3AA1
  34271. CLK_ACLK_ASYNCAPBS_FD
  34272. CLK_ACLK_ASYNCAPBS_G3D
  34273. CLK_ACLK_ASYNCAPBS_LITE_A
  34274. CLK_ACLK_ASYNCAPBS_LITE_B
  34275. CLK_ACLK_ASYNCAPBS_LITE_C
  34276. CLK_ACLK_ASYNCAPBS_LITE_D
  34277. CLK_ACLK_ASYNCAPBS_MIF_CSSYS
  34278. CLK_ACLK_ASYNCAXIM_3AA0
  34279. CLK_ACLK_ASYNCAXIM_3AA1
  34280. CLK_ACLK_ASYNCAXIM_ATLAS_CCIX
  34281. CLK_ACLK_ASYNCAXIM_ATLAS_MIF
  34282. CLK_ACLK_ASYNCAXIM_CA5
  34283. CLK_ACLK_ASYNCAXIM_CP0
  34284. CLK_ACLK_ASYNCAXIM_CP1
  34285. CLK_ACLK_ASYNCAXIM_DIS0
  34286. CLK_ACLK_ASYNCAXIM_DIS1
  34287. CLK_ACLK_ASYNCAXIM_DREX0_0
  34288. CLK_ACLK_ASYNCAXIM_DREX0_1
  34289. CLK_ACLK_ASYNCAXIM_DREX0_3
  34290. CLK_ACLK_ASYNCAXIM_DREX1_0
  34291. CLK_ACLK_ASYNCAXIM_DREX1_1
  34292. CLK_ACLK_ASYNCAXIM_DREX1_3
  34293. CLK_ACLK_ASYNCAXIM_FD
  34294. CLK_ACLK_ASYNCAXIM_ISP0P
  34295. CLK_ACLK_ASYNCAXIM_ISP1P
  34296. CLK_ACLK_ASYNCAXIM_ISP2P
  34297. CLK_ACLK_ASYNCAXIM_ISP3P
  34298. CLK_ACLK_ASYNCAXIM_ISPEX
  34299. CLK_ACLK_ASYNCAXIM_LITE_A
  34300. CLK_ACLK_ASYNCAXIM_LITE_B
  34301. CLK_ACLK_ASYNCAXIM_LITE_C
  34302. CLK_ACLK_ASYNCAXIM_LITE_D
  34303. CLK_ACLK_ASYNCAXIM_NOC_P_CCI
  34304. CLK_ACLK_ASYNCAXIS_3AA0
  34305. CLK_ACLK_ASYNCAXIS_3AA1
  34306. CLK_ACLK_ASYNCAXIS_ATLAS_MIF
  34307. CLK_ACLK_ASYNCAXIS_CA5
  34308. CLK_ACLK_ASYNCAXIS_CP0
  34309. CLK_ACLK_ASYNCAXIS_CP1
  34310. CLK_ACLK_ASYNCAXIS_CSSYS_CCIX
  34311. CLK_ACLK_ASYNCAXIS_DIS0
  34312. CLK_ACLK_ASYNCAXIS_DIS1
  34313. CLK_ACLK_ASYNCAXIS_DREX0_0
  34314. CLK_ACLK_ASYNCAXIS_DREX0_1
  34315. CLK_ACLK_ASYNCAXIS_DREX0_3
  34316. CLK_ACLK_ASYNCAXIS_DREX1_0
  34317. CLK_ACLK_ASYNCAXIS_DREX1_1
  34318. CLK_ACLK_ASYNCAXIS_DREX1_3
  34319. CLK_ACLK_ASYNCAXIS_FD
  34320. CLK_ACLK_ASYNCAXIS_ISP3P
  34321. CLK_ACLK_ASYNCAXIS_ISPX0
  34322. CLK_ACLK_ASYNCAXIS_ISPX1
  34323. CLK_ACLK_ASYNCAXIS_ISPX2
  34324. CLK_ACLK_ASYNCAXIS_LITE_A
  34325. CLK_ACLK_ASYNCAXIS_LITE_B
  34326. CLK_ACLK_ASYNCAXIS_LITE_C
  34327. CLK_ACLK_ASYNCAXIS_LITE_D
  34328. CLK_ACLK_ASYNCAXIS_MIF_IMEM
  34329. CLK_ACLK_ASYNCAXIS_NOC_P_CCI
  34330. CLK_ACLK_ASYNCAXI_SYSX
  34331. CLK_ACLK_ATBDS_APOLLO_0
  34332. CLK_ACLK_ATBDS_APOLLO_1
  34333. CLK_ACLK_ATBDS_APOLLO_2
  34334. CLK_ACLK_ATBDS_APOLLO_3
  34335. CLK_ACLK_ATB_APOLLO0_CSSYS
  34336. CLK_ACLK_ATB_APOLLO1_CSSYS
  34337. CLK_ACLK_ATB_APOLLO2_CSSYS
  34338. CLK_ACLK_ATB_APOLLO3_CSSYS
  34339. CLK_ACLK_ATB_AUD_CSSYS
  34340. CLK_ACLK_ATLASNP_200
  34341. CLK_ACLK_AUDND_133
  34342. CLK_ACLK_AUDNP_133
  34343. CLK_ACLK_AXI2AHB_ISP0P
  34344. CLK_ACLK_AXI2APB0_LPASSP
  34345. CLK_ACLK_AXI2APB1_LPASSP
  34346. CLK_ACLK_AXI2APB_ISP0P
  34347. CLK_ACLK_AXI2APB_ISP1P
  34348. CLK_ACLK_AXI2APB_ISP2P
  34349. CLK_ACLK_AXI2APB_ISP3P
  34350. CLK_ACLK_AXI2APH_LPASSP
  34351. CLK_ACLK_AXIDS0_LPASSP
  34352. CLK_ACLK_AXIDS1_LPASSP
  34353. CLK_ACLK_AXIDS2_LPASSP
  34354. CLK_ACLK_AXIDS_CCI_MIFSFRX
  34355. CLK_ACLK_AXISYNCDNS_CCI
  34356. CLK_ACLK_AXISYNCDN_CCI
  34357. CLK_ACLK_AXISYNCDN_NOC_D
  34358. CLK_ACLK_AXIUS_ATLAS_CCI
  34359. CLK_ACLK_AXIUS_DRC
  34360. CLK_ACLK_AXIUS_FD
  34361. CLK_ACLK_AXIUS_FSYSSX
  34362. CLK_ACLK_AXIUS_G2DX
  34363. CLK_ACLK_AXIUS_ISP3P
  34364. CLK_ACLK_AXIUS_LITE_A
  34365. CLK_ACLK_AXIUS_LITE_B
  34366. CLK_ACLK_AXIUS_LITE_C
  34367. CLK_ACLK_AXIUS_LITE_D
  34368. CLK_ACLK_AXIUS_PDMA0
  34369. CLK_ACLK_AXIUS_PDMA1
  34370. CLK_ACLK_AXIUS_SCALERC
  34371. CLK_ACLK_AXIUS_SCALERP
  34372. CLK_ACLK_AXIUS_USBHS
  34373. CLK_ACLK_AXI_ISP_CX
  34374. CLK_ACLK_AXI_ISP_CX_R
  34375. CLK_ACLK_AXI_ISP_HX
  34376. CLK_ACLK_AXI_ISP_HX_R
  34377. CLK_ACLK_BTS_3AA0
  34378. CLK_ACLK_BTS_3AA1
  34379. CLK_ACLK_BTS_3DR
  34380. CLK_ACLK_BTS_APOLLO
  34381. CLK_ACLK_BTS_ATLAS
  34382. CLK_ACLK_BTS_DECON_NM0
  34383. CLK_ACLK_BTS_DECON_NM1
  34384. CLK_ACLK_BTS_DECON_NM2
  34385. CLK_ACLK_BTS_DECON_NM3
  34386. CLK_ACLK_BTS_DECON_NM4
  34387. CLK_ACLK_BTS_DECON_TV_M0
  34388. CLK_ACLK_BTS_DECON_TV_M1
  34389. CLK_ACLK_BTS_DECON_TV_M2
  34390. CLK_ACLK_BTS_DECON_TV_M3
  34391. CLK_ACLK_BTS_DIS0
  34392. CLK_ACLK_BTS_DIS1
  34393. CLK_ACLK_BTS_DRC
  34394. CLK_ACLK_BTS_FD
  34395. CLK_ACLK_BTS_G2D
  34396. CLK_ACLK_BTS_G3D0
  34397. CLK_ACLK_BTS_G3D1
  34398. CLK_ACLK_BTS_GSCL0
  34399. CLK_ACLK_BTS_GSCL1
  34400. CLK_ACLK_BTS_GSCL2
  34401. CLK_ACLK_BTS_HEVC_0
  34402. CLK_ACLK_BTS_HEVC_1
  34403. CLK_ACLK_BTS_ISP
  34404. CLK_ACLK_BTS_ISP3P
  34405. CLK_ACLK_BTS_JPEG
  34406. CLK_ACLK_BTS_LITE_A
  34407. CLK_ACLK_BTS_LITE_B
  34408. CLK_ACLK_BTS_LITE_C
  34409. CLK_ACLK_BTS_LITE_D
  34410. CLK_ACLK_BTS_M2MSCALER0
  34411. CLK_ACLK_BTS_M2MSCALER1
  34412. CLK_ACLK_BTS_MDMA1
  34413. CLK_ACLK_BTS_MFC_0
  34414. CLK_ACLK_BTS_MFC_1
  34415. CLK_ACLK_BTS_PCIE
  34416. CLK_ACLK_BTS_SCALERC
  34417. CLK_ACLK_BTS_SCALERP
  34418. CLK_ACLK_BTS_UFS
  34419. CLK_ACLK_BTS_USBDRD30
  34420. CLK_ACLK_BTS_USBHOST30
  34421. CLK_ACLK_BUS0_400
  34422. CLK_ACLK_BUS1_400
  34423. CLK_ACLK_BUS2BEND_400
  34424. CLK_ACLK_BUS2RTND_400
  34425. CLK_ACLK_BUS2_400
  34426. CLK_ACLK_BUSND_400
  34427. CLK_ACLK_BUSNP_133
  34428. CLK_ACLK_CAM0ND_400
  34429. CLK_ACLK_CAM0NP_276
  34430. CLK_ACLK_CAM0_333
  34431. CLK_ACLK_CAM0_400
  34432. CLK_ACLK_CAM0_552
  34433. CLK_ACLK_CAM1ND_400
  34434. CLK_ACLK_CAM1NP_333
  34435. CLK_ACLK_CAM1_333
  34436. CLK_ACLK_CAM1_400
  34437. CLK_ACLK_CAM1_552
  34438. CLK_ACLK_CCI
  34439. CLK_ACLK_CPIF_200
  34440. CLK_ACLK_CSIS0
  34441. CLK_ACLK_CSIS1
  34442. CLK_ACLK_CSIS2
  34443. CLK_ACLK_DECON
  34444. CLK_ACLK_DECON_TV
  34445. CLK_ACLK_DIS
  34446. CLK_ACLK_DISP0ND_333
  34447. CLK_ACLK_DISP1ND_333
  34448. CLK_ACLK_DISP_333
  34449. CLK_ACLK_DMAC
  34450. CLK_ACLK_DRC
  34451. CLK_ACLK_DREX0
  34452. CLK_ACLK_DREX0_BUSIF
  34453. CLK_ACLK_DREX0_BUSIF_RD
  34454. CLK_ACLK_DREX0_MEMIF
  34455. CLK_ACLK_DREX0_PEREV
  34456. CLK_ACLK_DREX0_SCH
  34457. CLK_ACLK_DREX0_TZ
  34458. CLK_ACLK_DREX1
  34459. CLK_ACLK_DREX1_BUSIF
  34460. CLK_ACLK_DREX1_BUSIF_RD
  34461. CLK_ACLK_DREX1_MEMIF
  34462. CLK_ACLK_DREX1_PEREV
  34463. CLK_ACLK_DREX1_SCH
  34464. CLK_ACLK_DREX1_TZ
  34465. CLK_ACLK_FD
  34466. CLK_ACLK_FL1550_CAM
  34467. CLK_ACLK_FSYS0_200
  34468. CLK_ACLK_FSYS1_200
  34469. CLK_ACLK_FSYSND_200
  34470. CLK_ACLK_FSYSNP_200
  34471. CLK_ACLK_FSYS_200
  34472. CLK_ACLK_G2D
  34473. CLK_ACLK_G2DND_400
  34474. CLK_ACLK_G2DNP_133
  34475. CLK_ACLK_G2D_266
  34476. CLK_ACLK_G2D_400
  34477. CLK_ACLK_G3D
  34478. CLK_ACLK_G3DND_600
  34479. CLK_ACLK_G3DNP_150
  34480. CLK_ACLK_G3D_400
  34481. CLK_ACLK_GSCL0
  34482. CLK_ACLK_GSCL1
  34483. CLK_ACLK_GSCL2
  34484. CLK_ACLK_GSCLBEND_333
  34485. CLK_ACLK_GSCLNP_111
  34486. CLK_ACLK_GSCLRTND_333
  34487. CLK_ACLK_GSCL_111
  34488. CLK_ACLK_GSCL_333
  34489. CLK_ACLK_GSD
  34490. CLK_ACLK_HEVC
  34491. CLK_ACLK_HEVCND_400
  34492. CLK_ACLK_HEVCNP_100
  34493. CLK_ACLK_HEVC_400
  34494. CLK_ACLK_IMEM_200
  34495. CLK_ACLK_IMEM_266
  34496. CLK_ACLK_IMEM_SSSX_266
  34497. CLK_ACLK_INTR_CTRL
  34498. CLK_ACLK_ISP
  34499. CLK_ACLK_ISPND_400
  34500. CLK_ACLK_ISP_400
  34501. CLK_ACLK_ISP_DIS_400
  34502. CLK_ACLK_ISP_D_GLUE
  34503. CLK_ACLK_ISP_GIC
  34504. CLK_ACLK_IXIU_CCI
  34505. CLK_ACLK_JPEG
  34506. CLK_ACLK_LITE_A
  34507. CLK_ACLK_LITE_B
  34508. CLK_ACLK_LITE_C
  34509. CLK_ACLK_LITE_D
  34510. CLK_ACLK_M2MSCALER0
  34511. CLK_ACLK_M2MSCALER1
  34512. CLK_ACLK_MDMA1
  34513. CLK_ACLK_MFC
  34514. CLK_ACLK_MFCND_400
  34515. CLK_ACLK_MFCNP_100
  34516. CLK_ACLK_MFC_400
  34517. CLK_ACLK_MIFND_133
  34518. CLK_ACLK_MIFND_266
  34519. CLK_ACLK_MIFND_400
  34520. CLK_ACLK_MIFNM_200
  34521. CLK_ACLK_MIFNP_133
  34522. CLK_ACLK_MMC0
  34523. CLK_ACLK_MMC1
  34524. CLK_ACLK_MMC2
  34525. CLK_ACLK_MSCLND_400
  34526. CLK_ACLK_MSCLNP_100
  34527. CLK_ACLK_MSCL_400
  34528. CLK_ACLK_PCIE
  34529. CLK_ACLK_PDMA0
  34530. CLK_ACLK_PDMA1
  34531. CLK_ACLK_PERIC0_66
  34532. CLK_ACLK_PERIC1_66
  34533. CLK_ACLK_PERICNP_66
  34534. CLK_ACLK_PERIC_66
  34535. CLK_ACLK_PERISNP_66
  34536. CLK_ACLK_PERIS_66
  34537. CLK_ACLK_PPMU_DREX0S0
  34538. CLK_ACLK_PPMU_DREX0S1
  34539. CLK_ACLK_PPMU_DREX0S3
  34540. CLK_ACLK_PPMU_DREX0_0
  34541. CLK_ACLK_PPMU_DREX0_1
  34542. CLK_ACLK_PPMU_DREX1S0
  34543. CLK_ACLK_PPMU_DREX1S1
  34544. CLK_ACLK_PPMU_DREX1S3
  34545. CLK_ACLK_PPMU_DREX1_0
  34546. CLK_ACLK_PPMU_DREX1_1
  34547. CLK_ACLK_SCALERC
  34548. CLK_ACLK_SCALERP
  34549. CLK_ACLK_SLIMSSS
  34550. CLK_ACLK_SMMU_3AA0
  34551. CLK_ACLK_SMMU_3AA1
  34552. CLK_ACLK_SMMU_3DNR
  34553. CLK_ACLK_SMMU_DECON0X
  34554. CLK_ACLK_SMMU_DECON1X
  34555. CLK_ACLK_SMMU_DIS0
  34556. CLK_ACLK_SMMU_DIS1
  34557. CLK_ACLK_SMMU_DRC
  34558. CLK_ACLK_SMMU_FD
  34559. CLK_ACLK_SMMU_G2D
  34560. CLK_ACLK_SMMU_GSCL0
  34561. CLK_ACLK_SMMU_GSCL1
  34562. CLK_ACLK_SMMU_GSCL2
  34563. CLK_ACLK_SMMU_HEVC_0
  34564. CLK_ACLK_SMMU_HEVC_1
  34565. CLK_ACLK_SMMU_ISP
  34566. CLK_ACLK_SMMU_ISPCPU
  34567. CLK_ACLK_SMMU_JPEG
  34568. CLK_ACLK_SMMU_LITE_A
  34569. CLK_ACLK_SMMU_LITE_B
  34570. CLK_ACLK_SMMU_LITE_C
  34571. CLK_ACLK_SMMU_LITE_D
  34572. CLK_ACLK_SMMU_LPASSX
  34573. CLK_ACLK_SMMU_M2MSCALER0
  34574. CLK_ACLK_SMMU_M2MSCALER1
  34575. CLK_ACLK_SMMU_MDMA1
  34576. CLK_ACLK_SMMU_MFC_0
  34577. CLK_ACLK_SMMU_MFC_1
  34578. CLK_ACLK_SMMU_PDMA0
  34579. CLK_ACLK_SMMU_PDMA1
  34580. CLK_ACLK_SMMU_SCALERC
  34581. CLK_ACLK_SMMU_SCALERP
  34582. CLK_ACLK_SMMU_TV0X
  34583. CLK_ACLK_SMMU_TV1X
  34584. CLK_ACLK_SRAMC
  34585. CLK_ACLK_TSI
  34586. CLK_ACLK_UFS
  34587. CLK_ACLK_USBDRD30
  34588. CLK_ACLK_USBHOST20
  34589. CLK_ACLK_USBHOST30
  34590. CLK_ACLK_XIU_DECON0X
  34591. CLK_ACLK_XIU_DECON1X
  34592. CLK_ACLK_XIU_DISP1X
  34593. CLK_ACLK_XIU_DISPNP_100
  34594. CLK_ACLK_XIU_FSYSPX
  34595. CLK_ACLK_XIU_FSYSSX
  34596. CLK_ACLK_XIU_FSYSX
  34597. CLK_ACLK_XIU_G2DX
  34598. CLK_ACLK_XIU_GSCLX
  34599. CLK_ACLK_XIU_HEVCX
  34600. CLK_ACLK_XIU_IS0X
  34601. CLK_ACLK_XIU_ISP0EX
  34602. CLK_ACLK_XIU_ISPEX
  34603. CLK_ACLK_XIU_ISPEX0
  34604. CLK_ACLK_XIU_ISPEX1
  34605. CLK_ACLK_XIU_ISPX
  34606. CLK_ACLK_XIU_LPASSX
  34607. CLK_ACLK_XIU_MFCX
  34608. CLK_ACLK_XIU_MIFSFRX
  34609. CLK_ACLK_XIU_MSCLX
  34610. CLK_ACLK_XIU_TV0X
  34611. CLK_ACLK_XIU_TV1X
  34612. CLK_AC_DIG
  34613. CLK_AC_DIG_4X
  34614. CLK_ADC
  34615. CLK_ADCHS
  34616. CLK_ADC_MAX
  34617. CLK_ADFSDM1
  34618. CLK_ADI
  34619. CLK_ADI_EB
  34620. CLK_AFE
  34621. CLK_AGCP_AP_ASHB_EB
  34622. CLK_AGCP_ARC48K_EB
  34623. CLK_AGCP_AUDIF_EB
  34624. CLK_AGCP_AUD_EB
  34625. CLK_AGCP_CP_ASHB_EB
  34626. CLK_AGCP_DMAAP_EB
  34627. CLK_AGCP_DMACP_EB
  34628. CLK_AGCP_GATE_NUM
  34629. CLK_AGCP_ICU_EB
  34630. CLK_AGCP_IIS0_EB
  34631. CLK_AGCP_IIS1_EB
  34632. CLK_AGCP_IIS2_EB
  34633. CLK_AGCP_IIS3_EB
  34634. CLK_AGCP_MCDT_EB
  34635. CLK_AGCP_SPINLOCK_EB
  34636. CLK_AGCP_SRC44P1K_EB
  34637. CLK_AGCP_UART_EB
  34638. CLK_AGCP_VBCIFD_EB
  34639. CLK_AGCP_VBC_EB
  34640. CLK_AHB
  34641. CLK_AHB0
  34642. CLK_AHB1
  34643. CLK_AHB1_BE0
  34644. CLK_AHB1_BE1
  34645. CLK_AHB1_CSI
  34646. CLK_AHB1_DEU0
  34647. CLK_AHB1_DEU1
  34648. CLK_AHB1_DMA
  34649. CLK_AHB1_DRC0
  34650. CLK_AHB1_DRC1
  34651. CLK_AHB1_EHCI0
  34652. CLK_AHB1_EHCI1
  34653. CLK_AHB1_EMAC
  34654. CLK_AHB1_FE0
  34655. CLK_AHB1_FE1
  34656. CLK_AHB1_GPU
  34657. CLK_AHB1_HDMI
  34658. CLK_AHB1_HSTIMER
  34659. CLK_AHB1_LCD0
  34660. CLK_AHB1_LCD1
  34661. CLK_AHB1_MIPIDSI
  34662. CLK_AHB1_MMC0
  34663. CLK_AHB1_MMC1
  34664. CLK_AHB1_MMC2
  34665. CLK_AHB1_MMC3
  34666. CLK_AHB1_MP
  34667. CLK_AHB1_NAND0
  34668. CLK_AHB1_NAND1
  34669. CLK_AHB1_OHCI0
  34670. CLK_AHB1_OHCI1
  34671. CLK_AHB1_OHCI2
  34672. CLK_AHB1_OTG
  34673. CLK_AHB1_SDRAM
  34674. CLK_AHB1_SPI0
  34675. CLK_AHB1_SPI1
  34676. CLK_AHB1_SPI2
  34677. CLK_AHB1_SPI3
  34678. CLK_AHB1_SS
  34679. CLK_AHB1_TS
  34680. CLK_AHB1_VE
  34681. CLK_AHB2
  34682. CLK_AHB3
  34683. CLK_AHBPREDIV
  34684. CLK_AHB_ACE
  34685. CLK_AHB_BIST
  34686. CLK_AHB_CAM
  34687. CLK_AHB_CSI
  34688. CLK_AHB_CSI0
  34689. CLK_AHB_CSI1
  34690. CLK_AHB_DE_BE
  34691. CLK_AHB_DE_BE0
  34692. CLK_AHB_DE_BE1
  34693. CLK_AHB_DE_FE
  34694. CLK_AHB_DE_FE0
  34695. CLK_AHB_DE_FE1
  34696. CLK_AHB_DISP
  34697. CLK_AHB_DMA
  34698. CLK_AHB_EHCI
  34699. CLK_AHB_EHCI0
  34700. CLK_AHB_EHCI1
  34701. CLK_AHB_EMAC
  34702. CLK_AHB_GMAC
  34703. CLK_AHB_GPS
  34704. CLK_AHB_GPU
  34705. CLK_AHB_HDMI
  34706. CLK_AHB_HDMI0
  34707. CLK_AHB_HDMI1
  34708. CLK_AHB_HSTIMER
  34709. CLK_AHB_IEP
  34710. CLK_AHB_LCD
  34711. CLK_AHB_LCD0
  34712. CLK_AHB_LCD1
  34713. CLK_AHB_MMC0
  34714. CLK_AHB_MMC1
  34715. CLK_AHB_MMC2
  34716. CLK_AHB_MMC3
  34717. CLK_AHB_MP
  34718. CLK_AHB_MS
  34719. CLK_AHB_NAND
  34720. CLK_AHB_OHCI
  34721. CLK_AHB_OHCI0
  34722. CLK_AHB_OHCI1
  34723. CLK_AHB_OTG
  34724. CLK_AHB_PATA
  34725. CLK_AHB_SATA
  34726. CLK_AHB_SDRAM
  34727. CLK_AHB_SPI0
  34728. CLK_AHB_SPI1
  34729. CLK_AHB_SPI2
  34730. CLK_AHB_SPI3
  34731. CLK_AHB_SS
  34732. CLK_AHB_TS
  34733. CLK_AHB_TVD
  34734. CLK_AHB_TVE
  34735. CLK_AHB_TVE0
  34736. CLK_AHB_TVE1
  34737. CLK_AHB_VE
  34738. CLK_AHB_VSP
  34739. CLK_AIF_OSR_DIV
  34740. CLK_ALPHA_PLL_TYPE_BRAMMO
  34741. CLK_ALPHA_PLL_TYPE_DEFAULT
  34742. CLK_ALPHA_PLL_TYPE_FABIA
  34743. CLK_ALPHA_PLL_TYPE_HUAYRA
  34744. CLK_ALPHA_PLL_TYPE_MAX
  34745. CLK_ALPHA_PLL_TYPE_TRION
  34746. CLK_ALWAYS_ENABLED
  34747. CLK_ALWAYS_ON
  34748. CLK_AONSECURE_NUM
  34749. CLK_AON_APB
  34750. CLK_AON_APB_RSV0
  34751. CLK_AON_CKG_EB
  34752. CLK_AON_DMA_EB
  34753. CLK_AON_GATE_NUM
  34754. CLK_AON_I2C
  34755. CLK_AON_PREDIV_NUM
  34756. CLK_AON_SYST_RTC_EB
  34757. CLK_AON_SYS_EB
  34758. CLK_AON_TMR_EB
  34759. CLK_AON_TMR_RTC_EB
  34760. CLK_APAHB_GATE_NUM
  34761. CLK_APAPB_GATE_NUM
  34762. CLK_APB
  34763. CLK_APB0
  34764. CLK_APB0_AC97
  34765. CLK_APB0_CODEC
  34766. CLK_APB0_I2C
  34767. CLK_APB0_I2S
  34768. CLK_APB0_I2S0
  34769. CLK_APB0_I2S1
  34770. CLK_APB0_I2S2
  34771. CLK_APB0_IR
  34772. CLK_APB0_IR0
  34773. CLK_APB0_IR1
  34774. CLK_APB0_KEYPAD
  34775. CLK_APB0_PIO
  34776. CLK_APB0_RSB
  34777. CLK_APB0_SPDIF
  34778. CLK_APB0_SSP0
  34779. CLK_APB0_TIMER
  34780. CLK_APB0_TWD
  34781. CLK_APB0_UART
  34782. CLK_APB0_UART0
  34783. CLK_APB0_UART1
  34784. CLK_APB1
  34785. CLK_APB1_BUS
  34786. CLK_APB1_CAN
  34787. CLK_APB1_CAN1
  34788. CLK_APB1_CODEC
  34789. CLK_APB1_DAUDIO0
  34790. CLK_APB1_DAUDIO1
  34791. CLK_APB1_DIGITAL_MIC
  34792. CLK_APB1_I2C0
  34793. CLK_APB1_I2C1
  34794. CLK_APB1_I2C2
  34795. CLK_APB1_I2C3
  34796. CLK_APB1_I2C4
  34797. CLK_APB1_I2S
  34798. CLK_APB1_MOTOCON_PWM
  34799. CLK_APB1_PIO
  34800. CLK_APB1_PS20
  34801. CLK_APB1_PS21
  34802. CLK_APB1_SCR
  34803. CLK_APB1_SPDIF
  34804. CLK_APB1_UART0
  34805. CLK_APB1_UART1
  34806. CLK_APB1_UART2
  34807. CLK_APB1_UART3
  34808. CLK_APB1_UART4
  34809. CLK_APB1_UART5
  34810. CLK_APB1_UART6
  34811. CLK_APB1_UART7
  34812. CLK_APB2
  34813. CLK_APB2_I2C0
  34814. CLK_APB2_I2C1
  34815. CLK_APB2_I2C2
  34816. CLK_APB2_I2C3
  34817. CLK_APB2_SSP1
  34818. CLK_APB2_UART0
  34819. CLK_APB2_UART1
  34820. CLK_APB2_UART2
  34821. CLK_APB2_UART3
  34822. CLK_APB2_UART4
  34823. CLK_APB2_UART5
  34824. CLK_APB3_ADC0
  34825. CLK_APB3_ADC1
  34826. CLK_APB3_BUS
  34827. CLK_APB3_CAN0
  34828. CLK_APB3_DAC
  34829. CLK_APB3_I2C1
  34830. CLK_APCPU_TS0_EB
  34831. CLK_APCPU_TS1_EB
  34832. CLK_APCPU_WDG_EB
  34833. CLK_APLL1_TUNER
  34834. CLK_APLL22M
  34835. CLK_APLL24M
  34836. CLK_APLL2_TUNER
  34837. CLK_APMIXED_ADSPPLL
  34838. CLK_APMIXED_APLL1
  34839. CLK_APMIXED_APLL2
  34840. CLK_APMIXED_APPLL26M
  34841. CLK_APMIXED_APPLL_26M
  34842. CLK_APMIXED_ARMCA15PLL
  34843. CLK_APMIXED_ARMCA35PLL
  34844. CLK_APMIXED_ARMCA72PLL
  34845. CLK_APMIXED_ARMCA7PLL
  34846. CLK_APMIXED_ARMPLL
  34847. CLK_APMIXED_ARMPLL1
  34848. CLK_APMIXED_ARMPLL2
  34849. CLK_APMIXED_ARMPLL_BB
  34850. CLK_APMIXED_ARMPLL_BL
  34851. CLK_APMIXED_ARMPLL_L
  34852. CLK_APMIXED_ARMPLL_LL
  34853. CLK_APMIXED_AUD1PLL
  34854. CLK_APMIXED_AUD2PLL
  34855. CLK_APMIXED_AUDPLL
  34856. CLK_APMIXED_CCIPLL
  34857. CLK_APMIXED_CLKSQ_LVPLL_26M
  34858. CLK_APMIXED_CODECPLL
  34859. CLK_APMIXED_ETH1PLL
  34860. CLK_APMIXED_ETH2PLL
  34861. CLK_APMIXED_ETHERPLL
  34862. CLK_APMIXED_ETHPLL
  34863. CLK_APMIXED_HADDS2PLL
  34864. CLK_APMIXED_HDMI_REF
  34865. CLK_APMIXED_IMGPLL
  34866. CLK_APMIXED_LVDSPLL
  34867. CLK_APMIXED_LVDSPLL2
  34868. CLK_APMIXED_MAINPLL
  34869. CLK_APMIXED_MAIN_CORE_EN
  34870. CLK_APMIXED_MDPLLGP26M
  34871. CLK_APMIXED_MDPLLGP_26M
  34872. CLK_APMIXED_MEMPLL26M
  34873. CLK_APMIXED_MEMPLL_26M
  34874. CLK_APMIXED_MFGPLL
  34875. CLK_APMIXED_MIPIC0_26M
  34876. CLK_APMIXED_MIPIC1_26M
  34877. CLK_APMIXED_MIPID0_26M
  34878. CLK_APMIXED_MIPID1_26M
  34879. CLK_APMIXED_MMPLL
  34880. CLK_APMIXED_MMSYS_26M
  34881. CLK_APMIXED_MM_F26M
  34882. CLK_APMIXED_MPLL
  34883. CLK_APMIXED_MSDCPLL
  34884. CLK_APMIXED_MSDCPLL2
  34885. CLK_APMIXED_NR
  34886. CLK_APMIXED_NR_CLK
  34887. CLK_APMIXED_REF2USB_TX
  34888. CLK_APMIXED_SGMIPLL
  34889. CLK_APMIXED_SSUSB26M
  34890. CLK_APMIXED_SSUSB_26M
  34891. CLK_APMIXED_TRGPLL
  34892. CLK_APMIXED_TVD2PLL
  34893. CLK_APMIXED_TVDPLL
  34894. CLK_APMIXED_UFS26M
  34895. CLK_APMIXED_UFS_26M
  34896. CLK_APMIXED_UNIV2PLL
  34897. CLK_APMIXED_UNIVPLL
  34898. CLK_APMIXED_VCODECPLL
  34899. CLK_APMIXED_VDECPLL
  34900. CLK_APMIXED_VENCPLL
  34901. CLK_AP_APB
  34902. CLK_AP_AXI
  34903. CLK_AP_CKG_EB
  34904. CLK_AP_CLK_NUM
  34905. CLK_AP_INTC0_EB
  34906. CLK_AP_INTC1_EB
  34907. CLK_AP_INTC2_EB
  34908. CLK_AP_INTC3_EB
  34909. CLK_AP_INTC4_EB
  34910. CLK_AP_INTC5_EB
  34911. CLK_AP_SYST_RTC_EB
  34912. CLK_AP_SYS_EB
  34913. CLK_AP_TMR0_EB
  34914. CLK_AP_TMR0_RTC_EB
  34915. CLK_AP_TMR1_EB
  34916. CLK_AP_TMR1_RTC_EB
  34917. CLK_AP_TMR2_EB
  34918. CLK_AP_TMR2_RTC_EB
  34919. CLK_AP_USB3
  34920. CLK_AP_WDG_RTC_EB
  34921. CLK_AR100
  34922. CLK_ARCH_RTC_EB
  34923. CLK_ARM_CLK
  34924. CLK_ASSIST_PLL
  34925. CLK_ASSP
  34926. CLK_ASYNCAXIM
  34927. CLK_ASYNC_CAMX
  34928. CLK_ASYNC_FSYSD
  34929. CLK_ASYNC_G3D
  34930. CLK_ASYNC_ISPMX
  34931. CLK_ASYNC_LCD0X
  34932. CLK_ASYNC_MFCL
  34933. CLK_ATB0
  34934. CLK_ATB1
  34935. CLK_ATCLK
  34936. CLK_ATCLK_AUD
  34937. CLK_ATCLK_ISP
  34938. CLK_ATI18818_0
  34939. CLK_ATI18818_1
  34940. CLK_ATS
  34941. CLK_ATT20C408
  34942. CLK_ATTR_NODE_CLASS
  34943. CLK_ATTR_NODE_INDEX
  34944. CLK_ATTR_NODE_SUBCLASS
  34945. CLK_ATTR_NODE_TYPE
  34946. CLK_ATTR_TYPE
  34947. CLK_ATTR_VALID
  34948. CLK_AUDDIV_0
  34949. CLK_AUDDIV_1
  34950. CLK_AUDDIV_2
  34951. CLK_AUDDIV_3
  34952. CLK_AUDIO
  34953. CLK_AUDIO_22M
  34954. CLK_AUDIO_24M
  34955. CLK_AUDIO_A1SYS
  34956. CLK_AUDIO_A2SYS
  34957. CLK_AUDIO_ADC
  34958. CLK_AUDIO_AFE
  34959. CLK_AUDIO_AFE_CONN
  34960. CLK_AUDIO_APLL
  34961. CLK_AUDIO_APLL2_TUNER
  34962. CLK_AUDIO_APLL_TUNER
  34963. CLK_AUDIO_ARB1
  34964. CLK_AUDIO_ASRCI1
  34965. CLK_AUDIO_ASRCI2
  34966. CLK_AUDIO_ASRCI3
  34967. CLK_AUDIO_ASRCI4
  34968. CLK_AUDIO_ASRCO1
  34969. CLK_AUDIO_ASRCO2
  34970. CLK_AUDIO_ASRCO3
  34971. CLK_AUDIO_ASRCO4
  34972. CLK_AUDIO_AWB
  34973. CLK_AUDIO_AWB2
  34974. CLK_AUDIO_DAC
  34975. CLK_AUDIO_DAC_DIV
  34976. CLK_AUDIO_DAC_PREDIS
  34977. CLK_AUDIO_DAI
  34978. CLK_AUDIO_DIV
  34979. CLK_AUDIO_DIV_FRAC
  34980. CLK_AUDIO_DIV_FRAC_NSHIFT
  34981. CLK_AUDIO_DIV_INT
  34982. CLK_AUDIO_DIV_INT_FRAC_MAX
  34983. CLK_AUDIO_DIV_INT_FRAC_MIN
  34984. CLK_AUDIO_DIV_INT_FRAC_RE
  34985. CLK_AUDIO_DIV_INT_INT_SHIFT
  34986. CLK_AUDIO_DIV_INT_INT_WIDTH
  34987. CLK_AUDIO_DIV_UNCOMMON
  34988. CLK_AUDIO_DL1
  34989. CLK_AUDIO_DL2
  34990. CLK_AUDIO_DL3
  34991. CLK_AUDIO_DL4
  34992. CLK_AUDIO_DL5
  34993. CLK_AUDIO_DL6
  34994. CLK_AUDIO_DLMCH
  34995. CLK_AUDIO_HDMI
  34996. CLK_AUDIO_HUB
  34997. CLK_AUDIO_I2S1
  34998. CLK_AUDIO_I2S2
  34999. CLK_AUDIO_I2S3
  35000. CLK_AUDIO_I2S4
  35001. CLK_AUDIO_I2SIN1
  35002. CLK_AUDIO_I2SIN2
  35003. CLK_AUDIO_I2SIN3
  35004. CLK_AUDIO_I2SIN4
  35005. CLK_AUDIO_I2SO1
  35006. CLK_AUDIO_I2SO2
  35007. CLK_AUDIO_I2SO3
  35008. CLK_AUDIO_I2SO4
  35009. CLK_AUDIO_IN
  35010. CLK_AUDIO_INTDIR
  35011. CLK_AUDIO_MEM_ASRC1
  35012. CLK_AUDIO_MEM_ASRC2
  35013. CLK_AUDIO_MEM_ASRC3
  35014. CLK_AUDIO_MEM_ASRC4
  35015. CLK_AUDIO_MEM_ASRC5
  35016. CLK_AUDIO_MOD
  35017. CLK_AUDIO_MUX
  35018. CLK_AUDIO_NR_CLK
  35019. CLK_AUDIO_PDN_ADDA6_ADC
  35020. CLK_AUDIO_PLL
  35021. CLK_AUDIO_PLL_MUX
  35022. CLK_AUDIO_REF_MUX
  35023. CLK_AUDIO_SPDF
  35024. CLK_AUDIO_TDM
  35025. CLK_AUDIO_TML
  35026. CLK_AUDIO_UL1
  35027. CLK_AUDIO_UL2
  35028. CLK_AUDIO_UL3
  35029. CLK_AUDIO_UL4
  35030. CLK_AUDIO_UL5
  35031. CLK_AUDIO_UL6
  35032. CLK_AUDSS
  35033. CLK_AUD_22M
  35034. CLK_AUD_24M
  35035. CLK_AUD_3RD_DAC
  35036. CLK_AUD_3RD_DAC_HIRES
  35037. CLK_AUD_3RD_DAC_PREDIS
  35038. CLK_AUD_3RD_DAC_TML
  35039. CLK_AUD_A1SYS
  35040. CLK_AUD_A2SYS
  35041. CLK_AUD_ADC
  35042. CLK_AUD_ADC_HIRES
  35043. CLK_AUD_ADC_HIRES_TML
  35044. CLK_AUD_ADDA6_ADC_HIRES
  35045. CLK_AUD_AFE
  35046. CLK_AUD_AFE_CONN
  35047. CLK_AUD_AFE_MRGIF
  35048. CLK_AUD_AFE_PCMIF
  35049. CLK_AUD_AHB_IDLE_EXT
  35050. CLK_AUD_AHB_IDLE_INT
  35051. CLK_AUD_APLL
  35052. CLK_AUD_APLL2_TUNER
  35053. CLK_AUD_APLL_TUNER
  35054. CLK_AUD_ASRC11
  35055. CLK_AUD_ASRC12
  35056. CLK_AUD_ASRCI1
  35057. CLK_AUD_ASRCI2
  35058. CLK_AUD_ASRCI3
  35059. CLK_AUD_ASRCI4
  35060. CLK_AUD_ASRCI5
  35061. CLK_AUD_ASRCI6
  35062. CLK_AUD_ASRCO1
  35063. CLK_AUD_ASRCO2
  35064. CLK_AUD_ASRCO3
  35065. CLK_AUD_ASRCO4
  35066. CLK_AUD_ASRCO5
  35067. CLK_AUD_ASRCO6
  35068. CLK_AUD_ASRC_BRG
  35069. CLK_AUD_CONN_I2S_ASRC
  35070. CLK_AUD_DAC
  35071. CLK_AUD_DAC_HIRES
  35072. CLK_AUD_DAC_PREDIS
  35073. CLK_AUD_DMIC1
  35074. CLK_AUD_DMIC2
  35075. CLK_AUD_DSD_ENC
  35076. CLK_AUD_GENERAL1_ASRC
  35077. CLK_AUD_GENERAL2_ASRC
  35078. CLK_AUD_HDMI
  35079. CLK_AUD_HDMIRX
  35080. CLK_AUD_I2S
  35081. CLK_AUD_I2S1_BCLK_SW
  35082. CLK_AUD_I2S2_BCLK_SW
  35083. CLK_AUD_I2S3_BCLK_SW
  35084. CLK_AUD_I2S4_BCLK_SW
  35085. CLK_AUD_I2S5_BCLK_SW
  35086. CLK_AUD_I2SIN1
  35087. CLK_AUD_I2SIN2
  35088. CLK_AUD_I2SIN3
  35089. CLK_AUD_I2SIN4
  35090. CLK_AUD_I2SIN5
  35091. CLK_AUD_I2SIN6
  35092. CLK_AUD_I2SO1
  35093. CLK_AUD_I2SO2
  35094. CLK_AUD_I2SO3
  35095. CLK_AUD_I2SO4
  35096. CLK_AUD_I2SO5
  35097. CLK_AUD_I2SO6
  35098. CLK_AUD_INTDIR
  35099. CLK_AUD_LRCK_DETECT
  35100. CLK_AUD_MEM_ASRC1
  35101. CLK_AUD_MEM_ASRC2
  35102. CLK_AUD_MEM_ASRC3
  35103. CLK_AUD_MEM_ASRC4
  35104. CLK_AUD_MEM_ASRC5
  35105. CLK_AUD_MMIF_ARB1
  35106. CLK_AUD_MMIF_AWB1
  35107. CLK_AUD_MMIF_AWB2
  35108. CLK_AUD_MMIF_DAI
  35109. CLK_AUD_MMIF_DL1
  35110. CLK_AUD_MMIF_DL2
  35111. CLK_AUD_MMIF_DL3
  35112. CLK_AUD_MMIF_DL4
  35113. CLK_AUD_MMIF_DL5
  35114. CLK_AUD_MMIF_DL6
  35115. CLK_AUD_MMIF_DLMCH
  35116. CLK_AUD_MMIF_UL1
  35117. CLK_AUD_MMIF_UL2
  35118. CLK_AUD_MMIF_UL3
  35119. CLK_AUD_MMIF_UL4
  35120. CLK_AUD_MMIF_UL5
  35121. CLK_AUD_MMIF_UL6
  35122. CLK_AUD_NLE
  35123. CLK_AUD_NR
  35124. CLK_AUD_NR_CLK
  35125. CLK_AUD_PDN_ADDA6_ADC
  35126. CLK_AUD_SPDF
  35127. CLK_AUD_SPDF2
  35128. CLK_AUD_TDM
  35129. CLK_AUD_TML
  35130. CLK_AUTODECT_ENABLE
  35131. CLK_AUX0
  35132. CLK_AUX0_EB
  35133. CLK_AUX1
  35134. CLK_AUX1_EB
  35135. CLK_AUX2
  35136. CLK_AUX2_EB
  35137. CLK_AUX_ADC
  35138. CLK_AUX_ADC_DIV
  35139. CLK_AUX_ADC_INTERNAL
  35140. CLK_AUX_ADC_INTERNAL_DIV
  35141. CLK_AUX_DISP
  35142. CLK_AVAIL
  35143. CLK_AVS
  35144. CLK_AVSP_HEVC
  35145. CLK_AVS_BIG_EB
  35146. CLK_AVS_BIG_RTC_EB
  35147. CLK_AVS_GPU0_RTC_EB
  35148. CLK_AVS_GPU1_RTC_EB
  35149. CLK_AVS_LIT_EB
  35150. CLK_AVS_LIT_RTC_EB
  35151. CLK_AXI
  35152. CLK_AXI0
  35153. CLK_AXI1
  35154. CLK_AXI_DRAM
  35155. CLK_B
  35156. CLK_BASE
  35157. CLK_BASE_INNER
  35158. CLK_BASE__INST0_SEG0
  35159. CLK_BASE__INST0_SEG1
  35160. CLK_BASE__INST0_SEG2
  35161. CLK_BASE__INST0_SEG3
  35162. CLK_BASE__INST0_SEG4
  35163. CLK_BASE__INST0_SEG5
  35164. CLK_BASE__INST1_SEG0
  35165. CLK_BASE__INST1_SEG1
  35166. CLK_BASE__INST1_SEG2
  35167. CLK_BASE__INST1_SEG3
  35168. CLK_BASE__INST1_SEG4
  35169. CLK_BASE__INST1_SEG5
  35170. CLK_BASE__INST2_SEG0
  35171. CLK_BASE__INST2_SEG1
  35172. CLK_BASE__INST2_SEG2
  35173. CLK_BASE__INST2_SEG3
  35174. CLK_BASE__INST2_SEG4
  35175. CLK_BASE__INST2_SEG5
  35176. CLK_BASE__INST3_SEG0
  35177. CLK_BASE__INST3_SEG1
  35178. CLK_BASE__INST3_SEG2
  35179. CLK_BASE__INST3_SEG3
  35180. CLK_BASE__INST3_SEG4
  35181. CLK_BASE__INST3_SEG5
  35182. CLK_BASE__INST4_SEG0
  35183. CLK_BASE__INST4_SEG1
  35184. CLK_BASE__INST4_SEG2
  35185. CLK_BASE__INST4_SEG3
  35186. CLK_BASE__INST4_SEG4
  35187. CLK_BASE__INST4_SEG5
  35188. CLK_BASE__INST5_SEG0
  35189. CLK_BASE__INST5_SEG1
  35190. CLK_BASE__INST5_SEG2
  35191. CLK_BASE__INST5_SEG3
  35192. CLK_BASE__INST5_SEG4
  35193. CLK_BASE__INST5_SEG5
  35194. CLK_BASE__INST6_SEG0
  35195. CLK_BASE__INST6_SEG1
  35196. CLK_BASE__INST6_SEG2
  35197. CLK_BASE__INST6_SEG3
  35198. CLK_BASE__INST6_SEG4
  35199. CLK_BASE__INST6_SEG5
  35200. CLK_BASE__INST7_SEG0
  35201. CLK_BASE__INST7_SEG1
  35202. CLK_BASE__INST7_SEG2
  35203. CLK_BASE__INST7_SEG3
  35204. CLK_BASE__INST7_SEG4
  35205. CLK_BASE__INST7_SEG5
  35206. CLK_BB_CAL_RTC_EB
  35207. CLK_BDP_BRG_BA
  35208. CLK_BDP_BRG_DRAM
  35209. CLK_BDP_BRG_RT_B
  35210. CLK_BDP_BRG_RT_DRAM
  35211. CLK_BDP_BRIDGE_B
  35212. CLK_BDP_BRIDGE_DRAM
  35213. CLK_BDP_BRIDGE_RT_B
  35214. CLK_BDP_BRIDGE_RT_DRAM
  35215. CLK_BDP_DGI_IN
  35216. CLK_BDP_DGI_OUT
  35217. CLK_BDP_DISPFMT_27M
  35218. CLK_BDP_DISPFMT_27M_VDOUT
  35219. CLK_BDP_DISPFMT_27_74_74
  35220. CLK_BDP_DISPFMT_2FS
  35221. CLK_BDP_DISPFMT_2FS_2FS74_148
  35222. CLK_BDP_DISPFMT_B
  35223. CLK_BDP_F27M
  35224. CLK_BDP_F27M_VDOUT
  35225. CLK_BDP_F27_74_74
  35226. CLK_BDP_F2FS
  35227. CLK_BDP_F2FS74_148
  35228. CLK_BDP_FB
  35229. CLK_BDP_FMT_B
  35230. CLK_BDP_FMT_MAST_27
  35231. CLK_BDP_HDMI_MON
  35232. CLK_BDP_LARBRT_DRAM
  35233. CLK_BDP_LARB_DRAM
  35234. CLK_BDP_LARB_RT_DRAM
  35235. CLK_BDP_MT_B
  35236. CLK_BDP_NR
  35237. CLK_BDP_NR_AGENT
  35238. CLK_BDP_NR_B
  35239. CLK_BDP_NR_CLK
  35240. CLK_BDP_NR_DRAM
  35241. CLK_BDP_NR_PXL
  35242. CLK_BDP_OSD_AGENT
  35243. CLK_BDP_OSD_B
  35244. CLK_BDP_OSD_DRAM
  35245. CLK_BDP_OSD_PXL
  35246. CLK_BDP_RLE_AGENT
  35247. CLK_BDP_RLE_B
  35248. CLK_BDP_RLE_DRAM
  35249. CLK_BDP_RXPDT
  35250. CLK_BDP_RX_CSCL
  35251. CLK_BDP_RX_CSCL_N
  35252. CLK_BDP_RX_DDCSCL
  35253. CLK_BDP_RX_DDCSCL_N
  35254. CLK_BDP_RX_DP
  35255. CLK_BDP_RX_F
  35256. CLK_BDP_RX_M
  35257. CLK_BDP_RX_P
  35258. CLK_BDP_RX_PLL
  35259. CLK_BDP_RX_VCO
  35260. CLK_BDP_RX_X
  35261. CLK_BDP_TMDS_SYN
  35262. CLK_BDP_TVD_54
  35263. CLK_BDP_TVD_CBUS
  35264. CLK_BDP_TVD_TDC
  35265. CLK_BDP_VDO_2FS
  35266. CLK_BDP_VDO_B
  35267. CLK_BDP_VDO_DRAM
  35268. CLK_BDP_WR_B
  35269. CLK_BDP_WR_CHANNEL_DI_B
  35270. CLK_BDP_WR_CHANNEL_DI_DRAM
  35271. CLK_BDP_WR_CHANNEL_DI_PXL
  35272. CLK_BDP_WR_CHANNEL_VDI_B
  35273. CLK_BDP_WR_CHANNEL_VDI_DRAM
  35274. CLK_BDP_WR_CHANNEL_VDI_PXL
  35275. CLK_BDP_WR_DI_B
  35276. CLK_BDP_WR_DI_DRAM
  35277. CLK_BDP_WR_DI_PXL
  35278. CLK_BDP_WR_VDI_DRAM
  35279. CLK_BDP_WR_VDI_PXL
  35280. CLK_BE0
  35281. CLK_BE0_DIV
  35282. CLK_BE1
  35283. CLK_BE1_DIV
  35284. CLK_BE2
  35285. CLK_BE2_DIV
  35286. CLK_BIG_MCU
  35287. CLK_BISP
  35288. CLK_BLK_EN
  35289. CLK_BLOCK_CAM
  35290. CLK_BLOCK_G3D
  35291. CLK_BLOCK_LCD
  35292. CLK_BLOCK_MFC
  35293. CLK_BOOT
  35294. CLK_BRG
  35295. CLK_BRG_MASK
  35296. CLK_BRG_RX
  35297. CLK_BRG_TX
  35298. CLK_BT
  35299. CLK_BTUART
  35300. CLK_BT_1MHZ
  35301. CLK_BT_1MHZ_DIV
  35302. CLK_BT_1MHZ_INTERNAL_DIV
  35303. CLK_BT_DIV
  35304. CLK_BT_DIV4
  35305. CLK_BT_DIV4_DIV
  35306. CLK_BT_DIV8
  35307. CLK_BT_DIV8_DIV
  35308. CLK_BT_PLL
  35309. CLK_BT_PLL_MUX
  35310. CLK_BUF_TIME
  35311. CLK_BUS
  35312. CLK_BUSMON_EB
  35313. CLK_BUS_AC97
  35314. CLK_BUS_AUDIO_HUB
  35315. CLK_BUS_BE0
  35316. CLK_BUS_BE1
  35317. CLK_BUS_BE2
  35318. CLK_BUS_CAN
  35319. CLK_BUS_CE
  35320. CLK_BUS_CIR_TX
  35321. CLK_BUS_CODEC
  35322. CLK_BUS_CSI
  35323. CLK_BUS_CSI0
  35324. CLK_BUS_CSI1
  35325. CLK_BUS_DBG
  35326. CLK_BUS_DE
  35327. CLK_BUS_DEINTERLACE
  35328. CLK_BUS_DEU0
  35329. CLK_BUS_DEU1
  35330. CLK_BUS_DE_BE
  35331. CLK_BUS_DE_FE
  35332. CLK_BUS_DMA
  35333. CLK_BUS_DMIC
  35334. CLK_BUS_DRAM
  35335. CLK_BUS_DRC
  35336. CLK_BUS_DRC0
  35337. CLK_BUS_DRC1
  35338. CLK_BUS_EDP
  35339. CLK_BUS_EHCI
  35340. CLK_BUS_EHCI0
  35341. CLK_BUS_EHCI1
  35342. CLK_BUS_EHCI2
  35343. CLK_BUS_EHCI3
  35344. CLK_BUS_EMAC
  35345. CLK_BUS_EMCE
  35346. CLK_BUS_EPHY
  35347. CLK_BUS_FD
  35348. CLK_BUS_FE0
  35349. CLK_BUS_FE1
  35350. CLK_BUS_FE2
  35351. CLK_BUS_GMAC
  35352. CLK_BUS_GPADC
  35353. CLK_BUS_GPU
  35354. CLK_BUS_GPU_CTRL
  35355. CLK_BUS_HCI0
  35356. CLK_BUS_HCI1
  35357. CLK_BUS_HCI2
  35358. CLK_BUS_HDCP
  35359. CLK_BUS_HDMI
  35360. CLK_BUS_HDMI0
  35361. CLK_BUS_HDMI1
  35362. CLK_BUS_HSTIMER
  35363. CLK_BUS_I2C0
  35364. CLK_BUS_I2C1
  35365. CLK_BUS_I2C2
  35366. CLK_BUS_I2C3
  35367. CLK_BUS_I2C4
  35368. CLK_BUS_I2S0
  35369. CLK_BUS_I2S1
  35370. CLK_BUS_I2S2
  35371. CLK_BUS_I2S3
  35372. CLK_BUS_IOMMU
  35373. CLK_BUS_IR
  35374. CLK_BUS_IR0
  35375. CLK_BUS_IR1
  35376. CLK_BUS_IR_TX
  35377. CLK_BUS_KEYPAD
  35378. CLK_BUS_LCD
  35379. CLK_BUS_LCD0
  35380. CLK_BUS_LCD1
  35381. CLK_BUS_LRADC
  35382. CLK_BUS_MIPI_DSI
  35383. CLK_BUS_MIPI_HSI
  35384. CLK_BUS_MIXER0
  35385. CLK_BUS_MIXER1
  35386. CLK_BUS_MMC
  35387. CLK_BUS_MMC0
  35388. CLK_BUS_MMC1
  35389. CLK_BUS_MMC2
  35390. CLK_BUS_MMC3
  35391. CLK_BUS_MP
  35392. CLK_BUS_MSGBOX
  35393. CLK_BUS_NAND
  35394. CLK_BUS_NAND0
  35395. CLK_BUS_NAND1
  35396. CLK_BUS_OHCI
  35397. CLK_BUS_OHCI0
  35398. CLK_BUS_OHCI1
  35399. CLK_BUS_OHCI2
  35400. CLK_BUS_OHCI3
  35401. CLK_BUS_OTG
  35402. CLK_BUS_PCIE
  35403. CLK_BUS_PIO
  35404. CLK_BUS_PS20
  35405. CLK_BUS_PS21
  35406. CLK_BUS_PSI
  35407. CLK_BUS_PWM
  35408. CLK_BUS_ROT
  35409. CLK_BUS_RSB
  35410. CLK_BUS_SAT
  35411. CLK_BUS_SATA
  35412. CLK_BUS_SCR
  35413. CLK_BUS_SCR0
  35414. CLK_BUS_SCR1
  35415. CLK_BUS_SDRAM
  35416. CLK_BUS_SPDIF
  35417. CLK_BUS_SPI0
  35418. CLK_BUS_SPI1
  35419. CLK_BUS_SPI2
  35420. CLK_BUS_SPI3
  35421. CLK_BUS_SPINLOCK
  35422. CLK_BUS_SS
  35423. CLK_BUS_TCON0
  35424. CLK_BUS_TCON1
  35425. CLK_BUS_TCON_LCD0
  35426. CLK_BUS_TCON_LCD1
  35427. CLK_BUS_TCON_TOP
  35428. CLK_BUS_TCON_TV0
  35429. CLK_BUS_TCON_TV1
  35430. CLK_BUS_TDM
  35431. CLK_BUS_THS
  35432. CLK_BUS_TS
  35433. CLK_BUS_TVD
  35434. CLK_BUS_TVD0
  35435. CLK_BUS_TVD1
  35436. CLK_BUS_TVD2
  35437. CLK_BUS_TVD3
  35438. CLK_BUS_TVD_TOP
  35439. CLK_BUS_TVE
  35440. CLK_BUS_TVE0
  35441. CLK_BUS_TVE1
  35442. CLK_BUS_TVE_TOP
  35443. CLK_BUS_TWD
  35444. CLK_BUS_UART0
  35445. CLK_BUS_UART1
  35446. CLK_BUS_UART2
  35447. CLK_BUS_UART3
  35448. CLK_BUS_UART4
  35449. CLK_BUS_UART5
  35450. CLK_BUS_UART6
  35451. CLK_BUS_UART7
  35452. CLK_BUS_USB
  35453. CLK_BUS_VE
  35454. CLK_BUS_VP9
  35455. CLK_BUS_WB
  35456. CLK_BUS_XHCI
  35457. CLK_C
  35458. CLK_C0CPUX
  35459. CLK_C1CPUX
  35460. CLK_CA53_DAP
  35461. CLK_CA53_TS
  35462. CLK_CAM
  35463. CLK_CAM1
  35464. CLK_CAMERA
  35465. CLK_CAMIF_TOP
  35466. CLK_CAM_CAM
  35467. CLK_CAM_CAMSV0
  35468. CLK_CAM_CAMSV1
  35469. CLK_CAM_CAMSV2
  35470. CLK_CAM_CAMSV3
  35471. CLK_CAM_CAMTG
  35472. CLK_CAM_CCU
  35473. CLK_CAM_CKG_EB
  35474. CLK_CAM_DFP_VAD
  35475. CLK_CAM_EB
  35476. CLK_CAM_FAKE_ENG
  35477. CLK_CAM_GATE_NUM
  35478. CLK_CAM_LARB10
  35479. CLK_CAM_LARB11
  35480. CLK_CAM_LARB3
  35481. CLK_CAM_LARB6
  35482. CLK_CAM_LARB9
  35483. CLK_CAM_MMU_EB
  35484. CLK_CAM_NR_CLK
  35485. CLK_CAM_NUM
  35486. CLK_CAM_SENINF
  35487. CLK_CC63P_EB
  35488. CLK_CC63S_EB
  35489. CLK_CCI
  35490. CLK_CCI400
  35491. CLK_CE
  35492. CLK_CE0_EB
  35493. CLK_CE1_EB
  35494. CLK_CFCON
  35495. CLK_CFG
  35496. CLK_CFG_DIS
  35497. CLK_CFG_INV_BUS_CLK
  35498. CLK_CFG_INV_OUT_CLK
  35499. CLK_CFG_SEL_ACLK
  35500. CLK_CFG_SEL_ACLK_EN
  35501. CLK_CH8398
  35502. CLK_CHANGE
  35503. CLK_CHIPID
  35504. CLK_CHIP_ID
  35505. CLK_CIR
  35506. CLK_CIR_TX
  35507. CLK_CLEAR
  35508. CLK_CLK
  35509. CLK_CLK26M
  35510. CLK_CLK26M_IF_EB
  35511. CLK_CLK2X_PHY0
  35512. CLK_CLK2X_PHY1
  35513. CLK_CLKM_PHY0
  35514. CLK_CLKM_PHY1
  35515. CLK_CLR_REGOFFSET
  35516. CLK_CLUST_HADES
  35517. CLK_CLUST_HEVC
  35518. CLK_CM3_I2C0
  35519. CLK_CM3_I2C1
  35520. CLK_CM3_UART0
  35521. CLK_CM3_UART1
  35522. CLK_CM4_SPI
  35523. CLK_CMU_CORE
  35524. CLK_CMU_COREPART
  35525. CLK_CMU_ISPPART
  35526. CLK_CMU_MEM
  35527. CLK_CMU_TOP
  35528. CLK_CMU_TOPPART
  35529. CLK_CNT
  35530. CLK_CNTCLK_APOLLO
  35531. CLK_CNTCLK_ATLAS
  35532. CLK_CNTRL_PRESCALE
  35533. CLK_CNTRL_PRESCALE_EN
  35534. CLK_CODEC
  35535. CLK_COMMON_MASK_SH_LIST_DCE_COMMON_BASE
  35536. CLK_COMMON_MASK_SH_LIST_DCN20_BASE
  35537. CLK_COMMON_MASK_SH_LIST_DCN_COMMON_BASE
  35538. CLK_COMMON_REG_LIST_DCE_BASE
  35539. CLK_COMMON_REG_LIST_DCN_BASE
  35540. CLK_COMPONENT_TYPE_DIVIDER
  35541. CLK_COMPONENT_TYPE_GATE
  35542. CLK_COMPONENT_TYPE_MAX
  35543. CLK_COMPONENT_TYPE_MUX
  35544. CLK_COMPOSITE
  35545. CLK_COMPO_DVP
  35546. CLK_CONTINUOUS
  35547. CLK_CONTINUOUS_MODE
  35548. CLK_CORE
  35549. CLK_CORESIGHT
  35550. CLK_CORE_PHASE_MASK
  35551. CLK_CORE_PLL
  35552. CLK_COUNT
  35553. CLK_CPHY0_GATE
  35554. CLK_CPHY1_GATE
  35555. CLK_CPPLL
  35556. CLK_CPPLL_50M
  35557. CLK_CPPLL_GATE
  35558. CLK_CPP_AXI_GATE
  35559. CLK_CPP_EB
  35560. CLK_CPU
  35561. CLK_CPUX
  35562. CLK_CPUX_APB
  35563. CLK_CPU_ADCHS
  35564. CLK_CPU_BUS
  35565. CLK_CPU_CORE
  35566. CLK_CPU_CREG
  35567. CLK_CPU_DMA
  35568. CLK_CPU_EEPROM
  35569. CLK_CPU_EMC
  35570. CLK_CPU_EMCDIV
  35571. CLK_CPU_ETHERNET
  35572. CLK_CPU_FLASHA
  35573. CLK_CPU_FLASHB
  35574. CLK_CPU_GPIO
  35575. CLK_CPU_HAS_DIV1
  35576. CLK_CPU_HAS_E5433_REGS_LAYOUT
  35577. CLK_CPU_LCD
  35578. CLK_CPU_M0APP
  35579. CLK_CPU_NEEDS_DEBUG_ALT_DIV
  35580. CLK_CPU_QEI
  35581. CLK_CPU_RITIMER
  35582. CLK_CPU_SCT
  35583. CLK_CPU_SCU
  35584. CLK_CPU_SDIO
  35585. CLK_CPU_SPIFI
  35586. CLK_CPU_SSP0
  35587. CLK_CPU_SSP1
  35588. CLK_CPU_TIMER0
  35589. CLK_CPU_TIMER1
  35590. CLK_CPU_TIMER2
  35591. CLK_CPU_TIMER3
  35592. CLK_CPU_UART0
  35593. CLK_CPU_UART1
  35594. CLK_CPU_UART2
  35595. CLK_CPU_UART3
  35596. CLK_CPU_USB0
  35597. CLK_CPU_USB1
  35598. CLK_CPU_WWDT
  35599. CLK_CSI
  35600. CLK_CSI0
  35601. CLK_CSI0_EB
  35602. CLK_CSI0_MCLK
  35603. CLK_CSI0_SCLK
  35604. CLK_CSI1
  35605. CLK_CSI1_EB
  35606. CLK_CSI1_MCLK
  35607. CLK_CSI1_SCLK
  35608. CLK_CSIS
  35609. CLK_CSIS0
  35610. CLK_CSIS1
  35611. CLK_CSI_CCI
  35612. CLK_CSI_ISP
  35613. CLK_CSI_MCLK
  35614. CLK_CSI_MISC
  35615. CLK_CSI_SCLK
  35616. CLK_CSI_TOP
  35617. CLK_CSSYS
  35618. CLK_CTL
  35619. CLK_CTL2_CZCOUNT_30NS_SHIFT
  35620. CLK_CTL_DIV_MASK
  35621. CLK_CTL_SCLKEN
  35622. CLK_CTMCLK
  35623. CLK_CTRL
  35624. CLK_CTRL3
  35625. CLK_CTRL4
  35626. CLK_CTRL5
  35627. CLK_CTRL7
  35628. CLK_CTRL_ACCUM_RST_ON_LOOP
  35629. CLK_CTRL_FREQ_CTRL_MASK
  35630. CLK_CTRL_SPI_CLK_2X_SEL
  35631. CLK_CVBS_PLL
  35632. CLK_D
  35633. CLK_D0IF_IN_D2I_EN
  35634. CLK_D0IF_IN_D_EN
  35635. CLK_D0_IF_AXI_GATE
  35636. CLK_D1IF_IN_D2I_EN
  35637. CLK_D1IF_IN_D_EN
  35638. CLK_D2I_IF_AXI_GATE
  35639. CLK_DACODEC
  35640. CLK_DAP_EB
  35641. CLK_DATA_TMR_CFG
  35642. CLK_DAUDIO0
  35643. CLK_DAUDIO1
  35644. CLK_DA_AD_MAX
  35645. CLK_DBG_AXI_IF_EB
  35646. CLK_DBG_EMC_EB
  35647. CLK_DCAM0_AXI_GATE
  35648. CLK_DCAM0_EB
  35649. CLK_DCAM0_IF_EB
  35650. CLK_DCAM1_AXI_GATE
  35651. CLK_DCAM1_EB
  35652. CLK_DCAM2ISP_IF_EB
  35653. CLK_DCEFCLK
  35654. CLK_DCLK
  35655. CLK_DCXO_TMR_RTC_EB
  35656. CLK_DDR0
  35657. CLK_DDR1
  35658. CLK_DDRPHY_NR
  35659. CLK_DDRPHY_VENCPLL
  35660. CLK_DDR_PLL
  35661. CLK_DE
  35662. CLK_DE0
  35663. CLK_DE1
  35664. CLK_DE2
  35665. CLK_DE3
  35666. CLK_DEBOUNCE
  35667. CLK_DEBUG_MUX
  35668. CLK_DEFAULT
  35669. CLK_DEF_EB
  35670. CLK_DEINTERLACE
  35671. CLK_DELAY
  35672. CLK_DENC
  35673. CLK_DEV
  35674. CLK_DEV_PLL
  35675. CLK_DE_BE
  35676. CLK_DE_BE0
  35677. CLK_DE_BE1
  35678. CLK_DE_FE
  35679. CLK_DE_FE0
  35680. CLK_DE_FE1
  35681. CLK_DE_MP
  35682. CLK_DFSDM1
  35683. CLK_DIGITAL_MIC
  35684. CLK_DIRECT
  35685. CLK_DIS
  35686. CLK_DISPC0_DPI
  35687. CLK_DISPC0_EB
  35688. CLK_DISPC1_DPI
  35689. CLK_DISPC1_EB
  35690. CLK_DISPC_MMU_EB
  35691. CLK_DISPC_MTX_EB
  35692. CLK_DISPLAY_PLL
  35693. CLK_DISPM0IDLE_GATE
  35694. CLK_DISP_CKG_EB
  35695. CLK_DISP_EB
  35696. CLK_DISP_EMC_EB
  35697. CLK_DISP_GATE_NUM
  35698. CLK_DISP_GPU_EB
  35699. CLK_DISP_NUM
  35700. CLK_DIS_WAIT_MASK
  35701. CLK_DIS_WAIT_SHIFT
  35702. CLK_DIS_WAIT_VAL
  35703. CLK_DIV
  35704. CLK_DIV0
  35705. CLK_DIV1
  35706. CLK_DIV2
  35707. CLK_DIV3
  35708. CLK_DIV4
  35709. CLK_DIV5
  35710. CLK_DIV6
  35711. CLK_DIV7
  35712. CLK_DIVIDER
  35713. CLK_DIVIDER_ALLOW_ZERO
  35714. CLK_DIVIDER_BIG_ENDIAN
  35715. CLK_DIVIDER_HIWORD_MASK
  35716. CLK_DIVIDER_MASK
  35717. CLK_DIVIDER_MAX_AT_ZERO
  35718. CLK_DIVIDER_ONE_BASED
  35719. CLK_DIVIDER_POWER_OF_TWO
  35720. CLK_DIVIDER_READ_ONLY
  35721. CLK_DIVIDER_ROUND_CLOSEST
  35722. CLK_DIVIDER_SHIFT
  35723. CLK_DIV_1
  35724. CLK_DIV_2
  35725. CLK_DIV_4
  35726. CLK_DIV_8
  35727. CLK_DIV_ACLK200
  35728. CLK_DIV_ACLK400_MCUISP
  35729. CLK_DIV_ACLK_100
  35730. CLK_DIV_ACLK_160
  35731. CLK_DIV_ACLK_200
  35732. CLK_DIV_ACLK_266
  35733. CLK_DIV_ACLK_3AA0
  35734. CLK_DIV_ACLK_3AA1
  35735. CLK_DIV_ACLK_400_MCUISP
  35736. CLK_DIV_ACLK_APOLLO
  35737. CLK_DIV_ACLK_ATLAS
  35738. CLK_DIV_ACLK_AUD
  35739. CLK_DIV_ACLK_BUS0_400
  35740. CLK_DIV_ACLK_BUS1_400
  35741. CLK_DIV_ACLK_BUS2_400
  35742. CLK_DIV_ACLK_CAM0_200
  35743. CLK_DIV_ACLK_CAM0_333
  35744. CLK_DIV_ACLK_CAM0_400
  35745. CLK_DIV_ACLK_CAM0_552
  35746. CLK_DIV_ACLK_CAM0_BUS_400
  35747. CLK_DIV_ACLK_CAM1_333
  35748. CLK_DIV_ACLK_CAM1_400
  35749. CLK_DIV_ACLK_CAM1_552
  35750. CLK_DIV_ACLK_CPIF_200
  35751. CLK_DIV_ACLK_CSIS0
  35752. CLK_DIV_ACLK_CSIS1
  35753. CLK_DIV_ACLK_CSIS2
  35754. CLK_DIV_ACLK_DISP_333
  35755. CLK_DIV_ACLK_DREX0
  35756. CLK_DIV_ACLK_DREX1
  35757. CLK_DIV_ACLK_FD
  35758. CLK_DIV_ACLK_FSYS_200
  35759. CLK_DIV_ACLK_G2D_266
  35760. CLK_DIV_ACLK_G2D_400
  35761. CLK_DIV_ACLK_G3D
  35762. CLK_DIV_ACLK_G3D_400
  35763. CLK_DIV_ACLK_GSCL_111
  35764. CLK_DIV_ACLK_GSCL_333
  35765. CLK_DIV_ACLK_HEVC_400
  35766. CLK_DIV_ACLK_IMEM_200
  35767. CLK_DIV_ACLK_IMEM_266
  35768. CLK_DIV_ACLK_IMEM_SSSX_266
  35769. CLK_DIV_ACLK_ISP_400
  35770. CLK_DIV_ACLK_ISP_C_200
  35771. CLK_DIV_ACLK_ISP_DIS_400
  35772. CLK_DIV_ACLK_ISP_D_200
  35773. CLK_DIV_ACLK_LITE_A
  35774. CLK_DIV_ACLK_LITE_B
  35775. CLK_DIV_ACLK_LITE_C
  35776. CLK_DIV_ACLK_LITE_D
  35777. CLK_DIV_ACLK_MFC_400
  35778. CLK_DIV_ACLK_MIFND_133
  35779. CLK_DIV_ACLK_MIFNM_200
  35780. CLK_DIV_ACLK_MIF_133
  35781. CLK_DIV_ACLK_MIF_200
  35782. CLK_DIV_ACLK_MIF_266
  35783. CLK_DIV_ACLK_MIF_400
  35784. CLK_DIV_ACLK_MSCL_400
  35785. CLK_DIV_ACLK_PERIC_66_A
  35786. CLK_DIV_ACLK_PERIC_66_B
  35787. CLK_DIV_ACLK_PERIS_66_A
  35788. CLK_DIV_ACLK_PERIS_66_B
  35789. CLK_DIV_ACP
  35790. CLK_DIV_APLL
  35791. CLK_DIV_APOLLO1
  35792. CLK_DIV_APOLLO2
  35793. CLK_DIV_APOLLO_PLL
  35794. CLK_DIV_ATB
  35795. CLK_DIV_ATCLK_APOLLO
  35796. CLK_DIV_ATCLK_ATLASO
  35797. CLK_DIV_ATCLK_AUD
  35798. CLK_DIV_ATCLK_CAM1
  35799. CLK_DIV_ATLAS1
  35800. CLK_DIV_ATLAS2
  35801. CLK_DIV_ATLAS_PLL
  35802. CLK_DIV_AUDIO
  35803. CLK_DIV_AUD_CA5
  35804. CLK_DIV_BY_48
  35805. CLK_DIV_BY_49
  35806. CLK_DIV_BY_50
  35807. CLK_DIV_C2C
  35808. CLK_DIV_CAM1
  35809. CLK_DIV_CAM_BLK
  35810. CLK_DIV_CLK2XPHY
  35811. CLK_DIV_CNTCLK_APOLLO
  35812. CLK_DIV_CNTCLK_ATLAS
  35813. CLK_DIV_COPY
  35814. CLK_DIV_CORE
  35815. CLK_DIV_CORE2
  35816. CLK_DIV_COREM
  35817. CLK_DIV_DMC
  35818. CLK_DIV_DMCD
  35819. CLK_DIV_DMCP
  35820. CLK_DIV_DMC_PRE
  35821. CLK_DIV_DPHY
  35822. CLK_DIV_EBI
  35823. CLK_DIV_FIMD0
  35824. CLK_DIV_G3D
  35825. CLK_DIV_GDL
  35826. CLK_DIV_GDR
  35827. CLK_DIV_GPL
  35828. CLK_DIV_GPR
  35829. CLK_DIV_HPM
  35830. CLK_DIV_I2S
  35831. CLK_DIV_I2S1
  35832. CLK_DIV_I2S2
  35833. CLK_DIV_ISP0
  35834. CLK_DIV_ISP1
  35835. CLK_DIV_MASK
  35836. CLK_DIV_MAX
  35837. CLK_DIV_MCUISP0
  35838. CLK_DIV_MCUISP1
  35839. CLK_DIV_MFC
  35840. CLK_DIV_MIF_PRE
  35841. CLK_DIV_MIPI0
  35842. CLK_DIV_MIPI0_PRE
  35843. CLK_DIV_MMC0
  35844. CLK_DIV_MMC0_PRE
  35845. CLK_DIV_MMC1
  35846. CLK_DIV_MMC1_PRE
  35847. CLK_DIV_MMC2
  35848. CLK_DIV_MMC2_PRE
  35849. CLK_DIV_MPLL_PRE
  35850. CLK_DIV_MPWM
  35851. CLK_DIV_MSK
  35852. CLK_DIV_PCLK_3AA0
  35853. CLK_DIV_PCLK_3AA1
  35854. CLK_DIV_PCLK_APOLLO
  35855. CLK_DIV_PCLK_ATLAS
  35856. CLK_DIV_PCLK_BUS_133
  35857. CLK_DIV_PCLK_CAM0_50
  35858. CLK_DIV_PCLK_CAM1_166
  35859. CLK_DIV_PCLK_CAM1_83
  35860. CLK_DIV_PCLK_DBG
  35861. CLK_DIV_PCLK_DBG_APOLLO
  35862. CLK_DIV_PCLK_DBG_ATLAS
  35863. CLK_DIV_PCLK_DBG_AUD
  35864. CLK_DIV_PCLK_DBG_CAM1
  35865. CLK_DIV_PCLK_DISP
  35866. CLK_DIV_PCLK_FD
  35867. CLK_DIV_PCLK_G2D
  35868. CLK_DIV_PCLK_G3D
  35869. CLK_DIV_PCLK_HEVC
  35870. CLK_DIV_PCLK_ISP
  35871. CLK_DIV_PCLK_ISP_DIS
  35872. CLK_DIV_PCLK_LITE_A
  35873. CLK_DIV_PCLK_LITE_B
  35874. CLK_DIV_PCLK_LITE_C
  35875. CLK_DIV_PCLK_LITE_D
  35876. CLK_DIV_PCLK_MFC
  35877. CLK_DIV_PCLK_MSCL
  35878. CLK_DIV_PCLK_PIXELASYNC_LITE_C
  35879. CLK_DIV_PCM
  35880. CLK_DIV_PCM0
  35881. CLK_DIV_RESERVED
  35882. CLK_DIV_SCLK_AUDIO0
  35883. CLK_DIV_SCLK_AUDIO1
  35884. CLK_DIV_SCLK_AUD_I2S
  35885. CLK_DIV_SCLK_AUD_PCM
  35886. CLK_DIV_SCLK_AUD_SLIMBUS
  35887. CLK_DIV_SCLK_AUD_UART
  35888. CLK_DIV_SCLK_DECON_ECLK
  35889. CLK_DIV_SCLK_DECON_ECLK_DISP
  35890. CLK_DIV_SCLK_DECON_TV_ECLK
  35891. CLK_DIV_SCLK_DECON_TV_ECLK_DISP
  35892. CLK_DIV_SCLK_DECON_TV_VCLK
  35893. CLK_DIV_SCLK_DECON_TV_VCLK_DISP
  35894. CLK_DIV_SCLK_DECON_VCLK
  35895. CLK_DIV_SCLK_DECON_VCLK_DISP
  35896. CLK_DIV_SCLK_DSD
  35897. CLK_DIV_SCLK_DSIM0
  35898. CLK_DIV_SCLK_DSIM0_DISP
  35899. CLK_DIV_SCLK_DSIM1
  35900. CLK_DIV_SCLK_DSIM1_DISP
  35901. CLK_DIV_SCLK_HPM_APOLLO
  35902. CLK_DIV_SCLK_HPM_ATLAS
  35903. CLK_DIV_SCLK_HPM_G3D
  35904. CLK_DIV_SCLK_HPM_MIF
  35905. CLK_DIV_SCLK_I2S1
  35906. CLK_DIV_SCLK_ISP_MPWM
  35907. CLK_DIV_SCLK_ISP_SENSOR0_A
  35908. CLK_DIV_SCLK_ISP_SENSOR0_B
  35909. CLK_DIV_SCLK_ISP_SENSOR1_A
  35910. CLK_DIV_SCLK_ISP_SENSOR1_B
  35911. CLK_DIV_SCLK_ISP_SENSOR2_A
  35912. CLK_DIV_SCLK_ISP_SENSOR2_B
  35913. CLK_DIV_SCLK_ISP_SPI0_A
  35914. CLK_DIV_SCLK_ISP_SPI0_B
  35915. CLK_DIV_SCLK_ISP_SPI1_A
  35916. CLK_DIV_SCLK_ISP_SPI1_B
  35917. CLK_DIV_SCLK_ISP_UART
  35918. CLK_DIV_SCLK_JPEG
  35919. CLK_DIV_SCLK_MMC0_A
  35920. CLK_DIV_SCLK_MMC0_B
  35921. CLK_DIV_SCLK_MMC1_A
  35922. CLK_DIV_SCLK_MMC1_B
  35923. CLK_DIV_SCLK_MMC2_A
  35924. CLK_DIV_SCLK_MMC2_B
  35925. CLK_DIV_SCLK_MPHY
  35926. CLK_DIV_SCLK_PCIE_100
  35927. CLK_DIV_SCLK_PCM1
  35928. CLK_DIV_SCLK_PIXELASYNC_LITE_C
  35929. CLK_DIV_SCLK_PIXELASYNC_LITE_C_INIT
  35930. CLK_DIV_SCLK_SCI
  35931. CLK_DIV_SCLK_SC_IN
  35932. CLK_DIV_SCLK_SPI0_A
  35933. CLK_DIV_SCLK_SPI0_B
  35934. CLK_DIV_SCLK_SPI1_A
  35935. CLK_DIV_SCLK_SPI1_B
  35936. CLK_DIV_SCLK_SPI2_A
  35937. CLK_DIV_SCLK_SPI2_B
  35938. CLK_DIV_SCLK_SPI3_A
  35939. CLK_DIV_SCLK_SPI3_B
  35940. CLK_DIV_SCLK_SPI4_A
  35941. CLK_DIV_SCLK_SPI4_B
  35942. CLK_DIV_SCLK_UART0
  35943. CLK_DIV_SCLK_UART1
  35944. CLK_DIV_SCLK_UART2
  35945. CLK_DIV_SCLK_UFSUNIPRO
  35946. CLK_DIV_SCLK_USBDRD30
  35947. CLK_DIV_SCLK_USBHOST30
  35948. CLK_DIV_SELECT
  35949. CLK_DIV_SHFT
  35950. CLK_DIV_SPI0
  35951. CLK_DIV_SPI0_ISP
  35952. CLK_DIV_SPI0_ISP_PRE
  35953. CLK_DIV_SPI0_PRE
  35954. CLK_DIV_SPI1
  35955. CLK_DIV_SPI1_ISP
  35956. CLK_DIV_SPI1_ISP_PRE
  35957. CLK_DIV_SPI1_PRE
  35958. CLK_DIV_TSADC
  35959. CLK_DIV_TSADC_PRE
  35960. CLK_DIV_UART0
  35961. CLK_DIV_UART1
  35962. CLK_DIV_UART2
  35963. CLK_DIV_UART_ISP
  35964. CLK_DJTAG_EB
  35965. CLK_DJTAG_TCK
  35966. CLK_DMAC
  35967. CLK_DMA_EB
  35968. CLK_DMC
  35969. CLK_DMC0
  35970. CLK_DMC1
  35971. CLK_DMIC
  35972. CLK_DMM
  35973. CLK_DOUT_ACLK100_NOC
  35974. CLK_DOUT_ACLK166
  35975. CLK_DOUT_ACLK200
  35976. CLK_DOUT_ACLK200_FSYS
  35977. CLK_DOUT_ACLK200_FSYS2
  35978. CLK_DOUT_ACLK266
  35979. CLK_DOUT_ACLK266_G2D
  35980. CLK_DOUT_ACLK300_DISP1
  35981. CLK_DOUT_ACLK300_GSCL
  35982. CLK_DOUT_ACLK300_JPEG
  35983. CLK_DOUT_ACLK333
  35984. CLK_DOUT_ACLK333_432_GSCL
  35985. CLK_DOUT_ACLK333_432_ISP
  35986. CLK_DOUT_ACLK333_432_ISP0
  35987. CLK_DOUT_ACLK333_G2D
  35988. CLK_DOUT_ACLK400_DISP1
  35989. CLK_DOUT_ACLK400_ISP
  35990. CLK_DOUT_ACLK400_MSCL
  35991. CLK_DOUT_ACLK400_WCORE
  35992. CLK_DOUT_ACLK66
  35993. CLK_DOUT_ACLK_CDREX1
  35994. CLK_DOUT_ACLK_G3D
  35995. CLK_DOUT_AUD_BUS
  35996. CLK_DOUT_BUS_PLL
  35997. CLK_DOUT_CCLK_DREX0
  35998. CLK_DOUT_CLK2X_PHY0
  35999. CLK_DOUT_I2S_A
  36000. CLK_DOUT_MEM0_PLL
  36001. CLK_DOUT_MEM1_PLL
  36002. CLK_DOUT_MFC_PLL
  36003. CLK_DOUT_PCLK200_FSYS
  36004. CLK_DOUT_PCLK_CDREX
  36005. CLK_DOUT_PCLK_CORE_MEM
  36006. CLK_DOUT_PCLK_DREX0
  36007. CLK_DOUT_PCLK_DREX1
  36008. CLK_DOUT_PIXEL
  36009. CLK_DOUT_SCLK_CDREX
  36010. CLK_DP
  36011. CLK_DP1
  36012. CLK_DPHY0_GATE
  36013. CLK_DPHY1_GATE
  36014. CLK_DPLL
  36015. CLK_DPLL0
  36016. CLK_DPLL0_50M
  36017. CLK_DPLL0_GATE
  36018. CLK_DPLL1
  36019. CLK_DPLL1_50M
  36020. CLK_DPLL1_GATE
  36021. CLK_DRAM
  36022. CLK_DRAM_ACE
  36023. CLK_DRAM_AXI
  36024. CLK_DRAM_BE0
  36025. CLK_DRAM_BE1
  36026. CLK_DRAM_BE2
  36027. CLK_DRAM_CSI
  36028. CLK_DRAM_CSI0
  36029. CLK_DRAM_CSI1
  36030. CLK_DRAM_CSI_ISP
  36031. CLK_DRAM_DEINTERLACE
  36032. CLK_DRAM_DEU0
  36033. CLK_DRAM_DEU1
  36034. CLK_DRAM_DE_BE
  36035. CLK_DRAM_DE_BE0
  36036. CLK_DRAM_DE_BE1
  36037. CLK_DRAM_DE_FE
  36038. CLK_DRAM_DE_FE0
  36039. CLK_DRAM_DE_FE1
  36040. CLK_DRAM_DRC
  36041. CLK_DRAM_DRC0
  36042. CLK_DRAM_DRC1
  36043. CLK_DRAM_EHCI
  36044. CLK_DRAM_FE0
  36045. CLK_DRAM_FE1
  36046. CLK_DRAM_FE2
  36047. CLK_DRAM_IEP
  36048. CLK_DRAM_MP
  36049. CLK_DRAM_OHCI
  36050. CLK_DRAM_OUT
  36051. CLK_DRAM_TS
  36052. CLK_DRAM_TVD
  36053. CLK_DRAM_TVE
  36054. CLK_DRAM_TVE0
  36055. CLK_DRAM_TVE1
  36056. CLK_DRAM_VE
  36057. CLK_DRC
  36058. CLK_DSI
  36059. CLK_DSI0_EB
  36060. CLK_DSI1_EB
  36061. CLK_DSIM
  36062. CLK_DSIM0
  36063. CLK_DSIM1
  36064. CLK_DSI_DPHY
  36065. CLK_DSI_PLL
  36066. CLK_DSI_SCLK
  36067. CLK_DSS_LPC
  36068. CLK_DS_MODE
  36069. CLK_DUTY_CYCLE_PARENT
  36070. CLK_DVO
  36071. CLK_D_MTX_A_GATE
  36072. CLK_D_MTX_F_GATE
  36073. CLK_D_NOC_A_GATE
  36074. CLK_D_NOC_F_GATE
  36075. CLK_ECC
  36076. CLK_ECLK
  36077. CLK_EDP
  36078. CLK_EDP_LINK
  36079. CLK_EDP_PLL
  36080. CLK_EFUSE
  36081. CLK_EFUSE_EB
  36082. CLK_EIC_EB
  36083. CLK_EIC_RTCDV5_EB
  36084. CLK_EIC_RTC_EB
  36085. CLK_EMCE
  36086. CLK_EMMC_1X
  36087. CLK_EMMC_2X
  36088. CLK_EMMC_2X_EN
  36089. CLK_EMMC_EB
  36090. CLK_EN0
  36091. CLK_EN1
  36092. CLK_ENABLE
  36093. CLK_ENABLE_ON_INIT
  36094. CLK_ENABLE_REG_16BIT
  36095. CLK_ENABLE_REG_32BIT
  36096. CLK_ENABLE_REG_8BIT
  36097. CLK_ENABLE_REG_MASK
  36098. CLK_ENET
  36099. CLK_ENET_DIV
  36100. CLK_ENET_IN
  36101. CLK_ENET_MUX
  36102. CLK_ENTER_LP_AFTER_DATA
  36103. CLK_ERR_INTR
  36104. CLK_ETB
  36105. CLK_ETH1_PHY
  36106. CLK_ETHERNET
  36107. CLK_ETHERNET_PLL
  36108. CLK_ETHIF
  36109. CLK_ETHSYS_CRYPTO
  36110. CLK_ETHSYS_ESW
  36111. CLK_ETHSYS_GDMA
  36112. CLK_ETHSYS_GP1
  36113. CLK_ETHSYS_GP2
  36114. CLK_ETHSYS_HSDMA
  36115. CLK_ETHSYS_I2S
  36116. CLK_ETHSYS_NR
  36117. CLK_ETHSYS_PCM
  36118. CLK_ETH_ESW_EN
  36119. CLK_ETH_FE_EN
  36120. CLK_ETH_GP0_EN
  36121. CLK_ETH_GP1_EN
  36122. CLK_ETH_GP2_EN
  36123. CLK_ETH_HSDMA_EN
  36124. CLK_ETH_MAC
  36125. CLK_ETH_NR_CLK
  36126. CLK_ETH_PHY
  36127. CLK_ETH_PHYREF
  36128. CLK_ETH_REF_PHYCLK
  36129. CLK_ETM
  36130. CLK_EVENT_TIMER
  36131. CLK_EVENT_TIMER_DIV
  36132. CLK_EVENT_TIMER_INTERNAL_DIV
  36133. CLK_EVENT_TIMER_MUX
  36134. CLK_EXT
  36135. CLK_EXT2F_A9
  36136. CLK_EXTAL
  36137. CLK_EXTALR
  36138. CLK_EXTERNAL
  36139. CLK_EXT_DIFF
  36140. CLK_F469_DSI
  36141. CLK_F769_DSI
  36142. CLK_FAC_1K
  36143. CLK_FAC_1M
  36144. CLK_FAC_250K
  36145. CLK_FAC_2M
  36146. CLK_FAC_3K2
  36147. CLK_FAC_4M
  36148. CLK_FAC_RCO25M
  36149. CLK_FAC_RCO2M
  36150. CLK_FAC_RCO4M
  36151. CLK_FAC_RPLL0_26M
  36152. CLK_FAC_RPLL1_26M
  36153. CLK_FC_HADES
  36154. CLK_FC_HEVC
  36155. CLK_FD
  36156. CLK_FDMA
  36157. CLK_FE0
  36158. CLK_FE0_DIV
  36159. CLK_FE1
  36160. CLK_FE1_DIV
  36161. CLK_FE2
  36162. CLK_FE2_DIV
  36163. CLK_FFUART
  36164. CLK_FF_DOUT_SPLL2
  36165. CLK_FICP
  36166. CLK_FIMC0
  36167. CLK_FIMC1
  36168. CLK_FIMC2
  36169. CLK_FIMC3
  36170. CLK_FIMC_3AA
  36171. CLK_FIMC_LITE0
  36172. CLK_FIMC_LITE1
  36173. CLK_FIMC_LITE3
  36174. CLK_FIMD
  36175. CLK_FIMD0
  36176. CLK_FIMD1
  36177. CLK_FIN_PLL
  36178. CLK_FIXED
  36179. CLK_FIXED_FACTOR
  36180. CLK_FIXED_FACTOR_FW_NAME
  36181. CLK_FIXED_FACTOR_HW
  36182. CLK_FIXED_FACTOR_HWS
  36183. CLK_FLASH_PROMIP
  36184. CLK_FORCE_STOP
  36185. CLK_FOUT_APLL
  36186. CLK_FOUT_APOLLO_PLL
  36187. CLK_FOUT_ATLAS_PLL
  36188. CLK_FOUT_AUD_PLL
  36189. CLK_FOUT_BPLL
  36190. CLK_FOUT_BUS_PLL
  36191. CLK_FOUT_CPLL
  36192. CLK_FOUT_DISP_PLL
  36193. CLK_FOUT_DPLL
  36194. CLK_FOUT_EPLL
  36195. CLK_FOUT_G3D_PLL
  36196. CLK_FOUT_GPLL
  36197. CLK_FOUT_IPLL
  36198. CLK_FOUT_ISP_PLL
  36199. CLK_FOUT_KPLL
  36200. CLK_FOUT_MEM0_PLL
  36201. CLK_FOUT_MEM1_PLL
  36202. CLK_FOUT_MFC_PLL
  36203. CLK_FOUT_MPHY_PLL
  36204. CLK_FOUT_MPLL
  36205. CLK_FOUT_RPLL
  36206. CLK_FOUT_SPLL
  36207. CLK_FOUT_UPLL
  36208. CLK_FOUT_VPLL
  36209. CLK_FRAC
  36210. CLK_FRACDIV
  36211. CLK_FRACDIV_MASK
  36212. CLK_FRAC_DIVIDER_BIG_ENDIAN
  36213. CLK_FRAC_DIVIDER_ZERO_BASED
  36214. CLK_FRC1_REMOTE
  36215. CLK_FREQ_CTRL
  36216. CLK_FROM_AUTO
  36217. CLK_FROM_IPS
  36218. CLK_FROM_REF
  36219. CLK_FROM_SYS
  36220. CLK_G2D
  36221. CLK_G3D
  36222. CLK_G3DSYS_CORE
  36223. CLK_G3DSYS_NR
  36224. CLK_GAPPED_MODE
  36225. CLK_GATE
  36226. CLK_GATE_BIG_ENDIAN
  36227. CLK_GATE_BLOCK
  36228. CLK_GATE_CTL
  36229. CLK_GATE_DELAY_LOOP
  36230. CLK_GATE_HIWORD_MASK
  36231. CLK_GATE_IP0
  36232. CLK_GATE_IP1
  36233. CLK_GATE_IP2
  36234. CLK_GATE_IP3
  36235. CLK_GATE_IP4
  36236. CLK_GATE_IP5
  36237. CLK_GATE_MAIN0
  36238. CLK_GATE_MAIN1
  36239. CLK_GATE_MAIN2
  36240. CLK_GATE_ON
  36241. CLK_GATE_PERI0
  36242. CLK_GATE_PERI1
  36243. CLK_GATE_SCLK0
  36244. CLK_GATE_SCLK1
  36245. CLK_GATE_SCU_LPCG_HW_SEL
  36246. CLK_GATE_SCU_LPCG_MASK
  36247. CLK_GATE_SCU_LPCG_SW_SEL
  36248. CLK_GATE_SETTING_BITS
  36249. CLK_GATE_SET_TO_DISABLE
  36250. CLK_GATING_DMAR_EN
  36251. CLK_GATING_DMAW_EN
  36252. CLK_GATING_EN_ALL
  36253. CLK_GATING_HEC
  36254. CLK_GATING_HJE
  36255. CLK_GATING_HVC
  36256. CLK_GATING_RXMAC_EN
  36257. CLK_GATING_RXQ_EN
  36258. CLK_GATING_TXMAC_EN
  36259. CLK_GATING_TXQ_EN
  36260. CLK_GEAR
  36261. CLK_GET_ACCURACY_NOCACHE
  36262. CLK_GET_ATTR_RESP_WORDS
  36263. CLK_GET_NAME_RESP_LEN
  36264. CLK_GET_PARENTS_RESP_WORDS
  36265. CLK_GET_RATE_NOCACHE
  36266. CLK_GET_TOPOLOGY_RESP_WORDS
  36267. CLK_GFXCLK
  36268. CLK_GIC
  36269. CLK_GICISP
  36270. CLK_GMAC0_PHY
  36271. CLK_GPADC
  36272. CLK_GPG1_AXI_GATE
  36273. CLK_GPIO
  36274. CLK_GPIO_EB
  36275. CLK_GPIO_LEFT
  36276. CLK_GPIO_RIGHT
  36277. CLK_GPLL
  36278. CLK_GPLL_42M5
  36279. CLK_GPLL_GATE
  36280. CLK_GPS
  36281. CLK_GPU
  36282. CLK_GPU0_AVS_EB
  36283. CLK_GPU1_AVS_EB
  36284. CLK_GPU3D
  36285. CLK_GPU_AXI
  36286. CLK_GPU_CORE
  36287. CLK_GPU_EB
  36288. CLK_GPU_HYD
  36289. CLK_GPU_MEM
  36290. CLK_GPU_MEMORY
  36291. CLK_GPU_MTX_EB
  36292. CLK_GPU_NUM
  36293. CLK_GPU_SYS
  36294. CLK_GPU_TS_EB
  36295. CLK_GRAN
  36296. CLK_GRAN_LIMIT
  36297. CLK_GSCALER0
  36298. CLK_GSCALER1
  36299. CLK_GSCL0
  36300. CLK_GSCL1
  36301. CLK_GSCL2
  36302. CLK_GSCL3
  36303. CLK_GSCL_WA
  36304. CLK_GSCL_WB
  36305. CLK_GSP0_A_GATE
  36306. CLK_GSP0_EB
  36307. CLK_GSP0_F_GATE
  36308. CLK_GSP0_MMU_EB
  36309. CLK_GSP1_A_GATE
  36310. CLK_GSP1_EB
  36311. CLK_GSP1_F_GATE
  36312. CLK_GSP1_MMU_EB
  36313. CLK_GSPM0IDLE_GATE
  36314. CLK_GSP_EMC_EB
  36315. CLK_GSP_MTX_A_GATE
  36316. CLK_GSP_MTX_EB
  36317. CLK_GSP_MTX_F_GATE
  36318. CLK_GSP_NOC_A_GATE
  36319. CLK_GSP_NOC_F_GATE
  36320. CLK_GTBUS
  36321. CLK_H
  36322. CLK_HCLK_BUF
  36323. CLK_HCLK_CSSYS
  36324. CLK_HCLK_DMA
  36325. CLK_HCLK_HWA
  36326. CLK_HCLK_I2S
  36327. CLK_HCLK_RP
  36328. CLK_HCLK_UART
  36329. CLK_HDCP
  36330. CLK_HDDAC
  36331. CLK_HDE
  36332. CLK_HDMI
  36333. CLK_HDMI1
  36334. CLK_HDMI1_SLOW
  36335. CLK_HDMI_AUDIO
  36336. CLK_HDMI_CEC
  36337. CLK_HDMI_DDC
  36338. CLK_HDMI_DEV
  36339. CLK_HDMI_SLOW
  36340. CLK_HIFSEL
  36341. CLK_HIFSYS_NR
  36342. CLK_HIFSYS_PCIE0
  36343. CLK_HIFSYS_PCIE1
  36344. CLK_HIFSYS_PCIE2
  36345. CLK_HIFSYS_USB0PHY
  36346. CLK_HIFSYS_USB1PHY
  36347. CLK_HIGH
  36348. CLK_HISPD
  36349. CLK_HOSC
  36350. CLK_HP_CLK_DIV
  36351. CLK_HP_CLK_MUX
  36352. CLK_HSE_RTC
  36353. CLK_HSI
  36354. CLK_HSI2C0
  36355. CLK_HSI2C1
  36356. CLK_HSI2C2
  36357. CLK_HSI2C3
  36358. CLK_HSIO2
  36359. CLK_HSMMC0
  36360. CLK_HSMMC1
  36361. CLK_HSMMC2
  36362. CLK_HSMMC3
  36363. CLK_HS_CONTINUOUS
  36364. CLK_HS_EXIT
  36365. CLK_HS_MODE
  36366. CLK_HS_OR_LP
  36367. CLK_HS_POST
  36368. CLK_HS_PREP
  36369. CLK_HVA
  36370. CLK_HWIP
  36371. CLK_HWPE_HADES
  36372. CLK_HWPE_HEVC
  36373. CLK_HWUART
  36374. CLK_HW_DIV
  36375. CLK_HW_INIT
  36376. CLK_HW_INIT_FW_NAME
  36377. CLK_HW_INIT_HW
  36378. CLK_HW_INIT_HWS
  36379. CLK_HW_INIT_NO_PARENT
  36380. CLK_HW_INIT_PARENTS
  36381. CLK_HW_INIT_PARENTS_DATA
  36382. CLK_HW_INIT_PARENTS_HW
  36383. CLK_I2C
  36384. CLK_I2C0
  36385. CLK_I2C0_EB
  36386. CLK_I2C0_ISP
  36387. CLK_I2C1
  36388. CLK_I2C1_EB
  36389. CLK_I2C1_ISP
  36390. CLK_I2C2
  36391. CLK_I2C2_EB
  36392. CLK_I2C3
  36393. CLK_I2C3_EB
  36394. CLK_I2C4
  36395. CLK_I2C4_EB
  36396. CLK_I2C5
  36397. CLK_I2C5_EB
  36398. CLK_I2C6
  36399. CLK_I2C7
  36400. CLK_I2C_EB
  36401. CLK_I2C_HDMI
  36402. CLK_I2C_HDMI_PHY
  36403. CLK_I2D_IF_AXI_GATE
  36404. CLK_I2S
  36405. CLK_I2S0
  36406. CLK_I2S1
  36407. CLK_I2S1_BCLK_SW
  36408. CLK_I2S2
  36409. CLK_I2S2_BCLK_SW
  36410. CLK_I2S3
  36411. CLK_I2S3_BCLK_SW
  36412. CLK_I2S4_BCLK_SW
  36413. CLK_I2SQ_PDIV
  36414. CLK_I2SRX
  36415. CLK_I2STX
  36416. CLK_I2S_BASE
  36417. CLK_I2S_CDCLK
  36418. CLK_I2S_DIV
  36419. CLK_I2S_RCLK_PSR
  36420. CLK_I2S_RCLK_SRC
  36421. CLK_IA_IN_D2I_EN
  36422. CLK_IA_IN_I_EN
  36423. CLK_IBMRGB514
  36424. CLK_IB_IN_D2I_EN
  36425. CLK_IB_IN_I_EN
  36426. CLK_ICN_COMPO
  36427. CLK_ICN_CPU
  36428. CLK_ICN_GPU
  36429. CLK_ICN_IF_2
  36430. CLK_ICN_LMI
  36431. CLK_ICN_REG
  36432. CLK_ICN_REG_16
  36433. CLK_ICN_SBC
  36434. CLK_IC_BDISP_0
  36435. CLK_IC_BDISP_1
  36436. CLK_IC_IN_D2I_EN
  36437. CLK_IC_IN_I_EN
  36438. CLK_IC_LMI0
  36439. CLK_IC_LMI1
  36440. CLK_IDX_WB_A
  36441. CLK_IDX_WB_B
  36442. CLK_IEM_APC
  36443. CLK_IEM_IEC
  36444. CLK_IEP
  36445. CLK_IEP_DEU0
  36446. CLK_IEP_DEU1
  36447. CLK_IEP_DRC0
  36448. CLK_IEP_DRC1
  36449. CLK_IFR_ETH_25M_SEL
  36450. CLK_IFR_I2C0_SEL
  36451. CLK_IFR_I2C1_SEL
  36452. CLK_IFR_I2C2_SEL
  36453. CLK_IFR_MUX1_SEL
  36454. CLK_IFR_NR_CLK
  36455. CLK_IGNORE_UNUSED
  36456. CLK_IIS0
  36457. CLK_IIS0_EB
  36458. CLK_IIS1
  36459. CLK_IIS1_EB
  36460. CLK_IIS2
  36461. CLK_IIS2_EB
  36462. CLK_IIS3
  36463. CLK_IIS3_EB
  36464. CLK_IM
  36465. CLK_IMEM
  36466. CLK_IMG_CAM_CAM
  36467. CLK_IMG_CAM_SMI
  36468. CLK_IMG_CAM_SV
  36469. CLK_IMG_CAM_SV1_EN
  36470. CLK_IMG_CAM_SV2_EN
  36471. CLK_IMG_CAM_SV_EN
  36472. CLK_IMG_DIP
  36473. CLK_IMG_DPE
  36474. CLK_IMG_FD
  36475. CLK_IMG_FDVT
  36476. CLK_IMG_JPGDEC
  36477. CLK_IMG_JPGDEC_SMI
  36478. CLK_IMG_LARB2
  36479. CLK_IMG_LARB2_SMI
  36480. CLK_IMG_LARB5
  36481. CLK_IMG_LARB6
  36482. CLK_IMG_MFB
  36483. CLK_IMG_NR
  36484. CLK_IMG_NR_CLK
  36485. CLK_IMG_OWE
  36486. CLK_IMG_RESZ
  36487. CLK_IMG_RSC
  36488. CLK_IMG_SENINF_CAM_EN
  36489. CLK_IMG_SENINF_SCAM_EN
  36490. CLK_IMG_SEN_CAM
  36491. CLK_IMG_SEN_TG
  36492. CLK_IMG_SMI_COMM
  36493. CLK_IMG_SMI_LARB2
  36494. CLK_IMG_VENC
  36495. CLK_IMG_VENC_LT
  36496. CLK_IMG_WPE_A
  36497. CLK_IMG_WPE_B
  36498. CLK_IMX
  36499. CLK_IN
  36500. CLK_INC
  36501. CLK_INFRA_13M
  36502. CLK_INFRA_AES_BCLK
  36503. CLK_INFRA_AES_TOP0
  36504. CLK_INFRA_AES_TOP1
  36505. CLK_INFRA_AES_UFSFDE
  36506. CLK_INFRA_ANC_MD32
  36507. CLK_INFRA_ANC_MD32_32K
  36508. CLK_INFRA_AO_SPI0
  36509. CLK_INFRA_AO_SPI1
  36510. CLK_INFRA_AO_UART5
  36511. CLK_INFRA_APXGPT
  36512. CLK_INFRA_APXGPT_PD
  36513. CLK_INFRA_AP_C2K_CCIF_0
  36514. CLK_INFRA_AP_C2K_CCIF_1
  36515. CLK_INFRA_AP_DMA
  36516. CLK_INFRA_AP_MSDC0
  36517. CLK_INFRA_AUD
  36518. CLK_INFRA_AUDIO
  36519. CLK_INFRA_AUDIO_26M
  36520. CLK_INFRA_AUDIO_26M_BCLK
  36521. CLK_INFRA_AUDIO_26M_PAD_TOP
  36522. CLK_INFRA_AUDIO_PD
  36523. CLK_INFRA_AUD_26M_BCLK
  36524. CLK_INFRA_AUD_SPLIN_B
  36525. CLK_INFRA_AUXADC
  36526. CLK_INFRA_AUXADC_MD
  36527. CLK_INFRA_BTIF
  36528. CLK_INFRA_CA53SEL
  36529. CLK_INFRA_CA57SEL
  36530. CLK_INFRA_CA72SEL
  36531. CLK_INFRA_CCIF0_AP_CTRL
  36532. CLK_INFRA_CCIF1_AP
  36533. CLK_INFRA_CCIF1_AP_CTRL
  36534. CLK_INFRA_CCIF1_MD
  36535. CLK_INFRA_CCIF2_AP
  36536. CLK_INFRA_CCIF2_MD
  36537. CLK_INFRA_CCIF3_AP
  36538. CLK_INFRA_CCIF3_MD
  36539. CLK_INFRA_CCIF4_AP
  36540. CLK_INFRA_CCIF4_MD
  36541. CLK_INFRA_CCIF_AP
  36542. CLK_INFRA_CCIF_MD
  36543. CLK_INFRA_CEC
  36544. CLK_INFRA_CLDMA
  36545. CLK_INFRA_CLDMA_BCLK
  36546. CLK_INFRA_CLK_13M
  36547. CLK_INFRA_CONNMCU
  36548. CLK_INFRA_CPUM
  36549. CLK_INFRA_CPUSEL
  36550. CLK_INFRA_CQ_DMA
  36551. CLK_INFRA_CQ_DMA_FPC
  36552. CLK_INFRA_DBG
  36553. CLK_INFRA_DBGCLK
  36554. CLK_INFRA_DBGCLK_PD
  36555. CLK_INFRA_DDCCI
  36556. CLK_INFRA_DEBUGSYS
  36557. CLK_INFRA_DEVAPC
  36558. CLK_INFRA_DEVAPC_PD
  36559. CLK_INFRA_DEVICE_APC
  36560. CLK_INFRA_DEVMPU_BCLK
  36561. CLK_INFRA_DISP_PWM
  36562. CLK_INFRA_DPMAIF_CK
  36563. CLK_INFRA_DRAMC_B_CONF
  36564. CLK_INFRA_DRAMC_B_F26M
  36565. CLK_INFRA_DRAMC_CONF
  36566. CLK_INFRA_DRAMC_F26M
  36567. CLK_INFRA_DVFSRC
  36568. CLK_INFRA_DVFS_SPM1
  36569. CLK_INFRA_DXCC_AO
  36570. CLK_INFRA_DXCC_SEC_CORE
  36571. CLK_INFRA_EFUSE
  36572. CLK_INFRA_FADSP
  36573. CLK_INFRA_FBIST2FPC
  36574. CLK_INFRA_FHCTL
  36575. CLK_INFRA_GCE
  36576. CLK_INFRA_GCE_26M
  36577. CLK_INFRA_GCPU
  36578. CLK_INFRA_I2C0
  36579. CLK_INFRA_I2C1
  36580. CLK_INFRA_I2C1_ARBITER
  36581. CLK_INFRA_I2C1_IMM
  36582. CLK_INFRA_I2C2
  36583. CLK_INFRA_I2C2_ARB
  36584. CLK_INFRA_I2C2_ARBITER
  36585. CLK_INFRA_I2C2_IMM
  36586. CLK_INFRA_I2C3
  36587. CLK_INFRA_I2C3_ARB
  36588. CLK_INFRA_I2C3_IMM
  36589. CLK_INFRA_I2C4
  36590. CLK_INFRA_I2C5
  36591. CLK_INFRA_I2C5_ARBITER
  36592. CLK_INFRA_I2C5_IMM
  36593. CLK_INFRA_I2C6
  36594. CLK_INFRA_I2C7
  36595. CLK_INFRA_I2C8
  36596. CLK_INFRA_I2C_APPM
  36597. CLK_INFRA_I2C_GPUPM
  36598. CLK_INFRA_ICUSB
  36599. CLK_INFRA_IRRX
  36600. CLK_INFRA_IRRX_PD
  36601. CLK_INFRA_IRTX
  36602. CLK_INFRA_KP
  36603. CLK_INFRA_L2C_SRAM
  36604. CLK_INFRA_M4U
  36605. CLK_INFRA_MD2MD_CCIF_0
  36606. CLK_INFRA_MD2MD_CCIF_1
  36607. CLK_INFRA_MD2MD_CCIF_2
  36608. CLK_INFRA_MD2MD_CCIF_3
  36609. CLK_INFRA_MD2MD_CCIF_4
  36610. CLK_INFRA_MD2MD_CCIF_5
  36611. CLK_INFRA_MD32_BCLK
  36612. CLK_INFRA_MD_MSDC0
  36613. CLK_INFRA_MFGAXI
  36614. CLK_INFRA_MFG_BUS
  36615. CLK_INFRA_MFG_VCG
  36616. CLK_INFRA_MODEM_TEMP_SHARE
  36617. CLK_INFRA_MSDC0
  36618. CLK_INFRA_MSDC0_SCK
  36619. CLK_INFRA_MSDC0_SELF
  36620. CLK_INFRA_MSDC1
  36621. CLK_INFRA_MSDC1_SCK
  36622. CLK_INFRA_MSDC1_SELF
  36623. CLK_INFRA_MSDC2
  36624. CLK_INFRA_MSDC2_SCK
  36625. CLK_INFRA_MSDC2_SELF
  36626. CLK_INFRA_MUX1_SEL
  36627. CLK_INFRA_NR
  36628. CLK_INFRA_NR_CLK
  36629. CLK_INFRA_PMICSPI
  36630. CLK_INFRA_PMICWRAP
  36631. CLK_INFRA_PMIC_AP
  36632. CLK_INFRA_PMIC_CONN
  36633. CLK_INFRA_PMIC_MD
  36634. CLK_INFRA_PMIC_PD
  36635. CLK_INFRA_PMIC_TMR
  36636. CLK_INFRA_PMIC_WRAP
  36637. CLK_INFRA_PWM
  36638. CLK_INFRA_PWM1
  36639. CLK_INFRA_PWM2
  36640. CLK_INFRA_PWM3
  36641. CLK_INFRA_PWM4
  36642. CLK_INFRA_PWM_HCLK
  36643. CLK_INFRA_QAXI_CM4
  36644. CLK_INFRA_RAMBUFIF
  36645. CLK_INFRA_SCP
  36646. CLK_INFRA_SCPSYS
  36647. CLK_INFRA_SEJ
  36648. CLK_INFRA_SEJ_13M
  36649. CLK_INFRA_SEJ_F13M
  36650. CLK_INFRA_SEJ_PD
  36651. CLK_INFRA_SMI
  36652. CLK_INFRA_SPI
  36653. CLK_INFRA_SPI0
  36654. CLK_INFRA_SPI1
  36655. CLK_INFRA_SPI2
  36656. CLK_INFRA_SPI3
  36657. CLK_INFRA_SPI4
  36658. CLK_INFRA_SPI5
  36659. CLK_INFRA_SPI6
  36660. CLK_INFRA_SPI7
  36661. CLK_INFRA_SSPM
  36662. CLK_INFRA_SSPM_26M_SELF
  36663. CLK_INFRA_SSPM_32K_SELF
  36664. CLK_INFRA_SSPM_BUS_HCLK
  36665. CLK_INFRA_SSUSB_BUS
  36666. CLK_INFRA_SSUSB_REF
  36667. CLK_INFRA_SSUSB_SYS
  36668. CLK_INFRA_SSUSB_XHCI
  36669. CLK_INFRA_SYS_AUD
  36670. CLK_INFRA_SYS_AUDIO
  36671. CLK_INFRA_SYS_AUD_26M
  36672. CLK_INFRA_SYS_CIRQ
  36673. CLK_INFRA_THERM
  36674. CLK_INFRA_TRNG
  36675. CLK_INFRA_TRNG_PD
  36676. CLK_INFRA_UART0
  36677. CLK_INFRA_UART1
  36678. CLK_INFRA_UART2
  36679. CLK_INFRA_UART3
  36680. CLK_INFRA_UFS
  36681. CLK_INFRA_UFS_AXI
  36682. CLK_INFRA_UFS_MP_SAP_BCLK
  36683. CLK_INFRA_UFS_TICK
  36684. CLK_INFRA_UNIPRO_MBIST
  36685. CLK_INFRA_UNIPRO_SCK
  36686. CLK_INFRA_UNIPRO_TICK
  36687. CLK_INFRA_USB
  36688. CLK_INFRA_VAD_WRAP_SOC
  36689. CLK_INFRA_XIU
  36690. CLK_INIT_DIVISOR
  36691. CLK_INIT_GATED
  36692. CLK_INIT_GATED_DIVISOR
  36693. CLK_INT
  36694. CLK_INTERNAL
  36695. CLK_INTM
  36696. CLK_INT_DIFF
  36697. CLK_INT_DIV
  36698. CLK_INT_DIV_MASK
  36699. CLK_INT_SING
  36700. CLK_IPE_DPE
  36701. CLK_IPE_FD
  36702. CLK_IPE_FE
  36703. CLK_IPE_LARB7
  36704. CLK_IPE_LARB8
  36705. CLK_IPE_NR_CLK
  36706. CLK_IPE_RSC
  36707. CLK_IPE_SMI_SUBCOM
  36708. CLK_IPU_ADL_CABGEN
  36709. CLK_IPU_ADL_NR_CLK
  36710. CLK_IPU_CONN_AHB
  36711. CLK_IPU_CONN_APB2AHB
  36712. CLK_IPU_CONN_APB2AXI
  36713. CLK_IPU_CONN_AXI
  36714. CLK_IPU_CONN_CAB2TO1
  36715. CLK_IPU_CONN_CAB3TO1_SLICE
  36716. CLK_IPU_CONN_CAB3TO3
  36717. CLK_IPU_CONN_CAM_ADL
  36718. CLK_IPU_CONN_DAP_RX
  36719. CLK_IPU_CONN_IMG_ADL
  36720. CLK_IPU_CONN_IPU
  36721. CLK_IPU_CONN_IPU1_CAB1TO2
  36722. CLK_IPU_CONN_IPU2_CAB1TO2
  36723. CLK_IPU_CONN_IPU_CAB1TO2
  36724. CLK_IPU_CONN_ISP
  36725. CLK_IPU_CONN_NR_CLK
  36726. CLK_IPU_CORE0_AXI
  36727. CLK_IPU_CORE0_IPU
  36728. CLK_IPU_CORE0_JTAG
  36729. CLK_IPU_CORE0_NR_CLK
  36730. CLK_IPU_CORE1_AXI
  36731. CLK_IPU_CORE1_IPU
  36732. CLK_IPU_CORE1_JTAG
  36733. CLK_IPU_CORE1_NR_CLK
  36734. CLK_IR
  36735. CLK_IR0
  36736. CLK_IR1
  36737. CLK_IRC_SWITCH
  36738. CLK_IR_TX
  36739. CLK_ISC
  36740. CLK_ISP
  36741. CLK_ISP0_AXI_GATE
  36742. CLK_ISP0_EB
  36743. CLK_ISP1_AXI_GATE
  36744. CLK_ISP1_EB
  36745. CLK_ISP2DCAM_IF_EB
  36746. CLK_ISP2_AXI_GATE
  36747. CLK_ISP2_EB
  36748. CLK_ISP_ASYNCAXIM
  36749. CLK_ISP_DIV_ISP0
  36750. CLK_ISP_DIV_ISP1
  36751. CLK_ISP_DIV_MCUISP0
  36752. CLK_ISP_DIV_MCUISP1
  36753. CLK_ISP_FIMC_DRC
  36754. CLK_ISP_FIMC_FD
  36755. CLK_ISP_FIMC_ISP
  36756. CLK_ISP_FIMC_LITE0
  36757. CLK_ISP_FIMC_LITE1
  36758. CLK_ISP_GICISP
  36759. CLK_ISP_I2C0_ISP
  36760. CLK_ISP_I2C1_ISP
  36761. CLK_ISP_ICLK_EB
  36762. CLK_ISP_ISP2DCAM_EB
  36763. CLK_ISP_LCLK_EB
  36764. CLK_ISP_MCLK_EB
  36765. CLK_ISP_MCUCTL_ISP
  36766. CLK_ISP_MCUISP
  36767. CLK_ISP_MPWM_ISP
  36768. CLK_ISP_MTCADC_ISP
  36769. CLK_ISP_PCLK_EB
  36770. CLK_ISP_PPMUISPMX
  36771. CLK_ISP_PPMUISPX
  36772. CLK_ISP_PWM_ISP
  36773. CLK_ISP_SMMU_DRC
  36774. CLK_ISP_SMMU_FD
  36775. CLK_ISP_SMMU_ISP
  36776. CLK_ISP_SMMU_ISPCX
  36777. CLK_ISP_SMMU_LITE0
  36778. CLK_ISP_SMMU_LITE1
  36779. CLK_ISP_SPI0_ISP
  36780. CLK_ISP_SPI1_ISP
  36781. CLK_ISP_UART_ISP
  36782. CLK_ISP_WDT_ISP
  36783. CLK_IS_CRITICAL
  36784. CLK_IS_OFF
  36785. CLK_JPEG
  36786. CLK_JPEG2
  36787. CLK_JPEGDEC
  36788. CLK_JPG0_AXI_GATE
  36789. CLK_JPG0_EB
  36790. CLK_JPG1_EB
  36791. CLK_JPGDEC
  36792. CLK_JPGDEC_JPGDEC
  36793. CLK_JPGDEC_JPGDEC1
  36794. CLK_JPGDEC_NR_CLK
  36795. CLK_JTAG
  36796. CLK_KEYIF
  36797. CLK_KEYPAD
  36798. CLK_KFC_CLK
  36799. CLK_KPB_RTC_EB
  36800. CLK_KPD_EB
  36801. CLK_L0_38M
  36802. CLK_L0_409M6
  36803. CLK_L0_614M4
  36804. CLK_L1_38M
  36805. CLK_LANE_EN
  36806. CLK_LANE_RDY
  36807. CLK_LANE_STATE
  36808. CLK_LANE_STATE_HS
  36809. CLK_LANE_SWT_REG
  36810. CLK_LANE_ULPM_REQ
  36811. CLK_LANE_ULPOUT_TIME
  36812. CLK_LCD
  36813. CLK_LCD0
  36814. CLK_LCD0_CH0
  36815. CLK_LCD0_CH1
  36816. CLK_LCD1
  36817. CLK_LCD1_CH0
  36818. CLK_LCD1_CH1
  36819. CLK_LCD_CH0
  36820. CLK_LCD_CH1
  36821. CLK_LCLK
  36822. CLK_LINE
  36823. CLK_LINE_RX
  36824. CLK_LINE_TX
  36825. CLK_LITE0
  36826. CLK_LITE1
  36827. CLK_LIT_MCU
  36828. CLK_LOSC
  36829. CLK_LOW
  36830. CLK_LOW_FREQ
  36831. CLK_LPC32XX
  36832. CLK_LPC32XX_PLL
  36833. CLK_LPC32XX_USB
  36834. CLK_LPC_0
  36835. CLK_LPC_1
  36836. CLK_LPTIMER
  36837. CLK_LSE
  36838. CLK_LSI
  36839. CLK_LTEPLL0
  36840. CLK_LTEPLL0_GATE
  36841. CLK_LTEPLL1
  36842. CLK_LTEPLL1_GATE
  36843. CLK_LVDS_PLL_DIV_EN
  36844. CLK_LVDS_RD
  36845. CLK_LVDS_TCXO_EB
  36846. CLK_LVDS_TRX_EB
  36847. CLK_LVDS_WR
  36848. CLK_M0_39M
  36849. CLK_M1_63M
  36850. CLK_M2MSCALER
  36851. CLK_MAIN
  36852. CLK_MAIN_DISP
  36853. CLK_MAP
  36854. CLK_MASK_DIV_ON_DISABLE
  36855. CLK_MASK_SH_LIST_NV10
  36856. CLK_MASK_SH_LIST_RV1
  36857. CLK_MAU_EPLL
  36858. CLK_MAX
  36859. CLK_MAX_DIV
  36860. CLK_MAX_MEMMAPS
  36861. CLK_MAX_NUM
  36862. CLK_MAX_RATE
  36863. CLK_MBOX_EB
  36864. CLK_MBUS
  36865. CLK_MBUS0
  36866. CLK_MBUS1
  36867. CLK_MBUS_CE
  36868. CLK_MBUS_CSI
  36869. CLK_MBUS_DEINTERLACE
  36870. CLK_MBUS_DMA
  36871. CLK_MBUS_NAND
  36872. CLK_MBUS_TS
  36873. CLK_MBUS_VE
  36874. CLK_MC
  36875. CLK_MCHI
  36876. CLK_MCT
  36877. CLK_MCUCTL_ISP
  36878. CLK_MCUISP
  36879. CLK_MCU_BUS_SEL
  36880. CLK_MCU_MP0_SEL
  36881. CLK_MCU_MP2_SEL
  36882. CLK_MCU_NR_CLK
  36883. CLK_MDAR_EB
  36884. CLK_MDFS
  36885. CLK_MDMA
  36886. CLK_MDMA0
  36887. CLK_MDMA1
  36888. CLK_MDNIE0
  36889. CLK_MEMC
  36890. CLK_MEMSTK
  36891. CLK_MERGE
  36892. CLK_MESON_MPLL_ROUND_CLOSEST
  36893. CLK_MESON_MPLL_SPREAD_SPECTRUM
  36894. CLK_MESON_PLL_ROUND_CLOSEST
  36895. CLK_MFC
  36896. CLK_MFG
  36897. CLK_MFGCFG_BG3D
  36898. CLK_MFGCFG_NR_CLK
  36899. CLK_MFG_BG3D
  36900. CLK_MFG_NR_CLK
  36901. CLK_MGR_FREE_MASK
  36902. CLK_MGR_FREE_SHIFT
  36903. CLK_MGR_PLL_CLK_SRC_MASK
  36904. CLK_MGR_PLL_CLK_SRC_SHIFT
  36905. CLK_MGT_ENTRY
  36906. CLK_MIE0
  36907. CLK_MIE1
  36908. CLK_MINI_IM
  36909. CLK_MINI_LCD
  36910. CLK_MIN_DIV
  36911. CLK_MIN_RATE
  36912. CLK_MIPI_CSI
  36913. CLK_MIPI_CSI0_EB
  36914. CLK_MIPI_CSI0_GATE
  36915. CLK_MIPI_CSI1
  36916. CLK_MIPI_CSI1_EB
  36917. CLK_MIPI_CSI_DPHY
  36918. CLK_MIPI_DSI
  36919. CLK_MIPI_DSI0
  36920. CLK_MIPI_DSI1
  36921. CLK_MIPI_DSI_DPHY
  36922. CLK_MIPI_HSI
  36923. CLK_MIPI_INDEX
  36924. CLK_MIPS
  36925. CLK_MIPS_DIV
  36926. CLK_MIPS_INTERNAL_DIV
  36927. CLK_MIPS_PLL
  36928. CLK_MIPS_PLL_MUX
  36929. CLK_MIXER
  36930. CLK_MIXER0
  36931. CLK_MIXER0_DIV
  36932. CLK_MIXER1
  36933. CLK_MIXER1_DIV
  36934. CLK_MM
  36935. CLK_MMC
  36936. CLK_MMC0
  36937. CLK_MMC0_OUTPUT
  36938. CLK_MMC0_SAMPLE
  36939. CLK_MMC1
  36940. CLK_MMC1_OUTPUT
  36941. CLK_MMC1_SAMPLE
  36942. CLK_MMC2
  36943. CLK_MMC2_OUTPUT
  36944. CLK_MMC2_SAMPLE
  36945. CLK_MMC3
  36946. CLK_MMC3_OUTPUT
  36947. CLK_MMC3_SAMPLE
  36948. CLK_MMC_0
  36949. CLK_MMC_1
  36950. CLK_MMU_PF_EB
  36951. CLK_MM_26M
  36952. CLK_MM_CAM_MDP
  36953. CLK_MM_CMDQ
  36954. CLK_MM_DBI_IF
  36955. CLK_MM_DBI_IF_CK
  36956. CLK_MM_DBI_MM
  36957. CLK_MM_DBI_MM_CK
  36958. CLK_MM_DISP_AAL
  36959. CLK_MM_DISP_AAL0
  36960. CLK_MM_DISP_AAL1
  36961. CLK_MM_DISP_BLS
  36962. CLK_MM_DISP_CCORR
  36963. CLK_MM_DISP_CCORR0
  36964. CLK_MM_DISP_COLOR
  36965. CLK_MM_DISP_COLOR0
  36966. CLK_MM_DISP_COLOR1
  36967. CLK_MM_DISP_COLOR2
  36968. CLK_MM_DISP_DITHER
  36969. CLK_MM_DISP_DITHER0
  36970. CLK_MM_DISP_DSC
  36971. CLK_MM_DISP_GAMMA
  36972. CLK_MM_DISP_GAMMA0
  36973. CLK_MM_DISP_HRT_BW
  36974. CLK_MM_DISP_MERGE
  36975. CLK_MM_DISP_OD
  36976. CLK_MM_DISP_OD1
  36977. CLK_MM_DISP_OVL
  36978. CLK_MM_DISP_OVL0
  36979. CLK_MM_DISP_OVL0_2L
  36980. CLK_MM_DISP_OVL0_MOUT_CLOCK
  36981. CLK_MM_DISP_OVL1
  36982. CLK_MM_DISP_OVL1_2L
  36983. CLK_MM_DISP_OVL2
  36984. CLK_MM_DISP_OVL_FBDC
  36985. CLK_MM_DISP_POSTMASK0
  36986. CLK_MM_DISP_PWM026M
  36987. CLK_MM_DISP_PWM0MM
  36988. CLK_MM_DISP_PWM0_26M
  36989. CLK_MM_DISP_PWM0_MM
  36990. CLK_MM_DISP_PWM126M
  36991. CLK_MM_DISP_PWM1MM
  36992. CLK_MM_DISP_PWM1_26M
  36993. CLK_MM_DISP_PWM1_MM
  36994. CLK_MM_DISP_RDMA
  36995. CLK_MM_DISP_RDMA0
  36996. CLK_MM_DISP_RDMA1
  36997. CLK_MM_DISP_RDMA2
  36998. CLK_MM_DISP_RSZ
  36999. CLK_MM_DISP_SPLIT
  37000. CLK_MM_DISP_SPLIT0
  37001. CLK_MM_DISP_SPLIT1
  37002. CLK_MM_DISP_UFOE
  37003. CLK_MM_DISP_WDMA
  37004. CLK_MM_DISP_WDMA0
  37005. CLK_MM_DISP_WDMA1
  37006. CLK_MM_DISP_WDMA2
  37007. CLK_MM_DPI1_DIGL
  37008. CLK_MM_DPI1_ENGINE
  37009. CLK_MM_DPI1_PIXEL
  37010. CLK_MM_DPI_DIGL
  37011. CLK_MM_DPI_ENGINE
  37012. CLK_MM_DPI_IF
  37013. CLK_MM_DPI_IF_CK
  37014. CLK_MM_DPI_INTERFACE_CLOCK
  37015. CLK_MM_DPI_MM
  37016. CLK_MM_DPI_MM_CK
  37017. CLK_MM_DPI_MM_CLOCK
  37018. CLK_MM_DPI_PIXEL
  37019. CLK_MM_DSI0_DIGITAL
  37020. CLK_MM_DSI0_ENGINE
  37021. CLK_MM_DSI0_IF
  37022. CLK_MM_DSI0_IF_CK
  37023. CLK_MM_DSI0_INTERFACE_CLOCK
  37024. CLK_MM_DSI0_MM
  37025. CLK_MM_DSI0_MM_CK
  37026. CLK_MM_DSI0_MM_CLOCK
  37027. CLK_MM_DSI1_DIGITAL
  37028. CLK_MM_DSI1_ENGINE
  37029. CLK_MM_DSI1_INTERFACE_CLOCK
  37030. CLK_MM_DSI1_MM_CLOCK
  37031. CLK_MM_DSI2
  37032. CLK_MM_DSI2_DIGITAL
  37033. CLK_MM_DSI3
  37034. CLK_MM_DSI3_DIGITAL
  37035. CLK_MM_DSI_DIG
  37036. CLK_MM_DSI_ENGINE
  37037. CLK_MM_FAKE_ENG
  37038. CLK_MM_FAKE_ENG2
  37039. CLK_MM_GALS_CAM2MM
  37040. CLK_MM_GALS_CCU2MM
  37041. CLK_MM_GALS_COMM0
  37042. CLK_MM_GALS_COMM1
  37043. CLK_MM_GALS_IMG2MM
  37044. CLK_MM_GALS_IPU12MM
  37045. CLK_MM_GALS_IPU2MM
  37046. CLK_MM_HDMI_AUDIO
  37047. CLK_MM_HDMI_HDCP
  37048. CLK_MM_HDMI_HDCP24M
  37049. CLK_MM_HDMI_PIXEL
  37050. CLK_MM_HDMI_PLL
  37051. CLK_MM_HDMI_PLLCK
  37052. CLK_MM_HDMI_SPDIF
  37053. CLK_MM_IPU_DL_RX
  37054. CLK_MM_IPU_DL_RX_CK
  37055. CLK_MM_IPU_DL_TXCK
  37056. CLK_MM_LARB4_AXI_ASIF_MJC_CLOCK
  37057. CLK_MM_LARB4_AXI_ASIF_MM_CLOCK
  37058. CLK_MM_LVDS1_CTS
  37059. CLK_MM_LVDS1_PIXEL
  37060. CLK_MM_LVDS_CTS
  37061. CLK_MM_LVDS_PIXEL
  37062. CLK_MM_MDP_AAL
  37063. CLK_MM_MDP_BLS_26M
  37064. CLK_MM_MDP_CCORR
  37065. CLK_MM_MDP_COLOR
  37066. CLK_MM_MDP_CROP
  37067. CLK_MM_MDP_DL_RX
  37068. CLK_MM_MDP_DL_RX_CK
  37069. CLK_MM_MDP_DL_TXCK
  37070. CLK_MM_MDP_HDR
  37071. CLK_MM_MDP_RDMA
  37072. CLK_MM_MDP_RDMA0
  37073. CLK_MM_MDP_RDMA1
  37074. CLK_MM_MDP_RDMA2
  37075. CLK_MM_MDP_RDMA3
  37076. CLK_MM_MDP_RSZ0
  37077. CLK_MM_MDP_RSZ1
  37078. CLK_MM_MDP_RSZ2
  37079. CLK_MM_MDP_TDSHP
  37080. CLK_MM_MDP_TDSHP0
  37081. CLK_MM_MDP_TDSHP1
  37082. CLK_MM_MDP_TDSHP2
  37083. CLK_MM_MDP_WDMA
  37084. CLK_MM_MDP_WDMA0
  37085. CLK_MM_MDP_WROT
  37086. CLK_MM_MDP_WROT0
  37087. CLK_MM_MDP_WROT1
  37088. CLK_MM_MDP_WROT2
  37089. CLK_MM_MMSYS_R2Y
  37090. CLK_MM_MM_R2Y
  37091. CLK_MM_MUTEX
  37092. CLK_MM_MUTEX_32K
  37093. CLK_MM_NR
  37094. CLK_MM_NR_CLK
  37095. CLK_MM_SMI_COMMON
  37096. CLK_MM_SMI_COMMON1
  37097. CLK_MM_SMI_LARB0
  37098. CLK_MM_SMI_LARB1
  37099. CLK_MM_SMI_LARB4
  37100. CLK_MM_SMI_LARB5
  37101. CLK_MM_SMI_LARB7
  37102. CLK_MM_TVE_FMM
  37103. CLK_MM_TVE_INPUT
  37104. CLK_MM_TVE_OUTPUT
  37105. CLK_MODEMIF
  37106. CLK_MODE_12M_XTAL
  37107. CLK_MODE_24M_OSC
  37108. CLK_MODE_48M_OSC
  37109. CLK_MODE_MASK
  37110. CLK_MODE_NON_XTAL
  37111. CLK_MONOCNT
  37112. CLK_MOUT_ACLK200_DISP1_SUB
  37113. CLK_MOUT_ACLK300_DISP1_SUB
  37114. CLK_MOUT_ACLK_100
  37115. CLK_MOUT_ACLK_160
  37116. CLK_MOUT_ACLK_200
  37117. CLK_MOUT_ACLK_266
  37118. CLK_MOUT_ACLK_266_0
  37119. CLK_MOUT_ACLK_266_1
  37120. CLK_MOUT_ACLK_266_SUB
  37121. CLK_MOUT_ACLK_3AA0_A
  37122. CLK_MOUT_ACLK_3AA0_B
  37123. CLK_MOUT_ACLK_3AA1_A
  37124. CLK_MOUT_ACLK_3AA1_B
  37125. CLK_MOUT_ACLK_400_MCUISP
  37126. CLK_MOUT_ACLK_400_MCUISP_SUB
  37127. CLK_MOUT_ACLK_BUS0_400
  37128. CLK_MOUT_ACLK_BUS2_400_USER
  37129. CLK_MOUT_ACLK_CAM0_333_USER
  37130. CLK_MOUT_ACLK_CAM0_400
  37131. CLK_MOUT_ACLK_CAM0_400_USER
  37132. CLK_MOUT_ACLK_CAM0_552_USER
  37133. CLK_MOUT_ACLK_CAM1_333
  37134. CLK_MOUT_ACLK_CAM1_333_USER
  37135. CLK_MOUT_ACLK_CAM1_400_USER
  37136. CLK_MOUT_ACLK_CAM1_552_A
  37137. CLK_MOUT_ACLK_CAM1_552_B
  37138. CLK_MOUT_ACLK_CAM1_552_USER
  37139. CLK_MOUT_ACLK_CSIS0_A
  37140. CLK_MOUT_ACLK_CSIS0_B
  37141. CLK_MOUT_ACLK_CSIS1_A
  37142. CLK_MOUT_ACLK_CSIS1_B
  37143. CLK_MOUT_ACLK_CSIS2_A
  37144. CLK_MOUT_ACLK_CSIS2_B
  37145. CLK_MOUT_ACLK_DISP_333_A
  37146. CLK_MOUT_ACLK_DISP_333_B
  37147. CLK_MOUT_ACLK_DISP_333_USER
  37148. CLK_MOUT_ACLK_FD_A
  37149. CLK_MOUT_ACLK_FD_B
  37150. CLK_MOUT_ACLK_FSYS_200_USER
  37151. CLK_MOUT_ACLK_G2D_400_A
  37152. CLK_MOUT_ACLK_G2D_400_B
  37153. CLK_MOUT_ACLK_G3D_400
  37154. CLK_MOUT_ACLK_GSCL_111_USER
  37155. CLK_MOUT_ACLK_GSCL_333
  37156. CLK_MOUT_ACLK_GSCL_333_USER
  37157. CLK_MOUT_ACLK_HEVC_400
  37158. CLK_MOUT_ACLK_HEVC_400_USER
  37159. CLK_MOUT_ACLK_ISP_400
  37160. CLK_MOUT_ACLK_ISP_400_USER
  37161. CLK_MOUT_ACLK_ISP_DIS_400
  37162. CLK_MOUT_ACLK_ISP_DIS_400_USER
  37163. CLK_MOUT_ACLK_LITE_A_A
  37164. CLK_MOUT_ACLK_LITE_A_B
  37165. CLK_MOUT_ACLK_LITE_B_A
  37166. CLK_MOUT_ACLK_LITE_B_B
  37167. CLK_MOUT_ACLK_LITE_C_A
  37168. CLK_MOUT_ACLK_LITE_C_B
  37169. CLK_MOUT_ACLK_LITE_D_A
  37170. CLK_MOUT_ACLK_LITE_D_B
  37171. CLK_MOUT_ACLK_MFC_400_A
  37172. CLK_MOUT_ACLK_MFC_400_B
  37173. CLK_MOUT_ACLK_MFC_400_C
  37174. CLK_MOUT_ACLK_MFC_400_USER
  37175. CLK_MOUT_ACLK_MIFNM_200
  37176. CLK_MOUT_ACLK_MIFNM_400
  37177. CLK_MOUT_ACLK_MSCL_400_A
  37178. CLK_MOUT_ACLK_MSCL_400_B
  37179. CLK_MOUT_ACLK_MSCL_400_USER
  37180. CLK_MOUT_APLL
  37181. CLK_MOUT_APOLLO
  37182. CLK_MOUT_APOLLO_PLL
  37183. CLK_MOUT_ATLAS
  37184. CLK_MOUT_ATLAS_PLL
  37185. CLK_MOUT_AUDIO
  37186. CLK_MOUT_AUDSS
  37187. CLK_MOUT_AUD_PLL
  37188. CLK_MOUT_AUD_PLL_USER
  37189. CLK_MOUT_AUD_PLL_USER_T
  37190. CLK_MOUT_BPLL
  37191. CLK_MOUT_BUS_PLL
  37192. CLK_MOUT_BUS_PLL_APOLLO_USER
  37193. CLK_MOUT_BUS_PLL_ATLAS_USER
  37194. CLK_MOUT_BUS_PLL_DIV2
  37195. CLK_MOUT_BUS_PLL_USER
  37196. CLK_MOUT_CAM0
  37197. CLK_MOUT_CAM1
  37198. CLK_MOUT_CAM_BLK
  37199. CLK_MOUT_CLK2X_PHY_A
  37200. CLK_MOUT_CLK2X_PHY_B
  37201. CLK_MOUT_CLK2X_PHY_C
  37202. CLK_MOUT_CLKM_PHY_A
  37203. CLK_MOUT_CLKM_PHY_B
  37204. CLK_MOUT_CLKM_PHY_C
  37205. CLK_MOUT_CORE
  37206. CLK_MOUT_CSIS0
  37207. CLK_MOUT_CSIS1
  37208. CLK_MOUT_DISP_PLL
  37209. CLK_MOUT_DMC_BUS
  37210. CLK_MOUT_DPHY
  37211. CLK_MOUT_EBI
  37212. CLK_MOUT_EBI_1
  37213. CLK_MOUT_EPLL
  37214. CLK_MOUT_EPLL_USER
  37215. CLK_MOUT_FIMC0
  37216. CLK_MOUT_FIMC1
  37217. CLK_MOUT_FIMC2
  37218. CLK_MOUT_FIMC3
  37219. CLK_MOUT_FIMD0
  37220. CLK_MOUT_G3D
  37221. CLK_MOUT_G3D0
  37222. CLK_MOUT_G3D1
  37223. CLK_MOUT_G3D_0
  37224. CLK_MOUT_G3D_1
  37225. CLK_MOUT_G3D_PLL
  37226. CLK_MOUT_GDL
  37227. CLK_MOUT_GDR
  37228. CLK_MOUT_GPLL
  37229. CLK_MOUT_HDMI
  37230. CLK_MOUT_HPM
  37231. CLK_MOUT_I2S_A
  37232. CLK_MOUT_ISP_PLL
  37233. CLK_MOUT_MAUDIO0
  37234. CLK_MOUT_MAU_EPLL
  37235. CLK_MOUT_MCLK_CDREX
  37236. CLK_MOUT_MEM0_PLL
  37237. CLK_MOUT_MEM0_PLL_DIV2
  37238. CLK_MOUT_MEM1_PLL
  37239. CLK_MOUT_MEM1_PLL_DIV2
  37240. CLK_MOUT_MFC
  37241. CLK_MOUT_MFC_0
  37242. CLK_MOUT_MFC_1
  37243. CLK_MOUT_MFC_PLL
  37244. CLK_MOUT_MFC_PLL_DIV2
  37245. CLK_MOUT_MFC_PLL_USER
  37246. CLK_MOUT_MIPI0
  37247. CLK_MOUT_MIXER
  37248. CLK_MOUT_MMC0
  37249. CLK_MOUT_MMC1
  37250. CLK_MOUT_MMC2
  37251. CLK_MOUT_MPHY_PLL
  37252. CLK_MOUT_MPHY_PLL_USER
  37253. CLK_MOUT_MPLL
  37254. CLK_MOUT_MPLL_MIF
  37255. CLK_MOUT_MPLL_USER_C
  37256. CLK_MOUT_MPLL_USER_L
  37257. CLK_MOUT_MPLL_USER_R
  37258. CLK_MOUT_MPLL_USER_T
  37259. CLK_MOUT_MX_MSPLL_CCORE
  37260. CLK_MOUT_MX_MSPLL_CCORE_PHY
  37261. CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER
  37262. CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER
  37263. CLK_MOUT_PHYCLK_LLI_MPHY_TO_UFS_USER
  37264. CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER
  37265. CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER
  37266. CLK_MOUT_PHYCLK_MIPIDPHY1_BITCLKDIV8_USER
  37267. CLK_MOUT_PHYCLK_MIPIDPHY1_RXCLKESC0_USER
  37268. CLK_MOUT_PHYCLK_RXBYTECLKHS0_S2A_USER
  37269. CLK_MOUT_PHYCLK_RXBYTECLKHS0_S2B_USER
  37270. CLK_MOUT_PHYCLK_RXBYTECLKHS0_S4_USER
  37271. CLK_MOUT_PHYCLK_UFS_RX0_SYMBOL_USER
  37272. CLK_MOUT_PHYCLK_UFS_RX1_SYMBOL_USER
  37273. CLK_MOUT_PHYCLK_UFS_TX0_SYMBOL_USER
  37274. CLK_MOUT_PHYCLK_UFS_TX1_SYMBOL_USER
  37275. CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER
  37276. CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER
  37277. CLK_MOUT_PHYCLK_USBHOST20_PHY_CLK48MOHCI_USER
  37278. CLK_MOUT_PHYCLK_USBHOST20_PHY_HSIC1_USER
  37279. CLK_MOUT_PHYCLK_USBHOST20_PHY_PHYCLOCK_USER
  37280. CLK_MOUT_PHYCLK_USBHOST20_PHY_PHY_FREECLK_USER
  37281. CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER
  37282. CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER
  37283. CLK_MOUT_SCLK_AUDIO0
  37284. CLK_MOUT_SCLK_AUDIO1
  37285. CLK_MOUT_SCLK_AUD_I2S
  37286. CLK_MOUT_SCLK_AUD_PCM
  37287. CLK_MOUT_SCLK_DECON_ECLK
  37288. CLK_MOUT_SCLK_DECON_ECLK_A
  37289. CLK_MOUT_SCLK_DECON_ECLK_B
  37290. CLK_MOUT_SCLK_DECON_ECLK_C
  37291. CLK_MOUT_SCLK_DECON_ECLK_USER
  37292. CLK_MOUT_SCLK_DECON_TV_ECLK
  37293. CLK_MOUT_SCLK_DECON_TV_ECLK_A
  37294. CLK_MOUT_SCLK_DECON_TV_ECLK_B
  37295. CLK_MOUT_SCLK_DECON_TV_ECLK_C
  37296. CLK_MOUT_SCLK_DECON_TV_ECLK_USER
  37297. CLK_MOUT_SCLK_DECON_TV_VCLK_A
  37298. CLK_MOUT_SCLK_DECON_TV_VCLK_A_DISP
  37299. CLK_MOUT_SCLK_DECON_TV_VCLK_B
  37300. CLK_MOUT_SCLK_DECON_TV_VCLK_B_DISP
  37301. CLK_MOUT_SCLK_DECON_TV_VCLK_C
  37302. CLK_MOUT_SCLK_DECON_TV_VCLK_C_DISP
  37303. CLK_MOUT_SCLK_DECON_TV_VCLK_USER
  37304. CLK_MOUT_SCLK_DECON_VCLK
  37305. CLK_MOUT_SCLK_DECON_VCLK_A
  37306. CLK_MOUT_SCLK_DECON_VCLK_B
  37307. CLK_MOUT_SCLK_DECON_VCLK_C
  37308. CLK_MOUT_SCLK_DECON_VCLK_USER
  37309. CLK_MOUT_SCLK_DSD_A
  37310. CLK_MOUT_SCLK_DSD_B
  37311. CLK_MOUT_SCLK_DSD_C
  37312. CLK_MOUT_SCLK_DSD_USER
  37313. CLK_MOUT_SCLK_DSIM0
  37314. CLK_MOUT_SCLK_DSIM0_A
  37315. CLK_MOUT_SCLK_DSIM0_B
  37316. CLK_MOUT_SCLK_DSIM0_C
  37317. CLK_MOUT_SCLK_DSIM0_USER
  37318. CLK_MOUT_SCLK_DSIM1_A
  37319. CLK_MOUT_SCLK_DSIM1_A_DISP
  37320. CLK_MOUT_SCLK_DSIM1_B
  37321. CLK_MOUT_SCLK_DSIM1_B_DISP
  37322. CLK_MOUT_SCLK_DSIM1_C
  37323. CLK_MOUT_SCLK_DSIM1_USER
  37324. CLK_MOUT_SCLK_HDMI_SPDIF
  37325. CLK_MOUT_SCLK_ISP_SENSOR0
  37326. CLK_MOUT_SCLK_ISP_SENSOR1
  37327. CLK_MOUT_SCLK_ISP_SENSOR2
  37328. CLK_MOUT_SCLK_ISP_SPI0
  37329. CLK_MOUT_SCLK_ISP_SPI0_USER
  37330. CLK_MOUT_SCLK_ISP_SPI1
  37331. CLK_MOUT_SCLK_ISP_SPI1_USER
  37332. CLK_MOUT_SCLK_ISP_UART
  37333. CLK_MOUT_SCLK_ISP_UART_USER
  37334. CLK_MOUT_SCLK_JPEG
  37335. CLK_MOUT_SCLK_JPEG_A
  37336. CLK_MOUT_SCLK_JPEG_B
  37337. CLK_MOUT_SCLK_JPEG_C
  37338. CLK_MOUT_SCLK_JPEG_USER
  37339. CLK_MOUT_SCLK_LITE_FREECNT_A
  37340. CLK_MOUT_SCLK_LITE_FREECNT_B
  37341. CLK_MOUT_SCLK_LITE_FREECNT_C
  37342. CLK_MOUT_SCLK_MMC0_A
  37343. CLK_MOUT_SCLK_MMC0_B
  37344. CLK_MOUT_SCLK_MMC0_C
  37345. CLK_MOUT_SCLK_MMC0_D
  37346. CLK_MOUT_SCLK_MMC0_USER
  37347. CLK_MOUT_SCLK_MMC1_A
  37348. CLK_MOUT_SCLK_MMC1_B
  37349. CLK_MOUT_SCLK_MMC1_USER
  37350. CLK_MOUT_SCLK_MMC2_A
  37351. CLK_MOUT_SCLK_MMC2_B
  37352. CLK_MOUT_SCLK_MMC2_USER
  37353. CLK_MOUT_SCLK_MPHY
  37354. CLK_MOUT_SCLK_PCIE_100
  37355. CLK_MOUT_SCLK_PCIE_100_USER
  37356. CLK_MOUT_SCLK_PIXELASYNC_LITE_C_A
  37357. CLK_MOUT_SCLK_PIXELASYNC_LITE_C_B
  37358. CLK_MOUT_SCLK_PIXELASYNC_LITE_C_INIT_A
  37359. CLK_MOUT_SCLK_PIXELASYNC_LITE_C_INIT_B
  37360. CLK_MOUT_SCLK_SLIMBUS
  37361. CLK_MOUT_SCLK_SPDIF
  37362. CLK_MOUT_SCLK_SPI0
  37363. CLK_MOUT_SCLK_SPI1
  37364. CLK_MOUT_SCLK_SPI2
  37365. CLK_MOUT_SCLK_SPI3
  37366. CLK_MOUT_SCLK_SPI4
  37367. CLK_MOUT_SCLK_SPLL
  37368. CLK_MOUT_SCLK_UART0
  37369. CLK_MOUT_SCLK_UART1
  37370. CLK_MOUT_SCLK_UART2
  37371. CLK_MOUT_SCLK_UFSUNIPRO
  37372. CLK_MOUT_SCLK_UFSUNIPRO_USER
  37373. CLK_MOUT_SCLK_UFS_MPHY_USER
  37374. CLK_MOUT_SCLK_USBDRD30
  37375. CLK_MOUT_SCLK_USBDRD30_USER
  37376. CLK_MOUT_SCLK_USBHOST30
  37377. CLK_MOUT_SCLK_USBHOST30_USER
  37378. CLK_MOUT_SPI0
  37379. CLK_MOUT_SPI0_ISP
  37380. CLK_MOUT_SPI1
  37381. CLK_MOUT_SPI1_ISP
  37382. CLK_MOUT_SW_ACLK200
  37383. CLK_MOUT_SW_ACLK300
  37384. CLK_MOUT_SW_ACLK300_GSCL
  37385. CLK_MOUT_SW_ACLK333
  37386. CLK_MOUT_SW_ACLK400
  37387. CLK_MOUT_TSADC
  37388. CLK_MOUT_UART0
  37389. CLK_MOUT_UART1
  37390. CLK_MOUT_UART2
  37391. CLK_MOUT_UART_ISP
  37392. CLK_MOUT_UPLL
  37393. CLK_MOUT_USER_ACLK200_DISP1
  37394. CLK_MOUT_USER_ACLK300_DISP1
  37395. CLK_MOUT_USER_ACLK300_GSCL
  37396. CLK_MOUT_USER_ACLK333
  37397. CLK_MOUT_USER_ACLK400_DISP1
  37398. CLK_MOUT_USER_MAU_EPLL
  37399. CLK_MOUT_VPLL
  37400. CLK_MOUT_VPLLSRC
  37401. CLK_MP
  37402. CLK_MP0CLK
  37403. CLK_MP1CLK
  37404. CLK_MPLL0
  37405. CLK_MPLL0_GATE
  37406. CLK_MPLL1
  37407. CLK_MPLL1_GATE
  37408. CLK_MPWM_ISP
  37409. CLK_MS
  37410. CLK_MSCL0
  37411. CLK_MSCL1
  37412. CLK_MSCL2
  37413. CLK_MSL
  37414. CLK_MSL0
  37415. CLK_MSPI_EB
  37416. CLK_MSR_ID
  37417. CLK_MSR_MAX
  37418. CLK_MULTIPLIER_BIG_ENDIAN
  37419. CLK_MULTIPLIER_ROUND_CLOSEST
  37420. CLK_MULTIPLIER_ZERO_BYPASS
  37421. CLK_MULTI_REGISTER
  37422. CLK_MULT_DATA_PORT
  37423. CLK_MULT_MODE_0
  37424. CLK_MULT_MODE_1
  37425. CLK_MULT_MODE_2
  37426. CLK_MULT_MODE_3
  37427. CLK_MULT_MODE_SELECT
  37428. CLK_MULT_MODE_SELECT_2
  37429. CLK_MULT_MODE_SHIFT
  37430. CLK_MUX
  37431. CLK_MUX1
  37432. CLK_MUX_ACLK_G2D_266_USER
  37433. CLK_MUX_ACLK_G2D_400_USER
  37434. CLK_MUX_AUDIO
  37435. CLK_MUX_AUDIOINTBUS
  37436. CLK_MUX_BIG_ENDIAN
  37437. CLK_MUX_HIWORD_MASK
  37438. CLK_MUX_INDEX_BIT
  37439. CLK_MUX_INDEX_ONE
  37440. CLK_MUX_READ_ONLY
  37441. CLK_MUX_ROUND_CLOSEST
  37442. CLK_MVED
  37443. CLK_M_DIVISOR_MASK
  37444. CLK_M_DIVISOR_SHIFT
  37445. CLK_NAND
  37446. CLK_NAND0
  37447. CLK_NAND0_0
  37448. CLK_NAND0_1
  37449. CLK_NAND1
  37450. CLK_NAND1_0
  37451. CLK_NAND1_1
  37452. CLK_NANDXL
  37453. CLK_NAND_PLL
  37454. CLK_NFCON
  37455. CLK_NOC
  37456. CLK_NOC0
  37457. CLK_NOC0_CLK_MUX
  37458. CLK_NOC1
  37459. CLK_NOC1_CLK_DIV
  37460. CLK_NOC1_CLK_MUX
  37461. CLK_NOC_DIV
  37462. CLK_NOC_MUX
  37463. CLK_NONE
  37464. CLK_NO_27M
  37465. CLK_NO_32K
  37466. CLK_NR_CLKS
  37467. CLK_NR_ISP_CLKS
  37468. CLK_NSSP
  37469. CLK_NUM
  37470. CLK_NUMBER
  37471. CLK_NUMBER_H3
  37472. CLK_NUMBER_H5
  37473. CLK_NUMBER_SUN4I
  37474. CLK_NUMBER_SUN7I
  37475. CLK_NUMBER_WITHOUT_ROT
  37476. CLK_NUMBER_WITH_ROT
  37477. CLK_OCO
  37478. CLK_OD
  37479. CLK_OD_MASK
  37480. CLK_OFF
  37481. CLK_OF_DECLARE
  37482. CLK_OF_DECLARE_DRIVER
  37483. CLK_OF_TABLES
  37484. CLK_ON
  37485. CLK_ONENAND
  37486. CLK_OPS_PARENT_ENABLE
  37487. CLK_ORP_JTAG_EB
  37488. CLK_OSC12M
  37489. CLK_OSC32k768
  37490. CLK_OSCSEL
  37491. CLK_OSC_12M
  37492. CLK_OSC_AON_EB
  37493. CLK_OSTIMER
  37494. CLK_OTG2_REF
  37495. CLK_OUT
  37496. CLK_OUTA
  37497. CLK_OUTB
  37498. CLK_OUTNM1
  37499. CLK_OUT_A
  37500. CLK_OUT_B
  37501. CLK_OUT_C
  37502. CLK_OUT_CPU
  37503. CLK_OUT_DMC
  37504. CLK_OUT_ENB_CLR_H
  37505. CLK_OUT_ENB_CLR_L
  37506. CLK_OUT_ENB_CLR_U
  37507. CLK_OUT_ENB_CLR_V
  37508. CLK_OUT_ENB_CLR_W
  37509. CLK_OUT_ENB_CLR_X
  37510. CLK_OUT_ENB_CLR_Y
  37511. CLK_OUT_ENB_H
  37512. CLK_OUT_ENB_L
  37513. CLK_OUT_ENB_SET_H
  37514. CLK_OUT_ENB_SET_L
  37515. CLK_OUT_ENB_SET_U
  37516. CLK_OUT_ENB_SET_V
  37517. CLK_OUT_ENB_SET_W
  37518. CLK_OUT_ENB_SET_X
  37519. CLK_OUT_ENB_SET_Y
  37520. CLK_OUT_ENB_U
  37521. CLK_OUT_ENB_V
  37522. CLK_OUT_ENB_W
  37523. CLK_OUT_ENB_X
  37524. CLK_OUT_ENB_Y
  37525. CLK_OUT_LEFTBUS
  37526. CLK_OUT_RIGHTBUS
  37527. CLK_OUT_TOP
  37528. CLK_PARENTS_FLAGS
  37529. CLK_PARENTS_ID
  37530. CLK_PATA
  37531. CLK_PCIE
  37532. CLK_PCIE_AUX
  37533. CLK_PCIE_MAXI
  37534. CLK_PCIE_NR_CLK
  37535. CLK_PCIE_P0_AHB_EN
  37536. CLK_PCIE_P0_AUX_EN
  37537. CLK_PCIE_P0_AXI_EN
  37538. CLK_PCIE_P0_MAC_EN
  37539. CLK_PCIE_P0_OBFF_EN
  37540. CLK_PCIE_P0_PIPE_EN
  37541. CLK_PCIE_P1_AHB_EN
  37542. CLK_PCIE_P1_AUX_EN
  37543. CLK_PCIE_P1_AXI_EN
  37544. CLK_PCIE_P1_MAC_EN
  37545. CLK_PCIE_P1_OBFF_EN
  37546. CLK_PCIE_P1_PIPE_EN
  37547. CLK_PCIE_PHY
  37548. CLK_PCIE_REF
  37549. CLK_PCIE_REF_100M
  37550. CLK_PCIE_REF_OUT
  37551. CLK_PCLK66_GPIO
  37552. CLK_PCLK_3AA0
  37553. CLK_PCLK_3AA1
  37554. CLK_PCLK_3DNR
  37555. CLK_PCLK_ABB
  37556. CLK_PCLK_ADCIF
  37557. CLK_PCLK_ALB_G2D
  37558. CLK_PCLK_ANTIRBK_CNT_APBIF
  37559. CLK_PCLK_ASAPBMST_CSSYS_APOLLO
  37560. CLK_PCLK_ASYNCAPB_APOLLO_CSSYS
  37561. CLK_PCLK_ASYNCAPB_AUD_CSSYS
  37562. CLK_PCLK_ASYNCAPB_ISP_CSSYS
  37563. CLK_PCLK_ASYNCAXIM_CA5
  37564. CLK_PCLK_ASYNCAXIM_FD
  37565. CLK_PCLK_ASYNCAXIM_ISP3P
  37566. CLK_PCLK_ASYNCAXIM_ISPEX
  37567. CLK_PCLK_ASYNCAXIM_LITE_C
  37568. CLK_PCLK_ASYNCAXI_3AA0
  37569. CLK_PCLK_ASYNCAXI_3AA1
  37570. CLK_PCLK_ASYNCAXI_CAM1
  37571. CLK_PCLK_ASYNCAXI_CP0
  37572. CLK_PCLK_ASYNCAXI_CP1
  37573. CLK_PCLK_ASYNCAXI_DIS0
  37574. CLK_PCLK_ASYNCAXI_DIS1
  37575. CLK_PCLK_ASYNCAXI_DREX0_0
  37576. CLK_PCLK_ASYNCAXI_DREX0_1
  37577. CLK_PCLK_ASYNCAXI_DREX0_3
  37578. CLK_PCLK_ASYNCAXI_DREX1_0
  37579. CLK_PCLK_ASYNCAXI_DREX1_1
  37580. CLK_PCLK_ASYNCAXI_DREX1_3
  37581. CLK_PCLK_ASYNCAXI_LITE_A
  37582. CLK_PCLK_ASYNCAXI_LITE_B
  37583. CLK_PCLK_ASYNCAXI_LITE_D
  37584. CLK_PCLK_ASYNCAXI_NOC_P_CCI
  37585. CLK_PCLK_ASYNCAXI_SYSX
  37586. CLK_PCLK_AUD_I2S
  37587. CLK_PCLK_AUD_PCM
  37588. CLK_PCLK_AUD_SLIMBUS
  37589. CLK_PCLK_AUD_UART
  37590. CLK_PCLK_BTS_3AA0
  37591. CLK_PCLK_BTS_3AA1
  37592. CLK_PCLK_BTS_3DNR
  37593. CLK_PCLK_BTS_APOLLO
  37594. CLK_PCLK_BTS_ATLAS
  37595. CLK_PCLK_BTS_DECONM0
  37596. CLK_PCLK_BTS_DECONM1
  37597. CLK_PCLK_BTS_DECONM2
  37598. CLK_PCLK_BTS_DECONM3
  37599. CLK_PCLK_BTS_DECONM4
  37600. CLK_PCLK_BTS_DECON_TV_M0
  37601. CLK_PCLK_BTS_DECON_TV_M1
  37602. CLK_PCLK_BTS_DECON_TV_M2
  37603. CLK_PCLK_BTS_DECON_TV_M3
  37604. CLK_PCLK_BTS_DIS0
  37605. CLK_PCLK_BTS_DIS1
  37606. CLK_PCLK_BTS_DRC
  37607. CLK_PCLK_BTS_FD
  37608. CLK_PCLK_BTS_G2D
  37609. CLK_PCLK_BTS_G3D0
  37610. CLK_PCLK_BTS_G3D1
  37611. CLK_PCLK_BTS_GSCL0
  37612. CLK_PCLK_BTS_GSCL1
  37613. CLK_PCLK_BTS_GSCL2
  37614. CLK_PCLK_BTS_HEVC_0
  37615. CLK_PCLK_BTS_HEVC_1
  37616. CLK_PCLK_BTS_ISP
  37617. CLK_PCLK_BTS_ISP3P
  37618. CLK_PCLK_BTS_JPEG
  37619. CLK_PCLK_BTS_LITE_A
  37620. CLK_PCLK_BTS_LITE_B
  37621. CLK_PCLK_BTS_LITE_C
  37622. CLK_PCLK_BTS_LITE_D
  37623. CLK_PCLK_BTS_M2MSCALER0
  37624. CLK_PCLK_BTS_M2MSCALER1
  37625. CLK_PCLK_BTS_MDMA1
  37626. CLK_PCLK_BTS_MFC_0
  37627. CLK_PCLK_BTS_MFC_1
  37628. CLK_PCLK_BTS_PCIE
  37629. CLK_PCLK_BTS_SCALERC
  37630. CLK_PCLK_BTS_SCALERP
  37631. CLK_PCLK_BTS_UFS
  37632. CLK_PCLK_BTS_USBDRD30
  37633. CLK_PCLK_BTS_USBHOST30
  37634. CLK_PCLK_BUSSRVND_133
  37635. CLK_PCLK_CHIPID_APBIF
  37636. CLK_PCLK_CMU_CAM0_LOCAL
  37637. CLK_PCLK_CMU_CAM1_LOCAL
  37638. CLK_PCLK_CMU_ISP_LOCAL
  37639. CLK_PCLK_CMU_TOP_APBIF
  37640. CLK_PCLK_CSIS0
  37641. CLK_PCLK_CSIS1
  37642. CLK_PCLK_CSIS2
  37643. CLK_PCLK_CUSTOM_EFUSE_APBIF
  37644. CLK_PCLK_DBG
  37645. CLK_PCLK_DBG_AUD
  37646. CLK_PCLK_DBG_CSSYS
  37647. CLK_PCLK_DBG_ISP
  37648. CLK_PCLK_DDR_PHY0
  37649. CLK_PCLK_DDR_PHY1
  37650. CLK_PCLK_DECON
  37651. CLK_PCLK_DECON_TV
  37652. CLK_PCLK_DIS
  37653. CLK_PCLK_DIS_CORE
  37654. CLK_PCLK_DRC
  37655. CLK_PCLK_DREX0
  37656. CLK_PCLK_DREX0_TZ
  37657. CLK_PCLK_DREX1
  37658. CLK_PCLK_DREX1_TZ
  37659. CLK_PCLK_DSIM0
  37660. CLK_PCLK_DSIM1
  37661. CLK_PCLK_FD
  37662. CLK_PCLK_G2D
  37663. CLK_PCLK_GPIO_ALIVE
  37664. CLK_PCLK_GPIO_AUD
  37665. CLK_PCLK_GPIO_ESE
  37666. CLK_PCLK_GPIO_FINGER
  37667. CLK_PCLK_GPIO_FSYS
  37668. CLK_PCLK_GPIO_NFC
  37669. CLK_PCLK_GPIO_PERIC
  37670. CLK_PCLK_GPIO_TOUCH
  37671. CLK_PCLK_GSCL0
  37672. CLK_PCLK_GSCL1
  37673. CLK_PCLK_GSCL2
  37674. CLK_PCLK_HDMI
  37675. CLK_PCLK_HDMIPHY
  37676. CLK_PCLK_HDMI_CEC
  37677. CLK_PCLK_HEVC
  37678. CLK_PCLK_HPM_APBIF
  37679. CLK_PCLK_HSI2C0
  37680. CLK_PCLK_HSI2C1
  37681. CLK_PCLK_HSI2C10
  37682. CLK_PCLK_HSI2C11
  37683. CLK_PCLK_HSI2C2
  37684. CLK_PCLK_HSI2C3
  37685. CLK_PCLK_HSI2C4
  37686. CLK_PCLK_HSI2C5
  37687. CLK_PCLK_HSI2C6
  37688. CLK_PCLK_HSI2C7
  37689. CLK_PCLK_HSI2C8
  37690. CLK_PCLK_HSI2C9
  37691. CLK_PCLK_I2C0
  37692. CLK_PCLK_I2C1
  37693. CLK_PCLK_I2C2
  37694. CLK_PCLK_I2C3
  37695. CLK_PCLK_I2C4
  37696. CLK_PCLK_I2C5
  37697. CLK_PCLK_I2C6
  37698. CLK_PCLK_I2C7
  37699. CLK_PCLK_I2S1
  37700. CLK_PCLK_ISP
  37701. CLK_PCLK_ISP_I2C0
  37702. CLK_PCLK_ISP_I2C1
  37703. CLK_PCLK_ISP_I2C2
  37704. CLK_PCLK_ISP_MCTADC
  37705. CLK_PCLK_ISP_MCUCTL
  37706. CLK_PCLK_ISP_MPWM
  37707. CLK_PCLK_ISP_PWM
  37708. CLK_PCLK_ISP_SPI0
  37709. CLK_PCLK_ISP_SPI1
  37710. CLK_PCLK_ISP_UART
  37711. CLK_PCLK_ISP_WDT
  37712. CLK_PCLK_JPEG
  37713. CLK_PCLK_LITE_A
  37714. CLK_PCLK_LITE_B
  37715. CLK_PCLK_LITE_C
  37716. CLK_PCLK_LITE_D
  37717. CLK_PCLK_M2MSCALER0
  37718. CLK_PCLK_M2MSCALER1
  37719. CLK_PCLK_MCT
  37720. CLK_PCLK_MFC
  37721. CLK_PCLK_MIC0
  37722. CLK_PCLK_MIC1
  37723. CLK_PCLK_MIFSRVND_133
  37724. CLK_PCLK_MONOTONIC_CNT
  37725. CLK_PCLK_OTP_CON_APBIF
  37726. CLK_PCLK_PCIE_CTRL
  37727. CLK_PCLK_PCIE_PHY
  37728. CLK_PCLK_PCM1
  37729. CLK_PCLK_PMU_APBIF
  37730. CLK_PCLK_PMU_APOLLO
  37731. CLK_PCLK_PMU_ATLAS
  37732. CLK_PCLK_PMU_AUD
  37733. CLK_PCLK_PMU_BUS
  37734. CLK_PCLK_PMU_CAM0
  37735. CLK_PCLK_PMU_CAM1
  37736. CLK_PCLK_PMU_DISP
  37737. CLK_PCLK_PMU_FSYS
  37738. CLK_PCLK_PMU_G2D
  37739. CLK_PCLK_PMU_G3D
  37740. CLK_PCLK_PMU_GSCL
  37741. CLK_PCLK_PMU_HEVC
  37742. CLK_PCLK_PMU_ISP
  37743. CLK_PCLK_PMU_MFC
  37744. CLK_PCLK_PMU_MIF
  37745. CLK_PCLK_PMU_MSCL
  37746. CLK_PCLK_PMU_PERIC
  37747. CLK_PCLK_PMU_PERIS
  37748. CLK_PCLK_PPMU_DREX0S0
  37749. CLK_PCLK_PPMU_DREX0S1
  37750. CLK_PCLK_PPMU_DREX0S3
  37751. CLK_PCLK_PPMU_DREX0_0
  37752. CLK_PCLK_PPMU_DREX0_1
  37753. CLK_PCLK_PPMU_DREX1S0
  37754. CLK_PCLK_PPMU_DREX1S1
  37755. CLK_PCLK_PPMU_DREX1S3
  37756. CLK_PCLK_PPMU_DREX1_0
  37757. CLK_PCLK_PPMU_DREX1_1
  37758. CLK_PCLK_PWM
  37759. CLK_PCLK_RTC
  37760. CLK_PCLK_SCALERC
  37761. CLK_PCLK_SCALERP
  37762. CLK_PCLK_SCI
  37763. CLK_PCLK_SECJTAG
  37764. CLK_PCLK_SECKEY_APBIF
  37765. CLK_PCLK_SFR0_CTRL
  37766. CLK_PCLK_SFR1
  37767. CLK_PCLK_SLIMSSS
  37768. CLK_PCLK_SMMU_3AA0
  37769. CLK_PCLK_SMMU_3AA1
  37770. CLK_PCLK_SMMU_3DNR
  37771. CLK_PCLK_SMMU_DECON0X
  37772. CLK_PCLK_SMMU_DECON1X
  37773. CLK_PCLK_SMMU_DIS0
  37774. CLK_PCLK_SMMU_DIS1
  37775. CLK_PCLK_SMMU_DRC
  37776. CLK_PCLK_SMMU_FD
  37777. CLK_PCLK_SMMU_G2D
  37778. CLK_PCLK_SMMU_GSCL0
  37779. CLK_PCLK_SMMU_GSCL1
  37780. CLK_PCLK_SMMU_GSCL2
  37781. CLK_PCLK_SMMU_HEVC_0
  37782. CLK_PCLK_SMMU_HEVC_1
  37783. CLK_PCLK_SMMU_ISP
  37784. CLK_PCLK_SMMU_ISPCPU
  37785. CLK_PCLK_SMMU_JPEG
  37786. CLK_PCLK_SMMU_LITE_A
  37787. CLK_PCLK_SMMU_LITE_B
  37788. CLK_PCLK_SMMU_LITE_C
  37789. CLK_PCLK_SMMU_LITE_D
  37790. CLK_PCLK_SMMU_LPASSX
  37791. CLK_PCLK_SMMU_M2MSCALER0
  37792. CLK_PCLK_SMMU_M2MSCALER1
  37793. CLK_PCLK_SMMU_MDMA1
  37794. CLK_PCLK_SMMU_MFC_0
  37795. CLK_PCLK_SMMU_MFC_1
  37796. CLK_PCLK_SMMU_PDMA0
  37797. CLK_PCLK_SMMU_PDMA1
  37798. CLK_PCLK_SMMU_SCALERC
  37799. CLK_PCLK_SMMU_SCALERP
  37800. CLK_PCLK_SMMU_TV0X
  37801. CLK_PCLK_SMMU_TV1X
  37802. CLK_PCLK_SPDIF
  37803. CLK_PCLK_SPI0
  37804. CLK_PCLK_SPI1
  37805. CLK_PCLK_SPI2
  37806. CLK_PCLK_SPI3
  37807. CLK_PCLK_SPI4
  37808. CLK_PCLK_SYSREG_APOLLO
  37809. CLK_PCLK_SYSREG_ATLAS
  37810. CLK_PCLK_SYSREG_AUD
  37811. CLK_PCLK_SYSREG_BUS
  37812. CLK_PCLK_SYSREG_CAM0
  37813. CLK_PCLK_SYSREG_CAM1
  37814. CLK_PCLK_SYSREG_DISP
  37815. CLK_PCLK_SYSREG_FSYS
  37816. CLK_PCLK_SYSREG_G2D
  37817. CLK_PCLK_SYSREG_G3D
  37818. CLK_PCLK_SYSREG_GSCL
  37819. CLK_PCLK_SYSREG_HEVC
  37820. CLK_PCLK_SYSREG_ISP
  37821. CLK_PCLK_SYSREG_MFC
  37822. CLK_PCLK_SYSREG_MIF
  37823. CLK_PCLK_SYSREG_MSCL
  37824. CLK_PCLK_SYSREG_PERIC
  37825. CLK_PCLK_SYSREG_PERIS
  37826. CLK_PCLK_TIMER
  37827. CLK_PCLK_TMU0_APBIF
  37828. CLK_PCLK_TMU1_APBIF
  37829. CLK_PCLK_TOPRTC
  37830. CLK_PCLK_TZPC0
  37831. CLK_PCLK_TZPC1
  37832. CLK_PCLK_TZPC10
  37833. CLK_PCLK_TZPC11
  37834. CLK_PCLK_TZPC12
  37835. CLK_PCLK_TZPC2
  37836. CLK_PCLK_TZPC3
  37837. CLK_PCLK_TZPC4
  37838. CLK_PCLK_TZPC5
  37839. CLK_PCLK_TZPC6
  37840. CLK_PCLK_TZPC7
  37841. CLK_PCLK_TZPC8
  37842. CLK_PCLK_TZPC9
  37843. CLK_PCLK_UART0
  37844. CLK_PCLK_UART1
  37845. CLK_PCLK_UART2
  37846. CLK_PCLK_WDT0
  37847. CLK_PCLK_WDT1
  37848. CLK_PCLK_WDT_APOLLO
  37849. CLK_PCLK_WDT_ATLAS
  37850. CLK_PCM
  37851. CLK_PCM0
  37852. CLK_PCM1
  37853. CLK_PCM2
  37854. CLK_PCMR10_MASTER
  37855. CLK_PCM_0
  37856. CLK_PCM_1
  37857. CLK_PCM_2
  37858. CLK_PDMA0
  37859. CLK_PDMA1
  37860. CLK_PDN
  37861. CLK_PE
  37862. CLK_PENDING
  37863. CLK_PERIBUS_SEL
  37864. CLK_PERIPH_BUS
  37865. CLK_PERIPH_CORE
  37866. CLK_PERIPH_SGPIO
  37867. CLK_PERIPH_SYS
  37868. CLK_PERI_AP_DMA
  37869. CLK_PERI_AP_DMA_PD
  37870. CLK_PERI_AP_HIF
  37871. CLK_PERI_AUXADC
  37872. CLK_PERI_AUXADC_PD
  37873. CLK_PERI_AXI
  37874. CLK_PERI_BTIF
  37875. CLK_PERI_BTIF_PD
  37876. CLK_PERI_ETH
  37877. CLK_PERI_FCI
  37878. CLK_PERI_FHCTL
  37879. CLK_PERI_FLASH
  37880. CLK_PERI_FLASH_PD
  37881. CLK_PERI_GCPU
  37882. CLK_PERI_GMAC
  37883. CLK_PERI_GMAC_PCLK
  37884. CLK_PERI_HOST89_DVD
  37885. CLK_PERI_HOST89_INT
  37886. CLK_PERI_HOST89_SPI
  37887. CLK_PERI_I2C0
  37888. CLK_PERI_I2C0_PD
  37889. CLK_PERI_I2C1
  37890. CLK_PERI_I2C1_PD
  37891. CLK_PERI_I2C2
  37892. CLK_PERI_I2C2_PD
  37893. CLK_PERI_I2C3
  37894. CLK_PERI_I2C4
  37895. CLK_PERI_I2C5
  37896. CLK_PERI_I2C6
  37897. CLK_PERI_IRDA
  37898. CLK_PERI_IRRX
  37899. CLK_PERI_IRTX_PD
  37900. CLK_PERI_MD_HIF
  37901. CLK_PERI_MSDC20_1
  37902. CLK_PERI_MSDC20_2
  37903. CLK_PERI_MSDC30_0
  37904. CLK_PERI_MSDC30_0_PD
  37905. CLK_PERI_MSDC30_0_QTR_EN
  37906. CLK_PERI_MSDC30_1
  37907. CLK_PERI_MSDC30_1_EN
  37908. CLK_PERI_MSDC30_1_PD
  37909. CLK_PERI_MSDC30_2
  37910. CLK_PERI_MSDC30_2_EN
  37911. CLK_PERI_MSDC30_3
  37912. CLK_PERI_MSDC30_3_EN
  37913. CLK_PERI_MSDC30_3_QTR_EN
  37914. CLK_PERI_MSDC50_0_EN
  37915. CLK_PERI_MSDC50_0_HCLK_EN
  37916. CLK_PERI_MSDC50_3
  37917. CLK_PERI_MSDC50_3_HCLK_EN
  37918. CLK_PERI_NFI
  37919. CLK_PERI_NFIECC
  37920. CLK_PERI_NFIECC_PD
  37921. CLK_PERI_NFI_ECC
  37922. CLK_PERI_NFI_PAD
  37923. CLK_PERI_NFI_PD
  37924. CLK_PERI_NLI
  37925. CLK_PERI_NLI_ARB
  37926. CLK_PERI_NR
  37927. CLK_PERI_NR_CLK
  37928. CLK_PERI_PCIE0
  37929. CLK_PERI_PCIE1
  37930. CLK_PERI_PERI_PWRAP
  37931. CLK_PERI_PWM
  37932. CLK_PERI_PWM0
  37933. CLK_PERI_PWM1
  37934. CLK_PERI_PWM1_PD
  37935. CLK_PERI_PWM2
  37936. CLK_PERI_PWM2_PD
  37937. CLK_PERI_PWM3
  37938. CLK_PERI_PWM3_PD
  37939. CLK_PERI_PWM4
  37940. CLK_PERI_PWM4_PD
  37941. CLK_PERI_PWM5
  37942. CLK_PERI_PWM5_PD
  37943. CLK_PERI_PWM6
  37944. CLK_PERI_PWM6_PD
  37945. CLK_PERI_PWM7
  37946. CLK_PERI_PWM7_PD
  37947. CLK_PERI_PWM_PD
  37948. CLK_PERI_SFLASH
  37949. CLK_PERI_SNFI_PD
  37950. CLK_PERI_SPI
  37951. CLK_PERI_SPI0
  37952. CLK_PERI_SPI0_PD
  37953. CLK_PERI_SPI1
  37954. CLK_PERI_SPI1_PD
  37955. CLK_PERI_SPI2
  37956. CLK_PERI_SPI3
  37957. CLK_PERI_SPI5
  37958. CLK_PERI_THERM
  37959. CLK_PERI_THERM_PD
  37960. CLK_PERI_UART0
  37961. CLK_PERI_UART0_PD
  37962. CLK_PERI_UART0_SEL
  37963. CLK_PERI_UART1
  37964. CLK_PERI_UART1_PD
  37965. CLK_PERI_UART1_SEL
  37966. CLK_PERI_UART2
  37967. CLK_PERI_UART2_PD
  37968. CLK_PERI_UART2_SEL
  37969. CLK_PERI_UART3
  37970. CLK_PERI_UART3_PD
  37971. CLK_PERI_UART3_SEL
  37972. CLK_PERI_UART4
  37973. CLK_PERI_UART4_PD
  37974. CLK_PERI_USB0
  37975. CLK_PERI_USB0_MCU
  37976. CLK_PERI_USB1
  37977. CLK_PERI_USB1_MCU
  37978. CLK_PERI_USBSLV
  37979. CLK_PERI_USB_SLV
  37980. CLK_PFDV2_FRAC_MASK
  37981. CLK_PHASE_0
  37982. CLK_PHASE_180
  37983. CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY
  37984. CLK_PHYCLK_HDMIPHY_TMDS_CLKO
  37985. CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY
  37986. CLK_PHYCLK_HDMI_PIXEL
  37987. CLK_PHYCLK_LLI_MPHY_TO_UFS_PHY
  37988. CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8
  37989. CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY
  37990. CLK_PHYCLK_MIPIDPHY0_RXCLKESC0
  37991. CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY
  37992. CLK_PHYCLK_MIPIDPHY1_BITCLKDIV8
  37993. CLK_PHYCLK_MIPIDPHY1_RXCLKESC0
  37994. CLK_PHYCLK_RXBYTECLKHS0_S2A
  37995. CLK_PHYCLK_RXBYTECLKHS0_S2B
  37996. CLK_PHYCLK_RXBYTECLKHS0_S4
  37997. CLK_PHYCLK_RXBYTEECLKHS0_S2A_PHY
  37998. CLK_PHYCLK_RXBYTEECLKHS0_S2B
  37999. CLK_PHYCLK_RXBYTEECLKHS0_S4_PHY
  38000. CLK_PHYCLK_UFS_RX0_SYMBOL
  38001. CLK_PHYCLK_UFS_RX0_SYMBOL_PHY
  38002. CLK_PHYCLK_UFS_RX1_SYMBOL
  38003. CLK_PHYCLK_UFS_RX1_SYMBOL_PHY
  38004. CLK_PHYCLK_UFS_TX0_SYMBOL
  38005. CLK_PHYCLK_UFS_TX0_SYMBOL_PHY
  38006. CLK_PHYCLK_UFS_TX1_SYMBOL
  38007. CLK_PHYCLK_UFS_TX1_SYMBOL_PHY
  38008. CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK
  38009. CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY
  38010. CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK
  38011. CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY
  38012. CLK_PHYCLK_USBHOST20_PHY_CLK48MOHCI
  38013. CLK_PHYCLK_USBHOST20_PHY_CLK48MOHCI_PHY
  38014. CLK_PHYCLK_USBHOST20_PHY_FREECLK
  38015. CLK_PHYCLK_USBHOST20_PHY_FREECLK_PHY
  38016. CLK_PHYCLK_USBHOST20_PHY_HSIC1
  38017. CLK_PHYCLK_USBHOST20_PHY_HSIC1_PHY
  38018. CLK_PHYCLK_USBHOST20_PHY_PHYCLOCK
  38019. CLK_PHYCLK_USBHOST20_PHY_PHYCLOCK_PHY
  38020. CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK
  38021. CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY
  38022. CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK
  38023. CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY
  38024. CLK_PIN_CNTL
  38025. CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND
  38026. CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND_MASK
  38027. CLK_PIN_CNTL__CG_CLK_TO_OUTPIN
  38028. CLK_PIN_CNTL__CG_CLK_TO_OUTPIN_MASK
  38029. CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN
  38030. CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN_MASK
  38031. CLK_PIN_CNTL__CG_SPARE
  38032. CLK_PIN_CNTL__CG_SPARE_MASK
  38033. CLK_PIN_CNTL__CG_SPARE_RD_MASK
  38034. CLK_PIN_CNTL__CP_CLK_RUNNING
  38035. CLK_PIN_CNTL__CP_CLK_RUNNING_MASK
  38036. CLK_PIN_CNTL__DONT_USE_XTALIN
  38037. CLK_PIN_CNTL__DONT_USE_XTALIN_MASK
  38038. CLK_PIN_CNTL__OSC_EN
  38039. CLK_PIN_CNTL__OSC_EN_MASK
  38040. CLK_PIN_CNTL__PWRSEQ_DELAY_MASK
  38041. CLK_PIN_CNTL__SCLK_DYN_START_CNTL
  38042. CLK_PIN_CNTL__SCLK_DYN_START_CNTL_MASK
  38043. CLK_PIN_CNTL__SLOW_CLOCK_SOURCE
  38044. CLK_PIN_CNTL__SLOW_CLOCK_SOURCE_MASK
  38045. CLK_PIN_CNTL__XTALIN_ALWAYS_ONb
  38046. CLK_PIN_CNTL__XTALIN_ALWAYS_ONb_MASK
  38047. CLK_PIN_CNTL__XTL_LOW_GAIN
  38048. CLK_PIN_CNTL__XTL_LOW_GAIN_MASK
  38049. CLK_PIN_EB
  38050. CLK_PIN_OUT
  38051. CLK_PIXELASYNCM0
  38052. CLK_PIXELASYNCM1
  38053. CLK_PIX_AUX_DISP
  38054. CLK_PIX_DVO
  38055. CLK_PIX_GDP1
  38056. CLK_PIX_GDP2
  38057. CLK_PIX_GDP3
  38058. CLK_PIX_GDP4
  38059. CLK_PIX_HDDAC
  38060. CLK_PIX_HDMI
  38061. CLK_PIX_MAIN_DISP
  38062. CLK_PIX_PIP
  38063. CLK_PLL
  38064. CLK_PLL0
  38065. CLK_PLL0D2
  38066. CLK_PLL0D20
  38067. CLK_PLL0D24
  38068. CLK_PLL0D3
  38069. CLK_PLL0D4
  38070. CLK_PLL0D5
  38071. CLK_PLL0D6
  38072. CLK_PLL0D8
  38073. CLK_PLL1
  38074. CLK_PLL10
  38075. CLK_PLL1D2
  38076. CLK_PLL1_DIV2
  38077. CLK_PLL1_DIV4
  38078. CLK_PLL2
  38079. CLK_PLL3
  38080. CLK_PLL4
  38081. CLK_PLL9
  38082. CLK_PLL_10M
  38083. CLK_PLL_1M
  38084. CLK_PLL_AUDIO
  38085. CLK_PLL_AUDIO_2X
  38086. CLK_PLL_AUDIO_4X
  38087. CLK_PLL_AUDIO_8X
  38088. CLK_PLL_AUDIO_BASE
  38089. CLK_PLL_C0CPUX
  38090. CLK_PLL_C1CPUX
  38091. CLK_PLL_CONFIG
  38092. CLK_PLL_CORE
  38093. CLK_PLL_CPU
  38094. CLK_PLL_CPUX
  38095. CLK_PLL_DDR
  38096. CLK_PLL_DDR0
  38097. CLK_PLL_DDR1
  38098. CLK_PLL_DDR_BASE
  38099. CLK_PLL_DDR_OTHER
  38100. CLK_PLL_DE
  38101. CLK_PLL_GPU
  38102. CLK_PLL_HSIC
  38103. CLK_PLL_ISP
  38104. CLK_PLL_MASK
  38105. CLK_PLL_MIPI
  38106. CLK_PLL_NUM
  38107. CLK_PLL_PERIPH
  38108. CLK_PLL_PERIPH0
  38109. CLK_PLL_PERIPH0_2X
  38110. CLK_PLL_PERIPH0_4X
  38111. CLK_PLL_PERIPH0_SATA
  38112. CLK_PLL_PERIPH1
  38113. CLK_PLL_PERIPH1_2X
  38114. CLK_PLL_PERIPH1_4X
  38115. CLK_PLL_PERIPH_2X
  38116. CLK_PLL_PERIPH_BASE
  38117. CLK_PLL_PERIPH_SATA
  38118. CLK_PLL_SATA
  38119. CLK_PLL_SATA_OUT
  38120. CLK_PLL_SRC
  38121. CLK_PLL_VE
  38122. CLK_PLL_VIDEO
  38123. CLK_PLL_VIDEO0
  38124. CLK_PLL_VIDEO0_2X
  38125. CLK_PLL_VIDEO0_4X
  38126. CLK_PLL_VIDEO1
  38127. CLK_PLL_VIDEO1_2X
  38128. CLK_PLL_VIDEO1_4X
  38129. CLK_PLL_VIDEO_2X
  38130. CLK_PMU
  38131. CLK_PMU_26M
  38132. CLK_PMU_APBIF
  38133. CLK_PMU_EB
  38134. CLK_PMU_GATE_NUM
  38135. CLK_PM_EN
  38136. CLK_POST
  38137. CLK_POST_MASK
  38138. CLK_POST_OVERRIDE
  38139. CLK_POST_SHIFT
  38140. CLK_PPMUACP
  38141. CLK_PPMUCAMIF
  38142. CLK_PPMUCPU
  38143. CLK_PPMUDMC0
  38144. CLK_PPMUDMC1
  38145. CLK_PPMUFILE
  38146. CLK_PPMUG3D
  38147. CLK_PPMUGPS
  38148. CLK_PPMUIMAGE
  38149. CLK_PPMUISPMX
  38150. CLK_PPMUISPX
  38151. CLK_PPMULCD0
  38152. CLK_PPMULCD1
  38153. CLK_PPMULEFT
  38154. CLK_PPMUMFC_L
  38155. CLK_PPMUMFC_R
  38156. CLK_PPMURIGHT
  38157. CLK_PPMUTV
  38158. CLK_PP_DMU
  38159. CLK_PP_HADES
  38160. CLK_PP_HEVC
  38161. CLK_PRE
  38162. CLK_PREFIX
  38163. CLK_PREPARE
  38164. CLK_PREPARE_MASK
  38165. CLK_PREPARE_OVERRIDE
  38166. CLK_PREPARE_SHIFT
  38167. CLK_PRE_MASK
  38168. CLK_PRE_OVERRIDE
  38169. CLK_PRE_SHIFT
  38170. CLK_PROBE
  38171. CLK_PROBE_EB
  38172. CLK_PROC_BDISP_0
  38173. CLK_PROC_BDISP_1
  38174. CLK_PROC_MIXER
  38175. CLK_PROC_SC
  38176. CLK_PROC_STFE
  38177. CLK_PROC_TP
  38178. CLK_PROVISIONKEY0
  38179. CLK_PROVISIONKEY1
  38180. CLK_PS
  38181. CLK_PSI_AHB1_AHB2
  38182. CLK_PTI_STM
  38183. CLK_PUB0_REG_EB
  38184. CLK_PUB1_REG_EB
  38185. CLK_PVI_INDEX
  38186. CLK_PWM
  38187. CLK_PWM0
  38188. CLK_PWM0_EB
  38189. CLK_PWM1
  38190. CLK_PWM1_EB
  38191. CLK_PWM2
  38192. CLK_PWM2_EB
  38193. CLK_PWM3
  38194. CLK_PWM3_EB
  38195. CLK_PWM4
  38196. CLK_PWM5
  38197. CLK_PWM_ISP
  38198. CLK_PWM_ISP_SCLK
  38199. CLK_PWRI2C
  38200. CLK_PWRMGT_CNTL
  38201. CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK
  38202. CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT__SHIFT
  38203. CLK_PWRMGT_CNTL__CG_NO1_DEBUG_MASK
  38204. CLK_PWRMGT_CNTL__CG_NO1_DEBUG__SHIFT
  38205. CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT
  38206. CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT_MASK
  38207. CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT__SHIFT
  38208. CLK_PWRMGT_CNTL__DISP_PM
  38209. CLK_PWRMGT_CNTL__DISP_PM_MASK
  38210. CLK_PWRMGT_CNTL__DISP_PM__SHIFT
  38211. CLK_PWRMGT_CNTL__DLL_READY
  38212. CLK_PWRMGT_CNTL__DLL_READY_MASK
  38213. CLK_PWRMGT_CNTL__DLL_READY__SHIFT
  38214. CLK_PWRMGT_CNTL__DYN_STOP_MODE_MASK
  38215. CLK_PWRMGT_CNTL__DYN_STOP_MODE__SHIFT
  38216. CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE
  38217. CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE_MASK
  38218. CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE__SHIFT
  38219. CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN
  38220. CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN_MASK
  38221. CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN__SHIFT
  38222. CLK_PWRMGT_CNTL__MCLK_TURNOFF
  38223. CLK_PWRMGT_CNTL__MCLK_TURNOFF_MASK
  38224. CLK_PWRMGT_CNTL__MCLK_TURNOFF__SHIFT
  38225. CLK_PWRMGT_CNTL__MC_BUSY
  38226. CLK_PWRMGT_CNTL__MC_BUSY_MASK
  38227. CLK_PWRMGT_CNTL__MC_BUSY__SHIFT
  38228. CLK_PWRMGT_CNTL__MC_CH_MODE
  38229. CLK_PWRMGT_CNTL__MC_CH_MODE_MASK
  38230. CLK_PWRMGT_CNTL__MC_CH_MODE__SHIFT
  38231. CLK_PWRMGT_CNTL__MC_INT_CNTL
  38232. CLK_PWRMGT_CNTL__MC_INT_CNTL_MASK
  38233. CLK_PWRMGT_CNTL__MC_INT_CNTL__SHIFT
  38234. CLK_PWRMGT_CNTL__MC_SWITCH
  38235. CLK_PWRMGT_CNTL__MC_SWITCH_MASK
  38236. CLK_PWRMGT_CNTL__MC_SWITCH__SHIFT
  38237. CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF
  38238. CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF_MASK
  38239. CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF__SHIFT
  38240. CLK_PWRMGT_CNTL__P2CLK_TURNOFF
  38241. CLK_PWRMGT_CNTL__P2CLK_TURNOFF_MASK
  38242. CLK_PWRMGT_CNTL__P2CLK_TURNOFF__SHIFT
  38243. CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF
  38244. CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF_MASK
  38245. CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF__SHIFT
  38246. CLK_PWRMGT_CNTL__PCLK_TURNOFF
  38247. CLK_PWRMGT_CNTL__PCLK_TURNOFF_MASK
  38248. CLK_PWRMGT_CNTL__PCLK_TURNOFF__SHIFT
  38249. CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF
  38250. CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF_MASK
  38251. CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF__SHIFT
  38252. CLK_PWRMGT_CNTL__SCLK_TURNOFF
  38253. CLK_PWRMGT_CNTL__SCLK_TURNOFF_MASK
  38254. CLK_PWRMGT_CNTL__SCLK_TURNOFF__SHIFT
  38255. CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF
  38256. CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF_MASK
  38257. CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF__SHIFT
  38258. CLK_PWRMGT_CNTL__TEST_MODE
  38259. CLK_PWRMGT_CNTL__TEST_MODE_MASK
  38260. CLK_PWRMGT_CNTL__TEST_MODE__SHIFT
  38261. CLK_PWRMGT_CNTL__TVCLK_TURNOFF
  38262. CLK_PWRMGT_CNTL__TVCLK_TURNOFF_MASK
  38263. CLK_PWRMGT_CNTL__TVCLK_TURNOFF__SHIFT
  38264. CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF
  38265. CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF_MASK
  38266. CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF__SHIFT
  38267. CLK_PXA300_GCU
  38268. CLK_PXA320_GCU
  38269. CLK_QEG3D
  38270. CLK_QEGSCALER0
  38271. CLK_QEGSCALER1
  38272. CLK_QEJPEG
  38273. CLK_QEM2MSCALER
  38274. CLK_QEMFC
  38275. CLK_QE_CH0_LCD
  38276. CLK_QE_CH1_LCD
  38277. CLK_QE_DRC
  38278. CLK_QE_FD
  38279. CLK_QE_ISP
  38280. CLK_QE_ISPCX
  38281. CLK_QE_LITE0
  38282. CLK_QE_LITE1
  38283. CLK_QE_SCALERC
  38284. CLK_QE_SCALERP
  38285. CLK_QS_MODE
  38286. CLK_RANGE
  38287. CLK_RAT
  38288. CLK_RATE
  38289. CLK_RATE_PROPAGATES
  38290. CLK_RATIO_SHIFT
  38291. CLK_RCLK_DREX0
  38292. CLK_RCLK_DREX1
  38293. CLK_RCPWM_EXTERNAL
  38294. CLK_RCPWM_INTERNAL
  38295. CLK_RCT100M_CAL_EB
  38296. CLK_RECALC_NEW_RATES
  38297. CLK_RECOVERY_FAILED
  38298. CLK_RECOVERY_FINISHED
  38299. CLK_REF_DIV
  38300. CLK_REF_HDMIPHY
  38301. CLK_REF_SEL
  38302. CLK_REG
  38303. CLK_REG_FIELD_LIST
  38304. CLK_REG_LIST_NV10
  38305. CLK_REQ_OUTN_SEL
  38306. CLK_REQ_PRCM
  38307. CLK_REQ_TIME
  38308. CLK_RESET
  38309. CLK_RESET_CCLK_BURST
  38310. CLK_RESET_CCLK_BURST_POLICY_PLLX
  38311. CLK_RESET_CCLK_BURST_POLICY_SHIFT
  38312. CLK_RESET_CCLK_DIVIDER
  38313. CLK_RESET_CCLK_IDLE_POLICY
  38314. CLK_RESET_CCLK_IDLE_POLICY_SHIFT
  38315. CLK_RESET_CCLK_RUN_POLICY
  38316. CLK_RESET_CCLK_RUN_POLICY_SHIFT
  38317. CLK_RESET_CLK_SOURCE_MSELECT
  38318. CLK_RESET_PLLA_BASE
  38319. CLK_RESET_PLLA_MISC
  38320. CLK_RESET_PLLC_BASE
  38321. CLK_RESET_PLLC_MISC
  38322. CLK_RESET_PLLC_MISC_IDDQ
  38323. CLK_RESET_PLLM_BASE
  38324. CLK_RESET_PLLM_MISC
  38325. CLK_RESET_PLLM_MISC_IDDQ
  38326. CLK_RESET_PLLP_BASE
  38327. CLK_RESET_PLLP_MISC
  38328. CLK_RESET_PLLX_BASE
  38329. CLK_RESET_PLLX_MISC
  38330. CLK_RESET_PLLX_MISC3
  38331. CLK_RESET_PLLX_MISC3_IDDQ
  38332. CLK_RESET_SCLK_BURST
  38333. CLK_RESET_SCLK_DIVIDER
  38334. CLK_RESET_SOURCE_CSITE
  38335. CLK_RGB15_MASK
  38336. CLK_RGB16_MASK
  38337. CLK_RGB24_MASK
  38338. CLK_RGB8I_MASK
  38339. CLK_RINT
  38340. CLK_RMII_REF
  38341. CLK_ROCKCHIP_CLK_H
  38342. CLK_ROM_EB
  38343. CLK_ROT
  38344. CLK_ROTATOR
  38345. CLK_ROT_DIV
  38346. CLK_RPCSRC
  38347. CLK_RPLL0
  38348. CLK_RPLL0_192M
  38349. CLK_RPLL0_48M
  38350. CLK_RPLL0_96M
  38351. CLK_RPLL0_GATE
  38352. CLK_RPLL1
  38353. CLK_RPLL1_192M
  38354. CLK_RPLL1_468M
  38355. CLK_RPLL1_48M
  38356. CLK_RPLL1_64M
  38357. CLK_RPLL1_96M
  38358. CLK_RPLL1_GATE
  38359. CLK_RPMH_ARC_EN_OFFSET
  38360. CLK_RPMH_VRM_EN_OFFSET
  38361. CLK_RPU_CORE
  38362. CLK_RPU_CORE_DIV
  38363. CLK_RPU_CORE_MUX
  38364. CLK_RPU_L
  38365. CLK_RPU_L_DIV
  38366. CLK_RPU_L_MUX
  38367. CLK_RPU_L_PLL
  38368. CLK_RPU_L_PLL_MUX
  38369. CLK_RPU_SLEEP
  38370. CLK_RPU_SLEEP_DIV
  38371. CLK_RPU_V
  38372. CLK_RPU_V_DIV
  38373. CLK_RPU_V_PLL
  38374. CLK_RPU_V_PLL_MUX
  38375. CLK_RST
  38376. CLK_RST_CONTROLLER_CPU_CMPLX_STATUS
  38377. CLK_RST_CONTROLLER_RST_DEV_Y_CLR
  38378. CLK_RST_CONTROLLER_RST_DEV_Y_SET
  38379. CLK_RTC
  38380. CLK_RTC4M0_CAL_EB
  38381. CLK_RTCDV10_EB
  38382. CLK_RTIC
  38383. CLK_RXCLK_TX
  38384. CLK_RX_DELAY_MASK
  38385. CLK_RX_ICN_DISP_0
  38386. CLK_RX_ICN_DISP_1
  38387. CLK_RX_ICN_DMU
  38388. CLK_RX_ICN_HADES
  38389. CLK_RX_ICN_HVA
  38390. CLK_RX_ICN_TS
  38391. CLK_RX_PHASE_MASK
  38392. CLK_RX_RESET_B1_CTL_TX1_RESET_MASK
  38393. CLK_RX_RESET_B1_CTL_TX2_RESET_MASK
  38394. CLK_R_125
  38395. CLK_R_128
  38396. CLK_R_132
  38397. CLK_R_136
  38398. CLK_R_AHB
  38399. CLK_R_APB1
  38400. CLK_R_APB1_IR
  38401. CLK_R_APB1_PWM
  38402. CLK_R_APB1_TIMER
  38403. CLK_R_APB1_TWD
  38404. CLK_R_APB1_W1
  38405. CLK_R_APB2
  38406. CLK_R_APB2_I2C
  38407. CLK_R_APB2_UART
  38408. CLK_S
  38409. CLK_S0
  38410. CLK_S1
  38411. CLK_S2
  38412. CLK_S3
  38413. CLK_SAI1
  38414. CLK_SAI2
  38415. CLK_SAIQ_PDIV
  38416. CLK_SAMP_BYPASS_MODE
  38417. CLK_SAMP_DELAY
  38418. CLK_SAMP_DELAY_MASK
  38419. CLK_SATA
  38420. CLK_SATA_AHB_EN
  38421. CLK_SATA_ASIC_EN
  38422. CLK_SATA_AXI_EN
  38423. CLK_SATA_PHY
  38424. CLK_SATA_PHYCTRL
  38425. CLK_SATA_PHYI2C
  38426. CLK_SATA_PM_EN
  38427. CLK_SATA_RBC_EN
  38428. CLK_SCALE
  38429. CLK_SCALERC
  38430. CLK_SCALERP
  38431. CLK_SCLK
  38432. CLK_SCLK_ANTIRBK_CNT
  38433. CLK_SCLK_APLL
  38434. CLK_SCLK_APOLLO
  38435. CLK_SCLK_ASV_TB
  38436. CLK_SCLK_ATLAS
  38437. CLK_SCLK_AUDIO0
  38438. CLK_SCLK_AUDIO1
  38439. CLK_SCLK_AUDIO2
  38440. CLK_SCLK_AUD_CA5
  38441. CLK_SCLK_AUD_I2S
  38442. CLK_SCLK_AUD_PCM
  38443. CLK_SCLK_AUD_SLIMBUS
  38444. CLK_SCLK_AUD_UART
  38445. CLK_SCLK_BPLL
  38446. CLK_SCLK_BUS_PLL
  38447. CLK_SCLK_BUS_PLL_APOLLO
  38448. CLK_SCLK_BUS_PLL_ATLAS
  38449. CLK_SCLK_CAM0
  38450. CLK_SCLK_CAM1
  38451. CLK_SCLK_CAM_BAYER
  38452. CLK_SCLK_CHIPID
  38453. CLK_SCLK_CSIS0
  38454. CLK_SCLK_CSIS1
  38455. CLK_SCLK_CUSTOM_EFUSE
  38456. CLK_SCLK_DAC
  38457. CLK_SCLK_DECON_ECLK
  38458. CLK_SCLK_DECON_ECLK_DISP
  38459. CLK_SCLK_DECON_TV_ECLK
  38460. CLK_SCLK_DECON_TV_ECLK_DISP
  38461. CLK_SCLK_DECON_TV_VCLK
  38462. CLK_SCLK_DECON_TV_VCLK_DISP
  38463. CLK_SCLK_DECON_VCLK
  38464. CLK_SCLK_DECON_VCLK_DISP
  38465. CLK_SCLK_DP
  38466. CLK_SCLK_DP1
  38467. CLK_SCLK_DSD
  38468. CLK_SCLK_DSD_DISP
  38469. CLK_SCLK_DSIM0
  38470. CLK_SCLK_DSIM0_DISP
  38471. CLK_SCLK_DSIM1
  38472. CLK_SCLK_DSIM1_DISP
  38473. CLK_SCLK_EBI
  38474. CLK_SCLK_EPLL
  38475. CLK_SCLK_FIMC0
  38476. CLK_SCLK_FIMC1
  38477. CLK_SCLK_FIMC2
  38478. CLK_SCLK_FIMC3
  38479. CLK_SCLK_FIMD0
  38480. CLK_SCLK_FIMD1
  38481. CLK_SCLK_FIMG2D
  38482. CLK_SCLK_FREQ_DET_ATLAS_PLL
  38483. CLK_SCLK_FREQ_DET_BUS_PLL
  38484. CLK_SCLK_FREQ_DET_DISP_PLL
  38485. CLK_SCLK_FREQ_DET_MEM0_PLL
  38486. CLK_SCLK_FREQ_DET_MEM1_PLL
  38487. CLK_SCLK_FREQ_DET_MFC_PLL
  38488. CLK_SCLK_G3D
  38489. CLK_SCLK_GSCALER0
  38490. CLK_SCLK_GSCALER1
  38491. CLK_SCLK_GSCL_WA
  38492. CLK_SCLK_GSCL_WB
  38493. CLK_SCLK_HDMI
  38494. CLK_SCLK_HDMIPHY
  38495. CLK_SCLK_HDMI_SPDIF
  38496. CLK_SCLK_HDMI_SPDIF_DISP
  38497. CLK_SCLK_HPM_APOLLO
  38498. CLK_SCLK_HPM_ATLAS
  38499. CLK_SCLK_HPM_G3D
  38500. CLK_SCLK_HPM_MIF
  38501. CLK_SCLK_HSIC_12M
  38502. CLK_SCLK_I2S
  38503. CLK_SCLK_I2S1
  38504. CLK_SCLK_I2S1_PERIC
  38505. CLK_SCLK_I2S2
  38506. CLK_SCLK_I2S_BCLK
  38507. CLK_SCLK_IOCLK_I2S1_BCLK
  38508. CLK_SCLK_IOCLK_SPI0
  38509. CLK_SCLK_IOCLK_SPI1
  38510. CLK_SCLK_IOCLK_SPI2
  38511. CLK_SCLK_IOCLK_SPI3
  38512. CLK_SCLK_IOCLK_SPI4
  38513. CLK_SCLK_ISP_CA5
  38514. CLK_SCLK_ISP_I2C0
  38515. CLK_SCLK_ISP_I2C1
  38516. CLK_SCLK_ISP_I2C2
  38517. CLK_SCLK_ISP_MCTADC
  38518. CLK_SCLK_ISP_MCTADC_CAM1
  38519. CLK_SCLK_ISP_MPWM
  38520. CLK_SCLK_ISP_PWM
  38521. CLK_SCLK_ISP_SENSOR0
  38522. CLK_SCLK_ISP_SENSOR1
  38523. CLK_SCLK_ISP_SENSOR2
  38524. CLK_SCLK_ISP_SPI0
  38525. CLK_SCLK_ISP_SPI0_CAM1
  38526. CLK_SCLK_ISP_SPI1
  38527. CLK_SCLK_ISP_SPI1_CAM1
  38528. CLK_SCLK_ISP_UART
  38529. CLK_SCLK_ISP_UART_CAM1
  38530. CLK_SCLK_JPEG
  38531. CLK_SCLK_JPEG_MSCL
  38532. CLK_SCLK_JTAG_TCK
  38533. CLK_SCLK_LITE_C_FREECNT
  38534. CLK_SCLK_LITE_FREECNT
  38535. CLK_SCLK_M2MSCALER
  38536. CLK_SCLK_MAUDIO0
  38537. CLK_SCLK_MAUPCM0
  38538. CLK_SCLK_MDNIE0
  38539. CLK_SCLK_MDNIE_PWM0
  38540. CLK_SCLK_MFC
  38541. CLK_SCLK_MFC_PLL
  38542. CLK_SCLK_MIPI0
  38543. CLK_SCLK_MIPI1
  38544. CLK_SCLK_MIPIDPHY2L
  38545. CLK_SCLK_MIPIHSI
  38546. CLK_SCLK_MIXER
  38547. CLK_SCLK_MMC0
  38548. CLK_SCLK_MMC0_FSYS
  38549. CLK_SCLK_MMC1
  38550. CLK_SCLK_MMC1_FSYS
  38551. CLK_SCLK_MMC2
  38552. CLK_SCLK_MMC2_FSYS
  38553. CLK_SCLK_MMC3
  38554. CLK_SCLK_MMC4
  38555. CLK_SCLK_MPHY
  38556. CLK_SCLK_MPHY_IXTAL24
  38557. CLK_SCLK_MPHY_PLL
  38558. CLK_SCLK_MPLL
  38559. CLK_SCLK_MPWM_ISP
  38560. CLK_SCLK_OTP_CON
  38561. CLK_SCLK_PCIE_100
  38562. CLK_SCLK_PCIE_100_FSYS
  38563. CLK_SCLK_PCM
  38564. CLK_SCLK_PCM0
  38565. CLK_SCLK_PCM1
  38566. CLK_SCLK_PCM1_PERIC
  38567. CLK_SCLK_PCM2
  38568. CLK_SCLK_PHY_FSYS1
  38569. CLK_SCLK_PHY_FSYS1_26M
  38570. CLK_SCLK_PIXEL
  38571. CLK_SCLK_PIXELASYNCM_3AA0
  38572. CLK_SCLK_PIXELASYNCM_3AA1
  38573. CLK_SCLK_PIXELASYNCM_DIS
  38574. CLK_SCLK_PIXELASYNCM_FD
  38575. CLK_SCLK_PIXELASYNCM_ISPC
  38576. CLK_SCLK_PIXELASYNCM_ISPD
  38577. CLK_SCLK_PIXELASYNCM_LITE_C
  38578. CLK_SCLK_PIXELASYNCM_LITE_C_INIT
  38579. CLK_SCLK_PIXELASYNCS_3AA0
  38580. CLK_SCLK_PIXELASYNCS_DIS
  38581. CLK_SCLK_PIXELASYNCS_ISPC
  38582. CLK_SCLK_PIXELASYNCS_LITE_C_INIT
  38583. CLK_SCLK_PIXELASYNCS_SCALERP
  38584. CLK_SCLK_PWM
  38585. CLK_SCLK_PWM_ISP
  38586. CLK_SCLK_RGB_TV_VCLK
  38587. CLK_SCLK_RGB_TV_VCLK_TO_DSIM1
  38588. CLK_SCLK_RGB_TV_VCLK_TO_MIC1
  38589. CLK_SCLK_RGB_VCLK
  38590. CLK_SCLK_RGB_VCLK_TO_DSIM0
  38591. CLK_SCLK_RGB_VCLK_TO_MIC0
  38592. CLK_SCLK_RGB_VCLK_TO_SMIES
  38593. CLK_SCLK_SATA
  38594. CLK_SCLK_SCI
  38595. CLK_SCLK_SC_IN
  38596. CLK_SCLK_SECKEY
  38597. CLK_SCLK_SLIMBUS
  38598. CLK_SCLK_SLIMBUS_CLKIN
  38599. CLK_SCLK_SPDIF
  38600. CLK_SCLK_SPDIF_PERIC
  38601. CLK_SCLK_SPI0
  38602. CLK_SCLK_SPI0_ISP
  38603. CLK_SCLK_SPI0_PERIC
  38604. CLK_SCLK_SPI1
  38605. CLK_SCLK_SPI1_ISP
  38606. CLK_SCLK_SPI1_PERIC
  38607. CLK_SCLK_SPI2
  38608. CLK_SCLK_SPI2_PERIC
  38609. CLK_SCLK_SPI3
  38610. CLK_SCLK_SPI3_PERIC
  38611. CLK_SCLK_SPI4
  38612. CLK_SCLK_SPI4_PERIC
  38613. CLK_SCLK_TMU0
  38614. CLK_SCLK_TMU1
  38615. CLK_SCLK_TOPRTC
  38616. CLK_SCLK_TSADC
  38617. CLK_SCLK_UART0
  38618. CLK_SCLK_UART0_PERIC
  38619. CLK_SCLK_UART1
  38620. CLK_SCLK_UART1_PERIC
  38621. CLK_SCLK_UART2
  38622. CLK_SCLK_UART2_PERIC
  38623. CLK_SCLK_UART3
  38624. CLK_SCLK_UART4
  38625. CLK_SCLK_UART_ISP
  38626. CLK_SCLK_UFSUNIPRO
  38627. CLK_SCLK_UFSUNIPRO20
  38628. CLK_SCLK_UFSUNIPRO_FSYS
  38629. CLK_SCLK_UFS_MPHY
  38630. CLK_SCLK_UNIPRO
  38631. CLK_SCLK_UPLL
  38632. CLK_SCLK_USB3
  38633. CLK_SCLK_USBD300
  38634. CLK_SCLK_USBD301
  38635. CLK_SCLK_USBDRD30
  38636. CLK_SCLK_USBDRD30_FSYS
  38637. CLK_SCLK_USBHOST30
  38638. CLK_SCLK_USBHOST30_FSYS
  38639. CLK_SCLK_USBPHY300
  38640. CLK_SCLK_USBPHY301
  38641. CLK_SCLK_VPLL
  38642. CLK_SD
  38643. CLK_SD0
  38644. CLK_SD1
  38645. CLK_SD2
  38646. CLK_SD3
  38647. CLK_SDDAC
  38648. CLK_SDIO
  38649. CLK_SDIO0_1X
  38650. CLK_SDIO0_2X
  38651. CLK_SDIO0_2X_EN
  38652. CLK_SDIO0_EB
  38653. CLK_SDIO1_1X
  38654. CLK_SDIO1_2X
  38655. CLK_SDIO1_2X_EN
  38656. CLK_SDIO1_EB
  38657. CLK_SDIO2_1X
  38658. CLK_SDIO2_2X
  38659. CLK_SDIO2_2X_EN
  38660. CLK_SDIO2_EB
  38661. CLK_SDM
  38662. CLK_SDMMC0
  38663. CLK_SDMMC1
  38664. CLK_SDMMC2
  38665. CLK_SDMMC3
  38666. CLK_SDMMC4
  38667. CLK_SDONLY
  38668. CLK_SDRAM
  38669. CLK_SDRAM0
  38670. CLK_SDRAM1
  38671. CLK_SDSRC
  38672. CLK_SD_HOST
  38673. CLK_SD_HOST_DIV
  38674. CLK_SD_HOST_MUX
  38675. CLK_SECKEY
  38676. CLK_SECSS
  38677. CLK_SEL
  38678. CLK_SELECT_NAND
  38679. CLK_SEL_MSK
  38680. CLK_SENOR_SRC
  38681. CLK_SENSOR
  38682. CLK_SENSOR0
  38683. CLK_SENSOR0_GATE
  38684. CLK_SENSOR1
  38685. CLK_SENSOR1_GATE
  38686. CLK_SENSOR2
  38687. CLK_SENSOR2_GATE
  38688. CLK_SET_PARENT_GATE
  38689. CLK_SET_RATE_GATE
  38690. CLK_SET_RATE_NO_REPARENT
  38691. CLK_SET_RATE_PARENT
  38692. CLK_SET_RATE_UNGATE
  38693. CLK_SET_REGOFFSET
  38694. CLK_SF
  38695. CLK_SGMII_CDR_FB
  38696. CLK_SGMII_CDR_REF
  38697. CLK_SGMII_NR_CLK
  38698. CLK_SGMII_RX250M_EN
  38699. CLK_SGMII_RX_EN
  38700. CLK_SGMII_TX250M_EN
  38701. CLK_SGMII_TX_EN
  38702. CLK_SI
  38703. CLK_SIM0_EB
  38704. CLK_SLIMBUS
  38705. CLK_SLIM_SSS
  38706. CLK_SLOT
  38707. CLK_SLOWCLKEN
  38708. CLK_SLOWCLKOUT
  38709. CLK_SMC
  38710. CLK_SMIES
  38711. CLK_SMMUFIMD0
  38712. CLK_SMMUG3D
  38713. CLK_SMMUGSCALER0
  38714. CLK_SMMUGSCALER1
  38715. CLK_SMMUJPEG
  38716. CLK_SMMUM2M2SCALER
  38717. CLK_SMMUMFC_L
  38718. CLK_SMMU_2D
  38719. CLK_SMMU_3AA
  38720. CLK_SMMU_DRC
  38721. CLK_SMMU_FD
  38722. CLK_SMMU_FIMC0
  38723. CLK_SMMU_FIMC1
  38724. CLK_SMMU_FIMC2
  38725. CLK_SMMU_FIMC3
  38726. CLK_SMMU_FIMCL0
  38727. CLK_SMMU_FIMCL1
  38728. CLK_SMMU_FIMCL3
  38729. CLK_SMMU_FIMC_3DNR
  38730. CLK_SMMU_FIMC_DIS0
  38731. CLK_SMMU_FIMC_DIS1
  38732. CLK_SMMU_FIMC_DRC
  38733. CLK_SMMU_FIMC_FD
  38734. CLK_SMMU_FIMC_ISP
  38735. CLK_SMMU_FIMC_LITE0
  38736. CLK_SMMU_FIMC_LITE1
  38737. CLK_SMMU_FIMC_MCU
  38738. CLK_SMMU_FIMC_ODC
  38739. CLK_SMMU_FIMC_SCC
  38740. CLK_SMMU_FIMC_SCP
  38741. CLK_SMMU_FIMD0
  38742. CLK_SMMU_FIMD1
  38743. CLK_SMMU_FIMD1M0
  38744. CLK_SMMU_FIMD1M1
  38745. CLK_SMMU_G2D
  38746. CLK_SMMU_GPS
  38747. CLK_SMMU_GSCL0
  38748. CLK_SMMU_GSCL1
  38749. CLK_SMMU_GSCL2
  38750. CLK_SMMU_GSCL3
  38751. CLK_SMMU_ISP
  38752. CLK_SMMU_ISPCX
  38753. CLK_SMMU_JPEG
  38754. CLK_SMMU_JPEG2
  38755. CLK_SMMU_LITE0
  38756. CLK_SMMU_LITE1
  38757. CLK_SMMU_MDMA
  38758. CLK_SMMU_MDMA0
  38759. CLK_SMMU_MDMA1
  38760. CLK_SMMU_MFCL
  38761. CLK_SMMU_MFCR
  38762. CLK_SMMU_MIXER
  38763. CLK_SMMU_MSCL0
  38764. CLK_SMMU_MSCL1
  38765. CLK_SMMU_MSCL2
  38766. CLK_SMMU_PCIE
  38767. CLK_SMMU_ROTATOR
  38768. CLK_SMMU_SCALERC
  38769. CLK_SMMU_SCALERP
  38770. CLK_SMMU_TV
  38771. CLK_SMNCLK
  38772. CLK_SOCCLK
  38773. CLK_SOURCE_2D
  38774. CLK_SOURCE_3D
  38775. CLK_SOURCE_3D2
  38776. CLK_SOURCE_ACTMON
  38777. CLK_SOURCE_ADX
  38778. CLK_SOURCE_ADX1
  38779. CLK_SOURCE_AMX
  38780. CLK_SOURCE_AMX1
  38781. CLK_SOURCE_APE
  38782. CLK_SOURCE_CILAB
  38783. CLK_SOURCE_CILCD
  38784. CLK_SOURCE_CILE
  38785. CLK_SOURCE_CLK72MHZ
  38786. CLK_SOURCE_CSITE
  38787. CLK_SOURCE_CVE
  38788. CLK_SOURCE_DAM0
  38789. CLK_SOURCE_DAM1
  38790. CLK_SOURCE_DAM2
  38791. CLK_SOURCE_DBGAPB
  38792. CLK_SOURCE_DFLL_REF
  38793. CLK_SOURCE_DFLL_SOC
  38794. CLK_SOURCE_DISP1
  38795. CLK_SOURCE_DISP2
  38796. CLK_SOURCE_DMIC1
  38797. CLK_SOURCE_DMIC2
  38798. CLK_SOURCE_DMIC3
  38799. CLK_SOURCE_DPAUX
  38800. CLK_SOURCE_DSIALP
  38801. CLK_SOURCE_DSIB
  38802. CLK_SOURCE_DSIBLP
  38803. CLK_SOURCE_DVC
  38804. CLK_SOURCE_D_AUDIO
  38805. CLK_SOURCE_EMC
  38806. CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR
  38807. CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_MASK
  38808. CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_SHIFT
  38809. CLK_SOURCE_EMC_EMC_2X_CLK_SRC
  38810. CLK_SOURCE_EMC_EMC_2X_CLK_SRC_MASK
  38811. CLK_SOURCE_EMC_EMC_2X_CLK_SRC_SHIFT
  38812. CLK_SOURCE_ENTROPY
  38813. CLK_SOURCE_EPP
  38814. CLK_SOURCE_EXTERN1
  38815. CLK_SOURCE_EXTERN2
  38816. CLK_SOURCE_EXTERN3
  38817. CLK_SOURCE_HDA
  38818. CLK_SOURCE_HDA2CODEC_2X
  38819. CLK_SOURCE_HDMI
  38820. CLK_SOURCE_HDMI_AUDIO
  38821. CLK_SOURCE_HOST1X
  38822. CLK_SOURCE_I2C1
  38823. CLK_SOURCE_I2C2
  38824. CLK_SOURCE_I2C3
  38825. CLK_SOURCE_I2C4
  38826. CLK_SOURCE_I2C5
  38827. CLK_SOURCE_I2C6
  38828. CLK_SOURCE_I2CSLOW
  38829. CLK_SOURCE_I2S0
  38830. CLK_SOURCE_I2S1
  38831. CLK_SOURCE_I2S2
  38832. CLK_SOURCE_I2S3
  38833. CLK_SOURCE_I2S4
  38834. CLK_SOURCE_IDE
  38835. CLK_SOURCE_ISP
  38836. CLK_SOURCE_LA
  38837. CLK_SOURCE_MAUD
  38838. CLK_SOURCE_MIPI
  38839. CLK_SOURCE_MIPIBIF
  38840. CLK_SOURCE_MPE
  38841. CLK_SOURCE_MSELECT
  38842. CLK_SOURCE_MSENC
  38843. CLK_SOURCE_NDFLASH
  38844. CLK_SOURCE_NDSPEED
  38845. CLK_SOURCE_NOR
  38846. CLK_SOURCE_NVDEC
  38847. CLK_SOURCE_NVENC
  38848. CLK_SOURCE_NVJPG
  38849. CLK_SOURCE_OWR
  38850. CLK_SOURCE_PWM
  38851. CLK_SOURCE_QSPI
  38852. CLK_SOURCE_SATA
  38853. CLK_SOURCE_SATA_OOB
  38854. CLK_SOURCE_SBC1
  38855. CLK_SOURCE_SBC2
  38856. CLK_SOURCE_SBC3
  38857. CLK_SOURCE_SBC4
  38858. CLK_SOURCE_SBC5
  38859. CLK_SOURCE_SBC6
  38860. CLK_SOURCE_SDMMC1
  38861. CLK_SOURCE_SDMMC2
  38862. CLK_SOURCE_SDMMC3
  38863. CLK_SOURCE_SDMMC4
  38864. CLK_SOURCE_SDMMC_LEGACY
  38865. CLK_SOURCE_SE
  38866. CLK_SOURCE_SOC_THERM
  38867. CLK_SOURCE_SOR0
  38868. CLK_SOURCE_SOR1
  38869. CLK_SOURCE_SPDIF_IN
  38870. CLK_SOURCE_SPDIF_OUT
  38871. CLK_SOURCE_SPI
  38872. CLK_SOURCE_TRACE
  38873. CLK_SOURCE_TSEC
  38874. CLK_SOURCE_TSECB
  38875. CLK_SOURCE_TSENSOR
  38876. CLK_SOURCE_TVDAC
  38877. CLK_SOURCE_TVO
  38878. CLK_SOURCE_TWC
  38879. CLK_SOURCE_UARTA
  38880. CLK_SOURCE_UARTAPE
  38881. CLK_SOURCE_UARTB
  38882. CLK_SOURCE_UARTC
  38883. CLK_SOURCE_UARTD
  38884. CLK_SOURCE_UARTE
  38885. CLK_SOURCE_USB2_HSIC_TRK
  38886. CLK_SOURCE_VDE
  38887. CLK_SOURCE_VFIR
  38888. CLK_SOURCE_VI
  38889. CLK_SOURCE_VIC03
  38890. CLK_SOURCE_VI_I2C
  38891. CLK_SOURCE_VI_SENSOR
  38892. CLK_SOURCE_VI_SENSOR2
  38893. CLK_SOURCE_XIO
  38894. CLK_SOURCE_XUSB_DEV_SRC
  38895. CLK_SOURCE_XUSB_FALCON_SRC
  38896. CLK_SOURCE_XUSB_FS_SRC
  38897. CLK_SOURCE_XUSB_HOST_SRC
  38898. CLK_SOURCE_XUSB_SS_SRC
  38899. CLK_SPARE_AXI_GATE
  38900. CLK_SPDIF
  38901. CLK_SPDIF0
  38902. CLK_SPDIF1
  38903. CLK_SPDIFF
  38904. CLK_SPDIF_DIV
  38905. CLK_SPEED_SENSOR
  38906. CLK_SPEED_SHIFT
  38907. CLK_SPI
  38908. CLK_SPI0
  38909. CLK_SPI0_DIV
  38910. CLK_SPI0_EB
  38911. CLK_SPI0_INTERNAL_DIV
  38912. CLK_SPI0_ISP
  38913. CLK_SPI0_ISP_SCLK
  38914. CLK_SPI0_ISP_TOP
  38915. CLK_SPI1
  38916. CLK_SPI1_DIV
  38917. CLK_SPI1_EB
  38918. CLK_SPI1_INTERNAL_DIV
  38919. CLK_SPI1_ISP
  38920. CLK_SPI1_ISP_SCLK
  38921. CLK_SPI1_ISP_TOP
  38922. CLK_SPI2
  38923. CLK_SPI2_EB
  38924. CLK_SPI3
  38925. CLK_SPI3_EB
  38926. CLK_SPIFI
  38927. CLK_SPI_BDIV_MASK
  38928. CLK_SPI_BDIV_OFFSET
  38929. CLK_SPI_CDIV_MASK
  38930. CLK_SPI_CDIV_OFFSET
  38931. CLK_SPI_DISABLE_OFFSET
  38932. CLK_SPLK_EB
  38933. CLK_SP_AHB
  38934. CLK_SRC
  38935. CLK_SRC0
  38936. CLK_SRC1
  38937. CLK_SRC2
  38938. CLK_SRC3
  38939. CLK_SRC4
  38940. CLK_SRC5
  38941. CLK_SRC6
  38942. CLK_SRC_ENET_RX_CLK
  38943. CLK_SRC_ENET_TX_CLK
  38944. CLK_SRC_GP_CLKIN
  38945. CLK_SRC_IDIVA
  38946. CLK_SRC_IDIVB
  38947. CLK_SRC_IDIVC
  38948. CLK_SRC_IDIVD
  38949. CLK_SRC_IDIVE
  38950. CLK_SRC_IRC
  38951. CLK_SRC_MASK
  38952. CLK_SRC_MASK0
  38953. CLK_SRC_MASK1
  38954. CLK_SRC_MAX
  38955. CLK_SRC_OSC
  38956. CLK_SRC_OSC32
  38957. CLK_SRC_PER_MASK
  38958. CLK_SRC_PER_SHIFT
  38959. CLK_SRC_PLL
  38960. CLK_SRC_PLL0AUDIO
  38961. CLK_SRC_PLL0USB
  38962. CLK_SRC_PLL1
  38963. CLK_SRC_RESERVED1
  38964. CLK_SRC_RESERVED2
  38965. CLK_SRC_RESERVED3
  38966. CLK_SRC_SHIFT
  38967. CLK_SRC_XTAL
  38968. CLK_SRI
  38969. CLK_SROMC
  38970. CLK_SS
  38971. CLK_SSP
  38972. CLK_SSP1
  38973. CLK_SSP2
  38974. CLK_SSP3
  38975. CLK_SSP4
  38976. CLK_SSPSRC
  38977. CLK_SSS
  38978. CLK_SSUSB_DMA_EN
  38979. CLK_SSUSB_MCU_EN
  38980. CLK_SSUSB_NR_CLK
  38981. CLK_SSUSB_REF_EN
  38982. CLK_SSUSB_SYS_EN
  38983. CLK_SSUSB_U2_PHY_1P_EN
  38984. CLK_SSUSB_U2_PHY_EN
  38985. CLK_SS_MODE
  38986. CLK_ST231_AUD_0
  38987. CLK_ST231_DMU
  38988. CLK_ST231_GP_0
  38989. CLK_ST231_GP_1
  38990. CLK_STABLE
  38991. CLK_START_VALUE_REGISTER
  38992. CLK_STATUS3
  38993. CLK_STATUS4
  38994. CLK_STATUS5
  38995. CLK_STATUS7
  38996. CLK_STAT_REGOFFSET
  38997. CLK_STFE_FRC1
  38998. CLK_STFE_FRC2
  38999. CLK_STG1703
  39000. CLK_STOPCTRL
  39001. CLK_STUART
  39002. CLK_SUP_PCLK
  39003. CLK_SYSCLK
  39004. CLK_SYSCON
  39005. CLK_SYSREG
  39006. CLK_SYSTEM_RATE
  39007. CLK_SYSTIMER
  39008. CLK_SYS_INTERNAL_DIV
  39009. CLK_SYS_PLL
  39010. CLK_SYS_PLL_MUX
  39011. CLK_S_MASK
  39012. CLK_S_SHIFT
  39013. CLK_TCON
  39014. CLK_TCON0
  39015. CLK_TCON0_CH0
  39016. CLK_TCON0_CH1
  39017. CLK_TCON0_CH1_SCLK2
  39018. CLK_TCON1
  39019. CLK_TCON1_CH0
  39020. CLK_TCON1_CH1
  39021. CLK_TCON1_CH1_SCLK2
  39022. CLK_TCON_CH0
  39023. CLK_TCON_CH1
  39024. CLK_TCON_CH1_SCLK
  39025. CLK_TCON_LCD0
  39026. CLK_TCON_LCD1
  39027. CLK_TCON_TOP_DSI
  39028. CLK_TCON_TOP_TV0
  39029. CLK_TCON_TOP_TV1
  39030. CLK_TCON_TV0
  39031. CLK_TCON_TV1
  39032. CLK_TDM
  39033. CLK_THERMAL_SENSOR
  39034. CLK_THM
  39035. CLK_THM_EB
  39036. CLK_THS
  39037. CLK_THS_PREPARE
  39038. CLK_THS_TRAIL
  39039. CLK_THS_ZERO
  39040. CLK_TIMER
  39041. CLK_TLPX
  39042. CLK_TMC_MTX_EB
  39043. CLK_TMDS_HDMI
  39044. CLK_TMDS_HDMI_DIV2
  39045. CLK_TML
  39046. CLK_TMU
  39047. CLK_TMU_APBIF
  39048. CLK_TMU_GPU
  39049. CLK_TOLERANCE_HZ
  39050. CLK_TOPOLOGY_FLAGS
  39051. CLK_TOPOLOGY_TYPE
  39052. CLK_TOPOLOGY_TYPE_FLAGS
  39053. CLK_TOP_10M_INFRAO
  39054. CLK_TOP_10M_SEL
  39055. CLK_TOP_133M_ETH
  39056. CLK_TOP_32K_EXTERNAL
  39057. CLK_TOP_32K_INTERNAL
  39058. CLK_TOP_4MHZ
  39059. CLK_TOP_66M_ETH
  39060. CLK_TOP_8BDAC
  39061. CLK_TOP_8BDAC_SEL
  39062. CLK_TOP_A1SYS_HP_DIV
  39063. CLK_TOP_A1SYS_HP_DIV_PD
  39064. CLK_TOP_A1SYS_HP_SEL
  39065. CLK_TOP_A2SYS_HP_DIV
  39066. CLK_TOP_A2SYS_HP_DIV_PD
  39067. CLK_TOP_A2SYS_HP_SEL
  39068. CLK_TOP_ADSP
  39069. CLK_TOP_ADSPPLL_CK
  39070. CLK_TOP_ADSPPLL_D4
  39071. CLK_TOP_ADSPPLL_D5
  39072. CLK_TOP_ADSPPLL_D6
  39073. CLK_TOP_AD_OSC2_CK
  39074. CLK_TOP_AD_OSC_CK
  39075. CLK_TOP_AES
  39076. CLK_TOP_AHB_INFRA_D2
  39077. CLK_TOP_AHB_INFRA_SEL
  39078. CLK_TOP_AP2WBHIF_HCLK
  39079. CLK_TOP_AP2WBHIF_SEL
  39080. CLK_TOP_AP2WBMCU_SEL
  39081. CLK_TOP_APDMA
  39082. CLK_TOP_APLL
  39083. CLK_TOP_APLL1
  39084. CLK_TOP_APLL12_CK_DIV0
  39085. CLK_TOP_APLL12_CK_DIV1
  39086. CLK_TOP_APLL12_CK_DIV2
  39087. CLK_TOP_APLL12_CK_DIV3
  39088. CLK_TOP_APLL12_CK_DIV4
  39089. CLK_TOP_APLL12_CK_DIV4B
  39090. CLK_TOP_APLL12_CK_DIV5
  39091. CLK_TOP_APLL12_CK_DIV5B
  39092. CLK_TOP_APLL12_CK_DIV6
  39093. CLK_TOP_APLL12_DIV0
  39094. CLK_TOP_APLL12_DIV1
  39095. CLK_TOP_APLL12_DIV2
  39096. CLK_TOP_APLL12_DIV3
  39097. CLK_TOP_APLL12_DIV4
  39098. CLK_TOP_APLL12_DIV4B
  39099. CLK_TOP_APLL12_DIV5
  39100. CLK_TOP_APLL12_DIV5B
  39101. CLK_TOP_APLL12_DIV6
  39102. CLK_TOP_APLL12_DIVB
  39103. CLK_TOP_APLL1_CK
  39104. CLK_TOP_APLL1_D16
  39105. CLK_TOP_APLL1_D2
  39106. CLK_TOP_APLL1_D3
  39107. CLK_TOP_APLL1_D4
  39108. CLK_TOP_APLL1_D8
  39109. CLK_TOP_APLL1_DIV
  39110. CLK_TOP_APLL1_DIV0
  39111. CLK_TOP_APLL1_DIV1
  39112. CLK_TOP_APLL1_DIV2
  39113. CLK_TOP_APLL1_DIV3
  39114. CLK_TOP_APLL1_DIV4
  39115. CLK_TOP_APLL1_DIV5
  39116. CLK_TOP_APLL1_DIV_PD
  39117. CLK_TOP_APLL1_REF_SEL
  39118. CLK_TOP_APLL1_SEL
  39119. CLK_TOP_APLL2
  39120. CLK_TOP_APLL2_CK
  39121. CLK_TOP_APLL2_D16
  39122. CLK_TOP_APLL2_D2
  39123. CLK_TOP_APLL2_D3
  39124. CLK_TOP_APLL2_D4
  39125. CLK_TOP_APLL2_D8
  39126. CLK_TOP_APLL2_DIV
  39127. CLK_TOP_APLL2_DIV0
  39128. CLK_TOP_APLL2_DIV1
  39129. CLK_TOP_APLL2_DIV2
  39130. CLK_TOP_APLL2_DIV3
  39131. CLK_TOP_APLL2_DIV4
  39132. CLK_TOP_APLL2_DIV5
  39133. CLK_TOP_APLL2_DIV_PD
  39134. CLK_TOP_APLL2_REF_SEL
  39135. CLK_TOP_APLL2_SEL
  39136. CLK_TOP_APLL_D16
  39137. CLK_TOP_APLL_D24
  39138. CLK_TOP_APLL_D4
  39139. CLK_TOP_APLL_D8
  39140. CLK_TOP_APLL_DIV0
  39141. CLK_TOP_APLL_DIV1
  39142. CLK_TOP_APLL_DIV2
  39143. CLK_TOP_APLL_DIV3
  39144. CLK_TOP_APLL_DIV4
  39145. CLK_TOP_APLL_DIV5
  39146. CLK_TOP_APLL_DIV6
  39147. CLK_TOP_APLL_DIV7
  39148. CLK_TOP_APLL_DIV_PDN0
  39149. CLK_TOP_APLL_DIV_PDN1
  39150. CLK_TOP_APLL_DIV_PDN2
  39151. CLK_TOP_APLL_DIV_PDN3
  39152. CLK_TOP_APLL_DIV_PDN4
  39153. CLK_TOP_APLL_DIV_PDN5
  39154. CLK_TOP_APLL_DIV_PDN6
  39155. CLK_TOP_APLL_DIV_PDN7
  39156. CLK_TOP_APLL_SEL
  39157. CLK_TOP_APXGPT
  39158. CLK_TOP_ARMCA35PLL
  39159. CLK_TOP_ARMCA35PLL_400M
  39160. CLK_TOP_ARMCA35PLL_600M
  39161. CLK_TOP_ARMCA72PLL
  39162. CLK_TOP_ARMCA7PLL_502M
  39163. CLK_TOP_ARMCA7PLL_754M
  39164. CLK_TOP_ARMCA7PLL_D2
  39165. CLK_TOP_ARMCA7PLL_D3
  39166. CLK_TOP_ARMPLL_1P3G
  39167. CLK_TOP_ARMPLL_DIV_PLL1
  39168. CLK_TOP_ARMPLL_DIV_PLL2
  39169. CLK_TOP_ASM_H_SEL
  39170. CLK_TOP_ASM_I_SEL
  39171. CLK_TOP_ASM_L_SEL
  39172. CLK_TOP_ASM_M_SEL
  39173. CLK_TOP_ATB
  39174. CLK_TOP_ATB_SEL
  39175. CLK_TOP_AUD
  39176. CLK_TOP_AUD1PLL
  39177. CLK_TOP_AUD1PLL_98M
  39178. CLK_TOP_AUD1_SEL
  39179. CLK_TOP_AUD2DVD_SEL
  39180. CLK_TOP_AUD2PLL
  39181. CLK_TOP_AUD2PLL_90M
  39182. CLK_TOP_AUD2_SEL
  39183. CLK_TOP_AUDINTBUS_SEL
  39184. CLK_TOP_AUDIO
  39185. CLK_TOP_AUDIO_SEL
  39186. CLK_TOP_AUDPLL
  39187. CLK_TOP_AUDPLL_D16
  39188. CLK_TOP_AUDPLL_D24
  39189. CLK_TOP_AUDPLL_D4
  39190. CLK_TOP_AUDPLL_D8
  39191. CLK_TOP_AUDPLL_MUX_SEL
  39192. CLK_TOP_AUD_1
  39193. CLK_TOP_AUD_1_SEL
  39194. CLK_TOP_AUD_2
  39195. CLK_TOP_AUD_2_SEL
  39196. CLK_TOP_AUD_44K_TIMING
  39197. CLK_TOP_AUD_48K_TIMING
  39198. CLK_TOP_AUD_APLL1_SEL
  39199. CLK_TOP_AUD_APLL2_SEL
  39200. CLK_TOP_AUD_ENG1
  39201. CLK_TOP_AUD_ENG2
  39202. CLK_TOP_AUD_ENGEN1_SEL
  39203. CLK_TOP_AUD_ENGEN2_SEL
  39204. CLK_TOP_AUD_EXT1
  39205. CLK_TOP_AUD_EXT2
  39206. CLK_TOP_AUD_EXTCK1_DIV
  39207. CLK_TOP_AUD_EXTCK2_DIV
  39208. CLK_TOP_AUD_H
  39209. CLK_TOP_AUD_I2S0_M_SEL
  39210. CLK_TOP_AUD_I2S1_MCLK
  39211. CLK_TOP_AUD_I2S1_M_SEL
  39212. CLK_TOP_AUD_I2S2_MCK
  39213. CLK_TOP_AUD_I2S2_MCLK
  39214. CLK_TOP_AUD_I2S2_M_SEL
  39215. CLK_TOP_AUD_I2S3_MCLK
  39216. CLK_TOP_AUD_I2S3_M_SEL
  39217. CLK_TOP_AUD_I2S4_MCLK
  39218. CLK_TOP_AUD_I2S4_M_SEL
  39219. CLK_TOP_AUD_I2S5_MCLK
  39220. CLK_TOP_AUD_I2S5_M_SEL
  39221. CLK_TOP_AUD_I2S6_MCLK
  39222. CLK_TOP_AUD_INTBUS
  39223. CLK_TOP_AUD_INTBUS_SEL
  39224. CLK_TOP_AUD_K1_SRC_DIV
  39225. CLK_TOP_AUD_K1_SRC_SEL
  39226. CLK_TOP_AUD_K2_SRC_DIV
  39227. CLK_TOP_AUD_K2_SRC_SEL
  39228. CLK_TOP_AUD_K3_SRC_DIV
  39229. CLK_TOP_AUD_K3_SRC_SEL
  39230. CLK_TOP_AUD_K4_SRC_DIV
  39231. CLK_TOP_AUD_K4_SRC_SEL
  39232. CLK_TOP_AUD_K5_SRC_DIV
  39233. CLK_TOP_AUD_K5_SRC_SEL
  39234. CLK_TOP_AUD_K6_SRC_DIV
  39235. CLK_TOP_AUD_K6_SRC_SEL
  39236. CLK_TOP_AUD_MUX1_DIV
  39237. CLK_TOP_AUD_MUX1_SEL
  39238. CLK_TOP_AUD_MUX2_DIV
  39239. CLK_TOP_AUD_MUX2_SEL
  39240. CLK_TOP_AUD_SPDIFIN_SEL
  39241. CLK_TOP_AUD_SPDIF_B_SEL
  39242. CLK_TOP_AUXADC1
  39243. CLK_TOP_AUXADC2
  39244. CLK_TOP_AUX_ADC
  39245. CLK_TOP_AUX_TP
  39246. CLK_TOP_AXI
  39247. CLK_TOP_AXISEL_D4
  39248. CLK_TOP_AXI_MFG_IN_AS_SEL
  39249. CLK_TOP_AXI_MFG_IN_SEL
  39250. CLK_TOP_AXI_SEL
  39251. CLK_TOP_BSI
  39252. CLK_TOP_BSI_SEL
  39253. CLK_TOP_BTIF
  39254. CLK_TOP_CAM
  39255. CLK_TOP_CAM2TG_SEL
  39256. CLK_TOP_CAMTG
  39257. CLK_TOP_CAMTG2
  39258. CLK_TOP_CAMTG3
  39259. CLK_TOP_CAMTG4
  39260. CLK_TOP_CAMTG5
  39261. CLK_TOP_CAMTG_SEL
  39262. CLK_TOP_CAMTM
  39263. CLK_TOP_CAM_SEL
  39264. CLK_TOP_CCI400_SEL
  39265. CLK_TOP_CCI_SEL
  39266. CLK_TOP_CCU
  39267. CLK_TOP_CLK13M
  39268. CLK_TOP_CLK26M
  39269. CLK_TOP_CLK26M_D2
  39270. CLK_TOP_CLK26M_D8
  39271. CLK_TOP_CLKPH_MCK
  39272. CLK_TOP_CLKPH_MCK_O
  39273. CLK_TOP_CLKRTC_EXT
  39274. CLK_TOP_CLKRTC_INT
  39275. CLK_TOP_CLKXTAL_D4
  39276. CLK_TOP_CLK_NULL
  39277. CLK_TOP_CMSYS_SEL
  39278. CLK_TOP_CODECPLL_CK
  39279. CLK_TOP_CODECPLL_D2
  39280. CLK_TOP_CPUM_TCK_IN
  39281. CLK_TOP_CRYPTO_SEL
  39282. CLK_TOP_CSI0
  39283. CLK_TOP_CSW_NFIECC_SEL
  39284. CLK_TOP_CVBS
  39285. CLK_TOP_CVBSPLL
  39286. CLK_TOP_CVBS_D2
  39287. CLK_TOP_D2A_ULCLK_6P5M
  39288. CLK_TOP_DA_AUDULL_VTX_6P5M_SEL
  39289. CLK_TOP_DBG_ATCLK_SEL
  39290. CLK_TOP_DDRPHYCFG_SEL
  39291. CLK_TOP_DEBUGSYS
  39292. CLK_TOP_DISP_PWM
  39293. CLK_TOP_DISP_SEL
  39294. CLK_TOP_DI_SEL
  39295. CLK_TOP_DMPLL
  39296. CLK_TOP_DMPLL_D16
  39297. CLK_TOP_DMPLL_D2
  39298. CLK_TOP_DMPLL_D4
  39299. CLK_TOP_DMPLL_D8
  39300. CLK_TOP_DMPLL_X2
  39301. CLK_TOP_DPE
  39302. CLK_TOP_DPI
  39303. CLK_TOP_DPI0
  39304. CLK_TOP_DPI0_SEL
  39305. CLK_TOP_DPI1_SEL
  39306. CLK_TOP_DPILVDS1_SEL
  39307. CLK_TOP_DPILVDS_SEL
  39308. CLK_TOP_DPMAIF
  39309. CLK_TOP_DSI0_DIG
  39310. CLK_TOP_DSI0_LNTC
  39311. CLK_TOP_DSI0_LNTC_DSI
  39312. CLK_TOP_DSI0_LNTC_DSICLK
  39313. CLK_TOP_DSI1_DIG
  39314. CLK_TOP_DSI1_LNTC
  39315. CLK_TOP_DSP
  39316. CLK_TOP_DSP1
  39317. CLK_TOP_DSP2
  39318. CLK_TOP_DSP3
  39319. CLK_TOP_DXCC
  39320. CLK_TOP_EMI_DDRPHY_SEL
  39321. CLK_TOP_EMMC_HCLK_SEL
  39322. CLK_TOP_ETHERPLL_125M
  39323. CLK_TOP_ETHERPLL_50M
  39324. CLK_TOP_ETHER_125M_SEL
  39325. CLK_TOP_ETHER_50M_RMII_SEL
  39326. CLK_TOP_ETHER_50M_SEL
  39327. CLK_TOP_ETHIF_SEL
  39328. CLK_TOP_ETHPLL_500M
  39329. CLK_TOP_ETH_500M
  39330. CLK_TOP_ETH_D2
  39331. CLK_TOP_ETH_SEL
  39332. CLK_TOP_F10M_REF_SEL
  39333. CLK_TOP_F26M_CK_D2
  39334. CLK_TOP_F52M_MFG
  39335. CLK_TOP_FAES_UFSFDE
  39336. CLK_TOP_FAXI
  39337. CLK_TOP_FETH_25M
  39338. CLK_TOP_FETH_50M
  39339. CLK_TOP_FIX_SEL
  39340. CLK_TOP_FLASH
  39341. CLK_TOP_FLASHIF_26M
  39342. CLK_TOP_FLASHIF_AXI
  39343. CLK_TOP_FLASHIF_FREERUN
  39344. CLK_TOP_FLASH_SEL
  39345. CLK_TOP_FMEM_466M_CK
  39346. CLK_TOP_FPC
  39347. CLK_TOP_FPWRAP_ULPOSC
  39348. CLK_TOP_FROM_TOP_AHB
  39349. CLK_TOP_FROM_TOP_AXI
  39350. CLK_TOP_FUFS
  39351. CLK_TOP_F_BIG_PLL1
  39352. CLK_TOP_F_BIG_PLL2
  39353. CLK_TOP_F_BUS_PLL1
  39354. CLK_TOP_F_BUS_PLL2
  39355. CLK_TOP_F_FAUD_INTBUS
  39356. CLK_TOP_F_MP0_PLL1
  39357. CLK_TOP_F_MP0_PLL2
  39358. CLK_TOP_GCE
  39359. CLK_TOP_GCPU_SEL
  39360. CLK_TOP_HADDS2PLL_294M
  39361. CLK_TOP_HADDS2PLL_98M
  39362. CLK_TOP_HADDS2_FB
  39363. CLK_TOP_HDCP_24M_SEL
  39364. CLK_TOP_HDCP_SEL
  39365. CLK_TOP_HDMIPLL
  39366. CLK_TOP_HDMIPLL_D2
  39367. CLK_TOP_HDMIPLL_D3
  39368. CLK_TOP_HDMIPLL_SEL
  39369. CLK_TOP_HDMIRX26_24_SEL
  39370. CLK_TOP_HDMIRX_BIST_SEL
  39371. CLK_TOP_HDMITXPLL_D2
  39372. CLK_TOP_HDMITXPLL_D3
  39373. CLK_TOP_HDMITX_CLKDIG_CTS
  39374. CLK_TOP_HDMITX_CLKDIG_D2
  39375. CLK_TOP_HDMITX_CLKDIG_D3
  39376. CLK_TOP_HDMITX_DIG_CTS
  39377. CLK_TOP_HDMI_0_DEEP340M
  39378. CLK_TOP_HDMI_0_PIX340M
  39379. CLK_TOP_HDMI_0_PLL340M
  39380. CLK_TOP_HDMI_SCL_RX
  39381. CLK_TOP_HDMI_SEL
  39382. CLK_TOP_HD_FAXI
  39383. CLK_TOP_HIF_SEL
  39384. CLK_TOP_I2C
  39385. CLK_TOP_I2C0
  39386. CLK_TOP_I2C1
  39387. CLK_TOP_I2C2
  39388. CLK_TOP_I2C_SEL
  39389. CLK_TOP_I2S0_MCK_DIV
  39390. CLK_TOP_I2S0_MCK_DIV_PD
  39391. CLK_TOP_I2S0_MCK_SEL
  39392. CLK_TOP_I2S0_M_SEL
  39393. CLK_TOP_I2S1_MCK_DIV
  39394. CLK_TOP_I2S1_MCK_DIV_PD
  39395. CLK_TOP_I2S1_MCK_SEL
  39396. CLK_TOP_I2S1_M_SEL
  39397. CLK_TOP_I2S2_MCK_DIV
  39398. CLK_TOP_I2S2_MCK_DIV_PD
  39399. CLK_TOP_I2S2_MCK_SEL
  39400. CLK_TOP_I2S2_M_SEL
  39401. CLK_TOP_I2S3_B_SEL
  39402. CLK_TOP_I2S3_MCK_DIV
  39403. CLK_TOP_I2S3_MCK_DIV_PD
  39404. CLK_TOP_I2S3_MCK_SEL
  39405. CLK_TOP_I2S3_M_SEL
  39406. CLK_TOP_I2S4_M_SEL
  39407. CLK_TOP_I2S5_M_SEL
  39408. CLK_TOP_I2SI1_SEL
  39409. CLK_TOP_I2SI2_SEL
  39410. CLK_TOP_I2SI3_SEL
  39411. CLK_TOP_I2SO1_SEL
  39412. CLK_TOP_I2SO2_SEL
  39413. CLK_TOP_I2SO3_SEL
  39414. CLK_TOP_I2S_INFRA_BCK
  39415. CLK_TOP_IMG
  39416. CLK_TOP_IMGPLL_CK
  39417. CLK_TOP_IMGPLL_D2
  39418. CLK_TOP_IMGPLL_D4
  39419. CLK_TOP_INTDIR_SEL
  39420. CLK_TOP_IPE
  39421. CLK_TOP_IPU_IF
  39422. CLK_TOP_IRDA_SEL
  39423. CLK_TOP_IRRX_SEL
  39424. CLK_TOP_IRTX_SEL
  39425. CLK_TOP_JPGDEC_SEL
  39426. CLK_TOP_JPG_SEL
  39427. CLK_TOP_LTEPLL_FS26M
  39428. CLK_TOP_LVDSPLL
  39429. CLK_TOP_LVDSPLL2
  39430. CLK_TOP_LVDSPLL2_D2
  39431. CLK_TOP_LVDSPLL2_D4
  39432. CLK_TOP_LVDSPLL2_D8
  39433. CLK_TOP_LVDSPLL_D2
  39434. CLK_TOP_LVDSPLL_D4
  39435. CLK_TOP_LVDSPLL_D8
  39436. CLK_TOP_LVDSTX3_CLKDIG_CTS
  39437. CLK_TOP_LVDSTX_CLKDIG_CT
  39438. CLK_TOP_LVDSTX_CLKDIG_CTS
  39439. CLK_TOP_LVDS_CTS
  39440. CLK_TOP_LVDS_PXL
  39441. CLK_TOP_MAINPLL_230P3M
  39442. CLK_TOP_MAINPLL_322P4M
  39443. CLK_TOP_MAINPLL_537P3M
  39444. CLK_TOP_MAINPLL_806M
  39445. CLK_TOP_MAINPLL_CK
  39446. CLK_TOP_MAINPLL_D10
  39447. CLK_TOP_MAINPLL_D11
  39448. CLK_TOP_MAINPLL_D12
  39449. CLK_TOP_MAINPLL_D14
  39450. CLK_TOP_MAINPLL_D16
  39451. CLK_TOP_MAINPLL_D2
  39452. CLK_TOP_MAINPLL_D20
  39453. CLK_TOP_MAINPLL_D22
  39454. CLK_TOP_MAINPLL_D2_D16
  39455. CLK_TOP_MAINPLL_D2_D2
  39456. CLK_TOP_MAINPLL_D2_D4
  39457. CLK_TOP_MAINPLL_D2_D8
  39458. CLK_TOP_MAINPLL_D3
  39459. CLK_TOP_MAINPLL_D3_D2
  39460. CLK_TOP_MAINPLL_D3_D4
  39461. CLK_TOP_MAINPLL_D3_D8
  39462. CLK_TOP_MAINPLL_D4
  39463. CLK_TOP_MAINPLL_D40
  39464. CLK_TOP_MAINPLL_D5
  39465. CLK_TOP_MAINPLL_D5_D2
  39466. CLK_TOP_MAINPLL_D5_D4
  39467. CLK_TOP_MAINPLL_D6
  39468. CLK_TOP_MAINPLL_D7
  39469. CLK_TOP_MAINPLL_D7_D2
  39470. CLK_TOP_MAINPLL_D7_D4
  39471. CLK_TOP_MAINPLL_D8
  39472. CLK_TOP_MAIN_H156M
  39473. CLK_TOP_MAIN_H218P4M
  39474. CLK_TOP_MAIN_H364M
  39475. CLK_TOP_MAIN_H546M
  39476. CLK_TOP_MEMPLL
  39477. CLK_TOP_MEMPLL_MCK_D4
  39478. CLK_TOP_MEMSLP_DLYER
  39479. CLK_TOP_MEM_MFG_IN_AS_SEL
  39480. CLK_TOP_MEM_MFG_IN_SEL
  39481. CLK_TOP_MEM_SEL
  39482. CLK_TOP_MFG
  39483. CLK_TOP_MFGPLL_CK
  39484. CLK_TOP_MFGPLL_D2
  39485. CLK_TOP_MFG_SEL
  39486. CLK_TOP_MIPIPLL
  39487. CLK_TOP_MIPIPLL_D2
  39488. CLK_TOP_MIPIPLL_D4
  39489. CLK_TOP_MM
  39490. CLK_TOP_MMPLL
  39491. CLK_TOP_MMPLL380M
  39492. CLK_TOP_MMPLL_200M
  39493. CLK_TOP_MMPLL_CK
  39494. CLK_TOP_MMPLL_D2
  39495. CLK_TOP_MMPLL_D3
  39496. CLK_TOP_MMPLL_D4
  39497. CLK_TOP_MMPLL_D4_D2
  39498. CLK_TOP_MMPLL_D4_D4
  39499. CLK_TOP_MMPLL_D5
  39500. CLK_TOP_MMPLL_D5_D2
  39501. CLK_TOP_MMPLL_D5_D4
  39502. CLK_TOP_MMPLL_D6
  39503. CLK_TOP_MMPLL_D7
  39504. CLK_TOP_MM_SEL
  39505. CLK_TOP_MSDC0
  39506. CLK_TOP_MSDC0P_AES_SEL
  39507. CLK_TOP_MSDC0_INFRA
  39508. CLK_TOP_MSDC0_SEL
  39509. CLK_TOP_MSDC1
  39510. CLK_TOP_MSDC1_INFRA
  39511. CLK_TOP_MSDC1_SEL
  39512. CLK_TOP_MSDC2
  39513. CLK_TOP_MSDC2_INFRA
  39514. CLK_TOP_MSDC2_SEL
  39515. CLK_TOP_MSDC30_0_SEL
  39516. CLK_TOP_MSDC30_1
  39517. CLK_TOP_MSDC30_1_SEL
  39518. CLK_TOP_MSDC30_2
  39519. CLK_TOP_MSDC30_2_SEL
  39520. CLK_TOP_MSDC30_3_SEL
  39521. CLK_TOP_MSDC30_4_SEL
  39522. CLK_TOP_MSDC50_0
  39523. CLK_TOP_MSDC50_0_HCLK
  39524. CLK_TOP_MSDC50_0_HCLK_SEL
  39525. CLK_TOP_MSDC50_0_H_SEL
  39526. CLK_TOP_MSDC50_0_SEL
  39527. CLK_TOP_MSDC50_2_H_SEL
  39528. CLK_TOP_MSDC50_3_HCLK_SEL
  39529. CLK_TOP_MSDCPLL
  39530. CLK_TOP_MSDCPLL2
  39531. CLK_TOP_MSDCPLL2_D2
  39532. CLK_TOP_MSDCPLL2_D4
  39533. CLK_TOP_MSDCPLL_CK
  39534. CLK_TOP_MSDCPLL_D16
  39535. CLK_TOP_MSDCPLL_D2
  39536. CLK_TOP_MSDCPLL_D4
  39537. CLK_TOP_MSDCPLL_D8
  39538. CLK_TOP_MS_CARD_SEL
  39539. CLK_TOP_MUX_ANC_MD32
  39540. CLK_TOP_MUX_APLL_I2S0
  39541. CLK_TOP_MUX_APLL_I2S1
  39542. CLK_TOP_MUX_APLL_I2S2
  39543. CLK_TOP_MUX_APLL_I2S3
  39544. CLK_TOP_MUX_APLL_I2S4
  39545. CLK_TOP_MUX_APLL_I2S5
  39546. CLK_TOP_MUX_ATB
  39547. CLK_TOP_MUX_AUD
  39548. CLK_TOP_MUX_AUDIO
  39549. CLK_TOP_MUX_AUDIO_H
  39550. CLK_TOP_MUX_AUD_1
  39551. CLK_TOP_MUX_AUD_2
  39552. CLK_TOP_MUX_AUD_BUS
  39553. CLK_TOP_MUX_AUD_ENG1
  39554. CLK_TOP_MUX_AUD_ENG2
  39555. CLK_TOP_MUX_AUD_INTBUS
  39556. CLK_TOP_MUX_AXI
  39557. CLK_TOP_MUX_BSI_SPI
  39558. CLK_TOP_MUX_CAM
  39559. CLK_TOP_MUX_CAMTG
  39560. CLK_TOP_MUX_CAMTG2
  39561. CLK_TOP_MUX_CAMTG3
  39562. CLK_TOP_MUX_CAMTG4
  39563. CLK_TOP_MUX_DDRPHYCFG
  39564. CLK_TOP_MUX_DISP_PWM
  39565. CLK_TOP_MUX_DPI0
  39566. CLK_TOP_MUX_DSP
  39567. CLK_TOP_MUX_DSP1
  39568. CLK_TOP_MUX_DSP2
  39569. CLK_TOP_MUX_DXCC
  39570. CLK_TOP_MUX_F52M_MFG
  39571. CLK_TOP_MUX_FAES_UFSFDE
  39572. CLK_TOP_MUX_FPWRAP_ULPOSC
  39573. CLK_TOP_MUX_FUFS
  39574. CLK_TOP_MUX_I2C
  39575. CLK_TOP_MUX_IMG
  39576. CLK_TOP_MUX_IPU_IF
  39577. CLK_TOP_MUX_MEM
  39578. CLK_TOP_MUX_MFG
  39579. CLK_TOP_MUX_MFG_52M
  39580. CLK_TOP_MUX_MJC
  39581. CLK_TOP_MUX_MM
  39582. CLK_TOP_MUX_MSDC30_1
  39583. CLK_TOP_MUX_MSDC30_2
  39584. CLK_TOP_MUX_MSDC50_0
  39585. CLK_TOP_MUX_MSDC50_0_HCLK
  39586. CLK_TOP_MUX_PMICSPI
  39587. CLK_TOP_MUX_PWM
  39588. CLK_TOP_MUX_SCAM
  39589. CLK_TOP_MUX_SCP
  39590. CLK_TOP_MUX_SENINF
  39591. CLK_TOP_MUX_SPI
  39592. CLK_TOP_MUX_SPM
  39593. CLK_TOP_MUX_SSPM
  39594. CLK_TOP_MUX_SSUSB_TOP_SYS
  39595. CLK_TOP_MUX_SSUSB_TOP_XHCI
  39596. CLK_TOP_MUX_UART
  39597. CLK_TOP_MUX_ULPOSC_AXI_CK_MUX
  39598. CLK_TOP_MUX_ULPOSC_AXI_CK_MUX_PRE
  39599. CLK_TOP_MUX_ULPOSC_SPI_CK_MUX
  39600. CLK_TOP_MUX_USB20
  39601. CLK_TOP_MUX_USB_TOP
  39602. CLK_TOP_MUX_VDEC
  39603. CLK_TOP_MUX_VENC
  39604. CLK_TOP_NFI
  39605. CLK_TOP_NFI1X
  39606. CLK_TOP_NFI1X_CK_EN
  39607. CLK_TOP_NFI1X_PAD
  39608. CLK_TOP_NFI1X_PAD_SEL
  39609. CLK_TOP_NFI2X
  39610. CLK_TOP_NFI2X_EN
  39611. CLK_TOP_NFI2X_PAD_SEL
  39612. CLK_TOP_NFI2X_SEL
  39613. CLK_TOP_NFIECC
  39614. CLK_TOP_NFIECC_EN
  39615. CLK_TOP_NFIECC_SEL
  39616. CLK_TOP_NFI_BUS
  39617. CLK_TOP_NFI_INFRA_SEL
  39618. CLK_TOP_NR
  39619. CLK_TOP_NR_CLK
  39620. CLK_TOP_NR_SEL
  39621. CLK_TOP_OSC2_D2
  39622. CLK_TOP_OSC2_D3
  39623. CLK_TOP_OSC_D10
  39624. CLK_TOP_OSC_D16
  39625. CLK_TOP_OSC_D2
  39626. CLK_TOP_OSC_D4
  39627. CLK_TOP_OSC_D8
  39628. CLK_TOP_OSD_SEL
  39629. CLK_TOP_P0_1MHZ
  39630. CLK_TOP_P1_1MHZ
  39631. CLK_TOP_PADMCLK_SEL
  39632. CLK_TOP_PCIE0_MAC_EN
  39633. CLK_TOP_PCIE0_MCU_SEL
  39634. CLK_TOP_PCIE0_PIPE_EN
  39635. CLK_TOP_PCIE1_MAC_EN
  39636. CLK_TOP_PCIE1_MCU_SEL
  39637. CLK_TOP_PCIE1_PIPE_EN
  39638. CLK_TOP_PE2_MAC_P0_SEL
  39639. CLK_TOP_PE2_MAC_P1_SEL
  39640. CLK_TOP_PMICSPI
  39641. CLK_TOP_PMICSPI_SEL
  39642. CLK_TOP_PMICWRAP_26M
  39643. CLK_TOP_PMICWRAP_AP
  39644. CLK_TOP_PMICWRAP_CONN
  39645. CLK_TOP_PMICWRAP_MD
  39646. CLK_TOP_PWM
  39647. CLK_TOP_PWM1_FB
  39648. CLK_TOP_PWM2_FB
  39649. CLK_TOP_PWM3_FB
  39650. CLK_TOP_PWM4_FB
  39651. CLK_TOP_PWM5_FB
  39652. CLK_TOP_PWM_B
  39653. CLK_TOP_PWM_INFRA_SEL
  39654. CLK_TOP_PWM_QTR_26M
  39655. CLK_TOP_PWM_SEL
  39656. CLK_TOP_QAXI_AUD26M_SEL
  39657. CLK_TOP_RBIST
  39658. CLK_TOP_RG_APLL1_D2_EN
  39659. CLK_TOP_RG_APLL1_D4_EN
  39660. CLK_TOP_RG_APLL1_D8_EN
  39661. CLK_TOP_RG_APLL2_D2_EN
  39662. CLK_TOP_RG_APLL2_D4_EN
  39663. CLK_TOP_RG_APLL2_D8_EN
  39664. CLK_TOP_RG_AUD1
  39665. CLK_TOP_RG_AUD2
  39666. CLK_TOP_RG_AUD_ENGEN1
  39667. CLK_TOP_RG_AUD_ENGEN2
  39668. CLK_TOP_RG_AUD_SPDIF_IN
  39669. CLK_TOP_RG_BSI
  39670. CLK_TOP_RG_DBG_ATCLK
  39671. CLK_TOP_RG_ETH
  39672. CLK_TOP_RG_I2C
  39673. CLK_TOP_RG_MSDC2
  39674. CLK_TOP_RG_NFIECC
  39675. CLK_TOP_RG_PWM_INFRA
  39676. CLK_TOP_RG_SPINOR
  39677. CLK_TOP_RG_UART2
  39678. CLK_TOP_RTC
  39679. CLK_TOP_RTC_SEL
  39680. CLK_TOP_SATA_ASIC
  39681. CLK_TOP_SATA_MCU_SEL
  39682. CLK_TOP_SATA_RBC
  39683. CLK_TOP_SATA_SEL
  39684. CLK_TOP_SCAM
  39685. CLK_TOP_SCAM_SEL
  39686. CLK_TOP_SCP
  39687. CLK_TOP_SCP_SEL
  39688. CLK_TOP_SEJ
  39689. CLK_TOP_SEJ_13M
  39690. CLK_TOP_SENINF
  39691. CLK_TOP_SENINF1
  39692. CLK_TOP_SENINF2
  39693. CLK_TOP_SF
  39694. CLK_TOP_SGMIIPLL
  39695. CLK_TOP_SGMIIPLL_D2
  39696. CLK_TOP_SGMII_REF_1_SEL
  39697. CLK_TOP_SMI_MFG_AS_SEL
  39698. CLK_TOP_SMI_SEL
  39699. CLK_TOP_SPI
  39700. CLK_TOP_SPI0_SEL
  39701. CLK_TOP_SPI1_SEL
  39702. CLK_TOP_SPI2_SEL
  39703. CLK_TOP_SPINFI_IFR_SEL
  39704. CLK_TOP_SPINOR_SEL
  39705. CLK_TOP_SPISLV_SEL
  39706. CLK_TOP_SPI_SEL
  39707. CLK_TOP_SPM
  39708. CLK_TOP_SSPM
  39709. CLK_TOP_SSUSB_CDR_FB
  39710. CLK_TOP_SSUSB_CDR_REF
  39711. CLK_TOP_SSUSB_EQ_RX250M
  39712. CLK_TOP_SSUSB_MCU_SEL
  39713. CLK_TOP_SSUSB_PHY_48M_CK
  39714. CLK_TOP_SSUSB_TOP_XHCI
  39715. CLK_TOP_SSUSB_TX250M
  39716. CLK_TOP_SYSPLL
  39717. CLK_TOP_SYSPLL1_D16
  39718. CLK_TOP_SYSPLL1_D2
  39719. CLK_TOP_SYSPLL1_D4
  39720. CLK_TOP_SYSPLL1_D8
  39721. CLK_TOP_SYSPLL2_D2
  39722. CLK_TOP_SYSPLL2_D4
  39723. CLK_TOP_SYSPLL2_D8
  39724. CLK_TOP_SYSPLL3_D2
  39725. CLK_TOP_SYSPLL3_D4
  39726. CLK_TOP_SYSPLL4_D16
  39727. CLK_TOP_SYSPLL4_D2
  39728. CLK_TOP_SYSPLL4_D4
  39729. CLK_TOP_SYSPLL_CK
  39730. CLK_TOP_SYSPLL_D10
  39731. CLK_TOP_SYSPLL_D12
  39732. CLK_TOP_SYSPLL_D16
  39733. CLK_TOP_SYSPLL_D2
  39734. CLK_TOP_SYSPLL_D24
  39735. CLK_TOP_SYSPLL_D2P5
  39736. CLK_TOP_SYSPLL_D2_D16
  39737. CLK_TOP_SYSPLL_D2_D2
  39738. CLK_TOP_SYSPLL_D2_D4
  39739. CLK_TOP_SYSPLL_D2_D8
  39740. CLK_TOP_SYSPLL_D3
  39741. CLK_TOP_SYSPLL_D3P5
  39742. CLK_TOP_SYSPLL_D3_D2
  39743. CLK_TOP_SYSPLL_D3_D3
  39744. CLK_TOP_SYSPLL_D3_D4
  39745. CLK_TOP_SYSPLL_D3_D8
  39746. CLK_TOP_SYSPLL_D4
  39747. CLK_TOP_SYSPLL_D5
  39748. CLK_TOP_SYSPLL_D5_D2
  39749. CLK_TOP_SYSPLL_D5_D4
  39750. CLK_TOP_SYSPLL_D6
  39751. CLK_TOP_SYSPLL_D7
  39752. CLK_TOP_SYSPLL_D7_D2
  39753. CLK_TOP_SYSPLL_D7_D4
  39754. CLK_TOP_SYSPLL_D8
  39755. CLK_TOP_SYS_26M
  39756. CLK_TOP_TDMO0_SEL
  39757. CLK_TOP_TDMO1_SEL
  39758. CLK_TOP_THEM
  39759. CLK_TOP_TO_U2_PHY
  39760. CLK_TOP_TO_U2_PHY_1P
  39761. CLK_TOP_TO_USB3_DA_TOP
  39762. CLK_TOP_TO_USB3_DMA
  39763. CLK_TOP_TO_USB3_MCU
  39764. CLK_TOP_TO_USB3_REF
  39765. CLK_TOP_TO_USB3_SYS
  39766. CLK_TOP_TRNG
  39767. CLK_TOP_TVD2PLL
  39768. CLK_TOP_TVD2PLL_D2
  39769. CLK_TOP_TVDPLL
  39770. CLK_TOP_TVDPLL_429M
  39771. CLK_TOP_TVDPLL_429M_D2
  39772. CLK_TOP_TVDPLL_429M_D4
  39773. CLK_TOP_TVDPLL_445P5M
  39774. CLK_TOP_TVDPLL_594M
  39775. CLK_TOP_TVDPLL_CK
  39776. CLK_TOP_TVDPLL_D16
  39777. CLK_TOP_TVDPLL_D2
  39778. CLK_TOP_TVDPLL_D4
  39779. CLK_TOP_TVDPLL_D8
  39780. CLK_TOP_TVDPLL_MAINPLL_D2_CK
  39781. CLK_TOP_TVD_SEL
  39782. CLK_TOP_TVE_SEL
  39783. CLK_TOP_TVHDMI_D2
  39784. CLK_TOP_TVHDMI_D4
  39785. CLK_TOP_TVHDMI_H
  39786. CLK_TOP_TXCLK_SRC_PRE
  39787. CLK_TOP_U2_SEL
  39788. CLK_TOP_UART
  39789. CLK_TOP_UART0
  39790. CLK_TOP_UART0_SEL
  39791. CLK_TOP_UART1
  39792. CLK_TOP_UART1_SEL
  39793. CLK_TOP_UART2
  39794. CLK_TOP_UART2_SEL
  39795. CLK_TOP_UART_SEL
  39796. CLK_TOP_ULPOSC
  39797. CLK_TOP_ULPOSC_CK
  39798. CLK_TOP_ULPOSC_CK_ORG
  39799. CLK_TOP_ULPOSC_D10
  39800. CLK_TOP_ULPOSC_D2
  39801. CLK_TOP_ULPOSC_D3
  39802. CLK_TOP_ULPOSC_D4
  39803. CLK_TOP_ULPOSC_D8
  39804. CLK_TOP_UNIV48M
  39805. CLK_TOP_UNIVPLL
  39806. CLK_TOP_UNIVPLL1_D10
  39807. CLK_TOP_UNIVPLL1_D16
  39808. CLK_TOP_UNIVPLL1_D2
  39809. CLK_TOP_UNIVPLL1_D4
  39810. CLK_TOP_UNIVPLL1_D6
  39811. CLK_TOP_UNIVPLL1_D8
  39812. CLK_TOP_UNIVPLL2_D16
  39813. CLK_TOP_UNIVPLL2_D2
  39814. CLK_TOP_UNIVPLL2_D32
  39815. CLK_TOP_UNIVPLL2_D4
  39816. CLK_TOP_UNIVPLL2_D6
  39817. CLK_TOP_UNIVPLL2_D8
  39818. CLK_TOP_UNIVPLL3_D16
  39819. CLK_TOP_UNIVPLL3_D2
  39820. CLK_TOP_UNIVPLL3_D4
  39821. CLK_TOP_UNIVPLL3_D8
  39822. CLK_TOP_UNIVPLL_178P3M
  39823. CLK_TOP_UNIVPLL_249P6M
  39824. CLK_TOP_UNIVPLL_416M
  39825. CLK_TOP_UNIVPLL_48M
  39826. CLK_TOP_UNIVPLL_624M
  39827. CLK_TOP_UNIVPLL_CK
  39828. CLK_TOP_UNIVPLL_D10
  39829. CLK_TOP_UNIVPLL_D104
  39830. CLK_TOP_UNIVPLL_D108
  39831. CLK_TOP_UNIVPLL_D12
  39832. CLK_TOP_UNIVPLL_D16
  39833. CLK_TOP_UNIVPLL_D2
  39834. CLK_TOP_UNIVPLL_D20
  39835. CLK_TOP_UNIVPLL_D208
  39836. CLK_TOP_UNIVPLL_D24
  39837. CLK_TOP_UNIVPLL_D26
  39838. CLK_TOP_UNIVPLL_D2_D2
  39839. CLK_TOP_UNIVPLL_D2_D4
  39840. CLK_TOP_UNIVPLL_D2_D8
  39841. CLK_TOP_UNIVPLL_D3
  39842. CLK_TOP_UNIVPLL_D3_D16
  39843. CLK_TOP_UNIVPLL_D3_D2
  39844. CLK_TOP_UNIVPLL_D3_D4
  39845. CLK_TOP_UNIVPLL_D3_D8
  39846. CLK_TOP_UNIVPLL_D4
  39847. CLK_TOP_UNIVPLL_D5
  39848. CLK_TOP_UNIVPLL_D52
  39849. CLK_TOP_UNIVPLL_D5_D2
  39850. CLK_TOP_UNIVPLL_D5_D4
  39851. CLK_TOP_UNIVPLL_D5_D8
  39852. CLK_TOP_UNIVPLL_D6
  39853. CLK_TOP_UNIVPLL_D7
  39854. CLK_TOP_UNIVPLL_D8
  39855. CLK_TOP_UNIVPLL_D80_D4
  39856. CLK_TOP_UNIVP_192M
  39857. CLK_TOP_UNIVP_192M_CK
  39858. CLK_TOP_UNIVP_192M_D16
  39859. CLK_TOP_UNIVP_192M_D2
  39860. CLK_TOP_UNIVP_192M_D32
  39861. CLK_TOP_UNIVP_192M_D4
  39862. CLK_TOP_UNIVP_192M_D8
  39863. CLK_TOP_UNIV_178P3M
  39864. CLK_TOP_UNIV_249P6M
  39865. CLK_TOP_UNIV_416M
  39866. CLK_TOP_UNIV_48M
  39867. CLK_TOP_UNIV_624M
  39868. CLK_TOP_USB
  39869. CLK_TOP_USB20_SEL
  39870. CLK_TOP_USB30_SEL
  39871. CLK_TOP_USBIF
  39872. CLK_TOP_USB_1P
  39873. CLK_TOP_USB_78M
  39874. CLK_TOP_USB_78M_SEL
  39875. CLK_TOP_USB_PHY48M
  39876. CLK_TOP_USB_PHY48M_CK
  39877. CLK_TOP_USB_SYSPLL_125M
  39878. CLK_TOP_USB_TOP
  39879. CLK_TOP_VCODECPLL
  39880. CLK_TOP_VCODECPLL_370P5
  39881. CLK_TOP_VCODECPLL_D2
  39882. CLK_TOP_VDEC
  39883. CLK_TOP_VDECPLL
  39884. CLK_TOP_VDECPLL_CK
  39885. CLK_TOP_VDEC_SEL
  39886. CLK_TOP_VENC
  39887. CLK_TOP_VENCPLL
  39888. CLK_TOP_VENCPLL_D2
  39889. CLK_TOP_VENCPLL_D4
  39890. CLK_TOP_VENC_LT_SEL
  39891. CLK_TOP_VENC_SEL
  39892. CLK_TOP_VPLL3_DPIX
  39893. CLK_TOP_VPLL_DPIX
  39894. CLK_TOP_WBG_DIG_416M
  39895. CLK_TOUCH
  39896. CLK_TO_CHECK_DLL_LOCK
  39897. CLK_TO_DIV_N
  39898. CLK_TO_MS
  39899. CLK_TPM
  39900. CLK_TRACE
  39901. CLK_TRACECLK
  39902. CLK_TRACE_A9
  39903. CLK_TRAIL
  39904. CLK_TRAIL_MASK
  39905. CLK_TRAIL_OVERRIDE
  39906. CLK_TRAIL_SHIFT
  39907. CLK_TRX
  39908. CLK_TS
  39909. CLK_TSADC
  39910. CLK_TSI
  39911. CLK_TSOUT_0
  39912. CLK_TSOUT_1
  39913. CLK_TURN_OFF_STAGGER
  39914. CLK_TURN_ON_STAGGER
  39915. CLK_TVD
  39916. CLK_TVD0
  39917. CLK_TVD1
  39918. CLK_TVD2
  39919. CLK_TVD3
  39920. CLK_TVD_SCLK2
  39921. CLK_TVE
  39922. CLK_TVE0
  39923. CLK_TVE1
  39924. CLK_TVE1_CLK
  39925. CLK_TVE2_CLK
  39926. CLK_TVENC
  39927. CLK_TVOUT
  39928. CLK_TVOUT_PLL
  39929. CLK_TWAKEUP
  39930. CLK_TWPLL
  39931. CLK_TWPLL_128M
  39932. CLK_TWPLL_12M
  39933. CLK_TWPLL_153M6
  39934. CLK_TWPLL_192M
  39935. CLK_TWPLL_19M2
  39936. CLK_TWPLL_24M
  39937. CLK_TWPLL_256M
  39938. CLK_TWPLL_307M2
  39939. CLK_TWPLL_384M
  39940. CLK_TWPLL_38M4
  39941. CLK_TWPLL_48M
  39942. CLK_TWPLL_512M
  39943. CLK_TWPLL_51M2
  39944. CLK_TWPLL_64M
  39945. CLK_TWPLL_768M
  39946. CLK_TWPLL_76M8
  39947. CLK_TWPLL_96M
  39948. CLK_TWPLL_GATE
  39949. CLK_TX_DELAY_MASK
  39950. CLK_TX_ICN_1
  39951. CLK_TX_ICN_DISP_0
  39952. CLK_TX_ICN_DISP_1
  39953. CLK_TX_ICN_DMU
  39954. CLK_TX_ICN_HADES
  39955. CLK_TX_ICN_HVA
  39956. CLK_TX_ICN_TS
  39957. CLK_TX_PHASE_MASK
  39958. CLK_TX_RXCLK
  39959. CLK_TYPE_CUSTOM
  39960. CLK_TYPE_DIV6P1
  39961. CLK_TYPE_DIV6_RO
  39962. CLK_TYPE_EXTERNAL
  39963. CLK_TYPE_FF
  39964. CLK_TYPE_FR
  39965. CLK_TYPE_GEN2_ADSP
  39966. CLK_TYPE_GEN2_LB
  39967. CLK_TYPE_GEN2_MAIN
  39968. CLK_TYPE_GEN2_PLL0
  39969. CLK_TYPE_GEN2_PLL1
  39970. CLK_TYPE_GEN2_PLL3
  39971. CLK_TYPE_GEN2_QSPI
  39972. CLK_TYPE_GEN2_RCAN
  39973. CLK_TYPE_GEN2_SD0
  39974. CLK_TYPE_GEN2_SD1
  39975. CLK_TYPE_GEN2_SDH
  39976. CLK_TYPE_GEN2_Z
  39977. CLK_TYPE_GEN3_MAIN
  39978. CLK_TYPE_GEN3_MDSEL
  39979. CLK_TYPE_GEN3_OSC
  39980. CLK_TYPE_GEN3_PLL0
  39981. CLK_TYPE_GEN3_PLL1
  39982. CLK_TYPE_GEN3_PLL2
  39983. CLK_TYPE_GEN3_PLL3
  39984. CLK_TYPE_GEN3_PLL4
  39985. CLK_TYPE_GEN3_R
  39986. CLK_TYPE_GEN3_RCKSEL
  39987. CLK_TYPE_GEN3_RPC
  39988. CLK_TYPE_GEN3_RPCD2
  39989. CLK_TYPE_GEN3_RPCSRC
  39990. CLK_TYPE_GEN3_SD
  39991. CLK_TYPE_GEN3_SOC_BASE
  39992. CLK_TYPE_GEN3_Z
  39993. CLK_TYPE_IN
  39994. CLK_TYPE_OUTPUT
  39995. CLK_TYPE_R8A77970_SD0
  39996. CLK_TYPE_R8A77970_SD0H
  39997. CLK_TYPE_RZA_MAIN
  39998. CLK_TYPE_RZA_PLL
  39999. CLK_TZIC0
  40000. CLK_TZIC1
  40001. CLK_TZIC2
  40002. CLK_TZIC3
  40003. CLK_TZPC0
  40004. CLK_TZPC1
  40005. CLK_TZPC2
  40006. CLK_TZPC3
  40007. CLK_TZPC4
  40008. CLK_TZPC5
  40009. CLK_TZPC6
  40010. CLK_TZPC7
  40011. CLK_TZPC8
  40012. CLK_TZPC9
  40013. CLK_UART0
  40014. CLK_UART0_DIV
  40015. CLK_UART0_EB
  40016. CLK_UART0_INTERNAL_DIV
  40017. CLK_UART1
  40018. CLK_UART1_DIV
  40019. CLK_UART1_EB
  40020. CLK_UART1_INTERNAL_DIV
  40021. CLK_UART2
  40022. CLK_UART2_EB
  40023. CLK_UART3
  40024. CLK_UART3_EB
  40025. CLK_UART4
  40026. CLK_UART4_EB
  40027. CLK_UART5
  40028. CLK_UART6
  40029. CLK_UART7
  40030. CLK_UART8
  40031. CLK_UART_ISP
  40032. CLK_UART_ISP_SCLK
  40033. CLK_UART_ISP_TOP
  40034. CLK_UCLK
  40035. CLK_UDC
  40036. CLK_UFS
  40037. CLK_ULPM_EN
  40038. CLK_UNCONNECTED
  40039. CLK_UNIT_NOC_CLOCK
  40040. CLK_UNIT_NOC_OTHER
  40041. CLK_UNIT_NOC_SOCKET
  40042. CLK_USART1
  40043. CLK_USART2
  40044. CLK_USART3
  40045. CLK_USART6
  40046. CLK_USB
  40047. CLK_USB0
  40048. CLK_USB0_PHY
  40049. CLK_USB1
  40050. CLK_USB1_HSIC
  40051. CLK_USB1_PHY
  40052. CLK_USB2
  40053. CLK_USB2H0_CCE
  40054. CLK_USB2H0_PHY
  40055. CLK_USB2H0_PLLEN
  40056. CLK_USB2H1_CCE
  40057. CLK_USB2H1_PHY
  40058. CLK_USB2H1_PLLEN
  40059. CLK_USB2_HSIC
  40060. CLK_USB2_PHY
  40061. CLK_USB3
  40062. CLK_USB3_480MPHY0
  40063. CLK_USB3_480MPLL0
  40064. CLK_USB3_5GPHY
  40065. CLK_USB3_CCE
  40066. CLK_USB3_EB
  40067. CLK_USB3_MAC
  40068. CLK_USB3_REF
  40069. CLK_USB3_REF_EB
  40070. CLK_USB3_SUSPEND_EB
  40071. CLK_USBD300
  40072. CLK_USBD301
  40073. CLK_USBH
  40074. CLK_USBH20
  40075. CLK_USBHOST
  40076. CLK_USBOTG
  40077. CLK_USB_DEVICE
  40078. CLK_USB_EXTAL
  40079. CLK_USB_HOST
  40080. CLK_USB_HSIC
  40081. CLK_USB_HSIC_12M
  40082. CLK_USB_OHCI
  40083. CLK_USB_OHCI0
  40084. CLK_USB_OHCI0_12M
  40085. CLK_USB_OHCI1
  40086. CLK_USB_OHCI1_12M
  40087. CLK_USB_OHCI2
  40088. CLK_USB_OHCI3
  40089. CLK_USB_OTG
  40090. CLK_USB_PHY
  40091. CLK_USB_PHY0
  40092. CLK_USB_PHY1
  40093. CLK_USB_PHY2
  40094. CLK_USB_PHY3
  40095. CLK_USB_PHY_DIV
  40096. CLK_USI0
  40097. CLK_USI1
  40098. CLK_USI2
  40099. CLK_USI3
  40100. CLK_USI4
  40101. CLK_USI5
  40102. CLK_USI6
  40103. CLK_USIM
  40104. CLK_USIM1
  40105. CLK_USMI0
  40106. CLK_V
  40107. CLK_V2_ALWAYS_ON
  40108. CLK_V2_RX_DELAY_MASK
  40109. CLK_V2_TX_DELAY_MASK
  40110. CLK_V3_ALWAYS_ON
  40111. CLK_V3_RX_DELAY_MASK
  40112. CLK_V3_TX_DELAY_MASK
  40113. CLK_VCE
  40114. CLK_VCLK
  40115. CLK_VDE
  40116. CLK_VDEC
  40117. CLK_VDEC_ACTIVE
  40118. CLK_VDEC_CKEN
  40119. CLK_VDEC_CKEN_ENG
  40120. CLK_VDEC_CKGEN
  40121. CLK_VDEC_GCON_NR_CLK
  40122. CLK_VDEC_IMGRZ_CKEN
  40123. CLK_VDEC_LARB
  40124. CLK_VDEC_LARB1
  40125. CLK_VDEC_LARB1_CKEN
  40126. CLK_VDEC_LARB_CKEN
  40127. CLK_VDEC_NR
  40128. CLK_VDEC_NR_CLK
  40129. CLK_VDEC_VDEC
  40130. CLK_VE
  40131. CLK_VENC
  40132. CLK_VENCLT_CKE0
  40133. CLK_VENCLT_CKE1
  40134. CLK_VENCLT_NR_CLK
  40135. CLK_VENC_0
  40136. CLK_VENC_1
  40137. CLK_VENC_2
  40138. CLK_VENC_3
  40139. CLK_VENC_CKE0
  40140. CLK_VENC_CKE1
  40141. CLK_VENC_CKE2
  40142. CLK_VENC_CKE3
  40143. CLK_VENC_GCON_GALS
  40144. CLK_VENC_GCON_JPGENC
  40145. CLK_VENC_GCON_LARB
  40146. CLK_VENC_GCON_NR_CLK
  40147. CLK_VENC_GCON_VENC
  40148. CLK_VENC_JPGENC
  40149. CLK_VENC_LARB
  40150. CLK_VENC_LT
  40151. CLK_VENC_NR
  40152. CLK_VENC_NR_CLK
  40153. CLK_VENC_SMI_COMMON_CON
  40154. CLK_VENC_SMI_LARB6
  40155. CLK_VENC_VENC
  40156. CLK_VIC0
  40157. CLK_VIC1
  40158. CLK_VIC2
  40159. CLK_VIC3
  40160. CLK_VID_DMU
  40161. CLK_VLD_CTRL
  40162. CLK_VP
  40163. CLK_VP9
  40164. CLK_VPP
  40165. CLK_VPP_AXI_GATE
  40166. CLK_VPP_BM_GATE
  40167. CLK_VPP_EB
  40168. CLK_VSENS_COMPO
  40169. CLK_VSP
  40170. CLK_VSP_26M
  40171. CLK_VSP_26M_EB
  40172. CLK_VSP_AXI_GATE
  40173. CLK_VSP_BM_GATE
  40174. CLK_VSP_CKG_EB
  40175. CLK_VSP_DEC_EB
  40176. CLK_VSP_EB
  40177. CLK_VSP_ENC
  40178. CLK_VSP_ENC_BM_GATE
  40179. CLK_VSP_ENC_EB
  40180. CLK_VSP_ENC_GATE
  40181. CLK_VSP_GATE_NUM
  40182. CLK_VSP_MMU_EB
  40183. CLK_VSP_NUM
  40184. CLK_V_MASK
  40185. CLK_V_SHIFT
  40186. CLK_W1
  40187. CLK_WB
  40188. CLK_WB_DIV
  40189. CLK_WDT
  40190. CLK_WDT_ISP
  40191. CLK_WIFI_ADC
  40192. CLK_WIFI_DAC
  40193. CLK_WIFI_DIV4
  40194. CLK_WIFI_DIV4_MUX
  40195. CLK_WIFI_DIV8
  40196. CLK_WIFI_DIV8_MUX
  40197. CLK_WIFI_PLL
  40198. CLK_WIFI_PLL_GATE
  40199. CLK_WIFI_PLL_MUX
  40200. CLK_XUSBXTI
  40201. CLK_XXTI
  40202. CLK_ZERO
  40203. CLK_ZERO_CNT_MAX
  40204. CLK_ZERO_COUNT_MASK
  40205. CLK_ZERO_COUNT_SHIFT
  40206. CLK_ZERO_MASK
  40207. CLK_ZERO_OVERRIDE
  40208. CLK_ZERO_SHIFT
  40209. CLK_ZIP_EMC_EB
  40210. CLL0
  40211. CLL1
  40212. CLMD
  40213. CLMPG
  40214. CLMPL
  40215. CLM_PERIOD_REG
  40216. CLM_RESULT
  40217. CLM_RESULT_REG
  40218. CLNK_CTRL
  40219. CLNK_CTRL_ENABLE_LNK
  40220. CLOCAL
  40221. CLOCK
  40222. CLOCKACTIVITY
  40223. CLOCKACT_TEST_BOTH
  40224. CLOCKACT_TEST_ICLK
  40225. CLOCKACT_TEST_MAIN
  40226. CLOCKACT_TEST_NONE
  40227. CLOCKBASE
  40228. CLOCKDIV
  40229. CLOCKFD
  40230. CLOCKFD_MASK
  40231. CLOCKID_END
  40232. CLOCKID_MAP
  40233. CLOCKING_MASTER
  40234. CLOCKING_SLAVE
  40235. CLOCKS
  40236. CLOCKSOURCE_MASK
  40237. CLOCKSTOP
  40238. CLOCKS_MASK
  40239. CLOCKS_MONO
  40240. CLOCKS_PER_SEC
  40241. CLOCK_100M
  40242. CLOCK_100_HZ
  40243. CLOCK_100_KHZ
  40244. CLOCK_10_KHZ
  40245. CLOCK_111M
  40246. CLOCK_125M
  40247. CLOCK_12M
  40248. CLOCK_133M
  40249. CLOCK_150M
  40250. CLOCK_166M
  40251. CLOCK_167M
  40252. CLOCK_196_608M
  40253. CLOCK_1_536M
  40254. CLOCK_1_KHZ
  40255. CLOCK_1_MHZ
  40256. CLOCK_2
  40257. CLOCK_200M
  40258. CLOCK_20M
  40259. CLOCK_222M
  40260. CLOCK_240M
  40261. CLOCK_24M
  40262. CLOCK_250M
  40263. CLOCK_25M
  40264. CLOCK_266M
  40265. CLOCK_288M
  40266. CLOCK_2_5M
  40267. CLOCK_300M
  40268. CLOCK_30M
  40269. CLOCK_32_768K
  40270. CLOCK_333M
  40271. CLOCK_33M
  40272. CLOCK_360M
  40273. CLOCK_393M
  40274. CLOCK_4
  40275. CLOCK_400M
  40276. CLOCK_40M
  40277. CLOCK_432M
  40278. CLOCK_450M
  40279. CLOCK_48M
  40280. CLOCK_500M
  40281. CLOCK_50M
  40282. CLOCK_600M
  40283. CLOCK_60M
  40284. CLOCK_62_5M
  40285. CLOCK_666M
  40286. CLOCK_720M
  40287. CLOCK_83M
  40288. CLOCK_83_5M
  40289. CLOCK_98_304M
  40290. CLOCK_ACLK
  40291. CLOCK_ADD_MONOTONIC
  40292. CLOCK_ATTRIBUTES
  40293. CLOCK_BASE
  40294. CLOCK_BASE_RATE
  40295. CLOCK_BIT
  40296. CLOCK_BOOTTIME
  40297. CLOCK_BOOTTIME_ALARM
  40298. CLOCK_BRANCH_SOFT_RESET
  40299. CLOCK_BRANCH_SOFT_RESET_FORCE
  40300. CLOCK_BRANCH_SOFT_RESET_NOOP
  40301. CLOCK_CAP_RATE_176400
  40302. CLOCK_CAP_RATE_192000
  40303. CLOCK_CAP_RATE_32000
  40304. CLOCK_CAP_RATE_44100
  40305. CLOCK_CAP_RATE_48000
  40306. CLOCK_CAP_RATE_88200
  40307. CLOCK_CAP_RATE_96000
  40308. CLOCK_CAP_SOURCE_ADAT
  40309. CLOCK_CAP_SOURCE_AES1
  40310. CLOCK_CAP_SOURCE_AES2
  40311. CLOCK_CAP_SOURCE_AES3
  40312. CLOCK_CAP_SOURCE_AES4
  40313. CLOCK_CAP_SOURCE_AES_ANY
  40314. CLOCK_CAP_SOURCE_ARX1
  40315. CLOCK_CAP_SOURCE_ARX2
  40316. CLOCK_CAP_SOURCE_ARX3
  40317. CLOCK_CAP_SOURCE_ARX4
  40318. CLOCK_CAP_SOURCE_INTERNAL
  40319. CLOCK_CAP_SOURCE_TDIF
  40320. CLOCK_CAP_SOURCE_WC
  40321. CLOCK_CDEX_CONTROL_CX
  40322. CLOCK_CDEX_EX0
  40323. CLOCK_CDEX_EX1
  40324. CLOCK_CDEX_LED0
  40325. CLOCK_CDEX_LED1
  40326. CLOCK_CDEX_LED2
  40327. CLOCK_CDEX_OWM
  40328. CLOCK_CDEX_PWM0
  40329. CLOCK_CDEX_PWM1
  40330. CLOCK_CDEX_SD_BUS
  40331. CLOCK_CDEX_SD_HOST
  40332. CLOCK_CDEX_SMBUS
  40333. CLOCK_CDEX_SOURCE
  40334. CLOCK_CDEX_SOURCE0
  40335. CLOCK_CDEX_SOURCE1
  40336. CLOCK_CDEX_SPI
  40337. CLOCK_CLKOUTX2
  40338. CLOCK_CNTL
  40339. CLOCK_CNTL_ADDR
  40340. CLOCK_CNTL_DATA
  40341. CLOCK_CNTL_INDEX
  40342. CLOCK_CNT_HIGH_MASK
  40343. CLOCK_CNT_HIGH_SHIFT
  40344. CLOCK_CNT_LOW_MASK
  40345. CLOCK_CNT_LOW_SHIFT
  40346. CLOCK_CONDITION_REGESTER_INFO
  40347. CLOCK_CONDITION_SETTING_ENTRY
  40348. CLOCK_CONDITION_SETTING_INFO
  40349. CLOCK_CONFIG_16_2_M
  40350. CLOCK_CONFIG_16_368_M
  40351. CLOCK_CONFIG_16_8_M
  40352. CLOCK_CONFIG_19_2_M
  40353. CLOCK_CONFIG_26_M
  40354. CLOCK_CONFIG_32_736_M
  40355. CLOCK_CONFIG_33_6_M
  40356. CLOCK_CONFIG_38_468_M
  40357. CLOCK_CONFIG_52_M
  40358. CLOCK_CONFIG_MASK
  40359. CLOCK_CONFIG_SET
  40360. CLOCK_CONTROL
  40361. CLOCK_CONTROL_40MHZ
  40362. CLOCK_CONTROL_50MHZ
  40363. CLOCK_CONTROL_60MHZ
  40364. CLOCK_CONTROL_62_5MHZ
  40365. CLOCK_CONTROL_ADDRESS
  40366. CLOCK_CONTROL_BY_MMIO
  40367. CLOCK_CONTROL_LF_CLK32
  40368. CLOCK_CONTROL_LF_CLK32_S
  40369. CLOCK_CONTROL_OFF
  40370. CLOCK_CONTROL_OFFSET
  40371. CLOCK_CONTROL_SI0_CLK_MASK
  40372. CLOCK_COUNT
  40373. CLOCK_CTL
  40374. CLOCK_CTL_0
  40375. CLOCK_CTL_1
  40376. CLOCK_CTRL
  40377. CLOCK_CTRL_44MHZ_CORE
  40378. CLOCK_CTRL_625_CORE
  40379. CLOCK_CTRL_ALTCLK
  40380. CLOCK_CTRL_CLKRUN_OENABLE
  40381. CLOCK_CTRL_CORECLK_DISABLE
  40382. CLOCK_CTRL_DELAY_PCI_GRANT
  40383. CLOCK_CTRL_FORCE_CLKRUN
  40384. CLOCK_CTRL_LLED
  40385. CLOCK_CTRL_MLED
  40386. CLOCK_CTRL_PWRDOWN_PLL133
  40387. CLOCK_CTRL_RLED
  40388. CLOCK_CTRL_RXCLK_DISABLE
  40389. CLOCK_CTRL_TXCLK_DISABLE
  40390. CLOCK_DATA
  40391. CLOCK_DCFCLK
  40392. CLOCK_DCLK
  40393. CLOCK_DEFAULT
  40394. CLOCK_DELAY
  40395. CLOCK_DESCRIBE_RATES
  40396. CLOCK_DISABLE
  40397. CLOCK_DISPCLK
  40398. CLOCK_DIV
  40399. CLOCK_DIV1
  40400. CLOCK_DIV2
  40401. CLOCK_DIV4
  40402. CLOCK_DIVIDE_BY_1000
  40403. CLOCK_DIVISOR_BITS
  40404. CLOCK_DIV_MASK
  40405. CLOCK_DIV_MAX
  40406. CLOCK_DIV_MIN
  40407. CLOCK_DIV_SHIFT
  40408. CLOCK_DPPCLK
  40409. CLOCK_DPREFCLK
  40410. CLOCK_DRIFT_TOLERANCE
  40411. CLOCK_ENABLE
  40412. CLOCK_EVT_FEAT_C3STOP
  40413. CLOCK_EVT_FEAT_DUMMY
  40414. CLOCK_EVT_FEAT_DYNIRQ
  40415. CLOCK_EVT_FEAT_HRTIMER
  40416. CLOCK_EVT_FEAT_KTIME
  40417. CLOCK_EVT_FEAT_ONESHOT
  40418. CLOCK_EVT_FEAT_PERCPU
  40419. CLOCK_EVT_FEAT_PERIODIC
  40420. CLOCK_EVT_STATE_DETACHED
  40421. CLOCK_EVT_STATE_ONESHOT
  40422. CLOCK_EVT_STATE_ONESHOT_STOPPED
  40423. CLOCK_EVT_STATE_PERIODIC
  40424. CLOCK_EVT_STATE_SHUTDOWN
  40425. CLOCK_EXT
  40426. CLOCK_FCLK
  40427. CLOCK_FREQ
  40428. CLOCK_GATE_BYPASS
  40429. CLOCK_GATING_AC97_MASK
  40430. CLOCK_GATING_BIT_AC97
  40431. CLOCK_GATING_BIT_CAMERA
  40432. CLOCK_GATING_BIT_CRYPTO
  40433. CLOCK_GATING_BIT_GBE
  40434. CLOCK_GATING_BIT_GIGA_PHY
  40435. CLOCK_GATING_BIT_I2S0
  40436. CLOCK_GATING_BIT_I2S1
  40437. CLOCK_GATING_BIT_NAND
  40438. CLOCK_GATING_BIT_PCIE0
  40439. CLOCK_GATING_BIT_PCIE1
  40440. CLOCK_GATING_BIT_PDMA
  40441. CLOCK_GATING_BIT_SATA
  40442. CLOCK_GATING_BIT_SDIO0
  40443. CLOCK_GATING_BIT_SDIO1
  40444. CLOCK_GATING_BIT_USB0
  40445. CLOCK_GATING_BIT_USB1
  40446. CLOCK_GATING_BIT_XOR0
  40447. CLOCK_GATING_BIT_XOR1
  40448. CLOCK_GATING_CAMERA_MASK
  40449. CLOCK_GATING_CONTROL
  40450. CLOCK_GATING_CRYPTO_MASK
  40451. CLOCK_GATING_DIS
  40452. CLOCK_GATING_DISABLE
  40453. CLOCK_GATING_DISABLED
  40454. CLOCK_GATING_DISABLED_IN_DCO
  40455. CLOCK_GATING_DISABLE_ENUM
  40456. CLOCK_GATING_DISABLE_ENUM_DISABLED
  40457. CLOCK_GATING_DISABLE_ENUM_ENABLED
  40458. CLOCK_GATING_EN
  40459. CLOCK_GATING_ENABLE
  40460. CLOCK_GATING_ENABLED
  40461. CLOCK_GATING_ENABLED_IN_DCO
  40462. CLOCK_GATING_GBE_MASK
  40463. CLOCK_GATING_GIGA_PHY_MASK
  40464. CLOCK_GATING_I2S0_MASK
  40465. CLOCK_GATING_I2S1_MASK
  40466. CLOCK_GATING_NAND_MASK
  40467. CLOCK_GATING_PCIE0_MASK
  40468. CLOCK_GATING_PCIE1_MASK
  40469. CLOCK_GATING_PDMA_MASK
  40470. CLOCK_GATING_SATA_MASK
  40471. CLOCK_GATING_SDIO0_MASK
  40472. CLOCK_GATING_SDIO1_MASK
  40473. CLOCK_GATING_USB0_MASK
  40474. CLOCK_GATING_USB1_MASK
  40475. CLOCK_GATING_XOR0_MASK
  40476. CLOCK_GATING_XOR1_MASK
  40477. CLOCK_GFXCLK
  40478. CLOCK_GPIO_BT_CLK_OUT_EN_LSB
  40479. CLOCK_GPIO_BT_CLK_OUT_EN_MASK
  40480. CLOCK_GPIO_OFFSET
  40481. CLOCK_HWSPECIFIC
  40482. CLOCK_IDLE_CONTROL
  40483. CLOCK_ID_e
  40484. CLOCK_IDs_e
  40485. CLOCK_INFO
  40486. CLOCK_INT
  40487. CLOCK_INVALID
  40488. CLOCK_IRQDIAG
  40489. CLOCK_ISPCLK
  40490. CLOCK_LCLK
  40491. CLOCK_LINE
  40492. CLOCK_MASK
  40493. CLOCK_MEASURE_BUFSIZE
  40494. CLOCK_MODE_MASK
  40495. CLOCK_MONOTONIC
  40496. CLOCK_MONOTONIC_COARSE
  40497. CLOCK_MONOTONIC_RAW
  40498. CLOCK_MP0CLK
  40499. CLOCK_MP1CLK
  40500. CLOCK_MP2CLK
  40501. CLOCK_NO_IDLE_PARENT
  40502. CLOCK_OFF_DELAY
  40503. CLOCK_OFF_DELAY_MASK
  40504. CLOCK_ON_DELAY
  40505. CLOCK_ON_DELAY_MASK
  40506. CLOCK_OUT
  40507. CLOCK_OUT_PORT0
  40508. CLOCK_OUT_PORT1
  40509. CLOCK_PRE
  40510. CLOCK_PROCESS_CPUTIME_ID
  40511. CLOCK_PULSE
  40512. CLOCK_PWRPRES
  40513. CLOCK_PWRSTAT
  40514. CLOCK_PWRSTAT2
  40515. CLOCK_RANGE_HIGHEST
  40516. CLOCK_RANGE_MASK
  40517. CLOCK_RANGE_SHIFT
  40518. CLOCK_RATE
  40519. CLOCK_RATE_176400
  40520. CLOCK_RATE_192000
  40521. CLOCK_RATE_32000
  40522. CLOCK_RATE_44100
  40523. CLOCK_RATE_48000
  40524. CLOCK_RATE_88200
  40525. CLOCK_RATE_96000
  40526. CLOCK_RATE_ANY_HIGH
  40527. CLOCK_RATE_ANY_LOW
  40528. CLOCK_RATE_ANY_MID
  40529. CLOCK_RATE_GET
  40530. CLOCK_RATE_MASK
  40531. CLOCK_RATE_NONE
  40532. CLOCK_RATE_SET
  40533. CLOCK_RATE_SHIFT
  40534. CLOCK_REALTIME
  40535. CLOCK_REALTIME_ALARM
  40536. CLOCK_REALTIME_COARSE
  40537. CLOCK_RECOVERY
  40538. CLOCK_REG
  40539. CLOCK_SEL
  40540. CLOCK_SELECT_BITS
  40541. CLOCK_SELECT_SHIFT
  40542. CLOCK_SEL_CNTL
  40543. CLOCK_SEL_CX
  40544. CLOCK_SEL_EXTERNAL
  40545. CLOCK_SEL_INTERNAL
  40546. CLOCK_SEL_SD_BCLK_SEL
  40547. CLOCK_SEL_SD_HCLK_SEL
  40548. CLOCK_SET_ASYNC
  40549. CLOCK_SET_IGNORE_RESP
  40550. CLOCK_SET_ROUND_AUTO
  40551. CLOCK_SET_ROUND_UP
  40552. CLOCK_SGI_CYCLE
  40553. CLOCK_SHUBCLK
  40554. CLOCK_SMNCLK
  40555. CLOCK_SOCCLK
  40556. CLOCK_SOURCE
  40557. CLOCK_SOURCE_ADAT
  40558. CLOCK_SOURCE_AES1
  40559. CLOCK_SOURCE_AES2
  40560. CLOCK_SOURCE_AES3
  40561. CLOCK_SOURCE_AES4
  40562. CLOCK_SOURCE_AES_ANY
  40563. CLOCK_SOURCE_ARX1
  40564. CLOCK_SOURCE_ARX2
  40565. CLOCK_SOURCE_ARX3
  40566. CLOCK_SOURCE_ARX4
  40567. CLOCK_SOURCE_COMBO_DISPLAY_PLL0
  40568. CLOCK_SOURCE_COMBO_PHY_PLL0
  40569. CLOCK_SOURCE_COMBO_PHY_PLL1
  40570. CLOCK_SOURCE_COMBO_PHY_PLL2
  40571. CLOCK_SOURCE_COMBO_PHY_PLL3
  40572. CLOCK_SOURCE_COMBO_PHY_PLL4
  40573. CLOCK_SOURCE_COMBO_PHY_PLL5
  40574. CLOCK_SOURCE_DP_MODE
  40575. CLOCK_SOURCE_ID_DCPLL
  40576. CLOCK_SOURCE_ID_DFS
  40577. CLOCK_SOURCE_ID_DP_DTO
  40578. CLOCK_SOURCE_ID_EXTERNAL
  40579. CLOCK_SOURCE_ID_PLL0
  40580. CLOCK_SOURCE_ID_PLL1
  40581. CLOCK_SOURCE_ID_PLL2
  40582. CLOCK_SOURCE_ID_UNDEFINED
  40583. CLOCK_SOURCE_ID_VCE
  40584. CLOCK_SOURCE_INTERNAL
  40585. CLOCK_SOURCE_IS_CONTINUOUS
  40586. CLOCK_SOURCE_MASK
  40587. CLOCK_SOURCE_MUST_VERIFY
  40588. CLOCK_SOURCE_NAMES_SIZE
  40589. CLOCK_SOURCE_NONE_DP_MODE
  40590. CLOCK_SOURCE_RESELECT
  40591. CLOCK_SOURCE_SHAREABLE
  40592. CLOCK_SOURCE_SUSPEND_NONSTOP
  40593. CLOCK_SOURCE_TDIF
  40594. CLOCK_SOURCE_UNSTABLE
  40595. CLOCK_SOURCE_VALID_FOR_HRES
  40596. CLOCK_SOURCE_WATCHDOG
  40597. CLOCK_SOURCE_WC
  40598. CLOCK_SPEED
  40599. CLOCK_SRC_XO_IN
  40600. CLOCK_SRC_XO_IN2
  40601. CLOCK_SRC_XTALIN
  40602. CLOCK_STAT1
  40603. CLOCK_STAT2
  40604. CLOCK_STATUS_MASK
  40605. CLOCK_STRETCHER_MAX_ENTRIES
  40606. CLOCK_STRETCHER_SETTING_DDT_MASK
  40607. CLOCK_STRETCHER_SETTING_DDT_SHIFT
  40608. CLOCK_STRETCHER_SETTING_ENABLE_MASK
  40609. CLOCK_STRETCHER_SETTING_ENABLE_SHIFT
  40610. CLOCK_STRETCHER_SETTING_STRETCH_AMOUNT_MASK
  40611. CLOCK_STRETCHER_SETTING_STRETCH_AMOUNT_SHIFT
  40612. CLOCK_STROBE
  40613. CLOCK_SUSPEND
  40614. CLOCK_SWITCH_MASTER
  40615. CLOCK_SWITCH_NOTIFY
  40616. CLOCK_SWITCH_PREPARE_MASTER
  40617. CLOCK_SWITCH_PREPARE_SLAVE
  40618. CLOCK_SWITCH_SLAVE
  40619. CLOCK_SYNC_HAS_STP
  40620. CLOCK_SYNC_HEADER
  40621. CLOCK_SYNC_STP
  40622. CLOCK_TAI
  40623. CLOCK_TEMP
  40624. CLOCK_THREAD_CPUTIME_ID
  40625. CLOCK_TICK_RATE
  40626. CLOCK_TOO_SLOW_HZ
  40627. CLOCK_TRACE
  40628. CLOCK_TREE_RESET_TIME
  40629. CLOCK_TXFROMRX
  40630. CLOCK_TXINT
  40631. CLOCK_TYPE_CCLK
  40632. CLOCK_TYPE_DCLK
  40633. CLOCK_TYPE_ECLK
  40634. CLOCK_TYPE_SCLK
  40635. CLOCK_UMCCLK
  40636. CLOCK_VCLK
  40637. CLOCK_sources
  40638. CLONED_MASK
  40639. CLONED_OFFSET
  40640. CLONE_ARGS_SIZE_VER0
  40641. CLONE_CHILD_CLEARTID
  40642. CLONE_CHILD_SETTID
  40643. CLONE_DETACHED
  40644. CLONE_FILES
  40645. CLONE_FS
  40646. CLONE_IO
  40647. CLONE_LEGACY_FLAGS
  40648. CLONE_NEWCGROUP
  40649. CLONE_NEWIPC
  40650. CLONE_NEWNET
  40651. CLONE_NEWNS
  40652. CLONE_NEWPID
  40653. CLONE_NEWUSER
  40654. CLONE_NEWUTS
  40655. CLONE_PARENT
  40656. CLONE_PARENT_SETTID
  40657. CLONE_PIDFD
  40658. CLONE_PTRACE
  40659. CLONE_SETTLS
  40660. CLONE_SIGHAND
  40661. CLONE_SYSVSEM
  40662. CLONE_THREAD
  40663. CLONE_UNTRACED
  40664. CLONE_VFORK
  40665. CLONE_VM
  40666. CLOSED
  40667. CLOSE_BRACE_COMMENT
  40668. CLOSE_CHANNEL
  40669. CLOSE_CON_RPL
  40670. CLOSE_FIXED_SECTION
  40671. CLOSE_REQ
  40672. CLOSE_RSP
  40673. CLOSE_SENT
  40674. CLOSE_STATEID
  40675. CLOSE_UPCALL
  40676. CLOSING
  40677. CLOSING_DELAY
  40678. CLOSING_WAIT_DELAY
  40679. CLOSURE_BITS_START
  40680. CLOSURE_DESTRUCTOR
  40681. CLOSURE_GUARD_MASK
  40682. CLOSURE_MAGIC_ALIVE
  40683. CLOSURE_MAGIC_DEAD
  40684. CLOSURE_REMAINING_INITIALIZER
  40685. CLOSURE_REMAINING_MASK
  40686. CLOSURE_RUNNING
  40687. CLOSURE_WAITING
  40688. CLOS_PM_CLOS
  40689. CLOS_PM_QOS_CONFIG
  40690. CLOS_PQR_ASSOC
  40691. CLOS_STATUS
  40692. CLP
  40693. CLPAIR
  40694. CLPCR
  40695. CLPF_EN
  40696. CLPF_TYPE
  40697. CLPS711X_BLEOI
  40698. CLPS711X_CLKSRC_CLOCKEVENT
  40699. CLPS711X_CLKSRC_CLOCKSOURCE
  40700. CLPS711X_CLK_BUS
  40701. CLPS711X_CLK_CPU
  40702. CLPS711X_CLK_DUMMY
  40703. CLPS711X_CLK_MAX
  40704. CLPS711X_CLK_PLL
  40705. CLPS711X_CLK_PWM
  40706. CLPS711X_CLK_SPI
  40707. CLPS711X_CLK_SPIREF
  40708. CLPS711X_CLK_TICK
  40709. CLPS711X_CLK_TIMER1
  40710. CLPS711X_CLK_TIMER2
  40711. CLPS711X_CLK_TIMERREF
  40712. CLPS711X_CLK_UART
  40713. CLPS711X_COEOI
  40714. CLPS711X_CPUIDLE_NAME
  40715. CLPS711X_EXT_FREQ
  40716. CLPS711X_FBADDR
  40717. CLPS711X_FB_BPP_MAX
  40718. CLPS711X_FB_NAME
  40719. CLPS711X_FLAG_EN
  40720. CLPS711X_FLAG_FIQ
  40721. CLPS711X_INTMR1
  40722. CLPS711X_INTMR2
  40723. CLPS711X_INTMR3
  40724. CLPS711X_INTSR1
  40725. CLPS711X_INTSR2
  40726. CLPS711X_INTSR3
  40727. CLPS711X_KBDEOI
  40728. CLPS711X_KEYPAD_COL_COUNT
  40729. CLPS711X_LCDCON
  40730. CLPS711X_MCEOI
  40731. CLPS711X_OSC_FREQ
  40732. CLPS711X_PALLSW
  40733. CLPS711X_PALMSW
  40734. CLPS711X_PHYS_BASE
  40735. CLPS711X_PLLR
  40736. CLPS711X_RTCEOI
  40737. CLPS711X_SRXEOF
  40738. CLPS711X_SYSCON1
  40739. CLPS711X_SYSCON2
  40740. CLPS711X_SYSFLG2
  40741. CLPS711X_TC1EOI
  40742. CLPS711X_TC2EOI
  40743. CLPS711X_TEOI
  40744. CLPS711X_UART_PADDR
  40745. CLPS711X_UART_VADDR
  40746. CLPS711X_UMSEOI
  40747. CLPS711X_VIRT_BASE
  40748. CLP_BLK_SIZE
  40749. CLP_CACHELOOPADDR
  40750. CLP_FH_LIST_NR_ENTRIES
  40751. CLP_IOCTL_MAGIC
  40752. CLP_LIST_PCI
  40753. CLP_LPS_BASE
  40754. CLP_LPS_PCI
  40755. CLP_PFIP_NR_SEGMENTS
  40756. CLP_QUERY_PCI_FN
  40757. CLP_QUERY_PCI_FNGRP
  40758. CLP_RC_8K
  40759. CLP_RC_CMD
  40760. CLP_RC_FC_UNKNOWN
  40761. CLP_RC_FMT
  40762. CLP_RC_LEN
  40763. CLP_RC_LISTPCI_BADRT
  40764. CLP_RC_NODATA
  40765. CLP_RC_OK
  40766. CLP_RC_PERM
  40767. CLP_RC_QUERYPCIFG_PFGID
  40768. CLP_RC_RESNOT0
  40769. CLP_RC_SETPCIFN_ALRDY
  40770. CLP_RC_SETPCIFN_BUSY
  40771. CLP_RC_SETPCIFN_DMAAS
  40772. CLP_RC_SETPCIFN_ERR
  40773. CLP_RC_SETPCIFN_FH
  40774. CLP_RC_SETPCIFN_FHOP
  40775. CLP_RC_SETPCIFN_RECPND
  40776. CLP_RC_SETPCIFN_RES
  40777. CLP_SET_DISABLE_MIO
  40778. CLP_SET_DISABLE_PCI_FN
  40779. CLP_SET_ENABLE_MIO
  40780. CLP_SET_ENABLE_PCI_FN
  40781. CLP_SET_PCI_FN
  40782. CLP_SYNC
  40783. CLP_UTIL_STR_LEN
  40784. CLR
  40785. CLRATNO
  40786. CLRBITS
  40787. CLRBITS_OUTB
  40788. CLRBITS_OUTL
  40789. CLRBITS_OUTW
  40790. CLRBUSFREE
  40791. CLRCH1
  40792. CLRCOUNTER_ALLMASK
  40793. CLRDMADONE
  40794. CLREIE
  40795. CLRFRERR
  40796. CLRFWERR
  40797. CLRI_STATUS_E_MASK
  40798. CLRI_STATUS_IE_BIT
  40799. CLRI_STATUS_IE_MASK
  40800. CLRMASK
  40801. CLRPHASECHG
  40802. CLRPMASK
  40803. CLRPMIRQ
  40804. CLRREQINIT
  40805. CLRSCSIPERR
  40806. CLRSCSIRSTI
  40807. CLRSDONE
  40808. CLRSELDI
  40809. CLRSELDO
  40810. CLRSELINGO
  40811. CLRSELTIMO
  40812. CLRSPIORDY
  40813. CLRSTCNT
  40814. CLRSWRAP
  40815. CLRSYNCERR
  40816. CLRTESTPNT
  40817. CLRXFIFO
  40818. CLR_ADDR
  40819. CLR_ALL_INT
  40820. CLR_ALL_INT_1
  40821. CLR_AUTO_DELINK
  40822. CLR_BER_CNTR
  40823. CLR_BIT
  40824. CLR_BUF_PO
  40825. CLR_CLK
  40826. CLR_CMP_CLR
  40827. CLR_CMP_CLR_DST
  40828. CLR_CMP_CLR_SRC
  40829. CLR_CMP_CNTL
  40830. CLR_CMP_MASK
  40831. CLR_CMP_MASK_3D
  40832. CLR_CMP_MSK
  40833. CLR_CNTXT_SHIFT
  40834. CLR_COUNTER
  40835. CLR_DDRMON_CTRL
  40836. CLR_ERASED_PAGE_DET
  40837. CLR_FC_ERROR
  40838. CLR_FIFO
  40839. CLR_FIFO_710
  40840. CLR_FX
  40841. CLR_INT
  40842. CLR_INT0
  40843. CLR_INT1
  40844. CLR_INT2
  40845. CLR_INT3
  40846. CLR_INT4
  40847. CLR_INT5
  40848. CLR_INTR_STAT
  40849. CLR_LINK_ERR_CNT
  40850. CLR_LUN_READY
  40851. CLR_MMC_26M
  40852. CLR_MMC_4BIT
  40853. CLR_MMC_52M
  40854. CLR_MMC_8BIT
  40855. CLR_MMC_DDR52
  40856. CLR_MMC_HS
  40857. CLR_MMC_SECTOR_MODE
  40858. CLR_MTRX_ON_OFF
  40859. CLR_OFFSET
  40860. CLR_PAL_REG
  40861. CLR_PRIORITY
  40862. CLR_PS_STATE
  40863. CLR_P_FLAG
  40864. CLR_REG
  40865. CLR_RH_PORTSTAT
  40866. CLR_RX_BUS_ERR
  40867. CLR_RX_OVERFLOW
  40868. CLR_RX_PKT
  40869. CLR_SDIO_EXIST
  40870. CLR_SDIO_IGNORED
  40871. CLR_SD_DDR50
  40872. CLR_SD_HCXC
  40873. CLR_SD_HS
  40874. CLR_SD_SDR104
  40875. CLR_SD_SDR50
  40876. CLR_SHORT_HS1
  40877. CLR_SHORT_HS2
  40878. CLR_SHORT_LO1
  40879. CLR_SHORT_LO2
  40880. CLR_TX_BUS_ERR
  40881. CLR_TX_PKT
  40882. CLR_TX_UNDERRUN
  40883. CLR_V
  40884. CLR_VIRT_LNK_RCVD
  40885. CLR_WIN
  40886. CLSE
  40887. CLSF_ADD
  40888. CLSF_DEL
  40889. CLSF_TLV_ACTION
  40890. CLSF_TLV_FILTER
  40891. CLSH_REQ_DISABLE
  40892. CLSH_REQ_ENABLE
  40893. CLSTR_CTRL
  40894. CLSV
  40895. CLS_AB
  40896. CLS_ACPT
  40897. CLS_BPF_NAME_LEN
  40898. CLS_BPF_SUPPORTED_GEN_FLAGS
  40899. CLS_H_HIFI
  40900. CLS_H_LOHIFI
  40901. CLS_H_LP
  40902. CLS_H_NORMAL
  40903. CLS_IGNR
  40904. CLS_NONE
  40905. CLS_PRE
  40906. CLS_PREP
  40907. CLS_ZERO
  40908. CLUMP_ENTRIES
  40909. CLUSTER
  40910. CLUSTERED_DISK_NACK
  40911. CLUSTERIP_FLAG_NEW
  40912. CLUSTERIP_HASHMODE_MAX
  40913. CLUSTERIP_HASHMODE_SIP
  40914. CLUSTERIP_HASHMODE_SIP_SPT
  40915. CLUSTERIP_HASHMODE_SIP_SPT_DPT
  40916. CLUSTERIP_MAX_NODES
  40917. CLUSTERIP_VERSION
  40918. CLUSTERPMCCNTR_EL1
  40919. CLUSTERPMCEID0_EL1
  40920. CLUSTERPMCEID1_EL1
  40921. CLUSTERPMCNTENCLR_EL1
  40922. CLUSTERPMCNTENSET_EL1
  40923. CLUSTERPMCR_C
  40924. CLUSTERPMCR_E
  40925. CLUSTERPMCR_EL1
  40926. CLUSTERPMCR_IDCODE_MASK
  40927. CLUSTERPMCR_IDCODE_SHIFT
  40928. CLUSTERPMCR_IMP_MASK
  40929. CLUSTERPMCR_IMP_SHIFT
  40930. CLUSTERPMCR_N_MASK
  40931. CLUSTERPMCR_N_SHIFT
  40932. CLUSTERPMCR_P
  40933. CLUSTERPMCR_RES_MASK
  40934. CLUSTERPMCR_RES_VAL
  40935. CLUSTERPMINTENCLR_EL1
  40936. CLUSTERPMINTENSET_EL1
  40937. CLUSTERPMMDCR_EL1
  40938. CLUSTERPMOVSCLR_EL1
  40939. CLUSTERPMOVSSET_EL1
  40940. CLUSTERPMSELR_EL1
  40941. CLUSTERPMXEVCNTR_EL1
  40942. CLUSTERPMXEVTYPER_EL1
  40943. CLUSTER_16
  40944. CLUSTER_32
  40945. CLUSTER_ATTR
  40946. CLUSTER_ATTR_BUFFER_SIZE
  40947. CLUSTER_ATTR_CLUSTER_NAME
  40948. CLUSTER_ATTR_LOG_DEBUG
  40949. CLUSTER_ATTR_LOG_INFO
  40950. CLUSTER_ATTR_NEW_RSB_COUNT
  40951. CLUSTER_ATTR_PROTOCOL
  40952. CLUSTER_ATTR_RECOVER_CALLBACKS
  40953. CLUSTER_ATTR_RECOVER_TIMER
  40954. CLUSTER_ATTR_RSBTBL_SIZE
  40955. CLUSTER_ATTR_SCAN_SECS
  40956. CLUSTER_ATTR_TCP_PORT
  40957. CLUSTER_ATTR_TIMEWARN_CS
  40958. CLUSTER_ATTR_TOSS_SECS
  40959. CLUSTER_ATTR_WAITWARN_US
  40960. CLUSTER_CMD
  40961. CLUSTER_DBGAHB
  40962. CLUSTER_DEBUG_RESET_BIT
  40963. CLUSTER_DEBUG_RESET_STATUS
  40964. CLUSTER_DOWN
  40965. CLUSTER_DRIVE
  40966. CLUSTER_FE
  40967. CLUSTER_FLAG_FREE
  40968. CLUSTER_FLAG_HUGE
  40969. CLUSTER_FLAG_NEXT_NULL
  40970. CLUSTER_GOING_DOWN
  40971. CLUSTER_GRAS
  40972. CLUSTER_IDS
  40973. CLUSTER_L2_RESET_BIT
  40974. CLUSTER_L2_RESET_STATUS
  40975. CLUSTER_MOUNTED
  40976. CLUSTER_NAME_MAX
  40977. CLUSTER_OP
  40978. CLUSTER_PC_VS
  40979. CLUSTER_PS
  40980. CLUSTER_RESERVED
  40981. CLUSTER_RESERVE_STATE
  40982. CLUSTER_RESYNC_WINDOW
  40983. CLUSTER_RESYNC_WINDOW_SECTORS
  40984. CLUSTER_SP_PS
  40985. CLUSTER_SP_VS
  40986. CLUSTER_UP
  40987. CLUT_DATA
  40988. CLUT_INDEX_READ
  40989. CLUT_INDEX_WRITE
  40990. CLUT_SIZE
  40991. CLU_CASE_INSENSITIVE
  40992. CLU_CASE_SENSITIVE
  40993. CLU_MAX_SIZE
  40994. CLU_MIN_SIZE
  40995. CLU_PAD_SINK
  40996. CLU_PAD_SOURCE
  40997. CLU_SIZE
  40998. CLVRV
  40999. CLVWIN0
  41000. CLVWIN1
  41001. CLVWIN2
  41002. CLVWIN3
  41003. CLW_CNTRL
  41004. CLW_DPHYCONTRX
  41005. CLXY_PAUSE_QUANTA_CLX_PQNT
  41006. CLXY_PAUSE_QUANTA_CLY_PQNT
  41007. CLXY_PAUSE_THRESH_CLX_QTH
  41008. CLXY_PAUSE_THRESH_CLY_QTH
  41009. CLX_MEM_BAR_SIZE
  41010. CL_ANN
  41011. CL_AR33
  41012. CL_AR34
  41013. CL_COPY_ALL
  41014. CL_COPY_MNT_NS_FILE
  41015. CL_COPY_UNBINDABLE
  41016. CL_CRT19
  41017. CL_CRT1A
  41018. CL_CRT1B
  41019. CL_CRT1C
  41020. CL_CRT1D
  41021. CL_CRT1E
  41022. CL_CRT22
  41023. CL_CRT24
  41024. CL_CRT25
  41025. CL_CRT26
  41026. CL_CRT27
  41027. CL_CRT51
  41028. CL_DEF_RX_RING_SIZE
  41029. CL_DEF_TX_RING_SIZE
  41030. CL_DISPL
  41031. CL_DLEVEL1
  41032. CL_DLEVEL2
  41033. CL_DLEVEL3
  41034. CL_DUPLEX
  41035. CL_EHCI
  41036. CL_EXPIRE
  41037. CL_FC
  41038. CL_FUN_SCSI_CMD
  41039. CL_GR10
  41040. CL_GR11
  41041. CL_GR12
  41042. CL_GR13
  41043. CL_GR14
  41044. CL_GR15
  41045. CL_GR20
  41046. CL_GR21
  41047. CL_GR22
  41048. CL_GR23
  41049. CL_GR24
  41050. CL_GR25
  41051. CL_GR26
  41052. CL_GR27
  41053. CL_GR28
  41054. CL_GR29
  41055. CL_GR2A
  41056. CL_GR2C
  41057. CL_GR2D
  41058. CL_GR2E
  41059. CL_GR2F
  41060. CL_GR30
  41061. CL_GR31
  41062. CL_GR32
  41063. CL_GR33
  41064. CL_GR34
  41065. CL_GR35
  41066. CL_GR38
  41067. CL_GR39
  41068. CL_GR9
  41069. CL_GRA
  41070. CL_GRB
  41071. CL_GRC
  41072. CL_GRD
  41073. CL_GRE
  41074. CL_GRF
  41075. CL_INVOCATION_COUNT
  41076. CL_INVOCATION_COUNT_UDW
  41077. CL_KEYBD
  41078. CL_MAKE_SHARED
  41079. CL_MASK
  41080. CL_MAX_RX_RING_SIZE
  41081. CL_MAX_TX_RING_SIZE
  41082. CL_NULL
  41083. CL_OHCI
  41084. CL_POINTER_TOGGLE
  41085. CL_POS102
  41086. CL_POWER_DOWN_ENABLE
  41087. CL_PRIMITIVES_COUNT
  41088. CL_PRIMITIVES_COUNT_UDW
  41089. CL_PRINTF
  41090. CL_PRIVATE
  41091. CL_RANDOM
  41092. CL_REG
  41093. CL_RSP_FLAG_NODATA
  41094. CL_RSP_FLAG_SENSEDATA
  41095. CL_SD_BDLPLBA
  41096. CL_SD_BDLPLBA_MASK
  41097. CL_SD_BDLPLBA_PROT
  41098. CL_SD_BDLPLBA_PROT_MASK
  41099. CL_SD_BDLPLBA_PROT_SHIFT
  41100. CL_SD_BDLPLBA_SHIFT
  41101. CL_SD_BDLPUBA
  41102. CL_SD_BDLPUBA_MASK
  41103. CL_SD_BDLPUBA_SHIFT
  41104. CL_SD_CTL_DEIE
  41105. CL_SD_CTL_DEIE_MASK
  41106. CL_SD_CTL_DEIE_SHIFT
  41107. CL_SD_CTL_DIR
  41108. CL_SD_CTL_DIR_MASK
  41109. CL_SD_CTL_DIR_SHIFT
  41110. CL_SD_CTL_FEIE
  41111. CL_SD_CTL_FEIE_MASK
  41112. CL_SD_CTL_FEIE_SHIFT
  41113. CL_SD_CTL_FIFOLC
  41114. CL_SD_CTL_FIFOLC_MASK
  41115. CL_SD_CTL_FIFOLC_SHIFT
  41116. CL_SD_CTL_IOCE
  41117. CL_SD_CTL_IOCE_MASK
  41118. CL_SD_CTL_IOCE_SHIFT
  41119. CL_SD_CTL_RUN
  41120. CL_SD_CTL_RUN_MASK
  41121. CL_SD_CTL_RUN_SHIFT
  41122. CL_SD_CTL_SRST
  41123. CL_SD_CTL_SRST_MASK
  41124. CL_SD_CTL_SRST_SHIFT
  41125. CL_SD_CTL_STRIPE
  41126. CL_SD_CTL_STRIPE_MASK
  41127. CL_SD_CTL_STRIPE_SHIFT
  41128. CL_SD_CTL_STRM
  41129. CL_SD_CTL_STRM_MASK
  41130. CL_SD_CTL_STRM_SHIFT
  41131. CL_SD_CTL_TP
  41132. CL_SD_CTL_TP_MASK
  41133. CL_SD_CTL_TP_SHIFT
  41134. CL_SD_FIFOW
  41135. CL_SD_FIFOW_MASK
  41136. CL_SD_FIFOW_SHIFT
  41137. CL_SD_LVI
  41138. CL_SD_LVI_MASK
  41139. CL_SD_LVI_SHIFT
  41140. CL_SD_STS_BCIS
  41141. CL_SD_STS_DESE
  41142. CL_SD_STS_FIFOE
  41143. CL_SD_STS_FIFORDY
  41144. CL_SEL_MASK
  41145. CL_SEL_POS
  41146. CL_SEQR10
  41147. CL_SEQR11
  41148. CL_SEQR12
  41149. CL_SEQR13
  41150. CL_SEQR14
  41151. CL_SEQR15
  41152. CL_SEQR16
  41153. CL_SEQR17
  41154. CL_SEQR18
  41155. CL_SEQR19
  41156. CL_SEQR1A
  41157. CL_SEQR1B
  41158. CL_SEQR1C
  41159. CL_SEQR1D
  41160. CL_SEQR1E
  41161. CL_SEQR1F
  41162. CL_SEQR6
  41163. CL_SEQR7
  41164. CL_SEQR8
  41165. CL_SEQR9
  41166. CL_SEQRA
  41167. CL_SEQRB
  41168. CL_SEQRC
  41169. CL_SEQRD
  41170. CL_SEQRE
  41171. CL_SEQRF
  41172. CL_SEQU
  41173. CL_SHARED_TO_SLAVE
  41174. CL_SHIFT
  41175. CL_SIZE
  41176. CL_SLAVE
  41177. CL_SPBFIFO_SPBFCCTL_SPIBE
  41178. CL_SPBFIFO_SPBFCCTL_SPIBE_MASK
  41179. CL_SPBFIFO_SPBFCCTL_SPIBE_SHIFT
  41180. CL_SPBFIFO_SPBFCH_ID
  41181. CL_SPBFIFO_SPBFCH_ID_MASK
  41182. CL_SPBFIFO_SPBFCH_ID_SHIFT
  41183. CL_SPBFIFO_SPBFCH_PTR
  41184. CL_SPBFIFO_SPBFCH_PTR_MASK
  41185. CL_SPBFIFO_SPBFCH_PTR_SHIFT
  41186. CL_SPBFIFO_SPBFCH_VER
  41187. CL_SPBFIFO_SPBFCH_VER_MASK
  41188. CL_SPBFIFO_SPBFCH_VER_SHIFT
  41189. CL_SPRINTF
  41190. CL_ST_CHG_FAIL
  41191. CL_ST_CHG_SUCCESS
  41192. CL_TAB_ENTRY
  41193. CL_TX_PATH_DEFAULT
  41194. CL_TX_PATH_DMA
  41195. CL_TX_PATH_IPC
  41196. CL_UHCI
  41197. CL_UNIT_CLOCK_GATE_DISABLE
  41198. CL_VSSM
  41199. CL_VSSM2
  41200. CM
  41201. CM0_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT_MASK
  41202. CM0_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT__SHIFT
  41203. CM0_CM_3DLUT_DATA__CM_3DLUT_DATA0_MASK
  41204. CM0_CM_3DLUT_DATA__CM_3DLUT_DATA0__SHIFT
  41205. CM0_CM_3DLUT_DATA__CM_3DLUT_DATA1_MASK
  41206. CM0_CM_3DLUT_DATA__CM_3DLUT_DATA1__SHIFT
  41207. CM0_CM_3DLUT_INDEX__CM_3DLUT_INDEX_MASK
  41208. CM0_CM_3DLUT_INDEX__CM_3DLUT_INDEX__SHIFT
  41209. CM0_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK
  41210. CM0_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT
  41211. CM0_CM_3DLUT_MODE__CM_3DLUT_SIZE_MASK
  41212. CM0_CM_3DLUT_MODE__CM_3DLUT_SIZE__SHIFT
  41213. CM0_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR_MASK
  41214. CM0_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR__SHIFT
  41215. CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B_MASK
  41216. CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B__SHIFT
  41217. CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B_MASK
  41218. CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B__SHIFT
  41219. CM0_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G_MASK
  41220. CM0_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G__SHIFT
  41221. CM0_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G_MASK
  41222. CM0_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G__SHIFT
  41223. CM0_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R_MASK
  41224. CM0_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R__SHIFT
  41225. CM0_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R_MASK
  41226. CM0_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R__SHIFT
  41227. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN_MASK
  41228. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN__SHIFT
  41229. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS_MASK
  41230. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS__SHIFT
  41231. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL_MASK
  41232. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL__SHIFT
  41233. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL_MASK
  41234. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL__SHIFT
  41235. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK_MASK
  41236. CM0_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK__SHIFT
  41237. CM0_CM_BIAS_CR_R__CM_BIAS_CR_R_MASK
  41238. CM0_CM_BIAS_CR_R__CM_BIAS_CR_R__SHIFT
  41239. CM0_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B_MASK
  41240. CM0_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B__SHIFT
  41241. CM0_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G_MASK
  41242. CM0_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G__SHIFT
  41243. CM0_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE_MASK
  41244. CM0_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE__SHIFT
  41245. CM0_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA_MASK
  41246. CM0_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA__SHIFT
  41247. CM0_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX_MASK
  41248. CM0_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX__SHIFT
  41249. CM0_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS_MASK
  41250. CM0_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS__SHIFT
  41251. CM0_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK_MASK
  41252. CM0_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK__SHIFT
  41253. CM0_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL_MASK
  41254. CM0_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL__SHIFT
  41255. CM0_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B_MASK
  41256. CM0_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B__SHIFT
  41257. CM0_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G_MASK
  41258. CM0_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G__SHIFT
  41259. CM0_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R_MASK
  41260. CM0_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R__SHIFT
  41261. CM0_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  41262. CM0_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  41263. CM0_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  41264. CM0_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  41265. CM0_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  41266. CM0_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  41267. CM0_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  41268. CM0_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  41269. CM0_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  41270. CM0_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  41271. CM0_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  41272. CM0_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  41273. CM0_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  41274. CM0_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  41275. CM0_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  41276. CM0_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  41277. CM0_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  41278. CM0_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  41279. CM0_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  41280. CM0_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  41281. CM0_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  41282. CM0_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  41283. CM0_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  41284. CM0_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  41285. CM0_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  41286. CM0_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  41287. CM0_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  41288. CM0_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  41289. CM0_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  41290. CM0_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  41291. CM0_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  41292. CM0_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  41293. CM0_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  41294. CM0_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  41295. CM0_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  41296. CM0_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  41297. CM0_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  41298. CM0_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  41299. CM0_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  41300. CM0_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  41301. CM0_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  41302. CM0_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  41303. CM0_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  41304. CM0_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  41305. CM0_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  41306. CM0_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  41307. CM0_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  41308. CM0_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  41309. CM0_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  41310. CM0_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  41311. CM0_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  41312. CM0_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  41313. CM0_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  41314. CM0_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  41315. CM0_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  41316. CM0_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  41317. CM0_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  41318. CM0_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  41319. CM0_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  41320. CM0_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  41321. CM0_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  41322. CM0_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  41323. CM0_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  41324. CM0_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  41325. CM0_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  41326. CM0_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  41327. CM0_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  41328. CM0_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  41329. CM0_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  41330. CM0_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  41331. CM0_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  41332. CM0_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  41333. CM0_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  41334. CM0_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  41335. CM0_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  41336. CM0_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  41337. CM0_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  41338. CM0_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  41339. CM0_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  41340. CM0_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  41341. CM0_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  41342. CM0_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  41343. CM0_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  41344. CM0_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  41345. CM0_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  41346. CM0_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  41347. CM0_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  41348. CM0_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  41349. CM0_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  41350. CM0_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  41351. CM0_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  41352. CM0_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  41353. CM0_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  41354. CM0_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  41355. CM0_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  41356. CM0_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  41357. CM0_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  41358. CM0_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  41359. CM0_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  41360. CM0_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  41361. CM0_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  41362. CM0_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  41363. CM0_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  41364. CM0_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  41365. CM0_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  41366. CM0_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  41367. CM0_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  41368. CM0_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  41369. CM0_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  41370. CM0_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  41371. CM0_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  41372. CM0_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  41373. CM0_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  41374. CM0_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  41375. CM0_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  41376. CM0_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  41377. CM0_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  41378. CM0_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  41379. CM0_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  41380. CM0_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  41381. CM0_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  41382. CM0_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  41383. CM0_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  41384. CM0_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  41385. CM0_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  41386. CM0_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  41387. CM0_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  41388. CM0_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  41389. CM0_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  41390. CM0_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  41391. CM0_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  41392. CM0_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  41393. CM0_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  41394. CM0_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  41395. CM0_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  41396. CM0_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  41397. CM0_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  41398. CM0_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  41399. CM0_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  41400. CM0_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  41401. CM0_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  41402. CM0_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  41403. CM0_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  41404. CM0_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  41405. CM0_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  41406. CM0_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  41407. CM0_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  41408. CM0_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  41409. CM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  41410. CM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  41411. CM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  41412. CM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  41413. CM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  41414. CM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  41415. CM0_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B_MASK
  41416. CM0_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B__SHIFT
  41417. CM0_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  41418. CM0_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  41419. CM0_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G_MASK
  41420. CM0_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G__SHIFT
  41421. CM0_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  41422. CM0_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  41423. CM0_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R_MASK
  41424. CM0_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R__SHIFT
  41425. CM0_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  41426. CM0_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  41427. CM0_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B_MASK
  41428. CM0_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B__SHIFT
  41429. CM0_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G_MASK
  41430. CM0_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G__SHIFT
  41431. CM0_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R_MASK
  41432. CM0_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R__SHIFT
  41433. CM0_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  41434. CM0_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  41435. CM0_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  41436. CM0_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  41437. CM0_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  41438. CM0_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  41439. CM0_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  41440. CM0_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  41441. CM0_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  41442. CM0_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  41443. CM0_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  41444. CM0_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  41445. CM0_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  41446. CM0_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  41447. CM0_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  41448. CM0_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  41449. CM0_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  41450. CM0_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  41451. CM0_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  41452. CM0_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  41453. CM0_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  41454. CM0_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  41455. CM0_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  41456. CM0_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  41457. CM0_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  41458. CM0_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  41459. CM0_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  41460. CM0_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  41461. CM0_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  41462. CM0_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  41463. CM0_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  41464. CM0_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  41465. CM0_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  41466. CM0_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  41467. CM0_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  41468. CM0_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  41469. CM0_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  41470. CM0_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  41471. CM0_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  41472. CM0_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  41473. CM0_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  41474. CM0_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  41475. CM0_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  41476. CM0_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  41477. CM0_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  41478. CM0_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  41479. CM0_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  41480. CM0_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  41481. CM0_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  41482. CM0_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  41483. CM0_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  41484. CM0_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  41485. CM0_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  41486. CM0_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  41487. CM0_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  41488. CM0_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  41489. CM0_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  41490. CM0_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  41491. CM0_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  41492. CM0_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  41493. CM0_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  41494. CM0_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  41495. CM0_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  41496. CM0_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  41497. CM0_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  41498. CM0_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  41499. CM0_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  41500. CM0_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  41501. CM0_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  41502. CM0_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  41503. CM0_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  41504. CM0_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  41505. CM0_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  41506. CM0_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  41507. CM0_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  41508. CM0_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  41509. CM0_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  41510. CM0_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  41511. CM0_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  41512. CM0_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  41513. CM0_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  41514. CM0_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  41515. CM0_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  41516. CM0_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  41517. CM0_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  41518. CM0_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  41519. CM0_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  41520. CM0_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  41521. CM0_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  41522. CM0_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  41523. CM0_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  41524. CM0_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  41525. CM0_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  41526. CM0_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  41527. CM0_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  41528. CM0_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  41529. CM0_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  41530. CM0_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  41531. CM0_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  41532. CM0_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  41533. CM0_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  41534. CM0_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  41535. CM0_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  41536. CM0_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  41537. CM0_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  41538. CM0_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  41539. CM0_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  41540. CM0_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  41541. CM0_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  41542. CM0_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  41543. CM0_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  41544. CM0_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  41545. CM0_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  41546. CM0_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  41547. CM0_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  41548. CM0_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  41549. CM0_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  41550. CM0_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  41551. CM0_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  41552. CM0_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  41553. CM0_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  41554. CM0_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  41555. CM0_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  41556. CM0_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  41557. CM0_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  41558. CM0_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  41559. CM0_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  41560. CM0_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  41561. CM0_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  41562. CM0_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  41563. CM0_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  41564. CM0_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  41565. CM0_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  41566. CM0_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  41567. CM0_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  41568. CM0_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  41569. CM0_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  41570. CM0_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  41571. CM0_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  41572. CM0_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  41573. CM0_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  41574. CM0_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  41575. CM0_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  41576. CM0_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  41577. CM0_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  41578. CM0_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  41579. CM0_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  41580. CM0_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  41581. CM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  41582. CM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  41583. CM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  41584. CM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  41585. CM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  41586. CM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  41587. CM0_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B_MASK
  41588. CM0_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B__SHIFT
  41589. CM0_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  41590. CM0_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  41591. CM0_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G_MASK
  41592. CM0_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G__SHIFT
  41593. CM0_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  41594. CM0_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  41595. CM0_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R_MASK
  41596. CM0_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R__SHIFT
  41597. CM0_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  41598. CM0_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  41599. CM0_CM_BNS_VALUES_B__CM_BNS_BIAS_B_MASK
  41600. CM0_CM_BNS_VALUES_B__CM_BNS_BIAS_B__SHIFT
  41601. CM0_CM_BNS_VALUES_B__CM_BNS_SCALE_B_MASK
  41602. CM0_CM_BNS_VALUES_B__CM_BNS_SCALE_B__SHIFT
  41603. CM0_CM_BNS_VALUES_G__CM_BNS_BIAS_G_MASK
  41604. CM0_CM_BNS_VALUES_G__CM_BNS_BIAS_G__SHIFT
  41605. CM0_CM_BNS_VALUES_G__CM_BNS_SCALE_G_MASK
  41606. CM0_CM_BNS_VALUES_G__CM_BNS_SCALE_G__SHIFT
  41607. CM0_CM_BNS_VALUES_R__CM_BNS_BIAS_R_MASK
  41608. CM0_CM_BNS_VALUES_R__CM_BNS_BIAS_R__SHIFT
  41609. CM0_CM_BNS_VALUES_R__CM_BNS_SCALE_R_MASK
  41610. CM0_CM_BNS_VALUES_R__CM_BNS_SCALE_R__SHIFT
  41611. CM0_CM_CMOUT_CONTROL__CM_CMOUT_FRAME_RANDOM_ENABLE_MASK
  41612. CM0_CM_CMOUT_CONTROL__CM_CMOUT_FRAME_RANDOM_ENABLE__SHIFT
  41613. CM0_CM_CMOUT_CONTROL__CM_CMOUT_HIGHPASS_RANDOM_ENABLE_MASK
  41614. CM0_CM_CMOUT_CONTROL__CM_CMOUT_HIGHPASS_RANDOM_ENABLE__SHIFT
  41615. CM0_CM_CMOUT_CONTROL__CM_CMOUT_RGB_RANDOM_EN_MASK
  41616. CM0_CM_CMOUT_CONTROL__CM_CMOUT_RGB_RANDOM_EN__SHIFT
  41617. CM0_CM_CMOUT_CONTROL__CM_CMOUT_ROUND_TRUNC_MODE_MASK
  41618. CM0_CM_CMOUT_CONTROL__CM_CMOUT_ROUND_TRUNC_MODE__SHIFT
  41619. CM0_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_DEPTH_MASK
  41620. CM0_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_DEPTH__SHIFT
  41621. CM0_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_EN_MASK
  41622. CM0_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_EN__SHIFT
  41623. CM0_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_MODE_MASK
  41624. CM0_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_MODE__SHIFT
  41625. CM0_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_B_SEED_MASK
  41626. CM0_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_B_SEED__SHIFT
  41627. CM0_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_G_SEED_MASK
  41628. CM0_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_G_SEED__SHIFT
  41629. CM0_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_R_SEED_MASK
  41630. CM0_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_R_SEED__SHIFT
  41631. CM0_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK
  41632. CM0_CM_COEF_FORMAT__CM_BIAS_FORMAT__SHIFT
  41633. CM0_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK
  41634. CM0_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT__SHIFT
  41635. CM0_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT_MASK
  41636. CM0_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT__SHIFT
  41637. CM0_CM_COMA_C11_C12__CM_COMA_C11_MASK
  41638. CM0_CM_COMA_C11_C12__CM_COMA_C11__SHIFT
  41639. CM0_CM_COMA_C11_C12__CM_COMA_C12_MASK
  41640. CM0_CM_COMA_C11_C12__CM_COMA_C12__SHIFT
  41641. CM0_CM_COMA_C13_C14__CM_COMA_C13_MASK
  41642. CM0_CM_COMA_C13_C14__CM_COMA_C13__SHIFT
  41643. CM0_CM_COMA_C13_C14__CM_COMA_C14_MASK
  41644. CM0_CM_COMA_C13_C14__CM_COMA_C14__SHIFT
  41645. CM0_CM_COMA_C21_C22__CM_COMA_C21_MASK
  41646. CM0_CM_COMA_C21_C22__CM_COMA_C21__SHIFT
  41647. CM0_CM_COMA_C21_C22__CM_COMA_C22_MASK
  41648. CM0_CM_COMA_C21_C22__CM_COMA_C22__SHIFT
  41649. CM0_CM_COMA_C23_C24__CM_COMA_C23_MASK
  41650. CM0_CM_COMA_C23_C24__CM_COMA_C23__SHIFT
  41651. CM0_CM_COMA_C23_C24__CM_COMA_C24_MASK
  41652. CM0_CM_COMA_C23_C24__CM_COMA_C24__SHIFT
  41653. CM0_CM_COMA_C31_C32__CM_COMA_C31_MASK
  41654. CM0_CM_COMA_C31_C32__CM_COMA_C31__SHIFT
  41655. CM0_CM_COMA_C31_C32__CM_COMA_C32_MASK
  41656. CM0_CM_COMA_C31_C32__CM_COMA_C32__SHIFT
  41657. CM0_CM_COMA_C33_C34__CM_COMA_C33_MASK
  41658. CM0_CM_COMA_C33_C34__CM_COMA_C33__SHIFT
  41659. CM0_CM_COMA_C33_C34__CM_COMA_C34_MASK
  41660. CM0_CM_COMA_C33_C34__CM_COMA_C34__SHIFT
  41661. CM0_CM_COMB_C11_C12__CM_COMB_C11_MASK
  41662. CM0_CM_COMB_C11_C12__CM_COMB_C11__SHIFT
  41663. CM0_CM_COMB_C11_C12__CM_COMB_C12_MASK
  41664. CM0_CM_COMB_C11_C12__CM_COMB_C12__SHIFT
  41665. CM0_CM_COMB_C13_C14__CM_COMB_C13_MASK
  41666. CM0_CM_COMB_C13_C14__CM_COMB_C13__SHIFT
  41667. CM0_CM_COMB_C13_C14__CM_COMB_C14_MASK
  41668. CM0_CM_COMB_C13_C14__CM_COMB_C14__SHIFT
  41669. CM0_CM_COMB_C21_C22__CM_COMB_C21_MASK
  41670. CM0_CM_COMB_C21_C22__CM_COMB_C21__SHIFT
  41671. CM0_CM_COMB_C21_C22__CM_COMB_C22_MASK
  41672. CM0_CM_COMB_C21_C22__CM_COMB_C22__SHIFT
  41673. CM0_CM_COMB_C23_C24__CM_COMB_C23_MASK
  41674. CM0_CM_COMB_C23_C24__CM_COMB_C23__SHIFT
  41675. CM0_CM_COMB_C23_C24__CM_COMB_C24_MASK
  41676. CM0_CM_COMB_C23_C24__CM_COMB_C24__SHIFT
  41677. CM0_CM_COMB_C31_C32__CM_COMB_C31_MASK
  41678. CM0_CM_COMB_C31_C32__CM_COMB_C31__SHIFT
  41679. CM0_CM_COMB_C31_C32__CM_COMB_C32_MASK
  41680. CM0_CM_COMB_C31_C32__CM_COMB_C32__SHIFT
  41681. CM0_CM_COMB_C33_C34__CM_COMB_C33_MASK
  41682. CM0_CM_COMB_C33_C34__CM_COMB_C33__SHIFT
  41683. CM0_CM_COMB_C33_C34__CM_COMB_C34_MASK
  41684. CM0_CM_COMB_C33_C34__CM_COMB_C34__SHIFT
  41685. CM0_CM_CONTROL__CM_BYPASS_EN_MASK
  41686. CM0_CM_CONTROL__CM_BYPASS_EN__SHIFT
  41687. CM0_CM_CONTROL__CM_BYPASS_MASK
  41688. CM0_CM_CONTROL__CM_BYPASS__SHIFT
  41689. CM0_CM_CONTROL__CM_UPDATE_PENDING_MASK
  41690. CM0_CM_CONTROL__CM_UPDATE_PENDING__SHIFT
  41691. CM0_CM_DEALPHA__CM_DEALPHA_EN_MASK
  41692. CM0_CM_DEALPHA__CM_DEALPHA_EN__SHIFT
  41693. CM0_CM_DENORM_CONTROL__CM_DENORM_MODE_MASK
  41694. CM0_CM_DENORM_CONTROL__CM_DENORM_MODE__SHIFT
  41695. CM0_CM_DENORM_CONTROL__CM_DENORM_ROUND_CLAMP_MASK
  41696. CM0_CM_DENORM_CONTROL__CM_DENORM_ROUND_CLAMP__SHIFT
  41697. CM0_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE_MASK
  41698. CM0_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE__SHIFT
  41699. CM0_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA_MASK
  41700. CM0_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA__SHIFT
  41701. CM0_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX_MASK
  41702. CM0_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX__SHIFT
  41703. CM0_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS_MASK
  41704. CM0_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS__SHIFT
  41705. CM0_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK_MASK
  41706. CM0_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK__SHIFT
  41707. CM0_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL_MASK
  41708. CM0_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL__SHIFT
  41709. CM0_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY_MASK
  41710. CM0_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY__SHIFT
  41711. CM0_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B_MASK
  41712. CM0_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B__SHIFT
  41713. CM0_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G_MASK
  41714. CM0_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G__SHIFT
  41715. CM0_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R_MASK
  41716. CM0_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R__SHIFT
  41717. CM0_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  41718. CM0_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  41719. CM0_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  41720. CM0_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  41721. CM0_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  41722. CM0_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  41723. CM0_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  41724. CM0_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  41725. CM0_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  41726. CM0_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  41727. CM0_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  41728. CM0_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  41729. CM0_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  41730. CM0_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  41731. CM0_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  41732. CM0_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  41733. CM0_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  41734. CM0_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  41735. CM0_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  41736. CM0_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  41737. CM0_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  41738. CM0_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  41739. CM0_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  41740. CM0_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  41741. CM0_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  41742. CM0_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  41743. CM0_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  41744. CM0_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  41745. CM0_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  41746. CM0_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  41747. CM0_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  41748. CM0_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  41749. CM0_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  41750. CM0_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  41751. CM0_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  41752. CM0_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  41753. CM0_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  41754. CM0_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  41755. CM0_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  41756. CM0_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  41757. CM0_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  41758. CM0_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  41759. CM0_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  41760. CM0_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  41761. CM0_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  41762. CM0_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  41763. CM0_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  41764. CM0_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  41765. CM0_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  41766. CM0_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  41767. CM0_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  41768. CM0_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  41769. CM0_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  41770. CM0_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  41771. CM0_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  41772. CM0_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  41773. CM0_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  41774. CM0_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  41775. CM0_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  41776. CM0_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  41777. CM0_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  41778. CM0_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  41779. CM0_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  41780. CM0_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  41781. CM0_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  41782. CM0_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  41783. CM0_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  41784. CM0_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  41785. CM0_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  41786. CM0_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  41787. CM0_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  41788. CM0_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  41789. CM0_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  41790. CM0_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  41791. CM0_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  41792. CM0_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  41793. CM0_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  41794. CM0_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  41795. CM0_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  41796. CM0_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  41797. CM0_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  41798. CM0_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  41799. CM0_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B_MASK
  41800. CM0_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B__SHIFT
  41801. CM0_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  41802. CM0_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  41803. CM0_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G_MASK
  41804. CM0_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G__SHIFT
  41805. CM0_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  41806. CM0_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  41807. CM0_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R_MASK
  41808. CM0_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R__SHIFT
  41809. CM0_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  41810. CM0_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  41811. CM0_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B_MASK
  41812. CM0_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B__SHIFT
  41813. CM0_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G_MASK
  41814. CM0_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G__SHIFT
  41815. CM0_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R_MASK
  41816. CM0_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R__SHIFT
  41817. CM0_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  41818. CM0_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  41819. CM0_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  41820. CM0_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  41821. CM0_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  41822. CM0_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  41823. CM0_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  41824. CM0_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  41825. CM0_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  41826. CM0_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  41827. CM0_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  41828. CM0_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  41829. CM0_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  41830. CM0_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  41831. CM0_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  41832. CM0_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  41833. CM0_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  41834. CM0_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  41835. CM0_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  41836. CM0_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  41837. CM0_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  41838. CM0_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  41839. CM0_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  41840. CM0_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  41841. CM0_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  41842. CM0_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  41843. CM0_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  41844. CM0_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  41845. CM0_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  41846. CM0_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  41847. CM0_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  41848. CM0_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  41849. CM0_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  41850. CM0_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  41851. CM0_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  41852. CM0_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  41853. CM0_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  41854. CM0_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  41855. CM0_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  41856. CM0_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  41857. CM0_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  41858. CM0_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  41859. CM0_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  41860. CM0_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  41861. CM0_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  41862. CM0_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  41863. CM0_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  41864. CM0_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  41865. CM0_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  41866. CM0_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  41867. CM0_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  41868. CM0_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  41869. CM0_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  41870. CM0_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  41871. CM0_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  41872. CM0_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  41873. CM0_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  41874. CM0_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  41875. CM0_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  41876. CM0_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  41877. CM0_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  41878. CM0_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  41879. CM0_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  41880. CM0_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  41881. CM0_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  41882. CM0_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  41883. CM0_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  41884. CM0_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  41885. CM0_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  41886. CM0_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  41887. CM0_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  41888. CM0_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  41889. CM0_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  41890. CM0_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  41891. CM0_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  41892. CM0_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  41893. CM0_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  41894. CM0_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  41895. CM0_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  41896. CM0_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  41897. CM0_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  41898. CM0_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  41899. CM0_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B_MASK
  41900. CM0_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B__SHIFT
  41901. CM0_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  41902. CM0_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  41903. CM0_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G_MASK
  41904. CM0_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G__SHIFT
  41905. CM0_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  41906. CM0_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  41907. CM0_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R_MASK
  41908. CM0_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R__SHIFT
  41909. CM0_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  41910. CM0_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  41911. CM0_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11_MASK
  41912. CM0_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11__SHIFT
  41913. CM0_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12_MASK
  41914. CM0_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12__SHIFT
  41915. CM0_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13_MASK
  41916. CM0_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13__SHIFT
  41917. CM0_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14_MASK
  41918. CM0_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14__SHIFT
  41919. CM0_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21_MASK
  41920. CM0_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21__SHIFT
  41921. CM0_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22_MASK
  41922. CM0_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22__SHIFT
  41923. CM0_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23_MASK
  41924. CM0_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23__SHIFT
  41925. CM0_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24_MASK
  41926. CM0_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24__SHIFT
  41927. CM0_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31_MASK
  41928. CM0_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31__SHIFT
  41929. CM0_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32_MASK
  41930. CM0_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32__SHIFT
  41931. CM0_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33_MASK
  41932. CM0_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33__SHIFT
  41933. CM0_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34_MASK
  41934. CM0_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34__SHIFT
  41935. CM0_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11_MASK
  41936. CM0_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11__SHIFT
  41937. CM0_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12_MASK
  41938. CM0_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12__SHIFT
  41939. CM0_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13_MASK
  41940. CM0_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13__SHIFT
  41941. CM0_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14_MASK
  41942. CM0_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14__SHIFT
  41943. CM0_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21_MASK
  41944. CM0_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21__SHIFT
  41945. CM0_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22_MASK
  41946. CM0_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22__SHIFT
  41947. CM0_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23_MASK
  41948. CM0_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23__SHIFT
  41949. CM0_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24_MASK
  41950. CM0_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24__SHIFT
  41951. CM0_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31_MASK
  41952. CM0_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31__SHIFT
  41953. CM0_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32_MASK
  41954. CM0_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32__SHIFT
  41955. CM0_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33_MASK
  41956. CM0_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33__SHIFT
  41957. CM0_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34_MASK
  41958. CM0_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34__SHIFT
  41959. CM0_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE_MASK
  41960. CM0_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE__SHIFT
  41961. CM0_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF_MASK
  41962. CM0_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF__SHIFT
  41963. CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C11_MASK
  41964. CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT
  41965. CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C12_MASK
  41966. CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT
  41967. CM0_CM_ICSC_B_C13_C14__CM_ICSC_B_C13_MASK
  41968. CM0_CM_ICSC_B_C13_C14__CM_ICSC_B_C13__SHIFT
  41969. CM0_CM_ICSC_B_C13_C14__CM_ICSC_B_C14_MASK
  41970. CM0_CM_ICSC_B_C13_C14__CM_ICSC_B_C14__SHIFT
  41971. CM0_CM_ICSC_B_C21_C22__CM_ICSC_B_C21_MASK
  41972. CM0_CM_ICSC_B_C21_C22__CM_ICSC_B_C21__SHIFT
  41973. CM0_CM_ICSC_B_C21_C22__CM_ICSC_B_C22_MASK
  41974. CM0_CM_ICSC_B_C21_C22__CM_ICSC_B_C22__SHIFT
  41975. CM0_CM_ICSC_B_C23_C24__CM_ICSC_B_C23_MASK
  41976. CM0_CM_ICSC_B_C23_C24__CM_ICSC_B_C23__SHIFT
  41977. CM0_CM_ICSC_B_C23_C24__CM_ICSC_B_C24_MASK
  41978. CM0_CM_ICSC_B_C23_C24__CM_ICSC_B_C24__SHIFT
  41979. CM0_CM_ICSC_B_C31_C32__CM_ICSC_B_C31_MASK
  41980. CM0_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT
  41981. CM0_CM_ICSC_B_C31_C32__CM_ICSC_B_C32_MASK
  41982. CM0_CM_ICSC_B_C31_C32__CM_ICSC_B_C32__SHIFT
  41983. CM0_CM_ICSC_B_C33_C34__CM_ICSC_B_C33_MASK
  41984. CM0_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT
  41985. CM0_CM_ICSC_B_C33_C34__CM_ICSC_B_C34_MASK
  41986. CM0_CM_ICSC_B_C33_C34__CM_ICSC_B_C34__SHIFT
  41987. CM0_CM_ICSC_C11_C12__CM_ICSC_C11_MASK
  41988. CM0_CM_ICSC_C11_C12__CM_ICSC_C11__SHIFT
  41989. CM0_CM_ICSC_C11_C12__CM_ICSC_C12_MASK
  41990. CM0_CM_ICSC_C11_C12__CM_ICSC_C12__SHIFT
  41991. CM0_CM_ICSC_C13_C14__CM_ICSC_C13_MASK
  41992. CM0_CM_ICSC_C13_C14__CM_ICSC_C13__SHIFT
  41993. CM0_CM_ICSC_C13_C14__CM_ICSC_C14_MASK
  41994. CM0_CM_ICSC_C13_C14__CM_ICSC_C14__SHIFT
  41995. CM0_CM_ICSC_C21_C22__CM_ICSC_C21_MASK
  41996. CM0_CM_ICSC_C21_C22__CM_ICSC_C21__SHIFT
  41997. CM0_CM_ICSC_C21_C22__CM_ICSC_C22_MASK
  41998. CM0_CM_ICSC_C21_C22__CM_ICSC_C22__SHIFT
  41999. CM0_CM_ICSC_C23_C24__CM_ICSC_C23_MASK
  42000. CM0_CM_ICSC_C23_C24__CM_ICSC_C23__SHIFT
  42001. CM0_CM_ICSC_C23_C24__CM_ICSC_C24_MASK
  42002. CM0_CM_ICSC_C23_C24__CM_ICSC_C24__SHIFT
  42003. CM0_CM_ICSC_C31_C32__CM_ICSC_C31_MASK
  42004. CM0_CM_ICSC_C31_C32__CM_ICSC_C31__SHIFT
  42005. CM0_CM_ICSC_C31_C32__CM_ICSC_C32_MASK
  42006. CM0_CM_ICSC_C31_C32__CM_ICSC_C32__SHIFT
  42007. CM0_CM_ICSC_C33_C34__CM_ICSC_C33_MASK
  42008. CM0_CM_ICSC_C33_C34__CM_ICSC_C33__SHIFT
  42009. CM0_CM_ICSC_C33_C34__CM_ICSC_C34_MASK
  42010. CM0_CM_ICSC_C33_C34__CM_ICSC_C34__SHIFT
  42011. CM0_CM_ICSC_CONTROL__CM_ICSC_MODE_MASK
  42012. CM0_CM_ICSC_CONTROL__CM_ICSC_MODE__SHIFT
  42013. CM0_CM_IGAM_CONTROL__CM_IGAM_INPUT_FORMAT_MASK
  42014. CM0_CM_IGAM_CONTROL__CM_IGAM_INPUT_FORMAT__SHIFT
  42015. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_B_FLOAT_POINT_EN_MASK
  42016. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_B_FLOAT_POINT_EN__SHIFT
  42017. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_B_MASK
  42018. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_B__SHIFT
  42019. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_G_MASK
  42020. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_G__SHIFT
  42021. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_R_MASK
  42022. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_R__SHIFT
  42023. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_B_MASK
  42024. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_B__SHIFT
  42025. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_G_MASK
  42026. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_G__SHIFT
  42027. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_R_MASK
  42028. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_R__SHIFT
  42029. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_G_FLOAT_POINT_EN_MASK
  42030. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_G_FLOAT_POINT_EN__SHIFT
  42031. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_B_MASK
  42032. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_B__SHIFT
  42033. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_G_MASK
  42034. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_G__SHIFT
  42035. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_R_MASK
  42036. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_R__SHIFT
  42037. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_MODE_MASK
  42038. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_MODE__SHIFT
  42039. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_R_FLOAT_POINT_EN_MASK
  42040. CM0_CM_IGAM_CONTROL__CM_IGAM_LUT_R_FLOAT_POINT_EN__SHIFT
  42041. CM0_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_BLUE_MASK
  42042. CM0_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_BLUE__SHIFT
  42043. CM0_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_GREEN_MASK
  42044. CM0_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_GREEN__SHIFT
  42045. CM0_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_RED_MASK
  42046. CM0_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_RED__SHIFT
  42047. CM0_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_DONE_MASK
  42048. CM0_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_DONE__SHIFT
  42049. CM0_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_MASK
  42050. CM0_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL__SHIFT
  42051. CM0_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_BLACK_OFFSET_BLUE_MASK
  42052. CM0_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_BLACK_OFFSET_BLUE__SHIFT
  42053. CM0_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_WHITE_OFFSET_BLUE_MASK
  42054. CM0_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_WHITE_OFFSET_BLUE__SHIFT
  42055. CM0_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_BLACK_OFFSET_GREEN_MASK
  42056. CM0_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_BLACK_OFFSET_GREEN__SHIFT
  42057. CM0_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_WHITE_OFFSET_GREEN_MASK
  42058. CM0_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_WHITE_OFFSET_GREEN__SHIFT
  42059. CM0_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_BLACK_OFFSET_RED_MASK
  42060. CM0_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_BLACK_OFFSET_RED__SHIFT
  42061. CM0_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_WHITE_OFFSET_RED_MASK
  42062. CM0_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_WHITE_OFFSET_RED__SHIFT
  42063. CM0_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_BASE_MASK
  42064. CM0_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_BASE__SHIFT
  42065. CM0_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_DELTA_MASK
  42066. CM0_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_DELTA__SHIFT
  42067. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_DGAM_CONFIG_STATUS_MASK
  42068. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_DGAM_CONFIG_STATUS__SHIFT
  42069. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_HOST_EN_MASK
  42070. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_HOST_EN__SHIFT
  42071. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_RW_MODE_MASK
  42072. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_RW_MODE__SHIFT
  42073. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_SEL_MASK
  42074. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_SEL__SHIFT
  42075. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_WRITE_EN_MASK_MASK
  42076. CM0_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_WRITE_EN_MASK__SHIFT
  42077. CM0_CM_IGAM_LUT_RW_INDEX__CM_IGAM_LUT_RW_INDEX_MASK
  42078. CM0_CM_IGAM_LUT_RW_INDEX__CM_IGAM_LUT_RW_INDEX__SHIFT
  42079. CM0_CM_IGAM_LUT_SEQ_COLOR__CM_IGAM_LUT_SEQ_COLOR_MASK
  42080. CM0_CM_IGAM_LUT_SEQ_COLOR__CM_IGAM_LUT_SEQ_COLOR__SHIFT
  42081. CM0_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS_MASK
  42082. CM0_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS__SHIFT
  42083. CM0_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE_MASK
  42084. CM0_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE__SHIFT
  42085. CM0_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS_MASK
  42086. CM0_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS__SHIFT
  42087. CM0_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE_MASK
  42088. CM0_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE__SHIFT
  42089. CM0_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK
  42090. CM0_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT
  42091. CM0_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE_MASK
  42092. CM0_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE__SHIFT
  42093. CM0_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_DIS_MASK
  42094. CM0_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_DIS__SHIFT
  42095. CM0_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_FORCE_MASK
  42096. CM0_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_FORCE__SHIFT
  42097. CM0_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS_MASK
  42098. CM0_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS__SHIFT
  42099. CM0_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE_MASK
  42100. CM0_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE__SHIFT
  42101. CM0_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE_MASK
  42102. CM0_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE__SHIFT
  42103. CM0_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE_MASK
  42104. CM0_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE__SHIFT
  42105. CM0_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE_MASK
  42106. CM0_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE__SHIFT
  42107. CM0_CM_MEM_PWR_STATUS__RGAM_MEM_PWR_STATE_MASK
  42108. CM0_CM_MEM_PWR_STATUS__RGAM_MEM_PWR_STATE__SHIFT
  42109. CM0_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE_MASK
  42110. CM0_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT
  42111. CM0_CM_OCSC_C11_C12__CM_OCSC_C11_MASK
  42112. CM0_CM_OCSC_C11_C12__CM_OCSC_C11__SHIFT
  42113. CM0_CM_OCSC_C11_C12__CM_OCSC_C12_MASK
  42114. CM0_CM_OCSC_C11_C12__CM_OCSC_C12__SHIFT
  42115. CM0_CM_OCSC_C13_C14__CM_OCSC_C13_MASK
  42116. CM0_CM_OCSC_C13_C14__CM_OCSC_C13__SHIFT
  42117. CM0_CM_OCSC_C13_C14__CM_OCSC_C14_MASK
  42118. CM0_CM_OCSC_C13_C14__CM_OCSC_C14__SHIFT
  42119. CM0_CM_OCSC_C21_C22__CM_OCSC_C21_MASK
  42120. CM0_CM_OCSC_C21_C22__CM_OCSC_C21__SHIFT
  42121. CM0_CM_OCSC_C21_C22__CM_OCSC_C22_MASK
  42122. CM0_CM_OCSC_C21_C22__CM_OCSC_C22__SHIFT
  42123. CM0_CM_OCSC_C23_C24__CM_OCSC_C23_MASK
  42124. CM0_CM_OCSC_C23_C24__CM_OCSC_C23__SHIFT
  42125. CM0_CM_OCSC_C23_C24__CM_OCSC_C24_MASK
  42126. CM0_CM_OCSC_C23_C24__CM_OCSC_C24__SHIFT
  42127. CM0_CM_OCSC_C31_C32__CM_OCSC_C31_MASK
  42128. CM0_CM_OCSC_C31_C32__CM_OCSC_C31__SHIFT
  42129. CM0_CM_OCSC_C31_C32__CM_OCSC_C32_MASK
  42130. CM0_CM_OCSC_C31_C32__CM_OCSC_C32__SHIFT
  42131. CM0_CM_OCSC_C33_C34__CM_OCSC_C33_MASK
  42132. CM0_CM_OCSC_C33_C34__CM_OCSC_C33__SHIFT
  42133. CM0_CM_OCSC_C33_C34__CM_OCSC_C34_MASK
  42134. CM0_CM_OCSC_C33_C34__CM_OCSC_C34__SHIFT
  42135. CM0_CM_OCSC_CONTROL__CM_OCSC_MODE_MASK
  42136. CM0_CM_OCSC_CONTROL__CM_OCSC_MODE__SHIFT
  42137. CM0_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MAX_B_MASK
  42138. CM0_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MAX_B__SHIFT
  42139. CM0_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MIN_B_MASK
  42140. CM0_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MIN_B__SHIFT
  42141. CM0_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MAX_G_MASK
  42142. CM0_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MAX_G__SHIFT
  42143. CM0_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MIN_G_MASK
  42144. CM0_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MIN_G__SHIFT
  42145. CM0_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MAX_R_MASK
  42146. CM0_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MAX_R__SHIFT
  42147. CM0_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MIN_R_MASK
  42148. CM0_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MIN_R__SHIFT
  42149. CM0_CM_RGAM_CONTROL__CM_RGAM_LUT_MODE_MASK
  42150. CM0_CM_RGAM_CONTROL__CM_RGAM_LUT_MODE__SHIFT
  42151. CM0_CM_RGAM_LUT_DATA__CM_RGAM_LUT_DATA_MASK
  42152. CM0_CM_RGAM_LUT_DATA__CM_RGAM_LUT_DATA__SHIFT
  42153. CM0_CM_RGAM_LUT_INDEX__CM_RGAM_LUT_INDEX_MASK
  42154. CM0_CM_RGAM_LUT_INDEX__CM_RGAM_LUT_INDEX__SHIFT
  42155. CM0_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_CONFIG_STATUS_MASK
  42156. CM0_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_CONFIG_STATUS__SHIFT
  42157. CM0_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_EN_MASK_MASK
  42158. CM0_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_EN_MASK__SHIFT
  42159. CM0_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_SEL_MASK
  42160. CM0_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_SEL__SHIFT
  42161. CM0_CM_RGAM_RAMA_END_CNTL1_B__CM_RGAM_RAMA_EXP_REGION_END_B_MASK
  42162. CM0_CM_RGAM_RAMA_END_CNTL1_B__CM_RGAM_RAMA_EXP_REGION_END_B__SHIFT
  42163. CM0_CM_RGAM_RAMA_END_CNTL1_G__CM_RGAM_RAMA_EXP_REGION_END_G_MASK
  42164. CM0_CM_RGAM_RAMA_END_CNTL1_G__CM_RGAM_RAMA_EXP_REGION_END_G__SHIFT
  42165. CM0_CM_RGAM_RAMA_END_CNTL1_R__CM_RGAM_RAMA_EXP_REGION_END_R_MASK
  42166. CM0_CM_RGAM_RAMA_END_CNTL1_R__CM_RGAM_RAMA_EXP_REGION_END_R__SHIFT
  42167. CM0_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  42168. CM0_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  42169. CM0_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  42170. CM0_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  42171. CM0_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  42172. CM0_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  42173. CM0_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  42174. CM0_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  42175. CM0_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  42176. CM0_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  42177. CM0_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  42178. CM0_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  42179. CM0_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  42180. CM0_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  42181. CM0_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  42182. CM0_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  42183. CM0_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  42184. CM0_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  42185. CM0_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  42186. CM0_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  42187. CM0_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  42188. CM0_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  42189. CM0_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  42190. CM0_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  42191. CM0_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  42192. CM0_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  42193. CM0_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  42194. CM0_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  42195. CM0_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  42196. CM0_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  42197. CM0_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  42198. CM0_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  42199. CM0_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  42200. CM0_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  42201. CM0_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  42202. CM0_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  42203. CM0_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  42204. CM0_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  42205. CM0_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  42206. CM0_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  42207. CM0_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  42208. CM0_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  42209. CM0_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  42210. CM0_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  42211. CM0_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  42212. CM0_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  42213. CM0_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  42214. CM0_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  42215. CM0_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  42216. CM0_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  42217. CM0_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  42218. CM0_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  42219. CM0_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  42220. CM0_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  42221. CM0_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  42222. CM0_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  42223. CM0_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  42224. CM0_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  42225. CM0_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  42226. CM0_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  42227. CM0_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  42228. CM0_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  42229. CM0_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  42230. CM0_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  42231. CM0_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  42232. CM0_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  42233. CM0_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  42234. CM0_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  42235. CM0_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  42236. CM0_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  42237. CM0_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  42238. CM0_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  42239. CM0_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  42240. CM0_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  42241. CM0_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  42242. CM0_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  42243. CM0_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  42244. CM0_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  42245. CM0_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  42246. CM0_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  42247. CM0_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  42248. CM0_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  42249. CM0_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  42250. CM0_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  42251. CM0_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  42252. CM0_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  42253. CM0_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  42254. CM0_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  42255. CM0_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  42256. CM0_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  42257. CM0_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  42258. CM0_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  42259. CM0_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  42260. CM0_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  42261. CM0_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  42262. CM0_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  42263. CM0_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  42264. CM0_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  42265. CM0_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  42266. CM0_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  42267. CM0_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  42268. CM0_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  42269. CM0_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  42270. CM0_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  42271. CM0_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  42272. CM0_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  42273. CM0_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  42274. CM0_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  42275. CM0_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  42276. CM0_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  42277. CM0_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  42278. CM0_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  42279. CM0_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  42280. CM0_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  42281. CM0_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  42282. CM0_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  42283. CM0_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  42284. CM0_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  42285. CM0_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  42286. CM0_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  42287. CM0_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  42288. CM0_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  42289. CM0_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  42290. CM0_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  42291. CM0_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  42292. CM0_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  42293. CM0_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  42294. CM0_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  42295. CM0_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  42296. CM0_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  42297. CM0_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  42298. CM0_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  42299. CM0_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  42300. CM0_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  42301. CM0_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  42302. CM0_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  42303. CM0_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  42304. CM0_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  42305. CM0_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  42306. CM0_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  42307. CM0_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  42308. CM0_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  42309. CM0_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  42310. CM0_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  42311. CM0_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  42312. CM0_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  42313. CM0_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  42314. CM0_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  42315. CM0_CM_RGAM_RAMA_SLOPE_CNTL_B__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  42316. CM0_CM_RGAM_RAMA_SLOPE_CNTL_B__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  42317. CM0_CM_RGAM_RAMA_SLOPE_CNTL_G__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  42318. CM0_CM_RGAM_RAMA_SLOPE_CNTL_G__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  42319. CM0_CM_RGAM_RAMA_SLOPE_CNTL_R__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  42320. CM0_CM_RGAM_RAMA_SLOPE_CNTL_R__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  42321. CM0_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_B_MASK
  42322. CM0_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_B__SHIFT
  42323. CM0_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  42324. CM0_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  42325. CM0_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_G_MASK
  42326. CM0_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_G__SHIFT
  42327. CM0_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  42328. CM0_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  42329. CM0_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_R_MASK
  42330. CM0_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_R__SHIFT
  42331. CM0_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  42332. CM0_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  42333. CM0_CM_RGAM_RAMB_END_CNTL1_B__CM_RGAM_RAMB_EXP_REGION_END_B_MASK
  42334. CM0_CM_RGAM_RAMB_END_CNTL1_B__CM_RGAM_RAMB_EXP_REGION_END_B__SHIFT
  42335. CM0_CM_RGAM_RAMB_END_CNTL1_G__CM_RGAM_RAMB_EXP_REGION_END_G_MASK
  42336. CM0_CM_RGAM_RAMB_END_CNTL1_G__CM_RGAM_RAMB_EXP_REGION_END_G__SHIFT
  42337. CM0_CM_RGAM_RAMB_END_CNTL1_R__CM_RGAM_RAMB_EXP_REGION_END_R_MASK
  42338. CM0_CM_RGAM_RAMB_END_CNTL1_R__CM_RGAM_RAMB_EXP_REGION_END_R__SHIFT
  42339. CM0_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  42340. CM0_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  42341. CM0_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  42342. CM0_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  42343. CM0_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  42344. CM0_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  42345. CM0_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  42346. CM0_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  42347. CM0_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  42348. CM0_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  42349. CM0_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  42350. CM0_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  42351. CM0_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  42352. CM0_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  42353. CM0_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  42354. CM0_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  42355. CM0_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  42356. CM0_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  42357. CM0_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  42358. CM0_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  42359. CM0_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  42360. CM0_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  42361. CM0_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  42362. CM0_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  42363. CM0_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  42364. CM0_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  42365. CM0_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  42366. CM0_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  42367. CM0_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  42368. CM0_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  42369. CM0_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  42370. CM0_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  42371. CM0_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  42372. CM0_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  42373. CM0_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  42374. CM0_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  42375. CM0_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  42376. CM0_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  42377. CM0_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  42378. CM0_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  42379. CM0_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  42380. CM0_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  42381. CM0_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  42382. CM0_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  42383. CM0_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  42384. CM0_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  42385. CM0_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  42386. CM0_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  42387. CM0_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  42388. CM0_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  42389. CM0_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  42390. CM0_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  42391. CM0_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  42392. CM0_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  42393. CM0_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  42394. CM0_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  42395. CM0_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  42396. CM0_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  42397. CM0_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  42398. CM0_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  42399. CM0_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  42400. CM0_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  42401. CM0_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  42402. CM0_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  42403. CM0_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  42404. CM0_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  42405. CM0_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  42406. CM0_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  42407. CM0_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  42408. CM0_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  42409. CM0_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  42410. CM0_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  42411. CM0_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  42412. CM0_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  42413. CM0_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  42414. CM0_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  42415. CM0_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  42416. CM0_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  42417. CM0_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  42418. CM0_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  42419. CM0_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  42420. CM0_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  42421. CM0_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  42422. CM0_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  42423. CM0_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  42424. CM0_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  42425. CM0_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  42426. CM0_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  42427. CM0_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  42428. CM0_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  42429. CM0_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  42430. CM0_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  42431. CM0_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  42432. CM0_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  42433. CM0_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  42434. CM0_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  42435. CM0_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  42436. CM0_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  42437. CM0_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  42438. CM0_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  42439. CM0_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  42440. CM0_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  42441. CM0_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  42442. CM0_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  42443. CM0_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  42444. CM0_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  42445. CM0_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  42446. CM0_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  42447. CM0_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  42448. CM0_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  42449. CM0_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  42450. CM0_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  42451. CM0_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  42452. CM0_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  42453. CM0_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  42454. CM0_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  42455. CM0_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  42456. CM0_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  42457. CM0_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  42458. CM0_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  42459. CM0_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  42460. CM0_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  42461. CM0_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  42462. CM0_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  42463. CM0_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  42464. CM0_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  42465. CM0_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  42466. CM0_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  42467. CM0_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  42468. CM0_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  42469. CM0_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  42470. CM0_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  42471. CM0_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  42472. CM0_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  42473. CM0_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  42474. CM0_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  42475. CM0_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  42476. CM0_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  42477. CM0_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  42478. CM0_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  42479. CM0_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  42480. CM0_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  42481. CM0_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  42482. CM0_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  42483. CM0_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  42484. CM0_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  42485. CM0_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  42486. CM0_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  42487. CM0_CM_RGAM_RAMB_SLOPE_CNTL_B__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  42488. CM0_CM_RGAM_RAMB_SLOPE_CNTL_B__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  42489. CM0_CM_RGAM_RAMB_SLOPE_CNTL_G__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  42490. CM0_CM_RGAM_RAMB_SLOPE_CNTL_G__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  42491. CM0_CM_RGAM_RAMB_SLOPE_CNTL_R__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  42492. CM0_CM_RGAM_RAMB_SLOPE_CNTL_R__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  42493. CM0_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_B_MASK
  42494. CM0_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_B__SHIFT
  42495. CM0_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  42496. CM0_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  42497. CM0_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_G_MASK
  42498. CM0_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_G__SHIFT
  42499. CM0_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  42500. CM0_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  42501. CM0_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_R_MASK
  42502. CM0_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_R__SHIFT
  42503. CM0_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  42504. CM0_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  42505. CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK
  42506. CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT
  42507. CM0_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA_MASK
  42508. CM0_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA__SHIFT
  42509. CM0_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX_MASK
  42510. CM0_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX__SHIFT
  42511. CM0_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS_MASK
  42512. CM0_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS__SHIFT
  42513. CM0_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK_MASK
  42514. CM0_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK__SHIFT
  42515. CM0_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL_MASK
  42516. CM0_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL__SHIFT
  42517. CM0_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B_MASK
  42518. CM0_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B__SHIFT
  42519. CM0_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G_MASK
  42520. CM0_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G__SHIFT
  42521. CM0_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R_MASK
  42522. CM0_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R__SHIFT
  42523. CM0_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B_MASK
  42524. CM0_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B__SHIFT
  42525. CM0_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B_MASK
  42526. CM0_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B__SHIFT
  42527. CM0_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G_MASK
  42528. CM0_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G__SHIFT
  42529. CM0_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G_MASK
  42530. CM0_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G__SHIFT
  42531. CM0_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R_MASK
  42532. CM0_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R__SHIFT
  42533. CM0_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R_MASK
  42534. CM0_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R__SHIFT
  42535. CM0_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  42536. CM0_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  42537. CM0_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  42538. CM0_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  42539. CM0_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  42540. CM0_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  42541. CM0_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  42542. CM0_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  42543. CM0_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  42544. CM0_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  42545. CM0_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  42546. CM0_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  42547. CM0_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  42548. CM0_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  42549. CM0_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  42550. CM0_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  42551. CM0_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  42552. CM0_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  42553. CM0_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  42554. CM0_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  42555. CM0_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  42556. CM0_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  42557. CM0_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  42558. CM0_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  42559. CM0_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  42560. CM0_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  42561. CM0_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  42562. CM0_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  42563. CM0_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  42564. CM0_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  42565. CM0_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  42566. CM0_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  42567. CM0_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  42568. CM0_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  42569. CM0_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  42570. CM0_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  42571. CM0_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  42572. CM0_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  42573. CM0_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  42574. CM0_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  42575. CM0_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  42576. CM0_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  42577. CM0_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  42578. CM0_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  42579. CM0_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  42580. CM0_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  42581. CM0_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  42582. CM0_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  42583. CM0_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  42584. CM0_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  42585. CM0_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  42586. CM0_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  42587. CM0_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  42588. CM0_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  42589. CM0_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  42590. CM0_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  42591. CM0_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  42592. CM0_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  42593. CM0_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  42594. CM0_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  42595. CM0_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  42596. CM0_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  42597. CM0_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  42598. CM0_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  42599. CM0_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  42600. CM0_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  42601. CM0_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  42602. CM0_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  42603. CM0_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  42604. CM0_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  42605. CM0_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  42606. CM0_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  42607. CM0_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  42608. CM0_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  42609. CM0_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  42610. CM0_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  42611. CM0_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  42612. CM0_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  42613. CM0_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  42614. CM0_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  42615. CM0_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  42616. CM0_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  42617. CM0_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  42618. CM0_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  42619. CM0_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  42620. CM0_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  42621. CM0_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  42622. CM0_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  42623. CM0_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  42624. CM0_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  42625. CM0_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  42626. CM0_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  42627. CM0_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  42628. CM0_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  42629. CM0_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  42630. CM0_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  42631. CM0_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  42632. CM0_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  42633. CM0_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  42634. CM0_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  42635. CM0_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  42636. CM0_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  42637. CM0_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  42638. CM0_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  42639. CM0_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  42640. CM0_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  42641. CM0_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  42642. CM0_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  42643. CM0_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  42644. CM0_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  42645. CM0_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  42646. CM0_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  42647. CM0_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  42648. CM0_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  42649. CM0_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  42650. CM0_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  42651. CM0_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  42652. CM0_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  42653. CM0_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  42654. CM0_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  42655. CM0_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  42656. CM0_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  42657. CM0_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  42658. CM0_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  42659. CM0_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  42660. CM0_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  42661. CM0_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  42662. CM0_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  42663. CM0_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  42664. CM0_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  42665. CM0_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  42666. CM0_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  42667. CM0_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  42668. CM0_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  42669. CM0_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  42670. CM0_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  42671. CM0_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B_MASK
  42672. CM0_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B__SHIFT
  42673. CM0_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  42674. CM0_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  42675. CM0_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G_MASK
  42676. CM0_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G__SHIFT
  42677. CM0_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  42678. CM0_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  42679. CM0_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R_MASK
  42680. CM0_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R__SHIFT
  42681. CM0_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  42682. CM0_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  42683. CM0_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B_MASK
  42684. CM0_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B__SHIFT
  42685. CM0_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B_MASK
  42686. CM0_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B__SHIFT
  42687. CM0_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G_MASK
  42688. CM0_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G__SHIFT
  42689. CM0_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G_MASK
  42690. CM0_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G__SHIFT
  42691. CM0_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R_MASK
  42692. CM0_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R__SHIFT
  42693. CM0_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R_MASK
  42694. CM0_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R__SHIFT
  42695. CM0_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  42696. CM0_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  42697. CM0_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  42698. CM0_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  42699. CM0_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  42700. CM0_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  42701. CM0_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  42702. CM0_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  42703. CM0_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  42704. CM0_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  42705. CM0_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  42706. CM0_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  42707. CM0_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  42708. CM0_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  42709. CM0_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  42710. CM0_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  42711. CM0_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  42712. CM0_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  42713. CM0_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  42714. CM0_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  42715. CM0_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  42716. CM0_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  42717. CM0_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  42718. CM0_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  42719. CM0_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  42720. CM0_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  42721. CM0_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  42722. CM0_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  42723. CM0_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  42724. CM0_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  42725. CM0_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  42726. CM0_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  42727. CM0_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  42728. CM0_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  42729. CM0_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  42730. CM0_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  42731. CM0_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  42732. CM0_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  42733. CM0_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  42734. CM0_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  42735. CM0_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  42736. CM0_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  42737. CM0_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  42738. CM0_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  42739. CM0_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  42740. CM0_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  42741. CM0_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  42742. CM0_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  42743. CM0_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  42744. CM0_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  42745. CM0_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  42746. CM0_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  42747. CM0_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  42748. CM0_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  42749. CM0_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  42750. CM0_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  42751. CM0_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  42752. CM0_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  42753. CM0_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  42754. CM0_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  42755. CM0_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  42756. CM0_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  42757. CM0_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  42758. CM0_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  42759. CM0_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  42760. CM0_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  42761. CM0_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  42762. CM0_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  42763. CM0_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  42764. CM0_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  42765. CM0_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  42766. CM0_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  42767. CM0_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  42768. CM0_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  42769. CM0_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  42770. CM0_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  42771. CM0_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  42772. CM0_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  42773. CM0_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  42774. CM0_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  42775. CM0_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  42776. CM0_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  42777. CM0_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  42778. CM0_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  42779. CM0_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  42780. CM0_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  42781. CM0_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  42782. CM0_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  42783. CM0_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  42784. CM0_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  42785. CM0_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  42786. CM0_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  42787. CM0_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  42788. CM0_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  42789. CM0_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  42790. CM0_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  42791. CM0_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  42792. CM0_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  42793. CM0_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  42794. CM0_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  42795. CM0_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  42796. CM0_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  42797. CM0_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  42798. CM0_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  42799. CM0_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  42800. CM0_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  42801. CM0_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  42802. CM0_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  42803. CM0_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  42804. CM0_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  42805. CM0_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  42806. CM0_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  42807. CM0_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  42808. CM0_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  42809. CM0_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  42810. CM0_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  42811. CM0_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  42812. CM0_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  42813. CM0_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  42814. CM0_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  42815. CM0_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  42816. CM0_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  42817. CM0_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  42818. CM0_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  42819. CM0_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  42820. CM0_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  42821. CM0_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  42822. CM0_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  42823. CM0_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  42824. CM0_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  42825. CM0_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  42826. CM0_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  42827. CM0_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  42828. CM0_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  42829. CM0_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  42830. CM0_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  42831. CM0_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B_MASK
  42832. CM0_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B__SHIFT
  42833. CM0_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  42834. CM0_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  42835. CM0_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G_MASK
  42836. CM0_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G__SHIFT
  42837. CM0_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  42838. CM0_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  42839. CM0_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R_MASK
  42840. CM0_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R__SHIFT
  42841. CM0_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  42842. CM0_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  42843. CM0_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B_MASK
  42844. CM0_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B__SHIFT
  42845. CM0_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G_MASK
  42846. CM0_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G__SHIFT
  42847. CM0_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R_MASK
  42848. CM0_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R__SHIFT
  42849. CM0_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA_MASK
  42850. CM0_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA__SHIFT
  42851. CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK
  42852. CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT
  42853. CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK
  42854. CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT
  42855. CM0_COLOR_EVICT_DISABLE
  42856. CM0_DEPTH_EVICT_DISABLE
  42857. CM0_DEPTH_WRITE_DISABLE
  42858. CM0_IZ_OPT_DISABLE
  42859. CM0_PIPELINED_RENDER_FLUSH_DISABLE
  42860. CM0_RC_OP_FLUSH_DISABLE
  42861. CM0_STC_EVICT_DISABLE_LRA_SNB
  42862. CM0_ZR_OPT_DISABLE
  42863. CM11INTVEC0
  42864. CM11INTVEC1
  42865. CM11INTVEC2
  42866. CM1_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT_MASK
  42867. CM1_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT__SHIFT
  42868. CM1_CM_3DLUT_DATA__CM_3DLUT_DATA0_MASK
  42869. CM1_CM_3DLUT_DATA__CM_3DLUT_DATA0__SHIFT
  42870. CM1_CM_3DLUT_DATA__CM_3DLUT_DATA1_MASK
  42871. CM1_CM_3DLUT_DATA__CM_3DLUT_DATA1__SHIFT
  42872. CM1_CM_3DLUT_INDEX__CM_3DLUT_INDEX_MASK
  42873. CM1_CM_3DLUT_INDEX__CM_3DLUT_INDEX__SHIFT
  42874. CM1_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK
  42875. CM1_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT
  42876. CM1_CM_3DLUT_MODE__CM_3DLUT_SIZE_MASK
  42877. CM1_CM_3DLUT_MODE__CM_3DLUT_SIZE__SHIFT
  42878. CM1_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR_MASK
  42879. CM1_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR__SHIFT
  42880. CM1_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B_MASK
  42881. CM1_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B__SHIFT
  42882. CM1_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B_MASK
  42883. CM1_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B__SHIFT
  42884. CM1_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G_MASK
  42885. CM1_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G__SHIFT
  42886. CM1_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G_MASK
  42887. CM1_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G__SHIFT
  42888. CM1_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R_MASK
  42889. CM1_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R__SHIFT
  42890. CM1_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R_MASK
  42891. CM1_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R__SHIFT
  42892. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN_MASK
  42893. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN__SHIFT
  42894. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS_MASK
  42895. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS__SHIFT
  42896. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL_MASK
  42897. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL__SHIFT
  42898. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL_MASK
  42899. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL__SHIFT
  42900. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK_MASK
  42901. CM1_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK__SHIFT
  42902. CM1_CM_BIAS_CR_R__CM_BIAS_CR_R_MASK
  42903. CM1_CM_BIAS_CR_R__CM_BIAS_CR_R__SHIFT
  42904. CM1_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B_MASK
  42905. CM1_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B__SHIFT
  42906. CM1_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G_MASK
  42907. CM1_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G__SHIFT
  42908. CM1_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE_MASK
  42909. CM1_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE__SHIFT
  42910. CM1_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA_MASK
  42911. CM1_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA__SHIFT
  42912. CM1_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX_MASK
  42913. CM1_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX__SHIFT
  42914. CM1_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS_MASK
  42915. CM1_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS__SHIFT
  42916. CM1_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK_MASK
  42917. CM1_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK__SHIFT
  42918. CM1_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL_MASK
  42919. CM1_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL__SHIFT
  42920. CM1_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B_MASK
  42921. CM1_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B__SHIFT
  42922. CM1_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G_MASK
  42923. CM1_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G__SHIFT
  42924. CM1_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R_MASK
  42925. CM1_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R__SHIFT
  42926. CM1_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  42927. CM1_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  42928. CM1_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  42929. CM1_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  42930. CM1_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  42931. CM1_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  42932. CM1_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  42933. CM1_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  42934. CM1_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  42935. CM1_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  42936. CM1_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  42937. CM1_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  42938. CM1_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  42939. CM1_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  42940. CM1_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  42941. CM1_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  42942. CM1_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  42943. CM1_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  42944. CM1_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  42945. CM1_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  42946. CM1_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  42947. CM1_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  42948. CM1_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  42949. CM1_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  42950. CM1_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  42951. CM1_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  42952. CM1_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  42953. CM1_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  42954. CM1_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  42955. CM1_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  42956. CM1_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  42957. CM1_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  42958. CM1_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  42959. CM1_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  42960. CM1_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  42961. CM1_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  42962. CM1_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  42963. CM1_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  42964. CM1_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  42965. CM1_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  42966. CM1_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  42967. CM1_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  42968. CM1_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  42969. CM1_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  42970. CM1_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  42971. CM1_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  42972. CM1_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  42973. CM1_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  42974. CM1_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  42975. CM1_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  42976. CM1_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  42977. CM1_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  42978. CM1_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  42979. CM1_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  42980. CM1_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  42981. CM1_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  42982. CM1_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  42983. CM1_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  42984. CM1_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  42985. CM1_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  42986. CM1_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  42987. CM1_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  42988. CM1_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  42989. CM1_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  42990. CM1_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  42991. CM1_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  42992. CM1_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  42993. CM1_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  42994. CM1_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  42995. CM1_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  42996. CM1_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  42997. CM1_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  42998. CM1_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  42999. CM1_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  43000. CM1_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  43001. CM1_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  43002. CM1_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  43003. CM1_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  43004. CM1_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  43005. CM1_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  43006. CM1_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  43007. CM1_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  43008. CM1_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  43009. CM1_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  43010. CM1_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  43011. CM1_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  43012. CM1_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  43013. CM1_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  43014. CM1_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  43015. CM1_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  43016. CM1_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  43017. CM1_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  43018. CM1_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  43019. CM1_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  43020. CM1_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  43021. CM1_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  43022. CM1_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  43023. CM1_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  43024. CM1_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  43025. CM1_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  43026. CM1_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  43027. CM1_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  43028. CM1_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  43029. CM1_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  43030. CM1_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  43031. CM1_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  43032. CM1_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  43033. CM1_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  43034. CM1_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  43035. CM1_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  43036. CM1_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  43037. CM1_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  43038. CM1_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  43039. CM1_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  43040. CM1_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  43041. CM1_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  43042. CM1_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  43043. CM1_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  43044. CM1_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  43045. CM1_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  43046. CM1_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  43047. CM1_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  43048. CM1_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  43049. CM1_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  43050. CM1_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  43051. CM1_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  43052. CM1_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  43053. CM1_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  43054. CM1_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  43055. CM1_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  43056. CM1_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  43057. CM1_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  43058. CM1_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  43059. CM1_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  43060. CM1_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  43061. CM1_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  43062. CM1_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  43063. CM1_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  43064. CM1_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  43065. CM1_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  43066. CM1_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  43067. CM1_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  43068. CM1_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  43069. CM1_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  43070. CM1_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  43071. CM1_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  43072. CM1_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  43073. CM1_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  43074. CM1_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  43075. CM1_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  43076. CM1_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  43077. CM1_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  43078. CM1_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  43079. CM1_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  43080. CM1_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B_MASK
  43081. CM1_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B__SHIFT
  43082. CM1_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  43083. CM1_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  43084. CM1_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G_MASK
  43085. CM1_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G__SHIFT
  43086. CM1_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  43087. CM1_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  43088. CM1_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R_MASK
  43089. CM1_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R__SHIFT
  43090. CM1_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  43091. CM1_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  43092. CM1_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B_MASK
  43093. CM1_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B__SHIFT
  43094. CM1_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G_MASK
  43095. CM1_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G__SHIFT
  43096. CM1_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R_MASK
  43097. CM1_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R__SHIFT
  43098. CM1_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  43099. CM1_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  43100. CM1_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  43101. CM1_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  43102. CM1_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  43103. CM1_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  43104. CM1_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  43105. CM1_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  43106. CM1_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  43107. CM1_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  43108. CM1_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  43109. CM1_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  43110. CM1_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  43111. CM1_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  43112. CM1_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  43113. CM1_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  43114. CM1_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  43115. CM1_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  43116. CM1_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  43117. CM1_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  43118. CM1_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  43119. CM1_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  43120. CM1_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  43121. CM1_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  43122. CM1_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  43123. CM1_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  43124. CM1_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  43125. CM1_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  43126. CM1_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  43127. CM1_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  43128. CM1_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  43129. CM1_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  43130. CM1_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  43131. CM1_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  43132. CM1_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  43133. CM1_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  43134. CM1_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  43135. CM1_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  43136. CM1_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  43137. CM1_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  43138. CM1_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  43139. CM1_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  43140. CM1_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  43141. CM1_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  43142. CM1_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  43143. CM1_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  43144. CM1_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  43145. CM1_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  43146. CM1_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  43147. CM1_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  43148. CM1_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  43149. CM1_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  43150. CM1_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  43151. CM1_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  43152. CM1_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  43153. CM1_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  43154. CM1_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  43155. CM1_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  43156. CM1_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  43157. CM1_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  43158. CM1_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  43159. CM1_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  43160. CM1_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  43161. CM1_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  43162. CM1_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  43163. CM1_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  43164. CM1_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  43165. CM1_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  43166. CM1_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  43167. CM1_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  43168. CM1_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  43169. CM1_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  43170. CM1_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  43171. CM1_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  43172. CM1_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  43173. CM1_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  43174. CM1_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  43175. CM1_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  43176. CM1_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  43177. CM1_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  43178. CM1_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  43179. CM1_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  43180. CM1_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  43181. CM1_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  43182. CM1_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  43183. CM1_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  43184. CM1_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  43185. CM1_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  43186. CM1_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  43187. CM1_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  43188. CM1_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  43189. CM1_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  43190. CM1_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  43191. CM1_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  43192. CM1_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  43193. CM1_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  43194. CM1_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  43195. CM1_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  43196. CM1_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  43197. CM1_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  43198. CM1_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  43199. CM1_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  43200. CM1_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  43201. CM1_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  43202. CM1_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  43203. CM1_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  43204. CM1_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  43205. CM1_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  43206. CM1_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  43207. CM1_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  43208. CM1_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  43209. CM1_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  43210. CM1_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  43211. CM1_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  43212. CM1_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  43213. CM1_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  43214. CM1_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  43215. CM1_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  43216. CM1_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  43217. CM1_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  43218. CM1_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  43219. CM1_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  43220. CM1_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  43221. CM1_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  43222. CM1_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  43223. CM1_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  43224. CM1_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  43225. CM1_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  43226. CM1_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  43227. CM1_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  43228. CM1_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  43229. CM1_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  43230. CM1_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  43231. CM1_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  43232. CM1_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  43233. CM1_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  43234. CM1_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  43235. CM1_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  43236. CM1_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  43237. CM1_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  43238. CM1_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  43239. CM1_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  43240. CM1_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  43241. CM1_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  43242. CM1_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  43243. CM1_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  43244. CM1_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  43245. CM1_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  43246. CM1_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  43247. CM1_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  43248. CM1_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  43249. CM1_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  43250. CM1_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  43251. CM1_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  43252. CM1_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B_MASK
  43253. CM1_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B__SHIFT
  43254. CM1_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  43255. CM1_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  43256. CM1_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G_MASK
  43257. CM1_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G__SHIFT
  43258. CM1_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  43259. CM1_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  43260. CM1_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R_MASK
  43261. CM1_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R__SHIFT
  43262. CM1_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  43263. CM1_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  43264. CM1_CM_BNS_VALUES_B__CM_BNS_BIAS_B_MASK
  43265. CM1_CM_BNS_VALUES_B__CM_BNS_BIAS_B__SHIFT
  43266. CM1_CM_BNS_VALUES_B__CM_BNS_SCALE_B_MASK
  43267. CM1_CM_BNS_VALUES_B__CM_BNS_SCALE_B__SHIFT
  43268. CM1_CM_BNS_VALUES_G__CM_BNS_BIAS_G_MASK
  43269. CM1_CM_BNS_VALUES_G__CM_BNS_BIAS_G__SHIFT
  43270. CM1_CM_BNS_VALUES_G__CM_BNS_SCALE_G_MASK
  43271. CM1_CM_BNS_VALUES_G__CM_BNS_SCALE_G__SHIFT
  43272. CM1_CM_BNS_VALUES_R__CM_BNS_BIAS_R_MASK
  43273. CM1_CM_BNS_VALUES_R__CM_BNS_BIAS_R__SHIFT
  43274. CM1_CM_BNS_VALUES_R__CM_BNS_SCALE_R_MASK
  43275. CM1_CM_BNS_VALUES_R__CM_BNS_SCALE_R__SHIFT
  43276. CM1_CM_CMOUT_CONTROL__CM_CMOUT_FRAME_RANDOM_ENABLE_MASK
  43277. CM1_CM_CMOUT_CONTROL__CM_CMOUT_FRAME_RANDOM_ENABLE__SHIFT
  43278. CM1_CM_CMOUT_CONTROL__CM_CMOUT_HIGHPASS_RANDOM_ENABLE_MASK
  43279. CM1_CM_CMOUT_CONTROL__CM_CMOUT_HIGHPASS_RANDOM_ENABLE__SHIFT
  43280. CM1_CM_CMOUT_CONTROL__CM_CMOUT_RGB_RANDOM_EN_MASK
  43281. CM1_CM_CMOUT_CONTROL__CM_CMOUT_RGB_RANDOM_EN__SHIFT
  43282. CM1_CM_CMOUT_CONTROL__CM_CMOUT_ROUND_TRUNC_MODE_MASK
  43283. CM1_CM_CMOUT_CONTROL__CM_CMOUT_ROUND_TRUNC_MODE__SHIFT
  43284. CM1_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_DEPTH_MASK
  43285. CM1_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_DEPTH__SHIFT
  43286. CM1_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_EN_MASK
  43287. CM1_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_EN__SHIFT
  43288. CM1_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_MODE_MASK
  43289. CM1_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_MODE__SHIFT
  43290. CM1_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_B_SEED_MASK
  43291. CM1_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_B_SEED__SHIFT
  43292. CM1_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_G_SEED_MASK
  43293. CM1_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_G_SEED__SHIFT
  43294. CM1_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_R_SEED_MASK
  43295. CM1_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_R_SEED__SHIFT
  43296. CM1_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK
  43297. CM1_CM_COEF_FORMAT__CM_BIAS_FORMAT__SHIFT
  43298. CM1_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK
  43299. CM1_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT__SHIFT
  43300. CM1_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT_MASK
  43301. CM1_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT__SHIFT
  43302. CM1_CM_COMA_C11_C12__CM_COMA_C11_MASK
  43303. CM1_CM_COMA_C11_C12__CM_COMA_C11__SHIFT
  43304. CM1_CM_COMA_C11_C12__CM_COMA_C12_MASK
  43305. CM1_CM_COMA_C11_C12__CM_COMA_C12__SHIFT
  43306. CM1_CM_COMA_C13_C14__CM_COMA_C13_MASK
  43307. CM1_CM_COMA_C13_C14__CM_COMA_C13__SHIFT
  43308. CM1_CM_COMA_C13_C14__CM_COMA_C14_MASK
  43309. CM1_CM_COMA_C13_C14__CM_COMA_C14__SHIFT
  43310. CM1_CM_COMA_C21_C22__CM_COMA_C21_MASK
  43311. CM1_CM_COMA_C21_C22__CM_COMA_C21__SHIFT
  43312. CM1_CM_COMA_C21_C22__CM_COMA_C22_MASK
  43313. CM1_CM_COMA_C21_C22__CM_COMA_C22__SHIFT
  43314. CM1_CM_COMA_C23_C24__CM_COMA_C23_MASK
  43315. CM1_CM_COMA_C23_C24__CM_COMA_C23__SHIFT
  43316. CM1_CM_COMA_C23_C24__CM_COMA_C24_MASK
  43317. CM1_CM_COMA_C23_C24__CM_COMA_C24__SHIFT
  43318. CM1_CM_COMA_C31_C32__CM_COMA_C31_MASK
  43319. CM1_CM_COMA_C31_C32__CM_COMA_C31__SHIFT
  43320. CM1_CM_COMA_C31_C32__CM_COMA_C32_MASK
  43321. CM1_CM_COMA_C31_C32__CM_COMA_C32__SHIFT
  43322. CM1_CM_COMA_C33_C34__CM_COMA_C33_MASK
  43323. CM1_CM_COMA_C33_C34__CM_COMA_C33__SHIFT
  43324. CM1_CM_COMA_C33_C34__CM_COMA_C34_MASK
  43325. CM1_CM_COMA_C33_C34__CM_COMA_C34__SHIFT
  43326. CM1_CM_COMB_C11_C12__CM_COMB_C11_MASK
  43327. CM1_CM_COMB_C11_C12__CM_COMB_C11__SHIFT
  43328. CM1_CM_COMB_C11_C12__CM_COMB_C12_MASK
  43329. CM1_CM_COMB_C11_C12__CM_COMB_C12__SHIFT
  43330. CM1_CM_COMB_C13_C14__CM_COMB_C13_MASK
  43331. CM1_CM_COMB_C13_C14__CM_COMB_C13__SHIFT
  43332. CM1_CM_COMB_C13_C14__CM_COMB_C14_MASK
  43333. CM1_CM_COMB_C13_C14__CM_COMB_C14__SHIFT
  43334. CM1_CM_COMB_C21_C22__CM_COMB_C21_MASK
  43335. CM1_CM_COMB_C21_C22__CM_COMB_C21__SHIFT
  43336. CM1_CM_COMB_C21_C22__CM_COMB_C22_MASK
  43337. CM1_CM_COMB_C21_C22__CM_COMB_C22__SHIFT
  43338. CM1_CM_COMB_C23_C24__CM_COMB_C23_MASK
  43339. CM1_CM_COMB_C23_C24__CM_COMB_C23__SHIFT
  43340. CM1_CM_COMB_C23_C24__CM_COMB_C24_MASK
  43341. CM1_CM_COMB_C23_C24__CM_COMB_C24__SHIFT
  43342. CM1_CM_COMB_C31_C32__CM_COMB_C31_MASK
  43343. CM1_CM_COMB_C31_C32__CM_COMB_C31__SHIFT
  43344. CM1_CM_COMB_C31_C32__CM_COMB_C32_MASK
  43345. CM1_CM_COMB_C31_C32__CM_COMB_C32__SHIFT
  43346. CM1_CM_COMB_C33_C34__CM_COMB_C33_MASK
  43347. CM1_CM_COMB_C33_C34__CM_COMB_C33__SHIFT
  43348. CM1_CM_COMB_C33_C34__CM_COMB_C34_MASK
  43349. CM1_CM_COMB_C33_C34__CM_COMB_C34__SHIFT
  43350. CM1_CM_CONTROL__CM_BYPASS_EN_MASK
  43351. CM1_CM_CONTROL__CM_BYPASS_EN__SHIFT
  43352. CM1_CM_CONTROL__CM_BYPASS_MASK
  43353. CM1_CM_CONTROL__CM_BYPASS__SHIFT
  43354. CM1_CM_CONTROL__CM_UPDATE_PENDING_MASK
  43355. CM1_CM_CONTROL__CM_UPDATE_PENDING__SHIFT
  43356. CM1_CM_DEALPHA__CM_DEALPHA_EN_MASK
  43357. CM1_CM_DEALPHA__CM_DEALPHA_EN__SHIFT
  43358. CM1_CM_DENORM_CONTROL__CM_DENORM_MODE_MASK
  43359. CM1_CM_DENORM_CONTROL__CM_DENORM_MODE__SHIFT
  43360. CM1_CM_DENORM_CONTROL__CM_DENORM_ROUND_CLAMP_MASK
  43361. CM1_CM_DENORM_CONTROL__CM_DENORM_ROUND_CLAMP__SHIFT
  43362. CM1_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE_MASK
  43363. CM1_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE__SHIFT
  43364. CM1_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA_MASK
  43365. CM1_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA__SHIFT
  43366. CM1_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX_MASK
  43367. CM1_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX__SHIFT
  43368. CM1_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS_MASK
  43369. CM1_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS__SHIFT
  43370. CM1_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK_MASK
  43371. CM1_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK__SHIFT
  43372. CM1_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL_MASK
  43373. CM1_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL__SHIFT
  43374. CM1_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY_MASK
  43375. CM1_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY__SHIFT
  43376. CM1_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B_MASK
  43377. CM1_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B__SHIFT
  43378. CM1_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G_MASK
  43379. CM1_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G__SHIFT
  43380. CM1_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R_MASK
  43381. CM1_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R__SHIFT
  43382. CM1_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  43383. CM1_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  43384. CM1_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  43385. CM1_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  43386. CM1_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  43387. CM1_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  43388. CM1_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  43389. CM1_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  43390. CM1_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  43391. CM1_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  43392. CM1_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  43393. CM1_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  43394. CM1_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  43395. CM1_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  43396. CM1_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  43397. CM1_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  43398. CM1_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  43399. CM1_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  43400. CM1_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  43401. CM1_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  43402. CM1_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  43403. CM1_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  43404. CM1_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  43405. CM1_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  43406. CM1_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  43407. CM1_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  43408. CM1_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  43409. CM1_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  43410. CM1_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  43411. CM1_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  43412. CM1_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  43413. CM1_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  43414. CM1_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  43415. CM1_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  43416. CM1_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  43417. CM1_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  43418. CM1_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  43419. CM1_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  43420. CM1_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  43421. CM1_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  43422. CM1_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  43423. CM1_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  43424. CM1_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  43425. CM1_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  43426. CM1_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  43427. CM1_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  43428. CM1_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  43429. CM1_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  43430. CM1_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  43431. CM1_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  43432. CM1_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  43433. CM1_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  43434. CM1_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  43435. CM1_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  43436. CM1_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  43437. CM1_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  43438. CM1_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  43439. CM1_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  43440. CM1_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  43441. CM1_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  43442. CM1_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  43443. CM1_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  43444. CM1_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  43445. CM1_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  43446. CM1_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  43447. CM1_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  43448. CM1_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  43449. CM1_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  43450. CM1_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  43451. CM1_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  43452. CM1_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  43453. CM1_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  43454. CM1_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  43455. CM1_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  43456. CM1_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  43457. CM1_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  43458. CM1_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  43459. CM1_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  43460. CM1_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  43461. CM1_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  43462. CM1_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  43463. CM1_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  43464. CM1_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B_MASK
  43465. CM1_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B__SHIFT
  43466. CM1_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  43467. CM1_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  43468. CM1_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G_MASK
  43469. CM1_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G__SHIFT
  43470. CM1_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  43471. CM1_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  43472. CM1_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R_MASK
  43473. CM1_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R__SHIFT
  43474. CM1_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  43475. CM1_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  43476. CM1_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B_MASK
  43477. CM1_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B__SHIFT
  43478. CM1_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G_MASK
  43479. CM1_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G__SHIFT
  43480. CM1_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R_MASK
  43481. CM1_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R__SHIFT
  43482. CM1_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  43483. CM1_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  43484. CM1_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  43485. CM1_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  43486. CM1_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  43487. CM1_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  43488. CM1_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  43489. CM1_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  43490. CM1_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  43491. CM1_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  43492. CM1_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  43493. CM1_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  43494. CM1_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  43495. CM1_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  43496. CM1_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  43497. CM1_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  43498. CM1_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  43499. CM1_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  43500. CM1_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  43501. CM1_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  43502. CM1_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  43503. CM1_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  43504. CM1_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  43505. CM1_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  43506. CM1_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  43507. CM1_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  43508. CM1_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  43509. CM1_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  43510. CM1_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  43511. CM1_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  43512. CM1_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  43513. CM1_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  43514. CM1_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  43515. CM1_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  43516. CM1_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  43517. CM1_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  43518. CM1_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  43519. CM1_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  43520. CM1_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  43521. CM1_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  43522. CM1_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  43523. CM1_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  43524. CM1_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  43525. CM1_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  43526. CM1_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  43527. CM1_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  43528. CM1_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  43529. CM1_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  43530. CM1_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  43531. CM1_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  43532. CM1_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  43533. CM1_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  43534. CM1_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  43535. CM1_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  43536. CM1_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  43537. CM1_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  43538. CM1_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  43539. CM1_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  43540. CM1_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  43541. CM1_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  43542. CM1_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  43543. CM1_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  43544. CM1_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  43545. CM1_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  43546. CM1_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  43547. CM1_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  43548. CM1_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  43549. CM1_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  43550. CM1_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  43551. CM1_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  43552. CM1_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  43553. CM1_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  43554. CM1_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  43555. CM1_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  43556. CM1_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  43557. CM1_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  43558. CM1_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  43559. CM1_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  43560. CM1_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  43561. CM1_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  43562. CM1_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  43563. CM1_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  43564. CM1_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B_MASK
  43565. CM1_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B__SHIFT
  43566. CM1_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  43567. CM1_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  43568. CM1_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G_MASK
  43569. CM1_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G__SHIFT
  43570. CM1_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  43571. CM1_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  43572. CM1_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R_MASK
  43573. CM1_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R__SHIFT
  43574. CM1_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  43575. CM1_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  43576. CM1_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11_MASK
  43577. CM1_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11__SHIFT
  43578. CM1_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12_MASK
  43579. CM1_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12__SHIFT
  43580. CM1_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13_MASK
  43581. CM1_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13__SHIFT
  43582. CM1_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14_MASK
  43583. CM1_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14__SHIFT
  43584. CM1_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21_MASK
  43585. CM1_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21__SHIFT
  43586. CM1_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22_MASK
  43587. CM1_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22__SHIFT
  43588. CM1_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23_MASK
  43589. CM1_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23__SHIFT
  43590. CM1_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24_MASK
  43591. CM1_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24__SHIFT
  43592. CM1_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31_MASK
  43593. CM1_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31__SHIFT
  43594. CM1_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32_MASK
  43595. CM1_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32__SHIFT
  43596. CM1_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33_MASK
  43597. CM1_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33__SHIFT
  43598. CM1_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34_MASK
  43599. CM1_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34__SHIFT
  43600. CM1_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11_MASK
  43601. CM1_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11__SHIFT
  43602. CM1_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12_MASK
  43603. CM1_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12__SHIFT
  43604. CM1_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13_MASK
  43605. CM1_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13__SHIFT
  43606. CM1_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14_MASK
  43607. CM1_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14__SHIFT
  43608. CM1_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21_MASK
  43609. CM1_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21__SHIFT
  43610. CM1_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22_MASK
  43611. CM1_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22__SHIFT
  43612. CM1_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23_MASK
  43613. CM1_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23__SHIFT
  43614. CM1_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24_MASK
  43615. CM1_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24__SHIFT
  43616. CM1_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31_MASK
  43617. CM1_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31__SHIFT
  43618. CM1_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32_MASK
  43619. CM1_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32__SHIFT
  43620. CM1_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33_MASK
  43621. CM1_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33__SHIFT
  43622. CM1_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34_MASK
  43623. CM1_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34__SHIFT
  43624. CM1_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE_MASK
  43625. CM1_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE__SHIFT
  43626. CM1_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF_MASK
  43627. CM1_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF__SHIFT
  43628. CM1_CM_ICSC_B_C11_C12__CM_ICSC_B_C11_MASK
  43629. CM1_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT
  43630. CM1_CM_ICSC_B_C11_C12__CM_ICSC_B_C12_MASK
  43631. CM1_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT
  43632. CM1_CM_ICSC_B_C13_C14__CM_ICSC_B_C13_MASK
  43633. CM1_CM_ICSC_B_C13_C14__CM_ICSC_B_C13__SHIFT
  43634. CM1_CM_ICSC_B_C13_C14__CM_ICSC_B_C14_MASK
  43635. CM1_CM_ICSC_B_C13_C14__CM_ICSC_B_C14__SHIFT
  43636. CM1_CM_ICSC_B_C21_C22__CM_ICSC_B_C21_MASK
  43637. CM1_CM_ICSC_B_C21_C22__CM_ICSC_B_C21__SHIFT
  43638. CM1_CM_ICSC_B_C21_C22__CM_ICSC_B_C22_MASK
  43639. CM1_CM_ICSC_B_C21_C22__CM_ICSC_B_C22__SHIFT
  43640. CM1_CM_ICSC_B_C23_C24__CM_ICSC_B_C23_MASK
  43641. CM1_CM_ICSC_B_C23_C24__CM_ICSC_B_C23__SHIFT
  43642. CM1_CM_ICSC_B_C23_C24__CM_ICSC_B_C24_MASK
  43643. CM1_CM_ICSC_B_C23_C24__CM_ICSC_B_C24__SHIFT
  43644. CM1_CM_ICSC_B_C31_C32__CM_ICSC_B_C31_MASK
  43645. CM1_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT
  43646. CM1_CM_ICSC_B_C31_C32__CM_ICSC_B_C32_MASK
  43647. CM1_CM_ICSC_B_C31_C32__CM_ICSC_B_C32__SHIFT
  43648. CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33_MASK
  43649. CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT
  43650. CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C34_MASK
  43651. CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C34__SHIFT
  43652. CM1_CM_ICSC_C11_C12__CM_ICSC_C11_MASK
  43653. CM1_CM_ICSC_C11_C12__CM_ICSC_C11__SHIFT
  43654. CM1_CM_ICSC_C11_C12__CM_ICSC_C12_MASK
  43655. CM1_CM_ICSC_C11_C12__CM_ICSC_C12__SHIFT
  43656. CM1_CM_ICSC_C13_C14__CM_ICSC_C13_MASK
  43657. CM1_CM_ICSC_C13_C14__CM_ICSC_C13__SHIFT
  43658. CM1_CM_ICSC_C13_C14__CM_ICSC_C14_MASK
  43659. CM1_CM_ICSC_C13_C14__CM_ICSC_C14__SHIFT
  43660. CM1_CM_ICSC_C21_C22__CM_ICSC_C21_MASK
  43661. CM1_CM_ICSC_C21_C22__CM_ICSC_C21__SHIFT
  43662. CM1_CM_ICSC_C21_C22__CM_ICSC_C22_MASK
  43663. CM1_CM_ICSC_C21_C22__CM_ICSC_C22__SHIFT
  43664. CM1_CM_ICSC_C23_C24__CM_ICSC_C23_MASK
  43665. CM1_CM_ICSC_C23_C24__CM_ICSC_C23__SHIFT
  43666. CM1_CM_ICSC_C23_C24__CM_ICSC_C24_MASK
  43667. CM1_CM_ICSC_C23_C24__CM_ICSC_C24__SHIFT
  43668. CM1_CM_ICSC_C31_C32__CM_ICSC_C31_MASK
  43669. CM1_CM_ICSC_C31_C32__CM_ICSC_C31__SHIFT
  43670. CM1_CM_ICSC_C31_C32__CM_ICSC_C32_MASK
  43671. CM1_CM_ICSC_C31_C32__CM_ICSC_C32__SHIFT
  43672. CM1_CM_ICSC_C33_C34__CM_ICSC_C33_MASK
  43673. CM1_CM_ICSC_C33_C34__CM_ICSC_C33__SHIFT
  43674. CM1_CM_ICSC_C33_C34__CM_ICSC_C34_MASK
  43675. CM1_CM_ICSC_C33_C34__CM_ICSC_C34__SHIFT
  43676. CM1_CM_ICSC_CONTROL__CM_ICSC_MODE_MASK
  43677. CM1_CM_ICSC_CONTROL__CM_ICSC_MODE__SHIFT
  43678. CM1_CM_IGAM_CONTROL__CM_IGAM_INPUT_FORMAT_MASK
  43679. CM1_CM_IGAM_CONTROL__CM_IGAM_INPUT_FORMAT__SHIFT
  43680. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_B_FLOAT_POINT_EN_MASK
  43681. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_B_FLOAT_POINT_EN__SHIFT
  43682. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_B_MASK
  43683. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_B__SHIFT
  43684. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_G_MASK
  43685. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_G__SHIFT
  43686. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_R_MASK
  43687. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_R__SHIFT
  43688. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_B_MASK
  43689. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_B__SHIFT
  43690. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_G_MASK
  43691. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_G__SHIFT
  43692. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_R_MASK
  43693. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_R__SHIFT
  43694. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_G_FLOAT_POINT_EN_MASK
  43695. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_G_FLOAT_POINT_EN__SHIFT
  43696. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_B_MASK
  43697. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_B__SHIFT
  43698. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_G_MASK
  43699. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_G__SHIFT
  43700. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_R_MASK
  43701. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_R__SHIFT
  43702. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_MODE_MASK
  43703. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_MODE__SHIFT
  43704. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_R_FLOAT_POINT_EN_MASK
  43705. CM1_CM_IGAM_CONTROL__CM_IGAM_LUT_R_FLOAT_POINT_EN__SHIFT
  43706. CM1_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_BLUE_MASK
  43707. CM1_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_BLUE__SHIFT
  43708. CM1_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_GREEN_MASK
  43709. CM1_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_GREEN__SHIFT
  43710. CM1_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_RED_MASK
  43711. CM1_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_RED__SHIFT
  43712. CM1_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_DONE_MASK
  43713. CM1_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_DONE__SHIFT
  43714. CM1_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_MASK
  43715. CM1_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL__SHIFT
  43716. CM1_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_BLACK_OFFSET_BLUE_MASK
  43717. CM1_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_BLACK_OFFSET_BLUE__SHIFT
  43718. CM1_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_WHITE_OFFSET_BLUE_MASK
  43719. CM1_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_WHITE_OFFSET_BLUE__SHIFT
  43720. CM1_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_BLACK_OFFSET_GREEN_MASK
  43721. CM1_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_BLACK_OFFSET_GREEN__SHIFT
  43722. CM1_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_WHITE_OFFSET_GREEN_MASK
  43723. CM1_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_WHITE_OFFSET_GREEN__SHIFT
  43724. CM1_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_BLACK_OFFSET_RED_MASK
  43725. CM1_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_BLACK_OFFSET_RED__SHIFT
  43726. CM1_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_WHITE_OFFSET_RED_MASK
  43727. CM1_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_WHITE_OFFSET_RED__SHIFT
  43728. CM1_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_BASE_MASK
  43729. CM1_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_BASE__SHIFT
  43730. CM1_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_DELTA_MASK
  43731. CM1_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_DELTA__SHIFT
  43732. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_DGAM_CONFIG_STATUS_MASK
  43733. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_DGAM_CONFIG_STATUS__SHIFT
  43734. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_HOST_EN_MASK
  43735. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_HOST_EN__SHIFT
  43736. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_RW_MODE_MASK
  43737. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_RW_MODE__SHIFT
  43738. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_SEL_MASK
  43739. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_SEL__SHIFT
  43740. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_WRITE_EN_MASK_MASK
  43741. CM1_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_WRITE_EN_MASK__SHIFT
  43742. CM1_CM_IGAM_LUT_RW_INDEX__CM_IGAM_LUT_RW_INDEX_MASK
  43743. CM1_CM_IGAM_LUT_RW_INDEX__CM_IGAM_LUT_RW_INDEX__SHIFT
  43744. CM1_CM_IGAM_LUT_SEQ_COLOR__CM_IGAM_LUT_SEQ_COLOR_MASK
  43745. CM1_CM_IGAM_LUT_SEQ_COLOR__CM_IGAM_LUT_SEQ_COLOR__SHIFT
  43746. CM1_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS_MASK
  43747. CM1_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS__SHIFT
  43748. CM1_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE_MASK
  43749. CM1_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE__SHIFT
  43750. CM1_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS_MASK
  43751. CM1_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS__SHIFT
  43752. CM1_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE_MASK
  43753. CM1_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE__SHIFT
  43754. CM1_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK
  43755. CM1_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT
  43756. CM1_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE_MASK
  43757. CM1_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE__SHIFT
  43758. CM1_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_DIS_MASK
  43759. CM1_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_DIS__SHIFT
  43760. CM1_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_FORCE_MASK
  43761. CM1_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_FORCE__SHIFT
  43762. CM1_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS_MASK
  43763. CM1_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS__SHIFT
  43764. CM1_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE_MASK
  43765. CM1_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE__SHIFT
  43766. CM1_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE_MASK
  43767. CM1_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE__SHIFT
  43768. CM1_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE_MASK
  43769. CM1_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE__SHIFT
  43770. CM1_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE_MASK
  43771. CM1_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE__SHIFT
  43772. CM1_CM_MEM_PWR_STATUS__RGAM_MEM_PWR_STATE_MASK
  43773. CM1_CM_MEM_PWR_STATUS__RGAM_MEM_PWR_STATE__SHIFT
  43774. CM1_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE_MASK
  43775. CM1_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT
  43776. CM1_CM_OCSC_C11_C12__CM_OCSC_C11_MASK
  43777. CM1_CM_OCSC_C11_C12__CM_OCSC_C11__SHIFT
  43778. CM1_CM_OCSC_C11_C12__CM_OCSC_C12_MASK
  43779. CM1_CM_OCSC_C11_C12__CM_OCSC_C12__SHIFT
  43780. CM1_CM_OCSC_C13_C14__CM_OCSC_C13_MASK
  43781. CM1_CM_OCSC_C13_C14__CM_OCSC_C13__SHIFT
  43782. CM1_CM_OCSC_C13_C14__CM_OCSC_C14_MASK
  43783. CM1_CM_OCSC_C13_C14__CM_OCSC_C14__SHIFT
  43784. CM1_CM_OCSC_C21_C22__CM_OCSC_C21_MASK
  43785. CM1_CM_OCSC_C21_C22__CM_OCSC_C21__SHIFT
  43786. CM1_CM_OCSC_C21_C22__CM_OCSC_C22_MASK
  43787. CM1_CM_OCSC_C21_C22__CM_OCSC_C22__SHIFT
  43788. CM1_CM_OCSC_C23_C24__CM_OCSC_C23_MASK
  43789. CM1_CM_OCSC_C23_C24__CM_OCSC_C23__SHIFT
  43790. CM1_CM_OCSC_C23_C24__CM_OCSC_C24_MASK
  43791. CM1_CM_OCSC_C23_C24__CM_OCSC_C24__SHIFT
  43792. CM1_CM_OCSC_C31_C32__CM_OCSC_C31_MASK
  43793. CM1_CM_OCSC_C31_C32__CM_OCSC_C31__SHIFT
  43794. CM1_CM_OCSC_C31_C32__CM_OCSC_C32_MASK
  43795. CM1_CM_OCSC_C31_C32__CM_OCSC_C32__SHIFT
  43796. CM1_CM_OCSC_C33_C34__CM_OCSC_C33_MASK
  43797. CM1_CM_OCSC_C33_C34__CM_OCSC_C33__SHIFT
  43798. CM1_CM_OCSC_C33_C34__CM_OCSC_C34_MASK
  43799. CM1_CM_OCSC_C33_C34__CM_OCSC_C34__SHIFT
  43800. CM1_CM_OCSC_CONTROL__CM_OCSC_MODE_MASK
  43801. CM1_CM_OCSC_CONTROL__CM_OCSC_MODE__SHIFT
  43802. CM1_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MAX_B_MASK
  43803. CM1_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MAX_B__SHIFT
  43804. CM1_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MIN_B_MASK
  43805. CM1_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MIN_B__SHIFT
  43806. CM1_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MAX_G_MASK
  43807. CM1_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MAX_G__SHIFT
  43808. CM1_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MIN_G_MASK
  43809. CM1_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MIN_G__SHIFT
  43810. CM1_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MAX_R_MASK
  43811. CM1_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MAX_R__SHIFT
  43812. CM1_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MIN_R_MASK
  43813. CM1_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MIN_R__SHIFT
  43814. CM1_CM_RGAM_CONTROL__CM_RGAM_LUT_MODE_MASK
  43815. CM1_CM_RGAM_CONTROL__CM_RGAM_LUT_MODE__SHIFT
  43816. CM1_CM_RGAM_LUT_DATA__CM_RGAM_LUT_DATA_MASK
  43817. CM1_CM_RGAM_LUT_DATA__CM_RGAM_LUT_DATA__SHIFT
  43818. CM1_CM_RGAM_LUT_INDEX__CM_RGAM_LUT_INDEX_MASK
  43819. CM1_CM_RGAM_LUT_INDEX__CM_RGAM_LUT_INDEX__SHIFT
  43820. CM1_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_CONFIG_STATUS_MASK
  43821. CM1_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_CONFIG_STATUS__SHIFT
  43822. CM1_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_EN_MASK_MASK
  43823. CM1_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_EN_MASK__SHIFT
  43824. CM1_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_SEL_MASK
  43825. CM1_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_SEL__SHIFT
  43826. CM1_CM_RGAM_RAMA_END_CNTL1_B__CM_RGAM_RAMA_EXP_REGION_END_B_MASK
  43827. CM1_CM_RGAM_RAMA_END_CNTL1_B__CM_RGAM_RAMA_EXP_REGION_END_B__SHIFT
  43828. CM1_CM_RGAM_RAMA_END_CNTL1_G__CM_RGAM_RAMA_EXP_REGION_END_G_MASK
  43829. CM1_CM_RGAM_RAMA_END_CNTL1_G__CM_RGAM_RAMA_EXP_REGION_END_G__SHIFT
  43830. CM1_CM_RGAM_RAMA_END_CNTL1_R__CM_RGAM_RAMA_EXP_REGION_END_R_MASK
  43831. CM1_CM_RGAM_RAMA_END_CNTL1_R__CM_RGAM_RAMA_EXP_REGION_END_R__SHIFT
  43832. CM1_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  43833. CM1_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  43834. CM1_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  43835. CM1_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  43836. CM1_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  43837. CM1_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  43838. CM1_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  43839. CM1_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  43840. CM1_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  43841. CM1_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  43842. CM1_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  43843. CM1_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  43844. CM1_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  43845. CM1_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  43846. CM1_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  43847. CM1_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  43848. CM1_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  43849. CM1_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  43850. CM1_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  43851. CM1_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  43852. CM1_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  43853. CM1_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  43854. CM1_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  43855. CM1_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  43856. CM1_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  43857. CM1_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  43858. CM1_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  43859. CM1_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  43860. CM1_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  43861. CM1_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  43862. CM1_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  43863. CM1_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  43864. CM1_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  43865. CM1_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  43866. CM1_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  43867. CM1_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  43868. CM1_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  43869. CM1_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  43870. CM1_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  43871. CM1_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  43872. CM1_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  43873. CM1_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  43874. CM1_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  43875. CM1_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  43876. CM1_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  43877. CM1_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  43878. CM1_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  43879. CM1_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  43880. CM1_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  43881. CM1_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  43882. CM1_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  43883. CM1_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  43884. CM1_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  43885. CM1_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  43886. CM1_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  43887. CM1_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  43888. CM1_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  43889. CM1_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  43890. CM1_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  43891. CM1_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  43892. CM1_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  43893. CM1_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  43894. CM1_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  43895. CM1_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  43896. CM1_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  43897. CM1_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  43898. CM1_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  43899. CM1_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  43900. CM1_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  43901. CM1_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  43902. CM1_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  43903. CM1_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  43904. CM1_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  43905. CM1_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  43906. CM1_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  43907. CM1_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  43908. CM1_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  43909. CM1_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  43910. CM1_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  43911. CM1_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  43912. CM1_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  43913. CM1_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  43914. CM1_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  43915. CM1_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  43916. CM1_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  43917. CM1_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  43918. CM1_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  43919. CM1_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  43920. CM1_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  43921. CM1_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  43922. CM1_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  43923. CM1_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  43924. CM1_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  43925. CM1_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  43926. CM1_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  43927. CM1_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  43928. CM1_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  43929. CM1_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  43930. CM1_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  43931. CM1_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  43932. CM1_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  43933. CM1_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  43934. CM1_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  43935. CM1_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  43936. CM1_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  43937. CM1_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  43938. CM1_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  43939. CM1_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  43940. CM1_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  43941. CM1_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  43942. CM1_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  43943. CM1_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  43944. CM1_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  43945. CM1_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  43946. CM1_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  43947. CM1_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  43948. CM1_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  43949. CM1_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  43950. CM1_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  43951. CM1_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  43952. CM1_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  43953. CM1_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  43954. CM1_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  43955. CM1_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  43956. CM1_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  43957. CM1_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  43958. CM1_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  43959. CM1_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  43960. CM1_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  43961. CM1_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  43962. CM1_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  43963. CM1_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  43964. CM1_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  43965. CM1_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  43966. CM1_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  43967. CM1_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  43968. CM1_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  43969. CM1_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  43970. CM1_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  43971. CM1_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  43972. CM1_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  43973. CM1_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  43974. CM1_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  43975. CM1_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  43976. CM1_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  43977. CM1_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  43978. CM1_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  43979. CM1_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  43980. CM1_CM_RGAM_RAMA_SLOPE_CNTL_B__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  43981. CM1_CM_RGAM_RAMA_SLOPE_CNTL_B__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  43982. CM1_CM_RGAM_RAMA_SLOPE_CNTL_G__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  43983. CM1_CM_RGAM_RAMA_SLOPE_CNTL_G__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  43984. CM1_CM_RGAM_RAMA_SLOPE_CNTL_R__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  43985. CM1_CM_RGAM_RAMA_SLOPE_CNTL_R__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  43986. CM1_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_B_MASK
  43987. CM1_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_B__SHIFT
  43988. CM1_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  43989. CM1_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  43990. CM1_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_G_MASK
  43991. CM1_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_G__SHIFT
  43992. CM1_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  43993. CM1_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  43994. CM1_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_R_MASK
  43995. CM1_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_R__SHIFT
  43996. CM1_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  43997. CM1_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  43998. CM1_CM_RGAM_RAMB_END_CNTL1_B__CM_RGAM_RAMB_EXP_REGION_END_B_MASK
  43999. CM1_CM_RGAM_RAMB_END_CNTL1_B__CM_RGAM_RAMB_EXP_REGION_END_B__SHIFT
  44000. CM1_CM_RGAM_RAMB_END_CNTL1_G__CM_RGAM_RAMB_EXP_REGION_END_G_MASK
  44001. CM1_CM_RGAM_RAMB_END_CNTL1_G__CM_RGAM_RAMB_EXP_REGION_END_G__SHIFT
  44002. CM1_CM_RGAM_RAMB_END_CNTL1_R__CM_RGAM_RAMB_EXP_REGION_END_R_MASK
  44003. CM1_CM_RGAM_RAMB_END_CNTL1_R__CM_RGAM_RAMB_EXP_REGION_END_R__SHIFT
  44004. CM1_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  44005. CM1_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  44006. CM1_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  44007. CM1_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  44008. CM1_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  44009. CM1_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  44010. CM1_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  44011. CM1_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  44012. CM1_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  44013. CM1_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  44014. CM1_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  44015. CM1_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  44016. CM1_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  44017. CM1_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  44018. CM1_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  44019. CM1_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  44020. CM1_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  44021. CM1_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  44022. CM1_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  44023. CM1_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  44024. CM1_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  44025. CM1_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  44026. CM1_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  44027. CM1_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  44028. CM1_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  44029. CM1_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  44030. CM1_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  44031. CM1_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  44032. CM1_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  44033. CM1_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  44034. CM1_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  44035. CM1_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  44036. CM1_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  44037. CM1_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  44038. CM1_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  44039. CM1_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  44040. CM1_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  44041. CM1_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  44042. CM1_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  44043. CM1_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  44044. CM1_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  44045. CM1_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  44046. CM1_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  44047. CM1_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  44048. CM1_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  44049. CM1_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  44050. CM1_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  44051. CM1_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  44052. CM1_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  44053. CM1_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  44054. CM1_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  44055. CM1_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  44056. CM1_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  44057. CM1_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  44058. CM1_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  44059. CM1_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  44060. CM1_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  44061. CM1_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  44062. CM1_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  44063. CM1_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  44064. CM1_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  44065. CM1_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  44066. CM1_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  44067. CM1_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  44068. CM1_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  44069. CM1_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  44070. CM1_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  44071. CM1_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  44072. CM1_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  44073. CM1_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  44074. CM1_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  44075. CM1_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  44076. CM1_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  44077. CM1_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  44078. CM1_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  44079. CM1_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  44080. CM1_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  44081. CM1_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  44082. CM1_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  44083. CM1_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  44084. CM1_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  44085. CM1_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  44086. CM1_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  44087. CM1_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  44088. CM1_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  44089. CM1_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  44090. CM1_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  44091. CM1_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  44092. CM1_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  44093. CM1_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  44094. CM1_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  44095. CM1_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  44096. CM1_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  44097. CM1_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  44098. CM1_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  44099. CM1_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  44100. CM1_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  44101. CM1_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  44102. CM1_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  44103. CM1_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  44104. CM1_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  44105. CM1_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  44106. CM1_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  44107. CM1_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  44108. CM1_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  44109. CM1_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  44110. CM1_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  44111. CM1_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  44112. CM1_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  44113. CM1_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  44114. CM1_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  44115. CM1_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  44116. CM1_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  44117. CM1_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  44118. CM1_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  44119. CM1_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  44120. CM1_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  44121. CM1_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  44122. CM1_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  44123. CM1_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  44124. CM1_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  44125. CM1_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  44126. CM1_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  44127. CM1_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  44128. CM1_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  44129. CM1_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  44130. CM1_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  44131. CM1_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  44132. CM1_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  44133. CM1_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  44134. CM1_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  44135. CM1_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  44136. CM1_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  44137. CM1_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  44138. CM1_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  44139. CM1_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  44140. CM1_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  44141. CM1_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  44142. CM1_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  44143. CM1_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  44144. CM1_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  44145. CM1_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  44146. CM1_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  44147. CM1_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  44148. CM1_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  44149. CM1_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  44150. CM1_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  44151. CM1_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  44152. CM1_CM_RGAM_RAMB_SLOPE_CNTL_B__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  44153. CM1_CM_RGAM_RAMB_SLOPE_CNTL_B__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  44154. CM1_CM_RGAM_RAMB_SLOPE_CNTL_G__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  44155. CM1_CM_RGAM_RAMB_SLOPE_CNTL_G__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  44156. CM1_CM_RGAM_RAMB_SLOPE_CNTL_R__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  44157. CM1_CM_RGAM_RAMB_SLOPE_CNTL_R__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  44158. CM1_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_B_MASK
  44159. CM1_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_B__SHIFT
  44160. CM1_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  44161. CM1_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  44162. CM1_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_G_MASK
  44163. CM1_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_G__SHIFT
  44164. CM1_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  44165. CM1_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  44166. CM1_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_R_MASK
  44167. CM1_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_R__SHIFT
  44168. CM1_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  44169. CM1_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  44170. CM1_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK
  44171. CM1_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT
  44172. CM1_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA_MASK
  44173. CM1_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA__SHIFT
  44174. CM1_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX_MASK
  44175. CM1_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX__SHIFT
  44176. CM1_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS_MASK
  44177. CM1_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS__SHIFT
  44178. CM1_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK_MASK
  44179. CM1_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK__SHIFT
  44180. CM1_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL_MASK
  44181. CM1_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL__SHIFT
  44182. CM1_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B_MASK
  44183. CM1_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B__SHIFT
  44184. CM1_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G_MASK
  44185. CM1_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G__SHIFT
  44186. CM1_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R_MASK
  44187. CM1_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R__SHIFT
  44188. CM1_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B_MASK
  44189. CM1_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B__SHIFT
  44190. CM1_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B_MASK
  44191. CM1_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B__SHIFT
  44192. CM1_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G_MASK
  44193. CM1_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G__SHIFT
  44194. CM1_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G_MASK
  44195. CM1_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G__SHIFT
  44196. CM1_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R_MASK
  44197. CM1_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R__SHIFT
  44198. CM1_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R_MASK
  44199. CM1_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R__SHIFT
  44200. CM1_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  44201. CM1_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  44202. CM1_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  44203. CM1_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  44204. CM1_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  44205. CM1_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  44206. CM1_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  44207. CM1_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  44208. CM1_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  44209. CM1_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  44210. CM1_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  44211. CM1_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  44212. CM1_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  44213. CM1_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  44214. CM1_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  44215. CM1_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  44216. CM1_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  44217. CM1_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  44218. CM1_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  44219. CM1_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  44220. CM1_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  44221. CM1_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  44222. CM1_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  44223. CM1_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  44224. CM1_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  44225. CM1_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  44226. CM1_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  44227. CM1_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  44228. CM1_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  44229. CM1_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  44230. CM1_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  44231. CM1_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  44232. CM1_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  44233. CM1_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  44234. CM1_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  44235. CM1_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  44236. CM1_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  44237. CM1_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  44238. CM1_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  44239. CM1_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  44240. CM1_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  44241. CM1_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  44242. CM1_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  44243. CM1_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  44244. CM1_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  44245. CM1_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  44246. CM1_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  44247. CM1_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  44248. CM1_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  44249. CM1_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  44250. CM1_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  44251. CM1_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  44252. CM1_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  44253. CM1_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  44254. CM1_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  44255. CM1_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  44256. CM1_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  44257. CM1_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  44258. CM1_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  44259. CM1_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  44260. CM1_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  44261. CM1_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  44262. CM1_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  44263. CM1_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  44264. CM1_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  44265. CM1_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  44266. CM1_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  44267. CM1_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  44268. CM1_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  44269. CM1_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  44270. CM1_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  44271. CM1_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  44272. CM1_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  44273. CM1_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  44274. CM1_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  44275. CM1_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  44276. CM1_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  44277. CM1_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  44278. CM1_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  44279. CM1_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  44280. CM1_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  44281. CM1_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  44282. CM1_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  44283. CM1_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  44284. CM1_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  44285. CM1_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  44286. CM1_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  44287. CM1_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  44288. CM1_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  44289. CM1_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  44290. CM1_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  44291. CM1_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  44292. CM1_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  44293. CM1_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  44294. CM1_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  44295. CM1_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  44296. CM1_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  44297. CM1_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  44298. CM1_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  44299. CM1_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  44300. CM1_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  44301. CM1_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  44302. CM1_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  44303. CM1_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  44304. CM1_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  44305. CM1_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  44306. CM1_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  44307. CM1_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  44308. CM1_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  44309. CM1_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  44310. CM1_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  44311. CM1_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  44312. CM1_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  44313. CM1_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  44314. CM1_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  44315. CM1_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  44316. CM1_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  44317. CM1_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  44318. CM1_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  44319. CM1_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  44320. CM1_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  44321. CM1_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  44322. CM1_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  44323. CM1_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  44324. CM1_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  44325. CM1_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  44326. CM1_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  44327. CM1_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  44328. CM1_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  44329. CM1_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  44330. CM1_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  44331. CM1_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  44332. CM1_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  44333. CM1_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  44334. CM1_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  44335. CM1_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  44336. CM1_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B_MASK
  44337. CM1_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B__SHIFT
  44338. CM1_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  44339. CM1_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  44340. CM1_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G_MASK
  44341. CM1_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G__SHIFT
  44342. CM1_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  44343. CM1_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  44344. CM1_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R_MASK
  44345. CM1_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R__SHIFT
  44346. CM1_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  44347. CM1_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  44348. CM1_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B_MASK
  44349. CM1_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B__SHIFT
  44350. CM1_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B_MASK
  44351. CM1_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B__SHIFT
  44352. CM1_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G_MASK
  44353. CM1_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G__SHIFT
  44354. CM1_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G_MASK
  44355. CM1_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G__SHIFT
  44356. CM1_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R_MASK
  44357. CM1_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R__SHIFT
  44358. CM1_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R_MASK
  44359. CM1_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R__SHIFT
  44360. CM1_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  44361. CM1_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  44362. CM1_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  44363. CM1_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  44364. CM1_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  44365. CM1_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  44366. CM1_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  44367. CM1_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  44368. CM1_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  44369. CM1_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  44370. CM1_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  44371. CM1_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  44372. CM1_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  44373. CM1_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  44374. CM1_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  44375. CM1_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  44376. CM1_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  44377. CM1_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  44378. CM1_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  44379. CM1_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  44380. CM1_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  44381. CM1_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  44382. CM1_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  44383. CM1_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  44384. CM1_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  44385. CM1_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  44386. CM1_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  44387. CM1_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  44388. CM1_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  44389. CM1_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  44390. CM1_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  44391. CM1_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  44392. CM1_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  44393. CM1_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  44394. CM1_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  44395. CM1_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  44396. CM1_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  44397. CM1_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  44398. CM1_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  44399. CM1_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  44400. CM1_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  44401. CM1_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  44402. CM1_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  44403. CM1_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  44404. CM1_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  44405. CM1_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  44406. CM1_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  44407. CM1_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  44408. CM1_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  44409. CM1_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  44410. CM1_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  44411. CM1_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  44412. CM1_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  44413. CM1_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  44414. CM1_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  44415. CM1_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  44416. CM1_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  44417. CM1_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  44418. CM1_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  44419. CM1_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  44420. CM1_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  44421. CM1_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  44422. CM1_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  44423. CM1_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  44424. CM1_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  44425. CM1_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  44426. CM1_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  44427. CM1_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  44428. CM1_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  44429. CM1_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  44430. CM1_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  44431. CM1_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  44432. CM1_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  44433. CM1_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  44434. CM1_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  44435. CM1_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  44436. CM1_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  44437. CM1_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  44438. CM1_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  44439. CM1_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  44440. CM1_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  44441. CM1_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  44442. CM1_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  44443. CM1_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  44444. CM1_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  44445. CM1_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  44446. CM1_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  44447. CM1_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  44448. CM1_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  44449. CM1_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  44450. CM1_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  44451. CM1_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  44452. CM1_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  44453. CM1_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  44454. CM1_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  44455. CM1_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  44456. CM1_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  44457. CM1_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  44458. CM1_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  44459. CM1_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  44460. CM1_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  44461. CM1_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  44462. CM1_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  44463. CM1_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  44464. CM1_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  44465. CM1_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  44466. CM1_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  44467. CM1_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  44468. CM1_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  44469. CM1_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  44470. CM1_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  44471. CM1_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  44472. CM1_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  44473. CM1_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  44474. CM1_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  44475. CM1_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  44476. CM1_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  44477. CM1_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  44478. CM1_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  44479. CM1_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  44480. CM1_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  44481. CM1_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  44482. CM1_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  44483. CM1_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  44484. CM1_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  44485. CM1_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  44486. CM1_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  44487. CM1_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  44488. CM1_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  44489. CM1_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  44490. CM1_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  44491. CM1_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  44492. CM1_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  44493. CM1_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  44494. CM1_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  44495. CM1_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  44496. CM1_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B_MASK
  44497. CM1_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B__SHIFT
  44498. CM1_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  44499. CM1_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  44500. CM1_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G_MASK
  44501. CM1_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G__SHIFT
  44502. CM1_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  44503. CM1_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  44504. CM1_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R_MASK
  44505. CM1_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R__SHIFT
  44506. CM1_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  44507. CM1_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  44508. CM1_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B_MASK
  44509. CM1_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B__SHIFT
  44510. CM1_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G_MASK
  44511. CM1_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G__SHIFT
  44512. CM1_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R_MASK
  44513. CM1_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R__SHIFT
  44514. CM1_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA_MASK
  44515. CM1_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA__SHIFT
  44516. CM1_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK
  44517. CM1_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT
  44518. CM1_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK
  44519. CM1_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT
  44520. CM206_CDROM_MAJOR
  44521. CM2_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT_MASK
  44522. CM2_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT__SHIFT
  44523. CM2_CM_3DLUT_DATA__CM_3DLUT_DATA0_MASK
  44524. CM2_CM_3DLUT_DATA__CM_3DLUT_DATA0__SHIFT
  44525. CM2_CM_3DLUT_DATA__CM_3DLUT_DATA1_MASK
  44526. CM2_CM_3DLUT_DATA__CM_3DLUT_DATA1__SHIFT
  44527. CM2_CM_3DLUT_INDEX__CM_3DLUT_INDEX_MASK
  44528. CM2_CM_3DLUT_INDEX__CM_3DLUT_INDEX__SHIFT
  44529. CM2_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK
  44530. CM2_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT
  44531. CM2_CM_3DLUT_MODE__CM_3DLUT_SIZE_MASK
  44532. CM2_CM_3DLUT_MODE__CM_3DLUT_SIZE__SHIFT
  44533. CM2_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR_MASK
  44534. CM2_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR__SHIFT
  44535. CM2_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B_MASK
  44536. CM2_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B__SHIFT
  44537. CM2_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B_MASK
  44538. CM2_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B__SHIFT
  44539. CM2_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G_MASK
  44540. CM2_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G__SHIFT
  44541. CM2_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G_MASK
  44542. CM2_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G__SHIFT
  44543. CM2_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R_MASK
  44544. CM2_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R__SHIFT
  44545. CM2_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R_MASK
  44546. CM2_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R__SHIFT
  44547. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN_MASK
  44548. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN__SHIFT
  44549. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS_MASK
  44550. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS__SHIFT
  44551. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL_MASK
  44552. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL__SHIFT
  44553. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL_MASK
  44554. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL__SHIFT
  44555. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK_MASK
  44556. CM2_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK__SHIFT
  44557. CM2_CM_BIAS_CR_R__CM_BIAS_CR_R_MASK
  44558. CM2_CM_BIAS_CR_R__CM_BIAS_CR_R__SHIFT
  44559. CM2_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B_MASK
  44560. CM2_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B__SHIFT
  44561. CM2_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G_MASK
  44562. CM2_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G__SHIFT
  44563. CM2_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE_MASK
  44564. CM2_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE__SHIFT
  44565. CM2_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA_MASK
  44566. CM2_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA__SHIFT
  44567. CM2_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX_MASK
  44568. CM2_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX__SHIFT
  44569. CM2_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS_MASK
  44570. CM2_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS__SHIFT
  44571. CM2_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK_MASK
  44572. CM2_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK__SHIFT
  44573. CM2_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL_MASK
  44574. CM2_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL__SHIFT
  44575. CM2_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B_MASK
  44576. CM2_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B__SHIFT
  44577. CM2_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G_MASK
  44578. CM2_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G__SHIFT
  44579. CM2_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R_MASK
  44580. CM2_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R__SHIFT
  44581. CM2_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  44582. CM2_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  44583. CM2_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  44584. CM2_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  44585. CM2_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  44586. CM2_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  44587. CM2_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  44588. CM2_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  44589. CM2_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  44590. CM2_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  44591. CM2_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  44592. CM2_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  44593. CM2_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  44594. CM2_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  44595. CM2_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  44596. CM2_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  44597. CM2_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  44598. CM2_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  44599. CM2_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  44600. CM2_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  44601. CM2_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  44602. CM2_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  44603. CM2_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  44604. CM2_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  44605. CM2_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  44606. CM2_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  44607. CM2_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  44608. CM2_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  44609. CM2_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  44610. CM2_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  44611. CM2_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  44612. CM2_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  44613. CM2_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  44614. CM2_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  44615. CM2_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  44616. CM2_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  44617. CM2_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  44618. CM2_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  44619. CM2_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  44620. CM2_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  44621. CM2_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  44622. CM2_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  44623. CM2_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  44624. CM2_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  44625. CM2_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  44626. CM2_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  44627. CM2_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  44628. CM2_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  44629. CM2_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  44630. CM2_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  44631. CM2_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  44632. CM2_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  44633. CM2_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  44634. CM2_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  44635. CM2_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  44636. CM2_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  44637. CM2_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  44638. CM2_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  44639. CM2_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  44640. CM2_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  44641. CM2_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  44642. CM2_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  44643. CM2_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  44644. CM2_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  44645. CM2_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  44646. CM2_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  44647. CM2_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  44648. CM2_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  44649. CM2_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  44650. CM2_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  44651. CM2_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  44652. CM2_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  44653. CM2_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  44654. CM2_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  44655. CM2_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  44656. CM2_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  44657. CM2_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  44658. CM2_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  44659. CM2_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  44660. CM2_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  44661. CM2_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  44662. CM2_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  44663. CM2_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  44664. CM2_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  44665. CM2_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  44666. CM2_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  44667. CM2_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  44668. CM2_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  44669. CM2_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  44670. CM2_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  44671. CM2_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  44672. CM2_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  44673. CM2_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  44674. CM2_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  44675. CM2_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  44676. CM2_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  44677. CM2_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  44678. CM2_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  44679. CM2_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  44680. CM2_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  44681. CM2_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  44682. CM2_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  44683. CM2_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  44684. CM2_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  44685. CM2_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  44686. CM2_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  44687. CM2_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  44688. CM2_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  44689. CM2_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  44690. CM2_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  44691. CM2_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  44692. CM2_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  44693. CM2_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  44694. CM2_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  44695. CM2_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  44696. CM2_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  44697. CM2_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  44698. CM2_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  44699. CM2_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  44700. CM2_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  44701. CM2_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  44702. CM2_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  44703. CM2_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  44704. CM2_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  44705. CM2_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  44706. CM2_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  44707. CM2_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  44708. CM2_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  44709. CM2_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  44710. CM2_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  44711. CM2_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  44712. CM2_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  44713. CM2_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  44714. CM2_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  44715. CM2_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  44716. CM2_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  44717. CM2_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  44718. CM2_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  44719. CM2_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  44720. CM2_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  44721. CM2_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  44722. CM2_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  44723. CM2_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  44724. CM2_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  44725. CM2_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  44726. CM2_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  44727. CM2_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  44728. CM2_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  44729. CM2_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  44730. CM2_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  44731. CM2_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  44732. CM2_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  44733. CM2_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  44734. CM2_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  44735. CM2_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B_MASK
  44736. CM2_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B__SHIFT
  44737. CM2_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  44738. CM2_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  44739. CM2_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G_MASK
  44740. CM2_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G__SHIFT
  44741. CM2_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  44742. CM2_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  44743. CM2_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R_MASK
  44744. CM2_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R__SHIFT
  44745. CM2_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  44746. CM2_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  44747. CM2_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B_MASK
  44748. CM2_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B__SHIFT
  44749. CM2_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G_MASK
  44750. CM2_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G__SHIFT
  44751. CM2_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R_MASK
  44752. CM2_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R__SHIFT
  44753. CM2_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  44754. CM2_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  44755. CM2_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  44756. CM2_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  44757. CM2_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  44758. CM2_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  44759. CM2_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  44760. CM2_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  44761. CM2_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  44762. CM2_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  44763. CM2_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  44764. CM2_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  44765. CM2_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  44766. CM2_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  44767. CM2_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  44768. CM2_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  44769. CM2_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  44770. CM2_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  44771. CM2_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  44772. CM2_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  44773. CM2_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  44774. CM2_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  44775. CM2_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  44776. CM2_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  44777. CM2_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  44778. CM2_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  44779. CM2_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  44780. CM2_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  44781. CM2_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  44782. CM2_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  44783. CM2_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  44784. CM2_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  44785. CM2_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  44786. CM2_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  44787. CM2_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  44788. CM2_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  44789. CM2_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  44790. CM2_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  44791. CM2_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  44792. CM2_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  44793. CM2_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  44794. CM2_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  44795. CM2_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  44796. CM2_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  44797. CM2_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  44798. CM2_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  44799. CM2_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  44800. CM2_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  44801. CM2_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  44802. CM2_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  44803. CM2_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  44804. CM2_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  44805. CM2_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  44806. CM2_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  44807. CM2_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  44808. CM2_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  44809. CM2_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  44810. CM2_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  44811. CM2_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  44812. CM2_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  44813. CM2_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  44814. CM2_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  44815. CM2_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  44816. CM2_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  44817. CM2_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  44818. CM2_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  44819. CM2_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  44820. CM2_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  44821. CM2_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  44822. CM2_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  44823. CM2_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  44824. CM2_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  44825. CM2_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  44826. CM2_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  44827. CM2_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  44828. CM2_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  44829. CM2_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  44830. CM2_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  44831. CM2_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  44832. CM2_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  44833. CM2_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  44834. CM2_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  44835. CM2_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  44836. CM2_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  44837. CM2_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  44838. CM2_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  44839. CM2_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  44840. CM2_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  44841. CM2_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  44842. CM2_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  44843. CM2_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  44844. CM2_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  44845. CM2_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  44846. CM2_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  44847. CM2_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  44848. CM2_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  44849. CM2_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  44850. CM2_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  44851. CM2_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  44852. CM2_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  44853. CM2_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  44854. CM2_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  44855. CM2_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  44856. CM2_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  44857. CM2_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  44858. CM2_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  44859. CM2_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  44860. CM2_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  44861. CM2_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  44862. CM2_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  44863. CM2_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  44864. CM2_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  44865. CM2_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  44866. CM2_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  44867. CM2_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  44868. CM2_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  44869. CM2_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  44870. CM2_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  44871. CM2_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  44872. CM2_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  44873. CM2_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  44874. CM2_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  44875. CM2_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  44876. CM2_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  44877. CM2_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  44878. CM2_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  44879. CM2_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  44880. CM2_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  44881. CM2_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  44882. CM2_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  44883. CM2_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  44884. CM2_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  44885. CM2_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  44886. CM2_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  44887. CM2_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  44888. CM2_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  44889. CM2_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  44890. CM2_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  44891. CM2_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  44892. CM2_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  44893. CM2_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  44894. CM2_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  44895. CM2_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  44896. CM2_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  44897. CM2_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  44898. CM2_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  44899. CM2_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  44900. CM2_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  44901. CM2_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  44902. CM2_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  44903. CM2_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  44904. CM2_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  44905. CM2_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  44906. CM2_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  44907. CM2_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B_MASK
  44908. CM2_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B__SHIFT
  44909. CM2_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  44910. CM2_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  44911. CM2_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G_MASK
  44912. CM2_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G__SHIFT
  44913. CM2_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  44914. CM2_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  44915. CM2_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R_MASK
  44916. CM2_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R__SHIFT
  44917. CM2_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  44918. CM2_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  44919. CM2_CM_BNS_VALUES_B__CM_BNS_BIAS_B_MASK
  44920. CM2_CM_BNS_VALUES_B__CM_BNS_BIAS_B__SHIFT
  44921. CM2_CM_BNS_VALUES_B__CM_BNS_SCALE_B_MASK
  44922. CM2_CM_BNS_VALUES_B__CM_BNS_SCALE_B__SHIFT
  44923. CM2_CM_BNS_VALUES_G__CM_BNS_BIAS_G_MASK
  44924. CM2_CM_BNS_VALUES_G__CM_BNS_BIAS_G__SHIFT
  44925. CM2_CM_BNS_VALUES_G__CM_BNS_SCALE_G_MASK
  44926. CM2_CM_BNS_VALUES_G__CM_BNS_SCALE_G__SHIFT
  44927. CM2_CM_BNS_VALUES_R__CM_BNS_BIAS_R_MASK
  44928. CM2_CM_BNS_VALUES_R__CM_BNS_BIAS_R__SHIFT
  44929. CM2_CM_BNS_VALUES_R__CM_BNS_SCALE_R_MASK
  44930. CM2_CM_BNS_VALUES_R__CM_BNS_SCALE_R__SHIFT
  44931. CM2_CM_CMOUT_CONTROL__CM_CMOUT_FRAME_RANDOM_ENABLE_MASK
  44932. CM2_CM_CMOUT_CONTROL__CM_CMOUT_FRAME_RANDOM_ENABLE__SHIFT
  44933. CM2_CM_CMOUT_CONTROL__CM_CMOUT_HIGHPASS_RANDOM_ENABLE_MASK
  44934. CM2_CM_CMOUT_CONTROL__CM_CMOUT_HIGHPASS_RANDOM_ENABLE__SHIFT
  44935. CM2_CM_CMOUT_CONTROL__CM_CMOUT_RGB_RANDOM_EN_MASK
  44936. CM2_CM_CMOUT_CONTROL__CM_CMOUT_RGB_RANDOM_EN__SHIFT
  44937. CM2_CM_CMOUT_CONTROL__CM_CMOUT_ROUND_TRUNC_MODE_MASK
  44938. CM2_CM_CMOUT_CONTROL__CM_CMOUT_ROUND_TRUNC_MODE__SHIFT
  44939. CM2_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_DEPTH_MASK
  44940. CM2_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_DEPTH__SHIFT
  44941. CM2_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_EN_MASK
  44942. CM2_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_EN__SHIFT
  44943. CM2_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_MODE_MASK
  44944. CM2_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_MODE__SHIFT
  44945. CM2_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_B_SEED_MASK
  44946. CM2_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_B_SEED__SHIFT
  44947. CM2_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_G_SEED_MASK
  44948. CM2_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_G_SEED__SHIFT
  44949. CM2_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_R_SEED_MASK
  44950. CM2_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_R_SEED__SHIFT
  44951. CM2_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK
  44952. CM2_CM_COEF_FORMAT__CM_BIAS_FORMAT__SHIFT
  44953. CM2_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK
  44954. CM2_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT__SHIFT
  44955. CM2_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT_MASK
  44956. CM2_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT__SHIFT
  44957. CM2_CM_COMA_C11_C12__CM_COMA_C11_MASK
  44958. CM2_CM_COMA_C11_C12__CM_COMA_C11__SHIFT
  44959. CM2_CM_COMA_C11_C12__CM_COMA_C12_MASK
  44960. CM2_CM_COMA_C11_C12__CM_COMA_C12__SHIFT
  44961. CM2_CM_COMA_C13_C14__CM_COMA_C13_MASK
  44962. CM2_CM_COMA_C13_C14__CM_COMA_C13__SHIFT
  44963. CM2_CM_COMA_C13_C14__CM_COMA_C14_MASK
  44964. CM2_CM_COMA_C13_C14__CM_COMA_C14__SHIFT
  44965. CM2_CM_COMA_C21_C22__CM_COMA_C21_MASK
  44966. CM2_CM_COMA_C21_C22__CM_COMA_C21__SHIFT
  44967. CM2_CM_COMA_C21_C22__CM_COMA_C22_MASK
  44968. CM2_CM_COMA_C21_C22__CM_COMA_C22__SHIFT
  44969. CM2_CM_COMA_C23_C24__CM_COMA_C23_MASK
  44970. CM2_CM_COMA_C23_C24__CM_COMA_C23__SHIFT
  44971. CM2_CM_COMA_C23_C24__CM_COMA_C24_MASK
  44972. CM2_CM_COMA_C23_C24__CM_COMA_C24__SHIFT
  44973. CM2_CM_COMA_C31_C32__CM_COMA_C31_MASK
  44974. CM2_CM_COMA_C31_C32__CM_COMA_C31__SHIFT
  44975. CM2_CM_COMA_C31_C32__CM_COMA_C32_MASK
  44976. CM2_CM_COMA_C31_C32__CM_COMA_C32__SHIFT
  44977. CM2_CM_COMA_C33_C34__CM_COMA_C33_MASK
  44978. CM2_CM_COMA_C33_C34__CM_COMA_C33__SHIFT
  44979. CM2_CM_COMA_C33_C34__CM_COMA_C34_MASK
  44980. CM2_CM_COMA_C33_C34__CM_COMA_C34__SHIFT
  44981. CM2_CM_COMB_C11_C12__CM_COMB_C11_MASK
  44982. CM2_CM_COMB_C11_C12__CM_COMB_C11__SHIFT
  44983. CM2_CM_COMB_C11_C12__CM_COMB_C12_MASK
  44984. CM2_CM_COMB_C11_C12__CM_COMB_C12__SHIFT
  44985. CM2_CM_COMB_C13_C14__CM_COMB_C13_MASK
  44986. CM2_CM_COMB_C13_C14__CM_COMB_C13__SHIFT
  44987. CM2_CM_COMB_C13_C14__CM_COMB_C14_MASK
  44988. CM2_CM_COMB_C13_C14__CM_COMB_C14__SHIFT
  44989. CM2_CM_COMB_C21_C22__CM_COMB_C21_MASK
  44990. CM2_CM_COMB_C21_C22__CM_COMB_C21__SHIFT
  44991. CM2_CM_COMB_C21_C22__CM_COMB_C22_MASK
  44992. CM2_CM_COMB_C21_C22__CM_COMB_C22__SHIFT
  44993. CM2_CM_COMB_C23_C24__CM_COMB_C23_MASK
  44994. CM2_CM_COMB_C23_C24__CM_COMB_C23__SHIFT
  44995. CM2_CM_COMB_C23_C24__CM_COMB_C24_MASK
  44996. CM2_CM_COMB_C23_C24__CM_COMB_C24__SHIFT
  44997. CM2_CM_COMB_C31_C32__CM_COMB_C31_MASK
  44998. CM2_CM_COMB_C31_C32__CM_COMB_C31__SHIFT
  44999. CM2_CM_COMB_C31_C32__CM_COMB_C32_MASK
  45000. CM2_CM_COMB_C31_C32__CM_COMB_C32__SHIFT
  45001. CM2_CM_COMB_C33_C34__CM_COMB_C33_MASK
  45002. CM2_CM_COMB_C33_C34__CM_COMB_C33__SHIFT
  45003. CM2_CM_COMB_C33_C34__CM_COMB_C34_MASK
  45004. CM2_CM_COMB_C33_C34__CM_COMB_C34__SHIFT
  45005. CM2_CM_CONTROL__CM_BYPASS_EN_MASK
  45006. CM2_CM_CONTROL__CM_BYPASS_EN__SHIFT
  45007. CM2_CM_CONTROL__CM_BYPASS_MASK
  45008. CM2_CM_CONTROL__CM_BYPASS__SHIFT
  45009. CM2_CM_CONTROL__CM_UPDATE_PENDING_MASK
  45010. CM2_CM_CONTROL__CM_UPDATE_PENDING__SHIFT
  45011. CM2_CM_DEALPHA__CM_DEALPHA_EN_MASK
  45012. CM2_CM_DEALPHA__CM_DEALPHA_EN__SHIFT
  45013. CM2_CM_DENORM_CONTROL__CM_DENORM_MODE_MASK
  45014. CM2_CM_DENORM_CONTROL__CM_DENORM_MODE__SHIFT
  45015. CM2_CM_DENORM_CONTROL__CM_DENORM_ROUND_CLAMP_MASK
  45016. CM2_CM_DENORM_CONTROL__CM_DENORM_ROUND_CLAMP__SHIFT
  45017. CM2_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE_MASK
  45018. CM2_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE__SHIFT
  45019. CM2_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA_MASK
  45020. CM2_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA__SHIFT
  45021. CM2_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX_MASK
  45022. CM2_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX__SHIFT
  45023. CM2_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS_MASK
  45024. CM2_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS__SHIFT
  45025. CM2_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK_MASK
  45026. CM2_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK__SHIFT
  45027. CM2_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL_MASK
  45028. CM2_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL__SHIFT
  45029. CM2_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY_MASK
  45030. CM2_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY__SHIFT
  45031. CM2_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B_MASK
  45032. CM2_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B__SHIFT
  45033. CM2_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G_MASK
  45034. CM2_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G__SHIFT
  45035. CM2_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R_MASK
  45036. CM2_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R__SHIFT
  45037. CM2_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  45038. CM2_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  45039. CM2_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  45040. CM2_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  45041. CM2_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  45042. CM2_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  45043. CM2_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  45044. CM2_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  45045. CM2_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  45046. CM2_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  45047. CM2_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  45048. CM2_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  45049. CM2_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  45050. CM2_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  45051. CM2_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  45052. CM2_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  45053. CM2_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  45054. CM2_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  45055. CM2_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  45056. CM2_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  45057. CM2_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  45058. CM2_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  45059. CM2_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  45060. CM2_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  45061. CM2_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  45062. CM2_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  45063. CM2_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  45064. CM2_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  45065. CM2_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  45066. CM2_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  45067. CM2_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  45068. CM2_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  45069. CM2_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  45070. CM2_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  45071. CM2_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  45072. CM2_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  45073. CM2_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  45074. CM2_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  45075. CM2_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  45076. CM2_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  45077. CM2_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  45078. CM2_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  45079. CM2_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  45080. CM2_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  45081. CM2_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  45082. CM2_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  45083. CM2_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  45084. CM2_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  45085. CM2_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  45086. CM2_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  45087. CM2_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  45088. CM2_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  45089. CM2_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  45090. CM2_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  45091. CM2_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  45092. CM2_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  45093. CM2_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  45094. CM2_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  45095. CM2_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  45096. CM2_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  45097. CM2_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  45098. CM2_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  45099. CM2_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  45100. CM2_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  45101. CM2_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  45102. CM2_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  45103. CM2_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  45104. CM2_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  45105. CM2_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  45106. CM2_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  45107. CM2_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  45108. CM2_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  45109. CM2_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  45110. CM2_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  45111. CM2_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  45112. CM2_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  45113. CM2_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  45114. CM2_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  45115. CM2_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  45116. CM2_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  45117. CM2_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  45118. CM2_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  45119. CM2_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B_MASK
  45120. CM2_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B__SHIFT
  45121. CM2_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  45122. CM2_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  45123. CM2_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G_MASK
  45124. CM2_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G__SHIFT
  45125. CM2_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  45126. CM2_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  45127. CM2_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R_MASK
  45128. CM2_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R__SHIFT
  45129. CM2_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  45130. CM2_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  45131. CM2_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B_MASK
  45132. CM2_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B__SHIFT
  45133. CM2_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G_MASK
  45134. CM2_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G__SHIFT
  45135. CM2_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R_MASK
  45136. CM2_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R__SHIFT
  45137. CM2_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  45138. CM2_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  45139. CM2_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  45140. CM2_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  45141. CM2_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  45142. CM2_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  45143. CM2_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  45144. CM2_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  45145. CM2_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  45146. CM2_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  45147. CM2_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  45148. CM2_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  45149. CM2_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  45150. CM2_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  45151. CM2_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  45152. CM2_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  45153. CM2_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  45154. CM2_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  45155. CM2_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  45156. CM2_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  45157. CM2_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  45158. CM2_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  45159. CM2_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  45160. CM2_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  45161. CM2_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  45162. CM2_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  45163. CM2_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  45164. CM2_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  45165. CM2_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  45166. CM2_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  45167. CM2_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  45168. CM2_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  45169. CM2_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  45170. CM2_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  45171. CM2_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  45172. CM2_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  45173. CM2_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  45174. CM2_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  45175. CM2_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  45176. CM2_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  45177. CM2_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  45178. CM2_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  45179. CM2_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  45180. CM2_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  45181. CM2_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  45182. CM2_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  45183. CM2_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  45184. CM2_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  45185. CM2_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  45186. CM2_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  45187. CM2_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  45188. CM2_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  45189. CM2_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  45190. CM2_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  45191. CM2_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  45192. CM2_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  45193. CM2_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  45194. CM2_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  45195. CM2_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  45196. CM2_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  45197. CM2_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  45198. CM2_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  45199. CM2_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  45200. CM2_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  45201. CM2_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  45202. CM2_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  45203. CM2_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  45204. CM2_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  45205. CM2_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  45206. CM2_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  45207. CM2_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  45208. CM2_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  45209. CM2_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  45210. CM2_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  45211. CM2_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  45212. CM2_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  45213. CM2_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  45214. CM2_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  45215. CM2_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  45216. CM2_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  45217. CM2_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  45218. CM2_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  45219. CM2_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B_MASK
  45220. CM2_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B__SHIFT
  45221. CM2_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  45222. CM2_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  45223. CM2_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G_MASK
  45224. CM2_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G__SHIFT
  45225. CM2_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  45226. CM2_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  45227. CM2_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R_MASK
  45228. CM2_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R__SHIFT
  45229. CM2_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  45230. CM2_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  45231. CM2_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11_MASK
  45232. CM2_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11__SHIFT
  45233. CM2_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12_MASK
  45234. CM2_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12__SHIFT
  45235. CM2_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13_MASK
  45236. CM2_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13__SHIFT
  45237. CM2_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14_MASK
  45238. CM2_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14__SHIFT
  45239. CM2_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21_MASK
  45240. CM2_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21__SHIFT
  45241. CM2_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22_MASK
  45242. CM2_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22__SHIFT
  45243. CM2_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23_MASK
  45244. CM2_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23__SHIFT
  45245. CM2_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24_MASK
  45246. CM2_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24__SHIFT
  45247. CM2_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31_MASK
  45248. CM2_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31__SHIFT
  45249. CM2_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32_MASK
  45250. CM2_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32__SHIFT
  45251. CM2_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33_MASK
  45252. CM2_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33__SHIFT
  45253. CM2_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34_MASK
  45254. CM2_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34__SHIFT
  45255. CM2_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11_MASK
  45256. CM2_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11__SHIFT
  45257. CM2_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12_MASK
  45258. CM2_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12__SHIFT
  45259. CM2_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13_MASK
  45260. CM2_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13__SHIFT
  45261. CM2_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14_MASK
  45262. CM2_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14__SHIFT
  45263. CM2_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21_MASK
  45264. CM2_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21__SHIFT
  45265. CM2_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22_MASK
  45266. CM2_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22__SHIFT
  45267. CM2_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23_MASK
  45268. CM2_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23__SHIFT
  45269. CM2_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24_MASK
  45270. CM2_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24__SHIFT
  45271. CM2_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31_MASK
  45272. CM2_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31__SHIFT
  45273. CM2_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32_MASK
  45274. CM2_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32__SHIFT
  45275. CM2_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33_MASK
  45276. CM2_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33__SHIFT
  45277. CM2_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34_MASK
  45278. CM2_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34__SHIFT
  45279. CM2_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE_MASK
  45280. CM2_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE__SHIFT
  45281. CM2_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF_MASK
  45282. CM2_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF__SHIFT
  45283. CM2_CM_ICSC_B_C11_C12__CM_ICSC_B_C11_MASK
  45284. CM2_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT
  45285. CM2_CM_ICSC_B_C11_C12__CM_ICSC_B_C12_MASK
  45286. CM2_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT
  45287. CM2_CM_ICSC_B_C13_C14__CM_ICSC_B_C13_MASK
  45288. CM2_CM_ICSC_B_C13_C14__CM_ICSC_B_C13__SHIFT
  45289. CM2_CM_ICSC_B_C13_C14__CM_ICSC_B_C14_MASK
  45290. CM2_CM_ICSC_B_C13_C14__CM_ICSC_B_C14__SHIFT
  45291. CM2_CM_ICSC_B_C21_C22__CM_ICSC_B_C21_MASK
  45292. CM2_CM_ICSC_B_C21_C22__CM_ICSC_B_C21__SHIFT
  45293. CM2_CM_ICSC_B_C21_C22__CM_ICSC_B_C22_MASK
  45294. CM2_CM_ICSC_B_C21_C22__CM_ICSC_B_C22__SHIFT
  45295. CM2_CM_ICSC_B_C23_C24__CM_ICSC_B_C23_MASK
  45296. CM2_CM_ICSC_B_C23_C24__CM_ICSC_B_C23__SHIFT
  45297. CM2_CM_ICSC_B_C23_C24__CM_ICSC_B_C24_MASK
  45298. CM2_CM_ICSC_B_C23_C24__CM_ICSC_B_C24__SHIFT
  45299. CM2_CM_ICSC_B_C31_C32__CM_ICSC_B_C31_MASK
  45300. CM2_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT
  45301. CM2_CM_ICSC_B_C31_C32__CM_ICSC_B_C32_MASK
  45302. CM2_CM_ICSC_B_C31_C32__CM_ICSC_B_C32__SHIFT
  45303. CM2_CM_ICSC_B_C33_C34__CM_ICSC_B_C33_MASK
  45304. CM2_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT
  45305. CM2_CM_ICSC_B_C33_C34__CM_ICSC_B_C34_MASK
  45306. CM2_CM_ICSC_B_C33_C34__CM_ICSC_B_C34__SHIFT
  45307. CM2_CM_ICSC_C11_C12__CM_ICSC_C11_MASK
  45308. CM2_CM_ICSC_C11_C12__CM_ICSC_C11__SHIFT
  45309. CM2_CM_ICSC_C11_C12__CM_ICSC_C12_MASK
  45310. CM2_CM_ICSC_C11_C12__CM_ICSC_C12__SHIFT
  45311. CM2_CM_ICSC_C13_C14__CM_ICSC_C13_MASK
  45312. CM2_CM_ICSC_C13_C14__CM_ICSC_C13__SHIFT
  45313. CM2_CM_ICSC_C13_C14__CM_ICSC_C14_MASK
  45314. CM2_CM_ICSC_C13_C14__CM_ICSC_C14__SHIFT
  45315. CM2_CM_ICSC_C21_C22__CM_ICSC_C21_MASK
  45316. CM2_CM_ICSC_C21_C22__CM_ICSC_C21__SHIFT
  45317. CM2_CM_ICSC_C21_C22__CM_ICSC_C22_MASK
  45318. CM2_CM_ICSC_C21_C22__CM_ICSC_C22__SHIFT
  45319. CM2_CM_ICSC_C23_C24__CM_ICSC_C23_MASK
  45320. CM2_CM_ICSC_C23_C24__CM_ICSC_C23__SHIFT
  45321. CM2_CM_ICSC_C23_C24__CM_ICSC_C24_MASK
  45322. CM2_CM_ICSC_C23_C24__CM_ICSC_C24__SHIFT
  45323. CM2_CM_ICSC_C31_C32__CM_ICSC_C31_MASK
  45324. CM2_CM_ICSC_C31_C32__CM_ICSC_C31__SHIFT
  45325. CM2_CM_ICSC_C31_C32__CM_ICSC_C32_MASK
  45326. CM2_CM_ICSC_C31_C32__CM_ICSC_C32__SHIFT
  45327. CM2_CM_ICSC_C33_C34__CM_ICSC_C33_MASK
  45328. CM2_CM_ICSC_C33_C34__CM_ICSC_C33__SHIFT
  45329. CM2_CM_ICSC_C33_C34__CM_ICSC_C34_MASK
  45330. CM2_CM_ICSC_C33_C34__CM_ICSC_C34__SHIFT
  45331. CM2_CM_ICSC_CONTROL__CM_ICSC_MODE_MASK
  45332. CM2_CM_ICSC_CONTROL__CM_ICSC_MODE__SHIFT
  45333. CM2_CM_IGAM_CONTROL__CM_IGAM_INPUT_FORMAT_MASK
  45334. CM2_CM_IGAM_CONTROL__CM_IGAM_INPUT_FORMAT__SHIFT
  45335. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_B_FLOAT_POINT_EN_MASK
  45336. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_B_FLOAT_POINT_EN__SHIFT
  45337. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_B_MASK
  45338. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_B__SHIFT
  45339. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_G_MASK
  45340. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_G__SHIFT
  45341. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_R_MASK
  45342. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_R__SHIFT
  45343. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_B_MASK
  45344. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_B__SHIFT
  45345. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_G_MASK
  45346. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_G__SHIFT
  45347. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_R_MASK
  45348. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_R__SHIFT
  45349. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_G_FLOAT_POINT_EN_MASK
  45350. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_G_FLOAT_POINT_EN__SHIFT
  45351. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_B_MASK
  45352. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_B__SHIFT
  45353. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_G_MASK
  45354. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_G__SHIFT
  45355. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_R_MASK
  45356. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_R__SHIFT
  45357. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_MODE_MASK
  45358. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_MODE__SHIFT
  45359. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_R_FLOAT_POINT_EN_MASK
  45360. CM2_CM_IGAM_CONTROL__CM_IGAM_LUT_R_FLOAT_POINT_EN__SHIFT
  45361. CM2_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_BLUE_MASK
  45362. CM2_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_BLUE__SHIFT
  45363. CM2_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_GREEN_MASK
  45364. CM2_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_GREEN__SHIFT
  45365. CM2_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_RED_MASK
  45366. CM2_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_RED__SHIFT
  45367. CM2_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_DONE_MASK
  45368. CM2_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_DONE__SHIFT
  45369. CM2_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_MASK
  45370. CM2_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL__SHIFT
  45371. CM2_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_BLACK_OFFSET_BLUE_MASK
  45372. CM2_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_BLACK_OFFSET_BLUE__SHIFT
  45373. CM2_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_WHITE_OFFSET_BLUE_MASK
  45374. CM2_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_WHITE_OFFSET_BLUE__SHIFT
  45375. CM2_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_BLACK_OFFSET_GREEN_MASK
  45376. CM2_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_BLACK_OFFSET_GREEN__SHIFT
  45377. CM2_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_WHITE_OFFSET_GREEN_MASK
  45378. CM2_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_WHITE_OFFSET_GREEN__SHIFT
  45379. CM2_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_BLACK_OFFSET_RED_MASK
  45380. CM2_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_BLACK_OFFSET_RED__SHIFT
  45381. CM2_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_WHITE_OFFSET_RED_MASK
  45382. CM2_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_WHITE_OFFSET_RED__SHIFT
  45383. CM2_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_BASE_MASK
  45384. CM2_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_BASE__SHIFT
  45385. CM2_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_DELTA_MASK
  45386. CM2_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_DELTA__SHIFT
  45387. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_DGAM_CONFIG_STATUS_MASK
  45388. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_DGAM_CONFIG_STATUS__SHIFT
  45389. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_HOST_EN_MASK
  45390. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_HOST_EN__SHIFT
  45391. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_RW_MODE_MASK
  45392. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_RW_MODE__SHIFT
  45393. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_SEL_MASK
  45394. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_SEL__SHIFT
  45395. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_WRITE_EN_MASK_MASK
  45396. CM2_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_WRITE_EN_MASK__SHIFT
  45397. CM2_CM_IGAM_LUT_RW_INDEX__CM_IGAM_LUT_RW_INDEX_MASK
  45398. CM2_CM_IGAM_LUT_RW_INDEX__CM_IGAM_LUT_RW_INDEX__SHIFT
  45399. CM2_CM_IGAM_LUT_SEQ_COLOR__CM_IGAM_LUT_SEQ_COLOR_MASK
  45400. CM2_CM_IGAM_LUT_SEQ_COLOR__CM_IGAM_LUT_SEQ_COLOR__SHIFT
  45401. CM2_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS_MASK
  45402. CM2_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS__SHIFT
  45403. CM2_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE_MASK
  45404. CM2_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE__SHIFT
  45405. CM2_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS_MASK
  45406. CM2_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS__SHIFT
  45407. CM2_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE_MASK
  45408. CM2_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE__SHIFT
  45409. CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK
  45410. CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT
  45411. CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE_MASK
  45412. CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE__SHIFT
  45413. CM2_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_DIS_MASK
  45414. CM2_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_DIS__SHIFT
  45415. CM2_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_FORCE_MASK
  45416. CM2_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_FORCE__SHIFT
  45417. CM2_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS_MASK
  45418. CM2_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS__SHIFT
  45419. CM2_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE_MASK
  45420. CM2_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE__SHIFT
  45421. CM2_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE_MASK
  45422. CM2_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE__SHIFT
  45423. CM2_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE_MASK
  45424. CM2_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE__SHIFT
  45425. CM2_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE_MASK
  45426. CM2_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE__SHIFT
  45427. CM2_CM_MEM_PWR_STATUS__RGAM_MEM_PWR_STATE_MASK
  45428. CM2_CM_MEM_PWR_STATUS__RGAM_MEM_PWR_STATE__SHIFT
  45429. CM2_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE_MASK
  45430. CM2_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT
  45431. CM2_CM_OCSC_C11_C12__CM_OCSC_C11_MASK
  45432. CM2_CM_OCSC_C11_C12__CM_OCSC_C11__SHIFT
  45433. CM2_CM_OCSC_C11_C12__CM_OCSC_C12_MASK
  45434. CM2_CM_OCSC_C11_C12__CM_OCSC_C12__SHIFT
  45435. CM2_CM_OCSC_C13_C14__CM_OCSC_C13_MASK
  45436. CM2_CM_OCSC_C13_C14__CM_OCSC_C13__SHIFT
  45437. CM2_CM_OCSC_C13_C14__CM_OCSC_C14_MASK
  45438. CM2_CM_OCSC_C13_C14__CM_OCSC_C14__SHIFT
  45439. CM2_CM_OCSC_C21_C22__CM_OCSC_C21_MASK
  45440. CM2_CM_OCSC_C21_C22__CM_OCSC_C21__SHIFT
  45441. CM2_CM_OCSC_C21_C22__CM_OCSC_C22_MASK
  45442. CM2_CM_OCSC_C21_C22__CM_OCSC_C22__SHIFT
  45443. CM2_CM_OCSC_C23_C24__CM_OCSC_C23_MASK
  45444. CM2_CM_OCSC_C23_C24__CM_OCSC_C23__SHIFT
  45445. CM2_CM_OCSC_C23_C24__CM_OCSC_C24_MASK
  45446. CM2_CM_OCSC_C23_C24__CM_OCSC_C24__SHIFT
  45447. CM2_CM_OCSC_C31_C32__CM_OCSC_C31_MASK
  45448. CM2_CM_OCSC_C31_C32__CM_OCSC_C31__SHIFT
  45449. CM2_CM_OCSC_C31_C32__CM_OCSC_C32_MASK
  45450. CM2_CM_OCSC_C31_C32__CM_OCSC_C32__SHIFT
  45451. CM2_CM_OCSC_C33_C34__CM_OCSC_C33_MASK
  45452. CM2_CM_OCSC_C33_C34__CM_OCSC_C33__SHIFT
  45453. CM2_CM_OCSC_C33_C34__CM_OCSC_C34_MASK
  45454. CM2_CM_OCSC_C33_C34__CM_OCSC_C34__SHIFT
  45455. CM2_CM_OCSC_CONTROL__CM_OCSC_MODE_MASK
  45456. CM2_CM_OCSC_CONTROL__CM_OCSC_MODE__SHIFT
  45457. CM2_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MAX_B_MASK
  45458. CM2_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MAX_B__SHIFT
  45459. CM2_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MIN_B_MASK
  45460. CM2_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MIN_B__SHIFT
  45461. CM2_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MAX_G_MASK
  45462. CM2_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MAX_G__SHIFT
  45463. CM2_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MIN_G_MASK
  45464. CM2_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MIN_G__SHIFT
  45465. CM2_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MAX_R_MASK
  45466. CM2_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MAX_R__SHIFT
  45467. CM2_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MIN_R_MASK
  45468. CM2_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MIN_R__SHIFT
  45469. CM2_CM_RGAM_CONTROL__CM_RGAM_LUT_MODE_MASK
  45470. CM2_CM_RGAM_CONTROL__CM_RGAM_LUT_MODE__SHIFT
  45471. CM2_CM_RGAM_LUT_DATA__CM_RGAM_LUT_DATA_MASK
  45472. CM2_CM_RGAM_LUT_DATA__CM_RGAM_LUT_DATA__SHIFT
  45473. CM2_CM_RGAM_LUT_INDEX__CM_RGAM_LUT_INDEX_MASK
  45474. CM2_CM_RGAM_LUT_INDEX__CM_RGAM_LUT_INDEX__SHIFT
  45475. CM2_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_CONFIG_STATUS_MASK
  45476. CM2_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_CONFIG_STATUS__SHIFT
  45477. CM2_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_EN_MASK_MASK
  45478. CM2_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_EN_MASK__SHIFT
  45479. CM2_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_SEL_MASK
  45480. CM2_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_SEL__SHIFT
  45481. CM2_CM_RGAM_RAMA_END_CNTL1_B__CM_RGAM_RAMA_EXP_REGION_END_B_MASK
  45482. CM2_CM_RGAM_RAMA_END_CNTL1_B__CM_RGAM_RAMA_EXP_REGION_END_B__SHIFT
  45483. CM2_CM_RGAM_RAMA_END_CNTL1_G__CM_RGAM_RAMA_EXP_REGION_END_G_MASK
  45484. CM2_CM_RGAM_RAMA_END_CNTL1_G__CM_RGAM_RAMA_EXP_REGION_END_G__SHIFT
  45485. CM2_CM_RGAM_RAMA_END_CNTL1_R__CM_RGAM_RAMA_EXP_REGION_END_R_MASK
  45486. CM2_CM_RGAM_RAMA_END_CNTL1_R__CM_RGAM_RAMA_EXP_REGION_END_R__SHIFT
  45487. CM2_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  45488. CM2_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  45489. CM2_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  45490. CM2_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  45491. CM2_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  45492. CM2_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  45493. CM2_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  45494. CM2_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  45495. CM2_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  45496. CM2_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  45497. CM2_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  45498. CM2_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  45499. CM2_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  45500. CM2_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  45501. CM2_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  45502. CM2_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  45503. CM2_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  45504. CM2_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  45505. CM2_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  45506. CM2_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  45507. CM2_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  45508. CM2_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  45509. CM2_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  45510. CM2_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  45511. CM2_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  45512. CM2_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  45513. CM2_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  45514. CM2_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  45515. CM2_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  45516. CM2_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  45517. CM2_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  45518. CM2_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  45519. CM2_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  45520. CM2_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  45521. CM2_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  45522. CM2_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  45523. CM2_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  45524. CM2_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  45525. CM2_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  45526. CM2_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  45527. CM2_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  45528. CM2_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  45529. CM2_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  45530. CM2_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  45531. CM2_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  45532. CM2_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  45533. CM2_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  45534. CM2_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  45535. CM2_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  45536. CM2_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  45537. CM2_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  45538. CM2_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  45539. CM2_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  45540. CM2_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  45541. CM2_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  45542. CM2_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  45543. CM2_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  45544. CM2_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  45545. CM2_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  45546. CM2_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  45547. CM2_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  45548. CM2_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  45549. CM2_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  45550. CM2_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  45551. CM2_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  45552. CM2_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  45553. CM2_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  45554. CM2_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  45555. CM2_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  45556. CM2_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  45557. CM2_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  45558. CM2_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  45559. CM2_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  45560. CM2_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  45561. CM2_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  45562. CM2_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  45563. CM2_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  45564. CM2_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  45565. CM2_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  45566. CM2_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  45567. CM2_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  45568. CM2_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  45569. CM2_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  45570. CM2_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  45571. CM2_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  45572. CM2_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  45573. CM2_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  45574. CM2_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  45575. CM2_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  45576. CM2_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  45577. CM2_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  45578. CM2_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  45579. CM2_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  45580. CM2_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  45581. CM2_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  45582. CM2_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  45583. CM2_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  45584. CM2_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  45585. CM2_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  45586. CM2_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  45587. CM2_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  45588. CM2_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  45589. CM2_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  45590. CM2_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  45591. CM2_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  45592. CM2_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  45593. CM2_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  45594. CM2_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  45595. CM2_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  45596. CM2_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  45597. CM2_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  45598. CM2_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  45599. CM2_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  45600. CM2_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  45601. CM2_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  45602. CM2_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  45603. CM2_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  45604. CM2_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  45605. CM2_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  45606. CM2_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  45607. CM2_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  45608. CM2_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  45609. CM2_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  45610. CM2_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  45611. CM2_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  45612. CM2_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  45613. CM2_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  45614. CM2_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  45615. CM2_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  45616. CM2_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  45617. CM2_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  45618. CM2_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  45619. CM2_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  45620. CM2_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  45621. CM2_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  45622. CM2_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  45623. CM2_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  45624. CM2_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  45625. CM2_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  45626. CM2_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  45627. CM2_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  45628. CM2_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  45629. CM2_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  45630. CM2_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  45631. CM2_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  45632. CM2_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  45633. CM2_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  45634. CM2_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  45635. CM2_CM_RGAM_RAMA_SLOPE_CNTL_B__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  45636. CM2_CM_RGAM_RAMA_SLOPE_CNTL_B__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  45637. CM2_CM_RGAM_RAMA_SLOPE_CNTL_G__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  45638. CM2_CM_RGAM_RAMA_SLOPE_CNTL_G__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  45639. CM2_CM_RGAM_RAMA_SLOPE_CNTL_R__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  45640. CM2_CM_RGAM_RAMA_SLOPE_CNTL_R__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  45641. CM2_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_B_MASK
  45642. CM2_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_B__SHIFT
  45643. CM2_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  45644. CM2_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  45645. CM2_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_G_MASK
  45646. CM2_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_G__SHIFT
  45647. CM2_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  45648. CM2_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  45649. CM2_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_R_MASK
  45650. CM2_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_R__SHIFT
  45651. CM2_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  45652. CM2_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  45653. CM2_CM_RGAM_RAMB_END_CNTL1_B__CM_RGAM_RAMB_EXP_REGION_END_B_MASK
  45654. CM2_CM_RGAM_RAMB_END_CNTL1_B__CM_RGAM_RAMB_EXP_REGION_END_B__SHIFT
  45655. CM2_CM_RGAM_RAMB_END_CNTL1_G__CM_RGAM_RAMB_EXP_REGION_END_G_MASK
  45656. CM2_CM_RGAM_RAMB_END_CNTL1_G__CM_RGAM_RAMB_EXP_REGION_END_G__SHIFT
  45657. CM2_CM_RGAM_RAMB_END_CNTL1_R__CM_RGAM_RAMB_EXP_REGION_END_R_MASK
  45658. CM2_CM_RGAM_RAMB_END_CNTL1_R__CM_RGAM_RAMB_EXP_REGION_END_R__SHIFT
  45659. CM2_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  45660. CM2_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  45661. CM2_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  45662. CM2_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  45663. CM2_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  45664. CM2_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  45665. CM2_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  45666. CM2_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  45667. CM2_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  45668. CM2_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  45669. CM2_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  45670. CM2_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  45671. CM2_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  45672. CM2_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  45673. CM2_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  45674. CM2_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  45675. CM2_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  45676. CM2_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  45677. CM2_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  45678. CM2_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  45679. CM2_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  45680. CM2_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  45681. CM2_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  45682. CM2_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  45683. CM2_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  45684. CM2_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  45685. CM2_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  45686. CM2_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  45687. CM2_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  45688. CM2_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  45689. CM2_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  45690. CM2_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  45691. CM2_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  45692. CM2_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  45693. CM2_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  45694. CM2_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  45695. CM2_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  45696. CM2_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  45697. CM2_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  45698. CM2_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  45699. CM2_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  45700. CM2_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  45701. CM2_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  45702. CM2_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  45703. CM2_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  45704. CM2_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  45705. CM2_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  45706. CM2_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  45707. CM2_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  45708. CM2_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  45709. CM2_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  45710. CM2_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  45711. CM2_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  45712. CM2_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  45713. CM2_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  45714. CM2_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  45715. CM2_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  45716. CM2_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  45717. CM2_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  45718. CM2_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  45719. CM2_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  45720. CM2_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  45721. CM2_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  45722. CM2_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  45723. CM2_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  45724. CM2_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  45725. CM2_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  45726. CM2_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  45727. CM2_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  45728. CM2_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  45729. CM2_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  45730. CM2_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  45731. CM2_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  45732. CM2_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  45733. CM2_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  45734. CM2_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  45735. CM2_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  45736. CM2_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  45737. CM2_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  45738. CM2_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  45739. CM2_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  45740. CM2_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  45741. CM2_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  45742. CM2_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  45743. CM2_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  45744. CM2_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  45745. CM2_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  45746. CM2_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  45747. CM2_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  45748. CM2_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  45749. CM2_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  45750. CM2_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  45751. CM2_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  45752. CM2_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  45753. CM2_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  45754. CM2_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  45755. CM2_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  45756. CM2_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  45757. CM2_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  45758. CM2_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  45759. CM2_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  45760. CM2_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  45761. CM2_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  45762. CM2_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  45763. CM2_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  45764. CM2_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  45765. CM2_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  45766. CM2_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  45767. CM2_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  45768. CM2_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  45769. CM2_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  45770. CM2_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  45771. CM2_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  45772. CM2_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  45773. CM2_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  45774. CM2_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  45775. CM2_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  45776. CM2_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  45777. CM2_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  45778. CM2_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  45779. CM2_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  45780. CM2_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  45781. CM2_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  45782. CM2_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  45783. CM2_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  45784. CM2_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  45785. CM2_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  45786. CM2_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  45787. CM2_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  45788. CM2_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  45789. CM2_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  45790. CM2_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  45791. CM2_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  45792. CM2_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  45793. CM2_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  45794. CM2_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  45795. CM2_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  45796. CM2_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  45797. CM2_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  45798. CM2_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  45799. CM2_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  45800. CM2_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  45801. CM2_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  45802. CM2_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  45803. CM2_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  45804. CM2_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  45805. CM2_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  45806. CM2_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  45807. CM2_CM_RGAM_RAMB_SLOPE_CNTL_B__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  45808. CM2_CM_RGAM_RAMB_SLOPE_CNTL_B__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  45809. CM2_CM_RGAM_RAMB_SLOPE_CNTL_G__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  45810. CM2_CM_RGAM_RAMB_SLOPE_CNTL_G__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  45811. CM2_CM_RGAM_RAMB_SLOPE_CNTL_R__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  45812. CM2_CM_RGAM_RAMB_SLOPE_CNTL_R__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  45813. CM2_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_B_MASK
  45814. CM2_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_B__SHIFT
  45815. CM2_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  45816. CM2_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  45817. CM2_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_G_MASK
  45818. CM2_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_G__SHIFT
  45819. CM2_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  45820. CM2_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  45821. CM2_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_R_MASK
  45822. CM2_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_R__SHIFT
  45823. CM2_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  45824. CM2_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  45825. CM2_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK
  45826. CM2_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT
  45827. CM2_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA_MASK
  45828. CM2_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA__SHIFT
  45829. CM2_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX_MASK
  45830. CM2_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX__SHIFT
  45831. CM2_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS_MASK
  45832. CM2_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS__SHIFT
  45833. CM2_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK_MASK
  45834. CM2_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK__SHIFT
  45835. CM2_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL_MASK
  45836. CM2_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL__SHIFT
  45837. CM2_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B_MASK
  45838. CM2_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B__SHIFT
  45839. CM2_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G_MASK
  45840. CM2_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G__SHIFT
  45841. CM2_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R_MASK
  45842. CM2_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R__SHIFT
  45843. CM2_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B_MASK
  45844. CM2_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B__SHIFT
  45845. CM2_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B_MASK
  45846. CM2_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B__SHIFT
  45847. CM2_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G_MASK
  45848. CM2_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G__SHIFT
  45849. CM2_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G_MASK
  45850. CM2_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G__SHIFT
  45851. CM2_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R_MASK
  45852. CM2_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R__SHIFT
  45853. CM2_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R_MASK
  45854. CM2_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R__SHIFT
  45855. CM2_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  45856. CM2_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  45857. CM2_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  45858. CM2_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  45859. CM2_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  45860. CM2_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  45861. CM2_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  45862. CM2_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  45863. CM2_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  45864. CM2_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  45865. CM2_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  45866. CM2_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  45867. CM2_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  45868. CM2_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  45869. CM2_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  45870. CM2_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  45871. CM2_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  45872. CM2_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  45873. CM2_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  45874. CM2_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  45875. CM2_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  45876. CM2_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  45877. CM2_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  45878. CM2_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  45879. CM2_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  45880. CM2_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  45881. CM2_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  45882. CM2_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  45883. CM2_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  45884. CM2_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  45885. CM2_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  45886. CM2_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  45887. CM2_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  45888. CM2_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  45889. CM2_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  45890. CM2_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  45891. CM2_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  45892. CM2_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  45893. CM2_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  45894. CM2_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  45895. CM2_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  45896. CM2_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  45897. CM2_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  45898. CM2_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  45899. CM2_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  45900. CM2_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  45901. CM2_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  45902. CM2_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  45903. CM2_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  45904. CM2_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  45905. CM2_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  45906. CM2_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  45907. CM2_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  45908. CM2_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  45909. CM2_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  45910. CM2_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  45911. CM2_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  45912. CM2_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  45913. CM2_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  45914. CM2_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  45915. CM2_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  45916. CM2_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  45917. CM2_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  45918. CM2_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  45919. CM2_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  45920. CM2_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  45921. CM2_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  45922. CM2_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  45923. CM2_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  45924. CM2_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  45925. CM2_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  45926. CM2_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  45927. CM2_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  45928. CM2_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  45929. CM2_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  45930. CM2_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  45931. CM2_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  45932. CM2_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  45933. CM2_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  45934. CM2_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  45935. CM2_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  45936. CM2_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  45937. CM2_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  45938. CM2_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  45939. CM2_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  45940. CM2_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  45941. CM2_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  45942. CM2_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  45943. CM2_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  45944. CM2_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  45945. CM2_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  45946. CM2_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  45947. CM2_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  45948. CM2_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  45949. CM2_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  45950. CM2_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  45951. CM2_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  45952. CM2_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  45953. CM2_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  45954. CM2_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  45955. CM2_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  45956. CM2_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  45957. CM2_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  45958. CM2_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  45959. CM2_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  45960. CM2_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  45961. CM2_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  45962. CM2_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  45963. CM2_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  45964. CM2_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  45965. CM2_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  45966. CM2_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  45967. CM2_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  45968. CM2_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  45969. CM2_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  45970. CM2_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  45971. CM2_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  45972. CM2_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  45973. CM2_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  45974. CM2_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  45975. CM2_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  45976. CM2_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  45977. CM2_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  45978. CM2_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  45979. CM2_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  45980. CM2_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  45981. CM2_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  45982. CM2_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  45983. CM2_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  45984. CM2_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  45985. CM2_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  45986. CM2_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  45987. CM2_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  45988. CM2_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  45989. CM2_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  45990. CM2_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  45991. CM2_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B_MASK
  45992. CM2_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B__SHIFT
  45993. CM2_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  45994. CM2_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  45995. CM2_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G_MASK
  45996. CM2_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G__SHIFT
  45997. CM2_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  45998. CM2_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  45999. CM2_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R_MASK
  46000. CM2_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R__SHIFT
  46001. CM2_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  46002. CM2_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  46003. CM2_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B_MASK
  46004. CM2_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B__SHIFT
  46005. CM2_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B_MASK
  46006. CM2_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B__SHIFT
  46007. CM2_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G_MASK
  46008. CM2_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G__SHIFT
  46009. CM2_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G_MASK
  46010. CM2_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G__SHIFT
  46011. CM2_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R_MASK
  46012. CM2_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R__SHIFT
  46013. CM2_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R_MASK
  46014. CM2_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R__SHIFT
  46015. CM2_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  46016. CM2_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  46017. CM2_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  46018. CM2_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  46019. CM2_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  46020. CM2_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  46021. CM2_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  46022. CM2_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  46023. CM2_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  46024. CM2_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  46025. CM2_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  46026. CM2_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  46027. CM2_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  46028. CM2_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  46029. CM2_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  46030. CM2_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  46031. CM2_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  46032. CM2_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  46033. CM2_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  46034. CM2_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  46035. CM2_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  46036. CM2_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  46037. CM2_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  46038. CM2_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  46039. CM2_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  46040. CM2_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  46041. CM2_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  46042. CM2_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  46043. CM2_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  46044. CM2_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  46045. CM2_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  46046. CM2_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  46047. CM2_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  46048. CM2_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  46049. CM2_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  46050. CM2_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  46051. CM2_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  46052. CM2_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  46053. CM2_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  46054. CM2_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  46055. CM2_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  46056. CM2_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  46057. CM2_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  46058. CM2_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  46059. CM2_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  46060. CM2_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  46061. CM2_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  46062. CM2_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  46063. CM2_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  46064. CM2_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  46065. CM2_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  46066. CM2_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  46067. CM2_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  46068. CM2_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  46069. CM2_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  46070. CM2_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  46071. CM2_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  46072. CM2_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  46073. CM2_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  46074. CM2_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  46075. CM2_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  46076. CM2_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  46077. CM2_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  46078. CM2_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  46079. CM2_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  46080. CM2_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  46081. CM2_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  46082. CM2_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  46083. CM2_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  46084. CM2_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  46085. CM2_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  46086. CM2_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  46087. CM2_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  46088. CM2_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  46089. CM2_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  46090. CM2_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  46091. CM2_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  46092. CM2_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  46093. CM2_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  46094. CM2_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  46095. CM2_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  46096. CM2_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  46097. CM2_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  46098. CM2_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  46099. CM2_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  46100. CM2_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  46101. CM2_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  46102. CM2_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  46103. CM2_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  46104. CM2_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  46105. CM2_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  46106. CM2_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  46107. CM2_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  46108. CM2_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  46109. CM2_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  46110. CM2_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  46111. CM2_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  46112. CM2_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  46113. CM2_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  46114. CM2_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  46115. CM2_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  46116. CM2_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  46117. CM2_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  46118. CM2_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  46119. CM2_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  46120. CM2_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  46121. CM2_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  46122. CM2_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  46123. CM2_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  46124. CM2_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  46125. CM2_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  46126. CM2_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  46127. CM2_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  46128. CM2_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  46129. CM2_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  46130. CM2_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  46131. CM2_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  46132. CM2_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  46133. CM2_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  46134. CM2_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  46135. CM2_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  46136. CM2_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  46137. CM2_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  46138. CM2_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  46139. CM2_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  46140. CM2_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  46141. CM2_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  46142. CM2_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  46143. CM2_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  46144. CM2_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  46145. CM2_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  46146. CM2_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  46147. CM2_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  46148. CM2_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  46149. CM2_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  46150. CM2_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  46151. CM2_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B_MASK
  46152. CM2_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B__SHIFT
  46153. CM2_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  46154. CM2_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  46155. CM2_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G_MASK
  46156. CM2_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G__SHIFT
  46157. CM2_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  46158. CM2_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  46159. CM2_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R_MASK
  46160. CM2_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R__SHIFT
  46161. CM2_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  46162. CM2_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  46163. CM2_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B_MASK
  46164. CM2_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B__SHIFT
  46165. CM2_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G_MASK
  46166. CM2_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G__SHIFT
  46167. CM2_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R_MASK
  46168. CM2_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R__SHIFT
  46169. CM2_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA_MASK
  46170. CM2_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA__SHIFT
  46171. CM2_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK
  46172. CM2_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT
  46173. CM2_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK
  46174. CM2_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT
  46175. CM32181_CALIBSCALE_DEFAULT
  46176. CM32181_CALIBSCALE_RESOLUTION
  46177. CM32181_CMD_ALS_DISABLE
  46178. CM32181_CMD_ALS_ENABLE
  46179. CM32181_CMD_ALS_INT_EN
  46180. CM32181_CMD_ALS_IT_DEFAULT
  46181. CM32181_CMD_ALS_IT_MASK
  46182. CM32181_CMD_ALS_IT_SHIFT
  46183. CM32181_CMD_ALS_SM_DEFAULT
  46184. CM32181_CMD_ALS_SM_MASK
  46185. CM32181_CMD_ALS_SM_SHIFT
  46186. CM32181_CONF_REG_NUM
  46187. CM32181_MLUX_PER_BIT
  46188. CM32181_MLUX_PER_BIT_BASE_IT
  46189. CM32181_REG_ADDR_ALS
  46190. CM32181_REG_ADDR_CMD
  46191. CM32181_REG_ADDR_ID
  46192. CM32181_REG_ADDR_STATUS
  46193. CM3232_CALIBSCALE_DEFAULT
  46194. CM3232_CALIBSCALE_RESOLUTION
  46195. CM3232_CMD_ALS_DISABLE
  46196. CM3232_CMD_ALS_IT_DEFAULT
  46197. CM3232_CMD_ALS_IT_MASK
  46198. CM3232_CMD_ALS_IT_SHIFT
  46199. CM3232_CMD_ALS_RESET
  46200. CM3232_CMD_DEFAULT
  46201. CM3232_HW_ID
  46202. CM3232_MLUX_PER_BIT_BASE_IT
  46203. CM3232_MLUX_PER_BIT_DEFAULT
  46204. CM3232_MLUX_PER_LUX
  46205. CM3232_REG_ADDR_ALS
  46206. CM3232_REG_ADDR_CMD
  46207. CM3232_REG_ADDR_ID
  46208. CM3323_CMD_BLUE_DATA
  46209. CM3323_CMD_CLEAR_DATA
  46210. CM3323_CMD_CONF
  46211. CM3323_CMD_GREEN_DATA
  46212. CM3323_CMD_RED_DATA
  46213. CM3323_COLOR_CHANNEL
  46214. CM3323_CONF_AF_BIT
  46215. CM3323_CONF_IT_MASK
  46216. CM3323_CONF_IT_SHIFT
  46217. CM3323_CONF_SD_BIT
  46218. CM3323_DRV_NAME
  46219. CM3323_INT_TIME_AVAILABLE
  46220. CM3605_ALS_CHANNEL
  46221. CM3605_AOUT_MAX_MV
  46222. CM3605_AOUT_TYP_MAX_MV
  46223. CM3605_PROX_CHANNEL
  46224. CM36651_ALS_DISABLE
  46225. CM36651_ALS_ENABLE
  46226. CM36651_ALS_INT_EN
  46227. CM36651_ALS_THRES
  46228. CM36651_ALS_WH_L
  46229. CM36651_ALS_WH_M
  46230. CM36651_ALS_WL_L
  46231. CM36651_ALS_WL_M
  46232. CM36651_ARA
  46233. CM36651_CLOSE_PROXIMITY
  46234. CM36651_CMD_PROX_EV_DIS
  46235. CM36651_CMD_PROX_EV_EN
  46236. CM36651_CMD_READ_RAW_LIGHT
  46237. CM36651_CMD_READ_RAW_PROXIMITY
  46238. CM36651_CS_COLOR_NUM
  46239. CM36651_CS_CONF1
  46240. CM36651_CS_CONF2
  46241. CM36651_CS_CONF2_DEFAULT_BIT
  46242. CM36651_CS_CONF3
  46243. CM36651_CS_CONF_REG_NUM
  46244. CM36651_CS_INT_TIME_AVAIL
  46245. CM36651_CS_IT1
  46246. CM36651_CS_IT2
  46247. CM36651_CS_IT3
  46248. CM36651_CS_IT4
  46249. CM36651_FAR_PROXIMITY
  46250. CM36651_I2C_ADDR_PS
  46251. CM36651_LIGHT_CHANNEL
  46252. CM36651_LIGHT_CHANNEL_IDX_BLUE
  46253. CM36651_LIGHT_CHANNEL_IDX_CLEAR
  46254. CM36651_LIGHT_CHANNEL_IDX_GREEN
  46255. CM36651_LIGHT_CHANNEL_IDX_RED
  46256. CM36651_LIGHT_EN
  46257. CM36651_PROXIMITY_EN
  46258. CM36651_PROXIMITY_EV_EN
  46259. CM36651_PS_CANC
  46260. CM36651_PS_CANC_DEFAULT
  46261. CM36651_PS_CONF1
  46262. CM36651_PS_CONF2
  46263. CM36651_PS_DIR_INT
  46264. CM36651_PS_DISABLE
  46265. CM36651_PS_DR1
  46266. CM36651_PS_DR2
  46267. CM36651_PS_DR3
  46268. CM36651_PS_DR4
  46269. CM36651_PS_ENABLE
  46270. CM36651_PS_HYS1
  46271. CM36651_PS_HYS2
  46272. CM36651_PS_INITIAL_THD
  46273. CM36651_PS_INT_EN
  46274. CM36651_PS_INT_TIME_AVAIL
  46275. CM36651_PS_IT1
  46276. CM36651_PS_IT2
  46277. CM36651_PS_IT3
  46278. CM36651_PS_IT4
  46279. CM36651_PS_MS
  46280. CM36651_PS_PERS2
  46281. CM36651_PS_PERS3
  46282. CM36651_PS_PERS4
  46283. CM36651_PS_REG_NUM
  46284. CM36651_PS_SMART_PERS_EN
  46285. CM36651_PS_THD
  46286. CM3_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT_MASK
  46287. CM3_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT__SHIFT
  46288. CM3_CM_3DLUT_DATA__CM_3DLUT_DATA0_MASK
  46289. CM3_CM_3DLUT_DATA__CM_3DLUT_DATA0__SHIFT
  46290. CM3_CM_3DLUT_DATA__CM_3DLUT_DATA1_MASK
  46291. CM3_CM_3DLUT_DATA__CM_3DLUT_DATA1__SHIFT
  46292. CM3_CM_3DLUT_INDEX__CM_3DLUT_INDEX_MASK
  46293. CM3_CM_3DLUT_INDEX__CM_3DLUT_INDEX__SHIFT
  46294. CM3_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK
  46295. CM3_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT
  46296. CM3_CM_3DLUT_MODE__CM_3DLUT_SIZE_MASK
  46297. CM3_CM_3DLUT_MODE__CM_3DLUT_SIZE__SHIFT
  46298. CM3_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR_MASK
  46299. CM3_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR__SHIFT
  46300. CM3_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B_MASK
  46301. CM3_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B__SHIFT
  46302. CM3_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B_MASK
  46303. CM3_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B__SHIFT
  46304. CM3_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G_MASK
  46305. CM3_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G__SHIFT
  46306. CM3_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G_MASK
  46307. CM3_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G__SHIFT
  46308. CM3_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R_MASK
  46309. CM3_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R__SHIFT
  46310. CM3_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R_MASK
  46311. CM3_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R__SHIFT
  46312. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN_MASK
  46313. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN__SHIFT
  46314. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS_MASK
  46315. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS__SHIFT
  46316. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL_MASK
  46317. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL__SHIFT
  46318. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL_MASK
  46319. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL__SHIFT
  46320. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK_MASK
  46321. CM3_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK__SHIFT
  46322. CM3_CM_BIAS_CR_R__CM_BIAS_CR_R_MASK
  46323. CM3_CM_BIAS_CR_R__CM_BIAS_CR_R__SHIFT
  46324. CM3_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B_MASK
  46325. CM3_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B__SHIFT
  46326. CM3_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G_MASK
  46327. CM3_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G__SHIFT
  46328. CM3_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE_MASK
  46329. CM3_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE__SHIFT
  46330. CM3_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA_MASK
  46331. CM3_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA__SHIFT
  46332. CM3_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX_MASK
  46333. CM3_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX__SHIFT
  46334. CM3_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS_MASK
  46335. CM3_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS__SHIFT
  46336. CM3_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK_MASK
  46337. CM3_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK__SHIFT
  46338. CM3_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL_MASK
  46339. CM3_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL__SHIFT
  46340. CM3_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B_MASK
  46341. CM3_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B__SHIFT
  46342. CM3_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G_MASK
  46343. CM3_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G__SHIFT
  46344. CM3_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R_MASK
  46345. CM3_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R__SHIFT
  46346. CM3_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  46347. CM3_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  46348. CM3_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  46349. CM3_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  46350. CM3_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  46351. CM3_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  46352. CM3_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  46353. CM3_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  46354. CM3_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  46355. CM3_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  46356. CM3_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  46357. CM3_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  46358. CM3_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  46359. CM3_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  46360. CM3_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  46361. CM3_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  46362. CM3_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  46363. CM3_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  46364. CM3_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  46365. CM3_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  46366. CM3_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  46367. CM3_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  46368. CM3_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  46369. CM3_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  46370. CM3_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  46371. CM3_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  46372. CM3_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  46373. CM3_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  46374. CM3_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  46375. CM3_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  46376. CM3_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  46377. CM3_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  46378. CM3_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  46379. CM3_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  46380. CM3_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  46381. CM3_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  46382. CM3_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  46383. CM3_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  46384. CM3_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  46385. CM3_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  46386. CM3_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  46387. CM3_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  46388. CM3_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  46389. CM3_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  46390. CM3_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  46391. CM3_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  46392. CM3_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  46393. CM3_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  46394. CM3_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  46395. CM3_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  46396. CM3_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  46397. CM3_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  46398. CM3_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  46399. CM3_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  46400. CM3_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  46401. CM3_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  46402. CM3_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  46403. CM3_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  46404. CM3_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  46405. CM3_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  46406. CM3_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  46407. CM3_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  46408. CM3_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  46409. CM3_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  46410. CM3_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  46411. CM3_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  46412. CM3_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  46413. CM3_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  46414. CM3_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  46415. CM3_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  46416. CM3_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  46417. CM3_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  46418. CM3_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  46419. CM3_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  46420. CM3_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  46421. CM3_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  46422. CM3_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  46423. CM3_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  46424. CM3_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  46425. CM3_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  46426. CM3_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  46427. CM3_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  46428. CM3_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  46429. CM3_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  46430. CM3_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  46431. CM3_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  46432. CM3_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  46433. CM3_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  46434. CM3_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  46435. CM3_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  46436. CM3_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  46437. CM3_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  46438. CM3_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  46439. CM3_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  46440. CM3_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  46441. CM3_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  46442. CM3_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  46443. CM3_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  46444. CM3_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  46445. CM3_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  46446. CM3_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  46447. CM3_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  46448. CM3_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  46449. CM3_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  46450. CM3_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  46451. CM3_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  46452. CM3_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  46453. CM3_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  46454. CM3_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  46455. CM3_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  46456. CM3_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  46457. CM3_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  46458. CM3_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  46459. CM3_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  46460. CM3_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  46461. CM3_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  46462. CM3_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  46463. CM3_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  46464. CM3_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  46465. CM3_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  46466. CM3_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  46467. CM3_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  46468. CM3_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  46469. CM3_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  46470. CM3_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  46471. CM3_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  46472. CM3_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  46473. CM3_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  46474. CM3_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  46475. CM3_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  46476. CM3_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  46477. CM3_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  46478. CM3_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  46479. CM3_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  46480. CM3_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  46481. CM3_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  46482. CM3_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  46483. CM3_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  46484. CM3_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  46485. CM3_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  46486. CM3_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  46487. CM3_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  46488. CM3_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  46489. CM3_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  46490. CM3_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  46491. CM3_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  46492. CM3_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  46493. CM3_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  46494. CM3_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  46495. CM3_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  46496. CM3_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  46497. CM3_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  46498. CM3_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  46499. CM3_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  46500. CM3_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B_MASK
  46501. CM3_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B__SHIFT
  46502. CM3_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  46503. CM3_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  46504. CM3_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G_MASK
  46505. CM3_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G__SHIFT
  46506. CM3_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  46507. CM3_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  46508. CM3_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R_MASK
  46509. CM3_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R__SHIFT
  46510. CM3_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  46511. CM3_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  46512. CM3_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B_MASK
  46513. CM3_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B__SHIFT
  46514. CM3_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G_MASK
  46515. CM3_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G__SHIFT
  46516. CM3_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R_MASK
  46517. CM3_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R__SHIFT
  46518. CM3_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  46519. CM3_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  46520. CM3_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  46521. CM3_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  46522. CM3_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  46523. CM3_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  46524. CM3_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  46525. CM3_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  46526. CM3_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  46527. CM3_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  46528. CM3_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  46529. CM3_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  46530. CM3_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  46531. CM3_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  46532. CM3_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  46533. CM3_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  46534. CM3_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  46535. CM3_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  46536. CM3_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  46537. CM3_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  46538. CM3_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  46539. CM3_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  46540. CM3_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  46541. CM3_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  46542. CM3_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  46543. CM3_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  46544. CM3_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  46545. CM3_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  46546. CM3_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  46547. CM3_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  46548. CM3_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  46549. CM3_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  46550. CM3_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  46551. CM3_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  46552. CM3_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  46553. CM3_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  46554. CM3_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  46555. CM3_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  46556. CM3_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  46557. CM3_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  46558. CM3_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  46559. CM3_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  46560. CM3_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  46561. CM3_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  46562. CM3_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  46563. CM3_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  46564. CM3_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  46565. CM3_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  46566. CM3_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  46567. CM3_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  46568. CM3_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  46569. CM3_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  46570. CM3_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  46571. CM3_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  46572. CM3_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  46573. CM3_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  46574. CM3_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  46575. CM3_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  46576. CM3_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  46577. CM3_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  46578. CM3_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  46579. CM3_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  46580. CM3_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  46581. CM3_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  46582. CM3_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  46583. CM3_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  46584. CM3_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  46585. CM3_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  46586. CM3_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  46587. CM3_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  46588. CM3_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  46589. CM3_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  46590. CM3_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  46591. CM3_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  46592. CM3_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  46593. CM3_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  46594. CM3_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  46595. CM3_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  46596. CM3_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  46597. CM3_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  46598. CM3_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  46599. CM3_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  46600. CM3_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  46601. CM3_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  46602. CM3_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  46603. CM3_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  46604. CM3_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  46605. CM3_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  46606. CM3_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  46607. CM3_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  46608. CM3_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  46609. CM3_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  46610. CM3_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  46611. CM3_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  46612. CM3_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  46613. CM3_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  46614. CM3_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  46615. CM3_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  46616. CM3_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  46617. CM3_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  46618. CM3_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  46619. CM3_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  46620. CM3_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  46621. CM3_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  46622. CM3_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  46623. CM3_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  46624. CM3_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  46625. CM3_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  46626. CM3_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  46627. CM3_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  46628. CM3_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  46629. CM3_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  46630. CM3_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  46631. CM3_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  46632. CM3_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  46633. CM3_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  46634. CM3_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  46635. CM3_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  46636. CM3_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  46637. CM3_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  46638. CM3_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  46639. CM3_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  46640. CM3_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  46641. CM3_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  46642. CM3_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  46643. CM3_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  46644. CM3_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  46645. CM3_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  46646. CM3_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  46647. CM3_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  46648. CM3_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  46649. CM3_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  46650. CM3_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  46651. CM3_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  46652. CM3_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  46653. CM3_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  46654. CM3_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  46655. CM3_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  46656. CM3_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  46657. CM3_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  46658. CM3_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  46659. CM3_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  46660. CM3_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  46661. CM3_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  46662. CM3_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  46663. CM3_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  46664. CM3_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  46665. CM3_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  46666. CM3_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  46667. CM3_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  46668. CM3_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  46669. CM3_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  46670. CM3_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  46671. CM3_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  46672. CM3_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B_MASK
  46673. CM3_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B__SHIFT
  46674. CM3_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  46675. CM3_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  46676. CM3_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G_MASK
  46677. CM3_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G__SHIFT
  46678. CM3_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  46679. CM3_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  46680. CM3_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R_MASK
  46681. CM3_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R__SHIFT
  46682. CM3_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  46683. CM3_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  46684. CM3_CM_BNS_VALUES_B__CM_BNS_BIAS_B_MASK
  46685. CM3_CM_BNS_VALUES_B__CM_BNS_BIAS_B__SHIFT
  46686. CM3_CM_BNS_VALUES_B__CM_BNS_SCALE_B_MASK
  46687. CM3_CM_BNS_VALUES_B__CM_BNS_SCALE_B__SHIFT
  46688. CM3_CM_BNS_VALUES_G__CM_BNS_BIAS_G_MASK
  46689. CM3_CM_BNS_VALUES_G__CM_BNS_BIAS_G__SHIFT
  46690. CM3_CM_BNS_VALUES_G__CM_BNS_SCALE_G_MASK
  46691. CM3_CM_BNS_VALUES_G__CM_BNS_SCALE_G__SHIFT
  46692. CM3_CM_BNS_VALUES_R__CM_BNS_BIAS_R_MASK
  46693. CM3_CM_BNS_VALUES_R__CM_BNS_BIAS_R__SHIFT
  46694. CM3_CM_BNS_VALUES_R__CM_BNS_SCALE_R_MASK
  46695. CM3_CM_BNS_VALUES_R__CM_BNS_SCALE_R__SHIFT
  46696. CM3_CM_CMOUT_CONTROL__CM_CMOUT_FRAME_RANDOM_ENABLE_MASK
  46697. CM3_CM_CMOUT_CONTROL__CM_CMOUT_FRAME_RANDOM_ENABLE__SHIFT
  46698. CM3_CM_CMOUT_CONTROL__CM_CMOUT_HIGHPASS_RANDOM_ENABLE_MASK
  46699. CM3_CM_CMOUT_CONTROL__CM_CMOUT_HIGHPASS_RANDOM_ENABLE__SHIFT
  46700. CM3_CM_CMOUT_CONTROL__CM_CMOUT_RGB_RANDOM_EN_MASK
  46701. CM3_CM_CMOUT_CONTROL__CM_CMOUT_RGB_RANDOM_EN__SHIFT
  46702. CM3_CM_CMOUT_CONTROL__CM_CMOUT_ROUND_TRUNC_MODE_MASK
  46703. CM3_CM_CMOUT_CONTROL__CM_CMOUT_ROUND_TRUNC_MODE__SHIFT
  46704. CM3_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_DEPTH_MASK
  46705. CM3_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_DEPTH__SHIFT
  46706. CM3_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_EN_MASK
  46707. CM3_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_EN__SHIFT
  46708. CM3_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_MODE_MASK
  46709. CM3_CM_CMOUT_CONTROL__CM_CMOUT_SPATIAL_DITHER_MODE__SHIFT
  46710. CM3_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_B_SEED_MASK
  46711. CM3_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_B_SEED__SHIFT
  46712. CM3_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_G_SEED_MASK
  46713. CM3_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_G_SEED__SHIFT
  46714. CM3_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_R_SEED_MASK
  46715. CM3_CM_CMOUT_RANDOM_SEEDS__CM_CMOUT_RAND_R_SEED__SHIFT
  46716. CM3_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK
  46717. CM3_CM_COEF_FORMAT__CM_BIAS_FORMAT__SHIFT
  46718. CM3_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK
  46719. CM3_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT__SHIFT
  46720. CM3_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT_MASK
  46721. CM3_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT__SHIFT
  46722. CM3_CM_COMA_C11_C12__CM_COMA_C11_MASK
  46723. CM3_CM_COMA_C11_C12__CM_COMA_C11__SHIFT
  46724. CM3_CM_COMA_C11_C12__CM_COMA_C12_MASK
  46725. CM3_CM_COMA_C11_C12__CM_COMA_C12__SHIFT
  46726. CM3_CM_COMA_C13_C14__CM_COMA_C13_MASK
  46727. CM3_CM_COMA_C13_C14__CM_COMA_C13__SHIFT
  46728. CM3_CM_COMA_C13_C14__CM_COMA_C14_MASK
  46729. CM3_CM_COMA_C13_C14__CM_COMA_C14__SHIFT
  46730. CM3_CM_COMA_C21_C22__CM_COMA_C21_MASK
  46731. CM3_CM_COMA_C21_C22__CM_COMA_C21__SHIFT
  46732. CM3_CM_COMA_C21_C22__CM_COMA_C22_MASK
  46733. CM3_CM_COMA_C21_C22__CM_COMA_C22__SHIFT
  46734. CM3_CM_COMA_C23_C24__CM_COMA_C23_MASK
  46735. CM3_CM_COMA_C23_C24__CM_COMA_C23__SHIFT
  46736. CM3_CM_COMA_C23_C24__CM_COMA_C24_MASK
  46737. CM3_CM_COMA_C23_C24__CM_COMA_C24__SHIFT
  46738. CM3_CM_COMA_C31_C32__CM_COMA_C31_MASK
  46739. CM3_CM_COMA_C31_C32__CM_COMA_C31__SHIFT
  46740. CM3_CM_COMA_C31_C32__CM_COMA_C32_MASK
  46741. CM3_CM_COMA_C31_C32__CM_COMA_C32__SHIFT
  46742. CM3_CM_COMA_C33_C34__CM_COMA_C33_MASK
  46743. CM3_CM_COMA_C33_C34__CM_COMA_C33__SHIFT
  46744. CM3_CM_COMA_C33_C34__CM_COMA_C34_MASK
  46745. CM3_CM_COMA_C33_C34__CM_COMA_C34__SHIFT
  46746. CM3_CM_COMB_C11_C12__CM_COMB_C11_MASK
  46747. CM3_CM_COMB_C11_C12__CM_COMB_C11__SHIFT
  46748. CM3_CM_COMB_C11_C12__CM_COMB_C12_MASK
  46749. CM3_CM_COMB_C11_C12__CM_COMB_C12__SHIFT
  46750. CM3_CM_COMB_C13_C14__CM_COMB_C13_MASK
  46751. CM3_CM_COMB_C13_C14__CM_COMB_C13__SHIFT
  46752. CM3_CM_COMB_C13_C14__CM_COMB_C14_MASK
  46753. CM3_CM_COMB_C13_C14__CM_COMB_C14__SHIFT
  46754. CM3_CM_COMB_C21_C22__CM_COMB_C21_MASK
  46755. CM3_CM_COMB_C21_C22__CM_COMB_C21__SHIFT
  46756. CM3_CM_COMB_C21_C22__CM_COMB_C22_MASK
  46757. CM3_CM_COMB_C21_C22__CM_COMB_C22__SHIFT
  46758. CM3_CM_COMB_C23_C24__CM_COMB_C23_MASK
  46759. CM3_CM_COMB_C23_C24__CM_COMB_C23__SHIFT
  46760. CM3_CM_COMB_C23_C24__CM_COMB_C24_MASK
  46761. CM3_CM_COMB_C23_C24__CM_COMB_C24__SHIFT
  46762. CM3_CM_COMB_C31_C32__CM_COMB_C31_MASK
  46763. CM3_CM_COMB_C31_C32__CM_COMB_C31__SHIFT
  46764. CM3_CM_COMB_C31_C32__CM_COMB_C32_MASK
  46765. CM3_CM_COMB_C31_C32__CM_COMB_C32__SHIFT
  46766. CM3_CM_COMB_C33_C34__CM_COMB_C33_MASK
  46767. CM3_CM_COMB_C33_C34__CM_COMB_C33__SHIFT
  46768. CM3_CM_COMB_C33_C34__CM_COMB_C34_MASK
  46769. CM3_CM_COMB_C33_C34__CM_COMB_C34__SHIFT
  46770. CM3_CM_CONTROL__CM_BYPASS_EN_MASK
  46771. CM3_CM_CONTROL__CM_BYPASS_EN__SHIFT
  46772. CM3_CM_CONTROL__CM_BYPASS_MASK
  46773. CM3_CM_CONTROL__CM_BYPASS__SHIFT
  46774. CM3_CM_CONTROL__CM_UPDATE_PENDING_MASK
  46775. CM3_CM_CONTROL__CM_UPDATE_PENDING__SHIFT
  46776. CM3_CM_DEALPHA__CM_DEALPHA_EN_MASK
  46777. CM3_CM_DEALPHA__CM_DEALPHA_EN__SHIFT
  46778. CM3_CM_DENORM_CONTROL__CM_DENORM_MODE_MASK
  46779. CM3_CM_DENORM_CONTROL__CM_DENORM_MODE__SHIFT
  46780. CM3_CM_DENORM_CONTROL__CM_DENORM_ROUND_CLAMP_MASK
  46781. CM3_CM_DENORM_CONTROL__CM_DENORM_ROUND_CLAMP__SHIFT
  46782. CM3_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE_MASK
  46783. CM3_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE__SHIFT
  46784. CM3_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA_MASK
  46785. CM3_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA__SHIFT
  46786. CM3_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX_MASK
  46787. CM3_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX__SHIFT
  46788. CM3_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS_MASK
  46789. CM3_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS__SHIFT
  46790. CM3_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK_MASK
  46791. CM3_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK__SHIFT
  46792. CM3_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL_MASK
  46793. CM3_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL__SHIFT
  46794. CM3_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY_MASK
  46795. CM3_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY__SHIFT
  46796. CM3_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B_MASK
  46797. CM3_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B__SHIFT
  46798. CM3_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G_MASK
  46799. CM3_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G__SHIFT
  46800. CM3_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R_MASK
  46801. CM3_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R__SHIFT
  46802. CM3_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  46803. CM3_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  46804. CM3_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  46805. CM3_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  46806. CM3_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  46807. CM3_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  46808. CM3_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  46809. CM3_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  46810. CM3_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  46811. CM3_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  46812. CM3_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  46813. CM3_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  46814. CM3_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  46815. CM3_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  46816. CM3_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  46817. CM3_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  46818. CM3_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  46819. CM3_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  46820. CM3_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  46821. CM3_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  46822. CM3_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  46823. CM3_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  46824. CM3_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  46825. CM3_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  46826. CM3_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  46827. CM3_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  46828. CM3_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  46829. CM3_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  46830. CM3_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  46831. CM3_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  46832. CM3_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  46833. CM3_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  46834. CM3_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  46835. CM3_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  46836. CM3_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  46837. CM3_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  46838. CM3_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  46839. CM3_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  46840. CM3_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  46841. CM3_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  46842. CM3_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  46843. CM3_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  46844. CM3_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  46845. CM3_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  46846. CM3_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  46847. CM3_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  46848. CM3_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  46849. CM3_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  46850. CM3_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  46851. CM3_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  46852. CM3_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  46853. CM3_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  46854. CM3_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  46855. CM3_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  46856. CM3_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  46857. CM3_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  46858. CM3_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  46859. CM3_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  46860. CM3_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  46861. CM3_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  46862. CM3_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  46863. CM3_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  46864. CM3_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  46865. CM3_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  46866. CM3_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  46867. CM3_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  46868. CM3_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  46869. CM3_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  46870. CM3_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  46871. CM3_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  46872. CM3_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  46873. CM3_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  46874. CM3_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  46875. CM3_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  46876. CM3_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  46877. CM3_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  46878. CM3_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  46879. CM3_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  46880. CM3_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  46881. CM3_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  46882. CM3_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  46883. CM3_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  46884. CM3_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B_MASK
  46885. CM3_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B__SHIFT
  46886. CM3_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  46887. CM3_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  46888. CM3_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G_MASK
  46889. CM3_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G__SHIFT
  46890. CM3_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  46891. CM3_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  46892. CM3_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R_MASK
  46893. CM3_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R__SHIFT
  46894. CM3_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  46895. CM3_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  46896. CM3_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B_MASK
  46897. CM3_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B__SHIFT
  46898. CM3_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G_MASK
  46899. CM3_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G__SHIFT
  46900. CM3_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R_MASK
  46901. CM3_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R__SHIFT
  46902. CM3_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  46903. CM3_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  46904. CM3_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  46905. CM3_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  46906. CM3_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  46907. CM3_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  46908. CM3_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  46909. CM3_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  46910. CM3_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  46911. CM3_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  46912. CM3_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  46913. CM3_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  46914. CM3_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  46915. CM3_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  46916. CM3_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  46917. CM3_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  46918. CM3_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  46919. CM3_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  46920. CM3_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  46921. CM3_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  46922. CM3_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  46923. CM3_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  46924. CM3_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  46925. CM3_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  46926. CM3_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  46927. CM3_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  46928. CM3_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  46929. CM3_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  46930. CM3_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  46931. CM3_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  46932. CM3_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  46933. CM3_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  46934. CM3_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  46935. CM3_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  46936. CM3_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  46937. CM3_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  46938. CM3_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  46939. CM3_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  46940. CM3_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  46941. CM3_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  46942. CM3_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  46943. CM3_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  46944. CM3_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  46945. CM3_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  46946. CM3_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  46947. CM3_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  46948. CM3_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  46949. CM3_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  46950. CM3_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  46951. CM3_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  46952. CM3_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  46953. CM3_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  46954. CM3_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  46955. CM3_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  46956. CM3_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  46957. CM3_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  46958. CM3_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  46959. CM3_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  46960. CM3_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  46961. CM3_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  46962. CM3_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  46963. CM3_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  46964. CM3_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  46965. CM3_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  46966. CM3_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  46967. CM3_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  46968. CM3_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  46969. CM3_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  46970. CM3_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  46971. CM3_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  46972. CM3_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  46973. CM3_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  46974. CM3_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  46975. CM3_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  46976. CM3_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  46977. CM3_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  46978. CM3_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  46979. CM3_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  46980. CM3_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  46981. CM3_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  46982. CM3_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  46983. CM3_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  46984. CM3_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B_MASK
  46985. CM3_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B__SHIFT
  46986. CM3_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  46987. CM3_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  46988. CM3_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G_MASK
  46989. CM3_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G__SHIFT
  46990. CM3_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  46991. CM3_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  46992. CM3_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R_MASK
  46993. CM3_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R__SHIFT
  46994. CM3_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  46995. CM3_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  46996. CM3_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11_MASK
  46997. CM3_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11__SHIFT
  46998. CM3_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12_MASK
  46999. CM3_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12__SHIFT
  47000. CM3_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13_MASK
  47001. CM3_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13__SHIFT
  47002. CM3_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14_MASK
  47003. CM3_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14__SHIFT
  47004. CM3_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21_MASK
  47005. CM3_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21__SHIFT
  47006. CM3_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22_MASK
  47007. CM3_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22__SHIFT
  47008. CM3_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23_MASK
  47009. CM3_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23__SHIFT
  47010. CM3_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24_MASK
  47011. CM3_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24__SHIFT
  47012. CM3_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31_MASK
  47013. CM3_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31__SHIFT
  47014. CM3_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32_MASK
  47015. CM3_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32__SHIFT
  47016. CM3_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33_MASK
  47017. CM3_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33__SHIFT
  47018. CM3_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34_MASK
  47019. CM3_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34__SHIFT
  47020. CM3_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11_MASK
  47021. CM3_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11__SHIFT
  47022. CM3_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12_MASK
  47023. CM3_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12__SHIFT
  47024. CM3_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13_MASK
  47025. CM3_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13__SHIFT
  47026. CM3_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14_MASK
  47027. CM3_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14__SHIFT
  47028. CM3_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21_MASK
  47029. CM3_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21__SHIFT
  47030. CM3_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22_MASK
  47031. CM3_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22__SHIFT
  47032. CM3_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23_MASK
  47033. CM3_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23__SHIFT
  47034. CM3_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24_MASK
  47035. CM3_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24__SHIFT
  47036. CM3_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31_MASK
  47037. CM3_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31__SHIFT
  47038. CM3_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32_MASK
  47039. CM3_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32__SHIFT
  47040. CM3_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33_MASK
  47041. CM3_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33__SHIFT
  47042. CM3_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34_MASK
  47043. CM3_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34__SHIFT
  47044. CM3_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE_MASK
  47045. CM3_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE__SHIFT
  47046. CM3_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF_MASK
  47047. CM3_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF__SHIFT
  47048. CM3_CM_ICSC_B_C11_C12__CM_ICSC_B_C11_MASK
  47049. CM3_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT
  47050. CM3_CM_ICSC_B_C11_C12__CM_ICSC_B_C12_MASK
  47051. CM3_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT
  47052. CM3_CM_ICSC_B_C13_C14__CM_ICSC_B_C13_MASK
  47053. CM3_CM_ICSC_B_C13_C14__CM_ICSC_B_C13__SHIFT
  47054. CM3_CM_ICSC_B_C13_C14__CM_ICSC_B_C14_MASK
  47055. CM3_CM_ICSC_B_C13_C14__CM_ICSC_B_C14__SHIFT
  47056. CM3_CM_ICSC_B_C21_C22__CM_ICSC_B_C21_MASK
  47057. CM3_CM_ICSC_B_C21_C22__CM_ICSC_B_C21__SHIFT
  47058. CM3_CM_ICSC_B_C21_C22__CM_ICSC_B_C22_MASK
  47059. CM3_CM_ICSC_B_C21_C22__CM_ICSC_B_C22__SHIFT
  47060. CM3_CM_ICSC_B_C23_C24__CM_ICSC_B_C23_MASK
  47061. CM3_CM_ICSC_B_C23_C24__CM_ICSC_B_C23__SHIFT
  47062. CM3_CM_ICSC_B_C23_C24__CM_ICSC_B_C24_MASK
  47063. CM3_CM_ICSC_B_C23_C24__CM_ICSC_B_C24__SHIFT
  47064. CM3_CM_ICSC_B_C31_C32__CM_ICSC_B_C31_MASK
  47065. CM3_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT
  47066. CM3_CM_ICSC_B_C31_C32__CM_ICSC_B_C32_MASK
  47067. CM3_CM_ICSC_B_C31_C32__CM_ICSC_B_C32__SHIFT
  47068. CM3_CM_ICSC_B_C33_C34__CM_ICSC_B_C33_MASK
  47069. CM3_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT
  47070. CM3_CM_ICSC_B_C33_C34__CM_ICSC_B_C34_MASK
  47071. CM3_CM_ICSC_B_C33_C34__CM_ICSC_B_C34__SHIFT
  47072. CM3_CM_ICSC_C11_C12__CM_ICSC_C11_MASK
  47073. CM3_CM_ICSC_C11_C12__CM_ICSC_C11__SHIFT
  47074. CM3_CM_ICSC_C11_C12__CM_ICSC_C12_MASK
  47075. CM3_CM_ICSC_C11_C12__CM_ICSC_C12__SHIFT
  47076. CM3_CM_ICSC_C13_C14__CM_ICSC_C13_MASK
  47077. CM3_CM_ICSC_C13_C14__CM_ICSC_C13__SHIFT
  47078. CM3_CM_ICSC_C13_C14__CM_ICSC_C14_MASK
  47079. CM3_CM_ICSC_C13_C14__CM_ICSC_C14__SHIFT
  47080. CM3_CM_ICSC_C21_C22__CM_ICSC_C21_MASK
  47081. CM3_CM_ICSC_C21_C22__CM_ICSC_C21__SHIFT
  47082. CM3_CM_ICSC_C21_C22__CM_ICSC_C22_MASK
  47083. CM3_CM_ICSC_C21_C22__CM_ICSC_C22__SHIFT
  47084. CM3_CM_ICSC_C23_C24__CM_ICSC_C23_MASK
  47085. CM3_CM_ICSC_C23_C24__CM_ICSC_C23__SHIFT
  47086. CM3_CM_ICSC_C23_C24__CM_ICSC_C24_MASK
  47087. CM3_CM_ICSC_C23_C24__CM_ICSC_C24__SHIFT
  47088. CM3_CM_ICSC_C31_C32__CM_ICSC_C31_MASK
  47089. CM3_CM_ICSC_C31_C32__CM_ICSC_C31__SHIFT
  47090. CM3_CM_ICSC_C31_C32__CM_ICSC_C32_MASK
  47091. CM3_CM_ICSC_C31_C32__CM_ICSC_C32__SHIFT
  47092. CM3_CM_ICSC_C33_C34__CM_ICSC_C33_MASK
  47093. CM3_CM_ICSC_C33_C34__CM_ICSC_C33__SHIFT
  47094. CM3_CM_ICSC_C33_C34__CM_ICSC_C34_MASK
  47095. CM3_CM_ICSC_C33_C34__CM_ICSC_C34__SHIFT
  47096. CM3_CM_ICSC_CONTROL__CM_ICSC_MODE_MASK
  47097. CM3_CM_ICSC_CONTROL__CM_ICSC_MODE__SHIFT
  47098. CM3_CM_IGAM_CONTROL__CM_IGAM_INPUT_FORMAT_MASK
  47099. CM3_CM_IGAM_CONTROL__CM_IGAM_INPUT_FORMAT__SHIFT
  47100. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_B_FLOAT_POINT_EN_MASK
  47101. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_B_FLOAT_POINT_EN__SHIFT
  47102. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_B_MASK
  47103. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_B__SHIFT
  47104. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_G_MASK
  47105. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_G__SHIFT
  47106. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_R_MASK
  47107. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_DATA_SIGNED_EN_R__SHIFT
  47108. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_B_MASK
  47109. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_B__SHIFT
  47110. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_G_MASK
  47111. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_G__SHIFT
  47112. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_R_MASK
  47113. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_FORMAT_R__SHIFT
  47114. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_G_FLOAT_POINT_EN_MASK
  47115. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_G_FLOAT_POINT_EN__SHIFT
  47116. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_B_MASK
  47117. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_B__SHIFT
  47118. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_G_MASK
  47119. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_G__SHIFT
  47120. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_R_MASK
  47121. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_INC_R__SHIFT
  47122. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_MODE_MASK
  47123. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_MODE__SHIFT
  47124. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_R_FLOAT_POINT_EN_MASK
  47125. CM3_CM_IGAM_CONTROL__CM_IGAM_LUT_R_FLOAT_POINT_EN__SHIFT
  47126. CM3_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_BLUE_MASK
  47127. CM3_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_BLUE__SHIFT
  47128. CM3_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_GREEN_MASK
  47129. CM3_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_GREEN__SHIFT
  47130. CM3_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_RED_MASK
  47131. CM3_CM_IGAM_LUT_30_COLOR__CM_IGAM_LUT_10_RED__SHIFT
  47132. CM3_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_DONE_MASK
  47133. CM3_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_DONE__SHIFT
  47134. CM3_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL_MASK
  47135. CM3_CM_IGAM_LUT_AUTOFILL__CM_IGAM_LUT_AUTOFILL__SHIFT
  47136. CM3_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_BLACK_OFFSET_BLUE_MASK
  47137. CM3_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_BLACK_OFFSET_BLUE__SHIFT
  47138. CM3_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_WHITE_OFFSET_BLUE_MASK
  47139. CM3_CM_IGAM_LUT_BW_OFFSET_BLUE__CM_IGAM_LUT_WHITE_OFFSET_BLUE__SHIFT
  47140. CM3_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_BLACK_OFFSET_GREEN_MASK
  47141. CM3_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_BLACK_OFFSET_GREEN__SHIFT
  47142. CM3_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_WHITE_OFFSET_GREEN_MASK
  47143. CM3_CM_IGAM_LUT_BW_OFFSET_GREEN__CM_IGAM_LUT_WHITE_OFFSET_GREEN__SHIFT
  47144. CM3_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_BLACK_OFFSET_RED_MASK
  47145. CM3_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_BLACK_OFFSET_RED__SHIFT
  47146. CM3_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_WHITE_OFFSET_RED_MASK
  47147. CM3_CM_IGAM_LUT_BW_OFFSET_RED__CM_IGAM_LUT_WHITE_OFFSET_RED__SHIFT
  47148. CM3_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_BASE_MASK
  47149. CM3_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_BASE__SHIFT
  47150. CM3_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_DELTA_MASK
  47151. CM3_CM_IGAM_LUT_PWL_DATA__CM_IGAM_LUT_PWL_DELTA__SHIFT
  47152. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_DGAM_CONFIG_STATUS_MASK
  47153. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_DGAM_CONFIG_STATUS__SHIFT
  47154. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_HOST_EN_MASK
  47155. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_HOST_EN__SHIFT
  47156. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_RW_MODE_MASK
  47157. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_RW_MODE__SHIFT
  47158. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_SEL_MASK
  47159. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_SEL__SHIFT
  47160. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_WRITE_EN_MASK_MASK
  47161. CM3_CM_IGAM_LUT_RW_CONTROL__CM_IGAM_LUT_WRITE_EN_MASK__SHIFT
  47162. CM3_CM_IGAM_LUT_RW_INDEX__CM_IGAM_LUT_RW_INDEX_MASK
  47163. CM3_CM_IGAM_LUT_RW_INDEX__CM_IGAM_LUT_RW_INDEX__SHIFT
  47164. CM3_CM_IGAM_LUT_SEQ_COLOR__CM_IGAM_LUT_SEQ_COLOR_MASK
  47165. CM3_CM_IGAM_LUT_SEQ_COLOR__CM_IGAM_LUT_SEQ_COLOR__SHIFT
  47166. CM3_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS_MASK
  47167. CM3_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS__SHIFT
  47168. CM3_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE_MASK
  47169. CM3_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE__SHIFT
  47170. CM3_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS_MASK
  47171. CM3_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS__SHIFT
  47172. CM3_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE_MASK
  47173. CM3_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE__SHIFT
  47174. CM3_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK
  47175. CM3_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT
  47176. CM3_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE_MASK
  47177. CM3_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE__SHIFT
  47178. CM3_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_DIS_MASK
  47179. CM3_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_DIS__SHIFT
  47180. CM3_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_FORCE_MASK
  47181. CM3_CM_MEM_PWR_CTRL__RGAM_MEM_PWR_FORCE__SHIFT
  47182. CM3_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS_MASK
  47183. CM3_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS__SHIFT
  47184. CM3_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE_MASK
  47185. CM3_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE__SHIFT
  47186. CM3_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE_MASK
  47187. CM3_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE__SHIFT
  47188. CM3_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE_MASK
  47189. CM3_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE__SHIFT
  47190. CM3_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE_MASK
  47191. CM3_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE__SHIFT
  47192. CM3_CM_MEM_PWR_STATUS__RGAM_MEM_PWR_STATE_MASK
  47193. CM3_CM_MEM_PWR_STATUS__RGAM_MEM_PWR_STATE__SHIFT
  47194. CM3_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE_MASK
  47195. CM3_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT
  47196. CM3_CM_OCSC_C11_C12__CM_OCSC_C11_MASK
  47197. CM3_CM_OCSC_C11_C12__CM_OCSC_C11__SHIFT
  47198. CM3_CM_OCSC_C11_C12__CM_OCSC_C12_MASK
  47199. CM3_CM_OCSC_C11_C12__CM_OCSC_C12__SHIFT
  47200. CM3_CM_OCSC_C13_C14__CM_OCSC_C13_MASK
  47201. CM3_CM_OCSC_C13_C14__CM_OCSC_C13__SHIFT
  47202. CM3_CM_OCSC_C13_C14__CM_OCSC_C14_MASK
  47203. CM3_CM_OCSC_C13_C14__CM_OCSC_C14__SHIFT
  47204. CM3_CM_OCSC_C21_C22__CM_OCSC_C21_MASK
  47205. CM3_CM_OCSC_C21_C22__CM_OCSC_C21__SHIFT
  47206. CM3_CM_OCSC_C21_C22__CM_OCSC_C22_MASK
  47207. CM3_CM_OCSC_C21_C22__CM_OCSC_C22__SHIFT
  47208. CM3_CM_OCSC_C23_C24__CM_OCSC_C23_MASK
  47209. CM3_CM_OCSC_C23_C24__CM_OCSC_C23__SHIFT
  47210. CM3_CM_OCSC_C23_C24__CM_OCSC_C24_MASK
  47211. CM3_CM_OCSC_C23_C24__CM_OCSC_C24__SHIFT
  47212. CM3_CM_OCSC_C31_C32__CM_OCSC_C31_MASK
  47213. CM3_CM_OCSC_C31_C32__CM_OCSC_C31__SHIFT
  47214. CM3_CM_OCSC_C31_C32__CM_OCSC_C32_MASK
  47215. CM3_CM_OCSC_C31_C32__CM_OCSC_C32__SHIFT
  47216. CM3_CM_OCSC_C33_C34__CM_OCSC_C33_MASK
  47217. CM3_CM_OCSC_C33_C34__CM_OCSC_C33__SHIFT
  47218. CM3_CM_OCSC_C33_C34__CM_OCSC_C34_MASK
  47219. CM3_CM_OCSC_C33_C34__CM_OCSC_C34__SHIFT
  47220. CM3_CM_OCSC_CONTROL__CM_OCSC_MODE_MASK
  47221. CM3_CM_OCSC_CONTROL__CM_OCSC_MODE__SHIFT
  47222. CM3_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MAX_B_MASK
  47223. CM3_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MAX_B__SHIFT
  47224. CM3_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MIN_B_MASK
  47225. CM3_CM_RANGE_CLAMP_CONTROL_B__CM_RANGE_CLAMP_MIN_B__SHIFT
  47226. CM3_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MAX_G_MASK
  47227. CM3_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MAX_G__SHIFT
  47228. CM3_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MIN_G_MASK
  47229. CM3_CM_RANGE_CLAMP_CONTROL_G__CM_RANGE_CLAMP_MIN_G__SHIFT
  47230. CM3_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MAX_R_MASK
  47231. CM3_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MAX_R__SHIFT
  47232. CM3_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MIN_R_MASK
  47233. CM3_CM_RANGE_CLAMP_CONTROL_R__CM_RANGE_CLAMP_MIN_R__SHIFT
  47234. CM3_CM_RGAM_CONTROL__CM_RGAM_LUT_MODE_MASK
  47235. CM3_CM_RGAM_CONTROL__CM_RGAM_LUT_MODE__SHIFT
  47236. CM3_CM_RGAM_LUT_DATA__CM_RGAM_LUT_DATA_MASK
  47237. CM3_CM_RGAM_LUT_DATA__CM_RGAM_LUT_DATA__SHIFT
  47238. CM3_CM_RGAM_LUT_INDEX__CM_RGAM_LUT_INDEX_MASK
  47239. CM3_CM_RGAM_LUT_INDEX__CM_RGAM_LUT_INDEX__SHIFT
  47240. CM3_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_CONFIG_STATUS_MASK
  47241. CM3_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_CONFIG_STATUS__SHIFT
  47242. CM3_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_EN_MASK_MASK
  47243. CM3_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_EN_MASK__SHIFT
  47244. CM3_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_SEL_MASK
  47245. CM3_CM_RGAM_LUT_WRITE_EN_MASK__CM_RGAM_LUT_WRITE_SEL__SHIFT
  47246. CM3_CM_RGAM_RAMA_END_CNTL1_B__CM_RGAM_RAMA_EXP_REGION_END_B_MASK
  47247. CM3_CM_RGAM_RAMA_END_CNTL1_B__CM_RGAM_RAMA_EXP_REGION_END_B__SHIFT
  47248. CM3_CM_RGAM_RAMA_END_CNTL1_G__CM_RGAM_RAMA_EXP_REGION_END_G_MASK
  47249. CM3_CM_RGAM_RAMA_END_CNTL1_G__CM_RGAM_RAMA_EXP_REGION_END_G__SHIFT
  47250. CM3_CM_RGAM_RAMA_END_CNTL1_R__CM_RGAM_RAMA_EXP_REGION_END_R_MASK
  47251. CM3_CM_RGAM_RAMA_END_CNTL1_R__CM_RGAM_RAMA_EXP_REGION_END_R__SHIFT
  47252. CM3_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  47253. CM3_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  47254. CM3_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  47255. CM3_CM_RGAM_RAMA_END_CNTL2_B__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  47256. CM3_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  47257. CM3_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  47258. CM3_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  47259. CM3_CM_RGAM_RAMA_END_CNTL2_G__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  47260. CM3_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  47261. CM3_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  47262. CM3_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  47263. CM3_CM_RGAM_RAMA_END_CNTL2_R__CM_RGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  47264. CM3_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  47265. CM3_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  47266. CM3_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  47267. CM3_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  47268. CM3_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  47269. CM3_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  47270. CM3_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  47271. CM3_CM_RGAM_RAMA_REGION_0_1__CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  47272. CM3_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  47273. CM3_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  47274. CM3_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  47275. CM3_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  47276. CM3_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  47277. CM3_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  47278. CM3_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  47279. CM3_CM_RGAM_RAMA_REGION_10_11__CM_RGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  47280. CM3_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  47281. CM3_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  47282. CM3_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  47283. CM3_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  47284. CM3_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  47285. CM3_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  47286. CM3_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  47287. CM3_CM_RGAM_RAMA_REGION_12_13__CM_RGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  47288. CM3_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  47289. CM3_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  47290. CM3_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  47291. CM3_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  47292. CM3_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  47293. CM3_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  47294. CM3_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  47295. CM3_CM_RGAM_RAMA_REGION_14_15__CM_RGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  47296. CM3_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  47297. CM3_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  47298. CM3_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  47299. CM3_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  47300. CM3_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  47301. CM3_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  47302. CM3_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  47303. CM3_CM_RGAM_RAMA_REGION_16_17__CM_RGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  47304. CM3_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  47305. CM3_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  47306. CM3_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  47307. CM3_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  47308. CM3_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  47309. CM3_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  47310. CM3_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  47311. CM3_CM_RGAM_RAMA_REGION_18_19__CM_RGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  47312. CM3_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  47313. CM3_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  47314. CM3_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  47315. CM3_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  47316. CM3_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  47317. CM3_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  47318. CM3_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  47319. CM3_CM_RGAM_RAMA_REGION_20_21__CM_RGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  47320. CM3_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  47321. CM3_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  47322. CM3_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  47323. CM3_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  47324. CM3_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  47325. CM3_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  47326. CM3_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  47327. CM3_CM_RGAM_RAMA_REGION_22_23__CM_RGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  47328. CM3_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  47329. CM3_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  47330. CM3_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  47331. CM3_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  47332. CM3_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  47333. CM3_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  47334. CM3_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  47335. CM3_CM_RGAM_RAMA_REGION_24_25__CM_RGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  47336. CM3_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  47337. CM3_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  47338. CM3_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  47339. CM3_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  47340. CM3_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  47341. CM3_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  47342. CM3_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  47343. CM3_CM_RGAM_RAMA_REGION_26_27__CM_RGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  47344. CM3_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  47345. CM3_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  47346. CM3_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  47347. CM3_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  47348. CM3_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  47349. CM3_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  47350. CM3_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  47351. CM3_CM_RGAM_RAMA_REGION_28_29__CM_RGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  47352. CM3_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  47353. CM3_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  47354. CM3_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  47355. CM3_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  47356. CM3_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  47357. CM3_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  47358. CM3_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  47359. CM3_CM_RGAM_RAMA_REGION_2_3__CM_RGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  47360. CM3_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  47361. CM3_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  47362. CM3_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  47363. CM3_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  47364. CM3_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  47365. CM3_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  47366. CM3_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  47367. CM3_CM_RGAM_RAMA_REGION_30_31__CM_RGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  47368. CM3_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  47369. CM3_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  47370. CM3_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  47371. CM3_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  47372. CM3_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  47373. CM3_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  47374. CM3_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  47375. CM3_CM_RGAM_RAMA_REGION_32_33__CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  47376. CM3_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  47377. CM3_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  47378. CM3_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  47379. CM3_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  47380. CM3_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  47381. CM3_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  47382. CM3_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  47383. CM3_CM_RGAM_RAMA_REGION_4_5__CM_RGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  47384. CM3_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  47385. CM3_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  47386. CM3_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  47387. CM3_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  47388. CM3_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  47389. CM3_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  47390. CM3_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  47391. CM3_CM_RGAM_RAMA_REGION_6_7__CM_RGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  47392. CM3_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  47393. CM3_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  47394. CM3_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  47395. CM3_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  47396. CM3_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  47397. CM3_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  47398. CM3_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  47399. CM3_CM_RGAM_RAMA_REGION_8_9__CM_RGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  47400. CM3_CM_RGAM_RAMA_SLOPE_CNTL_B__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  47401. CM3_CM_RGAM_RAMA_SLOPE_CNTL_B__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  47402. CM3_CM_RGAM_RAMA_SLOPE_CNTL_G__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  47403. CM3_CM_RGAM_RAMA_SLOPE_CNTL_G__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  47404. CM3_CM_RGAM_RAMA_SLOPE_CNTL_R__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  47405. CM3_CM_RGAM_RAMA_SLOPE_CNTL_R__CM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  47406. CM3_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_B_MASK
  47407. CM3_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_B__SHIFT
  47408. CM3_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  47409. CM3_CM_RGAM_RAMA_START_CNTL_B__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  47410. CM3_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_G_MASK
  47411. CM3_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_G__SHIFT
  47412. CM3_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  47413. CM3_CM_RGAM_RAMA_START_CNTL_G__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  47414. CM3_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_R_MASK
  47415. CM3_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_R__SHIFT
  47416. CM3_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  47417. CM3_CM_RGAM_RAMA_START_CNTL_R__CM_RGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  47418. CM3_CM_RGAM_RAMB_END_CNTL1_B__CM_RGAM_RAMB_EXP_REGION_END_B_MASK
  47419. CM3_CM_RGAM_RAMB_END_CNTL1_B__CM_RGAM_RAMB_EXP_REGION_END_B__SHIFT
  47420. CM3_CM_RGAM_RAMB_END_CNTL1_G__CM_RGAM_RAMB_EXP_REGION_END_G_MASK
  47421. CM3_CM_RGAM_RAMB_END_CNTL1_G__CM_RGAM_RAMB_EXP_REGION_END_G__SHIFT
  47422. CM3_CM_RGAM_RAMB_END_CNTL1_R__CM_RGAM_RAMB_EXP_REGION_END_R_MASK
  47423. CM3_CM_RGAM_RAMB_END_CNTL1_R__CM_RGAM_RAMB_EXP_REGION_END_R__SHIFT
  47424. CM3_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  47425. CM3_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  47426. CM3_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  47427. CM3_CM_RGAM_RAMB_END_CNTL2_B__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  47428. CM3_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  47429. CM3_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  47430. CM3_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  47431. CM3_CM_RGAM_RAMB_END_CNTL2_G__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  47432. CM3_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  47433. CM3_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  47434. CM3_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  47435. CM3_CM_RGAM_RAMB_END_CNTL2_R__CM_RGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  47436. CM3_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  47437. CM3_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  47438. CM3_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  47439. CM3_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  47440. CM3_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  47441. CM3_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  47442. CM3_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  47443. CM3_CM_RGAM_RAMB_REGION_0_1__CM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  47444. CM3_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  47445. CM3_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  47446. CM3_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  47447. CM3_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  47448. CM3_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  47449. CM3_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  47450. CM3_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  47451. CM3_CM_RGAM_RAMB_REGION_10_11__CM_RGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  47452. CM3_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  47453. CM3_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  47454. CM3_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  47455. CM3_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  47456. CM3_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  47457. CM3_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  47458. CM3_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  47459. CM3_CM_RGAM_RAMB_REGION_12_13__CM_RGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  47460. CM3_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  47461. CM3_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  47462. CM3_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  47463. CM3_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  47464. CM3_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  47465. CM3_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  47466. CM3_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  47467. CM3_CM_RGAM_RAMB_REGION_14_15__CM_RGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  47468. CM3_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  47469. CM3_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  47470. CM3_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  47471. CM3_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  47472. CM3_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  47473. CM3_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  47474. CM3_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  47475. CM3_CM_RGAM_RAMB_REGION_16_17__CM_RGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  47476. CM3_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  47477. CM3_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  47478. CM3_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  47479. CM3_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  47480. CM3_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  47481. CM3_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  47482. CM3_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  47483. CM3_CM_RGAM_RAMB_REGION_18_19__CM_RGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  47484. CM3_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  47485. CM3_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  47486. CM3_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  47487. CM3_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  47488. CM3_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  47489. CM3_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  47490. CM3_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  47491. CM3_CM_RGAM_RAMB_REGION_20_21__CM_RGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  47492. CM3_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  47493. CM3_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  47494. CM3_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  47495. CM3_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  47496. CM3_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  47497. CM3_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  47498. CM3_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  47499. CM3_CM_RGAM_RAMB_REGION_22_23__CM_RGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  47500. CM3_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  47501. CM3_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  47502. CM3_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  47503. CM3_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  47504. CM3_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  47505. CM3_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  47506. CM3_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  47507. CM3_CM_RGAM_RAMB_REGION_24_25__CM_RGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  47508. CM3_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  47509. CM3_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  47510. CM3_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  47511. CM3_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  47512. CM3_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  47513. CM3_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  47514. CM3_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  47515. CM3_CM_RGAM_RAMB_REGION_26_27__CM_RGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  47516. CM3_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  47517. CM3_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  47518. CM3_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  47519. CM3_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  47520. CM3_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  47521. CM3_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  47522. CM3_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  47523. CM3_CM_RGAM_RAMB_REGION_28_29__CM_RGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  47524. CM3_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  47525. CM3_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  47526. CM3_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  47527. CM3_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  47528. CM3_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  47529. CM3_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  47530. CM3_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  47531. CM3_CM_RGAM_RAMB_REGION_2_3__CM_RGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  47532. CM3_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  47533. CM3_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  47534. CM3_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  47535. CM3_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  47536. CM3_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  47537. CM3_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  47538. CM3_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  47539. CM3_CM_RGAM_RAMB_REGION_30_31__CM_RGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  47540. CM3_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  47541. CM3_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  47542. CM3_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  47543. CM3_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  47544. CM3_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  47545. CM3_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  47546. CM3_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  47547. CM3_CM_RGAM_RAMB_REGION_32_33__CM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  47548. CM3_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  47549. CM3_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  47550. CM3_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  47551. CM3_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  47552. CM3_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  47553. CM3_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  47554. CM3_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  47555. CM3_CM_RGAM_RAMB_REGION_4_5__CM_RGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  47556. CM3_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  47557. CM3_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  47558. CM3_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  47559. CM3_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  47560. CM3_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  47561. CM3_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  47562. CM3_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  47563. CM3_CM_RGAM_RAMB_REGION_6_7__CM_RGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  47564. CM3_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  47565. CM3_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  47566. CM3_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  47567. CM3_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  47568. CM3_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  47569. CM3_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  47570. CM3_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  47571. CM3_CM_RGAM_RAMB_REGION_8_9__CM_RGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  47572. CM3_CM_RGAM_RAMB_SLOPE_CNTL_B__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  47573. CM3_CM_RGAM_RAMB_SLOPE_CNTL_B__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  47574. CM3_CM_RGAM_RAMB_SLOPE_CNTL_G__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  47575. CM3_CM_RGAM_RAMB_SLOPE_CNTL_G__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  47576. CM3_CM_RGAM_RAMB_SLOPE_CNTL_R__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  47577. CM3_CM_RGAM_RAMB_SLOPE_CNTL_R__CM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  47578. CM3_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_B_MASK
  47579. CM3_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_B__SHIFT
  47580. CM3_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  47581. CM3_CM_RGAM_RAMB_START_CNTL_B__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  47582. CM3_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_G_MASK
  47583. CM3_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_G__SHIFT
  47584. CM3_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  47585. CM3_CM_RGAM_RAMB_START_CNTL_G__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  47586. CM3_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_R_MASK
  47587. CM3_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_R__SHIFT
  47588. CM3_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  47589. CM3_CM_RGAM_RAMB_START_CNTL_R__CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  47590. CM3_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK
  47591. CM3_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT
  47592. CM3_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA_MASK
  47593. CM3_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA__SHIFT
  47594. CM3_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX_MASK
  47595. CM3_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX__SHIFT
  47596. CM3_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS_MASK
  47597. CM3_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS__SHIFT
  47598. CM3_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK_MASK
  47599. CM3_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK__SHIFT
  47600. CM3_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL_MASK
  47601. CM3_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL__SHIFT
  47602. CM3_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B_MASK
  47603. CM3_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B__SHIFT
  47604. CM3_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G_MASK
  47605. CM3_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G__SHIFT
  47606. CM3_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R_MASK
  47607. CM3_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R__SHIFT
  47608. CM3_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B_MASK
  47609. CM3_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B__SHIFT
  47610. CM3_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B_MASK
  47611. CM3_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B__SHIFT
  47612. CM3_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G_MASK
  47613. CM3_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G__SHIFT
  47614. CM3_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G_MASK
  47615. CM3_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G__SHIFT
  47616. CM3_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R_MASK
  47617. CM3_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R__SHIFT
  47618. CM3_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R_MASK
  47619. CM3_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R__SHIFT
  47620. CM3_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  47621. CM3_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  47622. CM3_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  47623. CM3_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  47624. CM3_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  47625. CM3_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  47626. CM3_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  47627. CM3_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  47628. CM3_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  47629. CM3_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  47630. CM3_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  47631. CM3_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  47632. CM3_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  47633. CM3_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  47634. CM3_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  47635. CM3_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  47636. CM3_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  47637. CM3_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  47638. CM3_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  47639. CM3_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  47640. CM3_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  47641. CM3_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  47642. CM3_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  47643. CM3_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  47644. CM3_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  47645. CM3_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  47646. CM3_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  47647. CM3_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  47648. CM3_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  47649. CM3_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  47650. CM3_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  47651. CM3_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  47652. CM3_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  47653. CM3_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  47654. CM3_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  47655. CM3_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  47656. CM3_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  47657. CM3_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  47658. CM3_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  47659. CM3_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  47660. CM3_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  47661. CM3_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  47662. CM3_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  47663. CM3_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  47664. CM3_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  47665. CM3_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  47666. CM3_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  47667. CM3_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  47668. CM3_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  47669. CM3_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  47670. CM3_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  47671. CM3_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  47672. CM3_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  47673. CM3_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  47674. CM3_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  47675. CM3_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  47676. CM3_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  47677. CM3_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  47678. CM3_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  47679. CM3_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  47680. CM3_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  47681. CM3_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  47682. CM3_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  47683. CM3_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  47684. CM3_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  47685. CM3_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  47686. CM3_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  47687. CM3_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  47688. CM3_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  47689. CM3_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  47690. CM3_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  47691. CM3_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  47692. CM3_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  47693. CM3_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  47694. CM3_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  47695. CM3_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  47696. CM3_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  47697. CM3_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  47698. CM3_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  47699. CM3_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  47700. CM3_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  47701. CM3_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  47702. CM3_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  47703. CM3_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  47704. CM3_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  47705. CM3_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  47706. CM3_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  47707. CM3_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  47708. CM3_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  47709. CM3_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  47710. CM3_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  47711. CM3_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  47712. CM3_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  47713. CM3_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  47714. CM3_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  47715. CM3_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  47716. CM3_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  47717. CM3_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  47718. CM3_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  47719. CM3_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  47720. CM3_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  47721. CM3_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  47722. CM3_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  47723. CM3_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  47724. CM3_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  47725. CM3_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  47726. CM3_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  47727. CM3_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  47728. CM3_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  47729. CM3_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  47730. CM3_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  47731. CM3_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  47732. CM3_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  47733. CM3_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  47734. CM3_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  47735. CM3_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  47736. CM3_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  47737. CM3_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  47738. CM3_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  47739. CM3_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  47740. CM3_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  47741. CM3_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  47742. CM3_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  47743. CM3_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  47744. CM3_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  47745. CM3_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  47746. CM3_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  47747. CM3_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  47748. CM3_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  47749. CM3_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  47750. CM3_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  47751. CM3_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  47752. CM3_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  47753. CM3_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  47754. CM3_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  47755. CM3_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  47756. CM3_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B_MASK
  47757. CM3_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B__SHIFT
  47758. CM3_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  47759. CM3_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  47760. CM3_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G_MASK
  47761. CM3_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G__SHIFT
  47762. CM3_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  47763. CM3_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  47764. CM3_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R_MASK
  47765. CM3_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R__SHIFT
  47766. CM3_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  47767. CM3_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  47768. CM3_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B_MASK
  47769. CM3_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B__SHIFT
  47770. CM3_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B_MASK
  47771. CM3_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B__SHIFT
  47772. CM3_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G_MASK
  47773. CM3_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G__SHIFT
  47774. CM3_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G_MASK
  47775. CM3_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G__SHIFT
  47776. CM3_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R_MASK
  47777. CM3_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R__SHIFT
  47778. CM3_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R_MASK
  47779. CM3_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R__SHIFT
  47780. CM3_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  47781. CM3_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  47782. CM3_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  47783. CM3_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  47784. CM3_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  47785. CM3_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  47786. CM3_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  47787. CM3_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  47788. CM3_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  47789. CM3_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  47790. CM3_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  47791. CM3_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  47792. CM3_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  47793. CM3_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  47794. CM3_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  47795. CM3_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  47796. CM3_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  47797. CM3_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  47798. CM3_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  47799. CM3_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  47800. CM3_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  47801. CM3_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  47802. CM3_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  47803. CM3_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  47804. CM3_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  47805. CM3_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  47806. CM3_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  47807. CM3_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  47808. CM3_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  47809. CM3_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  47810. CM3_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  47811. CM3_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  47812. CM3_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  47813. CM3_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  47814. CM3_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  47815. CM3_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  47816. CM3_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  47817. CM3_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  47818. CM3_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  47819. CM3_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  47820. CM3_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  47821. CM3_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  47822. CM3_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  47823. CM3_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  47824. CM3_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  47825. CM3_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  47826. CM3_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  47827. CM3_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  47828. CM3_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  47829. CM3_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  47830. CM3_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  47831. CM3_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  47832. CM3_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  47833. CM3_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  47834. CM3_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  47835. CM3_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  47836. CM3_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  47837. CM3_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  47838. CM3_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  47839. CM3_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  47840. CM3_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  47841. CM3_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  47842. CM3_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  47843. CM3_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  47844. CM3_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  47845. CM3_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  47846. CM3_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  47847. CM3_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  47848. CM3_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  47849. CM3_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  47850. CM3_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  47851. CM3_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  47852. CM3_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  47853. CM3_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  47854. CM3_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  47855. CM3_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  47856. CM3_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  47857. CM3_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  47858. CM3_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  47859. CM3_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  47860. CM3_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  47861. CM3_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  47862. CM3_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  47863. CM3_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  47864. CM3_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  47865. CM3_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  47866. CM3_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  47867. CM3_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  47868. CM3_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  47869. CM3_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  47870. CM3_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  47871. CM3_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  47872. CM3_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  47873. CM3_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  47874. CM3_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  47875. CM3_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  47876. CM3_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  47877. CM3_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  47878. CM3_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  47879. CM3_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  47880. CM3_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  47881. CM3_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  47882. CM3_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  47883. CM3_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  47884. CM3_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  47885. CM3_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  47886. CM3_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  47887. CM3_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  47888. CM3_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  47889. CM3_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  47890. CM3_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  47891. CM3_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  47892. CM3_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  47893. CM3_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  47894. CM3_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  47895. CM3_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  47896. CM3_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  47897. CM3_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  47898. CM3_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  47899. CM3_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  47900. CM3_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  47901. CM3_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  47902. CM3_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  47903. CM3_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  47904. CM3_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  47905. CM3_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  47906. CM3_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  47907. CM3_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  47908. CM3_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  47909. CM3_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  47910. CM3_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  47911. CM3_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  47912. CM3_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  47913. CM3_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  47914. CM3_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  47915. CM3_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  47916. CM3_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B_MASK
  47917. CM3_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B__SHIFT
  47918. CM3_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  47919. CM3_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  47920. CM3_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G_MASK
  47921. CM3_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G__SHIFT
  47922. CM3_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  47923. CM3_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  47924. CM3_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R_MASK
  47925. CM3_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R__SHIFT
  47926. CM3_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  47927. CM3_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  47928. CM3_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B_MASK
  47929. CM3_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B__SHIFT
  47930. CM3_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G_MASK
  47931. CM3_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G__SHIFT
  47932. CM3_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R_MASK
  47933. CM3_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R__SHIFT
  47934. CM3_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA_MASK
  47935. CM3_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA__SHIFT
  47936. CM3_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK
  47937. CM3_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT
  47938. CM3_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK
  47939. CM3_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT
  47940. CM3_GCR_Cx_COHERENCE_COHEN
  47941. CM3_GCR_Cx_OTHER_CORE
  47942. CM3_GCR_Cx_OTHER_VP
  47943. CM3_GCR_ERROR_CAUSE_ERRTYPE
  47944. CM4000_MAX_DEV
  47945. CM4_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT_MASK
  47946. CM4_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT__SHIFT
  47947. CM4_CM_3DLUT_DATA__CM_3DLUT_DATA0_MASK
  47948. CM4_CM_3DLUT_DATA__CM_3DLUT_DATA0__SHIFT
  47949. CM4_CM_3DLUT_DATA__CM_3DLUT_DATA1_MASK
  47950. CM4_CM_3DLUT_DATA__CM_3DLUT_DATA1__SHIFT
  47951. CM4_CM_3DLUT_INDEX__CM_3DLUT_INDEX_MASK
  47952. CM4_CM_3DLUT_INDEX__CM_3DLUT_INDEX__SHIFT
  47953. CM4_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK
  47954. CM4_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT
  47955. CM4_CM_3DLUT_MODE__CM_3DLUT_SIZE_MASK
  47956. CM4_CM_3DLUT_MODE__CM_3DLUT_SIZE__SHIFT
  47957. CM4_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR_MASK
  47958. CM4_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR__SHIFT
  47959. CM4_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B_MASK
  47960. CM4_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B__SHIFT
  47961. CM4_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B_MASK
  47962. CM4_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B__SHIFT
  47963. CM4_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G_MASK
  47964. CM4_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G__SHIFT
  47965. CM4_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G_MASK
  47966. CM4_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G__SHIFT
  47967. CM4_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R_MASK
  47968. CM4_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R__SHIFT
  47969. CM4_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R_MASK
  47970. CM4_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R__SHIFT
  47971. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN_MASK
  47972. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN__SHIFT
  47973. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS_MASK
  47974. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS__SHIFT
  47975. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL_MASK
  47976. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL__SHIFT
  47977. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL_MASK
  47978. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL__SHIFT
  47979. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK_MASK
  47980. CM4_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK__SHIFT
  47981. CM4_CM_BIAS_CR_R__CM_BIAS_CR_R_MASK
  47982. CM4_CM_BIAS_CR_R__CM_BIAS_CR_R__SHIFT
  47983. CM4_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B_MASK
  47984. CM4_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B__SHIFT
  47985. CM4_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G_MASK
  47986. CM4_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G__SHIFT
  47987. CM4_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE_MASK
  47988. CM4_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE__SHIFT
  47989. CM4_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA_MASK
  47990. CM4_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA__SHIFT
  47991. CM4_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX_MASK
  47992. CM4_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX__SHIFT
  47993. CM4_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS_MASK
  47994. CM4_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS__SHIFT
  47995. CM4_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK_MASK
  47996. CM4_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK__SHIFT
  47997. CM4_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL_MASK
  47998. CM4_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL__SHIFT
  47999. CM4_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B_MASK
  48000. CM4_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B__SHIFT
  48001. CM4_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G_MASK
  48002. CM4_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G__SHIFT
  48003. CM4_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R_MASK
  48004. CM4_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R__SHIFT
  48005. CM4_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  48006. CM4_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  48007. CM4_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  48008. CM4_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  48009. CM4_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  48010. CM4_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  48011. CM4_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  48012. CM4_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  48013. CM4_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  48014. CM4_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  48015. CM4_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  48016. CM4_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  48017. CM4_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  48018. CM4_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  48019. CM4_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  48020. CM4_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  48021. CM4_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  48022. CM4_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  48023. CM4_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  48024. CM4_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  48025. CM4_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  48026. CM4_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  48027. CM4_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  48028. CM4_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  48029. CM4_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  48030. CM4_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  48031. CM4_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  48032. CM4_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  48033. CM4_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  48034. CM4_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  48035. CM4_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  48036. CM4_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  48037. CM4_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  48038. CM4_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  48039. CM4_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  48040. CM4_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  48041. CM4_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  48042. CM4_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  48043. CM4_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  48044. CM4_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  48045. CM4_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  48046. CM4_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  48047. CM4_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  48048. CM4_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  48049. CM4_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  48050. CM4_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  48051. CM4_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  48052. CM4_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  48053. CM4_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  48054. CM4_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  48055. CM4_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  48056. CM4_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  48057. CM4_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  48058. CM4_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  48059. CM4_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  48060. CM4_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  48061. CM4_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  48062. CM4_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  48063. CM4_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  48064. CM4_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  48065. CM4_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  48066. CM4_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  48067. CM4_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  48068. CM4_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  48069. CM4_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  48070. CM4_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  48071. CM4_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  48072. CM4_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  48073. CM4_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  48074. CM4_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  48075. CM4_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  48076. CM4_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  48077. CM4_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  48078. CM4_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  48079. CM4_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  48080. CM4_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  48081. CM4_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  48082. CM4_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  48083. CM4_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  48084. CM4_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  48085. CM4_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  48086. CM4_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  48087. CM4_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  48088. CM4_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  48089. CM4_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  48090. CM4_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  48091. CM4_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  48092. CM4_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  48093. CM4_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  48094. CM4_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  48095. CM4_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  48096. CM4_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  48097. CM4_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  48098. CM4_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  48099. CM4_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  48100. CM4_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  48101. CM4_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  48102. CM4_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  48103. CM4_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  48104. CM4_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  48105. CM4_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  48106. CM4_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  48107. CM4_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  48108. CM4_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  48109. CM4_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  48110. CM4_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  48111. CM4_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  48112. CM4_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  48113. CM4_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  48114. CM4_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  48115. CM4_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  48116. CM4_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  48117. CM4_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  48118. CM4_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  48119. CM4_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  48120. CM4_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  48121. CM4_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  48122. CM4_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  48123. CM4_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  48124. CM4_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  48125. CM4_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  48126. CM4_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  48127. CM4_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  48128. CM4_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  48129. CM4_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  48130. CM4_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  48131. CM4_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  48132. CM4_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  48133. CM4_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  48134. CM4_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  48135. CM4_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  48136. CM4_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  48137. CM4_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  48138. CM4_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  48139. CM4_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  48140. CM4_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  48141. CM4_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  48142. CM4_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  48143. CM4_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  48144. CM4_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  48145. CM4_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  48146. CM4_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  48147. CM4_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  48148. CM4_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  48149. CM4_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  48150. CM4_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  48151. CM4_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  48152. CM4_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  48153. CM4_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  48154. CM4_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  48155. CM4_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  48156. CM4_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  48157. CM4_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  48158. CM4_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  48159. CM4_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B_MASK
  48160. CM4_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B__SHIFT
  48161. CM4_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  48162. CM4_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  48163. CM4_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G_MASK
  48164. CM4_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G__SHIFT
  48165. CM4_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  48166. CM4_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  48167. CM4_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R_MASK
  48168. CM4_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R__SHIFT
  48169. CM4_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  48170. CM4_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  48171. CM4_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B_MASK
  48172. CM4_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B__SHIFT
  48173. CM4_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G_MASK
  48174. CM4_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G__SHIFT
  48175. CM4_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R_MASK
  48176. CM4_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R__SHIFT
  48177. CM4_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  48178. CM4_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  48179. CM4_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  48180. CM4_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  48181. CM4_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  48182. CM4_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  48183. CM4_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  48184. CM4_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  48185. CM4_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  48186. CM4_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  48187. CM4_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  48188. CM4_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  48189. CM4_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  48190. CM4_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  48191. CM4_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  48192. CM4_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  48193. CM4_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  48194. CM4_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  48195. CM4_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  48196. CM4_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  48197. CM4_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  48198. CM4_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  48199. CM4_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  48200. CM4_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  48201. CM4_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  48202. CM4_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  48203. CM4_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  48204. CM4_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  48205. CM4_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  48206. CM4_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  48207. CM4_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  48208. CM4_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  48209. CM4_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  48210. CM4_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  48211. CM4_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  48212. CM4_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  48213. CM4_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  48214. CM4_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  48215. CM4_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  48216. CM4_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  48217. CM4_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  48218. CM4_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  48219. CM4_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  48220. CM4_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  48221. CM4_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  48222. CM4_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  48223. CM4_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  48224. CM4_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  48225. CM4_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  48226. CM4_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  48227. CM4_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  48228. CM4_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  48229. CM4_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  48230. CM4_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  48231. CM4_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  48232. CM4_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  48233. CM4_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  48234. CM4_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  48235. CM4_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  48236. CM4_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  48237. CM4_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  48238. CM4_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  48239. CM4_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  48240. CM4_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  48241. CM4_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  48242. CM4_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  48243. CM4_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  48244. CM4_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  48245. CM4_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  48246. CM4_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  48247. CM4_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  48248. CM4_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  48249. CM4_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  48250. CM4_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  48251. CM4_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  48252. CM4_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  48253. CM4_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  48254. CM4_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  48255. CM4_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  48256. CM4_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  48257. CM4_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  48258. CM4_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  48259. CM4_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  48260. CM4_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  48261. CM4_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  48262. CM4_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  48263. CM4_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  48264. CM4_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  48265. CM4_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  48266. CM4_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  48267. CM4_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  48268. CM4_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  48269. CM4_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  48270. CM4_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  48271. CM4_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  48272. CM4_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  48273. CM4_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  48274. CM4_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  48275. CM4_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  48276. CM4_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  48277. CM4_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  48278. CM4_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  48279. CM4_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  48280. CM4_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  48281. CM4_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  48282. CM4_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  48283. CM4_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  48284. CM4_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  48285. CM4_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  48286. CM4_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  48287. CM4_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  48288. CM4_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  48289. CM4_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  48290. CM4_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  48291. CM4_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  48292. CM4_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  48293. CM4_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  48294. CM4_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  48295. CM4_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  48296. CM4_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  48297. CM4_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  48298. CM4_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  48299. CM4_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  48300. CM4_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  48301. CM4_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  48302. CM4_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  48303. CM4_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  48304. CM4_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  48305. CM4_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  48306. CM4_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  48307. CM4_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  48308. CM4_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  48309. CM4_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  48310. CM4_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  48311. CM4_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  48312. CM4_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  48313. CM4_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  48314. CM4_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  48315. CM4_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  48316. CM4_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  48317. CM4_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  48318. CM4_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  48319. CM4_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  48320. CM4_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  48321. CM4_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  48322. CM4_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  48323. CM4_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  48324. CM4_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  48325. CM4_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  48326. CM4_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  48327. CM4_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  48328. CM4_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  48329. CM4_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  48330. CM4_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  48331. CM4_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B_MASK
  48332. CM4_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B__SHIFT
  48333. CM4_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  48334. CM4_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  48335. CM4_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G_MASK
  48336. CM4_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G__SHIFT
  48337. CM4_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  48338. CM4_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  48339. CM4_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R_MASK
  48340. CM4_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R__SHIFT
  48341. CM4_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  48342. CM4_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  48343. CM4_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK
  48344. CM4_CM_COEF_FORMAT__CM_BIAS_FORMAT__SHIFT
  48345. CM4_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK
  48346. CM4_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT__SHIFT
  48347. CM4_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT_MASK
  48348. CM4_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT__SHIFT
  48349. CM4_CM_CONTROL__CM_BYPASS_MASK
  48350. CM4_CM_CONTROL__CM_BYPASS__SHIFT
  48351. CM4_CM_CONTROL__CM_UPDATE_PENDING_MASK
  48352. CM4_CM_CONTROL__CM_UPDATE_PENDING__SHIFT
  48353. CM4_CM_DEALPHA__CM_DEALPHA_EN_MASK
  48354. CM4_CM_DEALPHA__CM_DEALPHA_EN__SHIFT
  48355. CM4_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE_MASK
  48356. CM4_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE__SHIFT
  48357. CM4_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA_MASK
  48358. CM4_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA__SHIFT
  48359. CM4_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX_MASK
  48360. CM4_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX__SHIFT
  48361. CM4_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS_MASK
  48362. CM4_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS__SHIFT
  48363. CM4_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK_MASK
  48364. CM4_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK__SHIFT
  48365. CM4_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL_MASK
  48366. CM4_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL__SHIFT
  48367. CM4_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY_MASK
  48368. CM4_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY__SHIFT
  48369. CM4_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B_MASK
  48370. CM4_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B__SHIFT
  48371. CM4_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G_MASK
  48372. CM4_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G__SHIFT
  48373. CM4_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R_MASK
  48374. CM4_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R__SHIFT
  48375. CM4_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  48376. CM4_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  48377. CM4_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  48378. CM4_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  48379. CM4_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  48380. CM4_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  48381. CM4_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  48382. CM4_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  48383. CM4_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  48384. CM4_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  48385. CM4_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  48386. CM4_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  48387. CM4_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  48388. CM4_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  48389. CM4_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  48390. CM4_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  48391. CM4_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  48392. CM4_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  48393. CM4_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  48394. CM4_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  48395. CM4_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  48396. CM4_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  48397. CM4_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  48398. CM4_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  48399. CM4_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  48400. CM4_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  48401. CM4_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  48402. CM4_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  48403. CM4_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  48404. CM4_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  48405. CM4_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  48406. CM4_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  48407. CM4_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  48408. CM4_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  48409. CM4_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  48410. CM4_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  48411. CM4_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  48412. CM4_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  48413. CM4_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  48414. CM4_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  48415. CM4_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  48416. CM4_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  48417. CM4_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  48418. CM4_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  48419. CM4_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  48420. CM4_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  48421. CM4_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  48422. CM4_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  48423. CM4_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  48424. CM4_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  48425. CM4_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  48426. CM4_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  48427. CM4_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  48428. CM4_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  48429. CM4_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  48430. CM4_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  48431. CM4_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  48432. CM4_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  48433. CM4_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  48434. CM4_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  48435. CM4_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  48436. CM4_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  48437. CM4_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  48438. CM4_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  48439. CM4_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  48440. CM4_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  48441. CM4_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  48442. CM4_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  48443. CM4_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  48444. CM4_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  48445. CM4_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  48446. CM4_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  48447. CM4_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  48448. CM4_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  48449. CM4_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  48450. CM4_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  48451. CM4_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  48452. CM4_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  48453. CM4_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  48454. CM4_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  48455. CM4_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  48456. CM4_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  48457. CM4_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B_MASK
  48458. CM4_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B__SHIFT
  48459. CM4_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  48460. CM4_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  48461. CM4_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G_MASK
  48462. CM4_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G__SHIFT
  48463. CM4_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  48464. CM4_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  48465. CM4_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R_MASK
  48466. CM4_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R__SHIFT
  48467. CM4_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  48468. CM4_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  48469. CM4_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B_MASK
  48470. CM4_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B__SHIFT
  48471. CM4_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G_MASK
  48472. CM4_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G__SHIFT
  48473. CM4_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R_MASK
  48474. CM4_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R__SHIFT
  48475. CM4_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  48476. CM4_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  48477. CM4_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  48478. CM4_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  48479. CM4_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  48480. CM4_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  48481. CM4_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  48482. CM4_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  48483. CM4_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  48484. CM4_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  48485. CM4_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  48486. CM4_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  48487. CM4_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  48488. CM4_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  48489. CM4_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  48490. CM4_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  48491. CM4_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  48492. CM4_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  48493. CM4_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  48494. CM4_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  48495. CM4_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  48496. CM4_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  48497. CM4_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  48498. CM4_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  48499. CM4_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  48500. CM4_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  48501. CM4_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  48502. CM4_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  48503. CM4_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  48504. CM4_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  48505. CM4_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  48506. CM4_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  48507. CM4_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  48508. CM4_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  48509. CM4_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  48510. CM4_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  48511. CM4_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  48512. CM4_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  48513. CM4_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  48514. CM4_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  48515. CM4_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  48516. CM4_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  48517. CM4_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  48518. CM4_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  48519. CM4_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  48520. CM4_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  48521. CM4_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  48522. CM4_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  48523. CM4_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  48524. CM4_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  48525. CM4_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  48526. CM4_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  48527. CM4_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  48528. CM4_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  48529. CM4_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  48530. CM4_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  48531. CM4_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  48532. CM4_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  48533. CM4_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  48534. CM4_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  48535. CM4_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  48536. CM4_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  48537. CM4_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  48538. CM4_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  48539. CM4_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  48540. CM4_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  48541. CM4_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  48542. CM4_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  48543. CM4_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  48544. CM4_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  48545. CM4_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  48546. CM4_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  48547. CM4_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  48548. CM4_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  48549. CM4_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  48550. CM4_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  48551. CM4_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  48552. CM4_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  48553. CM4_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  48554. CM4_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  48555. CM4_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  48556. CM4_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  48557. CM4_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B_MASK
  48558. CM4_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B__SHIFT
  48559. CM4_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  48560. CM4_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  48561. CM4_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G_MASK
  48562. CM4_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G__SHIFT
  48563. CM4_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  48564. CM4_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  48565. CM4_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R_MASK
  48566. CM4_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R__SHIFT
  48567. CM4_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  48568. CM4_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  48569. CM4_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11_MASK
  48570. CM4_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11__SHIFT
  48571. CM4_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12_MASK
  48572. CM4_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12__SHIFT
  48573. CM4_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13_MASK
  48574. CM4_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13__SHIFT
  48575. CM4_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14_MASK
  48576. CM4_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14__SHIFT
  48577. CM4_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21_MASK
  48578. CM4_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21__SHIFT
  48579. CM4_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22_MASK
  48580. CM4_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22__SHIFT
  48581. CM4_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23_MASK
  48582. CM4_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23__SHIFT
  48583. CM4_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24_MASK
  48584. CM4_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24__SHIFT
  48585. CM4_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31_MASK
  48586. CM4_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31__SHIFT
  48587. CM4_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32_MASK
  48588. CM4_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32__SHIFT
  48589. CM4_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33_MASK
  48590. CM4_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33__SHIFT
  48591. CM4_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34_MASK
  48592. CM4_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34__SHIFT
  48593. CM4_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11_MASK
  48594. CM4_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11__SHIFT
  48595. CM4_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12_MASK
  48596. CM4_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12__SHIFT
  48597. CM4_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13_MASK
  48598. CM4_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13__SHIFT
  48599. CM4_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14_MASK
  48600. CM4_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14__SHIFT
  48601. CM4_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21_MASK
  48602. CM4_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21__SHIFT
  48603. CM4_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22_MASK
  48604. CM4_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22__SHIFT
  48605. CM4_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23_MASK
  48606. CM4_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23__SHIFT
  48607. CM4_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24_MASK
  48608. CM4_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24__SHIFT
  48609. CM4_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31_MASK
  48610. CM4_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31__SHIFT
  48611. CM4_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32_MASK
  48612. CM4_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32__SHIFT
  48613. CM4_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33_MASK
  48614. CM4_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33__SHIFT
  48615. CM4_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34_MASK
  48616. CM4_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34__SHIFT
  48617. CM4_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE_MASK
  48618. CM4_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE__SHIFT
  48619. CM4_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF_MASK
  48620. CM4_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF__SHIFT
  48621. CM4_CM_ICSC_B_C11_C12__CM_ICSC_B_C11_MASK
  48622. CM4_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT
  48623. CM4_CM_ICSC_B_C11_C12__CM_ICSC_B_C12_MASK
  48624. CM4_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT
  48625. CM4_CM_ICSC_B_C13_C14__CM_ICSC_B_C13_MASK
  48626. CM4_CM_ICSC_B_C13_C14__CM_ICSC_B_C13__SHIFT
  48627. CM4_CM_ICSC_B_C13_C14__CM_ICSC_B_C14_MASK
  48628. CM4_CM_ICSC_B_C13_C14__CM_ICSC_B_C14__SHIFT
  48629. CM4_CM_ICSC_B_C21_C22__CM_ICSC_B_C21_MASK
  48630. CM4_CM_ICSC_B_C21_C22__CM_ICSC_B_C21__SHIFT
  48631. CM4_CM_ICSC_B_C21_C22__CM_ICSC_B_C22_MASK
  48632. CM4_CM_ICSC_B_C21_C22__CM_ICSC_B_C22__SHIFT
  48633. CM4_CM_ICSC_B_C23_C24__CM_ICSC_B_C23_MASK
  48634. CM4_CM_ICSC_B_C23_C24__CM_ICSC_B_C23__SHIFT
  48635. CM4_CM_ICSC_B_C23_C24__CM_ICSC_B_C24_MASK
  48636. CM4_CM_ICSC_B_C23_C24__CM_ICSC_B_C24__SHIFT
  48637. CM4_CM_ICSC_B_C31_C32__CM_ICSC_B_C31_MASK
  48638. CM4_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT
  48639. CM4_CM_ICSC_B_C31_C32__CM_ICSC_B_C32_MASK
  48640. CM4_CM_ICSC_B_C31_C32__CM_ICSC_B_C32__SHIFT
  48641. CM4_CM_ICSC_B_C33_C34__CM_ICSC_B_C33_MASK
  48642. CM4_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT
  48643. CM4_CM_ICSC_B_C33_C34__CM_ICSC_B_C34_MASK
  48644. CM4_CM_ICSC_B_C33_C34__CM_ICSC_B_C34__SHIFT
  48645. CM4_CM_ICSC_C11_C12__CM_ICSC_C11_MASK
  48646. CM4_CM_ICSC_C11_C12__CM_ICSC_C11__SHIFT
  48647. CM4_CM_ICSC_C11_C12__CM_ICSC_C12_MASK
  48648. CM4_CM_ICSC_C11_C12__CM_ICSC_C12__SHIFT
  48649. CM4_CM_ICSC_C13_C14__CM_ICSC_C13_MASK
  48650. CM4_CM_ICSC_C13_C14__CM_ICSC_C13__SHIFT
  48651. CM4_CM_ICSC_C13_C14__CM_ICSC_C14_MASK
  48652. CM4_CM_ICSC_C13_C14__CM_ICSC_C14__SHIFT
  48653. CM4_CM_ICSC_C21_C22__CM_ICSC_C21_MASK
  48654. CM4_CM_ICSC_C21_C22__CM_ICSC_C21__SHIFT
  48655. CM4_CM_ICSC_C21_C22__CM_ICSC_C22_MASK
  48656. CM4_CM_ICSC_C21_C22__CM_ICSC_C22__SHIFT
  48657. CM4_CM_ICSC_C23_C24__CM_ICSC_C23_MASK
  48658. CM4_CM_ICSC_C23_C24__CM_ICSC_C23__SHIFT
  48659. CM4_CM_ICSC_C23_C24__CM_ICSC_C24_MASK
  48660. CM4_CM_ICSC_C23_C24__CM_ICSC_C24__SHIFT
  48661. CM4_CM_ICSC_C31_C32__CM_ICSC_C31_MASK
  48662. CM4_CM_ICSC_C31_C32__CM_ICSC_C31__SHIFT
  48663. CM4_CM_ICSC_C31_C32__CM_ICSC_C32_MASK
  48664. CM4_CM_ICSC_C31_C32__CM_ICSC_C32__SHIFT
  48665. CM4_CM_ICSC_C33_C34__CM_ICSC_C33_MASK
  48666. CM4_CM_ICSC_C33_C34__CM_ICSC_C33__SHIFT
  48667. CM4_CM_ICSC_C33_C34__CM_ICSC_C34_MASK
  48668. CM4_CM_ICSC_C33_C34__CM_ICSC_C34__SHIFT
  48669. CM4_CM_ICSC_CONTROL__CM_ICSC_MODE_MASK
  48670. CM4_CM_ICSC_CONTROL__CM_ICSC_MODE__SHIFT
  48671. CM4_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS_MASK
  48672. CM4_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS__SHIFT
  48673. CM4_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE_MASK
  48674. CM4_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE__SHIFT
  48675. CM4_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS_MASK
  48676. CM4_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS__SHIFT
  48677. CM4_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE_MASK
  48678. CM4_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE__SHIFT
  48679. CM4_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK
  48680. CM4_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT
  48681. CM4_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE_MASK
  48682. CM4_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE__SHIFT
  48683. CM4_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS_MASK
  48684. CM4_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS__SHIFT
  48685. CM4_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE_MASK
  48686. CM4_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE__SHIFT
  48687. CM4_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE_MASK
  48688. CM4_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE__SHIFT
  48689. CM4_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE_MASK
  48690. CM4_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE__SHIFT
  48691. CM4_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE_MASK
  48692. CM4_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE__SHIFT
  48693. CM4_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE_MASK
  48694. CM4_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT
  48695. CM4_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK
  48696. CM4_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT
  48697. CM4_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA_MASK
  48698. CM4_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA__SHIFT
  48699. CM4_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX_MASK
  48700. CM4_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX__SHIFT
  48701. CM4_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS_MASK
  48702. CM4_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS__SHIFT
  48703. CM4_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK_MASK
  48704. CM4_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK__SHIFT
  48705. CM4_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL_MASK
  48706. CM4_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL__SHIFT
  48707. CM4_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B_MASK
  48708. CM4_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B__SHIFT
  48709. CM4_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G_MASK
  48710. CM4_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G__SHIFT
  48711. CM4_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R_MASK
  48712. CM4_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R__SHIFT
  48713. CM4_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B_MASK
  48714. CM4_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B__SHIFT
  48715. CM4_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B_MASK
  48716. CM4_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B__SHIFT
  48717. CM4_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G_MASK
  48718. CM4_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G__SHIFT
  48719. CM4_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G_MASK
  48720. CM4_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G__SHIFT
  48721. CM4_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R_MASK
  48722. CM4_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R__SHIFT
  48723. CM4_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R_MASK
  48724. CM4_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R__SHIFT
  48725. CM4_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  48726. CM4_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  48727. CM4_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  48728. CM4_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  48729. CM4_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  48730. CM4_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  48731. CM4_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  48732. CM4_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  48733. CM4_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  48734. CM4_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  48735. CM4_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  48736. CM4_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  48737. CM4_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  48738. CM4_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  48739. CM4_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  48740. CM4_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  48741. CM4_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  48742. CM4_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  48743. CM4_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  48744. CM4_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  48745. CM4_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  48746. CM4_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  48747. CM4_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  48748. CM4_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  48749. CM4_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  48750. CM4_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  48751. CM4_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  48752. CM4_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  48753. CM4_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  48754. CM4_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  48755. CM4_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  48756. CM4_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  48757. CM4_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  48758. CM4_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  48759. CM4_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  48760. CM4_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  48761. CM4_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  48762. CM4_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  48763. CM4_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  48764. CM4_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  48765. CM4_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  48766. CM4_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  48767. CM4_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  48768. CM4_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  48769. CM4_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  48770. CM4_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  48771. CM4_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  48772. CM4_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  48773. CM4_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  48774. CM4_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  48775. CM4_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  48776. CM4_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  48777. CM4_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  48778. CM4_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  48779. CM4_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  48780. CM4_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  48781. CM4_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  48782. CM4_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  48783. CM4_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  48784. CM4_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  48785. CM4_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  48786. CM4_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  48787. CM4_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  48788. CM4_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  48789. CM4_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  48790. CM4_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  48791. CM4_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  48792. CM4_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  48793. CM4_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  48794. CM4_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  48795. CM4_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  48796. CM4_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  48797. CM4_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  48798. CM4_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  48799. CM4_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  48800. CM4_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  48801. CM4_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  48802. CM4_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  48803. CM4_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  48804. CM4_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  48805. CM4_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  48806. CM4_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  48807. CM4_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  48808. CM4_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  48809. CM4_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  48810. CM4_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  48811. CM4_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  48812. CM4_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  48813. CM4_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  48814. CM4_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  48815. CM4_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  48816. CM4_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  48817. CM4_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  48818. CM4_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  48819. CM4_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  48820. CM4_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  48821. CM4_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  48822. CM4_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  48823. CM4_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  48824. CM4_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  48825. CM4_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  48826. CM4_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  48827. CM4_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  48828. CM4_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  48829. CM4_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  48830. CM4_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  48831. CM4_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  48832. CM4_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  48833. CM4_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  48834. CM4_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  48835. CM4_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  48836. CM4_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  48837. CM4_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  48838. CM4_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  48839. CM4_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  48840. CM4_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  48841. CM4_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  48842. CM4_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  48843. CM4_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  48844. CM4_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  48845. CM4_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  48846. CM4_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  48847. CM4_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  48848. CM4_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  48849. CM4_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  48850. CM4_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  48851. CM4_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  48852. CM4_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  48853. CM4_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  48854. CM4_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  48855. CM4_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  48856. CM4_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  48857. CM4_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  48858. CM4_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  48859. CM4_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  48860. CM4_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  48861. CM4_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B_MASK
  48862. CM4_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B__SHIFT
  48863. CM4_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  48864. CM4_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  48865. CM4_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G_MASK
  48866. CM4_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G__SHIFT
  48867. CM4_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  48868. CM4_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  48869. CM4_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R_MASK
  48870. CM4_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R__SHIFT
  48871. CM4_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  48872. CM4_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  48873. CM4_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B_MASK
  48874. CM4_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B__SHIFT
  48875. CM4_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B_MASK
  48876. CM4_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B__SHIFT
  48877. CM4_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G_MASK
  48878. CM4_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G__SHIFT
  48879. CM4_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G_MASK
  48880. CM4_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G__SHIFT
  48881. CM4_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R_MASK
  48882. CM4_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R__SHIFT
  48883. CM4_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R_MASK
  48884. CM4_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R__SHIFT
  48885. CM4_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  48886. CM4_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  48887. CM4_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  48888. CM4_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  48889. CM4_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  48890. CM4_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  48891. CM4_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  48892. CM4_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  48893. CM4_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  48894. CM4_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  48895. CM4_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  48896. CM4_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  48897. CM4_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  48898. CM4_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  48899. CM4_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  48900. CM4_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  48901. CM4_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  48902. CM4_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  48903. CM4_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  48904. CM4_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  48905. CM4_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  48906. CM4_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  48907. CM4_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  48908. CM4_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  48909. CM4_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  48910. CM4_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  48911. CM4_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  48912. CM4_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  48913. CM4_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  48914. CM4_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  48915. CM4_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  48916. CM4_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  48917. CM4_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  48918. CM4_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  48919. CM4_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  48920. CM4_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  48921. CM4_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  48922. CM4_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  48923. CM4_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  48924. CM4_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  48925. CM4_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  48926. CM4_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  48927. CM4_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  48928. CM4_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  48929. CM4_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  48930. CM4_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  48931. CM4_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  48932. CM4_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  48933. CM4_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  48934. CM4_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  48935. CM4_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  48936. CM4_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  48937. CM4_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  48938. CM4_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  48939. CM4_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  48940. CM4_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  48941. CM4_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  48942. CM4_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  48943. CM4_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  48944. CM4_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  48945. CM4_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  48946. CM4_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  48947. CM4_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  48948. CM4_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  48949. CM4_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  48950. CM4_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  48951. CM4_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  48952. CM4_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  48953. CM4_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  48954. CM4_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  48955. CM4_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  48956. CM4_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  48957. CM4_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  48958. CM4_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  48959. CM4_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  48960. CM4_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  48961. CM4_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  48962. CM4_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  48963. CM4_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  48964. CM4_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  48965. CM4_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  48966. CM4_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  48967. CM4_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  48968. CM4_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  48969. CM4_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  48970. CM4_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  48971. CM4_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  48972. CM4_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  48973. CM4_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  48974. CM4_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  48975. CM4_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  48976. CM4_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  48977. CM4_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  48978. CM4_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  48979. CM4_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  48980. CM4_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  48981. CM4_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  48982. CM4_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  48983. CM4_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  48984. CM4_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  48985. CM4_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  48986. CM4_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  48987. CM4_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  48988. CM4_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  48989. CM4_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  48990. CM4_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  48991. CM4_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  48992. CM4_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  48993. CM4_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  48994. CM4_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  48995. CM4_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  48996. CM4_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  48997. CM4_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  48998. CM4_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  48999. CM4_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  49000. CM4_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  49001. CM4_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  49002. CM4_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  49003. CM4_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  49004. CM4_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  49005. CM4_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  49006. CM4_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  49007. CM4_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  49008. CM4_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  49009. CM4_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  49010. CM4_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  49011. CM4_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  49012. CM4_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  49013. CM4_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  49014. CM4_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  49015. CM4_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  49016. CM4_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  49017. CM4_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  49018. CM4_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  49019. CM4_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  49020. CM4_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  49021. CM4_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B_MASK
  49022. CM4_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B__SHIFT
  49023. CM4_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  49024. CM4_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  49025. CM4_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G_MASK
  49026. CM4_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G__SHIFT
  49027. CM4_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  49028. CM4_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  49029. CM4_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R_MASK
  49030. CM4_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R__SHIFT
  49031. CM4_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  49032. CM4_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  49033. CM4_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B_MASK
  49034. CM4_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B__SHIFT
  49035. CM4_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G_MASK
  49036. CM4_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G__SHIFT
  49037. CM4_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R_MASK
  49038. CM4_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R__SHIFT
  49039. CM4_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA_MASK
  49040. CM4_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA__SHIFT
  49041. CM4_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK
  49042. CM4_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT
  49043. CM4_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK
  49044. CM4_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT
  49045. CM5_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT_MASK
  49046. CM5_CM_3DLUT_DATA_30BIT__CM_3DLUT_DATA_30BIT__SHIFT
  49047. CM5_CM_3DLUT_DATA__CM_3DLUT_DATA0_MASK
  49048. CM5_CM_3DLUT_DATA__CM_3DLUT_DATA0__SHIFT
  49049. CM5_CM_3DLUT_DATA__CM_3DLUT_DATA1_MASK
  49050. CM5_CM_3DLUT_DATA__CM_3DLUT_DATA1__SHIFT
  49051. CM5_CM_3DLUT_INDEX__CM_3DLUT_INDEX_MASK
  49052. CM5_CM_3DLUT_INDEX__CM_3DLUT_INDEX__SHIFT
  49053. CM5_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK
  49054. CM5_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT
  49055. CM5_CM_3DLUT_MODE__CM_3DLUT_SIZE_MASK
  49056. CM5_CM_3DLUT_MODE__CM_3DLUT_SIZE__SHIFT
  49057. CM5_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR_MASK
  49058. CM5_CM_3DLUT_OUT_NORM_FACTOR__CM_3DLUT_OUT_NORM_FACTOR__SHIFT
  49059. CM5_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B_MASK
  49060. CM5_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B__SHIFT
  49061. CM5_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B_MASK
  49062. CM5_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B__SHIFT
  49063. CM5_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G_MASK
  49064. CM5_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_OFFSET_G__SHIFT
  49065. CM5_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G_MASK
  49066. CM5_CM_3DLUT_OUT_OFFSET_G__CM_3DLUT_OUT_SCALE_G__SHIFT
  49067. CM5_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R_MASK
  49068. CM5_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_OFFSET_R__SHIFT
  49069. CM5_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R_MASK
  49070. CM5_CM_3DLUT_OUT_OFFSET_R__CM_3DLUT_OUT_SCALE_R__SHIFT
  49071. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN_MASK
  49072. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_30BIT_EN__SHIFT
  49073. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS_MASK
  49074. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_CONFIG_STATUS__SHIFT
  49075. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL_MASK
  49076. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_RAM_SEL__SHIFT
  49077. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL_MASK
  49078. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_READ_SEL__SHIFT
  49079. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK_MASK
  49080. CM5_CM_3DLUT_READ_WRITE_CONTROL__CM_3DLUT_WRITE_EN_MASK__SHIFT
  49081. CM5_CM_BIAS_CR_R__CM_BIAS_CR_R_MASK
  49082. CM5_CM_BIAS_CR_R__CM_BIAS_CR_R__SHIFT
  49083. CM5_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B_MASK
  49084. CM5_CM_BIAS_Y_G_CB_B__CM_BIAS_CB_B__SHIFT
  49085. CM5_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G_MASK
  49086. CM5_CM_BIAS_Y_G_CB_B__CM_BIAS_Y_G__SHIFT
  49087. CM5_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE_MASK
  49088. CM5_CM_BLNDGAM_CONTROL__CM_BLNDGAM_LUT_MODE__SHIFT
  49089. CM5_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA_MASK
  49090. CM5_CM_BLNDGAM_LUT_DATA__CM_BLNDGAM_LUT_DATA__SHIFT
  49091. CM5_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX_MASK
  49092. CM5_CM_BLNDGAM_LUT_INDEX__CM_BLNDGAM_LUT_INDEX__SHIFT
  49093. CM5_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS_MASK
  49094. CM5_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_CONFIG_STATUS__SHIFT
  49095. CM5_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK_MASK
  49096. CM5_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_EN_MASK__SHIFT
  49097. CM5_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL_MASK
  49098. CM5_CM_BLNDGAM_LUT_WRITE_EN_MASK__CM_BLNDGAM_LUT_WRITE_SEL__SHIFT
  49099. CM5_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B_MASK
  49100. CM5_CM_BLNDGAM_RAMA_END_CNTL1_B__CM_BLNDGAM_RAMA_EXP_REGION_END_B__SHIFT
  49101. CM5_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G_MASK
  49102. CM5_CM_BLNDGAM_RAMA_END_CNTL1_G__CM_BLNDGAM_RAMA_EXP_REGION_END_G__SHIFT
  49103. CM5_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R_MASK
  49104. CM5_CM_BLNDGAM_RAMA_END_CNTL1_R__CM_BLNDGAM_RAMA_EXP_REGION_END_R__SHIFT
  49105. CM5_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  49106. CM5_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  49107. CM5_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  49108. CM5_CM_BLNDGAM_RAMA_END_CNTL2_B__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  49109. CM5_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  49110. CM5_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  49111. CM5_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  49112. CM5_CM_BLNDGAM_RAMA_END_CNTL2_G__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  49113. CM5_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  49114. CM5_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  49115. CM5_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  49116. CM5_CM_BLNDGAM_RAMA_END_CNTL2_R__CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  49117. CM5_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  49118. CM5_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  49119. CM5_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  49120. CM5_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  49121. CM5_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  49122. CM5_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  49123. CM5_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  49124. CM5_CM_BLNDGAM_RAMA_REGION_0_1__CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  49125. CM5_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  49126. CM5_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  49127. CM5_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  49128. CM5_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  49129. CM5_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  49130. CM5_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  49131. CM5_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  49132. CM5_CM_BLNDGAM_RAMA_REGION_10_11__CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  49133. CM5_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  49134. CM5_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  49135. CM5_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  49136. CM5_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  49137. CM5_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  49138. CM5_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  49139. CM5_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  49140. CM5_CM_BLNDGAM_RAMA_REGION_12_13__CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  49141. CM5_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  49142. CM5_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  49143. CM5_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  49144. CM5_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  49145. CM5_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  49146. CM5_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  49147. CM5_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  49148. CM5_CM_BLNDGAM_RAMA_REGION_14_15__CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  49149. CM5_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  49150. CM5_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  49151. CM5_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  49152. CM5_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  49153. CM5_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  49154. CM5_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  49155. CM5_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  49156. CM5_CM_BLNDGAM_RAMA_REGION_16_17__CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  49157. CM5_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  49158. CM5_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  49159. CM5_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  49160. CM5_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  49161. CM5_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  49162. CM5_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  49163. CM5_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  49164. CM5_CM_BLNDGAM_RAMA_REGION_18_19__CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  49165. CM5_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  49166. CM5_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  49167. CM5_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  49168. CM5_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  49169. CM5_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  49170. CM5_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  49171. CM5_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  49172. CM5_CM_BLNDGAM_RAMA_REGION_20_21__CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  49173. CM5_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  49174. CM5_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  49175. CM5_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  49176. CM5_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  49177. CM5_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  49178. CM5_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  49179. CM5_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  49180. CM5_CM_BLNDGAM_RAMA_REGION_22_23__CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  49181. CM5_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  49182. CM5_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  49183. CM5_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  49184. CM5_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  49185. CM5_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  49186. CM5_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  49187. CM5_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  49188. CM5_CM_BLNDGAM_RAMA_REGION_24_25__CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  49189. CM5_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  49190. CM5_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  49191. CM5_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  49192. CM5_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  49193. CM5_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  49194. CM5_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  49195. CM5_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  49196. CM5_CM_BLNDGAM_RAMA_REGION_26_27__CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  49197. CM5_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  49198. CM5_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  49199. CM5_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  49200. CM5_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  49201. CM5_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  49202. CM5_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  49203. CM5_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  49204. CM5_CM_BLNDGAM_RAMA_REGION_28_29__CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  49205. CM5_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  49206. CM5_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  49207. CM5_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  49208. CM5_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  49209. CM5_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  49210. CM5_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  49211. CM5_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  49212. CM5_CM_BLNDGAM_RAMA_REGION_2_3__CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  49213. CM5_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  49214. CM5_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  49215. CM5_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  49216. CM5_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  49217. CM5_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  49218. CM5_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  49219. CM5_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  49220. CM5_CM_BLNDGAM_RAMA_REGION_30_31__CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  49221. CM5_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  49222. CM5_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  49223. CM5_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  49224. CM5_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  49225. CM5_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  49226. CM5_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  49227. CM5_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  49228. CM5_CM_BLNDGAM_RAMA_REGION_32_33__CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  49229. CM5_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  49230. CM5_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  49231. CM5_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  49232. CM5_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  49233. CM5_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  49234. CM5_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  49235. CM5_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  49236. CM5_CM_BLNDGAM_RAMA_REGION_4_5__CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  49237. CM5_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  49238. CM5_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  49239. CM5_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  49240. CM5_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  49241. CM5_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  49242. CM5_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  49243. CM5_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  49244. CM5_CM_BLNDGAM_RAMA_REGION_6_7__CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  49245. CM5_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  49246. CM5_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  49247. CM5_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  49248. CM5_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  49249. CM5_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  49250. CM5_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  49251. CM5_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  49252. CM5_CM_BLNDGAM_RAMA_REGION_8_9__CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  49253. CM5_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  49254. CM5_CM_BLNDGAM_RAMA_SLOPE_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  49255. CM5_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  49256. CM5_CM_BLNDGAM_RAMA_SLOPE_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  49257. CM5_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  49258. CM5_CM_BLNDGAM_RAMA_SLOPE_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  49259. CM5_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B_MASK
  49260. CM5_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_B__SHIFT
  49261. CM5_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  49262. CM5_CM_BLNDGAM_RAMA_START_CNTL_B__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  49263. CM5_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G_MASK
  49264. CM5_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_G__SHIFT
  49265. CM5_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  49266. CM5_CM_BLNDGAM_RAMA_START_CNTL_G__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  49267. CM5_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R_MASK
  49268. CM5_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_R__SHIFT
  49269. CM5_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  49270. CM5_CM_BLNDGAM_RAMA_START_CNTL_R__CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  49271. CM5_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B_MASK
  49272. CM5_CM_BLNDGAM_RAMB_END_CNTL1_B__CM_BLNDGAM_RAMB_EXP_REGION_END_B__SHIFT
  49273. CM5_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G_MASK
  49274. CM5_CM_BLNDGAM_RAMB_END_CNTL1_G__CM_BLNDGAM_RAMB_EXP_REGION_END_G__SHIFT
  49275. CM5_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R_MASK
  49276. CM5_CM_BLNDGAM_RAMB_END_CNTL1_R__CM_BLNDGAM_RAMB_EXP_REGION_END_R__SHIFT
  49277. CM5_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  49278. CM5_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  49279. CM5_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  49280. CM5_CM_BLNDGAM_RAMB_END_CNTL2_B__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  49281. CM5_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  49282. CM5_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  49283. CM5_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  49284. CM5_CM_BLNDGAM_RAMB_END_CNTL2_G__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  49285. CM5_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  49286. CM5_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  49287. CM5_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  49288. CM5_CM_BLNDGAM_RAMB_END_CNTL2_R__CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  49289. CM5_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  49290. CM5_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  49291. CM5_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  49292. CM5_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  49293. CM5_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  49294. CM5_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  49295. CM5_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  49296. CM5_CM_BLNDGAM_RAMB_REGION_0_1__CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  49297. CM5_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  49298. CM5_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  49299. CM5_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  49300. CM5_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  49301. CM5_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  49302. CM5_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  49303. CM5_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  49304. CM5_CM_BLNDGAM_RAMB_REGION_10_11__CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  49305. CM5_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  49306. CM5_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  49307. CM5_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  49308. CM5_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  49309. CM5_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  49310. CM5_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  49311. CM5_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  49312. CM5_CM_BLNDGAM_RAMB_REGION_12_13__CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  49313. CM5_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  49314. CM5_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  49315. CM5_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  49316. CM5_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  49317. CM5_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  49318. CM5_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  49319. CM5_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  49320. CM5_CM_BLNDGAM_RAMB_REGION_14_15__CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  49321. CM5_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  49322. CM5_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  49323. CM5_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  49324. CM5_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  49325. CM5_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  49326. CM5_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  49327. CM5_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  49328. CM5_CM_BLNDGAM_RAMB_REGION_16_17__CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  49329. CM5_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  49330. CM5_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  49331. CM5_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  49332. CM5_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  49333. CM5_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  49334. CM5_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  49335. CM5_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  49336. CM5_CM_BLNDGAM_RAMB_REGION_18_19__CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  49337. CM5_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  49338. CM5_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  49339. CM5_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  49340. CM5_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  49341. CM5_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  49342. CM5_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  49343. CM5_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  49344. CM5_CM_BLNDGAM_RAMB_REGION_20_21__CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  49345. CM5_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  49346. CM5_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  49347. CM5_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  49348. CM5_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  49349. CM5_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  49350. CM5_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  49351. CM5_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  49352. CM5_CM_BLNDGAM_RAMB_REGION_22_23__CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  49353. CM5_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  49354. CM5_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  49355. CM5_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  49356. CM5_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  49357. CM5_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  49358. CM5_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  49359. CM5_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  49360. CM5_CM_BLNDGAM_RAMB_REGION_24_25__CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  49361. CM5_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  49362. CM5_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  49363. CM5_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  49364. CM5_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  49365. CM5_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  49366. CM5_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  49367. CM5_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  49368. CM5_CM_BLNDGAM_RAMB_REGION_26_27__CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  49369. CM5_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  49370. CM5_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  49371. CM5_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  49372. CM5_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  49373. CM5_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  49374. CM5_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  49375. CM5_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  49376. CM5_CM_BLNDGAM_RAMB_REGION_28_29__CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  49377. CM5_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  49378. CM5_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  49379. CM5_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  49380. CM5_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  49381. CM5_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  49382. CM5_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  49383. CM5_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  49384. CM5_CM_BLNDGAM_RAMB_REGION_2_3__CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  49385. CM5_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  49386. CM5_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  49387. CM5_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  49388. CM5_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  49389. CM5_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  49390. CM5_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  49391. CM5_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  49392. CM5_CM_BLNDGAM_RAMB_REGION_30_31__CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  49393. CM5_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  49394. CM5_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  49395. CM5_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  49396. CM5_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  49397. CM5_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  49398. CM5_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  49399. CM5_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  49400. CM5_CM_BLNDGAM_RAMB_REGION_32_33__CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  49401. CM5_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  49402. CM5_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  49403. CM5_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  49404. CM5_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  49405. CM5_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  49406. CM5_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  49407. CM5_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  49408. CM5_CM_BLNDGAM_RAMB_REGION_4_5__CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  49409. CM5_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  49410. CM5_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  49411. CM5_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  49412. CM5_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  49413. CM5_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  49414. CM5_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  49415. CM5_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  49416. CM5_CM_BLNDGAM_RAMB_REGION_6_7__CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  49417. CM5_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  49418. CM5_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  49419. CM5_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  49420. CM5_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  49421. CM5_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  49422. CM5_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  49423. CM5_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  49424. CM5_CM_BLNDGAM_RAMB_REGION_8_9__CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  49425. CM5_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  49426. CM5_CM_BLNDGAM_RAMB_SLOPE_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  49427. CM5_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  49428. CM5_CM_BLNDGAM_RAMB_SLOPE_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  49429. CM5_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  49430. CM5_CM_BLNDGAM_RAMB_SLOPE_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  49431. CM5_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B_MASK
  49432. CM5_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_B__SHIFT
  49433. CM5_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  49434. CM5_CM_BLNDGAM_RAMB_START_CNTL_B__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  49435. CM5_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G_MASK
  49436. CM5_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_G__SHIFT
  49437. CM5_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  49438. CM5_CM_BLNDGAM_RAMB_START_CNTL_G__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  49439. CM5_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R_MASK
  49440. CM5_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_R__SHIFT
  49441. CM5_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  49442. CM5_CM_BLNDGAM_RAMB_START_CNTL_R__CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  49443. CM5_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK
  49444. CM5_CM_COEF_FORMAT__CM_BIAS_FORMAT__SHIFT
  49445. CM5_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK
  49446. CM5_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT__SHIFT
  49447. CM5_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT_MASK
  49448. CM5_CM_COEF_FORMAT__CM_ICSC_COEF_FORMAT__SHIFT
  49449. CM5_CM_CONTROL__CM_BYPASS_MASK
  49450. CM5_CM_CONTROL__CM_BYPASS__SHIFT
  49451. CM5_CM_CONTROL__CM_UPDATE_PENDING_MASK
  49452. CM5_CM_CONTROL__CM_UPDATE_PENDING__SHIFT
  49453. CM5_CM_DEALPHA__CM_DEALPHA_EN_MASK
  49454. CM5_CM_DEALPHA__CM_DEALPHA_EN__SHIFT
  49455. CM5_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE_MASK
  49456. CM5_CM_DGAM_CONTROL__CM_DGAM_LUT_MODE__SHIFT
  49457. CM5_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA_MASK
  49458. CM5_CM_DGAM_LUT_DATA__CM_DGAM_LUT_DATA__SHIFT
  49459. CM5_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX_MASK
  49460. CM5_CM_DGAM_LUT_INDEX__CM_DGAM_LUT_INDEX__SHIFT
  49461. CM5_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS_MASK
  49462. CM5_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_CONFIG_STATUS__SHIFT
  49463. CM5_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK_MASK
  49464. CM5_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_EN_MASK__SHIFT
  49465. CM5_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL_MASK
  49466. CM5_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_LUT_WRITE_SEL__SHIFT
  49467. CM5_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY_MASK
  49468. CM5_CM_DGAM_LUT_WRITE_EN_MASK__CM_DGAM_WRITE_LUT_BASE_ONLY__SHIFT
  49469. CM5_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B_MASK
  49470. CM5_CM_DGAM_RAMA_END_CNTL1_B__CM_DGAM_RAMA_EXP_REGION_END_B__SHIFT
  49471. CM5_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G_MASK
  49472. CM5_CM_DGAM_RAMA_END_CNTL1_G__CM_DGAM_RAMA_EXP_REGION_END_G__SHIFT
  49473. CM5_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R_MASK
  49474. CM5_CM_DGAM_RAMA_END_CNTL1_R__CM_DGAM_RAMA_EXP_REGION_END_R__SHIFT
  49475. CM5_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B_MASK
  49476. CM5_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_BASE_B__SHIFT
  49477. CM5_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B_MASK
  49478. CM5_CM_DGAM_RAMA_END_CNTL2_B__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B__SHIFT
  49479. CM5_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G_MASK
  49480. CM5_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_BASE_G__SHIFT
  49481. CM5_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G_MASK
  49482. CM5_CM_DGAM_RAMA_END_CNTL2_G__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G__SHIFT
  49483. CM5_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R_MASK
  49484. CM5_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_BASE_R__SHIFT
  49485. CM5_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R_MASK
  49486. CM5_CM_DGAM_RAMA_END_CNTL2_R__CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R__SHIFT
  49487. CM5_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  49488. CM5_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  49489. CM5_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  49490. CM5_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  49491. CM5_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  49492. CM5_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  49493. CM5_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  49494. CM5_CM_DGAM_RAMA_REGION_0_1__CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  49495. CM5_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  49496. CM5_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  49497. CM5_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  49498. CM5_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  49499. CM5_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  49500. CM5_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  49501. CM5_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  49502. CM5_CM_DGAM_RAMA_REGION_10_11__CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  49503. CM5_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  49504. CM5_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  49505. CM5_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  49506. CM5_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  49507. CM5_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  49508. CM5_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  49509. CM5_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  49510. CM5_CM_DGAM_RAMA_REGION_12_13__CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  49511. CM5_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  49512. CM5_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  49513. CM5_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  49514. CM5_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  49515. CM5_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  49516. CM5_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  49517. CM5_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  49518. CM5_CM_DGAM_RAMA_REGION_14_15__CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  49519. CM5_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  49520. CM5_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  49521. CM5_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  49522. CM5_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  49523. CM5_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  49524. CM5_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  49525. CM5_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  49526. CM5_CM_DGAM_RAMA_REGION_2_3__CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  49527. CM5_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  49528. CM5_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  49529. CM5_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  49530. CM5_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  49531. CM5_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  49532. CM5_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  49533. CM5_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  49534. CM5_CM_DGAM_RAMA_REGION_4_5__CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  49535. CM5_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  49536. CM5_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  49537. CM5_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  49538. CM5_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  49539. CM5_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  49540. CM5_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  49541. CM5_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  49542. CM5_CM_DGAM_RAMA_REGION_6_7__CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  49543. CM5_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  49544. CM5_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  49545. CM5_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  49546. CM5_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  49547. CM5_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  49548. CM5_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  49549. CM5_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  49550. CM5_CM_DGAM_RAMA_REGION_8_9__CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  49551. CM5_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B_MASK
  49552. CM5_CM_DGAM_RAMA_SLOPE_CNTL_B__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  49553. CM5_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G_MASK
  49554. CM5_CM_DGAM_RAMA_SLOPE_CNTL_G__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  49555. CM5_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R_MASK
  49556. CM5_CM_DGAM_RAMA_SLOPE_CNTL_R__CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  49557. CM5_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B_MASK
  49558. CM5_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_B__SHIFT
  49559. CM5_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  49560. CM5_CM_DGAM_RAMA_START_CNTL_B__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  49561. CM5_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G_MASK
  49562. CM5_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_G__SHIFT
  49563. CM5_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  49564. CM5_CM_DGAM_RAMA_START_CNTL_G__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  49565. CM5_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R_MASK
  49566. CM5_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_R__SHIFT
  49567. CM5_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  49568. CM5_CM_DGAM_RAMA_START_CNTL_R__CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  49569. CM5_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B_MASK
  49570. CM5_CM_DGAM_RAMB_END_CNTL1_B__CM_DGAM_RAMB_EXP_REGION_END_B__SHIFT
  49571. CM5_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G_MASK
  49572. CM5_CM_DGAM_RAMB_END_CNTL1_G__CM_DGAM_RAMB_EXP_REGION_END_G__SHIFT
  49573. CM5_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R_MASK
  49574. CM5_CM_DGAM_RAMB_END_CNTL1_R__CM_DGAM_RAMB_EXP_REGION_END_R__SHIFT
  49575. CM5_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B_MASK
  49576. CM5_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_BASE_B__SHIFT
  49577. CM5_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B_MASK
  49578. CM5_CM_DGAM_RAMB_END_CNTL2_B__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B__SHIFT
  49579. CM5_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G_MASK
  49580. CM5_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_BASE_G__SHIFT
  49581. CM5_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G_MASK
  49582. CM5_CM_DGAM_RAMB_END_CNTL2_G__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G__SHIFT
  49583. CM5_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R_MASK
  49584. CM5_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_BASE_R__SHIFT
  49585. CM5_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R_MASK
  49586. CM5_CM_DGAM_RAMB_END_CNTL2_R__CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R__SHIFT
  49587. CM5_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  49588. CM5_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  49589. CM5_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  49590. CM5_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  49591. CM5_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  49592. CM5_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  49593. CM5_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  49594. CM5_CM_DGAM_RAMB_REGION_0_1__CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  49595. CM5_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  49596. CM5_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  49597. CM5_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  49598. CM5_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  49599. CM5_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  49600. CM5_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  49601. CM5_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  49602. CM5_CM_DGAM_RAMB_REGION_10_11__CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  49603. CM5_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  49604. CM5_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  49605. CM5_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  49606. CM5_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  49607. CM5_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  49608. CM5_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  49609. CM5_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  49610. CM5_CM_DGAM_RAMB_REGION_12_13__CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  49611. CM5_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  49612. CM5_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  49613. CM5_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  49614. CM5_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  49615. CM5_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  49616. CM5_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  49617. CM5_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  49618. CM5_CM_DGAM_RAMB_REGION_14_15__CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  49619. CM5_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  49620. CM5_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  49621. CM5_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  49622. CM5_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  49623. CM5_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  49624. CM5_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  49625. CM5_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  49626. CM5_CM_DGAM_RAMB_REGION_2_3__CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  49627. CM5_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  49628. CM5_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  49629. CM5_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  49630. CM5_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  49631. CM5_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  49632. CM5_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  49633. CM5_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  49634. CM5_CM_DGAM_RAMB_REGION_4_5__CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  49635. CM5_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  49636. CM5_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  49637. CM5_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  49638. CM5_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  49639. CM5_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  49640. CM5_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  49641. CM5_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  49642. CM5_CM_DGAM_RAMB_REGION_6_7__CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  49643. CM5_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  49644. CM5_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  49645. CM5_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  49646. CM5_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  49647. CM5_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  49648. CM5_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  49649. CM5_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  49650. CM5_CM_DGAM_RAMB_REGION_8_9__CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  49651. CM5_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B_MASK
  49652. CM5_CM_DGAM_RAMB_SLOPE_CNTL_B__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B__SHIFT
  49653. CM5_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G_MASK
  49654. CM5_CM_DGAM_RAMB_SLOPE_CNTL_G__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G__SHIFT
  49655. CM5_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R_MASK
  49656. CM5_CM_DGAM_RAMB_SLOPE_CNTL_R__CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R__SHIFT
  49657. CM5_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B_MASK
  49658. CM5_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_B__SHIFT
  49659. CM5_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  49660. CM5_CM_DGAM_RAMB_START_CNTL_B__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  49661. CM5_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G_MASK
  49662. CM5_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_G__SHIFT
  49663. CM5_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  49664. CM5_CM_DGAM_RAMB_START_CNTL_G__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  49665. CM5_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R_MASK
  49666. CM5_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_R__SHIFT
  49667. CM5_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  49668. CM5_CM_DGAM_RAMB_START_CNTL_R__CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  49669. CM5_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11_MASK
  49670. CM5_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C11__SHIFT
  49671. CM5_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12_MASK
  49672. CM5_CM_GAMUT_REMAP_B_C11_C12__CM_GAMUT_REMAP_B_C12__SHIFT
  49673. CM5_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13_MASK
  49674. CM5_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C13__SHIFT
  49675. CM5_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14_MASK
  49676. CM5_CM_GAMUT_REMAP_B_C13_C14__CM_GAMUT_REMAP_B_C14__SHIFT
  49677. CM5_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21_MASK
  49678. CM5_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C21__SHIFT
  49679. CM5_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22_MASK
  49680. CM5_CM_GAMUT_REMAP_B_C21_C22__CM_GAMUT_REMAP_B_C22__SHIFT
  49681. CM5_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23_MASK
  49682. CM5_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C23__SHIFT
  49683. CM5_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24_MASK
  49684. CM5_CM_GAMUT_REMAP_B_C23_C24__CM_GAMUT_REMAP_B_C24__SHIFT
  49685. CM5_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31_MASK
  49686. CM5_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C31__SHIFT
  49687. CM5_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32_MASK
  49688. CM5_CM_GAMUT_REMAP_B_C31_C32__CM_GAMUT_REMAP_B_C32__SHIFT
  49689. CM5_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33_MASK
  49690. CM5_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C33__SHIFT
  49691. CM5_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34_MASK
  49692. CM5_CM_GAMUT_REMAP_B_C33_C34__CM_GAMUT_REMAP_B_C34__SHIFT
  49693. CM5_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11_MASK
  49694. CM5_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C11__SHIFT
  49695. CM5_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12_MASK
  49696. CM5_CM_GAMUT_REMAP_C11_C12__CM_GAMUT_REMAP_C12__SHIFT
  49697. CM5_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13_MASK
  49698. CM5_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C13__SHIFT
  49699. CM5_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14_MASK
  49700. CM5_CM_GAMUT_REMAP_C13_C14__CM_GAMUT_REMAP_C14__SHIFT
  49701. CM5_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21_MASK
  49702. CM5_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C21__SHIFT
  49703. CM5_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22_MASK
  49704. CM5_CM_GAMUT_REMAP_C21_C22__CM_GAMUT_REMAP_C22__SHIFT
  49705. CM5_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23_MASK
  49706. CM5_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C23__SHIFT
  49707. CM5_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24_MASK
  49708. CM5_CM_GAMUT_REMAP_C23_C24__CM_GAMUT_REMAP_C24__SHIFT
  49709. CM5_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31_MASK
  49710. CM5_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C31__SHIFT
  49711. CM5_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32_MASK
  49712. CM5_CM_GAMUT_REMAP_C31_C32__CM_GAMUT_REMAP_C32__SHIFT
  49713. CM5_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33_MASK
  49714. CM5_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C33__SHIFT
  49715. CM5_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34_MASK
  49716. CM5_CM_GAMUT_REMAP_C33_C34__CM_GAMUT_REMAP_C34__SHIFT
  49717. CM5_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE_MASK
  49718. CM5_CM_GAMUT_REMAP_CONTROL__CM_GAMUT_REMAP_MODE__SHIFT
  49719. CM5_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF_MASK
  49720. CM5_CM_HDR_MULT_COEF__CM_HDR_MULT_COEF__SHIFT
  49721. CM5_CM_ICSC_B_C11_C12__CM_ICSC_B_C11_MASK
  49722. CM5_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT
  49723. CM5_CM_ICSC_B_C11_C12__CM_ICSC_B_C12_MASK
  49724. CM5_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT
  49725. CM5_CM_ICSC_B_C13_C14__CM_ICSC_B_C13_MASK
  49726. CM5_CM_ICSC_B_C13_C14__CM_ICSC_B_C13__SHIFT
  49727. CM5_CM_ICSC_B_C13_C14__CM_ICSC_B_C14_MASK
  49728. CM5_CM_ICSC_B_C13_C14__CM_ICSC_B_C14__SHIFT
  49729. CM5_CM_ICSC_B_C21_C22__CM_ICSC_B_C21_MASK
  49730. CM5_CM_ICSC_B_C21_C22__CM_ICSC_B_C21__SHIFT
  49731. CM5_CM_ICSC_B_C21_C22__CM_ICSC_B_C22_MASK
  49732. CM5_CM_ICSC_B_C21_C22__CM_ICSC_B_C22__SHIFT
  49733. CM5_CM_ICSC_B_C23_C24__CM_ICSC_B_C23_MASK
  49734. CM5_CM_ICSC_B_C23_C24__CM_ICSC_B_C23__SHIFT
  49735. CM5_CM_ICSC_B_C23_C24__CM_ICSC_B_C24_MASK
  49736. CM5_CM_ICSC_B_C23_C24__CM_ICSC_B_C24__SHIFT
  49737. CM5_CM_ICSC_B_C31_C32__CM_ICSC_B_C31_MASK
  49738. CM5_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT
  49739. CM5_CM_ICSC_B_C31_C32__CM_ICSC_B_C32_MASK
  49740. CM5_CM_ICSC_B_C31_C32__CM_ICSC_B_C32__SHIFT
  49741. CM5_CM_ICSC_B_C33_C34__CM_ICSC_B_C33_MASK
  49742. CM5_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT
  49743. CM5_CM_ICSC_B_C33_C34__CM_ICSC_B_C34_MASK
  49744. CM5_CM_ICSC_B_C33_C34__CM_ICSC_B_C34__SHIFT
  49745. CM5_CM_ICSC_C11_C12__CM_ICSC_C11_MASK
  49746. CM5_CM_ICSC_C11_C12__CM_ICSC_C11__SHIFT
  49747. CM5_CM_ICSC_C11_C12__CM_ICSC_C12_MASK
  49748. CM5_CM_ICSC_C11_C12__CM_ICSC_C12__SHIFT
  49749. CM5_CM_ICSC_C13_C14__CM_ICSC_C13_MASK
  49750. CM5_CM_ICSC_C13_C14__CM_ICSC_C13__SHIFT
  49751. CM5_CM_ICSC_C13_C14__CM_ICSC_C14_MASK
  49752. CM5_CM_ICSC_C13_C14__CM_ICSC_C14__SHIFT
  49753. CM5_CM_ICSC_C21_C22__CM_ICSC_C21_MASK
  49754. CM5_CM_ICSC_C21_C22__CM_ICSC_C21__SHIFT
  49755. CM5_CM_ICSC_C21_C22__CM_ICSC_C22_MASK
  49756. CM5_CM_ICSC_C21_C22__CM_ICSC_C22__SHIFT
  49757. CM5_CM_ICSC_C23_C24__CM_ICSC_C23_MASK
  49758. CM5_CM_ICSC_C23_C24__CM_ICSC_C23__SHIFT
  49759. CM5_CM_ICSC_C23_C24__CM_ICSC_C24_MASK
  49760. CM5_CM_ICSC_C23_C24__CM_ICSC_C24__SHIFT
  49761. CM5_CM_ICSC_C31_C32__CM_ICSC_C31_MASK
  49762. CM5_CM_ICSC_C31_C32__CM_ICSC_C31__SHIFT
  49763. CM5_CM_ICSC_C31_C32__CM_ICSC_C32_MASK
  49764. CM5_CM_ICSC_C31_C32__CM_ICSC_C32__SHIFT
  49765. CM5_CM_ICSC_C33_C34__CM_ICSC_C33_MASK
  49766. CM5_CM_ICSC_C33_C34__CM_ICSC_C33__SHIFT
  49767. CM5_CM_ICSC_C33_C34__CM_ICSC_C34_MASK
  49768. CM5_CM_ICSC_C33_C34__CM_ICSC_C34__SHIFT
  49769. CM5_CM_ICSC_CONTROL__CM_ICSC_MODE_MASK
  49770. CM5_CM_ICSC_CONTROL__CM_ICSC_MODE__SHIFT
  49771. CM5_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS_MASK
  49772. CM5_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_DIS__SHIFT
  49773. CM5_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE_MASK
  49774. CM5_CM_MEM_PWR_CTRL2__HDR3DLUT_MEM_PWR_FORCE__SHIFT
  49775. CM5_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS_MASK
  49776. CM5_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_DIS__SHIFT
  49777. CM5_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE_MASK
  49778. CM5_CM_MEM_PWR_CTRL2__SHAPER_MEM_PWR_FORCE__SHIFT
  49779. CM5_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK
  49780. CM5_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT
  49781. CM5_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE_MASK
  49782. CM5_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_FORCE__SHIFT
  49783. CM5_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS_MASK
  49784. CM5_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_DIS__SHIFT
  49785. CM5_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE_MASK
  49786. CM5_CM_MEM_PWR_CTRL__SHARED_MEM_PWR_FORCE__SHIFT
  49787. CM5_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE_MASK
  49788. CM5_CM_MEM_PWR_STATUS2__HDR3DLUT_MEM_PWR_STATE__SHIFT
  49789. CM5_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE_MASK
  49790. CM5_CM_MEM_PWR_STATUS2__SHAPER_MEM_PWR_STATE__SHIFT
  49791. CM5_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE_MASK
  49792. CM5_CM_MEM_PWR_STATUS__BLNDGAM_MEM_PWR_STATE__SHIFT
  49793. CM5_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE_MASK
  49794. CM5_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT
  49795. CM5_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK
  49796. CM5_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT
  49797. CM5_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA_MASK
  49798. CM5_CM_SHAPER_LUT_DATA__CM_SHAPER_LUT_DATA__SHIFT
  49799. CM5_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX_MASK
  49800. CM5_CM_SHAPER_LUT_INDEX__CM_SHAPER_LUT_INDEX__SHIFT
  49801. CM5_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS_MASK
  49802. CM5_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_CONFIG_STATUS__SHIFT
  49803. CM5_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK_MASK
  49804. CM5_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_EN_MASK__SHIFT
  49805. CM5_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL_MASK
  49806. CM5_CM_SHAPER_LUT_WRITE_EN_MASK__CM_SHAPER_LUT_WRITE_SEL__SHIFT
  49807. CM5_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B_MASK
  49808. CM5_CM_SHAPER_OFFSET_B__CM_SHAPER_OFFSET_B__SHIFT
  49809. CM5_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G_MASK
  49810. CM5_CM_SHAPER_OFFSET_G__CM_SHAPER_OFFSET_G__SHIFT
  49811. CM5_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R_MASK
  49812. CM5_CM_SHAPER_OFFSET_R__CM_SHAPER_OFFSET_R__SHIFT
  49813. CM5_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B_MASK
  49814. CM5_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_BASE_B__SHIFT
  49815. CM5_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B_MASK
  49816. CM5_CM_SHAPER_RAMA_END_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_END_B__SHIFT
  49817. CM5_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G_MASK
  49818. CM5_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_BASE_G__SHIFT
  49819. CM5_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G_MASK
  49820. CM5_CM_SHAPER_RAMA_END_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_END_G__SHIFT
  49821. CM5_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R_MASK
  49822. CM5_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_BASE_R__SHIFT
  49823. CM5_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R_MASK
  49824. CM5_CM_SHAPER_RAMA_END_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_END_R__SHIFT
  49825. CM5_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET_MASK
  49826. CM5_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET__SHIFT
  49827. CM5_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS_MASK
  49828. CM5_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  49829. CM5_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET_MASK
  49830. CM5_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET__SHIFT
  49831. CM5_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS_MASK
  49832. CM5_CM_SHAPER_RAMA_REGION_0_1__CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  49833. CM5_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET_MASK
  49834. CM5_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET__SHIFT
  49835. CM5_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS_MASK
  49836. CM5_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  49837. CM5_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET_MASK
  49838. CM5_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET__SHIFT
  49839. CM5_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS_MASK
  49840. CM5_CM_SHAPER_RAMA_REGION_10_11__CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  49841. CM5_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET_MASK
  49842. CM5_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET__SHIFT
  49843. CM5_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS_MASK
  49844. CM5_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  49845. CM5_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET_MASK
  49846. CM5_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET__SHIFT
  49847. CM5_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS_MASK
  49848. CM5_CM_SHAPER_RAMA_REGION_12_13__CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  49849. CM5_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET_MASK
  49850. CM5_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET__SHIFT
  49851. CM5_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS_MASK
  49852. CM5_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  49853. CM5_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET_MASK
  49854. CM5_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET__SHIFT
  49855. CM5_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS_MASK
  49856. CM5_CM_SHAPER_RAMA_REGION_14_15__CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  49857. CM5_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET_MASK
  49858. CM5_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET__SHIFT
  49859. CM5_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS_MASK
  49860. CM5_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS__SHIFT
  49861. CM5_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET_MASK
  49862. CM5_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET__SHIFT
  49863. CM5_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS_MASK
  49864. CM5_CM_SHAPER_RAMA_REGION_16_17__CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS__SHIFT
  49865. CM5_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET_MASK
  49866. CM5_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET__SHIFT
  49867. CM5_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS_MASK
  49868. CM5_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS__SHIFT
  49869. CM5_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET_MASK
  49870. CM5_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET__SHIFT
  49871. CM5_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS_MASK
  49872. CM5_CM_SHAPER_RAMA_REGION_18_19__CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS__SHIFT
  49873. CM5_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET_MASK
  49874. CM5_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET__SHIFT
  49875. CM5_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS_MASK
  49876. CM5_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS__SHIFT
  49877. CM5_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET_MASK
  49878. CM5_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET__SHIFT
  49879. CM5_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS_MASK
  49880. CM5_CM_SHAPER_RAMA_REGION_20_21__CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS__SHIFT
  49881. CM5_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET_MASK
  49882. CM5_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET__SHIFT
  49883. CM5_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS_MASK
  49884. CM5_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS__SHIFT
  49885. CM5_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET_MASK
  49886. CM5_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET__SHIFT
  49887. CM5_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS_MASK
  49888. CM5_CM_SHAPER_RAMA_REGION_22_23__CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS__SHIFT
  49889. CM5_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET_MASK
  49890. CM5_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET__SHIFT
  49891. CM5_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS_MASK
  49892. CM5_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS__SHIFT
  49893. CM5_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET_MASK
  49894. CM5_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET__SHIFT
  49895. CM5_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS_MASK
  49896. CM5_CM_SHAPER_RAMA_REGION_24_25__CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS__SHIFT
  49897. CM5_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET_MASK
  49898. CM5_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET__SHIFT
  49899. CM5_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS_MASK
  49900. CM5_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS__SHIFT
  49901. CM5_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET_MASK
  49902. CM5_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET__SHIFT
  49903. CM5_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS_MASK
  49904. CM5_CM_SHAPER_RAMA_REGION_26_27__CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS__SHIFT
  49905. CM5_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET_MASK
  49906. CM5_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET__SHIFT
  49907. CM5_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS_MASK
  49908. CM5_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS__SHIFT
  49909. CM5_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET_MASK
  49910. CM5_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET__SHIFT
  49911. CM5_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS_MASK
  49912. CM5_CM_SHAPER_RAMA_REGION_28_29__CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS__SHIFT
  49913. CM5_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET_MASK
  49914. CM5_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET__SHIFT
  49915. CM5_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS_MASK
  49916. CM5_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  49917. CM5_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET_MASK
  49918. CM5_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET__SHIFT
  49919. CM5_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS_MASK
  49920. CM5_CM_SHAPER_RAMA_REGION_2_3__CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  49921. CM5_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET_MASK
  49922. CM5_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET__SHIFT
  49923. CM5_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS_MASK
  49924. CM5_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS__SHIFT
  49925. CM5_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET_MASK
  49926. CM5_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET__SHIFT
  49927. CM5_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS_MASK
  49928. CM5_CM_SHAPER_RAMA_REGION_30_31__CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS__SHIFT
  49929. CM5_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET_MASK
  49930. CM5_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET__SHIFT
  49931. CM5_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS_MASK
  49932. CM5_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS__SHIFT
  49933. CM5_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET_MASK
  49934. CM5_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET__SHIFT
  49935. CM5_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS_MASK
  49936. CM5_CM_SHAPER_RAMA_REGION_32_33__CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS__SHIFT
  49937. CM5_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET_MASK
  49938. CM5_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET__SHIFT
  49939. CM5_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS_MASK
  49940. CM5_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  49941. CM5_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET_MASK
  49942. CM5_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET__SHIFT
  49943. CM5_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS_MASK
  49944. CM5_CM_SHAPER_RAMA_REGION_4_5__CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  49945. CM5_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET_MASK
  49946. CM5_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET__SHIFT
  49947. CM5_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS_MASK
  49948. CM5_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  49949. CM5_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET_MASK
  49950. CM5_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET__SHIFT
  49951. CM5_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS_MASK
  49952. CM5_CM_SHAPER_RAMA_REGION_6_7__CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  49953. CM5_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET_MASK
  49954. CM5_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET__SHIFT
  49955. CM5_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS_MASK
  49956. CM5_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  49957. CM5_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET_MASK
  49958. CM5_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET__SHIFT
  49959. CM5_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS_MASK
  49960. CM5_CM_SHAPER_RAMA_REGION_8_9__CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  49961. CM5_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B_MASK
  49962. CM5_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_B__SHIFT
  49963. CM5_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B_MASK
  49964. CM5_CM_SHAPER_RAMA_START_CNTL_B__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B__SHIFT
  49965. CM5_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G_MASK
  49966. CM5_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_G__SHIFT
  49967. CM5_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G_MASK
  49968. CM5_CM_SHAPER_RAMA_START_CNTL_G__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G__SHIFT
  49969. CM5_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R_MASK
  49970. CM5_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_R__SHIFT
  49971. CM5_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R_MASK
  49972. CM5_CM_SHAPER_RAMA_START_CNTL_R__CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R__SHIFT
  49973. CM5_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B_MASK
  49974. CM5_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_BASE_B__SHIFT
  49975. CM5_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B_MASK
  49976. CM5_CM_SHAPER_RAMB_END_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_END_B__SHIFT
  49977. CM5_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G_MASK
  49978. CM5_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_BASE_G__SHIFT
  49979. CM5_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G_MASK
  49980. CM5_CM_SHAPER_RAMB_END_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_END_G__SHIFT
  49981. CM5_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R_MASK
  49982. CM5_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_BASE_R__SHIFT
  49983. CM5_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R_MASK
  49984. CM5_CM_SHAPER_RAMB_END_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_END_R__SHIFT
  49985. CM5_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET_MASK
  49986. CM5_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET__SHIFT
  49987. CM5_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS_MASK
  49988. CM5_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  49989. CM5_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET_MASK
  49990. CM5_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET__SHIFT
  49991. CM5_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS_MASK
  49992. CM5_CM_SHAPER_RAMB_REGION_0_1__CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  49993. CM5_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET_MASK
  49994. CM5_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET__SHIFT
  49995. CM5_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS_MASK
  49996. CM5_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  49997. CM5_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET_MASK
  49998. CM5_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET__SHIFT
  49999. CM5_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS_MASK
  50000. CM5_CM_SHAPER_RAMB_REGION_10_11__CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  50001. CM5_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET_MASK
  50002. CM5_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET__SHIFT
  50003. CM5_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS_MASK
  50004. CM5_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  50005. CM5_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET_MASK
  50006. CM5_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET__SHIFT
  50007. CM5_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS_MASK
  50008. CM5_CM_SHAPER_RAMB_REGION_12_13__CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  50009. CM5_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET_MASK
  50010. CM5_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET__SHIFT
  50011. CM5_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS_MASK
  50012. CM5_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  50013. CM5_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET_MASK
  50014. CM5_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET__SHIFT
  50015. CM5_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS_MASK
  50016. CM5_CM_SHAPER_RAMB_REGION_14_15__CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  50017. CM5_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET_MASK
  50018. CM5_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET__SHIFT
  50019. CM5_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS_MASK
  50020. CM5_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS__SHIFT
  50021. CM5_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET_MASK
  50022. CM5_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET__SHIFT
  50023. CM5_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS_MASK
  50024. CM5_CM_SHAPER_RAMB_REGION_16_17__CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS__SHIFT
  50025. CM5_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET_MASK
  50026. CM5_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET__SHIFT
  50027. CM5_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS_MASK
  50028. CM5_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS__SHIFT
  50029. CM5_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET_MASK
  50030. CM5_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET__SHIFT
  50031. CM5_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS_MASK
  50032. CM5_CM_SHAPER_RAMB_REGION_18_19__CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS__SHIFT
  50033. CM5_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET_MASK
  50034. CM5_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET__SHIFT
  50035. CM5_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS_MASK
  50036. CM5_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS__SHIFT
  50037. CM5_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET_MASK
  50038. CM5_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET__SHIFT
  50039. CM5_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS_MASK
  50040. CM5_CM_SHAPER_RAMB_REGION_20_21__CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS__SHIFT
  50041. CM5_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET_MASK
  50042. CM5_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET__SHIFT
  50043. CM5_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS_MASK
  50044. CM5_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS__SHIFT
  50045. CM5_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET_MASK
  50046. CM5_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET__SHIFT
  50047. CM5_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS_MASK
  50048. CM5_CM_SHAPER_RAMB_REGION_22_23__CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS__SHIFT
  50049. CM5_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET_MASK
  50050. CM5_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET__SHIFT
  50051. CM5_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS_MASK
  50052. CM5_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS__SHIFT
  50053. CM5_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET_MASK
  50054. CM5_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET__SHIFT
  50055. CM5_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS_MASK
  50056. CM5_CM_SHAPER_RAMB_REGION_24_25__CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS__SHIFT
  50057. CM5_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET_MASK
  50058. CM5_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET__SHIFT
  50059. CM5_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS_MASK
  50060. CM5_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS__SHIFT
  50061. CM5_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET_MASK
  50062. CM5_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET__SHIFT
  50063. CM5_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS_MASK
  50064. CM5_CM_SHAPER_RAMB_REGION_26_27__CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS__SHIFT
  50065. CM5_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET_MASK
  50066. CM5_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET__SHIFT
  50067. CM5_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS_MASK
  50068. CM5_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS__SHIFT
  50069. CM5_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET_MASK
  50070. CM5_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET__SHIFT
  50071. CM5_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS_MASK
  50072. CM5_CM_SHAPER_RAMB_REGION_28_29__CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS__SHIFT
  50073. CM5_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET_MASK
  50074. CM5_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET__SHIFT
  50075. CM5_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS_MASK
  50076. CM5_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  50077. CM5_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET_MASK
  50078. CM5_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET__SHIFT
  50079. CM5_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS_MASK
  50080. CM5_CM_SHAPER_RAMB_REGION_2_3__CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  50081. CM5_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET_MASK
  50082. CM5_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET__SHIFT
  50083. CM5_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS_MASK
  50084. CM5_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS__SHIFT
  50085. CM5_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET_MASK
  50086. CM5_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET__SHIFT
  50087. CM5_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS_MASK
  50088. CM5_CM_SHAPER_RAMB_REGION_30_31__CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS__SHIFT
  50089. CM5_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET_MASK
  50090. CM5_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET__SHIFT
  50091. CM5_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS_MASK
  50092. CM5_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS__SHIFT
  50093. CM5_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET_MASK
  50094. CM5_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET__SHIFT
  50095. CM5_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS_MASK
  50096. CM5_CM_SHAPER_RAMB_REGION_32_33__CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS__SHIFT
  50097. CM5_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET_MASK
  50098. CM5_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET__SHIFT
  50099. CM5_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS_MASK
  50100. CM5_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  50101. CM5_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET_MASK
  50102. CM5_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET__SHIFT
  50103. CM5_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS_MASK
  50104. CM5_CM_SHAPER_RAMB_REGION_4_5__CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  50105. CM5_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET_MASK
  50106. CM5_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET__SHIFT
  50107. CM5_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS_MASK
  50108. CM5_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  50109. CM5_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET_MASK
  50110. CM5_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET__SHIFT
  50111. CM5_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS_MASK
  50112. CM5_CM_SHAPER_RAMB_REGION_6_7__CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  50113. CM5_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET_MASK
  50114. CM5_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET__SHIFT
  50115. CM5_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS_MASK
  50116. CM5_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  50117. CM5_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET_MASK
  50118. CM5_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET__SHIFT
  50119. CM5_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS_MASK
  50120. CM5_CM_SHAPER_RAMB_REGION_8_9__CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  50121. CM5_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B_MASK
  50122. CM5_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_B__SHIFT
  50123. CM5_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B_MASK
  50124. CM5_CM_SHAPER_RAMB_START_CNTL_B__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B__SHIFT
  50125. CM5_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G_MASK
  50126. CM5_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_G__SHIFT
  50127. CM5_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G_MASK
  50128. CM5_CM_SHAPER_RAMB_START_CNTL_G__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G__SHIFT
  50129. CM5_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R_MASK
  50130. CM5_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_R__SHIFT
  50131. CM5_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R_MASK
  50132. CM5_CM_SHAPER_RAMB_START_CNTL_R__CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R__SHIFT
  50133. CM5_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B_MASK
  50134. CM5_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_B__SHIFT
  50135. CM5_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G_MASK
  50136. CM5_CM_SHAPER_SCALE_G_B__CM_SHAPER_SCALE_G__SHIFT
  50137. CM5_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R_MASK
  50138. CM5_CM_SHAPER_SCALE_R__CM_SHAPER_SCALE_R__SHIFT
  50139. CM5_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA_MASK
  50140. CM5_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA__SHIFT
  50141. CM5_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK
  50142. CM5_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT
  50143. CM5_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK
  50144. CM5_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT
  50145. CM6206_REG0_DMA_MASTER
  50146. CM6206_REG0_SPDIFO_CAT_CODE_GENERAL
  50147. CM6206_REG0_SPDIFO_COPYRIGHT_NA
  50148. CM6206_REG0_SPDIFO_EMPHASIS_CD
  50149. CM6206_REG0_SPDIFO_NON_AUDIO
  50150. CM6206_REG0_SPDIFO_PRO_FORMAT
  50151. CM6206_REG0_SPDIFO_RATE_48K
  50152. CM6206_REG0_SPDIFO_RATE_96K
  50153. CM6206_REG1_GPIO1_OE
  50154. CM6206_REG1_GPIO1_OUT
  50155. CM6206_REG1_GPIO2_OE
  50156. CM6206_REG1_GPIO2_OUT
  50157. CM6206_REG1_GPIO3_OE
  50158. CM6206_REG1_GPIO3_OUT
  50159. CM6206_REG1_GPIO4_OE
  50160. CM6206_REG1_GPIO4_OUT
  50161. CM6206_REG1_PLLBIN_EN
  50162. CM6206_REG1_SOFT_MUTE_EN
  50163. CM6206_REG1_SPDIFI_MIX
  50164. CM6206_REG1_SPDIFO_DIS
  50165. CM6206_REG1_SPDIFO_INVALID
  50166. CM6206_REG1_SPDIF_LOOP_EN
  50167. CM6206_REG1_TEST_SEL_CLK
  50168. CM6206_REG2_DRIVER_ON
  50169. CM6206_REG2_EN_BTL
  50170. CM6206_REG2_HEADP_SEL_CENTER_SUBW
  50171. CM6206_REG2_HEADP_SEL_FRONT_CHANNELS
  50172. CM6206_REG2_HEADP_SEL_SIDE_CHANNELS
  50173. CM6206_REG2_HEADP_SEL_SURROUND_CHANNELS
  50174. CM6206_REG2_MCUCLKSEL_12_MHZ
  50175. CM6206_REG2_MCUCLKSEL_1_5_MHZ
  50176. CM6206_REG2_MCUCLKSEL_3_MHZ
  50177. CM6206_REG2_MCUCLKSEL_6_MHZ
  50178. CM6206_REG2_MUTE_CENTER
  50179. CM6206_REG2_MUTE_HEADPHONE_LEFT
  50180. CM6206_REG2_MUTE_HEADPHONE_RIGHT
  50181. CM6206_REG2_MUTE_LEFT_FRONT
  50182. CM6206_REG2_MUTE_REAR_SURROUND_LEFT
  50183. CM6206_REG2_MUTE_REAR_SURROUND_RIGHT
  50184. CM6206_REG2_MUTE_RIGHT_FRONT
  50185. CM6206_REG2_MUTE_SIDE_SURROUND_LEFT
  50186. CM6206_REG2_MUTE_SIDE_SURROUND_RIGHT
  50187. CM6206_REG2_MUTE_SUBWOOFER
  50188. CM6206_REG3_CBOE
  50189. CM6206_REG3_FLYSPEED_DEFAULT
  50190. CM6206_REG3_FOE
  50191. CM6206_REG3_HPOE
  50192. CM6206_REG3_LOSE
  50193. CM6206_REG3_MSEL1
  50194. CM6206_REG3_PINSEL
  50195. CM6206_REG3_ROE
  50196. CM6206_REG3_SPDIFI_CANREC
  50197. CM6206_REG3_SPDIFI_RATE_32K
  50198. CM6206_REG3_SPDIFI_RATE_44_1K
  50199. CM6206_REG3_SPDIFI_RATE_48K
  50200. CM6206_REG3_VRAP25EN
  50201. CM6206_REG5_AD_RSTN
  50202. CM6206_REG5_CODECM
  50203. CM6206_REG5_DA_RSTN
  50204. CM6206_REG5_EN_HPF
  50205. CM6206_REG5_SPDIFO_AD2SPDO
  50206. CM6206_REG5_SPDIFO_SEL_CEN_LFE
  50207. CM6206_REG5_SPDIFO_SEL_FRONT
  50208. CM6206_REG5_SPDIFO_SEL_REAR_SUR
  50209. CM6206_REG5_SPDIFO_SEL_SIDE_SUR
  50210. CM6206_REG5_T_SEL_DSDA1
  50211. CM6206_REG5_T_SEL_DSDA2
  50212. CM6206_REG5_T_SEL_DSDA3
  50213. CM6206_REG5_T_SEL_DSDA4
  50214. CM6206_REG5_T_SEL_DSDAD_CEN_LFE
  50215. CM6206_REG5_T_SEL_DSDAD_FRONT
  50216. CM6206_REG5_T_SEL_DSDAD_NORMAL
  50217. CM6206_REG5_T_SEL_DSDAD_R_SURROUND
  50218. CM6206_REG5_T_SEL_DSDAD_S_SURROUND
  50219. CM6533_JD_RAWEV_LEN
  50220. CM6533_JD_SFX_OFFSET
  50221. CM6533_JD_TYPE_COUNT
  50222. CM9780_BSTSEL
  50223. CM9780_CB2MICOE
  50224. CM9780_CBOE
  50225. CM9780_FMIC2LI
  50226. CM9780_FMIC2MIC
  50227. CM9780_FROE
  50228. CM9780_GPI0EN
  50229. CM9780_GPI1EN
  50230. CM9780_GPII0S
  50231. CM9780_GPII1S
  50232. CM9780_GPIO0IO
  50233. CM9780_GPIO0P
  50234. CM9780_GPIO0S
  50235. CM9780_GPIO1IO
  50236. CM9780_GPIO1P
  50237. CM9780_GPIO1S
  50238. CM9780_GPIO_SETUP
  50239. CM9780_GPIO_STATUS
  50240. CM9780_GPO0
  50241. CM9780_GPO1
  50242. CM9780_HP2FMICOE
  50243. CM9780_HP2LI
  50244. CM9780_HP2MIC
  50245. CM9780_H_INCLUDED
  50246. CM9780_JACK
  50247. CM9780_LI2LI
  50248. CM9780_LI2MIC
  50249. CM9780_LO2LI
  50250. CM9780_LO2MIC
  50251. CM9780_LOCK_P
  50252. CM9780_MIC2LI
  50253. CM9780_MIC2MIC
  50254. CM9780_MIX2CB
  50255. CM9780_MIX2CB_EX
  50256. CM9780_MIX2FR
  50257. CM9780_MIX2FR_EX
  50258. CM9780_MIX2RS
  50259. CM9780_MIX2RS_EX
  50260. CM9780_MIX2SS
  50261. CM9780_MIX2SS_EX
  50262. CM9780_MIXER
  50263. CM9780_P47_IO
  50264. CM9780_PCBSW
  50265. CM9780_RSOE
  50266. CM9780_SENSE_P
  50267. CM9780_SPDI_CBEX
  50268. CM9780_SPDI_FREX
  50269. CM9780_SPDI_RSEX
  50270. CM9780_SPDI_SSEX
  50271. CM9780_SSOE
  50272. CM9780_STRO_MIC
  50273. CMA3000_BUSI2C
  50274. CMA3000_CTRL
  50275. CMA3000_DOUTX
  50276. CMA3000_DOUTY
  50277. CMA3000_DOUTZ
  50278. CMA3000_FFTHR
  50279. CMA3000_GRANGEMASK
  50280. CMA3000_INTDELAY
  50281. CMA3000_INTSTATUS
  50282. CMA3000_INTSTATUS_FFDET
  50283. CMA3000_MDFFTMR
  50284. CMA3000_MDTHR
  50285. CMA3000_MODEMASK
  50286. CMA3000_RANGE2G
  50287. CMA3000_RANGE8G
  50288. CMA3000_READ
  50289. CMA3000_REVID
  50290. CMA3000_RSTR
  50291. CMA3000_SET
  50292. CMA3000_SETDELAY
  50293. CMA3000_STATUS
  50294. CMA3000_STATUS_PERR
  50295. CMA3000_WHOAMI
  50296. CMAC_MSG_MAX
  50297. CMAC_TLEN
  50298. CMAC_TLEN_256
  50299. CMAGIC
  50300. CMAMODE_DEFAULT
  50301. CMAMODE_FF100
  50302. CMAMODE_FF400
  50303. CMAMODE_MEAS100
  50304. CMAMODE_MEAS40
  50305. CMAMODE_MEAS400
  50306. CMAMODE_MOTDET
  50307. CMAMODE_POFF
  50308. CMAP
  50309. CMAPPEDSCR
  50310. CMAP_TOHW
  50311. CMARANGE_2G
  50312. CMARANGE_8G
  50313. CMASK_ADDR_COMPATIBLE
  50314. CMASK_ADDR_LINEAR
  50315. CMASK_ADDR_TILED
  50316. CMASK_ALPHA0_FRAG1
  50317. CMASK_ALPHA0_FRAG2
  50318. CMASK_ALPHA0_FRAG4
  50319. CMASK_ALPHA0_FRAGS
  50320. CMASK_ALPHA1_FRAG1
  50321. CMASK_ALPHA1_FRAG2
  50322. CMASK_ALPHA1_FRAG4
  50323. CMASK_ALPHA1_FRAGS
  50324. CMASK_ALPHAX_FRAG1
  50325. CMASK_ALPHAX_FRAG2
  50326. CMASK_ALPHAX_FRAG4
  50327. CMASK_ALPHAX_FRAGS
  50328. CMASK_ANY_EXPANDED
  50329. CMASK_CLEAR_ALL
  50330. CMASK_CLEAR_NONE
  50331. CMASK_CLEAR_ONE
  50332. CMASK_CLR00_F0
  50333. CMASK_CLR00_F1
  50334. CMASK_CLR00_F2
  50335. CMASK_CLR00_FX
  50336. CMASK_CLR01_F0
  50337. CMASK_CLR01_F1
  50338. CMASK_CLR01_F2
  50339. CMASK_CLR01_FX
  50340. CMASK_CLR10_F0
  50341. CMASK_CLR10_F1
  50342. CMASK_CLR10_F2
  50343. CMASK_CLR10_FX
  50344. CMASK_CLR11_F0
  50345. CMASK_CLR11_F1
  50346. CMASK_CLR11_F2
  50347. CMASK_CLR11_FX
  50348. CMAS_ASSOCIATED
  50349. CMAS_AUTHENTICATED
  50350. CMAS_AUTH_SEQ_1_FAIL
  50351. CMAS_AUTH_SEQ_1_PASS
  50352. CMAS_AUTH_SEQ_2_FAIL
  50353. CMAS_AUTH_SEQ_2_PASS
  50354. CMAS_INIT
  50355. CMAS_LAST
  50356. CMAS_RX_ASSOC_RESP
  50357. CMAS_RX_AUTH_SEQ_2
  50358. CMAS_RX_AUTH_SEQ_4
  50359. CMAS_TX_ASSOC
  50360. CMAS_TX_AUTH_SEQ_1
  50361. CMAS_TX_AUTH_SEQ_3
  50362. CMATRIX_LEN
  50363. CMA_CM_MRA_SETTING
  50364. CMA_CM_RESPONSE_TIMEOUT
  50365. CMA_IBOE_PACKET_LIFETIME
  50366. CMA_MAX_CM_RETRIES
  50367. CMA_OPTION_AFONLY
  50368. CMA_PREFERRED_ROCE_GID_TYPE
  50369. CMA_QUERY_CLASSPORT_INFO_TIMEOUT
  50370. CMA_SIZE_MBYTES
  50371. CMA_VERSION
  50372. CMB_CTRL
  50373. CMB_RRD_TH_MASK
  50374. CMB_RRD_TH_SHIFT
  50375. CMB_RSV
  50376. CMB_RX_TM_MASK
  50377. CMB_RX_TM_SHIFT
  50378. CMB_TPD_TH_MASK
  50379. CMB_TPD_TH_SHIFT
  50380. CMB_TX_TM_MASK
  50381. CMB_TX_TM_SHIFT
  50382. CMCI_POLL_INTERVAL
  50383. CMCI_STORM_ACTIVE
  50384. CMCI_STORM_INTERVAL
  50385. CMCI_STORM_NONE
  50386. CMCI_STORM_SUBSIDED
  50387. CMCI_STORM_THRESHOLD
  50388. CMCI_THRESHOLD
  50389. CMCNT
  50390. CMCOR
  50391. CMCR
  50392. CMCSR
  50393. CMC_3DLUT_17CUBE
  50394. CMC_3DLUT_30BIT
  50395. CMC_3DLUT_30BIT_ENUM
  50396. CMC_3DLUT_36BIT
  50397. CMC_3DLUT_9CUBE
  50398. CMC_3DLUT_RAM_SEL
  50399. CMC_3DLUT_SIZE_ENUM
  50400. CMC_COEF_REG
  50401. CMC_CTL_REG
  50402. CMC_GOFS_REG
  50403. CMC_HISTORY_LENGTH
  50404. CMC_LUT_2CFG_MEMORY_A
  50405. CMC_LUT_2CFG_MEMORY_B
  50406. CMC_LUT_2CFG_NO_MEMORY
  50407. CMC_LUT_2_CONFIG_ENUM
  50408. CMC_LUT_2_MODE_BYPASS
  50409. CMC_LUT_2_MODE_ENUM
  50410. CMC_LUT_2_MODE_RAMA_LUT
  50411. CMC_LUT_2_MODE_RAMB_LUT
  50412. CMC_LUT_NUM_SEG
  50413. CMC_LUT_RAM_SEL
  50414. CMC_OFSGH_REG
  50415. CMC_OFSGL_REG
  50416. CMC_OFS_REG
  50417. CMC_POLL_INTERVAL
  50418. CMC_RAM0_ACCESS
  50419. CMC_RAM1_ACCESS
  50420. CMC_RAM2_ACCESS
  50421. CMC_RAM3_ACCESS
  50422. CMC_RAMA_ACCESS
  50423. CMC_RAMB_ACCESS
  50424. CMC_SEGMENTS_1
  50425. CMC_SEGMENTS_128
  50426. CMC_SEGMENTS_16
  50427. CMC_SEGMENTS_2
  50428. CMC_SEGMENTS_32
  50429. CMC_SEGMENTS_4
  50430. CMC_SEGMENTS_64
  50431. CMC_SEGMENTS_8
  50432. CMC_SIGN_REG
  50433. CMD
  50434. CMD0
  50435. CMD0_BITS
  50436. CMD0_CLEAR
  50437. CMD0_FIFO
  50438. CMD0_FIFO_BCH
  50439. CMD0_FIFO_DEV_ADDR
  50440. CMD0_FIFO_IS_10B
  50441. CMD0_FIFO_IS_CCC
  50442. CMD0_FIFO_IS_DDR
  50443. CMD0_FIFO_PL_LEN
  50444. CMD0_FIFO_PL_LEN_MAX
  50445. CMD0_FIFO_PRIV_XMIT_MODE
  50446. CMD0_FIFO_RNW
  50447. CMD0_FIFO_RSBC
  50448. CMD0_FIFO_SBCA
  50449. CMD0_IRQ_THRESHOLD
  50450. CMD1
  50451. CMD1_FIFO
  50452. CMD1_FIFO_CCC
  50453. CMD1_FIFO_CMDID
  50454. CMD1_FIFO_CSRADDR
  50455. CMD1_GAIN
  50456. CMD1_MA
  50457. CMD1_REG
  50458. CMD1_SCANEN
  50459. CMD1_TWOSCMP
  50460. CMD2
  50461. CMD2_2SDAC0
  50462. CMD2_2SDAC1
  50463. CMD2_BITS
  50464. CMD2_CLEAR
  50465. CMD2_HWTRIG
  50466. CMD2_LDAC
  50467. CMD2_PRETRIG
  50468. CMD2_REG
  50469. CMD2_SWTRIG
  50470. CMD2_TBSEL
  50471. CMD3
  50472. CMD3_BITS
  50473. CMD3_CNTINTEN
  50474. CMD3_DIOINTEN
  50475. CMD3_DMAEN
  50476. CMD3_DMATCINTEN
  50477. CMD3_ERRINTEN
  50478. CMD3_FIFOINTEN
  50479. CMD3_REG
  50480. CMD4_ECLKDRV
  50481. CMD4_ECLKRCV
  50482. CMD4_EOIRCV
  50483. CMD4_INTSCAN
  50484. CMD4_REG
  50485. CMD4_SEDIFF
  50486. CMD53_ARG_BLOCK_BASIS
  50487. CMD53_ARG_FIXED_ADDRESS
  50488. CMD53_ARG_INCR_ADDRESS
  50489. CMD53_ARG_READ
  50490. CMD53_ARG_WRITE
  50491. CMD53_FIXED_ADDRESS
  50492. CMD53_INCR_ADDRESS
  50493. CMD53_NEW_MODE
  50494. CMD5_AES_MASK_OFFSET
  50495. CMD5_CALDACLD
  50496. CMD5_CLK_GATE_CTL_OFFSET
  50497. CMD5_CMD_TIMEOUT_OFFSET
  50498. CMD5_CONFIG_0_OFFSET
  50499. CMD5_DITHEREN
  50500. CMD5_EEPROMCS
  50501. CMD5_PSP_CCP_VERSION
  50502. CMD5_QUEUE_MASK_OFFSET
  50503. CMD5_QUEUE_PRIO_OFFSET
  50504. CMD5_Q_ABORT_BASE
  50505. CMD5_Q_AX_CACHE_BASE
  50506. CMD5_Q_CONTROL_BASE
  50507. CMD5_Q_DMA_READ_STATUS_BASE
  50508. CMD5_Q_DMA_STATUS_BASE
  50509. CMD5_Q_DMA_WRITE_STATUS_BASE
  50510. CMD5_Q_HALT
  50511. CMD5_Q_HEAD_LO_BASE
  50512. CMD5_Q_INTERRUPT_STATUS_BASE
  50513. CMD5_Q_INT_ENABLE_BASE
  50514. CMD5_Q_INT_STATUS_BASE
  50515. CMD5_Q_MEM_LOCATION
  50516. CMD5_Q_RUN
  50517. CMD5_Q_SHIFT
  50518. CMD5_Q_SIZE
  50519. CMD5_Q_STATUS_BASE
  50520. CMD5_Q_STATUS_INCR
  50521. CMD5_Q_TAIL_LO_BASE
  50522. CMD5_REG
  50523. CMD5_REQID_CONFIG_OFFSET
  50524. CMD5_SCLK
  50525. CMD5_SDATA
  50526. CMD5_TRNG_CTL_OFFSET
  50527. CMD5_WRTPRT
  50528. CMD640_PREFETCH_MASKS
  50529. CMD6_ADCUNI
  50530. CMD6_DACUNI
  50531. CMD6_DQINTEN
  50532. CMD6_HFINTEN
  50533. CMD6_NRSE
  50534. CMD6_REG
  50535. CMD6_SCANUP
  50536. CMD7
  50537. CMD7_BITS
  50538. CMD7_CLEAR
  50539. CMD9346CR_9356SEL
  50540. CMDA
  50541. CMDATA_SYNCH
  50542. CMDATA_SYNCH_NVRAM
  50543. CMDAT_BUSY
  50544. CMDAT_DATAEN
  50545. CMDAT_DMAEN
  50546. CMDAT_INIT
  50547. CMDAT_RESP_NONE
  50548. CMDAT_RESP_R2
  50549. CMDAT_RESP_R3
  50550. CMDAT_RESP_SHORT
  50551. CMDAT_SDIO_INT_EN
  50552. CMDAT_SD_4DAT
  50553. CMDAT_STREAM
  50554. CMDAT_WRITE
  50555. CMDB
  50556. CMDBLK_ORB_DATA_SIZE
  50557. CMDBLK_ORB_DIRECTION
  50558. CMDBLK_ORB_MAX_PAYLOAD
  50559. CMDBLK_ORB_PG_SIZE
  50560. CMDBLK_ORB_PG_TBL_PRESENT
  50561. CMDBLK_ORB_SPEED
  50562. CMDBUFF_ALIGN_SZ
  50563. CMDBUF_ALIGNMENT_MASK
  50564. CMDBUF_ALIGNMENT_SIZE
  50565. CMDBUF_BEACON
  50566. CMDBUF_MAX
  50567. CMDBUF_RSVD
  50568. CMDCONFIG_RESTART_BIT
  50569. CMDCONFIG_RESTART_MASK
  50570. CMDCONFIG_STOP_BIT
  50571. CMDCONFIG_STOP_MASK
  50572. CMDCR
  50573. CMDCTXBASE
  50574. CMDCTXDOMAIN0
  50575. CMDCTXDOMAIN1
  50576. CMDEEPROM_EN
  50577. CMDEEPROM_SEL
  50578. CMDEERPOMSEL
  50579. CMDEND
  50580. CMDERROR
  50581. CMDFF_ENB
  50582. CMDFIFO_AVAIL_MASK
  50583. CMDF_BOGUS
  50584. CMDF_PRIORITY
  50585. CMDF_RAWDATA
  50586. CMDF_ROUND_DOWN
  50587. CMDF_ROUND_MASK
  50588. CMDF_ROUND_NEAREST
  50589. CMDF_ROUND_UP
  50590. CMDF_ROUND_UP_NEXT
  50591. CMDF_WAKE_EOS
  50592. CMDF_WRITE
  50593. CMDID
  50594. CMDID_BBREGWRITE10
  50595. CMDID_END
  50596. CMDID_INT_CMDS
  50597. CMDID_RF_WRITEREG
  50598. CMDID_SET_TXPOWEROWER_LEVEL
  50599. CMDID_WRITEPORT_UCHAR
  50600. CMDID_WRITEPORT_ULONG
  50601. CMDID_WRITEPORT_USHORT
  50602. CMDIF_TIMEOUT
  50603. CMDINFO
  50604. CMDLINEPARSEH
  50605. CMDLINE_SIZE
  50606. CMDLINKCHANGE_FULLDPLX
  50607. CMDLINKCHANGE_LINKUP
  50608. CMDLINKCHANGE_SPEED
  50609. CMDMBOX_HEADER_LEN
  50610. CMDMBOX_INFO_ELEM_HEADER_LEN
  50611. CMDMTU_SIZE
  50612. CMDOUT_TIMSEL
  50613. CMDPACKET_FRAG_SIZE
  50614. CMDPARSER_USES_GGTT
  50615. CMDPZ
  50616. CMDP_REG
  50617. CMDParm
  50618. CMDQUE_CONTROL
  50619. CMDQ_0_OP
  50620. CMDQ_0_SSV
  50621. CMDQ_ADD_GID_OPCODE_ADD_GID
  50622. CMDQ_ADD_GID_STATS_CTX_STATS_CTX_ID_MASK
  50623. CMDQ_ADD_GID_STATS_CTX_STATS_CTX_ID_SFT
  50624. CMDQ_ADD_GID_STATS_CTX_STATS_CTX_VALID
  50625. CMDQ_ADD_GID_VLAN_TPID_LAST
  50626. CMDQ_ADD_GID_VLAN_TPID_MASK
  50627. CMDQ_ADD_GID_VLAN_TPID_SFT
  50628. CMDQ_ADD_GID_VLAN_TPID_TPID_8100
  50629. CMDQ_ADD_GID_VLAN_TPID_TPID_88A8
  50630. CMDQ_ADD_GID_VLAN_TPID_TPID_9100
  50631. CMDQ_ADD_GID_VLAN_TPID_TPID_9200
  50632. CMDQ_ADD_GID_VLAN_TPID_TPID_9300
  50633. CMDQ_ADD_GID_VLAN_TPID_TPID_CFG1
  50634. CMDQ_ADD_GID_VLAN_TPID_TPID_CFG2
  50635. CMDQ_ADD_GID_VLAN_TPID_TPID_CFG3
  50636. CMDQ_ADD_GID_VLAN_VLAN_EN
  50637. CMDQ_ADD_GID_VLAN_VLAN_ID_MASK
  50638. CMDQ_ADD_GID_VLAN_VLAN_ID_SFT
  50639. CMDQ_ALLOCATE_MRW_ACCESS_CONSUMER_OWNED_KEY
  50640. CMDQ_ALLOCATE_MRW_ACCESS_RESERVED_MASK
  50641. CMDQ_ALLOCATE_MRW_ACCESS_RESERVED_SFT
  50642. CMDQ_ALLOCATE_MRW_MRW_FLAGS_MASK
  50643. CMDQ_ALLOCATE_MRW_MRW_FLAGS_MR
  50644. CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1
  50645. CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A
  50646. CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B
  50647. CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR
  50648. CMDQ_ALLOCATE_MRW_MRW_FLAGS_SFT
  50649. CMDQ_ALLOCATE_MRW_OPCODE_ALLOCATE_MRW
  50650. CMDQ_ARG_A_WRITE_MASK
  50651. CMDQ_ATC_0_GLOBAL
  50652. CMDQ_ATC_0_SID
  50653. CMDQ_ATC_0_SSID
  50654. CMDQ_ATC_1_ADDR_MASK
  50655. CMDQ_ATC_1_SIZE
  50656. CMDQ_BASE_ADDR
  50657. CMDQ_BASE_OPCODE_ADD_GID
  50658. CMDQ_BASE_OPCODE_ALLOCATE_MRW
  50659. CMDQ_BASE_OPCODE_COMPLETE_VF_REQUEST
  50660. CMDQ_BASE_OPCODE_CREATE_AH
  50661. CMDQ_BASE_OPCODE_CREATE_CQ
  50662. CMDQ_BASE_OPCODE_CREATE_QP
  50663. CMDQ_BASE_OPCODE_CREATE_QP1
  50664. CMDQ_BASE_OPCODE_CREATE_SRQ
  50665. CMDQ_BASE_OPCODE_DEALLOCATE_KEY
  50666. CMDQ_BASE_OPCODE_DEINITIALIZE_FW
  50667. CMDQ_BASE_OPCODE_DELETE_GID
  50668. CMDQ_BASE_OPCODE_DEREGISTER_MR
  50669. CMDQ_BASE_OPCODE_DESTROY_AH
  50670. CMDQ_BASE_OPCODE_DESTROY_CQ
  50671. CMDQ_BASE_OPCODE_DESTROY_QP
  50672. CMDQ_BASE_OPCODE_DESTROY_QP1
  50673. CMDQ_BASE_OPCODE_DESTROY_SRQ
  50674. CMDQ_BASE_OPCODE_EXTEND_CONTEXT_ARRRAY
  50675. CMDQ_BASE_OPCODE_INITIALIZE_FW
  50676. CMDQ_BASE_OPCODE_MAP_TC_TO_COS
  50677. CMDQ_BASE_OPCODE_MODIFY_CC
  50678. CMDQ_BASE_OPCODE_MODIFY_GID
  50679. CMDQ_BASE_OPCODE_MODIFY_QP
  50680. CMDQ_BASE_OPCODE_QUERY_CC
  50681. CMDQ_BASE_OPCODE_QUERY_FUNC
  50682. CMDQ_BASE_OPCODE_QUERY_GID
  50683. CMDQ_BASE_OPCODE_QUERY_QP
  50684. CMDQ_BASE_OPCODE_QUERY_ROCE_STATS
  50685. CMDQ_BASE_OPCODE_QUERY_SRQ
  50686. CMDQ_BASE_OPCODE_QUERY_VERSION
  50687. CMDQ_BASE_OPCODE_READ_CONTEXT
  50688. CMDQ_BASE_OPCODE_READ_VF_MEMORY
  50689. CMDQ_BASE_OPCODE_REGISTER_MR
  50690. CMDQ_BASE_OPCODE_RESIZE_CQ
  50691. CMDQ_BASE_OPCODE_SET_FUNC_RESOURCES
  50692. CMDQ_BASE_OPCODE_STOP_FUNC
  50693. CMDQ_BASE_OPCODE_VF_BACKCHANNEL_REQUEST
  50694. CMDQ_BASE_PADDR
  50695. CMDQ_BASE_VADDR
  50696. CMDQ_BATCH_ENTRIES
  50697. CMDQ_BLOCK_SIZE
  50698. CMDQ_CB_ERROR
  50699. CMDQ_CB_NORMAL
  50700. CMDQ_CEQE_GET
  50701. CMDQ_CEQE_TYPE_MASK
  50702. CMDQ_CEQE_TYPE_SHIFT
  50703. CMDQ_CFGI_0_SID
  50704. CMDQ_CFGI_1_LEAF
  50705. CMDQ_CFGI_1_RANGE
  50706. CMDQ_CMD_SYNC_DIRECT_RESP
  50707. CMDQ_CMD_SYNC_SGE_RESP
  50708. CMDQ_CODE_EOC
  50709. CMDQ_CODE_JUMP
  50710. CMDQ_CODE_MASK
  50711. CMDQ_CODE_WFE
  50712. CMDQ_CODE_WRITE
  50713. CMDQ_CONS_ERR
  50714. CMDQ_CREATE_AH_DEST_VLAN_ID_MASK
  50715. CMDQ_CREATE_AH_DEST_VLAN_ID_SFT
  50716. CMDQ_CREATE_AH_FLOW_LABEL_MASK
  50717. CMDQ_CREATE_AH_FLOW_LABEL_SFT
  50718. CMDQ_CREATE_AH_OPCODE_CREATE_AH
  50719. CMDQ_CREATE_AH_TYPE_V1
  50720. CMDQ_CREATE_AH_TYPE_V2IPV4
  50721. CMDQ_CREATE_AH_TYPE_V2IPV6
  50722. CMDQ_CREATE_CQ_CNQ_ID_MASK
  50723. CMDQ_CREATE_CQ_CNQ_ID_SFT
  50724. CMDQ_CREATE_CQ_CQ_FCO_MASK
  50725. CMDQ_CREATE_CQ_CQ_FCO_SFT
  50726. CMDQ_CREATE_CQ_LVL_LVL_0
  50727. CMDQ_CREATE_CQ_LVL_LVL_1
  50728. CMDQ_CREATE_CQ_LVL_LVL_2
  50729. CMDQ_CREATE_CQ_LVL_MASK
  50730. CMDQ_CREATE_CQ_LVL_SFT
  50731. CMDQ_CREATE_CQ_OPCODE_CREATE_CQ
  50732. CMDQ_CREATE_CQ_PG_SIZE_MASK
  50733. CMDQ_CREATE_CQ_PG_SIZE_PG_1G
  50734. CMDQ_CREATE_CQ_PG_SIZE_PG_2M
  50735. CMDQ_CREATE_CQ_PG_SIZE_PG_4K
  50736. CMDQ_CREATE_CQ_PG_SIZE_PG_64K
  50737. CMDQ_CREATE_CQ_PG_SIZE_PG_8K
  50738. CMDQ_CREATE_CQ_PG_SIZE_PG_8M
  50739. CMDQ_CREATE_CQ_PG_SIZE_SFT
  50740. CMDQ_CREATE_QP1_OPCODE_CREATE_QP1
  50741. CMDQ_CREATE_QP1_QP_FLAGS_FORCE_COMPLETION
  50742. CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE
  50743. CMDQ_CREATE_QP1_QP_FLAGS_SRQ_USED
  50744. CMDQ_CREATE_QP1_RQ_FWO_MASK
  50745. CMDQ_CREATE_QP1_RQ_FWO_SFT
  50746. CMDQ_CREATE_QP1_RQ_LVL_LVL_0
  50747. CMDQ_CREATE_QP1_RQ_LVL_LVL_1
  50748. CMDQ_CREATE_QP1_RQ_LVL_LVL_2
  50749. CMDQ_CREATE_QP1_RQ_LVL_MASK
  50750. CMDQ_CREATE_QP1_RQ_LVL_SFT
  50751. CMDQ_CREATE_QP1_RQ_PG_SIZE_MASK
  50752. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_1G
  50753. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_2M
  50754. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K
  50755. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_64K
  50756. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8K
  50757. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8M
  50758. CMDQ_CREATE_QP1_RQ_PG_SIZE_SFT
  50759. CMDQ_CREATE_QP1_RQ_SGE_MASK
  50760. CMDQ_CREATE_QP1_RQ_SGE_SFT
  50761. CMDQ_CREATE_QP1_SQ_FWO_MASK
  50762. CMDQ_CREATE_QP1_SQ_FWO_SFT
  50763. CMDQ_CREATE_QP1_SQ_LVL_LVL_0
  50764. CMDQ_CREATE_QP1_SQ_LVL_LVL_1
  50765. CMDQ_CREATE_QP1_SQ_LVL_LVL_2
  50766. CMDQ_CREATE_QP1_SQ_LVL_MASK
  50767. CMDQ_CREATE_QP1_SQ_LVL_SFT
  50768. CMDQ_CREATE_QP1_SQ_PG_SIZE_MASK
  50769. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_1G
  50770. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_2M
  50771. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K
  50772. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_64K
  50773. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8K
  50774. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8M
  50775. CMDQ_CREATE_QP1_SQ_PG_SIZE_SFT
  50776. CMDQ_CREATE_QP1_SQ_SGE_MASK
  50777. CMDQ_CREATE_QP1_SQ_SGE_SFT
  50778. CMDQ_CREATE_QP1_TYPE_GSI
  50779. CMDQ_CREATE_QP_OPCODE_CREATE_QP
  50780. CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION
  50781. CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED
  50782. CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE
  50783. CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED
  50784. CMDQ_CREATE_QP_RQ_FWO_MASK
  50785. CMDQ_CREATE_QP_RQ_FWO_SFT
  50786. CMDQ_CREATE_QP_RQ_LVL_LVL_0
  50787. CMDQ_CREATE_QP_RQ_LVL_LVL_1
  50788. CMDQ_CREATE_QP_RQ_LVL_LVL_2
  50789. CMDQ_CREATE_QP_RQ_LVL_MASK
  50790. CMDQ_CREATE_QP_RQ_LVL_SFT
  50791. CMDQ_CREATE_QP_RQ_PG_SIZE_MASK
  50792. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_1G
  50793. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_2M
  50794. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K
  50795. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_64K
  50796. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8K
  50797. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8M
  50798. CMDQ_CREATE_QP_RQ_PG_SIZE_SFT
  50799. CMDQ_CREATE_QP_RQ_SGE_MASK
  50800. CMDQ_CREATE_QP_RQ_SGE_SFT
  50801. CMDQ_CREATE_QP_SQ_FWO_MASK
  50802. CMDQ_CREATE_QP_SQ_FWO_SFT
  50803. CMDQ_CREATE_QP_SQ_LVL_LVL_0
  50804. CMDQ_CREATE_QP_SQ_LVL_LVL_1
  50805. CMDQ_CREATE_QP_SQ_LVL_LVL_2
  50806. CMDQ_CREATE_QP_SQ_LVL_MASK
  50807. CMDQ_CREATE_QP_SQ_LVL_SFT
  50808. CMDQ_CREATE_QP_SQ_PG_SIZE_MASK
  50809. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_1G
  50810. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_2M
  50811. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K
  50812. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_64K
  50813. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8K
  50814. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8M
  50815. CMDQ_CREATE_QP_SQ_PG_SIZE_SFT
  50816. CMDQ_CREATE_QP_SQ_SGE_MASK
  50817. CMDQ_CREATE_QP_SQ_SGE_SFT
  50818. CMDQ_CREATE_QP_TYPE_GSI
  50819. CMDQ_CREATE_QP_TYPE_RAW_ETHERTYPE
  50820. CMDQ_CREATE_QP_TYPE_RC
  50821. CMDQ_CREATE_QP_TYPE_UD
  50822. CMDQ_CREATE_SRQ_EVENTQ_ID_MASK
  50823. CMDQ_CREATE_SRQ_EVENTQ_ID_SFT
  50824. CMDQ_CREATE_SRQ_LVL_LVL_0
  50825. CMDQ_CREATE_SRQ_LVL_LVL_1
  50826. CMDQ_CREATE_SRQ_LVL_LVL_2
  50827. CMDQ_CREATE_SRQ_LVL_MASK
  50828. CMDQ_CREATE_SRQ_LVL_SFT
  50829. CMDQ_CREATE_SRQ_OPCODE_CREATE_SRQ
  50830. CMDQ_CREATE_SRQ_PG_SIZE_MASK
  50831. CMDQ_CREATE_SRQ_PG_SIZE_PG_1G
  50832. CMDQ_CREATE_SRQ_PG_SIZE_PG_2M
  50833. CMDQ_CREATE_SRQ_PG_SIZE_PG_4K
  50834. CMDQ_CREATE_SRQ_PG_SIZE_PG_64K
  50835. CMDQ_CREATE_SRQ_PG_SIZE_PG_8K
  50836. CMDQ_CREATE_SRQ_PG_SIZE_PG_8M
  50837. CMDQ_CREATE_SRQ_PG_SIZE_SFT
  50838. CMDQ_CTRL
  50839. CMDQ_CURR_IRQ_STATUS
  50840. CMDQ_DB_ADDR
  50841. CMDQ_DB_OFF
  50842. CMDQ_DB_PI_OFF
  50843. CMDQ_DEALLOCATE_KEY_MRW_FLAGS_MASK
  50844. CMDQ_DEALLOCATE_KEY_MRW_FLAGS_MR
  50845. CMDQ_DEALLOCATE_KEY_MRW_FLAGS_MW_TYPE1
  50846. CMDQ_DEALLOCATE_KEY_MRW_FLAGS_MW_TYPE2A
  50847. CMDQ_DEALLOCATE_KEY_MRW_FLAGS_MW_TYPE2B
  50848. CMDQ_DEALLOCATE_KEY_MRW_FLAGS_PMR
  50849. CMDQ_DEALLOCATE_KEY_MRW_FLAGS_SFT
  50850. CMDQ_DEALLOCATE_KEY_OPCODE_DEALLOCATE_KEY
  50851. CMDQ_DEINITIALIZE_FW_OPCODE_DEINITIALIZE_FW
  50852. CMDQ_DELETE_GID_OPCODE_DELETE_GID
  50853. CMDQ_DEPTH
  50854. CMDQ_DEREGISTER_MR_OPCODE_DEREGISTER_MR
  50855. CMDQ_DESTROY_AH_OPCODE_DESTROY_AH
  50856. CMDQ_DESTROY_CQ_OPCODE_DESTROY_CQ
  50857. CMDQ_DESTROY_QP1_OPCODE_DESTROY_QP1
  50858. CMDQ_DESTROY_QP_OPCODE_DESTROY_QP
  50859. CMDQ_DESTROY_SRQ_OPCODE_DESTROY_SRQ
  50860. CMDQ_ENT_DWORDS
  50861. CMDQ_ENT_SZ_SHIFT
  50862. CMDQ_EOC_CMD
  50863. CMDQ_EOC_IRQ_EN
  50864. CMDQ_ERR_CERROR_ABT_IDX
  50865. CMDQ_ERR_CERROR_ATC_INV_IDX
  50866. CMDQ_ERR_CERROR_ILL_IDX
  50867. CMDQ_ERR_CERROR_NONE_IDX
  50868. CMDQ_EVENT_AMD_FRAME_DONE
  50869. CMDQ_EVENT_CAMSV0_PASS1_DONE
  50870. CMDQ_EVENT_CAMSV1_PASS1_DONE
  50871. CMDQ_EVENT_CAMSV2_PASS1_DONE
  50872. CMDQ_EVENT_DBI_EOF
  50873. CMDQ_EVENT_DISP_AAL0_EOF
  50874. CMDQ_EVENT_DISP_AAL0_SOF
  50875. CMDQ_EVENT_DISP_CCORR0_EOF
  50876. CMDQ_EVENT_DISP_CCORR0_SOF
  50877. CMDQ_EVENT_DISP_COLOR0_EOF
  50878. CMDQ_EVENT_DISP_COLOR0_SOF
  50879. CMDQ_EVENT_DISP_DBI_SOF
  50880. CMDQ_EVENT_DISP_DITHER0_EOF
  50881. CMDQ_EVENT_DISP_DITHER0_SOF
  50882. CMDQ_EVENT_DISP_DPI0_SOF
  50883. CMDQ_EVENT_DISP_DSI0_SOF
  50884. CMDQ_EVENT_DISP_GAMMA0_EOF
  50885. CMDQ_EVENT_DISP_GAMMA0_SOF
  50886. CMDQ_EVENT_DISP_OVL0_2L_EOF
  50887. CMDQ_EVENT_DISP_OVL0_2L_FRAME_RST_DONE_ULSE
  50888. CMDQ_EVENT_DISP_OVL0_2L_SOF
  50889. CMDQ_EVENT_DISP_OVL0_EOF
  50890. CMDQ_EVENT_DISP_OVL0_FRAME_RST_DONE_PULE
  50891. CMDQ_EVENT_DISP_OVL0_SOF
  50892. CMDQ_EVENT_DISP_OVL1_2L_EOF
  50893. CMDQ_EVENT_DISP_OVL1_2L_FRAME_RST_DONE_ULSE
  50894. CMDQ_EVENT_DISP_OVL1_2L_SOF
  50895. CMDQ_EVENT_DISP_OVL1_EOF
  50896. CMDQ_EVENT_DISP_OVL1_SOF
  50897. CMDQ_EVENT_DISP_PWM0_SOF
  50898. CMDQ_EVENT_DISP_RDMA0_BUF_UNDERRUN_EVEN
  50899. CMDQ_EVENT_DISP_RDMA0_EOF
  50900. CMDQ_EVENT_DISP_RDMA0_SOF
  50901. CMDQ_EVENT_DISP_RDMA0_UNDERRUN
  50902. CMDQ_EVENT_DISP_RDMA1_BUF_UNDERRUN_EVEN
  50903. CMDQ_EVENT_DISP_RDMA1_EOF
  50904. CMDQ_EVENT_DISP_RDMA1_SOF
  50905. CMDQ_EVENT_DISP_RDMA1_UNDERRUN
  50906. CMDQ_EVENT_DISP_RDMA2_EOF
  50907. CMDQ_EVENT_DISP_RDMA2_SOF
  50908. CMDQ_EVENT_DISP_RDMA2_UNDERRUN
  50909. CMDQ_EVENT_DISP_RSZ_EOF
  50910. CMDQ_EVENT_DISP_RSZ_SOF
  50911. CMDQ_EVENT_DISP_WDMA0_EOF
  50912. CMDQ_EVENT_DISP_WDMA0_SOF
  50913. CMDQ_EVENT_DISP_WDMA0_SW_RST_DONE
  50914. CMDQ_EVENT_DISP_WDMA1_EOF
  50915. CMDQ_EVENT_DISP_WDMA1_SOF
  50916. CMDQ_EVENT_DPI0_EOF
  50917. CMDQ_EVENT_DSI0_DONE_EVENT
  50918. CMDQ_EVENT_DSI0_EOF
  50919. CMDQ_EVENT_DSI0_IRQ_EVENT
  50920. CMDQ_EVENT_DSI0_TE_EVENT
  50921. CMDQ_EVENT_DVE_DONE
  50922. CMDQ_EVENT_IPU_CORE0_DONE0
  50923. CMDQ_EVENT_IPU_CORE0_DONE1
  50924. CMDQ_EVENT_IPU_CORE0_DONE2
  50925. CMDQ_EVENT_IPU_CORE0_DONE3
  50926. CMDQ_EVENT_IPU_CORE1_DONE0
  50927. CMDQ_EVENT_IPU_CORE1_DONE1
  50928. CMDQ_EVENT_IPU_CORE1_DONE2
  50929. CMDQ_EVENT_IPU_CORE1_DONE3
  50930. CMDQ_EVENT_ISP_FRAME_DONE_A
  50931. CMDQ_EVENT_ISP_FRAME_DONE_B
  50932. CMDQ_EVENT_ISP_FRAME_DONE_P2_0
  50933. CMDQ_EVENT_ISP_FRAME_DONE_P2_1
  50934. CMDQ_EVENT_ISP_FRAME_DONE_P2_10
  50935. CMDQ_EVENT_ISP_FRAME_DONE_P2_11
  50936. CMDQ_EVENT_ISP_FRAME_DONE_P2_12
  50937. CMDQ_EVENT_ISP_FRAME_DONE_P2_13
  50938. CMDQ_EVENT_ISP_FRAME_DONE_P2_14
  50939. CMDQ_EVENT_ISP_FRAME_DONE_P2_15
  50940. CMDQ_EVENT_ISP_FRAME_DONE_P2_16
  50941. CMDQ_EVENT_ISP_FRAME_DONE_P2_17
  50942. CMDQ_EVENT_ISP_FRAME_DONE_P2_18
  50943. CMDQ_EVENT_ISP_FRAME_DONE_P2_2
  50944. CMDQ_EVENT_ISP_FRAME_DONE_P2_3
  50945. CMDQ_EVENT_ISP_FRAME_DONE_P2_4
  50946. CMDQ_EVENT_ISP_FRAME_DONE_P2_5
  50947. CMDQ_EVENT_ISP_FRAME_DONE_P2_6
  50948. CMDQ_EVENT_ISP_FRAME_DONE_P2_7
  50949. CMDQ_EVENT_ISP_FRAME_DONE_P2_8
  50950. CMDQ_EVENT_ISP_FRAME_DONE_P2_9
  50951. CMDQ_EVENT_JPG_DEC_CMDQ_DONE
  50952. CMDQ_EVENT_JPG_ENC_CMDQ_DONE
  50953. CMDQ_EVENT_MDP_AAL_EOF
  50954. CMDQ_EVENT_MDP_AAL_SOF
  50955. CMDQ_EVENT_MDP_CCORR_EOF
  50956. CMDQ_EVENT_MDP_CCORR_SOF
  50957. CMDQ_EVENT_MDP_RDMA0_EOF
  50958. CMDQ_EVENT_MDP_RDMA0_SOF
  50959. CMDQ_EVENT_MDP_RDMA0_SW_RST_DONE
  50960. CMDQ_EVENT_MDP_RSZ0_EOF
  50961. CMDQ_EVENT_MDP_RSZ0_SOF
  50962. CMDQ_EVENT_MDP_RSZ1_EOF
  50963. CMDQ_EVENT_MDP_RSZ1_SOF
  50964. CMDQ_EVENT_MDP_TDSHP_EOF
  50965. CMDQ_EVENT_MDP_TDSHP_SOF
  50966. CMDQ_EVENT_MDP_WDMA0_EOF
  50967. CMDQ_EVENT_MDP_WDMA0_SOF
  50968. CMDQ_EVENT_MDP_WDMA_SW_RST_DONE
  50969. CMDQ_EVENT_MDP_WROT0_EOF
  50970. CMDQ_EVENT_MDP_WROT0_SOF
  50971. CMDQ_EVENT_MDP_WROT0_SW_RST_DONE
  50972. CMDQ_EVENT_MFB_DONE
  50973. CMDQ_EVENT_MUTEX0_STREAM_EOF
  50974. CMDQ_EVENT_MUTEX1_STREAM_EOF
  50975. CMDQ_EVENT_MUTEX2_STREAM_EOF
  50976. CMDQ_EVENT_MUTEX3_STREAM_EOF
  50977. CMDQ_EVENT_MUTEX4_STREAM_EOF
  50978. CMDQ_EVENT_MUTEX_STREAM_DONE0
  50979. CMDQ_EVENT_MUTEX_STREAM_DONE1
  50980. CMDQ_EVENT_MUTEX_STREAM_DONE10
  50981. CMDQ_EVENT_MUTEX_STREAM_DONE11
  50982. CMDQ_EVENT_MUTEX_STREAM_DONE2
  50983. CMDQ_EVENT_MUTEX_STREAM_DONE3
  50984. CMDQ_EVENT_MUTEX_STREAM_DONE4
  50985. CMDQ_EVENT_MUTEX_STREAM_DONE5
  50986. CMDQ_EVENT_MUTEX_STREAM_DONE6
  50987. CMDQ_EVENT_MUTEX_STREAM_DONE7
  50988. CMDQ_EVENT_MUTEX_STREAM_DONE8
  50989. CMDQ_EVENT_MUTEX_STREAM_DONE9
  50990. CMDQ_EVENT_OCC_DONE
  50991. CMDQ_EVENT_RSC_DONE
  50992. CMDQ_EVENT_SENINF_CAM0_FIFO_FULL
  50993. CMDQ_EVENT_SENINF_CAM1_FIFO_FULL
  50994. CMDQ_EVENT_SENINF_CAM2_FIFO_FULL
  50995. CMDQ_EVENT_SENINF_CAM3_FIFO_FULL
  50996. CMDQ_EVENT_SENINF_CAM4_FIFO_FULL
  50997. CMDQ_EVENT_SENINF_CAM5_FIFO_FULL
  50998. CMDQ_EVENT_SENINF_CAM6_FIFO_FULL
  50999. CMDQ_EVENT_SENINF_CAM7_FIFO_FULL
  51000. CMDQ_EVENT_SPE_B_DONE
  51001. CMDQ_EVENT_TSF_DONE
  51002. CMDQ_EVENT_VENC_CMDQ_128BYTE_DONE
  51003. CMDQ_EVENT_VENC_CMDQ_FRAME_DONE
  51004. CMDQ_EVENT_VENC_CMDQ_MB_DONE
  51005. CMDQ_EVENT_WMFE_DONE
  51006. CMDQ_EVENT_WPE_A_DONE
  51007. CMDQ_E_DB_READY
  51008. CMDQ_E_FAIL
  51009. CMDQ_E_INIT_RESP
  51010. CMDQ_E_POST
  51011. CMDQ_E_START
  51012. CMDQ_E_STOP
  51013. CMDQ_INITIALIZE_FW_CQ_LVL_LVL_0
  51014. CMDQ_INITIALIZE_FW_CQ_LVL_LVL_1
  51015. CMDQ_INITIALIZE_FW_CQ_LVL_LVL_2
  51016. CMDQ_INITIALIZE_FW_CQ_LVL_MASK
  51017. CMDQ_INITIALIZE_FW_CQ_LVL_SFT
  51018. CMDQ_INITIALIZE_FW_CQ_PG_SIZE_MASK
  51019. CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_1G
  51020. CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_2M
  51021. CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_4K
  51022. CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_64K
  51023. CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_8K
  51024. CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_8M
  51025. CMDQ_INITIALIZE_FW_CQ_PG_SIZE_SFT
  51026. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_LAST
  51027. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_MASK
  51028. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_128K
  51029. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_128M
  51030. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_16K
  51031. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_16M
  51032. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_1M
  51033. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_256K
  51034. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_2M
  51035. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_32K
  51036. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_32M
  51037. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_4K
  51038. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_4M
  51039. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_512K
  51040. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_64K
  51041. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_64M
  51042. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_8K
  51043. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_8M
  51044. CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_SFT
  51045. CMDQ_INITIALIZE_FW_MRW_LVL_LVL_0
  51046. CMDQ_INITIALIZE_FW_MRW_LVL_LVL_1
  51047. CMDQ_INITIALIZE_FW_MRW_LVL_LVL_2
  51048. CMDQ_INITIALIZE_FW_MRW_LVL_MASK
  51049. CMDQ_INITIALIZE_FW_MRW_LVL_SFT
  51050. CMDQ_INITIALIZE_FW_MRW_PG_SIZE_MASK
  51051. CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_1G
  51052. CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_2M
  51053. CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_4K
  51054. CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_64K
  51055. CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_8K
  51056. CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_8M
  51057. CMDQ_INITIALIZE_FW_MRW_PG_SIZE_SFT
  51058. CMDQ_INITIALIZE_FW_OPCODE_INITIALIZE_FW
  51059. CMDQ_INITIALIZE_FW_QPC_LVL_LVL_0
  51060. CMDQ_INITIALIZE_FW_QPC_LVL_LVL_1
  51061. CMDQ_INITIALIZE_FW_QPC_LVL_LVL_2
  51062. CMDQ_INITIALIZE_FW_QPC_LVL_MASK
  51063. CMDQ_INITIALIZE_FW_QPC_LVL_SFT
  51064. CMDQ_INITIALIZE_FW_QPC_PG_SIZE_MASK
  51065. CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_1G
  51066. CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_2M
  51067. CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_4K
  51068. CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_64K
  51069. CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_8K
  51070. CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_8M
  51071. CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT
  51072. CMDQ_INITIALIZE_FW_SRQ_LVL_LVL_0
  51073. CMDQ_INITIALIZE_FW_SRQ_LVL_LVL_1
  51074. CMDQ_INITIALIZE_FW_SRQ_LVL_LVL_2
  51075. CMDQ_INITIALIZE_FW_SRQ_LVL_MASK
  51076. CMDQ_INITIALIZE_FW_SRQ_LVL_SFT
  51077. CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_MASK
  51078. CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_1G
  51079. CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_2M
  51080. CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_4K
  51081. CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_64K
  51082. CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_8K
  51083. CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_8M
  51084. CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_SFT
  51085. CMDQ_INITIALIZE_FW_TIM_LVL_LVL_0
  51086. CMDQ_INITIALIZE_FW_TIM_LVL_LVL_1
  51087. CMDQ_INITIALIZE_FW_TIM_LVL_LVL_2
  51088. CMDQ_INITIALIZE_FW_TIM_LVL_MASK
  51089. CMDQ_INITIALIZE_FW_TIM_LVL_SFT
  51090. CMDQ_INITIALIZE_FW_TIM_PG_SIZE_MASK
  51091. CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_1G
  51092. CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_2M
  51093. CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_4K
  51094. CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_64K
  51095. CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_8K
  51096. CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_8M
  51097. CMDQ_INITIALIZE_FW_TIM_PG_SIZE_SFT
  51098. CMDQ_INITIALIZE_FW_TQM_LVL_LVL_0
  51099. CMDQ_INITIALIZE_FW_TQM_LVL_LVL_1
  51100. CMDQ_INITIALIZE_FW_TQM_LVL_LVL_2
  51101. CMDQ_INITIALIZE_FW_TQM_LVL_MASK
  51102. CMDQ_INITIALIZE_FW_TQM_LVL_SFT
  51103. CMDQ_INITIALIZE_FW_TQM_PG_SIZE_MASK
  51104. CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_1G
  51105. CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_2M
  51106. CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_4K
  51107. CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_64K
  51108. CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_8K
  51109. CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_8M
  51110. CMDQ_INITIALIZE_FW_TQM_PG_SIZE_SFT
  51111. CMDQ_INIT_CMDQ_LVL_MASK
  51112. CMDQ_INIT_CMDQ_LVL_SFT
  51113. CMDQ_INIT_CMDQ_SIZE_MASK
  51114. CMDQ_INIT_CMDQ_SIZE_SFT
  51115. CMDQ_INST_SIZE
  51116. CMDQ_JUMP_BY_OFFSET
  51117. CMDQ_JUMP_BY_PA
  51118. CMDQ_JUMP_PASS
  51119. CMDQ_MAP_TC_TO_COS_COS0_NO_CHANGE
  51120. CMDQ_MAP_TC_TO_COS_COS1_DISABLE
  51121. CMDQ_MAP_TC_TO_COS_COS1_NO_CHANGE
  51122. CMDQ_MAP_TC_TO_COS_OPCODE_MAP_TC_TO_COS
  51123. CMDQ_MAX_EVENT
  51124. CMDQ_MAX_SZ_SHIFT
  51125. CMDQ_MME_ENABLE
  51126. CMDQ_MME_ERR_MSG_EN
  51127. CMDQ_MME_ERR_PROT
  51128. CMDQ_MME_STOP
  51129. CMDQ_MODIFY_GID_OPCODE_MODIFY_GID
  51130. CMDQ_MODIFY_GID_STATS_CTX_STATS_CTX_ID_MASK
  51131. CMDQ_MODIFY_GID_STATS_CTX_STATS_CTX_ID_SFT
  51132. CMDQ_MODIFY_GID_STATS_CTX_STATS_CTX_VALID
  51133. CMDQ_MODIFY_GID_VLAN_TPID_LAST
  51134. CMDQ_MODIFY_GID_VLAN_TPID_MASK
  51135. CMDQ_MODIFY_GID_VLAN_TPID_SFT
  51136. CMDQ_MODIFY_GID_VLAN_TPID_TPID_8100
  51137. CMDQ_MODIFY_GID_VLAN_TPID_TPID_88A8
  51138. CMDQ_MODIFY_GID_VLAN_TPID_TPID_9100
  51139. CMDQ_MODIFY_GID_VLAN_TPID_TPID_9200
  51140. CMDQ_MODIFY_GID_VLAN_TPID_TPID_9300
  51141. CMDQ_MODIFY_GID_VLAN_TPID_TPID_CFG1
  51142. CMDQ_MODIFY_GID_VLAN_TPID_TPID_CFG2
  51143. CMDQ_MODIFY_GID_VLAN_TPID_TPID_CFG3
  51144. CMDQ_MODIFY_GID_VLAN_VLAN_EN
  51145. CMDQ_MODIFY_GID_VLAN_VLAN_ID_MASK
  51146. CMDQ_MODIFY_GID_VLAN_VLAN_ID_SFT
  51147. CMDQ_MODIFY_QP_ACCESS_LOCAL_WRITE
  51148. CMDQ_MODIFY_QP_ACCESS_REMOTE_ATOMIC
  51149. CMDQ_MODIFY_QP_ACCESS_REMOTE_READ
  51150. CMDQ_MODIFY_QP_ACCESS_REMOTE_WRITE
  51151. CMDQ_MODIFY_QP_ENABLE_CC
  51152. CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY
  51153. CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS
  51154. CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC
  51155. CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID
  51156. CMDQ_MODIFY_QP_MODIFY_MASK_DGID
  51157. CMDQ_MODIFY_QP_MODIFY_MASK_ENABLE_CC
  51158. CMDQ_MODIFY_QP_MODIFY_MASK_EN_SQD_ASYNC_NOTIFY
  51159. CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL
  51160. CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT
  51161. CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC
  51162. CMDQ_MODIFY_QP_MODIFY_MASK_MAX_INLINE_DATA
  51163. CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC
  51164. CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER
  51165. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU
  51166. CMDQ_MODIFY_QP_MODIFY_MASK_PKEY
  51167. CMDQ_MODIFY_QP_MODIFY_MASK_QKEY
  51168. CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT
  51169. CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY
  51170. CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN
  51171. CMDQ_MODIFY_QP_MODIFY_MASK_RQ_SGE
  51172. CMDQ_MODIFY_QP_MODIFY_MASK_RQ_SIZE
  51173. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX
  51174. CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN
  51175. CMDQ_MODIFY_QP_MODIFY_MASK_SQ_SGE
  51176. CMDQ_MODIFY_QP_MODIFY_MASK_SQ_SIZE
  51177. CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC
  51178. CMDQ_MODIFY_QP_MODIFY_MASK_STATE
  51179. CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT
  51180. CMDQ_MODIFY_QP_MODIFY_MASK_TOS_DSCP
  51181. CMDQ_MODIFY_QP_MODIFY_MASK_TOS_ECN
  51182. CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS
  51183. CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID
  51184. CMDQ_MODIFY_QP_NETWORK_TYPE_MASK
  51185. CMDQ_MODIFY_QP_NETWORK_TYPE_ROCEV1
  51186. CMDQ_MODIFY_QP_NETWORK_TYPE_ROCEV2_IPV4
  51187. CMDQ_MODIFY_QP_NETWORK_TYPE_ROCEV2_IPV6
  51188. CMDQ_MODIFY_QP_NETWORK_TYPE_SFT
  51189. CMDQ_MODIFY_QP_NEW_STATE_ERR
  51190. CMDQ_MODIFY_QP_NEW_STATE_INIT
  51191. CMDQ_MODIFY_QP_NEW_STATE_MASK
  51192. CMDQ_MODIFY_QP_NEW_STATE_RESET
  51193. CMDQ_MODIFY_QP_NEW_STATE_RTR
  51194. CMDQ_MODIFY_QP_NEW_STATE_RTS
  51195. CMDQ_MODIFY_QP_NEW_STATE_SFT
  51196. CMDQ_MODIFY_QP_NEW_STATE_SQD
  51197. CMDQ_MODIFY_QP_NEW_STATE_SQE
  51198. CMDQ_MODIFY_QP_OPCODE_MODIFY_QP
  51199. CMDQ_MODIFY_QP_PATH_MTU_MASK
  51200. CMDQ_MODIFY_QP_PATH_MTU_MTU_1024
  51201. CMDQ_MODIFY_QP_PATH_MTU_MTU_2048
  51202. CMDQ_MODIFY_QP_PATH_MTU_MTU_256
  51203. CMDQ_MODIFY_QP_PATH_MTU_MTU_4096
  51204. CMDQ_MODIFY_QP_PATH_MTU_MTU_512
  51205. CMDQ_MODIFY_QP_PATH_MTU_MTU_8192
  51206. CMDQ_MODIFY_QP_PATH_MTU_SFT
  51207. CMDQ_MODIFY_QP_TOS_DSCP_MASK
  51208. CMDQ_MODIFY_QP_TOS_DSCP_SFT
  51209. CMDQ_MODIFY_QP_TOS_ECN_MASK
  51210. CMDQ_MODIFY_QP_TOS_ECN_SFT
  51211. CMDQ_MODIFY_QP_VLAN_DEI
  51212. CMDQ_MODIFY_QP_VLAN_ID_MASK
  51213. CMDQ_MODIFY_QP_VLAN_ID_SFT
  51214. CMDQ_MODIFY_QP_VLAN_PCP_MASK
  51215. CMDQ_MODIFY_QP_VLAN_PCP_SFT
  51216. CMDQ_NO_TIMEOUT
  51217. CMDQ_NUM_CMD
  51218. CMDQ_OP_ATC_INV
  51219. CMDQ_OP_CFGI_ALL
  51220. CMDQ_OP_CFGI_STE
  51221. CMDQ_OP_CMD_SYNC
  51222. CMDQ_OP_CODE_MASK
  51223. CMDQ_OP_CODE_SHIFT
  51224. CMDQ_OP_PREFETCH_CFG
  51225. CMDQ_OP_PRI_RESP
  51226. CMDQ_OP_TLBI_EL2_ALL
  51227. CMDQ_OP_TLBI_NH_ASID
  51228. CMDQ_OP_TLBI_NH_VA
  51229. CMDQ_OP_TLBI_NSNH_ALL
  51230. CMDQ_OP_TLBI_S12_VMALL
  51231. CMDQ_OP_TLBI_S2_IPA
  51232. CMDQ_PAGE_SIZE
  51233. CMDQ_PFN
  51234. CMDQ_PREFETCH_0_SID
  51235. CMDQ_PREFETCH_1_ADDR_MASK
  51236. CMDQ_PREFETCH_1_SIZE
  51237. CMDQ_PRI_0_SID
  51238. CMDQ_PRI_0_SSID
  51239. CMDQ_PRI_1_GRPID
  51240. CMDQ_PRI_1_RESP
  51241. CMDQ_PROD_OWNED_FLAG
  51242. CMDQ_QUERY_FUNC_OPCODE_QUERY_FUNC
  51243. CMDQ_QUERY_GID_OPCODE_QUERY_GID
  51244. CMDQ_QUERY_QP_OPCODE_QUERY_QP
  51245. CMDQ_QUERY_ROCE_STATS_OPCODE_LAST
  51246. CMDQ_QUERY_ROCE_STATS_OPCODE_QUERY_ROCE_STATS
  51247. CMDQ_QUERY_SRQ_OPCODE_QUERY_SRQ
  51248. CMDQ_QUERY_VERSION_OPCODE_QUERY_VERSION
  51249. CMDQ_READ_CONTEXT_OPCODE_READ_CONTEXT
  51250. CMDQ_READ_CONTEXT_TYPE_CQ
  51251. CMDQ_READ_CONTEXT_TYPE_MASK
  51252. CMDQ_READ_CONTEXT_TYPE_MRW
  51253. CMDQ_READ_CONTEXT_TYPE_QPC
  51254. CMDQ_READ_CONTEXT_TYPE_SFT
  51255. CMDQ_READ_CONTEXT_TYPE_SRQ
  51256. CMDQ_READ_CONTEXT_XID_MASK
  51257. CMDQ_READ_CONTEXT_XID_SFT
  51258. CMDQ_REGISTER_MR_ACCESS_LOCAL_WRITE
  51259. CMDQ_REGISTER_MR_ACCESS_MW_BIND
  51260. CMDQ_REGISTER_MR_ACCESS_REMOTE_ATOMIC
  51261. CMDQ_REGISTER_MR_ACCESS_REMOTE_READ
  51262. CMDQ_REGISTER_MR_ACCESS_REMOTE_WRITE
  51263. CMDQ_REGISTER_MR_ACCESS_ZERO_BASED
  51264. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_LAST
  51265. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_MASK
  51266. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_1G
  51267. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_1M
  51268. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_256K
  51269. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_2M
  51270. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_4K
  51271. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_4M
  51272. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_64K
  51273. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_8K
  51274. CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_SFT
  51275. CMDQ_REGISTER_MR_LOG2_PG_SIZE_LAST
  51276. CMDQ_REGISTER_MR_LOG2_PG_SIZE_MASK
  51277. CMDQ_REGISTER_MR_LOG2_PG_SIZE_PG_1G
  51278. CMDQ_REGISTER_MR_LOG2_PG_SIZE_PG_1M
  51279. CMDQ_REGISTER_MR_LOG2_PG_SIZE_PG_256K
  51280. CMDQ_REGISTER_MR_LOG2_PG_SIZE_PG_2M
  51281. CMDQ_REGISTER_MR_LOG2_PG_SIZE_PG_4K
  51282. CMDQ_REGISTER_MR_LOG2_PG_SIZE_PG_4M
  51283. CMDQ_REGISTER_MR_LOG2_PG_SIZE_PG_64K
  51284. CMDQ_REGISTER_MR_LOG2_PG_SIZE_PG_8K
  51285. CMDQ_REGISTER_MR_LOG2_PG_SIZE_SFT
  51286. CMDQ_REGISTER_MR_LVL_LAST
  51287. CMDQ_REGISTER_MR_LVL_LVL_0
  51288. CMDQ_REGISTER_MR_LVL_LVL_1
  51289. CMDQ_REGISTER_MR_LVL_LVL_2
  51290. CMDQ_REGISTER_MR_LVL_MASK
  51291. CMDQ_REGISTER_MR_LVL_SFT
  51292. CMDQ_REGISTER_MR_OPCODE_REGISTER_MR
  51293. CMDQ_REGISTER_MR_UNUSED1
  51294. CMDQ_REGISTER_MR_UNUSED11_MASK
  51295. CMDQ_REGISTER_MR_UNUSED11_SFT
  51296. CMDQ_RESIZE_CQ_LVL_LVL_0
  51297. CMDQ_RESIZE_CQ_LVL_LVL_1
  51298. CMDQ_RESIZE_CQ_LVL_LVL_2
  51299. CMDQ_RESIZE_CQ_LVL_MASK
  51300. CMDQ_RESIZE_CQ_LVL_SFT
  51301. CMDQ_RESIZE_CQ_NEW_CQ_SIZE_MASK
  51302. CMDQ_RESIZE_CQ_NEW_CQ_SIZE_SFT
  51303. CMDQ_RESIZE_CQ_OPCODE_RESIZE_CQ
  51304. CMDQ_RESIZE_CQ_PG_SIZE_MASK
  51305. CMDQ_RESIZE_CQ_PG_SIZE_PG_1G
  51306. CMDQ_RESIZE_CQ_PG_SIZE_PG_2M
  51307. CMDQ_RESIZE_CQ_PG_SIZE_PG_4K
  51308. CMDQ_RESIZE_CQ_PG_SIZE_PG_64K
  51309. CMDQ_RESIZE_CQ_PG_SIZE_PG_8K
  51310. CMDQ_RESIZE_CQ_PG_SIZE_PG_8M
  51311. CMDQ_RESIZE_CQ_PG_SIZE_SFT
  51312. CMDQ_SET_ARM_CMD
  51313. CMDQ_SET_FUNC_RESOURCES_OPCODE_SET_FUNC_RESOURCES
  51314. CMDQ_SIZE
  51315. CMDQ_STAT_LAST_PKT_DB
  51316. CMDQ_STAT_RUNNING
  51317. CMDQ_STOP_FUNC_OPCODE_STOP_FUNC
  51318. CMDQ_SUBSYS_SHIFT
  51319. CMDQ_SYNC_0_CS
  51320. CMDQ_SYNC_0_CS_IRQ
  51321. CMDQ_SYNC_0_CS_NONE
  51322. CMDQ_SYNC_0_CS_SEV
  51323. CMDQ_SYNC_0_MSH
  51324. CMDQ_SYNC_0_MSIATTR
  51325. CMDQ_SYNC_0_MSIDATA
  51326. CMDQ_SYNC_1_MSIADDR_MASK
  51327. CMDQ_SYNC_TOKEN_UPDATE
  51328. CMDQ_THR_ACTIVE_SLOT_CYCLES
  51329. CMDQ_THR_BASE
  51330. CMDQ_THR_CURR_ADDR
  51331. CMDQ_THR_CURR_STATUS
  51332. CMDQ_THR_DISABLED
  51333. CMDQ_THR_DO_WARM_RESET
  51334. CMDQ_THR_ENABLED
  51335. CMDQ_THR_ENABLE_TASK
  51336. CMDQ_THR_END_ADDR
  51337. CMDQ_THR_IRQ_DONE
  51338. CMDQ_THR_IRQ_EN
  51339. CMDQ_THR_IRQ_ENABLE
  51340. CMDQ_THR_IRQ_ERROR
  51341. CMDQ_THR_IRQ_STATUS
  51342. CMDQ_THR_IS_WAITING
  51343. CMDQ_THR_PRIORITY
  51344. CMDQ_THR_PRIO_HIGHEST
  51345. CMDQ_THR_PRIO_LOWEST
  51346. CMDQ_THR_RESUME
  51347. CMDQ_THR_SIZE
  51348. CMDQ_THR_SLOT_CYCLES
  51349. CMDQ_THR_STATUS_SUSPENDED
  51350. CMDQ_THR_SUSPEND
  51351. CMDQ_THR_SUSPEND_TASK
  51352. CMDQ_THR_WAIT_TOKEN
  51353. CMDQ_THR_WARM_RESET
  51354. CMDQ_TIMEOUT
  51355. CMDQ_TLBI_0_ASID
  51356. CMDQ_TLBI_0_VMID
  51357. CMDQ_TLBI_1_IPA_MASK
  51358. CMDQ_TLBI_1_LEAF
  51359. CMDQ_TLBI_1_VA_MASK
  51360. CMDQ_TPC_ENABLE
  51361. CMDQ_TPC_ERR_MSG_EN
  51362. CMDQ_TPC_ERR_PROT
  51363. CMDQ_TPC_STOP
  51364. CMDQ_WFE_UPDATE
  51365. CMDQ_WFE_WAIT
  51366. CMDQ_WFE_WAIT_VALUE
  51367. CMDQ_WQEBB_SIZE
  51368. CMDQ_WQE_COMPLETED
  51369. CMDQ_WQE_ERRCODE_GET
  51370. CMDQ_WQE_ERRCODE_VAL_MASK
  51371. CMDQ_WQE_ERRCODE_VAL_SHIFT
  51372. CMDQ_WQE_HEADER
  51373. CMDQ_WQE_SIZE
  51374. CMDQ_WQ_MAX_PAGES
  51375. CMDQ_WQ_PAGE_SIZE
  51376. CMDQ_WRITE_ENABLE_MASK
  51377. CMDR
  51378. CMDR0
  51379. CMDR1
  51380. CMDR2
  51381. CMDR3
  51382. CMDREG_DAIE
  51383. CMDREG_ENABLE
  51384. CMDREG_FRIE
  51385. CMDREG_HC
  51386. CMDREG_ID
  51387. CMDREG_OWN
  51388. CMDREG_RS
  51389. CMDREG_SR
  51390. CMDREG_SW
  51391. CMDREQ_TIMEOUT
  51392. CMDRET_ZERO
  51393. CMDRWGEN
  51394. CMDR_CMDID
  51395. CMDR_CMDID_HJACK_DISEC
  51396. CMDR_CMDID_HJACK_ENTDAA
  51397. CMDR_DDR_DROPPED
  51398. CMDR_DDR_PARITY_ERROR
  51399. CMDR_DDR_PREAMBLE_ERROR
  51400. CMDR_DDR_RX_FIFO_OVF
  51401. CMDR_DDR_TX_FIFO_UNF
  51402. CMDR_ERROR
  51403. CMDR_INVALID_DA
  51404. CMDR_M0_ERROR
  51405. CMDR_M1_ERROR
  51406. CMDR_M2_ERROR
  51407. CMDR_MST_ABORT
  51408. CMDR_NACK_RESP
  51409. CMDR_NO_ERROR
  51410. CMDR_OFF
  51411. CMDR_SIZE
  51412. CMDR_THR
  51413. CMDR_XFER_BYTES
  51414. CMDS
  51415. CMDSN_ERROR_CANNOT_RECOVER
  51416. CMDSN_HIGHER_THAN_EXP
  51417. CMDSN_LOWER_THAN_EXP
  51418. CMDSN_MAXCMDSN_OVERRUN
  51419. CMDSN_NORMAL_OPERATION
  51420. CMDSTREAM_XML
  51421. CMDSTS
  51422. CMDSTS_DEST_MASK
  51423. CMDSTS_DEST_MULTI
  51424. CMDSTS_DEST_SELF
  51425. CMDSTS_ERR
  51426. CMDSTS_INTR
  51427. CMDSTS_LEN_MASK
  51428. CMDSTS_MORE
  51429. CMDSTS_OK
  51430. CMDSTS_OWN
  51431. CMDSTS_RUNT
  51432. CMDTIM
  51433. CMDT_INIT
  51434. CMDT_RSP_ACK
  51435. CMDT_RSP_BUSY
  51436. CMDT_RSP_NAK
  51437. CMDVAL
  51438. CMD_00_INFO_DEBUG
  51439. CMD_01_GET_SYS_CFG
  51440. CMD_02_SET_GRANULARITY
  51441. CMD_03_SET_TIMER_IRQ
  51442. CMD_04_GET_EVENT
  51443. CMD_05_GET_PIPES
  51444. CMD_06_ALLOCATE_PIPE
  51445. CMD_07_RELEASE_PIPE
  51446. CMD_08_ASK_BUFFERS
  51447. CMD_09_STOP_PIPE
  51448. CMD_0A_GET_PIPE_SPL_COUNT
  51449. CMD_0B_TOGGLE_PIPE_STATE
  51450. CMD_0C_DEF_STREAM
  51451. CMD_0D_SET_MUTE
  51452. CMD_0E_GET_STREAM_SPL_COUNT
  51453. CMD_0F_UPDATE_BUFFER
  51454. CMD_10_GET_BUFFER
  51455. CMD_11_CANCEL_BUFFER
  51456. CMD_12_GET_PEAK
  51457. CMD_13_SET_STREAM_STATE
  51458. CMD_14_INVALID
  51459. CMD_2255
  51460. CMD_2ERR_QPEE
  51461. CMD_802_11D_DOMAIN_INFO
  51462. CMD_802_11_AD_HOC_JOIN
  51463. CMD_802_11_AD_HOC_START
  51464. CMD_802_11_AD_HOC_STOP
  51465. CMD_802_11_ASSOCIATE
  51466. CMD_802_11_AUTHENTICATE
  51467. CMD_802_11_BAND_CONFIG
  51468. CMD_802_11_BEACON_CTRL
  51469. CMD_802_11_BEACON_SET
  51470. CMD_802_11_BEACON_STOP
  51471. CMD_802_11_DATA_RATE
  51472. CMD_802_11_DEAUTHENTICATE
  51473. CMD_802_11_DEEP_SLEEP
  51474. CMD_802_11_EEPROM_ACCESS
  51475. CMD_802_11_ENABLE_RSN
  51476. CMD_802_11_FW_WAKE_METHOD
  51477. CMD_802_11_GET_AFC
  51478. CMD_802_11_GET_LOG
  51479. CMD_802_11_GET_STAT
  51480. CMD_802_11_HOST_SLEEP_ACTIVATE
  51481. CMD_802_11_HOST_SLEEP_CFG
  51482. CMD_802_11_INACTIVITY_TIMEOUT
  51483. CMD_802_11_KEY_MATERIAL
  51484. CMD_802_11_LED_GPIO_CTRL
  51485. CMD_802_11_MAC_ADDRESS
  51486. CMD_802_11_MONITOR_MODE
  51487. CMD_802_11_PA_CFG
  51488. CMD_802_11_PS_MODE
  51489. CMD_802_11_QUERY_TKIP_REPLY_CNTRS
  51490. CMD_802_11_RADIO_CONTROL
  51491. CMD_802_11_RATE_ADAPT_RATESET
  51492. CMD_802_11_REASSOCIATE
  51493. CMD_802_11_RESET
  51494. CMD_802_11_RF_ANTENNA
  51495. CMD_802_11_RF_CHANNEL
  51496. CMD_802_11_RF_TX_POWER
  51497. CMD_802_11_RSSI
  51498. CMD_802_11_SCAN
  51499. CMD_802_11_SET_AFC
  51500. CMD_802_11_SET_BSSID
  51501. CMD_802_11_SET_MODE
  51502. CMD_802_11_SET_WEP
  51503. CMD_802_11_SLEEP_PARAMS
  51504. CMD_802_11_SLEEP_PERIOD
  51505. CMD_802_11_SNMP_MIB
  51506. CMD_802_11_SUBSCRIBE_EVENT
  51507. CMD_802_11_TPC_CFG
  51508. CMD_802_11_TX_RATE_QUERY
  51509. CMD_802_11_WAKEUP_CONFIRM
  51510. CMD_802_3_GET_STAT
  51511. CMD_A
  51512. CMD_ABORTED
  51513. CMD_ABORT_CONF_PIPE
  51514. CMD_ABORT_DMA
  51515. CMD_ABORT_FAILED
  51516. CMD_ABORT_MXRI64_CN
  51517. CMD_ABORT_XRI_CN
  51518. CMD_ABORT_XRI_CX
  51519. CMD_ABORT_XRI_WQE
  51520. CMD_ABTS_STATUS
  51521. CMD_ACCEPT_MSG
  51522. CMD_ACCESS
  51523. CMD_ACCESS_DDR
  51524. CMD_ACCESS_IO_FCT
  51525. CMD_ACCESS_IO_READ
  51526. CMD_ACCESS_IO_WRITE
  51527. CMD_ACK
  51528. CMD_ACKINTBUFWIN
  51529. CMD_ACKINTDMA
  51530. CMD_ACKINTRX
  51531. CMD_ACKINTTX
  51532. CMD_ACQUIRE
  51533. CMD_ACTION_READ_ALL
  51534. CMD_ACTION_SIZE_BUFFER
  51535. CMD_ACT_ACTION_NONE
  51536. CMD_ACT_ADD
  51537. CMD_ACT_BT_ACCESS_ADD
  51538. CMD_ACT_BT_ACCESS_DEL
  51539. CMD_ACT_BT_ACCESS_GET_INVERT
  51540. CMD_ACT_BT_ACCESS_LIST
  51541. CMD_ACT_BT_ACCESS_RESET
  51542. CMD_ACT_BT_ACCESS_SET_INVERT
  51543. CMD_ACT_FWT_ACCESS_ADD
  51544. CMD_ACT_FWT_ACCESS_CLEANUP
  51545. CMD_ACT_FWT_ACCESS_DEL
  51546. CMD_ACT_FWT_ACCESS_LIST
  51547. CMD_ACT_FWT_ACCESS_LIST_NEIGHBOR
  51548. CMD_ACT_FWT_ACCESS_LIST_ROUTE
  51549. CMD_ACT_FWT_ACCESS_LOOKUP
  51550. CMD_ACT_FWT_ACCESS_RESET
  51551. CMD_ACT_FWT_ACCESS_TIME
  51552. CMD_ACT_GET
  51553. CMD_ACT_GET_TX_RATE
  51554. CMD_ACT_GET_WOL_RULE
  51555. CMD_ACT_HALT
  51556. CMD_ACT_MAC_ALL_MULTICAST_ENABLE
  51557. CMD_ACT_MAC_BROADCAST_ENABLE
  51558. CMD_ACT_MAC_INT_ENABLE
  51559. CMD_ACT_MAC_LOOPBACK_ON
  51560. CMD_ACT_MAC_MULTICAST_ENABLE
  51561. CMD_ACT_MAC_PROMISCUOUS_ENABLE
  51562. CMD_ACT_MAC_RX_ON
  51563. CMD_ACT_MAC_STRICT_PROTECTION_ENABLE
  51564. CMD_ACT_MAC_TX_ON
  51565. CMD_ACT_MAC_WEP_ENABLE
  51566. CMD_ACT_MESH_CONFIG_GET
  51567. CMD_ACT_MESH_CONFIG_SET
  51568. CMD_ACT_MESH_CONFIG_START
  51569. CMD_ACT_MESH_CONFIG_STOP
  51570. CMD_ACT_MESH_GET_ANYCAST
  51571. CMD_ACT_MESH_GET_AUTOSTART_ENABLED
  51572. CMD_ACT_MESH_GET_BCAST_RATE
  51573. CMD_ACT_MESH_GET_LINK_COSTS
  51574. CMD_ACT_MESH_GET_ROUTE_EXP
  51575. CMD_ACT_MESH_GET_RREQ_DELAY
  51576. CMD_ACT_MESH_GET_STATS
  51577. CMD_ACT_MESH_GET_TTL
  51578. CMD_ACT_MESH_SET_ANYCAST
  51579. CMD_ACT_MESH_SET_AUTOSTART_ENABLED
  51580. CMD_ACT_MESH_SET_BCAST_RATE
  51581. CMD_ACT_MESH_SET_GET_PRB_RSP_LIMIT
  51582. CMD_ACT_MESH_SET_LINK_COSTS
  51583. CMD_ACT_MESH_SET_ROUTE_EXP
  51584. CMD_ACT_MESH_SET_RREQ_DELAY
  51585. CMD_ACT_MESH_SET_TTL
  51586. CMD_ACT_REMOVE
  51587. CMD_ACT_RESET_WOL_RULE
  51588. CMD_ACT_SET
  51589. CMD_ACT_SET_TX_AUTO
  51590. CMD_ACT_SET_TX_FIX_RATE
  51591. CMD_ACT_SET_WOL_RULE
  51592. CMD_ADAPTER_DUMP
  51593. CMD_ADAPTER_MSG
  51594. CMD_ADDR_ADD
  51595. CMD_ADDR_DEL
  51596. CMD_ADDR_MAPPING_SHIFT
  51597. CMD_ADD_FILTER
  51598. CMD_ADD_H_OFS
  51599. CMD_ADD_L_OFS
  51600. CMD_ADD_PEER
  51601. CMD_AGCCONTROL
  51602. CMD_AGC_STATUS
  51603. CMD_AGC_STATUS_NRESP_A10
  51604. CMD_AGC_STATUS_NRESP_A20
  51605. CMD_ALIVE
  51606. CMD_ALLMULTI_MODE
  51607. CMD_ALLOCATEAUX
  51608. CMD_ALLOCATETX
  51609. CMD_ALLOCBUF
  51610. CMD_ALL_DISABLE_IMMEDIATELY
  51611. CMD_ALL_NO_CHANGE
  51612. CMD_AMP_ENABLE
  51613. CMD_AM_ACF_STATUS
  51614. CMD_AM_ACF_STATUS_NARGS
  51615. CMD_AM_ACF_STATUS_NRESP
  51616. CMD_AM_RSQ_STATUS
  51617. CMD_AM_RSQ_STATUS_NARGS
  51618. CMD_AM_RSQ_STATUS_NRESP
  51619. CMD_AM_SEEK_START
  51620. CMD_AM_SEEK_START_NARGS
  51621. CMD_AM_SEEK_START_NRESP
  51622. CMD_AM_TUNE_FREQ
  51623. CMD_AM_TUNE_FREQ_NARGS
  51624. CMD_AM_TUNE_FREQ_NRESP
  51625. CMD_ANALOG
  51626. CMD_ANA_AUDIO_PIN_CFG
  51627. CMD_ANA_AUDIO_PIN_CFG_NARGS
  51628. CMD_ANA_AUDIO_PIN_CFG_NRESP
  51629. CMD_ANIMATE
  51630. CMD_ANTENNA_OP
  51631. CMD_ANYBUS_INIT
  51632. CMD_APP_CMD
  51633. CMD_APP_ERR_CONFIG
  51634. CMD_APP_MEM_CTL
  51635. CMD_AP_DISCOVERY
  51636. CMD_ARM_SRQ
  51637. CMD_ASE
  51638. CMD_ASPE
  51639. CMD_ASYNC
  51640. CMD_ASYNC_STATUS
  51641. CMD_AT
  51642. CMD_ATTENTION
  51643. CMD_AUD
  51644. CMD_AUDIO_LEVEL_ADJUST
  51645. CMD_AUDIO_VU_PIC_METER
  51646. CMD_AUTO
  51647. CMD_AUTO_CONFIG
  51648. CMD_AUTO_PARAM
  51649. CMD_AVER_STREAM_OFF
  51650. CMD_AVER_STREAM_ON
  51651. CMD_A_ALLOW_WRITE
  51652. CMD_A_CHG_ENABLED
  51653. CMD_A_SUSPEND_ENABLED
  51654. CMD_B
  51655. CMD_BANDWIDTH
  51656. CMD_BASEBAND_FILTER_BANDWIDTH_SET
  51657. CMD_BATTERY_LEVEL_STATUS_GET_BATTERY_CAPABILITY
  51658. CMD_BATTERY_LEVEL_STATUS_GET_BATTERY_LEVEL_STATUS
  51659. CMD_BBP_REG_ACCESS
  51660. CMD_BBP_REG_MAP
  51661. CMD_BEACON
  51662. CMD_BEACON_OP
  51663. CMD_BERCTRL
  51664. CMD_BER_CONTROL
  51665. CMD_BER_CTRL
  51666. CMD_BER_UPDATE_COUNTERS
  51667. CMD_BITS_MASK
  51668. CMD_BLK_HEAD
  51669. CMD_BLK_PRODUCT_ID
  51670. CMD_BLOCKS_LOCK
  51671. CMD_BLOCKS_LOCK_DOWN
  51672. CMD_BLOCKS_UNLOCK
  51673. CMD_BLOCK_COMMAND_OFFSET
  51674. CMD_BLOCK_ERASE
  51675. CMD_BLOCK_PARAMETERS_OFFSET
  51676. CMD_BLOCK_STATUS_OFFSET
  51677. CMD_BLUEBIRD_GPIO_RW
  51678. CMD_BL_ALL
  51679. CMD_BL_CMD
  51680. CMD_BL_DATA
  51681. CMD_BL_HEAD
  51682. CMD_BL_STATUS
  51683. CMD_BME_VAL
  51684. CMD_BOARD_ID_READ
  51685. CMD_BOARD_PARTID_SERIALNO_READ
  51686. CMD_BREAK
  51687. CMD_BRST_OOB_DET
  51688. CMD_BSS_TYPE_ANY
  51689. CMD_BSS_TYPE_BSS
  51690. CMD_BSS_TYPE_IBSS
  51691. CMD_BT_ACCESS
  51692. CMD_BUFFER_DESCRIPTOR
  51693. CMD_BUFFER_ENTRIES
  51694. CMD_BUFFER_POST_BASE_FLAGS_AUTO_POST_ALL
  51695. CMD_BUFFER_POST_FLAGS_64_BIT_ADDR
  51696. CMD_BUFFER_POST_FLAGS_ADDR_MODE_32
  51697. CMD_BUFFER_POST_FLAGS_ADDR_MODE_64
  51698. CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK
  51699. CMD_BUFFER_POST_FLAGS_PORT_MASK
  51700. CMD_BUFFER_POST_IO_INDEX_MASK
  51701. CMD_BUFFER_POST_IO_INDEX_MASK_0100
  51702. CMD_BUFFER_SIZE
  51703. CMD_BUFFER_UNINITIALIZED
  51704. CMD_BUFF_SIZE
  51705. CMD_BUFLEN
  51706. CMD_BUFSIZE
  51707. CMD_BUF_SIZE
  51708. CMD_BURST_READ
  51709. CMD_BURST_WRITE
  51710. CMD_BUS2
  51711. CMD_BUSIF_DALIGN
  51712. CMD_BUSIF_MODE
  51713. CMD_BUSOFF_TIME
  51714. CMD_BUSON_TIME
  51715. CMD_BUSY
  51716. CMD_BUSY_TIMEOUT
  51717. CMD_BUS_GLOBAL_FOR_TX_LANE0__gang_mode_MASK
  51718. CMD_BUS_GLOBAL_FOR_TX_LANE0__gang_mode__SHIFT
  51719. CMD_BUS_GLOBAL_FOR_TX_LANE0__link_speed_MASK
  51720. CMD_BUS_GLOBAL_FOR_TX_LANE0__link_speed__SHIFT
  51721. CMD_BUS_GLOBAL_FOR_TX_LANE0__max_linkrate_MASK
  51722. CMD_BUS_GLOBAL_FOR_TX_LANE0__max_linkrate__SHIFT
  51723. CMD_BUS_GLOBAL_FOR_TX_LANE0__pcs_clkdone_MASK
  51724. CMD_BUS_GLOBAL_FOR_TX_LANE0__pcs_clkdone__SHIFT
  51725. CMD_BUS_GLOBAL_FOR_TX_LANE0__pcs_clken_MASK
  51726. CMD_BUS_GLOBAL_FOR_TX_LANE0__pcs_clken__SHIFT
  51727. CMD_BUS_GLOBAL_FOR_TX_LANE0__pcs_freq_MASK
  51728. CMD_BUS_GLOBAL_FOR_TX_LANE0__pcs_freq__SHIFT
  51729. CMD_BUS_GLOBAL_FOR_TX_LANE0__pll1_always_on_MASK
  51730. CMD_BUS_GLOBAL_FOR_TX_LANE0__pll1_always_on__SHIFT
  51731. CMD_BUS_GLOBAL_FOR_TX_LANE0__rdclk_div2_en_MASK
  51732. CMD_BUS_GLOBAL_FOR_TX_LANE0__rdclk_div2_en__SHIFT
  51733. CMD_BUS_GLOBAL_FOR_TX_LANE0__twosym_en_MASK
  51734. CMD_BUS_GLOBAL_FOR_TX_LANE0__twosym_en__SHIFT
  51735. CMD_BUS_GLOBAL_FOR_TX_LANE0__tx_binary_ron_code_offset_MASK
  51736. CMD_BUS_GLOBAL_FOR_TX_LANE0__tx_binary_ron_code_offset__SHIFT
  51737. CMD_BUS_GLOBAL_FOR_TX_LANE0__tx_boost_adj_MASK
  51738. CMD_BUS_GLOBAL_FOR_TX_LANE0__tx_boost_adj__SHIFT
  51739. CMD_BUS_GLOBAL_FOR_TX_LANE0__tx_boost_en_MASK
  51740. CMD_BUS_GLOBAL_FOR_TX_LANE0__tx_boost_en__SHIFT
  51741. CMD_BUS_GLOBAL_FOR_TX_LANE1__gang_mode_MASK
  51742. CMD_BUS_GLOBAL_FOR_TX_LANE1__gang_mode__SHIFT
  51743. CMD_BUS_GLOBAL_FOR_TX_LANE1__link_speed_MASK
  51744. CMD_BUS_GLOBAL_FOR_TX_LANE1__link_speed__SHIFT
  51745. CMD_BUS_GLOBAL_FOR_TX_LANE1__max_linkrate_MASK
  51746. CMD_BUS_GLOBAL_FOR_TX_LANE1__max_linkrate__SHIFT
  51747. CMD_BUS_GLOBAL_FOR_TX_LANE1__pcs_clkdone_MASK
  51748. CMD_BUS_GLOBAL_FOR_TX_LANE1__pcs_clkdone__SHIFT
  51749. CMD_BUS_GLOBAL_FOR_TX_LANE1__pcs_clken_MASK
  51750. CMD_BUS_GLOBAL_FOR_TX_LANE1__pcs_clken__SHIFT
  51751. CMD_BUS_GLOBAL_FOR_TX_LANE1__pcs_freq_MASK
  51752. CMD_BUS_GLOBAL_FOR_TX_LANE1__pcs_freq__SHIFT
  51753. CMD_BUS_GLOBAL_FOR_TX_LANE1__pll1_always_on_MASK
  51754. CMD_BUS_GLOBAL_FOR_TX_LANE1__pll1_always_on__SHIFT
  51755. CMD_BUS_GLOBAL_FOR_TX_LANE1__rdclk_div2_en_MASK
  51756. CMD_BUS_GLOBAL_FOR_TX_LANE1__rdclk_div2_en__SHIFT
  51757. CMD_BUS_GLOBAL_FOR_TX_LANE1__twosym_en_MASK
  51758. CMD_BUS_GLOBAL_FOR_TX_LANE1__twosym_en__SHIFT
  51759. CMD_BUS_GLOBAL_FOR_TX_LANE1__tx_binary_ron_code_offset_MASK
  51760. CMD_BUS_GLOBAL_FOR_TX_LANE1__tx_binary_ron_code_offset__SHIFT
  51761. CMD_BUS_GLOBAL_FOR_TX_LANE1__tx_boost_adj_MASK
  51762. CMD_BUS_GLOBAL_FOR_TX_LANE1__tx_boost_adj__SHIFT
  51763. CMD_BUS_GLOBAL_FOR_TX_LANE1__tx_boost_en_MASK
  51764. CMD_BUS_GLOBAL_FOR_TX_LANE1__tx_boost_en__SHIFT
  51765. CMD_BUS_GLOBAL_FOR_TX_LANE2__gang_mode_MASK
  51766. CMD_BUS_GLOBAL_FOR_TX_LANE2__gang_mode__SHIFT
  51767. CMD_BUS_GLOBAL_FOR_TX_LANE2__link_speed_MASK
  51768. CMD_BUS_GLOBAL_FOR_TX_LANE2__link_speed__SHIFT
  51769. CMD_BUS_GLOBAL_FOR_TX_LANE2__max_linkrate_MASK
  51770. CMD_BUS_GLOBAL_FOR_TX_LANE2__max_linkrate__SHIFT
  51771. CMD_BUS_GLOBAL_FOR_TX_LANE2__pcs_clkdone_MASK
  51772. CMD_BUS_GLOBAL_FOR_TX_LANE2__pcs_clkdone__SHIFT
  51773. CMD_BUS_GLOBAL_FOR_TX_LANE2__pcs_clken_MASK
  51774. CMD_BUS_GLOBAL_FOR_TX_LANE2__pcs_clken__SHIFT
  51775. CMD_BUS_GLOBAL_FOR_TX_LANE2__pcs_freq_MASK
  51776. CMD_BUS_GLOBAL_FOR_TX_LANE2__pcs_freq__SHIFT
  51777. CMD_BUS_GLOBAL_FOR_TX_LANE2__pll1_always_on_MASK
  51778. CMD_BUS_GLOBAL_FOR_TX_LANE2__pll1_always_on__SHIFT
  51779. CMD_BUS_GLOBAL_FOR_TX_LANE2__rdclk_div2_en_MASK
  51780. CMD_BUS_GLOBAL_FOR_TX_LANE2__rdclk_div2_en__SHIFT
  51781. CMD_BUS_GLOBAL_FOR_TX_LANE2__twosym_en_MASK
  51782. CMD_BUS_GLOBAL_FOR_TX_LANE2__twosym_en__SHIFT
  51783. CMD_BUS_GLOBAL_FOR_TX_LANE2__tx_binary_ron_code_offset_MASK
  51784. CMD_BUS_GLOBAL_FOR_TX_LANE2__tx_binary_ron_code_offset__SHIFT
  51785. CMD_BUS_GLOBAL_FOR_TX_LANE2__tx_boost_adj_MASK
  51786. CMD_BUS_GLOBAL_FOR_TX_LANE2__tx_boost_adj__SHIFT
  51787. CMD_BUS_GLOBAL_FOR_TX_LANE2__tx_boost_en_MASK
  51788. CMD_BUS_GLOBAL_FOR_TX_LANE2__tx_boost_en__SHIFT
  51789. CMD_BUS_GLOBAL_FOR_TX_LANE3__gang_mode_MASK
  51790. CMD_BUS_GLOBAL_FOR_TX_LANE3__gang_mode__SHIFT
  51791. CMD_BUS_GLOBAL_FOR_TX_LANE3__link_speed_MASK
  51792. CMD_BUS_GLOBAL_FOR_TX_LANE3__link_speed__SHIFT
  51793. CMD_BUS_GLOBAL_FOR_TX_LANE3__max_linkrate_MASK
  51794. CMD_BUS_GLOBAL_FOR_TX_LANE3__max_linkrate__SHIFT
  51795. CMD_BUS_GLOBAL_FOR_TX_LANE3__pcs_clkdone_MASK
  51796. CMD_BUS_GLOBAL_FOR_TX_LANE3__pcs_clkdone__SHIFT
  51797. CMD_BUS_GLOBAL_FOR_TX_LANE3__pcs_clken_MASK
  51798. CMD_BUS_GLOBAL_FOR_TX_LANE3__pcs_clken__SHIFT
  51799. CMD_BUS_GLOBAL_FOR_TX_LANE3__pcs_freq_MASK
  51800. CMD_BUS_GLOBAL_FOR_TX_LANE3__pcs_freq__SHIFT
  51801. CMD_BUS_GLOBAL_FOR_TX_LANE3__pll1_always_on_MASK
  51802. CMD_BUS_GLOBAL_FOR_TX_LANE3__pll1_always_on__SHIFT
  51803. CMD_BUS_GLOBAL_FOR_TX_LANE3__rdclk_div2_en_MASK
  51804. CMD_BUS_GLOBAL_FOR_TX_LANE3__rdclk_div2_en__SHIFT
  51805. CMD_BUS_GLOBAL_FOR_TX_LANE3__twosym_en_MASK
  51806. CMD_BUS_GLOBAL_FOR_TX_LANE3__twosym_en__SHIFT
  51807. CMD_BUS_GLOBAL_FOR_TX_LANE3__tx_binary_ron_code_offset_MASK
  51808. CMD_BUS_GLOBAL_FOR_TX_LANE3__tx_binary_ron_code_offset__SHIFT
  51809. CMD_BUS_GLOBAL_FOR_TX_LANE3__tx_boost_adj_MASK
  51810. CMD_BUS_GLOBAL_FOR_TX_LANE3__tx_boost_adj__SHIFT
  51811. CMD_BUS_GLOBAL_FOR_TX_LANE3__tx_boost_en_MASK
  51812. CMD_BUS_GLOBAL_FOR_TX_LANE3__tx_boost_en__SHIFT
  51813. CMD_BUS_MASTER
  51814. CMD_BUS_TX_CONTROL_LANE0__tx_pg_en_MASK
  51815. CMD_BUS_TX_CONTROL_LANE0__tx_pg_en__SHIFT
  51816. CMD_BUS_TX_CONTROL_LANE0__tx_pwr_MASK
  51817. CMD_BUS_TX_CONTROL_LANE0__tx_pwr__SHIFT
  51818. CMD_BUS_TX_CONTROL_LANE0__tx_rdy_MASK
  51819. CMD_BUS_TX_CONTROL_LANE0__tx_rdy__SHIFT
  51820. CMD_BUS_TX_CONTROL_LANE1__tx_pg_en_MASK
  51821. CMD_BUS_TX_CONTROL_LANE1__tx_pg_en__SHIFT
  51822. CMD_BUS_TX_CONTROL_LANE1__tx_pwr_MASK
  51823. CMD_BUS_TX_CONTROL_LANE1__tx_pwr__SHIFT
  51824. CMD_BUS_TX_CONTROL_LANE1__tx_rdy_MASK
  51825. CMD_BUS_TX_CONTROL_LANE1__tx_rdy__SHIFT
  51826. CMD_BUS_TX_CONTROL_LANE2__tx_pg_en_MASK
  51827. CMD_BUS_TX_CONTROL_LANE2__tx_pg_en__SHIFT
  51828. CMD_BUS_TX_CONTROL_LANE2__tx_pwr_MASK
  51829. CMD_BUS_TX_CONTROL_LANE2__tx_pwr__SHIFT
  51830. CMD_BUS_TX_CONTROL_LANE2__tx_rdy_MASK
  51831. CMD_BUS_TX_CONTROL_LANE2__tx_rdy__SHIFT
  51832. CMD_BUS_TX_CONTROL_LANE3__tx_pg_en_MASK
  51833. CMD_BUS_TX_CONTROL_LANE3__tx_pg_en__SHIFT
  51834. CMD_BUS_TX_CONTROL_LANE3__tx_pwr_MASK
  51835. CMD_BUS_TX_CONTROL_LANE3__tx_pwr__SHIFT
  51836. CMD_BUS_TX_CONTROL_LANE3__tx_rdy_MASK
  51837. CMD_BUS_TX_CONTROL_LANE3__tx_rdy__SHIFT
  51838. CMD_BYTE1_MASK
  51839. CMD_BYTE1_SHIFT
  51840. CMD_BYTE2_MASK
  51841. CMD_BYTE2_SHIFT
  51842. CMD_BYTE_DATA
  51843. CMD_C
  51844. CMD_CAC_START
  51845. CMD_CAC_STOP
  51846. CMD_CALIBRATION_OP
  51847. CMD_CALLBACK
  51848. CMD_CANCEL
  51849. CMD_CANCEL_REMAIN_ON_CHANNEL
  51850. CMD_CANCEL_R_BUFFERS
  51851. CMD_CAN_ERROR_EVENT
  51852. CMD_CAN_RX
  51853. CMD_CAN_START_PIPE
  51854. CMD_CAN_TX
  51855. CMD_CAPABILITY
  51856. CMD_CARRIER_DETECT_OP
  51857. CMD_CBW_10MHZ
  51858. CMD_CBW_160MHZ
  51859. CMD_CBW_20MHZ
  51860. CMD_CBW_40MHZ
  51861. CMD_CBW_5MHZ
  51862. CMD_CBW_8080MHZ
  51863. CMD_CBW_80MHZ
  51864. CMD_CDBLEN
  51865. CMD_CDBP
  51866. CMD_CDO
  51867. CMD_CFG_BLOCK_MODE
  51868. CMD_CFG_CMD_INDEX_MASK
  51869. CMD_CFG_CRC_FWD
  51870. CMD_CFG_DATA_IO
  51871. CMD_CFG_DATA_NUM
  51872. CMD_CFG_DATA_WR
  51873. CMD_CFG_DEV
  51874. CMD_CFG_END_OF_CHAIN
  51875. CMD_CFG_EN_TIMESTAMP
  51876. CMD_CFG_ERROR
  51877. CMD_CFG_LENGTH_MASK
  51878. CMD_CFG_NO_CMD
  51879. CMD_CFG_NO_LEN_CHK
  51880. CMD_CFG_NO_RESP
  51881. CMD_CFG_OWNER
  51882. CMD_CFG_PAD_EN
  51883. CMD_CFG_PAUSE_IGNORE
  51884. CMD_CFG_PFC_MODE
  51885. CMD_CFG_PROMIS_EN
  51886. CMD_CFG_R1B
  51887. CMD_CFG_REG_LOWP_RXETY
  51888. CMD_CFG_RESP_128
  51889. CMD_CFG_RESP_NOCRC
  51890. CMD_CFG_RESP_NUM
  51891. CMD_CFG_RX_EN
  51892. CMD_CFG_SW_RESET
  51893. CMD_CFG_TIMEOUT_MASK
  51894. CMD_CFG_TX_EN
  51895. CMD_CFG_TX_LOWP_ENA
  51896. CMD_CFG_TX_PAD_EN
  51897. CMD_CHANGE_CHANNEL
  51898. CMD_CHANNEL_SWITCH
  51899. CMD_CHAN_IF_REV
  51900. CMD_CHAN_VER
  51901. CMD_CHECK_LATE
  51902. CMD_CHIP_STATE_EVENT
  51903. CMD_CH_RST
  51904. CMD_CI
  51905. CMD_CLD
  51906. CMD_CLEAR_EC_WAKEUP_TIMER
  51907. CMD_CLK_DISABLE
  51908. CMD_CLK_ENABLE
  51909. CMD_CLK_GET_ALL_INFO
  51910. CMD_CLK_GET_FMAX_AT_VMIN
  51911. CMD_CLK_GET_MAX_CLK_ID
  51912. CMD_CLK_GET_PARENT
  51913. CMD_CLK_GET_RATE
  51914. CMD_CLK_IS_ENABLED
  51915. CMD_CLK_MAX
  51916. CMD_CLK_ROUND_RATE
  51917. CMD_CLK_SET_PARENT
  51918. CMD_CLK_SET_RATE
  51919. CMD_CLOCK_READ
  51920. CMD_CLOCK_SET
  51921. CMD_CLOSE
  51922. CMD_CLOSE_HCA
  51923. CMD_CLOSE_IB
  51924. CMD_CLOSE_XRI_CN
  51925. CMD_CLOSE_XRI_CX
  51926. CMD_CLR_ATN
  51927. CMD_CLR_BUF
  51928. CMD_CLR_EVENT
  51929. CMD_CLR_PROFILE_CNT
  51930. CMD_CMRST_OOB_DET
  51931. CMD_CMSAS_OOB_DET
  51932. CMD_CMWK_OOB_DET
  51933. CMD_CNTL_FRM_EN
  51934. CMD_CNTR_MASK
  51935. CMD_CODE_MASK
  51936. CMD_CODE_OFS
  51937. CMD_CODE_SHIFT
  51938. CMD_COMMAND
  51939. CMD_COMMON_TCP_UPLOAD
  51940. CMD_COMPLETE
  51941. CMD_COMPLETED
  51942. CMD_COMPLETE_PPR
  51943. CMD_COMPLETE_TOUT_SEC
  51944. CMD_COMPLETION_TIMEOUT
  51945. CMD_COMPL_STATUS
  51946. CMD_COMPL_TIMEOUT
  51947. CMD_COMPL_WAIT
  51948. CMD_COMPL_WAIT_INT_MASK
  51949. CMD_COMPL_WAIT_STORE_MASK
  51950. CMD_CONFIG
  51951. CMD_CONFIGURE
  51952. CMD_CONFIGURE_BUFFER
  51953. CMD_CONFIGURE_FREE_BUFFER
  51954. CMD_CONFIGURE_UART
  51955. CMD_CONFIG_FWLOGGER
  51956. CMD_CONFIG_INFO_GET
  51957. CMD_CONFIG_TIME_CODE
  51958. CMD_CONF_PIPE
  51959. CMD_CONF_SPECIAL_QP
  51960. CMD_CONNECTION_LOST
  51961. CMD_CONNECTION_SCAN_CFG
  51962. CMD_CONNECTION_SCAN_SSID_CFG
  51963. CMD_CONNECT_AUDIO
  51964. CMD_CONNECT_MONITORING
  51965. CMD_CONTROL
  51966. CMD_COPY_BACK
  51967. CMD_COUNT
  51968. CMD_CRC_FWD
  51969. CMD_CREATE_XRI_CR
  51970. CMD_CREATE_XRI_CX
  51971. CMD_CRQ_DESC_NUM
  51972. CMD_CRS
  51973. CMD_CS
  51974. CMD_CSQ_DESC_NUM
  51975. CMD_CSS
  51976. CMD_CTLR_LOCKUP
  51977. CMD_CTRL
  51978. CMD_CTRL_BREAK
  51979. CMD_CTX_NO_SWAP
  51980. CMD_CTX_SWAP
  51981. CMD_CTX_SWAP_DEFER1
  51982. CMD_CTX_SWAP_DEFER2
  51983. CMD_CXN_KILLED_ICD_INVALID
  51984. CMD_CXN_KILLED_INVALID_DATASN_RCVD
  51985. CMD_CXN_KILLED_ITT_INVALID
  51986. CMD_CXN_KILLED_LUN_INVALID
  51987. CMD_CXN_KILLED_SEQ_OUTOFORDER
  51988. CMD_DATA
  51989. CMD_DATATYPE
  51990. CMD_DATA_BIG_ENDIAN
  51991. CMD_DATA_MASK
  51992. CMD_DATA_OFFSET
  51993. CMD_DATA_OFS
  51994. CMD_DATA_OVERRUN
  51995. CMD_DATA_SHIFT
  51996. CMD_DATA_SIZE_MASK
  51997. CMD_DATA_SRAM
  51998. CMD_DATA_UNDERRUN
  51999. CMD_DAT_CONT_BUS_WIDTH_4
  52000. CMD_DAT_CONT_CMD_RESP_LONG_OFF
  52001. CMD_DAT_CONT_DATA_ENABLE
  52002. CMD_DAT_CONT_INIT
  52003. CMD_DAT_CONT_RESPONSE_136BIT
  52004. CMD_DAT_CONT_RESPONSE_48BIT
  52005. CMD_DAT_CONT_RESPONSE_48BIT_CRC
  52006. CMD_DAT_CONT_START_READWAIT
  52007. CMD_DAT_CONT_STOP_READWAIT
  52008. CMD_DAT_CONT_WRITE
  52009. CMD_DB_HW_ALL
  52010. CMD_DB_HW_ARC
  52011. CMD_DB_HW_BCM
  52012. CMD_DB_HW_INVALID
  52013. CMD_DB_HW_MAX
  52014. CMD_DB_HW_MIN
  52015. CMD_DB_HW_VRM
  52016. CMD_DEALLOCATETX
  52017. CMD_DEBUG
  52018. CMD_DEBUGFS_DIR
  52019. CMD_DEBUGFS_DUMPDIR
  52020. CMD_DEBUGFS_MAX
  52021. CMD_DEBUGFS_READ
  52022. CMD_DEBUGFS_WRITE
  52023. CMD_DEBUG_OUTPUT
  52024. CMD_DEBUG_READ_MASK
  52025. CMD_DEBUG_READ_SELECT
  52026. CMD_DEBUG_SET_MASK
  52027. CMD_DEBUG_SET_SELECT
  52028. CMD_DEINIT
  52029. CMD_DELAY_MS
  52030. CMD_DELAY_US
  52031. CMD_DELTLV
  52032. CMD_DEL_FILTER
  52033. CMD_DEMODINIT
  52034. CMD_DEMOD_INIT
  52035. CMD_DEMOD_RD
  52036. CMD_DEMOD_WR
  52037. CMD_DESC_BITMASK
  52038. CMD_DESC_EN
  52039. CMD_DESC_FIXED
  52040. CMD_DESC_HDR
  52041. CMD_DESC_REGISTER
  52042. CMD_DESC_REJECT
  52043. CMD_DESC_RES
  52044. CMD_DESC_SKIP
  52045. CMD_DESC_SNOOP_ENABLE
  52046. CMD_DEVICE_ID_READ
  52047. CMD_DEV_SPEC
  52048. CMD_DEV_STATUS
  52049. CMD_DFS_CHANNEL_CONFIG
  52050. CMD_DFS_MASTER_RESTART
  52051. CMD_DFS_RADAR_DETECTION_DEBUG
  52052. CMD_DFUNCTR
  52053. CMD_DIAGNOSE
  52054. CMD_DIAG_RPRT
  52055. CMD_DIALTONE
  52056. CMD_DIGITAL
  52057. CMD_DIG_AUDIO_PIN_CFG
  52058. CMD_DIG_AUDIO_PIN_CFG_NARGS
  52059. CMD_DIG_AUDIO_PIN_CFG_NRESP
  52060. CMD_DINVCTR
  52061. CMD_DIRTY_CFG
  52062. CMD_DIRTY_D
  52063. CMD_DIRTY_M
  52064. CMD_DIRTY_N
  52065. CMD_DIR_MSG
  52066. CMD_DIS
  52067. CMD_DISABLE
  52068. CMD_DISABLESEL
  52069. CMD_DISABLE_FRAME_BOUNDARY
  52070. CMD_DISABLE_IMMEDIATELY
  52071. CMD_DISABLE_LAM
  52072. CMD_DISABLE_MPPT
  52073. CMD_DISABLE_RSN
  52074. CMD_DISABLE_RUNIN_DISCHARGE
  52075. CMD_DISABLE_RX
  52076. CMD_DISABLE_SEL
  52077. CMD_DISABLE_TX
  52078. CMD_DISABLE_WATCHDOG
  52079. CMD_DISCONNECT
  52080. CMD_DISCOVER_IDENT
  52081. CMD_DISCOVER_MODES
  52082. CMD_DISCOVER_SVID
  52083. CMD_DISCR_LAST
  52084. CMD_DISCR_TLV_ENCAP
  52085. CMD_DISC_SEQ
  52086. CMD_DISEQC
  52087. CMD_DISEQC_BURST
  52088. CMD_DISEQC_MSG1
  52089. CMD_DISEQC_MSG2
  52090. CMD_DMAADDH
  52091. CMD_DMAEND
  52092. CMD_DMAFLUSHP
  52093. CMD_DMAGO
  52094. CMD_DMAKILL
  52095. CMD_DMALD
  52096. CMD_DMALDP
  52097. CMD_DMALP
  52098. CMD_DMALPEND
  52099. CMD_DMAMOV
  52100. CMD_DMANOP
  52101. CMD_DMAOFF
  52102. CMD_DMAON
  52103. CMD_DMARMB
  52104. CMD_DMASEV
  52105. CMD_DMASPEED
  52106. CMD_DMAST
  52107. CMD_DMASTP
  52108. CMD_DMASTZ
  52109. CMD_DMAWFE
  52110. CMD_DMAWFP
  52111. CMD_DMAWMB
  52112. CMD_DMA_ALLOC_SZ
  52113. CMD_DMA_CTRL
  52114. CMD_DMA_EXT_READ
  52115. CMD_DMA_EXT_WRITE
  52116. CMD_DMA_MEM_BIST_CTL
  52117. CMD_DMA_MEM_BIST_STAT
  52118. CMD_DMA_MEM_CTL
  52119. CMD_DMA_MODE
  52120. CMD_DMA_READ
  52121. CMD_DMA_WRITE
  52122. CMD_DONE
  52123. CMD_DONE_CLEAR_BIT
  52124. CMD_DONE_INT
  52125. CMD_DONE_INT_EN
  52126. CMD_DONE_INT_FLAG
  52127. CMD_DROP_BYTES_AWAY
  52128. CMD_DSP_BOOT
  52129. CMD_DSP_DOWNLOAD
  52130. CMD_DST_FORMAT_RGB111
  52131. CMD_DST_FORMAT_RGB332
  52132. CMD_DST_FORMAT_RGB444
  52133. CMD_DST_FORMAT_RGB565
  52134. CMD_DST_FORMAT_RGB666
  52135. CMD_DST_FORMAT_RGB888
  52136. CMD_DTS_MEASUREMENT_TRIGGER_WIDE
  52137. CMD_DUMP
  52138. CMD_DYNC_VGA_OP
  52139. CMD_DisableRadio
  52140. CMD_ECHO
  52141. CMD_EC_INFO
  52142. CMD_EC_NUM
  52143. CMD_EC_STATUS_GET
  52144. CMD_EEPROM_UPDATE
  52145. CMD_EEprom_Close
  52146. CMD_EEprom_Open
  52147. CMD_EFFECT_ONE_PIPE
  52148. CMD_EFUSE_PATCH
  52149. CMD_EFUSE_PATCH_ERR
  52150. CMD_EIE
  52151. CMD_ELS_REQUEST64_CR
  52152. CMD_ELS_REQUEST64_CX
  52153. CMD_ELS_REQUEST64_WQE
  52154. CMD_ELS_REQUEST_CR
  52155. CMD_ELS_REQUEST_CX
  52156. CMD_EMBEDDED_MODE_DISABLE
  52157. CMD_EMBEDDED_MODE_ENABLE
  52158. CMD_EMBOI
  52159. CMD_EN
  52160. CMD_ENABLE
  52161. CMD_ENABLE2
  52162. CMD_ENABLE2_ACTIVE
  52163. CMD_ENABLE2_STANDBY
  52164. CMD_ENABLEAUX
  52165. CMD_ENABLERSCORR
  52166. CMD_ENABLESEL
  52167. CMD_ENABLE_FRAME_BOUNDARY
  52168. CMD_ENABLE_LAM
  52169. CMD_ENABLE_MOUSE
  52170. CMD_ENABLE_MPPT
  52171. CMD_ENABLE_RSN
  52172. CMD_ENABLE_RUNIN_DISCHARGE
  52173. CMD_ENABLE_RX
  52174. CMD_ENABLE_RX_PATH
  52175. CMD_ENABLE_SEL
  52176. CMD_ENABLE_TX
  52177. CMD_ENABLE_WAIT
  52178. CMD_ENABLE_WAKE_AUTORESET
  52179. CMD_ENABLE_WAKE_TIMER
  52180. CMD_ENABLE_WATCHDOG
  52181. CMD_END
  52182. CMD_END_INIT
  52183. CMD_ENINTBUFWIN
  52184. CMD_ENINTDMA
  52185. CMD_ENINTRX
  52186. CMD_ENINTTX
  52187. CMD_ENTER_MODE
  52188. CMD_ENTER_PASSIVE_MODE
  52189. CMD_ENTRY_STATUS
  52190. CMD_EOF
  52191. CMD_EOL
  52192. CMD_EOS
  52193. CMD_EP
  52194. CMD_ERR
  52195. CMD_ERR2RST_QPEE
  52196. CMD_ERRCODE_MASK
  52197. CMD_ERROR
  52198. CMD_ERRORS
  52199. CMD_ERRORS_EXCL_OOR
  52200. CMD_ERROR_EVENT
  52201. CMD_ERR_MASK
  52202. CMD_ETE
  52203. CMD_ETHERNET_MODE
  52204. CMD_EVENTCTRL
  52205. CMD_EVT_WHAT_BIT
  52206. CMD_EWE
  52207. CMD_EX
  52208. CMD_EXECUTE
  52209. CMD_EXEC_OFS
  52210. CMD_EXEC_PATH
  52211. CMD_EXEC_SUCCESS
  52212. CMD_EXIT_IDLE_MODE
  52213. CMD_EXIT_MODE
  52214. CMD_EXTBIOS
  52215. CMD_EXTENDED
  52216. CMD_EXT_SCI_QUERY
  52217. CMD_E_FID_A
  52218. CMD_E_FID_B
  52219. CMD_EnableRadio
  52220. CMD_FAIL
  52221. CMD_FAST_FAIL
  52222. CMD_FB
  52223. CMD_FCOFF
  52224. CMD_FCON
  52225. CMD_FCP_AUTO_TRSP_CX
  52226. CMD_FCP_ICMND64_CR
  52227. CMD_FCP_ICMND64_CX
  52228. CMD_FCP_ICMND64_WQE
  52229. CMD_FCP_ICMND_CR
  52230. CMD_FCP_ICMND_CX
  52231. CMD_FCP_IREAD64_CR
  52232. CMD_FCP_IREAD64_CX
  52233. CMD_FCP_IREAD64_WQE
  52234. CMD_FCP_IREAD_CR
  52235. CMD_FCP_IREAD_CX
  52236. CMD_FCP_IWRITE64_CR
  52237. CMD_FCP_IWRITE64_CX
  52238. CMD_FCP_IWRITE64_WQE
  52239. CMD_FCP_IWRITE_CR
  52240. CMD_FCP_IWRITE_CX
  52241. CMD_FCP_TRECEIVE64_CX
  52242. CMD_FCP_TRECEIVE64_WQE
  52243. CMD_FCP_TRECEIVE_CX
  52244. CMD_FCP_TRSP64_CX
  52245. CMD_FCP_TRSP64_WQE
  52246. CMD_FCP_TRSP_CX
  52247. CMD_FCP_TSEND64_CX
  52248. CMD_FCP_TSEND64_WQE
  52249. CMD_FCP_TSEND_CX
  52250. CMD_FIELD_OFF
  52251. CMD_FIFOREAD
  52252. CMD_FIFOWRITE
  52253. CMD_FIFO_EMPTY_TIMEOUT
  52254. CMD_FIFO_LOAD
  52255. CMD_FIFO_STORE
  52256. CMD_FILTER_DISABLE
  52257. CMD_FILTER_ENABLE
  52258. CMD_FINALIZE_BYTES_NEEDED
  52259. CMD_FINDNEXTTLV
  52260. CMD_FIRST_VALID
  52261. CMD_FLAGS
  52262. CMD_FLAGS_INTR
  52263. CMD_FLAGS_STATUS
  52264. CMD_FLAG_DATA_IN
  52265. CMD_FLAG_DATA_OUT
  52266. CMD_FLAG_DMA
  52267. CMD_FLAG_NAME
  52268. CMD_FLAG_NON_DATA
  52269. CMD_FLAG_PIO
  52270. CMD_FLAG_PRDT_IN_HOST
  52271. CMD_FLASH_RESET
  52272. CMD_FLEX
  52273. CMD_FLUSH
  52274. CMD_FLUSHFIFO
  52275. CMD_FLUSH_QUEUE
  52276. CMD_FLUSH_QUEUE_REPLY
  52277. CMD_FLUSH_QUEUE_RESP
  52278. CMD_FMON_GEAR_CLAMP
  52279. CMD_FMON_GEAR_FREE
  52280. CMD_FMON_GEAR_GET
  52281. CMD_FMON_NUM
  52282. CMD_FM_ACF_STATUS
  52283. CMD_FM_ACF_STATUS_NARGS
  52284. CMD_FM_ACF_STATUS_NRESP
  52285. CMD_FM_PHASE_DIVERSITY
  52286. CMD_FM_PHASE_DIVERSITY_NARGS
  52287. CMD_FM_PHASE_DIVERSITY_NRESP
  52288. CMD_FM_PHASE_DIV_STATUS
  52289. CMD_FM_PHASE_DIV_STATUS_NRESP
  52290. CMD_FM_RDS_BLOCKCOUNT
  52291. CMD_FM_RDS_BLOCKCOUNT_NARGS
  52292. CMD_FM_RDS_BLOCKCOUNT_NRESP
  52293. CMD_FM_RDS_STATUS
  52294. CMD_FM_RDS_STATUS_NARGS
  52295. CMD_FM_RDS_STATUS_NRESP
  52296. CMD_FM_RSQ_STATUS
  52297. CMD_FM_RSQ_STATUS_A10_NARGS
  52298. CMD_FM_RSQ_STATUS_A10_NRESP
  52299. CMD_FM_RSQ_STATUS_A30_NARGS
  52300. CMD_FM_RSQ_STATUS_A30_NRESP
  52301. CMD_FM_SEEK_START
  52302. CMD_FM_SEEK_START_NARGS
  52303. CMD_FM_SEEK_START_NRESP
  52304. CMD_FM_TUNE_FREQ
  52305. CMD_FM_TUNE_FREQ_A10_NARGS
  52306. CMD_FM_TUNE_FREQ_A20_NARGS
  52307. CMD_FM_TUNE_FREQ_NRESP
  52308. CMD_FORMAT_STREAM_IN
  52309. CMD_FORMAT_STREAM_OUT
  52310. CMD_FREE_PIPE
  52311. CMD_FRMCTR1
  52312. CMD_FRMCTR2
  52313. CMD_FRMCTR3
  52314. CMD_FSP
  52315. CMD_FUNC_INFO
  52316. CMD_FUNC_INFO_NRESP
  52317. CMD_FUNC_INIT
  52318. CMD_FUNC_SHUTDOWN
  52319. CMD_FUN_SET_OP
  52320. CMD_FWLOAD_FINISH
  52321. CMD_FWLOAD_PREPARE
  52322. CMD_FWT_ACCESS
  52323. CMD_FWVERSION
  52324. CMD_FW_BOOT
  52325. CMD_FW_DL
  52326. CMD_FW_DL_BEGIN
  52327. CMD_FW_DL_END
  52328. CMD_FW_QUERYINFO
  52329. CMD_FW_SCATTER_WR
  52330. CMD_F_HOSTCMD
  52331. CMD_GAMRSEL
  52332. CMD_GDRVDIR
  52333. CMD_GENERIC_CFG
  52334. CMD_GENERIC_I2C_RD
  52335. CMD_GENERIC_I2C_WR
  52336. CMD_GEN_ACK
  52337. CMD_GEN_DATA
  52338. CMD_GEN_NACK
  52339. CMD_GEN_REQUEST64_CR
  52340. CMD_GEN_REQUEST64_CX
  52341. CMD_GEN_REQUEST64_WQE
  52342. CMD_GEN_START
  52343. CMD_GEN_STOP
  52344. CMD_GETAGC
  52345. CMD_GETCTLACC
  52346. CMD_GETTLV
  52347. CMD_GET_AGCACC
  52348. CMD_GET_API_VERSION
  52349. CMD_GET_AUDIO_LEVELS
  52350. CMD_GET_BUFSIZE
  52351. CMD_GET_CAPABILITIES_REQ
  52352. CMD_GET_CAPABILITIES_RESP
  52353. CMD_GET_CARD_INFO
  52354. CMD_GET_CARD_INFO_REPLY
  52355. CMD_GET_CARD_INFO_REQ
  52356. CMD_GET_CARD_INFO_RESP
  52357. CMD_GET_CHIP_STATE_REQ
  52358. CMD_GET_CLEAR_RESET_COUNT
  52359. CMD_GET_CLOCK_INFO
  52360. CMD_GET_CLOCK_VALUE
  52361. CMD_GET_DATA
  52362. CMD_GET_DEVICE_NAME_TYPE_GET_COUNT
  52363. CMD_GET_DEVICE_NAME_TYPE_GET_DEVICE_NAME
  52364. CMD_GET_DEVICE_NAME_TYPE_GET_TYPE
  52365. CMD_GET_DEVICE_PWR_STATE
  52366. CMD_GET_DEVICE_SN
  52367. CMD_GET_DEVICE_VER
  52368. CMD_GET_DEV_STAT
  52369. CMD_GET_DIP_SWITCH_SETTINGS
  52370. CMD_GET_DSP_RESOURCES
  52371. CMD_GET_DSP_VERSION
  52372. CMD_GET_DVFS
  52373. CMD_GET_DVFS_INFO
  52374. CMD_GET_EC_BUILD_DATE
  52375. CMD_GET_EC_LABEL
  52376. CMD_GET_EC_MODEL
  52377. CMD_GET_EC_REV
  52378. CMD_GET_ERR_CODE
  52379. CMD_GET_EVENT_NUM
  52380. CMD_GET_EXTMIDI
  52381. CMD_GET_FAN
  52382. CMD_GET_FEATURES
  52383. CMD_GET_FIRMWARE_VERSION
  52384. CMD_GET_FREQ
  52385. CMD_GET_FUNC
  52386. CMD_GET_FW_DATE
  52387. CMD_GET_FW_HASH
  52388. CMD_GET_FW_USER
  52389. CMD_GET_FW_VERSION
  52390. CMD_GET_HW_INFO
  52391. CMD_GET_HW_SPEC
  52392. CMD_GET_IR_CODE
  52393. CMD_GET_LINK_STATUS
  52394. CMD_GET_MAC_ADDR
  52395. CMD_GET_MIB
  52396. CMD_GET_MIDI_VOL
  52397. CMD_GET_MT32
  52398. CMD_GET_NOTIFY_EVENT
  52399. CMD_GET_PROPERTY
  52400. CMD_GET_PROPERTY_NARGS
  52401. CMD_GET_PROPERTY_NRESP
  52402. CMD_GET_REMAINING_BYTES
  52403. CMD_GET_RPI_CN
  52404. CMD_GET_RPI_CR
  52405. CMD_GET_SERIAL
  52406. CMD_GET_SOFTWARE_DETAILS_REQ
  52407. CMD_GET_SOFTWARE_DETAILS_RESP
  52408. CMD_GET_SOFTWARE_INFO
  52409. CMD_GET_SOFTWARE_INFO_REPLY
  52410. CMD_GET_SOFTWARE_INFO_REQ
  52411. CMD_GET_SOFTWARE_INFO_RESP
  52412. CMD_GET_SRATE
  52413. CMD_GET_STATUS
  52414. CMD_GET_STREAM_LEVELS
  52415. CMD_GET_STREAM_STATE
  52416. CMD_GET_STREAM_VU_METER
  52417. CMD_GET_SUPP_FEATURE_VER
  52418. CMD_GET_TEMPERATURE
  52419. CMD_GET_TEMPERATURE2
  52420. CMD_GET_THERMOSTATE
  52421. CMD_GET_THERMOSTATE2
  52422. CMD_GET_TIME_CODE
  52423. CMD_GET_TSF
  52424. CMD_GET_VERSION
  52425. CMD_GET_VERSION_INFO
  52426. CMD_GFRC_READ_CORE
  52427. CMD_GFRC_READ_HI
  52428. CMD_GFRC_READ_LO
  52429. CMD_GFRC_SET_CORE
  52430. CMD_GLOBAL_MPEGCFG
  52431. CMD_GPIO_READ
  52432. CMD_GPIO_WRITE
  52433. CMD_GSPI_BUS_CONFIG
  52434. CMD_Get_MIB_Vars
  52435. CMD_HALT
  52436. CMD_HANDLE
  52437. CMD_HANG_NOTIFY
  52438. CMD_HANG_RESET
  52439. CMD_HANG_RESET_STATUS
  52440. CMD_HARDWARE_ERR
  52441. CMD_HDR_ABORT_DEVICE_TYPE_MSK
  52442. CMD_HDR_ABORT_DEVICE_TYPE_OFF
  52443. CMD_HDR_ABORT_FLAG_MSK
  52444. CMD_HDR_ABORT_FLAG_OFF
  52445. CMD_HDR_ABORT_IPTT_MSK
  52446. CMD_HDR_ABORT_IPTT_OFF
  52447. CMD_HDR_ADDR_MODE_SEL_MSK
  52448. CMD_HDR_ADDR_MODE_SEL_OFF
  52449. CMD_HDR_CFL_MSK
  52450. CMD_HDR_CFL_OFF
  52451. CMD_HDR_CMD_MSK
  52452. CMD_HDR_CMD_OFF
  52453. CMD_HDR_DATA_SGL_LEN_MSK
  52454. CMD_HDR_DATA_SGL_LEN_OFF
  52455. CMD_HDR_DEVICE_ID_MSK
  52456. CMD_HDR_DEVICE_ID_OFF
  52457. CMD_HDR_DEV_ID_MSK
  52458. CMD_HDR_DEV_ID_OFF
  52459. CMD_HDR_DIF_SGL_LEN_MSK
  52460. CMD_HDR_DIF_SGL_LEN_OFF
  52461. CMD_HDR_DIR_MSK
  52462. CMD_HDR_DIR_OFF
  52463. CMD_HDR_FIRST_BURST_MSK
  52464. CMD_HDR_FIRST_BURST_OFF
  52465. CMD_HDR_FORCE_PHY_MSK
  52466. CMD_HDR_FORCE_PHY_OFF
  52467. CMD_HDR_FRAME_TYPE_MSK
  52468. CMD_HDR_FRAME_TYPE_OFF
  52469. CMD_HDR_IPTT_MSK
  52470. CMD_HDR_IPTT_OFF
  52471. CMD_HDR_MODE_MSK
  52472. CMD_HDR_MODE_OFF
  52473. CMD_HDR_MRFL_MSK
  52474. CMD_HDR_MRFL_OFF
  52475. CMD_HDR_NCQ_TAG_MSK
  52476. CMD_HDR_NCQ_TAG_OFF
  52477. CMD_HDR_PHY_ID_MSK
  52478. CMD_HDR_PHY_ID_OFF
  52479. CMD_HDR_PIR_MSK
  52480. CMD_HDR_PIR_OFF
  52481. CMD_HDR_PORT_MSK
  52482. CMD_HDR_PORT_OFF
  52483. CMD_HDR_PRIORITY_MSK
  52484. CMD_HDR_PRIORITY_OFF
  52485. CMD_HDR_RESET_MSK
  52486. CMD_HDR_RESET_OFF
  52487. CMD_HDR_RESP_REPORT_MSK
  52488. CMD_HDR_RESP_REPORT_OFF
  52489. CMD_HDR_SG_MOD_MSK
  52490. CMD_HDR_SG_MOD_OFF
  52491. CMD_HDR_SSP_FRAME_TYPE_MSK
  52492. CMD_HDR_SSP_FRAME_TYPE_OFF
  52493. CMD_HDR_SZ
  52494. CMD_HDR_TLR_CTRL_MSK
  52495. CMD_HDR_TLR_CTRL_OFF
  52496. CMD_HDR_UNCON_CMD_OFF
  52497. CMD_HDR_VDTL_MSK
  52498. CMD_HDR_VDTL_OFF
  52499. CMD_HDR_VERIFY_DTL_MSK
  52500. CMD_HDR_VERIFY_DTL_OFF
  52501. CMD_HD_EN
  52502. CMD_HEADER
  52503. CMD_HEADER_6B_READ
  52504. CMD_HEADER_6B_RESP
  52505. CMD_HEADER_HELLO
  52506. CMD_HEADER_LEN
  52507. CMD_HEADER_READ
  52508. CMD_HEADER_REK
  52509. CMD_HEADER_RESP
  52510. CMD_HEADER_WRITE
  52511. CMD_HEALTH_CHECK
  52512. CMD_HIRD
  52513. CMD_HIRES_WHEEL_GET_WHEEL_CAPABILITY
  52514. CMD_HIRES_WHEEL_SET_WHEEL_MODE
  52515. CMD_HI_RESOLUTION_SCROLLING_SET_HIGHRES_SCROLLING_MODE
  52516. CMD_HOLD_XMIT
  52517. CMD_HOST
  52518. CMD_HOST_CTL
  52519. CMD_HOST_RD_DATA
  52520. CMD_HOST_WR_DATA
  52521. CMD_HSEIE
  52522. CMD_HW2SW_CQ
  52523. CMD_HW2SW_EQ
  52524. CMD_HW2SW_MPT
  52525. CMD_HW2SW_SRQ
  52526. CMD_I
  52527. CMD_I2C_BITRATE
  52528. CMD_I2C_CONTINUE_WRITE
  52529. CMD_I2C_CONTINUE_WRITE_NOSTOP
  52530. CMD_I2C_DA_RD
  52531. CMD_I2C_DA_WR
  52532. CMD_I2C_DROP_SCL
  52533. CMD_I2C_DROP_SDA
  52534. CMD_I2C_GET_ACK
  52535. CMD_I2C_GET_BYTE
  52536. CMD_I2C_GET_BYTE_ACK
  52537. CMD_I2C_GET_CLK_SYNC
  52538. CMD_I2C_GET_CLK_SYNC_TO
  52539. CMD_I2C_GET_SPEED
  52540. CMD_I2C_IO
  52541. CMD_I2C_IO_BEGIN
  52542. CMD_I2C_IO_END
  52543. CMD_I2C_PUT_ACK
  52544. CMD_I2C_PUT_BYTE
  52545. CMD_I2C_PUT_BYTE_ACK
  52546. CMD_I2C_RD
  52547. CMD_I2C_READ
  52548. CMD_I2C_READ_SCL
  52549. CMD_I2C_READ_SDA
  52550. CMD_I2C_RELEASE_SCL
  52551. CMD_I2C_RELEASE_SDA
  52552. CMD_I2C_REPEATED_START
  52553. CMD_I2C_SCAN
  52554. CMD_I2C_SET_CLK_SYNC
  52555. CMD_I2C_SET_CLK_SYNC_TO
  52556. CMD_I2C_SET_SPEED
  52557. CMD_I2C_START
  52558. CMD_I2C_STOP
  52559. CMD_I2C_WR
  52560. CMD_I2C_WRITE
  52561. CMD_I2C_WRITE_NOSTOP
  52562. CMD_I2C_XFER
  52563. CMD_IAAD
  52564. CMD_IAR
  52565. CMD_IASETUP
  52566. CMD_IBI_THR_CTRL
  52567. CMD_IBL
  52568. CMD_IC_LINK_GPO_CTL_PIN_CFG
  52569. CMD_IC_LINK_GPO_CTL_PIN_CFG_NARGS
  52570. CMD_IC_LINK_GPO_CTL_PIN_CFG_NRESP
  52571. CMD_IDADD
  52572. CMD_IDLE_CLOCKS
  52573. CMD_IDU_ACK_CIRQ
  52574. CMD_IDU_DISABLE
  52575. CMD_IDU_ENABLE
  52576. CMD_IDU_READ_MODE
  52577. CMD_IDU_SET_DEST
  52578. CMD_IDU_SET_MASK
  52579. CMD_IDU_SET_MODE
  52580. CMD_IDX
  52581. CMD_IDX_MASK
  52582. CMD_ID_END
  52583. CMD_ID_MASK
  52584. CMD_ID_RF_WRITE_REG
  52585. CMD_ID_SET_TX_PWR_LEVEL
  52586. CMD_ID_TEST
  52587. CMD_ID_WRITE_PORT_UCHAR
  52588. CMD_ID_WRITE_PORT_ULONG
  52589. CMD_ID_WRITE_PORT_USHORT
  52590. CMD_IF_REV
  52591. CMD_IG_VLAN_REWRITE_MODE
  52592. CMD_INC_RESID
  52593. CMD_INDEX_OFFSET
  52594. CMD_INFO_NOTIFIED
  52595. CMD_INIT
  52596. CMD_INIT2INIT_QPEE
  52597. CMD_INIT2RTR_QPEE
  52598. CMD_INITCMDCOMPLETE
  52599. CMD_INITF_DEFAULT_MAC
  52600. CMD_INITIALIZE_DEVCMD2
  52601. CMD_INIT_GAIN_OP
  52602. CMD_INIT_HCA
  52603. CMD_INIT_IB
  52604. CMD_INIT_IDLE_MODE
  52605. CMD_INIT_LLT
  52606. CMD_INIT_LLT_ERR
  52607. CMD_INIT_PROV_INFO
  52608. CMD_INIT_PROV_INFO2
  52609. CMD_INIT_RESET_MODE
  52610. CMD_INIT_STATUS
  52611. CMD_INIT_TIMEOUT
  52612. CMD_INIT_v1
  52613. CMD_INQUIRY
  52614. CMD_INT
  52615. CMD_INT13
  52616. CMD_INT13_ALL
  52617. CMD_INTB_PIN_CFG
  52618. CMD_INTB_PIN_CFG_A10_NRESP
  52619. CMD_INTB_PIN_CFG_A20_NRESP
  52620. CMD_INTB_PIN_CFG_NARGS
  52621. CMD_INTERNAL_READ
  52622. CMD_INTERNAL_WRITE
  52623. CMD_INTERROGATE
  52624. CMD_INTERRUPT
  52625. CMD_INTR
  52626. CMD_INTRPT_CHECK_SOURCE
  52627. CMD_INTRPT_GENERATE_ACK
  52628. CMD_INTRPT_GENERATE_IRQ
  52629. CMD_INTRPT_READ_STATUS
  52630. CMD_INTR_COAL_CONVERT
  52631. CMD_INTR_PENDING
  52632. CMD_INV
  52633. CMD_INVALID
  52634. CMD_INVALIDATED_NOTIFY
  52635. CMD_INVALID_EN
  52636. CMD_INVALID_MASK
  52637. CMD_INVALID_ST
  52638. CMD_INV_ALL
  52639. CMD_INV_DEV_ENTRY
  52640. CMD_INV_IOMMU_ALL_PAGES_ADDRESS
  52641. CMD_INV_IOMMU_PAGES
  52642. CMD_INV_IOMMU_PAGES_GN_MASK
  52643. CMD_INV_IOMMU_PAGES_PDE_MASK
  52644. CMD_INV_IOMMU_PAGES_SIZE_MASK
  52645. CMD_INV_IOTLB_PAGES
  52646. CMD_INV_IRT
  52647. CMD_IOACCEL1
  52648. CMD_IOACCEL2
  52649. CMD_IOACCEL_DISABLED
  52650. CMD_IOCB_ABORT_EXTENDED_CN
  52651. CMD_IOCB_CLOSE_EXTENDED_CN
  52652. CMD_IOCB_CONTINUE64_CN
  52653. CMD_IOCB_CONTINUE_CN
  52654. CMD_IOCB_FCP_IBIDIR64_CR
  52655. CMD_IOCB_FCP_IBIDIR64_CX
  52656. CMD_IOCB_FCP_ITASKMGT64_CX
  52657. CMD_IOCB_LOGENTRY_ASYNC_CN
  52658. CMD_IOCB_LOGENTRY_CN
  52659. CMD_IOCB_MASK
  52660. CMD_IOCB_RCV_CONT64_CX
  52661. CMD_IOCB_RCV_ELS64_CX
  52662. CMD_IOCB_RCV_ELS_LIST64_CX
  52663. CMD_IOCB_RCV_SEQ64_CX
  52664. CMD_IOCB_RCV_SEQ_LIST64_CX
  52665. CMD_IOCB_RET_HBQE64_CN
  52666. CMD_IOCB_RET_XRI64_CX
  52667. CMD_IOCB_XMIT_MSEQ64_CR
  52668. CMD_IOCB_XMIT_MSEQ64_CX
  52669. CMD_IOCONFIG
  52670. CMD_IOCONFIG_ERR
  52671. CMD_IOCTL_PEND
  52672. CMD_IO_SPACE
  52673. CMD_IRAM_READ
  52674. CMD_IRAM_WRITE
  52675. CMD_IRQC
  52676. CMD_IR_GET
  52677. CMD_IR_RD
  52678. CMD_IR_WR
  52679. CMD_ISA_ARM_0
  52680. CMD_ISA_ARM_30
  52681. CMD_ISA_ARM_60
  52682. CMD_ISA_DELAY_TIME_2SECS
  52683. CMD_ISA_DELAY_TIME_4SECS
  52684. CMD_ISA_DELAY_TIME_8SECS
  52685. CMD_ISA_IDLE
  52686. CMD_ISA_RESET_PC
  52687. CMD_ISA_RESET_RELAYS
  52688. CMD_ISA_SWITCH_SETTINGS
  52689. CMD_ISA_VERSION_HUNDRETH
  52690. CMD_ISA_VERSION_INTEGER
  52691. CMD_ISA_VERSION_MINOR
  52692. CMD_ISA_VERSION_TENTH
  52693. CMD_ISCSI_COMMAND_INVALIDATE
  52694. CMD_ISCSI_DUMP_REQ
  52695. CMD_ISCSI_DUMP_STATUS
  52696. CMD_ISO14443A_CONFIG
  52697. CMD_ISO14443A_DEMOGAIN
  52698. CMD_ISO14443A_PROTOCOL_SELECT
  52699. CMD_ISO14443B_DEMOGAIN
  52700. CMD_ISO14443B_PROTOCOL_SELECT
  52701. CMD_ISO15693_PROTOCOL_SELECT
  52702. CMD_ISS_STPD
  52703. CMD_I_COMPLETE
  52704. CMD_JOIN
  52705. CMD_JUMP
  52706. CMD_Join
  52707. CMD_KB_CHROME
  52708. CMD_KB_CMOS
  52709. CMD_KEY
  52710. CMD_KEYBOARD_CMD
  52711. CMD_KEYPRESS
  52712. CMD_KEY_OFFSET
  52713. CMD_KILLED_INVALID_R2T_RCVD
  52714. CMD_KILLED_INVALID_STATSN_RCVD
  52715. CMD_LAST
  52716. CMD_LAST_INDEX
  52717. CMD_LCD
  52718. CMD_LCD_DRAWIMAGE
  52719. CMD_LCD_LED
  52720. CMD_LCD_ORIENTATION
  52721. CMD_LCD_RESET
  52722. CMD_LCL_LOOP_EN
  52723. CMD_LEAF_LOG_MESSAGE
  52724. CMD_LED
  52725. CMD_LED_AND_IR_CTRL
  52726. CMD_LED_BLINK
  52727. CMD_LED_MODE_OP
  52728. CMD_LED_OFF
  52729. CMD_LED_ON
  52730. CMD_LEGACY_DATA_SIZE_MASK
  52731. CMD_LEN
  52732. CMD_LENGTH_OFFSET
  52733. CMD_LINK
  52734. CMD_LINK_TIMER
  52735. CMD_LISTBSS
  52736. CMD_LNA_CONTROL
  52737. CMD_LNB
  52738. CMD_LNBCONFIG
  52739. CMD_LNBDCLEVEL
  52740. CMD_LNBPCBCONFIG
  52741. CMD_LNBSEND
  52742. CMD_LNBSENDTONEBST
  52743. CMD_LNBUPDREPLY
  52744. CMD_LNB_CONFIG
  52745. CMD_LNB_PCB_CONFIG
  52746. CMD_LNB_SEND_DISEQC
  52747. CMD_LNB_SEND_TONEBURST
  52748. CMD_LNB_SET_DC_LEVEL
  52749. CMD_LNB_UPDATE_REPLY
  52750. CMD_LOAD
  52751. CMD_LOAD_CR
  52752. CMD_LOAD_EFFECT_CONTEXT
  52753. CMD_LOAD_EFFECT_CONTEXT_PACKET
  52754. CMD_LOAD_STATE
  52755. CMD_LOGICAL_UPLINK
  52756. CMD_LONG
  52757. CMD_LONG_RSP
  52758. CMD_LOSE_SYNC
  52759. CMD_LOW_LEVEL_OP
  52760. CMD_LP
  52761. CMD_LP_EN
  52762. CMD_LRESET
  52763. CMD_LR_STATUS
  52764. CMD_MAC_ADDR
  52765. CMD_MAC_CONTROL
  52766. CMD_MAC_MULTICAST_ADR
  52767. CMD_MAC_REG_ACCESS
  52768. CMD_MAC_REG_MAP
  52769. CMD_MAD_IFC
  52770. CMD_MAGIC_PKT
  52771. CMD_MAILBOX_IDLE
  52772. CMD_MANAGE_SIGNAL
  52773. CMD_MANUAL
  52774. CMD_MAPPED
  52775. CMD_MAP_00
  52776. CMD_MAP_01
  52777. CMD_MAP_10
  52778. CMD_MAP_11
  52779. CMD_MAP_CHANNEL_REQ
  52780. CMD_MAP_CHANNEL_RESP
  52781. CMD_MAP_EQ
  52782. CMD_MAP_FA
  52783. CMD_MAP_ICM
  52784. CMD_MAP_ICM_AUX
  52785. CMD_MASK
  52786. CMD_MATH
  52787. CMD_MAX_ARGS_COUNT
  52788. CMD_MAX_CONFIG
  52789. CMD_MAX_COUNT
  52790. CMD_MAX_IOCB_CMD
  52791. CMD_MAX_NUM
  52792. CMD_MBENABLE
  52793. CMD_MBINIT
  52794. CMD_MCPU_FW_INFO
  52795. CMD_MCPU_FW_INFO_OLD
  52796. CMD_MCSETUP
  52797. CMD_MEASUREMENT
  52798. CMD_MEMORY_SPACE
  52799. CMD_MEM_RD
  52800. CMD_MEM_READ
  52801. CMD_MEM_WR
  52802. CMD_MEM_WRITE
  52803. CMD_MEM_WRT_INVALIDATE
  52804. CMD_MESH_ACCESS
  52805. CMD_MESH_CONFIG
  52806. CMD_MESH_CONFIG_OLD
  52807. CMD_MESSAGE
  52808. CMD_MESSAGE_FIELD
  52809. CMD_MGID_HASH
  52810. CMD_MIGRATE_SUBVNIC
  52811. CMD_MISC
  52812. CMD_MODE
  52813. CMD_MODE_32b
  52814. CMD_MODE_40b_AB
  52815. CMD_MODE_40b_BA
  52816. CMD_MODE_ALL_LP
  52817. CMD_MODE_CHANNEL_NUMBER_MASK
  52818. CMD_MODE_CHANNEL_NUMBER_SHIFT
  52819. CMD_MODE_CTL
  52820. CMD_MODE_CTL2
  52821. CMD_MODE_DATA_WIDTH_16_BIT
  52822. CMD_MODE_DATA_WIDTH_8_BIT
  52823. CMD_MODE_DATA_WIDTH_9_BIT
  52824. CMD_MODE_DATA_WIDTH_MASK
  52825. CMD_MODE_DATA_WIDTH_OPTION1
  52826. CMD_MODE_DATA_WIDTH_OPTION2
  52827. CMD_MODE_DISC
  52828. CMD_MODE_EVENTS
  52829. CMD_MODE_INIT
  52830. CMD_MODE_MASK
  52831. CMD_MODE_NOT_SUPPORTED
  52832. CMD_MODE_NO_GATE
  52833. CMD_MODE_POLLING
  52834. CMD_MODE_STS
  52835. CMD_MODE_STS_CLR
  52836. CMD_MODE_STS_CTL
  52837. CMD_MODE_STS_FLAG
  52838. CMD_MODE_TARG
  52839. CMD_MODE_TE_GATE
  52840. CMD_MODE_UNKNOWN
  52841. CMD_MODIFY_CLOCK
  52842. CMD_MODIFY_CLOCK_FD_BIT
  52843. CMD_MODIFY_CLOCK_S_BIT
  52844. CMD_MODIFY_CLOCK_T_BIT
  52845. CMD_MOD_STAT_CFG
  52846. CMD_MONO
  52847. CMD_MONTR_DATA_SEL
  52848. CMD_MOVE
  52849. CMD_MOVE_LEN
  52850. CMD_MPEGCFG
  52851. CMD_MPEGCONFIG
  52852. CMD_MPEG_CONFIG
  52853. CMD_MPEG_INIT
  52854. CMD_MPEG_ONOFF
  52855. CMD_MSC
  52856. CMD_MSGACCEPTED
  52857. CMD_MSGID_LEN
  52858. CMD_MSGID_RESP_REQ
  52859. CMD_MSGID_WRITE
  52860. CMD_MSPRO_MG_RKEY
  52861. CMD_MSPRO_MG_SKEY
  52862. CMD_NAME
  52863. CMD_NEED_RSP
  52864. CMD_NET_TYPE
  52865. CMD_NEW
  52866. CMD_NGAMMAC
  52867. CMD_NIC_CFG
  52868. CMD_NIC_CFG_CHK
  52869. CMD_NOISE_HIST
  52870. CMD_NONE
  52871. CMD_NOP
  52872. CMD_NOTIFY
  52873. CMD_NOTIFYGUEST_TYPE
  52874. CMD_NOTIFY_END_OF_BUFFER
  52875. CMD_NOTIFY_PIPE_TIME
  52876. CMD_NOTIFY_STREAM_TIME
  52877. CMD_NOT_EXEC
  52878. CMD_NOT_SUPPORT
  52879. CMD_NO_AUTH
  52880. CMD_NO_LEN_CHK
  52881. CMD_NO_RESP
  52882. CMD_NO_SKB
  52883. CMD_NPE_CLR_PIPE
  52884. CMD_NPE_START
  52885. CMD_NPE_STEP
  52886. CMD_NPE_STOP
  52887. CMD_NSC
  52888. CMD_NULL
  52889. CMD_NULL_DATA
  52890. CMD_NUM_OF_WEP_KEYS
  52891. CMD_OAN
  52892. CMD_OFF
  52893. CMD_OFFSET
  52894. CMD_OK
  52895. CMD_OLS_GET_CEILING
  52896. CMD_OLS_GET_LIMITS
  52897. CMD_OLS_SET_CEILING
  52898. CMD_OLS_SET_LIMITS
  52899. CMD_OLS_SMTTEST_STOP
  52900. CMD_OLS_SMT_LEDOFF
  52901. CMD_OLS_SMT_LEDON
  52902. CMD_ON
  52903. CMD_ONLY_STRT
  52904. CMD_OOB_BURST
  52905. CMD_OOB_SPACE
  52906. CMD_OPEN
  52907. CMD_OPENF_IG_DESCCACHE
  52908. CMD_OPENF_OPROM
  52909. CMD_OPENF_RQ_ENABLE_THEN_POST
  52910. CMD_OPEN_STATUS
  52911. CMD_OPERATION
  52912. CMD_OPTION_WAITFORRSP
  52913. CMD_OPT_802_11_RF_CHANNEL_GET
  52914. CMD_OPT_802_11_RF_CHANNEL_SET
  52915. CMD_OP_BATCH_BUFFER
  52916. CMD_OP_DESTBUFFER_INFO
  52917. CMD_OP_DISPLAYBUFFER_INFO
  52918. CMD_OP_FRONTBUFFER_INFO
  52919. CMD_OP_WAIT_FOR_EVENT
  52920. CMD_OP_Z_BUFFER_INFO
  52921. CMD_OUT
  52922. CMD_OUT_FLUSH
  52923. CMD_OVERHEAD_SIZE
  52924. CMD_OVERLAY_OFFLOAD_CFG
  52925. CMD_OVERLAY_OFFLOAD_CTRL
  52926. CMD_OVE_DATA
  52927. CMD_OVE_LEN
  52928. CMD_OV_LEN
  52929. CMD_OWNER_HW
  52930. CMD_OWNER_SW
  52931. CMD_O_FID_A
  52932. CMD_O_FID_B
  52933. CMD_PACKET_FILTER
  52934. CMD_PACKET_FILTER_ALL
  52935. CMD_PACKET_SIZE
  52936. CMD_PADBYTES
  52937. CMD_PADDING
  52938. CMD_PAD_EN
  52939. CMD_PAGE_READ
  52940. CMD_PARA1_SHIFT
  52941. CMD_PARA2_SHIFT
  52942. CMD_PARAMETER_CHANGE_COL
  52943. CMD_PARAMETER_READ
  52944. CMD_PARAMETER_STREAM_OUT
  52945. CMD_PARAM_OUTPUT_PIPE
  52946. CMD_PARK
  52947. CMD_PARK_CNT
  52948. CMD_PASS
  52949. CMD_PAUSE
  52950. CMD_PAUSE_FWD
  52951. CMD_PAUSE_ONE_STREAM
  52952. CMD_PAUSE_STREAM
  52953. CMD_PCIAUX
  52954. CMD_PCIBAP
  52955. CMD_PC_TO_RDR_ESCAPE
  52956. CMD_PC_TO_RDR_GETPARAMETERS
  52957. CMD_PC_TO_RDR_GETSLOTSTATUS
  52958. CMD_PC_TO_RDR_ICCCLOCK
  52959. CMD_PC_TO_RDR_ICCPOWEROFF
  52960. CMD_PC_TO_RDR_ICCPOWERON
  52961. CMD_PC_TO_RDR_OK_SECURE
  52962. CMD_PC_TO_RDR_RESETPARAMETERS
  52963. CMD_PC_TO_RDR_SECURE
  52964. CMD_PC_TO_RDR_SETPARAMETERS
  52965. CMD_PC_TO_RDR_TEST_SECURE
  52966. CMD_PC_TO_RDR_XFRBLOCK
  52967. CMD_PENTRG
  52968. CMD_PERBI
  52969. CMD_PER_LUN
  52970. CMD_PFILTER_ALL_MULTICAST
  52971. CMD_PFILTER_BROADCAST
  52972. CMD_PFILTER_DIRECTED
  52973. CMD_PFILTER_MULTICAST
  52974. CMD_PFILTER_PROMISCUOUS
  52975. CMD_PGAMMAC
  52976. CMD_PG_GET_MAX_ID
  52977. CMD_PG_GET_NAME
  52978. CMD_PG_GET_STATE
  52979. CMD_PG_QUERY_ABI
  52980. CMD_PG_SET_STATE
  52981. CMD_PHY_CONFIG0
  52982. CMD_PHY_CONFIG1
  52983. CMD_PHY_CTL
  52984. CMD_PHY_MODE_21
  52985. CMD_PHY_TEST_COUNT0
  52986. CMD_PHY_TEST_COUNT1
  52987. CMD_PHY_TEST_COUNT2
  52988. CMD_PHY_TIMER
  52989. CMD_PID_DISABLE
  52990. CMD_PID_ENABLE
  52991. CMD_PIPE_ID
  52992. CMD_PIPE_SAMPLE_COUNT
  52993. CMD_PIPE_SPL_COUNT
  52994. CMD_PIPE_STATE
  52995. CMD_PI_ERR
  52996. CMD_PKT_STATUS_TIMEOUT_US
  52997. CMD_PLL_PHY_CONFIG
  52998. CMD_PL_TIMER
  52999. CMD_PM_INDEX
  53000. CMD_PN
  53001. CMD_PND_FIFO_CTL0
  53002. CMD_PND_FIFO_CTL1
  53003. CMD_POLL_TOKEN
  53004. CMD_PORT
  53005. CMD_PORT_AUTO_EN
  53006. CMD_PORT_DNLD_INT_MASK
  53007. CMD_PORT_LAYER_TIMER1
  53008. CMD_PORT_MEM_BIST_CTL
  53009. CMD_PORT_MEM_BIST_STAT0
  53010. CMD_PORT_MEM_BIST_STAT1
  53011. CMD_PORT_MEM_CTL0
  53012. CMD_PORT_MEM_CTL1
  53013. CMD_PORT_RD_LEN_EN
  53014. CMD_PORT_SEL_COUNT
  53015. CMD_PORT_SLCT
  53016. CMD_PORT_UPLD_INT_MASK
  53017. CMD_POWER
  53018. CMD_POWEROFF
  53019. CMD_POWER_CYCLE
  53020. CMD_POWER_DOWN
  53021. CMD_POWER_DOWN_A10_NRESP
  53022. CMD_POWER_DOWN_A20_NARGS
  53023. CMD_POWER_DOWN_A20_NRESP
  53024. CMD_POWER_MODE
  53025. CMD_POWER_OFF
  53026. CMD_POWER_ON
  53027. CMD_POWER_SAVING_OP
  53028. CMD_POWER_UP
  53029. CMD_POWER_UP_A10_NARGS
  53030. CMD_POWER_UP_A10_NRESP
  53031. CMD_POWER_UP_A20_NARGS
  53032. CMD_POWER_UP_A20_NRESP
  53033. CMD_PPCEE
  53034. CMD_PRBL_EN
  53035. CMD_PREFIX
  53036. CMD_PREFIX_RESET
  53037. CMD_PREFIX_SET
  53038. CMD_PROBE_REQ
  53039. CMD_PROBE_RESP
  53040. CMD_PROGRAM_PAGE
  53041. CMD_PROGRAM_PIECE
  53042. CMD_PROGRAM_SPARE_AREA
  53043. CMD_PROMISC
  53044. CMD_PROMISC_MODE
  53045. CMD_PROTOCOL_ERR
  53046. CMD_PROV_INFO_UPDATE
  53047. CMD_PROXY_BY_BDF
  53048. CMD_PROXY_BY_INDEX
  53049. CMD_PSC
  53050. CMD_PSE
  53051. CMD_PSPE
  53052. CMD_PSPNODES
  53053. CMD_PS_POLL
  53054. CMD_PURGE_PIPE_DCMDS
  53055. CMD_PURGE_STREAM_DCMDS
  53056. CMD_PUTTLV
  53057. CMD_PWCTR1
  53058. CMD_PWCTR2
  53059. CMD_PWCTR3
  53060. CMD_PWCTR4
  53061. CMD_PWCTR5
  53062. CMD_QID
  53063. CMD_QOS_NULL_DATA
  53064. CMD_QP_DISABLE
  53065. CMD_QP_ENABLE
  53066. CMD_QP_RQWQ
  53067. CMD_QP_STATS_CLEAR
  53068. CMD_QP_STATS_DUMP
  53069. CMD_QUE
  53070. CMD_QUERY_ADAPTER
  53071. CMD_QUERY_CQ
  53072. CMD_QUERY_DDR
  53073. CMD_QUERY_DEBUG_MSG
  53074. CMD_QUERY_DEV_LIM
  53075. CMD_QUERY_EQ
  53076. CMD_QUERY_FW
  53077. CMD_QUERY_HCA
  53078. CMD_QUERY_MPT
  53079. CMD_QUERY_QPEE
  53080. CMD_QUERY_SRQ
  53081. CMD_QUEUE_FULL
  53082. CMD_QUE_RING_BUF64_CN
  53083. CMD_QUE_RING_BUF_CN
  53084. CMD_QUE_XRI64_CX
  53085. CMD_QUE_XRI_BUF64_CX
  53086. CMD_QUE_XRI_BUF_CX
  53087. CMD_QUIET_ELEMENT_SET_STATE
  53088. CMD_Q_CACHE_BASE
  53089. CMD_Q_CACHE_INC
  53090. CMD_Q_DEPTH
  53091. CMD_Q_ERROR
  53092. CMD_Q_INT_STATUS_BASE
  53093. CMD_Q_SIZE
  53094. CMD_Q_STATUS_BASE
  53095. CMD_Q_STATUS_INCR
  53096. CMD_R1
  53097. CMD_R2
  53098. CMD_R3
  53099. CMD_R3_DIFF
  53100. CMD_R820T_READ
  53101. CMD_R820T_WRITE
  53102. CMD_RADIO_CALIBRATE
  53103. CMD_RADIO_OFF
  53104. CMD_RADIO_ON
  53105. CMD_RADOR_DETECT_OP
  53106. CMD_RANDOM_READ
  53107. CMD_RANDOM_WRITE
  53108. CMD_RCGR
  53109. CMD_RCGR_DIRTY_CFG
  53110. CMD_RCGR_ROOT_OFF
  53111. CMD_RCGR_UPDATE
  53112. CMD_RCV_DISABLE
  53113. CMD_RCV_ELS_REQ64_CX
  53114. CMD_RCV_ELS_REQ_CX
  53115. CMD_RCV_ENABLE
  53116. CMD_RCV_SEQUENCE64_CX
  53117. CMD_RCV_SEQUENCE_CX
  53118. CMD_RC_CCA
  53119. CMD_RC_CSMACA
  53120. CMD_RC_IDLE
  53121. CMD_RC_MEAS
  53122. CMD_RC_PC_RESET
  53123. CMD_RC_PC_RESET_NO_WAIT
  53124. CMD_RC_PHY_RDY
  53125. CMD_RC_RESET
  53126. CMD_RC_RX
  53127. CMD_RC_SLEEP
  53128. CMD_RC_TX
  53129. CMD_RD
  53130. CMD_RDR_TO_PC_DATABLOCK
  53131. CMD_RDR_TO_PC_ESCAPE
  53132. CMD_RDR_TO_PC_OK_SECURE
  53133. CMD_RDR_TO_PC_PARAMETERS
  53134. CMD_RDR_TO_PC_SLOTSTATUS
  53135. CMD_RD_DATA_MEM
  53136. CMD_RD_ECS_REG
  53137. CMD_RD_ERR_STAT
  53138. CMD_RD_FRAME
  53139. CMD_RD_INS_MEM
  53140. CMD_RD_NOACK
  53141. CMD_RD_REG
  53142. CMD_RD_TEST
  53143. CMD_READ
  53144. CMD_READCFG
  53145. CMD_READMODIFYWRITE
  53146. CMD_READY
  53147. CMD_READ_ACR
  53148. CMD_READ_AMBIENT_TEMPERATURE
  53149. CMD_READ_BAR_MAX_W
  53150. CMD_READ_BATTERY_STATUS
  53151. CMD_READ_BATTERY_TYPE
  53152. CMD_READ_BATT_ERR_CODE
  53153. CMD_READ_BATT_TEMPERATURE
  53154. CMD_READ_BAT_MIN_W
  53155. CMD_READ_BLOCKS_LOCK_STATUS
  53156. CMD_READ_BOARD_FREQ
  53157. CMD_READ_BOARD_ID
  53158. CMD_READ_BYTE
  53159. CMD_READ_CURRENT
  53160. CMD_READ_DATA
  53161. CMD_READ_EFUSE_MAP
  53162. CMD_READ_EFUSE_MAP_ERR
  53163. CMD_READ_EXT_SCI_MASK
  53164. CMD_READ_GAUGE_DATA
  53165. CMD_READ_GAUGE_ID
  53166. CMD_READ_GAUGE_U16
  53167. CMD_READ_LOCATION
  53168. CMD_READ_MEMORY
  53169. CMD_READ_MGM
  53170. CMD_READ_MODIFY_WRITE
  53171. CMD_READ_MPPT_ACTIVE
  53172. CMD_READ_MPPT_LIMIT
  53173. CMD_READ_MTT
  53174. CMD_READ_OLS
  53175. CMD_READ_PASSIVE
  53176. CMD_READ_REGISTER
  53177. CMD_READ_SNR
  53178. CMD_READ_SOC
  53179. CMD_READ_TEMP
  53180. CMD_READ_UNKNOWN
  53181. CMD_READ_VIN
  53182. CMD_READ_VIN_SCALED
  53183. CMD_READ_VOLTAGE
  53184. CMD_READ_WATCHDOG_TIMEOUT
  53185. CMD_REBOOT
  53186. CMD_REBOOT_SYSTEM
  53187. CMD_RECEIVER_MODE
  53188. CMD_RECEIVER_OFF
  53189. CMD_RECEIVER_ON
  53190. CMD_RECV_CDB
  53191. CMD_RECV_CMD
  53192. CMD_RECV_DATA
  53193. CMD_RECV_MSG
  53194. CMD_REG
  53195. CMD_REG1
  53196. CMD_REG2
  53197. CMD_REG_CLEN_MASK
  53198. CMD_REG_CLEN_SHIFT
  53199. CMD_REG_CMD_MASK
  53200. CMD_REG_CMD_SHIFT
  53201. CMD_REG_MASK
  53202. CMD_REG_READ
  53203. CMD_REG_RLEN_MASK
  53204. CMD_REG_RLEN_SHIFT
  53205. CMD_REG_STAT_MASK
  53206. CMD_REG_STAT_SHIFT
  53207. CMD_REG_WRITE
  53208. CMD_RELEASE_POWERDOWN_NOID
  53209. CMD_RELIC_R_BUFFER
  53210. CMD_REMAIN_ON_CHANNEL
  53211. CMD_REMOVE_PEER
  53212. CMD_REPEAT
  53213. CMD_REPLY_RETRY
  53214. CMD_REPORT_HEAD
  53215. CMD_REPORT_ID_OFFSET
  53216. CMD_REPORT_MAX_BASELINE
  53217. CMD_REPORT_MIN_BASELINE
  53218. CMD_REQ0
  53219. CMD_REQUEST
  53220. CMD_REQUEST_IN
  53221. CMD_REQUEST_OUT
  53222. CMD_REQ_INCR
  53223. CMD_RES
  53224. CMD_RESEL3
  53225. CMD_RESELECT
  53226. CMD_RESEL_ATN3
  53227. CMD_RESET
  53228. CMD_RESETCHIP
  53229. CMD_RESETSCSI
  53230. CMD_RESET_ASSERT
  53231. CMD_RESET_BAT_MINMAX_W
  53232. CMD_RESET_CHIP
  53233. CMD_RESET_COUNT
  53234. CMD_RESET_DEASSERT
  53235. CMD_RESET_DEV
  53236. CMD_RESET_EC
  53237. CMD_RESET_EC_SOFT
  53238. CMD_RESET_GET_MAX_ID
  53239. CMD_RESET_I2C
  53240. CMD_RESET_MAX
  53241. CMD_RESET_MODULE
  53242. CMD_RESID_LEN
  53243. CMD_RESIZE_CQ
  53244. CMD_RESP_MASK
  53245. CMD_RESP_SRAM
  53246. CMD_RESP_TIME
  53247. CMD_RESTART
  53248. CMD_RESULT
  53249. CMD_RESYNC_AUDIO_INPUTS
  53250. CMD_RESYNC_RX
  53251. CMD_RES_PIPE
  53252. CMD_RET
  53253. CMD_RETCONF
  53254. CMD_RETDEVS
  53255. CMD_RETRIES
  53256. CMD_RETRY
  53257. CMD_RETSETUP
  53258. CMD_RET_802_11_ASSOCIATE
  53259. CMD_RET_ACK
  53260. CMD_RET_DATA
  53261. CMD_RET_VALUES
  53262. CMD_RET_XRI_BUF64_CX
  53263. CMD_RET_XRI_BUF_CX
  53264. CMD_RF_REG_ACCESS
  53265. CMD_RF_REG_MAP
  53266. CMD_RGBBLK
  53267. CMD_RINGBUF_CONSOLE_GET_FIFO
  53268. CMD_RINGBUF_CONSOLE_QUERY_ABI
  53269. CMD_RINGBUF_CONSOLE_READ
  53270. CMD_RINGBUF_CONSOLE_WRITE
  53271. CMD_RINGTONE
  53272. CMD_RING_ABORT
  53273. CMD_RING_ENTRIES
  53274. CMD_RING_NOTE
  53275. CMD_RING_PAUSE
  53276. CMD_RING_RSVD_BITS
  53277. CMD_RING_RUNNING
  53278. CMD_RING_STATE_ABORTED
  53279. CMD_RING_STATE_RUNNING
  53280. CMD_RING_STATE_STOPPED
  53281. CMD_RING_VOLUME
  53282. CMD_RLS
  53283. CMD_RMT_LOOP_EN
  53284. CMD_ROLE_DISABLE
  53285. CMD_ROLE_ENABLE
  53286. CMD_ROLE_START
  53287. CMD_ROLE_STOP
  53288. CMD_ROOT_EN
  53289. CMD_ROOT_GET_FEATURE
  53290. CMD_ROOT_GET_PROTOCOL_VERSION
  53291. CMD_ROOT_OFF
  53292. CMD_ROUTE_SLCT
  53293. CMD_RPN
  53294. CMD_RRB
  53295. CMD_RSETATN
  53296. CMD_RSS_CPU
  53297. CMD_RSS_KEY
  53298. CMD_RST2INIT_QPEE
  53299. CMD_RST_PRC_EBUSY
  53300. CMD_RST_PRC_OTHERS
  53301. CMD_RST_PRC_SUCCESS
  53302. CMD_RTR
  53303. CMD_RTR2RTS_QPEE
  53304. CMD_RTS2RTS_QPEE
  53305. CMD_RTS2SQD_QPEE
  53306. CMD_RUN
  53307. CMD_RUNT_FILTER_DIS
  53308. CMD_RUN_FW
  53309. CMD_RXFIFO
  53310. CMD_RXFIFO_READ
  53311. CMD_RXOFF
  53312. CMD_RXON
  53313. CMD_RXRESET
  53314. CMD_RX_BUF
  53315. CMD_RX_CRC_EXC
  53316. CMD_RX_CRC_FRC
  53317. CMD_RX_CRC_INIT
  53318. CMD_RX_DIS
  53319. CMD_RX_EN
  53320. CMD_RX_ENA
  53321. CMD_RX_ENABLE
  53322. CMD_RX_EXT_MESSAGE
  53323. CMD_RX_MESSAGE
  53324. CMD_RX_MESSAGE_FD
  53325. CMD_RX_MP_SRCH
  53326. CMD_RX_MSG_REJ
  53327. CMD_RX_OVERFLOW
  53328. CMD_RX_PAUSE_IGNORE
  53329. CMD_RX_RESET
  53330. CMD_RX_RST
  53331. CMD_RX_STD_MESSAGE
  53332. CMD_SAMPLE_RATE_SET
  53333. CMD_SAS_CTL0
  53334. CMD_SAS_CTL1
  53335. CMD_SAS_CTL2
  53336. CMD_SAS_CTL3
  53337. CMD_SATA_PORT_MEM_CTL0
  53338. CMD_SATA_PORT_MEM_CTL1
  53339. CMD_SAVECFG
  53340. CMD_SCAN
  53341. CMD_SCANCODE
  53342. CMD_SCAN_PROBE_DELAY_TIME
  53343. CMD_SCAN_RADIO_TYPE_BG
  53344. CMD_SCAN_TYPE_ACTIVE
  53345. CMD_SCAN_TYPE_PASSIVE
  53346. CMD_SCPI_CAPABILITIES
  53347. CMD_SCSI
  53348. CMD_SCSITASKMGMT_TYPE
  53349. CMD_SCSI_RESET
  53350. CMD_SCSI_STATUS
  53351. CMD_SCSI_TYPE
  53352. CMD_SDC_RESET
  53353. CMD_SDRVDIR
  53354. CMD_SELATN_STOP
  53355. CMD_SELECT
  53356. CMD_SELECTATN
  53357. CMD_SELECTATN3
  53358. CMD_SELECTATNSTOP
  53359. CMD_SELECTWOATN
  53360. CMD_SELECT_ATN
  53361. CMD_SEL_ATN3
  53362. CMD_SEL_EP
  53363. CMD_SEL_EP_CLRI
  53364. CMD_SEM
  53365. CMD_SEMA_CLAIM_AND_READ
  53366. CMD_SEMA_RELEASE
  53367. CMD_SEND
  53368. CMD_SEND_DATA
  53369. CMD_SEND_FRAME
  53370. CMD_SEND_IN_RFKILL
  53371. CMD_SEND_IRQA
  53372. CMD_SEND_MSG
  53373. CMD_SEND_STATUS
  53374. CMD_SENSOR_CAPABILITIES
  53375. CMD_SENSOR_INFO
  53376. CMD_SENSOR_VALUE
  53377. CMD_SENT
  53378. CMD_SEQUENCE
  53379. CMD_SEQ_FIFO_LOAD
  53380. CMD_SEQ_FIFO_STORE
  53381. CMD_SEQ_IN_PTR
  53382. CMD_SEQ_KEY
  53383. CMD_SEQ_LOAD
  53384. CMD_SEQ_OUT_PTR
  53385. CMD_SEQ_STORE
  53386. CMD_SET
  53387. CMD_SETADDRESS
  53388. CMD_SETATN
  53389. CMD_SETBAUD
  53390. CMD_SETCW
  53391. CMD_SETMODE
  53392. CMD_SETMULTICAST
  53393. CMD_SETPCF
  53394. CMD_SETPHYREG
  53395. CMD_SETTONE
  53396. CMD_SETUP_STREAM
  53397. CMD_SETVOLTAGE
  53398. CMD_SETWAKEMASK
  53399. CMD_SET_ADDR
  53400. CMD_SET_ATN
  53401. CMD_SET_AUTOWAK
  53402. CMD_SET_BCN_MODE
  53403. CMD_SET_BOOT2_VER
  53404. CMD_SET_BUSPARAMS_FD_REQ
  53405. CMD_SET_BUSPARAMS_FD_RESP
  53406. CMD_SET_BUSPARAMS_REQ
  53407. CMD_SET_BUSPARAMS_RESP
  53408. CMD_SET_BUS_PARAMS
  53409. CMD_SET_CCSEN
  53410. CMD_SET_CCSH
  53411. CMD_SET_CFG
  53412. CMD_SET_CLOCK_VALUE
  53413. CMD_SET_CMD12EN
  53414. CMD_SET_CMLTE
  53415. CMD_SET_CRC16C
  53416. CMD_SET_CRC7C
  53417. CMD_SET_CRC7C_BITS
  53418. CMD_SET_CRC7C_INTERNAL
  53419. CMD_SET_CRCSTE
  53420. CMD_SET_CTRL_MODE
  53421. CMD_SET_DARS
  53422. CMD_SET_DATA
  53423. CMD_SET_DATW_1
  53424. CMD_SET_DATW_4
  53425. CMD_SET_DATW_8
  53426. CMD_SET_DCON_POWER
  53427. CMD_SET_DEBUG_MSG
  53428. CMD_SET_DEFAULT_VLAN
  53429. CMD_SET_DELAY
  53430. CMD_SET_DEVICE_PWR_STATE
  53431. CMD_SET_DEV_STAT
  53432. CMD_SET_DRIVERMODE_REQ
  53433. CMD_SET_DVFS
  53434. CMD_SET_DWEN
  53435. CMD_SET_EC_WAKEUP_TIMER
  53436. CMD_SET_EP_STAT
  53437. CMD_SET_EVENT
  53438. CMD_SET_EXTMIDI
  53439. CMD_SET_FAN
  53440. CMD_SET_FREQ
  53441. CMD_SET_GOLDCODE
  53442. CMD_SET_GPIODIR
  53443. CMD_SET_GPIOEN
  53444. CMD_SET_GPIOMODE
  53445. CMD_SET_GPIOOUT
  53446. CMD_SET_GPIO_INT
  53447. CMD_SET_GPIO_PIN
  53448. CMD_SET_IB
  53449. CMD_SET_ICM_SIZE
  53450. CMD_SET_KEYS
  53451. CMD_SET_LNA_AGC
  53452. CMD_SET_LNA_GAIN
  53453. CMD_SET_MAC_ADDR
  53454. CMD_SET_MIB
  53455. CMD_SET_MIDI_VOL
  53456. CMD_SET_MIXER_AGC
  53457. CMD_SET_MIXER_GAIN
  53458. CMD_SET_MODE
  53459. CMD_SET_MPPT_LIMIT
  53460. CMD_SET_MT32
  53461. CMD_SET_OPDM
  53462. CMD_SET_PACKING
  53463. CMD_SET_PEER_STATE
  53464. CMD_SET_PROPERTY
  53465. CMD_SET_PROPERTY_NARGS
  53466. CMD_SET_PROPERTY_NRESP
  53467. CMD_SET_PS_MODE
  53468. CMD_SET_RBSY
  53469. CMD_SET_RF_BW_NOT_LISTED
  53470. CMD_SET_RIDXC_BITS
  53471. CMD_SET_RIDXC_INDEX
  53472. CMD_SET_RIDXC_NO
  53473. CMD_SET_RTYP_17B
  53474. CMD_SET_RTYP_6B
  53475. CMD_SET_RTYP_NO
  53476. CMD_SET_SAMPLE_RATE
  53477. CMD_SET_SCL
  53478. CMD_SET_SDA
  53479. CMD_SET_SLEEPMODE
  53480. CMD_SET_SLEEP_MODE
  53481. CMD_SET_TBIT
  53482. CMD_SET_TEMPLATE
  53483. CMD_SET_THERMOSTATE
  53484. CMD_SET_THERMOSTATE2
  53485. CMD_SET_TIMER_INTERRUPT
  53486. CMD_SET_TONE
  53487. CMD_SET_TRANSCEIVER_MODE
  53488. CMD_SET_TXVGA_GAIN
  53489. CMD_SET_TYPE
  53490. CMD_SET_VALUE_NOT_LISTED
  53491. CMD_SET_VCO
  53492. CMD_SET_VCOFREQ
  53493. CMD_SET_VGA_GAIN
  53494. CMD_SET_WAKE_TIMER
  53495. CMD_SET_WDAT
  53496. CMD_SFLCK_KEY
  53497. CMD_SFR_READ
  53498. CMD_SFR_WRITE
  53499. CMD_SFUNL_KEY
  53500. CMD_SHARED_DESC_HDR
  53501. CMD_SHIFT
  53502. CMD_SI5351C_READ
  53503. CMD_SI5351C_WRITE
  53504. CMD_SIG0
  53505. CMD_SIG1
  53506. CMD_SIG2
  53507. CMD_SIG3
  53508. CMD_SIG4
  53509. CMD_SIGNATURE
  53510. CMD_SIGNED
  53511. CMD_SINGLE_READ
  53512. CMD_SINGLE_WRITE
  53513. CMD_SIZE
  53514. CMD_SIZE_HBUFFER
  53515. CMD_SIZE_HUGE
  53516. CMD_SIZE_NORMAL
  53517. CMD_SLEEP
  53518. CMD_SL_MODE0
  53519. CMD_SL_MODE1
  53520. CMD_SMARTCARD
  53521. CMD_SMART_CONFIG_SET_GROUP_KEY
  53522. CMD_SMART_CONFIG_START
  53523. CMD_SMART_CONFIG_STOP
  53524. CMD_SNC
  53525. CMD_SND_BREAK
  53526. CMD_SNSLEN
  53527. CMD_SNSP
  53528. CMD_SOFTRESET
  53529. CMD_SOFT_RESET
  53530. CMD_SOFT_RESET_STATUS
  53531. CMD_SOLAR_SET_LIGHT_MEASURE
  53532. CMD_SP
  53533. CMD_SPARE_AREA_READ
  53534. CMD_SPEED_10
  53535. CMD_SPEED_100
  53536. CMD_SPEED_1000
  53537. CMD_SPEED_2500
  53538. CMD_SPEED_MASK
  53539. CMD_SPEED_SHIFT
  53540. CMD_SPIFLASH_ERASE
  53541. CMD_SPIFLASH_READ
  53542. CMD_SPIFLASH_WRITE
  53543. CMD_SPI_MEMR_RD
  53544. CMD_SPI_MEMR_WR
  53545. CMD_SPI_MEM_RD
  53546. CMD_SPI_MEM_WR
  53547. CMD_SPI_NOP
  53548. CMD_SPI_PKT_RD
  53549. CMD_SPI_PKT_WR
  53550. CMD_SPI_PRAM_RD
  53551. CMD_SPI_PRAM_WR
  53552. CMD_SPI_READ
  53553. CMD_SPI_WRITE
  53554. CMD_SPS_SCAN
  53555. CMD_SQD2RTS_QPEE
  53556. CMD_SQD2SQD_QPEE
  53557. CMD_SQERR2RTS_QPEE
  53558. CMD_SRCH_MODE
  53559. CMD_SRR
  53560. CMD_STALL
  53561. CMD_START
  53562. CMD_STARTUP
  53563. CMD_START_CHIP
  53564. CMD_START_CHIP_REPLY
  53565. CMD_START_CHIP_REQ
  53566. CMD_START_CHIP_RESP
  53567. CMD_START_FWLOGGER
  53568. CMD_START_IBSS
  53569. CMD_START_INIT
  53570. CMD_START_JOIN
  53571. CMD_START_OLS_ASSY
  53572. CMD_START_ONE_STREAM
  53573. CMD_START_PERIODIC_SCAN
  53574. CMD_START_RADAR_DETECTION
  53575. CMD_START_SCSI
  53576. CMD_START_STREAM
  53577. CMD_START_STREAMING
  53578. CMD_START_TIMER
  53579. CMD_START_TUNER
  53580. CMD_STATE
  53581. CMD_STATE_CMD_IN_TX_FIFO
  53582. CMD_STATE_CMD_SENT
  53583. CMD_STATE_CONTROL
  53584. CMD_STATE_ERROR_RECEIVED
  53585. CMD_STATE_IDLE
  53586. CMD_STATE_RESP_RECEIVED
  53587. CMD_STATE_WAITING_FOR_SWITCH
  53588. CMD_STATS_CLEAR
  53589. CMD_STATS_DUMP
  53590. CMD_STATS_DUMP_ALL
  53591. CMD_STATUS
  53592. CMD_STATUS_BUSY
  53593. CMD_STATUS_COMPL
  53594. CMD_STATUS_COMPLETE
  53595. CMD_STATUS_FUNCTION_NOT_SUPPORTED
  53596. CMD_STATUS_FW_RESET
  53597. CMD_STATUS_HOST_ERROR
  53598. CMD_STATUS_HOST_FAILURE
  53599. CMD_STATUS_IDLE
  53600. CMD_STATUS_INVALID_PARAM
  53601. CMD_STATUS_INVALID_PARAMETER
  53602. CMD_STATUS_IN_PROGRESS
  53603. CMD_STATUS_ISSUED
  53604. CMD_STATUS_NO_RX_BA_SESSION
  53605. CMD_STATUS_OUT_OF_MEMORY
  53606. CMD_STATUS_PARAMS_REG_LEN
  53607. CMD_STATUS_RADIO_ERROR
  53608. CMD_STATUS_READ
  53609. CMD_STATUS_REJECTED_RADIO_OFF
  53610. CMD_STATUS_REJECT_MEAS_SG_ACTIVE
  53611. CMD_STATUS_RX_BUSY
  53612. CMD_STATUS_R_BUFFERS
  53613. CMD_STATUS_SCAN_FAILED
  53614. CMD_STATUS_STA_TABLE_FULL
  53615. CMD_STATUS_SUCCESS
  53616. CMD_STATUS_TEMPLATE_OOM
  53617. CMD_STATUS_TEMPLATE_TOO_LARGE
  53618. CMD_STATUS_TIMEOUT
  53619. CMD_STATUS_TIME_OUT
  53620. CMD_STATUS_UNKNOWN
  53621. CMD_STATUS_UNKNOWN_CMD
  53622. CMD_STATUS_UNKNOWN_IE
  53623. CMD_STATUS_WRONG_NESTING
  53624. CMD_STAT_ALLOCATIONS
  53625. CMD_STAT_BAD_INDEX
  53626. CMD_STAT_BAD_NVMEM
  53627. CMD_STAT_BAD_OP
  53628. CMD_STAT_BAD_PARAM
  53629. CMD_STAT_BAD_PKT
  53630. CMD_STAT_BAD_QP_STATE
  53631. CMD_STAT_BAD_RESOURCE
  53632. CMD_STAT_BAD_RES_STATE
  53633. CMD_STAT_BAD_SEG_PARAM
  53634. CMD_STAT_BAD_SIZE
  53635. CMD_STAT_BAD_SYS_STATE
  53636. CMD_STAT_EXCEED_LIM
  53637. CMD_STAT_ICM_ERROR
  53638. CMD_STAT_INTERNAL_ERR
  53639. CMD_STAT_LAM_NOT_PRE
  53640. CMD_STAT_MEMORY
  53641. CMD_STAT_MISC
  53642. CMD_STAT_MULTI_FUNC_REQ
  53643. CMD_STAT_OBJECTS
  53644. CMD_STAT_OK
  53645. CMD_STAT_REG
  53646. CMD_STAT_REG_BOUND
  53647. CMD_STAT_RESOURCE_BUSY
  53648. CMD_STAT_SIZES
  53649. CMD_STAT_STACK
  53650. CMD_STAT_TABLES
  53651. CMD_STEREO
  53652. CMD_STOP
  53653. CMD_STOP_AP_DISCOVERY
  53654. CMD_STOP_CHANNEL_SWICTH
  53655. CMD_STOP_CHIP
  53656. CMD_STOP_CHIP_REPLY
  53657. CMD_STOP_CHIP_REQ
  53658. CMD_STOP_CHIP_RESP
  53659. CMD_STOP_FWLOGGER
  53660. CMD_STOP_MEASUREMENT
  53661. CMD_STOP_OLS_ASSY
  53662. CMD_STOP_PERIODIC_SCAN
  53663. CMD_STOP_PIPE
  53664. CMD_STOP_RADAR_DETECTION
  53665. CMD_STOP_SCAN
  53666. CMD_STOP_SPS_SCAN
  53667. CMD_STOP_STREAM
  53668. CMD_STOP_STREAMING
  53669. CMD_STORE
  53670. CMD_STORE_DWORD_IDX
  53671. CMD_STP_MEM_BIST_CTL
  53672. CMD_STP_MEM_BIST_STAT0
  53673. CMD_STP_MEM_BIST_STAT1
  53674. CMD_STR
  53675. CMD_STREAM1_OUT_SET_N_LEVELS
  53676. CMD_STREAM2_OUT_SET_N_LEVELS
  53677. CMD_STREAMING_CTRL
  53678. CMD_STREAMING_OFF
  53679. CMD_STREAMING_ON
  53680. CMD_STREAM_OUT_LEVEL_ADJUST
  53681. CMD_STREAM_SAMPLE_COUNT
  53682. CMD_STRT
  53683. CMD_STS_MASK
  53684. CMD_SUBSCRIBE_BCNMISS
  53685. CMD_SUBSCRIBE_FAILCOUNT
  53686. CMD_SUBSCRIBE_RSSI_HIGH
  53687. CMD_SUBSCRIBE_RSSI_LOW
  53688. CMD_SUBSCRIBE_SNR_HIGH
  53689. CMD_SUBSCRIBE_SNR_LOW
  53690. CMD_SUBSYSTEM_COMMON
  53691. CMD_SUBSYSTEM_ETH
  53692. CMD_SUBSYSTEM_ISCSI
  53693. CMD_SUBSYSTEM_ISCSI_INI
  53694. CMD_SUBSYSTEM_LOWLEVEL
  53695. CMD_SUBVNIC_NOTIFY
  53696. CMD_SUCCESS
  53697. CMD_SUPPORTED
  53698. CMD_SURELY_BLOCK_MODE
  53699. CMD_SURELY_BYTE_MODE
  53700. CMD_SUSP
  53701. CMD_SUSPEND
  53702. CMD_SUSPEND_HINT
  53703. CMD_SUSPEND_QPEE
  53704. CMD_SW2HW_CQ
  53705. CMD_SW2HW_EQ
  53706. CMD_SW2HW_MPT
  53707. CMD_SW2HW_SRQ
  53708. CMD_SWITCH_CHANNEL_OP
  53709. CMD_SWITCH_PARAM_DEVBITFIELD
  53710. CMD_SWITCH_PARAM_TIMEOUT_SECONDS
  53711. CMD_SW_RESET
  53712. CMD_SYNC
  53713. CMD_SYNC_TPT
  53714. CMD_SYS_DIS
  53715. CMD_SYS_EN
  53716. CMD_SYS_RD
  53717. CMD_SYS_WR
  53718. CMD_Scan
  53719. CMD_Set_MIB_Vars
  53720. CMD_SiteSurvey
  53721. CMD_Start
  53722. CMD_TAG
  53723. CMD_TARGET_STATUS
  53724. CMD_TDLS_CH_SW
  53725. CMD_TDR
  53726. CMD_TEARDOWN_STREAM
  53727. CMD_TEMPL_APP_PROBE_REQ_2_4_LEGACY
  53728. CMD_TEMPL_APP_PROBE_REQ_5_LEGACY
  53729. CMD_TEMPL_AP_BEACON
  53730. CMD_TEMPL_AP_PROBE_RESPONSE
  53731. CMD_TEMPL_ARP_RSP
  53732. CMD_TEMPL_BAR
  53733. CMD_TEMPL_BEACON
  53734. CMD_TEMPL_CFG_PROBE_REQ_2_4
  53735. CMD_TEMPL_CFG_PROBE_REQ_5
  53736. CMD_TEMPL_CTS
  53737. CMD_TEMPL_DEAUTH_AP
  53738. CMD_TEMPL_DISCONNECT
  53739. CMD_TEMPL_KLV
  53740. CMD_TEMPL_LINK_MEASUREMENT_REPORT
  53741. CMD_TEMPL_MAX
  53742. CMD_TEMPL_NULL_DATA
  53743. CMD_TEMPL_PROBE_REQ_2_4_PERIODIC
  53744. CMD_TEMPL_PROBE_REQ_5_PERIODIC
  53745. CMD_TEMPL_PROBE_RESPONSE
  53746. CMD_TEMPL_PS_POLL
  53747. CMD_TEMPL_QOS_NULL_DATA
  53748. CMD_TEMPL_TEMPORARY
  53749. CMD_TERMINATE
  53750. CMD_TEST
  53751. CMD_TEST_IT
  53752. CMD_TEST_OBJECTS
  53753. CMD_TEST_PREDEFINED
  53754. CMD_TGT_ADD
  53755. CMD_TGT_ADD_IMM
  53756. CMD_TGT_READ32
  53757. CMD_TGT_READ32_LE
  53758. CMD_TGT_READ32_SWAP
  53759. CMD_TGT_READ8
  53760. CMD_TGT_READ_LE
  53761. CMD_TGT_READ_SWAP_LE
  53762. CMD_TGT_WRITE32_SWAP
  53763. CMD_TGT_WRITE8_SWAP
  53764. CMD_THERMAL_BPMP_TO_HOST_NUM
  53765. CMD_THERMAL_GET_NUM_ZONES
  53766. CMD_THERMAL_GET_TEMP
  53767. CMD_THERMAL_HOST_TO_BPMP_NUM
  53768. CMD_THERMAL_HOST_TRIP_REACHED
  53769. CMD_THERMAL_QUERY_ABI
  53770. CMD_THERMAL_SET_TRIP
  53771. CMD_THR
  53772. CMD_TIMEOUT
  53773. CMD_TIMEOUT_DEF
  53774. CMD_TIMEOUT_SECONDS
  53775. CMD_TIMEOUT_US
  53776. CMD_TIME_CLASS_A
  53777. CMD_TIME_CLASS_B
  53778. CMD_TIME_CLASS_C
  53779. CMD_TIME_CLASS_D
  53780. CMD_TLB_DIRECT_WRITE
  53781. CMD_TLB_PURGE
  53782. CMD_TMF_STATUS
  53783. CMD_TOKEN_ID_MASK
  53784. CMD_TOKEN_MASK
  53785. CMD_TOUCHPAD_CMD
  53786. CMD_TOUCHPAD_FW_ITEMS_SET
  53787. CMD_TOUCHPAD_GET_RAW_INFO
  53788. CMD_TOUCHPAD_SET_RAW_REPORT_STATE
  53789. CMD_TR
  53790. CMD_TRANSFERINFO
  53791. CMD_TRANSMIT
  53792. CMD_TRANS_TIMEOUT_MS
  53793. CMD_TRIGGER
  53794. CMD_TRIGGER_SCAN_TO
  53795. CMD_TS
  53796. CMD_TUNE
  53797. CMD_TUNEREQUEST
  53798. CMD_TUNERINIT
  53799. CMD_TUNERSLEEP
  53800. CMD_TUNER_INIT
  53801. CMD_TURN_OFF_POWER
  53802. CMD_TX
  53803. CMD_TXEOM
  53804. CMD_TXFIFO
  53805. CMD_TXOFF
  53806. CMD_TXON
  53807. CMD_TXRESET
  53808. CMD_TXSTATUS
  53809. CMD_TXTEST
  53810. CMD_TX_ABORT
  53811. CMD_TX_ACKNOWLEDGE
  53812. CMD_TX_ACKNOWLEDGE_FD
  53813. CMD_TX_ADDR_INS
  53814. CMD_TX_BUF_CLR
  53815. CMD_TX_CAN_MESSAGE
  53816. CMD_TX_CAN_MESSAGE_FD
  53817. CMD_TX_CRC_EXC
  53818. CMD_TX_CRC_INIT
  53819. CMD_TX_DISA
  53820. CMD_TX_DISB
  53821. CMD_TX_EN
  53822. CMD_TX_ENA
  53823. CMD_TX_ENABLE
  53824. CMD_TX_EOM
  53825. CMD_TX_EXT_MESSAGE
  53826. CMD_TX_MP_ON
  53827. CMD_TX_OVERFLOW
  53828. CMD_TX_PAUSE_IGNORE
  53829. CMD_TX_PKT
  53830. CMD_TX_RST
  53831. CMD_TX_RX_EN
  53832. CMD_TX_STD_MESSAGE
  53833. CMD_TYPE
  53834. CMD_TYPE_AUTO_PREAMBLE
  53835. CMD_TYPE_DATA
  53836. CMD_TYPE_INDICATION
  53837. CMD_TYPE_LONG_PREAMBLE
  53838. CMD_TYPE_MASK
  53839. CMD_TYPE_MESH_GET_DEFAULTS
  53840. CMD_TYPE_MESH_GET_MESH_IE
  53841. CMD_TYPE_MESH_SET_BOOTFLAG
  53842. CMD_TYPE_MESH_SET_BOOTTIME
  53843. CMD_TYPE_MESH_SET_DEF_CHANNEL
  53844. CMD_TYPE_MESH_SET_MESH_IE
  53845. CMD_TYPE_OFFSET
  53846. CMD_TYPE_REQUEST
  53847. CMD_TYPE_SHIFT
  53848. CMD_TYPE_SHORT_PREAMBLE
  53849. CMD_TYPE_WEP_104_BIT
  53850. CMD_TYPE_WEP_40_BIT
  53851. CMD_T_ABORTED
  53852. CMD_T_ACTIVE
  53853. CMD_T_COMPLETE
  53854. CMD_T_FABRIC_STOP
  53855. CMD_T_SENT
  53856. CMD_T_STOP
  53857. CMD_T_TAS
  53858. CMD_UNABORTABLE
  53859. CMD_UNDI
  53860. CMD_UNIQ_MASK
  53861. CMD_UNMAP_FA
  53862. CMD_UNMAP_ICM
  53863. CMD_UNMAP_ICM_AUX
  53864. CMD_UNSOLICITED_ABORT
  53865. CMD_UNSUSPEND_QPEE
  53866. CMD_UPDATE
  53867. CMD_UPDATE_R_BUFFERS
  53868. CMD_UPDFWVERS
  53869. CMD_UPHY_MAX
  53870. CMD_UPHY_PCIE_CONTROLLER_STATE
  53871. CMD_UPHY_PCIE_EP_CONTROLLER_PLL_INIT
  53872. CMD_UPHY_PCIE_LANE_MARGIN_CONTROL
  53873. CMD_UPHY_PCIE_LANE_MARGIN_STATUS
  53874. CMD_UPLOAD
  53875. CMD_USBCAN_CLOCK_OVERFLOW_EVENT
  53876. CMD_USB_RD
  53877. CMD_USB_WR
  53878. CMD_USEPSPNODES
  53879. CMD_USER
  53880. CMD_V3_ENABLE_STRETCH
  53881. CMD_V7_ENTER_BL
  53882. CMD_V7_ERASE
  53883. CMD_V7_ERASE_AP
  53884. CMD_V7_IDLE
  53885. CMD_V7_READ
  53886. CMD_V7_SENSOR_ID
  53887. CMD_V7_WRITE
  53888. CMD_VALID_BUF
  53889. CMD_VBM
  53890. CMD_VCHAN_ID
  53891. CMD_VCOMCTR1
  53892. CMD_VCOMCTR2
  53893. CMD_VCOMOFFS
  53894. CMD_VCO_SET
  53895. CMD_VERSION
  53896. CMD_VERSION_STRING_READ
  53897. CMD_VLAN_ADD
  53898. CMD_VLAN_DEL
  53899. CMD_VMID_FORCE
  53900. CMD_WAIT
  53901. CMD_WAITFOR
  53902. CMD_WAKEUP
  53903. CMD_WAKE_METHOD_COMMAND_INT
  53904. CMD_WAKE_METHOD_GPIO
  53905. CMD_WAKE_METHOD_UNCHANGED
  53906. CMD_WANT_ASYNC_CALLBACK
  53907. CMD_WANT_SKB
  53908. CMD_WD_TIMER
  53909. CMD_WEP_KEY_INDEX_MASK
  53910. CMD_WFD_ATTRIBUTE_CONFIG
  53911. CMD_WFD_START_DISCOVERY
  53912. CMD_WFD_STOP_DISCOVERY
  53913. CMD_WIDTH8
  53914. CMD_WITHDMA
  53915. CMD_WORD_DATA
  53916. CMD_WORKAROUND
  53917. CMD_WOW_CONFIG
  53918. CMD_WOW_FEATURE
  53919. CMD_WOW_QUERY
  53920. CMD_WQE_MASK
  53921. CMD_WR
  53922. CMD_WREG
  53923. CMD_WRITE
  53924. CMD_WRITERID
  53925. CMD_WRITE_BASE64K_ENABLE
  53926. CMD_WRITE_BYTE
  53927. CMD_WRITE_COPY16
  53928. CMD_WRITE_COPY8
  53929. CMD_WRITE_DISABLE
  53930. CMD_WRITE_ENABLE
  53931. CMD_WRITE_EXT_SCI_MASK
  53932. CMD_WRITE_LOCATION
  53933. CMD_WRITE_MEMORY
  53934. CMD_WRITE_MGM
  53935. CMD_WRITE_MTT
  53936. CMD_WRITE_RAW16
  53937. CMD_WRITE_RAW8
  53938. CMD_WRITE_RL16
  53939. CMD_WRITE_RL8
  53940. CMD_WRITE_RLX16
  53941. CMD_WRITE_RLX8
  53942. CMD_WRITE_UART
  53943. CMD_WRITE_WATCHDOG_TIMEOUT
  53944. CMD_WR_DATA_MEM
  53945. CMD_WR_ECS_REG
  53946. CMD_WR_FLAG
  53947. CMD_WR_INS_MEM
  53948. CMD_WR_NOACK
  53949. CMD_WR_REG
  53950. CMD_WR_REG_MASK
  53951. CMD_WR_TIME
  53952. CMD_WTX_RESPONSE
  53953. CMD_XFER
  53954. CMD_XFER_DATA
  53955. CMD_XFER_PAD
  53956. CMD_XMIT
  53957. CMD_XMIT_BCAST64_CN
  53958. CMD_XMIT_BCAST64_CX
  53959. CMD_XMIT_BCAST64_WQE
  53960. CMD_XMIT_BCAST_CN
  53961. CMD_XMIT_BCAST_CX
  53962. CMD_XMIT_BLS_RSP64_CX
  53963. CMD_XMIT_BLS_RSP64_WQE
  53964. CMD_XMIT_ELS_RSP64_CX
  53965. CMD_XMIT_ELS_RSP64_WQE
  53966. CMD_XMIT_ELS_RSP_CX
  53967. CMD_XMIT_ENABLE
  53968. CMD_XMIT_RCV_ENABLE
  53969. CMD_XMIT_SEQUENCE64_CR
  53970. CMD_XMIT_SEQUENCE64_CX
  53971. CMD_XMIT_SEQUENCE64_WQE
  53972. CMD_XMIT_SEQUENCE_CR
  53973. CMD_XMIT_SEQUENCE_CX
  53974. CMD_XOR_MEM_BIST_CTL
  53975. CMD_XOR_MEM_BIST_STAT
  53976. CMD_XOR_MEM_CTL
  53977. CMD_XRI_ABORTED_CX
  53978. CMD_XTD
  53979. CMD_XTRACT_UNIQ
  53980. CMD_XXX_MIDI_VOL
  53981. CMD_ZIF_PIN_CFG
  53982. CMD_ZIF_PIN_CFG_NARGS
  53983. CMD_ZIF_PIN_CFG_NRESP
  53984. CMD_char_in
  53985. CMD_char_out
  53986. CMD_control
  53987. CMD_dma
  53988. CMD_error
  53989. CMD_id
  53990. CMD_mask
  53991. CMD_null
  53992. CMD_reset
  53993. CMD_spc_mode
  53994. CMD_spc_rate
  53995. CMD_spc_to_digit
  53996. CMD_spc_to_text
  53997. CMD_sync
  53998. CMD_test
  53999. CMEN
  54000. CMFA
  54001. CMFE_CODE
  54002. CMFILE_SYNCH
  54003. CMFILE_SYNCH_NVRAM
  54004. CMF_AUTODETECT
  54005. CMF_BASIC
  54006. CMF_CFG_CRC_FWD
  54007. CMF_CODE
  54008. CMF_EXTENDED
  54009. CMF_OFF
  54010. CMF_ON
  54011. CMF_PENDING
  54012. CMI8328_MAX
  54013. CMI8329
  54014. CMI8330
  54015. CMI8330_CDINGAIN
  54016. CMI8330_CDINVOL
  54017. CMI8330_LINGAIN
  54018. CMI8330_LINVOL
  54019. CMI8330_MASTVOL
  54020. CMI8330_MUTEMUX
  54021. CMI8330_OUTPUTVOL
  54022. CMI8330_RECMUX
  54023. CMI8330_RMUX3D
  54024. CMI8330_WAVGAIN
  54025. CMI8330_WAVVOL
  54026. CMIEA
  54027. CMIPCI_DOUBLE
  54028. CMIPCI_MIXER_SW_MONO
  54029. CMIPCI_MIXER_SW_STEREO
  54030. CMIPCI_MIXER_VOL_MONO
  54031. CMIPCI_MIXER_VOL_STEREO
  54032. CMIPCI_SB_INPUT_SW
  54033. CMIPCI_SB_SW_MONO
  54034. CMIPCI_SB_SW_STEREO
  54035. CMIPCI_SB_VOL_MONO
  54036. CMIPCI_SB_VOL_STEREO
  54037. CMITC_UARTCLK
  54038. CMI_AD_STREAM
  54039. CMI_LCD_I2C_ADAPTER
  54040. CMI_LCD_I2C_ADDR
  54041. CMI_SB_STREAM
  54042. CML2CMOS_IBOOST_MODE
  54043. CML_GEAR_MODE
  54044. CML_LP_DEVICE_ID
  54045. CMM_DEBUG
  54046. CMM_DEFAULT_DELAY
  54047. CMM_DISABLE
  54048. CMM_DRIVER_VERSION
  54049. CMM_HOTPLUG_DELAY
  54050. CMM_MEM_HOTPLUG_PRI
  54051. CMM_MEM_ISOLATE_PRI
  54052. CMM_MIN_MEM_MB
  54053. CMM_NR_PAGES
  54054. CMM_OOM_KB
  54055. CMM_SHOW
  54056. CMNCR
  54057. CMND_ABORT
  54058. CMND_ABORT_TRANSFER
  54059. CMND_ASSERTATN
  54060. CMND_DISCONNECT
  54061. CMND_NEGATEACK
  54062. CMND_RECEIVECMD
  54063. CMND_RECEIVEDTA
  54064. CMND_RECEIVEMSG
  54065. CMND_RECEIVEUSP
  54066. CMND_RESELECT
  54067. CMND_RESELECTRXDATA
  54068. CMND_RESELECTTXDATA
  54069. CMND_RESET
  54070. CMND_SBT
  54071. CMND_SELECT
  54072. CMND_SELECTATNTRANSFER
  54073. CMND_SELECTTRANSFER
  54074. CMND_SELWITHATN
  54075. CMND_SENDCMD
  54076. CMND_SENDDATA
  54077. CMND_SENDDISCONNECT
  54078. CMND_SENDMSG
  54079. CMND_SENDSTATCMD
  54080. CMND_SENDUSP
  54081. CMND_SETIDI
  54082. CMND_TRANSLATEADDR
  54083. CMND_WAITFORSELRECV
  54084. CMND_XFERINFO
  54085. CMNG_FLAGS_PER_PORT_FAIRNESS_COS
  54086. CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE
  54087. CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE_SHIFT
  54088. CMNG_FLAGS_PER_PORT_FAIRNESS_COS_SHIFT
  54089. CMNG_FLAGS_PER_PORT_FAIRNESS_VN
  54090. CMNG_FLAGS_PER_PORT_FAIRNESS_VN_SHIFT
  54091. CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN
  54092. CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN_SHIFT
  54093. CMNG_FNS_MINMAX
  54094. CMNG_FNS_NONE
  54095. CMN_BGCAL_INIT_TMR
  54096. CMN_BGCAL_ITER_TMR
  54097. CMN_CALIB_CODE
  54098. CMN_CALIB_CODE_MASK
  54099. CMN_CALIB_CODE_OFFSET
  54100. CMN_CALIB_CODE_POS
  54101. CMN_CALIB_CODE_POS_MASK
  54102. CMN_CALIB_CODE_WIDTH
  54103. CMN_DIAG_HSCLK_SEL
  54104. CMN_DIAG_PLL0_CP_TUNE
  54105. CMN_DIAG_PLL0_FBH_OVRD
  54106. CMN_DIAG_PLL0_FBL_OVRD
  54107. CMN_DIAG_PLL0_LF_PROG
  54108. CMN_DIAG_PLL0_OVRD
  54109. CMN_DIAG_PLL0_V2I_TUNE
  54110. CMN_DIAG_PLL1_CP_TUNE
  54111. CMN_DIAG_PLL1_FBH_OVRD
  54112. CMN_DIAG_PLL1_FBL_OVRD
  54113. CMN_DIAG_PLL1_INCLK_CTRL
  54114. CMN_DIAG_PLL1_LF_PROG
  54115. CMN_DIAG_PLL1_OVRD
  54116. CMN_DIAG_PLL1_PTATIS_TUNE1
  54117. CMN_DIAG_PLL1_PTATIS_TUNE2
  54118. CMN_DIAG_PLL1_V2I_TUNE
  54119. CMN_IBCAL_INIT_TMR
  54120. CMN_ICAL_OVRD
  54121. CMN_INTERRUPT_0_ENABLE
  54122. CMN_INTERRUPT_2_ENABLE
  54123. CMN_PDIAG_PLL0_CLK_SEL_M0
  54124. CMN_PDIAG_PLL0_CP_IADJ_M0
  54125. CMN_PDIAG_PLL0_CP_IADJ_M1
  54126. CMN_PDIAG_PLL0_CP_PADJ_M0
  54127. CMN_PDIAG_PLL0_CP_PADJ_M1
  54128. CMN_PDIAG_PLL0_CTRL_M0
  54129. CMN_PDIAG_PLL0_FILT_PADJ_M0
  54130. CMN_PDIAG_PLL1_CLK_SEL_M0
  54131. CMN_PLL0_DSM_DIAG
  54132. CMN_PLL0_DSM_DIAG_M0
  54133. CMN_PLL0_FRACDIV
  54134. CMN_PLL0_FRACDIVH_M0
  54135. CMN_PLL0_FRACDIVL_M0
  54136. CMN_PLL0_HIGH_THR
  54137. CMN_PLL0_HIGH_THR_M0
  54138. CMN_PLL0_INTDIV
  54139. CMN_PLL0_INTDIV_M0
  54140. CMN_PLL0_LOCK_PLLCNT_START
  54141. CMN_PLL0_LOCK_PLLCNT_THR
  54142. CMN_PLL0_LOCK_REFCNT_START
  54143. CMN_PLL0_SS_CTRL1
  54144. CMN_PLL0_SS_CTRL2
  54145. CMN_PLL0_VCOCAL_INIT
  54146. CMN_PLL0_VCOCAL_INIT_TMR
  54147. CMN_PLL0_VCOCAL_ITER
  54148. CMN_PLL0_VCOCAL_ITER_TMR
  54149. CMN_PLL0_VCOCAL_OVRD
  54150. CMN_PLL0_VCOCAL_PLLCNT_START
  54151. CMN_PLL0_VCOCAL_REFTIM_START
  54152. CMN_PLL1_DSM_DIAG
  54153. CMN_PLL1_DSM_DIAG_M0
  54154. CMN_PLL1_FRACDIV
  54155. CMN_PLL1_HIGH_THR
  54156. CMN_PLL1_INTDIV
  54157. CMN_PLL1_LOCK_PLLCNT_START
  54158. CMN_PLL1_LOCK_PLLCNT_THR
  54159. CMN_PLL1_LOCK_REFCNT_START
  54160. CMN_PLL1_SS_CTRL1
  54161. CMN_PLL1_SS_CTRL2
  54162. CMN_PLL1_VCOCAL_INIT
  54163. CMN_PLL1_VCOCAL_INIT_TMR
  54164. CMN_PLL1_VCOCAL_ITER
  54165. CMN_PLL1_VCOCAL_ITER_TMR
  54166. CMN_PLL1_VCOCAL_OVRD
  54167. CMN_PLL1_VCOCAL_START
  54168. CMN_PLLSM0_PLLEN
  54169. CMN_PLLSM0_PLLLOCK
  54170. CMN_PLLSM0_PLLLOCK_TMR
  54171. CMN_PLLSM0_PLLPRE
  54172. CMN_PLLSM0_PLLPRE_TMR
  54173. CMN_PLLSM0_PLLVREF
  54174. CMN_PLLSM1_PLLEN
  54175. CMN_PLLSM1_PLLLOCK
  54176. CMN_PLLSM1_PLLLOCK_TMR
  54177. CMN_PLLSM1_PLLPRE
  54178. CMN_PLLSM1_PLLPRE_TMR
  54179. CMN_PLLSM1_PLLVREF
  54180. CMN_PLLSM1_USER_DEF_CTRL
  54181. CMN_READY
  54182. CMN_RXCAL_INIT_TMR
  54183. CMN_RXCAL_ITER_TMR
  54184. CMN_RXCAL_OVRD
  54185. CMN_SD_CAL_INIT_TMR
  54186. CMN_SD_CAL_ITER_TMR
  54187. CMN_SD_CAL_PLLCNT_START
  54188. CMN_SD_CAL_REFTIM_START
  54189. CMN_SSM_BANDGAP
  54190. CMN_SSM_BANDGAP_TMR
  54191. CMN_SSM_BIAS
  54192. CMN_SSM_BIAS_TMR
  54193. CMN_TXPDCAL_CTRL
  54194. CMN_TXPDCAL_INIT_TMR
  54195. CMN_TXPDCAL_ITER_TMR
  54196. CMN_TXPDCAL_OVRD
  54197. CMN_TXPD_ADJ_CTRL
  54198. CMN_TXPUCAL_CTRL
  54199. CMN_TXPUCAL_INIT_TMR
  54200. CMN_TXPUCAL_ITER_TMR
  54201. CMN_TXPUCAL_OVRD
  54202. CMN_TXPU_ADJ_CTRL
  54203. CMN_TXPXCAL_CURRENT_RESPONSE
  54204. CMN_TXPXCAL_DONE
  54205. CMN_TXPXCAL_NO_RESPONSE
  54206. CMN_TXPXCAL_START
  54207. CMODEPTR
  54208. CMODE_16
  54209. CMODE_32
  54210. CMODE_8
  54211. CMODE_CHOOSE
  54212. CMODE_NVRAM
  54213. CMODIO_MAX_MODULES
  54214. CMODIO_MODULBUS_SIZE
  54215. CMON_CLK_SEL
  54216. CMON_CLK_SEL_MASK
  54217. CMOS
  54218. CMOS_BASE_PORT
  54219. CMOS_CHECKSUM
  54220. CMOS_CONF1
  54221. CMOS_CONF2
  54222. CMOS_CONF3
  54223. CMOS_CONF4
  54224. CMOS_CONF5
  54225. CMOS_CONF6
  54226. CMOS_CONF7
  54227. CMOS_CONF8
  54228. CMOS_CONF9
  54229. CMOS_PAGE1_DATA_PORT
  54230. CMOS_PAGE1_INDEX_PORT
  54231. CMOS_PAGE2_DATA_PORT_PIIX4
  54232. CMOS_PAGE2_INDEX_PORT_PIIX4
  54233. CMOS_READ
  54234. CMOS_RTC_FLAGS_NOFREQ
  54235. CMOS_WRITE
  54236. CMOS_YEAR
  54237. CMOS_YEARS_OFFS
  54238. CMOTECH_PRODUCT_6001
  54239. CMOTECH_PRODUCT_6003
  54240. CMOTECH_PRODUCT_6004
  54241. CMOTECH_PRODUCT_6005
  54242. CMOTECH_PRODUCT_7002
  54243. CMOTECH_PRODUCT_7004
  54244. CMOTECH_PRODUCT_7005
  54245. CMOTECH_PRODUCT_7212
  54246. CMOTECH_PRODUCT_7213
  54247. CMOTECH_PRODUCT_7251
  54248. CMOTECH_PRODUCT_7252
  54249. CMOTECH_PRODUCT_7253
  54250. CMOTECH_PRODUCT_CDU550
  54251. CMOTECH_PRODUCT_CDU_680
  54252. CMOTECH_PRODUCT_CDU_685A
  54253. CMOTECH_PRODUCT_CDX650
  54254. CMOTECH_PRODUCT_CGU_628A
  54255. CMOTECH_PRODUCT_CGU_629
  54256. CMOTECH_PRODUCT_CHE_628S
  54257. CMOTECH_PRODUCT_CHU_628
  54258. CMOTECH_PRODUCT_CHU_628S
  54259. CMOTECH_PRODUCT_CHU_629K
  54260. CMOTECH_PRODUCT_CHU_629S
  54261. CMOTECH_PRODUCT_CHU_720I
  54262. CMOTECH_PRODUCT_CHU_720S
  54263. CMOTECH_PRODUCT_CMU_300
  54264. CMOTECH_PRODUCT_CMU_301
  54265. CMOTECH_VENDOR_ID
  54266. CMOVE
  54267. CMOVE2
  54268. CMO_CHARACTERISTICS_TOKEN
  54269. CMO_FREE_HINT_DEFAULT
  54270. CMO_MAXLENGTH
  54271. CMO_R
  54272. CMP
  54273. CMP12_0
  54274. CMP12_1
  54275. CMP12_2
  54276. CMP12_3
  54277. CMP12_4
  54278. CMP12_5
  54279. CMP12_6
  54280. CMP12_7
  54281. CMP1MODE
  54282. CMP1_ADC_DAT_R1
  54283. CMP1_ADC_DAT_R2
  54284. CMP1_LVL2_HYS
  54285. CMP1_LVL2_TRIP
  54286. CMP1_LVL3_HYS
  54287. CMP1_LVL3_TRIP
  54288. CMP2_ADC_DAT_R1
  54289. CMP2_ADC_DAT_R2
  54290. CMP2_LVL2_HYS
  54291. CMP2_LVL2_TRIP
  54292. CMP2_LVL3_HYS
  54293. CMP2_LVL3_TRIP
  54294. CMPA
  54295. CMPB
  54296. CMPCR
  54297. CMPCV_HI
  54298. CMPCV_LO
  54299. CMPC_ACCEL_DEV_STATE_CLOSED
  54300. CMPC_ACCEL_DEV_STATE_OPEN
  54301. CMPC_ACCEL_G_SELECT_DEFAULT
  54302. CMPC_ACCEL_HID
  54303. CMPC_ACCEL_HID_V4
  54304. CMPC_ACCEL_SENSITIVITY_DEFAULT
  54305. CMPC_IPML_HID
  54306. CMPC_KEYS_HID
  54307. CMPC_TABLET_HID
  54308. CMPK_BOTH_QUERY_CONFIG_SIZE
  54309. CMPK_RX_TX_FB_SIZE
  54310. CMPK_RX_TX_STS_SIZE
  54311. CMPK_TX_RAHIS_SIZE
  54312. CMPLT_HDR_ABORT_STAT_MSK
  54313. CMPLT_HDR_ABORT_STAT_OFF
  54314. CMPLT_HDR_CMD_CMPLT_MSK
  54315. CMPLT_HDR_CMD_CMPLT_OFF
  54316. CMPLT_HDR_CMPLT_MSK
  54317. CMPLT_HDR_CMPLT_OFF
  54318. CMPLT_HDR_DEV_ID_MSK
  54319. CMPLT_HDR_DEV_ID_OFF
  54320. CMPLT_HDR_ERROR_PHASE_MSK
  54321. CMPLT_HDR_ERROR_PHASE_OFF
  54322. CMPLT_HDR_ERR_PHASE_MSK
  54323. CMPLT_HDR_ERR_PHASE_OFF
  54324. CMPLT_HDR_ERR_RCRD_XFRD_MSK
  54325. CMPLT_HDR_ERR_RCRD_XFRD_OFF
  54326. CMPLT_HDR_ERX_MSK
  54327. CMPLT_HDR_ERX_OFF
  54328. CMPLT_HDR_IO_CFG_ERR_MSK
  54329. CMPLT_HDR_IO_CFG_ERR_OFF
  54330. CMPLT_HDR_IO_IN_TARGET_MSK
  54331. CMPLT_HDR_IO_IN_TARGET_OFF
  54332. CMPLT_HDR_IPTT_MSK
  54333. CMPLT_HDR_IPTT_OFF
  54334. CMPLT_HDR_RSPNS_XFRD_MSK
  54335. CMPLT_HDR_RSPNS_XFRD_OFF
  54336. CMPL_BASE_TYPE_HWRM_ASYNC_EVENT
  54337. CMPL_BASE_TYPE_HWRM_DONE
  54338. CMPL_BASE_TYPE_HWRM_FWD_REQ
  54339. CMPL_BASE_TYPE_HWRM_FWD_RESP
  54340. CMPL_BASE_TYPE_STAT_EJECT
  54341. CMPL_DME_STATUS_MASK
  54342. CMPL_DME_STATUS_SHIFT
  54343. CMPL_DOORBELL_IDX_MASK
  54344. CMPL_DOORBELL_IDX_SFT
  54345. CMPL_DOORBELL_IDX_VALID
  54346. CMPL_DOORBELL_KEY_CMPL
  54347. CMPL_DOORBELL_KEY_MASK
  54348. CMPL_DOORBELL_KEY_SFT
  54349. CMPL_DOORBELL_MASK
  54350. CMPL_DOORBELL_RESERVED_MASK
  54351. CMPL_DOORBELL_RESERVED_SFT
  54352. CMPL_ENGINE_STATUS_MASK
  54353. CMPL_ENGINE_STATUS_SHIFT
  54354. CMPL_INT
  54355. CMPL_OPAQUE_MASK
  54356. CMPL_OPAQUE_SHIFT
  54357. CMPL_RM_STATUS_MASK
  54358. CMPL_RM_STATUS_SHIFT
  54359. CMPL_START_ADDR_VALUE
  54360. CMPL_TYPE_HWRM_DONE
  54361. CMPL_TYPE_LAST
  54362. CMPL_TYPE_MASK
  54363. CMPL_TYPE_SFT
  54364. CMPL_V
  54365. CMPOP_MASK
  54366. CMPPTE
  54367. CMPXCHG
  54368. CMPXCHG64
  54369. CMPXCHG_BUGCHECK
  54370. CMPXCHG_BUGCHECK_DECL
  54371. CMPXCHG_DOUBLE_CPU_FAIL
  54372. CMPXCHG_DOUBLE_FAIL
  54373. CMPXCHG_FAMILY_TEST
  54374. CMPXCHG_GEN
  54375. CMPXCHG_LOOP
  54376. CMPXCHG_TYPE
  54377. CMP_AUTOEN
  54378. CMP_CFG_STAT
  54379. CMP_CONFG_SENS1
  54380. CMP_CONFG_SENS2
  54381. CMP_CTL
  54382. CMP_FIELD
  54383. CMP_H_DEVICE_ID
  54384. CMP_INPUT
  54385. CMP_KC_LOOP
  54386. CMP_KN_LOOP
  54387. CMP_NO_CTL
  54388. CMP_OFFSET
  54389. CMP_OUTPUT
  54390. CMP_OUTPUT_PLUG_CONTROL_REG_0
  54391. CMP_QSIZE
  54392. CMP_QUEUE_CQE_THRESH
  54393. CMP_QUEUE_DESC_SIZE
  54394. CMP_QUEUE_LEN
  54395. CMP_QUEUE_PIPELINE_RSVD
  54396. CMP_QUEUE_SIZE0
  54397. CMP_QUEUE_SIZE1
  54398. CMP_QUEUE_SIZE2
  54399. CMP_QUEUE_SIZE3
  54400. CMP_QUEUE_SIZE4
  54401. CMP_QUEUE_SIZE5
  54402. CMP_QUEUE_SIZE6
  54403. CMP_QUEUE_TIMER_THRESH
  54404. CMP_TEST_GRP
  54405. CMP_TYPE
  54406. CMP_TYPE_ERROR_STATUS
  54407. CMP_TYPE_REMOTE_DRIVER_REQ
  54408. CMP_TYPE_REMOTE_DRIVER_RESP
  54409. CMP_TYPE_RX_AGG_CMP
  54410. CMP_TYPE_RX_L2_CMP
  54411. CMP_TYPE_RX_L2_TPA_END_CMP
  54412. CMP_TYPE_RX_L2_TPA_START_CMP
  54413. CMP_TYPE_RX_TPA_AGG_CMP
  54414. CMP_TYPE_STATUS_CMP
  54415. CMP_TYPE_TX_L2_CMP
  54416. CMP_WORD
  54417. CMP_X
  54418. CMR
  54419. CMR1
  54420. CMR1_BufEnb
  54421. CMR1_IRQ
  54422. CMR1_NextPkt
  54423. CMR1_ReXmit
  54424. CMR1_Xmit
  54425. CMR1h_MUX
  54426. CMR1h_RESET
  54427. CMR1h_RxENABLE
  54428. CMR1h_TxENABLE
  54429. CMR1h_TxRxOFF
  54430. CMR2
  54431. CMR2_EEPROM
  54432. CMR2_IRQOUT
  54433. CMR2_NULL
  54434. CMR2_RAMTEST
  54435. CMR2_h
  54436. CMR2h_Normal
  54437. CMR2h_OFF
  54438. CMR2h_PROMISC
  54439. CMR2h_Physical
  54440. CMRX_INT
  54441. CMR_EN
  54442. CMR_GLOBAL_CFG_FCS_STRIP
  54443. CMR_MEM_INT
  54444. CMR_PKT_RX_EN
  54445. CMR_PKT_TX_EN
  54446. CMSG
  54447. CMSG_ALIGN
  54448. CMSG_COMPAT_ALIGN
  54449. CMSG_COMPAT_DATA
  54450. CMSG_COMPAT_FIRSTHDR
  54451. CMSG_COMPAT_LEN
  54452. CMSG_COMPAT_OK
  54453. CMSG_COMPAT_SPACE
  54454. CMSG_DATA
  54455. CMSG_FIRSTHDR
  54456. CMSG_LEN
  54457. CMSG_MAP_KEY_LW
  54458. CMSG_MAP_VALUE_LW
  54459. CMSG_NXTHDR
  54460. CMSG_OK
  54461. CMSG_RC_ERR_MAP_E2BIG
  54462. CMSG_RC_ERR_MAP_ERR
  54463. CMSG_RC_ERR_MAP_EXIST
  54464. CMSG_RC_ERR_MAP_FD
  54465. CMSG_RC_ERR_MAP_NOENT
  54466. CMSG_RC_ERR_MAP_NOMEM
  54467. CMSG_RC_ERR_MAP_PARSE
  54468. CMSG_RC_SUCCESS
  54469. CMSG_SIZE
  54470. CMSG_SPACE
  54471. CMSPAR
  54472. CMT
  54473. CMT0
  54474. CMT1
  54475. CMTPCONNADD
  54476. CMTPCONNDEL
  54477. CMTPGETCONNINFO
  54478. CMTPGETCONNLIST
  54479. CMTP_APPLID
  54480. CMTP_INITIAL_MSGNUM
  54481. CMTP_INTEROP_TIMEOUT
  54482. CMTP_LOOPBACK
  54483. CMTP_MAPPING
  54484. CMTP_MSGNUM
  54485. CMT_CMTI
  54486. CMUCLKMSK
  54487. CMUCLKMSK2
  54488. CMUCTRL5
  54489. CMUNSTABLE
  54490. CMUN_CLKEN0
  54491. CMUN_CLKEN1
  54492. CMUN_CLS_C
  54493. CMUN_CLS_RW
  54494. CMUN_CLS_S
  54495. CMUN_CONFFIR0
  54496. CMUN_CONFFIR1
  54497. CMUN_CONFFIR2
  54498. CMUN_CONFFIR3
  54499. CMUN_CRCS
  54500. CMUN_ETDRB
  54501. CMUN_FIR0
  54502. CMUN_FMR0
  54503. CMUN_MCCR
  54504. CMUN_PCD0
  54505. CMUN_PCD1
  54506. CMUN_PW0
  54507. CMUN_TMR0
  54508. CMUN_TVS0
  54509. CMUN_TVS1
  54510. CMUN_URCR0_P
  54511. CMUN_URCR1_P
  54512. CMUN_URCR2_C
  54513. CMUN_URCR2_P
  54514. CMUN_URCR2_RS
  54515. CMUN_URCR3_C
  54516. CMUN_URCR3_P
  54517. CMUN_URCR3_RS
  54518. CMUX_SHIFT_PHASE_MASK
  54519. CMUX_SHIFT_PHASE_SHIFT
  54520. CMU_ANALOGDEBUG
  54521. CMU_ASSISTPLL
  54522. CMU_AUDIOPLL
  54523. CMU_AUDIOPLL_ETHPLLDEBUG
  54524. CMU_BISPCLK
  54525. CMU_BUSCLK
  54526. CMU_BUSCLK1
  54527. CMU_BUS_COMMON_CLK_REGS
  54528. CMU_BUS_INFO_CLKS
  54529. CMU_CLKGAGE_MODE_MEM_F
  54530. CMU_CLKGAGE_MODE_SFR_F
  54531. CMU_CORECTL
  54532. CMU_COREPLL
  54533. CMU_COREPLLDEBUG
  54534. CMU_CSICLK
  54535. CMU_CVBSPLL
  54536. CMU_CVBSPLLDEBUG
  54537. CMU_DDRPLL
  54538. CMU_DDRPLLDEBUG
  54539. CMU_DECLK
  54540. CMU_DEEPCOLORPLLDEBUG
  54541. CMU_DEVCLKEN0
  54542. CMU_DEVCLKEN1
  54543. CMU_DEVPLL
  54544. CMU_DEVPLLDEBUG
  54545. CMU_DEVRST0
  54546. CMU_DEVRST1
  54547. CMU_DIGITALDEBUG
  54548. CMU_DISPLAYPLL
  54549. CMU_DISPLAYPLLDEBUG
  54550. CMU_DSICLK
  54551. CMU_DSIPLLCLK
  54552. CMU_EDPCLK
  54553. CMU_EGL_SPARE0
  54554. CMU_EGL_SPARE1
  54555. CMU_EGL_SPARE2
  54556. CMU_EGL_SPARE3
  54557. CMU_EGL_SPARE4
  54558. CMU_ETHERNETPLL
  54559. CMU_GPU3DCLK
  54560. CMU_HDECLK
  54561. CMU_HFPERCLKEN0
  54562. CMU_IMXCLK
  54563. CMU_KFC_SPARE0
  54564. CMU_KFC_SPARE1
  54565. CMU_KFC_SPARE2
  54566. CMU_KFC_SPARE3
  54567. CMU_KFC_SPARE4
  54568. CMU_LCDCLK
  54569. CMU_LENSCLK
  54570. CMU_MAX_CLKS
  54571. CMU_NANDCCLK
  54572. CMU_NANDPLL
  54573. CMU_NANDPLLDEBUG
  54574. CMU_PWM0CLK
  54575. CMU_PWM1CLK
  54576. CMU_PWM2CLK
  54577. CMU_PWM3CLK
  54578. CMU_PWM4CLK
  54579. CMU_PWM5CLK
  54580. CMU_R07C
  54581. CMU_REG0
  54582. CMU_REG0_CAL_COUNT_RESOL_SET
  54583. CMU_REG0_PDOWN_MASK
  54584. CMU_REG0_PLL_REF_SEL_MASK
  54585. CMU_REG0_PLL_REF_SEL_SET
  54586. CMU_REG1
  54587. CMU_REG10
  54588. CMU_REG10_VREG_REFSEL_SET
  54589. CMU_REG11
  54590. CMU_REG12
  54591. CMU_REG12_STATE_DELAY9_SET
  54592. CMU_REG13
  54593. CMU_REG14
  54594. CMU_REG15
  54595. CMU_REG16
  54596. CMU_REG16_BYPASS_PLL_LOCK_SET
  54597. CMU_REG16_CALIBRATION_DONE_OVERRIDE_SET
  54598. CMU_REG16_PVT_DN_MAN_ENA_MASK
  54599. CMU_REG16_PVT_UP_MAN_ENA_MASK
  54600. CMU_REG16_VCOCAL_WAIT_BTW_CODE_SET
  54601. CMU_REG17
  54602. CMU_REG17_PVT_CODE_R2A_SET
  54603. CMU_REG17_PVT_TERM_MAN_ENA_MASK
  54604. CMU_REG17_RESERVED_7_SET
  54605. CMU_REG18
  54606. CMU_REG19
  54607. CMU_REG1_PLL_CP_SEL_SET
  54608. CMU_REG1_PLL_CP_SET
  54609. CMU_REG1_PLL_MANUALCAL_SET
  54610. CMU_REG1_REFCLK_CMOS_SEL_MASK
  54611. CMU_REG1_REFCLK_CMOS_SEL_SET
  54612. CMU_REG2
  54613. CMU_REG20
  54614. CMU_REG21
  54615. CMU_REG22
  54616. CMU_REG23
  54617. CMU_REG24
  54618. CMU_REG25
  54619. CMU_REG26
  54620. CMU_REG26_FORCE_PLL_LOCK_SET
  54621. CMU_REG27
  54622. CMU_REG28
  54623. CMU_REG29
  54624. CMU_REG2_PLL_FBDIV_SET
  54625. CMU_REG2_PLL_LFRES_SET
  54626. CMU_REG2_PLL_REFDIV_SET
  54627. CMU_REG3
  54628. CMU_REG30
  54629. CMU_REG30_LOCK_COUNT_SET
  54630. CMU_REG30_PCIE_MODE_SET
  54631. CMU_REG31
  54632. CMU_REG32
  54633. CMU_REG32_FORCE_VCOCAL_START_MASK
  54634. CMU_REG32_IREF_ADJ_SET
  54635. CMU_REG32_PVT_CAL_WAIT_SEL_SET
  54636. CMU_REG33
  54637. CMU_REG34
  54638. CMU_REG34_VCO_CAL_VTH_HI_MAX_SET
  54639. CMU_REG34_VCO_CAL_VTH_HI_MIN_SET
  54640. CMU_REG34_VCO_CAL_VTH_LO_MAX_SET
  54641. CMU_REG34_VCO_CAL_VTH_LO_MIN_SET
  54642. CMU_REG35
  54643. CMU_REG35_PLL_SSC_MOD_SET
  54644. CMU_REG36
  54645. CMU_REG36_PLL_SSC_DSMSEL_SET
  54646. CMU_REG36_PLL_SSC_EN_SET
  54647. CMU_REG36_PLL_SSC_VSTEP_SET
  54648. CMU_REG37
  54649. CMU_REG38
  54650. CMU_REG39
  54651. CMU_REG3_VCOVARSEL_SET
  54652. CMU_REG3_VCO_MANMOMSEL_SET
  54653. CMU_REG3_VCO_MOMSEL_INIT_SET
  54654. CMU_REG4
  54655. CMU_REG5
  54656. CMU_REG5_PLL_LFCAP_SET
  54657. CMU_REG5_PLL_LFSMCAP_SET
  54658. CMU_REG5_PLL_LOCK_RESOLUTION_SET
  54659. CMU_REG5_PLL_RESETB_MASK
  54660. CMU_REG6
  54661. CMU_REG6_MAN_PVT_CAL_SET
  54662. CMU_REG6_PLL_VREGTRIM_SET
  54663. CMU_REG7
  54664. CMU_REG7_PLL_CALIB_DONE_RD
  54665. CMU_REG7_VCO_CAL_FAIL_RD
  54666. CMU_REG8
  54667. CMU_REG9
  54668. CMU_REG9_IGEN_BYPASS_SET
  54669. CMU_REG9_PLL_POST_DIVBY2_SET
  54670. CMU_REG9_TX_WORD_MODE_CH0_SET
  54671. CMU_REG9_TX_WORD_MODE_CH1_SET
  54672. CMU_REG9_VBG_BYPASSB_SET
  54673. CMU_REG9_WORD_LEN_10BIT
  54674. CMU_REG9_WORD_LEN_16BIT
  54675. CMU_REG9_WORD_LEN_20BIT
  54676. CMU_REG9_WORD_LEN_32BIT
  54677. CMU_REG9_WORD_LEN_40BIT
  54678. CMU_REG9_WORD_LEN_64BIT
  54679. CMU_REG9_WORD_LEN_66BIT
  54680. CMU_REG9_WORD_LEN_8BIT
  54681. CMU_SD0CLK
  54682. CMU_SD1CLK
  54683. CMU_SD2CLK
  54684. CMU_SD3CLK
  54685. CMU_SENSORCLK
  54686. CMU_SICLK
  54687. CMU_SSCLK
  54688. CMU_SSTSCLK
  54689. CMU_TLSCLK
  54690. CMU_TVOUTPLL
  54691. CMU_TVOUTPLLDEBUG
  54692. CMU_TYPE1_BASE
  54693. CMU_TYPE1_SIZE
  54694. CMU_TYPE2_BASE
  54695. CMU_TYPE2_SIZE
  54696. CMU_TYPE3_BASE
  54697. CMU_TYPE3_SIZE
  54698. CMU_UART0CLK
  54699. CMU_UART1CLK
  54700. CMU_UART2CLK
  54701. CMU_UART3CLK
  54702. CMU_UART4CLK
  54703. CMU_UART5CLK
  54704. CMU_UART6CLK
  54705. CMU_USBPLL
  54706. CMU_VCECLK
  54707. CMU_VDECLK
  54708. CMV4IV2_FIRMWARE
  54709. CMV4I_FIRMWARE
  54710. CMV4PV2_FIRMWARE
  54711. CMV4P_FIRMWARE
  54712. CMV9IV2_FIRMWARE
  54713. CMV9I_FIRMWARE
  54714. CMV9PV2_FIRMWARE
  54715. CMV9P_FIRMWARE
  54716. CMVEIV2_FIRMWARE
  54717. CMVEI_FIRMWARE
  54718. CMVEPV2_FIRMWARE
  54719. CMVEP_FIRMWARE
  54720. CMX1_CLK_MASK
  54721. CMX1_CLK_ROUTE
  54722. CMX255_DM9000_PHYS_BASE
  54723. CMX255_ETHIRQ
  54724. CMX255_GPIO_GREEN
  54725. CMX255_GPIO_IT8152_IRQ
  54726. CMX255_GPIO_RED
  54727. CMX270_DM9000_PHYS_BASE
  54728. CMX270_ETHIRQ
  54729. CMX270_GPIO_GREEN
  54730. CMX270_GPIO_IT8152_IRQ
  54731. CMX270_GPIO_RED
  54732. CMX270_MMC_IRQ
  54733. CMX2XX_IT8152_VIRT
  54734. CMX2XX_NR_IRQS
  54735. CMX2XX_VIRT_BASE
  54736. CMX2_CLK_MASK
  54737. CMX2_CLK_ROUTE
  54738. CMX3_CLK_MASK
  54739. CMX3_CLK_ROUTE
  54740. CMXFCR_FC1
  54741. CMXFCR_FC2
  54742. CMXFCR_FC3
  54743. CMXFCR_RF1CS
  54744. CMXFCR_RF1CS_BRG5
  54745. CMXFCR_RF1CS_BRG6
  54746. CMXFCR_RF1CS_BRG7
  54747. CMXFCR_RF1CS_BRG8
  54748. CMXFCR_RF1CS_CLK10
  54749. CMXFCR_RF1CS_CLK11
  54750. CMXFCR_RF1CS_CLK12
  54751. CMXFCR_RF1CS_CLK9
  54752. CMXFCR_RF1CS_MSK
  54753. CMXFCR_RF2CS
  54754. CMXFCR_RF2CS_BRG5
  54755. CMXFCR_RF2CS_BRG6
  54756. CMXFCR_RF2CS_BRG7
  54757. CMXFCR_RF2CS_BRG8
  54758. CMXFCR_RF2CS_CLK13
  54759. CMXFCR_RF2CS_CLK14
  54760. CMXFCR_RF2CS_CLK15
  54761. CMXFCR_RF2CS_CLK16
  54762. CMXFCR_RF2CS_MSK
  54763. CMXFCR_RF3CS
  54764. CMXFCR_RF3CS_BRG5
  54765. CMXFCR_RF3CS_BRG6
  54766. CMXFCR_RF3CS_BRG7
  54767. CMXFCR_RF3CS_BRG8
  54768. CMXFCR_RF3CS_CLK13
  54769. CMXFCR_RF3CS_CLK14
  54770. CMXFCR_RF3CS_CLK15
  54771. CMXFCR_RF3CS_CLK16
  54772. CMXFCR_RF3CS_MSK
  54773. CMXFCR_TF1CS
  54774. CMXFCR_TF1CS_BRG5
  54775. CMXFCR_TF1CS_BRG6
  54776. CMXFCR_TF1CS_BRG7
  54777. CMXFCR_TF1CS_BRG8
  54778. CMXFCR_TF1CS_CLK10
  54779. CMXFCR_TF1CS_CLK11
  54780. CMXFCR_TF1CS_CLK12
  54781. CMXFCR_TF1CS_CLK9
  54782. CMXFCR_TF1CS_MSK
  54783. CMXFCR_TF2CS
  54784. CMXFCR_TF2CS_BRG5
  54785. CMXFCR_TF2CS_BRG6
  54786. CMXFCR_TF2CS_BRG7
  54787. CMXFCR_TF2CS_BRG8
  54788. CMXFCR_TF2CS_CLK13
  54789. CMXFCR_TF2CS_CLK14
  54790. CMXFCR_TF2CS_CLK15
  54791. CMXFCR_TF2CS_CLK16
  54792. CMXFCR_TF2CS_MSK
  54793. CMXFCR_TF3CS
  54794. CMXFCR_TF3CS_BRG5
  54795. CMXFCR_TF3CS_BRG6
  54796. CMXFCR_TF3CS_BRG7
  54797. CMXFCR_TF3CS_BRG8
  54798. CMXFCR_TF3CS_CLK13
  54799. CMXFCR_TF3CS_CLK14
  54800. CMXFCR_TF3CS_CLK15
  54801. CMXFCR_TF3CS_CLK16
  54802. CMXFCR_TF3CS_MSK
  54803. CMXSCR_GR1
  54804. CMXSCR_GR2
  54805. CMXSCR_GR3
  54806. CMXSCR_GR4
  54807. CMXSCR_RS1CS_BRG1
  54808. CMXSCR_RS1CS_BRG2
  54809. CMXSCR_RS1CS_BRG3
  54810. CMXSCR_RS1CS_BRG4
  54811. CMXSCR_RS1CS_CLK11
  54812. CMXSCR_RS1CS_CLK12
  54813. CMXSCR_RS1CS_CLK3
  54814. CMXSCR_RS1CS_CLK4
  54815. CMXSCR_RS1CS_MSK
  54816. CMXSCR_RS2CS_BRG1
  54817. CMXSCR_RS2CS_BRG2
  54818. CMXSCR_RS2CS_BRG3
  54819. CMXSCR_RS2CS_BRG4
  54820. CMXSCR_RS2CS_CLK11
  54821. CMXSCR_RS2CS_CLK12
  54822. CMXSCR_RS2CS_CLK3
  54823. CMXSCR_RS2CS_CLK4
  54824. CMXSCR_RS2CS_MSK
  54825. CMXSCR_RS3CS_BRG1
  54826. CMXSCR_RS3CS_BRG2
  54827. CMXSCR_RS3CS_BRG3
  54828. CMXSCR_RS3CS_BRG4
  54829. CMXSCR_RS3CS_CLK5
  54830. CMXSCR_RS3CS_CLK6
  54831. CMXSCR_RS3CS_CLK7
  54832. CMXSCR_RS3CS_CLK8
  54833. CMXSCR_RS3CS_MSK
  54834. CMXSCR_RS4CS_BRG1
  54835. CMXSCR_RS4CS_BRG2
  54836. CMXSCR_RS4CS_BRG3
  54837. CMXSCR_RS4CS_BRG4
  54838. CMXSCR_RS4CS_CLK5
  54839. CMXSCR_RS4CS_CLK6
  54840. CMXSCR_RS4CS_CLK7
  54841. CMXSCR_RS4CS_CLK8
  54842. CMXSCR_RS4CS_MSK
  54843. CMXSCR_SC1
  54844. CMXSCR_SC2
  54845. CMXSCR_SC3
  54846. CMXSCR_SC4
  54847. CMXSCR_TS1CS_BRG1
  54848. CMXSCR_TS1CS_BRG2
  54849. CMXSCR_TS1CS_BRG3
  54850. CMXSCR_TS1CS_BRG4
  54851. CMXSCR_TS1CS_CLK11
  54852. CMXSCR_TS1CS_CLK12
  54853. CMXSCR_TS1CS_CLK3
  54854. CMXSCR_TS1CS_CLK4
  54855. CMXSCR_TS1CS_MSK
  54856. CMXSCR_TS2CS_BRG1
  54857. CMXSCR_TS2CS_BRG2
  54858. CMXSCR_TS2CS_BRG3
  54859. CMXSCR_TS2CS_BRG4
  54860. CMXSCR_TS2CS_CLK11
  54861. CMXSCR_TS2CS_CLK12
  54862. CMXSCR_TS2CS_CLK3
  54863. CMXSCR_TS2CS_CLK4
  54864. CMXSCR_TS2CS_MSK
  54865. CMXSCR_TS3CS_BRG1
  54866. CMXSCR_TS3CS_BRG2
  54867. CMXSCR_TS3CS_BRG3
  54868. CMXSCR_TS3CS_BRG4
  54869. CMXSCR_TS3CS_CLK5
  54870. CMXSCR_TS3CS_CLK6
  54871. CMXSCR_TS3CS_CLK7
  54872. CMXSCR_TS3CS_CLK8
  54873. CMXSCR_TS3CS_MSK
  54874. CMXSCR_TS4CS_BRG1
  54875. CMXSCR_TS4CS_BRG2
  54876. CMXSCR_TS4CS_BRG3
  54877. CMXSCR_TS4CS_BRG4
  54878. CMXSCR_TS4CS_CLK5
  54879. CMXSCR_TS4CS_CLK6
  54880. CMXSCR_TS4CS_CLK7
  54881. CMXSCR_TS4CS_CLK8
  54882. CMXSCR_TS4CS_MSK
  54883. CMX_BUFF_HALF
  54884. CMX_BUFF_MASK
  54885. CMX_BUFF_SIZE
  54886. CM_040
  54887. CM_420
  54888. CM_422
  54889. CM_444
  54890. CM_AC3EN1
  54891. CM_AC3EN2
  54892. CM_ADC2SPDIF
  54893. CM_ADC48K44K
  54894. CM_ADCBITLEN_13
  54895. CM_ADCBITLEN_14
  54896. CM_ADCBITLEN_15
  54897. CM_ADCBITLEN_16
  54898. CM_ADCBITLEN_MASK
  54899. CM_ADCDACLEN_060
  54900. CM_ADCDACLEN_066
  54901. CM_ADCDACLEN_130
  54902. CM_ADCDACLEN_280
  54903. CM_ADCDACLEN_MASK
  54904. CM_ADCDLEN_24K
  54905. CM_ADCDLEN_EXTRA
  54906. CM_ADCDLEN_MASK
  54907. CM_ADCDLEN_ORIGINAL
  54908. CM_ADCDLEN_WEIGHT
  54909. CM_ADCMULT_XIN
  54910. CM_ADJUST
  54911. CM_APR_ATTR_ID
  54912. CM_APR_COUNTER
  54913. CM_ARMCTL
  54914. CM_ASFC_MASK
  54915. CM_ASFC_SHIFT
  54916. CM_ASL_1394
  54917. CM_ASL_3G
  54918. CM_ASL_ACPIFLASH
  54919. CM_ASL_BIOSFLASH
  54920. CM_ASL_BLUETOOTH
  54921. CM_ASL_CAMERA
  54922. CM_ASL_CARDREADER
  54923. CM_ASL_CPUFV
  54924. CM_ASL_CPUTEMPERATURE
  54925. CM_ASL_DISPLAYSWITCH
  54926. CM_ASL_DVDROM
  54927. CM_ASL_FANCHASSIS
  54928. CM_ASL_FANCPU
  54929. CM_ASL_GPS
  54930. CM_ASL_HWCF
  54931. CM_ASL_IRDA
  54932. CM_ASL_LID
  54933. CM_ASL_MODEM
  54934. CM_ASL_PANELBRIGHT
  54935. CM_ASL_PANELPOWER
  54936. CM_ASL_TPD
  54937. CM_ASL_TV
  54938. CM_ASL_TYPE
  54939. CM_ASL_USBPORT1
  54940. CM_ASL_USBPORT2
  54941. CM_ASL_USBPORT3
  54942. CM_ASL_WIMAX
  54943. CM_ASL_WLAN
  54944. CM_ATR_PRESENT
  54945. CM_ATR_VALID
  54946. CM_ATTR_COUNT
  54947. CM_ATTR_ID_OFFSET
  54948. CM_AUTOIDLE
  54949. CM_AUTOIDLE1
  54950. CM_AUTOIDLE2
  54951. CM_AUTOIDLE3
  54952. CM_AVEOCTL
  54953. CM_AVEODIV
  54954. CM_AVERAGE
  54955. CM_BAD_CARD
  54956. CM_BASE2LIN
  54957. CM_BATTERY_PRESENT
  54958. CM_BREQ
  54959. CM_BUSY
  54960. CM_BUSYD
  54961. CM_BYPASS
  54962. CM_CAM0CTL
  54963. CM_CAM0DIV
  54964. CM_CAM1CTL
  54965. CM_CAM1DIV
  54966. CM_CAMERRX_CTRL_CSI0_CAMMODE_MASK
  54967. CM_CAMERRX_CTRL_CSI0_CTRLCLKEN_MASK
  54968. CM_CAMERRX_CTRL_CSI0_LANEENABLE_MASK
  54969. CM_CAMERRX_CTRL_CSI0_MODE_MASK
  54970. CM_CAMERRX_CTRL_CSI1_CAMMODE_MASK
  54971. CM_CAMERRX_CTRL_CSI1_CTRLCLKEN_MASK
  54972. CM_CAMERRX_CTRL_CSI1_LANEENABLE_MASK
  54973. CM_CAMERRX_CTRL_CSI1_MODE_MASK
  54974. CM_CAM_MCLK_HZ
  54975. CM_CAPTURE_SPDF
  54976. CM_CARD_INSERTED
  54977. CM_CARD_POWERED
  54978. CM_CCP2CTL
  54979. CM_CCP2DIV
  54980. CM_CDPLAY
  54981. CM_CDPLAY_SHIFT
  54982. CM_CENTR2LIN
  54983. CM_CH0BUSY
  54984. CM_CH0FMT_MASK
  54985. CM_CH0FMT_SHIFT
  54986. CM_CH0_INT_EN
  54987. CM_CH0_SRATE_128K
  54988. CM_CH0_SRATE_176K
  54989. CM_CH0_SRATE_88K
  54990. CM_CH0_SRATE_96K
  54991. CM_CH0_SRATE_MASK
  54992. CM_CH1BUSY
  54993. CM_CH1FMT_MASK
  54994. CM_CH1FMT_SHIFT
  54995. CM_CH1_INT_EN
  54996. CM_CH1_SRATE_176K
  54997. CM_CH1_SRATE_88K
  54998. CM_CH1_SRATE_96K
  54999. CM_CHADC0
  55000. CM_CHADC1
  55001. CM_CHARGER_STAT
  55002. CM_CHB3D
  55003. CM_CHB3D5C
  55004. CM_CHB3D6C
  55005. CM_CHB3D8C
  55006. CM_CHEN0
  55007. CM_CHEN1
  55008. CM_CHINT0
  55009. CM_CHINT1
  55010. CM_CHIPMODE_MASK
  55011. CM_CHIPREV_MASK
  55012. CM_CHIPREV_SHIFT
  55013. CM_CHIP_037
  55014. CM_CHIP_039
  55015. CM_CHIP_039_6CH
  55016. CM_CHIP_055
  55017. CM_CHIP_8768
  55018. CM_CHIP_MASK1
  55019. CM_CHIP_MASK2
  55020. CM_CH_CAPT
  55021. CM_CH_PLAY
  55022. CM_CLEANUP_CACHE_TIMEOUT
  55023. CM_CLKEN
  55024. CM_CLKSEL
  55025. CM_CLKSEL1
  55026. CM_CLKSEL2
  55027. CM_COEF_FORMAT_ENUM
  55028. CM_CONN_ACK
  55029. CM_CONN_CLOSE
  55030. CM_CONN_REQ
  55031. CM_COUNTER_ATTR
  55032. CM_COUNTER_GROUPS
  55033. CM_COUNTER_OFFSET
  55034. CM_CTRL
  55035. CM_CTRL_BIGENDIAN
  55036. CM_CTRL_CORE_CAMERRX_CONTROL
  55037. CM_CTRL_EBIWP
  55038. CM_CTRL_FASTBUS
  55039. CM_CTRL_HIGHVECTORS
  55040. CM_CTRL_LCDBIASDN
  55041. CM_CTRL_LCDBIASEN
  55042. CM_CTRL_LCDBIASUP
  55043. CM_CTRL_LCDEN0
  55044. CM_CTRL_LCDEN1
  55045. CM_CTRL_LCDMUXSEL_GENLCD
  55046. CM_CTRL_LCDMUXSEL_MASK
  55047. CM_CTRL_LCDMUXSEL_SHARPLCD
  55048. CM_CTRL_LCDMUXSEL_VGA555_TFT555
  55049. CM_CTRL_LCDMUXSEL_VGA565_TFT555
  55050. CM_CTRL_LED
  55051. CM_CTRL_REMAP
  55052. CM_CTRL_STATIC
  55053. CM_CTRL_STATIC1
  55054. CM_CTRL_STATIC2
  55055. CM_CTRL_SYNC
  55056. CM_CTRL_n24BITEN
  55057. CM_CTRL_nMBDET
  55058. CM_C_EEACCESS
  55059. CM_C_EECK46
  55060. CM_C_EECS
  55061. CM_C_EEDI46
  55062. CM_DAC2SPDO
  55063. CM_DATA_MSG
  55064. CM_DATA_SIGNED
  55065. CM_DBLSPDS
  55066. CM_DEFAULT_CHARGE_TEMP_MAX
  55067. CM_DEFAULT_RECHARGE_TEMP_DIFF
  55068. CM_DFTCTL
  55069. CM_DFTDIV
  55070. CM_DISABLE
  55071. CM_DISCONNECTED
  55072. CM_DISCOVERY
  55073. CM_DIV_FRAC_BITS
  55074. CM_DIV_FRAC_MASK
  55075. CM_DMAUTO
  55076. CM_DPICTL
  55077. CM_DPIDIV
  55078. CM_DRAW
  55079. CM_DREP_ATTR_ID
  55080. CM_DREP_COUNTER
  55081. CM_DREQ_ATTR_ID
  55082. CM_DREQ_COUNTER
  55083. CM_DSFC_MASK
  55084. CM_DSFC_SHIFT
  55085. CM_DSI0ECTL
  55086. CM_DSI0EDIV
  55087. CM_DSI0PCTL
  55088. CM_DSI0PDIV
  55089. CM_DSI1ECTL
  55090. CM_DSI1EDIV
  55091. CM_DSI1PCTL
  55092. CM_DSI1PDIV
  55093. CM_ECBUS_S
  55094. CM_EDGEIRQ
  55095. CM_EMMC2CTL
  55096. CM_EMMC2DIV
  55097. CM_EMMCCTL
  55098. CM_EMMCDIV
  55099. CM_EN
  55100. CM_ENABLE
  55101. CM_ENABLE_SIZE
  55102. CM_ENCENTER
  55103. CM_ENCODE_REV
  55104. CM_ENDBDAC
  55105. CM_ENSPDOUT
  55106. CM_ENWR8237
  55107. CM_ENWRASID
  55108. CM_ENWRMSID
  55109. CM_ERASE
  55110. CM_EVENT
  55111. CM_EVENT_BATT_COLD
  55112. CM_EVENT_BATT_FULL
  55113. CM_EVENT_BATT_IN
  55114. CM_EVENT_BATT_OUT
  55115. CM_EVENT_BATT_OVERHEAT
  55116. CM_EVENT_CHG_START_STOP
  55117. CM_EVENT_EXT_PWR_IN_OUT
  55118. CM_EVENT_OTHERS
  55119. CM_EVENT_UNKNOWN
  55120. CM_EXBASEN
  55121. CM_EXTENT_CODEC
  55122. CM_EXTENT_MIDI
  55123. CM_EXTENT_SYNTH
  55124. CM_FAIL
  55125. CM_FCLKEN
  55126. CM_FCLKEN1
  55127. CM_FLASH_READ
  55128. CM_FLASH_WRITE
  55129. CM_FLINKOFF
  55130. CM_FLINKON
  55131. CM_FMMUTE
  55132. CM_FMMUTE_SHIFT
  55133. CM_FMOFFSET2
  55134. CM_FMSEL_388
  55135. CM_FMSEL_3C8
  55136. CM_FMSEL_3E0
  55137. CM_FMSEL_3E8
  55138. CM_FMSEL_MASK
  55139. CM_FM_EN
  55140. CM_FPGAVER_MASK
  55141. CM_FPGAVER_SHIFT
  55142. CM_FRAC
  55143. CM_FUEL_GAUGE
  55144. CM_GAIN
  55145. CM_GAMUT_REMAP_MODE_ENUM
  55146. CM_GATE
  55147. CM_GATE_BIT
  55148. CM_GCR_ACCESS_ACCESSEN
  55149. CM_GCR_BASE_CMDEFTGT
  55150. CM_GCR_BASE_CMDEFTGT_IOCU0
  55151. CM_GCR_BASE_CMDEFTGT_IOCU1
  55152. CM_GCR_BASE_CMDEFTGT_MEM
  55153. CM_GCR_BASE_CMDEFTGT_RESERVED
  55154. CM_GCR_BASE_GCRBASE
  55155. CM_GCR_CONFIG_CLUSTER_COH_CAPABLE
  55156. CM_GCR_CONFIG_CLUSTER_ID
  55157. CM_GCR_CONFIG_NUMIOCU
  55158. CM_GCR_CONFIG_NUM_CLUSTERS
  55159. CM_GCR_CONFIG_PCORES
  55160. CM_GCR_CPC_BASE_CPCBASE
  55161. CM_GCR_CPC_BASE_CPCEN
  55162. CM_GCR_CPC_STATUS_EX
  55163. CM_GCR_Cx_COHERENCE_COHDOMAINEN
  55164. CM_GCR_Cx_CONFIG_IOCUTYPE
  55165. CM_GCR_Cx_CONFIG_PVPE
  55166. CM_GCR_Cx_ID_CLUSTER
  55167. CM_GCR_Cx_ID_CORE
  55168. CM_GCR_Cx_OTHER_BLOCK
  55169. CM_GCR_Cx_OTHER_BLOCK_GLOBAL
  55170. CM_GCR_Cx_OTHER_BLOCK_GLOBAL_HIGH
  55171. CM_GCR_Cx_OTHER_BLOCK_LOCAL
  55172. CM_GCR_Cx_OTHER_BLOCK_USER
  55173. CM_GCR_Cx_OTHER_CLUSTER
  55174. CM_GCR_Cx_OTHER_CLUSTER_EN
  55175. CM_GCR_Cx_OTHER_CORENUM
  55176. CM_GCR_Cx_OTHER_CORE_CM
  55177. CM_GCR_Cx_OTHER_GIC_EN
  55178. CM_GCR_Cx_RESET_BASE_BEVEXCBASE
  55179. CM_GCR_Cx_RESET_EXT_BASE_BEVEXCMASK
  55180. CM_GCR_Cx_RESET_EXT_BASE_BEVEXCPA
  55181. CM_GCR_Cx_RESET_EXT_BASE_EVARESET
  55182. CM_GCR_Cx_RESET_EXT_BASE_PRESENT
  55183. CM_GCR_Cx_RESET_EXT_BASE_UEB
  55184. CM_GCR_ERROR_CAUSE_ERRINFO
  55185. CM_GCR_ERROR_CAUSE_ERRTYPE
  55186. CM_GCR_ERROR_MULT_ERR2ND
  55187. CM_GCR_ERR_CONTROL_L2_ECC_EN
  55188. CM_GCR_ERR_CONTROL_L2_ECC_SUPPORT
  55189. CM_GCR_GIC_BASE_GICBASE
  55190. CM_GCR_GIC_BASE_GICEN
  55191. CM_GCR_GIC_STATUS_EX
  55192. CM_GCR_L2SM_COP_CMD
  55193. CM_GCR_L2SM_COP_CMD_ABORT
  55194. CM_GCR_L2SM_COP_CMD_START
  55195. CM_GCR_L2SM_COP_PRESENT
  55196. CM_GCR_L2SM_COP_RESULT
  55197. CM_GCR_L2SM_COP_RESULT_ABORT_ERROR
  55198. CM_GCR_L2SM_COP_RESULT_ABORT_OK
  55199. CM_GCR_L2SM_COP_RESULT_DONE_ERROR
  55200. CM_GCR_L2SM_COP_RESULT_DONE_OK
  55201. CM_GCR_L2SM_COP_RESULT_DONTCARE
  55202. CM_GCR_L2SM_COP_RUNNING
  55203. CM_GCR_L2SM_COP_TYPE
  55204. CM_GCR_L2SM_COP_TYPE_FETCHLOCK
  55205. CM_GCR_L2SM_COP_TYPE_HIT_INV
  55206. CM_GCR_L2SM_COP_TYPE_HIT_WB
  55207. CM_GCR_L2SM_COP_TYPE_HIT_WBINV
  55208. CM_GCR_L2SM_COP_TYPE_IDX_STORETAG
  55209. CM_GCR_L2SM_COP_TYPE_IDX_STORETAGDATA
  55210. CM_GCR_L2SM_COP_TYPE_IDX_WBINV
  55211. CM_GCR_L2SM_TAG_ADDR_COP_NUM_LINES
  55212. CM_GCR_L2SM_TAG_ADDR_COP_START_TAG
  55213. CM_GCR_L2_CONFIG_ASSOC
  55214. CM_GCR_L2_CONFIG_BYPASS
  55215. CM_GCR_L2_CONFIG_LINE_SIZE
  55216. CM_GCR_L2_CONFIG_SET_SIZE
  55217. CM_GCR_L2_ONLY_SYNC_BASE_SYNCBASE
  55218. CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN
  55219. CM_GCR_L2_PFT_CONTROL_B_CEN
  55220. CM_GCR_L2_PFT_CONTROL_B_PORTID
  55221. CM_GCR_L2_PFT_CONTROL_NPFT
  55222. CM_GCR_L2_PFT_CONTROL_PAGEMASK
  55223. CM_GCR_L2_PFT_CONTROL_PFTEN
  55224. CM_GCR_REGn_BASE_BASEADDR
  55225. CM_GCR_REGn_MASK_ADDRMASK
  55226. CM_GCR_REGn_MASK_CCAOVR
  55227. CM_GCR_REGn_MASK_CCAOVREN
  55228. CM_GCR_REGn_MASK_CMTGT
  55229. CM_GCR_REGn_MASK_CMTGT_DISABLED
  55230. CM_GCR_REGn_MASK_CMTGT_IOCU0
  55231. CM_GCR_REGn_MASK_CMTGT_IOCU1
  55232. CM_GCR_REGn_MASK_CMTGT_MEM
  55233. CM_GCR_REGn_MASK_DROPL2
  55234. CM_GCR_REV_MAJOR
  55235. CM_GCR_REV_MINOR
  55236. CM_GCR_SYS_CONFIG2_MAXVPW
  55237. CM_GLOBAL_CREDITS
  55238. CM_GLOBAL_PASSTHROUGH_DISBALE
  55239. CM_GLOBAL_PASSTHROUGH_ENABLE
  55240. CM_GNRICCTL
  55241. CM_GNRICDIV
  55242. CM_GP0CTL
  55243. CM_GP0DIV
  55244. CM_GP1CTL
  55245. CM_GP1DIV
  55246. CM_GP2CTL
  55247. CM_GP2DIV
  55248. CM_H264CTL
  55249. CM_H264DIV
  55250. CM_HSMCTL
  55251. CM_HSMDIV
  55252. CM_HTDMAINT
  55253. CM_I2S_CTRL
  55254. CM_ICLKEN
  55255. CM_ICLKEN1
  55256. CM_ICLKEN2
  55257. CM_ICLKEN3
  55258. CM_ICSC_MODE_ENUM
  55259. CM_IDLE
  55260. CM_IDLEST
  55261. CM_IDLEST1
  55262. CM_IDLEST1_CORE_V
  55263. CM_IDLEST2
  55264. CM_IDLEST_CKGEN_V
  55265. CM_ID_DEREFED
  55266. CM_ID_REFED
  55267. CM_INTR
  55268. CM_INTRM
  55269. CM_INVERT
  55270. CM_INVIDWEN
  55271. CM_INVLRCK
  55272. CM_IOCARDOFF
  55273. CM_IOCGATR
  55274. CM_IOCGSTATUS
  55275. CM_IOCSPTS
  55276. CM_IOCSRDR
  55277. CM_IOC_MAGIC
  55278. CM_IOC_MAXNR
  55279. CM_IOSDBGLVL
  55280. CM_IO_PASSTHROUGH
  55281. CM_IO_WRITEBACK
  55282. CM_IO_WRITETHROUGH
  55283. CM_ISPCTL
  55284. CM_ISPDIV
  55285. CM_JIFFIES_SMALL
  55286. CM_JYSTK_EN
  55287. CM_KILL
  55288. CM_LANE_CTRL
  55289. CM_LAP_ATTR_ID
  55290. CM_LAP_COUNTER
  55291. CM_LEG_HDMA
  55292. CM_LEG_STEREO
  55293. CM_LHBTOG
  55294. CM_LOCK
  55295. CM_LOCK_FLOCKA
  55296. CM_LOCK_FLOCKB
  55297. CM_LOCK_FLOCKC
  55298. CM_LOCK_FLOCKD
  55299. CM_LOCK_FLOCKH
  55300. CM_LTDMAINT
  55301. CM_LUT_2_CONFIG_ENUM
  55302. CM_LUT_2_MODE_ENUM
  55303. CM_LUT_4_CONFIG_ENUM
  55304. CM_LUT_4_MODE_ENUM
  55305. CM_LUT_NUM_SEG
  55306. CM_LUT_RAM_SEL
  55307. CM_MASK_EN
  55308. CM_MASTER
  55309. CM_MAXIMUM_RATE
  55310. CM_MAX_DEV
  55311. CM_MCBINT
  55312. CM_MHL1
  55313. CM_MHL3
  55314. CM_MICGAINZ
  55315. CM_MICGAINZ_SHIFT
  55316. CM_MIC_CENTER_LFE
  55317. CM_MIDSMP
  55318. CM_MIN_VALID
  55319. CM_MMODE_MASK
  55320. CM_MOVE
  55321. CM_MRA_ATTR_ID
  55322. CM_MRA_COUNTER
  55323. CM_MSGS_H
  55324. CM_MSG_RESPONSE_OTHER
  55325. CM_MSG_RESPONSE_REP
  55326. CM_MSG_RESPONSE_REQ
  55327. CM_MUTECH1
  55328. CM_N4SPK3D
  55329. CM_NAME
  55330. CM_NOT_CONCERNED
  55331. CM_NOT_PENDING
  55332. CM_NO_BATTERY
  55333. CM_NO_CLOCKS
  55334. CM_NO_READER
  55335. CM_NXCHG
  55336. CM_OPEN_ADC
  55337. CM_OPEN_CAPTURE
  55338. CM_OPEN_CH_MASK
  55339. CM_OPEN_DAC
  55340. CM_OPEN_MCHAN
  55341. CM_OPEN_NONE
  55342. CM_OPEN_PLAYBACK
  55343. CM_OPEN_PLAYBACK2
  55344. CM_OPEN_PLAYBACK_MULTI
  55345. CM_OPEN_SPDIF
  55346. CM_OPEN_SPDIF_CAPTURE
  55347. CM_OPEN_SPDIF_PLAYBACK
  55348. CM_OSCCOUNT
  55349. CM_OTPCTL
  55350. CM_OTPDIV
  55351. CM_PASSWORD
  55352. CM_PAUSE0
  55353. CM_PAUSE1
  55354. CM_PCMCTL
  55355. CM_PCMDIV
  55356. CM_PENDING
  55357. CM_PERIACTL
  55358. CM_PERIADIV
  55359. CM_PERIICTL
  55360. CM_PERIIDIV
  55361. CM_PLAYBACK_SPDF
  55362. CM_PLAYBACK_SRATE_176K
  55363. CM_PLLA
  55364. CM_PLLA_HOLDCCP2
  55365. CM_PLLA_HOLDCORE
  55366. CM_PLLA_HOLDDSI0
  55367. CM_PLLA_HOLDPER
  55368. CM_PLLA_LOADCCP2
  55369. CM_PLLA_LOADCORE
  55370. CM_PLLA_LOADDSI0
  55371. CM_PLLA_LOADPER
  55372. CM_PLLB
  55373. CM_PLLB_HOLDARM
  55374. CM_PLLB_LOADARM
  55375. CM_PLLC
  55376. CM_PLLC_HOLDCORE0
  55377. CM_PLLC_HOLDCORE1
  55378. CM_PLLC_HOLDCORE2
  55379. CM_PLLC_HOLDPER
  55380. CM_PLLC_LOADCORE0
  55381. CM_PLLC_LOADCORE1
  55382. CM_PLLC_LOADCORE2
  55383. CM_PLLC_LOADPER
  55384. CM_PLLD
  55385. CM_PLLD_HOLDCORE
  55386. CM_PLLD_HOLDDSI0
  55387. CM_PLLD_HOLDDSI1
  55388. CM_PLLD_HOLDPER
  55389. CM_PLLD_LOADCORE
  55390. CM_PLLD_LOADDSI0
  55391. CM_PLLD_LOADDSI1
  55392. CM_PLLD_LOADPER
  55393. CM_PLLH
  55394. CM_PLLH_LOADAUX
  55395. CM_PLLH_LOADPIX
  55396. CM_PLLH_LOADRCAL
  55397. CM_PLL_ANARST
  55398. CM_POLL_ALWAYS
  55399. CM_POLL_CHARGING_ONLY
  55400. CM_POLL_DISABLE
  55401. CM_POLL_EXTERNAL_POWER_ONLY
  55402. CM_POLVALID
  55403. CM_PROINV
  55404. CM_PULSECTL
  55405. CM_PULSEDIV
  55406. CM_PWD
  55407. CM_PWMCTL
  55408. CM_PWMDIV
  55409. CM_RAUXLEN
  55410. CM_RAUXLEN_SHIFT
  55411. CM_RAUXREN
  55412. CM_RAUXREN_SHIFT
  55413. CM_READ_ONLY
  55414. CM_REALTCMP
  55415. CM_REAR2FRONT
  55416. CM_REAR2FRONT_SHIFT
  55417. CM_REAR2LIN
  55418. CM_REAR2LIN_SHIFT
  55419. CM_RECV
  55420. CM_RECV_DUPLICATES
  55421. CM_REFFREQ_XIN
  55422. CM_REG_AC97
  55423. CM_REG_AUX_VOL
  55424. CM_REG_CH0_FRAME1
  55425. CM_REG_CH0_FRAME2
  55426. CM_REG_CH1_FRAME1
  55427. CM_REG_CH1_FRAME2
  55428. CM_REG_CHFORMAT
  55429. CM_REG_DEV
  55430. CM_REG_EXTENT_IND
  55431. CM_REG_EXTERN_CODEC
  55432. CM_REG_EXT_MISC
  55433. CM_REG_FM_PCI
  55434. CM_REG_FUNCTRL0
  55435. CM_REG_FUNCTRL1
  55436. CM_REG_INT_HLDCLR
  55437. CM_REG_INT_STATUS
  55438. CM_REG_LEGACY_CTRL
  55439. CM_REG_MISC
  55440. CM_REG_MISC_CTRL
  55441. CM_REG_MIXER0
  55442. CM_REG_MIXER1
  55443. CM_REG_MIXER2
  55444. CM_REG_MIXER21
  55445. CM_REG_MIXER3
  55446. CM_REG_MPU_PCI
  55447. CM_REG_PLL
  55448. CM_REG_SB16_ADDR
  55449. CM_REG_SB16_DATA
  55450. CM_REG_SBVR
  55451. CM_REG_TDMA_POSITION
  55452. CM_REJ_ATTR_ID
  55453. CM_REJ_COUNTER
  55454. CM_REP_ATTR_ID
  55455. CM_REP_COUNTER
  55456. CM_REQUEST_CARD_CONTROLLER_VERSION_GET
  55457. CM_REQUEST_CARD_DATA_GET
  55458. CM_REQUEST_CARD_DATA_SET
  55459. CM_REQUEST_CARD_GET_DATA_LINK_STATUS
  55460. CM_REQUEST_CARD_GET_MAC_ADDRESS
  55461. CM_REQUEST_CARD_GET_STATUS
  55462. CM_REQUEST_CARD_INFO_GET
  55463. CM_REQUEST_CARD_SERIAL_DATA_PATH_GET
  55464. CM_REQUEST_CARD_SERIAL_DATA_PATH_SET
  55465. CM_REQUEST_CHIP_ADSL_LINE_GET_SPEED
  55466. CM_REQUEST_CHIP_ADSL_LINE_GET_STATUS
  55467. CM_REQUEST_CHIP_ADSL_LINE_START
  55468. CM_REQUEST_CHIP_ADSL_LINE_STOP
  55469. CM_REQUEST_CHIP_GET_DP_VERSIONS
  55470. CM_REQUEST_CHIP_GET_MAC_ADDRESS
  55471. CM_REQUEST_COMMAND_HW_IO
  55472. CM_REQUEST_INTERFACE_HW_IO
  55473. CM_REQUEST_MAX
  55474. CM_REQUEST_TEST
  55475. CM_REQUEST_UNDEFINED
  55476. CM_REQ_ATTR_ID
  55477. CM_REQ_COUNTER
  55478. CM_RESET
  55479. CM_REV_CM2
  55480. CM_REV_CM2_5
  55481. CM_REV_CM3
  55482. CM_REV_CM3_5
  55483. CM_RGB
  55484. CM_RLOOPLEN
  55485. CM_RLOOPREN
  55486. CM_RST_CH0
  55487. CM_RST_CH1
  55488. CM_RTC_SMALL
  55489. CM_RTU_ATTR_ID
  55490. CM_RTU_COUNTER
  55491. CM_SAVED_MIXERS
  55492. CM_SDCCTL
  55493. CM_SDCDIV
  55494. CM_SERVICE
  55495. CM_SETLAT48
  55496. CM_SETRETRY
  55497. CM_SETUP_SIZE
  55498. CM_SFILENB
  55499. CM_SFIL_MASK
  55500. CM_SHAREADC
  55501. CM_SIDR_REP_ATTR_ID
  55502. CM_SIDR_REP_COUNTER
  55503. CM_SIDR_REQ_ATTR_ID
  55504. CM_SIDR_REQ_COUNTER
  55505. CM_SINGLE_INSTANCE
  55506. CM_SLAVE
  55507. CM_SLIMCTL
  55508. CM_SLIMDIV
  55509. CM_SMICTL
  55510. CM_SMIDIV
  55511. CM_SOFTBACK
  55512. CM_SPATUS48K
  55513. CM_SPD24SEL
  55514. CM_SPD24SEL39
  55515. CM_SPD32FMT
  55516. CM_SPD32SEL
  55517. CM_SPDCOPYRHT
  55518. CM_SPDFLOOP
  55519. CM_SPDFLOOPI
  55520. CM_SPDF_0
  55521. CM_SPDF_1
  55522. CM_SPDF_AC97
  55523. CM_SPDIF48K
  55524. CM_SPDIF_CTRL
  55525. CM_SPDIF_INVERSE
  55526. CM_SPDIF_INVERSE2
  55527. CM_SPDIF_SELECT1
  55528. CM_SPDIF_SELECT2
  55529. CM_SPDLOCKED
  55530. CM_SPDO2DAC
  55531. CM_SPDO5V
  55532. CM_SPDVALID
  55533. CM_SRC_BITS
  55534. CM_SRC_GND
  55535. CM_SRC_MASK
  55536. CM_SRC_OSC
  55537. CM_SRC_PLLA_CORE
  55538. CM_SRC_PLLA_PER
  55539. CM_SRC_PLLC_CORE0
  55540. CM_SRC_PLLC_CORE1
  55541. CM_SRC_PLLC_CORE2
  55542. CM_SRC_PLLC_PER
  55543. CM_SRC_PLLD_CORE
  55544. CM_SRC_PLLD_PER
  55545. CM_SRC_PLLH_AUX
  55546. CM_SRC_SHIFT
  55547. CM_SRC_TESTDEBUG0
  55548. CM_SRC_TESTDEBUG1
  55549. CM_STANDALONE
  55550. CM_STARTUP
  55551. CM_STARTUP_DELAY
  55552. CM_STATE_VALID
  55553. CM_STATUS_DBG_LOOPBACK
  55554. CM_STATUS_ERROR
  55555. CM_STATUS_MAX
  55556. CM_STATUS_PARAMETER_ERROR
  55557. CM_STATUS_SUCCESS
  55558. CM_STATUS_UNDEFINED
  55559. CM_STATUS_UNIMPLEMENTED
  55560. CM_STATUS_UNSUPPORTED
  55561. CM_SYSCTL
  55562. CM_SYSDIV
  55563. CM_TCNTCNT
  55564. CM_TCNTCTL
  55565. CM_TCNT_SRC1_SHIFT
  55566. CM_TD0CTL
  55567. CM_TD0DIV
  55568. CM_TD1CTL
  55569. CM_TD1DIV
  55570. CM_TDMA_ADR_MASK
  55571. CM_TDMA_CNT_MASK
  55572. CM_TDMA_INT_EN
  55573. CM_TECCTL
  55574. CM_TECDIV
  55575. CM_TIMERCTL
  55576. CM_TIMERDIV
  55577. CM_TOLERANCE_RATE
  55578. CM_TSENSCTL
  55579. CM_TSENSDIV
  55580. CM_TWAIT0
  55581. CM_TWAIT1
  55582. CM_TWAIT_MASK
  55583. CM_TXVX
  55584. CM_TX_PQ_BASE
  55585. CM_UARTCTL
  55586. CM_UARTDIV
  55587. CM_UARTINT
  55588. CM_UART_EN
  55589. CM_UNDEFINED
  55590. CM_UNKNOWN_21_MASK
  55591. CM_UNKNOWN_27_MASK
  55592. CM_UNKNOWN_90_MASK
  55593. CM_UNKNOWN_INT_EN
  55594. CM_UPDDMA_1024
  55595. CM_UPDDMA_2048
  55596. CM_UPDDMA_256
  55597. CM_UPDDMA_512
  55598. CM_UPDDMA_MASK
  55599. CM_V3DCTL
  55600. CM_V3DDIV
  55601. CM_VADMIC3
  55602. CM_VADMIC_MASK
  55603. CM_VADMIC_SHIFT
  55604. CM_VAU
  55605. CM_VAUXLM
  55606. CM_VAUXLM_SHIFT
  55607. CM_VAUXL_MASK
  55608. CM_VAUXRM
  55609. CM_VAUXRM_SHIFT
  55610. CM_VAUXR_MASK
  55611. CM_VCO
  55612. CM_VECCTL
  55613. CM_VECDIV
  55614. CM_VIDWPDSB
  55615. CM_VIDWPPRT
  55616. CM_VID_CTRL
  55617. CM_VMGAIN
  55618. CM_VMPU_300
  55619. CM_VMPU_310
  55620. CM_VMPU_320
  55621. CM_VMPU_330
  55622. CM_VMPU_MASK
  55623. CM_VOICE_EN
  55624. CM_VPHOM
  55625. CM_VPHONE_MASK
  55626. CM_VPHONE_SHIFT
  55627. CM_VPUCTL
  55628. CM_VPUDIV
  55629. CM_VSBSEL_220
  55630. CM_VSBSEL_240
  55631. CM_VSBSEL_260
  55632. CM_VSBSEL_280
  55633. CM_VSBSEL_MASK
  55634. CM_VSPKM
  55635. CM_WAVEINL
  55636. CM_WAVEINL_SHIFT
  55637. CM_WAVEINR
  55638. CM_WAVEINR_SHIFT
  55639. CM_WRITE
  55640. CM_WRITE_BASE_ONLY
  55641. CM_WSMUTE
  55642. CM_WSMUTE_SHIFT
  55643. CM_X300_ETH_PHYS
  55644. CM_X300_MMC_IRQ
  55645. CM_X3DEN
  55646. CM_X3DEN_SHIFT
  55647. CM_XCHGDAC
  55648. CM_XDO46
  55649. CM_XGPO1
  55650. CM_XMIT
  55651. CM_XMIT_RETRIES
  55652. CM_X_ADPCM
  55653. CM_X_SB16
  55654. CM_YES_PENDING
  55655. CM_ZVPORT
  55656. CM__MEM_PG
  55657. CM__MEM_PG__0
  55658. CM_bias_params
  55659. CMnDDBPTR
  55660. CMnINT
  55661. CMnINTEN
  55662. CMnINT_MASK
  55663. CMnREQMBX
  55664. CMnREQMBXE
  55665. CMnRSPMBX
  55666. CMnRSPMBXF
  55667. CMnSCBPTR
  55668. CMnSCRATCH
  55669. CMnSCRATCHPAGE
  55670. CN
  55671. CN23XX_BAR1_INDEX_OFFSET
  55672. CN23XX_CFG_IO_QUEUES
  55673. CN23XX_CONFIG_DEVICE_ID
  55674. CN23XX_CONFIG_MSIX_CAP
  55675. CN23XX_CONFIG_MSIX_LMSI
  55676. CN23XX_CONFIG_MSIX_MSIMD
  55677. CN23XX_CONFIG_MSIX_MSIMM
  55678. CN23XX_CONFIG_MSIX_MSIMP
  55679. CN23XX_CONFIG_MSIX_UMSI
  55680. CN23XX_CONFIG_PCIE_CAP
  55681. CN23XX_CONFIG_PCIE_CORRECT_ERR_STATUS
  55682. CN23XX_CONFIG_PCIE_DEVCAP
  55683. CN23XX_CONFIG_PCIE_DEVCTL
  55684. CN23XX_CONFIG_PCIE_DEVCTL2
  55685. CN23XX_CONFIG_PCIE_DEVCTL_MASK
  55686. CN23XX_CONFIG_PCIE_FLTMSK
  55687. CN23XX_CONFIG_PCIE_LINKCAP
  55688. CN23XX_CONFIG_PCIE_LINKCTL
  55689. CN23XX_CONFIG_PCIE_LINKCTL2
  55690. CN23XX_CONFIG_PCIE_SLOTCAP
  55691. CN23XX_CONFIG_PCIE_SLOTCTL
  55692. CN23XX_CONFIG_PCIE_UNCORRECT_ERR_MASK
  55693. CN23XX_CONFIG_SRIOV_BARX
  55694. CN23XX_CONFIG_SRIOV_BAR_64BIT
  55695. CN23XX_CONFIG_SRIOV_BAR_IO
  55696. CN23XX_CONFIG_SRIOV_BAR_PF
  55697. CN23XX_CONFIG_SRIOV_BAR_START
  55698. CN23XX_CONFIG_SRIOV_VFDEVID
  55699. CN23XX_CONFIG_VENDOR_ID
  55700. CN23XX_CONFIG_XPANSION_BAR
  55701. CN23XX_DB_MAX
  55702. CN23XX_DB_MIN
  55703. CN23XX_DB_TIMEOUT
  55704. CN23XX_DEFAULT_INPUT_JABBER
  55705. CN23XX_DEFAULT_IQ_DESCRIPTORS
  55706. CN23XX_DEFAULT_OQ_DESCRIPTORS
  55707. CN23XX_DEF_IQ_INTR_BYTE_THRESHOLD
  55708. CN23XX_DEF_IQ_INTR_THRESHOLD
  55709. CN23XX_DMA_CNT
  55710. CN23XX_DMA_CNT_START
  55711. CN23XX_DMA_INT_LEVEL
  55712. CN23XX_DMA_INT_LEVEL_START
  55713. CN23XX_DMA_OFFSET
  55714. CN23XX_DMA_PKT_INT_LEVEL
  55715. CN23XX_DMA_TIM
  55716. CN23XX_DMA_TIME_INT_LEVEL
  55717. CN23XX_DMA_TIM_START
  55718. CN23XX_DPI_CTL
  55719. CN23XX_DPI_DMA_COMMIT_MODE
  55720. CN23XX_DPI_DMA_CONTROL
  55721. CN23XX_DPI_DMA_CTL_MASK
  55722. CN23XX_DPI_DMA_ENB
  55723. CN23XX_DPI_DMA_ENG0_BUF
  55724. CN23XX_DPI_DMA_ENG0_ENB
  55725. CN23XX_DPI_DMA_ENG_BUF
  55726. CN23XX_DPI_DMA_ENG_ENB
  55727. CN23XX_DPI_DMA_O_ADD1
  55728. CN23XX_DPI_DMA_O_ES
  55729. CN23XX_DPI_DMA_O_MODE
  55730. CN23XX_DPI_DMA_PKT_EN
  55731. CN23XX_DPI_DMA_REQQ0_CTL
  55732. CN23XX_DPI_DMA_REQQ_CTL
  55733. CN23XX_DPI_REQ_ERR_RSP
  55734. CN23XX_DPI_REQ_ERR_RST
  55735. CN23XX_DPI_REQ_GBL_ENB
  55736. CN23XX_DPI_SLI_PRTX_CFG
  55737. CN23XX_DPI_SLI_PRT_CFG_START
  55738. CN23XX_INPUT_JABBER
  55739. CN23XX_INTR_CINT_ENB
  55740. CN23XX_INTR_DMA0_COUNT
  55741. CN23XX_INTR_DMA0_DATA
  55742. CN23XX_INTR_DMA0_FORCE
  55743. CN23XX_INTR_DMA0_TIME
  55744. CN23XX_INTR_DMA1_COUNT
  55745. CN23XX_INTR_DMA1_DATA
  55746. CN23XX_INTR_DMA1_FORCE
  55747. CN23XX_INTR_DMA1_TIME
  55748. CN23XX_INTR_DMAPF_ERR
  55749. CN23XX_INTR_DMAVF_ERR
  55750. CN23XX_INTR_DMA_DATA
  55751. CN23XX_INTR_ERR
  55752. CN23XX_INTR_M0UNB0_ERR
  55753. CN23XX_INTR_M0UNWI_ERR
  55754. CN23XX_INTR_M0UPB0_ERR
  55755. CN23XX_INTR_M0UPWI_ERR
  55756. CN23XX_INTR_MASK
  55757. CN23XX_INTR_MBOX_ENB
  55758. CN23XX_INTR_MBOX_INT
  55759. CN23XX_INTR_MIO_INT
  55760. CN23XX_INTR_PCIE_DATA
  55761. CN23XX_INTR_PI_INT
  55762. CN23XX_INTR_PKTPF_ERR
  55763. CN23XX_INTR_PKTVF_ERR
  55764. CN23XX_INTR_PKT_COUNT
  55765. CN23XX_INTR_PKT_DATA
  55766. CN23XX_INTR_PKT_TIME
  55767. CN23XX_INTR_PO_INT
  55768. CN23XX_INTR_PPPF_ERR
  55769. CN23XX_INTR_PPVF_ERR
  55770. CN23XX_INTR_RESEND
  55771. CN23XX_INTR_RESERVED1
  55772. CN23XX_INTR_RESERVED2
  55773. CN23XX_INTR_RESERVED3
  55774. CN23XX_INTR_RESERVED4
  55775. CN23XX_INTR_RML_TIMEOUT_ERR
  55776. CN23XX_INTR_VF_MBOX
  55777. CN23XX_IN_DONE_CNTS_CINT_ENB
  55778. CN23XX_IN_DONE_CNTS_PI_INT
  55779. CN23XX_IQ_OFFSET
  55780. CN23XX_LMC0_RESET_CTL
  55781. CN23XX_LMC0_RESET_CTL_DDR3RST_MASK
  55782. CN23XX_MAC_INT_OFFSET
  55783. CN23XX_MAC_RINFO_OFFSET
  55784. CN23XX_MAILBOX_MSGPARAM_SIZE
  55785. CN23XX_MAX_INPUT_QUEUES
  55786. CN23XX_MAX_IQ_DESCRIPTORS
  55787. CN23XX_MAX_MACS
  55788. CN23XX_MAX_OQ_DESCRIPTORS
  55789. CN23XX_MAX_OUTPUT_QUEUES
  55790. CN23XX_MAX_RINGS_PER_PF
  55791. CN23XX_MAX_RINGS_PER_PF_PASS_1_0
  55792. CN23XX_MAX_RINGS_PER_PF_PASS_1_1
  55793. CN23XX_MAX_RINGS_PER_VF
  55794. CN23XX_MAX_VFS_PER_PF
  55795. CN23XX_MAX_VFS_PER_PF_PASS_1_0
  55796. CN23XX_MAX_VFS_PER_PF_PASS_1_1
  55797. CN23XX_MIN_IQ_DESCRIPTORS
  55798. CN23XX_MIN_OQ_DESCRIPTORS
  55799. CN23XX_MIO_PTP_CKOUT_HI_INCR
  55800. CN23XX_MIO_PTP_CKOUT_LO_INCR
  55801. CN23XX_MIO_PTP_CKOUT_THRESH_HI
  55802. CN23XX_MIO_PTP_CKOUT_THRESH_LO
  55803. CN23XX_MIO_PTP_CLOCK_CFG
  55804. CN23XX_MIO_PTP_CLOCK_COMP
  55805. CN23XX_MIO_PTP_CLOCK_HI
  55806. CN23XX_MIO_PTP_CLOCK_LO
  55807. CN23XX_MIO_PTP_EVT_CNT
  55808. CN23XX_MIO_PTP_PPS_HI_INCR
  55809. CN23XX_MIO_PTP_PPS_LO_INCR
  55810. CN23XX_MIO_PTP_PPS_THRESH_HI
  55811. CN23XX_MIO_PTP_PPS_THRESH_LO
  55812. CN23XX_MIO_PTP_TIMESTAMP
  55813. CN23XX_MSIX_ENTRY_VECTOR_CTL
  55814. CN23XX_MSIX_TABLE_ADDR
  55815. CN23XX_MSIX_TABLE_ADDR_START
  55816. CN23XX_MSIX_TABLE_DATA
  55817. CN23XX_MSIX_TABLE_DATA_START
  55818. CN23XX_MSIX_TABLE_ENTRIES
  55819. CN23XX_MSIX_TABLE_SIZE
  55820. CN23XX_OQ_BUF_SIZE
  55821. CN23XX_OQ_INTR_PKT
  55822. CN23XX_OQ_INTR_TIME
  55823. CN23XX_OQ_OFFSET
  55824. CN23XX_OQ_PKTSPER_INTR
  55825. CN23XX_OQ_REFIL_THRESHOLD
  55826. CN23XX_PCIE_SRIOV_FDL
  55827. CN23XX_PCIE_SRIOV_FDL_BIT_POS
  55828. CN23XX_PCIE_SRIOV_FDL_MASK
  55829. CN23XX_PEM_BAR1_INDEX_REG
  55830. CN23XX_PEM_BAR1_INDEX_START
  55831. CN23XX_PEM_OFFSET
  55832. CN23XX_PF_INT_OFFSET
  55833. CN23XX_PF_RINFO_OFFSET
  55834. CN23XX_PKT_INPUT_CTL_DATA_ES_64B_SWAP
  55835. CN23XX_PKT_INPUT_CTL_DATA_NS
  55836. CN23XX_PKT_INPUT_CTL_DATA_RO
  55837. CN23XX_PKT_INPUT_CTL_GATHER_ES_64B_SWAP
  55838. CN23XX_PKT_INPUT_CTL_GATHER_NS
  55839. CN23XX_PKT_INPUT_CTL_GATHER_RO
  55840. CN23XX_PKT_INPUT_CTL_IS_64B
  55841. CN23XX_PKT_INPUT_CTL_MAC_NUM
  55842. CN23XX_PKT_INPUT_CTL_MAC_NUM_MASK
  55843. CN23XX_PKT_INPUT_CTL_MAC_NUM_POS
  55844. CN23XX_PKT_INPUT_CTL_MASK
  55845. CN23XX_PKT_INPUT_CTL_PF_NUM_MASK
  55846. CN23XX_PKT_INPUT_CTL_PF_NUM_POS
  55847. CN23XX_PKT_INPUT_CTL_QUIET
  55848. CN23XX_PKT_INPUT_CTL_RDSIZE
  55849. CN23XX_PKT_INPUT_CTL_RING_ENB
  55850. CN23XX_PKT_INPUT_CTL_RPVF_MASK
  55851. CN23XX_PKT_INPUT_CTL_RPVF_POS
  55852. CN23XX_PKT_INPUT_CTL_RST
  55853. CN23XX_PKT_INPUT_CTL_USE_CSR
  55854. CN23XX_PKT_INPUT_CTL_VF_NUM
  55855. CN23XX_PKT_INPUT_CTL_VF_NUM_MASK
  55856. CN23XX_PKT_INPUT_CTL_VF_NUM_POS
  55857. CN23XX_PKT_IN_DONE_CNT_MASK
  55858. CN23XX_PKT_IN_DONE_WMARK_BIT_POS
  55859. CN23XX_PKT_IN_DONE_WMARK_MASK
  55860. CN23XX_PKT_MAC_CTL_RINFO_NVFS_BIT_POS
  55861. CN23XX_PKT_MAC_CTL_RINFO_RPVF_BIT_POS
  55862. CN23XX_PKT_MAC_CTL_RINFO_SRN
  55863. CN23XX_PKT_MAC_CTL_RINFO_SRN_BIT_POS
  55864. CN23XX_PKT_MAC_CTL_RINFO_TRS
  55865. CN23XX_PKT_MAC_CTL_RINFO_TRS_BIT_POS
  55866. CN23XX_PKT_OUTPUT_CTL_BMODE
  55867. CN23XX_PKT_OUTPUT_CTL_CENB
  55868. CN23XX_PKT_OUTPUT_CTL_DPTR
  55869. CN23XX_PKT_OUTPUT_CTL_ES
  55870. CN23XX_PKT_OUTPUT_CTL_ES_P
  55871. CN23XX_PKT_OUTPUT_CTL_IPTR
  55872. CN23XX_PKT_OUTPUT_CTL_NSR
  55873. CN23XX_PKT_OUTPUT_CTL_NSR_P
  55874. CN23XX_PKT_OUTPUT_CTL_RING_ENB
  55875. CN23XX_PKT_OUTPUT_CTL_ROR
  55876. CN23XX_PKT_OUTPUT_CTL_ROR_P
  55877. CN23XX_PKT_OUTPUT_CTL_TENB
  55878. CN23XX_PORT_OFFSET
  55879. CN23XX_RST_BOOT
  55880. CN23XX_RST_SOFT_RST
  55881. CN23XX_SLI_CTL_PORT
  55882. CN23XX_SLI_CTL_PORT_START
  55883. CN23XX_SLI_CTL_STATUS
  55884. CN23XX_SLI_DEF_BP
  55885. CN23XX_SLI_GBL_CONTROL
  55886. CN23XX_SLI_INT_ENB64
  55887. CN23XX_SLI_INT_SUM64
  55888. CN23XX_SLI_IQ_BASE_ADDR64
  55889. CN23XX_SLI_IQ_BASE_ADDR_START64
  55890. CN23XX_SLI_IQ_DOORBELL
  55891. CN23XX_SLI_IQ_DOORBELL_START
  55892. CN23XX_SLI_IQ_INSTR_COUNT64
  55893. CN23XX_SLI_IQ_INSTR_COUNT_START64
  55894. CN23XX_SLI_IQ_PKT_CONTROL64
  55895. CN23XX_SLI_IQ_PKT_CONTROL_START64
  55896. CN23XX_SLI_IQ_SIZE
  55897. CN23XX_SLI_IQ_SIZE_START
  55898. CN23XX_SLI_MAC_CREDIT_CNT
  55899. CN23XX_SLI_MAC_NUMBER
  55900. CN23XX_SLI_MAC_PF_INT_ENB64
  55901. CN23XX_SLI_MAC_PF_INT_SUM64
  55902. CN23XX_SLI_MAC_PF_MBOX_INT
  55903. CN23XX_SLI_MAC_PF_MBOX_INT_START
  55904. CN23XX_SLI_MBOX_OFFSET
  55905. CN23XX_SLI_MBOX_SIG_IDX_OFFSET
  55906. CN23XX_SLI_OQ0_BUFF_INFO_SIZE
  55907. CN23XX_SLI_OQ_BASE_ADDR64
  55908. CN23XX_SLI_OQ_BASE_ADDR_START64
  55909. CN23XX_SLI_OQ_BUFF_INFO_SIZE
  55910. CN23XX_SLI_OQ_PKTS_CREDIT
  55911. CN23XX_SLI_OQ_PKTS_SENT
  55912. CN23XX_SLI_OQ_PKT_CONTROL
  55913. CN23XX_SLI_OQ_PKT_CONTROL_START
  55914. CN23XX_SLI_OQ_PKT_CREDITS_START
  55915. CN23XX_SLI_OQ_PKT_INT_LEVELS
  55916. CN23XX_SLI_OQ_PKT_INT_LEVELS_CNT
  55917. CN23XX_SLI_OQ_PKT_INT_LEVELS_START64
  55918. CN23XX_SLI_OQ_PKT_INT_LEVELS_TIME
  55919. CN23XX_SLI_OQ_PKT_SENT_START
  55920. CN23XX_SLI_OQ_SIZE
  55921. CN23XX_SLI_OQ_SIZE_START
  55922. CN23XX_SLI_OQ_WMARK
  55923. CN23XX_SLI_OUT_BP_EN2_W1C
  55924. CN23XX_SLI_OUT_BP_EN2_W1S
  55925. CN23XX_SLI_OUT_BP_EN_W1C
  55926. CN23XX_SLI_OUT_BP_EN_W1S
  55927. CN23XX_SLI_PKT_CNT_INT
  55928. CN23XX_SLI_PKT_IN_JABBER
  55929. CN23XX_SLI_PKT_IOQ_RING_RST
  55930. CN23XX_SLI_PKT_MAC_RINFO64
  55931. CN23XX_SLI_PKT_MAC_RINFO_START64
  55932. CN23XX_SLI_PKT_MBOX_INT
  55933. CN23XX_SLI_PKT_MBOX_INT_START
  55934. CN23XX_SLI_PKT_PF_VF_MBOX_SIG
  55935. CN23XX_SLI_PKT_PF_VF_MBOX_SIG_START
  55936. CN23XX_SLI_PKT_TIME_INT
  55937. CN23XX_SLI_S2M_PORTX_CTL
  55938. CN23XX_SLI_S2M_PORT_CTL_START
  55939. CN23XX_SLI_SCRATCH1
  55940. CN23XX_SLI_SCRATCH2
  55941. CN23XX_SLI_WINDOW_CTL
  55942. CN23XX_SLI_WINDOW_CTL_DEFAULT
  55943. CN23XX_VF_IQ_OFFSET
  55944. CN23XX_VF_OQ_OFFSET
  55945. CN23XX_VF_SLI_INT_SUM
  55946. CN23XX_VF_SLI_INT_SUM_START
  55947. CN23XX_VF_SLI_IQ_BASE_ADDR64
  55948. CN23XX_VF_SLI_IQ_BASE_ADDR_START64
  55949. CN23XX_VF_SLI_IQ_DOORBELL
  55950. CN23XX_VF_SLI_IQ_DOORBELL_START
  55951. CN23XX_VF_SLI_IQ_INSTR_COUNT64
  55952. CN23XX_VF_SLI_IQ_INSTR_COUNT_START64
  55953. CN23XX_VF_SLI_IQ_PKT_CONTROL64
  55954. CN23XX_VF_SLI_IQ_PKT_CONTROL_START64
  55955. CN23XX_VF_SLI_IQ_SIZE
  55956. CN23XX_VF_SLI_IQ_SIZE_START
  55957. CN23XX_VF_SLI_OQ0_BUFF_INFO_SIZE
  55958. CN23XX_VF_SLI_OQ_BASE_ADDR64
  55959. CN23XX_VF_SLI_OQ_BASE_ADDR_START64
  55960. CN23XX_VF_SLI_OQ_BUFF_INFO_SIZE
  55961. CN23XX_VF_SLI_OQ_PKTS_CREDIT
  55962. CN23XX_VF_SLI_OQ_PKTS_SENT
  55963. CN23XX_VF_SLI_OQ_PKT_CONTROL
  55964. CN23XX_VF_SLI_OQ_PKT_CONTROL_START
  55965. CN23XX_VF_SLI_OQ_PKT_CREDITS_START
  55966. CN23XX_VF_SLI_OQ_PKT_INT_LEVELS
  55967. CN23XX_VF_SLI_OQ_PKT_INT_LEVELS_CNT
  55968. CN23XX_VF_SLI_OQ_PKT_INT_LEVELS_START64
  55969. CN23XX_VF_SLI_OQ_PKT_INT_LEVELS_TIME
  55970. CN23XX_VF_SLI_OQ_PKT_SENT_START
  55971. CN23XX_VF_SLI_OQ_SIZE
  55972. CN23XX_VF_SLI_OQ_SIZE_START
  55973. CN23XX_VF_SLI_PKT_MBOX_INT
  55974. CN23XX_VF_SLI_PKT_MBOX_INT_START
  55975. CN23XX_WIN_RD_ADDR64
  55976. CN23XX_WIN_RD_ADDR_HI
  55977. CN23XX_WIN_RD_ADDR_LO
  55978. CN23XX_WIN_RD_DATA64
  55979. CN23XX_WIN_RD_DATA_HI
  55980. CN23XX_WIN_RD_DATA_LO
  55981. CN23XX_WIN_WR_ADDR64
  55982. CN23XX_WIN_WR_ADDR_HI
  55983. CN23XX_WIN_WR_ADDR_LO
  55984. CN23XX_WIN_WR_DATA64
  55985. CN23XX_WIN_WR_DATA_HI
  55986. CN23XX_WIN_WR_DATA_LO
  55987. CN23XX_WIN_WR_MASK_HI
  55988. CN23XX_WIN_WR_MASK_LO
  55989. CN23XX_WIN_WR_MASK_REG
  55990. CN400_FUNCTION2
  55991. CN400_FUNCTION3
  55992. CN66XX_SLI_INPUT_BP_START64
  55993. CN66XX_SLI_IQ_BP64
  55994. CN68XX_INTR_PIPE_ERR
  55995. CN68XX_SLI_IQ_PORT0_PKIND
  55996. CN68XX_SLI_IQ_PORT_PKIND
  55997. CN68XX_SLI_TX_PIPE
  55998. CN6XXX_BAR1_INDEX_START
  55999. CN6XXX_BAR1_REG
  56000. CN6XXX_CFG_IO_QUEUES
  56001. CN6XXX_CIU_SOFT_BIST
  56002. CN6XXX_CIU_SOFT_RST
  56003. CN6XXX_DB_MAX
  56004. CN6XXX_DB_MIN
  56005. CN6XXX_DB_TIMEOUT
  56006. CN6XXX_DMA_CNT
  56007. CN6XXX_DMA_CNT_START
  56008. CN6XXX_DMA_INT_LEVEL
  56009. CN6XXX_DMA_INT_LEVEL_START
  56010. CN6XXX_DMA_OFFSET
  56011. CN6XXX_DMA_PKT_INT_LEVEL
  56012. CN6XXX_DMA_TIM
  56013. CN6XXX_DMA_TIME_INT_LEVEL
  56014. CN6XXX_DMA_TIM_START
  56015. CN6XXX_DPI_CTL
  56016. CN6XXX_DPI_DMA_COMMIT_MODE
  56017. CN6XXX_DPI_DMA_CONTROL
  56018. CN6XXX_DPI_DMA_CTL_MASK
  56019. CN6XXX_DPI_DMA_ENG0_BUF
  56020. CN6XXX_DPI_DMA_ENG0_ENB
  56021. CN6XXX_DPI_DMA_ENG_BUF
  56022. CN6XXX_DPI_DMA_ENG_ENB
  56023. CN6XXX_DPI_DMA_O_ES
  56024. CN6XXX_DPI_DMA_O_MODE
  56025. CN6XXX_DPI_DMA_PKT_EN
  56026. CN6XXX_DPI_DMA_PKT_HP
  56027. CN6XXX_DPI_REQ_ERR_RSP
  56028. CN6XXX_DPI_REQ_ERR_RST
  56029. CN6XXX_DPI_REQ_GBL_ENB
  56030. CN6XXX_DPI_SLI_PRT0_CFG
  56031. CN6XXX_DPI_SLI_PRT1_CFG
  56032. CN6XXX_DPI_SLI_PRTX_CFG
  56033. CN6XXX_INPUT_CTL_DATA_ES_64B_SWAP
  56034. CN6XXX_INPUT_CTL_DATA_NS
  56035. CN6XXX_INPUT_CTL_DATA_RO
  56036. CN6XXX_INPUT_CTL_GATHER_ES_64B_SWAP
  56037. CN6XXX_INPUT_CTL_GATHER_NS
  56038. CN6XXX_INPUT_CTL_GATHER_RO
  56039. CN6XXX_INPUT_CTL_MASK
  56040. CN6XXX_INPUT_CTL_ROUND_ROBIN_ARB
  56041. CN6XXX_INPUT_CTL_USE_CSR
  56042. CN6XXX_INTR_BAR0_RW_TIMEOUT_ERR
  56043. CN6XXX_INTR_DMA0_COUNT
  56044. CN6XXX_INTR_DMA0_DATA
  56045. CN6XXX_INTR_DMA0_FORCE
  56046. CN6XXX_INTR_DMA0_TIME
  56047. CN6XXX_INTR_DMA1_COUNT
  56048. CN6XXX_INTR_DMA1_DATA
  56049. CN6XXX_INTR_DMA1_FORCE
  56050. CN6XXX_INTR_DMA1_TIME
  56051. CN6XXX_INTR_DMA_DATA
  56052. CN6XXX_INTR_ERR
  56053. CN6XXX_INTR_ILL_PAD_ERR
  56054. CN6XXX_INTR_INSTR_DB_OF_ERR
  56055. CN6XXX_INTR_IO2BIG_ERR
  56056. CN6XXX_INTR_M0UNB0_ERR
  56057. CN6XXX_INTR_M0UNWI_ERR
  56058. CN6XXX_INTR_M0UPB0_ERR
  56059. CN6XXX_INTR_M0UPWI_ERR
  56060. CN6XXX_INTR_M1UNB0_ERR
  56061. CN6XXX_INTR_M1UNWI_ERR
  56062. CN6XXX_INTR_M1UPB0_ERR
  56063. CN6XXX_INTR_M1UPWI_ERR
  56064. CN6XXX_INTR_MAC
  56065. CN6XXX_INTR_MAC_INT0
  56066. CN6XXX_INTR_MAC_INT1
  56067. CN6XXX_INTR_MASK
  56068. CN6XXX_INTR_MIO
  56069. CN6XXX_INTR_MIO_INT0
  56070. CN6XXX_INTR_MIO_INT1
  56071. CN6XXX_INTR_PCIE_DATA
  56072. CN6XXX_INTR_PDI_ERR
  56073. CN6XXX_INTR_PGL_ERR
  56074. CN6XXX_INTR_PINS_ERR
  56075. CN6XXX_INTR_PIN_BP_ERR
  56076. CN6XXX_INTR_PKT_COUNT
  56077. CN6XXX_INTR_PKT_DATA
  56078. CN6XXX_INTR_PKT_TIME
  56079. CN6XXX_INTR_POP_ERR
  56080. CN6XXX_INTR_POUT_ERR
  56081. CN6XXX_INTR_RML_TIMEOUT_ERR
  56082. CN6XXX_INTR_SLIST_DB_OF_ERR
  56083. CN6XXX_INTR_SPRT0_ERR
  56084. CN6XXX_INTR_SPRT1_ERR
  56085. CN6XXX_IQ_OFFSET
  56086. CN6XXX_LMC0_RESET_CTL
  56087. CN6XXX_LMC0_RESET_CTL_DDR3RST_MASK
  56088. CN6XXX_MAX_INPUT_QUEUES
  56089. CN6XXX_MAX_IQ_DESCRIPTORS
  56090. CN6XXX_MAX_OQ_DESCRIPTORS
  56091. CN6XXX_MAX_OUTPUT_QUEUES
  56092. CN6XXX_MIO_PTP_CKOUT_HI_INCR
  56093. CN6XXX_MIO_PTP_CKOUT_LO_INCR
  56094. CN6XXX_MIO_PTP_CKOUT_THRESH_HI
  56095. CN6XXX_MIO_PTP_CKOUT_THRESH_LO
  56096. CN6XXX_MIO_PTP_CLOCK_CFG
  56097. CN6XXX_MIO_PTP_CLOCK_COMP
  56098. CN6XXX_MIO_PTP_CLOCK_HI
  56099. CN6XXX_MIO_PTP_CLOCK_LO
  56100. CN6XXX_MIO_PTP_EVT_CNT
  56101. CN6XXX_MIO_PTP_PPS_HI_INCR
  56102. CN6XXX_MIO_PTP_PPS_LO_INCR
  56103. CN6XXX_MIO_PTP_PPS_THRESH_HI
  56104. CN6XXX_MIO_PTP_PPS_THRESH_LO
  56105. CN6XXX_MIO_PTP_TIMESTAMP
  56106. CN6XXX_MIO_QLM4_CFG
  56107. CN6XXX_MIO_QLM_CFG_MASK
  56108. CN6XXX_MIO_RST_BOOT
  56109. CN6XXX_MSI_ADDR_HI
  56110. CN6XXX_MSI_ADDR_LO
  56111. CN6XXX_MSI_CAP
  56112. CN6XXX_MSI_DATA
  56113. CN6XXX_OQ_BUF_SIZE
  56114. CN6XXX_OQ_INTR_PKT
  56115. CN6XXX_OQ_INTR_TIME
  56116. CN6XXX_OQ_OFFSET
  56117. CN6XXX_OQ_PKTSPER_INTR
  56118. CN6XXX_OQ_REFIL_THRESHOLD
  56119. CN6XXX_PCIE_ACK_FREQ
  56120. CN6XXX_PCIE_ACK_REPLAY_TIMER
  56121. CN6XXX_PCIE_ADV_ERR_CAP
  56122. CN6XXX_PCIE_CAP
  56123. CN6XXX_PCIE_CORR_ERR_MASK
  56124. CN6XXX_PCIE_CORR_ERR_STATUS
  56125. CN6XXX_PCIE_DEVCAP
  56126. CN6XXX_PCIE_DEVCTL
  56127. CN6XXX_PCIE_ENH_CAP
  56128. CN6XXX_PCIE_FLTMSK
  56129. CN6XXX_PCIE_LANE_SKEW
  56130. CN6XXX_PCIE_LINKCAP
  56131. CN6XXX_PCIE_LINKCTL
  56132. CN6XXX_PCIE_OTHER_MSG
  56133. CN6XXX_PCIE_PORT_FORCE_LINK
  56134. CN6XXX_PCIE_PORT_LINK_CTL
  56135. CN6XXX_PCIE_SLOTCAP
  56136. CN6XXX_PCIE_SLOTCTL
  56137. CN6XXX_PCIE_SYM_NUM
  56138. CN6XXX_PCIE_UNCORR_ERR
  56139. CN6XXX_PCIE_UNCORR_ERR_MASK
  56140. CN6XXX_PCIE_UNCORR_ERR_STATUS
  56141. CN6XXX_PCI_BAR1_OFFSET
  56142. CN6XXX_PEM_BAR1_INDEX000
  56143. CN6XXX_PEM_OFFSET
  56144. CN6XXX_SLI_CTL_PORT0
  56145. CN6XXX_SLI_CTL_PORT1
  56146. CN6XXX_SLI_CTL_STATUS
  56147. CN6XXX_SLI_DBG_DATA
  56148. CN6XXX_SLI_INT_ENB64
  56149. CN6XXX_SLI_INT_ENB64_PORT0
  56150. CN6XXX_SLI_INT_ENB64_PORT1
  56151. CN6XXX_SLI_INT_SUM64
  56152. CN6XXX_SLI_IN_PCIE_PORT
  56153. CN6XXX_SLI_IQ_BASE_ADDR64
  56154. CN6XXX_SLI_IQ_BASE_ADDR_START64
  56155. CN6XXX_SLI_IQ_DOORBELL
  56156. CN6XXX_SLI_IQ_DOORBELL_START
  56157. CN6XXX_SLI_IQ_INSTR_COUNT
  56158. CN6XXX_SLI_IQ_INSTR_COUNT_START
  56159. CN6XXX_SLI_IQ_PKT_INSTR_HDR64
  56160. CN6XXX_SLI_IQ_PKT_INSTR_HDR_START64
  56161. CN6XXX_SLI_IQ_SIZE
  56162. CN6XXX_SLI_IQ_SIZE_START
  56163. CN6XXX_SLI_MAC_NUMBER
  56164. CN6XXX_SLI_OQ0_BUFF_INFO_SIZE
  56165. CN6XXX_SLI_OQ_BASE_ADDR64
  56166. CN6XXX_SLI_OQ_BASE_ADDR_START64
  56167. CN6XXX_SLI_OQ_BUFF_INFO_SIZE
  56168. CN6XXX_SLI_OQ_INT_LEVEL_PKTS
  56169. CN6XXX_SLI_OQ_INT_LEVEL_TIME
  56170. CN6XXX_SLI_OQ_PKTS_CREDIT
  56171. CN6XXX_SLI_OQ_PKTS_SENT
  56172. CN6XXX_SLI_OQ_PKT_CREDITS_START
  56173. CN6XXX_SLI_OQ_PKT_SENT_START
  56174. CN6XXX_SLI_OQ_SIZE
  56175. CN6XXX_SLI_OQ_SIZE_START
  56176. CN6XXX_SLI_OQ_WMARK
  56177. CN6XXX_SLI_PKT_CNT_INT
  56178. CN6XXX_SLI_PKT_CNT_INT_ENB
  56179. CN6XXX_SLI_PKT_CTL
  56180. CN6XXX_SLI_PKT_DATA_OUT_ES64
  56181. CN6XXX_SLI_PKT_DATA_OUT_NS
  56182. CN6XXX_SLI_PKT_DATA_OUT_ROR
  56183. CN6XXX_SLI_PKT_DPADDR
  56184. CN6XXX_SLI_PKT_INPUT_CONTROL
  56185. CN6XXX_SLI_PKT_INSTR_ENB
  56186. CN6XXX_SLI_PKT_INSTR_RD_SIZE
  56187. CN6XXX_SLI_PKT_INSTR_SIZE
  56188. CN6XXX_SLI_PKT_IPTR
  56189. CN6XXX_SLI_PKT_OUT_BMODE
  56190. CN6XXX_SLI_PKT_OUT_ENB
  56191. CN6XXX_SLI_PKT_PCIE_PORT64
  56192. CN6XXX_SLI_PKT_SLIST_ES64
  56193. CN6XXX_SLI_PKT_SLIST_NS
  56194. CN6XXX_SLI_PKT_SLIST_ROR
  56195. CN6XXX_SLI_PKT_TIME_INT
  56196. CN6XXX_SLI_PKT_TIME_INT_ENB
  56197. CN6XXX_SLI_PORT_IN_RST_IQ
  56198. CN6XXX_SLI_PORT_IN_RST_OQ
  56199. CN6XXX_SLI_S2M_PORT0_CTL
  56200. CN6XXX_SLI_S2M_PORT1_CTL
  56201. CN6XXX_SLI_S2M_PORTX_CTL
  56202. CN6XXX_SLI_SCRATCH1
  56203. CN6XXX_SLI_SCRATCH2
  56204. CN6XXX_SLI_WINDOW_CTL
  56205. CN6XXX_WIN_RD_ADDR64
  56206. CN6XXX_WIN_RD_ADDR_HI
  56207. CN6XXX_WIN_RD_ADDR_LO
  56208. CN6XXX_WIN_RD_DATA64
  56209. CN6XXX_WIN_RD_DATA_HI
  56210. CN6XXX_WIN_RD_DATA_LO
  56211. CN6XXX_WIN_WR_ADDR64
  56212. CN6XXX_WIN_WR_ADDR_HI
  56213. CN6XXX_WIN_WR_ADDR_LO
  56214. CN6XXX_WIN_WR_DATA64
  56215. CN6XXX_WIN_WR_DATA_HI
  56216. CN6XXX_WIN_WR_DATA_LO
  56217. CN6XXX_WIN_WR_MASK_HI
  56218. CN6XXX_WIN_WR_MASK_LO
  56219. CN6XXX_WIN_WR_MASK_REG
  56220. CN6XXX_XPANSION_BAR
  56221. CN700_FUNCTION2
  56222. CN700_FUNCTION3
  56223. CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM
  56224. CN700_IGA1_FIFO_HIGH_THRESHOLD
  56225. CN700_IGA1_FIFO_MAX_DEPTH
  56226. CN700_IGA1_FIFO_THRESHOLD
  56227. CN700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM
  56228. CN700_IGA2_FIFO_HIGH_THRESHOLD
  56229. CN700_IGA2_FIFO_MAX_DEPTH
  56230. CN700_IGA2_FIFO_THRESHOLD
  56231. CN750_FUNCTION3
  56232. CNA_ETS
  56233. CNA_FW_FILE_CT
  56234. CNA_FW_FILE_CT2
  56235. CNB_PWRMGT_CNTL
  56236. CNB_PWRMGT_CNTL__DPM_ENABLED_MASK
  56237. CNB_PWRMGT_CNTL__DPM_ENABLED__SHIFT
  56238. CNB_PWRMGT_CNTL__FORCE_NB_PS1_MASK
  56239. CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT
  56240. CNB_PWRMGT_CNTL__GNB_SLOW_MASK
  56241. CNB_PWRMGT_CNTL__GNB_SLOW_MODE_MASK
  56242. CNB_PWRMGT_CNTL__GNB_SLOW_MODE__SHIFT
  56243. CNB_PWRMGT_CNTL__GNB_SLOW__SHIFT
  56244. CNB_PWRMGT_CNTL__SPARE_MASK
  56245. CNB_PWRMGT_CNTL__SPARE__SHIFT
  56246. CNB_THERMTHRO_MASK_SCLK
  56247. CNCON_REG
  56248. CNDCR
  56249. CNDP
  56250. CNDS_I2C_PM_TIMEOUT
  56251. CNEN
  56252. CNEN_REG
  56253. CNF1
  56254. CNF1_SJW_SHIFT
  56255. CNF2
  56256. CNF2_BTLMODE
  56257. CNF2_PS1_SHIFT
  56258. CNF2_SAM
  56259. CNF3
  56260. CNF3_PHSEG2_MASK
  56261. CNF3_SOF
  56262. CNF3_WAKFIL
  56263. CNFE_CODE
  56264. CNFGA_ID_16
  56265. CNFGA_ID_32
  56266. CNFGA_ID_8
  56267. CNFGA_ID_MASK
  56268. CNFGA_ID_SHIFT
  56269. CNFGA_IRQ
  56270. CNFGA_PWORDLEFT
  56271. CNFGA_nBYTEINTRANS
  56272. CNFGB_COMPRESS
  56273. CNFGB_DMA_MASK
  56274. CNFGB_DMA_SHIFT
  56275. CNFGB_INTRVAL
  56276. CNFGB_IRQ_MASK
  56277. CNFGB_IRQ_SHIFT
  56278. CNFG_AHB
  56279. CNFG_APER_0_BASE
  56280. CNFG_APER_1_BASE
  56281. CNFG_APER_SIZE
  56282. CNFG_AUTO_FMT_EN
  56283. CNFG_BYTE_RW
  56284. CNFG_CHIP_ID
  56285. CNFG_CNTL
  56286. CNFG_DMA_BURST_EN
  56287. CNFG_HW_ECC_EN
  56288. CNFG_MEMSIZE
  56289. CNFG_MEMSIZE_MASK
  56290. CNFG_OP_CUST
  56291. CNFG_PANEL
  56292. CNFG_PANEL_LG
  56293. CNFG_READ_EN
  56294. CNFG_REG_1_BASE
  56295. CNFG_REG_APER_SIZE
  56296. CNFG_STAT0
  56297. CNFG_STAT1
  56298. CNFG_STAT2
  56299. CNFG_WAKE
  56300. CNFG_WAKE_KEY_REPORTING
  56301. CNF_3INT3ISO
  56302. CNF_3ISO3ISO
  56303. CNF_4INT3ISO
  56304. CNF_4ISO3ISO
  56305. CNF_ACPT
  56306. CNF_CARD_DETECT_MODE
  56307. CNF_CMD
  56308. CNF_CODE
  56309. CNF_CTL_BASE
  56310. CNF_EVENT_REPORTING
  56311. CNF_EXT_GCLK_CTL_1
  56312. CNF_EXT_GCLK_CTL_2
  56313. CNF_EXT_GCLK_CTL_3
  56314. CNF_GCLK_CTL
  56315. CNF_IGNR
  56316. CNF_INT_PIN
  56317. CNF_PIN_STATUS
  56318. CNF_PWR_CTL_1
  56319. CNF_PWR_CTL_2
  56320. CNF_PWR_CTL_3
  56321. CNF_REG
  56322. CNF_RJCT
  56323. CNF_SD_CLK_MODE
  56324. CNF_SD_LED_EN_1
  56325. CNF_SD_LED_EN_2
  56326. CNF_SD_SLOT
  56327. CNF_STOP_CLK_CTL
  56328. CNI
  56329. CNIC_ARM_CQE
  56330. CNIC_ARM_CQE_FP
  56331. CNIC_CID_MAX
  56332. CNIC_CTL_COMPLETION_CMD
  56333. CNIC_CTL_FCOE_STATS_GET_CMD
  56334. CNIC_CTL_ISCSI_STATS_GET_CMD
  56335. CNIC_CTL_START_CMD
  56336. CNIC_CTL_STOP_CMD
  56337. CNIC_CTL_STOP_ISCSI_CMD
  56338. CNIC_DEFS_H
  56339. CNIC_DISARM_CQE
  56340. CNIC_DRV_STATE_HANDLES_IRQ
  56341. CNIC_DRV_STATE_NO_FCOE
  56342. CNIC_DRV_STATE_NO_ISCSI
  56343. CNIC_DRV_STATE_NO_ISCSI_OOO
  56344. CNIC_DRV_STATE_REGD
  56345. CNIC_DRV_STATE_USING_MSIX
  56346. CNIC_ENABLED
  56347. CNIC_EVENT_COAL_INDEX
  56348. CNIC_EVENT_CQ_ARM
  56349. CNIC_FCOE_CID_MAX
  56350. CNIC_FUNC
  56351. CNIC_F_BNX2X_CLASS
  56352. CNIC_F_BNX2_CLASS
  56353. CNIC_F_CNIC_UP
  56354. CNIC_H
  56355. CNIC_IF_H
  56356. CNIC_ILT_LINES
  56357. CNIC_IRQ_FL_MSIX
  56358. CNIC_ISCSI_CID_MAX
  56359. CNIC_KWQ16_DATA_SIZE
  56360. CNIC_LCL_FL_KWQ_INIT
  56361. CNIC_LCL_FL_L2_WAIT
  56362. CNIC_LCL_FL_RINGS_INITED
  56363. CNIC_LCL_FL_STOP_ISCSI
  56364. CNIC_LOADED
  56365. CNIC_LOCAL_PORT_MAX
  56366. CNIC_LOCAL_PORT_MIN
  56367. CNIC_LOCAL_PORT_RANGE
  56368. CNIC_MODULE_NAME
  56369. CNIC_MODULE_RELDATE
  56370. CNIC_MODULE_VERSION
  56371. CNIC_PAGE_ALIGN
  56372. CNIC_PAGE_BITS
  56373. CNIC_PAGE_MASK
  56374. CNIC_PAGE_SIZE
  56375. CNIC_RAMROD_TMO
  56376. CNIC_RD
  56377. CNIC_RD16
  56378. CNIC_RECV_DOORBELL
  56379. CNIC_SEND_DOORBELL
  56380. CNIC_SUPPORT
  56381. CNIC_SUPPORTS_FCOE
  56382. CNIC_ULP_FCOE
  56383. CNIC_ULP_ISCSI
  56384. CNIC_ULP_L4
  56385. CNIC_ULP_RDMA
  56386. CNIC_WR
  56387. CNIC_WR16
  56388. CNIC_WR8
  56389. CNIG_REG_DBG_DWORD_ENABLE_K2_E5
  56390. CNIG_REG_DBG_FORCE_FRAME_K2_E5
  56391. CNIG_REG_DBG_FORCE_VALID_K2_E5
  56392. CNIG_REG_DBG_SELECT_K2_E5
  56393. CNIG_REG_DBG_SHIFT_K2_E5
  56394. CNIG_REG_NIG_PORT0_CONF_K2
  56395. CNIG_REG_NW_PORT_MODE_BB
  56396. CNLEN
  56397. CNLH_COMMUNITY
  56398. CNLLP_COMMUNITY
  56399. CNL_ADSPCS_CPA
  56400. CNL_ADSPCS_CPA_SHIFT
  56401. CNL_ADSPCS_CRST
  56402. CNL_ADSPCS_CRST_SHIFT
  56403. CNL_ADSPCS_CSTALL
  56404. CNL_ADSPCS_CSTALL_SHIFT
  56405. CNL_ADSPCS_SPA
  56406. CNL_ADSPCS_SPA_SHIFT
  56407. CNL_ADSPIC_IPC
  56408. CNL_ADSPIS_IPC
  56409. CNL_ADSP_ERROR_CODE
  56410. CNL_ADSP_FW_HDR_OFFSET
  56411. CNL_ADSP_FW_STATUS
  56412. CNL_ADSP_GEN_BASE
  56413. CNL_ADSP_IPC_BASE
  56414. CNL_ADSP_MMIO_LEN
  56415. CNL_ADSP_REG_ADSPCS
  56416. CNL_ADSP_REG_ADSPIC
  56417. CNL_ADSP_REG_ADSPIS
  56418. CNL_ADSP_REG_HIPCCTL
  56419. CNL_ADSP_REG_HIPCCTL_BUSY
  56420. CNL_ADSP_REG_HIPCCTL_DONE
  56421. CNL_ADSP_REG_HIPCIDA
  56422. CNL_ADSP_REG_HIPCIDA_DONE
  56423. CNL_ADSP_REG_HIPCIDD
  56424. CNL_ADSP_REG_HIPCIDR
  56425. CNL_ADSP_REG_HIPCIDR_BUSY
  56426. CNL_ADSP_REG_HIPCTDA
  56427. CNL_ADSP_REG_HIPCTDA_DONE
  56428. CNL_ADSP_REG_HIPCTDD
  56429. CNL_ADSP_REG_HIPCTDR
  56430. CNL_ADSP_REG_HIPCTDR_BUSY
  56431. CNL_ADSP_REG_HIPCT_BUSY
  56432. CNL_ADSP_SRAM0_BASE
  56433. CNL_ADSP_SRAM1_BASE
  56434. CNL_ADSP_W0_STAT_SZ
  56435. CNL_ADSP_W0_UP_SZ
  56436. CNL_ADSP_W1_SZ
  56437. CNL_AUX_ANAOVRD1
  56438. CNL_AUX_ANAOVRD1_ENABLE
  56439. CNL_AUX_ANAOVRD1_LDO_BYPASS
  56440. CNL_AUX_CHANNEL_F
  56441. CNL_Ax_DEVICE_ID
  56442. CNL_BASEFW_TIMEOUT
  56443. CNL_BASE_FW_MODULE_ID
  56444. CNL_CDCLK_PLL_RATIO
  56445. CNL_CDCLK_PLL_RATIO_MASK
  56446. CNL_COMMUNITY
  56447. CNL_COMP_PWR_DOWN
  56448. CNL_CSR_MAX_FW_SIZE
  56449. CNL_CSR_PATH
  56450. CNL_CSR_VERSION_REQUIRED
  56451. CNL_DDI_CLOCK_REG_ACCESS_ON
  56452. CNL_DISPLAY_AUX_A_POWER_DOMAINS
  56453. CNL_DISPLAY_AUX_B_POWER_DOMAINS
  56454. CNL_DISPLAY_AUX_C_POWER_DOMAINS
  56455. CNL_DISPLAY_AUX_D_POWER_DOMAINS
  56456. CNL_DISPLAY_AUX_F_POWER_DOMAINS
  56457. CNL_DISPLAY_DC_OFF_POWER_DOMAINS
  56458. CNL_DISPLAY_DDI_A_IO_POWER_DOMAINS
  56459. CNL_DISPLAY_DDI_B_IO_POWER_DOMAINS
  56460. CNL_DISPLAY_DDI_C_IO_POWER_DOMAINS
  56461. CNL_DISPLAY_DDI_D_IO_POWER_DOMAINS
  56462. CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS
  56463. CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS
  56464. CNL_DPLL_CFGCR0
  56465. CNL_DPLL_CFGCR1
  56466. CNL_DPLL_ENABLE
  56467. CNL_DRAM_RANK_1
  56468. CNL_DRAM_RANK_2
  56469. CNL_DRAM_RANK_3
  56470. CNL_DRAM_RANK_4
  56471. CNL_DRAM_RANK_MASK
  56472. CNL_DRAM_RANK_SHIFT
  56473. CNL_DRAM_SIZE_MASK
  56474. CNL_DRAM_WIDTH_MASK
  56475. CNL_DRAM_WIDTH_SHIFT
  56476. CNL_DRAM_WIDTH_X16
  56477. CNL_DRAM_WIDTH_X32
  56478. CNL_DRAM_WIDTH_X8
  56479. CNL_DSP_CORES
  56480. CNL_DSP_CORES_MASK
  56481. CNL_DSP_IPC_BASE
  56482. CNL_DSP_PD_TO
  56483. CNL_DSP_PU_TO
  56484. CNL_DSP_REG_HIPCCTL
  56485. CNL_DSP_REG_HIPCCTL_BUSY
  56486. CNL_DSP_REG_HIPCCTL_DONE
  56487. CNL_DSP_REG_HIPCIDA
  56488. CNL_DSP_REG_HIPCIDA_DONE
  56489. CNL_DSP_REG_HIPCIDA_MSG_MASK
  56490. CNL_DSP_REG_HIPCIDR
  56491. CNL_DSP_REG_HIPCIDR_BUSY
  56492. CNL_DSP_REG_HIPCIDR_MSG_MASK
  56493. CNL_DSP_REG_HIPCTDA
  56494. CNL_DSP_REG_HIPCTDA_DONE
  56495. CNL_DSP_REG_HIPCTDA_MSG_MASK
  56496. CNL_DSP_REG_HIPCTDD
  56497. CNL_DSP_REG_HIPCTDD_MSG_MASK
  56498. CNL_DSP_REG_HIPCTDR
  56499. CNL_DSP_REG_HIPCTDR_BUSY
  56500. CNL_DSP_REG_HIPCTDR_MSG_MASK
  56501. CNL_DSP_RESET_TO
  56502. CNL_DSSM_CDCLK_PLL_REFCLK_24MHz
  56503. CNL_FAST_ANISO_L1_BANKING_FIX
  56504. CNL_FW_INIT
  56505. CNL_FW_ROM_INIT
  56506. CNL_FW_STS_MASK
  56507. CNL_GPI_IE
  56508. CNL_GPI_IS
  56509. CNL_GPP
  56510. CNL_HDC_CHICKEN0
  56511. CNL_HWS_CSB_WRITE_INDEX
  56512. CNL_H_DEVICE_ID
  56513. CNL_H_HOSTSW_OWN
  56514. CNL_INIT_TIMEOUT
  56515. CNL_INSTANCE_ID
  56516. CNL_IPC_GLB_NOTIFY_RSP_MASK
  56517. CNL_IPC_GLB_NOTIFY_RSP_SHIFT
  56518. CNL_IPC_GLB_NOTIFY_RSP_TYPE
  56519. CNL_IPC_PURGE
  56520. CNL_LP_HOSTSW_OWN
  56521. CNL_NO_GPIO
  56522. CNL_PADCFGLOCK
  56523. CNL_PAD_OWN
  56524. CNL_PORT_CL1CM_DW5
  56525. CNL_PORT_COMP_DW0
  56526. CNL_PORT_COMP_DW1
  56527. CNL_PORT_COMP_DW10
  56528. CNL_PORT_COMP_DW3
  56529. CNL_PORT_COMP_DW9
  56530. CNL_PORT_PCS_DW1_GRP
  56531. CNL_PORT_PCS_DW1_LN0
  56532. CNL_PORT_TX_DW2_GRP
  56533. CNL_PORT_TX_DW2_LN0
  56534. CNL_PORT_TX_DW4_GRP
  56535. CNL_PORT_TX_DW4_LN
  56536. CNL_PORT_TX_DW4_LN0
  56537. CNL_PORT_TX_DW5_GRP
  56538. CNL_PORT_TX_DW5_LN0
  56539. CNL_PORT_TX_DW7_GRP
  56540. CNL_PORT_TX_DW7_LN0
  56541. CNL_PW_CTL_IDX_AUX_D
  56542. CNL_PW_CTL_IDX_AUX_F
  56543. CNL_PW_CTL_IDX_DDI_F
  56544. CNL_REVID_A0
  56545. CNL_REVID_B0
  56546. CNL_REVID_C0
  56547. CNL_ROM_CTRL_DMA_ID
  56548. CNL_SSP_BASE_OFFSET
  56549. CNL_SSP_COUNT
  56550. CNL_WOPCM_HW_CTX_RESERVED
  56551. CNN55XX_DEV_ID
  56552. CNN55XX_MAX_UCD_BLOCKS
  56553. CNN55XX_MAX_UCODE_SIZE
  56554. CNN55XX_UCD_BLOCK_SIZE
  56555. CNNE_REG
  56556. CNNIC_CSUM_VERIFIED
  56557. CNNIC_IPSUM_VERIFIED
  56558. CNNIC_L4SUM_VERIFIED
  56559. CNNIC_TUN_CSUM_VERIFIED
  56560. CNODEID_NONE
  56561. CNPD_REG
  56562. CNPU_REG
  56563. CNP_NUM_IP_IGN_ALLOWED
  56564. CNP_PMC_HOST_PPFEAR0A
  56565. CNP_PMC_LATCH_SLPS0_EVENTS
  56566. CNP_PMC_LTR_AZ
  56567. CNP_PMC_LTR_CAM
  56568. CNP_PMC_LTR_CNV
  56569. CNP_PMC_LTR_CUR_ASLT
  56570. CNP_PMC_LTR_CUR_PLT
  56571. CNP_PMC_LTR_EMMC
  56572. CNP_PMC_LTR_ESPI
  56573. CNP_PMC_LTR_EVA
  56574. CNP_PMC_LTR_GBE
  56575. CNP_PMC_LTR_IGNORE_OFFSET
  56576. CNP_PMC_LTR_ISH
  56577. CNP_PMC_LTR_LPSS
  56578. CNP_PMC_LTR_ME
  56579. CNP_PMC_LTR_RESERVED
  56580. CNP_PMC_LTR_SATA
  56581. CNP_PMC_LTR_SCC
  56582. CNP_PMC_LTR_SPA
  56583. CNP_PMC_LTR_SPB
  56584. CNP_PMC_LTR_SPC
  56585. CNP_PMC_LTR_SPD
  56586. CNP_PMC_LTR_SPE
  56587. CNP_PMC_LTR_UFSX2
  56588. CNP_PMC_LTR_XHCI
  56589. CNP_PMC_MMIO_REG_LEN
  56590. CNP_PMC_PM_CFG_OFFSET
  56591. CNP_PMC_READ_DISABLE_BIT
  56592. CNP_PMC_SLPS0_DBG_OFFSET
  56593. CNP_PMC_SLP_S0_RES_COUNTER_OFFSET
  56594. CNP_PPFEAR_NUM_ENTRIES
  56595. CNP_PWM_CGE_GATING_DISABLE
  56596. CNP_RAWCLK_DEN
  56597. CNP_RAWCLK_DIV
  56598. CNP_RAWCLK_DIV_MASK
  56599. CNP_RAWCLK_FRAC_MASK
  56600. CNRDL_T
  56601. CNRDU_T
  56602. CNRDXL_S
  56603. CNRDXU_S
  56604. CNRDYL_S
  56605. CNRDYU_S
  56606. CNS3XXX_2DG_BASE
  56607. CNS3XXX_AXI_IXC_BASE
  56608. CNS3XXX_CAMERA_BASE
  56609. CNS3XXX_CLCD_BASE
  56610. CNS3XXX_CORESIGHT_BASE
  56611. CNS3XXX_CRYPTO_BASE
  56612. CNS3XXX_DDR2SDRAM_BASE
  56613. CNS3XXX_DMAC_BASE
  56614. CNS3XXX_DMC_BASE
  56615. CNS3XXX_EMBEDDED_SRAM_BASE
  56616. CNS3XXX_FLASH_BASE
  56617. CNS3XXX_FLASH_SIZE
  56618. CNS3XXX_GPIOA_BASE
  56619. CNS3XXX_GPIOB_BASE
  56620. CNS3XXX_HCIE_BASE
  56621. CNS3XXX_I2S_BASE
  56622. CNS3XXX_I2S_TDM_BASE
  56623. CNS3XXX_L2C_BASE
  56624. CNS3XXX_MISC_BASE
  56625. CNS3XXX_MISC_BASE_VIRT
  56626. CNS3XXX_PCIE0_CFG0_BASE
  56627. CNS3XXX_PCIE0_CFG0_BASE_VIRT
  56628. CNS3XXX_PCIE0_CFG1_BASE
  56629. CNS3XXX_PCIE0_CFG1_BASE_VIRT
  56630. CNS3XXX_PCIE0_HOST_BASE
  56631. CNS3XXX_PCIE0_HOST_BASE_VIRT
  56632. CNS3XXX_PCIE0_IO_BASE
  56633. CNS3XXX_PCIE0_MEM_BASE
  56634. CNS3XXX_PCIE0_MSG_BASE
  56635. CNS3XXX_PCIE1_CFG0_BASE
  56636. CNS3XXX_PCIE1_CFG0_BASE_VIRT
  56637. CNS3XXX_PCIE1_CFG1_BASE
  56638. CNS3XXX_PCIE1_CFG1_BASE_VIRT
  56639. CNS3XXX_PCIE1_HOST_BASE
  56640. CNS3XXX_PCIE1_HOST_BASE_VIRT
  56641. CNS3XXX_PCIE1_IO_BASE
  56642. CNS3XXX_PCIE1_MEM_BASE
  56643. CNS3XXX_PCIE1_MSG_BASE
  56644. CNS3XXX_PM_BASE
  56645. CNS3XXX_PM_BASE_VIRT
  56646. CNS3XXX_PPE_BASE
  56647. CNS3XXX_PWR_CLK_EN
  56648. CNS3XXX_PWR_CPU_CLK_DIV_BY1
  56649. CNS3XXX_PWR_CPU_CLK_DIV_BY2
  56650. CNS3XXX_PWR_CPU_CLK_DIV_BY4
  56651. CNS3XXX_PWR_CPU_MODE_DFS
  56652. CNS3XXX_PWR_CPU_MODE_DOZE
  56653. CNS3XXX_PWR_CPU_MODE_HALT
  56654. CNS3XXX_PWR_CPU_MODE_HIBERNATE
  56655. CNS3XXX_PWR_CPU_MODE_IDLE
  56656. CNS3XXX_PWR_CPU_MODE_SLEEP
  56657. CNS3XXX_PWR_PLL
  56658. CNS3XXX_PWR_PLL_ALL
  56659. CNS3XXX_PWR_PLL_CPU_300MHZ
  56660. CNS3XXX_PWR_PLL_CPU_333MHZ
  56661. CNS3XXX_PWR_PLL_CPU_366MHZ
  56662. CNS3XXX_PWR_PLL_CPU_400MHZ
  56663. CNS3XXX_PWR_PLL_CPU_433MHZ
  56664. CNS3XXX_PWR_PLL_CPU_466MHZ
  56665. CNS3XXX_PWR_PLL_CPU_500MHZ
  56666. CNS3XXX_PWR_PLL_CPU_533MHZ
  56667. CNS3XXX_PWR_PLL_CPU_566MHZ
  56668. CNS3XXX_PWR_PLL_CPU_600MHZ
  56669. CNS3XXX_PWR_PLL_CPU_633MHZ
  56670. CNS3XXX_PWR_PLL_CPU_666MHZ
  56671. CNS3XXX_PWR_PLL_CPU_700MHZ
  56672. CNS3XXX_PWR_PLL_DDR2_200MHZ
  56673. CNS3XXX_PWR_PLL_DDR2_266MHZ
  56674. CNS3XXX_PWR_PLL_DDR2_333MHZ
  56675. CNS3XXX_PWR_PLL_DDR2_400MHZ
  56676. CNS3XXX_PWR_SOFTWARE_RST
  56677. CNS3XXX_RAID_BASE
  56678. CNS3XXX_RTC_BASE
  56679. CNS3XXX_SATA2_BASE
  56680. CNS3XXX_SATA2_SIZE
  56681. CNS3XXX_SDIO_BASE
  56682. CNS3XXX_SMC_BASE
  56683. CNS3XXX_SPI_FLASH_BASE
  56684. CNS3XXX_SSP_BASE
  56685. CNS3XXX_SWITCH_BASE
  56686. CNS3XXX_TC11MP_GIC_CPU_BASE
  56687. CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT
  56688. CNS3XXX_TC11MP_GIC_DIST_BASE
  56689. CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT
  56690. CNS3XXX_TC11MP_L220_BASE
  56691. CNS3XXX_TC11MP_SCU_BASE
  56692. CNS3XXX_TC11MP_SCU_BASE_VIRT
  56693. CNS3XXX_TC11MP_TWD_BASE
  56694. CNS3XXX_TC11MP_TWD_BASE_VIRT
  56695. CNS3XXX_TIMER1_2_3_BASE
  56696. CNS3XXX_TIMER1_2_3_BASE_VIRT
  56697. CNS3XXX_UART0_BASE
  56698. CNS3XXX_UART0_BASE_VIRT
  56699. CNS3XXX_UART1_BASE
  56700. CNS3XXX_UART2_BASE
  56701. CNS3XXX_USBOTG_BASE
  56702. CNS3XXX_USB_BASE
  56703. CNS3XXX_USB_OHCI_BASE
  56704. CNSTAT_REG
  56705. CNST_CACHE_GROUP_MASK
  56706. CNST_CACHE_GROUP_VAL
  56707. CNST_CACHE_PMC4_MASK
  56708. CNST_CACHE_PMC4_VAL
  56709. CNST_EBB_MASK
  56710. CNST_EBB_VAL
  56711. CNST_FAB_MATCH_MASK
  56712. CNST_FAB_MATCH_VAL
  56713. CNST_IFM_MASK
  56714. CNST_IFM_VAL
  56715. CNST_L1_QUAL_MASK
  56716. CNST_L1_QUAL_VAL
  56717. CNST_NC_MASK
  56718. CNST_NC_SHIFT
  56719. CNST_NC_VAL
  56720. CNST_PMC_MASK
  56721. CNST_PMC_SHIFT
  56722. CNST_PMC_VAL
  56723. CNST_SAMPLE_MASK
  56724. CNST_SAMPLE_VAL
  56725. CNST_THRESH_MASK
  56726. CNST_THRESH_VAL
  56727. CNT
  56728. CNT0
  56729. CNT0_B
  56730. CNT0_FCS_ERROR
  56731. CNT0_INT_MASK
  56732. CNT1
  56733. CNT1_B
  56734. CNT1_INT_MASK
  56735. CNT2
  56736. CNT3
  56737. CNT3_FALSE_CCA
  56738. CNT4
  56739. CNT5
  56740. CNTACR
  56741. CNTACR_RFRQ
  56742. CNTACR_RPCT
  56743. CNTACR_RVCT
  56744. CNTACR_RVOFF
  56745. CNTACR_RWPT
  56746. CNTACR_RWVT
  56747. CNTCR
  56748. CNTCV_HI
  56749. CNTCV_LO
  56750. CNTFID0
  56751. CNTFRQ
  56752. CNTHCTL
  56753. CNTHCTL_EL1PCEN
  56754. CNTHCTL_EL1PCTEN
  56755. CNTHCTL_EVNTDIR
  56756. CNTHCTL_EVNTEN
  56757. CNTHCTL_EVNTI
  56758. CNTKCTL
  56759. CNTKCTL_EL1
  56760. CNTL
  56761. CNTL1_CID
  56762. CNTL1_DISR
  56763. CNTL1_ETM
  56764. CNTL1_PERE
  56765. CNTL1_PTE
  56766. CNTL1_STE
  56767. CNTL2_ACDPE
  56768. CNTL2_CC_TIMEOUT_12HRS
  56769. CNTL2_CC_TIMEOUT_LSB_RES
  56770. CNTL2_CC_TIMEOUT_MASK
  56771. CNTL2_CC_TIMEOUT_OFFSET
  56772. CNTL2_CHGLED_TYPEB
  56773. CNTL2_CHG_OUT_TURNON
  56774. CNTL2_DAE
  56775. CNTL2_ENF
  56776. CNTL2_PC_TIMEOUT_70MINS
  56777. CNTL2_PC_TIMEOUT_LSB_RES
  56778. CNTL2_PC_TIMEOUT_MASK
  56779. CNTL2_PC_TIMEOUT_OFFSET
  56780. CNTL2_PGDP
  56781. CNTL2_PGRP
  56782. CNTL2_S2FE
  56783. CNTL2_SBO
  56784. CNTL2_TSDR
  56785. CNTL3_ADIDCHK
  56786. CNTL3_BS8
  56787. CNTL3_FASTCLK
  56788. CNTL3_FASTSCSI
  56789. CNTL3_G2CB
  56790. CNTL3_LBTM
  56791. CNTL3_MDM
  56792. CNTL3_QTAG
  56793. CNTLREG_ADDRESSCODE_MASK
  56794. CNTLREG_EMAC1SEL_MASK
  56795. CNTLREG_WRITE_ENABLE_MASK
  56796. CNTL_ADDR
  56797. CNTL_AMD
  56798. CNTL_BEBO
  56799. CNTL_BEPO
  56800. CNTL_BGR
  56801. CNTL_CHT
  56802. CNTL_CLEAR
  56803. CNTL_CLEAR_MASK
  56804. CNTL_CSV_MASK
  56805. CNTL_CSV_SHIFT
  56806. CNTL_DEC
  56807. CNTL_EN
  56808. CNTL_EN_MASK
  56809. CNTL_FOREVER
  56810. CNTL_HMT
  56811. CNTL_ID
  56812. CNTL_INC
  56813. CNTL_IN_PIPEL
  56814. CNTL_LCDBPP1
  56815. CNTL_LCDBPP16
  56816. CNTL_LCDBPP16_444
  56817. CNTL_LCDBPP16_565
  56818. CNTL_LCDBPP2
  56819. CNTL_LCDBPP24
  56820. CNTL_LCDBPP4
  56821. CNTL_LCDBPP8
  56822. CNTL_LCDBW
  56823. CNTL_LCDDUAL
  56824. CNTL_LCDEN
  56825. CNTL_LCDMONO8
  56826. CNTL_LCDPWR
  56827. CNTL_LCDTFT
  56828. CNTL_LCDVCOMP
  56829. CNTL_LDMAFIFOTIME
  56830. CNTL_MATCH
  56831. CNTL_MODE
  56832. CNTL_MSGTYPE
  56833. CNTL_OVER
  56834. CNTL_OVER_MASK
  56835. CNTL_PT
  56836. CNTL_RPST
  56837. CNTL_RUN_TIMER
  56838. CNTL_RW
  56839. CNTL_SERIAL_NUM_WORDS
  56840. CNTL_SERIAL_NUM_WORD_SZ
  56841. CNTL_STOP_TIMER
  56842. CNTL_ST_1XBPP_444
  56843. CNTL_ST_1XBPP_5551
  56844. CNTL_ST_1XBPP_565
  56845. CNTL_ST_CDWID_12
  56846. CNTL_ST_CDWID_16
  56847. CNTL_ST_CDWID_18
  56848. CNTL_ST_CDWID_24
  56849. CNTL_ST_CEAEN
  56850. CNTL_ST_LCDBPP24_PACKED
  56851. CNTL_TCT_MASK
  56852. CNTL_TCT_SHIFT
  56853. CNTL_TOZERO
  56854. CNTL_WATERMARK
  56855. CNTM_set
  56856. CNTOVF
  56857. CNTP_CTL
  56858. CNTP_CVAL
  56859. CNTP_TVAL
  56860. CNTR1_CFG_MASK
  56861. CNTR1_CFG_SHIFT
  56862. CNTR1_MCONNID_EN_MASK
  56863. CNTR1_MCONNID_EN_SHIFT
  56864. CNTR1_REGION_EN_MASK
  56865. CNTR1_REGION_EN_SHIFT
  56866. CNTR2_CFG_MASK
  56867. CNTR2_CFG_SHIFT
  56868. CNTR2_MCONNID_EN_MASK
  56869. CNTR2_MCONNID_EN_SHIFT
  56870. CNTR2_REGION_EN_MASK
  56871. CNTR2_REGION_EN_SHIFT
  56872. CNTRL
  56873. CNTRL1
  56874. CNTRLREG_4WIRE
  56875. CNTRLREG_5WIRE
  56876. CNTRLREG_8WIRE
  56877. CNTRLREG_AFE_CTRL
  56878. CNTRLREG_AFE_CTRL_MASK
  56879. CNTRLREG_POWERDOWN
  56880. CNTRLREG_STEPCONFIGWRT
  56881. CNTRLREG_STEPID
  56882. CNTRLREG_TSCENB
  56883. CNTRLREG_TSCSSENB
  56884. CNTRL_9052
  56885. CNTRL_9054
  56886. CNTRL_CH0
  56887. CNTRL_CH1
  56888. CNTRL_CPL
  56889. CNTRL_DIS_RA0
  56890. CNTRL_DIS_RA1
  56891. CNTRL_DMD
  56892. CNTRL_EDG
  56893. CNTRL_EDG_BOTH
  56894. CNTRL_EDG_FALL
  56895. CNTRL_EDG_NONE
  56896. CNTRL_EDG_RISE
  56897. CNTRL_ENA_2ND
  56898. CNTRL_IVO
  56899. CNTRL_LBM
  56900. CNTRL_MOD
  56901. CNTRL_R
  56902. CNTRL_REG
  56903. CNTRL_RFE
  56904. CNTRL_RIC
  56905. CNTRL_RXE
  56906. CNTRL_TFE
  56907. CNTRL_TIC
  56908. CNTRL_TXE
  56909. CNTRL_WIN
  56910. CNTRL_WIN_3_3
  56911. CNTRL_WIN_3_4
  56912. CNTRL_WIN_4_3
  56913. CNTRL_WIN_4_4
  56914. CNTRST
  56915. CNTRST_CTRL
  56916. CNTR_32BIT
  56917. CNTR_32BIT_MAX
  56918. CNTR_ALG_MASK
  56919. CNTR_ALG_NIST
  56920. CNTR_ALG_SHIFT
  56921. CNTR_ALL
  56922. CNTR_CNT
  56923. CNTR_COUNT_HIGH
  56924. CNTR_COUNT_LOW
  56925. CNTR_CTRL
  56926. CNTR_CTRL_ACTIVE
  56927. CNTR_CTRL_ENABLE
  56928. CNTR_CTRL_MODE_HWSIG
  56929. CNTR_CTRL_MODE_MASK
  56930. CNTR_CTRL_MODE_ONESHOT
  56931. CNTR_CTRL_PRESCALE_MASK
  56932. CNTR_CTRL_PRESCALE_MIN
  56933. CNTR_CTRL_PRESCALE_SHIFT
  56934. CNTR_CTRL_TRIG_SRC_MASK
  56935. CNTR_CTRL_TRIG_SRC_PREV_CNTR
  56936. CNTR_DDIR
  56937. CNTR_DISABLED
  56938. CNTR_ELEM
  56939. CNTR_EVEN
  56940. CNTR_ID_RETRIGGER
  56941. CNTR_ID_WDOG
  56942. CNTR_INTEN
  56943. CNTR_INVALID_VL
  56944. CNTR_IO_DX
  56945. CNTR_MASK
  56946. CNTR_MAX
  56947. CNTR_MODE_R
  56948. CNTR_MODE_W
  56949. CNTR_NORMAL
  56950. CNTR_NOT_COUNTED
  56951. CNTR_NOT_SUPPORTED
  56952. CNTR_ODD
  56953. CNTR_OK
  56954. CNTR_PDMD
  56955. CNTR_PREST
  56956. CNTR_SDMA
  56957. CNTR_SYNTH
  56958. CNTR_TCEN
  56959. CNTR_TO_SECS_SH
  56960. CNTR_VL
  56961. CNTTIDR
  56962. CNTTIDR_VIRT
  56963. CNTU_TX
  56964. CNTVCT
  56965. CNTVCT_HI
  56966. CNTVCT_LO
  56967. CNTVOFF
  56968. CNTV_CTL
  56969. CNTV_CVAL
  56970. CNTV_TVAL
  56971. CNTXT_TYPE_CQ
  56972. CNTXT_TYPE_EGRESS
  56973. CNTXT_TYPE_FL
  56974. CNTXT_TYPE_RSP
  56975. CNTX_BUSY_INT_ENABLE
  56976. CNTX_EMPTY_INT_ENABLE
  56977. CNT_CNTRL_RESET
  56978. CNT_CYC_REGS_NUM
  56979. CNT_EN
  56980. CNT_H
  56981. CNT_INTVAL
  56982. CNT_L
  56983. CNT_LEADE
  56984. CNT_LEADS
  56985. CNT_RESERVED
  56986. CNT_RST
  56987. CNT_SLEADE
  56988. CNT_TRSHLD
  56989. CNV0_CNV_CSC_C11_C12__CNV_CSC_C11_MASK
  56990. CNV0_CNV_CSC_C11_C12__CNV_CSC_C11__SHIFT
  56991. CNV0_CNV_CSC_C11_C12__CNV_CSC_C12_MASK
  56992. CNV0_CNV_CSC_C11_C12__CNV_CSC_C12__SHIFT
  56993. CNV0_CNV_CSC_C13_C14__CNV_CSC_C13_MASK
  56994. CNV0_CNV_CSC_C13_C14__CNV_CSC_C13__SHIFT
  56995. CNV0_CNV_CSC_C13_C14__CNV_CSC_C14_MASK
  56996. CNV0_CNV_CSC_C13_C14__CNV_CSC_C14__SHIFT
  56997. CNV0_CNV_CSC_C21_C22__CNV_CSC_C21_MASK
  56998. CNV0_CNV_CSC_C21_C22__CNV_CSC_C21__SHIFT
  56999. CNV0_CNV_CSC_C21_C22__CNV_CSC_C22_MASK
  57000. CNV0_CNV_CSC_C21_C22__CNV_CSC_C22__SHIFT
  57001. CNV0_CNV_CSC_C23_C24__CNV_CSC_C23_MASK
  57002. CNV0_CNV_CSC_C23_C24__CNV_CSC_C23__SHIFT
  57003. CNV0_CNV_CSC_C23_C24__CNV_CSC_C24_MASK
  57004. CNV0_CNV_CSC_C23_C24__CNV_CSC_C24__SHIFT
  57005. CNV0_CNV_CSC_C31_C32__CNV_CSC_C31_MASK
  57006. CNV0_CNV_CSC_C31_C32__CNV_CSC_C31__SHIFT
  57007. CNV0_CNV_CSC_C31_C32__CNV_CSC_C32_MASK
  57008. CNV0_CNV_CSC_C31_C32__CNV_CSC_C32__SHIFT
  57009. CNV0_CNV_CSC_C33_C34__CNV_CSC_C33_MASK
  57010. CNV0_CNV_CSC_C33_C34__CNV_CSC_C33__SHIFT
  57011. CNV0_CNV_CSC_C33_C34__CNV_CSC_C34_MASK
  57012. CNV0_CNV_CSC_C33_C34__CNV_CSC_C34__SHIFT
  57013. CNV0_CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_LOWER_B_MASK
  57014. CNV0_CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_LOWER_B__SHIFT
  57015. CNV0_CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_UPPER_B_MASK
  57016. CNV0_CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_UPPER_B__SHIFT
  57017. CNV0_CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_LOWER_G_MASK
  57018. CNV0_CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_LOWER_G__SHIFT
  57019. CNV0_CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_UPPER_G_MASK
  57020. CNV0_CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_UPPER_G__SHIFT
  57021. CNV0_CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_LOWER_R_MASK
  57022. CNV0_CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_LOWER_R__SHIFT
  57023. CNV0_CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_UPPER_R_MASK
  57024. CNV0_CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_UPPER_R__SHIFT
  57025. CNV0_CNV_CSC_CONTROL__CNV_CSC_BYPASS_MASK
  57026. CNV0_CNV_CSC_CONTROL__CNV_CSC_BYPASS__SHIFT
  57027. CNV0_CNV_CSC_ROUND_OFFSET_B__CNV_CSC_ROUND_OFFSET_B_MASK
  57028. CNV0_CNV_CSC_ROUND_OFFSET_B__CNV_CSC_ROUND_OFFSET_B__SHIFT
  57029. CNV0_CNV_CSC_ROUND_OFFSET_G__CNV_CSC_ROUND_OFFSET_G_MASK
  57030. CNV0_CNV_CSC_ROUND_OFFSET_G__CNV_CSC_ROUND_OFFSET_G__SHIFT
  57031. CNV0_CNV_CSC_ROUND_OFFSET_R__CNV_CSC_ROUND_OFFSET_R_MASK
  57032. CNV0_CNV_CSC_ROUND_OFFSET_R__CNV_CSC_ROUND_OFFSET_R__SHIFT
  57033. CNV0_CNV_INPUT_SELECT__CNV_INPUT_PIPE_SELECT_MASK
  57034. CNV0_CNV_INPUT_SELECT__CNV_INPUT_PIPE_SELECT__SHIFT
  57035. CNV0_CNV_INPUT_SELECT__CNV_INPUT_SRC_SELECT_MASK
  57036. CNV0_CNV_INPUT_SELECT__CNV_INPUT_SRC_SELECT__SHIFT
  57037. CNV0_CNV_MODE__CNV_EYE_SELECTION_MASK
  57038. CNV0_CNV_MODE__CNV_EYE_SELECTION__SHIFT
  57039. CNV0_CNV_MODE__CNV_FRAME_CAPTURE_EN_MASK
  57040. CNV0_CNV_MODE__CNV_FRAME_CAPTURE_EN__SHIFT
  57041. CNV0_CNV_MODE__CNV_FRAME_CAPTURE_RATE_MASK
  57042. CNV0_CNV_MODE__CNV_FRAME_CAPTURE_RATE__SHIFT
  57043. CNV0_CNV_MODE__CNV_INTERLACED_FIELD_ORDER_MASK
  57044. CNV0_CNV_MODE__CNV_INTERLACED_FIELD_ORDER__SHIFT
  57045. CNV0_CNV_MODE__CNV_INTERLACED_MODE_MASK
  57046. CNV0_CNV_MODE__CNV_INTERLACED_MODE__SHIFT
  57047. CNV0_CNV_MODE__CNV_NEW_CONTENT_MASK
  57048. CNV0_CNV_MODE__CNV_NEW_CONTENT__SHIFT
  57049. CNV0_CNV_MODE__CNV_STEREO_POLARITY_MASK
  57050. CNV0_CNV_MODE__CNV_STEREO_POLARITY__SHIFT
  57051. CNV0_CNV_MODE__CNV_STEREO_SPLIT_MASK
  57052. CNV0_CNV_MODE__CNV_STEREO_SPLIT__SHIFT
  57053. CNV0_CNV_MODE__CNV_STEREO_TYPE_MASK
  57054. CNV0_CNV_MODE__CNV_STEREO_TYPE__SHIFT
  57055. CNV0_CNV_MODE__CNV_WINDOW_CROP_EN_MASK
  57056. CNV0_CNV_MODE__CNV_WINDOW_CROP_EN__SHIFT
  57057. CNV0_CNV_SOURCE_SIZE__CNV_SOURCE_HEIGHT_MASK
  57058. CNV0_CNV_SOURCE_SIZE__CNV_SOURCE_HEIGHT__SHIFT
  57059. CNV0_CNV_SOURCE_SIZE__CNV_SOURCE_WIDTH_MASK
  57060. CNV0_CNV_SOURCE_SIZE__CNV_SOURCE_WIDTH__SHIFT
  57061. CNV0_CNV_TEST_CNTL__CNV_TEST_CRC_CONT_EN_MASK
  57062. CNV0_CNV_TEST_CNTL__CNV_TEST_CRC_CONT_EN__SHIFT
  57063. CNV0_CNV_TEST_CNTL__CNV_TEST_CRC_DE_ONLY_MASK
  57064. CNV0_CNV_TEST_CNTL__CNV_TEST_CRC_DE_ONLY__SHIFT
  57065. CNV0_CNV_TEST_CNTL__CNV_TEST_CRC_EN_MASK
  57066. CNV0_CNV_TEST_CNTL__CNV_TEST_CRC_EN__SHIFT
  57067. CNV0_CNV_TEST_CRC_BLUE__CNV_TEST_CRC_BLUE_MASK_MASK
  57068. CNV0_CNV_TEST_CRC_BLUE__CNV_TEST_CRC_BLUE_MASK__SHIFT
  57069. CNV0_CNV_TEST_CRC_BLUE__CNV_TEST_CRC_SIG_BLUE_MASK
  57070. CNV0_CNV_TEST_CRC_BLUE__CNV_TEST_CRC_SIG_BLUE__SHIFT
  57071. CNV0_CNV_TEST_CRC_GREEN__CNV_TEST_CRC_GREEN_MASK_MASK
  57072. CNV0_CNV_TEST_CRC_GREEN__CNV_TEST_CRC_GREEN_MASK__SHIFT
  57073. CNV0_CNV_TEST_CRC_GREEN__CNV_TEST_CRC_SIG_GREEN_MASK
  57074. CNV0_CNV_TEST_CRC_GREEN__CNV_TEST_CRC_SIG_GREEN__SHIFT
  57075. CNV0_CNV_TEST_CRC_RED__CNV_TEST_CRC_RED_MASK_MASK
  57076. CNV0_CNV_TEST_CRC_RED__CNV_TEST_CRC_RED_MASK__SHIFT
  57077. CNV0_CNV_TEST_CRC_RED__CNV_TEST_CRC_SIG_RED_MASK
  57078. CNV0_CNV_TEST_CRC_RED__CNV_TEST_CRC_SIG_RED__SHIFT
  57079. CNV0_CNV_UPDATE__CNV_UPDATE_LOCK_MASK
  57080. CNV0_CNV_UPDATE__CNV_UPDATE_LOCK__SHIFT
  57081. CNV0_CNV_UPDATE__CNV_UPDATE_PENDING_MASK
  57082. CNV0_CNV_UPDATE__CNV_UPDATE_PENDING__SHIFT
  57083. CNV0_CNV_UPDATE__CNV_UPDATE_TAKEN_MASK
  57084. CNV0_CNV_UPDATE__CNV_UPDATE_TAKEN__SHIFT
  57085. CNV0_CNV_WINDOW_SIZE__CNV_WINDOW_HEIGHT_MASK
  57086. CNV0_CNV_WINDOW_SIZE__CNV_WINDOW_HEIGHT__SHIFT
  57087. CNV0_CNV_WINDOW_SIZE__CNV_WINDOW_WIDTH_MASK
  57088. CNV0_CNV_WINDOW_SIZE__CNV_WINDOW_WIDTH__SHIFT
  57089. CNV0_CNV_WINDOW_START__CNV_WINDOW_START_X_MASK
  57090. CNV0_CNV_WINDOW_START__CNV_WINDOW_START_X__SHIFT
  57091. CNV0_CNV_WINDOW_START__CNV_WINDOW_START_Y_MASK
  57092. CNV0_CNV_WINDOW_START__CNV_WINDOW_START_Y__SHIFT
  57093. CNV0_WB_EC_CONFIG__DISPCLK_G_WBSCL_GATE_DIS_MASK
  57094. CNV0_WB_EC_CONFIG__DISPCLK_G_WBSCL_GATE_DIS__SHIFT
  57095. CNV0_WB_EC_CONFIG__DISPCLK_G_WB_GATE_DIS_MASK
  57096. CNV0_WB_EC_CONFIG__DISPCLK_G_WB_GATE_DIS__SHIFT
  57097. CNV0_WB_EC_CONFIG__DISPCLK_R_WB_GATE_DIS_MASK
  57098. CNV0_WB_EC_CONFIG__DISPCLK_R_WB_GATE_DIS__SHIFT
  57099. CNV0_WB_EC_CONFIG__LB_MEM_PWR_STATE_BG_MASK
  57100. CNV0_WB_EC_CONFIG__LB_MEM_PWR_STATE_BG__SHIFT
  57101. CNV0_WB_EC_CONFIG__LB_MEM_PWR_STATE_MASK
  57102. CNV0_WB_EC_CONFIG__LB_MEM_PWR_STATE_SM_MASK
  57103. CNV0_WB_EC_CONFIG__LB_MEM_PWR_STATE_SM__SHIFT
  57104. CNV0_WB_EC_CONFIG__LB_MEM_PWR_STATE__SHIFT
  57105. CNV0_WB_EC_CONFIG__LUT_MEM_PWR_STATE_MASK
  57106. CNV0_WB_EC_CONFIG__LUT_MEM_PWR_STATE__SHIFT
  57107. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS_MASK
  57108. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS__SHIFT
  57109. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_FORCE_MASK
  57110. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_FORCE__SHIFT
  57111. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_MODE_SEL_MASK
  57112. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_MODE_SEL__SHIFT
  57113. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_BG_MASK
  57114. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_BG__SHIFT
  57115. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_MASK
  57116. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_SM_MASK
  57117. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_SM__SHIFT
  57118. CNV0_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE__SHIFT
  57119. CNV0_WB_EC_CONFIG__WB_LB_LS_DIS_MASK
  57120. CNV0_WB_EC_CONFIG__WB_LB_LS_DIS__SHIFT
  57121. CNV0_WB_EC_CONFIG__WB_LB_SD_DIS_MASK
  57122. CNV0_WB_EC_CONFIG__WB_LB_SD_DIS__SHIFT
  57123. CNV0_WB_EC_CONFIG__WB_LUT_LS_DIS_MASK
  57124. CNV0_WB_EC_CONFIG__WB_LUT_LS_DIS__SHIFT
  57125. CNV0_WB_EC_CONFIG__WB_RAM_PW_SAVE_MODE_MASK
  57126. CNV0_WB_EC_CONFIG__WB_RAM_PW_SAVE_MODE__SHIFT
  57127. CNV0_WB_EC_CONFIG__WB_TEST_CLK_SEL_MASK
  57128. CNV0_WB_EC_CONFIG__WB_TEST_CLK_SEL__SHIFT
  57129. CNV0_WB_ENABLE__WB_ENABLE_MASK
  57130. CNV0_WB_ENABLE__WB_ENABLE__SHIFT
  57131. CNV0_WB_SOFT_RESET__WB_SOFT_RESET_MASK
  57132. CNV0_WB_SOFT_RESET__WB_SOFT_RESET__SHIFT
  57133. CNV0_WB_WARM_UP_MODE_CTL1__GMC_WARM_UP_ENABLE_MASK
  57134. CNV0_WB_WARM_UP_MODE_CTL1__GMC_WARM_UP_ENABLE__SHIFT
  57135. CNV0_WB_WARM_UP_MODE_CTL1__HEIGHT_WARMUP_MASK
  57136. CNV0_WB_WARM_UP_MODE_CTL1__HEIGHT_WARMUP__SHIFT
  57137. CNV0_WB_WARM_UP_MODE_CTL1__WIDTH_WARMUP_MASK
  57138. CNV0_WB_WARM_UP_MODE_CTL1__WIDTH_WARMUP__SHIFT
  57139. CNV0_WB_WARM_UP_MODE_CTL2__DATA_VALUE_WARMUP_MASK
  57140. CNV0_WB_WARM_UP_MODE_CTL2__DATA_VALUE_WARMUP__SHIFT
  57141. CNV0_WB_WARM_UP_MODE_CTL2__MODE_WARMUP_MASK
  57142. CNV0_WB_WARM_UP_MODE_CTL2__MODE_WARMUP__SHIFT
  57143. CNV1_CNV_CSC_C11_C12__CNV_CSC_C11_MASK
  57144. CNV1_CNV_CSC_C11_C12__CNV_CSC_C11__SHIFT
  57145. CNV1_CNV_CSC_C11_C12__CNV_CSC_C12_MASK
  57146. CNV1_CNV_CSC_C11_C12__CNV_CSC_C12__SHIFT
  57147. CNV1_CNV_CSC_C13_C14__CNV_CSC_C13_MASK
  57148. CNV1_CNV_CSC_C13_C14__CNV_CSC_C13__SHIFT
  57149. CNV1_CNV_CSC_C13_C14__CNV_CSC_C14_MASK
  57150. CNV1_CNV_CSC_C13_C14__CNV_CSC_C14__SHIFT
  57151. CNV1_CNV_CSC_C21_C22__CNV_CSC_C21_MASK
  57152. CNV1_CNV_CSC_C21_C22__CNV_CSC_C21__SHIFT
  57153. CNV1_CNV_CSC_C21_C22__CNV_CSC_C22_MASK
  57154. CNV1_CNV_CSC_C21_C22__CNV_CSC_C22__SHIFT
  57155. CNV1_CNV_CSC_C23_C24__CNV_CSC_C23_MASK
  57156. CNV1_CNV_CSC_C23_C24__CNV_CSC_C23__SHIFT
  57157. CNV1_CNV_CSC_C23_C24__CNV_CSC_C24_MASK
  57158. CNV1_CNV_CSC_C23_C24__CNV_CSC_C24__SHIFT
  57159. CNV1_CNV_CSC_C31_C32__CNV_CSC_C31_MASK
  57160. CNV1_CNV_CSC_C31_C32__CNV_CSC_C31__SHIFT
  57161. CNV1_CNV_CSC_C31_C32__CNV_CSC_C32_MASK
  57162. CNV1_CNV_CSC_C31_C32__CNV_CSC_C32__SHIFT
  57163. CNV1_CNV_CSC_C33_C34__CNV_CSC_C33_MASK
  57164. CNV1_CNV_CSC_C33_C34__CNV_CSC_C33__SHIFT
  57165. CNV1_CNV_CSC_C33_C34__CNV_CSC_C34_MASK
  57166. CNV1_CNV_CSC_C33_C34__CNV_CSC_C34__SHIFT
  57167. CNV1_CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_LOWER_B_MASK
  57168. CNV1_CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_LOWER_B__SHIFT
  57169. CNV1_CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_UPPER_B_MASK
  57170. CNV1_CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_UPPER_B__SHIFT
  57171. CNV1_CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_LOWER_G_MASK
  57172. CNV1_CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_LOWER_G__SHIFT
  57173. CNV1_CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_UPPER_G_MASK
  57174. CNV1_CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_UPPER_G__SHIFT
  57175. CNV1_CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_LOWER_R_MASK
  57176. CNV1_CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_LOWER_R__SHIFT
  57177. CNV1_CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_UPPER_R_MASK
  57178. CNV1_CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_UPPER_R__SHIFT
  57179. CNV1_CNV_CSC_CONTROL__CNV_CSC_BYPASS_MASK
  57180. CNV1_CNV_CSC_CONTROL__CNV_CSC_BYPASS__SHIFT
  57181. CNV1_CNV_CSC_ROUND_OFFSET_B__CNV_CSC_ROUND_OFFSET_B_MASK
  57182. CNV1_CNV_CSC_ROUND_OFFSET_B__CNV_CSC_ROUND_OFFSET_B__SHIFT
  57183. CNV1_CNV_CSC_ROUND_OFFSET_G__CNV_CSC_ROUND_OFFSET_G_MASK
  57184. CNV1_CNV_CSC_ROUND_OFFSET_G__CNV_CSC_ROUND_OFFSET_G__SHIFT
  57185. CNV1_CNV_CSC_ROUND_OFFSET_R__CNV_CSC_ROUND_OFFSET_R_MASK
  57186. CNV1_CNV_CSC_ROUND_OFFSET_R__CNV_CSC_ROUND_OFFSET_R__SHIFT
  57187. CNV1_CNV_INPUT_SELECT__CNV_INPUT_PIPE_SELECT_MASK
  57188. CNV1_CNV_INPUT_SELECT__CNV_INPUT_PIPE_SELECT__SHIFT
  57189. CNV1_CNV_INPUT_SELECT__CNV_INPUT_SRC_SELECT_MASK
  57190. CNV1_CNV_INPUT_SELECT__CNV_INPUT_SRC_SELECT__SHIFT
  57191. CNV1_CNV_MODE__CNV_EYE_SELECTION_MASK
  57192. CNV1_CNV_MODE__CNV_EYE_SELECTION__SHIFT
  57193. CNV1_CNV_MODE__CNV_FRAME_CAPTURE_EN_MASK
  57194. CNV1_CNV_MODE__CNV_FRAME_CAPTURE_EN__SHIFT
  57195. CNV1_CNV_MODE__CNV_FRAME_CAPTURE_RATE_MASK
  57196. CNV1_CNV_MODE__CNV_FRAME_CAPTURE_RATE__SHIFT
  57197. CNV1_CNV_MODE__CNV_INTERLACED_FIELD_ORDER_MASK
  57198. CNV1_CNV_MODE__CNV_INTERLACED_FIELD_ORDER__SHIFT
  57199. CNV1_CNV_MODE__CNV_INTERLACED_MODE_MASK
  57200. CNV1_CNV_MODE__CNV_INTERLACED_MODE__SHIFT
  57201. CNV1_CNV_MODE__CNV_NEW_CONTENT_MASK
  57202. CNV1_CNV_MODE__CNV_NEW_CONTENT__SHIFT
  57203. CNV1_CNV_MODE__CNV_STEREO_POLARITY_MASK
  57204. CNV1_CNV_MODE__CNV_STEREO_POLARITY__SHIFT
  57205. CNV1_CNV_MODE__CNV_STEREO_SPLIT_MASK
  57206. CNV1_CNV_MODE__CNV_STEREO_SPLIT__SHIFT
  57207. CNV1_CNV_MODE__CNV_STEREO_TYPE_MASK
  57208. CNV1_CNV_MODE__CNV_STEREO_TYPE__SHIFT
  57209. CNV1_CNV_MODE__CNV_WINDOW_CROP_EN_MASK
  57210. CNV1_CNV_MODE__CNV_WINDOW_CROP_EN__SHIFT
  57211. CNV1_CNV_SOURCE_SIZE__CNV_SOURCE_HEIGHT_MASK
  57212. CNV1_CNV_SOURCE_SIZE__CNV_SOURCE_HEIGHT__SHIFT
  57213. CNV1_CNV_SOURCE_SIZE__CNV_SOURCE_WIDTH_MASK
  57214. CNV1_CNV_SOURCE_SIZE__CNV_SOURCE_WIDTH__SHIFT
  57215. CNV1_CNV_TEST_CNTL__CNV_TEST_CRC_CONT_EN_MASK
  57216. CNV1_CNV_TEST_CNTL__CNV_TEST_CRC_CONT_EN__SHIFT
  57217. CNV1_CNV_TEST_CNTL__CNV_TEST_CRC_DE_ONLY_MASK
  57218. CNV1_CNV_TEST_CNTL__CNV_TEST_CRC_DE_ONLY__SHIFT
  57219. CNV1_CNV_TEST_CNTL__CNV_TEST_CRC_EN_MASK
  57220. CNV1_CNV_TEST_CNTL__CNV_TEST_CRC_EN__SHIFT
  57221. CNV1_CNV_TEST_CRC_BLUE__CNV_TEST_CRC_BLUE_MASK_MASK
  57222. CNV1_CNV_TEST_CRC_BLUE__CNV_TEST_CRC_BLUE_MASK__SHIFT
  57223. CNV1_CNV_TEST_CRC_BLUE__CNV_TEST_CRC_SIG_BLUE_MASK
  57224. CNV1_CNV_TEST_CRC_BLUE__CNV_TEST_CRC_SIG_BLUE__SHIFT
  57225. CNV1_CNV_TEST_CRC_GREEN__CNV_TEST_CRC_GREEN_MASK_MASK
  57226. CNV1_CNV_TEST_CRC_GREEN__CNV_TEST_CRC_GREEN_MASK__SHIFT
  57227. CNV1_CNV_TEST_CRC_GREEN__CNV_TEST_CRC_SIG_GREEN_MASK
  57228. CNV1_CNV_TEST_CRC_GREEN__CNV_TEST_CRC_SIG_GREEN__SHIFT
  57229. CNV1_CNV_TEST_CRC_RED__CNV_TEST_CRC_RED_MASK_MASK
  57230. CNV1_CNV_TEST_CRC_RED__CNV_TEST_CRC_RED_MASK__SHIFT
  57231. CNV1_CNV_TEST_CRC_RED__CNV_TEST_CRC_SIG_RED_MASK
  57232. CNV1_CNV_TEST_CRC_RED__CNV_TEST_CRC_SIG_RED__SHIFT
  57233. CNV1_CNV_UPDATE__CNV_UPDATE_LOCK_MASK
  57234. CNV1_CNV_UPDATE__CNV_UPDATE_LOCK__SHIFT
  57235. CNV1_CNV_UPDATE__CNV_UPDATE_PENDING_MASK
  57236. CNV1_CNV_UPDATE__CNV_UPDATE_PENDING__SHIFT
  57237. CNV1_CNV_UPDATE__CNV_UPDATE_TAKEN_MASK
  57238. CNV1_CNV_UPDATE__CNV_UPDATE_TAKEN__SHIFT
  57239. CNV1_CNV_WINDOW_SIZE__CNV_WINDOW_HEIGHT_MASK
  57240. CNV1_CNV_WINDOW_SIZE__CNV_WINDOW_HEIGHT__SHIFT
  57241. CNV1_CNV_WINDOW_SIZE__CNV_WINDOW_WIDTH_MASK
  57242. CNV1_CNV_WINDOW_SIZE__CNV_WINDOW_WIDTH__SHIFT
  57243. CNV1_CNV_WINDOW_START__CNV_WINDOW_START_X_MASK
  57244. CNV1_CNV_WINDOW_START__CNV_WINDOW_START_X__SHIFT
  57245. CNV1_CNV_WINDOW_START__CNV_WINDOW_START_Y_MASK
  57246. CNV1_CNV_WINDOW_START__CNV_WINDOW_START_Y__SHIFT
  57247. CNV1_WB_EC_CONFIG__DISPCLK_G_WBSCL_GATE_DIS_MASK
  57248. CNV1_WB_EC_CONFIG__DISPCLK_G_WBSCL_GATE_DIS__SHIFT
  57249. CNV1_WB_EC_CONFIG__DISPCLK_G_WB_GATE_DIS_MASK
  57250. CNV1_WB_EC_CONFIG__DISPCLK_G_WB_GATE_DIS__SHIFT
  57251. CNV1_WB_EC_CONFIG__DISPCLK_R_WB_GATE_DIS_MASK
  57252. CNV1_WB_EC_CONFIG__DISPCLK_R_WB_GATE_DIS__SHIFT
  57253. CNV1_WB_EC_CONFIG__LB_MEM_PWR_STATE_BG_MASK
  57254. CNV1_WB_EC_CONFIG__LB_MEM_PWR_STATE_BG__SHIFT
  57255. CNV1_WB_EC_CONFIG__LB_MEM_PWR_STATE_MASK
  57256. CNV1_WB_EC_CONFIG__LB_MEM_PWR_STATE_SM_MASK
  57257. CNV1_WB_EC_CONFIG__LB_MEM_PWR_STATE_SM__SHIFT
  57258. CNV1_WB_EC_CONFIG__LB_MEM_PWR_STATE__SHIFT
  57259. CNV1_WB_EC_CONFIG__LUT_MEM_PWR_STATE_MASK
  57260. CNV1_WB_EC_CONFIG__LUT_MEM_PWR_STATE__SHIFT
  57261. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS_MASK
  57262. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS__SHIFT
  57263. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_FORCE_MASK
  57264. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_FORCE__SHIFT
  57265. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_MODE_SEL_MASK
  57266. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_MODE_SEL__SHIFT
  57267. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_BG_MASK
  57268. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_BG__SHIFT
  57269. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_MASK
  57270. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_SM_MASK
  57271. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE_SM__SHIFT
  57272. CNV1_WB_EC_CONFIG__WBSCL_LB_MEM_PWR_STATE__SHIFT
  57273. CNV1_WB_EC_CONFIG__WB_LB_LS_DIS_MASK
  57274. CNV1_WB_EC_CONFIG__WB_LB_LS_DIS__SHIFT
  57275. CNV1_WB_EC_CONFIG__WB_LB_SD_DIS_MASK
  57276. CNV1_WB_EC_CONFIG__WB_LB_SD_DIS__SHIFT
  57277. CNV1_WB_EC_CONFIG__WB_LUT_LS_DIS_MASK
  57278. CNV1_WB_EC_CONFIG__WB_LUT_LS_DIS__SHIFT
  57279. CNV1_WB_EC_CONFIG__WB_RAM_PW_SAVE_MODE_MASK
  57280. CNV1_WB_EC_CONFIG__WB_RAM_PW_SAVE_MODE__SHIFT
  57281. CNV1_WB_EC_CONFIG__WB_TEST_CLK_SEL_MASK
  57282. CNV1_WB_EC_CONFIG__WB_TEST_CLK_SEL__SHIFT
  57283. CNV1_WB_ENABLE__WB_ENABLE_MASK
  57284. CNV1_WB_ENABLE__WB_ENABLE__SHIFT
  57285. CNV1_WB_SOFT_RESET__WB_SOFT_RESET_MASK
  57286. CNV1_WB_SOFT_RESET__WB_SOFT_RESET__SHIFT
  57287. CNV1_WB_WARM_UP_MODE_CTL1__GMC_WARM_UP_ENABLE_MASK
  57288. CNV1_WB_WARM_UP_MODE_CTL1__GMC_WARM_UP_ENABLE__SHIFT
  57289. CNV1_WB_WARM_UP_MODE_CTL1__HEIGHT_WARMUP_MASK
  57290. CNV1_WB_WARM_UP_MODE_CTL1__HEIGHT_WARMUP__SHIFT
  57291. CNV1_WB_WARM_UP_MODE_CTL1__WIDTH_WARMUP_MASK
  57292. CNV1_WB_WARM_UP_MODE_CTL1__WIDTH_WARMUP__SHIFT
  57293. CNV1_WB_WARM_UP_MODE_CTL2__DATA_VALUE_WARMUP_MASK
  57294. CNV1_WB_WARM_UP_MODE_CTL2__DATA_VALUE_WARMUP__SHIFT
  57295. CNV1_WB_WARM_UP_MODE_CTL2__MODE_WARMUP_MASK
  57296. CNV1_WB_WARM_UP_MODE_CTL2__MODE_WARMUP__SHIFT
  57297. CNVC_BYPASS
  57298. CNVC_BYPASS_DISABLE
  57299. CNVC_BYPASS_EN
  57300. CNVC_CFG0_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0_MASK
  57301. CNVC_CFG0_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0__SHIFT
  57302. CNVC_CFG0_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1_MASK
  57303. CNVC_CFG0_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1__SHIFT
  57304. CNVC_CFG0_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2_MASK
  57305. CNVC_CFG0_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2__SHIFT
  57306. CNVC_CFG0_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3_MASK
  57307. CNVC_CFG0_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3__SHIFT
  57308. CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT_MASK
  57309. CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT__SHIFT
  57310. CNVC_CFG0_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH_MASK
  57311. CNVC_CFG0_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH__SHIFT
  57312. CNVC_CFG0_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW_MASK
  57313. CNVC_CFG0_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW__SHIFT
  57314. CNVC_CFG0_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH_MASK
  57315. CNVC_CFG0_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH__SHIFT
  57316. CNVC_CFG0_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW_MASK
  57317. CNVC_CFG0_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW__SHIFT
  57318. CNVC_CFG0_COLOR_KEYER_CONTROL__COLOR_KEYER_EN_MASK
  57319. CNVC_CFG0_COLOR_KEYER_CONTROL__COLOR_KEYER_EN__SHIFT
  57320. CNVC_CFG0_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE_MASK
  57321. CNVC_CFG0_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE__SHIFT
  57322. CNVC_CFG0_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH_MASK
  57323. CNVC_CFG0_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH__SHIFT
  57324. CNVC_CFG0_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW_MASK
  57325. CNVC_CFG0_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW__SHIFT
  57326. CNVC_CFG0_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH_MASK
  57327. CNVC_CFG0_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH__SHIFT
  57328. CNVC_CFG0_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW_MASK
  57329. CNVC_CFG0_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW__SHIFT
  57330. CNVC_CFG0_DENORM_CONTROL__CLAMP_POSITIVE_MASK
  57331. CNVC_CFG0_DENORM_CONTROL__CLAMP_POSITIVE__SHIFT
  57332. CNVC_CFG0_DENORM_CONTROL__DENORM_BIAS_MASK
  57333. CNVC_CFG0_DENORM_CONTROL__DENORM_BIAS__SHIFT
  57334. CNVC_CFG0_DENORM_CONTROL__DENORM_SCALE_MASK
  57335. CNVC_CFG0_DENORM_CONTROL__DENORM_SCALE__SHIFT
  57336. CNVC_CFG0_DENORM_CONTROL__DENORM_TRUNCATE_MASK
  57337. CNVC_CFG0_DENORM_CONTROL__DENORM_TRUNCATE__SHIFT
  57338. CNVC_CFG0_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B_MASK
  57339. CNVC_CFG0_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B__SHIFT
  57340. CNVC_CFG0_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G_MASK
  57341. CNVC_CFG0_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G__SHIFT
  57342. CNVC_CFG0_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R_MASK
  57343. CNVC_CFG0_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R__SHIFT
  57344. CNVC_CFG0_FCNV_FP_SCALE_BIAS__FCNV_FP_BIAS_MASK
  57345. CNVC_CFG0_FCNV_FP_SCALE_BIAS__FCNV_FP_BIAS__SHIFT
  57346. CNVC_CFG0_FCNV_FP_SCALE_BIAS__FCNV_FP_SCALE_MASK
  57347. CNVC_CFG0_FCNV_FP_SCALE_BIAS__FCNV_FP_SCALE__SHIFT
  57348. CNVC_CFG0_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B_MASK
  57349. CNVC_CFG0_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B__SHIFT
  57350. CNVC_CFG0_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G_MASK
  57351. CNVC_CFG0_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G__SHIFT
  57352. CNVC_CFG0_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R_MASK
  57353. CNVC_CFG0_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R__SHIFT
  57354. CNVC_CFG0_FORMAT_CONTROL__ALPHA_EN_MASK
  57355. CNVC_CFG0_FORMAT_CONTROL__ALPHA_EN__SHIFT
  57356. CNVC_CFG0_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK
  57357. CNVC_CFG0_FORMAT_CONTROL__CLAMP_POSITIVE_C__SHIFT
  57358. CNVC_CFG0_FORMAT_CONTROL__CLAMP_POSITIVE_MASK
  57359. CNVC_CFG0_FORMAT_CONTROL__CLAMP_POSITIVE__SHIFT
  57360. CNVC_CFG0_FORMAT_CONTROL__CNVC_BYPASS_MASK
  57361. CNVC_CFG0_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN_MASK
  57362. CNVC_CFG0_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN__SHIFT
  57363. CNVC_CFG0_FORMAT_CONTROL__CNVC_BYPASS__SHIFT
  57364. CNVC_CFG0_FORMAT_CONTROL__CNVC_UPDATE_PENDING_MASK
  57365. CNVC_CFG0_FORMAT_CONTROL__CNVC_UPDATE_PENDING__SHIFT
  57366. CNVC_CFG0_FORMAT_CONTROL__FORMAT_CNV16_MASK
  57367. CNVC_CFG0_FORMAT_CONTROL__FORMAT_CNV16__SHIFT
  57368. CNVC_CFG0_FORMAT_CONTROL__FORMAT_EXPANSION_MODE_MASK
  57369. CNVC_CFG0_FORMAT_CONTROL__FORMAT_EXPANSION_MODE__SHIFT
  57370. CNVC_CFG0_FORMAT_CONTROL__OUTPUT_FP_MASK
  57371. CNVC_CFG0_FORMAT_CONTROL__OUTPUT_FP__SHIFT
  57372. CNVC_CFG1_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0_MASK
  57373. CNVC_CFG1_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0__SHIFT
  57374. CNVC_CFG1_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1_MASK
  57375. CNVC_CFG1_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1__SHIFT
  57376. CNVC_CFG1_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2_MASK
  57377. CNVC_CFG1_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2__SHIFT
  57378. CNVC_CFG1_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3_MASK
  57379. CNVC_CFG1_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3__SHIFT
  57380. CNVC_CFG1_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT_MASK
  57381. CNVC_CFG1_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT__SHIFT
  57382. CNVC_CFG1_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH_MASK
  57383. CNVC_CFG1_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH__SHIFT
  57384. CNVC_CFG1_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW_MASK
  57385. CNVC_CFG1_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW__SHIFT
  57386. CNVC_CFG1_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH_MASK
  57387. CNVC_CFG1_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH__SHIFT
  57388. CNVC_CFG1_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW_MASK
  57389. CNVC_CFG1_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW__SHIFT
  57390. CNVC_CFG1_COLOR_KEYER_CONTROL__COLOR_KEYER_EN_MASK
  57391. CNVC_CFG1_COLOR_KEYER_CONTROL__COLOR_KEYER_EN__SHIFT
  57392. CNVC_CFG1_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE_MASK
  57393. CNVC_CFG1_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE__SHIFT
  57394. CNVC_CFG1_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH_MASK
  57395. CNVC_CFG1_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH__SHIFT
  57396. CNVC_CFG1_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW_MASK
  57397. CNVC_CFG1_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW__SHIFT
  57398. CNVC_CFG1_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH_MASK
  57399. CNVC_CFG1_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH__SHIFT
  57400. CNVC_CFG1_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW_MASK
  57401. CNVC_CFG1_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW__SHIFT
  57402. CNVC_CFG1_DENORM_CONTROL__CLAMP_POSITIVE_MASK
  57403. CNVC_CFG1_DENORM_CONTROL__CLAMP_POSITIVE__SHIFT
  57404. CNVC_CFG1_DENORM_CONTROL__DENORM_BIAS_MASK
  57405. CNVC_CFG1_DENORM_CONTROL__DENORM_BIAS__SHIFT
  57406. CNVC_CFG1_DENORM_CONTROL__DENORM_SCALE_MASK
  57407. CNVC_CFG1_DENORM_CONTROL__DENORM_SCALE__SHIFT
  57408. CNVC_CFG1_DENORM_CONTROL__DENORM_TRUNCATE_MASK
  57409. CNVC_CFG1_DENORM_CONTROL__DENORM_TRUNCATE__SHIFT
  57410. CNVC_CFG1_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B_MASK
  57411. CNVC_CFG1_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B__SHIFT
  57412. CNVC_CFG1_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G_MASK
  57413. CNVC_CFG1_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G__SHIFT
  57414. CNVC_CFG1_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R_MASK
  57415. CNVC_CFG1_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R__SHIFT
  57416. CNVC_CFG1_FCNV_FP_SCALE_BIAS__FCNV_FP_BIAS_MASK
  57417. CNVC_CFG1_FCNV_FP_SCALE_BIAS__FCNV_FP_BIAS__SHIFT
  57418. CNVC_CFG1_FCNV_FP_SCALE_BIAS__FCNV_FP_SCALE_MASK
  57419. CNVC_CFG1_FCNV_FP_SCALE_BIAS__FCNV_FP_SCALE__SHIFT
  57420. CNVC_CFG1_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B_MASK
  57421. CNVC_CFG1_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B__SHIFT
  57422. CNVC_CFG1_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G_MASK
  57423. CNVC_CFG1_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G__SHIFT
  57424. CNVC_CFG1_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R_MASK
  57425. CNVC_CFG1_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R__SHIFT
  57426. CNVC_CFG1_FORMAT_CONTROL__ALPHA_EN_MASK
  57427. CNVC_CFG1_FORMAT_CONTROL__ALPHA_EN__SHIFT
  57428. CNVC_CFG1_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK
  57429. CNVC_CFG1_FORMAT_CONTROL__CLAMP_POSITIVE_C__SHIFT
  57430. CNVC_CFG1_FORMAT_CONTROL__CLAMP_POSITIVE_MASK
  57431. CNVC_CFG1_FORMAT_CONTROL__CLAMP_POSITIVE__SHIFT
  57432. CNVC_CFG1_FORMAT_CONTROL__CNVC_BYPASS_MASK
  57433. CNVC_CFG1_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN_MASK
  57434. CNVC_CFG1_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN__SHIFT
  57435. CNVC_CFG1_FORMAT_CONTROL__CNVC_BYPASS__SHIFT
  57436. CNVC_CFG1_FORMAT_CONTROL__CNVC_UPDATE_PENDING_MASK
  57437. CNVC_CFG1_FORMAT_CONTROL__CNVC_UPDATE_PENDING__SHIFT
  57438. CNVC_CFG1_FORMAT_CONTROL__FORMAT_CNV16_MASK
  57439. CNVC_CFG1_FORMAT_CONTROL__FORMAT_CNV16__SHIFT
  57440. CNVC_CFG1_FORMAT_CONTROL__FORMAT_EXPANSION_MODE_MASK
  57441. CNVC_CFG1_FORMAT_CONTROL__FORMAT_EXPANSION_MODE__SHIFT
  57442. CNVC_CFG1_FORMAT_CONTROL__OUTPUT_FP_MASK
  57443. CNVC_CFG1_FORMAT_CONTROL__OUTPUT_FP__SHIFT
  57444. CNVC_CFG2_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0_MASK
  57445. CNVC_CFG2_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0__SHIFT
  57446. CNVC_CFG2_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1_MASK
  57447. CNVC_CFG2_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1__SHIFT
  57448. CNVC_CFG2_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2_MASK
  57449. CNVC_CFG2_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2__SHIFT
  57450. CNVC_CFG2_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3_MASK
  57451. CNVC_CFG2_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3__SHIFT
  57452. CNVC_CFG2_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT_MASK
  57453. CNVC_CFG2_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT__SHIFT
  57454. CNVC_CFG2_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH_MASK
  57455. CNVC_CFG2_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH__SHIFT
  57456. CNVC_CFG2_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW_MASK
  57457. CNVC_CFG2_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW__SHIFT
  57458. CNVC_CFG2_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH_MASK
  57459. CNVC_CFG2_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH__SHIFT
  57460. CNVC_CFG2_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW_MASK
  57461. CNVC_CFG2_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW__SHIFT
  57462. CNVC_CFG2_COLOR_KEYER_CONTROL__COLOR_KEYER_EN_MASK
  57463. CNVC_CFG2_COLOR_KEYER_CONTROL__COLOR_KEYER_EN__SHIFT
  57464. CNVC_CFG2_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE_MASK
  57465. CNVC_CFG2_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE__SHIFT
  57466. CNVC_CFG2_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH_MASK
  57467. CNVC_CFG2_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH__SHIFT
  57468. CNVC_CFG2_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW_MASK
  57469. CNVC_CFG2_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW__SHIFT
  57470. CNVC_CFG2_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH_MASK
  57471. CNVC_CFG2_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH__SHIFT
  57472. CNVC_CFG2_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW_MASK
  57473. CNVC_CFG2_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW__SHIFT
  57474. CNVC_CFG2_DENORM_CONTROL__CLAMP_POSITIVE_MASK
  57475. CNVC_CFG2_DENORM_CONTROL__CLAMP_POSITIVE__SHIFT
  57476. CNVC_CFG2_DENORM_CONTROL__DENORM_BIAS_MASK
  57477. CNVC_CFG2_DENORM_CONTROL__DENORM_BIAS__SHIFT
  57478. CNVC_CFG2_DENORM_CONTROL__DENORM_SCALE_MASK
  57479. CNVC_CFG2_DENORM_CONTROL__DENORM_SCALE__SHIFT
  57480. CNVC_CFG2_DENORM_CONTROL__DENORM_TRUNCATE_MASK
  57481. CNVC_CFG2_DENORM_CONTROL__DENORM_TRUNCATE__SHIFT
  57482. CNVC_CFG2_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B_MASK
  57483. CNVC_CFG2_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B__SHIFT
  57484. CNVC_CFG2_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G_MASK
  57485. CNVC_CFG2_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G__SHIFT
  57486. CNVC_CFG2_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R_MASK
  57487. CNVC_CFG2_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R__SHIFT
  57488. CNVC_CFG2_FCNV_FP_SCALE_BIAS__FCNV_FP_BIAS_MASK
  57489. CNVC_CFG2_FCNV_FP_SCALE_BIAS__FCNV_FP_BIAS__SHIFT
  57490. CNVC_CFG2_FCNV_FP_SCALE_BIAS__FCNV_FP_SCALE_MASK
  57491. CNVC_CFG2_FCNV_FP_SCALE_BIAS__FCNV_FP_SCALE__SHIFT
  57492. CNVC_CFG2_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B_MASK
  57493. CNVC_CFG2_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B__SHIFT
  57494. CNVC_CFG2_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G_MASK
  57495. CNVC_CFG2_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G__SHIFT
  57496. CNVC_CFG2_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R_MASK
  57497. CNVC_CFG2_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R__SHIFT
  57498. CNVC_CFG2_FORMAT_CONTROL__ALPHA_EN_MASK
  57499. CNVC_CFG2_FORMAT_CONTROL__ALPHA_EN__SHIFT
  57500. CNVC_CFG2_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK
  57501. CNVC_CFG2_FORMAT_CONTROL__CLAMP_POSITIVE_C__SHIFT
  57502. CNVC_CFG2_FORMAT_CONTROL__CLAMP_POSITIVE_MASK
  57503. CNVC_CFG2_FORMAT_CONTROL__CLAMP_POSITIVE__SHIFT
  57504. CNVC_CFG2_FORMAT_CONTROL__CNVC_BYPASS_MASK
  57505. CNVC_CFG2_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN_MASK
  57506. CNVC_CFG2_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN__SHIFT
  57507. CNVC_CFG2_FORMAT_CONTROL__CNVC_BYPASS__SHIFT
  57508. CNVC_CFG2_FORMAT_CONTROL__CNVC_UPDATE_PENDING_MASK
  57509. CNVC_CFG2_FORMAT_CONTROL__CNVC_UPDATE_PENDING__SHIFT
  57510. CNVC_CFG2_FORMAT_CONTROL__FORMAT_CNV16_MASK
  57511. CNVC_CFG2_FORMAT_CONTROL__FORMAT_CNV16__SHIFT
  57512. CNVC_CFG2_FORMAT_CONTROL__FORMAT_EXPANSION_MODE_MASK
  57513. CNVC_CFG2_FORMAT_CONTROL__FORMAT_EXPANSION_MODE__SHIFT
  57514. CNVC_CFG2_FORMAT_CONTROL__OUTPUT_FP_MASK
  57515. CNVC_CFG2_FORMAT_CONTROL__OUTPUT_FP__SHIFT
  57516. CNVC_CFG3_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0_MASK
  57517. CNVC_CFG3_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0__SHIFT
  57518. CNVC_CFG3_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1_MASK
  57519. CNVC_CFG3_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1__SHIFT
  57520. CNVC_CFG3_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2_MASK
  57521. CNVC_CFG3_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2__SHIFT
  57522. CNVC_CFG3_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3_MASK
  57523. CNVC_CFG3_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3__SHIFT
  57524. CNVC_CFG3_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT_MASK
  57525. CNVC_CFG3_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT__SHIFT
  57526. CNVC_CFG3_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH_MASK
  57527. CNVC_CFG3_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH__SHIFT
  57528. CNVC_CFG3_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW_MASK
  57529. CNVC_CFG3_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW__SHIFT
  57530. CNVC_CFG3_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH_MASK
  57531. CNVC_CFG3_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH__SHIFT
  57532. CNVC_CFG3_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW_MASK
  57533. CNVC_CFG3_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW__SHIFT
  57534. CNVC_CFG3_COLOR_KEYER_CONTROL__COLOR_KEYER_EN_MASK
  57535. CNVC_CFG3_COLOR_KEYER_CONTROL__COLOR_KEYER_EN__SHIFT
  57536. CNVC_CFG3_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE_MASK
  57537. CNVC_CFG3_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE__SHIFT
  57538. CNVC_CFG3_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH_MASK
  57539. CNVC_CFG3_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH__SHIFT
  57540. CNVC_CFG3_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW_MASK
  57541. CNVC_CFG3_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW__SHIFT
  57542. CNVC_CFG3_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH_MASK
  57543. CNVC_CFG3_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH__SHIFT
  57544. CNVC_CFG3_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW_MASK
  57545. CNVC_CFG3_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW__SHIFT
  57546. CNVC_CFG3_DENORM_CONTROL__CLAMP_POSITIVE_MASK
  57547. CNVC_CFG3_DENORM_CONTROL__CLAMP_POSITIVE__SHIFT
  57548. CNVC_CFG3_DENORM_CONTROL__DENORM_BIAS_MASK
  57549. CNVC_CFG3_DENORM_CONTROL__DENORM_BIAS__SHIFT
  57550. CNVC_CFG3_DENORM_CONTROL__DENORM_SCALE_MASK
  57551. CNVC_CFG3_DENORM_CONTROL__DENORM_SCALE__SHIFT
  57552. CNVC_CFG3_DENORM_CONTROL__DENORM_TRUNCATE_MASK
  57553. CNVC_CFG3_DENORM_CONTROL__DENORM_TRUNCATE__SHIFT
  57554. CNVC_CFG3_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B_MASK
  57555. CNVC_CFG3_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B__SHIFT
  57556. CNVC_CFG3_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G_MASK
  57557. CNVC_CFG3_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G__SHIFT
  57558. CNVC_CFG3_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R_MASK
  57559. CNVC_CFG3_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R__SHIFT
  57560. CNVC_CFG3_FCNV_FP_SCALE_BIAS__FCNV_FP_BIAS_MASK
  57561. CNVC_CFG3_FCNV_FP_SCALE_BIAS__FCNV_FP_BIAS__SHIFT
  57562. CNVC_CFG3_FCNV_FP_SCALE_BIAS__FCNV_FP_SCALE_MASK
  57563. CNVC_CFG3_FCNV_FP_SCALE_BIAS__FCNV_FP_SCALE__SHIFT
  57564. CNVC_CFG3_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B_MASK
  57565. CNVC_CFG3_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B__SHIFT
  57566. CNVC_CFG3_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G_MASK
  57567. CNVC_CFG3_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G__SHIFT
  57568. CNVC_CFG3_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R_MASK
  57569. CNVC_CFG3_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R__SHIFT
  57570. CNVC_CFG3_FORMAT_CONTROL__ALPHA_EN_MASK
  57571. CNVC_CFG3_FORMAT_CONTROL__ALPHA_EN__SHIFT
  57572. CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK
  57573. CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_C__SHIFT
  57574. CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_MASK
  57575. CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE__SHIFT
  57576. CNVC_CFG3_FORMAT_CONTROL__CNVC_BYPASS_MASK
  57577. CNVC_CFG3_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN_MASK
  57578. CNVC_CFG3_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN__SHIFT
  57579. CNVC_CFG3_FORMAT_CONTROL__CNVC_BYPASS__SHIFT
  57580. CNVC_CFG3_FORMAT_CONTROL__CNVC_UPDATE_PENDING_MASK
  57581. CNVC_CFG3_FORMAT_CONTROL__CNVC_UPDATE_PENDING__SHIFT
  57582. CNVC_CFG3_FORMAT_CONTROL__FORMAT_CNV16_MASK
  57583. CNVC_CFG3_FORMAT_CONTROL__FORMAT_CNV16__SHIFT
  57584. CNVC_CFG3_FORMAT_CONTROL__FORMAT_EXPANSION_MODE_MASK
  57585. CNVC_CFG3_FORMAT_CONTROL__FORMAT_EXPANSION_MODE__SHIFT
  57586. CNVC_CFG3_FORMAT_CONTROL__OUTPUT_FP_MASK
  57587. CNVC_CFG3_FORMAT_CONTROL__OUTPUT_FP__SHIFT
  57588. CNVC_CFG4_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0_MASK
  57589. CNVC_CFG4_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0__SHIFT
  57590. CNVC_CFG4_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1_MASK
  57591. CNVC_CFG4_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1__SHIFT
  57592. CNVC_CFG4_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2_MASK
  57593. CNVC_CFG4_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2__SHIFT
  57594. CNVC_CFG4_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3_MASK
  57595. CNVC_CFG4_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3__SHIFT
  57596. CNVC_CFG4_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT_MASK
  57597. CNVC_CFG4_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT__SHIFT
  57598. CNVC_CFG4_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH_MASK
  57599. CNVC_CFG4_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH__SHIFT
  57600. CNVC_CFG4_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW_MASK
  57601. CNVC_CFG4_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW__SHIFT
  57602. CNVC_CFG4_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH_MASK
  57603. CNVC_CFG4_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH__SHIFT
  57604. CNVC_CFG4_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW_MASK
  57605. CNVC_CFG4_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW__SHIFT
  57606. CNVC_CFG4_COLOR_KEYER_CONTROL__COLOR_KEYER_EN_MASK
  57607. CNVC_CFG4_COLOR_KEYER_CONTROL__COLOR_KEYER_EN__SHIFT
  57608. CNVC_CFG4_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE_MASK
  57609. CNVC_CFG4_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE__SHIFT
  57610. CNVC_CFG4_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH_MASK
  57611. CNVC_CFG4_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH__SHIFT
  57612. CNVC_CFG4_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW_MASK
  57613. CNVC_CFG4_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW__SHIFT
  57614. CNVC_CFG4_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH_MASK
  57615. CNVC_CFG4_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH__SHIFT
  57616. CNVC_CFG4_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW_MASK
  57617. CNVC_CFG4_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW__SHIFT
  57618. CNVC_CFG4_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B_MASK
  57619. CNVC_CFG4_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B__SHIFT
  57620. CNVC_CFG4_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G_MASK
  57621. CNVC_CFG4_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G__SHIFT
  57622. CNVC_CFG4_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R_MASK
  57623. CNVC_CFG4_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R__SHIFT
  57624. CNVC_CFG4_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B_MASK
  57625. CNVC_CFG4_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B__SHIFT
  57626. CNVC_CFG4_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G_MASK
  57627. CNVC_CFG4_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G__SHIFT
  57628. CNVC_CFG4_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R_MASK
  57629. CNVC_CFG4_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R__SHIFT
  57630. CNVC_CFG4_FORMAT_CONTROL__ALPHA_EN_MASK
  57631. CNVC_CFG4_FORMAT_CONTROL__ALPHA_EN__SHIFT
  57632. CNVC_CFG4_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK
  57633. CNVC_CFG4_FORMAT_CONTROL__CLAMP_POSITIVE_C__SHIFT
  57634. CNVC_CFG4_FORMAT_CONTROL__CLAMP_POSITIVE_MASK
  57635. CNVC_CFG4_FORMAT_CONTROL__CLAMP_POSITIVE__SHIFT
  57636. CNVC_CFG4_FORMAT_CONTROL__CNVC_BYPASS_MASK
  57637. CNVC_CFG4_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN_MASK
  57638. CNVC_CFG4_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN__SHIFT
  57639. CNVC_CFG4_FORMAT_CONTROL__CNVC_BYPASS__SHIFT
  57640. CNVC_CFG4_FORMAT_CONTROL__CNVC_UPDATE_PENDING_MASK
  57641. CNVC_CFG4_FORMAT_CONTROL__CNVC_UPDATE_PENDING__SHIFT
  57642. CNVC_CFG4_FORMAT_CONTROL__FORMAT_CNV16_MASK
  57643. CNVC_CFG4_FORMAT_CONTROL__FORMAT_CNV16__SHIFT
  57644. CNVC_CFG4_FORMAT_CONTROL__FORMAT_EXPANSION_MODE_MASK
  57645. CNVC_CFG4_FORMAT_CONTROL__FORMAT_EXPANSION_MODE__SHIFT
  57646. CNVC_CFG5_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0_MASK
  57647. CNVC_CFG5_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT0__SHIFT
  57648. CNVC_CFG5_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1_MASK
  57649. CNVC_CFG5_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT1__SHIFT
  57650. CNVC_CFG5_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2_MASK
  57651. CNVC_CFG5_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT2__SHIFT
  57652. CNVC_CFG5_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3_MASK
  57653. CNVC_CFG5_ALPHA_2BIT_LUT__ALPHA_2BIT_LUT3__SHIFT
  57654. CNVC_CFG5_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT_MASK
  57655. CNVC_CFG5_CNVC_SURFACE_PIXEL_FORMAT__CNVC_SURFACE_PIXEL_FORMAT__SHIFT
  57656. CNVC_CFG5_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH_MASK
  57657. CNVC_CFG5_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_HIGH__SHIFT
  57658. CNVC_CFG5_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW_MASK
  57659. CNVC_CFG5_COLOR_KEYER_ALPHA__COLOR_KEYER_ALPHA_LOW__SHIFT
  57660. CNVC_CFG5_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH_MASK
  57661. CNVC_CFG5_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_HIGH__SHIFT
  57662. CNVC_CFG5_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW_MASK
  57663. CNVC_CFG5_COLOR_KEYER_BLUE__COLOR_KEYER_BLUE_LOW__SHIFT
  57664. CNVC_CFG5_COLOR_KEYER_CONTROL__COLOR_KEYER_EN_MASK
  57665. CNVC_CFG5_COLOR_KEYER_CONTROL__COLOR_KEYER_EN__SHIFT
  57666. CNVC_CFG5_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE_MASK
  57667. CNVC_CFG5_COLOR_KEYER_CONTROL__COLOR_KEYER_MODE__SHIFT
  57668. CNVC_CFG5_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH_MASK
  57669. CNVC_CFG5_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_HIGH__SHIFT
  57670. CNVC_CFG5_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW_MASK
  57671. CNVC_CFG5_COLOR_KEYER_GREEN__COLOR_KEYER_GREEN_LOW__SHIFT
  57672. CNVC_CFG5_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH_MASK
  57673. CNVC_CFG5_COLOR_KEYER_RED__COLOR_KEYER_RED_HIGH__SHIFT
  57674. CNVC_CFG5_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW_MASK
  57675. CNVC_CFG5_COLOR_KEYER_RED__COLOR_KEYER_RED_LOW__SHIFT
  57676. CNVC_CFG5_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B_MASK
  57677. CNVC_CFG5_FCNV_FP_BIAS_B__FCNV_FP_BIAS_B__SHIFT
  57678. CNVC_CFG5_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G_MASK
  57679. CNVC_CFG5_FCNV_FP_BIAS_G__FCNV_FP_BIAS_G__SHIFT
  57680. CNVC_CFG5_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R_MASK
  57681. CNVC_CFG5_FCNV_FP_BIAS_R__FCNV_FP_BIAS_R__SHIFT
  57682. CNVC_CFG5_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B_MASK
  57683. CNVC_CFG5_FCNV_FP_SCALE_B__FCNV_FP_SCALE_B__SHIFT
  57684. CNVC_CFG5_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G_MASK
  57685. CNVC_CFG5_FCNV_FP_SCALE_G__FCNV_FP_SCALE_G__SHIFT
  57686. CNVC_CFG5_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R_MASK
  57687. CNVC_CFG5_FCNV_FP_SCALE_R__FCNV_FP_SCALE_R__SHIFT
  57688. CNVC_CFG5_FORMAT_CONTROL__ALPHA_EN_MASK
  57689. CNVC_CFG5_FORMAT_CONTROL__ALPHA_EN__SHIFT
  57690. CNVC_CFG5_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK
  57691. CNVC_CFG5_FORMAT_CONTROL__CLAMP_POSITIVE_C__SHIFT
  57692. CNVC_CFG5_FORMAT_CONTROL__CLAMP_POSITIVE_MASK
  57693. CNVC_CFG5_FORMAT_CONTROL__CLAMP_POSITIVE__SHIFT
  57694. CNVC_CFG5_FORMAT_CONTROL__CNVC_BYPASS_MASK
  57695. CNVC_CFG5_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN_MASK
  57696. CNVC_CFG5_FORMAT_CONTROL__CNVC_BYPASS_MSB_ALIGN__SHIFT
  57697. CNVC_CFG5_FORMAT_CONTROL__CNVC_BYPASS__SHIFT
  57698. CNVC_CFG5_FORMAT_CONTROL__CNVC_UPDATE_PENDING_MASK
  57699. CNVC_CFG5_FORMAT_CONTROL__CNVC_UPDATE_PENDING__SHIFT
  57700. CNVC_CFG5_FORMAT_CONTROL__FORMAT_CNV16_MASK
  57701. CNVC_CFG5_FORMAT_CONTROL__FORMAT_CNV16__SHIFT
  57702. CNVC_CFG5_FORMAT_CONTROL__FORMAT_EXPANSION_MODE_MASK
  57703. CNVC_CFG5_FORMAT_CONTROL__FORMAT_EXPANSION_MODE__SHIFT
  57704. CNVC_CUR0_CURSOR0_COLOR0__CUR0_COLOR0_MASK
  57705. CNVC_CUR0_CURSOR0_COLOR0__CUR0_COLOR0__SHIFT
  57706. CNVC_CUR0_CURSOR0_COLOR1__CUR0_COLOR1_MASK
  57707. CNVC_CUR0_CURSOR0_COLOR1__CUR0_COLOR1__SHIFT
  57708. CNVC_CUR0_CURSOR0_CONTROL__CUR0_ENABLE_MASK
  57709. CNVC_CUR0_CURSOR0_CONTROL__CUR0_ENABLE__SHIFT
  57710. CNVC_CUR0_CURSOR0_CONTROL__CUR0_EXPANSION_MODE_MASK
  57711. CNVC_CUR0_CURSOR0_CONTROL__CUR0_EXPANSION_MODE__SHIFT
  57712. CNVC_CUR0_CURSOR0_CONTROL__CUR0_INVERT_MODE_MASK
  57713. CNVC_CUR0_CURSOR0_CONTROL__CUR0_INVERT_MODE__SHIFT
  57714. CNVC_CUR0_CURSOR0_CONTROL__CUR0_MAX_MASK
  57715. CNVC_CUR0_CURSOR0_CONTROL__CUR0_MAX__SHIFT
  57716. CNVC_CUR0_CURSOR0_CONTROL__CUR0_MIN_MASK
  57717. CNVC_CUR0_CURSOR0_CONTROL__CUR0_MIN__SHIFT
  57718. CNVC_CUR0_CURSOR0_CONTROL__CUR0_MODE_MASK
  57719. CNVC_CUR0_CURSOR0_CONTROL__CUR0_MODE__SHIFT
  57720. CNVC_CUR0_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN_MASK
  57721. CNVC_CUR0_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN__SHIFT
  57722. CNVC_CUR0_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK
  57723. CNVC_CUR0_CURSOR0_CONTROL__CUR0_PIX_INV_MODE__SHIFT
  57724. CNVC_CUR0_CURSOR0_CONTROL__CUR0_ROM_EN_MASK
  57725. CNVC_CUR0_CURSOR0_CONTROL__CUR0_ROM_EN__SHIFT
  57726. CNVC_CUR0_CURSOR0_CONTROL__CUR0_UPDATE_PENDING_MASK
  57727. CNVC_CUR0_CURSOR0_CONTROL__CUR0_UPDATE_PENDING__SHIFT
  57728. CNVC_CUR0_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS_MASK
  57729. CNVC_CUR0_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS__SHIFT
  57730. CNVC_CUR0_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE_MASK
  57731. CNVC_CUR0_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE__SHIFT
  57732. CNVC_CUR1_CURSOR0_COLOR0__CUR0_COLOR0_MASK
  57733. CNVC_CUR1_CURSOR0_COLOR0__CUR0_COLOR0__SHIFT
  57734. CNVC_CUR1_CURSOR0_COLOR1__CUR0_COLOR1_MASK
  57735. CNVC_CUR1_CURSOR0_COLOR1__CUR0_COLOR1__SHIFT
  57736. CNVC_CUR1_CURSOR0_CONTROL__CUR0_ENABLE_MASK
  57737. CNVC_CUR1_CURSOR0_CONTROL__CUR0_ENABLE__SHIFT
  57738. CNVC_CUR1_CURSOR0_CONTROL__CUR0_EXPANSION_MODE_MASK
  57739. CNVC_CUR1_CURSOR0_CONTROL__CUR0_EXPANSION_MODE__SHIFT
  57740. CNVC_CUR1_CURSOR0_CONTROL__CUR0_INVERT_MODE_MASK
  57741. CNVC_CUR1_CURSOR0_CONTROL__CUR0_INVERT_MODE__SHIFT
  57742. CNVC_CUR1_CURSOR0_CONTROL__CUR0_MAX_MASK
  57743. CNVC_CUR1_CURSOR0_CONTROL__CUR0_MAX__SHIFT
  57744. CNVC_CUR1_CURSOR0_CONTROL__CUR0_MIN_MASK
  57745. CNVC_CUR1_CURSOR0_CONTROL__CUR0_MIN__SHIFT
  57746. CNVC_CUR1_CURSOR0_CONTROL__CUR0_MODE_MASK
  57747. CNVC_CUR1_CURSOR0_CONTROL__CUR0_MODE__SHIFT
  57748. CNVC_CUR1_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN_MASK
  57749. CNVC_CUR1_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN__SHIFT
  57750. CNVC_CUR1_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK
  57751. CNVC_CUR1_CURSOR0_CONTROL__CUR0_PIX_INV_MODE__SHIFT
  57752. CNVC_CUR1_CURSOR0_CONTROL__CUR0_ROM_EN_MASK
  57753. CNVC_CUR1_CURSOR0_CONTROL__CUR0_ROM_EN__SHIFT
  57754. CNVC_CUR1_CURSOR0_CONTROL__CUR0_UPDATE_PENDING_MASK
  57755. CNVC_CUR1_CURSOR0_CONTROL__CUR0_UPDATE_PENDING__SHIFT
  57756. CNVC_CUR1_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS_MASK
  57757. CNVC_CUR1_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS__SHIFT
  57758. CNVC_CUR1_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE_MASK
  57759. CNVC_CUR1_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE__SHIFT
  57760. CNVC_CUR2_CURSOR0_COLOR0__CUR0_COLOR0_MASK
  57761. CNVC_CUR2_CURSOR0_COLOR0__CUR0_COLOR0__SHIFT
  57762. CNVC_CUR2_CURSOR0_COLOR1__CUR0_COLOR1_MASK
  57763. CNVC_CUR2_CURSOR0_COLOR1__CUR0_COLOR1__SHIFT
  57764. CNVC_CUR2_CURSOR0_CONTROL__CUR0_ENABLE_MASK
  57765. CNVC_CUR2_CURSOR0_CONTROL__CUR0_ENABLE__SHIFT
  57766. CNVC_CUR2_CURSOR0_CONTROL__CUR0_EXPANSION_MODE_MASK
  57767. CNVC_CUR2_CURSOR0_CONTROL__CUR0_EXPANSION_MODE__SHIFT
  57768. CNVC_CUR2_CURSOR0_CONTROL__CUR0_INVERT_MODE_MASK
  57769. CNVC_CUR2_CURSOR0_CONTROL__CUR0_INVERT_MODE__SHIFT
  57770. CNVC_CUR2_CURSOR0_CONTROL__CUR0_MAX_MASK
  57771. CNVC_CUR2_CURSOR0_CONTROL__CUR0_MAX__SHIFT
  57772. CNVC_CUR2_CURSOR0_CONTROL__CUR0_MIN_MASK
  57773. CNVC_CUR2_CURSOR0_CONTROL__CUR0_MIN__SHIFT
  57774. CNVC_CUR2_CURSOR0_CONTROL__CUR0_MODE_MASK
  57775. CNVC_CUR2_CURSOR0_CONTROL__CUR0_MODE__SHIFT
  57776. CNVC_CUR2_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN_MASK
  57777. CNVC_CUR2_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN__SHIFT
  57778. CNVC_CUR2_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK
  57779. CNVC_CUR2_CURSOR0_CONTROL__CUR0_PIX_INV_MODE__SHIFT
  57780. CNVC_CUR2_CURSOR0_CONTROL__CUR0_ROM_EN_MASK
  57781. CNVC_CUR2_CURSOR0_CONTROL__CUR0_ROM_EN__SHIFT
  57782. CNVC_CUR2_CURSOR0_CONTROL__CUR0_UPDATE_PENDING_MASK
  57783. CNVC_CUR2_CURSOR0_CONTROL__CUR0_UPDATE_PENDING__SHIFT
  57784. CNVC_CUR2_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS_MASK
  57785. CNVC_CUR2_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS__SHIFT
  57786. CNVC_CUR2_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE_MASK
  57787. CNVC_CUR2_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE__SHIFT
  57788. CNVC_CUR3_CURSOR0_COLOR0__CUR0_COLOR0_MASK
  57789. CNVC_CUR3_CURSOR0_COLOR0__CUR0_COLOR0__SHIFT
  57790. CNVC_CUR3_CURSOR0_COLOR1__CUR0_COLOR1_MASK
  57791. CNVC_CUR3_CURSOR0_COLOR1__CUR0_COLOR1__SHIFT
  57792. CNVC_CUR3_CURSOR0_CONTROL__CUR0_ENABLE_MASK
  57793. CNVC_CUR3_CURSOR0_CONTROL__CUR0_ENABLE__SHIFT
  57794. CNVC_CUR3_CURSOR0_CONTROL__CUR0_EXPANSION_MODE_MASK
  57795. CNVC_CUR3_CURSOR0_CONTROL__CUR0_EXPANSION_MODE__SHIFT
  57796. CNVC_CUR3_CURSOR0_CONTROL__CUR0_INVERT_MODE_MASK
  57797. CNVC_CUR3_CURSOR0_CONTROL__CUR0_INVERT_MODE__SHIFT
  57798. CNVC_CUR3_CURSOR0_CONTROL__CUR0_MAX_MASK
  57799. CNVC_CUR3_CURSOR0_CONTROL__CUR0_MAX__SHIFT
  57800. CNVC_CUR3_CURSOR0_CONTROL__CUR0_MIN_MASK
  57801. CNVC_CUR3_CURSOR0_CONTROL__CUR0_MIN__SHIFT
  57802. CNVC_CUR3_CURSOR0_CONTROL__CUR0_MODE_MASK
  57803. CNVC_CUR3_CURSOR0_CONTROL__CUR0_MODE__SHIFT
  57804. CNVC_CUR3_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN_MASK
  57805. CNVC_CUR3_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN__SHIFT
  57806. CNVC_CUR3_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK
  57807. CNVC_CUR3_CURSOR0_CONTROL__CUR0_PIX_INV_MODE__SHIFT
  57808. CNVC_CUR3_CURSOR0_CONTROL__CUR0_ROM_EN_MASK
  57809. CNVC_CUR3_CURSOR0_CONTROL__CUR0_ROM_EN__SHIFT
  57810. CNVC_CUR3_CURSOR0_CONTROL__CUR0_UPDATE_PENDING_MASK
  57811. CNVC_CUR3_CURSOR0_CONTROL__CUR0_UPDATE_PENDING__SHIFT
  57812. CNVC_CUR3_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS_MASK
  57813. CNVC_CUR3_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS__SHIFT
  57814. CNVC_CUR3_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE_MASK
  57815. CNVC_CUR3_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE__SHIFT
  57816. CNVC_CUR4_CURSOR0_COLOR0__CUR0_COLOR0_MASK
  57817. CNVC_CUR4_CURSOR0_COLOR0__CUR0_COLOR0__SHIFT
  57818. CNVC_CUR4_CURSOR0_COLOR1__CUR0_COLOR1_MASK
  57819. CNVC_CUR4_CURSOR0_COLOR1__CUR0_COLOR1__SHIFT
  57820. CNVC_CUR4_CURSOR0_CONTROL__CUR0_ENABLE_MASK
  57821. CNVC_CUR4_CURSOR0_CONTROL__CUR0_ENABLE__SHIFT
  57822. CNVC_CUR4_CURSOR0_CONTROL__CUR0_EXPANSION_MODE_MASK
  57823. CNVC_CUR4_CURSOR0_CONTROL__CUR0_EXPANSION_MODE__SHIFT
  57824. CNVC_CUR4_CURSOR0_CONTROL__CUR0_MODE_MASK
  57825. CNVC_CUR4_CURSOR0_CONTROL__CUR0_MODE__SHIFT
  57826. CNVC_CUR4_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN_MASK
  57827. CNVC_CUR4_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN__SHIFT
  57828. CNVC_CUR4_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK
  57829. CNVC_CUR4_CURSOR0_CONTROL__CUR0_PIX_INV_MODE__SHIFT
  57830. CNVC_CUR4_CURSOR0_CONTROL__CUR0_ROM_EN_MASK
  57831. CNVC_CUR4_CURSOR0_CONTROL__CUR0_ROM_EN__SHIFT
  57832. CNVC_CUR4_CURSOR0_CONTROL__CUR0_UPDATE_PENDING_MASK
  57833. CNVC_CUR4_CURSOR0_CONTROL__CUR0_UPDATE_PENDING__SHIFT
  57834. CNVC_CUR4_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS_MASK
  57835. CNVC_CUR4_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS__SHIFT
  57836. CNVC_CUR4_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE_MASK
  57837. CNVC_CUR4_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE__SHIFT
  57838. CNVC_CUR5_CURSOR0_COLOR0__CUR0_COLOR0_MASK
  57839. CNVC_CUR5_CURSOR0_COLOR0__CUR0_COLOR0__SHIFT
  57840. CNVC_CUR5_CURSOR0_COLOR1__CUR0_COLOR1_MASK
  57841. CNVC_CUR5_CURSOR0_COLOR1__CUR0_COLOR1__SHIFT
  57842. CNVC_CUR5_CURSOR0_CONTROL__CUR0_ENABLE_MASK
  57843. CNVC_CUR5_CURSOR0_CONTROL__CUR0_ENABLE__SHIFT
  57844. CNVC_CUR5_CURSOR0_CONTROL__CUR0_EXPANSION_MODE_MASK
  57845. CNVC_CUR5_CURSOR0_CONTROL__CUR0_EXPANSION_MODE__SHIFT
  57846. CNVC_CUR5_CURSOR0_CONTROL__CUR0_MODE_MASK
  57847. CNVC_CUR5_CURSOR0_CONTROL__CUR0_MODE__SHIFT
  57848. CNVC_CUR5_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN_MASK
  57849. CNVC_CUR5_CURSOR0_CONTROL__CUR0_PIXEL_ALPHA_MOD_EN__SHIFT
  57850. CNVC_CUR5_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK
  57851. CNVC_CUR5_CURSOR0_CONTROL__CUR0_PIX_INV_MODE__SHIFT
  57852. CNVC_CUR5_CURSOR0_CONTROL__CUR0_ROM_EN_MASK
  57853. CNVC_CUR5_CURSOR0_CONTROL__CUR0_ROM_EN__SHIFT
  57854. CNVC_CUR5_CURSOR0_CONTROL__CUR0_UPDATE_PENDING_MASK
  57855. CNVC_CUR5_CURSOR0_CONTROL__CUR0_UPDATE_PENDING__SHIFT
  57856. CNVC_CUR5_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS_MASK
  57857. CNVC_CUR5_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS__SHIFT
  57858. CNVC_CUR5_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE_MASK
  57859. CNVC_CUR5_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE__SHIFT
  57860. CNVC_DIS
  57861. CNVC_EN
  57862. CNVC_ENABLE
  57863. CNVC_NOT_PENDING
  57864. CNVC_PENDING
  57865. CNVC_ROUND
  57866. CNVC_TRUNCATE
  57867. CNVC_YES_PENDING
  57868. CNVI_AUX_MISC_CHIP
  57869. CNVR_AUX_MISC_CHIP
  57870. CNVR_SCU_SD_REGS_SD_REG_ACTIVE_VDIG_MIRROR
  57871. CNVR_SCU_SD_REGS_SD_REG_DIG_DCDC_VTRIM
  57872. CNVT_TOHW
  57873. CNV_CSC_BYPASS_ENUM
  57874. CNV_CSC_BYPASS_NEG
  57875. CNV_CSC_BYPASS_POS
  57876. CNV_CSC_C11_C12__CNV_CSC_C11_MASK
  57877. CNV_CSC_C11_C12__CNV_CSC_C11__SHIFT
  57878. CNV_CSC_C11_C12__CNV_CSC_C12_MASK
  57879. CNV_CSC_C11_C12__CNV_CSC_C12__SHIFT
  57880. CNV_CSC_C13_C14__CNV_CSC_C13_MASK
  57881. CNV_CSC_C13_C14__CNV_CSC_C13__SHIFT
  57882. CNV_CSC_C13_C14__CNV_CSC_C14_MASK
  57883. CNV_CSC_C13_C14__CNV_CSC_C14__SHIFT
  57884. CNV_CSC_C21_C22__CNV_CSC_C21_MASK
  57885. CNV_CSC_C21_C22__CNV_CSC_C21__SHIFT
  57886. CNV_CSC_C21_C22__CNV_CSC_C22_MASK
  57887. CNV_CSC_C21_C22__CNV_CSC_C22__SHIFT
  57888. CNV_CSC_C23_C24__CNV_CSC_C23_MASK
  57889. CNV_CSC_C23_C24__CNV_CSC_C23__SHIFT
  57890. CNV_CSC_C23_C24__CNV_CSC_C24_MASK
  57891. CNV_CSC_C23_C24__CNV_CSC_C24__SHIFT
  57892. CNV_CSC_C31_C32__CNV_CSC_C31_MASK
  57893. CNV_CSC_C31_C32__CNV_CSC_C31__SHIFT
  57894. CNV_CSC_C31_C32__CNV_CSC_C32_MASK
  57895. CNV_CSC_C31_C32__CNV_CSC_C32__SHIFT
  57896. CNV_CSC_C33_C34__CNV_CSC_C33_MASK
  57897. CNV_CSC_C33_C34__CNV_CSC_C33__SHIFT
  57898. CNV_CSC_C33_C34__CNV_CSC_C34_MASK
  57899. CNV_CSC_C33_C34__CNV_CSC_C34__SHIFT
  57900. CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_LOWER_B_MASK
  57901. CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_LOWER_B__SHIFT
  57902. CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_UPPER_B_MASK
  57903. CNV_CSC_CLAMP_B__CNV_CSC_CLAMP_UPPER_B__SHIFT
  57904. CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_LOWER_G_MASK
  57905. CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_LOWER_G__SHIFT
  57906. CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_UPPER_G_MASK
  57907. CNV_CSC_CLAMP_G__CNV_CSC_CLAMP_UPPER_G__SHIFT
  57908. CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_LOWER_R_MASK
  57909. CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_LOWER_R__SHIFT
  57910. CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_UPPER_R_MASK
  57911. CNV_CSC_CLAMP_R__CNV_CSC_CLAMP_UPPER_R__SHIFT
  57912. CNV_CSC_CONTROL__CNV_CSC_BYPASS_MASK
  57913. CNV_CSC_CONTROL__CNV_CSC_BYPASS__SHIFT
  57914. CNV_CSC_CONTROL__CNV_CSC_bypass_MASK
  57915. CNV_CSC_CONTROL__CNV_CSC_bypass__SHIFT
  57916. CNV_CSC_ROUND_OFFSET_B__CNV_CSC_ROUND_OFFSET_B_MASK
  57917. CNV_CSC_ROUND_OFFSET_B__CNV_CSC_ROUND_OFFSET_B__SHIFT
  57918. CNV_CSC_ROUND_OFFSET_G__CNV_CSC_ROUND_OFFSET_G_MASK
  57919. CNV_CSC_ROUND_OFFSET_G__CNV_CSC_ROUND_OFFSET_G__SHIFT
  57920. CNV_CSC_ROUND_OFFSET_R__CNV_CSC_ROUND_OFFSET_R_MASK
  57921. CNV_CSC_ROUND_OFFSET_R__CNV_CSC_ROUND_OFFSET_R__SHIFT
  57922. CNV_EYE_SELECT
  57923. CNV_FRAME_CAPTURE_DISABLE
  57924. CNV_FRAME_CAPTURE_ENABLE
  57925. CNV_FRAME_CAPTURE_EN_ENUM
  57926. CNV_FRAME_CAPTURE_RATE_0
  57927. CNV_FRAME_CAPTURE_RATE_1
  57928. CNV_FRAME_CAPTURE_RATE_2
  57929. CNV_FRAME_CAPTURE_RATE_3
  57930. CNV_FRAME_CAPTURE_RATE_ENUM
  57931. CNV_INPUT_SELECT__CNV_INPUT_PIPE_SELECT_MASK
  57932. CNV_INPUT_SELECT__CNV_INPUT_PIPE_SELECT__SHIFT
  57933. CNV_INPUT_SELECT__CNV_INPUT_SRC_SELECT_MASK
  57934. CNV_INPUT_SELECT__CNV_INPUT_SRC_SELECT__SHIFT
  57935. CNV_INTERLACED_FIELD_ORDER_BOT
  57936. CNV_INTERLACED_FIELD_ORDER_ENUM
  57937. CNV_INTERLACED_FIELD_ORDER_TOP
  57938. CNV_INTERLACED_MODE_ENUM
  57939. CNV_INTERLACED_MODE_INTERLACED
  57940. CNV_INTERLACED_MODE_PROGRESSIVE
  57941. CNV_MODE__CNV_EYE_SELECTION_MASK
  57942. CNV_MODE__CNV_EYE_SELECTION__SHIFT
  57943. CNV_MODE__CNV_FRAME_CAPTURE_EN_CURRENT_MASK
  57944. CNV_MODE__CNV_FRAME_CAPTURE_EN_CURRENT__SHIFT
  57945. CNV_MODE__CNV_FRAME_CAPTURE_EN_MASK
  57946. CNV_MODE__CNV_FRAME_CAPTURE_EN__SHIFT
  57947. CNV_MODE__CNV_FRAME_CAPTURE_RATE_MASK
  57948. CNV_MODE__CNV_FRAME_CAPTURE_RATE__SHIFT
  57949. CNV_MODE__CNV_FRAME_COUNT_MASK
  57950. CNV_MODE__CNV_FRAME_COUNT__SHIFT
  57951. CNV_MODE__CNV_FRAME_EN_MASK
  57952. CNV_MODE__CNV_FRAME_EN__SHIFT
  57953. CNV_MODE__CNV_INPUT_PIPE_SELECT_MASK
  57954. CNV_MODE__CNV_INPUT_PIPE_SELECT__SHIFT
  57955. CNV_MODE__CNV_INPUT_SRC_SELECT_MASK
  57956. CNV_MODE__CNV_INPUT_SRC_SELECT__SHIFT
  57957. CNV_MODE__CNV_INTERLACED_FIELD_ORDER_MASK
  57958. CNV_MODE__CNV_INTERLACED_FIELD_ORDER__SHIFT
  57959. CNV_MODE__CNV_INTERLACED_MODE_MASK
  57960. CNV_MODE__CNV_INTERLACED_MODE__SHIFT
  57961. CNV_MODE__CNV_NEW_CONTENT_MASK
  57962. CNV_MODE__CNV_NEW_CONTENT__SHIFT
  57963. CNV_MODE__CNV_OUT_BPC_MASK
  57964. CNV_MODE__CNV_OUT_BPC__SHIFT
  57965. CNV_MODE__CNV_STEREO_EYE_ORDER_MASK
  57966. CNV_MODE__CNV_STEREO_EYE_ORDER__SHIFT
  57967. CNV_MODE__CNV_STEREO_POLARITY_MASK
  57968. CNV_MODE__CNV_STEREO_POLARITY__SHIFT
  57969. CNV_MODE__CNV_STEREO_SPLIT_MASK
  57970. CNV_MODE__CNV_STEREO_SPLIT__SHIFT
  57971. CNV_MODE__CNV_STEREO_TYPE_MASK
  57972. CNV_MODE__CNV_STEREO_TYPE__SHIFT
  57973. CNV_MODE__CNV_WINDOW_CROP_EN_MASK
  57974. CNV_MODE__CNV_WINDOW_CROP_EN__SHIFT
  57975. CNV_MODE__CNV_WINDOW_EN_MASK
  57976. CNV_MODE__CNV_WINDOW_EN__SHIFT
  57977. CNV_NEW_CONTENT_ENUM
  57978. CNV_NEW_CONTENT_NEG
  57979. CNV_NEW_CONTENT_POS
  57980. CNV_OUT_BPC_10BPC
  57981. CNV_OUT_BPC_8BPC
  57982. CNV_OUT_BPC_ENUM
  57983. CNV_SOURCE_SIZE__CNV_SOURCE_HEIGHT_MASK
  57984. CNV_SOURCE_SIZE__CNV_SOURCE_HEIGHT__SHIFT
  57985. CNV_SOURCE_SIZE__CNV_SOURCE_WIDTH_MASK
  57986. CNV_SOURCE_SIZE__CNV_SOURCE_WIDTH__SHIFT
  57987. CNV_STEREO_POLARITY_ENUM
  57988. CNV_STEREO_POLARITY_LEFT
  57989. CNV_STEREO_POLARITY_RIGHT
  57990. CNV_STEREO_SPLIT_DISABLE
  57991. CNV_STEREO_SPLIT_ENABLE
  57992. CNV_STEREO_SPLIT_ENUM
  57993. CNV_STEREO_TYPE_ENUM
  57994. CNV_STEREO_TYPE_FRAME_SEQUENTIAL
  57995. CNV_STEREO_TYPE_RESERVED0
  57996. CNV_STEREO_TYPE_RESERVED1
  57997. CNV_STEREO_TYPE_RESERVED2
  57998. CNV_TEST_CNTL__CNV_TEST_CRC_CONT_EN_MASK
  57999. CNV_TEST_CNTL__CNV_TEST_CRC_CONT_EN__SHIFT
  58000. CNV_TEST_CNTL__CNV_TEST_CRC_DE_ONLY_MASK
  58001. CNV_TEST_CNTL__CNV_TEST_CRC_DE_ONLY__SHIFT
  58002. CNV_TEST_CNTL__CNV_TEST_CRC_EN_MASK
  58003. CNV_TEST_CNTL__CNV_TEST_CRC_EN__SHIFT
  58004. CNV_TEST_CRC_BLUE__CNV_TEST_CRC_BLUE_MASK_MASK
  58005. CNV_TEST_CRC_BLUE__CNV_TEST_CRC_BLUE_MASK__SHIFT
  58006. CNV_TEST_CRC_BLUE__CNV_TEST_CRC_SIG_BLUE_MASK
  58007. CNV_TEST_CRC_BLUE__CNV_TEST_CRC_SIG_BLUE__SHIFT
  58008. CNV_TEST_CRC_CONT_DISABLE
  58009. CNV_TEST_CRC_CONT_ENABLE
  58010. CNV_TEST_CRC_CONT_EN_ENUM
  58011. CNV_TEST_CRC_DISABLE
  58012. CNV_TEST_CRC_ENABLE
  58013. CNV_TEST_CRC_EN_ENUM
  58014. CNV_TEST_CRC_GREEN__CNV_TEST_CRC_GREEN_MASK_MASK
  58015. CNV_TEST_CRC_GREEN__CNV_TEST_CRC_GREEN_MASK__SHIFT
  58016. CNV_TEST_CRC_GREEN__CNV_TEST_CRC_SIG_GREEN_MASK
  58017. CNV_TEST_CRC_GREEN__CNV_TEST_CRC_SIG_GREEN__SHIFT
  58018. CNV_TEST_CRC_RED__CNV_TEST_CRC_RED_MASK_MASK
  58019. CNV_TEST_CRC_RED__CNV_TEST_CRC_RED_MASK__SHIFT
  58020. CNV_TEST_CRC_RED__CNV_TEST_CRC_SIG_RED_MASK
  58021. CNV_TEST_CRC_RED__CNV_TEST_CRC_SIG_RED__SHIFT
  58022. CNV_TEST_DEBUG_DATA__CNV_TEST_DEBUG_DATA_MASK
  58023. CNV_TEST_DEBUG_DATA__CNV_TEST_DEBUG_DATA__SHIFT
  58024. CNV_TEST_DEBUG_INDEX__CNV_TEST_DEBUG_INDEX_MASK
  58025. CNV_TEST_DEBUG_INDEX__CNV_TEST_DEBUG_INDEX__SHIFT
  58026. CNV_TEST_DEBUG_INDEX__CNV_TEST_DEBUG_WRITE_EN_MASK
  58027. CNV_TEST_DEBUG_INDEX__CNV_TEST_DEBUG_WRITE_EN__SHIFT
  58028. CNV_UPDATE_LOCK
  58029. CNV_UPDATE_LOCK_ENUM
  58030. CNV_UPDATE_PENDING_ENUM
  58031. CNV_UPDATE_PENDING_NEG
  58032. CNV_UPDATE_PENDING_POS
  58033. CNV_UPDATE_UNLOCK
  58034. CNV_UPDATE__CNV_UPDATE_LOCK_MASK
  58035. CNV_UPDATE__CNV_UPDATE_LOCK__SHIFT
  58036. CNV_UPDATE__CNV_UPDATE_PENDING_MASK
  58037. CNV_UPDATE__CNV_UPDATE_PENDING__SHIFT
  58038. CNV_UPDATE__CNV_UPDATE_TAKEN_MASK
  58039. CNV_UPDATE__CNV_UPDATE_TAKEN__SHIFT
  58040. CNV_WINDOW_CROP_DISABLE
  58041. CNV_WINDOW_CROP_ENABLE
  58042. CNV_WINDOW_CROP_EN_ENUM
  58043. CNV_WINDOW_SIZE__CNV_WINDOW_HEIGHT_MASK
  58044. CNV_WINDOW_SIZE__CNV_WINDOW_HEIGHT__SHIFT
  58045. CNV_WINDOW_SIZE__CNV_WINDOW_WIDTH_MASK
  58046. CNV_WINDOW_SIZE__CNV_WINDOW_WIDTH__SHIFT
  58047. CNV_WINDOW_START__CNV_WINDOW_START_X_MASK
  58048. CNV_WINDOW_START__CNV_WINDOW_START_X__SHIFT
  58049. CNV_WINDOW_START__CNV_WINDOW_START_Y_MASK
  58050. CNV_WINDOW_START__CNV_WINDOW_START_Y__SHIFT
  58051. CNXTLADDR
  58052. CNXT_OK
  58053. CNXX_SLI_SCRATCH1
  58054. CN_ABORT_REQ_BUF
  58055. CN_ABORT_RPL_BUF
  58056. CN_BUF
  58057. CN_CBQ_NAMELEN
  58058. CN_CLOSE_CON_REQ_BUF
  58059. CN_DESTROY_BUF
  58060. CN_DST_IDX
  58061. CN_DST_VAL
  58062. CN_FLOWC_BUF
  58063. CN_IDX_BB
  58064. CN_IDX_CIFS
  58065. CN_IDX_DM
  58066. CN_IDX_DRBD
  58067. CN_IDX_PROC
  58068. CN_IDX_V86D
  58069. CN_KVP_IDX
  58070. CN_KVP_VAL
  58071. CN_MAX_CON_BUF
  58072. CN_NETLINK_USERS
  58073. CN_PROC_H
  58074. CN_PROC_MSG_SIZE
  58075. CN_TAG_BIT
  58076. CN_TEST_IDX
  58077. CN_TEST_VAL
  58078. CN_VAL_CIFS
  58079. CN_VAL_DM_USERSPACE_LOG
  58080. CN_VAL_DRBD
  58081. CN_VAL_PROC
  58082. CN_VAL_V86D_UVESAFB
  58083. CN_VSS_IDX
  58084. CN_VSS_VAL
  58085. CN_W1_IDX
  58086. CN_W1_VAL
  58087. CO
  58088. COALESCE_HIGH
  58089. COALESCE_OPERATION
  58090. COALESCE_PACKET_TYPE
  58091. COALESCE_SLOW
  58092. COALESCE_SUPER
  58093. COALESCING_TIMESET_TIMESET_MASK
  58094. COALESCING_TIMESET_TIMESET_SHIFT
  58095. COALESCING_TIMESET_VALID_MASK
  58096. COALESCING_TIMESET_VALID_SHIFT
  58097. COALINDEX
  58098. COAL_CLOCKS_PER_USEC
  58099. COAL_EN
  58100. COAL_REG_BASE
  58101. COARSETUNE_TIME
  58102. COARSE_INTEGRATION_TIME_HI
  58103. COARSE_INTEGRATION_TIME_LO
  58104. COARSE_TUNE_REG
  58105. COAX_OUT
  58106. COBALT_AUDIO_IN_STREAM
  58107. COBALT_AUDIO_OUT_STREAM
  58108. COBALT_BRD_ID_QUBE1
  58109. COBALT_BRD_ID_QUBE2
  58110. COBALT_BRD_ID_RAQ1
  58111. COBALT_BRD_ID_RAQ2
  58112. COBALT_BUS_BAR1_BASE
  58113. COBALT_BUS_CPLD_BASE
  58114. COBALT_BUS_FLASH_BASE
  58115. COBALT_BUS_SRAM_BASE
  58116. COBALT_BYTES_PER_PIXEL_RGB24
  58117. COBALT_BYTES_PER_PIXEL_RGB32
  58118. COBALT_BYTES_PER_PIXEL_YUYV
  58119. COBALT_CLK
  58120. COBALT_CPLD_H
  58121. COBALT_CVI
  58122. COBALT_CVI_CLK_LOSS
  58123. COBALT_CVI_EVCNT
  58124. COBALT_CVI_FREEWHEEL
  58125. COBALT_CVI_PACKER
  58126. COBALT_CVI_VMR
  58127. COBALT_DRIVER_H
  58128. COBALT_FLASH_H
  58129. COBALT_HDL_INFO_BASE
  58130. COBALT_HDL_INFO_SIZE
  58131. COBALT_HDL_SEARCH_STR
  58132. COBALT_HSMA_IN_NODE
  58133. COBALT_HSMA_OUT_NODE
  58134. COBALT_I2C_0_BASE
  58135. COBALT_I2C_1_BASE
  58136. COBALT_I2C_2_BASE
  58137. COBALT_I2C_3_BASE
  58138. COBALT_I2C_HSMA_BASE
  58139. COBALT_MAX_BPP
  58140. COBALT_MAX_FRAMESZ
  58141. COBALT_MAX_HEIGHT
  58142. COBALT_MAX_WIDTH
  58143. COBALT_NUM_ADAPTERS
  58144. COBALT_NUM_INPUTS
  58145. COBALT_NUM_NODES
  58146. COBALT_NUM_STREAMS
  58147. COBALT_OMNITEK_H
  58148. COBALT_PCICONF_CPU
  58149. COBALT_PCICONF_ETH0
  58150. COBALT_PCICONF_ETH1
  58151. COBALT_PCICONF_PCISLOT
  58152. COBALT_PCICONF_RAQSCSI
  58153. COBALT_PCICONF_VIA
  58154. COBALT_STREAM_FL_ADV_IRQ
  58155. COBALT_STREAM_FL_DMA_IRQ
  58156. COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK
  58157. COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK
  58158. COBALT_SYSSTAT_AUD_PLL_LOCKED_MSK
  58159. COBALT_SYSSTAT_DIP0_MSK
  58160. COBALT_SYSSTAT_DIP1_MSK
  58161. COBALT_SYSSTAT_FLASH_RDYBSYN_MSK
  58162. COBALT_SYSSTAT_HSMA_PRSNTN_MSK
  58163. COBALT_SYSSTAT_PCIE_SMBCLK_MSK
  58164. COBALT_SYSSTAT_VI0_5V_MSK
  58165. COBALT_SYSSTAT_VI0_INT1_MSK
  58166. COBALT_SYSSTAT_VI0_INT2_MSK
  58167. COBALT_SYSSTAT_VI0_LOST_DATA_MSK
  58168. COBALT_SYSSTAT_VI1_5V_MSK
  58169. COBALT_SYSSTAT_VI1_INT1_MSK
  58170. COBALT_SYSSTAT_VI1_INT2_MSK
  58171. COBALT_SYSSTAT_VI1_LOST_DATA_MSK
  58172. COBALT_SYSSTAT_VI2_5V_MSK
  58173. COBALT_SYSSTAT_VI2_INT1_MSK
  58174. COBALT_SYSSTAT_VI2_INT2_MSK
  58175. COBALT_SYSSTAT_VI2_LOST_DATA_MSK
  58176. COBALT_SYSSTAT_VI3_5V_MSK
  58177. COBALT_SYSSTAT_VI3_INT1_MSK
  58178. COBALT_SYSSTAT_VI3_INT2_MSK
  58179. COBALT_SYSSTAT_VI3_LOST_DATA_MSK
  58180. COBALT_SYSSTAT_VIHSMA_5V_MSK
  58181. COBALT_SYSSTAT_VIHSMA_INT1_MSK
  58182. COBALT_SYSSTAT_VIHSMA_INT2_MSK
  58183. COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK
  58184. COBALT_SYSSTAT_VOHSMA_INT1_MSK
  58185. COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK
  58186. COBALT_SYSSTAT_VOHSMA_PLL_LOCKED_MSK
  58187. COBALT_SYS_CTRL_AUDIO_IPP_RESETN_BIT
  58188. COBALT_SYS_CTRL_AUDIO_OPP_RESETN_BIT
  58189. COBALT_SYS_CTRL_BASE
  58190. COBALT_SYS_CTRL_HPD_TO_CONNECTOR_BIT
  58191. COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT
  58192. COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT
  58193. COBALT_SYS_CTRL_PWRDN0_TO_HSMA_TX_BIT
  58194. COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT
  58195. COBALT_SYS_CTRL_VIDEO_TX_RESETN_BIT
  58196. COBALT_SYS_STAT_BASE
  58197. COBALT_SYS_STAT_EDGE
  58198. COBALT_SYS_STAT_MASK
  58199. COBALT_TX_BASE
  58200. COBALT_VID_BASE
  58201. COBALT_VID_SIZE
  58202. COBRA_LENGTH
  58203. COBRA_MAX_STROBE
  58204. COCON0
  58205. COCON1
  58206. COCON2
  58207. COCON3
  58208. CODA7_CMD_ENC_SEQ_INTRA_QP
  58209. CODA7_CMD_ENC_SEQ_SEARCH_BASE
  58210. CODA7_CMD_ENC_SEQ_SEARCH_SIZE
  58211. CODA7_CMD_SET_FRAME_AXI_BIT_ADDR
  58212. CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR
  58213. CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR
  58214. CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR
  58215. CODA7_CMD_SET_FRAME_AXI_OVL_ADDR
  58216. CODA7_CMD_SET_FRAME_MAX_DEC_SIZE
  58217. CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE
  58218. CODA7_MODE_DECODE_DV3
  58219. CODA7_MODE_DECODE_H264
  58220. CODA7_MODE_DECODE_MJPG
  58221. CODA7_MODE_DECODE_MP2
  58222. CODA7_MODE_DECODE_MP4
  58223. CODA7_MODE_DECODE_RV
  58224. CODA7_MODE_DECODE_VC1
  58225. CODA7_MODE_ENCODE_H264
  58226. CODA7_MODE_ENCODE_MJPG
  58227. CODA7_MODE_ENCODE_MP4
  58228. CODA7_MP4_DEBLK_ENABLE
  58229. CODA7_OPTION_AVCINTRA16X16ONLY_OFFSET
  58230. CODA7_OPTION_GAMMA_OFFSET
  58231. CODA7_OPTION_RCQPMAX_OFFSET
  58232. CODA7_OPTION_RCQPMIN_OFFSET
  58233. CODA7_PICHEIGHT_MASK
  58234. CODA7_PICWIDTH_MASK
  58235. CODA7_PICWIDTH_OFFSET
  58236. CODA7_PIC_TYPE_H264_NPF_MASK
  58237. CODA7_PIC_TYPE_INTERLACED
  58238. CODA7_PS_BUF_SIZE
  58239. CODA7_REG_BIT_AXI_SRAM_USE
  58240. CODA7_REG_BIT_RUN_AUX_STD
  58241. CODA7_RET_DEC_SEQ_ASPECT
  58242. CODA7_RET_DEC_SEQ_HEADER_REPORT
  58243. CODA7_STREAM_BUF_DYNALLOC_EN
  58244. CODA7_STREAM_BUF_PIC_FLUSH
  58245. CODA7_STREAM_BUF_PIC_RESET
  58246. CODA7_STREAM_SEL_64BITS_ENDIAN
  58247. CODA7_USE_BIT_ENABLE
  58248. CODA7_USE_DBK_ENABLE
  58249. CODA7_USE_HOST_BIT_ENABLE
  58250. CODA7_USE_HOST_DBK_ENABLE
  58251. CODA7_USE_HOST_IP_ENABLE
  58252. CODA7_USE_HOST_ME_ENABLE
  58253. CODA7_USE_HOST_OVL_ENABLE
  58254. CODA7_USE_IP_ENABLE
  58255. CODA7_USE_ME_ENABLE
  58256. CODA7_USE_OVL_ENABLE
  58257. CODA9_CACHE_BYPASS_OFFSET
  58258. CODA9_CACHE_CB_BUFFER_SIZE_OFFSET
  58259. CODA9_CACHE_CR_BUFFER_SIZE_OFFSET
  58260. CODA9_CACHE_DUALCONF_OFFSET
  58261. CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET
  58262. CODA9_CACHE_PAGEMERGE_OFFSET
  58263. CODA9_CMD_DEC_PIC_ROT_ADDR_CB
  58264. CODA9_CMD_DEC_PIC_ROT_ADDR_CR
  58265. CODA9_CMD_DEC_PIC_ROT_ADDR_Y
  58266. CODA9_CMD_DEC_PIC_ROT_INDEX
  58267. CODA9_CMD_DEC_PIC_ROT_STRIDE
  58268. CODA9_CMD_ENC_HEADER_FRAME_CROP_H
  58269. CODA9_CMD_ENC_HEADER_FRAME_CROP_V
  58270. CODA9_CMD_ENC_PIC_SRC_ADDR_CB
  58271. CODA9_CMD_ENC_PIC_SRC_ADDR_CR
  58272. CODA9_CMD_ENC_PIC_SRC_ADDR_Y
  58273. CODA9_CMD_ENC_PIC_SRC_INDEX
  58274. CODA9_CMD_ENC_PIC_SRC_STRIDE
  58275. CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC
  58276. CODA9_CMD_ENC_SEQ_INTRA_WEIGHT
  58277. CODA9_CMD_ENC_SEQ_ME_OPTION
  58278. CODA9_CMD_FIRMWARE_CODE_REV
  58279. CODA9_CMD_SET_FRAME_AXI_BTP_ADDR
  58280. CODA9_CMD_SET_FRAME_CACHE_CONFIG
  58281. CODA9_CMD_SET_FRAME_CACHE_SIZE
  58282. CODA9_CMD_SET_FRAME_DELAY
  58283. CODA9_CMD_SET_FRAME_DP_BUF_BASE
  58284. CODA9_CMD_SET_FRAME_DP_BUF_SIZE
  58285. CODA9_CMD_SET_FRAME_MAX_DEC_SIZE
  58286. CODA9_CMD_SET_FRAME_SUBSAMP_A
  58287. CODA9_CMD_SET_FRAME_SUBSAMP_A_MVC
  58288. CODA9_CMD_SET_FRAME_SUBSAMP_B
  58289. CODA9_CMD_SET_FRAME_SUBSAMP_B_MVC
  58290. CODA9_DEFAULT_GAMMA
  58291. CODA9_FRAME_ENABLE_BWB
  58292. CODA9_FRAME_TILED2LINEAR
  58293. CODA9_GDI_BUS_CTRL
  58294. CODA9_GDI_BUS_STATUS
  58295. CODA9_GDI_RBC2_AXI_0
  58296. CODA9_GDI_RBC2_AXI_1F
  58297. CODA9_GDI_TILEDBUF_BASE
  58298. CODA9_GDI_WPROT_ERR_CLR
  58299. CODA9_GDI_WPROT_RGN_EN
  58300. CODA9_GDI_XY2_BA_0
  58301. CODA9_GDI_XY2_BA_1
  58302. CODA9_GDI_XY2_BA_2
  58303. CODA9_GDI_XY2_BA_3
  58304. CODA9_GDI_XY2_CAS_0
  58305. CODA9_GDI_XY2_CAS_F
  58306. CODA9_GDI_XY2_RAS_0
  58307. CODA9_GDI_XY2_RAS_F
  58308. CODA9_GDI_XY2_RBC_CONFIG
  58309. CODA9_GDMA_BASE
  58310. CODA9_HEADER_FRAME_CROP
  58311. CODA9_MODE_DECODE_AVS
  58312. CODA9_MODE_DECODE_DV3
  58313. CODA9_MODE_DECODE_H264
  58314. CODA9_MODE_DECODE_MJPG
  58315. CODA9_MODE_DECODE_MP2
  58316. CODA9_MODE_DECODE_MP4
  58317. CODA9_MODE_DECODE_RV
  58318. CODA9_MODE_DECODE_VC1
  58319. CODA9_MODE_DECODE_VPX
  58320. CODA9_MODE_ENCODE_H264
  58321. CODA9_MODE_ENCODE_MJPG
  58322. CODA9_MODE_ENCODE_MP4
  58323. CODA9_OPTION_GAMMA_OFFSET
  58324. CODA9_OPTION_MVC_INTERVIEW_OFFSET
  58325. CODA9_OPTION_MVC_PARASET_REFRESH_OFFSET
  58326. CODA9_OPTION_MVC_PREFIX_NAL_OFFSET
  58327. CODA9_OPTION_RCQPMAX_OFFSET
  58328. CODA9_PIC_TYPE_FIRST_MASK
  58329. CODA9_PIC_TYPE_IDR_MASK
  58330. CODA9_PS_SAVE_SIZE
  58331. CODA9_REG_BIT_SW_RESET
  58332. CODA9_REG_BIT_SW_RESET_STATUS
  58333. CODA9_RET_DEC_PIC_ASPECT
  58334. CODA9_RET_DEC_PIC_FRATE_DR
  58335. CODA9_RET_DEC_PIC_FRATE_NR
  58336. CODA9_RET_DEC_PIC_VP8_PIC_REPORT
  58337. CODA9_RET_DEC_PIC_VP8_SCALE_INFO
  58338. CODA9_RET_DEC_SEQ_ASPECT
  58339. CODA9_RET_DEC_SEQ_BITRATE
  58340. CODA9_STD_H264
  58341. CODA9_STD_MPEG4
  58342. CODA9_SW_RESET_BPU_BUS
  58343. CODA9_SW_RESET_BPU_CORE
  58344. CODA9_SW_RESET_GDI_BUS
  58345. CODA9_SW_RESET_GDI_CORE
  58346. CODA9_SW_RESET_VCE_BUS
  58347. CODA9_SW_RESET_VCE_CORE
  58348. CODA9_USE_BTP_ENABLE
  58349. CODA9_USE_DBK_ENABLE
  58350. CODA9_USE_HOST_BIT_ENABLE
  58351. CODA9_USE_HOST_BTP_ENABLE
  58352. CODA9_USE_HOST_DBK_ENABLE
  58353. CODA9_USE_HOST_IP_ENABLE
  58354. CODA9_USE_HOST_OVL_ENABLE
  58355. CODA9_USE_OVL_ENABLE
  58356. CODA9_XY2RBC_CA_INC_HOR
  58357. CODA9_XY2RBC_SEPARATE_MAP
  58358. CODA9_XY2RBC_TILED_MAP
  58359. CODA9_XY2RBC_TOP_BOT_SPLIT
  58360. CODADX6_CMD_ENC_SEQ_FMO
  58361. CODADX6_CMD_ENC_SEQ_INTRA_QP
  58362. CODADX6_MAX_INSTANCES
  58363. CODADX6_MODE_DECODE_H264
  58364. CODADX6_MODE_DECODE_MP4
  58365. CODADX6_MODE_ENCODE_H264
  58366. CODADX6_MODE_ENCODE_MP4
  58367. CODADX6_OPTION_GAMMA_OFFSET
  58368. CODADX6_PICHEIGHT_MASK
  58369. CODADX6_PICWIDTH_MASK
  58370. CODADX6_PICWIDTH_OFFSET
  58371. CODADX6_QP_REPORT
  58372. CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR
  58373. CODADX6_STREAM_BUF_DYNALLOC_EN
  58374. CODADX6_STREAM_BUF_PIC_FLUSH
  58375. CODADX6_STREAM_BUF_PIC_RESET
  58376. CODADX6_STREAM_CHKDIS_OFFSET
  58377. CODA_263PARAM_ANNEXJENABLE_MASK
  58378. CODA_263PARAM_ANNEXJENABLE_OFFSET
  58379. CODA_263PARAM_ANNEXKENABLE_MASK
  58380. CODA_263PARAM_ANNEXKENABLE_OFFSET
  58381. CODA_263PARAM_ANNEXTENABLE_MASK
  58382. CODA_263PARAM_ANNEXTENABLE_OFFSET
  58383. CODA_264PARAM_CHROMAQPOFFSET_MASK
  58384. CODA_264PARAM_CHROMAQPOFFSET_OFFSET
  58385. CODA_264PARAM_CONSTRAINEDINTRAPREDFLAG_MASK
  58386. CODA_264PARAM_CONSTRAINEDINTRAPREDFLAG_OFFSET
  58387. CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK
  58388. CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET
  58389. CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK
  58390. CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET
  58391. CODA_264PARAM_DISABLEDEBLK_MASK
  58392. CODA_264PARAM_DISABLEDEBLK_OFFSET
  58393. CODA_7541
  58394. CODA_960
  58395. CODA_ACCESS
  58396. CODA_ACCESS_INTENT
  58397. CODA_ACCESS_TYPE_MMAP
  58398. CODA_ACCESS_TYPE_READ
  58399. CODA_ACCESS_TYPE_READ_FINISH
  58400. CODA_ACCESS_TYPE_WRITE
  58401. CODA_ACCESS_TYPE_WRITE_FINISH
  58402. CODA_BIT_DEC_SEQ_INIT_ESCAPE
  58403. CODA_BIT_STREAM_END_FLAG
  58404. CODA_CLOSE
  58405. CODA_CMD_DEC_PIC_BB_START
  58406. CODA_CMD_DEC_PIC_CHUNK_SIZE
  58407. CODA_CMD_DEC_PIC_OPTION
  58408. CODA_CMD_DEC_PIC_ROT_ADDR_CB
  58409. CODA_CMD_DEC_PIC_ROT_ADDR_CR
  58410. CODA_CMD_DEC_PIC_ROT_ADDR_Y
  58411. CODA_CMD_DEC_PIC_ROT_MODE
  58412. CODA_CMD_DEC_PIC_ROT_STRIDE
  58413. CODA_CMD_DEC_PIC_SKIP_NUM
  58414. CODA_CMD_DEC_PIC_START_BYTE
  58415. CODA_CMD_DEC_SEQ_BB_SIZE
  58416. CODA_CMD_DEC_SEQ_BB_START
  58417. CODA_CMD_DEC_SEQ_JPG_THUMB_EN
  58418. CODA_CMD_DEC_SEQ_MP4_ASP_CLASS
  58419. CODA_CMD_DEC_SEQ_OPTION
  58420. CODA_CMD_DEC_SEQ_PS_BB_SIZE
  58421. CODA_CMD_DEC_SEQ_PS_BB_START
  58422. CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE
  58423. CODA_CMD_DEC_SEQ_SRC_SIZE
  58424. CODA_CMD_DEC_SEQ_START_BYTE
  58425. CODA_CMD_DEC_SEQ_X264_MV_EN
  58426. CODA_CMD_ENC_HEADER_BB_SIZE
  58427. CODA_CMD_ENC_HEADER_BB_START
  58428. CODA_CMD_ENC_HEADER_CODE
  58429. CODA_CMD_ENC_PARAM_CHANGE_ENABLE
  58430. CODA_CMD_ENC_PARAM_HEC_MODE
  58431. CODA_CMD_ENC_PARAM_INTRA_MB_NUM
  58432. CODA_CMD_ENC_PARAM_RC_BITRATE
  58433. CODA_CMD_ENC_PARAM_RC_FRAME_RATE
  58434. CODA_CMD_ENC_PARAM_RC_GOP
  58435. CODA_CMD_ENC_PARAM_RC_INTRA_QP
  58436. CODA_CMD_ENC_PARAM_SLICE_MODE
  58437. CODA_CMD_ENC_PIC_BB_SIZE
  58438. CODA_CMD_ENC_PIC_BB_START
  58439. CODA_CMD_ENC_PIC_OPTION
  58440. CODA_CMD_ENC_PIC_QS
  58441. CODA_CMD_ENC_PIC_ROT_MODE
  58442. CODA_CMD_ENC_PIC_SRC_ADDR_CB
  58443. CODA_CMD_ENC_PIC_SRC_ADDR_CR
  58444. CODA_CMD_ENC_PIC_SRC_ADDR_Y
  58445. CODA_CMD_ENC_SEQ_263_PARA
  58446. CODA_CMD_ENC_SEQ_264_PARA
  58447. CODA_CMD_ENC_SEQ_BB_SIZE
  58448. CODA_CMD_ENC_SEQ_BB_START
  58449. CODA_CMD_ENC_SEQ_COD_STD
  58450. CODA_CMD_ENC_SEQ_GOP_SIZE
  58451. CODA_CMD_ENC_SEQ_INTRA_REFRESH
  58452. CODA_CMD_ENC_SEQ_JPG_PARA
  58453. CODA_CMD_ENC_SEQ_JPG_RST_INTERVAL
  58454. CODA_CMD_ENC_SEQ_JPG_THUMB_EN
  58455. CODA_CMD_ENC_SEQ_JPG_THUMB_OFFSET
  58456. CODA_CMD_ENC_SEQ_JPG_THUMB_SIZE
  58457. CODA_CMD_ENC_SEQ_MP4_PARA
  58458. CODA_CMD_ENC_SEQ_OPTION
  58459. CODA_CMD_ENC_SEQ_RC_BUF_SIZE
  58460. CODA_CMD_ENC_SEQ_RC_GAMMA
  58461. CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE
  58462. CODA_CMD_ENC_SEQ_RC_PARA
  58463. CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX
  58464. CODA_CMD_ENC_SEQ_SLICE_MODE
  58465. CODA_CMD_ENC_SEQ_SRC_F_RATE
  58466. CODA_CMD_ENC_SEQ_SRC_SIZE
  58467. CODA_CMD_FIRMWARE_VERNUM
  58468. CODA_CMD_SET_FRAME_BUF_NUM
  58469. CODA_CMD_SET_FRAME_BUF_STRIDE
  58470. CODA_CMD_SET_FRAME_SLICE_BB_SIZE
  58471. CODA_CMD_SET_FRAME_SLICE_BB_START
  58472. CODA_CODEC
  58473. CODA_COMMAND_DEC_BUF_FLUSH
  58474. CODA_COMMAND_DEC_PARA_SET
  58475. CODA_COMMAND_ENCODE_HEADER
  58476. CODA_COMMAND_ENC_PARA_SET
  58477. CODA_COMMAND_FIRMWARE_GET
  58478. CODA_COMMAND_PIC_RUN
  58479. CODA_COMMAND_RC_CHANGE_PARAMETER
  58480. CODA_COMMAND_SEQ_END
  58481. CODA_COMMAND_SEQ_INIT
  58482. CODA_COMMAND_SET_FRAME_BUF
  58483. CODA_CONTROL
  58484. CODA_CONTROLLEN
  58485. CODA_CREATE
  58486. CODA_DEFAULT_GAMMA
  58487. CODA_DOWN_ADDRESS_SET
  58488. CODA_DOWN_DATA_SET
  58489. CODA_DX6
  58490. CODA_EIO_ERROR
  58491. CODA_FIRMWARE_MAJOR
  58492. CODA_FIRMWARE_MINOR
  58493. CODA_FIRMWARE_PRODUCT
  58494. CODA_FIRMWARE_RELEASE
  58495. CODA_FIRMWARE_VERNUM
  58496. CODA_FLUSH
  58497. CODA_FMOPARAM_SLICENUM_MASK
  58498. CODA_FMOPARAM_SLICENUM_OFFSET
  58499. CODA_FMOPARAM_TYPE_MASK
  58500. CODA_FMOPARAM_TYPE_OFFSET
  58501. CODA_FORCE_IPICTURE
  58502. CODA_FRAME_CHROMA_INTERLEAVE
  58503. CODA_FRATE_DIV_MASK
  58504. CODA_FRATE_DIV_OFFSET
  58505. CODA_FRATE_RES_MASK
  58506. CODA_FRATE_RES_OFFSET
  58507. CODA_FSYNC
  58508. CODA_GAMMA_MASK
  58509. CODA_GAMMA_OFFSET
  58510. CODA_GETATTR
  58511. CODA_GOP_SIZE_MASK
  58512. CODA_GOP_SIZE_OFFSET
  58513. CODA_H264_AUX_AVC
  58514. CODA_H264_AUX_MVC
  58515. CODA_HEADER_H264_PPS
  58516. CODA_HEADER_H264_SPS
  58517. CODA_HEADER_MP4V_VIS
  58518. CODA_HEADER_MP4V_VOL
  58519. CODA_HEADER_MP4V_VOS
  58520. CODA_HX4
  58521. CODA_IFRAME_SEARCH_EN
  58522. CODA_IMAGE_ENDIAN_SELECT
  58523. CODA_IMX27
  58524. CODA_IMX51
  58525. CODA_IMX53
  58526. CODA_IMX6DL
  58527. CODA_IMX6Q
  58528. CODA_INDEX_SET
  58529. CODA_INST_DECODER
  58530. CODA_INST_ENCODER
  58531. CODA_INTERRUPTIBLE
  58532. CODA_INT_INTERRUPT_ENABLE
  58533. CODA_IOCTL
  58534. CODA_ISRAM_SIZE
  58535. CODA_KERNEL_VERSION
  58536. CODA_LINK
  58537. CODA_LOOKUP
  58538. CODA_MAGIC
  58539. CODA_MAXNAMLEN
  58540. CODA_MAXPATHLEN
  58541. CODA_MAXSYMLINK
  58542. CODA_MAXSYMLINKS
  58543. CODA_MAX_FORMATS
  58544. CODA_MAX_FRAMEBUFFERS
  58545. CODA_MIR_HOR
  58546. CODA_MIR_NONE
  58547. CODA_MIR_VER
  58548. CODA_MIR_VER_HOR
  58549. CODA_MKDIR
  58550. CODA_MODE_INVALID
  58551. CODA_MOUNT_VERSION
  58552. CODA_MP4PARAM_DATAPARTITIONENABLE_MASK
  58553. CODA_MP4PARAM_DATAPARTITIONENABLE_OFFSET
  58554. CODA_MP4PARAM_INTRADCVLCTHR_MASK
  58555. CODA_MP4PARAM_INTRADCVLCTHR_OFFSET
  58556. CODA_MP4PARAM_REVERSIBLEVLCENABLE_MASK
  58557. CODA_MP4PARAM_REVERSIBLEVLCENABLE_OFFSET
  58558. CODA_MP4PARAM_VERID_MASK
  58559. CODA_MP4PARAM_VERID_OFFSET
  58560. CODA_MP4_AUX_DIVX3
  58561. CODA_MP4_AUX_MPEG4
  58562. CODA_MP4_CLASS_MPEG4
  58563. CODA_NAME
  58564. CODA_NCALLS
  58565. CODA_NOCACHE
  58566. CODA_NO_INT_ENABLE
  58567. CODA_OPEN
  58568. CODA_OPEN_BY_FD
  58569. CODA_OPEN_BY_PATH
  58570. CODA_OPTION_AVC_AUD_OFFSET
  58571. CODA_OPTION_FMO_OFFSET
  58572. CODA_OPTION_LIMITQP_OFFSET
  58573. CODA_OPTION_RCINTRAQP_OFFSET
  58574. CODA_OPTION_SLICEREPORT_OFFSET
  58575. CODA_PARAM_CHANGE_HEC_MODE
  58576. CODA_PARAM_CHANGE_INTRA_MB_NUM
  58577. CODA_PARAM_CHANGE_RC_BITRATE
  58578. CODA_PARAM_CHANGE_RC_FRAME_RATE
  58579. CODA_PARAM_CHANGE_RC_GOP
  58580. CODA_PARAM_CHANGE_RC_INTRA_QP
  58581. CODA_PARAM_CHANGE_SLICE_MODE
  58582. CODA_PARA_BUF_SIZE
  58583. CODA_PICHEIGHT_OFFSET
  58584. CODA_PIC_TYPE_MASK
  58585. CODA_PIC_TYPE_MASK_VC1
  58586. CODA_PRE_SCAN_EN
  58587. CODA_PRE_SCAN_MODE_DECODE
  58588. CODA_PRE_SCAN_MODE_RETURN
  58589. CODA_PSDEV_MAJOR
  58590. CODA_PURGEFID
  58591. CODA_PURGEUSER
  58592. CODA_QPMAX_MASK
  58593. CODA_QPMAX_OFFSET
  58594. CODA_QPMIN_MASK
  58595. CODA_QPMIN_OFFSET
  58596. CODA_RATECONTROL_AUTOSKIP_MASK
  58597. CODA_RATECONTROL_AUTOSKIP_OFFSET
  58598. CODA_RATECONTROL_BITRATE_MASK
  58599. CODA_RATECONTROL_BITRATE_OFFSET
  58600. CODA_RATECONTROL_ENABLE_MASK
  58601. CODA_RATECONTROL_ENABLE_OFFSET
  58602. CODA_RATECONTROL_INITIALDELAY_MASK
  58603. CODA_RATECONTROL_INITIALDELAY_OFFSET
  58604. CODA_READLINK
  58605. CODA_REG_BIT_BIT_STREAM_PARAM
  58606. CODA_REG_BIT_BUSY
  58607. CODA_REG_BIT_BUSY_FLAG
  58608. CODA_REG_BIT_CODE_BUF_ADDR
  58609. CODA_REG_BIT_CODE_DOWN
  58610. CODA_REG_BIT_CODE_RESET
  58611. CODA_REG_BIT_CODE_RUN
  58612. CODA_REG_BIT_CUR_PC
  58613. CODA_REG_BIT_FRAME_MEM_CTRL
  58614. CODA_REG_BIT_FRM_DIS_FLG
  58615. CODA_REG_BIT_HOST_IN_REQ
  58616. CODA_REG_BIT_INT_CLEAR
  58617. CODA_REG_BIT_INT_CLEAR_SET
  58618. CODA_REG_BIT_INT_ENABLE
  58619. CODA_REG_BIT_INT_REASON
  58620. CODA_REG_BIT_INT_STATUS
  58621. CODA_REG_BIT_PARA_BUF_ADDR
  58622. CODA_REG_BIT_RD_PTR
  58623. CODA_REG_BIT_RUN_COD_STD
  58624. CODA_REG_BIT_RUN_COMMAND
  58625. CODA_REG_BIT_RUN_INDEX
  58626. CODA_REG_BIT_STREAM_CTRL
  58627. CODA_REG_BIT_TEMP_BUF_ADDR
  58628. CODA_REG_BIT_WORK_BUF_ADDR
  58629. CODA_REG_BIT_WR_PTR
  58630. CODA_REG_RESET_ENABLE
  58631. CODA_REG_RUN_ENABLE
  58632. CODA_REINTEGRATE
  58633. CODA_RELEASE
  58634. CODA_REMOVE
  58635. CODA_RENAME
  58636. CODA_REORDER_ENABLE
  58637. CODA_REPLACE
  58638. CODA_REPORT_MB_INFO
  58639. CODA_REPORT_MV_INFO
  58640. CODA_REPORT_SLICE_INFO
  58641. CODA_REQ_ABORT
  58642. CODA_REQ_ASYNC
  58643. CODA_REQ_READ
  58644. CODA_REQ_WRITE
  58645. CODA_RESOLVE
  58646. CODA_RET_DEC_PIC_CROP_LEFT_RIGHT
  58647. CODA_RET_DEC_PIC_CROP_TOP_BOTTOM
  58648. CODA_RET_DEC_PIC_CUR_IDX
  58649. CODA_RET_DEC_PIC_ERR_MB
  58650. CODA_RET_DEC_PIC_FRAME_IDX
  58651. CODA_RET_DEC_PIC_FRAME_NEED
  58652. CODA_RET_DEC_PIC_FRAME_NUM
  58653. CODA_RET_DEC_PIC_MVC_REPORT
  58654. CODA_RET_DEC_PIC_OPTION
  58655. CODA_RET_DEC_PIC_POST
  58656. CODA_RET_DEC_PIC_SIZE
  58657. CODA_RET_DEC_PIC_SUCCESS
  58658. CODA_RET_DEC_PIC_TYPE
  58659. CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT
  58660. CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM
  58661. CODA_RET_DEC_SEQ_ERR_REASON
  58662. CODA_RET_DEC_SEQ_FRAME_DELAY
  58663. CODA_RET_DEC_SEQ_FRAME_NEED
  58664. CODA_RET_DEC_SEQ_FRATE_DR
  58665. CODA_RET_DEC_SEQ_FRATE_NR
  58666. CODA_RET_DEC_SEQ_INFO
  58667. CODA_RET_DEC_SEQ_JPG_PARA
  58668. CODA_RET_DEC_SEQ_JPG_THUMB_IND
  58669. CODA_RET_DEC_SEQ_NEXT_FRAME_NUM
  58670. CODA_RET_DEC_SEQ_SRC_FMT
  58671. CODA_RET_DEC_SEQ_SRC_F_RATE
  58672. CODA_RET_DEC_SEQ_SRC_SIZE
  58673. CODA_RET_DEC_SEQ_SUCCESS
  58674. CODA_RET_ENC_FRAME_NUM
  58675. CODA_RET_ENC_PARAM_CHANGE_SUCCESS
  58676. CODA_RET_ENC_PIC_FLAG
  58677. CODA_RET_ENC_PIC_FRAME_IDX
  58678. CODA_RET_ENC_PIC_SLICE_NUM
  58679. CODA_RET_ENC_PIC_SUCCESS
  58680. CODA_RET_ENC_PIC_TYPE
  58681. CODA_RET_ENC_SEQ_SUCCESS
  58682. CODA_RMDIR
  58683. CODA_ROOT
  58684. CODA_ROT_0
  58685. CODA_ROT_180
  58686. CODA_ROT_270
  58687. CODA_ROT_90
  58688. CODA_ROT_MIR_ENABLE
  58689. CODA_SETATTR
  58690. CODA_SIGNAL
  58691. CODA_SKIP_FRAME_MODE
  58692. CODA_SLICING_MODE_MASK
  58693. CODA_SLICING_MODE_OFFSET
  58694. CODA_SLICING_SIZE_MASK
  58695. CODA_SLICING_SIZE_OFFSET
  58696. CODA_SLICING_UNIT_MASK
  58697. CODA_SLICING_UNIT_OFFSET
  58698. CODA_STATFS
  58699. CODA_STD_H263
  58700. CODA_STD_H264
  58701. CODA_STD_MPEG4
  58702. CODA_STORE
  58703. CODA_STREAM_ENDIAN_SELECT
  58704. CODA_SUPER_MAGIC
  58705. CODA_SYMLINK
  58706. CODA_VGET
  58707. CODA_VPX_AUX_THO
  58708. CODA_VPX_AUX_VP6
  58709. CODA_VPX_AUX_VP8
  58710. CODA_ZAPDIR
  58711. CODA_ZAPFILE
  58712. CODEC
  58713. CODECIN_SCB_ADDR
  58714. CODECOUT_SCB_ADDR
  58715. CODEC_5665
  58716. CODEC_5666
  58717. CODEC_ACTION_STORE
  58718. CODEC_ATTENUATION_LEFT
  58719. CODEC_ATTENUATION_RIGHT
  58720. CODEC_ATTR
  58721. CODEC_ATTR_STR
  58722. CODEC_BASE
  58723. CODEC_BUSY_B
  58724. CODEC_CHECK_BITS
  58725. CODEC_CLKIN_CLKDIV
  58726. CODEC_CLKIN_PLLDIV
  58727. CODEC_CLOCK
  58728. CODEC_COMMAND
  58729. CODEC_CONTROL_ADDRESS_SHIFT
  58730. CODEC_CONTROL_READ
  58731. CODEC_CONTROL_WORD_SHIFT
  58732. CODEC_DATA
  58733. CODEC_DIGCODEC_CLK_SRC
  58734. CODEC_DIR_IN
  58735. CODEC_FAKE
  58736. CODEC_FWHT_H
  58737. CODEC_GAIN_LEFT
  58738. CODEC_GAIN_RIGHT
  58739. CODEC_GPIO_BASE
  58740. CODEC_GPIO_IN
  58741. CODEC_GPIO_OUT
  58742. CODEC_HOT_PLUG_ENABLE
  58743. CODEC_I2S_MIC_BIT_CLK
  58744. CODEC_I2S_MIC_BIT_DIV_CLK
  58745. CODEC_I2S_MIC_DIV_CLK
  58746. CODEC_I2S_MIC_OSR_CLK
  58747. CODEC_I2S_MIC_OSR_SRC
  58748. CODEC_I2S_SPKR_BIT_CLK
  58749. CODEC_I2S_SPKR_BIT_DIV_CLK
  58750. CODEC_I2S_SPKR_DIV_CLK
  58751. CODEC_I2S_SPKR_OSR_CLK
  58752. CODEC_I2S_SPKR_OSR_SRC
  58753. CODEC_INFO_SHOW
  58754. CODEC_INFO_STORE
  58755. CODEC_INFO_STR_SHOW
  58756. CODEC_INFO_STR_STORE
  58757. CODEC_INPUT_BUF1
  58758. CODEC_IO
  58759. CODEC_MUTE_VAL
  58760. CODEC_OVERFLOW_LEFT
  58761. CODEC_OVERFLOW_RIGHT
  58762. CODEC_READ_B
  58763. CODEC_RESET
  58764. CODEC_SAA7111
  58765. CODEC_SAA7113
  58766. CODEC_SOURCE_ADC
  58767. CODEC_SOURCE_MATRIX
  58768. CODEC_STATUS
  58769. CODEC_SUCCESS
  58770. CODEC_TIMEOUT_AFTER_READ
  58771. CODEC_TIMEOUT_AFTER_WRITE
  58772. CODEC_TIMEOUT_ON_INIT
  58773. CODEC_TYPES
  58774. CODEC_TYPE_RT5645
  58775. CODEC_TYPE_RT5650
  58776. CODEC_V4L2_FWHT_H
  58777. CODEC_VER_0
  58778. CODEC_VER_1
  58779. CODEC_WAIT_AFTER_WRITE
  58780. CODEC_WEBCAM
  58781. CODELENS
  58782. CODEL_DISABLED_THRESHOLD
  58783. CODEL_SHIFT
  58784. CODEMERCS_MAGIC_NUMBER
  58785. CODES
  58786. CODEWORD_ALL_ERASED
  58787. CODEWORD_ERASED
  58788. CODE_ADD
  58789. CODE_APE_DIAG
  58790. CODE_APE_PATCH
  58791. CODE_ARP_BATCH
  58792. CODE_ASF1
  58793. CODE_ASF2
  58794. CODE_AS_IS
  58795. CODE_BONO_FW
  58796. CODE_BONO_PATCH
  58797. CODE_BOOT
  58798. CODE_CDAN_WE_CTX
  58799. CODE_CDAN_WE_EN
  58800. CODE_CHIMP_PATCH
  58801. CODE_DASH
  58802. CODE_DISC_OFFLOAD
  58803. CODE_DOWNLOAD
  58804. CODE_ENTRY_EXTENDED_DIR_IDX
  58805. CODE_ENTRY_MAX
  58806. CODE_GEN
  58807. CODE_HEADER
  58808. CODE_IMAGE_LENGTH_MASK
  58809. CODE_IMAGE_TYPE_EXTENDED_DIR
  58810. CODE_IMAGE_TYPE_MASK
  58811. CODE_IMAGE_VNTAG_PROFILES_DATA
  58812. CODE_KONG_FW
  58813. CODE_KONG_PATCH
  58814. CODE_LENGTH
  58815. CODE_MASK
  58816. CODE_MCTP_PASSTHRU
  58817. CODE_MDNS_SD_OFFLOAD
  58818. CODE_MUSTANG
  58819. CODE_OP_OUT_AUDIO_LEVEL
  58820. CODE_OP_OUT_STREAM1_LEVEL_CURVE
  58821. CODE_OP_OUT_STREAM2_LEVEL_CURVE
  58822. CODE_OP_OUT_STREAM_EXTRAPARAMETER
  58823. CODE_OP_OUT_STREAM_FORMAT
  58824. CODE_OP_OUT_STREAM_LEVEL
  58825. CODE_OP_PAUSE_STREAM
  58826. CODE_OP_PIPE_TIME
  58827. CODE_OP_START_STREAM
  58828. CODE_OP_STREAM_TIME
  58829. CODE_OP_UPDATE_R_BUFFERS
  58830. CODE_OR_TEMP
  58831. CODE_PASSTHRU
  58832. CODE_PM_OFFLOAD
  58833. CODE_PT_SEC
  58834. CODE_RAM_ADDR
  58835. CODE_RAM_CNT
  58836. CODE_RATE_1_2
  58837. CODE_RATE_2_3
  58838. CODE_RATE_3_4
  58839. CODE_RATE_5_6
  58840. CODE_RATE_7_8
  58841. CODE_RATE_UNKNOWN
  58842. CODE_SMASH
  58843. CODE_TANG_PATCH
  58844. CODE_TO_RAMP_US
  58845. CODE_TYPE_EFI
  58846. CODE_TYPE_OPEN
  58847. CODE_TYPE_PC
  58848. CODE_UMP
  58849. CODE_WRITE
  58850. CODING_AMI
  58851. CODING_AMI_ZCS
  58852. CODING_B8ZS
  58853. CODING_BITS
  58854. CODING_CMI
  58855. CODING_CMI_B8ZS
  58856. CODING_CMI_HDB3
  58857. CODING_COLS
  58858. CODING_HDB3
  58859. CODING_NRZ
  58860. COEFF
  58861. COEFF_CNT
  58862. COEFF_LIGHT_A
  58863. COEFF_LIGHT_B
  58864. COEFF_MAX
  58865. COEFF_NORM
  58866. COEFF_RAM_COEFF_COUNT
  58867. COEFF_RAM_CTL
  58868. COEFF_RAM_MAX_ADDR
  58869. COEFF_RAM_SIZE
  58870. COEFF_SIZE
  58871. COEFF_TEMP_A
  58872. COEFF_TEMP_B
  58873. COEF_ICSC
  58874. COEF_ICSC_B
  58875. COEF_RAM_SELECT_BACK
  58876. COEF_RAM_SELECT_CURRENT
  58877. COEF_RAM_SELECT_RD
  58878. COEF_SCALE_S
  58879. COEF_UPDATE_COMPLETE
  58880. COEF_UPDATE_NOT_COMPLETE
  58881. COEX_0
  58882. COEX_1
  58883. COEX_ALGO_A2DP
  58884. COEX_ALGO_A2DP_HID
  58885. COEX_ALGO_A2DP_PAN
  58886. COEX_ALGO_A2DP_PAN_HID
  58887. COEX_ALGO_HFP
  58888. COEX_ALGO_HID
  58889. COEX_ALGO_MAX
  58890. COEX_ALGO_NOPROFILE
  58891. COEX_ALGO_PAN
  58892. COEX_ALGO_PAN_HID
  58893. COEX_ASSOCIATED_IDLE
  58894. COEX_ASSOCIATED_IDLE_FLAGS
  58895. COEX_ASSOCIATE_5G_FINISH
  58896. COEX_ASSOCIATE_5G_START
  58897. COEX_ASSOCIATE_FINISH
  58898. COEX_ASSOCIATE_START
  58899. COEX_ASSOC_ACTIVE_LEVEL
  58900. COEX_ASSOC_ACTIVE_LEVEL_FLAGS
  58901. COEX_ASSOC_AUTO_SCAN
  58902. COEX_ASSOC_AUTO_SCAN_FLAGS
  58903. COEX_ASSOC_MANUAL_SCAN
  58904. COEX_ASSOC_MANUAL_SCAN_FLAGS
  58905. COEX_BTINFO_LENGTH_MAX
  58906. COEX_BTINFO_SRC_BT_ACT
  58907. COEX_BTINFO_SRC_BT_IQK
  58908. COEX_BTINFO_SRC_BT_RSP
  58909. COEX_BTINFO_SRC_BT_SCBD
  58910. COEX_BTINFO_SRC_MAX
  58911. COEX_BTINFO_SRC_WL_FW
  58912. COEX_BTRSSI_DBM
  58913. COEX_BTRSSI_MAX
  58914. COEX_BTRSSI_RATIO
  58915. COEX_BTSTATUS_ACL_BUSY
  58916. COEX_BTSTATUS_ACL_SCO_BUSY
  58917. COEX_BTSTATUS_CON_IDLE
  58918. COEX_BTSTATUS_INQ_PAGE
  58919. COEX_BTSTATUS_MAX
  58920. COEX_BTSTATUS_NCON_IDLE
  58921. COEX_BTSTATUS_SCO_BUSY
  58922. COEX_CALIBRATION
  58923. COEX_CALIBRATION_FLAGS
  58924. COEX_CFG0
  58925. COEX_CFG1
  58926. COEX_CFG2
  58927. COEX_CFG_ANT
  58928. COEX_CNT_BT_AFHUPDATE
  58929. COEX_CNT_BT_IGNWLANACT
  58930. COEX_CNT_BT_INFOUPDATE
  58931. COEX_CNT_BT_INQ
  58932. COEX_CNT_BT_IQK
  58933. COEX_CNT_BT_IQKFAIL
  58934. COEX_CNT_BT_MAX
  58935. COEX_CNT_BT_PAGE
  58936. COEX_CNT_BT_POPEVENT
  58937. COEX_CNT_BT_REENABLE
  58938. COEX_CNT_BT_REINIT
  58939. COEX_CNT_BT_RETRY
  58940. COEX_CNT_BT_ROLESWITCH
  58941. COEX_CNT_BT_SETUPLINK
  58942. COEX_CNT_WL_5MS_NOEXTEND
  58943. COEX_CNT_WL_COEXRUN
  58944. COEX_CNT_WL_CONNPKT
  58945. COEX_CNT_WL_FW_NOTIFY
  58946. COEX_CNT_WL_MAX
  58947. COEX_CNT_WL_NOISY0
  58948. COEX_CNT_WL_NOISY1
  58949. COEX_CNT_WL_NOISY2
  58950. COEX_CONNECTION_ESTAB
  58951. COEX_CONNECTION_ESTAB_FLAGS
  58952. COEX_CSETUP_ANT_SWITCH
  58953. COEX_CSETUP_COEXINFO_HW
  58954. COEX_CSETUP_GNT_DEBUG
  58955. COEX_CSETUP_GNT_FIX
  58956. COEX_CSETUP_INIT_HW
  58957. COEX_CSETUP_MAX
  58958. COEX_CSETUP_RFE_TYPE
  58959. COEX_CSETUP_WLAN_ACT_IPS
  58960. COEX_CSETUP_WL_RX_GAIN
  58961. COEX_CSETUP_WL_TX_POWER
  58962. COEX_CTT_BT_VS_LTE
  58963. COEX_CTT_WL_VS_LTE
  58964. COEX_CU_ASSOCIATED_IDLE_RP
  58965. COEX_CU_ASSOCIATED_IDLE_WP
  58966. COEX_CU_ASSOC_ACTIVE_LEVEL_RP
  58967. COEX_CU_ASSOC_ACTIVE_LEVEL_WP
  58968. COEX_CU_ASSOC_AUTO_SCAN_RP
  58969. COEX_CU_ASSOC_AUTO_SCAN_WP
  58970. COEX_CU_ASSOC_MANUAL_SCAN_RP
  58971. COEX_CU_ASSOC_MANUAL_SCAN_WP
  58972. COEX_CU_CALIBRATION_RP
  58973. COEX_CU_CALIBRATION_WP
  58974. COEX_CU_CONNECTION_ESTAB_RP
  58975. COEX_CU_CONNECTION_ESTAB_WP
  58976. COEX_CU_IPAN_ASSOC_LEVEL_RP
  58977. COEX_CU_IPAN_ASSOC_LEVEL_WP
  58978. COEX_CU_PERIODIC_CALIBRATION_RP
  58979. COEX_CU_PERIODIC_CALIBRATION_WP
  58980. COEX_CU_RF_OFF_RP
  58981. COEX_CU_RF_OFF_WP
  58982. COEX_CU_RF_ON_FLAGS
  58983. COEX_CU_RF_ON_RP
  58984. COEX_CU_RF_ON_WP
  58985. COEX_CU_RSRVD1_RP
  58986. COEX_CU_RSRVD1_WP
  58987. COEX_CU_RSRVD2_RP
  58988. COEX_CU_RSRVD2_WP
  58989. COEX_CU_STAND_ALONE_DEBUG_RP
  58990. COEX_CU_STAND_ALONE_DEBUG_WP
  58991. COEX_CU_UNASSOC_AUTO_SCAN_RP
  58992. COEX_CU_UNASSOC_AUTO_SCAN_WP
  58993. COEX_CU_UNASSOC_IDLE_RP
  58994. COEX_CU_UNASSOC_IDLE_WP
  58995. COEX_CU_UNASSOC_MANUAL_SCAN_RP
  58996. COEX_CU_UNASSOC_MANUAL_SCAN_WP
  58997. COEX_DM_8723B_1ANT
  58998. COEX_DM_8723B_2ANT
  58999. COEX_EVENT_CMD
  59000. COEX_EVENT_REQUEST_MSK
  59001. COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG
  59002. COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG
  59003. COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG
  59004. COEX_FLAGS_ASSOC_WA_UNMASK_MSK
  59005. COEX_FLAGS_COEX_ENABLE_MSK
  59006. COEX_FLAGS_STA_TABLE_VALID_MSK
  59007. COEX_FLAGS_UNASSOC_WA_UNMASK_MSK
  59008. COEX_GNT_SET_HW_PTA
  59009. COEX_GNT_SET_SW_HIGH
  59010. COEX_GNT_SET_SW_LOW
  59011. COEX_H2C69_TDMA_SLOT
  59012. COEX_H2C69_WL_LEAKAP
  59013. COEX_INDIRECT_1700
  59014. COEX_INDIRECT_7C0
  59015. COEX_INDIRECT_MAX
  59016. COEX_INFO_A2DP
  59017. COEX_INFO_ACL_BUSY
  59018. COEX_INFO_CONNECTION
  59019. COEX_INFO_FTP
  59020. COEX_INFO_HID
  59021. COEX_INFO_INQ_PAGE
  59022. COEX_INFO_SCO_BUSY
  59023. COEX_INFO_SCO_ESCO
  59024. COEX_IPAN_ASSOC_LEVEL
  59025. COEX_IPAN_ASSOC_LEVEL_FLAGS
  59026. COEX_IPS_ENTER
  59027. COEX_IPS_LEAVE
  59028. COEX_LPS_DISABLE
  59029. COEX_LPS_ENABLE
  59030. COEX_MEDIA_CONNECT
  59031. COEX_MEDIA_CONNECT_5G
  59032. COEX_MEDIA_DISCONNECT
  59033. COEX_MEDIUM_ACTIVE
  59034. COEX_MEDIUM_BUSY
  59035. COEX_MEDIUM_CHANGED
  59036. COEX_MEDIUM_CHANGED_MSK
  59037. COEX_MEDIUM_MSK
  59038. COEX_MEDIUM_NOTIFICATION
  59039. COEX_MEDIUM_PRE_RELEASE
  59040. COEX_MEDIUM_SHIFT
  59041. COEX_MIN_DELAY
  59042. COEX_NOT_SWITCH
  59043. COEX_NUM_OF_EVENTS
  59044. COEX_PERIODIC_CALIBRATION
  59045. COEX_PERIODIC_CALIBRATION_FLAGS
  59046. COEX_PRIORITY_TABLE_CMD
  59047. COEX_PSTDMA_FORCE_LPSOFF
  59048. COEX_PSTDMA_FORCE_LPSON
  59049. COEX_PSTDMA_MAX
  59050. COEX_PS_LPS_OFF
  59051. COEX_PS_LPS_ON
  59052. COEX_PS_WIFI_NATIVE
  59053. COEX_REQUEST_TIMEOUT
  59054. COEX_RESP_ACK_BY_WL_FW
  59055. COEX_RFK_TIMEOUT
  59056. COEX_RF_OFF
  59057. COEX_RF_OFF_FLAGS
  59058. COEX_RF_ON
  59059. COEX_RF_ON_FLAGS
  59060. COEX_RSN_2GCONFINISH
  59061. COEX_RSN_2GCONSTART
  59062. COEX_RSN_2GMEDIA
  59063. COEX_RSN_2GSCANSTART
  59064. COEX_RSN_2GSWITCHBAND
  59065. COEX_RSN_5GCONFINISH
  59066. COEX_RSN_5GCONSTART
  59067. COEX_RSN_5GMEDIA
  59068. COEX_RSN_5GSCANSTART
  59069. COEX_RSN_5GSWITCHBAND
  59070. COEX_RSN_BTINFO
  59071. COEX_RSN_LPS
  59072. COEX_RSN_MAX
  59073. COEX_RSN_MEDIADISCON
  59074. COEX_RSN_SCANFINISH
  59075. COEX_RSN_WLSTATUS
  59076. COEX_RSRVD1
  59077. COEX_RSRVD1_FLAGS
  59078. COEX_RSRVD2
  59079. COEX_RSRVD2_FLAGS
  59080. COEX_RSSI_HIGH
  59081. COEX_RSSI_LOW
  59082. COEX_RSSI_MEDIUM
  59083. COEX_RSSI_STATE_HIGH
  59084. COEX_RSSI_STATE_LOW
  59085. COEX_RSSI_STATE_MEDIUM
  59086. COEX_RSSI_STATE_STAY_HIGH
  59087. COEX_RSSI_STATE_STAY_LOW
  59088. COEX_RSSI_STATE_STAY_MEDIUM
  59089. COEX_RSSI_STEP
  59090. COEX_SCAN_FINISH
  59091. COEX_SCAN_START
  59092. COEX_SCAN_START_2G
  59093. COEX_SCAN_START_5G
  59094. COEX_SCBD_ACTIVE
  59095. COEX_SCBD_ALL
  59096. COEX_SCBD_BT_RFK
  59097. COEX_SCBD_EXTFEM
  59098. COEX_SCBD_FIX2M
  59099. COEX_SCBD_ONOFF
  59100. COEX_SCBD_RXGAIN
  59101. COEX_SCBD_SCAN
  59102. COEX_SCBD_TDMA
  59103. COEX_SCBD_UNDERTEST
  59104. COEX_SCBD_WLBUSY
  59105. COEX_SET_ANT_2G
  59106. COEX_SET_ANT_2G_FREERUN
  59107. COEX_SET_ANT_2G_WLBT
  59108. COEX_SET_ANT_5G
  59109. COEX_SET_ANT_INIT
  59110. COEX_SET_ANT_MAX
  59111. COEX_SET_ANT_POWERON
  59112. COEX_SET_ANT_WOFF
  59113. COEX_SET_ANT_WONLY
  59114. COEX_STAND_ALONE_DEBUG
  59115. COEX_STAND_ALONE_DEBUG_FLAGS
  59116. COEX_STA_8723B_1ANT
  59117. COEX_STA_8723B_2ANT
  59118. COEX_SWITCH_CTRL_BY_ANTDIV
  59119. COEX_SWITCH_CTRL_BY_BBSW
  59120. COEX_SWITCH_CTRL_BY_BT
  59121. COEX_SWITCH_CTRL_BY_FW
  59122. COEX_SWITCH_CTRL_BY_MAC
  59123. COEX_SWITCH_CTRL_BY_PTA
  59124. COEX_SWITCH_CTRL_MAX
  59125. COEX_SWITCH_TO_24G
  59126. COEX_SWITCH_TO_24G_NOFORSCAN
  59127. COEX_SWITCH_TO_5G
  59128. COEX_SWITCH_TO_BT
  59129. COEX_SWITCH_TO_MAX
  59130. COEX_SWITCH_TO_NOCARE
  59131. COEX_SWITCH_TO_WLA
  59132. COEX_SWITCH_TO_WLG
  59133. COEX_SWITCH_TO_WLG_BT
  59134. COEX_UNASSOC_AUTO_SCAN
  59135. COEX_UNASSOC_AUTO_SCAN_FLAGS
  59136. COEX_UNASSOC_IDLE
  59137. COEX_UNASSOC_IDLE_FLAGS
  59138. COEX_UNASSOC_MANUAL_SCAN
  59139. COEX_UNASSOC_MANUAL_SCAN_FLAGS
  59140. COEX_WLINK_2G1PORT
  59141. COEX_WLINK_5G
  59142. COEX_WLINK_MAX
  59143. COEX_WLPRI_MAX
  59144. COEX_WLPRI_RX_CCK
  59145. COEX_WLPRI_RX_OFDM
  59146. COEX_WLPRI_RX_RSP
  59147. COEX_WLPRI_TX_BEACON
  59148. COEX_WLPRI_TX_BEACONQ
  59149. COEX_WLPRI_TX_CCK
  59150. COEX_WLPRI_TX_OFDM
  59151. COEX_WLPRI_TX_RSP
  59152. COEX_WL_TPUT_MAX
  59153. COEX_WL_TPUT_RX
  59154. COEX_WL_TPUT_TX
  59155. COE_CR
  59156. COFF_AOUTHDR
  59157. COFF_AOUTSZ
  59158. COFF_AUXENT
  59159. COFF_AUXESZ
  59160. COFF_BSS
  59161. COFF_COMMENT
  59162. COFF_DATA
  59163. COFF_DEF_BSS_SECTION_ALIGNMENT
  59164. COFF_DEF_DATA_SECTION_ALIGNMENT
  59165. COFF_DEF_SECTION_ALIGNMENT
  59166. COFF_DEF_TEXT_SECTION_ALIGNMENT
  59167. COFF_DMAGIC
  59168. COFF_ETEXT
  59169. COFF_E_DIMNUM
  59170. COFF_E_FILNMLEN
  59171. COFF_E_SYMNMLEN
  59172. COFF_FILHDR
  59173. COFF_FILHSZ
  59174. COFF_F_AR16WR
  59175. COFF_F_AR32W
  59176. COFF_F_AR32WR
  59177. COFF_F_EXEC
  59178. COFF_F_LNNO
  59179. COFF_F_LSYMS
  59180. COFF_F_MINMAL
  59181. COFF_F_NODF
  59182. COFF_F_PATCH
  59183. COFF_F_RELFLG
  59184. COFF_F_SWABD
  59185. COFF_F_UPDATE
  59186. COFF_I386AIXMAGIC
  59187. COFF_I386BADMAG
  59188. COFF_I386MAGIC
  59189. COFF_I386PTXMAGIC
  59190. COFF_JMAGIC
  59191. COFF_LIB
  59192. COFF_LINENO
  59193. COFF_LINESZ
  59194. COFF_LONG
  59195. COFF_LONG_H
  59196. COFF_LONG_L
  59197. COFF_N_BTMASK
  59198. COFF_N_BTSHFT
  59199. COFF_N_TMASK
  59200. COFF_N_TSHIFT
  59201. COFF_OMAGIC
  59202. COFF_RELOC
  59203. COFF_RELSZ
  59204. COFF_SCNHDR
  59205. COFF_SCNHSZ
  59206. COFF_SECT_BSS
  59207. COFF_SECT_DATA
  59208. COFF_SECT_REQD
  59209. COFF_SECT_TEXT
  59210. COFF_SHMAGIC
  59211. COFF_SHORT
  59212. COFF_SHORT_H
  59213. COFF_SHORT_L
  59214. COFF_SLIBHD
  59215. COFF_SLIBSZ
  59216. COFF_STMAGIC
  59217. COFF_STYP_BSS
  59218. COFF_STYP_COPY
  59219. COFF_STYP_DATA
  59220. COFF_STYP_DSECT
  59221. COFF_STYP_GROUP
  59222. COFF_STYP_INFO
  59223. COFF_STYP_LIB
  59224. COFF_STYP_NOLOAD
  59225. COFF_STYP_OVER
  59226. COFF_STYP_PAD
  59227. COFF_STYP_REG
  59228. COFF_STYP_TEXT
  59229. COFF_SYMENT
  59230. COFF_SYMESZ
  59231. COFF_TEXT
  59232. COFF_ZMAGIC
  59233. COFF_auxent
  59234. COFF_filehdr
  59235. COFF_lineno
  59236. COFF_reloc
  59237. COFF_scnhdr
  59238. COFF_slib
  59239. COFF_syment
  59240. COFSTA
  59241. COH901318_BE_INT_CLEAR1
  59242. COH901318_BE_INT_CLEAR2
  59243. COH901318_BE_INT_STATUS1
  59244. COH901318_BE_INT_STATUS2
  59245. COH901318_CX_CFG
  59246. COH901318_CX_CFG_BE_IRQ_DISABLE
  59247. COH901318_CX_CFG_BE_IRQ_ENABLE
  59248. COH901318_CX_CFG_CH_DISABLE
  59249. COH901318_CX_CFG_CH_ENABLE
  59250. COH901318_CX_CFG_LCRF_MASK
  59251. COH901318_CX_CFG_LCRF_SHIFT
  59252. COH901318_CX_CFG_LCR_DISABLE
  59253. COH901318_CX_CFG_RM_MASK
  59254. COH901318_CX_CFG_RM_MEMORY_TO_MEMORY
  59255. COH901318_CX_CFG_RM_MEMORY_TO_PRIMARY
  59256. COH901318_CX_CFG_RM_PRIMARY_TO_MEMORY
  59257. COH901318_CX_CFG_RM_PRIMARY_TO_SECONDARY
  59258. COH901318_CX_CFG_RM_SECONDARY_TO_PRIMARY
  59259. COH901318_CX_CFG_SPACING
  59260. COH901318_CX_CFG_TC_IRQ_DISABLE
  59261. COH901318_CX_CFG_TC_IRQ_ENABLE
  59262. COH901318_CX_CTRL
  59263. COH901318_CX_CTRL_BURST_COUNT_16_BYTES
  59264. COH901318_CX_CTRL_BURST_COUNT_1_BYTE
  59265. COH901318_CX_CTRL_BURST_COUNT_2_BYTES
  59266. COH901318_CX_CTRL_BURST_COUNT_32_BYTES
  59267. COH901318_CX_CTRL_BURST_COUNT_48_BYTES
  59268. COH901318_CX_CTRL_BURST_COUNT_4_BYTES
  59269. COH901318_CX_CTRL_BURST_COUNT_64_BYTES
  59270. COH901318_CX_CTRL_BURST_COUNT_8_BYTES
  59271. COH901318_CX_CTRL_BURST_COUNT_MASK
  59272. COH901318_CX_CTRL_DDMA_DEMAND_DMA1
  59273. COH901318_CX_CTRL_DDMA_DEMAND_DMA2
  59274. COH901318_CX_CTRL_DDMA_LEGACY
  59275. COH901318_CX_CTRL_DDMA_MASK
  59276. COH901318_CX_CTRL_DST_ADDR_INC_DISABLE
  59277. COH901318_CX_CTRL_DST_ADDR_INC_ENABLE
  59278. COH901318_CX_CTRL_DST_BUS_SIZE_16_BITS
  59279. COH901318_CX_CTRL_DST_BUS_SIZE_32_BITS
  59280. COH901318_CX_CTRL_DST_BUS_SIZE_8_BITS
  59281. COH901318_CX_CTRL_DST_BUS_SIZE_MASK
  59282. COH901318_CX_CTRL_HSP_DISABLE
  59283. COH901318_CX_CTRL_HSP_ENABLE
  59284. COH901318_CX_CTRL_HSS_DISABLE
  59285. COH901318_CX_CTRL_HSS_ENABLE
  59286. COH901318_CX_CTRL_MASTER_MODE_M1RW
  59287. COH901318_CX_CTRL_MASTER_MODE_M1R_M2W
  59288. COH901318_CX_CTRL_MASTER_MODE_M2RW
  59289. COH901318_CX_CTRL_MASTER_MODE_M2R_M1W
  59290. COH901318_CX_CTRL_MASTER_MODE_MASK
  59291. COH901318_CX_CTRL_PRDD_DEST
  59292. COH901318_CX_CTRL_PRDD_MASK
  59293. COH901318_CX_CTRL_PRDD_SOURCE
  59294. COH901318_CX_CTRL_SPACING
  59295. COH901318_CX_CTRL_SRC_ADDR_INC_DISABLE
  59296. COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE
  59297. COH901318_CX_CTRL_SRC_BUS_SIZE_16_BITS
  59298. COH901318_CX_CTRL_SRC_BUS_SIZE_32_BITS
  59299. COH901318_CX_CTRL_SRC_BUS_SIZE_8_BITS
  59300. COH901318_CX_CTRL_SRC_BUS_SIZE_MASK
  59301. COH901318_CX_CTRL_TCP_DISABLE
  59302. COH901318_CX_CTRL_TCP_ENABLE
  59303. COH901318_CX_CTRL_TC_DISABLE
  59304. COH901318_CX_CTRL_TC_ENABLE
  59305. COH901318_CX_CTRL_TC_IRQ_DISABLE
  59306. COH901318_CX_CTRL_TC_IRQ_ENABLE
  59307. COH901318_CX_CTRL_TC_VALUE_MASK
  59308. COH901318_CX_DST_ADDR
  59309. COH901318_CX_DST_ADDR_SPACING
  59310. COH901318_CX_LNK_ADDR
  59311. COH901318_CX_LNK_ADDR_SPACING
  59312. COH901318_CX_LNK_LINK_IMMEDIATE
  59313. COH901318_CX_SRC_ADDR
  59314. COH901318_CX_SRC_ADDR_SPACING
  59315. COH901318_CX_STAT
  59316. COH901318_CX_STAT_ACTIVE
  59317. COH901318_CX_STAT_ENABLED
  59318. COH901318_CX_STAT_RBE_IRQ_IND
  59319. COH901318_CX_STAT_RTC_IRQ_IND
  59320. COH901318_CX_STAT_SPACING
  59321. COH901318_DEBUGFS_ASSIGN
  59322. COH901318_H
  59323. COH901318_INT_STATUS1
  59324. COH901318_INT_STATUS2
  59325. COH901318_MOD32_MASK
  59326. COH901318_RAW_BE_INT_STATUS1
  59327. COH901318_RAW_BE_INT_STATUS2
  59328. COH901318_RAW_TC_INT_STATUS1
  59329. COH901318_RAW_TC_INT_STATUS2
  59330. COH901318_TC_INT_CLEAR1
  59331. COH901318_TC_INT_CLEAR2
  59332. COH901318_TC_INT_STATUS1
  59333. COH901318_TC_INT_STATUS2
  59334. COH901318_WORD_MASK
  59335. COH901331_ALARM
  59336. COH901331_CUR_TIME
  59337. COH901331_IRQ_EVENT
  59338. COH901331_IRQ_FORCE
  59339. COH901331_IRQ_MASK
  59340. COH901331_SET_TIME
  59341. COH901331_VALID
  59342. COH901_PINRANGE
  59343. COHC_2_DEV
  59344. COHERENCY_ACE
  59345. COHERENCY_ACE_LITE
  59346. COHERENCY_FABRIC_TYPE_ARMADA_370_XP
  59347. COHERENCY_FABRIC_TYPE_ARMADA_375
  59348. COHERENCY_FABRIC_TYPE_ARMADA_380
  59349. COHERENCY_FABRIC_TYPE_NONE
  59350. COHERENT
  59351. COHERENT_MEMORY
  59352. COHERENT_POS
  59353. COHER_DEST_BASE_0__DEST_BASE_256B_MASK
  59354. COHER_DEST_BASE_0__DEST_BASE_256B__SHIFT
  59355. COHER_DEST_BASE_1__DEST_BASE_256B_MASK
  59356. COHER_DEST_BASE_1__DEST_BASE_256B__SHIFT
  59357. COHER_DEST_BASE_2__DEST_BASE_256B_MASK
  59358. COHER_DEST_BASE_2__DEST_BASE_256B__SHIFT
  59359. COHER_DEST_BASE_3__DEST_BASE_256B_MASK
  59360. COHER_DEST_BASE_3__DEST_BASE_256B__SHIFT
  59361. COHER_DEST_BASE_HI_0__DEST_BASE_HI_256B_MASK
  59362. COHER_DEST_BASE_HI_0__DEST_BASE_HI_256B__SHIFT
  59363. COHER_DEST_BASE_HI_1__DEST_BASE_HI_256B_MASK
  59364. COHER_DEST_BASE_HI_1__DEST_BASE_HI_256B__SHIFT
  59365. COHER_DEST_BASE_HI_2__DEST_BASE_HI_256B_MASK
  59366. COHER_DEST_BASE_HI_2__DEST_BASE_HI_256B__SHIFT
  59367. COHER_DEST_BASE_HI_3__DEST_BASE_HI_256B_MASK
  59368. COHER_DEST_BASE_HI_3__DEST_BASE_HI_256B__SHIFT
  59369. COH_DBG
  59370. COH_LINK_MAX
  59371. COH_NICFREE
  59372. COH_NICINOD
  59373. COH_SUPER_MAGIC
  59374. COI
  59375. COL
  59376. COLActiveLow
  59377. COLCNT
  59378. COLCNT_MASK
  59379. COLD
  59380. COLD_BIT_SHIFT
  59381. COLD_RESET
  59382. COLD_RESET_STATE
  59383. COLE
  59384. COLEN
  59385. COLEXP_16BPP
  59386. COLEXP_24BPP
  59387. COLEXP_8BPP
  59388. COLEXP_BG_COLOR
  59389. COLEXP_FG_COLOR
  59390. COLEXP_MODE
  59391. COLEXP_RESERVED
  59392. COLIBRI270_BVD1_GPIO
  59393. COLIBRI270_BVD2_GPIO
  59394. COLIBRI270_DETECT_GPIO
  59395. COLIBRI270_PPEN_GPIO
  59396. COLIBRI270_READY_GPIO
  59397. COLIBRI270_RESET_GPIO
  59398. COLIBRI320_BVD1_GPIO
  59399. COLIBRI320_BVD2_GPIO
  59400. COLIBRI320_DETECT_GPIO
  59401. COLIBRI320_PPEN_GPIO
  59402. COLIBRI320_READY_GPIO
  59403. COLIBRI320_RESET_GPIO
  59404. COLIBRI_ETH_IRQ_GPIO
  59405. COLIBRI_EVALBOARD
  59406. COLIBRI_PXA270_INCOME
  59407. COLIBRI_SDRAM_BASE
  59408. COLI_PULLUP_MAX_DELAY_US
  59409. COLI_PULLUP_MIN_DELAY_US
  59410. COLI_TOUCH_MAX_DELAY_US
  59411. COLI_TOUCH_MIN_DELAY_US
  59412. COLI_TOUCH_NO_OF_AVGS
  59413. COLI_TOUCH_REQ_ADC_CHAN
  59414. COLLATION_BINARY
  59415. COLLATION_FILE_NAME
  59416. COLLATION_NTOFS_SECURITY_HASH
  59417. COLLATION_NTOFS_SID
  59418. COLLATION_NTOFS_ULONG
  59419. COLLATION_NTOFS_ULONGS
  59420. COLLATION_RULE
  59421. COLLATION_UNICODE_STRING
  59422. COLLCONF
  59423. COLLECT
  59424. COLLECTION_NOT_MAPPED
  59425. COLLECTOR_INIT
  59426. COLLECT_FW_TRACE
  59427. COLLECT_FW_TRACE_RSP
  59428. COLLECT_NONDIRTY_BASE
  59429. COLLECT_NONDIRTY_FREQ1
  59430. COLLECT_NONDIRTY_FREQ2
  59431. COLLECT_PRIMARY
  59432. COLLECT_PRIMARY_FOLLOWED
  59433. COLLECT_PRIMARY_FOLLOWED_NOINPLACE
  59434. COLLECT_PRIMARY_HOOKED
  59435. COLLECT_SECONDARY
  59436. COLLIE_GPIO_AC_IN
  59437. COLLIE_GPIO_BBAT_ON
  59438. COLLIE_GPIO_CF_CD
  59439. COLLIE_GPIO_CF_IRQ
  59440. COLLIE_GPIO_CHARGE_ON
  59441. COLLIE_GPIO_CO
  59442. COLLIE_GPIO_GA_INT
  59443. COLLIE_GPIO_IR_ON
  59444. COLLIE_GPIO_MAIN_BAT_LOW
  59445. COLLIE_GPIO_MBAT_ON
  59446. COLLIE_GPIO_MCP_CLK
  59447. COLLIE_GPIO_ON_KEY
  59448. COLLIE_GPIO_SDIO_INT
  59449. COLLIE_GPIO_TMP_ON
  59450. COLLIE_GPIO_UCB1x00_IRQ
  59451. COLLIE_GPIO_UCB1x00_RESET
  59452. COLLIE_GPIO_VPEN
  59453. COLLIE_GPIO_WAKEUP
  59454. COLLIE_GPIO_nMIC_ON
  59455. COLLIE_GPIO_nREMOCON_INT
  59456. COLLIE_GPIO_nREMOCON_ON
  59457. COLLIE_IRQ_GPIO_AC_IN
  59458. COLLIE_IRQ_GPIO_CF_CD
  59459. COLLIE_IRQ_GPIO_CF_IRQ
  59460. COLLIE_IRQ_GPIO_CO
  59461. COLLIE_IRQ_GPIO_GA_INT
  59462. COLLIE_IRQ_GPIO_MAIN_BAT_LOW
  59463. COLLIE_IRQ_GPIO_ON_KEY
  59464. COLLIE_IRQ_GPIO_SDIO_IRQ
  59465. COLLIE_IRQ_GPIO_UCB1x00_IRQ
  59466. COLLIE_IRQ_GPIO_WAKEUP
  59467. COLLIE_IRQ_GPIO_nREMOCON_INT
  59468. COLLIE_SCOOP_GPIO_BASE
  59469. COLLIE_SCOOP_IO_DIR
  59470. COLLIE_SCOOP_IO_OUT
  59471. COLLIE_SCP_5VON
  59472. COLLIE_SCP_AMP_ON
  59473. COLLIE_SCP_DIAG_BOOT1
  59474. COLLIE_SCP_DIAG_BOOT2
  59475. COLLIE_SCP_LB_VOL_CHG
  59476. COLLIE_SCP_MUTE_L
  59477. COLLIE_SCP_MUTE_R
  59478. COLLIE_TC35143_GPIO_AMP_ON
  59479. COLLIE_TC35143_GPIO_BASE
  59480. COLLIE_TC35143_GPIO_BUZZER_BIAS
  59481. COLLIE_TC35143_GPIO_FS8KLPF
  59482. COLLIE_TC35143_GPIO_IN
  59483. COLLIE_TC35143_GPIO_OUT
  59484. COLLIE_TC35143_GPIO_TBL_CHK
  59485. COLLIE_TC35143_GPIO_VERSION0
  59486. COLLIE_TC35143_GPIO_VERSION1
  59487. COLLIE_TC35143_GPIO_VPEN_ON
  59488. COLON
  59489. COLOR
  59490. COLOR0_SEL_IN_OVL0
  59491. COLOR1_SEL_IN_OVL1
  59492. COLORBACK
  59493. COLOREXP
  59494. COLORFORE
  59495. COLORIMETRYEX_ADOBERGB
  59496. COLORIMETRYEX_ADOBEYCC601
  59497. COLORIMETRYEX_BT2020RGBYCBCR
  59498. COLORIMETRYEX_BT2020YCC
  59499. COLORIMETRYEX_RESERVED
  59500. COLORIMETRYEX_SYCC601
  59501. COLORIMETRYEX_XVYCC601
  59502. COLORIMETRYEX_XVYCC709
  59503. COLORIMETRY_EXTENDED
  59504. COLORIMETRY_ITU601
  59505. COLORIMETRY_ITU709
  59506. COLORIMETRY_NO_DATA
  59507. COLORM_ACTIVE_LOW
  59508. COLORS_DEF
  59509. COLORX_16_16_16_16_FLOAT
  59510. COLORX_16_16_FLOAT
  59511. COLORX_16_FLOAT
  59512. COLORX_1_5_5_5
  59513. COLORX_2_3_3
  59514. COLORX_32_32_32_32_FLOAT
  59515. COLORX_32_32_FLOAT
  59516. COLORX_32_FLOAT
  59517. COLORX_4_4_4_4
  59518. COLORX_5_6_5
  59519. COLORX_8
  59520. COLORX_8_8
  59521. COLORX_8_8_8
  59522. COLORX_8_8_8_8
  59523. COLORX_S8_8_8_8
  59524. COLOR_10
  59525. COLOR_10BIT_MODE
  59526. COLOR_10_10_10_2
  59527. COLOR_10_11_11
  59528. COLOR_11_11_10
  59529. COLOR_12
  59530. COLOR_12BIT_MODE
  59531. COLOR_16
  59532. COLOR_16BIT_MODE
  59533. COLOR_16_16
  59534. COLOR_16_16_16_16
  59535. COLOR_1_5_5_5
  59536. COLOR_24BIT_1BIT_AND
  59537. COLOR_24BIT_8BIT_ALPHA_PREMULT
  59538. COLOR_24BIT_8BIT_ALPHA_UNPREMULT
  59539. COLOR_24_8
  59540. COLOR_2_10_10_10
  59541. COLOR_2_10_10_10_6E4
  59542. COLOR_32
  59543. COLOR_32_32
  59544. COLOR_32_32_32_32
  59545. COLOR_4BIT
  59546. COLOR_4_4_4_4
  59547. COLOR_5BIT
  59548. COLOR_5_5_5_1
  59549. COLOR_5_6_5
  59550. COLOR_6
  59551. COLOR_64BIT_FP_PREMULT
  59552. COLOR_64BIT_FP_UNPREMULT
  59553. COLOR_6BIT
  59554. COLOR_8
  59555. COLOR_8BIT
  59556. COLOR_8BIT_MODE
  59557. COLOR_8_24
  59558. COLOR_8_8
  59559. COLOR_8_8_8_8
  59560. COLOR_ACTIVE
  59561. COLOR_ALIGN
  59562. COLOR_ALPHA_1BIT
  59563. COLOR_ALPHA_4BIT
  59564. COLOR_ARRAY
  59565. COLOR_B
  59566. COLOR_BAR_MODE
  59567. COLOR_BAR_MODE_BARS
  59568. COLOR_BLT
  59569. COLOR_BLT_CMD
  59570. COLOR_BUFFER_SIZE
  59571. COLOR_BYPASS_ALL
  59572. COLOR_CALCULATOR_CLOCK_GATE_DISABLE
  59573. COLOR_COPY_ROP
  59574. COLOR_CPUS
  59575. COLOR_DEPTH
  59576. COLOR_DEPTH_101010
  59577. COLOR_DEPTH_111111
  59578. COLOR_DEPTH_121212
  59579. COLOR_DEPTH_141414
  59580. COLOR_DEPTH_16
  59581. COLOR_DEPTH_161616
  59582. COLOR_DEPTH_32
  59583. COLOR_DEPTH_666
  59584. COLOR_DEPTH_8
  59585. COLOR_DEPTH_888
  59586. COLOR_DEPTH_999
  59587. COLOR_DEPTH_COUNT
  59588. COLOR_DEPTH_UNDEFINED
  59589. COLOR_EXPAND
  59590. COLOR_FMT_NV12
  59591. COLOR_FMT_NV12_BPP10_UBWC
  59592. COLOR_FMT_NV12_MVTB
  59593. COLOR_FMT_NV12_UBWC
  59594. COLOR_FMT_NV21
  59595. COLOR_FMT_P010
  59596. COLOR_FMT_P010_UBWC
  59597. COLOR_FMT_RGB565_UBWC
  59598. COLOR_FMT_RGBA1010102_UBWC
  59599. COLOR_FMT_RGBA8888
  59600. COLOR_FMT_RGBA8888_UBWC
  59601. COLOR_G
  59602. COLOR_INVALID
  59603. COLOR_JPG
  59604. COLOR_KEY
  59605. COLOR_KEYER_MODE
  59606. COLOR_KEY_DST
  59607. COLOR_KEY_NONE
  59608. COLOR_KEY_SRC
  59609. COLOR_MARK_ENABLE
  59610. COLOR_MAXLEN
  59611. COLOR_MODE
  59612. COLOR_MODE_OFF
  59613. COLOR_MODE_ON
  59614. COLOR_MOD_COLOR_GAMMA_H_
  59615. COLOR_PASSIVE
  59616. COLOR_PIDS
  59617. COLOR_R
  59618. COLOR_REMAP_ENABLE
  59619. COLOR_RESERVED_13
  59620. COLOR_RESERVED_15
  59621. COLOR_RESERVED_23
  59622. COLOR_RESERVED_24
  59623. COLOR_RESERVED_25
  59624. COLOR_RESERVED_26
  59625. COLOR_RESERVED_27
  59626. COLOR_RESERVED_28
  59627. COLOR_RESERVED_29
  59628. COLOR_RESERVED_30
  59629. COLOR_RGB
  59630. COLOR_RGB233
  59631. COLOR_RGB323
  59632. COLOR_RGB332
  59633. COLOR_RGB565
  59634. COLOR_ROUND_NEAREST
  59635. COLOR_ROUND_TRUNC
  59636. COLOR_SEQ_SEL
  59637. COLOR_SPACE_2020_RGB_FULLRANGE
  59638. COLOR_SPACE_2020_RGB_LIMITEDRANGE
  59639. COLOR_SPACE_2020_YCBCR
  59640. COLOR_SPACE_ADOBERGB
  59641. COLOR_SPACE_APPCTRL
  59642. COLOR_SPACE_CUSTOMPOINTS
  59643. COLOR_SPACE_DCIP3
  59644. COLOR_SPACE_DISPLAYNATIVE
  59645. COLOR_SPACE_DOLBYVISION
  59646. COLOR_SPACE_MSREF_SCRGB
  59647. COLOR_SPACE_RGB
  59648. COLOR_SPACE_RGB_LIMITED_TYPE
  59649. COLOR_SPACE_RGB_TYPE
  59650. COLOR_SPACE_SRGB
  59651. COLOR_SPACE_SRGB_LIMITED
  59652. COLOR_SPACE_UNKNOWN
  59653. COLOR_SPACE_XR_RGB
  59654. COLOR_SPACE_XV_YCC_601
  59655. COLOR_SPACE_XV_YCC_709
  59656. COLOR_SPACE_YCBCR2020_TYPE
  59657. COLOR_SPACE_YCBCR601
  59658. COLOR_SPACE_YCBCR601_LIMITED
  59659. COLOR_SPACE_YCBCR601_LIMITED_TYPE
  59660. COLOR_SPACE_YCBCR601_TYPE
  59661. COLOR_SPACE_YCBCR709
  59662. COLOR_SPACE_YCBCR709_BLACK
  59663. COLOR_SPACE_YCBCR709_BLACK_TYPE
  59664. COLOR_SPACE_YCBCR709_LIMITED
  59665. COLOR_SPACE_YCBCR709_LIMITED_TYPE
  59666. COLOR_SPACE_YCBCR709_TYPE
  59667. COLOR_SPACE_YUV_2020
  59668. COLOR_SPACE_YUV_601
  59669. COLOR_SPACE_YUV_709
  59670. COLOR_TO_MONO
  59671. COLOR_TRANSP_DST
  59672. COLOR_TRANSP_ENABLE
  59673. COLOR_TRANSP_EQ
  59674. COLOR_TRANSP_NOT_EQ
  59675. COLOR_TRANSP_ROP
  59676. COLOR_X24_8_32_FLOAT
  59677. COLOR_Y8
  59678. COLOR_YCBCR422
  59679. COLOR_YCBCR444
  59680. COLOR_YCBCR601
  59681. COLOR_YCBCR709
  59682. COLOR_YUVPK
  59683. COLOR_YUVPL
  59684. COLOUR_ALIGN
  59685. COLOUR_MODE_FORMATTER
  59686. COLPTN
  59687. COLREGOFFSET
  59688. COLS_FN_BITS
  59689. COLS_L_BITS
  59690. COLS_OFFSET_BITS
  59691. COLUMN_INDEX_10BPC
  59692. COLUMN_INDEX_12BPC
  59693. COLUMN_INDEX_14BPC
  59694. COLUMN_INDEX_16BPC
  59695. COLUMN_INDEX_8BPC
  59696. COLUMN_INDEX_BPC
  59697. COLUMN_MASK
  59698. COL_ADDR
  59699. COL_ADDR_MASK
  59700. COL_ADDR_SHIFT
  59701. COL_B10_BASE
  59702. COL_B11_BASE
  59703. COL_B12_BASE
  59704. COL_B13_BASE
  59705. COL_B2_BASE
  59706. COL_B3_BASE
  59707. COL_B4_BASE
  59708. COL_B5_BASE
  59709. COL_B6_BASE
  59710. COL_B7_BASE
  59711. COL_B8_BASE
  59712. COL_B9_BASE
  59713. COL_BLUE
  59714. COL_BTNACT
  59715. COL_BTNINC
  59716. COL_BTNRAD
  59717. COL_BTNVIS
  59718. COL_COLOR
  59719. COL_CTRL
  59720. COL_EDIT
  59721. COL_EXCEED
  59722. COL_FMT_16BPP
  59723. COL_FMT_18BPP
  59724. COL_FMT_24BPP
  59725. COL_GREEN
  59726. COL_KEY_CNTL_1
  59727. COL_MAN0_COL_MAN_DEGAMMA_CONTROL__COL_MAN_DEGAMMA_MODE_MASK
  59728. COL_MAN0_COL_MAN_DEGAMMA_CONTROL__COL_MAN_DEGAMMA_MODE__SHIFT
  59729. COL_MAN0_COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_DATA_MASK
  59730. COL_MAN0_COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_DATA__SHIFT
  59731. COL_MAN0_COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_INDEX_MASK
  59732. COL_MAN0_COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_INDEX__SHIFT
  59733. COL_MAN0_COL_MAN_GAMUT_REMAP_C11_C12__COL_MAN_GAMUT_REMAP_C11_MASK
  59734. COL_MAN0_COL_MAN_GAMUT_REMAP_C11_C12__COL_MAN_GAMUT_REMAP_C11__SHIFT
  59735. COL_MAN0_COL_MAN_GAMUT_REMAP_C11_C12__COL_MAN_GAMUT_REMAP_C12_MASK
  59736. COL_MAN0_COL_MAN_GAMUT_REMAP_C11_C12__COL_MAN_GAMUT_REMAP_C12__SHIFT
  59737. COL_MAN0_COL_MAN_GAMUT_REMAP_C13_C14__COL_MAN_GAMUT_REMAP_C13_MASK
  59738. COL_MAN0_COL_MAN_GAMUT_REMAP_C13_C14__COL_MAN_GAMUT_REMAP_C13__SHIFT
  59739. COL_MAN0_COL_MAN_GAMUT_REMAP_C13_C14__COL_MAN_GAMUT_REMAP_C14_MASK
  59740. COL_MAN0_COL_MAN_GAMUT_REMAP_C13_C14__COL_MAN_GAMUT_REMAP_C14__SHIFT
  59741. COL_MAN0_COL_MAN_GAMUT_REMAP_C21_C22__COL_MAN_GAMUT_REMAP_C21_MASK
  59742. COL_MAN0_COL_MAN_GAMUT_REMAP_C21_C22__COL_MAN_GAMUT_REMAP_C21__SHIFT
  59743. COL_MAN0_COL_MAN_GAMUT_REMAP_C21_C22__COL_MAN_GAMUT_REMAP_C22_MASK
  59744. COL_MAN0_COL_MAN_GAMUT_REMAP_C21_C22__COL_MAN_GAMUT_REMAP_C22__SHIFT
  59745. COL_MAN0_COL_MAN_GAMUT_REMAP_C23_C24__COL_MAN_GAMUT_REMAP_C23_MASK
  59746. COL_MAN0_COL_MAN_GAMUT_REMAP_C23_C24__COL_MAN_GAMUT_REMAP_C23__SHIFT
  59747. COL_MAN0_COL_MAN_GAMUT_REMAP_C23_C24__COL_MAN_GAMUT_REMAP_C24_MASK
  59748. COL_MAN0_COL_MAN_GAMUT_REMAP_C23_C24__COL_MAN_GAMUT_REMAP_C24__SHIFT
  59749. COL_MAN0_COL_MAN_GAMUT_REMAP_C31_C32__COL_MAN_GAMUT_REMAP_C31_MASK
  59750. COL_MAN0_COL_MAN_GAMUT_REMAP_C31_C32__COL_MAN_GAMUT_REMAP_C31__SHIFT
  59751. COL_MAN0_COL_MAN_GAMUT_REMAP_C31_C32__COL_MAN_GAMUT_REMAP_C32_MASK
  59752. COL_MAN0_COL_MAN_GAMUT_REMAP_C31_C32__COL_MAN_GAMUT_REMAP_C32__SHIFT
  59753. COL_MAN0_COL_MAN_GAMUT_REMAP_C33_C34__COL_MAN_GAMUT_REMAP_C33_MASK
  59754. COL_MAN0_COL_MAN_GAMUT_REMAP_C33_C34__COL_MAN_GAMUT_REMAP_C33__SHIFT
  59755. COL_MAN0_COL_MAN_GAMUT_REMAP_C33_C34__COL_MAN_GAMUT_REMAP_C34_MASK
  59756. COL_MAN0_COL_MAN_GAMUT_REMAP_C33_C34__COL_MAN_GAMUT_REMAP_C34__SHIFT
  59757. COL_MAN0_COL_MAN_GAMUT_REMAP_CONTROL__COL_MAN_GAMUT_REMAP_MODE_MASK
  59758. COL_MAN0_COL_MAN_GAMUT_REMAP_CONTROL__COL_MAN_GAMUT_REMAP_MODE__SHIFT
  59759. COL_MAN0_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_CONVERSION_MODE_MASK
  59760. COL_MAN0_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_CONVERSION_MODE__SHIFT
  59761. COL_MAN0_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_INPUT_TYPE_MASK
  59762. COL_MAN0_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_INPUT_TYPE__SHIFT
  59763. COL_MAN0_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_MODE_MASK
  59764. COL_MAN0_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_MODE__SHIFT
  59765. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_LUT_10BIT_BYPASS_EN_MASK
  59766. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_LUT_10BIT_BYPASS_EN__SHIFT
  59767. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_MODE_MASK
  59768. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_MODE__SHIFT
  59769. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_FORMAT_MASK
  59770. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_FORMAT__SHIFT
  59771. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_SIGNED_EN_MASK
  59772. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_SIGNED_EN__SHIFT
  59773. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_FORMAT_MASK
  59774. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_FORMAT__SHIFT
  59775. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_SIGNED_EN_MASK
  59776. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_SIGNED_EN__SHIFT
  59777. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_FORMAT_MASK
  59778. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_FORMAT__SHIFT
  59779. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_SIGNED_EN_MASK
  59780. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_SIGNED_EN__SHIFT
  59781. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_B_MASK
  59782. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_B__SHIFT
  59783. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_G_MASK
  59784. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_G__SHIFT
  59785. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_R_MASK
  59786. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_R__SHIFT
  59787. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_10BIT_BYPASS_DBL_BUF_EN_MASK
  59788. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_10BIT_BYPASS_DBL_BUF_EN__SHIFT
  59789. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_RW_MODE_MASK
  59790. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_RW_MODE__SHIFT
  59791. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_VGA_ACCESS_ENABLE_MASK
  59792. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_VGA_ACCESS_ENABLE__SHIFT
  59793. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_WRITE_EN_MASK_MASK
  59794. COL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_WRITE_EN_MASK__SHIFT
  59795. COL_MAN0_COL_MAN_OUTPUT_CSC_CONTROL__OUTPUT_CSC_MODE_MASK
  59796. COL_MAN0_COL_MAN_OUTPUT_CSC_CONTROL__OUTPUT_CSC_MODE__SHIFT
  59797. COL_MAN0_COL_MAN_REGAMMA_CNTLA_END_CNTL1__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_MASK
  59798. COL_MAN0_COL_MAN_REGAMMA_CNTLA_END_CNTL1__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END__SHIFT
  59799. COL_MAN0_COL_MAN_REGAMMA_CNTLA_END_CNTL2__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_BASE_MASK
  59800. COL_MAN0_COL_MAN_REGAMMA_CNTLA_END_CNTL2__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_BASE__SHIFT
  59801. COL_MAN0_COL_MAN_REGAMMA_CNTLA_END_CNTL2__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_SLOPE_MASK
  59802. COL_MAN0_COL_MAN_REGAMMA_CNTLA_END_CNTL2__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_SLOPE__SHIFT
  59803. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET_MASK
  59804. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET__SHIFT
  59805. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS_MASK
  59806. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  59807. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET_MASK
  59808. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET__SHIFT
  59809. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS_MASK
  59810. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  59811. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION10_LUT_OFFSET_MASK
  59812. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION10_LUT_OFFSET__SHIFT
  59813. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION10_NUM_SEGMENTS_MASK
  59814. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  59815. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION11_LUT_OFFSET_MASK
  59816. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION11_LUT_OFFSET__SHIFT
  59817. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION11_NUM_SEGMENTS_MASK
  59818. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  59819. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION12_LUT_OFFSET_MASK
  59820. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION12_LUT_OFFSET__SHIFT
  59821. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION12_NUM_SEGMENTS_MASK
  59822. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  59823. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION13_LUT_OFFSET_MASK
  59824. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION13_LUT_OFFSET__SHIFT
  59825. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION13_NUM_SEGMENTS_MASK
  59826. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  59827. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION14_LUT_OFFSET_MASK
  59828. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION14_LUT_OFFSET__SHIFT
  59829. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION14_NUM_SEGMENTS_MASK
  59830. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  59831. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION15_LUT_OFFSET_MASK
  59832. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION15_LUT_OFFSET__SHIFT
  59833. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION15_NUM_SEGMENTS_MASK
  59834. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  59835. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION2_LUT_OFFSET_MASK
  59836. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION2_LUT_OFFSET__SHIFT
  59837. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION2_NUM_SEGMENTS_MASK
  59838. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  59839. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION3_LUT_OFFSET_MASK
  59840. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION3_LUT_OFFSET__SHIFT
  59841. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION3_NUM_SEGMENTS_MASK
  59842. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  59843. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION4_LUT_OFFSET_MASK
  59844. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION4_LUT_OFFSET__SHIFT
  59845. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION4_NUM_SEGMENTS_MASK
  59846. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  59847. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION5_LUT_OFFSET_MASK
  59848. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION5_LUT_OFFSET__SHIFT
  59849. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION5_NUM_SEGMENTS_MASK
  59850. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  59851. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION6_LUT_OFFSET_MASK
  59852. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION6_LUT_OFFSET__SHIFT
  59853. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION6_NUM_SEGMENTS_MASK
  59854. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  59855. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION7_LUT_OFFSET_MASK
  59856. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION7_LUT_OFFSET__SHIFT
  59857. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION7_NUM_SEGMENTS_MASK
  59858. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  59859. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION8_LUT_OFFSET_MASK
  59860. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION8_LUT_OFFSET__SHIFT
  59861. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION8_NUM_SEGMENTS_MASK
  59862. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  59863. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION9_LUT_OFFSET_MASK
  59864. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION9_LUT_OFFSET__SHIFT
  59865. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION9_NUM_SEGMENTS_MASK
  59866. COL_MAN0_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  59867. COL_MAN0_COL_MAN_REGAMMA_CNTLA_SLOPE_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE_MASK
  59868. COL_MAN0_COL_MAN_REGAMMA_CNTLA_SLOPE_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE__SHIFT
  59869. COL_MAN0_COL_MAN_REGAMMA_CNTLA_START_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_START_MASK
  59870. COL_MAN0_COL_MAN_REGAMMA_CNTLA_START_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_START_SEGMENT_MASK
  59871. COL_MAN0_COL_MAN_REGAMMA_CNTLA_START_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_START_SEGMENT__SHIFT
  59872. COL_MAN0_COL_MAN_REGAMMA_CNTLA_START_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_START__SHIFT
  59873. COL_MAN0_COL_MAN_REGAMMA_CNTLB_END_CNTL1__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_MASK
  59874. COL_MAN0_COL_MAN_REGAMMA_CNTLB_END_CNTL1__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END__SHIFT
  59875. COL_MAN0_COL_MAN_REGAMMA_CNTLB_END_CNTL2__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_BASE_MASK
  59876. COL_MAN0_COL_MAN_REGAMMA_CNTLB_END_CNTL2__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_BASE__SHIFT
  59877. COL_MAN0_COL_MAN_REGAMMA_CNTLB_END_CNTL2__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_SLOPE_MASK
  59878. COL_MAN0_COL_MAN_REGAMMA_CNTLB_END_CNTL2__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_SLOPE__SHIFT
  59879. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION0_LUT_OFFSET_MASK
  59880. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION0_LUT_OFFSET__SHIFT
  59881. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION0_NUM_SEGMENTS_MASK
  59882. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  59883. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION1_LUT_OFFSET_MASK
  59884. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION1_LUT_OFFSET__SHIFT
  59885. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION1_NUM_SEGMENTS_MASK
  59886. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  59887. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION10_LUT_OFFSET_MASK
  59888. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION10_LUT_OFFSET__SHIFT
  59889. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION10_NUM_SEGMENTS_MASK
  59890. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  59891. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION11_LUT_OFFSET_MASK
  59892. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION11_LUT_OFFSET__SHIFT
  59893. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION11_NUM_SEGMENTS_MASK
  59894. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  59895. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION12_LUT_OFFSET_MASK
  59896. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION12_LUT_OFFSET__SHIFT
  59897. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION12_NUM_SEGMENTS_MASK
  59898. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  59899. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION13_LUT_OFFSET_MASK
  59900. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION13_LUT_OFFSET__SHIFT
  59901. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION13_NUM_SEGMENTS_MASK
  59902. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  59903. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION14_LUT_OFFSET_MASK
  59904. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION14_LUT_OFFSET__SHIFT
  59905. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION14_NUM_SEGMENTS_MASK
  59906. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  59907. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION15_LUT_OFFSET_MASK
  59908. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION15_LUT_OFFSET__SHIFT
  59909. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION15_NUM_SEGMENTS_MASK
  59910. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  59911. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION2_LUT_OFFSET_MASK
  59912. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION2_LUT_OFFSET__SHIFT
  59913. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION2_NUM_SEGMENTS_MASK
  59914. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  59915. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION3_LUT_OFFSET_MASK
  59916. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION3_LUT_OFFSET__SHIFT
  59917. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION3_NUM_SEGMENTS_MASK
  59918. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  59919. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION4_LUT_OFFSET_MASK
  59920. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION4_LUT_OFFSET__SHIFT
  59921. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION4_NUM_SEGMENTS_MASK
  59922. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  59923. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION5_LUT_OFFSET_MASK
  59924. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION5_LUT_OFFSET__SHIFT
  59925. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION5_NUM_SEGMENTS_MASK
  59926. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  59927. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION6_LUT_OFFSET_MASK
  59928. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION6_LUT_OFFSET__SHIFT
  59929. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION6_NUM_SEGMENTS_MASK
  59930. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  59931. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION7_LUT_OFFSET_MASK
  59932. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION7_LUT_OFFSET__SHIFT
  59933. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION7_NUM_SEGMENTS_MASK
  59934. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  59935. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION8_LUT_OFFSET_MASK
  59936. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION8_LUT_OFFSET__SHIFT
  59937. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION8_NUM_SEGMENTS_MASK
  59938. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  59939. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION9_LUT_OFFSET_MASK
  59940. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION9_LUT_OFFSET__SHIFT
  59941. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION9_NUM_SEGMENTS_MASK
  59942. COL_MAN0_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  59943. COL_MAN0_COL_MAN_REGAMMA_CNTLB_SLOPE_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_LINEAR_SLOPE_MASK
  59944. COL_MAN0_COL_MAN_REGAMMA_CNTLB_SLOPE_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_LINEAR_SLOPE__SHIFT
  59945. COL_MAN0_COL_MAN_REGAMMA_CNTLB_START_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_START_MASK
  59946. COL_MAN0_COL_MAN_REGAMMA_CNTLB_START_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_START_SEGMENT_MASK
  59947. COL_MAN0_COL_MAN_REGAMMA_CNTLB_START_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_START_SEGMENT__SHIFT
  59948. COL_MAN0_COL_MAN_REGAMMA_CNTLB_START_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_START__SHIFT
  59949. COL_MAN0_COL_MAN_REGAMMA_CONTROL__COL_MAN_REGAMMA_MODE_MASK
  59950. COL_MAN0_COL_MAN_REGAMMA_CONTROL__COL_MAN_REGAMMA_MODE__SHIFT
  59951. COL_MAN0_COL_MAN_REGAMMA_LUT_DATA__COL_MAN_REGAMMA_LUT_DATA_MASK
  59952. COL_MAN0_COL_MAN_REGAMMA_LUT_DATA__COL_MAN_REGAMMA_LUT_DATA__SHIFT
  59953. COL_MAN0_COL_MAN_REGAMMA_LUT_INDEX__COL_MAN_REGAMMA_LUT_INDEX_MASK
  59954. COL_MAN0_COL_MAN_REGAMMA_LUT_INDEX__COL_MAN_REGAMMA_LUT_INDEX__SHIFT
  59955. COL_MAN0_COL_MAN_REGAMMA_LUT_WRITE_EN_MASK__COL_MAN_REGAMMA_LUT_WRITE_EN_MASK_MASK
  59956. COL_MAN0_COL_MAN_REGAMMA_LUT_WRITE_EN_MASK__COL_MAN_REGAMMA_LUT_WRITE_EN_MASK__SHIFT
  59957. COL_MAN0_COL_MAN_UPDATE__COL_MAN_DISABLE_MULTIPLE_UPDATE_MASK
  59958. COL_MAN0_COL_MAN_UPDATE__COL_MAN_DISABLE_MULTIPLE_UPDATE__SHIFT
  59959. COL_MAN0_COL_MAN_UPDATE__COL_MAN_UPDATE_LOCK_MASK
  59960. COL_MAN0_COL_MAN_UPDATE__COL_MAN_UPDATE_LOCK__SHIFT
  59961. COL_MAN0_COL_MAN_UPDATE__COL_MAN_UPDATE_PENDING_MASK
  59962. COL_MAN0_COL_MAN_UPDATE__COL_MAN_UPDATE_PENDING__SHIFT
  59963. COL_MAN0_COL_MAN_UPDATE__COL_MAN_UPDATE_TAKEN_MASK
  59964. COL_MAN0_COL_MAN_UPDATE__COL_MAN_UPDATE_TAKEN__SHIFT
  59965. COL_MAN0_DENORM_CLAMP_CONTROL__DENORM_10BIT_OUT_MASK
  59966. COL_MAN0_DENORM_CLAMP_CONTROL__DENORM_10BIT_OUT__SHIFT
  59967. COL_MAN0_DENORM_CLAMP_CONTROL__DENORM_MODE_MASK
  59968. COL_MAN0_DENORM_CLAMP_CONTROL__DENORM_MODE__SHIFT
  59969. COL_MAN0_DENORM_CLAMP_RANGE_B_CB__RANGE_CLAMP_MAX_B_CB_MASK
  59970. COL_MAN0_DENORM_CLAMP_RANGE_B_CB__RANGE_CLAMP_MAX_B_CB__SHIFT
  59971. COL_MAN0_DENORM_CLAMP_RANGE_B_CB__RANGE_CLAMP_MIN_B_CB_MASK
  59972. COL_MAN0_DENORM_CLAMP_RANGE_B_CB__RANGE_CLAMP_MIN_B_CB__SHIFT
  59973. COL_MAN0_DENORM_CLAMP_RANGE_G_Y__RANGE_CLAMP_MAX_G_Y_MASK
  59974. COL_MAN0_DENORM_CLAMP_RANGE_G_Y__RANGE_CLAMP_MAX_G_Y__SHIFT
  59975. COL_MAN0_DENORM_CLAMP_RANGE_G_Y__RANGE_CLAMP_MIN_G_Y_MASK
  59976. COL_MAN0_DENORM_CLAMP_RANGE_G_Y__RANGE_CLAMP_MIN_G_Y__SHIFT
  59977. COL_MAN0_DENORM_CLAMP_RANGE_R_CR__RANGE_CLAMP_MAX_R_CR_MASK
  59978. COL_MAN0_DENORM_CLAMP_RANGE_R_CR__RANGE_CLAMP_MAX_R_CR__SHIFT
  59979. COL_MAN0_DENORM_CLAMP_RANGE_R_CR__RANGE_CLAMP_MIN_R_CR_MASK
  59980. COL_MAN0_DENORM_CLAMP_RANGE_R_CR__RANGE_CLAMP_MIN_R_CR__SHIFT
  59981. COL_MAN0_INPUT_CSC_C11_C12_A__INPUT_CSC_C11_A_MASK
  59982. COL_MAN0_INPUT_CSC_C11_C12_A__INPUT_CSC_C11_A__SHIFT
  59983. COL_MAN0_INPUT_CSC_C11_C12_A__INPUT_CSC_C12_A_MASK
  59984. COL_MAN0_INPUT_CSC_C11_C12_A__INPUT_CSC_C12_A__SHIFT
  59985. COL_MAN0_INPUT_CSC_C11_C12_B__INPUT_CSC_C11_B_MASK
  59986. COL_MAN0_INPUT_CSC_C11_C12_B__INPUT_CSC_C11_B__SHIFT
  59987. COL_MAN0_INPUT_CSC_C11_C12_B__INPUT_CSC_C12_B_MASK
  59988. COL_MAN0_INPUT_CSC_C11_C12_B__INPUT_CSC_C12_B__SHIFT
  59989. COL_MAN0_INPUT_CSC_C13_C14_A__INPUT_CSC_C13_A_MASK
  59990. COL_MAN0_INPUT_CSC_C13_C14_A__INPUT_CSC_C13_A__SHIFT
  59991. COL_MAN0_INPUT_CSC_C13_C14_A__INPUT_CSC_C14_A_MASK
  59992. COL_MAN0_INPUT_CSC_C13_C14_A__INPUT_CSC_C14_A__SHIFT
  59993. COL_MAN0_INPUT_CSC_C13_C14_B__INPUT_CSC_C13_B_MASK
  59994. COL_MAN0_INPUT_CSC_C13_C14_B__INPUT_CSC_C13_B__SHIFT
  59995. COL_MAN0_INPUT_CSC_C13_C14_B__INPUT_CSC_C14_B_MASK
  59996. COL_MAN0_INPUT_CSC_C13_C14_B__INPUT_CSC_C14_B__SHIFT
  59997. COL_MAN0_INPUT_CSC_C21_C22_A__INPUT_CSC_C21_A_MASK
  59998. COL_MAN0_INPUT_CSC_C21_C22_A__INPUT_CSC_C21_A__SHIFT
  59999. COL_MAN0_INPUT_CSC_C21_C22_A__INPUT_CSC_C22_A_MASK
  60000. COL_MAN0_INPUT_CSC_C21_C22_A__INPUT_CSC_C22_A__SHIFT
  60001. COL_MAN0_INPUT_CSC_C21_C22_B__INPUT_CSC_C21_B_MASK
  60002. COL_MAN0_INPUT_CSC_C21_C22_B__INPUT_CSC_C21_B__SHIFT
  60003. COL_MAN0_INPUT_CSC_C21_C22_B__INPUT_CSC_C22_B_MASK
  60004. COL_MAN0_INPUT_CSC_C21_C22_B__INPUT_CSC_C22_B__SHIFT
  60005. COL_MAN0_INPUT_CSC_C23_C24_A__INPUT_CSC_C23_A_MASK
  60006. COL_MAN0_INPUT_CSC_C23_C24_A__INPUT_CSC_C23_A__SHIFT
  60007. COL_MAN0_INPUT_CSC_C23_C24_A__INPUT_CSC_C24_A_MASK
  60008. COL_MAN0_INPUT_CSC_C23_C24_A__INPUT_CSC_C24_A__SHIFT
  60009. COL_MAN0_INPUT_CSC_C23_C24_B__INPUT_CSC_C23_B_MASK
  60010. COL_MAN0_INPUT_CSC_C23_C24_B__INPUT_CSC_C23_B__SHIFT
  60011. COL_MAN0_INPUT_CSC_C23_C24_B__INPUT_CSC_C24_B_MASK
  60012. COL_MAN0_INPUT_CSC_C23_C24_B__INPUT_CSC_C24_B__SHIFT
  60013. COL_MAN0_INPUT_CSC_C31_C32_A__INPUT_CSC_C31_A_MASK
  60014. COL_MAN0_INPUT_CSC_C31_C32_A__INPUT_CSC_C31_A__SHIFT
  60015. COL_MAN0_INPUT_CSC_C31_C32_A__INPUT_CSC_C32_A_MASK
  60016. COL_MAN0_INPUT_CSC_C31_C32_A__INPUT_CSC_C32_A__SHIFT
  60017. COL_MAN0_INPUT_CSC_C31_C32_B__INPUT_CSC_C31_B_MASK
  60018. COL_MAN0_INPUT_CSC_C31_C32_B__INPUT_CSC_C31_B__SHIFT
  60019. COL_MAN0_INPUT_CSC_C31_C32_B__INPUT_CSC_C32_B_MASK
  60020. COL_MAN0_INPUT_CSC_C31_C32_B__INPUT_CSC_C32_B__SHIFT
  60021. COL_MAN0_INPUT_CSC_C33_C34_A__INPUT_CSC_C33_A_MASK
  60022. COL_MAN0_INPUT_CSC_C33_C34_A__INPUT_CSC_C33_A__SHIFT
  60023. COL_MAN0_INPUT_CSC_C33_C34_A__INPUT_CSC_C34_A_MASK
  60024. COL_MAN0_INPUT_CSC_C33_C34_A__INPUT_CSC_C34_A__SHIFT
  60025. COL_MAN0_INPUT_CSC_C33_C34_B__INPUT_CSC_C33_B_MASK
  60026. COL_MAN0_INPUT_CSC_C33_C34_B__INPUT_CSC_C33_B__SHIFT
  60027. COL_MAN0_INPUT_CSC_C33_C34_B__INPUT_CSC_C34_B_MASK
  60028. COL_MAN0_INPUT_CSC_C33_C34_B__INPUT_CSC_C34_B__SHIFT
  60029. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_B__INPUT_GAMMA_BLACK_OFFSET_B_MASK
  60030. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_B__INPUT_GAMMA_BLACK_OFFSET_B__SHIFT
  60031. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_B__INPUT_GAMMA_WHITE_OFFSET_B_MASK
  60032. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_B__INPUT_GAMMA_WHITE_OFFSET_B__SHIFT
  60033. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_G__INPUT_GAMMA_BLACK_OFFSET_G_MASK
  60034. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_G__INPUT_GAMMA_BLACK_OFFSET_G__SHIFT
  60035. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_G__INPUT_GAMMA_WHITE_OFFSET_G_MASK
  60036. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_G__INPUT_GAMMA_WHITE_OFFSET_G__SHIFT
  60037. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_R__INPUT_GAMMA_BLACK_OFFSET_R_MASK
  60038. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_R__INPUT_GAMMA_BLACK_OFFSET_R__SHIFT
  60039. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_R__INPUT_GAMMA_WHITE_OFFSET_R_MASK
  60040. COL_MAN0_INPUT_GAMMA_BW_OFFSETS_R__INPUT_GAMMA_WHITE_OFFSET_R__SHIFT
  60041. COL_MAN0_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_BLUE_MASK
  60042. COL_MAN0_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_BLUE__SHIFT
  60043. COL_MAN0_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_GREEN_MASK
  60044. COL_MAN0_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_GREEN__SHIFT
  60045. COL_MAN0_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_RED_MASK
  60046. COL_MAN0_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_RED__SHIFT
  60047. COL_MAN0_INPUT_GAMMA_LUT_AUTOFILL__INPUT_GAMMA_LUT_AUTOFILL_DONE_MASK
  60048. COL_MAN0_INPUT_GAMMA_LUT_AUTOFILL__INPUT_GAMMA_LUT_AUTOFILL_DONE__SHIFT
  60049. COL_MAN0_INPUT_GAMMA_LUT_AUTOFILL__INPUT_GAMMA_LUT_AUTOFILL_MASK
  60050. COL_MAN0_INPUT_GAMMA_LUT_AUTOFILL__INPUT_GAMMA_LUT_AUTOFILL__SHIFT
  60051. COL_MAN0_INPUT_GAMMA_LUT_PWL_DATA__INPUT_GAMMA_LUT_BASE_MASK
  60052. COL_MAN0_INPUT_GAMMA_LUT_PWL_DATA__INPUT_GAMMA_LUT_BASE__SHIFT
  60053. COL_MAN0_INPUT_GAMMA_LUT_PWL_DATA__INPUT_GAMMA_LUT_DELTA_MASK
  60054. COL_MAN0_INPUT_GAMMA_LUT_PWL_DATA__INPUT_GAMMA_LUT_DELTA__SHIFT
  60055. COL_MAN0_INPUT_GAMMA_LUT_RW_INDEX__INPUT_GAMMA_LUT_RW_INDEX_MASK
  60056. COL_MAN0_INPUT_GAMMA_LUT_RW_INDEX__INPUT_GAMMA_LUT_RW_INDEX__SHIFT
  60057. COL_MAN0_INPUT_GAMMA_LUT_SEQ_COLOR__INPUT_GAMMA_LUT_SEQ_COLOR_MASK
  60058. COL_MAN0_INPUT_GAMMA_LUT_SEQ_COLOR__INPUT_GAMMA_LUT_SEQ_COLOR__SHIFT
  60059. COL_MAN0_OUTPUT_CSC_C11_C12_A__OUTPUT_CSC_C11_A_MASK
  60060. COL_MAN0_OUTPUT_CSC_C11_C12_A__OUTPUT_CSC_C11_A__SHIFT
  60061. COL_MAN0_OUTPUT_CSC_C11_C12_A__OUTPUT_CSC_C12_A_MASK
  60062. COL_MAN0_OUTPUT_CSC_C11_C12_A__OUTPUT_CSC_C12_A__SHIFT
  60063. COL_MAN0_OUTPUT_CSC_C11_C12_B__OUTPUT_CSC_C11_B_MASK
  60064. COL_MAN0_OUTPUT_CSC_C11_C12_B__OUTPUT_CSC_C11_B__SHIFT
  60065. COL_MAN0_OUTPUT_CSC_C11_C12_B__OUTPUT_CSC_C12_B_MASK
  60066. COL_MAN0_OUTPUT_CSC_C11_C12_B__OUTPUT_CSC_C12_B__SHIFT
  60067. COL_MAN0_OUTPUT_CSC_C13_C14_A__OUTPUT_CSC_C13_A_MASK
  60068. COL_MAN0_OUTPUT_CSC_C13_C14_A__OUTPUT_CSC_C13_A__SHIFT
  60069. COL_MAN0_OUTPUT_CSC_C13_C14_A__OUTPUT_CSC_C14_A_MASK
  60070. COL_MAN0_OUTPUT_CSC_C13_C14_A__OUTPUT_CSC_C14_A__SHIFT
  60071. COL_MAN0_OUTPUT_CSC_C13_C14_B__OUTPUT_CSC_C13_B_MASK
  60072. COL_MAN0_OUTPUT_CSC_C13_C14_B__OUTPUT_CSC_C13_B__SHIFT
  60073. COL_MAN0_OUTPUT_CSC_C13_C14_B__OUTPUT_CSC_C14_B_MASK
  60074. COL_MAN0_OUTPUT_CSC_C13_C14_B__OUTPUT_CSC_C14_B__SHIFT
  60075. COL_MAN0_OUTPUT_CSC_C21_C22_A__OUTPUT_CSC_C21_A_MASK
  60076. COL_MAN0_OUTPUT_CSC_C21_C22_A__OUTPUT_CSC_C21_A__SHIFT
  60077. COL_MAN0_OUTPUT_CSC_C21_C22_A__OUTPUT_CSC_C22_A_MASK
  60078. COL_MAN0_OUTPUT_CSC_C21_C22_A__OUTPUT_CSC_C22_A__SHIFT
  60079. COL_MAN0_OUTPUT_CSC_C21_C22_B__OUTPUT_CSC_C21_B_MASK
  60080. COL_MAN0_OUTPUT_CSC_C21_C22_B__OUTPUT_CSC_C21_B__SHIFT
  60081. COL_MAN0_OUTPUT_CSC_C21_C22_B__OUTPUT_CSC_C22_B_MASK
  60082. COL_MAN0_OUTPUT_CSC_C21_C22_B__OUTPUT_CSC_C22_B__SHIFT
  60083. COL_MAN0_OUTPUT_CSC_C23_C24_A__OUTPUT_CSC_C23_A_MASK
  60084. COL_MAN0_OUTPUT_CSC_C23_C24_A__OUTPUT_CSC_C23_A__SHIFT
  60085. COL_MAN0_OUTPUT_CSC_C23_C24_A__OUTPUT_CSC_C24_A_MASK
  60086. COL_MAN0_OUTPUT_CSC_C23_C24_A__OUTPUT_CSC_C24_A__SHIFT
  60087. COL_MAN0_OUTPUT_CSC_C23_C24_B__OUTPUT_CSC_C23_B_MASK
  60088. COL_MAN0_OUTPUT_CSC_C23_C24_B__OUTPUT_CSC_C23_B__SHIFT
  60089. COL_MAN0_OUTPUT_CSC_C23_C24_B__OUTPUT_CSC_C24_B_MASK
  60090. COL_MAN0_OUTPUT_CSC_C23_C24_B__OUTPUT_CSC_C24_B__SHIFT
  60091. COL_MAN0_OUTPUT_CSC_C31_C32_A__OUTPUT_CSC_C31_A_MASK
  60092. COL_MAN0_OUTPUT_CSC_C31_C32_A__OUTPUT_CSC_C31_A__SHIFT
  60093. COL_MAN0_OUTPUT_CSC_C31_C32_A__OUTPUT_CSC_C32_A_MASK
  60094. COL_MAN0_OUTPUT_CSC_C31_C32_A__OUTPUT_CSC_C32_A__SHIFT
  60095. COL_MAN0_OUTPUT_CSC_C31_C32_B__OUTPUT_CSC_C31_B_MASK
  60096. COL_MAN0_OUTPUT_CSC_C31_C32_B__OUTPUT_CSC_C31_B__SHIFT
  60097. COL_MAN0_OUTPUT_CSC_C31_C32_B__OUTPUT_CSC_C32_B_MASK
  60098. COL_MAN0_OUTPUT_CSC_C31_C32_B__OUTPUT_CSC_C32_B__SHIFT
  60099. COL_MAN0_OUTPUT_CSC_C33_C34_A__OUTPUT_CSC_C33_A_MASK
  60100. COL_MAN0_OUTPUT_CSC_C33_C34_A__OUTPUT_CSC_C33_A__SHIFT
  60101. COL_MAN0_OUTPUT_CSC_C33_C34_A__OUTPUT_CSC_C34_A_MASK
  60102. COL_MAN0_OUTPUT_CSC_C33_C34_A__OUTPUT_CSC_C34_A__SHIFT
  60103. COL_MAN0_OUTPUT_CSC_C33_C34_B__OUTPUT_CSC_C33_B_MASK
  60104. COL_MAN0_OUTPUT_CSC_C33_C34_B__OUTPUT_CSC_C33_B__SHIFT
  60105. COL_MAN0_OUTPUT_CSC_C33_C34_B__OUTPUT_CSC_C34_B_MASK
  60106. COL_MAN0_OUTPUT_CSC_C33_C34_B__OUTPUT_CSC_C34_B__SHIFT
  60107. COL_MAN0_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_OVERFLOW_ACK_MASK
  60108. COL_MAN0_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_OVERFLOW_ACK__SHIFT
  60109. COL_MAN0_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_OVERFLOW_OCCURED_MASK
  60110. COL_MAN0_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_OVERFLOW_OCCURED__SHIFT
  60111. COL_MAN0_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_UNDERFLOW_ACK_MASK
  60112. COL_MAN0_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_UNDERFLOW_ACK__SHIFT
  60113. COL_MAN0_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_UNDERFLOW_OCCURED_MASK
  60114. COL_MAN0_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_UNDERFLOW_OCCURED__SHIFT
  60115. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_C_OVERFLOW_ACK_MASK
  60116. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_C_OVERFLOW_ACK__SHIFT
  60117. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_C_OVERFLOW_OCCURED_MASK
  60118. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_C_OVERFLOW_OCCURED__SHIFT
  60119. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_C_UNDERFLOW_ACK_MASK
  60120. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_C_UNDERFLOW_ACK__SHIFT
  60121. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_C_UNDERFLOW_OCCURED_MASK
  60122. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_C_UNDERFLOW_OCCURED__SHIFT
  60123. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_L_OVERFLOW_ACK_MASK
  60124. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_L_OVERFLOW_ACK__SHIFT
  60125. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_L_OVERFLOW_OCCURED_MASK
  60126. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_L_OVERFLOW_OCCURED__SHIFT
  60127. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_L_UNDERFLOW_ACK_MASK
  60128. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_L_UNDERFLOW_ACK__SHIFT
  60129. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_L_UNDERFLOW_OCCURED_MASK
  60130. COL_MAN0_PACK_FIFO_ERROR__PACK_FIFO_L_UNDERFLOW_OCCURED__SHIFT
  60131. COL_MAN0_PRESCALE_CONTROL__PRESCALE_MODE_MASK
  60132. COL_MAN0_PRESCALE_CONTROL__PRESCALE_MODE__SHIFT
  60133. COL_MAN0_PRESCALE_VALUES_B__PRESCALE_BIAS_B_MASK
  60134. COL_MAN0_PRESCALE_VALUES_B__PRESCALE_BIAS_B__SHIFT
  60135. COL_MAN0_PRESCALE_VALUES_B__PRESCALE_SCALE_B_MASK
  60136. COL_MAN0_PRESCALE_VALUES_B__PRESCALE_SCALE_B__SHIFT
  60137. COL_MAN0_PRESCALE_VALUES_G__PRESCALE_BIAS_G_MASK
  60138. COL_MAN0_PRESCALE_VALUES_G__PRESCALE_BIAS_G__SHIFT
  60139. COL_MAN0_PRESCALE_VALUES_G__PRESCALE_SCALE_G_MASK
  60140. COL_MAN0_PRESCALE_VALUES_G__PRESCALE_SCALE_G__SHIFT
  60141. COL_MAN0_PRESCALE_VALUES_R__PRESCALE_BIAS_R_MASK
  60142. COL_MAN0_PRESCALE_VALUES_R__PRESCALE_BIAS_R__SHIFT
  60143. COL_MAN0_PRESCALE_VALUES_R__PRESCALE_SCALE_R_MASK
  60144. COL_MAN0_PRESCALE_VALUES_R__PRESCALE_SCALE_R__SHIFT
  60145. COL_MAN1_COL_MAN_DEGAMMA_CONTROL__COL_MAN_DEGAMMA_MODE_MASK
  60146. COL_MAN1_COL_MAN_DEGAMMA_CONTROL__COL_MAN_DEGAMMA_MODE__SHIFT
  60147. COL_MAN1_COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_DATA_MASK
  60148. COL_MAN1_COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_DATA__SHIFT
  60149. COL_MAN1_COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_INDEX_MASK
  60150. COL_MAN1_COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_INDEX__SHIFT
  60151. COL_MAN1_COL_MAN_GAMUT_REMAP_C11_C12__COL_MAN_GAMUT_REMAP_C11_MASK
  60152. COL_MAN1_COL_MAN_GAMUT_REMAP_C11_C12__COL_MAN_GAMUT_REMAP_C11__SHIFT
  60153. COL_MAN1_COL_MAN_GAMUT_REMAP_C11_C12__COL_MAN_GAMUT_REMAP_C12_MASK
  60154. COL_MAN1_COL_MAN_GAMUT_REMAP_C11_C12__COL_MAN_GAMUT_REMAP_C12__SHIFT
  60155. COL_MAN1_COL_MAN_GAMUT_REMAP_C13_C14__COL_MAN_GAMUT_REMAP_C13_MASK
  60156. COL_MAN1_COL_MAN_GAMUT_REMAP_C13_C14__COL_MAN_GAMUT_REMAP_C13__SHIFT
  60157. COL_MAN1_COL_MAN_GAMUT_REMAP_C13_C14__COL_MAN_GAMUT_REMAP_C14_MASK
  60158. COL_MAN1_COL_MAN_GAMUT_REMAP_C13_C14__COL_MAN_GAMUT_REMAP_C14__SHIFT
  60159. COL_MAN1_COL_MAN_GAMUT_REMAP_C21_C22__COL_MAN_GAMUT_REMAP_C21_MASK
  60160. COL_MAN1_COL_MAN_GAMUT_REMAP_C21_C22__COL_MAN_GAMUT_REMAP_C21__SHIFT
  60161. COL_MAN1_COL_MAN_GAMUT_REMAP_C21_C22__COL_MAN_GAMUT_REMAP_C22_MASK
  60162. COL_MAN1_COL_MAN_GAMUT_REMAP_C21_C22__COL_MAN_GAMUT_REMAP_C22__SHIFT
  60163. COL_MAN1_COL_MAN_GAMUT_REMAP_C23_C24__COL_MAN_GAMUT_REMAP_C23_MASK
  60164. COL_MAN1_COL_MAN_GAMUT_REMAP_C23_C24__COL_MAN_GAMUT_REMAP_C23__SHIFT
  60165. COL_MAN1_COL_MAN_GAMUT_REMAP_C23_C24__COL_MAN_GAMUT_REMAP_C24_MASK
  60166. COL_MAN1_COL_MAN_GAMUT_REMAP_C23_C24__COL_MAN_GAMUT_REMAP_C24__SHIFT
  60167. COL_MAN1_COL_MAN_GAMUT_REMAP_C31_C32__COL_MAN_GAMUT_REMAP_C31_MASK
  60168. COL_MAN1_COL_MAN_GAMUT_REMAP_C31_C32__COL_MAN_GAMUT_REMAP_C31__SHIFT
  60169. COL_MAN1_COL_MAN_GAMUT_REMAP_C31_C32__COL_MAN_GAMUT_REMAP_C32_MASK
  60170. COL_MAN1_COL_MAN_GAMUT_REMAP_C31_C32__COL_MAN_GAMUT_REMAP_C32__SHIFT
  60171. COL_MAN1_COL_MAN_GAMUT_REMAP_C33_C34__COL_MAN_GAMUT_REMAP_C33_MASK
  60172. COL_MAN1_COL_MAN_GAMUT_REMAP_C33_C34__COL_MAN_GAMUT_REMAP_C33__SHIFT
  60173. COL_MAN1_COL_MAN_GAMUT_REMAP_C33_C34__COL_MAN_GAMUT_REMAP_C34_MASK
  60174. COL_MAN1_COL_MAN_GAMUT_REMAP_C33_C34__COL_MAN_GAMUT_REMAP_C34__SHIFT
  60175. COL_MAN1_COL_MAN_GAMUT_REMAP_CONTROL__COL_MAN_GAMUT_REMAP_MODE_MASK
  60176. COL_MAN1_COL_MAN_GAMUT_REMAP_CONTROL__COL_MAN_GAMUT_REMAP_MODE__SHIFT
  60177. COL_MAN1_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_CONVERSION_MODE_MASK
  60178. COL_MAN1_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_CONVERSION_MODE__SHIFT
  60179. COL_MAN1_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_INPUT_TYPE_MASK
  60180. COL_MAN1_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_INPUT_TYPE__SHIFT
  60181. COL_MAN1_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_MODE_MASK
  60182. COL_MAN1_COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_MODE__SHIFT
  60183. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_LUT_10BIT_BYPASS_EN_MASK
  60184. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_LUT_10BIT_BYPASS_EN__SHIFT
  60185. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_MODE_MASK
  60186. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_MODE__SHIFT
  60187. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_FORMAT_MASK
  60188. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_FORMAT__SHIFT
  60189. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_SIGNED_EN_MASK
  60190. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_SIGNED_EN__SHIFT
  60191. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_FORMAT_MASK
  60192. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_FORMAT__SHIFT
  60193. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_SIGNED_EN_MASK
  60194. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_SIGNED_EN__SHIFT
  60195. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_FORMAT_MASK
  60196. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_FORMAT__SHIFT
  60197. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_SIGNED_EN_MASK
  60198. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_SIGNED_EN__SHIFT
  60199. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_B_MASK
  60200. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_B__SHIFT
  60201. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_G_MASK
  60202. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_G__SHIFT
  60203. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_R_MASK
  60204. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_R__SHIFT
  60205. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_10BIT_BYPASS_DBL_BUF_EN_MASK
  60206. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_10BIT_BYPASS_DBL_BUF_EN__SHIFT
  60207. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_RW_MODE_MASK
  60208. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_RW_MODE__SHIFT
  60209. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_VGA_ACCESS_ENABLE_MASK
  60210. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_VGA_ACCESS_ENABLE__SHIFT
  60211. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_WRITE_EN_MASK_MASK
  60212. COL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_WRITE_EN_MASK__SHIFT
  60213. COL_MAN1_COL_MAN_OUTPUT_CSC_CONTROL__OUTPUT_CSC_MODE_MASK
  60214. COL_MAN1_COL_MAN_OUTPUT_CSC_CONTROL__OUTPUT_CSC_MODE__SHIFT
  60215. COL_MAN1_COL_MAN_REGAMMA_CNTLA_END_CNTL1__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_MASK
  60216. COL_MAN1_COL_MAN_REGAMMA_CNTLA_END_CNTL1__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END__SHIFT
  60217. COL_MAN1_COL_MAN_REGAMMA_CNTLA_END_CNTL2__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_BASE_MASK
  60218. COL_MAN1_COL_MAN_REGAMMA_CNTLA_END_CNTL2__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_BASE__SHIFT
  60219. COL_MAN1_COL_MAN_REGAMMA_CNTLA_END_CNTL2__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_SLOPE_MASK
  60220. COL_MAN1_COL_MAN_REGAMMA_CNTLA_END_CNTL2__COL_MAN_REGAMMA_CNTLA_EXP_REGION_END_SLOPE__SHIFT
  60221. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET_MASK
  60222. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET__SHIFT
  60223. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS_MASK
  60224. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS__SHIFT
  60225. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET_MASK
  60226. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET__SHIFT
  60227. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS_MASK
  60228. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_0_1__COL_MAN_REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS__SHIFT
  60229. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION10_LUT_OFFSET_MASK
  60230. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION10_LUT_OFFSET__SHIFT
  60231. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION10_NUM_SEGMENTS_MASK
  60232. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION10_NUM_SEGMENTS__SHIFT
  60233. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION11_LUT_OFFSET_MASK
  60234. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION11_LUT_OFFSET__SHIFT
  60235. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION11_NUM_SEGMENTS_MASK
  60236. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_10_11__COL_MAN_REGAMMA_CNTLA_EXP_REGION11_NUM_SEGMENTS__SHIFT
  60237. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION12_LUT_OFFSET_MASK
  60238. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION12_LUT_OFFSET__SHIFT
  60239. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION12_NUM_SEGMENTS_MASK
  60240. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION12_NUM_SEGMENTS__SHIFT
  60241. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION13_LUT_OFFSET_MASK
  60242. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION13_LUT_OFFSET__SHIFT
  60243. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION13_NUM_SEGMENTS_MASK
  60244. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_12_13__COL_MAN_REGAMMA_CNTLA_EXP_REGION13_NUM_SEGMENTS__SHIFT
  60245. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION14_LUT_OFFSET_MASK
  60246. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION14_LUT_OFFSET__SHIFT
  60247. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION14_NUM_SEGMENTS_MASK
  60248. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION14_NUM_SEGMENTS__SHIFT
  60249. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION15_LUT_OFFSET_MASK
  60250. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION15_LUT_OFFSET__SHIFT
  60251. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION15_NUM_SEGMENTS_MASK
  60252. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_14_15__COL_MAN_REGAMMA_CNTLA_EXP_REGION15_NUM_SEGMENTS__SHIFT
  60253. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION2_LUT_OFFSET_MASK
  60254. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION2_LUT_OFFSET__SHIFT
  60255. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION2_NUM_SEGMENTS_MASK
  60256. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION2_NUM_SEGMENTS__SHIFT
  60257. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION3_LUT_OFFSET_MASK
  60258. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION3_LUT_OFFSET__SHIFT
  60259. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION3_NUM_SEGMENTS_MASK
  60260. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_2_3__COL_MAN_REGAMMA_CNTLA_EXP_REGION3_NUM_SEGMENTS__SHIFT
  60261. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION4_LUT_OFFSET_MASK
  60262. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION4_LUT_OFFSET__SHIFT
  60263. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION4_NUM_SEGMENTS_MASK
  60264. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION4_NUM_SEGMENTS__SHIFT
  60265. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION5_LUT_OFFSET_MASK
  60266. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION5_LUT_OFFSET__SHIFT
  60267. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION5_NUM_SEGMENTS_MASK
  60268. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_4_5__COL_MAN_REGAMMA_CNTLA_EXP_REGION5_NUM_SEGMENTS__SHIFT
  60269. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION6_LUT_OFFSET_MASK
  60270. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION6_LUT_OFFSET__SHIFT
  60271. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION6_NUM_SEGMENTS_MASK
  60272. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION6_NUM_SEGMENTS__SHIFT
  60273. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION7_LUT_OFFSET_MASK
  60274. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION7_LUT_OFFSET__SHIFT
  60275. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION7_NUM_SEGMENTS_MASK
  60276. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_6_7__COL_MAN_REGAMMA_CNTLA_EXP_REGION7_NUM_SEGMENTS__SHIFT
  60277. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION8_LUT_OFFSET_MASK
  60278. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION8_LUT_OFFSET__SHIFT
  60279. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION8_NUM_SEGMENTS_MASK
  60280. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION8_NUM_SEGMENTS__SHIFT
  60281. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION9_LUT_OFFSET_MASK
  60282. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION9_LUT_OFFSET__SHIFT
  60283. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION9_NUM_SEGMENTS_MASK
  60284. COL_MAN1_COL_MAN_REGAMMA_CNTLA_REGION_8_9__COL_MAN_REGAMMA_CNTLA_EXP_REGION9_NUM_SEGMENTS__SHIFT
  60285. COL_MAN1_COL_MAN_REGAMMA_CNTLA_SLOPE_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE_MASK
  60286. COL_MAN1_COL_MAN_REGAMMA_CNTLA_SLOPE_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE__SHIFT
  60287. COL_MAN1_COL_MAN_REGAMMA_CNTLA_START_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_START_MASK
  60288. COL_MAN1_COL_MAN_REGAMMA_CNTLA_START_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_START_SEGMENT_MASK
  60289. COL_MAN1_COL_MAN_REGAMMA_CNTLA_START_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_START_SEGMENT__SHIFT
  60290. COL_MAN1_COL_MAN_REGAMMA_CNTLA_START_CNTL__COL_MAN_REGAMMA_CNTLA_EXP_REGION_START__SHIFT
  60291. COL_MAN1_COL_MAN_REGAMMA_CNTLB_END_CNTL1__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_MASK
  60292. COL_MAN1_COL_MAN_REGAMMA_CNTLB_END_CNTL1__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END__SHIFT
  60293. COL_MAN1_COL_MAN_REGAMMA_CNTLB_END_CNTL2__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_BASE_MASK
  60294. COL_MAN1_COL_MAN_REGAMMA_CNTLB_END_CNTL2__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_BASE__SHIFT
  60295. COL_MAN1_COL_MAN_REGAMMA_CNTLB_END_CNTL2__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_SLOPE_MASK
  60296. COL_MAN1_COL_MAN_REGAMMA_CNTLB_END_CNTL2__COL_MAN_REGAMMA_CNTLB_EXP_REGION_END_SLOPE__SHIFT
  60297. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION0_LUT_OFFSET_MASK
  60298. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION0_LUT_OFFSET__SHIFT
  60299. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION0_NUM_SEGMENTS_MASK
  60300. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION0_NUM_SEGMENTS__SHIFT
  60301. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION1_LUT_OFFSET_MASK
  60302. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION1_LUT_OFFSET__SHIFT
  60303. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION1_NUM_SEGMENTS_MASK
  60304. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_0_1__COL_MAN_REGAMMA_CNTLB_EXP_REGION1_NUM_SEGMENTS__SHIFT
  60305. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION10_LUT_OFFSET_MASK
  60306. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION10_LUT_OFFSET__SHIFT
  60307. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION10_NUM_SEGMENTS_MASK
  60308. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION10_NUM_SEGMENTS__SHIFT
  60309. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION11_LUT_OFFSET_MASK
  60310. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION11_LUT_OFFSET__SHIFT
  60311. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION11_NUM_SEGMENTS_MASK
  60312. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_10_11__COL_MAN_REGAMMA_CNTLB_EXP_REGION11_NUM_SEGMENTS__SHIFT
  60313. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION12_LUT_OFFSET_MASK
  60314. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION12_LUT_OFFSET__SHIFT
  60315. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION12_NUM_SEGMENTS_MASK
  60316. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION12_NUM_SEGMENTS__SHIFT
  60317. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION13_LUT_OFFSET_MASK
  60318. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION13_LUT_OFFSET__SHIFT
  60319. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION13_NUM_SEGMENTS_MASK
  60320. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_12_13__COL_MAN_REGAMMA_CNTLB_EXP_REGION13_NUM_SEGMENTS__SHIFT
  60321. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION14_LUT_OFFSET_MASK
  60322. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION14_LUT_OFFSET__SHIFT
  60323. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION14_NUM_SEGMENTS_MASK
  60324. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION14_NUM_SEGMENTS__SHIFT
  60325. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION15_LUT_OFFSET_MASK
  60326. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION15_LUT_OFFSET__SHIFT
  60327. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION15_NUM_SEGMENTS_MASK
  60328. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_14_15__COL_MAN_REGAMMA_CNTLB_EXP_REGION15_NUM_SEGMENTS__SHIFT
  60329. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION2_LUT_OFFSET_MASK
  60330. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION2_LUT_OFFSET__SHIFT
  60331. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION2_NUM_SEGMENTS_MASK
  60332. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION2_NUM_SEGMENTS__SHIFT
  60333. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION3_LUT_OFFSET_MASK
  60334. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION3_LUT_OFFSET__SHIFT
  60335. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION3_NUM_SEGMENTS_MASK
  60336. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_2_3__COL_MAN_REGAMMA_CNTLB_EXP_REGION3_NUM_SEGMENTS__SHIFT
  60337. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION4_LUT_OFFSET_MASK
  60338. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION4_LUT_OFFSET__SHIFT
  60339. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION4_NUM_SEGMENTS_MASK
  60340. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION4_NUM_SEGMENTS__SHIFT
  60341. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION5_LUT_OFFSET_MASK
  60342. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION5_LUT_OFFSET__SHIFT
  60343. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION5_NUM_SEGMENTS_MASK
  60344. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_4_5__COL_MAN_REGAMMA_CNTLB_EXP_REGION5_NUM_SEGMENTS__SHIFT
  60345. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION6_LUT_OFFSET_MASK
  60346. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION6_LUT_OFFSET__SHIFT
  60347. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION6_NUM_SEGMENTS_MASK
  60348. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION6_NUM_SEGMENTS__SHIFT
  60349. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION7_LUT_OFFSET_MASK
  60350. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION7_LUT_OFFSET__SHIFT
  60351. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION7_NUM_SEGMENTS_MASK
  60352. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_6_7__COL_MAN_REGAMMA_CNTLB_EXP_REGION7_NUM_SEGMENTS__SHIFT
  60353. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION8_LUT_OFFSET_MASK
  60354. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION8_LUT_OFFSET__SHIFT
  60355. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION8_NUM_SEGMENTS_MASK
  60356. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION8_NUM_SEGMENTS__SHIFT
  60357. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION9_LUT_OFFSET_MASK
  60358. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION9_LUT_OFFSET__SHIFT
  60359. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION9_NUM_SEGMENTS_MASK
  60360. COL_MAN1_COL_MAN_REGAMMA_CNTLB_REGION_8_9__COL_MAN_REGAMMA_CNTLB_EXP_REGION9_NUM_SEGMENTS__SHIFT
  60361. COL_MAN1_COL_MAN_REGAMMA_CNTLB_SLOPE_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_LINEAR_SLOPE_MASK
  60362. COL_MAN1_COL_MAN_REGAMMA_CNTLB_SLOPE_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_LINEAR_SLOPE__SHIFT
  60363. COL_MAN1_COL_MAN_REGAMMA_CNTLB_START_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_START_MASK
  60364. COL_MAN1_COL_MAN_REGAMMA_CNTLB_START_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_START_SEGMENT_MASK
  60365. COL_MAN1_COL_MAN_REGAMMA_CNTLB_START_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_START_SEGMENT__SHIFT
  60366. COL_MAN1_COL_MAN_REGAMMA_CNTLB_START_CNTL__COL_MAN_REGAMMA_CNTLB_EXP_REGION_START__SHIFT
  60367. COL_MAN1_COL_MAN_REGAMMA_CONTROL__COL_MAN_REGAMMA_MODE_MASK
  60368. COL_MAN1_COL_MAN_REGAMMA_CONTROL__COL_MAN_REGAMMA_MODE__SHIFT
  60369. COL_MAN1_COL_MAN_REGAMMA_LUT_DATA__COL_MAN_REGAMMA_LUT_DATA_MASK
  60370. COL_MAN1_COL_MAN_REGAMMA_LUT_DATA__COL_MAN_REGAMMA_LUT_DATA__SHIFT
  60371. COL_MAN1_COL_MAN_REGAMMA_LUT_INDEX__COL_MAN_REGAMMA_LUT_INDEX_MASK
  60372. COL_MAN1_COL_MAN_REGAMMA_LUT_INDEX__COL_MAN_REGAMMA_LUT_INDEX__SHIFT
  60373. COL_MAN1_COL_MAN_REGAMMA_LUT_WRITE_EN_MASK__COL_MAN_REGAMMA_LUT_WRITE_EN_MASK_MASK
  60374. COL_MAN1_COL_MAN_REGAMMA_LUT_WRITE_EN_MASK__COL_MAN_REGAMMA_LUT_WRITE_EN_MASK__SHIFT
  60375. COL_MAN1_COL_MAN_UPDATE__COL_MAN_DISABLE_MULTIPLE_UPDATE_MASK
  60376. COL_MAN1_COL_MAN_UPDATE__COL_MAN_DISABLE_MULTIPLE_UPDATE__SHIFT
  60377. COL_MAN1_COL_MAN_UPDATE__COL_MAN_UPDATE_LOCK_MASK
  60378. COL_MAN1_COL_MAN_UPDATE__COL_MAN_UPDATE_LOCK__SHIFT
  60379. COL_MAN1_COL_MAN_UPDATE__COL_MAN_UPDATE_PENDING_MASK
  60380. COL_MAN1_COL_MAN_UPDATE__COL_MAN_UPDATE_PENDING__SHIFT
  60381. COL_MAN1_COL_MAN_UPDATE__COL_MAN_UPDATE_TAKEN_MASK
  60382. COL_MAN1_COL_MAN_UPDATE__COL_MAN_UPDATE_TAKEN__SHIFT
  60383. COL_MAN1_DENORM_CLAMP_CONTROL__DENORM_10BIT_OUT_MASK
  60384. COL_MAN1_DENORM_CLAMP_CONTROL__DENORM_10BIT_OUT__SHIFT
  60385. COL_MAN1_DENORM_CLAMP_CONTROL__DENORM_MODE_MASK
  60386. COL_MAN1_DENORM_CLAMP_CONTROL__DENORM_MODE__SHIFT
  60387. COL_MAN1_DENORM_CLAMP_RANGE_B_CB__RANGE_CLAMP_MAX_B_CB_MASK
  60388. COL_MAN1_DENORM_CLAMP_RANGE_B_CB__RANGE_CLAMP_MAX_B_CB__SHIFT
  60389. COL_MAN1_DENORM_CLAMP_RANGE_B_CB__RANGE_CLAMP_MIN_B_CB_MASK
  60390. COL_MAN1_DENORM_CLAMP_RANGE_B_CB__RANGE_CLAMP_MIN_B_CB__SHIFT
  60391. COL_MAN1_DENORM_CLAMP_RANGE_G_Y__RANGE_CLAMP_MAX_G_Y_MASK
  60392. COL_MAN1_DENORM_CLAMP_RANGE_G_Y__RANGE_CLAMP_MAX_G_Y__SHIFT
  60393. COL_MAN1_DENORM_CLAMP_RANGE_G_Y__RANGE_CLAMP_MIN_G_Y_MASK
  60394. COL_MAN1_DENORM_CLAMP_RANGE_G_Y__RANGE_CLAMP_MIN_G_Y__SHIFT
  60395. COL_MAN1_DENORM_CLAMP_RANGE_R_CR__RANGE_CLAMP_MAX_R_CR_MASK
  60396. COL_MAN1_DENORM_CLAMP_RANGE_R_CR__RANGE_CLAMP_MAX_R_CR__SHIFT
  60397. COL_MAN1_DENORM_CLAMP_RANGE_R_CR__RANGE_CLAMP_MIN_R_CR_MASK
  60398. COL_MAN1_DENORM_CLAMP_RANGE_R_CR__RANGE_CLAMP_MIN_R_CR__SHIFT
  60399. COL_MAN1_INPUT_CSC_C11_C12_A__INPUT_CSC_C11_A_MASK
  60400. COL_MAN1_INPUT_CSC_C11_C12_A__INPUT_CSC_C11_A__SHIFT
  60401. COL_MAN1_INPUT_CSC_C11_C12_A__INPUT_CSC_C12_A_MASK
  60402. COL_MAN1_INPUT_CSC_C11_C12_A__INPUT_CSC_C12_A__SHIFT
  60403. COL_MAN1_INPUT_CSC_C11_C12_B__INPUT_CSC_C11_B_MASK
  60404. COL_MAN1_INPUT_CSC_C11_C12_B__INPUT_CSC_C11_B__SHIFT
  60405. COL_MAN1_INPUT_CSC_C11_C12_B__INPUT_CSC_C12_B_MASK
  60406. COL_MAN1_INPUT_CSC_C11_C12_B__INPUT_CSC_C12_B__SHIFT
  60407. COL_MAN1_INPUT_CSC_C13_C14_A__INPUT_CSC_C13_A_MASK
  60408. COL_MAN1_INPUT_CSC_C13_C14_A__INPUT_CSC_C13_A__SHIFT
  60409. COL_MAN1_INPUT_CSC_C13_C14_A__INPUT_CSC_C14_A_MASK
  60410. COL_MAN1_INPUT_CSC_C13_C14_A__INPUT_CSC_C14_A__SHIFT
  60411. COL_MAN1_INPUT_CSC_C13_C14_B__INPUT_CSC_C13_B_MASK
  60412. COL_MAN1_INPUT_CSC_C13_C14_B__INPUT_CSC_C13_B__SHIFT
  60413. COL_MAN1_INPUT_CSC_C13_C14_B__INPUT_CSC_C14_B_MASK
  60414. COL_MAN1_INPUT_CSC_C13_C14_B__INPUT_CSC_C14_B__SHIFT
  60415. COL_MAN1_INPUT_CSC_C21_C22_A__INPUT_CSC_C21_A_MASK
  60416. COL_MAN1_INPUT_CSC_C21_C22_A__INPUT_CSC_C21_A__SHIFT
  60417. COL_MAN1_INPUT_CSC_C21_C22_A__INPUT_CSC_C22_A_MASK
  60418. COL_MAN1_INPUT_CSC_C21_C22_A__INPUT_CSC_C22_A__SHIFT
  60419. COL_MAN1_INPUT_CSC_C21_C22_B__INPUT_CSC_C21_B_MASK
  60420. COL_MAN1_INPUT_CSC_C21_C22_B__INPUT_CSC_C21_B__SHIFT
  60421. COL_MAN1_INPUT_CSC_C21_C22_B__INPUT_CSC_C22_B_MASK
  60422. COL_MAN1_INPUT_CSC_C21_C22_B__INPUT_CSC_C22_B__SHIFT
  60423. COL_MAN1_INPUT_CSC_C23_C24_A__INPUT_CSC_C23_A_MASK
  60424. COL_MAN1_INPUT_CSC_C23_C24_A__INPUT_CSC_C23_A__SHIFT
  60425. COL_MAN1_INPUT_CSC_C23_C24_A__INPUT_CSC_C24_A_MASK
  60426. COL_MAN1_INPUT_CSC_C23_C24_A__INPUT_CSC_C24_A__SHIFT
  60427. COL_MAN1_INPUT_CSC_C23_C24_B__INPUT_CSC_C23_B_MASK
  60428. COL_MAN1_INPUT_CSC_C23_C24_B__INPUT_CSC_C23_B__SHIFT
  60429. COL_MAN1_INPUT_CSC_C23_C24_B__INPUT_CSC_C24_B_MASK
  60430. COL_MAN1_INPUT_CSC_C23_C24_B__INPUT_CSC_C24_B__SHIFT
  60431. COL_MAN1_INPUT_CSC_C31_C32_A__INPUT_CSC_C31_A_MASK
  60432. COL_MAN1_INPUT_CSC_C31_C32_A__INPUT_CSC_C31_A__SHIFT
  60433. COL_MAN1_INPUT_CSC_C31_C32_A__INPUT_CSC_C32_A_MASK
  60434. COL_MAN1_INPUT_CSC_C31_C32_A__INPUT_CSC_C32_A__SHIFT
  60435. COL_MAN1_INPUT_CSC_C31_C32_B__INPUT_CSC_C31_B_MASK
  60436. COL_MAN1_INPUT_CSC_C31_C32_B__INPUT_CSC_C31_B__SHIFT
  60437. COL_MAN1_INPUT_CSC_C31_C32_B__INPUT_CSC_C32_B_MASK
  60438. COL_MAN1_INPUT_CSC_C31_C32_B__INPUT_CSC_C32_B__SHIFT
  60439. COL_MAN1_INPUT_CSC_C33_C34_A__INPUT_CSC_C33_A_MASK
  60440. COL_MAN1_INPUT_CSC_C33_C34_A__INPUT_CSC_C33_A__SHIFT
  60441. COL_MAN1_INPUT_CSC_C33_C34_A__INPUT_CSC_C34_A_MASK
  60442. COL_MAN1_INPUT_CSC_C33_C34_A__INPUT_CSC_C34_A__SHIFT
  60443. COL_MAN1_INPUT_CSC_C33_C34_B__INPUT_CSC_C33_B_MASK
  60444. COL_MAN1_INPUT_CSC_C33_C34_B__INPUT_CSC_C33_B__SHIFT
  60445. COL_MAN1_INPUT_CSC_C33_C34_B__INPUT_CSC_C34_B_MASK
  60446. COL_MAN1_INPUT_CSC_C33_C34_B__INPUT_CSC_C34_B__SHIFT
  60447. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_B__INPUT_GAMMA_BLACK_OFFSET_B_MASK
  60448. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_B__INPUT_GAMMA_BLACK_OFFSET_B__SHIFT
  60449. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_B__INPUT_GAMMA_WHITE_OFFSET_B_MASK
  60450. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_B__INPUT_GAMMA_WHITE_OFFSET_B__SHIFT
  60451. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_G__INPUT_GAMMA_BLACK_OFFSET_G_MASK
  60452. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_G__INPUT_GAMMA_BLACK_OFFSET_G__SHIFT
  60453. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_G__INPUT_GAMMA_WHITE_OFFSET_G_MASK
  60454. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_G__INPUT_GAMMA_WHITE_OFFSET_G__SHIFT
  60455. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_R__INPUT_GAMMA_BLACK_OFFSET_R_MASK
  60456. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_R__INPUT_GAMMA_BLACK_OFFSET_R__SHIFT
  60457. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_R__INPUT_GAMMA_WHITE_OFFSET_R_MASK
  60458. COL_MAN1_INPUT_GAMMA_BW_OFFSETS_R__INPUT_GAMMA_WHITE_OFFSET_R__SHIFT
  60459. COL_MAN1_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_BLUE_MASK
  60460. COL_MAN1_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_BLUE__SHIFT
  60461. COL_MAN1_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_GREEN_MASK
  60462. COL_MAN1_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_GREEN__SHIFT
  60463. COL_MAN1_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_RED_MASK
  60464. COL_MAN1_INPUT_GAMMA_LUT_30_COLOR__INPUT_GAMMA_LUT_COLOR_10_RED__SHIFT
  60465. COL_MAN1_INPUT_GAMMA_LUT_AUTOFILL__INPUT_GAMMA_LUT_AUTOFILL_DONE_MASK
  60466. COL_MAN1_INPUT_GAMMA_LUT_AUTOFILL__INPUT_GAMMA_LUT_AUTOFILL_DONE__SHIFT
  60467. COL_MAN1_INPUT_GAMMA_LUT_AUTOFILL__INPUT_GAMMA_LUT_AUTOFILL_MASK
  60468. COL_MAN1_INPUT_GAMMA_LUT_AUTOFILL__INPUT_GAMMA_LUT_AUTOFILL__SHIFT
  60469. COL_MAN1_INPUT_GAMMA_LUT_PWL_DATA__INPUT_GAMMA_LUT_BASE_MASK
  60470. COL_MAN1_INPUT_GAMMA_LUT_PWL_DATA__INPUT_GAMMA_LUT_BASE__SHIFT
  60471. COL_MAN1_INPUT_GAMMA_LUT_PWL_DATA__INPUT_GAMMA_LUT_DELTA_MASK
  60472. COL_MAN1_INPUT_GAMMA_LUT_PWL_DATA__INPUT_GAMMA_LUT_DELTA__SHIFT
  60473. COL_MAN1_INPUT_GAMMA_LUT_RW_INDEX__INPUT_GAMMA_LUT_RW_INDEX_MASK
  60474. COL_MAN1_INPUT_GAMMA_LUT_RW_INDEX__INPUT_GAMMA_LUT_RW_INDEX__SHIFT
  60475. COL_MAN1_INPUT_GAMMA_LUT_SEQ_COLOR__INPUT_GAMMA_LUT_SEQ_COLOR_MASK
  60476. COL_MAN1_INPUT_GAMMA_LUT_SEQ_COLOR__INPUT_GAMMA_LUT_SEQ_COLOR__SHIFT
  60477. COL_MAN1_OUTPUT_CSC_C11_C12_A__OUTPUT_CSC_C11_A_MASK
  60478. COL_MAN1_OUTPUT_CSC_C11_C12_A__OUTPUT_CSC_C11_A__SHIFT
  60479. COL_MAN1_OUTPUT_CSC_C11_C12_A__OUTPUT_CSC_C12_A_MASK
  60480. COL_MAN1_OUTPUT_CSC_C11_C12_A__OUTPUT_CSC_C12_A__SHIFT
  60481. COL_MAN1_OUTPUT_CSC_C11_C12_B__OUTPUT_CSC_C11_B_MASK
  60482. COL_MAN1_OUTPUT_CSC_C11_C12_B__OUTPUT_CSC_C11_B__SHIFT
  60483. COL_MAN1_OUTPUT_CSC_C11_C12_B__OUTPUT_CSC_C12_B_MASK
  60484. COL_MAN1_OUTPUT_CSC_C11_C12_B__OUTPUT_CSC_C12_B__SHIFT
  60485. COL_MAN1_OUTPUT_CSC_C13_C14_A__OUTPUT_CSC_C13_A_MASK
  60486. COL_MAN1_OUTPUT_CSC_C13_C14_A__OUTPUT_CSC_C13_A__SHIFT
  60487. COL_MAN1_OUTPUT_CSC_C13_C14_A__OUTPUT_CSC_C14_A_MASK
  60488. COL_MAN1_OUTPUT_CSC_C13_C14_A__OUTPUT_CSC_C14_A__SHIFT
  60489. COL_MAN1_OUTPUT_CSC_C13_C14_B__OUTPUT_CSC_C13_B_MASK
  60490. COL_MAN1_OUTPUT_CSC_C13_C14_B__OUTPUT_CSC_C13_B__SHIFT
  60491. COL_MAN1_OUTPUT_CSC_C13_C14_B__OUTPUT_CSC_C14_B_MASK
  60492. COL_MAN1_OUTPUT_CSC_C13_C14_B__OUTPUT_CSC_C14_B__SHIFT
  60493. COL_MAN1_OUTPUT_CSC_C21_C22_A__OUTPUT_CSC_C21_A_MASK
  60494. COL_MAN1_OUTPUT_CSC_C21_C22_A__OUTPUT_CSC_C21_A__SHIFT
  60495. COL_MAN1_OUTPUT_CSC_C21_C22_A__OUTPUT_CSC_C22_A_MASK
  60496. COL_MAN1_OUTPUT_CSC_C21_C22_A__OUTPUT_CSC_C22_A__SHIFT
  60497. COL_MAN1_OUTPUT_CSC_C21_C22_B__OUTPUT_CSC_C21_B_MASK
  60498. COL_MAN1_OUTPUT_CSC_C21_C22_B__OUTPUT_CSC_C21_B__SHIFT
  60499. COL_MAN1_OUTPUT_CSC_C21_C22_B__OUTPUT_CSC_C22_B_MASK
  60500. COL_MAN1_OUTPUT_CSC_C21_C22_B__OUTPUT_CSC_C22_B__SHIFT
  60501. COL_MAN1_OUTPUT_CSC_C23_C24_A__OUTPUT_CSC_C23_A_MASK
  60502. COL_MAN1_OUTPUT_CSC_C23_C24_A__OUTPUT_CSC_C23_A__SHIFT
  60503. COL_MAN1_OUTPUT_CSC_C23_C24_A__OUTPUT_CSC_C24_A_MASK
  60504. COL_MAN1_OUTPUT_CSC_C23_C24_A__OUTPUT_CSC_C24_A__SHIFT
  60505. COL_MAN1_OUTPUT_CSC_C23_C24_B__OUTPUT_CSC_C23_B_MASK
  60506. COL_MAN1_OUTPUT_CSC_C23_C24_B__OUTPUT_CSC_C23_B__SHIFT
  60507. COL_MAN1_OUTPUT_CSC_C23_C24_B__OUTPUT_CSC_C24_B_MASK
  60508. COL_MAN1_OUTPUT_CSC_C23_C24_B__OUTPUT_CSC_C24_B__SHIFT
  60509. COL_MAN1_OUTPUT_CSC_C31_C32_A__OUTPUT_CSC_C31_A_MASK
  60510. COL_MAN1_OUTPUT_CSC_C31_C32_A__OUTPUT_CSC_C31_A__SHIFT
  60511. COL_MAN1_OUTPUT_CSC_C31_C32_A__OUTPUT_CSC_C32_A_MASK
  60512. COL_MAN1_OUTPUT_CSC_C31_C32_A__OUTPUT_CSC_C32_A__SHIFT
  60513. COL_MAN1_OUTPUT_CSC_C31_C32_B__OUTPUT_CSC_C31_B_MASK
  60514. COL_MAN1_OUTPUT_CSC_C31_C32_B__OUTPUT_CSC_C31_B__SHIFT
  60515. COL_MAN1_OUTPUT_CSC_C31_C32_B__OUTPUT_CSC_C32_B_MASK
  60516. COL_MAN1_OUTPUT_CSC_C31_C32_B__OUTPUT_CSC_C32_B__SHIFT
  60517. COL_MAN1_OUTPUT_CSC_C33_C34_A__OUTPUT_CSC_C33_A_MASK
  60518. COL_MAN1_OUTPUT_CSC_C33_C34_A__OUTPUT_CSC_C33_A__SHIFT
  60519. COL_MAN1_OUTPUT_CSC_C33_C34_A__OUTPUT_CSC_C34_A_MASK
  60520. COL_MAN1_OUTPUT_CSC_C33_C34_A__OUTPUT_CSC_C34_A__SHIFT
  60521. COL_MAN1_OUTPUT_CSC_C33_C34_B__OUTPUT_CSC_C33_B_MASK
  60522. COL_MAN1_OUTPUT_CSC_C33_C34_B__OUTPUT_CSC_C33_B__SHIFT
  60523. COL_MAN1_OUTPUT_CSC_C33_C34_B__OUTPUT_CSC_C34_B_MASK
  60524. COL_MAN1_OUTPUT_CSC_C33_C34_B__OUTPUT_CSC_C34_B__SHIFT
  60525. COL_MAN1_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_OVERFLOW_ACK_MASK
  60526. COL_MAN1_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_OVERFLOW_ACK__SHIFT
  60527. COL_MAN1_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_OVERFLOW_OCCURED_MASK
  60528. COL_MAN1_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_OVERFLOW_OCCURED__SHIFT
  60529. COL_MAN1_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_UNDERFLOW_ACK_MASK
  60530. COL_MAN1_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_UNDERFLOW_ACK__SHIFT
  60531. COL_MAN1_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_UNDERFLOW_OCCURED_MASK
  60532. COL_MAN1_OUTPUT_FIFO_ERROR__OUTPUT_FIFO_UNDERFLOW_OCCURED__SHIFT
  60533. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_C_OVERFLOW_ACK_MASK
  60534. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_C_OVERFLOW_ACK__SHIFT
  60535. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_C_OVERFLOW_OCCURED_MASK
  60536. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_C_OVERFLOW_OCCURED__SHIFT
  60537. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_C_UNDERFLOW_ACK_MASK
  60538. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_C_UNDERFLOW_ACK__SHIFT
  60539. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_C_UNDERFLOW_OCCURED_MASK
  60540. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_C_UNDERFLOW_OCCURED__SHIFT
  60541. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_L_OVERFLOW_ACK_MASK
  60542. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_L_OVERFLOW_ACK__SHIFT
  60543. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_L_OVERFLOW_OCCURED_MASK
  60544. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_L_OVERFLOW_OCCURED__SHIFT
  60545. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_L_UNDERFLOW_ACK_MASK
  60546. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_L_UNDERFLOW_ACK__SHIFT
  60547. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_L_UNDERFLOW_OCCURED_MASK
  60548. COL_MAN1_PACK_FIFO_ERROR__PACK_FIFO_L_UNDERFLOW_OCCURED__SHIFT
  60549. COL_MAN1_PRESCALE_CONTROL__PRESCALE_MODE_MASK
  60550. COL_MAN1_PRESCALE_CONTROL__PRESCALE_MODE__SHIFT
  60551. COL_MAN1_PRESCALE_VALUES_B__PRESCALE_BIAS_B_MASK
  60552. COL_MAN1_PRESCALE_VALUES_B__PRESCALE_BIAS_B__SHIFT
  60553. COL_MAN1_PRESCALE_VALUES_B__PRESCALE_SCALE_B_MASK
  60554. COL_MAN1_PRESCALE_VALUES_B__PRESCALE_SCALE_B__SHIFT
  60555. COL_MAN1_PRESCALE_VALUES_G__PRESCALE_BIAS_G_MASK
  60556. COL_MAN1_PRESCALE_VALUES_G__PRESCALE_BIAS_G__SHIFT
  60557. COL_MAN1_PRESCALE_VALUES_G__PRESCALE_SCALE_G_MASK
  60558. COL_MAN1_PRESCALE_VALUES_G__PRESCALE_SCALE_G__SHIFT
  60559. COL_MAN1_PRESCALE_VALUES_R__PRESCALE_BIAS_R_MASK
  60560. COL_MAN1_PRESCALE_VALUES_R__PRESCALE_BIAS_R__SHIFT
  60561. COL_MAN1_PRESCALE_VALUES_R__PRESCALE_SCALE_R_MASK
  60562. COL_MAN1_PRESCALE_VALUES_R__PRESCALE_SCALE_R__SHIFT
  60563. COL_MAN_DEBUG_CONTROL__COL_MAN_GLOBAL_PASSTHROUGH_ENABLE_MASK
  60564. COL_MAN_DEBUG_CONTROL__COL_MAN_GLOBAL_PASSTHROUGH_ENABLE__SHIFT
  60565. COL_MAN_DEGAMMA_MODE
  60566. COL_MAN_DENORM_CLAMP_CONTROL
  60567. COL_MAN_DISABLE_MULTIPLE_UPDATE
  60568. COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_DATA_MASK
  60569. COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_DATA__SHIFT
  60570. COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_INDEX_MASK
  60571. COL_MAN_FP_CONVERTED_FIELD__COL_MAN_FP_CONVERTED_FIELD_INDEX__SHIFT
  60572. COL_MAN_GAMMA_CORR_CONTROL
  60573. COL_MAN_GAMUT_REMAP_MODE
  60574. COL_MAN_GLOBAL_PASSTHROUGH_ENABLE
  60575. COL_MAN_INPUTCSC_CONVERT
  60576. COL_MAN_INPUTCSC_MODE
  60577. COL_MAN_INPUTCSC_TYPE
  60578. COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_CONVERSION_MODE_MASK
  60579. COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_CONVERSION_MODE__SHIFT
  60580. COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_INPUT_TYPE_MASK
  60581. COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_INPUT_TYPE__SHIFT
  60582. COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_MODE_MASK
  60583. COL_MAN_INPUT_CSC_CONTROL__INPUT_CSC_MODE__SHIFT
  60584. COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_LUT_10BIT_BYPASS_EN_MASK
  60585. COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_LUT_10BIT_BYPASS_EN__SHIFT
  60586. COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_MODE_MASK
  60587. COL_MAN_INPUT_GAMMA_CONTROL1__INPUT_GAMMA_MODE__SHIFT
  60588. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_FORMAT_MASK
  60589. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_FORMAT__SHIFT
  60590. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_SIGNED_EN_MASK
  60591. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_B_SIGNED_EN__SHIFT
  60592. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_FORMAT_MASK
  60593. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_FORMAT__SHIFT
  60594. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_SIGNED_EN_MASK
  60595. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_G_SIGNED_EN__SHIFT
  60596. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_FORMAT_MASK
  60597. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_FORMAT__SHIFT
  60598. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_SIGNED_EN_MASK
  60599. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_DATA_R_SIGNED_EN__SHIFT
  60600. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_B_MASK
  60601. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_B__SHIFT
  60602. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_G_MASK
  60603. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_G__SHIFT
  60604. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_R_MASK
  60605. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_INC_R__SHIFT
  60606. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_10BIT_BYPASS_DBL_BUF_EN_MASK
  60607. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_10BIT_BYPASS_DBL_BUF_EN__SHIFT
  60608. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_RW_MODE_MASK
  60609. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_RW_MODE__SHIFT
  60610. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_VGA_ACCESS_ENABLE_MASK
  60611. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_VGA_ACCESS_ENABLE__SHIFT
  60612. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_WRITE_EN_MASK_MASK
  60613. COL_MAN_INPUT_GAMMA_CONTROL2__INPUT_GAMMA_LUT_WRITE_EN_MASK__SHIFT
  60614. COL_MAN_INPUT_GAMMA_MODE
  60615. COL_MAN_MULTIPLE_UPDATE
  60616. COL_MAN_MULTIPLE_UPDAT_EDISABLE
  60617. COL_MAN_OUTPUT_CSC_A
  60618. COL_MAN_OUTPUT_CSC_B
  60619. COL_MAN_OUTPUT_CSC_BYPASS
  60620. COL_MAN_OUTPUT_CSC_CONTROL__OUTPUT_CSC_MODE_MASK
  60621. COL_MAN_OUTPUT_CSC_CONTROL__OUTPUT_CSC_MODE__SHIFT
  60622. COL_MAN_OUTPUT_CSC_MODE
  60623. COL_MAN_OUTPUT_CSC_RGB
  60624. COL_MAN_OUTPUT_CSC_UNITY
  60625. COL_MAN_OUTPUT_CSC_YCrCb601
  60626. COL_MAN_OUTPUT_CSC_YCrCb709
  60627. COL_MAN_PRESCALE_MODE
  60628. COL_MAN_REGAMMA_MODE_A
  60629. COL_MAN_REGAMMA_MODE_B
  60630. COL_MAN_REGAMMA_MODE_BYPASS
  60631. COL_MAN_REGAMMA_MODE_CONTROL
  60632. COL_MAN_REGAMMA_MODE_ROM_A
  60633. COL_MAN_REGAMMA_MODE_ROM_B
  60634. COL_MAN_TEST_DEBUG_DATA__COL_MAN_TEST_DEBUG_DATA_MASK
  60635. COL_MAN_TEST_DEBUG_DATA__COL_MAN_TEST_DEBUG_DATA__SHIFT
  60636. COL_MAN_TEST_DEBUG_INDEX__COL_MAN_TEST_DEBUG_INDEX_MASK
  60637. COL_MAN_TEST_DEBUG_INDEX__COL_MAN_TEST_DEBUG_INDEX__SHIFT
  60638. COL_MAN_TEST_DEBUG_INDEX__COL_MAN_TEST_DEBUG_WRITE_EN_MASK
  60639. COL_MAN_TEST_DEBUG_INDEX__COL_MAN_TEST_DEBUG_WRITE_EN__SHIFT
  60640. COL_MAN_UPDATE_LOCK
  60641. COL_MAN_UPDATE_LOCKED
  60642. COL_MAN_UPDATE_UNLOCKED
  60643. COL_MAN_UPDATE__COL_MAN_DISABLE_MULTIPLE_UPDATE_MASK
  60644. COL_MAN_UPDATE__COL_MAN_DISABLE_MULTIPLE_UPDATE__SHIFT
  60645. COL_MAN_UPDATE__COL_MAN_UPDATE_LOCK_MASK
  60646. COL_MAN_UPDATE__COL_MAN_UPDATE_LOCK__SHIFT
  60647. COL_MAN_UPDATE__COL_MAN_UPDATE_PENDING_MASK
  60648. COL_MAN_UPDATE__COL_MAN_UPDATE_PENDING__SHIFT
  60649. COL_MAN_UPDATE__COL_MAN_UPDATE_TAKEN_MASK
  60650. COL_MAN_UPDATE__COL_MAN_UPDATE_TAKEN__SHIFT
  60651. COL_MAX_VAL_MASK
  60652. COL_MENU
  60653. COL_MOD
  60654. COL_NAME
  60655. COL_NO
  60656. COL_NUMBER
  60657. COL_OPTION
  60658. COL_PIXBUF
  60659. COL_PIXVIS
  60660. COL_RED
  60661. COL_SLOT_TIME
  60662. COL_VALUE
  60663. COL_WIDTH_BITS
  60664. COL_YES
  60665. COM
  60666. COM1
  60667. COM10
  60668. COM10_HREF_INV
  60669. COM10_HREF_REV
  60670. COM10_HSYNC
  60671. COM10_HS_NEG
  60672. COM10_PCLK_HB
  60673. COM10_PCLK_HREF
  60674. COM10_PCLK_RISE
  60675. COM10_VSINC_INV
  60676. COM10_VS_LEAD
  60677. COM10_VS_NEG
  60678. COM11
  60679. COM11_50HZ
  60680. COM11_AEC_REF_MASK
  60681. COM11_BANDING
  60682. COM11_EXP
  60683. COM11_HZAUTO
  60684. COM11_NIGHT
  60685. COM11_NMFR
  60686. COM12
  60687. COM12_HREF
  60688. COM13
  60689. COM13_CMATRIX
  60690. COM13_GAMMA
  60691. COM13_UVSAT
  60692. COM13_UVSWAP
  60693. COM14
  60694. COM14_DCWEN
  60695. COM14_EDGE_EN
  60696. COM14_EEF_X2
  60697. COM15
  60698. COM15_R00FF
  60699. COM15_R01FE
  60700. COM15_R10F0
  60701. COM15_RGB555
  60702. COM15_RGB565
  60703. COM15_RGBFIXME
  60704. COM15_SWAPRB
  60705. COM16
  60706. COM16_AWBGAIN
  60707. COM17_AECWIN
  60708. COM17_CBAR
  60709. COM19
  60710. COM1_1_DUMMY_FR
  60711. COM1_3_DUMMY_FR
  60712. COM1_7_DUMMY_FR
  60713. COM1_BASE
  60714. COM1_CCIR656
  60715. COM1_CTS_MARK
  60716. COM1_INTERRUPT
  60717. COM1_IRQ
  60718. COM1_PRIMARY_BASE
  60719. COM1_QFMT
  60720. COM1_RTS_MARK
  60721. COM1_RXD_MARK
  60722. COM1_SKIP_0
  60723. COM1_SKIP_2
  60724. COM1_SKIP_3
  60725. COM1_TXD_MARK
  60726. COM1_VWIN_LSB_CIF
  60727. COM1_VWIN_LSB_SVGA
  60728. COM1_VWIN_LSB_UXGA
  60729. COM2
  60730. COM20020_REG_RW_MEMDATA
  60731. COM20020_REG_R_DIAGSTAT
  60732. COM20020_REG_R_STATUS
  60733. COM20020_REG_W_ADDR_HI
  60734. COM20020_REG_W_ADDR_LO
  60735. COM20020_REG_W_COMMAND
  60736. COM20020_REG_W_CONFIG
  60737. COM20020_REG_W_INTMASK
  60738. COM20020_REG_W_SUBADR
  60739. COM20020_REG_W_XREG
  60740. COM22
  60741. COM22_DENOISE
  60742. COM22_WHTPCOR
  60743. COM22_WHTPCOROPT
  60744. COM23_TEST_MODE
  60745. COM25
  60746. COM25_50HZ_BANDING_AEC_MSBS_MASK
  60747. COM25_50HZ_BANDING_AEC_MSBS_SET
  60748. COM25_60HZ_BANDING_AEC_MSBS_MASK
  60749. COM25_60HZ_BANDING_AEC_MSBS_SET
  60750. COM2_BASE
  60751. COM2_CTS_MARK
  60752. COM2_DCD_MARK
  60753. COM2_DSR_MARK
  60754. COM2_DTR_MARK
  60755. COM2_INTERRUPT
  60756. COM2_IRQ
  60757. COM2_OCAP_Nx_SET
  60758. COM2_PRIMARY_BASE
  60759. COM2_RI_MARK
  60760. COM2_RTS_MARK
  60761. COM2_RXD_MARK
  60762. COM2_SOFT_SLEEP_MODE
  60763. COM2_SSLEEP
  60764. COM2_TXD_MARK
  60765. COM3
  60766. COM3_BAND_50H
  60767. COM3_BAND_AUTO
  60768. COM3_DCWEN
  60769. COM3_SCALEEN
  60770. COM3_SING_FR_SNAPSH
  60771. COM3_SWAP
  60772. COM3_VARIOPIXEL1
  60773. COM4
  60774. COM4_RESERVED
  60775. COM4_VARIOPIXEL2
  60776. COM5
  60777. COM5_SLAVE_MODE
  60778. COM5_SYSTEMCLOCK48MHZ
  60779. COM6
  60780. COM7
  60781. COM7_BAYER
  60782. COM7_COLOR_BAR_TEST
  60783. COM7_FMT_CIF
  60784. COM7_FMT_MASK
  60785. COM7_FMT_QCIF
  60786. COM7_FMT_QVGA
  60787. COM7_FMT_SXGA
  60788. COM7_FMT_VGA
  60789. COM7_PBAYER
  60790. COM7_RESET
  60791. COM7_RES_CIF
  60792. COM7_RES_SVGA
  60793. COM7_RES_UXGA
  60794. COM7_RGB
  60795. COM7_SRST
  60796. COM7_YUV
  60797. COM7_ZOOM_EN
  60798. COM8
  60799. COM8_AEC
  60800. COM8_AECSTEP
  60801. COM8_AEC_EN
  60802. COM8_AGC
  60803. COM8_AGC_EN
  60804. COM8_AWB
  60805. COM8_BFILT
  60806. COM8_BNDF_EN
  60807. COM8_DEF
  60808. COM8_FASTAEC
  60809. COM9
  60810. COM9026_REG_RW_CONFIG
  60811. COM9026_REG_RW_MEMDATA
  60812. COM9026_REG_R_RESET
  60813. COM9026_REG_R_STATION
  60814. COM9026_REG_R_STATUS
  60815. COM9026_REG_W_ADDR_HI
  60816. COM9026_REG_W_ADDR_LO
  60817. COM9026_REG_W_COMMAND
  60818. COM9026_REG_W_INTMASK
  60819. COM9_AGC_GAIN_128x
  60820. COM9_AGC_GAIN_16x
  60821. COM9_AGC_GAIN_2x
  60822. COM9_AGC_GAIN_32x
  60823. COM9_AGC_GAIN_4x
  60824. COM9_AGC_GAIN_64x
  60825. COM9_AGC_GAIN_8x
  60826. COM9_GAIN_CEIL_MASK
  60827. COMADJ_DEFAULT
  60828. COMADJ_MAGIC
  60829. COMA_BW
  60830. COMA_BYTE_SWAP
  60831. COMA_QCIF
  60832. COMA_RAW_RGB
  60833. COMA_RESET
  60834. COMA_RGB
  60835. COMA_WORD_SWAP
  60836. COMB
  60837. COMBINE
  60838. COMBINED_BUFFER_SIZE
  60839. COMBINED_PERM_MASK
  60840. COMBINER_ENABLE_CLEAR
  60841. COMBINER_ENABLE_SET
  60842. COMBINER_INT_STATUS
  60843. COMBINE_HI_4LO
  60844. COMBINE_HI_8LO
  60845. COMBIOS_ASIC_INIT_1_TABLE
  60846. COMBIOS_ASIC_INIT_2_TABLE
  60847. COMBIOS_ASIC_INIT_3_TABLE
  60848. COMBIOS_ASIC_INIT_4_TABLE
  60849. COMBIOS_ASIC_INIT_5_TABLE
  60850. COMBIOS_BIOS_SUPPORT_TABLE
  60851. COMBIOS_COMPONENT_VIDEO_INFO_TABLE
  60852. COMBIOS_CONNECTOR_INFO_TABLE
  60853. COMBIOS_CRTC_INFO_TABLE
  60854. COMBIOS_CRT_INFO_TABLE
  60855. COMBIOS_DAC_PROGRAMMING_TABLE
  60856. COMBIOS_DETECTED_MEM_TABLE
  60857. COMBIOS_DFP_INFO_TABLE
  60858. COMBIOS_DYN_CLK_1_TABLE
  60859. COMBIOS_DYN_CLK_2_TABLE
  60860. COMBIOS_EXT_DAC_INFO_TABLE
  60861. COMBIOS_EXT_TMDS_INFO_TABLE
  60862. COMBIOS_FAN_SPEED_INFO_TABLE
  60863. COMBIOS_GPIO_INFO_TABLE
  60864. COMBIOS_HARDCODED_EDID_TABLE
  60865. COMBIOS_HW_CONFIG_INFO_TABLE
  60866. COMBIOS_I2C_INFO_TABLE
  60867. COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE
  60868. COMBIOS_LCD_DDC_INFO_TABLE
  60869. COMBIOS_LCD_INFO_TABLE
  60870. COMBIOS_MAX_COLOR_DEPTH_TABLE
  60871. COMBIOS_MEM_CLK_INFO_TABLE
  60872. COMBIOS_MEM_CONFIG_TABLE
  60873. COMBIOS_MISC_INFO_TABLE
  60874. COMBIOS_MOBILE_INFO_TABLE
  60875. COMBIOS_MULTIMEDIA_INFO_TABLE
  60876. COMBIOS_OEM_INFO_TABLE
  60877. COMBIOS_OVERDRIVE_INFO_TABLE
  60878. COMBIOS_PLL_INFO_TABLE
  60879. COMBIOS_PLL_INIT_TABLE
  60880. COMBIOS_POWERPLAY_INFO_TABLE
  60881. COMBIOS_POWER_CONNECTOR_INFO_TABLE
  60882. COMBIOS_RAM_RESET_TABLE
  60883. COMBIOS_RESERVED_MEM_TABLE
  60884. COMBIOS_SAVE_MASK_TABLE
  60885. COMBIOS_TMDS_POWER_OFF_TABLE
  60886. COMBIOS_TMDS_POWER_ON_TABLE
  60887. COMBIOS_TMDS_POWER_TABLE
  60888. COMBIOS_TV_INFO_TABLE
  60889. COMBIOS_TV_STD_PATCH_TABLE
  60890. COMBIST
  60891. COMBISTDONE
  60892. COMBISTEN
  60893. COMBISTFAIL
  60894. COMBLKRST
  60895. COMBO_PHY_MODE_DSI
  60896. COMBPHY_BYPASS_CODEC
  60897. COMBPHY_CFG_REG
  60898. COMBPHY_CLKREF_OUT_OEN
  60899. COMBPHY_MODE_PCIE
  60900. COMBPHY_MODE_SATA
  60901. COMBPHY_MODE_USB3
  60902. COMBPHY_TEST_ADDR_MASK
  60903. COMBPHY_TEST_ADDR_SHIFT
  60904. COMBPHY_TEST_DATA_MASK
  60905. COMBPHY_TEST_DATA_SHIFT
  60906. COMBPHY_TEST_WRITE
  60907. COMB_2D_BLEND
  60908. COMB_2D_HFD_CFG
  60909. COMB_2D_HFS_CFG
  60910. COMB_2D_LF_CFG
  60911. COMB_AEC
  60912. COMB_AGC
  60913. COMB_AWB
  60914. COMB_BAND_FILTER
  60915. COMB_CTRL
  60916. COMB_DST_MINUS_SRC
  60917. COMB_DST_PLUS_SRC
  60918. COMB_FLAT_NOISE_CTRL
  60919. COMB_FLAT_THRESH_CTRL
  60920. COMB_FLIP_H
  60921. COMB_FLIP_V
  60922. COMB_MAX_DST_SRC
  60923. COMB_MIN_DST_SRC
  60924. COMB_MISC_CTRL
  60925. COMB_SRC_MINUS_DST
  60926. COMB_TEST
  60927. COMCTRL_CTS
  60928. COMCTRL_DCD
  60929. COMCTRL_DSR
  60930. COMCTRL_DTR
  60931. COMCTRL_RI
  60932. COMCTRL_RTS
  60933. COMEDI32_CHANINFO
  60934. COMEDI32_CMD
  60935. COMEDI32_CMDTEST
  60936. COMEDI32_INSN
  60937. COMEDI32_INSNLIST
  60938. COMEDI32_RANGEINFO
  60939. COMEDI_BUFCONFIG
  60940. COMEDI_BUFINFO
  60941. COMEDI_CANCEL
  60942. COMEDI_CB_BLOCK
  60943. COMEDI_CB_CANCEL_MASK
  60944. COMEDI_CB_EOA
  60945. COMEDI_CB_EOBUF
  60946. COMEDI_CB_EOS
  60947. COMEDI_CB_ERROR
  60948. COMEDI_CB_ERROR_MASK
  60949. COMEDI_CB_OVERFLOW
  60950. COMEDI_CHANINFO
  60951. COMEDI_CMD
  60952. COMEDI_CMDTEST
  60953. COMEDI_COUNTER_ARMED
  60954. COMEDI_COUNTER_COUNTING
  60955. COMEDI_COUNTER_TERMINAL_COUNT
  60956. COMEDI_DEVCONFIG
  60957. COMEDI_DEVCONF_AUX_DATA0_LENGTH
  60958. COMEDI_DEVCONF_AUX_DATA1_LENGTH
  60959. COMEDI_DEVCONF_AUX_DATA2_LENGTH
  60960. COMEDI_DEVCONF_AUX_DATA3_LENGTH
  60961. COMEDI_DEVCONF_AUX_DATA_HI
  60962. COMEDI_DEVCONF_AUX_DATA_LENGTH
  60963. COMEDI_DEVCONF_AUX_DATA_LO
  60964. COMEDI_DEVINFO
  60965. COMEDI_DIGITAL_TRIG_DISABLE
  60966. COMEDI_DIGITAL_TRIG_ENABLE_EDGES
  60967. COMEDI_DIGITAL_TRIG_ENABLE_LEVELS
  60968. COMEDI_EV_CONVERT
  60969. COMEDI_EV_SCAN_BEGIN
  60970. COMEDI_EV_SCAN_END
  60971. COMEDI_EV_START
  60972. COMEDI_EV_STOP
  60973. COMEDI_INPUT
  60974. COMEDI_INSN
  60975. COMEDI_INSNLIST
  60976. COMEDI_ISADMA_READ
  60977. COMEDI_ISADMA_WRITE
  60978. COMEDI_LOCK
  60979. COMEDI_MAJOR
  60980. COMEDI_MAJORVERSION
  60981. COMEDI_MICROVERSION
  60982. COMEDI_MINORVERSION
  60983. COMEDI_MIN_SPEED
  60984. COMEDI_NAMELEN
  60985. COMEDI_NDEVCONFOPTS
  60986. COMEDI_NDEVICES
  60987. COMEDI_NUM_BOARD_MINORS
  60988. COMEDI_NUM_MINORS
  60989. COMEDI_NUM_SUBDEVICE_MINORS
  60990. COMEDI_OPENDRAIN
  60991. COMEDI_OUTPUT
  60992. COMEDI_PAGE_PROTECTION
  60993. COMEDI_POLL
  60994. COMEDI_RANGEINFO
  60995. COMEDI_RELEASE
  60996. COMEDI_SETRSUBD
  60997. COMEDI_SETWSUBD
  60998. COMEDI_SRF_BUSY_MASK
  60999. COMEDI_SRF_ERROR
  61000. COMEDI_SRF_FREE_SPRIV
  61001. COMEDI_SRF_RT
  61002. COMEDI_SRF_RUNNING
  61003. COMEDI_SUBDINFO
  61004. COMEDI_SUBD_AI
  61005. COMEDI_SUBD_AO
  61006. COMEDI_SUBD_CALIB
  61007. COMEDI_SUBD_COUNTER
  61008. COMEDI_SUBD_DI
  61009. COMEDI_SUBD_DIO
  61010. COMEDI_SUBD_DO
  61011. COMEDI_SUBD_MEMORY
  61012. COMEDI_SUBD_PROC
  61013. COMEDI_SUBD_PWM
  61014. COMEDI_SUBD_SERIAL
  61015. COMEDI_SUBD_TIMER
  61016. COMEDI_SUBD_UNUSED
  61017. COMEDI_SUPPORTED
  61018. COMEDI_TIMEOUT_MS
  61019. COMEDI_UNKNOWN_SUPPORT
  61020. COMEDI_UNLOCK
  61021. COMEDI_UNSUPPORTED
  61022. COMEDI_VERSION
  61023. COMEDI_VERSION_CODE
  61024. COMET
  61025. COMET_MAC_ADDR
  61026. COMET_PM
  61027. COMF_HREF_LOW
  61028. COMINT
  61029. COMJ_PCLK_RISING
  61030. COMJ_VSYNC_HIGH
  61031. COMLANE_R138
  61032. COMLANE_R190
  61033. COMLANE_R194
  61034. COML_ONE_CHANNEL
  61035. COMM
  61036. COMMA
  61037. COMMAND
  61038. COMMANDABORT
  61039. COMMANDCTRL
  61040. COMMANDDATA
  61041. COMMANDEXTRA_2D
  61042. COMMANDLIST_ALIGNMENT
  61043. COMMANDPHASEDONE
  61044. COMMANDREG
  61045. COMMANDSET_MEDIA_STATUS
  61046. COMMANDSET_REMOVABLE
  61047. COMMANDSTAT
  61048. COMMANDS_PER_QUEUE
  61049. COMMAND_2D
  61050. COMMAND_2D_FILLRECT
  61051. COMMAND_2D_H2S_BITBLT
  61052. COMMAND_2D_S2S_BITBLT
  61053. COMMAND_3D
  61054. COMMAND_3D_NOP
  61055. COMMAND_52
  61056. COMMAND_5C
  61057. COMMAND_60
  61058. COMMAND_66
  61059. COMMAND_6C
  61060. COMMAND_6E
  61061. COMMAND_88
  61062. COMMAND_A64_TYPE
  61063. COMMAND_ABORTED
  61064. COMMAND_ACK_DELAY
  61065. COMMAND_ACK_MASK
  61066. COMMAND_ADDR_OUT
  61067. COMMAND_AFT_DAT
  61068. COMMAND_ALE
  61069. COMMAND_ALE_SIZE
  61070. COMMAND_A_VALID
  61071. COMMAND_BIDIRECTIONAL
  61072. COMMAND_BITS
  61073. COMMAND_BUFFER_SIZE
  61074. COMMAND_BUFFER_SIZE8
  61075. COMMAND_BUSY
  61076. COMMAND_BYTE_MASK
  61077. COMMAND_BYTE_SHIFT
  61078. COMMAND_B_VALID
  61079. COMMAND_C5
  61080. COMMAND_CAR_BYTE1
  61081. COMMAND_CAR_BYTE2
  61082. COMMAND_CE
  61083. COMMAND_CHANNEL0
  61084. COMMAND_CHANNEL1
  61085. COMMAND_CLE
  61086. COMMAND_CLE_SIZE
  61087. COMMAND_CMD_BYTE1
  61088. COMMAND_CMD_BYTE2
  61089. COMMAND_CMD_BYTE3
  61090. COMMAND_COMPLETE
  61091. COMMAND_CONTROL
  61092. COMMAND_COPY
  61093. COMMAND_DATA
  61094. COMMAND_DATAREQUEST
  61095. COMMAND_DEACTIVATE
  61096. COMMAND_DETECTED
  61097. COMMAND_DIC
  61098. COMMAND_DISABLE_GROUP_1_MACRO_BUTTONS
  61099. COMMAND_DISABLE_INCREMENTAL_MODE
  61100. COMMAND_ENABLE_ALL_MACRO_BUTTONS
  61101. COMMAND_ENABLE_CONTINUOUS_MODE
  61102. COMMAND_ENABLE_PRESSURE_MODE
  61103. COMMAND_ENTRIES
  61104. COMMAND_EP
  61105. COMMAND_ERROR
  61106. COMMAND_FAILED
  61107. COMMAND_FAILED_TEST
  61108. COMMAND_FIFO_CLEAR
  61109. COMMAND_FIFO_DISABLE
  61110. COMMAND_FIFO_ENABLE
  61111. COMMAND_FIFO_STATUS
  61112. COMMAND_FLASH_ERASE_FAILURE
  61113. COMMAND_GET_COLOR_PARAMS
  61114. COMMAND_GLOBAL
  61115. COMMAND_GO
  61116. COMMAND_INFLIGHT
  61117. COMMAND_INITIALIZE
  61118. COMMAND_INIT_DESCRIPTOR
  61119. COMMAND_INTR_MASK
  61120. COMMAND_INVALID
  61121. COMMAND_IN_PROGRESS
  61122. COMMAND_LENGTH_MASK
  61123. COMMAND_LENGTH_SHIFT
  61124. COMMAND_LINE
  61125. COMMAND_LINE_OFFSET
  61126. COMMAND_LINE_SIZE
  61127. COMMAND_LINE_STATUS_MASK
  61128. COMMAND_MASK
  61129. COMMAND_MEM_ADDRESS_MASK
  61130. COMMAND_MEM_ADDRESS_SHIFT
  61131. COMMAND_MULTI_MODE_INPUT
  61132. COMMAND_NADDR_BYTES
  61133. COMMAND_NONE
  61134. COMMAND_NOOP
  61135. COMMAND_NVME
  61136. COMMAND_OK
  61137. COMMAND_ONLY
  61138. COMMAND_OPCODE_MASK
  61139. COMMAND_ORB_DATA_SIZE
  61140. COMMAND_ORB_DIRECTION
  61141. COMMAND_ORB_MAX_PAYLOAD
  61142. COMMAND_ORB_NOTIFY
  61143. COMMAND_ORB_PAGE_SIZE
  61144. COMMAND_ORB_PAGE_TABLE_PRESENT
  61145. COMMAND_ORB_REQUEST_FORMAT
  61146. COMMAND_ORB_SPEED
  61147. COMMAND_ORIGIN_IN_UPPER_LEFT
  61148. COMMAND_PACKET_SIZE
  61149. COMMAND_PARAM_ERROR
  61150. COMMAND_PASSED_TEST
  61151. COMMAND_PD
  61152. COMMAND_PENDING
  61153. COMMAND_PHASE
  61154. COMMAND_PIO
  61155. COMMAND_PIPE
  61156. COMMAND_PORT
  61157. COMMAND_PORT_ADDR_ASSGN_CMD
  61158. COMMAND_PORT_ARG_DATA_LEN
  61159. COMMAND_PORT_ARG_DATA_LEN_MAX
  61160. COMMAND_PORT_CMD
  61161. COMMAND_PORT_CP
  61162. COMMAND_PORT_DEV_COUNT
  61163. COMMAND_PORT_DEV_INDEX
  61164. COMMAND_PORT_READ_TRANSFER
  61165. COMMAND_PORT_ROC
  61166. COMMAND_PORT_SDAP
  61167. COMMAND_PORT_SDA_BYTE_STRB_1
  61168. COMMAND_PORT_SDA_BYTE_STRB_2
  61169. COMMAND_PORT_SDA_BYTE_STRB_3
  61170. COMMAND_PORT_SDA_DATA_BYTE_1
  61171. COMMAND_PORT_SDA_DATA_BYTE_2
  61172. COMMAND_PORT_SDA_DATA_BYTE_3
  61173. COMMAND_PORT_SHORT_DATA_ARG
  61174. COMMAND_PORT_SPEED
  61175. COMMAND_PORT_TID
  61176. COMMAND_PORT_TOC
  61177. COMMAND_PORT_TRANSFER_ARG
  61178. COMMAND_POST_RESULTS
  61179. COMMAND_PTR
  61180. COMMAND_QUEUE_AREA_SIZE
  61181. COMMAND_QUEUE_AREA_SIZE_Z7
  61182. COMMAND_QUEUE_PORT
  61183. COMMAND_QUEUE_THRESHOLD
  61184. COMMAND_RAISE_LEGACY_IRQ
  61185. COMMAND_RAISE_MSIX_IRQ
  61186. COMMAND_RAISE_MSI_IRQ
  61187. COMMAND_RAR_BYTE1
  61188. COMMAND_RAR_BYTE2
  61189. COMMAND_RAR_BYTE3
  61190. COMMAND_RBSY_CHK
  61191. COMMAND_RB_HANDSHAKE
  61192. COMMAND_RD_STATUS_CHK
  61193. COMMAND_READ
  61194. COMMAND_READY
  61195. COMMAND_READ_BAD_ADDRESS
  61196. COMMAND_READ_DATA
  61197. COMMAND_READ_DATA_OK
  61198. COMMAND_READ_ID
  61199. COMMAND_READ_STATUS
  61200. COMMAND_RECONFIG
  61201. COMMAND_RECONFIG_DATA_CLAIM
  61202. COMMAND_RECONFIG_DATA_SUBMIT
  61203. COMMAND_RECONFIG_FLAG_PARTIAL
  61204. COMMAND_RECONFIG_STATUS
  61205. COMMAND_RECORD_MASK
  61206. COMMAND_REG_ATTN_BITS_CLR
  61207. COMMAND_REG_ATTN_BITS_SET
  61208. COMMAND_REG_ATTN_BITS_UPD
  61209. COMMAND_REG_COALESCE_NOW
  61210. COMMAND_REG_INT_ACK
  61211. COMMAND_REG_PROD_UPD
  61212. COMMAND_REG_SIMD_MASK
  61213. COMMAND_REG_SIMD_NOMASK
  61214. COMMAND_RESET
  61215. COMMAND_RESOLUTION
  61216. COMMAND_RETRY_COUNT
  61217. COMMAND_RETURN_STATUS
  61218. COMMAND_RING_SIZE
  61219. COMMAND_RSU_NOTIFY
  61220. COMMAND_RSU_RETRY
  61221. COMMAND_RSU_STATUS
  61222. COMMAND_RSU_UPDATE
  61223. COMMAND_RX
  61224. COMMAND_SCANFREQ
  61225. COMMAND_SEC_CMD
  61226. COMMAND_SEG
  61227. COMMAND_SEG_A64
  61228. COMMAND_SETCONFIG
  61229. COMMAND_SETDATA0
  61230. COMMAND_SET_COLOR_PARAMS
  61231. COMMAND_SET_FLICKER
  61232. COMMAND_SET_FORMAT
  61233. COMMAND_SET_FPS
  61234. COMMAND_SIZE
  61235. COMMAND_ST
  61236. COMMAND_STALL
  61237. COMMAND_STALL_CLEAR
  61238. COMMAND_START_SENDING_PACKETS
  61239. COMMAND_STATUS
  61240. COMMAND_STATUS_VAL
  61241. COMMAND_STOP_SENDING_PACKETS
  61242. COMMAND_TERMINATED
  61243. COMMAND_TIMEOUT
  61244. COMMAND_TIMEOUT_MS
  61245. COMMAND_TRANSMIT_AT_MAX_RATE
  61246. COMMAND_TRANS_SIZE
  61247. COMMAND_TX
  61248. COMMAND_TYPE
  61249. COMMAND_TYPE_6
  61250. COMMAND_TYPE_7
  61251. COMMAND_TYPE_CRC_2
  61252. COMMAND_VALID
  61253. COMMAND_VERSION
  61254. COMMAND_WRITE
  61255. COMMAND_WRITE_BAD_ADDRESS
  61256. COMMAND_WRITE_BAD_DATA
  61257. COMMAND_WRITE_DATA
  61258. COMMAND_WRITE_DATA_OK
  61259. COMMAND_WRITE_FLASH_FAILURE
  61260. COMMAND_Z_FILTER
  61261. COMMAND__AD_STEPPING_MASK
  61262. COMMAND__AD_STEPPING__MASK
  61263. COMMAND__AD_STEPPING__SHIFT
  61264. COMMAND__BUS_MASTER_EN_MASK
  61265. COMMAND__BUS_MASTER_EN__MASK
  61266. COMMAND__BUS_MASTER_EN__SHIFT
  61267. COMMAND__FAST_B2B_EN_MASK
  61268. COMMAND__FAST_B2B_EN__MASK
  61269. COMMAND__FAST_B2B_EN__SHIFT
  61270. COMMAND__INT_DIS_MASK
  61271. COMMAND__INT_DIS__MASK
  61272. COMMAND__INT_DIS__SHIFT
  61273. COMMAND__IO_ACCESS_EN_MASK
  61274. COMMAND__IO_ACCESS_EN__MASK
  61275. COMMAND__IO_ACCESS_EN__SHIFT
  61276. COMMAND__MEM_ACCESS_EN_MASK
  61277. COMMAND__MEM_ACCESS_EN__MASK
  61278. COMMAND__MEM_ACCESS_EN__SHIFT
  61279. COMMAND__MEM_WRITE_INVALIDATE_EN_MASK
  61280. COMMAND__MEM_WRITE_INVALIDATE_EN__MASK
  61281. COMMAND__MEM_WRITE_INVALIDATE_EN__SHIFT
  61282. COMMAND__PAL_SNOOP_EN_MASK
  61283. COMMAND__PAL_SNOOP_EN__MASK
  61284. COMMAND__PAL_SNOOP_EN__SHIFT
  61285. COMMAND__PARITY_ERROR_RESPONSE_MASK
  61286. COMMAND__PARITY_ERROR_RESPONSE__MASK
  61287. COMMAND__PARITY_ERROR_RESPONSE__SHIFT
  61288. COMMAND__SERR_EN_MASK
  61289. COMMAND__SERR_EN__MASK
  61290. COMMAND__SERR_EN__SHIFT
  61291. COMMAND__SPECIAL_CYCLE_EN_MASK
  61292. COMMAND__SPECIAL_CYCLE_EN__MASK
  61293. COMMAND__SPECIAL_CYCLE_EN__SHIFT
  61294. COMMAN_HAL_WAIT_FOR_CARD_READY
  61295. COMMA_DET_EN
  61296. COMMENT
  61297. COMMIT
  61298. COMMIT_BACKGROUND
  61299. COMMIT_BROKEN
  61300. COMMIT_CREATE
  61301. COMMIT_DELETE
  61302. COMMIT_Dirtable
  61303. COMMIT_Dirty
  61304. COMMIT_ENTRY_TO_MMU
  61305. COMMIT_FLUSH
  61306. COMMIT_FORCE
  61307. COMMIT_FREE
  61308. COMMIT_Freewmap
  61309. COMMIT_INODE
  61310. COMMIT_Inlineea
  61311. COMMIT_LAZY
  61312. COMMIT_MAP
  61313. COMMIT_MASK
  61314. COMMIT_MUTEX_CHILD
  61315. COMMIT_MUTEX_PARENT
  61316. COMMIT_MUTEX_SECOND_PARENT
  61317. COMMIT_MUTEX_VICTIM
  61318. COMMIT_NOW
  61319. COMMIT_Nolink
  61320. COMMIT_PAGE
  61321. COMMIT_PERIOD
  61322. COMMIT_PMAP
  61323. COMMIT_PWMAP
  61324. COMMIT_REQUIRED
  61325. COMMIT_RESTING
  61326. COMMIT_RING
  61327. COMMIT_RUNNING_BACKGROUND
  61328. COMMIT_RUNNING_REQUIRED
  61329. COMMIT_SYNC
  61330. COMMIT_Stale
  61331. COMMIT_Synclist
  61332. COMMIT_TRANS
  61333. COMMIT_TRUNCATE
  61334. COMMIT_WMAP
  61335. COMMON_ACTREQ
  61336. COMMON_ASM_INVALID_ASSERT_OPCODE
  61337. COMMON_CAP2_PERMS
  61338. COMMON_CAP_PERMS
  61339. COMMON_CARD_READY_IND
  61340. COMMON_DEV_CONFIG
  61341. COMMON_DISP_RFU1__rfu_value1_MASK
  61342. COMMON_DISP_RFU1__rfu_value1__SHIFT
  61343. COMMON_DISP_RFU2__rfu_value2_MASK
  61344. COMMON_DISP_RFU2__rfu_value2__SHIFT
  61345. COMMON_DISP_RFU3__rfu_value3_MASK
  61346. COMMON_DISP_RFU3__rfu_value3__SHIFT
  61347. COMMON_DISP_RFU4__rfu_value4_MASK
  61348. COMMON_DISP_RFU4__rfu_value4__SHIFT
  61349. COMMON_DISP_RFU5__rfu_value5_MASK
  61350. COMMON_DISP_RFU5__rfu_value5__SHIFT
  61351. COMMON_DISP_RFU6__rfu_value6_MASK
  61352. COMMON_DISP_RFU6__rfu_value6__SHIFT
  61353. COMMON_DISP_RFU7__rfu_value7_MASK
  61354. COMMON_DISP_RFU7__rfu_value7__SHIFT
  61355. COMMON_ENR
  61356. COMMON_EVENT_EMPTY
  61357. COMMON_EVENT_MALICIOUS_VF
  61358. COMMON_EVENT_PF_START
  61359. COMMON_EVENT_PF_STOP
  61360. COMMON_EVENT_PF_UPDATE
  61361. COMMON_EVENT_RL_UPDATE
  61362. COMMON_EVENT_VF_FLR
  61363. COMMON_EVENT_VF_PF_CHANNEL
  61364. COMMON_EVENT_VF_START
  61365. COMMON_EVENT_VF_STOP
  61366. COMMON_FEATURES
  61367. COMMON_FILE_PERMS
  61368. COMMON_FILE_SOCK_PERMS
  61369. COMMON_H
  61370. COMMON_HAL_CARD_READY_IND
  61371. COMMON_H_
  61372. COMMON_INTMSK
  61373. COMMON_INT_MASK_1
  61374. COMMON_INT_MASK_2
  61375. COMMON_INT_MASK_3
  61376. COMMON_INT_MASK_4
  61377. COMMON_IPC_PERMS
  61378. COMMON_KEEPER_EN
  61379. COMMON_LANE_PWRMGMT__pgdelay_MASK
  61380. COMMON_LANE_PWRMGMT__pgdelay__SHIFT
  61381. COMMON_LANE_PWRMGMT__pgmask_MASK
  61382. COMMON_LANE_PWRMGMT__pgmask__SHIFT
  61383. COMMON_LANE_PWRMGMT__vprot_en_MASK
  61384. COMMON_LANE_PWRMGMT__vprot_en__SHIFT
  61385. COMMON_LANE_RESETS__lane_0_reset_l_MASK
  61386. COMMON_LANE_RESETS__lane_0_reset_l__SHIFT
  61387. COMMON_LANE_RESETS__lane_1_reset_l_MASK
  61388. COMMON_LANE_RESETS__lane_1_reset_l__SHIFT
  61389. COMMON_LANE_RESETS__lane_2_reset_l_MASK
  61390. COMMON_LANE_RESETS__lane_2_reset_l__SHIFT
  61391. COMMON_LANE_RESETS__lane_3_reset_l_MASK
  61392. COMMON_LANE_RESETS__lane_3_reset_l__SHIFT
  61393. COMMON_LANE_RESETS__lane_4_reset_l_MASK
  61394. COMMON_LANE_RESETS__lane_4_reset_l__SHIFT
  61395. COMMON_LANE_RESETS__lane_5_reset_l_MASK
  61396. COMMON_LANE_RESETS__lane_5_reset_l__SHIFT
  61397. COMMON_LANE_RESETS__lane_6_reset_l_MASK
  61398. COMMON_LANE_RESETS__lane_6_reset_l__SHIFT
  61399. COMMON_LANE_RESETS__lane_7_reset_l_MASK
  61400. COMMON_LANE_RESETS__lane_7_reset_l__SHIFT
  61401. COMMON_MAR_DEEMPH_NOM__deemph35_gen2_nom_MASK
  61402. COMMON_MAR_DEEMPH_NOM__deemph35_gen2_nom__SHIFT
  61403. COMMON_MAR_DEEMPH_NOM__deemph60_gen2_nom_MASK
  61404. COMMON_MAR_DEEMPH_NOM__deemph60_gen2_nom__SHIFT
  61405. COMMON_MAR_DEEMPH_NOM__deemph_gen1_nom_MASK
  61406. COMMON_MAR_DEEMPH_NOM__deemph_gen1_nom__SHIFT
  61407. COMMON_MAR_DEEMPH_NOM__tx_margin_nom_MASK
  61408. COMMON_MAR_DEEMPH_NOM__tx_margin_nom__SHIFT
  61409. COMMON_PIN
  61410. COMMON_QUEUE_ENTRY_MAX_BYTE_SIZE
  61411. COMMON_RAMROD_EMPTY
  61412. COMMON_RAMROD_ETH_RX_CQE_CID
  61413. COMMON_RAMROD_ETH_RX_CQE_CID_SHIFT
  61414. COMMON_RAMROD_ETH_RX_CQE_CMD_ID
  61415. COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT
  61416. COMMON_RAMROD_ETH_RX_CQE_ERROR
  61417. COMMON_RAMROD_ETH_RX_CQE_ERROR_SHIFT
  61418. COMMON_RAMROD_ETH_RX_CQE_RESERVED0
  61419. COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT
  61420. COMMON_RAMROD_ETH_RX_CQE_TYPE
  61421. COMMON_RAMROD_ETH_RX_CQE_TYPE_SHIFT
  61422. COMMON_RAMROD_PF_START
  61423. COMMON_RAMROD_PF_STOP
  61424. COMMON_RAMROD_PF_UPDATE
  61425. COMMON_RAMROD_RL_UPDATE
  61426. COMMON_RAMROD_UNUSED
  61427. COMMON_RAMROD_VF_START
  61428. COMMON_RAMROD_VF_STOP
  61429. COMMON_REG_LEN
  61430. COMMON_REQUEST_FIELDS
  61431. COMMON_RESET_DIS
  61432. COMMON_RESPONSE_FIELDS
  61433. COMMON_SETUP1
  61434. COMMON_SETUP1_DEFAULT
  61435. COMMON_SETUP2
  61436. COMMON_SETUP3
  61437. COMMON_SLICE_CHICKEN2
  61438. COMMON_SOCK_PERMS
  61439. COMMON_STR
  61440. COMMON_SUBTYPE
  61441. COMMON_TABLE_LOOKUP
  61442. COMMON_TMDP__tmdp_spare_MASK
  61443. COMMON_TMDP__tmdp_spare__SHIFT
  61444. COMMON_TXCNTRL__clkgate_dis_MASK
  61445. COMMON_TXCNTRL__clkgate_dis__SHIFT
  61446. COMMON_TXCNTRL__dual_dvi_en_MASK
  61447. COMMON_TXCNTRL__dual_dvi_en__SHIFT
  61448. COMMON_TXCNTRL__dual_dvi_mstr_en_MASK
  61449. COMMON_TXCNTRL__dual_dvi_mstr_en__SHIFT
  61450. COMMON_TXCNTRL__rdptr_rst_val_gen3_MASK
  61451. COMMON_TXCNTRL__rdptr_rst_val_gen3__SHIFT
  61452. COMMON_TXCNTRL__slew_rate_ctl_gen1_MASK
  61453. COMMON_TXCNTRL__slew_rate_ctl_gen1__SHIFT
  61454. COMMON_TXCNTRL__slew_rate_ctl_gen2_MASK
  61455. COMMON_TXCNTRL__slew_rate_ctl_gen2__SHIFT
  61456. COMMON_TXCNTRL__slew_rate_ctl_gen3_MASK
  61457. COMMON_TXCNTRL__slew_rate_ctl_gen3__SHIFT
  61458. COMMON_UPDATE
  61459. COMMON_USER
  61460. COMMON_USER2_BASE
  61461. COMMON_USER2_POWER7
  61462. COMMON_USER2_POWER8
  61463. COMMON_USER2_POWER9
  61464. COMMON_USER_BASE
  61465. COMMON_USER_BOOKE
  61466. COMMON_USER_PA6T
  61467. COMMON_USER_POWER4
  61468. COMMON_USER_POWER5
  61469. COMMON_USER_POWER5_PLUS
  61470. COMMON_USER_POWER6
  61471. COMMON_USER_POWER7
  61472. COMMON_USER_POWER8
  61473. COMMON_USER_POWER9
  61474. COMMON_USER_PPC64
  61475. COMMON_XML
  61476. COMMON_ZCALCODE_CTRL__tx_binary_code_override_val_MASK
  61477. COMMON_ZCALCODE_CTRL__tx_binary_code_override_val__SHIFT
  61478. COMMON_ZCALCODE_CTRL__tx_driver_fifty_ohms_MASK
  61479. COMMON_ZCALCODE_CTRL__tx_driver_fifty_ohms__SHIFT
  61480. COMMON_ZCALCODE_CTRL__zcalcode_override_MASK
  61481. COMMON_ZCALCODE_CTRL__zcalcode_override__SHIFT
  61482. COMMS
  61483. COMMS_REQ
  61484. COMMUNITY
  61485. COMM_1_WIRE_RESET
  61486. COMM_ACK
  61487. COMM_AE_AUTO_BRACKET
  61488. COMM_AE_AUTO_BRAKET_EV05
  61489. COMM_AE_AUTO_BRAKET_EV10
  61490. COMM_AE_AUTO_BRAKET_EV15
  61491. COMM_AE_AUTO_BRAKET_EV20
  61492. COMM_AE_CON
  61493. COMM_AE_NEEDS_FLASH
  61494. COMM_AE_NEEDS_FLASH_OFF
  61495. COMM_AE_NEEDS_FLASH_ON
  61496. COMM_AE_START
  61497. COMM_AE_STOP
  61498. COMM_AF_CAL
  61499. COMM_AF_CON
  61500. COMM_AF_CON_SCAN
  61501. COMM_AF_CON_START
  61502. COMM_AF_CON_STOP
  61503. COMM_AF_FACE_ZOOM
  61504. COMM_AF_MODE
  61505. COMM_AF_MODE_MACRO
  61506. COMM_AF_MODE_MOVIE_CAF_START
  61507. COMM_AF_MODE_MOVIE_CAF_STOP
  61508. COMM_AF_MODE_NORMAL
  61509. COMM_AF_MODE_PREVIEW_CAF_START
  61510. COMM_AF_MODE_PREVIEW_CAF_STOP
  61511. COMM_AF_SOFTLANDING
  61512. COMM_AF_SOFTLANDING_ON
  61513. COMM_AF_SOFTLANDING_RES_COMPLETE
  61514. COMM_AF_TOUCH_AF
  61515. COMM_ATTR_ADDR
  61516. COMM_ATTR_ADDR_LIST
  61517. COMM_ATTR_LOCAL
  61518. COMM_ATTR_NODEID
  61519. COMM_AWB_CON
  61520. COMM_AWB_MODE
  61521. COMM_AWB_MODE_AUTO
  61522. COMM_AWB_MODE_CLOUDY
  61523. COMM_AWB_MODE_DAYLIGHT
  61524. COMM_AWB_MODE_FLUORESCENT1
  61525. COMM_AWB_MODE_FLUORESCENT2
  61526. COMM_AWB_MODE_INCANDESCENT
  61527. COMM_AWB_START
  61528. COMM_AWB_STOP
  61529. COMM_BIT_IO
  61530. COMM_BLOCK_IO
  61531. COMM_BYTE_IO
  61532. COMM_CH
  61533. COMM_CHANNEL_BIT_ARRAY_SIZE
  61534. COMM_CHAN_EVENT_INTERNAL_ERR
  61535. COMM_CHAN_OFFLINE_OFFSET
  61536. COMM_CHAN_RST_OFFSET
  61537. COMM_CHG_MODE
  61538. COMM_CHG_MODE_JPEG_1024_768
  61539. COMM_CHG_MODE_JPEG_1280_720
  61540. COMM_CHG_MODE_JPEG_1280_960
  61541. COMM_CHG_MODE_JPEG_1600_1200
  61542. COMM_CHG_MODE_JPEG_1600_900
  61543. COMM_CHG_MODE_JPEG_2048_1152
  61544. COMM_CHG_MODE_JPEG_2048_1536
  61545. COMM_CHG_MODE_JPEG_2560_1440
  61546. COMM_CHG_MODE_JPEG_2560_1920
  61547. COMM_CHG_MODE_JPEG_3264_1836
  61548. COMM_CHG_MODE_JPEG_3264_2176
  61549. COMM_CHG_MODE_JPEG_3264_2448
  61550. COMM_CHG_MODE_JPEG_640_480
  61551. COMM_CHG_MODE_JPEG_800_450
  61552. COMM_CHG_MODE_JPEG_800_600
  61553. COMM_CHG_MODE_NEW
  61554. COMM_CHG_MODE_SUBSAMPLING_HALF
  61555. COMM_CHG_MODE_SUBSAMPLING_QUARTER
  61556. COMM_CHG_MODE_YUV_1008_672
  61557. COMM_CHG_MODE_YUV_1184_666
  61558. COMM_CHG_MODE_YUV_1280_720
  61559. COMM_CHG_MODE_YUV_1536_864
  61560. COMM_CHG_MODE_YUV_1600_1200
  61561. COMM_CHG_MODE_YUV_1632_1224
  61562. COMM_CHG_MODE_YUV_1920_1080
  61563. COMM_CHG_MODE_YUV_1920_1440
  61564. COMM_CHG_MODE_YUV_2304_1296
  61565. COMM_CHG_MODE_YUV_320_240
  61566. COMM_CHG_MODE_YUV_3264_2448
  61567. COMM_CHG_MODE_YUV_352_288
  61568. COMM_CHG_MODE_YUV_640_480
  61569. COMM_CHG_MODE_YUV_880_720
  61570. COMM_CHG_MODE_YUV_960_720
  61571. COMM_CIB
  61572. COMM_CMD
  61573. COMM_CONTRAST
  61574. COMM_D
  61575. COMM_DEV_TYPE
  61576. COMM_DIR_NONE
  61577. COMM_DIR_RX
  61578. COMM_DIR_RX_AND_TX
  61579. COMM_DIR_TX
  61580. COMM_DO_RELEASE
  61581. COMM_DRIVER
  61582. COMM_DT
  61583. COMM_EP
  61584. COMM_ERROR_ESCAPE
  61585. COMM_EV
  61586. COMM_EXEC_INT
  61587. COMM_F
  61588. COMM_FACE_DET
  61589. COMM_FACE_DET_OFF
  61590. COMM_FACE_DET_ON
  61591. COMM_FACE_DET_OSD
  61592. COMM_FACE_DET_OSD_OFF
  61593. COMM_FACE_DET_OSD_ON
  61594. COMM_FLASH_MODE
  61595. COMM_FLASH_MODE_AUTO
  61596. COMM_FLASH_MODE_OFF
  61597. COMM_FLASH_MODE_ON
  61598. COMM_FLASH_STATUS
  61599. COMM_FLASH_STATUS_AUTO
  61600. COMM_FLASH_STATUS_OFF
  61601. COMM_FLASH_STATUS_ON
  61602. COMM_FLASH_TORCH
  61603. COMM_FLASH_TORCH_OFF
  61604. COMM_FLASH_TORCH_ON
  61605. COMM_FLICKER_AUTO
  61606. COMM_FLICKER_AUTO_50HZ
  61607. COMM_FLICKER_AUTO_60HZ
  61608. COMM_FLICKER_MANUAL_50HZ
  61609. COMM_FLICKER_MANUAL_60HZ
  61610. COMM_FLICKER_MODE
  61611. COMM_FLICKER_NONE
  61612. COMM_FPGA_EP
  61613. COMM_FRAME_RATE
  61614. COMM_FRAME_RATE_ANTI_SHAKE
  61615. COMM_FRAME_RATE_AUTO_SET
  61616. COMM_FRAME_RATE_FIXED_10FPS
  61617. COMM_FRAME_RATE_FIXED_120FPS
  61618. COMM_FRAME_RATE_FIXED_15FPS
  61619. COMM_FRAME_RATE_FIXED_20FPS
  61620. COMM_FRAME_RATE_FIXED_30FPS
  61621. COMM_FRAME_RATE_FIXED_60FPS
  61622. COMM_FRAME_RATE_FIXED_7FPS
  61623. COMM_FRAME_RATE_FIXED_90FPS
  61624. COMM_FW_UPDATE
  61625. COMM_FW_UPDATE_BUSY
  61626. COMM_FW_UPDATE_FAIL
  61627. COMM_FW_UPDATE_NOT_READY
  61628. COMM_FW_UPDATE_SUCCESS
  61629. COMM_ICP
  61630. COMM_IM
  61631. COMM_IMAGE_EFFECT
  61632. COMM_IMAGE_EFFECT_AQUA
  61633. COMM_IMAGE_EFFECT_MONO
  61634. COMM_IMAGE_EFFECT_NEGATIVE
  61635. COMM_IMAGE_EFFECT_NONE
  61636. COMM_IMAGE_EFFECT_SEPIA
  61637. COMM_IMAGE_QUALITY
  61638. COMM_IMAGE_QUALITY_FINE
  61639. COMM_IMAGE_QUALITY_NORMAL
  61640. COMM_IMAGE_QUALITY_SUPERFINE
  61641. COMM_IMG_OUTPUT
  61642. COMM_IMG_OUTPUT_HDR
  61643. COMM_IMG_OUTPUT_INTERLEAVED
  61644. COMM_IMG_OUTPUT_YUV
  61645. COMM_INT_NUM
  61646. COMM_IRQ_BASE
  61647. COMM_ISO
  61648. COMM_ISO_100
  61649. COMM_ISO_200
  61650. COMM_ISO_400
  61651. COMM_ISO_800
  61652. COMM_ISO_AUTO
  61653. COMM_ISO_INDOOR
  61654. COMM_ISO_NIGHT
  61655. COMM_ISO_SPORTS
  61656. COMM_LEN
  61657. COMM_MATCH_ACCESS
  61658. COMM_MATRIXA_TRANS_C11_C12__COMM_MATRIXA_TRANS_C11_MASK
  61659. COMM_MATRIXA_TRANS_C11_C12__COMM_MATRIXA_TRANS_C11__SHIFT
  61660. COMM_MATRIXA_TRANS_C11_C12__COMM_MATRIXA_TRANS_C12_MASK
  61661. COMM_MATRIXA_TRANS_C11_C12__COMM_MATRIXA_TRANS_C12__SHIFT
  61662. COMM_MATRIXA_TRANS_C13_C14__COMM_MATRIXA_TRANS_C13_MASK
  61663. COMM_MATRIXA_TRANS_C13_C14__COMM_MATRIXA_TRANS_C13__SHIFT
  61664. COMM_MATRIXA_TRANS_C13_C14__COMM_MATRIXA_TRANS_C14_MASK
  61665. COMM_MATRIXA_TRANS_C13_C14__COMM_MATRIXA_TRANS_C14__SHIFT
  61666. COMM_MATRIXA_TRANS_C21_C22__COMM_MATRIXA_TRANS_C21_MASK
  61667. COMM_MATRIXA_TRANS_C21_C22__COMM_MATRIXA_TRANS_C21__SHIFT
  61668. COMM_MATRIXA_TRANS_C21_C22__COMM_MATRIXA_TRANS_C22_MASK
  61669. COMM_MATRIXA_TRANS_C21_C22__COMM_MATRIXA_TRANS_C22__SHIFT
  61670. COMM_MATRIXA_TRANS_C23_C24__COMM_MATRIXA_TRANS_C23_MASK
  61671. COMM_MATRIXA_TRANS_C23_C24__COMM_MATRIXA_TRANS_C23__SHIFT
  61672. COMM_MATRIXA_TRANS_C23_C24__COMM_MATRIXA_TRANS_C24_MASK
  61673. COMM_MATRIXA_TRANS_C23_C24__COMM_MATRIXA_TRANS_C24__SHIFT
  61674. COMM_MATRIXA_TRANS_C31_C32__COMM_MATRIXA_TRANS_C31_MASK
  61675. COMM_MATRIXA_TRANS_C31_C32__COMM_MATRIXA_TRANS_C31__SHIFT
  61676. COMM_MATRIXA_TRANS_C31_C32__COMM_MATRIXA_TRANS_C32_MASK
  61677. COMM_MATRIXA_TRANS_C31_C32__COMM_MATRIXA_TRANS_C32__SHIFT
  61678. COMM_MATRIXA_TRANS_C33_C34__COMM_MATRIXA_TRANS_C33_MASK
  61679. COMM_MATRIXA_TRANS_C33_C34__COMM_MATRIXA_TRANS_C33__SHIFT
  61680. COMM_MATRIXA_TRANS_C33_C34__COMM_MATRIXA_TRANS_C34_MASK
  61681. COMM_MATRIXA_TRANS_C33_C34__COMM_MATRIXA_TRANS_C34__SHIFT
  61682. COMM_MATRIXB_TRANS_C11_C12__COMM_MATRIXB_TRANS_C11_MASK
  61683. COMM_MATRIXB_TRANS_C11_C12__COMM_MATRIXB_TRANS_C11__SHIFT
  61684. COMM_MATRIXB_TRANS_C11_C12__COMM_MATRIXB_TRANS_C12_MASK
  61685. COMM_MATRIXB_TRANS_C11_C12__COMM_MATRIXB_TRANS_C12__SHIFT
  61686. COMM_MATRIXB_TRANS_C13_C14__COMM_MATRIXB_TRANS_C13_MASK
  61687. COMM_MATRIXB_TRANS_C13_C14__COMM_MATRIXB_TRANS_C13__SHIFT
  61688. COMM_MATRIXB_TRANS_C13_C14__COMM_MATRIXB_TRANS_C14_MASK
  61689. COMM_MATRIXB_TRANS_C13_C14__COMM_MATRIXB_TRANS_C14__SHIFT
  61690. COMM_MATRIXB_TRANS_C21_C22__COMM_MATRIXB_TRANS_C21_MASK
  61691. COMM_MATRIXB_TRANS_C21_C22__COMM_MATRIXB_TRANS_C21__SHIFT
  61692. COMM_MATRIXB_TRANS_C21_C22__COMM_MATRIXB_TRANS_C22_MASK
  61693. COMM_MATRIXB_TRANS_C21_C22__COMM_MATRIXB_TRANS_C22__SHIFT
  61694. COMM_MATRIXB_TRANS_C23_C24__COMM_MATRIXB_TRANS_C23_MASK
  61695. COMM_MATRIXB_TRANS_C23_C24__COMM_MATRIXB_TRANS_C23__SHIFT
  61696. COMM_MATRIXB_TRANS_C23_C24__COMM_MATRIXB_TRANS_C24_MASK
  61697. COMM_MATRIXB_TRANS_C23_C24__COMM_MATRIXB_TRANS_C24__SHIFT
  61698. COMM_MATRIXB_TRANS_C31_C32__COMM_MATRIXB_TRANS_C31_MASK
  61699. COMM_MATRIXB_TRANS_C31_C32__COMM_MATRIXB_TRANS_C31__SHIFT
  61700. COMM_MATRIXB_TRANS_C31_C32__COMM_MATRIXB_TRANS_C32_MASK
  61701. COMM_MATRIXB_TRANS_C31_C32__COMM_MATRIXB_TRANS_C32__SHIFT
  61702. COMM_MATRIXB_TRANS_C33_C34__COMM_MATRIXB_TRANS_C33_MASK
  61703. COMM_MATRIXB_TRANS_C33_C34__COMM_MATRIXB_TRANS_C33__SHIFT
  61704. COMM_MATRIXB_TRANS_C33_C34__COMM_MATRIXB_TRANS_C34_MASK
  61705. COMM_MATRIXB_TRANS_C33_C34__COMM_MATRIXB_TRANS_C34__SHIFT
  61706. COMM_METERING
  61707. COMM_METERING_AVERAGE
  61708. COMM_METERING_CENTER
  61709. COMM_METERING_SMART
  61710. COMM_METERING_SPOT
  61711. COMM_MODE_NONE
  61712. COMM_MODE_RX
  61713. COMM_MODE_RX_AND_TX
  61714. COMM_MODE_TX
  61715. COMM_NAK
  61716. COMM_NTF
  61717. COMM_PS
  61718. COMM_PST
  61719. COMM_PULSE
  61720. COMM_R
  61721. COMM_READ_CRC_PROT_PAGE
  61722. COMM_READ_REDIRECT_PAGE_CRC
  61723. COMM_READ_STRAIGHT
  61724. COMM_RECEIVER_BUFSIZE
  61725. COMM_REGS
  61726. COMM_RESET
  61727. COMM_RESULT_OFFSET
  61728. COMM_RST
  61729. COMM_RTS
  61730. COMM_SATURATION
  61731. COMM_SCANF
  61732. COMM_SCENE_MODE
  61733. COMM_SCENE_MODE_AGAINST_LIGHT
  61734. COMM_SCENE_MODE_BEACH
  61735. COMM_SCENE_MODE_CANDLE
  61736. COMM_SCENE_MODE_DAWN
  61737. COMM_SCENE_MODE_FALL
  61738. COMM_SCENE_MODE_FIRE
  61739. COMM_SCENE_MODE_INDOOR
  61740. COMM_SCENE_MODE_LANDSCAPE
  61741. COMM_SCENE_MODE_NIGHT
  61742. COMM_SCENE_MODE_NONE
  61743. COMM_SCENE_MODE_PORTRAIT
  61744. COMM_SCENE_MODE_SPORTS
  61745. COMM_SCENE_MODE_SUNSET
  61746. COMM_SCENE_MODE_TEXT
  61747. COMM_SE
  61748. COMM_SEARCH_ACCESS
  61749. COMM_SENSOR_STREAMING
  61750. COMM_SENSOR_STREAMING_OFF
  61751. COMM_SENSOR_STREAMING_ON
  61752. COMM_SET_DURATION
  61753. COMM_SET_PATH
  61754. COMM_SHARPNESS
  61755. COMM_SM
  61756. COMM_SPU
  61757. COMM_STILL_MAIN_FLASH
  61758. COMM_STILL_MAIN_FLASH_CANCEL
  61759. COMM_STILL_MAIN_FLASH_FIRE
  61760. COMM_STILL_PRE_FLASH
  61761. COMM_STILL_PRE_FLASH_FIRE
  61762. COMM_STILL_PRE_FLASH_FIRED
  61763. COMM_STILL_PRE_FLASH_NON_FIRED
  61764. COMM_TYPE
  61765. COMM_VERSION
  61766. COMM_WDR
  61767. COMM_WDR_OFF
  61768. COMM_WDR_ON
  61769. COMM_WRITE_EPROM
  61770. COMM_WRITE_SRAM_PAGE
  61771. COMM_Z
  61772. COMM_ZOOM_STEP
  61773. COMN1SW_MASK
  61774. COMN1SW_SHIFT
  61775. COMN_OPCODE_DELETE_OBJECT
  61776. COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES
  61777. COMN_OPCODE_GET_CNTL_ATTRIBUTES
  61778. COMN_OPCODE_GET_PROFILE_CONFIG
  61779. COMN_OPCODE_READ_OBJECT
  61780. COMN_OPCODE_READ_OBJECT_LIST
  61781. COMN_OPCODE_WRITE_OBJECT
  61782. COMP
  61783. COMP0_3_INIT_PHASE_X
  61784. COMP0_3_INIT_PHASE_Y
  61785. COMP0_3_PHASE_STEP_X
  61786. COMP0_3_PHASE_STEP_Y
  61787. COMP0_ENABLE
  61788. COMP1
  61789. COMP12_CK
  61790. COMP1_2_INIT_PHASE_X
  61791. COMP1_2_INIT_PHASE_Y
  61792. COMP1_2_PHASE_STEP_X
  61793. COMP1_2_PHASE_STEP_Y
  61794. COMP1_APB_DATA_WIDTH
  61795. COMP1_EN
  61796. COMP1_ENABLE
  61797. COMP1_FIFO_DEPTH_GLOBAL
  61798. COMP1_MODE_EN
  61799. COMP1_RX_CHANNELS
  61800. COMP1_RX_ENABLED
  61801. COMP1_TX_CHANNELS
  61802. COMP1_TX_ENABLED
  61803. COMP1_TX_WORDSIZE_0
  61804. COMP1_TX_WORDSIZE_1
  61805. COMP1_TX_WORDSIZE_2
  61806. COMP1_TX_WORDSIZE_3
  61807. COMP2
  61808. COMP2SW_MASK
  61809. COMP2SW_SHIFT
  61810. COMP2_EN
  61811. COMP2_RX_WORDSIZE_0
  61812. COMP2_RX_WORDSIZE_1
  61813. COMP2_RX_WORDSIZE_2
  61814. COMP2_RX_WORDSIZE_3
  61815. COMPACT
  61816. COMPACTFAIL
  61817. COMPACTFREE_SCANNED
  61818. COMPACTION_FAILED
  61819. COMPACTION_FEEDBACK
  61820. COMPACTION_PRIORITY
  61821. COMPACTION_PROGRESS
  61822. COMPACTION_STATUS
  61823. COMPACTION_WITHDRAWN
  61824. COMPACTISOLATED
  61825. COMPACTMIGRATE_SCANNED
  61826. COMPACTSTALL
  61827. COMPACTSUCCESS
  61828. COMPACT_CLUSTER_MAX
  61829. COMPACT_COMPLETE
  61830. COMPACT_CONTENDED
  61831. COMPACT_CONTINUE
  61832. COMPACT_DEFERRED
  61833. COMPACT_FI
  61834. COMPACT_HASH
  61835. COMPACT_INACTIVE
  61836. COMPACT_LEN
  61837. COMPACT_MAX_DEFER_SHIFT
  61838. COMPACT_MC
  61839. COMPACT_NOT_SUITABLE_ZONE
  61840. COMPACT_NO_SUITABLE_PAGE
  61841. COMPACT_PARTIAL_SKIPPED
  61842. COMPACT_PRIO_ASYNC
  61843. COMPACT_PRIO_SYNC_FULL
  61844. COMPACT_PRIO_SYNC_LIGHT
  61845. COMPACT_SKIPPED
  61846. COMPACT_SUCCESS
  61847. COMPACT_TO_NASID_NODEID
  61848. COMPAL_HACK
  61849. COMPANDER_1
  61850. COMPANDER_2
  61851. COMPANDER_3
  61852. COMPANDER_4
  61853. COMPANDER_5
  61854. COMPANDER_6
  61855. COMPANDER_7
  61856. COMPANDER_8
  61857. COMPANDER_MAX
  61858. COMPANDING_MODE_MASK
  61859. COMPAQ_CISS_MAJOR
  61860. COMPAQ_CISS_MAJOR1
  61861. COMPAQ_CISS_MAJOR2
  61862. COMPAQ_CISS_MAJOR3
  61863. COMPAQ_CISS_MAJOR4
  61864. COMPAQ_CISS_MAJOR5
  61865. COMPAQ_CISS_MAJOR6
  61866. COMPAQ_CISS_MAJOR7
  61867. COMPAQ_HACK
  61868. COMPAQ_SMART2_MAJOR
  61869. COMPAQ_SMART2_MAJOR1
  61870. COMPAQ_SMART2_MAJOR2
  61871. COMPAQ_SMART2_MAJOR3
  61872. COMPAQ_SMART2_MAJOR4
  61873. COMPAQ_SMART2_MAJOR5
  61874. COMPAQ_SMART2_MAJOR6
  61875. COMPAQ_SMART2_MAJOR7
  61876. COMPARE
  61877. COMPARE_AND_WRITE
  61878. COMPARE_DESTINATION
  61879. COMPARE_DST_EQUAL
  61880. COMPARE_DST_FALSE
  61881. COMPARE_DST_NOT_EQUAL
  61882. COMPARE_DST_TRUE
  61883. COMPARE_EQUAL
  61884. COMPARE_EVENT_KEY
  61885. COMPARE_FALSE
  61886. COMPARE_INT_SEEN_TICKS
  61887. COMPARE_IRTE_ADDR
  61888. COMPARE_NOT_EQUAL
  61889. COMPARE_OPCODE
  61890. COMPARE_SOURCE
  61891. COMPARE_SRC_AND_DST
  61892. COMPARE_SRC_EQUAL
  61893. COMPARE_SRC_EQUAL_FLIP
  61894. COMPARE_SRC_FALSE
  61895. COMPARE_SRC_NOT_EQUAL
  61896. COMPARE_SRC_TRUE
  61897. COMPARE_SWAP
  61898. COMPARE_TARGET
  61899. COMPARE_TRUE
  61900. COMPARE_VALUE
  61901. COMPARS
  61902. COMPASSIONATE_DATA
  61903. COMPAT
  61904. COMPATIBLE_IOCTL
  61905. COMPAT_700_MODE
  61906. COMPAT_ARCH_DLINFO
  61907. COMPAT_ASHMEM_SET_PROT_MASK
  61908. COMPAT_ASHMEM_SET_SIZE
  61909. COMPAT_ATM_ADDPARTY
  61910. COMPAT_CALGARY
  61911. COMPAT_ELF_ET_DYN_BASE
  61912. COMPAT_ELF_HWCAP
  61913. COMPAT_ELF_HWCAP2
  61914. COMPAT_ELF_HWCAP_DEFAULT
  61915. COMPAT_ELF_NGREG
  61916. COMPAT_ELF_PLATFORM
  61917. COMPAT_ELF_PLAT_INIT
  61918. COMPAT_FEATURE_ON
  61919. COMPAT_FE_GET_PROPERTY
  61920. COMPAT_FE_SET_PROPERTY
  61921. COMPAT_FLAGS
  61922. COMPAT_HWCAP2_AES
  61923. COMPAT_HWCAP2_CRC32
  61924. COMPAT_HWCAP2_PMULL
  61925. COMPAT_HWCAP2_SHA1
  61926. COMPAT_HWCAP2_SHA2
  61927. COMPAT_HWCAP_EDSP
  61928. COMPAT_HWCAP_EVTSTRM
  61929. COMPAT_HWCAP_FAST_MULT
  61930. COMPAT_HWCAP_HALF
  61931. COMPAT_HWCAP_IDIV
  61932. COMPAT_HWCAP_IDIVA
  61933. COMPAT_HWCAP_IDIVT
  61934. COMPAT_HWCAP_ISA_A
  61935. COMPAT_HWCAP_ISA_C
  61936. COMPAT_HWCAP_ISA_D
  61937. COMPAT_HWCAP_ISA_F
  61938. COMPAT_HWCAP_ISA_I
  61939. COMPAT_HWCAP_ISA_M
  61940. COMPAT_HWCAP_LPAE
  61941. COMPAT_HWCAP_NEON
  61942. COMPAT_HWCAP_THUMB
  61943. COMPAT_HWCAP_TLS
  61944. COMPAT_HWCAP_VFP
  61945. COMPAT_HWCAP_VFPv3
  61946. COMPAT_HWCAP_VFPv4
  61947. COMPAT_IPMICTL_RECEIVE_MSG
  61948. COMPAT_IPMICTL_RECEIVE_MSG_TRUNC
  61949. COMPAT_IPMICTL_SEND_COMMAND
  61950. COMPAT_IPMICTL_SEND_COMMAND_SETTIME
  61951. COMPAT_K1BASE32
  61952. COMPAT_MASK
  61953. COMPAT_MINSIGSTKSZ
  61954. COMPAT_MSG
  61955. COMPAT_NAMELEN
  61956. COMPAT_OFF_T_MAX
  61957. COMPAT_PSR_DIT_BIT
  61958. COMPAT_PTRACE_GETHBPREGS
  61959. COMPAT_PTRACE_GETREGS
  61960. COMPAT_PTRACE_GETVFPREGS
  61961. COMPAT_PTRACE_GET_THREAD_AREA
  61962. COMPAT_PTRACE_SETHBPREGS
  61963. COMPAT_PTRACE_SETREGS
  61964. COMPAT_PTRACE_SETVFPREGS
  61965. COMPAT_PTRACE_SET_SYSCALL
  61966. COMPAT_PT_DATA_ADDR
  61967. COMPAT_PT_TEXT_ADDR
  61968. COMPAT_PT_TEXT_END_ADDR
  61969. COMPAT_RLIM_INFINITY
  61970. COMPAT_SET_PERSONALITY
  61971. COMPAT_SHMLBA
  61972. COMPAT_SIGEV_PAD_SIZE
  61973. COMPAT_SIGRESTARTBLOCK_TRAMP
  61974. COMPAT_SIGRETURN_TRAMP
  61975. COMPAT_SPIOCSTYPE
  61976. COMPAT_SYSCALL_DEFINE0
  61977. COMPAT_SYSCALL_DEFINE1
  61978. COMPAT_SYSCALL_DEFINE2
  61979. COMPAT_SYSCALL_DEFINE3
  61980. COMPAT_SYSCALL_DEFINE4
  61981. COMPAT_SYSCALL_DEFINE5
  61982. COMPAT_SYSCALL_DEFINE6
  61983. COMPAT_SYSCALL_DEFINEx
  61984. COMPAT_SYS_NI
  61985. COMPAT_TRAMP_SIZE
  61986. COMPAT_TYPE_DA9061
  61987. COMPAT_TYPE_DA9062
  61988. COMPAT_USER_HZ
  61989. COMPAT_USER_SZ
  61990. COMPAT_USE_64BIT_TIME
  61991. COMPAT_UTS_MACHINE
  61992. COMPAT_VERSION
  61993. COMPAT_XT_ALIGN
  61994. COMPAT_XT_DATA_TO_USER
  61995. COMPENSATE_BUFFER
  61996. COMPENSATE_HALF_MPS_NUM
  61997. COMPENSATION_REG1
  61998. COMPENSATION_REG2
  61999. COMPENSATION_REG3
  62000. COMPEX9881
  62001. COMPGAIN
  62002. COMPHY_CFG1
  62003. COMPHY_CFG1_GEN_RX
  62004. COMPHY_CFG1_GEN_RX_MSK
  62005. COMPHY_CFG1_GEN_TX
  62006. COMPHY_CFG1_GEN_TX_MSK
  62007. COMPHY_FW_MODE
  62008. COMPHY_FW_MODE_HS_SGMII
  62009. COMPHY_FW_MODE_MASK
  62010. COMPHY_FW_MODE_OFFSET
  62011. COMPHY_FW_MODE_PCIE
  62012. COMPHY_FW_MODE_RXAUI
  62013. COMPHY_FW_MODE_SATA
  62014. COMPHY_FW_MODE_SFI
  62015. COMPHY_FW_MODE_SGMII
  62016. COMPHY_FW_MODE_USB3
  62017. COMPHY_FW_MODE_USB3D
  62018. COMPHY_FW_MODE_USB3H
  62019. COMPHY_FW_MODE_XFI
  62020. COMPHY_FW_NET
  62021. COMPHY_FW_NOT_SUPPORTED
  62022. COMPHY_FW_PARAM
  62023. COMPHY_FW_PARAM_ETH
  62024. COMPHY_FW_PARAM_FULL
  62025. COMPHY_FW_PARAM_PCIE
  62026. COMPHY_FW_PCIE
  62027. COMPHY_FW_POL_MASK
  62028. COMPHY_FW_POL_OFFSET
  62029. COMPHY_FW_PORT_MASK
  62030. COMPHY_FW_PORT_OFFSET
  62031. COMPHY_FW_SPEED_103125
  62032. COMPHY_FW_SPEED_10_3125G
  62033. COMPHY_FW_SPEED_1250
  62034. COMPHY_FW_SPEED_1_25G
  62035. COMPHY_FW_SPEED_2_5G
  62036. COMPHY_FW_SPEED_3125
  62037. COMPHY_FW_SPEED_3_125G
  62038. COMPHY_FW_SPEED_5000
  62039. COMPHY_FW_SPEED_5G
  62040. COMPHY_FW_SPEED_5_15625G
  62041. COMPHY_FW_SPEED_6G
  62042. COMPHY_FW_SPEED_MASK
  62043. COMPHY_FW_SPEED_MAX
  62044. COMPHY_FW_SPEED_OFFSET
  62045. COMPHY_FW_WIDTH_MASK
  62046. COMPHY_FW_WIDTH_OFFSET
  62047. COMPHY_SELECTOR
  62048. COMPHY_SIP_PLL_LOCK
  62049. COMPHY_SIP_POWER_OFF
  62050. COMPHY_SIP_POWER_ON
  62051. COMPHY_STAT1
  62052. COMPHY_STAT1_PLL_RDY_RX
  62053. COMPHY_STAT1_PLL_RDY_TX
  62054. COMPILER_DEPENDENT_INT64
  62055. COMPILER_DEPENDENT_UINT64
  62056. COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW
  62057. COMPILER_VA_MACRO
  62058. COMPILE_OFFSETS
  62059. COMPLAIN_MODE
  62060. COMPLEMENT48
  62061. COMPLETE
  62062. COMPLETED_HANDLE
  62063. COMPLETED_LIST_LOCK
  62064. COMPLETED_OK
  62065. COMPLETE_CMD
  62066. COMPLETE_DIRECT
  62067. COMPLETE_DMA
  62068. COMPLETE_FCOPY
  62069. COMPLETE_LAST_PCKT
  62070. COMPLETE_LEN
  62071. COMPLETE_SGE
  62072. COMPLETE_THRESHOLD
  62073. COMPLETION_CMDSENT
  62074. COMPLETION_CODE_INIT
  62075. COMPLETION_CODE_SIZE
  62076. COMPLETION_FINALIZE
  62077. COMPLETION_INITIALIZER
  62078. COMPLETION_INITIALIZER_ONSTACK
  62079. COMPLETION_INITIALIZER_ONSTACK_MAP
  62080. COMPLETION_NONE
  62081. COMPLETION_QUEUE_CYCLE_BIT
  62082. COMPLETION_RSPFIN
  62083. COMPLETION_TIMEOUT
  62084. COMPLETION_WORD_INIT
  62085. COMPLETION_XFERFINISH
  62086. COMPLETION_XFERFINISH_RSPFIN
  62087. COMPLEXIO1_ERR_IRQ
  62088. COMPLEXIO2_ERR_IRQ
  62089. COMPLIANCE_EN
  62090. COMPLIANCE_INTR
  62091. COMPLIANT_DEV
  62092. COMPLREF
  62093. COMPL_Q_0_BASE_ADDR_HI
  62094. COMPL_Q_0_BASE_ADDR_LO
  62095. COMPL_Q_0_DEPTH
  62096. COMPL_Q_0_RD_PTR
  62097. COMPL_Q_0_WR_PTR
  62098. COMPONENT
  62099. COMPONENT_2_WAY_SWITCH
  62100. COMPONENT_3_WAY_SWITCH
  62101. COMPONENT_CONNECTOR
  62102. COMPONENT_DEPTH_10BPC
  62103. COMPONENT_DEPTH_12BPC
  62104. COMPONENT_DEPTH_16BPC
  62105. COMPONENT_DEPTH_6BPC
  62106. COMPONENT_DEPTH_8BPC
  62107. COMPONENT_DEVICE
  62108. COMPONENT_H
  62109. COMPONENT_KERNEL
  62110. COMPONENT_MATCHING
  62111. COMPONENT_NAME_SIZE
  62112. COMPONENT_NO_SWITCH
  62113. COMPONENT_STRUCT
  62114. COMPONENT_UNSPEC
  62115. COMPOSE_AUX_SW_DATA_0_7
  62116. COMPOSE_AUX_SW_DATA_16_20
  62117. COMPOSE_AUX_SW_DATA_8_15
  62118. COMPOSE_GPIO_VAL
  62119. COMPOSE_MIXER_REG
  62120. COMPOSE_SB_REG
  62121. COMPOSE_SW_VAL
  62122. COMPOSIT
  62123. COMPOSITE
  62124. COMPOSITE_CONNECTOR
  62125. COMPOSITE_DDRCLK
  62126. COMPOSITE_DIV_OFFSET
  62127. COMPOSITE_FRAC
  62128. COMPOSITE_FRACMUX
  62129. COMPOSITE_FRACMUX_NOGATE
  62130. COMPOSITE_HALFDIV
  62131. COMPOSITE_NODIV
  62132. COMPOSITE_NOGATE
  62133. COMPOSITE_NOGATE_DIVTBL
  62134. COMPOSITE_NOGATE_HALFDIV
  62135. COMPOSITE_NOMUX
  62136. COMPOSITE_NOMUX_DIVTBL
  62137. COMPOSITE_NOMUX_HALFDIV
  62138. COMPOSITE_SHADOW_ID
  62139. COMPOUND_ERR_SLACK_SPACE
  62140. COMPOUND_FID
  62141. COMPOUND_PAGE_DTOR
  62142. COMPOUND_SLACK_SPACE
  62143. COMPRESSED
  62144. COMPRESSED_CHANNEL_COUNT
  62145. COMPRESSED_DATA_NODE_BUF_SZ
  62146. COMPRESSION_FORMAT_DEFAULT
  62147. COMPRESSION_FORMAT_LZNT1
  62148. COMPRESSION_FORMAT_NONE
  62149. COMPRESSION_PAGE
  62150. COMPRESSION_PAGE_LENGTH
  62151. COMPR_CODEC_CAPS_OVERFLOW
  62152. COMPR_LEVEL
  62153. COMPR_PLAYBACK_MAX_FRAGMENT_SIZE
  62154. COMPR_PLAYBACK_MAX_NUM_FRAGMENTS
  62155. COMPR_PLAYBACK_MIN_FRAGMENT_SIZE
  62156. COMPR_PLAYBACK_MIN_NUM_FRAGMENTS
  62157. COMPST_ATOMIC
  62158. COMPST_CHECK_ACK
  62159. COMPST_CHECK_PSN
  62160. COMPST_COMP_ACK
  62161. COMPST_COMP_WQE
  62162. COMPST_DONE
  62163. COMPST_ERROR
  62164. COMPST_ERROR_RETRY
  62165. COMPST_EXIT
  62166. COMPST_GET_ACK
  62167. COMPST_GET_WQE
  62168. COMPST_READ
  62169. COMPST_RNR_RETRY
  62170. COMPST_UPDATE_COMP
  62171. COMPST_WRITE_SEND
  62172. COMPUTE
  62173. COMPUTE_CYCLES
  62174. COMPUTE_DDID_INDEX__INDEX_MASK
  62175. COMPUTE_DDID_INDEX__INDEX__SHIFT
  62176. COMPUTE_DELTA
  62177. COMPUTE_DELTA_ABS
  62178. COMPUTE_DESTINATION_EN_SE0__CU_EN_MASK
  62179. COMPUTE_DESTINATION_EN_SE0__CU_EN__SHIFT
  62180. COMPUTE_DESTINATION_EN_SE1__CU_EN_MASK
  62181. COMPUTE_DESTINATION_EN_SE1__CU_EN__SHIFT
  62182. COMPUTE_DESTINATION_EN_SE2__CU_EN_MASK
  62183. COMPUTE_DESTINATION_EN_SE2__CU_EN__SHIFT
  62184. COMPUTE_DESTINATION_EN_SE3__CU_EN_MASK
  62185. COMPUTE_DESTINATION_EN_SE3__CU_EN__SHIFT
  62186. COMPUTE_DIM_X__SIZE_MASK
  62187. COMPUTE_DIM_X__SIZE__SHIFT
  62188. COMPUTE_DIM_Y__SIZE_MASK
  62189. COMPUTE_DIM_Y__SIZE__SHIFT
  62190. COMPUTE_DIM_Z__SIZE_MASK
  62191. COMPUTE_DIM_Z__SIZE__SHIFT
  62192. COMPUTE_DISPATCH_END__DATA_MASK
  62193. COMPUTE_DISPATCH_END__DATA__SHIFT
  62194. COMPUTE_DISPATCH_ID__DISPATCH_ID_MASK
  62195. COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT
  62196. COMPUTE_DISPATCH_INITIATOR__COMPUTE_SHADER_EN_MASK
  62197. COMPUTE_DISPATCH_INITIATOR__COMPUTE_SHADER_EN__SHIFT
  62198. COMPUTE_DISPATCH_INITIATOR__CS_W32_EN_MASK
  62199. COMPUTE_DISPATCH_INITIATOR__CS_W32_EN__SHIFT
  62200. COMPUTE_DISPATCH_INITIATOR__DATA_ATC_MASK
  62201. COMPUTE_DISPATCH_INITIATOR__DATA_ATC__SHIFT
  62202. COMPUTE_DISPATCH_INITIATOR__DISPATCH_CACHE_CNTL_MASK
  62203. COMPUTE_DISPATCH_INITIATOR__DISPATCH_CACHE_CNTL__SHIFT
  62204. COMPUTE_DISPATCH_INITIATOR__FORCE_START_AT_000_MASK
  62205. COMPUTE_DISPATCH_INITIATOR__FORCE_START_AT_000__SHIFT
  62206. COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_ENBL_MASK
  62207. COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_ENBL__SHIFT
  62208. COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK
  62209. COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE__SHIFT
  62210. COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK
  62211. COMPUTE_DISPATCH_INITIATOR__ORDER_MODE__SHIFT
  62212. COMPUTE_DISPATCH_INITIATOR__PARTIAL_TG_EN_MASK
  62213. COMPUTE_DISPATCH_INITIATOR__PARTIAL_TG_EN__SHIFT
  62214. COMPUTE_DISPATCH_INITIATOR__RESERVED_MASK
  62215. COMPUTE_DISPATCH_INITIATOR__RESERVED__SHIFT
  62216. COMPUTE_DISPATCH_INITIATOR__RESTORE_MASK
  62217. COMPUTE_DISPATCH_INITIATOR__RESTORE__SHIFT
  62218. COMPUTE_DISPATCH_INITIATOR__SCALAR_L1_INV_VOL_MASK
  62219. COMPUTE_DISPATCH_INITIATOR__SCALAR_L1_INV_VOL__SHIFT
  62220. COMPUTE_DISPATCH_INITIATOR__TUNNEL_ENABLE_MASK
  62221. COMPUTE_DISPATCH_INITIATOR__TUNNEL_ENABLE__SHIFT
  62222. COMPUTE_DISPATCH_INITIATOR__USE_THREAD_DIMENSIONS_MASK
  62223. COMPUTE_DISPATCH_INITIATOR__USE_THREAD_DIMENSIONS__SHIFT
  62224. COMPUTE_DISPATCH_INITIATOR__VECTOR_L1_INV_VOL_MASK
  62225. COMPUTE_DISPATCH_INITIATOR__VECTOR_L1_INV_VOL__SHIFT
  62226. COMPUTE_DISPATCH_PKT_ADDR_HI__DATA_MASK
  62227. COMPUTE_DISPATCH_PKT_ADDR_HI__DATA__SHIFT
  62228. COMPUTE_DISPATCH_PKT_ADDR_LO__DATA_MASK
  62229. COMPUTE_DISPATCH_PKT_ADDR_LO__DATA__SHIFT
  62230. COMPUTE_DISPATCH_SCRATCH_BASE_HI__DATA_MASK
  62231. COMPUTE_DISPATCH_SCRATCH_BASE_HI__DATA__SHIFT
  62232. COMPUTE_DISPATCH_SCRATCH_BASE_LO__DATA_MASK
  62233. COMPUTE_DISPATCH_SCRATCH_BASE_LO__DATA__SHIFT
  62234. COMPUTE_DISPATCH_TUNNEL__IMMEDIATE_MASK
  62235. COMPUTE_DISPATCH_TUNNEL__IMMEDIATE__SHIFT
  62236. COMPUTE_DISPATCH_TUNNEL__OFF_DELAY_MASK
  62237. COMPUTE_DISPATCH_TUNNEL__OFF_DELAY__SHIFT
  62238. COMPUTE_ENGINE_PLL_PARAM
  62239. COMPUTE_GPUCLK_INPUT_FLAG_CLK_TYPE_MASK
  62240. COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK
  62241. COMPUTE_GPUCLK_INPUT_FLAG_GFXCLK
  62242. COMPUTE_GPUCLK_INPUT_FLAG_SCLK
  62243. COMPUTE_GPUCLK_INPUT_FLAG_UCLK
  62244. COMPUTE_GPU_CLOCK_INPUT_PARAMETERS_V1_6
  62245. COMPUTE_GPU_CLOCK_INPUT_PARAMETERS_V1_7
  62246. COMPUTE_GPU_CLOCK_OUTPUT_PARAMETERS_V1_6
  62247. COMPUTE_GPU_CLOCK_OUTPUT_PARAMETERS_V1_7
  62248. COMPUTE_MAX
  62249. COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_1
  62250. COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_2
  62251. COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_3
  62252. COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS
  62253. COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION
  62254. COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2
  62255. COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3
  62256. COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4
  62257. COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5
  62258. COMPUTE_MEMORY_PLL_PARAM
  62259. COMPUTE_MISC_RESERVED__RESERVED2_MASK
  62260. COMPUTE_MISC_RESERVED__RESERVED2__SHIFT
  62261. COMPUTE_MISC_RESERVED__RESERVED3_MASK
  62262. COMPUTE_MISC_RESERVED__RESERVED3__SHIFT
  62263. COMPUTE_MISC_RESERVED__RESERVED4_MASK
  62264. COMPUTE_MISC_RESERVED__RESERVED4__SHIFT
  62265. COMPUTE_MISC_RESERVED__SEND_SEID_MASK
  62266. COMPUTE_MISC_RESERVED__SEND_SEID__SHIFT
  62267. COMPUTE_MISC_RESERVED__WAVE_ID_BASE_MASK
  62268. COMPUTE_MISC_RESERVED__WAVE_ID_BASE__SHIFT
  62269. COMPUTE_NOWHERE__DATA_MASK
  62270. COMPUTE_NOWHERE__DATA__SHIFT
  62271. COMPUTE_NUM_THREAD_X__NUM_THREAD_FULL_MASK
  62272. COMPUTE_NUM_THREAD_X__NUM_THREAD_FULL__SHIFT
  62273. COMPUTE_NUM_THREAD_X__NUM_THREAD_PARTIAL_MASK
  62274. COMPUTE_NUM_THREAD_X__NUM_THREAD_PARTIAL__SHIFT
  62275. COMPUTE_NUM_THREAD_Y__NUM_THREAD_FULL_MASK
  62276. COMPUTE_NUM_THREAD_Y__NUM_THREAD_FULL__SHIFT
  62277. COMPUTE_NUM_THREAD_Y__NUM_THREAD_PARTIAL_MASK
  62278. COMPUTE_NUM_THREAD_Y__NUM_THREAD_PARTIAL__SHIFT
  62279. COMPUTE_NUM_THREAD_Z__NUM_THREAD_FULL_MASK
  62280. COMPUTE_NUM_THREAD_Z__NUM_THREAD_FULL__SHIFT
  62281. COMPUTE_NUM_THREAD_Z__NUM_THREAD_PARTIAL_MASK
  62282. COMPUTE_NUM_THREAD_Z__NUM_THREAD_PARTIAL__SHIFT
  62283. COMPUTE_PERFCOUNT_ENABLE__PERFCOUNT_ENABLE_MASK
  62284. COMPUTE_PERFCOUNT_ENABLE__PERFCOUNT_ENABLE__SHIFT
  62285. COMPUTE_PGM_HI__DATA_MASK
  62286. COMPUTE_PGM_HI__DATA__SHIFT
  62287. COMPUTE_PGM_HI__INST_ATC_MASK
  62288. COMPUTE_PGM_HI__INST_ATC__SHIFT
  62289. COMPUTE_PGM_LO__DATA_MASK
  62290. COMPUTE_PGM_LO__DATA__SHIFT
  62291. COMPUTE_PGM_RSRC1__BULKY_MASK
  62292. COMPUTE_PGM_RSRC1__BULKY__SHIFT
  62293. COMPUTE_PGM_RSRC1__CDBG_USER_MASK
  62294. COMPUTE_PGM_RSRC1__CDBG_USER__SHIFT
  62295. COMPUTE_PGM_RSRC1__DEBUG_MODE_MASK
  62296. COMPUTE_PGM_RSRC1__DEBUG_MODE__SHIFT
  62297. COMPUTE_PGM_RSRC1__DX10_CLAMP_MASK
  62298. COMPUTE_PGM_RSRC1__DX10_CLAMP__SHIFT
  62299. COMPUTE_PGM_RSRC1__FLOAT_MODE_MASK
  62300. COMPUTE_PGM_RSRC1__FLOAT_MODE__SHIFT
  62301. COMPUTE_PGM_RSRC1__FP16_OVFL_MASK
  62302. COMPUTE_PGM_RSRC1__FP16_OVFL__SHIFT
  62303. COMPUTE_PGM_RSRC1__FWD_PROGRESS_MASK
  62304. COMPUTE_PGM_RSRC1__FWD_PROGRESS__SHIFT
  62305. COMPUTE_PGM_RSRC1__IEEE_MODE_MASK
  62306. COMPUTE_PGM_RSRC1__IEEE_MODE__SHIFT
  62307. COMPUTE_PGM_RSRC1__MEM_ORDERED_MASK
  62308. COMPUTE_PGM_RSRC1__MEM_ORDERED__SHIFT
  62309. COMPUTE_PGM_RSRC1__PRIORITY_MASK
  62310. COMPUTE_PGM_RSRC1__PRIORITY__SHIFT
  62311. COMPUTE_PGM_RSRC1__PRIV_MASK
  62312. COMPUTE_PGM_RSRC1__PRIV__SHIFT
  62313. COMPUTE_PGM_RSRC1__SGPRS_MASK
  62314. COMPUTE_PGM_RSRC1__SGPRS__SHIFT
  62315. COMPUTE_PGM_RSRC1__VGPRS_MASK
  62316. COMPUTE_PGM_RSRC1__VGPRS__SHIFT
  62317. COMPUTE_PGM_RSRC1__WGP_MODE_MASK
  62318. COMPUTE_PGM_RSRC1__WGP_MODE__SHIFT
  62319. COMPUTE_PGM_RSRC2__EXCP_EN_MASK
  62320. COMPUTE_PGM_RSRC2__EXCP_EN_MSB_MASK
  62321. COMPUTE_PGM_RSRC2__EXCP_EN_MSB__SHIFT
  62322. COMPUTE_PGM_RSRC2__EXCP_EN__SHIFT
  62323. COMPUTE_PGM_RSRC2__LDS_SIZE_MASK
  62324. COMPUTE_PGM_RSRC2__LDS_SIZE__SHIFT
  62325. COMPUTE_PGM_RSRC2__SCRATCH_EN_MASK
  62326. COMPUTE_PGM_RSRC2__SCRATCH_EN__SHIFT
  62327. COMPUTE_PGM_RSRC2__SKIP_USGPR0_MASK
  62328. COMPUTE_PGM_RSRC2__SKIP_USGPR0__SHIFT
  62329. COMPUTE_PGM_RSRC2__TGID_X_EN_MASK
  62330. COMPUTE_PGM_RSRC2__TGID_X_EN__SHIFT
  62331. COMPUTE_PGM_RSRC2__TGID_Y_EN_MASK
  62332. COMPUTE_PGM_RSRC2__TGID_Y_EN__SHIFT
  62333. COMPUTE_PGM_RSRC2__TGID_Z_EN_MASK
  62334. COMPUTE_PGM_RSRC2__TGID_Z_EN__SHIFT
  62335. COMPUTE_PGM_RSRC2__TG_SIZE_EN_MASK
  62336. COMPUTE_PGM_RSRC2__TG_SIZE_EN__SHIFT
  62337. COMPUTE_PGM_RSRC2__TIDIG_COMP_CNT_MASK
  62338. COMPUTE_PGM_RSRC2__TIDIG_COMP_CNT__SHIFT
  62339. COMPUTE_PGM_RSRC2__TRAP_PRESENT_MASK
  62340. COMPUTE_PGM_RSRC2__TRAP_PRESENT__SHIFT
  62341. COMPUTE_PGM_RSRC2__USER_SGPR_MASK
  62342. COMPUTE_PGM_RSRC2__USER_SGPR__SHIFT
  62343. COMPUTE_PGM_RSRC3__SHARED_VGPR_CNT_MASK
  62344. COMPUTE_PGM_RSRC3__SHARED_VGPR_CNT__SHIFT
  62345. COMPUTE_PIPELINESTAT_ENABLE__PIPELINESTAT_ENABLE_MASK
  62346. COMPUTE_PIPELINESTAT_ENABLE__PIPELINESTAT_ENABLE__SHIFT
  62347. COMPUTE_PREF_PRI_ACCUM_0__COEFFICIENT_HIER_SELECT_MASK
  62348. COMPUTE_PREF_PRI_ACCUM_0__COEFFICIENT_HIER_SELECT__SHIFT
  62349. COMPUTE_PREF_PRI_ACCUM_0__COEFFICIENT_MASK
  62350. COMPUTE_PREF_PRI_ACCUM_0__COEFFICIENT__SHIFT
  62351. COMPUTE_PREF_PRI_ACCUM_0__CONTRIBUTION_HIER_SELECT_MASK
  62352. COMPUTE_PREF_PRI_ACCUM_0__CONTRIBUTION_HIER_SELECT__SHIFT
  62353. COMPUTE_PREF_PRI_ACCUM_0__CONTRIBUTION_MASK
  62354. COMPUTE_PREF_PRI_ACCUM_0__CONTRIBUTION__SHIFT
  62355. COMPUTE_PREF_PRI_ACCUM_0__GROUP_UPDATE_EN_MASK
  62356. COMPUTE_PREF_PRI_ACCUM_0__GROUP_UPDATE_EN__SHIFT
  62357. COMPUTE_PREF_PRI_ACCUM_0__RESERVED_MASK
  62358. COMPUTE_PREF_PRI_ACCUM_0__RESERVED__SHIFT
  62359. COMPUTE_PREF_PRI_ACCUM_1__COEFFICIENT_HIER_SELECT_MASK
  62360. COMPUTE_PREF_PRI_ACCUM_1__COEFFICIENT_HIER_SELECT__SHIFT
  62361. COMPUTE_PREF_PRI_ACCUM_1__COEFFICIENT_MASK
  62362. COMPUTE_PREF_PRI_ACCUM_1__COEFFICIENT__SHIFT
  62363. COMPUTE_PREF_PRI_ACCUM_1__CONTRIBUTION_HIER_SELECT_MASK
  62364. COMPUTE_PREF_PRI_ACCUM_1__CONTRIBUTION_HIER_SELECT__SHIFT
  62365. COMPUTE_PREF_PRI_ACCUM_1__CONTRIBUTION_MASK
  62366. COMPUTE_PREF_PRI_ACCUM_1__CONTRIBUTION__SHIFT
  62367. COMPUTE_PREF_PRI_ACCUM_1__GROUP_UPDATE_EN_MASK
  62368. COMPUTE_PREF_PRI_ACCUM_1__GROUP_UPDATE_EN__SHIFT
  62369. COMPUTE_PREF_PRI_ACCUM_1__RESERVED_MASK
  62370. COMPUTE_PREF_PRI_ACCUM_1__RESERVED__SHIFT
  62371. COMPUTE_PREF_PRI_ACCUM_2__COEFFICIENT_HIER_SELECT_MASK
  62372. COMPUTE_PREF_PRI_ACCUM_2__COEFFICIENT_HIER_SELECT__SHIFT
  62373. COMPUTE_PREF_PRI_ACCUM_2__COEFFICIENT_MASK
  62374. COMPUTE_PREF_PRI_ACCUM_2__COEFFICIENT__SHIFT
  62375. COMPUTE_PREF_PRI_ACCUM_2__CONTRIBUTION_HIER_SELECT_MASK
  62376. COMPUTE_PREF_PRI_ACCUM_2__CONTRIBUTION_HIER_SELECT__SHIFT
  62377. COMPUTE_PREF_PRI_ACCUM_2__CONTRIBUTION_MASK
  62378. COMPUTE_PREF_PRI_ACCUM_2__CONTRIBUTION__SHIFT
  62379. COMPUTE_PREF_PRI_ACCUM_2__GROUP_UPDATE_EN_MASK
  62380. COMPUTE_PREF_PRI_ACCUM_2__GROUP_UPDATE_EN__SHIFT
  62381. COMPUTE_PREF_PRI_ACCUM_2__RESERVED_MASK
  62382. COMPUTE_PREF_PRI_ACCUM_2__RESERVED__SHIFT
  62383. COMPUTE_PREF_PRI_ACCUM_3__COEFFICIENT_HIER_SELECT_MASK
  62384. COMPUTE_PREF_PRI_ACCUM_3__COEFFICIENT_HIER_SELECT__SHIFT
  62385. COMPUTE_PREF_PRI_ACCUM_3__COEFFICIENT_MASK
  62386. COMPUTE_PREF_PRI_ACCUM_3__COEFFICIENT__SHIFT
  62387. COMPUTE_PREF_PRI_ACCUM_3__CONTRIBUTION_HIER_SELECT_MASK
  62388. COMPUTE_PREF_PRI_ACCUM_3__CONTRIBUTION_HIER_SELECT__SHIFT
  62389. COMPUTE_PREF_PRI_ACCUM_3__CONTRIBUTION_MASK
  62390. COMPUTE_PREF_PRI_ACCUM_3__CONTRIBUTION__SHIFT
  62391. COMPUTE_PREF_PRI_ACCUM_3__GROUP_UPDATE_EN_MASK
  62392. COMPUTE_PREF_PRI_ACCUM_3__GROUP_UPDATE_EN__SHIFT
  62393. COMPUTE_PREF_PRI_ACCUM_3__RESERVED_MASK
  62394. COMPUTE_PREF_PRI_ACCUM_3__RESERVED__SHIFT
  62395. COMPUTE_RATIO
  62396. COMPUTE_RELAUNCH2__IS_EVENT_MASK
  62397. COMPUTE_RELAUNCH2__IS_EVENT__SHIFT
  62398. COMPUTE_RELAUNCH2__IS_STATE_MASK
  62399. COMPUTE_RELAUNCH2__IS_STATE__SHIFT
  62400. COMPUTE_RELAUNCH2__PAYLOAD_MASK
  62401. COMPUTE_RELAUNCH2__PAYLOAD__SHIFT
  62402. COMPUTE_RELAUNCH__IS_EVENT_MASK
  62403. COMPUTE_RELAUNCH__IS_EVENT__SHIFT
  62404. COMPUTE_RELAUNCH__IS_STATE_MASK
  62405. COMPUTE_RELAUNCH__IS_STATE__SHIFT
  62406. COMPUTE_RELAUNCH__PAYLOAD_MASK
  62407. COMPUTE_RELAUNCH__PAYLOAD__SHIFT
  62408. COMPUTE_REQ_CTRL__ALLOCATION_RATE_THROTTLING_THRESHOLD_MASK
  62409. COMPUTE_REQ_CTRL__ALLOCATION_RATE_THROTTLING_THRESHOLD__SHIFT
  62410. COMPUTE_REQ_CTRL__DEDICATED_PREALLOCATION_BUFFER_LIMIT_MASK
  62411. COMPUTE_REQ_CTRL__DEDICATED_PREALLOCATION_BUFFER_LIMIT__SHIFT
  62412. COMPUTE_REQ_CTRL__GLOBAL_SCANNING_EN_MASK
  62413. COMPUTE_REQ_CTRL__GLOBAL_SCANNING_EN__SHIFT
  62414. COMPUTE_REQ_CTRL__HARD_LOCK_HYSTERESIS_MASK
  62415. COMPUTE_REQ_CTRL__HARD_LOCK_HYSTERESIS__SHIFT
  62416. COMPUTE_REQ_CTRL__HARD_LOCK_LOW_THRESHOLD_MASK
  62417. COMPUTE_REQ_CTRL__HARD_LOCK_LOW_THRESHOLD__SHIFT
  62418. COMPUTE_REQ_CTRL__NUMBER_OF_REQUESTS_PER_CU_MASK
  62419. COMPUTE_REQ_CTRL__NUMBER_OF_REQUESTS_PER_CU__SHIFT
  62420. COMPUTE_REQ_CTRL__PRODUCER_REQUEST_LOCKOUT_MASK
  62421. COMPUTE_REQ_CTRL__PRODUCER_REQUEST_LOCKOUT__SHIFT
  62422. COMPUTE_REQ_CTRL__SOFT_GROUPING_ALLOCATION_TIMEOUT_MASK
  62423. COMPUTE_REQ_CTRL__SOFT_GROUPING_ALLOCATION_TIMEOUT__SHIFT
  62424. COMPUTE_REQ_CTRL__SOFT_GROUPING_EN_MASK
  62425. COMPUTE_REQ_CTRL__SOFT_GROUPING_EN__SHIFT
  62426. COMPUTE_RESOURCE_LIMITS__CU_GROUP_COUNT_MASK
  62427. COMPUTE_RESOURCE_LIMITS__CU_GROUP_COUNT__SHIFT
  62428. COMPUTE_RESOURCE_LIMITS__FORCE_SIMD_DIST_MASK
  62429. COMPUTE_RESOURCE_LIMITS__FORCE_SIMD_DIST__SHIFT
  62430. COMPUTE_RESOURCE_LIMITS__LOCK_THRESHOLD_MASK
  62431. COMPUTE_RESOURCE_LIMITS__LOCK_THRESHOLD__SHIFT
  62432. COMPUTE_RESOURCE_LIMITS__SIMD_DEST_CNTL_MASK
  62433. COMPUTE_RESOURCE_LIMITS__SIMD_DEST_CNTL__SHIFT
  62434. COMPUTE_RESOURCE_LIMITS__SIMD_DISABLE_MASK
  62435. COMPUTE_RESOURCE_LIMITS__SIMD_DISABLE__SHIFT
  62436. COMPUTE_RESOURCE_LIMITS__TG_PER_CU_MASK
  62437. COMPUTE_RESOURCE_LIMITS__TG_PER_CU__SHIFT
  62438. COMPUTE_RESOURCE_LIMITS__WAVES_PER_SH_MASK
  62439. COMPUTE_RESOURCE_LIMITS__WAVES_PER_SH__SHIFT
  62440. COMPUTE_RESTART_X__RESTART_MASK
  62441. COMPUTE_RESTART_X__RESTART__SHIFT
  62442. COMPUTE_RESTART_Y__RESTART_MASK
  62443. COMPUTE_RESTART_Y__RESTART__SHIFT
  62444. COMPUTE_RESTART_Z__RESTART_MASK
  62445. COMPUTE_RESTART_Z__RESTART__SHIFT
  62446. COMPUTE_SHADER_CHKSUM__CHECKSUM_MASK
  62447. COMPUTE_SHADER_CHKSUM__CHECKSUM__SHIFT
  62448. COMPUTE_START_X__START_MASK
  62449. COMPUTE_START_X__START__SHIFT
  62450. COMPUTE_START_Y__START_MASK
  62451. COMPUTE_START_Y__START__SHIFT
  62452. COMPUTE_START_Z__START_MASK
  62453. COMPUTE_START_Z__START__SHIFT
  62454. COMPUTE_STATIC_THREAD_MGMT_SE0__SA0_CU_EN_MASK
  62455. COMPUTE_STATIC_THREAD_MGMT_SE0__SA0_CU_EN__SHIFT
  62456. COMPUTE_STATIC_THREAD_MGMT_SE0__SA1_CU_EN_MASK
  62457. COMPUTE_STATIC_THREAD_MGMT_SE0__SA1_CU_EN__SHIFT
  62458. COMPUTE_STATIC_THREAD_MGMT_SE0__SH0_CU_EN_MASK
  62459. COMPUTE_STATIC_THREAD_MGMT_SE0__SH0_CU_EN__SHIFT
  62460. COMPUTE_STATIC_THREAD_MGMT_SE0__SH1_CU_EN_MASK
  62461. COMPUTE_STATIC_THREAD_MGMT_SE0__SH1_CU_EN__SHIFT
  62462. COMPUTE_STATIC_THREAD_MGMT_SE1__SA0_CU_EN_MASK
  62463. COMPUTE_STATIC_THREAD_MGMT_SE1__SA0_CU_EN__SHIFT
  62464. COMPUTE_STATIC_THREAD_MGMT_SE1__SA1_CU_EN_MASK
  62465. COMPUTE_STATIC_THREAD_MGMT_SE1__SA1_CU_EN__SHIFT
  62466. COMPUTE_STATIC_THREAD_MGMT_SE1__SH0_CU_EN_MASK
  62467. COMPUTE_STATIC_THREAD_MGMT_SE1__SH0_CU_EN__SHIFT
  62468. COMPUTE_STATIC_THREAD_MGMT_SE1__SH1_CU_EN_MASK
  62469. COMPUTE_STATIC_THREAD_MGMT_SE1__SH1_CU_EN__SHIFT
  62470. COMPUTE_STATIC_THREAD_MGMT_SE2__SA0_CU_EN_MASK
  62471. COMPUTE_STATIC_THREAD_MGMT_SE2__SA0_CU_EN__SHIFT
  62472. COMPUTE_STATIC_THREAD_MGMT_SE2__SA1_CU_EN_MASK
  62473. COMPUTE_STATIC_THREAD_MGMT_SE2__SA1_CU_EN__SHIFT
  62474. COMPUTE_STATIC_THREAD_MGMT_SE2__SH0_CU_EN_MASK
  62475. COMPUTE_STATIC_THREAD_MGMT_SE2__SH0_CU_EN__SHIFT
  62476. COMPUTE_STATIC_THREAD_MGMT_SE2__SH1_CU_EN_MASK
  62477. COMPUTE_STATIC_THREAD_MGMT_SE2__SH1_CU_EN__SHIFT
  62478. COMPUTE_STATIC_THREAD_MGMT_SE3__SA0_CU_EN_MASK
  62479. COMPUTE_STATIC_THREAD_MGMT_SE3__SA0_CU_EN__SHIFT
  62480. COMPUTE_STATIC_THREAD_MGMT_SE3__SA1_CU_EN_MASK
  62481. COMPUTE_STATIC_THREAD_MGMT_SE3__SA1_CU_EN__SHIFT
  62482. COMPUTE_STATIC_THREAD_MGMT_SE3__SH0_CU_EN_MASK
  62483. COMPUTE_STATIC_THREAD_MGMT_SE3__SH0_CU_EN__SHIFT
  62484. COMPUTE_STATIC_THREAD_MGMT_SE3__SH1_CU_EN_MASK
  62485. COMPUTE_STATIC_THREAD_MGMT_SE3__SH1_CU_EN__SHIFT
  62486. COMPUTE_TAG_TARGET
  62487. COMPUTE_TBA_HI__DATA_MASK
  62488. COMPUTE_TBA_HI__DATA__SHIFT
  62489. COMPUTE_TBA_LO__DATA_MASK
  62490. COMPUTE_TBA_LO__DATA__SHIFT
  62491. COMPUTE_THREADGROUP_ID__THREADGROUP_ID_MASK
  62492. COMPUTE_THREADGROUP_ID__THREADGROUP_ID__SHIFT
  62493. COMPUTE_THREAD_TRACE_ENABLE__THREAD_TRACE_ENABLE_MASK
  62494. COMPUTE_THREAD_TRACE_ENABLE__THREAD_TRACE_ENABLE__SHIFT
  62495. COMPUTE_TMA_HI__DATA_MASK
  62496. COMPUTE_TMA_HI__DATA__SHIFT
  62497. COMPUTE_TMA_LO__DATA_MASK
  62498. COMPUTE_TMA_LO__DATA__SHIFT
  62499. COMPUTE_TMPRING_SIZE__WAVESIZE_MASK
  62500. COMPUTE_TMPRING_SIZE__WAVESIZE__SHIFT
  62501. COMPUTE_TMPRING_SIZE__WAVES_MASK
  62502. COMPUTE_TMPRING_SIZE__WAVES__SHIFT
  62503. COMPUTE_TO
  62504. COMPUTE_TSB_PTR
  62505. COMPUTE_UNIT_CPU
  62506. COMPUTE_UNIT_GPU
  62507. COMPUTE_USER_ACCUM_0__CONTRIBUTION_MASK
  62508. COMPUTE_USER_ACCUM_0__CONTRIBUTION__SHIFT
  62509. COMPUTE_USER_ACCUM_1__CONTRIBUTION_MASK
  62510. COMPUTE_USER_ACCUM_1__CONTRIBUTION__SHIFT
  62511. COMPUTE_USER_ACCUM_2__CONTRIBUTION_MASK
  62512. COMPUTE_USER_ACCUM_2__CONTRIBUTION__SHIFT
  62513. COMPUTE_USER_ACCUM_3__CONTRIBUTION_MASK
  62514. COMPUTE_USER_ACCUM_3__CONTRIBUTION__SHIFT
  62515. COMPUTE_USER_DATA_0__DATA_MASK
  62516. COMPUTE_USER_DATA_0__DATA__SHIFT
  62517. COMPUTE_USER_DATA_10__DATA_MASK
  62518. COMPUTE_USER_DATA_10__DATA__SHIFT
  62519. COMPUTE_USER_DATA_11__DATA_MASK
  62520. COMPUTE_USER_DATA_11__DATA__SHIFT
  62521. COMPUTE_USER_DATA_12__DATA_MASK
  62522. COMPUTE_USER_DATA_12__DATA__SHIFT
  62523. COMPUTE_USER_DATA_13__DATA_MASK
  62524. COMPUTE_USER_DATA_13__DATA__SHIFT
  62525. COMPUTE_USER_DATA_14__DATA_MASK
  62526. COMPUTE_USER_DATA_14__DATA__SHIFT
  62527. COMPUTE_USER_DATA_15__DATA_MASK
  62528. COMPUTE_USER_DATA_15__DATA__SHIFT
  62529. COMPUTE_USER_DATA_1__DATA_MASK
  62530. COMPUTE_USER_DATA_1__DATA__SHIFT
  62531. COMPUTE_USER_DATA_2__DATA_MASK
  62532. COMPUTE_USER_DATA_2__DATA__SHIFT
  62533. COMPUTE_USER_DATA_3__DATA_MASK
  62534. COMPUTE_USER_DATA_3__DATA__SHIFT
  62535. COMPUTE_USER_DATA_4__DATA_MASK
  62536. COMPUTE_USER_DATA_4__DATA__SHIFT
  62537. COMPUTE_USER_DATA_5__DATA_MASK
  62538. COMPUTE_USER_DATA_5__DATA__SHIFT
  62539. COMPUTE_USER_DATA_6__DATA_MASK
  62540. COMPUTE_USER_DATA_6__DATA__SHIFT
  62541. COMPUTE_USER_DATA_7__DATA_MASK
  62542. COMPUTE_USER_DATA_7__DATA__SHIFT
  62543. COMPUTE_USER_DATA_8__DATA_MASK
  62544. COMPUTE_USER_DATA_8__DATA__SHIFT
  62545. COMPUTE_USER_DATA_9__DATA_MASK
  62546. COMPUTE_USER_DATA_9__DATA__SHIFT
  62547. COMPUTE_VMID__DATA_MASK
  62548. COMPUTE_VMID__DATA__SHIFT
  62549. COMPUTE_WAVE_RESTORE_ADDR_HI__ADDR_MASK
  62550. COMPUTE_WAVE_RESTORE_ADDR_HI__ADDR__SHIFT
  62551. COMPUTE_WAVE_RESTORE_ADDR_LO__ADDR_MASK
  62552. COMPUTE_WAVE_RESTORE_ADDR_LO__ADDR__SHIFT
  62553. COMPUTE_WAVE_RESTORE_CONTROL__ATC_MASK
  62554. COMPUTE_WAVE_RESTORE_CONTROL__ATC__SHIFT
  62555. COMPUTE_WAVE_RESTORE_CONTROL__MTYPE_MASK
  62556. COMPUTE_WAVE_RESTORE_CONTROL__MTYPE__SHIFT
  62557. COMPUTE_WEIGHTED_DIFF
  62558. COMPXDP
  62559. COMPXSP
  62560. COMPYDP
  62561. COMPYSP
  62562. COMPZDP
  62563. COMPZSP
  62564. COMP_0
  62565. COMP_1_2
  62566. COMP_3
  62567. COMP_AMAZON_SE
  62568. COMP_AMSDU
  62569. COMP_AR10
  62570. COMP_AR9
  62571. COMP_AUX
  62572. COMP_A_eq_B
  62573. COMP_A_gt_B
  62574. COMP_A_lt_B
  62575. COMP_BABBLE_DETECTED_ERROR
  62576. COMP_BANDWIDTH_ERROR
  62577. COMP_BANDWIDTH_OVERRUN_ERROR
  62578. COMP_BASIC
  62579. COMP_BB_POWERSAVING
  62580. COMP_BEACON
  62581. COMP_BLUE
  62582. COMP_BT_COEXIST
  62583. COMP_BUF_SIZE
  62584. COMP_BUSY_TIMEOUT
  62585. COMP_CAMERA
  62586. COMP_CFG_V1
  62587. COMP_CFG_V2
  62588. COMP_CH
  62589. COMP_CHAN
  62590. COMP_CKSUM_LEN
  62591. COMP_CMD
  62592. COMP_CMDPKT
  62593. COMP_CODEC
  62594. COMP_CODE_MASK
  62595. COMP_COMMAND_ABORTED
  62596. COMP_COMMAND_RING_STOPPED
  62597. COMP_CONTEXT_STATE_ERROR
  62598. COMP_COUNT
  62599. COMP_CPU
  62600. COMP_DANUBE
  62601. COMP_DATA_BUFFER_ERROR
  62602. COMP_DBG
  62603. COMP_DIG
  62604. COMP_DONE
  62605. COMP_DOWN
  62606. COMP_DUMMY
  62607. COMP_Denormal
  62608. COMP_EASY_CONCURRENT
  62609. COMP_EFUSE
  62610. COMP_EMPTY
  62611. COMP_EN
  62612. COMP_ENDPOINT_NOT_ENABLED_ERROR
  62613. COMP_EN_CTL__cfg_cml_cmos_sel_MASK
  62614. COMP_EN_CTL__cfg_cml_cmos_sel__SHIFT
  62615. COMP_EN_CTL__comp_done_MASK
  62616. COMP_EN_CTL__comp_done__SHIFT
  62617. COMP_EN_CTL__comp_en_MASK
  62618. COMP_EN_CTL__comp_en__SHIFT
  62619. COMP_EN_CTL__comp_en_override_MASK
  62620. COMP_EN_CTL__comp_en_override__SHIFT
  62621. COMP_EN_CTL__dsm_sel_MASK
  62622. COMP_EN_CTL__dsm_sel__SHIFT
  62623. COMP_EN_CTL__zcal_ana_dbg_sel_MASK
  62624. COMP_EN_CTL__zcal_ana_dbg_sel__SHIFT
  62625. COMP_EN_CTL__zcal_base_en_MASK
  62626. COMP_EN_CTL__zcal_base_en__SHIFT
  62627. COMP_EN_CTL__zcal_cal_rtt_MASK
  62628. COMP_EN_CTL__zcal_cal_rtt__SHIFT
  62629. COMP_EN_CTL__zcal_code_MASK
  62630. COMP_EN_CTL__zcal_code__SHIFT
  62631. COMP_EN_CTL__zcal_code_override_MASK
  62632. COMP_EN_CTL__zcal_code_override__SHIFT
  62633. COMP_EN_CTL__zcal_ht_rtt_sel_MASK
  62634. COMP_EN_CTL__zcal_ht_rtt_sel__SHIFT
  62635. COMP_EN_CTL__zcal_ron_cal_mode_MASK
  62636. COMP_EN_CTL__zcal_ron_cal_mode__SHIFT
  62637. COMP_EN_DFX__autocal_ron_code_MASK
  62638. COMP_EN_DFX__autocal_ron_code__SHIFT
  62639. COMP_EN_DFX__autocal_rtt_code_MASK
  62640. COMP_EN_DFX__autocal_rtt_code__SHIFT
  62641. COMP_EN_DFX__broadcast_ron_code_MASK
  62642. COMP_EN_DFX__broadcast_ron_code__SHIFT
  62643. COMP_EN_DFX__broadcast_rtt_code_MASK
  62644. COMP_EN_DFX__broadcast_rtt_code__SHIFT
  62645. COMP_EN_DFX__pre_fused_ron_code_MASK
  62646. COMP_EN_DFX__pre_fused_ron_code__SHIFT
  62647. COMP_EN_DFX__pre_fused_rtt_code_MASK
  62648. COMP_EN_DFX__pre_fused_rtt_code__SHIFT
  62649. COMP_EPROM
  62650. COMP_ERR
  62651. COMP_EVENT_LOST_ERROR
  62652. COMP_EVENT_RING_FULL_ERROR
  62653. COMP_EXP_MAC_DISABLED
  62654. COMP_EXP_MAC_ENABLED
  62655. COMP_EXP_MAC_SHIFT
  62656. COMP_FALCON
  62657. COMP_FIRMWARE
  62658. COMP_FW
  62659. COMP_GR9
  62660. COMP_GREEN1
  62661. COMP_GREEN2
  62662. COMP_GRX390
  62663. COMP_HALDM
  62664. COMP_HDR_LEN
  62665. COMP_HIPWR
  62666. COMP_HLEN
  62667. COMP_HT
  62668. COMP_ID_UNASSIGNED
  62669. COMP_ID__NONE
  62670. COMP_IMAGE_ENCODE
  62671. COMP_INCOMPATIBLE_DEVICE_ERROR
  62672. COMP_INIT
  62673. COMP_INTR
  62674. COMP_INVALID
  62675. COMP_INVALID_STREAM_ID_ERROR
  62676. COMP_INVALID_STREAM_TYPE_ERROR
  62677. COMP_IO
  62678. COMP_IQK
  62679. COMP_ISOCH_BUFFER_OVERRUN
  62680. COMP_LED
  62681. COMP_LPS
  62682. COMP_MAC80211
  62683. COMP_MAX
  62684. COMP_MAX_DATA_WIDTH
  62685. COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR
  62686. COMP_MAX_WORDSIZE
  62687. COMP_MISSED_SERVICE_ERROR
  62688. COMP_MLME
  62689. COMP_MODE_CTRL_0
  62690. COMP_MODE_RCVRY_MSECS
  62691. COMP_NAME_TO_TYPE
  62692. COMP_NO_PING_RESPONSE_ERROR
  62693. COMP_NO_SLOTS_AVAILABLE_ERROR
  62694. COMP_NaN
  62695. COMP_No_Comp
  62696. COMP_PARAMETER_ERROR
  62697. COMP_PHY
  62698. COMP_PLATFORM
  62699. COMP_POWER
  62700. COMP_POWER_TRACKING
  62701. COMP_PREVIEW
  62702. COMP_PS
  62703. COMP_QOS
  62704. COMP_RAID
  62705. COMP_RATE
  62706. COMP_RATR
  62707. COMP_RECV
  62708. COMP_RED
  62709. COMP_REGD
  62710. COMP_RESET
  62711. COMP_RESOURCE_ERROR
  62712. COMP_RF
  62713. COMP_RING_I_TO_S
  62714. COMP_RING_OVERRUN
  62715. COMP_RING_UNDERRUN
  62716. COMP_RM
  62717. COMP_RXDESC
  62718. COMP_SCAN
  62719. COMP_SEC
  62720. COMP_SECONDARY_BANDWIDTH_ERROR
  62721. COMP_SEND
  62722. COMP_SHORT_KEYS
  62723. COMP_SHORT_PACKET
  62724. COMP_SLOT_NOT_ENABLED_ERROR
  62725. COMP_SNaN
  62726. COMP_SPLIT_TRANSACTION_ERROR
  62727. COMP_STALL_ERROR
  62728. COMP_START
  62729. COMP_STOPPED
  62730. COMP_STOPPED_LENGTH_INVALID
  62731. COMP_STOPPED_SHORT_PACKET
  62732. COMP_STORE_IDX
  62733. COMP_STRIPE
  62734. COMP_SUCCESS
  62735. COMP_SWAS
  62736. COMP_SWBW
  62737. COMP_SW_MASK
  62738. COMP_TARGET_DEF
  62739. COMP_TRACE
  62740. COMP_TRB_ERROR
  62741. COMP_TRUST_CFG_V1
  62742. COMP_TRUST_CFG_V2
  62743. COMP_TURBO
  62744. COMP_TWINPASS
  62745. COMP_TXAGC
  62746. COMP_TX_REPORT
  62747. COMP_UNDEFINED_ERROR
  62748. COMP_USB
  62749. COMP_USB_TRANSACTION_ERROR
  62750. COMP_VF_EVENT_RING_FULL_ERROR
  62751. COMP_VIDEO_ENCODE
  62752. COMP_VR9
  62753. COMREG1_1632CNT
  62754. COMREG1_2SCADC
  62755. COMREG1_CONVINTEN
  62756. COMREG1_DAQEN
  62757. COMREG1_DMAEN
  62758. COMREG1_SCANEN
  62759. COMREG2_DOUTEN0
  62760. COMREG2_DOUTEN1
  62761. COMREG2_INTEN
  62762. COMREG2_SCN2
  62763. COMSTAT
  62764. COMSTATEN
  62765. COMSTAT_MASK
  62766. COMSTOCK
  62767. COMSUMER
  62768. COMTIMER_EN
  62769. COMTYPE_AUDIO
  62770. COMTYPE_AUDIODAC
  62771. COMTYPE_BMP
  62772. COMTYPE_CI_LL
  62773. COMTYPE_COMMON_IF
  62774. COMTYPE_ENCODER
  62775. COMTYPE_MISC
  62776. COMTYPE_MPEGDECODER
  62777. COMTYPE_NOCOM
  62778. COMTYPE_OSD
  62779. COMTYPE_PES
  62780. COMTYPE_PIDFILTER
  62781. COMTYPE_PID_FILTER
  62782. COMTYPE_REC_PLAY
  62783. COMTYPE_REQUEST
  62784. COMTYPE_SYSTEM
  62785. COMTYPE_TS
  62786. COMTYPE_VIDEO
  62787. COM_AUDIO
  62788. COM_AUX_UART
  62789. COM_AUX_USB
  62790. COM_BUFF
  62791. COM_BUFF_SIZE
  62792. COM_CHAN_RST_ACK_OFFSET
  62793. COM_CHAN_RST_REQ_OFFSET
  62794. COM_CH_STTS_BITS
  62795. COM_CLK_DIV_CTRL_SEL
  62796. COM_DPHYCONTRX
  62797. COM_FLAG
  62798. COM_IF_LOCK
  62799. COM_OFF
  62800. COM_OPEN
  62801. COM_Q_ENTRIES
  62802. COM_REG_1
  62803. COM_REG_2
  62804. COM_UART
  62805. COM_ULPD_PLL_CLK_REQ
  62806. COM_USB
  62807. CON
  62808. CON0
  62809. CON0_BASE_EN
  62810. CON0_ISO_EN
  62811. CON0_MT2712_RST_BAR
  62812. CON0_MT6797_RST_BAR
  62813. CON0_MT7622_RST_BAR
  62814. CON0_MT7629_RST_BAR
  62815. CON0_MT8135_RST_BAR
  62816. CON0_MT8173_RST_BAR
  62817. CON0_MT8516_RST_BAR
  62818. CON0_MT8590_RST_BAR
  62819. CON0_PWR_ON
  62820. CON1
  62821. CON3270_OUTPUT_BUFFER_SIZE
  62822. CON3270_STRING_PAGES
  62823. CON50
  62824. CON5068
  62825. CON68
  62826. CONCAT
  62827. CONCAT1
  62828. CONCAT2
  62829. CONCATENATE
  62830. CONCAT_
  62831. CONCAT__
  62832. CONCENTRATOR
  62833. CONCURRENT_CONN_SUPP
  62834. COND
  62835. COND1
  62836. COND2
  62837. CONDA
  62838. CONDCC
  62839. CONDCS
  62840. CONDE
  62841. CONDG
  62842. CONDGE
  62843. CONDGEU
  62844. CONDGU
  62845. CONDIRQ
  62846. CONDITIONAL
  62847. CONDITION_CYCLE_REQUEST
  62848. CONDITION_GOOD
  62849. CONDITION_INSTRUCTIONS
  62850. CONDL
  62851. CONDLE
  62852. CONDLEU
  62853. CONDLU
  62854. CONDN
  62855. CONDNE
  62856. CONDNEG
  62857. CONDOR_INPUT_DESKTOP_INFO
  62858. CONDOR_INPUT_DISPLAY_BITS
  62859. CONDOR_INPUT_DISPLAY_RESX
  62860. CONDOR_INPUT_DISPLAY_RESY
  62861. CONDOR_MOUSE_DATA
  62862. CONDOR_MOUSE_INTR_STATUS_MASK
  62863. CONDOR_MOUSE_ISR_CONTROL
  62864. CONDOR_MOUSE_ISR_STATUS
  62865. CONDOR_MOUSE_MAX_X
  62866. CONDOR_MOUSE_MAX_Y
  62867. CONDOR_MOUSE_Q_BEGIN
  62868. CONDOR_MOUSE_Q_READER
  62869. CONDOR_MOUSE_Q_WRITER
  62870. CONDOR_OUTPUT_VNC_STATUS
  62871. CONDPOS
  62872. CONDUIT_HVC
  62873. CONDUIT_INVALID
  62874. CONDUIT_MODE
  62875. CONDUIT_SMC
  62876. CONDVC
  62877. CONDVS
  62878. COND_AND
  62879. COND_BITS
  62880. COND_BOOL
  62881. COND_CMP_FALSE
  62882. COND_CMP_TRUE
  62883. COND_ELSE
  62884. COND_ENDIF
  62885. COND_EQ
  62886. COND_EXPR_MAXDEPTH
  62887. COND_GE
  62888. COND_GT
  62889. COND_JMP
  62890. COND_JMP_OPCODE_INVALID
  62891. COND_LAST
  62892. COND_LE
  62893. COND_LT
  62894. COND_NE
  62895. COND_NEQ
  62896. COND_NOSTART
  62897. COND_NOSTOP
  62898. COND_NOT
  62899. COND_OR
  62900. COND_POP
  62901. COND_PUSH
  62902. COND_RESTART
  62903. COND_SEL
  62904. COND_START_STOP
  62905. COND_SYSCALL
  62906. COND_SYSCALL_COMPAT
  62907. COND_XOR
  62908. CONEXANT
  62909. CONEXANT_D680_DMB
  62910. CONEX_CAM
  62911. CONF
  62912. CONF2_DATPOL
  62913. CONF2_FORCE_DEVICE
  62914. CONF2_FORCE_HOST
  62915. CONF2_FORCE_HOST_VBUS_LOW
  62916. CONF2_NO_OVERRIDE
  62917. CONF2_OTGMODE
  62918. CONF2_OTGPWRDN
  62919. CONF2_PHYCLKGD
  62920. CONF2_PHYPWRDN
  62921. CONF2_PHY_GPIOMODE
  62922. CONF2_PHY_PLLON
  62923. CONF2_REFFREQ
  62924. CONF2_REFFREQ_13MHZ
  62925. CONF2_REFFREQ_24MHZ
  62926. CONF2_REFFREQ_26MHZ
  62927. CONF2_RESET
  62928. CONF2_SESENDEN
  62929. CONF2_VBDTCTEN
  62930. CONF2_VBUSSENSE
  62931. CONFACK
  62932. CONFCTL
  62933. CONFES_READ_PART_MASK
  62934. CONFES_WRITE_PART_MASK
  62935. CONFIDENCE_OK
  62936. CONFIG
  62937. CONFIG0_DFL
  62938. CONFIG0_DFL_1
  62939. CONFIG0_FLOW_CTL
  62940. CONFIG0_FLOW_RX
  62941. CONFIG0_FLOW_TX
  62942. CONFIG0_FLOW_TX_RX
  62943. CONFIG0_MAXLEN_10k
  62944. CONFIG0_MAXLEN_1518
  62945. CONFIG0_MAXLEN_1518__6
  62946. CONFIG0_MAXLEN_1518__7
  62947. CONFIG0_MAXLEN_1522
  62948. CONFIG0_MAXLEN_1536
  62949. CONFIG0_MAXLEN_1542
  62950. CONFIG0_MAXLEN_9k
  62951. CONFIG0_MAXLEN_MASK
  62952. CONFIG0_MAXLEN_SHIFT
  62953. CONFIG0_RST
  62954. CONFIG0_RST_1
  62955. CONFIG0_RX_CHKSUM
  62956. CONFIG0_TX_RX_DISABLE
  62957. CONFIG1
  62958. CONFIG1_DMA_ENABLE
  62959. CONFIG1_GPOUT1
  62960. CONFIG1_GPOUT2
  62961. CONFIG1_GPOUT3
  62962. CONFIG1_MASK_LEDMODE
  62963. CONFIG1_MASK_LOOPMODE
  62964. CONFIG1_POWERDOWN
  62965. CONFIG1_PROMCLK
  62966. CONFIG1_PROMDATA
  62967. CONFIG1_SET_LEDMODE
  62968. CONFIG1_SET_LOOPMODE
  62969. CONFIG1_SET_READMODE
  62970. CONFIG2
  62971. CONFIG2_ATTN
  62972. CONFIG2_BAR1_SIZE_EN
  62973. CONFIG2_BAR1_SIZE_MASK
  62974. CONFIG2_CBR_ENABLE
  62975. CONFIG2_HEC_DROP
  62976. CONFIG2_HOWMANY
  62977. CONFIG2_PTI7_MODE
  62978. CONFIG2_SET_TRASH
  62979. CONFIG2_TRASH_ALL
  62980. CONFIG2_TX_DISABLE
  62981. CONFIG2_VCI0_NORMAL
  62982. CONFIG2_VPI_CHK_DIS
  62983. CONFIG3
  62984. CONFIG3_MT
  62985. CONFIG3_MT_SHIFT
  62986. CONFIG3_SMBALERT
  62987. CONFIG3_THERM
  62988. CONFIG4
  62989. CONFIG4_ATTN_IN10
  62990. CONFIG4_ATTN_IN43
  62991. CONFIG4_MAXDUTY
  62992. CONFIG4_PINFUNC
  62993. CONFIG5
  62994. CONFIG5_TEMPOFFSET
  62995. CONFIG5_TWOSCOMP
  62996. CONFIG5_VIDGPIO
  62997. CONFIG7
  62998. CONFIGA
  62999. CONFIGB
  63000. CONFIGCLASS
  63001. CONFIGFS_ATTR
  63002. CONFIGFS_ATTR_RO
  63003. CONFIGFS_ATTR_WO
  63004. CONFIGFS_BIN_ATTR
  63005. CONFIGFS_BIN_ATTR_RO
  63006. CONFIGFS_BIN_ATTR_WO
  63007. CONFIGFS_DIR
  63008. CONFIGFS_ITEM_ATTR
  63009. CONFIGFS_ITEM_BIN_ATTR
  63010. CONFIGFS_ITEM_LINK
  63011. CONFIGFS_ITEM_NAME_LEN
  63012. CONFIGFS_MAGIC
  63013. CONFIGFS_NOT_PINNED
  63014. CONFIGFS_ROOT
  63015. CONFIGFS_USET_CREATING
  63016. CONFIGFS_USET_DEFAULT
  63017. CONFIGFS_USET_DIR
  63018. CONFIGFS_USET_DROPPING
  63019. CONFIGFS_USET_IN_MKDIR
  63020. CONFIGPARMS
  63021. CONFIGTYPE
  63022. CONFIGURATION1
  63023. CONFIGURATION_REG
  63024. CONFIGURATION_STATE
  63025. CONFIGURED
  63026. CONFIGURED_MSK
  63027. CONFIGURE_NIC_MODE
  63028. CONFIG_
  63029. CONFIG_0
  63030. CONFIG_1
  63031. CONFIG_128B_SWAPS
  63032. CONFIG_16BIT
  63033. CONFIG_1KB_ROW
  63034. CONFIG_1KB_ROW_OPT
  63035. CONFIG_1KB_SPLIT
  63036. CONFIG_1KB_SWAPS
  63037. CONFIG_1_PIPE
  63038. CONFIG_256B_GROUP
  63039. CONFIG_256B_SWAPS
  63040. CONFIG_2KB_ROW
  63041. CONFIG_2KB_ROW_OPT
  63042. CONFIG_2KB_SPLIT
  63043. CONFIG_2_PIPE
  63044. CONFIG_32BIT
  63045. CONFIG_4KB_ROW
  63046. CONFIG_4KB_ROW_OPT
  63047. CONFIG_4KB_SPLIT
  63048. CONFIG_4_BANK
  63049. CONFIG_4_PIPE
  63050. CONFIG_512B_GROUP
  63051. CONFIG_512B_SWAPS
  63052. CONFIG_64BIT
  63053. CONFIG_8660
  63054. CONFIG_8KB_ROW
  63055. CONFIG_8KB_ROW_OPT
  63056. CONFIG_8KB_SPLIT
  63057. CONFIG_8_BANK
  63058. CONFIG_8_PIPE
  63059. CONFIG_ACORNSCSI_CONSTANTS
  63060. CONFIG_ADDR
  63061. CONFIG_ADDR_8660
  63062. CONFIG_ADDR_AUTO_INCR_BIT
  63063. CONFIG_ALRT_BIT_ENBL
  63064. CONFIG_ALTIVEC
  63065. CONFIG_APER_SIZE_IND__APER_SIZE_MASK
  63066. CONFIG_APER_SIZE_IND__APER_SIZE__SHIFT
  63067. CONFIG_APER_SIZE__APER_SIZE_MASK
  63068. CONFIG_APER_SIZE__APER_SIZE__SHIFT
  63069. CONFIG_ARC_MMU_VER
  63070. CONFIG_ATM_ENI_BURST_RX_4W
  63071. CONFIG_ATM_ENI_BURST_TX_8W
  63072. CONFIG_ATM_FORE200E_DEBUG
  63073. CONFIG_ATT_ID_FRAME0
  63074. CONFIG_ATT_ID_FRAME1
  63075. CONFIG_ATT_ID_FRAME2
  63076. CONFIG_ATT_ID_FRAME3
  63077. CONFIG_ATT_ID_FRAME4
  63078. CONFIG_ATT_ID_FRAME5
  63079. CONFIG_ATT_ID_FRAME6
  63080. CONFIG_AUTO_READ_MODE
  63081. CONFIG_BAND_CBAND
  63082. CONFIG_BAND_UHF
  63083. CONFIG_BAND_VHF
  63084. CONFIG_BB_AGC_TAB
  63085. CONFIG_BB_AGC_TAB_2G
  63086. CONFIG_BB_AGC_TAB_5G
  63087. CONFIG_BB_AGC_TAB_DIFF
  63088. CONFIG_BB_PHY_REG
  63089. CONFIG_BB_PHY_REG_MP
  63090. CONFIG_BB_PHY_REG_PG
  63091. CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
  63092. CONFIG_BOOT_MODE_BIT
  63093. CONFIG_BUFNO_AUTO_INCR_BIT
  63094. CONFIG_BUF_SIZE
  63095. CONFIG_BUG
  63096. CONFIG_BUS_WIDTH_16
  63097. CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
  63098. CONFIG_CCR3
  63099. CONFIG_CCR3_MAPEN
  63100. CONFIG_CE0_TYPE
  63101. CONFIG_CE0_WRITE
  63102. CONFIG_CE1_TYPE
  63103. CONFIG_CE1_WRITE
  63104. CONFIG_CE2_TYPE
  63105. CONFIG_CE2_WRITE
  63106. CONFIG_CHANNEL_HT40
  63107. CONFIG_CHUNK
  63108. CONFIG_CIE
  63109. CONFIG_CLOS
  63110. CONFIG_CMD
  63111. CONFIG_CNTL
  63112. CONFIG_CNTL_IND__CFG_VGA_RAM_EN_MASK
  63113. CONFIG_CNTL_IND__CFG_VGA_RAM_EN__SHIFT
  63114. CONFIG_CNTL_IND__GENMO_MONO_ADDRESS_B_MASK
  63115. CONFIG_CNTL_IND__GENMO_MONO_ADDRESS_B__SHIFT
  63116. CONFIG_CNTL_IND__GRPH_ADRSEL_MASK
  63117. CONFIG_CNTL_IND__GRPH_ADRSEL__SHIFT
  63118. CONFIG_CNTL_IND__VGA_DIS_MASK
  63119. CONFIG_CNTL_IND__VGA_DIS__SHIFT
  63120. CONFIG_CNTL__CFG_VGA_RAM_EN_MASK
  63121. CONFIG_CNTL__CFG_VGA_RAM_EN__SHIFT
  63122. CONFIG_CNTL__GENMO_MONO_ADDRESS_B_MASK
  63123. CONFIG_CNTL__GENMO_MONO_ADDRESS_B__SHIFT
  63124. CONFIG_CNTL__GRPH_ADRSEL_MASK
  63125. CONFIG_CNTL__GRPH_ADRSEL__SHIFT
  63126. CONFIG_CNTL__VGA_DIS_MASK
  63127. CONFIG_CNTL__VGA_DIS__SHIFT
  63128. CONFIG_COM_BSY
  63129. CONFIG_CONTROL
  63130. CONFIG_CPU_HAS_PREFETCH
  63131. CONFIG_DEBUG_LOCK_ALLOC
  63132. CONFIG_DEBUG_OBJECTS_RCU_HEAD
  63133. CONFIG_DEFAULT
  63134. CONFIG_DEFAULT_VCIBITS
  63135. CONFIG_DEFAULT_VPIBITS
  63136. CONFIG_DEV_RX_CSUM_MODE_MASK
  63137. CONFIG_DEV_RX_CSUM_MODE_PORT1_BIT_OFFSET
  63138. CONFIG_DEV_RX_CSUM_MODE_PORT2_BIT_OFFSET
  63139. CONFIG_DIB0090_USE_PWM_AGC
  63140. CONFIG_DIO_CONSTANTS
  63141. CONFIG_DISABLE_LEGACY
  63142. CONFIG_DISABLE_RX_PORT
  63143. CONFIG_DMA_REQ_BIT
  63144. CONFIG_ECC_MODE_MASK
  63145. CONFIG_ECC_MODE_SHIFT
  63146. CONFIG_ECC_SEL
  63147. CONFIG_ECC_SRAM_ADDR_MASK
  63148. CONFIG_ECC_SRAM_ADDR_SHIFT
  63149. CONFIG_ECC_SRAM_REQ_BIT
  63150. CONFIG_ENTER
  63151. CONFIG_EPH_POWER_EN
  63152. CONFIG_ERR_COR
  63153. CONFIG_EXIT
  63154. CONFIG_EXTENDED_PAGE_HEADER
  63155. CONFIG_EXT_PHY
  63156. CONFIG_F0_BASE_IND__F0_BASE_MASK
  63157. CONFIG_F0_BASE_IND__F0_BASE__SHIFT
  63158. CONFIG_F0_BASE__F0_BASE_MASK
  63159. CONFIG_F0_BASE__F0_BASE__SHIFT
  63160. CONFIG_FARP_VAR
  63161. CONFIG_FAST_FLASH_BIT
  63162. CONFIG_FAT_DEFAULT_IOCHARSET
  63163. CONFIG_FB_AMIGA_AGA_ONLY
  63164. CONFIG_FB_AMIGA_ECS_ONLY
  63165. CONFIG_FB_AMIGA_OCS
  63166. CONFIG_FB_AMIGA_OCS_ONLY
  63167. CONFIG_FSL_DPA_PIRQ_FAST
  63168. CONFIG_FSL_DPA_PIRQ_SLOW
  63169. CONFIG_FW_AP
  63170. CONFIG_FW_AP_WoWLAN
  63171. CONFIG_FW_BT
  63172. CONFIG_FW_NIC
  63173. CONFIG_FW_NIC_2
  63174. CONFIG_FW_WoWLAN
  63175. CONFIG_FW_WoWLAN_2
  63176. CONFIG_GCR
  63177. CONFIG_GENERIC_ATOMIC64
  63178. CONFIG_GPCNTRL
  63179. CONFIG_GTK_OL
  63180. CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
  63181. CONFIG_HOTPLUG_CPU
  63182. CONFIG_HT_DISABLED
  63183. CONFIG_HW_ECC
  63184. CONFIG_ID_FRAME0
  63185. CONFIG_ID_FRAME1
  63186. CONFIG_ID_FRAME2
  63187. CONFIG_ID_FRAME3
  63188. CONFIG_ID_FRAME4
  63189. CONFIG_ID_FRAME5
  63190. CONFIG_ID_FRAME6
  63191. CONFIG_ID_SIZE
  63192. CONFIG_IEEE80211_DEBUG
  63193. CONFIG_ILLEGAL_POINTER_VALUE
  63194. CONFIG_INFO
  63195. CONFIG_INPUT_MOUSEDEV_SCREEN_X
  63196. CONFIG_INPUT_MOUSEDEV_SCREEN_Y
  63197. CONFIG_IO_REQ
  63198. CONFIG_IP_VS_DH_TAB_BITS
  63199. CONFIG_IP_VS_LBLCR_TAB_BITS
  63200. CONFIG_IP_VS_LBLC_TAB_BITS
  63201. CONFIG_IP_VS_MH_TAB_INDEX
  63202. CONFIG_IP_VS_SH_TAB_BITS
  63203. CONFIG_IP_VS_TAB_BITS
  63204. CONFIG_IRQ_REQ
  63205. CONFIG_IRQ_SIZE
  63206. CONFIG_IRQ_THRESH
  63207. CONFIG_JFFS2_FS_DEBUG
  63208. CONFIG_KASAN
  63209. CONFIG_LINK
  63210. CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE
  63211. CONFIG_LOCKED
  63212. CONFIG_MASK
  63213. CONFIG_MASK_8660
  63214. CONFIG_MEMSIZE
  63215. CONFIG_MEMSIZE_IND__CONFIG_MEMSIZE_MASK
  63216. CONFIG_MEMSIZE_IND__CONFIG_MEMSIZE__SHIFT
  63217. CONFIG_MEMSIZE__CONFIG_MEMSIZE_MASK
  63218. CONFIG_MEMSIZE__CONFIG_MEMSIZE__SHIFT
  63219. CONFIG_MEM_BLOCK_SIZE
  63220. CONFIG_MIPS_MT
  63221. CONFIG_MODULES
  63222. CONFIG_MONITORING
  63223. CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS
  63224. CONFIG_NANDSIM_ACCESS_DELAY
  63225. CONFIG_NANDSIM_BUS_WIDTH
  63226. CONFIG_NANDSIM_DBG
  63227. CONFIG_NANDSIM_DO_DELAYS
  63228. CONFIG_NANDSIM_ERASE_DELAY
  63229. CONFIG_NANDSIM_FIRST_ID_BYTE
  63230. CONFIG_NANDSIM_FOURTH_ID_BYTE
  63231. CONFIG_NANDSIM_INPUT_CYCLE
  63232. CONFIG_NANDSIM_LOG
  63233. CONFIG_NANDSIM_MAX_PARTS
  63234. CONFIG_NANDSIM_OUTPUT_CYCLE
  63235. CONFIG_NANDSIM_PROGRAMM_DELAY
  63236. CONFIG_NANDSIM_SECOND_ID_BYTE
  63237. CONFIG_NANDSIM_THIRD_ID_BYTE
  63238. CONFIG_NOC_CLK_SRC
  63239. CONFIG_NO_HZ_FULL_SYSIDLE
  63240. CONFIG_NO_WAIT
  63241. CONFIG_NR_CPUS
  63242. CONFIG_OFF_KEY
  63243. CONFIG_ON_KEY
  63244. CONFIG_OPTIMIZE_INLINING
  63245. CONFIG_PAGE_BIOS_1
  63246. CONFIG_PAGE_BIOS_2
  63247. CONFIG_PAGE_BIOS_4
  63248. CONFIG_PAGE_CNT_MASK
  63249. CONFIG_PAGE_CNT_SHIFT
  63250. CONFIG_PAGE_FC_DEVICE_0
  63251. CONFIG_PAGE_FC_PORT_0
  63252. CONFIG_PAGE_FC_PORT_1
  63253. CONFIG_PAGE_FC_PORT_10
  63254. CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA
  63255. CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA
  63256. CONFIG_PAGE_FC_PORT_2
  63257. CONFIG_PAGE_FC_PORT_3
  63258. CONFIG_PAGE_FC_PORT_4
  63259. CONFIG_PAGE_FC_PORT_5
  63260. CONFIG_PAGE_FC_PORT_5_ALIAS_INFO
  63261. CONFIG_PAGE_FC_PORT_6
  63262. CONFIG_PAGE_FC_PORT_7
  63263. CONFIG_PAGE_FC_PORT_8
  63264. CONFIG_PAGE_FC_PORT_9
  63265. CONFIG_PAGE_HEADER
  63266. CONFIG_PAGE_HEADER_UNION
  63267. CONFIG_PAGE_INBAND_0
  63268. CONFIG_PAGE_IOC_0
  63269. CONFIG_PAGE_IOC_1
  63270. CONFIG_PAGE_IOC_2
  63271. CONFIG_PAGE_IOC_2_RAID_VOL
  63272. CONFIG_PAGE_IOC_3
  63273. CONFIG_PAGE_IOC_4
  63274. CONFIG_PAGE_IOC_5
  63275. CONFIG_PAGE_IOC_6
  63276. CONFIG_PAGE_IO_UNIT_0
  63277. CONFIG_PAGE_IO_UNIT_1
  63278. CONFIG_PAGE_IO_UNIT_2
  63279. CONFIG_PAGE_IO_UNIT_3
  63280. CONFIG_PAGE_IO_UNIT_4
  63281. CONFIG_PAGE_LAN_0
  63282. CONFIG_PAGE_LAN_1
  63283. CONFIG_PAGE_LOG_0
  63284. CONFIG_PAGE_MANUFACTURING_0
  63285. CONFIG_PAGE_MANUFACTURING_1
  63286. CONFIG_PAGE_MANUFACTURING_10
  63287. CONFIG_PAGE_MANUFACTURING_2
  63288. CONFIG_PAGE_MANUFACTURING_3
  63289. CONFIG_PAGE_MANUFACTURING_4
  63290. CONFIG_PAGE_MANUFACTURING_5
  63291. CONFIG_PAGE_MANUFACTURING_6
  63292. CONFIG_PAGE_MANUFACTURING_7
  63293. CONFIG_PAGE_MANUFACTURING_8
  63294. CONFIG_PAGE_MANUFACTURING_9
  63295. CONFIG_PAGE_OFFSET
  63296. CONFIG_PAGE_RAID_PHYS_DISK_0
  63297. CONFIG_PAGE_RAID_PHYS_DISK_1
  63298. CONFIG_PAGE_RAID_VOL_0
  63299. CONFIG_PAGE_RAID_VOL_1
  63300. CONFIG_PAGE_SAS_DEVICE_0
  63301. CONFIG_PAGE_SAS_DEVICE_1
  63302. CONFIG_PAGE_SAS_DEVICE_2
  63303. CONFIG_PAGE_SAS_ENCLOSURE_0
  63304. CONFIG_PAGE_SAS_EXPANDER_0
  63305. CONFIG_PAGE_SAS_EXPANDER_1
  63306. CONFIG_PAGE_SAS_IO_UNIT_0
  63307. CONFIG_PAGE_SAS_IO_UNIT_1
  63308. CONFIG_PAGE_SAS_IO_UNIT_2
  63309. CONFIG_PAGE_SAS_IO_UNIT_3
  63310. CONFIG_PAGE_SAS_PHY_0
  63311. CONFIG_PAGE_SAS_PHY_1
  63312. CONFIG_PAGE_SCSI_DEVICE_0
  63313. CONFIG_PAGE_SCSI_DEVICE_1
  63314. CONFIG_PAGE_SCSI_DEVICE_2
  63315. CONFIG_PAGE_SCSI_DEVICE_3
  63316. CONFIG_PAGE_SCSI_PORT_0
  63317. CONFIG_PAGE_SCSI_PORT_1
  63318. CONFIG_PAGE_SCSI_PORT_2
  63319. CONFIG_PAGE_TABLE_ISOLATION
  63320. CONFIG_PARAVIRT
  63321. CONFIG_PARAVIRT_SPINLOCKS
  63322. CONFIG_PARAVIRT_XXL
  63323. CONFIG_PATH
  63324. CONFIG_PGTABLE_LEVELS
  63325. CONFIG_PIPE_EN
  63326. CONFIG_PM
  63327. CONFIG_PMU
  63328. CONFIG_PORT
  63329. CONFIG_PORT_SET
  63330. CONFIG_PORT_VAR
  63331. CONFIG_POWERSAVING
  63332. CONFIG_PPC_HAS_FEATURE_CALLS
  63333. CONFIG_PREEMPT_COUNT
  63334. CONFIG_PREEMPT_RCU
  63335. CONFIG_PROVE_RCU
  63336. CONFIG_PS_1024
  63337. CONFIG_PS_2048
  63338. CONFIG_PS_256
  63339. CONFIG_PS_4096
  63340. CONFIG_PS_512
  63341. CONFIG_QEDE_BITMAP_IDX
  63342. CONFIG_QEDF_BITMAP_IDX
  63343. CONFIG_QEDI_BITMAP_IDX
  63344. CONFIG_QEDR_BITMAP_IDX
  63345. CONFIG_QED_LL2_BITMAP_IDX
  63346. CONFIG_QED_SRIOV_BITMAP_IDX
  63347. CONFIG_QUEUED_RWLOCKS
  63348. CONFIG_QUEUED_SPINLOCKS
  63349. CONFIG_RADIO_AZTECH_PORT
  63350. CONFIG_RADIO_GEMTEK_PORT
  63351. CONFIG_RADIO_GEMTEK_PROBE
  63352. CONFIG_RADIO_RTRACK2_PORT
  63353. CONFIG_RADIO_RTRACK_PORT
  63354. CONFIG_RADIO_TRUST_PORT
  63355. CONFIG_RADIO_TYPHOON_MUTEFREQ
  63356. CONFIG_RADIO_TYPHOON_PORT
  63357. CONFIG_RADIO_ZOLTRIX_PORT
  63358. CONFIG_RAID6_PQ_BENCHMARK
  63359. CONFIG_RAM_BASE
  63360. CONFIG_RAM_SIZE
  63361. CONFIG_RBPL_BUFSIZE
  63362. CONFIG_RBPL_SIZE
  63363. CONFIG_RBPL_THRESH
  63364. CONFIG_RBRQ_SIZE
  63365. CONFIG_RBRQ_THRESH
  63366. CONFIG_RCMABR
  63367. CONFIG_RCMLBM
  63368. CONFIG_RCU_NOCB_CPU
  63369. CONFIG_RCU_NOCB_CPU_ALL
  63370. CONFIG_RCU_STALL_COMMON
  63371. CONFIG_RCU_TRACE
  63372. CONFIG_RCU_USER_QS
  63373. CONFIG_READ
  63374. CONFIG_REG
  63375. CONFIG_REG_APER_SIZE_IND__REG_APER_SIZE_MASK
  63376. CONFIG_REG_APER_SIZE_IND__REG_APER_SIZE__SHIFT
  63377. CONFIG_REG_APER_SIZE__REG_APER_SIZE_MASK
  63378. CONFIG_REG_APER_SIZE__REG_APER_SIZE__SHIFT
  63379. CONFIG_REG_DISABLE
  63380. CONFIG_REG_ENABLE
  63381. CONFIG_RESERVED__CONFIG_RESERVED_MASK
  63382. CONFIG_RESERVED__CONFIG_RESERVED__SHIFT
  63383. CONFIG_RESULT_CODE_MASK
  63384. CONFIG_RF_RADIO
  63385. CONFIG_RF_TXPWR_LMT
  63386. CONFIG_RING_VAR
  63387. CONFIG_ROM_SIZE
  63388. CONFIG_RSRA
  63389. CONFIG_RSRB
  63390. CONFIG_RTL8192_IO_MAP
  63391. CONFIG_RTW_HIQ_FILTER
  63392. CONFIG_SBMAC_COALESCE
  63393. CONFIG_SCSI_ACORNSCSI_TAGGED_QUEUE
  63394. CONFIG_SCSI_LPFC_DEBUG_FS
  63395. CONFIG_SCSI_NCR53C8XX_SYNC
  63396. CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS
  63397. CONFIG_SCSI_SYM53C8XX_MAX_TAGS
  63398. CONFIG_SEND_ENABLE
  63399. CONFIG_SHIFT_8660
  63400. CONFIG_SKIP_SPARE
  63401. CONFIG_SKIP_SPARE_SIZE_12
  63402. CONFIG_SKIP_SPARE_SIZE_16
  63403. CONFIG_SKIP_SPARE_SIZE_4
  63404. CONFIG_SKIP_SPARE_SIZE_8
  63405. CONFIG_SMP
  63406. CONFIG_SND_MAJOR
  63407. CONFIG_SPACE1_END
  63408. CONFIG_SPACE1_START
  63409. CONFIG_SPACE2_END
  63410. CONFIG_SPACE2_START
  63411. CONFIG_SPACE_END
  63412. CONFIG_SPACE_START
  63413. CONFIG_SPARC64
  63414. CONFIG_SPARSEMEM_VMEMMAP
  63415. CONFIG_SUN3X_ONLY
  63416. CONFIG_SYS_DVBT
  63417. CONFIG_SYS_ISDBT
  63418. CONFIG_T1PCI_DEBUG
  63419. CONFIG_T1PCI_POLLDEBUG
  63420. CONFIG_TAG_BYTE_SIZE
  63421. CONFIG_TASKS_RCU
  63422. CONFIG_TBRQ_SIZE
  63423. CONFIG_TBRQ_THRESH
  63424. CONFIG_TDP
  63425. CONFIG_TDP_GET_CORE_MASK
  63426. CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_NUMCORES
  63427. CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_RATIOS
  63428. CONFIG_TDP_GET_FACT_LP_CLIPPING_RATIO
  63429. CONFIG_TDP_GET_LEVELS_INFO
  63430. CONFIG_TDP_GET_MEM_FREQ
  63431. CONFIG_TDP_GET_P1_INFO
  63432. CONFIG_TDP_GET_PWR_INFO
  63433. CONFIG_TDP_GET_TDP_CONTROL
  63434. CONFIG_TDP_GET_TDP_INFO
  63435. CONFIG_TDP_GET_TJMAX_INFO
  63436. CONFIG_TDP_GET_TURBO_LIMIT_RATIOS
  63437. CONFIG_TDP_GET_UNCORE_P0_P1_INFO
  63438. CONFIG_TDP_PBF_GET_CORE_MASK_INFO
  63439. CONFIG_TDP_PBF_GET_P1HI_P1LO_INFO
  63440. CONFIG_TDP_PBF_GET_TDP_INFO
  63441. CONFIG_TDP_PBF_GET_TJ_MAX_INFO
  63442. CONFIG_TDP_SET_LEVEL
  63443. CONFIG_TDP_SET_TDP_CONTROL
  63444. CONFIG_TIME_CODE_CANCEL
  63445. CONFIG_TINY_RCU
  63446. CONFIG_TMABR
  63447. CONFIG_TO_MA
  63448. CONFIG_TO_PULL
  63449. CONFIG_TO_VOL
  63450. CONFIG_TPDBA
  63451. CONFIG_TPDRQ_SIZE
  63452. CONFIG_TREE_RCU
  63453. CONFIG_TSRA
  63454. CONFIG_TSRB
  63455. CONFIG_TSRC
  63456. CONFIG_TSRD
  63457. CONFIG_TVAL_4
  63458. CONFIG_TVAL_6
  63459. CONFIG_TVAL_8
  63460. CONFIG_U3E
  63461. CONFIG_UPDATE_BSSID
  63462. CONFIG_UPDATE_MAC
  63463. CONFIG_UPDATE_TYPE
  63464. CONFIG_USB_VENDOR_REQ_MUTEX
  63465. CONFIG_VB2_GSC_DMA_CONTIG
  63466. CONFIG_WIZNET_BUS_SHIFT
  63467. CONFIG_X86_32
  63468. CONFIG_X86_64
  63469. CONFIG_XARRAY_MULTI
  63470. CONFIG_XCHOFFLD_MEM
  63471. CONFIG_XLOGINS_MEM
  63472. CONFIG_ZONE
  63473. CONFIG_prefix
  63474. CONFIGclear
  63475. CONFIGcmd
  63476. CONFIRMED
  63477. CONFIRM_REQUIRED_TO_HOST
  63478. CONFLICT
  63479. CONFLICT_RESOLVED
  63480. CONFREQ
  63481. CONF_ACK_POLICY_BLOCK
  63482. CONF_ACK_POLICY_LEGACY
  63483. CONF_ACK_POLICY_NO_ACK
  63484. CONF_AUTO_AUDIO
  63485. CONF_AUTO_CHECK_VCC
  63486. CONF_AUTO_SET_IO
  63487. CONF_AUTO_SET_IOMEM
  63488. CONF_AUTO_SET_VPP
  63489. CONF_BASE_TIMEOUT
  63490. CONF_BCN_FILT_MODE_DISABLED
  63491. CONF_BCN_FILT_MODE_ENABLED
  63492. CONF_BCN_IE_OUI_LEN
  63493. CONF_BCN_IE_VER_LEN
  63494. CONF_BCN_RULE_PASS_ON_APPEARANCE
  63495. CONF_BCN_RULE_PASS_ON_CHANGE
  63496. CONF_BE
  63497. CONF_BET_MODE_DISABLE
  63498. CONF_BET_MODE_ENABLE
  63499. CONF_CHANNEL_TYPE_DCF
  63500. CONF_CHANNEL_TYPE_EDCF
  63501. CONF_CHANNEL_TYPE_HCCA
  63502. CONF_CM
  63503. CONF_CM_CACHABLE_ACCELERATED
  63504. CONF_CM_CACHABLE_CE
  63505. CONF_CM_CACHABLE_COW
  63506. CONF_CM_CACHABLE_CUW
  63507. CONF_CM_CACHABLE_NONCOHERENT
  63508. CONF_CM_CACHABLE_NO_WA
  63509. CONF_CM_CACHABLE_WA
  63510. CONF_CM_CMASK
  63511. CONF_CM_UNCACHED
  63512. CONF_CONNECT_PEND
  63513. CONF_CU
  63514. CONF_DB
  63515. CONF_DC
  63516. CONF_DEBUG_VDMA
  63517. CONF_DUAL_BAND
  63518. CONF_DVICE
  63519. CONF_EB
  63520. CONF_EC
  63521. CONF_EM
  63522. CONF_ENABLE_ESR
  63523. CONF_ENABLE_IOCARD
  63524. CONF_ENABLE_IRQ
  63525. CONF_ENABLE_PULSE_IRQ
  63526. CONF_ENABLE_SPKR
  63527. CONF_ENABLE_ZVCARD
  63528. CONF_END_TEST
  63529. CONF_EP
  63530. CONF_EW
  63531. CONF_EWS_RECV
  63532. CONF_FAST_WAKEUP_DISABLE
  63533. CONF_FAST_WAKEUP_ENABLE
  63534. CONF_FWLOG_MAX_MEM_BLOCKS
  63535. CONF_FWLOG_MIN_MEM_BLOCKS
  63536. CONF_GE
  63537. CONF_GT
  63538. CONF_HAS
  63539. CONF_HW_BIT_RATE_11MBPS
  63540. CONF_HW_BIT_RATE_12MBPS
  63541. CONF_HW_BIT_RATE_18MBPS
  63542. CONF_HW_BIT_RATE_1MBPS
  63543. CONF_HW_BIT_RATE_22MBPS
  63544. CONF_HW_BIT_RATE_24MBPS
  63545. CONF_HW_BIT_RATE_2MBPS
  63546. CONF_HW_BIT_RATE_36MBPS
  63547. CONF_HW_BIT_RATE_48MBPS
  63548. CONF_HW_BIT_RATE_54MBPS
  63549. CONF_HW_BIT_RATE_5_5MBPS
  63550. CONF_HW_BIT_RATE_6MBPS
  63551. CONF_HW_BIT_RATE_9MBPS
  63552. CONF_HW_BIT_RATE_MCS_0
  63553. CONF_HW_BIT_RATE_MCS_1
  63554. CONF_HW_BIT_RATE_MCS_10
  63555. CONF_HW_BIT_RATE_MCS_11
  63556. CONF_HW_BIT_RATE_MCS_12
  63557. CONF_HW_BIT_RATE_MCS_13
  63558. CONF_HW_BIT_RATE_MCS_14
  63559. CONF_HW_BIT_RATE_MCS_15
  63560. CONF_HW_BIT_RATE_MCS_2
  63561. CONF_HW_BIT_RATE_MCS_3
  63562. CONF_HW_BIT_RATE_MCS_4
  63563. CONF_HW_BIT_RATE_MCS_5
  63564. CONF_HW_BIT_RATE_MCS_6
  63565. CONF_HW_BIT_RATE_MCS_7
  63566. CONF_HW_BIT_RATE_MCS_8
  63567. CONF_HW_BIT_RATE_MCS_9
  63568. CONF_HW_RATE_INDEX_11MBPS
  63569. CONF_HW_RATE_INDEX_12MBPS
  63570. CONF_HW_RATE_INDEX_18MBPS
  63571. CONF_HW_RATE_INDEX_1MBPS
  63572. CONF_HW_RATE_INDEX_24MBPS
  63573. CONF_HW_RATE_INDEX_2MBPS
  63574. CONF_HW_RATE_INDEX_36MBPS
  63575. CONF_HW_RATE_INDEX_48MBPS
  63576. CONF_HW_RATE_INDEX_54MBPS
  63577. CONF_HW_RATE_INDEX_5_5MBPS
  63578. CONF_HW_RATE_INDEX_6MBPS
  63579. CONF_HW_RATE_INDEX_9MBPS
  63580. CONF_HW_RATE_INDEX_MAX
  63581. CONF_HW_RATE_INDEX_MCS0
  63582. CONF_HW_RATE_INDEX_MCS0_40MHZ
  63583. CONF_HW_RATE_INDEX_MCS1
  63584. CONF_HW_RATE_INDEX_MCS10
  63585. CONF_HW_RATE_INDEX_MCS11
  63586. CONF_HW_RATE_INDEX_MCS12
  63587. CONF_HW_RATE_INDEX_MCS13
  63588. CONF_HW_RATE_INDEX_MCS14
  63589. CONF_HW_RATE_INDEX_MCS15
  63590. CONF_HW_RATE_INDEX_MCS15_SGI
  63591. CONF_HW_RATE_INDEX_MCS1_40MHZ
  63592. CONF_HW_RATE_INDEX_MCS2
  63593. CONF_HW_RATE_INDEX_MCS2_40MHZ
  63594. CONF_HW_RATE_INDEX_MCS3
  63595. CONF_HW_RATE_INDEX_MCS3_40MHZ
  63596. CONF_HW_RATE_INDEX_MCS4
  63597. CONF_HW_RATE_INDEX_MCS4_40MHZ
  63598. CONF_HW_RATE_INDEX_MCS5
  63599. CONF_HW_RATE_INDEX_MCS5_40MHZ
  63600. CONF_HW_RATE_INDEX_MCS6
  63601. CONF_HW_RATE_INDEX_MCS6_40MHZ
  63602. CONF_HW_RATE_INDEX_MCS7
  63603. CONF_HW_RATE_INDEX_MCS7_40MHZ
  63604. CONF_HW_RATE_INDEX_MCS7_40MHZ_SGI
  63605. CONF_HW_RATE_INDEX_MCS7_SGI
  63606. CONF_HW_RATE_INDEX_MCS8
  63607. CONF_HW_RATE_INDEX_MCS9
  63608. CONF_HW_RXTX_RATE_UNSUPPORTED
  63609. CONF_IB
  63610. CONF_IC
  63611. CONF_INPUT_DONE
  63612. CONF_IN_VOLT
  63613. CONF_IS
  63614. CONF_LE
  63615. CONF_LINE_LEN
  63616. CONF_LOC_CONF_PEND
  63617. CONF_LT
  63618. CONF_MAX_BCN_FILT_IE_COUNT
  63619. CONF_MAX_RSSI_SNR_TRIGGERS
  63620. CONF_MODE_DONE
  63621. CONF_MOD_MCBSP3_AUXON
  63622. CONF_MOD_MMC_SD_CLK_REQ_R
  63623. CONF_MOD_SOSSI_CLK_EN_R
  63624. CONF_MOD_UART1_CLK_MODE_R
  63625. CONF_MOD_UART2_CLK_MODE_R
  63626. CONF_MOD_UART3_CLK_MODE_R
  63627. CONF_MSK
  63628. CONF_MTU_DONE
  63629. CONF_NAMESERVERS_MAX
  63630. CONF_NOT_COMPLETE
  63631. CONF_NTP_SERVERS_MAX
  63632. CONF_NUMBER_OF_CHANNELS_2_4
  63633. CONF_NUMBER_OF_CHANNELS_5
  63634. CONF_NUMBER_OF_RATE_GROUPS
  63635. CONF_NUMBER_OF_SUB_BANDS_5
  63636. CONF_OPEN_RETRIES
  63637. CONF_OUTPUT_DONE
  63638. CONF_PAE
  63639. CONF_PBE
  63640. CONF_PCE
  63641. CONF_POST_OPEN
  63642. CONF_PS_SCHEME_LEGACY
  63643. CONF_PS_SCHEME_LEGACY_PSPOLL
  63644. CONF_PS_SCHEME_SAPSD
  63645. CONF_PS_SCHEME_UPSD_TRIGGER
  63646. CONF_RANGE
  63647. CONF_RECV_NO_FCS
  63648. CONF_REF_CLK_19_2_E
  63649. CONF_REF_CLK_26_E
  63650. CONF_REF_CLK_26_M_XTAL
  63651. CONF_REF_CLK_38_4_E
  63652. CONF_REF_CLK_38_4_M_XTAL
  63653. CONF_REF_CLK_52_E
  63654. CONF_REM_CONF_PEND
  63655. CONF_REQ_SENT
  63656. CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE
  63657. CONF_RX_QUEUE_TYPE_HIGH_PRIORITY
  63658. CONF_RX_QUEUE_TYPE_LOW_PRIORITY
  63659. CONF_SC
  63660. CONF_SEND_RETRIES
  63661. CONF_SENSE_1x
  63662. CONF_SENSE_4x
  63663. CONF_SENSE_8x
  63664. CONF_SG_DISABLE
  63665. CONF_SG_OPPORTUNISTIC
  63666. CONF_SG_PROTECTIVE
  63667. CONF_SINGLE_BAND
  63668. CONF_SM
  63669. CONF_SOSSI_RESET_R
  63670. CONF_STATE2_DEVICE
  63671. CONF_STATE_CONF
  63672. CONF_STATE_DETECT
  63673. CONF_STATE_POF
  63674. CONF_STATUS0
  63675. CONF_STATUS0_CMDR_DEPTH
  63676. CONF_STATUS0_CSR_DAP_CHK
  63677. CONF_STATUS0_DEVS_NUM
  63678. CONF_STATUS0_ECC_CHK
  63679. CONF_STATUS0_GPI_NUM
  63680. CONF_STATUS0_GPO_NUM
  63681. CONF_STATUS0_IBIR_DEPTH
  63682. CONF_STATUS0_INTEG_CHK
  63683. CONF_STATUS0_PROT_FAULTS_CHK
  63684. CONF_STATUS0_SEC_MASTER
  63685. CONF_STATUS0_SUPPORTS_DDR
  63686. CONF_STATUS0_TRANS_TOUT_CHK
  63687. CONF_STATUS1
  63688. CONF_STATUS1_CMD_DEPTH
  63689. CONF_STATUS1_IBI_DEPTH
  63690. CONF_STATUS1_IBI_HW_RES
  63691. CONF_STATUS1_RX_DEPTH
  63692. CONF_STATUS1_SLVDDR_RX_DEPTH
  63693. CONF_STATUS1_SLVDDR_TX_DEPTH
  63694. CONF_STATUS1_TX_DEPTH
  63695. CONF_TEMP
  63696. CONF_TIMEOUT_MAX
  63697. CONF_TIMEOUT_MULT
  63698. CONF_TIMEOUT_RANDOM
  63699. CONF_TRIG_EVENT_DIR_BIDIR
  63700. CONF_TRIG_EVENT_DIR_HIGH
  63701. CONF_TRIG_EVENT_DIR_LOW
  63702. CONF_TRIG_EVENT_TYPE_EDGE
  63703. CONF_TRIG_EVENT_TYPE_LEVEL
  63704. CONF_TRIG_METRIC_RSSI_BEACON
  63705. CONF_TRIG_METRIC_RSSI_DATA
  63706. CONF_TRIG_METRIC_SNR_BEACON
  63707. CONF_TRIG_METRIC_SNR_DATA
  63708. CONF_TX_AC_ANY_TID
  63709. CONF_TX_AC_BE
  63710. CONF_TX_AC_BK
  63711. CONF_TX_AC_CTS2SELF
  63712. CONF_TX_AC_VI
  63713. CONF_TX_AC_VO
  63714. CONF_TX_AIFS_DIFS
  63715. CONF_TX_AIFS_PIFS
  63716. CONF_TX_AP_DEFAULT_MGMT_RATES
  63717. CONF_TX_BA_ENABLED_TID_BITMAP
  63718. CONF_TX_CCK_RATES
  63719. CONF_TX_ENABLED_RATES
  63720. CONF_TX_IBSS_DEFAULT_RATES
  63721. CONF_TX_MAX_AC_COUNT
  63722. CONF_TX_MAX_RATE_CLASSES
  63723. CONF_TX_MAX_TID_COUNT
  63724. CONF_TX_MCS_RATES
  63725. CONF_TX_MIMO_RATES
  63726. CONF_TX_OFDM_RATES
  63727. CONF_TX_PWR_COMPENSATION_LEN_2
  63728. CONF_TX_PWR_COMPENSATION_LEN_5
  63729. CONF_TX_RATE_MASK_BASIC
  63730. CONF_TX_RATE_MASK_BASIC_P2P
  63731. CONF_TX_RATE_MASK_UNSPECIFIED
  63732. CONF_TX_RATE_RETRY_LIMIT
  63733. CONF_TX_RATE_USE_WIDE_CHAN
  63734. CONF_USB0_ISOLATE_R
  63735. CONF_USB1_UNI_R
  63736. CONF_USB2_UNI_R
  63737. CONF_USB_PORT0_R
  63738. CONF_USB_PWRDN_DM_R
  63739. CONF_USB_PWRDN_DP_R
  63740. CONF_WAKE_UP_EVENT_BEACON
  63741. CONF_WAKE_UP_EVENT_BITS_MASK
  63742. CONF_WAKE_UP_EVENT_DTIM
  63743. CONF_WAKE_UP_EVENT_N_BEACONS
  63744. CONF_WAKE_UP_EVENT_N_DTIM
  63745. CONF_WEP104
  63746. CONF_WEP40
  63747. CONGESTED_MAX
  63748. CONGESTED_REPS
  63749. CONGESTED_RESPONSE_US
  63750. CONGESTIONENABLE_F
  63751. CONGESTIONENABLE_S
  63752. CONGESTIONENABLE_V
  63753. CONGESTION_EXPERIENCED
  63754. CONGESTION_OFF_THRESH
  63755. CONGESTION_ON_THRESH
  63756. CONG_ALG_HIGHSPEED
  63757. CONG_ALG_NEWRENO
  63758. CONG_ALG_RENO
  63759. CONG_ALG_TAHOE
  63760. CONG_CNTRL_G
  63761. CONG_CNTRL_M
  63762. CONG_CNTRL_S
  63763. CONG_CNTRL_V
  63764. CONMCTXT_CNGCHMAP_S
  63765. CONMCTXT_CNGCHMAP_V
  63766. CONMCTXT_CNGTPMODE_CHANNEL_X
  63767. CONMCTXT_CNGTPMODE_QUEUE_X
  63768. CONMCTXT_CNGTPMODE_S
  63769. CONMCTXT_CNGTPMODE_V
  63770. CONN
  63771. CONNCOUNT_GC_MAX_NODES
  63772. CONNCOUNT_SLOTS
  63773. CONNECT4_PROG_PATH
  63774. CONNECT6_PROG_PATH
  63775. CONNECTB
  63776. CONNECTED
  63777. CONNECTING
  63778. CONNECTION
  63779. CONNECTION_EVICTED
  63780. CONNECTION_IBSS_ADHOC
  63781. CONNECTION_INFRA_AP
  63782. CONNECTION_INFRA_BC
  63783. CONNECTION_INFRA_STA
  63784. CONNECTION_LOST_NEGOTIATING
  63785. CONNECTION_LOST_WHILE_PENDING
  63786. CONNECTION_P2P_GC
  63787. CONNECTION_P2P_GO
  63788. CONNECTION_STATUS_PARAM_STATUS
  63789. CONNECTION_TYPE_ADHOC
  63790. CONNECTION_TYPE_AP
  63791. CONNECTION_TYPE_INFRA
  63792. CONNECTION_WDS
  63793. CONNECTOR_7PIN_DIN_ENUM_ID1
  63794. CONNECTOR_7PIN_DIN_ENUM_ID2
  63795. CONNECTOR_9PIN_DIN_ENUM_ID1
  63796. CONNECTOR_9PIN_DIN_ENUM_ID2
  63797. CONNECTOR_COMPOSITE_ENUM_ID1
  63798. CONNECTOR_COMPOSITE_ENUM_ID2
  63799. CONNECTOR_CROSSFIRE_ENUM_ID1
  63800. CONNECTOR_CROSSFIRE_ENUM_ID2
  63801. CONNECTOR_CRT_LEGACY
  63802. CONNECTOR_CTV_LEGACY
  63803. CONNECTOR_DISPLAYPORT_ENUM_ID1
  63804. CONNECTOR_DISPLAYPORT_ENUM_ID2
  63805. CONNECTOR_DISPLAYPORT_ENUM_ID3
  63806. CONNECTOR_DISPLAYPORT_ENUM_ID4
  63807. CONNECTOR_DISPLAYPORT_ENUM_ID5
  63808. CONNECTOR_DISPLAYPORT_ENUM_ID6
  63809. CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1
  63810. CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2
  63811. CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3
  63812. CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID4
  63813. CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1
  63814. CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2
  63815. CONNECTOR_DVI_D_LEGACY
  63816. CONNECTOR_DVI_I_LEGACY
  63817. CONNECTOR_D_CONNECTOR_ENUM_ID1
  63818. CONNECTOR_D_CONNECTOR_ENUM_ID2
  63819. CONNECTOR_HARDCODE_DVI_ENUM_ID1
  63820. CONNECTOR_HARDCODE_DVI_ENUM_ID2
  63821. CONNECTOR_HDMI_TYPE_A_ENUM_ID1
  63822. CONNECTOR_HDMI_TYPE_A_ENUM_ID2
  63823. CONNECTOR_HDMI_TYPE_A_ENUM_ID3
  63824. CONNECTOR_HDMI_TYPE_A_ENUM_ID4
  63825. CONNECTOR_HDMI_TYPE_A_ENUM_ID5
  63826. CONNECTOR_HDMI_TYPE_A_ENUM_ID6
  63827. CONNECTOR_HDMI_TYPE_B_ENUM_ID1
  63828. CONNECTOR_HDMI_TYPE_B_ENUM_ID2
  63829. CONNECTOR_ID_DISPLAY_PORT
  63830. CONNECTOR_ID_DUAL_LINK_DVID
  63831. CONNECTOR_ID_DUAL_LINK_DVII
  63832. CONNECTOR_ID_EDP
  63833. CONNECTOR_ID_HARDCODE_DVI
  63834. CONNECTOR_ID_HDMI_TYPE_A
  63835. CONNECTOR_ID_LVDS
  63836. CONNECTOR_ID_MIRACAST
  63837. CONNECTOR_ID_MXM
  63838. CONNECTOR_ID_PCIE
  63839. CONNECTOR_ID_SINGLE_LINK_DVID
  63840. CONNECTOR_ID_SINGLE_LINK_DVII
  63841. CONNECTOR_ID_UNKNOWN
  63842. CONNECTOR_ID_VGA
  63843. CONNECTOR_ID_VIRTUAL
  63844. CONNECTOR_ID_WIRELESS
  63845. CONNECTOR_LAYOUT_TYPE_DP
  63846. CONNECTOR_LAYOUT_TYPE_DVI_D
  63847. CONNECTOR_LAYOUT_TYPE_DVI_I
  63848. CONNECTOR_LAYOUT_TYPE_HDMI
  63849. CONNECTOR_LAYOUT_TYPE_MINI_DP
  63850. CONNECTOR_LAYOUT_TYPE_UNKNOWN
  63851. CONNECTOR_LAYOUT_TYPE_VGA
  63852. CONNECTOR_LVDS_ENUM_ID1
  63853. CONNECTOR_LVDS_ENUM_ID2
  63854. CONNECTOR_LVDS_eDP_ENUM_ID1
  63855. CONNECTOR_LVDS_eDP_ENUM_ID2
  63856. CONNECTOR_MAX_MSG_SIZE
  63857. CONNECTOR_MXM_ENUM_ID1
  63858. CONNECTOR_MXM_ENUM_ID2
  63859. CONNECTOR_MXM_ENUM_ID3
  63860. CONNECTOR_MXM_ENUM_ID4
  63861. CONNECTOR_MXM_ENUM_ID5
  63862. CONNECTOR_MXM_ENUM_ID6
  63863. CONNECTOR_MXM_ENUM_ID7
  63864. CONNECTOR_NONE_LEGACY
  63865. CONNECTOR_OBJECT_ID_7PIN_DIN
  63866. CONNECTOR_OBJECT_ID_9PIN_DIN
  63867. CONNECTOR_OBJECT_ID_COMPOSITE
  63868. CONNECTOR_OBJECT_ID_CROSSFIRE
  63869. CONNECTOR_OBJECT_ID_DISPLAYPORT
  63870. CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D
  63871. CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I
  63872. CONNECTOR_OBJECT_ID_D_CONNECTOR
  63873. CONNECTOR_OBJECT_ID_HARDCODE_DVI
  63874. CONNECTOR_OBJECT_ID_HDMI_TYPE_A
  63875. CONNECTOR_OBJECT_ID_HDMI_TYPE_B
  63876. CONNECTOR_OBJECT_ID_LVDS
  63877. CONNECTOR_OBJECT_ID_LVDS_eDP
  63878. CONNECTOR_OBJECT_ID_MXM
  63879. CONNECTOR_OBJECT_ID_NONE
  63880. CONNECTOR_OBJECT_ID_OPM
  63881. CONNECTOR_OBJECT_ID_PCIE_CONNECTOR
  63882. CONNECTOR_OBJECT_ID_SCART
  63883. CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D
  63884. CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I
  63885. CONNECTOR_OBJECT_ID_SVIDEO
  63886. CONNECTOR_OBJECT_ID_VGA
  63887. CONNECTOR_OBJECT_ID_YPbPr
  63888. CONNECTOR_OBJECT_ID_eDP
  63889. CONNECTOR_OPM_ENUM_ID1
  63890. CONNECTOR_OPM_ENUM_ID2
  63891. CONNECTOR_OPM_ENUM_ID3
  63892. CONNECTOR_OPM_ENUM_ID4
  63893. CONNECTOR_OPM_ENUM_ID5
  63894. CONNECTOR_OPM_ENUM_ID6
  63895. CONNECTOR_PCIE_CONNECTOR_ENUM_ID1
  63896. CONNECTOR_PCIE_CONNECTOR_ENUM_ID2
  63897. CONNECTOR_PROPRIETARY_LEGACY
  63898. CONNECTOR_SCART_ENUM_ID1
  63899. CONNECTOR_SCART_ENUM_ID2
  63900. CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1
  63901. CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2
  63902. CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID3
  63903. CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID4
  63904. CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID5
  63905. CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID6
  63906. CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1
  63907. CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2
  63908. CONNECTOR_SIZE_DP
  63909. CONNECTOR_SIZE_DVI
  63910. CONNECTOR_SIZE_HDMI
  63911. CONNECTOR_SIZE_MINI_DP
  63912. CONNECTOR_SIZE_UNKNOWN
  63913. CONNECTOR_SIZE_VGA
  63914. CONNECTOR_STV_LEGACY
  63915. CONNECTOR_SVIDEO_ENUM_ID1
  63916. CONNECTOR_SVIDEO_ENUM_ID2
  63917. CONNECTOR_TYPE_DISPLAY_PORT
  63918. CONNECTOR_TYPE_DVI_D
  63919. CONNECTOR_TYPE_DVI_I
  63920. CONNECTOR_TYPE_HDMI
  63921. CONNECTOR_TYPE_MINI_DISPLAY_PORT
  63922. CONNECTOR_TYPE_VGA
  63923. CONNECTOR_UNSUPPORTED_LEGACY
  63924. CONNECTOR_VGA_ENUM_ID1
  63925. CONNECTOR_VGA_ENUM_ID2
  63926. CONNECTOR_YPbPr_ENUM_ID1
  63927. CONNECTOR_YPbPr_ENUM_ID2
  63928. CONNECTOR_eDP_ENUM_ID1
  63929. CONNECTOR_eDP_ENUM_ID2
  63930. CONNECTX_4_CURR_MAX_MINOR
  63931. CONNECTX_4_INTX_SUPPORT_MINOR
  63932. CONNECT_ASSOC_POLICY_USER
  63933. CONNECT_CSA_FOLLOW_BSS
  63934. CONNECT_DEVICE
  63935. CONNECT_DO_NOT_DEAUTH
  63936. CONNECT_DO_WPA_OFFLOAD
  63937. CONNECT_EPP_MAYBE
  63938. CONNECT_ERR_ASSOC_ERR_AUTH_REFUSED
  63939. CONNECT_ERR_ASSOC_ERR_TIMEOUT
  63940. CONNECT_ERR_AUTH_ERR_STA_FAILURE
  63941. CONNECT_ERR_AUTH_MSG_UNHANDLED
  63942. CONNECT_ERR_STA_FAILURE
  63943. CONNECT_HIT
  63944. CONNECT_IGNORE_AAC_BEACON
  63945. CONNECT_IGNORE_WPAx_GROUP_CIPHER
  63946. CONNECT_MISS
  63947. CONNECT_NORMAL
  63948. CONNECT_PEND
  63949. CONNECT_PROFILE_MATCH_DONE
  63950. CONNECT_REQ_EXTERNAL_AUTH_SUPPORT
  63951. CONNECT_RETRY_DELAY
  63952. CONNECT_SCAN_CTRL_FLAGS
  63953. CONNECT_SEND_REASSOC
  63954. CONNECT_STATUS
  63955. CONNECT_STATUS_MASK
  63956. CONNECT_TECH_FAKE_WHITE_HEAT_ID
  63957. CONNECT_TECH_VENDOR_ID
  63958. CONNECT_TECH_WHITE_HEAT_ID
  63959. CONNECT_TIMEOUT
  63960. CONNECT_WPS_FLAG
  63961. CONNIO_ENA
  63962. CONNREQ_UPCALL
  63963. CONNSECMARK_RESTORE
  63964. CONNSECMARK_SAVE
  63965. CONNTRACK_LOCKS
  63966. CONN_ACK
  63967. CONN_CTRL
  63968. CONN_CXT_SIZE
  63969. CONN_DATA_DETECT
  63970. CONN_DATA_LINK_LOSS
  63971. CONN_DBG
  63972. CONN_DISCONN_EVENT_CONN_RESP
  63973. CONN_DISCONN_EVENT_DISCONN_NOTIF
  63974. CONN_DISCONN_EVENT_FORCE_32BIT
  63975. CONN_DRY_RUN
  63976. CONN_DTCP_LPCG
  63977. CONN_EDMA_LPCG
  63978. CONN_ENET_0_LPCG
  63979. CONN_ENET_1_LPCG
  63980. CONN_ERR
  63981. CONN_EVENT_CONN_ACK
  63982. CONN_EVENT_CONN_REJ
  63983. CONN_EVENT_CONN_REQ
  63984. CONN_EVENT_CONN_RES
  63985. CONN_EVENT_CONN_SUS
  63986. CONN_EVENT_RX
  63987. CONN_EVENT_START
  63988. CONN_EVENT_STOP
  63989. CONN_EVENT_TIMER
  63990. CONN_EVENT_TXDONE
  63991. CONN_HASH_SIZE
  63992. CONN_INTR
  63993. CONN_LOCAL_BUSY
  63994. CONN_MANAGER
  63995. CONN_MASK
  63996. CONN_MLB_LPCG
  63997. CONN_MSG
  63998. CONN_MSG_LT
  63999. CONN_MSG_MODE
  64000. CONN_NAND_LPCG
  64001. CONN_POLICY_S
  64002. CONN_POLICY_V
  64003. CONN_PROBE
  64004. CONN_PROBE_REPLY
  64005. CONN_PROBING_INTV
  64006. CONN_REJ_ACT
  64007. CONN_REMOTE_BUSY
  64008. CONN_RNR_SENT
  64009. CONN_RPL_UPCALL
  64010. CONN_SEND_FBIT
  64011. CONN_SEND_PBIT
  64012. CONN_SREJ_ACT
  64013. CONN_SREJ_SENT
  64014. CONN_STATE_CONNECT
  64015. CONN_STATE_CONNERR
  64016. CONN_STATE_DISCONNECT
  64017. CONN_STATE_IDLE
  64018. CONN_STATE_INVALID
  64019. CONN_STATE_PORT_SECURE
  64020. CONN_STATE_REGERR
  64021. CONN_STATE_SETUPWAIT
  64022. CONN_STATE_STARTWAIT
  64023. CONN_STATE_STOPPED
  64024. CONN_STATE_TX
  64025. CONN_TIMEOUT_DEFAULT
  64026. CONN_TRACE
  64027. CONN_TX1_SERIAL_TX1_ADC_1
  64028. CONN_TX1_SERIAL_TX1_MUX
  64029. CONN_TX1_SERIAL_TX1_RX_PDM_LB
  64030. CONN_TX1_SERIAL_TX1_ZERO
  64031. CONN_TX2_SERIAL_TX2_ADC_2
  64032. CONN_TX2_SERIAL_TX2_MUX
  64033. CONN_TX2_SERIAL_TX2_RX_PDM_LB
  64034. CONN_TX2_SERIAL_TX2_ZERO
  64035. CONN_USB_2_LPCG
  64036. CONN_USB_3_LPCG
  64037. CONN_USDHC_0_LPCG
  64038. CONN_USDHC_1_LPCG
  64039. CONN_USDHC_2_LPCG
  64040. CONN_WAIT_F
  64041. CONN_WD_ST_CHG_FAIL
  64042. CONN_WD_ST_CHG_OKAY
  64043. CONN_WD_ST_CHG_REQ
  64044. CONS
  64045. CONSECUTIVE_PS_POLL_FAILURE_DEF
  64046. CONSIDER_RESYNC
  64047. CONSISTENT_BASE
  64048. CONSISTENT_END
  64049. CONSISTENT_OFFSET
  64050. CONSOLEIO_read
  64051. CONSOLEIO_write
  64052. CONSOLE_BUFFER_MAX
  64053. CONSOLE_CHANNEL
  64054. CONSOLE_CLEAR
  64055. CONSOLE_DEBUG
  64056. CONSOLE_EXT_LOG_MAX
  64057. CONSOLE_FLUSH_PENDING
  64058. CONSOLE_ID
  64059. CONSOLE_IRQ
  64060. CONSOLE_ISC
  64061. CONSOLE_IS_3215
  64062. CONSOLE_IS_3270
  64063. CONSOLE_IS_HVC
  64064. CONSOLE_IS_SCLP
  64065. CONSOLE_IS_UNDEFINED
  64066. CONSOLE_IS_VT220
  64067. CONSOLE_LINE_MAX
  64068. CONSOLE_LOGLEVEL_DEBUG
  64069. CONSOLE_LOGLEVEL_DEFAULT
  64070. CONSOLE_LOGLEVEL_MIN
  64071. CONSOLE_LOGLEVEL_MOTORMOUTH
  64072. CONSOLE_LOGLEVEL_QUIET
  64073. CONSOLE_LOGLEVEL_SILENT
  64074. CONSOLE_LP
  64075. CONSOLE_LP_STRICT
  64076. CONSOLE_READ_NEXT
  64077. CONSOLE_READ_RECENT
  64078. CONSOLE_REPLAY_ALL
  64079. CONSOLE_RX_BYTES_PW
  64080. CONSOLE_WRITE_BUF_SIZE
  64081. CONSOLE_WRITE_IRQ
  64082. CONST
  64083. CONST64U
  64084. CONSTANT
  64085. CONSTANT_FM
  64086. CONSTANT_SPEED_POLICY
  64087. CONSTA_MAX
  64088. CONSTELLATION_NUM
  64089. CONSTF
  64090. CONSTFS
  64091. CONSTRAINT_CPUSET
  64092. CONSTRAINT_MEMCG
  64093. CONSTRAINT_MEMORY_POLICY
  64094. CONSTRAINT_NONE
  64095. CONSTRUCTOBJECTFAMILYID
  64096. CONST_CAST_GIMPLE
  64097. CONST_CRC_POLY
  64098. CONST_HDRLEN_V4
  64099. CONST_HDRLEN_V6
  64100. CONST_MASK
  64101. CONST_MASK_ADDR
  64102. CONST_MAX_SEGS_V4
  64103. CONST_MAX_SEGS_V6
  64104. CONST_MSS_V4
  64105. CONST_MSS_V6
  64106. CONST_MTU_TEST
  64107. CONST_PERM_LE2BE
  64108. CONST_PTR_TO_MAP
  64109. CONST_QAM16
  64110. CONST_QAM64
  64111. CONST_QPSK
  64112. CONST_R1R2
  64113. CONST_R2R1
  64114. CONST_R3R4
  64115. CONST_R4R3
  64116. CONST_R5
  64117. CONST_R6
  64118. CONST_RU_POLY
  64119. CONST_STRLEN
  64120. CONST_UNKNOWN
  64121. CONST_VAR_F_MAX
  64122. CONST_VAR_F_MIN
  64123. CONSUMER
  64124. CONSUMER_CRCI_DISABLE
  64125. CONSUMER_CRCI_MSK
  64126. CONSUMER_CRCI_X_SEL
  64127. CONSUMER_CRCI_Y_SEL
  64128. CONSUMER_PIPE_ID_MSK
  64129. CONSUMER_PIPE_ID_SHFT
  64130. CONSUMER_PIPE_LOGICAL_SIZE
  64131. CONSUME_ALLOC
  64132. CONT
  64133. CONTACT_PRESSURE_MASK
  64134. CONTACT_TOOL_TYPE_MASK
  64135. CONTACT_TOUCH_MAJOR_MASK
  64136. CONTACT_X_MSB_MASK
  64137. CONTACT_Y_MSB_MASK
  64138. CONTAINER_BUS_NAME
  64139. CONTAINER_CHANNEL
  64140. CONTAINER_HDR_SZ
  64141. CONTAINER_ID_MAXLEN
  64142. CONTAINER_ID_TYPE
  64143. CONTAINER_INHERIT_ACE
  64144. CONTAINER_TO_CHANNEL
  64145. CONTAINER_TO_ID
  64146. CONTAINER_TO_LUN
  64147. CONTEC
  64148. CONTEC_COM1USBH_PID
  64149. CONTEC_VID
  64150. CONTENT_TYPE_ERROR
  64151. CONTEXT
  64152. CONTEXT0
  64153. CONTEXT1
  64154. CONTEXT1_IDENTITY_ACCESS_MODE
  64155. CONTEXT2
  64156. CONTEXT3
  64157. CONTEXT4
  64158. CONTEXT5
  64159. CONTEXT6
  64160. CONTEXT7
  64161. CONTEXTIDR
  64162. CONTEXTIDR_ASID
  64163. CONTEXTIDR_ASID_MASK
  64164. CONTEXTIDR_ASID_SHIFT
  64165. CONTEXTIDR_EL1
  64166. CONTEXTS_NUM
  64167. CONTEXT_ACTIVE
  64168. CONTEXT_ALLOC_BIT
  64169. CONTEXT_BANNED
  64170. CONTEXT_BASE
  64171. CONTEXT_BEACON_PACKET
  64172. CONTEXT_BITS
  64173. CONTEXT_CLAIM
  64174. CONTEXT_CLOSED
  64175. CONTEXT_CMD_DISABLE
  64176. CONTEXT_CONTROL_COUNTER_MODE
  64177. CONTEXT_CONTROL_CRYPTO_ALG_3DES
  64178. CONTEXT_CONTROL_CRYPTO_ALG_AES128
  64179. CONTEXT_CONTROL_CRYPTO_ALG_AES192
  64180. CONTEXT_CONTROL_CRYPTO_ALG_AES256
  64181. CONTEXT_CONTROL_CRYPTO_ALG_DES
  64182. CONTEXT_CONTROL_CRYPTO_ALG_GHASH
  64183. CONTEXT_CONTROL_CRYPTO_ALG_MD5
  64184. CONTEXT_CONTROL_CRYPTO_ALG_SHA1
  64185. CONTEXT_CONTROL_CRYPTO_ALG_SHA224
  64186. CONTEXT_CONTROL_CRYPTO_ALG_SHA256
  64187. CONTEXT_CONTROL_CRYPTO_ALG_SHA384
  64188. CONTEXT_CONTROL_CRYPTO_ALG_SHA512
  64189. CONTEXT_CONTROL_CRYPTO_ALG_XCBC128
  64190. CONTEXT_CONTROL_CRYPTO_ALG_XCBC192
  64191. CONTEXT_CONTROL_CRYPTO_ALG_XCBC256
  64192. CONTEXT_CONTROL_CRYPTO_MODE_CBC
  64193. CONTEXT_CONTROL_CRYPTO_MODE_CFB
  64194. CONTEXT_CONTROL_CRYPTO_MODE_CTR_LOAD
  64195. CONTEXT_CONTROL_CRYPTO_MODE_ECB
  64196. CONTEXT_CONTROL_CRYPTO_MODE_OFB
  64197. CONTEXT_CONTROL_CRYPTO_MODE_XCM
  64198. CONTEXT_CONTROL_CRYPTO_MODE_XTS
  64199. CONTEXT_CONTROL_CRYPTO_STORE
  64200. CONTEXT_CONTROL_DIGEST_CNT
  64201. CONTEXT_CONTROL_DIGEST_HMAC
  64202. CONTEXT_CONTROL_DIGEST_PRECOMPUTED
  64203. CONTEXT_CONTROL_DIGEST_XCM
  64204. CONTEXT_CONTROL_HASH_STORE
  64205. CONTEXT_CONTROL_INV_FR
  64206. CONTEXT_CONTROL_INV_TR
  64207. CONTEXT_CONTROL_IV0
  64208. CONTEXT_CONTROL_IV1
  64209. CONTEXT_CONTROL_IV2
  64210. CONTEXT_CONTROL_IV3
  64211. CONTEXT_CONTROL_KEY_EN
  64212. CONTEXT_CONTROL_NO_FINISH_HASH
  64213. CONTEXT_CONTROL_RESTART_HASH
  64214. CONTEXT_CONTROL_SIZE
  64215. CONTEXT_CONTROL_TYPE_CRYPTO_IN
  64216. CONTEXT_CONTROL_TYPE_CRYPTO_OUT
  64217. CONTEXT_CONTROL_TYPE_DECRYPT_HASH_IN
  64218. CONTEXT_CONTROL_TYPE_ENCRYPT_HASH_OUT
  64219. CONTEXT_CONTROL_TYPE_HASH_DECRYPT_IN
  64220. CONTEXT_CONTROL_TYPE_HASH_ENCRYPT_OUT
  64221. CONTEXT_CONTROL_TYPE_HASH_IN
  64222. CONTEXT_CONTROL_TYPE_HASH_OUT
  64223. CONTEXT_CONTROL_TYPE_NULL_IN
  64224. CONTEXT_CONTROL_TYPE_NULL_OUT
  64225. CONTEXT_DATA_PACKET
  64226. CONTEXT_DEAD
  64227. CONTEXT_DISABLED
  64228. CONTEXT_DONE
  64229. CONTEXT_ELNA_GAIN
  64230. CONTEXT_ELNA_HYSTERESIS
  64231. CONTEXT_EXECUTE
  64232. CONTEXT_FAST_HANG_JIFFIES
  64233. CONTEXT_FORCE_SINGLE_SUBMISSION
  64234. CONTEXT_GUEST
  64235. CONTEXT_IR_STATE
  64236. CONTEXT_KERNEL
  64237. CONTEXT_LNA
  64238. CONTEXT_LOAD
  64239. CONTEXT_LOAD_AND_DO_FILL
  64240. CONTEXT_LOAD_AND_DO_LINE
  64241. CONTEXT_LOAD_CNTL
  64242. CONTEXT_MASK
  64243. CONTEXT_MATCH
  64244. CONTEXT_MER_OFFSET
  64245. CONTEXT_MER_THRESHOLD
  64246. CONTEXT_MGMT_PACKET
  64247. CONTEXT_MNT
  64248. CONTEXT_NO_LOAD
  64249. CONTEXT_PASIDE
  64250. CONTEXT_PER_HART
  64251. CONTEXT_REG_BASE
  64252. CONTEXT_REG_END
  64253. CONTEXT_REG_SIZE
  64254. CONTEXT_RUN
  64255. CONTEXT_SEL
  64256. CONTEXT_SIZE
  64257. CONTEXT_SPACE_END
  64258. CONTEXT_SPACE_START
  64259. CONTEXT_STR
  64260. CONTEXT_SUSPEND
  64261. CONTEXT_THRESHOLD
  64262. CONTEXT_TSOUT_FALLING_EDGE
  64263. CONTEXT_TSOUT_MSB_FIRST
  64264. CONTEXT_TT_DEV_IOTLB
  64265. CONTEXT_TT_MULTI_LEVEL
  64266. CONTEXT_TT_PASS_THROUGH
  64267. CONTEXT_USER
  64268. CONTEXT_USER_ENGINES
  64269. CONTEXT_WAKE
  64270. CONTEXT_WINDOW_BYTES
  64271. CONTIG_LEFT
  64272. CONTIG_LEFTRIGHT
  64273. CONTIG_NONE
  64274. CONTIG_RIGHT
  64275. CONTINIOUS_REMOTE_UPDATE_SUPPORT_MASK
  64276. CONTINIOUS_REMOTE_UPDATE_SUPPORT_SHIFT
  64277. CONTINUATION
  64278. CONTINUE
  64279. CONTINUE_A64_TYPE
  64280. CONTINUE_A64_TYPE_FX00
  64281. CONTINUE_SEG
  64282. CONTINUE_SEG_A64
  64283. CONTINUE_TGT_IO_TYPE
  64284. CONTINUE_TIME_SEL
  64285. CONTINUE_TYPE
  64286. CONTINUOUS_CLK_MASK
  64287. CONTINUOUS_CLK_SHIFT
  64288. CONTINUOUS_MODE
  64289. CONTINUOUS_POLLING
  64290. CONTOUR_JOG
  64291. CONTOUR_VENDOR
  64292. CONTRAST
  64293. CONTRASTOFF
  64294. CONTRAST_CTRL_BYTE
  64295. CONTRAST_DEF
  64296. CONTRAST_DEFAULT
  64297. CONTRAST_FORMATTER
  64298. CONTRAST_MAX
  64299. CONTRAST_REG
  64300. CONTROL
  64301. CONTROL0_TSEN_AVG_BYPASS
  64302. CONTROL0_TSEN_CHAN_MASK
  64303. CONTROL0_TSEN_CHAN_SHIFT
  64304. CONTROL0_TSEN_ENABLE
  64305. CONTROL0_TSEN_MODE_EXTERNAL
  64306. CONTROL0_TSEN_MODE_MASK
  64307. CONTROL0_TSEN_MODE_SHIFT
  64308. CONTROL0_TSEN_OSR_MAX
  64309. CONTROL0_TSEN_OSR_SHIFT
  64310. CONTROL0_TSEN_RESET
  64311. CONTROL0_TSEN_START
  64312. CONTROL0_TSEN_TC_TRIM_MASK
  64313. CONTROL0_TSEN_TC_TRIM_VAL
  64314. CONTROL1
  64315. CONTROL1_DEFAULT
  64316. CONTROL1_EDGE
  64317. CONTROL1_EXT_TSEN_HW_RESETn
  64318. CONTROL1_EXT_TSEN_SW_RESET
  64319. CONTROL1_INTE
  64320. CONTROL1_INT_ACTIVE_HIGH
  64321. CONTROL1_INT_EN
  64322. CONTROL1_SW_AUDIO
  64323. CONTROL1_SW_OPEN
  64324. CONTROL1_SW_UART
  64325. CONTROL1_SW_USB
  64326. CONTROL1_TSEN_AVG_MASK
  64327. CONTROL1_TSEN_INT_EN
  64328. CONTROL1_TSEN_SELECT_MASK
  64329. CONTROL1_TSEN_SELECT_OFF
  64330. CONTROL2_ACCDET_MASK
  64331. CONTROL2_ACCDET_SHIFT
  64332. CONTROL2_ADCEN_MASK
  64333. CONTROL2_ADCEN_SHIFT
  64334. CONTROL2_ADC_EN
  64335. CONTROL2_CPEN_MASK
  64336. CONTROL2_CPEN_SHIFT
  64337. CONTROL2_DEFAULT
  64338. CONTROL2_LOWPWR_MASK
  64339. CONTROL2_LOWPWR_SHIFT
  64340. CONTROL2_RCPS_MASK
  64341. CONTROL2_RCPS_SHIFT
  64342. CONTROL2_SFOUTASRT_MASK
  64343. CONTROL2_SFOUTASRT_SHIFT
  64344. CONTROL2_SFOUTORD_MASK
  64345. CONTROL2_SFOUTORD_SHIFT
  64346. CONTROL2_USBCPINT_MASK
  64347. CONTROL2_USBCPINT_SHIFT
  64348. CONTROL3_ADCDBSET_MASK
  64349. CONTROL3_ADCDBSET_SHIFT
  64350. CONTROL3_BTLDSET_MASK
  64351. CONTROL3_BTLDSET_SHIFT
  64352. CONTROL3_DEFAULT
  64353. CONTROL3_JIGSET_MASK
  64354. CONTROL3_JIGSET_SHIFT
  64355. CONTROL4_AUTO_DISABLE
  64356. CONTROL4_AUTO_ENABLE
  64357. CONTROLLER_BUF_LEN_MIN
  64358. CONTROLLER_CMD
  64359. CONTROLLER_DISABLE
  64360. CONTROLLER_DP_TEST_PATTERN_COLORRAMP
  64361. CONTROLLER_DP_TEST_PATTERN_COLORSQUARES
  64362. CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA
  64363. CONTROLLER_DP_TEST_PATTERN_D102
  64364. CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS
  64365. CONTROLLER_DP_TEST_PATTERN_PRBS7
  64366. CONTROLLER_DP_TEST_PATTERN_RESERVED_8
  64367. CONTROLLER_DP_TEST_PATTERN_RESERVED_9
  64368. CONTROLLER_DP_TEST_PATTERN_RESERVED_A
  64369. CONTROLLER_DP_TEST_PATTERN_SOLID_COLOR
  64370. CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR
  64371. CONTROLLER_DP_TEST_PATTERN_VERTICALBARS
  64372. CONTROLLER_DP_TEST_PATTERN_VIDEOMODE
  64373. CONTROLLER_ENABLE
  64374. CONTROLLER_FAILOVER
  64375. CONTROLLER_FATAL_ERROR
  64376. CONTROLLER_ID_D0
  64377. CONTROLLER_ID_D1
  64378. CONTROLLER_ID_D2
  64379. CONTROLLER_ID_D3
  64380. CONTROLLER_ID_D4
  64381. CONTROLLER_ID_D5
  64382. CONTROLLER_ID_MAX
  64383. CONTROLLER_ID_UNDEFINED
  64384. CONTROLLER_ID_UNDERLAY0
  64385. CONTROLLER_IN_GPU
  64386. CONTROLLER_NAME_BASE
  64387. CONTROLLER_RESET_AZ_CONTROLLER_IN_RESET
  64388. CONTROLLER_RESET_AZ_CONTROLLER_NOT_IN_RESET
  64389. CONTROLLER_STAT1
  64390. CONTROLLER_STATUS
  64391. CONTROLLER_T
  64392. CONTROLLER_t
  64393. CONTROLVM_BUS_CHANGESTATE
  64394. CONTROLVM_BUS_CHANGESTATE_EVENT
  64395. CONTROLVM_BUS_CONFIGURE
  64396. CONTROLVM_BUS_CREATE
  64397. CONTROLVM_BUS_DESTROY
  64398. CONTROLVM_CHIPSET_INIT
  64399. CONTROLVM_CHIPSET_READY
  64400. CONTROLVM_CHIPSET_SELFTEST
  64401. CONTROLVM_CHIPSET_STOP
  64402. CONTROLVM_CRASHMSG_MAX
  64403. CONTROLVM_DEVICE_CHANGESTATE
  64404. CONTROLVM_DEVICE_CHANGESTATE_EVENT
  64405. CONTROLVM_DEVICE_CONFIGURE
  64406. CONTROLVM_DEVICE_CREATE
  64407. CONTROLVM_DEVICE_DESTROY
  64408. CONTROLVM_DEVICE_RECONFIGURE
  64409. CONTROLVM_INVALID
  64410. CONTROLVM_MESSAGE_MAX
  64411. CONTROLVM_QUEUE_ACK
  64412. CONTROLVM_QUEUE_EVENT
  64413. CONTROLVM_QUEUE_REQUEST
  64414. CONTROLVM_QUEUE_RESPONSE
  64415. CONTROLVM_RESP_ALREADY_DONE
  64416. CONTROLVM_RESP_BUS_INVALID
  64417. CONTROLVM_RESP_CHANNEL_INVALID
  64418. CONTROLVM_RESP_CHANNEL_SIZE_TOO_SMALL
  64419. CONTROLVM_RESP_CHANNEL_TYPE_UNKNOWN
  64420. CONTROLVM_RESP_CHIPSET_SHUTDOWN_ALREADY_ACTIVE
  64421. CONTROLVM_RESP_CHIPSET_SHUTDOWN_FAILED
  64422. CONTROLVM_RESP_CHIPSET_STOP_FAILED_BUS
  64423. CONTROLVM_RESP_CHIPSET_STOP_FAILED_SWITCH
  64424. CONTROLVM_RESP_CLIENT_PARAMETER_INVALID
  64425. CONTROLVM_RESP_CLIENT_SWITCHCOUNT_NONZERO
  64426. CONTROLVM_RESP_DEVICE_INVALID
  64427. CONTROLVM_RESP_DEVICE_UDEV_TIMEOUT
  64428. CONTROLVM_RESP_ERROR_BUS_DEVICE_ATTACHED
  64429. CONTROLVM_RESP_ERROR_MAX_BUSES
  64430. CONTROLVM_RESP_ERROR_MAX_DEVICES
  64431. CONTROLVM_RESP_EXPECTED_CHIPSET_INIT
  64432. CONTROLVM_RESP_GENERIC_DRIVER_CALLBACK_ERROR
  64433. CONTROLVM_RESP_ID_INVALID_FOR_CLIENT
  64434. CONTROLVM_RESP_ID_UNKNOWN
  64435. CONTROLVM_RESP_INITIATOR_PARAMETER_INVALID
  64436. CONTROLVM_RESP_IOREMAP_FAILED
  64437. CONTROLVM_RESP_KMALLOC_FAILED
  64438. CONTROLVM_RESP_PAYLOAD_INVALID
  64439. CONTROLVM_RESP_SUCCESS
  64440. CONTROLVM_RESP_TARGET_PARAMETER_INVALID
  64441. CONTROLVM_RESP_VIRTPCI_DRIVER_CALLBACK_ERROR
  64442. CONTROLVM_RESP_VIRTPCI_DRIVER_FAILURE
  64443. CONTROL_0_REG
  64444. CONTROL_AAF_MODE
  64445. CONTROL_ABSENT
  64446. CONTROL_ACCESS
  64447. CONTROL_ACK
  64448. CONTROL_ACTIVE_SHIFT
  64449. CONTROL_ATA_DEV
  64450. CONTROL_AUTH_TYPE
  64451. CONTROL_AUTH_TYPE_SHIFT
  64452. CONTROL_AUTO_RESET
  64453. CONTROL_AUX_CAPTURE_SWITCH
  64454. CONTROL_BACK
  64455. CONTROL_BACK_REQ
  64456. CONTROL_BASE_ADDR
  64457. CONTROL_BITPORT
  64458. CONTROL_BLOCK_SIZE
  64459. CONTROL_BUFFER_SIZE
  64460. CONTROL_BYPASS_DISABLE
  64461. CONTROL_BYPASS_ENABLE
  64462. CONTROL_CCE
  64463. CONTROL_CD_CAPTURE_SWITCH
  64464. CONTROL_CENTER_LFE_CHANNEL
  64465. CONTROL_CE_INACTIVE_MASK
  64466. CONTROL_CE_INACTIVE_SHIFT
  64467. CONTROL_CE_STOP_ACTIVE_CONTROL
  64468. CONTROL_CFEND
  64469. CONTROL_CFENDACK
  64470. CONTROL_CHANNEL
  64471. CONTROL_CLEAR
  64472. CONTROL_CLK_DIV4
  64473. CONTROL_CLOCK_FREQ_SEL_MASK
  64474. CONTROL_CLOCK_FREQ_SEL_SHIFT
  64475. CONTROL_CLOCK_MODE_3
  64476. CONTROL_CMD
  64477. CONTROL_CMDBUF_EN
  64478. CONTROL_COHERENT_EN
  64479. CONTROL_COMMAND_MODE_FREAD
  64480. CONTROL_COMMAND_MODE_MASK
  64481. CONTROL_COMMAND_MODE_NORMAL
  64482. CONTROL_COMMAND_MODE_USER
  64483. CONTROL_COMMAND_MODE_WRITE
  64484. CONTROL_COMMAND_SHIFT
  64485. CONTROL_COMMAND_START
  64486. CONTROL_COMMAND_STOP
  64487. CONTROL_COMWAIT_EN
  64488. CONTROL_COUNT
  64489. CONTROL_CSC_ENABLE
  64490. CONTROL_CTS
  64491. CONTROL_DACK
  64492. CONTROL_DCD
  64493. CONTROL_DEV_CONF
  64494. CONTROL_DIAGNOSTIC_MODE
  64495. CONTROL_DISABLE
  64496. CONTROL_DISABLE_AR
  64497. CONTROL_DISPLAY_BCTRL
  64498. CONTROL_DISPLAY_BL
  64499. CONTROL_DISPLAY_DD
  64500. CONTROL_DSR
  64501. CONTROL_DTR
  64502. CONTROL_DTR_HIGH
  64503. CONTROL_DUMMY_COMMAND_OUT
  64504. CONTROL_EEPROM_WC_N
  64505. CONTROL_EIE
  64506. CONTROL_ENABLE
  64507. CONTROL_ENABLE_AR
  64508. CONTROL_ENCRYPT
  64509. CONTROL_ENC_TYPE
  64510. CONTROL_ENC_TYPE_SHIFT
  64511. CONTROL_END_OF_BLOCK
  64512. CONTROL_ENI
  64513. CONTROL_ERROR_NONE
  64514. CONTROL_ES0
  64515. CONTROL_ES1
  64516. CONTROL_ES2
  64517. CONTROL_EVT_INT_EN
  64518. CONTROL_EVT_LOG_EN
  64519. CONTROL_EXT
  64520. CONTROL_EX_PDR
  64521. CONTROL_FACTORY_EEPROM_AREA
  64522. CONTROL_FLAGS_MAX
  64523. CONTROL_FLAG_ADC_B_96KHZ
  64524. CONTROL_FLAG_ADC_B_HIGH_PASS
  64525. CONTROL_FLAG_ADC_C_96KHZ
  64526. CONTROL_FLAG_ADC_C_HIGH_PASS
  64527. CONTROL_FLAG_ASI_96KHZ
  64528. CONTROL_FLAG_CONTROL_STOP_OK_ENABLE
  64529. CONTROL_FLAG_C_MGR
  64530. CONTROL_FLAG_DAC1_DEEMPHASIS
  64531. CONTROL_FLAG_DAC2_DEEMPHASIS
  64532. CONTROL_FLAG_DAC3_DEEMPHASIS
  64533. CONTROL_FLAG_DACS_CONTROL_PORTS
  64534. CONTROL_FLAG_DAC_96KHZ
  64535. CONTROL_FLAG_DECODE_LOOP
  64536. CONTROL_FLAG_DMA
  64537. CONTROL_FLAG_DMIC
  64538. CONTROL_FLAG_DSP_96KHZ
  64539. CONTROL_FLAG_ENABLE_AIPP
  64540. CONTROL_FLAG_IDLE_ENABLE
  64541. CONTROL_FLAG_IGNORE_PERR
  64542. CONTROL_FLAG_PORT_A_10KOHM_LOAD
  64543. CONTROL_FLAG_PORT_A_COMMON_MODE
  64544. CONTROL_FLAG_PORT_D_10KOHM_LOAD
  64545. CONTROL_FLAG_PORT_D_COMMON_MODE
  64546. CONTROL_FLAG_SPDIF2OUT
  64547. CONTROL_FLAG_SRC_CLOCK_196MHZ
  64548. CONTROL_FLAG_SRC_RATE_96KHZ
  64549. CONTROL_FLAG_TRACKER
  64550. CONTROL_FLUSH_SHIFT
  64551. CONTROL_FRAME_LEN
  64552. CONTROL_FRAME_MATCHED
  64553. CONTROL_FRONT_CHANNEL
  64554. CONTROL_GAINT_EN
  64555. CONTROL_GALOG_EN
  64556. CONTROL_GAM_EN
  64557. CONTROL_GA_EN
  64558. CONTROL_GT_EN
  64559. CONTROL_H
  64560. CONTROL_HASH_LEN
  64561. CONTROL_HASH_LEN_SHIFT
  64562. CONTROL_HMAC_KEY_LEN
  64563. CONTROL_HMAC_KEY_LEN_SHIFT
  64564. CONTROL_HSS0_CLK_INT
  64565. CONTROL_HSS0_DTR_N
  64566. CONTROL_HSS1_CLK_INT
  64567. CONTROL_HSS1_DTR_N
  64568. CONTROL_HT_TUN_EN
  64569. CONTROL_HV_DONE
  64570. CONTROL_HV_HARDWARE_ERROR
  64571. CONTROL_HV_PROTOCOL_ERROR
  64572. CONTROL_ID
  64573. CONTROL_IDLE
  64574. CONTROL_IE
  64575. CONTROL_INIT
  64576. CONTROL_INTCAPXT_EN
  64577. CONTROL_INTERRUPT
  64578. CONTROL_INV_TIMEOUT
  64579. CONTROL_IN_DUAL_DATA
  64580. CONTROL_IOMMU_EN
  64581. CONTROL_IO_ADDRESS_4B
  64582. CONTROL_IO_DUAL_ADDR_DATA
  64583. CONTROL_IO_DUAL_DATA
  64584. CONTROL_IO_DUMMY_HI
  64585. CONTROL_IO_DUMMY_HI_SHIFT
  64586. CONTROL_IO_DUMMY_LO
  64587. CONTROL_IO_DUMMY_LO_SHIFT
  64588. CONTROL_IO_DUMMY_MASK
  64589. CONTROL_IO_DUMMY_SET
  64590. CONTROL_IO_MODE_MASK
  64591. CONTROL_IO_QUAD_ADDR_DATA
  64592. CONTROL_IO_QUAD_DATA
  64593. CONTROL_IP_OFFLOAD
  64594. CONTROL_IP_OFFLOAD_RSP
  64595. CONTROL_IQ
  64596. CONTROL_IRQMSK
  64597. CONTROL_ISOC_EN
  64598. CONTROL_KBD_TIME_BETWEEN_REPEATS
  64599. CONTROL_KBD_TIME_UNTIL_REPEAT
  64600. CONTROL_KEEP_MASK
  64601. CONTROL_LCD
  64602. CONTROL_LEN
  64603. CONTROL_LEN_SHIFT
  64604. CONTROL_LINE_CAPTURE_SWITCH
  64605. CONTROL_LSB_FIRST
  64606. CONTROL_MARK_SPACE_RATIO
  64607. CONTROL_MASK
  64608. CONTROL_MASK_DISABLE_CONTROL
  64609. CONTROL_MASK_MSI_X
  64610. CONTROL_MAX
  64611. CONTROL_MAX_DIV
  64612. CONTROL_MAX_ELEMENTS
  64613. CONTROL_MEM_RTA_CTRL
  64614. CONTROL_MIC_CAPTURE_SWITCH
  64615. CONTROL_MINOR
  64616. CONTROL_MODE
  64617. CONTROL_MODE_ONESHOT
  64618. CONTROL_MODE_PERIODIC
  64619. CONTROL_MPAGE
  64620. CONTROL_MPAGE_LEN
  64621. CONTROL_MULT_SELECT
  64622. CONTROL_N_RATES
  64623. CONTROL_OPCODE
  64624. CONTROL_OPCODE_SHIFT
  64625. CONTROL_OTG_PORT
  64626. CONTROL_PARAM_ASI
  64627. CONTROL_PARAM_CONN_POINT_ID
  64628. CONTROL_PARAM_CONN_POINT_SAMPLE_RATE
  64629. CONTROL_PARAM_NODE_ID
  64630. CONTROL_PARAM_PORTA_160OHM_GAIN
  64631. CONTROL_PARAM_PORTD_160OHM_GAIN
  64632. CONTROL_PARAM_SPDIF1_SOURCE
  64633. CONTROL_PARAM_STREAMS_CHANNELS
  64634. CONTROL_PARAM_STREAM_CONTROL
  64635. CONTROL_PARAM_STREAM_DEST_CONN_POINT
  64636. CONTROL_PARAM_STREAM_ID
  64637. CONTROL_PARAM_STREAM_SOURCE_CONN_POINT
  64638. CONTROL_PARAM_VIP_SOURCE
  64639. CONTROL_PASSPW_EN
  64640. CONTROL_PCI_RESET_N
  64641. CONTROL_PHY
  64642. CONTROL_PHY_CLK_SEL_ULPI
  64643. CONTROL_PHY_STATUS
  64644. CONTROL_PIN
  64645. CONTROL_PIXCLOCK_BASE
  64646. CONTROL_PIXCLOCK_MIN
  64647. CONTROL_PORT
  64648. CONTROL_PPFINT_EN
  64649. CONTROL_PPFLOG_EN
  64650. CONTROL_PPR_EN
  64651. CONTROL_PROC_AGC_CHANGE_MODE
  64652. CONTROL_PROC_AGC_CHANGE_MODE_RSP
  64653. CONTROL_PROC_CONTEXT
  64654. CONTROL_PROC_CONTEXT_RSP
  64655. CONTROL_PROC_DUMPLOG_MEMORY
  64656. CONTROL_PROC_DUMPLOG_MEMORY_RSP
  64657. CONTROL_PROC_DUMP_MEMORY
  64658. CONTROL_PROC_DUMP_MEMORY_RSP
  64659. CONTROL_PROC_ELNA_CHANGE_MODE
  64660. CONTROL_PROC_ELNA_CHANGE_MODE_RSP
  64661. CONTROL_PROC_GETTPS
  64662. CONTROL_PROC_GETTPS_RSP
  64663. CONTROL_PROC_GETTUNESTAT
  64664. CONTROL_PROC_GETTUNESTAT_RSP
  64665. CONTROL_PROC_GET_DEMOD_STATS
  64666. CONTROL_PROC_GET_DEMOD_STATS_RSP
  64667. CONTROL_PROC_GET_IMPULSE_RESP
  64668. CONTROL_PROC_GET_IMPULSE_RESP_RSP
  64669. CONTROL_PROC_GET_REGISTER
  64670. CONTROL_PROC_GET_REGISTER_RSP
  64671. CONTROL_PROC_ODSP_CHANGE_MODE
  64672. CONTROL_PROC_ODSP_CHANGE_MODE_RSP
  64673. CONTROL_PROC_REMOVEFILTER
  64674. CONTROL_PROC_REMOVEFILTER_RSP
  64675. CONTROL_PROC_SETFILTER
  64676. CONTROL_PROC_SETFILTER_RSP
  64677. CONTROL_PROC_SETTUNE
  64678. CONTROL_PROC_SETTUNE_RSP
  64679. CONTROL_PROC_SET_REGISTER
  64680. CONTROL_PROC_SET_REGISTER_RSP
  64681. CONTROL_PROC_START_STREAMING
  64682. CONTROL_PROC_START_STREAMING_RSP
  64683. CONTROL_PROC_STOP_STREAMING
  64684. CONTROL_PROC_STOP_STREAMING_RSP
  64685. CONTROL_PROC_TURNOFF
  64686. CONTROL_PROC_TURNOFF_RSP
  64687. CONTROL_PROC_TURNON
  64688. CONTROL_PROC_TURNON_RSP
  64689. CONTROL_PSPOLL
  64690. CONTROL_RATE_176KHZ
  64691. CONTROL_RATE_192KHZ
  64692. CONTROL_RATE_44KHZ
  64693. CONTROL_RATE_48KHZ
  64694. CONTROL_RATE_88KHZ
  64695. CONTROL_RATE_96KHZ
  64696. CONTROL_RATE_ADAPT_MASK
  64697. CONTROL_RATE_DYNAMIC
  64698. CONTROL_RATE_FAST
  64699. CONTROL_RATE_IDLE
  64700. CONTROL_RATE_MEDIUM
  64701. CONTROL_RATE_SLOW
  64702. CONTROL_RDONLY
  64703. CONTROL_RDWR
  64704. CONTROL_REAR_CHANNEL
  64705. CONTROL_REFSEL_24MHZ
  64706. CONTROL_REFSEL_48MHZ
  64707. CONTROL_REG
  64708. CONTROL_REGISTER
  64709. CONTROL_REGISTER_W1C_MASK
  64710. CONTROL_REG_ACCESS_NUM
  64711. CONTROL_REG_ACCESS_REG
  64712. CONTROL_REG_ACCESS_TYPE
  64713. CONTROL_RESERVED
  64714. CONTROL_RESET
  64715. CONTROL_RESPASSPW_EN
  64716. CONTROL_RING
  64717. CONTROL_RTS
  64718. CONTROL_RTS_HIGH
  64719. CONTROL_RW_MERGE
  64720. CONTROL_SCREEN_CONTRAST
  64721. CONTROL_SET
  64722. CONTROL_SHIFT
  64723. CONTROL_SIDE_CHANNEL
  64724. CONTROL_SIE
  64725. CONTROL_SPDIF_INPUT_BITS
  64726. CONTROL_SPDIF_PCM
  64727. CONTROL_STA
  64728. CONTROL_START_OF_BLOCK
  64729. CONTROL_STAT
  64730. CONTROL_STATUS_INTERRUPT
  64731. CONTROL_STATUS_INTERRUPT_ENABLE
  64732. CONTROL_STATUS_PHASE_HANDSHAKE
  64733. CONTROL_STO
  64734. CONTROL_STORE_FINAL_AUTH_STATE
  64735. CONTROL_STRAND
  64736. CONTROL_STRAND_SHIFT
  64737. CONTROL_SWR
  64738. CONTROL_TCS
  64739. CONTROL_TEST
  64740. CONTROL_TEST_MODE
  64741. CONTROL_TFT_BRIGHTNESS
  64742. CONTROL_TIMEOUT_MS
  64743. CONTROL_TIMEZONE
  64744. CONTROL_TRIGGER_RISING
  64745. CONTROL_UNKNOWN_CHANNEL
  64746. CONTROL_UTMI_PHY_EN
  64747. CONTROL_VIDEO_IDLE
  64748. CONTROL_VIDEO_VALID
  64749. CONTROL_WATCHDOG
  64750. CONTROL_WORD
  64751. CONTROL_WORD_LEN
  64752. CONTROL_WRITE_DTR
  64753. CONTROL_WRITE_RTS
  64754. CONTROL_XT_EN
  64755. CONTR_BUS_ERROR
  64756. CONTR_CAN_MESSAGE
  64757. CONTR_CAN_STATE
  64758. CONTR_CONT_OFF
  64759. CONTR_CONT_ON
  64760. CONTR_ONCE
  64761. CONT_0
  64762. CONT_1
  64763. CONT_CAP_MODE
  64764. CONT_DET
  64765. CONT_HEIGHT_BITS
  64766. CONT_JMP
  64767. CONT_MASK
  64768. CONT_PMDS
  64769. CONT_PMD_MASK
  64770. CONT_PMD_SHIFT
  64771. CONT_PMD_SIZE
  64772. CONT_PTES
  64773. CONT_PTE_MASK
  64774. CONT_PTE_SHIFT
  64775. CONT_PTE_SIZE
  64776. CONT_RANGE_OFFSET
  64777. CONT_SHIFT
  64778. CONT_SIZE
  64779. CONT_WIDTH_BITS
  64780. CONVERSION_TIME
  64781. CONVERSION_TIME_MS
  64782. CONVERT32
  64783. CONVERT_FROM_HOST_TO_SMC_UL
  64784. CONVERT_FROM_HOST_TO_SMC_US
  64785. CONVERT_FROM_SMC_TO_HOST_UL
  64786. CONVERT_INLINE_DATA
  64787. CONVERT_PERIOD
  64788. CONVERT_POLARITY_BIT
  64789. CONV_CONTROL
  64790. CONV_HCEN
  64791. CONV_PTE_TO_TLB
  64792. CONV_TO_ETHER_FAILED
  64793. CONV_TO_ETHER_SKIPPED
  64794. CONV_UNIT_MS
  64795. CONV_UNIT_NS
  64796. CONV_UNIT_US
  64797. CONV_X
  64798. CONV_Y
  64799. CON_0
  64800. CON_1
  64801. CON_ACTIVE
  64802. CON_ANYTIME
  64803. CON_BOOT
  64804. CON_BRD
  64805. CON_BREAK
  64806. CON_BRL
  64807. CON_BUF_SIZE
  64808. CON_BWR
  64809. CON_BYTE_DISABLE_0
  64810. CON_BYTE_DISABLE_1
  64811. CON_BYTE_DISABLE_2
  64812. CON_BYTE_DISABLE_3
  64813. CON_CFG_DRIVER
  64814. CON_CLKEXTFREE
  64815. CON_CLK_INT
  64816. CON_CNT
  64817. CON_CONSDEV
  64818. CON_CONTROL
  64819. CON_CONTROL_CFG_OPEN_ACC_STP_MSK
  64820. CON_CONTROL_CFG_OPEN_ACC_STP_OFF
  64821. CON_CTL
  64822. CON_CTL_ADDR
  64823. CON_CTL_BUSY
  64824. CON_CTL_MBOX
  64825. CON_CTL_RCM
  64826. CON_CTL_READ
  64827. CON_CTL_TCM
  64828. CON_CTL_WRITE
  64829. CON_CTPL
  64830. CON_DAT
  64831. CON_DDR
  64832. CON_DMA_MASTER
  64833. CON_DRIVER_FLAG_ATTR
  64834. CON_DRIVER_FLAG_INIT
  64835. CON_DRIVER_FLAG_MODULE
  64836. CON_DRIVER_FLAG_ZOMBIE
  64837. CON_DW8
  64838. CON_EDGE_ANY
  64839. CON_ENABLED
  64840. CON_EXTENDED
  64841. CON_FIFO_FLUSH
  64842. CON_FIFO_TH_MASK
  64843. CON_FIFO_TH_SHIFT
  64844. CON_FLAG_BACKOFF
  64845. CON_FLAG_KEEPALIVE_PENDING
  64846. CON_FLAG_LOSSYTX
  64847. CON_FLAG_SOCK_CLOSED
  64848. CON_FLAG_WRITE_PENDING
  64849. CON_FRXOFSTATUS
  64850. CON_FRXORINTEN
  64851. CON_FTXSURINTEN
  64852. CON_FTXSURSTAT
  64853. CON_FTXURINTEN
  64854. CON_FTXURSTATUS
  64855. CON_HUP
  64856. CON_INIT
  64857. CON_INITCALL
  64858. CON_INT_MASK
  64859. CON_LRINDEX
  64860. CON_MANUAL_SW
  64861. CON_MASK
  64862. CON_MCLKDIV_256FS
  64863. CON_MCLKDIV_384FS
  64864. CON_MCLKDIV_512FS
  64865. CON_MCLKDIV_MASK
  64866. CON_NFI_RST
  64867. CON_OD
  64868. CON_PADEN
  64869. CON_PCM_16BIT
  64870. CON_PCM_20BIT
  64871. CON_PCM_24BIT
  64872. CON_PCM_DATA
  64873. CON_PCM_MASK
  64874. CON_PFAULT_DETECTED
  64875. CON_PFAULT_INTR_MASK
  64876. CON_PFAULT_SERR_MASK
  64877. CON_PRINTBUFFER
  64878. CON_RAW_DATA
  64879. CON_RSTCLR
  64880. CON_RXCH_PAUSE
  64881. CON_RXDMA_ACTIVE
  64882. CON_RXDMA_PAUSE
  64883. CON_RXFIFO_EMPTY
  64884. CON_RXFIFO_FULL
  64885. CON_SEC_SHIFT
  64886. CON_SOCK_STATE_CLOSED
  64887. CON_SOCK_STATE_CLOSING
  64888. CON_SOCK_STATE_CONNECTED
  64889. CON_SOCK_STATE_CONNECTING
  64890. CON_SOCK_STATE_NEW
  64891. CON_STATE_CLOSED
  64892. CON_STATE_CONNECTING
  64893. CON_STATE_NEGOTIATING
  64894. CON_STATE_OPEN
  64895. CON_STATE_PREOPEN
  64896. CON_STATE_STANDBY
  64897. CON_SWITCH_OPEN
  64898. CON_SW_RESET
  64899. CON_SYNC
  64900. CON_TXCH_PAUSE
  64901. CON_TXDMA_ACTIVE
  64902. CON_TXDMA_PAUSE
  64903. CON_TXFIFO1_EMPTY
  64904. CON_TXFIFO1_FULL
  64905. CON_TXFIFO2_EMPTY
  64906. CON_TXFIFO2_FULL
  64907. CON_TXFIFO_EMPTY
  64908. CON_TXFIFO_FULL
  64909. CON_TXSDMA_ACTIVE
  64910. CON_TXSDMA_PAUSE
  64911. CON_UPDATE_ALL
  64912. CON_UPDATE_ERASE
  64913. CON_UPDATE_LIST
  64914. CON_UPDATE_STATUS
  64915. CON_USERDATA_23RDBIT
  64916. CON_WAIT
  64917. COOKIEBITS
  64918. COOKIEMASK
  64919. COOKIE_ID_SHIFT
  64920. COOKIE_MAPPED
  64921. COOKIE_PGSZ_CODE
  64922. COOKIE_PGSZ_CODE_SHIFT
  64923. COOKIE_PREMAPPED
  64924. COOKIE_PRE_MAPPED
  64925. COOKIE_SWITCH_CODE
  64926. COOKIE_UNMAPPED
  64927. COORDINATE_X
  64928. COORDINATE_Y
  64929. COORD_ACTIVE
  64930. COORD_INACTIVE
  64931. COORD_UPDATE
  64932. COP
  64933. COP2_CC_INIT_CPU_DEST
  64934. COP2_INIT
  64935. COP3DTX
  64936. COPH
  64937. COPIED
  64938. COPINITSIZE
  64939. COPLISTSIZE
  64940. COPPER_LINK_UP_LIMIT
  64941. COPROCESSOR
  64942. COPROCESSOR_INSTRUCTIONS_MC_MR
  64943. COPROCESSOR_INSTRUCTIONS_ST_LD
  64944. COPRX1
  64945. COPRX2
  64946. COPR_FP
  64947. COPR_INST
  64948. COPS_CLEAR_INT
  64949. COPS_DEBUG
  64950. COPS_IO_EXTENT
  64951. COPY
  64952. COPY2
  64953. COPY4
  64954. COPY8
  64955. COPYBACK_DISABLE
  64956. COPYBACK_DISABLE__FLAG
  64957. COPYBACK_MODE
  64958. COPYBACK_MODE__VALUE
  64959. COPYBREAK_DEFAULT
  64960. COPYING
  64961. COPYMEM
  64962. COPYPAGE_MINICACHE
  64963. COPYPAGE_V6_FROM
  64964. COPYPAGE_V6_TO
  64965. COPYRIGHT
  64966. COPYU
  64967. COPY_16_BYTES
  64968. COPY_16_BYTES_EXCODE
  64969. COPY_16_BYTES_WITHEX
  64970. COPY_80
  64971. COPY_ABORTED
  64972. COPY_BACK_2K
  64973. COPY_BACK_512
  64974. COPY_BATCH_SIZE
  64975. COPY_BREAK
  64976. COPY_BYTE
  64977. COPY_CHUNK_RES_KEY_SIZE
  64978. COPY_CHUNK_SIZE
  64979. COPY_COUNT
  64980. COPY_CTRL
  64981. COPY_ENGINE_CLASS
  64982. COPY_ENGINE_ID
  64983. COPY_ERROR
  64984. COPY_FIELD
  64985. COPY_FIRMWARE
  64986. COPY_FROM_USER
  64987. COPY_IN
  64988. COPY_ISID
  64989. COPY_KERNEL
  64990. COPY_MEM
  64991. COPY_MUST_BE_DIR
  64992. COPY_MUST_BE_FILE
  64993. COPY_OUT
  64994. COPY_PAGE_ADDR
  64995. COPY_REG
  64996. COPY_REG_MASKED
  64997. COPY_REQ
  64998. COPY_RSP
  64999. COPY_SEG
  65000. COPY_SEG_CPL3
  65001. COPY_SOURCE_MODE_ASCII
  65002. COPY_STATE_FN
  65003. COPY_TARGET_MODE_ASCII
  65004. COPY_TO_USER
  65005. COPY_TREE
  65006. COPY_USER
  65007. COPY_VALUE
  65008. COPY_VERIFY
  65009. COPY_VERIFY_WRITES
  65010. COPY_XMM_AND_BSWAP
  65011. COPY_YMM_AND_BSWAP
  65012. CORALP_MEM_SIZE
  65013. CORB_CONTROL__CORB_MEMORY_ERROR_INTERRUPT_ENABLE_MASK
  65014. CORB_CONTROL__CORB_MEMORY_ERROR_INTERRUPT_ENABLE__SHIFT
  65015. CORB_CONTROL__ENABLE_CORB_DMA_ENGINE_MASK
  65016. CORB_CONTROL__ENABLE_CORB_DMA_ENGINE__SHIFT
  65017. CORB_LOWER_BASE_ADDRESS__CORB_LOWER_BASE_ADDRESS_MASK
  65018. CORB_LOWER_BASE_ADDRESS__CORB_LOWER_BASE_ADDRESS__SHIFT
  65019. CORB_LOWER_BASE_ADDRESS__CORB_LOWER_BASE_UNIMPLEMENTED_BITS_MASK
  65020. CORB_LOWER_BASE_ADDRESS__CORB_LOWER_BASE_UNIMPLEMENTED_BITS__SHIFT
  65021. CORB_READ_POINTER_RESET
  65022. CORB_READ_POINTER_RESET_CORB_DMA_IS_NOT_RESET
  65023. CORB_READ_POINTER_RESET_CORB_DMA_IS_RESET
  65024. CORB_READ_POINTER__CORB_READ_POINTER_MASK
  65025. CORB_READ_POINTER__CORB_READ_POINTER_RESET_MASK
  65026. CORB_READ_POINTER__CORB_READ_POINTER_RESET__SHIFT
  65027. CORB_READ_POINTER__CORB_READ_POINTER__SHIFT
  65028. CORB_SIZE__CORB_SIZE_CAPABILITY_MASK
  65029. CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT
  65030. CORB_SIZE__CORB_SIZE_MASK
  65031. CORB_SIZE__CORB_SIZE__SHIFT
  65032. CORB_STATUS__CORB_MEMORY_ERROR_INDICATION_MASK
  65033. CORB_STATUS__CORB_MEMORY_ERROR_INDICATION__SHIFT
  65034. CORB_UPPER_BASE_ADDRESS__CORB_UPPER_BASE_ADDRESS_MASK
  65035. CORB_UPPER_BASE_ADDRESS__CORB_UPPER_BASE_ADDRESS__SHIFT
  65036. CORB_WRITE_POINTER__CORB_WRITE_POINTER_MASK
  65037. CORB_WRITE_POINTER__CORB_WRITE_POINTER__SHIFT
  65038. CORDIC_ANGLE_GEN
  65039. CORDIC_FIXED
  65040. CORDIC_FLOAT
  65041. CORDIC_NUM_ITER
  65042. CORDIC_PRECISION_SHIFT
  65043. CORE
  65044. CORE99_ADLER_START
  65045. CORE99_SIGNATURE
  65046. COREACT
  65047. COREDUMP_LIST_BUF_LEN
  65048. COREDUMP_RETRIEVE_BUF_LEN
  65049. COREGA_PRODUCT_ID
  65050. COREGA_VENDOR_ID
  65051. CORENAME_MAX_SIZE
  65052. COREPLL
  65053. COREPM_ID_0__COREPM_INDEX_MASK
  65054. COREPM_ID_0__COREPM_INDEX__SHIFT
  65055. COREPM_ID_1__COREPM_INDEX_MASK
  65056. COREPM_ID_1__COREPM_INDEX__SHIFT
  65057. COREPM_PWRCTRL_MISC_0__PWRGATEMASTERDIS_MASK
  65058. COREPM_PWRCTRL_MISC_0__PWRGATEMASTERDIS__SHIFT
  65059. COREPM_PWRCTRL_MISC_1__PWRGATEMASTERDIS_MASK
  65060. COREPM_PWRCTRL_MISC_1__PWRGATEMASTERDIS__SHIFT
  65061. COREPM_SCRATCH_0__SCRATCH_DATA_MASK
  65062. COREPM_SCRATCH_0__SCRATCH_DATA__SHIFT
  65063. COREPM_SCRATCH_1__SCRATCH_DATA_MASK
  65064. COREPM_SCRATCH_1__SCRATCH_DATA__SHIFT
  65065. COREPOR_RST
  65066. CORERDY
  65067. CORESIGHT_AUTHSTATUS
  65068. CORESIGHT_BARRIER_PKT_SIZE
  65069. CORESIGHT_CID
  65070. CORESIGHT_CLAIMCLR
  65071. CORESIGHT_CLAIMSET
  65072. CORESIGHT_CLAIM_SELF_HOSTED
  65073. CORESIGHT_COMPIDR0
  65074. CORESIGHT_COMPIDR1
  65075. CORESIGHT_COMPIDR2
  65076. CORESIGHT_COMPIDR3
  65077. CORESIGHT_DEVID
  65078. CORESIGHT_DEVTYPE
  65079. CORESIGHT_DEV_SUBTYPE_HELPER_CATU
  65080. CORESIGHT_DEV_SUBTYPE_HELPER_NONE
  65081. CORESIGHT_DEV_SUBTYPE_LINK_FIFO
  65082. CORESIGHT_DEV_SUBTYPE_LINK_MERG
  65083. CORESIGHT_DEV_SUBTYPE_LINK_NONE
  65084. CORESIGHT_DEV_SUBTYPE_LINK_SPLIT
  65085. CORESIGHT_DEV_SUBTYPE_SINK_BUFFER
  65086. CORESIGHT_DEV_SUBTYPE_SINK_NONE
  65087. CORESIGHT_DEV_SUBTYPE_SINK_PORT
  65088. CORESIGHT_DEV_SUBTYPE_SOURCE_BUS
  65089. CORESIGHT_DEV_SUBTYPE_SOURCE_NONE
  65090. CORESIGHT_DEV_SUBTYPE_SOURCE_PROC
  65091. CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE
  65092. CORESIGHT_DEV_TYPE_HELPER
  65093. CORESIGHT_DEV_TYPE_LINK
  65094. CORESIGHT_DEV_TYPE_LINKSINK
  65095. CORESIGHT_DEV_TYPE_NONE
  65096. CORESIGHT_DEV_TYPE_SINK
  65097. CORESIGHT_DEV_TYPE_SOURCE
  65098. CORESIGHT_ETM_PMU_NAME
  65099. CORESIGHT_ETM_PMU_SEED
  65100. CORESIGHT_ITCTRL
  65101. CORESIGHT_LAR
  65102. CORESIGHT_LSR
  65103. CORESIGHT_PERIPHIDR0
  65104. CORESIGHT_PERIPHIDR1
  65105. CORESIGHT_PERIPHIDR2
  65106. CORESIGHT_PERIPHIDR3
  65107. CORESIGHT_PERIPHIDR4
  65108. CORESIGHT_PERIPHIDR5
  65109. CORESIGHT_PERIPHIDR6
  65110. CORESIGHT_PERIPHIDR7
  65111. CORESIGHT_SOC_600_ETR_CAPS
  65112. CORESIGHT_TIMEOUT_USEC
  65113. CORESIGHT_UNLOCK
  65114. CORETEMP_NAME_LENGTH
  65115. CORE_1_8V_SUPPORT
  65116. CORE_3_0V_SUPPORT
  65117. CORE_ACT_POL_DATA0
  65118. CORE_ACT_POL_DATA1
  65119. CORE_ACT_POL_DATA2
  65120. CORE_APM_SSB_XFER_0__START_STATUS_XFER_MASK
  65121. CORE_APM_SSB_XFER_0__START_STATUS_XFER__SHIFT
  65122. CORE_APM_SSB_XFER_1__START_STATUS_XFER_MASK
  65123. CORE_APM_SSB_XFER_1__START_STATUS_XFER__SHIFT
  65124. CORE_APM_SSB_XFER_CFG_0__FUSE_APM_LAST_ADDR_MASK
  65125. CORE_APM_SSB_XFER_CFG_0__FUSE_APM_LAST_ADDR__SHIFT
  65126. CORE_APM_SSB_XFER_CFG_1__FUSE_APM_LAST_ADDR_MASK
  65127. CORE_APM_SSB_XFER_CFG_1__FUSE_APM_LAST_ADDR__SHIFT
  65128. CORE_ARLA_VTBL_ADDR
  65129. CORE_ARLA_VTBL_ENTRY
  65130. CORE_ARLA_VTBL_RWCTRL
  65131. CORE_CALIBRATION_DONE
  65132. CORE_CC_REG
  65133. CORE_CDC_ERROR_CODE_MASK
  65134. CORE_CDC_OFFSET_CFG
  65135. CORE_CDC_SLAVE_DDA_CFG
  65136. CORE_CDC_SWITCH_BYPASS_OFF
  65137. CORE_CDC_SWITCH_RC_EN
  65138. CORE_CDC_T4_DLY_SEL
  65139. CORE_CDR_EN
  65140. CORE_CDR_EXT_EN
  65141. CORE_CFP_ACC
  65142. CORE_CFP_CTL_REG
  65143. CORE_CFP_DATA_PORT
  65144. CORE_CFP_DATA_PORT_0
  65145. CORE_CFP_MASK_PORT
  65146. CORE_CFP_MASK_PORT_0
  65147. CORE_CFP_RATE_METER_GLOBAL_CTL
  65148. CORE_CHECKSTOP_FXU_LOGIC
  65149. CORE_CHECKSTOP_IFU_LOGIC
  65150. CORE_CHECKSTOP_IFU_REGFILE
  65151. CORE_CHECKSTOP_ISU_LOGIC
  65152. CORE_CHECKSTOP_ISU_REGFILE
  65153. CORE_CHECKSTOP_LSU_LOGIC
  65154. CORE_CHECKSTOP_LSU_REGFILE
  65155. CORE_CHECKSTOP_PC_AMBI_HANG_DETECTED
  65156. CORE_CHECKSTOP_PC_DEBUG_TRIG_ERR_INJ
  65157. CORE_CHECKSTOP_PC_DURING_RECOV
  65158. CORE_CHECKSTOP_PC_FWD_PROGRESS
  65159. CORE_CHECKSTOP_PC_HANG_RECOV_FAILED
  65160. CORE_CHECKSTOP_PC_HYP_RESOURCE
  65161. CORE_CHECKSTOP_PC_LOGIC
  65162. CORE_CHECKSTOP_PC_RECOV_IN_MAINT_MODE
  65163. CORE_CHECKSTOP_PC_SPRD_HYP_ERR_INJ
  65164. CORE_CHECKSTOP_VSU_LOGIC
  65165. CORE_CK_OUT_EN
  65166. CORE_CLK
  65167. CORE_CLK_CFG
  65168. CORE_CLK_CGC_DIS
  65169. CORE_CLK_DIV_RATIO_MASK
  65170. CORE_CLK_PWRSAVE
  65171. CORE_CLK_SRC_32K
  65172. CORE_CLK_SRC_DPLL
  65173. CORE_CLK_SRC_DPLL_X2
  65174. CORE_CMDIN_RCLK_EN
  65175. CORE_CMD_DAT_TRACK_SEL
  65176. CORE_CODE_CONTAINER
  65177. CORE_CODE_PARTITION
  65178. CORE_CONFIG_CONTAINER
  65179. CORE_CONFIG_PARTITION
  65180. CORE_CSR_CDC_CAL_TIMER_CFG0
  65181. CORE_CSR_CDC_CAL_TIMER_CFG1
  65182. CORE_CSR_CDC_COARSE_CAL_CFG
  65183. CORE_CSR_CDC_CTLR_CFG0
  65184. CORE_CSR_CDC_CTLR_CFG1
  65185. CORE_CSR_CDC_DELAY_CFG
  65186. CORE_CSR_CDC_GEN_CFG
  65187. CORE_CSR_CDC_REFCOUNT_CFG
  65188. CORE_CSR_CDC_STATUS0
  65189. CORE_CTRL_ADDRESS
  65190. CORE_CTRL_CPU_INTR_MASK
  65191. CORE_CTRL_PCIE_REG_31_MASK
  65192. CORE_DB_DATA_AGG_CMD_MASK
  65193. CORE_DB_DATA_AGG_CMD_SHIFT
  65194. CORE_DB_DATA_AGG_VAL_SEL_MASK
  65195. CORE_DB_DATA_AGG_VAL_SEL_SHIFT
  65196. CORE_DB_DATA_BYPASS_EN_MASK
  65197. CORE_DB_DATA_BYPASS_EN_SHIFT
  65198. CORE_DB_DATA_DEST_MASK
  65199. CORE_DB_DATA_DEST_SHIFT
  65200. CORE_DB_DATA_RESERVED_MASK
  65201. CORE_DB_DATA_RESERVED_SHIFT
  65202. CORE_DDR_CAL_EN
  65203. CORE_DDR_DLL_LOCK
  65204. CORE_DEBUG_ACK
  65205. CORE_DEBUG_RESET_BIT
  65206. CORE_DEBUG_RESET_STATUS
  65207. CORE_DEFAULT_1Q_TAG_P
  65208. CORE_DIS_LEARN
  65209. CORE_DLL_CLOCK_DISABLE
  65210. CORE_DLL_EN
  65211. CORE_DLL_LOCK
  65212. CORE_DLL_PDN
  65213. CORE_DLL_RST
  65214. CORE_DRV_TEST_SCATTER_OP
  65215. CORE_DUMP_USE_REGSET
  65216. CORE_DUPSTS
  65217. CORE_DUPSTS_MASK
  65218. CORE_EVENT_RX_QUEUE_FLUSH
  65219. CORE_EVENT_RX_QUEUE_START
  65220. CORE_EVENT_RX_QUEUE_STOP
  65221. CORE_EVENT_TX_QUEUE_START
  65222. CORE_EVENT_TX_QUEUE_STOP
  65223. CORE_EVENT_TX_QUEUE_UPDATE
  65224. CORE_FAST_AGE_CTRL
  65225. CORE_FAST_AGE_PORT
  65226. CORE_FAST_AGE_VID
  65227. CORE_FILE_LIMIT
  65228. CORE_FLL_CYCLE_CNT
  65229. CORE_FREQ_100MHZ
  65230. CORE_FUNC_LATE_SSB_XFER_0__START_STATUS_XFER_MASK
  65231. CORE_FUNC_LATE_SSB_XFER_0__START_STATUS_XFER__SHIFT
  65232. CORE_FUNC_LATE_SSB_XFER_1__START_STATUS_XFER_MASK
  65233. CORE_FUNC_LATE_SSB_XFER_1__START_STATUS_XFER__SHIFT
  65234. CORE_FUNC_LATE_SSB_XFER_CFG_0__FUSE_FUNC_LAST_ADDR_MASK
  65235. CORE_FUNC_LATE_SSB_XFER_CFG_0__FUSE_FUNC_LAST_ADDR__SHIFT
  65236. CORE_FUNC_LATE_SSB_XFER_CFG_0__FUSE_LATE_LAST_ADDR_MASK
  65237. CORE_FUNC_LATE_SSB_XFER_CFG_0__FUSE_LATE_LAST_ADDR__SHIFT
  65238. CORE_FUNC_LATE_SSB_XFER_CFG_1__FUSE_FUNC_LAST_ADDR_MASK
  65239. CORE_FUNC_LATE_SSB_XFER_CFG_1__FUSE_FUNC_LAST_ADDR__SHIFT
  65240. CORE_FUNC_LATE_SSB_XFER_CFG_1__FUSE_LATE_LAST_ADDR_MASK
  65241. CORE_FUNC_LATE_SSB_XFER_CFG_1__FUSE_LATE_LAST_ADDR__SHIFT
  65242. CORE_GMNCFGCFG
  65243. CORE_GSWPLL_GRP1
  65244. CORE_GSWPLL_GRP2
  65245. CORE_G_PCTL_PORT
  65246. CORE_G_PCTL_PORT0
  65247. CORE_H
  65248. CORE_HC_MCLK_SEL_DFLT
  65249. CORE_HC_MCLK_SEL_HS400
  65250. CORE_HC_MCLK_SEL_MASK
  65251. CORE_HC_SELECT_IN_EN
  65252. CORE_HC_SELECT_IN_HS400
  65253. CORE_HC_SELECT_IN_MASK
  65254. CORE_HW_AUTOCAL_ENA
  65255. CORE_ID
  65256. CORE_ID_mskCOREID
  65257. CORE_ID_offCOREID
  65258. CORE_IF_CLK_THRESHOLD_HZ
  65259. CORE_IMP0_PRT_ID
  65260. CORE_IMP_CTL
  65261. CORE_INIT
  65262. CORE_INTR_MASK_CLEAR_REG
  65263. CORE_INTR_MASK_REG
  65264. CORE_INTR_MASK_SET_REG
  65265. CORE_INTR_SRC_CLEAR_REG
  65266. CORE_INTR_SRC_MASKED_REG
  65267. CORE_INTR_SRC_REG
  65268. CORE_INTR_SRC_SET_REG
  65269. CORE_IO_PAD_PWR_SWITCH
  65270. CORE_IO_PAD_PWR_SWITCH_EN
  65271. CORE_IRQ_MTL_RX_OVERFLOW
  65272. CORE_IRQ_RX_PATH_EXIT_LPI_MODE
  65273. CORE_IRQ_RX_PATH_IN_LPI_MODE
  65274. CORE_IRQ_TX_PATH_EXIT_LPI_MODE
  65275. CORE_IRQ_TX_PATH_IN_LPI_MODE
  65276. CORE_JOIN_ALL_VLAN_EN
  65277. CORE_L2C
  65278. CORE_L4_PSEUDO_CSUM_CORRECT_LENGTH
  65279. CORE_L4_PSEUDO_CSUM_ZERO_LENGTH
  65280. CORE_LEVEL
  65281. CORE_LL2_MAX_RAMROD_PER_CON
  65282. CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET
  65283. CORE_LL2_PSTORM_PER_QUEUE_STAT_SIZE
  65284. CORE_LL2_RX_BD_PAGE_SIZE_BYTES
  65285. CORE_LL2_RX_CQE_PAGE_SIZE_BYTES
  65286. CORE_LL2_RX_NUM_NEXT_PAGE_BDS
  65287. CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET
  65288. CORE_LL2_TSTORM_PER_QUEUE_STAT_SIZE
  65289. CORE_LL2_TX_BD_PAGE_SIZE_BYTES
  65290. CORE_LL2_TX_MAX_BDS_PER_PACKET
  65291. CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET
  65292. CORE_LL2_USTORM_PER_QUEUE_STAT_SIZE
  65293. CORE_LNKSTS
  65294. CORE_MAJOR_REV_MASK
  65295. CORE_MAJOR_REV_SHIFT
  65296. CORE_MCI_GENERICS
  65297. CORE_MCI_VERSION
  65298. CORE_MDC_EN
  65299. CORE_MEM_PSM_VDD_CTRL
  65300. CORE_MINOR_REV_MASK
  65301. CORE_MINOR_REV_SHIFT
  65302. CORE_MOD
  65303. CORE_NEW_CTRL
  65304. CORE_PAUSESTS
  65305. CORE_PERI
  65306. CORE_PLL_EN
  65307. CORE_PLL_EN_FROM_RESET
  65308. CORE_PLL_FREQ
  65309. CORE_PLL_GROUP10
  65310. CORE_PLL_GROUP11
  65311. CORE_PLL_GROUP2
  65312. CORE_PLL_GROUP4
  65313. CORE_PLL_GROUP5
  65314. CORE_PLL_GROUP6
  65315. CORE_PLL_GROUP7
  65316. CORE_PLL_M
  65317. CORE_PLL_MODE_CONFIG_REG
  65318. CORE_PLL_MODE_REG_0_7
  65319. CORE_PLL_MODE_REG_8_15
  65320. CORE_PLL_N
  65321. CORE_PLL_P
  65322. CORE_PORT_TC2_QOS_MAP_PORT
  65323. CORE_PORT_VLAN_CTL_PORT
  65324. CORE_POWER
  65325. CORE_PWRCTL_BUS_OFF
  65326. CORE_PWRCTL_BUS_ON
  65327. CORE_PWRCTL_BUS_SUCCESS
  65328. CORE_PWRCTL_IO_HIGH
  65329. CORE_PWRCTL_IO_LOW
  65330. CORE_PWRCTL_IO_SUCCESS
  65331. CORE_PWRD_UP
  65332. CORE_PWRSAVE_DLL
  65333. CORE_PWR_CTRL_MASK
  65334. CORE_PWR_CTRL_SHIFT
  65335. CORE_RAMROD_RX_QUEUE_FLUSH
  65336. CORE_RAMROD_RX_QUEUE_START
  65337. CORE_RAMROD_RX_QUEUE_STOP
  65338. CORE_RAMROD_TX_QUEUE_START
  65339. CORE_RAMROD_TX_QUEUE_STOP
  65340. CORE_RAMROD_TX_QUEUE_UPDATE
  65341. CORE_RAMROD_UNUSED
  65342. CORE_RATE_METER0
  65343. CORE_RATE_METER1
  65344. CORE_RATE_METER2
  65345. CORE_RATE_METER3
  65346. CORE_RATE_METER4
  65347. CORE_RATE_METER5
  65348. CORE_RATE_METER6
  65349. CORE_READY_STATUS
  65350. CORE_REDUN_SSB_XFER_0__START_STATUS_XFER_MASK
  65351. CORE_REDUN_SSB_XFER_0__START_STATUS_XFER__SHIFT
  65352. CORE_REDUN_SSB_XFER_1__START_STATUS_XFER_MASK
  65353. CORE_REDUN_SSB_XFER_1__START_STATUS_XFER__SHIFT
  65354. CORE_REDUN_SSB_XFER_CFG_0__FUSE_REDUN_LAST_ADDR_MASK
  65355. CORE_REDUN_SSB_XFER_CFG_0__FUSE_REDUN_LAST_ADDR__SHIFT
  65356. CORE_REDUN_SSB_XFER_CFG_1__FUSE_REDUN_LAST_ADDR_MASK
  65357. CORE_REDUN_SSB_XFER_CFG_1__FUSE_REDUN_LAST_ADDR__SHIFT
  65358. CORE_REF_CLK_SOURCE
  65359. CORE_REG
  65360. CORE_RESET
  65361. CORE_RESET_BIT
  65362. CORE_RESET_MUX
  65363. CORE_RESET_STATUS
  65364. CORE_ROCE
  65365. CORE_RROCE
  65366. CORE_RST
  65367. CORE_RST_MIB_CNT_EN
  65368. CORE_RST_PROTECT
  65369. CORE_RX_ACTION_ON_ERROR_NO_BUFF_MASK
  65370. CORE_RX_ACTION_ON_ERROR_NO_BUFF_SHIFT
  65371. CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_MASK
  65372. CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_SHIFT
  65373. CORE_RX_ACTION_ON_ERROR_RESERVED_MASK
  65374. CORE_RX_ACTION_ON_ERROR_RESERVED_SHIFT
  65375. CORE_RX_CQE_ILLEGAL_TYPE
  65376. CORE_RX_CQE_TYPE_GSI_OFFLOAD
  65377. CORE_RX_CQE_TYPE_REGULAR
  65378. CORE_RX_CQE_TYPE_SLOW_PATH
  65379. CORE_RX_FIFO_FLUSH
  65380. CORE_SB
  65381. CORE_SEG_NUM
  65382. CORE_SEND_JAM
  65383. CORE_SFT_LRN_CTRL
  65384. CORE_SIB_FMT
  65385. CORE_SPDSTS
  65386. CORE_SPQE_PAGE_SIZE_BYTES
  65387. CORE_SRAM
  65388. CORE_SRAM_SIZE
  65389. CORE_START_CDC_TRAFFIC
  65390. CORE_START_REG
  65391. CORE_STAT_GREEN_CNTR
  65392. CORE_STAT_RED_CNTR
  65393. CORE_STAT_YELLOW_CNTR
  65394. CORE_STEP_REV_MASK
  65395. CORE_STEP_REV_SHIFT
  65396. CORE_STR
  65397. CORE_STS_OVERRIDE_GMIIP2_PORT
  65398. CORE_STS_OVERRIDE_GMIIP_PORT
  65399. CORE_STS_OVERRIDE_IMP
  65400. CORE_STS_OVERRIDE_IMP2
  65401. CORE_SWITCH_CTRL
  65402. CORE_SWMODE
  65403. CORE_SW_RST
  65404. CORE_SW_TRIG_FULL_CALIB
  65405. CORE_TB_RESYNC_REQ_BIT
  65406. CORE_TIMER_ENA
  65407. CORE_TRGMII_GSW_CLK_CG
  65408. CORE_TXQ_THD_PAUSE_QN_PORT
  65409. CORE_TXQ_THD_PAUSE_QN_PORT_0
  65410. CORE_TX_BD_DATA_DISABLE_STAG_INSERTION_MASK
  65411. CORE_TX_BD_DATA_DISABLE_STAG_INSERTION_SHIFT
  65412. CORE_TX_BD_DATA_FORCE_VLAN_MODE_MASK
  65413. CORE_TX_BD_DATA_FORCE_VLAN_MODE_SHIFT
  65414. CORE_TX_BD_DATA_IPV6_EXT_MASK
  65415. CORE_TX_BD_DATA_IPV6_EXT_SHIFT
  65416. CORE_TX_BD_DATA_IP_CSUM_MASK
  65417. CORE_TX_BD_DATA_IP_CSUM_SHIFT
  65418. CORE_TX_BD_DATA_IP_LEN_MASK
  65419. CORE_TX_BD_DATA_IP_LEN_SHIFT
  65420. CORE_TX_BD_DATA_L4_CSUM_MASK
  65421. CORE_TX_BD_DATA_L4_CSUM_SHIFT
  65422. CORE_TX_BD_DATA_L4_PROTOCOL_MASK
  65423. CORE_TX_BD_DATA_L4_PROTOCOL_SHIFT
  65424. CORE_TX_BD_DATA_L4_PSEUDO_CSUM_MODE_MASK
  65425. CORE_TX_BD_DATA_L4_PSEUDO_CSUM_MODE_SHIFT
  65426. CORE_TX_BD_DATA_NBDS_MASK
  65427. CORE_TX_BD_DATA_NBDS_SHIFT
  65428. CORE_TX_BD_DATA_RESERVED0_MASK
  65429. CORE_TX_BD_DATA_RESERVED0_SHIFT
  65430. CORE_TX_BD_DATA_ROCE_FLAV_MASK
  65431. CORE_TX_BD_DATA_ROCE_FLAV_SHIFT
  65432. CORE_TX_BD_DATA_START_BD_MASK
  65433. CORE_TX_BD_DATA_START_BD_SHIFT
  65434. CORE_TX_BD_DATA_VLAN_INSERTION_MASK
  65435. CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT
  65436. CORE_TX_BD_L4_HDR_OFFSET_W_MASK
  65437. CORE_TX_BD_L4_HDR_OFFSET_W_SHIFT
  65438. CORE_TX_BD_TX_DST_MASK
  65439. CORE_TX_BD_TX_DST_SHIFT
  65440. CORE_TX_DEST_DROP
  65441. CORE_TX_DEST_LB
  65442. CORE_TX_DEST_NW
  65443. CORE_TX_DEST_RESERVED
  65444. CORE_TX_FIFO_FLUSH
  65445. CORE_TYPE
  65446. CORE_UDF_0_A_0_8_PORT_0
  65447. CORE_UDF_0_B_0_8_PORT_0
  65448. CORE_UDF_0_D_0_11_PORT_0
  65449. CORE_UNINIT
  65450. CORE_VENDOR_SPEC_POR_VAL
  65451. CORE_VERSION_MAJOR_MASK
  65452. CORE_VERSION_MAJOR_SHIFT
  65453. CORE_VERSION_MINOR_MASK
  65454. CORE_VOLT_SUPPORT
  65455. CORE_WATCHDOG_CTRL
  65456. CORE_WFE_STATUS
  65457. CORE_WFI_STATUS
  65458. CORGIBL_BATTLOW
  65459. CORGIBL_SUSPENDED
  65460. CORGI_AUDIO_CLOCK
  65461. CORGI_GAFR_ALL_STROBE_BIT
  65462. CORGI_GAFR_HIGH_SENSE_BIT
  65463. CORGI_GAFR_LOW_SENSE_BIT
  65464. CORGI_GPIO_AC_IN
  65465. CORGI_GPIO_ADC_TEMP_ON
  65466. CORGI_GPIO_ADS7846_CS
  65467. CORGI_GPIO_AKIN_PULLUP
  65468. CORGI_GPIO_AK_INT
  65469. CORGI_GPIO_ALL_STROBE_BIT
  65470. CORGI_GPIO_APM_ON
  65471. CORGI_GPIO_BACKLIGHT_CONT
  65472. CORGI_GPIO_BAT_COVER
  65473. CORGI_GPIO_CF_CD
  65474. CORGI_GPIO_CF_IRQ
  65475. CORGI_GPIO_CHRG_FULL
  65476. CORGI_GPIO_CHRG_ON
  65477. CORGI_GPIO_CHRG_UKN
  65478. CORGI_GPIO_DISCHARGE_ON
  65479. CORGI_GPIO_HIGH_SENSE_BIT
  65480. CORGI_GPIO_HIGH_SENSE_RSHIFT
  65481. CORGI_GPIO_HSYNC
  65482. CORGI_GPIO_IR_ON
  65483. CORGI_GPIO_KEY_INT
  65484. CORGI_GPIO_KEY_SENSE
  65485. CORGI_GPIO_KEY_STROBE
  65486. CORGI_GPIO_LCDCON_CS
  65487. CORGI_GPIO_LED_GREEN
  65488. CORGI_GPIO_LED_ORANGE
  65489. CORGI_GPIO_LOW_SENSE_BIT
  65490. CORGI_GPIO_LOW_SENSE_LSHIFT
  65491. CORGI_GPIO_MAIN_BAT_LOW
  65492. CORGI_GPIO_MAX1111_CS
  65493. CORGI_GPIO_MIC_BIAS
  65494. CORGI_GPIO_MUTE_L
  65495. CORGI_GPIO_MUTE_R
  65496. CORGI_GPIO_SD_PWR
  65497. CORGI_GPIO_SENSE_BIT
  65498. CORGI_GPIO_STROBE_BIT
  65499. CORGI_GPIO_SWA
  65500. CORGI_GPIO_SWB
  65501. CORGI_GPIO_TP_INT
  65502. CORGI_GPIO_USB_PULLUP
  65503. CORGI_GPIO_WAKEUP
  65504. CORGI_GPIO_nSD_DETECT
  65505. CORGI_GPIO_nSD_INT
  65506. CORGI_GPIO_nSD_WP
  65507. CORGI_HEADSET
  65508. CORGI_HP
  65509. CORGI_HP_OFF
  65510. CORGI_IRQ_GPIO_AC_IN
  65511. CORGI_IRQ_GPIO_AK_INT
  65512. CORGI_IRQ_GPIO_CF_CD
  65513. CORGI_IRQ_GPIO_CF_IRQ
  65514. CORGI_IRQ_GPIO_CHRG_FULL
  65515. CORGI_IRQ_GPIO_KEY_INT
  65516. CORGI_IRQ_GPIO_KEY_SENSE
  65517. CORGI_IRQ_GPIO_MAIN_BAT_LOW
  65518. CORGI_IRQ_GPIO_TP_INT
  65519. CORGI_IRQ_GPIO_WAKEUP
  65520. CORGI_IRQ_GPIO_nSD_DETECT
  65521. CORGI_IRQ_GPIO_nSD_INT
  65522. CORGI_KEY_ADDRESS
  65523. CORGI_KEY_CALENDER
  65524. CORGI_KEY_CANCEL
  65525. CORGI_KEY_EXCANCEL
  65526. CORGI_KEY_EXJOGDOWN
  65527. CORGI_KEY_EXJOGUP
  65528. CORGI_KEY_EXOK
  65529. CORGI_KEY_FN
  65530. CORGI_KEY_JAP1
  65531. CORGI_KEY_JAP2
  65532. CORGI_KEY_MAIL
  65533. CORGI_KEY_MENU
  65534. CORGI_KEY_OFF
  65535. CORGI_KEY_OK
  65536. CORGI_KEY_SENSE_NUM
  65537. CORGI_KEY_STROBE_NUM
  65538. CORGI_LCD_MODE_QVGA
  65539. CORGI_LCD_MODE_VGA
  65540. CORGI_LINE
  65541. CORGI_MIC
  65542. CORGI_SCOOP_GPIO_BASE
  65543. CORGI_SCOOP_IO_DIR
  65544. CORGI_SCOOP_IO_OUT
  65545. CORGI_SCP_AKIN_PULLUP
  65546. CORGI_SCP_APM_ON
  65547. CORGI_SCP_BACKLIGHT_CONT
  65548. CORGI_SCP_LED_GREEN
  65549. CORGI_SCP_MIC_BIAS
  65550. CORGI_SCP_MUTE_L
  65551. CORGI_SCP_MUTE_R
  65552. CORGI_SCP_SWA
  65553. CORGI_SCP_SWB
  65554. CORGI_SPK_OFF
  65555. CORGI_SPK_ON
  65556. CORING
  65557. CORING1
  65558. CORING2
  65559. CORKSCREW
  65560. CORKSCREW_ID
  65561. CORKSCREW_TOTAL_SIZE
  65562. CORRECT_STAT_BANDWIDTH
  65563. CORRECT_STAT_RSSI
  65564. CORRECT_STAT_TRANSMISSON_MODE
  65565. CORRELABS
  65566. CORRELEXP
  65567. CORRELMANT
  65568. CORR_BUFFER
  65569. CORSAIR_USAGE_LIGHT
  65570. CORSAIR_USAGE_LIGHT_BRIGHT
  65571. CORSAIR_USAGE_LIGHT_DIM
  65572. CORSAIR_USAGE_LIGHT_MAX
  65573. CORSAIR_USAGE_LIGHT_MEDIUM
  65574. CORSAIR_USAGE_LIGHT_OFF
  65575. CORSAIR_USAGE_M1
  65576. CORSAIR_USAGE_M2
  65577. CORSAIR_USAGE_M3
  65578. CORSAIR_USAGE_MACRO_RECORD_START
  65579. CORSAIR_USAGE_MACRO_RECORD_STOP
  65580. CORSAIR_USAGE_META_OFF
  65581. CORSAIR_USAGE_META_ON
  65582. CORSAIR_USAGE_PROFILE
  65583. CORSAIR_USAGE_PROFILE_MAX
  65584. CORSAIR_USAGE_SPECIAL_MAX
  65585. CORSAIR_USAGE_SPECIAL_MIN
  65586. CORSAIR_USE_K90_BACKLIGHT
  65587. CORSAIR_USE_K90_MACRO
  65588. CORTEX_A9_SCU_SIZE
  65589. COR_ADDR_DECODE
  65590. COR_CONFIG_MASK
  65591. COR_CONFIG_NUM
  65592. COR_DEFAULT
  65593. COR_ENABLE_FUNC
  65594. COR_ERR_INTR_A
  65595. COR_ERR_INTR_B
  65596. COR_FUNC_ENA
  65597. COR_IREQ_ENA
  65598. COR_LEVEL_IRQ
  65599. COR_LEVEL_REQ
  65600. COR_LEVLREQ
  65601. COR_MFC_CONFIG_MASK
  65602. COR_OFFSET
  65603. COR_RESET
  65604. COR_SOFT_RESET
  65605. COR_SRESET
  65606. COR_STATUS
  65607. COR_VALUE
  65608. COSAIOBMGET
  65609. COSAIOBMSET
  65610. COSAIODOWNLD
  65611. COSAIONRCARDS
  65612. COSAIONRCHANS
  65613. COSAIORIDSTR
  65614. COSAIORMEM
  65615. COSAIORSET
  65616. COSAIORTYPE
  65617. COSAIOSTRT
  65618. COSA_BM_OFF
  65619. COSA_BM_ON
  65620. COSA_FW_DOWNLOAD
  65621. COSA_FW_RESET
  65622. COSA_FW_START
  65623. COSA_H__
  65624. COSA_LOAD_ADDR
  65625. COSA_MAX_FIRMWARE_SIZE
  65626. COSA_MAX_ID_STRING
  65627. COSA_MAX_NAME
  65628. COSA_MTU
  65629. COSA_SLOW_IO
  65630. COSMISC_CONSTANT
  65631. COSM_HEARTBEAT_CHECK_DELTA_SEC
  65632. COSM_HEARTBEAT_SEND_MSEC
  65633. COSM_HEARTBEAT_SEND_SEC
  65634. COSM_HEARTBEAT_TIMEOUT_MSEC
  65635. COSM_HEARTBEAT_TIMEOUT_SEC
  65636. COSM_MSG_HEARTBEAT
  65637. COSM_MSG_SHUTDOWN
  65638. COSM_MSG_SHUTDOWN_STATUS
  65639. COSM_MSG_SYNC_TIME
  65640. COSM_SCIF_BACKLOG
  65641. COSM_SCIF_MAX_RETRIES
  65642. COST_CTRL
  65643. COST_MODEL
  65644. COS_0
  65645. COS_CODE
  65646. COS_DFLT_CQ1
  65647. COS_DFLT_CQ2
  65648. COS_MASK
  65649. COUGAR_FIELD_ACTION
  65650. COUGAR_FIELD_CODE
  65651. COUGAR_KEY_FN
  65652. COUGAR_KEY_G1
  65653. COUGAR_KEY_G2
  65654. COUGAR_KEY_G3
  65655. COUGAR_KEY_G4
  65656. COUGAR_KEY_G5
  65657. COUGAR_KEY_G6
  65658. COUGAR_KEY_LEDS
  65659. COUGAR_KEY_LOCK
  65660. COUGAR_KEY_M1
  65661. COUGAR_KEY_M2
  65662. COUGAR_KEY_M3
  65663. COUGAR_KEY_MR
  65664. COUGAR_VENDOR_USAGE
  65665. COUNT
  65666. COUNTER
  65667. COUNTER1_MASK
  65668. COUNTER1_SHIFT
  65669. COUNTER2_MASK
  65670. COUNTER2_SHIFT
  65671. COUNTER77
  65672. COUNTER78
  65673. COUNTERS_PER_BLOCK
  65674. COUNTERS_SIZE
  65675. COUNTER_1
  65676. COUNTER_2
  65677. COUNTER_A_BASE_REG
  65678. COUNTER_BASE
  65679. COUNTER_BITS
  65680. COUNTER_BIT_SHIFT
  65681. COUNTER_BYTE_SHIFT
  65682. COUNTER_B_BASE_REG
  65683. COUNTER_CNTL
  65684. COUNTER_COUNT
  65685. COUNTER_COUNT_DIRECTION_BACKWARD
  65686. COUNTER_COUNT_DIRECTION_FORWARD
  65687. COUNTER_COUNT_ENUM
  65688. COUNTER_COUNT_ENUM_AVAILABLE
  65689. COUNTER_COUNT_FUNCTION_DECREASE
  65690. COUNTER_COUNT_FUNCTION_INCREASE
  65691. COUNTER_COUNT_FUNCTION_PULSE_DIRECTION
  65692. COUNTER_COUNT_FUNCTION_QUADRATURE_X1_A
  65693. COUNTER_COUNT_FUNCTION_QUADRATURE_X1_B
  65694. COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A
  65695. COUNTER_COUNT_FUNCTION_QUADRATURE_X2_B
  65696. COUNTER_COUNT_FUNCTION_QUADRATURE_X4
  65697. COUNTER_COUNT_MODE_MODULO_N
  65698. COUNTER_COUNT_MODE_NON_RECYCLE
  65699. COUNTER_COUNT_MODE_NORMAL
  65700. COUNTER_COUNT_MODE_RANGE_LIMIT
  65701. COUNTER_COUNT_POSITION
  65702. COUNTER_CYCLES
  65703. COUNTER_DEVICE_ENUM
  65704. COUNTER_DEVICE_ENUM_AVAILABLE
  65705. COUNTER_DPCR1
  65706. COUNTER_INFO_VERSION_CURRENT
  65707. COUNTER_INT_STATUS_ADDRESS
  65708. COUNTER_INT_STATUS_COUNTER
  65709. COUNTER_INT_STATUS_COUNTER_S
  65710. COUNTER_INT_STATUS_ENABLE_ADDRESS
  65711. COUNTER_INT_STATUS_ENABLE_BIT
  65712. COUNTER_INT_STATUS_ENABLE_BIT_LSB
  65713. COUNTER_INT_STATUS_ENABLE_BIT_MASK
  65714. COUNTER_INT_STATUS_ENABLE_BIT_S
  65715. COUNTER_ITEMS
  65716. COUNTER_MASK
  65717. COUNTER_MASK0_9
  65718. COUNTER_MAX
  65719. COUNTER_OFFSET
  65720. COUNTER_OVERFLOW
  65721. COUNTER_READ
  65722. COUNTER_REG
  65723. COUNTER_RING_0
  65724. COUNTER_RING_1
  65725. COUNTER_RING_SPLIT
  65726. COUNTER_SECONDS
  65727. COUNTER_SHIFT
  65728. COUNTER_SIGNAL_ENUM
  65729. COUNTER_SIGNAL_ENUM_AVAILABLE
  65730. COUNTER_SIGNAL_LEVEL
  65731. COUNTER_SIGNAL_LEVEL_HIGH
  65732. COUNTER_SIGNAL_LEVEL_LOW
  65733. COUNTER_SYNAPSE_ACTION_BOTH_EDGES
  65734. COUNTER_SYNAPSE_ACTION_FALLING_EDGE
  65735. COUNTER_SYNAPSE_ACTION_NONE
  65736. COUNTER_SYNAPSE_ACTION_RISING_EDGE
  65737. COUNTER_USEC
  65738. COUNTER_WRAP_12_BIT
  65739. COUNTER_WRAP_16_BIT
  65740. COUNTON
  65741. COUNTPAUSEMCRX_F
  65742. COUNTPAUSEMCRX_S
  65743. COUNTPAUSEMCRX_V
  65744. COUNTPAUSEMCTX_F
  65745. COUNTPAUSEMCTX_S
  65746. COUNTPAUSEMCTX_V
  65747. COUNTPAUSESTATRX_F
  65748. COUNTPAUSESTATRX_S
  65749. COUNTPAUSESTATRX_V
  65750. COUNTPAUSESTATTX_F
  65751. COUNTPAUSESTATTX_S
  65752. COUNTPAUSESTATTX_V
  65753. COUNTRY_CHPLAN_ENT
  65754. COUNTRY_CODE_ETSI
  65755. COUNTRY_CODE_FCC
  65756. COUNTRY_CODE_FRANCE
  65757. COUNTRY_CODE_GLOBAL_DOMAIN
  65758. COUNTRY_CODE_IC
  65759. COUNTRY_CODE_ISRAEL
  65760. COUNTRY_CODE_MAX
  65761. COUNTRY_CODE_MIC
  65762. COUNTRY_CODE_MKK
  65763. COUNTRY_CODE_MKK1
  65764. COUNTRY_CODE_SPAIN
  65765. COUNTRY_CODE_TELEC
  65766. COUNTRY_CODE_TELEC_NETGEAR
  65767. COUNTRY_CODE_USER
  65768. COUNTRY_CODE_WORLD_WIDE_13
  65769. COUNTRY_CODE_WORLD_WIDE_13_5G_ALL
  65770. COUNTRY_ERD_FLAG
  65771. COUNTS_PER_SEC
  65772. COUNT_ADDRESS
  65773. COUNT_ARGS
  65774. COUNT_BITS
  65775. COUNT_CACHE_FLUSH_HW
  65776. COUNT_CACHE_FLUSH_NONE
  65777. COUNT_CACHE_FLUSH_SW
  65778. COUNT_CONTINUED
  65779. COUNT_DEC_ADDRESS
  65780. COUNT_ENAB
  65781. COUNT_ERROR
  65782. COUNT_EXPIRED
  65783. COUNT_FOR_FULL_EXPIRATION
  65784. COUNT_GPE
  65785. COUNT_ISN_BPS
  65786. COUNT_LEADING_ZEROS_0
  65787. COUNT_MASK
  65788. COUNT_MAX
  65789. COUNT_RD_AHEAD
  65790. COUNT_SCI
  65791. COUNT_SCI_NOT
  65792. COUNT_SIZE
  65793. COUNT_TRAILING_ZEROS_0
  65794. COUNT_WPS
  65795. COUPLING_FLAG
  65796. COVER
  65797. COVERAGE_ANY_REG
  65798. COVERAGE_PC
  65799. COVERAGE_PCWB
  65800. COVERAGE_SP
  65801. COW_BITMAP
  65802. COW_CNODE
  65803. COW_MAGIC
  65804. COW_VERSION
  65805. COW_ZNODE
  65806. COYOTE_IDE_BASE_PHYS
  65807. COYOTE_IDE_BASE_VIRT
  65808. COYOTE_IDE_CTRL_PORT
  65809. COYOTE_IDE_DATA_PORT
  65810. COYOTE_IDE_ERROR_PORT
  65811. COYOTE_IDE_REGION_SIZE
  65812. CO_BUF
  65813. CO_CMD_H_BGSRCMAP
  65814. CO_CMD_H_BLITTER
  65815. CO_CMD_H_FGSRCMAP
  65816. CO_CMD_L_INC_LEFT
  65817. CO_CMD_L_INC_UP
  65818. CO_CMD_L_PATTERN_FGCOL
  65819. CO_CTRL_BUSY
  65820. CO_CTRL_CMDFULL
  65821. CO_CTRL_FIFOEMPTY
  65822. CO_CTRL_READY
  65823. CO_FG_MIX_DST
  65824. CO_FG_MIX_NDST
  65825. CO_FG_MIX_NSRC
  65826. CO_FG_MIX_NSRC_AND_DST
  65827. CO_FG_MIX_NSRC_AND_NDST
  65828. CO_FG_MIX_NSRC_OR_DST
  65829. CO_FG_MIX_NSRC_OR_NDST
  65830. CO_FG_MIX_ONES
  65831. CO_FG_MIX_SRC
  65832. CO_FG_MIX_SRC_AND_DST
  65833. CO_FG_MIX_SRC_AND_NDST
  65834. CO_FG_MIX_SRC_OR_DST
  65835. CO_FG_MIX_SRC_OR_NDST
  65836. CO_FG_MIX_SRC_XOR_DST
  65837. CO_FG_MIX_SRC_XOR_NDST
  65838. CO_FG_MIX_ZERO
  65839. CO_PIXFMT_16BPP
  65840. CO_PIXFMT_24BPP
  65841. CO_PIXFMT_32BPP
  65842. CO_PIXFMT_8BPP
  65843. CO_QPHY_SEL
  65844. CO_REG_BGCOLOUR
  65845. CO_REG_CMD_H
  65846. CO_REG_CMD_L
  65847. CO_REG_CONTROL
  65848. CO_REG_DEST_PTR
  65849. CO_REG_DEST_WIDTH
  65850. CO_REG_FGCOLOUR
  65851. CO_REG_FGMIX
  65852. CO_REG_PIXFMT
  65853. CO_REG_PIXHEIGHT
  65854. CO_REG_PIXWIDTH
  65855. CO_REG_SRC1_PTR
  65856. CO_REG_SRC2_PTR
  65857. CO_REG_SRC_WIDTH
  65858. CO_REG_X_PHASE
  65859. CP
  65860. CP0
  65861. CP0_BADINSTR
  65862. CP0_BADVADDR
  65863. CP0_BRCM_CONFIG0
  65864. CP0_BRCM_CONFIG0_CWF_MASK
  65865. CP0_BRCM_CONFIG0_TSE_MASK
  65866. CP0_BRCM_MODE
  65867. CP0_BRCM_MODE_BrHIST_MASK
  65868. CP0_BRCM_MODE_BrHIST_SHIFT
  65869. CP0_BRCM_MODE_BrPRED_MASK
  65870. CP0_BRCM_MODE_BrPRED_SHIFT
  65871. CP0_BRCM_MODE_ClkRATIO_MASK
  65872. CP0_BRCM_MODE_Luc_MASK
  65873. CP0_BRCM_MODE_SET_MASK
  65874. CP0_CACHEERR
  65875. CP0_CALG
  65876. CP0_CAUSE
  65877. CP0_CERRD_CAUSES
  65878. CP0_CERRD_COHERENCY
  65879. CP0_CERRD_DATA
  65880. CP0_CERRD_DATA_DBE
  65881. CP0_CERRD_DATA_SBE
  65882. CP0_CERRD_DPA_VALID
  65883. CP0_CERRD_DUPTAG
  65884. CP0_CERRD_EXTERNAL
  65885. CP0_CERRD_FILLWB
  65886. CP0_CERRD_IDX_VALID
  65887. CP0_CERRD_LOAD
  65888. CP0_CERRD_MULTIPLE
  65889. CP0_CERRD_STORE
  65890. CP0_CERRD_TAG_ADDRESS
  65891. CP0_CERRD_TAG_STATE
  65892. CP0_CERRD_TYPES
  65893. CP0_CERRI_DATA
  65894. CP0_CERRI_DATA_PARITY
  65895. CP0_CERRI_EXTERNAL
  65896. CP0_CERRI_IDX_VALID
  65897. CP0_CERRI_TAG_PARITY
  65898. CP0_CMGCRBASE
  65899. CP0_COMPARE
  65900. CP0_CONF
  65901. CP0_CONFIG
  65902. CP0_CONFIG3
  65903. CP0_CONFIG5
  65904. CP0_CONFIG6
  65905. CP0_CONFIG_K0_MASK
  65906. CP0_CONTEXT
  65907. CP0_COUNT
  65908. CP0_CVMCTL_REG
  65909. CP0_CVMMEMCTL_REG
  65910. CP0_DBASE
  65911. CP0_DBOUND
  65912. CP0_DCACHE_ERR_REG
  65913. CP0_DCACHE_TAG_HI
  65914. CP0_DCACHE_TAG_LO
  65915. CP0_DEBUG
  65916. CP0_DEPC
  65917. CP0_DESAVE
  65918. CP0_DIAGNOSTIC
  65919. CP0_DWATCH
  65920. CP0_D_SEC_CACHE_DATA_LO
  65921. CP0_EBASE
  65922. CP0_ECC
  65923. CP0_ENTRYHI
  65924. CP0_ENTRYLO0
  65925. CP0_ENTRYLO1
  65926. CP0_EPC
  65927. CP0_ERRCTL_DCACHE
  65928. CP0_ERRCTL_ICACHE
  65929. CP0_ERRCTL_MC_TIMEOUT
  65930. CP0_ERRCTL_MC_TLB
  65931. CP0_ERRCTL_MULTIBUS
  65932. CP0_ERRCTL_RECOVERABLE
  65933. CP0_ERROREPC
  65934. CP0_FRAMEMASK
  65935. CP0_GLOBALNUMBER
  65936. CP0_GTOFFSET
  65937. CP0_GUESTCTL0
  65938. CP0_GUESTCTL0EXT
  65939. CP0_GUESTCTL1
  65940. CP0_GUESTCTL2
  65941. CP0_GUESTCTL3
  65942. CP0_HWRENA
  65943. CP0_IBASE
  65944. CP0_IBOUND
  65945. CP0_ICACHE_DATA_HI
  65946. CP0_ICACHE_DATA_LO
  65947. CP0_ICACHE_TAG_HI
  65948. CP0_ICACHE_TAG_LO
  65949. CP0_INDEX
  65950. CP0_INFO
  65951. CP0_IWATCH
  65952. CP0_LEGACY_COMPARE_IRQ
  65953. CP0_LEGACY_PERFCNT_IRQ
  65954. CP0_LLADDR
  65955. CP0_MVPCONF0
  65956. CP0_MVPCONF1
  65957. CP0_MVPCONTROL
  65958. CP0_PAGEGRAIN
  65959. CP0_PAGEMASK
  65960. CP0_PERFORMANCE
  65961. CP0_PRID
  65962. CP0_PRID_OCTEON_CN30XX
  65963. CP0_PRID_OCTEON_PASS1
  65964. CP0_PRID_REG
  65965. CP0_RANDOM
  65966. CP0_S1_DERRADDR0
  65967. CP0_S1_DERRADDR1
  65968. CP0_S1_INTCONTROL
  65969. CP0_S2_SRSCTL
  65970. CP0_S3_SRSMAP
  65971. CP0_SEGCTL0
  65972. CP0_SEGCTL1
  65973. CP0_SEGCTL2
  65974. CP0_SRSCONF0
  65975. CP0_SRSCONF1
  65976. CP0_SRSCONF2
  65977. CP0_SRSCONF3
  65978. CP0_SRSCONF4
  65979. CP0_STATUS
  65980. CP0_TAGHI
  65981. CP0_TAGLO
  65982. CP0_TCBIND
  65983. CP0_TCCONTEXT
  65984. CP0_TCHALT
  65985. CP0_TCRESTART
  65986. CP0_TCSCHEDULE
  65987. CP0_TCSCHEFBK
  65988. CP0_TCSTATUS
  65989. CP0_TX39_CACHE
  65990. CP0_VPECONF0
  65991. CP0_VPECONF1
  65992. CP0_VPECONTROL
  65993. CP0_VPESCHEDULE
  65994. CP0_VPESCHEFBK
  65995. CP0_WATCHHI
  65996. CP0_WATCHLO
  65997. CP0_WIRED
  65998. CP0_XCONTEXT
  65999. CP0_YQMASK
  66000. CP1
  66001. CP110_CLK_NUM
  66002. CP110_CLK_TYPE_CORE
  66003. CP110_CLK_TYPE_GATABLE
  66004. CP110_CORE_CORE
  66005. CP110_CORE_NAND
  66006. CP110_CORE_PLL0
  66007. CP110_CORE_PPV2
  66008. CP110_CORE_SDIO
  66009. CP110_CORE_X2CORE
  66010. CP110_GATE_AUDIO
  66011. CP110_GATE_COMM_UNIT
  66012. CP110_GATE_EIP150
  66013. CP110_GATE_EIP197
  66014. CP110_GATE_GOP_DP
  66015. CP110_GATE_MAIN
  66016. CP110_GATE_MG
  66017. CP110_GATE_MG_CORE
  66018. CP110_GATE_NAND
  66019. CP110_GATE_PCIE_X1_0
  66020. CP110_GATE_PCIE_X1_1
  66021. CP110_GATE_PCIE_X4
  66022. CP110_GATE_PCIE_XOR
  66023. CP110_GATE_PPV2
  66024. CP110_GATE_SATA
  66025. CP110_GATE_SATA_USB
  66026. CP110_GATE_SDIO
  66027. CP110_GATE_SDMMC_GOP
  66028. CP110_GATE_SLOW_IO
  66029. CP110_GATE_USB3DEV
  66030. CP110_GATE_USB3H0
  66031. CP110_GATE_USB3H1
  66032. CP110_GATE_XOR0
  66033. CP110_GATE_XOR1
  66034. CP110_MAX_CORE_CLOCKS
  66035. CP110_MAX_GATABLE_CLOCKS
  66036. CP110_NAND_FLASH_CLK_CTRL_REG
  66037. CP110_PM_CLOCK_GATING_REG
  66038. CP15R0_PRODREV_MASK
  66039. CP15R0_PROD_MASK
  66040. CP15R0_REV_MASK
  66041. CP15R0_VENDOR_MASK
  66042. CP15R0_XSCALE_VALUE
  66043. CP1TR
  66044. CP1_000R
  66045. CP1_255R
  66046. CP1_FCCR
  66047. CP1_FENR
  66048. CP1_FEXR
  66049. CP1_REVISION
  66050. CP1_SIZE
  66051. CP1_STATUS
  66052. CP1_UFR
  66053. CP1_UNFR
  66054. CP2
  66055. CP204J_KeyCode
  66056. CP2104_GPIO0_TXLED_MODE
  66057. CP2104_GPIO1_RXLED_MODE
  66058. CP2104_GPIO2_RS485_MODE
  66059. CP2105_GPIO0_TXLED_MODE
  66060. CP2105_GPIO1_RS485_MODE
  66061. CP2105_GPIO1_RXLED_MODE
  66062. CP210X_2NCONFIG_CONFIG_VERSION_IDX
  66063. CP210X_2NCONFIG_GPIO_CONTROL_IDX
  66064. CP210X_2NCONFIG_GPIO_MODE_IDX
  66065. CP210X_2NCONFIG_GPIO_RSTLATCH_IDX
  66066. CP210X_ECI_GPIO_MODE_MASK
  66067. CP210X_ECI_GPIO_MODE_OFFSET
  66068. CP210X_EMBED_EVENTS
  66069. CP210X_GET_BAUDDIV
  66070. CP210X_GET_BAUDRATE
  66071. CP210X_GET_CHARS
  66072. CP210X_GET_COMM_STATUS
  66073. CP210X_GET_DEVICEMODE
  66074. CP210X_GET_EVENTMASK
  66075. CP210X_GET_EVENTSTATE
  66076. CP210X_GET_FLOW
  66077. CP210X_GET_LINE_CTL
  66078. CP210X_GET_MDMSTS
  66079. CP210X_GET_PARTNUM
  66080. CP210X_GET_PORTCONFIG
  66081. CP210X_GET_PROPS
  66082. CP210X_GPIO_MODE_MASK
  66083. CP210X_GPIO_MODE_OFFSET
  66084. CP210X_IFC_ENABLE
  66085. CP210X_IMM_CHAR
  66086. CP210X_PARTNUM_CP2101
  66087. CP210X_PARTNUM_CP2102
  66088. CP210X_PARTNUM_CP2102N_QFN20
  66089. CP210X_PARTNUM_CP2102N_QFN24
  66090. CP210X_PARTNUM_CP2102N_QFN28
  66091. CP210X_PARTNUM_CP2103
  66092. CP210X_PARTNUM_CP2104
  66093. CP210X_PARTNUM_CP2105
  66094. CP210X_PARTNUM_CP2108
  66095. CP210X_PARTNUM_UNKNOWN
  66096. CP210X_PIN_MODE_GPIO
  66097. CP210X_PIN_MODE_MODEM
  66098. CP210X_PURGE
  66099. CP210X_READ_2NCONFIG
  66100. CP210X_READ_LATCH
  66101. CP210X_RESET
  66102. CP210X_SCI_GPIO_MODE_MASK
  66103. CP210X_SCI_GPIO_MODE_OFFSET
  66104. CP210X_SERIAL_AUTO_RECEIVE
  66105. CP210X_SERIAL_AUTO_TRANSMIT
  66106. CP210X_SERIAL_BREAK_CHAR
  66107. CP210X_SERIAL_CTS_HANDSHAKE
  66108. CP210X_SERIAL_DCD_HANDSHAKE
  66109. CP210X_SERIAL_DSR_HANDSHAKE
  66110. CP210X_SERIAL_DSR_SENSITIVITY
  66111. CP210X_SERIAL_DTR_ACTIVE
  66112. CP210X_SERIAL_DTR_FLOW_CTL
  66113. CP210X_SERIAL_DTR_INACTIVE
  66114. CP210X_SERIAL_DTR_MASK
  66115. CP210X_SERIAL_DTR_SHIFT
  66116. CP210X_SERIAL_ERROR_CHAR
  66117. CP210X_SERIAL_NULL_STRIPPING
  66118. CP210X_SERIAL_RTS_ACTIVE
  66119. CP210X_SERIAL_RTS_FLOW_CTL
  66120. CP210X_SERIAL_RTS_INACTIVE
  66121. CP210X_SERIAL_RTS_MASK
  66122. CP210X_SERIAL_RTS_SHIFT
  66123. CP210X_SERIAL_XOFF_CONTINUE
  66124. CP210X_SET_BAUDDIV
  66125. CP210X_SET_BAUDRATE
  66126. CP210X_SET_BREAK
  66127. CP210X_SET_CHAR
  66128. CP210X_SET_CHARS
  66129. CP210X_SET_EVENTMASK
  66130. CP210X_SET_FLOW
  66131. CP210X_SET_LINE_CTL
  66132. CP210X_SET_MHS
  66133. CP210X_SET_XOFF
  66134. CP210X_SET_XON
  66135. CP210X_VENDOR_SPECIFIC
  66136. CP210X_WRITE_LATCH
  66137. CP2112_CANCEL_TRANSFER
  66138. CP2112_CONFIG_ATTR
  66139. CP2112_DATA_READ_FORCE_SEND
  66140. CP2112_DATA_READ_REQUEST
  66141. CP2112_DATA_READ_RESPONSE
  66142. CP2112_DATA_WRITE_READ_REQUEST
  66143. CP2112_DATA_WRITE_REQUEST
  66144. CP2112_GET_VERSION_INFO
  66145. CP2112_GPIO_CONFIG
  66146. CP2112_GPIO_CONFIG_LENGTH
  66147. CP2112_GPIO_GET
  66148. CP2112_GPIO_GET_LENGTH
  66149. CP2112_GPIO_SET
  66150. CP2112_GPIO_SET_LENGTH
  66151. CP2112_LOCK_BYTE
  66152. CP2112_MANUFACTURER_STRING
  66153. CP2112_PRODUCT_STRING
  66154. CP2112_PSTR_ATTR
  66155. CP2112_REPORT_MAX_LENGTH
  66156. CP2112_SERIAL_STRING
  66157. CP2112_SMBUS_CONFIG
  66158. CP2112_TRANSFER_STATUS_REQUEST
  66159. CP2112_TRANSFER_STATUS_RESPONSE
  66160. CP2112_USB_CONFIG
  66161. CP2TR
  66162. CP2_000R
  66163. CP2_255R
  66164. CP3
  66165. CP3TR
  66166. CP3_000R
  66167. CP3_255R
  66168. CP4
  66169. CP4TR
  66170. CP4_000R
  66171. CP4_255R
  66172. CP5
  66173. CP6
  66174. CP7
  66175. CP8
  66176. CP9
  66177. CPACC_DISABLE
  66178. CPACC_FULL
  66179. CPACC_SVC
  66180. CPACF_DECRYPT
  66181. CPACF_ENCRYPT
  66182. CPACF_KDSA
  66183. CPACF_KIMD
  66184. CPACF_KIMD_GHASH
  66185. CPACF_KIMD_QUERY
  66186. CPACF_KIMD_SHA3_224
  66187. CPACF_KIMD_SHA3_256
  66188. CPACF_KIMD_SHA3_384
  66189. CPACF_KIMD_SHA3_512
  66190. CPACF_KIMD_SHA_1
  66191. CPACF_KIMD_SHA_256
  66192. CPACF_KIMD_SHA_512
  66193. CPACF_KLMD
  66194. CPACF_KLMD_QUERY
  66195. CPACF_KLMD_SHA3_224
  66196. CPACF_KLMD_SHA3_256
  66197. CPACF_KLMD_SHA3_384
  66198. CPACF_KLMD_SHA3_512
  66199. CPACF_KLMD_SHA_1
  66200. CPACF_KLMD_SHA_256
  66201. CPACF_KLMD_SHA_512
  66202. CPACF_KM
  66203. CPACF_KMA
  66204. CPACF_KMAC
  66205. CPACF_KMAC_DEA
  66206. CPACF_KMAC_QUERY
  66207. CPACF_KMAC_TDEA_128
  66208. CPACF_KMAC_TDEA_192
  66209. CPACF_KMA_GCM_AES_128
  66210. CPACF_KMA_GCM_AES_192
  66211. CPACF_KMA_GCM_AES_256
  66212. CPACF_KMA_HS
  66213. CPACF_KMA_LAAD
  66214. CPACF_KMA_LPC
  66215. CPACF_KMA_QUERY
  66216. CPACF_KMC
  66217. CPACF_KMCTR
  66218. CPACF_KMCTR_AES_128
  66219. CPACF_KMCTR_AES_192
  66220. CPACF_KMCTR_AES_256
  66221. CPACF_KMCTR_DEA
  66222. CPACF_KMCTR_PAES_128
  66223. CPACF_KMCTR_PAES_192
  66224. CPACF_KMCTR_PAES_256
  66225. CPACF_KMCTR_QUERY
  66226. CPACF_KMCTR_TDEA_128
  66227. CPACF_KMCTR_TDEA_192
  66228. CPACF_KMC_AES_128
  66229. CPACF_KMC_AES_192
  66230. CPACF_KMC_AES_256
  66231. CPACF_KMC_DEA
  66232. CPACF_KMC_PAES_128
  66233. CPACF_KMC_PAES_192
  66234. CPACF_KMC_PAES_256
  66235. CPACF_KMC_PRNG
  66236. CPACF_KMC_QUERY
  66237. CPACF_KMC_TDEA_128
  66238. CPACF_KMC_TDEA_192
  66239. CPACF_KMF
  66240. CPACF_KMO
  66241. CPACF_KM_AES_128
  66242. CPACF_KM_AES_192
  66243. CPACF_KM_AES_256
  66244. CPACF_KM_DEA
  66245. CPACF_KM_PAES_128
  66246. CPACF_KM_PAES_192
  66247. CPACF_KM_PAES_256
  66248. CPACF_KM_PXTS_128
  66249. CPACF_KM_PXTS_256
  66250. CPACF_KM_QUERY
  66251. CPACF_KM_TDEA_128
  66252. CPACF_KM_TDEA_192
  66253. CPACF_KM_XTS_128
  66254. CPACF_KM_XTS_256
  66255. CPACF_MAX_PARMBLOCK_SIZE
  66256. CPACF_PCC
  66257. CPACF_PCKMO
  66258. CPACF_PCKMO_ENC_AES_128_KEY
  66259. CPACF_PCKMO_ENC_AES_192_KEY
  66260. CPACF_PCKMO_ENC_AES_256_KEY
  66261. CPACF_PCKMO_ENC_DES_KEY
  66262. CPACF_PCKMO_ENC_TDES_128_KEY
  66263. CPACF_PCKMO_ENC_TDES_192_KEY
  66264. CPACF_PCKMO_QUERY
  66265. CPACF_PRNO
  66266. CPACF_PRNO_QUERY
  66267. CPACF_PRNO_SHA512_DRNG_GEN
  66268. CPACF_PRNO_SHA512_DRNG_SEED
  66269. CPACF_PRNO_TRNG
  66270. CPACF_PRNO_TRNG_Q_R2C_RATIO
  66271. CPACR
  66272. CPACR_EL1
  66273. CPACR_EL1_DEFAULT
  66274. CPACR_EL1_FPEN
  66275. CPACR_EL1_TTA
  66276. CPACR_EL1_ZEN
  66277. CPACR_EL1_ZEN_EL0EN
  66278. CPACR_EL1_ZEN_EL1EN
  66279. CPA_ARRAY
  66280. CPA_CONFLICT
  66281. CPA_DETECT
  66282. CPA_FLUSHTLB
  66283. CPA_NO_CHECK_ALIAS
  66284. CPA_PAGES_ARRAY
  66285. CPA_PROTECT
  66286. CPB
  66287. CPB_CTL_DATA
  66288. CPB_CTL_DEVDIR
  66289. CPB_CTL_IEN
  66290. CPB_CTL_QUEUED
  66291. CPB_CTL_VALID
  66292. CPB_RESP_ATA_ERR
  66293. CPB_RESP_CPB_ERR
  66294. CPB_RESP_DONE
  66295. CPB_RESP_IGNORED
  66296. CPB_RESP_OVERFLOW
  66297. CPB_RESP_REL
  66298. CPB_RESP_SPURIOUS
  66299. CPB_RESP_UNDERFLOW
  66300. CPC
  66301. CPC0_CR0_CETE
  66302. CPC0_CR0_SWE
  66303. CPC0_CR0_U0DC
  66304. CPC0_CR0_U0DRE
  66305. CPC0_CR0_U0DTE
  66306. CPC0_CR0_U0EC
  66307. CPC0_CR0_U1DC
  66308. CPC0_CR0_U1DRE
  66309. CPC0_CR0_U1DTE
  66310. CPC0_CR0_U1EC
  66311. CPC0_CR0_U1FCS
  66312. CPC0_CR0_UDIV
  66313. CPC0_CR0_UDIV_MASK
  66314. CPC0_SYS0_BYPASS
  66315. CPC0_SYS0_EPDV
  66316. CPC0_SYS0_EPDV_MASK
  66317. CPC0_SYS0_EXTSL
  66318. CPC0_SYS0_FBDV
  66319. CPC0_SYS0_FBDV_MASK
  66320. CPC0_SYS0_FWDVA
  66321. CPC0_SYS0_FWDVA_MASK
  66322. CPC0_SYS0_FWDVB
  66323. CPC0_SYS0_FWDVB_MASK
  66324. CPC0_SYS0_NTO1
  66325. CPC0_SYS0_OPDV
  66326. CPC0_SYS0_OPDV_MASK
  66327. CPC0_SYS0_RL
  66328. CPC0_SYS0_RW_MASK
  66329. CPC0_SYS0_TUNE
  66330. CPC0_SYS0_ZMIISL_MASK
  66331. CPC1_CONFIG__CPC1_RDREQ_URG_MASK
  66332. CPC1_CONFIG__CPC1_RDREQ_URG__SHIFT
  66333. CPC1_CONFIG__CPC1_REQ_TRAN_MASK
  66334. CPC1_CONFIG__CPC1_REQ_TRAN__SHIFT
  66335. CPC2_CONFIG__CPC2_RDREQ_URG_MASK
  66336. CPC2_CONFIG__CPC2_RDREQ_URG__SHIFT
  66337. CPC2_CONFIG__CPC2_REQ_TRAN_MASK
  66338. CPC2_CONFIG__CPC2_REQ_TRAN__SHIFT
  66339. CPC925_BIT
  66340. CPC925_BITS_PER_REG
  66341. CPC925_CPU_ERR_DEV
  66342. CPC925_EDAC_MOD_STR
  66343. CPC925_EDAC_REVISION
  66344. CPC925_HT_LINK_DEV
  66345. CPC925_MC_LENGTH
  66346. CPC925_MC_START
  66347. CPC925_NR_CSROWS
  66348. CPC925_REF_FREQ
  66349. CPC925_SCRUB_BLOCK_SIZE
  66350. CPCAP_ADC_AD0
  66351. CPCAP_ADC_AD3
  66352. CPCAP_ADC_AD8
  66353. CPCAP_ADC_AD9
  66354. CPCAP_ADC_BATTI
  66355. CPCAP_ADC_BATTI_PI17
  66356. CPCAP_ADC_BATTP
  66357. CPCAP_ADC_BATTP_PI16
  66358. CPCAP_ADC_BPLUS_AD4
  66359. CPCAP_ADC_CHANNEL_NUM
  66360. CPCAP_ADC_CHG_ISENSE
  66361. CPCAP_ADC_HV_BATTP
  66362. CPCAP_ADC_LICELL
  66363. CPCAP_ADC_MAX_RETRIES
  66364. CPCAP_ADC_TIMING_IMM
  66365. CPCAP_ADC_TIMING_IN
  66366. CPCAP_ADC_TIMING_OUT
  66367. CPCAP_ADC_TSX1_AD12
  66368. CPCAP_ADC_TSX2_AD13
  66369. CPCAP_ADC_TSY1_AD14
  66370. CPCAP_ADC_TSY2_AD15
  66371. CPCAP_ADC_USB_ID
  66372. CPCAP_ADC_VBUS
  66373. CPCAP_BATTERY_CC_SAMPLE_PERIOD_MS
  66374. CPCAP_BATTERY_IIO_BATTDET
  66375. CPCAP_BATTERY_IIO_BATT_CURRENT
  66376. CPCAP_BATTERY_IIO_CHRG_CURRENT
  66377. CPCAP_BATTERY_IIO_NR
  66378. CPCAP_BATTERY_IIO_VOLTAGE
  66379. CPCAP_BATTERY_IRQ_ACTION_BATTERY_LOW
  66380. CPCAP_BATTERY_IRQ_ACTION_NONE
  66381. CPCAP_BATTERY_IRQ_ACTION_POWEROFF
  66382. CPCAP_BATTERY_STATE_LATEST
  66383. CPCAP_BATTERY_STATE_NR
  66384. CPCAP_BATTERY_STATE_PREVIOUS
  66385. CPCAP_BIT_A1_EAR_CDC_SW
  66386. CPCAP_BIT_A1_EAR_DAC_SW
  66387. CPCAP_BIT_A1_EAR_EN
  66388. CPCAP_BIT_A1_EAR_EXT_SW
  66389. CPCAP_BIT_A2_CLK0
  66390. CPCAP_BIT_A2_CLK1
  66391. CPCAP_BIT_A2_CLK2
  66392. CPCAP_BIT_A2_CLK_IN
  66393. CPCAP_BIT_A2_CLK_SYNC
  66394. CPCAP_BIT_A2_CONFIG
  66395. CPCAP_BIT_A2_FREE_RUN
  66396. CPCAP_BIT_A2_LDSP_L_CDC_SW
  66397. CPCAP_BIT_A2_LDSP_L_DAC_SW
  66398. CPCAP_BIT_A2_LDSP_L_EN
  66399. CPCAP_BIT_A2_LDSP_L_EXT_SW
  66400. CPCAP_BIT_A2_LDSP_R_CDC_SW
  66401. CPCAP_BIT_A2_LDSP_R_DAC_SW
  66402. CPCAP_BIT_A2_LDSP_R_EN
  66403. CPCAP_BIT_A2_LDSP_R_EXT_SW
  66404. CPCAP_BIT_A4_LINEOUT_L_CDC_SW
  66405. CPCAP_BIT_A4_LINEOUT_L_DAC_SW
  66406. CPCAP_BIT_A4_LINEOUT_L_EN
  66407. CPCAP_BIT_A4_LINEOUT_L_EXT_SW
  66408. CPCAP_BIT_A4_LINEOUT_R_CDC_SW
  66409. CPCAP_BIT_A4_LINEOUT_R_DAC_SW
  66410. CPCAP_BIT_A4_LINEOUT_R_EN
  66411. CPCAP_BIT_A4_LINEOUT_R_EXT_SW
  66412. CPCAP_BIT_AD4_SELECT
  66413. CPCAP_BIT_ADA0
  66414. CPCAP_BIT_ADA1
  66415. CPCAP_BIT_ADA2
  66416. CPCAP_BIT_ADC_BUSY
  66417. CPCAP_BIT_ADC_CLK_SEL0
  66418. CPCAP_BIT_ADC_CLK_SEL1
  66419. CPCAP_BIT_ADC_PS_FACTOR0
  66420. CPCAP_BIT_ADC_PS_FACTOR1
  66421. CPCAP_BIT_ADEN
  66422. CPCAP_BIT_ADEN_AUTO_CLR
  66423. CPCAP_BIT_ADTRIG_DIS
  66424. CPCAP_BIT_ADTRIG_ONESHOT
  66425. CPCAP_BIT_AD_SEL1
  66426. CPCAP_BIT_ALEFT_HS_CDC_SW
  66427. CPCAP_BIT_ALEFT_HS_DAC_SW
  66428. CPCAP_BIT_ALEFT_HS_EXT_SW
  66429. CPCAP_BIT_ARIGHT_HS_CDC_SW
  66430. CPCAP_BIT_ARIGHT_HS_DAC_SW
  66431. CPCAP_BIT_ARIGHT_HS_EXT_SW
  66432. CPCAP_BIT_ASC
  66433. CPCAP_BIT_ATO0
  66434. CPCAP_BIT_ATO1
  66435. CPCAP_BIT_ATO2
  66436. CPCAP_BIT_ATO3
  66437. CPCAP_BIT_ATOX
  66438. CPCAP_BIT_ATOX_PS_FACTOR
  66439. CPCAP_BIT_AUDIHPF_0
  66440. CPCAP_BIT_AUDIHPF_1
  66441. CPCAP_BIT_AUDIO_LOW_PWR
  66442. CPCAP_BIT_AUDIO_NORMAL_MODE
  66443. CPCAP_BIT_AUDOHPF_0
  66444. CPCAP_BIT_AUDOHPF_1
  66445. CPCAP_BIT_AUD_LOWPWR_SPEED
  66446. CPCAP_BIT_BATDETB_EN
  66447. CPCAP_BIT_CAL_FACTOR_ENABLE
  66448. CPCAP_BIT_CAL_MODE
  66449. CPCAP_BIT_CDC_CLK0
  66450. CPCAP_BIT_CDC_CLK1
  66451. CPCAP_BIT_CDC_CLK2
  66452. CPCAP_BIT_CDC_CLK_EN
  66453. CPCAP_BIT_CDC_CLOCK_TREE_RESET
  66454. CPCAP_BIT_CDC_DIG_AUD_FS0
  66455. CPCAP_BIT_CDC_DIG_AUD_FS1
  66456. CPCAP_BIT_CDC_EN_RX
  66457. CPCAP_BIT_CDC_PLL_SEL
  66458. CPCAP_BIT_CDC_SR0
  66459. CPCAP_BIT_CDC_SR1
  66460. CPCAP_BIT_CDC_SR2
  66461. CPCAP_BIT_CDC_SR3
  66462. CPCAP_BIT_CDC_SW
  66463. CPCAP_BIT_CDET_DIS
  66464. CPCAP_BIT_CLK_INV
  66465. CPCAP_BIT_CLK_IN_SEL
  66466. CPCAP_BIT_DF_RESET
  66467. CPCAP_BIT_DF_RESET_ST_DAC
  66468. CPCAP_BIT_DIG_AUD_IN
  66469. CPCAP_BIT_DIG_AUD_IN_ST_DAC
  66470. CPCAP_BIT_DLM
  66471. CPCAP_BIT_DM1K5PU
  66472. CPCAP_BIT_DMPD
  66473. CPCAP_BIT_DMPD_SPI
  66474. CPCAP_BIT_DP150KPU
  66475. CPCAP_BIT_DP1K5PU
  66476. CPCAP_BIT_DPLLCLKREQ
  66477. CPCAP_BIT_DPPD
  66478. CPCAP_BIT_DPPD_SPI
  66479. CPCAP_BIT_EMUMODE0
  66480. CPCAP_BIT_EMUMODE1
  66481. CPCAP_BIT_EMUMODE2
  66482. CPCAP_BIT_EMU_MIC_MUX
  66483. CPCAP_BIT_EMU_SPKR_L_EN
  66484. CPCAP_BIT_EMU_SPKR_R_EN
  66485. CPCAP_BIT_FSYNC_CLK_IN_COMMON
  66486. CPCAP_BIT_FS_INV
  66487. CPCAP_BIT_HS_ID_RX
  66488. CPCAP_BIT_HS_ID_TX
  66489. CPCAP_BIT_HS_LOW_PWR
  66490. CPCAP_BIT_HS_L_EN
  66491. CPCAP_BIT_HS_MIC_MUX
  66492. CPCAP_BIT_HS_R_EN
  66493. CPCAP_BIT_ID100KPU
  66494. CPCAP_BIT_IDPD
  66495. CPCAP_BIT_IDPU
  66496. CPCAP_BIT_IDPUCNTRL
  66497. CPCAP_BIT_IDPULSE
  66498. CPCAP_BIT_IDPU_SPI
  66499. CPCAP_BIT_IHSTX0
  66500. CPCAP_BIT_IHSTX01
  66501. CPCAP_BIT_IHSTX02
  66502. CPCAP_BIT_IHSTX03
  66503. CPCAP_BIT_LIADC
  66504. CPCAP_BIT_MB_BIAS_R0
  66505. CPCAP_BIT_MB_BIAS_R1
  66506. CPCAP_BIT_MB_ON1L
  66507. CPCAP_BIT_MB_ON1R
  66508. CPCAP_BIT_MB_ON2
  66509. CPCAP_BIT_MIC1_CDC_EN
  66510. CPCAP_BIT_MIC1_GAIN_0
  66511. CPCAP_BIT_MIC1_GAIN_1
  66512. CPCAP_BIT_MIC1_GAIN_2
  66513. CPCAP_BIT_MIC1_GAIN_3
  66514. CPCAP_BIT_MIC1_GAIN_4
  66515. CPCAP_BIT_MIC1_MUX
  66516. CPCAP_BIT_MIC1_PGA_EN
  66517. CPCAP_BIT_MIC1_RX_TIMESLOT0
  66518. CPCAP_BIT_MIC1_RX_TIMESLOT1
  66519. CPCAP_BIT_MIC1_RX_TIMESLOT2
  66520. CPCAP_BIT_MIC2_CDC_EN
  66521. CPCAP_BIT_MIC2_GAIN_0
  66522. CPCAP_BIT_MIC2_GAIN_1
  66523. CPCAP_BIT_MIC2_GAIN_2
  66524. CPCAP_BIT_MIC2_GAIN_3
  66525. CPCAP_BIT_MIC2_GAIN_4
  66526. CPCAP_BIT_MIC2_MUX
  66527. CPCAP_BIT_MIC2_PGA_EN
  66528. CPCAP_BIT_MIC2_TIMESLOT0
  66529. CPCAP_BIT_MIC2_TIMESLOT1
  66530. CPCAP_BIT_MIC2_TIMESLOT2
  66531. CPCAP_BIT_MONO_DAC0
  66532. CPCAP_BIT_MONO_DAC1
  66533. CPCAP_BIT_MONO_EXT0
  66534. CPCAP_BIT_MONO_EXT1
  66535. CPCAP_BIT_NCP_CLK_SYNC
  66536. CPCAP_BIT_PGA_CDC_EN
  66537. CPCAP_BIT_PGA_DAC_EN
  66538. CPCAP_BIT_PGA_EXT_L_EN
  66539. CPCAP_BIT_PGA_EXT_R_EN
  66540. CPCAP_BIT_PGA_IN_L_SW
  66541. CPCAP_BIT_PGA_IN_R_SW
  66542. CPCAP_BIT_PGA_OUTL_USBDN_CDC_SW
  66543. CPCAP_BIT_PGA_OUTL_USBDN_DAC_SW
  66544. CPCAP_BIT_PGA_OUTL_USBDN_EXT_SW
  66545. CPCAP_BIT_PGA_OUTR_USBDP_CDC_SW
  66546. CPCAP_BIT_PGA_OUTR_USBDP_DAC_SW
  66547. CPCAP_BIT_PGA_OUTR_USBDP_EXT_SW
  66548. CPCAP_BIT_PTT_CMP_EN
  66549. CPCAP_BIT_PTT_TH
  66550. CPCAP_BIT_PU_SPI
  66551. CPCAP_BIT_RAND0
  66552. CPCAP_BIT_RAND1
  66553. CPCAP_BIT_RX_L_ENCODE
  66554. CPCAP_BIT_RX_R_ENCODE
  66555. CPCAP_BIT_SE0CONN
  66556. CPCAP_BIT_SLAVE_PLL_CLK_INPUT
  66557. CPCAP_BIT_SMB_CDC
  66558. CPCAP_BIT_SMB_ST_DAC
  66559. CPCAP_BIT_SPARE_14_2
  66560. CPCAP_BIT_SPARE_898_15
  66561. CPCAP_BIT_STDAC_LOW_PWR_DISABLE
  66562. CPCAP_BIT_ST_CLK_EN
  66563. CPCAP_BIT_ST_CLK_INV
  66564. CPCAP_BIT_ST_CLOCK_TREE_RESET
  66565. CPCAP_BIT_ST_DAC_CLK0
  66566. CPCAP_BIT_ST_DAC_CLK1
  66567. CPCAP_BIT_ST_DAC_CLK2
  66568. CPCAP_BIT_ST_DAC_CLK_IN_SEL
  66569. CPCAP_BIT_ST_DAC_EN
  66570. CPCAP_BIT_ST_DAC_SW
  66571. CPCAP_BIT_ST_DIG_AUD_FS0
  66572. CPCAP_BIT_ST_DIG_AUD_FS1
  66573. CPCAP_BIT_ST_FS_INV
  66574. CPCAP_BIT_ST_HS_CP_EN
  66575. CPCAP_BIT_ST_L_TIMESLOT0
  66576. CPCAP_BIT_ST_L_TIMESLOT1
  66577. CPCAP_BIT_ST_L_TIMESLOT2
  66578. CPCAP_BIT_ST_R_TIMESLOT0
  66579. CPCAP_BIT_ST_R_TIMESLOT1
  66580. CPCAP_BIT_ST_R_TIMESLOT2
  66581. CPCAP_BIT_ST_SR0
  66582. CPCAP_BIT_ST_SR1
  66583. CPCAP_BIT_ST_SR2
  66584. CPCAP_BIT_ST_SR3
  66585. CPCAP_BIT_SUSPEND_SPI
  66586. CPCAP_BIT_SW1_SEL
  66587. CPCAP_BIT_SW2_SEL
  66588. CPCAP_BIT_SW3_SEL
  66589. CPCAP_BIT_SW4_SEL
  66590. CPCAP_BIT_SW5_SEL
  66591. CPCAP_BIT_SW6_SEL
  66592. CPCAP_BIT_THERMBIAS_EN
  66593. CPCAP_BIT_TS_M0
  66594. CPCAP_BIT_TS_M1
  66595. CPCAP_BIT_TS_M2
  66596. CPCAP_BIT_TS_REFEN
  66597. CPCAP_BIT_TXENPOL
  66598. CPCAP_BIT_UARTMUX0
  66599. CPCAP_BIT_UARTMUX1
  66600. CPCAP_BIT_UARTSWAP
  66601. CPCAP_BIT_UARTTXTRI
  66602. CPCAP_BIT_ULPISTPLOW
  66603. CPCAP_BIT_ULPI_SPI_SEL
  66604. CPCAP_BIT_UNUSED_519_13
  66605. CPCAP_BIT_UNUSED_519_14
  66606. CPCAP_BIT_UNUSED_519_15
  66607. CPCAP_BIT_UNUSED_898_9
  66608. CPCAP_BIT_USBCNTRL
  66609. CPCAP_BIT_USBSUSPEND
  66610. CPCAP_BIT_USBXCVREN
  66611. CPCAP_BIT_VAUDIOPRISTBY
  66612. CPCAP_BIT_VAUDIO_MODE0
  66613. CPCAP_BIT_VAUDIO_MODE1
  66614. CPCAP_BIT_VAUDIO_SEL
  66615. CPCAP_BIT_VBUSCHRGTMR0
  66616. CPCAP_BIT_VBUSCHRGTMR1
  66617. CPCAP_BIT_VBUSCHRGTMR2
  66618. CPCAP_BIT_VBUSCHRGTMR3
  66619. CPCAP_BIT_VBUSEN_SPI
  66620. CPCAP_BIT_VBUSPD
  66621. CPCAP_BIT_VBUSPD_SPI
  66622. CPCAP_BIT_VBUSPU
  66623. CPCAP_BIT_VBUSPU_SPI
  66624. CPCAP_BIT_VBUSSTBY_EN
  66625. CPCAP_BIT_VBUS_SWITCH
  66626. CPCAP_BIT_VCAM_SEL
  66627. CPCAP_BIT_VCSI_SEL
  66628. CPCAP_BIT_VDAC_SEL
  66629. CPCAP_BIT_VDIG_SEL
  66630. CPCAP_BIT_VFUSE_SEL
  66631. CPCAP_BIT_VHVIO_SEL
  66632. CPCAP_BIT_VOL_CDC0
  66633. CPCAP_BIT_VOL_CDC1
  66634. CPCAP_BIT_VOL_CDC2
  66635. CPCAP_BIT_VOL_CDC3
  66636. CPCAP_BIT_VOL_CDC_LSB_1dB0
  66637. CPCAP_BIT_VOL_CDC_LSB_1dB1
  66638. CPCAP_BIT_VOL_DAC0
  66639. CPCAP_BIT_VOL_DAC1
  66640. CPCAP_BIT_VOL_DAC2
  66641. CPCAP_BIT_VOL_DAC3
  66642. CPCAP_BIT_VOL_DAC_LSB_1dB0
  66643. CPCAP_BIT_VOL_DAC_LSB_1dB1
  66644. CPCAP_BIT_VOL_EXT0
  66645. CPCAP_BIT_VOL_EXT1
  66646. CPCAP_BIT_VOL_EXT2
  66647. CPCAP_BIT_VOL_EXT3
  66648. CPCAP_BIT_VPLL_SEL
  66649. CPCAP_BIT_VRF1_SEL
  66650. CPCAP_BIT_VRF2_SEL
  66651. CPCAP_BIT_VRFREF_SEL
  66652. CPCAP_BIT_VSDIO_SEL
  66653. CPCAP_BIT_VSIM_SEL
  66654. CPCAP_BIT_VUSBINT1_SEL
  66655. CPCAP_BIT_VUSBINT2_SEL
  66656. CPCAP_BIT_VUSB_SEL
  66657. CPCAP_BIT_VVIB_SEL
  66658. CPCAP_BIT_VWLAN1_SEL
  66659. CPCAP_BIT_VWLAN2_SEL
  66660. CPCAP_BIT_V_AUDIO_EN
  66661. CPCAP_BIT_ZHSDRV0
  66662. CPCAP_BIT_ZHSDRV1
  66663. CPCAP_CHAN
  66664. CPCAP_CHARGER_IIO_BATTDET
  66665. CPCAP_CHARGER_IIO_BATT_CURRENT
  66666. CPCAP_CHARGER_IIO_CHRG_CURRENT
  66667. CPCAP_CHARGER_IIO_NR
  66668. CPCAP_CHARGER_IIO_VBUS
  66669. CPCAP_CHARGER_IIO_VOLTAGE
  66670. CPCAP_DAI_HIFI
  66671. CPCAP_DAI_VOICE
  66672. CPCAP_DM_DP
  66673. CPCAP_FOUR_POINT_TWO_ADC
  66674. CPCAP_IRQ_ON
  66675. CPCAP_IRQ_ON_BITMASK
  66676. CPCAP_LED_NO_CURRENT
  66677. CPCAP_MAX_TEMP_LVL
  66678. CPCAP_MDM_RX_TX
  66679. CPCAP_NO_BATTERY
  66680. CPCAP_NR_IRQ_CHIPS
  66681. CPCAP_NR_IRQ_REG_BANKS
  66682. CPCAP_NR_REGULATORS
  66683. CPCAP_OTG_DM_DP
  66684. CPCAP_REG
  66685. CPCAP_REGISTER_BITS
  66686. CPCAP_REGISTER_SIZE
  66687. CPCAP_REG_A2LA
  66688. CPCAP_REG_ABC
  66689. CPCAP_REG_ADCAL1
  66690. CPCAP_REG_ADCAL2
  66691. CPCAP_REG_ADCC1
  66692. CPCAP_REG_ADCC1_DEFAULTS
  66693. CPCAP_REG_ADCC2
  66694. CPCAP_REG_ADCC2_DEFAULTS
  66695. CPCAP_REG_ADCD0
  66696. CPCAP_REG_ADCD1
  66697. CPCAP_REG_ADCD2
  66698. CPCAP_REG_ADCD3
  66699. CPCAP_REG_ADCD4
  66700. CPCAP_REG_ADCD5
  66701. CPCAP_REG_ADCD6
  66702. CPCAP_REG_ADCD7
  66703. CPCAP_REG_ADLC
  66704. CPCAP_REG_ASSIGN1
  66705. CPCAP_REG_ASSIGN2
  66706. CPCAP_REG_ASSIGN3
  66707. CPCAP_REG_ASSIGN4
  66708. CPCAP_REG_ASSIGN5
  66709. CPCAP_REG_ASSIGN6
  66710. CPCAP_REG_BLEDC
  66711. CPCAP_REG_BLUEC
  66712. CPCAP_REG_BPEOL
  66713. CPCAP_REG_BPEOL_BIT_BATTDETEN
  66714. CPCAP_REG_BPEOL_BIT_EOL8
  66715. CPCAP_REG_BPEOL_BIT_EOL9
  66716. CPCAP_REG_BPEOL_BIT_EOLSEL
  66717. CPCAP_REG_BPEOL_BIT_EOL_MULTI
  66718. CPCAP_REG_BPEOL_BIT_UNKNOWN2
  66719. CPCAP_REG_BPEOL_BIT_UNKNOWN3
  66720. CPCAP_REG_BPEOL_BIT_UNKNOWN5
  66721. CPCAP_REG_BPEOL_BIT_UNKNOWN6
  66722. CPCAP_REG_BPEOL_BIT_UNKNOWN7
  66723. CPCAP_REG_CC
  66724. CPCAP_REG_CCA1
  66725. CPCAP_REG_CCA2
  66726. CPCAP_REG_CCC1
  66727. CPCAP_REG_CCCC2
  66728. CPCAP_REG_CCI
  66729. CPCAP_REG_CCM
  66730. CPCAP_REG_CCO
  66731. CPCAP_REG_CCS1
  66732. CPCAP_REG_CCS2
  66733. CPCAP_REG_CDI
  66734. CPCAP_REG_CFC
  66735. CPCAP_REG_CLEDC
  66736. CPCAP_REG_CRM
  66737. CPCAP_REG_CRM_CHRG_LED_EN
  66738. CPCAP_REG_CRM_FET_CTRL
  66739. CPCAP_REG_CRM_FET_OVRD
  66740. CPCAP_REG_CRM_ICHRG
  66741. CPCAP_REG_CRM_ICHRG0
  66742. CPCAP_REG_CRM_ICHRG1
  66743. CPCAP_REG_CRM_ICHRG2
  66744. CPCAP_REG_CRM_ICHRG3
  66745. CPCAP_REG_CRM_ICHRG_0A000
  66746. CPCAP_REG_CRM_ICHRG_0A070
  66747. CPCAP_REG_CRM_ICHRG_0A177
  66748. CPCAP_REG_CRM_ICHRG_0A266
  66749. CPCAP_REG_CRM_ICHRG_0A355
  66750. CPCAP_REG_CRM_ICHRG_0A443
  66751. CPCAP_REG_CRM_ICHRG_0A532
  66752. CPCAP_REG_CRM_ICHRG_0A621
  66753. CPCAP_REG_CRM_ICHRG_0A709
  66754. CPCAP_REG_CRM_ICHRG_0A798
  66755. CPCAP_REG_CRM_ICHRG_0A886
  66756. CPCAP_REG_CRM_ICHRG_0A975
  66757. CPCAP_REG_CRM_ICHRG_1A064
  66758. CPCAP_REG_CRM_ICHRG_1A152
  66759. CPCAP_REG_CRM_ICHRG_1A596
  66760. CPCAP_REG_CRM_ICHRG_NO_LIMIT
  66761. CPCAP_REG_CRM_ICHRG_TR0
  66762. CPCAP_REG_CRM_ICHRG_TR1
  66763. CPCAP_REG_CRM_RVRSMODE
  66764. CPCAP_REG_CRM_TR
  66765. CPCAP_REG_CRM_TR_0A00
  66766. CPCAP_REG_CRM_TR_0A24
  66767. CPCAP_REG_CRM_TR_0A48
  66768. CPCAP_REG_CRM_TR_0A72
  66769. CPCAP_REG_CRM_UNUSED_641_14
  66770. CPCAP_REG_CRM_UNUSED_641_15
  66771. CPCAP_REG_CRM_VCHRG
  66772. CPCAP_REG_CRM_VCHRG0
  66773. CPCAP_REG_CRM_VCHRG1
  66774. CPCAP_REG_CRM_VCHRG2
  66775. CPCAP_REG_CRM_VCHRG3
  66776. CPCAP_REG_CRM_VCHRG_3V80
  66777. CPCAP_REG_CRM_VCHRG_4V10
  66778. CPCAP_REG_CRM_VCHRG_4V12
  66779. CPCAP_REG_CRM_VCHRG_4V15
  66780. CPCAP_REG_CRM_VCHRG_4V17
  66781. CPCAP_REG_CRM_VCHRG_4V20
  66782. CPCAP_REG_CRM_VCHRG_4V23
  66783. CPCAP_REG_CRM_VCHRG_4V25
  66784. CPCAP_REG_CRM_VCHRG_4V27
  66785. CPCAP_REG_CRM_VCHRG_4V30
  66786. CPCAP_REG_CRM_VCHRG_4V33
  66787. CPCAP_REG_CRM_VCHRG_4V35
  66788. CPCAP_REG_CRM_VCHRG_4V38
  66789. CPCAP_REG_CRM_VCHRG_4V40
  66790. CPCAP_REG_CRM_VCHRG_4V42
  66791. CPCAP_REG_CRM_VCHRG_4V44
  66792. CPCAP_REG_DAY
  66793. CPCAP_REG_DAYA
  66794. CPCAP_REG_GCAIC
  66795. CPCAP_REG_GCAIM
  66796. CPCAP_REG_GPIO0
  66797. CPCAP_REG_GPIO1
  66798. CPCAP_REG_GPIO2
  66799. CPCAP_REG_GPIO3
  66800. CPCAP_REG_GPIO4
  66801. CPCAP_REG_GPIO5
  66802. CPCAP_REG_GPIO6
  66803. CPCAP_REG_GREENC
  66804. CPCAP_REG_INT1
  66805. CPCAP_REG_INT2
  66806. CPCAP_REG_INT3
  66807. CPCAP_REG_INT4
  66808. CPCAP_REG_INTM1
  66809. CPCAP_REG_INTM2
  66810. CPCAP_REG_INTM3
  66811. CPCAP_REG_INTM4
  66812. CPCAP_REG_INTS1
  66813. CPCAP_REG_INTS2
  66814. CPCAP_REG_INTS3
  66815. CPCAP_REG_INTS4
  66816. CPCAP_REG_KLC
  66817. CPCAP_REG_LDEB
  66818. CPCAP_REG_LGDET
  66819. CPCAP_REG_LGDIR
  66820. CPCAP_REG_LGMASK
  66821. CPCAP_REG_LGPIN
  66822. CPCAP_REG_LGPU
  66823. CPCAP_REG_LMACE
  66824. CPCAP_REG_LMISC
  66825. CPCAP_REG_LVAB
  66826. CPCAP_REG_MDLC
  66827. CPCAP_REG_MI1
  66828. CPCAP_REG_MI2
  66829. CPCAP_REG_MIM1
  66830. CPCAP_REG_MIM2
  66831. CPCAP_REG_MIPIS1
  66832. CPCAP_REG_MIPIS2
  66833. CPCAP_REG_MIPIS3
  66834. CPCAP_REG_MT1
  66835. CPCAP_REG_MT2
  66836. CPCAP_REG_MT3
  66837. CPCAP_REG_OFF_MODE_SEC
  66838. CPCAP_REG_OW1
  66839. CPCAP_REG_OW1C
  66840. CPCAP_REG_OW1D
  66841. CPCAP_REG_OW1I
  66842. CPCAP_REG_OW1IE
  66843. CPCAP_REG_OW2
  66844. CPCAP_REG_OW2C
  66845. CPCAP_REG_OW2D
  66846. CPCAP_REG_OW2I
  66847. CPCAP_REG_OW2IE
  66848. CPCAP_REG_OW3
  66849. CPCAP_REG_OW3C
  66850. CPCAP_REG_OW3D
  66851. CPCAP_REG_OW3I
  66852. CPCAP_REG_OW3IE
  66853. CPCAP_REG_OWDC
  66854. CPCAP_REG_PC1
  66855. CPCAP_REG_PC2
  66856. CPCAP_REG_PF
  66857. CPCAP_REG_PGC
  66858. CPCAP_REG_REDC
  66859. CPCAP_REG_RXCOA
  66860. CPCAP_REG_RXEPOA
  66861. CPCAP_REG_RXLL
  66862. CPCAP_REG_RXOA
  66863. CPCAP_REG_RXSDOA
  66864. CPCAP_REG_RXVC
  66865. CPCAP_REG_S1C1
  66866. CPCAP_REG_S1C2
  66867. CPCAP_REG_S2C1
  66868. CPCAP_REG_S2C2
  66869. CPCAP_REG_S3C
  66870. CPCAP_REG_S4C1
  66871. CPCAP_REG_S4C2
  66872. CPCAP_REG_S5C
  66873. CPCAP_REG_S6C
  66874. CPCAP_REG_SCC
  66875. CPCAP_REG_SCR1
  66876. CPCAP_REG_SCR2
  66877. CPCAP_REG_SCR3
  66878. CPCAP_REG_SDAC
  66879. CPCAP_REG_SDACDI
  66880. CPCAP_REG_SDVSPLL
  66881. CPCAP_REG_SI2CC1
  66882. CPCAP_REG_ST_TEST1
  66883. CPCAP_REG_ST_TEST2
  66884. CPCAP_REG_SW1
  66885. CPCAP_REG_SW2
  66886. CPCAP_REG_Si2CC2
  66887. CPCAP_REG_TEST
  66888. CPCAP_REG_TOD1
  66889. CPCAP_REG_TOD2
  66890. CPCAP_REG_TODA1
  66891. CPCAP_REG_TODA2
  66892. CPCAP_REG_TXI
  66893. CPCAP_REG_TXMP
  66894. CPCAP_REG_UCC1
  66895. CPCAP_REG_UCC2
  66896. CPCAP_REG_UCTM
  66897. CPCAP_REG_UFC1
  66898. CPCAP_REG_UFC2
  66899. CPCAP_REG_UFC3
  66900. CPCAP_REG_UIC1
  66901. CPCAP_REG_UIC2
  66902. CPCAP_REG_UIC3
  66903. CPCAP_REG_UIEF1
  66904. CPCAP_REG_UIEF2
  66905. CPCAP_REG_UIEF3
  66906. CPCAP_REG_UIER1
  66907. CPCAP_REG_UIER2
  66908. CPCAP_REG_UIER3
  66909. CPCAP_REG_UIL
  66910. CPCAP_REG_UIS
  66911. CPCAP_REG_UPIDH
  66912. CPCAP_REG_UPIDL
  66913. CPCAP_REG_URM1
  66914. CPCAP_REG_URM2
  66915. CPCAP_REG_URT
  66916. CPCAP_REG_USBC1
  66917. CPCAP_REG_USBC2
  66918. CPCAP_REG_USBC3
  66919. CPCAP_REG_USBD
  66920. CPCAP_REG_USBOTG1
  66921. CPCAP_REG_USBOTG2
  66922. CPCAP_REG_USBOTG3
  66923. CPCAP_REG_UVIDH
  66924. CPCAP_REG_UVIDL
  66925. CPCAP_REG_VAL1
  66926. CPCAP_REG_VAL2
  66927. CPCAP_REG_VAUDIOC
  66928. CPCAP_REG_VCAMC
  66929. CPCAP_REG_VCSIC
  66930. CPCAP_REG_VDACC
  66931. CPCAP_REG_VDIGC
  66932. CPCAP_REG_VERSC1
  66933. CPCAP_REG_VERSC2
  66934. CPCAP_REG_VFUSEC
  66935. CPCAP_REG_VHVIOC
  66936. CPCAP_REG_VMC
  66937. CPCAP_REG_VPLLC
  66938. CPCAP_REG_VRF1C
  66939. CPCAP_REG_VRF2C
  66940. CPCAP_REG_VRFREFC
  66941. CPCAP_REG_VSDIOC
  66942. CPCAP_REG_VSIMC
  66943. CPCAP_REG_VUSBC
  66944. CPCAP_REG_VUSBINT1C
  66945. CPCAP_REG_VUSBINT2C
  66946. CPCAP_REG_VVIBC
  66947. CPCAP_REG_VWLAN1C
  66948. CPCAP_REG_VWLAN2C
  66949. CPCAP_REVISION_1_0
  66950. CPCAP_REVISION_1_1
  66951. CPCAP_REVISION_2_0
  66952. CPCAP_REVISION_2_1
  66953. CPCAP_REVISION_MAJOR
  66954. CPCAP_REVISION_MINOR
  66955. CPCAP_SW1
  66956. CPCAP_SW2
  66957. CPCAP_SW3
  66958. CPCAP_SW4
  66959. CPCAP_SW5
  66960. CPCAP_SW6
  66961. CPCAP_UNKNOWN_DISABLED
  66962. CPCAP_VAUDIO
  66963. CPCAP_VCAM
  66964. CPCAP_VCSI
  66965. CPCAP_VDAC
  66966. CPCAP_VDIG
  66967. CPCAP_VENDOR_ST
  66968. CPCAP_VENDOR_TI
  66969. CPCAP_VFUSE
  66970. CPCAP_VHVIO
  66971. CPCAP_VPLL
  66972. CPCAP_VRF1
  66973. CPCAP_VRF2
  66974. CPCAP_VRFREF
  66975. CPCAP_VSDIO
  66976. CPCAP_VSIM
  66977. CPCAP_VSIMCARD
  66978. CPCAP_VUSB
  66979. CPCAP_VVIB
  66980. CPCAP_VWLAN1
  66981. CPCAP_VWLAN2
  66982. CPCMD_MASK
  66983. CPCP_RMK_DISABLE
  66984. CPCR
  66985. CPCR_CP1CE
  66986. CPCR_CP2CE
  66987. CPCR_CP3CE
  66988. CPCR_CP4CE
  66989. CPCR_RX_VLAN
  66990. CPCS_UU
  66991. CPCTL
  66992. CPC_ACCESSOR_RO
  66993. CPC_ACCESSOR_RW
  66994. CPC_BASE_ADDR
  66995. CPC_BUSY
  66996. CPC_CAN_ECODE_ERRFRAME
  66997. CPC_CAN_MSG_MIN_SIZE
  66998. CPC_CC_TYPE_SJA1000
  66999. CPC_CL_VC_RUN_OFS
  67000. CPC_CL_VC_STOP_OFS
  67001. CPC_CMD_TYPE_CAN_EXIT
  67002. CPC_CMD_TYPE_CAN_FRAME
  67003. CPC_CMD_TYPE_CAN_PARAMS
  67004. CPC_CMD_TYPE_CAN_STATE
  67005. CPC_CMD_TYPE_CLEAR_CMD_QUEUE
  67006. CPC_CMD_TYPE_CLEAR_MSG_QUEUE
  67007. CPC_CMD_TYPE_CONTROL
  67008. CPC_CMD_TYPE_EXT_CAN_FRAME
  67009. CPC_CMD_TYPE_EXT_RTR_FRAME
  67010. CPC_CMD_TYPE_INQ_ERR_COUNTER
  67011. CPC_CMD_TYPE_RTR_FRAME
  67012. CPC_CX_ACCESSOR_RO
  67013. CPC_CX_ACCESSOR_RW
  67014. CPC_Cx_CMD
  67015. CPC_Cx_CMD_CLOCKOFF
  67016. CPC_Cx_CMD_PWRDOWN
  67017. CPC_Cx_CMD_PWRUP
  67018. CPC_Cx_CMD_RESET
  67019. CPC_Cx_OTHER_CORENUM
  67020. CPC_Cx_STAT_CONF_CLKGAT_IMPL
  67021. CPC_Cx_STAT_CONF_EJTAG_PROBE
  67022. CPC_Cx_STAT_CONF_PWRDN_IMPL
  67023. CPC_Cx_STAT_CONF_PWRUPE
  67024. CPC_Cx_STAT_CONF_SEQSTATE
  67025. CPC_Cx_STAT_CONF_SEQSTATE_D0
  67026. CPC_Cx_STAT_CONF_SEQSTATE_D1
  67027. CPC_Cx_STAT_CONF_SEQSTATE_D2
  67028. CPC_Cx_STAT_CONF_SEQSTATE_D3
  67029. CPC_Cx_STAT_CONF_SEQSTATE_U0
  67030. CPC_Cx_STAT_CONF_SEQSTATE_U1
  67031. CPC_Cx_STAT_CONF_SEQSTATE_U2
  67032. CPC_Cx_STAT_CONF_SEQSTATE_U3
  67033. CPC_Cx_STAT_CONF_SEQSTATE_U4
  67034. CPC_Cx_STAT_CONF_SEQSTATE_U5
  67035. CPC_Cx_STAT_CONF_SEQSTATE_U6
  67036. CPC_DDID_BASE_ADDR_HI__BASE_ADDR_HI_MASK
  67037. CPC_DDID_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT
  67038. CPC_DDID_BASE_ADDR_LO__BASE_ADDR_LO_MASK
  67039. CPC_DDID_BASE_ADDR_LO__BASE_ADDR_LO__SHIFT
  67040. CPC_DDID_CNTL__ENABLE_MASK
  67041. CPC_DDID_CNTL__ENABLE__SHIFT
  67042. CPC_DDID_CNTL__MODE_MASK
  67043. CPC_DDID_CNTL__MODE__SHIFT
  67044. CPC_DDID_CNTL__POLICY_MASK
  67045. CPC_DDID_CNTL__POLICY__SHIFT
  67046. CPC_DDID_CNTL__SIZE_MASK
  67047. CPC_DDID_CNTL__SIZE__SHIFT
  67048. CPC_DDID_CNTL__THRESHOLD_MASK
  67049. CPC_DDID_CNTL__THRESHOLD__SHIFT
  67050. CPC_EDC_SCRATCH_CNT__DED_COUNT_MASK
  67051. CPC_EDC_SCRATCH_CNT__DED_COUNT__SHIFT
  67052. CPC_EDC_SCRATCH_CNT__SEC_COUNT_MASK
  67053. CPC_EDC_SCRATCH_CNT__SEC_COUNT__SHIFT
  67054. CPC_EDC_UCODE_CNT__DED_COUNT_MASK
  67055. CPC_EDC_UCODE_CNT__DED_COUNT__SHIFT
  67056. CPC_EDC_UCODE_CNT__SEC_COUNT_MASK
  67057. CPC_EDC_UCODE_CNT__SEC_COUNT__SHIFT
  67058. CPC_HEADER_SIZE
  67059. CPC_INT_ADDR__ADDR_MASK
  67060. CPC_INT_ADDR__ADDR__SHIFT
  67061. CPC_INT_CNTL
  67062. CPC_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  67063. CPC_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  67064. CPC_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  67065. CPC_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  67066. CPC_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  67067. CPC_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  67068. CPC_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  67069. CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  67070. CPC_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  67071. CPC_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  67072. CPC_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  67073. CPC_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  67074. CPC_INT_CNTL__GPF_INT_ENABLE_MASK
  67075. CPC_INT_CNTL__GPF_INT_ENABLE__SHIFT
  67076. CPC_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  67077. CPC_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  67078. CPC_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  67079. CPC_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  67080. CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  67081. CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  67082. CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  67083. CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  67084. CPC_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  67085. CPC_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  67086. CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  67087. CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  67088. CPC_INT_CNTX_ID__CNTX_ID_MASK
  67089. CPC_INT_CNTX_ID__CNTX_ID__SHIFT
  67090. CPC_INT_CNTX_ID__QUEUE_ID_MASK
  67091. CPC_INT_CNTX_ID__QUEUE_ID__SHIFT
  67092. CPC_INT_INFO__ADDR_HI_MASK
  67093. CPC_INT_INFO__ADDR_HI__SHIFT
  67094. CPC_INT_INFO__QUEUE_ID_MASK
  67095. CPC_INT_INFO__QUEUE_ID__SHIFT
  67096. CPC_INT_INFO__TYPE_MASK
  67097. CPC_INT_INFO__TYPE__SHIFT
  67098. CPC_INT_INFO__VMID_MASK
  67099. CPC_INT_INFO__VMID__SHIFT
  67100. CPC_INT_PASID__BYPASS_PASID_MASK
  67101. CPC_INT_PASID__BYPASS_PASID__SHIFT
  67102. CPC_INT_PASID__PASID_MASK
  67103. CPC_INT_PASID__PASID__SHIFT
  67104. CPC_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  67105. CPC_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  67106. CPC_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  67107. CPC_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  67108. CPC_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  67109. CPC_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  67110. CPC_INT_STATUS__GENERIC0_INT_STATUS_MASK
  67111. CPC_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  67112. CPC_INT_STATUS__GENERIC1_INT_STATUS_MASK
  67113. CPC_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  67114. CPC_INT_STATUS__GENERIC2_INT_STATUS_MASK
  67115. CPC_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  67116. CPC_INT_STATUS__GPF_INT_STATUS_MASK
  67117. CPC_INT_STATUS__GPF_INT_STATUS__SHIFT
  67118. CPC_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  67119. CPC_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  67120. CPC_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  67121. CPC_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  67122. CPC_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  67123. CPC_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  67124. CPC_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  67125. CPC_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  67126. CPC_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  67127. CPC_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  67128. CPC_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  67129. CPC_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  67130. CPC_IN_PCC
  67131. CPC_LATENCY_STATS_DATA__DATA_MASK
  67132. CPC_LATENCY_STATS_DATA__DATA__SHIFT
  67133. CPC_LATENCY_STATS_SEL
  67134. CPC_LATENCY_STATS_SELECT__CLEAR_MASK
  67135. CPC_LATENCY_STATS_SELECT__CLEAR__SHIFT
  67136. CPC_LATENCY_STATS_SELECT__ENABLE_MASK
  67137. CPC_LATENCY_STATS_SELECT__ENABLE__SHIFT
  67138. CPC_LATENCY_STATS_SELECT__INDEX_MASK
  67139. CPC_LATENCY_STATS_SELECT__INDEX__SHIFT
  67140. CPC_LATENCY_STATS_SEL_INVAL_LAST
  67141. CPC_LATENCY_STATS_SEL_INVAL_MAX
  67142. CPC_LATENCY_STATS_SEL_INVAL_MIN
  67143. CPC_LATENCY_STATS_SEL_XACK_LAST
  67144. CPC_LATENCY_STATS_SEL_XACK_MAX
  67145. CPC_LATENCY_STATS_SEL_XACK_MIN
  67146. CPC_LATENCY_STATS_SEL_XNACK_LAST
  67147. CPC_LATENCY_STATS_SEL_XNACK_MAX
  67148. CPC_LATENCY_STATS_SEL_XNACK_MIN
  67149. CPC_MSG_HEADER_LEN
  67150. CPC_MSG_TYPE_CAN_FRAME
  67151. CPC_MSG_TYPE_CAN_FRAME_ERROR
  67152. CPC_MSG_TYPE_CAN_PARAMS
  67153. CPC_MSG_TYPE_CAN_STATE
  67154. CPC_MSG_TYPE_CONFIRM
  67155. CPC_MSG_TYPE_CONTROL
  67156. CPC_MSG_TYPE_ERR_COUNTER
  67157. CPC_MSG_TYPE_EXT_CAN_FRAME
  67158. CPC_MSG_TYPE_EXT_RTR_FRAME
  67159. CPC_MSG_TYPE_OVERRUN
  67160. CPC_MSG_TYPE_RTR_FRAME
  67161. CPC_OS_PIPES__OS_PIPES_MASK
  67162. CPC_OS_PIPES__OS_PIPES__SHIFT
  67163. CPC_OVR_EVENT_BUSERROR
  67164. CPC_OVR_EVENT_CAN
  67165. CPC_OVR_EVENT_CANSTATE
  67166. CPC_OVR_HW
  67167. CPC_PERFCOUNTER0_HI__PERFCOUNTER_HI_MASK
  67168. CPC_PERFCOUNTER0_HI__PERFCOUNTER_HI__SHIFT
  67169. CPC_PERFCOUNTER0_LO__PERFCOUNTER_LO_MASK
  67170. CPC_PERFCOUNTER0_LO__PERFCOUNTER_LO__SHIFT
  67171. CPC_PERFCOUNTER0_SELECT1__CNTR_MODE2_MASK
  67172. CPC_PERFCOUNTER0_SELECT1__CNTR_MODE2__SHIFT
  67173. CPC_PERFCOUNTER0_SELECT1__CNTR_MODE3_MASK
  67174. CPC_PERFCOUNTER0_SELECT1__CNTR_MODE3__SHIFT
  67175. CPC_PERFCOUNTER0_SELECT1__CNTR_SEL2_MASK
  67176. CPC_PERFCOUNTER0_SELECT1__CNTR_SEL2__SHIFT
  67177. CPC_PERFCOUNTER0_SELECT1__CNTR_SEL3_MASK
  67178. CPC_PERFCOUNTER0_SELECT1__CNTR_SEL3__SHIFT
  67179. CPC_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK
  67180. CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT
  67181. CPC_PERFCOUNTER0_SELECT1__PERF_SEL3_MASK
  67182. CPC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT
  67183. CPC_PERFCOUNTER0_SELECT__CNTR_MODE0_MASK
  67184. CPC_PERFCOUNTER0_SELECT__CNTR_MODE0__SHIFT
  67185. CPC_PERFCOUNTER0_SELECT__CNTR_MODE1_MASK
  67186. CPC_PERFCOUNTER0_SELECT__CNTR_MODE1__SHIFT
  67187. CPC_PERFCOUNTER0_SELECT__CNTR_MODE_MASK
  67188. CPC_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT
  67189. CPC_PERFCOUNTER0_SELECT__CNTR_SEL0_MASK
  67190. CPC_PERFCOUNTER0_SELECT__CNTR_SEL0__SHIFT
  67191. CPC_PERFCOUNTER0_SELECT__CNTR_SEL1_MASK
  67192. CPC_PERFCOUNTER0_SELECT__CNTR_SEL1__SHIFT
  67193. CPC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK
  67194. CPC_PERFCOUNTER0_SELECT__PERF_SEL1__SHIFT
  67195. CPC_PERFCOUNTER0_SELECT__PERF_SEL_MASK
  67196. CPC_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT
  67197. CPC_PERFCOUNTER0_SELECT__SPM_MODE_MASK
  67198. CPC_PERFCOUNTER0_SELECT__SPM_MODE__SHIFT
  67199. CPC_PERFCOUNTER1_HI__PERFCOUNTER_HI_MASK
  67200. CPC_PERFCOUNTER1_HI__PERFCOUNTER_HI__SHIFT
  67201. CPC_PERFCOUNTER1_LO__PERFCOUNTER_LO_MASK
  67202. CPC_PERFCOUNTER1_LO__PERFCOUNTER_LO__SHIFT
  67203. CPC_PERFCOUNTER1_SELECT__CNTR_MODE0_MASK
  67204. CPC_PERFCOUNTER1_SELECT__CNTR_MODE0__SHIFT
  67205. CPC_PERFCOUNTER1_SELECT__CNTR_MODE1_MASK
  67206. CPC_PERFCOUNTER1_SELECT__CNTR_MODE1__SHIFT
  67207. CPC_PERFCOUNTER1_SELECT__CNTR_SEL0_MASK
  67208. CPC_PERFCOUNTER1_SELECT__CNTR_SEL0__SHIFT
  67209. CPC_PERFCOUNTER1_SELECT__CNTR_SEL1_MASK
  67210. CPC_PERFCOUNTER1_SELECT__CNTR_SEL1__SHIFT
  67211. CPC_PERFCOUNTER1_SELECT__PERF_SEL1_MASK
  67212. CPC_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT
  67213. CPC_PERFCOUNTER1_SELECT__PERF_SEL_MASK
  67214. CPC_PERFCOUNTER1_SELECT__PERF_SEL__SHIFT
  67215. CPC_PERFCOUNTER1_SELECT__SPM_MODE_MASK
  67216. CPC_PERFCOUNTER1_SELECT__SPM_MODE__SHIFT
  67217. CPC_PERFCOUNT_SEL
  67218. CPC_PERF_SEL_ALWAYS_COUNT
  67219. CPC_PERF_SEL_ATCL1_STALL_ON_TRANSLATION
  67220. CPC_PERF_SEL_ATCL2IU_STALL_WAIT_ON_FREE
  67221. CPC_PERF_SEL_ATCL2IU_STALL_WAIT_ON_TAGS
  67222. CPC_PERF_SEL_CPC_GCRIU_BUSY
  67223. CPC_PERF_SEL_CPC_GCRIU_IDLE
  67224. CPC_PERF_SEL_CPC_GCRIU_STALL
  67225. CPC_PERF_SEL_CPC_STAT_BUSY
  67226. CPC_PERF_SEL_CPC_STAT_IDLE
  67227. CPC_PERF_SEL_CPC_STAT_STALL
  67228. CPC_PERF_SEL_CPC_TCIU_BUSY
  67229. CPC_PERF_SEL_CPC_TCIU_IDLE
  67230. CPC_PERF_SEL_CPC_UTCL2IU_BUSY
  67231. CPC_PERF_SEL_CPC_UTCL2IU_IDLE
  67232. CPC_PERF_SEL_CPC_UTCL2IU_STALL
  67233. CPC_PERF_SEL_CPC_UTCL2IU_XACK
  67234. CPC_PERF_SEL_CPC_UTCL2IU_XNACK
  67235. CPC_PERF_SEL_GCRIU_STALL_WAIT_ON_FREE
  67236. CPC_PERF_SEL_ME1_BUSY_FOR_PACKET_DECODE
  67237. CPC_PERF_SEL_ME1_DC0_SPI_BUSY
  67238. CPC_PERF_SEL_ME1_STALL_ON_DATA_FROM_ROQ
  67239. CPC_PERF_SEL_ME1_STALL_ON_DATA_FROM_ROQ_PERF
  67240. CPC_PERF_SEL_ME1_STALL_WAIT_ON_GUS_READ
  67241. CPC_PERF_SEL_ME1_STALL_WAIT_ON_GUS_WRITE
  67242. CPC_PERF_SEL_ME1_STALL_WAIT_ON_MIU_READ
  67243. CPC_PERF_SEL_ME1_STALL_WAIT_ON_MIU_WRITE
  67244. CPC_PERF_SEL_ME1_STALL_WAIT_ON_RCIU_READ
  67245. CPC_PERF_SEL_ME1_STALL_WAIT_ON_RCIU_READY
  67246. CPC_PERF_SEL_ME1_STALL_WAIT_ON_RCIU_READY_PERF
  67247. CPC_PERF_SEL_ME1_STALL_WAIT_ON_TCIU_READ
  67248. CPC_PERF_SEL_ME2_BUSY_FOR_PACKET_DECODE
  67249. CPC_PERF_SEL_ME2_DC1_SPI_BUSY
  67250. CPC_PERF_SEL_ME2_STALL_ON_DATA_FROM_ROQ
  67251. CPC_PERF_SEL_ME2_STALL_ON_DATA_FROM_ROQ_PERF
  67252. CPC_PERF_SEL_ME2_STALL_WAIT_ON_GUS_READ
  67253. CPC_PERF_SEL_ME2_STALL_WAIT_ON_GUS_WRITE
  67254. CPC_PERF_SEL_ME2_STALL_WAIT_ON_MIU_READ
  67255. CPC_PERF_SEL_ME2_STALL_WAIT_ON_MIU_WRITE
  67256. CPC_PERF_SEL_ME2_STALL_WAIT_ON_RCIU_READ
  67257. CPC_PERF_SEL_ME2_STALL_WAIT_ON_RCIU_READY
  67258. CPC_PERF_SEL_ME2_STALL_WAIT_ON_RCIU_READY_PERF
  67259. CPC_PERF_SEL_ME2_STALL_WAIT_ON_TCIU_READ
  67260. CPC_PERF_SEL_MEC_INSTR_CACHE_HIT
  67261. CPC_PERF_SEL_MEC_INSTR_CACHE_MISS
  67262. CPC_PERF_SEL_MIU_STALL_ON_RDREQ_FREE
  67263. CPC_PERF_SEL_MIU_STALL_ON_WRREQ_FREE
  67264. CPC_PERF_SEL_RCIU_STALL_PRIV_VIOLATION
  67265. CPC_PERF_SEL_RCIU_STALL_WAIT_ON_FREE
  67266. CPC_PERF_SEL_TCIU_STALL_WAIT_ON_FREE
  67267. CPC_PERF_SEL_UTCL1_STALL_ON_TRANSLATION
  67268. CPC_PERF_SEL_UTCL2IU_STALL_WAIT_ON_FREE
  67269. CPC_PERF_SEL_UTCL2IU_STALL_WAIT_ON_TAGS
  67270. CPC_PWRUP_CTL_CM_PWRUP
  67271. CPC_SUPPORTED
  67272. CPC_SUSPEND_CNTL_STACK_OFFSET__OFFSET_MASK
  67273. CPC_SUSPEND_CNTL_STACK_OFFSET__OFFSET__SHIFT
  67274. CPC_SUSPEND_CNTL_STACK_SIZE__SIZE_MASK
  67275. CPC_SUSPEND_CNTL_STACK_SIZE__SIZE__SHIFT
  67276. CPC_SUSPEND_CTX_SAVE_BASE_ADDR_HI__ADDR_HI_MASK
  67277. CPC_SUSPEND_CTX_SAVE_BASE_ADDR_HI__ADDR_HI__SHIFT
  67278. CPC_SUSPEND_CTX_SAVE_BASE_ADDR_LO__ADDR_MASK
  67279. CPC_SUSPEND_CTX_SAVE_BASE_ADDR_LO__ADDR__SHIFT
  67280. CPC_SUSPEND_CTX_SAVE_CONTROL__EXE_DISABLE_MASK
  67281. CPC_SUSPEND_CTX_SAVE_CONTROL__EXE_DISABLE__SHIFT
  67282. CPC_SUSPEND_CTX_SAVE_CONTROL__POLICY_MASK
  67283. CPC_SUSPEND_CTX_SAVE_CONTROL__POLICY__SHIFT
  67284. CPC_SUSPEND_CTX_SAVE_SIZE__SIZE_MASK
  67285. CPC_SUSPEND_CTX_SAVE_SIZE__SIZE__SHIFT
  67286. CPC_SUSPEND_WG_STATE_OFFSET__OFFSET_MASK
  67287. CPC_SUSPEND_WG_STATE_OFFSET__OFFSET__SHIFT
  67288. CPC_SYS_CONFIG_BE
  67289. CPC_SYS_CONFIG_BE_IMMEDIATE
  67290. CPC_SYS_CONFIG_BE_STATUS
  67291. CPC_TAG_RAM
  67292. CPC_TX_QUEUE_TRIGGER_HIGH
  67293. CPC_TX_QUEUE_TRIGGER_LOW
  67294. CPC_UTCL1_CNTL__BYPASS_MASK
  67295. CPC_UTCL1_CNTL__BYPASS__SHIFT
  67296. CPC_UTCL1_CNTL__DROP_MODE_MASK
  67297. CPC_UTCL1_CNTL__DROP_MODE__SHIFT
  67298. CPC_UTCL1_CNTL__FORCE_SD_VMID_DIRTY_MASK
  67299. CPC_UTCL1_CNTL__FORCE_SD_VMID_DIRTY__SHIFT
  67300. CPC_UTCL1_CNTL__FORCE_SNOOP_MASK
  67301. CPC_UTCL1_CNTL__FORCE_SNOOP__SHIFT
  67302. CPC_UTCL1_CNTL__FRAG_LIMIT_MODE_MASK
  67303. CPC_UTCL1_CNTL__FRAG_LIMIT_MODE__SHIFT
  67304. CPC_UTCL1_CNTL__INVALIDATE_MASK
  67305. CPC_UTCL1_CNTL__INVALIDATE__SHIFT
  67306. CPC_UTCL1_CNTL__MTYPE_NO_PTE_MODE_MASK
  67307. CPC_UTCL1_CNTL__MTYPE_NO_PTE_MODE__SHIFT
  67308. CPC_UTCL1_CNTL__XNACK_REDO_TIMER_CNT_MASK
  67309. CPC_UTCL1_CNTL__XNACK_REDO_TIMER_CNT__SHIFT
  67310. CPC_UTCL1_ERROR__ERROR_DETECTED_HALT_MASK
  67311. CPC_UTCL1_ERROR__ERROR_DETECTED_HALT__SHIFT
  67312. CPC_UTCL1_STATUS__FAULT_DETECTED_MASK
  67313. CPC_UTCL1_STATUS__FAULT_DETECTED__SHIFT
  67314. CPC_UTCL1_STATUS__FAULT_UTCL1ID_MASK
  67315. CPC_UTCL1_STATUS__FAULT_UTCL1ID__SHIFT
  67316. CPC_UTCL1_STATUS__PRT_DETECTED_MASK
  67317. CPC_UTCL1_STATUS__PRT_DETECTED__SHIFT
  67318. CPC_UTCL1_STATUS__PRT_UTCL1ID_MASK
  67319. CPC_UTCL1_STATUS__PRT_UTCL1ID__SHIFT
  67320. CPC_UTCL1_STATUS__RETRY_DETECTED_MASK
  67321. CPC_UTCL1_STATUS__RETRY_DETECTED__SHIFT
  67322. CPC_UTCL1_STATUS__RETRY_UTCL1ID_MASK
  67323. CPC_UTCL1_STATUS__RETRY_UTCL1ID__SHIFT
  67324. CPD
  67325. CPDMA_CMD_IDLE
  67326. CPDMA_COPY_ERROR_FRAMES
  67327. CPDMA_DESC_CRC_LEN
  67328. CPDMA_DESC_EOP
  67329. CPDMA_DESC_EOQ
  67330. CPDMA_DESC_OWNER
  67331. CPDMA_DESC_PASS_CRC
  67332. CPDMA_DESC_PORT_MASK
  67333. CPDMA_DESC_SOP
  67334. CPDMA_DESC_TD_COMPLETE
  67335. CPDMA_DESC_TO_PORT_EN
  67336. CPDMA_DMACONTROL
  67337. CPDMA_DMAINTMASKCLEAR
  67338. CPDMA_DMAINTMASKSET
  67339. CPDMA_DMAINTSTATMASKED
  67340. CPDMA_DMAINTSTATRAW
  67341. CPDMA_DMAINT_HOSTERR
  67342. CPDMA_DMASTATUS
  67343. CPDMA_DMA_EXT_MAP
  67344. CPDMA_EM_CONTROL
  67345. CPDMA_EOI_MISC
  67346. CPDMA_EOI_RX
  67347. CPDMA_EOI_RX_THRESH
  67348. CPDMA_EOI_TX
  67349. CPDMA_MACEOIVECTOR
  67350. CPDMA_MACINVECTOR
  67351. CPDMA_MAX_CHANNELS
  67352. CPDMA_MAX_RLIM_CNT
  67353. CPDMA_RXBUFFOFS
  67354. CPDMA_RXCONTROL
  67355. CPDMA_RXCP
  67356. CPDMA_RXFREE
  67357. CPDMA_RXHDP
  67358. CPDMA_RXIDVER
  67359. CPDMA_RXINTMASKCLEAR
  67360. CPDMA_RXINTMASKSET
  67361. CPDMA_RXINTSTATMASKED
  67362. CPDMA_RXINTSTATRAW
  67363. CPDMA_RXTEARDOWN
  67364. CPDMA_RXTHRESH
  67365. CPDMA_RX_BUFFER_OFFSET
  67366. CPDMA_RX_OFF_LEN_UPDATE
  67367. CPDMA_RX_OWNERSHIP_FLIP
  67368. CPDMA_RX_SOURCE_PORT
  67369. CPDMA_RX_STAT
  67370. CPDMA_RX_STATS
  67371. CPDMA_RX_VLAN_ENCAP
  67372. CPDMA_SOFTRESET
  67373. CPDMA_STATE_ACTIVE
  67374. CPDMA_STATE_IDLE
  67375. CPDMA_STATE_TEARDOWN
  67376. CPDMA_STAT_IDLE
  67377. CPDMA_STAT_RX_ERR_CHAN
  67378. CPDMA_STAT_RX_ERR_CODE
  67379. CPDMA_STAT_TX_ERR_CHAN
  67380. CPDMA_STAT_TX_ERR_CODE
  67381. CPDMA_TEARDOWN_VALUE
  67382. CPDMA_TO_PORT_SHIFT
  67383. CPDMA_TXCONTROL
  67384. CPDMA_TXCP
  67385. CPDMA_TXHDP
  67386. CPDMA_TXIDVER
  67387. CPDMA_TXINTMASKCLEAR
  67388. CPDMA_TXINTMASKSET
  67389. CPDMA_TXINTSTATMASKED
  67390. CPDMA_TXINTSTATRAW
  67391. CPDMA_TXTEARDOWN
  67392. CPDMA_TX_PRI0_RATE
  67393. CPDMA_TX_PRIORITY_MAP
  67394. CPDMA_TX_PRIO_FIXED
  67395. CPDMA_TX_RLIM
  67396. CPDMA_TX_STAT
  67397. CPDMA_TX_STATS
  67398. CPEI_OVERRIDE_DEFAULT
  67399. CPER_ARM_BUS_ERROR
  67400. CPER_ARM_CACHE_ERROR
  67401. CPER_ARM_ERR_ACCESS_MODE_MASK
  67402. CPER_ARM_ERR_ACCESS_MODE_SHIFT
  67403. CPER_ARM_ERR_ADDRESS_SPACE_MASK
  67404. CPER_ARM_ERR_ADDRESS_SPACE_SHIFT
  67405. CPER_ARM_ERR_CORRECTED_MASK
  67406. CPER_ARM_ERR_CORRECTED_SHIFT
  67407. CPER_ARM_ERR_LEVEL_MASK
  67408. CPER_ARM_ERR_LEVEL_SHIFT
  67409. CPER_ARM_ERR_MEM_ATTRIBUTES_MASK
  67410. CPER_ARM_ERR_MEM_ATTRIBUTES_SHIFT
  67411. CPER_ARM_ERR_OPERATION_MASK
  67412. CPER_ARM_ERR_OPERATION_SHIFT
  67413. CPER_ARM_ERR_PARTICIPATION_TYPE_MASK
  67414. CPER_ARM_ERR_PARTICIPATION_TYPE_SHIFT
  67415. CPER_ARM_ERR_PC_CORRUPT_MASK
  67416. CPER_ARM_ERR_PC_CORRUPT_SHIFT
  67417. CPER_ARM_ERR_PRECISE_PC_MASK
  67418. CPER_ARM_ERR_PRECISE_PC_SHIFT
  67419. CPER_ARM_ERR_RESTARTABLE_PC_MASK
  67420. CPER_ARM_ERR_RESTARTABLE_PC_SHIFT
  67421. CPER_ARM_ERR_TIME_OUT_MASK
  67422. CPER_ARM_ERR_TIME_OUT_SHIFT
  67423. CPER_ARM_ERR_TRANSACTION_MASK
  67424. CPER_ARM_ERR_TRANSACTION_SHIFT
  67425. CPER_ARM_ERR_VALID_ACCESS_MODE
  67426. CPER_ARM_ERR_VALID_ADDRESS_SPACE
  67427. CPER_ARM_ERR_VALID_CORRECTED
  67428. CPER_ARM_ERR_VALID_LEVEL
  67429. CPER_ARM_ERR_VALID_MEM_ATTRIBUTES
  67430. CPER_ARM_ERR_VALID_OPERATION_TYPE
  67431. CPER_ARM_ERR_VALID_PARTICIPATION_TYPE
  67432. CPER_ARM_ERR_VALID_PRECISE_PC
  67433. CPER_ARM_ERR_VALID_PROC_CONTEXT_CORRUPT
  67434. CPER_ARM_ERR_VALID_RESTARTABLE_PC
  67435. CPER_ARM_ERR_VALID_TIME_OUT
  67436. CPER_ARM_ERR_VALID_TRANSACTION_TYPE
  67437. CPER_ARM_INFO_FLAGS_FIRST
  67438. CPER_ARM_INFO_FLAGS_LAST
  67439. CPER_ARM_INFO_FLAGS_OVERFLOW
  67440. CPER_ARM_INFO_FLAGS_PROPAGATED
  67441. CPER_ARM_INFO_VALID_ERR_INFO
  67442. CPER_ARM_INFO_VALID_FLAGS
  67443. CPER_ARM_INFO_VALID_MULTI_ERR
  67444. CPER_ARM_INFO_VALID_PHYSICAL_ADDR
  67445. CPER_ARM_INFO_VALID_VIRT_ADDR
  67446. CPER_ARM_MAX_TYPE
  67447. CPER_ARM_TLB_ERROR
  67448. CPER_ARM_VALID_AFFINITY_LEVEL
  67449. CPER_ARM_VALID_MPIDR
  67450. CPER_ARM_VALID_RUNNING_STATE
  67451. CPER_ARM_VALID_VENDOR_INFO
  67452. CPER_ARM_VENDOR_ERROR
  67453. CPER_CREATOR_MCE
  67454. CPER_CREATOR_PSTORE
  67455. CPER_HW_ERROR_FLAGS_PREVERR
  67456. CPER_HW_ERROR_FLAGS_RECOVERED
  67457. CPER_HW_ERROR_FLAGS_SIMULATED
  67458. CPER_MEM_VALID_BANK
  67459. CPER_MEM_VALID_BIT_POSITION
  67460. CPER_MEM_VALID_CARD
  67461. CPER_MEM_VALID_CARD_HANDLE
  67462. CPER_MEM_VALID_COLUMN
  67463. CPER_MEM_VALID_DEVICE
  67464. CPER_MEM_VALID_ERROR_STATUS
  67465. CPER_MEM_VALID_ERROR_TYPE
  67466. CPER_MEM_VALID_MODULE
  67467. CPER_MEM_VALID_MODULE_HANDLE
  67468. CPER_MEM_VALID_NODE
  67469. CPER_MEM_VALID_PA
  67470. CPER_MEM_VALID_PA_MASK
  67471. CPER_MEM_VALID_RANK_NUMBER
  67472. CPER_MEM_VALID_REQUESTOR_ID
  67473. CPER_MEM_VALID_RESPONDER_ID
  67474. CPER_MEM_VALID_ROW
  67475. CPER_MEM_VALID_TARGET_ID
  67476. CPER_NOTIFY_BOOT
  67477. CPER_NOTIFY_CMC
  67478. CPER_NOTIFY_CPE
  67479. CPER_NOTIFY_DMAR
  67480. CPER_NOTIFY_INIT
  67481. CPER_NOTIFY_MCE
  67482. CPER_NOTIFY_NMI
  67483. CPER_NOTIFY_PCIE
  67484. CPER_PCIE_SLOT_SHIFT
  67485. CPER_PCIE_VALID_AER_INFO
  67486. CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS
  67487. CPER_PCIE_VALID_CAPABILITY
  67488. CPER_PCIE_VALID_COMMAND_STATUS
  67489. CPER_PCIE_VALID_DEVICE_ID
  67490. CPER_PCIE_VALID_PORT_TYPE
  67491. CPER_PCIE_VALID_SERIAL_NUMBER
  67492. CPER_PCIE_VALID_VERSION
  67493. CPER_PROC_VALID_BRAND_INFO
  67494. CPER_PROC_VALID_ERROR_TYPE
  67495. CPER_PROC_VALID_FLAGS
  67496. CPER_PROC_VALID_ID
  67497. CPER_PROC_VALID_IP
  67498. CPER_PROC_VALID_ISA
  67499. CPER_PROC_VALID_LEVEL
  67500. CPER_PROC_VALID_OPERATION
  67501. CPER_PROC_VALID_REQUESTOR_ID
  67502. CPER_PROC_VALID_RESPONDER_ID
  67503. CPER_PROC_VALID_TARGET_ADDRESS
  67504. CPER_PROC_VALID_TYPE
  67505. CPER_PROC_VALID_VERSION
  67506. CPER_RECORD_REV
  67507. CPER_REC_LEN
  67508. CPER_SECTION_TYPE_DMESG
  67509. CPER_SECTION_TYPE_DMESG_Z
  67510. CPER_SECTION_TYPE_MCE
  67511. CPER_SEC_CONTAINMENT_WARNING
  67512. CPER_SEC_DMAR_GENERIC
  67513. CPER_SEC_DMAR_IOMMU
  67514. CPER_SEC_DMAR_VT
  67515. CPER_SEC_ERROR_THRESHOLD_EXCEEDED
  67516. CPER_SEC_FW_ERR_REC_REF
  67517. CPER_SEC_LATENT_ERROR
  67518. CPER_SEC_PCIE
  67519. CPER_SEC_PCI_DEV
  67520. CPER_SEC_PCI_X_BUS
  67521. CPER_SEC_PLATFORM_MEM
  67522. CPER_SEC_PRIMARY
  67523. CPER_SEC_PROC_ARM
  67524. CPER_SEC_PROC_GENERIC
  67525. CPER_SEC_PROC_IA
  67526. CPER_SEC_PROC_IPF
  67527. CPER_SEC_RESET
  67528. CPER_SEC_RESOURCE_NOT_ACCESSIBLE
  67529. CPER_SEC_REV
  67530. CPER_SEC_VALID_FRU_ID
  67531. CPER_SEC_VALID_FRU_TEXT
  67532. CPER_SEV_CORRECTED
  67533. CPER_SEV_FATAL
  67534. CPER_SEV_INFORMATIONAL
  67535. CPER_SEV_RECOVERABLE
  67536. CPER_SIG_END
  67537. CPER_SIG_RECORD
  67538. CPER_SIG_SIZE
  67539. CPER_VALID_PARTITION_ID
  67540. CPER_VALID_PLATFORM_ID
  67541. CPER_VALID_TIMESTAMP
  67542. CPE_HISTORY_LENGTH
  67543. CPE_OP
  67544. CPE_Q_NUM
  67545. CPF
  67546. CPF_BUSY
  67547. CPF_CURRENTPITCH
  67548. CPF_CURRENTPITCH_MASK
  67549. CPF_EDC_ROQ_CNT__COUNT_ME1_MASK
  67550. CPF_EDC_ROQ_CNT__COUNT_ME1__SHIFT
  67551. CPF_EDC_ROQ_CNT__COUNT_ME2_MASK
  67552. CPF_EDC_ROQ_CNT__COUNT_ME2__SHIFT
  67553. CPF_EDC_TAG_CNT__DED_COUNT_MASK
  67554. CPF_EDC_TAG_CNT__DED_COUNT__SHIFT
  67555. CPF_EDC_TAG_CNT__SEC_COUNT_MASK
  67556. CPF_EDC_TAG_CNT__SEC_COUNT__SHIFT
  67557. CPF_FRACADDRESS_MASK
  67558. CPF_GCR_CNTL__GCR_GL_CMD_MASK
  67559. CPF_GCR_CNTL__GCR_GL_CMD__SHIFT
  67560. CPF_LATENCY_STATS_DATA__DATA_MASK
  67561. CPF_LATENCY_STATS_DATA__DATA__SHIFT
  67562. CPF_LATENCY_STATS_SEL
  67563. CPF_LATENCY_STATS_SELECT__CLEAR_MASK
  67564. CPF_LATENCY_STATS_SELECT__CLEAR__SHIFT
  67565. CPF_LATENCY_STATS_SELECT__ENABLE_MASK
  67566. CPF_LATENCY_STATS_SELECT__ENABLE__SHIFT
  67567. CPF_LATENCY_STATS_SELECT__INDEX_MASK
  67568. CPF_LATENCY_STATS_SELECT__INDEX__SHIFT
  67569. CPF_LATENCY_STATS_SEL_INVAL_LAST
  67570. CPF_LATENCY_STATS_SEL_INVAL_MAX
  67571. CPF_LATENCY_STATS_SEL_INVAL_MIN
  67572. CPF_LATENCY_STATS_SEL_READ_LAST
  67573. CPF_LATENCY_STATS_SEL_READ_MAX
  67574. CPF_LATENCY_STATS_SEL_READ_MIN
  67575. CPF_LATENCY_STATS_SEL_XACK_LAST
  67576. CPF_LATENCY_STATS_SEL_XACK_MAX
  67577. CPF_LATENCY_STATS_SEL_XACK_MIN
  67578. CPF_LATENCY_STATS_SEL_XNACK_LAST
  67579. CPF_LATENCY_STATS_SEL_XNACK_MAX
  67580. CPF_LATENCY_STATS_SEL_XNACK_MIN
  67581. CPF_PERFCOUNTER0_HI__PERFCOUNTER_HI_MASK
  67582. CPF_PERFCOUNTER0_HI__PERFCOUNTER_HI__SHIFT
  67583. CPF_PERFCOUNTER0_LO__PERFCOUNTER_LO_MASK
  67584. CPF_PERFCOUNTER0_LO__PERFCOUNTER_LO__SHIFT
  67585. CPF_PERFCOUNTER0_SELECT1__CNTR_MODE2_MASK
  67586. CPF_PERFCOUNTER0_SELECT1__CNTR_MODE2__SHIFT
  67587. CPF_PERFCOUNTER0_SELECT1__CNTR_MODE3_MASK
  67588. CPF_PERFCOUNTER0_SELECT1__CNTR_MODE3__SHIFT
  67589. CPF_PERFCOUNTER0_SELECT1__CNTR_SEL2_MASK
  67590. CPF_PERFCOUNTER0_SELECT1__CNTR_SEL2__SHIFT
  67591. CPF_PERFCOUNTER0_SELECT1__CNTR_SEL3_MASK
  67592. CPF_PERFCOUNTER0_SELECT1__CNTR_SEL3__SHIFT
  67593. CPF_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK
  67594. CPF_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT
  67595. CPF_PERFCOUNTER0_SELECT1__PERF_SEL3_MASK
  67596. CPF_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT
  67597. CPF_PERFCOUNTER0_SELECT__CNTR_MODE0_MASK
  67598. CPF_PERFCOUNTER0_SELECT__CNTR_MODE0__SHIFT
  67599. CPF_PERFCOUNTER0_SELECT__CNTR_MODE1_MASK
  67600. CPF_PERFCOUNTER0_SELECT__CNTR_MODE1__SHIFT
  67601. CPF_PERFCOUNTER0_SELECT__CNTR_MODE_MASK
  67602. CPF_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT
  67603. CPF_PERFCOUNTER0_SELECT__CNTR_SEL0_MASK
  67604. CPF_PERFCOUNTER0_SELECT__CNTR_SEL0__SHIFT
  67605. CPF_PERFCOUNTER0_SELECT__CNTR_SEL1_MASK
  67606. CPF_PERFCOUNTER0_SELECT__CNTR_SEL1__SHIFT
  67607. CPF_PERFCOUNTER0_SELECT__PERF_SEL1_MASK
  67608. CPF_PERFCOUNTER0_SELECT__PERF_SEL1__SHIFT
  67609. CPF_PERFCOUNTER0_SELECT__PERF_SEL_MASK
  67610. CPF_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT
  67611. CPF_PERFCOUNTER0_SELECT__SPM_MODE_MASK
  67612. CPF_PERFCOUNTER0_SELECT__SPM_MODE__SHIFT
  67613. CPF_PERFCOUNTER1_HI__PERFCOUNTER_HI_MASK
  67614. CPF_PERFCOUNTER1_HI__PERFCOUNTER_HI__SHIFT
  67615. CPF_PERFCOUNTER1_LO__PERFCOUNTER_LO_MASK
  67616. CPF_PERFCOUNTER1_LO__PERFCOUNTER_LO__SHIFT
  67617. CPF_PERFCOUNTER1_SELECT__CNTR_MODE0_MASK
  67618. CPF_PERFCOUNTER1_SELECT__CNTR_MODE0__SHIFT
  67619. CPF_PERFCOUNTER1_SELECT__CNTR_MODE1_MASK
  67620. CPF_PERFCOUNTER1_SELECT__CNTR_MODE1__SHIFT
  67621. CPF_PERFCOUNTER1_SELECT__CNTR_SEL0_MASK
  67622. CPF_PERFCOUNTER1_SELECT__CNTR_SEL0__SHIFT
  67623. CPF_PERFCOUNTER1_SELECT__CNTR_SEL1_MASK
  67624. CPF_PERFCOUNTER1_SELECT__CNTR_SEL1__SHIFT
  67625. CPF_PERFCOUNTER1_SELECT__PERF_SEL1_MASK
  67626. CPF_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT
  67627. CPF_PERFCOUNTER1_SELECT__PERF_SEL_MASK
  67628. CPF_PERFCOUNTER1_SELECT__PERF_SEL__SHIFT
  67629. CPF_PERFCOUNTER1_SELECT__SPM_MODE_MASK
  67630. CPF_PERFCOUNTER1_SELECT__SPM_MODE__SHIFT
  67631. CPF_PERFCOUNTWINDOW_SEL
  67632. CPF_PERFCOUNT_SEL
  67633. CPF_PERFWINDOW_SEL_CSF
  67634. CPF_PERFWINDOW_SEL_HQD1
  67635. CPF_PERFWINDOW_SEL_HQD2
  67636. CPF_PERFWINDOW_SEL_RDMA
  67637. CPF_PERFWINDOW_SEL_RWPP
  67638. CPF_PERF_SEL_ALWAYS_COUNT
  67639. CPF_PERF_SEL_ATCL1_STALL_ON_TRANSLATION
  67640. CPF_PERF_SEL_ATCL2IU_STALL_WAIT_ON_FREE
  67641. CPF_PERF_SEL_ATCL2IU_STALL_WAIT_ON_TAGS
  67642. CPF_PERF_SEL_CMP_UTCL1_STALL_ON_TRANSLATION
  67643. CPF_PERF_SEL_CPF_GCRIU_BUSY
  67644. CPF_PERF_SEL_CPF_GCRIU_IDLE
  67645. CPF_PERF_SEL_CPF_GCRIU_STALL
  67646. CPF_PERF_SEL_CPF_STAT_BUSY
  67647. CPF_PERF_SEL_CPF_STAT_IDLE
  67648. CPF_PERF_SEL_CPF_STAT_STALL
  67649. CPF_PERF_SEL_CPF_TCIU_BUSY
  67650. CPF_PERF_SEL_CPF_TCIU_IDLE
  67651. CPF_PERF_SEL_CPF_TCIU_STALL
  67652. CPF_PERF_SEL_CPF_UTCL2IU_BUSY
  67653. CPF_PERF_SEL_CPF_UTCL2IU_IDLE
  67654. CPF_PERF_SEL_CPF_UTCL2IU_STALL
  67655. CPF_PERF_SEL_CPF_UTCL2IU_XACK
  67656. CPF_PERF_SEL_CPF_UTCL2IU_XNACK
  67657. CPF_PERF_SEL_CPG_TCIU_STALL
  67658. CPF_PERF_SEL_CSF_BUSY_FOR_FECTHINC_STATE
  67659. CPF_PERF_SEL_CSF_BUSY_FOR_FETCHING_DB
  67660. CPF_PERF_SEL_CSF_BUSY_FOR_FETCHING_IB1
  67661. CPF_PERF_SEL_CSF_BUSY_FOR_FETCHING_IB2
  67662. CPF_PERF_SEL_CSF_BUSY_FOR_FETCHING_RING
  67663. CPF_PERF_SEL_CSF_FETCHING_CMD_BUFFERS
  67664. CPF_PERF_SEL_CSF_RTS_MIU_NOT_RTR
  67665. CPF_PERF_SEL_CSF_STATE_FIFO_NOT_RTR
  67666. CPF_PERF_SEL_DYNAMIC_CLOCK_VALID
  67667. CPF_PERF_SEL_GCRIU_STALL_WAIT_ON_FREE
  67668. CPF_PERF_SEL_GFX_UTCL1_STALL_ON_TRANSLATION
  67669. CPF_PERF_SEL_GRBM_DWORDS_SENT
  67670. CPF_PERF_SEL_GUS_READ_REQUEST_SEND
  67671. CPF_PERF_SEL_GUS_WRITE_REQUEST_SEND
  67672. CPF_PERF_SEL_MIU_BUSY_FOR_OUTSTANDING_TAGS
  67673. CPF_PERF_SEL_MIU_READ_REQUEST_SEND
  67674. CPF_PERF_SEL_MIU_STALLED_WAITING_RDREQ_FREE
  67675. CPF_PERF_SEL_MIU_WRITE_REQUEST_SEND
  67676. CPF_PERF_SEL_RCIU_STALL_WAIT_ON_FREE
  67677. CPF_PERF_SEL_REGISTER_CLOCK_VALID
  67678. CPF_PERF_SEL_TCIU_READ_REQUEST_SENT
  67679. CPF_PERF_SEL_TCIU_STALLED_WAITING_ON_FREE
  67680. CPF_PERF_SEL_TCIU_STALLED_WAITING_ON_TAGS
  67681. CPF_PERF_SEL_TCIU_WRITE_REQUEST_SENT
  67682. CPF_PERF_SEL_UTCL1_STALL_ON_TRANSLATION
  67683. CPF_PERF_SEL_UTCL2IU_STALL_WAIT_ON_FREE
  67684. CPF_PERF_SEL_UTCL2IU_STALL_WAIT_ON_TAGS
  67685. CPF_STEREO_MASK
  67686. CPF_STOP_MASK
  67687. CPF_TAG_RAM
  67688. CPF_TC_PERF_COUNTER_WINDOW_SELECT__ALWAYS_MASK
  67689. CPF_TC_PERF_COUNTER_WINDOW_SELECT__ALWAYS__SHIFT
  67690. CPF_TC_PERF_COUNTER_WINDOW_SELECT__ENABLE_MASK
  67691. CPF_TC_PERF_COUNTER_WINDOW_SELECT__ENABLE__SHIFT
  67692. CPF_TC_PERF_COUNTER_WINDOW_SELECT__INDEX_MASK
  67693. CPF_TC_PERF_COUNTER_WINDOW_SELECT__INDEX__SHIFT
  67694. CPF_UTCL1_CNTL__BYPASS_MASK
  67695. CPF_UTCL1_CNTL__BYPASS__SHIFT
  67696. CPF_UTCL1_CNTL__DROP_MODE_MASK
  67697. CPF_UTCL1_CNTL__DROP_MODE__SHIFT
  67698. CPF_UTCL1_CNTL__FORCE_NO_EXE_MASK
  67699. CPF_UTCL1_CNTL__FORCE_NO_EXE__SHIFT
  67700. CPF_UTCL1_CNTL__FORCE_SD_VMID_DIRTY_MASK
  67701. CPF_UTCL1_CNTL__FORCE_SD_VMID_DIRTY__SHIFT
  67702. CPF_UTCL1_CNTL__FORCE_SNOOP_MASK
  67703. CPF_UTCL1_CNTL__FORCE_SNOOP__SHIFT
  67704. CPF_UTCL1_CNTL__FRAG_LIMIT_MODE_MASK
  67705. CPF_UTCL1_CNTL__FRAG_LIMIT_MODE__SHIFT
  67706. CPF_UTCL1_CNTL__INVALIDATE_MASK
  67707. CPF_UTCL1_CNTL__INVALIDATE__SHIFT
  67708. CPF_UTCL1_CNTL__MTYPE_NO_PTE_MODE_MASK
  67709. CPF_UTCL1_CNTL__MTYPE_NO_PTE_MODE__SHIFT
  67710. CPF_UTCL1_CNTL__VMID_RESET_MODE_MASK
  67711. CPF_UTCL1_CNTL__VMID_RESET_MODE__SHIFT
  67712. CPF_UTCL1_CNTL__XNACK_REDO_TIMER_CNT_MASK
  67713. CPF_UTCL1_CNTL__XNACK_REDO_TIMER_CNT__SHIFT
  67714. CPF_UTCL1_STATUS__FAULT_DETECTED_MASK
  67715. CPF_UTCL1_STATUS__FAULT_DETECTED__SHIFT
  67716. CPF_UTCL1_STATUS__FAULT_UTCL1ID_MASK
  67717. CPF_UTCL1_STATUS__FAULT_UTCL1ID__SHIFT
  67718. CPF_UTCL1_STATUS__PRT_DETECTED_MASK
  67719. CPF_UTCL1_STATUS__PRT_DETECTED__SHIFT
  67720. CPF_UTCL1_STATUS__PRT_UTCL1ID_MASK
  67721. CPF_UTCL1_STATUS__PRT_UTCL1ID__SHIFT
  67722. CPF_UTCL1_STATUS__RETRY_DETECTED_MASK
  67723. CPF_UTCL1_STATUS__RETRY_DETECTED__SHIFT
  67724. CPF_UTCL1_STATUS__RETRY_UTCL1ID_MASK
  67725. CPF_UTCL1_STATUS__RETRY_UTCL1ID__SHIFT
  67726. CPG2_FRQCR3
  67727. CPG_ADSPCKCR
  67728. CPG_BUSY
  67729. CPG_CKSCR
  67730. CPG_CKSTP_BIT
  67731. CPG_CLK_CONFIG_INDEX
  67732. CPG_CONFIG__CPG_RDREQ_URG_MASK
  67733. CPG_CONFIG__CPG_RDREQ_URG__SHIFT
  67734. CPG_CONFIG__CPG_REQ_TRAN_MASK
  67735. CPG_CONFIG__CPG_REQ_TRAN__SHIFT
  67736. CPG_CORE
  67737. CPG_DIV6_CKSTP
  67738. CPG_DIV6_DIV
  67739. CPG_DIV6_DIV_MASK
  67740. CPG_DSI0PHYCR
  67741. CPG_DSI1PHYCR
  67742. CPG_EDC_DMA_CNT__ROQ_COUNT_MASK
  67743. CPG_EDC_DMA_CNT__ROQ_COUNT__SHIFT
  67744. CPG_EDC_DMA_CNT__TAG_DED_COUNT_MASK
  67745. CPG_EDC_DMA_CNT__TAG_DED_COUNT__SHIFT
  67746. CPG_EDC_DMA_CNT__TAG_SEC_COUNT_MASK
  67747. CPG_EDC_DMA_CNT__TAG_SEC_COUNT__SHIFT
  67748. CPG_EDC_TAG_CNT__DED_COUNT_MASK
  67749. CPG_EDC_TAG_CNT__DED_COUNT__SHIFT
  67750. CPG_EDC_TAG_CNT__SEC_COUNT_MASK
  67751. CPG_EDC_TAG_CNT__SEC_COUNT__SHIFT
  67752. CPG_FRQCR
  67753. CPG_FRQCR2
  67754. CPG_FRQCRA
  67755. CPG_FRQCRB
  67756. CPG_FRQCRB_KICK
  67757. CPG_FRQCRC
  67758. CPG_FRQCRC_ZFC_MASK
  67759. CPG_FRQCRC_ZFC_SHIFT
  67760. CPG_LATENCY_STATS_DATA__DATA_MASK
  67761. CPG_LATENCY_STATS_DATA__DATA__SHIFT
  67762. CPG_LATENCY_STATS_SEL
  67763. CPG_LATENCY_STATS_SELECT__CLEAR_MASK
  67764. CPG_LATENCY_STATS_SELECT__CLEAR__SHIFT
  67765. CPG_LATENCY_STATS_SELECT__ENABLE_MASK
  67766. CPG_LATENCY_STATS_SELECT__ENABLE__SHIFT
  67767. CPG_LATENCY_STATS_SELECT__INDEX_MASK
  67768. CPG_LATENCY_STATS_SELECT__INDEX__SHIFT
  67769. CPG_LATENCY_STATS_SEL_ATOMIC_LAST
  67770. CPG_LATENCY_STATS_SEL_ATOMIC_MAX
  67771. CPG_LATENCY_STATS_SEL_ATOMIC_MIN
  67772. CPG_LATENCY_STATS_SEL_INVAL_LAST
  67773. CPG_LATENCY_STATS_SEL_INVAL_MAX
  67774. CPG_LATENCY_STATS_SEL_INVAL_MIN
  67775. CPG_LATENCY_STATS_SEL_READ_LAST
  67776. CPG_LATENCY_STATS_SEL_READ_MAX
  67777. CPG_LATENCY_STATS_SEL_READ_MIN
  67778. CPG_LATENCY_STATS_SEL_WRITE_LAST
  67779. CPG_LATENCY_STATS_SEL_WRITE_MAX
  67780. CPG_LATENCY_STATS_SEL_WRITE_MIN
  67781. CPG_LATENCY_STATS_SEL_XACK_LAST
  67782. CPG_LATENCY_STATS_SEL_XACK_MAX
  67783. CPG_LATENCY_STATS_SEL_XACK_MIN
  67784. CPG_LATENCY_STATS_SEL_XNACK_LAST
  67785. CPG_LATENCY_STATS_SEL_XNACK_MAX
  67786. CPG_LATENCY_STATS_SEL_XNACK_MIN
  67787. CPG_MOD
  67788. CPG_NUM_CLOCKS
  67789. CPG_PERFCOUNTER0_HI__PERFCOUNTER_HI_MASK
  67790. CPG_PERFCOUNTER0_HI__PERFCOUNTER_HI__SHIFT
  67791. CPG_PERFCOUNTER0_LO__PERFCOUNTER_LO_MASK
  67792. CPG_PERFCOUNTER0_LO__PERFCOUNTER_LO__SHIFT
  67793. CPG_PERFCOUNTER0_SELECT1__CNTR_MODE2_MASK
  67794. CPG_PERFCOUNTER0_SELECT1__CNTR_MODE2__SHIFT
  67795. CPG_PERFCOUNTER0_SELECT1__CNTR_MODE3_MASK
  67796. CPG_PERFCOUNTER0_SELECT1__CNTR_MODE3__SHIFT
  67797. CPG_PERFCOUNTER0_SELECT1__CNTR_SEL2_MASK
  67798. CPG_PERFCOUNTER0_SELECT1__CNTR_SEL2__SHIFT
  67799. CPG_PERFCOUNTER0_SELECT1__CNTR_SEL3_MASK
  67800. CPG_PERFCOUNTER0_SELECT1__CNTR_SEL3__SHIFT
  67801. CPG_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK
  67802. CPG_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT
  67803. CPG_PERFCOUNTER0_SELECT1__PERF_SEL3_MASK
  67804. CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT
  67805. CPG_PERFCOUNTER0_SELECT__CNTR_MODE0_MASK
  67806. CPG_PERFCOUNTER0_SELECT__CNTR_MODE0__SHIFT
  67807. CPG_PERFCOUNTER0_SELECT__CNTR_MODE1_MASK
  67808. CPG_PERFCOUNTER0_SELECT__CNTR_MODE1__SHIFT
  67809. CPG_PERFCOUNTER0_SELECT__CNTR_MODE_MASK
  67810. CPG_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT
  67811. CPG_PERFCOUNTER0_SELECT__CNTR_SEL0_MASK
  67812. CPG_PERFCOUNTER0_SELECT__CNTR_SEL0__SHIFT
  67813. CPG_PERFCOUNTER0_SELECT__CNTR_SEL1_MASK
  67814. CPG_PERFCOUNTER0_SELECT__CNTR_SEL1__SHIFT
  67815. CPG_PERFCOUNTER0_SELECT__PERF_SEL1_MASK
  67816. CPG_PERFCOUNTER0_SELECT__PERF_SEL1__SHIFT
  67817. CPG_PERFCOUNTER0_SELECT__PERF_SEL_MASK
  67818. CPG_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT
  67819. CPG_PERFCOUNTER0_SELECT__SPM_MODE_MASK
  67820. CPG_PERFCOUNTER0_SELECT__SPM_MODE__SHIFT
  67821. CPG_PERFCOUNTER1_HI__PERFCOUNTER_HI_MASK
  67822. CPG_PERFCOUNTER1_HI__PERFCOUNTER_HI__SHIFT
  67823. CPG_PERFCOUNTER1_LO__PERFCOUNTER_LO_MASK
  67824. CPG_PERFCOUNTER1_LO__PERFCOUNTER_LO__SHIFT
  67825. CPG_PERFCOUNTER1_SELECT__CNTR_MODE0_MASK
  67826. CPG_PERFCOUNTER1_SELECT__CNTR_MODE0__SHIFT
  67827. CPG_PERFCOUNTER1_SELECT__CNTR_MODE1_MASK
  67828. CPG_PERFCOUNTER1_SELECT__CNTR_MODE1__SHIFT
  67829. CPG_PERFCOUNTER1_SELECT__CNTR_SEL0_MASK
  67830. CPG_PERFCOUNTER1_SELECT__CNTR_SEL0__SHIFT
  67831. CPG_PERFCOUNTER1_SELECT__CNTR_SEL1_MASK
  67832. CPG_PERFCOUNTER1_SELECT__CNTR_SEL1__SHIFT
  67833. CPG_PERFCOUNTER1_SELECT__PERF_SEL1_MASK
  67834. CPG_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT
  67835. CPG_PERFCOUNTER1_SELECT__PERF_SEL_MASK
  67836. CPG_PERFCOUNTER1_SELECT__PERF_SEL__SHIFT
  67837. CPG_PERFCOUNTER1_SELECT__SPM_MODE_MASK
  67838. CPG_PERFCOUNTER1_SELECT__SPM_MODE__SHIFT
  67839. CPG_PERFCOUNTWINDOW_SEL
  67840. CPG_PERFCOUNT_SEL
  67841. CPG_PERFWINDOW_SEL_APPEND
  67842. CPG_PERFWINDOW_SEL_CE
  67843. CPG_PERFWINDOW_SEL_CEDMA
  67844. CPG_PERFWINDOW_SEL_CPC_IC
  67845. CPG_PERFWINDOW_SEL_CPG_IC
  67846. CPG_PERFWINDOW_SEL_DDID
  67847. CPG_PERFWINDOW_SEL_DFY
  67848. CPG_PERFWINDOW_SEL_DMA
  67849. CPG_PERFWINDOW_SEL_ME
  67850. CPG_PERFWINDOW_SEL_MEC1
  67851. CPG_PERFWINDOW_SEL_MEC2
  67852. CPG_PERFWINDOW_SEL_MEMRD
  67853. CPG_PERFWINDOW_SEL_MEMWR
  67854. CPG_PERFWINDOW_SEL_MES
  67855. CPG_PERFWINDOW_SEL_PFP
  67856. CPG_PERFWINDOW_SEL_PQ1
  67857. CPG_PERFWINDOW_SEL_PQ2
  67858. CPG_PERFWINDOW_SEL_PQ3
  67859. CPG_PERFWINDOW_SEL_PRT_HDR_RPTR
  67860. CPG_PERFWINDOW_SEL_PRT_SMP_RPTR
  67861. CPG_PERFWINDOW_SEL_QURD
  67862. CPG_PERFWINDOW_SEL_QU_EOP
  67863. CPG_PERFWINDOW_SEL_QU_PIPE
  67864. CPG_PERFWINDOW_SEL_QU_STRM
  67865. CPG_PERFWINDOW_SEL_RB
  67866. CPG_PERFWINDOW_SEL_RESERVED1
  67867. CPG_PERFWINDOW_SEL_RESERVED2
  67868. CPG_PERFWINDOW_SEL_SHADOW
  67869. CPG_PERFWINDOW_SEL_SR
  67870. CPG_PERFWINDOW_SEL_VGT0
  67871. CPG_PERFWINDOW_SEL_VGT1
  67872. CPG_PERF_SEL_ALL_GFX_PIPES_BUSY
  67873. CPG_PERF_SEL_ALWAYS_COUNT
  67874. CPG_PERF_SEL_ATCL1_STALL_ON_TRANSLATION
  67875. CPG_PERF_SEL_ATCL2IU_STALL_WAIT_ON_FREE
  67876. CPG_PERF_SEL_ATCL2IU_STALL_WAIT_ON_TAGS
  67877. CPG_PERF_SEL_CE_INSTR_CACHE_HIT
  67878. CPG_PERF_SEL_CE_INSTR_CACHE_MISS
  67879. CPG_PERF_SEL_CE_STALL_ON_CE_BUFFER_FLAG
  67880. CPG_PERF_SEL_CE_STALL_ON_DATA_FROM_MIU
  67881. CPG_PERF_SEL_CE_STALL_ON_DATA_FROM_ROQ
  67882. CPG_PERF_SEL_CE_STALL_ON_DE_COUNTER
  67883. CPG_PERF_SEL_CE_STALL_ON_INC_FIFO
  67884. CPG_PERF_SEL_CE_STALL_ON_WR_RAM_FIFO
  67885. CPG_PERF_SEL_CE_STALL_RAM_DUMP
  67886. CPG_PERF_SEL_CE_STALL_RAM_WRITE
  67887. CPG_PERF_SEL_COUNT_TYPE0_PACKETS
  67888. CPG_PERF_SEL_COUNT_TYPE3_PACKETS
  67889. CPG_PERF_SEL_CPG_GCRIU_BUSY
  67890. CPG_PERF_SEL_CPG_GCRIU_IDLE
  67891. CPG_PERF_SEL_CPG_GCRIU_STALL
  67892. CPG_PERF_SEL_CPG_STAT_BUSY
  67893. CPG_PERF_SEL_CPG_STAT_IDLE
  67894. CPG_PERF_SEL_CPG_STAT_STALL
  67895. CPG_PERF_SEL_CPG_TCIU_BUSY
  67896. CPG_PERF_SEL_CPG_TCIU_IDLE
  67897. CPG_PERF_SEL_CPG_UTCL2IU_BUSY
  67898. CPG_PERF_SEL_CPG_UTCL2IU_IDLE
  67899. CPG_PERF_SEL_CPG_UTCL2IU_STALL
  67900. CPG_PERF_SEL_CPG_UTCL2IU_XACK
  67901. CPG_PERF_SEL_CPG_UTCL2IU_XNACK
  67902. CPG_PERF_SEL_CP_GDS_GRBM_OUT_OF_CREDITS
  67903. CPG_PERF_SEL_CP_GRBM_DWORDS_SENT
  67904. CPG_PERF_SEL_CP_GRBM_OUT_OF_CREDITS
  67905. CPG_PERF_SEL_CP_PFP_GRBM_OUT_OF_CREDITS
  67906. CPG_PERF_SEL_CSF_FETCHING_CMD_BUFFERS
  67907. CPG_PERF_SEL_CSF_RTS_BUT_MIU_NOT_RTR
  67908. CPG_PERF_SEL_CSF_ST_BASE_SIZE_FIFO_FULL
  67909. CPG_PERF_SEL_DYNAMIC_CLK_VALID
  67910. CPG_PERF_SEL_GCRIU_STALL_WAIT_ON_FREE
  67911. CPG_PERF_SEL_GUS_READ_REQUEST_SENT
  67912. CPG_PERF_SEL_GUS_WRITE_REQUEST_SENT
  67913. CPG_PERF_SEL_LOAD_STALLED_ON_SET_COHERENCY
  67914. CPG_PERF_SEL_ME_INSTR_CACHE_HIT
  67915. CPG_PERF_SEL_ME_INSTR_CACHE_MISS
  67916. CPG_PERF_SEL_ME_PARSER_BUSY
  67917. CPG_PERF_SEL_ME_STALLED_FOR_DATA_FROM_PFP
  67918. CPG_PERF_SEL_ME_STALLED_FOR_DATA_FROM_STQ
  67919. CPG_PERF_SEL_ME_STALLED_ON_NO_AVAIL_GFX_CNTX
  67920. CPG_PERF_SEL_ME_STALLED_ON_PARTIAL_FLUSH
  67921. CPG_PERF_SEL_ME_STALLED_WRITING_CONSTANTS
  67922. CPG_PERF_SEL_ME_STALLED_WRITING_TO_RCIU
  67923. CPG_PERF_SEL_ME_WAIT_ON_AVAIL_BUFFER
  67924. CPG_PERF_SEL_ME_WAIT_ON_CE_COUNTER
  67925. CPG_PERF_SEL_MIU_READ_REQUEST_SENT
  67926. CPG_PERF_SEL_MIU_WRITE_REQUEST_SENT
  67927. CPG_PERF_SEL_PFP_INSTR_CACHE_HIT
  67928. CPG_PERF_SEL_PFP_INSTR_CACHE_MISS
  67929. CPG_PERF_SEL_PFP_PACKET_FILTER_HIT_IB1
  67930. CPG_PERF_SEL_PFP_PACKET_FILTER_HIT_IB2
  67931. CPG_PERF_SEL_PFP_PACKET_FILTER_MISS_IB1
  67932. CPG_PERF_SEL_PFP_PACKET_FILTER_MISS_IB2
  67933. CPG_PERF_SEL_PFP_STALLED_FOR_DATA_FROM_ROQ
  67934. CPG_PERF_SEL_PFP_STALLED_ON_CSF_READY
  67935. CPG_PERF_SEL_PFP_STALLED_ON_MEQ_DDID_READY
  67936. CPG_PERF_SEL_PFP_STALLED_ON_MEQ_READY
  67937. CPG_PERF_SEL_PFP_STALLED_ON_RCIU_READY
  67938. CPG_PERF_SEL_QU_STALLED_ON_EOP_DONE_PULSE
  67939. CPG_PERF_SEL_QU_STALLED_ON_EOP_DONE_WR_CONFIRM
  67940. CPG_PERF_SEL_RBIU_FIFO_FULL
  67941. CPG_PERF_SEL_RCIU_STALLED_ON_DMA_READ
  67942. CPG_PERF_SEL_RCIU_STALLED_ON_ME_READ
  67943. CPG_PERF_SEL_REGISTER_CLK_VALID
  67944. CPG_PERF_SEL_SEMAPHORE_BUSY_POLLING_FOR_PASS
  67945. CPG_PERF_SEL_SSU_STALLED_ON_ACTIVE_CNTX
  67946. CPG_PERF_SEL_SSU_STALLED_ON_CLEAN_SIGNALS
  67947. CPG_PERF_SEL_TCIU_READ_REQUEST_SENT
  67948. CPG_PERF_SEL_TCIU_STALL_WAIT_ON_FREE
  67949. CPG_PERF_SEL_TCIU_STALL_WAIT_ON_TAGS
  67950. CPG_PERF_SEL_TCIU_WRITE_REQUEST_SENT
  67951. CPG_PERF_SEL_UTCL1_STALL_ON_TRANSLATION
  67952. CPG_PERF_SEL_UTCL2IU_STALL_WAIT_ON_FREE
  67953. CPG_PERF_SEL_UTCL2IU_STALL_WAIT_ON_TAGS
  67954. CPG_PLL0CR
  67955. CPG_PLL0CR_STC_MASK
  67956. CPG_PLL0CR_STC_SHIFT
  67957. CPG_PLL1CR
  67958. CPG_PLL2CR
  67959. CPG_PLL2HCR
  67960. CPG_PLL2SCR
  67961. CPG_PLL3CR
  67962. CPG_PLL4CR
  67963. CPG_PLLA_MULT_INDEX
  67964. CPG_PLLC2CR
  67965. CPG_PLLECR
  67966. CPG_PLL_CONFIG_INDEX
  67967. CPG_RCANCKCR
  67968. CPG_RCIU_CAM_DATA_PHASE0__ADDR_MASK
  67969. CPG_RCIU_CAM_DATA_PHASE0__ADDR__SHIFT
  67970. CPG_RCIU_CAM_DATA_PHASE0__PIPE0_EN_MASK
  67971. CPG_RCIU_CAM_DATA_PHASE0__PIPE0_EN__SHIFT
  67972. CPG_RCIU_CAM_DATA_PHASE0__PIPE1_EN_MASK
  67973. CPG_RCIU_CAM_DATA_PHASE0__PIPE1_EN__SHIFT
  67974. CPG_RCIU_CAM_DATA_PHASE0__SKIP_WR_MASK
  67975. CPG_RCIU_CAM_DATA_PHASE0__SKIP_WR__SHIFT
  67976. CPG_RCIU_CAM_DATA_PHASE1__MASK_MASK
  67977. CPG_RCIU_CAM_DATA_PHASE1__MASK__SHIFT
  67978. CPG_RCIU_CAM_DATA_PHASE2__VALUE_MASK
  67979. CPG_RCIU_CAM_DATA_PHASE2__VALUE__SHIFT
  67980. CPG_RCIU_CAM_DATA__DATA_MASK
  67981. CPG_RCIU_CAM_DATA__DATA__SHIFT
  67982. CPG_RCIU_CAM_INDEX__INDEX_MASK
  67983. CPG_RCIU_CAM_INDEX__INDEX__SHIFT
  67984. CPG_RCKCR
  67985. CPG_RCKCR_CKSEL
  67986. CPG_RPCCKCR
  67987. CPG_SD0CKCR
  67988. CPG_SD1CKCR
  67989. CPG_SD2CKCR
  67990. CPG_SDCKCR
  67991. CPG_SD_DIV_TABLE_DATA
  67992. CPG_SD_FC_MASK
  67993. CPG_SD_STP_CK
  67994. CPG_SD_STP_HCK
  67995. CPG_SD_STP_MASK
  67996. CPG_TAG_RAM
  67997. CPG_TC_PERF_COUNTER_WINDOW_SELECT__ALWAYS_MASK
  67998. CPG_TC_PERF_COUNTER_WINDOW_SELECT__ALWAYS__SHIFT
  67999. CPG_TC_PERF_COUNTER_WINDOW_SELECT__ENABLE_MASK
  68000. CPG_TC_PERF_COUNTER_WINDOW_SELECT__ENABLE__SHIFT
  68001. CPG_TC_PERF_COUNTER_WINDOW_SELECT__INDEX_MASK
  68002. CPG_TC_PERF_COUNTER_WINDOW_SELECT__INDEX__SHIFT
  68003. CPG_USBCKCR
  68004. CPG_UTCL1_CNTL__BYPASS_MASK
  68005. CPG_UTCL1_CNTL__BYPASS__SHIFT
  68006. CPG_UTCL1_CNTL__DROP_MODE_MASK
  68007. CPG_UTCL1_CNTL__DROP_MODE__SHIFT
  68008. CPG_UTCL1_CNTL__FORCE_SD_VMID_DIRTY_MASK
  68009. CPG_UTCL1_CNTL__FORCE_SD_VMID_DIRTY__SHIFT
  68010. CPG_UTCL1_CNTL__FORCE_SNOOP_MASK
  68011. CPG_UTCL1_CNTL__FORCE_SNOOP__SHIFT
  68012. CPG_UTCL1_CNTL__FRAG_LIMIT_MODE_MASK
  68013. CPG_UTCL1_CNTL__FRAG_LIMIT_MODE__SHIFT
  68014. CPG_UTCL1_CNTL__INVALIDATE_MASK
  68015. CPG_UTCL1_CNTL__INVALIDATE__SHIFT
  68016. CPG_UTCL1_CNTL__MTYPE_NO_PTE_MODE_MASK
  68017. CPG_UTCL1_CNTL__MTYPE_NO_PTE_MODE__SHIFT
  68018. CPG_UTCL1_CNTL__VMID_RESET_MODE_MASK
  68019. CPG_UTCL1_CNTL__VMID_RESET_MODE__SHIFT
  68020. CPG_UTCL1_CNTL__XNACK_REDO_TIMER_CNT_MASK
  68021. CPG_UTCL1_CNTL__XNACK_REDO_TIMER_CNT__SHIFT
  68022. CPG_UTCL1_ERROR__ERROR_DETECTED_HALT_MASK
  68023. CPG_UTCL1_ERROR__ERROR_DETECTED_HALT__SHIFT
  68024. CPG_UTCL1_STATUS__FAULT_DETECTED_MASK
  68025. CPG_UTCL1_STATUS__FAULT_DETECTED__SHIFT
  68026. CPG_UTCL1_STATUS__FAULT_UTCL1ID_MASK
  68027. CPG_UTCL1_STATUS__FAULT_UTCL1ID__SHIFT
  68028. CPG_UTCL1_STATUS__PRT_DETECTED_MASK
  68029. CPG_UTCL1_STATUS__PRT_DETECTED__SHIFT
  68030. CPG_UTCL1_STATUS__PRT_UTCL1ID_MASK
  68031. CPG_UTCL1_STATUS__PRT_UTCL1ID__SHIFT
  68032. CPG_UTCL1_STATUS__RETRY_DETECTED_MASK
  68033. CPG_UTCL1_STATUS__RETRY_DETECTED__SHIFT
  68034. CPG_UTCL1_STATUS__RETRY_UTCL1ID_MASK
  68035. CPG_UTCL1_STATUS__RETRY_UTCL1ID__SHIFT
  68036. CPHA
  68037. CPHYSADDR
  68038. CPHY_ADDR
  68039. CPHY_LANE_COUNT
  68040. CPHY_MAP
  68041. CPHY_PHY_COUNT
  68042. CPHY_PORT_COUNT
  68043. CPHY_RX_INPUT_STS
  68044. CPHY_RX_OVERRIDE
  68045. CPHY_SATA_DPLL_MODE
  68046. CPHY_SATA_DPLL_RESET
  68047. CPHY_SATA_DPLL_SHIFT
  68048. CPHY_SATA_RX_OVERRIDE
  68049. CPHY_SATA_TX_ATTEN
  68050. CPHY_SATA_TX_ATTEN_SHIFT
  68051. CPHY_SATA_TX_OVERRIDE
  68052. CPHY_TX_INPUT_STS
  68053. CPHY_TX_OVERRIDE
  68054. CPI
  68055. CPI2ASIBYTECNT_MASK
  68056. CPI2ASIBYTEEN_MASK
  68057. CPI2ASIMSTERR_MASK
  68058. CPI2ASITARGERR_MASK
  68059. CPI2ASITARGMID_MASK
  68060. CPIA1_CID_COMP_TARGET
  68061. CPIA2_ASIC_672
  68062. CPIA2_CID_USB_ALT
  68063. CPIA2_CMD_CLEAR_V2W_ERR
  68064. CPIA2_CMD_ENABLE_PACKET_CTRL
  68065. CPIA2_CMD_FRAMERATE_REQ
  68066. CPIA2_CMD_GET_ASIC_TYPE
  68067. CPIA2_CMD_GET_CONTRAST
  68068. CPIA2_CMD_GET_DEVICE_CONFIG
  68069. CPIA2_CMD_GET_FLICKER_MODES
  68070. CPIA2_CMD_GET_PNP_ID
  68071. CPIA2_CMD_GET_PW_CONTROL
  68072. CPIA2_CMD_GET_SENSOR
  68073. CPIA2_CMD_GET_SYSTEM_CTRL
  68074. CPIA2_CMD_GET_USER_EFFECTS
  68075. CPIA2_CMD_GET_USER_MODE
  68076. CPIA2_CMD_GET_VC_CONTROL
  68077. CPIA2_CMD_GET_VC_MP_GPIO_DATA
  68078. CPIA2_CMD_GET_VC_MP_GPIO_DIRECTION
  68079. CPIA2_CMD_GET_VERSION
  68080. CPIA2_CMD_GET_VP_BRIGHTNESS
  68081. CPIA2_CMD_GET_VP_DEVICE
  68082. CPIA2_CMD_GET_VP_EXP_MODES
  68083. CPIA2_CMD_GET_VP_GPIO_DATA
  68084. CPIA2_CMD_GET_VP_GPIO_DIRECTION
  68085. CPIA2_CMD_GET_VP_SATURATION
  68086. CPIA2_CMD_GET_VP_SYSTEM_CTRL
  68087. CPIA2_CMD_GET_VP_SYSTEM_STATE
  68088. CPIA2_CMD_GET_WAKEUP
  68089. CPIA2_CMD_NONE
  68090. CPIA2_CMD_REHASH_VP4
  68091. CPIA2_CMD_RESET_FIFO
  68092. CPIA2_CMD_SET_COMPRESSION_STATE
  68093. CPIA2_CMD_SET_CONTRAST
  68094. CPIA2_CMD_SET_DEF_JPEG_OPT
  68095. CPIA2_CMD_SET_DEVICE_CONFIG
  68096. CPIA2_CMD_SET_FLICKER_MODES
  68097. CPIA2_CMD_SET_HI_POWER
  68098. CPIA2_CMD_SET_LOW_POWER
  68099. CPIA2_CMD_SET_PW_CONTROL
  68100. CPIA2_CMD_SET_SENSOR_CR1
  68101. CPIA2_CMD_SET_SERIAL_ADDR
  68102. CPIA2_CMD_SET_SYSTEM_CTRL
  68103. CPIA2_CMD_SET_TARGET_KB
  68104. CPIA2_CMD_SET_USER_EFFECTS
  68105. CPIA2_CMD_SET_USER_MODE
  68106. CPIA2_CMD_SET_VC_CONTROL
  68107. CPIA2_CMD_SET_VC_MP_GPIO_DATA
  68108. CPIA2_CMD_SET_VC_MP_GPIO_DIRECTION
  68109. CPIA2_CMD_SET_VP_BRIGHTNESS
  68110. CPIA2_CMD_SET_VP_EXP_MODES
  68111. CPIA2_CMD_SET_VP_GPIO_DATA
  68112. CPIA2_CMD_SET_VP_GPIO_DIRECTION
  68113. CPIA2_CMD_SET_VP_SATURATION
  68114. CPIA2_CMD_SET_VP_SYSTEM_CTRL
  68115. CPIA2_CMD_SET_WAKEUP
  68116. CPIA2_REGISTER_HEADER
  68117. CPIA2_SENSOR_410
  68118. CPIA2_SENSOR_500
  68119. CPIA2_SENSOR_CR1
  68120. CPIA2_SENSOR_CR1_DOWN_AUDIO_REGULATOR
  68121. CPIA2_SENSOR_CR1_DOWN_BAND_GAP
  68122. CPIA2_SENSOR_CR1_DOWN_CAB_REGULATOR
  68123. CPIA2_SENSOR_CR1_DOWN_COLUMN_ADC
  68124. CPIA2_SENSOR_CR1_DOWN_RAMP_GEN
  68125. CPIA2_SENSOR_CR1_DOWN_VRT_AMP
  68126. CPIA2_SENSOR_CR1_STAND_BY
  68127. CPIA2_SENSOR_DATA_FORMAT
  68128. CPIA2_SENSOR_DATA_FORMAT_HMIRROR
  68129. CPIA2_SENSOR_DATA_FORMAT_VMIRROR
  68130. CPIA2_SENSOR_DEVICE_H
  68131. CPIA2_SENSOR_DEVICE_L
  68132. CPIA2_SYSTEM_CACHE_CTRL
  68133. CPIA2_SYSTEM_CACHE_CTRL_CACHE_FLUSH
  68134. CPIA2_SYSTEM_CACHE_CTRL_CACHE_RESET
  68135. CPIA2_SYSTEM_CACHE_MAX_WRITES
  68136. CPIA2_SYSTEM_CACHE_START_INDEX
  68137. CPIA2_SYSTEM_CONTROL_CLEAR_ERR
  68138. CPIA2_SYSTEM_CONTROL_HIGH_POWER
  68139. CPIA2_SYSTEM_CONTROL_LOW_POWER
  68140. CPIA2_SYSTEM_CONTROL_RB_ERR
  68141. CPIA2_SYSTEM_CONTROL_SUSPEND
  68142. CPIA2_SYSTEM_CONTROL_V2W_ERR
  68143. CPIA2_SYSTEM_DESCRIP_PID_HI
  68144. CPIA2_SYSTEM_DESCRIP_PID_LO
  68145. CPIA2_SYSTEM_DESCRIP_VID_HI
  68146. CPIA2_SYSTEM_DESCRIP_VID_LO
  68147. CPIA2_SYSTEM_DEVICE_HI
  68148. CPIA2_SYSTEM_DEVICE_LO
  68149. CPIA2_SYSTEM_FW_VERSION_HI
  68150. CPIA2_SYSTEM_FW_VERSION_LO
  68151. CPIA2_SYSTEM_INT_PACKET_CTRL
  68152. CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_EOF
  68153. CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_INT1
  68154. CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_SW_XX
  68155. CPIA2_SYSTEM_MC_PORT_0
  68156. CPIA2_SYSTEM_MC_PORT_1
  68157. CPIA2_SYSTEM_MC_PORT_2
  68158. CPIA2_SYSTEM_MC_PORT_3
  68159. CPIA2_SYSTEM_SERIAL_CTRL
  68160. CPIA2_SYSTEM_SERIAL_CTRL_NULL_CMD
  68161. CPIA2_SYSTEM_SERIAL_CTRL_READ_ACK_CMD
  68162. CPIA2_SYSTEM_SERIAL_CTRL_READ_NACK_CMD
  68163. CPIA2_SYSTEM_SERIAL_CTRL_START_CMD
  68164. CPIA2_SYSTEM_SERIAL_CTRL_STOP_CMD
  68165. CPIA2_SYSTEM_SERIAL_CTRL_WRITE_CMD
  68166. CPIA2_SYSTEM_SERIAL_DATA
  68167. CPIA2_SYSTEM_SPARE_REG1
  68168. CPIA2_SYSTEM_SPARE_REG2
  68169. CPIA2_SYSTEM_SPARE_REG3
  68170. CPIA2_SYSTEM_STATUS_PKT
  68171. CPIA2_SYSTEM_STATUS_PKT_END
  68172. CPIA2_SYSTEM_SYSTEM_CONTROL
  68173. CPIA2_SYSTEM_VP_SERIAL_ADDR
  68174. CPIA2_SYSTEM_VP_SERIAL_ADDR_676_VP
  68175. CPIA2_SYSTEM_VP_SERIAL_ADDR_SENSOR
  68176. CPIA2_SYSTEM_VP_SERIAL_ADDR_VP
  68177. CPIA2_VC_AD_CTRL
  68178. CPIA2_VC_AD_CTRL_DST_REG
  68179. CPIA2_VC_AD_CTRL_DST_USB
  68180. CPIA2_VC_AD_CTRL_SRC_0
  68181. CPIA2_VC_AD_CTRL_SRC_DIGI_A
  68182. CPIA2_VC_AD_CTRL_SRC_REG
  68183. CPIA2_VC_AD_STATUS
  68184. CPIA2_VC_AD_STATUS_EMPTY
  68185. CPIA2_VC_AD_STATUS_FULL
  68186. CPIA2_VC_AD_TEST_IN
  68187. CPIA2_VC_AD_TEST_OUT
  68188. CPIA2_VC_ASIC_ID
  68189. CPIA2_VC_ASIC_REV
  68190. CPIA2_VC_CLOCK_CTRL
  68191. CPIA2_VC_CLOCK_CTRL_TESTUP72
  68192. CPIA2_VC_DP_CTRL
  68193. CPIA2_VC_DP_CTRL_FAKE_FST
  68194. CPIA2_VC_DP_CTRL_MODE_0
  68195. CPIA2_VC_DP_CTRL_MODE_A
  68196. CPIA2_VC_DP_CTRL_MODE_B
  68197. CPIA2_VC_DP_CTRL_MODE_C
  68198. CPIA2_VC_DP_DATA
  68199. CPIA2_VC_INT_ENABLE
  68200. CPIA2_VC_INT_ENABLE_SET_RESET_BIT
  68201. CPIA2_VC_INT_ENABLE_SW_FLAG
  68202. CPIA2_VC_INT_ENABLE_SW_IE
  68203. CPIA2_VC_INT_ENABLE_USBCFG_FLAG
  68204. CPIA2_VC_INT_ENABLE_USBCFG_IE
  68205. CPIA2_VC_INT_ENABLE_USBDATA_FLAG
  68206. CPIA2_VC_INT_ENABLE_USBDATA_IE
  68207. CPIA2_VC_INT_ENABLE_USBSETUP_FLAG
  68208. CPIA2_VC_INT_ENABLE_USBSETUP_IE
  68209. CPIA2_VC_INT_ENABLE_VC_FLAG
  68210. CPIA2_VC_INT_ENABLE_VC_IE
  68211. CPIA2_VC_INT_ENABLE_XX_FLAG
  68212. CPIA2_VC_INT_ENABLE_XX_IE
  68213. CPIA2_VC_INT_FLAG
  68214. CPIA2_VC_INT_STATE
  68215. CPIA2_VC_INT_STATE_SW_STATE
  68216. CPIA2_VC_INT_STATE_XX_STATE
  68217. CPIA2_VC_MP_DATA
  68218. CPIA2_VC_MP_DIR
  68219. CPIA2_VC_MP_DIR_INPUT
  68220. CPIA2_VC_MP_DIR_OUTPUT
  68221. CPIA2_VC_PW_CTRL
  68222. CPIA2_VC_PW_CTRL_COLDSTART
  68223. CPIA2_VC_PW_CTRL_CP_CLK_EN
  68224. CPIA2_VC_PW_CTRL_GOTO_SUSPEND
  68225. CPIA2_VC_PW_CTRL_PWR_DOWN
  68226. CPIA2_VC_PW_CTRL_UDC_SUSPEND
  68227. CPIA2_VC_PW_CTRL_VC_CLK_EN
  68228. CPIA2_VC_PW_CTRL_VC_RESET_N
  68229. CPIA2_VC_PW_CTRL_VP_RESET_N
  68230. CPIA2_VC_ST_CTRL
  68231. CPIA2_VC_ST_CTRL_DST_DP
  68232. CPIA2_VC_ST_CTRL_DST_REG
  68233. CPIA2_VC_ST_CTRL_DST_USB
  68234. CPIA2_VC_ST_CTRL_EOF_DETECT
  68235. CPIA2_VC_ST_CTRL_FIFO_ENABLE
  68236. CPIA2_VC_ST_CTRL_RAW_SELECT
  68237. CPIA2_VC_ST_CTRL_SRC_DP
  68238. CPIA2_VC_ST_CTRL_SRC_REG
  68239. CPIA2_VC_ST_CTRL_SRC_VC
  68240. CPIA2_VC_ST_FRAME_DETECT_1
  68241. CPIA2_VC_ST_FRAME_DETECT_2
  68242. CPIA2_VC_ST_STATUS
  68243. CPIA2_VC_ST_STATUS_EMPTY
  68244. CPIA2_VC_ST_STATUS_FULL
  68245. CPIA2_VC_ST_TEST
  68246. CPIA2_VC_ST_TEST_AUTO_FILL
  68247. CPIA2_VC_ST_TEST_IN
  68248. CPIA2_VC_ST_TEST_MODE_INCREMENT
  68249. CPIA2_VC_ST_TEST_MODE_MANUAL
  68250. CPIA2_VC_ST_TEST_OUT
  68251. CPIA2_VC_ST_TEST_REPEAT_FIFO
  68252. CPIA2_VC_USB_CMDW
  68253. CPIA2_VC_USB_CONFIG
  68254. CPIA2_VC_USB_CTRL
  68255. CPIA2_VC_USB_CTRL_CMD_MICRO_ACCESS
  68256. CPIA2_VC_USB_CTRL_CMD_NO_CLASH
  68257. CPIA2_VC_USB_CTRL_CMD_READY
  68258. CPIA2_VC_USB_CTRL_CMD_STALLED
  68259. CPIA2_VC_USB_CTRL_CMD_STATUS
  68260. CPIA2_VC_USB_CTRL_CMD_STATUS_DIR
  68261. CPIA2_VC_USB_DATARW
  68262. CPIA2_VC_USB_INFO
  68263. CPIA2_VC_USB_ISOFAILS
  68264. CPIA2_VC_USB_ISOLIM
  68265. CPIA2_VC_USB_ISOMAXPKTHI
  68266. CPIA2_VC_USB_ISOMAXPKTLO
  68267. CPIA2_VC_USB_SETTINGS
  68268. CPIA2_VC_USB_SETTINGS_ALTERNATE_MASK
  68269. CPIA2_VC_USB_SETTINGS_CONFIG_MASK
  68270. CPIA2_VC_USB_SETTINGS_INTERFACE_MASK
  68271. CPIA2_VC_USB_STATUS
  68272. CPIA2_VC_USB_STATUS_BULK_REPEAT_TXN
  68273. CPIA2_VC_USB_STATUS_CMD_FIFO_BUSY
  68274. CPIA2_VC_USB_STATUS_CMD_HANDSHAKE
  68275. CPIA2_VC_USB_STATUS_CMD_IN_PROGRESS
  68276. CPIA2_VC_USB_STATUS_CMD_OVERRIDE
  68277. CPIA2_VC_USB_STATUS_CMD_STATUS_STALL
  68278. CPIA2_VC_USB_STATUS_CONFIG_DONE
  68279. CPIA2_VC_USB_STATUS_USB_SUSPEND
  68280. CPIA2_VC_USB_STRM
  68281. CPIA2_VC_USB_STRM_AUD_ENABLE
  68282. CPIA2_VC_USB_STRM_BLK_ENABLE
  68283. CPIA2_VC_USB_STRM_INT_ENABLE
  68284. CPIA2_VC_USB_STRM_ISO_ENABLE
  68285. CPIA2_VC_V2W_CTRL
  68286. CPIA2_VC_V2W_SCL
  68287. CPIA2_VC_V2W_SDA
  68288. CPIA2_VC_V2W_SELECT
  68289. CPIA2_VC_VC_672_CLOCKS_CIF_DIV_BY_3
  68290. CPIA2_VC_VC_672_CLOCKS_SCALING
  68291. CPIA2_VC_VC_676_CLOCKS_CIF_DIV_BY_3
  68292. CPIA2_VC_VC_676_CLOCKS_SCALING
  68293. CPIA2_VC_VC_AUTO_SQUEEZE
  68294. CPIA2_VC_VC_CLOCKS
  68295. CPIA2_VC_VC_CLOCKS_CLKDIV_MASK
  68296. CPIA2_VC_VC_CLOCKS_LOGDIV0
  68297. CPIA2_VC_VC_CLOCKS_LOGDIV1
  68298. CPIA2_VC_VC_CLOCKS_LOGDIV2
  68299. CPIA2_VC_VC_CLOCKS_LOGDIV3
  68300. CPIA2_VC_VC_CREEP_PERIOD
  68301. CPIA2_VC_VC_CTRL
  68302. CPIA2_VC_VC_CTRL_IDLING
  68303. CPIA2_VC_VC_CTRL_INHIBIT_H_TABLES
  68304. CPIA2_VC_VC_CTRL_INHIBIT_PRIVATE
  68305. CPIA2_VC_VC_CTRL_INHIBIT_Q_TABLES
  68306. CPIA2_VC_VC_CTRL_RUN
  68307. CPIA2_VC_VC_CTRL_SINGLESHOT
  68308. CPIA2_VC_VC_FORMAT
  68309. CPIA2_VC_VC_FORMAT_DECIMATING
  68310. CPIA2_VC_VC_FORMAT_MONO
  68311. CPIA2_VC_VC_FORMAT_SELFTEST
  68312. CPIA2_VC_VC_FORMAT_SHORTLINE
  68313. CPIA2_VC_VC_FORMAT_UFIRST
  68314. CPIA2_VC_VC_HCROP
  68315. CPIA2_VC_VC_HFRACT
  68316. CPIA2_VC_VC_HFRACT_DEN_MASK
  68317. CPIA2_VC_VC_HFRACT_NUM_MASK
  68318. CPIA2_VC_VC_HICROP
  68319. CPIA2_VC_VC_HISPAN
  68320. CPIA2_VC_VC_HPHASE
  68321. CPIA2_VC_VC_IHSIZE_LO
  68322. CPIA2_VC_VC_JPEG_OPT
  68323. CPIA2_VC_VC_JPEG_OPT_AUTO_SQUEEZE
  68324. CPIA2_VC_VC_JPEG_OPT_DEFAULT
  68325. CPIA2_VC_VC_JPEG_OPT_DOUBLE_SQUEEZE
  68326. CPIA2_VC_VC_JPEG_OPT_NO_DC_AUTO_SQUEEZE
  68327. CPIA2_VC_VC_OHSIZE
  68328. CPIA2_VC_VC_OVSIZE
  68329. CPIA2_VC_VC_RESTART_IVAL_HI
  68330. CPIA2_VC_VC_RESTART_IVAL_LO
  68331. CPIA2_VC_VC_TARGET_KB
  68332. CPIA2_VC_VC_USER_SQUEEZE
  68333. CPIA2_VC_VC_VCROP
  68334. CPIA2_VC_VC_VFRACT
  68335. CPIA2_VC_VC_VFRACT_DEN_MASK
  68336. CPIA2_VC_VC_VFRACT_NUM_MASK
  68337. CPIA2_VC_VC_VICROP
  68338. CPIA2_VC_VC_VISPAN
  68339. CPIA2_VC_VC_VPHASE
  68340. CPIA2_VC_VC_XLIM_HI
  68341. CPIA2_VC_VC_XLIM_LO
  68342. CPIA2_VC_VC_YLIM_HI
  68343. CPIA2_VC_VC_YLIM_LO
  68344. CPIA2_VC_WAKEUP
  68345. CPIA2_VC_WAKEUP_SW_ATWAKEUP
  68346. CPIA2_VC_WAKEUP_SW_ENABLE
  68347. CPIA2_VC_WAKEUP_XX_ATWAKEUP
  68348. CPIA2_VC_WAKEUP_XX_ENABLE
  68349. CPIA2_VP4_EXPOSURE_TARGET
  68350. CPIA2_VP4_FRAMERATE_REQUEST
  68351. CPIA2_VP4_USER_EFFECTS
  68352. CPIA2_VP4_USER_MODE
  68353. CPIA2_VP5_ANTIFLKRSETUP
  68354. CPIA2_VP5_EXPOSURE_TARGET
  68355. CPIA2_VP5_FRAMERATE_REQUEST
  68356. CPIA2_VP5_MCUVSATURATION
  68357. CPIA2_VP5_MCYRANGE
  68358. CPIA2_VP5_MYBLACK_LEVEL
  68359. CPIA2_VP5_MYCEILING
  68360. CPIA2_VP5_USER_EFFECTS
  68361. CPIA2_VP5_USER_MODE
  68362. CPIA2_VP_DEFAULT_GAMMA
  68363. CPIA2_VP_DEVICEH
  68364. CPIA2_VP_DEVICEL
  68365. CPIA2_VP_DEVICE_CONFIG
  68366. CPIA2_VP_DEVICE_CONFIG_SERIAL_BRIDGE
  68367. CPIA2_VP_EXPOSURE_MODES
  68368. CPIA2_VP_EXPOSURE_MODES_COMPILE_EXP
  68369. CPIA2_VP_EXPOSURE_MODES_INHIBIT_FLICKER
  68370. CPIA2_VP_FLICKER_MODES
  68371. CPIA2_VP_FLICKER_MODES_50HZ
  68372. CPIA2_VP_FLICKER_MODES_ADJUST_LINE_FREQ
  68373. CPIA2_VP_FLICKER_MODES_CUSTOM_FLT_FFREQ
  68374. CPIA2_VP_FLICKER_MODES_CUSTOM_INT_FFREQ
  68375. CPIA2_VP_FLICKER_MODES_INHIBIT_RUB
  68376. CPIA2_VP_FLICKER_MODES_NEVER_FLICKER
  68377. CPIA2_VP_FRAMERATE_12_5
  68378. CPIA2_VP_FRAMERATE_15
  68379. CPIA2_VP_FRAMERATE_25
  68380. CPIA2_VP_FRAMERATE_30
  68381. CPIA2_VP_FRAMERATE_50
  68382. CPIA2_VP_FRAMERATE_60
  68383. CPIA2_VP_FRAMERATE_6_25
  68384. CPIA2_VP_FRAMERATE_7_5
  68385. CPIA2_VP_GAMMA
  68386. CPIA2_VP_GPIO_DATA
  68387. CPIA2_VP_GPIO_DIRECTION
  68388. CPIA2_VP_GPIO_READ
  68389. CPIA2_VP_GPIO_WRITE
  68390. CPIA2_VP_INTERPOLATION
  68391. CPIA2_VP_INTERPOLATION_EVEN_FIRST
  68392. CPIA2_VP_INTERPOLATION_HJOG
  68393. CPIA2_VP_INTERPOLATION_VJOG
  68394. CPIA2_VP_PATCH_REV
  68395. CPIA2_VP_RAM_ADDR_H
  68396. CPIA2_VP_RAM_ADDR_L
  68397. CPIA2_VP_RAM_DATA
  68398. CPIA2_VP_REHASH_VALUES
  68399. CPIA2_VP_SATURATION
  68400. CPIA2_VP_SENSOR_FLAGS
  68401. CPIA2_VP_SENSOR_FLAGS_404
  68402. CPIA2_VP_SENSOR_FLAGS_407
  68403. CPIA2_VP_SENSOR_FLAGS_409
  68404. CPIA2_VP_SENSOR_FLAGS_410
  68405. CPIA2_VP_SENSOR_FLAGS_500
  68406. CPIA2_VP_SENSOR_REV
  68407. CPIA2_VP_SYSTEMCTRL
  68408. CPIA2_VP_SYSTEMCTRL_HK_CONTROL
  68409. CPIA2_VP_SYSTEMCTRL_POWER_CONTROL
  68410. CPIA2_VP_SYSTEMCTRL_POWER_DOWN_PLL
  68411. CPIA2_VP_SYSTEMCTRL_REQ_AUTOLOAD
  68412. CPIA2_VP_SYSTEMCTRL_REQ_CLEAR_ERROR
  68413. CPIA2_VP_SYSTEMCTRL_REQ_SERIAL_WAKEUP
  68414. CPIA2_VP_SYSTEMCTRL_REQ_SUSPEND_STATE
  68415. CPIA2_VP_SYSTEMSTATE
  68416. CPIA2_VP_SYSTEMSTATE_HK_ALIVE
  68417. CPIA2_VP_UMISC
  68418. CPIA2_VP_UMISC_FORCE_ID_MASK
  68419. CPIA2_VP_UMISC_FORCE_MONO
  68420. CPIA2_VP_UMISC_INHIBIT_AUTO_DIMS
  68421. CPIA2_VP_UMISC_INHIBIT_AUTO_FGS
  68422. CPIA2_VP_UMISC_INHIBIT_AUTO_MODE_INT
  68423. CPIA2_VP_UMISC_OPT_FOR_SENSOR_DS
  68424. CPIA2_VP_USER_EFFECTS_COLBARS
  68425. CPIA2_VP_USER_EFFECTS_COLBARS_GRAD
  68426. CPIA2_VP_USER_EFFECTS_FLIP
  68427. CPIA2_VP_USER_EFFECTS_MIRROR
  68428. CPIA2_VP_USER_MODE_CIF
  68429. CPIA2_VP_USER_MODE_QCIFDS
  68430. CPIA2_VP_USER_MODE_QCIFPTC
  68431. CPIA2_VP_USER_MODE_QVGADS
  68432. CPIA2_VP_USER_MODE_QVGAPTC
  68433. CPIA2_VP_USER_MODE_VGA
  68434. CPIA2_VP_YRANGE
  68435. CPIA_COMMAND_AbortProcess
  68436. CPIA_COMMAND_AbortStream
  68437. CPIA_COMMAND_ColourBars
  68438. CPIA_COMMAND_DiscardFrame
  68439. CPIA_COMMAND_DownloadDRAM
  68440. CPIA_COMMAND_EndStreamCap
  68441. CPIA_COMMAND_FiniStreamCap
  68442. CPIA_COMMAND_GenericCall
  68443. CPIA_COMMAND_GetCPIAVersion
  68444. CPIA_COMMAND_GetCameraStatus
  68445. CPIA_COMMAND_GetColourBalance
  68446. CPIA_COMMAND_GetColourParams
  68447. CPIA_COMMAND_GetExposure
  68448. CPIA_COMMAND_GetPnPID
  68449. CPIA_COMMAND_GetVPVersion
  68450. CPIA_COMMAND_GotoHiPower
  68451. CPIA_COMMAND_GotoLoPower
  68452. CPIA_COMMAND_GotoPassThrough
  68453. CPIA_COMMAND_GotoSuspend
  68454. CPIA_COMMAND_GrabFrame
  68455. CPIA_COMMAND_GrabReset
  68456. CPIA_COMMAND_I2CRead
  68457. CPIA_COMMAND_I2CStart
  68458. CPIA_COMMAND_I2CStop
  68459. CPIA_COMMAND_I2CWrite
  68460. CPIA_COMMAND_InitStreamCap
  68461. CPIA_COMMAND_ModifyCameraStatus
  68462. CPIA_COMMAND_Null
  68463. CPIA_COMMAND_OutputRS232
  68464. CPIA_COMMAND_ReadIDATA
  68465. CPIA_COMMAND_ReadMCPorts
  68466. CPIA_COMMAND_ReadVCRegs
  68467. CPIA_COMMAND_ReadVPRegs
  68468. CPIA_COMMAND_ResetFrameCounter
  68469. CPIA_COMMAND_SetApcor
  68470. CPIA_COMMAND_SetBaudRate
  68471. CPIA_COMMAND_SetColourBalance
  68472. CPIA_COMMAND_SetColourParams
  68473. CPIA_COMMAND_SetCompression
  68474. CPIA_COMMAND_SetCompressionParams
  68475. CPIA_COMMAND_SetCompressionTarget
  68476. CPIA_COMMAND_SetDramPage
  68477. CPIA_COMMAND_SetECPTiming
  68478. CPIA_COMMAND_SetExposure
  68479. CPIA_COMMAND_SetFlickerCtrl
  68480. CPIA_COMMAND_SetFormat
  68481. CPIA_COMMAND_SetGrabMode
  68482. CPIA_COMMAND_SetROI
  68483. CPIA_COMMAND_SetSensorFPS
  68484. CPIA_COMMAND_SetSensorMatrix
  68485. CPIA_COMMAND_SetVLOffset
  68486. CPIA_COMMAND_SetVPDefaults
  68487. CPIA_COMMAND_SetYUVThresh
  68488. CPIA_COMMAND_StartDramUpload
  68489. CPIA_COMMAND_StartDummyDtream
  68490. CPIA_COMMAND_StartStreamCap
  68491. CPIA_COMMAND_UploadFrame
  68492. CPIA_COMMAND_WriteIDATA
  68493. CPIA_COMMAND_WriteMCPort
  68494. CPIA_COMMAND_WriteVCReg
  68495. CPIA_COMMAND_WriteVPReg
  68496. CPIA_COMPRESSION_AUTO
  68497. CPIA_COMPRESSION_MANUAL
  68498. CPIA_COMPRESSION_NONE
  68499. CPIA_COMPRESSION_TARGET_FRAMERATE
  68500. CPIA_COMPRESSION_TARGET_QUALITY
  68501. CPIA_FLAG
  68502. CPIA_GRAB_CONTINEOUS
  68503. CPIA_GRAB_SINGLE
  68504. CPIA_MODULE_CAPTURE
  68505. CPIA_MODULE_CPIA
  68506. CPIA_MODULE_DEBUG
  68507. CPIA_MODULE_SYSTEM
  68508. CPIA_MODULE_VP_CTRL
  68509. CPIA_VERSION
  68510. CPIF_NR_CLK
  68511. CPI_ALG_DIFF
  68512. CPI_ALG_NONE
  68513. CPI_ALG_VLAN
  68514. CPI_ALG_VLAN16
  68515. CPI_LENGTH_LEVEL
  68516. CPI_LENGTH_NAME
  68517. CPLDS_NB_IRQ
  68518. CPLD_7111_DISABLE
  68519. CPLD_ADDR_PORT_OFFSET
  68520. CPLD_AROUTING_CLR
  68521. CPLD_AROUTING_LOONL2EXT_BIT
  68522. CPLD_AROUTING_LOONL2INT_BIT
  68523. CPLD_AROUTING_LOONR2EXT_BIT
  68524. CPLD_AROUTING_LOONR2INT_BIT
  68525. CPLD_AROUTING_LOONR2PHONE_BIT
  68526. CPLD_AROUTING_MIC2PHONE_BIT
  68527. CPLD_AROUTING_PHONE2EXT_BIT
  68528. CPLD_AROUTING_PHONE2INT_BIT
  68529. CPLD_AROUTING_SET
  68530. CPLD_BOARD_ID_ERV_REG
  68531. CPLD_CAP
  68532. CPLD_CAP_COMPAT
  68533. CPLD_CAP_SEP_RESETS
  68534. CPLD_CARDSTAT
  68535. CPLD_CCD_DIR1
  68536. CPLD_CCD_DIR2
  68537. CPLD_CCD_DIR3
  68538. CPLD_CCD_IO1
  68539. CPLD_CCD_IO2
  68540. CPLD_CCD_IO3
  68541. CPLD_CKS0
  68542. CPLD_CKS1
  68543. CPLD_CKS2
  68544. CPLD_CKS_176400HZ
  68545. CPLD_CKS_192000HZ
  68546. CPLD_CKS_44100HZ
  68547. CPLD_CKS_48000HZ
  68548. CPLD_CKS_88200HZ
  68549. CPLD_CKS_96000HZ
  68550. CPLD_CKS_MASK
  68551. CPLD_COAX_OUT
  68552. CPLD_CODE_VER_REG
  68553. CPLD_CONTROL
  68554. CPLD_CONTROL_CRST
  68555. CPLD_CONTROL_RST1
  68556. CPLD_CONTROL_RST2
  68557. CPLD_CPLD_CMD_REG
  68558. CPLD_DESIGN_HI
  68559. CPLD_DESIGN_LO
  68560. CPLD_DILC_IN
  68561. CPLD_DILC_OUT
  68562. CPLD_DIUCSR
  68563. CPLD_DIUCSR_BACKLIGHT
  68564. CPLD_DIUCSR_DVIEN
  68565. CPLD_DS_ENABLE
  68566. CPLD_EXT_SPDIF
  68567. CPLD_EXT_WORDCLOCK_1FS
  68568. CPLD_EXT_WORDCLOCK_256FS
  68569. CPLD_FLASH_WR_ENABLE
  68570. CPLD_IMG_DIR0
  68571. CPLD_IMG_DIR1
  68572. CPLD_IMG_DIR2
  68573. CPLD_IMG_MUX0
  68574. CPLD_IMG_MUX1
  68575. CPLD_IMG_MUX2
  68576. CPLD_IMG_MUX3
  68577. CPLD_IMG_MUX4
  68578. CPLD_IMG_MUX5
  68579. CPLD_IN12_SEL
  68580. CPLD_IN34_SEL
  68581. CPLD_LCD0_COMMAND_CLR
  68582. CPLD_LCD0_COMMAND_SET
  68583. CPLD_LCD0_DATA_CLR
  68584. CPLD_LCD0_DATA_SET
  68585. CPLD_LCD1_COMMAND_CLR
  68586. CPLD_LCD1_COMMAND_SET
  68587. CPLD_LCD1_DATA_CLR
  68588. CPLD_LCD1_DATA_SET
  68589. CPLD_LCD_BACKLIGHT_EN_0_BIT
  68590. CPLD_LCD_BACKLIGHT_EN_1_BIT
  68591. CPLD_LCD_CLR
  68592. CPLD_LCD_LED_GREEN_BIT
  68593. CPLD_LCD_LED_RED_BIT
  68594. CPLD_LCD_NRESET_BIT
  68595. CPLD_LCD_RO_CLR
  68596. CPLD_LCD_RO_LCD0_nWAIT_BIT
  68597. CPLD_LCD_RO_LCD1_nWAIT_BIT
  68598. CPLD_LCD_RO_SET
  68599. CPLD_LCD_SET
  68600. CPLD_LEDS
  68601. CPLD_LED_DEFAULT_VALUE
  68602. CPLD_LED_ON_VALUE
  68603. CPLD_MISC_CHG_D0_BIT
  68604. CPLD_MISC_CHG_D1_BIT
  68605. CPLD_MISC_CLR
  68606. CPLD_MISC_DAC_NCS_BIT
  68607. CPLD_MISC_LOON_NRESET_BIT
  68608. CPLD_MISC_LOON_UNSUSP_BIT
  68609. CPLD_MISC_RUN_5V_BIT
  68610. CPLD_MISC_SET
  68611. CPLD_MUX
  68612. CPLD_MUX_MAX_NCHANS
  68613. CPLD_OFFSET
  68614. CPLD_P2V
  68615. CPLD_POWER
  68616. CPLD_RESETS
  68617. CPLD_RX_INT
  68618. CPLD_RX_INT_EN
  68619. CPLD_SERIAL_CLR
  68620. CPLD_SERIAL_GSM_CTS_BIT
  68621. CPLD_SERIAL_GSM_DTR_BIT
  68622. CPLD_SERIAL_GSM_RI_BIT
  68623. CPLD_SERIAL_LPR_CTS_BIT
  68624. CPLD_SERIAL_SET
  68625. CPLD_SERIAL_TC232_CTS_BIT
  68626. CPLD_SERIAL_TC232_DSR_BIT
  68627. CPLD_SROUTING_CLR
  68628. CPLD_SROUTING_LOON_GSM
  68629. CPLD_SROUTING_LOON_LPR
  68630. CPLD_SROUTING_LOON_TC232
  68631. CPLD_SROUTING_MSP430_GSM
  68632. CPLD_SROUTING_MSP430_LPR
  68633. CPLD_SROUTING_MSP430_TC232
  68634. CPLD_SROUTING_SET
  68635. CPLD_STATUS1
  68636. CPLD_STATUS1_AB
  68637. CPLD_STATUS1_CAN_POWER
  68638. CPLD_SWITCH
  68639. CPLD_SYNC_SEL
  68640. CPLD_TEST
  68641. CPLD_TX_INT
  68642. CPLD_TX_INT_EN
  68643. CPLD_UNMUTE
  68644. CPLD_V2P
  68645. CPLD_VERSION
  68646. CPLD_VIDEO
  68647. CPLD_WORD_SEL
  68648. CPLL_CFG0_BYPASS_REF_CLK
  68649. CPLL_CFG0_LC_CURFCK
  68650. CPLL_CFG0_PLL_DIV_RATIO_MASK
  68651. CPLL_CFG0_PLL_DIV_RATIO_SHIFT
  68652. CPLL_CFG0_PLL_MULT_RATIO_MASK
  68653. CPLL_CFG0_PLL_MULT_RATIO_SHIFT
  68654. CPLL_CFG0_SW_CFG
  68655. CPLL_CFG1_CPU_AUX0
  68656. CPLL_CFG1_CPU_AUX1
  68657. CPLL_CON0
  68658. CPLL_LOCK
  68659. CPLL_MACRO_CNTL_RESERVED0__CPLL_MACRO_CNTL_RESERVED_MASK
  68660. CPLL_MACRO_CNTL_RESERVED0__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68661. CPLL_MACRO_CNTL_RESERVED10__CPLL_MACRO_CNTL_RESERVED_MASK
  68662. CPLL_MACRO_CNTL_RESERVED10__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68663. CPLL_MACRO_CNTL_RESERVED11__CPLL_MACRO_CNTL_RESERVED_MASK
  68664. CPLL_MACRO_CNTL_RESERVED11__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68665. CPLL_MACRO_CNTL_RESERVED1__CPLL_MACRO_CNTL_RESERVED_MASK
  68666. CPLL_MACRO_CNTL_RESERVED1__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68667. CPLL_MACRO_CNTL_RESERVED2__CPLL_MACRO_CNTL_RESERVED_MASK
  68668. CPLL_MACRO_CNTL_RESERVED2__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68669. CPLL_MACRO_CNTL_RESERVED3__CPLL_MACRO_CNTL_RESERVED_MASK
  68670. CPLL_MACRO_CNTL_RESERVED3__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68671. CPLL_MACRO_CNTL_RESERVED4__CPLL_MACRO_CNTL_RESERVED_MASK
  68672. CPLL_MACRO_CNTL_RESERVED4__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68673. CPLL_MACRO_CNTL_RESERVED5__CPLL_MACRO_CNTL_RESERVED_MASK
  68674. CPLL_MACRO_CNTL_RESERVED5__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68675. CPLL_MACRO_CNTL_RESERVED6__CPLL_MACRO_CNTL_RESERVED_MASK
  68676. CPLL_MACRO_CNTL_RESERVED6__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68677. CPLL_MACRO_CNTL_RESERVED7__CPLL_MACRO_CNTL_RESERVED_MASK
  68678. CPLL_MACRO_CNTL_RESERVED7__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68679. CPLL_MACRO_CNTL_RESERVED8__CPLL_MACRO_CNTL_RESERVED_MASK
  68680. CPLL_MACRO_CNTL_RESERVED8__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68681. CPLL_MACRO_CNTL_RESERVED9__CPLL_MACRO_CNTL_RESERVED_MASK
  68682. CPLL_MACRO_CNTL_RESERVED9__CPLL_MACRO_CNTL_RESERVED__SHIFT
  68683. CPLSW_INTR_MASK
  68684. CPL_ABORT_NO_RST
  68685. CPL_ABORT_POST_CLOSE_REQ
  68686. CPL_ABORT_REQ
  68687. CPL_ABORT_REQ_RSS
  68688. CPL_ABORT_RPL
  68689. CPL_ABORT_RPL_RSS
  68690. CPL_ABORT_SEND_RST
  68691. CPL_ACT_ESTABLISH
  68692. CPL_ACT_OPEN_REQ
  68693. CPL_ACT_OPEN_REQ6
  68694. CPL_ACT_OPEN_RPL
  68695. CPL_ARP_MISS_REQ
  68696. CPL_ARP_MISS_RPL
  68697. CPL_ASYNC_NOTIF
  68698. CPL_BARRIER
  68699. CPL_BLOCK_COUNT
  68700. CPL_CLOSE_CON_REQ
  68701. CPL_CLOSE_CON_RPL
  68702. CPL_CLOSE_LISTSRV_REQ
  68703. CPL_CLOSE_LISTSRV_RPL
  68704. CPL_CONN_POLICY_ASK
  68705. CPL_CONN_POLICY_AUTO
  68706. CPL_CONN_POLICY_DENY
  68707. CPL_CONN_POLICY_FILTER
  68708. CPL_CONTAINS_READ_RPL
  68709. CPL_CONTAINS_WRITE_RPL
  68710. CPL_ERROR
  68711. CPL_ERR_ABORT_FAILED
  68712. CPL_ERR_ARP_MISS
  68713. CPL_ERR_BAD_LENGTH
  68714. CPL_ERR_BAD_ROUTE
  68715. CPL_ERR_BAD_SYN
  68716. CPL_ERR_CONN_EXIST
  68717. CPL_ERR_CONN_EXIST_SYNRECV
  68718. CPL_ERR_CONN_RESET
  68719. CPL_ERR_CONN_TIMEDOUT
  68720. CPL_ERR_FINWAIT2_TIMEDOUT
  68721. CPL_ERR_GENERAL
  68722. CPL_ERR_IWARP_FLM
  68723. CPL_ERR_KEEPALIVE_TIMEDOUT
  68724. CPL_ERR_KEEPALV_NEG_ADVICE
  68725. CPL_ERR_NONE
  68726. CPL_ERR_PERSIST_NEG_ADVICE
  68727. CPL_ERR_PERSIST_TIMEDOUT
  68728. CPL_ERR_RTX_NEG_ADVICE
  68729. CPL_ERR_TCAM_FULL
  68730. CPL_ERR_TCAM_MISS
  68731. CPL_ERR_TCAM_PARITY
  68732. CPL_ERR_XMIT_TIMEDOUT
  68733. CPL_ETH_802_3
  68734. CPL_ETH_802_3_VLAN
  68735. CPL_ETH_II
  68736. CPL_ETH_II_VLAN
  68737. CPL_FW4_ACK
  68738. CPL_FW4_ACK_FLAGS_CH
  68739. CPL_FW4_ACK_FLAGS_FLOWC
  68740. CPL_FW4_ACK_FLAGS_SEQVAL
  68741. CPL_FW4_MSG
  68742. CPL_FW4_PLD
  68743. CPL_FW6_MSG
  68744. CPL_FW6_PLD
  68745. CPL_GET_TCB
  68746. CPL_GET_TCB_RPL
  68747. CPL_INTR_CAUSE_A
  68748. CPL_ISCSI_DATA
  68749. CPL_ISCSI_HDR
  68750. CPL_L2T_READ_REQ
  68751. CPL_L2T_READ_RPL
  68752. CPL_L2T_VLAN_NONE
  68753. CPL_L2T_WRITE_REQ
  68754. CPL_L2T_WRITE_RPL
  68755. CPL_MIGRATE_C2T_REQ
  68756. CPL_MIGRATE_C2T_RPL
  68757. CPL_MSS_CHANGE
  68758. CPL_OPCODE_G
  68759. CPL_OPCODE_S
  68760. CPL_OPCODE_V
  68761. CPL_PASS_ACCEPT_REQ
  68762. CPL_PASS_ACCEPT_RPL
  68763. CPL_PASS_ESTABLISH
  68764. CPL_PASS_OPEN_ACCEPT
  68765. CPL_PASS_OPEN_REJECT
  68766. CPL_PASS_OPEN_REQ
  68767. CPL_PASS_OPEN_REQ6
  68768. CPL_PASS_OPEN_RPL
  68769. CPL_PCMD
  68770. CPL_PCMD_READ
  68771. CPL_PCMD_READ_RPL
  68772. CPL_PCMD_RPL
  68773. CPL_PEER_CLOSE
  68774. CPL_PRIORITY_ACK
  68775. CPL_PRIORITY_CONTROL
  68776. CPL_PRIORITY_DATA
  68777. CPL_PRIORITY_LISTEN
  68778. CPL_PRIORITY_SETUP
  68779. CPL_PRIORITY_TEARDOWN
  68780. CPL_RDMA_CQE
  68781. CPL_RDMA_CQE_ERR
  68782. CPL_RDMA_CQE_READ_RSP
  68783. CPL_RDMA_EC_STATUS
  68784. CPL_RDMA_READ_REQ
  68785. CPL_RDMA_TERMINATE
  68786. CPL_RDMA_WRITE
  68787. CPL_RET_BAD_MSG
  68788. CPL_RET_BUF_DONE
  68789. CPL_RET_UNKNOWN_TID
  68790. CPL_RTE_DELETE_REQ
  68791. CPL_RTE_DELETE_RPL
  68792. CPL_RTE_READ_REQ
  68793. CPL_RTE_READ_RPL
  68794. CPL_RTE_WRITE_REQ
  68795. CPL_RTE_WRITE_RPL
  68796. CPL_RX_DATA
  68797. CPL_RX_DATA_ACK
  68798. CPL_RX_DATA_DDP
  68799. CPL_RX_DDP_COMPLETE
  68800. CPL_RX_DDP_STATUS_DCRC_SHIFT
  68801. CPL_RX_DDP_STATUS_DDP_SHIFT
  68802. CPL_RX_DDP_STATUS_HCRC_SHIFT
  68803. CPL_RX_DDP_STATUS_PAD_SHIFT
  68804. CPL_RX_ISCSI_CMP
  68805. CPL_RX_ISCSI_DDP
  68806. CPL_RX_ISCSI_DDP_STATUS_DCRC_SHIFT
  68807. CPL_RX_ISCSI_DDP_STATUS_DDP_SHIFT
  68808. CPL_RX_ISCSI_DDP_STATUS_HCRC_SHIFT
  68809. CPL_RX_ISCSI_DDP_STATUS_PAD_SHIFT
  68810. CPL_RX_ISCSI_HDR
  68811. CPL_RX_MPS_PKT
  68812. CPL_RX_MPS_PKT_OP_G
  68813. CPL_RX_MPS_PKT_OP_M
  68814. CPL_RX_MPS_PKT_OP_S
  68815. CPL_RX_MPS_PKT_OP_V
  68816. CPL_RX_MPS_PKT_TYPE_G
  68817. CPL_RX_MPS_PKT_TYPE_M
  68818. CPL_RX_MPS_PKT_TYPE_S
  68819. CPL_RX_MPS_PKT_TYPE_V
  68820. CPL_RX_PHYS_ADDR
  68821. CPL_RX_PHYS_DSGL
  68822. CPL_RX_PHYS_DSGL_DCAID_G
  68823. CPL_RX_PHYS_DSGL_DCAID_M
  68824. CPL_RX_PHYS_DSGL_DCAID_S
  68825. CPL_RX_PHYS_DSGL_DCAID_V
  68826. CPL_RX_PHYS_DSGL_ISRDMA_F
  68827. CPL_RX_PHYS_DSGL_ISRDMA_G
  68828. CPL_RX_PHYS_DSGL_ISRDMA_M
  68829. CPL_RX_PHYS_DSGL_ISRDMA_S
  68830. CPL_RX_PHYS_DSGL_ISRDMA_V
  68831. CPL_RX_PHYS_DSGL_NOOFSGENTR_G
  68832. CPL_RX_PHYS_DSGL_NOOFSGENTR_M
  68833. CPL_RX_PHYS_DSGL_NOOFSGENTR_S
  68834. CPL_RX_PHYS_DSGL_NOOFSGENTR_V
  68835. CPL_RX_PHYS_DSGL_OPCODE_G
  68836. CPL_RX_PHYS_DSGL_OPCODE_M
  68837. CPL_RX_PHYS_DSGL_OPCODE_S
  68838. CPL_RX_PHYS_DSGL_OPCODE_V
  68839. CPL_RX_PHYS_DSGL_PCINOSNOOP_F
  68840. CPL_RX_PHYS_DSGL_PCINOSNOOP_G
  68841. CPL_RX_PHYS_DSGL_PCINOSNOOP_M
  68842. CPL_RX_PHYS_DSGL_PCINOSNOOP_S
  68843. CPL_RX_PHYS_DSGL_PCINOSNOOP_V
  68844. CPL_RX_PHYS_DSGL_PCIRLXORDER_F
  68845. CPL_RX_PHYS_DSGL_PCIRLXORDER_G
  68846. CPL_RX_PHYS_DSGL_PCIRLXORDER_M
  68847. CPL_RX_PHYS_DSGL_PCIRLXORDER_S
  68848. CPL_RX_PHYS_DSGL_PCIRLXORDER_V
  68849. CPL_RX_PHYS_DSGL_PCITPHNTENB_F
  68850. CPL_RX_PHYS_DSGL_PCITPHNTENB_G
  68851. CPL_RX_PHYS_DSGL_PCITPHNTENB_M
  68852. CPL_RX_PHYS_DSGL_PCITPHNTENB_S
  68853. CPL_RX_PHYS_DSGL_PCITPHNTENB_V
  68854. CPL_RX_PHYS_DSGL_PCITPHNT_G
  68855. CPL_RX_PHYS_DSGL_PCITPHNT_M
  68856. CPL_RX_PHYS_DSGL_PCITPHNT_S
  68857. CPL_RX_PHYS_DSGL_PCITPHNT_V
  68858. CPL_RX_PHYS_DSGL_RSVD1_G
  68859. CPL_RX_PHYS_DSGL_RSVD1_M
  68860. CPL_RX_PHYS_DSGL_RSVD1_S
  68861. CPL_RX_PHYS_DSGL_RSVD1_V
  68862. CPL_RX_PKT
  68863. CPL_RX_PKT_FLAGS
  68864. CPL_RX_TLS_CMP
  68865. CPL_RX_TLS_CMP_LENGTH_G
  68866. CPL_RX_TLS_CMP_LENGTH_M
  68867. CPL_RX_TLS_CMP_LENGTH_S
  68868. CPL_RX_TLS_CMP_LENGTH_V
  68869. CPL_RX_TLS_CMP_OPCODE_G
  68870. CPL_RX_TLS_CMP_OPCODE_M
  68871. CPL_RX_TLS_CMP_OPCODE_S
  68872. CPL_RX_TLS_CMP_OPCODE_V
  68873. CPL_RX_TLS_CMP_PDULENGTH_G
  68874. CPL_RX_TLS_CMP_PDULENGTH_M
  68875. CPL_RX_TLS_CMP_PDULENGTH_S
  68876. CPL_RX_TLS_CMP_PDULENGTH_V
  68877. CPL_RX_TLS_CMP_TID_G
  68878. CPL_RX_TLS_CMP_TID_M
  68879. CPL_RX_TLS_CMP_TID_S
  68880. CPL_RX_TLS_CMP_TID_V
  68881. CPL_RX_URG_NOTIFY
  68882. CPL_SET_TCB
  68883. CPL_SET_TCB_FIELD
  68884. CPL_SET_TCB_RPL
  68885. CPL_SGE_EGR_UPDATE
  68886. CPL_SMT_READ_REQ
  68887. CPL_SMT_READ_RPL
  68888. CPL_SMT_WRITE_REQ
  68889. CPL_SMT_WRITE_RPL
  68890. CPL_SRQ_TABLE_REQ
  68891. CPL_SRQ_TABLE_RPL
  68892. CPL_SWITCH_F
  68893. CPL_SWITCH_S
  68894. CPL_SWITCH_V
  68895. CPL_TID_RELEASE
  68896. CPL_TLS_DATA
  68897. CPL_TLS_DATA_LENGTH_G
  68898. CPL_TLS_DATA_LENGTH_M
  68899. CPL_TLS_DATA_LENGTH_S
  68900. CPL_TLS_DATA_LENGTH_V
  68901. CPL_TLS_DATA_OPCODE_G
  68902. CPL_TLS_DATA_OPCODE_M
  68903. CPL_TLS_DATA_OPCODE_S
  68904. CPL_TLS_DATA_OPCODE_V
  68905. CPL_TLS_DATA_TID_G
  68906. CPL_TLS_DATA_TID_M
  68907. CPL_TLS_DATA_TID_S
  68908. CPL_TLS_DATA_TID_V
  68909. CPL_TRACE_PKT
  68910. CPL_TRACE_PKT_T5
  68911. CPL_TX_DATA
  68912. CPL_TX_DATA_ACK
  68913. CPL_TX_DATA_ISO
  68914. CPL_TX_DATA_ISO_CPLHDRLEN_F
  68915. CPL_TX_DATA_ISO_CPLHDRLEN_G
  68916. CPL_TX_DATA_ISO_CPLHDRLEN_M
  68917. CPL_TX_DATA_ISO_CPLHDRLEN_S
  68918. CPL_TX_DATA_ISO_CPLHDRLEN_V
  68919. CPL_TX_DATA_ISO_FIRST_F
  68920. CPL_TX_DATA_ISO_FIRST_G
  68921. CPL_TX_DATA_ISO_FIRST_M
  68922. CPL_TX_DATA_ISO_FIRST_S
  68923. CPL_TX_DATA_ISO_FIRST_V
  68924. CPL_TX_DATA_ISO_HDRCRC_F
  68925. CPL_TX_DATA_ISO_HDRCRC_G
  68926. CPL_TX_DATA_ISO_HDRCRC_M
  68927. CPL_TX_DATA_ISO_HDRCRC_S
  68928. CPL_TX_DATA_ISO_HDRCRC_V
  68929. CPL_TX_DATA_ISO_IMMEDIATE_F
  68930. CPL_TX_DATA_ISO_IMMEDIATE_G
  68931. CPL_TX_DATA_ISO_IMMEDIATE_M
  68932. CPL_TX_DATA_ISO_IMMEDIATE_S
  68933. CPL_TX_DATA_ISO_IMMEDIATE_V
  68934. CPL_TX_DATA_ISO_LAST_F
  68935. CPL_TX_DATA_ISO_LAST_G
  68936. CPL_TX_DATA_ISO_LAST_M
  68937. CPL_TX_DATA_ISO_LAST_S
  68938. CPL_TX_DATA_ISO_LAST_V
  68939. CPL_TX_DATA_ISO_OP_G
  68940. CPL_TX_DATA_ISO_OP_M
  68941. CPL_TX_DATA_ISO_OP_S
  68942. CPL_TX_DATA_ISO_OP_V
  68943. CPL_TX_DATA_ISO_PLDCRC_F
  68944. CPL_TX_DATA_ISO_PLDCRC_G
  68945. CPL_TX_DATA_ISO_PLDCRC_M
  68946. CPL_TX_DATA_ISO_PLDCRC_S
  68947. CPL_TX_DATA_ISO_PLDCRC_V
  68948. CPL_TX_DATA_ISO_SCSI_G
  68949. CPL_TX_DATA_ISO_SCSI_M
  68950. CPL_TX_DATA_ISO_SCSI_S
  68951. CPL_TX_DATA_ISO_SCSI_V
  68952. CPL_TX_DATA_ISO_SEGLEN_OFFSET_G
  68953. CPL_TX_DATA_ISO_SEGLEN_OFFSET_M
  68954. CPL_TX_DATA_ISO_SEGLEN_OFFSET_S
  68955. CPL_TX_DATA_ISO_SEGLEN_OFFSET_V
  68956. CPL_TX_DMA_ACK
  68957. CPL_TX_PKT
  68958. CPL_TX_PKT_LSO
  68959. CPL_TX_PKT_XT
  68960. CPL_TX_SEC_PDU
  68961. CPL_TX_SEC_PDU_AADSTART_G
  68962. CPL_TX_SEC_PDU_AADSTART_M
  68963. CPL_TX_SEC_PDU_AADSTART_S
  68964. CPL_TX_SEC_PDU_AADSTART_V
  68965. CPL_TX_SEC_PDU_AADSTOP_G
  68966. CPL_TX_SEC_PDU_AADSTOP_M
  68967. CPL_TX_SEC_PDU_AADSTOP_S
  68968. CPL_TX_SEC_PDU_AADSTOP_V
  68969. CPL_TX_SEC_PDU_ACKFOLLOWS_F
  68970. CPL_TX_SEC_PDU_ACKFOLLOWS_G
  68971. CPL_TX_SEC_PDU_ACKFOLLOWS_M
  68972. CPL_TX_SEC_PDU_ACKFOLLOWS_S
  68973. CPL_TX_SEC_PDU_ACKFOLLOWS_V
  68974. CPL_TX_SEC_PDU_AUTHINSERT_G
  68975. CPL_TX_SEC_PDU_AUTHINSERT_M
  68976. CPL_TX_SEC_PDU_AUTHINSERT_S
  68977. CPL_TX_SEC_PDU_AUTHINSERT_V
  68978. CPL_TX_SEC_PDU_AUTHSTART_G
  68979. CPL_TX_SEC_PDU_AUTHSTART_M
  68980. CPL_TX_SEC_PDU_AUTHSTART_S
  68981. CPL_TX_SEC_PDU_AUTHSTART_V
  68982. CPL_TX_SEC_PDU_AUTHSTOP_G
  68983. CPL_TX_SEC_PDU_AUTHSTOP_M
  68984. CPL_TX_SEC_PDU_AUTHSTOP_S
  68985. CPL_TX_SEC_PDU_AUTHSTOP_V
  68986. CPL_TX_SEC_PDU_CIPHERSTART_G
  68987. CPL_TX_SEC_PDU_CIPHERSTART_M
  68988. CPL_TX_SEC_PDU_CIPHERSTART_S
  68989. CPL_TX_SEC_PDU_CIPHERSTART_V
  68990. CPL_TX_SEC_PDU_CIPHERSTOP_HI_G
  68991. CPL_TX_SEC_PDU_CIPHERSTOP_HI_M
  68992. CPL_TX_SEC_PDU_CIPHERSTOP_HI_S
  68993. CPL_TX_SEC_PDU_CIPHERSTOP_HI_V
  68994. CPL_TX_SEC_PDU_CIPHERSTOP_LO_G
  68995. CPL_TX_SEC_PDU_CIPHERSTOP_LO_M
  68996. CPL_TX_SEC_PDU_CIPHERSTOP_LO_S
  68997. CPL_TX_SEC_PDU_CIPHERSTOP_LO_V
  68998. CPL_TX_SEC_PDU_CPLLEN_G
  68999. CPL_TX_SEC_PDU_CPLLEN_M
  69000. CPL_TX_SEC_PDU_CPLLEN_S
  69001. CPL_TX_SEC_PDU_CPLLEN_V
  69002. CPL_TX_SEC_PDU_IVINSRTOFST_G
  69003. CPL_TX_SEC_PDU_IVINSRTOFST_M
  69004. CPL_TX_SEC_PDU_IVINSRTOFST_S
  69005. CPL_TX_SEC_PDU_IVINSRTOFST_V
  69006. CPL_TX_SEC_PDU_OPCODE_G
  69007. CPL_TX_SEC_PDU_OPCODE_M
  69008. CPL_TX_SEC_PDU_OPCODE_S
  69009. CPL_TX_SEC_PDU_OPCODE_V
  69010. CPL_TX_SEC_PDU_PLACEHOLDER_G
  69011. CPL_TX_SEC_PDU_PLACEHOLDER_M
  69012. CPL_TX_SEC_PDU_PLACEHOLDER_S
  69013. CPL_TX_SEC_PDU_PLACEHOLDER_V
  69014. CPL_TX_SEC_PDU_RXCHID_F
  69015. CPL_TX_SEC_PDU_RXCHID_G
  69016. CPL_TX_SEC_PDU_RXCHID_M
  69017. CPL_TX_SEC_PDU_RXCHID_S
  69018. CPL_TX_SEC_PDU_RXCHID_V
  69019. CPL_TX_SEC_PDU_ULPTXLPBK_F
  69020. CPL_TX_SEC_PDU_ULPTXLPBK_G
  69021. CPL_TX_SEC_PDU_ULPTXLPBK_M
  69022. CPL_TX_SEC_PDU_ULPTXLPBK_S
  69023. CPL_TX_SEC_PDU_ULPTXLPBK_V
  69024. CPL_TX_TLS_ACK
  69025. CPL_TX_TLS_PDU
  69026. CPL_TX_TLS_SFO
  69027. CPL_TX_TLS_SFO_CPL_LEN_S
  69028. CPL_TX_TLS_SFO_CPL_LEN_V
  69029. CPL_TX_TLS_SFO_DATA_TYPE_S
  69030. CPL_TX_TLS_SFO_DATA_TYPE_V
  69031. CPL_TX_TLS_SFO_OPCODE_S
  69032. CPL_TX_TLS_SFO_OPCODE_V
  69033. CPL_TX_TLS_SFO_PROTOVER_G
  69034. CPL_TX_TLS_SFO_PROTOVER_M
  69035. CPL_TX_TLS_SFO_PROTOVER_S
  69036. CPL_TX_TLS_SFO_PROTOVER_V
  69037. CPL_TX_TLS_SFO_SEG_LEN_G
  69038. CPL_TX_TLS_SFO_SEG_LEN_M
  69039. CPL_TX_TLS_SFO_SEG_LEN_S
  69040. CPL_TX_TLS_SFO_SEG_LEN_V
  69041. CPL_TX_TLS_SFO_TYPE_ALERT
  69042. CPL_TX_TLS_SFO_TYPE_CCS
  69043. CPL_TX_TLS_SFO_TYPE_DATA
  69044. CPL_TX_TLS_SFO_TYPE_G
  69045. CPL_TX_TLS_SFO_TYPE_HANDSHAKE
  69046. CPL_TX_TLS_SFO_TYPE_HEARTBEAT
  69047. CPL_TX_TLS_SFO_TYPE_M
  69048. CPL_TX_TLS_SFO_TYPE_S
  69049. CPL_TX_TLS_SFO_TYPE_V
  69050. CPL_TX_TNL_LSO
  69051. CPL_TX_TNL_LSO_ETHHDRLENOUT_G
  69052. CPL_TX_TNL_LSO_ETHHDRLENOUT_M
  69053. CPL_TX_TNL_LSO_ETHHDRLENOUT_S
  69054. CPL_TX_TNL_LSO_ETHHDRLENOUT_V
  69055. CPL_TX_TNL_LSO_ETHHDRLENXOUT_F
  69056. CPL_TX_TNL_LSO_ETHHDRLENXOUT_G
  69057. CPL_TX_TNL_LSO_ETHHDRLENXOUT_M
  69058. CPL_TX_TNL_LSO_ETHHDRLENXOUT_S
  69059. CPL_TX_TNL_LSO_ETHHDRLENXOUT_V
  69060. CPL_TX_TNL_LSO_ETHHDRLEN_G
  69061. CPL_TX_TNL_LSO_ETHHDRLEN_M
  69062. CPL_TX_TNL_LSO_ETHHDRLEN_S
  69063. CPL_TX_TNL_LSO_ETHHDRLEN_V
  69064. CPL_TX_TNL_LSO_FIRST_F
  69065. CPL_TX_TNL_LSO_FIRST_G
  69066. CPL_TX_TNL_LSO_FIRST_M
  69067. CPL_TX_TNL_LSO_FIRST_S
  69068. CPL_TX_TNL_LSO_FIRST_V
  69069. CPL_TX_TNL_LSO_IPHDRCHKOUT_F
  69070. CPL_TX_TNL_LSO_IPHDRCHKOUT_G
  69071. CPL_TX_TNL_LSO_IPHDRCHKOUT_M
  69072. CPL_TX_TNL_LSO_IPHDRCHKOUT_S
  69073. CPL_TX_TNL_LSO_IPHDRCHKOUT_V
  69074. CPL_TX_TNL_LSO_IPHDRLENOUT_G
  69075. CPL_TX_TNL_LSO_IPHDRLENOUT_M
  69076. CPL_TX_TNL_LSO_IPHDRLENOUT_S
  69077. CPL_TX_TNL_LSO_IPHDRLENOUT_V
  69078. CPL_TX_TNL_LSO_IPHDRLEN_G
  69079. CPL_TX_TNL_LSO_IPHDRLEN_M
  69080. CPL_TX_TNL_LSO_IPHDRLEN_S
  69081. CPL_TX_TNL_LSO_IPHDRLEN_V
  69082. CPL_TX_TNL_LSO_IPIDINCOUT_F
  69083. CPL_TX_TNL_LSO_IPIDINCOUT_G
  69084. CPL_TX_TNL_LSO_IPIDINCOUT_M
  69085. CPL_TX_TNL_LSO_IPIDINCOUT_S
  69086. CPL_TX_TNL_LSO_IPIDINCOUT_V
  69087. CPL_TX_TNL_LSO_IPLENSETOUT_F
  69088. CPL_TX_TNL_LSO_IPLENSETOUT_G
  69089. CPL_TX_TNL_LSO_IPLENSETOUT_M
  69090. CPL_TX_TNL_LSO_IPLENSETOUT_S
  69091. CPL_TX_TNL_LSO_IPLENSETOUT_V
  69092. CPL_TX_TNL_LSO_IPV6OUT_F
  69093. CPL_TX_TNL_LSO_IPV6OUT_G
  69094. CPL_TX_TNL_LSO_IPV6OUT_M
  69095. CPL_TX_TNL_LSO_IPV6OUT_S
  69096. CPL_TX_TNL_LSO_IPV6OUT_V
  69097. CPL_TX_TNL_LSO_IPV6_F
  69098. CPL_TX_TNL_LSO_IPV6_G
  69099. CPL_TX_TNL_LSO_IPV6_M
  69100. CPL_TX_TNL_LSO_IPV6_S
  69101. CPL_TX_TNL_LSO_IPV6_V
  69102. CPL_TX_TNL_LSO_LAST_F
  69103. CPL_TX_TNL_LSO_LAST_G
  69104. CPL_TX_TNL_LSO_LAST_M
  69105. CPL_TX_TNL_LSO_LAST_S
  69106. CPL_TX_TNL_LSO_LAST_V
  69107. CPL_TX_TNL_LSO_MSS_G
  69108. CPL_TX_TNL_LSO_MSS_M
  69109. CPL_TX_TNL_LSO_MSS_S
  69110. CPL_TX_TNL_LSO_MSS_V
  69111. CPL_TX_TNL_LSO_OPCODE_G
  69112. CPL_TX_TNL_LSO_OPCODE_M
  69113. CPL_TX_TNL_LSO_OPCODE_S
  69114. CPL_TX_TNL_LSO_OPCODE_V
  69115. CPL_TX_TNL_LSO_SIZE_G
  69116. CPL_TX_TNL_LSO_SIZE_M
  69117. CPL_TX_TNL_LSO_SIZE_S
  69118. CPL_TX_TNL_LSO_SIZE_V
  69119. CPL_TX_TNL_LSO_TCPHDRLEN_G
  69120. CPL_TX_TNL_LSO_TCPHDRLEN_M
  69121. CPL_TX_TNL_LSO_TCPHDRLEN_S
  69122. CPL_TX_TNL_LSO_TCPHDRLEN_V
  69123. CPL_TX_TNL_LSO_TNLHDRLEN_G
  69124. CPL_TX_TNL_LSO_TNLHDRLEN_M
  69125. CPL_TX_TNL_LSO_TNLHDRLEN_S
  69126. CPL_TX_TNL_LSO_TNLHDRLEN_V
  69127. CPL_TX_TNL_LSO_TNLTYPE_G
  69128. CPL_TX_TNL_LSO_TNLTYPE_M
  69129. CPL_TX_TNL_LSO_TNLTYPE_S
  69130. CPL_TX_TNL_LSO_TNLTYPE_V
  69131. CPL_TX_TNL_LSO_UDPCHKCLROUT_F
  69132. CPL_TX_TNL_LSO_UDPCHKCLROUT_G
  69133. CPL_TX_TNL_LSO_UDPCHKCLROUT_M
  69134. CPL_TX_TNL_LSO_UDPCHKCLROUT_S
  69135. CPL_TX_TNL_LSO_UDPCHKCLROUT_V
  69136. CPL_TX_TNL_LSO_UDPLENSETOUT_F
  69137. CPL_TX_TNL_LSO_UDPLENSETOUT_G
  69138. CPL_TX_TNL_LSO_UDPLENSETOUT_M
  69139. CPL_TX_TNL_LSO_UDPLENSETOUT_S
  69140. CPL_TX_TNL_LSO_UDPLENSETOUT_V
  69141. CPL_error
  69142. CPL_opcode
  69143. CPM2_BRG_INT_CLK
  69144. CPM2_BRG_UART_CLK
  69145. CPM2_IRQ_EXT1
  69146. CPM2_IRQ_EXT7
  69147. CPM2_IRQ_PORTC0
  69148. CPM2_IRQ_PORTC15
  69149. CPMAC_BUFFER_OFFSET
  69150. CPMAC_EOP
  69151. CPMAC_EOQ
  69152. CPMAC_MAC_ADDR_HI
  69153. CPMAC_MAC_ADDR_LO
  69154. CPMAC_MAC_ADDR_MID
  69155. CPMAC_MAC_CONTROL
  69156. CPMAC_MAC_EOI_VECTOR
  69157. CPMAC_MAC_HASH_HI
  69158. CPMAC_MAC_HASH_LO
  69159. CPMAC_MAC_INT_CLEAR
  69160. CPMAC_MAC_INT_ENABLE
  69161. CPMAC_MAC_INT_VECTOR
  69162. CPMAC_MAC_STATUS
  69163. CPMAC_MAX_LENGTH
  69164. CPMAC_MBP
  69165. CPMAC_MDIO_ACCESS
  69166. CPMAC_MDIO_ALIVE
  69167. CPMAC_MDIO_CONTROL
  69168. CPMAC_MDIO_LINK
  69169. CPMAC_MDIO_PHYSEL
  69170. CPMAC_MDIO_VERSION
  69171. CPMAC_OWN
  69172. CPMAC_QUEUES
  69173. CPMAC_REG_END
  69174. CPMAC_RX_ACK
  69175. CPMAC_RX_CONTROL
  69176. CPMAC_RX_INT_CLEAR
  69177. CPMAC_RX_INT_ENABLE
  69178. CPMAC_RX_PTR
  69179. CPMAC_RX_TEARDOWN
  69180. CPMAC_SKB_SIZE
  69181. CPMAC_SOP
  69182. CPMAC_STATS_RX_ALIGN
  69183. CPMAC_STATS_RX_BCAST
  69184. CPMAC_STATS_RX_CRC
  69185. CPMAC_STATS_RX_FILTER
  69186. CPMAC_STATS_RX_FRAG
  69187. CPMAC_STATS_RX_GOOD
  69188. CPMAC_STATS_RX_JABBER
  69189. CPMAC_STATS_RX_MCAST
  69190. CPMAC_STATS_RX_OCTETS
  69191. CPMAC_STATS_RX_OVER
  69192. CPMAC_STATS_RX_PAUSE
  69193. CPMAC_STATS_RX_QOSFILTER
  69194. CPMAC_STATS_RX_UNDER
  69195. CPMAC_STATS_TX_BCAST
  69196. CPMAC_STATS_TX_CARRIERSENSE
  69197. CPMAC_STATS_TX_COLLISION
  69198. CPMAC_STATS_TX_DEFER
  69199. CPMAC_STATS_TX_EXCESSCOLL
  69200. CPMAC_STATS_TX_GOOD
  69201. CPMAC_STATS_TX_LATECOLL
  69202. CPMAC_STATS_TX_MCAST
  69203. CPMAC_STATS_TX_MULTICOLL
  69204. CPMAC_STATS_TX_OCTETS
  69205. CPMAC_STATS_TX_PAUSE
  69206. CPMAC_STATS_TX_SINGLECOLL
  69207. CPMAC_STATS_TX_UNDERRUN
  69208. CPMAC_TX_ACK
  69209. CPMAC_TX_CONTROL
  69210. CPMAC_TX_INT_CLEAR
  69211. CPMAC_TX_INT_ENABLE
  69212. CPMAC_TX_PTR
  69213. CPMAC_TX_TEARDOWN
  69214. CPMAC_UNICAST_CLEAR
  69215. CPMAC_UNICAST_ENABLE
  69216. CPMAC_VERSION
  69217. CPMFCR_BDB
  69218. CPMFCR_DTB
  69219. CPMFCR_EB
  69220. CPMFCR_GBL
  69221. CPMFCR_TC2
  69222. CPMON1_S
  69223. CPMON1_S_DW1LOCK
  69224. CPMON1_S_ERRMON
  69225. CPMON1_S_FSYNC
  69226. CPMON1_S_SIGOFF
  69227. CPMON1_S_W1LOCK
  69228. CPMON1_S_W2LOCK
  69229. CPMUX_CLK_MASK
  69230. CPMUX_CLK_ROUTE
  69231. CPMU_CLCK_ORIDE_MAC_ORIDE_EN
  69232. CPMU_CLCK_STAT_MAC_CLCK_12_5
  69233. CPMU_CLCK_STAT_MAC_CLCK_62_5
  69234. CPMU_CLCK_STAT_MAC_CLCK_6_25
  69235. CPMU_CLCK_STAT_MAC_CLCK_MASK
  69236. CPMU_CTRL_GPHY_10MB_RXONLY
  69237. CPMU_CTRL_LINK_AWARE_MODE
  69238. CPMU_CTRL_LINK_IDLE_MODE
  69239. CPMU_CTRL_LINK_SPEED_MODE
  69240. CPMU_HST_ACC_MACCLK_6_25
  69241. CPMU_HST_ACC_MACCLK_MASK
  69242. CPMU_LNK_AWARE_MACCLK_6_25
  69243. CPMU_LNK_AWARE_MACCLK_MASK
  69244. CPMU_LSPD_1000MB_MACCLK_12_5
  69245. CPMU_LSPD_1000MB_MACCLK_62_5
  69246. CPMU_LSPD_1000MB_MACCLK_MASK
  69247. CPMU_LSPD_10MB_MACCLK_6_25
  69248. CPMU_LSPD_10MB_MACCLK_MASK
  69249. CPMU_MUTEX_GNT_DRIVER
  69250. CPMU_MUTEX_REQ_DRIVER
  69251. CPMVEC_ERROR
  69252. CPMVEC_I2C
  69253. CPMVEC_IDMA1
  69254. CPMVEC_IDMA2
  69255. CPMVEC_NR
  69256. CPMVEC_PIO_PC10
  69257. CPMVEC_PIO_PC11
  69258. CPMVEC_PIO_PC12
  69259. CPMVEC_PIO_PC13
  69260. CPMVEC_PIO_PC14
  69261. CPMVEC_PIO_PC15
  69262. CPMVEC_PIO_PC4
  69263. CPMVEC_PIO_PC5
  69264. CPMVEC_PIO_PC6
  69265. CPMVEC_PIO_PC7
  69266. CPMVEC_PIO_PC8
  69267. CPMVEC_PIO_PC9
  69268. CPMVEC_RISCTIMER
  69269. CPMVEC_SCC1
  69270. CPMVEC_SCC2
  69271. CPMVEC_SCC3
  69272. CPMVEC_SCC4
  69273. CPMVEC_SDMA_CB_ERR
  69274. CPMVEC_SMC1
  69275. CPMVEC_SMC2
  69276. CPMVEC_SPI
  69277. CPMVEC_TIMER1
  69278. CPMVEC_TIMER2
  69279. CPMVEC_TIMER3
  69280. CPMVEC_TIMER4
  69281. CPM_BRG1
  69282. CPM_BRG2
  69283. CPM_BRG3
  69284. CPM_BRG4
  69285. CPM_BRG5
  69286. CPM_BRG6
  69287. CPM_BRG7
  69288. CPM_BRG8
  69289. CPM_BRG_ATB
  69290. CPM_BRG_CD_MASK
  69291. CPM_BRG_DIV16
  69292. CPM_BRG_EN
  69293. CPM_BRG_EXTC_CLK2
  69294. CPM_BRG_EXTC_CLK3_9
  69295. CPM_BRG_EXTC_CLK5_15
  69296. CPM_BRG_EXTC_CLK6
  69297. CPM_BRG_EXTC_INT
  69298. CPM_BRG_RST
  69299. CPM_CLK1
  69300. CPM_CLK10
  69301. CPM_CLK11
  69302. CPM_CLK12
  69303. CPM_CLK13
  69304. CPM_CLK14
  69305. CPM_CLK15
  69306. CPM_CLK16
  69307. CPM_CLK17
  69308. CPM_CLK18
  69309. CPM_CLK19
  69310. CPM_CLK2
  69311. CPM_CLK20
  69312. CPM_CLK3
  69313. CPM_CLK4
  69314. CPM_CLK5
  69315. CPM_CLK6
  69316. CPM_CLK7
  69317. CPM_CLK8
  69318. CPM_CLK9
  69319. CPM_CLK_DUMMY
  69320. CPM_CLK_FCC1
  69321. CPM_CLK_FCC2
  69322. CPM_CLK_FCC3
  69323. CPM_CLK_NONE
  69324. CPM_CLK_RTX
  69325. CPM_CLK_RX
  69326. CPM_CLK_SCC1
  69327. CPM_CLK_SCC2
  69328. CPM_CLK_SCC3
  69329. CPM_CLK_SCC4
  69330. CPM_CLK_SMC1
  69331. CPM_CLK_SMC2
  69332. CPM_CLK_TX
  69333. CPM_CMD_INIT_RX_TX
  69334. CPM_CMD_RESTART_TX
  69335. CPM_CMD_STOP_TX
  69336. CPM_CONTROL__CLKREQb_UNGATE_TXCLK_ENABLE_MASK
  69337. CPM_CONTROL__CLKREQb_UNGATE_TXCLK_ENABLE__SHIFT
  69338. CPM_CONTROL__FAST_TXCLK_LATENCY_MASK
  69339. CPM_CONTROL__FAST_TXCLK_LATENCY__SHIFT
  69340. CPM_CONTROL__IGNORE_REGS_IDLE_IN_PG_MASK
  69341. CPM_CONTROL__IGNORE_REGS_IDLE_IN_PG__SHIFT
  69342. CPM_CONTROL__L1_1_PWR_GATE_ENABLE_MASK
  69343. CPM_CONTROL__L1_1_PWR_GATE_ENABLE__SHIFT
  69344. CPM_CONTROL__L1_2_PWR_GATE_ENABLE_MASK
  69345. CPM_CONTROL__L1_2_PWR_GATE_ENABLE__SHIFT
  69346. CPM_CONTROL__L1_PWR_GATE_ENABLE_MASK
  69347. CPM_CONTROL__L1_PWR_GATE_ENABLE__SHIFT
  69348. CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK
  69349. CPM_CONTROL__LCLK_DYN_GATE_ENABLE__SHIFT
  69350. CPM_CONTROL__LCLK_DYN_GATE_LATENCY_MASK
  69351. CPM_CONTROL__LCLK_DYN_GATE_LATENCY__SHIFT
  69352. CPM_CONTROL__LCLK_GATE_ALLOW_IN_L1_MASK
  69353. CPM_CONTROL__LCLK_GATE_ALLOW_IN_L1__SHIFT
  69354. CPM_CONTROL__LCLK_GATE_TXCLK_FREE_MASK
  69355. CPM_CONTROL__LCLK_GATE_TXCLK_FREE__SHIFT
  69356. CPM_CONTROL__MASTER_PCIE_PLL_AUTO_MASK
  69357. CPM_CONTROL__MASTER_PCIE_PLL_AUTO__SHIFT
  69358. CPM_CONTROL__MASTER_PCIE_PLL_SELECT_MASK
  69359. CPM_CONTROL__MASTER_PCIE_PLL_SELECT__SHIFT
  69360. CPM_CONTROL__PCIE_BUFFER_EMPTY_MASK
  69361. CPM_CONTROL__PCIE_BUFFER_EMPTY__SHIFT
  69362. CPM_CONTROL__PCIE_CORE_IDLE_MASK
  69363. CPM_CONTROL__PCIE_CORE_IDLE__SHIFT
  69364. CPM_CONTROL__PCIE_LINK_IDLE_MASK
  69365. CPM_CONTROL__PCIE_LINK_IDLE__SHIFT
  69366. CPM_CONTROL__PG_EARLY_WAKE_ENABLE_MASK
  69367. CPM_CONTROL__PG_EARLY_WAKE_ENABLE__SHIFT
  69368. CPM_CONTROL__RCVR_DET_CLK_ENABLE_MASK
  69369. CPM_CONTROL__RCVR_DET_CLK_ENABLE__SHIFT
  69370. CPM_CONTROL__REFCLKREQ_REFCLKACK_LOOPBACK_ENABLE_MASK
  69371. CPM_CONTROL__REFCLKREQ_REFCLKACK_LOOPBACK_ENABLE__SHIFT
  69372. CPM_CONTROL__REFCLK_REGS_GATE_ENABLE_MASK
  69373. CPM_CONTROL__REFCLK_REGS_GATE_ENABLE__SHIFT
  69374. CPM_CONTROL__REFCLK_REGS_GATE_LATENCY_MASK
  69375. CPM_CONTROL__REFCLK_REGS_GATE_LATENCY__SHIFT
  69376. CPM_CONTROL__REFCLK_XSTCLK_ENABLE_MASK
  69377. CPM_CONTROL__REFCLK_XSTCLK_ENABLE__SHIFT
  69378. CPM_CONTROL__REFCLK_XSTCLK_LATENCY_MASK
  69379. CPM_CONTROL__REFCLK_XSTCLK_LATENCY__SHIFT
  69380. CPM_CONTROL__REGS_IDLE_TO_PG_LATENCY_MASK
  69381. CPM_CONTROL__REGS_IDLE_TO_PG_LATENCY__SHIFT
  69382. CPM_CONTROL__SPARE_REGS0_MASK
  69383. CPM_CONTROL__SPARE_REGS0__SHIFT
  69384. CPM_CONTROL__SPARE_REGS_MASK
  69385. CPM_CONTROL__SPARE_REGS__SHIFT
  69386. CPM_CONTROL__TXCLK_DYN_GATE_ENABLE_MASK
  69387. CPM_CONTROL__TXCLK_DYN_GATE_ENABLE__SHIFT
  69388. CPM_CONTROL__TXCLK_DYN_GATE_LATENCY_MASK
  69389. CPM_CONTROL__TXCLK_DYN_GATE_LATENCY__SHIFT
  69390. CPM_CONTROL__TXCLK_GSKT_GATE_ENABLE_MASK
  69391. CPM_CONTROL__TXCLK_GSKT_GATE_ENABLE__SHIFT
  69392. CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK
  69393. CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE__SHIFT
  69394. CPM_CONTROL__TXCLK_PERM_GATE_ENABLE_MASK
  69395. CPM_CONTROL__TXCLK_PERM_GATE_ENABLE__SHIFT
  69396. CPM_CONTROL__TXCLK_PERM_GATE_LATENCY_MASK
  69397. CPM_CONTROL__TXCLK_PERM_GATE_LATENCY__SHIFT
  69398. CPM_CONTROL__TXCLK_PERM_GATE_PLL_PDN_MASK
  69399. CPM_CONTROL__TXCLK_PERM_GATE_PLL_PDN__SHIFT
  69400. CPM_CONTROL__TXCLK_PIF_GATE_ENABLE_MASK
  69401. CPM_CONTROL__TXCLK_PIF_GATE_ENABLE__SHIFT
  69402. CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK
  69403. CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE__SHIFT
  69404. CPM_CONTROL__TXCLK_REGS_GATE_ENABLE_MASK
  69405. CPM_CONTROL__TXCLK_REGS_GATE_ENABLE__SHIFT
  69406. CPM_CONTROL__TXCLK_REGS_GATE_LATENCY_MASK
  69407. CPM_CONTROL__TXCLK_REGS_GATE_LATENCY__SHIFT
  69408. CPM_CR_CHAN
  69409. CPM_CR_CH_I2C
  69410. CPM_CR_CH_SCC1
  69411. CPM_CR_CH_SCC2
  69412. CPM_CR_CH_SCC3
  69413. CPM_CR_CH_SCC4
  69414. CPM_CR_CH_SMC1
  69415. CPM_CR_CH_SMC2
  69416. CPM_CR_CH_SPI
  69417. CPM_CR_CH_TIMER
  69418. CPM_CR_CLOSE_RX_BD
  69419. CPM_CR_FCC1_PAGE
  69420. CPM_CR_FCC1_SBLOCK
  69421. CPM_CR_FCC2_PAGE
  69422. CPM_CR_FCC2_SBLOCK
  69423. CPM_CR_FCC3_PAGE
  69424. CPM_CR_FCC3_SBLOCK
  69425. CPM_CR_FCC_PAGE
  69426. CPM_CR_FCC_SBLOCK
  69427. CPM_CR_FLG
  69428. CPM_CR_GRA_STOP_TX
  69429. CPM_CR_HUNT_MODE
  69430. CPM_CR_I2C_PAGE
  69431. CPM_CR_I2C_SBLOCK
  69432. CPM_CR_IDMA1_PAGE
  69433. CPM_CR_IDMA1_SBLOCK
  69434. CPM_CR_IDMA2_PAGE
  69435. CPM_CR_IDMA2_SBLOCK
  69436. CPM_CR_IDMA3_PAGE
  69437. CPM_CR_IDMA3_SBLOCK
  69438. CPM_CR_IDMA4_PAGE
  69439. CPM_CR_IDMA4_SBLOCK
  69440. CPM_CR_INIT_RX
  69441. CPM_CR_INIT_TRX
  69442. CPM_CR_INIT_TX
  69443. CPM_CR_MCC1_PAGE
  69444. CPM_CR_MCC1_SBLOCK
  69445. CPM_CR_MCC2_PAGE
  69446. CPM_CR_MCN
  69447. CPM_CR_OPCODE
  69448. CPM_CR_PAGE
  69449. CPM_CR_RAND_PAGE
  69450. CPM_CR_RAND_SBLOCK
  69451. CPM_CR_RESTART_TX
  69452. CPM_CR_RST
  69453. CPM_CR_SBLOCK
  69454. CPM_CR_SCC1_PAGE
  69455. CPM_CR_SCC1_SBLOCK
  69456. CPM_CR_SCC2_PAGE
  69457. CPM_CR_SCC2_SBLOCK
  69458. CPM_CR_SCC3_PAGE
  69459. CPM_CR_SCC3_SBLOCK
  69460. CPM_CR_SCC4_PAGE
  69461. CPM_CR_SCC4_SBLOCK
  69462. CPM_CR_SET_GADDR
  69463. CPM_CR_SET_TIMER
  69464. CPM_CR_SMC1_PAGE
  69465. CPM_CR_SMC1_SBLOCK
  69466. CPM_CR_SMC2_PAGE
  69467. CPM_CR_SMC2_SBLOCK
  69468. CPM_CR_SPI_PAGE
  69469. CPM_CR_SPI_SBLOCK
  69470. CPM_CR_START_IDMA
  69471. CPM_CR_STOP_IDMA
  69472. CPM_CR_STOP_TX
  69473. CPM_CR_TIMER_PAGE
  69474. CPM_CR_TIMER_SBLOCK
  69475. CPM_ER
  69476. CPM_FR
  69477. CPM_IDLE_DOZE
  69478. CPM_IDLE_WAIT
  69479. CPM_IMMR_OFFSET
  69480. CPM_MAP_SIZE
  69481. CPM_MAXBD
  69482. CPM_MAX_READ
  69483. CPM_PIN_ANYEDGE
  69484. CPM_PIN_FALLEDGE
  69485. CPM_PIN_GPIO
  69486. CPM_PIN_INPUT
  69487. CPM_PIN_OPENDRAIN
  69488. CPM_PIN_OUTPUT
  69489. CPM_PIN_PRIMARY
  69490. CPM_PIN_SECONDARY
  69491. CPM_PORTA
  69492. CPM_PORTB
  69493. CPM_PORTC
  69494. CPM_PORTD
  69495. CPM_PORTE
  69496. CPM_SPI_CMD
  69497. CPM_SPLIT_CONTROL__TXCLK_CCIX_DYN_GATE_ENABLE_MASK
  69498. CPM_SPLIT_CONTROL__TXCLK_CCIX_DYN_GATE_ENABLE__SHIFT
  69499. CPM_SR
  69500. CPM_UART_CONSOLE
  69501. CPM_UART_CPM1_H
  69502. CPM_UART_CPM2_H
  69503. CPM_UART_H
  69504. CPM_USB_EP_SHIFT
  69505. CPM_USB_RESTART_TX
  69506. CPM_USB_RESTART_TX_OPCODE
  69507. CPM_USB_STOP_TX
  69508. CPM_USB_STOP_TX_OPCODE
  69509. CPNC_LINUX
  69510. CPNUM
  69511. CPN_OP
  69512. CPOL
  69513. CPOLE1_0_PF
  69514. CPOLE1_16_PF
  69515. CPOLE1_24_PF
  69516. CPOLE1_32_PF
  69517. CPOLE1_40_PF
  69518. CPOLE1_48_PF
  69519. CPOLE1_8_PF
  69520. CPOLICY_BUFFERED
  69521. CPOLICY_UNCACHED
  69522. CPOLICY_WRITEALLOC
  69523. CPOLICY_WRITEBACK
  69524. CPOLICY_WRITETHROUGH
  69525. CPORT_ID_BAD
  69526. CPORT_ID_MAX
  69527. CPOS_CC0
  69528. CPOS_CC1
  69529. CPOS_CXP
  69530. CPOS_OP
  69531. CPP
  69532. CPPC_V2_NUM_ENT
  69533. CPPC_V2_REV
  69534. CPPC_V3_NUM_ENT
  69535. CPPC_V3_REV
  69536. CPPI41_DMA_BUSWIDTHS
  69537. CPPI_BUFFER_LEN_MASK
  69538. CPPI_DESCRIPTOR_ALIGN
  69539. CPPI_EOP_SET
  69540. CPPI_EOQ_MASK
  69541. CPPI_OWN_SET
  69542. CPPI_RECV_PKTLEN_MASK
  69543. CPPI_RXABT_MASK
  69544. CPPI_SOP_SET
  69545. CPPI_TEAR_READY
  69546. CPPI_ZERO_SET
  69547. CPP_ASMLINKAGE
  69548. CPP_CLK_SRC
  69549. CPP_GDSC
  69550. CPQFCTS_IOC_MAGIC
  69551. CPQHPC_MODULE_MINOR
  69552. CPR0_OPBD0
  69553. CPR0_PERD0
  69554. CPR0_PLLC0
  69555. CPR0_PLLD0
  69556. CPR0_PRIMBD0
  69557. CPR0_READ
  69558. CPR0_SCPID
  69559. CPR0_WRITE
  69560. CPRB
  69561. CPRBX
  69562. CPRC_BASE
  69563. CPRC_BLOCK_OFF
  69564. CPRGMCNT
  69565. CPRINTK
  69566. CPRST
  69567. CPR_PERD0_SPIDV_MASK
  69568. CPR_SINK_FMT_PARAM_ID
  69569. CPSDVR_MAX
  69570. CPSDVR_MIN
  69571. CPSR
  69572. CPSR2SPSR
  69573. CPSR_CYPOS
  69574. CPSW1_ALE_OFFSET
  69575. CPSW1_BLK_CNT
  69576. CPSW1_CPDMA_OFFSET
  69577. CPSW1_CPTS_OFFSET
  69578. CPSW1_HOST_PORT_OFFSET
  69579. CPSW1_HW_STATS
  69580. CPSW1_MAX_BLKS
  69581. CPSW1_PORT_VLAN
  69582. CPSW1_SLAVE_OFFSET
  69583. CPSW1_SLAVE_SIZE
  69584. CPSW1_SLIVER_OFFSET
  69585. CPSW1_STATERAM_OFFSET
  69586. CPSW1_TS_CTL
  69587. CPSW1_TS_SEQ_LTYPE
  69588. CPSW1_TS_VLAN
  69589. CPSW1_TX_IN_CTL
  69590. CPSW1_TX_PRI_MAP
  69591. CPSW2_ALE_OFFSET
  69592. CPSW2_BD_OFFSET
  69593. CPSW2_BLK_CNT
  69594. CPSW2_CONTROL
  69595. CPSW2_CPDMA_OFFSET
  69596. CPSW2_CPTS_OFFSET
  69597. CPSW2_HOST_PORT_OFFSET
  69598. CPSW2_HW_STATS
  69599. CPSW2_MAX_BLKS
  69600. CPSW2_PORT_VLAN
  69601. CPSW2_SLAVE_OFFSET
  69602. CPSW2_SLAVE_SIZE
  69603. CPSW2_SLIVER_OFFSET
  69604. CPSW2_STATERAM_OFFSET
  69605. CPSW2_TS_SEQ_MTYPE
  69606. CPSW2_TX_IN_CTL
  69607. CPSW2_TX_PRI_MAP
  69608. CPSW_ALE_PORTS_NUM
  69609. CPSW_ALE_VLAN_AWARE
  69610. CPSW_CMINTMAX_CNT
  69611. CPSW_CMINTMAX_INTVL
  69612. CPSW_CMINTMIN_CNT
  69613. CPSW_CMINTMIN_INTVL
  69614. CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT
  69615. CPSW_DEBUG
  69616. CPSW_FIFO_DUAL_MAC_MODE
  69617. CPSW_FIFO_NORMAL_MODE
  69618. CPSW_FIFO_QUEUE_TYPE_SHIFT
  69619. CPSW_FIFO_RATE_EN_SHIFT
  69620. CPSW_FIFO_RATE_LIMIT_MODE
  69621. CPSW_FIFO_SHAPERS_NUM
  69622. CPSW_FIFO_SHAPE_EN_SHIFT
  69623. CPSW_HEADROOM
  69624. CPSW_HEADROOM_NA
  69625. CPSW_INTPACEEN
  69626. CPSW_INTPRESCALE_MASK
  69627. CPSW_MAJOR_VERSION
  69628. CPSW_MAX_BLKS_RX
  69629. CPSW_MAX_BLKS_TX
  69630. CPSW_MAX_BLKS_TX_SHIFT
  69631. CPSW_MAX_PACKET_SIZE
  69632. CPSW_MAX_QUEUES
  69633. CPSW_MINOR_VERSION
  69634. CPSW_MIN_PACKET_SIZE
  69635. CPSW_PCT_MASK
  69636. CPSW_POLL_WEIGHT
  69637. CPSW_RTL_VERSION
  69638. CPSW_RX_VLAN_ENCAP
  69639. CPSW_RX_VLAN_ENCAP_HDR_PKT_PRIO_TAG
  69640. CPSW_RX_VLAN_ENCAP_HDR_PKT_RESERV
  69641. CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_MSK
  69642. CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_SHIFT
  69643. CPSW_RX_VLAN_ENCAP_HDR_PKT_UNTAG
  69644. CPSW_RX_VLAN_ENCAP_HDR_PKT_VLAN_TAG
  69645. CPSW_RX_VLAN_ENCAP_HDR_PRIO_MSK
  69646. CPSW_RX_VLAN_ENCAP_HDR_PRIO_SHIFT
  69647. CPSW_RX_VLAN_ENCAP_HDR_SIZE
  69648. CPSW_RX_VLAN_ENCAP_HDR_VID_SHIFT
  69649. CPSW_SL_AM65_STATUS_PN_E_IDLE
  69650. CPSW_SL_AM65_STATUS_PN_P_IDLE
  69651. CPSW_SL_AM65_STATUS_PN_TX_IDLE
  69652. CPSW_SL_BOFFTEST
  69653. CPSW_SL_CTL_CMD_IDLE
  69654. CPSW_SL_CTL_CRC_TYPE
  69655. CPSW_SL_CTL_EXT_EN
  69656. CPSW_SL_CTL_EXT_EN_RX_FLO
  69657. CPSW_SL_CTL_EXT_EN_TX_FLO
  69658. CPSW_SL_CTL_EXT_EN_XGIG
  69659. CPSW_SL_CTL_FULLDUPLEX
  69660. CPSW_SL_CTL_FUNCS_COUNT
  69661. CPSW_SL_CTL_FUNC_BASE
  69662. CPSW_SL_CTL_GIG
  69663. CPSW_SL_CTL_GIG_FORCE
  69664. CPSW_SL_CTL_GMII_EN
  69665. CPSW_SL_CTL_IFCTL_A
  69666. CPSW_SL_CTL_IFCTL_B
  69667. CPSW_SL_CTL_LOOPBACK
  69668. CPSW_SL_CTL_MTEST
  69669. CPSW_SL_CTL_RX_CEF_EN
  69670. CPSW_SL_CTL_RX_CMF_EN
  69671. CPSW_SL_CTL_RX_CSF_EN
  69672. CPSW_SL_CTL_RX_FLOW_EN
  69673. CPSW_SL_CTL_TX_FLOW_EN
  69674. CPSW_SL_CTL_TX_PACE
  69675. CPSW_SL_CTL_TX_SG_LIM_EN
  69676. CPSW_SL_CTL_TX_SHORT_GAP_EN
  69677. CPSW_SL_CTL_XGIG
  69678. CPSW_SL_CTL_XGMII_EN
  69679. CPSW_SL_EMCONTROL
  69680. CPSW_SL_IDVER
  69681. CPSW_SL_MACCONTROL
  69682. CPSW_SL_MACSTATUS
  69683. CPSW_SL_REG_NOTUSED
  69684. CPSW_SL_RX_MAXLEN
  69685. CPSW_SL_RX_PAUSE
  69686. CPSW_SL_RX_PRI_MAP
  69687. CPSW_SL_SOFT_RESET
  69688. CPSW_SL_SOFT_RESET_BIT
  69689. CPSW_SL_STATUS_IDLE_MASK_BASE
  69690. CPSW_SL_STATUS_IDLE_MASK_K3
  69691. CPSW_SL_STATUS_PN_IDLE
  69692. CPSW_SL_TX_GAP
  69693. CPSW_SL_TX_PAUSE
  69694. CPSW_STAT
  69695. CPSW_STATS
  69696. CPSW_STATS_CH_LEN
  69697. CPSW_STATS_COMMON_LEN
  69698. CPSW_TC_NUM
  69699. CPSW_V1_MSG_TYPE_OFS
  69700. CPSW_V1_SEQ_ID_OFS_SHIFT
  69701. CPSW_V1_TS_RX_EN
  69702. CPSW_V1_TS_TX_EN
  69703. CPSW_VERSION_1
  69704. CPSW_VERSION_2
  69705. CPSW_VERSION_3
  69706. CPSW_VERSION_4
  69707. CPSW_VLAN_AWARE
  69708. CPSW_XDP_CONSUMED
  69709. CPSW_XDP_PASS
  69710. CPSW_XMETA_OFFSET
  69711. CPS_ACCESSOR_A
  69712. CPS_ACCESSOR_M
  69713. CPS_ACCESSOR_R
  69714. CPS_ACCESSOR_RO
  69715. CPS_ACCESSOR_RW
  69716. CPS_ACCESSOR_W
  69717. CPS_ACCESSOR_WO
  69718. CPS_DEFAULT_ROUTE
  69719. CPS_NO_ROUTE
  69720. CPS_PM_CLOCK_GATED
  69721. CPS_PM_NC_WAIT
  69722. CPS_PM_POWER_GATED
  69723. CPS_PM_STATE_COUNT
  69724. CPTCLK_PRESCALE
  69725. CPTR_EL2_DEFAULT
  69726. CPTR_EL2_RES1
  69727. CPTR_EL2_TCPAC
  69728. CPTR_EL2_TFP
  69729. CPTR_EL2_TFP_SHIFT
  69730. CPTR_EL2_TTA
  69731. CPTR_EL2_TZ
  69732. CPTS_EN
  69733. CPTS_EV_HALF
  69734. CPTS_EV_HW
  69735. CPTS_EV_PUSH
  69736. CPTS_EV_ROLL
  69737. CPTS_EV_RX
  69738. CPTS_EV_TX
  69739. CPTS_FIFO_DEPTH
  69740. CPTS_MAX_EVENTS
  69741. CPTS_SKB_TX_WORK_TIMEOUT
  69742. CPTX_PF_ACTIVE_CYCLES_PC
  69743. CPTX_PF_BIST_STATUS
  69744. CPTX_PF_CONSTANTS
  69745. CPTX_PF_DIAG
  69746. CPTX_PF_ECC0_CTL
  69747. CPTX_PF_ECC0_ENA_W1C
  69748. CPTX_PF_ECC0_ENA_W1S
  69749. CPTX_PF_ECC0_FLIP
  69750. CPTX_PF_ECC0_INT
  69751. CPTX_PF_ECC0_INT_W1S
  69752. CPTX_PF_ENGX_UCODE_BASE
  69753. CPTX_PF_EXEC_BUSY
  69754. CPTX_PF_EXEC_ENA_W1C
  69755. CPTX_PF_EXEC_ENA_W1S
  69756. CPTX_PF_EXEC_INFO
  69757. CPTX_PF_EXEC_INFO0
  69758. CPTX_PF_EXEC_INFO1
  69759. CPTX_PF_EXEC_INT
  69760. CPTX_PF_EXEC_INT_W1S
  69761. CPTX_PF_EXE_BIST_STATUS
  69762. CPTX_PF_EXE_CLK
  69763. CPTX_PF_EXE_CTL
  69764. CPTX_PF_EXE_DBG_CNTX
  69765. CPTX_PF_EXE_DBG_CTL
  69766. CPTX_PF_EXE_DBG_DATA
  69767. CPTX_PF_EXE_EPCI_INBX_CNT
  69768. CPTX_PF_EXE_EPCI_OUTBX_CNT
  69769. CPTX_PF_EXE_MEM_CTL
  69770. CPTX_PF_EXE_PERF_CTL
  69771. CPTX_PF_EXE_PERF_EVENT_CNT
  69772. CPTX_PF_EXE_REQ_TIMER
  69773. CPTX_PF_EXE_STATUS
  69774. CPTX_PF_GX_EN
  69775. CPTX_PF_INST_LATENCY_PC
  69776. CPTX_PF_INST_REQ_PC
  69777. CPTX_PF_MBOX_ENA_W1CX
  69778. CPTX_PF_MBOX_ENA_W1SX
  69779. CPTX_PF_MBOX_INTX
  69780. CPTX_PF_MBOX_INT_W1SX
  69781. CPTX_PF_QX_CTL
  69782. CPTX_PF_QX_CTL2
  69783. CPTX_PF_QX_GMCTL
  69784. CPTX_PF_RD_LATENCY_PC
  69785. CPTX_PF_RD_REQ_PC
  69786. CPTX_PF_RD_UC_PC
  69787. CPTX_PF_RESET
  69788. CPTX_PF_VFX_MBOXX
  69789. CPTX_VFX_PF_MBOXX
  69790. CPTX_VQX_CTL
  69791. CPTX_VQX_DONE
  69792. CPTX_VQX_DONE_ACK
  69793. CPTX_VQX_DONE_ENA_W1C
  69794. CPTX_VQX_DONE_ENA_W1S
  69795. CPTX_VQX_DONE_INT_W1C
  69796. CPTX_VQX_DONE_INT_W1S
  69797. CPTX_VQX_DONE_WAIT
  69798. CPTX_VQX_DOORBELL
  69799. CPTX_VQX_INPROG
  69800. CPTX_VQX_MISC_ENA_W1C
  69801. CPTX_VQX_MISC_ENA_W1S
  69802. CPTX_VQX_MISC_INT
  69803. CPTX_VQX_MISC_INT_W1S
  69804. CPTX_VQX_SADDR
  69805. CPT_81XX_PCI_PF_DEVICE_ID
  69806. CPT_81XX_PCI_VF_DEVICE_ID
  69807. CPT_AF_BLK_RST
  69808. CPT_AF_CONSTANTS0
  69809. CPT_AF_LF_RST
  69810. CPT_AF_RVU_LF_CFG_DEBUG
  69811. CPT_AUD_CFG
  69812. CPT_AUD_CNTL_ST
  69813. CPT_AUD_CNTRL_ST2
  69814. CPT_CMD_QCHUNK_SIZE
  69815. CPT_CMD_QLEN
  69816. CPT_COMMAND_TIMEOUT
  69817. CPT_COMP_E_FAULT
  69818. CPT_COMP_E_GOOD
  69819. CPT_COMP_E_LAST_ENTRY
  69820. CPT_COMP_E_NOTDONE
  69821. CPT_COMP_E_SWERR
  69822. CPT_DC_MAX
  69823. CPT_EDGE_BOTH
  69824. CPT_EDGE_DISABLED
  69825. CPT_EDGE_FALLING
  69826. CPT_EDGE_RISING
  69827. CPT_FLAG_DEVICE_READY
  69828. CPT_FLAG_SRIOV_ENABLED
  69829. CPT_FLAG_VF_DRIVER
  69830. CPT_HDMIW_HDMIEDID
  69831. CPT_INST_SIZE
  69832. CPT_MAX_AE_CORES
  69833. CPT_MAX_CORE_GROUPS
  69834. CPT_MAX_SE_CORES
  69835. CPT_MAX_TOTAL_CORES
  69836. CPT_MAX_VF_NUM
  69837. CPT_MBOX_MSG_TIMEOUT
  69838. CPT_MBOX_MSG_TYPE_ACK
  69839. CPT_MBOX_MSG_TYPE_NACK
  69840. CPT_MSG_QBIND_GRP
  69841. CPT_MSG_QLEN
  69842. CPT_MSG_READY
  69843. CPT_MSG_VF_DOWN
  69844. CPT_MSG_VF_UP
  69845. CPT_MSG_VQ_PRIORITY
  69846. CPT_NEXT_CHUNK_PTR_SIZE
  69847. CPT_NUM_QS_PER_VF
  69848. CPT_PF_INT_VEC_E_MBOXX
  69849. CPT_PF_MSIX_VECTORS
  69850. CPT_PRIV_LFX_CFG
  69851. CPT_PRIV_LFX_INT_CFG
  69852. CPT_TIMER_THOLD
  69853. CPT_UCODE_VERSION_SZ
  69854. CPT_VF_INTR_DOVF_MASK
  69855. CPT_VF_INTR_IRDE_MASK
  69856. CPT_VF_INTR_MBOX_MASK
  69857. CPT_VF_INTR_NWRP_MASK
  69858. CPT_VF_INTR_SERR_MASK
  69859. CPT_VF_INT_VEC_E_DONE
  69860. CPT_VF_INT_VEC_E_MISC
  69861. CPT_VF_MSIX_VECTORS
  69862. CPU
  69863. CPU0CC_CPUDIV
  69864. CPU0_DBG_SRST_REQ_EN
  69865. CPU0_HPM_SRST_REQ_EN
  69866. CPU0_ID
  69867. CPU0_NEON_SRST_REQ_EN
  69868. CPU0_PWR_ZONE_CTRL_REG
  69869. CPU0_RESET
  69870. CPU0_SRST_REQ_EN
  69871. CPU0_SUPPORT_HOTPLUG_MAGIC0
  69872. CPU0_SUPPORT_HOTPLUG_MAGIC1
  69873. CPU0_WAKEUP_NS_PA_ADDR_OFFSET
  69874. CPU0_WFI_MASK_CFG
  69875. CPU1_CPU2_SEPARATOR_SECTION
  69876. CPU1_ID
  69877. CPU1_RESET
  69878. CPU1_WAKEUP_NS_PA_ADDR_OFFSET
  69879. CPU2_ISO_CTRL
  69880. CPU2_RESET
  69881. CPU3_RESET
  69882. CPU5WDT_ENABLE_REG
  69883. CPU5WDT_EXTENT
  69884. CPU5WDT_INTERVAL
  69885. CPU5WDT_MODE_REG
  69886. CPU5WDT_RESET_REG
  69887. CPU5WDT_STATUS_REG
  69888. CPU5WDT_TIME_A_REG
  69889. CPU5WDT_TIME_B_REG
  69890. CPU5WDT_TRIGGER_REG
  69891. CPUACCT_STAT_NSTATS
  69892. CPUACCT_STAT_SYSTEM
  69893. CPUACCT_STAT_USER
  69894. CPUB_68020
  69895. CPUB_68030
  69896. CPUB_68040
  69897. CPUB_68060
  69898. CPUB_COLDFIRE
  69899. CPUCAUSE
  69900. CPUCFG_CPU_CTRL_REG
  69901. CPUCFG_CPU_PWR_CLAMP_STATUS_REG
  69902. CPUCFG_CPU_RST_CTRL_REG
  69903. CPUCFG_CPU_STATUS_REG
  69904. CPUCFG_CX_CTRL_REG0
  69905. CPUCFG_CX_CTRL_REG0_L1_RST_DISABLE
  69906. CPUCFG_CX_CTRL_REG0_L1_RST_DISABLE_ALL
  69907. CPUCFG_CX_CTRL_REG0_L2_RST_DISABLE_A15
  69908. CPUCFG_CX_CTRL_REG0_L2_RST_DISABLE_A7
  69909. CPUCFG_CX_CTRL_REG1
  69910. CPUCFG_CX_CTRL_REG1_ACINACTM
  69911. CPUCFG_CX_RST_CTRL
  69912. CPUCFG_CX_RST_CTRL_CORE_RST
  69913. CPUCFG_CX_RST_CTRL_CORE_RST_ALL
  69914. CPUCFG_CX_RST_CTRL_CX_RST
  69915. CPUCFG_CX_RST_CTRL_DBG_RST
  69916. CPUCFG_CX_RST_CTRL_DBG_RST_ALL
  69917. CPUCFG_CX_RST_CTRL_DBG_SOC_RST
  69918. CPUCFG_CX_RST_CTRL_ETM_RST
  69919. CPUCFG_CX_RST_CTRL_ETM_RST_ALL
  69920. CPUCFG_CX_RST_CTRL_H_RST
  69921. CPUCFG_CX_RST_CTRL_L2_RST
  69922. CPUCFG_CX_STATUS
  69923. CPUCFG_CX_STATUS_STANDBYWFI
  69924. CPUCFG_CX_STATUS_STANDBYWFIL2
  69925. CPUCFG_DBG_CTL0_REG
  69926. CPUCFG_DBG_CTL1_REG
  69927. CPUCFG_GEN_CTRL_REG
  69928. CPUCFG_PRIVATE0_REG
  69929. CPUCFG_PRIVATE1_REG
  69930. CPUCLK_DIV
  69931. CPUCLOCK_CLOCK_MASK
  69932. CPUCLOCK_MAX
  69933. CPUCLOCK_PERTHREAD
  69934. CPUCLOCK_PERTHREAD_MASK
  69935. CPUCLOCK_PID
  69936. CPUCLOCK_PROF
  69937. CPUCLOCK_SCHED
  69938. CPUCLOCK_VIRT
  69939. CPUCLOCK_WHICH
  69940. CPUCS_REG
  69941. CPUCTL_STARTCPU
  69942. CPUCTL_STATE_HALTED
  69943. CPUCTL_STATE_STOPPED
  69944. CPUFREQ
  69945. CPUFREQ_ARM_BIG_LITTLE_H
  69946. CPUFREQ_ASYNC_NOTIFICATION
  69947. CPUFREQ_BOOST_FREQ
  69948. CPUFREQ_CONST_LOOPS
  69949. CPUFREQ_CREATE_POLICY
  69950. CPUFREQ_DBS_GOVERNOR_INITIALIZER
  69951. CPUFREQ_DBS_MIN_SAMPLING_INTERVAL
  69952. CPUFREQ_ENTRY_INVALID
  69953. CPUFREQ_ETERNAL
  69954. CPUFREQ_HAVE_GOVERNOR_PER_POLICY
  69955. CPUFREQ_HIGH
  69956. CPUFREQ_HIGHEST_FREQ
  69957. CPUFREQ_IS_COOLING_DEV
  69958. CPUFREQ_LOW
  69959. CPUFREQ_LOWEST_FREQ
  69960. CPUFREQ_MAX_SYSFS_PATH
  69961. CPUFREQ_NAME_LEN
  69962. CPUFREQ_NAME_PLEN
  69963. CPUFREQ_NEED_INITIAL_FREQ_CHECK
  69964. CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING
  69965. CPUFREQ_PM_NO_WARN
  69966. CPUFREQ_POLICY_NOTIFIER
  69967. CPUFREQ_POLICY_PERFORMANCE
  69968. CPUFREQ_POLICY_POWERSAVE
  69969. CPUFREQ_POLICY_UNKNOWN
  69970. CPUFREQ_POSTCHANGE
  69971. CPUFREQ_PRECHANGE
  69972. CPUFREQ_RELATION_C
  69973. CPUFREQ_RELATION_H
  69974. CPUFREQ_RELATION_L
  69975. CPUFREQ_REMOVE_POLICY
  69976. CPUFREQ_SHARED_TYPE_ALL
  69977. CPUFREQ_SHARED_TYPE_ANY
  69978. CPUFREQ_SHARED_TYPE_HW
  69979. CPUFREQ_SHARED_TYPE_NONE
  69980. CPUFREQ_STICKY
  69981. CPUFREQ_TABLE_END
  69982. CPUFREQ_TABLE_SORTED_ASCENDING
  69983. CPUFREQ_TABLE_SORTED_DESCENDING
  69984. CPUFREQ_TABLE_UNSORTED
  69985. CPUFREQ_THERMAL_MAX_STEP
  69986. CPUFREQ_THERMAL_MIN_STEP
  69987. CPUFREQ_TRANSITION_NOTIFIER
  69988. CPUHP_ACPI_CPUDRV_DEAD
  69989. CPUHP_AP_ACTIVE
  69990. CPUHP_AP_ARC_TIMER_STARTING
  69991. CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING
  69992. CPUHP_AP_ARM64_ISNDEP_STARTING
  69993. CPUHP_AP_ARMADA_TIMER_STARTING
  69994. CPUHP_AP_ARM_ARCH_TIMER_STARTING
  69995. CPUHP_AP_ARM_CACHE_B15_RAC_DEAD
  69996. CPUHP_AP_ARM_CACHE_B15_RAC_DYING
  69997. CPUHP_AP_ARM_CORESIGHT_STARTING
  69998. CPUHP_AP_ARM_GLOBAL_TIMER_STARTING
  69999. CPUHP_AP_ARM_L2X0_STARTING
  70000. CPUHP_AP_ARM_MVEBU_COHERENCY
  70001. CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS
  70002. CPUHP_AP_ARM_SDEI_STARTING
  70003. CPUHP_AP_ARM_TWD_STARTING
  70004. CPUHP_AP_ARM_VFP_STARTING
  70005. CPUHP_AP_ARM_XEN_STARTING
  70006. CPUHP_AP_BASE_CACHEINFO_ONLINE
  70007. CPUHP_AP_CSKY_TIMER_STARTING
  70008. CPUHP_AP_DUMMY_TIMER_STARTING
  70009. CPUHP_AP_EXYNOS4_MCT_TIMER_STARTING
  70010. CPUHP_AP_IDLE_DEAD
  70011. CPUHP_AP_IRQ_AFFINITY_ONLINE
  70012. CPUHP_AP_IRQ_ARMADA_XP_STARTING
  70013. CPUHP_AP_IRQ_BCM2836_STARTING
  70014. CPUHP_AP_IRQ_GIC_STARTING
  70015. CPUHP_AP_IRQ_HIP04_STARTING
  70016. CPUHP_AP_IRQ_MIPS_GIC_STARTING
  70017. CPUHP_AP_JCORE_TIMER_STARTING
  70018. CPUHP_AP_KVM_ARM_TIMER_STARTING
  70019. CPUHP_AP_KVM_ARM_VGIC_INIT_STARTING
  70020. CPUHP_AP_KVM_ARM_VGIC_STARTING
  70021. CPUHP_AP_KVM_STARTING
  70022. CPUHP_AP_MARCO_TIMER_STARTING
  70023. CPUHP_AP_MICROCODE_LOADER
  70024. CPUHP_AP_MIPS_GIC_TIMER_STARTING
  70025. CPUHP_AP_MIPS_OP_LOONGSON3_STARTING
  70026. CPUHP_AP_OFFLINE
  70027. CPUHP_AP_ONLINE
  70028. CPUHP_AP_ONLINE_DYN
  70029. CPUHP_AP_ONLINE_DYN_END
  70030. CPUHP_AP_ONLINE_IDLE
  70031. CPUHP_AP_PERF_ARM_ACPI_STARTING
  70032. CPUHP_AP_PERF_ARM_APM_XGENE_ONLINE
  70033. CPUHP_AP_PERF_ARM_CAVIUM_TX2_UNCORE_ONLINE
  70034. CPUHP_AP_PERF_ARM_CCI_ONLINE
  70035. CPUHP_AP_PERF_ARM_CCN_ONLINE
  70036. CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE
  70037. CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE
  70038. CPUHP_AP_PERF_ARM_HISI_L3_ONLINE
  70039. CPUHP_AP_PERF_ARM_HW_BREAKPOINT_STARTING
  70040. CPUHP_AP_PERF_ARM_L2X0_ONLINE
  70041. CPUHP_AP_PERF_ARM_QCOM_L2_ONLINE
  70042. CPUHP_AP_PERF_ARM_QCOM_L3_ONLINE
  70043. CPUHP_AP_PERF_ARM_STARTING
  70044. CPUHP_AP_PERF_ONLINE
  70045. CPUHP_AP_PERF_POWERPC_CORE_IMC_ONLINE
  70046. CPUHP_AP_PERF_POWERPC_NEST_IMC_ONLINE
  70047. CPUHP_AP_PERF_POWERPC_THREAD_IMC_ONLINE
  70048. CPUHP_AP_PERF_POWERPC_TRACE_IMC_ONLINE
  70049. CPUHP_AP_PERF_S390_CF_ONLINE
  70050. CPUHP_AP_PERF_S390_SF_ONLINE
  70051. CPUHP_AP_PERF_X86_AMD_IBS_STARTING
  70052. CPUHP_AP_PERF_X86_AMD_POWER_ONLINE
  70053. CPUHP_AP_PERF_X86_AMD_UNCORE_ONLINE
  70054. CPUHP_AP_PERF_X86_AMD_UNCORE_STARTING
  70055. CPUHP_AP_PERF_X86_CQM_ONLINE
  70056. CPUHP_AP_PERF_X86_CQM_STARTING
  70057. CPUHP_AP_PERF_X86_CSTATE_ONLINE
  70058. CPUHP_AP_PERF_X86_CSTATE_STARTING
  70059. CPUHP_AP_PERF_X86_ONLINE
  70060. CPUHP_AP_PERF_X86_RAPL_ONLINE
  70061. CPUHP_AP_PERF_X86_STARTING
  70062. CPUHP_AP_PERF_X86_UNCORE_ONLINE
  70063. CPUHP_AP_PERF_XTENSA_STARTING
  70064. CPUHP_AP_QCOM_TIMER_STARTING
  70065. CPUHP_AP_RCUTREE_DYING
  70066. CPUHP_AP_RCUTREE_ONLINE
  70067. CPUHP_AP_RISCV_TIMER_STARTING
  70068. CPUHP_AP_SCHED_STARTING
  70069. CPUHP_AP_SMPBOOT_THREADS
  70070. CPUHP_AP_SMPCFD_DYING
  70071. CPUHP_AP_TEGRA_TIMER_STARTING
  70072. CPUHP_AP_WATCHDOG_ONLINE
  70073. CPUHP_AP_WORKQUEUE_ONLINE
  70074. CPUHP_AP_X86_HPET_ONLINE
  70075. CPUHP_AP_X86_INTEL_EPB_ONLINE
  70076. CPUHP_AP_X86_KVM_CLK_ONLINE
  70077. CPUHP_AP_X86_TBOOT_DYING
  70078. CPUHP_AP_X86_VDSO_VMA_ONLINE
  70079. CPUHP_ARM64_FPSIMD_DEAD
  70080. CPUHP_ARM_BL_PREPARE
  70081. CPUHP_ARM_OMAP_WAKE_DEAD
  70082. CPUHP_ARM_SHMOBILE_SCU_PREPARE
  70083. CPUHP_BLK_MQ_DEAD
  70084. CPUHP_BLOCK_SOFTIRQ_DEAD
  70085. CPUHP_BP_PREPARE_DYN
  70086. CPUHP_BP_PREPARE_DYN_END
  70087. CPUHP_BRINGUP_CPU
  70088. CPUHP_CPUIDLE_COUPLED_PREPARE
  70089. CPUHP_CPUIDLE_DEAD
  70090. CPUHP_CREATE_THREADS
  70091. CPUHP_FS_BUFF_DEAD
  70092. CPUHP_HRTIMERS_PREPARE
  70093. CPUHP_INVALID
  70094. CPUHP_IOMMU_INTEL_DEAD
  70095. CPUHP_IRQ_POLL_DEAD
  70096. CPUHP_KVM_PPC_BOOK3S_PREPARE
  70097. CPUHP_LUSTRE_CFS_DEAD
  70098. CPUHP_MD_RAID5_PREPARE
  70099. CPUHP_MIPS_SOC_PREPARE
  70100. CPUHP_MM_MEMCQ_DEAD
  70101. CPUHP_MM_VMSTAT_DEAD
  70102. CPUHP_MM_WRITEBACK_DEAD
  70103. CPUHP_MM_ZSWP_MEM_PREPARE
  70104. CPUHP_MM_ZSWP_POOL_PREPARE
  70105. CPUHP_MM_ZS_PREPARE
  70106. CPUHP_NET_DEV_DEAD
  70107. CPUHP_NET_FLOW_PREPARE
  70108. CPUHP_NET_IUCV_PREPARE
  70109. CPUHP_NET_MVNETA_DEAD
  70110. CPUHP_OFFLINE
  70111. CPUHP_ONLINE
  70112. CPUHP_PADATA_DEAD
  70113. CPUHP_PAGE_ALLOC_DEAD
  70114. CPUHP_PCI_XGENE_DEAD
  70115. CPUHP_PERCPU_CNT_DEAD
  70116. CPUHP_PERF_POWER
  70117. CPUHP_PERF_PREPARE
  70118. CPUHP_PERF_SUPERH
  70119. CPUHP_PERF_X86_AMD_UNCORE_PREP
  70120. CPUHP_PERF_X86_PREPARE
  70121. CPUHP_POWERPC_MMU_CTX_PREPARE
  70122. CPUHP_POWERPC_PMAC_PREPARE
  70123. CPUHP_POWER_NUMA_PREPARE
  70124. CPUHP_PRINTK_DEAD
  70125. CPUHP_PROFILE_PREPARE
  70126. CPUHP_RADIX_DEAD
  70127. CPUHP_RCUTREE_PREP
  70128. CPUHP_RELAY_PREPARE
  70129. CPUHP_S390_PFAULT_DEAD
  70130. CPUHP_SH_SH3X_PREPARE
  70131. CPUHP_SLAB_PREPARE
  70132. CPUHP_SLUB_DEAD
  70133. CPUHP_SMPCFD_PREPARE
  70134. CPUHP_SOFTIRQ_DEAD
  70135. CPUHP_TEARDOWN_CPU
  70136. CPUHP_TIMERS_PREPARE
  70137. CPUHP_TOPOLOGY_PREPARE
  70138. CPUHP_TRACE_RB_PREPARE
  70139. CPUHP_VIRT_NET_DEAD
  70140. CPUHP_WORKQUEUE_PREP
  70141. CPUHP_X2APIC_PREPARE
  70142. CPUHP_X86_APB_DEAD
  70143. CPUHP_X86_HPET_DEAD
  70144. CPUHP_X86_MCE_DEAD
  70145. CPUHP_XEN_EVTCHN_PREPARE
  70146. CPUHP_XEN_PREPARE
  70147. CPUHP_ZCOMP_PREPARE
  70148. CPUID5_ECX_EXTENSIONS_SUPPORTED
  70149. CPUID5_ECX_INTERRUPT_BREAK
  70150. CPUIDLE_COUPLED_NOT_IDLE
  70151. CPUIDLE_DESC_LEN
  70152. CPUIDLE_DRIVER
  70153. CPUIDLE_FLAG_COUPLED
  70154. CPUIDLE_FLAG_NONE
  70155. CPUIDLE_FLAG_POLLING
  70156. CPUIDLE_FLAG_TIMER_STOP
  70157. CPUIDLE_FLAG_TLB_FLUSHED
  70158. CPUIDLE_GOVERNOR
  70159. CPUIDLE_GOVERNOR_RO
  70160. CPUIDLE_METHOD_OF_DECLARE
  70161. CPUIDLE_METHOD_OF_TABLES
  70162. CPUIDLE_NAME_LEN
  70163. CPUIDLE_STATES_MAX
  70164. CPUIDLE_STATE_MAX
  70165. CPUIDLE_TEXT
  70166. CPUID_1_ECX
  70167. CPUID_1_EDX
  70168. CPUID_6_EAX
  70169. CPUID_7_0_EBX
  70170. CPUID_7_1_EAX
  70171. CPUID_7_ECX
  70172. CPUID_7_EDX
  70173. CPUID_8000_0001_ECX
  70174. CPUID_8000_0001_EDX
  70175. CPUID_8000_0007_EBX
  70176. CPUID_8000_0008_EBX
  70177. CPUID_8000_000A_EDX
  70178. CPUID_8086_0001_EDX
  70179. CPUID_AMD1
  70180. CPUID_AMD2
  70181. CPUID_AMD3
  70182. CPUID_C000_0001_EDX
  70183. CPUID_CACHETYPE
  70184. CPUID_CPUID
  70185. CPUID_D_1_EAX
  70186. CPUID_EAX
  70187. CPUID_EBX
  70188. CPUID_ECX
  70189. CPUID_EDX
  70190. CPUID_EXT_AFR0
  70191. CPUID_EXT_DFR0
  70192. CPUID_EXT_ISAR0
  70193. CPUID_EXT_ISAR1
  70194. CPUID_EXT_ISAR2
  70195. CPUID_EXT_ISAR3
  70196. CPUID_EXT_ISAR4
  70197. CPUID_EXT_ISAR5
  70198. CPUID_EXT_MMFR0
  70199. CPUID_EXT_MMFR1
  70200. CPUID_EXT_MMFR2
  70201. CPUID_EXT_MMFR3
  70202. CPUID_EXT_PFR0
  70203. CPUID_EXT_PFR1
  70204. CPUID_FREQ_VOLT_CAPABILITIES
  70205. CPUID_GET_MAX_CAPABILITIES
  70206. CPUID_ID
  70207. CPUID_INTEL1
  70208. CPUID_INTEL2
  70209. CPUID_INTEL3
  70210. CPUID_IS
  70211. CPUID_LNX_1
  70212. CPUID_LNX_2
  70213. CPUID_LNX_3
  70214. CPUID_LNX_4
  70215. CPUID_MAJOR
  70216. CPUID_MPIDR
  70217. CPUID_MPUIR
  70218. CPUID_MWAIT_LEAF
  70219. CPUID_PKGTYPE_AM2R2_AM3
  70220. CPUID_PKGTYPE_F
  70221. CPUID_PKGTYPE_MASK
  70222. CPUID_PROCESSOR_SIGNATURE
  70223. CPUID_REVIDR
  70224. CPUID_TCM
  70225. CPUID_TLBTYPE
  70226. CPUID_TO_COMPACT_NODEID
  70227. CPUID_TSC_LEAF
  70228. CPUID_USE_XFAM_XMOD
  70229. CPUID_VMWARE_FEATURES_ECX_VMCALL
  70230. CPUID_VMWARE_FEATURES_ECX_VMMCALL
  70231. CPUID_VMWARE_FEATURES_LEAF
  70232. CPUID_VMWARE_INFO_LEAF
  70233. CPUID_VMX
  70234. CPUID_VMX_BIT
  70235. CPUID_XFAM
  70236. CPUID_XFAM_10H
  70237. CPUID_XFAM_K8
  70238. CPUID_XMOD
  70239. CPUID_XMOD_REV_MASK
  70240. CPUIF_CEN
  70241. CPUIF_CFG_REG
  70242. CPUIF_DMC
  70243. CPUIF_DSC
  70244. CPUIF_MAP
  70245. CPUIF_MAP_LO_HI
  70246. CPUIF_MUX
  70247. CPUIF_PM_REG
  70248. CPUIF_PWD
  70249. CPUIF_RST
  70250. CPUIF_SLP
  70251. CPUINFO_CUR_FREQ
  70252. CPUINFO_LATENCY
  70253. CPUINFO_LVL_CORE
  70254. CPUINFO_LVL_MAX
  70255. CPUINFO_LVL_NODE
  70256. CPUINFO_LVL_PROC
  70257. CPUINFO_LVL_ROOT
  70258. CPUINFO_MAX_FREQ
  70259. CPUINFO_MIN_FREQ
  70260. CPUINFO_PROC
  70261. CPUINST
  70262. CPULAUNCH
  70263. CPUMAP_BATCH
  70264. CPUMF_CTR_SET_BASIC
  70265. CPUMF_CTR_SET_CRYPTO
  70266. CPUMF_CTR_SET_EXT
  70267. CPUMF_CTR_SET_MAX
  70268. CPUMF_CTR_SET_MT_DIAG
  70269. CPUMF_CTR_SET_USER
  70270. CPUMF_EVENT_ATTR
  70271. CPUMF_EVENT_PTR
  70272. CPUMF_LCCTL_ACTCTL_SHIFT
  70273. CPUMF_LCCTL_ENABLE_SHIFT
  70274. CPUMP_EN
  70275. CPUMP_READY
  70276. CPUM_SF_MIN_SDBT
  70277. CPUM_SF_SDBT_TL_OFFSET
  70278. CPUM_SF_SDB_PER_TABLE
  70279. CPUNCR_OFFS
  70280. CPUNST
  70281. CPUNUM
  70282. CPUOPM
  70283. CPUOPM_RABD
  70284. CPUPLL
  70285. CPUPO0_RESET
  70286. CPUPO1_RESET
  70287. CPUPO2_RESET
  70288. CPUPO3_RESET
  70289. CPUPOWER_AMD_CPBDIS
  70290. CPUPOWER_CAP_AMD_CBP
  70291. CPUPOWER_CAP_APERF
  70292. CPUPOWER_CAP_HAS_TURBO_RATIO
  70293. CPUPOWER_CAP_INTEL_IDA
  70294. CPUPOWER_CAP_INV_TSC
  70295. CPUPOWER_CAP_IS_SNB
  70296. CPUPOWER_CAP_PERF_BIAS
  70297. CPUPRI_IDLE
  70298. CPUPRI_INVALID
  70299. CPUPRI_NORMAL
  70300. CPUPRI_NR_PRIORITIES
  70301. CPUREGS_ATTR_RO
  70302. CPUSLAB_FLUSH
  70303. CPUSTAT_ECALL_PEND
  70304. CPUSTAT_EXT_INT
  70305. CPUSTAT_G
  70306. CPUSTAT_GED
  70307. CPUSTAT_GED2
  70308. CPUSTAT_IBS
  70309. CPUSTAT_IO_INT
  70310. CPUSTAT_J
  70311. CPUSTAT_KSS
  70312. CPUSTAT_MCDS
  70313. CPUSTAT_P
  70314. CPUSTAT_RETAINED
  70315. CPUSTAT_RRF
  70316. CPUSTAT_RUNNING
  70317. CPUSTAT_SIE_SUB
  70318. CPUSTAT_SLSR
  70319. CPUSTAT_SLSV
  70320. CPUSTAT_SM
  70321. CPUSTAT_STOPPED
  70322. CPUSTAT_STOP_INT
  70323. CPUSTAT_TIMING_SUB
  70324. CPUSTAT_WAIT
  70325. CPUSTAT_ZARCH
  70326. CPUST_RUN
  70327. CPUST_STANDBY
  70328. CPUS_PER_NODE
  70329. CPUS_PER_NODE_SHFT
  70330. CPUS_PER_SUBNODE
  70331. CPUS_TEMPLATE_CPU
  70332. CPUS_TEMPLATE_UNCORE
  70333. CPUTIME_GUEST
  70334. CPUTIME_GUEST_NICE
  70335. CPUTIME_IDLE
  70336. CPUTIME_IOWAIT
  70337. CPUTIME_IRQ
  70338. CPUTIME_NICE
  70339. CPUTIME_PER_SEC
  70340. CPUTIME_PER_USEC
  70341. CPUTIME_SOFTIRQ
  70342. CPUTIME_STEAL
  70343. CPUTIME_SYSTEM
  70344. CPUTIME_USER
  70345. CPUTOPCI_IO_WIN
  70346. CPUTOPCI_MEM_WIN
  70347. CPUUPD_RES
  70348. CPUUPD_SET
  70349. CPUUPD_UNC
  70350. CPUVER_7_20_A
  70351. CPUVER_7_20_D
  70352. CPUX_L2C_L2RTOAHR_PAGE_OFFSET
  70353. CPUX_L2C_L2RTOALR_PAGE_OFFSET
  70354. CPUX_L2C_L2RTOCR_PAGE_OFFSET
  70355. CPUX_L2C_L2RTOSR_PAGE_OFFSET
  70356. CPU_086
  70357. CPU_1004K
  70358. CPU_1074K
  70359. CPU_186
  70360. CPU_20KC
  70361. CPU_24K
  70362. CPU_25KF
  70363. CPU_286
  70364. CPU_34K
  70365. CPU_386
  70366. CPU_486
  70367. CPU_4KC
  70368. CPU_4KEC
  70369. CPU_4KSC
  70370. CPU_586
  70371. CPU_5KC
  70372. CPU_5KE
  70373. CPU_68020
  70374. CPU_68030
  70375. CPU_68040
  70376. CPU_68060
  70377. CPU_74K
  70378. CPU_ADDR_MSB_REGION_MASK
  70379. CPU_ADDR_MSB_REGION_VAL
  70380. CPU_ADR_RD_WR
  70381. CPU_AFFINITY_ALL
  70382. CPU_AHB_ADDR
  70383. CPU_AHB_CTRL
  70384. CPU_AHB_MASK
  70385. CPU_AHB_RATIO_MASK
  70386. CPU_AHB_RATIO_SHIFT
  70387. CPU_AHB_RDATA
  70388. CPU_AHB_SHIFT
  70389. CPU_AHB_WDATA
  70390. CPU_ALCHEMY
  70391. CPU_ALL_GP
  70392. CPU_ALL_NOGP
  70393. CPU_ALL_PORT
  70394. CPU_ARCH_ARMv3
  70395. CPU_ARCH_ARMv4
  70396. CPU_ARCH_ARMv4T
  70397. CPU_ARCH_ARMv5
  70398. CPU_ARCH_ARMv5T
  70399. CPU_ARCH_ARMv5TE
  70400. CPU_ARCH_ARMv5TEJ
  70401. CPU_ARCH_ARMv6
  70402. CPU_ARCH_ARMv7
  70403. CPU_ARCH_ARMv7M
  70404. CPU_ARCH_UNKNOWN
  70405. CPU_BANIAS
  70406. CPU_BASE
  70407. CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
  70408. CPU_BASED_ALWAYSON_WITHOUT_TRUE_MSR
  70409. CPU_BASED_CR3_LOAD_EXITING
  70410. CPU_BASED_CR3_STORE_EXITING
  70411. CPU_BASED_CR8_LOAD_EXITING
  70412. CPU_BASED_CR8_STORE_EXITING
  70413. CPU_BASED_HLT_EXITING
  70414. CPU_BASED_INVLPG_EXITING
  70415. CPU_BASED_MONITOR_EXITING
  70416. CPU_BASED_MONITOR_TRAP
  70417. CPU_BASED_MONITOR_TRAP_FLAG
  70418. CPU_BASED_MOV_DR_EXITING
  70419. CPU_BASED_MWAIT_EXITING
  70420. CPU_BASED_PAUSE_EXITING
  70421. CPU_BASED_RDPMC_EXITING
  70422. CPU_BASED_RDTSC_EXITING
  70423. CPU_BASED_TPR_SHADOW
  70424. CPU_BASED_UNCOND_IO_EXITING
  70425. CPU_BASED_USE_IO_BITMAPS
  70426. CPU_BASED_USE_MSR_BITMAPS
  70427. CPU_BASED_USE_TSC_OFFSETING
  70428. CPU_BASED_VIRTUAL_INTR_PENDING
  70429. CPU_BASED_VIRTUAL_NMI_PENDING
  70430. CPU_BASED_VM_EXEC_CONTROL
  70431. CPU_BE
  70432. CPU_BITS_ALL
  70433. CPU_BITS_CPU0
  70434. CPU_BITS_NONE
  70435. CPU_BLOCKID_FPU
  70436. CPU_BLOCKID_ICU
  70437. CPU_BLOCKID_IEU
  70438. CPU_BLOCKID_IFU
  70439. CPU_BLOCKID_LSU
  70440. CPU_BLOCKID_MAP
  70441. CPU_BLOCKID_MMU
  70442. CPU_BLOCKID_PRF
  70443. CPU_BLOCKID_SCH
  70444. CPU_BLOCKID_SCU
  70445. CPU_BMIPS32
  70446. CPU_BMIPS3300
  70447. CPU_BMIPS4350
  70448. CPU_BMIPS4380
  70449. CPU_BMIPS5000
  70450. CPU_BOOTPROCESSOR
  70451. CPU_BOOT_ADDR
  70452. CPU_BOOT_STATUS_DRAM_INIT_FAIL
  70453. CPU_BOOT_STATUS_DRAM_RDY
  70454. CPU_BOOT_STATUS_FIT_CORRUPTED
  70455. CPU_BOOT_STATUS_IN_BTL
  70456. CPU_BOOT_STATUS_IN_PREBOOT
  70457. CPU_BOOT_STATUS_IN_SPL
  70458. CPU_BOOT_STATUS_IN_UBOOT
  70459. CPU_BOOT_STATUS_IN_WFE
  70460. CPU_BOOT_STATUS_MASK
  70461. CPU_BOOT_STATUS_NA
  70462. CPU_BOOT_STATUS_SRAM_AVAIL
  70463. CPU_BOOT_STATUS_UBOOT_NOT_READY
  70464. CPU_BOOT_SUCCESS
  70465. CPU_BROKEN
  70466. CPU_BUFFER_SIZE_DEFAULT
  70467. CPU_CA53_CFG_ARB_DBG_ROM_ADDR_DEBUG_ROM_BASE_ADDR_MASK
  70468. CPU_CA53_CFG_ARB_DBG_ROM_ADDR_DEBUG_ROM_BASE_ADDR_SHIFT
  70469. CPU_CA53_CFG_ARB_DBG_ROM_ADDR_DEBUG_ROM_BASE_ADDR_VALID_MASK
  70470. CPU_CA53_CFG_ARB_DBG_ROM_ADDR_DEBUG_ROM_BASE_ADDR_VALID_SHIFT
  70471. CPU_CA53_CFG_ARM_AFFINITY_LEVEL_1_MASK
  70472. CPU_CA53_CFG_ARM_AFFINITY_LEVEL_1_SHIFT
  70473. CPU_CA53_CFG_ARM_AFFINITY_LEVEL_2_MASK
  70474. CPU_CA53_CFG_ARM_AFFINITY_LEVEL_2_SHIFT
  70475. CPU_CA53_CFG_ARM_CFG_AA64NAA32_MASK
  70476. CPU_CA53_CFG_ARM_CFG_AA64NAA32_SHIFT
  70477. CPU_CA53_CFG_ARM_CFG_END_MASK
  70478. CPU_CA53_CFG_ARM_CFG_END_SHIFT
  70479. CPU_CA53_CFG_ARM_CFG_TE_MASK
  70480. CPU_CA53_CFG_ARM_CFG_TE_SHIFT
  70481. CPU_CA53_CFG_ARM_CFG_VINITHI_MASK
  70482. CPU_CA53_CFG_ARM_CFG_VINITHI_SHIFT
  70483. CPU_CA53_CFG_ARM_DBG_MODES_DBGEN_MASK
  70484. CPU_CA53_CFG_ARM_DBG_MODES_DBGEN_SHIFT
  70485. CPU_CA53_CFG_ARM_DBG_MODES_EDBGRQ_MASK
  70486. CPU_CA53_CFG_ARM_DBG_MODES_EDBGRQ_SHIFT
  70487. CPU_CA53_CFG_ARM_DBG_MODES_NIDEN_MASK
  70488. CPU_CA53_CFG_ARM_DBG_MODES_NIDEN_SHIFT
  70489. CPU_CA53_CFG_ARM_DBG_MODES_SPIDEN_MASK
  70490. CPU_CA53_CFG_ARM_DBG_MODES_SPIDEN_SHIFT
  70491. CPU_CA53_CFG_ARM_DBG_MODES_SPNIDEN_MASK
  70492. CPU_CA53_CFG_ARM_DBG_MODES_SPNIDEN_SHIFT
  70493. CPU_CA53_CFG_ARM_DBG_STATUS_COMMRX_MASK
  70494. CPU_CA53_CFG_ARM_DBG_STATUS_COMMRX_SHIFT
  70495. CPU_CA53_CFG_ARM_DBG_STATUS_COMMTX_MASK
  70496. CPU_CA53_CFG_ARM_DBG_STATUS_COMMTX_SHIFT
  70497. CPU_CA53_CFG_ARM_DBG_STATUS_DBGACK_MASK
  70498. CPU_CA53_CFG_ARM_DBG_STATUS_DBGACK_SHIFT
  70499. CPU_CA53_CFG_ARM_DBG_STATUS_DBGNOPWRDWN_MASK
  70500. CPU_CA53_CFG_ARM_DBG_STATUS_DBGNOPWRDWN_SHIFT
  70501. CPU_CA53_CFG_ARM_DBG_STATUS_DBGPWRUPREQ_MASK
  70502. CPU_CA53_CFG_ARM_DBG_STATUS_DBGPWRUPREQ_SHIFT
  70503. CPU_CA53_CFG_ARM_DBG_STATUS_DBGRSTREQ_MASK
  70504. CPU_CA53_CFG_ARM_DBG_STATUS_DBGRSTREQ_SHIFT
  70505. CPU_CA53_CFG_ARM_DISABLE_CP15S_MASK
  70506. CPU_CA53_CFG_ARM_DISABLE_CP15S_SHIFT
  70507. CPU_CA53_CFG_ARM_DISABLE_CRYPTO_MASK
  70508. CPU_CA53_CFG_ARM_DISABLE_CRYPTO_SHIFT
  70509. CPU_CA53_CFG_ARM_DISABLE_DBG_L1_RST_MASK
  70510. CPU_CA53_CFG_ARM_DISABLE_DBG_L1_RST_SHIFT
  70511. CPU_CA53_CFG_ARM_DISABLE_L2_RST_MASK
  70512. CPU_CA53_CFG_ARM_DISABLE_L2_RST_SHIFT
  70513. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_GIC_EN_MASK
  70514. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_GIC_EN_SHIFT
  70515. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NFIQ_MASK
  70516. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NFIQ_SHIFT
  70517. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NIRQ_MASK
  70518. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NIRQ_SHIFT
  70519. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NREI_MASK
  70520. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NREI_SHIFT
  70521. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NSEI_MASK
  70522. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NSEI_SHIFT
  70523. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NVFIQ_MASK
  70524. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NVFIQ_SHIFT
  70525. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NVIRQ_MASK
  70526. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NVIRQ_SHIFT
  70527. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NVSEI_MASK
  70528. CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NVSEI_SHIFT
  70529. CPU_CA53_CFG_ARM_GIC_PERIPHBASE_PERIPHBASE_MASK
  70530. CPU_CA53_CFG_ARM_GIC_PERIPHBASE_PERIPHBASE_SHIFT
  70531. CPU_CA53_CFG_ARM_MEM_ATTR_RACKM_MASK
  70532. CPU_CA53_CFG_ARM_MEM_ATTR_RACKM_SHIFT
  70533. CPU_CA53_CFG_ARM_MEM_ATTR_RDMEMATTR_MASK
  70534. CPU_CA53_CFG_ARM_MEM_ATTR_RDMEMATTR_SHIFT
  70535. CPU_CA53_CFG_ARM_MEM_ATTR_WACKM_MASK
  70536. CPU_CA53_CFG_ARM_MEM_ATTR_WACKM_SHIFT
  70537. CPU_CA53_CFG_ARM_MEM_ATTR_WRMEMATTR_MASK
  70538. CPU_CA53_CFG_ARM_MEM_ATTR_WRMEMATTR_SHIFT
  70539. CPU_CA53_CFG_ARM_PMU_EVENT_MASK
  70540. CPU_CA53_CFG_ARM_PMU_EVENT_SHIFT
  70541. CPU_CA53_CFG_ARM_PWR_MNG_CLREXMONREQ_MASK
  70542. CPU_CA53_CFG_ARM_PWR_MNG_CLREXMONREQ_SHIFT
  70543. CPU_CA53_CFG_ARM_PWR_MNG_CPUQREQN_MASK
  70544. CPU_CA53_CFG_ARM_PWR_MNG_CPUQREQN_SHIFT
  70545. CPU_CA53_CFG_ARM_PWR_MNG_DBGPWRDUP_MASK
  70546. CPU_CA53_CFG_ARM_PWR_MNG_DBGPWRDUP_SHIFT
  70547. CPU_CA53_CFG_ARM_PWR_MNG_EVENTI_MASK
  70548. CPU_CA53_CFG_ARM_PWR_MNG_EVENTI_SHIFT
  70549. CPU_CA53_CFG_ARM_PWR_MNG_L2FLUSHREQ_MASK
  70550. CPU_CA53_CFG_ARM_PWR_MNG_L2FLUSHREQ_SHIFT
  70551. CPU_CA53_CFG_ARM_PWR_MNG_L2QREQN_MASK
  70552. CPU_CA53_CFG_ARM_PWR_MNG_L2QREQN_SHIFT
  70553. CPU_CA53_CFG_ARM_PWR_MNG_NEONQREQN_MASK
  70554. CPU_CA53_CFG_ARM_PWR_MNG_NEONQREQN_SHIFT
  70555. CPU_CA53_CFG_ARM_PWR_STAT_0_CLREXMONACK_MASK
  70556. CPU_CA53_CFG_ARM_PWR_STAT_0_CLREXMONACK_SHIFT
  70557. CPU_CA53_CFG_ARM_PWR_STAT_0_EVENTO_MASK
  70558. CPU_CA53_CFG_ARM_PWR_STAT_0_EVENTO_SHIFT
  70559. CPU_CA53_CFG_ARM_PWR_STAT_0_L2FLUSHDONE_MASK
  70560. CPU_CA53_CFG_ARM_PWR_STAT_0_L2FLUSHDONE_SHIFT
  70561. CPU_CA53_CFG_ARM_PWR_STAT_0_SMPEN_MASK
  70562. CPU_CA53_CFG_ARM_PWR_STAT_0_SMPEN_SHIFT
  70563. CPU_CA53_CFG_ARM_PWR_STAT_0_STANDBYWFE_MASK
  70564. CPU_CA53_CFG_ARM_PWR_STAT_0_STANDBYWFE_SHIFT
  70565. CPU_CA53_CFG_ARM_PWR_STAT_0_STANDBYWFIL2_MASK
  70566. CPU_CA53_CFG_ARM_PWR_STAT_0_STANDBYWFIL2_SHIFT
  70567. CPU_CA53_CFG_ARM_PWR_STAT_0_STANDBYWFI_MASK
  70568. CPU_CA53_CFG_ARM_PWR_STAT_0_STANDBYWFI_SHIFT
  70569. CPU_CA53_CFG_ARM_PWR_STAT_1_CPUQACCEPTN_MASK
  70570. CPU_CA53_CFG_ARM_PWR_STAT_1_CPUQACCEPTN_SHIFT
  70571. CPU_CA53_CFG_ARM_PWR_STAT_1_CPUQACTIVE_MASK
  70572. CPU_CA53_CFG_ARM_PWR_STAT_1_CPUQACTIVE_SHIFT
  70573. CPU_CA53_CFG_ARM_PWR_STAT_1_CPUQDENY_MASK
  70574. CPU_CA53_CFG_ARM_PWR_STAT_1_CPUQDENY_SHIFT
  70575. CPU_CA53_CFG_ARM_PWR_STAT_1_L2QACCEPTN_MASK
  70576. CPU_CA53_CFG_ARM_PWR_STAT_1_L2QACCEPTN_SHIFT
  70577. CPU_CA53_CFG_ARM_PWR_STAT_1_L2QACTIVE_MASK
  70578. CPU_CA53_CFG_ARM_PWR_STAT_1_L2QACTIVE_SHIFT
  70579. CPU_CA53_CFG_ARM_PWR_STAT_1_L2QDENY_MASK
  70580. CPU_CA53_CFG_ARM_PWR_STAT_1_L2QDENY_SHIFT
  70581. CPU_CA53_CFG_ARM_PWR_STAT_1_NEONQACCEPTN_MASK
  70582. CPU_CA53_CFG_ARM_PWR_STAT_1_NEONQACCEPTN_SHIFT
  70583. CPU_CA53_CFG_ARM_PWR_STAT_1_NEONQACTIVE_MASK
  70584. CPU_CA53_CFG_ARM_PWR_STAT_1_NEONQACTIVE_SHIFT
  70585. CPU_CA53_CFG_ARM_PWR_STAT_1_NEONQDENY_MASK
  70586. CPU_CA53_CFG_ARM_PWR_STAT_1_NEONQDENY_SHIFT
  70587. CPU_CA53_CFG_ARM_RST_CONTROL_NCORERESET_MASK
  70588. CPU_CA53_CFG_ARM_RST_CONTROL_NCORERESET_SHIFT
  70589. CPU_CA53_CFG_ARM_RST_CONTROL_NCPUPORESET_MASK
  70590. CPU_CA53_CFG_ARM_RST_CONTROL_NCPUPORESET_SHIFT
  70591. CPU_CA53_CFG_ARM_RST_CONTROL_NL2RESET_MASK
  70592. CPU_CA53_CFG_ARM_RST_CONTROL_NL2RESET_SHIFT
  70593. CPU_CA53_CFG_ARM_RST_CONTROL_NMBISTRESET_MASK
  70594. CPU_CA53_CFG_ARM_RST_CONTROL_NMBISTRESET_SHIFT
  70595. CPU_CA53_CFG_ARM_RST_CONTROL_NPRESETDBG_MASK
  70596. CPU_CA53_CFG_ARM_RST_CONTROL_NPRESETDBG_SHIFT
  70597. CPU_CA53_CFG_ARM_RST_CONTROL_WARMRSTREQ_MASK
  70598. CPU_CA53_CFG_ARM_RST_CONTROL_WARMRSTREQ_SHIFT
  70599. CPU_CA53_CFG_MAX_OFFSET
  70600. CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_MASK
  70601. CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_SHIFT
  70602. CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_MASK
  70603. CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_SHIFT
  70604. CPU_CA53_CFG_SECTION
  70605. CPU_CALL_A_IRQ
  70606. CPU_CALL_B_IRQ
  70607. CPU_CAVIUM_OCTEON
  70608. CPU_CAVIUM_OCTEON2
  70609. CPU_CAVIUM_OCTEON3
  70610. CPU_CAVIUM_OCTEON_PLUS
  70611. CPU_CCK_LOOPBACK
  70612. CPU_CHIP_SWAP16
  70613. CPU_CHIP_SWAP32
  70614. CPU_CLKSEL
  70615. CPU_CLKSEL_SHT
  70616. CPU_CLK_SEL
  70617. CPU_CLOCK
  70618. CPU_CLOCK_ADDRESS
  70619. CPU_CLOCK_OFFSET
  70620. CPU_CLOCK_STANDARD
  70621. CPU_CLOCK_STANDARD_LSB
  70622. CPU_CLOCK_STANDARD_MASK
  70623. CPU_CLOCK_STANDARD_S
  70624. CPU_CLUSTER_PM_ENTER
  70625. CPU_CLUSTER_PM_ENTER_FAILED
  70626. CPU_CLUSTER_PM_EXIT
  70627. CPU_CMD
  70628. CPU_CMD_BRESET
  70629. CPU_CMD_DE_SetBase
  70630. CPU_CMD_MASK
  70631. CPU_CMD_MASK_ACK
  70632. CPU_CMD_MASK_CAPTURE
  70633. CPU_CMD_MASK_DE
  70634. CPU_CMD_MASK_DEBUG
  70635. CPU_CMD_MASK_TS
  70636. CPU_CNTR
  70637. CPU_COLDFIRE
  70638. CPU_COMING_UP
  70639. CPU_COMPACT_MODE_MASK
  70640. CPU_COMPACT_MODE_MASK_SFT
  70641. CPU_COMPACT_MODE_SFT
  70642. CPU_CONF
  70643. CPU_CONFIG
  70644. CPU_CONFIG_ERROR_PROP
  70645. CPU_CONFIG_PHYS
  70646. CPU_CONFIG_SHARED_L2
  70647. CPU_CONTROL
  70648. CPU_CONTROL_PHYS
  70649. CPU_CORTEX_A15
  70650. CPU_CORTEX_A9
  70651. CPU_CREDIT_REG
  70652. CPU_CREDIT_REG_MCPx_READ_CRED_MASK
  70653. CPU_CREDIT_REG_MCPx_READ_CRED_SHIFT
  70654. CPU_CREDIT_REG_MCPx_WRITE_CRED_MASK
  70655. CPU_CREDIT_REG_MCPx_WRITE_CRED_SHIFT
  70656. CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK
  70657. CPU_CSR_STRIDE
  70658. CPU_CS_A2HSOFTINTCLR
  70659. CPU_CS_BASE
  70660. CPU_CS_SCIACMDARG0
  70661. CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK
  70662. CPU_CS_SCIACMDARG0_ERROR_STATUS_SHIFT
  70663. CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK
  70664. CPU_CS_SCIACMDARG0_INIT_STATUS_MASK
  70665. CPU_CS_SCIACMDARG0_INIT_STATUS_SHIFT
  70666. CPU_CS_SCIACMDARG0_MASK
  70667. CPU_CS_SCIACMDARG0_PC_READY
  70668. CPU_CS_SCIACMDARG0_SHIFT
  70669. CPU_CS_SCIACMDARG1
  70670. CPU_CS_SCIACMDARG2
  70671. CPU_CS_SCIACMDARG3
  70672. CPU_CTI_MAX_OFFSET
  70673. CPU_CTI_SECTION
  70674. CPU_CTI_TRACE_MAX_OFFSET
  70675. CPU_CTI_TRACE_SECTION
  70676. CPU_CTRL
  70677. CPU_CTRL_PCIE0_LINK
  70678. CPU_CTRL_PCIE1_LINK
  70679. CPU_CVB_TABLE
  70680. CPU_CVB_TABLE_EUCM1
  70681. CPU_CVB_TABLE_EUCM2
  70682. CPU_CVB_TABLE_EUCM2_JOINT_RAIL
  70683. CPU_CVB_TABLE_ODN
  70684. CPU_CVB_TABLE_XA
  70685. CPU_DABORT_HANDLER
  70686. CPU_DACK_ONLY
  70687. CPU_DACK_RD_WR
  70688. CPU_DBG_ADDRESS
  70689. CPU_DBG_GATE
  70690. CPU_DBG_SEL_ADDRESS
  70691. CPU_DEAD
  70692. CPU_DEAD_FROZEN
  70693. CPU_DEATH_HALT
  70694. CPU_DEATH_POWER
  70695. CPU_DEVID_FAMILY
  70696. CPU_DEVID_REVISION
  70697. CPU_DISCARD
  70698. CPU_DMA_REGISTER_H
  70699. CPU_DONT_CARE
  70700. CPU_DOTHAN_A1
  70701. CPU_DOTHAN_A2
  70702. CPU_DOTHAN_B0
  70703. CPU_DOWN
  70704. CPU_EARLY_SETUP
  70705. CPU_EN
  70706. CPU_ENABLED
  70707. CPU_ENA_OFFSET
  70708. CPU_ENTRY_AREA_ARRAY_SIZE
  70709. CPU_ENTRY_AREA_BASE
  70710. CPU_ENTRY_AREA_MAP_SIZE
  70711. CPU_ENTRY_AREA_NR
  70712. CPU_ENTRY_AREA_PAGES
  70713. CPU_ENTRY_AREA_PER_CPU
  70714. CPU_ENTRY_AREA_PGD
  70715. CPU_ENTRY_AREA_RO_IDT
  70716. CPU_ENTRY_AREA_RO_IDT_VADDR
  70717. CPU_ENTRY_AREA_SIZE
  70718. CPU_ENTRY_AREA_TOTAL_SIZE
  70719. CPU_EQUAL
  70720. CPU_ERR1_REG
  70721. CPU_ERR2_REG
  70722. CPU_ERRMASK
  70723. CPU_ETF_0_MAX_OFFSET
  70724. CPU_ETF_0_SECTION
  70725. CPU_ETF_1_MAX_OFFSET
  70726. CPU_ETF_1_SECTION
  70727. CPU_ETF_TRACE_MAX_OFFSET
  70728. CPU_ETF_TRACE_SECTION
  70729. CPU_EVTMASK
  70730. CPU_EXCP_DETECTED
  70731. CPU_EZRA
  70732. CPU_EZRA_T
  70733. CPU_FAMILY_MASK
  70734. CPU_FAMILY_SH2
  70735. CPU_FAMILY_SH2A
  70736. CPU_FAMILY_SH3
  70737. CPU_FAMILY_SH4
  70738. CPU_FAMILY_SH4A
  70739. CPU_FAMILY_SH4AL_DSP
  70740. CPU_FAMILY_SH5
  70741. CPU_FAMILY_UNKNOWN
  70742. CPU_FANS_REQD
  70743. CPU_FAN_REG
  70744. CPU_FEATURE_TYPEFMT
  70745. CPU_FEATURE_TYPEVAL
  70746. CPU_FINETRIM_1_FCPU_1
  70747. CPU_FINETRIM_1_FCPU_2
  70748. CPU_FINETRIM_1_FCPU_3
  70749. CPU_FINETRIM_1_FCPU_4
  70750. CPU_FINETRIM_1_FCPU_5
  70751. CPU_FINETRIM_1_FCPU_6
  70752. CPU_FINETRIM_DR
  70753. CPU_FINETRIM_R
  70754. CPU_FINETRIM_R_FCPU_1_MASK
  70755. CPU_FINETRIM_R_FCPU_1_SHIFT
  70756. CPU_FINETRIM_R_FCPU_2_MASK
  70757. CPU_FINETRIM_R_FCPU_2_SHIFT
  70758. CPU_FINETRIM_R_FCPU_3_MASK
  70759. CPU_FINETRIM_R_FCPU_3_SHIFT
  70760. CPU_FINETRIM_R_FCPU_4_MASK
  70761. CPU_FINETRIM_R_FCPU_4_SHIFT
  70762. CPU_FINETRIM_R_FCPU_5_MASK
  70763. CPU_FINETRIM_R_FCPU_5_SHIFT
  70764. CPU_FINETRIM_R_FCPU_6_MASK
  70765. CPU_FINETRIM_R_FCPU_6_SHIFT
  70766. CPU_FINETRIM_SELECT
  70767. CPU_FREQ
  70768. CPU_FREQ_10MHZ
  70769. CPU_FREQ_1MHZ
  70770. CPU_FREQ_5MHZ
  70771. CPU_FREQ_GOV_CONSERVATIVE
  70772. CPU_FREQ_GOV_ONDEMAND
  70773. CPU_FTRS_40X
  70774. CPU_FTRS_440x6
  70775. CPU_FTRS_44X
  70776. CPU_FTRS_47X
  70777. CPU_FTRS_603
  70778. CPU_FTRS_604
  70779. CPU_FTRS_740
  70780. CPU_FTRS_7400
  70781. CPU_FTRS_7400_NOTAU
  70782. CPU_FTRS_740_NOTAU
  70783. CPU_FTRS_7447
  70784. CPU_FTRS_7447A
  70785. CPU_FTRS_7447_10
  70786. CPU_FTRS_7448
  70787. CPU_FTRS_7450_20
  70788. CPU_FTRS_7450_21
  70789. CPU_FTRS_7450_23
  70790. CPU_FTRS_7455
  70791. CPU_FTRS_7455_1
  70792. CPU_FTRS_7455_20
  70793. CPU_FTRS_750
  70794. CPU_FTRS_750CL
  70795. CPU_FTRS_750FX
  70796. CPU_FTRS_750FX1
  70797. CPU_FTRS_750FX2
  70798. CPU_FTRS_750GX
  70799. CPU_FTRS_82XX
  70800. CPU_FTRS_8XX
  70801. CPU_FTRS_ALWAYS
  70802. CPU_FTRS_CELL
  70803. CPU_FTRS_CLASSIC32
  70804. CPU_FTRS_COMPATIBLE
  70805. CPU_FTRS_DT_CPU_BASE
  70806. CPU_FTRS_E200
  70807. CPU_FTRS_E300
  70808. CPU_FTRS_E300C2
  70809. CPU_FTRS_E500
  70810. CPU_FTRS_E500MC
  70811. CPU_FTRS_E500_2
  70812. CPU_FTRS_E5500
  70813. CPU_FTRS_E6500
  70814. CPU_FTRS_G2_LE
  70815. CPU_FTRS_GENERIC_32
  70816. CPU_FTRS_PA6T
  70817. CPU_FTRS_POSSIBLE
  70818. CPU_FTRS_POWER5
  70819. CPU_FTRS_POWER6
  70820. CPU_FTRS_POWER7
  70821. CPU_FTRS_POWER8
  70822. CPU_FTRS_POWER8E
  70823. CPU_FTRS_POWER9
  70824. CPU_FTRS_POWER9_DD2_0
  70825. CPU_FTRS_POWER9_DD2_1
  70826. CPU_FTRS_POWER9_DD2_2
  70827. CPU_FTRS_PPC601
  70828. CPU_FTRS_PPC970
  70829. CPU_FTR_476_DD2
  70830. CPU_FTR_ALTIVEC
  70831. CPU_FTR_ALTIVEC_COMP
  70832. CPU_FTR_ARCH_206
  70833. CPU_FTR_ARCH_207S
  70834. CPU_FTR_ARCH_300
  70835. CPU_FTR_ASYM_SMT
  70836. CPU_FTR_CAN_DOZE
  70837. CPU_FTR_CAN_NAP
  70838. CPU_FTR_CELL_TB_BUG
  70839. CPU_FTR_CFAR
  70840. CPU_FTR_COHERENT_ICACHE
  70841. CPU_FTR_COMMON
  70842. CPU_FTR_CP_USE_DCBTZ
  70843. CPU_FTR_CTRL
  70844. CPU_FTR_DABRX
  70845. CPU_FTR_DAWR
  70846. CPU_FTR_DBELL
  70847. CPU_FTR_DEBUG_LVL_EXC
  70848. CPU_FTR_DSCR
  70849. CPU_FTR_DUAL_PLL_750FX
  70850. CPU_FTR_EMB_HV
  70851. CPU_FTR_FPU_UNAVAILABLE
  70852. CPU_FTR_HAS_PPR
  70853. CPU_FTR_HVMODE
  70854. CPU_FTR_INDEXED_DCR
  70855. CPU_FTR_L2CR
  70856. CPU_FTR_L3CR
  70857. CPU_FTR_L3_DISABLE_NAP
  70858. CPU_FTR_LWSYNC
  70859. CPU_FTR_MAYBE_CAN_DOZE
  70860. CPU_FTR_MAYBE_CAN_NAP
  70861. CPU_FTR_MMCRA
  70862. CPU_FTR_NAP_DISABLE_L2_PR
  70863. CPU_FTR_NEED_COHERENT
  70864. CPU_FTR_NEED_PAIRED_STWCX
  70865. CPU_FTR_NODSISRALIGN
  70866. CPU_FTR_NOEXECUTE
  70867. CPU_FTR_NO_BTIC
  70868. CPU_FTR_NO_DPM
  70869. CPU_FTR_P9_TIDR
  70870. CPU_FTR_P9_TLBIE_ERAT_BUG
  70871. CPU_FTR_P9_TLBIE_STQ_BUG
  70872. CPU_FTR_P9_TM_HV_ASSIST
  70873. CPU_FTR_P9_TM_XER_SO_BUG
  70874. CPU_FTR_PAUSE_ZERO
  70875. CPU_FTR_PKEY
  70876. CPU_FTR_PMAO_BUG
  70877. CPU_FTR_POPCNTB
  70878. CPU_FTR_POPCNTD
  70879. CPU_FTR_POWER9_DD2_1
  70880. CPU_FTR_PPCAS_ARCH_V2
  70881. CPU_FTR_PPC_LE
  70882. CPU_FTR_PURR
  70883. CPU_FTR_REAL_LE
  70884. CPU_FTR_SAO
  70885. CPU_FTR_SMT
  70886. CPU_FTR_SPE
  70887. CPU_FTR_SPEC7450
  70888. CPU_FTR_SPE_COMP
  70889. CPU_FTR_SPURR
  70890. CPU_FTR_STCX_CHECKS_ADDRESS
  70891. CPU_FTR_TAU
  70892. CPU_FTR_TM
  70893. CPU_FTR_TM_COMP
  70894. CPU_FTR_UNALIGNED_LD_STD
  70895. CPU_FTR_VMX_COPY
  70896. CPU_FTR_VSX
  70897. CPU_FTR_VSX_COMP
  70898. CPU_FUNNEL_MAX_OFFSET
  70899. CPU_FUNNEL_SECTION
  70900. CPU_FW_IMAGE_ADDR
  70901. CPU_FW_IMAGE_SIZE
  70902. CPU_GEN
  70903. CPU_GEN_BB_RST
  70904. CPU_GEN_BOOT_RDY
  70905. CPU_GEN_FIRMWARE_RESET
  70906. CPU_GEN_FIRM_RDY
  70907. CPU_GEN_GPIO_UART
  70908. CPU_GEN_NO_LOOPBACK_MSK
  70909. CPU_GEN_NO_LOOPBACK_SET
  70910. CPU_GEN_PUT_CODE_OK
  70911. CPU_GEN_PWR_STB_CPU
  70912. CPU_GEN_SYSTEM_RESET
  70913. CPU_GOING_DOWN
  70914. CPU_GP_REG_OFFSET
  70915. CPU_HALT
  70916. CPU_HALTED
  70917. CPU_HAS_CAS_L
  70918. CPU_HAS_DSP
  70919. CPU_HAS_FPU
  70920. CPU_HAS_L2_CACHE
  70921. CPU_HAS_LLSC
  70922. CPU_HAS_MMU_PAGE_ASSOC
  70923. CPU_HAS_OP32
  70924. CPU_HAS_P2_FLUSH_BUG
  70925. CPU_HAS_PERF_COUNTER
  70926. CPU_HAS_PTEA
  70927. CPU_HAS_PTEAEX
  70928. CPU_HD_ALIGN_MASK
  70929. CPU_HD_ALIGN_MASK_SFT
  70930. CPU_HD_ALIGN_SFT
  70931. CPU_HVERSION
  70932. CPU_HW_BP
  70933. CPU_I6400
  70934. CPU_I6500
  70935. CPU_IC_BASE
  70936. CPU_IC_SOFTINT
  70937. CPU_IC_SOFTINT_H2A_MASK
  70938. CPU_IC_SOFTINT_H2A_SHIFT
  70939. CPU_IDLE
  70940. CPU_ID_M6
  70941. CPU_ID_M7
  70942. CPU_ID_M8
  70943. CPU_ID_NIAGARA1
  70944. CPU_ID_NIAGARA2
  70945. CPU_ID_NIAGARA3
  70946. CPU_ID_NIAGARA4
  70947. CPU_ID_NIAGARA5
  70948. CPU_ID_SONOMA1
  70949. CPU_IEMSK
  70950. CPU_IF_MAX_OFFSET
  70951. CPU_IF_SECTION
  70952. CPU_IMSK
  70953. CPU_INSN
  70954. CPU_INSTR_PER_JIFFY
  70955. CPU_INTAKE_SCALE
  70956. CPU_INTERAPTIV
  70957. CPU_INTERRUPT_ENABLE
  70958. CPU_INTR_ADDRESS
  70959. CPU_INTR_DNLD_RDY
  70960. CPU_INTR_DOOR_BELL
  70961. CPU_INTR_EVENT_DONE
  70962. CPU_INTR_RESET
  70963. CPU_INTR_SLEEP_CFM_DONE
  70964. CPU_INT_ST
  70965. CPU_INT_STATUS_ADDRESS
  70966. CPU_INT_STATUS_ENABLE_ADDRESS
  70967. CPU_INT_STATUS_ENABLE_BIT
  70968. CPU_INT_STATUS_ENABLE_BIT_LSB
  70969. CPU_INT_STATUS_ENABLE_BIT_MASK
  70970. CPU_INT_STATUS_ENABLE_BIT_S
  70971. CPU_IRQ_BASE
  70972. CPU_IRQ_MAX
  70973. CPU_IS_020
  70974. CPU_IS_020_OR_030
  70975. CPU_IS_030
  70976. CPU_IS_040
  70977. CPU_IS_040_OR_060
  70978. CPU_IS_060
  70979. CPU_IS_COLDFIRE
  70980. CPU_IS_FIRST_CORE_IN_PACKAGE
  70981. CPU_IS_FIRST_THREAD_IN_CORE
  70982. CPU_IS_PNX8330
  70983. CPU_IS_PNX8335
  70984. CPU_J2
  70985. CPU_KEEP
  70986. CPU_KILL_ME
  70987. CPU_L2C_PAGE
  70988. CPU_LAST
  70989. CPU_LAST_BRANCH_ADDR
  70990. CPU_LE
  70991. CPU_LED_ADDR
  70992. CPU_LED_HALTED
  70993. CPU_LED_IDLE_END
  70994. CPU_LED_IDLE_START
  70995. CPU_LED_START
  70996. CPU_LED_STOP
  70997. CPU_LOONGSON1
  70998. CPU_LOONGSON2
  70999. CPU_LOONGSON3
  71000. CPU_M14KC
  71001. CPU_M14KEC
  71002. CPU_M5150
  71003. CPU_M6250
  71004. CPU_M68020_ONLY
  71005. CPU_M68020_OR_M68030
  71006. CPU_M68020_OR_M68030_ONLY
  71007. CPU_M68030_ONLY
  71008. CPU_M68040_ONLY
  71009. CPU_M68040_OR_M68060
  71010. CPU_M68040_OR_M68060_ONLY
  71011. CPU_M68060_ONLY
  71012. CPU_MAP_BULK_SIZE
  71013. CPU_MASK
  71014. CPU_MASK_ALL
  71015. CPU_MASK_CPU0
  71016. CPU_MASK_ENABLE
  71017. CPU_MASK_NONE
  71018. CPU_MAX_IDLE_TYPES
  71019. CPU_MAX_OFFLINE_STATES
  71020. CPU_MCP_FLOW_REG
  71021. CPU_MCP_FLOW_REG_MCPx_RDBUFF_CRED_MASK
  71022. CPU_MCP_FLOW_REG_MCPx_RDBUFF_CRED_SHIFT
  71023. CPU_MEMERR_CPU_PAGE
  71024. CPU_MEMERR_L2C_PAGE
  71025. CPU_METHOD_OF_DECLARE
  71026. CPU_METHOD_OF_TABLES
  71027. CPU_MF_INT_CF_CACA
  71028. CPU_MF_INT_CF_LCDA
  71029. CPU_MF_INT_CF_MASK
  71030. CPU_MF_INT_CF_MTDA
  71031. CPU_MF_INT_SF_IAE
  71032. CPU_MF_INT_SF_ISE
  71033. CPU_MF_INT_SF_LSDA
  71034. CPU_MF_INT_SF_MASK
  71035. CPU_MF_INT_SF_PRA
  71036. CPU_MF_INT_SF_SACA
  71037. CPU_MF_SF_RIBM_NOTAV
  71038. CPU_MICROCODE
  71039. CPU_MIGRATE_ALL_CPUS
  71040. CPU_MITIGATIONS_AUTO
  71041. CPU_MITIGATIONS_AUTO_NOSMT
  71042. CPU_MITIGATIONS_OFF
  71043. CPU_MMU_OFF
  71044. CPU_MODE
  71045. CPU_MODEL_MASK
  71046. CPU_MODE_HALT
  71047. CPU_MODE_RESET
  71048. CPU_MONDO_COUNTER
  71049. CPU_MP4HT_D0
  71050. CPU_MP4HT_E0
  71051. CPU_MXG
  71052. CPU_NAME
  71053. CPU_NAME_BUF_SIZE
  71054. CPU_NEHEMIAH
  71055. CPU_NEHEMIAH_C
  71056. CPU_NEVADA
  71057. CPU_NEWLY_IDLE
  71058. CPU_NONE
  71059. CPU_NOT_IDLE
  71060. CPU_NOT_RESETTABLE
  71061. CPU_ONLINE
  71062. CPU_OR
  71063. CPU_ORIDE
  71064. CPU_ORIDE_BKPT
  71065. CPU_ORIDE_CTERM
  71066. CPU_ORIDE_ETRIG
  71067. CPU_ORIDE_FRESET
  71068. CPU_ORIDE_LBACK
  71069. CPU_ORIDE_OFORCE
  71070. CPU_ORIDE_PTEST
  71071. CPU_ORIDE_PWRITE
  71072. CPU_ORIDE_RMOD
  71073. CPU_ORIDE_RREG
  71074. CPU_ORIDE_STEP
  71075. CPU_ORIDE_TENAB
  71076. CPU_ORIDE_TPINS
  71077. CPU_OVERTEMP
  71078. CPU_P5600
  71079. CPU_P6600
  71080. CPU_PABORT_HANDLER
  71081. CPU_PANIC_KERNEL
  71082. CPU_PARTIAL_ALLOC
  71083. CPU_PARTIAL_DRAIN
  71084. CPU_PARTIAL_FREE
  71085. CPU_PARTIAL_NODE
  71086. CPU_PATH
  71087. CPU_PC
  71088. CPU_PCTRL
  71089. CPU_PCTRL_ACK
  71090. CPU_PCTRL_ATN
  71091. CPU_PCTRL_BSY
  71092. CPU_PCTRL_CD
  71093. CPU_PCTRL_IO
  71094. CPU_PCTRL_MSG
  71095. CPU_PCTRL_PHI
  71096. CPU_PCTRL_PLO
  71097. CPU_PCTRL_PVALID
  71098. CPU_PCTRL_REQ
  71099. CPU_PCTRL_RST
  71100. CPU_PCTRL_SEL
  71101. CPU_PDIFF
  71102. CPU_PDIFF_INIT
  71103. CPU_PDIFF_MODE
  71104. CPU_PDIFF_OENAB
  71105. CPU_PDIFF_PMASK
  71106. CPU_PDIFF_SENSE
  71107. CPU_PDIFF_TGT
  71108. CPU_PERI_GATE
  71109. CPU_PLL
  71110. CPU_PLL_MAX_OFFSET
  71111. CPU_PLL_SECTION
  71112. CPU_PLL_SOURCE_SHIFT
  71113. CPU_PMU
  71114. CPU_PM_CPU_IDLE_ENTER
  71115. CPU_PM_CPU_IDLE_ENTER_PARAM
  71116. CPU_PM_CPU_IDLE_ENTER_RETENTION
  71117. CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM
  71118. CPU_PM_ENTER
  71119. CPU_PM_ENTER_FAILED
  71120. CPU_PM_EXIT
  71121. CPU_PORT
  71122. CPU_POST_DEAD
  71123. CPU_POWER_OFF
  71124. CPU_POWER_ON
  71125. CPU_PR4450
  71126. CPU_PREEMPTION_LOCKS_INIT0
  71127. CPU_PREEMPTION_LOCKS_INIT1
  71128. CPU_PREEMPTION_LOCKS_INIT2
  71129. CPU_PREEMPTION_LOCKS_INIT3
  71130. CPU_PREEMPTION_LOCKS_INIT4
  71131. CPU_PREEMPTION_LOCKS_INIT5
  71132. CPU_PROAPTIV
  71133. CPU_PROCESS_CORNERS
  71134. CPU_PROFILING
  71135. CPU_PROM_FAILED
  71136. CPU_PSKIP_STATUS
  71137. CPU_PUMP_OUTPUT_MAX
  71138. CPU_PUMP_OUTPUT_MIN
  71139. CPU_QEMU_GENERIC
  71140. CPU_R0
  71141. CPU_R1
  71142. CPU_R10
  71143. CPU_R10000
  71144. CPU_R11
  71145. CPU_R12
  71146. CPU_R12000
  71147. CPU_R13
  71148. CPU_R14
  71149. CPU_R14000
  71150. CPU_R15
  71151. CPU_R16
  71152. CPU_R16000
  71153. CPU_R17
  71154. CPU_R18
  71155. CPU_R19
  71156. CPU_R2
  71157. CPU_R20
  71158. CPU_R2000
  71159. CPU_R21
  71160. CPU_R22
  71161. CPU_R23
  71162. CPU_R24
  71163. CPU_R25
  71164. CPU_R26
  71165. CPU_R27
  71166. CPU_R28
  71167. CPU_R29
  71168. CPU_R3
  71169. CPU_R30
  71170. CPU_R3000
  71171. CPU_R3000A
  71172. CPU_R3041
  71173. CPU_R3051
  71174. CPU_R3052
  71175. CPU_R3081
  71176. CPU_R3081E
  71177. CPU_R31
  71178. CPU_R4
  71179. CPU_R4000MC
  71180. CPU_R4000PC
  71181. CPU_R4000SC
  71182. CPU_R4200
  71183. CPU_R4400MC
  71184. CPU_R4400PC
  71185. CPU_R4400SC
  71186. CPU_R4600
  71187. CPU_R4640
  71188. CPU_R4650
  71189. CPU_R4700
  71190. CPU_R5
  71191. CPU_R5000
  71192. CPU_R5500
  71193. CPU_R5_CORE
  71194. CPU_R6
  71195. CPU_R7
  71196. CPU_R8
  71197. CPU_R9
  71198. CPU_RD_BMON_MAX_OFFSET
  71199. CPU_RD_BMON_SECTION
  71200. CPU_REDUN_DONE0__CPU_REDUN_DONE_MASK
  71201. CPU_REDUN_DONE0__CPU_REDUN_DONE__SHIFT
  71202. CPU_REDUN_DONE1__CPU_REDUN_DONE_MASK
  71203. CPU_REDUN_DONE1__CPU_REDUN_DONE__SHIFT
  71204. CPU_RESCHED_A_IRQ
  71205. CPU_RESCHED_B_IRQ
  71206. CPU_RESET
  71207. CPU_RESETTABLE
  71208. CPU_RESETTABLE_SOON
  71209. CPU_RESET_ASSERT
  71210. CPU_RESET_CONFIG_REG
  71211. CPU_RESET_CORE0_DEASSERT
  71212. CPU_RESET_N
  71213. CPU_RESET_NON_SC
  71214. CPU_RESET_OFFSET
  71215. CPU_RESET_SC
  71216. CPU_RM7000
  71217. CPU_RMAP_DIST_INF
  71218. CPU_ROM_TABLE_MAX_OFFSET
  71219. CPU_ROM_TABLE_SECTION
  71220. CPU_RST
  71221. CPU_RX_PORT
  71222. CPU_SAMPLING_RATE
  71223. CPU_SAMUEL
  71224. CPU_SAMUEL2
  71225. CPU_SB1
  71226. CPU_SB1A
  71227. CPU_SENTINEL
  71228. CPU_SH4_202
  71229. CPU_SH4_501
  71230. CPU_SH5_101
  71231. CPU_SH5_103
  71232. CPU_SH7201
  71233. CPU_SH7203
  71234. CPU_SH7206
  71235. CPU_SH7263
  71236. CPU_SH7264
  71237. CPU_SH7269
  71238. CPU_SH7343
  71239. CPU_SH7366
  71240. CPU_SH7372
  71241. CPU_SH7619
  71242. CPU_SH7705
  71243. CPU_SH7706
  71244. CPU_SH7707
  71245. CPU_SH7708
  71246. CPU_SH7708R
  71247. CPU_SH7708S
  71248. CPU_SH7709
  71249. CPU_SH7709A
  71250. CPU_SH7710
  71251. CPU_SH7712
  71252. CPU_SH7720
  71253. CPU_SH7721
  71254. CPU_SH7722
  71255. CPU_SH7723
  71256. CPU_SH7724
  71257. CPU_SH7729
  71258. CPU_SH7734
  71259. CPU_SH7750
  71260. CPU_SH7750R
  71261. CPU_SH7750S
  71262. CPU_SH7751
  71263. CPU_SH7751R
  71264. CPU_SH7757
  71265. CPU_SH7760
  71266. CPU_SH7763
  71267. CPU_SH7770
  71268. CPU_SH7780
  71269. CPU_SH7781
  71270. CPU_SH7785
  71271. CPU_SH7786
  71272. CPU_SHX3
  71273. CPU_SH_NONE
  71274. CPU_SMT_DISABLED
  71275. CPU_SMT_ENABLED
  71276. CPU_SMT_FORCE_DISABLED
  71277. CPU_SMT_NOT_IMPLEMENTED
  71278. CPU_SMT_NOT_SUPPORTED
  71279. CPU_SOFT_RESET
  71280. CPU_SPACE
  71281. CPU_SPAD_UFLOW
  71282. CPU_SPAD_UFLOW_SET
  71283. CPU_SPEEDO_LSBIT
  71284. CPU_SPEEDO_MSBIT
  71285. CPU_SPEEDO_REDUND_LSBIT
  71286. CPU_SPEEDO_REDUND_MSBIT
  71287. CPU_SPEEDO_REDUND_OFFS
  71288. CPU_SR71000
  71289. CPU_STATE
  71290. CPU_STATE_CONFIGURED
  71291. CPU_STATE_INACTIVE
  71292. CPU_STATE_OFFLINE
  71293. CPU_STATE_ONLINE
  71294. CPU_STATE_STANDBY
  71295. CPU_STEPPING_MASK
  71296. CPU_STM_MAX_OFFSET
  71297. CPU_STM_SECTION
  71298. CPU_STRUCT_VERSION
  71299. CPU_STUCK_IN_KERNEL
  71300. CPU_STUCK_REASON_52_BIT_VA
  71301. CPU_STUCK_REASON_NO_GRAN
  71302. CPU_STUCK_REASON_SHIFT
  71303. CPU_SUBSET_MAXCPUS
  71304. CPU_SUSPEND_SIZE
  71305. CPU_SWITCH_CODE
  71306. CPU_SW_INT_BLK
  71307. CPU_SYSTICK
  71308. CPU_SYS_CLKCFG_CPU_FDIV_MASK
  71309. CPU_SYS_CLKCFG_CPU_FDIV_SHIFT
  71310. CPU_SYS_CLKCFG_CPU_FFRAC_MASK
  71311. CPU_SYS_CLKCFG_CPU_FFRAC_SHIFT
  71312. CPU_SYS_CLKCFG_OCP_RATIO_1
  71313. CPU_SYS_CLKCFG_OCP_RATIO_10
  71314. CPU_SYS_CLKCFG_OCP_RATIO_1_5
  71315. CPU_SYS_CLKCFG_OCP_RATIO_2
  71316. CPU_SYS_CLKCFG_OCP_RATIO_2_5
  71317. CPU_SYS_CLKCFG_OCP_RATIO_3
  71318. CPU_SYS_CLKCFG_OCP_RATIO_3_5
  71319. CPU_SYS_CLKCFG_OCP_RATIO_4
  71320. CPU_SYS_CLKCFG_OCP_RATIO_5
  71321. CPU_SYS_CLKCFG_OCP_RATIO_MASK
  71322. CPU_SYS_CLKCFG_OCP_RATIO_SHIFT
  71323. CPU_TEMP_HIST_SIZE
  71324. CPU_THERMAL_THRESHOLD
  71325. CPU_TIM
  71326. CPU_TIMEOUT
  71327. CPU_TIMESTAMP_MAX_OFFSET
  71328. CPU_TIMESTAMP_SECTION
  71329. CPU_TO_DMA
  71330. CPU_TO_F0_DRBL_MSG_BIT
  71331. CPU_TO_FDT16
  71332. CPU_TO_FDT32
  71333. CPU_TO_FDT64
  71334. CPU_TRACE
  71335. CPU_TSS_IST
  71336. CPU_TX3912
  71337. CPU_TX3922
  71338. CPU_TX3927
  71339. CPU_TX49XX
  71340. CPU_TX_PORT
  71341. CPU_TYPE
  71342. CPU_UNKNOWN
  71343. CPU_UP
  71344. CPU_UP_PREPARE
  71345. CPU_VECTOR
  71346. CPU_VECTOR_LIMIT
  71347. CPU_VER_mskCFGID
  71348. CPU_VER_mskCPUID
  71349. CPU_VER_mskREV
  71350. CPU_VER_offCFGID
  71351. CPU_VER_offCPUID
  71352. CPU_VER_offREV
  71353. CPU_VGACNTRL
  71354. CPU_VR4111
  71355. CPU_VR4121
  71356. CPU_VR4122
  71357. CPU_VR4131
  71358. CPU_VR4133
  71359. CPU_VR4181
  71360. CPU_VR4181A
  71361. CPU_VR41XX
  71362. CPU_WDOG
  71363. CPU_WDOG_CLEAR
  71364. CPU_WDOG_PC
  71365. CPU_WDOG_SAVED_STATE
  71366. CPU_WDOG_VECTOR
  71367. CPU_WIN0_BASE
  71368. CPU_WIN0_MASK
  71369. CPU_WIN0_MMAP
  71370. CPU_WIN1_BASE
  71371. CPU_WIN1_MASK
  71372. CPU_WIN1_MMAP
  71373. CPU_WIN2_BASE
  71374. CPU_WIN2_MASK
  71375. CPU_WIN2_MMAP
  71376. CPU_WIN3_BASE
  71377. CPU_WIN3_MASK
  71378. CPU_WIN3_MMAP
  71379. CPU_WRITEBACK_CTRL_REG
  71380. CPU_WRITEBACK_CTRL_REG_WB_THROTTLE_ENABLE
  71381. CPU_WRITEBACK_CTRL_REG_WB_THROTTLE_THRESHOLD_MASK
  71382. CPU_WRITEBACK_CTRL_REG_WB_THROTTLE_TIMEOUT_MASK
  71383. CPU_WRITEBACK_CTRL_REG_WB_THROTTLE_TIMEOUT_SHIFT
  71384. CPU_WR_BMON_MAX_OFFSET
  71385. CPU_WR_BMON_SECTION
  71386. CPU_WTBUSY
  71387. CPU_XBURST
  71388. CPU_XLP
  71389. CPU_XLR
  71390. CPU_XREG_OFFSET
  71391. CPUcheck_firmware_ready
  71392. CPUcheck_maincodeok_turnonCPU
  71393. CPV1_HE_ADDR
  71394. CPV1_HS_ADDR
  71395. CPV1_VE_ADDR
  71396. CPV1_VS_ADDR
  71397. CPV2_HE_ADDR
  71398. CPV2_HS_ADDR
  71399. CPV2_VE_ADDR
  71400. CPV2_VS_ADDR
  71401. CPWM
  71402. CPY_ABRT
  71403. CP_040
  71404. CP_2WHEEL_MOUSE_HACK
  71405. CP_2WHEEL_MOUSE_HACK_ON
  71406. CP_AHB_BUSY_STALL_ON_HRDY
  71407. CP_AHB_BUSY_STALL_ON_HRDY_PROFILE
  71408. CP_AHB_BUSY_WORKING
  71409. CP_AHB_IDLE
  71410. CP_AHB_NRTTRANS_WAIT
  71411. CP_AHB_PFPTRANS_WAIT
  71412. CP_AHB_RBBM_DWORD_SENT
  71413. CP_AHB_STALL_ON_GRANT_NO_SPLIT
  71414. CP_AHB_STALL_ON_GRANT_SPLIT
  71415. CP_AHB_STALL_ON_GRANT_SPLIT_PROFILE
  71416. CP_ALPHA_TAG_RAM_SEL
  71417. CP_ALWAYS_COUNT
  71418. CP_APPEND_ADDR_HI__CACHE_POLICY_MASK
  71419. CP_APPEND_ADDR_HI__CACHE_POLICY__SHIFT
  71420. CP_APPEND_ADDR_HI__COMMAND_MASK
  71421. CP_APPEND_ADDR_HI__COMMAND__SHIFT
  71422. CP_APPEND_ADDR_HI__CS_PS_SEL_MASK
  71423. CP_APPEND_ADDR_HI__CS_PS_SEL__SHIFT
  71424. CP_APPEND_ADDR_HI__MEM_ADDR_HI_MASK
  71425. CP_APPEND_ADDR_HI__MEM_ADDR_HI__SHIFT
  71426. CP_APPEND_ADDR_HI__MTYPE_MASK
  71427. CP_APPEND_ADDR_HI__MTYPE__SHIFT
  71428. CP_APPEND_ADDR_LO__MEM_ADDR_LO_MASK
  71429. CP_APPEND_ADDR_LO__MEM_ADDR_LO__SHIFT
  71430. CP_APPEND_CMD_ADDR_HI__ADDR_HI_MASK
  71431. CP_APPEND_CMD_ADDR_HI__ADDR_HI__SHIFT
  71432. CP_APPEND_CMD_ADDR_HI__RSVD_MASK
  71433. CP_APPEND_CMD_ADDR_HI__RSVD__SHIFT
  71434. CP_APPEND_CMD_ADDR_LO__ADDR_LO_MASK
  71435. CP_APPEND_CMD_ADDR_LO__ADDR_LO__SHIFT
  71436. CP_APPEND_CMD_ADDR_LO__RSVD_MASK
  71437. CP_APPEND_CMD_ADDR_LO__RSVD__SHIFT
  71438. CP_APPEND_DATA_HI__DATA_MASK
  71439. CP_APPEND_DATA_HI__DATA__SHIFT
  71440. CP_APPEND_DATA_LO__DATA_MASK
  71441. CP_APPEND_DATA_LO__DATA__SHIFT
  71442. CP_APPEND_DATA__DATA_MASK
  71443. CP_APPEND_DATA__DATA__SHIFT
  71444. CP_APPEND_DDID_CNT__DATA_MASK
  71445. CP_APPEND_DDID_CNT__DATA__SHIFT
  71446. CP_APPEND_LAST_CS_FENCE_HI__LAST_FENCE_MASK
  71447. CP_APPEND_LAST_CS_FENCE_HI__LAST_FENCE__SHIFT
  71448. CP_APPEND_LAST_CS_FENCE_LO__LAST_FENCE_MASK
  71449. CP_APPEND_LAST_CS_FENCE_LO__LAST_FENCE__SHIFT
  71450. CP_APPEND_LAST_CS_FENCE__LAST_FENCE_MASK
  71451. CP_APPEND_LAST_CS_FENCE__LAST_FENCE__SHIFT
  71452. CP_APPEND_LAST_PS_FENCE_HI__LAST_FENCE_MASK
  71453. CP_APPEND_LAST_PS_FENCE_HI__LAST_FENCE__SHIFT
  71454. CP_APPEND_LAST_PS_FENCE_LO__LAST_FENCE_MASK
  71455. CP_APPEND_LAST_PS_FENCE_LO__LAST_FENCE__SHIFT
  71456. CP_APPEND_LAST_PS_FENCE__LAST_FENCE_MASK
  71457. CP_APPEND_LAST_PS_FENCE__LAST_FENCE__SHIFT
  71458. CP_AQL_SMM_STATUS__AQL_QUEUE_SMM_MASK
  71459. CP_AQL_SMM_STATUS__AQL_QUEUE_SMM__SHIFT
  71460. CP_ATCL1_CNTL__XNACK_REDO_TIMER_CNT_MASK
  71461. CP_ATCL1_CNTL__XNACK_REDO_TIMER_CNT__SHIFT
  71462. CP_ATOMIC_PREOP_HI__ATOMIC_PREOP_HI_MASK
  71463. CP_ATOMIC_PREOP_HI__ATOMIC_PREOP_HI__SHIFT
  71464. CP_ATOMIC_PREOP_LO__ATOMIC_PREOP_LO_MASK
  71465. CP_ATOMIC_PREOP_LO__ATOMIC_PREOP_LO__SHIFT
  71466. CP_BLIT
  71467. CP_BLIT_0_OP
  71468. CP_BLIT_0_OP__MASK
  71469. CP_BLIT_0_OP__SHIFT
  71470. CP_BLIT_1_SRC_X1
  71471. CP_BLIT_1_SRC_X1__MASK
  71472. CP_BLIT_1_SRC_X1__SHIFT
  71473. CP_BLIT_1_SRC_Y1
  71474. CP_BLIT_1_SRC_Y1__MASK
  71475. CP_BLIT_1_SRC_Y1__SHIFT
  71476. CP_BLIT_2_SRC_X2
  71477. CP_BLIT_2_SRC_X2__MASK
  71478. CP_BLIT_2_SRC_X2__SHIFT
  71479. CP_BLIT_2_SRC_Y2
  71480. CP_BLIT_2_SRC_Y2__MASK
  71481. CP_BLIT_2_SRC_Y2__SHIFT
  71482. CP_BLIT_3_DST_X1
  71483. CP_BLIT_3_DST_X1__MASK
  71484. CP_BLIT_3_DST_X1__SHIFT
  71485. CP_BLIT_3_DST_Y1
  71486. CP_BLIT_3_DST_Y1__MASK
  71487. CP_BLIT_3_DST_Y1__SHIFT
  71488. CP_BLIT_4_DST_X2
  71489. CP_BLIT_4_DST_X2__MASK
  71490. CP_BLIT_4_DST_X2__SHIFT
  71491. CP_BLIT_4_DST_Y2
  71492. CP_BLIT_4_DST_Y2__MASK
  71493. CP_BLIT_4_DST_Y2__SHIFT
  71494. CP_BOOTSTRAP_UCODE
  71495. CP_BRA
  71496. CP_BRA_FLAG
  71497. CP_BRA_IF_CLEAR
  71498. CP_BRA_IP
  71499. CP_BRA_IP_SHIFT
  71500. CP_BUSY
  71501. CP_BUSY_STAT
  71502. CP_BUSY_STAT__CE_PARSING_PACKETS_MASK
  71503. CP_BUSY_STAT__CE_PARSING_PACKETS__SHIFT
  71504. CP_BUSY_STAT__COHER_CNT_NEQ_ZERO_MASK
  71505. CP_BUSY_STAT__COHER_CNT_NEQ_ZERO__SHIFT
  71506. CP_BUSY_STAT__EOP_DONE_BUSY_MASK
  71507. CP_BUSY_STAT__EOP_DONE_BUSY__SHIFT
  71508. CP_BUSY_STAT__GFX_CONTEXT_BUSY_MASK
  71509. CP_BUSY_STAT__GFX_CONTEXT_BUSY__SHIFT
  71510. CP_BUSY_STAT__ME_PARSER_BUSY_MASK
  71511. CP_BUSY_STAT__ME_PARSER_BUSY__SHIFT
  71512. CP_BUSY_STAT__ME_PARSING_PACKETS_MASK
  71513. CP_BUSY_STAT__ME_PARSING_PACKETS__SHIFT
  71514. CP_BUSY_STAT__PFP_PARSING_PACKETS_MASK
  71515. CP_BUSY_STAT__PFP_PARSING_PACKETS__SHIFT
  71516. CP_BUSY_STAT__PIPE_STATS_BUSY_MASK
  71517. CP_BUSY_STAT__PIPE_STATS_BUSY__SHIFT
  71518. CP_BUSY_STAT__RCIU_CE_BUSY_MASK
  71519. CP_BUSY_STAT__RCIU_CE_BUSY__SHIFT
  71520. CP_BUSY_STAT__RCIU_ME_BUSY_MASK
  71521. CP_BUSY_STAT__RCIU_ME_BUSY__SHIFT
  71522. CP_BUSY_STAT__RCIU_PFP_BUSY_MASK
  71523. CP_BUSY_STAT__RCIU_PFP_BUSY__SHIFT
  71524. CP_BUSY_STAT__REG_BUS_FIFO_BUSY_MASK
  71525. CP_BUSY_STAT__REG_BUS_FIFO_BUSY__SHIFT
  71526. CP_BUSY_STAT__SEM_CMDFIFO_NOT_EMPTY_MASK
  71527. CP_BUSY_STAT__SEM_CMDFIFO_NOT_EMPTY__SHIFT
  71528. CP_BUSY_STAT__SEM_FAILED_AND_HOLDING_MASK
  71529. CP_BUSY_STAT__SEM_FAILED_AND_HOLDING__SHIFT
  71530. CP_BUSY_STAT__SEM_POLLING_FOR_PASS_MASK
  71531. CP_BUSY_STAT__SEM_POLLING_FOR_PASS__SHIFT
  71532. CP_BUSY_STAT__STRM_OUT_BUSY_MASK
  71533. CP_BUSY_STAT__STRM_OUT_BUSY__SHIFT
  71534. CP_CEQ1_AVAIL__CEQ_CNT_IB1_MASK
  71535. CP_CEQ1_AVAIL__CEQ_CNT_IB1__SHIFT
  71536. CP_CEQ1_AVAIL__CEQ_CNT_RING_MASK
  71537. CP_CEQ1_AVAIL__CEQ_CNT_RING__SHIFT
  71538. CP_CEQ2_AVAIL__CEQ_CNT_DB_MASK
  71539. CP_CEQ2_AVAIL__CEQ_CNT_DB__SHIFT
  71540. CP_CEQ2_AVAIL__CEQ_CNT_IB2_MASK
  71541. CP_CEQ2_AVAIL__CEQ_CNT_IB2__SHIFT
  71542. CP_CE_COMPARE_COUNT__COMPARE_COUNT_MASK
  71543. CP_CE_COMPARE_COUNT__COMPARE_COUNT__SHIFT
  71544. CP_CE_COMPLETION_STATUS__STATUS_MASK
  71545. CP_CE_COMPLETION_STATUS__STATUS__SHIFT
  71546. CP_CE_COUNTER__CONST_ENGINE_COUNT_MASK
  71547. CP_CE_COUNTER__CONST_ENGINE_COUNT__SHIFT
  71548. CP_CE_CS_PARTITION_INDEX__CS1_INDEX_MASK
  71549. CP_CE_CS_PARTITION_INDEX__CS1_INDEX__SHIFT
  71550. CP_CE_DB_BASE_HI__DB_BASE_HI_MASK
  71551. CP_CE_DB_BASE_HI__DB_BASE_HI__SHIFT
  71552. CP_CE_DB_BASE_LO__DB_BASE_LO_MASK
  71553. CP_CE_DB_BASE_LO__DB_BASE_LO__SHIFT
  71554. CP_CE_DB_BUFSZ__DB_BUFSZ_MASK
  71555. CP_CE_DB_BUFSZ__DB_BUFSZ__SHIFT
  71556. CP_CE_DB_CMD_BUFSZ__DB_CMD_REQSZ_MASK
  71557. CP_CE_DB_CMD_BUFSZ__DB_CMD_REQSZ__SHIFT
  71558. CP_CE_DE_COUNT__DRAW_ENGINE_COUNT_MASK
  71559. CP_CE_DE_COUNT__DRAW_ENGINE_COUNT__SHIFT
  71560. CP_CE_DOORBELL_CONTROL__DOORBELL_BIF_DROP_MASK
  71561. CP_CE_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT
  71562. CP_CE_DOORBELL_CONTROL__DOORBELL_EN_MASK
  71563. CP_CE_DOORBELL_CONTROL__DOORBELL_EN__SHIFT
  71564. CP_CE_DOORBELL_CONTROL__DOORBELL_HIT_MASK
  71565. CP_CE_DOORBELL_CONTROL__DOORBELL_HIT__SHIFT
  71566. CP_CE_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK
  71567. CP_CE_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT
  71568. CP_CE_HALT
  71569. CP_CE_HEADER_DUMP__CE_HEADER_DUMP_MASK
  71570. CP_CE_HEADER_DUMP__CE_HEADER_DUMP__SHIFT
  71571. CP_CE_IB1_BASE_HI__IB1_BASE_HI_MASK
  71572. CP_CE_IB1_BASE_HI__IB1_BASE_HI__SHIFT
  71573. CP_CE_IB1_BASE_LO__IB1_BASE_LO_MASK
  71574. CP_CE_IB1_BASE_LO__IB1_BASE_LO__SHIFT
  71575. CP_CE_IB1_BUFSZ__IB1_BUFSZ_MASK
  71576. CP_CE_IB1_BUFSZ__IB1_BUFSZ__SHIFT
  71577. CP_CE_IB1_CMD_BUFSZ__IB1_CMD_REQSZ_MASK
  71578. CP_CE_IB1_CMD_BUFSZ__IB1_CMD_REQSZ__SHIFT
  71579. CP_CE_IB1_OFFSET__IB1_OFFSET_MASK
  71580. CP_CE_IB1_OFFSET__IB1_OFFSET__SHIFT
  71581. CP_CE_IB2_BASE_HI__IB2_BASE_HI_MASK
  71582. CP_CE_IB2_BASE_HI__IB2_BASE_HI__SHIFT
  71583. CP_CE_IB2_BASE_LO__IB2_BASE_LO_MASK
  71584. CP_CE_IB2_BASE_LO__IB2_BASE_LO__SHIFT
  71585. CP_CE_IB2_BUFSZ__IB2_BUFSZ_MASK
  71586. CP_CE_IB2_BUFSZ__IB2_BUFSZ__SHIFT
  71587. CP_CE_IB2_CMD_BUFSZ__IB2_CMD_REQSZ_MASK
  71588. CP_CE_IB2_CMD_BUFSZ__IB2_CMD_REQSZ__SHIFT
  71589. CP_CE_IB2_OFFSET__IB2_OFFSET_MASK
  71590. CP_CE_IB2_OFFSET__IB2_OFFSET__SHIFT
  71591. CP_CE_IC_BASE_CNTL__ADDRESS_CLAMP_MASK
  71592. CP_CE_IC_BASE_CNTL__ADDRESS_CLAMP__SHIFT
  71593. CP_CE_IC_BASE_CNTL__CACHE_POLICY_MASK
  71594. CP_CE_IC_BASE_CNTL__CACHE_POLICY__SHIFT
  71595. CP_CE_IC_BASE_CNTL__EXE_DISABLE_MASK
  71596. CP_CE_IC_BASE_CNTL__EXE_DISABLE__SHIFT
  71597. CP_CE_IC_BASE_CNTL__VMID_MASK
  71598. CP_CE_IC_BASE_CNTL__VMID__SHIFT
  71599. CP_CE_IC_BASE_HI__IC_BASE_HI_MASK
  71600. CP_CE_IC_BASE_HI__IC_BASE_HI__SHIFT
  71601. CP_CE_IC_BASE_LO__IC_BASE_LO_MASK
  71602. CP_CE_IC_BASE_LO__IC_BASE_LO__SHIFT
  71603. CP_CE_IC_OP_CNTL__ICACHE_PRIMED_MASK
  71604. CP_CE_IC_OP_CNTL__ICACHE_PRIMED__SHIFT
  71605. CP_CE_IC_OP_CNTL__INVALIDATE_CACHE_COMPLETE_MASK
  71606. CP_CE_IC_OP_CNTL__INVALIDATE_CACHE_COMPLETE__SHIFT
  71607. CP_CE_IC_OP_CNTL__INVALIDATE_CACHE_MASK
  71608. CP_CE_IC_OP_CNTL__INVALIDATE_CACHE__SHIFT
  71609. CP_CE_IC_OP_CNTL__PRIME_ICACHE_MASK
  71610. CP_CE_IC_OP_CNTL__PRIME_ICACHE__SHIFT
  71611. CP_CE_INIT_BASE_HI__INIT_BASE_HI_MASK
  71612. CP_CE_INIT_BASE_HI__INIT_BASE_HI__SHIFT
  71613. CP_CE_INIT_BASE_LO__INIT_BASE_LO_MASK
  71614. CP_CE_INIT_BASE_LO__INIT_BASE_LO__SHIFT
  71615. CP_CE_INIT_BUFSZ__INIT_BUFSZ_MASK
  71616. CP_CE_INIT_BUFSZ__INIT_BUFSZ__SHIFT
  71617. CP_CE_INIT_CMD_BUFSZ__INIT_CMD_REQSZ_MASK
  71618. CP_CE_INIT_CMD_BUFSZ__INIT_CMD_REQSZ__SHIFT
  71619. CP_CE_INSTR_PNTR__INSTR_PNTR_MASK
  71620. CP_CE_INSTR_PNTR__INSTR_PNTR__SHIFT
  71621. CP_CE_INTR_ROUTINE_START__IR_START_MASK
  71622. CP_CE_INTR_ROUTINE_START__IR_START__SHIFT
  71623. CP_CE_JT_STAT__JT_LOADED_MASK
  71624. CP_CE_JT_STAT__JT_LOADED__SHIFT
  71625. CP_CE_JT_STAT__WR_MASK_MASK
  71626. CP_CE_JT_STAT__WR_MASK__SHIFT
  71627. CP_CE_METADATA_BASE_ADDR_HI__ADDR_HI_MASK
  71628. CP_CE_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT
  71629. CP_CE_METADATA_BASE_ADDR__ADDR_LO_MASK
  71630. CP_CE_METADATA_BASE_ADDR__ADDR_LO__SHIFT
  71631. CP_CE_PRGRM_CNTR_START__IP_START_MASK
  71632. CP_CE_PRGRM_CNTR_START__IP_START__SHIFT
  71633. CP_CE_RB_OFFSET__RB_OFFSET_MASK
  71634. CP_CE_RB_OFFSET__RB_OFFSET__SHIFT
  71635. CP_CE_ROQ_DB_STAT__CEQ_RPTR_DB_MASK
  71636. CP_CE_ROQ_DB_STAT__CEQ_RPTR_DB__SHIFT
  71637. CP_CE_ROQ_DB_STAT__CEQ_WPTR_DB_MASK
  71638. CP_CE_ROQ_DB_STAT__CEQ_WPTR_DB__SHIFT
  71639. CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1_MASK
  71640. CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT
  71641. CP_CE_ROQ_IB1_STAT__CEQ_WPTR_INDIRECT1_MASK
  71642. CP_CE_ROQ_IB1_STAT__CEQ_WPTR_INDIRECT1__SHIFT
  71643. CP_CE_ROQ_IB2_STAT__CEQ_RPTR_INDIRECT2_MASK
  71644. CP_CE_ROQ_IB2_STAT__CEQ_RPTR_INDIRECT2__SHIFT
  71645. CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2_MASK
  71646. CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT
  71647. CP_CE_ROQ_RB_STAT__CEQ_RPTR_PRIMARY_MASK
  71648. CP_CE_ROQ_RB_STAT__CEQ_RPTR_PRIMARY__SHIFT
  71649. CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY_MASK
  71650. CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT
  71651. CP_CE_UCODE_ADDR
  71652. CP_CE_UCODE_ADDR__UCODE_ADDR_MASK
  71653. CP_CE_UCODE_ADDR__UCODE_ADDR__SHIFT
  71654. CP_CE_UCODE_DATA
  71655. CP_CE_UCODE_DATA__UCODE_DATA_MASK
  71656. CP_CE_UCODE_DATA__UCODE_DATA__SHIFT
  71657. CP_CHKSUM_OFFSET
  71658. CP_CMD_DATA__CMD_DATA_MASK
  71659. CP_CMD_DATA__CMD_DATA__SHIFT
  71660. CP_CMD_INDEX__CMD_INDEX_MASK
  71661. CP_CMD_INDEX__CMD_INDEX__SHIFT
  71662. CP_CMD_INDEX__CMD_ME_SEL_MASK
  71663. CP_CMD_INDEX__CMD_ME_SEL__SHIFT
  71664. CP_CMD_INDEX__CMD_QUEUE_SEL_MASK
  71665. CP_CMD_INDEX__CMD_QUEUE_SEL__SHIFT
  71666. CP_CNTX_STAT__ACTIVE_GFX_CONTEXTS_MASK
  71667. CP_CNTX_STAT__ACTIVE_GFX_CONTEXTS__SHIFT
  71668. CP_CNTX_STAT__ACTIVE_HP3D_CONTEXTS_MASK
  71669. CP_CNTX_STAT__ACTIVE_HP3D_CONTEXTS__SHIFT
  71670. CP_CNTX_STAT__CURRENT_GFX_CONTEXT_MASK
  71671. CP_CNTX_STAT__CURRENT_GFX_CONTEXT__SHIFT
  71672. CP_CNTX_STAT__CURRENT_HP3D_CONTEXT_MASK
  71673. CP_CNTX_STAT__CURRENT_HP3D_CONTEXT__SHIFT
  71674. CP_CODES
  71675. CP_CODE_REJ
  71676. CP_COHERENCY_BUSY
  71677. CP_COHER_BASE
  71678. CP_COHER_BASE_HI__COHER_BASE_HI_256B_MASK
  71679. CP_COHER_BASE_HI__COHER_BASE_HI_256B__SHIFT
  71680. CP_COHER_BASE__COHER_BASE_256B_MASK
  71681. CP_COHER_BASE__COHER_BASE_256B__SHIFT
  71682. CP_COHER_CNTL
  71683. CP_COHER_CNTL2
  71684. CP_COHER_CNTL__CB0_DEST_BASE_ENA_MASK
  71685. CP_COHER_CNTL__CB0_DEST_BASE_ENA__SHIFT
  71686. CP_COHER_CNTL__CB1_DEST_BASE_ENA_MASK
  71687. CP_COHER_CNTL__CB1_DEST_BASE_ENA__SHIFT
  71688. CP_COHER_CNTL__CB2_DEST_BASE_ENA_MASK
  71689. CP_COHER_CNTL__CB2_DEST_BASE_ENA__SHIFT
  71690. CP_COHER_CNTL__CB3_DEST_BASE_ENA_MASK
  71691. CP_COHER_CNTL__CB3_DEST_BASE_ENA__SHIFT
  71692. CP_COHER_CNTL__CB4_DEST_BASE_ENA_MASK
  71693. CP_COHER_CNTL__CB4_DEST_BASE_ENA__SHIFT
  71694. CP_COHER_CNTL__CB5_DEST_BASE_ENA_MASK
  71695. CP_COHER_CNTL__CB5_DEST_BASE_ENA__SHIFT
  71696. CP_COHER_CNTL__CB6_DEST_BASE_ENA_MASK
  71697. CP_COHER_CNTL__CB6_DEST_BASE_ENA__SHIFT
  71698. CP_COHER_CNTL__CB7_DEST_BASE_ENA_MASK
  71699. CP_COHER_CNTL__CB7_DEST_BASE_ENA__SHIFT
  71700. CP_COHER_CNTL__CB_ACTION_ENA_MASK
  71701. CP_COHER_CNTL__CB_ACTION_ENA__SHIFT
  71702. CP_COHER_CNTL__DB_ACTION_ENA_MASK
  71703. CP_COHER_CNTL__DB_ACTION_ENA__SHIFT
  71704. CP_COHER_CNTL__DB_DEST_BASE_ENA_MASK
  71705. CP_COHER_CNTL__DB_DEST_BASE_ENA__SHIFT
  71706. CP_COHER_CNTL__DEST_BASE_0_ENA_MASK
  71707. CP_COHER_CNTL__DEST_BASE_0_ENA__SHIFT
  71708. CP_COHER_CNTL__DEST_BASE_1_ENA_MASK
  71709. CP_COHER_CNTL__DEST_BASE_1_ENA__SHIFT
  71710. CP_COHER_CNTL__DEST_BASE_2_ENA_MASK
  71711. CP_COHER_CNTL__DEST_BASE_2_ENA__SHIFT
  71712. CP_COHER_CNTL__DEST_BASE_3_ENA_MASK
  71713. CP_COHER_CNTL__DEST_BASE_3_ENA__SHIFT
  71714. CP_COHER_CNTL__SH_ICACHE_ACTION_ENA_MASK
  71715. CP_COHER_CNTL__SH_ICACHE_ACTION_ENA__SHIFT
  71716. CP_COHER_CNTL__SH_KCACHE_ACTION_ENA_MASK
  71717. CP_COHER_CNTL__SH_KCACHE_ACTION_ENA__SHIFT
  71718. CP_COHER_CNTL__SH_KCACHE_VOL_ACTION_ENA_MASK
  71719. CP_COHER_CNTL__SH_KCACHE_VOL_ACTION_ENA__SHIFT
  71720. CP_COHER_CNTL__SH_KCACHE_WB_ACTION_ENA_MASK
  71721. CP_COHER_CNTL__SH_KCACHE_WB_ACTION_ENA__SHIFT
  71722. CP_COHER_CNTL__SH_SD_ACTION_ENA_MASK
  71723. CP_COHER_CNTL__SH_SD_ACTION_ENA__SHIFT
  71724. CP_COHER_CNTL__TCL1_ACTION_ENA_MASK
  71725. CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT
  71726. CP_COHER_CNTL__TCL1_VOL_ACTION_ENA_MASK
  71727. CP_COHER_CNTL__TCL1_VOL_ACTION_ENA__SHIFT
  71728. CP_COHER_CNTL__TC_ACTION_ENA_MASK
  71729. CP_COHER_CNTL__TC_ACTION_ENA__SHIFT
  71730. CP_COHER_CNTL__TC_INV_METADATA_ACTION_ENA_MASK
  71731. CP_COHER_CNTL__TC_INV_METADATA_ACTION_ENA__SHIFT
  71732. CP_COHER_CNTL__TC_NC_ACTION_ENA_MASK
  71733. CP_COHER_CNTL__TC_NC_ACTION_ENA__SHIFT
  71734. CP_COHER_CNTL__TC_SD_ACTION_ENA_MASK
  71735. CP_COHER_CNTL__TC_SD_ACTION_ENA__SHIFT
  71736. CP_COHER_CNTL__TC_VOL_ACTION_ENA_MASK
  71737. CP_COHER_CNTL__TC_VOL_ACTION_ENA__SHIFT
  71738. CP_COHER_CNTL__TC_WB_ACTION_ENA_MASK
  71739. CP_COHER_CNTL__TC_WB_ACTION_ENA__SHIFT
  71740. CP_COHER_CNTL__TC_WC_ACTION_ENA_MASK
  71741. CP_COHER_CNTL__TC_WC_ACTION_ENA__SHIFT
  71742. CP_COHER_SIZE
  71743. CP_COHER_SIZE_HI__COHER_SIZE_HI_256B_MASK
  71744. CP_COHER_SIZE_HI__COHER_SIZE_HI_256B__SHIFT
  71745. CP_COHER_SIZE__COHER_SIZE_256B_MASK
  71746. CP_COHER_SIZE__COHER_SIZE_256B__SHIFT
  71747. CP_COHER_START_DELAY__START_DELAY_COUNT_MASK
  71748. CP_COHER_START_DELAY__START_DELAY_COUNT__SHIFT
  71749. CP_COHER_STATUS__MATCHING_GFX_CNTX_MASK
  71750. CP_COHER_STATUS__MATCHING_GFX_CNTX__SHIFT
  71751. CP_COHER_STATUS__MEID_MASK
  71752. CP_COHER_STATUS__MEID__SHIFT
  71753. CP_COHER_STATUS__PHASE1_STATUS_MASK
  71754. CP_COHER_STATUS__PHASE1_STATUS__SHIFT
  71755. CP_COHER_STATUS__STATUS_MASK
  71756. CP_COHER_STATUS__STATUS__SHIFT
  71757. CP_COMM_EXEC__A
  71758. CP_COMPACT_SUM_FLAG
  71759. CP_COMPUTE_CHECKPOINT
  71760. CP_COMPUTE_CHECKPOINT_0_ADDR_0_LO
  71761. CP_COMPUTE_CHECKPOINT_0_ADDR_0_LO__MASK
  71762. CP_COMPUTE_CHECKPOINT_0_ADDR_0_LO__SHIFT
  71763. CP_COMPUTE_CHECKPOINT_1_ADDR_0_HI
  71764. CP_COMPUTE_CHECKPOINT_1_ADDR_0_HI__MASK
  71765. CP_COMPUTE_CHECKPOINT_1_ADDR_0_HI__SHIFT
  71766. CP_COMPUTE_CHECKPOINT_3_ADDR_1_LEN
  71767. CP_COMPUTE_CHECKPOINT_3_ADDR_1_LEN__MASK
  71768. CP_COMPUTE_CHECKPOINT_3_ADDR_1_LEN__SHIFT
  71769. CP_COMPUTE_CHECKPOINT_5_ADDR_1_LO
  71770. CP_COMPUTE_CHECKPOINT_5_ADDR_1_LO__MASK
  71771. CP_COMPUTE_CHECKPOINT_5_ADDR_1_LO__SHIFT
  71772. CP_COMPUTE_CHECKPOINT_6_ADDR_1_HI
  71773. CP_COMPUTE_CHECKPOINT_6_ADDR_1_HI__MASK
  71774. CP_COMPUTE_CHECKPOINT_6_ADDR_1_HI__SHIFT
  71775. CP_COND_EXEC
  71776. CP_COND_INDIRECT_BUFFER_PFD
  71777. CP_COND_INDIRECT_BUFFER_PFE
  71778. CP_COND_REG_EXEC
  71779. CP_COND_WRITE
  71780. CP_COND_WRITE5
  71781. CP_COND_WRITE5_0_FUNCTION
  71782. CP_COND_WRITE5_0_FUNCTION__MASK
  71783. CP_COND_WRITE5_0_FUNCTION__SHIFT
  71784. CP_COND_WRITE5_0_POLL_MEMORY
  71785. CP_COND_WRITE5_0_WRITE_MEMORY
  71786. CP_COND_WRITE5_1_POLL_ADDR_LO
  71787. CP_COND_WRITE5_1_POLL_ADDR_LO__MASK
  71788. CP_COND_WRITE5_1_POLL_ADDR_LO__SHIFT
  71789. CP_COND_WRITE5_2_POLL_ADDR_HI
  71790. CP_COND_WRITE5_2_POLL_ADDR_HI__MASK
  71791. CP_COND_WRITE5_2_POLL_ADDR_HI__SHIFT
  71792. CP_COND_WRITE5_3_REF
  71793. CP_COND_WRITE5_3_REF__MASK
  71794. CP_COND_WRITE5_3_REF__SHIFT
  71795. CP_COND_WRITE5_4_MASK
  71796. CP_COND_WRITE5_4_MASK__MASK
  71797. CP_COND_WRITE5_4_MASK__SHIFT
  71798. CP_COND_WRITE5_5_WRITE_ADDR_LO
  71799. CP_COND_WRITE5_5_WRITE_ADDR_LO__MASK
  71800. CP_COND_WRITE5_5_WRITE_ADDR_LO__SHIFT
  71801. CP_COND_WRITE5_6_WRITE_ADDR_HI
  71802. CP_COND_WRITE5_6_WRITE_ADDR_HI__MASK
  71803. CP_COND_WRITE5_6_WRITE_ADDR_HI__SHIFT
  71804. CP_COND_WRITE5_7_WRITE_DATA
  71805. CP_COND_WRITE5_7_WRITE_DATA__MASK
  71806. CP_COND_WRITE5_7_WRITE_DATA__SHIFT
  71807. CP_COND_WRITE_0_FUNCTION
  71808. CP_COND_WRITE_0_FUNCTION__MASK
  71809. CP_COND_WRITE_0_FUNCTION__SHIFT
  71810. CP_COND_WRITE_0_POLL_MEMORY
  71811. CP_COND_WRITE_0_WRITE_MEMORY
  71812. CP_COND_WRITE_1_POLL_ADDR
  71813. CP_COND_WRITE_1_POLL_ADDR__MASK
  71814. CP_COND_WRITE_1_POLL_ADDR__SHIFT
  71815. CP_COND_WRITE_2_REF
  71816. CP_COND_WRITE_2_REF__MASK
  71817. CP_COND_WRITE_2_REF__SHIFT
  71818. CP_COND_WRITE_3_MASK
  71819. CP_COND_WRITE_3_MASK__MASK
  71820. CP_COND_WRITE_3_MASK__SHIFT
  71821. CP_COND_WRITE_4_WRITE_ADDR
  71822. CP_COND_WRITE_4_WRITE_ADDR__MASK
  71823. CP_COND_WRITE_4_WRITE_ADDR__SHIFT
  71824. CP_COND_WRITE_5_WRITE_DATA
  71825. CP_COND_WRITE_5_WRITE_DATA__MASK
  71826. CP_COND_WRITE_5_WRITE_DATA__SHIFT
  71827. CP_CONFIG__CP_RDREQ_URG_MASK
  71828. CP_CONFIG__CP_RDREQ_URG__SHIFT
  71829. CP_CONFIG__CP_REQ_TRAN_MASK
  71830. CP_CONFIG__CP_REQ_TRAN__SHIFT
  71831. CP_CONF_ACK
  71832. CP_CONF_NAK
  71833. CP_CONF_REJ
  71834. CP_CONF_REQ
  71835. CP_CONTEXT_CNTL__ME0PIPE0_MAX_GE_CNTX_MASK
  71836. CP_CONTEXT_CNTL__ME0PIPE0_MAX_GE_CNTX__SHIFT
  71837. CP_CONTEXT_CNTL__ME0PIPE0_MAX_PIPE_CNTX_MASK
  71838. CP_CONTEXT_CNTL__ME0PIPE0_MAX_PIPE_CNTX__SHIFT
  71839. CP_CONTEXT_CNTL__ME0PIPE0_MAX_WD_CNTX_MASK
  71840. CP_CONTEXT_CNTL__ME0PIPE0_MAX_WD_CNTX__SHIFT
  71841. CP_CONTEXT_CNTL__ME0PIPE1_MAX_GE_CNTX_MASK
  71842. CP_CONTEXT_CNTL__ME0PIPE1_MAX_GE_CNTX__SHIFT
  71843. CP_CONTEXT_CNTL__ME0PIPE1_MAX_PIPE_CNTX_MASK
  71844. CP_CONTEXT_CNTL__ME0PIPE1_MAX_PIPE_CNTX__SHIFT
  71845. CP_CONTEXT_CNTL__ME0PIPE1_MAX_WD_CNTX_MASK
  71846. CP_CONTEXT_CNTL__ME0PIPE1_MAX_WD_CNTX__SHIFT
  71847. CP_CONTEXT_REG_BUNCH
  71848. CP_CONTEXT_SWITCH_YIELD
  71849. CP_CONTEXT_UPDATE
  71850. CP_CPC_BUSY_STAT
  71851. CP_CPC_BUSY_STAT2__MES_DMA_BUSY_MASK
  71852. CP_CPC_BUSY_STAT2__MES_DMA_BUSY__SHIFT
  71853. CP_CPC_BUSY_STAT2__MES_LOAD_BUSY_MASK
  71854. CP_CPC_BUSY_STAT2__MES_LOAD_BUSY__SHIFT
  71855. CP_CPC_BUSY_STAT2__MES_MESSAGE_BUSY_MASK
  71856. CP_CPC_BUSY_STAT2__MES_MESSAGE_BUSY__SHIFT
  71857. CP_CPC_BUSY_STAT2__MES_MUTEX_BUSY_MASK
  71858. CP_CPC_BUSY_STAT2__MES_MUTEX_BUSY__SHIFT
  71859. CP_CPC_BUSY_STAT2__MES_PIPE0_BUSY_MASK
  71860. CP_CPC_BUSY_STAT2__MES_PIPE0_BUSY__SHIFT
  71861. CP_CPC_BUSY_STAT2__MES_PIPE1_BUSY_MASK
  71862. CP_CPC_BUSY_STAT2__MES_PIPE1_BUSY__SHIFT
  71863. CP_CPC_BUSY_STAT2__MES_PIPE2_BUSY_MASK
  71864. CP_CPC_BUSY_STAT2__MES_PIPE2_BUSY__SHIFT
  71865. CP_CPC_BUSY_STAT2__MES_PIPE3_BUSY_MASK
  71866. CP_CPC_BUSY_STAT2__MES_PIPE3_BUSY__SHIFT
  71867. CP_CPC_BUSY_STAT2__MES_TC_BUSY_MASK
  71868. CP_CPC_BUSY_STAT2__MES_TC_BUSY__SHIFT
  71869. CP_CPC_BUSY_STAT__MEC1_DMA_BUSY_MASK
  71870. CP_CPC_BUSY_STAT__MEC1_DMA_BUSY__SHIFT
  71871. CP_CPC_BUSY_STAT__MEC1_EOP_QUEUE_BUSY_MASK
  71872. CP_CPC_BUSY_STAT__MEC1_EOP_QUEUE_BUSY__SHIFT
  71873. CP_CPC_BUSY_STAT__MEC1_IB_QUEUE_BUSY_MASK
  71874. CP_CPC_BUSY_STAT__MEC1_IB_QUEUE_BUSY__SHIFT
  71875. CP_CPC_BUSY_STAT__MEC1_IQ_QUEUE_BUSY_MASK
  71876. CP_CPC_BUSY_STAT__MEC1_IQ_QUEUE_BUSY__SHIFT
  71877. CP_CPC_BUSY_STAT__MEC1_LOAD_BUSY_MASK
  71878. CP_CPC_BUSY_STAT__MEC1_LOAD_BUSY__SHIFT
  71879. CP_CPC_BUSY_STAT__MEC1_MESSAGE_BUSY_MASK
  71880. CP_CPC_BUSY_STAT__MEC1_MESSAGE_BUSY__SHIFT
  71881. CP_CPC_BUSY_STAT__MEC1_MUTEX_BUSY_MASK
  71882. CP_CPC_BUSY_STAT__MEC1_MUTEX_BUSY__SHIFT
  71883. CP_CPC_BUSY_STAT__MEC1_PARTIAL_FLUSH_BUSY_MASK
  71884. CP_CPC_BUSY_STAT__MEC1_PARTIAL_FLUSH_BUSY__SHIFT
  71885. CP_CPC_BUSY_STAT__MEC1_PIPE0_BUSY_MASK
  71886. CP_CPC_BUSY_STAT__MEC1_PIPE0_BUSY__SHIFT
  71887. CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK
  71888. CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT
  71889. CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY_MASK
  71890. CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT
  71891. CP_CPC_BUSY_STAT__MEC1_PIPE3_BUSY_MASK
  71892. CP_CPC_BUSY_STAT__MEC1_PIPE3_BUSY__SHIFT
  71893. CP_CPC_BUSY_STAT__MEC1_SEMAPOHRE_BUSY_MASK
  71894. CP_CPC_BUSY_STAT__MEC1_SEMAPOHRE_BUSY__SHIFT
  71895. CP_CPC_BUSY_STAT__MEC1_TC_BUSY_MASK
  71896. CP_CPC_BUSY_STAT__MEC1_TC_BUSY__SHIFT
  71897. CP_CPC_BUSY_STAT__MEC2_DMA_BUSY_MASK
  71898. CP_CPC_BUSY_STAT__MEC2_DMA_BUSY__SHIFT
  71899. CP_CPC_BUSY_STAT__MEC2_EOP_QUEUE_BUSY_MASK
  71900. CP_CPC_BUSY_STAT__MEC2_EOP_QUEUE_BUSY__SHIFT
  71901. CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK
  71902. CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY__SHIFT
  71903. CP_CPC_BUSY_STAT__MEC2_IQ_QUEUE_BUSY_MASK
  71904. CP_CPC_BUSY_STAT__MEC2_IQ_QUEUE_BUSY__SHIFT
  71905. CP_CPC_BUSY_STAT__MEC2_LOAD_BUSY_MASK
  71906. CP_CPC_BUSY_STAT__MEC2_LOAD_BUSY__SHIFT
  71907. CP_CPC_BUSY_STAT__MEC2_MESSAGE_BUSY_MASK
  71908. CP_CPC_BUSY_STAT__MEC2_MESSAGE_BUSY__SHIFT
  71909. CP_CPC_BUSY_STAT__MEC2_MUTEX_BUSY_MASK
  71910. CP_CPC_BUSY_STAT__MEC2_MUTEX_BUSY__SHIFT
  71911. CP_CPC_BUSY_STAT__MEC2_PARTIAL_FLUSH_BUSY_MASK
  71912. CP_CPC_BUSY_STAT__MEC2_PARTIAL_FLUSH_BUSY__SHIFT
  71913. CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK
  71914. CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY__SHIFT
  71915. CP_CPC_BUSY_STAT__MEC2_PIPE1_BUSY_MASK
  71916. CP_CPC_BUSY_STAT__MEC2_PIPE1_BUSY__SHIFT
  71917. CP_CPC_BUSY_STAT__MEC2_PIPE2_BUSY_MASK
  71918. CP_CPC_BUSY_STAT__MEC2_PIPE2_BUSY__SHIFT
  71919. CP_CPC_BUSY_STAT__MEC2_PIPE3_BUSY_MASK
  71920. CP_CPC_BUSY_STAT__MEC2_PIPE3_BUSY__SHIFT
  71921. CP_CPC_BUSY_STAT__MEC2_SEMAPOHRE_BUSY_MASK
  71922. CP_CPC_BUSY_STAT__MEC2_SEMAPOHRE_BUSY__SHIFT
  71923. CP_CPC_BUSY_STAT__MEC2_TC_BUSY_MASK
  71924. CP_CPC_BUSY_STAT__MEC2_TC_BUSY__SHIFT
  71925. CP_CPC_GFX_CNTL__MEID_MASK
  71926. CP_CPC_GFX_CNTL__MEID__SHIFT
  71927. CP_CPC_GFX_CNTL__PIPEID_MASK
  71928. CP_CPC_GFX_CNTL__PIPEID__SHIFT
  71929. CP_CPC_GFX_CNTL__QUEUEID_MASK
  71930. CP_CPC_GFX_CNTL__QUEUEID__SHIFT
  71931. CP_CPC_GFX_CNTL__VALID_MASK
  71932. CP_CPC_GFX_CNTL__VALID__SHIFT
  71933. CP_CPC_GRBM_FREE_COUNT__FREE_COUNT_MASK
  71934. CP_CPC_GRBM_FREE_COUNT__FREE_COUNT__SHIFT
  71935. CP_CPC_HALT_HYST_COUNT__COUNT_MASK
  71936. CP_CPC_HALT_HYST_COUNT__COUNT__SHIFT
  71937. CP_CPC_IC_BASE_CNTL__ADDRESS_CLAMP_MASK
  71938. CP_CPC_IC_BASE_CNTL__ADDRESS_CLAMP__SHIFT
  71939. CP_CPC_IC_BASE_CNTL__ATC_MASK
  71940. CP_CPC_IC_BASE_CNTL__ATC__SHIFT
  71941. CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK
  71942. CP_CPC_IC_BASE_CNTL__CACHE_POLICY__SHIFT
  71943. CP_CPC_IC_BASE_CNTL__EXE_DISABLE_MASK
  71944. CP_CPC_IC_BASE_CNTL__EXE_DISABLE__SHIFT
  71945. CP_CPC_IC_BASE_CNTL__MTYPE_MASK
  71946. CP_CPC_IC_BASE_CNTL__MTYPE__SHIFT
  71947. CP_CPC_IC_BASE_CNTL__VMID_MASK
  71948. CP_CPC_IC_BASE_CNTL__VMID__SHIFT
  71949. CP_CPC_IC_BASE_HI__IC_BASE_HI_MASK
  71950. CP_CPC_IC_BASE_HI__IC_BASE_HI__SHIFT
  71951. CP_CPC_IC_BASE_LO__IC_BASE_LO_MASK
  71952. CP_CPC_IC_BASE_LO__IC_BASE_LO__SHIFT
  71953. CP_CPC_IC_OP_CNTL__ICACHE_PRIMED_MASK
  71954. CP_CPC_IC_OP_CNTL__ICACHE_PRIMED__SHIFT
  71955. CP_CPC_IC_OP_CNTL__INVALIDATE_CACHE_COMPLETE_MASK
  71956. CP_CPC_IC_OP_CNTL__INVALIDATE_CACHE_COMPLETE__SHIFT
  71957. CP_CPC_IC_OP_CNTL__INVALIDATE_CACHE_MASK
  71958. CP_CPC_IC_OP_CNTL__INVALIDATE_CACHE__SHIFT
  71959. CP_CPC_IC_OP_CNTL__PRIME_ICACHE_MASK
  71960. CP_CPC_IC_OP_CNTL__PRIME_ICACHE__SHIFT
  71961. CP_CPC_MC_CNTL__PACK_DELAY_CNT_MASK
  71962. CP_CPC_MC_CNTL__PACK_DELAY_CNT__SHIFT
  71963. CP_CPC_MGCG_SYNC_CNTL__COOLDOWN_PERIOD_MASK
  71964. CP_CPC_MGCG_SYNC_CNTL__COOLDOWN_PERIOD__SHIFT
  71965. CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD_MASK
  71966. CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT
  71967. CP_CPC_SCRATCH_DATA__SCRATCH_DATA_MASK
  71968. CP_CPC_SCRATCH_DATA__SCRATCH_DATA__SHIFT
  71969. CP_CPC_SCRATCH_INDEX__SCRATCH_INDEX_64BIT_MODE_MASK
  71970. CP_CPC_SCRATCH_INDEX__SCRATCH_INDEX_64BIT_MODE__SHIFT
  71971. CP_CPC_SCRATCH_INDEX__SCRATCH_INDEX_MASK
  71972. CP_CPC_SCRATCH_INDEX__SCRATCH_INDEX__SHIFT
  71973. CP_CPC_STALLED_STAT1
  71974. CP_CPC_STALLED_STAT1__ATCL1_WAITING_ON_TRANS_MASK
  71975. CP_CPC_STALLED_STAT1__ATCL1_WAITING_ON_TRANS__SHIFT
  71976. CP_CPC_STALLED_STAT1__ATCL2IU_WAITING_ON_FREE_MASK
  71977. CP_CPC_STALLED_STAT1__ATCL2IU_WAITING_ON_FREE__SHIFT
  71978. CP_CPC_STALLED_STAT1__ATCL2IU_WAITING_ON_TAGS_MASK
  71979. CP_CPC_STALLED_STAT1__ATCL2IU_WAITING_ON_TAGS__SHIFT
  71980. CP_CPC_STALLED_STAT1__GCRIU_WAITING_ON_FREE_MASK
  71981. CP_CPC_STALLED_STAT1__GCRIU_WAITING_ON_FREE__SHIFT
  71982. CP_CPC_STALLED_STAT1__MEC1_DECODING_PACKET_MASK
  71983. CP_CPC_STALLED_STAT1__MEC1_DECODING_PACKET__SHIFT
  71984. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_MC_READ_MASK
  71985. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_MC_READ__SHIFT
  71986. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_MC_WR_ACK_MASK
  71987. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_MC_WR_ACK__SHIFT
  71988. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_RCIU_MASK
  71989. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_RCIU_READ_MASK
  71990. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_RCIU_READ__SHIFT
  71991. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_RCIU__SHIFT
  71992. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_ROQ_DATA_MASK
  71993. CP_CPC_STALLED_STAT1__MEC1_WAIT_ON_ROQ_DATA__SHIFT
  71994. CP_CPC_STALLED_STAT1__MEC2_DECODING_PACKET_MASK
  71995. CP_CPC_STALLED_STAT1__MEC2_DECODING_PACKET__SHIFT
  71996. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_MC_READ_MASK
  71997. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_MC_READ__SHIFT
  71998. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_MC_WR_ACK_MASK
  71999. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_MC_WR_ACK__SHIFT
  72000. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_RCIU_MASK
  72001. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_RCIU_READ_MASK
  72002. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_RCIU_READ__SHIFT
  72003. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_RCIU__SHIFT
  72004. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_ROQ_DATA_MASK
  72005. CP_CPC_STALLED_STAT1__MEC2_WAIT_ON_ROQ_DATA__SHIFT
  72006. CP_CPC_STALLED_STAT1__MIU_RDREQ_FREE_STALL_MASK
  72007. CP_CPC_STALLED_STAT1__MIU_RDREQ_FREE_STALL__SHIFT
  72008. CP_CPC_STALLED_STAT1__MIU_WRREQ_FREE_STALL_MASK
  72009. CP_CPC_STALLED_STAT1__MIU_WRREQ_FREE_STALL__SHIFT
  72010. CP_CPC_STALLED_STAT1__RCIU_PRIV_VIOLATION_MASK
  72011. CP_CPC_STALLED_STAT1__RCIU_PRIV_VIOLATION__SHIFT
  72012. CP_CPC_STALLED_STAT1__RCIU_TX_FREE_STALL_MASK
  72013. CP_CPC_STALLED_STAT1__RCIU_TX_FREE_STALL__SHIFT
  72014. CP_CPC_STALLED_STAT1__TCIU_TX_FREE_STALL_MASK
  72015. CP_CPC_STALLED_STAT1__TCIU_TX_FREE_STALL__SHIFT
  72016. CP_CPC_STALLED_STAT1__UTCL1_WAITING_ON_TRANS_MASK
  72017. CP_CPC_STALLED_STAT1__UTCL1_WAITING_ON_TRANS__SHIFT
  72018. CP_CPC_STALLED_STAT1__UTCL2IU_WAITING_ON_FREE_MASK
  72019. CP_CPC_STALLED_STAT1__UTCL2IU_WAITING_ON_FREE__SHIFT
  72020. CP_CPC_STALLED_STAT1__UTCL2IU_WAITING_ON_TAGS_MASK
  72021. CP_CPC_STALLED_STAT1__UTCL2IU_WAITING_ON_TAGS__SHIFT
  72022. CP_CPC_STATUS
  72023. CP_CPC_STATUS__ATCL2IU_BUSY_MASK
  72024. CP_CPC_STATUS__ATCL2IU_BUSY__SHIFT
  72025. CP_CPC_STATUS__CPC_BUSY_MASK
  72026. CP_CPC_STATUS__CPC_BUSY__SHIFT
  72027. CP_CPC_STATUS__CPF_CPC_BUSY_MASK
  72028. CP_CPC_STATUS__CPF_CPC_BUSY__SHIFT
  72029. CP_CPC_STATUS__CPG_CPC_BUSY_MASK
  72030. CP_CPC_STATUS__CPG_CPC_BUSY__SHIFT
  72031. CP_CPC_STATUS__DC0_BUSY_MASK
  72032. CP_CPC_STATUS__DC0_BUSY__SHIFT
  72033. CP_CPC_STATUS__DC1_BUSY_MASK
  72034. CP_CPC_STATUS__DC1_BUSY__SHIFT
  72035. CP_CPC_STATUS__GCRIU_BUSY_MASK
  72036. CP_CPC_STATUS__GCRIU_BUSY__SHIFT
  72037. CP_CPC_STATUS__MEC1_BUSY_MASK
  72038. CP_CPC_STATUS__MEC1_BUSY__SHIFT
  72039. CP_CPC_STATUS__MEC2_BUSY_MASK
  72040. CP_CPC_STATUS__MEC2_BUSY__SHIFT
  72041. CP_CPC_STATUS__MES_BUSY_MASK
  72042. CP_CPC_STATUS__MES_BUSY__SHIFT
  72043. CP_CPC_STATUS__MES_INSTRUCTION_CACHE_BUSY_MASK
  72044. CP_CPC_STATUS__MES_INSTRUCTION_CACHE_BUSY__SHIFT
  72045. CP_CPC_STATUS__MES_SCRATCH_RAM_BUSY_MASK
  72046. CP_CPC_STATUS__MES_SCRATCH_RAM_BUSY__SHIFT
  72047. CP_CPC_STATUS__MIU_RDREQ_BUSY_MASK
  72048. CP_CPC_STATUS__MIU_RDREQ_BUSY__SHIFT
  72049. CP_CPC_STATUS__MIU_WRREQ_BUSY_MASK
  72050. CP_CPC_STATUS__MIU_WRREQ_BUSY__SHIFT
  72051. CP_CPC_STATUS__QU_BUSY_MASK
  72052. CP_CPC_STATUS__QU_BUSY__SHIFT
  72053. CP_CPC_STATUS__RCIU1_BUSY_MASK
  72054. CP_CPC_STATUS__RCIU1_BUSY__SHIFT
  72055. CP_CPC_STATUS__RCIU2_BUSY_MASK
  72056. CP_CPC_STATUS__RCIU2_BUSY__SHIFT
  72057. CP_CPC_STATUS__RCIU3_BUSY_MASK
  72058. CP_CPC_STATUS__RCIU3_BUSY__SHIFT
  72059. CP_CPC_STATUS__ROQ1_BUSY_MASK
  72060. CP_CPC_STATUS__ROQ1_BUSY__SHIFT
  72061. CP_CPC_STATUS__ROQ2_BUSY_MASK
  72062. CP_CPC_STATUS__ROQ2_BUSY__SHIFT
  72063. CP_CPC_STATUS__SAVE_RESTORE_BUSY_MASK
  72064. CP_CPC_STATUS__SAVE_RESTORE_BUSY__SHIFT
  72065. CP_CPC_STATUS__SCRATCH_RAM_BUSY_MASK
  72066. CP_CPC_STATUS__SCRATCH_RAM_BUSY__SHIFT
  72067. CP_CPC_STATUS__TCIU_BUSY_MASK
  72068. CP_CPC_STATUS__TCIU_BUSY__SHIFT
  72069. CP_CPC_STATUS__UTCL2IU_BUSY_MASK
  72070. CP_CPC_STATUS__UTCL2IU_BUSY__SHIFT
  72071. CP_CPF_BUSY_STAT
  72072. CP_CPF_BUSY_STAT2__MES_HQD_CONSUMED_RPTR_BUSY_MASK
  72073. CP_CPF_BUSY_STAT2__MES_HQD_CONSUMED_RPTR_BUSY__SHIFT
  72074. CP_CPF_BUSY_STAT2__MES_HQD_DISPATCH_BUSY_MASK
  72075. CP_CPF_BUSY_STAT2__MES_HQD_DISPATCH_BUSY__SHIFT
  72076. CP_CPF_BUSY_STAT2__MES_HQD_DMA_OFFLOAD_BUSY_MASK
  72077. CP_CPF_BUSY_STAT2__MES_HQD_DMA_OFFLOAD_BUSY__SHIFT
  72078. CP_CPF_BUSY_STAT2__MES_HQD_FETCHER_ARB_BUSY_MASK
  72079. CP_CPF_BUSY_STAT2__MES_HQD_FETCHER_ARB_BUSY__SHIFT
  72080. CP_CPF_BUSY_STAT2__MES_HQD_MESSAGE_BUSY_MASK
  72081. CP_CPF_BUSY_STAT2__MES_HQD_MESSAGE_BUSY__SHIFT
  72082. CP_CPF_BUSY_STAT2__MES_HQD_PQ_BUSY_MASK
  72083. CP_CPF_BUSY_STAT2__MES_HQD_PQ_BUSY__SHIFT
  72084. CP_CPF_BUSY_STAT2__MES_HQD_PQ_FETCHER_BUSY_MASK
  72085. CP_CPF_BUSY_STAT2__MES_HQD_PQ_FETCHER_BUSY__SHIFT
  72086. CP_CPF_BUSY_STAT2__MES_HQD_ROQ_ALIGN_BUSY_MASK
  72087. CP_CPF_BUSY_STAT2__MES_HQD_ROQ_ALIGN_BUSY__SHIFT
  72088. CP_CPF_BUSY_STAT2__MES_HQD_ROQ_PQ_BUSY_MASK
  72089. CP_CPF_BUSY_STAT2__MES_HQD_ROQ_PQ_BUSY__SHIFT
  72090. CP_CPF_BUSY_STAT__CSF_ARBITER_BUSY_MASK
  72091. CP_CPF_BUSY_STAT__CSF_ARBITER_BUSY__SHIFT
  72092. CP_CPF_BUSY_STAT__CSF_CE_DATA_BUSY_MASK
  72093. CP_CPF_BUSY_STAT__CSF_CE_DATA_BUSY__SHIFT
  72094. CP_CPF_BUSY_STAT__CSF_CE_INDR1_BUSY_MASK
  72095. CP_CPF_BUSY_STAT__CSF_CE_INDR1_BUSY__SHIFT
  72096. CP_CPF_BUSY_STAT__CSF_CE_INDR2_BUSY_MASK
  72097. CP_CPF_BUSY_STAT__CSF_CE_INDR2_BUSY__SHIFT
  72098. CP_CPF_BUSY_STAT__CSF_DATA_BUSY_MASK
  72099. CP_CPF_BUSY_STAT__CSF_DATA_BUSY__SHIFT
  72100. CP_CPF_BUSY_STAT__CSF_INDIRECT1_BUSY_MASK
  72101. CP_CPF_BUSY_STAT__CSF_INDIRECT1_BUSY__SHIFT
  72102. CP_CPF_BUSY_STAT__CSF_INDIRECT2_BUSY_MASK
  72103. CP_CPF_BUSY_STAT__CSF_INDIRECT2_BUSY__SHIFT
  72104. CP_CPF_BUSY_STAT__CSF_INPUT_BUSY_MASK
  72105. CP_CPF_BUSY_STAT__CSF_INPUT_BUSY__SHIFT
  72106. CP_CPF_BUSY_STAT__CSF_RING_BUSY_MASK
  72107. CP_CPF_BUSY_STAT__CSF_RING_BUSY__SHIFT
  72108. CP_CPF_BUSY_STAT__CSF_STATE_BUSY_MASK
  72109. CP_CPF_BUSY_STAT__CSF_STATE_BUSY__SHIFT
  72110. CP_CPF_BUSY_STAT__HPD_PROCESSING_EOP_BUSY_MASK
  72111. CP_CPF_BUSY_STAT__HPD_PROCESSING_EOP_BUSY__SHIFT
  72112. CP_CPF_BUSY_STAT__HQD_CONSUMED_RPTR_BUSY_MASK
  72113. CP_CPF_BUSY_STAT__HQD_CONSUMED_RPTR_BUSY__SHIFT
  72114. CP_CPF_BUSY_STAT__HQD_DISPATCH_BUSY_MASK
  72115. CP_CPF_BUSY_STAT__HQD_DISPATCH_BUSY__SHIFT
  72116. CP_CPF_BUSY_STAT__HQD_DMA_OFFLOAD_BUSY_MASK
  72117. CP_CPF_BUSY_STAT__HQD_DMA_OFFLOAD_BUSY__SHIFT
  72118. CP_CPF_BUSY_STAT__HQD_EOP_FETCHER_BUSY_MASK
  72119. CP_CPF_BUSY_STAT__HQD_EOP_FETCHER_BUSY__SHIFT
  72120. CP_CPF_BUSY_STAT__HQD_FETCHER_ARB_BUSY_MASK
  72121. CP_CPF_BUSY_STAT__HQD_FETCHER_ARB_BUSY__SHIFT
  72122. CP_CPF_BUSY_STAT__HQD_IB_BUSY_MASK
  72123. CP_CPF_BUSY_STAT__HQD_IB_BUSY__SHIFT
  72124. CP_CPF_BUSY_STAT__HQD_IB_FETCHER_BUSY_MASK
  72125. CP_CPF_BUSY_STAT__HQD_IB_FETCHER_BUSY__SHIFT
  72126. CP_CPF_BUSY_STAT__HQD_IQ_FETCHER_BUSY_MASK
  72127. CP_CPF_BUSY_STAT__HQD_IQ_FETCHER_BUSY__SHIFT
  72128. CP_CPF_BUSY_STAT__HQD_IQ_TIMER_BUSY_MASK
  72129. CP_CPF_BUSY_STAT__HQD_IQ_TIMER_BUSY__SHIFT
  72130. CP_CPF_BUSY_STAT__HQD_MESSAGE_BUSY_MASK
  72131. CP_CPF_BUSY_STAT__HQD_MESSAGE_BUSY__SHIFT
  72132. CP_CPF_BUSY_STAT__HQD_PQ_BUSY_MASK
  72133. CP_CPF_BUSY_STAT__HQD_PQ_BUSY__SHIFT
  72134. CP_CPF_BUSY_STAT__HQD_PQ_FETCHER_BUSY_MASK
  72135. CP_CPF_BUSY_STAT__HQD_PQ_FETCHER_BUSY__SHIFT
  72136. CP_CPF_BUSY_STAT__HQD_ROQ_ALIGN_BUSY_MASK
  72137. CP_CPF_BUSY_STAT__HQD_ROQ_ALIGN_BUSY__SHIFT
  72138. CP_CPF_BUSY_STAT__HQD_ROQ_EOP_BUSY_MASK
  72139. CP_CPF_BUSY_STAT__HQD_ROQ_EOP_BUSY__SHIFT
  72140. CP_CPF_BUSY_STAT__HQD_ROQ_IB_BUSY_MASK
  72141. CP_CPF_BUSY_STAT__HQD_ROQ_IB_BUSY__SHIFT
  72142. CP_CPF_BUSY_STAT__HQD_ROQ_IQ_BUSY_MASK
  72143. CP_CPF_BUSY_STAT__HQD_ROQ_IQ_BUSY__SHIFT
  72144. CP_CPF_BUSY_STAT__HQD_ROQ_PQ_BUSY_MASK
  72145. CP_CPF_BUSY_STAT__HQD_ROQ_PQ_BUSY__SHIFT
  72146. CP_CPF_BUSY_STAT__HQD_SIGNAL_SEMAPHORE_BUSY_MASK
  72147. CP_CPF_BUSY_STAT__HQD_SIGNAL_SEMAPHORE_BUSY__SHIFT
  72148. CP_CPF_BUSY_STAT__HQD_WAIT_SEMAPHORE_BUSY_MASK
  72149. CP_CPF_BUSY_STAT__HQD_WAIT_SEMAPHORE_BUSY__SHIFT
  72150. CP_CPF_BUSY_STAT__HQD_WPTR_POLL_BUSY_MASK
  72151. CP_CPF_BUSY_STAT__HQD_WPTR_POLL_BUSY__SHIFT
  72152. CP_CPF_BUSY_STAT__OUTSTANDING_READ_TAGS_MASK
  72153. CP_CPF_BUSY_STAT__OUTSTANDING_READ_TAGS__SHIFT
  72154. CP_CPF_BUSY_STAT__REG_BUS_FIFO_BUSY_MASK
  72155. CP_CPF_BUSY_STAT__REG_BUS_FIFO_BUSY__SHIFT
  72156. CP_CPF_DEBUG
  72157. CP_CPF_GRBM_FREE_COUNT__FREE_COUNT_MASK
  72158. CP_CPF_GRBM_FREE_COUNT__FREE_COUNT__SHIFT
  72159. CP_CPF_STALLED_STAT1
  72160. CP_CPF_STALLED_STAT1__ATCL1_WAITING_ON_TRANS_MASK
  72161. CP_CPF_STALLED_STAT1__ATCL1_WAITING_ON_TRANS__SHIFT
  72162. CP_CPF_STALLED_STAT1__ATCL2IU_WAITING_ON_FREE_MASK
  72163. CP_CPF_STALLED_STAT1__ATCL2IU_WAITING_ON_FREE__SHIFT
  72164. CP_CPF_STALLED_STAT1__ATCL2IU_WAITING_ON_TAGS_MASK
  72165. CP_CPF_STALLED_STAT1__ATCL2IU_WAITING_ON_TAGS__SHIFT
  72166. CP_CPF_STALLED_STAT1__CMP_UTCL1_WAITING_ON_TRANS_MASK
  72167. CP_CPF_STALLED_STAT1__CMP_UTCL1_WAITING_ON_TRANS__SHIFT
  72168. CP_CPF_STALLED_STAT1__DATA_FETCHING_DATA_MASK
  72169. CP_CPF_STALLED_STAT1__DATA_FETCHING_DATA__SHIFT
  72170. CP_CPF_STALLED_STAT1__GCRIU_WAIT_ON_FREE_MASK
  72171. CP_CPF_STALLED_STAT1__GCRIU_WAIT_ON_FREE__SHIFT
  72172. CP_CPF_STALLED_STAT1__GFX_UTCL1_WAITING_ON_TRANS_MASK
  72173. CP_CPF_STALLED_STAT1__GFX_UTCL1_WAITING_ON_TRANS__SHIFT
  72174. CP_CPF_STALLED_STAT1__INDR1_FETCHING_DATA_MASK
  72175. CP_CPF_STALLED_STAT1__INDR1_FETCHING_DATA__SHIFT
  72176. CP_CPF_STALLED_STAT1__INDR2_FETCHING_DATA_MASK
  72177. CP_CPF_STALLED_STAT1__INDR2_FETCHING_DATA__SHIFT
  72178. CP_CPF_STALLED_STAT1__MIU_WAITING_ON_RDREQ_FREE_MASK
  72179. CP_CPF_STALLED_STAT1__MIU_WAITING_ON_RDREQ_FREE__SHIFT
  72180. CP_CPF_STALLED_STAT1__RCIU_WAITING_ON_FREE_MASK
  72181. CP_CPF_STALLED_STAT1__RCIU_WAITING_ON_FREE__SHIFT
  72182. CP_CPF_STALLED_STAT1__RING_FETCHING_DATA_MASK
  72183. CP_CPF_STALLED_STAT1__RING_FETCHING_DATA__SHIFT
  72184. CP_CPF_STALLED_STAT1__STATE_FETCHING_DATA_MASK
  72185. CP_CPF_STALLED_STAT1__STATE_FETCHING_DATA__SHIFT
  72186. CP_CPF_STALLED_STAT1__TCIU_WAITING_ON_FREE_MASK
  72187. CP_CPF_STALLED_STAT1__TCIU_WAITING_ON_FREE__SHIFT
  72188. CP_CPF_STALLED_STAT1__TCIU_WAITING_ON_TAGS_MASK
  72189. CP_CPF_STALLED_STAT1__TCIU_WAITING_ON_TAGS__SHIFT
  72190. CP_CPF_STALLED_STAT1__UTCL2IU_WAITING_ON_FREE_MASK
  72191. CP_CPF_STALLED_STAT1__UTCL2IU_WAITING_ON_FREE__SHIFT
  72192. CP_CPF_STALLED_STAT1__UTCL2IU_WAITING_ON_TAGS_MASK
  72193. CP_CPF_STALLED_STAT1__UTCL2IU_WAITING_ON_TAGS__SHIFT
  72194. CP_CPF_STATUS
  72195. CP_CPF_STATUS__ATCL2IU_BUSY_MASK
  72196. CP_CPF_STATUS__ATCL2IU_BUSY__SHIFT
  72197. CP_CPF_STATUS__CPC_CPF_BUSY_MASK
  72198. CP_CPF_STATUS__CPC_CPF_BUSY__SHIFT
  72199. CP_CPF_STATUS__CPF_BUSY_MASK
  72200. CP_CPF_STATUS__CPF_BUSY__SHIFT
  72201. CP_CPF_STATUS__CPF_CMP_BUSY_MASK
  72202. CP_CPF_STATUS__CPF_CMP_BUSY__SHIFT
  72203. CP_CPF_STATUS__CPF_GFX_BUSY_MASK
  72204. CP_CPF_STATUS__CPF_GFX_BUSY__SHIFT
  72205. CP_CPF_STATUS__CSF_BUSY_MASK
  72206. CP_CPF_STATUS__CSF_BUSY__SHIFT
  72207. CP_CPF_STATUS__GCRIU_BUSY_MASK
  72208. CP_CPF_STATUS__GCRIU_BUSY__SHIFT
  72209. CP_CPF_STATUS__GRBM_CPF_STAT_BUSY_MASK
  72210. CP_CPF_STATUS__GRBM_CPF_STAT_BUSY__SHIFT
  72211. CP_CPF_STATUS__HQD_BUSY_MASK
  72212. CP_CPF_STATUS__HQD_BUSY__SHIFT
  72213. CP_CPF_STATUS__INTERRUPT_BUSY_MASK
  72214. CP_CPF_STATUS__INTERRUPT_BUSY__SHIFT
  72215. CP_CPF_STATUS__MES_HQD_BUSY_MASK
  72216. CP_CPF_STATUS__MES_HQD_BUSY__SHIFT
  72217. CP_CPF_STATUS__MIU_RDREQ_BUSY_MASK
  72218. CP_CPF_STATUS__MIU_RDREQ_BUSY__SHIFT
  72219. CP_CPF_STATUS__MIU_WRREQ_BUSY_MASK
  72220. CP_CPF_STATUS__MIU_WRREQ_BUSY__SHIFT
  72221. CP_CPF_STATUS__POST_WPTR_GFX_BUSY_MASK
  72222. CP_CPF_STATUS__POST_WPTR_GFX_BUSY__SHIFT
  72223. CP_CPF_STATUS__PRT_BUSY_MASK
  72224. CP_CPF_STATUS__PRT_BUSY__SHIFT
  72225. CP_CPF_STATUS__RCIU_BUSY_MASK
  72226. CP_CPF_STATUS__RCIU_BUSY__SHIFT
  72227. CP_CPF_STATUS__RCIU_CMP_BUSY_MASK
  72228. CP_CPF_STATUS__RCIU_CMP_BUSY__SHIFT
  72229. CP_CPF_STATUS__RCIU_GFX_BUSY_MASK
  72230. CP_CPF_STATUS__RCIU_GFX_BUSY__SHIFT
  72231. CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK
  72232. CP_CPF_STATUS__ROQ_ALIGN_BUSY__SHIFT
  72233. CP_CPF_STATUS__ROQ_CE_DATA_BUSY_MASK
  72234. CP_CPF_STATUS__ROQ_CE_DATA_BUSY__SHIFT
  72235. CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY_MASK
  72236. CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT
  72237. CP_CPF_STATUS__ROQ_CE_INDIRECT2_BUSY_MASK
  72238. CP_CPF_STATUS__ROQ_CE_INDIRECT2_BUSY__SHIFT
  72239. CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK
  72240. CP_CPF_STATUS__ROQ_CE_RING_BUSY__SHIFT
  72241. CP_CPF_STATUS__ROQ_DATA_BUSY_MASK
  72242. CP_CPF_STATUS__ROQ_DATA_BUSY__SHIFT
  72243. CP_CPF_STATUS__ROQ_INDIRECT1_BUSY_MASK
  72244. CP_CPF_STATUS__ROQ_INDIRECT1_BUSY__SHIFT
  72245. CP_CPF_STATUS__ROQ_INDIRECT2_BUSY_MASK
  72246. CP_CPF_STATUS__ROQ_INDIRECT2_BUSY__SHIFT
  72247. CP_CPF_STATUS__ROQ_RING_BUSY_MASK
  72248. CP_CPF_STATUS__ROQ_RING_BUSY__SHIFT
  72249. CP_CPF_STATUS__ROQ_STATE_BUSY_MASK
  72250. CP_CPF_STATUS__ROQ_STATE_BUSY__SHIFT
  72251. CP_CPF_STATUS__SEMAPHORE_BUSY_MASK
  72252. CP_CPF_STATUS__SEMAPHORE_BUSY__SHIFT
  72253. CP_CPF_STATUS__TCIU_BUSY_MASK
  72254. CP_CPF_STATUS__TCIU_BUSY__SHIFT
  72255. CP_CPF_STATUS__UTCL2IU_BUSY_MASK
  72256. CP_CPF_STATUS__UTCL2IU_BUSY__SHIFT
  72257. CP_CRC_RECOVERY_FLAG
  72258. CP_CSF_CNTL__FETCH_BUFFER_DEPTH_MASK
  72259. CP_CSF_CNTL__FETCH_BUFFER_DEPTH__SHIFT
  72260. CP_CSF_I1_FIFO_FULL
  72261. CP_CSF_I1_ROQ_FULL
  72262. CP_CSF_I1_SIZE_NEQ_ZERO
  72263. CP_CSF_I2_FIFO_FULL
  72264. CP_CSF_I2_ROQ_FULL
  72265. CP_CSF_I2_SIZE_NEQ_ZERO
  72266. CP_CSF_NRT_READ_WAIT
  72267. CP_CSF_RBI1I2_FETCHING
  72268. CP_CSF_RB_WPTR_NEQ_RPTR
  72269. CP_CSF_RING_ROQ_FULL
  72270. CP_CSF_STAT__BUFFER_REQUEST_COUNT_MASK
  72271. CP_CSF_STAT__BUFFER_REQUEST_COUNT__SHIFT
  72272. CP_CSF_STAT__BUFFER_SLOTS_ALLOCATED_MASK
  72273. CP_CSF_STAT__BUFFER_SLOTS_ALLOCATED__SHIFT
  72274. CP_CSF_ST_FIFO_FULL
  72275. CP_CSF_ST_ROQ_FULL
  72276. CP_CSQ2_STAT
  72277. CP_CSQ_ADDR
  72278. CP_CSQ_CNTL
  72279. CP_CSQ_DATA
  72280. CP_CSQ_MODE
  72281. CP_CSQ_STAT
  72282. CP_CTX
  72283. CP_CTX_COUNT
  72284. CP_CTX_COUNT_SHIFT
  72285. CP_CTX_REG
  72286. CP_CURRENT_12UA
  72287. CP_CURRENT_3UA
  72288. CP_CURRENT_4_5UA
  72289. CP_CURRENT_6UA
  72290. CP_CURRENT_7_5UA
  72291. CP_CURRENT_SEL
  72292. CP_DATA_MAGIC
  72293. CP_DB_BASE_HI__DB_BASE_HI_MASK
  72294. CP_DB_BASE_HI__DB_BASE_HI__SHIFT
  72295. CP_DB_BASE_LO__DB_BASE_LO_MASK
  72296. CP_DB_BASE_LO__DB_BASE_LO__SHIFT
  72297. CP_DB_BUFSZ__DB_BUFSZ_MASK
  72298. CP_DB_BUFSZ__DB_BUFSZ__SHIFT
  72299. CP_DB_CMD_BUFSZ__DB_CMD_REQSZ_MASK
  72300. CP_DB_CMD_BUFSZ__DB_CMD_REQSZ__SHIFT
  72301. CP_DDID_BASE_ADDR_HI__BASE_ADDR_HI_MASK
  72302. CP_DDID_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT
  72303. CP_DDID_BASE_ADDR_LO__BASE_ADDR_LO_MASK
  72304. CP_DDID_BASE_ADDR_LO__BASE_ADDR_LO__SHIFT
  72305. CP_DDID_CNTL_MODE
  72306. CP_DDID_CNTL_SIZE
  72307. CP_DDID_CNTL_VMID_SEL
  72308. CP_DDID_CNTL__ENABLE_MASK
  72309. CP_DDID_CNTL__ENABLE__SHIFT
  72310. CP_DDID_CNTL__MODE_MASK
  72311. CP_DDID_CNTL__MODE__SHIFT
  72312. CP_DDID_CNTL__POLICY_MASK
  72313. CP_DDID_CNTL__POLICY__SHIFT
  72314. CP_DDID_CNTL__SIZE_MASK
  72315. CP_DDID_CNTL__SIZE__SHIFT
  72316. CP_DDID_CNTL__THRESHOLD_MASK
  72317. CP_DDID_CNTL__THRESHOLD__SHIFT
  72318. CP_DDID_CNTL__VMID_MASK
  72319. CP_DDID_CNTL__VMID_SEL_MASK
  72320. CP_DDID_CNTL__VMID_SEL__SHIFT
  72321. CP_DDID_CNTL__VMID__SHIFT
  72322. CP_DEBUG
  72323. CP_DEF_MSG_ENABLE
  72324. CP_DESC_CNT
  72325. CP_DEVICE_ID
  72326. CP_DEVICE_ID__DEVICE_ID_MASK
  72327. CP_DEVICE_ID__DEVICE_ID__SHIFT
  72328. CP_DE_CE_COUNT__CONST_ENGINE_COUNT_MASK
  72329. CP_DE_CE_COUNT__CONST_ENGINE_COUNT__SHIFT
  72330. CP_DE_DE_COUNT__DRAW_ENGINE_COUNT_MASK
  72331. CP_DE_DE_COUNT__DRAW_ENGINE_COUNT__SHIFT
  72332. CP_DE_LAST_INVAL_COUNT__LAST_INVAL_COUNT_MASK
  72333. CP_DE_LAST_INVAL_COUNT__LAST_INVAL_COUNT__SHIFT
  72334. CP_DFY_ADDR_HI__ADDR_HI_MASK
  72335. CP_DFY_ADDR_HI__ADDR_HI__SHIFT
  72336. CP_DFY_ADDR_LO__ADDR_LO_MASK
  72337. CP_DFY_ADDR_LO__ADDR_LO__SHIFT
  72338. CP_DFY_CMD__OFFSET_MASK
  72339. CP_DFY_CMD__OFFSET__SHIFT
  72340. CP_DFY_CMD__SIZE_MASK
  72341. CP_DFY_CMD__SIZE__SHIFT
  72342. CP_DFY_CNTL__ATC_MASK
  72343. CP_DFY_CNTL__ATC__SHIFT
  72344. CP_DFY_CNTL__ENABLE_MASK
  72345. CP_DFY_CNTL__ENABLE__SHIFT
  72346. CP_DFY_CNTL__LFSR_RESET_MASK
  72347. CP_DFY_CNTL__LFSR_RESET__SHIFT
  72348. CP_DFY_CNTL__MODE_MASK
  72349. CP_DFY_CNTL__MODE__SHIFT
  72350. CP_DFY_CNTL__MTYPE_MASK
  72351. CP_DFY_CNTL__MTYPE__SHIFT
  72352. CP_DFY_CNTL__POLICY_MASK
  72353. CP_DFY_CNTL__POLICY__SHIFT
  72354. CP_DFY_CNTL__TPI_SDP_SEL_MASK
  72355. CP_DFY_CNTL__TPI_SDP_SEL__SHIFT
  72356. CP_DFY_CNTL__VOL_MASK
  72357. CP_DFY_CNTL__VOL__SHIFT
  72358. CP_DFY_DATA_0__DATA_MASK
  72359. CP_DFY_DATA_0__DATA__SHIFT
  72360. CP_DFY_DATA_10__DATA_MASK
  72361. CP_DFY_DATA_10__DATA__SHIFT
  72362. CP_DFY_DATA_11__DATA_MASK
  72363. CP_DFY_DATA_11__DATA__SHIFT
  72364. CP_DFY_DATA_12__DATA_MASK
  72365. CP_DFY_DATA_12__DATA__SHIFT
  72366. CP_DFY_DATA_13__DATA_MASK
  72367. CP_DFY_DATA_13__DATA__SHIFT
  72368. CP_DFY_DATA_14__DATA_MASK
  72369. CP_DFY_DATA_14__DATA__SHIFT
  72370. CP_DFY_DATA_15__DATA_MASK
  72371. CP_DFY_DATA_15__DATA__SHIFT
  72372. CP_DFY_DATA_1__DATA_MASK
  72373. CP_DFY_DATA_1__DATA__SHIFT
  72374. CP_DFY_DATA_2__DATA_MASK
  72375. CP_DFY_DATA_2__DATA__SHIFT
  72376. CP_DFY_DATA_3__DATA_MASK
  72377. CP_DFY_DATA_3__DATA__SHIFT
  72378. CP_DFY_DATA_4__DATA_MASK
  72379. CP_DFY_DATA_4__DATA__SHIFT
  72380. CP_DFY_DATA_5__DATA_MASK
  72381. CP_DFY_DATA_5__DATA__SHIFT
  72382. CP_DFY_DATA_6__DATA_MASK
  72383. CP_DFY_DATA_6__DATA__SHIFT
  72384. CP_DFY_DATA_7__DATA_MASK
  72385. CP_DFY_DATA_7__DATA__SHIFT
  72386. CP_DFY_DATA_8__DATA_MASK
  72387. CP_DFY_DATA_8__DATA__SHIFT
  72388. CP_DFY_DATA_9__DATA_MASK
  72389. CP_DFY_DATA_9__DATA__SHIFT
  72390. CP_DFY_STAT__BURST_COUNT_MASK
  72391. CP_DFY_STAT__BURST_COUNT__SHIFT
  72392. CP_DFY_STAT__BUSY_MASK
  72393. CP_DFY_STAT__BUSY__SHIFT
  72394. CP_DFY_STAT__TAGS_PENDING_MASK
  72395. CP_DFY_STAT__TAGS_PENDING__SHIFT
  72396. CP_DIR_MAGIC
  72397. CP_DISABLE1
  72398. CP_DISABLE2
  72399. CP_DISABLED_FLAG
  72400. CP_DISABLED_QUICK_FLAG
  72401. CP_DISCARD
  72402. CP_DISPATCH_COMPUTE_1_X
  72403. CP_DISPATCH_COMPUTE_1_X__MASK
  72404. CP_DISPATCH_COMPUTE_1_X__SHIFT
  72405. CP_DISPATCH_COMPUTE_2_Y
  72406. CP_DISPATCH_COMPUTE_2_Y__MASK
  72407. CP_DISPATCH_COMPUTE_2_Y__SHIFT
  72408. CP_DISPATCH_COMPUTE_3_Z
  72409. CP_DISPATCH_COMPUTE_3_Z__MASK
  72410. CP_DISPATCH_COMPUTE_3_Z__SHIFT
  72411. CP_DISPATCH_INDR_ADDR_HI__ADDR_HI_MASK
  72412. CP_DISPATCH_INDR_ADDR_HI__ADDR_HI__SHIFT
  72413. CP_DISPATCH_INDR_ADDR__ADDR_LO_MASK
  72414. CP_DISPATCH_INDR_ADDR__ADDR_LO__SHIFT
  72415. CP_DMA_CNTL__BUFFER_DEPTH_MASK
  72416. CP_DMA_CNTL__BUFFER_DEPTH__SHIFT
  72417. CP_DMA_CNTL__MIN_AVAILSZ_MASK
  72418. CP_DMA_CNTL__MIN_AVAILSZ__SHIFT
  72419. CP_DMA_CNTL__PIO_COUNT_MASK
  72420. CP_DMA_CNTL__PIO_COUNT__SHIFT
  72421. CP_DMA_CNTL__PIO_FIFO_EMPTY_MASK
  72422. CP_DMA_CNTL__PIO_FIFO_EMPTY__SHIFT
  72423. CP_DMA_CNTL__PIO_FIFO_FULL_MASK
  72424. CP_DMA_CNTL__PIO_FIFO_FULL__SHIFT
  72425. CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK
  72426. CP_DMA_CNTL__UTCL1_FAULT_CONTROL__SHIFT
  72427. CP_DMA_CNTL__WATCH_CONTROL_MASK
  72428. CP_DMA_CNTL__WATCH_CONTROL__SHIFT
  72429. CP_DMA_ME_CMD_ADDR_HI__ADDR_HI_MASK
  72430. CP_DMA_ME_CMD_ADDR_HI__ADDR_HI__SHIFT
  72431. CP_DMA_ME_CMD_ADDR_HI__RSVD_MASK
  72432. CP_DMA_ME_CMD_ADDR_HI__RSVD__SHIFT
  72433. CP_DMA_ME_CMD_ADDR_LO__ADDR_LO_MASK
  72434. CP_DMA_ME_CMD_ADDR_LO__ADDR_LO__SHIFT
  72435. CP_DMA_ME_CMD_ADDR_LO__RSVD_MASK
  72436. CP_DMA_ME_CMD_ADDR_LO__RSVD__SHIFT
  72437. CP_DMA_ME_COMMAND__BYTE_COUNT_MASK
  72438. CP_DMA_ME_COMMAND__BYTE_COUNT__SHIFT
  72439. CP_DMA_ME_COMMAND__DAIC_MASK
  72440. CP_DMA_ME_COMMAND__DAIC__SHIFT
  72441. CP_DMA_ME_COMMAND__DAS_MASK
  72442. CP_DMA_ME_COMMAND__DAS__SHIFT
  72443. CP_DMA_ME_COMMAND__DIS_WC_MASK
  72444. CP_DMA_ME_COMMAND__DIS_WC__SHIFT
  72445. CP_DMA_ME_COMMAND__DST_SWAP_MASK
  72446. CP_DMA_ME_COMMAND__DST_SWAP__SHIFT
  72447. CP_DMA_ME_COMMAND__RAW_WAIT_MASK
  72448. CP_DMA_ME_COMMAND__RAW_WAIT__SHIFT
  72449. CP_DMA_ME_COMMAND__SAIC_MASK
  72450. CP_DMA_ME_COMMAND__SAIC__SHIFT
  72451. CP_DMA_ME_COMMAND__SAS_MASK
  72452. CP_DMA_ME_COMMAND__SAS__SHIFT
  72453. CP_DMA_ME_COMMAND__SRC_SWAP_MASK
  72454. CP_DMA_ME_COMMAND__SRC_SWAP__SHIFT
  72455. CP_DMA_ME_CONTROL__DST_ATC_MASK
  72456. CP_DMA_ME_CONTROL__DST_ATC__SHIFT
  72457. CP_DMA_ME_CONTROL__DST_CACHE_POLICY_MASK
  72458. CP_DMA_ME_CONTROL__DST_CACHE_POLICY__SHIFT
  72459. CP_DMA_ME_CONTROL__DST_MTYPE_MASK
  72460. CP_DMA_ME_CONTROL__DST_MTYPE__SHIFT
  72461. CP_DMA_ME_CONTROL__DST_SELECT_MASK
  72462. CP_DMA_ME_CONTROL__DST_SELECT__SHIFT
  72463. CP_DMA_ME_CONTROL__DST_VOLATILE_MASK
  72464. CP_DMA_ME_CONTROL__DST_VOLATILE__SHIFT
  72465. CP_DMA_ME_CONTROL__DST_VOLATLE_MASK
  72466. CP_DMA_ME_CONTROL__DST_VOLATLE__SHIFT
  72467. CP_DMA_ME_CONTROL__MEMLOG_CLEAR_MASK
  72468. CP_DMA_ME_CONTROL__MEMLOG_CLEAR__SHIFT
  72469. CP_DMA_ME_CONTROL__SRC_ATC_MASK
  72470. CP_DMA_ME_CONTROL__SRC_ATC__SHIFT
  72471. CP_DMA_ME_CONTROL__SRC_CACHE_POLICY_MASK
  72472. CP_DMA_ME_CONTROL__SRC_CACHE_POLICY__SHIFT
  72473. CP_DMA_ME_CONTROL__SRC_MTYPE_MASK
  72474. CP_DMA_ME_CONTROL__SRC_MTYPE__SHIFT
  72475. CP_DMA_ME_CONTROL__SRC_SELECT_MASK
  72476. CP_DMA_ME_CONTROL__SRC_SELECT__SHIFT
  72477. CP_DMA_ME_CONTROL__SRC_VOLATILE_MASK
  72478. CP_DMA_ME_CONTROL__SRC_VOLATILE__SHIFT
  72479. CP_DMA_ME_CONTROL__SRC_VOLATLE_MASK
  72480. CP_DMA_ME_CONTROL__SRC_VOLATLE__SHIFT
  72481. CP_DMA_ME_DST_ADDR_HI__DST_ADDR_HI_MASK
  72482. CP_DMA_ME_DST_ADDR_HI__DST_ADDR_HI__SHIFT
  72483. CP_DMA_ME_DST_ADDR__DST_ADDR_MASK
  72484. CP_DMA_ME_DST_ADDR__DST_ADDR__SHIFT
  72485. CP_DMA_ME_SRC_ADDR_HI__SRC_ADDR_HI_MASK
  72486. CP_DMA_ME_SRC_ADDR_HI__SRC_ADDR_HI__SHIFT
  72487. CP_DMA_ME_SRC_ADDR__SRC_ADDR_MASK
  72488. CP_DMA_ME_SRC_ADDR__SRC_ADDR__SHIFT
  72489. CP_DMA_PFP_CMD_ADDR_HI__ADDR_HI_MASK
  72490. CP_DMA_PFP_CMD_ADDR_HI__ADDR_HI__SHIFT
  72491. CP_DMA_PFP_CMD_ADDR_HI__RSVD_MASK
  72492. CP_DMA_PFP_CMD_ADDR_HI__RSVD__SHIFT
  72493. CP_DMA_PFP_CMD_ADDR_LO__ADDR_LO_MASK
  72494. CP_DMA_PFP_CMD_ADDR_LO__ADDR_LO__SHIFT
  72495. CP_DMA_PFP_CMD_ADDR_LO__RSVD_MASK
  72496. CP_DMA_PFP_CMD_ADDR_LO__RSVD__SHIFT
  72497. CP_DMA_PFP_COMMAND__BYTE_COUNT_MASK
  72498. CP_DMA_PFP_COMMAND__BYTE_COUNT__SHIFT
  72499. CP_DMA_PFP_COMMAND__DAIC_MASK
  72500. CP_DMA_PFP_COMMAND__DAIC__SHIFT
  72501. CP_DMA_PFP_COMMAND__DAS_MASK
  72502. CP_DMA_PFP_COMMAND__DAS__SHIFT
  72503. CP_DMA_PFP_COMMAND__DIS_WC_MASK
  72504. CP_DMA_PFP_COMMAND__DIS_WC__SHIFT
  72505. CP_DMA_PFP_COMMAND__DST_SWAP_MASK
  72506. CP_DMA_PFP_COMMAND__DST_SWAP__SHIFT
  72507. CP_DMA_PFP_COMMAND__RAW_WAIT_MASK
  72508. CP_DMA_PFP_COMMAND__RAW_WAIT__SHIFT
  72509. CP_DMA_PFP_COMMAND__SAIC_MASK
  72510. CP_DMA_PFP_COMMAND__SAIC__SHIFT
  72511. CP_DMA_PFP_COMMAND__SAS_MASK
  72512. CP_DMA_PFP_COMMAND__SAS__SHIFT
  72513. CP_DMA_PFP_COMMAND__SRC_SWAP_MASK
  72514. CP_DMA_PFP_COMMAND__SRC_SWAP__SHIFT
  72515. CP_DMA_PFP_CONTROL__DST_ATC_MASK
  72516. CP_DMA_PFP_CONTROL__DST_ATC__SHIFT
  72517. CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK
  72518. CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT
  72519. CP_DMA_PFP_CONTROL__DST_MTYPE_MASK
  72520. CP_DMA_PFP_CONTROL__DST_MTYPE__SHIFT
  72521. CP_DMA_PFP_CONTROL__DST_SELECT_MASK
  72522. CP_DMA_PFP_CONTROL__DST_SELECT__SHIFT
  72523. CP_DMA_PFP_CONTROL__DST_VOLATILE_MASK
  72524. CP_DMA_PFP_CONTROL__DST_VOLATILE__SHIFT
  72525. CP_DMA_PFP_CONTROL__DST_VOLATLE_MASK
  72526. CP_DMA_PFP_CONTROL__DST_VOLATLE__SHIFT
  72527. CP_DMA_PFP_CONTROL__MEMLOG_CLEAR_MASK
  72528. CP_DMA_PFP_CONTROL__MEMLOG_CLEAR__SHIFT
  72529. CP_DMA_PFP_CONTROL__SRC_ATC_MASK
  72530. CP_DMA_PFP_CONTROL__SRC_ATC__SHIFT
  72531. CP_DMA_PFP_CONTROL__SRC_CACHE_POLICY_MASK
  72532. CP_DMA_PFP_CONTROL__SRC_CACHE_POLICY__SHIFT
  72533. CP_DMA_PFP_CONTROL__SRC_MTYPE_MASK
  72534. CP_DMA_PFP_CONTROL__SRC_MTYPE__SHIFT
  72535. CP_DMA_PFP_CONTROL__SRC_SELECT_MASK
  72536. CP_DMA_PFP_CONTROL__SRC_SELECT__SHIFT
  72537. CP_DMA_PFP_CONTROL__SRC_VOLATILE_MASK
  72538. CP_DMA_PFP_CONTROL__SRC_VOLATILE__SHIFT
  72539. CP_DMA_PFP_CONTROL__SRC_VOLATLE_MASK
  72540. CP_DMA_PFP_CONTROL__SRC_VOLATLE__SHIFT
  72541. CP_DMA_PFP_DST_ADDR_HI__DST_ADDR_HI_MASK
  72542. CP_DMA_PFP_DST_ADDR_HI__DST_ADDR_HI__SHIFT
  72543. CP_DMA_PFP_DST_ADDR__DST_ADDR_MASK
  72544. CP_DMA_PFP_DST_ADDR__DST_ADDR__SHIFT
  72545. CP_DMA_PFP_SRC_ADDR_HI__SRC_ADDR_HI_MASK
  72546. CP_DMA_PFP_SRC_ADDR_HI__SRC_ADDR_HI__SHIFT
  72547. CP_DMA_PFP_SRC_ADDR__SRC_ADDR_MASK
  72548. CP_DMA_PFP_SRC_ADDR__SRC_ADDR__SHIFT
  72549. CP_DMA_READ_TAGS__DMA_READ_TAG_MASK
  72550. CP_DMA_READ_TAGS__DMA_READ_TAG_VALID_MASK
  72551. CP_DMA_READ_TAGS__DMA_READ_TAG_VALID__SHIFT
  72552. CP_DMA_READ_TAGS__DMA_READ_TAG__SHIFT
  72553. CP_DMA_WATCH0_ADDR_HI__ADDR_HI_MASK
  72554. CP_DMA_WATCH0_ADDR_HI__ADDR_HI__SHIFT
  72555. CP_DMA_WATCH0_ADDR_HI__RSVD_MASK
  72556. CP_DMA_WATCH0_ADDR_HI__RSVD__SHIFT
  72557. CP_DMA_WATCH0_ADDR_LO__ADDR_LO_MASK
  72558. CP_DMA_WATCH0_ADDR_LO__ADDR_LO__SHIFT
  72559. CP_DMA_WATCH0_ADDR_LO__RSVD_MASK
  72560. CP_DMA_WATCH0_ADDR_LO__RSVD__SHIFT
  72561. CP_DMA_WATCH0_CNTL__ANY_VMID_MASK
  72562. CP_DMA_WATCH0_CNTL__ANY_VMID__SHIFT
  72563. CP_DMA_WATCH0_CNTL__RSVD1_MASK
  72564. CP_DMA_WATCH0_CNTL__RSVD1__SHIFT
  72565. CP_DMA_WATCH0_CNTL__RSVD2_MASK
  72566. CP_DMA_WATCH0_CNTL__RSVD2__SHIFT
  72567. CP_DMA_WATCH0_CNTL__VMID_MASK
  72568. CP_DMA_WATCH0_CNTL__VMID__SHIFT
  72569. CP_DMA_WATCH0_CNTL__WATCH_READS_MASK
  72570. CP_DMA_WATCH0_CNTL__WATCH_READS__SHIFT
  72571. CP_DMA_WATCH0_CNTL__WATCH_WRITES_MASK
  72572. CP_DMA_WATCH0_CNTL__WATCH_WRITES__SHIFT
  72573. CP_DMA_WATCH0_MASK__MASK_MASK
  72574. CP_DMA_WATCH0_MASK__MASK__SHIFT
  72575. CP_DMA_WATCH0_MASK__RSVD_MASK
  72576. CP_DMA_WATCH0_MASK__RSVD__SHIFT
  72577. CP_DMA_WATCH1_ADDR_HI__ADDR_HI_MASK
  72578. CP_DMA_WATCH1_ADDR_HI__ADDR_HI__SHIFT
  72579. CP_DMA_WATCH1_ADDR_HI__RSVD_MASK
  72580. CP_DMA_WATCH1_ADDR_HI__RSVD__SHIFT
  72581. CP_DMA_WATCH1_ADDR_LO__ADDR_LO_MASK
  72582. CP_DMA_WATCH1_ADDR_LO__ADDR_LO__SHIFT
  72583. CP_DMA_WATCH1_ADDR_LO__RSVD_MASK
  72584. CP_DMA_WATCH1_ADDR_LO__RSVD__SHIFT
  72585. CP_DMA_WATCH1_CNTL__ANY_VMID_MASK
  72586. CP_DMA_WATCH1_CNTL__ANY_VMID__SHIFT
  72587. CP_DMA_WATCH1_CNTL__RSVD1_MASK
  72588. CP_DMA_WATCH1_CNTL__RSVD1__SHIFT
  72589. CP_DMA_WATCH1_CNTL__RSVD2_MASK
  72590. CP_DMA_WATCH1_CNTL__RSVD2__SHIFT
  72591. CP_DMA_WATCH1_CNTL__VMID_MASK
  72592. CP_DMA_WATCH1_CNTL__VMID__SHIFT
  72593. CP_DMA_WATCH1_CNTL__WATCH_READS_MASK
  72594. CP_DMA_WATCH1_CNTL__WATCH_READS__SHIFT
  72595. CP_DMA_WATCH1_CNTL__WATCH_WRITES_MASK
  72596. CP_DMA_WATCH1_CNTL__WATCH_WRITES__SHIFT
  72597. CP_DMA_WATCH1_MASK__MASK_MASK
  72598. CP_DMA_WATCH1_MASK__MASK__SHIFT
  72599. CP_DMA_WATCH1_MASK__RSVD_MASK
  72600. CP_DMA_WATCH1_MASK__RSVD__SHIFT
  72601. CP_DMA_WATCH2_ADDR_HI__ADDR_HI_MASK
  72602. CP_DMA_WATCH2_ADDR_HI__ADDR_HI__SHIFT
  72603. CP_DMA_WATCH2_ADDR_HI__RSVD_MASK
  72604. CP_DMA_WATCH2_ADDR_HI__RSVD__SHIFT
  72605. CP_DMA_WATCH2_ADDR_LO__ADDR_LO_MASK
  72606. CP_DMA_WATCH2_ADDR_LO__ADDR_LO__SHIFT
  72607. CP_DMA_WATCH2_ADDR_LO__RSVD_MASK
  72608. CP_DMA_WATCH2_ADDR_LO__RSVD__SHIFT
  72609. CP_DMA_WATCH2_CNTL__ANY_VMID_MASK
  72610. CP_DMA_WATCH2_CNTL__ANY_VMID__SHIFT
  72611. CP_DMA_WATCH2_CNTL__RSVD1_MASK
  72612. CP_DMA_WATCH2_CNTL__RSVD1__SHIFT
  72613. CP_DMA_WATCH2_CNTL__RSVD2_MASK
  72614. CP_DMA_WATCH2_CNTL__RSVD2__SHIFT
  72615. CP_DMA_WATCH2_CNTL__VMID_MASK
  72616. CP_DMA_WATCH2_CNTL__VMID__SHIFT
  72617. CP_DMA_WATCH2_CNTL__WATCH_READS_MASK
  72618. CP_DMA_WATCH2_CNTL__WATCH_READS__SHIFT
  72619. CP_DMA_WATCH2_CNTL__WATCH_WRITES_MASK
  72620. CP_DMA_WATCH2_CNTL__WATCH_WRITES__SHIFT
  72621. CP_DMA_WATCH2_MASK__MASK_MASK
  72622. CP_DMA_WATCH2_MASK__MASK__SHIFT
  72623. CP_DMA_WATCH2_MASK__RSVD_MASK
  72624. CP_DMA_WATCH2_MASK__RSVD__SHIFT
  72625. CP_DMA_WATCH3_ADDR_HI__ADDR_HI_MASK
  72626. CP_DMA_WATCH3_ADDR_HI__ADDR_HI__SHIFT
  72627. CP_DMA_WATCH3_ADDR_HI__RSVD_MASK
  72628. CP_DMA_WATCH3_ADDR_HI__RSVD__SHIFT
  72629. CP_DMA_WATCH3_ADDR_LO__ADDR_LO_MASK
  72630. CP_DMA_WATCH3_ADDR_LO__ADDR_LO__SHIFT
  72631. CP_DMA_WATCH3_ADDR_LO__RSVD_MASK
  72632. CP_DMA_WATCH3_ADDR_LO__RSVD__SHIFT
  72633. CP_DMA_WATCH3_CNTL__ANY_VMID_MASK
  72634. CP_DMA_WATCH3_CNTL__ANY_VMID__SHIFT
  72635. CP_DMA_WATCH3_CNTL__RSVD1_MASK
  72636. CP_DMA_WATCH3_CNTL__RSVD1__SHIFT
  72637. CP_DMA_WATCH3_CNTL__RSVD2_MASK
  72638. CP_DMA_WATCH3_CNTL__RSVD2__SHIFT
  72639. CP_DMA_WATCH3_CNTL__VMID_MASK
  72640. CP_DMA_WATCH3_CNTL__VMID__SHIFT
  72641. CP_DMA_WATCH3_CNTL__WATCH_READS_MASK
  72642. CP_DMA_WATCH3_CNTL__WATCH_READS__SHIFT
  72643. CP_DMA_WATCH3_CNTL__WATCH_WRITES_MASK
  72644. CP_DMA_WATCH3_CNTL__WATCH_WRITES__SHIFT
  72645. CP_DMA_WATCH3_MASK__MASK_MASK
  72646. CP_DMA_WATCH3_MASK__MASK__SHIFT
  72647. CP_DMA_WATCH3_MASK__RSVD_MASK
  72648. CP_DMA_WATCH3_MASK__RSVD__SHIFT
  72649. CP_DMA_WATCH_STAT_ADDR_HI__ADDR_HI_MASK
  72650. CP_DMA_WATCH_STAT_ADDR_HI__ADDR_HI__SHIFT
  72651. CP_DMA_WATCH_STAT_ADDR_LO__ADDR_LO_MASK
  72652. CP_DMA_WATCH_STAT_ADDR_LO__ADDR_LO__SHIFT
  72653. CP_DMA_WATCH_STAT__CLIENT_ID_MASK
  72654. CP_DMA_WATCH_STAT__CLIENT_ID__SHIFT
  72655. CP_DMA_WATCH_STAT__PIPE_MASK
  72656. CP_DMA_WATCH_STAT__PIPE__SHIFT
  72657. CP_DMA_WATCH_STAT__RD_WR_MASK
  72658. CP_DMA_WATCH_STAT__RD_WR__SHIFT
  72659. CP_DMA_WATCH_STAT__TRAP_FLAG_MASK
  72660. CP_DMA_WATCH_STAT__TRAP_FLAG__SHIFT
  72661. CP_DMA_WATCH_STAT__VMID_MASK
  72662. CP_DMA_WATCH_STAT__VMID__SHIFT
  72663. CP_DMA_WATCH_STAT__WATCH_ID_MASK
  72664. CP_DMA_WATCH_STAT__WATCH_ID__SHIFT
  72665. CP_DRAW_AUTO
  72666. CP_DRAW_INDIRECT
  72667. CP_DRAW_INDX
  72668. CP_DRAW_INDX_0_VIZ_QUERY
  72669. CP_DRAW_INDX_0_VIZ_QUERY__MASK
  72670. CP_DRAW_INDX_0_VIZ_QUERY__SHIFT
  72671. CP_DRAW_INDX_1_INDEX_SIZE
  72672. CP_DRAW_INDX_1_INDEX_SIZE__MASK
  72673. CP_DRAW_INDX_1_INDEX_SIZE__SHIFT
  72674. CP_DRAW_INDX_1_NOT_EOP
  72675. CP_DRAW_INDX_1_NUM_INSTANCES
  72676. CP_DRAW_INDX_1_NUM_INSTANCES__MASK
  72677. CP_DRAW_INDX_1_NUM_INSTANCES__SHIFT
  72678. CP_DRAW_INDX_1_PRE_DRAW_INITIATOR_ENABLE
  72679. CP_DRAW_INDX_1_PRIM_TYPE
  72680. CP_DRAW_INDX_1_PRIM_TYPE__MASK
  72681. CP_DRAW_INDX_1_PRIM_TYPE__SHIFT
  72682. CP_DRAW_INDX_1_SMALL_INDEX
  72683. CP_DRAW_INDX_1_SOURCE_SELECT
  72684. CP_DRAW_INDX_1_SOURCE_SELECT__MASK
  72685. CP_DRAW_INDX_1_SOURCE_SELECT__SHIFT
  72686. CP_DRAW_INDX_1_VIS_CULL
  72687. CP_DRAW_INDX_1_VIS_CULL__MASK
  72688. CP_DRAW_INDX_1_VIS_CULL__SHIFT
  72689. CP_DRAW_INDX_2
  72690. CP_DRAW_INDX_2_0_VIZ_QUERY
  72691. CP_DRAW_INDX_2_0_VIZ_QUERY__MASK
  72692. CP_DRAW_INDX_2_0_VIZ_QUERY__SHIFT
  72693. CP_DRAW_INDX_2_1_INDEX_SIZE
  72694. CP_DRAW_INDX_2_1_INDEX_SIZE__MASK
  72695. CP_DRAW_INDX_2_1_INDEX_SIZE__SHIFT
  72696. CP_DRAW_INDX_2_1_NOT_EOP
  72697. CP_DRAW_INDX_2_1_NUM_INSTANCES
  72698. CP_DRAW_INDX_2_1_NUM_INSTANCES__MASK
  72699. CP_DRAW_INDX_2_1_NUM_INSTANCES__SHIFT
  72700. CP_DRAW_INDX_2_1_PRE_DRAW_INITIATOR_ENABLE
  72701. CP_DRAW_INDX_2_1_PRIM_TYPE
  72702. CP_DRAW_INDX_2_1_PRIM_TYPE__MASK
  72703. CP_DRAW_INDX_2_1_PRIM_TYPE__SHIFT
  72704. CP_DRAW_INDX_2_1_SMALL_INDEX
  72705. CP_DRAW_INDX_2_1_SOURCE_SELECT
  72706. CP_DRAW_INDX_2_1_SOURCE_SELECT__MASK
  72707. CP_DRAW_INDX_2_1_SOURCE_SELECT__SHIFT
  72708. CP_DRAW_INDX_2_1_VIS_CULL
  72709. CP_DRAW_INDX_2_1_VIS_CULL__MASK
  72710. CP_DRAW_INDX_2_1_VIS_CULL__SHIFT
  72711. CP_DRAW_INDX_2_2_NUM_INDICES
  72712. CP_DRAW_INDX_2_2_NUM_INDICES__MASK
  72713. CP_DRAW_INDX_2_2_NUM_INDICES__SHIFT
  72714. CP_DRAW_INDX_2_BIN
  72715. CP_DRAW_INDX_2_NUM_INDICES
  72716. CP_DRAW_INDX_2_NUM_INDICES__MASK
  72717. CP_DRAW_INDX_2_NUM_INDICES__SHIFT
  72718. CP_DRAW_INDX_3_INDX_BASE
  72719. CP_DRAW_INDX_3_INDX_BASE__MASK
  72720. CP_DRAW_INDX_3_INDX_BASE__SHIFT
  72721. CP_DRAW_INDX_4_INDX_SIZE
  72722. CP_DRAW_INDX_4_INDX_SIZE__MASK
  72723. CP_DRAW_INDX_4_INDX_SIZE__SHIFT
  72724. CP_DRAW_INDX_BIN
  72725. CP_DRAW_INDX_INDIRECT
  72726. CP_DRAW_INDX_INDR_ADDR_HI__ADDR_HI_MASK
  72727. CP_DRAW_INDX_INDR_ADDR_HI__ADDR_HI__SHIFT
  72728. CP_DRAW_INDX_INDR_ADDR__ADDR_LO_MASK
  72729. CP_DRAW_INDX_INDR_ADDR__ADDR_LO__SHIFT
  72730. CP_DRAW_INDX_OFFSET
  72731. CP_DRAW_INDX_OFFSET_0_INDEX_SIZE
  72732. CP_DRAW_INDX_OFFSET_0_INDEX_SIZE__MASK
  72733. CP_DRAW_INDX_OFFSET_0_INDEX_SIZE__SHIFT
  72734. CP_DRAW_INDX_OFFSET_0_PRIM_TYPE
  72735. CP_DRAW_INDX_OFFSET_0_PRIM_TYPE__MASK
  72736. CP_DRAW_INDX_OFFSET_0_PRIM_TYPE__SHIFT
  72737. CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT
  72738. CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT__MASK
  72739. CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT__SHIFT
  72740. CP_DRAW_INDX_OFFSET_0_TESS_MODE
  72741. CP_DRAW_INDX_OFFSET_0_TESS_MODE__MASK
  72742. CP_DRAW_INDX_OFFSET_0_TESS_MODE__SHIFT
  72743. CP_DRAW_INDX_OFFSET_0_VIS_CULL
  72744. CP_DRAW_INDX_OFFSET_0_VIS_CULL__MASK
  72745. CP_DRAW_INDX_OFFSET_0_VIS_CULL__SHIFT
  72746. CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES
  72747. CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES__MASK
  72748. CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES__SHIFT
  72749. CP_DRAW_INDX_OFFSET_2_NUM_INDICES
  72750. CP_DRAW_INDX_OFFSET_2_NUM_INDICES__MASK
  72751. CP_DRAW_INDX_OFFSET_2_NUM_INDICES__SHIFT
  72752. CP_DRAW_INDX_OFFSET_4_INDX_BASE
  72753. CP_DRAW_INDX_OFFSET_4_INDX_BASE__MASK
  72754. CP_DRAW_INDX_OFFSET_4_INDX_BASE__SHIFT
  72755. CP_DRAW_INDX_OFFSET_5_INDX_SIZE
  72756. CP_DRAW_INDX_OFFSET_5_INDX_SIZE__MASK
  72757. CP_DRAW_INDX_OFFSET_5_INDX_SIZE__SHIFT
  72758. CP_DRAW_OBJECT_COUNTER__COUNT_MASK
  72759. CP_DRAW_OBJECT_COUNTER__COUNT__SHIFT
  72760. CP_DRAW_OBJECT__OBJECT_MASK
  72761. CP_DRAW_OBJECT__OBJECT__SHIFT
  72762. CP_DRAW_WINDOW_CNTL__DISABLE_DRAW_WINDOW_HI_MASK
  72763. CP_DRAW_WINDOW_CNTL__DISABLE_DRAW_WINDOW_HI__SHIFT
  72764. CP_DRAW_WINDOW_CNTL__DISABLE_DRAW_WINDOW_LO_MAX_MASK
  72765. CP_DRAW_WINDOW_CNTL__DISABLE_DRAW_WINDOW_LO_MAX__SHIFT
  72766. CP_DRAW_WINDOW_CNTL__DISABLE_DRAW_WINDOW_LO_MIN_MASK
  72767. CP_DRAW_WINDOW_CNTL__DISABLE_DRAW_WINDOW_LO_MIN__SHIFT
  72768. CP_DRAW_WINDOW_CNTL__MODE_MASK
  72769. CP_DRAW_WINDOW_CNTL__MODE__SHIFT
  72770. CP_DRAW_WINDOW_HI__WINDOW_HI_MASK
  72771. CP_DRAW_WINDOW_HI__WINDOW_HI__SHIFT
  72772. CP_DRAW_WINDOW_LO__MAX_MASK
  72773. CP_DRAW_WINDOW_LO__MAX__SHIFT
  72774. CP_DRAW_WINDOW_LO__MIN_MASK
  72775. CP_DRAW_WINDOW_LO__MIN__SHIFT
  72776. CP_DRAW_WINDOW_MASK_HI__WINDOW_MASK_HI_MASK
  72777. CP_DRAW_WINDOW_MASK_HI__WINDOW_MASK_HI__SHIFT
  72778. CP_ECC_FIRSTOCCURRENCE_RING0__INTERFACE_MASK
  72779. CP_ECC_FIRSTOCCURRENCE_RING0__INTERFACE__SHIFT
  72780. CP_ECC_FIRSTOCCURRENCE_RING0__OBSOLETE_MASK
  72781. CP_ECC_FIRSTOCCURRENCE_RING0__OBSOLETE__SHIFT
  72782. CP_ECC_FIRSTOCCURRENCE_RING0__REQUEST_CLIENT_MASK
  72783. CP_ECC_FIRSTOCCURRENCE_RING0__REQUEST_CLIENT__SHIFT
  72784. CP_ECC_FIRSTOCCURRENCE_RING0__RING_ID_MASK
  72785. CP_ECC_FIRSTOCCURRENCE_RING0__RING_ID__SHIFT
  72786. CP_ECC_FIRSTOCCURRENCE_RING0__VMID_MASK
  72787. CP_ECC_FIRSTOCCURRENCE_RING0__VMID__SHIFT
  72788. CP_ECC_FIRSTOCCURRENCE_RING1__INTERFACE_MASK
  72789. CP_ECC_FIRSTOCCURRENCE_RING1__INTERFACE__SHIFT
  72790. CP_ECC_FIRSTOCCURRENCE_RING1__OBSOLETE_MASK
  72791. CP_ECC_FIRSTOCCURRENCE_RING1__OBSOLETE__SHIFT
  72792. CP_ECC_FIRSTOCCURRENCE_RING1__REQUEST_CLIENT_MASK
  72793. CP_ECC_FIRSTOCCURRENCE_RING1__REQUEST_CLIENT__SHIFT
  72794. CP_ECC_FIRSTOCCURRENCE_RING1__RING_ID_MASK
  72795. CP_ECC_FIRSTOCCURRENCE_RING1__RING_ID__SHIFT
  72796. CP_ECC_FIRSTOCCURRENCE_RING1__VMID_MASK
  72797. CP_ECC_FIRSTOCCURRENCE_RING1__VMID__SHIFT
  72798. CP_ECC_FIRSTOCCURRENCE_RING2__INTERFACE_MASK
  72799. CP_ECC_FIRSTOCCURRENCE_RING2__INTERFACE__SHIFT
  72800. CP_ECC_FIRSTOCCURRENCE_RING2__OBSOLETE_MASK
  72801. CP_ECC_FIRSTOCCURRENCE_RING2__OBSOLETE__SHIFT
  72802. CP_ECC_FIRSTOCCURRENCE_RING2__REQUEST_CLIENT_MASK
  72803. CP_ECC_FIRSTOCCURRENCE_RING2__REQUEST_CLIENT__SHIFT
  72804. CP_ECC_FIRSTOCCURRENCE_RING2__RING_ID_MASK
  72805. CP_ECC_FIRSTOCCURRENCE_RING2__RING_ID__SHIFT
  72806. CP_ECC_FIRSTOCCURRENCE_RING2__VMID_MASK
  72807. CP_ECC_FIRSTOCCURRENCE_RING2__VMID__SHIFT
  72808. CP_ECC_FIRSTOCCURRENCE__CLIENT_MASK
  72809. CP_ECC_FIRSTOCCURRENCE__CLIENT__SHIFT
  72810. CP_ECC_FIRSTOCCURRENCE__INTERFACE_MASK
  72811. CP_ECC_FIRSTOCCURRENCE__INTERFACE__SHIFT
  72812. CP_ECC_FIRSTOCCURRENCE__ME_MASK
  72813. CP_ECC_FIRSTOCCURRENCE__ME__SHIFT
  72814. CP_ECC_FIRSTOCCURRENCE__PIPE_MASK
  72815. CP_ECC_FIRSTOCCURRENCE__PIPE__SHIFT
  72816. CP_ECC_FIRSTOCCURRENCE__QUEUE_MASK
  72817. CP_ECC_FIRSTOCCURRENCE__QUEUE__SHIFT
  72818. CP_ECC_FIRSTOCCURRENCE__REQUEST_CLIENT_MASK
  72819. CP_ECC_FIRSTOCCURRENCE__REQUEST_CLIENT__SHIFT
  72820. CP_ECC_FIRSTOCCURRENCE__RING_ID_MASK
  72821. CP_ECC_FIRSTOCCURRENCE__RING_ID__SHIFT
  72822. CP_ECC_FIRSTOCCURRENCE__VMID_MASK
  72823. CP_ECC_FIRSTOCCURRENCE__VMID__SHIFT
  72824. CP_EEPROM_MAGIC
  72825. CP_ENABLE
  72826. CP_END
  72827. CP_ENDIAN_SWAP
  72828. CP_ENDIAN_SWAP__ENDIAN_SWAP_MASK
  72829. CP_ENDIAN_SWAP__ENDIAN_SWAP__SHIFT
  72830. CP_EOPQ_WAIT_TIME__SCALE_COUNT_MASK
  72831. CP_EOPQ_WAIT_TIME__SCALE_COUNT__SHIFT
  72832. CP_EOPQ_WAIT_TIME__WAIT_TIME_MASK
  72833. CP_EOPQ_WAIT_TIME__WAIT_TIME__SHIFT
  72834. CP_EOP_DONE_ADDR_HI__ADDR_HI_MASK
  72835. CP_EOP_DONE_ADDR_HI__ADDR_HI__SHIFT
  72836. CP_EOP_DONE_ADDR_LO__ADDR_LO_MASK
  72837. CP_EOP_DONE_ADDR_LO__ADDR_LO__SHIFT
  72838. CP_EOP_DONE_ADDR_LO__ADDR_SWAP_MASK
  72839. CP_EOP_DONE_ADDR_LO__ADDR_SWAP__SHIFT
  72840. CP_EOP_DONE_CNTX_ID__CNTX_ID_MASK
  72841. CP_EOP_DONE_CNTX_ID__CNTX_ID__SHIFT
  72842. CP_EOP_DONE_DATA_CNTL__CNTX_ID_MASK
  72843. CP_EOP_DONE_DATA_CNTL__CNTX_ID__SHIFT
  72844. CP_EOP_DONE_DATA_CNTL__DATA_SEL_MASK
  72845. CP_EOP_DONE_DATA_CNTL__DATA_SEL__SHIFT
  72846. CP_EOP_DONE_DATA_CNTL__DST_SEL_MASK
  72847. CP_EOP_DONE_DATA_CNTL__DST_SEL__SHIFT
  72848. CP_EOP_DONE_DATA_CNTL__INT_SEL_MASK
  72849. CP_EOP_DONE_DATA_CNTL__INT_SEL__SHIFT
  72850. CP_EOP_DONE_DATA_HI__DATA_HI_MASK
  72851. CP_EOP_DONE_DATA_HI__DATA_HI__SHIFT
  72852. CP_EOP_DONE_DATA_LO__DATA_LO_MASK
  72853. CP_EOP_DONE_DATA_LO__DATA_LO__SHIFT
  72854. CP_EOP_DONE_DOORBELL__DOORBELL_OFFSET_MASK
  72855. CP_EOP_DONE_DOORBELL__DOORBELL_OFFSET__SHIFT
  72856. CP_EOP_DONE_EVENT_CNTL__CACHE_CONTROL_MASK
  72857. CP_EOP_DONE_EVENT_CNTL__CACHE_CONTROL__SHIFT
  72858. CP_EOP_DONE_EVENT_CNTL__CACHE_POLICY_MASK
  72859. CP_EOP_DONE_EVENT_CNTL__CACHE_POLICY__SHIFT
  72860. CP_EOP_DONE_EVENT_CNTL__EOP_VOLATILE_MASK
  72861. CP_EOP_DONE_EVENT_CNTL__EOP_VOLATILE__SHIFT
  72862. CP_EOP_DONE_EVENT_CNTL__EXECUTE_MASK
  72863. CP_EOP_DONE_EVENT_CNTL__EXECUTE__SHIFT
  72864. CP_EOP_DONE_EVENT_CNTL__GCR_CNTL_MASK
  72865. CP_EOP_DONE_EVENT_CNTL__GCR_CNTL__SHIFT
  72866. CP_EOP_DONE_EVENT_CNTL__MTYPE_MASK
  72867. CP_EOP_DONE_EVENT_CNTL__MTYPE__SHIFT
  72868. CP_EOP_DONE_EVENT_CNTL__WBINV_ACTION_ENA_MASK
  72869. CP_EOP_DONE_EVENT_CNTL__WBINV_ACTION_ENA__SHIFT
  72870. CP_EOP_DONE_EVENT_CNTL__WBINV_TC_OP_MASK
  72871. CP_EOP_DONE_EVENT_CNTL__WBINV_TC_OP__SHIFT
  72872. CP_EOP_LAST_FENCE_HI__LAST_FENCE_HI_MASK
  72873. CP_EOP_LAST_FENCE_HI__LAST_FENCE_HI__SHIFT
  72874. CP_EOP_LAST_FENCE_LO__LAST_FENCE_LO_MASK
  72875. CP_EOP_LAST_FENCE_LO__LAST_FENCE_LO__SHIFT
  72876. CP_ERROR_FLAG
  72877. CP_EVENT_WRITE
  72878. CP_EVENT_WRITE_0_EVENT
  72879. CP_EVENT_WRITE_0_EVENT__MASK
  72880. CP_EVENT_WRITE_0_EVENT__SHIFT
  72881. CP_EVENT_WRITE_0_TIMESTAMP
  72882. CP_EVENT_WRITE_1_ADDR_0_LO
  72883. CP_EVENT_WRITE_1_ADDR_0_LO__MASK
  72884. CP_EVENT_WRITE_1_ADDR_0_LO__SHIFT
  72885. CP_EVENT_WRITE_2_ADDR_0_HI
  72886. CP_EVENT_WRITE_2_ADDR_0_HI__MASK
  72887. CP_EVENT_WRITE_2_ADDR_0_HI__SHIFT
  72888. CP_EVENT_WRITE_CFL
  72889. CP_EVENT_WRITE_SHD
  72890. CP_EVENT_WRITE_ZPD
  72891. CP_EXEC_CS
  72892. CP_EXEC_CS_1_NGROUPS_X
  72893. CP_EXEC_CS_1_NGROUPS_X__MASK
  72894. CP_EXEC_CS_1_NGROUPS_X__SHIFT
  72895. CP_EXEC_CS_2_NGROUPS_Y
  72896. CP_EXEC_CS_2_NGROUPS_Y__MASK
  72897. CP_EXEC_CS_2_NGROUPS_Y__SHIFT
  72898. CP_EXEC_CS_3_NGROUPS_Z
  72899. CP_EXEC_CS_3_NGROUPS_Z__MASK
  72900. CP_EXEC_CS_3_NGROUPS_Z__SHIFT
  72901. CP_EXEC_CS_INDIRECT
  72902. CP_FASTBOOT
  72903. CP_FASTBOOT_FLAG
  72904. CP_FASTBOOT_MODE
  72905. CP_FATAL_ERROR__CPF_FATAL_ERROR_MASK
  72906. CP_FATAL_ERROR__CPF_FATAL_ERROR__SHIFT
  72907. CP_FATAL_ERROR__CPG_FATAL_ERROR_MASK
  72908. CP_FATAL_ERROR__CPG_FATAL_ERROR__SHIFT
  72909. CP_FATAL_ERROR__CPG_TAG_FATAL_ERROR_EN_MASK
  72910. CP_FATAL_ERROR__CPG_TAG_FATAL_ERROR_EN__SHIFT
  72911. CP_FATAL_ERROR__DIS_CPG_FATAL_ERROR_MASK
  72912. CP_FATAL_ERROR__DIS_CPG_FATAL_ERROR__SHIFT
  72913. CP_FATAL_ERROR__GFX_HALT_PROC_MASK
  72914. CP_FATAL_ERROR__GFX_HALT_PROC__SHIFT
  72915. CP_FETCHER_SOURCE__ME_SRC_MASK
  72916. CP_FETCHER_SOURCE__ME_SRC__SHIFT
  72917. CP_FLAG_ALWAYS
  72918. CP_FLAG_ALWAYS_FALSE
  72919. CP_FLAG_ALWAYS_TRUE
  72920. CP_FLAG_AUTO_LOAD
  72921. CP_FLAG_AUTO_LOAD_NOT_PENDING
  72922. CP_FLAG_AUTO_LOAD_PENDING
  72923. CP_FLAG_AUTO_SAVE
  72924. CP_FLAG_AUTO_SAVE_NOT_PENDING
  72925. CP_FLAG_AUTO_SAVE_PENDING
  72926. CP_FLAG_CLEAR
  72927. CP_FLAG_INTR
  72928. CP_FLAG_INTR_NOT_PENDING
  72929. CP_FLAG_INTR_PENDING
  72930. CP_FLAG_NEWCTX
  72931. CP_FLAG_NEWCTX_BUSY
  72932. CP_FLAG_NEWCTX_DONE
  72933. CP_FLAG_SET
  72934. CP_FLAG_STATE
  72935. CP_FLAG_STATE_RUNNING
  72936. CP_FLAG_STATE_STOPPED
  72937. CP_FLAG_STATUS
  72938. CP_FLAG_STATUS_BUSY
  72939. CP_FLAG_STATUS_IDLE
  72940. CP_FLAG_SWAP_DIRECTION
  72941. CP_FLAG_SWAP_DIRECTION_LOAD
  72942. CP_FLAG_SWAP_DIRECTION_SAVE
  72943. CP_FLAG_UNK01
  72944. CP_FLAG_UNK01_CLEAR
  72945. CP_FLAG_UNK01_SET
  72946. CP_FLAG_UNK03
  72947. CP_FLAG_UNK03_CLEAR
  72948. CP_FLAG_UNK03_SET
  72949. CP_FLAG_UNK0B
  72950. CP_FLAG_UNK0B_CLEAR
  72951. CP_FLAG_UNK0B_SET
  72952. CP_FLAG_UNK1D
  72953. CP_FLAG_UNK1D_CLEAR
  72954. CP_FLAG_UNK1D_SET
  72955. CP_FLAG_UNK20
  72956. CP_FLAG_UNK20_CLEAR
  72957. CP_FLAG_UNK20_SET
  72958. CP_FLAG_UNK54
  72959. CP_FLAG_UNK54_CLEAR
  72960. CP_FLAG_UNK54_SET
  72961. CP_FLAG_UNK57
  72962. CP_FLAG_UNK57_CLEAR
  72963. CP_FLAG_UNK57_SET
  72964. CP_FLAG_USER_LOAD
  72965. CP_FLAG_USER_LOAD_NOT_PENDING
  72966. CP_FLAG_USER_LOAD_PENDING
  72967. CP_FLAG_USER_SAVE
  72968. CP_FLAG_USER_SAVE_NOT_PENDING
  72969. CP_FLAG_USER_SAVE_PENDING
  72970. CP_FLAG_XFER
  72971. CP_FLAG_XFER_BUSY
  72972. CP_FLAG_XFER_IDLE
  72973. CP_FLAG_XFER_SWITCH
  72974. CP_FLAG_XFER_SWITCH_DISABLE
  72975. CP_FLAG_XFER_SWITCH_ENABLE
  72976. CP_FSCK_FLAG
  72977. CP_GDS_ATOMIC0_PREOP_HI__GDS_ATOMIC0_PREOP_HI_MASK
  72978. CP_GDS_ATOMIC0_PREOP_HI__GDS_ATOMIC0_PREOP_HI__SHIFT
  72979. CP_GDS_ATOMIC0_PREOP_LO__GDS_ATOMIC0_PREOP_LO_MASK
  72980. CP_GDS_ATOMIC0_PREOP_LO__GDS_ATOMIC0_PREOP_LO__SHIFT
  72981. CP_GDS_ATOMIC1_PREOP_HI__GDS_ATOMIC1_PREOP_HI_MASK
  72982. CP_GDS_ATOMIC1_PREOP_HI__GDS_ATOMIC1_PREOP_HI__SHIFT
  72983. CP_GDS_ATOMIC1_PREOP_LO__GDS_ATOMIC1_PREOP_LO_MASK
  72984. CP_GDS_ATOMIC1_PREOP_LO__GDS_ATOMIC1_PREOP_LO__SHIFT
  72985. CP_GDS_BKUP_ADDR_HI__ADDR_HI_MASK
  72986. CP_GDS_BKUP_ADDR_HI__ADDR_HI__SHIFT
  72987. CP_GDS_BKUP_ADDR__ADDR_LO_MASK
  72988. CP_GDS_BKUP_ADDR__ADDR_LO__SHIFT
  72989. CP_GFX_DDID_DELTA_RPT_COUNT__COUNT_MASK
  72990. CP_GFX_DDID_DELTA_RPT_COUNT__COUNT__SHIFT
  72991. CP_GFX_DDID_INFLIGHT_COUNT__COUNT_MASK
  72992. CP_GFX_DDID_INFLIGHT_COUNT__COUNT__SHIFT
  72993. CP_GFX_DDID_RPTR__COUNT_MASK
  72994. CP_GFX_DDID_RPTR__COUNT__SHIFT
  72995. CP_GFX_DDID_WPTR__COUNT_MASK
  72996. CP_GFX_DDID_WPTR__COUNT__SHIFT
  72997. CP_GFX_ERROR__APPEND_UTCL1_ERROR_MASK
  72998. CP_GFX_ERROR__APPEND_UTCL1_ERROR__SHIFT
  72999. CP_GFX_ERROR__C1_FETCHER_UTCL1_ERROR_MASK
  73000. CP_GFX_ERROR__C1_FETCHER_UTCL1_ERROR__SHIFT
  73001. CP_GFX_ERROR__C2_FETCHER_UTCL1_ERROR_MASK
  73002. CP_GFX_ERROR__C2_FETCHER_UTCL1_ERROR__SHIFT
  73003. CP_GFX_ERROR__CE_DATA_FETCHER_UTCL1_ERROR_MASK
  73004. CP_GFX_ERROR__CE_DATA_FETCHER_UTCL1_ERROR__SHIFT
  73005. CP_GFX_ERROR__CE_DMA_UTCL1_ERROR_MASK
  73006. CP_GFX_ERROR__CE_DMA_UTCL1_ERROR__SHIFT
  73007. CP_GFX_ERROR__CE_INIT_UTCL1_ERROR_MASK
  73008. CP_GFX_ERROR__CE_INIT_UTCL1_ERROR__SHIFT
  73009. CP_GFX_ERROR__CE_TC_UTCL1_ERROR_MASK
  73010. CP_GFX_ERROR__CE_TC_UTCL1_ERROR__SHIFT
  73011. CP_GFX_ERROR__DATA_FETCHER_UTCL1_ERROR_MASK
  73012. CP_GFX_ERROR__DATA_FETCHER_UTCL1_ERROR__SHIFT
  73013. CP_GFX_ERROR__DMA_DST_UTCL1_ERROR_MASK
  73014. CP_GFX_ERROR__DMA_DST_UTCL1_ERROR__SHIFT
  73015. CP_GFX_ERROR__DMA_SRC_UTCL1_ERROR_MASK
  73016. CP_GFX_ERROR__DMA_SRC_UTCL1_ERROR__SHIFT
  73017. CP_GFX_ERROR__EDC_ERROR_ID_MASK
  73018. CP_GFX_ERROR__EDC_ERROR_ID__SHIFT
  73019. CP_GFX_ERROR__I1_FETCHER_UTCL1_ERROR_MASK
  73020. CP_GFX_ERROR__I1_FETCHER_UTCL1_ERROR__SHIFT
  73021. CP_GFX_ERROR__I2_FETCHER_UTCL1_ERROR_MASK
  73022. CP_GFX_ERROR__I2_FETCHER_UTCL1_ERROR__SHIFT
  73023. CP_GFX_ERROR__ME_TC_UTCL1_ERROR_MASK
  73024. CP_GFX_ERROR__ME_TC_UTCL1_ERROR__SHIFT
  73025. CP_GFX_ERROR__PFP_TC_UTCL1_ERROR_MASK
  73026. CP_GFX_ERROR__PFP_TC_UTCL1_ERROR__SHIFT
  73027. CP_GFX_ERROR__PFP_VGTDMA_UTCL1_ERROR_MASK
  73028. CP_GFX_ERROR__PFP_VGTDMA_UTCL1_ERROR__SHIFT
  73029. CP_GFX_ERROR__PRT_LOD_UTCL1_ERROR_MASK
  73030. CP_GFX_ERROR__PRT_LOD_UTCL1_ERROR__SHIFT
  73031. CP_GFX_ERROR__QU_EOP_UTCL1_ERROR_MASK
  73032. CP_GFX_ERROR__QU_EOP_UTCL1_ERROR__SHIFT
  73033. CP_GFX_ERROR__QU_PIPE_UTCL1_ERROR_MASK
  73034. CP_GFX_ERROR__QU_PIPE_UTCL1_ERROR__SHIFT
  73035. CP_GFX_ERROR__QU_READ_UTCL1_ERROR_MASK
  73036. CP_GFX_ERROR__QU_READ_UTCL1_ERROR__SHIFT
  73037. CP_GFX_ERROR__QU_STRM_UTCL1_ERROR_MASK
  73038. CP_GFX_ERROR__QU_STRM_UTCL1_ERROR__SHIFT
  73039. CP_GFX_ERROR__RB_FETCHER_UTCL1_ERROR_MASK
  73040. CP_GFX_ERROR__RB_FETCHER_UTCL1_ERROR__SHIFT
  73041. CP_GFX_ERROR__RDPTR_RPT_UTCL1_ERROR_MASK
  73042. CP_GFX_ERROR__RDPTR_RPT_UTCL1_ERROR__SHIFT
  73043. CP_GFX_ERROR__RSVD1_ERROR_MASK
  73044. CP_GFX_ERROR__RSVD1_ERROR__SHIFT
  73045. CP_GFX_ERROR__RSVD2_ERROR_MASK
  73046. CP_GFX_ERROR__RSVD2_ERROR__SHIFT
  73047. CP_GFX_ERROR__SEM_UTCL1_ERROR_MASK
  73048. CP_GFX_ERROR__SEM_UTCL1_ERROR__SHIFT
  73049. CP_GFX_ERROR__SHADOW_UTCL1_ERROR_MASK
  73050. CP_GFX_ERROR__SHADOW_UTCL1_ERROR__SHIFT
  73051. CP_GFX_ERROR__ST_FETCHER_UTCL1_ERROR_MASK
  73052. CP_GFX_ERROR__ST_FETCHER_UTCL1_ERROR__SHIFT
  73053. CP_GFX_ERROR__SUA_ERROR_MASK
  73054. CP_GFX_ERROR__SUA_ERROR__SHIFT
  73055. CP_GFX_ERROR__SYNC_MEMRD_UTCL1_ERROR_MASK
  73056. CP_GFX_ERROR__SYNC_MEMRD_UTCL1_ERROR__SHIFT
  73057. CP_GFX_ERROR__SYNC_MEMWR_UTCL1_ERROR_MASK
  73058. CP_GFX_ERROR__SYNC_MEMWR_UTCL1_ERROR__SHIFT
  73059. CP_GFX_HPD_CONTROL0__PIPE_HOLDING_MASK
  73060. CP_GFX_HPD_CONTROL0__PIPE_HOLDING__SHIFT
  73061. CP_GFX_HPD_CONTROL0__SUSPEND_ENABLE_MASK
  73062. CP_GFX_HPD_CONTROL0__SUSPEND_ENABLE__SHIFT
  73063. CP_GFX_HPD_OSPRE_FENCE_ADDR_HI__ADDR_HI_MASK
  73064. CP_GFX_HPD_OSPRE_FENCE_ADDR_HI__ADDR_HI__SHIFT
  73065. CP_GFX_HPD_OSPRE_FENCE_ADDR_HI__RSVD_MASK
  73066. CP_GFX_HPD_OSPRE_FENCE_ADDR_HI__RSVD__SHIFT
  73067. CP_GFX_HPD_OSPRE_FENCE_ADDR_LO__ADDR_LO_MASK
  73068. CP_GFX_HPD_OSPRE_FENCE_ADDR_LO__ADDR_LO__SHIFT
  73069. CP_GFX_HPD_OSPRE_FENCE_DATA_HI__DATA_HI_MASK
  73070. CP_GFX_HPD_OSPRE_FENCE_DATA_HI__DATA_HI__SHIFT
  73071. CP_GFX_HPD_OSPRE_FENCE_DATA_LO__DATA_LO_MASK
  73072. CP_GFX_HPD_OSPRE_FENCE_DATA_LO__DATA_LO__SHIFT
  73073. CP_GFX_HPD_STATUS0__ENABLE_OVERIDE_QUEUEID_MASK
  73074. CP_GFX_HPD_STATUS0__ENABLE_OVERIDE_QUEUEID__SHIFT
  73075. CP_GFX_HPD_STATUS0__FORCE_MAPPED_QUEUE_MASK
  73076. CP_GFX_HPD_STATUS0__FORCE_MAPPED_QUEUE__SHIFT
  73077. CP_GFX_HPD_STATUS0__FORCE_QUEUE_MASK
  73078. CP_GFX_HPD_STATUS0__FORCE_QUEUE_STATE_MASK
  73079. CP_GFX_HPD_STATUS0__FORCE_QUEUE_STATE__SHIFT
  73080. CP_GFX_HPD_STATUS0__FORCE_QUEUE__SHIFT
  73081. CP_GFX_HPD_STATUS0__MAPPED_QUEUE_MASK
  73082. CP_GFX_HPD_STATUS0__MAPPED_QUEUE__SHIFT
  73083. CP_GFX_HPD_STATUS0__OVERIDE_QUEUEID_MASK
  73084. CP_GFX_HPD_STATUS0__OVERIDE_QUEUEID__SHIFT
  73085. CP_GFX_HPD_STATUS0__QUEUE_AVAILABLE_MASK
  73086. CP_GFX_HPD_STATUS0__QUEUE_AVAILABLE__SHIFT
  73087. CP_GFX_HPD_STATUS0__QUEUE_STATE_MASK
  73088. CP_GFX_HPD_STATUS0__QUEUE_STATE__SHIFT
  73089. CP_GFX_HPD_STATUS0__SUSPEND_REQ_MASK
  73090. CP_GFX_HPD_STATUS0__SUSPEND_REQ__SHIFT
  73091. CP_GFX_HQD_ACTIVE__ACTIVE_MASK
  73092. CP_GFX_HQD_ACTIVE__ACTIVE__SHIFT
  73093. CP_GFX_HQD_BASE_HI__RB_BASE_HI_MASK
  73094. CP_GFX_HQD_BASE_HI__RB_BASE_HI__SHIFT
  73095. CP_GFX_HQD_BASE__RB_BASE_MASK
  73096. CP_GFX_HQD_BASE__RB_BASE__SHIFT
  73097. CP_GFX_HQD_CE_BASE_HI__RB_BASE_HI_MASK
  73098. CP_GFX_HQD_CE_BASE_HI__RB_BASE_HI__SHIFT
  73099. CP_GFX_HQD_CE_BASE__RB_BASE_MASK
  73100. CP_GFX_HQD_CE_BASE__RB_BASE__SHIFT
  73101. CP_GFX_HQD_CE_CNTL__BUF_SWAP_MASK
  73102. CP_GFX_HQD_CE_CNTL__BUF_SWAP__SHIFT
  73103. CP_GFX_HQD_CE_CNTL__CACHE_POLICY_MASK
  73104. CP_GFX_HQD_CE_CNTL__CACHE_POLICY__SHIFT
  73105. CP_GFX_HQD_CE_CNTL__MIN_AVAILSZ_MASK
  73106. CP_GFX_HQD_CE_CNTL__MIN_AVAILSZ__SHIFT
  73107. CP_GFX_HQD_CE_CNTL__MIN_IB_AVAILSZ_MASK
  73108. CP_GFX_HQD_CE_CNTL__MIN_IB_AVAILSZ__SHIFT
  73109. CP_GFX_HQD_CE_CNTL__RB_BLKSZ_MASK
  73110. CP_GFX_HQD_CE_CNTL__RB_BLKSZ__SHIFT
  73111. CP_GFX_HQD_CE_CNTL__RB_BUFSZ_MASK
  73112. CP_GFX_HQD_CE_CNTL__RB_BUFSZ__SHIFT
  73113. CP_GFX_HQD_CE_CNTL__RB_EXE_MASK
  73114. CP_GFX_HQD_CE_CNTL__RB_EXE__SHIFT
  73115. CP_GFX_HQD_CE_CNTL__RB_NO_UPDATE_MASK
  73116. CP_GFX_HQD_CE_CNTL__RB_NO_UPDATE__SHIFT
  73117. CP_GFX_HQD_CE_CNTL__RB_RPTR_WR_ENA_MASK
  73118. CP_GFX_HQD_CE_CNTL__RB_RPTR_WR_ENA__SHIFT
  73119. CP_GFX_HQD_CE_CNTL__RB_VOLATILE_MASK
  73120. CP_GFX_HQD_CE_CNTL__RB_VOLATILE__SHIFT
  73121. CP_GFX_HQD_CE_CSMD_RPTR__RB_RPTR_MASK
  73122. CP_GFX_HQD_CE_CSMD_RPTR__RB_RPTR__SHIFT
  73123. CP_GFX_HQD_CE_OFFSET__DISABLE_RB_OFFSET_MASK
  73124. CP_GFX_HQD_CE_OFFSET__DISABLE_RB_OFFSET__SHIFT
  73125. CP_GFX_HQD_CE_OFFSET__RB_OFFSET_MASK
  73126. CP_GFX_HQD_CE_OFFSET__RB_OFFSET__SHIFT
  73127. CP_GFX_HQD_CE_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
  73128. CP_GFX_HQD_CE_RPTR_ADDR_HI__RB_RPTR_ADDR_HI__SHIFT
  73129. CP_GFX_HQD_CE_RPTR_ADDR__RB_RPTR_ADDR_MASK
  73130. CP_GFX_HQD_CE_RPTR_ADDR__RB_RPTR_ADDR__SHIFT
  73131. CP_GFX_HQD_CE_RPTR_WR__RB_RPTR_WR_MASK
  73132. CP_GFX_HQD_CE_RPTR_WR__RB_RPTR_WR__SHIFT
  73133. CP_GFX_HQD_CE_RPTR__RB_RPTR_MASK
  73134. CP_GFX_HQD_CE_RPTR__RB_RPTR__SHIFT
  73135. CP_GFX_HQD_CE_WPTR_HI__RB_WPTR_MASK
  73136. CP_GFX_HQD_CE_WPTR_HI__RB_WPTR__SHIFT
  73137. CP_GFX_HQD_CE_WPTR_POLL_ADDR_HI__RB_WPTR_POLL_ADDR_HI_MASK
  73138. CP_GFX_HQD_CE_WPTR_POLL_ADDR_HI__RB_WPTR_POLL_ADDR_HI__SHIFT
  73139. CP_GFX_HQD_CE_WPTR_POLL_ADDR_LO__RB_WPTR_POLL_ADDR_LO_MASK
  73140. CP_GFX_HQD_CE_WPTR_POLL_ADDR_LO__RB_WPTR_POLL_ADDR_LO__SHIFT
  73141. CP_GFX_HQD_CE_WPTR__RB_WPTR_MASK
  73142. CP_GFX_HQD_CE_WPTR__RB_WPTR__SHIFT
  73143. CP_GFX_HQD_CNTL__BUF_SWAP_MASK
  73144. CP_GFX_HQD_CNTL__BUF_SWAP__SHIFT
  73145. CP_GFX_HQD_CNTL__CACHE_POLICY_MASK
  73146. CP_GFX_HQD_CNTL__CACHE_POLICY__SHIFT
  73147. CP_GFX_HQD_CNTL__CE_HQD_NEQ_RB_HQD_MASK
  73148. CP_GFX_HQD_CNTL__CE_HQD_NEQ_RB_HQD__SHIFT
  73149. CP_GFX_HQD_CNTL__KMD_QUEUE_MASK
  73150. CP_GFX_HQD_CNTL__KMD_QUEUE__SHIFT
  73151. CP_GFX_HQD_CNTL__MIN_AVAILSZ_MASK
  73152. CP_GFX_HQD_CNTL__MIN_AVAILSZ__SHIFT
  73153. CP_GFX_HQD_CNTL__MIN_IB_AVAILSZ_MASK
  73154. CP_GFX_HQD_CNTL__MIN_IB_AVAILSZ__SHIFT
  73155. CP_GFX_HQD_CNTL__RB_BLKSZ_MASK
  73156. CP_GFX_HQD_CNTL__RB_BLKSZ__SHIFT
  73157. CP_GFX_HQD_CNTL__RB_BUFSZ_MASK
  73158. CP_GFX_HQD_CNTL__RB_BUFSZ__SHIFT
  73159. CP_GFX_HQD_CNTL__RB_EXE_MASK
  73160. CP_GFX_HQD_CNTL__RB_EXE__SHIFT
  73161. CP_GFX_HQD_CNTL__RB_NO_UPDATE_MASK
  73162. CP_GFX_HQD_CNTL__RB_NO_UPDATE__SHIFT
  73163. CP_GFX_HQD_CNTL__RB_RPTR_WR_ENA_MASK
  73164. CP_GFX_HQD_CNTL__RB_RPTR_WR_ENA__SHIFT
  73165. CP_GFX_HQD_CNTL__RB_VOLATILE_MASK
  73166. CP_GFX_HQD_CNTL__RB_VOLATILE__SHIFT
  73167. CP_GFX_HQD_CSMD_RPTR__RB_RPTR_MASK
  73168. CP_GFX_HQD_CSMD_RPTR__RB_RPTR__SHIFT
  73169. CP_GFX_HQD_DEQUEUE_REQUEST__DEQUEUE_REQ_EN_MASK
  73170. CP_GFX_HQD_DEQUEUE_REQUEST__DEQUEUE_REQ_EN__SHIFT
  73171. CP_GFX_HQD_DEQUEUE_REQUEST__DEQUEUE_REQ_MASK
  73172. CP_GFX_HQD_DEQUEUE_REQUEST__DEQUEUE_REQ__SHIFT
  73173. CP_GFX_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_EN_MASK
  73174. CP_GFX_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_EN__SHIFT
  73175. CP_GFX_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK
  73176. CP_GFX_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND__SHIFT
  73177. CP_GFX_HQD_HQ_CONTROL0__COMMAND_MASK
  73178. CP_GFX_HQD_HQ_CONTROL0__COMMAND__SHIFT
  73179. CP_GFX_HQD_HQ_STATUS0__DEQUEUE_STATUS_MASK
  73180. CP_GFX_HQD_HQ_STATUS0__DEQUEUE_STATUS__SHIFT
  73181. CP_GFX_HQD_HQ_STATUS0__OS_PREEMPT_STATUS_MASK
  73182. CP_GFX_HQD_HQ_STATUS0__OS_PREEMPT_STATUS__SHIFT
  73183. CP_GFX_HQD_HQ_STATUS0__PREEMPT_ACK_MASK
  73184. CP_GFX_HQD_HQ_STATUS0__PREEMPT_ACK__SHIFT
  73185. CP_GFX_HQD_HQ_STATUS0__QUEUE_IDLE_MASK
  73186. CP_GFX_HQD_HQ_STATUS0__QUEUE_IDLE__SHIFT
  73187. CP_GFX_HQD_MAPPED__MAPPED_MASK
  73188. CP_GFX_HQD_MAPPED__MAPPED__SHIFT
  73189. CP_GFX_HQD_OFFSET__DISABLE_RB_OFFSET_MASK
  73190. CP_GFX_HQD_OFFSET__DISABLE_RB_OFFSET__SHIFT
  73191. CP_GFX_HQD_OFFSET__RB_OFFSET_MASK
  73192. CP_GFX_HQD_OFFSET__RB_OFFSET__SHIFT
  73193. CP_GFX_HQD_QUANTUM__QUANTUM_ACTIVE_MASK
  73194. CP_GFX_HQD_QUANTUM__QUANTUM_ACTIVE__SHIFT
  73195. CP_GFX_HQD_QUANTUM__QUANTUM_DURATION_MASK
  73196. CP_GFX_HQD_QUANTUM__QUANTUM_DURATION__SHIFT
  73197. CP_GFX_HQD_QUANTUM__QUANTUM_EN_MASK
  73198. CP_GFX_HQD_QUANTUM__QUANTUM_EN__SHIFT
  73199. CP_GFX_HQD_QUANTUM__QUANTUM_SCALE_MASK
  73200. CP_GFX_HQD_QUANTUM__QUANTUM_SCALE__SHIFT
  73201. CP_GFX_HQD_QUEUE_PRIORITY__PRIORITY_LEVEL_MASK
  73202. CP_GFX_HQD_QUEUE_PRIORITY__PRIORITY_LEVEL__SHIFT
  73203. CP_GFX_HQD_QUE_MGR_CONTROL__CONTROL_MASK
  73204. CP_GFX_HQD_QUE_MGR_CONTROL__CONTROL__SHIFT
  73205. CP_GFX_HQD_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
  73206. CP_GFX_HQD_RPTR_ADDR_HI__RB_RPTR_ADDR_HI__SHIFT
  73207. CP_GFX_HQD_RPTR_ADDR__RB_RPTR_ADDR_MASK
  73208. CP_GFX_HQD_RPTR_ADDR__RB_RPTR_ADDR__SHIFT
  73209. CP_GFX_HQD_RPTR__RB_RPTR_MASK
  73210. CP_GFX_HQD_RPTR__RB_RPTR__SHIFT
  73211. CP_GFX_HQD_VMID__VMID_MASK
  73212. CP_GFX_HQD_VMID__VMID__SHIFT
  73213. CP_GFX_HQD_WPTR_HI__RB_WPTR_MASK
  73214. CP_GFX_HQD_WPTR_HI__RB_WPTR__SHIFT
  73215. CP_GFX_HQD_WPTR__RB_WPTR_MASK
  73216. CP_GFX_HQD_WPTR__RB_WPTR__SHIFT
  73217. CP_GFX_INDEX_MUTEX__CLIENTID_MASK
  73218. CP_GFX_INDEX_MUTEX__CLIENTID__SHIFT
  73219. CP_GFX_INDEX_MUTEX__REQUEST_MASK
  73220. CP_GFX_INDEX_MUTEX__REQUEST__SHIFT
  73221. CP_GFX_MQD_BASE_ADDR_HI__APP_VMID_MASK
  73222. CP_GFX_MQD_BASE_ADDR_HI__APP_VMID__SHIFT
  73223. CP_GFX_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK
  73224. CP_GFX_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT
  73225. CP_GFX_MQD_BASE_ADDR__BASE_ADDR_MASK
  73226. CP_GFX_MQD_BASE_ADDR__BASE_ADDR__SHIFT
  73227. CP_GFX_MQD_CONTROL__CACHE_POLICY_MASK
  73228. CP_GFX_MQD_CONTROL__CACHE_POLICY__SHIFT
  73229. CP_GFX_MQD_CONTROL__EXE_DISABLE_MASK
  73230. CP_GFX_MQD_CONTROL__EXE_DISABLE__SHIFT
  73231. CP_GFX_MQD_CONTROL__PRIV_STATE_MASK
  73232. CP_GFX_MQD_CONTROL__PRIV_STATE__SHIFT
  73233. CP_GFX_MQD_CONTROL__PROCESSING_MQD_EN_MASK
  73234. CP_GFX_MQD_CONTROL__PROCESSING_MQD_EN__SHIFT
  73235. CP_GFX_MQD_CONTROL__PROCESSING_MQD_MASK
  73236. CP_GFX_MQD_CONTROL__PROCESSING_MQD__SHIFT
  73237. CP_GFX_MQD_CONTROL__VMID_MASK
  73238. CP_GFX_MQD_CONTROL__VMID__SHIFT
  73239. CP_GFX_QUEUE_INDEX__PIPE_ID_MASK
  73240. CP_GFX_QUEUE_INDEX__PIPE_ID__SHIFT
  73241. CP_GFX_QUEUE_INDEX__QUEUE_ACCESS_MASK
  73242. CP_GFX_QUEUE_INDEX__QUEUE_ACCESS__SHIFT
  73243. CP_GFX_QUEUE_INDEX__QUEUE_ID_MASK
  73244. CP_GFX_QUEUE_INDEX__QUEUE_ID__SHIFT
  73245. CP_GRBM_FREE_COUNT__FREE_COUNT_GDS_MASK
  73246. CP_GRBM_FREE_COUNT__FREE_COUNT_GDS__SHIFT
  73247. CP_GRBM_FREE_COUNT__FREE_COUNT_MASK
  73248. CP_GRBM_FREE_COUNT__FREE_COUNT_PFP_MASK
  73249. CP_GRBM_FREE_COUNT__FREE_COUNT_PFP__SHIFT
  73250. CP_GRBM_FREE_COUNT__FREE_COUNT__SHIFT
  73251. CP_HARDLINK
  73252. CP_HPD_EOP_BASE_ADDR
  73253. CP_HPD_EOP_BASE_ADDR_HI
  73254. CP_HPD_EOP_BASE_ADDR_HI__BASE_ADDR_HI_MASK
  73255. CP_HPD_EOP_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT
  73256. CP_HPD_EOP_BASE_ADDR__BASE_ADDR_MASK
  73257. CP_HPD_EOP_BASE_ADDR__BASE_ADDR__SHIFT
  73258. CP_HPD_EOP_CONTROL
  73259. CP_HPD_EOP_CONTROL__CACHE_POLICY_MASK
  73260. CP_HPD_EOP_CONTROL__CACHE_POLICY__SHIFT
  73261. CP_HPD_EOP_CONTROL__EOP_ATC_MASK
  73262. CP_HPD_EOP_CONTROL__EOP_ATC__SHIFT
  73263. CP_HPD_EOP_CONTROL__EOP_SIZE_MASK
  73264. CP_HPD_EOP_CONTROL__EOP_SIZE__SHIFT
  73265. CP_HPD_EOP_CONTROL__EOP_VOLATILE_MASK
  73266. CP_HPD_EOP_CONTROL__EOP_VOLATILE__SHIFT
  73267. CP_HPD_EOP_CONTROL__PEND_Q_SEM_MASK
  73268. CP_HPD_EOP_CONTROL__PEND_Q_SEM__SHIFT
  73269. CP_HPD_EOP_CONTROL__PEND_SIG_SEM_MASK
  73270. CP_HPD_EOP_CONTROL__PEND_SIG_SEM__SHIFT
  73271. CP_HPD_EOP_CONTROL__PROCESSING_EOPIB_MASK
  73272. CP_HPD_EOP_CONTROL__PROCESSING_EOPIB__SHIFT
  73273. CP_HPD_EOP_CONTROL__PROCESSING_EOP_MASK
  73274. CP_HPD_EOP_CONTROL__PROCESSING_EOP__SHIFT
  73275. CP_HPD_EOP_CONTROL__PROCESSING_QID_MASK
  73276. CP_HPD_EOP_CONTROL__PROCESSING_QID__SHIFT
  73277. CP_HPD_EOP_CONTROL__PROCESS_EOPIB_EN_MASK
  73278. CP_HPD_EOP_CONTROL__PROCESS_EOPIB_EN__SHIFT
  73279. CP_HPD_EOP_CONTROL__PROCESS_EOP_EN_MASK
  73280. CP_HPD_EOP_CONTROL__PROCESS_EOP_EN__SHIFT
  73281. CP_HPD_EOP_VMID
  73282. CP_HPD_EOP_VMID__VMID_MASK
  73283. CP_HPD_EOP_VMID__VMID__SHIFT
  73284. CP_HPD_MES_ROQ_OFFSETS__IB_OFFSET_MASK
  73285. CP_HPD_MES_ROQ_OFFSETS__IB_OFFSET__SHIFT
  73286. CP_HPD_MES_ROQ_OFFSETS__IQ_OFFSET_MASK
  73287. CP_HPD_MES_ROQ_OFFSETS__IQ_OFFSET__SHIFT
  73288. CP_HPD_MES_ROQ_OFFSETS__PQ_OFFSET_MASK
  73289. CP_HPD_MES_ROQ_OFFSETS__PQ_OFFSET__SHIFT
  73290. CP_HPD_ROQ_OFFSETS__IB_OFFSET_MASK
  73291. CP_HPD_ROQ_OFFSETS__IB_OFFSET__SHIFT
  73292. CP_HPD_ROQ_OFFSETS__IQ_OFFSET_MASK
  73293. CP_HPD_ROQ_OFFSETS__IQ_OFFSET__SHIFT
  73294. CP_HPD_ROQ_OFFSETS__PQ_OFFSET_MASK
  73295. CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT
  73296. CP_HPD_STATUS0__ENABLE_OFFLOAD_CHECK_MASK
  73297. CP_HPD_STATUS0__ENABLE_OFFLOAD_CHECK__SHIFT
  73298. CP_HPD_STATUS0__FETCHING_MQD_MASK
  73299. CP_HPD_STATUS0__FETCHING_MQD__SHIFT
  73300. CP_HPD_STATUS0__FORCE_QUEUE_MASK
  73301. CP_HPD_STATUS0__FORCE_QUEUE_STATE_MASK
  73302. CP_HPD_STATUS0__FORCE_QUEUE_STATE__SHIFT
  73303. CP_HPD_STATUS0__FORCE_QUEUE__SHIFT
  73304. CP_HPD_STATUS0__FREEZE_QUEUE_STATE_MASK
  73305. CP_HPD_STATUS0__FREEZE_QUEUE_STATE__SHIFT
  73306. CP_HPD_STATUS0__MAPPED_QUEUE_MASK
  73307. CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT
  73308. CP_HPD_STATUS0__MASTER_QUEUE_IDLE_DIS_MASK
  73309. CP_HPD_STATUS0__MASTER_QUEUE_IDLE_DIS__SHIFT
  73310. CP_HPD_STATUS0__PEND_TXFER_SIZE_IQ_MASK
  73311. CP_HPD_STATUS0__PEND_TXFER_SIZE_IQ__SHIFT
  73312. CP_HPD_STATUS0__PEND_TXFER_SIZE_PQIB_MASK
  73313. CP_HPD_STATUS0__PEND_TXFER_SIZE_PQIB__SHIFT
  73314. CP_HPD_STATUS0__QUEUE_AVAILABLE_MASK
  73315. CP_HPD_STATUS0__QUEUE_AVAILABLE__SHIFT
  73316. CP_HPD_STATUS0__QUEUE_STATE_MASK
  73317. CP_HPD_STATUS0__QUEUE_STATE__SHIFT
  73318. CP_HPD_UTCL1_CNTL__SELECT_MASK
  73319. CP_HPD_UTCL1_CNTL__SELECT__SHIFT
  73320. CP_HPD_UTCL1_ERROR_ADDR__ADDR_MASK
  73321. CP_HPD_UTCL1_ERROR_ADDR__ADDR__SHIFT
  73322. CP_HPD_UTCL1_ERROR__ADDR_HI_MASK
  73323. CP_HPD_UTCL1_ERROR__ADDR_HI__SHIFT
  73324. CP_HPD_UTCL1_ERROR__TYPE_MASK
  73325. CP_HPD_UTCL1_ERROR__TYPE__SHIFT
  73326. CP_HPD_UTCL1_ERROR__VMID_MASK
  73327. CP_HPD_UTCL1_ERROR__VMID__SHIFT
  73328. CP_HQD_ACTIVE
  73329. CP_HQD_ACTIVE__ACTIVE_MASK
  73330. CP_HQD_ACTIVE__ACTIVE__SHIFT
  73331. CP_HQD_ACTIVE__BUSY_GATE_MASK
  73332. CP_HQD_ACTIVE__BUSY_GATE__SHIFT
  73333. CP_HQD_AQL_CONTROL__CONTROL0_EN_MASK
  73334. CP_HQD_AQL_CONTROL__CONTROL0_EN__SHIFT
  73335. CP_HQD_AQL_CONTROL__CONTROL0_MASK
  73336. CP_HQD_AQL_CONTROL__CONTROL0__SHIFT
  73337. CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK
  73338. CP_HQD_AQL_CONTROL__CONTROL1_EN__SHIFT
  73339. CP_HQD_AQL_CONTROL__CONTROL1_MASK
  73340. CP_HQD_AQL_CONTROL__CONTROL1__SHIFT
  73341. CP_HQD_ATOMIC0_PREOP_HI
  73342. CP_HQD_ATOMIC0_PREOP_HI__ATOMIC0_PREOP_HI_MASK
  73343. CP_HQD_ATOMIC0_PREOP_HI__ATOMIC0_PREOP_HI__SHIFT
  73344. CP_HQD_ATOMIC0_PREOP_LO
  73345. CP_HQD_ATOMIC0_PREOP_LO__ATOMIC0_PREOP_LO_MASK
  73346. CP_HQD_ATOMIC0_PREOP_LO__ATOMIC0_PREOP_LO__SHIFT
  73347. CP_HQD_ATOMIC1_PREOP_HI
  73348. CP_HQD_ATOMIC1_PREOP_HI__ATOMIC1_PREOP_HI_MASK
  73349. CP_HQD_ATOMIC1_PREOP_HI__ATOMIC1_PREOP_HI__SHIFT
  73350. CP_HQD_ATOMIC1_PREOP_LO
  73351. CP_HQD_ATOMIC1_PREOP_LO__ATOMIC1_PREOP_LO_MASK
  73352. CP_HQD_ATOMIC1_PREOP_LO__ATOMIC1_PREOP_LO__SHIFT
  73353. CP_HQD_CNTL_STACK_OFFSET__OFFSET_MASK
  73354. CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT
  73355. CP_HQD_CNTL_STACK_SIZE__SIZE_MASK
  73356. CP_HQD_CNTL_STACK_SIZE__SIZE__SHIFT
  73357. CP_HQD_CTX_SAVE_BASE_ADDR_HI__ADDR_HI_MASK
  73358. CP_HQD_CTX_SAVE_BASE_ADDR_HI__ADDR_HI__SHIFT
  73359. CP_HQD_CTX_SAVE_BASE_ADDR_LO__ADDR_MASK
  73360. CP_HQD_CTX_SAVE_BASE_ADDR_LO__ADDR__SHIFT
  73361. CP_HQD_CTX_SAVE_CONTROL__ATC_MASK
  73362. CP_HQD_CTX_SAVE_CONTROL__ATC__SHIFT
  73363. CP_HQD_CTX_SAVE_CONTROL__EXE_DISABLE_MASK
  73364. CP_HQD_CTX_SAVE_CONTROL__EXE_DISABLE__SHIFT
  73365. CP_HQD_CTX_SAVE_CONTROL__MTYPE_MASK
  73366. CP_HQD_CTX_SAVE_CONTROL__MTYPE__SHIFT
  73367. CP_HQD_CTX_SAVE_CONTROL__POLICY_MASK
  73368. CP_HQD_CTX_SAVE_CONTROL__POLICY__SHIFT
  73369. CP_HQD_CTX_SAVE_SIZE__SIZE_MASK
  73370. CP_HQD_CTX_SAVE_SIZE__SIZE__SHIFT
  73371. CP_HQD_DDID_DELTA_RPT_COUNT__COUNT_MASK
  73372. CP_HQD_DDID_DELTA_RPT_COUNT__COUNT__SHIFT
  73373. CP_HQD_DDID_INFLIGHT_COUNT__COUNT_MASK
  73374. CP_HQD_DDID_INFLIGHT_COUNT__COUNT__SHIFT
  73375. CP_HQD_DDID_RPTR__RPTR_MASK
  73376. CP_HQD_DDID_RPTR__RPTR__SHIFT
  73377. CP_HQD_DDID_WPTR__WPTR_MASK
  73378. CP_HQD_DDID_WPTR__WPTR__SHIFT
  73379. CP_HQD_DEQUEUE_REQUEST
  73380. CP_HQD_DEQUEUE_REQUEST__DEQUEUE_INT_MASK
  73381. CP_HQD_DEQUEUE_REQUEST__DEQUEUE_INT__SHIFT
  73382. CP_HQD_DEQUEUE_REQUEST__DEQUEUE_REQ_EN_MASK
  73383. CP_HQD_DEQUEUE_REQUEST__DEQUEUE_REQ_EN__SHIFT
  73384. CP_HQD_DEQUEUE_REQUEST__DEQUEUE_REQ_MASK
  73385. CP_HQD_DEQUEUE_REQUEST__DEQUEUE_REQ__SHIFT
  73386. CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_EN_MASK
  73387. CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_EN__SHIFT
  73388. CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK
  73389. CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND__SHIFT
  73390. CP_HQD_DEQUEUE_STATUS__DEQUEUE_STAT_EN_MASK
  73391. CP_HQD_DEQUEUE_STATUS__DEQUEUE_STAT_EN__SHIFT
  73392. CP_HQD_DEQUEUE_STATUS__DEQUEUE_STAT_MASK
  73393. CP_HQD_DEQUEUE_STATUS__DEQUEUE_STAT__SHIFT
  73394. CP_HQD_DEQUEUE_STATUS__SUSPEND_REQ_PEND_EN_MASK
  73395. CP_HQD_DEQUEUE_STATUS__SUSPEND_REQ_PEND_EN__SHIFT
  73396. CP_HQD_DEQUEUE_STATUS__SUSPEND_REQ_PEND_MASK
  73397. CP_HQD_DEQUEUE_STATUS__SUSPEND_REQ_PEND__SHIFT
  73398. CP_HQD_DMA_OFFLOAD__DMA_OFFLOAD_MASK
  73399. CP_HQD_DMA_OFFLOAD__DMA_OFFLOAD__SHIFT
  73400. CP_HQD_EOP_BASE_ADDR_HI__BASE_ADDR_HI_MASK
  73401. CP_HQD_EOP_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT
  73402. CP_HQD_EOP_BASE_ADDR__BASE_ADDR_MASK
  73403. CP_HQD_EOP_BASE_ADDR__BASE_ADDR__SHIFT
  73404. CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK
  73405. CP_HQD_EOP_CONTROL__CACHE_POLICY__SHIFT
  73406. CP_HQD_EOP_CONTROL__EOP_ATC_MASK
  73407. CP_HQD_EOP_CONTROL__EOP_ATC__SHIFT
  73408. CP_HQD_EOP_CONTROL__EOP_SIZE_MASK
  73409. CP_HQD_EOP_CONTROL__EOP_SIZE__SHIFT
  73410. CP_HQD_EOP_CONTROL__EOP_VOLATILE_MASK
  73411. CP_HQD_EOP_CONTROL__EOP_VOLATILE__SHIFT
  73412. CP_HQD_EOP_CONTROL__EXE_DISABLE_MASK
  73413. CP_HQD_EOP_CONTROL__EXE_DISABLE__SHIFT
  73414. CP_HQD_EOP_CONTROL__HALT_FETCHER_EN_MASK
  73415. CP_HQD_EOP_CONTROL__HALT_FETCHER_EN__SHIFT
  73416. CP_HQD_EOP_CONTROL__HALT_FETCHER_MASK
  73417. CP_HQD_EOP_CONTROL__HALT_FETCHER__SHIFT
  73418. CP_HQD_EOP_CONTROL__MTYPE_MASK
  73419. CP_HQD_EOP_CONTROL__MTYPE__SHIFT
  73420. CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK
  73421. CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT
  73422. CP_HQD_EOP_CONTROL__PROCESSING_EOPIB_MASK
  73423. CP_HQD_EOP_CONTROL__PROCESSING_EOPIB__SHIFT
  73424. CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK
  73425. CP_HQD_EOP_CONTROL__PROCESSING_EOP__SHIFT
  73426. CP_HQD_EOP_CONTROL__PROCESS_EOPIB_EN_MASK
  73427. CP_HQD_EOP_CONTROL__PROCESS_EOPIB_EN__SHIFT
  73428. CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK
  73429. CP_HQD_EOP_CONTROL__PROCESS_EOP_EN__SHIFT
  73430. CP_HQD_EOP_CONTROL__SIG_SEM_RESULT_MASK
  73431. CP_HQD_EOP_CONTROL__SIG_SEM_RESULT__SHIFT
  73432. CP_HQD_EOP_DONES__DONE_COUNT_MASK
  73433. CP_HQD_EOP_DONES__DONE_COUNT__SHIFT
  73434. CP_HQD_EOP_EVENTS__CS_PARTIAL_FLUSH_PEND_MASK
  73435. CP_HQD_EOP_EVENTS__CS_PARTIAL_FLUSH_PEND__SHIFT
  73436. CP_HQD_EOP_EVENTS__EVENT_COUNT_MASK
  73437. CP_HQD_EOP_EVENTS__EVENT_COUNT__SHIFT
  73438. CP_HQD_EOP_RPTR__DEQUEUE_PEND_MASK
  73439. CP_HQD_EOP_RPTR__DEQUEUE_PEND__SHIFT
  73440. CP_HQD_EOP_RPTR__INIT_FETCHER_MASK
  73441. CP_HQD_EOP_RPTR__INIT_FETCHER__SHIFT
  73442. CP_HQD_EOP_RPTR__RESET_FETCHER_MASK
  73443. CP_HQD_EOP_RPTR__RESET_FETCHER__SHIFT
  73444. CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK
  73445. CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT
  73446. CP_HQD_EOP_RPTR__RPTR_MASK
  73447. CP_HQD_EOP_RPTR__RPTR__SHIFT
  73448. CP_HQD_EOP_WPTR_MEM__WPTR_MASK
  73449. CP_HQD_EOP_WPTR_MEM__WPTR__SHIFT
  73450. CP_HQD_EOP_WPTR__EOP_AVAIL_MASK
  73451. CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT
  73452. CP_HQD_EOP_WPTR__EOP_EMPTY_MASK
  73453. CP_HQD_EOP_WPTR__EOP_EMPTY__SHIFT
  73454. CP_HQD_EOP_WPTR__WPTR_MASK
  73455. CP_HQD_EOP_WPTR__WPTR__SHIFT
  73456. CP_HQD_ERROR__AQL_ERROR_MASK
  73457. CP_HQD_ERROR__AQL_ERROR__SHIFT
  73458. CP_HQD_ERROR__DMA_DST_UTCL1_ERROR_MASK
  73459. CP_HQD_ERROR__DMA_DST_UTCL1_ERROR__SHIFT
  73460. CP_HQD_ERROR__DMA_SRC_UTCL1_ERROR_MASK
  73461. CP_HQD_ERROR__DMA_SRC_UTCL1_ERROR__SHIFT
  73462. CP_HQD_ERROR__EDC_ERROR_ID_MASK
  73463. CP_HQD_ERROR__EDC_ERROR_ID__SHIFT
  73464. CP_HQD_ERROR__EOP_UTCL1_ERROR_MASK
  73465. CP_HQD_ERROR__EOP_UTCL1_ERROR__SHIFT
  73466. CP_HQD_ERROR__IB_UTCL1_ERROR_MASK
  73467. CP_HQD_ERROR__IB_UTCL1_ERROR__SHIFT
  73468. CP_HQD_ERROR__IQ_UTCL1_ERROR_MASK
  73469. CP_HQD_ERROR__IQ_UTCL1_ERROR__SHIFT
  73470. CP_HQD_ERROR__PQ_UTCL1_ERROR_MASK
  73471. CP_HQD_ERROR__PQ_UTCL1_ERROR__SHIFT
  73472. CP_HQD_ERROR__QU_UTCL1_ERROR_MASK
  73473. CP_HQD_ERROR__QU_UTCL1_ERROR__SHIFT
  73474. CP_HQD_ERROR__RRPT_UTCL1_ERROR_MASK
  73475. CP_HQD_ERROR__RRPT_UTCL1_ERROR__SHIFT
  73476. CP_HQD_ERROR__SEM_UTCL1_ERROR_MASK
  73477. CP_HQD_ERROR__SEM_UTCL1_ERROR__SHIFT
  73478. CP_HQD_ERROR__SR_UTCL1_ERROR_MASK
  73479. CP_HQD_ERROR__SR_UTCL1_ERROR__SHIFT
  73480. CP_HQD_ERROR__SUA_ERROR_MASK
  73481. CP_HQD_ERROR__SUA_ERROR__SHIFT
  73482. CP_HQD_ERROR__TC_UTCL1_ERROR_MASK
  73483. CP_HQD_ERROR__TC_UTCL1_ERROR__SHIFT
  73484. CP_HQD_ERROR__WPP_UTCL1_ERROR_MASK
  73485. CP_HQD_ERROR__WPP_UTCL1_ERROR__SHIFT
  73486. CP_HQD_GDS_RESOURCE_STATE__GWS_PNTR_MASK
  73487. CP_HQD_GDS_RESOURCE_STATE__GWS_PNTR__SHIFT
  73488. CP_HQD_GDS_RESOURCE_STATE__GWS_SIZE_MASK
  73489. CP_HQD_GDS_RESOURCE_STATE__GWS_SIZE__SHIFT
  73490. CP_HQD_GDS_RESOURCE_STATE__OA_ACQUIRED_MASK
  73491. CP_HQD_GDS_RESOURCE_STATE__OA_ACQUIRED__SHIFT
  73492. CP_HQD_GDS_RESOURCE_STATE__OA_REQUIRED_MASK
  73493. CP_HQD_GDS_RESOURCE_STATE__OA_REQUIRED__SHIFT
  73494. CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN_MASK
  73495. CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT
  73496. CP_HQD_GFX_CONTROL__MESSAGE_MASK
  73497. CP_HQD_GFX_CONTROL__MESSAGE__SHIFT
  73498. CP_HQD_GFX_CONTROL__MISC_MASK
  73499. CP_HQD_GFX_CONTROL__MISC__SHIFT
  73500. CP_HQD_GFX_STATUS__STATUS_MASK
  73501. CP_HQD_GFX_STATUS__STATUS__SHIFT
  73502. CP_HQD_HQ_CONTROL0__CONTROL_MASK
  73503. CP_HQD_HQ_CONTROL0__CONTROL__SHIFT
  73504. CP_HQD_HQ_CONTROL1__CONTROL_MASK
  73505. CP_HQD_HQ_CONTROL1__CONTROL__SHIFT
  73506. CP_HQD_HQ_SCHEDULER0
  73507. CP_HQD_HQ_SCHEDULER0__CG_ACTIVATED_MASK
  73508. CP_HQD_HQ_SCHEDULER0__CG_ACTIVATED__SHIFT
  73509. CP_HQD_HQ_SCHEDULER0__DEQUEUE_RETRY_CNT_MASK
  73510. CP_HQD_HQ_SCHEDULER0__DEQUEUE_RETRY_CNT__SHIFT
  73511. CP_HQD_HQ_SCHEDULER0__DEQUEUE_STATUS_MASK
  73512. CP_HQD_HQ_SCHEDULER0__DEQUEUE_STATUS__SHIFT
  73513. CP_HQD_HQ_SCHEDULER0__PG_ACTIVATED_MASK
  73514. CP_HQD_HQ_SCHEDULER0__PG_ACTIVATED__SHIFT
  73515. CP_HQD_HQ_SCHEDULER0__QUEUE_RUN_ONCE_MASK
  73516. CP_HQD_HQ_SCHEDULER0__QUEUE_RUN_ONCE__SHIFT
  73517. CP_HQD_HQ_SCHEDULER0__RSVR_31_11_MASK
  73518. CP_HQD_HQ_SCHEDULER0__RSVR_31_11__SHIFT
  73519. CP_HQD_HQ_SCHEDULER0__RSV_5_4_MASK
  73520. CP_HQD_HQ_SCHEDULER0__RSV_5_4__SHIFT
  73521. CP_HQD_HQ_SCHEDULER0__SCHEDULER_MASK
  73522. CP_HQD_HQ_SCHEDULER0__SCHEDULER__SHIFT
  73523. CP_HQD_HQ_SCHEDULER0__SCRATCH_RAM_INIT_MASK
  73524. CP_HQD_HQ_SCHEDULER0__SCRATCH_RAM_INIT__SHIFT
  73525. CP_HQD_HQ_SCHEDULER0__TCL2_DIRTY_MASK
  73526. CP_HQD_HQ_SCHEDULER0__TCL2_DIRTY__SHIFT
  73527. CP_HQD_HQ_SCHEDULER1
  73528. CP_HQD_HQ_SCHEDULER1__SCHEDULER_MASK
  73529. CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT
  73530. CP_HQD_HQ_STATUS0__DB_UPDATED_MSG_EN_MASK
  73531. CP_HQD_HQ_STATUS0__DB_UPDATED_MSG_EN__SHIFT
  73532. CP_HQD_HQ_STATUS0__DEQUEUE_RETRY_CNT_MASK
  73533. CP_HQD_HQ_STATUS0__DEQUEUE_RETRY_CNT__SHIFT
  73534. CP_HQD_HQ_STATUS0__DEQUEUE_STATUS_MASK
  73535. CP_HQD_HQ_STATUS0__DEQUEUE_STATUS__SHIFT
  73536. CP_HQD_HQ_STATUS0__PG_ACTIVATED_MASK
  73537. CP_HQD_HQ_STATUS0__PG_ACTIVATED__SHIFT
  73538. CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK
  73539. CP_HQD_HQ_STATUS0__QUEUE_IDLE__SHIFT
  73540. CP_HQD_HQ_STATUS0__RSVR_29_10_MASK
  73541. CP_HQD_HQ_STATUS0__RSVR_29_10__SHIFT
  73542. CP_HQD_HQ_STATUS0__RSVR_31_10_MASK
  73543. CP_HQD_HQ_STATUS0__RSVR_31_10__SHIFT
  73544. CP_HQD_HQ_STATUS0__RSV_6_4_MASK
  73545. CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT
  73546. CP_HQD_HQ_STATUS0__SCRATCH_RAM_INIT_MASK
  73547. CP_HQD_HQ_STATUS0__SCRATCH_RAM_INIT__SHIFT
  73548. CP_HQD_HQ_STATUS0__TCL2_DIRTY_MASK
  73549. CP_HQD_HQ_STATUS0__TCL2_DIRTY__SHIFT
  73550. CP_HQD_HQ_STATUS1__STATUS_MASK
  73551. CP_HQD_HQ_STATUS1__STATUS__SHIFT
  73552. CP_HQD_IB_BASE_ADDR
  73553. CP_HQD_IB_BASE_ADDR_HI
  73554. CP_HQD_IB_BASE_ADDR_HI__IB_BASE_ADDR_HI_MASK
  73555. CP_HQD_IB_BASE_ADDR_HI__IB_BASE_ADDR_HI__SHIFT
  73556. CP_HQD_IB_BASE_ADDR__IB_BASE_ADDR_MASK
  73557. CP_HQD_IB_BASE_ADDR__IB_BASE_ADDR__SHIFT
  73558. CP_HQD_IB_CONTROL
  73559. CP_HQD_IB_CONTROL__IB_ATC_MASK
  73560. CP_HQD_IB_CONTROL__IB_ATC__SHIFT
  73561. CP_HQD_IB_CONTROL__IB_CACHE_POLICY_MASK
  73562. CP_HQD_IB_CONTROL__IB_CACHE_POLICY__SHIFT
  73563. CP_HQD_IB_CONTROL__IB_EXE_DISABLE_MASK
  73564. CP_HQD_IB_CONTROL__IB_EXE_DISABLE__SHIFT
  73565. CP_HQD_IB_CONTROL__IB_SIZE_MASK
  73566. CP_HQD_IB_CONTROL__IB_SIZE__SHIFT
  73567. CP_HQD_IB_CONTROL__IB_VOLATILE_MASK
  73568. CP_HQD_IB_CONTROL__IB_VOLATILE__SHIFT
  73569. CP_HQD_IB_CONTROL__MIN_IB_AVAIL_SIZE_MASK
  73570. CP_HQD_IB_CONTROL__MIN_IB_AVAIL_SIZE__SHIFT
  73571. CP_HQD_IB_CONTROL__MTYPE_MASK
  73572. CP_HQD_IB_CONTROL__MTYPE__SHIFT
  73573. CP_HQD_IB_CONTROL__PROCESSING_IB_MASK
  73574. CP_HQD_IB_CONTROL__PROCESSING_IB__SHIFT
  73575. CP_HQD_IB_RPTR
  73576. CP_HQD_IB_RPTR__CONSUMED_OFFSET_MASK
  73577. CP_HQD_IB_RPTR__CONSUMED_OFFSET__SHIFT
  73578. CP_HQD_IQ_RPTR
  73579. CP_HQD_IQ_RPTR__OFFSET_MASK
  73580. CP_HQD_IQ_RPTR__OFFSET__SHIFT
  73581. CP_HQD_IQ_TIMER__ACTIVE_MASK
  73582. CP_HQD_IQ_TIMER__ACTIVE__SHIFT
  73583. CP_HQD_IQ_TIMER__CACHE_POLICY_MASK
  73584. CP_HQD_IQ_TIMER__CACHE_POLICY__SHIFT
  73585. CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK
  73586. CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT
  73587. CP_HQD_IQ_TIMER__EXE_DISABLE_MASK
  73588. CP_HQD_IQ_TIMER__EXE_DISABLE__SHIFT
  73589. CP_HQD_IQ_TIMER__IMMEDIATE_EXPIRE_MASK
  73590. CP_HQD_IQ_TIMER__IMMEDIATE_EXPIRE__SHIFT
  73591. CP_HQD_IQ_TIMER__INTERRUPT_SIZE_MASK
  73592. CP_HQD_IQ_TIMER__INTERRUPT_SIZE__SHIFT
  73593. CP_HQD_IQ_TIMER__INTERRUPT_TYPE_MASK
  73594. CP_HQD_IQ_TIMER__INTERRUPT_TYPE__SHIFT
  73595. CP_HQD_IQ_TIMER__IQ_ATC_MASK
  73596. CP_HQD_IQ_TIMER__IQ_ATC__SHIFT
  73597. CP_HQD_IQ_TIMER__IQ_VOLATILE_MASK
  73598. CP_HQD_IQ_TIMER__IQ_VOLATILE__SHIFT
  73599. CP_HQD_IQ_TIMER__MTYPE_MASK
  73600. CP_HQD_IQ_TIMER__MTYPE__SHIFT
  73601. CP_HQD_IQ_TIMER__PROCESSING_IQ_MASK
  73602. CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT
  73603. CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK
  73604. CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT
  73605. CP_HQD_IQ_TIMER__QUANTUM_TIMER_MASK
  73606. CP_HQD_IQ_TIMER__QUANTUM_TIMER__SHIFT
  73607. CP_HQD_IQ_TIMER__QUEUE_TYPE_MASK
  73608. CP_HQD_IQ_TIMER__QUEUE_TYPE__SHIFT
  73609. CP_HQD_IQ_TIMER__REARM_TIMER_MASK
  73610. CP_HQD_IQ_TIMER__REARM_TIMER__SHIFT
  73611. CP_HQD_IQ_TIMER__RETRY_TYPE_MASK
  73612. CP_HQD_IQ_TIMER__RETRY_TYPE__SHIFT
  73613. CP_HQD_IQ_TIMER__WAIT_TIME_MASK
  73614. CP_HQD_IQ_TIMER__WAIT_TIME__SHIFT
  73615. CP_HQD_MSG_TYPE
  73616. CP_HQD_MSG_TYPE__ACTION_MASK
  73617. CP_HQD_MSG_TYPE__ACTION__SHIFT
  73618. CP_HQD_MSG_TYPE__SAVE_STATE_MASK
  73619. CP_HQD_MSG_TYPE__SAVE_STATE__SHIFT
  73620. CP_HQD_OFFLOAD__AQL_OFFLOAD_EN_MASK
  73621. CP_HQD_OFFLOAD__AQL_OFFLOAD_EN__SHIFT
  73622. CP_HQD_OFFLOAD__AQL_OFFLOAD_MASK
  73623. CP_HQD_OFFLOAD__AQL_OFFLOAD__SHIFT
  73624. CP_HQD_OFFLOAD__DMA_OFFLOAD_EN_MASK
  73625. CP_HQD_OFFLOAD__DMA_OFFLOAD_EN__SHIFT
  73626. CP_HQD_OFFLOAD__DMA_OFFLOAD_MASK
  73627. CP_HQD_OFFLOAD__DMA_OFFLOAD__SHIFT
  73628. CP_HQD_OFFLOAD__EOP_OFFLOAD_EN_MASK
  73629. CP_HQD_OFFLOAD__EOP_OFFLOAD_EN__SHIFT
  73630. CP_HQD_OFFLOAD__EOP_OFFLOAD_MASK
  73631. CP_HQD_OFFLOAD__EOP_OFFLOAD__SHIFT
  73632. CP_HQD_PERSISTENT_STATE
  73633. CP_HQD_PERSISTENT_STATE__CACHE_FULL_PACKET_EN_MASK
  73634. CP_HQD_PERSISTENT_STATE__CACHE_FULL_PACKET_EN__SHIFT
  73635. CP_HQD_PERSISTENT_STATE__DISP_ACTIVE_MASK
  73636. CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT
  73637. CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN_MASK
  73638. CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT
  73639. CP_HQD_PERSISTENT_STATE__IB_SWITCH_QOS_EN_MASK
  73640. CP_HQD_PERSISTENT_STATE__IB_SWITCH_QOS_EN__SHIFT
  73641. CP_HQD_PERSISTENT_STATE__IQ_SWITCH_QOS_EN_MASK
  73642. CP_HQD_PERSISTENT_STATE__IQ_SWITCH_QOS_EN__SHIFT
  73643. CP_HQD_PERSISTENT_STATE__PQ_SWITCH_QOS_EN_MASK
  73644. CP_HQD_PERSISTENT_STATE__PQ_SWITCH_QOS_EN__SHIFT
  73645. CP_HQD_PERSISTENT_STATE__PRELOAD_REQ_MASK
  73646. CP_HQD_PERSISTENT_STATE__PRELOAD_REQ__SHIFT
  73647. CP_HQD_PERSISTENT_STATE__PRELOAD_SIZE_MASK
  73648. CP_HQD_PERSISTENT_STATE__PRELOAD_SIZE__SHIFT
  73649. CP_HQD_PERSISTENT_STATE__QSWITCH_MODE_MASK
  73650. CP_HQD_PERSISTENT_STATE__QSWITCH_MODE__SHIFT
  73651. CP_HQD_PERSISTENT_STATE__RELAUNCH_WAVES_MASK
  73652. CP_HQD_PERSISTENT_STATE__RELAUNCH_WAVES__SHIFT
  73653. CP_HQD_PERSISTENT_STATE__RESTORE_ACTIVE_MASK
  73654. CP_HQD_PERSISTENT_STATE__RESTORE_ACTIVE__SHIFT
  73655. CP_HQD_PERSISTENT_STATE__SUSPEND_STATUS_MASK
  73656. CP_HQD_PERSISTENT_STATE__SUSPEND_STATUS__SHIFT
  73657. CP_HQD_PERSISTENT_STATE__TC_OFFLOAD_QOS_EN_MASK
  73658. CP_HQD_PERSISTENT_STATE__TC_OFFLOAD_QOS_EN__SHIFT
  73659. CP_HQD_PERSISTENT_STATE__WPP_CLAMP_EN_MASK
  73660. CP_HQD_PERSISTENT_STATE__WPP_CLAMP_EN__SHIFT
  73661. CP_HQD_PERSISTENT_STATE__WPP_SWITCH_QOS_EN_MASK
  73662. CP_HQD_PERSISTENT_STATE__WPP_SWITCH_QOS_EN__SHIFT
  73663. CP_HQD_PIPE_PRIORITY
  73664. CP_HQD_PIPE_PRIORITY__PIPE_PRIORITY_MASK
  73665. CP_HQD_PIPE_PRIORITY__PIPE_PRIORITY__SHIFT
  73666. CP_HQD_PQ_BASE
  73667. CP_HQD_PQ_BASE_HI
  73668. CP_HQD_PQ_BASE_HI__ADDR_HI_MASK
  73669. CP_HQD_PQ_BASE_HI__ADDR_HI__SHIFT
  73670. CP_HQD_PQ_BASE__ADDR_MASK
  73671. CP_HQD_PQ_BASE__ADDR__SHIFT
  73672. CP_HQD_PQ_CONTROL
  73673. CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK
  73674. CP_HQD_PQ_CONTROL__CACHE_POLICY__SHIFT
  73675. CP_HQD_PQ_CONTROL__ENDIAN_SWAP_MASK
  73676. CP_HQD_PQ_CONTROL__ENDIAN_SWAP__SHIFT
  73677. CP_HQD_PQ_CONTROL__EXE_DISABLE_MASK
  73678. CP_HQD_PQ_CONTROL__EXE_DISABLE__SHIFT
  73679. CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK
  73680. CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT
  73681. CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK
  73682. CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE__SHIFT
  73683. CP_HQD_PQ_CONTROL__MTYPE_MASK
  73684. CP_HQD_PQ_CONTROL__MTYPE__SHIFT
  73685. CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK
  73686. CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR__SHIFT
  73687. CP_HQD_PQ_CONTROL__PQ_ATC_MASK
  73688. CP_HQD_PQ_CONTROL__PQ_ATC__SHIFT
  73689. CP_HQD_PQ_CONTROL__PQ_EMPTY_MASK
  73690. CP_HQD_PQ_CONTROL__PQ_EMPTY__SHIFT
  73691. CP_HQD_PQ_CONTROL__PQ_VOLATILE_MASK
  73692. CP_HQD_PQ_CONTROL__PQ_VOLATILE__SHIFT
  73693. CP_HQD_PQ_CONTROL__PRIV_STATE_MASK
  73694. CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT
  73695. CP_HQD_PQ_CONTROL__QUEUE_FULL_EN_MASK
  73696. CP_HQD_PQ_CONTROL__QUEUE_FULL_EN__SHIFT
  73697. CP_HQD_PQ_CONTROL__QUEUE_SIZE_MASK
  73698. CP_HQD_PQ_CONTROL__QUEUE_SIZE__SHIFT
  73699. CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP_MASK
  73700. CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP__SHIFT
  73701. CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK
  73702. CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT
  73703. CP_HQD_PQ_CONTROL__RPTR_CARRY_MASK
  73704. CP_HQD_PQ_CONTROL__RPTR_CARRY__SHIFT
  73705. CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR_MASK
  73706. CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT
  73707. CP_HQD_PQ_CONTROL__TUNNEL_DISPATCH_MASK
  73708. CP_HQD_PQ_CONTROL__TUNNEL_DISPATCH__SHIFT
  73709. CP_HQD_PQ_CONTROL__UNORD_DISPATCH_MASK
  73710. CP_HQD_PQ_CONTROL__UNORD_DISPATCH__SHIFT
  73711. CP_HQD_PQ_CONTROL__WPP_CLAMP_EN_MASK
  73712. CP_HQD_PQ_CONTROL__WPP_CLAMP_EN__SHIFT
  73713. CP_HQD_PQ_CONTROL__WPTR_CARRY_MASK
  73714. CP_HQD_PQ_CONTROL__WPTR_CARRY__SHIFT
  73715. CP_HQD_PQ_DOORBELL_CONTROL
  73716. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP_MASK
  73717. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT
  73718. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_CARRY_BITS_MASK
  73719. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_CARRY_BITS__SHIFT
  73720. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK
  73721. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN__SHIFT
  73722. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_HIT_MASK
  73723. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_HIT__SHIFT
  73724. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE_MASK
  73725. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT
  73726. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK
  73727. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT
  73728. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_SCHD_HIT_MASK
  73729. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_SCHD_HIT__SHIFT
  73730. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_SOURCE_MASK
  73731. CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_SOURCE__SHIFT
  73732. CP_HQD_PQ_RPTR
  73733. CP_HQD_PQ_RPTR_REPORT_ADDR
  73734. CP_HQD_PQ_RPTR_REPORT_ADDR_HI
  73735. CP_HQD_PQ_RPTR_REPORT_ADDR_HI__RPTR_REPORT_ADDR_HI_MASK
  73736. CP_HQD_PQ_RPTR_REPORT_ADDR_HI__RPTR_REPORT_ADDR_HI__SHIFT
  73737. CP_HQD_PQ_RPTR_REPORT_ADDR__RPTR_REPORT_ADDR_MASK
  73738. CP_HQD_PQ_RPTR_REPORT_ADDR__RPTR_REPORT_ADDR__SHIFT
  73739. CP_HQD_PQ_RPTR__CONSUMED_OFFSET_MASK
  73740. CP_HQD_PQ_RPTR__CONSUMED_OFFSET__SHIFT
  73741. CP_HQD_PQ_WPTR
  73742. CP_HQD_PQ_WPTR_HI__DATA_MASK
  73743. CP_HQD_PQ_WPTR_HI__DATA__SHIFT
  73744. CP_HQD_PQ_WPTR_LO__OFFSET_MASK
  73745. CP_HQD_PQ_WPTR_LO__OFFSET__SHIFT
  73746. CP_HQD_PQ_WPTR_POLL_ADDR
  73747. CP_HQD_PQ_WPTR_POLL_ADDR_HI
  73748. CP_HQD_PQ_WPTR_POLL_ADDR_HI__WPTR_ADDR_HI_MASK
  73749. CP_HQD_PQ_WPTR_POLL_ADDR_HI__WPTR_ADDR_HI__SHIFT
  73750. CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR_MASK
  73751. CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT
  73752. CP_HQD_PQ_WPTR__OFFSET_MASK
  73753. CP_HQD_PQ_WPTR__OFFSET__SHIFT
  73754. CP_HQD_QUANTUM
  73755. CP_HQD_QUANTUM__QUANTUM_ACTIVE_MASK
  73756. CP_HQD_QUANTUM__QUANTUM_ACTIVE__SHIFT
  73757. CP_HQD_QUANTUM__QUANTUM_DURATION_MASK
  73758. CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT
  73759. CP_HQD_QUANTUM__QUANTUM_EN_MASK
  73760. CP_HQD_QUANTUM__QUANTUM_EN__SHIFT
  73761. CP_HQD_QUANTUM__QUANTUM_SCALE_MASK
  73762. CP_HQD_QUANTUM__QUANTUM_SCALE__SHIFT
  73763. CP_HQD_QUEUE_PRIORITY
  73764. CP_HQD_QUEUE_PRIORITY__PRIORITY_LEVEL_MASK
  73765. CP_HQD_QUEUE_PRIORITY__PRIORITY_LEVEL__SHIFT
  73766. CP_HQD_SEMA_CMD
  73767. CP_HQD_SEMA_CMD__MESSAGE_EN_MASK
  73768. CP_HQD_SEMA_CMD__MESSAGE_EN__SHIFT
  73769. CP_HQD_SEMA_CMD__POLLING_DIS_MASK
  73770. CP_HQD_SEMA_CMD__POLLING_DIS__SHIFT
  73771. CP_HQD_SEMA_CMD__RESULT_MASK
  73772. CP_HQD_SEMA_CMD__RESULT__SHIFT
  73773. CP_HQD_SEMA_CMD__RETRY_MASK
  73774. CP_HQD_SEMA_CMD__RETRY__SHIFT
  73775. CP_HQD_SUSPEND_CNTL_STACK_DW_CNT__CNT_MASK
  73776. CP_HQD_SUSPEND_CNTL_STACK_DW_CNT__CNT__SHIFT
  73777. CP_HQD_SUSPEND_CNTL_STACK_OFFSET__OFFSET_MASK
  73778. CP_HQD_SUSPEND_CNTL_STACK_OFFSET__OFFSET__SHIFT
  73779. CP_HQD_SUSPEND_WG_STATE_OFFSET__OFFSET_MASK
  73780. CP_HQD_SUSPEND_WG_STATE_OFFSET__OFFSET__SHIFT
  73781. CP_HQD_VMID
  73782. CP_HQD_VMID__IB_VMID_MASK
  73783. CP_HQD_VMID__IB_VMID__SHIFT
  73784. CP_HQD_VMID__VMID_MASK
  73785. CP_HQD_VMID__VMID__SHIFT
  73786. CP_HQD_VMID__VQID_MASK
  73787. CP_HQD_VMID__VQID__SHIFT
  73788. CP_HQD_WG_STATE_OFFSET__OFFSET_MASK
  73789. CP_HQD_WG_STATE_OFFSET__OFFSET__SHIFT
  73790. CP_HYP_CE_UCODE_ADDR__UCODE_ADDR_MASK
  73791. CP_HYP_CE_UCODE_ADDR__UCODE_ADDR__SHIFT
  73792. CP_HYP_CE_UCODE_CHKSUM__UCODE_CHKSUM_MASK
  73793. CP_HYP_CE_UCODE_CHKSUM__UCODE_CHKSUM__SHIFT
  73794. CP_HYP_CE_UCODE_DATA__UCODE_DATA_MASK
  73795. CP_HYP_CE_UCODE_DATA__UCODE_DATA__SHIFT
  73796. CP_HYP_MEC1_UCODE_ADDR__UCODE_ADDR_MASK
  73797. CP_HYP_MEC1_UCODE_ADDR__UCODE_ADDR__SHIFT
  73798. CP_HYP_MEC1_UCODE_DATA__UCODE_DATA_MASK
  73799. CP_HYP_MEC1_UCODE_DATA__UCODE_DATA__SHIFT
  73800. CP_HYP_MEC2_UCODE_ADDR__UCODE_ADDR_MASK
  73801. CP_HYP_MEC2_UCODE_ADDR__UCODE_ADDR__SHIFT
  73802. CP_HYP_MEC2_UCODE_DATA__UCODE_DATA_MASK
  73803. CP_HYP_MEC2_UCODE_DATA__UCODE_DATA__SHIFT
  73804. CP_HYP_MEC_ME1_UCODE_CHKSUM__UCODE_CHKSUM_MASK
  73805. CP_HYP_MEC_ME1_UCODE_CHKSUM__UCODE_CHKSUM__SHIFT
  73806. CP_HYP_MEC_ME2_UCODE_CHKSUM__UCODE_CHKSUM_MASK
  73807. CP_HYP_MEC_ME2_UCODE_CHKSUM__UCODE_CHKSUM__SHIFT
  73808. CP_HYP_ME_UCODE_ADDR__UCODE_ADDR_MASK
  73809. CP_HYP_ME_UCODE_ADDR__UCODE_ADDR__SHIFT
  73810. CP_HYP_ME_UCODE_CHKSUM__UCODE_CHKSUM_MASK
  73811. CP_HYP_ME_UCODE_CHKSUM__UCODE_CHKSUM__SHIFT
  73812. CP_HYP_ME_UCODE_DATA__UCODE_DATA_MASK
  73813. CP_HYP_ME_UCODE_DATA__UCODE_DATA__SHIFT
  73814. CP_HYP_PFP_UCODE_ADDR__UCODE_ADDR_MASK
  73815. CP_HYP_PFP_UCODE_ADDR__UCODE_ADDR__SHIFT
  73816. CP_HYP_PFP_UCODE_CHKSUM__UCODE_CHKSUM_MASK
  73817. CP_HYP_PFP_UCODE_CHKSUM__UCODE_CHKSUM__SHIFT
  73818. CP_HYP_PFP_UCODE_DATA__UCODE_DATA_MASK
  73819. CP_HYP_PFP_UCODE_DATA__UCODE_DATA__SHIFT
  73820. CP_IB1_BASE_HI__IB1_BASE_HI_MASK
  73821. CP_IB1_BASE_HI__IB1_BASE_HI__SHIFT
  73822. CP_IB1_BASE_LO__IB1_BASE_LO_MASK
  73823. CP_IB1_BASE_LO__IB1_BASE_LO__SHIFT
  73824. CP_IB1_BUFSZ__IB1_BUFSZ_MASK
  73825. CP_IB1_BUFSZ__IB1_BUFSZ__SHIFT
  73826. CP_IB1_CMD_BUFSZ__IB1_CMD_REQSZ_MASK
  73827. CP_IB1_CMD_BUFSZ__IB1_CMD_REQSZ__SHIFT
  73828. CP_IB1_OFFSET__IB1_OFFSET_MASK
  73829. CP_IB1_OFFSET__IB1_OFFSET__SHIFT
  73830. CP_IB1_PREAMBLE_BEGIN__IB1_PREAMBLE_BEGIN_MASK
  73831. CP_IB1_PREAMBLE_BEGIN__IB1_PREAMBLE_BEGIN__SHIFT
  73832. CP_IB1_PREAMBLE_END__IB1_PREAMBLE_END_MASK
  73833. CP_IB1_PREAMBLE_END__IB1_PREAMBLE_END__SHIFT
  73834. CP_IB2_BASE_HI__IB2_BASE_HI_MASK
  73835. CP_IB2_BASE_HI__IB2_BASE_HI__SHIFT
  73836. CP_IB2_BASE_LO__IB2_BASE_LO_MASK
  73837. CP_IB2_BASE_LO__IB2_BASE_LO__SHIFT
  73838. CP_IB2_BUFSZ__IB2_BUFSZ_MASK
  73839. CP_IB2_BUFSZ__IB2_BUFSZ__SHIFT
  73840. CP_IB2_CMD_BUFSZ__IB2_CMD_REQSZ_MASK
  73841. CP_IB2_CMD_BUFSZ__IB2_CMD_REQSZ__SHIFT
  73842. CP_IB2_OFFSET__IB2_OFFSET_MASK
  73843. CP_IB2_OFFSET__IB2_OFFSET__SHIFT
  73844. CP_IB2_PREAMBLE_BEGIN__IB2_PREAMBLE_BEGIN_MASK
  73845. CP_IB2_PREAMBLE_BEGIN__IB2_PREAMBLE_BEGIN__SHIFT
  73846. CP_IB2_PREAMBLE_END__IB2_PREAMBLE_END_MASK
  73847. CP_IB2_PREAMBLE_END__IB2_PREAMBLE_END__SHIFT
  73848. CP_IB_BASE
  73849. CP_IB_BUFSZ
  73850. CP_IDX
  73851. CP_IM_LOAD
  73852. CP_IM_LOAD_IMMEDIATE
  73853. CP_IM_STORE
  73854. CP_INDEX_BASE_ADDR_HI__ADDR_HI_MASK
  73855. CP_INDEX_BASE_ADDR_HI__ADDR_HI__SHIFT
  73856. CP_INDEX_BASE_ADDR__ADDR_LO_MASK
  73857. CP_INDEX_BASE_ADDR__ADDR_LO__SHIFT
  73858. CP_INDEX_TYPE__INDEX_TYPE_MASK
  73859. CP_INDEX_TYPE__INDEX_TYPE__SHIFT
  73860. CP_INDIRECT_BUFFER
  73861. CP_INDIRECT_BUFFER_PFD
  73862. CP_INDIRECT_BUFFER_PFE
  73863. CP_INTERNAL_PHY
  73864. CP_INTERRUPT
  73865. CP_INT_CNTL
  73866. CP_INT_CNTL_RING0
  73867. CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK
  73868. CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE__SHIFT
  73869. CP_INT_CNTL_RING0__CNTX_BUSY_INT_ENABLE_MASK
  73870. CP_INT_CNTL_RING0__CNTX_BUSY_INT_ENABLE__SHIFT
  73871. CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK
  73872. CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE__SHIFT
  73873. CP_INT_CNTL_RING0__CP_ECC_ERROR_INT_ENABLE_MASK
  73874. CP_INT_CNTL_RING0__CP_ECC_ERROR_INT_ENABLE__SHIFT
  73875. CP_INT_CNTL_RING0__CP_VM_DOORBELL_WR_INT_ENABLE_MASK
  73876. CP_INT_CNTL_RING0__CP_VM_DOORBELL_WR_INT_ENABLE__SHIFT
  73877. CP_INT_CNTL_RING0__DMA_WATCH_INT_ENABLE_MASK
  73878. CP_INT_CNTL_RING0__DMA_WATCH_INT_ENABLE__SHIFT
  73879. CP_INT_CNTL_RING0__GENERIC0_INT_ENABLE_MASK
  73880. CP_INT_CNTL_RING0__GENERIC0_INT_ENABLE__SHIFT
  73881. CP_INT_CNTL_RING0__GENERIC1_INT_ENABLE_MASK
  73882. CP_INT_CNTL_RING0__GENERIC1_INT_ENABLE__SHIFT
  73883. CP_INT_CNTL_RING0__GENERIC2_INT_ENABLE_MASK
  73884. CP_INT_CNTL_RING0__GENERIC2_INT_ENABLE__SHIFT
  73885. CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK
  73886. CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE__SHIFT
  73887. CP_INT_CNTL_RING0__GPF_INT_ENABLE_MASK
  73888. CP_INT_CNTL_RING0__GPF_INT_ENABLE__SHIFT
  73889. CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE_MASK
  73890. CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE__SHIFT
  73891. CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE_MASK
  73892. CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT
  73893. CP_INT_CNTL_RING0__PRIV_REG_INT_ENABLE_MASK
  73894. CP_INT_CNTL_RING0__PRIV_REG_INT_ENABLE__SHIFT
  73895. CP_INT_CNTL_RING0__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  73896. CP_INT_CNTL_RING0__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  73897. CP_INT_CNTL_RING0__RESUME_INT_ENABLE_MASK
  73898. CP_INT_CNTL_RING0__RESUME_INT_ENABLE__SHIFT
  73899. CP_INT_CNTL_RING0__SUSPEND_INT_ENABLE_MASK
  73900. CP_INT_CNTL_RING0__SUSPEND_INT_ENABLE__SHIFT
  73901. CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK
  73902. CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT
  73903. CP_INT_CNTL_RING0__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  73904. CP_INT_CNTL_RING0__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  73905. CP_INT_CNTL_RING1
  73906. CP_INT_CNTL_RING1__CMP_BUSY_INT_ENABLE_MASK
  73907. CP_INT_CNTL_RING1__CMP_BUSY_INT_ENABLE__SHIFT
  73908. CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK
  73909. CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE__SHIFT
  73910. CP_INT_CNTL_RING1__CNTX_EMPTY_INT_ENABLE_MASK
  73911. CP_INT_CNTL_RING1__CNTX_EMPTY_INT_ENABLE__SHIFT
  73912. CP_INT_CNTL_RING1__CP_ECC_ERROR_INT_ENABLE_MASK
  73913. CP_INT_CNTL_RING1__CP_ECC_ERROR_INT_ENABLE__SHIFT
  73914. CP_INT_CNTL_RING1__CP_VM_DOORBELL_WR_INT_ENABLE_MASK
  73915. CP_INT_CNTL_RING1__CP_VM_DOORBELL_WR_INT_ENABLE__SHIFT
  73916. CP_INT_CNTL_RING1__DMA_WATCH_INT_ENABLE_MASK
  73917. CP_INT_CNTL_RING1__DMA_WATCH_INT_ENABLE__SHIFT
  73918. CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK
  73919. CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE__SHIFT
  73920. CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE_MASK
  73921. CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT
  73922. CP_INT_CNTL_RING1__GENERIC2_INT_ENABLE_MASK
  73923. CP_INT_CNTL_RING1__GENERIC2_INT_ENABLE__SHIFT
  73924. CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK
  73925. CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE__SHIFT
  73926. CP_INT_CNTL_RING1__GPF_INT_ENABLE_MASK
  73927. CP_INT_CNTL_RING1__GPF_INT_ENABLE__SHIFT
  73928. CP_INT_CNTL_RING1__OPCODE_ERROR_INT_ENABLE_MASK
  73929. CP_INT_CNTL_RING1__OPCODE_ERROR_INT_ENABLE__SHIFT
  73930. CP_INT_CNTL_RING1__PRIV_INSTR_INT_ENABLE_MASK
  73931. CP_INT_CNTL_RING1__PRIV_INSTR_INT_ENABLE__SHIFT
  73932. CP_INT_CNTL_RING1__PRIV_REG_INT_ENABLE_MASK
  73933. CP_INT_CNTL_RING1__PRIV_REG_INT_ENABLE__SHIFT
  73934. CP_INT_CNTL_RING1__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  73935. CP_INT_CNTL_RING1__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  73936. CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK
  73937. CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT
  73938. CP_INT_CNTL_RING1__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  73939. CP_INT_CNTL_RING1__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  73940. CP_INT_CNTL_RING2
  73941. CP_INT_CNTL_RING2__CMP_BUSY_INT_ENABLE_MASK
  73942. CP_INT_CNTL_RING2__CMP_BUSY_INT_ENABLE__SHIFT
  73943. CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK
  73944. CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE__SHIFT
  73945. CP_INT_CNTL_RING2__CNTX_EMPTY_INT_ENABLE_MASK
  73946. CP_INT_CNTL_RING2__CNTX_EMPTY_INT_ENABLE__SHIFT
  73947. CP_INT_CNTL_RING2__CP_ECC_ERROR_INT_ENABLE_MASK
  73948. CP_INT_CNTL_RING2__CP_ECC_ERROR_INT_ENABLE__SHIFT
  73949. CP_INT_CNTL_RING2__CP_VM_DOORBELL_WR_INT_ENABLE_MASK
  73950. CP_INT_CNTL_RING2__CP_VM_DOORBELL_WR_INT_ENABLE__SHIFT
  73951. CP_INT_CNTL_RING2__DMA_WATCH_INT_ENABLE_MASK
  73952. CP_INT_CNTL_RING2__DMA_WATCH_INT_ENABLE__SHIFT
  73953. CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK
  73954. CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE__SHIFT
  73955. CP_INT_CNTL_RING2__GENERIC1_INT_ENABLE_MASK
  73956. CP_INT_CNTL_RING2__GENERIC1_INT_ENABLE__SHIFT
  73957. CP_INT_CNTL_RING2__GENERIC2_INT_ENABLE_MASK
  73958. CP_INT_CNTL_RING2__GENERIC2_INT_ENABLE__SHIFT
  73959. CP_INT_CNTL_RING2__GFX_IDLE_INT_ENABLE_MASK
  73960. CP_INT_CNTL_RING2__GFX_IDLE_INT_ENABLE__SHIFT
  73961. CP_INT_CNTL_RING2__GPF_INT_ENABLE_MASK
  73962. CP_INT_CNTL_RING2__GPF_INT_ENABLE__SHIFT
  73963. CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK
  73964. CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE__SHIFT
  73965. CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE_MASK
  73966. CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT
  73967. CP_INT_CNTL_RING2__PRIV_REG_INT_ENABLE_MASK
  73968. CP_INT_CNTL_RING2__PRIV_REG_INT_ENABLE__SHIFT
  73969. CP_INT_CNTL_RING2__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  73970. CP_INT_CNTL_RING2__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  73971. CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE_MASK
  73972. CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT
  73973. CP_INT_CNTL_RING2__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  73974. CP_INT_CNTL_RING2__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  73975. CP_INT_CNTL_RING__TIME_STAMP_INT_ENABLE_MASK
  73976. CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK
  73977. CP_INT_CNTL__CMP_BUSY_INT_ENABLE__SHIFT
  73978. CP_INT_CNTL__CNTX_BUSY_INT_ENABLE_MASK
  73979. CP_INT_CNTL__CNTX_BUSY_INT_ENABLE__SHIFT
  73980. CP_INT_CNTL__CNTX_EMPTY_INT_ENABLE_MASK
  73981. CP_INT_CNTL__CNTX_EMPTY_INT_ENABLE__SHIFT
  73982. CP_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  73983. CP_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  73984. CP_INT_CNTL__CP_VM_DOORBELL_WR_INT_ENABLE_MASK
  73985. CP_INT_CNTL__CP_VM_DOORBELL_WR_INT_ENABLE__SHIFT
  73986. CP_INT_CNTL__DMA_WATCH_INT_ENABLE_MASK
  73987. CP_INT_CNTL__DMA_WATCH_INT_ENABLE__SHIFT
  73988. CP_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  73989. CP_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  73990. CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  73991. CP_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  73992. CP_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  73993. CP_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  73994. CP_INT_CNTL__GFX_IDLE_INT_ENABLE_MASK
  73995. CP_INT_CNTL__GFX_IDLE_INT_ENABLE__SHIFT
  73996. CP_INT_CNTL__GPF_INT_ENABLE_MASK
  73997. CP_INT_CNTL__GPF_INT_ENABLE__SHIFT
  73998. CP_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  73999. CP_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74000. CP_INT_CNTL__PRIV_INSTR_INT_ENABLE_MASK
  74001. CP_INT_CNTL__PRIV_INSTR_INT_ENABLE__SHIFT
  74002. CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74003. CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74004. CP_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74005. CP_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74006. CP_INT_CNTL__RESUME_INT_ENABLE_MASK
  74007. CP_INT_CNTL__RESUME_INT_ENABLE__SHIFT
  74008. CP_INT_CNTL__SUSPEND_INT_ENABLE_MASK
  74009. CP_INT_CNTL__SUSPEND_INT_ENABLE__SHIFT
  74010. CP_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74011. CP_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74012. CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74013. CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74014. CP_INT_STATUS
  74015. CP_INT_STATUS_RING0
  74016. CP_INT_STATUS_RING0__CMP_BUSY_INT_STAT_MASK
  74017. CP_INT_STATUS_RING0__CMP_BUSY_INT_STAT__SHIFT
  74018. CP_INT_STATUS_RING0__CNTX_BUSY_INT_STAT_MASK
  74019. CP_INT_STATUS_RING0__CNTX_BUSY_INT_STAT__SHIFT
  74020. CP_INT_STATUS_RING0__CNTX_EMPTY_INT_STAT_MASK
  74021. CP_INT_STATUS_RING0__CNTX_EMPTY_INT_STAT__SHIFT
  74022. CP_INT_STATUS_RING0__CP_ECC_ERROR_INT_STAT_MASK
  74023. CP_INT_STATUS_RING0__CP_ECC_ERROR_INT_STAT__SHIFT
  74024. CP_INT_STATUS_RING0__CP_VM_DOORBELL_WR_INT_STAT_MASK
  74025. CP_INT_STATUS_RING0__CP_VM_DOORBELL_WR_INT_STAT__SHIFT
  74026. CP_INT_STATUS_RING0__DMA_WATCH_INT_STAT_MASK
  74027. CP_INT_STATUS_RING0__DMA_WATCH_INT_STAT__SHIFT
  74028. CP_INT_STATUS_RING0__GCNTX_BUSY_INT_STAT_MASK
  74029. CP_INT_STATUS_RING0__GCNTX_BUSY_INT_STAT__SHIFT
  74030. CP_INT_STATUS_RING0__GENERIC0_INT_STAT_MASK
  74031. CP_INT_STATUS_RING0__GENERIC0_INT_STAT__SHIFT
  74032. CP_INT_STATUS_RING0__GENERIC1_INT_STAT_MASK
  74033. CP_INT_STATUS_RING0__GENERIC1_INT_STAT__SHIFT
  74034. CP_INT_STATUS_RING0__GENERIC2_INT_STAT_MASK
  74035. CP_INT_STATUS_RING0__GENERIC2_INT_STAT__SHIFT
  74036. CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK
  74037. CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT__SHIFT
  74038. CP_INT_STATUS_RING0__GPF_INT_STAT_MASK
  74039. CP_INT_STATUS_RING0__GPF_INT_STAT__SHIFT
  74040. CP_INT_STATUS_RING0__OPCODE_ERROR_INT_STAT_MASK
  74041. CP_INT_STATUS_RING0__OPCODE_ERROR_INT_STAT__SHIFT
  74042. CP_INT_STATUS_RING0__PRIV_INSTR_INT_STAT_MASK
  74043. CP_INT_STATUS_RING0__PRIV_INSTR_INT_STAT__SHIFT
  74044. CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK
  74045. CP_INT_STATUS_RING0__PRIV_REG_INT_STAT__SHIFT
  74046. CP_INT_STATUS_RING0__RESERVED_BIT_ERROR_INT_STAT_MASK
  74047. CP_INT_STATUS_RING0__RESERVED_BIT_ERROR_INT_STAT__SHIFT
  74048. CP_INT_STATUS_RING0__RESUME_INT_STAT_MASK
  74049. CP_INT_STATUS_RING0__RESUME_INT_STAT__SHIFT
  74050. CP_INT_STATUS_RING0__SUSPEND_INT_STAT_MASK
  74051. CP_INT_STATUS_RING0__SUSPEND_INT_STAT__SHIFT
  74052. CP_INT_STATUS_RING0__TIME_STAMP_INT_STAT_MASK
  74053. CP_INT_STATUS_RING0__TIME_STAMP_INT_STAT__SHIFT
  74054. CP_INT_STATUS_RING0__WRM_POLL_TIMEOUT_INT_STAT_MASK
  74055. CP_INT_STATUS_RING0__WRM_POLL_TIMEOUT_INT_STAT__SHIFT
  74056. CP_INT_STATUS_RING1
  74057. CP_INT_STATUS_RING1__CMP_BUSY_INT_STAT_MASK
  74058. CP_INT_STATUS_RING1__CMP_BUSY_INT_STAT__SHIFT
  74059. CP_INT_STATUS_RING1__CNTX_BUSY_INT_STAT_MASK
  74060. CP_INT_STATUS_RING1__CNTX_BUSY_INT_STAT__SHIFT
  74061. CP_INT_STATUS_RING1__CNTX_EMPTY_INT_STAT_MASK
  74062. CP_INT_STATUS_RING1__CNTX_EMPTY_INT_STAT__SHIFT
  74063. CP_INT_STATUS_RING1__CP_ECC_ERROR_INT_STAT_MASK
  74064. CP_INT_STATUS_RING1__CP_ECC_ERROR_INT_STAT__SHIFT
  74065. CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT_MASK
  74066. CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT
  74067. CP_INT_STATUS_RING1__DMA_WATCH_INT_STAT_MASK
  74068. CP_INT_STATUS_RING1__DMA_WATCH_INT_STAT__SHIFT
  74069. CP_INT_STATUS_RING1__GENERIC0_INT_STAT_MASK
  74070. CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT
  74071. CP_INT_STATUS_RING1__GENERIC1_INT_STAT_MASK
  74072. CP_INT_STATUS_RING1__GENERIC1_INT_STAT__SHIFT
  74073. CP_INT_STATUS_RING1__GENERIC2_INT_STAT_MASK
  74074. CP_INT_STATUS_RING1__GENERIC2_INT_STAT__SHIFT
  74075. CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK
  74076. CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT__SHIFT
  74077. CP_INT_STATUS_RING1__GPF_INT_STAT_MASK
  74078. CP_INT_STATUS_RING1__GPF_INT_STAT__SHIFT
  74079. CP_INT_STATUS_RING1__OPCODE_ERROR_INT_STAT_MASK
  74080. CP_INT_STATUS_RING1__OPCODE_ERROR_INT_STAT__SHIFT
  74081. CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK
  74082. CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT__SHIFT
  74083. CP_INT_STATUS_RING1__PRIV_REG_INT_STAT_MASK
  74084. CP_INT_STATUS_RING1__PRIV_REG_INT_STAT__SHIFT
  74085. CP_INT_STATUS_RING1__RESERVED_BIT_ERROR_INT_STAT_MASK
  74086. CP_INT_STATUS_RING1__RESERVED_BIT_ERROR_INT_STAT__SHIFT
  74087. CP_INT_STATUS_RING1__TIME_STAMP_INT_STAT_MASK
  74088. CP_INT_STATUS_RING1__TIME_STAMP_INT_STAT__SHIFT
  74089. CP_INT_STATUS_RING1__WRM_POLL_TIMEOUT_INT_STAT_MASK
  74090. CP_INT_STATUS_RING1__WRM_POLL_TIMEOUT_INT_STAT__SHIFT
  74091. CP_INT_STATUS_RING2
  74092. CP_INT_STATUS_RING2__CMP_BUSY_INT_STAT_MASK
  74093. CP_INT_STATUS_RING2__CMP_BUSY_INT_STAT__SHIFT
  74094. CP_INT_STATUS_RING2__CNTX_BUSY_INT_STAT_MASK
  74095. CP_INT_STATUS_RING2__CNTX_BUSY_INT_STAT__SHIFT
  74096. CP_INT_STATUS_RING2__CNTX_EMPTY_INT_STAT_MASK
  74097. CP_INT_STATUS_RING2__CNTX_EMPTY_INT_STAT__SHIFT
  74098. CP_INT_STATUS_RING2__CP_ECC_ERROR_INT_STAT_MASK
  74099. CP_INT_STATUS_RING2__CP_ECC_ERROR_INT_STAT__SHIFT
  74100. CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT_MASK
  74101. CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT
  74102. CP_INT_STATUS_RING2__DMA_WATCH_INT_STAT_MASK
  74103. CP_INT_STATUS_RING2__DMA_WATCH_INT_STAT__SHIFT
  74104. CP_INT_STATUS_RING2__GENERIC0_INT_STAT_MASK
  74105. CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT
  74106. CP_INT_STATUS_RING2__GENERIC1_INT_STAT_MASK
  74107. CP_INT_STATUS_RING2__GENERIC1_INT_STAT__SHIFT
  74108. CP_INT_STATUS_RING2__GENERIC2_INT_STAT_MASK
  74109. CP_INT_STATUS_RING2__GENERIC2_INT_STAT__SHIFT
  74110. CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK
  74111. CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT__SHIFT
  74112. CP_INT_STATUS_RING2__GPF_INT_STAT_MASK
  74113. CP_INT_STATUS_RING2__GPF_INT_STAT__SHIFT
  74114. CP_INT_STATUS_RING2__OPCODE_ERROR_INT_STAT_MASK
  74115. CP_INT_STATUS_RING2__OPCODE_ERROR_INT_STAT__SHIFT
  74116. CP_INT_STATUS_RING2__PRIV_INSTR_INT_STAT_MASK
  74117. CP_INT_STATUS_RING2__PRIV_INSTR_INT_STAT__SHIFT
  74118. CP_INT_STATUS_RING2__PRIV_REG_INT_STAT_MASK
  74119. CP_INT_STATUS_RING2__PRIV_REG_INT_STAT__SHIFT
  74120. CP_INT_STATUS_RING2__RESERVED_BIT_ERROR_INT_STAT_MASK
  74121. CP_INT_STATUS_RING2__RESERVED_BIT_ERROR_INT_STAT__SHIFT
  74122. CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT_MASK
  74123. CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT
  74124. CP_INT_STATUS_RING2__WRM_POLL_TIMEOUT_INT_STAT_MASK
  74125. CP_INT_STATUS_RING2__WRM_POLL_TIMEOUT_INT_STAT__SHIFT
  74126. CP_INT_STATUS__CMP_BUSY_INT_STAT_MASK
  74127. CP_INT_STATUS__CMP_BUSY_INT_STAT__SHIFT
  74128. CP_INT_STATUS__CNTX_BUSY_INT_STAT_MASK
  74129. CP_INT_STATUS__CNTX_BUSY_INT_STAT__SHIFT
  74130. CP_INT_STATUS__CNTX_EMPTY_INT_STAT_MASK
  74131. CP_INT_STATUS__CNTX_EMPTY_INT_STAT__SHIFT
  74132. CP_INT_STATUS__CP_ECC_ERROR_INT_STAT_MASK
  74133. CP_INT_STATUS__CP_ECC_ERROR_INT_STAT__SHIFT
  74134. CP_INT_STATUS__CP_VM_DOORBELL_WR_INT_STAT_MASK
  74135. CP_INT_STATUS__CP_VM_DOORBELL_WR_INT_STAT__SHIFT
  74136. CP_INT_STATUS__DMA_WATCH_INT_STAT_MASK
  74137. CP_INT_STATUS__DMA_WATCH_INT_STAT__SHIFT
  74138. CP_INT_STATUS__GENERIC0_INT_STAT_MASK
  74139. CP_INT_STATUS__GENERIC0_INT_STAT__SHIFT
  74140. CP_INT_STATUS__GENERIC1_INT_STAT_MASK
  74141. CP_INT_STATUS__GENERIC1_INT_STAT__SHIFT
  74142. CP_INT_STATUS__GENERIC2_INT_STAT_MASK
  74143. CP_INT_STATUS__GENERIC2_INT_STAT__SHIFT
  74144. CP_INT_STATUS__GFX_IDLE_INT_STAT_MASK
  74145. CP_INT_STATUS__GFX_IDLE_INT_STAT__SHIFT
  74146. CP_INT_STATUS__GPF_INT_STAT_MASK
  74147. CP_INT_STATUS__GPF_INT_STAT__SHIFT
  74148. CP_INT_STATUS__OPCODE_ERROR_INT_STAT_MASK
  74149. CP_INT_STATUS__OPCODE_ERROR_INT_STAT__SHIFT
  74150. CP_INT_STATUS__PRIV_INSTR_INT_STAT_MASK
  74151. CP_INT_STATUS__PRIV_INSTR_INT_STAT__SHIFT
  74152. CP_INT_STATUS__PRIV_REG_INT_STAT_MASK
  74153. CP_INT_STATUS__PRIV_REG_INT_STAT__SHIFT
  74154. CP_INT_STATUS__RESERVED_BIT_ERROR_INT_STAT_MASK
  74155. CP_INT_STATUS__RESERVED_BIT_ERROR_INT_STAT__SHIFT
  74156. CP_INT_STATUS__RESUME_INT_STAT_MASK
  74157. CP_INT_STATUS__RESUME_INT_STAT__SHIFT
  74158. CP_INT_STATUS__SUSPEND_INT_STAT_MASK
  74159. CP_INT_STATUS__SUSPEND_INT_STAT__SHIFT
  74160. CP_INT_STATUS__TIME_STAMP_INT_STAT_MASK
  74161. CP_INT_STATUS__TIME_STAMP_INT_STAT__SHIFT
  74162. CP_INT_STATUS__WRM_POLL_TIMEOUT_INT_STAT_MASK
  74163. CP_INT_STATUS__WRM_POLL_TIMEOUT_INT_STAT__SHIFT
  74164. CP_INT_STAT_DEBUG__CMP_BUSY_INT_ASSERTED_MASK
  74165. CP_INT_STAT_DEBUG__CMP_BUSY_INT_ASSERTED__SHIFT
  74166. CP_INT_STAT_DEBUG__CNTX_BUSY_INT_ASSERTED_MASK
  74167. CP_INT_STAT_DEBUG__CNTX_BUSY_INT_ASSERTED__SHIFT
  74168. CP_INT_STAT_DEBUG__CNTX_EMPTY_INT_ASSERTED_MASK
  74169. CP_INT_STAT_DEBUG__CNTX_EMPTY_INT_ASSERTED__SHIFT
  74170. CP_INT_STAT_DEBUG__CP_ECC_ERROR_INT_ASSERTED_MASK
  74171. CP_INT_STAT_DEBUG__CP_ECC_ERROR_INT_ASSERTED__SHIFT
  74172. CP_INT_STAT_DEBUG__CP_VM_DOORBELL_WR_INT_ASSERTED_MASK
  74173. CP_INT_STAT_DEBUG__CP_VM_DOORBELL_WR_INT_ASSERTED__SHIFT
  74174. CP_INT_STAT_DEBUG__GENERIC0_INT_ASSERTED_MASK
  74175. CP_INT_STAT_DEBUG__GENERIC0_INT_ASSERTED__SHIFT
  74176. CP_INT_STAT_DEBUG__GENERIC1_INT_ASSERTED_MASK
  74177. CP_INT_STAT_DEBUG__GENERIC1_INT_ASSERTED__SHIFT
  74178. CP_INT_STAT_DEBUG__GENERIC2_INT_ASSERTED_MASK
  74179. CP_INT_STAT_DEBUG__GENERIC2_INT_ASSERTED__SHIFT
  74180. CP_INT_STAT_DEBUG__GFX_IDLE_INT_ASSERTED_MASK
  74181. CP_INT_STAT_DEBUG__GFX_IDLE_INT_ASSERTED__SHIFT
  74182. CP_INT_STAT_DEBUG__GPF_INT_ASSERTED_MASK
  74183. CP_INT_STAT_DEBUG__GPF_INT_ASSERTED__SHIFT
  74184. CP_INT_STAT_DEBUG__OPCODE_ERROR_INT_ASSERTED_MASK
  74185. CP_INT_STAT_DEBUG__OPCODE_ERROR_INT_ASSERTED__SHIFT
  74186. CP_INT_STAT_DEBUG__PRIV_INSTR_INT_ASSERTED_MASK
  74187. CP_INT_STAT_DEBUG__PRIV_INSTR_INT_ASSERTED__SHIFT
  74188. CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK
  74189. CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED__SHIFT
  74190. CP_INT_STAT_DEBUG__RESERVED_BIT_ERROR_INT_ASSERTED_MASK
  74191. CP_INT_STAT_DEBUG__RESERVED_BIT_ERROR_INT_ASSERTED__SHIFT
  74192. CP_INT_STAT_DEBUG__TIME_STAMP_INT_ASSERTED_MASK
  74193. CP_INT_STAT_DEBUG__TIME_STAMP_INT_ASSERTED__SHIFT
  74194. CP_INT_STAT_DEBUG__WRM_POLL_TIMEOUT_INT_ASSERTED_MASK
  74195. CP_INT_STAT_DEBUG__WRM_POLL_TIMEOUT_INT_ASSERTED__SHIFT
  74196. CP_INVALIDATE_STATE
  74197. CP_INVERT
  74198. CP_IQ_WAIT_TIME1__ATOMIC_OFFLOAD_MASK
  74199. CP_IQ_WAIT_TIME1__ATOMIC_OFFLOAD__SHIFT
  74200. CP_IQ_WAIT_TIME1__GWS_MASK
  74201. CP_IQ_WAIT_TIME1__GWS__SHIFT
  74202. CP_IQ_WAIT_TIME1__IB_OFFLOAD_MASK
  74203. CP_IQ_WAIT_TIME1__IB_OFFLOAD__SHIFT
  74204. CP_IQ_WAIT_TIME1__WRM_OFFLOAD_MASK
  74205. CP_IQ_WAIT_TIME1__WRM_OFFLOAD__SHIFT
  74206. CP_IQ_WAIT_TIME2__DEQ_RETRY_MASK
  74207. CP_IQ_WAIT_TIME2__DEQ_RETRY__SHIFT
  74208. CP_IQ_WAIT_TIME2__QUE_SLEEP_MASK
  74209. CP_IQ_WAIT_TIME2__QUE_SLEEP__SHIFT
  74210. CP_IQ_WAIT_TIME2__SCH_WAVE_MASK
  74211. CP_IQ_WAIT_TIME2__SCH_WAVE__SHIFT
  74212. CP_IQ_WAIT_TIME2__SEM_REARM_MASK
  74213. CP_IQ_WAIT_TIME2__SEM_REARM__SHIFT
  74214. CP_IQ_WAIT_TIME3__SUSPEND_QUE_MASK
  74215. CP_IQ_WAIT_TIME3__SUSPEND_QUE__SHIFT
  74216. CP_LARGE_NAT_BITMAP_FLAG
  74217. CP_LOAD_CONSTANT_CONTEXT
  74218. CP_LOAD_MAGIC_NV40TCL
  74219. CP_LOAD_MAGIC_NV44TCL
  74220. CP_LOAD_MAGIC_UNK01
  74221. CP_LOAD_SR
  74222. CP_LOAD_SR_VALUE
  74223. CP_LOAD_STATE
  74224. CP_LOAD_STATE4
  74225. CP_LOAD_STATE4_0_DST_OFF
  74226. CP_LOAD_STATE4_0_DST_OFF__MASK
  74227. CP_LOAD_STATE4_0_DST_OFF__SHIFT
  74228. CP_LOAD_STATE4_0_NUM_UNIT
  74229. CP_LOAD_STATE4_0_NUM_UNIT__MASK
  74230. CP_LOAD_STATE4_0_NUM_UNIT__SHIFT
  74231. CP_LOAD_STATE4_0_STATE_BLOCK
  74232. CP_LOAD_STATE4_0_STATE_BLOCK__MASK
  74233. CP_LOAD_STATE4_0_STATE_BLOCK__SHIFT
  74234. CP_LOAD_STATE4_0_STATE_SRC
  74235. CP_LOAD_STATE4_0_STATE_SRC__MASK
  74236. CP_LOAD_STATE4_0_STATE_SRC__SHIFT
  74237. CP_LOAD_STATE4_1_EXT_SRC_ADDR
  74238. CP_LOAD_STATE4_1_EXT_SRC_ADDR__MASK
  74239. CP_LOAD_STATE4_1_EXT_SRC_ADDR__SHIFT
  74240. CP_LOAD_STATE4_1_STATE_TYPE
  74241. CP_LOAD_STATE4_1_STATE_TYPE__MASK
  74242. CP_LOAD_STATE4_1_STATE_TYPE__SHIFT
  74243. CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI
  74244. CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI__MASK
  74245. CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI__SHIFT
  74246. CP_LOAD_STATE6_0_DST_OFF
  74247. CP_LOAD_STATE6_0_DST_OFF__MASK
  74248. CP_LOAD_STATE6_0_DST_OFF__SHIFT
  74249. CP_LOAD_STATE6_0_NUM_UNIT
  74250. CP_LOAD_STATE6_0_NUM_UNIT__MASK
  74251. CP_LOAD_STATE6_0_NUM_UNIT__SHIFT
  74252. CP_LOAD_STATE6_0_STATE_BLOCK
  74253. CP_LOAD_STATE6_0_STATE_BLOCK__MASK
  74254. CP_LOAD_STATE6_0_STATE_BLOCK__SHIFT
  74255. CP_LOAD_STATE6_0_STATE_SRC
  74256. CP_LOAD_STATE6_0_STATE_SRC__MASK
  74257. CP_LOAD_STATE6_0_STATE_SRC__SHIFT
  74258. CP_LOAD_STATE6_0_STATE_TYPE
  74259. CP_LOAD_STATE6_0_STATE_TYPE__MASK
  74260. CP_LOAD_STATE6_0_STATE_TYPE__SHIFT
  74261. CP_LOAD_STATE6_1_EXT_SRC_ADDR
  74262. CP_LOAD_STATE6_1_EXT_SRC_ADDR__MASK
  74263. CP_LOAD_STATE6_1_EXT_SRC_ADDR__SHIFT
  74264. CP_LOAD_STATE6_2_EXT_SRC_ADDR_HI
  74265. CP_LOAD_STATE6_2_EXT_SRC_ADDR_HI__MASK
  74266. CP_LOAD_STATE6_2_EXT_SRC_ADDR_HI__SHIFT
  74267. CP_LOAD_STATE6_FRAG
  74268. CP_LOAD_STATE6_GEOM
  74269. CP_LOAD_STATE_0_DST_OFF
  74270. CP_LOAD_STATE_0_DST_OFF__MASK
  74271. CP_LOAD_STATE_0_DST_OFF__SHIFT
  74272. CP_LOAD_STATE_0_NUM_UNIT
  74273. CP_LOAD_STATE_0_NUM_UNIT__MASK
  74274. CP_LOAD_STATE_0_NUM_UNIT__SHIFT
  74275. CP_LOAD_STATE_0_STATE_BLOCK
  74276. CP_LOAD_STATE_0_STATE_BLOCK__MASK
  74277. CP_LOAD_STATE_0_STATE_BLOCK__SHIFT
  74278. CP_LOAD_STATE_0_STATE_SRC
  74279. CP_LOAD_STATE_0_STATE_SRC__MASK
  74280. CP_LOAD_STATE_0_STATE_SRC__SHIFT
  74281. CP_LOAD_STATE_1_EXT_SRC_ADDR
  74282. CP_LOAD_STATE_1_EXT_SRC_ADDR__MASK
  74283. CP_LOAD_STATE_1_EXT_SRC_ADDR__SHIFT
  74284. CP_LOAD_STATE_1_STATE_TYPE
  74285. CP_LOAD_STATE_1_STATE_TYPE__MASK
  74286. CP_LOAD_STATE_1_STATE_TYPE__SHIFT
  74287. CP_LONG_PREEMPTIONS
  74288. CP_LONG_RESUMPTIONS
  74289. CP_MACADDR
  74290. CP_MAX_CONTEXT
  74291. CP_MAX_CONTEXT__MAX_CONTEXT_MASK
  74292. CP_MAX_CONTEXT__MAX_CONTEXT__SHIFT
  74293. CP_MAX_DYN_STOP_LAT
  74294. CP_MAX_MTU
  74295. CP_MC_PACK_DELAY_CNT__PACK_DELAY_CNT_MASK
  74296. CP_MC_PACK_DELAY_CNT__PACK_DELAY_CNT__SHIFT
  74297. CP_MC_TAG_CNTL__TAG_RAM_INDEX_MASK
  74298. CP_MC_TAG_CNTL__TAG_RAM_INDEX__SHIFT
  74299. CP_MC_TAG_CNTL__TAG_RAM_SEL_MASK
  74300. CP_MC_TAG_CNTL__TAG_RAM_SEL__SHIFT
  74301. CP_MC_TAG_DATA__TAG_RAM_DATA_MASK
  74302. CP_MC_TAG_DATA__TAG_RAM_DATA__SHIFT
  74303. CP_ME0_PIPE0_PRIORITY__PRIORITY_MASK
  74304. CP_ME0_PIPE0_PRIORITY__PRIORITY__SHIFT
  74305. CP_ME0_PIPE0_VMID__VMID_MASK
  74306. CP_ME0_PIPE0_VMID__VMID__SHIFT
  74307. CP_ME0_PIPE1_PRIORITY__PRIORITY_MASK
  74308. CP_ME0_PIPE1_PRIORITY__PRIORITY__SHIFT
  74309. CP_ME0_PIPE1_VMID__VMID_MASK
  74310. CP_ME0_PIPE1_VMID__VMID__SHIFT
  74311. CP_ME0_PIPE2_PRIORITY__PRIORITY_MASK
  74312. CP_ME0_PIPE2_PRIORITY__PRIORITY__SHIFT
  74313. CP_ME0_PIPE_PRIORITY_CNTS__PRIORITY1_CNT_MASK
  74314. CP_ME0_PIPE_PRIORITY_CNTS__PRIORITY1_CNT__SHIFT
  74315. CP_ME0_PIPE_PRIORITY_CNTS__PRIORITY2A_CNT_MASK
  74316. CP_ME0_PIPE_PRIORITY_CNTS__PRIORITY2A_CNT__SHIFT
  74317. CP_ME0_PIPE_PRIORITY_CNTS__PRIORITY2B_CNT_MASK
  74318. CP_ME0_PIPE_PRIORITY_CNTS__PRIORITY2B_CNT__SHIFT
  74319. CP_ME0_PIPE_PRIORITY_CNTS__PRIORITY3_CNT_MASK
  74320. CP_ME0_PIPE_PRIORITY_CNTS__PRIORITY3_CNT__SHIFT
  74321. CP_ME1_INT_STAT_DEBUG__CMP_QUERY_STATUS_INT_ASSERTED_MASK
  74322. CP_ME1_INT_STAT_DEBUG__CMP_QUERY_STATUS_INT_ASSERTED__SHIFT
  74323. CP_ME1_INT_STAT_DEBUG__CP_ECC_ERROR_INT_ASSERTED_MASK
  74324. CP_ME1_INT_STAT_DEBUG__CP_ECC_ERROR_INT_ASSERTED__SHIFT
  74325. CP_ME1_INT_STAT_DEBUG__DEQUEUE_REQUEST_INT_ASSERTED_MASK
  74326. CP_ME1_INT_STAT_DEBUG__DEQUEUE_REQUEST_INT_ASSERTED__SHIFT
  74327. CP_ME1_INT_STAT_DEBUG__GENERIC0_INT_ASSERTED_MASK
  74328. CP_ME1_INT_STAT_DEBUG__GENERIC0_INT_ASSERTED__SHIFT
  74329. CP_ME1_INT_STAT_DEBUG__GENERIC1_INT_ASSERTED_MASK
  74330. CP_ME1_INT_STAT_DEBUG__GENERIC1_INT_ASSERTED__SHIFT
  74331. CP_ME1_INT_STAT_DEBUG__GENERIC2_INT_ASSERTED_MASK
  74332. CP_ME1_INT_STAT_DEBUG__GENERIC2_INT_ASSERTED__SHIFT
  74333. CP_ME1_INT_STAT_DEBUG__GPF_INT_ASSERTED_MASK
  74334. CP_ME1_INT_STAT_DEBUG__GPF_INT_ASSERTED__SHIFT
  74335. CP_ME1_INT_STAT_DEBUG__OPCODE_ERROR_INT_ASSERTED_MASK
  74336. CP_ME1_INT_STAT_DEBUG__OPCODE_ERROR_INT_ASSERTED__SHIFT
  74337. CP_ME1_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK
  74338. CP_ME1_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED__SHIFT
  74339. CP_ME1_INT_STAT_DEBUG__RESERVED_BIT_ERROR_INT_ASSERTED_MASK
  74340. CP_ME1_INT_STAT_DEBUG__RESERVED_BIT_ERROR_INT_ASSERTED__SHIFT
  74341. CP_ME1_INT_STAT_DEBUG__SUA_VIOLATION_INT_STATUS_MASK
  74342. CP_ME1_INT_STAT_DEBUG__SUA_VIOLATION_INT_STATUS__SHIFT
  74343. CP_ME1_INT_STAT_DEBUG__TIME_STAMP_INT_ASSERTED_MASK
  74344. CP_ME1_INT_STAT_DEBUG__TIME_STAMP_INT_ASSERTED__SHIFT
  74345. CP_ME1_INT_STAT_DEBUG__WRM_POLL_TIMEOUT_INT_ASSERTED_MASK
  74346. CP_ME1_INT_STAT_DEBUG__WRM_POLL_TIMEOUT_INT_ASSERTED__SHIFT
  74347. CP_ME1_PIPE0_INT_CNTL
  74348. CP_ME1_PIPE0_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  74349. CP_ME1_PIPE0_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  74350. CP_ME1_PIPE0_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  74351. CP_ME1_PIPE0_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  74352. CP_ME1_PIPE0_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  74353. CP_ME1_PIPE0_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  74354. CP_ME1_PIPE0_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  74355. CP_ME1_PIPE0_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  74356. CP_ME1_PIPE0_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  74357. CP_ME1_PIPE0_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  74358. CP_ME1_PIPE0_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  74359. CP_ME1_PIPE0_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  74360. CP_ME1_PIPE0_INT_CNTL__GPF_INT_ENABLE_MASK
  74361. CP_ME1_PIPE0_INT_CNTL__GPF_INT_ENABLE__SHIFT
  74362. CP_ME1_PIPE0_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  74363. CP_ME1_PIPE0_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74364. CP_ME1_PIPE0_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74365. CP_ME1_PIPE0_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74366. CP_ME1_PIPE0_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74367. CP_ME1_PIPE0_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74368. CP_ME1_PIPE0_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  74369. CP_ME1_PIPE0_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  74370. CP_ME1_PIPE0_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74371. CP_ME1_PIPE0_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74372. CP_ME1_PIPE0_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74373. CP_ME1_PIPE0_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74374. CP_ME1_PIPE0_INT_STATUS
  74375. CP_ME1_PIPE0_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  74376. CP_ME1_PIPE0_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  74377. CP_ME1_PIPE0_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  74378. CP_ME1_PIPE0_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  74379. CP_ME1_PIPE0_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  74380. CP_ME1_PIPE0_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  74381. CP_ME1_PIPE0_INT_STATUS__GENERIC0_INT_STATUS_MASK
  74382. CP_ME1_PIPE0_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  74383. CP_ME1_PIPE0_INT_STATUS__GENERIC1_INT_STATUS_MASK
  74384. CP_ME1_PIPE0_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  74385. CP_ME1_PIPE0_INT_STATUS__GENERIC2_INT_STATUS_MASK
  74386. CP_ME1_PIPE0_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  74387. CP_ME1_PIPE0_INT_STATUS__GPF_INT_STATUS_MASK
  74388. CP_ME1_PIPE0_INT_STATUS__GPF_INT_STATUS__SHIFT
  74389. CP_ME1_PIPE0_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  74390. CP_ME1_PIPE0_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  74391. CP_ME1_PIPE0_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  74392. CP_ME1_PIPE0_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  74393. CP_ME1_PIPE0_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  74394. CP_ME1_PIPE0_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  74395. CP_ME1_PIPE0_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  74396. CP_ME1_PIPE0_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  74397. CP_ME1_PIPE0_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  74398. CP_ME1_PIPE0_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  74399. CP_ME1_PIPE0_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  74400. CP_ME1_PIPE0_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  74401. CP_ME1_PIPE0_PRIORITY__PRIORITY_MASK
  74402. CP_ME1_PIPE0_PRIORITY__PRIORITY__SHIFT
  74403. CP_ME1_PIPE1_INT_CNTL
  74404. CP_ME1_PIPE1_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  74405. CP_ME1_PIPE1_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  74406. CP_ME1_PIPE1_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  74407. CP_ME1_PIPE1_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  74408. CP_ME1_PIPE1_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  74409. CP_ME1_PIPE1_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  74410. CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  74411. CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  74412. CP_ME1_PIPE1_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  74413. CP_ME1_PIPE1_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  74414. CP_ME1_PIPE1_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  74415. CP_ME1_PIPE1_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  74416. CP_ME1_PIPE1_INT_CNTL__GPF_INT_ENABLE_MASK
  74417. CP_ME1_PIPE1_INT_CNTL__GPF_INT_ENABLE__SHIFT
  74418. CP_ME1_PIPE1_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  74419. CP_ME1_PIPE1_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74420. CP_ME1_PIPE1_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74421. CP_ME1_PIPE1_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74422. CP_ME1_PIPE1_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74423. CP_ME1_PIPE1_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74424. CP_ME1_PIPE1_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  74425. CP_ME1_PIPE1_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  74426. CP_ME1_PIPE1_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74427. CP_ME1_PIPE1_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74428. CP_ME1_PIPE1_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74429. CP_ME1_PIPE1_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74430. CP_ME1_PIPE1_INT_STATUS
  74431. CP_ME1_PIPE1_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  74432. CP_ME1_PIPE1_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  74433. CP_ME1_PIPE1_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  74434. CP_ME1_PIPE1_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  74435. CP_ME1_PIPE1_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  74436. CP_ME1_PIPE1_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  74437. CP_ME1_PIPE1_INT_STATUS__GENERIC0_INT_STATUS_MASK
  74438. CP_ME1_PIPE1_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  74439. CP_ME1_PIPE1_INT_STATUS__GENERIC1_INT_STATUS_MASK
  74440. CP_ME1_PIPE1_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  74441. CP_ME1_PIPE1_INT_STATUS__GENERIC2_INT_STATUS_MASK
  74442. CP_ME1_PIPE1_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  74443. CP_ME1_PIPE1_INT_STATUS__GPF_INT_STATUS_MASK
  74444. CP_ME1_PIPE1_INT_STATUS__GPF_INT_STATUS__SHIFT
  74445. CP_ME1_PIPE1_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  74446. CP_ME1_PIPE1_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  74447. CP_ME1_PIPE1_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  74448. CP_ME1_PIPE1_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  74449. CP_ME1_PIPE1_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  74450. CP_ME1_PIPE1_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  74451. CP_ME1_PIPE1_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  74452. CP_ME1_PIPE1_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  74453. CP_ME1_PIPE1_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  74454. CP_ME1_PIPE1_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  74455. CP_ME1_PIPE1_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  74456. CP_ME1_PIPE1_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  74457. CP_ME1_PIPE1_PRIORITY__PRIORITY_MASK
  74458. CP_ME1_PIPE1_PRIORITY__PRIORITY__SHIFT
  74459. CP_ME1_PIPE2_INT_CNTL
  74460. CP_ME1_PIPE2_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  74461. CP_ME1_PIPE2_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  74462. CP_ME1_PIPE2_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  74463. CP_ME1_PIPE2_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  74464. CP_ME1_PIPE2_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  74465. CP_ME1_PIPE2_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  74466. CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  74467. CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  74468. CP_ME1_PIPE2_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  74469. CP_ME1_PIPE2_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  74470. CP_ME1_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  74471. CP_ME1_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  74472. CP_ME1_PIPE2_INT_CNTL__GPF_INT_ENABLE_MASK
  74473. CP_ME1_PIPE2_INT_CNTL__GPF_INT_ENABLE__SHIFT
  74474. CP_ME1_PIPE2_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  74475. CP_ME1_PIPE2_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74476. CP_ME1_PIPE2_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74477. CP_ME1_PIPE2_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74478. CP_ME1_PIPE2_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74479. CP_ME1_PIPE2_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74480. CP_ME1_PIPE2_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  74481. CP_ME1_PIPE2_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  74482. CP_ME1_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74483. CP_ME1_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74484. CP_ME1_PIPE2_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74485. CP_ME1_PIPE2_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74486. CP_ME1_PIPE2_INT_STATUS
  74487. CP_ME1_PIPE2_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  74488. CP_ME1_PIPE2_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  74489. CP_ME1_PIPE2_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  74490. CP_ME1_PIPE2_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  74491. CP_ME1_PIPE2_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  74492. CP_ME1_PIPE2_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  74493. CP_ME1_PIPE2_INT_STATUS__GENERIC0_INT_STATUS_MASK
  74494. CP_ME1_PIPE2_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  74495. CP_ME1_PIPE2_INT_STATUS__GENERIC1_INT_STATUS_MASK
  74496. CP_ME1_PIPE2_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  74497. CP_ME1_PIPE2_INT_STATUS__GENERIC2_INT_STATUS_MASK
  74498. CP_ME1_PIPE2_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  74499. CP_ME1_PIPE2_INT_STATUS__GPF_INT_STATUS_MASK
  74500. CP_ME1_PIPE2_INT_STATUS__GPF_INT_STATUS__SHIFT
  74501. CP_ME1_PIPE2_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  74502. CP_ME1_PIPE2_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  74503. CP_ME1_PIPE2_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  74504. CP_ME1_PIPE2_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  74505. CP_ME1_PIPE2_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  74506. CP_ME1_PIPE2_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  74507. CP_ME1_PIPE2_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  74508. CP_ME1_PIPE2_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  74509. CP_ME1_PIPE2_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  74510. CP_ME1_PIPE2_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  74511. CP_ME1_PIPE2_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  74512. CP_ME1_PIPE2_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  74513. CP_ME1_PIPE2_PRIORITY__PRIORITY_MASK
  74514. CP_ME1_PIPE2_PRIORITY__PRIORITY__SHIFT
  74515. CP_ME1_PIPE3_INT_CNTL
  74516. CP_ME1_PIPE3_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  74517. CP_ME1_PIPE3_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  74518. CP_ME1_PIPE3_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  74519. CP_ME1_PIPE3_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  74520. CP_ME1_PIPE3_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  74521. CP_ME1_PIPE3_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  74522. CP_ME1_PIPE3_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  74523. CP_ME1_PIPE3_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  74524. CP_ME1_PIPE3_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  74525. CP_ME1_PIPE3_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  74526. CP_ME1_PIPE3_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  74527. CP_ME1_PIPE3_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  74528. CP_ME1_PIPE3_INT_CNTL__GPF_INT_ENABLE_MASK
  74529. CP_ME1_PIPE3_INT_CNTL__GPF_INT_ENABLE__SHIFT
  74530. CP_ME1_PIPE3_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  74531. CP_ME1_PIPE3_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74532. CP_ME1_PIPE3_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74533. CP_ME1_PIPE3_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74534. CP_ME1_PIPE3_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74535. CP_ME1_PIPE3_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74536. CP_ME1_PIPE3_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  74537. CP_ME1_PIPE3_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  74538. CP_ME1_PIPE3_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74539. CP_ME1_PIPE3_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74540. CP_ME1_PIPE3_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74541. CP_ME1_PIPE3_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74542. CP_ME1_PIPE3_INT_STATUS
  74543. CP_ME1_PIPE3_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  74544. CP_ME1_PIPE3_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  74545. CP_ME1_PIPE3_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  74546. CP_ME1_PIPE3_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  74547. CP_ME1_PIPE3_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  74548. CP_ME1_PIPE3_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  74549. CP_ME1_PIPE3_INT_STATUS__GENERIC0_INT_STATUS_MASK
  74550. CP_ME1_PIPE3_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  74551. CP_ME1_PIPE3_INT_STATUS__GENERIC1_INT_STATUS_MASK
  74552. CP_ME1_PIPE3_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  74553. CP_ME1_PIPE3_INT_STATUS__GENERIC2_INT_STATUS_MASK
  74554. CP_ME1_PIPE3_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  74555. CP_ME1_PIPE3_INT_STATUS__GPF_INT_STATUS_MASK
  74556. CP_ME1_PIPE3_INT_STATUS__GPF_INT_STATUS__SHIFT
  74557. CP_ME1_PIPE3_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  74558. CP_ME1_PIPE3_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  74559. CP_ME1_PIPE3_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  74560. CP_ME1_PIPE3_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  74561. CP_ME1_PIPE3_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  74562. CP_ME1_PIPE3_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  74563. CP_ME1_PIPE3_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  74564. CP_ME1_PIPE3_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  74565. CP_ME1_PIPE3_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  74566. CP_ME1_PIPE3_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  74567. CP_ME1_PIPE3_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  74568. CP_ME1_PIPE3_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  74569. CP_ME1_PIPE3_PRIORITY__PRIORITY_MASK
  74570. CP_ME1_PIPE3_PRIORITY__PRIORITY__SHIFT
  74571. CP_ME1_PIPE_PRIORITY_CNTS__PRIORITY1_CNT_MASK
  74572. CP_ME1_PIPE_PRIORITY_CNTS__PRIORITY1_CNT__SHIFT
  74573. CP_ME1_PIPE_PRIORITY_CNTS__PRIORITY2A_CNT_MASK
  74574. CP_ME1_PIPE_PRIORITY_CNTS__PRIORITY2A_CNT__SHIFT
  74575. CP_ME1_PIPE_PRIORITY_CNTS__PRIORITY2B_CNT_MASK
  74576. CP_ME1_PIPE_PRIORITY_CNTS__PRIORITY2B_CNT__SHIFT
  74577. CP_ME1_PIPE_PRIORITY_CNTS__PRIORITY3_CNT_MASK
  74578. CP_ME1_PIPE_PRIORITY_CNTS__PRIORITY3_CNT__SHIFT
  74579. CP_ME2_INT_STAT_DEBUG__CMP_QUERY_STATUS_INT_ASSERTED_MASK
  74580. CP_ME2_INT_STAT_DEBUG__CMP_QUERY_STATUS_INT_ASSERTED__SHIFT
  74581. CP_ME2_INT_STAT_DEBUG__CP_ECC_ERROR_INT_ASSERTED_MASK
  74582. CP_ME2_INT_STAT_DEBUG__CP_ECC_ERROR_INT_ASSERTED__SHIFT
  74583. CP_ME2_INT_STAT_DEBUG__DEQUEUE_REQUEST_INT_ASSERTED_MASK
  74584. CP_ME2_INT_STAT_DEBUG__DEQUEUE_REQUEST_INT_ASSERTED__SHIFT
  74585. CP_ME2_INT_STAT_DEBUG__GENERIC0_INT_ASSERTED_MASK
  74586. CP_ME2_INT_STAT_DEBUG__GENERIC0_INT_ASSERTED__SHIFT
  74587. CP_ME2_INT_STAT_DEBUG__GENERIC1_INT_ASSERTED_MASK
  74588. CP_ME2_INT_STAT_DEBUG__GENERIC1_INT_ASSERTED__SHIFT
  74589. CP_ME2_INT_STAT_DEBUG__GENERIC2_INT_ASSERTED_MASK
  74590. CP_ME2_INT_STAT_DEBUG__GENERIC2_INT_ASSERTED__SHIFT
  74591. CP_ME2_INT_STAT_DEBUG__GPF_INT_ASSERTED_MASK
  74592. CP_ME2_INT_STAT_DEBUG__GPF_INT_ASSERTED__SHIFT
  74593. CP_ME2_INT_STAT_DEBUG__OPCODE_ERROR_INT_ASSERTED_MASK
  74594. CP_ME2_INT_STAT_DEBUG__OPCODE_ERROR_INT_ASSERTED__SHIFT
  74595. CP_ME2_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK
  74596. CP_ME2_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED__SHIFT
  74597. CP_ME2_INT_STAT_DEBUG__RESERVED_BIT_ERROR_INT_ASSERTED_MASK
  74598. CP_ME2_INT_STAT_DEBUG__RESERVED_BIT_ERROR_INT_ASSERTED__SHIFT
  74599. CP_ME2_INT_STAT_DEBUG__SUA_VIOLATION_INT_STATUS_MASK
  74600. CP_ME2_INT_STAT_DEBUG__SUA_VIOLATION_INT_STATUS__SHIFT
  74601. CP_ME2_INT_STAT_DEBUG__TIME_STAMP_INT_ASSERTED_MASK
  74602. CP_ME2_INT_STAT_DEBUG__TIME_STAMP_INT_ASSERTED__SHIFT
  74603. CP_ME2_INT_STAT_DEBUG__WRM_POLL_TIMEOUT_INT_ASSERTED_MASK
  74604. CP_ME2_INT_STAT_DEBUG__WRM_POLL_TIMEOUT_INT_ASSERTED__SHIFT
  74605. CP_ME2_PIPE0_INT_CNTL
  74606. CP_ME2_PIPE0_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  74607. CP_ME2_PIPE0_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  74608. CP_ME2_PIPE0_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  74609. CP_ME2_PIPE0_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  74610. CP_ME2_PIPE0_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  74611. CP_ME2_PIPE0_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  74612. CP_ME2_PIPE0_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  74613. CP_ME2_PIPE0_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  74614. CP_ME2_PIPE0_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  74615. CP_ME2_PIPE0_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  74616. CP_ME2_PIPE0_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  74617. CP_ME2_PIPE0_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  74618. CP_ME2_PIPE0_INT_CNTL__GPF_INT_ENABLE_MASK
  74619. CP_ME2_PIPE0_INT_CNTL__GPF_INT_ENABLE__SHIFT
  74620. CP_ME2_PIPE0_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  74621. CP_ME2_PIPE0_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74622. CP_ME2_PIPE0_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74623. CP_ME2_PIPE0_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74624. CP_ME2_PIPE0_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74625. CP_ME2_PIPE0_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74626. CP_ME2_PIPE0_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  74627. CP_ME2_PIPE0_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  74628. CP_ME2_PIPE0_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74629. CP_ME2_PIPE0_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74630. CP_ME2_PIPE0_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74631. CP_ME2_PIPE0_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74632. CP_ME2_PIPE0_INT_STATUS
  74633. CP_ME2_PIPE0_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  74634. CP_ME2_PIPE0_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  74635. CP_ME2_PIPE0_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  74636. CP_ME2_PIPE0_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  74637. CP_ME2_PIPE0_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  74638. CP_ME2_PIPE0_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  74639. CP_ME2_PIPE0_INT_STATUS__GENERIC0_INT_STATUS_MASK
  74640. CP_ME2_PIPE0_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  74641. CP_ME2_PIPE0_INT_STATUS__GENERIC1_INT_STATUS_MASK
  74642. CP_ME2_PIPE0_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  74643. CP_ME2_PIPE0_INT_STATUS__GENERIC2_INT_STATUS_MASK
  74644. CP_ME2_PIPE0_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  74645. CP_ME2_PIPE0_INT_STATUS__GPF_INT_STATUS_MASK
  74646. CP_ME2_PIPE0_INT_STATUS__GPF_INT_STATUS__SHIFT
  74647. CP_ME2_PIPE0_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  74648. CP_ME2_PIPE0_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  74649. CP_ME2_PIPE0_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  74650. CP_ME2_PIPE0_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  74651. CP_ME2_PIPE0_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  74652. CP_ME2_PIPE0_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  74653. CP_ME2_PIPE0_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  74654. CP_ME2_PIPE0_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  74655. CP_ME2_PIPE0_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  74656. CP_ME2_PIPE0_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  74657. CP_ME2_PIPE0_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  74658. CP_ME2_PIPE0_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  74659. CP_ME2_PIPE0_PRIORITY__PRIORITY_MASK
  74660. CP_ME2_PIPE0_PRIORITY__PRIORITY__SHIFT
  74661. CP_ME2_PIPE1_INT_CNTL
  74662. CP_ME2_PIPE1_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  74663. CP_ME2_PIPE1_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  74664. CP_ME2_PIPE1_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  74665. CP_ME2_PIPE1_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  74666. CP_ME2_PIPE1_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  74667. CP_ME2_PIPE1_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  74668. CP_ME2_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  74669. CP_ME2_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  74670. CP_ME2_PIPE1_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  74671. CP_ME2_PIPE1_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  74672. CP_ME2_PIPE1_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  74673. CP_ME2_PIPE1_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  74674. CP_ME2_PIPE1_INT_CNTL__GPF_INT_ENABLE_MASK
  74675. CP_ME2_PIPE1_INT_CNTL__GPF_INT_ENABLE__SHIFT
  74676. CP_ME2_PIPE1_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  74677. CP_ME2_PIPE1_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74678. CP_ME2_PIPE1_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74679. CP_ME2_PIPE1_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74680. CP_ME2_PIPE1_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74681. CP_ME2_PIPE1_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74682. CP_ME2_PIPE1_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  74683. CP_ME2_PIPE1_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  74684. CP_ME2_PIPE1_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74685. CP_ME2_PIPE1_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74686. CP_ME2_PIPE1_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74687. CP_ME2_PIPE1_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74688. CP_ME2_PIPE1_INT_STATUS
  74689. CP_ME2_PIPE1_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  74690. CP_ME2_PIPE1_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  74691. CP_ME2_PIPE1_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  74692. CP_ME2_PIPE1_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  74693. CP_ME2_PIPE1_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  74694. CP_ME2_PIPE1_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  74695. CP_ME2_PIPE1_INT_STATUS__GENERIC0_INT_STATUS_MASK
  74696. CP_ME2_PIPE1_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  74697. CP_ME2_PIPE1_INT_STATUS__GENERIC1_INT_STATUS_MASK
  74698. CP_ME2_PIPE1_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  74699. CP_ME2_PIPE1_INT_STATUS__GENERIC2_INT_STATUS_MASK
  74700. CP_ME2_PIPE1_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  74701. CP_ME2_PIPE1_INT_STATUS__GPF_INT_STATUS_MASK
  74702. CP_ME2_PIPE1_INT_STATUS__GPF_INT_STATUS__SHIFT
  74703. CP_ME2_PIPE1_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  74704. CP_ME2_PIPE1_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  74705. CP_ME2_PIPE1_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  74706. CP_ME2_PIPE1_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  74707. CP_ME2_PIPE1_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  74708. CP_ME2_PIPE1_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  74709. CP_ME2_PIPE1_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  74710. CP_ME2_PIPE1_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  74711. CP_ME2_PIPE1_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  74712. CP_ME2_PIPE1_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  74713. CP_ME2_PIPE1_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  74714. CP_ME2_PIPE1_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  74715. CP_ME2_PIPE1_PRIORITY__PRIORITY_MASK
  74716. CP_ME2_PIPE1_PRIORITY__PRIORITY__SHIFT
  74717. CP_ME2_PIPE2_INT_CNTL
  74718. CP_ME2_PIPE2_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  74719. CP_ME2_PIPE2_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  74720. CP_ME2_PIPE2_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  74721. CP_ME2_PIPE2_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  74722. CP_ME2_PIPE2_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  74723. CP_ME2_PIPE2_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  74724. CP_ME2_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  74725. CP_ME2_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  74726. CP_ME2_PIPE2_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  74727. CP_ME2_PIPE2_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  74728. CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  74729. CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  74730. CP_ME2_PIPE2_INT_CNTL__GPF_INT_ENABLE_MASK
  74731. CP_ME2_PIPE2_INT_CNTL__GPF_INT_ENABLE__SHIFT
  74732. CP_ME2_PIPE2_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  74733. CP_ME2_PIPE2_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74734. CP_ME2_PIPE2_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74735. CP_ME2_PIPE2_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74736. CP_ME2_PIPE2_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74737. CP_ME2_PIPE2_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74738. CP_ME2_PIPE2_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  74739. CP_ME2_PIPE2_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  74740. CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74741. CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74742. CP_ME2_PIPE2_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74743. CP_ME2_PIPE2_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74744. CP_ME2_PIPE2_INT_STATUS
  74745. CP_ME2_PIPE2_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  74746. CP_ME2_PIPE2_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  74747. CP_ME2_PIPE2_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  74748. CP_ME2_PIPE2_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  74749. CP_ME2_PIPE2_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  74750. CP_ME2_PIPE2_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  74751. CP_ME2_PIPE2_INT_STATUS__GENERIC0_INT_STATUS_MASK
  74752. CP_ME2_PIPE2_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  74753. CP_ME2_PIPE2_INT_STATUS__GENERIC1_INT_STATUS_MASK
  74754. CP_ME2_PIPE2_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  74755. CP_ME2_PIPE2_INT_STATUS__GENERIC2_INT_STATUS_MASK
  74756. CP_ME2_PIPE2_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  74757. CP_ME2_PIPE2_INT_STATUS__GPF_INT_STATUS_MASK
  74758. CP_ME2_PIPE2_INT_STATUS__GPF_INT_STATUS__SHIFT
  74759. CP_ME2_PIPE2_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  74760. CP_ME2_PIPE2_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  74761. CP_ME2_PIPE2_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  74762. CP_ME2_PIPE2_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  74763. CP_ME2_PIPE2_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  74764. CP_ME2_PIPE2_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  74765. CP_ME2_PIPE2_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  74766. CP_ME2_PIPE2_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  74767. CP_ME2_PIPE2_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  74768. CP_ME2_PIPE2_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  74769. CP_ME2_PIPE2_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  74770. CP_ME2_PIPE2_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  74771. CP_ME2_PIPE2_PRIORITY__PRIORITY_MASK
  74772. CP_ME2_PIPE2_PRIORITY__PRIORITY__SHIFT
  74773. CP_ME2_PIPE3_INT_CNTL
  74774. CP_ME2_PIPE3_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE_MASK
  74775. CP_ME2_PIPE3_INT_CNTL__CMP_QUERY_STATUS_INT_ENABLE__SHIFT
  74776. CP_ME2_PIPE3_INT_CNTL__CP_ECC_ERROR_INT_ENABLE_MASK
  74777. CP_ME2_PIPE3_INT_CNTL__CP_ECC_ERROR_INT_ENABLE__SHIFT
  74778. CP_ME2_PIPE3_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE_MASK
  74779. CP_ME2_PIPE3_INT_CNTL__DEQUEUE_REQUEST_INT_ENABLE__SHIFT
  74780. CP_ME2_PIPE3_INT_CNTL__GENERIC0_INT_ENABLE_MASK
  74781. CP_ME2_PIPE3_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT
  74782. CP_ME2_PIPE3_INT_CNTL__GENERIC1_INT_ENABLE_MASK
  74783. CP_ME2_PIPE3_INT_CNTL__GENERIC1_INT_ENABLE__SHIFT
  74784. CP_ME2_PIPE3_INT_CNTL__GENERIC2_INT_ENABLE_MASK
  74785. CP_ME2_PIPE3_INT_CNTL__GENERIC2_INT_ENABLE__SHIFT
  74786. CP_ME2_PIPE3_INT_CNTL__GPF_INT_ENABLE_MASK
  74787. CP_ME2_PIPE3_INT_CNTL__GPF_INT_ENABLE__SHIFT
  74788. CP_ME2_PIPE3_INT_CNTL__OPCODE_ERROR_INT_ENABLE_MASK
  74789. CP_ME2_PIPE3_INT_CNTL__OPCODE_ERROR_INT_ENABLE__SHIFT
  74790. CP_ME2_PIPE3_INT_CNTL__PRIV_REG_INT_ENABLE_MASK
  74791. CP_ME2_PIPE3_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT
  74792. CP_ME2_PIPE3_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE_MASK
  74793. CP_ME2_PIPE3_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT
  74794. CP_ME2_PIPE3_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK
  74795. CP_ME2_PIPE3_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT
  74796. CP_ME2_PIPE3_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK
  74797. CP_ME2_PIPE3_INT_CNTL__TIME_STAMP_INT_ENABLE__SHIFT
  74798. CP_ME2_PIPE3_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK
  74799. CP_ME2_PIPE3_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT
  74800. CP_ME2_PIPE3_INT_STATUS
  74801. CP_ME2_PIPE3_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS_MASK
  74802. CP_ME2_PIPE3_INT_STATUS__CMP_QUERY_STATUS_INT_STATUS__SHIFT
  74803. CP_ME2_PIPE3_INT_STATUS__CP_ECC_ERROR_INT_STATUS_MASK
  74804. CP_ME2_PIPE3_INT_STATUS__CP_ECC_ERROR_INT_STATUS__SHIFT
  74805. CP_ME2_PIPE3_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS_MASK
  74806. CP_ME2_PIPE3_INT_STATUS__DEQUEUE_REQUEST_INT_STATUS__SHIFT
  74807. CP_ME2_PIPE3_INT_STATUS__GENERIC0_INT_STATUS_MASK
  74808. CP_ME2_PIPE3_INT_STATUS__GENERIC0_INT_STATUS__SHIFT
  74809. CP_ME2_PIPE3_INT_STATUS__GENERIC1_INT_STATUS_MASK
  74810. CP_ME2_PIPE3_INT_STATUS__GENERIC1_INT_STATUS__SHIFT
  74811. CP_ME2_PIPE3_INT_STATUS__GENERIC2_INT_STATUS_MASK
  74812. CP_ME2_PIPE3_INT_STATUS__GENERIC2_INT_STATUS__SHIFT
  74813. CP_ME2_PIPE3_INT_STATUS__GPF_INT_STATUS_MASK
  74814. CP_ME2_PIPE3_INT_STATUS__GPF_INT_STATUS__SHIFT
  74815. CP_ME2_PIPE3_INT_STATUS__OPCODE_ERROR_INT_STATUS_MASK
  74816. CP_ME2_PIPE3_INT_STATUS__OPCODE_ERROR_INT_STATUS__SHIFT
  74817. CP_ME2_PIPE3_INT_STATUS__PRIV_REG_INT_STATUS_MASK
  74818. CP_ME2_PIPE3_INT_STATUS__PRIV_REG_INT_STATUS__SHIFT
  74819. CP_ME2_PIPE3_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS_MASK
  74820. CP_ME2_PIPE3_INT_STATUS__RESERVED_BIT_ERROR_INT_STATUS__SHIFT
  74821. CP_ME2_PIPE3_INT_STATUS__SUA_VIOLATION_INT_STATUS_MASK
  74822. CP_ME2_PIPE3_INT_STATUS__SUA_VIOLATION_INT_STATUS__SHIFT
  74823. CP_ME2_PIPE3_INT_STATUS__TIME_STAMP_INT_STATUS_MASK
  74824. CP_ME2_PIPE3_INT_STATUS__TIME_STAMP_INT_STATUS__SHIFT
  74825. CP_ME2_PIPE3_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS_MASK
  74826. CP_ME2_PIPE3_INT_STATUS__WRM_POLL_TIMEOUT_INT_STATUS__SHIFT
  74827. CP_ME2_PIPE3_PRIORITY__PRIORITY_MASK
  74828. CP_ME2_PIPE3_PRIORITY__PRIORITY__SHIFT
  74829. CP_ME2_PIPE_PRIORITY_CNTS__PRIORITY1_CNT_MASK
  74830. CP_ME2_PIPE_PRIORITY_CNTS__PRIORITY1_CNT__SHIFT
  74831. CP_ME2_PIPE_PRIORITY_CNTS__PRIORITY2A_CNT_MASK
  74832. CP_ME2_PIPE_PRIORITY_CNTS__PRIORITY2A_CNT__SHIFT
  74833. CP_ME2_PIPE_PRIORITY_CNTS__PRIORITY2B_CNT_MASK
  74834. CP_ME2_PIPE_PRIORITY_CNTS__PRIORITY2B_CNT__SHIFT
  74835. CP_ME2_PIPE_PRIORITY_CNTS__PRIORITY3_CNT_MASK
  74836. CP_ME2_PIPE_PRIORITY_CNTS__PRIORITY3_CNT__SHIFT
  74837. CP_MEC1_F32_INTERRUPT__PRIV_REG_INT_MASK
  74838. CP_MEC1_F32_INTERRUPT__PRIV_REG_INT__SHIFT
  74839. CP_MEC1_F32_INT_DIS__EDC_DMA_FED_INT_MASK
  74840. CP_MEC1_F32_INT_DIS__EDC_DMA_FED_INT__SHIFT
  74841. CP_MEC1_F32_INT_DIS__EDC_GDS_FED_INT_MASK
  74842. CP_MEC1_F32_INT_DIS__EDC_GDS_FED_INT__SHIFT
  74843. CP_MEC1_F32_INT_DIS__EDC_ROQ_FED_INT_MASK
  74844. CP_MEC1_F32_INT_DIS__EDC_ROQ_FED_INT__SHIFT
  74845. CP_MEC1_F32_INT_DIS__EDC_SCRATCH_FED_INT_MASK
  74846. CP_MEC1_F32_INT_DIS__EDC_SCRATCH_FED_INT__SHIFT
  74847. CP_MEC1_F32_INT_DIS__EDC_SR_MEM_FED_INT_MASK
  74848. CP_MEC1_F32_INT_DIS__EDC_SR_MEM_FED_INT__SHIFT
  74849. CP_MEC1_F32_INT_DIS__EDC_TC_FED_INT_MASK
  74850. CP_MEC1_F32_INT_DIS__EDC_TC_FED_INT__SHIFT
  74851. CP_MEC1_F32_INT_DIS__FATAL_EDC_ERROR_INT_MASK
  74852. CP_MEC1_F32_INT_DIS__FATAL_EDC_ERROR_INT__SHIFT
  74853. CP_MEC1_F32_INT_DIS__GPF_INT_CPC_MASK
  74854. CP_MEC1_F32_INT_DIS__GPF_INT_CPC__SHIFT
  74855. CP_MEC1_F32_INT_DIS__GPF_INT_CPF_MASK
  74856. CP_MEC1_F32_INT_DIS__GPF_INT_CPF__SHIFT
  74857. CP_MEC1_F32_INT_DIS__GPF_INT_DMA_MASK
  74858. CP_MEC1_F32_INT_DIS__GPF_INT_DMA__SHIFT
  74859. CP_MEC1_F32_INT_DIS__IQ_TIMER_INT_MASK
  74860. CP_MEC1_F32_INT_DIS__IQ_TIMER_INT__SHIFT
  74861. CP_MEC1_F32_INT_DIS__PRIV_REG_INT_MASK
  74862. CP_MEC1_F32_INT_DIS__PRIV_REG_INT__SHIFT
  74863. CP_MEC1_F32_INT_DIS__QUEUE_MESSAGE_INT_MASK
  74864. CP_MEC1_F32_INT_DIS__QUEUE_MESSAGE_INT__SHIFT
  74865. CP_MEC1_F32_INT_DIS__RESERVED_BIT_ERR_INT_MASK
  74866. CP_MEC1_F32_INT_DIS__RESERVED_BIT_ERR_INT__SHIFT
  74867. CP_MEC1_F32_INT_DIS__SUA_VIOLATION_INT_MASK
  74868. CP_MEC1_F32_INT_DIS__SUA_VIOLATION_INT__SHIFT
  74869. CP_MEC1_F32_INT_DIS__WAVE_RESTORE_INT_MASK
  74870. CP_MEC1_F32_INT_DIS__WAVE_RESTORE_INT__SHIFT
  74871. CP_MEC1_INSTR_PNTR__INSTR_PNTR_MASK
  74872. CP_MEC1_INSTR_PNTR__INSTR_PNTR__SHIFT
  74873. CP_MEC1_INTR_ROUTINE_START__IR_START_MASK
  74874. CP_MEC1_INTR_ROUTINE_START__IR_START__SHIFT
  74875. CP_MEC1_PRGRM_CNTR_START__IP_START_MASK
  74876. CP_MEC1_PRGRM_CNTR_START__IP_START__SHIFT
  74877. CP_MEC2_F32_INTERRUPT__PRIV_REG_INT_MASK
  74878. CP_MEC2_F32_INTERRUPT__PRIV_REG_INT__SHIFT
  74879. CP_MEC2_F32_INT_DIS__EDC_DMA_FED_INT_MASK
  74880. CP_MEC2_F32_INT_DIS__EDC_DMA_FED_INT__SHIFT
  74881. CP_MEC2_F32_INT_DIS__EDC_GDS_FED_INT_MASK
  74882. CP_MEC2_F32_INT_DIS__EDC_GDS_FED_INT__SHIFT
  74883. CP_MEC2_F32_INT_DIS__EDC_ROQ_FED_INT_MASK
  74884. CP_MEC2_F32_INT_DIS__EDC_ROQ_FED_INT__SHIFT
  74885. CP_MEC2_F32_INT_DIS__EDC_SCRATCH_FED_INT_MASK
  74886. CP_MEC2_F32_INT_DIS__EDC_SCRATCH_FED_INT__SHIFT
  74887. CP_MEC2_F32_INT_DIS__EDC_SR_MEM_FED_INT_MASK
  74888. CP_MEC2_F32_INT_DIS__EDC_SR_MEM_FED_INT__SHIFT
  74889. CP_MEC2_F32_INT_DIS__EDC_TC_FED_INT_MASK
  74890. CP_MEC2_F32_INT_DIS__EDC_TC_FED_INT__SHIFT
  74891. CP_MEC2_F32_INT_DIS__FATAL_EDC_ERROR_INT_MASK
  74892. CP_MEC2_F32_INT_DIS__FATAL_EDC_ERROR_INT__SHIFT
  74893. CP_MEC2_F32_INT_DIS__GPF_INT_CPC_MASK
  74894. CP_MEC2_F32_INT_DIS__GPF_INT_CPC__SHIFT
  74895. CP_MEC2_F32_INT_DIS__GPF_INT_CPF_MASK
  74896. CP_MEC2_F32_INT_DIS__GPF_INT_CPF__SHIFT
  74897. CP_MEC2_F32_INT_DIS__GPF_INT_DMA_MASK
  74898. CP_MEC2_F32_INT_DIS__GPF_INT_DMA__SHIFT
  74899. CP_MEC2_F32_INT_DIS__IQ_TIMER_INT_MASK
  74900. CP_MEC2_F32_INT_DIS__IQ_TIMER_INT__SHIFT
  74901. CP_MEC2_F32_INT_DIS__PRIV_REG_INT_MASK
  74902. CP_MEC2_F32_INT_DIS__PRIV_REG_INT__SHIFT
  74903. CP_MEC2_F32_INT_DIS__QUEUE_MESSAGE_INT_MASK
  74904. CP_MEC2_F32_INT_DIS__QUEUE_MESSAGE_INT__SHIFT
  74905. CP_MEC2_F32_INT_DIS__RESERVED_BIT_ERR_INT_MASK
  74906. CP_MEC2_F32_INT_DIS__RESERVED_BIT_ERR_INT__SHIFT
  74907. CP_MEC2_F32_INT_DIS__SUA_VIOLATION_INT_MASK
  74908. CP_MEC2_F32_INT_DIS__SUA_VIOLATION_INT__SHIFT
  74909. CP_MEC2_F32_INT_DIS__WAVE_RESTORE_INT_MASK
  74910. CP_MEC2_F32_INT_DIS__WAVE_RESTORE_INT__SHIFT
  74911. CP_MEC2_INSTR_PNTR__INSTR_PNTR_MASK
  74912. CP_MEC2_INSTR_PNTR__INSTR_PNTR__SHIFT
  74913. CP_MEC2_INTR_ROUTINE_START__IR_START_MASK
  74914. CP_MEC2_INTR_ROUTINE_START__IR_START__SHIFT
  74915. CP_MEC2_PRGRM_CNTR_START__IP_START_MASK
  74916. CP_MEC2_PRGRM_CNTR_START__IP_START__SHIFT
  74917. CP_MEC_CNTL
  74918. CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK
  74919. CP_MEC_CNTL__MEC_INVALIDATE_ICACHE__SHIFT
  74920. CP_MEC_CNTL__MEC_ME1_HALT_MASK
  74921. CP_MEC_CNTL__MEC_ME1_HALT__SHIFT
  74922. CP_MEC_CNTL__MEC_ME1_PIPE0_RESET_MASK
  74923. CP_MEC_CNTL__MEC_ME1_PIPE0_RESET__SHIFT
  74924. CP_MEC_CNTL__MEC_ME1_PIPE1_RESET_MASK
  74925. CP_MEC_CNTL__MEC_ME1_PIPE1_RESET__SHIFT
  74926. CP_MEC_CNTL__MEC_ME1_PIPE2_RESET_MASK
  74927. CP_MEC_CNTL__MEC_ME1_PIPE2_RESET__SHIFT
  74928. CP_MEC_CNTL__MEC_ME1_PIPE3_RESET_MASK
  74929. CP_MEC_CNTL__MEC_ME1_PIPE3_RESET__SHIFT
  74930. CP_MEC_CNTL__MEC_ME1_STEP_MASK
  74931. CP_MEC_CNTL__MEC_ME1_STEP__SHIFT
  74932. CP_MEC_CNTL__MEC_ME2_HALT_MASK
  74933. CP_MEC_CNTL__MEC_ME2_HALT__SHIFT
  74934. CP_MEC_CNTL__MEC_ME2_PIPE0_RESET_MASK
  74935. CP_MEC_CNTL__MEC_ME2_PIPE0_RESET__SHIFT
  74936. CP_MEC_CNTL__MEC_ME2_PIPE1_RESET_MASK
  74937. CP_MEC_CNTL__MEC_ME2_PIPE1_RESET__SHIFT
  74938. CP_MEC_CNTL__MEC_ME2_PIPE2_RESET_MASK
  74939. CP_MEC_CNTL__MEC_ME2_PIPE2_RESET__SHIFT
  74940. CP_MEC_CNTL__MEC_ME2_PIPE3_RESET_MASK
  74941. CP_MEC_CNTL__MEC_ME2_PIPE3_RESET__SHIFT
  74942. CP_MEC_CNTL__MEC_ME2_STEP_MASK
  74943. CP_MEC_CNTL__MEC_ME2_STEP__SHIFT
  74944. CP_MEC_DOORBELL_RANGE_LOWER__DOORBELL_RANGE_LOWER_MASK
  74945. CP_MEC_DOORBELL_RANGE_LOWER__DOORBELL_RANGE_LOWER__SHIFT
  74946. CP_MEC_DOORBELL_RANGE_UPPER__DOORBELL_RANGE_UPPER_MASK
  74947. CP_MEC_DOORBELL_RANGE_UPPER__DOORBELL_RANGE_UPPER__SHIFT
  74948. CP_MEC_JT_STAT__JT_LOADED_MASK
  74949. CP_MEC_JT_STAT__JT_LOADED__SHIFT
  74950. CP_MEC_JT_STAT__WR_MASK_MASK
  74951. CP_MEC_JT_STAT__WR_MASK__SHIFT
  74952. CP_MEC_ME1_HEADER_DUMP__HEADER_DUMP_MASK
  74953. CP_MEC_ME1_HEADER_DUMP__HEADER_DUMP__SHIFT
  74954. CP_MEC_ME1_UCODE_ADDR
  74955. CP_MEC_ME1_UCODE_ADDR__UCODE_ADDR_MASK
  74956. CP_MEC_ME1_UCODE_ADDR__UCODE_ADDR__SHIFT
  74957. CP_MEC_ME1_UCODE_DATA
  74958. CP_MEC_ME1_UCODE_DATA__UCODE_DATA_MASK
  74959. CP_MEC_ME1_UCODE_DATA__UCODE_DATA__SHIFT
  74960. CP_MEC_ME2_HEADER_DUMP__HEADER_DUMP_MASK
  74961. CP_MEC_ME2_HEADER_DUMP__HEADER_DUMP__SHIFT
  74962. CP_MEC_ME2_UCODE_ADDR
  74963. CP_MEC_ME2_UCODE_ADDR__UCODE_ADDR_MASK
  74964. CP_MEC_ME2_UCODE_ADDR__UCODE_ADDR__SHIFT
  74965. CP_MEC_ME2_UCODE_DATA
  74966. CP_MEC_ME2_UCODE_DATA__UCODE_DATA_MASK
  74967. CP_MEC_ME2_UCODE_DATA__UCODE_DATA__SHIFT
  74968. CP_MEC_TABLE_OFFSET
  74969. CP_MEM_LS_EN
  74970. CP_MEM_SLP_CNTL
  74971. CP_MEM_SLP_CNTL__CP_LS_DS_BUSY_OVERRIDE_MASK
  74972. CP_MEM_SLP_CNTL__CP_LS_DS_BUSY_OVERRIDE__SHIFT
  74973. CP_MEM_SLP_CNTL__CP_MEM_DS_EN_MASK
  74974. CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT
  74975. CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK
  74976. CP_MEM_SLP_CNTL__CP_MEM_LS_EN__SHIFT
  74977. CP_MEM_SLP_CNTL__CP_MEM_LS_OFF_DELAY_MASK
  74978. CP_MEM_SLP_CNTL__CP_MEM_LS_OFF_DELAY__SHIFT
  74979. CP_MEM_SLP_CNTL__CP_MEM_LS_ON_DELAY_MASK
  74980. CP_MEM_SLP_CNTL__CP_MEM_LS_ON_DELAY__SHIFT
  74981. CP_MEM_SLP_CNTL__RESERVED1_MASK
  74982. CP_MEM_SLP_CNTL__RESERVED1__SHIFT
  74983. CP_MEM_SLP_CNTL__RESERVED_MASK
  74984. CP_MEM_SLP_CNTL__RESERVED__SHIFT
  74985. CP_MEM_TO_MEM
  74986. CP_MEM_TO_MEM_0_DOUBLE
  74987. CP_MEM_TO_MEM_0_NEG_A
  74988. CP_MEM_TO_MEM_0_NEG_B
  74989. CP_MEM_TO_MEM_0_NEG_C
  74990. CP_MEM_TO_REG
  74991. CP_MEM_TO_REG_0_64B
  74992. CP_MEM_TO_REG_0_ACCUMULATE
  74993. CP_MEM_TO_REG_0_CNT
  74994. CP_MEM_TO_REG_0_CNT__MASK
  74995. CP_MEM_TO_REG_0_CNT__SHIFT
  74996. CP_MEM_TO_REG_0_REG
  74997. CP_MEM_TO_REG_0_REG__MASK
  74998. CP_MEM_TO_REG_0_REG__SHIFT
  74999. CP_MEM_TO_REG_1_SRC
  75000. CP_MEM_TO_REG_1_SRC__MASK
  75001. CP_MEM_TO_REG_1_SRC__SHIFT
  75002. CP_MEM_TO_REG_2_SRC_HI
  75003. CP_MEM_TO_REG_2_SRC_HI__MASK
  75004. CP_MEM_TO_REG_2_SRC_HI__SHIFT
  75005. CP_MEM_WRITE
  75006. CP_MEM_WRITE_CNTR
  75007. CP_MEQ_AVAIL__MEQ_CNT_MASK
  75008. CP_MEQ_AVAIL__MEQ_CNT__SHIFT
  75009. CP_MEQ_STAT__MEQ_RPTR_MASK
  75010. CP_MEQ_STAT__MEQ_RPTR__SHIFT
  75011. CP_MEQ_STAT__MEQ_WPTR_MASK
  75012. CP_MEQ_STAT__MEQ_WPTR__SHIFT
  75013. CP_MEQ_STQ_THRESHOLD__STQ_START_MASK
  75014. CP_MEQ_STQ_THRESHOLD__STQ_START__SHIFT
  75015. CP_MEQ_THRESHOLDS
  75016. CP_MEQ_THRESHOLDS__MEQ1_START_MASK
  75017. CP_MEQ_THRESHOLDS__MEQ1_START__SHIFT
  75018. CP_MEQ_THRESHOLDS__MEQ2_START_MASK
  75019. CP_MEQ_THRESHOLDS__MEQ2_START__SHIFT
  75020. CP_MES_CNTL__MES_HALT_MASK
  75021. CP_MES_CNTL__MES_HALT__SHIFT
  75022. CP_MES_CNTL__MES_INVALIDATE_ICACHE_MASK
  75023. CP_MES_CNTL__MES_INVALIDATE_ICACHE__SHIFT
  75024. CP_MES_CNTL__MES_PIPE0_ACTIVE_MASK
  75025. CP_MES_CNTL__MES_PIPE0_ACTIVE__SHIFT
  75026. CP_MES_CNTL__MES_PIPE0_RESET_MASK
  75027. CP_MES_CNTL__MES_PIPE0_RESET__SHIFT
  75028. CP_MES_CNTL__MES_PIPE1_ACTIVE_MASK
  75029. CP_MES_CNTL__MES_PIPE1_ACTIVE__SHIFT
  75030. CP_MES_CNTL__MES_PIPE1_RESET_MASK
  75031. CP_MES_CNTL__MES_PIPE1_RESET__SHIFT
  75032. CP_MES_CNTL__MES_PIPE2_ACTIVE_MASK
  75033. CP_MES_CNTL__MES_PIPE2_ACTIVE__SHIFT
  75034. CP_MES_CNTL__MES_PIPE2_RESET_MASK
  75035. CP_MES_CNTL__MES_PIPE2_RESET__SHIFT
  75036. CP_MES_CNTL__MES_PIPE3_ACTIVE_MASK
  75037. CP_MES_CNTL__MES_PIPE3_ACTIVE__SHIFT
  75038. CP_MES_CNTL__MES_PIPE3_RESET_MASK
  75039. CP_MES_CNTL__MES_PIPE3_RESET__SHIFT
  75040. CP_MES_CNTL__MES_STEP_MASK
  75041. CP_MES_CNTL__MES_STEP__SHIFT
  75042. CP_MES_DCSR__CSR_MASK
  75043. CP_MES_DCSR__CSR__SHIFT
  75044. CP_MES_DC_BASE_CNTL__CACHE_POLICY_MASK
  75045. CP_MES_DC_BASE_CNTL__CACHE_POLICY__SHIFT
  75046. CP_MES_DC_BASE_CNTL__VMID_MASK
  75047. CP_MES_DC_BASE_CNTL__VMID__SHIFT
  75048. CP_MES_DC_BASE_HI__DC_BASE_HI_MASK
  75049. CP_MES_DC_BASE_HI__DC_BASE_HI__SHIFT
  75050. CP_MES_DC_BASE_LO__DC_BASE_LO_MASK
  75051. CP_MES_DC_BASE_LO__DC_BASE_LO__SHIFT
  75052. CP_MES_DC_OP_CNTL__BYPASS_ALL_MASK
  75053. CP_MES_DC_OP_CNTL__BYPASS_ALL__SHIFT
  75054. CP_MES_DC_OP_CNTL__BYPASS_UNCACHED_MASK
  75055. CP_MES_DC_OP_CNTL__BYPASS_UNCACHED__SHIFT
  75056. CP_MES_DC_OP_CNTL__DCACHE_PRIMED_MASK
  75057. CP_MES_DC_OP_CNTL__DCACHE_PRIMED__SHIFT
  75058. CP_MES_DC_OP_CNTL__INVALIDATE_DCACHE_COMPLETE_MASK
  75059. CP_MES_DC_OP_CNTL__INVALIDATE_DCACHE_COMPLETE__SHIFT
  75060. CP_MES_DC_OP_CNTL__INVALIDATE_DCACHE_MASK
  75061. CP_MES_DC_OP_CNTL__INVALIDATE_DCACHE__SHIFT
  75062. CP_MES_DC_OP_CNTL__PRIME_DCACHE_MASK
  75063. CP_MES_DC_OP_CNTL__PRIME_DCACHE__SHIFT
  75064. CP_MES_DMCONTROL__CONTROL_MASK
  75065. CP_MES_DMCONTROL__CONTROL__SHIFT
  75066. CP_MES_DMINFO__INFO_MASK
  75067. CP_MES_DMINFO__INFO__SHIFT
  75068. CP_MES_DM_INDEX_ADDR__ADDR_MASK
  75069. CP_MES_DM_INDEX_ADDR__ADDR__SHIFT
  75070. CP_MES_DM_INDEX_DATA__DATA_MASK
  75071. CP_MES_DM_INDEX_DATA__DATA__SHIFT
  75072. CP_MES_DOORBELL_CONTROL1__DOORBELL_EN_MASK
  75073. CP_MES_DOORBELL_CONTROL1__DOORBELL_EN__SHIFT
  75074. CP_MES_DOORBELL_CONTROL1__DOORBELL_HIT_MASK
  75075. CP_MES_DOORBELL_CONTROL1__DOORBELL_HIT__SHIFT
  75076. CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK
  75077. CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET__SHIFT
  75078. CP_MES_DOORBELL_CONTROL2__DOORBELL_EN_MASK
  75079. CP_MES_DOORBELL_CONTROL2__DOORBELL_EN__SHIFT
  75080. CP_MES_DOORBELL_CONTROL2__DOORBELL_HIT_MASK
  75081. CP_MES_DOORBELL_CONTROL2__DOORBELL_HIT__SHIFT
  75082. CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK
  75083. CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET__SHIFT
  75084. CP_MES_DOORBELL_CONTROL3__DOORBELL_EN_MASK
  75085. CP_MES_DOORBELL_CONTROL3__DOORBELL_EN__SHIFT
  75086. CP_MES_DOORBELL_CONTROL3__DOORBELL_HIT_MASK
  75087. CP_MES_DOORBELL_CONTROL3__DOORBELL_HIT__SHIFT
  75088. CP_MES_DOORBELL_CONTROL3__DOORBELL_OFFSET_MASK
  75089. CP_MES_DOORBELL_CONTROL3__DOORBELL_OFFSET__SHIFT
  75090. CP_MES_DOORBELL_CONTROL4__DOORBELL_EN_MASK
  75091. CP_MES_DOORBELL_CONTROL4__DOORBELL_EN__SHIFT
  75092. CP_MES_DOORBELL_CONTROL4__DOORBELL_HIT_MASK
  75093. CP_MES_DOORBELL_CONTROL4__DOORBELL_HIT__SHIFT
  75094. CP_MES_DOORBELL_CONTROL4__DOORBELL_OFFSET_MASK
  75095. CP_MES_DOORBELL_CONTROL4__DOORBELL_OFFSET__SHIFT
  75096. CP_MES_DOORBELL_CONTROL5__DOORBELL_EN_MASK
  75097. CP_MES_DOORBELL_CONTROL5__DOORBELL_EN__SHIFT
  75098. CP_MES_DOORBELL_CONTROL5__DOORBELL_HIT_MASK
  75099. CP_MES_DOORBELL_CONTROL5__DOORBELL_HIT__SHIFT
  75100. CP_MES_DOORBELL_CONTROL5__DOORBELL_OFFSET_MASK
  75101. CP_MES_DOORBELL_CONTROL5__DOORBELL_OFFSET__SHIFT
  75102. CP_MES_DOORBELL_CONTROL6__DOORBELL_EN_MASK
  75103. CP_MES_DOORBELL_CONTROL6__DOORBELL_EN__SHIFT
  75104. CP_MES_DOORBELL_CONTROL6__DOORBELL_HIT_MASK
  75105. CP_MES_DOORBELL_CONTROL6__DOORBELL_HIT__SHIFT
  75106. CP_MES_DOORBELL_CONTROL6__DOORBELL_OFFSET_MASK
  75107. CP_MES_DOORBELL_CONTROL6__DOORBELL_OFFSET__SHIFT
  75108. CP_MES_DPC_HIGH__INSTR_PNTR_MASK
  75109. CP_MES_DPC_HIGH__INSTR_PNTR__SHIFT
  75110. CP_MES_DPC_LOW__INSTR_PNTR_MASK
  75111. CP_MES_DPC_LOW__INSTR_PNTR__SHIFT
  75112. CP_MES_DSCRATCH_HIGH__DATA_MASK
  75113. CP_MES_DSCRATCH_HIGH__DATA__SHIFT
  75114. CP_MES_DSCRATCH_LOW__DATA_MASK
  75115. CP_MES_DSCRATCH_LOW__DATA__SHIFT
  75116. CP_MES_GP0_HI__M_RET_ADDR_MASK
  75117. CP_MES_GP0_HI__M_RET_ADDR__SHIFT
  75118. CP_MES_GP0_LO__DATA_MASK
  75119. CP_MES_GP0_LO__DATA__SHIFT
  75120. CP_MES_GP0_LO__PG_VIRT_HALTED_MASK
  75121. CP_MES_GP0_LO__PG_VIRT_HALTED__SHIFT
  75122. CP_MES_GP1_HI__RD_WR_SELECT_HI_MASK
  75123. CP_MES_GP1_HI__RD_WR_SELECT_HI__SHIFT
  75124. CP_MES_GP1_LO__RD_WR_SELECT_LO_MASK
  75125. CP_MES_GP1_LO__RD_WR_SELECT_LO__SHIFT
  75126. CP_MES_GP2_HI__STACK_PNTR_HI_MASK
  75127. CP_MES_GP2_HI__STACK_PNTR_HI__SHIFT
  75128. CP_MES_GP2_LO__STACK_PNTR_LO_MASK
  75129. CP_MES_GP2_LO__STACK_PNTR_LO__SHIFT
  75130. CP_MES_GP3_HI__DATA_MASK
  75131. CP_MES_GP3_HI__DATA__SHIFT
  75132. CP_MES_GP3_LO__DATA_MASK
  75133. CP_MES_GP3_LO__DATA__SHIFT
  75134. CP_MES_GP4_HI__DATA_MASK
  75135. CP_MES_GP4_HI__DATA__SHIFT
  75136. CP_MES_GP4_LO__DATA_MASK
  75137. CP_MES_GP4_LO__DATA__SHIFT
  75138. CP_MES_GP5_HI__M_RET_ADDR_MASK
  75139. CP_MES_GP5_HI__M_RET_ADDR__SHIFT
  75140. CP_MES_GP5_LO__DATA_MASK
  75141. CP_MES_GP5_LO__DATA__SHIFT
  75142. CP_MES_GP5_LO__PG_VIRT_HALTED_MASK
  75143. CP_MES_GP5_LO__PG_VIRT_HALTED__SHIFT
  75144. CP_MES_GP6_HI__RD_WR_SELECT_HI_MASK
  75145. CP_MES_GP6_HI__RD_WR_SELECT_HI__SHIFT
  75146. CP_MES_GP6_LO__RD_WR_SELECT_LO_MASK
  75147. CP_MES_GP6_LO__RD_WR_SELECT_LO__SHIFT
  75148. CP_MES_GP7_HI__STACK_PNTR_HI_MASK
  75149. CP_MES_GP7_HI__STACK_PNTR_HI__SHIFT
  75150. CP_MES_GP7_LO__STACK_PNTR_LO_MASK
  75151. CP_MES_GP7_LO__STACK_PNTR_LO__SHIFT
  75152. CP_MES_GP8_HI__DATA_MASK
  75153. CP_MES_GP8_HI__DATA__SHIFT
  75154. CP_MES_GP8_LO__DATA_MASK
  75155. CP_MES_GP8_LO__DATA__SHIFT
  75156. CP_MES_GP9_HI__DATA_MASK
  75157. CP_MES_GP9_HI__DATA__SHIFT
  75158. CP_MES_GP9_LO__DATA_MASK
  75159. CP_MES_GP9_LO__DATA__SHIFT
  75160. CP_MES_HEADER_DUMP__HEADER_DUMP_MASK
  75161. CP_MES_HEADER_DUMP__HEADER_DUMP__SHIFT
  75162. CP_MES_IC_BASE_CNTL__CACHE_POLICY_MASK
  75163. CP_MES_IC_BASE_CNTL__CACHE_POLICY__SHIFT
  75164. CP_MES_IC_BASE_CNTL__EXE_DISABLE_MASK
  75165. CP_MES_IC_BASE_CNTL__EXE_DISABLE__SHIFT
  75166. CP_MES_IC_BASE_CNTL__VMID_MASK
  75167. CP_MES_IC_BASE_CNTL__VMID__SHIFT
  75168. CP_MES_IC_BASE_HI__IC_BASE_HI_MASK
  75169. CP_MES_IC_BASE_HI__IC_BASE_HI__SHIFT
  75170. CP_MES_IC_BASE_LO__IC_BASE_LO_MASK
  75171. CP_MES_IC_BASE_LO__IC_BASE_LO__SHIFT
  75172. CP_MES_IC_OP_CNTL__ICACHE_PRIMED_MASK
  75173. CP_MES_IC_OP_CNTL__ICACHE_PRIMED__SHIFT
  75174. CP_MES_IC_OP_CNTL__INVALIDATE_CACHE_MASK
  75175. CP_MES_IC_OP_CNTL__INVALIDATE_CACHE__SHIFT
  75176. CP_MES_IC_OP_CNTL__PRIME_ICACHE_MASK
  75177. CP_MES_IC_OP_CNTL__PRIME_ICACHE__SHIFT
  75178. CP_MES_INSTR_PNTR__INSTR_PNTR_MASK
  75179. CP_MES_INSTR_PNTR__INSTR_PNTR__SHIFT
  75180. CP_MES_INTERRUPT__MES_INT_MASK
  75181. CP_MES_INTERRUPT__MES_INT__SHIFT
  75182. CP_MES_INTERRUPT__PENDING_INTERRUPT_MASK
  75183. CP_MES_INTERRUPT__PENDING_INTERRUPT__SHIFT
  75184. CP_MES_INTR_ROUTINE_START__IR_START_MASK
  75185. CP_MES_INTR_ROUTINE_START__IR_START__SHIFT
  75186. CP_MES_LOCAL_APERTURE__APERTURE_MASK
  75187. CP_MES_LOCAL_APERTURE__APERTURE__SHIFT
  75188. CP_MES_LOCAL_BASE0_HI__BASE0_HI_MASK
  75189. CP_MES_LOCAL_BASE0_HI__BASE0_HI__SHIFT
  75190. CP_MES_LOCAL_BASE0_LO__BASE0_LO_MASK
  75191. CP_MES_LOCAL_BASE0_LO__BASE0_LO__SHIFT
  75192. CP_MES_LOCAL_MASK0_HI__MASK0_HI_MASK
  75193. CP_MES_LOCAL_MASK0_HI__MASK0_HI__SHIFT
  75194. CP_MES_LOCAL_MASK0_LO__MASK0_LO_MASK
  75195. CP_MES_LOCAL_MASK0_LO__MASK0_LO__SHIFT
  75196. CP_MES_MARCHID_HI__MARCHID_HI_MASK
  75197. CP_MES_MARCHID_HI__MARCHID_HI__SHIFT
  75198. CP_MES_MARCHID_LO__MARCHID_LO_MASK
  75199. CP_MES_MARCHID_LO__MARCHID_LO__SHIFT
  75200. CP_MES_MBADADDR_HI__ADDR_HI_MASK
  75201. CP_MES_MBADADDR_HI__ADDR_HI__SHIFT
  75202. CP_MES_MBADADDR_LO__ADDR_LO_MASK
  75203. CP_MES_MBADADDR_LO__ADDR_LO__SHIFT
  75204. CP_MES_MCAUSE_HI__CAUSE_HI_MASK
  75205. CP_MES_MCAUSE_HI__CAUSE_HI__SHIFT
  75206. CP_MES_MCAUSE_LO__CAUSE_LO_MASK
  75207. CP_MES_MCAUSE_LO__CAUSE_LO__SHIFT
  75208. CP_MES_MCYCLE_HI__CYCLE_HI_MASK
  75209. CP_MES_MCYCLE_HI__CYCLE_HI__SHIFT
  75210. CP_MES_MCYCLE_LO__CYCLE_LO_MASK
  75211. CP_MES_MCYCLE_LO__CYCLE_LO__SHIFT
  75212. CP_MES_MDBASE_HI__BASE_HI_MASK
  75213. CP_MES_MDBASE_HI__BASE_HI__SHIFT
  75214. CP_MES_MDBASE_LO__BASE_LO_MASK
  75215. CP_MES_MDBASE_LO__BASE_LO__SHIFT
  75216. CP_MES_MDBOUND_HI__BOUND_HI_MASK
  75217. CP_MES_MDBOUND_HI__BOUND_HI__SHIFT
  75218. CP_MES_MDBOUND_LO__BOUND_LO_MASK
  75219. CP_MES_MDBOUND_LO__BOUND_LO__SHIFT
  75220. CP_MES_MEPC_HI__MEPC_HI_MASK
  75221. CP_MES_MEPC_HI__MEPC_HI__SHIFT
  75222. CP_MES_MEPC_LO__MEPC_LO_MASK
  75223. CP_MES_MEPC_LO__MEPC_LO__SHIFT
  75224. CP_MES_MHARTID_HI__MHARTID_HI_MASK
  75225. CP_MES_MHARTID_HI__MHARTID_HI__SHIFT
  75226. CP_MES_MHARTID_LO__MHARTID_LO_MASK
  75227. CP_MES_MHARTID_LO__MHARTID_LO__SHIFT
  75228. CP_MES_MIBASE_HI__IC_BASE_HI_MASK
  75229. CP_MES_MIBASE_HI__IC_BASE_HI__SHIFT
  75230. CP_MES_MIBASE_LO__IC_BASE_LO_MASK
  75231. CP_MES_MIBASE_LO__IC_BASE_LO__SHIFT
  75232. CP_MES_MIBOUND_HI__BOUND_HI_MASK
  75233. CP_MES_MIBOUND_HI__BOUND_HI__SHIFT
  75234. CP_MES_MIBOUND_LO__BOUND_LO_MASK
  75235. CP_MES_MIBOUND_LO__BOUND_LO__SHIFT
  75236. CP_MES_MIE_HI__MES_INT_MASK
  75237. CP_MES_MIE_HI__MES_INT__SHIFT
  75238. CP_MES_MIE_LO__MES_INT_MASK
  75239. CP_MES_MIE_LO__MES_INT__SHIFT
  75240. CP_MES_MIMPID_HI__MIMPID_HI_MASK
  75241. CP_MES_MIMPID_HI__MIMPID_HI__SHIFT
  75242. CP_MES_MIMPID_LO__MIMPID_LO_MASK
  75243. CP_MES_MIMPID_LO__MIMPID_LO__SHIFT
  75244. CP_MES_MINSTRET_HI__INSTRET_HI_MASK
  75245. CP_MES_MINSTRET_HI__INSTRET_HI__SHIFT
  75246. CP_MES_MINSTRET_LO__INSTRET_LO_MASK
  75247. CP_MES_MINSTRET_LO__INSTRET_LO__SHIFT
  75248. CP_MES_MIP_HI__MIP_HI_MASK
  75249. CP_MES_MIP_HI__MIP_HI__SHIFT
  75250. CP_MES_MIP_LO__MIP_LO_MASK
  75251. CP_MES_MIP_LO__MIP_LO__SHIFT
  75252. CP_MES_MISA_HI__MISA_HI_MASK
  75253. CP_MES_MISA_HI__MISA_HI__SHIFT
  75254. CP_MES_MISA_LO__MISA_LO_MASK
  75255. CP_MES_MISA_LO__MISA_LO__SHIFT
  75256. CP_MES_MSCRATCH_HI__DATA_MASK
  75257. CP_MES_MSCRATCH_HI__DATA__SHIFT
  75258. CP_MES_MSCRATCH_LO__DATA_MASK
  75259. CP_MES_MSCRATCH_LO__DATA__SHIFT
  75260. CP_MES_MSTATUS_HI__STATUS_HI_MASK
  75261. CP_MES_MSTATUS_HI__STATUS_HI__SHIFT
  75262. CP_MES_MSTATUS_LO__STATUS_LO_MASK
  75263. CP_MES_MSTATUS_LO__STATUS_LO__SHIFT
  75264. CP_MES_MTIMECMP_HI__TIME_HI_MASK
  75265. CP_MES_MTIMECMP_HI__TIME_HI__SHIFT
  75266. CP_MES_MTIMECMP_LO__TIME_LO_MASK
  75267. CP_MES_MTIMECMP_LO__TIME_LO__SHIFT
  75268. CP_MES_MTIME_HI__TIME_HI_MASK
  75269. CP_MES_MTIME_HI__TIME_HI__SHIFT
  75270. CP_MES_MTIME_LO__TIME_LO_MASK
  75271. CP_MES_MTIME_LO__TIME_LO__SHIFT
  75272. CP_MES_MTVEC_HI__ADDR_LO_MASK
  75273. CP_MES_MTVEC_HI__ADDR_LO__SHIFT
  75274. CP_MES_MTVEC_LO__ADDR_LO_MASK
  75275. CP_MES_MTVEC_LO__ADDR_LO__SHIFT
  75276. CP_MES_MVENDORID_HI__MVENDORID_HI_MASK
  75277. CP_MES_MVENDORID_HI__MVENDORID_HI__SHIFT
  75278. CP_MES_MVENDORID_LO__MVENDORID_LO_MASK
  75279. CP_MES_MVENDORID_LO__MVENDORID_LO__SHIFT
  75280. CP_MES_PERFCOUNT_CNTL__EVENT_SEL_MASK
  75281. CP_MES_PERFCOUNT_CNTL__EVENT_SEL__SHIFT
  75282. CP_MES_PIPE0_PRIORITY__PRIORITY_MASK
  75283. CP_MES_PIPE0_PRIORITY__PRIORITY__SHIFT
  75284. CP_MES_PIPE1_PRIORITY__PRIORITY_MASK
  75285. CP_MES_PIPE1_PRIORITY__PRIORITY__SHIFT
  75286. CP_MES_PIPE2_PRIORITY__PRIORITY_MASK
  75287. CP_MES_PIPE2_PRIORITY__PRIORITY__SHIFT
  75288. CP_MES_PIPE3_PRIORITY__PRIORITY_MASK
  75289. CP_MES_PIPE3_PRIORITY__PRIORITY__SHIFT
  75290. CP_MES_PIPE_PRIORITY_CNTS__PRIORITY1_CNT_MASK
  75291. CP_MES_PIPE_PRIORITY_CNTS__PRIORITY1_CNT__SHIFT
  75292. CP_MES_PIPE_PRIORITY_CNTS__PRIORITY2A_CNT_MASK
  75293. CP_MES_PIPE_PRIORITY_CNTS__PRIORITY2A_CNT__SHIFT
  75294. CP_MES_PIPE_PRIORITY_CNTS__PRIORITY2B_CNT_MASK
  75295. CP_MES_PIPE_PRIORITY_CNTS__PRIORITY2B_CNT__SHIFT
  75296. CP_MES_PIPE_PRIORITY_CNTS__PRIORITY3_CNT_MASK
  75297. CP_MES_PIPE_PRIORITY_CNTS__PRIORITY3_CNT__SHIFT
  75298. CP_MES_PRGRM_CNTR_START__IP_START_MASK
  75299. CP_MES_PRGRM_CNTR_START__IP_START__SHIFT
  75300. CP_MES_PROCESS_QUANTUM_PIPE0__QUANTUM_DURATION_MASK
  75301. CP_MES_PROCESS_QUANTUM_PIPE0__QUANTUM_DURATION__SHIFT
  75302. CP_MES_PROCESS_QUANTUM_PIPE0__QUANTUM_EN_MASK
  75303. CP_MES_PROCESS_QUANTUM_PIPE0__QUANTUM_EN__SHIFT
  75304. CP_MES_PROCESS_QUANTUM_PIPE0__QUANTUM_SCALE_MASK
  75305. CP_MES_PROCESS_QUANTUM_PIPE0__QUANTUM_SCALE__SHIFT
  75306. CP_MES_PROCESS_QUANTUM_PIPE0__TIMER_EXPIRED_MASK
  75307. CP_MES_PROCESS_QUANTUM_PIPE0__TIMER_EXPIRED__SHIFT
  75308. CP_MES_PROCESS_QUANTUM_PIPE1__QUANTUM_DURATION_MASK
  75309. CP_MES_PROCESS_QUANTUM_PIPE1__QUANTUM_DURATION__SHIFT
  75310. CP_MES_PROCESS_QUANTUM_PIPE1__QUANTUM_EN_MASK
  75311. CP_MES_PROCESS_QUANTUM_PIPE1__QUANTUM_EN__SHIFT
  75312. CP_MES_PROCESS_QUANTUM_PIPE1__QUANTUM_SCALE_MASK
  75313. CP_MES_PROCESS_QUANTUM_PIPE1__QUANTUM_SCALE__SHIFT
  75314. CP_MES_PROCESS_QUANTUM_PIPE1__TIMER_EXPIRED_MASK
  75315. CP_MES_PROCESS_QUANTUM_PIPE1__TIMER_EXPIRED__SHIFT
  75316. CP_MES_SCRATCH_DATA__SCRATCH_DATA_MASK
  75317. CP_MES_SCRATCH_DATA__SCRATCH_DATA__SHIFT
  75318. CP_MES_SCRATCH_INDEX__SCRATCH_INDEX_64BIT_MODE_MASK
  75319. CP_MES_SCRATCH_INDEX__SCRATCH_INDEX_64BIT_MODE__SHIFT
  75320. CP_MES_SCRATCH_INDEX__SCRATCH_INDEX_MASK
  75321. CP_MES_SCRATCH_INDEX__SCRATCH_INDEX__SHIFT
  75322. CP_MES_SETHALTNOTIFICATION__SETHALT_MASK
  75323. CP_MES_SETHALTNOTIFICATION__SETHALT__SHIFT
  75324. CP_MES_TDATA1_HIGH__DATA_MASK
  75325. CP_MES_TDATA1_HIGH__DATA__SHIFT
  75326. CP_MES_TDATA1_LOW__DATA_MASK
  75327. CP_MES_TDATA1_LOW__DATA__SHIFT
  75328. CP_MES_TDATA2_HIGH__DATA_MASK
  75329. CP_MES_TDATA2_HIGH__DATA__SHIFT
  75330. CP_MES_TDATA2_LOW__DATA_MASK
  75331. CP_MES_TDATA2_LOW__DATA__SHIFT
  75332. CP_MES_TDATA3_HIH__DATA_MASK
  75333. CP_MES_TDATA3_HIH__DATA__SHIFT
  75334. CP_MES_TDATA3_LOW__DATA_MASK
  75335. CP_MES_TDATA3_LOW__DATA__SHIFT
  75336. CP_MES_TSELCT_HIGH__TSELECT_MASK
  75337. CP_MES_TSELCT_HIGH__TSELECT__SHIFT
  75338. CP_MES_TSELCT_LOW__TSELECT_MASK
  75339. CP_MES_TSELCT_LOW__TSELECT__SHIFT
  75340. CP_ME_ATOMIC_PREOP_HI__ATOMIC_PREOP_HI_MASK
  75341. CP_ME_ATOMIC_PREOP_HI__ATOMIC_PREOP_HI__SHIFT
  75342. CP_ME_ATOMIC_PREOP_LO__ATOMIC_PREOP_LO_MASK
  75343. CP_ME_ATOMIC_PREOP_LO__ATOMIC_PREOP_LO__SHIFT
  75344. CP_ME_BUSY_CLOCKS
  75345. CP_ME_BUSY_WORKING
  75346. CP_ME_CNTL
  75347. CP_ME_CNTL__CE_HALT_MASK
  75348. CP_ME_CNTL__CE_HALT__SHIFT
  75349. CP_ME_CNTL__CE_INVALIDATE_ICACHE_MASK
  75350. CP_ME_CNTL__CE_INVALIDATE_ICACHE__SHIFT
  75351. CP_ME_CNTL__CE_PIPE0_RESET_MASK
  75352. CP_ME_CNTL__CE_PIPE0_RESET__SHIFT
  75353. CP_ME_CNTL__CE_PIPE1_RESET_MASK
  75354. CP_ME_CNTL__CE_PIPE1_RESET__SHIFT
  75355. CP_ME_CNTL__CE_STEP_MASK
  75356. CP_ME_CNTL__CE_STEP__SHIFT
  75357. CP_ME_CNTL__ME_HALT_MASK
  75358. CP_ME_CNTL__ME_HALT__SHIFT
  75359. CP_ME_CNTL__ME_INVALIDATE_ICACHE_MASK
  75360. CP_ME_CNTL__ME_INVALIDATE_ICACHE__SHIFT
  75361. CP_ME_CNTL__ME_PIPE0_RESET_MASK
  75362. CP_ME_CNTL__ME_PIPE0_RESET__SHIFT
  75363. CP_ME_CNTL__ME_PIPE1_RESET_MASK
  75364. CP_ME_CNTL__ME_PIPE1_RESET__SHIFT
  75365. CP_ME_CNTL__ME_STEP_MASK
  75366. CP_ME_CNTL__ME_STEP__SHIFT
  75367. CP_ME_CNTL__PFP_HALT_MASK
  75368. CP_ME_CNTL__PFP_HALT__SHIFT
  75369. CP_ME_CNTL__PFP_INVALIDATE_ICACHE_MASK
  75370. CP_ME_CNTL__PFP_INVALIDATE_ICACHE__SHIFT
  75371. CP_ME_CNTL__PFP_PIPE0_RESET_MASK
  75372. CP_ME_CNTL__PFP_PIPE0_RESET__SHIFT
  75373. CP_ME_CNTL__PFP_PIPE1_RESET_MASK
  75374. CP_ME_CNTL__PFP_PIPE1_RESET__SHIFT
  75375. CP_ME_CNTL__PFP_STEP_MASK
  75376. CP_ME_CNTL__PFP_STEP__SHIFT
  75377. CP_ME_COHER_BASE_HI__COHER_BASE_HI_256B_MASK
  75378. CP_ME_COHER_BASE_HI__COHER_BASE_HI_256B__SHIFT
  75379. CP_ME_COHER_BASE__COHER_BASE_256B_MASK
  75380. CP_ME_COHER_BASE__COHER_BASE_256B__SHIFT
  75381. CP_ME_COHER_CNTL__CB0_DEST_BASE_ENA_MASK
  75382. CP_ME_COHER_CNTL__CB0_DEST_BASE_ENA__SHIFT
  75383. CP_ME_COHER_CNTL__CB1_DEST_BASE_ENA_MASK
  75384. CP_ME_COHER_CNTL__CB1_DEST_BASE_ENA__SHIFT
  75385. CP_ME_COHER_CNTL__CB2_DEST_BASE_ENA_MASK
  75386. CP_ME_COHER_CNTL__CB2_DEST_BASE_ENA__SHIFT
  75387. CP_ME_COHER_CNTL__CB3_DEST_BASE_ENA_MASK
  75388. CP_ME_COHER_CNTL__CB3_DEST_BASE_ENA__SHIFT
  75389. CP_ME_COHER_CNTL__CB4_DEST_BASE_ENA_MASK
  75390. CP_ME_COHER_CNTL__CB4_DEST_BASE_ENA__SHIFT
  75391. CP_ME_COHER_CNTL__CB5_DEST_BASE_ENA_MASK
  75392. CP_ME_COHER_CNTL__CB5_DEST_BASE_ENA__SHIFT
  75393. CP_ME_COHER_CNTL__CB6_DEST_BASE_ENA_MASK
  75394. CP_ME_COHER_CNTL__CB6_DEST_BASE_ENA__SHIFT
  75395. CP_ME_COHER_CNTL__CB7_DEST_BASE_ENA_MASK
  75396. CP_ME_COHER_CNTL__CB7_DEST_BASE_ENA__SHIFT
  75397. CP_ME_COHER_CNTL__DB_DEST_BASE_ENA_MASK
  75398. CP_ME_COHER_CNTL__DB_DEST_BASE_ENA__SHIFT
  75399. CP_ME_COHER_CNTL__DEST_BASE_0_ENA_MASK
  75400. CP_ME_COHER_CNTL__DEST_BASE_0_ENA__SHIFT
  75401. CP_ME_COHER_CNTL__DEST_BASE_1_ENA_MASK
  75402. CP_ME_COHER_CNTL__DEST_BASE_1_ENA__SHIFT
  75403. CP_ME_COHER_CNTL__DEST_BASE_2_ENA_MASK
  75404. CP_ME_COHER_CNTL__DEST_BASE_2_ENA__SHIFT
  75405. CP_ME_COHER_CNTL__DEST_BASE_3_ENA_MASK
  75406. CP_ME_COHER_CNTL__DEST_BASE_3_ENA__SHIFT
  75407. CP_ME_COHER_SIZE_HI__COHER_SIZE_HI_256B_MASK
  75408. CP_ME_COHER_SIZE_HI__COHER_SIZE_HI_256B__SHIFT
  75409. CP_ME_COHER_SIZE__COHER_SIZE_256B_MASK
  75410. CP_ME_COHER_SIZE__COHER_SIZE_256B__SHIFT
  75411. CP_ME_COHER_STATUS__MATCHING_GFX_CNTX_MASK
  75412. CP_ME_COHER_STATUS__MATCHING_GFX_CNTX__SHIFT
  75413. CP_ME_COHER_STATUS__STATUS_MASK
  75414. CP_ME_COHER_STATUS__STATUS__SHIFT
  75415. CP_ME_FIFO_EMPTY_PFP_BUSY
  75416. CP_ME_FIFO_EMPTY_PFP_IDLE
  75417. CP_ME_FIFO_FULL_ME_BUSY
  75418. CP_ME_FIFO_FULL_ME_NON_WORKING
  75419. CP_ME_FIFO_NOT_EMPTY_NOT_FULL
  75420. CP_ME_GDS_ATOMIC0_PREOP_HI__GDS_ATOMIC0_PREOP_HI_MASK
  75421. CP_ME_GDS_ATOMIC0_PREOP_HI__GDS_ATOMIC0_PREOP_HI__SHIFT
  75422. CP_ME_GDS_ATOMIC0_PREOP_LO__GDS_ATOMIC0_PREOP_LO_MASK
  75423. CP_ME_GDS_ATOMIC0_PREOP_LO__GDS_ATOMIC0_PREOP_LO__SHIFT
  75424. CP_ME_GDS_ATOMIC1_PREOP_HI__GDS_ATOMIC1_PREOP_HI_MASK
  75425. CP_ME_GDS_ATOMIC1_PREOP_HI__GDS_ATOMIC1_PREOP_HI__SHIFT
  75426. CP_ME_GDS_ATOMIC1_PREOP_LO__GDS_ATOMIC1_PREOP_LO_MASK
  75427. CP_ME_GDS_ATOMIC1_PREOP_LO__GDS_ATOMIC1_PREOP_LO__SHIFT
  75428. CP_ME_HALT
  75429. CP_ME_HEADER_DUMP__ME_HEADER_DUMP_MASK
  75430. CP_ME_HEADER_DUMP__ME_HEADER_DUMP__SHIFT
  75431. CP_ME_IC_BASE_CNTL__ADDRESS_CLAMP_MASK
  75432. CP_ME_IC_BASE_CNTL__ADDRESS_CLAMP__SHIFT
  75433. CP_ME_IC_BASE_CNTL__CACHE_POLICY_MASK
  75434. CP_ME_IC_BASE_CNTL__CACHE_POLICY__SHIFT
  75435. CP_ME_IC_BASE_CNTL__EXE_DISABLE_MASK
  75436. CP_ME_IC_BASE_CNTL__EXE_DISABLE__SHIFT
  75437. CP_ME_IC_BASE_CNTL__VMID_MASK
  75438. CP_ME_IC_BASE_CNTL__VMID__SHIFT
  75439. CP_ME_IC_BASE_HI__IC_BASE_HI_MASK
  75440. CP_ME_IC_BASE_HI__IC_BASE_HI__SHIFT
  75441. CP_ME_IC_BASE_LO__IC_BASE_LO_MASK
  75442. CP_ME_IC_BASE_LO__IC_BASE_LO__SHIFT
  75443. CP_ME_IC_OP_CNTL__ICACHE_PRIMED_MASK
  75444. CP_ME_IC_OP_CNTL__ICACHE_PRIMED__SHIFT
  75445. CP_ME_IC_OP_CNTL__INVALIDATE_CACHE_COMPLETE_MASK
  75446. CP_ME_IC_OP_CNTL__INVALIDATE_CACHE_COMPLETE__SHIFT
  75447. CP_ME_IC_OP_CNTL__INVALIDATE_CACHE_MASK
  75448. CP_ME_IC_OP_CNTL__INVALIDATE_CACHE__SHIFT
  75449. CP_ME_IC_OP_CNTL__PRIME_ICACHE_MASK
  75450. CP_ME_IC_OP_CNTL__PRIME_ICACHE__SHIFT
  75451. CP_ME_ID
  75452. CP_ME_INIT
  75453. CP_ME_INSTR_PNTR__INSTR_PNTR_MASK
  75454. CP_ME_INSTR_PNTR__INSTR_PNTR__SHIFT
  75455. CP_ME_INTR_ROUTINE_START__IR_START_MASK
  75456. CP_ME_INTR_ROUTINE_START__IR_START__SHIFT
  75457. CP_ME_MC_RADDR_HI__CACHE_POLICY_MASK
  75458. CP_ME_MC_RADDR_HI__CACHE_POLICY__SHIFT
  75459. CP_ME_MC_RADDR_HI__ME_MC_RADDR_HI_MASK
  75460. CP_ME_MC_RADDR_HI__ME_MC_RADDR_HI__SHIFT
  75461. CP_ME_MC_RADDR_HI__MTYPE_MASK
  75462. CP_ME_MC_RADDR_HI__MTYPE__SHIFT
  75463. CP_ME_MC_RADDR_LO__ME_MC_RADDR_LO_MASK
  75464. CP_ME_MC_RADDR_LO__ME_MC_RADDR_LO__SHIFT
  75465. CP_ME_MC_RADDR_LO__ME_MC_RADDR_SWAP_MASK
  75466. CP_ME_MC_RADDR_LO__ME_MC_RADDR_SWAP__SHIFT
  75467. CP_ME_MC_WADDR_HI__CACHE_POLICY_MASK
  75468. CP_ME_MC_WADDR_HI__CACHE_POLICY__SHIFT
  75469. CP_ME_MC_WADDR_HI__ME_MC_WADDR_HI_MASK
  75470. CP_ME_MC_WADDR_HI__ME_MC_WADDR_HI__SHIFT
  75471. CP_ME_MC_WADDR_HI__MTYPE_MASK
  75472. CP_ME_MC_WADDR_HI__MTYPE__SHIFT
  75473. CP_ME_MC_WADDR_LO__ME_MC_WADDR_LO_MASK
  75474. CP_ME_MC_WADDR_LO__ME_MC_WADDR_LO__SHIFT
  75475. CP_ME_MC_WADDR_LO__ME_MC_WADDR_SWAP_MASK
  75476. CP_ME_MC_WADDR_LO__ME_MC_WADDR_SWAP__SHIFT
  75477. CP_ME_MC_WDATA_HI__ME_MC_WDATA_HI_MASK
  75478. CP_ME_MC_WDATA_HI__ME_MC_WDATA_HI__SHIFT
  75479. CP_ME_MC_WDATA_LO__ME_MC_WDATA_LO_MASK
  75480. CP_ME_MC_WDATA_LO__ME_MC_WDATA_LO__SHIFT
  75481. CP_ME_MICRO_RB_STARVED
  75482. CP_ME_PC_PROFILE
  75483. CP_ME_PREEMPTION__ME_CNTXSW_PREEMPTION_MASK
  75484. CP_ME_PREEMPTION__ME_CNTXSW_PREEMPTION__SHIFT
  75485. CP_ME_PREEMPTION__OBSOLETE_MASK
  75486. CP_ME_PREEMPTION__OBSOLETE__SHIFT
  75487. CP_ME_PRGRM_CNTR_START__IP_START_MASK
  75488. CP_ME_PRGRM_CNTR_START__IP_START__SHIFT
  75489. CP_ME_RAM_DATA
  75490. CP_ME_RAM_DATA__ME_RAM_DATA_MASK
  75491. CP_ME_RAM_DATA__ME_RAM_DATA__SHIFT
  75492. CP_ME_RAM_RADDR
  75493. CP_ME_RAM_RADDR__ME_RAM_RADDR_MASK
  75494. CP_ME_RAM_RADDR__ME_RAM_RADDR__SHIFT
  75495. CP_ME_RAM_WADDR
  75496. CP_ME_RAM_WADDR__ME_RAM_WADDR_MASK
  75497. CP_ME_RAM_WADDR__ME_RAM_WADDR__SHIFT
  75498. CP_ME_REGS_CF_EVENT_FIFO_FULL
  75499. CP_ME_REGS_PS_EVENT_FIFO_FULL
  75500. CP_ME_REGS_RB_DONE_FIFO_FULL
  75501. CP_ME_REGS_VS_EVENT_FIFO_FULL
  75502. CP_ME_STALL_CYCLES_PER_PROFILE
  75503. CP_ME_STARVE_CYCLES_ANY
  75504. CP_ME_STARVE_CYCLES_PER_PROFILE
  75505. CP_ME_TABLE_OFFSET
  75506. CP_ME_TABLE_SIZE
  75507. CP_ME_WAITING_FOR_PACKETS
  75508. CP_ME_WAIT_CONTEXT_AVAIL
  75509. CP_MIN_CHKSUM_OFFSET
  75510. CP_MIN_MTU
  75511. CP_MIU_NRT_READ_STALLED
  75512. CP_MIU_NRT_WRITE_STALLED
  75513. CP_MIU_TAG_MEM_FULL
  75514. CP_MQD_BASE_ADDR
  75515. CP_MQD_BASE_ADDR_HI
  75516. CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK
  75517. CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT
  75518. CP_MQD_BASE_ADDR__BASE_ADDR_MASK
  75519. CP_MQD_BASE_ADDR__BASE_ADDR__SHIFT
  75520. CP_MQD_CONTROL
  75521. CP_MQD_CONTROL__CACHE_POLICY_MASK
  75522. CP_MQD_CONTROL__CACHE_POLICY__SHIFT
  75523. CP_MQD_CONTROL__EXE_DISABLE_MASK
  75524. CP_MQD_CONTROL__EXE_DISABLE__SHIFT
  75525. CP_MQD_CONTROL__MQD_ATC_MASK
  75526. CP_MQD_CONTROL__MQD_ATC__SHIFT
  75527. CP_MQD_CONTROL__MQD_VOLATILE_MASK
  75528. CP_MQD_CONTROL__MQD_VOLATILE__SHIFT
  75529. CP_MQD_CONTROL__MTYPE_MASK
  75530. CP_MQD_CONTROL__MTYPE__SHIFT
  75531. CP_MQD_CONTROL__PRIV_STATE_MASK
  75532. CP_MQD_CONTROL__PRIV_STATE__SHIFT
  75533. CP_MQD_CONTROL__PROCESSING_MQD_EN_MASK
  75534. CP_MQD_CONTROL__PROCESSING_MQD_EN__SHIFT
  75535. CP_MQD_CONTROL__PROCESSING_MQD_MASK
  75536. CP_MQD_CONTROL__PROCESSING_MQD__SHIFT
  75537. CP_MQD_CONTROL__VMID_MASK
  75538. CP_MQD_CONTROL__VMID__SHIFT
  75539. CP_NAT_BITS_FLAG
  75540. CP_NEWCTX
  75541. CP_NEXT_TO_CURRENT
  75542. CP_NEXT_TO_SWAP
  75543. CP_NOCRC_RECOVERY_FLAG
  75544. CP_NODE_NEED_CP
  75545. CP_NONCACHED
  75546. CP_NON_REGULAR
  75547. CP_NOP
  75548. CP_NO_NEEDED
  75549. CP_NO_SPC_ROLL
  75550. CP_NUM_PRIM_NEEDED_COUNT0_HI__NUM_PRIM_NEEDED_CNT0_HI_MASK
  75551. CP_NUM_PRIM_NEEDED_COUNT0_HI__NUM_PRIM_NEEDED_CNT0_HI__SHIFT
  75552. CP_NUM_PRIM_NEEDED_COUNT0_LO__NUM_PRIM_NEEDED_CNT0_LO_MASK
  75553. CP_NUM_PRIM_NEEDED_COUNT0_LO__NUM_PRIM_NEEDED_CNT0_LO__SHIFT
  75554. CP_NUM_PRIM_NEEDED_COUNT1_HI__NUM_PRIM_NEEDED_CNT1_HI_MASK
  75555. CP_NUM_PRIM_NEEDED_COUNT1_HI__NUM_PRIM_NEEDED_CNT1_HI__SHIFT
  75556. CP_NUM_PRIM_NEEDED_COUNT1_LO__NUM_PRIM_NEEDED_CNT1_LO_MASK
  75557. CP_NUM_PRIM_NEEDED_COUNT1_LO__NUM_PRIM_NEEDED_CNT1_LO__SHIFT
  75558. CP_NUM_PRIM_NEEDED_COUNT2_HI__NUM_PRIM_NEEDED_CNT2_HI_MASK
  75559. CP_NUM_PRIM_NEEDED_COUNT2_HI__NUM_PRIM_NEEDED_CNT2_HI__SHIFT
  75560. CP_NUM_PRIM_NEEDED_COUNT2_LO__NUM_PRIM_NEEDED_CNT2_LO_MASK
  75561. CP_NUM_PRIM_NEEDED_COUNT2_LO__NUM_PRIM_NEEDED_CNT2_LO__SHIFT
  75562. CP_NUM_PRIM_NEEDED_COUNT3_HI__NUM_PRIM_NEEDED_CNT3_HI_MASK
  75563. CP_NUM_PRIM_NEEDED_COUNT3_HI__NUM_PRIM_NEEDED_CNT3_HI__SHIFT
  75564. CP_NUM_PRIM_NEEDED_COUNT3_LO__NUM_PRIM_NEEDED_CNT3_LO_MASK
  75565. CP_NUM_PRIM_NEEDED_COUNT3_LO__NUM_PRIM_NEEDED_CNT3_LO__SHIFT
  75566. CP_NUM_PRIM_WRITTEN_COUNT0_HI__NUM_PRIM_WRITTEN_CNT0_HI_MASK
  75567. CP_NUM_PRIM_WRITTEN_COUNT0_HI__NUM_PRIM_WRITTEN_CNT0_HI__SHIFT
  75568. CP_NUM_PRIM_WRITTEN_COUNT0_LO__NUM_PRIM_WRITTEN_CNT0_LO_MASK
  75569. CP_NUM_PRIM_WRITTEN_COUNT0_LO__NUM_PRIM_WRITTEN_CNT0_LO__SHIFT
  75570. CP_NUM_PRIM_WRITTEN_COUNT1_HI__NUM_PRIM_WRITTEN_CNT1_HI_MASK
  75571. CP_NUM_PRIM_WRITTEN_COUNT1_HI__NUM_PRIM_WRITTEN_CNT1_HI__SHIFT
  75572. CP_NUM_PRIM_WRITTEN_COUNT1_LO__NUM_PRIM_WRITTEN_CNT1_LO_MASK
  75573. CP_NUM_PRIM_WRITTEN_COUNT1_LO__NUM_PRIM_WRITTEN_CNT1_LO__SHIFT
  75574. CP_NUM_PRIM_WRITTEN_COUNT2_HI__NUM_PRIM_WRITTEN_CNT2_HI_MASK
  75575. CP_NUM_PRIM_WRITTEN_COUNT2_HI__NUM_PRIM_WRITTEN_CNT2_HI__SHIFT
  75576. CP_NUM_PRIM_WRITTEN_COUNT2_LO__NUM_PRIM_WRITTEN_CNT2_LO_MASK
  75577. CP_NUM_PRIM_WRITTEN_COUNT2_LO__NUM_PRIM_WRITTEN_CNT2_LO__SHIFT
  75578. CP_NUM_PRIM_WRITTEN_COUNT3_HI__NUM_PRIM_WRITTEN_CNT3_HI_MASK
  75579. CP_NUM_PRIM_WRITTEN_COUNT3_HI__NUM_PRIM_WRITTEN_CNT3_HI__SHIFT
  75580. CP_NUM_PRIM_WRITTEN_COUNT3_LO__NUM_PRIM_WRITTEN_CNT3_LO_MASK
  75581. CP_NUM_PRIM_WRITTEN_COUNT3_LO__NUM_PRIM_WRITTEN_CNT3_LO__SHIFT
  75582. CP_NUM_STATS
  75583. CP_OFF_C_ALGO
  75584. CP_OFF_DCE_DCC
  75585. CP_ORPHAN_PRESENT_FLAG
  75586. CP_PACKET0
  75587. CP_PACKET0_GET_REG
  75588. CP_PACKET1
  75589. CP_PACKET2
  75590. CP_PACKET3
  75591. CP_PACKET3_GET_OPCODE
  75592. CP_PACKET_GET_COUNT
  75593. CP_PACKET_GET_TYPE
  75594. CP_PAUSE
  75595. CP_PA_BACKUP_PAGES_MAP
  75596. CP_PA_CINVOC_COUNT_HI__CINVOC_COUNT_HI_MASK
  75597. CP_PA_CINVOC_COUNT_HI__CINVOC_COUNT_HI__SHIFT
  75598. CP_PA_CINVOC_COUNT_LO__CINVOC_COUNT_LO_MASK
  75599. CP_PA_CINVOC_COUNT_LO__CINVOC_COUNT_LO__SHIFT
  75600. CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK
  75601. CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT
  75602. CP_PA_CPRIM_COUNT_LO__CPRIM_COUNT_LO_MASK
  75603. CP_PA_CPRIM_COUNT_LO__CPRIM_COUNT_LO__SHIFT
  75604. CP_PA_PGD
  75605. CP_PA_SWAP_PAGE
  75606. CP_PA_TABLE_PAGE
  75607. CP_PERFCOUNTER_ACTION
  75608. CP_PERFCOUNTER_ACTION_1_ADDR_0_LO
  75609. CP_PERFCOUNTER_ACTION_1_ADDR_0_LO__MASK
  75610. CP_PERFCOUNTER_ACTION_1_ADDR_0_LO__SHIFT
  75611. CP_PERFCOUNTER_ACTION_2_ADDR_0_HI
  75612. CP_PERFCOUNTER_ACTION_2_ADDR_0_HI__MASK
  75613. CP_PERFCOUNTER_ACTION_2_ADDR_0_HI__SHIFT
  75614. CP_PERFMON_CNTL
  75615. CP_PERFMON_CNTL__PERFMON_ENABLE_MODE_MASK
  75616. CP_PERFMON_CNTL__PERFMON_ENABLE_MODE__SHIFT
  75617. CP_PERFMON_CNTL__PERFMON_SAMPLE_ENABLE_MASK
  75618. CP_PERFMON_CNTL__PERFMON_SAMPLE_ENABLE__SHIFT
  75619. CP_PERFMON_CNTL__PERFMON_STATE_MASK
  75620. CP_PERFMON_CNTL__PERFMON_STATE__SHIFT
  75621. CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK
  75622. CP_PERFMON_CNTL__SPM_PERFMON_STATE__SHIFT
  75623. CP_PERFMON_CNTX_CNTL__PERFMON_ENABLE_MASK
  75624. CP_PERFMON_CNTX_CNTL__PERFMON_ENABLE__SHIFT
  75625. CP_PERFMON_ENABLE_MODE
  75626. CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT
  75627. CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE
  75628. CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE
  75629. CP_PERFMON_ENABLE_MODE_RESERVED_1
  75630. CP_PERFMON_STATE
  75631. CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM
  75632. CP_PERFMON_STATE_DISABLE_AND_RESET
  75633. CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM
  75634. CP_PERFMON_STATE_RESERVED_3
  75635. CP_PERFMON_STATE_START_COUNTING
  75636. CP_PERFMON_STATE_STOP_COUNTING
  75637. CP_PFP_ATOMIC_PREOP_HI__ATOMIC_PREOP_HI_MASK
  75638. CP_PFP_ATOMIC_PREOP_HI__ATOMIC_PREOP_HI__SHIFT
  75639. CP_PFP_ATOMIC_PREOP_LO__ATOMIC_PREOP_LO_MASK
  75640. CP_PFP_ATOMIC_PREOP_LO__ATOMIC_PREOP_LO__SHIFT
  75641. CP_PFP_BUSY_WORKING
  75642. CP_PFP_COMPLETION_STATUS__STATUS_MASK
  75643. CP_PFP_COMPLETION_STATUS__STATUS__SHIFT
  75644. CP_PFP_COND_INDIRECT_DISCARDED
  75645. CP_PFP_F32_INTERRUPT__PRIV_REG_INT_MASK
  75646. CP_PFP_F32_INTERRUPT__PRIV_REG_INT__SHIFT
  75647. CP_PFP_GDS_ATOMIC0_PREOP_HI__GDS_ATOMIC0_PREOP_HI_MASK
  75648. CP_PFP_GDS_ATOMIC0_PREOP_HI__GDS_ATOMIC0_PREOP_HI__SHIFT
  75649. CP_PFP_GDS_ATOMIC0_PREOP_LO__GDS_ATOMIC0_PREOP_LO_MASK
  75650. CP_PFP_GDS_ATOMIC0_PREOP_LO__GDS_ATOMIC0_PREOP_LO__SHIFT
  75651. CP_PFP_GDS_ATOMIC1_PREOP_HI__GDS_ATOMIC1_PREOP_HI_MASK
  75652. CP_PFP_GDS_ATOMIC1_PREOP_HI__GDS_ATOMIC1_PREOP_HI__SHIFT
  75653. CP_PFP_GDS_ATOMIC1_PREOP_LO__GDS_ATOMIC1_PREOP_LO_MASK
  75654. CP_PFP_GDS_ATOMIC1_PREOP_LO__GDS_ATOMIC1_PREOP_LO__SHIFT
  75655. CP_PFP_HALT
  75656. CP_PFP_HEADER_DUMP__PFP_HEADER_DUMP_MASK
  75657. CP_PFP_HEADER_DUMP__PFP_HEADER_DUMP__SHIFT
  75658. CP_PFP_IB_CONTROL__IB_EN_MASK
  75659. CP_PFP_IB_CONTROL__IB_EN__SHIFT
  75660. CP_PFP_IC_BASE_CNTL__ADDRESS_CLAMP_MASK
  75661. CP_PFP_IC_BASE_CNTL__ADDRESS_CLAMP__SHIFT
  75662. CP_PFP_IC_BASE_CNTL__CACHE_POLICY_MASK
  75663. CP_PFP_IC_BASE_CNTL__CACHE_POLICY__SHIFT
  75664. CP_PFP_IC_BASE_CNTL__EXE_DISABLE_MASK
  75665. CP_PFP_IC_BASE_CNTL__EXE_DISABLE__SHIFT
  75666. CP_PFP_IC_BASE_CNTL__VMID_MASK
  75667. CP_PFP_IC_BASE_CNTL__VMID__SHIFT
  75668. CP_PFP_IC_BASE_HI__IC_BASE_HI_MASK
  75669. CP_PFP_IC_BASE_HI__IC_BASE_HI__SHIFT
  75670. CP_PFP_IC_BASE_LO__IC_BASE_LO_MASK
  75671. CP_PFP_IC_BASE_LO__IC_BASE_LO__SHIFT
  75672. CP_PFP_IC_OP_CNTL__ICACHE_PRIMED_MASK
  75673. CP_PFP_IC_OP_CNTL__ICACHE_PRIMED__SHIFT
  75674. CP_PFP_IC_OP_CNTL__INVALIDATE_CACHE_COMPLETE_MASK
  75675. CP_PFP_IC_OP_CNTL__INVALIDATE_CACHE_COMPLETE__SHIFT
  75676. CP_PFP_IC_OP_CNTL__INVALIDATE_CACHE_MASK
  75677. CP_PFP_IC_OP_CNTL__INVALIDATE_CACHE__SHIFT
  75678. CP_PFP_IC_OP_CNTL__PRIME_ICACHE_MASK
  75679. CP_PFP_IC_OP_CNTL__PRIME_ICACHE__SHIFT
  75680. CP_PFP_IDLE
  75681. CP_PFP_INSTR_PNTR__INSTR_PNTR_MASK
  75682. CP_PFP_INSTR_PNTR__INSTR_PNTR__SHIFT
  75683. CP_PFP_INTR_ROUTINE_START__IR_START_MASK
  75684. CP_PFP_INTR_ROUTINE_START__IR_START__SHIFT
  75685. CP_PFP_JT_STAT__JT_LOADED_MASK
  75686. CP_PFP_JT_STAT__JT_LOADED__SHIFT
  75687. CP_PFP_JT_STAT__WR_MASK_MASK
  75688. CP_PFP_JT_STAT__WR_MASK__SHIFT
  75689. CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK
  75690. CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT
  75691. CP_PFP_LOAD_CONTROL__CONFIG_REG_EN_MASK
  75692. CP_PFP_LOAD_CONTROL__CONFIG_REG_EN__SHIFT
  75693. CP_PFP_LOAD_CONTROL__SH_CS_REG_EN_MASK
  75694. CP_PFP_LOAD_CONTROL__SH_CS_REG_EN__SHIFT
  75695. CP_PFP_LOAD_CONTROL__SH_GFX_REG_EN_MASK
  75696. CP_PFP_LOAD_CONTROL__SH_GFX_REG_EN__SHIFT
  75697. CP_PFP_LOAD_CONTROL__UCONFIG_REG_EN_MASK
  75698. CP_PFP_LOAD_CONTROL__UCONFIG_REG_EN__SHIFT
  75699. CP_PFP_MATCH_PM4_PKT_PROFILE
  75700. CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI_MASK
  75701. CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT
  75702. CP_PFP_METADATA_BASE_ADDR__ADDR_LO_MASK
  75703. CP_PFP_METADATA_BASE_ADDR__ADDR_LO__SHIFT
  75704. CP_PFP_PC_PROFILE
  75705. CP_PFP_PRGRM_CNTR_START__IP_START_MASK
  75706. CP_PFP_PRGRM_CNTR_START__IP_START__SHIFT
  75707. CP_PFP_STALLED_PER_STORE_ADDR
  75708. CP_PFP_STALL_CYCLES_ANY
  75709. CP_PFP_STARVED_PER_LOAD_ADDR
  75710. CP_PFP_STARVE_CYCLES_ANY
  75711. CP_PFP_TYPE0_PACKET
  75712. CP_PFP_TYPE3_PACKET
  75713. CP_PFP_UCODE_ADDR
  75714. CP_PFP_UCODE_ADDR__UCODE_ADDR_MASK
  75715. CP_PFP_UCODE_ADDR__UCODE_ADDR__SHIFT
  75716. CP_PFP_UCODE_DATA
  75717. CP_PFP_UCODE_DATA__UCODE_DATA_MASK
  75718. CP_PFP_UCODE_DATA__UCODE_DATA__SHIFT
  75719. CP_PIPEID__PIPE_ID_MASK
  75720. CP_PIPEID__PIPE_ID__SHIFT
  75721. CP_PIPE_ID
  75722. CP_PIPE_STATS_ADDR_HI__PIPE_STATS_ADDR_HI_MASK
  75723. CP_PIPE_STATS_ADDR_HI__PIPE_STATS_ADDR_HI__SHIFT
  75724. CP_PIPE_STATS_ADDR_LO__PIPE_STATS_ADDR_LO_MASK
  75725. CP_PIPE_STATS_ADDR_LO__PIPE_STATS_ADDR_LO__SHIFT
  75726. CP_PIPE_STATS_ADDR_LO__PIPE_STATS_ADDR_SWAP_MASK
  75727. CP_PIPE_STATS_ADDR_LO__PIPE_STATS_ADDR_SWAP__SHIFT
  75728. CP_PIPE_STATS_CONTROL__CACHE_CONTROL_MASK
  75729. CP_PIPE_STATS_CONTROL__CACHE_CONTROL__SHIFT
  75730. CP_PIPE_STATS_CONTROL__CACHE_POLICY_MASK
  75731. CP_PIPE_STATS_CONTROL__CACHE_POLICY__SHIFT
  75732. CP_PIPE_STATS_CONTROL__MTYPE_MASK
  75733. CP_PIPE_STATS_CONTROL__MTYPE__SHIFT
  75734. CP_PIPE_STATS_DOORBELL__DOORBELL_OFFSET_MASK
  75735. CP_PIPE_STATS_DOORBELL__DOORBELL_OFFSET__SHIFT
  75736. CP_PQ_STATUS__DOORBELL_ENABLE_MASK
  75737. CP_PQ_STATUS__DOORBELL_ENABLE__SHIFT
  75738. CP_PQ_STATUS__DOORBELL_UPDATED_EN_MASK
  75739. CP_PQ_STATUS__DOORBELL_UPDATED_EN__SHIFT
  75740. CP_PQ_STATUS__DOORBELL_UPDATED_MASK
  75741. CP_PQ_STATUS__DOORBELL_UPDATED_MODE_MASK
  75742. CP_PQ_STATUS__DOORBELL_UPDATED_MODE__SHIFT
  75743. CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT
  75744. CP_PQ_WPTR_POLL_CNTL
  75745. CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK_MASK
  75746. CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT
  75747. CP_PQ_WPTR_POLL_CNTL__DISABLE_PEND_REQ_ONE_SHOT_MASK
  75748. CP_PQ_WPTR_POLL_CNTL__DISABLE_PEND_REQ_ONE_SHOT__SHIFT
  75749. CP_PQ_WPTR_POLL_CNTL__EN_MASK
  75750. CP_PQ_WPTR_POLL_CNTL__EN__SHIFT
  75751. CP_PQ_WPTR_POLL_CNTL__PERIOD_MASK
  75752. CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT
  75753. CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE_MASK
  75754. CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT
  75755. CP_PRED_NOT_VISIBLE__NOT_VISIBLE_MASK
  75756. CP_PRED_NOT_VISIBLE__NOT_VISIBLE__SHIFT
  75757. CP_PREEMPT_CYCLES
  75758. CP_PREEMPT_ENABLE
  75759. CP_PREEMPT_ENABLE_GLOBAL
  75760. CP_PREEMPT_ENABLE_LOCAL
  75761. CP_PREEMPT_TOKEN
  75762. CP_PREEMPT_TO_BOUNDARY_CYCLES
  75763. CP_PROCESS_QUANTUM__QUANTUM_DURATION_MASK
  75764. CP_PROCESS_QUANTUM__QUANTUM_DURATION__SHIFT
  75765. CP_PROCESS_QUANTUM__QUANTUM_EN_MASK
  75766. CP_PROCESS_QUANTUM__QUANTUM_EN__SHIFT
  75767. CP_PROCESS_QUANTUM__QUANTUM_SCALE_MASK
  75768. CP_PROCESS_QUANTUM__QUANTUM_SCALE__SHIFT
  75769. CP_PROCESS_QUANTUM__TIMER_EXPIRED_MASK
  75770. CP_PROCESS_QUANTUM__TIMER_EXPIRED__SHIFT
  75771. CP_PROGRAM_EN
  75772. CP_PRT_LOD_STATS_CNTL0__BU_SIZE_MASK
  75773. CP_PRT_LOD_STATS_CNTL0__BU_SIZE__SHIFT
  75774. CP_PRT_LOD_STATS_CNTL1__BASE_LO_MASK
  75775. CP_PRT_LOD_STATS_CNTL1__BASE_LO__SHIFT
  75776. CP_PRT_LOD_STATS_CNTL2__BASE_HI_MASK
  75777. CP_PRT_LOD_STATS_CNTL2__BASE_HI__SHIFT
  75778. CP_PRT_LOD_STATS_CNTL2__CACHE_POLICY_MASK
  75779. CP_PRT_LOD_STATS_CNTL2__CACHE_POLICY__SHIFT
  75780. CP_PRT_LOD_STATS_CNTL2__INTERVAL_MASK
  75781. CP_PRT_LOD_STATS_CNTL2__INTERVAL__SHIFT
  75782. CP_PRT_LOD_STATS_CNTL2__MC_ENDIAN_SWAP_MASK
  75783. CP_PRT_LOD_STATS_CNTL2__MC_ENDIAN_SWAP__SHIFT
  75784. CP_PRT_LOD_STATS_CNTL2__MC_VMID_MASK
  75785. CP_PRT_LOD_STATS_CNTL2__MC_VMID__SHIFT
  75786. CP_PRT_LOD_STATS_CNTL2__MTYPE_MASK
  75787. CP_PRT_LOD_STATS_CNTL2__MTYPE__SHIFT
  75788. CP_PRT_LOD_STATS_CNTL2__REPORT_AND_RESET_MASK
  75789. CP_PRT_LOD_STATS_CNTL2__REPORT_AND_RESET__SHIFT
  75790. CP_PRT_LOD_STATS_CNTL2__RESET_CNT_MASK
  75791. CP_PRT_LOD_STATS_CNTL2__RESET_CNT__SHIFT
  75792. CP_PRT_LOD_STATS_CNTL2__RESET_FORCE_MASK
  75793. CP_PRT_LOD_STATS_CNTL2__RESET_FORCE__SHIFT
  75794. CP_PRT_LOD_STATS_CNTL3__CACHE_POLICY_MASK
  75795. CP_PRT_LOD_STATS_CNTL3__CACHE_POLICY__SHIFT
  75796. CP_PRT_LOD_STATS_CNTL3__INTERVAL_MASK
  75797. CP_PRT_LOD_STATS_CNTL3__INTERVAL__SHIFT
  75798. CP_PRT_LOD_STATS_CNTL3__MC_VMID_MASK
  75799. CP_PRT_LOD_STATS_CNTL3__MC_VMID__SHIFT
  75800. CP_PRT_LOD_STATS_CNTL3__REPORT_AND_RESET_MASK
  75801. CP_PRT_LOD_STATS_CNTL3__REPORT_AND_RESET__SHIFT
  75802. CP_PRT_LOD_STATS_CNTL3__RESET_CNT_MASK
  75803. CP_PRT_LOD_STATS_CNTL3__RESET_CNT__SHIFT
  75804. CP_PRT_LOD_STATS_CNTL3__RESET_FORCE_MASK
  75805. CP_PRT_LOD_STATS_CNTL3__RESET_FORCE__SHIFT
  75806. CP_PWR_CNTL__CMP_CLK_HALT_ME1_PIPE0_MASK
  75807. CP_PWR_CNTL__CMP_CLK_HALT_ME1_PIPE0__SHIFT
  75808. CP_PWR_CNTL__CMP_CLK_HALT_ME1_PIPE1_MASK
  75809. CP_PWR_CNTL__CMP_CLK_HALT_ME1_PIPE1__SHIFT
  75810. CP_PWR_CNTL__CMP_CLK_HALT_ME1_PIPE2_MASK
  75811. CP_PWR_CNTL__CMP_CLK_HALT_ME1_PIPE2__SHIFT
  75812. CP_PWR_CNTL__CMP_CLK_HALT_ME1_PIPE3_MASK
  75813. CP_PWR_CNTL__CMP_CLK_HALT_ME1_PIPE3__SHIFT
  75814. CP_PWR_CNTL__CMP_CLK_HALT_ME2_PIPE0_MASK
  75815. CP_PWR_CNTL__CMP_CLK_HALT_ME2_PIPE0__SHIFT
  75816. CP_PWR_CNTL__CMP_CLK_HALT_ME2_PIPE1_MASK
  75817. CP_PWR_CNTL__CMP_CLK_HALT_ME2_PIPE1__SHIFT
  75818. CP_PWR_CNTL__CMP_CLK_HALT_ME2_PIPE2_MASK
  75819. CP_PWR_CNTL__CMP_CLK_HALT_ME2_PIPE2__SHIFT
  75820. CP_PWR_CNTL__CMP_CLK_HALT_ME2_PIPE3_MASK
  75821. CP_PWR_CNTL__CMP_CLK_HALT_ME2_PIPE3__SHIFT
  75822. CP_PWR_CNTL__CMP_CLK_HALT_ME3_PIPE0_MASK
  75823. CP_PWR_CNTL__CMP_CLK_HALT_ME3_PIPE0__SHIFT
  75824. CP_PWR_CNTL__CMP_CLK_HALT_ME3_PIPE1_MASK
  75825. CP_PWR_CNTL__CMP_CLK_HALT_ME3_PIPE1__SHIFT
  75826. CP_PWR_CNTL__CMP_CLK_HALT_ME3_PIPE2_MASK
  75827. CP_PWR_CNTL__CMP_CLK_HALT_ME3_PIPE2__SHIFT
  75828. CP_PWR_CNTL__CMP_CLK_HALT_ME3_PIPE3_MASK
  75829. CP_PWR_CNTL__CMP_CLK_HALT_ME3_PIPE3__SHIFT
  75830. CP_PWR_CNTL__GFX_CLK_HALT_MASK
  75831. CP_PWR_CNTL__GFX_CLK_HALT_ME0_PIPE0_MASK
  75832. CP_PWR_CNTL__GFX_CLK_HALT_ME0_PIPE0__SHIFT
  75833. CP_PWR_CNTL__GFX_CLK_HALT_ME0_PIPE1_MASK
  75834. CP_PWR_CNTL__GFX_CLK_HALT_ME0_PIPE1__SHIFT
  75835. CP_PWR_CNTL__GFX_CLK_HALT__SHIFT
  75836. CP_QUEUE_THRESHOLDS
  75837. CP_QUEUE_THRESHOLDS__ROQ_IB1_START_MASK
  75838. CP_QUEUE_THRESHOLDS__ROQ_IB1_START__SHIFT
  75839. CP_QUEUE_THRESHOLDS__ROQ_IB2_START_MASK
  75840. CP_QUEUE_THRESHOLDS__ROQ_IB2_START__SHIFT
  75841. CP_QUOTA_NEED_FSCK_FLAG
  75842. CP_RB0_ACTIVE__ACTIVE_MASK
  75843. CP_RB0_ACTIVE__ACTIVE__SHIFT
  75844. CP_RB0_BASE
  75845. CP_RB0_BASE_HI
  75846. CP_RB0_BASE_HI__RB_BASE_HI_MASK
  75847. CP_RB0_BASE_HI__RB_BASE_HI__SHIFT
  75848. CP_RB0_BASE__RB_BASE_MASK
  75849. CP_RB0_BASE__RB_BASE__SHIFT
  75850. CP_RB0_BUFSZ_MASK__DATA_MASK
  75851. CP_RB0_BUFSZ_MASK__DATA__SHIFT
  75852. CP_RB0_CNTL
  75853. CP_RB0_CNTL__BUF_SWAP_MASK
  75854. CP_RB0_CNTL__BUF_SWAP__SHIFT
  75855. CP_RB0_CNTL__CACHE_POLICY_MASK
  75856. CP_RB0_CNTL__CACHE_POLICY__SHIFT
  75857. CP_RB0_CNTL__CE_HQD_NEQ_RB_HQD_MASK
  75858. CP_RB0_CNTL__CE_HQD_NEQ_RB_HQD__SHIFT
  75859. CP_RB0_CNTL__MIN_AVAILSZ_MASK
  75860. CP_RB0_CNTL__MIN_AVAILSZ__SHIFT
  75861. CP_RB0_CNTL__MIN_IB_AVAILSZ_MASK
  75862. CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT
  75863. CP_RB0_CNTL__MTYPE_MASK
  75864. CP_RB0_CNTL__MTYPE__SHIFT
  75865. CP_RB0_CNTL__RB_BLKSZ_MASK
  75866. CP_RB0_CNTL__RB_BLKSZ__SHIFT
  75867. CP_RB0_CNTL__RB_BUFSZ_MASK
  75868. CP_RB0_CNTL__RB_BUFSZ__SHIFT
  75869. CP_RB0_CNTL__RB_EXE_MASK
  75870. CP_RB0_CNTL__RB_EXE__SHIFT
  75871. CP_RB0_CNTL__RB_NO_UPDATE_MASK
  75872. CP_RB0_CNTL__RB_NO_UPDATE__SHIFT
  75873. CP_RB0_CNTL__RB_RPTR_WR_ENA_MASK
  75874. CP_RB0_CNTL__RB_RPTR_WR_ENA__SHIFT
  75875. CP_RB0_CNTL__RB_VOLATILE_MASK
  75876. CP_RB0_CNTL__RB_VOLATILE__SHIFT
  75877. CP_RB0_RPTR
  75878. CP_RB0_RPTR_ADDR
  75879. CP_RB0_RPTR_ADDR_HI
  75880. CP_RB0_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
  75881. CP_RB0_RPTR_ADDR_HI__RB_RPTR_ADDR_HI__SHIFT
  75882. CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK
  75883. CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT
  75884. CP_RB0_RPTR_ADDR__RB_RPTR_SWAP_MASK
  75885. CP_RB0_RPTR_ADDR__RB_RPTR_SWAP__SHIFT
  75886. CP_RB0_RPTR__RB_RPTR_MASK
  75887. CP_RB0_RPTR__RB_RPTR__SHIFT
  75888. CP_RB0_WPTR
  75889. CP_RB0_WPTR_HI__RB_WPTR_MASK
  75890. CP_RB0_WPTR_HI__RB_WPTR__SHIFT
  75891. CP_RB0_WPTR__RB_WPTR_MASK
  75892. CP_RB0_WPTR__RB_WPTR__SHIFT
  75893. CP_RB1_ACTIVE__ACTIVE_MASK
  75894. CP_RB1_ACTIVE__ACTIVE__SHIFT
  75895. CP_RB1_BASE
  75896. CP_RB1_BASE_HI__RB_BASE_HI_MASK
  75897. CP_RB1_BASE_HI__RB_BASE_HI__SHIFT
  75898. CP_RB1_BASE__RB_BASE_MASK
  75899. CP_RB1_BASE__RB_BASE__SHIFT
  75900. CP_RB1_BUFSZ_MASK__DATA_MASK
  75901. CP_RB1_BUFSZ_MASK__DATA__SHIFT
  75902. CP_RB1_CNTL
  75903. CP_RB1_CNTL__CACHE_POLICY_MASK
  75904. CP_RB1_CNTL__CACHE_POLICY__SHIFT
  75905. CP_RB1_CNTL__CE_HQD_NEQ_RB_HQD_MASK
  75906. CP_RB1_CNTL__CE_HQD_NEQ_RB_HQD__SHIFT
  75907. CP_RB1_CNTL__KMD_QUEUE_MASK
  75908. CP_RB1_CNTL__KMD_QUEUE__SHIFT
  75909. CP_RB1_CNTL__MIN_AVAILSZ_MASK
  75910. CP_RB1_CNTL__MIN_AVAILSZ__SHIFT
  75911. CP_RB1_CNTL__MIN_IB_AVAILSZ_MASK
  75912. CP_RB1_CNTL__MIN_IB_AVAILSZ__SHIFT
  75913. CP_RB1_CNTL__MTYPE_MASK
  75914. CP_RB1_CNTL__MTYPE__SHIFT
  75915. CP_RB1_CNTL__RB_BLKSZ_MASK
  75916. CP_RB1_CNTL__RB_BLKSZ__SHIFT
  75917. CP_RB1_CNTL__RB_BUFSZ_MASK
  75918. CP_RB1_CNTL__RB_BUFSZ__SHIFT
  75919. CP_RB1_CNTL__RB_EXE_MASK
  75920. CP_RB1_CNTL__RB_EXE__SHIFT
  75921. CP_RB1_CNTL__RB_NO_UPDATE_MASK
  75922. CP_RB1_CNTL__RB_NO_UPDATE__SHIFT
  75923. CP_RB1_CNTL__RB_RPTR_WR_ENA_MASK
  75924. CP_RB1_CNTL__RB_RPTR_WR_ENA__SHIFT
  75925. CP_RB1_CNTL__RB_VOLATILE_MASK
  75926. CP_RB1_CNTL__RB_VOLATILE__SHIFT
  75927. CP_RB1_RPTR
  75928. CP_RB1_RPTR_ADDR
  75929. CP_RB1_RPTR_ADDR_HI
  75930. CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
  75931. CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI__SHIFT
  75932. CP_RB1_RPTR_ADDR__RB_RPTR_ADDR_MASK
  75933. CP_RB1_RPTR_ADDR__RB_RPTR_ADDR__SHIFT
  75934. CP_RB1_RPTR_ADDR__RB_RPTR_SWAP_MASK
  75935. CP_RB1_RPTR_ADDR__RB_RPTR_SWAP__SHIFT
  75936. CP_RB1_RPTR__RB_RPTR_MASK
  75937. CP_RB1_RPTR__RB_RPTR__SHIFT
  75938. CP_RB1_WPTR
  75939. CP_RB1_WPTR_HI__RB_WPTR_MASK
  75940. CP_RB1_WPTR_HI__RB_WPTR__SHIFT
  75941. CP_RB1_WPTR__RB_WPTR_MASK
  75942. CP_RB1_WPTR__RB_WPTR__SHIFT
  75943. CP_RB2_BASE
  75944. CP_RB2_BASE__RB_BASE_MASK
  75945. CP_RB2_BASE__RB_BASE__SHIFT
  75946. CP_RB2_CNTL
  75947. CP_RB2_CNTL__CACHE_POLICY_MASK
  75948. CP_RB2_CNTL__CACHE_POLICY__SHIFT
  75949. CP_RB2_CNTL__CE_HQD_NEQ_RB_HQD_MASK
  75950. CP_RB2_CNTL__CE_HQD_NEQ_RB_HQD__SHIFT
  75951. CP_RB2_CNTL__KMD_QUEUE_MASK
  75952. CP_RB2_CNTL__KMD_QUEUE__SHIFT
  75953. CP_RB2_CNTL__MIN_AVAILSZ_MASK
  75954. CP_RB2_CNTL__MIN_AVAILSZ__SHIFT
  75955. CP_RB2_CNTL__MIN_IB_AVAILSZ_MASK
  75956. CP_RB2_CNTL__MIN_IB_AVAILSZ__SHIFT
  75957. CP_RB2_CNTL__MTYPE_MASK
  75958. CP_RB2_CNTL__MTYPE__SHIFT
  75959. CP_RB2_CNTL__RB_BLKSZ_MASK
  75960. CP_RB2_CNTL__RB_BLKSZ__SHIFT
  75961. CP_RB2_CNTL__RB_BUFSZ_MASK
  75962. CP_RB2_CNTL__RB_BUFSZ__SHIFT
  75963. CP_RB2_CNTL__RB_EXE_MASK
  75964. CP_RB2_CNTL__RB_EXE__SHIFT
  75965. CP_RB2_CNTL__RB_NO_UPDATE_MASK
  75966. CP_RB2_CNTL__RB_NO_UPDATE__SHIFT
  75967. CP_RB2_CNTL__RB_RPTR_WR_ENA_MASK
  75968. CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT
  75969. CP_RB2_CNTL__RB_VOLATILE_MASK
  75970. CP_RB2_CNTL__RB_VOLATILE__SHIFT
  75971. CP_RB2_RPTR
  75972. CP_RB2_RPTR_ADDR
  75973. CP_RB2_RPTR_ADDR_HI
  75974. CP_RB2_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
  75975. CP_RB2_RPTR_ADDR_HI__RB_RPTR_ADDR_HI__SHIFT
  75976. CP_RB2_RPTR_ADDR__RB_RPTR_ADDR_MASK
  75977. CP_RB2_RPTR_ADDR__RB_RPTR_ADDR__SHIFT
  75978. CP_RB2_RPTR_ADDR__RB_RPTR_SWAP_MASK
  75979. CP_RB2_RPTR_ADDR__RB_RPTR_SWAP__SHIFT
  75980. CP_RB2_RPTR__RB_RPTR_MASK
  75981. CP_RB2_RPTR__RB_RPTR__SHIFT
  75982. CP_RB2_WPTR
  75983. CP_RB2_WPTR__RB_WPTR_MASK
  75984. CP_RB2_WPTR__RB_WPTR__SHIFT
  75985. CP_RB_ACTIVE__ACTIVE_MASK
  75986. CP_RB_ACTIVE__ACTIVE__SHIFT
  75987. CP_RB_BASE
  75988. CP_RB_BASE__RB_BASE_MASK
  75989. CP_RB_BASE__RB_BASE__SHIFT
  75990. CP_RB_BUFSZ_MASK__DATA_MASK
  75991. CP_RB_BUFSZ_MASK__DATA__SHIFT
  75992. CP_RB_CNTL
  75993. CP_RB_CNTL__BUF_SWAP_MASK
  75994. CP_RB_CNTL__BUF_SWAP__SHIFT
  75995. CP_RB_CNTL__CACHE_POLICY_MASK
  75996. CP_RB_CNTL__CACHE_POLICY__SHIFT
  75997. CP_RB_CNTL__CE_HQD_NEQ_RB_HQD_MASK
  75998. CP_RB_CNTL__CE_HQD_NEQ_RB_HQD__SHIFT
  75999. CP_RB_CNTL__KMD_QUEUE_MASK
  76000. CP_RB_CNTL__KMD_QUEUE__SHIFT
  76001. CP_RB_CNTL__MIN_AVAILSZ_MASK
  76002. CP_RB_CNTL__MIN_AVAILSZ__SHIFT
  76003. CP_RB_CNTL__MIN_IB_AVAILSZ_MASK
  76004. CP_RB_CNTL__MIN_IB_AVAILSZ__SHIFT
  76005. CP_RB_CNTL__MTYPE_MASK
  76006. CP_RB_CNTL__MTYPE__SHIFT
  76007. CP_RB_CNTL__RB_BLKSZ_MASK
  76008. CP_RB_CNTL__RB_BLKSZ__SHIFT
  76009. CP_RB_CNTL__RB_BUFSZ_MASK
  76010. CP_RB_CNTL__RB_BUFSZ__SHIFT
  76011. CP_RB_CNTL__RB_EXE_MASK
  76012. CP_RB_CNTL__RB_EXE__SHIFT
  76013. CP_RB_CNTL__RB_NO_UPDATE_MASK
  76014. CP_RB_CNTL__RB_NO_UPDATE__SHIFT
  76015. CP_RB_CNTL__RB_RPTR_WR_ENA_MASK
  76016. CP_RB_CNTL__RB_RPTR_WR_ENA__SHIFT
  76017. CP_RB_CNTL__RB_VOLATILE_MASK
  76018. CP_RB_CNTL__RB_VOLATILE__SHIFT
  76019. CP_RB_DOORBELL_CLEAR__MAPPED_QUEUE_MASK
  76020. CP_RB_DOORBELL_CLEAR__MAPPED_QUEUE__SHIFT
  76021. CP_RB_DOORBELL_CLEAR__MAPPED_QUE_DOORBELL_EN_CLEAR_MASK
  76022. CP_RB_DOORBELL_CLEAR__MAPPED_QUE_DOORBELL_EN_CLEAR__SHIFT
  76023. CP_RB_DOORBELL_CLEAR__MAPPED_QUE_DOORBELL_HIT_CLEAR_MASK
  76024. CP_RB_DOORBELL_CLEAR__MAPPED_QUE_DOORBELL_HIT_CLEAR__SHIFT
  76025. CP_RB_DOORBELL_CLEAR__MASTER_DOORBELL_EN_CLEAR_MASK
  76026. CP_RB_DOORBELL_CLEAR__MASTER_DOORBELL_EN_CLEAR__SHIFT
  76027. CP_RB_DOORBELL_CLEAR__MASTER_DOORBELL_HIT_CLEAR_MASK
  76028. CP_RB_DOORBELL_CLEAR__MASTER_DOORBELL_HIT_CLEAR__SHIFT
  76029. CP_RB_DOORBELL_CLEAR__QUEUES_DOORBELL_EN_CLEAR_MASK
  76030. CP_RB_DOORBELL_CLEAR__QUEUES_DOORBELL_EN_CLEAR__SHIFT
  76031. CP_RB_DOORBELL_CLEAR__QUEUES_DOORBELL_HIT_CLEAR_MASK
  76032. CP_RB_DOORBELL_CLEAR__QUEUES_DOORBELL_HIT_CLEAR__SHIFT
  76033. CP_RB_DOORBELL_CONTROL_SCH_0__DOORBELL_EN_MASK
  76034. CP_RB_DOORBELL_CONTROL_SCH_0__DOORBELL_EN__SHIFT
  76035. CP_RB_DOORBELL_CONTROL_SCH_0__DOORBELL_HIT_MASK
  76036. CP_RB_DOORBELL_CONTROL_SCH_0__DOORBELL_HIT__SHIFT
  76037. CP_RB_DOORBELL_CONTROL_SCH_0__DOORBELL_OFFSET_MASK
  76038. CP_RB_DOORBELL_CONTROL_SCH_0__DOORBELL_OFFSET__SHIFT
  76039. CP_RB_DOORBELL_CONTROL_SCH_1__DOORBELL_EN_MASK
  76040. CP_RB_DOORBELL_CONTROL_SCH_1__DOORBELL_EN__SHIFT
  76041. CP_RB_DOORBELL_CONTROL_SCH_1__DOORBELL_HIT_MASK
  76042. CP_RB_DOORBELL_CONTROL_SCH_1__DOORBELL_HIT__SHIFT
  76043. CP_RB_DOORBELL_CONTROL_SCH_1__DOORBELL_OFFSET_MASK
  76044. CP_RB_DOORBELL_CONTROL_SCH_1__DOORBELL_OFFSET__SHIFT
  76045. CP_RB_DOORBELL_CONTROL_SCH_2__DOORBELL_EN_MASK
  76046. CP_RB_DOORBELL_CONTROL_SCH_2__DOORBELL_EN__SHIFT
  76047. CP_RB_DOORBELL_CONTROL_SCH_2__DOORBELL_HIT_MASK
  76048. CP_RB_DOORBELL_CONTROL_SCH_2__DOORBELL_HIT__SHIFT
  76049. CP_RB_DOORBELL_CONTROL_SCH_2__DOORBELL_OFFSET_MASK
  76050. CP_RB_DOORBELL_CONTROL_SCH_2__DOORBELL_OFFSET__SHIFT
  76051. CP_RB_DOORBELL_CONTROL_SCH_3__DOORBELL_EN_MASK
  76052. CP_RB_DOORBELL_CONTROL_SCH_3__DOORBELL_EN__SHIFT
  76053. CP_RB_DOORBELL_CONTROL_SCH_3__DOORBELL_HIT_MASK
  76054. CP_RB_DOORBELL_CONTROL_SCH_3__DOORBELL_HIT__SHIFT
  76055. CP_RB_DOORBELL_CONTROL_SCH_3__DOORBELL_OFFSET_MASK
  76056. CP_RB_DOORBELL_CONTROL_SCH_3__DOORBELL_OFFSET__SHIFT
  76057. CP_RB_DOORBELL_CONTROL_SCH_4__DOORBELL_EN_MASK
  76058. CP_RB_DOORBELL_CONTROL_SCH_4__DOORBELL_EN__SHIFT
  76059. CP_RB_DOORBELL_CONTROL_SCH_4__DOORBELL_HIT_MASK
  76060. CP_RB_DOORBELL_CONTROL_SCH_4__DOORBELL_HIT__SHIFT
  76061. CP_RB_DOORBELL_CONTROL_SCH_4__DOORBELL_OFFSET_MASK
  76062. CP_RB_DOORBELL_CONTROL_SCH_4__DOORBELL_OFFSET__SHIFT
  76063. CP_RB_DOORBELL_CONTROL_SCH_5__DOORBELL_EN_MASK
  76064. CP_RB_DOORBELL_CONTROL_SCH_5__DOORBELL_EN__SHIFT
  76065. CP_RB_DOORBELL_CONTROL_SCH_5__DOORBELL_HIT_MASK
  76066. CP_RB_DOORBELL_CONTROL_SCH_5__DOORBELL_HIT__SHIFT
  76067. CP_RB_DOORBELL_CONTROL_SCH_5__DOORBELL_OFFSET_MASK
  76068. CP_RB_DOORBELL_CONTROL_SCH_5__DOORBELL_OFFSET__SHIFT
  76069. CP_RB_DOORBELL_CONTROL_SCH_6__DOORBELL_EN_MASK
  76070. CP_RB_DOORBELL_CONTROL_SCH_6__DOORBELL_EN__SHIFT
  76071. CP_RB_DOORBELL_CONTROL_SCH_6__DOORBELL_HIT_MASK
  76072. CP_RB_DOORBELL_CONTROL_SCH_6__DOORBELL_HIT__SHIFT
  76073. CP_RB_DOORBELL_CONTROL_SCH_6__DOORBELL_OFFSET_MASK
  76074. CP_RB_DOORBELL_CONTROL_SCH_6__DOORBELL_OFFSET__SHIFT
  76075. CP_RB_DOORBELL_CONTROL_SCH_7__DOORBELL_EN_MASK
  76076. CP_RB_DOORBELL_CONTROL_SCH_7__DOORBELL_EN__SHIFT
  76077. CP_RB_DOORBELL_CONTROL_SCH_7__DOORBELL_HIT_MASK
  76078. CP_RB_DOORBELL_CONTROL_SCH_7__DOORBELL_HIT__SHIFT
  76079. CP_RB_DOORBELL_CONTROL_SCH_7__DOORBELL_OFFSET_MASK
  76080. CP_RB_DOORBELL_CONTROL_SCH_7__DOORBELL_OFFSET__SHIFT
  76081. CP_RB_DOORBELL_CONTROL__DOORBELL_BIF_DROP_MASK
  76082. CP_RB_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT
  76083. CP_RB_DOORBELL_CONTROL__DOORBELL_EN_MASK
  76084. CP_RB_DOORBELL_CONTROL__DOORBELL_EN__SHIFT
  76085. CP_RB_DOORBELL_CONTROL__DOORBELL_HIT_MASK
  76086. CP_RB_DOORBELL_CONTROL__DOORBELL_HIT__SHIFT
  76087. CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK
  76088. CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT
  76089. CP_RB_DOORBELL_RANGE_LOWER__DOORBELL_RANGE_LOWER_MASK
  76090. CP_RB_DOORBELL_RANGE_LOWER__DOORBELL_RANGE_LOWER__SHIFT
  76091. CP_RB_DOORBELL_RANGE_UPPER__DOORBELL_RANGE_UPPER_MASK
  76092. CP_RB_DOORBELL_RANGE_UPPER__DOORBELL_RANGE_UPPER__SHIFT
  76093. CP_RB_OFFSET__RB_OFFSET_MASK
  76094. CP_RB_OFFSET__RB_OFFSET__SHIFT
  76095. CP_RB_RPTR
  76096. CP_RB_RPTR_ADDR
  76097. CP_RB_RPTR_ADDR_HI
  76098. CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
  76099. CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI__SHIFT
  76100. CP_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK
  76101. CP_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT
  76102. CP_RB_RPTR_ADDR__RB_RPTR_SWAP_MASK
  76103. CP_RB_RPTR_ADDR__RB_RPTR_SWAP__SHIFT
  76104. CP_RB_RPTR_WR
  76105. CP_RB_RPTR_WR__RB_RPTR_WR_MASK
  76106. CP_RB_RPTR_WR__RB_RPTR_WR__SHIFT
  76107. CP_RB_RPTR__RB_RPTR_MASK
  76108. CP_RB_RPTR__RB_RPTR__SHIFT
  76109. CP_RB_STATUS__DOORBELL_ENABLE_MASK
  76110. CP_RB_STATUS__DOORBELL_ENABLE__SHIFT
  76111. CP_RB_STATUS__DOORBELL_UPDATED_MASK
  76112. CP_RB_STATUS__DOORBELL_UPDATED__SHIFT
  76113. CP_RB_VMID
  76114. CP_RB_VMID__RB0_VMID_MASK
  76115. CP_RB_VMID__RB0_VMID__SHIFT
  76116. CP_RB_VMID__RB1_VMID_MASK
  76117. CP_RB_VMID__RB1_VMID__SHIFT
  76118. CP_RB_VMID__RB2_VMID_MASK
  76119. CP_RB_VMID__RB2_VMID__SHIFT
  76120. CP_RB_WPTR
  76121. CP_RB_WPTR_ADDR
  76122. CP_RB_WPTR_ADDR_HI
  76123. CP_RB_WPTR_DELAY
  76124. CP_RB_WPTR_DELAY__PRE_WRITE_LIMIT_MASK
  76125. CP_RB_WPTR_DELAY__PRE_WRITE_LIMIT__SHIFT
  76126. CP_RB_WPTR_DELAY__PRE_WRITE_TIMER_MASK
  76127. CP_RB_WPTR_DELAY__PRE_WRITE_TIMER__SHIFT
  76128. CP_RB_WPTR_HI__RB_WPTR_MASK
  76129. CP_RB_WPTR_HI__RB_WPTR__SHIFT
  76130. CP_RB_WPTR_POLL_ADDR_HI__OBSOLETE_MASK
  76131. CP_RB_WPTR_POLL_ADDR_HI__OBSOLETE__SHIFT
  76132. CP_RB_WPTR_POLL_ADDR_HI__RB_WPTR_POLL_ADDR_HI_MASK
  76133. CP_RB_WPTR_POLL_ADDR_HI__RB_WPTR_POLL_ADDR_HI__SHIFT
  76134. CP_RB_WPTR_POLL_ADDR_LO__OBSOLETE_MASK
  76135. CP_RB_WPTR_POLL_ADDR_LO__OBSOLETE__SHIFT
  76136. CP_RB_WPTR_POLL_ADDR_LO__RB_WPTR_POLL_ADDR_LO_MASK
  76137. CP_RB_WPTR_POLL_ADDR_LO__RB_WPTR_POLL_ADDR_LO__SHIFT
  76138. CP_RB_WPTR_POLL_CNTL
  76139. CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK
  76140. CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT__SHIFT
  76141. CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK
  76142. CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT
  76143. CP_RB_WPTR__RB_WPTR_MASK
  76144. CP_RB_WPTR__RB_WPTR__SHIFT
  76145. CP_RCIU_FIFO_EMPTY
  76146. CP_RCIU_FIFO_FULL
  76147. CP_RCIU_FIFO_FULL_AHB_MASTER
  76148. CP_RCIU_FIFO_FULL_NO_CONTEXT
  76149. CP_RCIU_FIFO_FULL_OTHER
  76150. CP_RCIU_FIFO_NOT_EMPTY_NOT_FULL
  76151. CP_RDESC_SWAPPED_MIN_MAX
  76152. CP_RECORD_PFP_TIMESTAMP
  76153. CP_RECOVERY
  76154. CP_RECOVER_DIR
  76155. CP_REGS_SIZE
  76156. CP_REGS_VER
  76157. CP_REG_AC_AMP_FIX__A
  76158. CP_REG_AC_AMP_MODE__A
  76159. CP_REG_AC_ANG_MODE__A
  76160. CP_REG_AC_AVER_POW__A
  76161. CP_REG_AC_MAX_POW__A
  76162. CP_REG_AC_NEXP_OFFS__A
  76163. CP_REG_AC_WEIGHT_EXP__A
  76164. CP_REG_AC_WEIGHT_MAN__A
  76165. CP_REG_BR_SPL_OFFSET__A
  76166. CP_REG_BR_STR_DEL__A
  76167. CP_REG_COMM_EXEC__A
  76168. CP_REG_INTERVAL__A
  76169. CP_REG_RMW
  76170. CP_REG_RT_ANG_INC0__A
  76171. CP_REG_RT_ANG_INC1__A
  76172. CP_REG_RT_DETECT_ENA__A
  76173. CP_REG_RT_DETECT_TRH__A
  76174. CP_REG_RT_EXP_MARG__A
  76175. CP_REG_TEST
  76176. CP_REG_TO_MEM
  76177. CP_REG_TO_MEM_0_64B
  76178. CP_REG_TO_MEM_0_ACCUMULATE
  76179. CP_REG_TO_MEM_0_CNT
  76180. CP_REG_TO_MEM_0_CNT__MASK
  76181. CP_REG_TO_MEM_0_CNT__SHIFT
  76182. CP_REG_TO_MEM_0_REG
  76183. CP_REG_TO_MEM_0_REG__MASK
  76184. CP_REG_TO_MEM_0_REG__SHIFT
  76185. CP_REG_TO_MEM_1_DEST
  76186. CP_REG_TO_MEM_1_DEST__MASK
  76187. CP_REG_TO_MEM_1_DEST__SHIFT
  76188. CP_REG_TO_MEM_2_DEST_HI
  76189. CP_REG_TO_MEM_2_DEST_HI__MASK
  76190. CP_REG_TO_MEM_2_DEST_HI__SHIFT
  76191. CP_REG_TO_SCRATCH
  76192. CP_REG_WRITE
  76193. CP_REG_WR_NO_CTXT
  76194. CP_RESERVED_12
  76195. CP_RESERVED_17
  76196. CP_RESIZEFS_FLAG
  76197. CP_RESUME_CYCLES
  76198. CP_RESUME_TO_BOUNDARY_CYCLES
  76199. CP_RING
  76200. CP_RING0_PRIORITY__PRIORITY_MASK
  76201. CP_RING0_PRIORITY__PRIORITY__SHIFT
  76202. CP_RING1_PRIORITY__PRIORITY_MASK
  76203. CP_RING1_PRIORITY__PRIORITY__SHIFT
  76204. CP_RING2_PRIORITY__PRIORITY_MASK
  76205. CP_RING2_PRIORITY__PRIORITY__SHIFT
  76206. CP_RINGID0_INT_ENABLE
  76207. CP_RINGID0_INT_STAT
  76208. CP_RINGID1_INT_ENABLE
  76209. CP_RINGID1_INT_STAT
  76210. CP_RINGID2_INT_ENABLE
  76211. CP_RINGID2_INT_STAT
  76212. CP_RINGID__RINGID_MASK
  76213. CP_RINGID__RINGID__SHIFT
  76214. CP_RING_BYTES
  76215. CP_RING_ID
  76216. CP_RING_PRIORITY_CNTS__PRIORITY1_CNT_MASK
  76217. CP_RING_PRIORITY_CNTS__PRIORITY1_CNT__SHIFT
  76218. CP_RING_PRIORITY_CNTS__PRIORITY2A_CNT_MASK
  76219. CP_RING_PRIORITY_CNTS__PRIORITY2A_CNT__SHIFT
  76220. CP_RING_PRIORITY_CNTS__PRIORITY2B_CNT_MASK
  76221. CP_RING_PRIORITY_CNTS__PRIORITY2B_CNT__SHIFT
  76222. CP_RING_PRIORITY_CNTS__PRIORITY3_CNT_MASK
  76223. CP_RING_PRIORITY_CNTS__PRIORITY3_CNT__SHIFT
  76224. CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK
  76225. CP_ROQ1_THRESHOLDS__R0_IB1_START__SHIFT
  76226. CP_ROQ1_THRESHOLDS__R1_IB1_START_MASK
  76227. CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT
  76228. CP_ROQ1_THRESHOLDS__RB1_START_MASK
  76229. CP_ROQ1_THRESHOLDS__RB1_START__SHIFT
  76230. CP_ROQ1_THRESHOLDS__RB2_START_MASK
  76231. CP_ROQ1_THRESHOLDS__RB2_START__SHIFT
  76232. CP_ROQ2_AVAIL__ROQ_CNT_DB_MASK
  76233. CP_ROQ2_AVAIL__ROQ_CNT_DB__SHIFT
  76234. CP_ROQ2_AVAIL__ROQ_CNT_IB2_MASK
  76235. CP_ROQ2_AVAIL__ROQ_CNT_IB2__SHIFT
  76236. CP_ROQ2_THRESHOLDS__R0_IB2_START_MASK
  76237. CP_ROQ2_THRESHOLDS__R0_IB2_START__SHIFT
  76238. CP_ROQ2_THRESHOLDS__R1_IB2_START_MASK
  76239. CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT
  76240. CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK
  76241. CP_ROQ2_THRESHOLDS__R2_IB1_START__SHIFT
  76242. CP_ROQ2_THRESHOLDS__R2_IB2_START_MASK
  76243. CP_ROQ2_THRESHOLDS__R2_IB2_START__SHIFT
  76244. CP_ROQ3_THRESHOLDS__R0_DB_START_MASK
  76245. CP_ROQ3_THRESHOLDS__R0_DB_START__SHIFT
  76246. CP_ROQ3_THRESHOLDS__R1_DB_START_MASK
  76247. CP_ROQ3_THRESHOLDS__R1_DB_START__SHIFT
  76248. CP_ROQ_AVAIL__ROQ_CNT_IB1_MASK
  76249. CP_ROQ_AVAIL__ROQ_CNT_IB1__SHIFT
  76250. CP_ROQ_AVAIL__ROQ_CNT_RING_MASK
  76251. CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT
  76252. CP_ROQ_DB_STAT__ROQ_RPTR_DB_MASK
  76253. CP_ROQ_DB_STAT__ROQ_RPTR_DB__SHIFT
  76254. CP_ROQ_DB_STAT__ROQ_WPTR_DB_MASK
  76255. CP_ROQ_DB_STAT__ROQ_WPTR_DB__SHIFT
  76256. CP_ROQ_IB1_STAT
  76257. CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK
  76258. CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1__SHIFT
  76259. CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1_MASK
  76260. CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT
  76261. CP_ROQ_IB2_STAT
  76262. CP_ROQ_IB2_STAT__ROQ_RPTR_INDIRECT2_MASK
  76263. CP_ROQ_IB2_STAT__ROQ_RPTR_INDIRECT2__SHIFT
  76264. CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2_MASK
  76265. CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT
  76266. CP_ROQ_RB_STAT__ROQ_RPTR_PRIMARY_MASK
  76267. CP_ROQ_RB_STAT__ROQ_RPTR_PRIMARY__SHIFT
  76268. CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK
  76269. CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT
  76270. CP_ROQ_THRESHOLDS__IB1_START_MASK
  76271. CP_ROQ_THRESHOLDS__IB1_START__SHIFT
  76272. CP_ROQ_THRESHOLDS__IB2_START_MASK
  76273. CP_ROQ_THRESHOLDS__IB2_START__SHIFT
  76274. CP_RUN_OPENCL
  76275. CP_RX_RING_SIZE
  76276. CP_SAMPLE_STATUS__DISP_INDIRECT_ACTIVE_MASK
  76277. CP_SAMPLE_STATUS__DISP_INDIRECT_ACTIVE__SHIFT
  76278. CP_SAMPLE_STATUS__DRAW_INDIRECT_ACTIVE_MASK
  76279. CP_SAMPLE_STATUS__DRAW_INDIRECT_ACTIVE__SHIFT
  76280. CP_SAMPLE_STATUS__PIPELINE_ACTIVE_MASK
  76281. CP_SAMPLE_STATUS__PIPELINE_ACTIVE__SHIFT
  76282. CP_SAMPLE_STATUS__SCREEN_EXT_ACTIVE_MASK
  76283. CP_SAMPLE_STATUS__SCREEN_EXT_ACTIVE__SHIFT
  76284. CP_SAMPLE_STATUS__STIPPLE_ACTIVE_MASK
  76285. CP_SAMPLE_STATUS__STIPPLE_ACTIVE__SHIFT
  76286. CP_SAMPLE_STATUS__STREAMOUT_ACTIVE_MASK
  76287. CP_SAMPLE_STATUS__STREAMOUT_ACTIVE__SHIFT
  76288. CP_SAMPLE_STATUS__VGT_BUFFERS_ACTIVE_MASK
  76289. CP_SAMPLE_STATUS__VGT_BUFFERS_ACTIVE__SHIFT
  76290. CP_SAMPLE_STATUS__Z_PASS_ACITVE_MASK
  76291. CP_SAMPLE_STATUS__Z_PASS_ACITVE__SHIFT
  76292. CP_SB_NEED_CP
  76293. CP_SCRATCH_DATA__SCRATCH_DATA_MASK
  76294. CP_SCRATCH_DATA__SCRATCH_DATA__SHIFT
  76295. CP_SCRATCH_INDEX__SCRATCH_INDEX_64BIT_MODE_MASK
  76296. CP_SCRATCH_INDEX__SCRATCH_INDEX_64BIT_MODE__SHIFT
  76297. CP_SCRATCH_INDEX__SCRATCH_INDEX_MASK
  76298. CP_SCRATCH_INDEX__SCRATCH_INDEX__SHIFT
  76299. CP_SCRATCH_TO_REG
  76300. CP_SC_PSINVOC_COUNT0_HI__PSINVOC_COUNT0_HI_MASK
  76301. CP_SC_PSINVOC_COUNT0_HI__PSINVOC_COUNT0_HI__SHIFT
  76302. CP_SC_PSINVOC_COUNT0_LO__PSINVOC_COUNT0_LO_MASK
  76303. CP_SC_PSINVOC_COUNT0_LO__PSINVOC_COUNT0_LO__SHIFT
  76304. CP_SC_PSINVOC_COUNT1_HI__OBSOLETE_MASK
  76305. CP_SC_PSINVOC_COUNT1_HI__OBSOLETE__SHIFT
  76306. CP_SC_PSINVOC_COUNT1_LO__OBSOLETE_MASK
  76307. CP_SC_PSINVOC_COUNT1_LO__OBSOLETE__SHIFT
  76308. CP_SD_CNTL__CPC_EN_MASK
  76309. CP_SD_CNTL__CPC_EN__SHIFT
  76310. CP_SD_CNTL__CPF_EN_MASK
  76311. CP_SD_CNTL__CPF_EN__SHIFT
  76312. CP_SD_CNTL__CPG_EN_MASK
  76313. CP_SD_CNTL__CPG_EN__SHIFT
  76314. CP_SD_CNTL__EA_EN_MASK
  76315. CP_SD_CNTL__EA_EN__SHIFT
  76316. CP_SD_CNTL__GE_EN_MASK
  76317. CP_SD_CNTL__GE_EN__SHIFT
  76318. CP_SD_CNTL__IA_EN_MASK
  76319. CP_SD_CNTL__IA_EN__SHIFT
  76320. CP_SD_CNTL__PA_EN_MASK
  76321. CP_SD_CNTL__PA_EN__SHIFT
  76322. CP_SD_CNTL__RLC_EN_MASK
  76323. CP_SD_CNTL__RLC_EN__SHIFT
  76324. CP_SD_CNTL__RMI_EN_MASK
  76325. CP_SD_CNTL__RMI_EN__SHIFT
  76326. CP_SD_CNTL__SDMA_EN_MASK
  76327. CP_SD_CNTL__SDMA_EN__SHIFT
  76328. CP_SD_CNTL__SD_VMIDVEC_OVERRIDE_MASK
  76329. CP_SD_CNTL__SD_VMIDVEC_OVERRIDE__SHIFT
  76330. CP_SD_CNTL__SPI_EN_MASK
  76331. CP_SD_CNTL__SPI_EN__SHIFT
  76332. CP_SD_CNTL__UTCL1_EN_MASK
  76333. CP_SD_CNTL__UTCL1_EN__SHIFT
  76334. CP_SD_CNTL__WD_EN_MASK
  76335. CP_SD_CNTL__WD_EN__SHIFT
  76336. CP_SEEK_1
  76337. CP_SEEK_2
  76338. CP_SEM_DOORBELL__DOORBELL_OFFSET_MASK
  76339. CP_SEM_DOORBELL__DOORBELL_OFFSET__SHIFT
  76340. CP_SEM_INCOMPLETE_TIMER_CNTL
  76341. CP_SEM_WAIT_TIMER
  76342. CP_SEM_WAIT_TIMER__SEM_WAIT_TIMER_MASK
  76343. CP_SEM_WAIT_TIMER__SEM_WAIT_TIMER__SHIFT
  76344. CP_SET
  76345. CP_SET_1
  76346. CP_SET_BIN
  76347. CP_SET_BIN_1_X1
  76348. CP_SET_BIN_1_X1__MASK
  76349. CP_SET_BIN_1_X1__SHIFT
  76350. CP_SET_BIN_1_Y1
  76351. CP_SET_BIN_1_Y1__MASK
  76352. CP_SET_BIN_1_Y1__SHIFT
  76353. CP_SET_BIN_2_X2
  76354. CP_SET_BIN_2_X2__MASK
  76355. CP_SET_BIN_2_X2__SHIFT
  76356. CP_SET_BIN_2_Y2
  76357. CP_SET_BIN_2_Y2__MASK
  76358. CP_SET_BIN_2_Y2__SHIFT
  76359. CP_SET_BIN_DATA
  76360. CP_SET_BIN_DATA5
  76361. CP_SET_BIN_DATA5_0_VSC_N
  76362. CP_SET_BIN_DATA5_0_VSC_N__MASK
  76363. CP_SET_BIN_DATA5_0_VSC_N__SHIFT
  76364. CP_SET_BIN_DATA5_0_VSC_SIZE
  76365. CP_SET_BIN_DATA5_0_VSC_SIZE__MASK
  76366. CP_SET_BIN_DATA5_0_VSC_SIZE__SHIFT
  76367. CP_SET_BIN_DATA5_1_BIN_DATA_ADDR_LO
  76368. CP_SET_BIN_DATA5_1_BIN_DATA_ADDR_LO__MASK
  76369. CP_SET_BIN_DATA5_1_BIN_DATA_ADDR_LO__SHIFT
  76370. CP_SET_BIN_DATA5_2_BIN_DATA_ADDR_HI
  76371. CP_SET_BIN_DATA5_2_BIN_DATA_ADDR_HI__MASK
  76372. CP_SET_BIN_DATA5_2_BIN_DATA_ADDR_HI__SHIFT
  76373. CP_SET_BIN_DATA5_3_BIN_SIZE_ADDRESS_LO
  76374. CP_SET_BIN_DATA5_3_BIN_SIZE_ADDRESS_LO__MASK
  76375. CP_SET_BIN_DATA5_3_BIN_SIZE_ADDRESS_LO__SHIFT
  76376. CP_SET_BIN_DATA5_4_BIN_SIZE_ADDRESS_HI
  76377. CP_SET_BIN_DATA5_4_BIN_SIZE_ADDRESS_HI__MASK
  76378. CP_SET_BIN_DATA5_4_BIN_SIZE_ADDRESS_HI__SHIFT
  76379. CP_SET_BIN_DATA5_5_BIN_DATA_ADDR2_LO
  76380. CP_SET_BIN_DATA5_5_BIN_DATA_ADDR2_LO__MASK
  76381. CP_SET_BIN_DATA5_5_BIN_DATA_ADDR2_LO__SHIFT
  76382. CP_SET_BIN_DATA5_6_BIN_DATA_ADDR2_LO
  76383. CP_SET_BIN_DATA5_6_BIN_DATA_ADDR2_LO__MASK
  76384. CP_SET_BIN_DATA5_6_BIN_DATA_ADDR2_LO__SHIFT
  76385. CP_SET_BIN_DATA_0_BIN_DATA_ADDR
  76386. CP_SET_BIN_DATA_0_BIN_DATA_ADDR__MASK
  76387. CP_SET_BIN_DATA_0_BIN_DATA_ADDR__SHIFT
  76388. CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS
  76389. CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS__MASK
  76390. CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS__SHIFT
  76391. CP_SET_BIN_MASK
  76392. CP_SET_BIN_SELECT
  76393. CP_SET_CONSTANT
  76394. CP_SET_CONTEXT_POINTER
  76395. CP_SET_DRAW_INIT_FLAGS
  76396. CP_SET_DRAW_STATE
  76397. CP_SET_DRAW_STATE__0_COUNT
  76398. CP_SET_DRAW_STATE__0_COUNT__MASK
  76399. CP_SET_DRAW_STATE__0_COUNT__SHIFT
  76400. CP_SET_DRAW_STATE__0_DIRTY
  76401. CP_SET_DRAW_STATE__0_DISABLE
  76402. CP_SET_DRAW_STATE__0_DISABLE_ALL_GROUPS
  76403. CP_SET_DRAW_STATE__0_ENABLE_MASK
  76404. CP_SET_DRAW_STATE__0_ENABLE_MASK__MASK
  76405. CP_SET_DRAW_STATE__0_ENABLE_MASK__SHIFT
  76406. CP_SET_DRAW_STATE__0_GROUP_ID
  76407. CP_SET_DRAW_STATE__0_GROUP_ID__MASK
  76408. CP_SET_DRAW_STATE__0_GROUP_ID__SHIFT
  76409. CP_SET_DRAW_STATE__0_LOAD_IMMED
  76410. CP_SET_DRAW_STATE__1_ADDR_LO
  76411. CP_SET_DRAW_STATE__1_ADDR_LO__MASK
  76412. CP_SET_DRAW_STATE__1_ADDR_LO__SHIFT
  76413. CP_SET_DRAW_STATE__2_ADDR_HI
  76414. CP_SET_DRAW_STATE__2_ADDR_HI__MASK
  76415. CP_SET_DRAW_STATE__2_ADDR_HI__SHIFT
  76416. CP_SET_FLAG
  76417. CP_SET_MARKER
  76418. CP_SET_MODE
  76419. CP_SET_PROTECTED_MODE
  76420. CP_SET_PSEUDO_REG
  76421. CP_SET_RENDER_MODE
  76422. CP_SET_RENDER_MODE_0_MODE
  76423. CP_SET_RENDER_MODE_0_MODE__MASK
  76424. CP_SET_RENDER_MODE_0_MODE__SHIFT
  76425. CP_SET_RENDER_MODE_1_ADDR_0_LO
  76426. CP_SET_RENDER_MODE_1_ADDR_0_LO__MASK
  76427. CP_SET_RENDER_MODE_1_ADDR_0_LO__SHIFT
  76428. CP_SET_RENDER_MODE_2_ADDR_0_HI
  76429. CP_SET_RENDER_MODE_2_ADDR_0_HI__MASK
  76430. CP_SET_RENDER_MODE_2_ADDR_0_HI__SHIFT
  76431. CP_SET_RENDER_MODE_3_GMEM_ENABLE
  76432. CP_SET_RENDER_MODE_3_VSC_ENABLE
  76433. CP_SET_RENDER_MODE_5_ADDR_1_LEN
  76434. CP_SET_RENDER_MODE_5_ADDR_1_LEN__MASK
  76435. CP_SET_RENDER_MODE_5_ADDR_1_LEN__SHIFT
  76436. CP_SET_RENDER_MODE_6_ADDR_1_LO
  76437. CP_SET_RENDER_MODE_6_ADDR_1_LO__MASK
  76438. CP_SET_RENDER_MODE_6_ADDR_1_LO__SHIFT
  76439. CP_SET_RENDER_MODE_7_ADDR_1_HI
  76440. CP_SET_RENDER_MODE_7_ADDR_1_HI__MASK
  76441. CP_SET_RENDER_MODE_7_ADDR_1_HI__SHIFT
  76442. CP_SET_SECURE_MODE
  76443. CP_SET_SHADER_BASES
  76444. CP_SET_STATE
  76445. CP_SET_SUBDRAW_SIZE
  76446. CP_SET_VISIBILITY_OVERRIDE
  76447. CP_SET_XFER_POINTER
  76448. CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK
  76449. CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI__SHIFT
  76450. CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK
  76451. CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT
  76452. CP_SIG_SEM_ADDR_HI__SEM_SELECT_MASK
  76453. CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT
  76454. CP_SIG_SEM_ADDR_HI__SEM_SIGNAL_TYPE_MASK
  76455. CP_SIG_SEM_ADDR_HI__SEM_SIGNAL_TYPE__SHIFT
  76456. CP_SIG_SEM_ADDR_HI__SEM_USE_MAILBOX_MASK
  76457. CP_SIG_SEM_ADDR_HI__SEM_USE_MAILBOX__SHIFT
  76458. CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO_MASK
  76459. CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT
  76460. CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK
  76461. CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT
  76462. CP_SKIP_IB2_ENABLE_GLOBAL
  76463. CP_SKIP_IB2_ENABLE_LOCAL
  76464. CP_SMMU_TABLE_UPDATE
  76465. CP_SOFT_RESET_CNTL__CMP_HQD_QUEUE_DOORBELL_RESET_MASK
  76466. CP_SOFT_RESET_CNTL__CMP_HQD_QUEUE_DOORBELL_RESET__SHIFT
  76467. CP_SOFT_RESET_CNTL__CMP_HQD_REG_RESET_MASK
  76468. CP_SOFT_RESET_CNTL__CMP_HQD_REG_RESET__SHIFT
  76469. CP_SOFT_RESET_CNTL__CMP_INTR_REG_RESET_MASK
  76470. CP_SOFT_RESET_CNTL__CMP_INTR_REG_RESET__SHIFT
  76471. CP_SOFT_RESET_CNTL__CMP_ONLY_SOFT_RESET_MASK
  76472. CP_SOFT_RESET_CNTL__CMP_ONLY_SOFT_RESET__SHIFT
  76473. CP_SOFT_RESET_CNTL__GFX_INTR_REG_RESET_MASK
  76474. CP_SOFT_RESET_CNTL__GFX_INTR_REG_RESET__SHIFT
  76475. CP_SOFT_RESET_CNTL__GFX_ONLY_SOFT_RESET_MASK
  76476. CP_SOFT_RESET_CNTL__GFX_ONLY_SOFT_RESET__SHIFT
  76477. CP_SOFT_RESET_CNTL__GFX_RB_DOORBELL_RESET_MASK
  76478. CP_SOFT_RESET_CNTL__GFX_RB_DOORBELL_RESET__SHIFT
  76479. CP_SPEC_LOG_NUM
  76480. CP_STALLED_STAT1
  76481. CP_STALLED_STAT1__ME_HAS_ACTIVE_CE_BUFFER_FLAG_MASK
  76482. CP_STALLED_STAT1__ME_HAS_ACTIVE_CE_BUFFER_FLAG__SHIFT
  76483. CP_STALLED_STAT1__ME_HAS_ACTIVE_DE_BUFFER_FLAG_MASK
  76484. CP_STALLED_STAT1__ME_HAS_ACTIVE_DE_BUFFER_FLAG__SHIFT
  76485. CP_STALLED_STAT1__ME_STALLED_ON_ATOMIC_RTN_DATA_MASK
  76486. CP_STALLED_STAT1__ME_STALLED_ON_ATOMIC_RTN_DATA__SHIFT
  76487. CP_STALLED_STAT1__ME_STALLED_ON_TC_WR_CONFIRM_MASK
  76488. CP_STALLED_STAT1__ME_STALLED_ON_TC_WR_CONFIRM__SHIFT
  76489. CP_STALLED_STAT1__ME_WAITING_ON_MC_READ_DATA_MASK
  76490. CP_STALLED_STAT1__ME_WAITING_ON_MC_READ_DATA__SHIFT
  76491. CP_STALLED_STAT1__ME_WAITING_ON_REG_READ_DATA_MASK
  76492. CP_STALLED_STAT1__ME_WAITING_ON_REG_READ_DATA__SHIFT
  76493. CP_STALLED_STAT1__ME_WAITING_ON_TC_READ_DATA_MASK
  76494. CP_STALLED_STAT1__ME_WAITING_ON_TC_READ_DATA__SHIFT
  76495. CP_STALLED_STAT1__MIU_WAITING_ON_RDREQ_FREE_MASK
  76496. CP_STALLED_STAT1__MIU_WAITING_ON_RDREQ_FREE__SHIFT
  76497. CP_STALLED_STAT1__MIU_WAITING_ON_WRREQ_FREE_MASK
  76498. CP_STALLED_STAT1__MIU_WAITING_ON_WRREQ_FREE__SHIFT
  76499. CP_STALLED_STAT1__RBIU_TO_DMA_NOT_RDY_TO_RCV_MASK
  76500. CP_STALLED_STAT1__RBIU_TO_DMA_NOT_RDY_TO_RCV__SHIFT
  76501. CP_STALLED_STAT1__RBIU_TO_MEMWR_NOT_RDY_TO_RCV_MASK
  76502. CP_STALLED_STAT1__RBIU_TO_MEMWR_NOT_RDY_TO_RCV__SHIFT
  76503. CP_STALLED_STAT1__RBIU_TO_SEM_NOT_RDY_TO_RCV_MASK
  76504. CP_STALLED_STAT1__RBIU_TO_SEM_NOT_RDY_TO_RCV__SHIFT
  76505. CP_STALLED_STAT1__RCIU_HALTED_BY_REG_VIOLATION_MASK
  76506. CP_STALLED_STAT1__RCIU_HALTED_BY_REG_VIOLATION__SHIFT
  76507. CP_STALLED_STAT1__RCIU_STALLED_ON_APPEND_READ_MASK
  76508. CP_STALLED_STAT1__RCIU_STALLED_ON_APPEND_READ__SHIFT
  76509. CP_STALLED_STAT1__RCIU_STALLED_ON_DMA_READ_MASK
  76510. CP_STALLED_STAT1__RCIU_STALLED_ON_DMA_READ__SHIFT
  76511. CP_STALLED_STAT1__RCIU_STALLED_ON_ME_READ_MASK
  76512. CP_STALLED_STAT1__RCIU_STALLED_ON_ME_READ__SHIFT
  76513. CP_STALLED_STAT1__RCIU_WAITING_ON_GDS_FREE_MASK
  76514. CP_STALLED_STAT1__RCIU_WAITING_ON_GDS_FREE__SHIFT
  76515. CP_STALLED_STAT1__RCIU_WAITING_ON_GRBM_FREE_MASK
  76516. CP_STALLED_STAT1__RCIU_WAITING_ON_GRBM_FREE__SHIFT
  76517. CP_STALLED_STAT1__RCIU_WAITING_ON_VGT_FREE_MASK
  76518. CP_STALLED_STAT1__RCIU_WAITING_ON_VGT_FREE__SHIFT
  76519. CP_STALLED_STAT2
  76520. CP_STALLED_STAT2__APPEND_ACTIVE_PARTITION_MASK
  76521. CP_STALLED_STAT2__APPEND_ACTIVE_PARTITION__SHIFT
  76522. CP_STALLED_STAT2__APPEND_RDY_WAIT_ON_CS_DONE_MASK
  76523. CP_STALLED_STAT2__APPEND_RDY_WAIT_ON_CS_DONE__SHIFT
  76524. CP_STALLED_STAT2__APPEND_RDY_WAIT_ON_PS_DONE_MASK
  76525. CP_STALLED_STAT2__APPEND_RDY_WAIT_ON_PS_DONE__SHIFT
  76526. CP_STALLED_STAT2__APPEND_WAITING_TO_SEND_MEMWRITE_MASK
  76527. CP_STALLED_STAT2__APPEND_WAITING_TO_SEND_MEMWRITE__SHIFT
  76528. CP_STALLED_STAT2__APPEND_WAIT_ON_WR_CONFIRM_MASK
  76529. CP_STALLED_STAT2__APPEND_WAIT_ON_WR_CONFIRM__SHIFT
  76530. CP_STALLED_STAT2__EOPD_FIFO_NEEDS_SC_EOP_DONE_MASK
  76531. CP_STALLED_STAT2__EOPD_FIFO_NEEDS_SC_EOP_DONE__SHIFT
  76532. CP_STALLED_STAT2__EOPD_FIFO_NEEDS_WR_CONFIRM_MASK
  76533. CP_STALLED_STAT2__EOPD_FIFO_NEEDS_WR_CONFIRM__SHIFT
  76534. CP_STALLED_STAT2__GFX_CNTX_NOT_AVAIL_TO_ME_MASK
  76535. CP_STALLED_STAT2__GFX_CNTX_NOT_AVAIL_TO_ME__SHIFT
  76536. CP_STALLED_STAT2__MEQ_TO_ME_NOT_RDY_TO_RCV_MASK
  76537. CP_STALLED_STAT2__MEQ_TO_ME_NOT_RDY_TO_RCV__SHIFT
  76538. CP_STALLED_STAT2__ME_RCIU_NOT_RDY_TO_RCV_MASK
  76539. CP_STALLED_STAT2__ME_RCIU_NOT_RDY_TO_RCV__SHIFT
  76540. CP_STALLED_STAT2__ME_TO_CONST_NOT_RDY_TO_RCV_MASK
  76541. CP_STALLED_STAT2__ME_TO_CONST_NOT_RDY_TO_RCV__SHIFT
  76542. CP_STALLED_STAT2__ME_WAITING_DATA_FROM_PFP_MASK
  76543. CP_STALLED_STAT2__ME_WAITING_DATA_FROM_PFP__SHIFT
  76544. CP_STALLED_STAT2__ME_WAITING_DATA_FROM_STQ_MASK
  76545. CP_STALLED_STAT2__ME_WAITING_DATA_FROM_STQ__SHIFT
  76546. CP_STALLED_STAT2__ME_WAITING_ON_PARTIAL_FLUSH_MASK
  76547. CP_STALLED_STAT2__ME_WAITING_ON_PARTIAL_FLUSH__SHIFT
  76548. CP_STALLED_STAT2__ME_WAIT_ON_AVAIL_BUFFER_MASK
  76549. CP_STALLED_STAT2__ME_WAIT_ON_AVAIL_BUFFER__SHIFT
  76550. CP_STALLED_STAT2__ME_WAIT_ON_CE_COUNTER_MASK
  76551. CP_STALLED_STAT2__ME_WAIT_ON_CE_COUNTER__SHIFT
  76552. CP_STALLED_STAT2__PFP_MIU_READ_PENDING_MASK
  76553. CP_STALLED_STAT2__PFP_MIU_READ_PENDING__SHIFT
  76554. CP_STALLED_STAT2__PFP_RCIU_READ_PENDING_MASK
  76555. CP_STALLED_STAT2__PFP_RCIU_READ_PENDING__SHIFT
  76556. CP_STALLED_STAT2__PFP_STALLED_ON_ATOMIC_RTN_DATA_MASK
  76557. CP_STALLED_STAT2__PFP_STALLED_ON_ATOMIC_RTN_DATA__SHIFT
  76558. CP_STALLED_STAT2__PFP_STALLED_ON_TC_WR_CONFIRM_MASK
  76559. CP_STALLED_STAT2__PFP_STALLED_ON_TC_WR_CONFIRM__SHIFT
  76560. CP_STALLED_STAT2__PFP_TO_CSF_NOT_RDY_TO_RCV_MASK
  76561. CP_STALLED_STAT2__PFP_TO_CSF_NOT_RDY_TO_RCV__SHIFT
  76562. CP_STALLED_STAT2__PFP_TO_MEQ_DDID_NOT_RDY_TO_RCV_MASK
  76563. CP_STALLED_STAT2__PFP_TO_MEQ_DDID_NOT_RDY_TO_RCV__SHIFT
  76564. CP_STALLED_STAT2__PFP_TO_MEQ_NOT_RDY_TO_RCV_MASK
  76565. CP_STALLED_STAT2__PFP_TO_MEQ_NOT_RDY_TO_RCV__SHIFT
  76566. CP_STALLED_STAT2__PFP_TO_MIU_WRITE_NOT_RDY_TO_RCV_MASK
  76567. CP_STALLED_STAT2__PFP_TO_MIU_WRITE_NOT_RDY_TO_RCV__SHIFT
  76568. CP_STALLED_STAT2__PFP_TO_RCIU_NOT_RDY_TO_RCV_MASK
  76569. CP_STALLED_STAT2__PFP_TO_RCIU_NOT_RDY_TO_RCV__SHIFT
  76570. CP_STALLED_STAT2__PFP_TO_VGT_WRITES_PENDING_MASK
  76571. CP_STALLED_STAT2__PFP_TO_VGT_WRITES_PENDING__SHIFT
  76572. CP_STALLED_STAT2__PFP_WAITING_ON_BUFFER_DATA_MASK
  76573. CP_STALLED_STAT2__PFP_WAITING_ON_BUFFER_DATA__SHIFT
  76574. CP_STALLED_STAT2__PIPE_STATS_WR_DATA_PENDING_MASK
  76575. CP_STALLED_STAT2__PIPE_STATS_WR_DATA_PENDING__SHIFT
  76576. CP_STALLED_STAT2__STQ_TO_ME_NOT_RDY_TO_RCV_MASK
  76577. CP_STALLED_STAT2__STQ_TO_ME_NOT_RDY_TO_RCV__SHIFT
  76578. CP_STALLED_STAT2__STRMO_WR_OF_PRIM_DATA_PENDING_MASK
  76579. CP_STALLED_STAT2__STRMO_WR_OF_PRIM_DATA_PENDING__SHIFT
  76580. CP_STALLED_STAT2__SURF_SYNC_NEEDS_ALL_CLEAN_MASK
  76581. CP_STALLED_STAT2__SURF_SYNC_NEEDS_ALL_CLEAN__SHIFT
  76582. CP_STALLED_STAT2__SURF_SYNC_NEEDS_IDLE_CNTXS_MASK
  76583. CP_STALLED_STAT2__SURF_SYNC_NEEDS_IDLE_CNTXS__SHIFT
  76584. CP_STALLED_STAT3
  76585. CP_STALLED_STAT3__ATCL1_WAITING_ON_TRANS_MASK
  76586. CP_STALLED_STAT3__ATCL1_WAITING_ON_TRANS__SHIFT
  76587. CP_STALLED_STAT3__ATCL2IU_WAITING_ON_FREE_MASK
  76588. CP_STALLED_STAT3__ATCL2IU_WAITING_ON_FREE__SHIFT
  76589. CP_STALLED_STAT3__ATCL2IU_WAITING_ON_TAGS_MASK
  76590. CP_STALLED_STAT3__ATCL2IU_WAITING_ON_TAGS__SHIFT
  76591. CP_STALLED_STAT3__CE_STALLED_ON_ATOMIC_RTN_DATA_MASK
  76592. CP_STALLED_STAT3__CE_STALLED_ON_ATOMIC_RTN_DATA__SHIFT
  76593. CP_STALLED_STAT3__CE_STALLED_ON_TC_WR_CONFIRM_MASK
  76594. CP_STALLED_STAT3__CE_STALLED_ON_TC_WR_CONFIRM__SHIFT
  76595. CP_STALLED_STAT3__CE_TO_CSF_NOT_RDY_TO_RCV_MASK
  76596. CP_STALLED_STAT3__CE_TO_CSF_NOT_RDY_TO_RCV__SHIFT
  76597. CP_STALLED_STAT3__CE_TO_INC_FIFO_NOT_RDY_TO_RCV_MASK
  76598. CP_STALLED_STAT3__CE_TO_INC_FIFO_NOT_RDY_TO_RCV__SHIFT
  76599. CP_STALLED_STAT3__CE_TO_MIU_WRITE_NOT_RDY_TO_RCV_MASK
  76600. CP_STALLED_STAT3__CE_TO_MIU_WRITE_NOT_RDY_TO_RCV__SHIFT
  76601. CP_STALLED_STAT3__CE_TO_RAM_DUMP_NOT_RDY_MASK
  76602. CP_STALLED_STAT3__CE_TO_RAM_DUMP_NOT_RDY__SHIFT
  76603. CP_STALLED_STAT3__CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV_MASK
  76604. CP_STALLED_STAT3__CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV__SHIFT
  76605. CP_STALLED_STAT3__CE_TO_RAM_INIT_NOT_RDY_MASK
  76606. CP_STALLED_STAT3__CE_TO_RAM_INIT_NOT_RDY__SHIFT
  76607. CP_STALLED_STAT3__CE_TO_RAM_WRITE_NOT_RDY_MASK
  76608. CP_STALLED_STAT3__CE_TO_RAM_WRITE_NOT_RDY__SHIFT
  76609. CP_STALLED_STAT3__CE_TO_WR_FIFO_NOT_RDY_TO_RCV_MASK
  76610. CP_STALLED_STAT3__CE_TO_WR_FIFO_NOT_RDY_TO_RCV__SHIFT
  76611. CP_STALLED_STAT3__CE_WAITING_ON_BUFFER_DATA_MASK
  76612. CP_STALLED_STAT3__CE_WAITING_ON_BUFFER_DATA__SHIFT
  76613. CP_STALLED_STAT3__CE_WAITING_ON_CE_BUFFER_FLAG_MASK
  76614. CP_STALLED_STAT3__CE_WAITING_ON_CE_BUFFER_FLAG__SHIFT
  76615. CP_STALLED_STAT3__CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER_MASK
  76616. CP_STALLED_STAT3__CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER__SHIFT
  76617. CP_STALLED_STAT3__CE_WAITING_ON_DE_COUNTER_MASK
  76618. CP_STALLED_STAT3__CE_WAITING_ON_DE_COUNTER_UNDERFLOW_MASK
  76619. CP_STALLED_STAT3__CE_WAITING_ON_DE_COUNTER_UNDERFLOW__SHIFT
  76620. CP_STALLED_STAT3__CE_WAITING_ON_DE_COUNTER__SHIFT
  76621. CP_STALLED_STAT3__GCRIU_WAITING_ON_FREE_MASK
  76622. CP_STALLED_STAT3__GCRIU_WAITING_ON_FREE__SHIFT
  76623. CP_STALLED_STAT3__TCIU_WAITING_ON_FREE_MASK
  76624. CP_STALLED_STAT3__TCIU_WAITING_ON_FREE__SHIFT
  76625. CP_STALLED_STAT3__TCIU_WAITING_ON_TAGS_MASK
  76626. CP_STALLED_STAT3__TCIU_WAITING_ON_TAGS__SHIFT
  76627. CP_STALLED_STAT3__UTCL1_WAITING_ON_TRANS_MASK
  76628. CP_STALLED_STAT3__UTCL1_WAITING_ON_TRANS__SHIFT
  76629. CP_STALLED_STAT3__UTCL2IU_WAITING_ON_FREE_MASK
  76630. CP_STALLED_STAT3__UTCL2IU_WAITING_ON_FREE__SHIFT
  76631. CP_STALLED_STAT3__UTCL2IU_WAITING_ON_TAGS_MASK
  76632. CP_STALLED_STAT3__UTCL2IU_WAITING_ON_TAGS__SHIFT
  76633. CP_STAT
  76634. CP_STATS_SIZE
  76635. CP_STAT__ATCL2IU_BUSY_MASK
  76636. CP_STAT__ATCL2IU_BUSY__SHIFT
  76637. CP_STAT__CE_BUSY_MASK
  76638. CP_STAT__CE_BUSY__SHIFT
  76639. CP_STAT__CPC_CPG_BUSY_MASK
  76640. CP_STAT__CPC_CPG_BUSY__SHIFT
  76641. CP_STAT__CP_BUSY_MASK
  76642. CP_STAT__CP_BUSY__SHIFT
  76643. CP_STAT__DC_BUSY_MASK
  76644. CP_STAT__DC_BUSY__SHIFT
  76645. CP_STAT__DMA_BUSY_MASK
  76646. CP_STAT__DMA_BUSY__SHIFT
  76647. CP_STAT__GCRIU_BUSY_MASK
  76648. CP_STAT__GCRIU_BUSY__SHIFT
  76649. CP_STAT__INTERRUPT_BUSY_MASK
  76650. CP_STAT__INTERRUPT_BUSY__SHIFT
  76651. CP_STAT__MEQ_BUSY_MASK
  76652. CP_STAT__MEQ_BUSY__SHIFT
  76653. CP_STAT__ME_BUSY_MASK
  76654. CP_STAT__ME_BUSY__SHIFT
  76655. CP_STAT__MIU_RDREQ_BUSY_MASK
  76656. CP_STAT__MIU_RDREQ_BUSY__SHIFT
  76657. CP_STAT__MIU_WRREQ_BUSY_MASK
  76658. CP_STAT__MIU_WRREQ_BUSY__SHIFT
  76659. CP_STAT__PFP_BUSY_MASK
  76660. CP_STAT__PFP_BUSY__SHIFT
  76661. CP_STAT__QUERY_BUSY_MASK
  76662. CP_STAT__QUERY_BUSY__SHIFT
  76663. CP_STAT__RCIU_BUSY_MASK
  76664. CP_STAT__RCIU_BUSY__SHIFT
  76665. CP_STAT__ROQ_CE_DB_BUSY_MASK
  76666. CP_STAT__ROQ_CE_DB_BUSY__SHIFT
  76667. CP_STAT__ROQ_CE_INDIRECT1_BUSY_MASK
  76668. CP_STAT__ROQ_CE_INDIRECT1_BUSY__SHIFT
  76669. CP_STAT__ROQ_CE_INDIRECT2_BUSY_MASK
  76670. CP_STAT__ROQ_CE_INDIRECT2_BUSY__SHIFT
  76671. CP_STAT__ROQ_CE_RING_BUSY_MASK
  76672. CP_STAT__ROQ_CE_RING_BUSY__SHIFT
  76673. CP_STAT__ROQ_DB_BUSY_MASK
  76674. CP_STAT__ROQ_DB_BUSY__SHIFT
  76675. CP_STAT__ROQ_INDIRECT1_BUSY_MASK
  76676. CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT
  76677. CP_STAT__ROQ_INDIRECT2_BUSY_MASK
  76678. CP_STAT__ROQ_INDIRECT2_BUSY__SHIFT
  76679. CP_STAT__ROQ_RING_BUSY_MASK
  76680. CP_STAT__ROQ_RING_BUSY__SHIFT
  76681. CP_STAT__ROQ_STATE_BUSY_MASK
  76682. CP_STAT__ROQ_STATE_BUSY__SHIFT
  76683. CP_STAT__SCRATCH_RAM_BUSY_MASK
  76684. CP_STAT__SCRATCH_RAM_BUSY__SHIFT
  76685. CP_STAT__SEMAPHORE_BUSY_MASK
  76686. CP_STAT__SEMAPHORE_BUSY__SHIFT
  76687. CP_STAT__SURFACE_SYNC_BUSY_MASK
  76688. CP_STAT__SURFACE_SYNC_BUSY__SHIFT
  76689. CP_STAT__TCIU_BUSY_MASK
  76690. CP_STAT__TCIU_BUSY__SHIFT
  76691. CP_STAT__UTCL2IU_BUSY_MASK
  76692. CP_STAT__UTCL2IU_BUSY__SHIFT
  76693. CP_STQ_AVAIL__STQ_CNT_MASK
  76694. CP_STQ_AVAIL__STQ_CNT__SHIFT
  76695. CP_STQ_STAT__STQ_RPTR_MASK
  76696. CP_STQ_STAT__STQ_RPTR__SHIFT
  76697. CP_STQ_THRESHOLDS__STQ0_START_MASK
  76698. CP_STQ_THRESHOLDS__STQ0_START__SHIFT
  76699. CP_STQ_THRESHOLDS__STQ1_START_MASK
  76700. CP_STQ_THRESHOLDS__STQ1_START__SHIFT
  76701. CP_STQ_THRESHOLDS__STQ2_START_MASK
  76702. CP_STQ_THRESHOLDS__STQ2_START__SHIFT
  76703. CP_STQ_WR_STAT__STQ_WPTR_MASK
  76704. CP_STQ_WR_STAT__STQ_WPTR__SHIFT
  76705. CP_STREAM_OUT_ADDR_HI__STREAM_OUT_ADDR_HI_MASK
  76706. CP_STREAM_OUT_ADDR_HI__STREAM_OUT_ADDR_HI__SHIFT
  76707. CP_STREAM_OUT_ADDR_LO__STREAM_OUT_ADDR_LO_MASK
  76708. CP_STREAM_OUT_ADDR_LO__STREAM_OUT_ADDR_LO__SHIFT
  76709. CP_STREAM_OUT_ADDR_LO__STREAM_OUT_ADDR_SWAP_MASK
  76710. CP_STREAM_OUT_ADDR_LO__STREAM_OUT_ADDR_SWAP__SHIFT
  76711. CP_STREAM_OUT_CONTROL__CACHE_CONTROL_MASK
  76712. CP_STREAM_OUT_CONTROL__CACHE_CONTROL__SHIFT
  76713. CP_STREAM_OUT_CONTROL__CACHE_POLICY_MASK
  76714. CP_STREAM_OUT_CONTROL__CACHE_POLICY__SHIFT
  76715. CP_STREAM_OUT_CONTROL__MTYPE_MASK
  76716. CP_STREAM_OUT_CONTROL__MTYPE__SHIFT
  76717. CP_STREAM_OUT_DOORBELL__DOORBELL_OFFSET_MASK
  76718. CP_STREAM_OUT_DOORBELL__DOORBELL_OFFSET__SHIFT
  76719. CP_STRMOUT_CNTL
  76720. CP_STRMOUT_CNTL__OFFSET_UPDATE_DONE_MASK
  76721. CP_STRMOUT_CNTL__OFFSET_UPDATE_DONE__SHIFT
  76722. CP_ST_BASE_HI__ST_BASE_HI_MASK
  76723. CP_ST_BASE_HI__ST_BASE_HI__SHIFT
  76724. CP_ST_BASE_LO__ST_BASE_LO_MASK
  76725. CP_ST_BASE_LO__ST_BASE_LO__SHIFT
  76726. CP_ST_BUFSZ__ST_BUFSZ_MASK
  76727. CP_ST_BUFSZ__ST_BUFSZ__SHIFT
  76728. CP_ST_CMD_BUFSZ__ST_CMD_REQSZ_MASK
  76729. CP_ST_CMD_BUFSZ__ST_CMD_REQSZ__SHIFT
  76730. CP_SUSPEND_CNTL__ACE_SUSPEND_ACTIVE_MASK
  76731. CP_SUSPEND_CNTL__ACE_SUSPEND_ACTIVE__SHIFT
  76732. CP_SUSPEND_CNTL__RESUME_LOCK_MASK
  76733. CP_SUSPEND_CNTL__RESUME_LOCK__SHIFT
  76734. CP_SUSPEND_CNTL__SUSPEND_ENABLE_MASK
  76735. CP_SUSPEND_CNTL__SUSPEND_ENABLE__SHIFT
  76736. CP_SUSPEND_CNTL__SUSPEND_MODE_MASK
  76737. CP_SUSPEND_CNTL__SUSPEND_MODE__SHIFT
  76738. CP_SUSPEND_RESUME_REQ__RESUME_REQ_MASK
  76739. CP_SUSPEND_RESUME_REQ__RESUME_REQ__SHIFT
  76740. CP_SUSPEND_RESUME_REQ__SUSPEND_REQ_MASK
  76741. CP_SUSPEND_RESUME_REQ__SUSPEND_REQ__SHIFT
  76742. CP_SYNC
  76743. CP_TERM_ACK
  76744. CP_TERM_REQ
  76745. CP_TEST_TWO_MEMS
  76746. CP_TIME
  76747. CP_TRIMMED
  76748. CP_TRIMMED_FLAG
  76749. CP_TX_RING_SIZE
  76750. CP_TYPE0_PKT
  76751. CP_TYPE1_PKT
  76752. CP_TYPE2_PKT
  76753. CP_TYPE3_PKT
  76754. CP_TYPE4_PKT
  76755. CP_TYPE7_PKT
  76756. CP_UMOUNT
  76757. CP_UMOUNT_FLAG
  76758. CP_UNKNOWN_19
  76759. CP_UNKNOWN_1A
  76760. CP_UNKNOWN_4E
  76761. CP_UNK_A6XX_14
  76762. CP_UNK_A6XX_36
  76763. CP_UNK_A6XX_55
  76764. CP_VA_CONTROL_PAGE
  76765. CP_VGT_CSINVOC_COUNT_HI__CSINVOC_COUNT_HI_MASK
  76766. CP_VGT_CSINVOC_COUNT_HI__CSINVOC_COUNT_HI__SHIFT
  76767. CP_VGT_CSINVOC_COUNT_LO__CSINVOC_COUNT_LO_MASK
  76768. CP_VGT_CSINVOC_COUNT_LO__CSINVOC_COUNT_LO__SHIFT
  76769. CP_VGT_DSINVOC_COUNT_HI__DSINVOC_COUNT_HI_MASK
  76770. CP_VGT_DSINVOC_COUNT_HI__DSINVOC_COUNT_HI__SHIFT
  76771. CP_VGT_DSINVOC_COUNT_LO__DSINVOC_COUNT_LO_MASK
  76772. CP_VGT_DSINVOC_COUNT_LO__DSINVOC_COUNT_LO__SHIFT
  76773. CP_VGT_GSINVOC_COUNT_HI__GSINVOC_COUNT_HI_MASK
  76774. CP_VGT_GSINVOC_COUNT_HI__GSINVOC_COUNT_HI__SHIFT
  76775. CP_VGT_GSINVOC_COUNT_LO__GSINVOC_COUNT_LO_MASK
  76776. CP_VGT_GSINVOC_COUNT_LO__GSINVOC_COUNT_LO__SHIFT
  76777. CP_VGT_GSPRIM_COUNT_HI__GSPRIM_COUNT_HI_MASK
  76778. CP_VGT_GSPRIM_COUNT_HI__GSPRIM_COUNT_HI__SHIFT
  76779. CP_VGT_GSPRIM_COUNT_LO__GSPRIM_COUNT_LO_MASK
  76780. CP_VGT_GSPRIM_COUNT_LO__GSPRIM_COUNT_LO__SHIFT
  76781. CP_VGT_HSINVOC_COUNT_HI__HSINVOC_COUNT_HI_MASK
  76782. CP_VGT_HSINVOC_COUNT_HI__HSINVOC_COUNT_HI__SHIFT
  76783. CP_VGT_HSINVOC_COUNT_LO__HSINVOC_COUNT_LO_MASK
  76784. CP_VGT_HSINVOC_COUNT_LO__HSINVOC_COUNT_LO__SHIFT
  76785. CP_VGT_IAPRIM_COUNT_HI__IAPRIM_COUNT_HI_MASK
  76786. CP_VGT_IAPRIM_COUNT_HI__IAPRIM_COUNT_HI__SHIFT
  76787. CP_VGT_IAPRIM_COUNT_LO__IAPRIM_COUNT_LO_MASK
  76788. CP_VGT_IAPRIM_COUNT_LO__IAPRIM_COUNT_LO__SHIFT
  76789. CP_VGT_IAVERT_COUNT_HI__IAVERT_COUNT_HI_MASK
  76790. CP_VGT_IAVERT_COUNT_HI__IAVERT_COUNT_HI__SHIFT
  76791. CP_VGT_IAVERT_COUNT_LO__IAVERT_COUNT_LO_MASK
  76792. CP_VGT_IAVERT_COUNT_LO__IAVERT_COUNT_LO__SHIFT
  76793. CP_VGT_VSINVOC_COUNT_HI__VSINVOC_COUNT_HI_MASK
  76794. CP_VGT_VSINVOC_COUNT_HI__VSINVOC_COUNT_HI__SHIFT
  76795. CP_VGT_VSINVOC_COUNT_LO__VSINVOC_COUNT_LO_MASK
  76796. CP_VGT_VSINVOC_COUNT_LO__VSINVOC_COUNT_LO__SHIFT
  76797. CP_VIRT_STATUS__VIRT_STATUS_MASK
  76798. CP_VIRT_STATUS__VIRT_STATUS__SHIFT
  76799. CP_VIZ_QUERY
  76800. CP_VMID_PREEMPT__PREEMPT_REQUEST_MASK
  76801. CP_VMID_PREEMPT__PREEMPT_REQUEST__SHIFT
  76802. CP_VMID_PREEMPT__PREEMPT_STATUS_MASK
  76803. CP_VMID_PREEMPT__PREEMPT_STATUS__SHIFT
  76804. CP_VMID_PREEMPT__VIRT_COMMAND_MASK
  76805. CP_VMID_PREEMPT__VIRT_COMMAND__SHIFT
  76806. CP_VMID_RESET__PIPE0_QUEUES_MASK
  76807. CP_VMID_RESET__PIPE0_QUEUES__SHIFT
  76808. CP_VMID_RESET__PIPE1_QUEUES_MASK
  76809. CP_VMID_RESET__PIPE1_QUEUES__SHIFT
  76810. CP_VMID_RESET__RESET_REQUEST_MASK
  76811. CP_VMID_RESET__RESET_REQUEST__SHIFT
  76812. CP_VMID_RESET__RESET_STATUS_MASK
  76813. CP_VMID_RESET__RESET_STATUS__SHIFT
  76814. CP_VMID_STATUS__PREEMPT_CE_STATUS_MASK
  76815. CP_VMID_STATUS__PREEMPT_CE_STATUS__SHIFT
  76816. CP_VMID_STATUS__PREEMPT_DE_STATUS_MASK
  76817. CP_VMID_STATUS__PREEMPT_DE_STATUS__SHIFT
  76818. CP_VMID__VMID_MASK
  76819. CP_VMID__VMID__SHIFT
  76820. CP_WAIT
  76821. CP_WAIT_FLAG
  76822. CP_WAIT_FOR_IDLE
  76823. CP_WAIT_FOR_ME
  76824. CP_WAIT_IB_PFD_COMPLETE
  76825. CP_WAIT_MEM_WRITES
  76826. CP_WAIT_REG_EQ
  76827. CP_WAIT_REG_GTE
  76828. CP_WAIT_REG_MEM
  76829. CP_WAIT_REG_MEM_TIMEOUT
  76830. CP_WAIT_REG_MEM_TIMEOUT__WAIT_REG_MEM_TIMEOUT_MASK
  76831. CP_WAIT_REG_MEM_TIMEOUT__WAIT_REG_MEM_TIMEOUT__SHIFT
  76832. CP_WAIT_SEM_ADDR_HI__SEM_ADDR_HI_MASK
  76833. CP_WAIT_SEM_ADDR_HI__SEM_ADDR_HI__SHIFT
  76834. CP_WAIT_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK
  76835. CP_WAIT_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT
  76836. CP_WAIT_SEM_ADDR_HI__SEM_SELECT_MASK
  76837. CP_WAIT_SEM_ADDR_HI__SEM_SELECT__SHIFT
  76838. CP_WAIT_SEM_ADDR_HI__SEM_SIGNAL_TYPE_MASK
  76839. CP_WAIT_SEM_ADDR_HI__SEM_SIGNAL_TYPE__SHIFT
  76840. CP_WAIT_SEM_ADDR_HI__SEM_USE_MAILBOX_MASK
  76841. CP_WAIT_SEM_ADDR_HI__SEM_USE_MAILBOX__SHIFT
  76842. CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO_MASK
  76843. CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT
  76844. CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK
  76845. CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT
  76846. CP_WAIT_SET
  76847. CP_WAIT_UNTIL_READ
  76848. CP_WB_NWA
  76849. CP_WB_WA
  76850. CP_WIDE_REG_WRITE
  76851. CP_WRONG_PINO
  76852. CP_WT
  76853. CP_XFER_1
  76854. CP_XFER_2
  76855. CP_YIELD_ENABLE
  76856. CPlusCmd
  76857. CPx_BIAS
  76858. CQ
  76859. CQ93VC_FORMATS
  76860. CQ93VC_RATES
  76861. CQC_CACHE_ENABLE
  76862. CQC_CACHE_WB_ENABLE
  76863. CQC_CACHE_WB_THRD
  76864. CQC_VFT
  76865. CQDA
  76866. CQE_ABS_RQE_IDX
  76867. CQE_ADDL_STATUS_MASK
  76868. CQE_ADDL_STATUS_SHIFT
  76869. CQE_BASE_STATUS_MASK
  76870. CQE_BASE_STATUS_SHIFT
  76871. CQE_BD_REL
  76872. CQE_BYTE_16_LOCAL_QPN_M
  76873. CQE_BYTE_16_LOCAL_QPN_S
  76874. CQE_BYTE_20_GRH_PRESENT_S
  76875. CQE_BYTE_20_PORT_NUM_M
  76876. CQE_BYTE_20_PORT_NUM_S
  76877. CQE_BYTE_20_REMOTE_QPN_M
  76878. CQE_BYTE_20_REMOTE_QPN_S
  76879. CQE_BYTE_20_SL_M
  76880. CQE_BYTE_20_SL_S
  76881. CQE_BYTE_28_P_KEY_IDX_M
  76882. CQE_BYTE_28_P_KEY_IDX_S
  76883. CQE_BYTE_4_IMM_INDICATOR_S
  76884. CQE_BYTE_4_OPERATION_TYPE_M
  76885. CQE_BYTE_4_OPERATION_TYPE_S
  76886. CQE_BYTE_4_OWNER_S
  76887. CQE_BYTE_4_SQ_RQ_FLAG_S
  76888. CQE_BYTE_4_STATUS_OF_THE_OPERATION_M
  76889. CQE_BYTE_4_STATUS_OF_THE_OPERATION_S
  76890. CQE_BYTE_4_WQE_INDEX_M
  76891. CQE_BYTE_4_WQE_INDEX_S
  76892. CQE_CID_MASK
  76893. CQE_CMD
  76894. CQE_CMP_VALID
  76895. CQE_CNT_PER_PG
  76896. CQE_CODE_COMPL_WQE
  76897. CQE_CODE_MASK
  76898. CQE_CODE_NVME_ERSP
  76899. CQE_CODE_RECEIVE
  76900. CQE_CODE_RECEIVE_V1
  76901. CQE_CODE_RELEASE_WQE
  76902. CQE_CODE_XRI_ABORTED
  76903. CQE_DRAIN_COOKIE
  76904. CQE_DRAIN_G
  76905. CQE_DRAIN_M
  76906. CQE_DRAIN_S
  76907. CQE_DRAIN_V
  76908. CQE_ERROR_BITMAP_DATA_DIGEST
  76909. CQE_ERROR_BITMAP_DATA_DIGEST_ERR_MASK
  76910. CQE_ERROR_BITMAP_DATA_DIGEST_ERR_SHIFT
  76911. CQE_ERROR_BITMAP_DATA_TRUNCATED
  76912. CQE_ERROR_BITMAP_DATA_TRUNCATED_ERR_MASK
  76913. CQE_ERROR_BITMAP_DATA_TRUNCATED_ERR_SHIFT
  76914. CQE_ERROR_BITMAP_DIF_ERR_BITS_MASK
  76915. CQE_ERROR_BITMAP_DIF_ERR_BITS_SHIFT
  76916. CQE_ERROR_BITMAP_RCV_ON_INVALID_CONN
  76917. CQE_ERROR_BITMAP_RCV_ON_INVALID_CONN_MASK
  76918. CQE_ERROR_BITMAP_RCV_ON_INVALID_CONN_SHIFT
  76919. CQE_ERROR_BITMAP_RESERVED2_MASK
  76920. CQE_ERROR_BITMAP_RESERVED2_SHIFT
  76921. CQE_ERROR_BITMAP_UNDER_RUN_ERR_MASK
  76922. CQE_ERROR_BITMAP_UNDER_RUN_ERR_SHIFT
  76923. CQE_FLAGS_ASYNC_MASK
  76924. CQE_FLAGS_COMPLETED_MASK
  76925. CQE_FLAGS_CONSUMED_MASK
  76926. CQE_FLAGS_VALID_MASK
  76927. CQE_GENBIT
  76928. CQE_GENBIT_G
  76929. CQE_GENBIT_M
  76930. CQE_GENBIT_S
  76931. CQE_GENBIT_V
  76932. CQE_HW_STATUS_NO_ERR
  76933. CQE_HW_STATUS_OVERRUN
  76934. CQE_HW_STATUS_UNDERRUN
  76935. CQE_IDX
  76936. CQE_IMM_DATA
  76937. CQE_IQTYPE_G
  76938. CQE_IQTYPE_M
  76939. CQE_IQTYPE_S
  76940. CQE_L2_OK
  76941. CQE_L3_OK
  76942. CQE_L4_HDR_TYPE_NONE
  76943. CQE_L4_HDR_TYPE_TCP_ACK_AND_DATA
  76944. CQE_L4_HDR_TYPE_TCP_ACK_NO_DATA
  76945. CQE_L4_HDR_TYPE_TCP_NO_ACK
  76946. CQE_L4_HDR_TYPE_UDP
  76947. CQE_L4_OK
  76948. CQE_LEN
  76949. CQE_MAJOR_DRV
  76950. CQE_MAX_IDX_PER_PG
  76951. CQE_OOO
  76952. CQE_OPCODE
  76953. CQE_OPCODE_G
  76954. CQE_OPCODE_M
  76955. CQE_OPCODE_S
  76956. CQE_OPCODE_V
  76957. CQE_OVFBIT
  76958. CQE_OVFBIT_G
  76959. CQE_OVFBIT_M
  76960. CQE_OVFBIT_S
  76961. CQE_PG
  76962. CQE_QPID
  76963. CQE_QPID_G
  76964. CQE_QPID_M
  76965. CQE_QPID_S
  76966. CQE_QPID_V
  76967. CQE_RSS_HTYPE_IP
  76968. CQE_RSS_HTYPE_L4
  76969. CQE_RX_ERRLVL_L2
  76970. CQE_RX_ERRLVL_L3
  76971. CQE_RX_ERRLVL_L4
  76972. CQE_RX_ERRLVL_RE
  76973. CQE_RX_ERR_IP_CHK
  76974. CQE_RX_ERR_IP_HOP
  76975. CQE_RX_ERR_IP_MAL
  76976. CQE_RX_ERR_IP_MALD
  76977. CQE_RX_ERR_IP_NOT
  76978. CQE_RX_ERR_L2_FRAGMENT
  76979. CQE_RX_ERR_L2_LENMISM
  76980. CQE_RX_ERR_L2_MAL
  76981. CQE_RX_ERR_L2_OVERRUN
  76982. CQE_RX_ERR_L2_OVERSIZE
  76983. CQE_RX_ERR_L2_PCLP
  76984. CQE_RX_ERR_L2_PFCS
  76985. CQE_RX_ERR_L2_PUNY
  76986. CQE_RX_ERR_L2_UNDERSIZE
  76987. CQE_RX_ERR_L3_ICRC
  76988. CQE_RX_ERR_L3_PCLP
  76989. CQE_RX_ERR_L4_CHK
  76990. CQE_RX_ERR_L4_MAL
  76991. CQE_RX_ERR_L4_PCLP
  76992. CQE_RX_ERR_L4_PORT
  76993. CQE_RX_ERR_PREL2_ERR
  76994. CQE_RX_ERR_RBDR_TRUNC
  76995. CQE_RX_ERR_RE_FCS
  76996. CQE_RX_ERR_RE_JABBER
  76997. CQE_RX_ERR_RE_NONE
  76998. CQE_RX_ERR_RE_PARTIAL
  76999. CQE_RX_ERR_RE_RX_CTL
  77000. CQE_RX_ERR_RE_TERMINATE
  77001. CQE_RX_ERR_TCP_FLAG
  77002. CQE_RX_ERR_TCP_OFFSET
  77003. CQE_RX_ERR_UDP_LEN
  77004. CQE_RX_STATUS_INVALID_TCP_CNXT
  77005. CQE_RX_STATUS_VALID_TCP_CNXT
  77006. CQE_RX_TCP_END_FIN_FLAG_DET
  77007. CQE_RX_TCP_END_INVALID_FLAG
  77008. CQE_RX_TCP_END_OUT_OF_SEQ
  77009. CQE_RX_TCP_END_PKT_ERR
  77010. CQE_RX_TCP_END_QS_DISABLED
  77011. CQE_RX_TCP_END_TIMEOUT
  77012. CQE_SEND_CNT
  77013. CQE_SEND_OPCODE
  77014. CQE_SEND_STATUS_CRC_SEQ_ERR
  77015. CQE_SEND_STATUS_CSUM_OVERFLOW
  77016. CQE_SEND_STATUS_CSUM_OVERLAP
  77017. CQE_SEND_STATUS_DATA_FAULT
  77018. CQE_SEND_STATUS_DATA_SEQ_ERR
  77019. CQE_SEND_STATUS_DESC_FAULT
  77020. CQE_SEND_STATUS_GOOD
  77021. CQE_SEND_STATUS_HDR_CONS_ERR
  77022. CQE_SEND_STATUS_IMM_SIZE_OFLOW
  77023. CQE_SEND_STATUS_LOCK_UFLOW
  77024. CQE_SEND_STATUS_LOCK_VIOL
  77025. CQE_SEND_STATUS_MEM_FAULT
  77026. CQE_SEND_STATUS_MEM_SEQ_ERR
  77027. CQE_SEND_STATUS_SUBDESC_ERR
  77028. CQE_SEND_STATUS_TSTMP_CONFLICT
  77029. CQE_SEND_STATUS_TSTMP_TIMEOUT
  77030. CQE_STATUS
  77031. CQE_STATUS_ADDL_MASK
  77032. CQE_STATUS_ADDL_SHIFT
  77033. CQE_STATUS_CMD_REJECT
  77034. CQE_STATUS_COMPL_MASK
  77035. CQE_STATUS_COMPL_SHIFT
  77036. CQE_STATUS_DI_ERROR
  77037. CQE_STATUS_EXTD_MASK
  77038. CQE_STATUS_EXTD_SHIFT
  77039. CQE_STATUS_FABRIC_BSY
  77040. CQE_STATUS_FABRIC_RJT
  77041. CQE_STATUS_FCP_RSP_FAILURE
  77042. CQE_STATUS_FCP_TGT_LENCHECK
  77043. CQE_STATUS_G
  77044. CQE_STATUS_INTERMED_RSP
  77045. CQE_STATUS_LOCAL_REJECT
  77046. CQE_STATUS_LS_RJT
  77047. CQE_STATUS_M
  77048. CQE_STATUS_MASK
  77049. CQE_STATUS_NEED_BUFF_ENTRY
  77050. CQE_STATUS_NPORT_BSY
  77051. CQE_STATUS_NPORT_RJT
  77052. CQE_STATUS_REMOTE_STOP
  77053. CQE_STATUS_S
  77054. CQE_STATUS_SUCCESS
  77055. CQE_STATUS_V
  77056. CQE_STATUS_WRB_MASK
  77057. CQE_STATUS_WRB_SHIFT
  77058. CQE_STRIDE_128
  77059. CQE_STRIDE_128_PAD
  77060. CQE_STRIDE_64
  77061. CQE_SWCQE_G
  77062. CQE_SWCQE_M
  77063. CQE_SWCQE_S
  77064. CQE_SWCQE_V
  77065. CQE_TS
  77066. CQE_TS_G
  77067. CQE_TS_M
  77068. CQE_TYPE
  77069. CQE_TYPE_FAST
  77070. CQE_TYPE_G
  77071. CQE_TYPE_INVALID
  77072. CQE_TYPE_M
  77073. CQE_TYPE_RX
  77074. CQE_TYPE_RX_SPLIT
  77075. CQE_TYPE_RX_TCP
  77076. CQE_TYPE_S
  77077. CQE_TYPE_SEND
  77078. CQE_TYPE_SEND_PTP
  77079. CQE_TYPE_SLOW
  77080. CQE_TYPE_START
  77081. CQE_TYPE_STOP
  77082. CQE_TYPE_V
  77083. CQE_VALID_MASK
  77084. CQE_WRID_FR_STAG
  77085. CQE_WRID_HI
  77086. CQE_WRID_LOW
  77087. CQE_WRID_MSN
  77088. CQE_WRID_SQ_IDX
  77089. CQE_WRID_SQ_WPTR
  77090. CQE_WRID_STAG
  77091. CQE_WRID_WPTR
  77092. CQE_XRI_ABORTED_BR_BA_ACC
  77093. CQE_XRI_ABORTED_BR_BA_RJT
  77094. CQE_XRI_ABORTED_EO_LOCAL
  77095. CQE_XRI_ABORTED_EO_REMOTE
  77096. CQE_XRI_ABORTED_IA_LOCAL
  77097. CQE_XRI_ABORTED_IA_REMOTE
  77098. CQHCI_ACT
  77099. CQHCI_BLK_ADDR
  77100. CQHCI_BLK_COUNT
  77101. CQHCI_CAP
  77102. CQHCI_CFG
  77103. CQHCI_CLEAR_ALL_TASKS
  77104. CQHCI_CLEAR_TIMEOUT
  77105. CQHCI_CMD_INDEX
  77106. CQHCI_CMD_TIMING
  77107. CQHCI_COMPLETED
  77108. CQHCI_CONTEXT
  77109. CQHCI_CRA
  77110. CQHCI_CRDCT
  77111. CQHCI_CRI
  77112. CQHCI_CTL
  77113. CQHCI_DATA_DIR
  77114. CQHCI_DATA_TAG
  77115. CQHCI_DAT_ADDR_HI
  77116. CQHCI_DAT_ADDR_LO
  77117. CQHCI_DAT_LENGTH
  77118. CQHCI_DCMD
  77119. CQHCI_DPT
  77120. CQHCI_DQS
  77121. CQHCI_DUMP
  77122. CQHCI_ENABLE
  77123. CQHCI_END
  77124. CQHCI_EXTERNAL_TIMEOUT
  77125. CQHCI_FINISH_HALT_TIMEOUT
  77126. CQHCI_FORCED_PROG
  77127. CQHCI_HALT
  77128. CQHCI_HOST_CRC
  77129. CQHCI_HOST_OTHER
  77130. CQHCI_HOST_TIMEOUT
  77131. CQHCI_IC
  77132. CQHCI_IC_DEFAULT_ICCTH
  77133. CQHCI_IC_DEFAULT_ICTOVAL
  77134. CQHCI_IC_ENABLE
  77135. CQHCI_IC_ICCTH
  77136. CQHCI_IC_ICCTHWEN
  77137. CQHCI_IC_ICTOVAL
  77138. CQHCI_IC_ICTOVALWEN
  77139. CQHCI_IC_RESET
  77140. CQHCI_INT
  77141. CQHCI_INT_ALL
  77142. CQHCI_IS
  77143. CQHCI_ISGE
  77144. CQHCI_ISTE
  77145. CQHCI_IS_HAC
  77146. CQHCI_IS_MASK
  77147. CQHCI_IS_RED
  77148. CQHCI_IS_TCC
  77149. CQHCI_IS_TCL
  77150. CQHCI_OFF_TIMEOUT
  77151. CQHCI_PRIORITY
  77152. CQHCI_QBAR
  77153. CQHCI_QUIRK_SHORT_TXFR_DESC_SZ
  77154. CQHCI_REL_WRITE
  77155. CQHCI_RESP_TYPE
  77156. CQHCI_RMEM
  77157. CQHCI_SSC1
  77158. CQHCI_SSC1_CBC_MASK
  77159. CQHCI_SSC2
  77160. CQHCI_START_HALT_TIMEOUT
  77161. CQHCI_TASK_DESC_SZ
  77162. CQHCI_TASK_DESC_SZ_128
  77163. CQHCI_TCLR
  77164. CQHCI_TCN
  77165. CQHCI_TDBR
  77166. CQHCI_TDLBA
  77167. CQHCI_TDLBAU
  77168. CQHCI_TERRI
  77169. CQHCI_TERRI_C_INDEX
  77170. CQHCI_TERRI_C_TASK
  77171. CQHCI_TERRI_C_VALID
  77172. CQHCI_TERRI_D_INDEX
  77173. CQHCI_TERRI_D_TASK
  77174. CQHCI_TERRI_D_VALID
  77175. CQHCI_VALID
  77176. CQHCI_VER
  77177. CQHCI_VER_MAJOR
  77178. CQHCI_VER_MINOR1
  77179. CQHCI_VER_MINOR2
  77180. CQM_LIMBOCHECK_INTERVAL
  77181. CQPMP
  77182. CQP_COMPL_WAIT_TIME
  77183. CQP_CREATED
  77184. CQP_TIMEOUT_THRESHOLD
  77185. CQSPI_BASE_HWCAPS_MASK
  77186. CQSPI_DEV_PM_OPS
  77187. CQSPI_DUMMY_BYTES_MAX
  77188. CQSPI_DUMMY_CLKS_MAX
  77189. CQSPI_DUMMY_CLKS_PER_BYTE
  77190. CQSPI_INST_TYPE_DUAL
  77191. CQSPI_INST_TYPE_OCTAL
  77192. CQSPI_INST_TYPE_QUAD
  77193. CQSPI_INST_TYPE_SINGLE
  77194. CQSPI_IRQ_MASK_RD
  77195. CQSPI_IRQ_MASK_WR
  77196. CQSPI_IRQ_STATUS_MASK
  77197. CQSPI_MAX_CHIPSELECT
  77198. CQSPI_NAME
  77199. CQSPI_NEEDS_WR_DELAY
  77200. CQSPI_READ_TIMEOUT_MS
  77201. CQSPI_REG_CMDADDRESS
  77202. CQSPI_REG_CMDCTRL
  77203. CQSPI_REG_CMDCTRL_ADDR_EN_LSB
  77204. CQSPI_REG_CMDCTRL_ADD_BYTES_LSB
  77205. CQSPI_REG_CMDCTRL_ADD_BYTES_MASK
  77206. CQSPI_REG_CMDCTRL_EXECUTE_MASK
  77207. CQSPI_REG_CMDCTRL_INPROGRESS_MASK
  77208. CQSPI_REG_CMDCTRL_OPCODE_LSB
  77209. CQSPI_REG_CMDCTRL_RD_BYTES_LSB
  77210. CQSPI_REG_CMDCTRL_RD_BYTES_MASK
  77211. CQSPI_REG_CMDCTRL_RD_EN_LSB
  77212. CQSPI_REG_CMDCTRL_WR_BYTES_LSB
  77213. CQSPI_REG_CMDCTRL_WR_BYTES_MASK
  77214. CQSPI_REG_CMDCTRL_WR_EN_LSB
  77215. CQSPI_REG_CMDREADDATALOWER
  77216. CQSPI_REG_CMDREADDATAUPPER
  77217. CQSPI_REG_CMDWRITEDATALOWER
  77218. CQSPI_REG_CMDWRITEDATAUPPER
  77219. CQSPI_REG_CONFIG
  77220. CQSPI_REG_CONFIG_BAUD_LSB
  77221. CQSPI_REG_CONFIG_BAUD_MASK
  77222. CQSPI_REG_CONFIG_CHIPSELECT_LSB
  77223. CQSPI_REG_CONFIG_CHIPSELECT_MASK
  77224. CQSPI_REG_CONFIG_DECODE_MASK
  77225. CQSPI_REG_CONFIG_DMA_MASK
  77226. CQSPI_REG_CONFIG_ENABLE_MASK
  77227. CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL
  77228. CQSPI_REG_CONFIG_IDLE_LSB
  77229. CQSPI_REG_DELAY
  77230. CQSPI_REG_DELAY_TCHSH_LSB
  77231. CQSPI_REG_DELAY_TCHSH_MASK
  77232. CQSPI_REG_DELAY_TSD2D_LSB
  77233. CQSPI_REG_DELAY_TSD2D_MASK
  77234. CQSPI_REG_DELAY_TSHSL_LSB
  77235. CQSPI_REG_DELAY_TSHSL_MASK
  77236. CQSPI_REG_DELAY_TSLCH_LSB
  77237. CQSPI_REG_DELAY_TSLCH_MASK
  77238. CQSPI_REG_DMA
  77239. CQSPI_REG_DMA_BURST_LSB
  77240. CQSPI_REG_DMA_BURST_MASK
  77241. CQSPI_REG_DMA_SINGLE_LSB
  77242. CQSPI_REG_DMA_SINGLE_MASK
  77243. CQSPI_REG_INDIRECTRD
  77244. CQSPI_REG_INDIRECTRDBYTES
  77245. CQSPI_REG_INDIRECTRDSTARTADDR
  77246. CQSPI_REG_INDIRECTRDWATERMARK
  77247. CQSPI_REG_INDIRECTRD_CANCEL_MASK
  77248. CQSPI_REG_INDIRECTRD_DONE_MASK
  77249. CQSPI_REG_INDIRECTRD_START_MASK
  77250. CQSPI_REG_INDIRECTTRIGGER
  77251. CQSPI_REG_INDIRECTWR
  77252. CQSPI_REG_INDIRECTWRBYTES
  77253. CQSPI_REG_INDIRECTWRSTARTADDR
  77254. CQSPI_REG_INDIRECTWRWATERMARK
  77255. CQSPI_REG_INDIRECTWR_CANCEL_MASK
  77256. CQSPI_REG_INDIRECTWR_DONE_MASK
  77257. CQSPI_REG_INDIRECTWR_START_MASK
  77258. CQSPI_REG_IRQMASK
  77259. CQSPI_REG_IRQSTATUS
  77260. CQSPI_REG_IRQ_ILLEGAL_AHB_ERR
  77261. CQSPI_REG_IRQ_IND_COMP
  77262. CQSPI_REG_IRQ_IND_RD_REJECT
  77263. CQSPI_REG_IRQ_IND_SRAM_FULL
  77264. CQSPI_REG_IRQ_MODE_ERR
  77265. CQSPI_REG_IRQ_UNDERFLOW
  77266. CQSPI_REG_IRQ_WATERMARK
  77267. CQSPI_REG_IRQ_WR_PROTECTED_ERR
  77268. CQSPI_REG_MODE_BIT
  77269. CQSPI_REG_RD_INSTR
  77270. CQSPI_REG_RD_INSTR_DUMMY_LSB
  77271. CQSPI_REG_RD_INSTR_DUMMY_MASK
  77272. CQSPI_REG_RD_INSTR_MODE_EN_LSB
  77273. CQSPI_REG_RD_INSTR_OPCODE_LSB
  77274. CQSPI_REG_RD_INSTR_TYPE_ADDR_LSB
  77275. CQSPI_REG_RD_INSTR_TYPE_ADDR_MASK
  77276. CQSPI_REG_RD_INSTR_TYPE_DATA_LSB
  77277. CQSPI_REG_RD_INSTR_TYPE_DATA_MASK
  77278. CQSPI_REG_RD_INSTR_TYPE_INSTR_LSB
  77279. CQSPI_REG_RD_INSTR_TYPE_INSTR_MASK
  77280. CQSPI_REG_READCAPTURE
  77281. CQSPI_REG_READCAPTURE_BYPASS_LSB
  77282. CQSPI_REG_READCAPTURE_DELAY_LSB
  77283. CQSPI_REG_READCAPTURE_DELAY_MASK
  77284. CQSPI_REG_REMAP
  77285. CQSPI_REG_SDRAMLEVEL
  77286. CQSPI_REG_SDRAMLEVEL_RD_LSB
  77287. CQSPI_REG_SDRAMLEVEL_RD_MASK
  77288. CQSPI_REG_SDRAMLEVEL_WR_LSB
  77289. CQSPI_REG_SDRAMLEVEL_WR_MASK
  77290. CQSPI_REG_SIZE
  77291. CQSPI_REG_SIZE_ADDRESS_LSB
  77292. CQSPI_REG_SIZE_ADDRESS_MASK
  77293. CQSPI_REG_SIZE_BLOCK_LSB
  77294. CQSPI_REG_SIZE_BLOCK_MASK
  77295. CQSPI_REG_SIZE_PAGE_LSB
  77296. CQSPI_REG_SIZE_PAGE_MASK
  77297. CQSPI_REG_SRAMPARTITION
  77298. CQSPI_REG_WR_INSTR
  77299. CQSPI_REG_WR_INSTR_OPCODE_LSB
  77300. CQSPI_REG_WR_INSTR_TYPE_ADDR_LSB
  77301. CQSPI_REG_WR_INSTR_TYPE_DATA_LSB
  77302. CQSPI_STIG_DATA_LEN_MAX
  77303. CQSPI_TIMEOUT_MS
  77304. CQTEMM_OFFSET
  77305. CQX_EP_EVENT_PENDING
  77306. CQX_FECADDER
  77307. CQX_FEC_CQE_CNT
  77308. CQX_N1_GENERATE_COMP_EVENT
  77309. CQ_ARMED
  77310. CQ_ARM_AN
  77311. CQ_ARM_SE
  77312. CQ_ATTR_PRINT
  77313. CQ_BASE_CQE_TYPE_CUT_OFF
  77314. CQ_BASE_CQE_TYPE_MASK
  77315. CQ_BASE_CQE_TYPE_REQ
  77316. CQ_BASE_CQE_TYPE_RES_RAWETH_QP1
  77317. CQ_BASE_CQE_TYPE_RES_RC
  77318. CQ_BASE_CQE_TYPE_RES_UD
  77319. CQ_BASE_CQE_TYPE_SFT
  77320. CQ_BASE_CQE_TYPE_TERMINAL
  77321. CQ_BASE_RESERVED3_MASK
  77322. CQ_BASE_RESERVED3_SFT
  77323. CQ_BASE_TOGGLE
  77324. CQ_CONTEXT_CQC_BYTE_12_CEQN_M
  77325. CQ_CONTEXT_CQC_BYTE_12_CEQN_S
  77326. CQ_CONTEXT_CQC_BYTE_12_CQ_BT_H_M
  77327. CQ_CONTEXT_CQC_BYTE_12_CQ_BT_H_S
  77328. CQ_CONTEXT_CQC_BYTE_12_CQ_CQE_SHIFT_M
  77329. CQ_CONTEXT_CQC_BYTE_12_CQ_CQE_SHIFT_S
  77330. CQ_CONTEXT_CQC_BYTE_20_CQE_TPTR_ADDR_H_M
  77331. CQ_CONTEXT_CQC_BYTE_20_CQE_TPTR_ADDR_H_S
  77332. CQ_CONTEXT_CQC_BYTE_20_CQ_CUR_INDEX_M
  77333. CQ_CONTEXT_CQC_BYTE_20_CQ_CUR_INDEX_S
  77334. CQ_CONTEXT_CQC_BYTE_20_CUR_CQE_BA0_H_M
  77335. CQ_CONTEXT_CQC_BYTE_20_CUR_CQE_BA0_H_S
  77336. CQ_CONTEXT_CQC_BYTE_32_CE_FLAG_S
  77337. CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_M
  77338. CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_S
  77339. CQ_CONTEXT_CQC_BYTE_32_CUR_CQE_BA1_H_M
  77340. CQ_CONTEXT_CQC_BYTE_32_CUR_CQE_BA1_H_S
  77341. CQ_CONTEXT_CQC_BYTE_32_NOTIFICATION_FLAG_S
  77342. CQ_CONTEXT_CQC_BYTE_32_SE_FLAG_S
  77343. CQ_CONTEXT_CQC_BYTE_4_CQC_STATE_M
  77344. CQ_CONTEXT_CQC_BYTE_4_CQC_STATE_S
  77345. CQ_CONTEXT_CQC_BYTE_4_CQN_M
  77346. CQ_CONTEXT_CQC_BYTE_4_CQN_S
  77347. CQ_CQE_COUNT
  77348. CQ_CQNTEXT_CQC_BYTE_32_TYPE_OF_COMPLETION_NOTIFICATION_S
  77349. CQ_CREATE_FLAGS_SUPPORTED
  77350. CQ_CREDIT_UPDATE
  77351. CQ_CUTOFF_CQE_TYPE_CUT_OFF
  77352. CQ_CUTOFF_CQE_TYPE_MASK
  77353. CQ_CUTOFF_CQE_TYPE_SFT
  77354. CQ_CUTOFF_RESERVED3_MASK
  77355. CQ_CUTOFF_RESERVED3_SFT
  77356. CQ_CUTOFF_STATUS_OK
  77357. CQ_CUTOFF_TOGGLE
  77358. CQ_DB_REQ_NOT
  77359. CQ_DB_REQ_NOT_SOL
  77360. CQ_DESC_COLOR_MASK
  77361. CQ_DESC_COLOR_SHIFT
  77362. CQ_DESC_COMP_NDX_BITS
  77363. CQ_DESC_COMP_NDX_MASK
  77364. CQ_DESC_Q_NUM_BITS
  77365. CQ_DESC_Q_NUM_MASK
  77366. CQ_DESC_TYPE_BITS
  77367. CQ_DESC_TYPE_DESC_COPY
  77368. CQ_DESC_TYPE_MASK
  77369. CQ_DESC_TYPE_RQ_ENET
  77370. CQ_DESC_TYPE_RQ_FCP
  77371. CQ_DESC_TYPE_WQ_ENET
  77372. CQ_DESC_TYPE_WQ_EXCH
  77373. CQ_EMPTY
  77374. CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS
  77375. CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK
  77376. CQ_ENET_RQ_DESC_FCOE_ENC_ERROR
  77377. CQ_ENET_RQ_DESC_FCOE_EOF_BITS
  77378. CQ_ENET_RQ_DESC_FCOE_EOF_MASK
  77379. CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT
  77380. CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK
  77381. CQ_ENET_RQ_DESC_FCOE_SOF_BITS
  77382. CQ_ENET_RQ_DESC_FCOE_SOF_MASK
  77383. CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC
  77384. CQ_ENET_RQ_DESC_FLAGS_EOP
  77385. CQ_ENET_RQ_DESC_FLAGS_FCOE
  77386. CQ_ENET_RQ_DESC_FLAGS_FCS_OK
  77387. CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT
  77388. CQ_ENET_RQ_DESC_FLAGS_IPV4
  77389. CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK
  77390. CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT
  77391. CQ_ENET_RQ_DESC_FLAGS_IPV6
  77392. CQ_ENET_RQ_DESC_FLAGS_SOP
  77393. CQ_ENET_RQ_DESC_FLAGS_TCP
  77394. CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK
  77395. CQ_ENET_RQ_DESC_FLAGS_TRUNCATED
  77396. CQ_ENET_RQ_DESC_FLAGS_UDP
  77397. CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED
  77398. CQ_ENET_RQ_DESC_RSS_TYPE_BITS
  77399. CQ_ENET_RQ_DESC_RSS_TYPE_IPv4
  77400. CQ_ENET_RQ_DESC_RSS_TYPE_IPv6
  77401. CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX
  77402. CQ_ENET_RQ_DESC_RSS_TYPE_MASK
  77403. CQ_ENET_RQ_DESC_RSS_TYPE_NONE
  77404. CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4
  77405. CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6
  77406. CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX
  77407. CQ_ENET_RQ_DESC_VLAN_TCI_CFI_MASK
  77408. CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS
  77409. CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_MASK
  77410. CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_SHIFT
  77411. CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS
  77412. CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK
  77413. CQ_ENTRY_READY_MASK
  77414. CQ_ENTRY_READY_SHIFT
  77415. CQ_ENTRY_SHADOW_INDEX_MASK
  77416. CQ_ENTRY_SHADOW_INDEX_SHIFT
  77417. CQ_ENTRY_SHADOW_INDEX_VALID_MASK
  77418. CQ_ENTRY_SHADOW_INDEX_VALID_SHIFT
  77419. CQ_ERRLVL_L2
  77420. CQ_ERRLVL_L3
  77421. CQ_ERRLVL_L4
  77422. CQ_ERRLVL_MAC
  77423. CQ_ERR_MASK
  77424. CQ_EXCH_WQ_STATUS_BITS
  77425. CQ_EXCH_WQ_STATUS_MASK
  77426. CQ_EXCH_WQ_STATUS_TYPE_ABORT
  77427. CQ_EXCH_WQ_STATUS_TYPE_COMPLETE
  77428. CQ_EXCH_WQ_STATUS_TYPE_SGL_EOF
  77429. CQ_EXCH_WQ_STATUS_TYPE_TMPL_ERR
  77430. CQ_FCP_RQ_DESC_BYTES_WRITTEN_MASK
  77431. CQ_FCP_RQ_DESC_FCOE_ERR_MASK
  77432. CQ_FCP_RQ_DESC_FCOE_ERR_SHIFT
  77433. CQ_FCP_RQ_DESC_FCS_OK_MASK
  77434. CQ_FCP_RQ_DESC_FCS_OK_SHIFT
  77435. CQ_FCP_RQ_DESC_FC_CRC_OK_MASK
  77436. CQ_FCP_RQ_DESC_FLAGS_EOP
  77437. CQ_FCP_RQ_DESC_FLAGS_PRT
  77438. CQ_FCP_RQ_DESC_FLAGS_SOP
  77439. CQ_FCP_RQ_DESC_PACKET_ERR_MASK
  77440. CQ_FCP_RQ_DESC_PACKET_ERR_SHIFT
  77441. CQ_FCP_RQ_DESC_TMPL_MASK
  77442. CQ_FCP_RQ_DESC_VS_STRIPPED_MASK
  77443. CQ_FCP_RQ_DESC_VS_STRIPPED_SHIFT
  77444. CQ_FLAGS_RESIZE_IN_PROG
  77445. CQ_FORCE_AN
  77446. CQ_INCR
  77447. CQ_INT_CONVERGE_EN
  77448. CQ_LOG_PG_SZ
  77449. CQ_MASK
  77450. CQ_NUM_CQES
  77451. CQ_OK
  77452. CQ_PAGE_TBL_HI
  77453. CQ_PAGE_TBL_LO
  77454. CQ_PID
  77455. CQ_POLL_ERR
  77456. CQ_PRN
  77457. CQ_REQ_CQE_TYPE_MASK
  77458. CQ_REQ_CQE_TYPE_REQ
  77459. CQ_REQ_CQE_TYPE_SFT
  77460. CQ_REQ_RESERVED3_MASK
  77461. CQ_REQ_RESERVED3_SFT
  77462. CQ_REQ_STATUS_BAD_RESPONSE_ERR
  77463. CQ_REQ_STATUS_LOCAL_LENGTH_ERR
  77464. CQ_REQ_STATUS_LOCAL_PROTECTION_ERR
  77465. CQ_REQ_STATUS_LOCAL_QP_OPERATION_ERR
  77466. CQ_REQ_STATUS_MEMORY_MGT_OPERATION_ERR
  77467. CQ_REQ_STATUS_OK
  77468. CQ_REQ_STATUS_REMOTE_ACCESS_ERR
  77469. CQ_REQ_STATUS_REMOTE_INVALID_REQUEST_ERR
  77470. CQ_REQ_STATUS_REMOTE_OPERATION_ERR
  77471. CQ_REQ_STATUS_RNR_NAK_RETRY_CNT_ERR
  77472. CQ_REQ_STATUS_TRANSPORT_RETRY_CNT_ERR
  77473. CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR
  77474. CQ_REQ_TOGGLE
  77475. CQ_RESIZE_ALLOC
  77476. CQ_RESIZE_READY
  77477. CQ_RESIZE_SWAPPED
  77478. CQ_RESIZE_WAIT_TIME_MS
  77479. CQ_RES_RAWETH_QP1_CQE_TYPE_MASK
  77480. CQ_RES_RAWETH_QP1_CQE_TYPE_RES_RAWETH_QP1
  77481. CQ_RES_RAWETH_QP1_CQE_TYPE_SFT
  77482. CQ_RES_RAWETH_QP1_FLAGS_SRQ
  77483. CQ_RES_RAWETH_QP1_FLAGS_SRQ_LAST
  77484. CQ_RES_RAWETH_QP1_FLAGS_SRQ_RQ
  77485. CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ
  77486. CQ_RES_RAWETH_QP1_LENGTH_MASK
  77487. CQ_RES_RAWETH_QP1_LENGTH_SFT
  77488. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_CRC_ERROR
  77489. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_IP_CS_ERROR
  77490. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_L4_CS_ERROR
  77491. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_IP_TOTAL_ERROR
  77492. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN
  77493. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_L3_BAD_TTL
  77494. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_L3_BAD_VERSION
  77495. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN
  77496. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL
  77497. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
  77498. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_LAST
  77499. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_MASK
  77500. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_NO_ERROR
  77501. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_SFT
  77502. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR
  77503. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_RESERVED4_MASK
  77504. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_RESERVED4_SFT
  77505. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_IP_CS_ERROR
  77506. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_L4_CS_ERROR
  77507. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_LAST
  77508. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_MASK
  77509. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_NO_ERROR
  77510. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_SFT
  77511. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR
  77512. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR
  77513. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN
  77514. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
  77515. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION
  77516. CQ_RES_RAWETH_QP1_RAWETH_QP1_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR
  77517. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_IP_CS_CALC
  77518. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_IP_TYPE
  77519. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_L4_CS_CALC
  77520. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_LAST
  77521. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_MASK
  77522. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_NONE
  77523. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_SFT
  77524. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_VLAN
  77525. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_T_IP_CS_CALC
  77526. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_T_L4_CS_CALC
  77527. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ERROR
  77528. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_FCOE
  77529. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_ICMP
  77530. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_IP
  77531. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_LAST
  77532. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_MASK
  77533. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_NOT_KNOWN
  77534. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_PTP_WO_TIMESTAMP
  77535. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_PTP_W_TIMESTAMP
  77536. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_ROCE
  77537. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_SFT
  77538. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_TCP
  77539. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_UDP
  77540. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_MASK
  77541. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_RESERVED5_1_MASK
  77542. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_RESERVED5_1_SFT
  77543. CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_SFT
  77544. CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_DE
  77545. CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_PRI_MASK
  77546. CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_PRI_SFT
  77547. CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_TPID_MASK
  77548. CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_TPID_SFT
  77549. CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_VID_MASK
  77550. CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_VID_SFT
  77551. CQ_RES_RAWETH_QP1_RAWETH_QP1_PAYLOAD_OFFSET_MASK
  77552. CQ_RES_RAWETH_QP1_RAWETH_QP1_PAYLOAD_OFFSET_SFT
  77553. CQ_RES_RAWETH_QP1_RESERVED2_MASK
  77554. CQ_RES_RAWETH_QP1_RESERVED2_SFT
  77555. CQ_RES_RAWETH_QP1_RESERVED3_MASK
  77556. CQ_RES_RAWETH_QP1_RESERVED3_SFT
  77557. CQ_RES_RAWETH_QP1_RESERVED4_MASK
  77558. CQ_RES_RAWETH_QP1_RESERVED4_SFT
  77559. CQ_RES_RAWETH_QP1_RESERVED6_MASK
  77560. CQ_RES_RAWETH_QP1_RESERVED6_SFT
  77561. CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK
  77562. CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_SFT
  77563. CQ_RES_RAWETH_QP1_STATUS_HW_FLUSH_ERR
  77564. CQ_RES_RAWETH_QP1_STATUS_HW_LOCAL_LENGTH_ERR
  77565. CQ_RES_RAWETH_QP1_STATUS_LOCAL_ACCESS_ERROR
  77566. CQ_RES_RAWETH_QP1_STATUS_LOCAL_PROTECTION_ERR
  77567. CQ_RES_RAWETH_QP1_STATUS_LOCAL_QP_OPERATION_ERR
  77568. CQ_RES_RAWETH_QP1_STATUS_MEMORY_MGT_OPERATION_ERR
  77569. CQ_RES_RAWETH_QP1_STATUS_OK
  77570. CQ_RES_RAWETH_QP1_STATUS_WORK_REQUEST_FLUSHED_ERR
  77571. CQ_RES_RAWETH_QP1_TOGGLE
  77572. CQ_RES_RC_CQE_TYPE_MASK
  77573. CQ_RES_RC_CQE_TYPE_RES_RC
  77574. CQ_RES_RC_CQE_TYPE_SFT
  77575. CQ_RES_RC_FLAGS_IMM
  77576. CQ_RES_RC_FLAGS_INV
  77577. CQ_RES_RC_FLAGS_RDMA
  77578. CQ_RES_RC_FLAGS_RDMA_LAST
  77579. CQ_RES_RC_FLAGS_RDMA_RDMA_WRITE
  77580. CQ_RES_RC_FLAGS_RDMA_SEND
  77581. CQ_RES_RC_FLAGS_SRQ
  77582. CQ_RES_RC_FLAGS_SRQ_LAST
  77583. CQ_RES_RC_FLAGS_SRQ_RQ
  77584. CQ_RES_RC_FLAGS_SRQ_SRQ
  77585. CQ_RES_RC_RESERVED12_MASK
  77586. CQ_RES_RC_RESERVED12_SFT
  77587. CQ_RES_RC_RESERVED3_MASK
  77588. CQ_RES_RC_RESERVED3_SFT
  77589. CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK
  77590. CQ_RES_RC_SRQ_OR_RQ_WR_ID_SFT
  77591. CQ_RES_RC_STATUS_HW_FLUSH_ERR
  77592. CQ_RES_RC_STATUS_LOCAL_ACCESS_ERROR
  77593. CQ_RES_RC_STATUS_LOCAL_LENGTH_ERR
  77594. CQ_RES_RC_STATUS_LOCAL_PROTECTION_ERR
  77595. CQ_RES_RC_STATUS_LOCAL_QP_OPERATION_ERR
  77596. CQ_RES_RC_STATUS_MEMORY_MGT_OPERATION_ERR
  77597. CQ_RES_RC_STATUS_OK
  77598. CQ_RES_RC_STATUS_REMOTE_INVALID_REQUEST_ERR
  77599. CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR
  77600. CQ_RES_RC_TOGGLE
  77601. CQ_RES_UD_CFA_METADATA_DE
  77602. CQ_RES_UD_CFA_METADATA_PRI_MASK
  77603. CQ_RES_UD_CFA_METADATA_PRI_SFT
  77604. CQ_RES_UD_CFA_METADATA_VID_MASK
  77605. CQ_RES_UD_CFA_METADATA_VID_SFT
  77606. CQ_RES_UD_CQE_TYPE_MASK
  77607. CQ_RES_UD_CQE_TYPE_RES_UD
  77608. CQ_RES_UD_CQE_TYPE_SFT
  77609. CQ_RES_UD_FLAGS_EXT_META_FORMAT_MASK
  77610. CQ_RES_UD_FLAGS_EXT_META_FORMAT_SFT
  77611. CQ_RES_UD_FLAGS_IMM
  77612. CQ_RES_UD_FLAGS_META_FORMAT_CHDR_DATA
  77613. CQ_RES_UD_FLAGS_META_FORMAT_HDR_OFFSET
  77614. CQ_RES_UD_FLAGS_META_FORMAT_LAST
  77615. CQ_RES_UD_FLAGS_META_FORMAT_MASK
  77616. CQ_RES_UD_FLAGS_META_FORMAT_NONE
  77617. CQ_RES_UD_FLAGS_META_FORMAT_SFT
  77618. CQ_RES_UD_FLAGS_META_FORMAT_TUNNEL_ID
  77619. CQ_RES_UD_FLAGS_META_FORMAT_VLAN
  77620. CQ_RES_UD_FLAGS_ROCE_IP_VER_LAST
  77621. CQ_RES_UD_FLAGS_ROCE_IP_VER_MASK
  77622. CQ_RES_UD_FLAGS_ROCE_IP_VER_SFT
  77623. CQ_RES_UD_FLAGS_ROCE_IP_VER_V1
  77624. CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV4
  77625. CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV6
  77626. CQ_RES_UD_FLAGS_SRQ
  77627. CQ_RES_UD_FLAGS_SRQ_LAST
  77628. CQ_RES_UD_FLAGS_SRQ_RQ
  77629. CQ_RES_UD_FLAGS_SRQ_SRQ
  77630. CQ_RES_UD_FLAGS_UNUSED_MASK
  77631. CQ_RES_UD_FLAGS_UNUSED_SFT
  77632. CQ_RES_UD_LENGTH_MASK
  77633. CQ_RES_UD_LENGTH_SFT
  77634. CQ_RES_UD_SRC_QP_HIGH_MASK
  77635. CQ_RES_UD_SRC_QP_HIGH_SFT
  77636. CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK
  77637. CQ_RES_UD_SRQ_OR_RQ_WR_ID_SFT
  77638. CQ_RES_UD_STATUS_HW_FLUSH_ERR
  77639. CQ_RES_UD_STATUS_HW_LOCAL_LENGTH_ERR
  77640. CQ_RES_UD_STATUS_LOCAL_ACCESS_ERROR
  77641. CQ_RES_UD_STATUS_LOCAL_PROTECTION_ERR
  77642. CQ_RES_UD_STATUS_LOCAL_QP_OPERATION_ERR
  77643. CQ_RES_UD_STATUS_MEMORY_MGT_OPERATION_ERR
  77644. CQ_RES_UD_STATUS_OK
  77645. CQ_RES_UD_STATUS_WORK_REQUEST_FLUSHED_ERR
  77646. CQ_RES_UD_TOGGLE
  77647. CQ_RX_ERRLVL_E
  77648. CQ_RX_ERROP_E
  77649. CQ_RX_ERROP_IP_CSUM_ERR
  77650. CQ_RX_ERROP_IP_HOP
  77651. CQ_RX_ERROP_IP_MAL
  77652. CQ_RX_ERROP_IP_MALD
  77653. CQ_RX_ERROP_IP_NOT
  77654. CQ_RX_ERROP_L2_FRAGMENT
  77655. CQ_RX_ERROP_L2_LENMISM
  77656. CQ_RX_ERROP_L2_MAL
  77657. CQ_RX_ERROP_L2_OVERRUN
  77658. CQ_RX_ERROP_L2_OVERSIZE
  77659. CQ_RX_ERROP_L2_PCLP
  77660. CQ_RX_ERROP_L2_PFCS
  77661. CQ_RX_ERROP_L2_PUNY
  77662. CQ_RX_ERROP_L2_UNDERSIZE
  77663. CQ_RX_ERROP_L3_ICRC
  77664. CQ_RX_ERROP_L3_PCLP
  77665. CQ_RX_ERROP_L4_CHK
  77666. CQ_RX_ERROP_L4_MAL
  77667. CQ_RX_ERROP_L4_PCLP
  77668. CQ_RX_ERROP_L4_PORT
  77669. CQ_RX_ERROP_PREL2_ERR
  77670. CQ_RX_ERROP_RBDR_TRUNC
  77671. CQ_RX_ERROP_RE_FCS
  77672. CQ_RX_ERROP_RE_JABBER
  77673. CQ_RX_ERROP_RE_NONE
  77674. CQ_RX_ERROP_RE_PARTIAL
  77675. CQ_RX_ERROP_RE_RX_CTL
  77676. CQ_RX_ERROP_RE_TERMINATE
  77677. CQ_RX_ERROP_TCP_FLAG
  77678. CQ_RX_ERROP_TCP_OFFSET
  77679. CQ_RX_ERROP_UDP_LEN
  77680. CQ_SGL_ERR_ADDR_RSP_ERR
  77681. CQ_SGL_ERR_CNT_MAX_ERR
  77682. CQ_SGL_ERR_CNT_ZERO_ERR
  77683. CQ_SGL_ERR_DATA_LCL_ADDR_ERR
  77684. CQ_SGL_ERR_DATA_RSP_ERR
  77685. CQ_SGL_ERR_HOST_CQ_ERR
  77686. CQ_SGL_ERR_NO_ERROR
  77687. CQ_SGL_ERR_ORDER_ERR
  77688. CQ_SGL_ERR_OVERFLOW
  77689. CQ_SGL_ERR_SGL_LCL_ADDR_ERR
  77690. CQ_SGL_SGL_ERR_MASK
  77691. CQ_SGL_TMPL_MASK
  77692. CQ_SIZE
  77693. CQ_STATE_VALID
  77694. CQ_STOP
  77695. CQ_STOP_EN
  77696. CQ_STOP_QUEUE_MASK
  77697. CQ_STOP_TYPE_MASK
  77698. CQ_STOP_TYPE_READ
  77699. CQ_STOP_TYPE_START
  77700. CQ_STOP_TYPE_STOP
  77701. CQ_TERMINAL_CQE_TYPE_MASK
  77702. CQ_TERMINAL_CQE_TYPE_SFT
  77703. CQ_TERMINAL_CQE_TYPE_TERMINAL
  77704. CQ_TERMINAL_RESERVED3_MASK
  77705. CQ_TERMINAL_RESERVED3_SFT
  77706. CQ_TERMINAL_STATUS_OK
  77707. CQ_TERMINAL_TOGGLE
  77708. CQ_TX_ERROP_CK_OFLOW
  77709. CQ_TX_ERROP_CK_OVERLAP
  77710. CQ_TX_ERROP_DATA_FAULT
  77711. CQ_TX_ERROP_DATA_SEQUENCE_ERR
  77712. CQ_TX_ERROP_DESC_FAULT
  77713. CQ_TX_ERROP_E
  77714. CQ_TX_ERROP_ENUM_LAST
  77715. CQ_TX_ERROP_GOOD
  77716. CQ_TX_ERROP_HDR_CONS_ERR
  77717. CQ_TX_ERROP_IMM_SIZE_OFLOW
  77718. CQ_TX_ERROP_LOCK_VIOL
  77719. CQ_TX_ERROP_MAX_SIZE_VIOL
  77720. CQ_TX_ERROP_MEM_FAULT
  77721. CQ_TX_ERROP_MEM_SEQUENCE_ERR
  77722. CQ_TX_ERROP_SUBDC_ERR
  77723. CQ_TX_ERROP_TSTMP_CONFLICT
  77724. CQ_TX_ERROP_TSTMP_TIMEOUT
  77725. CQ_VLD_ENTRY
  77726. CQ_WR_DISABLE
  77727. CQ_WR_FAULT
  77728. CQ_WR_FULL
  77729. CQ_max_cqe
  77730. CQ_mbox
  77731. CQ_release_wqe
  77732. CQ_wq
  77733. CQ_xri_aborted
  77734. CR
  77735. CR0
  77736. CR00
  77737. CR01
  77738. CR02
  77739. CR03
  77740. CR04
  77741. CR05
  77742. CR06
  77743. CR07
  77744. CR08
  77745. CR09
  77746. CR0A
  77747. CR0B
  77748. CR0C
  77749. CR0D
  77750. CR0E
  77751. CR0F
  77752. CR0_ATSCHK
  77753. CR0_BHT_16BIT
  77754. CR0_BHT_8BIT
  77755. CR0_BHT_OFFSET
  77756. CR0_BOOT_EN_SET
  77757. CR0_BOOT_MAN_NS
  77758. CR0_CFS_OFFSET
  77759. CR0_CLOCK_COMPARATOR_SIGN
  77760. CR0_CLOCK_COMPARATOR_SUBMASK
  77761. CR0_CMDQEN
  77762. CR0_CPU_TIMER_SUBMASK
  77763. CR0_CSM_HALF
  77764. CR0_CSM_KEEP
  77765. CR0_CSM_OFFSET
  77766. CR0_CSM_ONE
  77767. CR0_DEFAULT
  77768. CR0_DFS_16BIT
  77769. CR0_DFS_4BIT
  77770. CR0_DFS_8BIT
  77771. CR0_DFS_OFFSET
  77772. CR0_DIAG
  77773. CR0_DISAU
  77774. CR0_DPOLL
  77775. CR0_EMERGENCY_SIGNAL_SUBMASK
  77776. CR0_EM_BIG
  77777. CR0_EM_LITTLE
  77778. CR0_EM_OFFSET
  77779. CR0_EQ
  77780. CR0_EVTQEN
  77781. CR0_EXTERNAL_CALL_SUBMASK
  77782. CR0_FBM_LSB
  77783. CR0_FBM_MSB
  77784. CR0_FBM_OFFSET
  77785. CR0_FDXRFCEN
  77786. CR0_FDXTFCEN
  77787. CR0_FORSRST
  77788. CR0_FPHYRST
  77789. CR0_FRF_MICROWIRE
  77790. CR0_FRF_OFFSET
  77791. CR0_FRF_SPI
  77792. CR0_FRF_SSP
  77793. CR0_GEOM_RESET
  77794. CR0_GINTMSK0
  77795. CR0_GINTMSK1
  77796. CR0_GSPRST
  77797. CR0_GT
  77798. CR0_GUEST_HOST_MASK
  77799. CR0_HALT_DMA
  77800. CR0_HDXFCEN
  77801. CR0_INTERRUPT_KEY_SUBMASK
  77802. CR0_INTPCTL
  77803. CR0_IRQ_SUBCLASS_MASK
  77804. CR0_LT
  77805. CR0_MASK
  77806. CR0_MEASUREMENT_ALERT_SUBMASK
  77807. CR0_MEM_CTRLER_RESET
  77808. CR0_MTM_OFFSET
  77809. CR0_NUM_CHANS_MASK
  77810. CR0_NUM_CHANS_SHIFT
  77811. CR0_NUM_EVENTS_MASK
  77812. CR0_NUM_EVENTS_SHIFT
  77813. CR0_NUM_PERIPH_MASK
  77814. CR0_NUM_PERIPH_SHIFT
  77815. CR0_OPM_MASTER
  77816. CR0_OPM_OFFSET
  77817. CR0_OPM_SLAVE
  77818. CR0_PERIPH_REQ_SET
  77819. CR0_PRIQEN
  77820. CR0_RASTER_RESET
  77821. CR0_READ_SHADOW
  77822. CR0_RESERVED_BITS
  77823. CR0_RSD_MAX
  77824. CR0_RSD_OFFSET
  77825. CR0_RXON
  77826. CR0_SCPH_OFFSET
  77827. CR0_SCPOL_OFFSET
  77828. CR0_SERVICE_SIGNAL_SUBMASK
  77829. CR0_SFRST
  77830. CR0_SHIFT
  77831. CR0_SMMUEN
  77832. CR0_SSD_HALF
  77833. CR0_SSD_OFFSET
  77834. CR0_SSD_ONE
  77835. CR0_STATE
  77836. CR0_STOP
  77837. CR0_STRT
  77838. CR0_TBEGIN_FAILURE
  77839. CR0_TM0EN
  77840. CR0_TM1EN
  77841. CR0_TXON
  77842. CR0_UNUSED_56
  77843. CR0_XFM_MASK
  77844. CR0_XFM_OFFSET
  77845. CR0_XFM_RO
  77846. CR0_XFM_TO
  77847. CR0_XFM_TR
  77848. CR0_XHITH0
  77849. CR0_XHITH1
  77850. CR0_XLTH0
  77851. CR0_XLTH1
  77852. CR0_XONEN
  77853. CR1
  77854. CR10
  77855. CR11
  77856. CR12
  77857. CR13
  77858. CR14
  77859. CR14_CHANNEL_REPORT_SUBMASK
  77860. CR14_DEGRADATION_SUBMASK
  77861. CR14_EXTERNAL_DAMAGE_SUBMASK
  77862. CR14_RECOVERY_SUBMASK
  77863. CR14_UNUSED_32
  77864. CR14_UNUSED_33
  77865. CR14_WARNING_SUBMASK
  77866. CR15
  77867. CR15_DEFAULT
  77868. CR16
  77869. CR17
  77870. CR18
  77871. CR1_CACHE_NC
  77872. CR1_CACHE_WB
  77873. CR1_CACHE_WT
  77874. CR1_DISAU
  77875. CR1_DPOLL
  77876. CR1_ICACHE_LEN_MASK
  77877. CR1_ICACHE_LEN_SHIFT
  77878. CR1_NUM_ICACHELINES_MASK
  77879. CR1_NUM_ICACHELINES_SHIFT
  77880. CR1_QUEUE_IC
  77881. CR1_QUEUE_OC
  77882. CR1_QUEUE_SH
  77883. CR1_SFRST
  77884. CR1_TABLE_IC
  77885. CR1_TABLE_OC
  77886. CR1_TABLE_SH
  77887. CR1_TM0EN
  77888. CR1_TM1EN
  77889. CR2
  77890. CR22_LEVEL_SHIFT
  77891. CR22_SET_SHIFT
  77892. CR22_WAY_SHIFT
  77893. CR22_WAY_SHIFT_L2
  77894. CR2_E2H
  77895. CR2_FDXRFCEN
  77896. CR2_FDXTFCEN
  77897. CR2_GUARDED_STORAGE
  77898. CR2_HDXFCEN
  77899. CR2_PTM
  77900. CR2_RECINVSID
  77901. CR2_XHITH0
  77902. CR2_XHITH1
  77903. CR2_XLTH0
  77904. CR2_XLTH1
  77905. CR2_XONEN
  77906. CR3
  77907. CR30
  77908. CR31
  77909. CR32
  77910. CR33
  77911. CR34
  77912. CR35
  77913. CR36
  77914. CR37
  77915. CR38
  77916. CR39
  77917. CR3A
  77918. CR3B
  77919. CR3C
  77920. CR3D
  77921. CR3E
  77922. CR3F
  77923. CR3_ADDR_MASK
  77924. CR3_AVAIL_PCID_BITS
  77925. CR3_DIAG
  77926. CR3_FORSRST
  77927. CR3_FPHYRST
  77928. CR3_GINTMSK0
  77929. CR3_GINTMSK1
  77930. CR3_GSPRST
  77931. CR3_HW_ASID_BITS
  77932. CR3_INTPCTL
  77933. CR3_NOFLUSH
  77934. CR3_PCID_MASK
  77935. CR3_TARGET_COUNT
  77936. CR3_TARGET_VALUE0
  77937. CR3_TARGET_VALUE1
  77938. CR3_TARGET_VALUE2
  77939. CR3_TARGET_VALUE3
  77940. CR4
  77941. CR40
  77942. CR40_OFFSET
  77943. CR41
  77944. CR42
  77945. CR43
  77946. CR44
  77947. CR45
  77948. CR46
  77949. CR47
  77950. CR48
  77951. CR49
  77952. CR49_OFFSET
  77953. CR4A
  77954. CR4B
  77955. CR4C
  77956. CR4D
  77957. CR4E
  77958. CR4F
  77959. CR4_GUEST_HOST_MASK
  77960. CR4_READ_SHADOW
  77961. CR4_REGION_NUM
  77962. CR4_RESERVED_BITS
  77963. CR50
  77964. CR51
  77965. CR52
  77966. CR53
  77967. CR54
  77968. CR55
  77969. CR56
  77970. CR57
  77971. CR58
  77972. CR59
  77973. CR5A
  77974. CR5B
  77975. CR5C
  77976. CR5D
  77977. CR5E
  77978. CR5F
  77979. CR60
  77980. CR61
  77981. CR62
  77982. CR63
  77983. CR64
  77984. CR65
  77985. CR66
  77986. CR67
  77987. CR68
  77988. CR69
  77989. CR6A
  77990. CR6B
  77991. CR6C
  77992. CR6D
  77993. CR6E
  77994. CR6F
  77995. CR6_DEFAULT
  77996. CR6_FDM
  77997. CR6_NO_PURGE
  77998. CR6_PAM
  77999. CR6_PBF
  78000. CR6_PM
  78001. CR6_RXA
  78002. CR6_RXSC
  78003. CR6_SFT
  78004. CR6_STI
  78005. CR6_TXSC
  78006. CR70
  78007. CR71
  78008. CR72
  78009. CR73
  78010. CR74
  78011. CR75
  78012. CR76
  78013. CR77
  78014. CR78
  78015. CR79
  78016. CR7A
  78017. CR7B
  78018. CR7C
  78019. CR7D
  78020. CR7E
  78021. CR7F
  78022. CR7_DEFAULT
  78023. CR80
  78024. CR81
  78025. CR82
  78026. CR83
  78027. CR84
  78028. CR85
  78029. CR86
  78030. CR87
  78031. CR88
  78032. CR89
  78033. CR8A
  78034. CR8B
  78035. CR8C
  78036. CR8D
  78037. CR8E
  78038. CR8F
  78039. CR8_RESERVED_BITS
  78040. CR90
  78041. CR91
  78042. CR92
  78043. CR93
  78044. CR9346
  78045. CR94
  78046. CR95
  78047. CR96
  78048. CR97
  78049. CR98
  78050. CR99
  78051. CR9A
  78052. CR9B
  78053. CR9C
  78054. CR9D
  78055. CR9E
  78056. CR9F
  78057. CR9_CRDOUT
  78058. CR9_SRCLK
  78059. CR9_SRCS
  78060. CR9_SROM_READ
  78061. CRA
  78062. CRA0
  78063. CRA1
  78064. CRA2
  78065. CRA3
  78066. CRAMFS_BLK_DIRECT_PTR_SHIFT
  78067. CRAMFS_BLK_FLAGS
  78068. CRAMFS_BLK_FLAG_DIRECT_PTR
  78069. CRAMFS_BLK_FLAG_UNCOMPRESSED
  78070. CRAMFS_FLAG_EXT_BLOCK_POINTERS
  78071. CRAMFS_FLAG_FSID_VERSION_2
  78072. CRAMFS_FLAG_HOLES
  78073. CRAMFS_FLAG_SHIFTED_ROOT_OFFSET
  78074. CRAMFS_FLAG_SORTED_DIRS
  78075. CRAMFS_FLAG_WRONG_SIGNATURE
  78076. CRAMFS_GID_WIDTH
  78077. CRAMFS_MAGIC
  78078. CRAMFS_MAGIC_WEND
  78079. CRAMFS_MAXPATHLEN
  78080. CRAMFS_MODE_WIDTH
  78081. CRAMFS_NAMELEN_WIDTH
  78082. CRAMFS_OFFSET_WIDTH
  78083. CRAMFS_SB
  78084. CRAMFS_SIGNATURE
  78085. CRAMFS_SIZE_WIDTH
  78086. CRAMFS_SUPPORTED_FLAGS
  78087. CRAMFS_UID_WIDTH
  78088. CRASHDUMP_FINI
  78089. CRASHDUMP_READ
  78090. CRASHDUMP_WRITE
  78091. CRASHED_PRIMARY
  78092. CRASHPOINT
  78093. CRASHPOINT_KPROBE
  78094. CRASHPOINT_WRITE
  78095. CRASHTYPE
  78096. CRASH_ADDR_HIGH_MAX
  78097. CRASH_ADDR_LOW_MAX
  78098. CRASH_ALIGN
  78099. CRASH_BUFFER_SIZE
  78100. CRASH_BUS
  78101. CRASH_CORE_NOTE_BYTES
  78102. CRASH_CORE_NOTE_DESC_BYTES
  78103. CRASH_CORE_NOTE_HEAD_BYTES
  78104. CRASH_CORE_NOTE_NAME
  78105. CRASH_CORE_NOTE_NAME_BYTES
  78106. CRASH_DEV
  78107. CRASH_DMA_BUF_SIZE
  78108. CRASH_HANDLER_MAX
  78109. CRASH_NUM_SPUS
  78110. CRAT_CACHE_FLAGS_CPU_CACHE
  78111. CRAT_CACHE_FLAGS_DATA_CACHE
  78112. CRAT_CACHE_FLAGS_ENABLED
  78113. CRAT_CACHE_FLAGS_INST_CACHE
  78114. CRAT_CACHE_FLAGS_RESERVED
  78115. CRAT_CACHE_FLAGS_SIMD_CACHE
  78116. CRAT_CACHE_RESERVED_LENGTH
  78117. CRAT_CCOMPUTE_FLAGS_ENABLED
  78118. CRAT_CCOMPUTE_FLAGS_RESERVED
  78119. CRAT_CCOMPUTE_RESERVED_LENGTH
  78120. CRAT_COMPUTEUNIT_RESERVED_LENGTH
  78121. CRAT_CU_FLAGS_CPU_PRESENT
  78122. CRAT_CU_FLAGS_ENABLED
  78123. CRAT_CU_FLAGS_GPU_PRESENT
  78124. CRAT_CU_FLAGS_HOT_PLUGGABLE
  78125. CRAT_CU_FLAGS_IOMMU_PRESENT
  78126. CRAT_CU_FLAGS_RESERVED
  78127. CRAT_IOLINK_FLAGS_BI_DIRECTIONAL
  78128. CRAT_IOLINK_FLAGS_ENABLED
  78129. CRAT_IOLINK_FLAGS_NON_COHERENT
  78130. CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT
  78131. CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT
  78132. CRAT_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA
  78133. CRAT_IOLINK_FLAGS_RESERVED_MASK
  78134. CRAT_IOLINK_RESERVED_LENGTH
  78135. CRAT_IOLINK_TYPE_AMBA
  78136. CRAT_IOLINK_TYPE_ETHERNET_RDMA
  78137. CRAT_IOLINK_TYPE_GZ
  78138. CRAT_IOLINK_TYPE_HYPERTRANSPORT
  78139. CRAT_IOLINK_TYPE_INFINIBAND
  78140. CRAT_IOLINK_TYPE_MAX
  78141. CRAT_IOLINK_TYPE_MIPI
  78142. CRAT_IOLINK_TYPE_OTHER
  78143. CRAT_IOLINK_TYPE_PCIEXPRESS
  78144. CRAT_IOLINK_TYPE_QPI_1_1
  78145. CRAT_IOLINK_TYPE_RAPID_IO
  78146. CRAT_IOLINK_TYPE_RDMA_OTHER
  78147. CRAT_IOLINK_TYPE_RESERVED1
  78148. CRAT_IOLINK_TYPE_RESERVED2
  78149. CRAT_IOLINK_TYPE_RESERVED3
  78150. CRAT_IOLINK_TYPE_UNDEFINED
  78151. CRAT_IOLINK_TYPE_XGMI
  78152. CRAT_IOLINK_TYPE_XGOP
  78153. CRAT_MEMORY_RESERVED_LENGTH
  78154. CRAT_MEM_FLAGS_ENABLED
  78155. CRAT_MEM_FLAGS_HOT_PLUGGABLE
  78156. CRAT_MEM_FLAGS_NON_VOLATILE
  78157. CRAT_MEM_FLAGS_RESERVED
  78158. CRAT_OEMID_64BIT_MASK
  78159. CRAT_OEMID_LENGTH
  78160. CRAT_OEMTABLEID_LENGTH
  78161. CRAT_RESERVED_LENGTH
  78162. CRAT_SIBLINGMAP_SIZE
  78163. CRAT_SIGNATURE
  78164. CRAT_SUBTYPE_CACHE_AFFINITY
  78165. CRAT_SUBTYPE_CCOMPUTE_AFFINITY
  78166. CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY
  78167. CRAT_SUBTYPE_FLAGS_ENABLED
  78168. CRAT_SUBTYPE_IOLINK_AFFINITY
  78169. CRAT_SUBTYPE_MAX
  78170. CRAT_SUBTYPE_MEMORY_AFFINITY
  78171. CRAT_SUBTYPE_TLB_AFFINITY
  78172. CRAT_TLB_FLAGS_CPU_TLB
  78173. CRAT_TLB_FLAGS_DATA_TLB
  78174. CRAT_TLB_FLAGS_ENABLED
  78175. CRAT_TLB_FLAGS_INST_TLB
  78176. CRAT_TLB_FLAGS_RESERVED
  78177. CRAT_TLB_FLAGS_SIMD_TLB
  78178. CRAT_TLB_RESERVED_LENGTH
  78179. CRB
  78180. CRB_ACPI_START_INDEX
  78181. CRB_ACPI_START_REVISION_ID
  78182. CRB_ALIGN
  78183. CRB_BLK
  78184. CRB_CANCEL_INVOKE
  78185. CRB_CMDPEG_CHECK_DELAY
  78186. CRB_CMDPEG_CHECK_RETRY_COUNT
  78187. CRB_CMDPEG_STATE
  78188. CRB_CMD_CONSUMER_OFFSET
  78189. CRB_CMD_CONSUMER_OFFSET_1
  78190. CRB_CMD_CONSUMER_OFFSET_2
  78191. CRB_CMD_CONSUMER_OFFSET_3
  78192. CRB_CMD_PRODUCER_OFFSET
  78193. CRB_CMD_PRODUCER_OFFSET_1
  78194. CRB_CMD_PRODUCER_OFFSET_2
  78195. CRB_CMD_PRODUCER_OFFSET_3
  78196. CRB_CSB_ADDRESS
  78197. CRB_CSB_AT
  78198. CRB_CSB_C
  78199. CRB_CSB_M
  78200. CRB_CTRL_REQ_CMD_READY
  78201. CRB_CTRL_REQ_GO_IDLE
  78202. CRB_CTRL_STS_ERROR
  78203. CRB_CTRL_STS_TPM_IDLE
  78204. CRB_CTX_ADDR_REG_HI
  78205. CRB_CTX_ADDR_REG_LO
  78206. CRB_CTX_SIGNATURE_REG
  78207. CRB_DMA_SHIFT
  78208. CRB_DRIVER_VERSION
  78209. CRB_DRV_STS_COMPLETE
  78210. CRB_FW_CAPABILITIES_1
  78211. CRB_FW_CAPABILITIES_2
  78212. CRB_HI
  78213. CRB_HOST_DUMMY_BUF_ADDR_HI
  78214. CRB_HOST_DUMMY_BUF_ADDR_LO
  78215. CRB_INDIRECT_2M
  78216. CRB_INT_VECTOR
  78217. CRB_LOC_CTRL_RELINQUISH
  78218. CRB_LOC_CTRL_REQUEST_ACCESS
  78219. CRB_LOC_STATE_LOC_ASSIGNED
  78220. CRB_LOC_STATE_TPM_REG_VALID_STS
  78221. CRB_MAC_BLOCK_START
  78222. CRB_MPORT_MODE
  78223. CRB_NIC_CAPABILITIES_HOST
  78224. CRB_NIC_MSI_MODE_HOST
  78225. CRB_NIU_XG_PAUSE_CTL_P0
  78226. CRB_NIU_XG_PAUSE_CTL_P1
  78227. CRB_PF_LINK_SPEED_1
  78228. CRB_PF_LINK_SPEED_2
  78229. CRB_RCVPEG_STATE
  78230. CRB_REG_EX_PC
  78231. CRB_REG_INDEX_MAX
  78232. CRB_SCRATCHPAD_TEST
  78233. CRB_SIZE
  78234. CRB_START_INVOKE
  78235. CRB_SUBBLK
  78236. CRB_SW_INT_MASK_0
  78237. CRB_SW_INT_MASK_1
  78238. CRB_SW_INT_MASK_2
  78239. CRB_SW_INT_MASK_3
  78240. CRB_TEMP_STATE
  78241. CRB_V2P
  78242. CRB_V2P_0
  78243. CRB_WINDOW_2M
  78244. CRB_WIN_LOCK_TIMEOUT
  78245. CRB_XG_STATE
  78246. CRB_XG_STATE_P3
  78247. CRB_XG_STATE_P3P
  78248. CRC
  78249. CRC0
  78250. CRC1
  78251. CRC10_FCS
  78252. CRC10_GOODFCS
  78253. CRC10_INITFCS
  78254. CRC16_GOOD_VALUE
  78255. CRC16_INIT
  78256. CRC16_INIT_VALUE
  78257. CRC16_POLYNOMIAL
  78258. CRC16_VALID
  78259. CRC1_R
  78260. CRC2
  78261. CRC2_R
  78262. CRC2_SIG
  78263. CRC32
  78264. CRC32C
  78265. CRC32C_PCL_BREAKEVEN
  78266. CRC32C_POLY_LE
  78267. CRC32_BLOCK_SIZE
  78268. CRC32_DIGEST_SIZE
  78269. CRC32_INITIAL
  78270. CRC32_POLY
  78271. CRC32_POLYNOMIAL
  78272. CRC32_POLY_BE
  78273. CRC32_POLY_LE
  78274. CRC32_REMAINDER
  78275. CRC32_RESIDUAL
  78276. CRC32_VX_DIGEST
  78277. CRC32_VX_FINUP
  78278. CRC32_VX_UPDATE
  78279. CRC64_ECMA182_POLY
  78280. CRC8_GOOD_VALUE
  78281. CRC8_INIT_VALUE
  78282. CRC8_TABLE_SIZE
  78283. CRCBAD
  78284. CRCCBCR
  78285. CRCCNT
  78286. CRCCTRL
  78287. CRCCTRL_CRCCLKEN
  78288. CRCCTRL_CRCEN
  78289. CRCCTRL_CRCSTART_F
  78290. CRCCTRL_MASK
  78291. CRCDisable
  78292. CRCE
  78293. CRCEEN
  78294. CRCEN
  78295. CRCERR
  78296. CRCER_CNT_MASK
  78297. CRCER_CNT_SHIFT_BIT
  78298. CRCEnable
  78299. CRCErr
  78300. CRCLENGTH
  78301. CRCMASK
  78302. CRCOK
  78303. CRCPS
  78304. CRCS_CHIP
  78305. CRCS_CORE
  78306. CRCS_EXTCR
  78307. CRCS_PLOCK
  78308. CRCS_STAT_CHIP_RST_B
  78309. CRCS_STAT_CRCS_CHIP
  78310. CRCS_STAT_CRCS_CORE
  78311. CRCS_STAT_CRCS_SYS
  78312. CRCS_STAT_DBCR_CHIP
  78313. CRCS_STAT_DBCR_CORE
  78314. CRCS_STAT_DBCR_SYS
  78315. CRCS_STAT_HOST_CHIP
  78316. CRCS_STAT_HOST_CORE
  78317. CRCS_STAT_HOST_SYS
  78318. CRCS_STAT_MASK
  78319. CRCS_STAT_PCIE
  78320. CRCS_STAT_PCIE_HOT
  78321. CRCS_STAT_PHR
  78322. CRCS_STAT_POR
  78323. CRCS_STAT_PSI_CHIP
  78324. CRCS_STAT_SELF_CHIP
  78325. CRCS_STAT_SELF_CORE
  78326. CRCS_SYS
  78327. CRCS_WATCHE
  78328. CRCS_WRCR
  78329. CRC_16BIT_MASK
  78330. CRC_16BIT_PRES
  78331. CRC_1STEP
  78332. CRC_APD
  78333. CRC_APPEND
  78334. CRC_AUTOSUSPEND_DELAY
  78335. CRC_A_INIT
  78336. CRC_BE_BITS
  78337. CRC_BIT
  78338. CRC_BITS
  78339. CRC_BUFF_SIZE
  78340. CRC_B_INIT
  78341. CRC_CCIT_MASK
  78342. CRC_CHECKER_DIS
  78343. CRC_CK
  78344. CRC_CONTEXT_FCPCMND_OFF
  78345. CRC_CONTEXT_LEN_FW
  78346. CRC_CR
  78347. CRC_CR_RESET
  78348. CRC_CR_REVERSE
  78349. CRC_CUR_0
  78350. CRC_CUR_1
  78351. CRC_CUR_BITS_0
  78352. CRC_CUR_BITS_1
  78353. CRC_CUR_BITS_SEL
  78354. CRC_CUR_SEL
  78355. CRC_DIS
  78356. CRC_DR
  78357. CRC_EN
  78358. CRC_ERR
  78359. CRC_ERR_DET
  78360. CRC_ERR_MAC_STS
  78361. CRC_FIX_CLK
  78362. CRC_FUNCTION_NAME
  78363. CRC_FUNC_EN_N
  78364. CRC_F_INIT
  78365. CRC_I2S_CONT_REPEAT_NUM__I2S0_CRC_CONT_REPEAT_NUM_MASK
  78366. CRC_I2S_CONT_REPEAT_NUM__I2S0_CRC_CONT_REPEAT_NUM__SHIFT
  78367. CRC_I2S_CONT_REPEAT_NUM__I2S1_CRC_CONT_REPEAT_NUM_MASK
  78368. CRC_I2S_CONT_REPEAT_NUM__I2S1_CRC_CONT_REPEAT_NUM__SHIFT
  78369. CRC_INIT
  78370. CRC_INIT_DEFAULT
  78371. CRC_INTERLACE_0
  78372. CRC_INTERLACE_1
  78373. CRC_INTERLACE_2
  78374. CRC_INTERLACE_3
  78375. CRC_INTERLACE_SEL
  78376. CRC_IN_CUR_0
  78377. CRC_IN_CUR_1
  78378. CRC_IN_CUR_SEL
  78379. CRC_IN_PIX_0
  78380. CRC_IN_PIX_1
  78381. CRC_IN_PIX_2
  78382. CRC_IN_PIX_3
  78383. CRC_IN_PIX_4
  78384. CRC_IN_PIX_5
  78385. CRC_IN_PIX_6
  78386. CRC_IN_PIX_7
  78387. CRC_IN_PIX_SEL
  78388. CRC_ITU_T_H
  78389. CRC_LEN
  78390. CRC_LENGTH
  78391. CRC_LE_BITS
  78392. CRC_MARK
  78393. CRC_MODE_FLEX
  78394. CRC_MODE_FLEX_TEST
  78395. CRC_MODE_NONE
  78396. CRC_MODE_SMACK
  78397. CRC_MODE_SMACK_TEST
  78398. CRC_ON
  78399. CRC_ON_PAGE_COMMAND
  78400. CRC_PMIC_PWM_PERIOD_NS
  78401. CRC_POL
  78402. CRC_REPORT
  78403. CRC_REPORT_SIZE
  78404. CRC_RX_EN
  78405. CRC_SIG
  78406. CRC_SIMD_ID_WADDR_DISABLE
  78407. CRC_SIZE
  78408. CRC_SIZES_MASK
  78409. CRC_SIZES_SHIFT
  78410. CRC_SPDIF_CONT_REPEAT_NUM__SPDIF0_CRC_CONT_REPEAT_NUM_MASK
  78411. CRC_SPDIF_CONT_REPEAT_NUM__SPDIF0_CRC_CONT_REPEAT_NUM__SHIFT
  78412. CRC_SPDIF_CONT_REPEAT_NUM__SPDIF1_CRC_CONT_REPEAT_NUM_MASK
  78413. CRC_SPDIF_CONT_REPEAT_NUM__SPDIF1_CRC_CONT_REPEAT_NUM__SHIFT
  78414. CRC_SRC_0
  78415. CRC_SRC_1
  78416. CRC_SRC_2
  78417. CRC_SRC_3
  78418. CRC_SRC_SEL
  78419. CRC_STEREO_0
  78420. CRC_STEREO_1
  78421. CRC_STEREO_2
  78422. CRC_STEREO_3
  78423. CRC_STEREO_SEL
  78424. CRC_T10DIF_BLOCK_SIZE
  78425. CRC_T10DIF_DIGEST_SIZE
  78426. CRC_T10DIF_PMULL_CHUNK_SIZE
  78427. CRC_T10DIF_STRING
  78428. CRC_VALUE
  78429. CRC_VAR_CLK0
  78430. CRC_VAR_CLK1
  78431. CRC_ZERO
  78432. CRCbit
  78433. CRD
  78434. CRD2
  78435. CRD3
  78436. CRD32
  78437. CRD4
  78438. CRDLY
  78439. CRDTE_DTT_PAGE
  78440. CRDTE_DTT_REGION1
  78441. CRDTE_DTT_REGION2
  78442. CRDTE_DTT_REGION3
  78443. CRDTE_DTT_SEGMENT
  78444. CRD_DATA_BUFF_MASK
  78445. CRD_DATA_BUFF_SHIFT
  78446. CRD_DATA_WIDTH_MASK
  78447. CRD_DATA_WIDTH_SHIFT
  78448. CRD_NAME
  78449. CRD_OP
  78450. CRD_RD_CAP_MASK
  78451. CRD_RD_CAP_SHIFT
  78452. CRD_RD_Q_DEP_MASK
  78453. CRD_RD_Q_DEP_SHIFT
  78454. CRD_WR_CAP_MASK
  78455. CRD_WR_CAP_SHIFT
  78456. CRD_WR_Q_DEP_MASK
  78457. CRD_WR_Q_DEP_SHIFT
  78458. CRE
  78459. CREAD
  78460. CREADY
  78461. CREATE
  78462. CREATED
  78463. CREATE_AH
  78464. CREATE_ASYNC_ALERT
  78465. CREATE_BARRIER
  78466. CREATE_COMPLETE_IF_OPLK
  78467. CREATE_COOLDOWN
  78468. CREATE_CQ
  78469. CREATE_DELETE_ON_CLOSE
  78470. CREATE_DIRECTORY_REQ
  78471. CREATE_DIRECTORY_RSP
  78472. CREATE_EIGHT_DOT_THREE
  78473. CREATE_HARD_LINK
  78474. CREATE_INT_TYPE
  78475. CREATE_MASK
  78476. CREATE_MASK_ULL
  78477. CREATE_NOT_DIR
  78478. CREATE_NOT_FILE
  78479. CREATE_NO_BUFFER
  78480. CREATE_NO_COMPRESSION
  78481. CREATE_NO_EA_KNOWLEDGE
  78482. CREATE_OPEN_BACKUP_INTENT
  78483. CREATE_OPEN_BY_ID
  78484. CREATE_OPEN_FOR_RECOVERY
  78485. CREATE_OPTIONS_MASK
  78486. CREATE_OPTION_READONLY
  78487. CREATE_OPTION_SPECIAL
  78488. CREATE_PATH
  78489. CREATE_QP
  78490. CREATE_RANDOM_ACCESS
  78491. CREATE_RESERVE_OPFILTER
  78492. CREATE_SEQUENTIAL
  78493. CREATE_SRQ
  78494. CREATE_SYNC_ALERT
  78495. CREATE_TRACE_POINTS
  78496. CREATE_TREE_CONNECTION
  78497. CREATE_WRITE_THROUGH
  78498. CREDITS_MAX
  78499. CREDITS_PER_JIFFY
  78500. CREDITS_PER_JIFFY_BYTES
  78501. CREDITS_PER_JIFFY_v1
  78502. CREDITS_THR
  78503. CREDIT_INFO_DISPLAY_STRING_LEN
  78504. CREDIT_INFO_LEN
  78505. CREDIT_PER_NS
  78506. CREDIT_RETURN_STATE
  78507. CREDIT_TO
  78508. CREDS_OPTION
  78509. CREDS_VALUE
  78510. CREDUID_KEY_LEN
  78511. CRED_MAGIC
  78512. CRED_MAGIC_DEAD
  78513. CREG
  78514. CREG_ADD
  78515. CREG_ADD_CAPABILITIES
  78516. CREG_ADD_CARD_CMD
  78517. CREG_ADD_CARD_SIZE
  78518. CREG_ADD_CARD_STATE
  78519. CREG_ADD_CONFIG
  78520. CREG_ADD_CRAM
  78521. CREG_ADD_LOG
  78522. CREG_ADD_NUM_TARGETS
  78523. CREG_AXI_M_HS_CORE_BOOT
  78524. CREG_AXI_M_OFT0
  78525. CREG_AXI_M_OFT1
  78526. CREG_AXI_M_SLV0
  78527. CREG_AXI_M_SLV1
  78528. CREG_AXI_M_UPDT
  78529. CREG_BASE
  78530. CREG_BMASK
  78531. CREG_CCNT
  78532. CREG_CLK
  78533. CREG_CLK_1KHZ
  78534. CREG_CLK_32KHZ
  78535. CREG_CLK_MAX
  78536. CREG_CMD
  78537. CREG_CMD_TAG_MASK
  78538. CREG_CNT
  78539. CREG_CORE_IF_CLK_DIV_1
  78540. CREG_CORE_IF_CLK_DIV_2
  78541. CREG_CPU_ADDR_770
  78542. CREG_CPU_ADDR_770_UPD
  78543. CREG_CPU_ADDR_TUNN
  78544. CREG_CPU_ADDR_TUNN_UPD
  78545. CREG_CPU_ARC770_IRQ_MUX
  78546. CREG_CPU_AXI_M0_IRQ_MUX
  78547. CREG_CPU_GPIO_UART_MUX
  78548. CREG_CPU_TUN_IO_CTRL
  78549. CREG_CTRL
  78550. CREG_CTRL_RESET
  78551. CREG_CTRL_RXOFF
  78552. CREG_CTRL_TWAKEUP
  78553. CREG_DATA
  78554. CREG_DATA0
  78555. CREG_DATA1
  78556. CREG_DATA2
  78557. CREG_DATA3
  78558. CREG_DATA4
  78559. CREG_DATA5
  78560. CREG_DATA6
  78561. CREG_DATA7
  78562. CREG_DEVIDX
  78563. CREG_FLASH_LOCK
  78564. CREG_FLASH_UNLOCK
  78565. CREG_IDX
  78566. CREG_MB_CONFIG
  78567. CREG_MB_IRQ_MUX
  78568. CREG_MB_SW_RESET
  78569. CREG_MB_VER
  78570. CREG_MMASK
  78571. CREG_MMASK_BABBLE
  78572. CREG_MMASK_CLOSS
  78573. CREG_MMASK_EDEFER
  78574. CREG_MMASK_ERETRY
  78575. CREG_MMASK_JABBER
  78576. CREG_MMASK_LCOLL
  78577. CREG_MMASK_MPKT
  78578. CREG_MMASK_OFLOW
  78579. CREG_MMASK_RPKT
  78580. CREG_MMASK_RXCOLL
  78581. CREG_MMASK_UFLOW
  78582. CREG_OP_READ
  78583. CREG_OP_WRITE
  78584. CREG_PAE
  78585. CREG_PAE_UPDT
  78586. CREG_PIPG
  78587. CREG_PIPG_MMODE
  78588. CREG_PIPG_TENAB
  78589. CREG_PIPG_WMASK
  78590. CREG_QMASK
  78591. CREG_QMASK_COFLOW
  78592. CREG_QMASK_RXBERROR
  78593. CREG_QMASK_RXDROP
  78594. CREG_QMASK_RXLEERR
  78595. CREG_QMASK_RXPERR
  78596. CREG_QMASK_RXSERR
  78597. CREG_QMASK_TXDERROR
  78598. CREG_QMASK_TXLERR
  78599. CREG_QMASK_TXPERR
  78600. CREG_QMASK_TXSERR
  78601. CREG_REG_SIZE
  78602. CREG_RIMASK
  78603. CREG_RXDS
  78604. CREG_RXRBUFPTR
  78605. CREG_RXWBUFPTR
  78606. CREG_STAT
  78607. CREG_STAT_BERROR
  78608. CREG_STAT_CCOFLOW
  78609. CREG_STAT_CECOFLOW
  78610. CREG_STAT_CHAR_PENDING
  78611. CREG_STAT_CLOSS
  78612. CREG_STAT_EDEFER
  78613. CREG_STAT_ERETRIES
  78614. CREG_STAT_ERROR
  78615. CREG_STAT_ERRORS
  78616. CREG_STAT_FCOFLOW
  78617. CREG_STAT_FUFLOW
  78618. CREG_STAT_JERROR
  78619. CREG_STAT_LCOLL
  78620. CREG_STAT_LOG_PENDING
  78621. CREG_STAT_MCOFLOW
  78622. CREG_STAT_RCCOFLOW
  78623. CREG_STAT_RLCOLL
  78624. CREG_STAT_RUOFLOW
  78625. CREG_STAT_RXDROP
  78626. CREG_STAT_RXFOFLOW
  78627. CREG_STAT_RXIRQ
  78628. CREG_STAT_RXLERR
  78629. CREG_STAT_RXPERR
  78630. CREG_STAT_RXSERR
  78631. CREG_STAT_RXSMALL
  78632. CREG_STAT_STATUS_MASK
  78633. CREG_STAT_SUCCESS
  78634. CREG_STAT_TAG_MASK
  78635. CREG_STAT_TXDERROR
  78636. CREG_STAT_TXIRQ
  78637. CREG_STAT_TXLERR
  78638. CREG_STAT_TXPERR
  78639. CREG_STAT_TXSERR
  78640. CREG_TIMASK
  78641. CREG_TIMEOUT_MSEC
  78642. CREG_TXDS
  78643. CREG_TXRBUFPTR
  78644. CREG_TXWBUFPTR
  78645. CREL_REL_MASK
  78646. CREL_REL_SHIFT
  78647. CREL_STEP_MASK
  78648. CREL_STEP_SHIFT
  78649. CREL_SUBSTEP_MASK
  78650. CREL_SUBSTEP_SHIFT
  78651. CREQ
  78652. CREQPERR_F
  78653. CREQPERR_S
  78654. CREQPERR_V
  78655. CREQRDPERR_F
  78656. CREQRDPERR_S
  78657. CREQRDPERR_V
  78658. CREQ_ADD_GID_RESP_EVENT_ADD_GID
  78659. CREQ_ADD_GID_RESP_RESERVED2_MASK
  78660. CREQ_ADD_GID_RESP_RESERVED2_SFT
  78661. CREQ_ADD_GID_RESP_RESERVED7_MASK
  78662. CREQ_ADD_GID_RESP_RESERVED7_SFT
  78663. CREQ_ADD_GID_RESP_TYPE_MASK
  78664. CREQ_ADD_GID_RESP_TYPE_QP_EVENT
  78665. CREQ_ADD_GID_RESP_TYPE_SFT
  78666. CREQ_ADD_GID_RESP_V
  78667. CREQ_ALLOCATE_MRW_RESP_EVENT_ALLOCATE_MRW
  78668. CREQ_ALLOCATE_MRW_RESP_RESERVED2_MASK
  78669. CREQ_ALLOCATE_MRW_RESP_RESERVED2_SFT
  78670. CREQ_ALLOCATE_MRW_RESP_RESERVED7_MASK
  78671. CREQ_ALLOCATE_MRW_RESP_RESERVED7_SFT
  78672. CREQ_ALLOCATE_MRW_RESP_TYPE_MASK
  78673. CREQ_ALLOCATE_MRW_RESP_TYPE_QP_EVENT
  78674. CREQ_ALLOCATE_MRW_RESP_TYPE_SFT
  78675. CREQ_ALLOCATE_MRW_RESP_V
  78676. CREQ_BASE_RESERVED2_MASK
  78677. CREQ_BASE_RESERVED2_SFT
  78678. CREQ_BASE_RESERVED7_MASK
  78679. CREQ_BASE_RESERVED7_SFT
  78680. CREQ_BASE_TYPE_FUNC_EVENT
  78681. CREQ_BASE_TYPE_MASK
  78682. CREQ_BASE_TYPE_QP_EVENT
  78683. CREQ_BASE_TYPE_SFT
  78684. CREQ_BASE_V
  78685. CREQ_CMP_VALID
  78686. CREQ_CREATE_AH_RESP_EVENT_CREATE_AH
  78687. CREQ_CREATE_AH_RESP_RESERVED2_MASK
  78688. CREQ_CREATE_AH_RESP_RESERVED2_SFT
  78689. CREQ_CREATE_AH_RESP_RESERVED7_MASK
  78690. CREQ_CREATE_AH_RESP_RESERVED7_SFT
  78691. CREQ_CREATE_AH_RESP_TYPE_MASK
  78692. CREQ_CREATE_AH_RESP_TYPE_QP_EVENT
  78693. CREQ_CREATE_AH_RESP_TYPE_SFT
  78694. CREQ_CREATE_AH_RESP_V
  78695. CREQ_CREATE_CQ_RESP_EVENT_CREATE_CQ
  78696. CREQ_CREATE_CQ_RESP_RESERVED2_MASK
  78697. CREQ_CREATE_CQ_RESP_RESERVED2_SFT
  78698. CREQ_CREATE_CQ_RESP_RESERVED7_MASK
  78699. CREQ_CREATE_CQ_RESP_RESERVED7_SFT
  78700. CREQ_CREATE_CQ_RESP_TYPE_MASK
  78701. CREQ_CREATE_CQ_RESP_TYPE_QP_EVENT
  78702. CREQ_CREATE_CQ_RESP_TYPE_SFT
  78703. CREQ_CREATE_CQ_RESP_V
  78704. CREQ_CREATE_QP1_RESP_EVENT_CREATE_QP1
  78705. CREQ_CREATE_QP1_RESP_RESERVED2_MASK
  78706. CREQ_CREATE_QP1_RESP_RESERVED2_SFT
  78707. CREQ_CREATE_QP1_RESP_RESERVED7_MASK
  78708. CREQ_CREATE_QP1_RESP_RESERVED7_SFT
  78709. CREQ_CREATE_QP1_RESP_TYPE_MASK
  78710. CREQ_CREATE_QP1_RESP_TYPE_QP_EVENT
  78711. CREQ_CREATE_QP1_RESP_TYPE_SFT
  78712. CREQ_CREATE_QP1_RESP_V
  78713. CREQ_CREATE_QP_RESP_EVENT_CREATE_QP
  78714. CREQ_CREATE_QP_RESP_RESERVED2_MASK
  78715. CREQ_CREATE_QP_RESP_RESERVED2_SFT
  78716. CREQ_CREATE_QP_RESP_RESERVED7_MASK
  78717. CREQ_CREATE_QP_RESP_RESERVED7_SFT
  78718. CREQ_CREATE_QP_RESP_TYPE_MASK
  78719. CREQ_CREATE_QP_RESP_TYPE_QP_EVENT
  78720. CREQ_CREATE_QP_RESP_TYPE_SFT
  78721. CREQ_CREATE_QP_RESP_V
  78722. CREQ_CREATE_SRQ_RESP_EVENT_CREATE_SRQ
  78723. CREQ_CREATE_SRQ_RESP_RESERVED2_MASK
  78724. CREQ_CREATE_SRQ_RESP_RESERVED2_SFT
  78725. CREQ_CREATE_SRQ_RESP_RESERVED7_MASK
  78726. CREQ_CREATE_SRQ_RESP_RESERVED7_SFT
  78727. CREQ_CREATE_SRQ_RESP_TYPE_MASK
  78728. CREQ_CREATE_SRQ_RESP_TYPE_QP_EVENT
  78729. CREQ_CREATE_SRQ_RESP_TYPE_SFT
  78730. CREQ_CREATE_SRQ_RESP_V
  78731. CREQ_DB_CP_FLAGS
  78732. CREQ_DB_CP_FLAGS_REARM
  78733. CREQ_DB_IDX_VALID
  78734. CREQ_DB_IRQ_DIS
  78735. CREQ_DB_KEY_CP
  78736. CREQ_DEALLOCATE_KEY_RESP_EVENT_DEALLOCATE_KEY
  78737. CREQ_DEALLOCATE_KEY_RESP_RESERVED2_MASK
  78738. CREQ_DEALLOCATE_KEY_RESP_RESERVED2_SFT
  78739. CREQ_DEALLOCATE_KEY_RESP_RESERVED7_MASK
  78740. CREQ_DEALLOCATE_KEY_RESP_RESERVED7_SFT
  78741. CREQ_DEALLOCATE_KEY_RESP_TYPE_MASK
  78742. CREQ_DEALLOCATE_KEY_RESP_TYPE_QP_EVENT
  78743. CREQ_DEALLOCATE_KEY_RESP_TYPE_SFT
  78744. CREQ_DEALLOCATE_KEY_RESP_V
  78745. CREQ_DEINITIALIZE_FW_RESP_EVENT_DEINITIALIZE_FW
  78746. CREQ_DEINITIALIZE_FW_RESP_RESERVED2_MASK
  78747. CREQ_DEINITIALIZE_FW_RESP_RESERVED2_SFT
  78748. CREQ_DEINITIALIZE_FW_RESP_RESERVED7_MASK
  78749. CREQ_DEINITIALIZE_FW_RESP_RESERVED7_SFT
  78750. CREQ_DEINITIALIZE_FW_RESP_TYPE_MASK
  78751. CREQ_DEINITIALIZE_FW_RESP_TYPE_QP_EVENT
  78752. CREQ_DEINITIALIZE_FW_RESP_TYPE_SFT
  78753. CREQ_DEINITIALIZE_FW_RESP_V
  78754. CREQ_DELETE_GID_RESP_EVENT_DELETE_GID
  78755. CREQ_DELETE_GID_RESP_RESERVED2_MASK
  78756. CREQ_DELETE_GID_RESP_RESERVED2_SFT
  78757. CREQ_DELETE_GID_RESP_RESERVED7_MASK
  78758. CREQ_DELETE_GID_RESP_RESERVED7_SFT
  78759. CREQ_DELETE_GID_RESP_TYPE_MASK
  78760. CREQ_DELETE_GID_RESP_TYPE_QP_EVENT
  78761. CREQ_DELETE_GID_RESP_TYPE_SFT
  78762. CREQ_DELETE_GID_RESP_V
  78763. CREQ_DEREGISTER_MR_RESP_EVENT_DEREGISTER_MR
  78764. CREQ_DEREGISTER_MR_RESP_RESERVED2_MASK
  78765. CREQ_DEREGISTER_MR_RESP_RESERVED2_SFT
  78766. CREQ_DEREGISTER_MR_RESP_RESERVED7_MASK
  78767. CREQ_DEREGISTER_MR_RESP_RESERVED7_SFT
  78768. CREQ_DEREGISTER_MR_RESP_TYPE_MASK
  78769. CREQ_DEREGISTER_MR_RESP_TYPE_QP_EVENT
  78770. CREQ_DEREGISTER_MR_RESP_TYPE_SFT
  78771. CREQ_DEREGISTER_MR_RESP_V
  78772. CREQ_DESTROY_AH_RESP_EVENT_DESTROY_AH
  78773. CREQ_DESTROY_AH_RESP_RESERVED2_MASK
  78774. CREQ_DESTROY_AH_RESP_RESERVED2_SFT
  78775. CREQ_DESTROY_AH_RESP_RESERVED7_MASK
  78776. CREQ_DESTROY_AH_RESP_RESERVED7_SFT
  78777. CREQ_DESTROY_AH_RESP_TYPE_MASK
  78778. CREQ_DESTROY_AH_RESP_TYPE_QP_EVENT
  78779. CREQ_DESTROY_AH_RESP_TYPE_SFT
  78780. CREQ_DESTROY_AH_RESP_V
  78781. CREQ_DESTROY_CQ_RESP_CQ_ARM_LVL_MASK
  78782. CREQ_DESTROY_CQ_RESP_CQ_ARM_LVL_SFT
  78783. CREQ_DESTROY_CQ_RESP_EVENT_DESTROY_CQ
  78784. CREQ_DESTROY_CQ_RESP_RESERVED14_MASK
  78785. CREQ_DESTROY_CQ_RESP_RESERVED14_SFT
  78786. CREQ_DESTROY_CQ_RESP_RESERVED2_MASK
  78787. CREQ_DESTROY_CQ_RESP_RESERVED2_SFT
  78788. CREQ_DESTROY_CQ_RESP_RESERVED7_MASK
  78789. CREQ_DESTROY_CQ_RESP_RESERVED7_SFT
  78790. CREQ_DESTROY_CQ_RESP_TYPE_MASK
  78791. CREQ_DESTROY_CQ_RESP_TYPE_QP_EVENT
  78792. CREQ_DESTROY_CQ_RESP_TYPE_SFT
  78793. CREQ_DESTROY_CQ_RESP_V
  78794. CREQ_DESTROY_QP1_RESP_EVENT_DESTROY_QP1
  78795. CREQ_DESTROY_QP1_RESP_RESERVED2_MASK
  78796. CREQ_DESTROY_QP1_RESP_RESERVED2_SFT
  78797. CREQ_DESTROY_QP1_RESP_RESERVED7_MASK
  78798. CREQ_DESTROY_QP1_RESP_RESERVED7_SFT
  78799. CREQ_DESTROY_QP1_RESP_TYPE_MASK
  78800. CREQ_DESTROY_QP1_RESP_TYPE_QP_EVENT
  78801. CREQ_DESTROY_QP1_RESP_TYPE_SFT
  78802. CREQ_DESTROY_QP1_RESP_V
  78803. CREQ_DESTROY_QP_RESP_EVENT_DESTROY_QP
  78804. CREQ_DESTROY_QP_RESP_RESERVED2_MASK
  78805. CREQ_DESTROY_QP_RESP_RESERVED2_SFT
  78806. CREQ_DESTROY_QP_RESP_RESERVED7_MASK
  78807. CREQ_DESTROY_QP_RESP_RESERVED7_SFT
  78808. CREQ_DESTROY_QP_RESP_TYPE_MASK
  78809. CREQ_DESTROY_QP_RESP_TYPE_QP_EVENT
  78810. CREQ_DESTROY_QP_RESP_TYPE_SFT
  78811. CREQ_DESTROY_QP_RESP_V
  78812. CREQ_DESTROY_SRQ_RESP_ENABLE_FOR_ARM_MASK
  78813. CREQ_DESTROY_SRQ_RESP_ENABLE_FOR_ARM_SFT
  78814. CREQ_DESTROY_SRQ_RESP_EVENT_DESTROY_SRQ
  78815. CREQ_DESTROY_SRQ_RESP_RESERVED2_MASK
  78816. CREQ_DESTROY_SRQ_RESP_RESERVED2_SFT
  78817. CREQ_DESTROY_SRQ_RESP_RESERVED46_MASK
  78818. CREQ_DESTROY_SRQ_RESP_RESERVED46_SFT
  78819. CREQ_DESTROY_SRQ_RESP_RESERVED7_MASK
  78820. CREQ_DESTROY_SRQ_RESP_RESERVED7_SFT
  78821. CREQ_DESTROY_SRQ_RESP_TYPE_MASK
  78822. CREQ_DESTROY_SRQ_RESP_TYPE_QP_EVENT
  78823. CREQ_DESTROY_SRQ_RESP_TYPE_SFT
  78824. CREQ_DESTROY_SRQ_RESP_V
  78825. CREQ_ENTRY_POLL_BUDGET
  78826. CREQ_FUNC_EVENT_EVENT_CFCC_ERROR
  78827. CREQ_FUNC_EVENT_EVENT_CFCM_ERROR
  78828. CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR
  78829. CREQ_FUNC_EVENT_EVENT_CFCS_ERROR
  78830. CREQ_FUNC_EVENT_EVENT_CQ_ERROR
  78831. CREQ_FUNC_EVENT_EVENT_RESOURCE_EXHAUSTED
  78832. CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR
  78833. CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR
  78834. CREQ_FUNC_EVENT_EVENT_TIM_ERROR
  78835. CREQ_FUNC_EVENT_EVENT_TQM_ERROR
  78836. CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR
  78837. CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR
  78838. CREQ_FUNC_EVENT_EVENT_VF_COMM_REQUEST
  78839. CREQ_FUNC_EVENT_RESERVED2_MASK
  78840. CREQ_FUNC_EVENT_RESERVED2_SFT
  78841. CREQ_FUNC_EVENT_RESERVED7_MASK
  78842. CREQ_FUNC_EVENT_RESERVED7_SFT
  78843. CREQ_FUNC_EVENT_TYPE_FUNC_EVENT
  78844. CREQ_FUNC_EVENT_TYPE_MASK
  78845. CREQ_FUNC_EVENT_TYPE_SFT
  78846. CREQ_FUNC_EVENT_V
  78847. CREQ_INITIALIZE_FW_RESP_EVENT_INITIALIZE_FW
  78848. CREQ_INITIALIZE_FW_RESP_RESERVED2_MASK
  78849. CREQ_INITIALIZE_FW_RESP_RESERVED2_SFT
  78850. CREQ_INITIALIZE_FW_RESP_RESERVED7_MASK
  78851. CREQ_INITIALIZE_FW_RESP_RESERVED7_SFT
  78852. CREQ_INITIALIZE_FW_RESP_TYPE_MASK
  78853. CREQ_INITIALIZE_FW_RESP_TYPE_QP_EVENT
  78854. CREQ_INITIALIZE_FW_RESP_TYPE_SFT
  78855. CREQ_INITIALIZE_FW_RESP_V
  78856. CREQ_MAP_TC_TO_COS_RESP_EVENT_MAP_TC_TO_COS
  78857. CREQ_MAP_TC_TO_COS_RESP_RESERVED2_MASK
  78858. CREQ_MAP_TC_TO_COS_RESP_RESERVED2_SFT
  78859. CREQ_MAP_TC_TO_COS_RESP_RESERVED7_MASK
  78860. CREQ_MAP_TC_TO_COS_RESP_RESERVED7_SFT
  78861. CREQ_MAP_TC_TO_COS_RESP_TYPE_MASK
  78862. CREQ_MAP_TC_TO_COS_RESP_TYPE_QP_EVENT
  78863. CREQ_MAP_TC_TO_COS_RESP_TYPE_SFT
  78864. CREQ_MAP_TC_TO_COS_RESP_V
  78865. CREQ_MODIFY_CC_RESP_EVENT_MODIFY_CC
  78866. CREQ_MODIFY_CC_RESP_RESERVED2_MASK
  78867. CREQ_MODIFY_CC_RESP_RESERVED2_SFT
  78868. CREQ_MODIFY_CC_RESP_RESERVED7_MASK
  78869. CREQ_MODIFY_CC_RESP_RESERVED7_SFT
  78870. CREQ_MODIFY_CC_RESP_TYPE_MASK
  78871. CREQ_MODIFY_CC_RESP_TYPE_QP_EVENT
  78872. CREQ_MODIFY_CC_RESP_TYPE_SFT
  78873. CREQ_MODIFY_CC_RESP_V
  78874. CREQ_MODIFY_GID_RESP_EVENT_ADD_GID
  78875. CREQ_MODIFY_GID_RESP_RESERVED2_MASK
  78876. CREQ_MODIFY_GID_RESP_RESERVED2_SFT
  78877. CREQ_MODIFY_GID_RESP_RESERVED7_MASK
  78878. CREQ_MODIFY_GID_RESP_RESERVED7_SFT
  78879. CREQ_MODIFY_GID_RESP_TYPE_MASK
  78880. CREQ_MODIFY_GID_RESP_TYPE_QP_EVENT
  78881. CREQ_MODIFY_GID_RESP_TYPE_SFT
  78882. CREQ_MODIFY_GID_RESP_V
  78883. CREQ_MODIFY_QP_RESP_EVENT_MODIFY_QP
  78884. CREQ_MODIFY_QP_RESP_RESERVED2_MASK
  78885. CREQ_MODIFY_QP_RESP_RESERVED2_SFT
  78886. CREQ_MODIFY_QP_RESP_RESERVED7_MASK
  78887. CREQ_MODIFY_QP_RESP_RESERVED7_SFT
  78888. CREQ_MODIFY_QP_RESP_TYPE_MASK
  78889. CREQ_MODIFY_QP_RESP_TYPE_QP_EVENT
  78890. CREQ_MODIFY_QP_RESP_TYPE_SFT
  78891. CREQ_MODIFY_QP_RESP_V
  78892. CREQ_QP_ERROR_NOTIFICATION_EVENT_QP_ERROR_NOTIFICATION
  78893. CREQ_QP_ERROR_NOTIFICATION_RESERVED2_MASK
  78894. CREQ_QP_ERROR_NOTIFICATION_RESERVED2_SFT
  78895. CREQ_QP_ERROR_NOTIFICATION_RESERVED7_MASK
  78896. CREQ_QP_ERROR_NOTIFICATION_RESERVED7_SFT
  78897. CREQ_QP_ERROR_NOTIFICATION_TYPE_MASK
  78898. CREQ_QP_ERROR_NOTIFICATION_TYPE_QP_EVENT
  78899. CREQ_QP_ERROR_NOTIFICATION_TYPE_SFT
  78900. CREQ_QP_ERROR_NOTIFICATION_V
  78901. CREQ_QP_EVENT_EVENT_ADD_GID
  78902. CREQ_QP_EVENT_EVENT_ALLOCATE_MRW
  78903. CREQ_QP_EVENT_EVENT_CREATE_AH
  78904. CREQ_QP_EVENT_EVENT_CREATE_CQ
  78905. CREQ_QP_EVENT_EVENT_CREATE_QP
  78906. CREQ_QP_EVENT_EVENT_CREATE_QP1
  78907. CREQ_QP_EVENT_EVENT_CREATE_SRQ
  78908. CREQ_QP_EVENT_EVENT_DEALLOCATE_KEY
  78909. CREQ_QP_EVENT_EVENT_DEINITIALIZE_FW
  78910. CREQ_QP_EVENT_EVENT_DELETE_GID
  78911. CREQ_QP_EVENT_EVENT_DEREGISTER_MR
  78912. CREQ_QP_EVENT_EVENT_DESTROY_AH
  78913. CREQ_QP_EVENT_EVENT_DESTROY_CQ
  78914. CREQ_QP_EVENT_EVENT_DESTROY_QP
  78915. CREQ_QP_EVENT_EVENT_DESTROY_QP1
  78916. CREQ_QP_EVENT_EVENT_DESTROY_SRQ
  78917. CREQ_QP_EVENT_EVENT_INITIALIZE_FW
  78918. CREQ_QP_EVENT_EVENT_MAP_TC_TO_COS
  78919. CREQ_QP_EVENT_EVENT_MODIFY_CC
  78920. CREQ_QP_EVENT_EVENT_MODIFY_GID
  78921. CREQ_QP_EVENT_EVENT_MODIFY_QP
  78922. CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION
  78923. CREQ_QP_EVENT_EVENT_QUERY_CC
  78924. CREQ_QP_EVENT_EVENT_QUERY_FUNC
  78925. CREQ_QP_EVENT_EVENT_QUERY_GID
  78926. CREQ_QP_EVENT_EVENT_QUERY_QP
  78927. CREQ_QP_EVENT_EVENT_QUERY_SRQ
  78928. CREQ_QP_EVENT_EVENT_QUERY_VERSION
  78929. CREQ_QP_EVENT_EVENT_REGISTER_MR
  78930. CREQ_QP_EVENT_EVENT_RESIZE_CQ
  78931. CREQ_QP_EVENT_EVENT_SET_FUNC_RESOURCES
  78932. CREQ_QP_EVENT_EVENT_STOP_FUNC
  78933. CREQ_QP_EVENT_RESERVED2_MASK
  78934. CREQ_QP_EVENT_RESERVED2_SFT
  78935. CREQ_QP_EVENT_RESERVED7_MASK
  78936. CREQ_QP_EVENT_RESERVED7_SFT
  78937. CREQ_QP_EVENT_TYPE_MASK
  78938. CREQ_QP_EVENT_TYPE_QP_EVENT
  78939. CREQ_QP_EVENT_TYPE_SFT
  78940. CREQ_QP_EVENT_V
  78941. CREQ_QUERY_CC_RESP_EVENT_QUERY_CC
  78942. CREQ_QUERY_CC_RESP_RESERVED2_MASK
  78943. CREQ_QUERY_CC_RESP_RESERVED2_SFT
  78944. CREQ_QUERY_CC_RESP_RESERVED7_MASK
  78945. CREQ_QUERY_CC_RESP_RESERVED7_SFT
  78946. CREQ_QUERY_CC_RESP_SB_ENABLE_CC
  78947. CREQ_QUERY_CC_RESP_SB_G_MASK
  78948. CREQ_QUERY_CC_RESP_SB_G_SFT
  78949. CREQ_QUERY_CC_RESP_SB_OPCODE_QUERY_CC
  78950. CREQ_QUERY_CC_RESP_SB_TOS_DSCP_MASK
  78951. CREQ_QUERY_CC_RESP_SB_TOS_DSCP_SFT
  78952. CREQ_QUERY_CC_RESP_SB_TOS_ECN_MASK
  78953. CREQ_QUERY_CC_RESP_SB_TOS_ECN_SFT
  78954. CREQ_QUERY_CC_RESP_TYPE_MASK
  78955. CREQ_QUERY_CC_RESP_TYPE_QP_EVENT
  78956. CREQ_QUERY_CC_RESP_TYPE_SFT
  78957. CREQ_QUERY_CC_RESP_V
  78958. CREQ_QUERY_FUNC_RESP_EVENT_QUERY_FUNC
  78959. CREQ_QUERY_FUNC_RESP_RESERVED2_MASK
  78960. CREQ_QUERY_FUNC_RESP_RESERVED2_SFT
  78961. CREQ_QUERY_FUNC_RESP_RESERVED7_MASK
  78962. CREQ_QUERY_FUNC_RESP_RESERVED7_SFT
  78963. CREQ_QUERY_FUNC_RESP_SB_DEV_CAP_FLAGS_RESIZE_QP
  78964. CREQ_QUERY_FUNC_RESP_SB_OPCODE_QUERY_FUNC
  78965. CREQ_QUERY_FUNC_RESP_TYPE_MASK
  78966. CREQ_QUERY_FUNC_RESP_TYPE_QP_EVENT
  78967. CREQ_QUERY_FUNC_RESP_TYPE_SFT
  78968. CREQ_QUERY_FUNC_RESP_V
  78969. CREQ_QUERY_GID_RESP_EVENT_QUERY_GID
  78970. CREQ_QUERY_GID_RESP_RESERVED2_MASK
  78971. CREQ_QUERY_GID_RESP_RESERVED2_SFT
  78972. CREQ_QUERY_GID_RESP_RESERVED7_MASK
  78973. CREQ_QUERY_GID_RESP_RESERVED7_SFT
  78974. CREQ_QUERY_GID_RESP_SB_OPCODE_QUERY_GID
  78975. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_LAST
  78976. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_MASK
  78977. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_SFT
  78978. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_TPID_8100
  78979. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_TPID_88A8
  78980. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_TPID_9100
  78981. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_TPID_9200
  78982. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_TPID_9300
  78983. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_TPID_CFG1
  78984. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_TPID_CFG2
  78985. CREQ_QUERY_GID_RESP_SB_VLAN_TPID_TPID_CFG3
  78986. CREQ_QUERY_GID_RESP_SB_VLAN_VLAN_EN
  78987. CREQ_QUERY_GID_RESP_SB_VLAN_VLAN_ID_MASK
  78988. CREQ_QUERY_GID_RESP_SB_VLAN_VLAN_ID_SFT
  78989. CREQ_QUERY_GID_RESP_TYPE_MASK
  78990. CREQ_QUERY_GID_RESP_TYPE_QP_EVENT
  78991. CREQ_QUERY_GID_RESP_TYPE_SFT
  78992. CREQ_QUERY_GID_RESP_V
  78993. CREQ_QUERY_QP_RESP_EVENT_QUERY_QP
  78994. CREQ_QUERY_QP_RESP_RESERVED2_MASK
  78995. CREQ_QUERY_QP_RESP_RESERVED2_SFT
  78996. CREQ_QUERY_QP_RESP_RESERVED7_MASK
  78997. CREQ_QUERY_QP_RESP_RESERVED7_SFT
  78998. CREQ_QUERY_QP_RESP_SB_ACCESS_LOCAL_WRITE
  78999. CREQ_QUERY_QP_RESP_SB_ACCESS_REMOTE_ATOMIC
  79000. CREQ_QUERY_QP_RESP_SB_ACCESS_REMOTE_READ
  79001. CREQ_QUERY_QP_RESP_SB_ACCESS_REMOTE_WRITE
  79002. CREQ_QUERY_QP_RESP_SB_DEST_VLAN_ID_MASK
  79003. CREQ_QUERY_QP_RESP_SB_DEST_VLAN_ID_SFT
  79004. CREQ_QUERY_QP_RESP_SB_ENABLE_CC
  79005. CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY
  79006. CREQ_QUERY_QP_RESP_SB_OPCODE_QUERY_QP
  79007. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK
  79008. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MTU_1024
  79009. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MTU_2048
  79010. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MTU_256
  79011. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MTU_4096
  79012. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MTU_512
  79013. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MTU_8192
  79014. CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT
  79015. CREQ_QUERY_QP_RESP_SB_RESERVED7_MASK
  79016. CREQ_QUERY_QP_RESP_SB_RESERVED7_SFT
  79017. CREQ_QUERY_QP_RESP_SB_STATE_ERR
  79018. CREQ_QUERY_QP_RESP_SB_STATE_INIT
  79019. CREQ_QUERY_QP_RESP_SB_STATE_MASK
  79020. CREQ_QUERY_QP_RESP_SB_STATE_RESET
  79021. CREQ_QUERY_QP_RESP_SB_STATE_RTR
  79022. CREQ_QUERY_QP_RESP_SB_STATE_RTS
  79023. CREQ_QUERY_QP_RESP_SB_STATE_SFT
  79024. CREQ_QUERY_QP_RESP_SB_STATE_SQD
  79025. CREQ_QUERY_QP_RESP_SB_STATE_SQE
  79026. CREQ_QUERY_QP_RESP_SB_TOS_DSCP_MASK
  79027. CREQ_QUERY_QP_RESP_SB_TOS_DSCP_SFT
  79028. CREQ_QUERY_QP_RESP_SB_TOS_ECN_MASK
  79029. CREQ_QUERY_QP_RESP_SB_TOS_ECN_SFT
  79030. CREQ_QUERY_QP_RESP_SB_VLAN_DEI
  79031. CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK
  79032. CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT
  79033. CREQ_QUERY_QP_RESP_SB_VLAN_PCP_MASK
  79034. CREQ_QUERY_QP_RESP_SB_VLAN_PCP_SFT
  79035. CREQ_QUERY_QP_RESP_TYPE_MASK
  79036. CREQ_QUERY_QP_RESP_TYPE_QP_EVENT
  79037. CREQ_QUERY_QP_RESP_TYPE_SFT
  79038. CREQ_QUERY_QP_RESP_V
  79039. CREQ_QUERY_ROCE_STATS_RESP_EVENT_LAST
  79040. CREQ_QUERY_ROCE_STATS_RESP_EVENT_QUERY_ROCE_STATS
  79041. CREQ_QUERY_ROCE_STATS_RESP_SB_OPCODE_LAST
  79042. CREQ_QUERY_ROCE_STATS_RESP_SB_OPCODE_QUERY_ROCE_STATS
  79043. CREQ_QUERY_ROCE_STATS_RESP_TYPE_LAST
  79044. CREQ_QUERY_ROCE_STATS_RESP_TYPE_MASK
  79045. CREQ_QUERY_ROCE_STATS_RESP_TYPE_QP_EVENT
  79046. CREQ_QUERY_ROCE_STATS_RESP_TYPE_SFT
  79047. CREQ_QUERY_ROCE_STATS_RESP_V
  79048. CREQ_QUERY_SRQ_RESP_EVENT_QUERY_SRQ
  79049. CREQ_QUERY_SRQ_RESP_RESERVED2_MASK
  79050. CREQ_QUERY_SRQ_RESP_RESERVED2_SFT
  79051. CREQ_QUERY_SRQ_RESP_RESERVED7_MASK
  79052. CREQ_QUERY_SRQ_RESP_RESERVED7_SFT
  79053. CREQ_QUERY_SRQ_RESP_SB_OPCODE_QUERY_SRQ
  79054. CREQ_QUERY_SRQ_RESP_TYPE_MASK
  79055. CREQ_QUERY_SRQ_RESP_TYPE_QP_EVENT
  79056. CREQ_QUERY_SRQ_RESP_TYPE_SFT
  79057. CREQ_QUERY_SRQ_RESP_V
  79058. CREQ_QUERY_VERSION_RESP_EVENT_QUERY_VERSION
  79059. CREQ_QUERY_VERSION_RESP_RESERVED2_MASK
  79060. CREQ_QUERY_VERSION_RESP_RESERVED2_SFT
  79061. CREQ_QUERY_VERSION_RESP_RESERVED7_MASK
  79062. CREQ_QUERY_VERSION_RESP_RESERVED7_SFT
  79063. CREQ_QUERY_VERSION_RESP_TYPE_MASK
  79064. CREQ_QUERY_VERSION_RESP_TYPE_QP_EVENT
  79065. CREQ_QUERY_VERSION_RESP_TYPE_SFT
  79066. CREQ_QUERY_VERSION_RESP_V
  79067. CREQ_REGISTER_MR_RESP_EVENT_REGISTER_MR
  79068. CREQ_REGISTER_MR_RESP_RESERVED2_MASK
  79069. CREQ_REGISTER_MR_RESP_RESERVED2_SFT
  79070. CREQ_REGISTER_MR_RESP_RESERVED7_MASK
  79071. CREQ_REGISTER_MR_RESP_RESERVED7_SFT
  79072. CREQ_REGISTER_MR_RESP_TYPE_MASK
  79073. CREQ_REGISTER_MR_RESP_TYPE_QP_EVENT
  79074. CREQ_REGISTER_MR_RESP_TYPE_SFT
  79075. CREQ_REGISTER_MR_RESP_V
  79076. CREQ_RESIZE_CQ_RESP_EVENT_RESIZE_CQ
  79077. CREQ_RESIZE_CQ_RESP_RESERVED2_MASK
  79078. CREQ_RESIZE_CQ_RESP_RESERVED2_SFT
  79079. CREQ_RESIZE_CQ_RESP_RESERVED7_MASK
  79080. CREQ_RESIZE_CQ_RESP_RESERVED7_SFT
  79081. CREQ_RESIZE_CQ_RESP_TYPE_MASK
  79082. CREQ_RESIZE_CQ_RESP_TYPE_QP_EVENT
  79083. CREQ_RESIZE_CQ_RESP_TYPE_SFT
  79084. CREQ_RESIZE_CQ_RESP_V
  79085. CREQ_SET_FUNC_RESOURCES_RESP_EVENT_SET_FUNC_RESOURCES
  79086. CREQ_SET_FUNC_RESOURCES_RESP_RESERVED2_MASK
  79087. CREQ_SET_FUNC_RESOURCES_RESP_RESERVED2_SFT
  79088. CREQ_SET_FUNC_RESOURCES_RESP_RESERVED7_MASK
  79089. CREQ_SET_FUNC_RESOURCES_RESP_RESERVED7_SFT
  79090. CREQ_SET_FUNC_RESOURCES_RESP_TYPE_MASK
  79091. CREQ_SET_FUNC_RESOURCES_RESP_TYPE_QP_EVENT
  79092. CREQ_SET_FUNC_RESOURCES_RESP_TYPE_SFT
  79093. CREQ_SET_FUNC_RESOURCES_RESP_V
  79094. CREQ_STOP_FUNC_RESP_EVENT_STOP_FUNC
  79095. CREQ_STOP_FUNC_RESP_RESERVED2_MASK
  79096. CREQ_STOP_FUNC_RESP_RESERVED2_SFT
  79097. CREQ_STOP_FUNC_RESP_RESERVED7_MASK
  79098. CREQ_STOP_FUNC_RESP_RESERVED7_SFT
  79099. CREQ_STOP_FUNC_RESP_TYPE_MASK
  79100. CREQ_STOP_FUNC_RESP_TYPE_QP_EVENT
  79101. CREQ_STOP_FUNC_RESP_TYPE_SFT
  79102. CREQ_STOP_FUNC_RESP_V
  79103. CRESSI_EDY_PRODUCT_ID
  79104. CRESSI_VENDOR_ID
  79105. CRFD
  79106. CRFS
  79107. CRG20_CPU1_RESET
  79108. CRGAIN
  79109. CRGCTRL_PCIE_ASSERT_BIT
  79110. CRGCTRL_PCIE_ASSERT_OFFSET
  79111. CRICR_RTA1T_SHIFT
  79112. CRICR_RTB1T_SHIFT
  79113. CRIME_BASE
  79114. CRIME_CONTROL_CQUEUE_HWM
  79115. CRIME_CONTROL_CQUEUE_SHFT
  79116. CRIME_CONTROL_CRIME_SYSADC
  79117. CRIME_CONTROL_DOG_ENA
  79118. CRIME_CONTROL_ENDIANESS
  79119. CRIME_CONTROL_ENDIAN_BIG
  79120. CRIME_CONTROL_ENDIAN_LITTLE
  79121. CRIME_CONTROL_HARD_RESET
  79122. CRIME_CONTROL_MASK
  79123. CRIME_CONTROL_SOFT_RESET
  79124. CRIME_CONTROL_TRITON_SYSADC
  79125. CRIME_CONTROL_WBUF_HWM
  79126. CRIME_CONTROL_WBUF_SHFT
  79127. CRIME_CPUERR_INT
  79128. CRIME_CPUERR_IRQ
  79129. CRIME_CPU_ERROR_ADDR_MASK
  79130. CRIME_CPU_ERROR_CPU_ILL_ADDR
  79131. CRIME_CPU_ERROR_CPU_WRT_PRTY
  79132. CRIME_CPU_ERROR_MASK
  79133. CRIME_CPU_ERROR_VICE_WRT_PRTY
  79134. CRIME_CRIME_INT_MASK
  79135. CRIME_DOG_POWER_ON_RESET
  79136. CRIME_DOG_TIMEOUT
  79137. CRIME_DOG_VALUE
  79138. CRIME_DOG_WARM_RESET
  79139. CRIME_GBE0_INT
  79140. CRIME_GBE0_IRQ
  79141. CRIME_GBE1_INT
  79142. CRIME_GBE1_IRQ
  79143. CRIME_GBE2_INT
  79144. CRIME_GBE2_IRQ
  79145. CRIME_GBE3_INT
  79146. CRIME_GBE3_IRQ
  79147. CRIME_HI_MEM_BASE
  79148. CRIME_ID_IDBITS
  79149. CRIME_ID_IDVALUE
  79150. CRIME_ID_MASK
  79151. CRIME_ID_REV
  79152. CRIME_IRQ_BASE
  79153. CRIME_MACEISA_INT_MASK
  79154. CRIME_MACEPCI_INT_MASK
  79155. CRIME_MACE_INT_MASK
  79156. CRIME_MASTER_FREQ
  79157. CRIME_MAXBANKS
  79158. CRIME_MEMERR_INT
  79159. CRIME_MEMERR_IRQ
  79160. CRIME_MEM_BANK_CONTROL_ADDR
  79161. CRIME_MEM_BANK_CONTROL_MASK
  79162. CRIME_MEM_BANK_CONTROL_SDRAM_SIZE
  79163. CRIME_MEM_ERROR_ADDR_MASK
  79164. CRIME_MEM_ERROR_CPU_ACCESS
  79165. CRIME_MEM_ERROR_ECC
  79166. CRIME_MEM_ERROR_ECC_CHK_MASK
  79167. CRIME_MEM_ERROR_ECC_REPL_MASK
  79168. CRIME_MEM_ERROR_ECC_SYN_MASK
  79169. CRIME_MEM_ERROR_GBE_ACCESS
  79170. CRIME_MEM_ERROR_HARD_ERR
  79171. CRIME_MEM_ERROR_INV
  79172. CRIME_MEM_ERROR_INV_MEM_ADDR_RD
  79173. CRIME_MEM_ERROR_INV_MEM_ADDR_RMW
  79174. CRIME_MEM_ERROR_INV_MEM_ADDR_WR
  79175. CRIME_MEM_ERROR_MACE_ACCESS
  79176. CRIME_MEM_ERROR_MACE_ID
  79177. CRIME_MEM_ERROR_MEM_ECC_RD
  79178. CRIME_MEM_ERROR_MEM_ECC_RMW
  79179. CRIME_MEM_ERROR_MULTIPLE
  79180. CRIME_MEM_ERROR_RESERVED
  79181. CRIME_MEM_ERROR_RE_ACCESS
  79182. CRIME_MEM_ERROR_RE_ID
  79183. CRIME_MEM_ERROR_SOFT_ERR
  79184. CRIME_MEM_ERROR_STAT_MASK
  79185. CRIME_MEM_ERROR_VICE_ACCESS
  79186. CRIME_MEM_REF_COUNTER_MASK
  79187. CRIME_NS_PER_TICK
  79188. CRIME_REV_11
  79189. CRIME_REV_13
  79190. CRIME_REV_14
  79191. CRIME_REV_PETTY
  79192. CRIME_RE_EMPTY_E_INT
  79193. CRIME_RE_EMPTY_E_IRQ
  79194. CRIME_RE_EMPTY_L_INT
  79195. CRIME_RE_EMPTY_L_IRQ
  79196. CRIME_RE_FULL_E_INT
  79197. CRIME_RE_FULL_E_IRQ
  79198. CRIME_RE_FULL_L_INT
  79199. CRIME_RE_FULL_L_IRQ
  79200. CRIME_RE_IDLE_E_INT
  79201. CRIME_RE_IDLE_E_IRQ
  79202. CRIME_RE_IDLE_L_INT
  79203. CRIME_RE_IDLE_L_IRQ
  79204. CRIME_SOFT0_INT
  79205. CRIME_SOFT0_IRQ
  79206. CRIME_SOFT1_INT
  79207. CRIME_SOFT1_IRQ
  79208. CRIME_SOFT2_INT
  79209. CRIME_SOFT2_IRQ
  79210. CRIME_SYSCORERR_INT
  79211. CRIME_SYSCORERR_IRQ
  79212. CRIME_VICE_INT
  79213. CRIME_VICE_IRQ
  79214. CRITBEGIN
  79215. CRITEND
  79216. CRITFLAGS
  79217. CRITICAL_CAPACITY
  79218. CRITICAL_EXCEPTION
  79219. CRITICAL_EXCEPTION_PROLOG
  79220. CRITICAL_OFFSET_FROM_TJ_MAX
  79221. CRITICAL_PACKET_LEN
  79222. CRITICAL_STATUS_0
  79223. CRITICAL_STATUS_1
  79224. CRITICAL_STATUS_10
  79225. CRITICAL_STATUS_11
  79226. CRITICAL_STATUS_12
  79227. CRITICAL_STATUS_13
  79228. CRITICAL_STATUS_14
  79229. CRITICAL_STATUS_15
  79230. CRITICAL_STATUS_2
  79231. CRITICAL_STATUS_3
  79232. CRITICAL_STATUS_4
  79233. CRITICAL_STATUS_5
  79234. CRITICAL_STATUS_6
  79235. CRITICAL_STATUS_7
  79236. CRITICAL_STATUS_8
  79237. CRITICAL_STATUS_9
  79238. CRITICAL_TEMP_LIMIT
  79239. CRIT_BTB_FLUSH
  79240. CRIT_EXCEPTION_PROLOG
  79241. CRIT_INT_EN
  79242. CRIT_SET_KSTACK
  79243. CRIT_STACK_BASE
  79244. CRI_CALCINIT
  79245. CRI_LOADGEN_SEL
  79246. CRI_LOADGEN_SEL_MASK
  79247. CRI_REQ_SIZE
  79248. CRI_RESP_SIZE
  79249. CRI_TXDEEMPH_OVERRIDE_11_6
  79250. CRI_TXDEEMPH_OVERRIDE_11_6_MASK
  79251. CRI_TXDEEMPH_OVERRIDE_17_12
  79252. CRI_TXDEEMPH_OVERRIDE_17_12_MASK
  79253. CRI_TXDEEMPH_OVERRIDE_5_0
  79254. CRI_TXDEEMPH_OVERRIDE_5_0_MASK
  79255. CRI_TXDEEMPH_OVERRIDE_EN
  79256. CRI_USE_FS32
  79257. CRLS
  79258. CRM_MASK
  79259. CRNG_INIT_CNT_THRESH
  79260. CRNG_RESEED_INTERVAL
  79261. CRNOR
  79262. CROB_MEM_POWER_LIGHT_SLEEP_MODE_1
  79263. CROB_MEM_POWER_LIGHT_SLEEP_MODE_2
  79264. CROB_MEM_POWER_LIGHT_SLEEP_MODE_OFF
  79265. CROB_MEM_PWR_LIGHT_SLEEP_MODE
  79266. CROFF
  79267. CROFFSET
  79268. CROPCAP
  79269. CROP_HI
  79270. CROP_INFO_H
  79271. CROP_INFO_V
  79272. CROSS4K
  79273. CROSSBAR_FOR_ALPHA
  79274. CROSSBAR_FOR_CB_B
  79275. CROSSBAR_FOR_CR_R
  79276. CROSSBAR_FOR_Y_G
  79277. CROSSCALL_INIT
  79278. CROSSOVER_AUTO
  79279. CROSSOVER_MDI
  79280. CROSSOVER_MDIX
  79281. CROSS_64KB
  79282. CROS_EC_ACCEL_LEGACY_CHAN
  79283. CROS_EC_ACCEL_ROTATE_AXIS
  79284. CROS_EC_BARO_MAX_CHANNELS
  79285. CROS_EC_COMMAND
  79286. CROS_EC_DEV_EC_INDEX
  79287. CROS_EC_DEV_FP_NAME
  79288. CROS_EC_DEV_IOC
  79289. CROS_EC_DEV_IOCEVENTMASK
  79290. CROS_EC_DEV_IOCRDMEM
  79291. CROS_EC_DEV_IOCXCMD
  79292. CROS_EC_DEV_ISH_NAME
  79293. CROS_EC_DEV_NAME
  79294. CROS_EC_DEV_PD_INDEX
  79295. CROS_EC_DEV_PD_NAME
  79296. CROS_EC_DEV_SCP_NAME
  79297. CROS_EC_DEV_TP_NAME
  79298. CROS_EC_DEV_VERSION
  79299. CROS_EC_LIGHT_PROX_MAX_CHANNELS
  79300. CROS_EC_MIN_SUSPEND_SAMPLING_FREQUENCY
  79301. CROS_EC_SAMPLE_SIZE
  79302. CROS_EC_SENSORS_MAX_CHANNELS
  79303. CROS_EC_SENSOR_BITS
  79304. CROS_EC_SENSOR_LEGACY_NUM
  79305. CROS_EC_SENSOR_MAX_AXIS
  79306. CROS_EC_SENSOR_X
  79307. CROS_EC_SENSOR_Y
  79308. CROS_EC_SENSOR_Z
  79309. CROS_ISH_CL_RX_RING_SIZE
  79310. CROS_ISH_CL_TX_RING_SIZE
  79311. CROS_MAX_EVENT_LEN
  79312. CROS_MKBP_EVENT
  79313. CROS_USBPD_BUFFER_SIZE
  79314. CROS_USBPD_DATA_SIZE
  79315. CROS_USBPD_LOG_RESP_SIZE
  79316. CROS_USBPD_LOG_UPDATE_DELAY
  79317. CROS_USBPD_MAX_LOG_ENTRIES
  79318. CRPB_FLAG_STATUS_SHIFT
  79319. CRPB_IOID_SHIFT_6
  79320. CRPB_IOID_SHIFT_7
  79321. CRPT_DIS
  79322. CRP_AD_CBE_BESL
  79323. CRP_AD_CBE_WRITE
  79324. CRQB_CMD_ADDR_SHIFT
  79325. CRQB_CMD_CS
  79326. CRQB_CMD_LAST
  79327. CRQB_FLAG_READ
  79328. CRQB_HOSTQ_SHIFT
  79329. CRQB_IOID_SHIFT
  79330. CRQB_PMP_SHIFT
  79331. CRQB_TAG_SHIFT
  79332. CRQ_CLOSED
  79333. CRQ_ENTRY_OVERWRITTEN
  79334. CRQ_PER_PAGE
  79335. CRQ_RES_BUF_SIZE
  79336. CRR_OP
  79337. CRS
  79338. CRSEN
  79339. CRSIZE
  79340. CRSPPERR_F
  79341. CRSPPERR_S
  79342. CRSPPERR_V
  79343. CRST
  79344. CRSTACK
  79345. CRSTANDVID
  79346. CRST_ALLOC_ORDER
  79347. CRS_CK
  79348. CRS_OK
  79349. CRT
  79350. CRT00__H_TOTAL_MASK
  79351. CRT00__H_TOTAL__SHIFT
  79352. CRT01__H_DISP_END_MASK
  79353. CRT01__H_DISP_END__SHIFT
  79354. CRT02__H_BLANK_START_MASK
  79355. CRT02__H_BLANK_START__SHIFT
  79356. CRT03__CR10CR11_R_DIS_B_MASK
  79357. CRT03__CR10CR11_R_DIS_B__SHIFT
  79358. CRT03__H_BLANK_END_MASK
  79359. CRT03__H_BLANK_END__SHIFT
  79360. CRT03__H_DE_SKEW_MASK
  79361. CRT03__H_DE_SKEW__SHIFT
  79362. CRT04__H_SYNC_START_MASK
  79363. CRT04__H_SYNC_START__SHIFT
  79364. CRT05__H_BLANK_END_B5_MASK
  79365. CRT05__H_BLANK_END_B5__SHIFT
  79366. CRT05__H_SYNC_END_MASK
  79367. CRT05__H_SYNC_END__SHIFT
  79368. CRT05__H_SYNC_SKEW_MASK
  79369. CRT05__H_SYNC_SKEW__SHIFT
  79370. CRT06__V_TOTAL_MASK
  79371. CRT06__V_TOTAL__SHIFT
  79372. CRT07__LINE_CMP_B8_MASK
  79373. CRT07__LINE_CMP_B8__SHIFT
  79374. CRT07__V_BLANK_START_B8_MASK
  79375. CRT07__V_BLANK_START_B8__SHIFT
  79376. CRT07__V_DISP_END_B8_MASK
  79377. CRT07__V_DISP_END_B8__SHIFT
  79378. CRT07__V_DISP_END_B9_MASK
  79379. CRT07__V_DISP_END_B9__SHIFT
  79380. CRT07__V_SYNC_START_B8_MASK
  79381. CRT07__V_SYNC_START_B8__SHIFT
  79382. CRT07__V_SYNC_START_B9_MASK
  79383. CRT07__V_SYNC_START_B9__SHIFT
  79384. CRT07__V_TOTAL_B8_MASK
  79385. CRT07__V_TOTAL_B8__SHIFT
  79386. CRT07__V_TOTAL_B9_MASK
  79387. CRT07__V_TOTAL_B9__SHIFT
  79388. CRT08__BYTE_PAN_MASK
  79389. CRT08__BYTE_PAN__SHIFT
  79390. CRT08__ROW_SCAN_START_MASK
  79391. CRT08__ROW_SCAN_START__SHIFT
  79392. CRT09__DOUBLE_CHAR_HEIGHT_MASK
  79393. CRT09__DOUBLE_CHAR_HEIGHT__SHIFT
  79394. CRT09__LINE_CMP_B9_MASK
  79395. CRT09__LINE_CMP_B9__SHIFT
  79396. CRT09__MAX_ROW_SCAN_MASK
  79397. CRT09__MAX_ROW_SCAN__SHIFT
  79398. CRT09__V_BLANK_START_B9_MASK
  79399. CRT09__V_BLANK_START_B9__SHIFT
  79400. CRT0A__CURSOR_DISABLE_MASK
  79401. CRT0A__CURSOR_DISABLE__SHIFT
  79402. CRT0A__CURSOR_START_MASK
  79403. CRT0A__CURSOR_START__SHIFT
  79404. CRT0B__CURSOR_END_MASK
  79405. CRT0B__CURSOR_END__SHIFT
  79406. CRT0B__CURSOR_SKEW_MASK
  79407. CRT0B__CURSOR_SKEW__SHIFT
  79408. CRT0C__DISP_START_MASK
  79409. CRT0C__DISP_START__SHIFT
  79410. CRT0D__DISP_START_MASK
  79411. CRT0D__DISP_START__SHIFT
  79412. CRT0E__CURSOR_LOC_HI_MASK
  79413. CRT0E__CURSOR_LOC_HI__SHIFT
  79414. CRT0F__CURSOR_LOC_LO_MASK
  79415. CRT0F__CURSOR_LOC_LO__SHIFT
  79416. CRT10__V_SYNC_START_MASK
  79417. CRT10__V_SYNC_START__SHIFT
  79418. CRT11__C0T7_WR_ONLY_MASK
  79419. CRT11__C0T7_WR_ONLY__SHIFT
  79420. CRT11__SEL5_REFRESH_CYC_MASK
  79421. CRT11__SEL5_REFRESH_CYC__SHIFT
  79422. CRT11__V_INTR_CLR_MASK
  79423. CRT11__V_INTR_CLR__SHIFT
  79424. CRT11__V_INTR_EN_MASK
  79425. CRT11__V_INTR_EN__SHIFT
  79426. CRT11__V_SYNC_END_MASK
  79427. CRT11__V_SYNC_END__SHIFT
  79428. CRT12__V_DISP_END_MASK
  79429. CRT12__V_DISP_END__SHIFT
  79430. CRT13__DISP_PITCH_MASK
  79431. CRT13__DISP_PITCH__SHIFT
  79432. CRT14__ADDR_CNT_BY4_MASK
  79433. CRT14__ADDR_CNT_BY4__SHIFT
  79434. CRT14__DOUBLE_WORD_MASK
  79435. CRT14__DOUBLE_WORD__SHIFT
  79436. CRT14__UNDRLN_LOC_MASK
  79437. CRT14__UNDRLN_LOC__SHIFT
  79438. CRT15__V_BLANK_START_MASK
  79439. CRT15__V_BLANK_START__SHIFT
  79440. CRT16__V_BLANK_END_MASK
  79441. CRT16__V_BLANK_END__SHIFT
  79442. CRT17__ADDR_CNT_BY2_MASK
  79443. CRT17__ADDR_CNT_BY2__SHIFT
  79444. CRT17__BYTE_MODE_MASK
  79445. CRT17__BYTE_MODE__SHIFT
  79446. CRT17__CRTC_SYNC_EN_MASK
  79447. CRT17__CRTC_SYNC_EN__SHIFT
  79448. CRT17__RA0_AS_A13B_MASK
  79449. CRT17__RA0_AS_A13B__SHIFT
  79450. CRT17__RA1_AS_A14B_MASK
  79451. CRT17__RA1_AS_A14B__SHIFT
  79452. CRT17__VCOUNT_BY2_MASK
  79453. CRT17__VCOUNT_BY2__SHIFT
  79454. CRT17__WRAP_A15TOA0_MASK
  79455. CRT17__WRAP_A15TOA0__SHIFT
  79456. CRT18__LINE_CMP_MASK
  79457. CRT18__LINE_CMP__SHIFT
  79458. CRT1E__GRPH_DEC_RD1_MASK
  79459. CRT1E__GRPH_DEC_RD1__SHIFT
  79460. CRT1F__GRPH_DEC_RD0_MASK
  79461. CRT1F__GRPH_DEC_RD0__SHIFT
  79462. CRT1OutputControl
  79463. CRT1TablePtrOffset
  79464. CRT1_LCDA
  79465. CRT1_OUTPUT_CONTROL_PARAMETERS
  79466. CRT1_OUTPUT_CONTROL_PS_ALLOCATION
  79467. CRT1_VGA
  79468. CRT22__GRPH_LATCH_DATA_MASK
  79469. CRT22__GRPH_LATCH_DATA__SHIFT
  79470. CRT2Delay1Offset
  79471. CRT2Mode
  79472. CRT2OutputControl
  79473. CRT2PtrDataPtrOffset
  79474. CRT2_DEFAULT
  79475. CRT2_Device
  79476. CRT2_ENABLE
  79477. CRT2_LCD
  79478. CRT2_ON
  79479. CRT2_OUTPUT_CONTROL_PARAMETERS
  79480. CRT2_OUTPUT_CONTROL_PS_ALLOCATION
  79481. CRT2_TV
  79482. CRT2_VGA
  79483. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  79484. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  79485. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  79486. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  79487. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  79488. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  79489. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  79490. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  79491. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  79492. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  79493. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  79494. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  79495. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  79496. CRTC0_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  79497. CRTC0_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  79498. CRTC0_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  79499. CRTC0_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  79500. CRTC0_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  79501. CRTC0_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  79502. CRTC0_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  79503. CRTC0_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  79504. CRTC0_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  79505. CRTC0_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  79506. CRTC0_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  79507. CRTC0_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  79508. CRTC0_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  79509. CRTC0_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  79510. CRTC0_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  79511. CRTC0_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  79512. CRTC0_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  79513. CRTC0_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  79514. CRTC0_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  79515. CRTC0_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  79516. CRTC0_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  79517. CRTC0_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  79518. CRTC0_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  79519. CRTC0_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  79520. CRTC0_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  79521. CRTC0_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  79522. CRTC0_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  79523. CRTC0_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  79524. CRTC0_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  79525. CRTC0_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  79526. CRTC0_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  79527. CRTC0_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  79528. CRTC0_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  79529. CRTC0_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  79530. CRTC0_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  79531. CRTC0_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  79532. CRTC0_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  79533. CRTC0_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  79534. CRTC0_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  79535. CRTC0_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  79536. CRTC0_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  79537. CRTC0_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  79538. CRTC0_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  79539. CRTC0_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  79540. CRTC0_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  79541. CRTC0_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  79542. CRTC0_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  79543. CRTC0_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  79544. CRTC0_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  79545. CRTC0_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  79546. CRTC0_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  79547. CRTC0_CRTC_CONTROL__CRTC_MASTER_EN_MASK
  79548. CRTC0_CRTC_CONTROL__CRTC_MASTER_EN__SHIFT
  79549. CRTC0_CRTC_CONTROL__CRTC_SOF_PULL_EN_MASK
  79550. CRTC0_CRTC_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  79551. CRTC0_CRTC_CONTROL__CRTC_START_POINT_CNTL_MASK
  79552. CRTC0_CRTC_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  79553. CRTC0_CRTC_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  79554. CRTC0_CRTC_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  79555. CRTC0_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  79556. CRTC0_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  79557. CRTC0_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  79558. CRTC0_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  79559. CRTC0_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  79560. CRTC0_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  79561. CRTC0_CRTC_CRC0_DATA_B__CRC0_B_CB_MASK
  79562. CRTC0_CRTC_CRC0_DATA_B__CRC0_B_CB__SHIFT
  79563. CRTC0_CRTC_CRC0_DATA_RG__CRC0_G_Y_MASK
  79564. CRTC0_CRTC_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  79565. CRTC0_CRTC_CRC0_DATA_RG__CRC0_R_CR_MASK
  79566. CRTC0_CRTC_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  79567. CRTC0_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  79568. CRTC0_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  79569. CRTC0_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  79570. CRTC0_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  79571. CRTC0_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  79572. CRTC0_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  79573. CRTC0_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  79574. CRTC0_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  79575. CRTC0_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  79576. CRTC0_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  79577. CRTC0_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  79578. CRTC0_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  79579. CRTC0_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  79580. CRTC0_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  79581. CRTC0_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  79582. CRTC0_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  79583. CRTC0_CRTC_CRC1_DATA_B__CRC1_B_CB_MASK
  79584. CRTC0_CRTC_CRC1_DATA_B__CRC1_B_CB__SHIFT
  79585. CRTC0_CRTC_CRC1_DATA_RG__CRC1_G_Y_MASK
  79586. CRTC0_CRTC_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  79587. CRTC0_CRTC_CRC1_DATA_RG__CRC1_R_CR_MASK
  79588. CRTC0_CRTC_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  79589. CRTC0_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  79590. CRTC0_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  79591. CRTC0_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  79592. CRTC0_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  79593. CRTC0_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  79594. CRTC0_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  79595. CRTC0_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  79596. CRTC0_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  79597. CRTC0_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  79598. CRTC0_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  79599. CRTC0_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  79600. CRTC0_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  79601. CRTC0_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  79602. CRTC0_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  79603. CRTC0_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  79604. CRTC0_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  79605. CRTC0_CRTC_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  79606. CRTC0_CRTC_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  79607. CRTC0_CRTC_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  79608. CRTC0_CRTC_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  79609. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  79610. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  79611. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_EN_MASK
  79612. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_EN__SHIFT
  79613. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  79614. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  79615. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  79616. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  79617. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  79618. CRTC0_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  79619. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  79620. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  79621. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_MASK
  79622. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE__SHIFT
  79623. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING_MASK
  79624. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING__SHIFT
  79625. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  79626. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  79627. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  79628. CRTC0_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  79629. CRTC0_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE_MASK
  79630. CRTC0_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE__SHIFT
  79631. CRTC0_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS_MASK
  79632. CRTC0_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS__SHIFT
  79633. CRTC0_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR_MASK
  79634. CRTC0_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR__SHIFT
  79635. CRTC0_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY_MASK
  79636. CRTC0_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY__SHIFT
  79637. CRTC0_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  79638. CRTC0_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  79639. CRTC0_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  79640. CRTC0_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  79641. CRTC0_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  79642. CRTC0_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  79643. CRTC0_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  79644. CRTC0_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  79645. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  79646. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  79647. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  79648. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  79649. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  79650. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  79651. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  79652. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  79653. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  79654. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  79655. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  79656. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  79657. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  79658. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  79659. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  79660. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  79661. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  79662. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  79663. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  79664. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  79665. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  79666. CRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  79667. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  79668. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  79669. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  79670. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  79671. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  79672. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  79673. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  79674. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  79675. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  79676. CRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  79677. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  79678. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  79679. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  79680. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  79681. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  79682. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  79683. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  79684. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  79685. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  79686. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  79687. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  79688. CRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  79689. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  79690. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  79691. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  79692. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  79693. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  79694. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  79695. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  79696. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  79697. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  79698. CRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  79699. CRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  79700. CRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  79701. CRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  79702. CRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  79703. CRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  79704. CRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  79705. CRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  79706. CRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  79707. CRTC0_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  79708. CRTC0_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  79709. CRTC0_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  79710. CRTC0_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  79711. CRTC0_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  79712. CRTC0_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  79713. CRTC0_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  79714. CRTC0_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  79715. CRTC0_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  79716. CRTC0_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  79717. CRTC0_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  79718. CRTC0_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  79719. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  79720. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  79721. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  79722. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  79723. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  79724. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  79725. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  79726. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  79727. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  79728. CRTC0_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  79729. CRTC0_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  79730. CRTC0_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  79731. CRTC0_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  79732. CRTC0_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  79733. CRTC0_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  79734. CRTC0_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  79735. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  79736. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  79737. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  79738. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  79739. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  79740. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  79741. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  79742. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  79743. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  79744. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  79745. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  79746. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  79747. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  79748. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  79749. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  79750. CRTC0_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  79751. CRTC0_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  79752. CRTC0_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  79753. CRTC0_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  79754. CRTC0_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  79755. CRTC0_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  79756. CRTC0_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  79757. CRTC0_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  79758. CRTC0_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  79759. CRTC0_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  79760. CRTC0_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  79761. CRTC0_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  79762. CRTC0_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  79763. CRTC0_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  79764. CRTC0_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  79765. CRTC0_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  79766. CRTC0_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  79767. CRTC0_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  79768. CRTC0_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  79769. CRTC0_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  79770. CRTC0_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  79771. CRTC0_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  79772. CRTC0_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  79773. CRTC0_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  79774. CRTC0_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  79775. CRTC0_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  79776. CRTC0_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  79777. CRTC0_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  79778. CRTC0_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  79779. CRTC0_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  79780. CRTC0_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  79781. CRTC0_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  79782. CRTC0_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  79783. CRTC0_CRTC_H_TOTAL__CRTC_H_TOTAL_MASK
  79784. CRTC0_CRTC_H_TOTAL__CRTC_H_TOTAL__SHIFT
  79785. CRTC0_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  79786. CRTC0_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  79787. CRTC0_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  79788. CRTC0_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  79789. CRTC0_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  79790. CRTC0_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  79791. CRTC0_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  79792. CRTC0_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  79793. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  79794. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  79795. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  79796. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  79797. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  79798. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  79799. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  79800. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  79801. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  79802. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  79803. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  79804. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  79805. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  79806. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  79807. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  79808. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  79809. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  79810. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  79811. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  79812. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  79813. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  79814. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  79815. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  79816. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  79817. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  79818. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  79819. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  79820. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  79821. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  79822. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  79823. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  79824. CRTC0_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  79825. CRTC0_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  79826. CRTC0_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  79827. CRTC0_CRTC_MASTER_EN__CRTC_MASTER_EN_MASK
  79828. CRTC0_CRTC_MASTER_EN__CRTC_MASTER_EN__SHIFT
  79829. CRTC0_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  79830. CRTC0_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  79831. CRTC0_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  79832. CRTC0_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  79833. CRTC0_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  79834. CRTC0_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  79835. CRTC0_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  79836. CRTC0_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  79837. CRTC0_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  79838. CRTC0_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  79839. CRTC0_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  79840. CRTC0_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  79841. CRTC0_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  79842. CRTC0_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  79843. CRTC0_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  79844. CRTC0_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  79845. CRTC0_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  79846. CRTC0_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  79847. CRTC0_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  79848. CRTC0_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  79849. CRTC0_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  79850. CRTC0_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  79851. CRTC0_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  79852. CRTC0_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  79853. CRTC0_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  79854. CRTC0_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  79855. CRTC0_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  79856. CRTC0_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  79857. CRTC0_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  79858. CRTC0_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  79859. CRTC0_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  79860. CRTC0_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  79861. CRTC0_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  79862. CRTC0_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  79863. CRTC0_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  79864. CRTC0_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  79865. CRTC0_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  79866. CRTC0_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  79867. CRTC0_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  79868. CRTC0_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  79869. CRTC0_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  79870. CRTC0_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  79871. CRTC0_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  79872. CRTC0_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  79873. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR_MASK
  79874. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR__SHIFT
  79875. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MASK
  79876. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK_MASK
  79877. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK__SHIFT
  79878. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE_MASK
  79879. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE__SHIFT
  79880. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT__SHIFT
  79881. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_MASK
  79882. CRTC0_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED__SHIFT
  79883. CRTC0_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  79884. CRTC0_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  79885. CRTC0_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  79886. CRTC0_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  79887. CRTC0_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  79888. CRTC0_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  79889. CRTC0_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  79890. CRTC0_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  79891. CRTC0_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  79892. CRTC0_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  79893. CRTC0_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  79894. CRTC0_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  79895. CRTC0_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  79896. CRTC0_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  79897. CRTC0_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  79898. CRTC0_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  79899. CRTC0_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  79900. CRTC0_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  79901. CRTC0_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  79902. CRTC0_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  79903. CRTC0_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  79904. CRTC0_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  79905. CRTC0_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  79906. CRTC0_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  79907. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  79908. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  79909. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  79910. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  79911. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  79912. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  79913. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  79914. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  79915. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  79916. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  79917. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  79918. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  79919. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  79920. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  79921. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_MASK
  79922. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE_MASK
  79923. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE__SHIFT
  79924. CRTC0_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE__SHIFT
  79925. CRTC0_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  79926. CRTC0_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  79927. CRTC0_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  79928. CRTC0_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  79929. CRTC0_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  79930. CRTC0_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  79931. CRTC0_CRTC_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  79932. CRTC0_CRTC_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  79933. CRTC0_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  79934. CRTC0_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  79935. CRTC0_CRTC_STATUS__CRTC_H_ACTIVE_DISP_MASK
  79936. CRTC0_CRTC_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  79937. CRTC0_CRTC_STATUS__CRTC_H_BLANK_MASK
  79938. CRTC0_CRTC_STATUS__CRTC_H_BLANK__SHIFT
  79939. CRTC0_CRTC_STATUS__CRTC_H_SYNC_A_MASK
  79940. CRTC0_CRTC_STATUS__CRTC_H_SYNC_A__SHIFT
  79941. CRTC0_CRTC_STATUS__CRTC_V_ACTIVE_DISP_MASK
  79942. CRTC0_CRTC_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  79943. CRTC0_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  79944. CRTC0_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  79945. CRTC0_CRTC_STATUS__CRTC_V_BLANK_MASK
  79946. CRTC0_CRTC_STATUS__CRTC_V_BLANK__SHIFT
  79947. CRTC0_CRTC_STATUS__CRTC_V_START_LINE_MASK
  79948. CRTC0_CRTC_STATUS__CRTC_V_START_LINE__SHIFT
  79949. CRTC0_CRTC_STATUS__CRTC_V_SYNC_A_MASK
  79950. CRTC0_CRTC_STATUS__CRTC_V_SYNC_A__SHIFT
  79951. CRTC0_CRTC_STATUS__CRTC_V_UPDATE_MASK
  79952. CRTC0_CRTC_STATUS__CRTC_V_UPDATE__SHIFT
  79953. CRTC0_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  79954. CRTC0_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  79955. CRTC0_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  79956. CRTC0_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  79957. CRTC0_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  79958. CRTC0_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  79959. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  79960. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  79961. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  79962. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  79963. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  79964. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  79965. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  79966. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  79967. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  79968. CRTC0_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  79969. CRTC0_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  79970. CRTC0_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  79971. CRTC0_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  79972. CRTC0_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  79973. CRTC0_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  79974. CRTC0_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  79975. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  79976. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  79977. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  79978. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  79979. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  79980. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  79981. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  79982. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  79983. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  79984. CRTC0_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  79985. CRTC0_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  79986. CRTC0_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  79987. CRTC0_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  79988. CRTC0_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  79989. CRTC0_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  79990. CRTC0_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  79991. CRTC0_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  79992. CRTC0_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  79993. CRTC0_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  79994. CRTC0_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  79995. CRTC0_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  79996. CRTC0_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  79997. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  79998. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  79999. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  80000. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  80001. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  80002. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  80003. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  80004. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  80005. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  80006. CRTC0_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  80007. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  80008. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  80009. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  80010. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  80011. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  80012. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  80013. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  80014. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  80015. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  80016. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  80017. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  80018. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  80019. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  80020. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  80021. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  80022. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  80023. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  80024. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  80025. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  80026. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  80027. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  80028. CRTC0_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  80029. CRTC0_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  80030. CRTC0_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  80031. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  80032. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  80033. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  80034. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  80035. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  80036. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  80037. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  80038. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  80039. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  80040. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  80041. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  80042. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  80043. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  80044. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  80045. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  80046. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  80047. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  80048. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  80049. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  80050. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  80051. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  80052. CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  80053. CRTC0_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  80054. CRTC0_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  80055. CRTC0_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  80056. CRTC0_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  80057. CRTC0_CRTC_VBI_END__CRTC_VBI_H_END_MASK
  80058. CRTC0_CRTC_VBI_END__CRTC_VBI_H_END__SHIFT
  80059. CRTC0_CRTC_VBI_END__CRTC_VBI_V_END_MASK
  80060. CRTC0_CRTC_VBI_END__CRTC_VBI_V_END__SHIFT
  80061. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  80062. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  80063. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  80064. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  80065. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  80066. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  80067. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  80068. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  80069. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  80070. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  80071. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  80072. CRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  80073. CRTC0_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  80074. CRTC0_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  80075. CRTC0_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  80076. CRTC0_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  80077. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  80078. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  80079. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  80080. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  80081. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  80082. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  80083. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  80084. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  80085. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  80086. CRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  80087. CRTC0_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  80088. CRTC0_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  80089. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  80090. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  80091. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  80092. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  80093. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  80094. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  80095. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  80096. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  80097. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  80098. CRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  80099. CRTC0_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  80100. CRTC0_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  80101. CRTC0_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  80102. CRTC0_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  80103. CRTC0_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  80104. CRTC0_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  80105. CRTC0_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  80106. CRTC0_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  80107. CRTC0_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  80108. CRTC0_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  80109. CRTC0_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  80110. CRTC0_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  80111. CRTC0_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  80112. CRTC0_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  80113. CRTC0_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  80114. CRTC0_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  80115. CRTC0_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  80116. CRTC0_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  80117. CRTC0_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  80118. CRTC0_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  80119. CRTC0_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  80120. CRTC0_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  80121. CRTC0_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  80122. CRTC0_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  80123. CRTC0_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  80124. CRTC0_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  80125. CRTC0_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  80126. CRTC0_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  80127. CRTC0_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  80128. CRTC0_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  80129. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  80130. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  80131. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  80132. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  80133. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  80134. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  80135. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  80136. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  80137. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  80138. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  80139. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  80140. CRTC0_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  80141. CRTC0_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  80142. CRTC0_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  80143. CRTC0_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  80144. CRTC0_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  80145. CRTC0_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  80146. CRTC0_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  80147. CRTC0_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  80148. CRTC0_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  80149. CRTC0_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  80150. CRTC0_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  80151. CRTC0_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  80152. CRTC0_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  80153. CRTC0_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  80154. CRTC0_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  80155. CRTC0_CRTC_V_TOTAL__CRTC_V_TOTAL_MASK
  80156. CRTC0_CRTC_V_TOTAL__CRTC_V_TOTAL__SHIFT
  80157. CRTC0_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  80158. CRTC0_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  80159. CRTC0_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  80160. CRTC0_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  80161. CRTC0_PHYPLL_PIXEL_RATE_CNTL__CRTC0_PHYPLL_PIXEL_RATE_SOURCE_MASK
  80162. CRTC0_PHYPLL_PIXEL_RATE_CNTL__CRTC0_PHYPLL_PIXEL_RATE_SOURCE__SHIFT
  80163. CRTC0_PHYPLL_PIXEL_RATE_CNTL__CRTC0_PIXEL_RATE_PLL_SOURCE_MASK
  80164. CRTC0_PHYPLL_PIXEL_RATE_CNTL__CRTC0_PIXEL_RATE_PLL_SOURCE__SHIFT
  80165. CRTC0_PIXEL_RATE_CNTL__CRTC0_ADD_PIXEL_MASK
  80166. CRTC0_PIXEL_RATE_CNTL__CRTC0_ADD_PIXEL__SHIFT
  80167. CRTC0_PIXEL_RATE_CNTL__CRTC0_DISPOUT_ERROR_COUNT_MASK
  80168. CRTC0_PIXEL_RATE_CNTL__CRTC0_DISPOUT_ERROR_COUNT__SHIFT
  80169. CRTC0_PIXEL_RATE_CNTL__CRTC0_DISPOUT_FIFO_ERROR_MASK
  80170. CRTC0_PIXEL_RATE_CNTL__CRTC0_DISPOUT_FIFO_ERROR__SHIFT
  80171. CRTC0_PIXEL_RATE_CNTL__CRTC0_DISPOUT_HALF_RATE_EN_MASK
  80172. CRTC0_PIXEL_RATE_CNTL__CRTC0_DISPOUT_HALF_RATE_EN__SHIFT
  80173. CRTC0_PIXEL_RATE_CNTL__CRTC0_DROP_PIXEL_MASK
  80174. CRTC0_PIXEL_RATE_CNTL__CRTC0_DROP_PIXEL__SHIFT
  80175. CRTC0_PIXEL_RATE_CNTL__CRTC0_PIXEL_RATE_SOURCE_MASK
  80176. CRTC0_PIXEL_RATE_CNTL__CRTC0_PIXEL_RATE_SOURCE__SHIFT
  80177. CRTC0_PIXEL_RATE_CNTL__DP_DTO0_DS_DISABLE_MASK
  80178. CRTC0_PIXEL_RATE_CNTL__DP_DTO0_DS_DISABLE__SHIFT
  80179. CRTC0_PIXEL_RATE_CNTL__DP_DTO0_ENABLE_MASK
  80180. CRTC0_PIXEL_RATE_CNTL__DP_DTO0_ENABLE__SHIFT
  80181. CRTC0_REGISTER_OFFSET
  80182. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  80183. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  80184. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  80185. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  80186. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  80187. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  80188. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  80189. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  80190. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  80191. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  80192. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  80193. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  80194. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  80195. CRTC1_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  80196. CRTC1_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  80197. CRTC1_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  80198. CRTC1_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  80199. CRTC1_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  80200. CRTC1_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  80201. CRTC1_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  80202. CRTC1_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  80203. CRTC1_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  80204. CRTC1_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  80205. CRTC1_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  80206. CRTC1_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  80207. CRTC1_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  80208. CRTC1_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  80209. CRTC1_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  80210. CRTC1_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  80211. CRTC1_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  80212. CRTC1_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  80213. CRTC1_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  80214. CRTC1_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  80215. CRTC1_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  80216. CRTC1_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  80217. CRTC1_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  80218. CRTC1_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  80219. CRTC1_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  80220. CRTC1_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  80221. CRTC1_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  80222. CRTC1_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  80223. CRTC1_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  80224. CRTC1_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  80225. CRTC1_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  80226. CRTC1_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  80227. CRTC1_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  80228. CRTC1_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  80229. CRTC1_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  80230. CRTC1_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  80231. CRTC1_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  80232. CRTC1_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  80233. CRTC1_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  80234. CRTC1_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  80235. CRTC1_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  80236. CRTC1_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  80237. CRTC1_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  80238. CRTC1_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  80239. CRTC1_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  80240. CRTC1_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  80241. CRTC1_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  80242. CRTC1_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  80243. CRTC1_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  80244. CRTC1_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  80245. CRTC1_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  80246. CRTC1_CRTC_CONTROL__CRTC_MASTER_EN_MASK
  80247. CRTC1_CRTC_CONTROL__CRTC_MASTER_EN__SHIFT
  80248. CRTC1_CRTC_CONTROL__CRTC_SOF_PULL_EN_MASK
  80249. CRTC1_CRTC_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  80250. CRTC1_CRTC_CONTROL__CRTC_START_POINT_CNTL_MASK
  80251. CRTC1_CRTC_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  80252. CRTC1_CRTC_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  80253. CRTC1_CRTC_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  80254. CRTC1_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  80255. CRTC1_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  80256. CRTC1_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  80257. CRTC1_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  80258. CRTC1_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  80259. CRTC1_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  80260. CRTC1_CRTC_CRC0_DATA_B__CRC0_B_CB_MASK
  80261. CRTC1_CRTC_CRC0_DATA_B__CRC0_B_CB__SHIFT
  80262. CRTC1_CRTC_CRC0_DATA_RG__CRC0_G_Y_MASK
  80263. CRTC1_CRTC_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  80264. CRTC1_CRTC_CRC0_DATA_RG__CRC0_R_CR_MASK
  80265. CRTC1_CRTC_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  80266. CRTC1_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  80267. CRTC1_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  80268. CRTC1_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  80269. CRTC1_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  80270. CRTC1_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  80271. CRTC1_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  80272. CRTC1_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  80273. CRTC1_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  80274. CRTC1_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  80275. CRTC1_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  80276. CRTC1_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  80277. CRTC1_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  80278. CRTC1_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  80279. CRTC1_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  80280. CRTC1_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  80281. CRTC1_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  80282. CRTC1_CRTC_CRC1_DATA_B__CRC1_B_CB_MASK
  80283. CRTC1_CRTC_CRC1_DATA_B__CRC1_B_CB__SHIFT
  80284. CRTC1_CRTC_CRC1_DATA_RG__CRC1_G_Y_MASK
  80285. CRTC1_CRTC_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  80286. CRTC1_CRTC_CRC1_DATA_RG__CRC1_R_CR_MASK
  80287. CRTC1_CRTC_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  80288. CRTC1_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  80289. CRTC1_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  80290. CRTC1_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  80291. CRTC1_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  80292. CRTC1_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  80293. CRTC1_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  80294. CRTC1_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  80295. CRTC1_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  80296. CRTC1_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  80297. CRTC1_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  80298. CRTC1_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  80299. CRTC1_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  80300. CRTC1_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  80301. CRTC1_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  80302. CRTC1_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  80303. CRTC1_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  80304. CRTC1_CRTC_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  80305. CRTC1_CRTC_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  80306. CRTC1_CRTC_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  80307. CRTC1_CRTC_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  80308. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  80309. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  80310. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_EN_MASK
  80311. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_EN__SHIFT
  80312. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  80313. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  80314. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  80315. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  80316. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  80317. CRTC1_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  80318. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  80319. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  80320. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_MASK
  80321. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE__SHIFT
  80322. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING_MASK
  80323. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING__SHIFT
  80324. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  80325. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  80326. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  80327. CRTC1_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  80328. CRTC1_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE_MASK
  80329. CRTC1_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE__SHIFT
  80330. CRTC1_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS_MASK
  80331. CRTC1_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS__SHIFT
  80332. CRTC1_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR_MASK
  80333. CRTC1_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR__SHIFT
  80334. CRTC1_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY_MASK
  80335. CRTC1_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY__SHIFT
  80336. CRTC1_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  80337. CRTC1_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  80338. CRTC1_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  80339. CRTC1_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  80340. CRTC1_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  80341. CRTC1_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  80342. CRTC1_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  80343. CRTC1_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  80344. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  80345. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  80346. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  80347. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  80348. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  80349. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  80350. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  80351. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  80352. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  80353. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  80354. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  80355. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  80356. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  80357. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  80358. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  80359. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  80360. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  80361. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  80362. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  80363. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  80364. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  80365. CRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  80366. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  80367. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  80368. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  80369. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  80370. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  80371. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  80372. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  80373. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  80374. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  80375. CRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  80376. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  80377. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  80378. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  80379. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  80380. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  80381. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  80382. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  80383. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  80384. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  80385. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  80386. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  80387. CRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  80388. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  80389. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  80390. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  80391. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  80392. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  80393. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  80394. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  80395. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  80396. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  80397. CRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  80398. CRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  80399. CRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  80400. CRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  80401. CRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  80402. CRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  80403. CRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  80404. CRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  80405. CRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  80406. CRTC1_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  80407. CRTC1_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  80408. CRTC1_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  80409. CRTC1_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  80410. CRTC1_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  80411. CRTC1_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  80412. CRTC1_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  80413. CRTC1_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  80414. CRTC1_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  80415. CRTC1_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  80416. CRTC1_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  80417. CRTC1_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  80418. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  80419. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  80420. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  80421. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  80422. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  80423. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  80424. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  80425. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  80426. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  80427. CRTC1_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  80428. CRTC1_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  80429. CRTC1_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  80430. CRTC1_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  80431. CRTC1_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  80432. CRTC1_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  80433. CRTC1_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  80434. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  80435. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  80436. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  80437. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  80438. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  80439. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  80440. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  80441. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  80442. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  80443. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  80444. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  80445. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  80446. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  80447. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  80448. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  80449. CRTC1_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  80450. CRTC1_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  80451. CRTC1_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  80452. CRTC1_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  80453. CRTC1_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  80454. CRTC1_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  80455. CRTC1_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  80456. CRTC1_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  80457. CRTC1_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  80458. CRTC1_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  80459. CRTC1_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  80460. CRTC1_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  80461. CRTC1_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  80462. CRTC1_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  80463. CRTC1_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  80464. CRTC1_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  80465. CRTC1_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  80466. CRTC1_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  80467. CRTC1_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  80468. CRTC1_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  80469. CRTC1_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  80470. CRTC1_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  80471. CRTC1_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  80472. CRTC1_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  80473. CRTC1_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  80474. CRTC1_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  80475. CRTC1_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  80476. CRTC1_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  80477. CRTC1_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  80478. CRTC1_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  80479. CRTC1_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  80480. CRTC1_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  80481. CRTC1_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  80482. CRTC1_CRTC_H_TOTAL__CRTC_H_TOTAL_MASK
  80483. CRTC1_CRTC_H_TOTAL__CRTC_H_TOTAL__SHIFT
  80484. CRTC1_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  80485. CRTC1_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  80486. CRTC1_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  80487. CRTC1_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  80488. CRTC1_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  80489. CRTC1_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  80490. CRTC1_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  80491. CRTC1_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  80492. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  80493. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  80494. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  80495. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  80496. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  80497. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  80498. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  80499. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  80500. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  80501. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  80502. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  80503. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  80504. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  80505. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  80506. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  80507. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  80508. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  80509. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  80510. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  80511. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  80512. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  80513. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  80514. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  80515. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  80516. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  80517. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  80518. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  80519. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  80520. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  80521. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  80522. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  80523. CRTC1_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  80524. CRTC1_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  80525. CRTC1_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  80526. CRTC1_CRTC_MASTER_EN__CRTC_MASTER_EN_MASK
  80527. CRTC1_CRTC_MASTER_EN__CRTC_MASTER_EN__SHIFT
  80528. CRTC1_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  80529. CRTC1_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  80530. CRTC1_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  80531. CRTC1_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  80532. CRTC1_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  80533. CRTC1_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  80534. CRTC1_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  80535. CRTC1_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  80536. CRTC1_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  80537. CRTC1_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  80538. CRTC1_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  80539. CRTC1_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  80540. CRTC1_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  80541. CRTC1_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  80542. CRTC1_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  80543. CRTC1_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  80544. CRTC1_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  80545. CRTC1_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  80546. CRTC1_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  80547. CRTC1_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  80548. CRTC1_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  80549. CRTC1_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  80550. CRTC1_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  80551. CRTC1_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  80552. CRTC1_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  80553. CRTC1_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  80554. CRTC1_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  80555. CRTC1_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  80556. CRTC1_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  80557. CRTC1_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  80558. CRTC1_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  80559. CRTC1_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  80560. CRTC1_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  80561. CRTC1_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  80562. CRTC1_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  80563. CRTC1_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  80564. CRTC1_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  80565. CRTC1_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  80566. CRTC1_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  80567. CRTC1_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  80568. CRTC1_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  80569. CRTC1_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  80570. CRTC1_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  80571. CRTC1_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  80572. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR_MASK
  80573. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR__SHIFT
  80574. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MASK
  80575. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK_MASK
  80576. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK__SHIFT
  80577. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE_MASK
  80578. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE__SHIFT
  80579. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT__SHIFT
  80580. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_MASK
  80581. CRTC1_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED__SHIFT
  80582. CRTC1_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  80583. CRTC1_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  80584. CRTC1_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  80585. CRTC1_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  80586. CRTC1_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  80587. CRTC1_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  80588. CRTC1_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  80589. CRTC1_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  80590. CRTC1_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  80591. CRTC1_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  80592. CRTC1_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  80593. CRTC1_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  80594. CRTC1_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  80595. CRTC1_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  80596. CRTC1_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  80597. CRTC1_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  80598. CRTC1_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  80599. CRTC1_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  80600. CRTC1_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  80601. CRTC1_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  80602. CRTC1_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  80603. CRTC1_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  80604. CRTC1_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  80605. CRTC1_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  80606. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  80607. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  80608. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  80609. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  80610. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  80611. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  80612. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  80613. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  80614. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  80615. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  80616. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  80617. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  80618. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  80619. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  80620. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_MASK
  80621. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE_MASK
  80622. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE__SHIFT
  80623. CRTC1_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE__SHIFT
  80624. CRTC1_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  80625. CRTC1_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  80626. CRTC1_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  80627. CRTC1_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  80628. CRTC1_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  80629. CRTC1_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  80630. CRTC1_CRTC_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  80631. CRTC1_CRTC_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  80632. CRTC1_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  80633. CRTC1_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  80634. CRTC1_CRTC_STATUS__CRTC_H_ACTIVE_DISP_MASK
  80635. CRTC1_CRTC_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  80636. CRTC1_CRTC_STATUS__CRTC_H_BLANK_MASK
  80637. CRTC1_CRTC_STATUS__CRTC_H_BLANK__SHIFT
  80638. CRTC1_CRTC_STATUS__CRTC_H_SYNC_A_MASK
  80639. CRTC1_CRTC_STATUS__CRTC_H_SYNC_A__SHIFT
  80640. CRTC1_CRTC_STATUS__CRTC_V_ACTIVE_DISP_MASK
  80641. CRTC1_CRTC_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  80642. CRTC1_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  80643. CRTC1_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  80644. CRTC1_CRTC_STATUS__CRTC_V_BLANK_MASK
  80645. CRTC1_CRTC_STATUS__CRTC_V_BLANK__SHIFT
  80646. CRTC1_CRTC_STATUS__CRTC_V_START_LINE_MASK
  80647. CRTC1_CRTC_STATUS__CRTC_V_START_LINE__SHIFT
  80648. CRTC1_CRTC_STATUS__CRTC_V_SYNC_A_MASK
  80649. CRTC1_CRTC_STATUS__CRTC_V_SYNC_A__SHIFT
  80650. CRTC1_CRTC_STATUS__CRTC_V_UPDATE_MASK
  80651. CRTC1_CRTC_STATUS__CRTC_V_UPDATE__SHIFT
  80652. CRTC1_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  80653. CRTC1_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  80654. CRTC1_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  80655. CRTC1_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  80656. CRTC1_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  80657. CRTC1_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  80658. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  80659. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  80660. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  80661. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  80662. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  80663. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  80664. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  80665. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  80666. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  80667. CRTC1_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  80668. CRTC1_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  80669. CRTC1_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  80670. CRTC1_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  80671. CRTC1_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  80672. CRTC1_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  80673. CRTC1_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  80674. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  80675. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  80676. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  80677. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  80678. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  80679. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  80680. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  80681. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  80682. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  80683. CRTC1_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  80684. CRTC1_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  80685. CRTC1_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  80686. CRTC1_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  80687. CRTC1_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  80688. CRTC1_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  80689. CRTC1_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  80690. CRTC1_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  80691. CRTC1_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  80692. CRTC1_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  80693. CRTC1_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  80694. CRTC1_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  80695. CRTC1_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  80696. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  80697. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  80698. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  80699. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  80700. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  80701. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  80702. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  80703. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  80704. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  80705. CRTC1_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  80706. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  80707. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  80708. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  80709. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  80710. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  80711. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  80712. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  80713. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  80714. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  80715. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  80716. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  80717. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  80718. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  80719. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  80720. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  80721. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  80722. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  80723. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  80724. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  80725. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  80726. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  80727. CRTC1_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  80728. CRTC1_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  80729. CRTC1_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  80730. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  80731. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  80732. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  80733. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  80734. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  80735. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  80736. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  80737. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  80738. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  80739. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  80740. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  80741. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  80742. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  80743. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  80744. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  80745. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  80746. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  80747. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  80748. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  80749. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  80750. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  80751. CRTC1_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  80752. CRTC1_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  80753. CRTC1_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  80754. CRTC1_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  80755. CRTC1_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  80756. CRTC1_CRTC_VBI_END__CRTC_VBI_H_END_MASK
  80757. CRTC1_CRTC_VBI_END__CRTC_VBI_H_END__SHIFT
  80758. CRTC1_CRTC_VBI_END__CRTC_VBI_V_END_MASK
  80759. CRTC1_CRTC_VBI_END__CRTC_VBI_V_END__SHIFT
  80760. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  80761. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  80762. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  80763. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  80764. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  80765. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  80766. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  80767. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  80768. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  80769. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  80770. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  80771. CRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  80772. CRTC1_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  80773. CRTC1_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  80774. CRTC1_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  80775. CRTC1_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  80776. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  80777. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  80778. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  80779. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  80780. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  80781. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  80782. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  80783. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  80784. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  80785. CRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  80786. CRTC1_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  80787. CRTC1_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  80788. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  80789. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  80790. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  80791. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  80792. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  80793. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  80794. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  80795. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  80796. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  80797. CRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  80798. CRTC1_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  80799. CRTC1_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  80800. CRTC1_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  80801. CRTC1_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  80802. CRTC1_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  80803. CRTC1_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  80804. CRTC1_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  80805. CRTC1_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  80806. CRTC1_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  80807. CRTC1_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  80808. CRTC1_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  80809. CRTC1_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  80810. CRTC1_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  80811. CRTC1_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  80812. CRTC1_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  80813. CRTC1_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  80814. CRTC1_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  80815. CRTC1_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  80816. CRTC1_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  80817. CRTC1_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  80818. CRTC1_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  80819. CRTC1_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  80820. CRTC1_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  80821. CRTC1_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  80822. CRTC1_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  80823. CRTC1_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  80824. CRTC1_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  80825. CRTC1_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  80826. CRTC1_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  80827. CRTC1_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  80828. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  80829. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  80830. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  80831. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  80832. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  80833. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  80834. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  80835. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  80836. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  80837. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  80838. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  80839. CRTC1_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  80840. CRTC1_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  80841. CRTC1_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  80842. CRTC1_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  80843. CRTC1_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  80844. CRTC1_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  80845. CRTC1_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  80846. CRTC1_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  80847. CRTC1_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  80848. CRTC1_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  80849. CRTC1_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  80850. CRTC1_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  80851. CRTC1_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  80852. CRTC1_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  80853. CRTC1_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  80854. CRTC1_CRTC_V_TOTAL__CRTC_V_TOTAL_MASK
  80855. CRTC1_CRTC_V_TOTAL__CRTC_V_TOTAL__SHIFT
  80856. CRTC1_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  80857. CRTC1_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  80858. CRTC1_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  80859. CRTC1_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  80860. CRTC1_PHYPLL_PIXEL_RATE_CNTL__CRTC1_PHYPLL_PIXEL_RATE_SOURCE_MASK
  80861. CRTC1_PHYPLL_PIXEL_RATE_CNTL__CRTC1_PHYPLL_PIXEL_RATE_SOURCE__SHIFT
  80862. CRTC1_PHYPLL_PIXEL_RATE_CNTL__CRTC1_PIXEL_RATE_PLL_SOURCE_MASK
  80863. CRTC1_PHYPLL_PIXEL_RATE_CNTL__CRTC1_PIXEL_RATE_PLL_SOURCE__SHIFT
  80864. CRTC1_PIXEL_RATE_CNTL__CRTC1_ADD_PIXEL_MASK
  80865. CRTC1_PIXEL_RATE_CNTL__CRTC1_ADD_PIXEL__SHIFT
  80866. CRTC1_PIXEL_RATE_CNTL__CRTC1_DISPOUT_ERROR_COUNT_MASK
  80867. CRTC1_PIXEL_RATE_CNTL__CRTC1_DISPOUT_ERROR_COUNT__SHIFT
  80868. CRTC1_PIXEL_RATE_CNTL__CRTC1_DISPOUT_FIFO_ERROR_MASK
  80869. CRTC1_PIXEL_RATE_CNTL__CRTC1_DISPOUT_FIFO_ERROR__SHIFT
  80870. CRTC1_PIXEL_RATE_CNTL__CRTC1_DISPOUT_HALF_RATE_EN_MASK
  80871. CRTC1_PIXEL_RATE_CNTL__CRTC1_DISPOUT_HALF_RATE_EN__SHIFT
  80872. CRTC1_PIXEL_RATE_CNTL__CRTC1_DROP_PIXEL_MASK
  80873. CRTC1_PIXEL_RATE_CNTL__CRTC1_DROP_PIXEL__SHIFT
  80874. CRTC1_PIXEL_RATE_CNTL__CRTC1_PIXEL_RATE_SOURCE_MASK
  80875. CRTC1_PIXEL_RATE_CNTL__CRTC1_PIXEL_RATE_SOURCE__SHIFT
  80876. CRTC1_PIXEL_RATE_CNTL__DP_DTO1_DS_DISABLE_MASK
  80877. CRTC1_PIXEL_RATE_CNTL__DP_DTO1_DS_DISABLE__SHIFT
  80878. CRTC1_PIXEL_RATE_CNTL__DP_DTO1_ENABLE_MASK
  80879. CRTC1_PIXEL_RATE_CNTL__DP_DTO1_ENABLE__SHIFT
  80880. CRTC1_REGISTER_OFFSET
  80881. CRTC2_CRNT_FRAME
  80882. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  80883. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  80884. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  80885. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  80886. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  80887. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  80888. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  80889. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  80890. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  80891. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  80892. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  80893. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  80894. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  80895. CRTC2_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  80896. CRTC2_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  80897. CRTC2_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  80898. CRTC2_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  80899. CRTC2_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  80900. CRTC2_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  80901. CRTC2_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  80902. CRTC2_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  80903. CRTC2_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  80904. CRTC2_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  80905. CRTC2_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  80906. CRTC2_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  80907. CRTC2_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  80908. CRTC2_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  80909. CRTC2_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  80910. CRTC2_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  80911. CRTC2_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  80912. CRTC2_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  80913. CRTC2_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  80914. CRTC2_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  80915. CRTC2_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  80916. CRTC2_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  80917. CRTC2_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  80918. CRTC2_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  80919. CRTC2_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  80920. CRTC2_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  80921. CRTC2_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  80922. CRTC2_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  80923. CRTC2_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  80924. CRTC2_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  80925. CRTC2_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  80926. CRTC2_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  80927. CRTC2_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  80928. CRTC2_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  80929. CRTC2_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  80930. CRTC2_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  80931. CRTC2_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  80932. CRTC2_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  80933. CRTC2_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  80934. CRTC2_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  80935. CRTC2_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  80936. CRTC2_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  80937. CRTC2_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  80938. CRTC2_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  80939. CRTC2_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  80940. CRTC2_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  80941. CRTC2_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  80942. CRTC2_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  80943. CRTC2_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  80944. CRTC2_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  80945. CRTC2_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  80946. CRTC2_CRTC_CONTROL__CRTC_MASTER_EN_MASK
  80947. CRTC2_CRTC_CONTROL__CRTC_MASTER_EN__SHIFT
  80948. CRTC2_CRTC_CONTROL__CRTC_SOF_PULL_EN_MASK
  80949. CRTC2_CRTC_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  80950. CRTC2_CRTC_CONTROL__CRTC_START_POINT_CNTL_MASK
  80951. CRTC2_CRTC_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  80952. CRTC2_CRTC_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  80953. CRTC2_CRTC_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  80954. CRTC2_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  80955. CRTC2_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  80956. CRTC2_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  80957. CRTC2_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  80958. CRTC2_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  80959. CRTC2_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  80960. CRTC2_CRTC_CRC0_DATA_B__CRC0_B_CB_MASK
  80961. CRTC2_CRTC_CRC0_DATA_B__CRC0_B_CB__SHIFT
  80962. CRTC2_CRTC_CRC0_DATA_RG__CRC0_G_Y_MASK
  80963. CRTC2_CRTC_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  80964. CRTC2_CRTC_CRC0_DATA_RG__CRC0_R_CR_MASK
  80965. CRTC2_CRTC_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  80966. CRTC2_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  80967. CRTC2_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  80968. CRTC2_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  80969. CRTC2_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  80970. CRTC2_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  80971. CRTC2_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  80972. CRTC2_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  80973. CRTC2_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  80974. CRTC2_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  80975. CRTC2_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  80976. CRTC2_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  80977. CRTC2_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  80978. CRTC2_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  80979. CRTC2_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  80980. CRTC2_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  80981. CRTC2_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  80982. CRTC2_CRTC_CRC1_DATA_B__CRC1_B_CB_MASK
  80983. CRTC2_CRTC_CRC1_DATA_B__CRC1_B_CB__SHIFT
  80984. CRTC2_CRTC_CRC1_DATA_RG__CRC1_G_Y_MASK
  80985. CRTC2_CRTC_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  80986. CRTC2_CRTC_CRC1_DATA_RG__CRC1_R_CR_MASK
  80987. CRTC2_CRTC_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  80988. CRTC2_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  80989. CRTC2_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  80990. CRTC2_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  80991. CRTC2_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  80992. CRTC2_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  80993. CRTC2_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  80994. CRTC2_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  80995. CRTC2_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  80996. CRTC2_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  80997. CRTC2_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  80998. CRTC2_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  80999. CRTC2_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  81000. CRTC2_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  81001. CRTC2_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  81002. CRTC2_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  81003. CRTC2_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  81004. CRTC2_CRTC_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  81005. CRTC2_CRTC_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  81006. CRTC2_CRTC_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  81007. CRTC2_CRTC_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  81008. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  81009. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  81010. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_EN_MASK
  81011. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_EN__SHIFT
  81012. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  81013. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  81014. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  81015. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  81016. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  81017. CRTC2_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  81018. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  81019. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  81020. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_MASK
  81021. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE__SHIFT
  81022. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING_MASK
  81023. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING__SHIFT
  81024. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  81025. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  81026. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  81027. CRTC2_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  81028. CRTC2_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE_MASK
  81029. CRTC2_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE__SHIFT
  81030. CRTC2_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS_MASK
  81031. CRTC2_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS__SHIFT
  81032. CRTC2_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR_MASK
  81033. CRTC2_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR__SHIFT
  81034. CRTC2_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY_MASK
  81035. CRTC2_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY__SHIFT
  81036. CRTC2_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  81037. CRTC2_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  81038. CRTC2_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  81039. CRTC2_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  81040. CRTC2_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  81041. CRTC2_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  81042. CRTC2_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  81043. CRTC2_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  81044. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  81045. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  81046. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  81047. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  81048. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  81049. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  81050. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  81051. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  81052. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  81053. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  81054. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  81055. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  81056. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  81057. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  81058. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  81059. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  81060. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  81061. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  81062. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  81063. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  81064. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  81065. CRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  81066. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  81067. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  81068. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  81069. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  81070. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  81071. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  81072. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  81073. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  81074. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  81075. CRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  81076. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  81077. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  81078. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  81079. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  81080. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  81081. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  81082. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  81083. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  81084. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  81085. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  81086. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  81087. CRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  81088. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  81089. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  81090. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  81091. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  81092. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  81093. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  81094. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  81095. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  81096. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  81097. CRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  81098. CRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  81099. CRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  81100. CRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  81101. CRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  81102. CRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  81103. CRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  81104. CRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  81105. CRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  81106. CRTC2_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  81107. CRTC2_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  81108. CRTC2_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  81109. CRTC2_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  81110. CRTC2_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  81111. CRTC2_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  81112. CRTC2_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  81113. CRTC2_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  81114. CRTC2_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  81115. CRTC2_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  81116. CRTC2_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  81117. CRTC2_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  81118. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  81119. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  81120. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  81121. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  81122. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  81123. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  81124. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  81125. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  81126. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  81127. CRTC2_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  81128. CRTC2_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  81129. CRTC2_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  81130. CRTC2_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  81131. CRTC2_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  81132. CRTC2_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  81133. CRTC2_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  81134. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  81135. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  81136. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  81137. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  81138. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  81139. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  81140. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  81141. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  81142. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  81143. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  81144. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  81145. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  81146. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  81147. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  81148. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  81149. CRTC2_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  81150. CRTC2_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  81151. CRTC2_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  81152. CRTC2_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  81153. CRTC2_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  81154. CRTC2_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  81155. CRTC2_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  81156. CRTC2_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  81157. CRTC2_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  81158. CRTC2_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  81159. CRTC2_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  81160. CRTC2_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  81161. CRTC2_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  81162. CRTC2_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  81163. CRTC2_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  81164. CRTC2_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  81165. CRTC2_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  81166. CRTC2_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  81167. CRTC2_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  81168. CRTC2_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  81169. CRTC2_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  81170. CRTC2_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  81171. CRTC2_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  81172. CRTC2_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  81173. CRTC2_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  81174. CRTC2_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  81175. CRTC2_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  81176. CRTC2_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  81177. CRTC2_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  81178. CRTC2_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  81179. CRTC2_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  81180. CRTC2_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  81181. CRTC2_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  81182. CRTC2_CRTC_H_TOTAL__CRTC_H_TOTAL_MASK
  81183. CRTC2_CRTC_H_TOTAL__CRTC_H_TOTAL__SHIFT
  81184. CRTC2_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  81185. CRTC2_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  81186. CRTC2_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  81187. CRTC2_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  81188. CRTC2_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  81189. CRTC2_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  81190. CRTC2_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  81191. CRTC2_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  81192. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  81193. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  81194. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  81195. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  81196. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  81197. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  81198. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  81199. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  81200. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  81201. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  81202. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  81203. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  81204. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  81205. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  81206. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  81207. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  81208. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  81209. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  81210. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  81211. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  81212. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  81213. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  81214. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  81215. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  81216. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  81217. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  81218. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  81219. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  81220. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  81221. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  81222. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  81223. CRTC2_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  81224. CRTC2_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  81225. CRTC2_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  81226. CRTC2_CRTC_MASTER_EN__CRTC_MASTER_EN_MASK
  81227. CRTC2_CRTC_MASTER_EN__CRTC_MASTER_EN__SHIFT
  81228. CRTC2_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  81229. CRTC2_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  81230. CRTC2_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  81231. CRTC2_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  81232. CRTC2_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  81233. CRTC2_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  81234. CRTC2_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  81235. CRTC2_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  81236. CRTC2_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  81237. CRTC2_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  81238. CRTC2_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  81239. CRTC2_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  81240. CRTC2_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  81241. CRTC2_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  81242. CRTC2_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  81243. CRTC2_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  81244. CRTC2_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  81245. CRTC2_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  81246. CRTC2_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  81247. CRTC2_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  81248. CRTC2_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  81249. CRTC2_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  81250. CRTC2_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  81251. CRTC2_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  81252. CRTC2_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  81253. CRTC2_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  81254. CRTC2_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  81255. CRTC2_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  81256. CRTC2_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  81257. CRTC2_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  81258. CRTC2_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  81259. CRTC2_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  81260. CRTC2_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  81261. CRTC2_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  81262. CRTC2_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  81263. CRTC2_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  81264. CRTC2_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  81265. CRTC2_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  81266. CRTC2_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  81267. CRTC2_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  81268. CRTC2_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  81269. CRTC2_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  81270. CRTC2_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  81271. CRTC2_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  81272. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR_MASK
  81273. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR__SHIFT
  81274. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MASK
  81275. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK_MASK
  81276. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK__SHIFT
  81277. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE_MASK
  81278. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE__SHIFT
  81279. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT__SHIFT
  81280. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_MASK
  81281. CRTC2_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED__SHIFT
  81282. CRTC2_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  81283. CRTC2_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  81284. CRTC2_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  81285. CRTC2_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  81286. CRTC2_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  81287. CRTC2_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  81288. CRTC2_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  81289. CRTC2_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  81290. CRTC2_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  81291. CRTC2_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  81292. CRTC2_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  81293. CRTC2_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  81294. CRTC2_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  81295. CRTC2_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  81296. CRTC2_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  81297. CRTC2_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  81298. CRTC2_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  81299. CRTC2_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  81300. CRTC2_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  81301. CRTC2_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  81302. CRTC2_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  81303. CRTC2_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  81304. CRTC2_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  81305. CRTC2_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  81306. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  81307. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  81308. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  81309. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  81310. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  81311. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  81312. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  81313. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  81314. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  81315. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  81316. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  81317. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  81318. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  81319. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  81320. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_MASK
  81321. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE_MASK
  81322. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE__SHIFT
  81323. CRTC2_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE__SHIFT
  81324. CRTC2_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  81325. CRTC2_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  81326. CRTC2_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  81327. CRTC2_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  81328. CRTC2_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  81329. CRTC2_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  81330. CRTC2_CRTC_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  81331. CRTC2_CRTC_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  81332. CRTC2_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  81333. CRTC2_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  81334. CRTC2_CRTC_STATUS__CRTC_H_ACTIVE_DISP_MASK
  81335. CRTC2_CRTC_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  81336. CRTC2_CRTC_STATUS__CRTC_H_BLANK_MASK
  81337. CRTC2_CRTC_STATUS__CRTC_H_BLANK__SHIFT
  81338. CRTC2_CRTC_STATUS__CRTC_H_SYNC_A_MASK
  81339. CRTC2_CRTC_STATUS__CRTC_H_SYNC_A__SHIFT
  81340. CRTC2_CRTC_STATUS__CRTC_V_ACTIVE_DISP_MASK
  81341. CRTC2_CRTC_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  81342. CRTC2_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  81343. CRTC2_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  81344. CRTC2_CRTC_STATUS__CRTC_V_BLANK_MASK
  81345. CRTC2_CRTC_STATUS__CRTC_V_BLANK__SHIFT
  81346. CRTC2_CRTC_STATUS__CRTC_V_START_LINE_MASK
  81347. CRTC2_CRTC_STATUS__CRTC_V_START_LINE__SHIFT
  81348. CRTC2_CRTC_STATUS__CRTC_V_SYNC_A_MASK
  81349. CRTC2_CRTC_STATUS__CRTC_V_SYNC_A__SHIFT
  81350. CRTC2_CRTC_STATUS__CRTC_V_UPDATE_MASK
  81351. CRTC2_CRTC_STATUS__CRTC_V_UPDATE__SHIFT
  81352. CRTC2_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  81353. CRTC2_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  81354. CRTC2_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  81355. CRTC2_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  81356. CRTC2_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  81357. CRTC2_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  81358. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  81359. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  81360. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  81361. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  81362. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  81363. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  81364. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  81365. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  81366. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  81367. CRTC2_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  81368. CRTC2_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  81369. CRTC2_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  81370. CRTC2_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  81371. CRTC2_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  81372. CRTC2_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  81373. CRTC2_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  81374. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  81375. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  81376. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  81377. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  81378. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  81379. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  81380. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  81381. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  81382. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  81383. CRTC2_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  81384. CRTC2_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  81385. CRTC2_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  81386. CRTC2_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  81387. CRTC2_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  81388. CRTC2_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  81389. CRTC2_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  81390. CRTC2_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  81391. CRTC2_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  81392. CRTC2_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  81393. CRTC2_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  81394. CRTC2_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  81395. CRTC2_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  81396. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  81397. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  81398. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  81399. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  81400. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  81401. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  81402. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  81403. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  81404. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  81405. CRTC2_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  81406. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  81407. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  81408. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  81409. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  81410. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  81411. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  81412. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  81413. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  81414. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  81415. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  81416. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  81417. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  81418. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  81419. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  81420. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  81421. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  81422. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  81423. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  81424. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  81425. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  81426. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  81427. CRTC2_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  81428. CRTC2_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  81429. CRTC2_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  81430. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  81431. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  81432. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  81433. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  81434. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  81435. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  81436. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  81437. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  81438. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  81439. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  81440. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  81441. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  81442. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  81443. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  81444. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  81445. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  81446. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  81447. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  81448. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  81449. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  81450. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  81451. CRTC2_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  81452. CRTC2_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  81453. CRTC2_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  81454. CRTC2_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  81455. CRTC2_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  81456. CRTC2_CRTC_VBI_END__CRTC_VBI_H_END_MASK
  81457. CRTC2_CRTC_VBI_END__CRTC_VBI_H_END__SHIFT
  81458. CRTC2_CRTC_VBI_END__CRTC_VBI_V_END_MASK
  81459. CRTC2_CRTC_VBI_END__CRTC_VBI_V_END__SHIFT
  81460. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  81461. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  81462. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  81463. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  81464. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  81465. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  81466. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  81467. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  81468. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  81469. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  81470. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  81471. CRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  81472. CRTC2_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  81473. CRTC2_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  81474. CRTC2_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  81475. CRTC2_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  81476. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  81477. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  81478. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  81479. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  81480. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  81481. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  81482. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  81483. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  81484. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  81485. CRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  81486. CRTC2_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  81487. CRTC2_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  81488. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  81489. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  81490. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  81491. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  81492. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  81493. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  81494. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  81495. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  81496. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  81497. CRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  81498. CRTC2_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  81499. CRTC2_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  81500. CRTC2_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  81501. CRTC2_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  81502. CRTC2_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  81503. CRTC2_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  81504. CRTC2_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  81505. CRTC2_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  81506. CRTC2_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  81507. CRTC2_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  81508. CRTC2_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  81509. CRTC2_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  81510. CRTC2_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  81511. CRTC2_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  81512. CRTC2_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  81513. CRTC2_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  81514. CRTC2_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  81515. CRTC2_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  81516. CRTC2_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  81517. CRTC2_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  81518. CRTC2_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  81519. CRTC2_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  81520. CRTC2_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  81521. CRTC2_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  81522. CRTC2_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  81523. CRTC2_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  81524. CRTC2_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  81525. CRTC2_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  81526. CRTC2_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  81527. CRTC2_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  81528. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  81529. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  81530. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  81531. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  81532. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  81533. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  81534. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  81535. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  81536. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  81537. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  81538. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  81539. CRTC2_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  81540. CRTC2_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  81541. CRTC2_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  81542. CRTC2_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  81543. CRTC2_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  81544. CRTC2_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  81545. CRTC2_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  81546. CRTC2_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  81547. CRTC2_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  81548. CRTC2_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  81549. CRTC2_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  81550. CRTC2_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  81551. CRTC2_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  81552. CRTC2_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  81553. CRTC2_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  81554. CRTC2_CRTC_V_TOTAL__CRTC_V_TOTAL_MASK
  81555. CRTC2_CRTC_V_TOTAL__CRTC_V_TOTAL__SHIFT
  81556. CRTC2_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  81557. CRTC2_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  81558. CRTC2_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  81559. CRTC2_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  81560. CRTC2_CUR_EN
  81561. CRTC2_DBL_SCAN_EN
  81562. CRTC2_DISPLAY_BASE_ADDR
  81563. CRTC2_DISPLAY_DIS
  81564. CRTC2_DISP_REQ_EN_B
  81565. CRTC2_EN
  81566. CRTC2_FIFO_EXTSENSE
  81567. CRTC2_GEN_CNTL
  81568. CRTC2_GEN_CNTL__CRT2_ON
  81569. CRTC2_GEN_CNTL__CRT2_ON_MASK
  81570. CRTC2_GEN_CNTL__CRTC2_CUR_EN
  81571. CRTC2_GEN_CNTL__CRTC2_CUR_EN_MASK
  81572. CRTC2_GEN_CNTL__CRTC2_CUR_MODE_MASK
  81573. CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN
  81574. CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN_MASK
  81575. CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN
  81576. CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN_MASK
  81577. CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS
  81578. CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS_MASK
  81579. CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B
  81580. CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B_MASK
  81581. CRTC2_GEN_CNTL__CRTC2_EN
  81582. CRTC2_GEN_CNTL__CRTC2_EN_MASK
  81583. CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS
  81584. CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS_MASK
  81585. CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE
  81586. CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE_MASK
  81587. CRTC2_GEN_CNTL__CRTC2_ICON_EN
  81588. CRTC2_GEN_CNTL__CRTC2_ICON_EN_MASK
  81589. CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN
  81590. CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN_MASK
  81591. CRTC2_GEN_CNTL__CRTC2_PIX_WIDTH_MASK
  81592. CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE
  81593. CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE_MASK
  81594. CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS
  81595. CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS_MASK
  81596. CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE
  81597. CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE_MASK
  81598. CRTC2_GUI_TRIG_VLINE
  81599. CRTC2_H_SYNC_DLY
  81600. CRTC2_H_SYNC_STRT
  81601. CRTC2_H_SYNC_STRT_WID
  81602. CRTC2_H_SYNC_WID
  81603. CRTC2_H_TOTAL_DISP
  81604. CRTC2_ICON_EN
  81605. CRTC2_OFFSET
  81606. CRTC2_OFFSET_CNTL
  81607. CRTC2_OFF_PITCH
  81608. CRTC2_PHYPLL_PIXEL_RATE_CNTL__CRTC2_PHYPLL_PIXEL_RATE_SOURCE_MASK
  81609. CRTC2_PHYPLL_PIXEL_RATE_CNTL__CRTC2_PHYPLL_PIXEL_RATE_SOURCE__SHIFT
  81610. CRTC2_PHYPLL_PIXEL_RATE_CNTL__CRTC2_PIXEL_RATE_PLL_SOURCE_MASK
  81611. CRTC2_PHYPLL_PIXEL_RATE_CNTL__CRTC2_PIXEL_RATE_PLL_SOURCE__SHIFT
  81612. CRTC2_PITCH
  81613. CRTC2_PIXEL_RATE_CNTL__CRTC2_ADD_PIXEL_MASK
  81614. CRTC2_PIXEL_RATE_CNTL__CRTC2_ADD_PIXEL__SHIFT
  81615. CRTC2_PIXEL_RATE_CNTL__CRTC2_DISPOUT_ERROR_COUNT_MASK
  81616. CRTC2_PIXEL_RATE_CNTL__CRTC2_DISPOUT_ERROR_COUNT__SHIFT
  81617. CRTC2_PIXEL_RATE_CNTL__CRTC2_DISPOUT_FIFO_ERROR_MASK
  81618. CRTC2_PIXEL_RATE_CNTL__CRTC2_DISPOUT_FIFO_ERROR__SHIFT
  81619. CRTC2_PIXEL_RATE_CNTL__CRTC2_DISPOUT_HALF_RATE_EN_MASK
  81620. CRTC2_PIXEL_RATE_CNTL__CRTC2_DISPOUT_HALF_RATE_EN__SHIFT
  81621. CRTC2_PIXEL_RATE_CNTL__CRTC2_DROP_PIXEL_MASK
  81622. CRTC2_PIXEL_RATE_CNTL__CRTC2_DROP_PIXEL__SHIFT
  81623. CRTC2_PIXEL_RATE_CNTL__CRTC2_PIXEL_RATE_SOURCE_MASK
  81624. CRTC2_PIXEL_RATE_CNTL__CRTC2_PIXEL_RATE_SOURCE__SHIFT
  81625. CRTC2_PIXEL_RATE_CNTL__DP_DTO2_DS_DISABLE_MASK
  81626. CRTC2_PIXEL_RATE_CNTL__DP_DTO2_DS_DISABLE__SHIFT
  81627. CRTC2_PIXEL_RATE_CNTL__DP_DTO2_ENABLE_MASK
  81628. CRTC2_PIXEL_RATE_CNTL__DP_DTO2_ENABLE__SHIFT
  81629. CRTC2_PIX_WIDTH
  81630. CRTC2_REGISTER_OFFSET
  81631. CRTC2_STATUS
  81632. CRTC2_VBLANK
  81633. CRTC2_VBLANK_INT
  81634. CRTC2_VBLANK_INT_AK
  81635. CRTC2_VBLANK_INT_EN
  81636. CRTC2_VLINE_CRNT_VLINE
  81637. CRTC2_VLINE_INT
  81638. CRTC2_VLINE_INT_AK
  81639. CRTC2_VLINE_INT_EN
  81640. CRTC2_VLINE_SYNC
  81641. CRTC2_VSYNC_INT
  81642. CRTC2_VSYNC_INT_EN
  81643. CRTC2_V_DISP
  81644. CRTC2_V_SYNC_STRT
  81645. CRTC2_V_SYNC_STRT_WID
  81646. CRTC2_V_SYNC_WID
  81647. CRTC2_V_TOTAL
  81648. CRTC2_V_TOTAL_DISP
  81649. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  81650. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  81651. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  81652. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  81653. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  81654. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  81655. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  81656. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  81657. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  81658. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  81659. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  81660. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  81661. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  81662. CRTC3_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  81663. CRTC3_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  81664. CRTC3_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  81665. CRTC3_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  81666. CRTC3_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  81667. CRTC3_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  81668. CRTC3_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  81669. CRTC3_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  81670. CRTC3_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  81671. CRTC3_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  81672. CRTC3_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  81673. CRTC3_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  81674. CRTC3_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  81675. CRTC3_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  81676. CRTC3_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  81677. CRTC3_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  81678. CRTC3_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  81679. CRTC3_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  81680. CRTC3_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  81681. CRTC3_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  81682. CRTC3_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  81683. CRTC3_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  81684. CRTC3_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  81685. CRTC3_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  81686. CRTC3_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  81687. CRTC3_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  81688. CRTC3_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  81689. CRTC3_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  81690. CRTC3_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  81691. CRTC3_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  81692. CRTC3_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  81693. CRTC3_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  81694. CRTC3_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  81695. CRTC3_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  81696. CRTC3_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  81697. CRTC3_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  81698. CRTC3_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  81699. CRTC3_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  81700. CRTC3_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  81701. CRTC3_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  81702. CRTC3_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  81703. CRTC3_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  81704. CRTC3_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  81705. CRTC3_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  81706. CRTC3_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  81707. CRTC3_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  81708. CRTC3_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  81709. CRTC3_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  81710. CRTC3_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  81711. CRTC3_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  81712. CRTC3_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  81713. CRTC3_CRTC_CONTROL__CRTC_MASTER_EN_MASK
  81714. CRTC3_CRTC_CONTROL__CRTC_MASTER_EN__SHIFT
  81715. CRTC3_CRTC_CONTROL__CRTC_SOF_PULL_EN_MASK
  81716. CRTC3_CRTC_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  81717. CRTC3_CRTC_CONTROL__CRTC_START_POINT_CNTL_MASK
  81718. CRTC3_CRTC_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  81719. CRTC3_CRTC_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  81720. CRTC3_CRTC_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  81721. CRTC3_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  81722. CRTC3_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  81723. CRTC3_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  81724. CRTC3_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  81725. CRTC3_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  81726. CRTC3_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  81727. CRTC3_CRTC_CRC0_DATA_B__CRC0_B_CB_MASK
  81728. CRTC3_CRTC_CRC0_DATA_B__CRC0_B_CB__SHIFT
  81729. CRTC3_CRTC_CRC0_DATA_RG__CRC0_G_Y_MASK
  81730. CRTC3_CRTC_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  81731. CRTC3_CRTC_CRC0_DATA_RG__CRC0_R_CR_MASK
  81732. CRTC3_CRTC_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  81733. CRTC3_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  81734. CRTC3_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  81735. CRTC3_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  81736. CRTC3_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  81737. CRTC3_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  81738. CRTC3_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  81739. CRTC3_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  81740. CRTC3_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  81741. CRTC3_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  81742. CRTC3_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  81743. CRTC3_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  81744. CRTC3_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  81745. CRTC3_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  81746. CRTC3_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  81747. CRTC3_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  81748. CRTC3_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  81749. CRTC3_CRTC_CRC1_DATA_B__CRC1_B_CB_MASK
  81750. CRTC3_CRTC_CRC1_DATA_B__CRC1_B_CB__SHIFT
  81751. CRTC3_CRTC_CRC1_DATA_RG__CRC1_G_Y_MASK
  81752. CRTC3_CRTC_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  81753. CRTC3_CRTC_CRC1_DATA_RG__CRC1_R_CR_MASK
  81754. CRTC3_CRTC_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  81755. CRTC3_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  81756. CRTC3_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  81757. CRTC3_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  81758. CRTC3_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  81759. CRTC3_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  81760. CRTC3_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  81761. CRTC3_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  81762. CRTC3_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  81763. CRTC3_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  81764. CRTC3_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  81765. CRTC3_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  81766. CRTC3_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  81767. CRTC3_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  81768. CRTC3_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  81769. CRTC3_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  81770. CRTC3_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  81771. CRTC3_CRTC_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  81772. CRTC3_CRTC_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  81773. CRTC3_CRTC_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  81774. CRTC3_CRTC_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  81775. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  81776. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  81777. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_EN_MASK
  81778. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_EN__SHIFT
  81779. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  81780. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  81781. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  81782. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  81783. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  81784. CRTC3_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  81785. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  81786. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  81787. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_MASK
  81788. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE__SHIFT
  81789. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING_MASK
  81790. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING__SHIFT
  81791. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  81792. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  81793. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  81794. CRTC3_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  81795. CRTC3_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE_MASK
  81796. CRTC3_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE__SHIFT
  81797. CRTC3_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS_MASK
  81798. CRTC3_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS__SHIFT
  81799. CRTC3_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR_MASK
  81800. CRTC3_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR__SHIFT
  81801. CRTC3_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY_MASK
  81802. CRTC3_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY__SHIFT
  81803. CRTC3_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  81804. CRTC3_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  81805. CRTC3_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  81806. CRTC3_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  81807. CRTC3_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  81808. CRTC3_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  81809. CRTC3_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  81810. CRTC3_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  81811. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  81812. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  81813. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  81814. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  81815. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  81816. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  81817. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  81818. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  81819. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  81820. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  81821. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  81822. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  81823. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  81824. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  81825. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  81826. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  81827. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  81828. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  81829. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  81830. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  81831. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  81832. CRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  81833. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  81834. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  81835. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  81836. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  81837. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  81838. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  81839. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  81840. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  81841. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  81842. CRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  81843. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  81844. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  81845. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  81846. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  81847. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  81848. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  81849. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  81850. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  81851. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  81852. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  81853. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  81854. CRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  81855. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  81856. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  81857. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  81858. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  81859. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  81860. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  81861. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  81862. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  81863. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  81864. CRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  81865. CRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  81866. CRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  81867. CRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  81868. CRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  81869. CRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  81870. CRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  81871. CRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  81872. CRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  81873. CRTC3_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  81874. CRTC3_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  81875. CRTC3_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  81876. CRTC3_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  81877. CRTC3_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  81878. CRTC3_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  81879. CRTC3_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  81880. CRTC3_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  81881. CRTC3_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  81882. CRTC3_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  81883. CRTC3_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  81884. CRTC3_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  81885. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  81886. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  81887. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  81888. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  81889. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  81890. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  81891. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  81892. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  81893. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  81894. CRTC3_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  81895. CRTC3_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  81896. CRTC3_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  81897. CRTC3_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  81898. CRTC3_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  81899. CRTC3_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  81900. CRTC3_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  81901. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  81902. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  81903. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  81904. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  81905. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  81906. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  81907. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  81908. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  81909. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  81910. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  81911. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  81912. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  81913. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  81914. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  81915. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  81916. CRTC3_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  81917. CRTC3_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  81918. CRTC3_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  81919. CRTC3_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  81920. CRTC3_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  81921. CRTC3_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  81922. CRTC3_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  81923. CRTC3_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  81924. CRTC3_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  81925. CRTC3_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  81926. CRTC3_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  81927. CRTC3_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  81928. CRTC3_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  81929. CRTC3_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  81930. CRTC3_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  81931. CRTC3_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  81932. CRTC3_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  81933. CRTC3_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  81934. CRTC3_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  81935. CRTC3_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  81936. CRTC3_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  81937. CRTC3_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  81938. CRTC3_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  81939. CRTC3_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  81940. CRTC3_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  81941. CRTC3_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  81942. CRTC3_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  81943. CRTC3_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  81944. CRTC3_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  81945. CRTC3_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  81946. CRTC3_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  81947. CRTC3_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  81948. CRTC3_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  81949. CRTC3_CRTC_H_TOTAL__CRTC_H_TOTAL_MASK
  81950. CRTC3_CRTC_H_TOTAL__CRTC_H_TOTAL__SHIFT
  81951. CRTC3_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  81952. CRTC3_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  81953. CRTC3_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  81954. CRTC3_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  81955. CRTC3_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  81956. CRTC3_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  81957. CRTC3_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  81958. CRTC3_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  81959. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  81960. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  81961. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  81962. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  81963. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  81964. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  81965. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  81966. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  81967. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  81968. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  81969. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  81970. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  81971. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  81972. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  81973. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  81974. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  81975. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  81976. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  81977. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  81978. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  81979. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  81980. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  81981. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  81982. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  81983. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  81984. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  81985. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  81986. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  81987. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  81988. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  81989. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  81990. CRTC3_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  81991. CRTC3_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  81992. CRTC3_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  81993. CRTC3_CRTC_MASTER_EN__CRTC_MASTER_EN_MASK
  81994. CRTC3_CRTC_MASTER_EN__CRTC_MASTER_EN__SHIFT
  81995. CRTC3_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  81996. CRTC3_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  81997. CRTC3_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  81998. CRTC3_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  81999. CRTC3_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  82000. CRTC3_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  82001. CRTC3_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  82002. CRTC3_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  82003. CRTC3_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  82004. CRTC3_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  82005. CRTC3_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  82006. CRTC3_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  82007. CRTC3_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  82008. CRTC3_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  82009. CRTC3_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  82010. CRTC3_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  82011. CRTC3_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  82012. CRTC3_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  82013. CRTC3_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  82014. CRTC3_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  82015. CRTC3_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  82016. CRTC3_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  82017. CRTC3_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  82018. CRTC3_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  82019. CRTC3_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  82020. CRTC3_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  82021. CRTC3_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  82022. CRTC3_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  82023. CRTC3_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  82024. CRTC3_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  82025. CRTC3_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  82026. CRTC3_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  82027. CRTC3_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  82028. CRTC3_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  82029. CRTC3_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  82030. CRTC3_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  82031. CRTC3_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  82032. CRTC3_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  82033. CRTC3_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  82034. CRTC3_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  82035. CRTC3_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  82036. CRTC3_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  82037. CRTC3_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  82038. CRTC3_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  82039. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR_MASK
  82040. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR__SHIFT
  82041. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MASK
  82042. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK_MASK
  82043. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK__SHIFT
  82044. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE_MASK
  82045. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE__SHIFT
  82046. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT__SHIFT
  82047. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_MASK
  82048. CRTC3_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED__SHIFT
  82049. CRTC3_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  82050. CRTC3_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  82051. CRTC3_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  82052. CRTC3_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  82053. CRTC3_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  82054. CRTC3_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  82055. CRTC3_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  82056. CRTC3_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  82057. CRTC3_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  82058. CRTC3_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  82059. CRTC3_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  82060. CRTC3_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  82061. CRTC3_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  82062. CRTC3_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  82063. CRTC3_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  82064. CRTC3_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  82065. CRTC3_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  82066. CRTC3_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  82067. CRTC3_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  82068. CRTC3_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  82069. CRTC3_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  82070. CRTC3_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  82071. CRTC3_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  82072. CRTC3_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  82073. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  82074. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  82075. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  82076. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  82077. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  82078. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  82079. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  82080. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  82081. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  82082. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  82083. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  82084. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  82085. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  82086. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  82087. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_MASK
  82088. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE_MASK
  82089. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE__SHIFT
  82090. CRTC3_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE__SHIFT
  82091. CRTC3_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  82092. CRTC3_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  82093. CRTC3_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  82094. CRTC3_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  82095. CRTC3_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  82096. CRTC3_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  82097. CRTC3_CRTC_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  82098. CRTC3_CRTC_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  82099. CRTC3_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  82100. CRTC3_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  82101. CRTC3_CRTC_STATUS__CRTC_H_ACTIVE_DISP_MASK
  82102. CRTC3_CRTC_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  82103. CRTC3_CRTC_STATUS__CRTC_H_BLANK_MASK
  82104. CRTC3_CRTC_STATUS__CRTC_H_BLANK__SHIFT
  82105. CRTC3_CRTC_STATUS__CRTC_H_SYNC_A_MASK
  82106. CRTC3_CRTC_STATUS__CRTC_H_SYNC_A__SHIFT
  82107. CRTC3_CRTC_STATUS__CRTC_V_ACTIVE_DISP_MASK
  82108. CRTC3_CRTC_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  82109. CRTC3_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  82110. CRTC3_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  82111. CRTC3_CRTC_STATUS__CRTC_V_BLANK_MASK
  82112. CRTC3_CRTC_STATUS__CRTC_V_BLANK__SHIFT
  82113. CRTC3_CRTC_STATUS__CRTC_V_START_LINE_MASK
  82114. CRTC3_CRTC_STATUS__CRTC_V_START_LINE__SHIFT
  82115. CRTC3_CRTC_STATUS__CRTC_V_SYNC_A_MASK
  82116. CRTC3_CRTC_STATUS__CRTC_V_SYNC_A__SHIFT
  82117. CRTC3_CRTC_STATUS__CRTC_V_UPDATE_MASK
  82118. CRTC3_CRTC_STATUS__CRTC_V_UPDATE__SHIFT
  82119. CRTC3_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  82120. CRTC3_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  82121. CRTC3_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  82122. CRTC3_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  82123. CRTC3_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  82124. CRTC3_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  82125. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  82126. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  82127. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  82128. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  82129. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  82130. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  82131. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  82132. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  82133. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  82134. CRTC3_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  82135. CRTC3_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  82136. CRTC3_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  82137. CRTC3_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  82138. CRTC3_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  82139. CRTC3_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  82140. CRTC3_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  82141. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  82142. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  82143. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  82144. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  82145. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  82146. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  82147. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  82148. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  82149. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  82150. CRTC3_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  82151. CRTC3_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  82152. CRTC3_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  82153. CRTC3_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  82154. CRTC3_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  82155. CRTC3_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  82156. CRTC3_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  82157. CRTC3_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  82158. CRTC3_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  82159. CRTC3_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  82160. CRTC3_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  82161. CRTC3_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  82162. CRTC3_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  82163. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  82164. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  82165. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  82166. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  82167. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  82168. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  82169. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  82170. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  82171. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  82172. CRTC3_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  82173. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  82174. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  82175. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  82176. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  82177. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  82178. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  82179. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  82180. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  82181. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  82182. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  82183. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  82184. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  82185. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  82186. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  82187. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  82188. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  82189. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  82190. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  82191. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  82192. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  82193. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  82194. CRTC3_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  82195. CRTC3_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  82196. CRTC3_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  82197. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  82198. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  82199. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  82200. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  82201. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  82202. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  82203. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  82204. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  82205. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  82206. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  82207. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  82208. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  82209. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  82210. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  82211. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  82212. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  82213. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  82214. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  82215. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  82216. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  82217. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  82218. CRTC3_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  82219. CRTC3_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  82220. CRTC3_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  82221. CRTC3_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  82222. CRTC3_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  82223. CRTC3_CRTC_VBI_END__CRTC_VBI_H_END_MASK
  82224. CRTC3_CRTC_VBI_END__CRTC_VBI_H_END__SHIFT
  82225. CRTC3_CRTC_VBI_END__CRTC_VBI_V_END_MASK
  82226. CRTC3_CRTC_VBI_END__CRTC_VBI_V_END__SHIFT
  82227. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  82228. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  82229. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  82230. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  82231. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  82232. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  82233. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  82234. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  82235. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  82236. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  82237. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  82238. CRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  82239. CRTC3_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  82240. CRTC3_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  82241. CRTC3_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  82242. CRTC3_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  82243. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  82244. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  82245. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  82246. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  82247. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  82248. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  82249. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  82250. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  82251. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  82252. CRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  82253. CRTC3_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  82254. CRTC3_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  82255. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  82256. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  82257. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  82258. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  82259. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  82260. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  82261. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  82262. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  82263. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  82264. CRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  82265. CRTC3_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  82266. CRTC3_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  82267. CRTC3_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  82268. CRTC3_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  82269. CRTC3_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  82270. CRTC3_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  82271. CRTC3_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  82272. CRTC3_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  82273. CRTC3_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  82274. CRTC3_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  82275. CRTC3_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  82276. CRTC3_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  82277. CRTC3_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  82278. CRTC3_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  82279. CRTC3_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  82280. CRTC3_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  82281. CRTC3_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  82282. CRTC3_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  82283. CRTC3_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  82284. CRTC3_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  82285. CRTC3_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  82286. CRTC3_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  82287. CRTC3_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  82288. CRTC3_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  82289. CRTC3_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  82290. CRTC3_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  82291. CRTC3_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  82292. CRTC3_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  82293. CRTC3_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  82294. CRTC3_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  82295. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  82296. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  82297. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  82298. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  82299. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  82300. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  82301. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  82302. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  82303. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  82304. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  82305. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  82306. CRTC3_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  82307. CRTC3_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  82308. CRTC3_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  82309. CRTC3_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  82310. CRTC3_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  82311. CRTC3_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  82312. CRTC3_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  82313. CRTC3_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  82314. CRTC3_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  82315. CRTC3_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  82316. CRTC3_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  82317. CRTC3_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  82318. CRTC3_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  82319. CRTC3_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  82320. CRTC3_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  82321. CRTC3_CRTC_V_TOTAL__CRTC_V_TOTAL_MASK
  82322. CRTC3_CRTC_V_TOTAL__CRTC_V_TOTAL__SHIFT
  82323. CRTC3_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  82324. CRTC3_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  82325. CRTC3_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  82326. CRTC3_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  82327. CRTC3_PHYPLL_PIXEL_RATE_CNTL__CRTC3_PHYPLL_PIXEL_RATE_SOURCE_MASK
  82328. CRTC3_PHYPLL_PIXEL_RATE_CNTL__CRTC3_PHYPLL_PIXEL_RATE_SOURCE__SHIFT
  82329. CRTC3_PHYPLL_PIXEL_RATE_CNTL__CRTC3_PIXEL_RATE_PLL_SOURCE_MASK
  82330. CRTC3_PHYPLL_PIXEL_RATE_CNTL__CRTC3_PIXEL_RATE_PLL_SOURCE__SHIFT
  82331. CRTC3_PIXEL_RATE_CNTL__CRTC3_ADD_PIXEL_MASK
  82332. CRTC3_PIXEL_RATE_CNTL__CRTC3_ADD_PIXEL__SHIFT
  82333. CRTC3_PIXEL_RATE_CNTL__CRTC3_DISPOUT_ERROR_COUNT_MASK
  82334. CRTC3_PIXEL_RATE_CNTL__CRTC3_DISPOUT_ERROR_COUNT__SHIFT
  82335. CRTC3_PIXEL_RATE_CNTL__CRTC3_DISPOUT_FIFO_ERROR_MASK
  82336. CRTC3_PIXEL_RATE_CNTL__CRTC3_DISPOUT_FIFO_ERROR__SHIFT
  82337. CRTC3_PIXEL_RATE_CNTL__CRTC3_DISPOUT_HALF_RATE_EN_MASK
  82338. CRTC3_PIXEL_RATE_CNTL__CRTC3_DISPOUT_HALF_RATE_EN__SHIFT
  82339. CRTC3_PIXEL_RATE_CNTL__CRTC3_DROP_PIXEL_MASK
  82340. CRTC3_PIXEL_RATE_CNTL__CRTC3_DROP_PIXEL__SHIFT
  82341. CRTC3_PIXEL_RATE_CNTL__CRTC3_PIXEL_RATE_SOURCE_MASK
  82342. CRTC3_PIXEL_RATE_CNTL__CRTC3_PIXEL_RATE_SOURCE__SHIFT
  82343. CRTC3_PIXEL_RATE_CNTL__DP_DTO3_DS_DISABLE_MASK
  82344. CRTC3_PIXEL_RATE_CNTL__DP_DTO3_DS_DISABLE__SHIFT
  82345. CRTC3_PIXEL_RATE_CNTL__DP_DTO3_ENABLE_MASK
  82346. CRTC3_PIXEL_RATE_CNTL__DP_DTO3_ENABLE__SHIFT
  82347. CRTC3_REGISTER_OFFSET
  82348. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  82349. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  82350. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  82351. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  82352. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  82353. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  82354. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  82355. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  82356. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  82357. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  82358. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  82359. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  82360. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  82361. CRTC4_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  82362. CRTC4_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  82363. CRTC4_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  82364. CRTC4_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  82365. CRTC4_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  82366. CRTC4_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  82367. CRTC4_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  82368. CRTC4_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  82369. CRTC4_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  82370. CRTC4_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  82371. CRTC4_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  82372. CRTC4_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  82373. CRTC4_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  82374. CRTC4_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  82375. CRTC4_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  82376. CRTC4_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  82377. CRTC4_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  82378. CRTC4_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  82379. CRTC4_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  82380. CRTC4_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  82381. CRTC4_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  82382. CRTC4_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  82383. CRTC4_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  82384. CRTC4_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  82385. CRTC4_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  82386. CRTC4_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  82387. CRTC4_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  82388. CRTC4_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  82389. CRTC4_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  82390. CRTC4_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  82391. CRTC4_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  82392. CRTC4_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  82393. CRTC4_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  82394. CRTC4_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  82395. CRTC4_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  82396. CRTC4_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  82397. CRTC4_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  82398. CRTC4_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  82399. CRTC4_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  82400. CRTC4_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  82401. CRTC4_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  82402. CRTC4_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  82403. CRTC4_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  82404. CRTC4_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  82405. CRTC4_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  82406. CRTC4_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  82407. CRTC4_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  82408. CRTC4_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  82409. CRTC4_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  82410. CRTC4_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  82411. CRTC4_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  82412. CRTC4_CRTC_CONTROL__CRTC_MASTER_EN_MASK
  82413. CRTC4_CRTC_CONTROL__CRTC_MASTER_EN__SHIFT
  82414. CRTC4_CRTC_CONTROL__CRTC_SOF_PULL_EN_MASK
  82415. CRTC4_CRTC_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  82416. CRTC4_CRTC_CONTROL__CRTC_START_POINT_CNTL_MASK
  82417. CRTC4_CRTC_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  82418. CRTC4_CRTC_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  82419. CRTC4_CRTC_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  82420. CRTC4_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  82421. CRTC4_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  82422. CRTC4_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  82423. CRTC4_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  82424. CRTC4_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  82425. CRTC4_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  82426. CRTC4_CRTC_CRC0_DATA_B__CRC0_B_CB_MASK
  82427. CRTC4_CRTC_CRC0_DATA_B__CRC0_B_CB__SHIFT
  82428. CRTC4_CRTC_CRC0_DATA_RG__CRC0_G_Y_MASK
  82429. CRTC4_CRTC_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  82430. CRTC4_CRTC_CRC0_DATA_RG__CRC0_R_CR_MASK
  82431. CRTC4_CRTC_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  82432. CRTC4_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  82433. CRTC4_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  82434. CRTC4_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  82435. CRTC4_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  82436. CRTC4_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  82437. CRTC4_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  82438. CRTC4_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  82439. CRTC4_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  82440. CRTC4_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  82441. CRTC4_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  82442. CRTC4_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  82443. CRTC4_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  82444. CRTC4_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  82445. CRTC4_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  82446. CRTC4_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  82447. CRTC4_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  82448. CRTC4_CRTC_CRC1_DATA_B__CRC1_B_CB_MASK
  82449. CRTC4_CRTC_CRC1_DATA_B__CRC1_B_CB__SHIFT
  82450. CRTC4_CRTC_CRC1_DATA_RG__CRC1_G_Y_MASK
  82451. CRTC4_CRTC_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  82452. CRTC4_CRTC_CRC1_DATA_RG__CRC1_R_CR_MASK
  82453. CRTC4_CRTC_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  82454. CRTC4_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  82455. CRTC4_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  82456. CRTC4_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  82457. CRTC4_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  82458. CRTC4_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  82459. CRTC4_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  82460. CRTC4_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  82461. CRTC4_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  82462. CRTC4_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  82463. CRTC4_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  82464. CRTC4_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  82465. CRTC4_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  82466. CRTC4_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  82467. CRTC4_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  82468. CRTC4_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  82469. CRTC4_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  82470. CRTC4_CRTC_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  82471. CRTC4_CRTC_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  82472. CRTC4_CRTC_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  82473. CRTC4_CRTC_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  82474. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  82475. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  82476. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_EN_MASK
  82477. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_EN__SHIFT
  82478. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  82479. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  82480. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  82481. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  82482. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  82483. CRTC4_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  82484. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  82485. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  82486. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_MASK
  82487. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE__SHIFT
  82488. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING_MASK
  82489. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING__SHIFT
  82490. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  82491. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  82492. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  82493. CRTC4_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  82494. CRTC4_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE_MASK
  82495. CRTC4_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE__SHIFT
  82496. CRTC4_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS_MASK
  82497. CRTC4_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS__SHIFT
  82498. CRTC4_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR_MASK
  82499. CRTC4_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR__SHIFT
  82500. CRTC4_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY_MASK
  82501. CRTC4_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY__SHIFT
  82502. CRTC4_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  82503. CRTC4_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  82504. CRTC4_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  82505. CRTC4_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  82506. CRTC4_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  82507. CRTC4_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  82508. CRTC4_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  82509. CRTC4_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  82510. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  82511. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  82512. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  82513. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  82514. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  82515. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  82516. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  82517. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  82518. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  82519. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  82520. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  82521. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  82522. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  82523. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  82524. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  82525. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  82526. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  82527. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  82528. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  82529. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  82530. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  82531. CRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  82532. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  82533. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  82534. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  82535. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  82536. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  82537. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  82538. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  82539. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  82540. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  82541. CRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  82542. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  82543. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  82544. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  82545. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  82546. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  82547. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  82548. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  82549. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  82550. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  82551. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  82552. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  82553. CRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  82554. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  82555. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  82556. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  82557. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  82558. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  82559. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  82560. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  82561. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  82562. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  82563. CRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  82564. CRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  82565. CRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  82566. CRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  82567. CRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  82568. CRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  82569. CRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  82570. CRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  82571. CRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  82572. CRTC4_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  82573. CRTC4_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  82574. CRTC4_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  82575. CRTC4_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  82576. CRTC4_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  82577. CRTC4_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  82578. CRTC4_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  82579. CRTC4_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  82580. CRTC4_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  82581. CRTC4_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  82582. CRTC4_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  82583. CRTC4_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  82584. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  82585. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  82586. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  82587. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  82588. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  82589. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  82590. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  82591. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  82592. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  82593. CRTC4_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  82594. CRTC4_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  82595. CRTC4_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  82596. CRTC4_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  82597. CRTC4_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  82598. CRTC4_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  82599. CRTC4_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  82600. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  82601. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  82602. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  82603. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  82604. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  82605. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  82606. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  82607. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  82608. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  82609. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  82610. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  82611. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  82612. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  82613. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  82614. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  82615. CRTC4_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  82616. CRTC4_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  82617. CRTC4_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  82618. CRTC4_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  82619. CRTC4_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  82620. CRTC4_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  82621. CRTC4_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  82622. CRTC4_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  82623. CRTC4_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  82624. CRTC4_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  82625. CRTC4_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  82626. CRTC4_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  82627. CRTC4_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  82628. CRTC4_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  82629. CRTC4_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  82630. CRTC4_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  82631. CRTC4_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  82632. CRTC4_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  82633. CRTC4_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  82634. CRTC4_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  82635. CRTC4_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  82636. CRTC4_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  82637. CRTC4_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  82638. CRTC4_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  82639. CRTC4_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  82640. CRTC4_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  82641. CRTC4_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  82642. CRTC4_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  82643. CRTC4_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  82644. CRTC4_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  82645. CRTC4_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  82646. CRTC4_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  82647. CRTC4_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  82648. CRTC4_CRTC_H_TOTAL__CRTC_H_TOTAL_MASK
  82649. CRTC4_CRTC_H_TOTAL__CRTC_H_TOTAL__SHIFT
  82650. CRTC4_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  82651. CRTC4_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  82652. CRTC4_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  82653. CRTC4_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  82654. CRTC4_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  82655. CRTC4_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  82656. CRTC4_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  82657. CRTC4_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  82658. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  82659. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  82660. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  82661. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  82662. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  82663. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  82664. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  82665. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  82666. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  82667. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  82668. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  82669. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  82670. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  82671. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  82672. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  82673. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  82674. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  82675. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  82676. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  82677. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  82678. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  82679. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  82680. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  82681. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  82682. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  82683. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  82684. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  82685. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  82686. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  82687. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  82688. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  82689. CRTC4_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  82690. CRTC4_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  82691. CRTC4_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  82692. CRTC4_CRTC_MASTER_EN__CRTC_MASTER_EN_MASK
  82693. CRTC4_CRTC_MASTER_EN__CRTC_MASTER_EN__SHIFT
  82694. CRTC4_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  82695. CRTC4_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  82696. CRTC4_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  82697. CRTC4_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  82698. CRTC4_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  82699. CRTC4_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  82700. CRTC4_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  82701. CRTC4_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  82702. CRTC4_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  82703. CRTC4_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  82704. CRTC4_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  82705. CRTC4_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  82706. CRTC4_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  82707. CRTC4_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  82708. CRTC4_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  82709. CRTC4_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  82710. CRTC4_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  82711. CRTC4_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  82712. CRTC4_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  82713. CRTC4_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  82714. CRTC4_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  82715. CRTC4_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  82716. CRTC4_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  82717. CRTC4_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  82718. CRTC4_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  82719. CRTC4_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  82720. CRTC4_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  82721. CRTC4_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  82722. CRTC4_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  82723. CRTC4_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  82724. CRTC4_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  82725. CRTC4_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  82726. CRTC4_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  82727. CRTC4_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  82728. CRTC4_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  82729. CRTC4_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  82730. CRTC4_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  82731. CRTC4_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  82732. CRTC4_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  82733. CRTC4_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  82734. CRTC4_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  82735. CRTC4_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  82736. CRTC4_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  82737. CRTC4_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  82738. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR_MASK
  82739. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR__SHIFT
  82740. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MASK
  82741. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK_MASK
  82742. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK__SHIFT
  82743. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE_MASK
  82744. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE__SHIFT
  82745. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT__SHIFT
  82746. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_MASK
  82747. CRTC4_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED__SHIFT
  82748. CRTC4_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  82749. CRTC4_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  82750. CRTC4_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  82751. CRTC4_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  82752. CRTC4_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  82753. CRTC4_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  82754. CRTC4_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  82755. CRTC4_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  82756. CRTC4_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  82757. CRTC4_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  82758. CRTC4_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  82759. CRTC4_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  82760. CRTC4_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  82761. CRTC4_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  82762. CRTC4_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  82763. CRTC4_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  82764. CRTC4_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  82765. CRTC4_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  82766. CRTC4_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  82767. CRTC4_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  82768. CRTC4_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  82769. CRTC4_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  82770. CRTC4_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  82771. CRTC4_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  82772. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  82773. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  82774. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  82775. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  82776. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  82777. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  82778. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  82779. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  82780. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  82781. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  82782. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  82783. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  82784. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  82785. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  82786. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_MASK
  82787. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE_MASK
  82788. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE__SHIFT
  82789. CRTC4_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE__SHIFT
  82790. CRTC4_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  82791. CRTC4_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  82792. CRTC4_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  82793. CRTC4_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  82794. CRTC4_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  82795. CRTC4_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  82796. CRTC4_CRTC_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  82797. CRTC4_CRTC_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  82798. CRTC4_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  82799. CRTC4_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  82800. CRTC4_CRTC_STATUS__CRTC_H_ACTIVE_DISP_MASK
  82801. CRTC4_CRTC_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  82802. CRTC4_CRTC_STATUS__CRTC_H_BLANK_MASK
  82803. CRTC4_CRTC_STATUS__CRTC_H_BLANK__SHIFT
  82804. CRTC4_CRTC_STATUS__CRTC_H_SYNC_A_MASK
  82805. CRTC4_CRTC_STATUS__CRTC_H_SYNC_A__SHIFT
  82806. CRTC4_CRTC_STATUS__CRTC_V_ACTIVE_DISP_MASK
  82807. CRTC4_CRTC_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  82808. CRTC4_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  82809. CRTC4_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  82810. CRTC4_CRTC_STATUS__CRTC_V_BLANK_MASK
  82811. CRTC4_CRTC_STATUS__CRTC_V_BLANK__SHIFT
  82812. CRTC4_CRTC_STATUS__CRTC_V_START_LINE_MASK
  82813. CRTC4_CRTC_STATUS__CRTC_V_START_LINE__SHIFT
  82814. CRTC4_CRTC_STATUS__CRTC_V_SYNC_A_MASK
  82815. CRTC4_CRTC_STATUS__CRTC_V_SYNC_A__SHIFT
  82816. CRTC4_CRTC_STATUS__CRTC_V_UPDATE_MASK
  82817. CRTC4_CRTC_STATUS__CRTC_V_UPDATE__SHIFT
  82818. CRTC4_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  82819. CRTC4_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  82820. CRTC4_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  82821. CRTC4_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  82822. CRTC4_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  82823. CRTC4_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  82824. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  82825. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  82826. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  82827. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  82828. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  82829. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  82830. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  82831. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  82832. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  82833. CRTC4_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  82834. CRTC4_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  82835. CRTC4_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  82836. CRTC4_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  82837. CRTC4_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  82838. CRTC4_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  82839. CRTC4_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  82840. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  82841. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  82842. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  82843. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  82844. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  82845. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  82846. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  82847. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  82848. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  82849. CRTC4_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  82850. CRTC4_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  82851. CRTC4_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  82852. CRTC4_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  82853. CRTC4_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  82854. CRTC4_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  82855. CRTC4_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  82856. CRTC4_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  82857. CRTC4_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  82858. CRTC4_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  82859. CRTC4_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  82860. CRTC4_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  82861. CRTC4_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  82862. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  82863. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  82864. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  82865. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  82866. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  82867. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  82868. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  82869. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  82870. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  82871. CRTC4_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  82872. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  82873. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  82874. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  82875. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  82876. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  82877. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  82878. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  82879. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  82880. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  82881. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  82882. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  82883. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  82884. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  82885. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  82886. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  82887. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  82888. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  82889. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  82890. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  82891. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  82892. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  82893. CRTC4_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  82894. CRTC4_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  82895. CRTC4_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  82896. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  82897. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  82898. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  82899. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  82900. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  82901. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  82902. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  82903. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  82904. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  82905. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  82906. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  82907. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  82908. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  82909. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  82910. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  82911. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  82912. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  82913. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  82914. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  82915. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  82916. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  82917. CRTC4_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  82918. CRTC4_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  82919. CRTC4_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  82920. CRTC4_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  82921. CRTC4_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  82922. CRTC4_CRTC_VBI_END__CRTC_VBI_H_END_MASK
  82923. CRTC4_CRTC_VBI_END__CRTC_VBI_H_END__SHIFT
  82924. CRTC4_CRTC_VBI_END__CRTC_VBI_V_END_MASK
  82925. CRTC4_CRTC_VBI_END__CRTC_VBI_V_END__SHIFT
  82926. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  82927. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  82928. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  82929. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  82930. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  82931. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  82932. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  82933. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  82934. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  82935. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  82936. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  82937. CRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  82938. CRTC4_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  82939. CRTC4_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  82940. CRTC4_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  82941. CRTC4_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  82942. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  82943. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  82944. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  82945. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  82946. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  82947. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  82948. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  82949. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  82950. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  82951. CRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  82952. CRTC4_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  82953. CRTC4_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  82954. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  82955. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  82956. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  82957. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  82958. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  82959. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  82960. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  82961. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  82962. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  82963. CRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  82964. CRTC4_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  82965. CRTC4_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  82966. CRTC4_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  82967. CRTC4_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  82968. CRTC4_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  82969. CRTC4_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  82970. CRTC4_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  82971. CRTC4_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  82972. CRTC4_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  82973. CRTC4_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  82974. CRTC4_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  82975. CRTC4_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  82976. CRTC4_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  82977. CRTC4_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  82978. CRTC4_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  82979. CRTC4_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  82980. CRTC4_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  82981. CRTC4_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  82982. CRTC4_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  82983. CRTC4_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  82984. CRTC4_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  82985. CRTC4_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  82986. CRTC4_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  82987. CRTC4_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  82988. CRTC4_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  82989. CRTC4_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  82990. CRTC4_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  82991. CRTC4_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  82992. CRTC4_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  82993. CRTC4_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  82994. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  82995. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  82996. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  82997. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  82998. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  82999. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  83000. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  83001. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  83002. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  83003. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  83004. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  83005. CRTC4_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  83006. CRTC4_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  83007. CRTC4_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  83008. CRTC4_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  83009. CRTC4_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  83010. CRTC4_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  83011. CRTC4_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  83012. CRTC4_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  83013. CRTC4_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  83014. CRTC4_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  83015. CRTC4_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  83016. CRTC4_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  83017. CRTC4_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  83018. CRTC4_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  83019. CRTC4_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  83020. CRTC4_CRTC_V_TOTAL__CRTC_V_TOTAL_MASK
  83021. CRTC4_CRTC_V_TOTAL__CRTC_V_TOTAL__SHIFT
  83022. CRTC4_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  83023. CRTC4_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  83024. CRTC4_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  83025. CRTC4_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  83026. CRTC4_PHYPLL_PIXEL_RATE_CNTL__CRTC4_PHYPLL_PIXEL_RATE_SOURCE_MASK
  83027. CRTC4_PHYPLL_PIXEL_RATE_CNTL__CRTC4_PHYPLL_PIXEL_RATE_SOURCE__SHIFT
  83028. CRTC4_PHYPLL_PIXEL_RATE_CNTL__CRTC4_PIXEL_RATE_PLL_SOURCE_MASK
  83029. CRTC4_PHYPLL_PIXEL_RATE_CNTL__CRTC4_PIXEL_RATE_PLL_SOURCE__SHIFT
  83030. CRTC4_PIXEL_RATE_CNTL__CRTC4_ADD_PIXEL_MASK
  83031. CRTC4_PIXEL_RATE_CNTL__CRTC4_ADD_PIXEL__SHIFT
  83032. CRTC4_PIXEL_RATE_CNTL__CRTC4_DISPOUT_ERROR_COUNT_MASK
  83033. CRTC4_PIXEL_RATE_CNTL__CRTC4_DISPOUT_ERROR_COUNT__SHIFT
  83034. CRTC4_PIXEL_RATE_CNTL__CRTC4_DISPOUT_FIFO_ERROR_MASK
  83035. CRTC4_PIXEL_RATE_CNTL__CRTC4_DISPOUT_FIFO_ERROR__SHIFT
  83036. CRTC4_PIXEL_RATE_CNTL__CRTC4_DISPOUT_HALF_RATE_EN_MASK
  83037. CRTC4_PIXEL_RATE_CNTL__CRTC4_DISPOUT_HALF_RATE_EN__SHIFT
  83038. CRTC4_PIXEL_RATE_CNTL__CRTC4_DROP_PIXEL_MASK
  83039. CRTC4_PIXEL_RATE_CNTL__CRTC4_DROP_PIXEL__SHIFT
  83040. CRTC4_PIXEL_RATE_CNTL__CRTC4_PIXEL_RATE_SOURCE_MASK
  83041. CRTC4_PIXEL_RATE_CNTL__CRTC4_PIXEL_RATE_SOURCE__SHIFT
  83042. CRTC4_PIXEL_RATE_CNTL__DP_DTO4_DS_DISABLE_MASK
  83043. CRTC4_PIXEL_RATE_CNTL__DP_DTO4_DS_DISABLE__SHIFT
  83044. CRTC4_PIXEL_RATE_CNTL__DP_DTO4_ENABLE_MASK
  83045. CRTC4_PIXEL_RATE_CNTL__DP_DTO4_ENABLE__SHIFT
  83046. CRTC4_REGISTER_OFFSET
  83047. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  83048. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  83049. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  83050. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  83051. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  83052. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  83053. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  83054. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  83055. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  83056. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  83057. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  83058. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  83059. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  83060. CRTC5_CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  83061. CRTC5_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  83062. CRTC5_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  83063. CRTC5_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  83064. CRTC5_CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  83065. CRTC5_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  83066. CRTC5_CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  83067. CRTC5_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  83068. CRTC5_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  83069. CRTC5_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  83070. CRTC5_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  83071. CRTC5_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  83072. CRTC5_CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  83073. CRTC5_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  83074. CRTC5_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  83075. CRTC5_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  83076. CRTC5_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  83077. CRTC5_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  83078. CRTC5_CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  83079. CRTC5_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  83080. CRTC5_CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  83081. CRTC5_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  83082. CRTC5_CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  83083. CRTC5_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  83084. CRTC5_CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  83085. CRTC5_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  83086. CRTC5_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  83087. CRTC5_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  83088. CRTC5_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  83089. CRTC5_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  83090. CRTC5_CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  83091. CRTC5_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  83092. CRTC5_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  83093. CRTC5_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  83094. CRTC5_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  83095. CRTC5_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  83096. CRTC5_CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  83097. CRTC5_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  83098. CRTC5_CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  83099. CRTC5_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  83100. CRTC5_CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  83101. CRTC5_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  83102. CRTC5_CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  83103. CRTC5_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  83104. CRTC5_CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  83105. CRTC5_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  83106. CRTC5_CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  83107. CRTC5_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  83108. CRTC5_CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  83109. CRTC5_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  83110. CRTC5_CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  83111. CRTC5_CRTC_CONTROL__CRTC_MASTER_EN_MASK
  83112. CRTC5_CRTC_CONTROL__CRTC_MASTER_EN__SHIFT
  83113. CRTC5_CRTC_CONTROL__CRTC_SOF_PULL_EN_MASK
  83114. CRTC5_CRTC_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  83115. CRTC5_CRTC_CONTROL__CRTC_START_POINT_CNTL_MASK
  83116. CRTC5_CRTC_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  83117. CRTC5_CRTC_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  83118. CRTC5_CRTC_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  83119. CRTC5_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  83120. CRTC5_CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  83121. CRTC5_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  83122. CRTC5_CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  83123. CRTC5_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  83124. CRTC5_CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  83125. CRTC5_CRTC_CRC0_DATA_B__CRC0_B_CB_MASK
  83126. CRTC5_CRTC_CRC0_DATA_B__CRC0_B_CB__SHIFT
  83127. CRTC5_CRTC_CRC0_DATA_RG__CRC0_G_Y_MASK
  83128. CRTC5_CRTC_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  83129. CRTC5_CRTC_CRC0_DATA_RG__CRC0_R_CR_MASK
  83130. CRTC5_CRTC_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  83131. CRTC5_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  83132. CRTC5_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  83133. CRTC5_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  83134. CRTC5_CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  83135. CRTC5_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  83136. CRTC5_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  83137. CRTC5_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  83138. CRTC5_CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  83139. CRTC5_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  83140. CRTC5_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  83141. CRTC5_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  83142. CRTC5_CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  83143. CRTC5_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  83144. CRTC5_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  83145. CRTC5_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  83146. CRTC5_CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  83147. CRTC5_CRTC_CRC1_DATA_B__CRC1_B_CB_MASK
  83148. CRTC5_CRTC_CRC1_DATA_B__CRC1_B_CB__SHIFT
  83149. CRTC5_CRTC_CRC1_DATA_RG__CRC1_G_Y_MASK
  83150. CRTC5_CRTC_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  83151. CRTC5_CRTC_CRC1_DATA_RG__CRC1_R_CR_MASK
  83152. CRTC5_CRTC_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  83153. CRTC5_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  83154. CRTC5_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  83155. CRTC5_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  83156. CRTC5_CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  83157. CRTC5_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  83158. CRTC5_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  83159. CRTC5_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  83160. CRTC5_CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  83161. CRTC5_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  83162. CRTC5_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  83163. CRTC5_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  83164. CRTC5_CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  83165. CRTC5_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  83166. CRTC5_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  83167. CRTC5_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  83168. CRTC5_CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  83169. CRTC5_CRTC_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  83170. CRTC5_CRTC_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  83171. CRTC5_CRTC_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  83172. CRTC5_CRTC_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  83173. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  83174. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  83175. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_EN_MASK
  83176. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_EN__SHIFT
  83177. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  83178. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  83179. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  83180. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  83181. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  83182. CRTC5_CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  83183. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  83184. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  83185. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_MASK
  83186. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE__SHIFT
  83187. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING_MASK
  83188. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING__SHIFT
  83189. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  83190. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  83191. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  83192. CRTC5_CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  83193. CRTC5_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE_MASK
  83194. CRTC5_CRTC_DRR_CONTROL__CRTC_DRR_MODE_DBUF_UPDATE_MODE__SHIFT
  83195. CRTC5_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS_MASK
  83196. CRTC5_CRTC_DRR_CONTROL__CRTC_SET_V_TOTAL_MIN_AUTO_DIS__SHIFT
  83197. CRTC5_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR_MASK
  83198. CRTC5_CRTC_DRR_CONTROL__CRTC_V_TOTAL_LAST_USED_BY_DRR__SHIFT
  83199. CRTC5_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY_MASK
  83200. CRTC5_CRTC_DRR_CONTROL__CRTC_XDMA_PREFETCH_DELAY__SHIFT
  83201. CRTC5_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  83202. CRTC5_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  83203. CRTC5_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  83204. CRTC5_CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  83205. CRTC5_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  83206. CRTC5_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  83207. CRTC5_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  83208. CRTC5_CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  83209. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  83210. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  83211. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  83212. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  83213. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  83214. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  83215. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  83216. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  83217. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  83218. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  83219. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  83220. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  83221. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  83222. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  83223. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  83224. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  83225. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  83226. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  83227. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  83228. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  83229. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  83230. CRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  83231. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  83232. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  83233. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  83234. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  83235. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  83236. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  83237. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  83238. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  83239. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  83240. CRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  83241. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  83242. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  83243. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  83244. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  83245. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  83246. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  83247. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  83248. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  83249. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  83250. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  83251. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  83252. CRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  83253. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  83254. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  83255. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  83256. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  83257. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  83258. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  83259. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  83260. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  83261. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  83262. CRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  83263. CRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  83264. CRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  83265. CRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  83266. CRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  83267. CRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  83268. CRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  83269. CRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  83270. CRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  83271. CRTC5_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  83272. CRTC5_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  83273. CRTC5_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  83274. CRTC5_CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  83275. CRTC5_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  83276. CRTC5_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  83277. CRTC5_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  83278. CRTC5_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  83279. CRTC5_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  83280. CRTC5_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  83281. CRTC5_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  83282. CRTC5_CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  83283. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  83284. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  83285. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  83286. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  83287. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  83288. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  83289. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  83290. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  83291. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  83292. CRTC5_CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  83293. CRTC5_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  83294. CRTC5_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  83295. CRTC5_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  83296. CRTC5_CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  83297. CRTC5_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  83298. CRTC5_CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  83299. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  83300. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  83301. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  83302. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  83303. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  83304. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  83305. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  83306. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  83307. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  83308. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  83309. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  83310. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  83311. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  83312. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  83313. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  83314. CRTC5_CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  83315. CRTC5_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  83316. CRTC5_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  83317. CRTC5_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  83318. CRTC5_CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  83319. CRTC5_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  83320. CRTC5_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  83321. CRTC5_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  83322. CRTC5_CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  83323. CRTC5_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  83324. CRTC5_CRTC_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  83325. CRTC5_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  83326. CRTC5_CRTC_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  83327. CRTC5_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  83328. CRTC5_CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  83329. CRTC5_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  83330. CRTC5_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  83331. CRTC5_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  83332. CRTC5_CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  83333. CRTC5_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  83334. CRTC5_CRTC_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  83335. CRTC5_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  83336. CRTC5_CRTC_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  83337. CRTC5_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  83338. CRTC5_CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  83339. CRTC5_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  83340. CRTC5_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  83341. CRTC5_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  83342. CRTC5_CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  83343. CRTC5_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  83344. CRTC5_CRTC_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  83345. CRTC5_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  83346. CRTC5_CRTC_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  83347. CRTC5_CRTC_H_TOTAL__CRTC_H_TOTAL_MASK
  83348. CRTC5_CRTC_H_TOTAL__CRTC_H_TOTAL__SHIFT
  83349. CRTC5_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  83350. CRTC5_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  83351. CRTC5_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  83352. CRTC5_CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  83353. CRTC5_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  83354. CRTC5_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  83355. CRTC5_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  83356. CRTC5_CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  83357. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  83358. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  83359. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  83360. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  83361. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  83362. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  83363. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  83364. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  83365. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  83366. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  83367. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  83368. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  83369. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  83370. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  83371. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  83372. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  83373. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  83374. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  83375. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  83376. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  83377. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  83378. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  83379. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  83380. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  83381. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  83382. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  83383. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  83384. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  83385. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  83386. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  83387. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  83388. CRTC5_CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  83389. CRTC5_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  83390. CRTC5_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  83391. CRTC5_CRTC_MASTER_EN__CRTC_MASTER_EN_MASK
  83392. CRTC5_CRTC_MASTER_EN__CRTC_MASTER_EN__SHIFT
  83393. CRTC5_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  83394. CRTC5_CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  83395. CRTC5_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  83396. CRTC5_CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  83397. CRTC5_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  83398. CRTC5_CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  83399. CRTC5_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  83400. CRTC5_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  83401. CRTC5_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  83402. CRTC5_CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  83403. CRTC5_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  83404. CRTC5_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  83405. CRTC5_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  83406. CRTC5_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  83407. CRTC5_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  83408. CRTC5_CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  83409. CRTC5_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  83410. CRTC5_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  83411. CRTC5_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  83412. CRTC5_CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  83413. CRTC5_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  83414. CRTC5_CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  83415. CRTC5_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  83416. CRTC5_CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  83417. CRTC5_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  83418. CRTC5_CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  83419. CRTC5_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  83420. CRTC5_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  83421. CRTC5_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  83422. CRTC5_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  83423. CRTC5_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  83424. CRTC5_CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  83425. CRTC5_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  83426. CRTC5_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  83427. CRTC5_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  83428. CRTC5_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  83429. CRTC5_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  83430. CRTC5_CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  83431. CRTC5_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  83432. CRTC5_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  83433. CRTC5_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  83434. CRTC5_CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  83435. CRTC5_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  83436. CRTC5_CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  83437. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR_MASK
  83438. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_CLEAR__SHIFT
  83439. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MASK
  83440. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK_MASK
  83441. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_MSK__SHIFT
  83442. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE_MASK
  83443. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT_TYPE__SHIFT
  83444. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_INT__SHIFT
  83445. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED_MASK
  83446. CRTC5_CRTC_RANGE_TIMING_INT_STATUS__CRTC_RANGE_TIMING_UPDATE_OCCURRED__SHIFT
  83447. CRTC5_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  83448. CRTC5_CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  83449. CRTC5_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  83450. CRTC5_CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  83451. CRTC5_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  83452. CRTC5_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  83453. CRTC5_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  83454. CRTC5_CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  83455. CRTC5_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  83456. CRTC5_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  83457. CRTC5_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  83458. CRTC5_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  83459. CRTC5_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  83460. CRTC5_CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  83461. CRTC5_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  83462. CRTC5_CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  83463. CRTC5_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  83464. CRTC5_CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  83465. CRTC5_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  83466. CRTC5_CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  83467. CRTC5_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  83468. CRTC5_CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  83469. CRTC5_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  83470. CRTC5_CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  83471. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  83472. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  83473. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  83474. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  83475. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  83476. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  83477. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  83478. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  83479. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  83480. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  83481. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  83482. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  83483. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  83484. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  83485. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_MASK
  83486. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE_MASK
  83487. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE__SHIFT
  83488. CRTC5_CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE__SHIFT
  83489. CRTC5_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  83490. CRTC5_CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  83491. CRTC5_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  83492. CRTC5_CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  83493. CRTC5_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  83494. CRTC5_CRTC_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  83495. CRTC5_CRTC_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  83496. CRTC5_CRTC_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  83497. CRTC5_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  83498. CRTC5_CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  83499. CRTC5_CRTC_STATUS__CRTC_H_ACTIVE_DISP_MASK
  83500. CRTC5_CRTC_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  83501. CRTC5_CRTC_STATUS__CRTC_H_BLANK_MASK
  83502. CRTC5_CRTC_STATUS__CRTC_H_BLANK__SHIFT
  83503. CRTC5_CRTC_STATUS__CRTC_H_SYNC_A_MASK
  83504. CRTC5_CRTC_STATUS__CRTC_H_SYNC_A__SHIFT
  83505. CRTC5_CRTC_STATUS__CRTC_V_ACTIVE_DISP_MASK
  83506. CRTC5_CRTC_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  83507. CRTC5_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  83508. CRTC5_CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  83509. CRTC5_CRTC_STATUS__CRTC_V_BLANK_MASK
  83510. CRTC5_CRTC_STATUS__CRTC_V_BLANK__SHIFT
  83511. CRTC5_CRTC_STATUS__CRTC_V_START_LINE_MASK
  83512. CRTC5_CRTC_STATUS__CRTC_V_START_LINE__SHIFT
  83513. CRTC5_CRTC_STATUS__CRTC_V_SYNC_A_MASK
  83514. CRTC5_CRTC_STATUS__CRTC_V_SYNC_A__SHIFT
  83515. CRTC5_CRTC_STATUS__CRTC_V_UPDATE_MASK
  83516. CRTC5_CRTC_STATUS__CRTC_V_UPDATE__SHIFT
  83517. CRTC5_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  83518. CRTC5_CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  83519. CRTC5_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  83520. CRTC5_CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  83521. CRTC5_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  83522. CRTC5_CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  83523. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  83524. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  83525. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  83526. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  83527. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  83528. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  83529. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  83530. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  83531. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  83532. CRTC5_CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  83533. CRTC5_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  83534. CRTC5_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  83535. CRTC5_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  83536. CRTC5_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  83537. CRTC5_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  83538. CRTC5_CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  83539. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  83540. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  83541. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  83542. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  83543. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  83544. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  83545. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  83546. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  83547. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  83548. CRTC5_CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  83549. CRTC5_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  83550. CRTC5_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  83551. CRTC5_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  83552. CRTC5_CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  83553. CRTC5_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  83554. CRTC5_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  83555. CRTC5_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  83556. CRTC5_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  83557. CRTC5_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  83558. CRTC5_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  83559. CRTC5_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  83560. CRTC5_CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  83561. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  83562. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  83563. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  83564. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  83565. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  83566. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  83567. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  83568. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  83569. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  83570. CRTC5_CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  83571. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  83572. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  83573. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  83574. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  83575. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  83576. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  83577. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  83578. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  83579. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  83580. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  83581. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  83582. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  83583. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  83584. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  83585. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  83586. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  83587. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  83588. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  83589. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  83590. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  83591. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  83592. CRTC5_CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  83593. CRTC5_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  83594. CRTC5_CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  83595. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  83596. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  83597. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  83598. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  83599. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  83600. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  83601. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  83602. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  83603. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  83604. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  83605. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  83606. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  83607. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  83608. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  83609. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  83610. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  83611. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  83612. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  83613. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  83614. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  83615. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  83616. CRTC5_CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  83617. CRTC5_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  83618. CRTC5_CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  83619. CRTC5_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  83620. CRTC5_CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  83621. CRTC5_CRTC_VBI_END__CRTC_VBI_H_END_MASK
  83622. CRTC5_CRTC_VBI_END__CRTC_VBI_H_END__SHIFT
  83623. CRTC5_CRTC_VBI_END__CRTC_VBI_V_END_MASK
  83624. CRTC5_CRTC_VBI_END__CRTC_VBI_V_END__SHIFT
  83625. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  83626. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  83627. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  83628. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  83629. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  83630. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  83631. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  83632. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  83633. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  83634. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  83635. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  83636. CRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  83637. CRTC5_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  83638. CRTC5_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  83639. CRTC5_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  83640. CRTC5_CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  83641. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  83642. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  83643. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  83644. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  83645. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  83646. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  83647. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  83648. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  83649. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  83650. CRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  83651. CRTC5_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  83652. CRTC5_CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  83653. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  83654. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  83655. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  83656. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  83657. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  83658. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  83659. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  83660. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  83661. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  83662. CRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  83663. CRTC5_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  83664. CRTC5_CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  83665. CRTC5_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  83666. CRTC5_CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  83667. CRTC5_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  83668. CRTC5_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  83669. CRTC5_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  83670. CRTC5_CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  83671. CRTC5_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  83672. CRTC5_CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  83673. CRTC5_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  83674. CRTC5_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  83675. CRTC5_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  83676. CRTC5_CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  83677. CRTC5_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  83678. CRTC5_CRTC_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  83679. CRTC5_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  83680. CRTC5_CRTC_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  83681. CRTC5_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  83682. CRTC5_CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  83683. CRTC5_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  83684. CRTC5_CRTC_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  83685. CRTC5_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  83686. CRTC5_CRTC_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  83687. CRTC5_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  83688. CRTC5_CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  83689. CRTC5_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  83690. CRTC5_CRTC_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  83691. CRTC5_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  83692. CRTC5_CRTC_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  83693. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  83694. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  83695. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  83696. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  83697. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  83698. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  83699. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  83700. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  83701. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  83702. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  83703. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  83704. CRTC5_CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  83705. CRTC5_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  83706. CRTC5_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  83707. CRTC5_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  83708. CRTC5_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  83709. CRTC5_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  83710. CRTC5_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  83711. CRTC5_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  83712. CRTC5_CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  83713. CRTC5_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  83714. CRTC5_CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  83715. CRTC5_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  83716. CRTC5_CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  83717. CRTC5_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  83718. CRTC5_CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  83719. CRTC5_CRTC_V_TOTAL__CRTC_V_TOTAL_MASK
  83720. CRTC5_CRTC_V_TOTAL__CRTC_V_TOTAL__SHIFT
  83721. CRTC5_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  83722. CRTC5_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  83723. CRTC5_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  83724. CRTC5_CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  83725. CRTC5_PHYPLL_PIXEL_RATE_CNTL__CRTC5_PHYPLL_PIXEL_RATE_SOURCE_MASK
  83726. CRTC5_PHYPLL_PIXEL_RATE_CNTL__CRTC5_PHYPLL_PIXEL_RATE_SOURCE__SHIFT
  83727. CRTC5_PHYPLL_PIXEL_RATE_CNTL__CRTC5_PIXEL_RATE_PLL_SOURCE_MASK
  83728. CRTC5_PHYPLL_PIXEL_RATE_CNTL__CRTC5_PIXEL_RATE_PLL_SOURCE__SHIFT
  83729. CRTC5_PIXEL_RATE_CNTL__CRTC5_ADD_PIXEL_MASK
  83730. CRTC5_PIXEL_RATE_CNTL__CRTC5_ADD_PIXEL__SHIFT
  83731. CRTC5_PIXEL_RATE_CNTL__CRTC5_DISPOUT_ERROR_COUNT_MASK
  83732. CRTC5_PIXEL_RATE_CNTL__CRTC5_DISPOUT_ERROR_COUNT__SHIFT
  83733. CRTC5_PIXEL_RATE_CNTL__CRTC5_DISPOUT_FIFO_ERROR_MASK
  83734. CRTC5_PIXEL_RATE_CNTL__CRTC5_DISPOUT_FIFO_ERROR__SHIFT
  83735. CRTC5_PIXEL_RATE_CNTL__CRTC5_DISPOUT_HALF_RATE_EN_MASK
  83736. CRTC5_PIXEL_RATE_CNTL__CRTC5_DISPOUT_HALF_RATE_EN__SHIFT
  83737. CRTC5_PIXEL_RATE_CNTL__CRTC5_DROP_PIXEL_MASK
  83738. CRTC5_PIXEL_RATE_CNTL__CRTC5_DROP_PIXEL__SHIFT
  83739. CRTC5_PIXEL_RATE_CNTL__CRTC5_PIXEL_RATE_SOURCE_MASK
  83740. CRTC5_PIXEL_RATE_CNTL__CRTC5_PIXEL_RATE_SOURCE__SHIFT
  83741. CRTC5_PIXEL_RATE_CNTL__DP_DTO5_DS_DISABLE_MASK
  83742. CRTC5_PIXEL_RATE_CNTL__DP_DTO5_DS_DISABLE__SHIFT
  83743. CRTC5_PIXEL_RATE_CNTL__DP_DTO5_ENABLE_MASK
  83744. CRTC5_PIXEL_RATE_CNTL__DP_DTO5_ENABLE__SHIFT
  83745. CRTC5_REGISTER_OFFSET
  83746. CRTC6_REGISTER_OFFSET
  83747. CRTC8_DATA_1__VCRTC_DATA_MASK
  83748. CRTC8_DATA_1__VCRTC_DATA__SHIFT
  83749. CRTC8_DATA__VCRTC_DATA_MASK
  83750. CRTC8_DATA__VCRTC_DATA__SHIFT
  83751. CRTC8_IDX_1__VCRTC_IDX_MASK
  83752. CRTC8_IDX_1__VCRTC_IDX__SHIFT
  83753. CRTC8_IDX__VCRTC_IDX_MASK
  83754. CRTC8_IDX__VCRTC_IDX__SHIFT
  83755. CRTCModuleTest
  83756. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  83757. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  83758. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  83759. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  83760. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  83761. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  83762. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  83763. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  83764. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  83765. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  83766. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  83767. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  83768. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  83769. CRTCV0_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  83770. CRTCV0_CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  83771. CRTCV0_CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  83772. CRTCV0_CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  83773. CRTCV0_CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  83774. CRTCV0_CRTCV_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  83775. CRTCV0_CRTCV_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  83776. CRTCV0_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  83777. CRTCV0_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  83778. CRTCV0_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  83779. CRTCV0_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  83780. CRTCV0_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  83781. CRTCV0_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  83782. CRTCV0_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  83783. CRTCV0_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  83784. CRTCV0_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  83785. CRTCV0_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  83786. CRTCV0_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  83787. CRTCV0_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  83788. CRTCV0_CRTCV_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  83789. CRTCV0_CRTCV_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  83790. CRTCV0_CRTCV_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  83791. CRTCV0_CRTCV_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  83792. CRTCV0_CRTCV_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  83793. CRTCV0_CRTCV_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  83794. CRTCV0_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  83795. CRTCV0_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  83796. CRTCV0_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  83797. CRTCV0_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  83798. CRTCV0_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  83799. CRTCV0_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  83800. CRTCV0_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  83801. CRTCV0_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  83802. CRTCV0_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  83803. CRTCV0_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  83804. CRTCV0_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  83805. CRTCV0_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  83806. CRTCV0_CRTCV_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  83807. CRTCV0_CRTCV_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  83808. CRTCV0_CRTCV_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  83809. CRTCV0_CRTCV_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  83810. CRTCV0_CRTCV_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  83811. CRTCV0_CRTCV_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  83812. CRTCV0_CRTCV_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  83813. CRTCV0_CRTCV_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  83814. CRTCV0_CRTCV_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  83815. CRTCV0_CRTCV_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  83816. CRTCV0_CRTCV_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  83817. CRTCV0_CRTCV_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  83818. CRTCV0_CRTCV_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  83819. CRTCV0_CRTCV_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  83820. CRTCV0_CRTCV_CONTROL__CRTC_MASTER_EN_MASK
  83821. CRTCV0_CRTCV_CONTROL__CRTC_MASTER_EN__SHIFT
  83822. CRTCV0_CRTCV_CONTROL__CRTC_SOF_PULL_EN_MASK
  83823. CRTCV0_CRTCV_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  83824. CRTCV0_CRTCV_CONTROL__CRTC_START_POINT_CNTL_MASK
  83825. CRTCV0_CRTCV_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  83826. CRTCV0_CRTCV_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  83827. CRTCV0_CRTCV_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  83828. CRTCV0_CRTCV_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  83829. CRTCV0_CRTCV_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  83830. CRTCV0_CRTCV_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  83831. CRTCV0_CRTCV_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  83832. CRTCV0_CRTCV_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  83833. CRTCV0_CRTCV_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  83834. CRTCV0_CRTCV_CRC0_DATA_B__CRC0_B_CB_MASK
  83835. CRTCV0_CRTCV_CRC0_DATA_B__CRC0_B_CB__SHIFT
  83836. CRTCV0_CRTCV_CRC0_DATA_RG__CRC0_G_Y_MASK
  83837. CRTCV0_CRTCV_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  83838. CRTCV0_CRTCV_CRC0_DATA_RG__CRC0_R_CR_MASK
  83839. CRTCV0_CRTCV_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  83840. CRTCV0_CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  83841. CRTCV0_CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  83842. CRTCV0_CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  83843. CRTCV0_CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  83844. CRTCV0_CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  83845. CRTCV0_CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  83846. CRTCV0_CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  83847. CRTCV0_CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  83848. CRTCV0_CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  83849. CRTCV0_CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  83850. CRTCV0_CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  83851. CRTCV0_CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  83852. CRTCV0_CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  83853. CRTCV0_CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  83854. CRTCV0_CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  83855. CRTCV0_CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  83856. CRTCV0_CRTCV_CRC1_DATA_B__CRC1_B_CB_MASK
  83857. CRTCV0_CRTCV_CRC1_DATA_B__CRC1_B_CB__SHIFT
  83858. CRTCV0_CRTCV_CRC1_DATA_RG__CRC1_G_Y_MASK
  83859. CRTCV0_CRTCV_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  83860. CRTCV0_CRTCV_CRC1_DATA_RG__CRC1_R_CR_MASK
  83861. CRTCV0_CRTCV_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  83862. CRTCV0_CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  83863. CRTCV0_CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  83864. CRTCV0_CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  83865. CRTCV0_CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  83866. CRTCV0_CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  83867. CRTCV0_CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  83868. CRTCV0_CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  83869. CRTCV0_CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  83870. CRTCV0_CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  83871. CRTCV0_CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  83872. CRTCV0_CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  83873. CRTCV0_CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  83874. CRTCV0_CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  83875. CRTCV0_CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  83876. CRTCV0_CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  83877. CRTCV0_CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  83878. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  83879. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  83880. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  83881. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  83882. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  83883. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  83884. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_EN_MASK
  83885. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_EN__SHIFT
  83886. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  83887. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  83888. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  83889. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  83890. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  83891. CRTCV0_CRTCV_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  83892. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  83893. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  83894. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_MASK
  83895. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE__SHIFT
  83896. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING_MASK
  83897. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING__SHIFT
  83898. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  83899. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  83900. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  83901. CRTCV0_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  83902. CRTCV0_CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  83903. CRTCV0_CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  83904. CRTCV0_CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  83905. CRTCV0_CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  83906. CRTCV0_CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  83907. CRTCV0_CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  83908. CRTCV0_CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  83909. CRTCV0_CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  83910. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  83911. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  83912. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  83913. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  83914. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  83915. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  83916. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  83917. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  83918. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  83919. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  83920. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  83921. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  83922. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  83923. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  83924. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  83925. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  83926. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  83927. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  83928. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  83929. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  83930. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  83931. CRTCV0_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  83932. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  83933. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  83934. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  83935. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  83936. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  83937. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  83938. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  83939. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  83940. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  83941. CRTCV0_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  83942. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  83943. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  83944. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  83945. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  83946. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  83947. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  83948. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  83949. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  83950. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  83951. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  83952. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  83953. CRTCV0_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  83954. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  83955. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  83956. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  83957. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  83958. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  83959. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  83960. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  83961. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  83962. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  83963. CRTCV0_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  83964. CRTCV0_CRTCV_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  83965. CRTCV0_CRTCV_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  83966. CRTCV0_CRTCV_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  83967. CRTCV0_CRTCV_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  83968. CRTCV0_CRTCV_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  83969. CRTCV0_CRTCV_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  83970. CRTCV0_CRTCV_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  83971. CRTCV0_CRTCV_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  83972. CRTCV0_CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  83973. CRTCV0_CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  83974. CRTCV0_CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  83975. CRTCV0_CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  83976. CRTCV0_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  83977. CRTCV0_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  83978. CRTCV0_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  83979. CRTCV0_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  83980. CRTCV0_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  83981. CRTCV0_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  83982. CRTCV0_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  83983. CRTCV0_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  83984. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  83985. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  83986. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  83987. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  83988. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  83989. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  83990. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  83991. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  83992. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  83993. CRTCV0_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  83994. CRTCV0_CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  83995. CRTCV0_CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  83996. CRTCV0_CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  83997. CRTCV0_CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  83998. CRTCV0_CRTCV_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  83999. CRTCV0_CRTCV_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  84000. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  84001. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  84002. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  84003. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  84004. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  84005. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  84006. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  84007. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  84008. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  84009. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  84010. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  84011. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  84012. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  84013. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  84014. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  84015. CRTCV0_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  84016. CRTCV0_CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  84017. CRTCV0_CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  84018. CRTCV0_CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  84019. CRTCV0_CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  84020. CRTCV0_CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  84021. CRTCV0_CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  84022. CRTCV0_CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  84023. CRTCV0_CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  84024. CRTCV0_CRTCV_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  84025. CRTCV0_CRTCV_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  84026. CRTCV0_CRTCV_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  84027. CRTCV0_CRTCV_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  84028. CRTCV0_CRTCV_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  84029. CRTCV0_CRTCV_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  84030. CRTCV0_CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  84031. CRTCV0_CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  84032. CRTCV0_CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  84033. CRTCV0_CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  84034. CRTCV0_CRTCV_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  84035. CRTCV0_CRTCV_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  84036. CRTCV0_CRTCV_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  84037. CRTCV0_CRTCV_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  84038. CRTCV0_CRTCV_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  84039. CRTCV0_CRTCV_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  84040. CRTCV0_CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  84041. CRTCV0_CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  84042. CRTCV0_CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  84043. CRTCV0_CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  84044. CRTCV0_CRTCV_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  84045. CRTCV0_CRTCV_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  84046. CRTCV0_CRTCV_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  84047. CRTCV0_CRTCV_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  84048. CRTCV0_CRTCV_H_TOTAL__CRTC_H_TOTAL_MASK
  84049. CRTCV0_CRTCV_H_TOTAL__CRTC_H_TOTAL__SHIFT
  84050. CRTCV0_CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  84051. CRTCV0_CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  84052. CRTCV0_CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  84053. CRTCV0_CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  84054. CRTCV0_CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  84055. CRTCV0_CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  84056. CRTCV0_CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  84057. CRTCV0_CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  84058. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  84059. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  84060. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  84061. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  84062. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  84063. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  84064. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  84065. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  84066. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  84067. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  84068. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  84069. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  84070. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  84071. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  84072. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  84073. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  84074. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  84075. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  84076. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  84077. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  84078. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  84079. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  84080. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  84081. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  84082. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  84083. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  84084. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  84085. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  84086. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  84087. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  84088. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  84089. CRTCV0_CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  84090. CRTCV0_CRTCV_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  84091. CRTCV0_CRTCV_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  84092. CRTCV0_CRTCV_MASTER_EN__CRTC_MASTER_EN_MASK
  84093. CRTCV0_CRTCV_MASTER_EN__CRTC_MASTER_EN__SHIFT
  84094. CRTCV0_CRTCV_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  84095. CRTCV0_CRTCV_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  84096. CRTCV0_CRTCV_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  84097. CRTCV0_CRTCV_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  84098. CRTCV0_CRTCV_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  84099. CRTCV0_CRTCV_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  84100. CRTCV0_CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  84101. CRTCV0_CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  84102. CRTCV0_CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  84103. CRTCV0_CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  84104. CRTCV0_CRTCV_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  84105. CRTCV0_CRTCV_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  84106. CRTCV0_CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  84107. CRTCV0_CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  84108. CRTCV0_CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  84109. CRTCV0_CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  84110. CRTCV0_CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  84111. CRTCV0_CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  84112. CRTCV0_CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  84113. CRTCV0_CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  84114. CRTCV0_CRTCV_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  84115. CRTCV0_CRTCV_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  84116. CRTCV0_CRTCV_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  84117. CRTCV0_CRTCV_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  84118. CRTCV0_CRTCV_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  84119. CRTCV0_CRTCV_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  84120. CRTCV0_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  84121. CRTCV0_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  84122. CRTCV0_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  84123. CRTCV0_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  84124. CRTCV0_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  84125. CRTCV0_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  84126. CRTCV0_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  84127. CRTCV0_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  84128. CRTCV0_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  84129. CRTCV0_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  84130. CRTCV0_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  84131. CRTCV0_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  84132. CRTCV0_CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  84133. CRTCV0_CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  84134. CRTCV0_CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  84135. CRTCV0_CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  84136. CRTCV0_CRTCV_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  84137. CRTCV0_CRTCV_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  84138. CRTCV0_CRTCV_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  84139. CRTCV0_CRTCV_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  84140. CRTCV0_CRTCV_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  84141. CRTCV0_CRTCV_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  84142. CRTCV0_CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  84143. CRTCV0_CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  84144. CRTCV0_CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  84145. CRTCV0_CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  84146. CRTCV0_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  84147. CRTCV0_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  84148. CRTCV0_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  84149. CRTCV0_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  84150. CRTCV0_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  84151. CRTCV0_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  84152. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  84153. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  84154. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  84155. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  84156. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  84157. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  84158. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  84159. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  84160. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  84161. CRTCV0_CRTCV_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  84162. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  84163. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  84164. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  84165. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  84166. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  84167. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  84168. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  84169. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  84170. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  84171. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  84172. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  84173. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  84174. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  84175. CRTCV0_CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  84176. CRTCV0_CRTCV_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  84177. CRTCV0_CRTCV_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  84178. CRTCV0_CRTCV_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  84179. CRTCV0_CRTCV_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  84180. CRTCV0_CRTCV_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  84181. CRTCV0_CRTCV_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  84182. CRTCV0_CRTCV_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  84183. CRTCV0_CRTCV_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  84184. CRTCV0_CRTCV_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  84185. CRTCV0_CRTCV_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  84186. CRTCV0_CRTCV_STATUS__CRTC_H_ACTIVE_DISP_MASK
  84187. CRTCV0_CRTCV_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  84188. CRTCV0_CRTCV_STATUS__CRTC_H_BLANK_MASK
  84189. CRTCV0_CRTCV_STATUS__CRTC_H_BLANK__SHIFT
  84190. CRTCV0_CRTCV_STATUS__CRTC_H_SYNC_A_MASK
  84191. CRTCV0_CRTCV_STATUS__CRTC_H_SYNC_A__SHIFT
  84192. CRTCV0_CRTCV_STATUS__CRTC_V_ACTIVE_DISP_MASK
  84193. CRTCV0_CRTCV_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  84194. CRTCV0_CRTCV_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  84195. CRTCV0_CRTCV_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  84196. CRTCV0_CRTCV_STATUS__CRTC_V_BLANK_MASK
  84197. CRTCV0_CRTCV_STATUS__CRTC_V_BLANK__SHIFT
  84198. CRTCV0_CRTCV_STATUS__CRTC_V_START_LINE_MASK
  84199. CRTCV0_CRTCV_STATUS__CRTC_V_START_LINE__SHIFT
  84200. CRTCV0_CRTCV_STATUS__CRTC_V_SYNC_A_MASK
  84201. CRTCV0_CRTCV_STATUS__CRTC_V_SYNC_A__SHIFT
  84202. CRTCV0_CRTCV_STATUS__CRTC_V_UPDATE_MASK
  84203. CRTCV0_CRTCV_STATUS__CRTC_V_UPDATE__SHIFT
  84204. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  84205. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  84206. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  84207. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  84208. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  84209. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  84210. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  84211. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  84212. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  84213. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  84214. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  84215. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  84216. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  84217. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  84218. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  84219. CRTCV0_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  84220. CRTCV0_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  84221. CRTCV0_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  84222. CRTCV0_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  84223. CRTCV0_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  84224. CRTCV0_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  84225. CRTCV0_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  84226. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  84227. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  84228. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  84229. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  84230. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  84231. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  84232. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  84233. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  84234. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  84235. CRTCV0_CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  84236. CRTCV0_CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  84237. CRTCV0_CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  84238. CRTCV0_CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  84239. CRTCV0_CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  84240. CRTCV0_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  84241. CRTCV0_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  84242. CRTCV0_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  84243. CRTCV0_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  84244. CRTCV0_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  84245. CRTCV0_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  84246. CRTCV0_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  84247. CRTCV0_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  84248. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  84249. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  84250. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  84251. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  84252. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  84253. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  84254. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  84255. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  84256. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  84257. CRTCV0_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  84258. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  84259. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  84260. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  84261. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  84262. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  84263. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  84264. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  84265. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  84266. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  84267. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  84268. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  84269. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  84270. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  84271. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  84272. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  84273. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  84274. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  84275. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  84276. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  84277. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  84278. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  84279. CRTCV0_CRTCV_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  84280. CRTCV0_CRTCV_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  84281. CRTCV0_CRTCV_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  84282. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  84283. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  84284. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  84285. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  84286. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  84287. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  84288. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  84289. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  84290. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  84291. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  84292. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  84293. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  84294. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  84295. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  84296. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  84297. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  84298. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  84299. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  84300. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  84301. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  84302. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  84303. CRTCV0_CRTCV_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  84304. CRTCV0_CRTCV_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  84305. CRTCV0_CRTCV_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  84306. CRTCV0_CRTCV_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  84307. CRTCV0_CRTCV_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  84308. CRTCV0_CRTCV_VBI_END__CRTC_VBI_H_END_MASK
  84309. CRTCV0_CRTCV_VBI_END__CRTC_VBI_H_END__SHIFT
  84310. CRTCV0_CRTCV_VBI_END__CRTC_VBI_V_END_MASK
  84311. CRTCV0_CRTCV_VBI_END__CRTC_VBI_V_END__SHIFT
  84312. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  84313. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  84314. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  84315. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  84316. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  84317. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  84318. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  84319. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  84320. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  84321. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  84322. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  84323. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  84324. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  84325. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  84326. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  84327. CRTCV0_CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  84328. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  84329. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  84330. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  84331. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  84332. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  84333. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  84334. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  84335. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  84336. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  84337. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  84338. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  84339. CRTCV0_CRTCV_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  84340. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  84341. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  84342. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  84343. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  84344. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  84345. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  84346. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  84347. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  84348. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  84349. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  84350. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  84351. CRTCV0_CRTCV_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  84352. CRTCV0_CRTCV_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  84353. CRTCV0_CRTCV_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  84354. CRTCV0_CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  84355. CRTCV0_CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  84356. CRTCV0_CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  84357. CRTCV0_CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  84358. CRTCV0_CRTCV_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  84359. CRTCV0_CRTCV_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  84360. CRTCV0_CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  84361. CRTCV0_CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  84362. CRTCV0_CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  84363. CRTCV0_CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  84364. CRTCV0_CRTCV_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  84365. CRTCV0_CRTCV_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  84366. CRTCV0_CRTCV_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  84367. CRTCV0_CRTCV_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  84368. CRTCV0_CRTCV_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  84369. CRTCV0_CRTCV_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  84370. CRTCV0_CRTCV_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  84371. CRTCV0_CRTCV_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  84372. CRTCV0_CRTCV_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  84373. CRTCV0_CRTCV_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  84374. CRTCV0_CRTCV_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  84375. CRTCV0_CRTCV_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  84376. CRTCV0_CRTCV_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  84377. CRTCV0_CRTCV_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  84378. CRTCV0_CRTCV_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  84379. CRTCV0_CRTCV_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  84380. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  84381. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  84382. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  84383. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  84384. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  84385. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  84386. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  84387. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  84388. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  84389. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  84390. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  84391. CRTCV0_CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  84392. CRTCV0_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  84393. CRTCV0_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  84394. CRTCV0_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  84395. CRTCV0_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  84396. CRTCV0_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  84397. CRTCV0_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  84398. CRTCV0_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  84399. CRTCV0_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  84400. CRTCV0_CRTCV_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  84401. CRTCV0_CRTCV_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  84402. CRTCV0_CRTCV_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  84403. CRTCV0_CRTCV_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  84404. CRTCV0_CRTCV_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  84405. CRTCV0_CRTCV_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  84406. CRTCV0_CRTCV_V_TOTAL__CRTC_V_TOTAL_MASK
  84407. CRTCV0_CRTCV_V_TOTAL__CRTC_V_TOTAL__SHIFT
  84408. CRTCV0_CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  84409. CRTCV0_CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  84410. CRTCV0_CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  84411. CRTCV0_CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  84412. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  84413. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  84414. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  84415. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  84416. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  84417. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  84418. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  84419. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  84420. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  84421. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  84422. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  84423. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  84424. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  84425. CRTCV1_CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  84426. CRTCV1_CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  84427. CRTCV1_CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  84428. CRTCV1_CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  84429. CRTCV1_CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  84430. CRTCV1_CRTCV_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  84431. CRTCV1_CRTCV_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  84432. CRTCV1_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  84433. CRTCV1_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  84434. CRTCV1_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  84435. CRTCV1_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  84436. CRTCV1_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  84437. CRTCV1_CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  84438. CRTCV1_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  84439. CRTCV1_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  84440. CRTCV1_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  84441. CRTCV1_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  84442. CRTCV1_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  84443. CRTCV1_CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  84444. CRTCV1_CRTCV_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  84445. CRTCV1_CRTCV_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  84446. CRTCV1_CRTCV_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  84447. CRTCV1_CRTCV_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  84448. CRTCV1_CRTCV_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  84449. CRTCV1_CRTCV_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  84450. CRTCV1_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  84451. CRTCV1_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  84452. CRTCV1_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  84453. CRTCV1_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  84454. CRTCV1_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  84455. CRTCV1_CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  84456. CRTCV1_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  84457. CRTCV1_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  84458. CRTCV1_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  84459. CRTCV1_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  84460. CRTCV1_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  84461. CRTCV1_CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  84462. CRTCV1_CRTCV_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  84463. CRTCV1_CRTCV_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  84464. CRTCV1_CRTCV_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  84465. CRTCV1_CRTCV_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  84466. CRTCV1_CRTCV_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  84467. CRTCV1_CRTCV_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  84468. CRTCV1_CRTCV_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  84469. CRTCV1_CRTCV_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  84470. CRTCV1_CRTCV_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  84471. CRTCV1_CRTCV_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  84472. CRTCV1_CRTCV_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  84473. CRTCV1_CRTCV_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  84474. CRTCV1_CRTCV_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  84475. CRTCV1_CRTCV_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  84476. CRTCV1_CRTCV_CONTROL__CRTC_MASTER_EN_MASK
  84477. CRTCV1_CRTCV_CONTROL__CRTC_MASTER_EN__SHIFT
  84478. CRTCV1_CRTCV_CONTROL__CRTC_SOF_PULL_EN_MASK
  84479. CRTCV1_CRTCV_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  84480. CRTCV1_CRTCV_CONTROL__CRTC_START_POINT_CNTL_MASK
  84481. CRTCV1_CRTCV_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  84482. CRTCV1_CRTCV_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  84483. CRTCV1_CRTCV_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  84484. CRTCV1_CRTCV_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  84485. CRTCV1_CRTCV_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  84486. CRTCV1_CRTCV_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  84487. CRTCV1_CRTCV_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  84488. CRTCV1_CRTCV_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  84489. CRTCV1_CRTCV_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  84490. CRTCV1_CRTCV_CRC0_DATA_B__CRC0_B_CB_MASK
  84491. CRTCV1_CRTCV_CRC0_DATA_B__CRC0_B_CB__SHIFT
  84492. CRTCV1_CRTCV_CRC0_DATA_RG__CRC0_G_Y_MASK
  84493. CRTCV1_CRTCV_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  84494. CRTCV1_CRTCV_CRC0_DATA_RG__CRC0_R_CR_MASK
  84495. CRTCV1_CRTCV_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  84496. CRTCV1_CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  84497. CRTCV1_CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  84498. CRTCV1_CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  84499. CRTCV1_CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  84500. CRTCV1_CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  84501. CRTCV1_CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  84502. CRTCV1_CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  84503. CRTCV1_CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  84504. CRTCV1_CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  84505. CRTCV1_CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  84506. CRTCV1_CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  84507. CRTCV1_CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  84508. CRTCV1_CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  84509. CRTCV1_CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  84510. CRTCV1_CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  84511. CRTCV1_CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  84512. CRTCV1_CRTCV_CRC1_DATA_B__CRC1_B_CB_MASK
  84513. CRTCV1_CRTCV_CRC1_DATA_B__CRC1_B_CB__SHIFT
  84514. CRTCV1_CRTCV_CRC1_DATA_RG__CRC1_G_Y_MASK
  84515. CRTCV1_CRTCV_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  84516. CRTCV1_CRTCV_CRC1_DATA_RG__CRC1_R_CR_MASK
  84517. CRTCV1_CRTCV_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  84518. CRTCV1_CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  84519. CRTCV1_CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  84520. CRTCV1_CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  84521. CRTCV1_CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  84522. CRTCV1_CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  84523. CRTCV1_CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  84524. CRTCV1_CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  84525. CRTCV1_CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  84526. CRTCV1_CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  84527. CRTCV1_CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  84528. CRTCV1_CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  84529. CRTCV1_CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  84530. CRTCV1_CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  84531. CRTCV1_CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  84532. CRTCV1_CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  84533. CRTCV1_CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  84534. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  84535. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  84536. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  84537. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  84538. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  84539. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  84540. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_EN_MASK
  84541. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_EN__SHIFT
  84542. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  84543. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  84544. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  84545. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  84546. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  84547. CRTCV1_CRTCV_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  84548. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  84549. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  84550. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_MASK
  84551. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_MODE__SHIFT
  84552. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING_MASK
  84553. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_RANGE_TIMING_DBUF_UPDATE_PENDING__SHIFT
  84554. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  84555. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  84556. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  84557. CRTCV1_CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  84558. CRTCV1_CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  84559. CRTCV1_CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  84560. CRTCV1_CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  84561. CRTCV1_CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  84562. CRTCV1_CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  84563. CRTCV1_CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  84564. CRTCV1_CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  84565. CRTCV1_CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  84566. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  84567. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  84568. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  84569. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  84570. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  84571. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  84572. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  84573. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  84574. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  84575. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  84576. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  84577. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  84578. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  84579. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  84580. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  84581. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  84582. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  84583. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  84584. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  84585. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  84586. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  84587. CRTCV1_CRTCV_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  84588. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  84589. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  84590. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  84591. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  84592. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  84593. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  84594. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  84595. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  84596. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  84597. CRTCV1_CRTCV_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  84598. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  84599. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  84600. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  84601. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  84602. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  84603. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  84604. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  84605. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  84606. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  84607. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  84608. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  84609. CRTCV1_CRTCV_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  84610. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  84611. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  84612. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  84613. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  84614. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  84615. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  84616. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  84617. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  84618. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  84619. CRTCV1_CRTCV_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  84620. CRTCV1_CRTCV_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  84621. CRTCV1_CRTCV_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  84622. CRTCV1_CRTCV_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  84623. CRTCV1_CRTCV_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  84624. CRTCV1_CRTCV_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  84625. CRTCV1_CRTCV_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  84626. CRTCV1_CRTCV_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  84627. CRTCV1_CRTCV_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  84628. CRTCV1_CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  84629. CRTCV1_CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  84630. CRTCV1_CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  84631. CRTCV1_CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  84632. CRTCV1_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  84633. CRTCV1_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  84634. CRTCV1_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  84635. CRTCV1_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  84636. CRTCV1_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  84637. CRTCV1_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  84638. CRTCV1_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  84639. CRTCV1_CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  84640. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  84641. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  84642. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  84643. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  84644. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  84645. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  84646. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  84647. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  84648. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  84649. CRTCV1_CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  84650. CRTCV1_CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  84651. CRTCV1_CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  84652. CRTCV1_CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  84653. CRTCV1_CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  84654. CRTCV1_CRTCV_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  84655. CRTCV1_CRTCV_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  84656. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  84657. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  84658. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  84659. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  84660. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  84661. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  84662. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  84663. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  84664. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  84665. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  84666. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  84667. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  84668. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  84669. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  84670. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  84671. CRTCV1_CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  84672. CRTCV1_CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  84673. CRTCV1_CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  84674. CRTCV1_CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  84675. CRTCV1_CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  84676. CRTCV1_CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  84677. CRTCV1_CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  84678. CRTCV1_CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  84679. CRTCV1_CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  84680. CRTCV1_CRTCV_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  84681. CRTCV1_CRTCV_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  84682. CRTCV1_CRTCV_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  84683. CRTCV1_CRTCV_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  84684. CRTCV1_CRTCV_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  84685. CRTCV1_CRTCV_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  84686. CRTCV1_CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  84687. CRTCV1_CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  84688. CRTCV1_CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  84689. CRTCV1_CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  84690. CRTCV1_CRTCV_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  84691. CRTCV1_CRTCV_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  84692. CRTCV1_CRTCV_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  84693. CRTCV1_CRTCV_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  84694. CRTCV1_CRTCV_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  84695. CRTCV1_CRTCV_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  84696. CRTCV1_CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  84697. CRTCV1_CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  84698. CRTCV1_CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  84699. CRTCV1_CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  84700. CRTCV1_CRTCV_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  84701. CRTCV1_CRTCV_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  84702. CRTCV1_CRTCV_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  84703. CRTCV1_CRTCV_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  84704. CRTCV1_CRTCV_H_TOTAL__CRTC_H_TOTAL_MASK
  84705. CRTCV1_CRTCV_H_TOTAL__CRTC_H_TOTAL__SHIFT
  84706. CRTCV1_CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  84707. CRTCV1_CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  84708. CRTCV1_CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  84709. CRTCV1_CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  84710. CRTCV1_CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  84711. CRTCV1_CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  84712. CRTCV1_CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  84713. CRTCV1_CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  84714. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  84715. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  84716. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  84717. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  84718. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  84719. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  84720. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  84721. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  84722. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  84723. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  84724. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  84725. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  84726. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  84727. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  84728. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  84729. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  84730. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  84731. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  84732. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  84733. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  84734. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  84735. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  84736. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  84737. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  84738. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  84739. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  84740. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  84741. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  84742. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  84743. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  84744. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  84745. CRTCV1_CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  84746. CRTCV1_CRTCV_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  84747. CRTCV1_CRTCV_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  84748. CRTCV1_CRTCV_MASTER_EN__CRTC_MASTER_EN_MASK
  84749. CRTCV1_CRTCV_MASTER_EN__CRTC_MASTER_EN__SHIFT
  84750. CRTCV1_CRTCV_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  84751. CRTCV1_CRTCV_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  84752. CRTCV1_CRTCV_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  84753. CRTCV1_CRTCV_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  84754. CRTCV1_CRTCV_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  84755. CRTCV1_CRTCV_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  84756. CRTCV1_CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  84757. CRTCV1_CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  84758. CRTCV1_CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  84759. CRTCV1_CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  84760. CRTCV1_CRTCV_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  84761. CRTCV1_CRTCV_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  84762. CRTCV1_CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  84763. CRTCV1_CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  84764. CRTCV1_CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  84765. CRTCV1_CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  84766. CRTCV1_CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  84767. CRTCV1_CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  84768. CRTCV1_CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  84769. CRTCV1_CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  84770. CRTCV1_CRTCV_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  84771. CRTCV1_CRTCV_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  84772. CRTCV1_CRTCV_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  84773. CRTCV1_CRTCV_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  84774. CRTCV1_CRTCV_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  84775. CRTCV1_CRTCV_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  84776. CRTCV1_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  84777. CRTCV1_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  84778. CRTCV1_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  84779. CRTCV1_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  84780. CRTCV1_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  84781. CRTCV1_CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  84782. CRTCV1_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  84783. CRTCV1_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  84784. CRTCV1_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  84785. CRTCV1_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  84786. CRTCV1_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  84787. CRTCV1_CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  84788. CRTCV1_CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  84789. CRTCV1_CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  84790. CRTCV1_CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  84791. CRTCV1_CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  84792. CRTCV1_CRTCV_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  84793. CRTCV1_CRTCV_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  84794. CRTCV1_CRTCV_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  84795. CRTCV1_CRTCV_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  84796. CRTCV1_CRTCV_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  84797. CRTCV1_CRTCV_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  84798. CRTCV1_CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  84799. CRTCV1_CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  84800. CRTCV1_CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  84801. CRTCV1_CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  84802. CRTCV1_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  84803. CRTCV1_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  84804. CRTCV1_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  84805. CRTCV1_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  84806. CRTCV1_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  84807. CRTCV1_CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  84808. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  84809. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  84810. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  84811. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  84812. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  84813. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  84814. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  84815. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  84816. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  84817. CRTCV1_CRTCV_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  84818. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  84819. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  84820. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  84821. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  84822. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  84823. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  84824. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  84825. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  84826. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  84827. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  84828. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  84829. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  84830. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  84831. CRTCV1_CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  84832. CRTCV1_CRTCV_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  84833. CRTCV1_CRTCV_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  84834. CRTCV1_CRTCV_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  84835. CRTCV1_CRTCV_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  84836. CRTCV1_CRTCV_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  84837. CRTCV1_CRTCV_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  84838. CRTCV1_CRTCV_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  84839. CRTCV1_CRTCV_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  84840. CRTCV1_CRTCV_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  84841. CRTCV1_CRTCV_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  84842. CRTCV1_CRTCV_STATUS__CRTC_H_ACTIVE_DISP_MASK
  84843. CRTCV1_CRTCV_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  84844. CRTCV1_CRTCV_STATUS__CRTC_H_BLANK_MASK
  84845. CRTCV1_CRTCV_STATUS__CRTC_H_BLANK__SHIFT
  84846. CRTCV1_CRTCV_STATUS__CRTC_H_SYNC_A_MASK
  84847. CRTCV1_CRTCV_STATUS__CRTC_H_SYNC_A__SHIFT
  84848. CRTCV1_CRTCV_STATUS__CRTC_V_ACTIVE_DISP_MASK
  84849. CRTCV1_CRTCV_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  84850. CRTCV1_CRTCV_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  84851. CRTCV1_CRTCV_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  84852. CRTCV1_CRTCV_STATUS__CRTC_V_BLANK_MASK
  84853. CRTCV1_CRTCV_STATUS__CRTC_V_BLANK__SHIFT
  84854. CRTCV1_CRTCV_STATUS__CRTC_V_START_LINE_MASK
  84855. CRTCV1_CRTCV_STATUS__CRTC_V_START_LINE__SHIFT
  84856. CRTCV1_CRTCV_STATUS__CRTC_V_SYNC_A_MASK
  84857. CRTCV1_CRTCV_STATUS__CRTC_V_SYNC_A__SHIFT
  84858. CRTCV1_CRTCV_STATUS__CRTC_V_UPDATE_MASK
  84859. CRTCV1_CRTCV_STATUS__CRTC_V_UPDATE__SHIFT
  84860. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  84861. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  84862. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  84863. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  84864. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  84865. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  84866. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  84867. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  84868. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  84869. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  84870. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  84871. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  84872. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  84873. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  84874. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  84875. CRTCV1_CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  84876. CRTCV1_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  84877. CRTCV1_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  84878. CRTCV1_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  84879. CRTCV1_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  84880. CRTCV1_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  84881. CRTCV1_CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  84882. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  84883. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  84884. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  84885. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  84886. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  84887. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  84888. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  84889. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  84890. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  84891. CRTCV1_CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  84892. CRTCV1_CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  84893. CRTCV1_CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  84894. CRTCV1_CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  84895. CRTCV1_CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  84896. CRTCV1_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  84897. CRTCV1_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  84898. CRTCV1_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  84899. CRTCV1_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  84900. CRTCV1_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  84901. CRTCV1_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  84902. CRTCV1_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  84903. CRTCV1_CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  84904. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  84905. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  84906. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  84907. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  84908. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  84909. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  84910. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  84911. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  84912. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  84913. CRTCV1_CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  84914. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  84915. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  84916. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  84917. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  84918. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  84919. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  84920. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  84921. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  84922. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  84923. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  84924. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  84925. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  84926. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  84927. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  84928. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  84929. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  84930. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  84931. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  84932. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  84933. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  84934. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  84935. CRTCV1_CRTCV_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  84936. CRTCV1_CRTCV_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  84937. CRTCV1_CRTCV_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  84938. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  84939. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  84940. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  84941. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  84942. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  84943. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  84944. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  84945. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  84946. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  84947. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  84948. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  84949. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  84950. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  84951. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  84952. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  84953. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  84954. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  84955. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  84956. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  84957. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  84958. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  84959. CRTCV1_CRTCV_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  84960. CRTCV1_CRTCV_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  84961. CRTCV1_CRTCV_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  84962. CRTCV1_CRTCV_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  84963. CRTCV1_CRTCV_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  84964. CRTCV1_CRTCV_VBI_END__CRTC_VBI_H_END_MASK
  84965. CRTCV1_CRTCV_VBI_END__CRTC_VBI_H_END__SHIFT
  84966. CRTCV1_CRTCV_VBI_END__CRTC_VBI_V_END_MASK
  84967. CRTCV1_CRTCV_VBI_END__CRTC_VBI_V_END__SHIFT
  84968. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  84969. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  84970. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  84971. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  84972. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  84973. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  84974. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  84975. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  84976. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  84977. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  84978. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  84979. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  84980. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  84981. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  84982. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  84983. CRTCV1_CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  84984. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  84985. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  84986. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  84987. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  84988. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  84989. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  84990. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  84991. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  84992. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  84993. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  84994. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  84995. CRTCV1_CRTCV_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  84996. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  84997. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  84998. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  84999. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  85000. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  85001. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  85002. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  85003. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  85004. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  85005. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  85006. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  85007. CRTCV1_CRTCV_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  85008. CRTCV1_CRTCV_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  85009. CRTCV1_CRTCV_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  85010. CRTCV1_CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  85011. CRTCV1_CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  85012. CRTCV1_CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  85013. CRTCV1_CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  85014. CRTCV1_CRTCV_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  85015. CRTCV1_CRTCV_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  85016. CRTCV1_CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  85017. CRTCV1_CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  85018. CRTCV1_CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  85019. CRTCV1_CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  85020. CRTCV1_CRTCV_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  85021. CRTCV1_CRTCV_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  85022. CRTCV1_CRTCV_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  85023. CRTCV1_CRTCV_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  85024. CRTCV1_CRTCV_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  85025. CRTCV1_CRTCV_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  85026. CRTCV1_CRTCV_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  85027. CRTCV1_CRTCV_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  85028. CRTCV1_CRTCV_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  85029. CRTCV1_CRTCV_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  85030. CRTCV1_CRTCV_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  85031. CRTCV1_CRTCV_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  85032. CRTCV1_CRTCV_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  85033. CRTCV1_CRTCV_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  85034. CRTCV1_CRTCV_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  85035. CRTCV1_CRTCV_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  85036. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  85037. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  85038. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  85039. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  85040. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  85041. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  85042. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  85043. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  85044. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  85045. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  85046. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  85047. CRTCV1_CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  85048. CRTCV1_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  85049. CRTCV1_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  85050. CRTCV1_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  85051. CRTCV1_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  85052. CRTCV1_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  85053. CRTCV1_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  85054. CRTCV1_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  85055. CRTCV1_CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  85056. CRTCV1_CRTCV_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  85057. CRTCV1_CRTCV_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  85058. CRTCV1_CRTCV_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  85059. CRTCV1_CRTCV_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  85060. CRTCV1_CRTCV_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  85061. CRTCV1_CRTCV_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  85062. CRTCV1_CRTCV_V_TOTAL__CRTC_V_TOTAL_MASK
  85063. CRTCV1_CRTCV_V_TOTAL__CRTC_V_TOTAL__SHIFT
  85064. CRTCV1_CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  85065. CRTCV1_CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  85066. CRTCV1_CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  85067. CRTCV1_CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  85068. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  85069. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  85070. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  85071. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  85072. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  85073. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  85074. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  85075. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  85076. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  85077. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  85078. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  85079. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  85080. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  85081. CRTCV_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  85082. CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  85083. CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  85084. CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  85085. CRTCV_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  85086. CRTCV_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  85087. CRTCV_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  85088. CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  85089. CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  85090. CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  85091. CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  85092. CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  85093. CRTCV_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  85094. CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  85095. CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  85096. CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  85097. CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  85098. CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  85099. CRTCV_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  85100. CRTCV_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  85101. CRTCV_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  85102. CRTCV_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  85103. CRTCV_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  85104. CRTCV_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  85105. CRTCV_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  85106. CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  85107. CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  85108. CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  85109. CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  85110. CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  85111. CRTCV_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  85112. CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  85113. CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  85114. CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  85115. CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  85116. CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  85117. CRTCV_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  85118. CRTCV_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  85119. CRTCV_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  85120. CRTCV_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  85121. CRTCV_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  85122. CRTCV_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  85123. CRTCV_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  85124. CRTCV_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  85125. CRTCV_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  85126. CRTCV_CONTROL__CRTC_DISP_READ_REQUEST_DISABLE_MASK
  85127. CRTCV_CONTROL__CRTC_DISP_READ_REQUEST_DISABLE__SHIFT
  85128. CRTCV_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  85129. CRTCV_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  85130. CRTCV_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  85131. CRTCV_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  85132. CRTCV_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  85133. CRTCV_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  85134. CRTCV_CONTROL__CRTC_MASTER_EN_MASK
  85135. CRTCV_CONTROL__CRTC_MASTER_EN__SHIFT
  85136. CRTCV_CONTROL__CRTC_SOF_PULL_EN_MASK
  85137. CRTCV_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  85138. CRTCV_CONTROL__CRTC_START_POINT_CNTL_MASK
  85139. CRTCV_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  85140. CRTCV_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  85141. CRTCV_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  85142. CRTCV_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  85143. CRTCV_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  85144. CRTCV_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  85145. CRTCV_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  85146. CRTCV_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  85147. CRTCV_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  85148. CRTCV_CRC0_DATA_B__CRC0_B_CB_MASK
  85149. CRTCV_CRC0_DATA_B__CRC0_B_CB__SHIFT
  85150. CRTCV_CRC0_DATA_RG__CRC0_G_Y_MASK
  85151. CRTCV_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  85152. CRTCV_CRC0_DATA_RG__CRC0_R_CR_MASK
  85153. CRTCV_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  85154. CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  85155. CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  85156. CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  85157. CRTCV_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  85158. CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  85159. CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  85160. CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  85161. CRTCV_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  85162. CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  85163. CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  85164. CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  85165. CRTCV_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  85166. CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  85167. CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  85168. CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  85169. CRTCV_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  85170. CRTCV_CRC1_DATA_B__CRC1_B_CB_MASK
  85171. CRTCV_CRC1_DATA_B__CRC1_B_CB__SHIFT
  85172. CRTCV_CRC1_DATA_RG__CRC1_G_Y_MASK
  85173. CRTCV_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  85174. CRTCV_CRC1_DATA_RG__CRC1_R_CR_MASK
  85175. CRTCV_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  85176. CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  85177. CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  85178. CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  85179. CRTCV_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  85180. CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  85181. CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  85182. CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  85183. CRTCV_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  85184. CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  85185. CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  85186. CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  85187. CRTCV_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  85188. CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  85189. CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  85190. CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  85191. CRTCV_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  85192. CRTCV_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  85193. CRTCV_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  85194. CRTCV_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  85195. CRTCV_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  85196. CRTCV_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  85197. CRTCV_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  85198. CRTCV_CRC_CNTL__CRTC_CRC_EN_MASK
  85199. CRTCV_CRC_CNTL__CRTC_CRC_EN__SHIFT
  85200. CRTCV_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  85201. CRTCV_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  85202. CRTCV_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  85203. CRTCV_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  85204. CRTCV_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  85205. CRTCV_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  85206. CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  85207. CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  85208. CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  85209. CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  85210. CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  85211. CRTCV_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  85212. CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  85213. CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  85214. CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  85215. CRTCV_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  85216. CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  85217. CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  85218. CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  85219. CRTCV_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  85220. CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  85221. CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  85222. CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  85223. CRTCV_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  85224. CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  85225. CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  85226. CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  85227. CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  85228. CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  85229. CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  85230. CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  85231. CRTCV_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  85232. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  85233. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  85234. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  85235. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  85236. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  85237. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  85238. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  85239. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  85240. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  85241. CRTCV_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  85242. CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  85243. CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  85244. CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  85245. CRTCV_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  85246. CRTCV_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  85247. CRTCV_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  85248. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  85249. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  85250. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  85251. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  85252. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  85253. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  85254. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  85255. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  85256. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  85257. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  85258. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  85259. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  85260. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  85261. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  85262. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  85263. CRTCV_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  85264. CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  85265. CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  85266. CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  85267. CRTCV_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  85268. CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  85269. CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  85270. CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  85271. CRTCV_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  85272. CRTCV_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  85273. CRTCV_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  85274. CRTCV_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  85275. CRTCV_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  85276. CRTCV_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  85277. CRTCV_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  85278. CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  85279. CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  85280. CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  85281. CRTCV_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  85282. CRTCV_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  85283. CRTCV_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  85284. CRTCV_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  85285. CRTCV_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  85286. CRTCV_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  85287. CRTCV_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  85288. CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  85289. CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  85290. CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  85291. CRTCV_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  85292. CRTCV_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  85293. CRTCV_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  85294. CRTCV_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  85295. CRTCV_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  85296. CRTCV_H_TOTAL__CRTC_H_TOTAL_MASK
  85297. CRTCV_H_TOTAL__CRTC_H_TOTAL__SHIFT
  85298. CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  85299. CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  85300. CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  85301. CRTCV_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  85302. CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  85303. CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  85304. CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  85305. CRTCV_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  85306. CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  85307. CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  85308. CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  85309. CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  85310. CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  85311. CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  85312. CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  85313. CRTCV_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  85314. CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  85315. CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  85316. CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  85317. CRTCV_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  85318. CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  85319. CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  85320. CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  85321. CRTCV_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  85322. CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  85323. CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  85324. CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  85325. CRTCV_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  85326. CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  85327. CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  85328. CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  85329. CRTCV_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  85330. CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  85331. CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  85332. CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  85333. CRTCV_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  85334. CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  85335. CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  85336. CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  85337. CRTCV_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  85338. CRTCV_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  85339. CRTCV_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  85340. CRTCV_MASTER_EN__CRTC_MASTER_EN_MASK
  85341. CRTCV_MASTER_EN__CRTC_MASTER_EN__SHIFT
  85342. CRTCV_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  85343. CRTCV_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  85344. CRTCV_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  85345. CRTCV_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  85346. CRTCV_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  85347. CRTCV_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  85348. CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  85349. CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  85350. CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  85351. CRTCV_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  85352. CRTCV_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  85353. CRTCV_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  85354. CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  85355. CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  85356. CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  85357. CRTCV_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  85358. CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  85359. CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  85360. CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  85361. CRTCV_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  85362. CRTCV_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  85363. CRTCV_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  85364. CRTCV_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  85365. CRTCV_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  85366. CRTCV_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  85367. CRTCV_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  85368. CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  85369. CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  85370. CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  85371. CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  85372. CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  85373. CRTCV_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  85374. CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  85375. CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  85376. CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  85377. CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  85378. CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  85379. CRTCV_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  85380. CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  85381. CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  85382. CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  85383. CRTCV_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  85384. CRTCV_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  85385. CRTCV_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  85386. CRTCV_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  85387. CRTCV_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  85388. CRTCV_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  85389. CRTCV_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  85390. CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  85391. CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  85392. CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  85393. CRTCV_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  85394. CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  85395. CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  85396. CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  85397. CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  85398. CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  85399. CRTCV_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  85400. CRTCV_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  85401. CRTCV_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  85402. CRTCV_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  85403. CRTCV_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  85404. CRTCV_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  85405. CRTCV_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  85406. CRTCV_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  85407. CRTCV_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  85408. CRTCV_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  85409. CRTCV_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  85410. CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  85411. CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  85412. CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  85413. CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  85414. CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  85415. CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  85416. CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  85417. CRTCV_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  85418. CRTCV_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  85419. CRTCV_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  85420. CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  85421. CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  85422. CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  85423. CRTCV_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  85424. CRTCV_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  85425. CRTCV_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  85426. CRTCV_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  85427. CRTCV_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  85428. CRTCV_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  85429. CRTCV_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  85430. CRTCV_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  85431. CRTCV_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  85432. CRTCV_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  85433. CRTCV_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  85434. CRTCV_STATUS__CRTC_H_ACTIVE_DISP_MASK
  85435. CRTCV_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  85436. CRTCV_STATUS__CRTC_H_BLANK_MASK
  85437. CRTCV_STATUS__CRTC_H_BLANK__SHIFT
  85438. CRTCV_STATUS__CRTC_H_SYNC_A_MASK
  85439. CRTCV_STATUS__CRTC_H_SYNC_A__SHIFT
  85440. CRTCV_STATUS__CRTC_V_ACTIVE_DISP_MASK
  85441. CRTCV_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  85442. CRTCV_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  85443. CRTCV_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  85444. CRTCV_STATUS__CRTC_V_BLANK_MASK
  85445. CRTCV_STATUS__CRTC_V_BLANK__SHIFT
  85446. CRTCV_STATUS__CRTC_V_START_LINE_MASK
  85447. CRTCV_STATUS__CRTC_V_START_LINE__SHIFT
  85448. CRTCV_STATUS__CRTC_V_SYNC_A_MASK
  85449. CRTCV_STATUS__CRTC_V_SYNC_A__SHIFT
  85450. CRTCV_STATUS__CRTC_V_UPDATE_MASK
  85451. CRTCV_STATUS__CRTC_V_UPDATE__SHIFT
  85452. CRTCV_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  85453. CRTCV_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  85454. CRTCV_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  85455. CRTCV_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  85456. CRTCV_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  85457. CRTCV_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  85458. CRTCV_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  85459. CRTCV_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  85460. CRTCV_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  85461. CRTCV_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  85462. CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  85463. CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  85464. CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  85465. CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  85466. CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  85467. CRTCV_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  85468. CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  85469. CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  85470. CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  85471. CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  85472. CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  85473. CRTCV_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  85474. CRTCV_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  85475. CRTCV_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  85476. CRTCV_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  85477. CRTCV_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  85478. CRTCV_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  85479. CRTCV_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  85480. CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  85481. CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  85482. CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  85483. CRTCV_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  85484. CRTCV_TEST_DEBUG_DATA__CRTC_TEST_DEBUG_DATA_MASK
  85485. CRTCV_TEST_DEBUG_DATA__CRTC_TEST_DEBUG_DATA__SHIFT
  85486. CRTCV_TEST_DEBUG_INDEX__CRTC_TEST_DEBUG_INDEX_MASK
  85487. CRTCV_TEST_DEBUG_INDEX__CRTC_TEST_DEBUG_INDEX__SHIFT
  85488. CRTCV_TEST_DEBUG_INDEX__CRTC_TEST_DEBUG_WRITE_EN_MASK
  85489. CRTCV_TEST_DEBUG_INDEX__CRTC_TEST_DEBUG_WRITE_EN__SHIFT
  85490. CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  85491. CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  85492. CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  85493. CRTCV_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  85494. CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  85495. CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  85496. CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  85497. CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  85498. CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  85499. CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  85500. CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  85501. CRTCV_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  85502. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  85503. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  85504. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  85505. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  85506. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  85507. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  85508. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  85509. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  85510. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  85511. CRTCV_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  85512. CRTCV_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  85513. CRTCV_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  85514. CRTCV_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  85515. CRTCV_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  85516. CRTCV_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  85517. CRTCV_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  85518. CRTCV_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  85519. CRTCV_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  85520. CRTCV_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  85521. CRTCV_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  85522. CRTCV_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  85523. CRTCV_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  85524. CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  85525. CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  85526. CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  85527. CRTCV_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  85528. CRTCV_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  85529. CRTCV_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  85530. CRTCV_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  85531. CRTCV_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  85532. CRTCV_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  85533. CRTCV_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  85534. CRTCV_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  85535. CRTCV_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  85536. CRTCV_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  85537. CRTCV_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  85538. CRTCV_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  85539. CRTCV_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  85540. CRTCV_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  85541. CRTCV_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  85542. CRTCV_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  85543. CRTCV_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  85544. CRTCV_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  85545. CRTCV_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  85546. CRTCV_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  85547. CRTCV_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  85548. CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  85549. CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  85550. CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  85551. CRTCV_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  85552. CRTCV_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  85553. CRTCV_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  85554. CRTCV_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  85555. CRTCV_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  85556. CRTCV_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  85557. CRTCV_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  85558. CRTCV_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  85559. CRTCV_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  85560. CRTCV_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  85561. CRTCV_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  85562. CRTCV_VBI_END__CRTC_VBI_H_END_MASK
  85563. CRTCV_VBI_END__CRTC_VBI_H_END__SHIFT
  85564. CRTCV_VBI_END__CRTC_VBI_V_END_MASK
  85565. CRTCV_VBI_END__CRTC_VBI_V_END__SHIFT
  85566. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  85567. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  85568. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  85569. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  85570. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  85571. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  85572. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  85573. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  85574. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  85575. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  85576. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  85577. CRTCV_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  85578. CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  85579. CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  85580. CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  85581. CRTCV_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  85582. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  85583. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  85584. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  85585. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  85586. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  85587. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  85588. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  85589. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  85590. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  85591. CRTCV_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  85592. CRTCV_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  85593. CRTCV_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  85594. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  85595. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  85596. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  85597. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  85598. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  85599. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  85600. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  85601. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  85602. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  85603. CRTCV_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  85604. CRTCV_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  85605. CRTCV_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  85606. CRTCV_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  85607. CRTCV_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  85608. CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  85609. CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  85610. CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  85611. CRTCV_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  85612. CRTCV_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  85613. CRTCV_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  85614. CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  85615. CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  85616. CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  85617. CRTCV_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  85618. CRTCV_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  85619. CRTCV_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  85620. CRTCV_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  85621. CRTCV_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  85622. CRTCV_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  85623. CRTCV_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  85624. CRTCV_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  85625. CRTCV_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  85626. CRTCV_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  85627. CRTCV_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  85628. CRTCV_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  85629. CRTCV_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  85630. CRTCV_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  85631. CRTCV_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  85632. CRTCV_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  85633. CRTCV_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  85634. CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  85635. CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  85636. CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  85637. CRTCV_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  85638. CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  85639. CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  85640. CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  85641. CRTCV_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  85642. CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  85643. CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  85644. CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  85645. CRTCV_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  85646. CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  85647. CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  85648. CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  85649. CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  85650. CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  85651. CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  85652. CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  85653. CRTCV_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  85654. CRTCV_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  85655. CRTCV_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  85656. CRTCV_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  85657. CRTCV_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  85658. CRTCV_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  85659. CRTCV_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  85660. CRTCV_V_TOTAL__CRTC_V_TOTAL_MASK
  85661. CRTCV_V_TOTAL__CRTC_V_TOTAL__SHIFT
  85662. CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  85663. CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  85664. CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  85665. CRTCV_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  85666. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_EN
  85667. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_EN_DB
  85668. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_EN_DB_FALSE
  85669. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_EN_DB_TRUE
  85670. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_EN_FALSE
  85671. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_EN_TRUE
  85672. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_STEREO_SEL_OVR
  85673. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_STEREO_SEL_OVR_FALSE
  85674. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_STEREO_SEL_OVR_TRUE
  85675. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_V_UPDATE_MODE
  85676. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_V_UPDATE_MODE_BLOCK_BOTH
  85677. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_V_UPDATE_MODE_BLOCK_INTERLACE
  85678. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_V_UPDATE_MODE_BLOCK_PROGRASSIVE
  85679. CRTC_3D_STRUCTURE_CONTROL_CRTC_3D_STRUCTURE_V_UPDATE_MODE_RESERVED
  85680. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB_MASK
  85681. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_DB__SHIFT
  85682. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN_MASK
  85683. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_EN__SHIFT
  85684. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_MASK
  85685. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_MASK
  85686. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING_MASK
  85687. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING__SHIFT
  85688. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT_RESET__SHIFT
  85689. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_F_COUNT__SHIFT
  85690. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR_MASK
  85691. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_STEREO_SEL_OVR__SHIFT
  85692. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE_MASK
  85693. CRTC_3D_STRUCTURE_CONTROL__CRTC_3D_STRUCTURE_V_UPDATE_MODE__SHIFT
  85694. CRTC_ADD_PIXEL
  85695. CRTC_ADD_PIXEL_FORCE
  85696. CRTC_ADD_PIXEL_NOOP
  85697. CRTC_ADR
  85698. CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT_MASK
  85699. CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_ALLOW_STOP_OFF_V_CNT__SHIFT
  85700. CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT_MASK
  85701. CRTC_ALLOW_STOP_OFF_V_CNT__CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT__SHIFT
  85702. CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER_MASK
  85703. CRTC_AVSYNC_COUNTER__CRTC_AVSYNC_COUNTER__SHIFT
  85704. CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT_MASK
  85705. CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_B_CB_EXT__SHIFT
  85706. CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT_MASK
  85707. CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_G_Y_EXT__SHIFT
  85708. CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT_MASK
  85709. CRTC_BLACK_COLOR_EXT__CRTC_BLACK_COLOR_R_CR_EXT__SHIFT
  85710. CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB_MASK
  85711. CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_B_CB__SHIFT
  85712. CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y_MASK
  85713. CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_G_Y__SHIFT
  85714. CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR_MASK
  85715. CRTC_BLACK_COLOR__CRTC_BLACK_COLOR_R_CR__SHIFT
  85716. CRTC_BLANK_CONTROL_CRTC_BLANK_DATA_EN
  85717. CRTC_BLANK_CONTROL_CRTC_BLANK_DATA_EN_FALSE
  85718. CRTC_BLANK_CONTROL_CRTC_BLANK_DATA_EN_TRUE
  85719. CRTC_BLANK_CONTROL_CRTC_BLANK_DE_MODE
  85720. CRTC_BLANK_CONTROL_CRTC_BLANK_DE_MODE_FALSE
  85721. CRTC_BLANK_CONTROL_CRTC_BLANK_DE_MODE_TRUE
  85722. CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN_MASK
  85723. CRTC_BLANK_CONTROL__CRTC_BLANK_DATA_EN__SHIFT
  85724. CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE_MASK
  85725. CRTC_BLANK_CONTROL__CRTC_BLANK_DE_MODE__SHIFT
  85726. CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE_MASK
  85727. CRTC_BLANK_CONTROL__CRTC_CURRENT_BLANK_STATE__SHIFT
  85728. CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT_MASK
  85729. CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT__SHIFT
  85730. CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT_MASK
  85731. CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT__SHIFT
  85732. CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT_MASK
  85733. CRTC_BLANK_DATA_COLOR_EXT__CRTC_BLANK_DATA_COLOR_RED_CR_EXT__SHIFT
  85734. CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB_MASK
  85735. CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_BLUE_CB__SHIFT
  85736. CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y_MASK
  85737. CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_GREEN_Y__SHIFT
  85738. CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR_MASK
  85739. CRTC_BLANK_DATA_COLOR__CRTC_BLANK_DATA_COLOR_RED_CR__SHIFT
  85740. CRTC_BYPASS_LUT_EN
  85741. CRTC_BYTE_PIX_ORDER
  85742. CRTC_CNT_EN
  85743. CRTC_CONTROL_CRTC_DISABLE_POINT_CNTL
  85744. CRTC_CONTROL_CRTC_DISABLE_POINT_CNTL_DISABLE
  85745. CRTC_CONTROL_CRTC_DISABLE_POINT_CNTL_DISABLE_CURRENT
  85746. CRTC_CONTROL_CRTC_DISABLE_POINT_CNTL_DISABLE_FIRST
  85747. CRTC_CONTROL_CRTC_DISABLE_POINT_CNTL_RESERVED
  85748. CRTC_CONTROL_CRTC_DISP_READ_REQUEST_DISABLE
  85749. CRTC_CONTROL_CRTC_DISP_READ_REQUEST_DISABLE_FALSE
  85750. CRTC_CONTROL_CRTC_DISP_READ_REQUEST_DISABLE_TRUE
  85751. CRTC_CONTROL_CRTC_FIELD_NUMBER_CNTL
  85752. CRTC_CONTROL_CRTC_FIELD_NUMBER_CNTL_DP
  85753. CRTC_CONTROL_CRTC_FIELD_NUMBER_CNTL_NORMAL
  85754. CRTC_CONTROL_CRTC_FIELD_NUMBER_POLARITY
  85755. CRTC_CONTROL_CRTC_FIELD_NUMBER_POLARITY_FALSE
  85756. CRTC_CONTROL_CRTC_FIELD_NUMBER_POLARITY_TRUE
  85757. CRTC_CONTROL_CRTC_MASTER_EN
  85758. CRTC_CONTROL_CRTC_MASTER_EN_FALSE
  85759. CRTC_CONTROL_CRTC_MASTER_EN_TRUE
  85760. CRTC_CONTROL_CRTC_SOF_PULL_EN
  85761. CRTC_CONTROL_CRTC_SOF_PULL_EN_FALSE
  85762. CRTC_CONTROL_CRTC_SOF_PULL_EN_TRUE
  85763. CRTC_CONTROL_CRTC_START_POINT_CNTL
  85764. CRTC_CONTROL_CRTC_START_POINT_CNTL_DP
  85765. CRTC_CONTROL_CRTC_START_POINT_CNTL_NORMAL
  85766. CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT_MASK
  85767. CRTC_CONTROL__CRTC_AVSYNC_LOCK_SNAPSHOT__SHIFT
  85768. CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE_MASK
  85769. CRTC_CONTROL__CRTC_AVSYNC_VSYNC_N_HSYNC_MODE__SHIFT
  85770. CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK
  85771. CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT
  85772. CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL_MASK
  85773. CRTC_CONTROL__CRTC_DISABLE_POINT_CNTL__SHIFT
  85774. CRTC_CONTROL__CRTC_DISP_READ_REQUEST_DISABLE_MASK
  85775. CRTC_CONTROL__CRTC_DISP_READ_REQUEST_DISABLE__SHIFT
  85776. CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL_MASK
  85777. CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT
  85778. CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY_MASK
  85779. CRTC_CONTROL__CRTC_FIELD_NUMBER_POLARITY__SHIFT
  85780. CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL_MASK
  85781. CRTC_CONTROL__CRTC_HBLANK_EARLY_CONTROL__SHIFT
  85782. CRTC_CONTROL__CRTC_MASTER_EN_MASK
  85783. CRTC_CONTROL__CRTC_MASTER_EN__SHIFT
  85784. CRTC_CONTROL__CRTC_SOF_PULL_EN_MASK
  85785. CRTC_CONTROL__CRTC_SOF_PULL_EN__SHIFT
  85786. CRTC_CONTROL__CRTC_START_POINT_CNTL_MASK
  85787. CRTC_CONTROL__CRTC_START_POINT_CNTL__SHIFT
  85788. CRTC_CONTROL__CRTC_SYNC_RESET_SEL_MASK
  85789. CRTC_CONTROL__CRTC_SYNC_RESET_SEL__SHIFT
  85790. CRTC_COUNT_CONTROL_CRTC_HORZ_COUNT_BY2_EN
  85791. CRTC_COUNT_CONTROL_CRTC_HORZ_COUNT_BY2_EN_FALSE
  85792. CRTC_COUNT_CONTROL_CRTC_HORZ_COUNT_BY2_EN_TRUE
  85793. CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN_MASK
  85794. CRTC_COUNT_CONTROL__CRTC_HORZ_COUNT_BY2_EN__SHIFT
  85795. CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT_MASK
  85796. CRTC_COUNT_CONTROL__CRTC_HORZ_REPETITION_COUNT__SHIFT
  85797. CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT_MASK
  85798. CRTC_COUNT_RESET__CRTC_RESET_FRAME_COUNT__SHIFT
  85799. CRTC_CRC0_DATA_B__CRC0_B_CB_MASK
  85800. CRTC_CRC0_DATA_B__CRC0_B_CB__SHIFT
  85801. CRTC_CRC0_DATA_RG__CRC0_G_Y_MASK
  85802. CRTC_CRC0_DATA_RG__CRC0_G_Y__SHIFT
  85803. CRTC_CRC0_DATA_RG__CRC0_R_CR_MASK
  85804. CRTC_CRC0_DATA_RG__CRC0_R_CR__SHIFT
  85805. CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END_MASK
  85806. CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_END__SHIFT
  85807. CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START_MASK
  85808. CRTC_CRC0_WINDOWA_X_CONTROL__CRTC_CRC0_WINDOWA_X_START__SHIFT
  85809. CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END_MASK
  85810. CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_END__SHIFT
  85811. CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START_MASK
  85812. CRTC_CRC0_WINDOWA_Y_CONTROL__CRTC_CRC0_WINDOWA_Y_START__SHIFT
  85813. CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END_MASK
  85814. CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_END__SHIFT
  85815. CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START_MASK
  85816. CRTC_CRC0_WINDOWB_X_CONTROL__CRTC_CRC0_WINDOWB_X_START__SHIFT
  85817. CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END_MASK
  85818. CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_END__SHIFT
  85819. CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START_MASK
  85820. CRTC_CRC0_WINDOWB_Y_CONTROL__CRTC_CRC0_WINDOWB_Y_START__SHIFT
  85821. CRTC_CRC1_DATA_B__CRC1_B_CB_MASK
  85822. CRTC_CRC1_DATA_B__CRC1_B_CB__SHIFT
  85823. CRTC_CRC1_DATA_RG__CRC1_G_Y_MASK
  85824. CRTC_CRC1_DATA_RG__CRC1_G_Y__SHIFT
  85825. CRTC_CRC1_DATA_RG__CRC1_R_CR_MASK
  85826. CRTC_CRC1_DATA_RG__CRC1_R_CR__SHIFT
  85827. CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END_MASK
  85828. CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_END__SHIFT
  85829. CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START_MASK
  85830. CRTC_CRC1_WINDOWA_X_CONTROL__CRTC_CRC1_WINDOWA_X_START__SHIFT
  85831. CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END_MASK
  85832. CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_END__SHIFT
  85833. CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START_MASK
  85834. CRTC_CRC1_WINDOWA_Y_CONTROL__CRTC_CRC1_WINDOWA_Y_START__SHIFT
  85835. CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END_MASK
  85836. CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_END__SHIFT
  85837. CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START_MASK
  85838. CRTC_CRC1_WINDOWB_X_CONTROL__CRTC_CRC1_WINDOWB_X_START__SHIFT
  85839. CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END_MASK
  85840. CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_END__SHIFT
  85841. CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START_MASK
  85842. CRTC_CRC1_WINDOWB_Y_CONTROL__CRTC_CRC1_WINDOWB_Y_START__SHIFT
  85843. CRTC_CRC_CNTL_CRTC_CRC_CONT_EN
  85844. CRTC_CRC_CNTL_CRTC_CRC_CONT_EN_FALSE
  85845. CRTC_CRC_CNTL_CRTC_CRC_CONT_EN_TRUE
  85846. CRTC_CRC_CNTL_CRTC_CRC_EN
  85847. CRTC_CRC_CNTL_CRTC_CRC_EN_FALSE
  85848. CRTC_CRC_CNTL_CRTC_CRC_EN_TRUE
  85849. CRTC_CRC_CNTL_CRTC_CRC_INTERLACE_MODE
  85850. CRTC_CRC_CNTL_CRTC_CRC_INTERLACE_MODE_BOTH_BOTTOM
  85851. CRTC_CRC_CNTL_CRTC_CRC_INTERLACE_MODE_BOTH_FIELD
  85852. CRTC_CRC_CNTL_CRTC_CRC_INTERLACE_MODE_BOTTOM
  85853. CRTC_CRC_CNTL_CRTC_CRC_INTERLACE_MODE_TOP
  85854. CRTC_CRC_CNTL_CRTC_CRC_STEREO_MODE
  85855. CRTC_CRC_CNTL_CRTC_CRC_STEREO_MODE_BOTH_EYES
  85856. CRTC_CRC_CNTL_CRTC_CRC_STEREO_MODE_BOTH_FIELDS
  85857. CRTC_CRC_CNTL_CRTC_CRC_STEREO_MODE_LEFT
  85858. CRTC_CRC_CNTL_CRTC_CRC_STEREO_MODE_RIGHT
  85859. CRTC_CRC_CNTL_CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS
  85860. CRTC_CRC_CNTL_CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_FALSE
  85861. CRTC_CRC_CNTL_CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_TRUE
  85862. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT
  85863. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT_IAB
  85864. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT_IA_B
  85865. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT_I_AB
  85866. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT_I_A_B
  85867. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT_UAB
  85868. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT_UA_B
  85869. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT_U_AB
  85870. CRTC_CRC_CNTL_CRTC_CRTC_CRC0_SELECT_U_A_B
  85871. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT
  85872. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT_IAB
  85873. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT_IA_B
  85874. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT_I_AB
  85875. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT_I_A_B
  85876. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT_UAB
  85877. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT_UA_B
  85878. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT_U_AB
  85879. CRTC_CRC_CNTL_CRTC_CRTC_CRC1_SELECT_U_A_B
  85880. CRTC_CRC_CNTL__CRTC_CRC0_SELECT_MASK
  85881. CRTC_CRC_CNTL__CRTC_CRC0_SELECT__SHIFT
  85882. CRTC_CRC_CNTL__CRTC_CRC1_SELECT_MASK
  85883. CRTC_CRC_CNTL__CRTC_CRC1_SELECT__SHIFT
  85884. CRTC_CRC_CNTL__CRTC_CRC_CONT_EN_MASK
  85885. CRTC_CRC_CNTL__CRTC_CRC_CONT_EN__SHIFT
  85886. CRTC_CRC_CNTL__CRTC_CRC_EN_MASK
  85887. CRTC_CRC_CNTL__CRTC_CRC_EN__SHIFT
  85888. CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE_MASK
  85889. CRTC_CRC_CNTL__CRTC_CRC_INTERLACE_MODE__SHIFT
  85890. CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE_MASK
  85891. CRTC_CRC_CNTL__CRTC_CRC_STEREO_MODE__SHIFT
  85892. CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS_MASK
  85893. CRTC_CRC_CNTL__CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS__SHIFT
  85894. CRTC_CRNT_FRAME
  85895. CRTC_CRNT_VLINE
  85896. CRTC_CRT_ON
  85897. CRTC_CSYNC_EN
  85898. CRTC_CUR_B_TEST
  85899. CRTC_CUR_EN
  85900. CRTC_DATA
  85901. CRTC_DBL_SCAN_EN
  85902. CRTC_DCFE_CLOCK_CONTROL__CRTC_DCFE_CLOCK_ENABLE_MASK
  85903. CRTC_DCFE_CLOCK_CONTROL__CRTC_DCFE_CLOCK_ENABLE__SHIFT
  85904. CRTC_DCFE_CLOCK_CONTROL__CRTC_DCFE_TEST_CLK_SEL_MASK
  85905. CRTC_DCFE_CLOCK_CONTROL__CRTC_DCFE_TEST_CLK_SEL__SHIFT
  85906. CRTC_DCFE_CLOCK_CONTROL__CRTC_DISPCLK_G_DCP_GATE_DISABLE_MASK
  85907. CRTC_DCFE_CLOCK_CONTROL__CRTC_DISPCLK_G_DCP_GATE_DISABLE__SHIFT
  85908. CRTC_DCFE_CLOCK_CONTROL__CRTC_DISPCLK_G_SCL_GATE_DISABLE_MASK
  85909. CRTC_DCFE_CLOCK_CONTROL__CRTC_DISPCLK_G_SCL_GATE_DISABLE__SHIFT
  85910. CRTC_DCFE_CLOCK_CONTROL__CRTC_DISPCLK_R_DCFE_GATE_DISABLE_MASK
  85911. CRTC_DCFE_CLOCK_CONTROL__CRTC_DISPCLK_R_DCFE_GATE_DISABLE__SHIFT
  85912. CRTC_DEBUG
  85913. CRTC_DISPLAY_DIS
  85914. CRTC_DISP_REQ_EN
  85915. CRTC_DISP_REQ_EN_B
  85916. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_BLANK_DATA_DOUBLE_BUFFER_EN
  85917. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_FALSE
  85918. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_TRUE
  85919. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_RANGE_TIMING_DBUF_UPDATE_MODE
  85920. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_0
  85921. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_RANGE_TIMING_DBUF_UPDATE_MODE_1
  85922. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_UPDATE_INSTANTLY
  85923. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_UPDATE_INSTANTLY_FALSE
  85924. CRTC_DOUBLE_BUFFER_CONTROL_CRTC_UPDATE_INSTANTLY_TRUE
  85925. CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN_MASK
  85926. CRTC_DOUBLE_BUFFER_CONTROL__CRTC_BLANK_DATA_DOUBLE_BUFFER_EN__SHIFT
  85927. CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY_MASK
  85928. CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_INSTANTLY__SHIFT
  85929. CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING_MASK
  85930. CRTC_DOUBLE_BUFFER_CONTROL__CRTC_UPDATE_PENDING__SHIFT
  85931. CRTC_DROP_PIXEL
  85932. CRTC_DROP_PIXEL_FORCE
  85933. CRTC_DROP_PIXEL_NOOP
  85934. CRTC_DRR_MODE_DBUF_UPDATE_MODE
  85935. CRTC_DRR_MODE_DBUF_UPDATE_MODE_00_IMMEDIATE
  85936. CRTC_DRR_MODE_DBUF_UPDATE_MODE_01_MANUAL
  85937. CRTC_DRR_MODE_DBUF_UPDATE_MODE_10_DBUF
  85938. CRTC_DRR_MODE_DBUF_UPDATE_MODE_11_SYNCED_DBUF
  85939. CRTC_DTMTEST_CNTL_CRTC_DTMTEST_CRTC_EN
  85940. CRTC_DTMTEST_CNTL_CRTC_DTMTEST_CRTC_EN_FALSE
  85941. CRTC_DTMTEST_CNTL_CRTC_DTMTEST_CRTC_EN_TRUE
  85942. CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV_MASK
  85943. CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CLK_DIV__SHIFT
  85944. CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN_MASK
  85945. CRTC_DTMTEST_CNTL__CRTC_DTMTEST_CRTC_EN__SHIFT
  85946. CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT_MASK
  85947. CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_HORZ_COUNT__SHIFT
  85948. CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT_MASK
  85949. CRTC_DTMTEST_STATUS_POSITION__CRTC_DTMTEST_VERT_COUNT__SHIFT
  85950. CRTC_DUAL_MIXERS
  85951. CRTC_EN
  85952. CRTC_EVENT_VSYNC_FALLING
  85953. CRTC_EVENT_VSYNC_RISING
  85954. CRTC_EXT_CNTL
  85955. CRTC_EXT_DISP
  85956. CRTC_EXT_DISP_EN
  85957. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_ENABLE
  85958. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_ENABLE_CONTINUOUS
  85959. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_ENABLE_DISABLE
  85960. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_ENABLE_ONESHOT
  85961. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_ENABLE_RESERVED
  85962. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE
  85963. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_FALSE
  85964. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_TRUE
  85965. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY
  85966. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_FALSE
  85967. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_TRUE
  85968. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_INTERLACE_MODE
  85969. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_FALSE
  85970. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_TRUE
  85971. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE
  85972. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_FALSE
  85973. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_TRUE
  85974. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW
  85975. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_1pixel
  85976. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_2pixel
  85977. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_3pixel
  85978. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_4pixel
  85979. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY
  85980. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_FALSE
  85981. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_TRUE
  85982. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE
  85983. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_FALSE
  85984. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_TRUE
  85985. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE
  85986. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_FALSE
  85987. CRTC_EXT_TIMING_SYNC_CONTROL_CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_TRUE
  85988. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE_MASK
  85989. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_ENABLE__SHIFT
  85990. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE_MASK
  85991. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE__SHIFT
  85992. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY_MASK
  85993. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY__SHIFT
  85994. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE_MASK
  85995. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_INTERLACE_MODE__SHIFT
  85996. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE_MASK
  85997. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE__SHIFT
  85998. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW_MASK
  85999. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW__SHIFT
  86000. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE_MASK
  86001. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE__SHIFT
  86002. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE_MASK
  86003. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE__SHIFT
  86004. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY_MASK
  86005. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY__SHIFT
  86006. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE_MASK
  86007. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE__SHIFT
  86008. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE_MASK
  86009. CRTC_EXT_TIMING_SYNC_CONTROL__CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE__SHIFT
  86010. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_CLEAR
  86011. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_CLEAR_FALSE
  86012. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_CLEAR_TRUE
  86013. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_INT_ENABLE
  86014. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_INT_ENABLE_FALSE
  86015. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_INT_ENABLE_TRUE
  86016. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_INT_TYPE
  86017. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_INT_TYPE_FALSE
  86018. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_INT_TYPE_TRUE
  86019. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR_MASK
  86020. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_CLEAR__SHIFT
  86021. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE_MASK
  86022. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_ENABLE__SHIFT
  86023. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS_MASK
  86024. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_STATUS__SHIFT
  86025. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE_MASK
  86026. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_INT_TYPE__SHIFT
  86027. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS_MASK
  86028. CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_STATUS__SHIFT
  86029. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_CLEAR
  86030. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_FALSE
  86031. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_TRUE
  86032. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT
  86033. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_128FRAME
  86034. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_16FRAME
  86035. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_1FRAME
  86036. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_2FRAME
  86037. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_32FRAME
  86038. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_4FRAME
  86039. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_64FRAME
  86040. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_8FRAME
  86041. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE
  86042. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_FALSE
  86043. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_TRUE
  86044. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE
  86045. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_FALSE
  86046. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_TRUE
  86047. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR_MASK
  86048. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_CLEAR__SHIFT
  86049. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT_MASK
  86050. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT__SHIFT
  86051. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE_MASK
  86052. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE__SHIFT
  86053. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS_MASK
  86054. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS__SHIFT
  86055. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE_MASK
  86056. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE__SHIFT
  86057. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS_MASK
  86058. CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_LOSS_STATUS__SHIFT
  86059. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR
  86060. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_FALSE
  86061. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_TRUE
  86062. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE
  86063. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_FALSE
  86064. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_TRUE
  86065. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE
  86066. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_FALSE
  86067. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL_CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_TRUE
  86068. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR_MASK
  86069. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR__SHIFT
  86070. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE_MASK
  86071. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE__SHIFT
  86072. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS_MASK
  86073. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS__SHIFT
  86074. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE_MASK
  86075. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE__SHIFT
  86076. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS_MASK
  86077. CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS__SHIFT
  86078. CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X_MASK
  86079. CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_X__SHIFT
  86080. CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y_MASK
  86081. CRTC_EXT_TIMING_SYNC_WINDOW_END__CRTC_EXT_TIMING_SYNC_WINDOW_END_Y__SHIFT
  86082. CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X_MASK
  86083. CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_X__SHIFT
  86084. CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y_MASK
  86085. CRTC_EXT_TIMING_SYNC_WINDOW_START__CRTC_EXT_TIMING_SYNC_WINDOW_START_Y__SHIFT
  86086. CRTC_FIELD_INDICATION_CONTROL_CRTC_FIELD_ALIGNMENT
  86087. CRTC_FIELD_INDICATION_CONTROL_CRTC_FIELD_ALIGNMENT_FALSE
  86088. CRTC_FIELD_INDICATION_CONTROL_CRTC_FIELD_ALIGNMENT_TRUE
  86089. CRTC_FIELD_INDICATION_CONTROL_CRTC_FIELD_INDICATION_OUTPUT_POLARITY
  86090. CRTC_FIELD_INDICATION_CONTROL_CRTC_FIELD_INDICATION_OUTPUT_POLARITY_FALSE
  86091. CRTC_FIELD_INDICATION_CONTROL_CRTC_FIELD_INDICATION_OUTPUT_POLARITY_TRUE
  86092. CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT_MASK
  86093. CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_ALIGNMENT__SHIFT
  86094. CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY_MASK
  86095. CRTC_FIELD_INDICATION_CONTROL__CRTC_FIELD_INDICATION_OUTPUT_POLARITY__SHIFT
  86096. CRTC_FIFO
  86097. CRTC_FIFO_LWM
  86098. CRTC_FIFO_OVERFILL
  86099. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_GRANULARITY
  86100. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_GRANULARITY_FALSE
  86101. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_GRANULARITY_TRUE
  86102. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_POLARITY
  86103. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_POLARITY_FALSE
  86104. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_POLARITY_TRUE
  86105. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT
  86106. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_DDC1CLK
  86107. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_DDC1DATA
  86108. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_DDC2CLK
  86109. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_DDC2DATA
  86110. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_DVOCLK
  86111. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_GENERICA
  86112. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_GENERICB
  86113. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_GENERICC
  86114. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_GENERICD
  86115. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_GENERICE
  86116. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_GENERICF
  86117. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_GPIO
  86118. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_HPD1
  86119. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_HPD2
  86120. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_LOGIC0
  86121. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_LOGIC1
  86122. CRTC_FLOW_CONTROL_CRTC_FLOW_CONTROL_SOURCE_SELECT_MANUAL
  86123. CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY_MASK
  86124. CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_GRANULARITY__SHIFT
  86125. CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS_MASK
  86126. CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_INPUT_STATUS__SHIFT
  86127. CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY_MASK
  86128. CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_POLARITY__SHIFT
  86129. CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT_MASK
  86130. CRTC_FLOW_CONTROL__CRTC_FLOW_CONTROL_SOURCE_SELECT__SHIFT
  86131. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_CHECK
  86132. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_CHECK_FALSE
  86133. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_CHECK_TRUE
  86134. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_CLEAR
  86135. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_CLEAR_FALSE
  86136. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_CLEAR_TRUE
  86137. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_MODE
  86138. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_MODE_DISABLE
  86139. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_MODE_HCOUNT
  86140. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_MODE_HCOUNT_VCOUNT
  86141. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_MODE_RESERVED
  86142. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_TRIG_SEL
  86143. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_TRIG_SEL_FALSE
  86144. CRTC_FORCE_COUNT_NOW_CNTL_CRTC_FORCE_COUNT_NOW_TRIG_SEL_TRUE
  86145. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK_MASK
  86146. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CHECK__SHIFT
  86147. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR_MASK
  86148. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_CLEAR__SHIFT
  86149. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE_MASK
  86150. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_MODE__SHIFT
  86151. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED_MASK
  86152. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_OCCURRED__SHIFT
  86153. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL_MASK
  86154. CRTC_FORCE_COUNT_NOW_CNTL__CRTC_FORCE_COUNT_NOW_TRIG_SEL__SHIFT
  86155. CRTC_FRAME
  86156. CRTC_GEN_CNTL
  86157. CRTC_GEN_CNTL__CRTC_CUR_EN
  86158. CRTC_GEN_CNTL__CRTC_CUR_EN_MASK
  86159. CRTC_GEN_CNTL__CRTC_CUR_MODE_MASK
  86160. CRTC_GEN_CNTL__CRTC_C_SYNC_EN
  86161. CRTC_GEN_CNTL__CRTC_C_SYNC_EN_MASK
  86162. CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN
  86163. CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN_MASK
  86164. CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B
  86165. CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B_MASK
  86166. CRTC_GEN_CNTL__CRTC_EN
  86167. CRTC_GEN_CNTL__CRTC_EN_MASK
  86168. CRTC_GEN_CNTL__CRTC_EXT_DISP_EN
  86169. CRTC_GEN_CNTL__CRTC_EXT_DISP_EN_MASK
  86170. CRTC_GEN_CNTL__CRTC_ICON_EN
  86171. CRTC_GEN_CNTL__CRTC_ICON_EN_MASK
  86172. CRTC_GEN_CNTL__CRTC_INTERLACE_EN
  86173. CRTC_GEN_CNTL__CRTC_INTERLACE_EN_MASK
  86174. CRTC_GEN_CNTL__CRTC_PIX_WIDTH_MASK
  86175. CRTC_GEN_CNTL__CRTC_VSTAT_MODE_MASK
  86176. CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS_MASK
  86177. CRTC_GSL_CONTROL__CRTC_GSL_CHECK_ALL_FIELDS__SHIFT
  86178. CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM_MASK
  86179. CRTC_GSL_CONTROL__CRTC_GSL_CHECK_LINE_NUM__SHIFT
  86180. CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY_MASK
  86181. CRTC_GSL_CONTROL__CRTC_GSL_FORCE_DELAY__SHIFT
  86182. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR_MASK
  86183. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_CLEAR__SHIFT
  86184. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY_MASK
  86185. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_DELAY__SHIFT
  86186. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT_MASK
  86187. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_LIMIT__SHIFT
  86188. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASK
  86189. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER_MASK
  86190. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MASTER_FASTER__SHIFT
  86191. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE_MASK
  86192. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_MODE__SHIFT
  86193. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED_MASK
  86194. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_OCCURRED__SHIFT
  86195. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL_MASK
  86196. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP_SOURCE_SEL__SHIFT
  86197. CRTC_GSL_VSYNC_GAP__CRTC_GSL_VSYNC_GAP__SHIFT
  86198. CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END_MASK
  86199. CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_END__SHIFT
  86200. CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START_MASK
  86201. CRTC_GSL_WINDOW__CRTC_GSL_WINDOW_START__SHIFT
  86202. CRTC_GUI_TRIG_VLINE
  86203. CRTC_HORZ_REPETITION_COUNT
  86204. CRTC_HORZ_REPETITION_COUNT_0
  86205. CRTC_HORZ_REPETITION_COUNT_1
  86206. CRTC_HORZ_REPETITION_COUNT_10
  86207. CRTC_HORZ_REPETITION_COUNT_11
  86208. CRTC_HORZ_REPETITION_COUNT_12
  86209. CRTC_HORZ_REPETITION_COUNT_13
  86210. CRTC_HORZ_REPETITION_COUNT_14
  86211. CRTC_HORZ_REPETITION_COUNT_15
  86212. CRTC_HORZ_REPETITION_COUNT_2
  86213. CRTC_HORZ_REPETITION_COUNT_3
  86214. CRTC_HORZ_REPETITION_COUNT_4
  86215. CRTC_HORZ_REPETITION_COUNT_5
  86216. CRTC_HORZ_REPETITION_COUNT_6
  86217. CRTC_HORZ_REPETITION_COUNT_7
  86218. CRTC_HORZ_REPETITION_COUNT_8
  86219. CRTC_HORZ_REPETITION_COUNT_9
  86220. CRTC_HSYNC_DIS
  86221. CRTC_HVSYNC_IO_DRIVE
  86222. CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS_MASK
  86223. CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_DIS__SHIFT
  86224. CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM_MASK
  86225. CRTC_H_BLANK_EARLY_NUM__CRTC_H_BLANK_EARLY_NUM__SHIFT
  86226. CRTC_H_BLANK_START_END__CRTC_H_BLANK_END_MASK
  86227. CRTC_H_BLANK_START_END__CRTC_H_BLANK_END__SHIFT
  86228. CRTC_H_BLANK_START_END__CRTC_H_BLANK_START_MASK
  86229. CRTC_H_BLANK_START_END__CRTC_H_BLANK_START__SHIFT
  86230. CRTC_H_CUTOFF_ACTIVE_EN
  86231. CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN_MASK
  86232. CRTC_H_SYNC_A_CNTL__CRTC_COMP_SYNC_A_EN__SHIFT
  86233. CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF_MASK
  86234. CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_CUTOFF__SHIFT
  86235. CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL_MASK
  86236. CRTC_H_SYNC_A_CNTL__CRTC_H_SYNC_A_POL__SHIFT
  86237. CRTC_H_SYNC_A_POL
  86238. CRTC_H_SYNC_A_POL_HIGH
  86239. CRTC_H_SYNC_A_POL_LOW
  86240. CRTC_H_SYNC_A__CRTC_H_SYNC_A_END_MASK
  86241. CRTC_H_SYNC_A__CRTC_H_SYNC_A_END__SHIFT
  86242. CRTC_H_SYNC_A__CRTC_H_SYNC_A_START_MASK
  86243. CRTC_H_SYNC_A__CRTC_H_SYNC_A_START__SHIFT
  86244. CRTC_H_SYNC_B_CNTL_CRTC_H_SYNC_B_POL
  86245. CRTC_H_SYNC_B_CNTL_CRTC_H_SYNC_B_POL_FALSE
  86246. CRTC_H_SYNC_B_CNTL_CRTC_H_SYNC_B_POL_TRUE
  86247. CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN_MASK
  86248. CRTC_H_SYNC_B_CNTL__CRTC_COMP_SYNC_B_EN__SHIFT
  86249. CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF_MASK
  86250. CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_CUTOFF__SHIFT
  86251. CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL_MASK
  86252. CRTC_H_SYNC_B_CNTL__CRTC_H_SYNC_B_POL__SHIFT
  86253. CRTC_H_SYNC_B__CRTC_H_SYNC_B_END_MASK
  86254. CRTC_H_SYNC_B__CRTC_H_SYNC_B_END__SHIFT
  86255. CRTC_H_SYNC_B__CRTC_H_SYNC_B_START_MASK
  86256. CRTC_H_SYNC_B__CRTC_H_SYNC_B_START__SHIFT
  86257. CRTC_H_SYNC_DLY
  86258. CRTC_H_SYNC_NEG
  86259. CRTC_H_SYNC_STRT
  86260. CRTC_H_SYNC_STRT_WID
  86261. CRTC_H_SYNC_WID
  86262. CRTC_H_TOTAL_DISP
  86263. CRTC_H_TOTAL__CRTC_H_TOTAL_MASK
  86264. CRTC_H_TOTAL__CRTC_H_TOTAL__SHIFT
  86265. CRTC_INTERLACE_CONTROL_CRTC_INTERLACE_ENABLE
  86266. CRTC_INTERLACE_CONTROL_CRTC_INTERLACE_ENABLE_FALSE
  86267. CRTC_INTERLACE_CONTROL_CRTC_INTERLACE_ENABLE_TRUE
  86268. CRTC_INTERLACE_CONTROL_CRTC_INTERLACE_FORCE_NEXT_FIELD
  86269. CRTC_INTERLACE_CONTROL_CRTC_INTERLACE_FORCE_NEXT_FIELD_EVEN
  86270. CRTC_INTERLACE_CONTROL_CRTC_INTERLACE_FORCE_NEXT_FIELD_NOT
  86271. CRTC_INTERLACE_CONTROL_CRTC_INTERLACE_FORCE_NEXT_FIELD_NOT2
  86272. CRTC_INTERLACE_CONTROL_CRTC_INTERLACE_FORCE_NEXT_FIELD_ODD
  86273. CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE_MASK
  86274. CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_ENABLE__SHIFT
  86275. CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD_MASK
  86276. CRTC_INTERLACE_CONTROL__CRTC_INTERLACE_FORCE_NEXT_FIELD__SHIFT
  86277. CRTC_INTERLACE_EN
  86278. CRTC_INTERLACE_HALVE_V
  86279. CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD_MASK
  86280. CRTC_INTERLACE_STATUS__CRTC_INTERLACE_CURRENT_FIELD__SHIFT
  86281. CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD_MASK
  86282. CRTC_INTERLACE_STATUS__CRTC_INTERLACE_NEXT_FIELD__SHIFT
  86283. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_COUNT_NOW_INT_MSK
  86284. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_COUNT_NOW_INT_MSK_FALSE
  86285. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_COUNT_NOW_INT_MSK_TRUE
  86286. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_COUNT_NOW_INT_TYPE
  86287. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_COUNT_NOW_INT_TYPE_FALSE
  86288. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_COUNT_NOW_INT_TYPE_TRUE
  86289. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK
  86290. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_FALSE
  86291. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_TRUE
  86292. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE
  86293. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_FALSE
  86294. CRTC_INTERRUPT_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_TRUE
  86295. CRTC_INTERRUPT_CONTROL_CRTC_GSL_VSYNC_GAP_INT_MSK
  86296. CRTC_INTERRUPT_CONTROL_CRTC_GSL_VSYNC_GAP_INT_MSK_FALSE
  86297. CRTC_INTERRUPT_CONTROL_CRTC_GSL_VSYNC_GAP_INT_MSK_TRUE
  86298. CRTC_INTERRUPT_CONTROL_CRTC_GSL_VSYNC_GAP_INT_TYPE
  86299. CRTC_INTERRUPT_CONTROL_CRTC_GSL_VSYNC_GAP_INT_TYPE_FALSE
  86300. CRTC_INTERRUPT_CONTROL_CRTC_GSL_VSYNC_GAP_INT_TYPE_TRUE
  86301. CRTC_INTERRUPT_CONTROL_CRTC_SNAPSHOT_INT_MSK
  86302. CRTC_INTERRUPT_CONTROL_CRTC_SNAPSHOT_INT_MSK_FALSE
  86303. CRTC_INTERRUPT_CONTROL_CRTC_SNAPSHOT_INT_MSK_TRUE
  86304. CRTC_INTERRUPT_CONTROL_CRTC_SNAPSHOT_INT_TYPE
  86305. CRTC_INTERRUPT_CONTROL_CRTC_SNAPSHOT_INT_TYPE_FALSE
  86306. CRTC_INTERRUPT_CONTROL_CRTC_SNAPSHOT_INT_TYPE_TRUE
  86307. CRTC_INTERRUPT_CONTROL_CRTC_TRIGA_INT_MSK
  86308. CRTC_INTERRUPT_CONTROL_CRTC_TRIGA_INT_MSK_FALSE
  86309. CRTC_INTERRUPT_CONTROL_CRTC_TRIGA_INT_MSK_TRUE
  86310. CRTC_INTERRUPT_CONTROL_CRTC_TRIGA_INT_TYPE
  86311. CRTC_INTERRUPT_CONTROL_CRTC_TRIGA_INT_TYPE_FALSE
  86312. CRTC_INTERRUPT_CONTROL_CRTC_TRIGA_INT_TYPE_TRUE
  86313. CRTC_INTERRUPT_CONTROL_CRTC_TRIGB_INT_MSK
  86314. CRTC_INTERRUPT_CONTROL_CRTC_TRIGB_INT_MSK_FALSE
  86315. CRTC_INTERRUPT_CONTROL_CRTC_TRIGB_INT_MSK_TRUE
  86316. CRTC_INTERRUPT_CONTROL_CRTC_TRIGB_INT_TYPE
  86317. CRTC_INTERRUPT_CONTROL_CRTC_TRIGB_INT_TYPE_FALSE
  86318. CRTC_INTERRUPT_CONTROL_CRTC_TRIGB_INT_TYPE_TRUE
  86319. CRTC_INTERRUPT_CONTROL_CRTC_VSYNC_NOM_INT_MSK
  86320. CRTC_INTERRUPT_CONTROL_CRTC_VSYNC_NOM_INT_MSK_FALSE
  86321. CRTC_INTERRUPT_CONTROL_CRTC_VSYNC_NOM_INT_MSK_TRUE
  86322. CRTC_INTERRUPT_CONTROL_CRTC_VSYNC_NOM_INT_TYPE
  86323. CRTC_INTERRUPT_CONTROL_CRTC_VSYNC_NOM_INT_TYPE_FALSE
  86324. CRTC_INTERRUPT_CONTROL_CRTC_VSYNC_NOM_INT_TYPE_TRUE
  86325. CRTC_INTERRUPT_CONTROL_CRTC_V_UPDATE_INT_MSK
  86326. CRTC_INTERRUPT_CONTROL_CRTC_V_UPDATE_INT_MSK_FALSE
  86327. CRTC_INTERRUPT_CONTROL_CRTC_V_UPDATE_INT_MSK_TRUE
  86328. CRTC_INTERRUPT_CONTROL_CRTC_V_UPDATE_INT_TYPE
  86329. CRTC_INTERRUPT_CONTROL_CRTC_V_UPDATE_INT_TYPE_FALSE
  86330. CRTC_INTERRUPT_CONTROL_CRTC_V_UPDATE_INT_TYPE_TRUE
  86331. CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK_MASK
  86332. CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_MSK__SHIFT
  86333. CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE_MASK
  86334. CRTC_INTERRUPT_CONTROL__CRTC_FORCE_COUNT_NOW_INT_TYPE__SHIFT
  86335. CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK_MASK
  86336. CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK__SHIFT
  86337. CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE_MASK
  86338. CRTC_INTERRUPT_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE__SHIFT
  86339. CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK_MASK
  86340. CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_MSK__SHIFT
  86341. CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE_MASK
  86342. CRTC_INTERRUPT_CONTROL__CRTC_GSL_VSYNC_GAP_INT_TYPE__SHIFT
  86343. CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK_MASK
  86344. CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_MSK__SHIFT
  86345. CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE_MASK
  86346. CRTC_INTERRUPT_CONTROL__CRTC_SNAPSHOT_INT_TYPE__SHIFT
  86347. CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK
  86348. CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK__SHIFT
  86349. CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE_MASK
  86350. CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_TYPE__SHIFT
  86351. CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK_MASK
  86352. CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_MSK__SHIFT
  86353. CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE_MASK
  86354. CRTC_INTERRUPT_CONTROL__CRTC_TRIGB_INT_TYPE__SHIFT
  86355. CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK_MASK
  86356. CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_MSK__SHIFT
  86357. CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE_MASK
  86358. CRTC_INTERRUPT_CONTROL__CRTC_VSYNC_NOM_INT_TYPE__SHIFT
  86359. CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK_MASK
  86360. CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_MSK__SHIFT
  86361. CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE_MASK
  86362. CRTC_INTERRUPT_CONTROL__CRTC_V_UPDATE_INT_TYPE__SHIFT
  86363. CRTC_INT_CNTL
  86364. CRTC_INT_EN_MASK
  86365. CRTC_LOCK_REGS
  86366. CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE
  86367. CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_FALSE
  86368. CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_TRUE
  86369. CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE_MASK
  86370. CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SHIFT
  86371. CRTC_MASK
  86372. CRTC_MASTER_EN__CRTC_MASTER_EN_MASK
  86373. CRTC_MASTER_EN__CRTC_MASTER_EN__SHIFT
  86374. CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK_MASK
  86375. CRTC_MASTER_UPDATE_LOCK__GSL_CONTROL_MASTER_UPDATE_LOCK__SHIFT
  86376. CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK_MASK
  86377. CRTC_MASTER_UPDATE_LOCK__MASTER_UPDATE_LOCK__SHIFT
  86378. CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK_MASK
  86379. CRTC_MASTER_UPDATE_LOCK__UNDERFLOW_UPDATE_LOCK__SHIFT
  86380. CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE_MASK
  86381. CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_INTERLACED_MODE__SHIFT
  86382. CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE_MASK
  86383. CRTC_MASTER_UPDATE_MODE__MASTER_UPDATE_MODE__SHIFT
  86384. CRTC_MORE_CNTL
  86385. CRTC_MVP_INBAND_CNTL_INSERT_CRTC_MVP_INBAND_OUT_MODE
  86386. CRTC_MVP_INBAND_CNTL_INSERT_CRTC_MVP_INBAND_OUT_MODE_DEBUG
  86387. CRTC_MVP_INBAND_CNTL_INSERT_CRTC_MVP_INBAND_OUT_MODE_DISABLE
  86388. CRTC_MVP_INBAND_CNTL_INSERT_CRTC_MVP_INBAND_OUT_MODE_NORMAL
  86389. CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER_MASK
  86390. CRTC_MVP_INBAND_CNTL_INSERT_TIMER__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER__SHIFT
  86391. CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT_MASK
  86392. CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_CNTL_CHAR_INSERT__SHIFT
  86393. CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE_MASK
  86394. CRTC_MVP_INBAND_CNTL_INSERT__CRTC_MVP_INBAND_OUT_MODE__SHIFT
  86395. CRTC_MVP_STATUS_CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR
  86396. CRTC_MVP_STATUS_CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_FALSE
  86397. CRTC_MVP_STATUS_CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_TRUE
  86398. CRTC_MVP_STATUS_CRTC_FLIP_NOW_CLEAR
  86399. CRTC_MVP_STATUS_CRTC_FLIP_NOW_CLEAR_FALSE
  86400. CRTC_MVP_STATUS_CRTC_FLIP_NOW_CLEAR_TRUE
  86401. CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR_MASK
  86402. CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR__SHIFT
  86403. CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED_MASK
  86404. CRTC_MVP_STATUS__CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED__SHIFT
  86405. CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR_MASK
  86406. CRTC_MVP_STATUS__CRTC_FLIP_NOW_CLEAR__SHIFT
  86407. CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED_MASK
  86408. CRTC_MVP_STATUS__CRTC_FLIP_NOW_OCCURRED__SHIFT
  86409. CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM_MASK
  86410. CRTC_NOM_VERT_POSITION__CRTC_VERT_COUNT_NOM__SHIFT
  86411. CRTC_NO_DBLSCAN
  86412. CRTC_NO_VSCAN
  86413. CRTC_OFFSET
  86414. CRTC_OFFSET_CNTL
  86415. CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET
  86416. CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN
  86417. CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN_MASK
  86418. CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_MASK
  86419. CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN
  86420. CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN_MASK
  86421. CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL
  86422. CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL_MASK
  86423. CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK
  86424. CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK_MASK
  86425. CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN
  86426. CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN_MASK
  86427. CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC
  86428. CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_EN_MASK
  86429. CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_MASK
  86430. CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN
  86431. CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN_MASK
  86432. CRTC_OFFSET_CNTL__CRTC_TILE_EN
  86433. CRTC_OFFSET_CNTL__CRTC_TILE_EN_MASK
  86434. CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT
  86435. CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT_MASK
  86436. CRTC_OFFSET_CNTL__CRTC_TILE_LINE_MASK
  86437. CRTC_OFFSET_CNTL__CRTC_TILE_LINE_RIGHT_MASK
  86438. CRTC_OFFSET_RIGHT
  86439. CRTC_OFF_PITCH
  86440. CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT_MASK
  86441. CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_BLUE_EXT__SHIFT
  86442. CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT_MASK
  86443. CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_GREEN_EXT__SHIFT
  86444. CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT_MASK
  86445. CRTC_OVERSCAN_COLOR_EXT__CRTC_OVERSCAN_COLOR_RED_EXT__SHIFT
  86446. CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE_MASK
  86447. CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_BLUE__SHIFT
  86448. CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN_MASK
  86449. CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_GREEN__SHIFT
  86450. CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED_MASK
  86451. CRTC_OVERSCAN_COLOR__CRTC_OVERSCAN_COLOR_RED__SHIFT
  86452. CRTC_PITCH
  86453. CRTC_PIXEL_CLOCK_FREQ
  86454. CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB_MASK
  86455. CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_BLUE_CB__SHIFT
  86456. CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y_MASK
  86457. CRTC_PIXEL_DATA_READBACK0__CRTC_PIXEL_DATA_GREEN_Y__SHIFT
  86458. CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR_MASK
  86459. CRTC_PIXEL_DATA_READBACK1__CRTC_PIXEL_DATA_RED_CR__SHIFT
  86460. CRTC_PIX_BY_2_EN
  86461. CRTC_PIX_ORDER_LSN_MSN
  86462. CRTC_PIX_ORDER_MSN_LSN
  86463. CRTC_PIX_WIDTH
  86464. CRTC_PIX_WIDTH_15BPP
  86465. CRTC_PIX_WIDTH_16BPP
  86466. CRTC_PIX_WIDTH_24BPP
  86467. CRTC_PIX_WIDTH_32BPP
  86468. CRTC_PIX_WIDTH_4BPP
  86469. CRTC_PIX_WIDTH_8BPP
  86470. CRTC_PIX_WIDTH_MASK
  86471. CRTC_PRESERVED_MASK
  86472. CRTC_READ
  86473. CRTC_REG
  86474. CRTC_REG_SET
  86475. CRTC_REG_SET_2
  86476. CRTC_REG_SET_3
  86477. CRTC_REG_SET_N
  86478. CRTC_REG_UPDATE
  86479. CRTC_REG_UPDATE_2
  86480. CRTC_REG_UPDATE_3
  86481. CRTC_REG_UPDATE_4
  86482. CRTC_REG_UPDATE_5
  86483. CRTC_REG_UPDATE_N
  86484. CRTC_RW_SELECT
  86485. CRTC_Read
  86486. CRTC_SNAPSHOT_CONTROL_CRTC_AUTO_SNAPSHOT_TRIG_SEL
  86487. CRTC_SNAPSHOT_CONTROL_CRTC_AUTO_SNAPSHOT_TRIG_SEL_DISABLE
  86488. CRTC_SNAPSHOT_CONTROL_CRTC_AUTO_SNAPSHOT_TRIG_SEL_RESERVED
  86489. CRTC_SNAPSHOT_CONTROL_CRTC_AUTO_SNAPSHOT_TRIG_SEL_TRIGGERA
  86490. CRTC_SNAPSHOT_CONTROL_CRTC_AUTO_SNAPSHOT_TRIG_SEL_TRIGGERB
  86491. CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL_MASK
  86492. CRTC_SNAPSHOT_CONTROL__CRTC_AUTO_SNAPSHOT_TRIG_SEL__SHIFT
  86493. CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT_MASK
  86494. CRTC_SNAPSHOT_FRAME__CRTC_SNAPSHOT_FRAME_COUNT__SHIFT
  86495. CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT_MASK
  86496. CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_HORZ_COUNT__SHIFT
  86497. CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT_MASK
  86498. CRTC_SNAPSHOT_POSITION__CRTC_SNAPSHOT_VERT_COUNT__SHIFT
  86499. CRTC_SNAPSHOT_STATUS_CRTC_SNAPSHOT_CLEAR
  86500. CRTC_SNAPSHOT_STATUS_CRTC_SNAPSHOT_CLEAR_FALSE
  86501. CRTC_SNAPSHOT_STATUS_CRTC_SNAPSHOT_CLEAR_TRUE
  86502. CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR_MASK
  86503. CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_CLEAR__SHIFT
  86504. CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER_MASK
  86505. CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_MANUAL_TRIGGER__SHIFT
  86506. CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED_MASK
  86507. CRTC_SNAPSHOT_STATUS__CRTC_SNAPSHOT_OCCURRED__SHIFT
  86508. CRTC_START_LINE_CONTROL_CRTC_INTERLACE_START_LINE_EARLY
  86509. CRTC_START_LINE_CONTROL_CRTC_INTERLACE_START_LINE_EARLY_FALSE
  86510. CRTC_START_LINE_CONTROL_CRTC_INTERLACE_START_LINE_EARLY_TRUE
  86511. CRTC_START_LINE_CONTROL_CRTC_LEGACY_REQUESTOR_EN
  86512. CRTC_START_LINE_CONTROL_CRTC_LEGACY_REQUESTOR_EN_FALSE
  86513. CRTC_START_LINE_CONTROL_CRTC_LEGACY_REQUESTOR_EN_TRUE
  86514. CRTC_START_LINE_CONTROL_CRTC_PREFETCH_EN
  86515. CRTC_START_LINE_CONTROL_CRTC_PREFETCH_EN_FALSE
  86516. CRTC_START_LINE_CONTROL_CRTC_PREFETCH_EN_TRUE
  86517. CRTC_START_LINE_CONTROL_CRTC_PROGRESSIVE_START_LINE_EARLY
  86518. CRTC_START_LINE_CONTROL_CRTC_PROGRESSIVE_START_LINE_EARLY_FALSE
  86519. CRTC_START_LINE_CONTROL_CRTC_PROGRESSIVE_START_LINE_EARLY_TRUE
  86520. CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION_MASK
  86521. CRTC_START_LINE_CONTROL__CRTC_ADVANCED_START_LINE_POSITION__SHIFT
  86522. CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY_MASK
  86523. CRTC_START_LINE_CONTROL__CRTC_INTERLACE_START_LINE_EARLY__SHIFT
  86524. CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN_MASK
  86525. CRTC_START_LINE_CONTROL__CRTC_LEGACY_REQUESTOR_EN__SHIFT
  86526. CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN_MASK
  86527. CRTC_START_LINE_CONTROL__CRTC_PREFETCH_EN__SHIFT
  86528. CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY_MASK
  86529. CRTC_START_LINE_CONTROL__CRTC_PROGRESSIVE_START_LINE_EARLY__SHIFT
  86530. CRTC_STATE_VACTIVE
  86531. CRTC_STATE_VBLANK
  86532. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_CLEAR
  86533. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_CLEAR_FALSE
  86534. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_CLEAR_TRUE
  86535. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_ENABLE
  86536. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_ENABLE_FALSE
  86537. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_ENABLE_TRUE
  86538. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_TYPE
  86539. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_TYPE_FALSE
  86540. CRTC_STATIC_SCREEN_CONTROL_CRTC_CPU_SS_INT_TYPE_TRUE
  86541. CRTC_STATIC_SCREEN_CONTROL_CRTC_STATIC_SCREEN_OVERRIDE
  86542. CRTC_STATIC_SCREEN_CONTROL_CRTC_STATIC_SCREEN_OVERRIDE_FALSE
  86543. CRTC_STATIC_SCREEN_CONTROL_CRTC_STATIC_SCREEN_OVERRIDE_TRUE
  86544. CRTC_STATIC_SCREEN_CONTROL_CRTC_STATIC_SCREEN_OVERRIDE_VALUE
  86545. CRTC_STATIC_SCREEN_CONTROL_CRTC_STATIC_SCREEN_OVERRIDE_VALUE_OFF
  86546. CRTC_STATIC_SCREEN_CONTROL_CRTC_STATIC_SCREEN_OVERRIDE_VALUE_ON
  86547. CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR_MASK
  86548. CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_CLEAR__SHIFT
  86549. CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE_MASK
  86550. CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_ENABLE__SHIFT
  86551. CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS_MASK
  86552. CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_STATUS__SHIFT
  86553. CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE_MASK
  86554. CRTC_STATIC_SCREEN_CONTROL__CRTC_CPU_SS_INT_TYPE__SHIFT
  86555. CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS_MASK
  86556. CRTC_STATIC_SCREEN_CONTROL__CRTC_SS_STATUS__SHIFT
  86557. CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK_MASK
  86558. CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_EVENT_MASK__SHIFT
  86559. CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT_MASK
  86560. CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_FRAME_COUNT__SHIFT
  86561. CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_MASK
  86562. CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE_MASK
  86563. CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE_VALUE__SHIFT
  86564. CRTC_STATIC_SCREEN_CONTROL__CRTC_STATIC_SCREEN_OVERRIDE__SHIFT
  86565. CRTC_STATUS
  86566. CRTC_STATUS_FRAME_COUNT
  86567. CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT_MASK
  86568. CRTC_STATUS_FRAME_COUNT__CRTC_FRAME_COUNT__SHIFT
  86569. CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT_MASK
  86570. CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT
  86571. CRTC_STATUS_POSITION__CRTC_HORZ_COUNT_MASK
  86572. CRTC_STATUS_POSITION__CRTC_HORZ_COUNT__SHIFT
  86573. CRTC_STATUS_POSITION__CRTC_VERT_COUNT_MASK
  86574. CRTC_STATUS_POSITION__CRTC_VERT_COUNT__SHIFT
  86575. CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT_MASK
  86576. CRTC_STATUS_VF_COUNT__CRTC_VF_COUNT__SHIFT
  86577. CRTC_STATUS__CRTC_H_ACTIVE_DISP_MASK
  86578. CRTC_STATUS__CRTC_H_ACTIVE_DISP__SHIFT
  86579. CRTC_STATUS__CRTC_H_BLANK_MASK
  86580. CRTC_STATUS__CRTC_H_BLANK__SHIFT
  86581. CRTC_STATUS__CRTC_H_SYNC_A_MASK
  86582. CRTC_STATUS__CRTC_H_SYNC_A__SHIFT
  86583. CRTC_STATUS__CRTC_V_ACTIVE_DISP_MASK
  86584. CRTC_STATUS__CRTC_V_ACTIVE_DISP__SHIFT
  86585. CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE_MASK
  86586. CRTC_STATUS__CRTC_V_BLANK_3D_STRUCTURE__SHIFT
  86587. CRTC_STATUS__CRTC_V_BLANK_MASK
  86588. CRTC_STATUS__CRTC_V_BLANK__SHIFT
  86589. CRTC_STATUS__CRTC_V_START_LINE_MASK
  86590. CRTC_STATUS__CRTC_V_START_LINE__SHIFT
  86591. CRTC_STATUS__CRTC_V_SYNC_A_MASK
  86592. CRTC_STATUS__CRTC_V_SYNC_A__SHIFT
  86593. CRTC_STATUS__CRTC_V_UPDATE_MASK
  86594. CRTC_STATUS__CRTC_V_UPDATE__SHIFT
  86595. CRTC_STEREO_CONTROL_CRTC_STEREO_EN
  86596. CRTC_STEREO_CONTROL_CRTC_STEREO_EN_FALSE
  86597. CRTC_STEREO_CONTROL_CRTC_STEREO_EN_TRUE
  86598. CRTC_STEREO_CONTROL_CRTC_STEREO_EYE_FLAG_POLARITY
  86599. CRTC_STEREO_CONTROL_CRTC_STEREO_EYE_FLAG_POLARITY_FALSE
  86600. CRTC_STEREO_CONTROL_CRTC_STEREO_EYE_FLAG_POLARITY_TRUE
  86601. CRTC_STEREO_CONTROL_CRTC_STEREO_SYNC_OUTPUT_POLARITY
  86602. CRTC_STEREO_CONTROL_CRTC_STEREO_SYNC_OUTPUT_POLARITY_FALSE
  86603. CRTC_STEREO_CONTROL_CRTC_STEREO_SYNC_OUTPUT_POLARITY_TRUE
  86604. CRTC_STEREO_CONTROL_CRTC_STEREO_SYNC_SELECT_POLARITY
  86605. CRTC_STEREO_CONTROL_CRTC_STEREO_SYNC_SELECT_POLARITY_FALSE
  86606. CRTC_STEREO_CONTROL_CRTC_STEREO_SYNC_SELECT_POLARITY_TRUE
  86607. CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM_MASK
  86608. CRTC_STEREO_CONTROL__CRTC_DISABLE_FIELD_NUM__SHIFT
  86609. CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP_MASK
  86610. CRTC_STEREO_CONTROL__CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP__SHIFT
  86611. CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX_MASK
  86612. CRTC_STEREO_CONTROL__CRTC_DISABLE_V_BLANK_FOR_DP_FIX__SHIFT
  86613. CRTC_STEREO_CONTROL__CRTC_STEREO_EN_MASK
  86614. CRTC_STEREO_CONTROL__CRTC_STEREO_EN__SHIFT
  86615. CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY_MASK
  86616. CRTC_STEREO_CONTROL__CRTC_STEREO_EYE_FLAG_POLARITY__SHIFT
  86617. CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM_MASK
  86618. CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_LINE_NUM__SHIFT
  86619. CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY_MASK
  86620. CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_OUTPUT_POLARITY__SHIFT
  86621. CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY_MASK
  86622. CRTC_STEREO_CONTROL__CRTC_STEREO_SYNC_SELECT_POLARITY__SHIFT
  86623. CRTC_STEREO_DOUBLE
  86624. CRTC_STEREO_DOUBLE_ONLY
  86625. CRTC_STEREO_FORCE_NEXT_EYE_CRTC_STEREO_FORCE_NEXT_EYE
  86626. CRTC_STEREO_FORCE_NEXT_EYE_CRTC_STEREO_FORCE_NEXT_EYE_LEFT
  86627. CRTC_STEREO_FORCE_NEXT_EYE_CRTC_STEREO_FORCE_NEXT_EYE_NO
  86628. CRTC_STEREO_FORCE_NEXT_EYE_CRTC_STEREO_FORCE_NEXT_EYE_RESERVED
  86629. CRTC_STEREO_FORCE_NEXT_EYE_CRTC_STEREO_FORCE_NEXT_EYE_RIGHT
  86630. CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER_MASK
  86631. CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_FRAME_COUNTER__SHIFT
  86632. CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER_MASK
  86633. CRTC_STEREO_FORCE_NEXT_EYE__CRTC_AVSYNC_LINE_COUNTER__SHIFT
  86634. CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE_MASK
  86635. CRTC_STEREO_FORCE_NEXT_EYE__CRTC_STEREO_FORCE_NEXT_EYE__SHIFT
  86636. CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE_MASK
  86637. CRTC_STEREO_STATUS__CRTC_STEREO_CURRENT_EYE__SHIFT
  86638. CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG_MASK
  86639. CRTC_STEREO_STATUS__CRTC_STEREO_EYE_FLAG__SHIFT
  86640. CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING_MASK
  86641. CRTC_STEREO_STATUS__CRTC_STEREO_FORCE_NEXT_EYE_PENDING__SHIFT
  86642. CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT_MASK
  86643. CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_OUTPUT__SHIFT
  86644. CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT_MASK
  86645. CRTC_STEREO_STATUS__CRTC_STEREO_SYNC_SELECT__SHIFT
  86646. CRTC_SYNC_TRISTATE
  86647. CRTC_TEST_DEBUG_DATA__CRTC_TEST_DEBUG_DATA_MASK
  86648. CRTC_TEST_DEBUG_DATA__CRTC_TEST_DEBUG_DATA__SHIFT
  86649. CRTC_TEST_DEBUG_INDEX__CRTC_TEST_DEBUG_INDEX_MASK
  86650. CRTC_TEST_DEBUG_INDEX__CRTC_TEST_DEBUG_INDEX__SHIFT
  86651. CRTC_TEST_DEBUG_INDEX__CRTC_TEST_DEBUG_WRITE_EN_MASK
  86652. CRTC_TEST_DEBUG_INDEX__CRTC_TEST_DEBUG_WRITE_EN__SHIFT
  86653. CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA_MASK
  86654. CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_DATA__SHIFT
  86655. CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK_MASK
  86656. CRTC_TEST_PATTERN_COLOR__CRTC_TEST_PATTERN_MASK__SHIFT
  86657. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_COLOR_FORMAT
  86658. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_COLOR_FORMAT_10BPC
  86659. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_COLOR_FORMAT_6BPC
  86660. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_COLOR_FORMAT_8BPC
  86661. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_COLOR_FORMAT_RESERVED
  86662. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_DYNAMIC_RANGE
  86663. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_DYNAMIC_RANGE_FALSE
  86664. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_DYNAMIC_RANGE_TRUE
  86665. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_EN
  86666. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_EN_FALSE
  86667. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_EN_TRUE
  86668. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE
  86669. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE_DRRGB
  86670. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE_HBARS
  86671. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE_RGB
  86672. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE_SRRGB
  86673. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE_VBARS
  86674. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE_XRBIAS
  86675. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE_YCBCR601
  86676. CRTC_TEST_PATTERN_CONTROL_CRTC_TEST_PATTERN_MODE_YCBCR709
  86677. CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT_MASK
  86678. CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_COLOR_FORMAT__SHIFT
  86679. CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE_MASK
  86680. CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_DYNAMIC_RANGE__SHIFT
  86681. CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN_MASK
  86682. CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_EN__SHIFT
  86683. CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE_MASK
  86684. CRTC_TEST_PATTERN_CONTROL__CRTC_TEST_PATTERN_MODE__SHIFT
  86685. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES_MASK
  86686. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_HRES__SHIFT
  86687. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0_MASK
  86688. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC0__SHIFT
  86689. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1_MASK
  86690. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_INC1__SHIFT
  86691. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET_MASK
  86692. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_RAMP0_OFFSET__SHIFT
  86693. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES_MASK
  86694. CRTC_TEST_PATTERN_PARAMETERS__CRTC_TEST_PATTERN_VRES__SHIFT
  86695. CRTC_TRIGA_CNTL_CRTC_TRIGA_CLEAR
  86696. CRTC_TRIGA_CNTL_CRTC_TRIGA_CLEAR_FALSE
  86697. CRTC_TRIGA_CNTL_CRTC_TRIGA_CLEAR_TRUE
  86698. CRTC_TRIGA_CNTL_CRTC_TRIGA_POLARITY_SELECT
  86699. CRTC_TRIGA_CNTL_CRTC_TRIGA_POLARITY_SELECT_GENERICA
  86700. CRTC_TRIGA_CNTL_CRTC_TRIGA_POLARITY_SELECT_GENERICB
  86701. CRTC_TRIGA_CNTL_CRTC_TRIGA_POLARITY_SELECT_GENERICC
  86702. CRTC_TRIGA_CNTL_CRTC_TRIGA_POLARITY_SELECT_HSYNCA
  86703. CRTC_TRIGA_CNTL_CRTC_TRIGA_POLARITY_SELECT_HSYNCB
  86704. CRTC_TRIGA_CNTL_CRTC_TRIGA_POLARITY_SELECT_INTERLACE
  86705. CRTC_TRIGA_CNTL_CRTC_TRIGA_POLARITY_SELECT_VIDEO
  86706. CRTC_TRIGA_CNTL_CRTC_TRIGA_RESYNC_BYPASS_EN
  86707. CRTC_TRIGA_CNTL_CRTC_TRIGA_RESYNC_BYPASS_EN_FALSE
  86708. CRTC_TRIGA_CNTL_CRTC_TRIGA_RESYNC_BYPASS_EN_TRUE
  86709. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT
  86710. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_GENERICA
  86711. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_GENERICB
  86712. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_GENERICC
  86713. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_GENERICD
  86714. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_GENERICE
  86715. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_GENERICF
  86716. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_HPD1
  86717. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_HPD2
  86718. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_HSYNCA
  86719. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_HSYNCA_OTHER
  86720. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_HSYNCB
  86721. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_IBLON
  86722. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_IGSL0
  86723. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_IGSL1
  86724. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_IGSL2
  86725. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_IGSL_ALLOW
  86726. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_MANUAL_FLOW
  86727. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_VIDEO
  86728. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_VSYNCA
  86729. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_VSYNCA_OTHER
  86730. CRTC_TRIGA_CNTL_CRTC_TRIGA_SOURCE_SELECT_VSYNCB
  86731. CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR_MASK
  86732. CRTC_TRIGA_CNTL__CRTC_TRIGA_CLEAR__SHIFT
  86733. CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY_MASK
  86734. CRTC_TRIGA_CNTL__CRTC_TRIGA_DELAY__SHIFT
  86735. CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL_MASK
  86736. CRTC_TRIGA_CNTL__CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL__SHIFT
  86737. CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT_MASK
  86738. CRTC_TRIGA_CNTL__CRTC_TRIGA_FREQUENCY_SELECT__SHIFT
  86739. CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS_MASK
  86740. CRTC_TRIGA_CNTL__CRTC_TRIGA_INPUT_STATUS__SHIFT
  86741. CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED_MASK
  86742. CRTC_TRIGA_CNTL__CRTC_TRIGA_OCCURRED__SHIFT
  86743. CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT_MASK
  86744. CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_SELECT__SHIFT
  86745. CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS_MASK
  86746. CRTC_TRIGA_CNTL__CRTC_TRIGA_POLARITY_STATUS__SHIFT
  86747. CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN_MASK
  86748. CRTC_TRIGA_CNTL__CRTC_TRIGA_RESYNC_BYPASS_EN__SHIFT
  86749. CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL_MASK
  86750. CRTC_TRIGA_CNTL__CRTC_TRIGA_RISING_EDGE_DETECT_CNTL__SHIFT
  86751. CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT_MASK
  86752. CRTC_TRIGA_CNTL__CRTC_TRIGA_SOURCE_SELECT__SHIFT
  86753. CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG_MASK
  86754. CRTC_TRIGA_MANUAL_TRIG__CRTC_TRIGA_MANUAL_TRIG__SHIFT
  86755. CRTC_TRIGB_CNTL_CRTC_TRIGB_CLEAR
  86756. CRTC_TRIGB_CNTL_CRTC_TRIGB_CLEAR_FALSE
  86757. CRTC_TRIGB_CNTL_CRTC_TRIGB_CLEAR_TRUE
  86758. CRTC_TRIGB_CNTL_CRTC_TRIGB_POLARITY_SELECT
  86759. CRTC_TRIGB_CNTL_CRTC_TRIGB_POLARITY_SELECT_GENERICA
  86760. CRTC_TRIGB_CNTL_CRTC_TRIGB_POLARITY_SELECT_GENERICB
  86761. CRTC_TRIGB_CNTL_CRTC_TRIGB_POLARITY_SELECT_GENERICC
  86762. CRTC_TRIGB_CNTL_CRTC_TRIGB_POLARITY_SELECT_HSYNCA
  86763. CRTC_TRIGB_CNTL_CRTC_TRIGB_POLARITY_SELECT_HSYNCB
  86764. CRTC_TRIGB_CNTL_CRTC_TRIGB_POLARITY_SELECT_INTERLACE
  86765. CRTC_TRIGB_CNTL_CRTC_TRIGB_POLARITY_SELECT_VIDEO
  86766. CRTC_TRIGB_CNTL_CRTC_TRIGB_RESYNC_BYPASS_EN
  86767. CRTC_TRIGB_CNTL_CRTC_TRIGB_RESYNC_BYPASS_EN_FALSE
  86768. CRTC_TRIGB_CNTL_CRTC_TRIGB_RESYNC_BYPASS_EN_TRUE
  86769. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT
  86770. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_GENERICA
  86771. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_GENERICB
  86772. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_GENERICC
  86773. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_GENERICD
  86774. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_GENERICE
  86775. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_GENERICF
  86776. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_HPD1
  86777. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_HPD2
  86778. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_HSYNCA
  86779. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_HSYNCA_OTHER
  86780. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_HSYNCB
  86781. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_IBLON
  86782. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_IGSL0
  86783. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_IGSL1
  86784. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_IGSL2
  86785. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_IGSL_ALLOW
  86786. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_MANUAL_FLOW
  86787. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_VIDEO
  86788. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_VSYNCA
  86789. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_VSYNCA_OTHER
  86790. CRTC_TRIGB_CNTL_CRTC_TRIGB_SOURCE_SELECT_VSYNCB
  86791. CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR_MASK
  86792. CRTC_TRIGB_CNTL__CRTC_TRIGB_CLEAR__SHIFT
  86793. CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY_MASK
  86794. CRTC_TRIGB_CNTL__CRTC_TRIGB_DELAY__SHIFT
  86795. CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL_MASK
  86796. CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL__SHIFT
  86797. CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT_MASK
  86798. CRTC_TRIGB_CNTL__CRTC_TRIGB_FREQUENCY_SELECT__SHIFT
  86799. CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS_MASK
  86800. CRTC_TRIGB_CNTL__CRTC_TRIGB_INPUT_STATUS__SHIFT
  86801. CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED_MASK
  86802. CRTC_TRIGB_CNTL__CRTC_TRIGB_OCCURRED__SHIFT
  86803. CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT_MASK
  86804. CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_SELECT__SHIFT
  86805. CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS_MASK
  86806. CRTC_TRIGB_CNTL__CRTC_TRIGB_POLARITY_STATUS__SHIFT
  86807. CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN_MASK
  86808. CRTC_TRIGB_CNTL__CRTC_TRIGB_RESYNC_BYPASS_EN__SHIFT
  86809. CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL_MASK
  86810. CRTC_TRIGB_CNTL__CRTC_TRIGB_RISING_EDGE_DETECT_CNTL__SHIFT
  86811. CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT_MASK
  86812. CRTC_TRIGB_CNTL__CRTC_TRIGB_SOURCE_SELECT__SHIFT
  86813. CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG_MASK
  86814. CRTC_TRIGB_MANUAL_TRIG__CRTC_TRIGB_MANUAL_TRIG__SHIFT
  86815. CRTC_UPDATE_LOCK_CRTC_UPDATE_LOCK
  86816. CRTC_UPDATE_LOCK_CRTC_UPDATE_LOCK_FALSE
  86817. CRTC_UPDATE_LOCK_CRTC_UPDATE_LOCK_TRUE
  86818. CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK_MASK
  86819. CRTC_UPDATE_LOCK__CRTC_UPDATE_LOCK__SHIFT
  86820. CRTC_VBI_END__CRTC_VBI_H_END_MASK
  86821. CRTC_VBI_END__CRTC_VBI_H_END__SHIFT
  86822. CRTC_VBI_END__CRTC_VBI_V_END_MASK
  86823. CRTC_VBI_END__CRTC_VBI_V_END__SHIFT
  86824. CRTC_VBLANK
  86825. CRTC_VBLANK_INT
  86826. CRTC_VBLANK_INT_AK
  86827. CRTC_VBLANK_INT_EN
  86828. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_CLEAR
  86829. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_CLEAR_FALSE
  86830. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_CLEAR_TRUE
  86831. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_INT_ENABLE
  86832. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_FALSE
  86833. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_TRUE
  86834. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_INT_TYPE
  86835. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_INT_TYPE_FALSE
  86836. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_INT_TYPE_TRUE
  86837. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY
  86838. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_FALSE
  86839. CRTC_VERTICAL_INTERRUPT0_CONTROL_CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_TRUE
  86840. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR_MASK
  86841. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_CLEAR__SHIFT
  86842. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE_MASK
  86843. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_ENABLE__SHIFT
  86844. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS_MASK
  86845. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_STATUS__SHIFT
  86846. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE_MASK
  86847. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_INT_TYPE__SHIFT
  86848. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY_MASK
  86849. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY__SHIFT
  86850. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS_MASK
  86851. CRTC_VERTICAL_INTERRUPT0_CONTROL__CRTC_VERTICAL_INTERRUPT0_STATUS__SHIFT
  86852. CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END_MASK
  86853. CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_END__SHIFT
  86854. CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START_MASK
  86855. CRTC_VERTICAL_INTERRUPT0_POSITION__CRTC_VERTICAL_INTERRUPT0_LINE_START__SHIFT
  86856. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_CLEAR
  86857. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_CLEAR_CLEAR_FALSE
  86858. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_CLEAR_TRUE
  86859. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_INT_ENABLE
  86860. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_FALSE
  86861. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_TRUE
  86862. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_INT_TYPE
  86863. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_INT_TYPE_FALSE
  86864. CRTC_VERTICAL_INTERRUPT1_CONTROL_CRTC_VERTICAL_INTERRUPT1_INT_TYPE_TRUE
  86865. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR_MASK
  86866. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_CLEAR__SHIFT
  86867. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE_MASK
  86868. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_ENABLE__SHIFT
  86869. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS_MASK
  86870. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_STATUS__SHIFT
  86871. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE_MASK
  86872. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_INT_TYPE__SHIFT
  86873. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS_MASK
  86874. CRTC_VERTICAL_INTERRUPT1_CONTROL__CRTC_VERTICAL_INTERRUPT1_STATUS__SHIFT
  86875. CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START_MASK
  86876. CRTC_VERTICAL_INTERRUPT1_POSITION__CRTC_VERTICAL_INTERRUPT1_LINE_START__SHIFT
  86877. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_CLEAR
  86878. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_CLEAR_CLEAR_FALSE
  86879. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_CLEAR_TRUE
  86880. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_INT_ENABLE
  86881. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_FALSE
  86882. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_TRUE
  86883. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_INT_TYPE
  86884. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_INT_TYPE_FALSE
  86885. CRTC_VERTICAL_INTERRUPT2_CONTROL_CRTC_VERTICAL_INTERRUPT2_INT_TYPE_TRUE
  86886. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR_MASK
  86887. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_CLEAR__SHIFT
  86888. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE_MASK
  86889. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_ENABLE__SHIFT
  86890. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS_MASK
  86891. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_STATUS__SHIFT
  86892. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE_MASK
  86893. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_INT_TYPE__SHIFT
  86894. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS_MASK
  86895. CRTC_VERTICAL_INTERRUPT2_CONTROL__CRTC_VERTICAL_INTERRUPT2_STATUS__SHIFT
  86896. CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START_MASK
  86897. CRTC_VERTICAL_INTERRUPT2_POSITION__CRTC_VERTICAL_INTERRUPT2_LINE_START__SHIFT
  86898. CRTC_VERT_SYNC_CONTROL_CRTC_AUTO_FORCE_VSYNC_MODE
  86899. CRTC_VERT_SYNC_CONTROL_CRTC_AUTO_FORCE_VSYNC_MODE_DISABLE
  86900. CRTC_VERT_SYNC_CONTROL_CRTC_AUTO_FORCE_VSYNC_MODE_RESERVED
  86901. CRTC_VERT_SYNC_CONTROL_CRTC_AUTO_FORCE_VSYNC_MODE_TRIGGERA
  86902. CRTC_VERT_SYNC_CONTROL_CRTC_AUTO_FORCE_VSYNC_MODE_TRIGGERB
  86903. CRTC_VERT_SYNC_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR
  86904. CRTC_VERT_SYNC_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_FALSE
  86905. CRTC_VERT_SYNC_CONTROL_CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_TRUE
  86906. CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE_MASK
  86907. CRTC_VERT_SYNC_CONTROL__CRTC_AUTO_FORCE_VSYNC_MODE__SHIFT
  86908. CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR_MASK
  86909. CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR__SHIFT
  86910. CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED_MASK
  86911. CRTC_VERT_SYNC_CONTROL__CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED__SHIFT
  86912. CRTC_VFC_SYNC_TRISTATE
  86913. CRTC_VGA_128KAP_PAGING
  86914. CRTC_VGA_LINEAR
  86915. CRTC_VGA_PARAMETER_CAPTURE_MODE_CRTC_VGA_PARAMETER_CAPTURE_MODE
  86916. CRTC_VGA_PARAMETER_CAPTURE_MODE_CRTC_VGA_PARAMETER_CAPTURE_MODE_FALSE
  86917. CRTC_VGA_PARAMETER_CAPTURE_MODE_CRTC_VGA_PARAMETER_CAPTURE_MODE_TRUE
  86918. CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE_MASK
  86919. CRTC_VGA_PARAMETER_CAPTURE_MODE__CRTC_VGA_PARAMETER_CAPTURE_MODE__SHIFT
  86920. CRTC_VGA_TEXT_132
  86921. CRTC_VGA_XOVERSCAN
  86922. CRTC_VLINE_CRNT_VLINE
  86923. CRTC_VLINE_INT
  86924. CRTC_VLINE_INT_AK
  86925. CRTC_VLINE_INT_EN
  86926. CRTC_VLINE_SYNC
  86927. CRTC_VSYNC_DIS
  86928. CRTC_VSYNC_FALL_EDGE
  86929. CRTC_VSYNC_INT
  86930. CRTC_VSYNC_INT_EN
  86931. CRTC_VSYNC_NOM_INT_STATUS_CRTC_VSYNC_NOM_INT_CLEAR
  86932. CRTC_VSYNC_NOM_INT_STATUS_CRTC_VSYNC_NOM_INT_CLEAR_FALSE
  86933. CRTC_VSYNC_NOM_INT_STATUS_CRTC_VSYNC_NOM_INT_CLEAR_TRUE
  86934. CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR_MASK
  86935. CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_INT_CLEAR__SHIFT
  86936. CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM_MASK
  86937. CRTC_VSYNC_NOM_INT_STATUS__CRTC_VSYNC_NOM__SHIFT
  86938. CRTC_V_BLANK_START_END__CRTC_V_BLANK_END_MASK
  86939. CRTC_V_BLANK_START_END__CRTC_V_BLANK_END__SHIFT
  86940. CRTC_V_BLANK_START_END__CRTC_V_BLANK_START_MASK
  86941. CRTC_V_BLANK_START_END__CRTC_V_BLANK_START__SHIFT
  86942. CRTC_V_CUTOFF_ACTIVE_EN
  86943. CRTC_V_DISP
  86944. CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL_MASK
  86945. CRTC_V_SYNC_A_CNTL__CRTC_V_SYNC_A_POL__SHIFT
  86946. CRTC_V_SYNC_A_POL
  86947. CRTC_V_SYNC_A_POL_HIGH
  86948. CRTC_V_SYNC_A_POL_LOW
  86949. CRTC_V_SYNC_A__CRTC_V_SYNC_A_END_MASK
  86950. CRTC_V_SYNC_A__CRTC_V_SYNC_A_END__SHIFT
  86951. CRTC_V_SYNC_A__CRTC_V_SYNC_A_START_MASK
  86952. CRTC_V_SYNC_A__CRTC_V_SYNC_A_START__SHIFT
  86953. CRTC_V_SYNC_B_CNTL_CRTC_V_SYNC_B_POL
  86954. CRTC_V_SYNC_B_CNTL_CRTC_V_SYNC_B_POL_FALSE
  86955. CRTC_V_SYNC_B_CNTL_CRTC_V_SYNC_B_POL_TRUE
  86956. CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL_MASK
  86957. CRTC_V_SYNC_B_CNTL__CRTC_V_SYNC_B_POL__SHIFT
  86958. CRTC_V_SYNC_B__CRTC_V_SYNC_B_END_MASK
  86959. CRTC_V_SYNC_B__CRTC_V_SYNC_B_END__SHIFT
  86960. CRTC_V_SYNC_B__CRTC_V_SYNC_B_START_MASK
  86961. CRTC_V_SYNC_B__CRTC_V_SYNC_B_START__SHIFT
  86962. CRTC_V_SYNC_NEG
  86963. CRTC_V_SYNC_STRT
  86964. CRTC_V_SYNC_STRT_WID
  86965. CRTC_V_SYNC_WID
  86966. CRTC_V_TOTAL
  86967. CRTC_V_TOTAL_CONTROL_CRTC_FORCE_LOCK_ON_EVENT
  86968. CRTC_V_TOTAL_CONTROL_CRTC_FORCE_LOCK_ON_EVENT_DISABLE
  86969. CRTC_V_TOTAL_CONTROL_CRTC_FORCE_LOCK_ON_EVENT_ENABLE
  86970. CRTC_V_TOTAL_CONTROL_CRTC_FORCE_LOCK_TO_MASTER_VSYNC
  86971. CRTC_V_TOTAL_CONTROL_CRTC_FORCE_LOCK_TO_MASTER_VSYNC_DISABLE
  86972. CRTC_V_TOTAL_CONTROL_CRTC_FORCE_LOCK_TO_MASTER_VSYNC_ENABLE
  86973. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK
  86974. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_CRTC_TRIG_A
  86975. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_CRTC_TRIG_B
  86976. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_CURSOR_CHANGE
  86977. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_D1CRTC_VERT_COUNT
  86978. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_D1CRTC_VERT_COUNT_NOM
  86979. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_DOUBLE_BUFFER
  86980. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_EN
  86981. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_EN_FALSE
  86982. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_EN_TRUE
  86983. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_FRAME_START
  86984. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_GRAPHIC_UPDATE_PENDING
  86985. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_INVALID
  86986. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_MC_DC_REGION0
  86987. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_MC_DC_REGION1
  86988. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_MC_DC_REGION2
  86989. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_MC_DC_REGION3
  86990. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_OTHER_CLIENT
  86991. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_RESERVED
  86992. CRTC_V_TOTAL_CONTROL_CRTC_SET_V_TOTAL_MIN_MASK_RESERVED2
  86993. CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MAX_SEL
  86994. CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MAX_SEL_FALSE
  86995. CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MAX_SEL_TRUE
  86996. CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL
  86997. CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL_FALSE
  86998. CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL_TRUE
  86999. CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK
  87000. CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT__SHIFT
  87001. CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC_MASK
  87002. CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_TO_MASTER_VSYNC__SHIFT
  87003. CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN_MASK
  87004. CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_EN__SHIFT
  87005. CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK_MASK
  87006. CRTC_V_TOTAL_CONTROL__CRTC_SET_V_TOTAL_MIN_MASK__SHIFT
  87007. CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL_MASK
  87008. CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MAX_SEL__SHIFT
  87009. CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL_MASK
  87010. CRTC_V_TOTAL_CONTROL__CRTC_V_TOTAL_MIN_SEL__SHIFT
  87011. CRTC_V_TOTAL_DISP
  87012. CRTC_V_TOTAL_INT_STATUS_CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK
  87013. CRTC_V_TOTAL_INT_STATUS_CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_FALSE
  87014. CRTC_V_TOTAL_INT_STATUS_CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_TRUE
  87015. CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK
  87016. CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK__SHIFT
  87017. CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT_MASK
  87018. CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT__SHIFT
  87019. CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MASK
  87020. CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK_MASK
  87021. CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK__SHIFT
  87022. CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED__SHIFT
  87023. CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING_MASK
  87024. CRTC_V_TOTAL_MAX__CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING__SHIFT
  87025. CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX_MASK
  87026. CRTC_V_TOTAL_MAX__CRTC_V_TOTAL_MAX__SHIFT
  87027. CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN_MASK
  87028. CRTC_V_TOTAL_MIN__CRTC_V_TOTAL_MIN__SHIFT
  87029. CRTC_V_TOTAL__CRTC_V_TOTAL_MASK
  87030. CRTC_V_TOTAL__CRTC_V_TOTAL__SHIFT
  87031. CRTC_V_UPDATE_INT_STATUS_CRTC_V_UPDATE_INT_CLEAR
  87032. CRTC_V_UPDATE_INT_STATUS_CRTC_V_UPDATE_INT_CLEAR_FALSE
  87033. CRTC_V_UPDATE_INT_STATUS_CRTC_V_UPDATE_INT_CLEAR_TRUE
  87034. CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR_MASK
  87035. CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_CLEAR__SHIFT
  87036. CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED_MASK
  87037. CRTC_V_UPDATE_INT_STATUS__CRTC_V_UPDATE_INT_OCCURRED__SHIFT
  87038. CRTC_WRITE
  87039. CRTC_Write
  87040. CRTCin
  87041. CRTCout
  87042. CRTHiOrd
  87043. CRTSCTS
  87044. CRT_1K
  87045. CRT_2K
  87046. CRT_2_MASK
  87047. CRT_2_OFFSET
  87048. CRT_2_PRI
  87049. CRT_2_SEC
  87050. CRT_2_USAGE
  87051. CRT_4K
  87052. CRT_9C
  87053. CRT_ADDR
  87054. CRT_AUTO_CENTERING_BR
  87055. CRT_AUTO_CENTERING_BR_BOTTOM_MASK
  87056. CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT
  87057. CRT_AUTO_CENTERING_BR_RIGHT_MASK
  87058. CRT_AUTO_CENTERING_TL
  87059. CRT_AUTO_CENTERING_TL_LEFT_MASK
  87060. CRT_AUTO_CENTERING_TL_TOP_MASK
  87061. CRT_B4
  87062. CRT_BB0_ADDR
  87063. CRT_BB1_ADDR
  87064. CRT_BB_COUNT
  87065. CRT_CRTC_H_SYNC_STRT_WID
  87066. CRT_CRTC_ON
  87067. CRT_CRTC_V_SYNC_STRT_WID
  87068. CRT_CTRL1
  87069. CRT_CTRL2
  87070. CRT_CTRL_COLOR_MASK
  87071. CRT_CTRL_COLOR_RGB565
  87072. CRT_CTRL_COLOR_RGB888
  87073. CRT_CTRL_COLOR_XRGB8888
  87074. CRT_CTRL_COLOR_YUV422
  87075. CRT_CTRL_COLOR_YUV444
  87076. CRT_CTRL_COLOR_YUV444_2RGB
  87077. CRT_CTRL_DAC_EN
  87078. CRT_CTRL_EN
  87079. CRT_CTRL_HSYNC_NEGATIVE
  87080. CRT_CTRL_HW_CURSOR_EN
  87081. CRT_CTRL_INTERLACED
  87082. CRT_CTRL_OSD_EN
  87083. CRT_CTRL_VBLANK_LINE
  87084. CRT_CTRL_VBLANK_LINE_MASK
  87085. CRT_CTRL_VERTICAL_INTR_EN
  87086. CRT_CTRL_VERTICAL_INTR_STS
  87087. CRT_CTRL_VSYNC_NEGATIVE
  87088. CRT_CURRENT_LINE
  87089. CRT_CURRENT_LINE_LINE_MASK
  87090. CRT_CURSOR0
  87091. CRT_CURSOR1
  87092. CRT_CURSOR2
  87093. CRT_D
  87094. CRT_DATA
  87095. CRT_DETECTION_ON
  87096. CRT_DISPLAY_CTRL
  87097. CRT_DISPLAY_CTRL_BLANK
  87098. CRT_DISPLAY_CTRL_CENTERING
  87099. CRT_DISPLAY_CTRL_CLK_MASK
  87100. CRT_DISPLAY_CTRL_CLK_PLL108
  87101. CRT_DISPLAY_CTRL_CLK_PLL25
  87102. CRT_DISPLAY_CTRL_CLK_PLL41
  87103. CRT_DISPLAY_CTRL_CLK_PLL62
  87104. CRT_DISPLAY_CTRL_CLK_PLL65
  87105. CRT_DISPLAY_CTRL_CLK_PLL74
  87106. CRT_DISPLAY_CTRL_CLK_PLL80
  87107. CRT_DISPLAY_CTRL_CLK_RESERVED
  87108. CRT_DISPLAY_CTRL_CRTSELECT
  87109. CRT_DISPLAY_CTRL_DPMS_0
  87110. CRT_DISPLAY_CTRL_DPMS_1
  87111. CRT_DISPLAY_CTRL_DPMS_2
  87112. CRT_DISPLAY_CTRL_DPMS_3
  87113. CRT_DISPLAY_CTRL_DPMS_MASK
  87114. CRT_DISPLAY_CTRL_DPMS_SHIFT
  87115. CRT_DISPLAY_CTRL_EXPANSION
  87116. CRT_DISPLAY_CTRL_FIFO_1
  87117. CRT_DISPLAY_CTRL_FIFO_11
  87118. CRT_DISPLAY_CTRL_FIFO_3
  87119. CRT_DISPLAY_CTRL_FIFO_7
  87120. CRT_DISPLAY_CTRL_FIFO_MASK
  87121. CRT_DISPLAY_CTRL_FORMAT_16
  87122. CRT_DISPLAY_CTRL_FORMAT_32
  87123. CRT_DISPLAY_CTRL_FORMAT_8
  87124. CRT_DISPLAY_CTRL_FORMAT_MASK
  87125. CRT_DISPLAY_CTRL_HORIZONTAL_MODE
  87126. CRT_DISPLAY_CTRL_LOCK_TIMING
  87127. CRT_DISPLAY_CTRL_PIXEL_MASK
  87128. CRT_DISPLAY_CTRL_RESERVED_MASK
  87129. CRT_DISPLAY_CTRL_RGBBIT
  87130. CRT_DISPLAY_CTRL_SELECT_CRT
  87131. CRT_DISPLAY_CTRL_SELECT_MASK
  87132. CRT_DISPLAY_CTRL_SELECT_PANEL
  87133. CRT_DISPLAY_CTRL_SELECT_SHIFT
  87134. CRT_DISPLAY_CTRL_SELECT_VGA
  87135. CRT_DISPLAY_CTRL_SHIFT_VGA_DAC
  87136. CRT_DISPLAY_CTRL_VERTICAL_MODE
  87137. CRT_DISP_OFFSET
  87138. CRT_DVO_DD_DESC
  87139. CRT_DVO_DS_DESC
  87140. CRT_DVO_ED_DESC
  87141. CRT_DVO_EN_DESC
  87142. CRT_DVO_ES_DESC
  87143. CRT_Device
  87144. CRT_FB_ADDRESS
  87145. CRT_FB_ADDRESS_ADDRESS_MASK
  87146. CRT_FB_ADDRESS_EXT
  87147. CRT_FB_ADDRESS_STATUS
  87148. CRT_FB_WIDTH
  87149. CRT_FB_WIDTH_OFFSET_MASK
  87150. CRT_FB_WIDTH_WIDTH_MASK
  87151. CRT_FB_WIDTH_WIDTH_SHIFT
  87152. CRT_HORIZ0
  87153. CRT_HORIZ1
  87154. CRT_HORIZONTAL_CENTERING_VALUE_MASK
  87155. CRT_HORIZONTAL_EXPANSION
  87156. CRT_HORIZONTAL_EXPANSION_COMPARE_VALUE_MASK
  87157. CRT_HORIZONTAL_EXPANSION_SCALE_FACTOR_MASK
  87158. CRT_HORIZONTAL_SYNC
  87159. CRT_HORIZONTAL_SYNC_START_MASK
  87160. CRT_HORIZONTAL_SYNC_WIDTH_MASK
  87161. CRT_HORIZONTAL_SYNC_WIDTH_SHIFT
  87162. CRT_HORIZONTAL_TOTAL
  87163. CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK
  87164. CRT_HORIZONTAL_TOTAL_TOTAL_MASK
  87165. CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT
  87166. CRT_HORZ_VERT_LOAD
  87167. CRT_HOTPLUG
  87168. CRT_HOTPLUG_ACTIVATION_PERIOD_32
  87169. CRT_HOTPLUG_ACTIVATION_PERIOD_64
  87170. CRT_HOTPLUG_DAC_ON_TIME_2M
  87171. CRT_HOTPLUG_DAC_ON_TIME_4M
  87172. CRT_HOTPLUG_DETECT_DELAY_1G
  87173. CRT_HOTPLUG_DETECT_DELAY_2G
  87174. CRT_HOTPLUG_DETECT_MASK
  87175. CRT_HOTPLUG_DETECT_VOLTAGE_325MV
  87176. CRT_HOTPLUG_DETECT_VOLTAGE_475MV
  87177. CRT_HOTPLUG_FORCE_DETECT
  87178. CRT_HOTPLUG_INT_EN
  87179. CRT_HOTPLUG_INT_STATUS
  87180. CRT_HOTPLUG_MONITOR_COLOR
  87181. CRT_HOTPLUG_MONITOR_MASK
  87182. CRT_HOTPLUG_MONITOR_MONO
  87183. CRT_HOTPLUG_MONITOR_NONE
  87184. CRT_HOTPLUG_VOLTAGE_COMPARE_40
  87185. CRT_HOTPLUG_VOLTAGE_COMPARE_50
  87186. CRT_HOTPLUG_VOLTAGE_COMPARE_60
  87187. CRT_HOTPLUG_VOLTAGE_COMPARE_70
  87188. CRT_HOTPLUG_VOLTAGE_COMPARE_MASK
  87189. CRT_HWC_ADDRESS
  87190. CRT_HWC_ADDRESS_ADDRESS_MASK
  87191. CRT_HWC_ADDRESS_ENABLE
  87192. CRT_HWC_ADDRESS_EXT
  87193. CRT_HWC_COLOR_12
  87194. CRT_HWC_COLOR_12_1_RGB565_MASK
  87195. CRT_HWC_COLOR_12_2_RGB565_MASK
  87196. CRT_HWC_COLOR_3
  87197. CRT_HWC_COLOR_3_RGB565_MASK
  87198. CRT_HWC_LOCATION
  87199. CRT_HWC_LOCATION_LEFT
  87200. CRT_HWC_LOCATION_TOP
  87201. CRT_HWC_LOCATION_X_MASK
  87202. CRT_HWC_LOCATION_Y_MASK
  87203. CRT_H_DE
  87204. CRT_H_RS_END
  87205. CRT_H_RS_START
  87206. CRT_H_TOTAL
  87207. CRT_I
  87208. CRT_ID_ARTIST
  87209. CRT_ID_CRX24
  87210. CRT_ID_CRX48Z
  87211. CRT_ID_DUAL_CRX
  87212. CRT_ID_ELK_1024
  87213. CRT_ID_ELK_1024DB
  87214. CRT_ID_ELK_1280
  87215. CRT_ID_ELK_GS
  87216. CRT_ID_HCRX
  87217. CRT_ID_LEGO
  87218. CRT_ID_PINNACLE
  87219. CRT_ID_PVRX
  87220. CRT_ID_SUMMIT
  87221. CRT_ID_THUNDER
  87222. CRT_ID_THUNDER2
  87223. CRT_ID_TIMBER
  87224. CRT_ID_TVRX
  87225. CRT_ID_VISUALIZE_EG
  87226. CRT_INDEX
  87227. CRT_MISC
  87228. CRT_MONITOR_DETECT
  87229. CRT_MONITOR_DETECT_BLUE_MASK
  87230. CRT_MONITOR_DETECT_ENABLE
  87231. CRT_MONITOR_DETECT_GREEN_MASK
  87232. CRT_MONITOR_DETECT_RED_MASK
  87233. CRT_MONITOR_DETECT_VALUE
  87234. CRT_OFFSET
  87235. CRT_ON
  87236. CRT_OSD_ADDR
  87237. CRT_OSD_DISP
  87238. CRT_OSD_H
  87239. CRT_OSD_THRESH
  87240. CRT_OSD_V
  87241. CRT_PALETTE_RAM
  87242. CRT_PLL1_HS
  87243. CRT_PLL1_HS_108MHZ
  87244. CRT_PLL1_HS_148MHZ
  87245. CRT_PLL1_HS_162MHZ
  87246. CRT_PLL1_HS_193MHZ
  87247. CRT_PLL1_HS_25MHZ
  87248. CRT_PLL1_HS_40MHZ
  87249. CRT_PLL1_HS_65MHZ
  87250. CRT_PLL1_HS_74MHZ
  87251. CRT_PLL1_HS_78MHZ
  87252. CRT_PLL1_HS_80MHZ
  87253. CRT_PLL1_HS_80MHZ_1152
  87254. CRT_PLL1_HS_INTER_BYPASS
  87255. CRT_PLL1_HS_OUTER_BYPASS
  87256. CRT_PLL1_HS_POWERON
  87257. CRT_PLL2_HS
  87258. CRT_PLL2_HS_108MHZ
  87259. CRT_PLL2_HS_148MHZ
  87260. CRT_PLL2_HS_162MHZ
  87261. CRT_PLL2_HS_193MHZ
  87262. CRT_PLL2_HS_25MHZ
  87263. CRT_PLL2_HS_40MHZ
  87264. CRT_PLL2_HS_65MHZ
  87265. CRT_PLL2_HS_74MHZ
  87266. CRT_PLL2_HS_78MHZ
  87267. CRT_PLL2_HS_80MHZ
  87268. CRT_PLL_CTRL
  87269. CRT_SCALE
  87270. CRT_SCALE_HORIZONTAL_MODE
  87271. CRT_SCALE_HORIZONTAL_SCALE_MASK
  87272. CRT_SCALE_VERTICAL_MODE
  87273. CRT_SCALE_VERTICAL_SCALE_MASK
  87274. CRT_SCRATCH
  87275. CRT_SENSE
  87276. CRT_SIGNATURE_ANALYZER
  87277. CRT_SIGNATURE_ANALYZER_ENABLE
  87278. CRT_SIGNATURE_ANALYZER_RESET
  87279. CRT_SIGNATURE_ANALYZER_SOURCE_BLUE
  87280. CRT_SIGNATURE_ANALYZER_SOURCE_GREEN
  87281. CRT_SIGNATURE_ANALYZER_SOURCE_MASK
  87282. CRT_SIGNATURE_ANALYZER_SOURCE_RED
  87283. CRT_SIGNATURE_ANALYZER_STATUS_MASK
  87284. CRT_STATUS
  87285. CRT_STS_V
  87286. CRT_TERM_COUNT
  87287. CRT_THROD
  87288. CRT_THROD_HIGH
  87289. CRT_THROD_LOW
  87290. CRT_TRAP
  87291. CRT_VERT0
  87292. CRT_VERT1
  87293. CRT_VERTICAL_CENTERING_VALUE_MASK
  87294. CRT_VERTICAL_EXPANSION
  87295. CRT_VERTICAL_EXPANSION_COMPARE_VALUE_MASK
  87296. CRT_VERTICAL_EXPANSION_LINE_BUFFER_MASK
  87297. CRT_VERTICAL_EXPANSION_SCALE_FACTOR_MASK
  87298. CRT_VERTICAL_SYNC
  87299. CRT_VERTICAL_SYNC_HEIGHT_MASK
  87300. CRT_VERTICAL_SYNC_HEIGHT_SHIFT
  87301. CRT_VERTICAL_SYNC_START_MASK
  87302. CRT_VERTICAL_TOTAL
  87303. CRT_VERTICAL_TOTAL_DISPLAY_END_MASK
  87304. CRT_VERTICAL_TOTAL_TOTAL_MASK
  87305. CRT_VERTICAL_TOTAL_TOTAL_SHIFT
  87306. CRT_V_DE
  87307. CRT_V_RS_END
  87308. CRT_V_RS_START
  87309. CRT_V_TOTAL
  87310. CRT_XSCALE
  87311. CRUNCH_DSPSC
  87312. CRUNCH_MAGIC
  87313. CRUNCH_MVAX0H
  87314. CRUNCH_MVAX0L
  87315. CRUNCH_MVAX0M
  87316. CRUNCH_MVAX1H
  87317. CRUNCH_MVAX1L
  87318. CRUNCH_MVAX1M
  87319. CRUNCH_MVAX2H
  87320. CRUNCH_MVAX2L
  87321. CRUNCH_MVAX2M
  87322. CRUNCH_MVAX3H
  87323. CRUNCH_MVAX3L
  87324. CRUNCH_MVAX3M
  87325. CRUNCH_MVDX0
  87326. CRUNCH_MVDX1
  87327. CRUNCH_MVDX10
  87328. CRUNCH_MVDX11
  87329. CRUNCH_MVDX12
  87330. CRUNCH_MVDX13
  87331. CRUNCH_MVDX14
  87332. CRUNCH_MVDX15
  87333. CRUNCH_MVDX2
  87334. CRUNCH_MVDX3
  87335. CRUNCH_MVDX4
  87336. CRUNCH_MVDX5
  87337. CRUNCH_MVDX6
  87338. CRUNCH_MVDX7
  87339. CRUNCH_MVDX8
  87340. CRUNCH_MVDX9
  87341. CRUNCH_SIZE
  87342. CRUNCH_STORAGE_SIZE
  87343. CRUSH_BUCKET_LIST
  87344. CRUSH_BUCKET_STRAW
  87345. CRUSH_BUCKET_STRAW2
  87346. CRUSH_BUCKET_TREE
  87347. CRUSH_BUCKET_UNIFORM
  87348. CRUSH_CHOOSE_N
  87349. CRUSH_CHOOSE_N_MINUS
  87350. CRUSH_CTRL
  87351. CRUSH_HASH_DEFAULT
  87352. CRUSH_HASH_RJENKINS1
  87353. CRUSH_ITEM_NONE
  87354. CRUSH_ITEM_UNDEF
  87355. CRUSH_LEGACY_ALLOWED_BUCKET_ALGS
  87356. CRUSH_MAGIC
  87357. CRUSH_MAX_BUCKET_WEIGHT
  87358. CRUSH_MAX_DEPTH
  87359. CRUSH_MAX_DEVICE_WEIGHT
  87360. CRUSH_MAX_RULES
  87361. CRUSH_MAX_RULESET
  87362. CRUSH_RULE_CHOOSELEAF_FIRSTN
  87363. CRUSH_RULE_CHOOSELEAF_INDEP
  87364. CRUSH_RULE_CHOOSE_FIRSTN
  87365. CRUSH_RULE_CHOOSE_INDEP
  87366. CRUSH_RULE_EMIT
  87367. CRUSH_RULE_NOOP
  87368. CRUSH_RULE_SET_CHOOSELEAF_STABLE
  87369. CRUSH_RULE_SET_CHOOSELEAF_TRIES
  87370. CRUSH_RULE_SET_CHOOSELEAF_VARY_R
  87371. CRUSH_RULE_SET_CHOOSE_LOCAL_FALLBACK_TRIES
  87372. CRUSH_RULE_SET_CHOOSE_LOCAL_TRIES
  87373. CRUSH_RULE_SET_CHOOSE_TRIES
  87374. CRUSH_RULE_TAKE
  87375. CRVML_BACKLIGHT_OFF
  87376. CRVML_CLOCK_MASK
  87377. CRVML_CLOCK_SHIFT
  87378. CRVML_DEVICE_LPC
  87379. CRVML_DEVICE_MCH
  87380. CRVML_GPIOEN_BIT
  87381. CRVML_LVDS_ON
  87382. CRVML_MCHEN_BIT
  87383. CRVML_MCHMAP_SIZE
  87384. CRVML_PANEL_ON
  87385. CRVML_PANEL_PORT
  87386. CRVML_REG_CLOCK
  87387. CRVML_REG_GPIOBAR
  87388. CRVML_REG_GPIOEN
  87389. CRVML_REG_MCHBAR
  87390. CRVML_REG_MCHEN
  87391. CRWECR_CONFIG
  87392. CRWECR_NORAML
  87393. CRW_ERC_AVAIL
  87394. CRW_ERC_EVENT
  87395. CRW_ERC_INIT
  87396. CRW_ERC_IPARM
  87397. CRW_ERC_PERRI
  87398. CRW_ERC_PERRN
  87399. CRW_ERC_PMOD
  87400. CRW_ERC_TERM
  87401. CRW_ERC_TERROR
  87402. CRW_RSC_CONFIG
  87403. CRW_RSC_CPATH
  87404. CRW_RSC_CSS
  87405. CRW_RSC_MONITOR
  87406. CRW_RSC_SCH
  87407. CRX0_CRX1_CRX2_MARK
  87408. CRX0_CRX1_CRX2_PJ20_MARK
  87409. CRX0_CRX1_MARK
  87410. CRX0_CRX1_PJ22_MARK
  87411. CRX0_MARK
  87412. CRX1_MARK
  87413. CRX1_PJ22_MARK
  87414. CRX24_ENABLE_DISABLE_DISPLAY
  87415. CRX24_OVERLAY_PLANES
  87416. CRX24_SETUP_RAMDAC
  87417. CRX24_SET_OVLY_MASK
  87418. CRX2_MARK
  87419. CRX2_PJ20_MARK
  87420. CRXPKTENC_F
  87421. CRXPKTENC_S
  87422. CRXPKTENC_V
  87423. CRYCB_FORMAT0
  87424. CRYCB_FORMAT1
  87425. CRYCB_FORMAT2
  87426. CRYCB_FORMAT_MASK
  87427. CRYP1
  87428. CRYP1_R
  87429. CRYP1_RX_REG_OFFSET
  87430. CRYP1_TX_REG_OFFSET
  87431. CRYP2
  87432. CRYP2_R
  87433. CRYPTEN
  87434. CRYPTO14_AN_0
  87435. CRYPTO14_AN_1
  87436. CRYPTO14_BLOCKS_NUM
  87437. CRYPTO14_CONFIG
  87438. CRYPTO14_KEY_MEM_DATA_0
  87439. CRYPTO14_KEY_MEM_DATA_1
  87440. CRYPTO14_KI_0
  87441. CRYPTO14_KI_1
  87442. CRYPTO14_KM_0
  87443. CRYPTO14_KM_1
  87444. CRYPTO14_MI_0
  87445. CRYPTO14_MI_1
  87446. CRYPTO14_PRNM_OUT
  87447. CRYPTO14_SHA1_MSG_DATA
  87448. CRYPTO14_SHA1_V_VALUE_
  87449. CRYPTO14_STATUS
  87450. CRYPTO14_TI_0
  87451. CRYPTO14_YOUR_KSV_0
  87452. CRYPTO14_YOUR_KSV_1
  87453. CRYPTO22_CONFIG
  87454. CRYPTO22_STATUS
  87455. CRYPTO4XX_BYTE_ORDER_CFG
  87456. CRYPTO4XX_CRYPTO_PRIORITY
  87457. CRYPTO4XX_CTRL_STAT
  87458. CRYPTO4XX_DATA_IN
  87459. CRYPTO4XX_DATA_OUT
  87460. CRYPTO4XX_DESCRIPTOR
  87461. CRYPTO4XX_DEST
  87462. CRYPTO4XX_DEVICE_CTRL
  87463. CRYPTO4XX_DEVICE_ID
  87464. CRYPTO4XX_DEVICE_INFO
  87465. CRYPTO4XX_DMA_CFG
  87466. CRYPTO4XX_DMA_CFG_OFFSET
  87467. CRYPTO4XX_DMA_USER_CMD
  87468. CRYPTO4XX_DMA_USER_DEST
  87469. CRYPTO4XX_DMA_USER_SRC
  87470. CRYPTO4XX_ENDIAN_CFG
  87471. CRYPTO4XX_EXT_RING_STAT
  87472. CRYPTO4XX_GATHER_RING_BASE_OFFSET
  87473. CRYPTO4XX_GATH_RING_BASE
  87474. CRYPTO4XX_GATH_RING_BASE_UADDR
  87475. CRYPTO4XX_INT_CFG
  87476. CRYPTO4XX_INT_CLR
  87477. CRYPTO4XX_INT_DESCR_CNT
  87478. CRYPTO4XX_INT_DESCR_RD
  87479. CRYPTO4XX_INT_EN
  87480. CRYPTO4XX_INT_ERROR
  87481. CRYPTO4XX_INT_MASK_STAT
  87482. CRYPTO4XX_INT_MASTER_ERR
  87483. CRYPTO4XX_INT_MA_RD_ERR
  87484. CRYPTO4XX_INT_MA_WR_ERR
  87485. CRYPTO4XX_INT_PDR_DONE
  87486. CRYPTO4XX_INT_PE_ERR
  87487. CRYPTO4XX_INT_PKA
  87488. CRYPTO4XX_INT_RING_STAT
  87489. CRYPTO4XX_INT_SLAVE_ERR
  87490. CRYPTO4XX_INT_TIMEOUT_CNT
  87491. CRYPTO4XX_INT_UNMASK_STAT
  87492. CRYPTO4XX_INT_USER_DMA_ERR
  87493. CRYPTO4XX_IO_THRESHOLD
  87494. CRYPTO4XX_IO_THRESHOLD_OFFSET
  87495. CRYPTO4XX_LENGTH
  87496. CRYPTO4XX_PART_RING_CFG
  87497. CRYPTO4XX_PART_RING_SIZE
  87498. CRYPTO4XX_PDR_BASE
  87499. CRYPTO4XX_PDR_BASE_OFFSET
  87500. CRYPTO4XX_PDR_BASE_UADDR
  87501. CRYPTO4XX_PE_DMA_CFG
  87502. CRYPTO4XX_PE_DMA_STAT
  87503. CRYPTO4XX_PKT_DEST_UADDR
  87504. CRYPTO4XX_PKT_SRC_UADDR
  87505. CRYPTO4XX_PRNG_CTRL
  87506. CRYPTO4XX_PRNG_LFSR_H
  87507. CRYPTO4XX_PRNG_LFSR_L
  87508. CRYPTO4XX_PRNG_RES_0
  87509. CRYPTO4XX_PRNG_RES_1
  87510. CRYPTO4XX_PRNG_RES_2
  87511. CRYPTO4XX_PRNG_RES_3
  87512. CRYPTO4XX_PRNG_SEED_H
  87513. CRYPTO4XX_PRNG_SEED_L
  87514. CRYPTO4XX_PRNG_STAT
  87515. CRYPTO4XX_PRNG_STAT_BUSY
  87516. CRYPTO4XX_RDR_BASE
  87517. CRYPTO4XX_RDR_BASE_OFFSET
  87518. CRYPTO4XX_RDR_BASE_UADDR
  87519. CRYPTO4XX_RING_CONTROL_OFFSET
  87520. CRYPTO4XX_RING_CTRL
  87521. CRYPTO4XX_RING_SIZE
  87522. CRYPTO4XX_RING_SIZE_OFFSET
  87523. CRYPTO4XX_SA
  87524. CRYPTO4XX_SA_CMD_0
  87525. CRYPTO4XX_SA_CMD_1
  87526. CRYPTO4XX_SA_LENGTH
  87527. CRYPTO4XX_SA_UADDR
  87528. CRYPTO4XX_SCATTER_RING_BASE_OFFSET
  87529. CRYPTO4XX_SCAT_RING_BASE
  87530. CRYPTO4XX_SCAT_RING_BASE_UADDR
  87531. CRYPTO4XX_SEQ_MASK_RD
  87532. CRYPTO4XX_SEQ_RD
  87533. CRYPTO4XX_SOURCE
  87534. CRYPTO4XX_STATE_HASH_BYTE_CNT_0
  87535. CRYPTO4XX_STATE_HASH_BYTE_CNT_1
  87536. CRYPTO4XX_STATE_IDIGEST_0
  87537. CRYPTO4XX_STATE_IDIGEST_1
  87538. CRYPTO4XX_STATE_IV
  87539. CRYPTO4XX_STATE_PTR
  87540. CRYPTOA_ALG
  87541. CRYPTOA_MAX
  87542. CRYPTOA_TYPE
  87543. CRYPTOA_U32
  87544. CRYPTOA_UNSPEC
  87545. CRYPTOCFGA_MAX
  87546. CRYPTOCFGA_PRIORITY_VAL
  87547. CRYPTOCFGA_REPORT_ACOMP
  87548. CRYPTOCFGA_REPORT_AEAD
  87549. CRYPTOCFGA_REPORT_AKCIPHER
  87550. CRYPTOCFGA_REPORT_BLKCIPHER
  87551. CRYPTOCFGA_REPORT_CIPHER
  87552. CRYPTOCFGA_REPORT_COMPRESS
  87553. CRYPTOCFGA_REPORT_HASH
  87554. CRYPTOCFGA_REPORT_KPP
  87555. CRYPTOCFGA_REPORT_LARVAL
  87556. CRYPTOCFGA_REPORT_RNG
  87557. CRYPTOCFGA_STAT_ACOMP
  87558. CRYPTOCFGA_STAT_AEAD
  87559. CRYPTOCFGA_STAT_AKCIPHER
  87560. CRYPTOCFGA_STAT_BLKCIPHER
  87561. CRYPTOCFGA_STAT_CIPHER
  87562. CRYPTOCFGA_STAT_COMPRESS
  87563. CRYPTOCFGA_STAT_HASH
  87564. CRYPTOCFGA_STAT_KPP
  87565. CRYPTOCFGA_STAT_LARVAL
  87566. CRYPTOCFGA_STAT_RNG
  87567. CRYPTOCFGA_UNSPEC
  87568. CRYPTO_ACOMP_ALLOC_OUTPUT
  87569. CRYPTO_ACTIVITY
  87570. CRYPTO_AES_CTX_SIZE
  87571. CRYPTO_ALGO_AES_CCM
  87572. CRYPTO_ALGO_AES_RESERVED1
  87573. CRYPTO_ALGO_AES_RESERVED2
  87574. CRYPTO_ALGO_NALG
  87575. CRYPTO_ALGO_OFF
  87576. CRYPTO_ALGO_TKIP
  87577. CRYPTO_ALGO_WEP1
  87578. CRYPTO_ALGO_WEP128
  87579. CRYPTO_ALG_ASYNC
  87580. CRYPTO_ALG_DEAD
  87581. CRYPTO_ALG_DYING
  87582. CRYPTO_ALG_INSTANCE
  87583. CRYPTO_ALG_INTERNAL
  87584. CRYPTO_ALG_KERN_DRIVER_ONLY
  87585. CRYPTO_ALG_LARVAL
  87586. CRYPTO_ALG_NEED_FALLBACK
  87587. CRYPTO_ALG_OPTIONAL_KEY
  87588. CRYPTO_ALG_SUB_TYPE_AEAD_CCM
  87589. CRYPTO_ALG_SUB_TYPE_AEAD_GCM
  87590. CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106
  87591. CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309
  87592. CRYPTO_ALG_SUB_TYPE_CBC
  87593. CRYPTO_ALG_SUB_TYPE_CBC_NULL
  87594. CRYPTO_ALG_SUB_TYPE_CBC_SHA
  87595. CRYPTO_ALG_SUB_TYPE_CTR
  87596. CRYPTO_ALG_SUB_TYPE_CTR_NULL
  87597. CRYPTO_ALG_SUB_TYPE_CTR_RFC3686
  87598. CRYPTO_ALG_SUB_TYPE_CTR_SHA
  87599. CRYPTO_ALG_SUB_TYPE_HASH_HMAC
  87600. CRYPTO_ALG_SUB_TYPE_MASK
  87601. CRYPTO_ALG_SUB_TYPE_XTS
  87602. CRYPTO_ALG_TESTED
  87603. CRYPTO_ALG_TYPE_ABLKCIPHER
  87604. CRYPTO_ALG_TYPE_ACOMPRESS
  87605. CRYPTO_ALG_TYPE_ACOMPRESS_MASK
  87606. CRYPTO_ALG_TYPE_AEAD
  87607. CRYPTO_ALG_TYPE_AHASH
  87608. CRYPTO_ALG_TYPE_AHASH_MASK
  87609. CRYPTO_ALG_TYPE_AKCIPHER
  87610. CRYPTO_ALG_TYPE_BLKCIPHER
  87611. CRYPTO_ALG_TYPE_BLKCIPHER_MASK
  87612. CRYPTO_ALG_TYPE_CIPHER
  87613. CRYPTO_ALG_TYPE_COMPRESS
  87614. CRYPTO_ALG_TYPE_HASH
  87615. CRYPTO_ALG_TYPE_HASH_MASK
  87616. CRYPTO_ALG_TYPE_HMAC
  87617. CRYPTO_ALG_TYPE_KPP
  87618. CRYPTO_ALG_TYPE_MASK
  87619. CRYPTO_ALG_TYPE_RNG
  87620. CRYPTO_ALG_TYPE_SCOMPRESS
  87621. CRYPTO_ALG_TYPE_SHASH
  87622. CRYPTO_ALG_TYPE_SKCIPHER
  87623. CRYPTO_AUTHENC_KEYA_PARAM
  87624. CRYPTO_AUTHENC_KEYA_UNSPEC
  87625. CRYPTO_CLK_SRC
  87626. CRYPTO_CTX_SIZE
  87627. CRYPTO_D64_RS0_CD_MASK
  87628. CRYPTO_DONE
  87629. CRYPTO_DRBG_CTR_STRING
  87630. CRYPTO_DRBG_HASH_STRING
  87631. CRYPTO_DRBG_HMAC_STRING
  87632. CRYPTO_ENGINE_MAX_QLEN
  87633. CRYPTO_FALLBACK
  87634. CRYPTO_FEEDBACK_MODE_128BIT_CFB
  87635. CRYPTO_FEEDBACK_MODE_1BIT_CFB
  87636. CRYPTO_FEEDBACK_MODE_64BIT_OFB
  87637. CRYPTO_FEEDBACK_MODE_8BIT_CFB
  87638. CRYPTO_FEEDBACK_MODE_NO_FB
  87639. CRYPTO_GENERAL_ENABLE
  87640. CRYPTO_GENERIC_ERROR
  87641. CRYPTO_HDCP_REVISION
  87642. CRYPTO_INTERRUPT_MASK
  87643. CRYPTO_INTERRUPT_SOURCE
  87644. CRYPTO_INVALID_PACKET_SYNTAX
  87645. CRYPTO_INVALID_PROTOCOL
  87646. CRYPTO_KPP_SECRET_TYPE_DH
  87647. CRYPTO_KPP_SECRET_TYPE_ECDH
  87648. CRYPTO_KPP_SECRET_TYPE_UNKNOWN
  87649. CRYPTO_MAX_ALG_NAME
  87650. CRYPTO_MAX_ATTRS
  87651. CRYPTO_MAX_NAME
  87652. CRYPTO_MINALIGN
  87653. CRYPTO_MINALIGN_ATTR
  87654. CRYPTO_MODE_CBC
  87655. CRYPTO_MODE_CFB
  87656. CRYPTO_MODE_CTR
  87657. CRYPTO_MODE_ECB
  87658. CRYPTO_MODE_OFB
  87659. CRYPTO_MSG_ALG_LOADED
  87660. CRYPTO_MSG_ALG_REGISTER
  87661. CRYPTO_MSG_ALG_REQUEST
  87662. CRYPTO_MSG_BASE
  87663. CRYPTO_MSG_DELALG
  87664. CRYPTO_MSG_DELRNG
  87665. CRYPTO_MSG_GETALG
  87666. CRYPTO_MSG_GETSTAT
  87667. CRYPTO_MSG_MAX
  87668. CRYPTO_MSG_NEWALG
  87669. CRYPTO_MSG_UPDATEALG
  87670. CRYPTO_NEXT_DONE
  87671. CRYPTO_NOLOAD
  87672. CRYPTO_NR_MSGTYPES
  87673. CRYPTO_QUEUE_LEN
  87674. CRYPTO_READ
  87675. CRYPTO_REPORT_MAXSIZE
  87676. CRYPTO_STATE_MASK
  87677. CRYPTO_STATE_SHIFT
  87678. CRYPTO_SUCCESS
  87679. CRYPTO_TFM_NEED_KEY
  87680. CRYPTO_TFM_REQ_FORBID_WEAK_KEYS
  87681. CRYPTO_TFM_REQ_MASK
  87682. CRYPTO_TFM_REQ_MAY_BACKLOG
  87683. CRYPTO_TFM_REQ_MAY_SLEEP
  87684. CRYPTO_TFM_RES_BAD_BLOCK_LEN
  87685. CRYPTO_TFM_RES_BAD_FLAGS
  87686. CRYPTO_TFM_RES_BAD_KEY_LEN
  87687. CRYPTO_TFM_RES_BAD_KEY_SCHED
  87688. CRYPTO_TFM_RES_MASK
  87689. CRYPTO_TFM_RES_WEAK_KEY
  87690. CRYPTO_TRANSPORT_AH_AUTH_FAILED
  87691. CRYPTO_TRANSPORT_ESP_AUTH_FAILED
  87692. CRYPTO_TUNNEL_AH_AUTH_FAILED
  87693. CRYPTO_TUNNEL_ESP_AUTH_FAILED
  87694. CRYPTO_WRITE
  87695. CRYPT_CK
  87696. CRYPT_FEEDTERM
  87697. CRYPT_IV_LARGE_SECTORS
  87698. CRYPT_MODE_INTEGRITY_AEAD
  87699. CRYPT_STARTTERM
  87700. CRYP_ALGORITHM_DECRYPT
  87701. CRYP_ALGORITHM_ENCRYPT
  87702. CRYP_ALGO_AES_CBC
  87703. CRYP_ALGO_AES_CTR
  87704. CRYP_ALGO_AES_ECB
  87705. CRYP_ALGO_AES_XTS
  87706. CRYP_ALGO_DES_CBC
  87707. CRYP_ALGO_DES_ECB
  87708. CRYP_ALGO_TDES_CBC
  87709. CRYP_ALGO_TDES_ECB
  87710. CRYP_AUTOSUSPEND_DELAY
  87711. CRYP_CR
  87712. CRYP_CRYPEN_DISABLE
  87713. CRYP_CRYPEN_ENABLE
  87714. CRYP_CR_ALGODIR_MASK
  87715. CRYP_CR_ALGODIR_POS
  87716. CRYP_CR_ALGOMODE_MASK
  87717. CRYP_CR_ALGOMODE_POS
  87718. CRYP_CR_CONTEXT_SAVE_MASK
  87719. CRYP_CR_CRYPEN_MASK
  87720. CRYP_CR_CRYPEN_POS
  87721. CRYP_CR_DATATYPE_MASK
  87722. CRYP_CR_DATATYPE_POS
  87723. CRYP_CR_DEFAULT
  87724. CRYP_CR_FFLUSH_MASK
  87725. CRYP_CR_INIT_MASK
  87726. CRYP_CR_INIT_POS
  87727. CRYP_CR_KEYRDEN_MASK
  87728. CRYP_CR_KEYRDEN_POS
  87729. CRYP_CR_KEYSIZE_MASK
  87730. CRYP_CR_KEYSIZE_POS
  87731. CRYP_CR_KSE_MASK
  87732. CRYP_CR_KSE_POS
  87733. CRYP_CR_PRLG_MASK
  87734. CRYP_CR_PRLG_POS
  87735. CRYP_CR_SECURE_MASK
  87736. CRYP_CR_START_MASK
  87737. CRYP_CR_START_POS
  87738. CRYP_CSGCM0R
  87739. CRYP_CSGCMCCM0R
  87740. CRYP_DIN
  87741. CRYP_DIN_DEFAULT
  87742. CRYP_DMACR
  87743. CRYP_DMACR_DEFAULT
  87744. CRYP_DMA_DISABLE_BOTH
  87745. CRYP_DMA_ENABLE_BOTH_DIRECTIONS
  87746. CRYP_DMA_ENABLE_IN_DATA
  87747. CRYP_DMA_ENABLE_OUT_DATA
  87748. CRYP_DMA_REQ_MASK
  87749. CRYP_DMA_REQ_MASK_POS
  87750. CRYP_DMA_RX
  87751. CRYP_DMA_RX_FIFO
  87752. CRYP_DMA_TX
  87753. CRYP_DMA_TX_FIFO
  87754. CRYP_DOUT
  87755. CRYP_DOUT_DEFAULT
  87756. CRYP_IMSCR
  87757. CRYP_IMSC_DEFAULT
  87758. CRYP_INIT_DISABLE
  87759. CRYP_INIT_ENABLE
  87760. CRYP_INIT_VECTOR_INDEX_0
  87761. CRYP_INIT_VECTOR_INDEX_1
  87762. CRYP_INIT_VECT_DEFAULT
  87763. CRYP_IRQ_SRC_ALL
  87764. CRYP_IRQ_SRC_INPUT_FIFO
  87765. CRYP_IRQ_SRC_OUTPUT_FIFO
  87766. CRYP_IV0LR
  87767. CRYP_IV0RR
  87768. CRYP_IV1LR
  87769. CRYP_IV1RR
  87770. CRYP_K0LR
  87771. CRYP_K0RR
  87772. CRYP_K1LR
  87773. CRYP_K1RR
  87774. CRYP_K2LR
  87775. CRYP_K2RR
  87776. CRYP_K3LR
  87777. CRYP_K3RR
  87778. CRYP_KEY_DEFAULT
  87779. CRYP_KEY_REG_1
  87780. CRYP_KEY_REG_2
  87781. CRYP_KEY_REG_3
  87782. CRYP_KEY_REG_4
  87783. CRYP_KEY_SIZE_128
  87784. CRYP_KEY_SIZE_192
  87785. CRYP_KEY_SIZE_256
  87786. CRYP_MAX_KEY_SIZE
  87787. CRYP_MISR
  87788. CRYP_MODE_DMA
  87789. CRYP_MODE_INTERRUPT
  87790. CRYP_MODE_POLLING
  87791. CRYP_PCELL_ID0
  87792. CRYP_PCELL_ID1
  87793. CRYP_PCELL_ID2
  87794. CRYP_PCELL_ID3
  87795. CRYP_PERIPHERAL_ID0
  87796. CRYP_PERIPHERAL_ID1
  87797. CRYP_PERIPHERAL_ID2_DB8500
  87798. CRYP_PERIPHERAL_ID3
  87799. CRYP_PUT_BITS
  87800. CRYP_RISR
  87801. CRYP_SET_BITS
  87802. CRYP_SR
  87803. CRYP_SR_BUSY_MASK
  87804. CRYP_SR_BUSY_POS
  87805. CRYP_SR_IFEM_MASK
  87806. CRYP_SR_INFIFO_READY_MASK
  87807. CRYP_START_DISABLE
  87808. CRYP_START_ENABLE
  87809. CRYP_STATE_DISABLE
  87810. CRYP_STATE_ENABLE
  87811. CRYP_STATUS_BUSY
  87812. CRYP_STATUS_INPUT_FIFO_EMPTY
  87813. CRYP_STATUS_INPUT_FIFO_NOT_FULL
  87814. CRYP_STATUS_OUTPUT_FIFO_FULL
  87815. CRYP_STATUS_OUTPUT_FIFO_NOT_EMPTY
  87816. CRYP_TEST_BITS
  87817. CRYP_WRITE_BIT
  87818. CRYSTALCOVE_GPIO_NUM
  87819. CRYSTALCOVE_VGPIO_NUM
  87820. CRYSTALIZER
  87821. CRYSTAL_COVE_IRQ_ADC
  87822. CRYSTAL_COVE_IRQ_BCU
  87823. CRYSTAL_COVE_IRQ_CHGR
  87824. CRYSTAL_COVE_IRQ_GPIO
  87825. CRYSTAL_COVE_IRQ_PWRSRC
  87826. CRYSTAL_COVE_IRQ_THRM
  87827. CRYSTAL_COVE_IRQ_VHDMIOCP
  87828. CRYSTAL_COVE_MAX_REGISTER
  87829. CRYSTAL_COVE_REG_IRQLVL1
  87830. CRYSTAL_COVE_REG_MIRQLVL1
  87831. CRYSTAL_FAIL_BIT
  87832. CRYSTAL_FREQ_16000000HZ
  87833. CRYSTAL_FREQ_25000000HZ
  87834. CRYSTAL_FREQ_28800000HZ
  87835. CRYSTAL_FREQ_4000000HZ
  87836. CRYSTAL_GOOD_TIME
  87837. CRYSTAL_VOICE
  87838. CR_1000T_ASYM_PAUSE
  87839. CR_1000T_FD_CAPS
  87840. CR_1000T_HD_CAPS
  87841. CR_1000T_MS_ENABLE
  87842. CR_1000T_MS_VALUE
  87843. CR_1000T_REPEATER_DTE
  87844. CR_1000T_TEST_MODE_1
  87845. CR_1000T_TEST_MODE_2
  87846. CR_1000T_TEST_MODE_3
  87847. CR_1000T_TEST_MODE_4
  87848. CR_1000T_TEST_MODE_NORMAL
  87849. CR_2500T_FD_CAPS
  87850. CR_A
  87851. CR_ABORT
  87852. CR_ACK_TIMEOUT_EXT
  87853. CR_ACK_TIME_80211
  87854. CR_ACPI_CIR_WAKE
  87855. CR_ACPI_IRQ_EVENTS
  87856. CR_ACPI_IRQ_EVENTS2
  87857. CR_ADDA_MBIAS_WARMTIME
  87858. CR_ADDA_PWR_DWN
  87859. CR_AES_CBC
  87860. CR_AES_CCM
  87861. CR_AES_CTR
  87862. CR_AES_ECB
  87863. CR_AES_GCM
  87864. CR_AES_KP
  87865. CR_AES_UNKNOWN
  87866. CR_AFE
  87867. CR_AFTER_PNP
  87868. CR_ALGO_MASK
  87869. CR_ALT_FILTER
  87870. CR_ALT_SOURCE
  87871. CR_AMDEVICE
  87872. CR_AREF
  87873. CR_ASEQ
  87874. CR_ASEQDONT
  87875. CR_ASEQDOWN
  87876. CR_ASEQUP
  87877. CR_ASEQ_MASK
  87878. CR_ATIM_WND_PERIOD
  87879. CR_B
  87880. CR_B9
  87881. CR_BASIC_RATE_TBL
  87882. CR_BCN_FIFO
  87883. CR_BCN_FIFO_SEMAPHORE
  87884. CR_BCN_INTERVAL
  87885. CR_BCN_LENGTH
  87886. CR_BCN_PLCP_CFG
  87887. CR_BMAM
  87888. CR_BR
  87889. CR_BREN
  87890. CR_BSSID_P1
  87891. CR_BSSID_P2
  87892. CR_BUSY
  87893. CR_BWS_16
  87894. CR_BWS_20
  87895. CR_BWS_24
  87896. CR_BWS_MASK
  87897. CR_C
  87898. CR_CALTIMER_ENABLE
  87899. CR_CAM_ADDRESS
  87900. CR_CAM_DATA
  87901. CR_CAM_MODE
  87902. CR_CAM_ROLL_TB_HIGH
  87903. CR_CAM_ROLL_TB_LOW
  87904. CR_CAPTURE
  87905. CR_CDRT
  87906. CR_CFINT
  87907. CR_CHAN
  87908. CR_CHIP_EN
  87909. CR_CHIP_ID_HI
  87910. CR_CHIP_ID_LO
  87911. CR_CHNL_MASK
  87912. CR_CHNL_SHIFT
  87913. CR_CIR_BASE_ADDR_HI
  87914. CR_CIR_BASE_ADDR_LO
  87915. CR_CIR_IRQ_RSRC
  87916. CR_CKDIV_MASK
  87917. CR_CKDIV_SHIFT
  87918. CR_CLKEN
  87919. CR_CM
  87920. CR_CMD_ASSERT_RTSN
  87921. CR_CMD_BREAK_RESET
  87922. CR_CMD_DISABLE_TIMEOUT_MODE
  87923. CR_CMD_MRPTR0
  87924. CR_CMD_MRPTR1
  87925. CR_CMD_NEGATE_RTSN
  87926. CR_CMD_RESET_BREAK_CHANGE
  87927. CR_CMD_RESET_ERR_STATUS
  87928. CR_CMD_RESET_MR
  87929. CR_CMD_RESET_RX
  87930. CR_CMD_RESET_TX
  87931. CR_CMD_RX_RESET
  87932. CR_CMD_SET_TIMEOUT_MODE
  87933. CR_CMD_START_BREAK
  87934. CR_CMD_STATUS_RESET
  87935. CR_CMD_STOP_BREAK
  87936. CR_CMD_TX_RESET
  87937. CR_CODECREADY
  87938. CR_CODEC_ADDR
  87939. CR_CODEC_DATAREAD
  87940. CR_CODEC_DATAWRITE
  87941. CR_CODEC_READ
  87942. CR_CODEC_WRITE
  87943. CR_COMPACT
  87944. CR_CONFIG_PHILIPS
  87945. CR_CONTROL
  87946. CR_CONTROL_ALGO_MD5
  87947. CR_CONTROL_ALGO_SHA1
  87948. CR_CONTROL_ALGO_SHA224
  87949. CR_CONTROL_ALGO_SHA256
  87950. CR_CONTROL_BYTE_ORDER_0123
  87951. CR_CONTROL_BYTE_ORDER_1032
  87952. CR_CONTROL_BYTE_ORDER_2310
  87953. CR_CONTROL_BYTE_ORDER_3210
  87954. CR_CONTROL_BYTE_ORDER_SHIFT
  87955. CR_CORE_DES1
  87956. CR_CORE_DES2
  87957. CR_CORE_REV
  87958. CR_COUNTER_MASK
  87959. CR_COUNTER_SHIFT
  87960. CR_COUNTER_SMASK
  87961. CR_CPEN
  87962. CR_CPU_RDY
  87963. CR_CR
  87964. CR_CRC16_CNT
  87965. CR_CRC32_CNT
  87966. CR_CREDIT_RETURN_DUE_TO_ERR_MASK
  87967. CR_CREDIT_RETURN_DUE_TO_ERR_SHIFT
  87968. CR_CREDIT_RETURN_DUE_TO_ERR_SMASK
  87969. CR_CREDIT_RETURN_DUE_TO_FORCE_MASK
  87970. CR_CREDIT_RETURN_DUE_TO_FORCE_SHIFT
  87971. CR_CREDIT_RETURN_DUE_TO_FORCE_SMASK
  87972. CR_CREDIT_RETURN_DUE_TO_PBC_MASK
  87973. CR_CREDIT_RETURN_DUE_TO_PBC_SHIFT
  87974. CR_CREDIT_RETURN_DUE_TO_PBC_SMASK
  87975. CR_CREDIT_RETURN_DUE_TO_THRESHOLD_MASK
  87976. CR_CREDIT_RETURN_DUE_TO_THRESHOLD_SHIFT
  87977. CR_CREDIT_RETURN_DUE_TO_THRESHOLD_SMASK
  87978. CR_CROP
  87979. CR_CRYPEN
  87980. CR_CWMIN_CWMAX
  87981. CR_D
  87982. CR_DATA1
  87983. CR_DATA16
  87984. CR_DATA32
  87985. CR_DATA8
  87986. CR_DATA_CGA
  87987. CR_DATA_MDA
  87988. CR_DATA_PORT
  87989. CR_DATA_PORT2
  87990. CR_DBG_FIFO_RD
  87991. CR_DBG_SELECT
  87992. CR_DECRYPTION_ERR_MUL
  87993. CR_DECRYPTION_ERR_UNI
  87994. CR_DECRY_ERR_FLG_HIGH
  87995. CR_DECRY_ERR_FLG_LOW
  87996. CR_DEC_NOT_ENC
  87997. CR_DEGLITCH
  87998. CR_DEL
  87999. CR_DELSEL
  88000. CR_DES_CBC
  88001. CR_DES_ECB
  88002. CR_DEVICE_STATE
  88003. CR_DEV_NAME
  88004. CR_DEV_POWER_DOWN
  88005. CR_DFM
  88006. CR_DISABLE_RX
  88007. CR_DISABLE_TX
  88008. CR_DITHER
  88009. CR_DMAEN
  88010. CR_DRIVER_NAME
  88011. CR_DT
  88012. CR_DTMD_PCM
  88013. CR_DTMD_SPDIF_PCM
  88014. CR_DTMD_SPDIF_STREAM
  88015. CR_DWL_MASK
  88016. CR_DWL_SHIFT
  88017. CR_DYN_MASK
  88018. CR_DYN_SHIFT
  88019. CR_EDGE
  88020. CR_EDM_0
  88021. CR_EDM_1
  88022. CR_EE
  88023. CR_EEPROM_PROTECT0
  88024. CR_EEPROM_PROTECT1
  88025. CR_EFDR
  88026. CR_EFDR2
  88027. CR_EFIR
  88028. CR_EFIR2
  88029. CR_EN
  88030. CR_ENABLE
  88031. CR_ENABLE_BIT
  88032. CR_ENABLE_BIT_OFFSET
  88033. CR_ENABLE_PS_MANUAL_AGC
  88034. CR_ENABLE_RX
  88035. CR_ENABLE_TX
  88036. CR_ENCRYPTION_TYPE
  88037. CR_EPROM
  88038. CR_ESS
  88039. CR_EncryBufMux
  88040. CR_F
  88041. CR_FCRC_0
  88042. CR_FCRC_1
  88043. CR_FEN
  88044. CR_FFLUSH
  88045. CR_FI
  88046. CR_FIFO_Length
  88047. CR_FIFO_SIZE
  88048. CR_FLAGS_MASK
  88049. CR_FSEL
  88050. CR_FTHRES_SHIFT
  88051. CR_FTIE
  88052. CR_FTO
  88053. CR_FW_DELAY_MSEC
  88054. CR_GPIO_1
  88055. CR_GPIO_2
  88056. CR_GPI_EN
  88057. CR_GROUP_HASH_P1
  88058. CR_GROUP_HASH_P2
  88059. CR_HA
  88060. CR_HCI_RXDMA_ENABLE
  88061. CR_HCI_TXDMA_ENABLE
  88062. CR_HOST
  88063. CR_HSPOL
  88064. CR_HSTSCHG
  88065. CR_HUME
  88066. CR_HUME_MASK
  88067. CR_HUME_SHIFT
  88068. CR_I
  88069. CR_I2C1
  88070. CR_I2C2
  88071. CR_I2C_WRITE
  88072. CR_I2S
  88073. CR_IFS_VALUE
  88074. CR_INDEX_CGA
  88075. CR_INDEX_MDA
  88076. CR_INDEX_PORT
  88077. CR_INDEX_PORT2
  88078. CR_INIT_REENUMERATE
  88079. CR_INTCLEAR
  88080. CR_INTENAB
  88081. CR_INTERRUPT
  88082. CR_INTR_ALL
  88083. CR_INTR_ALL_C
  88084. CR_INTR_ALL_G
  88085. CR_INTR_CREG
  88086. CR_INTR_DMA
  88087. CR_INTR_DMA0
  88088. CR_INTR_DMA1
  88089. CR_INTR_DMA2
  88090. CR_INTR_DMA3
  88091. CR_INTR_DMA4
  88092. CR_INTR_DMA5
  88093. CR_INTR_DMA6
  88094. CR_INTR_DMA7
  88095. CR_INTR_DMA_ALL
  88096. CR_INTR_EVENT
  88097. CR_INTSTAT
  88098. CR_INT_MESSAGE_WRITE_ERROR
  88099. CR_INT_NEW_RESULTS_SET
  88100. CR_INT_RESULTS_AVAILABLE
  88101. CR_INT_RESULT_READ_ERR
  88102. CR_INT_STATUS
  88103. CR_INVERT
  88104. CR_IOCS
  88105. CR_IT
  88106. CR_JPEG
  88107. CR_KEY128
  88108. CR_KEY192
  88109. CR_KEY256
  88110. CR_L
  88111. CR_L2
  88112. CR_L4
  88113. CR_LE1
  88114. CR_LE2
  88115. CR_LED
  88116. CR_LOCK_MASK
  88117. CR_LOGICAL_DEV_EN
  88118. CR_LOGICAL_DEV_SEL
  88119. CR_LO_SW
  88120. CR_M
  88121. CR_MAC_ADDR_P1
  88122. CR_MAC_ADDR_P2
  88123. CR_MAC_PS_STATE
  88124. CR_MAC_RX_ENABLE
  88125. CR_MAC_TX_ENABLE
  88126. CR_MANDATORY_RATE_TBL
  88127. CR_MAXD
  88128. CR_MAXPEXP
  88129. CR_MAX_BRIGHTNESS
  88130. CR_MAX_PHY_REG
  88131. CR_MEN
  88132. CR_MESSAGE_LENGTH_H
  88133. CR_MESSAGE_LENGTH_L
  88134. CR_MIND
  88135. CR_MONO
  88136. CR_MONO_D
  88137. CR_MULTIFUNC_PIN_SEL
  88138. CR_MUTE
  88139. CR_MulRW
  88140. CR_NAV_CCA
  88141. CR_NAV_CNT
  88142. CR_NBPBL_SHIFT
  88143. CR_NEXT_REENUMERATE
  88144. CR_OFFSET
  88145. CR_OUTPUT_PIN_SEL
  88146. CR_P
  88147. CR_PACK
  88148. CR_PACK_FLAGS
  88149. CR_PBAM
  88150. CR_PCI_RX_AddR_P1
  88151. CR_PCI_RX_AddR_P2
  88152. CR_PCI_TX_ADDR_P1
  88153. CR_PCI_TX_AddR_P2
  88154. CR_PCKPOL
  88155. CR_PCM
  88156. CR_PDTA
  88157. CR_PE1_PE2
  88158. CR_PE2_DLY
  88159. CR_PENDING_SUBCLASS
  88160. CR_PFCS
  88161. CR_PFE
  88162. CR_PG0
  88163. CR_PHY_DELAY
  88164. CR_PHY_ON
  88165. CR_PH_FINAL
  88166. CR_PH_HEADER
  88167. CR_PH_INIT
  88168. CR_PH_MASK
  88169. CR_PH_PAYLOAD
  88170. CR_PLAYDATA
  88171. CR_PLAYFULL
  88172. CR_PLAYHALF
  88173. CR_PLAYRESET
  88174. CR_PLAYUNDER
  88175. CR_PON
  88176. CR_PORT
  88177. CR_PORTCPU
  88178. CR_PORTIO
  88179. CR_PORTMXI
  88180. CR_PORTVXI
  88181. CR_PRESC_MASK
  88182. CR_PRE_TBTT
  88183. CR_PROTOCOL_ENABLE
  88184. CR_PSIZE
  88185. CR_PSIZE16
  88186. CR_PSIZE32
  88187. CR_PSIZE8
  88188. CR_PS_CTRL
  88189. CR_QUAD_EN_SPAN
  88190. CR_R
  88191. CR_RADIO_PD
  88192. CR_RADIO_PE
  88193. CR_RAF
  88194. CR_RANGE
  88195. CR_RATES_80211B
  88196. CR_RATES_80211G
  88197. CR_RATE_11M
  88198. CR_RATE_12M
  88199. CR_RATE_18M
  88200. CR_RATE_1M
  88201. CR_RATE_24M
  88202. CR_RATE_2M
  88203. CR_RATE_36M
  88204. CR_RATE_48M
  88205. CR_RATE_54M
  88206. CR_RATE_5_5M
  88207. CR_RATE_6M
  88208. CR_RATE_9M
  88209. CR_RDMA
  88210. CR_RE
  88211. CR_READ
  88212. CR_READ_RFD_ADDR
  88213. CR_READ_TCB_ADDR
  88214. CR_RECDATA
  88215. CR_RECEMPTY
  88216. CR_RECFULL
  88217. CR_RECOUNT_DELAY
  88218. CR_RECOVER
  88219. CR_RECRESET
  88220. CR_REG
  88221. CR_REG1
  88222. CR_REG_CODEC_ADDR
  88223. CR_REG_CODEC_DATAREAD
  88224. CR_REG_CODEC_DATAWRITE
  88225. CR_REG_PLAYFIFO
  88226. CR_REG_RECFIFO
  88227. CR_REG_RESETFIFO
  88228. CR_REG_STATUS
  88229. CR_REG_TIMER
  88230. CR_REQS
  88231. CR_REQS_MASK
  88232. CR_RESET
  88233. CR_RESET_SET
  88234. CR_RESET_UNSET
  88235. CR_RESULT_QUEUE
  88236. CR_RETRY_CNT
  88237. CR_RF2948_PD
  88238. CR_RFCFG
  88239. CR_RF_IF_CLK
  88240. CR_RF_IF_DATA
  88241. CR_RL
  88242. CR_ROMDIR
  88243. CR_RR
  88244. CR_RRD
  88245. CR_RRF
  88246. CR_RSD0
  88247. CR_RSSI_MGC
  88248. CR_RST
  88249. CR_RSTCTL
  88250. CR_RST_BUS_MASTER
  88251. CR_RTF
  88252. CR_RTS_CTS_RATE
  88253. CR_RWR
  88254. CR_RXD
  88255. CR_RXDMA_ENABLE
  88256. CR_RXE
  88257. CR_RXR
  88258. CR_RX_DELAY
  88259. CR_RX_DISABLE
  88260. CR_RX_ENABLE
  88261. CR_RX_FIFO_OVERRUN
  88262. CR_RX_FILTER
  88263. CR_RX_OFFSET
  88264. CR_RX_ON
  88265. CR_RX_PE_DELAY
  88266. CR_RX_THRESHOLD
  88267. CR_RX_TIMEOUT
  88268. CR_RX_TIME_OUT
  88269. CR_R_DATA_ON_ALPHA_PORT
  88270. CR_R_DATA_ON_CB_B_PORT
  88271. CR_R_DATA_ON_CR_R_PORT
  88272. CR_R_DATA_ON_Y_G_PORT
  88273. CR_R_FD
  88274. CR_R_PS10
  88275. CR_R_RXSTOP
  88276. CR_R_TXSTOP
  88277. CR_S
  88278. CR_SA2400_SER_AP
  88279. CR_SA2400_SER_RP
  88280. CR_SBUS
  88281. CR_SCHEDULE_ENABLE
  88282. CR_SCKP
  88283. CR_SCK_MASTER
  88284. CR_SDTA
  88285. CR_SECURITY_ENABLE
  88286. CR_SERIAL1
  88287. CR_SERIAL2
  88288. CR_SET_BRIGHTNESS
  88289. CR_SIZE
  88290. CR_SL1
  88291. CR_SL10
  88292. CR_SL11
  88293. CR_SL12
  88294. CR_SL2
  88295. CR_SL3
  88296. CR_SL4
  88297. CR_SL5
  88298. CR_SL6
  88299. CR_SL7
  88300. CR_SL8
  88301. CR_SL9
  88302. CR_SMIE
  88303. CR_SNIFFER_ON
  88304. CR_SOCS
  88305. CR_SOFTWARE_RESET
  88306. CR_SPDP
  88307. CR_SPUE
  88308. CR_SSHIFT
  88309. CR_ST
  88310. CR_STA
  88311. CR_START
  88312. CR_STATUS_MASK
  88313. CR_STATUS_SHIFT
  88314. CR_STATUS_SMASK
  88315. CR_SWI
  88316. CR_SWL_MASK
  88317. CR_SWL_SHIFT
  88318. CR_SWSP
  88319. CR_SWS_MASTER
  88320. CR_SW_BEACON_ENABLE
  88321. CR_SZ12
  88322. CR_SZ16
  88323. CR_SZ18
  88324. CR_SZ20
  88325. CR_S_MD
  88326. CR_T
  88327. CR_TBS
  88328. CR_TCEN
  88329. CR_TCIE
  88330. CR_TDES_CBC
  88331. CR_TDES_ECB
  88332. CR_TDM
  88333. CR_TDM_D
  88334. CR_TE
  88335. CR_TEIE
  88336. CR_THERM_INIT
  88337. CR_TIMER_CTRL_CFG
  88338. CR_TIMER_REV
  88339. CR_TIME_SCALE
  88340. CR_TKIP_MODE
  88341. CR_TLBIALLCFG
  88342. CR_TLBIALLCFG_MASK
  88343. CR_TLBIALLCFG_SHIFT
  88344. CR_TOIE
  88345. CR_TOTAL_RX_FRM
  88346. CR_TOTAL_TX_FRM
  88347. CR_TRE
  88348. CR_TRMD
  88349. CR_TSF_HIGH_PART
  88350. CR_TSF_LOW_PART
  88351. CR_TXD
  88352. CR_TXDMA_ENABLE
  88353. CR_TXE
  88354. CR_TXR
  88355. CR_TXRX_SW
  88356. CR_TX_DISABLE
  88357. CR_TX_ENABLE
  88358. CR_TX_END
  88359. CR_TX_NEXT_ACK
  88360. CR_TX_NEXT_NO_ACK
  88361. CR_TX_ON
  88362. CR_U
  88363. CR_UART_DLM_IER
  88364. CR_UART_ECR
  88365. CR_UART_IIR_FCR
  88366. CR_UART_LCR
  88367. CR_UART_LSR
  88368. CR_UART_MCR
  88369. CR_UART_MSR
  88370. CR_UART_RBR_THR_DLL
  88371. CR_UART_STATUS
  88372. CR_UNDERRUN_CNT
  88373. CR_USB_DEBUG_PORT
  88374. CR_V
  88375. CR_VALID
  88376. CR_VE
  88377. CR_VSPOL
  88378. CR_W
  88379. CR_WEPKEY0
  88380. CR_WEPKEY1
  88381. CR_WEPKEY10
  88382. CR_WEPKEY11
  88383. CR_WEPKEY12
  88384. CR_WEPKEY13
  88385. CR_WEPKEY14
  88386. CR_WEPKEY15
  88387. CR_WEPKEY2
  88388. CR_WEPKEY3
  88389. CR_WEPKEY4
  88390. CR_WEPKEY5
  88391. CR_WEPKEY6
  88392. CR_WEPKEY7
  88393. CR_WEPKEY8
  88394. CR_WEPKEY9
  88395. CR_WEP_PROTECT
  88396. CR_WMRT
  88397. CR_WR_RDN
  88398. CR_W_AB
  88399. CR_W_ALP
  88400. CR_W_AM
  88401. CR_W_ARP
  88402. CR_W_ENH
  88403. CR_W_FD
  88404. CR_W_PROM
  88405. CR_W_PS10
  88406. CR_W_PS1000
  88407. CR_W_RXEN
  88408. CR_W_RXMODEMASK
  88409. CR_W_SEP
  88410. CR_W_TXEN
  88411. CR_XP
  88412. CR_Z
  88413. CR_ZD1211B_AIFS_CTL1
  88414. CR_ZD1211B_AIFS_CTL2
  88415. CR_ZD1211B_CWIN_MAX_MIN_AC0
  88416. CR_ZD1211B_CWIN_MAX_MIN_AC1
  88417. CR_ZD1211B_CWIN_MAX_MIN_AC2
  88418. CR_ZD1211B_CWIN_MAX_MIN_AC3
  88419. CR_ZD1211B_RETRY_MAX
  88420. CR_ZD1211B_TXOP
  88421. CR_ZD1211_RETRY_MAX
  88422. CRm
  88423. CRm64
  88424. CRm_mask
  88425. CRm_shift
  88426. CRn
  88427. CRn_mask
  88428. CRn_shift
  88429. CS
  88430. CS0
  88431. CS0BCR
  88432. CS0CF0
  88433. CS0CF0_RESERVED
  88434. CS0CF1
  88435. CS0CF1_RESERVED
  88436. CS0WCR
  88437. CS0_ACCESS_REG
  88438. CS0_ADDR_REG
  88439. CS0_CNFG_REG
  88440. CS0_EXT_ADDR_REG
  88441. CS0_MARK
  88442. CS0_MASK_REG
  88443. CS0_N
  88444. CS0_N_MARK
  88445. CS0_SIZE
  88446. CS0_START
  88447. CS1
  88448. CS1CF0
  88449. CS1CF0_RESERVED
  88450. CS1CF1
  88451. CS1CF1_RESERVED
  88452. CS1NVMEN_MASK
  88453. CS1NVMEN_SHIFT
  88454. CS1_A26_MARK
  88455. CS1_ACCESS_REG
  88456. CS1_ADDR_REG
  88457. CS1_BASE
  88458. CS1_CNFG_REG
  88459. CS1_EXT_ADDR_REG
  88460. CS1_MARK
  88461. CS1_MASK_REG
  88462. CS1_N_A26_MARK
  88463. CS1_PRIO
  88464. CS1n
  88465. CS2000_AUX_LOCK_CFG_MASK
  88466. CS2000_AUX_LOCK_CFG_OD_LOW
  88467. CS2000_AUX_LOCK_CFG_PP_HIGH
  88468. CS2000_AUX_OUT_DIS
  88469. CS2000_AUX_OUT_SRC_CLK_IN
  88470. CS2000_AUX_OUT_SRC_CLK_OUT
  88471. CS2000_AUX_OUT_SRC_MASK
  88472. CS2000_AUX_OUT_SRC_PLL_LOCK
  88473. CS2000_AUX_OUT_SRC_REF_CLK
  88474. CS2000_CLK_IN_BW_1
  88475. CS2000_CLK_IN_BW_128
  88476. CS2000_CLK_IN_BW_16
  88477. CS2000_CLK_IN_BW_2
  88478. CS2000_CLK_IN_BW_32
  88479. CS2000_CLK_IN_BW_4
  88480. CS2000_CLK_IN_BW_64
  88481. CS2000_CLK_IN_BW_8
  88482. CS2000_CLK_IN_BW_MASK
  88483. CS2000_CLK_OUT_DIS
  88484. CS2000_CLK_OUT_UNL
  88485. CS2000_CLK_SKIP_EN
  88486. CS2000_DEVICE_MASK
  88487. CS2000_DEV_CFG_1
  88488. CS2000_DEV_CFG_2
  88489. CS2000_DEV_CTRL
  88490. CS2000_DEV_ID
  88491. CS2000_EN_DEV_CFG_1
  88492. CS2000_EN_DEV_CFG_2
  88493. CS2000_FRAC_N_SRC_DYNAMIC
  88494. CS2000_FRAC_N_SRC_MASK
  88495. CS2000_FRAC_N_SRC_STATIC
  88496. CS2000_FREEZE
  88497. CS2000_FUN_CFG_1
  88498. CS2000_FUN_CFG_2
  88499. CS2000_FUN_CFG_3
  88500. CS2000_GLOBAL_CFG
  88501. CS2000_H_INCLUDED
  88502. CS2000_LOCK_CLK_MASK
  88503. CS2000_LOCK_CLK_SHIFT
  88504. CS2000_L_F_RATIO_CFG_12_20
  88505. CS2000_L_F_RATIO_CFG_20_12
  88506. CS2000_L_F_RATIO_CFG_MASK
  88507. CS2000_RATIO_0
  88508. CS2000_RATIO_1
  88509. CS2000_RATIO_2
  88510. CS2000_RATIO_3
  88511. CS2000_REF_CLK_DIV_1
  88512. CS2000_REF_CLK_DIV_2
  88513. CS2000_REF_CLK_DIV_4
  88514. CS2000_REF_CLK_DIV_MASK
  88515. CS2000_REVISION_MASK
  88516. CS2000_R_MOD_SEL_1
  88517. CS2000_R_MOD_SEL_1_16
  88518. CS2000_R_MOD_SEL_1_2
  88519. CS2000_R_MOD_SEL_1_4
  88520. CS2000_R_MOD_SEL_1_8
  88521. CS2000_R_MOD_SEL_2
  88522. CS2000_R_MOD_SEL_4
  88523. CS2000_R_MOD_SEL_8
  88524. CS2000_R_MOD_SEL_MASK
  88525. CS2000_R_SEL_MASK
  88526. CS2000_R_SEL_SHIFT
  88527. CS2000_UNLOCK
  88528. CS2BCR
  88529. CS2CDR_LDB_DI0_CLK_SEL_SHIFT
  88530. CS2CDR_LDB_DI1_CLK_SEL_SHIFT
  88531. CS2WCR
  88532. CS2_ACCESS_REG
  88533. CS2_ADDR_REG
  88534. CS2_CNFG_REG
  88535. CS2_EXT_ADDR_REG
  88536. CS2_MARK
  88537. CS2_MASK_REG
  88538. CS2_N
  88539. CS2_PRIO
  88540. CS35L32_ADSP_CTL
  88541. CS35L32_ADSP_DATACFG_MASK
  88542. CS35L32_ADSP_MASTER_MASK
  88543. CS35L32_ADSP_SHARE_MASK
  88544. CS35L32_AUDIO_LED_MNGR
  88545. CS35L32_BATT_RECOV_3_1V
  88546. CS35L32_BATT_RECOV_3_2V
  88547. CS35L32_BATT_RECOV_3_3V
  88548. CS35L32_BATT_RECOV_3_4V
  88549. CS35L32_BATT_RECOV_3_5V
  88550. CS35L32_BATT_RECOV_3_6V
  88551. CS35L32_BATT_REC_MASK
  88552. CS35L32_BATT_THRESHOLD
  88553. CS35L32_BATT_THRESH_3_1V
  88554. CS35L32_BATT_THRESH_3_2V
  88555. CS35L32_BATT_THRESH_3_3V
  88556. CS35L32_BATT_THRESH_3_4V
  88557. CS35L32_BATT_THRESH_MASK
  88558. CS35L32_BOOST_MASK
  88559. CS35L32_BOOST_MGR_AUTO
  88560. CS35L32_BOOST_MGR_AUTO_AUDIO
  88561. CS35L32_BOOST_MGR_BYPASS
  88562. CS35L32_BOOST_MGR_FIXED
  88563. CS35L32_BST_CPCP_CTL
  88564. CS35L32_CHIP_ID
  88565. CS35L32_CLASSD_CTL
  88566. CS35L32_CLK_CTL
  88567. CS35L32_DATA_CFG_LR
  88568. CS35L32_DATA_CFG_LR_STAT
  88569. CS35L32_DATA_CFG_LR_VP
  88570. CS35L32_DATA_CFG_LR_VPSTAT
  88571. CS35L32_DEVID_AB
  88572. CS35L32_DEVID_CD
  88573. CS35L32_DEVID_E
  88574. CS35L32_FAB_ID
  88575. CS35L32_FLASH_INHIBIT
  88576. CS35L32_FLASH_MODE
  88577. CS35L32_FLASH_TIMER
  88578. CS35L32_FORMATS
  88579. CS35L32_GAIN_MGR_MASK
  88580. CS35L32_IMON_SCALING
  88581. CS35L32_INT_MASK_1
  88582. CS35L32_INT_MASK_2
  88583. CS35L32_INT_MASK_3
  88584. CS35L32_INT_STATUS_1
  88585. CS35L32_INT_STATUS_2
  88586. CS35L32_INT_STATUS_3
  88587. CS35L32_LED_STATUS
  88588. CS35L32_MAX_REGISTER
  88589. CS35L32_MCLKDIS
  88590. CS35L32_MCLK_DIV2
  88591. CS35L32_MCLK_DIV2_MASK
  88592. CS35L32_MCLK_MASK
  88593. CS35L32_MCLK_RATIO
  88594. CS35L32_MCLK_RATIO_MASK
  88595. CS35L32_MOVIE_MODE
  88596. CS35L32_NUM_SUPPLIES
  88597. CS35L32_PDN_ADSP
  88598. CS35L32_PDN_ALL
  88599. CS35L32_PDN_AMP
  88600. CS35L32_PDN_BOOST
  88601. CS35L32_PDN_IMON
  88602. CS35L32_PDN_VMON
  88603. CS35L32_PDN_VPMON
  88604. CS35L32_PROTECT_CTL
  88605. CS35L32_PWRCTL1
  88606. CS35L32_PWRCTL2
  88607. CS35L32_RATES
  88608. CS35L32_REV_ID
  88609. CS35L32_SDOUT_3ST
  88610. CS35L32_VMON
  88611. CS35L33_ADC_CTL
  88612. CS35L33_ADC_NOTCH_DIS
  88613. CS35L33_ADSPCLK_ERR
  88614. CS35L33_ADSP_CTL
  88615. CS35L33_ADSP_DRIVE
  88616. CS35L33_ADSP_FS
  88617. CS35L33_ALIVE_ERR
  88618. CS35L33_ALIVE_RATE
  88619. CS35L33_ALIVE_WD_DIS
  88620. CS35L33_ALIVE_WD_DIS2
  88621. CS35L33_AMP_CAL
  88622. CS35L33_AMP_CTL
  88623. CS35L33_AMP_DRV_SEL_MASK
  88624. CS35L33_AMP_DRV_SEL_SHIFT
  88625. CS35L33_AMP_DRV_SEL_SRC
  88626. CS35L33_AMP_GAIN
  88627. CS35L33_AMP_SD
  88628. CS35L33_AMP_SHORT
  88629. CS35L33_AMP_SHORT_RLS
  88630. CS35L33_AUDIN_RX_DEPTH
  88631. CS35L33_AUDIN_RX_DEPTH_SHIFT
  88632. CS35L33_BOOT_DELAY
  88633. CS35L33_BST_COEFF3
  88634. CS35L33_BST_CTL1
  88635. CS35L33_BST_CTL2
  88636. CS35L33_BST_CTL4
  88637. CS35L33_BST_CTL_MASK
  88638. CS35L33_BST_CTL_SHIFT
  88639. CS35L33_BST_CTL_SRC
  88640. CS35L33_BST_PEAK_CTL
  88641. CS35L33_BST_RGS
  88642. CS35L33_CAL_ERR
  88643. CS35L33_CAL_ERR_RLS
  88644. CS35L33_CHIP_ID
  88645. CS35L33_CLASSD_CTL
  88646. CS35L33_CLASS_D_CTL_MASK
  88647. CS35L33_CLASS_HG_ENA_SHIFT
  88648. CS35L33_CLASS_HG_EN_MASK
  88649. CS35L33_CLK_CTL
  88650. CS35L33_DAC_CTL
  88651. CS35L33_DAC_NOTCH_DIS
  88652. CS35L33_DEVID_AB
  88653. CS35L33_DEVID_CD
  88654. CS35L33_DEVID_E
  88655. CS35L33_DIAG_CTRL_1
  88656. CS35L33_DIAG_CTRL_2
  88657. CS35L33_DIAG_LOCK
  88658. CS35L33_DIGSFT
  88659. CS35L33_DIG_VOL_CTL
  88660. CS35L33_DSR_RATE
  88661. CS35L33_FAB_ID
  88662. CS35L33_FORMATS
  88663. CS35L33_GAIN_CHG_ZC_MASK
  88664. CS35L33_GAIN_CHG_ZC_SHIFT
  88665. CS35L33_HD_RM_MASK
  88666. CS35L33_HD_RM_SHIFT
  88667. CS35L33_HG_EN
  88668. CS35L33_HG_HEAD
  88669. CS35L33_HG_MEMLDO_CTL
  88670. CS35L33_HG_REL_RATE
  88671. CS35L33_HG_STATUS
  88672. CS35L33_IMON_OVFL
  88673. CS35L33_IMON_SCALE
  88674. CS35L33_INT_FS_RATE
  88675. CS35L33_INT_MASK_1
  88676. CS35L33_INT_MASK_2
  88677. CS35L33_INT_STATUS_1
  88678. CS35L33_INT_STATUS_2
  88679. CS35L33_INV_DAC
  88680. CS35L33_INV_IMON
  88681. CS35L33_INV_VMON
  88682. CS35L33_LDO_DEL
  88683. CS35L33_LDO_DISABLE_MASK
  88684. CS35L33_LDO_DISABLE_SHIFT
  88685. CS35L33_LDO_ENTRY_DELAY_MASK
  88686. CS35L33_LDO_ENTRY_DELAY_SHIFT
  88687. CS35L33_LDO_THLD_MASK
  88688. CS35L33_LDO_THLD_SHIFT
  88689. CS35L33_MAX_REGISTER
  88690. CS35L33_MCLKDIS
  88691. CS35L33_MCLKDIV2
  88692. CS35L33_MCLK_11289
  88693. CS35L33_MCLK_12
  88694. CS35L33_MCLK_12288
  88695. CS35L33_MCLK_5644
  88696. CS35L33_MCLK_6
  88697. CS35L33_MCLK_6144
  88698. CS35L33_MCLK_ERR
  88699. CS35L33_MEM_DEPTH_MASK
  88700. CS35L33_MEM_DEPTH_SHIFT
  88701. CS35L33_MS_MASK
  88702. CS35L33_M_ALIVE_ERR
  88703. CS35L33_M_ALIVE_ERR_SHIFT
  88704. CS35L33_M_AMP_SHORT
  88705. CS35L33_M_AMP_SHORT_SHIFT
  88706. CS35L33_M_CAL_ERR
  88707. CS35L33_M_CAL_ERR_SHIFT
  88708. CS35L33_M_OTE
  88709. CS35L33_M_OTE_SHIFT
  88710. CS35L33_M_OTW
  88711. CS35L33_M_OTW_SHIFT
  88712. CS35L33_OTE
  88713. CS35L33_OTE_RLS
  88714. CS35L33_OTW
  88715. CS35L33_OTW_RLS
  88716. CS35L33_PDN_ALL
  88717. CS35L33_PDN_AMP
  88718. CS35L33_PDN_BST
  88719. CS35L33_PDN_DONE
  88720. CS35L33_PDN_IMON
  88721. CS35L33_PDN_IMON_SHIFT
  88722. CS35L33_PDN_SDIN
  88723. CS35L33_PDN_SDIN_SHIFT
  88724. CS35L33_PDN_TDM
  88725. CS35L33_PDN_TDM_SHIFT
  88726. CS35L33_PDN_VBSTMON
  88727. CS35L33_PDN_VBSTMON_SHIFT
  88728. CS35L33_PDN_VMON
  88729. CS35L33_PDN_VMON_SHIFT
  88730. CS35L33_PDN_VPMON
  88731. CS35L33_PDN_VPMON_SHIFT
  88732. CS35L33_PROTECT_CTL
  88733. CS35L33_PWRCTL1
  88734. CS35L33_PWRCTL2
  88735. CS35L33_RATES
  88736. CS35L33_REV_ID
  88737. CS35L33_RX_ALIVE
  88738. CS35L33_RX_AUD
  88739. CS35L33_RX_SPLY
  88740. CS35L33_SDIN_LOC
  88741. CS35L33_SDOUT_3ST_I2S
  88742. CS35L33_SDOUT_3ST_I2S_SHIFT
  88743. CS35L33_SDOUT_3ST_TDM
  88744. CS35L33_TDM_WD_SEL
  88745. CS35L33_TX_EN1
  88746. CS35L33_TX_EN2
  88747. CS35L33_TX_EN3
  88748. CS35L33_TX_EN4
  88749. CS35L33_TX_FLAG
  88750. CS35L33_TX_IMON
  88751. CS35L33_TX_VBSTMON
  88752. CS35L33_TX_VMON
  88753. CS35L33_TX_VPMON
  88754. CS35L33_VBSTMON_OVFL
  88755. CS35L33_VBST_SR_STEP
  88756. CS35L33_VMON_OVFL
  88757. CS35L33_VPMON_OVFL
  88758. CS35L33_VP_HG_AUTO_MASK
  88759. CS35L33_VP_HG_AUTO_SHIFT
  88760. CS35L33_VP_HG_MASK
  88761. CS35L33_VP_HG_RATE_MASK
  88762. CS35L33_VP_HG_RATE_SHIFT
  88763. CS35L33_VP_HG_SHIFT
  88764. CS35L33_VP_HG_VA_MASK
  88765. CS35L33_VP_HG_VA_SHIFT
  88766. CS35L33_X_LOC
  88767. CS35L33_X_LOC_SHIFT
  88768. CS35L33_X_STATE
  88769. CS35L33_X_STATE_SHIFT
  88770. CS35L34_ADSP_CLK_CTL
  88771. CS35L34_ADSP_DRIVE
  88772. CS35L34_ADSP_FS
  88773. CS35L34_ADSP_I2S_CTL
  88774. CS35L34_ADSP_M_S
  88775. CS35L34_ADSP_RATE
  88776. CS35L34_ADSP_TDM_CTL
  88777. CS35L34_ALIVE_ERR
  88778. CS35L34_ALIVE_WD_DIS
  88779. CS35L34_AMP_ANLG_GAIN_CTL
  88780. CS35L34_AMP_DIGSFT
  88781. CS35L34_AMP_DIG_VOL
  88782. CS35L34_AMP_DIG_VOL_CTL
  88783. CS35L34_AMP_DSR_RATE_MASK
  88784. CS35L34_AMP_DSR_RATE_SHIFT
  88785. CS35L34_AMP_INP_DRV_CTL
  88786. CS35L34_AMP_KEEP_ALIVE_CTL
  88787. CS35L34_AMP_SHORT
  88788. CS35L34_BST_CONV_COEF_1
  88789. CS35L34_BST_CONV_COEF_2
  88790. CS35L34_BST_CONV_SLOPE_COMP
  88791. CS35L34_BST_CONV_SW_FREQ
  88792. CS35L34_BST_CVTL_MASK
  88793. CS35L34_BST_CVTR_V_CTL
  88794. CS35L34_BST_HIGH
  88795. CS35L34_BST_HIGH_FLAG
  88796. CS35L34_BST_IPK_FLAG
  88797. CS35L34_BST_PEAK_I
  88798. CS35L34_BST_PEAK_MASK
  88799. CS35L34_BST_RAMP_CTL
  88800. CS35L34_CAL_ERR
  88801. CS35L34_CAL_ERR_RLS
  88802. CS35L34_CHIP_ID
  88803. CS35L34_CLASS_H_CTL
  88804. CS35L34_CLASS_H_FET_DRIVE_CTL
  88805. CS35L34_CLASS_H_HEADRM_CTL
  88806. CS35L34_CLASS_H_RELEASE_RATE
  88807. CS35L34_CLASS_H_STATUS
  88808. CS35L34_DEVID_AB
  88809. CS35L34_DEVID_CD
  88810. CS35L34_DEVID_E
  88811. CS35L34_DIAG_MODE_CTL_1
  88812. CS35L34_DIAG_MODE_CTL_2
  88813. CS35L34_DIAG_MODE_REG_LOCK
  88814. CS35L34_DISCHG_FLT
  88815. CS35L34_DRV_STR
  88816. CS35L34_DRV_STR_SRC
  88817. CS35L34_FAB_ID
  88818. CS35L34_FORMATS
  88819. CS35L34_GAIN_ZC
  88820. CS35L34_GAIN_ZC_MASK
  88821. CS35L34_GAIN_ZC_SHIFT
  88822. CS35L34_I2S_LOC_MASK
  88823. CS35L34_I2S_LOC_SHIFT
  88824. CS35L34_IMON_OVFL
  88825. CS35L34_INT_FS_RATE
  88826. CS35L34_INT_MASK_1
  88827. CS35L34_INT_MASK_2
  88828. CS35L34_INT_MASK_3
  88829. CS35L34_INT_MASK_4
  88830. CS35L34_INT_STATUS_1
  88831. CS35L34_INT_STATUS_2
  88832. CS35L34_INT_STATUS_3
  88833. CS35L34_INT_STATUS_4
  88834. CS35L34_INV
  88835. CS35L34_LBST_SHORT
  88836. CS35L34_MAX_REGISTER
  88837. CS35L34_MCLKDIS
  88838. CS35L34_MCLKDIV2
  88839. CS35L34_MCLK_11289
  88840. CS35L34_MCLK_12
  88841. CS35L34_MCLK_12288
  88842. CS35L34_MCLK_5644
  88843. CS35L34_MCLK_6
  88844. CS35L34_MCLK_6144
  88845. CS35L34_MCLK_CTL
  88846. CS35L34_MCLK_DIS
  88847. CS35L34_MCLK_DIV
  88848. CS35L34_MCLK_ERR
  88849. CS35L34_MCLK_RATE_5P6448
  88850. CS35L34_MCLK_RATE_6P0000
  88851. CS35L34_MCLK_RATE_6P1440
  88852. CS35L34_MCLK_RATE_MASK
  88853. CS35L34_MULT_DEV_SYNCH1
  88854. CS35L34_MULT_DEV_SYNCH2
  88855. CS35L34_MUTE
  88856. CS35L34_M_ADSP_CLK_ERR
  88857. CS35L34_M_ADSP_CLK_SHIFT
  88858. CS35L34_M_ALIVE_ERR
  88859. CS35L34_M_ALIVE_ERR_SHIFT
  88860. CS35L34_M_AMP_SHORT
  88861. CS35L34_M_AMP_SHORT_SHIFT
  88862. CS35L34_M_BST_HIGH
  88863. CS35L34_M_BST_HIGH_FLAG
  88864. CS35L34_M_BST_HIGH_FLAG_SHIFT
  88865. CS35L34_M_BST_HIGH_SHIFT
  88866. CS35L34_M_BST_IPK_FLAG
  88867. CS35L34_M_BST_IPK_FLAG_SHIFT
  88868. CS35L34_M_CAL_ERR
  88869. CS35L34_M_CAL_ERR_SHIFT
  88870. CS35L34_M_IMON_OVFL
  88871. CS35L34_M_IMON_OVFL_SHIFT
  88872. CS35L34_M_LBST_SHORT
  88873. CS35L34_M_LBST_SHORT_SHIFT
  88874. CS35L34_M_MCLK_ERR
  88875. CS35L34_M_MCLK_SHIFT
  88876. CS35L34_M_OTE
  88877. CS35L34_M_OTE_SHIFT
  88878. CS35L34_M_OTW
  88879. CS35L34_M_OTW_SHIFT
  88880. CS35L34_M_PDN_DONE
  88881. CS35L34_M_PDN_DONE_SHIFT
  88882. CS35L34_M_PRED_CLR
  88883. CS35L34_M_PRED_CLR_SHIFT
  88884. CS35L34_M_PRED_ERR
  88885. CS35L34_M_PRED_SHIFT
  88886. CS35L34_M_VBSTMON_OVFL
  88887. CS35L34_M_VBSTMON_OVFL_SHIFT
  88888. CS35L34_M_VMON_OVFL
  88889. CS35L34_M_VMON_OVFL_SHIFT
  88890. CS35L34_M_VPBR_CLR
  88891. CS35L34_M_VPBR_CLR_SHIFT
  88892. CS35L34_M_VPBR_ERR
  88893. CS35L34_M_VPBR_SHIFT
  88894. CS35L34_M_VPMON_OVFL
  88895. CS35L34_M_VPMON_OVFL_SHIFT
  88896. CS35L34_NOTCH_DIS
  88897. CS35L34_OTE
  88898. CS35L34_OTE_RLS
  88899. CS35L34_OTP_TRIM_STATUS
  88900. CS35L34_OTW
  88901. CS35L34_OTW_ATTN_MASK
  88902. CS35L34_OTW_RLS
  88903. CS35L34_OTW_THRD_MASK
  88904. CS35L34_PDN_ALL
  88905. CS35L34_PDN_AMP
  88906. CS35L34_PDN_BST
  88907. CS35L34_PDN_CLASSH
  88908. CS35L34_PDN_DONE
  88909. CS35L34_PDN_IMON
  88910. CS35L34_PDN_PRED
  88911. CS35L34_PDN_SDIN
  88912. CS35L34_PDN_SDOUT
  88913. CS35L34_PDN_TDM
  88914. CS35L34_PDN_VBSTMON_OUT
  88915. CS35L34_PDN_VMON
  88916. CS35L34_PDN_VMON_OUT
  88917. CS35L34_PDN_VPBR
  88918. CS35L34_PRED_BROWNOUT_RATE_CTL
  88919. CS35L34_PRED_BROWNOUT_THRESH
  88920. CS35L34_PRED_BROWNOUT_VOL_CTL
  88921. CS35L34_PRED_BRWNOUT_ATT_STATUS
  88922. CS35L34_PRED_CLR
  88923. CS35L34_PRED_ERR
  88924. CS35L34_PRED_MAN_SAFE_VPI_CTL
  88925. CS35L34_PRED_MAX_ATTEN_SPK_LOAD
  88926. CS35L34_PRED_WAIT_CTL
  88927. CS35L34_PRED_ZVP_INIT_IMP_CTL
  88928. CS35L34_PROTECT_CTL
  88929. CS35L34_PROT_RELEASE_CTL
  88930. CS35L34_PWRCTL1
  88931. CS35L34_PWRCTL2
  88932. CS35L34_PWRCTL3
  88933. CS35L34_RATES
  88934. CS35L34_REGISTER_COUNT
  88935. CS35L34_REV_ID
  88936. CS35L34_SDOUT_3ST_TDM
  88937. CS35L34_SFT_RST
  88938. CS35L34_SHORT_RLS
  88939. CS35L34_SPKR_MON_CTL
  88940. CS35L34_START_DELAY
  88941. CS35L34_SYNC2_MASK
  88942. CS35L34_TDM_RX_CTL_1_AUDIN
  88943. CS35L34_TDM_RX_CTL_3_ALIVE
  88944. CS35L34_TDM_TX_CTL_1_VMON
  88945. CS35L34_TDM_TX_CTL_2_IMON
  88946. CS35L34_TDM_TX_CTL_3_VPMON
  88947. CS35L34_TDM_TX_CTL_4_VBSTMON
  88948. CS35L34_TDM_TX_CTL_5_FLAG1
  88949. CS35L34_TDM_TX_CTL_6_FLAG2
  88950. CS35L34_TDM_TX_SLOT_EN_1
  88951. CS35L34_TDM_TX_SLOT_EN_2
  88952. CS35L34_TDM_TX_SLOT_EN_3
  88953. CS35L34_TDM_TX_SLOT_EN_4
  88954. CS35L34_VBSTMON_OVFL
  88955. CS35L34_VMON_OVFL
  88956. CS35L34_VPBR_ATTEN_STATUS
  88957. CS35L34_VPBR_CLR
  88958. CS35L34_VPBR_CTL
  88959. CS35L34_VPBR_ERR
  88960. CS35L34_VPBR_TIMING_CTL
  88961. CS35L34_VPBR_VOL_CTL
  88962. CS35L34_VPMON_OVFL
  88963. CS35L34_X_LOC
  88964. CS35L34_X_LOC_SHIFT
  88965. CS35L34_X_STATE
  88966. CS35L34_X_STATE_SHIFT
  88967. CS35L35_ADVIN_DEPTH_MASK
  88968. CS35L35_ADVIN_DEPTH_SHIFT
  88969. CS35L35_ADVIN_RXLOC_CTL
  88970. CS35L35_ADV_DIG_VOL
  88971. CS35L35_ADV_IN_LOC_MASK
  88972. CS35L35_ADV_IN_LOC_SHIFT
  88973. CS35L35_ADV_IN_LR_MASK
  88974. CS35L35_ADV_IN_LR_SHIFT
  88975. CS35L35_AMP_DIGSFT_MASK
  88976. CS35L35_AMP_DIGSFT_SHIFT
  88977. CS35L35_AMP_DIG_VOL
  88978. CS35L35_AMP_DIG_VOL_CTL
  88979. CS35L35_AMP_GAIN_ADV_CTL
  88980. CS35L35_AMP_GAIN_AUD_CTL
  88981. CS35L35_AMP_GAIN_PDM_CTL
  88982. CS35L35_AMP_GAIN_ZC_MASK
  88983. CS35L35_AMP_GAIN_ZC_SHIFT
  88984. CS35L35_AMP_INP_DRV_CTL
  88985. CS35L35_AMP_MUTE_MASK
  88986. CS35L35_AMP_MUTE_SHIFT
  88987. CS35L35_AMP_SHORT
  88988. CS35L35_AUDIN_DEPTH_CTL
  88989. CS35L35_AUDIN_DEPTH_MASK
  88990. CS35L35_AUDIN_DEPTH_SHIFT
  88991. CS35L35_AUDIN_RXLOC_CTL
  88992. CS35L35_AUD_IN_LOC_MASK
  88993. CS35L35_AUD_IN_LOC_SHIFT
  88994. CS35L35_AUD_IN_LR_MASK
  88995. CS35L35_AUD_IN_LR_SHIFT
  88996. CS35L35_BSTCVRT_CTL_MASK
  88997. CS35L35_BSTCVRT_CTL_SEL_MASK
  88998. CS35L35_BST_CONV_COEFF_MASK
  88999. CS35L35_BST_CONV_COEF_1
  89000. CS35L35_BST_CONV_COEF_2
  89001. CS35L35_BST_CONV_LBST_MASK
  89002. CS35L35_BST_CONV_SLOPE_COMP
  89003. CS35L35_BST_CONV_SLOPE_MASK
  89004. CS35L35_BST_CONV_SWFREQ_MASK
  89005. CS35L35_BST_CONV_SW_FREQ
  89006. CS35L35_BST_CTL_MASK
  89007. CS35L35_BST_CTL_SHIFT
  89008. CS35L35_BST_CVTR_V_CTL
  89009. CS35L35_BST_HIGH
  89010. CS35L35_BST_HIGH_FLAG
  89011. CS35L35_BST_IPK_FLAG
  89012. CS35L35_BST_IPK_MASK
  89013. CS35L35_BST_IPK_SHIFT
  89014. CS35L35_BST_PEAK_I
  89015. CS35L35_BST_RAMP_CTL
  89016. CS35L35_CAL_ERR
  89017. CS35L35_CAL_ERR_RLS
  89018. CS35L35_CHIP_ID
  89019. CS35L35_CH_BST_LIM_MASK
  89020. CS35L35_CH_BST_LIM_SHIFT
  89021. CS35L35_CH_BST_OVR_MASK
  89022. CS35L35_CH_BST_OVR_SHIFT
  89023. CS35L35_CH_HDRM_CTL_MASK
  89024. CS35L35_CH_HDRM_CTL_SHIFT
  89025. CS35L35_CH_MEM_DEPTH_MASK
  89026. CS35L35_CH_MEM_DEPTH_SHIFT
  89027. CS35L35_CH_REL_RATE_MASK
  89028. CS35L35_CH_REL_RATE_SHIFT
  89029. CS35L35_CH_STEREO_MASK
  89030. CS35L35_CH_STEREO_SHIFT
  89031. CS35L35_CH_VP_AUTO_MASK
  89032. CS35L35_CH_VP_AUTO_SHIFT
  89033. CS35L35_CH_VP_MAN_MASK
  89034. CS35L35_CH_VP_MAN_SHIFT
  89035. CS35L35_CH_VP_RATE_MASK
  89036. CS35L35_CH_VP_RATE_SHIFT
  89037. CS35L35_CH_WKFET_DEL_MASK
  89038. CS35L35_CH_WKFET_DEL_SHIFT
  89039. CS35L35_CH_WKFET_DIS_MASK
  89040. CS35L35_CH_WKFET_DIS_SHIFT
  89041. CS35L35_CH_WKFET_THLD_MASK
  89042. CS35L35_CH_WKFET_THLD_SHIFT
  89043. CS35L35_CLASS_H_CTL
  89044. CS35L35_CLASS_H_FET_DRIVE_CTL
  89045. CS35L35_CLASS_H_HEADRM_CTL
  89046. CS35L35_CLASS_H_RELEASE_RATE
  89047. CS35L35_CLASS_H_STATUS
  89048. CS35L35_CLASS_H_VP_CTL
  89049. CS35L35_CLK_CTL1
  89050. CS35L35_CLK_CTL2
  89051. CS35L35_CLK_CTL2_MASK
  89052. CS35L35_CLK_CTL3
  89053. CS35L35_CLK_SOURCE_MASK
  89054. CS35L35_CLK_SOURCE_MCLK
  89055. CS35L35_CLK_SOURCE_PDM
  89056. CS35L35_CLK_SOURCE_SCLK
  89057. CS35L35_CLK_SOURCE_SHIFT
  89058. CS35L35_DEVID_AB
  89059. CS35L35_DEVID_CD
  89060. CS35L35_DEVID_E
  89061. CS35L35_DIAG_MODE_CTL_1
  89062. CS35L35_DIAG_MODE_CTL_2
  89063. CS35L35_DIAG_MODE_REG_LOCK
  89064. CS35L35_DISCHG_FILT_MASK
  89065. CS35L35_DISCHG_FILT_SHIFT
  89066. CS35L35_DISCHG_FLT
  89067. CS35L35_FAB_ID
  89068. CS35L35_FIRSTREG
  89069. CS35L35_FORMATS
  89070. CS35L35_GPI_CTL
  89071. CS35L35_IMON_DEPTH_MASK
  89072. CS35L35_IMON_DEPTH_SHIFT
  89073. CS35L35_IMON_OVFL
  89074. CS35L35_IMON_SCALE_CTL
  89075. CS35L35_IMON_SCALE_MASK
  89076. CS35L35_IMON_SCALE_SHIFT
  89077. CS35L35_IMON_TXLOC_CTL
  89078. CS35L35_INT1_CRIT_MASK
  89079. CS35L35_INT2_CRIT_MASK
  89080. CS35L35_INT3_CRIT_MASK
  89081. CS35L35_INT4_CRIT_MASK
  89082. CS35L35_INT_MASK_1
  89083. CS35L35_INT_MASK_2
  89084. CS35L35_INT_MASK_3
  89085. CS35L35_INT_MASK_4
  89086. CS35L35_INT_STATUS_1
  89087. CS35L35_INT_STATUS_2
  89088. CS35L35_INT_STATUS_3
  89089. CS35L35_INT_STATUS_4
  89090. CS35L35_LASTREG
  89091. CS35L35_LBST_SHORT
  89092. CS35L35_LRCLK_ERR
  89093. CS35L35_MAG_COMP_CTL
  89094. CS35L35_MAX_REGISTER
  89095. CS35L35_MCLK_DIS_MASK
  89096. CS35L35_MCLK_DIS_SHIFT
  89097. CS35L35_MCLK_ERR
  89098. CS35L35_MON_FRM_MASK
  89099. CS35L35_MON_FRM_SHIFT
  89100. CS35L35_MON_TXLOC_MASK
  89101. CS35L35_MON_TXLOC_SHIFT
  89102. CS35L35_MS_MASK
  89103. CS35L35_MS_SHIFT
  89104. CS35L35_MULT_DEV_SYNCH1
  89105. CS35L35_MULT_DEV_SYNCH2
  89106. CS35L35_M_PDN_DONE_MASK
  89107. CS35L35_M_PDN_DONE_SHIFT
  89108. CS35L35_OTE
  89109. CS35L35_OTE_RLS
  89110. CS35L35_OTP_ERR
  89111. CS35L35_OTP_TRIM_STATUS
  89112. CS35L35_OTW
  89113. CS35L35_OTW_RLS
  89114. CS35L35_PDM_MODE_MASK
  89115. CS35L35_PDM_MODE_SHIFT
  89116. CS35L35_PDN_ALL
  89117. CS35L35_PDN_ALL_MASK
  89118. CS35L35_PDN_AMP
  89119. CS35L35_PDN_BST
  89120. CS35L35_PDN_BST_FETOFF_SHIFT
  89121. CS35L35_PDN_BST_FETON_SHIFT
  89122. CS35L35_PDN_BST_MASK
  89123. CS35L35_PDN_CLASSH
  89124. CS35L35_PDN_DONE
  89125. CS35L35_PDN_IMON
  89126. CS35L35_PDN_VBSTMON_OUT
  89127. CS35L35_PDN_VMON
  89128. CS35L35_PDN_VMON_OUT
  89129. CS35L35_PDN_VPBR
  89130. CS35L35_PLL_STATUS
  89131. CS35L35_PROTECT_CTL
  89132. CS35L35_PROT_RELEASE_CTL
  89133. CS35L35_PWR2_PDN_MASK
  89134. CS35L35_PWR3_PDN_MASK
  89135. CS35L35_PWRCTL1
  89136. CS35L35_PWRCTL2
  89137. CS35L35_PWRCTL3
  89138. CS35L35_REV_ID
  89139. CS35L35_SDIN_DEPTH_16
  89140. CS35L35_SDIN_DEPTH_24
  89141. CS35L35_SDIN_DEPTH_8
  89142. CS35L35_SDOUT_DEPTH_12
  89143. CS35L35_SDOUT_DEPTH_16
  89144. CS35L35_SDOUT_DEPTH_8
  89145. CS35L35_SFT_RST
  89146. CS35L35_SHORT_RLS
  89147. CS35L35_SPCLK_ERR
  89148. CS35L35_SPKMON_DEPTH_CTL
  89149. CS35L35_SPKR_MON_CTL
  89150. CS35L35_SPMODE_MASK
  89151. CS35L35_SP_DRV_MASK
  89152. CS35L35_SP_DRV_SHIFT
  89153. CS35L35_SP_FMT_CTL1
  89154. CS35L35_SP_FMT_CTL2
  89155. CS35L35_SP_FMT_CTL3
  89156. CS35L35_SP_I2S_DRV_MASK
  89157. CS35L35_SP_I2S_DRV_SHIFT
  89158. CS35L35_SP_RATE_MASK
  89159. CS35L35_SP_SCLKS_16FS
  89160. CS35L35_SP_SCLKS_32FS
  89161. CS35L35_SP_SCLKS_48FS
  89162. CS35L35_SP_SCLKS_64FS
  89163. CS35L35_SP_SCLKS_MASK
  89164. CS35L35_SP_SCLKS_SHIFT
  89165. CS35L35_SUPMON_DEPTH_CTL
  89166. CS35L35_VALID_PDATA
  89167. CS35L35_VBSTMON_DEPTH_MASK
  89168. CS35L35_VBSTMON_DEPTH_SHIFT
  89169. CS35L35_VBSTMON_TXLOC_CTL
  89170. CS35L35_VMON_DEPTH_MASK
  89171. CS35L35_VMON_DEPTH_SHIFT
  89172. CS35L35_VMON_OVFL
  89173. CS35L35_VMON_TXLOC_CTL
  89174. CS35L35_VPBRSTAT_DEPTH_MASK
  89175. CS35L35_VPBRSTAT_DEPTH_SHIFT
  89176. CS35L35_VPBR_ATTEN_STATUS
  89177. CS35L35_VPBR_CLR
  89178. CS35L35_VPBR_CTL
  89179. CS35L35_VPBR_ERR
  89180. CS35L35_VPBR_MODE_VOL_CTL
  89181. CS35L35_VPBR_STATUS_TXLOC_CTL
  89182. CS35L35_VPBR_TIMING_CTL
  89183. CS35L35_VPBR_VOL_CTL
  89184. CS35L35_VPMON_DEPTH_MASK
  89185. CS35L35_VPMON_DEPTH_SHIFT
  89186. CS35L35_VPMON_TXLOC_CTL
  89187. CS35L35_ZEROFILL_DEPTH_CTL
  89188. CS35L35_ZEROFILL_DEPTH_MASK
  89189. CS35L35_ZEROFILL_DEPTH_SHIFT
  89190. CS35L35_ZERO_FILL_LOC_CTL
  89191. CS35L36_10V_L36
  89192. CS35L36_12V_L37
  89193. CS35L36_ADC_CLK_CTRL
  89194. CS35L36_AMP_DIG_VOL_CTRL
  89195. CS35L36_AMP_ERR_VOL
  89196. CS35L36_AMP_GAIN_CTRL
  89197. CS35L36_AMP_MUTE_MASK
  89198. CS35L36_AMP_MUTE_SHIFT
  89199. CS35L36_AMP_NG_CTRL
  89200. CS35L36_AMP_OUT_MUTE
  89201. CS35L36_AMP_PCM_INV_MASK
  89202. CS35L36_AMP_PCM_INV_SHIFT
  89203. CS35L36_AMP_PDM_RATE_CTRL
  89204. CS35L36_AMP_PDM_VOLUME
  89205. CS35L36_AMP_RAMP_MASK
  89206. CS35L36_AMP_RAMP_SHIFT
  89207. CS35L36_AMP_SHORT_ERR
  89208. CS35L36_AMP_SHORT_ERR_RLS
  89209. CS35L36_AMP_SLOPE_CTRL
  89210. CS35L36_AMP_VOL_PCM_MASK
  89211. CS35L36_AMP_VOL_PCM_SHIFT
  89212. CS35L36_AMP_ZC_SHIFT
  89213. CS35L36_APS_TX_SEL_MASK
  89214. CS35L36_ASP_FMT_MASK
  89215. CS35L36_ASP_FMT_SHIFT
  89216. CS35L36_ASP_FORMAT
  89217. CS35L36_ASP_FRAME_CTRL
  89218. CS35L36_ASP_RATE_CTRL
  89219. CS35L36_ASP_RX1_EN_MASK
  89220. CS35L36_ASP_RX1_EN_SHIFT
  89221. CS35L36_ASP_RX1_SEL
  89222. CS35L36_ASP_RX1_SLOT
  89223. CS35L36_ASP_RX1_SLOT_MASK
  89224. CS35L36_ASP_RX_OVF_MASK
  89225. CS35L36_ASP_RX_TX_EN
  89226. CS35L36_ASP_RX_UDF_MASK
  89227. CS35L36_ASP_RX_WIDTH_MASK
  89228. CS35L36_ASP_RX_WIDTH_SHIFT
  89229. CS35L36_ASP_TX1_EN_MASK
  89230. CS35L36_ASP_TX1_SEL
  89231. CS35L36_ASP_TX1_SLOT_MASK
  89232. CS35L36_ASP_TX1_TX2_SLOT
  89233. CS35L36_ASP_TX2_EN_MASK
  89234. CS35L36_ASP_TX2_EN_SHIFT
  89235. CS35L36_ASP_TX2_SEL
  89236. CS35L36_ASP_TX2_SLOT_MASK
  89237. CS35L36_ASP_TX2_SLOT_SHIFT
  89238. CS35L36_ASP_TX3_EN_MASK
  89239. CS35L36_ASP_TX3_EN_SHIFT
  89240. CS35L36_ASP_TX3_SEL
  89241. CS35L36_ASP_TX3_SLOT_MASK
  89242. CS35L36_ASP_TX3_TX4_SLOT
  89243. CS35L36_ASP_TX4_EN_MASK
  89244. CS35L36_ASP_TX4_EN_SHIFT
  89245. CS35L36_ASP_TX4_SEL
  89246. CS35L36_ASP_TX4_SLOT_MASK
  89247. CS35L36_ASP_TX4_SLOT_SHIFT
  89248. CS35L36_ASP_TX5_EN_MASK
  89249. CS35L36_ASP_TX5_EN_SHIFT
  89250. CS35L36_ASP_TX5_SEL
  89251. CS35L36_ASP_TX5_SLOT_MASK
  89252. CS35L36_ASP_TX5_TX6_SLOT
  89253. CS35L36_ASP_TX6_EN_MASK
  89254. CS35L36_ASP_TX6_EN_SHIFT
  89255. CS35L36_ASP_TX6_SEL
  89256. CS35L36_ASP_TX6_SLOT_MASK
  89257. CS35L36_ASP_TX6_SLOT_SHIFT
  89258. CS35L36_ASP_TX7_EN_MASK
  89259. CS35L36_ASP_TX7_EN_SHIFT
  89260. CS35L36_ASP_TX7_SLOT_MASK
  89261. CS35L36_ASP_TX7_TX8_SLOT
  89262. CS35L36_ASP_TX8_EN_MASK
  89263. CS35L36_ASP_TX8_EN_SHIFT
  89264. CS35L36_ASP_TX8_SLOT_MASK
  89265. CS35L36_ASP_TX8_SLOT_SHIFT
  89266. CS35L36_ASP_TX_HIZ_MASK
  89267. CS35L36_ASP_TX_PIN_CTRL
  89268. CS35L36_ASP_TX_WIDTH_MASK
  89269. CS35L36_ASP_TX_WIDTH_SHIFT
  89270. CS35L36_ASP_WIDTH_16
  89271. CS35L36_ASP_WIDTH_24
  89272. CS35L36_ASP_WIDTH_32
  89273. CS35L36_B0_PAC_PATCH
  89274. CS35L36_BSTCVRT_CCMFREQ_MASK
  89275. CS35L36_BSTCVRT_COEFF
  89276. CS35L36_BSTCVRT_DCM_CTRL
  89277. CS35L36_BSTCVRT_DCM_MODE_FORCE
  89278. CS35L36_BSTCVRT_K1_MASK
  89279. CS35L36_BSTCVRT_K2_MASK
  89280. CS35L36_BSTCVRT_K2_SHIFT
  89281. CS35L36_BSTCVRT_LBSTVAL_MASK
  89282. CS35L36_BSTCVRT_OVERVOLT_CTRL
  89283. CS35L36_BSTCVRT_PEAK_CUR
  89284. CS35L36_BSTCVRT_SFT_RAMP
  89285. CS35L36_BSTCVRT_SLOPE_LBST
  89286. CS35L36_BSTCVRT_SLOPE_MASK
  89287. CS35L36_BSTCVRT_SLOPE_SHIFT
  89288. CS35L36_BSTCVRT_SW_FREQ
  89289. CS35L36_BSTCVRT_VCTRL1
  89290. CS35L36_BSTCVRT_VCTRL2
  89291. CS35L36_BST_ANA2_TEST
  89292. CS35L36_BST_CTRL_10V_CLAMP
  89293. CS35L36_BST_CTRL_LIM_MASK
  89294. CS35L36_BST_CTRL_LIM_SHIFT
  89295. CS35L36_BST_DCM_UVP_ERR
  89296. CS35L36_BST_DIS_EXTN
  89297. CS35L36_BST_DIS_VP
  89298. CS35L36_BST_EN
  89299. CS35L36_BST_EN_MASK
  89300. CS35L36_BST_EN_SHIFT
  89301. CS35L36_BST_IPK_MASK
  89302. CS35L36_BST_MAN_IPKCOMP_EN_MASK
  89303. CS35L36_BST_MAN_IPKCOMP_EN_SHIFT
  89304. CS35L36_BST_MAN_IPKCOMP_MASK
  89305. CS35L36_BST_MAN_IPKCOMP_SHIFT
  89306. CS35L36_BST_OVP_ERR
  89307. CS35L36_BST_OVP_ERR_RLS
  89308. CS35L36_BST_OVP_THLD_11V
  89309. CS35L36_BST_OVP_THLD_MASK
  89310. CS35L36_BST_OVP_TRIM_11V
  89311. CS35L36_BST_OVP_TRIM_MASK
  89312. CS35L36_BST_OVP_TRIM_SHIFT
  89313. CS35L36_BST_SHORT_ERR
  89314. CS35L36_BST_SHORT_ERR_RLS
  89315. CS35L36_BST_TST_MANUAL
  89316. CS35L36_BST_UVP_ERR_RLS
  89317. CS35L36_CHIP_ID
  89318. CS35L36_CLASSH_CFG
  89319. CS35L36_CLASSH_FET_DRV_CFG
  89320. CS35L36_CTRL_OVRRIDE
  89321. CS35L36_DAC_MSM_CFG
  89322. CS35L36_DCM_AUTO_MASK
  89323. CS35L36_DCO_CTRL
  89324. CS35L36_DEVICE_ID
  89325. CS35L36_DIGITAL_MUTE
  89326. CS35L36_DISCH_FILT
  89327. CS35L36_DTEMP_STATUS
  89328. CS35L36_DTEMP_WARN_THLD
  89329. CS35L36_FAB_ID
  89330. CS35L36_FIRSTREG
  89331. CS35L36_FS1_DEFAULT_VAL
  89332. CS35L36_FS1_WINDOW_MASK
  89333. CS35L36_FS2_DEFAULT_VAL
  89334. CS35L36_FS2_WINDOW_MASK
  89335. CS35L36_FS2_WINDOW_SHIFT
  89336. CS35L36_FS_NOM_6MHZ
  89337. CS35L36_GLOBAL_CLK_CTRL
  89338. CS35L36_GLOBAL_EN_ASSRT
  89339. CS35L36_GLOBAL_EN_MASK
  89340. CS35L36_GLOBAL_EN_SHIFT
  89341. CS35L36_GLOBAL_FS_MASK
  89342. CS35L36_GLOBAL_FS_SHIFT
  89343. CS35L36_GLOBAL_RESYNC_FS1_MASK
  89344. CS35L36_GLOBAL_RESYNC_FS2_MASK
  89345. CS35L36_GPIO_INT_SEL_MASK
  89346. CS35L36_GPIO_INT_SEL_UNMASK
  89347. CS35L36_HPF_PCM_EN_MASK
  89348. CS35L36_HPF_PCM_EN_SHIFT
  89349. CS35L36_HW_REV
  89350. CS35L36_IMON_POL_MASK
  89351. CS35L36_IMON_POL_SHIFT
  89352. CS35L36_INT1_EDGE_LVL_CTRL
  89353. CS35L36_INT1_MASK
  89354. CS35L36_INT1_MASK_DEFAULT
  89355. CS35L36_INT1_MASK_RESET
  89356. CS35L36_INT1_RAW_STATUS
  89357. CS35L36_INT1_STATUS
  89358. CS35L36_INT2_MASK
  89359. CS35L36_INT2_RAW_STATUS
  89360. CS35L36_INT2_STATUS
  89361. CS35L36_INT3_EDGE_LVL_CTRL
  89362. CS35L36_INT3_MASK
  89363. CS35L36_INT3_MASK_DEFAULT
  89364. CS35L36_INT3_MASK_RESET
  89365. CS35L36_INT3_RAW_STATUS
  89366. CS35L36_INT3_STATUS
  89367. CS35L36_INT4_MASK
  89368. CS35L36_INT4_RAW_STATUS
  89369. CS35L36_INT4_STATUS
  89370. CS35L36_INTPAC_REG_COUNT
  89371. CS35L36_INT_DRV_SEL_MASK
  89372. CS35L36_INT_DRV_SEL_SHIFT
  89373. CS35L36_INT_GPIO_SEL_MASK
  89374. CS35L36_INT_GPIO_SEL_SHIFT
  89375. CS35L36_INT_OUTPUT_EN_MASK
  89376. CS35L36_INT_POL_SEL_MASK
  89377. CS35L36_INT_POL_SEL_SHIFT
  89378. CS35L36_IRQ_SRC_MASK
  89379. CS35L36_IRQ_SRC_SHIFT
  89380. CS35L36_LASTREG
  89381. CS35L36_LRCLK_FRC_MASK
  89382. CS35L36_LRCLK_FRC_SHIFT
  89383. CS35L36_LRCLK_INV_MASK
  89384. CS35L36_LRCLK_INV_SHIFT
  89385. CS35L36_LRCLK_MSTR_MASK
  89386. CS35L36_LRCLK_MSTR_SHIFT
  89387. CS35L36_MCU_BOOT_COMPLETE
  89388. CS35L36_MCU_CONFIG_CLR
  89389. CS35L36_MCU_CONFIG_MASK
  89390. CS35L36_MCU_CONFIG_UNMASK
  89391. CS35L36_MDSYNC_DATA_TX
  89392. CS35L36_MDSYNC_EN
  89393. CS35L36_MDSYNC_ERR_STATUS
  89394. CS35L36_MDSYNC_PWR_CTRL
  89395. CS35L36_MDSYNC_RX_STATUS
  89396. CS35L36_MDSYNC_TX_ID
  89397. CS35L36_MDSYNC_TX_STATUS
  89398. CS35L36_MISC_CTRL
  89399. CS35L36_NG_AMP_EN_MASK
  89400. CS35L36_NG_CFG
  89401. CS35L36_NG_DELAY_MASK
  89402. CS35L36_NG_DELAY_SHIFT
  89403. CS35L36_OSC_FREQ_TRIM_MASK
  89404. CS35L36_OSC_TRIM
  89405. CS35L36_OSC_TRIM_DONE
  89406. CS35L36_OTP_BOOT_DONE
  89407. CS35L36_OTP_CTRL1
  89408. CS35L36_OTP_CTRL2
  89409. CS35L36_OTP_CTRL3
  89410. CS35L36_OTP_CTRL4
  89411. CS35L36_OTP_CTRL5
  89412. CS35L36_OTP_ECC_EN_MASK
  89413. CS35L36_OTP_ECC_EN_SHIFT
  89414. CS35L36_OTP_MEM30
  89415. CS35L36_OTP_REV_L37
  89416. CS35L36_OTP_REV_MASK
  89417. CS35L36_OTP_RUN_BOOT_MASK
  89418. CS35L36_OTP_TRIM_STATUS
  89419. CS35L36_OVERTEMP_CFG
  89420. CS35L36_PAC_CTL1
  89421. CS35L36_PAC_CTL2
  89422. CS35L36_PAC_CTL3
  89423. CS35L36_PAC_ENABLE_MASK
  89424. CS35L36_PAC_INT0_CTRL
  89425. CS35L36_PAC_INT1_CTRL
  89426. CS35L36_PAC_INT2_CTRL
  89427. CS35L36_PAC_INT3_CTRL
  89428. CS35L36_PAC_INT4_CTRL
  89429. CS35L36_PAC_INT5_CTRL
  89430. CS35L36_PAC_INT6_CTRL
  89431. CS35L36_PAC_INT7_CTRL
  89432. CS35L36_PAC_INT_FLUSH_CTRL
  89433. CS35L36_PAC_INT_RAW_STATUS
  89434. CS35L36_PAC_INT_STATUS
  89435. CS35L36_PAC_MEM_ACCESS
  89436. CS35L36_PAC_MEM_ACCESS_CLR
  89437. CS35L36_PAC_PMEM_WORD0
  89438. CS35L36_PAC_PMEM_WORD1
  89439. CS35L36_PAC_PMEM_WORD1023
  89440. CS35L36_PAC_PROG_MEM
  89441. CS35L36_PAC_RESET
  89442. CS35L36_PAC_RESET_MASK
  89443. CS35L36_PAC_RESET_SHIFT
  89444. CS35L36_PAC_STALL_MASK
  89445. CS35L36_PAC_STALL_SHIFT
  89446. CS35L36_PAD_INTERFACE
  89447. CS35L36_PCM_RX_SEL_DIAG
  89448. CS35L36_PCM_RX_SEL_MASK
  89449. CS35L36_PCM_RX_SEL_PCM
  89450. CS35L36_PCM_RX_SEL_SHIFT
  89451. CS35L36_PCM_RX_SEL_SWIRE
  89452. CS35L36_PCM_RX_SEL_ZERO
  89453. CS35L36_PDM_CH_SEL
  89454. CS35L36_PDM_HIGHFILT_CTRL
  89455. CS35L36_PDM_LDM_ENTER_SHIFT
  89456. CS35L36_PDM_LDM_EXIT_SHIFT
  89457. CS35L36_PDM_MODE_MASK
  89458. CS35L36_PDM_MODE_SHIFT
  89459. CS35L36_PDN_DONE
  89460. CS35L36_PDN_DONE_SHIFT
  89461. CS35L36_PLLSRC_LRCLK
  89462. CS35L36_PLLSRC_MCLK
  89463. CS35L36_PLLSRC_PDMCLK
  89464. CS35L36_PLLSRC_SCLK
  89465. CS35L36_PLLSRC_SELF
  89466. CS35L36_PLLSRC_SWIRE
  89467. CS35L36_PLL_CLK_CTRL
  89468. CS35L36_PLL_CLK_SEL_MASK
  89469. CS35L36_PLL_CLK_SEL_SHIFT
  89470. CS35L36_PLL_FFL_IGAIN_MASK
  89471. CS35L36_PLL_IGAIN
  89472. CS35L36_PLL_IGAIN_MASK
  89473. CS35L36_PLL_IGAIN_SHIFT
  89474. CS35L36_PLL_LOOP_PARAMS
  89475. CS35L36_PLL_OPENLOOP_MASK
  89476. CS35L36_PLL_OPENLOOP_SHIFT
  89477. CS35L36_PLL_REFCLK_EN_MASK
  89478. CS35L36_PLL_REFCLK_EN_SHIFT
  89479. CS35L36_PLL_UNLOCK_MASK
  89480. CS35L36_PROTECT_REL_ERR
  89481. CS35L36_PUP_DONE
  89482. CS35L36_PUP_DONE_IRQ_MASK
  89483. CS35L36_PUP_DONE_IRQ_UNMASK
  89484. CS35L36_PUP_DONE_SHIFT
  89485. CS35L36_PWM_MOD_IO_CTRL
  89486. CS35L36_PWM_MOD_STATUS
  89487. CS35L36_PWR_CTRL1
  89488. CS35L36_PWR_CTRL2
  89489. CS35L36_PWR_CTRL3
  89490. CS35L36_REFCLK_FREQ_MASK
  89491. CS35L36_REFCLK_FREQ_SHIFT
  89492. CS35L36_REFCLK_IN_MASK
  89493. CS35L36_REV_A0
  89494. CS35L36_REV_B0
  89495. CS35L36_REV_ID
  89496. CS35L36_RX_FORMATS
  89497. CS35L36_SCLK_FRC_MASK
  89498. CS35L36_SCLK_FRC_SHIFT
  89499. CS35L36_SCLK_INV_MASK
  89500. CS35L36_SCLK_INV_SHIFT
  89501. CS35L36_SCLK_MSTR_MASK
  89502. CS35L36_SCLK_MSTR_SHIFT
  89503. CS35L36_SOFT_RESET
  89504. CS35L36_SPARE_CP_BITS
  89505. CS35L36_SP_SCLK_CLK_CTRL
  89506. CS35L36_SWIRE_CLK_CTRL
  89507. CS35L36_SWIRE_DP1_FIFO_CFG
  89508. CS35L36_SWIRE_DP2_FIFO_CFG
  89509. CS35L36_SWIRE_DP3_FIFO_CFG
  89510. CS35L36_SWIRE_FS_SEL
  89511. CS35L36_SWIRE_P1_TX1_SEL
  89512. CS35L36_SWIRE_P1_TX2_SEL
  89513. CS35L36_SWIRE_P2_TX1_SEL
  89514. CS35L36_SWIRE_P2_TX2_SEL
  89515. CS35L36_SWIRE_P2_TX3_SEL
  89516. CS35L36_SWIRE_PCM_RX_DATA
  89517. CS35L36_SW_RESET
  89518. CS35L36_SW_REV
  89519. CS35L36_SYNC_GLOBAL_OVR_MASK
  89520. CS35L36_SYNC_GLOBAL_OVR_SHIFT
  89521. CS35L36_TEMP_ERR
  89522. CS35L36_TEMP_ERR_RLS
  89523. CS35L36_TEMP_THLD_MASK
  89524. CS35L36_TEMP_WARN
  89525. CS35L36_TEMP_WARN_ERR_RLS
  89526. CS35L36_TESTKEY_CTRL
  89527. CS35L36_TEST_LOCK1
  89528. CS35L36_TEST_LOCK2
  89529. CS35L36_TEST_UNLOCK1
  89530. CS35L36_TEST_UNLOCK2
  89531. CS35L36_TST_FS_MON0
  89532. CS35L36_TX_FORMATS
  89533. CS35L36_USERKEY_CTL
  89534. CS35L36_VALID_PDATA
  89535. CS35L36_VBBR_CFG
  89536. CS35L36_VBBR_STATUS
  89537. CS35L36_VI_SPKMON_FILT
  89538. CS35L36_VI_SPKMON_GAIN
  89539. CS35L36_VI_SPKMON_IP_SEL
  89540. CS35L36_VMON_POL_MASK
  89541. CS35L36_VMON_POL_SHIFT
  89542. CS35L36_VPBR_ATK_RATE_MASK
  89543. CS35L36_VPBR_ATK_RATE_SHIFT
  89544. CS35L36_VPBR_ATK_VOL_MASK
  89545. CS35L36_VPBR_ATK_VOL_SHIFT
  89546. CS35L36_VPBR_CFG
  89547. CS35L36_VPBR_EN_MASK
  89548. CS35L36_VPBR_EN_SHIFT
  89549. CS35L36_VPBR_MAX_ATTN_MASK
  89550. CS35L36_VPBR_MAX_ATTN_SHIFT
  89551. CS35L36_VPBR_MUTE_EN_MASK
  89552. CS35L36_VPBR_MUTE_EN_SHIFT
  89553. CS35L36_VPBR_REL_RATE_MASK
  89554. CS35L36_VPBR_REL_RATE_SHIFT
  89555. CS35L36_VPBR_STATUS
  89556. CS35L36_VPBR_THLD_MASK
  89557. CS35L36_VPBR_THLD_SHIFT
  89558. CS35L36_VPBR_WAIT_MASK
  89559. CS35L36_VPBR_WAIT_SHIFT
  89560. CS35L36_VPI_LIMIT_MINMAX
  89561. CS35L36_VPI_LIMIT_MODE
  89562. CS35L36_VPI_TRACK_CTRL
  89563. CS35L36_VPI_TRIG_MODE_CTRL
  89564. CS35L36_VPI_TRIG_STEPS
  89565. CS35L36_VPI_VP_THLD
  89566. CS35L36_VPVBST_FS_SEL
  89567. CS35L36_VPVBST_VBST_CTRL
  89568. CS35L36_VPVBST_VP_CTRL
  89569. CS3BCR
  89570. CS3WCR
  89571. CS3_ACCESS_REG
  89572. CS3_ADDR_REG
  89573. CS3_BASE
  89574. CS3_CNFG_REG
  89575. CS3_EXT_ADDR_REG
  89576. CS3_MARK
  89577. CS3_MASK_REG
  89578. CS4208_GPIO0
  89579. CS4208_MACMINI
  89580. CS4208_MAC_AUTO
  89581. CS4208_MBA6
  89582. CS4208_MBP11
  89583. CS4208_VENDOR_NID
  89584. CS420X_APPLE
  89585. CS420X_AUTO
  89586. CS420X_GPIO_13
  89587. CS420X_GPIO_23
  89588. CS420X_IMAC27
  89589. CS420X_IMAC27_122
  89590. CS420X_MBA42
  89591. CS420X_MBP101
  89592. CS420X_MBP53
  89593. CS420X_MBP55
  89594. CS420X_MBP81
  89595. CS420X_VENDOR_NID
  89596. CS4210_ADC_NID
  89597. CS4210_DAC_NID
  89598. CS4210_VENDOR_NID
  89599. CS4213_VENDOR_NID
  89600. CS4215_12_MASK
  89601. CS4215_ADI
  89602. CS4215_BSEL_128
  89603. CS4215_BSEL_256
  89604. CS4215_BSEL_64
  89605. CS4215_CLB
  89606. CS4215_DAD
  89607. CS4215_DFR_ALAW
  89608. CS4215_DFR_LINEAR16
  89609. CS4215_DFR_LINEAR8
  89610. CS4215_DFR_STEREO
  89611. CS4215_DFR_ULAW
  89612. CS4215_ENL
  89613. CS4215_HE
  89614. CS4215_HPF
  89615. CS4215_IS
  89616. CS4215_LE
  89617. CS4215_LG
  89618. CS4215_LO
  89619. CS4215_MA
  89620. CS4215_MCK_CLK1
  89621. CS4215_MCK_CLK2
  89622. CS4215_MCK_MAST
  89623. CS4215_MCK_XTL1
  89624. CS4215_MCK_XTL2
  89625. CS4215_MLB
  89626. CS4215_OLB
  89627. CS4215_OVR
  89628. CS4215_PIO0
  89629. CS4215_PIO1
  89630. CS4215_RG
  89631. CS4215_RO
  89632. CS4215_RSRVD_1
  89633. CS4215_SE
  89634. CS4215_SINGLE
  89635. CS4215_VERSION_MASK
  89636. CS4215_XCLK
  89637. CS4215_XEN
  89638. CS421X_CDB4210
  89639. CS421X_DMIC_PIN_NID
  89640. CS421X_IDX_ADC_CFG
  89641. CS421X_IDX_DAC_CFG
  89642. CS421X_IDX_DEV_CFG
  89643. CS421X_IDX_SPK_CTL
  89644. CS421X_SENSE_B
  89645. CS421X_SPDIF_PIN_NID
  89646. CS421X_STUMPY
  89647. CS4231
  89648. CS4231P
  89649. CS4231U
  89650. CS4231_4236_MODE3
  89651. CS4231_ADPCM_16
  89652. CS4231_ALAW_8
  89653. CS4231_ALL_IRQS
  89654. CS4231_ALT_FEATURE_1
  89655. CS4231_ALT_FEATURE_2
  89656. CS4231_AUTOCALIB
  89657. CS4231_AUX1_LEFT_INPUT
  89658. CS4231_AUX1_RIGHT_INPUT
  89659. CS4231_AUX2_LEFT_INPUT
  89660. CS4231_AUX2_RIGHT_INPUT
  89661. CS4231_CALIB_IN_PROGRESS
  89662. CS4231_CALIB_MODE
  89663. CS4231_DACZ
  89664. CS4231_DMA_REQUEST
  89665. CS4231_DOUBLE
  89666. CS4231_ENABLE_MIC_GAIN
  89667. CS4231_FLAG_CAPTURE
  89668. CS4231_FLAG_EBUS
  89669. CS4231_FLAG_PLAYBACK
  89670. CS4231_GLOBALIRQ
  89671. CS4231_IFACE_CTRL
  89672. CS4231_INIT
  89673. CS4231_IRQ_ENABLE
  89674. CS4231_IRQ_STATUS
  89675. CS4231_IW_MODE3
  89676. CS4231_LEFT_INPUT
  89677. CS4231_LEFT_LINE_IN
  89678. CS4231_LEFT_MIC_INPUT
  89679. CS4231_LEFT_OUTPUT
  89680. CS4231_LINEAR_16
  89681. CS4231_LINEAR_16_BIG
  89682. CS4231_LINEAR_8
  89683. CS4231_LINE_LEFT_OUTPUT
  89684. CS4231_LINE_RIGHT_OUTPUT
  89685. CS4231_LOOPBACK
  89686. CS4231_MCE
  89687. CS4231_MISC_INFO
  89688. CS4231_MIXS_ALL
  89689. CS4231_MIXS_AUX1
  89690. CS4231_MIXS_LINE
  89691. CS4231_MIXS_MIC
  89692. CS4231_MODE2
  89693. CS4231_MODE_NONE
  89694. CS4231_MODE_OPEN
  89695. CS4231_MODE_PLAY
  89696. CS4231_MODE_RECORD
  89697. CS4231_MODE_TIMER
  89698. CS4231_MONO_CTRL
  89699. CS4231_OLB
  89700. CS4231_PIN_CTRL
  89701. CS4231_PLAYBACK_ENABLE
  89702. CS4231_PLAYBACK_IRQ
  89703. CS4231_PLAYBACK_PIO
  89704. CS4231_PLAYBK_FORMAT
  89705. CS4231_PLY_LWR_CNT
  89706. CS4231_PLY_OVERRUN
  89707. CS4231_PLY_UNDERRUN
  89708. CS4231_PLY_UPR_CNT
  89709. CS4231_RECORD_ENABLE
  89710. CS4231_RECORD_IRQ
  89711. CS4231_RECORD_PIO
  89712. CS4231_REC_FORMAT
  89713. CS4231_REC_LWR_CNT
  89714. CS4231_REC_OVERRUN
  89715. CS4231_REC_UNDERRUN
  89716. CS4231_REC_UPR_CNT
  89717. CS4231_RIGHT_INPUT
  89718. CS4231_RIGHT_LINE_IN
  89719. CS4231_RIGHT_MIC_INPUT
  89720. CS4231_RIGHT_OUTPUT
  89721. CS4231_SINGLE
  89722. CS4231_SINGLE_DMA
  89723. CS4231_STEREO
  89724. CS4231_TEST_INIT
  89725. CS4231_TIMER_ENABLE
  89726. CS4231_TIMER_HIGH
  89727. CS4231_TIMER_IRQ
  89728. CS4231_TIMER_LOW
  89729. CS4231_TRD
  89730. CS4231_ULAW_8
  89731. CS4231_VERSION
  89732. CS4231_XCTL0
  89733. CS4231_XCTL1
  89734. CS4231_XTAL1
  89735. CS4231_XTAL2
  89736. CS4235_LEFT_MASTER
  89737. CS4235_OUTPUT_ACCU
  89738. CS4235_RIGHT_MASTER
  89739. CS4236_ADC_RATE
  89740. CS4236_DAC_MUTE
  89741. CS4236_DAC_RATE
  89742. CS4236_DOUBLE
  89743. CS4236_DOUBLE1
  89744. CS4236_DOUBLE1_TLV
  89745. CS4236_DOUBLE_TLV
  89746. CS4236_EXT_REG
  89747. CS4236_I23VAL
  89748. CS4236_IEC958_ENABLE
  89749. CS4236_LEFT_DSP
  89750. CS4236_LEFT_FM
  89751. CS4236_LEFT_LINE
  89752. CS4236_LEFT_MASTER
  89753. CS4236_LEFT_MIC
  89754. CS4236_LEFT_MIX_CTRL
  89755. CS4236_LEFT_WAVE
  89756. CS4236_MASTER_DIGITAL
  89757. CS4236_REG
  89758. CS4236_RIGHT_DSP
  89759. CS4236_RIGHT_FM
  89760. CS4236_RIGHT_LINE
  89761. CS4236_RIGHT_LOOPBACK
  89762. CS4236_RIGHT_MASTER
  89763. CS4236_RIGHT_MIC
  89764. CS4236_RIGHT_MIX_CTRL
  89765. CS4236_RIGHT_WAVE
  89766. CS4236_SINGLE
  89767. CS4236_SINGLEC
  89768. CS4236_SINGLE_TLV
  89769. CS4236_VERSION
  89770. CS423X_ISAPNP_DRIVER
  89771. CS4245_ADC_CLK_ERR
  89772. CS4245_ADC_CTRL
  89773. CS4245_ADC_DIF_I2S
  89774. CS4245_ADC_DIF_LJUST
  89775. CS4245_ADC_DIF_MASK
  89776. CS4245_ADC_FM_DOUBLE
  89777. CS4245_ADC_FM_MASK
  89778. CS4245_ADC_FM_QUAD
  89779. CS4245_ADC_FM_SINGLE
  89780. CS4245_ADC_MASTER
  89781. CS4245_ADC_OVFL
  89782. CS4245_ADC_UNDRFL
  89783. CS4245_ANALOG_IN
  89784. CS4245_ASYNCH
  89785. CS4245_A_OUT_SEL_DAC
  89786. CS4245_A_OUT_SEL_HIZ
  89787. CS4245_A_OUT_SEL_MASK
  89788. CS4245_A_OUT_SEL_PGA
  89789. CS4245_CHIP_ID
  89790. CS4245_CHIP_PART_MASK
  89791. CS4245_CHIP_REV_MASK
  89792. CS4245_DAC_A_CTRL
  89793. CS4245_DAC_B_CTRL
  89794. CS4245_DAC_CLK_ERR
  89795. CS4245_DAC_CTRL_1
  89796. CS4245_DAC_CTRL_2
  89797. CS4245_DAC_DIF_I2S
  89798. CS4245_DAC_DIF_LJUST
  89799. CS4245_DAC_DIF_MASK
  89800. CS4245_DAC_DIF_RJUST_16
  89801. CS4245_DAC_DIF_RJUST_24
  89802. CS4245_DAC_FM_DOUBLE
  89803. CS4245_DAC_FM_MASK
  89804. CS4245_DAC_FM_QUAD
  89805. CS4245_DAC_FM_SINGLE
  89806. CS4245_DAC_MASTER
  89807. CS4245_DAC_SOFT
  89808. CS4245_DAC_ZERO
  89809. CS4245_DEEMPH
  89810. CS4245_FREEZE
  89811. CS4245_HPF_FREEZE
  89812. CS4245_INT_ACTIVE_HIGH
  89813. CS4245_INT_MASK
  89814. CS4245_INT_MODE_LSB
  89815. CS4245_INT_MODE_MSB
  89816. CS4245_INT_STATUS
  89817. CS4245_INVERT_DAC
  89818. CS4245_LOAD_FROM_SHADOW
  89819. CS4245_LOOP
  89820. CS4245_MCLK1_MASK
  89821. CS4245_MCLK1_SHIFT
  89822. CS4245_MCLK2_MASK
  89823. CS4245_MCLK2_SHIFT
  89824. CS4245_MCLK_1
  89825. CS4245_MCLK_1_5
  89826. CS4245_MCLK_2
  89827. CS4245_MCLK_3
  89828. CS4245_MCLK_4
  89829. CS4245_MCLK_FREQ
  89830. CS4245_MUTE_ADC
  89831. CS4245_MUTE_DAC
  89832. CS4245_PDN
  89833. CS4245_PDN_ADC
  89834. CS4245_PDN_DAC
  89835. CS4245_PDN_MIC
  89836. CS4245_PGA_A_CTRL
  89837. CS4245_PGA_B_CTRL
  89838. CS4245_PGA_GAIN_MASK
  89839. CS4245_PGA_SOFT
  89840. CS4245_PGA_ZERO
  89841. CS4245_POWER_CTRL
  89842. CS4245_RESERVED_1
  89843. CS4245_SAVE_TO_SHADOW
  89844. CS4245_SEL_INPUT_1
  89845. CS4245_SEL_INPUT_2
  89846. CS4245_SEL_INPUT_3
  89847. CS4245_SEL_INPUT_4
  89848. CS4245_SEL_INPUT_5
  89849. CS4245_SEL_INPUT_6
  89850. CS4245_SEL_MASK
  89851. CS4245_SEL_MIC
  89852. CS4245_SIGNAL_SEL
  89853. CS4245_SPI_ADDRESS
  89854. CS4245_SPI_ADDRESS_S
  89855. CS4245_SPI_READ
  89856. CS4245_SPI_WRITE
  89857. CS4245_SPI_WRITE_S
  89858. CS4245_VOL_MASK
  89859. CS4265_ADC_CTL
  89860. CS4265_ADC_CTL2
  89861. CS4265_ADC_DIF
  89862. CS4265_ADC_FM
  89863. CS4265_ADC_MASTER
  89864. CS4265_CHA_PGA_CTL
  89865. CS4265_CHB_PGA_CTL
  89866. CS4265_CHIP_ID
  89867. CS4265_CHIP_ID_MASK
  89868. CS4265_CHIP_ID_VAL
  89869. CS4265_C_DATA_BUFF
  89870. CS4265_DAC_CHA_VOL
  89871. CS4265_DAC_CHB_VOL
  89872. CS4265_DAC_CTL
  89873. CS4265_DAC_CTL2
  89874. CS4265_DAC_CTL_DIF
  89875. CS4265_DAC_CTL_MUTE
  89876. CS4265_FORMATS
  89877. CS4265_INT_MASK
  89878. CS4265_INT_STATUS
  89879. CS4265_MAX_REGISTER
  89880. CS4265_MCLK_FREQ
  89881. CS4265_MCLK_FREQ_MASK
  89882. CS4265_PWRCTL
  89883. CS4265_PWRCTL_PDN
  89884. CS4265_RATES
  89885. CS4265_REV_ID_MASK
  89886. CS4265_SIG_SEL
  89887. CS4265_SIG_SEL_LOOP
  89888. CS4265_SPDIF_CTL1
  89889. CS4265_SPDIF_CTL2
  89890. CS4265_SPDIF_CTL2_DIF
  89891. CS4265_SPDIF_CTL2_MUTE
  89892. CS4265_STATUS_MODE_LSB
  89893. CS4265_STATUS_MODE_MSB
  89894. CS4270_CHIPID
  89895. CS4270_CHIPID_ID
  89896. CS4270_CHIPID_REV
  89897. CS4270_FIRSTREG
  89898. CS4270_FORMAT
  89899. CS4270_FORMATS
  89900. CS4270_FORMAT_ADC_I2S
  89901. CS4270_FORMAT_ADC_LJ
  89902. CS4270_FORMAT_ADC_MASK
  89903. CS4270_FORMAT_DAC_I2S
  89904. CS4270_FORMAT_DAC_LJ
  89905. CS4270_FORMAT_DAC_MASK
  89906. CS4270_FORMAT_DAC_RJ16
  89907. CS4270_FORMAT_DAC_RJ24
  89908. CS4270_FORMAT_FREEZE_A
  89909. CS4270_FORMAT_FREEZE_B
  89910. CS4270_FORMAT_LOOPBACK
  89911. CS4270_I2C_INCR
  89912. CS4270_LASTREG
  89913. CS4270_MODE
  89914. CS4270_MODE_1X
  89915. CS4270_MODE_2X
  89916. CS4270_MODE_4X
  89917. CS4270_MODE_DIV1
  89918. CS4270_MODE_DIV15
  89919. CS4270_MODE_DIV2
  89920. CS4270_MODE_DIV3
  89921. CS4270_MODE_DIV4
  89922. CS4270_MODE_DIV_MASK
  89923. CS4270_MODE_POPGUARD
  89924. CS4270_MODE_SLAVE
  89925. CS4270_MODE_SPEED_MASK
  89926. CS4270_MUTE
  89927. CS4270_MUTE_ADC_A
  89928. CS4270_MUTE_ADC_B
  89929. CS4270_MUTE_AUTO
  89930. CS4270_MUTE_DAC_A
  89931. CS4270_MUTE_DAC_B
  89932. CS4270_MUTE_POLARITY
  89933. CS4270_NUMREGS
  89934. CS4270_PWRCTL
  89935. CS4270_PWRCTL_FREEZE
  89936. CS4270_PWRCTL_PDN
  89937. CS4270_PWRCTL_PDN_ADC
  89938. CS4270_PWRCTL_PDN_ALL
  89939. CS4270_PWRCTL_PDN_DAC
  89940. CS4270_TRANS
  89941. CS4270_TRANS_DEEMPH
  89942. CS4270_TRANS_INV_ADC_A
  89943. CS4270_TRANS_INV_ADC_B
  89944. CS4270_TRANS_INV_DAC_A
  89945. CS4270_TRANS_INV_DAC_B
  89946. CS4270_TRANS_ONE_VOL
  89947. CS4270_TRANS_SOFT
  89948. CS4270_TRANS_ZERO
  89949. CS4270_VOLA
  89950. CS4270_VOLB
  89951. CS4271_01_CS
  89952. CS4271_23_CS
  89953. CS4271_45_CS
  89954. CS4271_67_CS
  89955. CS4271_89_CS
  89956. CS4271_AB_CS
  89957. CS4271_ADCCTL
  89958. CS4271_ADCCTL_ADC_DIF_I2S
  89959. CS4271_ADCCTL_ADC_DIF_LJ
  89960. CS4271_ADCCTL_ADC_DIF_MASK
  89961. CS4271_ADCCTL_DITHER16
  89962. CS4271_ADCCTL_HPFDA
  89963. CS4271_ADCCTL_HPFDB
  89964. CS4271_ADCCTL_MUTEA
  89965. CS4271_ADCCTL_MUTEB
  89966. CS4271_ADC_CTL
  89967. CS4271_CHIPID
  89968. CS4271_CHIPID_PART_MASK
  89969. CS4271_CHIPID_REV_MASK
  89970. CS4271_DACCTL
  89971. CS4271_DACCTL_AMUTE
  89972. CS4271_DACCTL_DEM_32
  89973. CS4271_DACCTL_DEM_441
  89974. CS4271_DACCTL_DEM_48
  89975. CS4271_DACCTL_DEM_DIS
  89976. CS4271_DACCTL_DEM_MASK
  89977. CS4271_DACCTL_IF_SLOW
  89978. CS4271_DACCTL_INVA
  89979. CS4271_DACCTL_INVB
  89980. CS4271_DACCTL_SRD
  89981. CS4271_DACCTL_SVRU
  89982. CS4271_DACVOL
  89983. CS4271_DACVOL_ATAPI_ALR2_BL
  89984. CS4271_DACVOL_ATAPI_ALR2_BLR2
  89985. CS4271_DACVOL_ATAPI_ALR2_BR
  89986. CS4271_DACVOL_ATAPI_ALR2_M
  89987. CS4271_DACVOL_ATAPI_AL_BL
  89988. CS4271_DACVOL_ATAPI_AL_BLR2
  89989. CS4271_DACVOL_ATAPI_AL_BR
  89990. CS4271_DACVOL_ATAPI_AL_M
  89991. CS4271_DACVOL_ATAPI_AR_BL
  89992. CS4271_DACVOL_ATAPI_AR_BLR2
  89993. CS4271_DACVOL_ATAPI_AR_BR
  89994. CS4271_DACVOL_ATAPI_AR_M
  89995. CS4271_DACVOL_ATAPI_MASK
  89996. CS4271_DACVOL_ATAPI_M_BL
  89997. CS4271_DACVOL_ATAPI_M_BLR2
  89998. CS4271_DACVOL_ATAPI_M_BR
  89999. CS4271_DACVOL_ATAPI_M_M
  90000. CS4271_DACVOL_BEQUA
  90001. CS4271_DACVOL_SOFT
  90002. CS4271_DACVOL_ZEROC
  90003. CS4271_DAC_CTL
  90004. CS4271_FIRSTREG
  90005. CS4271_LASTREG
  90006. CS4271_MODE1
  90007. CS4271_MODE1_DAC_DIF_I2S
  90008. CS4271_MODE1_DAC_DIF_LJ
  90009. CS4271_MODE1_DAC_DIF_MASK
  90010. CS4271_MODE1_DAC_DIF_RJ16
  90011. CS4271_MODE1_DAC_DIF_RJ18
  90012. CS4271_MODE1_DAC_DIF_RJ20
  90013. CS4271_MODE1_DAC_DIF_RJ24
  90014. CS4271_MODE1_DIV_1
  90015. CS4271_MODE1_DIV_15
  90016. CS4271_MODE1_DIV_2
  90017. CS4271_MODE1_DIV_3
  90018. CS4271_MODE1_DIV_MASK
  90019. CS4271_MODE1_MASTER
  90020. CS4271_MODE1_MODE_1X
  90021. CS4271_MODE1_MODE_2X
  90022. CS4271_MODE1_MODE_4X
  90023. CS4271_MODE1_MODE_MASK
  90024. CS4271_MODE2
  90025. CS4271_MODE2_CPEN
  90026. CS4271_MODE2_FREEZE
  90027. CS4271_MODE2_LOOP
  90028. CS4271_MODE2_MUTECAEQUB
  90029. CS4271_MODE2_PDN
  90030. CS4271_MODE_CTL_1
  90031. CS4271_MODE_CTL_2
  90032. CS4271_NR_RATIOS
  90033. CS4271_NR_REGS
  90034. CS4271_PCM_FORMATS
  90035. CS4271_PCM_RATES
  90036. CS4271_VOLA
  90037. CS4271_VOLA_MUTE
  90038. CS4271_VOLA_VOL_MASK
  90039. CS4271_VOLB
  90040. CS4271_VOLB_MUTE
  90041. CS4271_VOLB_VOL_MASK
  90042. CS4271_VOLMIX
  90043. CS4271_VOLMUTE_LEFT
  90044. CS4271_VOLMUTE_RIGHT
  90045. CS427x_SYSCLK_MCLK
  90046. CS4281_BA0_SIZE
  90047. CS4281_BA1_SIZE
  90048. CS4281_FIFO_SIZE
  90049. CS4281_MODE_INPUT
  90050. CS4281_MODE_OUTPUT
  90051. CS4281_PM_OPS
  90052. CS42L42_ADC_CTL
  90053. CS42L42_ADC_DIG_BOOST_SHIFT
  90054. CS42L42_ADC_DISABLE_MUTE
  90055. CS42L42_ADC_DISABLE_S0_MUTE_MASK
  90056. CS42L42_ADC_DISABLE_S0_MUTE_SHIFT
  90057. CS42L42_ADC_FORCE_WEAK_VCM_SHIFT
  90058. CS42L42_ADC_HPF_CF_SHIFT
  90059. CS42L42_ADC_HPF_EN_SHIFT
  90060. CS42L42_ADC_INV_SHIFT
  90061. CS42L42_ADC_NOTCH_DIS_SHIFT
  90062. CS42L42_ADC_OVFL_INT_MASK
  90063. CS42L42_ADC_OVFL_MASK
  90064. CS42L42_ADC_OVFL_SHIFT
  90065. CS42L42_ADC_OVFL_STATUS
  90066. CS42L42_ADC_OVFL_VAL_MASK
  90067. CS42L42_ADC_PDN_MASK
  90068. CS42L42_ADC_PDN_SHIFT
  90069. CS42L42_ADC_SRC_PDNB_MASK
  90070. CS42L42_ADC_SRC_PDNB_SHIFT
  90071. CS42L42_ADC_VOLUME
  90072. CS42L42_ADC_VOL_SHIFT
  90073. CS42L42_ADC_WNF_CF_SHIFT
  90074. CS42L42_ADC_WNF_EN_SHIFT
  90075. CS42L42_ADC_WNF_HPF_CTL
  90076. CS42L42_ASPRX_EARLY_MASK
  90077. CS42L42_ASPRX_EARLY_SHIFT
  90078. CS42L42_ASPRX_ERROR_MASK
  90079. CS42L42_ASPRX_ERROR_SHIFT
  90080. CS42L42_ASPRX_LATE_MASK
  90081. CS42L42_ASPRX_LATE_SHIFT
  90082. CS42L42_ASPRX_NOLRCK_MASK
  90083. CS42L42_ASPRX_NOLRCK_SHIFT
  90084. CS42L42_ASPRX_OVLD_MASK
  90085. CS42L42_ASPRX_OVLD_SHIFT
  90086. CS42L42_ASPTX_EARLY_MASK
  90087. CS42L42_ASPTX_EARLY_SHIFT
  90088. CS42L42_ASPTX_LATE_MASK
  90089. CS42L42_ASPTX_LATE_SHIFT
  90090. CS42L42_ASPTX_NOLRCK_MASK
  90091. CS42L42_ASPTX_NOLRCK_SHIFT
  90092. CS42L42_ASPTX_SMERROR_MASK
  90093. CS42L42_ASPTX_SMERROR_SHIFT
  90094. CS42L42_ASP_5050_MASK
  90095. CS42L42_ASP_5050_SHIFT
  90096. CS42L42_ASP_CLK_CFG
  90097. CS42L42_ASP_DAI1_PDN_MASK
  90098. CS42L42_ASP_DAI1_PDN_SHIFT
  90099. CS42L42_ASP_DAI_PDN_MASK
  90100. CS42L42_ASP_DAI_PDN_SHIFT
  90101. CS42L42_ASP_DAO_PDN_MASK
  90102. CS42L42_ASP_DAO_PDN_SHIFT
  90103. CS42L42_ASP_FRM_CFG
  90104. CS42L42_ASP_FSD_0_5
  90105. CS42L42_ASP_FSD_1_0
  90106. CS42L42_ASP_FSD_1_5
  90107. CS42L42_ASP_FSD_2_0
  90108. CS42L42_ASP_FSD_MASK
  90109. CS42L42_ASP_FSD_SHIFT
  90110. CS42L42_ASP_LCPOL_IN_MASK
  90111. CS42L42_ASP_LCPOL_IN_SHIFT
  90112. CS42L42_ASP_MASTER_MODE
  90113. CS42L42_ASP_MODE_MASK
  90114. CS42L42_ASP_MODE_SHIFT
  90115. CS42L42_ASP_POL_INV
  90116. CS42L42_ASP_RX0_CH1_EN
  90117. CS42L42_ASP_RX0_CH2_EN
  90118. CS42L42_ASP_RX0_CH3_EN
  90119. CS42L42_ASP_RX0_CH4_EN
  90120. CS42L42_ASP_RX0_CH_EN_MASK
  90121. CS42L42_ASP_RX0_CH_EN_SHIFT
  90122. CS42L42_ASP_RX_CH_AP_HI
  90123. CS42L42_ASP_RX_CH_AP_LOW
  90124. CS42L42_ASP_RX_CH_AP_MASK
  90125. CS42L42_ASP_RX_CH_AP_SHIFT
  90126. CS42L42_ASP_RX_CH_BIT_ST_MASK
  90127. CS42L42_ASP_RX_CH_BIT_ST_SHIFT
  90128. CS42L42_ASP_RX_CH_RES_16
  90129. CS42L42_ASP_RX_CH_RES_32
  90130. CS42L42_ASP_RX_CH_RES_MASK
  90131. CS42L42_ASP_RX_CH_RES_SHIFT
  90132. CS42L42_ASP_RX_DAI0_CH1_AP_RES
  90133. CS42L42_ASP_RX_DAI0_CH1_BIT_LSB
  90134. CS42L42_ASP_RX_DAI0_CH1_BIT_MSB
  90135. CS42L42_ASP_RX_DAI0_CH2_AP_RES
  90136. CS42L42_ASP_RX_DAI0_CH2_BIT_LSB
  90137. CS42L42_ASP_RX_DAI0_CH2_BIT_MSB
  90138. CS42L42_ASP_RX_DAI0_CH3_AP_RES
  90139. CS42L42_ASP_RX_DAI0_CH3_BIT_LSB
  90140. CS42L42_ASP_RX_DAI0_CH3_BIT_MSB
  90141. CS42L42_ASP_RX_DAI0_CH4_AP_RES
  90142. CS42L42_ASP_RX_DAI0_CH4_BIT_LSB
  90143. CS42L42_ASP_RX_DAI0_CH4_BIT_MSB
  90144. CS42L42_ASP_RX_DAI0_EN
  90145. CS42L42_ASP_RX_DAI1_CH1_AP_RES
  90146. CS42L42_ASP_RX_DAI1_CH1_BIT_LSB
  90147. CS42L42_ASP_RX_DAI1_CH1_BIT_MSB
  90148. CS42L42_ASP_RX_DAI1_CH2_AP_RES
  90149. CS42L42_ASP_RX_DAI1_CH2_BIT_LSB
  90150. CS42L42_ASP_RX_DAI1_CH2_BIT_MSB
  90151. CS42L42_ASP_RX_INT_MASK
  90152. CS42L42_ASP_RX_STATUS
  90153. CS42L42_ASP_RX_VAL_MASK
  90154. CS42L42_ASP_SCLK_EN_MASK
  90155. CS42L42_ASP_SCLK_EN_SHIFT
  90156. CS42L42_ASP_SCPOL_IN_DAC_MASK
  90157. CS42L42_ASP_SCPOL_IN_DAC_SHIFT
  90158. CS42L42_ASP_SLAVE_MODE
  90159. CS42L42_ASP_STP_MASK
  90160. CS42L42_ASP_STP_SHIFT
  90161. CS42L42_ASP_TX_CH1_BIT_LSB
  90162. CS42L42_ASP_TX_CH1_BIT_MSB
  90163. CS42L42_ASP_TX_CH2_BIT_LSB
  90164. CS42L42_ASP_TX_CH2_BIT_MSB
  90165. CS42L42_ASP_TX_CH_AP_RES
  90166. CS42L42_ASP_TX_CH_EN
  90167. CS42L42_ASP_TX_HIZ_DLY_CFG
  90168. CS42L42_ASP_TX_INT_MASK
  90169. CS42L42_ASP_TX_STATUS
  90170. CS42L42_ASP_TX_SZ_EN
  90171. CS42L42_ASP_TX_VAL_MASK
  90172. CS42L42_AUTO_HSBIAS_HIZ_MASK
  90173. CS42L42_AUTO_HSBIAS_HIZ_SHIFT
  90174. CS42L42_BTN_DET_EVENT_DBNCE_DEFAULT
  90175. CS42L42_BTN_DET_EVENT_DBNCE_MAX
  90176. CS42L42_BTN_DET_EVENT_DBNCE_MIN
  90177. CS42L42_BTN_DET_INIT_DBNCE_DEFAULT
  90178. CS42L42_BTN_DET_INIT_DBNCE_MAX
  90179. CS42L42_BTN_DET_INIT_DBNCE_MIN
  90180. CS42L42_CHIP_ID
  90181. CS42L42_CLASSH_CTL
  90182. CS42L42_CLK_IASRC_SEL_12
  90183. CS42L42_CLK_IASRC_SEL_MASK
  90184. CS42L42_CLK_IASRC_SEL_SHIFT
  90185. CS42L42_CLK_OASRC_SEL_12
  90186. CS42L42_CLK_OASRC_SEL_MASK
  90187. CS42L42_CLK_OASRC_SEL_SHIFT
  90188. CS42L42_CODEC_INT_MASK
  90189. CS42L42_CODEC_STATUS
  90190. CS42L42_CODEC_VAL_MASK
  90191. CS42L42_DACA_INV_SHIFT
  90192. CS42L42_DACB_INV_SHIFT
  90193. CS42L42_DAC_CTL1
  90194. CS42L42_DAC_CTL2
  90195. CS42L42_DAC_HPF_EN_MASK
  90196. CS42L42_DAC_HPF_EN_SHIFT
  90197. CS42L42_DAC_MON_EN_MASK
  90198. CS42L42_DAC_MON_EN_SHIFT
  90199. CS42L42_DAC_SRC_PDNB_MASK
  90200. CS42L42_DAC_SRC_PDNB_SHIFT
  90201. CS42L42_DEBOUNCE_TIME_MASK
  90202. CS42L42_DEBOUNCE_TIME_SHIFT
  90203. CS42L42_DETECT_MODE_MASK
  90204. CS42L42_DETECT_MODE_SHIFT
  90205. CS42L42_DET_INT1_MASK
  90206. CS42L42_DET_INT2_MASK
  90207. CS42L42_DET_INT_STATUS1
  90208. CS42L42_DET_INT_STATUS2
  90209. CS42L42_DET_INT_VAL1_MASK
  90210. CS42L42_DET_INT_VAL2_MASK
  90211. CS42L42_DET_STATUS1
  90212. CS42L42_DET_STATUS2
  90213. CS42L42_DEVID_AB
  90214. CS42L42_DEVID_CD
  90215. CS42L42_DEVID_E
  90216. CS42L42_DISCHARGE_FILT_MASK
  90217. CS42L42_DISCHARGE_FILT_SHIFT
  90218. CS42L42_D_RS_PLUG_DBNC_MASK
  90219. CS42L42_D_RS_PLUG_DBNC_SHIFT
  90220. CS42L42_D_RS_UNPLUG_DBNC_MASK
  90221. CS42L42_D_RS_UNPLUG_DBNC_SHIFT
  90222. CS42L42_D_TS_PLUG_DBNC_MASK
  90223. CS42L42_D_TS_PLUG_DBNC_SHIFT
  90224. CS42L42_D_TS_UNPLUG_DBNC_MASK
  90225. CS42L42_D_TS_UNPLUG_DBNC_SHIFT
  90226. CS42L42_EQ_BIQUAD_OVFL_MASK
  90227. CS42L42_EQ_BIQUAD_OVFL_SHIFT
  90228. CS42L42_EQ_COEF_IN0
  90229. CS42L42_EQ_COEF_IN1
  90230. CS42L42_EQ_COEF_IN2
  90231. CS42L42_EQ_COEF_IN3
  90232. CS42L42_EQ_COEF_OUT0
  90233. CS42L42_EQ_COEF_OUT1
  90234. CS42L42_EQ_COEF_OUT2
  90235. CS42L42_EQ_COEF_OUT3
  90236. CS42L42_EQ_COEF_RW
  90237. CS42L42_EQ_INIT_STAT
  90238. CS42L42_EQ_MUTE_CTL
  90239. CS42L42_EQ_OVFL_MASK
  90240. CS42L42_EQ_OVFL_SHIFT
  90241. CS42L42_EQ_PDN_MASK
  90242. CS42L42_EQ_PDN_SHIFT
  90243. CS42L42_EQ_START_FILT
  90244. CS42L42_EVENT_STAT_SEL_MASK
  90245. CS42L42_EVENT_STAT_SEL_SHIFT
  90246. CS42L42_FABID
  90247. CS42L42_FORMATS
  90248. CS42L42_FRAC0_VAL
  90249. CS42L42_FRAC1_VAL
  90250. CS42L42_FRAC2_VAL
  90251. CS42L42_FRZ_CTL
  90252. CS42L42_FSYNC_PERIOD_MASK
  90253. CS42L42_FSYNC_PERIOD_SHIFT
  90254. CS42L42_FSYNC_PULSE_WIDTH_MASK
  90255. CS42L42_FSYNC_PULSE_WIDTH_SHIFT
  90256. CS42L42_FSYNC_PW_LOWER
  90257. CS42L42_FSYNC_PW_UPPER
  90258. CS42L42_FSYNC_P_LOWER
  90259. CS42L42_FSYNC_P_UPPER
  90260. CS42L42_FS_EN_IASRC_96K
  90261. CS42L42_FS_EN_MASK
  90262. CS42L42_FS_EN_OASRC_96K
  90263. CS42L42_FS_EN_SHIFT
  90264. CS42L42_FS_RATE_EN
  90265. CS42L42_HPLOAD_DET_DONE_MASK
  90266. CS42L42_HPLOAD_DET_DONE_SHIFT
  90267. CS42L42_HPOUT_CLAMP_DIS
  90268. CS42L42_HPOUT_CLAMP_EN
  90269. CS42L42_HPOUT_CLAMP_MASK
  90270. CS42L42_HPOUT_CLAMP_SHIFT
  90271. CS42L42_HPOUT_LOAD_10NF
  90272. CS42L42_HPOUT_LOAD_1NF
  90273. CS42L42_HPOUT_LOAD_MASK
  90274. CS42L42_HPOUT_LOAD_SHIFT
  90275. CS42L42_HPOUT_PULLDOWN_MASK
  90276. CS42L42_HPOUT_PULLDOWN_SHIFT
  90277. CS42L42_HPREF_RS_MASK
  90278. CS42L42_HPREF_RS_SHIFT
  90279. CS42L42_HP_ANA_AMUTE_MASK
  90280. CS42L42_HP_ANA_AMUTE_SHIFT
  90281. CS42L42_HP_ANA_BMUTE_MASK
  90282. CS42L42_HP_ANA_BMUTE_SHIFT
  90283. CS42L42_HP_CTL
  90284. CS42L42_HP_FULL_SCALE_VOL_MASK
  90285. CS42L42_HP_FULL_SCALE_VOL_SHIFT
  90286. CS42L42_HP_LD_EN_MASK
  90287. CS42L42_HP_LD_EN_SHIFT
  90288. CS42L42_HP_PDN_MASK
  90289. CS42L42_HP_PDN_SHIFT
  90290. CS42L42_HSBIAS_CAPLESS_MASK
  90291. CS42L42_HSBIAS_CAPLESS_SHIFT
  90292. CS42L42_HSBIAS_CTL_MASK
  90293. CS42L42_HSBIAS_CTL_SHIFT
  90294. CS42L42_HSBIAS_FILT_REF_RS_MASK
  90295. CS42L42_HSBIAS_FILT_REF_RS_SHIFT
  90296. CS42L42_HSBIAS_HIZ_MODE_MASK
  90297. CS42L42_HSBIAS_HIZ_MODE_SHIFT
  90298. CS42L42_HSBIAS_PD_MASK
  90299. CS42L42_HSBIAS_PD_SHIFT
  90300. CS42L42_HSBIAS_RAMP_FAST
  90301. CS42L42_HSBIAS_RAMP_FAST_RISE_SLOW_FALL
  90302. CS42L42_HSBIAS_RAMP_MASK
  90303. CS42L42_HSBIAS_RAMP_SHIFT
  90304. CS42L42_HSBIAS_RAMP_SLOW
  90305. CS42L42_HSBIAS_RAMP_SLOWEST
  90306. CS42L42_HSBIAS_RAMP_TIME0
  90307. CS42L42_HSBIAS_RAMP_TIME1
  90308. CS42L42_HSBIAS_RAMP_TIME2
  90309. CS42L42_HSBIAS_RAMP_TIME3
  90310. CS42L42_HSBIAS_REF_MASK
  90311. CS42L42_HSBIAS_REF_SHIFT
  90312. CS42L42_HSBIAS_SC_AUTOCTL
  90313. CS42L42_HSBIAS_SENSE_EN_MASK
  90314. CS42L42_HSBIAS_SENSE_EN_SHIFT
  90315. CS42L42_HSBIAS_SENSE_MASK
  90316. CS42L42_HSBIAS_SENSE_SHIFT
  90317. CS42L42_HSBIAS_SENSE_TRIP_MASK
  90318. CS42L42_HSBIAS_SENSE_TRIP_SHIFT
  90319. CS42L42_HSDET_AUTO_DONE_MASK
  90320. CS42L42_HSDET_AUTO_DONE_SHIFT
  90321. CS42L42_HSDET_AUTO_TIME_MASK
  90322. CS42L42_HSDET_AUTO_TIME_SHIFT
  90323. CS42L42_HSDET_COMP1_LVL_MASK
  90324. CS42L42_HSDET_COMP1_LVL_SHIFT
  90325. CS42L42_HSDET_COMP1_OUT_MASK
  90326. CS42L42_HSDET_COMP1_OUT_SHIFT
  90327. CS42L42_HSDET_COMP2_LVL_MASK
  90328. CS42L42_HSDET_COMP2_LVL_SHIFT
  90329. CS42L42_HSDET_COMP2_OUT_MASK
  90330. CS42L42_HSDET_COMP2_OUT_SHIFT
  90331. CS42L42_HSDET_CTL1
  90332. CS42L42_HSDET_CTL2
  90333. CS42L42_HSDET_CTRL_MASK
  90334. CS42L42_HSDET_CTRL_SHIFT
  90335. CS42L42_HSDET_SET_MASK
  90336. CS42L42_HSDET_SET_SHIFT
  90337. CS42L42_HSDET_TYPE_MASK
  90338. CS42L42_HSDET_TYPE_SHIFT
  90339. CS42L42_HS_BIAS_CTL
  90340. CS42L42_HS_CLAMP_DISABLE
  90341. CS42L42_HS_CLAMP_DISABLE_MASK
  90342. CS42L42_HS_CLAMP_DISABLE_SHIFT
  90343. CS42L42_HS_DET_LEVEL_1
  90344. CS42L42_HS_DET_LEVEL_15
  90345. CS42L42_HS_DET_LEVEL_4
  90346. CS42L42_HS_DET_LEVEL_8
  90347. CS42L42_HS_DET_LEVEL_MASK
  90348. CS42L42_HS_DET_LEVEL_MAX
  90349. CS42L42_HS_DET_LEVEL_MIN
  90350. CS42L42_HS_DET_LEVEL_SHIFT
  90351. CS42L42_HS_DET_STATUS
  90352. CS42L42_HS_SWITCH_CTL
  90353. CS42L42_HS_TRUE_MASK
  90354. CS42L42_HS_TRUE_SHIFT
  90355. CS42L42_I2C_DEBOUNCE
  90356. CS42L42_I2C_STRETCH
  90357. CS42L42_I2C_TIMEOUT
  90358. CS42L42_INTERNAL_FS_MASK
  90359. CS42L42_INTERNAL_FS_SHIFT
  90360. CS42L42_IN_ASRC_CLK
  90361. CS42L42_LATCH_TO_VP_MASK
  90362. CS42L42_LATCH_TO_VP_SHIFT
  90363. CS42L42_LOAD_DET_DONE
  90364. CS42L42_LOAD_DET_EN
  90365. CS42L42_LOAD_DET_RCSTAT
  90366. CS42L42_MAX_REGISTER
  90367. CS42L42_MCLKDIV_MASK
  90368. CS42L42_MCLKDIV_SHIFT
  90369. CS42L42_MCLK_CTL
  90370. CS42L42_MCLK_SRC_SEL
  90371. CS42L42_MCLK_SRC_SEL_MASK
  90372. CS42L42_MCLK_SRC_SEL_SHIFT
  90373. CS42L42_MCLK_STATUS
  90374. CS42L42_MIC_DET_CTL1
  90375. CS42L42_MIC_DET_CTL2
  90376. CS42L42_MISC_DET_CTL
  90377. CS42L42_MIXER_ADC_VOL
  90378. CS42L42_MIXER_CHA_VOL
  90379. CS42L42_MIXER_CHB_VOL
  90380. CS42L42_MIXER_CH_VOL_MASK
  90381. CS42L42_MIXER_CH_VOL_SHIFT
  90382. CS42L42_MIXER_INT_MASK
  90383. CS42L42_MIXER_PDN_MASK
  90384. CS42L42_MIXER_PDN_SHIFT
  90385. CS42L42_MIXER_STATUS
  90386. CS42L42_MIXER_VAL_MASK
  90387. CS42L42_MIX_CHA_OVFL_MASK
  90388. CS42L42_MIX_CHA_OVFL_SHIFT
  90389. CS42L42_MIX_CHB_OVFL_MASK
  90390. CS42L42_MIX_CHB_OVFL_SHIFT
  90391. CS42L42_M_DETECT_FT_MASK
  90392. CS42L42_M_DETECT_FT_SHIFT
  90393. CS42L42_M_DETECT_TF_MASK
  90394. CS42L42_M_DETECT_TF_SHIFT
  90395. CS42L42_M_HP_WAKE_MASK
  90396. CS42L42_M_HP_WAKE_SHIFT
  90397. CS42L42_M_HSBIAS_HIZ_MASK
  90398. CS42L42_M_HSBIAS_HIZ_SHIFT
  90399. CS42L42_M_MIC_WAKE_MASK
  90400. CS42L42_M_MIC_WAKE_SHIFT
  90401. CS42L42_M_SHORT_DET_MASK
  90402. CS42L42_M_SHORT_DET_SHIFT
  90403. CS42L42_M_SHORT_RLS_MASK
  90404. CS42L42_M_SHORT_RLS_SHIFT
  90405. CS42L42_NUM_BIASES
  90406. CS42L42_NUM_SUPPLIES
  90407. CS42L42_OSC_PDNB_STAT_MASK
  90408. CS42L42_OSC_PDNB_STAT_SHIFT
  90409. CS42L42_OSC_SWITCH
  90410. CS42L42_OSC_SWITCH_STATUS
  90411. CS42L42_OSC_SW_SEL_STAT_MASK
  90412. CS42L42_OSC_SW_SEL_STAT_SHIFT
  90413. CS42L42_OUT_ASRC_CLK
  90414. CS42L42_PAGE_10
  90415. CS42L42_PAGE_11
  90416. CS42L42_PAGE_12
  90417. CS42L42_PAGE_13
  90418. CS42L42_PAGE_15
  90419. CS42L42_PAGE_19
  90420. CS42L42_PAGE_1B
  90421. CS42L42_PAGE_1C
  90422. CS42L42_PAGE_1D
  90423. CS42L42_PAGE_1F
  90424. CS42L42_PAGE_20
  90425. CS42L42_PAGE_21
  90426. CS42L42_PAGE_23
  90427. CS42L42_PAGE_24
  90428. CS42L42_PAGE_25
  90429. CS42L42_PAGE_26
  90430. CS42L42_PAGE_28
  90431. CS42L42_PAGE_29
  90432. CS42L42_PAGE_2A
  90433. CS42L42_PAGE_30
  90434. CS42L42_PAGE_REGISTER
  90435. CS42L42_PDN_ALL_MASK
  90436. CS42L42_PDN_ALL_SHIFT
  90437. CS42L42_PDN_DONE_MASK
  90438. CS42L42_PDN_DONE_SHIFT
  90439. CS42L42_PDN_MIC_LVL_DET_MASK
  90440. CS42L42_PDN_MIC_LVL_DET_SHIFT
  90441. CS42L42_PLL_CAL_RATIO
  90442. CS42L42_PLL_CAL_RATIO_MASK
  90443. CS42L42_PLL_CAL_RATIO_SHIFT
  90444. CS42L42_PLL_CTL1
  90445. CS42L42_PLL_CTL3
  90446. CS42L42_PLL_CTL4
  90447. CS42L42_PLL_DIVOUT_MASK
  90448. CS42L42_PLL_DIVOUT_SHIFT
  90449. CS42L42_PLL_DIV_CFG1
  90450. CS42L42_PLL_DIV_FRAC0
  90451. CS42L42_PLL_DIV_FRAC1
  90452. CS42L42_PLL_DIV_FRAC2
  90453. CS42L42_PLL_DIV_FRAC_MASK
  90454. CS42L42_PLL_DIV_FRAC_SHIFT
  90455. CS42L42_PLL_DIV_INT
  90456. CS42L42_PLL_DIV_INT_MASK
  90457. CS42L42_PLL_DIV_INT_SHIFT
  90458. CS42L42_PLL_LOCK_INT_MASK
  90459. CS42L42_PLL_LOCK_MASK
  90460. CS42L42_PLL_LOCK_SHIFT
  90461. CS42L42_PLL_LOCK_STATUS
  90462. CS42L42_PLL_LOCK_VAL_MASK
  90463. CS42L42_PLL_MODE_MASK
  90464. CS42L42_PLL_MODE_SHIFT
  90465. CS42L42_PLL_START_MASK
  90466. CS42L42_PLL_START_SHIFT
  90467. CS42L42_PLUG_CTIA
  90468. CS42L42_PLUG_HEADPHONE
  90469. CS42L42_PLUG_INVALID
  90470. CS42L42_PLUG_OMTP
  90471. CS42L42_PWR_CTL1
  90472. CS42L42_PWR_CTL2
  90473. CS42L42_PWR_CTL3
  90474. CS42L42_RANGE_MAX
  90475. CS42L42_RANGE_MIN
  90476. CS42L42_REVID
  90477. CS42L42_RING_SENSE_PDNB_MASK
  90478. CS42L42_RING_SENSE_PDNB_SHIFT
  90479. CS42L42_RING_SENSE_PU_HIZ_MASK
  90480. CS42L42_RING_SENSE_PU_HIZ_SHIFT
  90481. CS42L42_RLA_STAT_15_OHM
  90482. CS42L42_RLA_STAT_MASK
  90483. CS42L42_RLA_STAT_SHIFT
  90484. CS42L42_RSENSE_CTL1
  90485. CS42L42_RSENSE_CTL2
  90486. CS42L42_RSENSE_CTL3
  90487. CS42L42_RS_FALL_DBNCE_TIME_MASK
  90488. CS42L42_RS_FALL_DBNCE_TIME_SHIFT
  90489. CS42L42_RS_INV_MASK
  90490. CS42L42_RS_INV_SHIFT
  90491. CS42L42_RS_PLUG_DBNC_MASK
  90492. CS42L42_RS_PLUG_DBNC_SHIFT
  90493. CS42L42_RS_PLUG_MASK
  90494. CS42L42_RS_PLUG_SHIFT
  90495. CS42L42_RS_PU_EN_MASK
  90496. CS42L42_RS_PU_EN_SHIFT
  90497. CS42L42_RS_RISE_DBNCE_TIME_MASK
  90498. CS42L42_RS_RISE_DBNCE_TIME_SHIFT
  90499. CS42L42_RS_TRIM_R_MASK
  90500. CS42L42_RS_TRIM_R_SHIFT
  90501. CS42L42_RS_TRIM_T_MASK
  90502. CS42L42_RS_TRIM_T_SHIFT
  90503. CS42L42_RS_UNPLUG_DBNC_MASK
  90504. CS42L42_RS_UNPLUG_DBNC_SHIFT
  90505. CS42L42_RS_UNPLUG_MASK
  90506. CS42L42_RS_UNPLUG_SHIFT
  90507. CS42L42_SCLK_PREDIV_MASK
  90508. CS42L42_SCLK_PREDIV_SHIFT
  90509. CS42L42_SCLK_PRESENT_MASK
  90510. CS42L42_SCLK_PRESENT_SHIFT
  90511. CS42L42_SFTRAMP_RATE
  90512. CS42L42_SHORT_TRUE_MASK
  90513. CS42L42_SHORT_TRUE_SHIFT
  90514. CS42L42_SPDIF_CLK_CFG
  90515. CS42L42_SPDIF_CTL1
  90516. CS42L42_SPDIF_CTL2
  90517. CS42L42_SPDIF_CTL3
  90518. CS42L42_SPDIF_CTL4
  90519. CS42L42_SPDIF_SW_CTL1
  90520. CS42L42_SP_RX_CH_SEL
  90521. CS42L42_SP_RX_FS
  90522. CS42L42_SP_RX_ISOC_CTL
  90523. CS42L42_SP_RX_ISOC_MODE_MASK
  90524. CS42L42_SP_RX_ISOC_MODE_SHIFT
  90525. CS42L42_SP_RX_NFS_NSBB_MASK
  90526. CS42L42_SP_RX_NFS_NSBB_SHIFT
  90527. CS42L42_SP_RX_NSB_POS_MASK
  90528. CS42L42_SP_RX_NSB_POS_SHIFT
  90529. CS42L42_SP_RX_RSYNC_MASK
  90530. CS42L42_SP_RX_RSYNC_SHIFT
  90531. CS42L42_SP_TX_FS
  90532. CS42L42_SP_TX_ISOC_CTL
  90533. CS42L42_SRCPL_ADC_LK_MASK
  90534. CS42L42_SRCPL_ADC_LK_SHIFT
  90535. CS42L42_SRCPL_ADC_UNLK_MASK
  90536. CS42L42_SRCPL_ADC_UNLK_SHIFT
  90537. CS42L42_SRCPL_DAC_LK_MASK
  90538. CS42L42_SRCPL_DAC_LK_SHIFT
  90539. CS42L42_SRCPL_DAC_UNLK_MASK
  90540. CS42L42_SRCPL_DAC_UNLK_SHIFT
  90541. CS42L42_SRCPL_INT_MASK
  90542. CS42L42_SRCPL_INT_STATUS
  90543. CS42L42_SRCPL_VAL_MASK
  90544. CS42L42_SRC_BYPASS_DAC_MASK
  90545. CS42L42_SRC_BYPASS_DAC_SHIFT
  90546. CS42L42_SRC_CTL
  90547. CS42L42_SRC_ILK_MASK
  90548. CS42L42_SRC_ILK_SHIFT
  90549. CS42L42_SRC_INT_MASK
  90550. CS42L42_SRC_IUNLK_MASK
  90551. CS42L42_SRC_IUNLK_SHIFT
  90552. CS42L42_SRC_OLK_MASK
  90553. CS42L42_SRC_OLK_SHIFT
  90554. CS42L42_SRC_OUNLK_MASK
  90555. CS42L42_SRC_OUNLK_SHIFT
  90556. CS42L42_SRC_PDN_OVERRIDE_MASK
  90557. CS42L42_SRC_PDN_OVERRIDE_SHIFT
  90558. CS42L42_SRC_SDIN_FS
  90559. CS42L42_SRC_SDIN_FS_MASK
  90560. CS42L42_SRC_SDIN_FS_SHIFT
  90561. CS42L42_SRC_SDOUT_FS
  90562. CS42L42_SRC_STATUS
  90563. CS42L42_SRC_VAL_MASK
  90564. CS42L42_SUB_REVID
  90565. CS42L42_SW_CLK_STP_STAT_SEL_MASK
  90566. CS42L42_SW_CLK_STP_STAT_SEL_SHIFT
  90567. CS42L42_SW_GNDHS_HS3_MASK
  90568. CS42L42_SW_GNDHS_HS3_SHIFT
  90569. CS42L42_SW_GNDHS_HS4_MASK
  90570. CS42L42_SW_GNDHS_HS4_SHIFT
  90571. CS42L42_SW_HSB_FILT_HS3_MASK
  90572. CS42L42_SW_HSB_FILT_HS3_SHIFT
  90573. CS42L42_SW_HSB_FILT_HS4_MASK
  90574. CS42L42_SW_HSB_FILT_HS4_SHIFT
  90575. CS42L42_SW_HSB_HS3_MASK
  90576. CS42L42_SW_HSB_HS3_SHIFT
  90577. CS42L42_SW_HSB_HS4_MASK
  90578. CS42L42_SW_HSB_HS4_SHIFT
  90579. CS42L42_SW_REF_HS3_MASK
  90580. CS42L42_SW_REF_HS3_SHIFT
  90581. CS42L42_SW_REF_HS4_MASK
  90582. CS42L42_SW_REF_HS4_SHIFT
  90583. CS42L42_TIPSENSE_CTL
  90584. CS42L42_TIP_SENSE_CTRL_MASK
  90585. CS42L42_TIP_SENSE_CTRL_SHIFT
  90586. CS42L42_TIP_SENSE_DEBOUNCE_MASK
  90587. CS42L42_TIP_SENSE_DEBOUNCE_SHIFT
  90588. CS42L42_TIP_SENSE_EN_MASK
  90589. CS42L42_TIP_SENSE_EN_SHIFT
  90590. CS42L42_TIP_SENSE_INV_MASK
  90591. CS42L42_TIP_SENSE_INV_SHIFT
  90592. CS42L42_TIP_SENSE_MASK
  90593. CS42L42_TIP_SENSE_PLUG_MASK
  90594. CS42L42_TIP_SENSE_PLUG_SHIFT
  90595. CS42L42_TIP_SENSE_SHIFT
  90596. CS42L42_TIP_SENSE_UNPLUG_MASK
  90597. CS42L42_TIP_SENSE_UNPLUG_SHIFT
  90598. CS42L42_TRSENSE_STATUS
  90599. CS42L42_TSENSE_CTL
  90600. CS42L42_TSRS_INT_DISABLE
  90601. CS42L42_TSRS_PLUG_INT_MASK
  90602. CS42L42_TSRS_PLUG_STATUS
  90603. CS42L42_TSRS_PLUG_VAL_MASK
  90604. CS42L42_TS_DBNCE_0
  90605. CS42L42_TS_DBNCE_1000
  90606. CS42L42_TS_DBNCE_125
  90607. CS42L42_TS_DBNCE_1250
  90608. CS42L42_TS_DBNCE_1500
  90609. CS42L42_TS_DBNCE_250
  90610. CS42L42_TS_DBNCE_500
  90611. CS42L42_TS_DBNCE_750
  90612. CS42L42_TS_FALL_DBNCE_TIME_MASK
  90613. CS42L42_TS_FALL_DBNCE_TIME_SHIFT
  90614. CS42L42_TS_INV_DIS
  90615. CS42L42_TS_INV_EN
  90616. CS42L42_TS_INV_MASK
  90617. CS42L42_TS_INV_SHIFT
  90618. CS42L42_TS_PLUG
  90619. CS42L42_TS_PLUG_DBNC_MASK
  90620. CS42L42_TS_PLUG_DBNC_SHIFT
  90621. CS42L42_TS_PLUG_MASK
  90622. CS42L42_TS_PLUG_SHIFT
  90623. CS42L42_TS_RISE_DBNCE_TIME_MASK
  90624. CS42L42_TS_RISE_DBNCE_TIME_SHIFT
  90625. CS42L42_TS_RS_GATE_MAS
  90626. CS42L42_TS_RS_GATE_SHIFT
  90627. CS42L42_TS_TRANS
  90628. CS42L42_TS_UNPLUG
  90629. CS42L42_TS_UNPLUG_DBNC_MASK
  90630. CS42L42_TS_UNPLUG_DBNC_SHIFT
  90631. CS42L42_TS_UNPLUG_MASK
  90632. CS42L42_TS_UNPLUG_SHIFT
  90633. CS42L42_VPMON_INT_MASK
  90634. CS42L42_VPMON_MASK
  90635. CS42L42_VPMON_PDNB_MASK
  90636. CS42L42_VPMON_PDNB_SHIFT
  90637. CS42L42_VPMON_SHIFT
  90638. CS42L42_VPMON_STATUS
  90639. CS42L42_VPMON_VAL_MASK
  90640. CS42L42_WAKEB_CLEAR_MASK
  90641. CS42L42_WAKEB_CLEAR_SHIFT
  90642. CS42L42_WAKEB_MODE_MASK
  90643. CS42L42_WAKEB_MODE_SHIFT
  90644. CS42L42_WAKE_CTL
  90645. CS42L42_WIN_LEN
  90646. CS42L42_WIN_START
  90647. CS42L51_ADCA_ATT
  90648. CS42L51_ADCA_VOL
  90649. CS42L51_ADCB_ATT
  90650. CS42L51_ADCB_VOL
  90651. CS42L51_ADC_CTL
  90652. CS42L51_ADC_CTL_ADCA_HPFEN
  90653. CS42L51_ADC_CTL_ADCA_HPFRZ
  90654. CS42L51_ADC_CTL_ADCB_HPFEN
  90655. CS42L51_ADC_CTL_ADCB_HPFRZ
  90656. CS42L51_ADC_CTL_SOFTA
  90657. CS42L51_ADC_CTL_SOFTB
  90658. CS42L51_ADC_CTL_ZCROSSA
  90659. CS42L51_ADC_CTL_ZCROSSB
  90660. CS42L51_ADC_INPUT
  90661. CS42L51_ADC_INPUT_ADCA_MUTE
  90662. CS42L51_ADC_INPUT_ADCB_MUTE
  90663. CS42L51_ADC_INPUT_AINA_MUX
  90664. CS42L51_ADC_INPUT_AINB_MUX
  90665. CS42L51_ADC_INPUT_INV_ADCA
  90666. CS42L51_ADC_INPUT_INV_ADCB
  90667. CS42L51_ALC_EN
  90668. CS42L51_ALC_PGA_CTL
  90669. CS42L51_ALC_PGB_CTL
  90670. CS42L51_ALC_PGX_ALCX_SRDIS
  90671. CS42L51_ALC_PGX_ALCX_ZCDIS
  90672. CS42L51_ALC_PGX_PGX_VOL
  90673. CS42L51_ALC_REL
  90674. CS42L51_ALC_THRES
  90675. CS42L51_AOUTA_VOL
  90676. CS42L51_AOUTB_VOL
  90677. CS42L51_BEEP_CONF
  90678. CS42L51_BEEP_FREQ
  90679. CS42L51_BEEP_VOL
  90680. CS42L51_CHARGE_FREQ
  90681. CS42L51_CHIP_ID
  90682. CS42L51_CHIP_REV_A
  90683. CS42L51_CHIP_REV_B
  90684. CS42L51_CHIP_REV_ID
  90685. CS42L51_CHIP_REV_MASK
  90686. CS42L51_DAC_CTL
  90687. CS42L51_DAC_CTL_AMUTE
  90688. CS42L51_DAC_CTL_DACSZ
  90689. CS42L51_DAC_CTL_DATA_SEL
  90690. CS42L51_DAC_CTL_DEEMPH
  90691. CS42L51_DAC_CTL_FREEZE
  90692. CS42L51_DAC_DIF_I2S
  90693. CS42L51_DAC_DIF_LJ24
  90694. CS42L51_DAC_DIF_RJ16
  90695. CS42L51_DAC_DIF_RJ18
  90696. CS42L51_DAC_DIF_RJ20
  90697. CS42L51_DAC_DIF_RJ24
  90698. CS42L51_DAC_OUT_CTL
  90699. CS42L51_DAC_OUT_CTL_DACA_MUTE
  90700. CS42L51_DAC_OUT_CTL_DACB_MUTE
  90701. CS42L51_DAC_OUT_CTL_DAC_SNGVOL
  90702. CS42L51_DAC_OUT_CTL_HP_GAIN
  90703. CS42L51_DAC_OUT_CTL_INV_PCMA
  90704. CS42L51_DAC_OUT_CTL_INV_PCMB
  90705. CS42L51_DSM_MODE
  90706. CS42L51_FIRSTREG
  90707. CS42L51_FORMATS
  90708. CS42L51_HSM_MODE
  90709. CS42L51_INTF_CTL
  90710. CS42L51_INTF_CTL_ADC_I2S
  90711. CS42L51_INTF_CTL_DAC_FORMAT
  90712. CS42L51_INTF_CTL_DIGMIX
  90713. CS42L51_INTF_CTL_LOOPBACK
  90714. CS42L51_INTF_CTL_MASTER
  90715. CS42L51_INTF_CTL_MICMIX
  90716. CS42L51_LASTREG
  90717. CS42L51_LIMIT_ATT
  90718. CS42L51_LIMIT_REL
  90719. CS42L51_LIMIT_THRES_DIS
  90720. CS42L51_MIC_CTL
  90721. CS42L51_MIC_CTL_ADCA_DBOOST
  90722. CS42L51_MIC_CTL_ADCD_DBOOST
  90723. CS42L51_MIC_CTL_ADC_SNGVOL
  90724. CS42L51_MIC_CTL_MICA_BOOST
  90725. CS42L51_MIC_CTL_MICBIAS_LVL
  90726. CS42L51_MIC_CTL_MICBIAS_SEL
  90727. CS42L51_MIC_CTL_MICB_BOOST
  90728. CS42L51_MIC_POWER_CTL
  90729. CS42L51_MIC_POWER_CTL_3ST_SP
  90730. CS42L51_MIC_POWER_CTL_AUTO
  90731. CS42L51_MIC_POWER_CTL_MCLK_DIV2
  90732. CS42L51_MIC_POWER_CTL_PDN_BIAS
  90733. CS42L51_MIC_POWER_CTL_PDN_MICA
  90734. CS42L51_MIC_POWER_CTL_PDN_MICB
  90735. CS42L51_MIC_POWER_CTL_SPEED
  90736. CS42L51_MIX_MUTE_ADCMIX
  90737. CS42L51_MIX_VOLUME
  90738. CS42L51_MK_CHIP_REV
  90739. CS42L51_NOISE_CONF
  90740. CS42L51_NUMREGS
  90741. CS42L51_PCMA_VOL
  90742. CS42L51_PCMB_VOL
  90743. CS42L51_PCM_MIXER
  90744. CS42L51_POWER_CTL1
  90745. CS42L51_POWER_CTL1_PDN
  90746. CS42L51_POWER_CTL1_PDN_ADCA
  90747. CS42L51_POWER_CTL1_PDN_ADCB
  90748. CS42L51_POWER_CTL1_PDN_DACA
  90749. CS42L51_POWER_CTL1_PDN_DACB
  90750. CS42L51_POWER_CTL1_PDN_PGAA
  90751. CS42L51_POWER_CTL1_PDN_PGAB
  90752. CS42L51_QSM_MODE
  90753. CS42L51_SSM_MODE
  90754. CS42L51_STATUS
  90755. CS42L51_STATUS_ADCA_OVFL
  90756. CS42L51_STATUS_ADCB_OVFL
  90757. CS42L51_STATUS_PCMA_OVFL
  90758. CS42L51_STATUS_PCMB_OVFL
  90759. CS42L51_STATUS_SPEA_OVFL
  90760. CS42L51_STATUS_SPEB_OVFL
  90761. CS42L51_STATUS_SP_CLKERR
  90762. CS42L51_TONE_CTL
  90763. CS42L51_TONE_CTL_BASS
  90764. CS42L51_TONE_CTL_TREB
  90765. CS42L52_ADCA_MIXER_VOL
  90766. CS42L52_ADCA_VOL
  90767. CS42L52_ADCB_MIXER_VOL
  90768. CS42L52_ADCB_VOL
  90769. CS42L52_ADCX_VOL_12DB
  90770. CS42L52_ADCX_VOL_24DB
  90771. CS42L52_ADCX_VOL_6DB
  90772. CS42L52_ADC_HPF_FREQ
  90773. CS42L52_ADC_MISC_CTL
  90774. CS42L52_ADC_MISC_CTL_SOURCE_DSP
  90775. CS42L52_ADC_MIXER_VOL_12DB
  90776. CS42L52_ADC_PCM_MIXER
  90777. CS42L52_ADC_PGA_A
  90778. CS42L52_ADC_PGA_B
  90779. CS42L52_ADC_SEL_AIN1
  90780. CS42L52_ADC_SEL_AIN2
  90781. CS42L52_ADC_SEL_AIN3
  90782. CS42L52_ADC_SEL_AIN4
  90783. CS42L52_ADC_SEL_PGA
  90784. CS42L52_ADC_SEL_SHIFT
  90785. CS42L52_ALC_CTL
  90786. CS42L52_ALC_CTL_ALCA_ENABLE_SHIFT
  90787. CS42L52_ALC_CTL_ALCB_ENABLE_SHIFT
  90788. CS42L52_ALC_CTL_FASTEST_ATTACK
  90789. CS42L52_ALC_MAX_RATE_SHIFT
  90790. CS42L52_ALC_MIN_RATE_SHIFT
  90791. CS42L52_ALC_RATE
  90792. CS42L52_ALC_RATE_0DB
  90793. CS42L52_ALC_RATE_3DB
  90794. CS42L52_ALC_RATE_6DB
  90795. CS42L52_ALC_SLOWEST_RELEASE
  90796. CS42L52_ALC_THRESHOLD
  90797. CS42L52_ALL_IN_ONE
  90798. CS42L52_ANALOG_HPF_CTL
  90799. CS42L52_BATT_COMPEN
  90800. CS42L52_BATT_LEVEL
  90801. CS42L52_BEEP_EN_MASK
  90802. CS42L52_BEEP_FREQ
  90803. CS42L52_BEEP_RATE_MASK
  90804. CS42L52_BEEP_RATE_SHIFT
  90805. CS42L52_BEEP_TONE_CTL
  90806. CS42L52_BEEP_VOL
  90807. CS42L52_CHARGE_PUMP
  90808. CS42L52_CHARGE_PUMP_MASK
  90809. CS42L52_CHARGE_PUMP_SHIFT
  90810. CS42L52_CHIP
  90811. CS42L52_CHIP_ID
  90812. CS42L52_CHIP_ID_MASK
  90813. CS42L52_CHIP_MASK
  90814. CS42L52_CHIP_ONE
  90815. CS42L52_CHIP_REV_A0
  90816. CS42L52_CHIP_REV_A1
  90817. CS42L52_CHIP_REV_B0
  90818. CS42L52_CHIP_REV_MASK
  90819. CS42L52_CHIP_SWICTH
  90820. CS42L52_CHIP_THR
  90821. CS42L52_CHIP_TWO
  90822. CS42L52_CLK_CTL
  90823. CS42L52_CLK_STATUS
  90824. CS42L52_DEFAULT_CLK
  90825. CS42L52_DEFAULT_FORMAT
  90826. CS42L52_DEFAULT_HP_VOL
  90827. CS42L52_DEFAULT_MAX_CHANS
  90828. CS42L52_DEFAULT_OUTPUT_STATE
  90829. CS42L52_DEFAULT_SPK_VOL
  90830. CS42L52_FIX_BITS1
  90831. CS42L52_FIX_BITS2
  90832. CS42L52_FIX_BITS_CTL
  90833. CS42L52_FORMATS
  90834. CS42L52_HPA_VOL
  90835. CS42L52_HPB_VOL
  90836. CS42L52_HPF_CTL_ANLGSFTA
  90837. CS42L52_HPF_CTL_ANLGSFTB
  90838. CS42L52_IFACE_CTL1
  90839. CS42L52_IFACE_CTL1_ADC_FMT_I2S
  90840. CS42L52_IFACE_CTL1_ADC_FMT_LEFT_J
  90841. CS42L52_IFACE_CTL1_DAC_FMT_I2S
  90842. CS42L52_IFACE_CTL1_DAC_FMT_LEFT_J
  90843. CS42L52_IFACE_CTL1_DAC_FMT_RIGHT_J
  90844. CS42L52_IFACE_CTL1_DSP_MODE_EN
  90845. CS42L52_IFACE_CTL1_INV_SCLK
  90846. CS42L52_IFACE_CTL1_MASTER
  90847. CS42L52_IFACE_CTL1_SLAVE
  90848. CS42L52_IFACE_CTL1_WL_16BIT
  90849. CS42L52_IFACE_CTL1_WL_20BIT
  90850. CS42L52_IFACE_CTL1_WL_24BIT
  90851. CS42L52_IFACE_CTL1_WL_32BIT
  90852. CS42L52_IFACE_CTL1_WL_MASK
  90853. CS42L52_IFACE_CTL2
  90854. CS42L52_IFACE_CTL2_BIAS_LVL
  90855. CS42L52_IFACE_CTL2_HP_SW_INV
  90856. CS42L52_IFACE_CTL2_LOOPBACK
  90857. CS42L52_IFACE_CTL2_SC_MC_EQ
  90858. CS42L52_IFACE_CTL2_S_MODE_OUTPUT_EN
  90859. CS42L52_IFACE_CTL2_S_MODE_OUTPUT_HIZ
  90860. CS42L52_LIMITER_AT_RATE
  90861. CS42L52_LIMITER_CTL1
  90862. CS42L52_LIMITER_CTL2
  90863. CS42L52_MASTERA_VOL
  90864. CS42L52_MASTERB_VOL
  90865. CS42L52_MAX_CLK
  90866. CS42L52_MAX_REGISTER
  90867. CS42L52_MICA_CTL
  90868. CS42L52_MICB_CTL
  90869. CS42L52_MIC_CTL_MIC_SEL_MASK
  90870. CS42L52_MIC_CTL_MIC_SEL_SHIFT
  90871. CS42L52_MIC_CTL_TYPE_MASK
  90872. CS42L52_MIC_CTL_TYPE_SHIFT
  90873. CS42L52_MIN_CLK
  90874. CS42L52_MISC_CTL
  90875. CS42L52_MISC_CTL_DEEMPH
  90876. CS42L52_MISC_CTL_DIGSFT
  90877. CS42L52_MISC_CTL_DIGZC
  90878. CS42L52_NAME
  90879. CS42L52_NG_DELAY_100MS
  90880. CS42L52_NG_DELAY_SHIFT
  90881. CS42L52_NG_ENABLE_SHIFT
  90882. CS42L52_NG_MIN_70DB
  90883. CS42L52_NG_THRESHOLD_SHIFT
  90884. CS42L52_NOISE_GATE_CTL
  90885. CS42L52_PASSTHRUA_VOL
  90886. CS42L52_PASSTHRUB_VOL
  90887. CS42L52_PB_CTL1
  90888. CS42L52_PB_CTL1_HP_GAIN_03959
  90889. CS42L52_PB_CTL1_HP_GAIN_04571
  90890. CS42L52_PB_CTL1_HP_GAIN_05111
  90891. CS42L52_PB_CTL1_HP_GAIN_06047
  90892. CS42L52_PB_CTL1_HP_GAIN_07099
  90893. CS42L52_PB_CTL1_HP_GAIN_08399
  90894. CS42L52_PB_CTL1_HP_GAIN_10000
  90895. CS42L52_PB_CTL1_HP_GAIN_11430
  90896. CS42L52_PB_CTL1_HP_GAIN_SHIFT
  90897. CS42L52_PB_CTL1_INV_PCMA
  90898. CS42L52_PB_CTL1_INV_PCMB
  90899. CS42L52_PB_CTL1_MSTA_MUTE
  90900. CS42L52_PB_CTL1_MSTB_MUTE
  90901. CS42L52_PB_CTL1_MUTE
  90902. CS42L52_PB_CTL1_MUTE_MASK
  90903. CS42L52_PB_CTL1_UNMUTE
  90904. CS42L52_PB_CTL2
  90905. CS42L52_PB_CTL2_HPA_MUTE
  90906. CS42L52_PB_CTL2_HPB_MUTE
  90907. CS42L52_PB_CTL2_SPKA_MUTE
  90908. CS42L52_PB_CTL2_SPKB_MUTE
  90909. CS42L52_PB_CTL2_SPK_MONO
  90910. CS42L52_PB_CTL2_SPK_MUTE50
  90911. CS42L52_PB_CTL2_SPK_SWAP
  90912. CS42L52_PCMA_MIXER_VOL
  90913. CS42L52_PCMB_MIXER_VOL
  90914. CS42L52_PGAA_CTL
  90915. CS42L52_PGAB_CTL
  90916. CS42L52_PGAX_CTL_VOL_12DB
  90917. CS42L52_PGAX_CTL_VOL_6DB
  90918. CS42L52_PWRCTL1
  90919. CS42L52_PWRCTL1_PDN_ADCA
  90920. CS42L52_PWRCTL1_PDN_ADCB
  90921. CS42L52_PWRCTL1_PDN_ALL
  90922. CS42L52_PWRCTL1_PDN_CHRG
  90923. CS42L52_PWRCTL1_PDN_CODEC
  90924. CS42L52_PWRCTL1_PDN_PGAA
  90925. CS42L52_PWRCTL1_PDN_PGAB
  90926. CS42L52_PWRCTL2
  90927. CS42L52_PWRCTL2_OVRDA
  90928. CS42L52_PWRCTL2_OVRDB
  90929. CS42L52_PWRCTL2_PDN_MICA
  90930. CS42L52_PWRCTL2_PDN_MICA_SHIFT
  90931. CS42L52_PWRCTL2_PDN_MICB
  90932. CS42L52_PWRCTL2_PDN_MICBIAS
  90933. CS42L52_PWRCTL2_PDN_MICBIAS_SHIFT
  90934. CS42L52_PWRCTL2_PDN_MICB_SHIFT
  90935. CS42L52_PWRCTL3
  90936. CS42L52_PWRCTL3_CONF_MASK
  90937. CS42L52_PWRCTL3_HPA_ALWAYS_OFF
  90938. CS42L52_PWRCTL3_HPA_ALWAYS_ON
  90939. CS42L52_PWRCTL3_HPA_ON_HIGH
  90940. CS42L52_PWRCTL3_HPA_ON_LOW
  90941. CS42L52_PWRCTL3_HPA_PDN_SHIFT
  90942. CS42L52_PWRCTL3_HPB_ALWAYS_OFF
  90943. CS42L52_PWRCTL3_HPB_ALWAYS_ON
  90944. CS42L52_PWRCTL3_HPB_ON_HIGH
  90945. CS42L52_PWRCTL3_HPB_ON_LOW
  90946. CS42L52_PWRCTL3_HPB_PDN_SHIFT
  90947. CS42L52_PWRCTL3_PDN_SPKA
  90948. CS42L52_PWRCTL3_PDN_SPKB
  90949. CS42L52_PWRCTL3_SPKA_ALWAYS_ON
  90950. CS42L52_PWRCTL3_SPKA_ON_HIGH
  90951. CS42L52_PWRCTL3_SPKA_ON_LOW
  90952. CS42L52_PWRCTL3_SPKA_PDN_SHIFT
  90953. CS42L52_PWRCTL3_SPKB_ALWAYS_ON
  90954. CS42L52_PWRCTL3_SPKB_ON_HIGH
  90955. CS42L52_PWRCTL3_SPKB_ON_LOW
  90956. CS42L52_PWRCTL3_SPKB_PDN_SHIFT
  90957. CS42L52_RATES
  90958. CS42L52_SPKA_VOL
  90959. CS42L52_SPKB_VOL
  90960. CS42L52_SPK_STATUS
  90961. CS42L52_SPK_STATUS_PIN_HIGH
  90962. CS42L52_SPK_STATUS_PIN_SHIFT
  90963. CS42L52_SYSCLK
  90964. CS42L52_TEM_CTL
  90965. CS42L52_TEM_CTL_SET
  90966. CS42L52_THE_FOLDBACK
  90967. CS42L52_TONE_CTL
  90968. CS42L56_ADAPT_PWR_MASK
  90969. CS42L56_ADCAMIX_MUTE_MASK
  90970. CS42L56_ADCA_ATTENUATOR
  90971. CS42L56_ADCA_MIX_VOLUME
  90972. CS42L56_ADCA_MUTE_MASK
  90973. CS42L56_ADCBMIX_MUTE_MASK
  90974. CS42L56_ADCB_ATTENUATOR
  90975. CS42L56_ADCB_MIX_VOLUME
  90976. CS42L56_ADCB_MUTE_MASK
  90977. CS42L56_AIN1A_REF_MASK
  90978. CS42L56_AIN1B_REF_MASK
  90979. CS42L56_AIN2A_REF_MASK
  90980. CS42L56_AIN2B_REF_MASK
  90981. CS42L56_AIN_REFCFG_ADC_MUX
  90982. CS42L56_ALC_EN_ATTACK_RATE
  90983. CS42L56_ALC_LIM_SFT_ZC
  90984. CS42L56_ALC_RELEASE_RATE
  90985. CS42L56_ALC_THRESHOLD
  90986. CS42L56_AMUTE_HPLO_MUX
  90987. CS42L56_ANAINPUT_ADV_VOLUME
  90988. CS42L56_ANLGSFT_MASK
  90989. CS42L56_ANLGZC_MASK
  90990. CS42L56_AREV_MASK
  90991. CS42L56_BEEP_BASSCF_MASK
  90992. CS42L56_BEEP_CFG_MASK
  90993. CS42L56_BEEP_EN_MASK
  90994. CS42L56_BEEP_FREQ_MASK
  90995. CS42L56_BEEP_FREQ_OFFTIME
  90996. CS42L56_BEEP_FREQ_ONTIME
  90997. CS42L56_BEEP_OFFTIME_MASK
  90998. CS42L56_BEEP_ONTIME_MASK
  90999. CS42L56_BEEP_RATE_SHIFT
  91000. CS42L56_BEEP_TCEN_MASK
  91001. CS42L56_BEEP_TONE_CFG
  91002. CS42L56_BEEP_TREBCF_MASK
  91003. CS42L56_CHAN_MIX_SWAP
  91004. CS42L56_CHIP_ID_1
  91005. CS42L56_CHIP_ID_2
  91006. CS42L56_CHIP_ID_MASK
  91007. CS42L56_CHRG_FREQ_MASK
  91008. CS42L56_CLASSH_CTL
  91009. CS42L56_CLKCTL_1
  91010. CS42L56_CLKCTL_2
  91011. CS42L56_CLK_AUTO_MASK
  91012. CS42L56_CLK_RATIO_MASK
  91013. CS42L56_DEEMPH_MASK
  91014. CS42L56_DEVID
  91015. CS42L56_DIGINPUT_ADV_VOLUME
  91016. CS42L56_DIGSFT_MASK
  91017. CS42L56_DIG_FMT_I2S
  91018. CS42L56_DIG_FMT_LEFT_J
  91019. CS42L56_DIG_FMT_MASK
  91020. CS42L56_DIG_MUX_MASK
  91021. CS42L56_DSP_MUTE_CTL
  91022. CS42L56_FORMATS
  91023. CS42L56_FREEZE_MASK
  91024. CS42L56_GAIN_BIAS_CTL
  91025. CS42L56_HPA_VOLUME
  91026. CS42L56_HPB_VOLUME
  91027. CS42L56_HPFA_FREQ_MASK
  91028. CS42L56_HPFB_FREQ_MASK
  91029. CS42L56_HPF_CTL
  91030. CS42L56_HP_MUTE_MASK
  91031. CS42L56_INT_STATUS
  91032. CS42L56_LIM_ATTACK_RATE
  91033. CS42L56_LIM_CTL_RELEASE_RATE
  91034. CS42L56_LIM_THRESHOLD_CTL
  91035. CS42L56_LOA_VOLUME
  91036. CS42L56_LOB_VOLUME
  91037. CS42L56_LO_MUTE_MASK
  91038. CS42L56_MASTER_A_VOLUME
  91039. CS42L56_MASTER_B_VOLUME
  91040. CS42L56_MASTER_MODE
  91041. CS42L56_MAX_REGISTER
  91042. CS42L56_MCLK_11P2896MHZ
  91043. CS42L56_MCLK_12MHZ
  91044. CS42L56_MCLK_12P288MHZ
  91045. CS42L56_MCLK_22P5792MHZ
  91046. CS42L56_MCLK_24MHZ
  91047. CS42L56_MCLK_24P576MHZ
  91048. CS42L56_MCLK_5P6448MHZ
  91049. CS42L56_MCLK_6MHZ
  91050. CS42L56_MCLK_6P144MHZ
  91051. CS42L56_MCLK_DIS_MASK
  91052. CS42L56_MCLK_DIV2
  91053. CS42L56_MCLK_DIV2_MASK
  91054. CS42L56_MCLK_LRCLK_125
  91055. CS42L56_MCLK_LRCLK_128
  91056. CS42L56_MCLK_LRCLK_136
  91057. CS42L56_MCLK_LRCLK_187P5
  91058. CS42L56_MCLK_LRCLK_192
  91059. CS42L56_MCLK_LRCLK_250
  91060. CS42L56_MCLK_LRCLK_256
  91061. CS42L56_MCLK_LRCLK_272
  91062. CS42L56_MCLK_LRCLK_375
  91063. CS42L56_MCLK_LRCLK_384
  91064. CS42L56_MCLK_LRCLK_500
  91065. CS42L56_MCLK_LRCLK_512
  91066. CS42L56_MCLK_LRCLK_544
  91067. CS42L56_MCLK_LRCLK_750
  91068. CS42L56_MCLK_LRCLK_768
  91069. CS42L56_MCLK_PREDIV
  91070. CS42L56_MCLK_PREDIV_MASK
  91071. CS42L56_MIC_BIAS_MASK
  91072. CS42L56_MISC_ADC_CTL
  91073. CS42L56_MISC_CTL
  91074. CS42L56_MSTA_MUTE_MASK
  91075. CS42L56_MSTB_MUTE_MASK
  91076. CS42L56_MS_MODE_MASK
  91077. CS42L56_MTLREV_MASK
  91078. CS42L56_MUTE_ALL
  91079. CS42L56_NOISE_GATE_CTL
  91080. CS42L56_NUM_SUPPLIES
  91081. CS42L56_PCMAMIX_MUTE_MASK
  91082. CS42L56_PCMA_MIX_VOLUME
  91083. CS42L56_PCMBMIX_MUTE_MASK
  91084. CS42L56_PCMB_MIX_VOLUME
  91085. CS42L56_PCM_INV_MASK
  91086. CS42L56_PDN_ADCA_MASK
  91087. CS42L56_PDN_ADCB_MASK
  91088. CS42L56_PDN_ALL_MASK
  91089. CS42L56_PDN_BIAS_MASK
  91090. CS42L56_PDN_CHRG_MASK
  91091. CS42L56_PDN_DSP_MASK
  91092. CS42L56_PDN_HPA_MASK
  91093. CS42L56_PDN_HPB_MASK
  91094. CS42L56_PDN_LOA_MASK
  91095. CS42L56_PDN_LOB_MASK
  91096. CS42L56_PDN_VBUF_MASK
  91097. CS42L56_PGAA_MUX_VOLUME
  91098. CS42L56_PGAB_MUX_VOLUME
  91099. CS42L56_PLAYBACK_CTL
  91100. CS42L56_PLYBCK_GANG_MASK
  91101. CS42L56_PWRCTL_1
  91102. CS42L56_PWRCTL_2
  91103. CS42L56_RATES
  91104. CS42L56_SCLK_INV
  91105. CS42L56_SCLK_INV_MASK
  91106. CS42L56_SCLK_MCLK_MASK
  91107. CS42L56_SERIAL_FMT
  91108. CS42L56_SLAVE_MODE
  91109. CS42L56_TONE_CTL
  91110. CS42L56_UNMUTE
  91111. CS42L73_ADCIPC
  91112. CS42L73_ALCARATE
  91113. CS42L73_ALCMINMAX
  91114. CS42L73_ALCNGMC
  91115. CS42L73_ALCRRATE
  91116. CS42L73_ANLGOSFT
  91117. CS42L73_ASP
  91118. CS42L73_ASPAASPAA
  91119. CS42L73_ASPAIPAA
  91120. CS42L73_ASPAVSPMA
  91121. CS42L73_ASPAXSPAA
  91122. CS42L73_ASPBASPBA
  91123. CS42L73_ASPBIPBA
  91124. CS42L73_ASPBVSPMA
  91125. CS42L73_ASPBXSPBA
  91126. CS42L73_ASPC
  91127. CS42L73_ASPINV
  91128. CS42L73_ASPMMCC
  91129. CS42L73_CHARGEPUMP_MASK
  91130. CS42L73_CHIP_ID
  91131. CS42L73_CLKID_MCLK1
  91132. CS42L73_CLKID_MCLK2
  91133. CS42L73_CPFCHC
  91134. CS42L73_DEVID
  91135. CS42L73_DEVID_AB
  91136. CS42L73_DEVID_CD
  91137. CS42L73_DEVID_E
  91138. CS42L73_DIGMIXOVFL
  91139. CS42L73_DISCHG_FILT
  91140. CS42L73_DMMCC
  91141. CS42L73_ESLDVOL
  91142. CS42L73_ESLD_MUTE
  91143. CS42L73_ESLMASPA
  91144. CS42L73_ESLMIPMA
  91145. CS42L73_ESLMVSPMA
  91146. CS42L73_ESLMXSPA
  91147. CS42L73_FORMATS
  91148. CS42L73_HLAASPAA
  91149. CS42L73_HLADVOL
  91150. CS42L73_HLAD_MUTE
  91151. CS42L73_HLAIPAA
  91152. CS42L73_HLAVSPMA
  91153. CS42L73_HLAXSPAA
  91154. CS42L73_HLBASPBA
  91155. CS42L73_HLBDVOL
  91156. CS42L73_HLBD_MUTE
  91157. CS42L73_HLBIPBA
  91158. CS42L73_HLBVSPMA
  91159. CS42L73_HLBXSPBA
  91160. CS42L73_HPAAVOL
  91161. CS42L73_HPA_MUTE
  91162. CS42L73_HPBAVOL
  91163. CS42L73_IM1
  91164. CS42L73_IM2
  91165. CS42L73_IPADVOL
  91166. CS42L73_IPAOVFL
  91167. CS42L73_IPBDVOL
  91168. CS42L73_IPBOVFL
  91169. CS42L73_IS1
  91170. CS42L73_IS2
  91171. CS42L73_LIMARATEESL
  91172. CS42L73_LIMARATEHL
  91173. CS42L73_LIMARATESPK
  91174. CS42L73_LIMRRATEESL
  91175. CS42L73_LIMRRATEHL
  91176. CS42L73_LIMRRATESPK
  91177. CS42L73_LMAXESL
  91178. CS42L73_LMAXHL
  91179. CS42L73_LMAXSPK
  91180. CS42L73_LOAAVOL
  91181. CS42L73_LOA_MUTE
  91182. CS42L73_LOBAVOL
  91183. CS42L73_MAX_REGISTER
  91184. CS42L73_MCK_SCLK_64FS
  91185. CS42L73_MCK_SCLK_MCLK
  91186. CS42L73_MCK_SCLK_PREMCLK
  91187. CS42L73_MCLKDIS
  91188. CS42L73_MCLKSEL_MCLK1
  91189. CS42L73_MCLKSEL_MCLK2
  91190. CS42L73_MCLKXDIV
  91191. CS42L73_MCLKX_MAX
  91192. CS42L73_MCLKX_MIN
  91193. CS42L73_MIC2_SDET
  91194. CS42L73_MICAPREPGAAVOL
  91195. CS42L73_MICBPREPGABVOL
  91196. CS42L73_MIOPC
  91197. CS42L73_MIXERCTL
  91198. CS42L73_MMCC
  91199. CS42L73_MMCCDIV
  91200. CS42L73_MMIXCTL
  91201. CS42L73_MS_MASTER
  91202. CS42L73_NGCAB
  91203. CS42L73_OLMBMSDC
  91204. CS42L73_PBDC
  91205. CS42L73_PCM_BIT_ORDER
  91206. CS42L73_PCM_MODE0
  91207. CS42L73_PCM_MODE1
  91208. CS42L73_PCM_MODE2
  91209. CS42L73_PCM_MODE_MASK
  91210. CS42L73_PDN
  91211. CS42L73_PDN_ADCA
  91212. CS42L73_PDN_ADCB
  91213. CS42L73_PDN_ASP_SDIN
  91214. CS42L73_PDN_ASP_SDOUT
  91215. CS42L73_PDN_DMICA
  91216. CS42L73_PDN_DMICB
  91217. CS42L73_PDN_EAR
  91218. CS42L73_PDN_HP
  91219. CS42L73_PDN_LDO
  91220. CS42L73_PDN_LO
  91221. CS42L73_PDN_MIC1_BIAS
  91222. CS42L73_PDN_MIC2_BIAS
  91223. CS42L73_PDN_SPK
  91224. CS42L73_PDN_SPKLO
  91225. CS42L73_PDN_THMS
  91226. CS42L73_PDN_VSP
  91227. CS42L73_PDN_XSP_SDIN
  91228. CS42L73_PDN_XSP_SDOUT
  91229. CS42L73_PWRCTL1
  91230. CS42L73_PWRCTL2
  91231. CS42L73_PWRCTL3
  91232. CS42L73_REVID
  91233. CS42L73_SPC
  91234. CS42L73_SPDIF_I2S
  91235. CS42L73_SPDIF_PCM
  91236. CS42L73_SPFS
  91237. CS42L73_SPKDVOL
  91238. CS42L73_SPKD_MUTE
  91239. CS42L73_SPKMASPA
  91240. CS42L73_SPKMIPMA
  91241. CS42L73_SPKMVSPMA
  91242. CS42L73_SPKMXSPA
  91243. CS42L73_SP_3ST
  91244. CS42L73_STRINV
  91245. CS42L73_THMOVLD
  91246. CS42L73_THMOVLD_098C
  91247. CS42L73_THMOVLD_115C
  91248. CS42L73_THMOVLD_132C
  91249. CS42L73_THMOVLD_150C
  91250. CS42L73_VSP
  91251. CS42L73_VSPAASPAA
  91252. CS42L73_VSPAIPAA
  91253. CS42L73_VSPAVSPMA
  91254. CS42L73_VSPAXSPAA
  91255. CS42L73_VSPBASPBA
  91256. CS42L73_VSPBIPBA
  91257. CS42L73_VSPBVSPMA
  91258. CS42L73_VSPBXSPBA
  91259. CS42L73_VSPC
  91260. CS42L73_VSPINV
  91261. CS42L73_VSPMMCC
  91262. CS42L73_VXSPFS
  91263. CS42L73_XSP
  91264. CS42L73_XSPAASPAA
  91265. CS42L73_XSPAASPBA
  91266. CS42L73_XSPAIPAA
  91267. CS42L73_XSPAVSPMA
  91268. CS42L73_XSPAXSPAA
  91269. CS42L73_XSPBIPBA
  91270. CS42L73_XSPBVSPMA
  91271. CS42L73_XSPBXSPBA
  91272. CS42L73_XSPC
  91273. CS42L73_XSPINV
  91274. CS42L73_XSPMMCC
  91275. CS42L92
  91276. CS42XX8_ADCCTL
  91277. CS42XX8_ADCCTL_ADC1_SINGLE
  91278. CS42XX8_ADCCTL_ADC1_SINGLE_MASK
  91279. CS42XX8_ADCCTL_ADC1_SINGLE_SHIFT
  91280. CS42XX8_ADCCTL_ADC2_SINGLE
  91281. CS42XX8_ADCCTL_ADC2_SINGLE_MASK
  91282. CS42XX8_ADCCTL_ADC2_SINGLE_SHIFT
  91283. CS42XX8_ADCCTL_ADC3_SINGLE
  91284. CS42XX8_ADCCTL_ADC3_SINGLE_MASK
  91285. CS42XX8_ADCCTL_ADC3_SINGLE_SHIFT
  91286. CS42XX8_ADCCTL_ADC_HPF_FREEZE
  91287. CS42XX8_ADCCTL_ADC_HPF_FREEZE_MASK
  91288. CS42XX8_ADCCTL_ADC_HPF_FREEZE_SHIFT
  91289. CS42XX8_ADCCTL_AIN5_MUX
  91290. CS42XX8_ADCCTL_AIN5_MUX_MASK
  91291. CS42XX8_ADCCTL_AIN5_MUX_SHIFT
  91292. CS42XX8_ADCCTL_AIN6_MUX
  91293. CS42XX8_ADCCTL_AIN6_MUX_MASK
  91294. CS42XX8_ADCCTL_AIN6_MUX_SHIFT
  91295. CS42XX8_ADCCTL_DAC_DEM
  91296. CS42XX8_ADCCTL_DAC_DEM_MASK
  91297. CS42XX8_ADCCTL_DAC_DEM_SHIFT
  91298. CS42XX8_ADCINV
  91299. CS42XX8_CHIPID
  91300. CS42XX8_CHIPID_CHIP_ID_MASK
  91301. CS42XX8_CHIPID_REV_ID_MASK
  91302. CS42XX8_DACINV
  91303. CS42XX8_DACMUTE
  91304. CS42XX8_DACMUTE_ALL
  91305. CS42XX8_DACMUTE_AOUT
  91306. CS42XX8_FIRSTREG
  91307. CS42XX8_FM_AUTO
  91308. CS42XX8_FM_DOUBLE
  91309. CS42XX8_FM_QUAD
  91310. CS42XX8_FM_SINGLE
  91311. CS42XX8_FORMATS
  91312. CS42XX8_FUNCMOD
  91313. CS42XX8_FUNCMOD_ADC_FM
  91314. CS42XX8_FUNCMOD_ADC_FM_MASK
  91315. CS42XX8_FUNCMOD_ADC_FM_SHIFT
  91316. CS42XX8_FUNCMOD_ADC_FM_WIDTH
  91317. CS42XX8_FUNCMOD_DAC_FM
  91318. CS42XX8_FUNCMOD_DAC_FM_MASK
  91319. CS42XX8_FUNCMOD_DAC_FM_SHIFT
  91320. CS42XX8_FUNCMOD_DAC_FM_WIDTH
  91321. CS42XX8_FUNCMOD_MFREQ_1024
  91322. CS42XX8_FUNCMOD_MFREQ_256
  91323. CS42XX8_FUNCMOD_MFREQ_384
  91324. CS42XX8_FUNCMOD_MFREQ_512
  91325. CS42XX8_FUNCMOD_MFREQ_768
  91326. CS42XX8_FUNCMOD_MFREQ_MASK
  91327. CS42XX8_FUNCMOD_MFREQ_SHIFT
  91328. CS42XX8_FUNCMOD_MFREQ_WIDTH
  91329. CS42XX8_FUNCMOD_xC_FM
  91330. CS42XX8_FUNCMOD_xC_FM_MASK
  91331. CS42XX8_I2C_INCR
  91332. CS42XX8_INTF
  91333. CS42XX8_INTF_ADC_DIF_I2S
  91334. CS42XX8_INTF_ADC_DIF_LEFTJ
  91335. CS42XX8_INTF_ADC_DIF_MASK
  91336. CS42XX8_INTF_ADC_DIF_ONELINE_20
  91337. CS42XX8_INTF_ADC_DIF_ONELINE_24
  91338. CS42XX8_INTF_ADC_DIF_RIGHTJ
  91339. CS42XX8_INTF_ADC_DIF_RIGHTJ_16
  91340. CS42XX8_INTF_ADC_DIF_SHIFT
  91341. CS42XX8_INTF_ADC_DIF_TDM
  91342. CS42XX8_INTF_ADC_DIF_WIDTH
  91343. CS42XX8_INTF_AUX_DIF
  91344. CS42XX8_INTF_AUX_DIF_MASK
  91345. CS42XX8_INTF_AUX_DIF_SHIFT
  91346. CS42XX8_INTF_DAC_DIF_I2S
  91347. CS42XX8_INTF_DAC_DIF_LEFTJ
  91348. CS42XX8_INTF_DAC_DIF_MASK
  91349. CS42XX8_INTF_DAC_DIF_ONELINE_20
  91350. CS42XX8_INTF_DAC_DIF_ONELINE_24
  91351. CS42XX8_INTF_DAC_DIF_RIGHTJ
  91352. CS42XX8_INTF_DAC_DIF_RIGHTJ_16
  91353. CS42XX8_INTF_DAC_DIF_SHIFT
  91354. CS42XX8_INTF_DAC_DIF_TDM
  91355. CS42XX8_INTF_DAC_DIF_WIDTH
  91356. CS42XX8_INTF_FREEZE
  91357. CS42XX8_INTF_FREEZE_MASK
  91358. CS42XX8_INTF_FREEZE_SHIFT
  91359. CS42XX8_LASTREG
  91360. CS42XX8_MUTEC
  91361. CS42XX8_MUTEC_MCPOLARITY_ACTIVE_HIGH
  91362. CS42XX8_MUTEC_MCPOLARITY_ACTIVE_LOW
  91363. CS42XX8_MUTEC_MCPOLARITY_MASK
  91364. CS42XX8_MUTEC_MCPOLARITY_SHIFT
  91365. CS42XX8_MUTEC_MUTEC_ACTIVE
  91366. CS42XX8_MUTEC_MUTEC_ACTIVE_MASK
  91367. CS42XX8_MUTEC_MUTEC_ACTIVE_SHIFT
  91368. CS42XX8_NUMREGS
  91369. CS42XX8_NUM_SUPPLIES
  91370. CS42XX8_PWRCTL
  91371. CS42XX8_PWRCTL_PDN
  91372. CS42XX8_PWRCTL_PDN_ADC1
  91373. CS42XX8_PWRCTL_PDN_ADC1_MASK
  91374. CS42XX8_PWRCTL_PDN_ADC1_SHIFT
  91375. CS42XX8_PWRCTL_PDN_ADC2
  91376. CS42XX8_PWRCTL_PDN_ADC2_MASK
  91377. CS42XX8_PWRCTL_PDN_ADC2_SHIFT
  91378. CS42XX8_PWRCTL_PDN_ADC3
  91379. CS42XX8_PWRCTL_PDN_ADC3_MASK
  91380. CS42XX8_PWRCTL_PDN_ADC3_SHIFT
  91381. CS42XX8_PWRCTL_PDN_DAC1
  91382. CS42XX8_PWRCTL_PDN_DAC1_MASK
  91383. CS42XX8_PWRCTL_PDN_DAC1_SHIFT
  91384. CS42XX8_PWRCTL_PDN_DAC2
  91385. CS42XX8_PWRCTL_PDN_DAC2_MASK
  91386. CS42XX8_PWRCTL_PDN_DAC2_SHIFT
  91387. CS42XX8_PWRCTL_PDN_DAC3
  91388. CS42XX8_PWRCTL_PDN_DAC3_MASK
  91389. CS42XX8_PWRCTL_PDN_DAC3_SHIFT
  91390. CS42XX8_PWRCTL_PDN_DAC4
  91391. CS42XX8_PWRCTL_PDN_DAC4_MASK
  91392. CS42XX8_PWRCTL_PDN_DAC4_SHIFT
  91393. CS42XX8_PWRCTL_PDN_MASK
  91394. CS42XX8_PWRCTL_PDN_SHIFT
  91395. CS42XX8_STATUS
  91396. CS42XX8_STATUSCTL
  91397. CS42XX8_STATUSCTL_INI_MASK
  91398. CS42XX8_STATUSCTL_INI_SHIFT
  91399. CS42XX8_STATUSCTL_INI_WIDTH
  91400. CS42XX8_STATUSCTL_INT_ACTIVE_HIGH
  91401. CS42XX8_STATUSCTL_INT_ACTIVE_LOW
  91402. CS42XX8_STATUSCTL_INT_OPEN_DRAIN
  91403. CS42XX8_STATUSM
  91404. CS42XX8_STATUS_ADC1_OVFL_MASK
  91405. CS42XX8_STATUS_ADC1_OVFL_M_MASK
  91406. CS42XX8_STATUS_ADC1_OVFL_M_SHIFT
  91407. CS42XX8_STATUS_ADC1_OVFL_SHIFT
  91408. CS42XX8_STATUS_ADC2_OVFL_MASK
  91409. CS42XX8_STATUS_ADC2_OVFL_M_MASK
  91410. CS42XX8_STATUS_ADC2_OVFL_M_SHIFT
  91411. CS42XX8_STATUS_ADC2_OVFL_SHIFT
  91412. CS42XX8_STATUS_ADC3_OVFL_MASK
  91413. CS42XX8_STATUS_ADC3_OVFL_M_MASK
  91414. CS42XX8_STATUS_ADC3_OVFL_M_SHIFT
  91415. CS42XX8_STATUS_ADC3_OVFL_SHIFT
  91416. CS42XX8_STATUS_ADC_CLK_ERR_MASK
  91417. CS42XX8_STATUS_ADC_CLK_ERR_M_MASK
  91418. CS42XX8_STATUS_ADC_CLK_ERR_M_SHIFT
  91419. CS42XX8_STATUS_ADC_CLK_ERR_SHIFT
  91420. CS42XX8_STATUS_DAC_CLK_ERR_MASK
  91421. CS42XX8_STATUS_DAC_CLK_ERR_M_MASK
  91422. CS42XX8_STATUS_DAC_CLK_ERR_M_SHIFT
  91423. CS42XX8_STATUS_DAC_CLK_ERR_SHIFT
  91424. CS42XX8_TXCTL
  91425. CS42XX8_TXCTL_ADC_SNGVOL
  91426. CS42XX8_TXCTL_ADC_SNGVOL_MASK
  91427. CS42XX8_TXCTL_ADC_SNGVOL_SHIFT
  91428. CS42XX8_TXCTL_ADC_SZC_IC
  91429. CS42XX8_TXCTL_ADC_SZC_MASK
  91430. CS42XX8_TXCTL_ADC_SZC_SHIFT
  91431. CS42XX8_TXCTL_ADC_SZC_SR
  91432. CS42XX8_TXCTL_ADC_SZC_SRZC
  91433. CS42XX8_TXCTL_ADC_SZC_ZC
  91434. CS42XX8_TXCTL_AMUTE
  91435. CS42XX8_TXCTL_AMUTE_MASK
  91436. CS42XX8_TXCTL_AMUTE_SHIFT
  91437. CS42XX8_TXCTL_DAC_SNGVOL
  91438. CS42XX8_TXCTL_DAC_SNGVOL_MASK
  91439. CS42XX8_TXCTL_DAC_SNGVOL_SHIFT
  91440. CS42XX8_TXCTL_DAC_SZC_IC
  91441. CS42XX8_TXCTL_DAC_SZC_MASK
  91442. CS42XX8_TXCTL_DAC_SZC_SHIFT
  91443. CS42XX8_TXCTL_DAC_SZC_SR
  91444. CS42XX8_TXCTL_DAC_SZC_SRZC
  91445. CS42XX8_TXCTL_DAC_SZC_WIDTH
  91446. CS42XX8_TXCTL_DAC_SZC_ZC
  91447. CS42XX8_TXCTL_MUTE_ADC_SP
  91448. CS42XX8_TXCTL_MUTE_ADC_SP_MASK
  91449. CS42XX8_TXCTL_MUTE_ADC_SP_SHIFT
  91450. CS42XX8_VOLAIN1
  91451. CS42XX8_VOLAIN2
  91452. CS42XX8_VOLAIN3
  91453. CS42XX8_VOLAIN4
  91454. CS42XX8_VOLAIN5
  91455. CS42XX8_VOLAIN6
  91456. CS42XX8_VOLAOUT1
  91457. CS42XX8_VOLAOUT2
  91458. CS42XX8_VOLAOUT3
  91459. CS42XX8_VOLAOUT4
  91460. CS42XX8_VOLAOUT5
  91461. CS42XX8_VOLAOUT6
  91462. CS42XX8_VOLAOUT7
  91463. CS42XX8_VOLAOUT8
  91464. CS42l42_SPDIF_CH_SEL
  91465. CS43130_AC_FREQ
  91466. CS43130_ASP_3ST_MASK
  91467. CS43130_ASP_BITSIZE_MASK
  91468. CS43130_ASP_CH_1_LOC
  91469. CS43130_ASP_CH_1_SZ_EN
  91470. CS43130_ASP_CH_2_LOC
  91471. CS43130_ASP_CH_2_SZ_EN
  91472. CS43130_ASP_CLOCK_CONF
  91473. CS43130_ASP_DEN_1
  91474. CS43130_ASP_DEN_2
  91475. CS43130_ASP_DOP_DAI
  91476. CS43130_ASP_FRAME_CONF
  91477. CS43130_ASP_LRCK_HI_TIME_1
  91478. CS43130_ASP_LRCK_HI_TIME_2
  91479. CS43130_ASP_LRCK_PERIOD_1
  91480. CS43130_ASP_LRCK_PERIOD_2
  91481. CS43130_ASP_NUM_1
  91482. CS43130_ASP_NUM_2
  91483. CS43130_ASP_PCM_DAI
  91484. CS43130_ASP_SPRATE_176_4K
  91485. CS43130_ASP_SPRATE_192K
  91486. CS43130_ASP_SPRATE_32K
  91487. CS43130_ASP_SPRATE_352_8K
  91488. CS43130_ASP_SPRATE_384K
  91489. CS43130_ASP_SPRATE_44_1K
  91490. CS43130_ASP_SPRATE_48K
  91491. CS43130_ASP_SPRATE_88_2K
  91492. CS43130_ASP_SPRATE_96K
  91493. CS43130_CHIP_ID
  91494. CS43130_CH_BITSIZE_MASK
  91495. CS43130_CH_BIT_SIZE_16
  91496. CS43130_CH_BIT_SIZE_24
  91497. CS43130_CH_BIT_SIZE_32
  91498. CS43130_CH_BIT_SIZE_8
  91499. CS43130_CH_EN_MASK
  91500. CS43130_CH_EN_SHIFT
  91501. CS43130_CLASS_H_CTL
  91502. CS43130_CLKOUT_CTL
  91503. CS43130_CRYSTAL_SET
  91504. CS43130_DAI_ID_MAX
  91505. CS43130_DC_THRESHOLD
  91506. CS43130_DEVID_AB
  91507. CS43130_DEVID_CD
  91508. CS43130_DEVID_E
  91509. CS43130_DOP_FORMATS
  91510. CS43130_DSD_EN_SHIFT
  91511. CS43130_DSD_INT_CFG
  91512. CS43130_DSD_MASTER
  91513. CS43130_DSD_PATH_CTL_1
  91514. CS43130_DSD_PATH_CTL_2
  91515. CS43130_DSD_PATH_CTL_3
  91516. CS43130_DSD_PCM_MIX_CTL
  91517. CS43130_DSD_SPEED_MASK
  91518. CS43130_DSD_SPEED_SHIFT
  91519. CS43130_DSD_SRC_ASP
  91520. CS43130_DSD_SRC_DSD
  91521. CS43130_DSD_SRC_MASK
  91522. CS43130_DSD_SRC_SHIFT
  91523. CS43130_DSD_SRC_XSP
  91524. CS43130_DSD_VOL_A
  91525. CS43130_DSD_VOL_B
  91526. CS43130_DXD1
  91527. CS43130_DXD10
  91528. CS43130_DXD11
  91529. CS43130_DXD12
  91530. CS43130_DXD13
  91531. CS43130_DXD14
  91532. CS43130_DXD15
  91533. CS43130_DXD16
  91534. CS43130_DXD17
  91535. CS43130_DXD18
  91536. CS43130_DXD19
  91537. CS43130_DXD2
  91538. CS43130_DXD3
  91539. CS43130_DXD4
  91540. CS43130_DXD5
  91541. CS43130_DXD6
  91542. CS43130_DXD7
  91543. CS43130_DXD8
  91544. CS43130_DXD9
  91545. CS43130_FAB_ID
  91546. CS43130_FIRSTREG
  91547. CS43130_HPLOAD_AC_INT
  91548. CS43130_HPLOAD_AC_INT_SHIFT
  91549. CS43130_HPLOAD_AC_START
  91550. CS43130_HPLOAD_AC_START_SHIFT
  91551. CS43130_HPLOAD_CHN_SEL
  91552. CS43130_HPLOAD_CHN_SEL_SHIFT
  91553. CS43130_HPLOAD_DC_INT
  91554. CS43130_HPLOAD_DC_INT_SHIFT
  91555. CS43130_HPLOAD_DC_START
  91556. CS43130_HPLOAD_EN
  91557. CS43130_HPLOAD_EN_SHIFT
  91558. CS43130_HPLOAD_NO_DC_INT
  91559. CS43130_HPLOAD_NO_DC_INT_SHIFT
  91560. CS43130_HPLOAD_OFF_INT
  91561. CS43130_HPLOAD_OFF_INT_SHIFT
  91562. CS43130_HPLOAD_ON_INT
  91563. CS43130_HPLOAD_OOR_INT
  91564. CS43130_HPLOAD_OOR_INT_SHIFT
  91565. CS43130_HPLOAD_UNPLUG_INT
  91566. CS43130_HPLOAD_UNPLUG_INT_SHIFT
  91567. CS43130_HP_AC_STAT_1
  91568. CS43130_HP_AC_STAT_2
  91569. CS43130_HP_DC_STAT_1
  91570. CS43130_HP_DC_STAT_2
  91571. CS43130_HP_DETECT
  91572. CS43130_HP_DETECT_CTRL_MASK
  91573. CS43130_HP_DETECT_CTRL_SHIFT
  91574. CS43130_HP_DETECT_INV_MASK
  91575. CS43130_HP_DETECT_INV_SHIFT
  91576. CS43130_HP_IN_EN_MASK
  91577. CS43130_HP_IN_EN_SHIFT
  91578. CS43130_HP_LOAD_1
  91579. CS43130_HP_LOAD_STAT
  91580. CS43130_HP_MEAS_LOAD_1
  91581. CS43130_HP_MEAS_LOAD_1_SHIFT
  91582. CS43130_HP_MEAS_LOAD_2
  91583. CS43130_HP_MEAS_LOAD_2_SHIFT
  91584. CS43130_HP_MEAS_LOAD_MASK
  91585. CS43130_HP_OUT_CTL_1
  91586. CS43130_HP_PLUG_INT
  91587. CS43130_HP_PLUG_INT_SHIFT
  91588. CS43130_HP_STATUS
  91589. CS43130_HP_UNPLUG_INT
  91590. CS43130_HP_UNPLUG_INT_SHIFT
  91591. CS43130_INT_MASK_1
  91592. CS43130_INT_MASK_2
  91593. CS43130_INT_MASK_3
  91594. CS43130_INT_MASK_4
  91595. CS43130_INT_MASK_5
  91596. CS43130_INT_MASK_ALL
  91597. CS43130_INT_STATUS_1
  91598. CS43130_INT_STATUS_2
  91599. CS43130_INT_STATUS_3
  91600. CS43130_INT_STATUS_4
  91601. CS43130_INT_STATUS_5
  91602. CS43130_JACK_HEADPHONE
  91603. CS43130_JACK_LINEOUT
  91604. CS43130_JACK_MASK
  91605. CS43130_LASTREG
  91606. CS43130_LINEOUT_LOAD
  91607. CS43130_MCLK_22M
  91608. CS43130_MCLK_22P5
  91609. CS43130_MCLK_24M
  91610. CS43130_MCLK_24P5
  91611. CS43130_MCLK_INT_MASK
  91612. CS43130_MCLK_INT_SHIFT
  91613. CS43130_MCLK_SRC_EXT
  91614. CS43130_MCLK_SRC_PLL
  91615. CS43130_MCLK_SRC_RCO
  91616. CS43130_MCLK_SRC_SEL_MASK
  91617. CS43130_MCLK_SRC_SEL_SHIFT
  91618. CS43130_MIX_PCM_DSD_MASK
  91619. CS43130_MIX_PCM_DSD_SHIFT
  91620. CS43130_MIX_PCM_PREP_MASK
  91621. CS43130_MIX_PCM_PREP_SHIFT
  91622. CS43130_MUTE_EN
  91623. CS43130_MUTE_MASK
  91624. CS43130_NUM_INT
  91625. CS43130_NUM_SUPPLIES
  91626. CS43130_PAD_INT_CFG
  91627. CS43130_PCM_FILT_OPT
  91628. CS43130_PCM_FORMATS
  91629. CS43130_PCM_PATH_CTL_1
  91630. CS43130_PCM_PATH_CTL_2
  91631. CS43130_PCM_VOL_A
  91632. CS43130_PCM_VOL_B
  91633. CS43130_PDN_ASP_MASK
  91634. CS43130_PDN_ASP_SHIFT
  91635. CS43130_PDN_CLKOUT_MASK
  91636. CS43130_PDN_CLKOUT_SHIFT
  91637. CS43130_PDN_DSDIF_SHIFT
  91638. CS43130_PDN_DSPIF_MASK
  91639. CS43130_PDN_HP_MASK
  91640. CS43130_PDN_HP_SHIFT
  91641. CS43130_PDN_PLL_MASK
  91642. CS43130_PDN_PLL_SHIFT
  91643. CS43130_PDN_XSP_MASK
  91644. CS43130_PDN_XSP_SHIFT
  91645. CS43130_PDN_XTAL_MASK
  91646. CS43130_PDN_XTAL_SHIFT
  91647. CS43130_PLL_DIV_DATA_MASK
  91648. CS43130_PLL_DIV_FRAC_0_DATA_SHIFT
  91649. CS43130_PLL_DIV_FRAC_1_DATA_SHIFT
  91650. CS43130_PLL_DIV_FRAC_2_DATA_SHIFT
  91651. CS43130_PLL_MODE_MASK
  91652. CS43130_PLL_MODE_SHIFT
  91653. CS43130_PLL_RDY_INT
  91654. CS43130_PLL_RDY_INT_MASK
  91655. CS43130_PLL_RDY_INT_SHIFT
  91656. CS43130_PLL_REF_PREDIV_MASK
  91657. CS43130_PLL_SET_1
  91658. CS43130_PLL_SET_10
  91659. CS43130_PLL_SET_2
  91660. CS43130_PLL_SET_3
  91661. CS43130_PLL_SET_4
  91662. CS43130_PLL_SET_5
  91663. CS43130_PLL_SET_6
  91664. CS43130_PLL_SET_7
  91665. CS43130_PLL_SET_8
  91666. CS43130_PLL_SET_9
  91667. CS43130_PLL_START_MASK
  91668. CS43130_PWDN_CTL
  91669. CS43130_REV_ID
  91670. CS43130_SP_5050_MASK
  91671. CS43130_SP_5050_SHIFT
  91672. CS43130_SP_BITSIZE
  91673. CS43130_SP_BITSIZE_ASP_SHIFT
  91674. CS43130_SP_BIT_SIZE_16
  91675. CS43130_SP_BIT_SIZE_24
  91676. CS43130_SP_BIT_SIZE_32
  91677. CS43130_SP_BIT_SIZE_8
  91678. CS43130_SP_FSD_MASK
  91679. CS43130_SP_LCHI_DATA_MASK
  91680. CS43130_SP_LCHI_LSB_DATA_SHIFT
  91681. CS43130_SP_LCHI_MSB_DATA_SHIFT
  91682. CS43130_SP_LCPOL_IN_MASK
  91683. CS43130_SP_LCPOL_IN_SHIFT
  91684. CS43130_SP_LCPOL_OUT_MASK
  91685. CS43130_SP_LCPOL_OUT_SHIFT
  91686. CS43130_SP_LCPR_DATA_MASK
  91687. CS43130_SP_LCPR_LSB_DATA_SHIFT
  91688. CS43130_SP_LCPR_MSB_DATA_SHIFT
  91689. CS43130_SP_MODE_MASK
  91690. CS43130_SP_MODE_SHIFT
  91691. CS43130_SP_M_LSB_DATA_MASK
  91692. CS43130_SP_M_LSB_DATA_SHIFT
  91693. CS43130_SP_M_MSB_DATA_MASK
  91694. CS43130_SP_M_MSB_DATA_SHIFT
  91695. CS43130_SP_N_LSB_DATA_MASK
  91696. CS43130_SP_N_LSB_DATA_SHIFT
  91697. CS43130_SP_N_MSB_DATA_MASK
  91698. CS43130_SP_N_MSB_DATA_SHIFT
  91699. CS43130_SP_SCPOL_IN_MASK
  91700. CS43130_SP_SCPOL_IN_SHIFT
  91701. CS43130_SP_SCPOL_OUT_MASK
  91702. CS43130_SP_SCPOL_OUT_SHIFT
  91703. CS43130_SP_SRATE
  91704. CS43130_SP_STP_MASK
  91705. CS43130_SP_STP_SHIFT
  91706. CS43130_SUBREV_ID
  91707. CS43130_SYS_CLK_CTL_1
  91708. CS43130_XSP_3ST_MASK
  91709. CS43130_XSP_BITSIZE_MASK
  91710. CS43130_XSP_BITSIZE_SHIFT
  91711. CS43130_XSP_CH_1_LOC
  91712. CS43130_XSP_CH_1_SZ_EN
  91713. CS43130_XSP_CH_2_LOC
  91714. CS43130_XSP_CH_2_SZ_EN
  91715. CS43130_XSP_CLOCK_CONF
  91716. CS43130_XSP_DEN_1
  91717. CS43130_XSP_DEN_2
  91718. CS43130_XSP_DOP_DAI
  91719. CS43130_XSP_DSD_DAI
  91720. CS43130_XSP_FRAME_CONF
  91721. CS43130_XSP_LRCK_HI_TIME_1
  91722. CS43130_XSP_LRCK_HI_TIME_2
  91723. CS43130_XSP_LRCK_PERIOD_1
  91724. CS43130_XSP_LRCK_PERIOD_2
  91725. CS43130_XSP_NUM_1
  91726. CS43130_XSP_NUM_2
  91727. CS43130_XTAL_ERR_INT
  91728. CS43130_XTAL_ERR_INT_SHIFT
  91729. CS43130_XTAL_IBIAS_12_5UA
  91730. CS43130_XTAL_IBIAS_15UA
  91731. CS43130_XTAL_IBIAS_7_5UA
  91732. CS43130_XTAL_IBIAS_MASK
  91733. CS43130_XTAL_RDY_INT
  91734. CS43130_XTAL_RDY_INT_MASK
  91735. CS43130_XTAL_RDY_INT_SHIFT
  91736. CS43130_XTAL_UNUSED
  91737. CS43131_CHIP_ID
  91738. CS43198_CHIP_ID
  91739. CS4341_MODE2_DIF
  91740. CS4341_MODE2_DIF_I2S_16
  91741. CS4341_MODE2_DIF_I2S_24
  91742. CS4341_MODE2_DIF_LJ_24
  91743. CS4341_MODE2_DIF_RJ_16
  91744. CS4341_MODE2_DIF_RJ_24
  91745. CS4341_REG_MIX
  91746. CS4341_REG_MODE1
  91747. CS4341_REG_MODE2
  91748. CS4341_REG_VOLA
  91749. CS4341_REG_VOLB
  91750. CS4341_VOLX_MUTE
  91751. CS4349_CHIPID
  91752. CS4349_I2C_INCR
  91753. CS4349_MISC
  91754. CS4349_MODE
  91755. CS4349_MUTE
  91756. CS4349_PCM_FORMATS
  91757. CS4349_PCM_RATES
  91758. CS4349_REVA
  91759. CS4349_REVB
  91760. CS4349_REVC2
  91761. CS4349_RMPFLT
  91762. CS4349_VMI
  91763. CS4349_VOLA
  91764. CS4349_VOLB
  91765. CS4362A_AMUTE
  91766. CS4362A_ATAPI_A_L
  91767. CS4362A_ATAPI_A_LR
  91768. CS4362A_ATAPI_A_MUTE
  91769. CS4362A_ATAPI_A_R
  91770. CS4362A_ATAPI_B_L
  91771. CS4362A_ATAPI_B_LR
  91772. CS4362A_ATAPI_B_MUTE
  91773. CS4362A_ATAPI_B_R
  91774. CS4362A_ATAPI_MASK
  91775. CS4362A_ATAPI_MIX_LR_VOL
  91776. CS4362A_A_EQ_B
  91777. CS4362A_CPEN
  91778. CS4362A_DAC1_DIS
  91779. CS4362A_DAC2_DIS
  91780. CS4362A_DAC3_DIS
  91781. CS4362A_DEM_32000
  91782. CS4362A_DEM_44100
  91783. CS4362A_DEM_48000
  91784. CS4362A_DEM_MASK
  91785. CS4362A_DEM_NONE
  91786. CS4362A_DIF_I2S
  91787. CS4362A_DIF_LJUST
  91788. CS4362A_DIF_MASK
  91789. CS4362A_DIF_RJUST_16
  91790. CS4362A_DIF_RJUST_18
  91791. CS4362A_DIF_RJUST_20
  91792. CS4362A_DIF_RJUST_24
  91793. CS4362A_FILT_SEL
  91794. CS4362A_FM_DOUBLE
  91795. CS4362A_FM_DSD
  91796. CS4362A_FM_MASK
  91797. CS4362A_FM_QUAD
  91798. CS4362A_FM_SINGLE
  91799. CS4362A_FREEZE
  91800. CS4362A_INV_A1
  91801. CS4362A_INV_A2
  91802. CS4362A_INV_A3
  91803. CS4362A_INV_B1
  91804. CS4362A_INV_B2
  91805. CS4362A_INV_B3
  91806. CS4362A_MCLKDIV
  91807. CS4362A_MUTE
  91808. CS4362A_MUTEC_1
  91809. CS4362A_MUTEC_3
  91810. CS4362A_MUTEC_6
  91811. CS4362A_MUTEC_MASK
  91812. CS4362A_MUTEC_POL
  91813. CS4362A_PART_CS4362A
  91814. CS4362A_PART_MASK
  91815. CS4362A_PDN
  91816. CS4362A_REV_MASK
  91817. CS4362A_RMP_DN
  91818. CS4362A_RMP_UP
  91819. CS4362A_SNGLVOL
  91820. CS4362A_SOFT_RAMP
  91821. CS4362A_VOL_MASK
  91822. CS4362A_ZERO_CROSS
  91823. CS4382_CREV
  91824. CS4382_FC
  91825. CS4382_IC
  91826. CS4382_MC1
  91827. CS4382_MC2
  91828. CS4382_MC3
  91829. CS4382_VCA1
  91830. CS4382_VCA2
  91831. CS4382_VCA3
  91832. CS4382_VCA4
  91833. CS4382_VCB1
  91834. CS4382_VCB2
  91835. CS4382_VCB3
  91836. CS4382_VCB4
  91837. CS4382_XC1
  91838. CS4382_XC2
  91839. CS4382_XC3
  91840. CS4382_XC4
  91841. CS4398_ATAPI_A_L
  91842. CS4398_ATAPI_A_LR
  91843. CS4398_ATAPI_A_MUTE
  91844. CS4398_ATAPI_A_R
  91845. CS4398_ATAPI_B_L
  91846. CS4398_ATAPI_B_LR
  91847. CS4398_ATAPI_B_MUTE
  91848. CS4398_ATAPI_B_R
  91849. CS4398_ATAPI_MASK
  91850. CS4398_ATAPI_MIX_LR_VOL
  91851. CS4398_CPEN
  91852. CS4398_DAMUTE
  91853. CS4398_DEM_32000
  91854. CS4398_DEM_44100
  91855. CS4398_DEM_48000
  91856. CS4398_DEM_MASK
  91857. CS4398_DEM_NONE
  91858. CS4398_DIF_I2S
  91859. CS4398_DIF_LJUST
  91860. CS4398_DIF_MASK
  91861. CS4398_DIF_RJUST_16
  91862. CS4398_DIF_RJUST_18
  91863. CS4398_DIF_RJUST_20
  91864. CS4398_DIF_RJUST_24
  91865. CS4398_DIR_DSD
  91866. CS4398_DSD_PM_EN
  91867. CS4398_DSD_PM_MODE
  91868. CS4398_DSD_SRC
  91869. CS4398_FILT_SEL
  91870. CS4398_FM_DOUBLE
  91871. CS4398_FM_DSD
  91872. CS4398_FM_MASK
  91873. CS4398_FM_QUAD
  91874. CS4398_FM_SINGLE
  91875. CS4398_FREEZE
  91876. CS4398_INVALID_DSD
  91877. CS4398_INVERT_A
  91878. CS4398_INVERT_B
  91879. CS4398_MCLKDIV2
  91880. CS4398_MCLKDIV3
  91881. CS4398_MUTEC_A_EQ_B
  91882. CS4398_MUTEP_AUTO
  91883. CS4398_MUTEP_HIGH
  91884. CS4398_MUTEP_LOW
  91885. CS4398_MUTEP_MASK
  91886. CS4398_MUTE_A
  91887. CS4398_MUTE_B
  91888. CS4398_PAMUTE
  91889. CS4398_PART_CS4398
  91890. CS4398_PART_MASK
  91891. CS4398_PDN
  91892. CS4398_REV_MASK
  91893. CS4398_RMP_DN
  91894. CS4398_RMP_UP
  91895. CS4398_SOFT_RAMP
  91896. CS4398_STATIC_DSD
  91897. CS4398_VOL_A_MASK
  91898. CS4398_VOL_B_EQ_A
  91899. CS4398_VOL_B_MASK
  91900. CS4398_ZERO_CROSS
  91901. CS4399_CHIP_ID
  91902. CS46XX_BA0_SIZE
  91903. CS46XX_BA1_DATA0_SIZE
  91904. CS46XX_BA1_DATA1_SIZE
  91905. CS46XX_BA1_PRG_SIZE
  91906. CS46XX_BA1_REG_SIZE
  91907. CS46XX_DSP_CAPTURE_CHANNEL
  91908. CS46XX_DSP_MODULES
  91909. CS46XX_FRAGS
  91910. CS46XX_MAX_PERIOD_SIZE
  91911. CS46XX_MIN_PERIOD_SIZE
  91912. CS46XX_MIXER_SPDIF_INPUT_ELEMENT
  91913. CS46XX_MIXER_SPDIF_OUTPUT_ELEMENT
  91914. CS46XX_MODE_INPUT
  91915. CS46XX_MODE_OUTPUT
  91916. CS46XX_PRIMARY_CODEC_INDEX
  91917. CS46XX_SECONDARY_CODEC_INDEX
  91918. CS46XX_SECONDARY_CODEC_OFFSET
  91919. CS47L15
  91920. CS47L15_ADC_INT_BIAS
  91921. CS47L15_ADC_INT_BIAS_MASK
  91922. CS47L15_ADC_INT_BIAS_SHIFT
  91923. CS47L15_DIG_VU
  91924. CS47L15_MONO_OUTPUTS
  91925. CS47L15_NG_SRC
  91926. CS47L15_NUM_ADSP
  91927. CS47L15_NUM_GPIOS
  91928. CS47L15_PGA_BIAS_SEL
  91929. CS47L15_PGA_BIAS_SEL_MASK
  91930. CS47L15_PGA_BIAS_SEL_SHIFT
  91931. CS47L15_SILICON_ID
  91932. CS47L24
  91933. CS47L24_DIG_VU
  91934. CS47L24_FLL1
  91935. CS47L24_FLL1_REFCLK
  91936. CS47L24_FLL2
  91937. CS47L24_FLL2_REFCLK
  91938. CS47L24_FORMATS
  91939. CS47L24_MAX_REGISTER
  91940. CS47L24_NG_SRC
  91941. CS47L24_NUM_ISR
  91942. CS47L24_RATES
  91943. CS47L35
  91944. CS47L35_DIG_VU
  91945. CS47L35_DMIC_REF_MICBIAS1B
  91946. CS47L35_DMIC_REF_MICBIAS2A
  91947. CS47L35_DMIC_REF_MICBIAS2B
  91948. CS47L35_FLL1_GPIO_CLOCK
  91949. CS47L35_FLL1_SPREAD_SPECTRUM
  91950. CS47L35_FLL1_SYNCHRONISER_1
  91951. CS47L35_FLL1_SYNCHRONISER_2
  91952. CS47L35_FLL1_SYNCHRONISER_3
  91953. CS47L35_FLL1_SYNCHRONISER_4
  91954. CS47L35_FLL1_SYNCHRONISER_5
  91955. CS47L35_FLL1_SYNCHRONISER_6
  91956. CS47L35_FLL1_SYNCHRONISER_7
  91957. CS47L35_FLL_SYNCHRONISER_OFFS
  91958. CS47L35_MONO_OUTPUTS
  91959. CS47L35_NG_SRC
  91960. CS47L35_NUM_ADSP
  91961. CS47L35_NUM_GPIOS
  91962. CS47L35_OTP_HPDET_CAL_1
  91963. CS47L35_OTP_HPDET_CAL_2
  91964. CS47L35_SILICON_ID
  91965. CS47L85
  91966. CS47L85_MONO_OUTPUTS
  91967. CS47L85_NG_SRC
  91968. CS47L85_NUM_ADSP
  91969. CS47L85_NUM_GPIOS
  91970. CS47L85_OTP_HPDET_CAL_1
  91971. CS47L85_OTP_HPDET_CAL_2
  91972. CS47L85_RXANC_INPUT_ROUTES
  91973. CS47L85_RXANC_OUTPUT_ROUTES
  91974. CS47L85_SILICON_ID
  91975. CS47L90
  91976. CS47L90_DIG_VU
  91977. CS47L90_MONO_OUTPUTS
  91978. CS47L90_NG_SRC
  91979. CS47L90_NUM_ADSP
  91980. CS47L90_NUM_GPIOS
  91981. CS47L90_RXANC_INPUT_ROUTES
  91982. CS47L90_RXANC_OUTPUT_ROUTES
  91983. CS47L90_SILICON_ID
  91984. CS47L91
  91985. CS47L92
  91986. CS47L92_AIF3TX5MIX_INPUT_1_SOURCE
  91987. CS47L92_AIF3TX5MIX_INPUT_1_VOLUME
  91988. CS47L92_AIF3TX5MIX_INPUT_2_SOURCE
  91989. CS47L92_AIF3TX5MIX_INPUT_2_VOLUME
  91990. CS47L92_AIF3TX5MIX_INPUT_3_SOURCE
  91991. CS47L92_AIF3TX5MIX_INPUT_3_VOLUME
  91992. CS47L92_AIF3TX5MIX_INPUT_4_SOURCE
  91993. CS47L92_AIF3TX5MIX_INPUT_4_VOLUME
  91994. CS47L92_AIF3TX6MIX_INPUT_1_SOURCE
  91995. CS47L92_AIF3TX6MIX_INPUT_1_VOLUME
  91996. CS47L92_AIF3TX6MIX_INPUT_2_SOURCE
  91997. CS47L92_AIF3TX6MIX_INPUT_2_VOLUME
  91998. CS47L92_AIF3TX6MIX_INPUT_3_SOURCE
  91999. CS47L92_AIF3TX6MIX_INPUT_3_VOLUME
  92000. CS47L92_AIF3TX6MIX_INPUT_4_SOURCE
  92001. CS47L92_AIF3TX6MIX_INPUT_4_VOLUME
  92002. CS47L92_AIF3TX7MIX_INPUT_1_SOURCE
  92003. CS47L92_AIF3TX7MIX_INPUT_1_VOLUME
  92004. CS47L92_AIF3TX7MIX_INPUT_2_SOURCE
  92005. CS47L92_AIF3TX7MIX_INPUT_2_VOLUME
  92006. CS47L92_AIF3TX7MIX_INPUT_3_SOURCE
  92007. CS47L92_AIF3TX7MIX_INPUT_3_VOLUME
  92008. CS47L92_AIF3TX7MIX_INPUT_4_SOURCE
  92009. CS47L92_AIF3TX7MIX_INPUT_4_VOLUME
  92010. CS47L92_AIF3TX8MIX_INPUT_1_SOURCE
  92011. CS47L92_AIF3TX8MIX_INPUT_1_VOLUME
  92012. CS47L92_AIF3TX8MIX_INPUT_2_SOURCE
  92013. CS47L92_AIF3TX8MIX_INPUT_2_VOLUME
  92014. CS47L92_AIF3TX8MIX_INPUT_3_SOURCE
  92015. CS47L92_AIF3TX8MIX_INPUT_3_VOLUME
  92016. CS47L92_AIF3TX8MIX_INPUT_4_SOURCE
  92017. CS47L92_AIF3TX8MIX_INPUT_4_VOLUME
  92018. CS47L92_DIG_VU
  92019. CS47L92_FLL1_CONTROL_10
  92020. CS47L92_FLL1_CONTROL_7
  92021. CS47L92_FLL1_CONTROL_8
  92022. CS47L92_FLL1_CONTROL_9
  92023. CS47L92_FLL1_GPIO_CLOCK
  92024. CS47L92_FLL1_REFCLK_SRC_MASK
  92025. CS47L92_FLL1_REFCLK_SRC_SHIFT
  92026. CS47L92_FLL1_REFCLK_SRC_WIDTH
  92027. CS47L92_FLL2_CONTROL_10
  92028. CS47L92_FLL2_CONTROL_7
  92029. CS47L92_FLL2_CONTROL_8
  92030. CS47L92_FLL2_CONTROL_9
  92031. CS47L92_FLL2_GPIO_CLOCK
  92032. CS47L92_MONO_OUTPUTS
  92033. CS47L92_NG_SRC
  92034. CS47L92_NUM_ADSP
  92035. CS47L92_NUM_GPIOS
  92036. CS47L92_SILICON_ID
  92037. CS47L93
  92038. CS4BCR
  92039. CS4WCR
  92040. CS4_ACCESS_REG
  92041. CS4_ADDR_REG
  92042. CS4_CNFG_REG
  92043. CS4_CS8900_MMIO_START
  92044. CS4_MARK
  92045. CS4_MASK_REG
  92046. CS4_N
  92047. CS4__MARK
  92048. CS5
  92049. CS5345_IN_1
  92050. CS5345_IN_2
  92051. CS5345_IN_3
  92052. CS5345_IN_4
  92053. CS5345_IN_5
  92054. CS5345_IN_6
  92055. CS5345_IN_MIC
  92056. CS5345_MCLK_1
  92057. CS5345_MCLK_1_5
  92058. CS5345_MCLK_2
  92059. CS5345_MCLK_3
  92060. CS5345_MCLK_4
  92061. CS53L30_ADC1A_AFE_CTL
  92062. CS53L30_ADC1A_DIG_VOL
  92063. CS53L30_ADC1A_OVFL
  92064. CS53L30_ADC1B_AFE_CTL
  92065. CS53L30_ADC1B_DIG_VOL
  92066. CS53L30_ADC1B_OVFL
  92067. CS53L30_ADC1_CTL3
  92068. CS53L30_ADC1_NG_CTL
  92069. CS53L30_ADC2A_AFE_CTL
  92070. CS53L30_ADC2A_DIG_VOL
  92071. CS53L30_ADC2A_OVFL
  92072. CS53L30_ADC2B_AFE_CTL
  92073. CS53L30_ADC2B_DIG_VOL
  92074. CS53L30_ADC2B_OVFL
  92075. CS53L30_ADC2_CTL3
  92076. CS53L30_ADC2_NG_CTL
  92077. CS53L30_ADCDMIC1_CTL1
  92078. CS53L30_ADCDMIC1_CTL2
  92079. CS53L30_ADCDMIC1_CTL2_DEFAULT
  92080. CS53L30_ADCDMIC2_CTL1
  92081. CS53L30_ADCDMIC2_CTL2
  92082. CS53L30_ADCDMICx_CTL1_DEFAULT
  92083. CS53L30_ADCDMICx_PDN_MASK
  92084. CS53L30_ADCxA_DIG_BOOST
  92085. CS53L30_ADCxA_DIG_BOOST_MASK
  92086. CS53L30_ADCxA_DIG_BOOST_SHIFT
  92087. CS53L30_ADCxA_INV
  92088. CS53L30_ADCxA_INV_MASK
  92089. CS53L30_ADCxA_INV_SHIFT
  92090. CS53L30_ADCxA_NG
  92091. CS53L30_ADCxA_NG_MASK
  92092. CS53L30_ADCxA_NG_SHIFT
  92093. CS53L30_ADCxA_PDN
  92094. CS53L30_ADCxA_PDN_MASK
  92095. CS53L30_ADCxA_PDN_SHIFT
  92096. CS53L30_ADCxB_DIG_BOOST
  92097. CS53L30_ADCxB_DIG_BOOST_MASK
  92098. CS53L30_ADCxB_DIG_BOOST_SHIFT
  92099. CS53L30_ADCxB_INV
  92100. CS53L30_ADCxB_INV_MASK
  92101. CS53L30_ADCxB_INV_SHIFT
  92102. CS53L30_ADCxB_NG
  92103. CS53L30_ADCxB_NG_MASK
  92104. CS53L30_ADCxB_NG_SHIFT
  92105. CS53L30_ADCxB_PDN
  92106. CS53L30_ADCxB_PDN_MASK
  92107. CS53L30_ADCxB_PDN_SHIFT
  92108. CS53L30_ADCx_CTL3_DEFAULT
  92109. CS53L30_ADCx_HPF_CF_120HZ
  92110. CS53L30_ADCx_HPF_CF_1HZ86
  92111. CS53L30_ADCx_HPF_CF_235HZ
  92112. CS53L30_ADCx_HPF_CF_466HZ
  92113. CS53L30_ADCx_HPF_CF_MASK
  92114. CS53L30_ADCx_HPF_CF_SHIFT
  92115. CS53L30_ADCx_HPF_CF_WIDTH
  92116. CS53L30_ADCx_HPF_EN
  92117. CS53L30_ADCx_HPF_EN_MASK
  92118. CS53L30_ADCx_HPF_EN_SHIFT
  92119. CS53L30_ADCx_NG_ALL
  92120. CS53L30_ADCx_NG_ALL_MASK
  92121. CS53L30_ADCx_NG_ALL_SHIFT
  92122. CS53L30_ADCx_NG_BOOST
  92123. CS53L30_ADCx_NG_BOOST_MASK
  92124. CS53L30_ADCx_NG_BOOST_SHIFT
  92125. CS53L30_ADCx_NG_CTL_DEFAULT
  92126. CS53L30_ADCx_NG_DELAY_MASK
  92127. CS53L30_ADCx_NG_DELAY_SHIFT
  92128. CS53L30_ADCx_NG_DELAY_WIDTH
  92129. CS53L30_ADCx_NG_THRESH_MASK
  92130. CS53L30_ADCx_NG_THRESH_SHIFT
  92131. CS53L30_ADCx_NG_THRESH_WIDTH
  92132. CS53L30_ADCx_NOTCH_DIS
  92133. CS53L30_ADCx_NOTCH_DIS_MASK
  92134. CS53L30_ADCx_NOTCH_DIS_SHIFT
  92135. CS53L30_ADCxy_AFE_CTL_DEFAULT
  92136. CS53L30_ADCxy_DIG_VOL_DEFAULT
  92137. CS53L30_ADCxy_PGA_VOL_MASK
  92138. CS53L30_ADCxy_PGA_VOL_SHIFT
  92139. CS53L30_ADCxy_PGA_VOL_WIDTH
  92140. CS53L30_ADCxy_PREAMP_MASK
  92141. CS53L30_ADCxy_PREAMP_SHIFT
  92142. CS53L30_ADCxy_PREAMP_WIDTH
  92143. CS53L30_ADCxy_VOL_MUTE
  92144. CS53L30_ASPCFG_CTL
  92145. CS53L30_ASPCFG_CTL_DEFAULT
  92146. CS53L30_ASP_3ST
  92147. CS53L30_ASP_3ST_MASK
  92148. CS53L30_ASP_3ST_SHIFT
  92149. CS53L30_ASP_CHx_TX_LOC
  92150. CS53L30_ASP_CHx_TX_LOC_MASK
  92151. CS53L30_ASP_CHx_TX_LOC_MAX
  92152. CS53L30_ASP_CHx_TX_LOC_SHIFT
  92153. CS53L30_ASP_CHx_TX_LOC_WIDTH
  92154. CS53L30_ASP_CHx_TX_STATE
  92155. CS53L30_ASP_CHx_TX_STATE_MASK
  92156. CS53L30_ASP_CHx_TX_STATE_SHIFT
  92157. CS53L30_ASP_CTL1
  92158. CS53L30_ASP_CTL1_DEFAULT
  92159. CS53L30_ASP_CTL2
  92160. CS53L30_ASP_CTL2_DEFAULT
  92161. CS53L30_ASP_MS
  92162. CS53L30_ASP_MS_MASK
  92163. CS53L30_ASP_MS_SHIFT
  92164. CS53L30_ASP_RATE_48K
  92165. CS53L30_ASP_RATE_MASK
  92166. CS53L30_ASP_RATE_SHIFT
  92167. CS53L30_ASP_RATE_WIDTH
  92168. CS53L30_ASP_SCLK_INV
  92169. CS53L30_ASP_SCLK_INV_MASK
  92170. CS53L30_ASP_SCLK_INV_SHIFT
  92171. CS53L30_ASP_SDOUTx_DRIVE
  92172. CS53L30_ASP_SDOUTx_DRIVE_MASK
  92173. CS53L30_ASP_SDOUTx_DRIVE_SHIFT
  92174. CS53L30_ASP_SDOUTx_PDN
  92175. CS53L30_ASP_SDOUTx_PDN_MASK
  92176. CS53L30_ASP_SDOUTx_PDN_SHIFT
  92177. CS53L30_ASP_TDMTX_CTL
  92178. CS53L30_ASP_TDMTX_CTL1
  92179. CS53L30_ASP_TDMTX_CTL2
  92180. CS53L30_ASP_TDMTX_CTL3
  92181. CS53L30_ASP_TDMTX_CTL4
  92182. CS53L30_ASP_TDMTX_CTLx_DEFAULT
  92183. CS53L30_ASP_TDMTX_EN1
  92184. CS53L30_ASP_TDMTX_EN2
  92185. CS53L30_ASP_TDMTX_EN3
  92186. CS53L30_ASP_TDMTX_EN4
  92187. CS53L30_ASP_TDMTX_EN5
  92188. CS53L30_ASP_TDMTX_EN6
  92189. CS53L30_ASP_TDMTX_ENn
  92190. CS53L30_ASP_TDMTX_ENx
  92191. CS53L30_ASP_TDMTX_ENx_DEFAULT
  92192. CS53L30_ASP_TDMTX_ENx_MAX
  92193. CS53L30_ASP_TDM_PDN
  92194. CS53L30_ASP_TDM_PDN_MASK
  92195. CS53L30_ASP_TDM_PDN_SHIFT
  92196. CS53L30_CH_TYPE
  92197. CS53L30_CH_TYPE_MASK
  92198. CS53L30_CH_TYPE_SHIFT
  92199. CS53L30_DEVICE_INT_MASK
  92200. CS53L30_DEVID
  92201. CS53L30_DEVID_AB
  92202. CS53L30_DEVID_CD
  92203. CS53L30_DEVID_E
  92204. CS53L30_DIGSFT
  92205. CS53L30_DIGSFT_MASK
  92206. CS53L30_DIGSFT_SHIFT
  92207. CS53L30_DISCHARGE_FILT
  92208. CS53L30_DISCHARGE_FILT_MASK
  92209. CS53L30_DISCHARGE_FILT_SHIFT
  92210. CS53L30_DMIC1_STR_CTL
  92211. CS53L30_DMIC1_STR_CTL_DEFAULT
  92212. CS53L30_DMIC2_STR_CTL
  92213. CS53L30_DMIC2_STR_CTL_DEFAULT
  92214. CS53L30_DMIC_DRIVE
  92215. CS53L30_DMIC_DRIVE_MASK
  92216. CS53L30_DMIC_DRIVE_SHIFT
  92217. CS53L30_DMICx_PDN
  92218. CS53L30_DMICx_PDN_MASK
  92219. CS53L30_DMICx_PDN_SHIFT
  92220. CS53L30_DMICx_SCLK_DIV
  92221. CS53L30_DMICx_SCLK_DIV_MASK
  92222. CS53L30_DMICx_SCLK_DIV_SHIFT
  92223. CS53L30_DMICx_STEREO_ENB
  92224. CS53L30_DMICx_STEREO_ENB_MASK
  92225. CS53L30_DMICx_STEREO_ENB_SHIFT
  92226. CS53L30_FORMATS
  92227. CS53L30_IN1M_BIAS_MASK
  92228. CS53L30_IN1M_BIAS_OPEN
  92229. CS53L30_IN1M_BIAS_PULL_DOWN
  92230. CS53L30_IN1M_BIAS_SHIFT
  92231. CS53L30_IN1M_BIAS_VCM
  92232. CS53L30_IN1M_BIAS_WIDTH
  92233. CS53L30_IN1P_BIAS_MASK
  92234. CS53L30_IN1P_BIAS_OPEN
  92235. CS53L30_IN1P_BIAS_PULL_DOWN
  92236. CS53L30_IN1P_BIAS_SHIFT
  92237. CS53L30_IN1P_BIAS_VCM
  92238. CS53L30_IN1P_BIAS_WIDTH
  92239. CS53L30_IN2M_BIAS_MASK
  92240. CS53L30_IN2M_BIAS_OPEN
  92241. CS53L30_IN2M_BIAS_PULL_DOWN
  92242. CS53L30_IN2M_BIAS_SHIFT
  92243. CS53L30_IN2M_BIAS_VCM
  92244. CS53L30_IN2M_BIAS_WIDTH
  92245. CS53L30_IN2P_BIAS_MASK
  92246. CS53L30_IN2P_BIAS_OPEN
  92247. CS53L30_IN2P_BIAS_PULL_DOWN
  92248. CS53L30_IN2P_BIAS_SHIFT
  92249. CS53L30_IN2P_BIAS_VCM
  92250. CS53L30_IN2P_BIAS_WIDTH
  92251. CS53L30_IN3M_BIAS_MASK
  92252. CS53L30_IN3M_BIAS_OPEN
  92253. CS53L30_IN3M_BIAS_PULL_DOWN
  92254. CS53L30_IN3M_BIAS_SHIFT
  92255. CS53L30_IN3M_BIAS_VCM
  92256. CS53L30_IN3M_BIAS_WIDTH
  92257. CS53L30_IN3P_BIAS_MASK
  92258. CS53L30_IN3P_BIAS_OPEN
  92259. CS53L30_IN3P_BIAS_PULL_DOWN
  92260. CS53L30_IN3P_BIAS_SHIFT
  92261. CS53L30_IN3P_BIAS_VCM
  92262. CS53L30_IN3P_BIAS_WIDTH
  92263. CS53L30_IN4M_BIAS_MASK
  92264. CS53L30_IN4M_BIAS_OPEN
  92265. CS53L30_IN4M_BIAS_PULL_DOWN
  92266. CS53L30_IN4M_BIAS_SHIFT
  92267. CS53L30_IN4M_BIAS_VCM
  92268. CS53L30_IN4M_BIAS_WIDTH
  92269. CS53L30_IN4P_BIAS_MASK
  92270. CS53L30_IN4P_BIAS_OPEN
  92271. CS53L30_IN4P_BIAS_PULL_DOWN
  92272. CS53L30_IN4P_BIAS_SHIFT
  92273. CS53L30_IN4P_BIAS_VCM
  92274. CS53L30_IN4P_BIAS_WIDTH
  92275. CS53L30_INBIAS_CTL1
  92276. CS53L30_INBIAS_CTL1_DEFAULT
  92277. CS53L30_INBIAS_CTL2
  92278. CS53L30_INBIAS_CTL2_DEFAULT
  92279. CS53L30_INTRNL_FS_RATIO
  92280. CS53L30_INTRNL_FS_RATIO_MASK
  92281. CS53L30_INTRNL_FS_RATIO_SHIFT
  92282. CS53L30_INT_MASK
  92283. CS53L30_INT_SR_CTL
  92284. CS53L30_INT_SR_CTL_DEFAULT
  92285. CS53L30_IS
  92286. CS53L30_LRCK_50_NPW
  92287. CS53L30_LRCK_50_NPW_MASK
  92288. CS53L30_LRCK_50_NPW_SHIFT
  92289. CS53L30_LRCK_CTL1
  92290. CS53L30_LRCK_CTL2
  92291. CS53L30_LRCK_CTLx_DEFAULT
  92292. CS53L30_LRCK_TPWH
  92293. CS53L30_LRCK_TPWH_MASK
  92294. CS53L30_LRCK_TPWH_SHIFT
  92295. CS53L30_LRCK_TPWH_WIDTH
  92296. CS53L30_MAX_REGISTER
  92297. CS53L30_MCLKCTL
  92298. CS53L30_MCLKCTL_DEFAULT
  92299. CS53L30_MCLK_19MHZ_EN
  92300. CS53L30_MCLK_19MHZ_EN_MASK
  92301. CS53L30_MCLK_19MHZ_EN_SHIFT
  92302. CS53L30_MCLK_DIS
  92303. CS53L30_MCLK_DIS_MASK
  92304. CS53L30_MCLK_DIS_SHIFT
  92305. CS53L30_MCLK_DIV_BY_1
  92306. CS53L30_MCLK_DIV_BY_2
  92307. CS53L30_MCLK_DIV_BY_3
  92308. CS53L30_MCLK_DIV_MASK
  92309. CS53L30_MCLK_DIV_SHIFT
  92310. CS53L30_MCLK_DIV_WIDTH
  92311. CS53L30_MCLK_INT_SCALE
  92312. CS53L30_MCLK_INT_SCALE_MASK
  92313. CS53L30_MCLK_INT_SCALE_SHIFT
  92314. CS53L30_MIC1_BIAS_PDN
  92315. CS53L30_MIC1_BIAS_PDN_MASK
  92316. CS53L30_MIC1_BIAS_PDN_SHIFT
  92317. CS53L30_MIC2_BIAS_PDN
  92318. CS53L30_MIC2_BIAS_PDN_MASK
  92319. CS53L30_MIC2_BIAS_PDN_SHIFT
  92320. CS53L30_MIC3_BIAS_PDN
  92321. CS53L30_MIC3_BIAS_PDN_MASK
  92322. CS53L30_MIC3_BIAS_PDN_SHIFT
  92323. CS53L30_MIC4_BIAS_PDN
  92324. CS53L30_MIC4_BIAS_PDN_MASK
  92325. CS53L30_MIC4_BIAS_PDN_SHIFT
  92326. CS53L30_MICBIAS_CTL
  92327. CS53L30_MICBIAS_CTL_DEFAULT
  92328. CS53L30_MIC_BIAS_CTRL_1V8
  92329. CS53L30_MIC_BIAS_CTRL_2V75
  92330. CS53L30_MIC_BIAS_CTRL_HIZ
  92331. CS53L30_MIC_BIAS_CTRL_MASK
  92332. CS53L30_MIC_BIAS_CTRL_SHIFT
  92333. CS53L30_MIC_BIAS_CTRL_WIDTH
  92334. CS53L30_MICx_BIAS_PDN
  92335. CS53L30_MUTEP_CTL1
  92336. CS53L30_MUTEP_CTL1_DEFAULT
  92337. CS53L30_MUTEP_CTL1_MUTEALL
  92338. CS53L30_MUTEP_CTL2
  92339. CS53L30_MUTEP_CTL2_DEFAULT
  92340. CS53L30_MUTE_ADC1A_PDN
  92341. CS53L30_MUTE_ADC1A_PDN_MASK
  92342. CS53L30_MUTE_ADC1A_PDN_SHIFT
  92343. CS53L30_MUTE_ADC1B_PDN
  92344. CS53L30_MUTE_ADC1B_PDN_MASK
  92345. CS53L30_MUTE_ADC1B_PDN_SHIFT
  92346. CS53L30_MUTE_ADC2A_PDN
  92347. CS53L30_MUTE_ADC2A_PDN_MASK
  92348. CS53L30_MUTE_ADC2A_PDN_SHIFT
  92349. CS53L30_MUTE_ADC2B_PDN
  92350. CS53L30_MUTE_ADC2B_PDN_MASK
  92351. CS53L30_MUTE_ADC2B_PDN_SHIFT
  92352. CS53L30_MUTE_ASP_SDOUT1_PDN
  92353. CS53L30_MUTE_ASP_SDOUT1_PDN_MASK
  92354. CS53L30_MUTE_ASP_SDOUT1_PDN_SHIFT
  92355. CS53L30_MUTE_ASP_SDOUT2_PDN
  92356. CS53L30_MUTE_ASP_SDOUT2_PDN_MASK
  92357. CS53L30_MUTE_ASP_SDOUT2_PDN_SHIFT
  92358. CS53L30_MUTE_ASP_SDOUTx_PDN
  92359. CS53L30_MUTE_ASP_SDOUTx_PDN_MASK
  92360. CS53L30_MUTE_ASP_SDOUTx_PDN_SHIFT
  92361. CS53L30_MUTE_ASP_TDM_PDN
  92362. CS53L30_MUTE_ASP_TDM_PDN_MASK
  92363. CS53L30_MUTE_ASP_TDM_PDN_SHIFT
  92364. CS53L30_MUTE_M1B_PDN
  92365. CS53L30_MUTE_M1B_PDN_MASK
  92366. CS53L30_MUTE_M1B_PDN_SHIFT
  92367. CS53L30_MUTE_M2B_PDN
  92368. CS53L30_MUTE_M2B_PDN_MASK
  92369. CS53L30_MUTE_M2B_PDN_SHIFT
  92370. CS53L30_MUTE_M3B_PDN
  92371. CS53L30_MUTE_M3B_PDN_MASK
  92372. CS53L30_MUTE_M3B_PDN_SHIFT
  92373. CS53L30_MUTE_M4B_PDN
  92374. CS53L30_MUTE_M4B_PDN_MASK
  92375. CS53L30_MUTE_M4B_PDN_SHIFT
  92376. CS53L30_MUTE_MB_ALL_PDN
  92377. CS53L30_MUTE_MB_ALL_PDN_MASK
  92378. CS53L30_MUTE_MB_ALL_PDN_SHIFT
  92379. CS53L30_MUTE_MxB_PDN
  92380. CS53L30_MUTE_MxB_PDN_MASK
  92381. CS53L30_MUTE_MxB_PDN_SHIFT
  92382. CS53L30_MUTE_PDN_LP
  92383. CS53L30_MUTE_PDN_LP_MASK
  92384. CS53L30_MUTE_PDN_LP_SHIFT
  92385. CS53L30_MUTE_PDN_ULP
  92386. CS53L30_MUTE_PDN_ULP_MASK
  92387. CS53L30_MUTE_PDN_ULP_SHIFT
  92388. CS53L30_MUTE_PIN
  92389. CS53L30_MUTE_PIN_POLARITY
  92390. CS53L30_MUTE_PIN_POLARITY_MASK
  92391. CS53L30_MUTE_PIN_POLARITY_SHIFT
  92392. CS53L30_NUM_SUPPLIES
  92393. CS53L30_PDN_DONE
  92394. CS53L30_PDN_LP
  92395. CS53L30_PDN_LP_MASK
  92396. CS53L30_PDN_LP_SHIFT
  92397. CS53L30_PDN_POLL_MAX
  92398. CS53L30_PDN_ULP
  92399. CS53L30_PDN_ULP_MASK
  92400. CS53L30_PDN_ULP_SHIFT
  92401. CS53L30_PWRCTL
  92402. CS53L30_PWRCTL_DEFAULT
  92403. CS53L30_RATES
  92404. CS53L30_REVID
  92405. CS53L30_SFT_RAMP
  92406. CS53L30_SFT_RMP_DEFAULT
  92407. CS53L30_SHIFT_LEFT
  92408. CS53L30_SHIFT_LEFT_MASK
  92409. CS53L30_SHIFT_LEFT_SHIFT
  92410. CS53L30_SYNC_DONE
  92411. CS53L30_SYNC_EN
  92412. CS53L30_SYNC_EN_MASK
  92413. CS53L30_SYNC_EN_SHIFT
  92414. CS53L30_TDM_SLOT_MAX
  92415. CS53L30_THMS_PDN
  92416. CS53L30_THMS_PDN_MASK
  92417. CS53L30_THMS_PDN_SHIFT
  92418. CS53L30_THMS_TRIP
  92419. CS53L30_VP_MIN
  92420. CS53L30_VP_MIN_MASK
  92421. CS53L30_VP_MIN_SHIFT
  92422. CS53L32A_IN0
  92423. CS53L32A_IN1
  92424. CS53L32A_IN2
  92425. CS5529_CFG_AOUT
  92426. CS5529_CFG_CALIB
  92427. CS5529_CFG_CALIB_BOTH_SELF
  92428. CS5529_CFG_CALIB_GAIN_SELF
  92429. CS5529_CFG_CALIB_GAIN_SYS
  92430. CS5529_CFG_CALIB_NONE
  92431. CS5529_CFG_CALIB_OFFSET_SELF
  92432. CS5529_CFG_CALIB_OFFSET_SYS
  92433. CS5529_CFG_DONE_FLAG
  92434. CS5529_CFG_DOUT
  92435. CS5529_CFG_LOW_PWR_MODE
  92436. CS5529_CFG_PORT_FLAG
  92437. CS5529_CFG_PWR_SAVE_SEL
  92438. CS5529_CFG_REG
  92439. CS5529_CFG_RESET
  92440. CS5529_CFG_RESET_VALID
  92441. CS5529_CFG_UNIPOLAR
  92442. CS5529_CFG_WORD_RATE
  92443. CS5529_CFG_WORD_RATE_1092
  92444. CS5529_CFG_WORD_RATE_17444
  92445. CS5529_CFG_WORD_RATE_2180
  92446. CS5529_CFG_WORD_RATE_324
  92447. CS5529_CFG_WORD_RATE_388
  92448. CS5529_CFG_WORD_RATE_4364
  92449. CS5529_CFG_WORD_RATE_532
  92450. CS5529_CFG_WORD_RATE_8724
  92451. CS5529_CFG_WORD_RATE_MASK
  92452. CS5529_CMD_CB
  92453. CS5529_CMD_CONT_CONV
  92454. CS5529_CMD_PWR_SAVE
  92455. CS5529_CMD_READ
  92456. CS5529_CMD_REG
  92457. CS5529_CMD_REG_MASK
  92458. CS5529_CMD_SINGLE_CONV
  92459. CS5529_CONV_DATA_REG
  92460. CS5529_GAIN_REG
  92461. CS5529_OFFSET_REG
  92462. CS5529_SETUP_REG
  92463. CS5530_BAD_PIO
  92464. CS5530_BASEREG
  92465. CS5530_CRCSIG_TFT_TV
  92466. CS5530_DCFG_16_BIT_EN
  92467. CS5530_DCFG_CRT_HSYNC_POL
  92468. CS5530_DCFG_CRT_SYNC_SKW_INIT
  92469. CS5530_DCFG_CRT_SYNC_SKW_MASK
  92470. CS5530_DCFG_CRT_VSYNC_POL
  92471. CS5530_DCFG_DAC_BL_EN
  92472. CS5530_DCFG_DAC_PWR_EN
  92473. CS5530_DCFG_DDC_OE
  92474. CS5530_DCFG_DDC_SCL
  92475. CS5530_DCFG_DDC_SDA
  92476. CS5530_DCFG_DIS_EN
  92477. CS5530_DCFG_FP_DATA_EN
  92478. CS5530_DCFG_FP_DITH_EN
  92479. CS5530_DCFG_FP_HSYNC_POL
  92480. CS5530_DCFG_FP_PWR_EN
  92481. CS5530_DCFG_FP_VSYNC_POL
  92482. CS5530_DCFG_GV_PAL_BYP
  92483. CS5530_DCFG_HSYNC_EN
  92484. CS5530_DCFG_PWR_SEQ_DLY_INIT
  92485. CS5530_DCFG_PWR_SEQ_DLY_MASK
  92486. CS5530_DCFG_VG_CK
  92487. CS5530_DCFG_VSYNC_EN
  92488. CS5530_DCFG_XGA_FP
  92489. CS5530_DISPLAY_CONFIG
  92490. CS5530_DOT_CLK_CONFIG
  92491. CS5530_PALETTE_ADDRESS
  92492. CS5530_PALETTE_DATA
  92493. CS5530_VCFG_16_BIT_4_2_0
  92494. CS5530_VCFG_16_BIT_EN
  92495. CS5530_VCFG_4_2_0_MODE
  92496. CS5530_VCFG_8_BIT_4_2_0
  92497. CS5530_VCFG_CSC_BYPASS
  92498. CS5530_VCFG_EARLY_VID_RDY
  92499. CS5530_VCFG_GV_SEL
  92500. CS5530_VCFG_HIGH_SPD_INT
  92501. CS5530_VCFG_INIT_READ_MASK
  92502. CS5530_VCFG_LINE_SIZE_LOWER_MASK
  92503. CS5530_VCFG_LINE_SIZE_UPPER
  92504. CS5530_VCFG_VID_EN
  92505. CS5530_VCFG_VID_INP_FORMAT
  92506. CS5530_VCFG_VID_REG_UPDATE
  92507. CS5530_VCFG_X_FILTER_EN
  92508. CS5530_VCFG_Y_FILTER_EN
  92509. CS5530_VIDEO_COLOR_KEY
  92510. CS5530_VIDEO_COLOR_MASK
  92511. CS5530_VIDEO_CONFIG
  92512. CS5530_VIDEO_SCALE
  92513. CS5530_VIDEO_X_POS
  92514. CS5530_VIDEO_Y_POS
  92515. CS5535AUDIO_DESC_LIST_SIZE
  92516. CS5535AUDIO_DMA_CAPTURE
  92517. CS5535AUDIO_DMA_PLAYBACK
  92518. CS5535AUDIO_MAX_DESCRIPTORS
  92519. CS5535_BAD_DMA
  92520. CS5535_BAD_PIO
  92521. CS5535_CABLE_DETECT
  92522. CS5536_ACC_CLASS_CODE
  92523. CS5536_ACC_DEVICE_ID
  92524. CS5536_ACC_FUNC
  92525. CS5536_ACC_INTR
  92526. CS5536_ACC_LENGTH
  92527. CS5536_ACC_MSR_BASE
  92528. CS5536_ACC_RANGE
  92529. CS5536_ACC_SUB_ID
  92530. CS5536_ACPI_LENGTH
  92531. CS5536_ACPI_RANGE
  92532. CS5536_DIVIL_MSR_BASE
  92533. CS5536_EHCI_CLASS_CODE
  92534. CS5536_EHCI_DEVICE_ID
  92535. CS5536_EHCI_FUNC
  92536. CS5536_EHCI_LENGTH
  92537. CS5536_EHCI_RANGE
  92538. CS5536_EHCI_SUB_ID
  92539. CS5536_FUNC_END
  92540. CS5536_FUNC_START
  92541. CS5536_GLCP_MSR_BASE
  92542. CS5536_GLIU_MSR_BASE
  92543. CS5536_GPIOM6_PME_EN
  92544. CS5536_GPIOM6_PME_FLAG
  92545. CS5536_GPIOM7_PME_EN
  92546. CS5536_GPIOM7_PME_FLAG
  92547. CS5536_GPIO_LENGTH
  92548. CS5536_GPIO_RANGE
  92549. CS5536_IDE_CLASS_CODE
  92550. CS5536_IDE_DEVICE_ID
  92551. CS5536_IDE_FLASH_SIGNATURE
  92552. CS5536_IDE_FUNC
  92553. CS5536_IDE_INTR
  92554. CS5536_IDE_LENGTH
  92555. CS5536_IDE_MSR_BASE
  92556. CS5536_IDE_RANGE
  92557. CS5536_IDE_SUB_ID
  92558. CS5536_ILLEGAL_MSR_BASE
  92559. CS5536_IRQ_LENGTH
  92560. CS5536_IRQ_RANGE
  92561. CS5536_ISA_CLASS_CODE
  92562. CS5536_ISA_DEVICE_ID
  92563. CS5536_ISA_FUNC
  92564. CS5536_ISA_SUB_ID
  92565. CS5536_MFGPT_INTR
  92566. CS5536_MFGPT_LENGTH
  92567. CS5536_MFGPT_RANGE
  92568. CS5536_OHCI_CLASS_CODE
  92569. CS5536_OHCI_DEVICE_ID
  92570. CS5536_OHCI_FUNC
  92571. CS5536_OHCI_LENGTH
  92572. CS5536_OHCI_RANGE
  92573. CS5536_OHCI_SUB_ID
  92574. CS5536_PIC_INT_SEL1
  92575. CS5536_PIC_INT_SEL2
  92576. CS5536_PM1_CNT
  92577. CS5536_PM1_EN
  92578. CS5536_PM1_STS
  92579. CS5536_PMS_LENGTH
  92580. CS5536_PMS_RANGE
  92581. CS5536_PM_GPE0_EN
  92582. CS5536_PM_GPE0_STS
  92583. CS5536_PM_IN_SLPCTL
  92584. CS5536_PM_PWRBTN
  92585. CS5536_PM_RTC
  92586. CS5536_PM_SCLK
  92587. CS5536_PM_SSC
  92588. CS5536_PM_WKD
  92589. CS5536_PM_WKXD
  92590. CS5536_PWRBTN_FLAG
  92591. CS5536_RTC_FLAG
  92592. CS5536_SB_MSR_BASE
  92593. CS5536_SMB_LENGTH
  92594. CS5536_SMB_RANGE
  92595. CS5536_SUB_VENDOR_ID
  92596. CS5536_UART1_INTR
  92597. CS5536_UART2_INTR
  92598. CS5536_UNUSED_MSR_BASE
  92599. CS5536_USB_INTR
  92600. CS5536_USB_MSR_BASE
  92601. CS5536_VENDOR_ID
  92602. CS5536_WAK_FLAG
  92603. CS5ABCR
  92604. CS5AWCR
  92605. CS5A_CE2A_MARK
  92606. CS5A_PORT105_MARK
  92607. CS5A_PORT19_MARK
  92608. CS5A__MARK
  92609. CS5BBCR
  92610. CS5BCR
  92611. CS5BCR_D
  92612. CS5BWCR
  92613. CS5B_CE1A_MARK
  92614. CS5B_MARK
  92615. CS5B__MARK
  92616. CS5CE1A_MARK
  92617. CS5PCR
  92618. CS5PCR_D
  92619. CS5WCR
  92620. CS5WCR_D
  92621. CS5_ACCESS_REG
  92622. CS5_ADDR_REG
  92623. CS5_BASE
  92624. CS5_CE1A_MARK
  92625. CS5_CNFG_REG
  92626. CS5_EXT_ADDR_REG
  92627. CS5_MARK
  92628. CS5_MASK_REG
  92629. CS6
  92630. CS6ABCR
  92631. CS6AWCR
  92632. CS6A_CE2B
  92633. CS6A_CE2B_MARK
  92634. CS6A_MARK
  92635. CS6A__MARK
  92636. CS6BBCR
  92637. CS6BWCR
  92638. CS6B_CE1B_LCDCS2
  92639. CS6B_CE1B_MARK
  92640. CS6B__MARK
  92641. CS6CE1B_MARK
  92642. CS6_CE1B_MARK
  92643. CS6_MARK
  92644. CS7
  92645. CS7_MARK
  92646. CS8
  92647. CS8415_CTRL1
  92648. CS8415_CTRL2
  92649. CS8415_C_BUFFER
  92650. CS8415_ID
  92651. CS8415_QSUB
  92652. CS8415_RATIO
  92653. CS8416_01_CS
  92654. CS8416_CSB0
  92655. CS8416_CSB1
  92656. CS8416_CSB2
  92657. CS8416_CSB3
  92658. CS8416_CSB4
  92659. CS8416_FORMAT_DETECT
  92660. CS8416_RUN
  92661. CS8416_VERSION
  92662. CS8420_01_CS
  92663. CS8420_23_CS
  92664. CS8420_45_CS
  92665. CS8420_67_CS
  92666. CS8420_CLOCK_SRC_CTL
  92667. CS8420_CSB0
  92668. CS8420_CSB1
  92669. CS8420_CSB2
  92670. CS8420_CSB3
  92671. CS8420_CSB4
  92672. CS8420_DATA_FLOW_CTL
  92673. CS8420_RECEIVER_ERRORS
  92674. CS8420_SRC_RATIO
  92675. CS8420_VERSION
  92676. CS8427_ADDR
  92677. CS8427_AESBP
  92678. CS8427_AUDIO
  92679. CS8427_AUXMASK
  92680. CS8427_AUXSHIFT
  92681. CS8427_BASE_ADDR
  92682. CS8427_BIP
  92683. CS8427_BSEL
  92684. CS8427_CAM
  92685. CS8427_CBMR
  92686. CS8427_CCRC
  92687. CS8427_CHS
  92688. CS8427_CLK256
  92689. CS8427_CLK384
  92690. CS8427_CLK512
  92691. CS8427_CLKMASK
  92692. CS8427_CONF
  92693. CS8427_COPY
  92694. CS8427_DETC
  92695. CS8427_DETCI
  92696. CS8427_DETU
  92697. CS8427_DETUI
  92698. CS8427_EFTC
  92699. CS8427_EFTCI
  92700. CS8427_EFTU
  92701. CS8427_EFTUI
  92702. CS8427_EXTCLOCK
  92703. CS8427_EXTCLOCKRESET
  92704. CS8427_HOLDLASTSAMPLE
  92705. CS8427_HOLDMASK
  92706. CS8427_HOLDNOCHANGE
  92707. CS8427_HOLDZERO
  92708. CS8427_IDMASK
  92709. CS8427_IDSHIFT
  92710. CS8427_INC
  92711. CS8427_INTACTHIGH
  92712. CS8427_INTACTLOW
  92713. CS8427_INTMASK
  92714. CS8427_INTMODEFALLINGLSB
  92715. CS8427_INTMODEFALLINGMSB
  92716. CS8427_INTMODELEVELLSB
  92717. CS8427_INTMODELEVELMSB
  92718. CS8427_INTMODERESINGLSB
  92719. CS8427_INTMODERISINGMSB
  92720. CS8427_INTOPENDRAIN
  92721. CS8427_MMR
  92722. CS8427_MMT
  92723. CS8427_MMTCS
  92724. CS8427_MMTLR
  92725. CS8427_MUTEAES
  92726. CS8427_MUTESAO
  92727. CS8427_ORIG
  92728. CS8427_OSLIP
  92729. CS8427_OUTC
  92730. CS8427_PAR
  92731. CS8427_PRO
  92732. CS8427_QCH
  92733. CS8427_QCRC
  92734. CS8427_REG_AUTOINC
  92735. CS8427_REG_CLOCKSOURCE
  92736. CS8427_REG_CONTROL1
  92737. CS8427_REG_CONTROL2
  92738. CS8427_REG_CORU_DATABUF
  92739. CS8427_REG_CSDATABUF
  92740. CS8427_REG_DATAFLOW
  92741. CS8427_REG_ID_AND_VER
  92742. CS8427_REG_INT1MASK
  92743. CS8427_REG_INT1MODELSB
  92744. CS8427_REG_INT1MODEMSB
  92745. CS8427_REG_INT1STATUS
  92746. CS8427_REG_INT2MASK
  92747. CS8427_REG_INT2MODELSB
  92748. CS8427_REG_INT2MODEMSB
  92749. CS8427_REG_INT2STATUS
  92750. CS8427_REG_OMCKRMCKRATIO
  92751. CS8427_REG_QSUBCODE
  92752. CS8427_REG_RECVCSDATA
  92753. CS8427_REG_RECVERRMASK
  92754. CS8427_REG_RECVERRORS
  92755. CS8427_REG_SERIALINPUT
  92756. CS8427_REG_SERIALOUTPUT
  92757. CS8427_REG_UDATABUF
  92758. CS8427_RERR
  92759. CS8427_RMCKF
  92760. CS8427_RUN
  92761. CS8427_RXDAES3INPUT
  92762. CS8427_RXDILRCK
  92763. CS8427_RXDMASK
  92764. CS8427_SIDEL
  92765. CS8427_SIJUST
  92766. CS8427_SILRPOL
  92767. CS8427_SIMS
  92768. CS8427_SIRES16
  92769. CS8427_SIRES20
  92770. CS8427_SIRES24
  92771. CS8427_SIRESMASK
  92772. CS8427_SISF
  92773. CS8427_SISPOL
  92774. CS8427_SODEL
  92775. CS8427_SOJUST
  92776. CS8427_SOLRPOL
  92777. CS8427_SOMS
  92778. CS8427_SORES16
  92779. CS8427_SORES20
  92780. CS8427_SORES24
  92781. CS8427_SORESDIRECT
  92782. CS8427_SORESMASK
  92783. CS8427_SOSF
  92784. CS8427_SOSPOL
  92785. CS8427_SPDAES3RECEIVER
  92786. CS8427_SPDMASK
  92787. CS8427_SPDSERIAL
  92788. CS8427_SWCLK
  92789. CS8427_TCBLDIR
  92790. CS8427_TSLIP
  92791. CS8427_TXAES3DRECEIVER
  92792. CS8427_TXDMASK
  92793. CS8427_TXDSERIAL
  92794. CS8427_TXOFF
  92795. CS8427_UBMBLOCK
  92796. CS8427_UBMMASK
  92797. CS8427_UBMZEROS
  92798. CS8427_UD
  92799. CS8427_UNLOCK
  92800. CS8427_V
  92801. CS8427_VER8427A
  92802. CS8427_VERMASK
  92803. CS8427_VERSHIFT
  92804. CS8427_VSET
  92805. CS8900
  92806. CS8900_IRQ_MAP
  92807. CS8920
  92808. CS8920M
  92809. CS8920_NO_INTS
  92810. CSA
  92811. CSA0
  92812. CSA0_ADDR
  92813. CSA1
  92814. CSA1_ADDR
  92815. CSA2
  92816. CSA2_ADDR
  92817. CSA3
  92818. CSA3_ADDR
  92819. CSAC
  92820. CSACC_DIF_TH
  92821. CSADRCFG0
  92822. CSADRCFG1
  92823. CSADRCFG2
  92824. CSADRCFG3
  92825. CSAR_MASK
  92826. CSAR_RD
  92827. CSAR_SHIFT
  92828. CSAR_WR
  92829. CSA_AC_MASK
  92830. CSA_AC_SHIFT
  92831. CSA_ADDR
  92832. CSA_AM_MASK
  92833. CSA_AM_SHIFT
  92834. CSA_BSW
  92835. CSA_BUSW
  92836. CSA_EN
  92837. CSA_FLASH
  92838. CSA_GAIN_1x
  92839. CSA_GAIN_4x
  92840. CSA_GAIN_8x
  92841. CSA_GAIN_LSB_nV
  92842. CSA_GAIN_OFFS_RAW
  92843. CSA_RO
  92844. CSA_SIZ_MASK
  92845. CSA_SIZ_SHIFT
  92846. CSA_WAIT_MASK
  92847. CSA_WAIT_SHIFT
  92848. CSA_WS_MASK
  92849. CSA_WS_SHIFT
  92850. CSB
  92851. CSB0
  92852. CSB0_ADDR
  92853. CSB1
  92854. CSB1_ADDR
  92855. CSB2
  92856. CSB2_ADDR
  92857. CSB3
  92858. CSB3_ADDR
  92859. CSB5_FCR
  92860. CSB5_FCR_DECODE_ALL
  92861. CSB726_FLASH_SIZE
  92862. CSB726_FLASH_uMON
  92863. CSB726_GPIO_IRQ_LAN
  92864. CSB726_GPIO_IRQ_SM501
  92865. CSB726_GPIO_MMC_DETECT
  92866. CSB726_GPIO_MMC_RO
  92867. CSB726_H
  92868. CSB726_IRQ_LAN
  92869. CSB726_IRQ_SM501
  92870. CSBUFFER
  92871. CSBUFPERR
  92872. CSB_10MHZ
  92873. CSB_20MHZ
  92874. CSB_40MHZ
  92875. CSB_AC_MASK
  92876. CSB_AC_SHIFT
  92877. CSB_ADDR
  92878. CSB_ALIGN
  92879. CSB_AM_MASK
  92880. CSB_AM_SHIFT
  92881. CSB_BSW
  92882. CSB_BUSW
  92883. CSB_CC_ABORT
  92884. CSB_CC_CHAIN
  92885. CSB_CC_CRC_MISMATCH
  92886. CSB_CC_DATA_LENGTH
  92887. CSB_CC_DDE_OVERFLOW
  92888. CSB_CC_DECRYPT_OVERFLOW
  92889. CSB_CC_EXCEED_BYTE_COUNT
  92890. CSB_CC_EXCESSIVE_DDE
  92891. CSB_CC_HW
  92892. CSB_CC_HW_EXPIRED_TIMER
  92893. CSB_CC_HYP_HANG_ABORTED
  92894. CSB_CC_HYP_NO_HW
  92895. CSB_CC_HYP_RESERVE_END
  92896. CSB_CC_HYP_RESERVE_NO_INTR_SERVER
  92897. CSB_CC_HYP_RESERVE_P9_END
  92898. CSB_CC_HYP_RESERVE_START
  92899. CSB_CC_INTERNAL
  92900. CSB_CC_INVALID_ALIGN
  92901. CSB_CC_INVALID_CRB
  92902. CSB_CC_INVALID_DDE
  92903. CSB_CC_INVALID_OPERAND
  92904. CSB_CC_MINV_OVERFLOW
  92905. CSB_CC_NOSPC
  92906. CSB_CC_OPERAND_OVERLAP
  92907. CSB_CC_PRIVILEGE
  92908. CSB_CC_PROGRESS_POINT
  92909. CSB_CC_PROTECTION
  92910. CSB_CC_PROTECTION_DUP1
  92911. CSB_CC_PROTECTION_DUP2
  92912. CSB_CC_PROTECTION_DUP3
  92913. CSB_CC_PROTECTION_DUP4
  92914. CSB_CC_PROTECTION_DUP5
  92915. CSB_CC_PROTECTION_DUP6
  92916. CSB_CC_PROVISION
  92917. CSB_CC_RD_EXTERNAL
  92918. CSB_CC_RD_EXTERNAL_DUP1
  92919. CSB_CC_RD_EXTERNAL_DUP2
  92920. CSB_CC_RD_EXTERNAL_DUP3
  92921. CSB_CC_SEGMENTED_DDL
  92922. CSB_CC_SEQUENCE
  92923. CSB_CC_SESSION
  92924. CSB_CC_SUCCESS
  92925. CSB_CC_TEMPL_INVALID
  92926. CSB_CC_TEMPL_OVERFLOW
  92927. CSB_CC_TPBC_GT_SPBC
  92928. CSB_CC_TRANSLATION
  92929. CSB_CC_TRANSLATION_DUP1
  92930. CSB_CC_TRANSLATION_DUP2
  92931. CSB_CC_TRANSLATION_DUP3
  92932. CSB_CC_TRANSLATION_DUP4
  92933. CSB_CC_TRANSLATION_DUP5
  92934. CSB_CC_TRANSLATION_DUP6
  92935. CSB_CC_TRANSPORT
  92936. CSB_CC_UNKNOWN_CODE
  92937. CSB_CC_WR_EXTERNAL
  92938. CSB_CC_WR_PROTECTION
  92939. CSB_CC_WR_TRANSLATION
  92940. CSB_CE_INCOMPLETE
  92941. CSB_CE_TERMINATION
  92942. CSB_CE_TPBC
  92943. CSB_CH
  92944. CSB_COMPLETE
  92945. CSB_EN
  92946. CSB_ERR
  92947. CSB_ERR_ADDR
  92948. CSB_F
  92949. CSB_FLASH
  92950. CSB_MASK
  92951. CSB_NOP
  92952. CSB_PAGE_OFFSET
  92953. CSB_PAGE_OFFSET_MASK
  92954. CSB_PAGE_SELECT
  92955. CSB_PAGE_SELECT_MASK
  92956. CSB_PAGE_SELECT_SHIFT
  92957. CSB_PREEMPT
  92958. CSB_PROMOTE
  92959. CSB_RO
  92960. CSB_ROP
  92961. CSB_SHIFT
  92962. CSB_SIZE
  92963. CSB_SIZ_MASK
  92964. CSB_SIZ_SHIFT
  92965. CSB_SOP
  92966. CSB_UPSIZ_MASK
  92967. CSB_UPSIZ_SHIFT
  92968. CSB_V
  92969. CSB_WAIT_MASK
  92970. CSB_WAIT_MAX
  92971. CSB_WAIT_SHIFT
  92972. CSB_WS_MASK
  92973. CSB_WS_SHIFT
  92974. CSC
  92975. CSC0
  92976. CSC01
  92977. CSC02
  92978. CSC03
  92979. CSC04
  92980. CSC05
  92981. CSC0_ADDR
  92982. CSC1
  92983. CSC1_ADDR
  92984. CSC2
  92985. CSC2_ADDR
  92986. CSC3
  92987. CSC3_ADDR
  92988. CSCAN_TLV_TYPE_SSID_IE
  92989. CSCCTL
  92990. CSCDR
  92991. CSCDState
  92992. CSCD_INIT
  92993. CSCD_SAVED
  92994. CSCD_SET
  92995. CSCIF0_CTS
  92996. CSCIF0_RTS
  92997. CSCIF0_RX
  92998. CSCIF0_SCK
  92999. CSCIF0_TX
  93000. CSCIF1_CTS
  93001. CSCIF1_RTS
  93002. CSCIF1_RX
  93003. CSCIF1_SCK
  93004. CSCIF1_TX
  93005. CSCIR
  93006. CSCLR
  93007. CSCM0
  93008. CSCM1
  93009. CSCM2
  93010. CSCM3
  93011. CSCM4
  93012. CSCM5
  93013. CSCM6
  93014. CSCM7
  93015. CSCMR1_FIXUP
  93016. CSCNTL_ADDR_WIDTH
  93017. CSCNTL_DATA_WIDTH
  93018. CSCNTL_TYPE
  93019. CSCNTL_TYPE_EVENT
  93020. CSCNTL_TYPE_PRIVATE
  93021. CSCNTL_TYPE_STATE
  93022. CSCNTL_TYPE_TG
  93023. CSCNTL_TYPE_WIDTH
  93024. CSCONFIG_CLKTRISTATE
  93025. CSCONFIG_DFBYPASS
  93026. CSCONFIG_ENCODE
  93027. CSCONFIG_GLFORCE
  93028. CSCONFIG_LED1
  93029. CSCONFIG_LED4
  93030. CSCONFIG_NDISABLE
  93031. CSCONFIG_RENABLE
  93032. CSCONFIG_RESV1
  93033. CSCONFIG_RESV2
  93034. CSCONFIG_RESV3
  93035. CSCONFIG_RESV4
  93036. CSCONFIG_TCDISABLE
  93037. CSCONFIG_TCVDISAB
  93038. CSCR
  93039. CSCRATCH
  93040. CSCRATCHPAGE
  93041. CSCRBits
  93042. CSCR_LINK_STATUS
  93043. CSCR_LinkChangeBit
  93044. CSCR_LinkDownCmd
  93045. CSCR_LinkDownOffCmd
  93046. CSCR_LinkOKBit
  93047. CSCR_LinkStatusBits
  93048. CSC_10BIT_OFFSET
  93049. CSC_A0_MASK
  93050. CSC_A0_SHIFT
  93051. CSC_A1_MASK
  93052. CSC_A1_SHIFT
  93053. CSC_A2_MASK
  93054. CSC_A2_SHIFT
  93055. CSC_AC_MASK
  93056. CSC_AC_SHIFT
  93057. CSC_ADDR
  93058. CSC_AM_MASK
  93059. CSC_AM_SHIFT
  93060. CSC_B0_MASK
  93061. CSC_B0_SHIFT
  93062. CSC_B1_MASK
  93063. CSC_B1_SHIFT
  93064. CSC_B2_MASK
  93065. CSC_B2_SHIFT
  93066. CSC_BASE
  93067. CSC_BLACK_SCREEN_OFFSET
  93068. CSC_BSW
  93069. CSC_BT2020_IMAGE_RGB2YCBCR
  93070. CSC_BT2020_IMAGE_YCBCR2RGB
  93071. CSC_BT2020_VIDEO_RGB2YCBCR
  93072. CSC_BT2020_VIDEO_YCBCR2RGB
  93073. CSC_BT601_IMAGE_RGB2YCBCR
  93074. CSC_BT601_IMAGE_YCBCR2RGB
  93075. CSC_BT601_VIDEO_RGB2YCBCR
  93076. CSC_BT601_VIDEO_YCBCR2RGB
  93077. CSC_BT709_IMAGE_RGB2YCBCR
  93078. CSC_BT709_IMAGE_YCBCR2RGB
  93079. CSC_BT709_VIDEO_RGB2YCBCR
  93080. CSC_BT709_VIDEO_YCBCR2RGB
  93081. CSC_BUSW
  93082. CSC_BYPASS
  93083. CSC_C0_MASK
  93084. CSC_C0_SHIFT
  93085. CSC_C1_MASK
  93086. CSC_C1_SHIFT
  93087. CSC_C2_MASK
  93088. CSC_C2_SHIFT
  93089. CSC_COEFFS_GRAPHICS_RANGE_R2Y
  93090. CSC_COEFFS_GRAPHICS_RANGE_Y2R
  93091. CSC_COEFFS_VIDEO_RANGE_R2Y
  93092. CSC_COEFFS_VIDEO_RANGE_Y2R
  93093. CSC_COLOR_MODE_GRAPHICS_BYPASS
  93094. CSC_COLOR_MODE_GRAPHICS_OUTPUT_CSC
  93095. CSC_COLOR_MODE_GRAPHICS_PREDEFINED
  93096. CSC_CONSTANTS
  93097. CSC_CONSTANTS_B_MASK
  93098. CSC_CONSTANTS_G_MASK
  93099. CSC_CONSTANTS_R_MASK
  93100. CSC_CONSTANTS_Y_MASK
  93101. CSC_CONTROL
  93102. CSC_CONTROL_BYTE_ORDER
  93103. CSC_CONTROL_DESTINATION_FORMAT_MASK
  93104. CSC_CONTROL_DESTINATION_FORMAT_RGB565
  93105. CSC_CONTROL_DESTINATION_FORMAT_RGB8888
  93106. CSC_CONTROL_HORIZONTAL_FILTER
  93107. CSC_CONTROL_SOURCE_FORMAT_IYU1
  93108. CSC_CONTROL_SOURCE_FORMAT_IYU2
  93109. CSC_CONTROL_SOURCE_FORMAT_MASK
  93110. CSC_CONTROL_SOURCE_FORMAT_RGB565
  93111. CSC_CONTROL_SOURCE_FORMAT_RGB8888
  93112. CSC_CONTROL_SOURCE_FORMAT_YUV420
  93113. CSC_CONTROL_SOURCE_FORMAT_YUV420I
  93114. CSC_CONTROL_SOURCE_FORMAT_YUV422
  93115. CSC_CONTROL_SOURCE_FORMAT_YVU9
  93116. CSC_CONTROL_STATUS
  93117. CSC_CONTROL_VERTICAL_FILTER
  93118. CSC_COV_MODE_MASK
  93119. CSC_COV_MODE_SHIFT
  93120. CSC_CSC00
  93121. CSC_CSC01
  93122. CSC_CSC02
  93123. CSC_CSC03
  93124. CSC_CSC04
  93125. CSC_CSC05
  93126. CSC_CTRL0
  93127. CSC_D0_MASK
  93128. CSC_D0_SHIFT
  93129. CSC_D1_MASK
  93130. CSC_D1_SHIFT
  93131. CSC_D2_MASK
  93132. CSC_D2_SHIFT
  93133. CSC_DESTINATION
  93134. CSC_DESTINATION_BASE
  93135. CSC_DESTINATION_BASE_ADDRESS_MASK
  93136. CSC_DESTINATION_BASE_CS
  93137. CSC_DESTINATION_BASE_EXT
  93138. CSC_DESTINATION_DIMENSION
  93139. CSC_DESTINATION_DIMENSION_X_MASK
  93140. CSC_DESTINATION_DIMENSION_Y_MASK
  93141. CSC_DESTINATION_PITCH
  93142. CSC_DESTINATION_PITCH_X_MASK
  93143. CSC_DESTINATION_PITCH_Y_MASK
  93144. CSC_DESTINATION_WRAP
  93145. CSC_DESTINATION_X_MASK
  93146. CSC_DESTINATION_Y_MASK
  93147. CSC_EN
  93148. CSC_ENABLE
  93149. CSC_FLASH
  93150. CSC_INT_LEV
  93151. CSC_ITU601_0_255_TO_RGB_0_255_8BIT
  93152. CSC_ITU601_16_235_TO_RGB_0_255_8BIT
  93153. CSC_ITU709_16_235_TO_RGB_0_255_8BIT
  93154. CSC_MASK
  93155. CSC_MAX
  93156. CSC_MODE_YUV_TO_RGB
  93157. CSC_POSITION_BEFORE_GAMMA
  93158. CSC_RGB2RGB
  93159. CSC_RGB2YUV
  93160. CSC_RGB_0_255_TO_ITU601_16_235_8BIT
  93161. CSC_RGB_0_255_TO_ITU709_16_235_8BIT
  93162. CSC_RGB_0_255_TO_RGB_16_235_8BIT
  93163. CSC_RO
  93164. CSC_ROP
  93165. CSC_SCALE_FACTOR
  93166. CSC_SCALE_FACTOR_HORIZONTAL_MASK
  93167. CSC_SCALE_FACTOR_VERTICAL_MASK
  93168. CSC_SIZ_MASK
  93169. CSC_SIZ_SHIFT
  93170. CSC_SOP
  93171. CSC_SOURCE_DIMENSION
  93172. CSC_SOURCE_DIMENSION_X_MASK
  93173. CSC_SOURCE_DIMENSION_Y_MASK
  93174. CSC_SOURCE_PITCH
  93175. CSC_SOURCE_PITCH_UV_MASK
  93176. CSC_SOURCE_PITCH_Y_MASK
  93177. CSC_TEMPERATURE_MATRIX_SIZE
  93178. CSC_UPSIZ_MASK
  93179. CSC_UPSIZ_SHIFT
  93180. CSC_U_SOURCE_BASE
  93181. CSC_U_SOURCE_BASE_ADDRESS_MASK
  93182. CSC_U_SOURCE_BASE_CS
  93183. CSC_U_SOURCE_BASE_EXT
  93184. CSC_V_SOURCE_BASE
  93185. CSC_V_SOURCE_BASE_ADDRESS_MASK
  93186. CSC_V_SOURCE_BASE_CS
  93187. CSC_V_SOURCE_BASE_EXT
  93188. CSC_WAIT_MASK
  93189. CSC_WAIT_SHIFT
  93190. CSC_WORK_ENABLE
  93191. CSC_WS_MASK
  93192. CSC_WS_SHIFT
  93193. CSC_YUV2RGB
  93194. CSC_YUV2YUV
  93195. CSC_Y_SOURCE_BASE
  93196. CSC_Y_SOURCE_BASE_ADDRESS_MASK
  93197. CSC_Y_SOURCE_BASE_CS
  93198. CSC_Y_SOURCE_BASE_EXT
  93199. CSC_Y_SOURCE_X
  93200. CSC_Y_SOURCE_X_FRACTION_MASK
  93201. CSC_Y_SOURCE_X_INTEGER_MASK
  93202. CSC_Y_SOURCE_Y
  93203. CSC_Y_SOURCE_Y_FRACTION_MASK
  93204. CSC_Y_SOURCE_Y_INTEGER_MASK
  93205. CSD
  93206. CSD0
  93207. CSD0_ADDR
  93208. CSD1
  93209. CSD1_ADDR
  93210. CSD2
  93211. CSD2_ADDR
  93212. CSD3
  93213. CSD3_ADDR
  93214. CSDAP_RESET
  93215. CSDATA_ADDR_WIDTH
  93216. CSDATA_DATA_WIDTH
  93217. CSDATA_TYPE
  93218. CSDATA_TYPE_EVENT
  93219. CSDATA_TYPE_PRIVATE
  93220. CSDATA_TYPE_STATE
  93221. CSDATA_TYPE_TG
  93222. CSDATA_TYPE_WIDTH
  93223. CSDB
  93224. CSDI_CONFIG2_DFLT
  93225. CSDI_CONFIG_INTER_DIR
  93226. CSDI_CONFIG_PROG
  93227. CSDI_DCDI_CONFIG_DFLT
  93228. CSDMAACT
  93229. CSDMAADR
  93230. CSDMACNT
  93231. CSDM_REG_AGG_INT_EVENT_0
  93232. CSDM_REG_AGG_INT_EVENT_10
  93233. CSDM_REG_AGG_INT_EVENT_11
  93234. CSDM_REG_AGG_INT_EVENT_12
  93235. CSDM_REG_AGG_INT_EVENT_13
  93236. CSDM_REG_AGG_INT_EVENT_14
  93237. CSDM_REG_AGG_INT_EVENT_15
  93238. CSDM_REG_AGG_INT_EVENT_16
  93239. CSDM_REG_AGG_INT_EVENT_2
  93240. CSDM_REG_AGG_INT_EVENT_3
  93241. CSDM_REG_AGG_INT_EVENT_4
  93242. CSDM_REG_AGG_INT_EVENT_5
  93243. CSDM_REG_AGG_INT_EVENT_6
  93244. CSDM_REG_AGG_INT_EVENT_7
  93245. CSDM_REG_AGG_INT_EVENT_8
  93246. CSDM_REG_AGG_INT_EVENT_9
  93247. CSDM_REG_AGG_INT_MODE_10
  93248. CSDM_REG_AGG_INT_MODE_11
  93249. CSDM_REG_AGG_INT_MODE_12
  93250. CSDM_REG_AGG_INT_MODE_13
  93251. CSDM_REG_AGG_INT_MODE_14
  93252. CSDM_REG_AGG_INT_MODE_15
  93253. CSDM_REG_AGG_INT_MODE_16
  93254. CSDM_REG_AGG_INT_MODE_6
  93255. CSDM_REG_AGG_INT_MODE_7
  93256. CSDM_REG_AGG_INT_MODE_8
  93257. CSDM_REG_AGG_INT_MODE_9
  93258. CSDM_REG_CFC_RSP_START_ADDR
  93259. CSDM_REG_CMP_COUNTER_MAX0
  93260. CSDM_REG_CMP_COUNTER_MAX1
  93261. CSDM_REG_CMP_COUNTER_MAX2
  93262. CSDM_REG_CMP_COUNTER_MAX3
  93263. CSDM_REG_CMP_COUNTER_START_ADDR
  93264. CSDM_REG_CSDM_INT_MASK_0
  93265. CSDM_REG_CSDM_INT_MASK_1
  93266. CSDM_REG_CSDM_INT_STS_0
  93267. CSDM_REG_CSDM_INT_STS_1
  93268. CSDM_REG_CSDM_PRTY_MASK
  93269. CSDM_REG_CSDM_PRTY_STS
  93270. CSDM_REG_CSDM_PRTY_STS_CLR
  93271. CSDM_REG_ENABLE_IN1
  93272. CSDM_REG_ENABLE_IN2
  93273. CSDM_REG_ENABLE_OUT1
  93274. CSDM_REG_ENABLE_OUT2
  93275. CSDM_REG_INIT_CREDIT_PXP_CTRL
  93276. CSDM_REG_NUM_OF_ACK_AFTER_PLACE
  93277. CSDM_REG_NUM_OF_PKT_END_MSG
  93278. CSDM_REG_NUM_OF_PXP_ASYNC_REQ
  93279. CSDM_REG_NUM_OF_Q0_CMD
  93280. CSDM_REG_NUM_OF_Q10_CMD
  93281. CSDM_REG_NUM_OF_Q11_CMD
  93282. CSDM_REG_NUM_OF_Q1_CMD
  93283. CSDM_REG_NUM_OF_Q3_CMD
  93284. CSDM_REG_NUM_OF_Q4_CMD
  93285. CSDM_REG_NUM_OF_Q5_CMD
  93286. CSDM_REG_NUM_OF_Q6_CMD
  93287. CSDM_REG_NUM_OF_Q7_CMD
  93288. CSDM_REG_NUM_OF_Q8_CMD
  93289. CSDM_REG_NUM_OF_Q9_CMD
  93290. CSDM_REG_Q_COUNTER_START_ADDR
  93291. CSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY
  93292. CSDM_REG_SYNC_PARSER_EMPTY
  93293. CSDM_REG_SYNC_SYNC_EMPTY
  93294. CSDM_REG_TIMER_TICK
  93295. CSDP
  93296. CSDP_DATA_TYPE_16
  93297. CSDP_DATA_TYPE_32
  93298. CSDP_DATA_TYPE_8
  93299. CSDP_DST_BURST_1
  93300. CSDP_DST_BURST_16
  93301. CSDP_DST_BURST_32
  93302. CSDP_DST_BURST_64
  93303. CSDP_DST_PACKED
  93304. CSDP_DST_PORT_EMIFF
  93305. CSDP_DST_PORT_EMIFS
  93306. CSDP_DST_PORT_MPUI
  93307. CSDP_DST_PORT_OCP_T1
  93308. CSDP_DST_PORT_OCP_T2
  93309. CSDP_DST_PORT_TIPB
  93310. CSDP_SRC_BURST_1
  93311. CSDP_SRC_BURST_16
  93312. CSDP_SRC_BURST_32
  93313. CSDP_SRC_BURST_64
  93314. CSDP_SRC_PACKED
  93315. CSDP_SRC_PORT_EMIFF
  93316. CSDP_SRC_PORT_EMIFS
  93317. CSDP_SRC_PORT_MPUI
  93318. CSDP_SRC_PORT_OCP_T1
  93319. CSDP_SRC_PORT_OCP_T2
  93320. CSDP_SRC_PORT_TIPB
  93321. CSDP_WRITE_LAST_NON_POSTED
  93322. CSDP_WRITE_NON_POSTED
  93323. CSDP_WRITE_POSTED
  93324. CSDR_MASK
  93325. CSDR_SHIFT
  93326. CSD_AC_MASK
  93327. CSD_AC_SHIFT
  93328. CSD_ADDR
  93329. CSD_AM_MASK
  93330. CSD_AM_SHIFT
  93331. CSD_BSW
  93332. CSD_BUSW
  93333. CSD_COMB
  93334. CSD_DRAM
  93335. CSD_EN
  93336. CSD_FLAG_LOCK
  93337. CSD_FLAG_SYNCHRONOUS
  93338. CSD_FLASH
  93339. CSD_RO
  93340. CSD_ROP
  93341. CSD_SIZ_MASK
  93342. CSD_SIZ_SHIFT
  93343. CSD_SOP
  93344. CSD_SPEC_VER_0
  93345. CSD_SPEC_VER_1
  93346. CSD_SPEC_VER_2
  93347. CSD_SPEC_VER_3
  93348. CSD_SPEC_VER_4
  93349. CSD_STRUCT_EXT_CSD
  93350. CSD_STRUCT_VER_1_0
  93351. CSD_STRUCT_VER_1_1
  93352. CSD_STRUCT_VER_1_2
  93353. CSD_UPSIZ_MASK
  93354. CSD_UPSIZ_SHIFT
  93355. CSD_WAIT_MASK
  93356. CSD_WAIT_SHIFT
  93357. CSD_WS_MASK
  93358. CSD_WS_SHIFT
  93359. CSEI
  93360. CSEL
  93361. CSEL_RESERVED
  93362. CSEM_REG_ARB_CYCLE_SIZE
  93363. CSEM_REG_ARB_ELEMENT0
  93364. CSEM_REG_ARB_ELEMENT1
  93365. CSEM_REG_ARB_ELEMENT2
  93366. CSEM_REG_ARB_ELEMENT3
  93367. CSEM_REG_ARB_ELEMENT4
  93368. CSEM_REG_CSEM_INT_MASK_0
  93369. CSEM_REG_CSEM_INT_MASK_1
  93370. CSEM_REG_CSEM_INT_STS_0
  93371. CSEM_REG_CSEM_INT_STS_1
  93372. CSEM_REG_CSEM_PRTY_MASK_0
  93373. CSEM_REG_CSEM_PRTY_MASK_1
  93374. CSEM_REG_CSEM_PRTY_STS_0
  93375. CSEM_REG_CSEM_PRTY_STS_1
  93376. CSEM_REG_CSEM_PRTY_STS_CLR_0
  93377. CSEM_REG_CSEM_PRTY_STS_CLR_1
  93378. CSEM_REG_ENABLE_IN
  93379. CSEM_REG_ENABLE_OUT
  93380. CSEM_REG_FAST_MEMORY
  93381. CSEM_REG_FIC0_DISABLE
  93382. CSEM_REG_FIC1_DISABLE
  93383. CSEM_REG_INT_TABLE
  93384. CSEM_REG_MSG_NUM_FIC0
  93385. CSEM_REG_MSG_NUM_FIC1
  93386. CSEM_REG_MSG_NUM_FOC0
  93387. CSEM_REG_MSG_NUM_FOC1
  93388. CSEM_REG_MSG_NUM_FOC2
  93389. CSEM_REG_MSG_NUM_FOC3
  93390. CSEM_REG_PASSIVE_BUFFER
  93391. CSEM_REG_PAS_DISABLE
  93392. CSEM_REG_PRAM
  93393. CSEM_REG_SLEEP_THREADS_VALID
  93394. CSEM_REG_SLOW_EXT_STORE_EMPTY
  93395. CSEM_REG_THREADS_LIST
  93396. CSEM_REG_TS_0_AS
  93397. CSEM_REG_TS_10_AS
  93398. CSEM_REG_TS_11_AS
  93399. CSEM_REG_TS_12_AS
  93400. CSEM_REG_TS_13_AS
  93401. CSEM_REG_TS_14_AS
  93402. CSEM_REG_TS_15_AS
  93403. CSEM_REG_TS_16_AS
  93404. CSEM_REG_TS_17_AS
  93405. CSEM_REG_TS_18_AS
  93406. CSEM_REG_TS_1_AS
  93407. CSEM_REG_TS_2_AS
  93408. CSEM_REG_TS_3_AS
  93409. CSEM_REG_TS_4_AS
  93410. CSEM_REG_TS_5_AS
  93411. CSEM_REG_TS_6_AS
  93412. CSEM_REG_TS_7_AS
  93413. CSEM_REG_TS_8_AS
  93414. CSEM_REG_TS_9_AS
  93415. CSEM_REG_VFPF_ERR_NUM
  93416. CSEQBLKRST
  93417. CSEQCOMCTL
  93418. CSEQCOMDMACTL
  93419. CSEQCOMINTEN
  93420. CSEQCOMSTAT
  93421. CSEQCON
  93422. CSEQDLCTL
  93423. CSEQDLOFFS
  93424. CSEQINT
  93425. CSEQRAMBISTDN
  93426. CSEQRAMBISTEN
  93427. CSEQRAMBISTFAIL
  93428. CSEQREQMBX
  93429. CSEQRSPMBX
  93430. CSEQSCRBISTDN
  93431. CSEQSCRBISTEN
  93432. CSEQSCRBISTFAIL
  93433. CSEQ_BUILTIN_FREE_SCB_HEAD
  93434. CSEQ_BUILTIN_FREE_SCB_TAIL
  93435. CSEQ_CIO_REG_BASE_ADR
  93436. CSEQ_CLEAR_LU_HEAD
  93437. CSEQ_EMPTY_REQ_COUNT
  93438. CSEQ_EMPTY_REQ_HEAD
  93439. CSEQ_EMPTY_REQ_QUEUE
  93440. CSEQ_EMPTY_REQ_TAIL
  93441. CSEQ_EMPTY_SCB_OFFSET
  93442. CSEQ_EMPTY_TRANS_CTX
  93443. CSEQ_EST_NEXUS_REQ_COUNT
  93444. CSEQ_EST_NEXUS_REQ_HEAD
  93445. CSEQ_EST_NEXUS_REQ_QUEUE
  93446. CSEQ_EST_NEXUS_REQ_TAIL
  93447. CSEQ_EST_NEXUS_SCB_OFFSET
  93448. CSEQ_EXTENDED_FREE_SCB_HEAD
  93449. CSEQ_EXTENDED_FREE_SCB_TAIL
  93450. CSEQ_FIRST_INV_DDB_SITE
  93451. CSEQ_FIRST_INV_SCB_SITE
  93452. CSEQ_FREE_LIST_HACK_COUNT
  93453. CSEQ_FREE_SCB_MASK
  93454. CSEQ_GLOBAL_HEAD
  93455. CSEQ_GLOBAL_PREV_SCB
  93456. CSEQ_HOST_REG_BASE_ADR
  93457. CSEQ_HQ_DONE_BASE
  93458. CSEQ_HQ_DONE_PASS
  93459. CSEQ_HQ_DONE_POINTER
  93460. CSEQ_HQ_NEW_POINTER
  93461. CSEQ_HSB_SITE
  93462. CSEQ_INT_ROUT_MODE
  93463. CSEQ_INT_ROUT_RET_ADDR0
  93464. CSEQ_INT_ROUT_RET_ADDR1
  93465. CSEQ_INT_ROUT_SCBPTR
  93466. CSEQ_ISR_SAVE_DINDEX
  93467. CSEQ_ISR_SAVE_SINDEX
  93468. CSEQ_ISR_SCRATCH_FLAGS
  93469. CSEQ_LINK_CTL_Q_MAP
  93470. CSEQ_LRM_SAVE_SCBPTR
  93471. CSEQ_LRM_SAVE_SCRPAGE
  93472. CSEQ_LRM_SAVE_SINDEX
  93473. CSEQ_LUN_TO_CHECK
  93474. CSEQ_LUN_TO_CLEAR
  93475. CSEQ_MAX_CSEQ_MODE
  93476. CSEQ_MODE_PAGE_SIZE
  93477. CSEQ_NEED_EMPTY_SCB
  93478. CSEQ_NEED_EST_NEXUS_SCB
  93479. CSEQ_NUM_VECS
  93480. CSEQ_PAGE_SIZE
  93481. CSEQ_PRIMITIVE_DATA
  93482. CSEQ_Q_COPY_HEAD
  93483. CSEQ_Q_COPY_TAIL
  93484. CSEQ_Q_DMA2CHIM_HEAD
  93485. CSEQ_Q_DMA2CHIM_TAIL
  93486. CSEQ_Q_DONE_HEAD
  93487. CSEQ_Q_DONE_TAIL
  93488. CSEQ_Q_EMPTY_HEAD
  93489. CSEQ_Q_EMPTY_TAIL
  93490. CSEQ_Q_EST_NEXUS_HEAD
  93491. CSEQ_Q_EST_NEXUS_TAIL
  93492. CSEQ_Q_EXE_HEAD
  93493. CSEQ_Q_EXE_TAIL
  93494. CSEQ_Q_LINK_HEAD
  93495. CSEQ_Q_LINK_TAIL
  93496. CSEQ_Q_MONIRTT_HEAD
  93497. CSEQ_Q_MONIRTT_TAIL
  93498. CSEQ_Q_SEND_HEAD
  93499. CSEQ_Q_SEND_TAIL
  93500. CSEQ_RAM_REG_BASE_ADR
  93501. CSEQ_REG0
  93502. CSEQ_REG1
  93503. CSEQ_REG2
  93504. CSEQ_RESP_LEN
  93505. CSEQ_RET_ADDR
  93506. CSEQ_RET_SCBPTR
  93507. CSEQ_SAVE_SCBPTR
  93508. CSEQ_SCRATCH_FLAGS
  93509. CSEQ_TIMEOUT_CONST
  93510. CSEQ_TMF_OPCODE
  93511. CSEQ_TMF_SCBPTR
  93512. CSEQm_CIO_REG
  93513. CSERR
  93514. CSERRSTAT_MASK
  93515. CSERV_DISCONNECT
  93516. CSF
  93517. CSFE_CHICKEN1_REG
  93518. CSFI
  93519. CSGBA
  93520. CSGBA_ADDR
  93521. CSGBB
  93522. CSGBB_ADDR
  93523. CSGBC
  93524. CSGBC_ADDR
  93525. CSGBD
  93526. CSGBD_ADDR
  93527. CSHALTERR
  93528. CSHAPE
  93529. CSHRDDR3CTL
  93530. CSHRDDR3CTL_DDR3
  93531. CSI0CLKFCPR_REG
  93532. CSI0CLKFREQRANGE
  93533. CSI0PHYTIMER_CLK_SRC
  93534. CSI0_CLK
  93535. CSI0_CLK_SRC
  93536. CSI0_CN
  93537. CSI0_CP
  93538. CSI0_DN0
  93539. CSI0_DN1
  93540. CSI0_DN2
  93541. CSI0_DN3
  93542. CSI0_DP0
  93543. CSI0_DP1
  93544. CSI0_DP2
  93545. CSI0_DP3
  93546. CSI0_PHY_CLK
  93547. CSI0_RESET
  93548. CSI0_SRC
  93549. CSI1PHYTIMER_CLK_SRC
  93550. CSI1_CLK
  93551. CSI1_CLK_SRC
  93552. CSI1_CN
  93553. CSI1_CP
  93554. CSI1_DN0
  93555. CSI1_DN1
  93556. CSI1_DP0
  93557. CSI1_DP1
  93558. CSI1_PHY_CLK
  93559. CSI1_RESET
  93560. CSI1_SRC
  93561. CSI2IPU_GASKET
  93562. CSI2IPU_YUV422_YUYV
  93563. CSI2PHYTIMER_CLK_SRC
  93564. CSI2RX_DEVICE_CFG_REG
  93565. CSI2RX_LANES_MAX
  93566. CSI2RX_PAD_MAX
  93567. CSI2RX_PAD_SINK
  93568. CSI2RX_PAD_SOURCE_STREAM0
  93569. CSI2RX_PAD_SOURCE_STREAM1
  93570. CSI2RX_PAD_SOURCE_STREAM2
  93571. CSI2RX_PAD_SOURCE_STREAM3
  93572. CSI2RX_SOFT_RESET_FRONT
  93573. CSI2RX_SOFT_RESET_PROTOCOL
  93574. CSI2RX_SOFT_RESET_REG
  93575. CSI2RX_STATIC_CFG_DLANE_MAP
  93576. CSI2RX_STATIC_CFG_LANES_MASK
  93577. CSI2RX_STATIC_CFG_REG
  93578. CSI2RX_STREAMS_MAX
  93579. CSI2RX_STREAM_BASE
  93580. CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF
  93581. CSI2RX_STREAM_CFG_REG
  93582. CSI2RX_STREAM_CTRL_REG
  93583. CSI2RX_STREAM_CTRL_START
  93584. CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT
  93585. CSI2RX_STREAM_DATA_CFG_REG
  93586. CSI2RX_STREAM_DATA_CFG_VC_SELECT
  93587. CSI2TX_CONFIG_CFG_REQ
  93588. CSI2TX_CONFIG_REG
  93589. CSI2TX_CONFIG_SRST_REQ
  93590. CSI2TX_DEVICE_CONFIG_HAS_DPHY
  93591. CSI2TX_DEVICE_CONFIG_LANES_MASK
  93592. CSI2TX_DEVICE_CONFIG_REG
  93593. CSI2TX_DEVICE_CONFIG_STREAMS_MASK
  93594. CSI2TX_DPHY_CFG_CLK_ENABLE
  93595. CSI2TX_DPHY_CFG_CLK_RESET
  93596. CSI2TX_DPHY_CFG_LANE_ENABLE
  93597. CSI2TX_DPHY_CFG_LANE_RESET
  93598. CSI2TX_DPHY_CFG_MODE_HS
  93599. CSI2TX_DPHY_CFG_MODE_LPDT
  93600. CSI2TX_DPHY_CFG_MODE_MASK
  93601. CSI2TX_DPHY_CFG_MODE_ULPS
  93602. CSI2TX_DPHY_CFG_REG
  93603. CSI2TX_DPHY_CLK_WAKEUP_REG
  93604. CSI2TX_DPHY_CLK_WAKEUP_ULPS_CYCLES
  93605. CSI2TX_DT_CFG_DT
  93606. CSI2TX_DT_CFG_REG
  93607. CSI2TX_DT_FORMAT_BYTES_PER_LINE
  93608. CSI2TX_DT_FORMAT_MAX_LINE_NUM
  93609. CSI2TX_DT_FORMAT_REG
  93610. CSI2TX_LANES_MAX
  93611. CSI2TX_PAD_MAX
  93612. CSI2TX_PAD_SINK_STREAM0
  93613. CSI2TX_PAD_SINK_STREAM1
  93614. CSI2TX_PAD_SINK_STREAM2
  93615. CSI2TX_PAD_SINK_STREAM3
  93616. CSI2TX_PAD_SOURCE
  93617. CSI2TX_STREAMS_MAX
  93618. CSI2TX_STREAM_IF_CFG_FILL_LEVEL
  93619. CSI2TX_STREAM_IF_CFG_REG
  93620. CSI2TX_V2_DPHY_CFG_CLK_ENABLE
  93621. CSI2TX_V2_DPHY_CFG_CLOCK_MODE
  93622. CSI2TX_V2_DPHY_CFG_LANE_ENABLE
  93623. CSI2TX_V2_DPHY_CFG_MODE_HS
  93624. CSI2TX_V2_DPHY_CFG_MODE_LPDT
  93625. CSI2TX_V2_DPHY_CFG_MODE_MASK
  93626. CSI2TX_V2_DPHY_CFG_MODE_ULPS
  93627. CSI2TX_V2_DPHY_CFG_REG
  93628. CSI2TX_V2_DPHY_CFG_RESET
  93629. CSI2_C0_ACT_LANE
  93630. CSI2_C0_MIPI_EN
  93631. CSI2_CLK
  93632. CSI2_CLK_SRC
  93633. CSI2_COMPLEXIO_CFG
  93634. CSI2_COMPLEXIO_CFG_CLOCK_POL
  93635. CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK
  93636. CSI2_COMPLEXIO_CFG_CLOCK_POSITION_SHIFT
  93637. CSI2_COMPLEXIO_CFG_DATA_POL
  93638. CSI2_COMPLEXIO_CFG_DATA_POSITION_MASK
  93639. CSI2_COMPLEXIO_CFG_DATA_POSITION_SHIFT
  93640. CSI2_COMPLEXIO_CFG_PWD_CMD_MASK
  93641. CSI2_COMPLEXIO_CFG_PWD_CMD_OFF
  93642. CSI2_COMPLEXIO_CFG_PWD_CMD_ON
  93643. CSI2_COMPLEXIO_CFG_PWD_CMD_ULP
  93644. CSI2_COMPLEXIO_CFG_PWD_STATUS_MASK
  93645. CSI2_COMPLEXIO_CFG_PWD_STATUS_OFF
  93646. CSI2_COMPLEXIO_CFG_PWD_STATUS_ON
  93647. CSI2_COMPLEXIO_CFG_PWD_STATUS_ULP
  93648. CSI2_COMPLEXIO_CFG_PWR_AUTO
  93649. CSI2_COMPLEXIO_CFG_RESET_CTRL
  93650. CSI2_COMPLEXIO_CFG_RESET_DONE
  93651. CSI2_COMPLEXIO_IRQENABLE
  93652. CSI2_COMPLEXIO_IRQSTATUS
  93653. CSI2_COMPLEXIO_IRQ_ERRCONTROL1
  93654. CSI2_COMPLEXIO_IRQ_ERRCONTROL2
  93655. CSI2_COMPLEXIO_IRQ_ERRCONTROL3
  93656. CSI2_COMPLEXIO_IRQ_ERRCONTROL4
  93657. CSI2_COMPLEXIO_IRQ_ERRCONTROL5
  93658. CSI2_COMPLEXIO_IRQ_ERRESC1
  93659. CSI2_COMPLEXIO_IRQ_ERRESC2
  93660. CSI2_COMPLEXIO_IRQ_ERRESC3
  93661. CSI2_COMPLEXIO_IRQ_ERRESC4
  93662. CSI2_COMPLEXIO_IRQ_ERRESC5
  93663. CSI2_COMPLEXIO_IRQ_ERRSOTHS1
  93664. CSI2_COMPLEXIO_IRQ_ERRSOTHS2
  93665. CSI2_COMPLEXIO_IRQ_ERRSOTHS3
  93666. CSI2_COMPLEXIO_IRQ_ERRSOTHS4
  93667. CSI2_COMPLEXIO_IRQ_ERRSOTHS5
  93668. CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS1
  93669. CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS2
  93670. CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS3
  93671. CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS4
  93672. CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS5
  93673. CSI2_COMPLEXIO_IRQ_STATEALLULPMENTER
  93674. CSI2_COMPLEXIO_IRQ_STATEALLULPMEXIT
  93675. CSI2_COMPLEXIO_IRQ_STATEULPM1
  93676. CSI2_COMPLEXIO_IRQ_STATEULPM2
  93677. CSI2_COMPLEXIO_IRQ_STATEULPM3
  93678. CSI2_COMPLEXIO_IRQ_STATEULPM4
  93679. CSI2_COMPLEXIO_IRQ_STATEULPM5
  93680. CSI2_CTRL
  93681. CSI2_CTRL_BURST_SIZE_EXPAND
  93682. CSI2_CTRL_BURST_SIZE_MASK
  93683. CSI2_CTRL_DBG_EN
  93684. CSI2_CTRL_ECC_EN
  93685. CSI2_CTRL_ENDIANNESS
  93686. CSI2_CTRL_FRAME
  93687. CSI2_CTRL_IF_EN
  93688. CSI2_CTRL_MFLAG_LEVH_MASK
  93689. CSI2_CTRL_MFLAG_LEVH_SHIFT
  93690. CSI2_CTRL_MFLAG_LEVL_MASK
  93691. CSI2_CTRL_MFLAG_LEVL_SHIFT
  93692. CSI2_CTRL_NON_POSTED_WRITE
  93693. CSI2_CTRL_VP_CLK_EN
  93694. CSI2_CTRL_VP_ONLY_EN
  93695. CSI2_CTRL_VP_OUT_CTRL_MASK
  93696. CSI2_CTRL_VP_OUT_CTRL_SHIFT
  93697. CSI2_CTX_CTRL1
  93698. CSI2_CTX_CTRL1_COUNT_MASK
  93699. CSI2_CTX_CTRL1_COUNT_SHIFT
  93700. CSI2_CTX_CTRL1_COUNT_UNLOCK
  93701. CSI2_CTX_CTRL1_CS_EN
  93702. CSI2_CTX_CTRL1_CTX_EN
  93703. CSI2_CTX_CTRL1_EOF_EN
  93704. CSI2_CTX_CTRL1_EOL_EN
  93705. CSI2_CTX_CTRL1_FEC_NUMBER_MASK
  93706. CSI2_CTX_CTRL1_GENERIC
  93707. CSI2_CTX_CTRL1_PING_PONG
  93708. CSI2_CTX_CTRL1_TRANSCODE
  93709. CSI2_CTX_CTRL2
  93710. CSI2_CTX_CTRL2_DPCM_PRED
  93711. CSI2_CTX_CTRL2_FORMAT_MASK
  93712. CSI2_CTX_CTRL2_FORMAT_SHIFT
  93713. CSI2_CTX_CTRL2_FRAME_MASK
  93714. CSI2_CTX_CTRL2_FRAME_SHIFT
  93715. CSI2_CTX_CTRL2_USER_DEF_MAP_MASK
  93716. CSI2_CTX_CTRL2_USER_DEF_MAP_SHIFT
  93717. CSI2_CTX_CTRL2_VIRTUAL_ID_MASK
  93718. CSI2_CTX_CTRL2_VIRTUAL_ID_SHIFT
  93719. CSI2_CTX_CTRL3
  93720. CSI2_CTX_CTRL3_ALPHA_MASK
  93721. CSI2_CTX_CTRL3_ALPHA_SHIFT
  93722. CSI2_CTX_DAT_OFST
  93723. CSI2_CTX_DAT_OFST_MASK
  93724. CSI2_CTX_IRQENABLE
  93725. CSI2_CTX_IRQSTATUS
  93726. CSI2_CTX_IRQ_CS
  93727. CSI2_CTX_IRQ_ECC_CORRECTION
  93728. CSI2_CTX_IRQ_FE
  93729. CSI2_CTX_IRQ_FRAME_NUMBER
  93730. CSI2_CTX_IRQ_FS
  93731. CSI2_CTX_IRQ_LE
  93732. CSI2_CTX_IRQ_LINE_NUMBER
  93733. CSI2_CTX_IRQ_LS
  93734. CSI2_CTX_PING_ADDR
  93735. CSI2_CTX_PING_ADDR_MASK
  93736. CSI2_CTX_PONG_ADDR
  93737. CSI2_CTX_PONG_ADDR_MASK
  93738. CSI2_DATA_IDS_1
  93739. CSI2_DATA_IDS_2
  93740. CSI2_DBG_H
  93741. CSI2_DBG_P
  93742. CSI2_DEFAULT_MAX_MBPS
  93743. CSI2_DPHY_RSTZ
  93744. CSI2_ERR1
  93745. CSI2_ERR2
  93746. CSI2_IRQENABLE
  93747. CSI2_IRQSTATUS
  93748. CSI2_IRQ_COMPLEXIO_ERR
  93749. CSI2_IRQ_CONTEXT0
  93750. CSI2_IRQ_ECC_CORRECTION
  93751. CSI2_IRQ_ECC_NO_CORRECTION
  93752. CSI2_IRQ_FIFO_OVF
  93753. CSI2_IRQ_OCP_ERR
  93754. CSI2_IRQ_SHORT_PACKET
  93755. CSI2_MSK1
  93756. CSI2_MSK2
  93757. CSI2_NUM_PADS
  93758. CSI2_NUM_SINK_PADS
  93759. CSI2_NUM_SRC_PADS
  93760. CSI2_N_LANES
  93761. CSI2_OUTPUT_CCDC
  93762. CSI2_OUTPUT_IPIPEIF
  93763. CSI2_OUTPUT_MEMORY
  93764. CSI2_PADS_NUM
  93765. CSI2_PAD_SINK
  93766. CSI2_PAD_SOURCE
  93767. CSI2_PHY_CLK
  93768. CSI2_PHY_SHUTDOWNZ
  93769. CSI2_PHY_STATE
  93770. CSI2_PHY_TST_CTRL0
  93771. CSI2_PHY_TST_CTRL1
  93772. CSI2_PIX_FMT_OTHERS
  93773. CSI2_PIX_FMT_RAW10_EXP16
  93774. CSI2_PIX_FMT_RAW10_EXP16_VP
  93775. CSI2_PIX_FMT_RAW8
  93776. CSI2_PIX_FMT_RAW8_DPCM10_EXP16
  93777. CSI2_PIX_FMT_RAW8_DPCM10_VP
  93778. CSI2_PIX_FMT_RAW8_VP
  93779. CSI2_PIX_FMT_YUV422_8BIT
  93780. CSI2_PIX_FMT_YUV422_8BIT_VP
  93781. CSI2_PIX_FMT_YUV422_8BIT_VP16
  93782. CSI2_PRINT_REGISTER
  93783. CSI2_RESET
  93784. CSI2_RESETN
  93785. CSI2_SHORT_PACKET
  93786. CSI2_SINK_PAD
  93787. CSI2_SRC
  93788. CSI2_SYSCONFIG
  93789. CSI2_SYSCONFIG_AUTO_IDLE
  93790. CSI2_SYSCONFIG_MSTANDBY_MODE_FORCE
  93791. CSI2_SYSCONFIG_MSTANDBY_MODE_MASK
  93792. CSI2_SYSCONFIG_MSTANDBY_MODE_NO
  93793. CSI2_SYSCONFIG_MSTANDBY_MODE_SMART
  93794. CSI2_SYSCONFIG_SOFT_RESET
  93795. CSI2_SYSSTATUS
  93796. CSI2_SYSSTATUS_RESET_DONE
  93797. CSI2_TIMING
  93798. CSI2_TIMING_FORCE_RX_MODE_IO1
  93799. CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK
  93800. CSI2_TIMING_STOP_STATE_COUNTER_IO1_SHIFT
  93801. CSI2_TIMING_STOP_STATE_X16_IO1
  93802. CSI2_TIMING_STOP_STATE_X4_IO1
  93803. CSI2_USERDEF_8BIT_DATA1
  93804. CSI2_USERDEF_8BIT_DATA1_DPCM10
  93805. CSI2_USERDEF_8BIT_DATA1_DPCM10_VP
  93806. CSI2_VERSION
  93807. CSI3_CLK_SRC
  93808. CSIAR
  93809. CSIAR_ADDR_MASK
  93810. CSIAR_BYTE_ENABLE
  93811. CSIAR_FLAG
  93812. CSIAR_WRITE_CMD
  93813. CSICR1_RESET_VAL
  93814. CSICR2_RESET_VAL
  93815. CSICR3_RESET_VAL
  93816. CSIDR
  93817. CSID_PAYLOAD_MODE_ALL_ONES
  93818. CSID_PAYLOAD_MODE_ALL_ZEROES
  93819. CSID_PAYLOAD_MODE_ALTERNATING_55_AA
  93820. CSID_PAYLOAD_MODE_INCREMENTING
  93821. CSID_PAYLOAD_MODE_RANDOM
  93822. CSID_PAYLOAD_MODE_USER_SPECIFIED
  93823. CSID_RESET_TIMEOUT_MS
  93824. CSIEC
  93825. CSIEW0
  93826. CSIEW1
  93827. CSIEW2
  93828. CSIGNAL
  93829. CSIGP
  93830. CSIGR_TO_DMAC
  93831. CSIGR_TO_IMODE
  93832. CSIGR_TO_IOWINS
  93833. CSIGR_TO_MMODE
  93834. CSIGR_TO_TYPE
  93835. CSIGR_TO_VER
  93836. CSIGR_TO_WINS
  93837. CSIGR_TO_WPDEP
  93838. CSIINTREG
  93839. CSIINT_RX_DMAEND
  93840. CSIINT_RX_DMAHALT
  93841. CSIINT_RX_FIFOEMPTY
  93842. CSIINT_TX_DATA
  93843. CSIINT_TX_DMAEND
  93844. CSIINT_TX_DMAHALT
  93845. CSIINT_TX_FIFOEMPTY
  93846. CSINDEX
  93847. CSINDIR
  93848. CSIO_ASIC_DEVID_PROTO_MASK
  93849. CSIO_ASIC_DEVID_TYPE_MASK
  93850. CSIO_ASSERT
  93851. CSIO_DB_ASSERT
  93852. CSIO_DEC_STATS
  93853. CSIO_DEVICE
  93854. CSIO_DEVID
  93855. CSIO_DEVID_HI
  93856. CSIO_DEVID_LO
  93857. CSIO_DEV_STATE_ERR
  93858. CSIO_DEV_STATE_INIT
  93859. CSIO_DEV_STATE_UNINIT
  93860. CSIO_DID_MASK
  93861. CSIO_DRV_AUTHOR
  93862. CSIO_DRV_DESC
  93863. CSIO_DRV_VERSION
  93864. CSIO_DUMP_MB
  93865. CSIO_EGRESS
  93866. CSIO_EVTQ_SIZE
  93867. CSIO_EVT_DEV_LOSS
  93868. CSIO_EVT_FW
  93869. CSIO_EVT_MAX
  93870. CSIO_EVT_MBX
  93871. CSIO_EVT_MSG_SIZE
  93872. CSIO_EVT_SCN
  93873. CSIO_EXTRA_MSI_IQS
  93874. CSIO_EXTRA_VECS
  93875. CSIO_FCOE_MAX_NPIV
  93876. CSIO_FCOE_MAX_RNODES
  93877. CSIO_FREELIST
  93878. CSIO_FWEVT_FLBUFS
  93879. CSIO_FWEVT_IQLEN
  93880. CSIO_FWEVT_IQSIZE
  93881. CSIO_FWEVT_WRSIZE
  93882. CSIO_FWE_TO_LNE
  93883. CSIO_FWE_TO_RNFE
  93884. CSIO_GLBL_INTR_MASK
  93885. CSIO_HBA_PORTSPEED_UNKNOWN
  93886. CSIO_HWE_CFG
  93887. CSIO_HWE_FATAL
  93888. CSIO_HWE_FW_DLOAD
  93889. CSIO_HWE_HBA_RESET
  93890. CSIO_HWE_HBA_RESET_DONE
  93891. CSIO_HWE_INIT
  93892. CSIO_HWE_INIT_DONE
  93893. CSIO_HWE_MAX
  93894. CSIO_HWE_PCIERR_DETECTED
  93895. CSIO_HWE_PCIERR_RESUME
  93896. CSIO_HWE_PCIERR_SLOT_RESET
  93897. CSIO_HWE_PCI_REMOVE
  93898. CSIO_HWE_QUIESCED
  93899. CSIO_HWE_RESUME
  93900. CSIO_HWE_SUSPEND
  93901. CSIO_HWF_DEVID_CACHED
  93902. CSIO_HWF_FWEVT_PENDING
  93903. CSIO_HWF_FWEVT_STOP
  93904. CSIO_HWF_HOST_INTR_ENABLED
  93905. CSIO_HWF_HW_INTR_ENABLED
  93906. CSIO_HWF_MASTER
  93907. CSIO_HWF_Q_FW_ALLOCED
  93908. CSIO_HWF_Q_MEM_ALLOCED
  93909. CSIO_HWF_ROOT_NO_RELAXED_ORDERING
  93910. CSIO_HWF_USING_SOFT_PARAMS
  93911. CSIO_HWF_VPD_VALID
  93912. CSIO_HW_CHIP_MASK
  93913. CSIO_HW_NAME
  93914. CSIO_HW_NEQ
  93915. CSIO_HW_NFLQ
  93916. CSIO_HW_NINTXQ
  93917. CSIO_HW_NIQ
  93918. CSIO_HW_T5
  93919. CSIO_HW_T6
  93920. CSIO_IM_INTX
  93921. CSIO_IM_MSI
  93922. CSIO_IM_MSIX
  93923. CSIO_IM_NONE
  93924. CSIO_INC_STATS
  93925. CSIO_INGRESS
  93926. CSIO_INIT_MBP
  93927. CSIO_INTR_IQSIZE
  93928. CSIO_INTR_WRSIZE
  93929. CSIO_INVALID_IDX
  93930. CSIO_LEV_ALL
  93931. CSIO_LEV_LNODE
  93932. CSIO_LEV_LUN
  93933. CSIO_LEV_RNODE
  93934. CSIO_LNE_CLOSE
  93935. CSIO_LNE_DOWN_LINK
  93936. CSIO_LNE_FAB_INIT_DONE
  93937. CSIO_LNE_LINKUP
  93938. CSIO_LNE_LINK_DOWN
  93939. CSIO_LNE_LOGO
  93940. CSIO_LNE_MAX_EVENT
  93941. CSIO_LNE_NONE
  93942. CSIO_LNF_FDMI_ENABLE
  93943. CSIO_LNF_FIPSUPP
  93944. CSIO_LNF_LINK_ENABLE
  93945. CSIO_LNF_NPIVSUPP
  93946. CSIO_LN_FC_ATTRIB_UPDATE
  93947. CSIO_LN_FC_LINKDOWN
  93948. CSIO_LN_FC_LINKUP
  93949. CSIO_LN_FC_RSCN
  93950. CSIO_LN_NOTIFY_HWREADY
  93951. CSIO_LN_NOTIFY_HWREMOVE
  93952. CSIO_LN_NOTIFY_HWRESET
  93953. CSIO_LN_NOTIFY_HWSTOP
  93954. CSIO_MASTER_CANT
  93955. CSIO_MASTER_MAY
  93956. CSIO_MASTER_MUST
  93957. CSIO_MAX_CMD_PER_LUN
  93958. CSIO_MAX_DDP_BUF_SIZE
  93959. CSIO_MAX_FLBUF_PER_IQWR
  93960. CSIO_MAX_IQ
  93961. CSIO_MAX_LUN
  93962. CSIO_MAX_MB_SIZE
  93963. CSIO_MAX_MSIX_VECS
  93964. CSIO_MAX_PFN
  93965. CSIO_MAX_PPORTS
  93966. CSIO_MAX_QID
  93967. CSIO_MAX_QUEUE
  93968. CSIO_MAX_RESET_RETRIES
  93969. CSIO_MAX_SCSI_CPU
  93970. CSIO_MAX_SCSI_QSETS
  93971. CSIO_MAX_SECTOR_SIZE
  93972. CSIO_MAX_SNS_LEN
  93973. CSIO_MBOWNER_FW
  93974. CSIO_MBOWNER_NONE
  93975. CSIO_MBOWNER_PL
  93976. CSIO_MB_DEFAULT_TMO
  93977. CSIO_MB_MAX_REGS
  93978. CSIO_MB_POLL_FREQ
  93979. CSIO_MGMT_EQLEN
  93980. CSIO_MGMT_EQSIZE
  93981. CSIO_MGMT_EQ_WRSIZE
  93982. CSIO_MGMT_IQLEN
  93983. CSIO_MGMT_IQSIZE
  93984. CSIO_MGMT_IQ_WRSIZE
  93985. CSIO_MIN_MEMPOOL_SZ
  93986. CSIO_MIN_T6_FW
  93987. CSIO_NUM_STATS_PER_MB
  93988. CSIO_PCI_BUS
  93989. CSIO_PCI_DEV
  93990. CSIO_PCI_FUNC
  93991. CSIO_QCREDIT_SZ
  93992. CSIO_RNFE_CLOSE
  93993. CSIO_RNFE_DOWN
  93994. CSIO_RNFE_LOGGED_IN
  93995. CSIO_RNFE_LOGO_RECV
  93996. CSIO_RNFE_MAX_EVENT
  93997. CSIO_RNFE_NAME_MISSING
  93998. CSIO_RNFE_NONE
  93999. CSIO_RNFE_PLOGI_RECV
  94000. CSIO_RNFE_PRLI_DONE
  94001. CSIO_RNFE_PRLI_RECV
  94002. CSIO_RNFE_PRLO_RECV
  94003. CSIO_RNFR_FABRIC
  94004. CSIO_RNFR_INITIATOR
  94005. CSIO_RNFR_NPORT
  94006. CSIO_RNFR_NS
  94007. CSIO_RNFR_TARGET
  94008. CSIO_SCSIE_ABORT
  94009. CSIO_SCSIE_ABORTED
  94010. CSIO_SCSIE_CLOSE
  94011. CSIO_SCSIE_CLOSED
  94012. CSIO_SCSIE_COMPLETED
  94013. CSIO_SCSIE_DRVCLEANUP
  94014. CSIO_SCSIE_START_IO
  94015. CSIO_SCSIE_START_TM
  94016. CSIO_SCSI_ABORT_Q_POLL_MS
  94017. CSIO_SCSI_ABRT_TMO_MS
  94018. CSIO_SCSI_CMD_WR_SZ
  94019. CSIO_SCSI_CMD_WR_SZ_16
  94020. CSIO_SCSI_DATA_WRSZ
  94021. CSIO_SCSI_IQSIZE
  94022. CSIO_SCSI_IQ_WRSZ
  94023. CSIO_SCSI_LUNRST_TMO_MS
  94024. CSIO_SCSI_MAX_SGE
  94025. CSIO_SCSI_RSP_LEN
  94026. CSIO_SCSI_TM_POLL_MS
  94027. CSIO_SET_FLBUF_SIZE
  94028. CSIO_SGE_DBFIFO_INT_THRESH
  94029. CSIO_SGE_FLBUF_SIZE1
  94030. CSIO_SGE_FLBUF_SIZE2
  94031. CSIO_SGE_FLBUF_SIZE3
  94032. CSIO_SGE_FLBUF_SIZE4
  94033. CSIO_SGE_FLBUF_SIZE5
  94034. CSIO_SGE_FLBUF_SIZE6
  94035. CSIO_SGE_FLBUF_SIZE7
  94036. CSIO_SGE_FLBUF_SIZE8
  94037. CSIO_SGE_FL_SIZE_REGS
  94038. CSIO_SGE_INT_CNT_VAL_0
  94039. CSIO_SGE_INT_CNT_VAL_1
  94040. CSIO_SGE_INT_CNT_VAL_2
  94041. CSIO_SGE_INT_CNT_VAL_3
  94042. CSIO_SGE_NCOUNTERS
  94043. CSIO_SGE_NTIMERS
  94044. CSIO_SGE_RX_DMA_OFFSET
  94045. CSIO_SGE_TIMER_VAL_0
  94046. CSIO_SGE_TIMER_VAL_1
  94047. CSIO_SGE_TIMER_VAL_2
  94048. CSIO_SGE_TIMER_VAL_3
  94049. CSIO_SGE_TIMER_VAL_4
  94050. CSIO_SGE_TIMER_VAL_5
  94051. CSIO_STATS_OFFSET
  94052. CSIO_T5_FCOE_ASIC
  94053. CSIO_T6_FCOE_ASIC
  94054. CSIO_VALID_WWN
  94055. CSIO_VENDOR_ID
  94056. CSIO_WORD_TO_BYTE
  94057. CSIPHY0_3P_CLK_SRC
  94058. CSIPHY0_RESET
  94059. CSIPHY0_TIMER_CLK
  94060. CSIPHY1_3P_CLK_SRC
  94061. CSIPHY1_RESET
  94062. CSIPHY1_TIMER_CLK
  94063. CSIPHY2_3P_CLK_SRC
  94064. CSIPHY2_RESET
  94065. CSIPHY2_TIMER_CLK
  94066. CSIPHYTIMER_SRC
  94067. CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_COMMON_PWRDN_B
  94068. CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_SHOW_REV_ID
  94069. CSIPHY_3PH_CMN_CSI_COMMON_CTRLn
  94070. CSIPHY_3PH_CMN_CSI_COMMON_STATUSn
  94071. CSIPHY_3PH_LNn_CFG1
  94072. CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG
  94073. CSIPHY_3PH_LNn_CFG2
  94074. CSIPHY_3PH_LNn_CFG2_LP_REC_EN_INT
  94075. CSIPHY_3PH_LNn_CFG3
  94076. CSIPHY_3PH_LNn_CFG4
  94077. CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS
  94078. CSIPHY_3PH_LNn_CFG5
  94079. CSIPHY_3PH_LNn_CFG5_HS_REC_EQ_FQ_INT
  94080. CSIPHY_3PH_LNn_CFG5_T_HS_DTERM
  94081. CSIPHY_3PH_LNn_CFG6
  94082. CSIPHY_3PH_LNn_CFG6_SWI_FORCE_INIT_EXIT
  94083. CSIPHY_3PH_LNn_CFG7
  94084. CSIPHY_3PH_LNn_CFG7_SWI_T_INIT
  94085. CSIPHY_3PH_LNn_CFG8
  94086. CSIPHY_3PH_LNn_CFG8_SKEW_FILTER_ENABLE
  94087. CSIPHY_3PH_LNn_CFG8_SWI_SKIP_WAKEUP
  94088. CSIPHY_3PH_LNn_CFG9
  94089. CSIPHY_3PH_LNn_CFG9_SWI_T_WAKEUP
  94090. CSIPHY_3PH_LNn_CSI_LANE_CTRL15
  94091. CSIPHY_3PH_LNn_CSI_LANE_CTRL15_SWI_SOT_SYMBOL
  94092. CSIPHY_3PH_LNn_MISC1
  94093. CSIPHY_3PH_LNn_MISC1_IS_CLKLANE
  94094. CSIPHY_3PH_LNn_TEST_IMP
  94095. CSIPHY_3PH_LNn_TEST_IMP_HS_TERM_IMP
  94096. CSIPLL0
  94097. CSIS0_MAX_LANES
  94098. CSIS1_MAX_LANES
  94099. CSIS_CLK_GATE
  94100. CSIS_CLK_MUX
  94101. CSIS_DRIVER_NAME
  94102. CSIS_MAX_ENTITIES
  94103. CSIS_MAX_PIX_HEIGHT
  94104. CSIS_MAX_PIX_WIDTH
  94105. CSIS_NUM_SUPPLIES
  94106. CSIS_OF_NODE_NAME
  94107. CSIS_PADS_NUM
  94108. CSIS_PAD_SINK
  94109. CSIS_PAD_SOURCE
  94110. CSIS_SUBDEV_NAME
  94111. CSIZE
  94112. CSIZE_LATTIME
  94113. CSI_ACT_FRM_SIZE
  94114. CSI_AHB_CLK
  94115. CSI_AHB_RESET
  94116. CSI_BT656_HEAD_CFG_REG
  94117. CSI_BUF_ADDR_REG
  94118. CSI_BUF_CTRL_DBE
  94119. CSI_BUF_CTRL_DBN
  94120. CSI_BUF_CTRL_DBS
  94121. CSI_BUF_CTRL_REG
  94122. CSI_BUF_LEN_REG
  94123. CSI_CAP_CH0_CAP_MASK
  94124. CSI_CAP_CH0_CAP_MASK_MASK
  94125. CSI_CAP_CH0_SCAP_ON
  94126. CSI_CAP_CH0_VCAP_ON
  94127. CSI_CAP_REG
  94128. CSI_CCIR_CODE_1
  94129. CSI_CCIR_CODE_2
  94130. CSI_CCIR_CODE_3
  94131. CSI_CCIR_ERR_DET_EN
  94132. CSI_CFG_HREF_POL
  94133. CSI_CFG_INPUT_FMT
  94134. CSI_CFG_OUTPUT_FMT
  94135. CSI_CFG_PCLK_POL
  94136. CSI_CFG_REG
  94137. CSI_CFG_VREF_POL
  94138. CSI_CFG_YUV_DATA_SEQ
  94139. CSI_CHUNKS_NOTIFICATION
  94140. CSI_CH_ACC_ITNL_CLK_CNT_REG
  94141. CSI_CH_BUF_LEN_BUF_LEN_C
  94142. CSI_CH_BUF_LEN_BUF_LEN_C_MASK
  94143. CSI_CH_BUF_LEN_BUF_LEN_Y
  94144. CSI_CH_BUF_LEN_BUF_LEN_Y_MASK
  94145. CSI_CH_BUF_LEN_REG
  94146. CSI_CH_CFG_FIELD_SEL_BOTH
  94147. CSI_CH_CFG_FIELD_SEL_FIELD0
  94148. CSI_CH_CFG_FIELD_SEL_FIELD1
  94149. CSI_CH_CFG_FIELD_SEL_MASK
  94150. CSI_CH_CFG_HFLIP_EN
  94151. CSI_CH_CFG_INPUT_FMT
  94152. CSI_CH_CFG_INPUT_FMT_MASK
  94153. CSI_CH_CFG_INPUT_SEQ
  94154. CSI_CH_CFG_INPUT_SEQ_MASK
  94155. CSI_CH_CFG_OUTPUT_FMT
  94156. CSI_CH_CFG_OUTPUT_FMT_MASK
  94157. CSI_CH_CFG_REG
  94158. CSI_CH_CFG_VFLIP_EN
  94159. CSI_CH_F0_BUFA_REG
  94160. CSI_CH_F1_BUFA_REG
  94161. CSI_CH_F2_BUFA_REG
  94162. CSI_CH_FIFO_STAT_REG
  94163. CSI_CH_FLD1_VSIZE_REG
  94164. CSI_CH_FLIP_SIZE_REG
  94165. CSI_CH_FLIP_SIZE_VALID_LEN
  94166. CSI_CH_FLIP_SIZE_VALID_LEN_MASK
  94167. CSI_CH_FLIP_SIZE_VER_LEN
  94168. CSI_CH_FLIP_SIZE_VER_LEN_MASK
  94169. CSI_CH_FRM_CLK_CNT_REG
  94170. CSI_CH_HSIZE_HOR_LEN
  94171. CSI_CH_HSIZE_HOR_LEN_MASK
  94172. CSI_CH_HSIZE_HOR_START
  94173. CSI_CH_HSIZE_HOR_START_MASK
  94174. CSI_CH_HSIZE_REG
  94175. CSI_CH_INT_EN_CD_INT_EN
  94176. CSI_CH_INT_EN_FD_INT_EN
  94177. CSI_CH_INT_EN_FIFO0_OF_INT_EN
  94178. CSI_CH_INT_EN_FIFO1_OF_INT_EN
  94179. CSI_CH_INT_EN_FIFO2_OF_INT_EN
  94180. CSI_CH_INT_EN_HB_OF_INT_EN
  94181. CSI_CH_INT_EN_MUL_ERR_INT_EN
  94182. CSI_CH_INT_EN_REG
  94183. CSI_CH_INT_EN_VS_INT_EN
  94184. CSI_CH_INT_STA_CD_PD
  94185. CSI_CH_INT_STA_FD_PD
  94186. CSI_CH_INT_STA_FIFO0_OF_PD
  94187. CSI_CH_INT_STA_FIFO1_OF_PD
  94188. CSI_CH_INT_STA_FIFO2_OF_PD
  94189. CSI_CH_INT_STA_HB_OF_PD
  94190. CSI_CH_INT_STA_MUL_ERR_PD
  94191. CSI_CH_INT_STA_REG
  94192. CSI_CH_INT_STA_VS_PD
  94193. CSI_CH_PCLK_STAT_REG
  94194. CSI_CH_SCALE_QUART_EN
  94195. CSI_CH_SCALE_REG
  94196. CSI_CH_STA_FIELD_STA_FIELD0
  94197. CSI_CH_STA_FIELD_STA_FIELD1
  94198. CSI_CH_STA_FIELD_STA_MASK
  94199. CSI_CH_STA_REG
  94200. CSI_CH_STA_SCAP_STA
  94201. CSI_CH_STA_VCAP_STA
  94202. CSI_CH_VSIZE_REG
  94203. CSI_CH_VSIZE_VER_LEN
  94204. CSI_CH_VSIZE_VER_LEN_MASK
  94205. CSI_CH_VSIZE_VER_START
  94206. CSI_CH_VSIZE_VER_START_MASK
  94207. CSI_CK
  94208. CSI_CLOCK
  94209. CSI_CN
  94210. CSI_COLOR_FIRST_COMP_MASK
  94211. CSI_COLOR_FIRST_ROW_MASK
  94212. CSI_CONFW
  94213. CSI_CONTROL
  94214. CSI_CP
  94215. CSI_CPD_BC
  94216. CSI_CPD_BS
  94217. CSI_CPD_CTRL
  94218. CSI_CPD_GBC
  94219. CSI_CPD_GBS
  94220. CSI_CPD_GRC
  94221. CSI_CPD_GRS
  94222. CSI_CPD_OFFSET1
  94223. CSI_CPD_OFFSET2
  94224. CSI_CPD_RC
  94225. CSI_CPD_RS
  94226. CSI_CPT_CTRL_IMAGE_START
  94227. CSI_CPT_CTRL_REG
  94228. CSI_CPT_CTRL_VIDEO_START
  94229. CSI_CSICR1
  94230. CSI_CSICR18
  94231. CSI_CSICR19
  94232. CSI_CSICR2
  94233. CSI_CSICR3
  94234. CSI_CSIDBG
  94235. CSI_CSIDMASA_FB1
  94236. CSI_CSIDMASA_FB2
  94237. CSI_CSIDMASA_STATFIFO
  94238. CSI_CSIDMATS_STATFIFO
  94239. CSI_CSIFBUF_PARA
  94240. CSI_CSIIMAG_PARA
  94241. CSI_CSIRXCNT
  94242. CSI_CSIRXFIFO
  94243. CSI_CSISR
  94244. CSI_DATA_DEST_IC
  94245. CSI_DATA_DEST_IDMAC
  94246. CSI_DEFAULT_HEIGHT
  94247. CSI_DEFAULT_WIDTH
  94248. CSI_DN0
  94249. CSI_DN1
  94250. CSI_DN2
  94251. CSI_DN3
  94252. CSI_DP0
  94253. CSI_DP1
  94254. CSI_DP2
  94255. CSI_DP3
  94256. CSI_EN_CSI_EN
  94257. CSI_EN_REG
  94258. CSI_EN_VER_EN
  94259. CSI_ERR
  94260. CSI_ERR_HALT
  94261. CSI_ERR_INTENA
  94262. CSI_FIELD_MB_YUV420
  94263. CSI_FIELD_MB_YUV422
  94264. CSI_FIELD_PLANAR_YUV420
  94265. CSI_FIELD_PLANAR_YUV422
  94266. CSI_FIELD_PRGB888
  94267. CSI_FIELD_RAW_10
  94268. CSI_FIELD_RAW_12
  94269. CSI_FIELD_RAW_8
  94270. CSI_FIELD_RGB565
  94271. CSI_FIELD_RGB888
  94272. CSI_FIELD_UV_CB_YUV420
  94273. CSI_FIELD_UV_CB_YUV420_10
  94274. CSI_FIELD_UV_CB_YUV422
  94275. CSI_FIELD_UV_CB_YUV422_10
  94276. CSI_FIFO_THRS_REG
  94277. CSI_FRAME_MB_YUV420
  94278. CSI_FRAME_MB_YUV422
  94279. CSI_FRAME_PLANAR_YUV420
  94280. CSI_FRAME_PLANAR_YUV422
  94281. CSI_FRAME_PRGB888
  94282. CSI_FRAME_RAW_10
  94283. CSI_FRAME_RAW_12
  94284. CSI_FRAME_RAW_8
  94285. CSI_FRAME_RGB565
  94286. CSI_FRAME_RGB888
  94287. CSI_FRAME_UV_CB_YUV420
  94288. CSI_FRAME_UV_CB_YUV422
  94289. CSI_HEADER_NOTIFICATION
  94290. CSI_HORI_DOWNSIZE_EN
  94291. CSI_HSC_MASK
  94292. CSI_HSC_SHIFT
  94293. CSI_ID_2_SKIP_MASK
  94294. CSI_ID_2_SKIP_SHIFT
  94295. CSI_IF_CFG_CLK_POL_FALLING_EDGE
  94296. CSI_IF_CFG_CLK_POL_MASK
  94297. CSI_IF_CFG_CLK_POL_RISING_EDGE
  94298. CSI_IF_CFG_CSI_IF_BT1120
  94299. CSI_IF_CFG_CSI_IF_BT656
  94300. CSI_IF_CFG_CSI_IF_MASK
  94301. CSI_IF_CFG_CSI_IF_YUV422_16BIT
  94302. CSI_IF_CFG_CSI_IF_YUV422_INTLV
  94303. CSI_IF_CFG_FIELD_MASK
  94304. CSI_IF_CFG_FIELD_NEGATIVE
  94305. CSI_IF_CFG_FIELD_POSITIVE
  94306. CSI_IF_CFG_FPS_DS_EN
  94307. CSI_IF_CFG_HREF_POL_MASK
  94308. CSI_IF_CFG_HREF_POL_NEGATIVE
  94309. CSI_IF_CFG_HREF_POL_POSITIVE
  94310. CSI_IF_CFG_IF_DATA_WIDTH_10BIT
  94311. CSI_IF_CFG_IF_DATA_WIDTH_12BIT
  94312. CSI_IF_CFG_IF_DATA_WIDTH_8BIT
  94313. CSI_IF_CFG_IF_DATA_WIDTH_MASK
  94314. CSI_IF_CFG_MIPI_IF_CSI
  94315. CSI_IF_CFG_MIPI_IF_MASK
  94316. CSI_IF_CFG_MIPI_IF_MIPI
  94317. CSI_IF_CFG_REG
  94318. CSI_IF_CFG_SRC_TYPE_INTERLACED
  94319. CSI_IF_CFG_SRC_TYPE_MASK
  94320. CSI_IF_CFG_SRC_TYPE_PROGRESSED
  94321. CSI_IF_CFG_VREF_POL_MASK
  94322. CSI_IF_CFG_VREF_POL_NEGATIVE
  94323. CSI_IF_CFG_VREF_POL_POSITIVE
  94324. CSI_INPUT_BT656
  94325. CSI_INPUT_FORMAT_RAW
  94326. CSI_INPUT_FORMAT_YUV420
  94327. CSI_INPUT_FORMAT_YUV422
  94328. CSI_INPUT_RAW
  94329. CSI_INPUT_SEQ_UYVY
  94330. CSI_INPUT_SEQ_VYUY
  94331. CSI_INPUT_SEQ_YUYV
  94332. CSI_INPUT_SEQ_YVYU
  94333. CSI_INPUT_YUV
  94334. CSI_INT
  94335. CSI_INT_CLR
  94336. CSI_INT_CPT_DONE
  94337. CSI_INT_ENA
  94338. CSI_INT_EN_REG
  94339. CSI_INT_FRM_DONE
  94340. CSI_INT_STA_REG
  94341. CSI_IRQ
  94342. CSI_KER_CK
  94343. CSI_KER_DIV122
  94344. CSI_MAX_BUFFER
  94345. CSI_MAX_HEIGHT
  94346. CSI_MAX_RATIO_SKIP_SMFC_MASK
  94347. CSI_MAX_RATIO_SKIP_SMFC_SHIFT
  94348. CSI_MAX_WIDTH
  94349. CSI_MCLK_ENC
  94350. CSI_MCLK_I2C
  94351. CSI_MCLK_RAW
  94352. CSI_MCLK_VF
  94353. CSI_MIPI_DI
  94354. CSI_NUM_PADS
  94355. CSI_OUTPUT_RAW_PASSTHROUGH
  94356. CSI_OUTPUT_YUV_420_MACRO
  94357. CSI_OUTPUT_YUV_420_PLANAR
  94358. CSI_OUTPUT_YUV_420_UV
  94359. CSI_OUTPUT_YUV_422_MACRO
  94360. CSI_OUTPUT_YUV_422_PLANAR
  94361. CSI_OUTPUT_YUV_422_UV
  94362. CSI_OUT_FRM_CTRL
  94363. CSI_PIX1_CLK
  94364. CSI_PIX1_RESET
  94365. CSI_PIX_CLK
  94366. CSI_PIX_CLK_MUX_SEL
  94367. CSI_PIX_RESET
  94368. CSI_PTN_ADDR_REG
  94369. CSI_PTN_LEN_REG
  94370. CSI_RDI1_CLK
  94371. CSI_RDI1_RESET
  94372. CSI_RDI2_CLK
  94373. CSI_RDI2_RESET
  94374. CSI_RDI_CLK
  94375. CSI_RDI_CLK_MUX_SEL
  94376. CSI_RDI_RESET
  94377. CSI_SENS_CONF
  94378. CSI_SENS_CONF_DATA_DEST_MASK
  94379. CSI_SENS_CONF_DATA_DEST_SHIFT
  94380. CSI_SENS_CONF_DATA_EN_POL_SHIFT
  94381. CSI_SENS_CONF_DATA_FMT_BAYER
  94382. CSI_SENS_CONF_DATA_FMT_JPEG
  94383. CSI_SENS_CONF_DATA_FMT_MASK
  94384. CSI_SENS_CONF_DATA_FMT_RGB444
  94385. CSI_SENS_CONF_DATA_FMT_RGB555
  94386. CSI_SENS_CONF_DATA_FMT_RGB565
  94387. CSI_SENS_CONF_DATA_FMT_RGB_YUV444
  94388. CSI_SENS_CONF_DATA_FMT_SHIFT
  94389. CSI_SENS_CONF_DATA_FMT_YUV422_UYVY
  94390. CSI_SENS_CONF_DATA_FMT_YUV422_YUYV
  94391. CSI_SENS_CONF_DATA_POL_SHIFT
  94392. CSI_SENS_CONF_DATA_WIDTH_SHIFT
  94393. CSI_SENS_CONF_DIVRATIO_MASK
  94394. CSI_SENS_CONF_DIVRATIO_SHIFT
  94395. CSI_SENS_CONF_EXT_VSYNC_SHIFT
  94396. CSI_SENS_CONF_FORCE_EOF_SHIFT
  94397. CSI_SENS_CONF_HSYNC_POL_SHIFT
  94398. CSI_SENS_CONF_JPEG8_EN_SHIFT
  94399. CSI_SENS_CONF_JPEG_EN_SHIFT
  94400. CSI_SENS_CONF_PACK_TIGHT_SHIFT
  94401. CSI_SENS_CONF_PIX_CLK_POL_SHIFT
  94402. CSI_SENS_CONF_SENS_PRTCL_MASK
  94403. CSI_SENS_CONF_SENS_PRTCL_SHIFT
  94404. CSI_SENS_CONF_VSYNC_POL_SHIFT
  94405. CSI_SENS_FRM_SIZE
  94406. CSI_SINK_PAD
  94407. CSI_SKIP
  94408. CSI_SKIP_SMFC_MASK
  94409. CSI_SKIP_SMFC_SHIFT
  94410. CSI_SRC_PAD_DIRECT
  94411. CSI_SRC_PAD_IDMAC
  94412. CSI_START
  94413. CSI_STATFIFO
  94414. CSI_STATUS
  94415. CSI_SUBDEV_PADS
  94416. CSI_SUBDEV_SINK
  94417. CSI_SUBDEV_SOURCE
  94418. CSI_SYNC_CNT_REG
  94419. CSI_TEST_GEN_B_MASK
  94420. CSI_TEST_GEN_B_SHIFT
  94421. CSI_TEST_GEN_G_MASK
  94422. CSI_TEST_GEN_G_SHIFT
  94423. CSI_TEST_GEN_MODE_EN
  94424. CSI_TEST_GEN_R_MASK
  94425. CSI_TEST_GEN_R_SHIFT
  94426. CSI_TST_CTRL
  94427. CSI_VERT_DOWNSIZE_EN
  94428. CSI_VER_REG
  94429. CSI_VSC_MASK
  94430. CSI_VSC_SHIFT
  94431. CSI_WIN_CTRL_H_ACTIVE
  94432. CSI_WIN_CTRL_H_REG
  94433. CSI_WIN_CTRL_W_ACTIVE
  94434. CSI_WIN_CTRL_W_REG
  94435. CSI_YUV_DATA_SEQ_UYVY
  94436. CSI_YUV_DATA_SEQ_VYUY
  94437. CSI_YUV_DATA_SEQ_YUYV
  94438. CSI_YUV_DATA_SEQ_YVYU
  94439. CSKY_MAX_REGS
  94440. CSKY_PMU_MAX_EVENTS
  94441. CSK_ABORT_REQ_RCVD
  94442. CSK_ABORT_RPL_PENDING
  94443. CSK_ABORT_RPL_WAIT
  94444. CSK_ABORT_SHUTDOWN
  94445. CSK_CALLBACKS_CHKD
  94446. CSK_CLOSE_CON_REQUESTED
  94447. CSK_CONN_INLINE
  94448. CSK_DDP_ENABLE
  94449. CSK_LOGIN_DONE
  94450. CSK_LOGIN_PDU_DONE
  94451. CSK_RST_ABORTED
  94452. CSK_STATE_ABORTING
  94453. CSK_STATE_CLOSING
  94454. CSK_STATE_CONNECTING
  94455. CSK_STATE_DEAD
  94456. CSK_STATE_ESTABLISHED
  94457. CSK_STATE_IDLE
  94458. CSK_STATE_LISTEN
  94459. CSK_STATE_MORIBUND
  94460. CSK_TLS_HANDSHK
  94461. CSK_TX_DATA_SENT
  94462. CSK_TX_FAILOVER
  94463. CSK_TX_MORE_DATA
  94464. CSK_TX_WAIT_IDLE
  94465. CSK_UPDATE_RCV_WND
  94466. CSL
  94467. CSMA_CA_RX_TURNAROUND
  94468. CSMA_MAX_BE
  94469. CSMA_MIN_BE
  94470. CSMB_CTRL_CMB_EN
  94471. CSMB_CTRL_CMB_NOW
  94472. CSMB_CTRL_SMB_EN
  94473. CSMB_CTRL_SMB_NOW
  94474. CSMI_BUS_TYPE_PCI
  94475. CSMI_BUS_TYPE_PCMCIA
  94476. CSMI_CC_FW_DOWNLOAD
  94477. CSMI_CC_GET_CNTLR_CFG
  94478. CSMI_CC_GET_CNTLR_STS
  94479. CSMI_CC_GET_CONN_INFO
  94480. CSMI_CC_GET_DEV_ADDR
  94481. CSMI_CC_GET_DRVR_INFO
  94482. CSMI_CC_GET_LINK_ERRORS
  94483. CSMI_CC_GET_PHY_INFO
  94484. CSMI_CC_GET_RAID_CFG
  94485. CSMI_CC_GET_RAID_INFO
  94486. CSMI_CC_GET_SATA_SIG
  94487. CSMI_CC_GET_SCSI_ADDR
  94488. CSMI_CC_PHY_CTRL
  94489. CSMI_CC_SAS_SMP_PASSTHRU
  94490. CSMI_CC_SET_PHY_INFO
  94491. CSMI_CC_SMP_PASSTHRU
  94492. CSMI_CC_SSP_PASSTHRU
  94493. CSMI_CC_STP_PASSTHRU
  94494. CSMI_CC_TASK_MGT
  94495. CSMI_CNTLRF_FWD_HRESET
  94496. CSMI_CNTLRF_FWD_ONLINE
  94497. CSMI_CNTLRF_FWD_RROM
  94498. CSMI_CNTLRF_FWD_SRESET
  94499. CSMI_CNTLRF_FWD_SUPPORT
  94500. CSMI_CNTLRF_SAS_HBA
  94501. CSMI_CNTLRF_SAS_RAID
  94502. CSMI_CNTLRF_SATA_HBA
  94503. CSMI_CNTLRF_SATA_RAID
  94504. CSMI_CNTLR_CLASS_HBA
  94505. CSMI_CNTLR_STS_FAILED
  94506. CSMI_CNTLR_STS_GOOD
  94507. CSMI_CNTLR_STS_OFFLINE
  94508. CSMI_CNTLR_STS_POWEROFF
  94509. CSMI_CON_AUTO
  94510. CSMI_CON_EXTERNAL
  94511. CSMI_CON_INTERNAL
  94512. CSMI_CON_SFF_8470_LANE_1
  94513. CSMI_CON_SFF_8470_LANE_2
  94514. CSMI_CON_SFF_8470_LANE_3
  94515. CSMI_CON_SFF_8470_LANE_4
  94516. CSMI_CON_SFF_8482
  94517. CSMI_CON_SFF_8484_LANE_1
  94518. CSMI_CON_SFF_8484_LANE_2
  94519. CSMI_CON_SFF_8484_LANE_3
  94520. CSMI_CON_SFF_8484_LANE_4
  94521. CSMI_CON_SWITCHABLE
  94522. CSMI_CON_UNKNOWN
  94523. CSMI_CTF_CTRL_CHAR
  94524. CSMI_CTF_NEG_DISP
  94525. CSMI_CTF_POS_DISP
  94526. CSMI_DISC_COMPLETE
  94527. CSMI_DISC_ERROR
  94528. CSMI_DISC_IN_PROGRESS
  94529. CSMI_DISC_NOT_STARTED
  94530. CSMI_DISC_NOT_SUPPORTED
  94531. CSMI_DRV_STS_DEGRADED
  94532. CSMI_DRV_STS_FAILED
  94533. CSMI_DRV_STS_OK
  94534. CSMI_DRV_STS_REBUILDING
  94535. CSMI_DRV_USE_MEMBER
  94536. CSMI_DRV_USE_NOT_USED
  94537. CSMI_DRV_USE_SPARE
  94538. CSMI_FWDF_HARD_RESET
  94539. CSMI_FWDF_SOFT_RESET
  94540. CSMI_FWDF_VALIDATE
  94541. CSMI_FWD_SEV_ERROR
  94542. CSMI_FWD_SEV_FATAL
  94543. CSMI_FWD_SEV_INFO
  94544. CSMI_FWD_SEV_WARNING
  94545. CSMI_FWD_STS_DOWNREV
  94546. CSMI_FWD_STS_FAILED
  94547. CSMI_FWD_STS_REJECT
  94548. CSMI_FWD_STS_SUCCESS
  94549. CSMI_FWD_STS_USING_RROM
  94550. CSMI_IOCTL_TIMEOUT
  94551. CSMI_MAJOR_REV
  94552. CSMI_MAJOR_REV_0_81
  94553. CSMI_MINOR_REV
  94554. CSMI_MINOR_REV_0_81
  94555. CSMI_NEG_RATE_NEGOTIATE
  94556. CSMI_NEG_RATE_PHY_DIS
  94557. CSMI_OFFLINE_BUS_DEGRADED
  94558. CSMI_OFFLINE_BUS_FAILURE
  94559. CSMI_OFFLINE_INITIALIZING
  94560. CSMI_OFFLINE_NO_REASON
  94561. CSMI_PC_FP_ALIGN
  94562. CSMI_PC_FP_CJPAT
  94563. CSMI_PC_FUNC_GET_SETUP
  94564. CSMI_PC_PATF_DIS_ALIGN
  94565. CSMI_PC_PATF_DIS_SCR
  94566. CSMI_PC_PATF_DIS_SSC
  94567. CSMI_PC_PATF_FIXED
  94568. CSMI_PC_RXF_EQ_DIS
  94569. CSMI_PC_TXF_PREEMP_DIS
  94570. CSMI_PC_TYPE_SAS
  94571. CSMI_PC_TYPE_SATA
  94572. CSMI_PC_TYPE_UNDEFINED
  94573. CSMI_PHY_ACTIVATE_CTRL
  94574. CSMI_PHY_AUTO_COMWAKE
  94575. CSMI_PHY_UPD_SPINUP_RATE
  94576. CSMI_RESET_CNTS_NO
  94577. CSMI_RESET_CNTS_YES
  94578. CSMI_SIG_CLASS_DIRECT
  94579. CSMI_SIG_CLASS_ENCLOSURE
  94580. CSMI_SIG_CLASS_SERVER
  94581. CSMI_SIG_CLASS_UNKNOWN
  94582. CSMI_SLOT_NUM_UNKNOWN
  94583. CSMI_SSPF_DD_READ
  94584. CSMI_SSPF_DD_UNSPECIFIED
  94585. CSMI_SSPF_DD_WRITE
  94586. CSMI_SSPF_TA_ACA
  94587. CSMI_SSPF_TA_HEAD_OF_Q
  94588. CSMI_SSPF_TA_ORDERED
  94589. CSMI_SSPF_TA_SIMPLE
  94590. CSMI_STPF_DD_READ
  94591. CSMI_STPF_DD_UNSPECIFIED
  94592. CSMI_STPF_DD_WRITE
  94593. CSMI_STPF_DMA
  94594. CSMI_STPF_DMA_QUEUED
  94595. CSMI_STPF_EXECUTE_DIAG
  94596. CSMI_STPF_PACKET
  94597. CSMI_STPF_PIO
  94598. CSMI_STPF_RESET_DEVICE
  94599. CSMI_STS_BAD_CTRL_CODE
  94600. CSMI_STS_CONNECTION_FAILED
  94601. CSMI_STS_FAILED
  94602. CSMI_STS_INV_LINK_RATE
  94603. CSMI_STS_INV_PARAM
  94604. CSMI_STS_INV_PHY
  94605. CSMI_STS_INV_PHY_FOR_PORT
  94606. CSMI_STS_INV_PORT
  94607. CSMI_STS_INV_RAID_SET
  94608. CSMI_STS_NOT_AN_END_DEV
  94609. CSMI_STS_NO_DEV_ADDR
  94610. CSMI_STS_NO_SATA_DEV
  94611. CSMI_STS_NO_SATA_SIGNATURE
  94612. CSMI_STS_NO_SCSI_ADDR
  94613. CSMI_STS_PHY_CHANGED
  94614. CSMI_STS_PHY_UNCHANGEABLE
  94615. CSMI_STS_PHY_UNSELECTABLE
  94616. CSMI_STS_PORT_UNSELECTABLE
  94617. CSMI_STS_SCSI_EMULATION
  94618. CSMI_STS_SELECT_PHY_OR_PORT
  94619. CSMI_STS_SUCCESS
  94620. CSMI_STS_WRITE_ATTEMPTED
  94621. CSMI_TASK
  94622. CSMI_TMF_HARD_RST
  94623. CSMI_TMF_SUPPRESS_RSLT
  94624. CSMI_TMF_TASK_IU
  94625. CSMI_TM_INFO_DEMAND
  94626. CSMI_TM_INFO_EXCEEDED
  94627. CSMI_TM_INFO_TEST
  94628. CSMI_TM_INFO_TRIGGER
  94629. CSMODE_AFT
  94630. CSMODE_BEF
  94631. CSMODE_CG
  94632. CSMODE_CI_INACTIVEHIGH
  94633. CSMODE_CP_BEGIN_EDGECLK
  94634. CSMODE_DIV16
  94635. CSMODE_INIT_VAL
  94636. CSMODE_LEN
  94637. CSMODE_PM
  94638. CSMODE_POL_1
  94639. CSMODE_REV
  94640. CSMR
  94641. CSMSADRCFG
  94642. CSM_FRAG
  94643. CSM_IPKT
  94644. CSM_IPOK
  94645. CSM_RUNNING
  94646. CSM_SOFT_RESET
  94647. CSM_TCPKT
  94648. CSM_TUPOK
  94649. CSM_UDPKT
  94650. CSOR_GPCM_ADM_MASK
  94651. CSOR_GPCM_ADM_SHIFT
  94652. CSOR_GPCM_ADM_SHIFT_SHIFT
  94653. CSOR_GPCM_BCTLD
  94654. CSOR_GPCM_GAPERRD
  94655. CSOR_GPCM_GAPERRD_MASK
  94656. CSOR_GPCM_GAPERRD_SHIFT
  94657. CSOR_GPCM_GPMODE_ASIC
  94658. CSOR_GPCM_GPMODE_NORMAL
  94659. CSOR_GPCM_GPTO
  94660. CSOR_GPCM_GPTO_MASK
  94661. CSOR_GPCM_GPTO_SHIFT
  94662. CSOR_GPCM_PARITY_EVEN
  94663. CSOR_GPCM_PAR_EN
  94664. CSOR_GPCM_RGETA_EXT
  94665. CSOR_GPCM_TRHZ_100
  94666. CSOR_GPCM_TRHZ_20
  94667. CSOR_GPCM_TRHZ_40
  94668. CSOR_GPCM_TRHZ_60
  94669. CSOR_GPCM_TRHZ_80
  94670. CSOR_GPCM_TRHZ_MASK
  94671. CSOR_GPCM_WGETA_EXT
  94672. CSOR_NAND_BCTLD
  94673. CSOR_NAND_ECC_DEC_EN
  94674. CSOR_NAND_ECC_ENC_EN
  94675. CSOR_NAND_ECC_MODE_4
  94676. CSOR_NAND_ECC_MODE_8
  94677. CSOR_NAND_ECC_MODE_MASK
  94678. CSOR_NAND_PB
  94679. CSOR_NAND_PB_MASK
  94680. CSOR_NAND_PB_SHIFT
  94681. CSOR_NAND_PGS_2K
  94682. CSOR_NAND_PGS_4K
  94683. CSOR_NAND_PGS_512
  94684. CSOR_NAND_PGS_8K
  94685. CSOR_NAND_PGS_MASK
  94686. CSOR_NAND_PGS_SHIFT
  94687. CSOR_NAND_RAL_1
  94688. CSOR_NAND_RAL_2
  94689. CSOR_NAND_RAL_3
  94690. CSOR_NAND_RAL_4
  94691. CSOR_NAND_RAL_MASK
  94692. CSOR_NAND_RAL_SHIFT
  94693. CSOR_NAND_SPRZ_128
  94694. CSOR_NAND_SPRZ_16
  94695. CSOR_NAND_SPRZ_210
  94696. CSOR_NAND_SPRZ_218
  94697. CSOR_NAND_SPRZ_224
  94698. CSOR_NAND_SPRZ_64
  94699. CSOR_NAND_SPRZ_CSOR_EXT
  94700. CSOR_NAND_SPRZ_MASK
  94701. CSOR_NAND_SPRZ_SHIFT
  94702. CSOR_NAND_TRHZ_100
  94703. CSOR_NAND_TRHZ_20
  94704. CSOR_NAND_TRHZ_40
  94705. CSOR_NAND_TRHZ_60
  94706. CSOR_NAND_TRHZ_80
  94707. CSOR_NAND_TRHZ_MASK
  94708. CSOR_NAND_TRHZ_SHIFT
  94709. CSOR_NOR_ADM_MASK
  94710. CSOR_NOR_ADM_SHFT_MODE_EN
  94711. CSOR_NOR_ADM_SHIFT
  94712. CSOR_NOR_ADM_SHIFT_SHIFT
  94713. CSOR_NOR_AVD_TGL_PGM_EN
  94714. CSOR_NOR_BCTLD
  94715. CSOR_NOR_NOR_MODE_AVD_NOR
  94716. CSOR_NOR_NOR_MODE_AYSNC_NOR
  94717. CSOR_NOR_PGRD_EN
  94718. CSOR_NOR_TRHZ_100
  94719. CSOR_NOR_TRHZ_20
  94720. CSOR_NOR_TRHZ_40
  94721. CSOR_NOR_TRHZ_60
  94722. CSOR_NOR_TRHZ_80
  94723. CSOR_NOR_TRHZ_MASK
  94724. CSOR_NOR_TRHZ_SHIFT
  94725. CSPPCF_BRIDGE_ACTIVE_INT2
  94726. CSPPCF_BRIDGE_BIG_ENDIAN
  94727. CSPPC_BRIDGE_ENDIAN
  94728. CSPPC_BRIDGE_INT
  94729. CSPPC_PCI_BRIDGE
  94730. CSPRIV_CONNECT__DOORBELL_OFFSET_MASK
  94731. CSPRIV_CONNECT__DOORBELL_OFFSET__SHIFT
  94732. CSPRIV_CONNECT__QUEUE_ID_MASK
  94733. CSPRIV_CONNECT__QUEUE_ID__SHIFT
  94734. CSPRIV_CONNECT__UNORD_DISP_MASK
  94735. CSPRIV_CONNECT__UNORD_DISP__SHIFT
  94736. CSPRIV_CONNECT__VMID_MASK
  94737. CSPRIV_CONNECT__VMID__SHIFT
  94738. CSPRIV_THREAD_TRACE_EVENT__EVENT_ID_MASK
  94739. CSPRIV_THREAD_TRACE_EVENT__EVENT_ID__SHIFT
  94740. CSPRIV_THREAD_TRACE_TG0__TGID_X_MASK
  94741. CSPRIV_THREAD_TRACE_TG0__TGID_X__SHIFT
  94742. CSPRIV_THREAD_TRACE_TG1__TGID_Y_MASK
  94743. CSPRIV_THREAD_TRACE_TG1__TGID_Y__SHIFT
  94744. CSPRIV_THREAD_TRACE_TG2__TGID_Z_MASK
  94745. CSPRIV_THREAD_TRACE_TG2__TGID_Z__SHIFT
  94746. CSPRIV_THREAD_TRACE_TG3__FIRST_TG_MASK
  94747. CSPRIV_THREAD_TRACE_TG3__FIRST_TG__SHIFT
  94748. CSPRIV_THREAD_TRACE_TG3__LAST_TG_MASK
  94749. CSPRIV_THREAD_TRACE_TG3__LAST_TG__SHIFT
  94750. CSPRIV_THREAD_TRACE_TG3__PARTIAL_X_FLAG_MASK
  94751. CSPRIV_THREAD_TRACE_TG3__PARTIAL_X_FLAG__SHIFT
  94752. CSPRIV_THREAD_TRACE_TG3__PARTIAL_Y_FLAG_MASK
  94753. CSPRIV_THREAD_TRACE_TG3__PARTIAL_Y_FLAG__SHIFT
  94754. CSPRIV_THREAD_TRACE_TG3__PARTIAL_Z_FLAG_MASK
  94755. CSPRIV_THREAD_TRACE_TG3__PARTIAL_Z_FLAG__SHIFT
  94756. CSPRIV_THREAD_TRACE_TG3__THREADS_IN_GROUP_MASK
  94757. CSPRIV_THREAD_TRACE_TG3__THREADS_IN_GROUP__SHIFT
  94758. CSPRIV_THREAD_TRACE_TG3__WAVE_ID_BASE_MASK
  94759. CSPRIV_THREAD_TRACE_TG3__WAVE_ID_BASE__SHIFT
  94760. CSPR_BA
  94761. CSPR_BA_SHIFT
  94762. CSPR_MSEL
  94763. CSPR_MSEL_GPCM
  94764. CSPR_MSEL_NAND
  94765. CSPR_MSEL_NOR
  94766. CSPR_MSEL_SHIFT
  94767. CSPR_PORT_SIZE
  94768. CSPR_PORT_SIZE_16
  94769. CSPR_PORT_SIZE_32
  94770. CSPR_PORT_SIZE_8
  94771. CSPR_PORT_SIZE_SHIFT
  94772. CSPR_V
  94773. CSPR_V_SHIFT
  94774. CSPR_WP
  94775. CSPR_WP_SHIFT
  94776. CSP_HDR_VALUE
  94777. CSP_PROGRAM_ADPCM_CAPTURE
  94778. CSP_PROGRAM_ADPCM_INIT
  94779. CSP_PROGRAM_ADPCM_PLAYBACK
  94780. CSP_PROGRAM_ALAW
  94781. CSP_PROGRAM_COUNT
  94782. CSP_PROGRAM_MULAW
  94783. CSP__HEADER
  94784. CSR
  94785. CSR0
  94786. CSR0_BABL
  94787. CSR0_CERR
  94788. CSR0_CLRALL
  94789. CSR0_ERR
  94790. CSR0_IDON
  94791. CSR0_IENA
  94792. CSR0_INEA
  94793. CSR0_INIT
  94794. CSR0_INTEN
  94795. CSR0_INTR
  94796. CSR0_MERR
  94797. CSR0_MISS
  94798. CSR0_NORMAL
  94799. CSR0_REVISION
  94800. CSR0_RINT
  94801. CSR0_RXON
  94802. CSR0_START
  94803. CSR0_STOP
  94804. CSR0_STRT
  94805. CSR0_TDMD
  94806. CSR0_TINT
  94807. CSR0_TXON
  94808. CSR0_TXPOLL
  94809. CSR1
  94810. CSR10
  94811. CSR104
  94812. CSR105
  94813. CSR108
  94814. CSR109
  94815. CSR11
  94816. CSR112
  94817. CSR114
  94818. CSR11_CWMAX
  94819. CSR11_CWMIN
  94820. CSR11_CW_SELECT
  94821. CSR11_LONG_RETRY
  94822. CSR11_SHORT_RETRY
  94823. CSR11_SLOT_TIME
  94824. CSR12
  94825. CSR124
  94826. CSR12_BEACON_INTERVAL
  94827. CSR12_CFP_MAX_DURATION
  94828. CSR12_IN_SROM
  94829. CSR13
  94830. CSR13_ATIMW_DURATION
  94831. CSR13_CFP_PERIOD
  94832. CSR14
  94833. CSR14_BEACON_GEN
  94834. CSR14_CFP_COUNT_PRELOAD
  94835. CSR14_TATIMW
  94836. CSR14_TBCM_PRELOAD
  94837. CSR14_TBCN
  94838. CSR14_TCFP
  94839. CSR14_TSF_COUNT
  94840. CSR14_TSF_SYNC
  94841. CSR15
  94842. CSR15_ATIMW
  94843. CSR15_BEACON_SENT
  94844. CSR15_CFP
  94845. CSR16
  94846. CSR16_LOW_TSFTIMER
  94847. CSR17
  94848. CSR17_HIGH_TSFTIMER
  94849. CSR18
  94850. CSR18_PIFS
  94851. CSR18_SIFS
  94852. CSR19
  94853. CSR19_DIFS
  94854. CSR19_EIFS
  94855. CSR1_BBP_RESET
  94856. CSR1_HOST_READY
  94857. CSR1_SOFT_RESET
  94858. CSR2
  94859. CSR20
  94860. CSR20_AUTOWAKE
  94861. CSR20_DELAY_AFTER_TBCN
  94862. CSR20_TBCN_BEFORE_WAKEUP
  94863. CSR21
  94864. CSR21_EEPROM_CHIP_SELECT
  94865. CSR21_EEPROM_DATA_CLOCK
  94866. CSR21_EEPROM_DATA_IN
  94867. CSR21_EEPROM_DATA_OUT
  94868. CSR21_RELOAD
  94869. CSR21_TYPE_93C46
  94870. CSR22
  94871. CSR22_CFP_DURATION_REMAIN
  94872. CSR22_RELOAD_CFP_DURATION
  94873. CSR23
  94874. CSR24
  94875. CSR25
  94876. CSR26
  94877. CSR27
  94878. CSR28
  94879. CSR29
  94880. CSR3
  94881. CSR30
  94882. CSR31
  94883. CSR32
  94884. CSR33
  94885. CSR34
  94886. CSR35
  94887. CSR36
  94888. CSR37
  94889. CSR38
  94890. CSR39
  94891. CSR39_ANA_PLL_CFG_VAL
  94892. CSR39_FH_INT_BIT_RX_CHNL2
  94893. CSR39_FH_INT_BIT_TX_CHNL6
  94894. CSR39_FH_INT_RX_MASK
  94895. CSR39_FH_INT_TX_MASK
  94896. CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A
  94897. CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B
  94898. CSR39_HW_IF_CONFIG_REG_BIT_3945_MB
  94899. CSR39_HW_IF_CONFIG_REG_BIT_3945_MM
  94900. CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
  94901. CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC
  94902. CSR3_ACON
  94903. CSR3_BABLM
  94904. CSR3_BCON
  94905. CSR3_BSWP
  94906. CSR3_BYTE0
  94907. CSR3_BYTE1
  94908. CSR3_BYTE2
  94909. CSR3_BYTE3
  94910. CSR3_DXMT2PD
  94911. CSR3_DXSUFLO
  94912. CSR3_EMBA
  94913. CSR3_IDONM
  94914. CSR3_LAPPEN
  94915. CSR3_MASKALL
  94916. CSR3_MERRM
  94917. CSR3_MISSM
  94918. CSR3_RINTM
  94919. CSR3_TINTM
  94920. CSR4
  94921. CSR40
  94922. CSR41
  94923. CSR42
  94924. CSR43
  94925. CSR44
  94926. CSR45
  94927. CSR46
  94928. CSR47
  94929. CSR48
  94930. CSR49
  94931. CSR49_FH_INT_RX_MASK
  94932. CSR49_FH_INT_TX_MASK
  94933. CSR49_HW_IF_CONFIG_REG_BIT_4965_R
  94934. CSR4_APAD_XMIT
  94935. CSR4_ASTRP_RCV
  94936. CSR4_BYTE4
  94937. CSR4_BYTE5
  94938. CSR4_JAB
  94939. CSR4_JABM
  94940. CSR4_MFCO
  94941. CSR4_MFCOM
  94942. CSR4_RCVCCO
  94943. CSR4_RCVCCOM
  94944. CSR4_TXSTRT
  94945. CSR4_TXSTRTM
  94946. CSR5
  94947. CSR50
  94948. CSR50_ANA_PLL_CFG_VAL
  94949. CSR51
  94950. CSR52
  94951. CSR53
  94952. CSR54
  94953. CSR55
  94954. CSR56
  94955. CSR57
  94956. CSR58
  94957. CSR59
  94958. CSR5_BYTE0
  94959. CSR5_BYTE1
  94960. CSR5_BYTE2
  94961. CSR5_BYTE3
  94962. CSR5_RS
  94963. CSR5_SUSPEND
  94964. CSR5_TS
  94965. CSR6
  94966. CSR60
  94967. CSR61
  94968. CSR62
  94969. CSR63
  94970. CSR64
  94971. CSR65
  94972. CSR66
  94973. CSR67
  94974. CSR68
  94975. CSR69
  94976. CSR6_BYTE4
  94977. CSR6_BYTE5
  94978. CSR7
  94979. CSR70
  94980. CSR71
  94981. CSR72
  94982. CSR74
  94983. CSR76
  94984. CSR78
  94985. CSR7_DECRYPTION_DONE
  94986. CSR7_ENCRYPTION_DONE
  94987. CSR7_RXDONE
  94988. CSR7_TATIMW_EXPIRE
  94989. CSR7_TBCN_EXPIRE
  94990. CSR7_TIMER_CSR3_EXPIRE
  94991. CSR7_TWAKE_EXPIRE
  94992. CSR7_TXDONE_ATIMRING
  94993. CSR7_TXDONE_PRIORING
  94994. CSR7_TXDONE_TXRING
  94995. CSR7_UART1_IDLE_TRESHOLD
  94996. CSR7_UART1_RX_BUFF_ERROR
  94997. CSR7_UART1_RX_TRESHOLD
  94998. CSR7_UART1_TX_BUFF_ERROR
  94999. CSR7_UART1_TX_TRESHOLD
  95000. CSR7_UART2_IDLE_TRESHOLD
  95001. CSR7_UART2_RX_BUFF_ERROR
  95002. CSR7_UART2_RX_TRESHOLD
  95003. CSR7_UART2_TX_BUFF_ERROR
  95004. CSR7_UART2_TX_TRESHOLD
  95005. CSR8
  95006. CSR80
  95007. CSR82
  95008. CSR84
  95009. CSR85
  95010. CSR86
  95011. CSR88
  95012. CSR89
  95013. CSR8_DECRYPTION_DONE
  95014. CSR8_ENCRYPTION_DONE
  95015. CSR8_RXDONE
  95016. CSR8_TATIMW_EXPIRE
  95017. CSR8_TBCN_EXPIRE
  95018. CSR8_TIMER_CSR3_EXPIRE
  95019. CSR8_TWAKE_EXPIRE
  95020. CSR8_TXDONE_ATIMRING
  95021. CSR8_TXDONE_PRIORING
  95022. CSR8_TXDONE_TXRING
  95023. CSR8_UART1_IDLE_TRESHOLD
  95024. CSR8_UART1_RX_BUFF_ERROR
  95025. CSR8_UART1_RX_TRESHOLD
  95026. CSR8_UART1_TX_BUFF_ERROR
  95027. CSR8_UART1_TX_TRESHOLD
  95028. CSR8_UART2_IDLE_TRESHOLD
  95029. CSR8_UART2_RX_BUFF_ERROR
  95030. CSR8_UART2_RX_TRESHOLD
  95031. CSR8_UART2_TX_BUFF_ERROR
  95032. CSR8_UART2_TX_TRESHOLD
  95033. CSR9
  95034. CSR92
  95035. CSR94
  95036. CSR96
  95037. CSR97
  95038. CSR98
  95039. CSR99
  95040. CSR9_MAX_FRAME_UNIT
  95041. CSRB
  95042. CSRBUF_SIZE
  95043. CSRNAME_LEN
  95044. CSRX_64BIT_SLOT
  95045. CSRX_DMA_ACTIVE
  95046. CSRX_DMA_SHUTDOWN
  95047. CSRX_FLASH_ACCESS_ERROR
  95048. CSRX_FLASH_ENABLE
  95049. CSRX_FUNCTION
  95050. CSRX_ISP_SOFT_RESET
  95051. CSRX_MAX_WRT_BURST_MASK
  95052. CSRX_PCIX_BUS_MODE_MASK
  95053. CSR_53C80_INTR
  95054. CSR_53C80_REG
  95055. CSR_ABORT
  95056. CSR_ADDR_BASE
  95057. CSR_AGENT_MASK
  95058. CSR_ANA_PLL_CFG
  95059. CSR_ASSIGN
  95060. CSR_AUTO_FUNC_BOOT_ENA
  95061. CSR_AUTO_FUNC_INIT
  95062. CSR_BAD_STATUS
  95063. CSR_BANDWIDTH_AVAILABLE
  95064. CSR_BASE
  95065. CSR_BASE_ADDR
  95066. CSR_BIT
  95067. CSR_BOOT_ENABLE
  95068. CSR_BROADCAST_CHANNEL
  95069. CSR_BUSY
  95070. CSR_BUSY_TIMEOUT
  95071. CSR_BUS_MANAGER_ID
  95072. CSR_BUS_TIME
  95073. CSR_CACHE_SIZE
  95074. CSR_CHANNELS_AVAILABLE
  95075. CSR_CHANNELS_AVAILABLE_HI
  95076. CSR_CHANNELS_AVAILABLE_LO
  95077. CSR_CLASSREV
  95078. CSR_CLEARBIT
  95079. CSR_CLK
  95080. CSR_CLR_RESET
  95081. CSR_CMD_CLR_BAD_PAR
  95082. CSR_CMD_CLR_H2R_INT
  95083. CSR_CMD_CLR_PAUSE
  95084. CSR_CMD_CLR_R2PCI_INT
  95085. CSR_CMD_CLR_RST
  95086. CSR_CMD_NOP
  95087. CSR_CMD_PARM_SHIFT
  95088. CSR_CMD_PAR_EN
  95089. CSR_CMD_SET_BAD_PAR
  95090. CSR_CMD_SET_H2R_INT
  95091. CSR_CMD_SET_PAUSE
  95092. CSR_CMD_SET_RST
  95093. CSR_CNT0
  95094. CSR_CNT0CMD
  95095. CSR_CNT1
  95096. CSR_CNT1CMD
  95097. CSR_CONFIG_ROM
  95098. CSR_CONFIG_ROM_END
  95099. CSR_CPU_SHIFT
  95100. CSR_CSRBASEMASK
  95101. CSR_CSRBASEOFFSET
  95102. CSR_CTXT_INFO_ADDR
  95103. CSR_CTXT_INFO_BA
  95104. CSR_CTXT_INFO_BOOT_CTRL
  95105. CSR_CTX_POINTER
  95106. CSR_CYCLE
  95107. CSR_CYCLEH
  95108. CSR_CYCLE_TIME
  95109. CSR_DBG_HPET_MEM_REG
  95110. CSR_DBG_HPET_MEM_REG_VAL
  95111. CSR_DBG_LINK_PWR_MGMT_REG
  95112. CSR_DEF
  95113. CSR_DEFAULT_FW_OFFSET
  95114. CSR_DELAY
  95115. CSR_DEPENDENT_INFO
  95116. CSR_DESCRIPTOR
  95117. CSR_DESC_CLEAR
  95118. CSR_DESC_CLR
  95119. CSR_DESC_SET
  95120. CSR_DIRECTORY
  95121. CSR_DIRECTORY_ID
  95122. CSR_DISC
  95123. CSR_DIS_POL
  95124. CSR_DMA_ACTIVE
  95125. CSR_DMA_BUSERR
  95126. CSR_DMA_CONFLICT
  95127. CSR_DMA_ENABLE
  95128. CSR_DMA_INT
  95129. CSR_DONE
  95130. CSR_DOORBELL
  95131. CSR_DOORBELL_PCI
  95132. CSR_DOORBELL_SA110
  95133. CSR_DOORBELL_SETUP
  95134. CSR_DRAM_INIT_TBL_WRAP_CHECK
  95135. CSR_DRAM_INIT_TBL_WRITE_POINTER
  95136. CSR_DRAM_INT_TBL_ENABLE
  95137. CSR_DRAM_INT_TBL_REG
  95138. CSR_DREAD_RST
  95139. CSR_DREAD_RUN
  95140. CSR_DTS
  95141. CSR_DWE
  95142. CSR_DWRITE_RST
  95143. CSR_DWRITE_RUN
  95144. CSR_ECM_CFG_0_ADDR
  95145. CSR_ECM_CFG_1_ADDR
  95146. CSR_EEPROM_GP
  95147. CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP
  95148. CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP
  95149. CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K
  95150. CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K
  95151. CSR_EEPROM_GP_IF_OWNER_MSK
  95152. CSR_EEPROM_GP_VALID_MSK
  95153. CSR_EEPROM_REG
  95154. CSR_EEPROM_REG_BIT_CMD
  95155. CSR_EEPROM_REG_MSK_ADDR
  95156. CSR_EEPROM_REG_MSK_DATA
  95157. CSR_EEPROM_REG_READ_VALID_MSK
  95158. CSR_ENA_POL
  95159. CSR_ERR
  95160. CSR_ERROR
  95161. CSR_ERR_STS_MASK
  95162. CSR_FATAL_ERROR
  95163. CSR_FCP_COMMAND
  95164. CSR_FCP_END
  95165. CSR_FCP_RESPONSE
  95166. CSR_FH_INT_BIT_ERR
  95167. CSR_FH_INT_BIT_HI_PRIOR
  95168. CSR_FH_INT_BIT_RX_CHNL0
  95169. CSR_FH_INT_BIT_RX_CHNL1
  95170. CSR_FH_INT_BIT_TX_CHNL0
  95171. CSR_FH_INT_BIT_TX_CHNL1
  95172. CSR_FH_INT_RX_MASK
  95173. CSR_FH_INT_STATUS
  95174. CSR_FH_INT_TX_MASK
  95175. CSR_FIFO
  95176. CSR_FIFO_CLEAR
  95177. CSR_FIFO_CLR
  95178. CSR_FIFO_EMPTY
  95179. CSR_FIFO_SET
  95180. CSR_FIQ_DISABLE
  95181. CSR_FIQ_ENABLE
  95182. CSR_FIQ_RAWSTATUS
  95183. CSR_FIQ_SOFT
  95184. CSR_FIQ_STATUS
  95185. CSR_FLASH_64K_BANK
  95186. CSR_FLASH_ENABLE
  95187. CSR_FORCE_SOFT_RESET
  95188. CSR_FUNC_NUM
  95189. CSR_F_100M
  95190. CSR_F_150M
  95191. CSR_F_250M
  95192. CSR_F_300M
  95193. CSR_F_35M
  95194. CSR_F_60M
  95195. CSR_G0_NODE_IDS
  95196. CSR_G3_EXT_IRQ_GEN
  95197. CSR_GATED_53C80_IRQ
  95198. CSR_GIO_CHICKEN_BITS
  95199. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER
  95200. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
  95201. CSR_GIO_REG
  95202. CSR_GIO_REG_VAL_L0S_ENABLED
  95203. CSR_GOOD
  95204. CSR_GPIO_IN
  95205. CSR_GPIO_IN_BIT_AUX_POWER
  95206. CSR_GPIO_IN_VAL_VAUX_PWR_SRC
  95207. CSR_GPIO_IN_VAL_VMAIN_PWR_SRC
  95208. CSR_GP_CNTRL
  95209. CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP
  95210. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
  95211. CSR_GP_CNTRL_REG_FLAG_INIT_DONE
  95212. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
  95213. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
  95214. CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE
  95215. CSR_GP_CNTRL_REG_FLAG_RFKILL_WAKE_L1A_EN
  95216. CSR_GP_CNTRL_REG_FLAG_XTAL_ON
  95217. CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE
  95218. CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN
  95219. CSR_GP_DRIVER_REG
  95220. CSR_GP_DRIVER_REG_BIT_6050_1x2
  95221. CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6
  95222. CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER
  95223. CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_HYB
  95224. CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA
  95225. CSR_GP_DRIVER_REG_BIT_RADIO_SKU_3x3_HYB
  95226. CSR_GP_DRIVER_REG_BIT_RADIO_SKU_MSK
  95227. CSR_GP_REG_MAC_POWER_SAVE
  95228. CSR_GP_REG_NO_POWER_SAVE
  95229. CSR_GP_REG_PHY_POWER_SAVE
  95230. CSR_GP_REG_POWER_SAVE_ERROR
  95231. CSR_GP_REG_POWER_SAVE_STATUS_MSK
  95232. CSR_GP_UCODE_REG
  95233. CSR_HARDWARE_VERSION
  95234. CSR_HCDATA
  95235. CSR_HCINDEX
  95236. CSR_HOST_BUF_NOT_RDY
  95237. CSR_HOST_CHICKEN
  95238. CSR_HOST_CHICKEN_PM_IDLE_SRC_DIS_SB_PME
  95239. CSR_HPI_RST
  95240. CSR_HPI_RUN
  95241. CSR_HRI
  95242. CSR_HTP_ADDR_SKL
  95243. CSR_HTP_SKL
  95244. CSR_HW_IF_CONFIG_REG
  95245. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM
  95246. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A
  95247. CSR_HW_IF_CONFIG_REG_BIT_MAC_SI
  95248. CSR_HW_IF_CONFIG_REG_BIT_MONITOR_SRAM
  95249. CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE
  95250. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
  95251. CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI
  95252. CSR_HW_IF_CONFIG_REG_D3_DEBUG
  95253. CSR_HW_IF_CONFIG_REG_ENABLE_PME
  95254. CSR_HW_IF_CONFIG_REG_MSK_BOARD_VER
  95255. CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH
  95256. CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP
  95257. CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH
  95258. CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP
  95259. CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE
  95260. CSR_HW_IF_CONFIG_REG_PERSIST_MODE
  95261. CSR_HW_IF_CONFIG_REG_POS_BOARD_VER
  95262. CSR_HW_IF_CONFIG_REG_POS_MAC_DASH
  95263. CSR_HW_IF_CONFIG_REG_POS_MAC_STEP
  95264. CSR_HW_IF_CONFIG_REG_POS_PHY_DASH
  95265. CSR_HW_IF_CONFIG_REG_POS_PHY_STEP
  95266. CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE
  95267. CSR_HW_IF_CONFIG_REG_PREPARE
  95268. CSR_HW_REV
  95269. CSR_HW_REV_DASH
  95270. CSR_HW_REV_STEP
  95271. CSR_HW_REV_TYPE
  95272. CSR_HW_REV_TYPE_1000
  95273. CSR_HW_REV_TYPE_105
  95274. CSR_HW_REV_TYPE_135
  95275. CSR_HW_REV_TYPE_2x00
  95276. CSR_HW_REV_TYPE_2x30
  95277. CSR_HW_REV_TYPE_5100
  95278. CSR_HW_REV_TYPE_5150
  95279. CSR_HW_REV_TYPE_5300
  95280. CSR_HW_REV_TYPE_5350
  95281. CSR_HW_REV_TYPE_6150
  95282. CSR_HW_REV_TYPE_6x00
  95283. CSR_HW_REV_TYPE_6x05
  95284. CSR_HW_REV_TYPE_6x30
  95285. CSR_HW_REV_TYPE_6x35
  95286. CSR_HW_REV_TYPE_6x50
  95287. CSR_HW_REV_TYPE_7265D
  95288. CSR_HW_REV_TYPE_HR_CDB
  95289. CSR_HW_REV_TYPE_MSK
  95290. CSR_HW_REV_TYPE_NONE
  95291. CSR_HW_REV_TYPE_QNJ
  95292. CSR_HW_REV_TYPE_QNJ_B0
  95293. CSR_HW_REV_TYPE_QUZ
  95294. CSR_HW_REV_TYPE_QU_B0
  95295. CSR_HW_REV_TYPE_QU_C0
  95296. CSR_HW_REV_TYPE_SO
  95297. CSR_HW_REV_TYPE_TY
  95298. CSR_HW_REV_WA_REG
  95299. CSR_HW_RFID_DASH
  95300. CSR_HW_RFID_FLAVOR
  95301. CSR_HW_RFID_STEP
  95302. CSR_HW_RFID_TYPE
  95303. CSR_HW_RF_ID
  95304. CSR_HW_RF_ID_TYPE_CHIP_ID
  95305. CSR_HW_RF_ID_TYPE_GF
  95306. CSR_HW_RF_ID_TYPE_GF4
  95307. CSR_HW_RF_ID_TYPE_HR
  95308. CSR_HW_RF_ID_TYPE_HR1
  95309. CSR_HW_RF_ID_TYPE_HRCDB
  95310. CSR_HW_RF_ID_TYPE_JF
  95311. CSR_HW_RF_STEP
  95312. CSR_H_UBRLCR
  95313. CSR_I2O_INFREECOUNT
  95314. CSR_I2O_INFREEHEAD
  95315. CSR_I2O_INPOSTCOUNT
  95316. CSR_I2O_INPOSTTAIL
  95317. CSR_I2O_OUTFREETAIL
  95318. CSR_I2O_OUTPOSTCOUNT
  95319. CSR_I2O_OUTPOSTHEAD
  95320. CSR_IML_DATA_ADDR
  95321. CSR_IML_RESP_ADDR
  95322. CSR_IML_SIZE_ADDR
  95323. CSR_IMPR
  95324. CSR_INI_SET_MASK
  95325. CSR_INSTRET
  95326. CSR_INSTRETH
  95327. CSR_INT
  95328. CSR_INTMASK
  95329. CSR_INTR
  95330. CSR_INTR_RISC
  95331. CSR_INTSTAT
  95332. CSR_INT_BIT_ALIVE
  95333. CSR_INT_BIT_CT_KILL
  95334. CSR_INT_BIT_FH_RX
  95335. CSR_INT_BIT_FH_TX
  95336. CSR_INT_BIT_HW_ERR
  95337. CSR_INT_BIT_RF_KILL
  95338. CSR_INT_BIT_RX_PERIODIC
  95339. CSR_INT_BIT_SCD
  95340. CSR_INT_BIT_SW_ERR
  95341. CSR_INT_BIT_SW_RX
  95342. CSR_INT_BIT_WAKEUP
  95343. CSR_INT_COALESCING
  95344. CSR_INT_MASK
  95345. CSR_INT_PERIODIC_DIS
  95346. CSR_INT_PERIODIC_ENA
  95347. CSR_INT_PERIODIC_REG
  95348. CSR_INVALID
  95349. CSR_IPCR
  95350. CSR_IRQ_CL_B
  95351. CSR_IRQ_CL_C
  95352. CSR_IRQ_CL_F
  95353. CSR_IRQ_CL_P
  95354. CSR_IRQ_DISABLE
  95355. CSR_IRQ_ENABLE
  95356. CSR_IRQ_RAWSTATUS
  95357. CSR_IRQ_SOFT
  95358. CSR_IRQ_STATUS
  95359. CSR_ISP_SOFT_RESET
  95360. CSR_LAST_WRITE
  95361. CSR_LAST_WRITE_VALUE
  95362. CSR_LEAF
  95363. CSR_LED_BSM_CTRL_MSK
  95364. CSR_LED_REG
  95365. CSR_LED_REG_TRUN_OFF
  95366. CSR_LED_REG_TRUN_ON
  95367. CSR_LED_REG_TURN_OFF
  95368. CSR_LED_REG_TURN_ON
  95369. CSR_LEFT
  95370. CSR_LEFT_1
  95371. CSR_LEFT_2
  95372. CSR_LEFT_3
  95373. CSR_LENGTH
  95374. CSR_L_UBRLCR
  95375. CSR_MAAS
  95376. CSR_MAC_ADDR0_OTP
  95377. CSR_MAC_ADDR0_STRAP
  95378. CSR_MAC_ADDR1_OTP
  95379. CSR_MAC_ADDR1_STRAP
  95380. CSR_MAC_SHADOW_REG_CTL2
  95381. CSR_MAC_SHADOW_REG_CTL2_RX_WAKE
  95382. CSR_MAC_SHADOW_REG_CTRL
  95383. CSR_MAC_SHADOW_REG_CTRL_RX_WAKE
  95384. CSR_MAINT_UTILITY
  95385. CSR_MAL
  95386. CSR_MAX
  95387. CSR_MBB
  95388. CSR_MBOX0
  95389. CSR_MBOX1
  95390. CSR_MBOX2
  95391. CSR_MBOX3
  95392. CSR_MBOX_SET_REG
  95393. CSR_MBOX_SET_REG_OS_ALIVE
  95394. CSR_MCF
  95395. CSR_MFC
  95396. CSR_MIF
  95397. CSR_MMIO_END_RANGE
  95398. CSR_MMIO_START_RANGE
  95399. CSR_MODEL
  95400. CSR_MONITOR_CFG_REG
  95401. CSR_MONITOR_STATUS_REG
  95402. CSR_MONITOR_XTAL_RESOURCES
  95403. CSR_MSGIN
  95404. CSR_MSIX_AUTOMASK_ST_AD
  95405. CSR_MSIX_BASE
  95406. CSR_MSIX_FH_INT_CAUSES_AD
  95407. CSR_MSIX_FH_INT_MASK_AD
  95408. CSR_MSIX_HW_INT_CAUSES_AD
  95409. CSR_MSIX_HW_INT_MASK_AD
  95410. CSR_MSIX_IVAR
  95411. CSR_MSIX_IVAR_AD_REG
  95412. CSR_MSIX_PENDING_PBA_AD
  95413. CSR_MSIX_RX_IVAR
  95414. CSR_MSIX_RX_IVAR_AD_REG
  95415. CSR_MULTI_DPF0_ADDR
  95416. CSR_M_UBRLCR
  95417. CSR_NET_PAGE_SELECT
  95418. CSR_NET_RESET_INTR
  95419. CSR_NODE_BITS
  95420. CSR_NODE_IDS
  95421. CSR_NODE_MASK
  95422. CSR_NODE_SHIFT
  95423. CSR_OFFSET
  95424. CSR_OFFSET_MASK
  95425. CSR_OMPR
  95426. CSR_OPCR
  95427. CSR_OPS
  95428. CSR_OPS_CONFIG
  95429. CSR_OPS_OPERATION
  95430. CSR_OPS_RESET
  95431. CSR_OPS_STANDBY
  95432. CSR_OP_READ
  95433. CSR_OP_WRITE
  95434. CSR_OTP_GP_REG
  95435. CSR_OTP_GP_REG_DEVICE_SELECT
  95436. CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK
  95437. CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK
  95438. CSR_OTP_GP_REG_OTP_ACCESS_MODE
  95439. CSR_PACK_ENABLE
  95440. CSR_PARITY
  95441. CSR_PARITY_ATN
  95442. CSR_PBM_COAL
  95443. CSR_PBM_CTICK0
  95444. CSR_PBM_CTICK1
  95445. CSR_PBM_CTICK2
  95446. CSR_PBM_CTICK3
  95447. CSR_PCIADDR_EXTN
  95448. CSR_PCICACHELINESIZE
  95449. CSR_PCICMD
  95450. CSR_PCICSRBASE
  95451. CSR_PCICSRIOBASE
  95452. CSR_PCIROMBASE
  95453. CSR_PCISDRAMBASE
  95454. CSR_PREFETCHMEMRANGE
  95455. CSR_PRIORITY_BUDGET
  95456. CSR_PROGRAM
  95457. CSR_RCV_ACK_MASK
  95458. CSR_RCV_NOT_ACK
  95459. CSR_RD_CNT
  95460. CSR_READY_MASK
  95461. CSR_REAL_ADDR
  95462. CSR_REGISTER_BASE
  95463. CSR_REG_BASE
  95464. CSR_REG_SIZE
  95465. CSR_RERR
  95466. CSR_RESEL
  95467. CSR_RESELECT
  95468. CSR_RESEL_ABORT
  95469. CSR_RESEL_ABORT_AM
  95470. CSR_RESEL_AM
  95471. CSR_RESET
  95472. CSR_RESET_AF
  95473. CSR_RESET_LINK_PWR_MGMT_DISABLED
  95474. CSR_RESET_REG_FLAG_FORCE_NMI
  95475. CSR_RESET_REG_FLAG_MASTER_DISABLED
  95476. CSR_RESET_REG_FLAG_NEVO_RESET
  95477. CSR_RESET_REG_FLAG_STOP_MASTER
  95478. CSR_RESET_REG_FLAG_SW_RESET
  95479. CSR_RESET_START
  95480. CSR_RETRY_TIMES
  95481. CSR_RGMII_EDGE_ALIGN
  95482. CSR_RGMII_RXC_0DEG_CFG
  95483. CSR_RGMII_TXC_CFG
  95484. CSR_RING_CONFIG
  95485. CSR_RING_ID
  95486. CSR_RING_ID_BUF
  95487. CSR_RING_NE_INT_MODE
  95488. CSR_RING_WR_BASE
  95489. CSR_ROMBASEMASK
  95490. CSR_ROMWRITEREG
  95491. CSR_RP
  95492. CSR_RPO
  95493. CSR_RR
  95494. CSR_RST
  95495. CSR_RXAK
  95496. CSR_RXSTAT
  95497. CSR_SA110_CNTL
  95498. CSR_SATP
  95499. CSR_SCAUSE
  95500. CSR_SCOUNTEREN
  95501. CSR_SCSI
  95502. CSR_SCSI_BUFF_INTR
  95503. CSR_SCSI_BUF_RDY
  95504. CSR_SCSI_COMPLETION_INTR
  95505. CSR_SCSI_INTR_ENABLE
  95506. CSR_SCSI_PAGE_SELECT
  95507. CSR_SCSI_PROCESSOR_INTR
  95508. CSR_SCSI_RESET_INTR
  95509. CSR_SDB_INT
  95510. CSR_SDP
  95511. CSR_SDRAMADDRSIZE0
  95512. CSR_SDRAMADDRSIZE1
  95513. CSR_SDRAMADDRSIZE2
  95514. CSR_SDRAMADDRSIZE3
  95515. CSR_SDRAMBASEMASK
  95516. CSR_SDRAMBASEOFFSET
  95517. CSR_SDRAMTIMING
  95518. CSR_SELECT
  95519. CSR_SEL_ABORT
  95520. CSR_SEL_XFER_DONE
  95521. CSR_SEND
  95522. CSR_SEPC
  95523. CSR_SETBIT
  95524. CSR_SET_RESET
  95525. CSR_SHARED_INTR
  95526. CSR_SIE
  95527. CSR_SIP
  95528. CSR_SNGL
  95529. CSR_SOFT_RESET
  95530. CSR_SPECIFIER_ID
  95531. CSR_SPEED_MAP
  95532. CSR_SPEED_MAP_END
  95533. CSR_SPLIT_TIMEOUT_HI
  95534. CSR_SPLIT_TIMEOUT_LO
  95535. CSR_SRV_REQ
  95536. CSR_SRW
  95537. CSR_SSCRATCH
  95538. CSR_SSP_BASE
  95539. CSR_SSP_BASE_ADDR_GEN9
  95540. CSR_SSTATUS
  95541. CSR_START
  95542. CSR_STATE_BIT_ABDICATE
  95543. CSR_STATE_BIT_CMSTR
  95544. CSR_STATE_CLEAR
  95545. CSR_STATE_SET
  95546. CSR_STOP
  95547. CSR_STVAL
  95548. CSR_STVEC
  95549. CSR_SV_IDLE
  95550. CSR_SV_RST
  95551. CSR_SV_RUN
  95552. CSR_THRESHOLD0_SET1
  95553. CSR_THRESHOLD1_SET1
  95554. CSR_TIME
  95555. CSR_TIMEH
  95556. CSR_TIMEOUT
  95557. CSR_TIMER1_CLR
  95558. CSR_TIMER1_CNTL
  95559. CSR_TIMER1_LOAD
  95560. CSR_TIMER1_VALUE
  95561. CSR_TIMER2_CLR
  95562. CSR_TIMER2_CNTL
  95563. CSR_TIMER2_LOAD
  95564. CSR_TIMER2_VALUE
  95565. CSR_TIMER3_CLR
  95566. CSR_TIMER3_CNTL
  95567. CSR_TIMER3_LOAD
  95568. CSR_TIMER3_VALUE
  95569. CSR_TIMER4_CLR
  95570. CSR_TIMER4_CNTL
  95571. CSR_TIMER4_LOAD
  95572. CSR_TIMER4_VALUE
  95573. CSR_TIMER_MODE
  95574. CSR_TOPOLOGY_MAP
  95575. CSR_TOPOLOGY_MAP_END
  95576. CSR_TPO0
  95577. CSR_TPO1
  95578. CSR_TPO2
  95579. CSR_TPO3
  95580. CSR_TRANS_DIR
  95581. CSR_TRANS_RST
  95582. CSR_TRANS_RUN
  95583. CSR_UARTCON
  95584. CSR_UARTDR
  95585. CSR_UARTFLG
  95586. CSR_UCODE_DRV_GP1
  95587. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED
  95588. CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE
  95589. CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP
  95590. CSR_UCODE_DRV_GP1_CLR
  95591. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
  95592. CSR_UCODE_DRV_GP1_SET
  95593. CSR_UCODE_DRV_GP2
  95594. CSR_UCODE_SW_BIT_RFKILL
  95595. CSR_UNEXP
  95596. CSR_UNEXP_DISC
  95597. CSR_UNIT
  95598. CSR_VENDOR
  95599. CSR_VERSION
  95600. CSR_VERSION_MAJOR
  95601. CSR_VERSION_MINOR
  95602. CSR_VMID0_INTR_MBOX
  95603. CSR_WERR
  95604. CSR_WRRD_CNT
  95605. CSR_WR_CNT
  95606. CSR_XBUS_CYCLE
  95607. CSR_XBUS_IOSTROBE
  95608. CSR_XDBUS_SHIFT
  95609. CSR_XFER_DONE
  95610. CSSA
  95611. CSSELR
  95612. CSSELR_DCACHE
  95613. CSSELR_EL1
  95614. CSSELR_ICACHE
  95615. CSSELR_L1
  95616. CSSELR_L2
  95617. CSSELR_L3
  95618. CSSELR_L4
  95619. CSSELR_L5
  95620. CSSELR_L6
  95621. CSSELR_L7
  95622. CSSELR_MAX
  95623. CSSTS
  95624. CSS_ABI_SIZE
  95625. CSS_AE_FIRMWARE
  95626. CSS_BDS_SIZE
  95627. CSS_DATE_DAY
  95628. CSS_DATE_MIN
  95629. CSS_DATE_MONTH
  95630. CSS_DATE_SEC
  95631. CSS_DATE_YEAR
  95632. CSS_DYING
  95633. CSS_GDC_SIZE
  95634. CSS_HEADER_LEN
  95635. CSS_HEADER_VERSION
  95636. CSS_IPV4CSUMOK
  95637. CSS_ISIPFRAG
  95638. CSS_ISIPV4
  95639. CSS_ISIPV6
  95640. CSS_ISTCP
  95641. CSS_ISUDP
  95642. CSS_LINK_BIT
  95643. CSS_MMP_FIRMWARE
  95644. CSS_MODULE_TYPE
  95645. CSS_MODULE_VENDOR
  95646. CSS_NO_REF
  95647. CSS_ONLINE
  95648. CSS_QUEUE_IN_BUF_SIZE
  95649. CSS_QUEUE_OUT_BUF_SIZE
  95650. CSS_QUEUE_PARAMS_BUF_SIZE
  95651. CSS_QUEUE_STAT_3A_BUF_SIZE
  95652. CSS_QUEUE_VF_BUF_SIZE
  95653. CSS_RELEASED
  95654. CSS_SET_HASH_BITS
  95655. CSS_SW_VERSION_GUC_MAJOR
  95656. CSS_SW_VERSION_GUC_MINOR
  95657. CSS_SW_VERSION_GUC_PATCH
  95658. CSS_SW_VERSION_HUC_MAJOR
  95659. CSS_SW_VERSION_HUC_MINOR
  95660. CSS_TASK_ITER_PROCS
  95661. CSS_TASK_ITER_SKIPPED
  95662. CSS_TASK_ITER_THREADED
  95663. CSS_TCPUDPCSOK
  95664. CSS_TIME_HOUR
  95665. CSS_VISIBLE
  95666. CST0
  95667. CST1
  95668. CST2
  95669. CST3
  95670. CST4313_OTP_PRESENT
  95671. CST4313_SPROM_OTP_SEL_MASK
  95672. CST4313_SPROM_OTP_SEL_SHIFT
  95673. CST4313_SPROM_PRESENT
  95674. CST4319_CBUCK_MODE_BURST
  95675. CST4319_CBUCK_MODE_LPBURST
  95676. CST4319_CBUCK_MODE_MASK
  95677. CST4319_DEFCIS_SEL
  95678. CST4319_ILPDIV_EN
  95679. CST4319_LPO_SEL
  95680. CST4319_OTP_PWRDN
  95681. CST4319_OTP_SEL
  95682. CST4319_PALDO_EXTPNP
  95683. CST4319_RCAL_VALID
  95684. CST4319_RCAL_VALUE_MASK
  95685. CST4319_RCAL_VALUE_SHIFT
  95686. CST4319_REMAP_SEL_MASK
  95687. CST4319_RES_INIT_MODE
  95688. CST4319_SDIO_USB_MODE
  95689. CST4319_SPI_CLK_PH
  95690. CST4319_SPI_CLK_POL
  95691. CST4319_SPI_CPULESSUSB
  95692. CST4319_SPROM_OTP_SEL_MASK
  95693. CST4319_SPROM_OTP_SEL_SHIFT
  95694. CST4319_SPROM_SEL
  95695. CST4319_XTAL_PD_POL
  95696. CST43236_BOOT_FROM_FLASH
  95697. CST43236_BOOT_FROM_INVALID
  95698. CST43236_BOOT_FROM_ROM
  95699. CST43236_BOOT_FROM_SRAM
  95700. CST43236_BOOT_MASK
  95701. CST43236_BOOT_SHIFT
  95702. CST43236_BP_CLK
  95703. CST43236_HSIC_MASK
  95704. CST43236_OTP_MASK
  95705. CST43236_SFLASH_MASK
  95706. CST4329_DEFCIS_SEL
  95707. CST4329_OTP_PWRDN
  95708. CST4329_OTP_SEL
  95709. CST4329_SPI_SDIO_MODE_MASK
  95710. CST4329_SPI_SDIO_MODE_SHIFT
  95711. CST4329_SPROM_OTP_SEL_MASK
  95712. CST4329_SPROM_SEL
  95713. CST4331_LDO_PAR
  95714. CST4331_LDO_RF
  95715. CST4331_OTP_PRESENT
  95716. CST4331_SPROM_PRESENT
  95717. CST4331_XTAL_FREQ
  95718. CST4336_ARMREMAP_0
  95719. CST4336_CBUCK_MODE_MASK
  95720. CST4336_CBUCK_MODE_SHIFT
  95721. CST4336_ILPDIV_EN_MASK
  95722. CST4336_ILPDIV_EN_SHIFT
  95723. CST4336_LPO_SEL_MASK
  95724. CST4336_LPO_SEL_SHIFT
  95725. CST4336_OTP_PRESENT
  95726. CST4336_RES_INIT_MODE_MASK
  95727. CST4336_RES_INIT_MODE_SHIFT
  95728. CST4336_SPI_MODE_MASK
  95729. CST4336_SPROM_PRESENT
  95730. CST4336_XTAL_PD_POL_MASK
  95731. CST4336_XTAL_PD_POL_SHIFT
  95732. CSTACK
  95733. CSTAS
  95734. CSTAS_CATEGORY_CODE_CDP
  95735. CSTAS_CATEGORY_MASK
  95736. CSTAS_MASK
  95737. CSTAS_NO_COPYRIGHT
  95738. CSTAS_SAMP_FREQ_32
  95739. CSTAS_SAMP_FREQ_44
  95740. CSTAS_SAMP_FREQ_48
  95741. CSTAS_SAMP_FREQ_96
  95742. CSTAS_SAMP_FREQ_MASK
  95743. CSTATE
  95744. CSTATE_ACTIVE_SAMPLER__SAMPLE_TIME_MASK
  95745. CSTATE_ACTIVE_SAMPLER__SAMPLE_TIME__SHIFT
  95746. CSTATE_DESC_LEN
  95747. CSTATE_NAME_LEN
  95748. CSTATUS_DRQ
  95749. CSTATUS_IRQ
  95750. CSTA_ALT_PLEND
  95751. CSTA_PLEND
  95752. CSTD_ALL
  95753. CSTD_ATSC
  95754. CSTD_NTSC
  95755. CSTD_PAL
  95756. CSTD_SECAM
  95757. CSTOPB
  95758. CSTORM
  95759. CSTORM_ASSERT_LIST_INDEX_OFFSET
  95760. CSTORM_ASSERT_LIST_OFFSET
  95761. CSTORM_EVENT_RING_DATA_OFFSET
  95762. CSTORM_EVENT_RING_PROD_OFFSET
  95763. CSTORM_FATAL_ASSERT_ATTENTION_BIT
  95764. CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET
  95765. CSTORM_FUNC_EN_OFFSET
  95766. CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET
  95767. CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET
  95768. CSTORM_ID
  95769. CSTORM_IGU_MODE_OFFSET
  95770. CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE
  95771. CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE_SHIFT
  95772. CSTORM_ISCSI_AG_CONTEXT_STATE
  95773. CSTORM_ISCSI_AG_CONTEXT_STATE_SHIFT
  95774. CSTORM_ISCSI_CQ_SIZE_OFFSET
  95775. CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET
  95776. CSTORM_ISCSI_EQ_CONS_OFFSET
  95777. CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET
  95778. CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET
  95779. CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET
  95780. CSTORM_ISCSI_EQ_PROD_OFFSET
  95781. CSTORM_ISCSI_EQ_SB_INDEX_OFFSET
  95782. CSTORM_ISCSI_EQ_SB_NUM_OFFSET
  95783. CSTORM_ISCSI_HQ_SIZE_OFFSET
  95784. CSTORM_ISCSI_NUM_OF_TASKS_OFFSET
  95785. CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET
  95786. CSTORM_ISCSI_PAGE_SIZE_OFFSET
  95787. CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV
  95788. CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT
  95789. CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN
  95790. CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT
  95791. CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN
  95792. CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT
  95793. CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID
  95794. CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT
  95795. CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG
  95796. CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT
  95797. CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK
  95798. CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT
  95799. CSTORM_RECORD_SLOW_PATH_OFFSET
  95800. CSTORM_SP_STATUS_BLOCK_DATA_OFFSET
  95801. CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET
  95802. CSTORM_SP_STATUS_BLOCK_OFFSET
  95803. CSTORM_SP_STATUS_BLOCK_SIZE
  95804. CSTORM_SP_SYNC_BLOCK_OFFSET
  95805. CSTORM_SP_SYNC_BLOCK_SIZE
  95806. CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET
  95807. CSTORM_STATUS_BLOCK_DATA_OFFSET
  95808. CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET
  95809. CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET
  95810. CSTORM_STATUS_BLOCK_OFFSET
  95811. CSTORM_STATUS_BLOCK_SIZE
  95812. CSTORM_SYNC_BLOCK_OFFSET
  95813. CSTORM_SYNC_BLOCK_SIZE
  95814. CSTORM_VF_PF_CHANNEL_STATE_OFFSET
  95815. CSTORM_VF_PF_CHANNEL_VALID_OFFSET
  95816. CSTORM_VF_TO_PF_OFFSET
  95817. CSTR
  95818. CSTSCHG
  95819. CSTSCHG_EV
  95820. CSUMCOPY_BIGCHUNK
  95821. CSUMCOPY_BIGCHUNK_ALIGNED
  95822. CSUMCOPY_LASTCHUNK
  95823. CSUM_BIGCHUNK
  95824. CSUM_BIGCHUNK1
  95825. CSUM_COPY_16_BYTES_EXCODE
  95826. CSUM_COPY_16_BYTES_WITHEX
  95827. CSUM_FMT
  95828. CSUM_FMT_VALUE
  95829. CSUM_HAS_PSEUDO_HDR_F
  95830. CSUM_HAS_PSEUDO_HDR_S
  95831. CSUM_HAS_PSEUDO_HDR_V
  95832. CSUM_LASTCHUNK
  95833. CSUM_MANGLED_0
  95834. CSUM_NEUTRAL_FLAG
  95835. CSUM_ON_BD
  95836. CSUM_ON_PKT
  95837. CSUM_RXA_AMSDU
  95838. CSUM_RXA_ENA
  95839. CSUM_RXA_HEADERLEN_MASK
  95840. CSUM_RXA_MICSIZE_MASK
  95841. CSUM_RXA_PADD
  95842. CSUM_RXA_RESERVED_MASK
  95843. CSUM_XOR
  95844. CSU_PLL
  95845. CSU_SPB
  95846. CSV_AVOLTAG
  95847. CSV_CLEARTAG
  95848. CSV_MAX_LINE
  95849. CSV_PVOLTAG
  95850. CSW
  95851. CSW_33MHZ_SELECTED
  95852. CSW_AUTO_CONFIG
  95853. CSW_CSWCR
  95854. CSW_CSWCR_DUALMCB_MASK
  95855. CSW_CSWCR_MCB0_ROUTING
  95856. CSW_CSWCR_MCB1_ROUTING
  95857. CSW_DMA_DONE
  95858. CSW_EEP_READ_DONE
  95859. CSW_FIFO_RDY
  95860. CSW_HALTED
  95861. CSW_INT_PENDING
  95862. CSW_IRQ_WRITTEN
  95863. CSW_PARITY_ERR
  95864. CSW_RESERVED1
  95865. CSW_RESERVED2
  95866. CSW_SCSI_RESET_ACTIVE
  95867. CSW_SCSI_RESET_LATCH
  95868. CSW_SWITCH_TRACE_ERR_MASK
  95869. CSW_TEST1
  95870. CSW_TEST2
  95871. CSW_TEST3
  95872. CSYM
  95873. CS_176
  95874. CS_192
  95875. CS_44
  95876. CS_48
  95877. CS_88
  95878. CS_96
  95879. CS_ABORTED
  95880. CS_ABORT_BY_TARGET
  95881. CS_ABORT_MSG
  95882. CS_ABORT_MSG_FAILED
  95883. CS_ABTS_BY_TARGET
  95884. CS_ACK_CMD_GEN_RESTART
  95885. CS_ACK_CMD_GEN_START
  95886. CS_ACK_MASK
  95887. CS_ACK_SHIFT
  95888. CS_ACTIVE_BETWEEN_PACKETS_0
  95889. CS_ACTIVE_BETWEEN_PACKETS_1
  95890. CS_ACTIVE_BETWEEN_PACKETS_2
  95891. CS_ACTIVE_BETWEEN_PACKETS_3
  95892. CS_ACTIVE_BSY
  95893. CS_AGA
  95894. CS_AMBA_ID
  95895. CS_AMBA_ID_DATA
  95896. CS_AMBA_UCI_ID
  95897. CS_ARS_FAILED
  95898. CS_BAD_MESSAGE
  95899. CS_BAD_MSG
  95900. CS_BAD_PAYLOAD
  95901. CS_BASES
  95902. CS_BIDIR_DMA
  95903. CS_BIDIR_RD_OVERRUN
  95904. CS_BIDIR_RD_OVERRUN_WR_UNDERRUN
  95905. CS_BIDIR_RD_UNDERRUN
  95906. CS_BIDIR_RD_UNDERRUN_WR_OVERRUN
  95907. CS_BIDIR_RD_WR_OVERRUN
  95908. CS_BIDIR_RD_WR_UNDERRUN
  95909. CS_BIT
  95910. CS_BUS_CLOCK
  95911. CS_BUS_RESET
  95912. CS_BUS_SLOT_SZ
  95913. CS_BWDCNT
  95914. CS_CHANGE
  95915. CS_CLK_RUN_ENA
  95916. CS_CLK_RUN_HOT
  95917. CS_CLK_RUN_RST
  95918. CS_CL_SW_IRQ
  95919. CS_CMD
  95920. CS_CMD_CMD_NO_ACTION
  95921. CS_CMD_CMD_START_RESTART
  95922. CS_CMD_CMD_STOP
  95923. CS_CMD_MASK
  95924. CS_CMD_SHIFT
  95925. CS_CNS
  95926. CS_COEF_ADC_LI_PGA_MODE
  95927. CS_COEF_ADC_LI_SZC_MODE
  95928. CS_COEF_ADC_MIC_PGA_MODE
  95929. CS_COEF_ADC_MIC_SZC_MODE
  95930. CS_COEF_ADC_SZC_MASK
  95931. CS_COEF_DAC_HP_SZC_MODE
  95932. CS_COEF_DAC_LO_SZC_MODE
  95933. CS_COEF_DAC_SPK_SZC_MODE
  95934. CS_COMMAND_OVERRUN
  95935. CS_COMMON_MASK_SH_LIST_DCE_112
  95936. CS_COMMON_MASK_SH_LIST_DCE_COMMON_BASE
  95937. CS_COMMON_MASK_SH_LIST_DCN1_0
  95938. CS_COMMON_MASK_SH_LIST_DCN2_0
  95939. CS_COMMON_REG_LIST_DCE_100_110
  95940. CS_COMMON_REG_LIST_DCE_112
  95941. CS_COMMON_REG_LIST_DCE_80
  95942. CS_COMMON_REG_LIST_DCN1_0
  95943. CS_COMMON_REG_LIST_DCN2_0
  95944. CS_COMMON_REG_LIST_DCN2_1
  95945. CS_COMPLETE
  95946. CS_COMPLETE_CHKCOND
  95947. CS_CONFIG_BUFS
  95948. CS_CONTEXT_DONE
  95949. CS_COPYREGS
  95950. CS_COPY_STATE__SRC_STATE_ID_MASK
  95951. CS_COPY_STATE__SRC_STATE_ID__SHIFT
  95952. CS_CPU_EXCLUSIVE
  95953. CS_DATA_OVERRUN
  95954. CS_DATA_REASSEMBLY_ERROR
  95955. CS_DATA_UNDERRUN
  95956. CS_DC_CONN
  95957. CS_DC_DISK
  95958. CS_DC_MASK
  95959. CS_DC_PDSK
  95960. CS_DC_PEER
  95961. CS_DC_ROLE
  95962. CS_DC_SUSP
  95963. CS_DEFAULT
  95964. CS_DEMUX_OUTPUT_INV_MSK
  95965. CS_DEMUX_OUTPUT_SEL
  95966. CS_DESC
  95967. CS_DESELECT_TIME
  95968. CS_DEV
  95969. CS_DEVICE_RESET_MSG_FAILED
  95970. CS_DEV_FILE_NAME
  95971. CS_DEV_QUEUE_FULL
  95972. CS_DEV_RESET_MSG
  95973. CS_DIF_ERROR
  95974. CS_DIG_OUT1_PIN_NID
  95975. CS_DIG_OUT2_PIN_NID
  95976. CS_DIR_ENTRY
  95977. CS_DMA
  95978. CS_DMA_ERROR
  95979. CS_DMIC1_PIN_NID
  95980. CS_DMIC2_PIN_NID
  95981. CS_DOMAIN_SHIFT
  95982. CS_DONE
  95983. CS_ECS
  95984. CS_EN_CMD_ENABLE_BSC
  95985. CS_EN_SHIFT
  95986. CS_ERCTL0
  95987. CS_ERCTL1
  95988. CS_ERCTL2
  95989. CS_ERROR
  95990. CS_ERR_PEER_RESET
  95991. CS_ERSTAT0
  95992. CS_ERSTAT1
  95993. CS_ERTHR0
  95994. CS_ERTHR1
  95995. CS_ERTHR2
  95996. CS_ERTHR3
  95997. CS_ERTHR4
  95998. CS_ETMV3_EXC_ASYNC_DATA_ABORT
  95999. CS_ETMV3_EXC_DATA_FAULT
  96000. CS_ETMV3_EXC_DEBUG_HALT
  96001. CS_ETMV3_EXC_FIQ
  96002. CS_ETMV3_EXC_GENERIC
  96003. CS_ETMV3_EXC_HYP
  96004. CS_ETMV3_EXC_IRQ
  96005. CS_ETMV3_EXC_JAZELLE_THUMBEE
  96006. CS_ETMV3_EXC_NONE
  96007. CS_ETMV3_EXC_PE_RESET
  96008. CS_ETMV3_EXC_PREFETCH_ABORT
  96009. CS_ETMV3_EXC_SMC
  96010. CS_ETMV3_EXC_SVC
  96011. CS_ETMV3_EXC_UNDEFINED_INSTR
  96012. CS_ETMV3_PRIV_SIZE
  96013. CS_ETMV4_EXC_ALIGNMENT
  96014. CS_ETMV4_EXC_CALL
  96015. CS_ETMV4_EXC_DATA_DEBUG
  96016. CS_ETMV4_EXC_DATA_FAULT
  96017. CS_ETMV4_EXC_DEBUG_HALT
  96018. CS_ETMV4_EXC_END
  96019. CS_ETMV4_EXC_FIQ
  96020. CS_ETMV4_EXC_INST_DEBUG
  96021. CS_ETMV4_EXC_INST_FAULT
  96022. CS_ETMV4_EXC_IRQ
  96023. CS_ETMV4_EXC_RESET
  96024. CS_ETMV4_EXC_SYSTEM_ERROR
  96025. CS_ETMV4_EXC_TRAP
  96026. CS_ETMV4_PRIV_MAX
  96027. CS_ETMV4_PRIV_SIZE
  96028. CS_ETMV4_TRCAUTHSTATUS
  96029. CS_ETMV4_TRCCONFIGR
  96030. CS_ETMV4_TRCIDR0
  96031. CS_ETMV4_TRCIDR1
  96032. CS_ETMV4_TRCIDR2
  96033. CS_ETMV4_TRCIDR8
  96034. CS_ETMV4_TRCTRACEIDR
  96035. CS_ETM_CPU
  96036. CS_ETM_DISCONTINUITY
  96037. CS_ETM_EMPTY
  96038. CS_ETM_ETMCCER
  96039. CS_ETM_ETMCR
  96040. CS_ETM_ETMIDR
  96041. CS_ETM_ETMTRACEIDR
  96042. CS_ETM_EXCEPTION
  96043. CS_ETM_EXCEPTION_RET
  96044. CS_ETM_HEADER_SIZE
  96045. CS_ETM_INVAL_ADDR
  96046. CS_ETM_ISA_A32
  96047. CS_ETM_ISA_A64
  96048. CS_ETM_ISA_T32
  96049. CS_ETM_ISA_UNKNOWN
  96050. CS_ETM_MAGIC
  96051. CS_ETM_OPERATION_DECODE
  96052. CS_ETM_OPERATION_MAX
  96053. CS_ETM_OPERATION_PRINT
  96054. CS_ETM_PACKET_MAX_BUFFER
  96055. CS_ETM_PER_THREAD_TRACEID
  96056. CS_ETM_PRIV_MAX
  96057. CS_ETM_PROTO_ETMV3
  96058. CS_ETM_PROTO_ETMV4d
  96059. CS_ETM_PROTO_ETMV4i
  96060. CS_ETM_PROTO_PTM
  96061. CS_ETM_RANGE
  96062. CS_ETM_SNAPSHOT
  96063. CS_EVEN
  96064. CS_EVEN_PRIMARY
  96065. CS_EVEN_SECONDARY
  96066. CS_EXCESSIVE_BUFFER_OVERRUNS
  96067. CS_EXTENDED_ID
  96068. CS_EXT_ID_FAILED
  96069. CS_FEAT_ROLLING_RX_COUNTER
  96070. CS_FEAT_TSTAMP_RX_CTRL
  96071. CS_FM_CONFIG_ERRORS
  96072. CS_FREE
  96073. CS_FROM_ENTRY_STACK
  96074. CS_FROM_ESPFIX
  96075. CS_FROM_KERNEL
  96076. CS_FROM_USER_CR3
  96077. CS_FW_RESOURCE
  96078. CS_GET_IF_VERSION
  96079. CS_GET_STATE
  96080. CS_GPIO_PIN
  96081. CS_HARD
  96082. CS_HEADER_VERSION_0
  96083. CS_HEADER_VERSION_0_MAX
  96084. CS_HGRRT0
  96085. CS_HGRRT7
  96086. CS_HID0
  96087. CS_HID1
  96088. CS_HID2
  96089. CS_HID4
  96090. CS_HID5
  96091. CS_HIGH
  96092. CS_HOLD_TIME
  96093. CS_HRES_COARSE
  96094. CS_HSI_TRANSFER_TIMEOUT_MS
  96095. CS_ICTRL
  96096. CS_IDE_MSG
  96097. CS_IDE_MSG_FAILED
  96098. CS_IDST
  96099. CS_ID_MSG
  96100. CS_ID_MSG_FAILED
  96101. CS_IF_VERSION
  96102. CS_IGN_OUTD_FAIL
  96103. CS_INCOMPLETE
  96104. CS_INHIBIT_MD_IO
  96105. CS_INTERFACE
  96106. CS_INV_ENTRY_TYPE
  96107. CS_IO
  96108. CS_IOCB_ERROR
  96109. CS_IOR
  96110. CS_IOW
  96111. CS_IOWR
  96112. CS_IO_MAGIC
  96113. CS_KINT_H
  96114. CS_KINT_L
  96115. CS_KPROP_H
  96116. CS_KPROP_L
  96117. CS_LDSTCR
  96118. CS_LDSTDB
  96119. CS_LINK_DOWNED
  96120. CS_LINK_ERROR_RECOVERY
  96121. CS_LOCAL_LINK_INTEGRITY_ERRORS
  96122. CS_LOCAL_ONLY
  96123. CS_LOCK
  96124. CS_LOGIO_ERROR
  96125. CS_LOG_RAW_FRAMES
  96126. CS_LOOP_DOWN_ABORT
  96127. CS_LOW
  96128. CS_LVD_BUS_ERROR
  96129. CS_MASK
  96130. CS_MAX_BUFFERS
  96131. CS_MAX_BUFFERS_SHIFT
  96132. CS_MAX_CMDS
  96133. CS_MEMORY_MIGRATE
  96134. CS_MEM_EXCLUSIVE
  96135. CS_MEM_HARDWALL
  96136. CS_MMAP_SIZE
  96137. CS_MODE_DISABLED
  96138. CS_MODE_PERF
  96139. CS_MODE_SYSFS
  96140. CS_MRST_CLR
  96141. CS_MRST_SET
  96142. CS_MSSCR0
  96143. CS_MSSSR0
  96144. CS_NA
  96145. CS_NAME_LEN
  96146. CS_NAND_CMD_COMP
  96147. CS_NAND_CTLR_BUSY
  96148. CS_NAND_CTL_ALE
  96149. CS_NAND_CTL_CE
  96150. CS_NAND_CTL_CLE
  96151. CS_NAND_CTL_DIST_EN
  96152. CS_NAND_CTL_RDY_INT_MASK
  96153. CS_NAND_DIST_ST
  96154. CS_NAND_ECC_CLRECC
  96155. CS_NAND_ECC_ENECC
  96156. CS_NAND_ECC_PARITY
  96157. CS_NAND_STS_FLASH_RDY
  96158. CS_NOP_MSG
  96159. CS_NOP_MSG_FAILED
  96160. CS_NO_MESSAGE_OUT
  96161. CS_NO_MSG_OUT
  96162. CS_NUM_BASE_PARAMS
  96163. CS_NUM_SHIFT
  96164. CS_OCS
  96165. CS_ODD
  96166. CS_ODD_PRIMARY
  96167. CS_ODD_SECONDARY
  96168. CS_OFFSET
  96169. CS_ONLINE
  96170. CS_ORDERED
  96171. CS_ORPTRS
  96172. CS_OTPPER
  96173. CS_OTTCNT
  96174. CS_OTTLIM
  96175. CS_OTWPER
  96176. CS_PARAM_CHG_CURRENT
  96177. CS_PARAM_CHG_INPUT_CURRENT
  96178. CS_PARAM_CHG_OPTION
  96179. CS_PARAM_CHG_STATUS
  96180. CS_PARAM_CHG_VOLTAGE
  96181. CS_PARAM_CUSTOM_PROFILE_MAX
  96182. CS_PARAM_CUSTOM_PROFILE_MIN
  96183. CS_PARAM_DEBUG_BATT_REMOVED
  96184. CS_PARAM_DEBUG_CTL_MODE
  96185. CS_PARAM_DEBUG_MANUAL_CURRENT
  96186. CS_PARAM_DEBUG_MANUAL_MODE
  96187. CS_PARAM_DEBUG_MANUAL_VOLTAGE
  96188. CS_PARAM_DEBUG_MAX
  96189. CS_PARAM_DEBUG_MIN
  96190. CS_PARAM_DEBUG_SEEMS_DEAD
  96191. CS_PARAM_DEBUG_SEEMS_DISCONNECTED
  96192. CS_PARAM_LIMIT_POWER
  96193. CS_PARAM_MASK
  96194. CS_PARITY_ERROR_MSG_FAILED
  96195. CS_PARITY_MSG
  96196. CS_PARTIAL_FLUSH
  96197. CS_PBR_SECTOR
  96198. CS_PHASED_SKIPPED
  96199. CS_PMU_TYPE_CPUS
  96200. CS_POLARITY_HIGH
  96201. CS_POLARITY_LOW
  96202. CS_PORT_BUSY
  96203. CS_PORT_CONFIG_CHG
  96204. CS_PORT_LOGGED_OUT
  96205. CS_PORT_MARK_FECN
  96206. CS_PORT_MCAST_RCV_PKTS
  96207. CS_PORT_MCAST_XMIT_PKTS
  96208. CS_PORT_RCV_BECN
  96209. CS_PORT_RCV_BUBBLE
  96210. CS_PORT_RCV_CONSTRAINT_ERRORS
  96211. CS_PORT_RCV_DATA
  96212. CS_PORT_RCV_ERRORS
  96213. CS_PORT_RCV_FECN
  96214. CS_PORT_RCV_PKTS
  96215. CS_PORT_RCV_REMOTE_PHYSICAL_ERRORS
  96216. CS_PORT_RCV_SWITCH_RELAY_ERRORS
  96217. CS_PORT_UNAVAILABLE
  96218. CS_PORT_XMIT_CONSTRAINT_ERRORS
  96219. CS_PORT_XMIT_DATA
  96220. CS_PORT_XMIT_DISCARDS
  96221. CS_PORT_XMIT_PKTS
  96222. CS_PORT_XMIT_TIME_CONG
  96223. CS_PORT_XMIT_WAIT
  96224. CS_PORT_XMIT_WAIT_DATA
  96225. CS_PORT_XMIT_WASTED_BW
  96226. CS_PRIO
  96227. CS_QOS_LATENCY_FOR_DATA_USEC
  96228. CS_QUEUE_FULL
  96229. CS_RAW
  96230. CS_RAW_DEBUG_FLAGS
  96231. CS_RDDS
  96232. CS_RDSS
  96233. CS_REG
  96234. CS_REG_FIELD_LIST
  96235. CS_REJECT_MSG
  96236. CS_REJECT_MSG_FAILED
  96237. CS_RESET
  96238. CS_RESET_OCCURRED
  96239. CS_RETRY
  96240. CS_RING_SIZE
  96241. CS_RST_CLR
  96242. CS_RST_SET
  96243. CS_RTATR
  96244. CS_RTCCT
  96245. CS_RTFTC
  96246. CS_RTFWC
  96247. CS_RTFWR
  96248. CS_RX_DATA_RECEIVED
  96249. CS_SCHED_LOAD_BALANCE
  96250. CS_SELECT_AUTO_DEVICE_ID_CFG
  96251. CS_SELECT_NAND_WP
  96252. CS_SEL_ANY
  96253. CS_SEL_RGB
  96254. CS_SEL_YUV
  96255. CS_SERIALIZE
  96256. CS_SETUP_CNT
  96257. CS_SETUP_CNT__TWB
  96258. CS_SETUP_CNT__VALUE
  96259. CS_SETUP_TIME
  96260. CS_SET_WAKELINE
  96261. CS_SF
  96262. CS_SHIFT
  96263. CS_SIZE
  96264. CS_SPREAD_PAGE
  96265. CS_SPREAD_SLAB
  96266. CS_SQER
  96267. CS_STAGE_ON
  96268. CS_STATE_CLOSED
  96269. CS_STATE_CONFIGURED
  96270. CS_STATE_OPENED
  96271. CS_STATUS_OVERRUN
  96272. CS_STONEAGE
  96273. CS_STOP_DONE
  96274. CS_STOP_MAST
  96275. CS_STPER0
  96276. CS_STPER31
  96277. CS_STTIM0
  96278. CS_STTIM31
  96279. CS_ST_SW_IRQ
  96280. CS_SW_LIM
  96281. CS_SW_PORT_CONGESTION
  96282. CS_SW_RATE_1
  96283. CS_SW_RATE_2
  96284. CS_SW_RATE_3
  96285. CS_SW_RATE_4
  96286. CS_TASK_MGMT_OVERRUN
  96287. CS_TESTMODEEN
  96288. CS_TFBADD
  96289. CS_TFBSET
  96290. CS_TFBSUB
  96291. CS_TGRLD0
  96292. CS_TGRLD15
  96293. CS_TIMEOUT
  96294. CS_TIM_MASK
  96295. CS_TIM_SHIFT
  96296. CS_TOGGLE
  96297. CS_TRANACTION_1
  96298. CS_TRANACTION_2
  96299. CS_TRANACTION_3
  96300. CS_TRANSPORT
  96301. CS_TRANSPORT_ERROR
  96302. CS_TX
  96303. CS_TX_DATA_READY
  96304. CS_TX_DATA_SENT
  96305. CS_UNCORRECTABLE_ERRORS
  96306. CS_UNEXP_BUS_FREE
  96307. CS_UNKNOWN
  96308. CS_UNLOCK
  96309. CS_VAUX_AVAIL
  96310. CS_VCE_ACQ_ID_ERROR
  96311. CS_VCE_BUSY
  96312. CS_VCE_IOCB_ERROR
  96313. CS_VCS_BAD_EXCHANGE
  96314. CS_VCS_CHIP_FAILURE
  96315. CS_VCS_SEQ_COMPLETEi
  96316. CS_VCT_BUSY
  96317. CS_VCT_CNT_ERROR
  96318. CS_VCT_ERROR
  96319. CS_VCT_IDX_ERROR
  96320. CS_VCT_STS_ERROR
  96321. CS_VERBOSE
  96322. CS_VF_BIND_VPORTS_TO_VF
  96323. CS_VF_SET_HOPS_OF_VPORTS
  96324. CS_VF_SET_QOS_OF_VPORTS
  96325. CS_VOL_MASK
  96326. CS_WAIT_COMPLETE
  96327. CS_WCRCEIL
  96328. CS_WCRDEC
  96329. CS_WCRINC
  96330. CS_WCRMAX
  96331. CS_WCRMIN
  96332. CS_WRDS
  96333. CS_WRND
  96334. CS_WRSS
  96335. CT
  96336. CT0TC
  96337. CT0_DOW
  96338. CT0_HOURS
  96339. CT0_MINS
  96340. CT0_SECS
  96341. CT1_DOM
  96342. CT1_MONTH
  96343. CT1_YEAR
  96344. CT20K1REG_H
  96345. CT20K1_MODEL_FIRST
  96346. CT20K1_UNKNOWN
  96347. CT20K2_MODEL_FIRST
  96348. CT20K2_UNKNOWN
  96349. CT2_APP_PLL_LCLK_CTL_REG
  96350. CT2_APP_PLL_SCLK_CTL_REG
  96351. CT2_BFA_DIAG_MEMTEST_TOV
  96352. CT2_BFA_FW_USE_COUNT
  96353. CT2_BFA_IOC0_HBEAT_REG
  96354. CT2_BFA_IOC0_STATE_REG
  96355. CT2_BFA_IOC1_HBEAT_REG
  96356. CT2_BFA_IOC1_STATE_REG
  96357. CT2_BFA_IOC_FAIL_SYNC
  96358. CT2_CHIP_MISC_PRG
  96359. CT2_CSI_FW_CTL_REG
  96360. CT2_CSI_FW_CTL_SET_REG
  96361. CT2_CSI_MAC0_CONTROL_REG
  96362. CT2_CSI_MAC1_CONTROL_REG
  96363. CT2_CSI_MAC_CONTROL_REG
  96364. CT2_DOY
  96365. CT2_HOSTFN_INTR_MASK
  96366. CT2_HOSTFN_INT_STATUS
  96367. CT2_HOSTFN_LPU0_CMD_STAT
  96368. CT2_HOSTFN_LPU0_MBOX0
  96369. CT2_HOSTFN_LPU0_READ_STAT
  96370. CT2_HOSTFN_LPU1_CMD_STAT
  96371. CT2_HOSTFN_LPU1_MBOX0
  96372. CT2_HOSTFN_LPU1_READ_STAT
  96373. CT2_HOSTFN_MSIX_VT_INDEX_MBOX_ERR
  96374. CT2_HOSTFN_PAGE_NUM
  96375. CT2_HOSTFN_PERSONALITY0
  96376. CT2_HOSTFN_PERSONALITY1
  96377. CT2_HOST_SEM0_INFO_REG
  96378. CT2_HOST_SEM0_REG
  96379. CT2_HOST_SEM1_INFO_REG
  96380. CT2_HOST_SEM1_REG
  96381. CT2_HOST_SEM2_INFO_REG
  96382. CT2_HOST_SEM2_REG
  96383. CT2_HOST_SEM3_INFO_REG
  96384. CT2_HOST_SEM3_REG
  96385. CT2_HOST_SEM4_INFO_REG
  96386. CT2_HOST_SEM4_REG
  96387. CT2_HOST_SEM5_INFO_REG
  96388. CT2_HOST_SEM5_REG
  96389. CT2_HOST_SEM6_INFO_REG
  96390. CT2_HOST_SEM6_REG
  96391. CT2_HOST_SEM7_INFO_REG
  96392. CT2_HOST_SEM7_REG
  96393. CT2_LPU0_HOSTFN_CMD_STAT
  96394. CT2_LPU0_HOSTFN_MBOX0
  96395. CT2_LPU0_HOSTFN_MBOX0_MSK
  96396. CT2_LPU1_HOSTFN_CMD_STAT
  96397. CT2_LPU1_HOSTFN_MBOX0
  96398. CT2_LPU1_HOSTFN_MBOX0_MSK
  96399. CT2_MBIST_CTL_REG
  96400. CT2_MBIST_STAT_REG
  96401. CT2_NFC_CSR_CLR_REG
  96402. CT2_NFC_CSR_SET_REG
  96403. CT2_NFC_FLASH_STS_REG
  96404. CT2_NFC_MAX_DELAY
  96405. CT2_NFC_PAUSE_MAX_DELAY
  96406. CT2_NFC_STATE_RUNNING
  96407. CT2_NFC_STS_REG
  96408. CT2_NFC_VER_VALID
  96409. CT2_PCIE_MISC_REG
  96410. CT2_PCI_APP_BASE
  96411. CT2_PCI_CPQ_BASE
  96412. CT2_PCI_ETH_BASE
  96413. CT2_PMM_1T_CONTROL_REG_P0
  96414. CT2_PMM_1T_CONTROL_REG_P1
  96415. CT2_RSC_GPR15_REG
  96416. CT2_WGN_STATUS
  96417. CT3_MSK
  96418. CT3_OFF
  96419. CT5880REV_CT5880_C
  96420. CT5880REV_CT5880_D
  96421. CT5880REV_CT5880_E
  96422. CT82C710_CLEAR
  96423. CT82C710_DATA
  96424. CT82C710_DEV_IDLE
  96425. CT82C710_ENABLE
  96426. CT82C710_ERROR_FLAG
  96427. CT82C710_INTS_ON
  96428. CT82C710_IRQ
  96429. CT82C710_RESET
  96430. CT82C710_RX_FULL
  96431. CT82C710_STATUS
  96432. CT82C710_TX_IDLE
  96433. CTALSADEVS
  96434. CTALSA_MIXER_CTL
  96435. CTAMIXER_H
  96436. CTAP_SHORT_EN
  96437. CTATC_H
  96438. CTA_COUNTERS32_BYTES
  96439. CTA_COUNTERS32_PACKETS
  96440. CTA_COUNTERS_BYTES
  96441. CTA_COUNTERS_MAX
  96442. CTA_COUNTERS_ORIG
  96443. CTA_COUNTERS_PACKETS
  96444. CTA_COUNTERS_PAD
  96445. CTA_COUNTERS_REPLY
  96446. CTA_COUNTERS_UNSPEC
  96447. CTA_EXPECT_CLASS
  96448. CTA_EXPECT_FLAGS
  96449. CTA_EXPECT_FN
  96450. CTA_EXPECT_HELP_NAME
  96451. CTA_EXPECT_ID
  96452. CTA_EXPECT_MASK
  96453. CTA_EXPECT_MASTER
  96454. CTA_EXPECT_MAX
  96455. CTA_EXPECT_NAT
  96456. CTA_EXPECT_NAT_DIR
  96457. CTA_EXPECT_NAT_MAX
  96458. CTA_EXPECT_NAT_TUPLE
  96459. CTA_EXPECT_NAT_UNSPEC
  96460. CTA_EXPECT_TIMEOUT
  96461. CTA_EXPECT_TUPLE
  96462. CTA_EXPECT_UNSPEC
  96463. CTA_EXPECT_ZONE
  96464. CTA_HELP
  96465. CTA_HELP_INFO
  96466. CTA_HELP_MAX
  96467. CTA_HELP_NAME
  96468. CTA_HELP_UNSPEC
  96469. CTA_ID
  96470. CTA_IP_MAX
  96471. CTA_IP_UNSPEC
  96472. CTA_IP_V4_DST
  96473. CTA_IP_V4_SRC
  96474. CTA_IP_V6_DST
  96475. CTA_IP_V6_SRC
  96476. CTA_LABELS
  96477. CTA_LABELS_MASK
  96478. CTA_MARK
  96479. CTA_MARK_MASK
  96480. CTA_MAX
  96481. CTA_NAT
  96482. CTA_NAT_DST
  96483. CTA_NAT_MAX
  96484. CTA_NAT_MAXIP
  96485. CTA_NAT_MINIP
  96486. CTA_NAT_PROTO
  96487. CTA_NAT_SEQ_ADJ_ORIG
  96488. CTA_NAT_SEQ_ADJ_REPLY
  96489. CTA_NAT_SEQ_CORRECTION_POS
  96490. CTA_NAT_SEQ_MAX
  96491. CTA_NAT_SEQ_OFFSET_AFTER
  96492. CTA_NAT_SEQ_OFFSET_BEFORE
  96493. CTA_NAT_SEQ_UNSPEC
  96494. CTA_NAT_SRC
  96495. CTA_NAT_UNSPEC
  96496. CTA_NAT_V4_MAXIP
  96497. CTA_NAT_V4_MINIP
  96498. CTA_NAT_V6_MAXIP
  96499. CTA_NAT_V6_MINIP
  96500. CTA_PROTOINFO
  96501. CTA_PROTOINFO_DCCP
  96502. CTA_PROTOINFO_DCCP_HANDSHAKE_SEQ
  96503. CTA_PROTOINFO_DCCP_MAX
  96504. CTA_PROTOINFO_DCCP_PAD
  96505. CTA_PROTOINFO_DCCP_ROLE
  96506. CTA_PROTOINFO_DCCP_STATE
  96507. CTA_PROTOINFO_DCCP_UNSPEC
  96508. CTA_PROTOINFO_MAX
  96509. CTA_PROTOINFO_SCTP
  96510. CTA_PROTOINFO_SCTP_MAX
  96511. CTA_PROTOINFO_SCTP_STATE
  96512. CTA_PROTOINFO_SCTP_UNSPEC
  96513. CTA_PROTOINFO_SCTP_VTAG_ORIGINAL
  96514. CTA_PROTOINFO_SCTP_VTAG_REPLY
  96515. CTA_PROTOINFO_TCP
  96516. CTA_PROTOINFO_TCP_FLAGS_ORIGINAL
  96517. CTA_PROTOINFO_TCP_FLAGS_REPLY
  96518. CTA_PROTOINFO_TCP_MAX
  96519. CTA_PROTOINFO_TCP_STATE
  96520. CTA_PROTOINFO_TCP_UNSPEC
  96521. CTA_PROTOINFO_TCP_WSCALE_ORIGINAL
  96522. CTA_PROTOINFO_TCP_WSCALE_REPLY
  96523. CTA_PROTOINFO_UNSPEC
  96524. CTA_PROTONAT_MAX
  96525. CTA_PROTONAT_PORT_MAX
  96526. CTA_PROTONAT_PORT_MIN
  96527. CTA_PROTONAT_UNSPEC
  96528. CTA_PROTO_DST_PORT
  96529. CTA_PROTO_ICMPV6_CODE
  96530. CTA_PROTO_ICMPV6_ID
  96531. CTA_PROTO_ICMPV6_TYPE
  96532. CTA_PROTO_ICMP_CODE
  96533. CTA_PROTO_ICMP_ID
  96534. CTA_PROTO_ICMP_TYPE
  96535. CTA_PROTO_MAX
  96536. CTA_PROTO_NUM
  96537. CTA_PROTO_SRC_PORT
  96538. CTA_PROTO_UNSPEC
  96539. CTA_SECCTX
  96540. CTA_SECCTX_MAX
  96541. CTA_SECCTX_NAME
  96542. CTA_SECCTX_UNSPEC
  96543. CTA_SECMARK
  96544. CTA_SEQADJ_CORRECTION_POS
  96545. CTA_SEQADJ_MAX
  96546. CTA_SEQADJ_OFFSET_AFTER
  96547. CTA_SEQADJ_OFFSET_BEFORE
  96548. CTA_SEQADJ_UNSPEC
  96549. CTA_SEQ_ADJ_ORIG
  96550. CTA_SEQ_ADJ_REPLY
  96551. CTA_STATS_DELETE
  96552. CTA_STATS_DELETE_LIST
  96553. CTA_STATS_DROP
  96554. CTA_STATS_EARLY_DROP
  96555. CTA_STATS_ERROR
  96556. CTA_STATS_EXP_CREATE
  96557. CTA_STATS_EXP_DELETE
  96558. CTA_STATS_EXP_MAX
  96559. CTA_STATS_EXP_NEW
  96560. CTA_STATS_EXP_UNSPEC
  96561. CTA_STATS_FOUND
  96562. CTA_STATS_GLOBAL_ENTRIES
  96563. CTA_STATS_GLOBAL_MAX
  96564. CTA_STATS_GLOBAL_MAX_ENTRIES
  96565. CTA_STATS_GLOBAL_UNSPEC
  96566. CTA_STATS_IGNORE
  96567. CTA_STATS_INSERT
  96568. CTA_STATS_INSERT_FAILED
  96569. CTA_STATS_INVALID
  96570. CTA_STATS_MAX
  96571. CTA_STATS_NEW
  96572. CTA_STATS_SEARCHED
  96573. CTA_STATS_SEARCH_RESTART
  96574. CTA_STATS_UNSPEC
  96575. CTA_STATUS
  96576. CTA_SYNPROXY
  96577. CTA_SYNPROXY_ISN
  96578. CTA_SYNPROXY_ITS
  96579. CTA_SYNPROXY_MAX
  96580. CTA_SYNPROXY_TSOFF
  96581. CTA_SYNPROXY_UNSPEC
  96582. CTA_TEST
  96583. CTA_TIMEOUT
  96584. CTA_TIMEOUT_DATA
  96585. CTA_TIMEOUT_DCCP_CLOSEREQ
  96586. CTA_TIMEOUT_DCCP_CLOSING
  96587. CTA_TIMEOUT_DCCP_MAX
  96588. CTA_TIMEOUT_DCCP_OPEN
  96589. CTA_TIMEOUT_DCCP_PARTOPEN
  96590. CTA_TIMEOUT_DCCP_REQUEST
  96591. CTA_TIMEOUT_DCCP_RESPOND
  96592. CTA_TIMEOUT_DCCP_TIMEWAIT
  96593. CTA_TIMEOUT_DCCP_UNSPEC
  96594. CTA_TIMEOUT_GENERIC_MAX
  96595. CTA_TIMEOUT_GENERIC_TIMEOUT
  96596. CTA_TIMEOUT_GENERIC_UNSPEC
  96597. CTA_TIMEOUT_GRE_MAX
  96598. CTA_TIMEOUT_GRE_REPLIED
  96599. CTA_TIMEOUT_GRE_UNREPLIED
  96600. CTA_TIMEOUT_GRE_UNSPEC
  96601. CTA_TIMEOUT_ICMPV6_MAX
  96602. CTA_TIMEOUT_ICMPV6_TIMEOUT
  96603. CTA_TIMEOUT_ICMPV6_UNSPEC
  96604. CTA_TIMEOUT_ICMP_MAX
  96605. CTA_TIMEOUT_ICMP_TIMEOUT
  96606. CTA_TIMEOUT_ICMP_UNSPEC
  96607. CTA_TIMEOUT_L3PROTO
  96608. CTA_TIMEOUT_L4PROTO
  96609. CTA_TIMEOUT_MAX
  96610. CTA_TIMEOUT_NAME
  96611. CTA_TIMEOUT_SCTP_CLOSED
  96612. CTA_TIMEOUT_SCTP_COOKIE_ECHOED
  96613. CTA_TIMEOUT_SCTP_COOKIE_WAIT
  96614. CTA_TIMEOUT_SCTP_ESTABLISHED
  96615. CTA_TIMEOUT_SCTP_HEARTBEAT_ACKED
  96616. CTA_TIMEOUT_SCTP_HEARTBEAT_SENT
  96617. CTA_TIMEOUT_SCTP_MAX
  96618. CTA_TIMEOUT_SCTP_SHUTDOWN_ACK_SENT
  96619. CTA_TIMEOUT_SCTP_SHUTDOWN_RECD
  96620. CTA_TIMEOUT_SCTP_SHUTDOWN_SENT
  96621. CTA_TIMEOUT_SCTP_UNSPEC
  96622. CTA_TIMEOUT_TCP_CLOSE
  96623. CTA_TIMEOUT_TCP_CLOSE_WAIT
  96624. CTA_TIMEOUT_TCP_ESTABLISHED
  96625. CTA_TIMEOUT_TCP_FIN_WAIT
  96626. CTA_TIMEOUT_TCP_LAST_ACK
  96627. CTA_TIMEOUT_TCP_MAX
  96628. CTA_TIMEOUT_TCP_RETRANS
  96629. CTA_TIMEOUT_TCP_SYN_RECV
  96630. CTA_TIMEOUT_TCP_SYN_SENT
  96631. CTA_TIMEOUT_TCP_SYN_SENT2
  96632. CTA_TIMEOUT_TCP_TIME_WAIT
  96633. CTA_TIMEOUT_TCP_UNACK
  96634. CTA_TIMEOUT_TCP_UNSPEC
  96635. CTA_TIMEOUT_UDPLITE_MAX
  96636. CTA_TIMEOUT_UDPLITE_REPLIED
  96637. CTA_TIMEOUT_UDPLITE_UNREPLIED
  96638. CTA_TIMEOUT_UDPLITE_UNSPEC
  96639. CTA_TIMEOUT_UDP_MAX
  96640. CTA_TIMEOUT_UDP_REPLIED
  96641. CTA_TIMEOUT_UDP_UNREPLIED
  96642. CTA_TIMEOUT_UDP_UNSPEC
  96643. CTA_TIMEOUT_UNSPEC
  96644. CTA_TIMEOUT_USE
  96645. CTA_TIMESTAMP
  96646. CTA_TIMESTAMP_MAX
  96647. CTA_TIMESTAMP_PAD
  96648. CTA_TIMESTAMP_START
  96649. CTA_TIMESTAMP_STOP
  96650. CTA_TIMESTAMP_UNSPEC
  96651. CTA_TUPLE_IP
  96652. CTA_TUPLE_MASTER
  96653. CTA_TUPLE_MAX
  96654. CTA_TUPLE_ORIG
  96655. CTA_TUPLE_PROTO
  96656. CTA_TUPLE_REPLY
  96657. CTA_TUPLE_UNSPEC
  96658. CTA_TUPLE_ZONE
  96659. CTA_UNSPEC
  96660. CTA_USE
  96661. CTA_ZONE
  96662. CTB_OWNER_HOST
  96663. CTB_RECV
  96664. CTB_SEND
  96665. CTC
  96666. CTCARDS
  96667. CTCMY_DBF_DEV
  96668. CTCMY_DBF_DEV_NAME
  96669. CTCM_BUFSIZE_DEFAULT
  96670. CTCM_BUFSIZE_LIMIT
  96671. CTCM_CCW_DUMP
  96672. CTCM_D3_DUMP
  96673. CTCM_DBF_DEV
  96674. CTCM_DBF_DEV_NAME
  96675. CTCM_DBF_ERROR
  96676. CTCM_DBF_HEX
  96677. CTCM_DBF_INFOS
  96678. CTCM_DBF_MPC_ERROR
  96679. CTCM_DBF_MPC_SETUP
  96680. CTCM_DBF_MPC_TRACE
  96681. CTCM_DBF_SETUP
  96682. CTCM_DBF_TEXT
  96683. CTCM_DBF_TEXT_
  96684. CTCM_DBF_TRACE
  96685. CTCM_FUNTAIL
  96686. CTCM_ID_SIZE
  96687. CTCM_INITIAL_BLOCKLEN
  96688. CTCM_NR_DEV_EVENTS
  96689. CTCM_NR_DEV_STATES
  96690. CTCM_PROTO_LINUX
  96691. CTCM_PROTO_LINUX_TTY
  96692. CTCM_PROTO_MAX
  96693. CTCM_PROTO_MPC
  96694. CTCM_PROTO_OS390
  96695. CTCM_PROTO_S390
  96696. CTCM_PR_DBGDATA
  96697. CTCM_PR_DEBUG
  96698. CTCM_READ
  96699. CTCM_TIME_10_SEC
  96700. CTCM_TIME_1_SEC
  96701. CTCM_TIME_5_SEC
  96702. CTCM_WRITE
  96703. CTC_DBF_ALERT
  96704. CTC_DBF_ALWAYS
  96705. CTC_DBF_CRIT
  96706. CTC_DBF_DEBUG
  96707. CTC_DBF_EMERG
  96708. CTC_DBF_ERROR
  96709. CTC_DBF_INFO
  96710. CTC_DBF_NOTICE
  96711. CTC_DBF_WARN
  96712. CTC_DEVICE_GENE
  96713. CTC_DEVICE_NAME
  96714. CTC_DRIVER_NAME
  96715. CTC_EVENT_ATTN
  96716. CTC_EVENT_ATTNBUSY
  96717. CTC_EVENT_BUSY
  96718. CTC_EVENT_FINSTAT
  96719. CTC_EVENT_IO_EBUSY
  96720. CTC_EVENT_IO_ENODEV
  96721. CTC_EVENT_IO_SUCCESS
  96722. CTC_EVENT_IO_UNKNOWN
  96723. CTC_EVENT_IRQ
  96724. CTC_EVENT_MC_FAIL
  96725. CTC_EVENT_MC_GOOD
  96726. CTC_EVENT_RSWEEP_TIMER
  96727. CTC_EVENT_SC_UNKNOWN
  96728. CTC_EVENT_SEND_XID
  96729. CTC_EVENT_START
  96730. CTC_EVENT_STOP
  96731. CTC_EVENT_TIMER
  96732. CTC_EVENT_UC_HWFAIL
  96733. CTC_EVENT_UC_RCRESET
  96734. CTC_EVENT_UC_RSRESET
  96735. CTC_EVENT_UC_RXPARITY
  96736. CTC_EVENT_UC_TXPARITY
  96737. CTC_EVENT_UC_TXTIMEOUT
  96738. CTC_EVENT_UC_UNKNOWN
  96739. CTC_EVENT_UC_ZERO
  96740. CTC_MODE
  96741. CTC_MPC_NR_EVENTS
  96742. CTC_MPC_NR_STATES
  96743. CTC_NR_EVENTS
  96744. CTC_NR_STATES
  96745. CTC_SHIFT_PARAMETER_MASK
  96746. CTC_SHIFT_PARAMETER_SHIFT
  96747. CTC_SOURCE_CRYSTAL_CLOCK
  96748. CTC_SOURCE_DIVIDE_LOGIC
  96749. CTC_SOURCE_PARAMETER_MASK
  96750. CTC_STATE_DTERM
  96751. CTC_STATE_IDLE
  96752. CTC_STATE_NOTOP
  96753. CTC_STATE_RX
  96754. CTC_STATE_RXERR
  96755. CTC_STATE_RXIDLE
  96756. CTC_STATE_RXINIT
  96757. CTC_STATE_SETUPWAIT
  96758. CTC_STATE_STARTRETRY
  96759. CTC_STATE_STARTWAIT
  96760. CTC_STATE_STOPPED
  96761. CTC_STATE_TERM
  96762. CTC_STATE_TX
  96763. CTC_STATE_TXERR
  96764. CTC_STATE_TXIDLE
  96765. CTC_STATE_TXINIT
  96766. CTDAIO_H
  96767. CTDP_CMD_OPERATION_REPORT
  96768. CTDP_CMD_OPERATION_START
  96769. CTDP_CMD_OPERATION_STOP
  96770. CTDP_CONFIG_CMD
  96771. CTD_CONTROL_MASK
  96772. CTD_CONTROL_SHFT
  96773. CTD_EVENT_MASK
  96774. CTD_EVENT_SHFT
  96775. CTD_FID0_MASK
  96776. CTD_FID0_SHFT
  96777. CTD_FID1_MASK
  96778. CTD_FID1_SHFT
  96779. CTD_FID2_MASK
  96780. CTD_FID2_SHFT
  96781. CTD_LINE_COUNT_MASK
  96782. CTD_LINE_COUNT_SHFT
  96783. CTD_LIST_SIZE_MASK
  96784. CTD_LIST_SIZE_SHFT
  96785. CTD_PIXEL_COUNT_MASK
  96786. CTD_PIXEL_COUNT_SHFT
  96787. CTD_PKT_TYPE
  96788. CTD_PKT_TYPE_MASK
  96789. CTD_PKT_TYPE_SHFT
  96790. CTD_SOURCE_MASK
  96791. CTD_SOURCE_SHFT
  96792. CTD_TIMER_VALUE_MASK
  96793. CTD_TIMER_VALUE_SHFT
  96794. CTD_TYPE_ABORT_CHANNEL
  96795. CTD_TYPE_CHNG_CLIENT_IRQ
  96796. CTD_TYPE_RELOAD_LIST
  96797. CTD_TYPE_SEND_IRQ
  96798. CTD_TYPE_SYNC_ON_CHANNEL
  96799. CTD_TYPE_SYNC_ON_CLIENT
  96800. CTD_TYPE_SYNC_ON_EXT
  96801. CTD_TYPE_SYNC_ON_LIST
  96802. CTD_TYPE_SYNC_ON_LM_TIMER
  96803. CTEMP
  96804. CTEMP_MASK
  96805. CTEST0_REG
  96806. CTEST1_REG
  96807. CTEST2_REG
  96808. CTEST3_REG
  96809. CTEST4_REG
  96810. CTEST5_REG
  96811. CTEST6_REG
  96812. CTEST7_REG
  96813. CTEST7_TT1
  96814. CTEST8_REG
  96815. CTEST9_REG
  96816. CTF_OFFSET_EDGE
  96817. CTF_OFFSET_HBM
  96818. CTF_OFFSET_HOTSPOT
  96819. CTF_PAD_EN
  96820. CTF_PAD_POLARITY
  96821. CTF_SEL
  96822. CTF_SEL_MASK
  96823. CTF_TEMP
  96824. CTF_TEMP_MASK
  96825. CTF_TEMP_SHIFT
  96826. CTG_STOLEN_RESERVED
  96827. CTHARDWARE_H
  96828. CTHENDRIX
  96829. CTHW20K1_H
  96830. CTHW20K2_H
  96831. CTIAPPCLEAR
  96832. CTIAPPPULSE
  96833. CTIAPPSET
  96834. CTICHINSTATUS
  96835. CTICHOUTSTATUS
  96836. CTICONTROL
  96837. CTIINEN
  96838. CTIINTACK
  96839. CTILOCK
  96840. CTIMAP_H
  96841. CTIMERCALC
  96842. CTINFO2DIR
  96843. CTINFO_MODE_CPMARK
  96844. CTINFO_MODE_DSCP
  96845. CTIO7_FLAGS_CONFIRM_SATISF
  96846. CTIO7_FLAGS_CONFORM_REQ
  96847. CTIO7_FLAGS_DATA_IN
  96848. CTIO7_FLAGS_DATA_OUT
  96849. CTIO7_FLAGS_DONT_RET_CTIO
  96850. CTIO7_FLAGS_DSD_PTR
  96851. CTIO7_FLAGS_EXPLICIT_CONFORM
  96852. CTIO7_FLAGS_SEND_STATUS
  96853. CTIO7_FLAGS_STATUS_MODE_0
  96854. CTIO7_FLAGS_STATUS_MODE_1
  96855. CTIO7_FLAGS_STATUS_MODE_2
  96856. CTIO7_FLAGS_TERMINATE
  96857. CTIO7_NHANDLE_UNRECOGNIZED
  96858. CTIOUTEN
  96859. CTIO_A64_RET_TYPE
  96860. CTIO_A64_TYPE
  96861. CTIO_ABORTED
  96862. CTIO_COMPLETION_HANDLE_MARK
  96863. CTIO_CRC2
  96864. CTIO_CRC2_AF_DIF_DSD_ENA
  96865. CTIO_CRC_SF_DIF_CHOPPED
  96866. CTIO_DIF_ERROR
  96867. CTIO_INTERMEDIATE_HANDLE_MARK
  96868. CTIO_INVALID_RX_ID
  96869. CTIO_LIP_RESET
  96870. CTIO_PORT_CONF_CHANGED
  96871. CTIO_PORT_LOGGED_OUT
  96872. CTIO_PORT_UNAVAILABLE
  96873. CTIO_RET_TYPE
  96874. CTIO_SRR_RECEIVED
  96875. CTIO_SUCCESS
  96876. CTIO_TARGET_RESET
  96877. CTIO_TIMEOUT
  96878. CTIO_TYPE7
  96879. CTIPCELLID0
  96880. CTIPCELLID1
  96881. CTIPCELLID2
  96882. CTIPCELLID3
  96883. CTIPERIPHID0
  96884. CTIPERIPHID1
  96885. CTIPERIPHID2
  96886. CTIPERIPHID3
  96887. CTIPROTECTION
  96888. CTISTATUS
  96889. CTITRIGINSTATUS
  96890. CTITRIGOUTSTATUS
  96891. CTI_PCI_DEVICE_ID_CRG001
  96892. CTI_PCI_VENDOR_ID
  96893. CTL
  96894. CTL1000_AS_MASTER
  96895. CTL1000_ENABLE_MASTER
  96896. CTLA_CHG
  96897. CTLA_REG
  96898. CTLBITS
  96899. CTLB_CHG
  96900. CTLCMDTYPE_F
  96901. CTLCMDTYPE_S
  96902. CTLCMDTYPE_V
  96903. CTLC_CHG
  96904. CTLD_CHG
  96905. CTLID_0001
  96906. CTLID_NULL
  96907. CTLI_INTCNT_BE
  96908. CTLI_INTCNT_DIS
  96909. CTLI_INTCNT_NE
  96910. CTLI_INTCNT_PE
  96911. CTLLEAFIND
  96912. CTLO_DIR_IN
  96913. CTLO_DIR_OUT
  96914. CTLO_DRV_CMOS
  96915. CTLO_DRV_MASK
  96916. CTLO_DRV_OD
  96917. CTLO_DRV_REN
  96918. CTLO_INPUT_SET
  96919. CTLO_OUTPUT_SET
  96920. CTLO_RVAL_2KDOWN
  96921. CTLO_RVAL_2KDW
  96922. CTLO_RVAL_2KUP
  96923. CTLO_RVAL_50KDOWN
  96924. CTLO_RVAL_50KDW
  96925. CTLO_RVAL_50KUP
  96926. CTLREQID_S
  96927. CTLREQID_V
  96928. CTLR_CMD_START
  96929. CTLR_CMD_WRITE
  96930. CTLR_CONFIG_CMD
  96931. CTLR_ENCLOSURE_HOT_PLUG_EVENT
  96932. CTLR_FIFO_RESET
  96933. CTLR_FINISHED
  96934. CTLR_IRQ
  96935. CTLR_POWER_SAVING
  96936. CTLR_POWER_STATE_CHANGE
  96937. CTLR_RESULT
  96938. CTLR_SHUTDOWN
  96939. CTLR_STATE_CHANGE_EVENT
  96940. CTLR_STATE_CHANGE_EVENT_AIO_CONFIG_CHANGE
  96941. CTLR_STATE_CHANGE_EVENT_AIO_ENABLED_DISABLED
  96942. CTLR_STATE_CHANGE_EVENT_LOGICAL_DRV
  96943. CTLR_STATE_CHANGE_EVENT_PHYSICAL_DRV
  96944. CTLR_STATE_CHANGE_EVENT_REDUNDANT_CNTRL
  96945. CTLR_WORKING
  96946. CTLTCAMINDEX_S
  96947. CTLTCAMINDEX_V
  96948. CTLTCAMSEL_S
  96949. CTLTCAMSEL_V
  96950. CTLTREESIZE
  96951. CTLXYBITSEL_S
  96952. CTLXYBITSEL_V
  96953. CTLX_COMPLETE
  96954. CTLX_PENDING
  96955. CTLX_REQ_COMPLETE
  96956. CTLX_REQ_FAILED
  96957. CTLX_REQ_SUBMITTED
  96958. CTLX_RESP_COMPLETE
  96959. CTLX_START
  96960. CTL_0
  96961. CTL_1
  96962. CTL_11A
  96963. CTL_11A_EXT
  96964. CTL_11B
  96965. CTL_11B_EXT
  96966. CTL_11G
  96967. CTL_11G_EXT
  96968. CTL_2
  96969. CTL_2GHT20
  96970. CTL_2GHT40
  96971. CTL_3
  96972. CTL_4
  96973. CTL_5GHT20
  96974. CTL_5GHT40
  96975. CTL_ABI
  96976. CTL_ACAP_EN
  96977. CTL_ADD_EXCLUSIVE
  96978. CTL_ADD_ON_REPLACE
  96979. CTL_APPLDATA_INTERVAL
  96980. CTL_APPLDATA_MEM
  96981. CTL_APPLDATA_NET_SUM
  96982. CTL_APPLDATA_OS
  96983. CTL_APPLDATA_PROC
  96984. CTL_APPLDATA_TIMER
  96985. CTL_ARG_REG
  96986. CTL_ARLAN
  96987. CTL_AUTO_RELEASE
  96988. CTL_A_G2X
  96989. CTL_A_GAIN_MASK
  96990. CTL_A_GAIN_SHIFT
  96991. CTL_A_PWRDN
  96992. CTL_A_SEL_MASK
  96993. CTL_A_SEL_SFM
  96994. CTL_A_SEL_SHIFT
  96995. CTL_A_SEL_SML
  96996. CTL_A_SEL_SMXC
  96997. CTL_A_SEL_STV
  96998. CTL_BADADDR
  96999. CTL_BALANCE
  97000. CTL_BANK_SELECT
  97001. CTL_BREATH
  97002. CTL_BSTATUS
  97003. CTL_BUS
  97004. CTL_BUS_ISA
  97005. CTL_CAPABILITY
  97006. CTL_CELESTE_DEPTH
  97007. CTL_CFG_2
  97008. CTL_CHORUS_DEPTH
  97009. CTL_CLK_AND_WAIT_CTL
  97010. CTL_CLK_M
  97011. CTL_CODE
  97012. CTL_CONFIG
  97013. CTL_CPU
  97014. CTL_CPUID
  97015. CTL_CR_ENABLE
  97016. CTL_CURRENT
  97017. CTL_DAMPER_PEDAL
  97018. CTL_DATA_DECREMENT
  97019. CTL_DATA_ENTRY
  97020. CTL_DATA_INCREMENT
  97021. CTL_DA_APP
  97022. CTL_DA_DPM
  97023. CTL_DA_ES2
  97024. CTL_DA_IOM_AFE
  97025. CTL_DA_IOM_DA
  97026. CTL_DA_LMT
  97027. CTL_DA_LRD_SHIFT
  97028. CTL_DA_LRI
  97029. CTL_DA_MLB
  97030. CTL_DA_SBR
  97031. CTL_DA_SCE
  97032. CTL_DA_SDR_MASK
  97033. CTL_DA_SDR_SHIFT
  97034. CTL_DEBUG
  97035. CTL_DETUNE_DEPTH
  97036. CTL_DEV
  97037. CTL_DIR
  97038. CTL_DMA_ENABLE
  97039. CTL_DNADR
  97040. CTL_DONE_TIMEOUT
  97041. CTL_DTR
  97042. CTL_EDGE_FLAGS
  97043. CTL_EDGE_TPOWER
  97044. CTL_EEPROM_SELECT
  97045. CTL_EE_SELECT
  97046. CTL_EPROM_ACCESS
  97047. CTL_ESTATUS
  97048. CTL_ETSI
  97049. CTL_EXCEPTION
  97050. CTL_EXPRESSION
  97051. CTL_EXT_EFF_DEPTH
  97052. CTL_FCC
  97053. CTL_FIFO_ENABLE
  97054. CTL_FLAG_GEN_ICV
  97055. CTL_FLAG_GEN_REVAES
  97056. CTL_FLAG_MASK
  97057. CTL_FLAG_PERFORM_ABLK
  97058. CTL_FLAG_PERFORM_AEAD
  97059. CTL_FLAG_UNUSED
  97060. CTL_FLAG_USED
  97061. CTL_FLUSH
  97062. CTL_FLUSH_COMM_CMDS
  97063. CTL_FLUSH_MASK_CTL
  97064. CTL_FLUSH_RCV_BUFFER
  97065. CTL_FLUSH_XMT_BUFFER
  97066. CTL_FOOT
  97067. CTL_FREERUN
  97068. CTL_FRV
  97069. CTL_FS
  97070. CTL_GENERAL_PURPOSE1
  97071. CTL_GENERAL_PURPOSE2
  97072. CTL_GENERAL_PURPOSE3
  97073. CTL_GENERAL_PURPOSE4
  97074. CTL_GENERAL_PURPOSE5
  97075. CTL_GENERAL_PURPOSE6
  97076. CTL_GENERAL_PURPOSE7
  97077. CTL_GENERAL_PURPOSE8
  97078. CTL_GET_COMM_CMDS
  97079. CTL_HALT_EXE_DONE
  97080. CTL_HALT_EXE_IDLE
  97081. CTL_HOLD
  97082. CTL_HOLD2
  97083. CTL_IDLC
  97084. CTL_IDLE
  97085. CTL_IENABLE
  97086. CTL_INFO_ATTR
  97087. CTL_INO
  97088. CTL_INT
  97089. CTL_IPENDING
  97090. CTL_IRQ_MASK
  97091. CTL_KERN
  97092. CTL_LAYER
  97093. CTL_LAYER_EXT
  97094. CTL_LAYER_EXT2
  97095. CTL_LAYER_EXT3
  97096. CTL_LAYER_EXTN_OFFSET
  97097. CTL_LE_ENABLE
  97098. CTL_LINK_ENCRYPTION_REQ
  97099. CTL_MAIN_VOLUME
  97100. CTL_MAP_SIZE
  97101. CTL_MAX
  97102. CTL_MAXNAME
  97103. CTL_MAX_RESVPORT
  97104. CTL_MIN
  97105. CTL_MIN_RESVPORT
  97106. CTL_MIXER_BORDER_OUT
  97107. CTL_MKK
  97108. CTL_MODE_M
  97109. CTL_MODE_VSEL0_MODE
  97110. CTL_MODE_VSEL1_MODE
  97111. CTL_MODWHEEL
  97112. CTL_MPUACC
  97113. CTL_MPUBASE
  97114. CTL_MRR
  97115. CTL_MTR
  97116. CTL_NAME
  97117. CTL_NET
  97118. CTL_NFSDDEBUG
  97119. CTL_NFSDEBUG
  97120. CTL_NLMDEBUG
  97121. CTL_NODTR
  97122. CTL_NONREG_PARM_NUM_LSB
  97123. CTL_NONREG_PARM_NUM_MSB
  97124. CTL_NORTS
  97125. CTL_ONESHOT
  97126. CTL_OUTPUT_DISCHG
  97127. CTL_PAN
  97128. CTL_PARAM_OFFSET_FACTOR
  97129. CTL_PARAM_OFFSET_FW_ID
  97130. CTL_PARAM_OFFSET_PHY_CH_X
  97131. CTL_PARAM_OFFSET_PHY_CH_Y
  97132. CTL_PARAM_OFFSET_PHY_H
  97133. CTL_PARAM_OFFSET_PHY_W
  97134. CTL_PARAM_OFFSET_PHY_X0
  97135. CTL_PARAM_OFFSET_PHY_X1
  97136. CTL_PARAM_OFFSET_PHY_Y0
  97137. CTL_PARAM_OFFSET_PHY_Y1
  97138. CTL_PARAM_OFFSET_PLAT_ID
  97139. CTL_PARAM_OFFSET_XMLS_ID1
  97140. CTL_PARAM_OFFSET_XMLS_ID2
  97141. CTL_PATH
  97142. CTL_PERIODIC
  97143. CTL_PHASER_DEPTH
  97144. CTL_PKTP_16
  97145. CTL_PKTP_4
  97146. CTL_PKTP_8
  97147. CTL_PM
  97148. CTL_PORTAMENTO
  97149. CTL_PORTAMENTO_TIME
  97150. CTL_POWERDOWN
  97151. CTL_PREPARE
  97152. CTL_PROC
  97153. CTL_PTEADDR
  97154. CTL_RCV_BAD
  97155. CTL_READ
  97156. CTL_REG
  97157. CTL_REGIST_PARM_NUM_LSB
  97158. CTL_REGIST_PARM_NUM_MSB
  97159. CTL_RELOAD
  97160. CTL_REPLACE
  97161. CTL_RESET
  97162. CTL_RESET_DEVICE
  97163. CTL_RESET_SD
  97164. CTL_RESET_SDIO
  97165. CTL_RESPONSE
  97166. CTL_RESUME_EXE
  97167. CTL_RISC_ENABLE
  97168. CTL_ROUTE_ANALOG
  97169. CTL_ROUTE_DIGITAL
  97170. CTL_RPCDEBUG
  97171. CTL_RSV1
  97172. CTL_RSV2
  97173. CTL_RTS
  97174. CTL_S390DBF
  97175. CTL_S390DBF_ACTIVE
  97176. CTL_S390DBF_STOPPABLE
  97177. CTL_SDIF_MODE
  97178. CTL_SDIO_IRQ_MASK
  97179. CTL_SDIO_REGS
  97180. CTL_SDIO_STATUS
  97181. CTL_SD_CARD_CLK_CTL
  97182. CTL_SD_CMD
  97183. CTL_SD_DATA_PORT
  97184. CTL_SD_ERROR_DETAIL_STATUS
  97185. CTL_SD_MEM_CARD_OPT
  97186. CTL_SD_XFER_LEN
  97187. CTL_SIZE
  97188. CTL_SLEW_MASK
  97189. CTL_SLEW_SHIFT
  97190. CTL_SLOTS
  97191. CTL_SLOTTABLE_TCP
  97192. CTL_SLOTTABLE_UDP
  97193. CTL_SOFT_PEDAL
  97194. CTL_SOSTENUTO
  97195. CTL_SPEED
  97196. CTL_START
  97197. CTL_START_EXE
  97198. CTL_STATUS
  97199. CTL_STATUS_4200
  97200. CTL_STAT_BOOKED
  97201. CTL_STAT_BUSY
  97202. CTL_STOP_INTERNAL_ACTION
  97203. CTL_STORE
  97204. CTL_STR
  97205. CTL_SUNRPC
  97206. CTL_SUSTAIN
  97207. CTL_SW_RESET
  97208. CTL_SYN
  97209. CTL_TE_ENABLE
  97210. CTL_TLBACC
  97211. CTL_TLBMISC
  97212. CTL_TOP
  97213. CTL_TRANSACTION_CTL
  97214. CTL_TREMOLO_DEPTH
  97215. CTL_UDRNC
  97216. CTL_ULONG
  97217. CTL_URCT
  97218. CTL_URSKP
  97219. CTL_UUID
  97220. CTL_VERSION
  97221. CTL_VM
  97222. CTL_WRITE
  97223. CTL_XFER_BLK_COUNT
  97224. CTMIXER_H
  97225. CTM_COEFF_0_125
  97226. CTM_COEFF_0_25
  97227. CTM_COEFF_0_5
  97228. CTM_COEFF_1_0
  97229. CTM_COEFF_2_0
  97230. CTM_COEFF_4_0
  97231. CTM_COEFF_8_0
  97232. CTM_COEFF_ABS
  97233. CTM_COEFF_LIMITED_RANGE
  97234. CTM_COEFF_NEGATIVE
  97235. CTM_COEFF_SIGN
  97236. CTNL_TIMEOUT_NAME_MAX
  97237. CTOP_AUX_BASE
  97238. CTOP_AUX_CLUSTER_ID
  97239. CTOP_AUX_CORE_ID
  97240. CTOP_AUX_DPC
  97241. CTOP_AUX_EFLAGS
  97242. CTOP_AUX_GLOBAL_ID
  97243. CTOP_AUX_GPA1
  97244. CTOP_AUX_HW_COMPLY
  97245. CTOP_AUX_IACK
  97246. CTOP_AUX_LOGIC_CLUSTER_ID
  97247. CTOP_AUX_LOGIC_CORE_ID
  97248. CTOP_AUX_LOGIC_GLOBAL_ID
  97249. CTOP_AUX_LPC
  97250. CTOP_AUX_MT_CTRL
  97251. CTOP_AUX_THREAD_ID
  97252. CTOP_AUX_UDMC
  97253. CTOP_INST_AADD_DI_R2_R2_R3
  97254. CTOP_INST_AAND_DI_R2_R2_R3
  97255. CTOP_INST_AOR_DI_R2_R2_R3
  97256. CTOP_INST_ASRI_0_R3
  97257. CTOP_INST_AXOR_DI_R2_R2_R3
  97258. CTOP_INST_EXC_DI_R2_R2_R3
  97259. CTOP_INST_HWSCHD_OFF_R3
  97260. CTOP_INST_HWSCHD_OFF_R4
  97261. CTOP_INST_HWSCHD_RESTORE_R3
  97262. CTOP_INST_HWSCHD_RESTORE_R4
  97263. CTOP_INST_HWSCHD_WFT_IE12
  97264. CTOP_INST_MOV2B_FLIP_R3_B1_B2_INST
  97265. CTOP_INST_MOV2B_FLIP_R3_B1_B2_LIMM
  97266. CTOP_INST_RSPI_GIC_0_R12
  97267. CTOP_INST_SCHD_RD
  97268. CTOP_INST_SCHD_RW
  97269. CTOP_INST_XEX_DI_R2_R2_R3
  97270. CTOR
  97271. CTOR_BYTES
  97272. CTOR_PATTERN
  97273. CTO_EN
  97274. CTPCM_H
  97275. CTPF_ABORT_REQ_RCVD
  97276. CTPF_ABORT_RPL_PENDING
  97277. CTPF_ABORT_RPL_RCVD
  97278. CTPF_ACTIVE_CLOSE_NEEDED
  97279. CTPF_HAS_ATID
  97280. CTPF_HAS_TID
  97281. CTPF_LOGOUT_RSP_RCVD
  97282. CTPF_OFFLOAD_DOWN
  97283. CTPF_TX_DATA_SENT
  97284. CTPIO_STATS_MAP_BUCKET_LBN
  97285. CTPIO_STATS_MAP_BUCKET_LEN
  97286. CTPIO_STATS_MAP_BUCKET_OFST
  97287. CTPIO_STATS_MAP_BUCKET_WIDTH
  97288. CTPIO_STATS_MAP_LEN
  97289. CTPIO_STATS_MAP_VI_LBN
  97290. CTPIO_STATS_MAP_VI_LEN
  97291. CTPIO_STATS_MAP_VI_OFST
  97292. CTPIO_STATS_MAP_VI_WIDTH
  97293. CTPL
  97294. CTPR_MS_DPAA2
  97295. CTPR_MS_PG_SZ_MASK
  97296. CTPR_MS_PG_SZ_SHIFT
  97297. CTPR_MS_PS
  97298. CTPR_MS_QI_MASK
  97299. CTPR_MS_QI_SHIFT
  97300. CTPR_MS_VIRT_EN_INCL
  97301. CTPR_MS_VIRT_EN_POR
  97302. CTP_ABORTING
  97303. CTP_ACTIVE_CLOSE
  97304. CTP_ACTIVE_OPEN
  97305. CTP_CLOSED
  97306. CTP_CLOSE_WAIT_1
  97307. CTP_CLOSE_WAIT_2
  97308. CTP_CONNECTING
  97309. CTP_ESTABLISHED
  97310. CTP_PASSIVE_CLOSE
  97311. CTR
  97312. CTR4
  97313. CTRAN_BYPASS_OFF
  97314. CTRAN_BYPASS_ON
  97315. CTRAN_OFST
  97316. CTRE
  97317. CTRESOURCE_H
  97318. CTRL
  97319. CTRL0
  97320. CTRL0_AEC_EN
  97321. CTRL0_AEC_SEL
  97322. CTRL0_DMA_EN
  97323. CTRL0_ENABLE_SHIFT
  97324. CTRL0_FRDDR_PP_MODE
  97325. CTRL0_I2S_BCLK_O_INV
  97326. CTRL0_I2S_BCLK_SEL
  97327. CTRL0_I2S_BLK_CAP_INV
  97328. CTRL0_I2S_DAT_SEL
  97329. CTRL0_I2S_LRCLK_SEL
  97330. CTRL0_INT_EN
  97331. CTRL0_IP_SW_RST
  97332. CTRL0_P0_PHY_CALIBRATED
  97333. CTRL0_P0_PHY_CALIBRATED_SEL
  97334. CTRL0_RAW_EN
  97335. CTRL0_RGB_EN
  97336. CTRL0_SEL1_EN_SHIFT
  97337. CTRL0_SEL2_EN_SHIFT
  97338. CTRL0_SEL2_SHIFT
  97339. CTRL0_SEL3_EN_SHIFT
  97340. CTRL0_SEL3_SHIFT
  97341. CTRL0_SEL_MASK
  97342. CTRL0_SEL_SHIFT
  97343. CTRL0_SPDIF_CLK_CAP_INV
  97344. CTRL0_SPDIF_CLK_O_INV
  97345. CTRL0_SPDIF_CLK_SEL
  97346. CTRL0_SPDIF_SEL
  97347. CTRL0_STAT_SEL
  97348. CTRL0_TODDR_EXT_SIGNED
  97349. CTRL0_TODDR_LSB_POS
  97350. CTRL0_TODDR_LSB_POS_MASK
  97351. CTRL0_TODDR_MSB_POS
  97352. CTRL0_TODDR_MSB_POS_MASK
  97353. CTRL0_TODDR_PP_MODE
  97354. CTRL0_TODDR_SEL_RESAMPLE
  97355. CTRL0_TODDR_TYPE
  97356. CTRL0_TODDR_TYPE_MASK
  97357. CTRL0_VFIRST
  97358. CTRL0_YUV422
  97359. CTRL0_YUV_EN
  97360. CTRL1
  97361. CTRL1_12_HOUR
  97362. CTRL1_AWB
  97363. CTRL1_AWB_GAIN
  97364. CTRL1_BITS
  97365. CTRL1_CHIPSELECT
  97366. CTRL1_CIP
  97367. CTRL1_CLEAR
  97368. CTRL1_CORR_INT
  97369. CTRL1_CUR_FRAME_DONE_IRQ
  97370. CTRL1_CUR_FRAME_DONE_IRQ_EN
  97371. CTRL1_DEFAULT
  97372. CTRL1_DF0
  97373. CTRL1_DF1
  97374. CTRL1_DG
  97375. CTRL1_DMY
  97376. CTRL1_DR
  97377. CTRL1_DR0
  97378. CTRL1_DR1
  97379. CTRL1_EXT_TEST
  97380. CTRL1_FIFO_CLEAR
  97381. CTRL1_FRDDR_DEPTH
  97382. CTRL1_FRDDR_DEPTH_MASK
  97383. CTRL1_FRDDR_FORCE_FINISH
  97384. CTRL1_FS
  97385. CTRL1_GET_BYTE_PACKAGING
  97386. CTRL1_INT_CLR
  97387. CTRL1_IP_HOST_PDN
  97388. CTRL1_LENC
  97389. CTRL1_ODR0
  97390. CTRL1_ODR1
  97391. CTRL1_ODR2
  97392. CTRL1_ODR3
  97393. CTRL1_PD
  97394. CTRL1_PD0
  97395. CTRL1_PD1
  97396. CTRL1_PM0
  97397. CTRL1_PM1
  97398. CTRL1_PM2
  97399. CTRL1_PRE
  97400. CTRL1_RAW_GMA
  97401. CTRL1_SEL_SHIFT
  97402. CTRL1_SET_BYTE_PACKAGING
  97403. CTRL1_SPND
  97404. CTRL1_ST
  97405. CTRL1_STATUS2_SEL
  97406. CTRL1_STATUS2_SEL_MASK
  97407. CTRL1_STM
  97408. CTRL1_STOP
  97409. CTRL1_STP
  97410. CTRL1_SW_AUDIO
  97411. CTRL1_SW_OPEN
  97412. CTRL1_SW_RESET
  97413. CTRL1_SW_UART
  97414. CTRL1_SW_USB
  97415. CTRL1_TODDR_FORCE_FINISH
  97416. CTRL1_Xen
  97417. CTRL1_Yen
  97418. CTRL1_Zen
  97419. CTRL2
  97420. CTRL2_ACCDET_MASK
  97421. CTRL2_ACCDET_SHIFT
  97422. CTRL2_ADCEN_MASK
  97423. CTRL2_ADCEN_SHIFT
  97424. CTRL2_AF
  97425. CTRL2_AIE
  97426. CTRL2_BDU
  97427. CTRL2_BITS
  97428. CTRL2_BLE
  97429. CTRL2_BOOT
  97430. CTRL2_BOOT_3DLH
  97431. CTRL2_BOOT_8B
  97432. CTRL2_CMX_EN
  97433. CTRL2_CPEN0_LOWPWR1
  97434. CTRL2_CPEN1_LOWPWR0
  97435. CTRL2_CPEN_MASK
  97436. CTRL2_CPEN_SHIFT
  97437. CTRL2_DAS
  97438. CTRL2_DCW_EN
  97439. CTRL2_DRDY
  97440. CTRL2_FDS_3DLH
  97441. CTRL2_FRM_ERR_EN
  97442. CTRL2_FS
  97443. CTRL2_GAME_ADCMODE
  97444. CTRL2_HPEN1
  97445. CTRL2_HPEN2
  97446. CTRL2_IEN
  97447. CTRL2_IP_DEV_PDN
  97448. CTRL2_LOWPWR_MASK
  97449. CTRL2_LOWPWR_SHIFT
  97450. CTRL2_MI
  97451. CTRL2_MSF
  97452. CTRL2_OUT_SELECT
  97453. CTRL2_RCPS_MASK
  97454. CTRL2_RCPS_SHIFT
  97455. CTRL2_RX_OV_EN
  97456. CTRL2_SDE_EN
  97457. CTRL2_SEL1_EN_SHIFT
  97458. CTRL2_SEL1_SHIFT
  97459. CTRL2_SEL2_EN_SHIFT
  97460. CTRL2_SEL2_SHIFT
  97461. CTRL2_SEL3_EN_SHIFT
  97462. CTRL2_SEL3_SHIFT
  97463. CTRL2_SFOUTASRT_MASK
  97464. CTRL2_SFOUTASRT_SHIFT
  97465. CTRL2_SFOUTORD_MASK
  97466. CTRL2_SFOUTORD_SHIFT
  97467. CTRL2_SI
  97468. CTRL2_SIM
  97469. CTRL2_TF
  97470. CTRL2_TIE
  97471. CTRL2_TI_TP
  97472. CTRL2_TX_UR_EN
  97473. CTRL2_USBCPINT_MASK
  97474. CTRL2_USBCPINT_SHIFT
  97475. CTRL2_UV_ADJ_EN
  97476. CTRL2_UV_AVG_EN
  97477. CTRL3
  97478. CTRL3_ADCDBSET_MASK
  97479. CTRL3_ADCDBSET_SHIFT
  97480. CTRL3_BOOTSET_MASK
  97481. CTRL3_BOOTSET_SHIFT
  97482. CTRL3_BPC_EN
  97483. CTRL3_CFS0
  97484. CTRL3_CFS1
  97485. CTRL3_ECK
  97486. CTRL3_FDS
  97487. CTRL3_HPDD
  97488. CTRL3_HPFF
  97489. CTRL3_JIGSET_MASK
  97490. CTRL3_JIGSET_SHIFT
  97491. CTRL3_WBTH_MASK
  97492. CTRL3_WBTH_SHIFT
  97493. CTRL3_WPC_EN
  97494. CTRL4_BDU
  97495. CTRL4_BLE
  97496. CTRL4_FS0
  97497. CTRL4_FS1
  97498. CTRL4_OTG_PHY_SEL
  97499. CTRL4_PICO_OGDISABLE
  97500. CTRL4_PICO_SIDDQ
  97501. CTRL4_PICO_VBUSVLDEXT
  97502. CTRL4_PICO_VBUSVLDEXTSEL
  97503. CTRL4_SIM
  97504. CTRL4_ST0
  97505. CTRL4_ST1
  97506. CTRL4_STSIGN
  97507. CTRL5_PICOPHY_ACAENB
  97508. CTRL5_PICOPHY_BC_MODE
  97509. CTRL5_PICOPHY_CHRGSEL
  97510. CTRL5_PICOPHY_DCDENB
  97511. CTRL5_PICOPHY_IDDIG
  97512. CTRL5_PICOPHY_VDATDETENB
  97513. CTRL5_PICOPHY_VDATSRCEND
  97514. CTRL5_USBOTG_RES_SEL
  97515. CTRLCHAR_CTRL
  97516. CTRLCHAR_MASK
  97517. CTRLCHAR_NONE
  97518. CTRLCHAR_SYSRQ
  97519. CTRLDEF_COUNT
  97520. CTRLFB_OFF
  97521. CTRLI
  97522. CTRLID_FILTER
  97523. CTRLID_GAINS
  97524. CTRLID_HRTF
  97525. CTRLID_ILD
  97526. CTRLID_ITD
  97527. CTRLIF_COMMAND
  97528. CTRLIF_DATA
  97529. CTRLIF_SIZE_HIGH
  97530. CTRLIF_SIZE_LOW
  97531. CTRLIF_STATUS
  97532. CTRLI_H_DIV_SET
  97533. CTRLI_LP_DP
  97534. CTRLI_ROUND
  97535. CTRLI_V_DIV_SET
  97536. CTRLMODER
  97537. CTRLMODER_PASSALL
  97538. CTRLMODER_RXFLOW
  97539. CTRLMODER_TXFLOW
  97540. CTRLOPT_NEW_CONN_DISABLE
  97541. CTRL_10GBASET_FD_EEE
  97542. CTRL_1GBASET_FD_EEE
  97543. CTRL_25MBPHY
  97544. CTRL_2P5GBASET_FD_EEE
  97545. CTRL_32KHZ
  97546. CTRL_5GBASET_FD_EEE
  97547. CTRL_ACK
  97548. CTRL_ACTION
  97549. CTRL_AHDR_OPT
  97550. CTRL_ALARM
  97551. CTRL_ALARMEN
  97552. CTRL_ALWAYS
  97553. CTRL_APP1
  97554. CTRL_APP2
  97555. CTRL_ASYMMETRIC_PAUSE
  97556. CTRL_ATTR_FAMILY_ID
  97557. CTRL_ATTR_FAMILY_NAME
  97558. CTRL_ATTR_HDRSIZE
  97559. CTRL_ATTR_MAX
  97560. CTRL_ATTR_MAXATTR
  97561. CTRL_ATTR_MCAST_GROUPS
  97562. CTRL_ATTR_MCAST_GRP_ID
  97563. CTRL_ATTR_MCAST_GRP_MAX
  97564. CTRL_ATTR_MCAST_GRP_NAME
  97565. CTRL_ATTR_MCAST_GRP_UNSPEC
  97566. CTRL_ATTR_OPS
  97567. CTRL_ATTR_OP_FLAGS
  97568. CTRL_ATTR_OP_ID
  97569. CTRL_ATTR_OP_MAX
  97570. CTRL_ATTR_OP_UNSPEC
  97571. CTRL_ATTR_UNSPEC
  97572. CTRL_ATTR_VERSION
  97573. CTRL_AUDIO_EN
  97574. CTRL_AUDIO_INPUT_VALUE
  97575. CTRL_AUTOLOAD
  97576. CTRL_AVI_EN
  97577. CTRL_AVMUTE
  97578. CTRL_B0_EOP
  97579. CTRL_B0_NOT_EOP
  97580. CTRL_B128
  97581. CTRL_B16
  97582. CTRL_B32
  97583. CTRL_B48
  97584. CTRL_B64
  97585. CTRL_B8
  97586. CTRL_BATTERY
  97587. CTRL_BITPOS_A
  97588. CTRL_BITPOS_DESCLIMIT
  97589. CTRL_BITPOS_FIFOINDEXMASK
  97590. CTRL_BITPOS_G
  97591. CTRL_BITPOS_L2SZ
  97592. CTRL_BITRATE_MODE_VALUE
  97593. CTRL_BITRATE_VALUE
  97594. CTRL_BLOCK
  97595. CTRL_BPW_MASK
  97596. CTRL_BPW_SHIFT
  97597. CTRL_BRIGHTNESS
  97598. CTRL_BRK_DET_INT
  97599. CTRL_BRK_INT
  97600. CTRL_BURST
  97601. CTRL_BUS
  97602. CTRL_BUS_BIT
  97603. CTRL_BUS_MODE_MASK
  97604. CTRL_BUS_WIDTH_MASK
  97605. CTRL_BW_MASK
  97606. CTRL_BW_SHIFT
  97607. CTRL_BYPASS_COUNT
  97608. CTRL_CA
  97609. CTRL_CABLE_DIAG
  97610. CTRL_CCE
  97611. CTRL_CHAN_OFFS
  97612. CTRL_CKE
  97613. CTRL_CKP
  97614. CTRL_CLKGATE
  97615. CTRL_CL_I2C_IRQ
  97616. CTRL_CL_SW_IRQ
  97617. CTRL_CMD
  97618. CTRL_CMD_COUPLE
  97619. CTRL_CMD_DECOUPLE
  97620. CTRL_CMD_DELFAMILY
  97621. CTRL_CMD_DELMCAST_GRP
  97622. CTRL_CMD_DELOPS
  97623. CTRL_CMD_ETYPE_CLR
  97624. CTRL_CMD_ETYPE_EXT
  97625. CTRL_CMD_ETYPE_M
  97626. CTRL_CMD_ETYPE_SET
  97627. CTRL_CMD_ETYPE_WCLR
  97628. CTRL_CMD_ETYPE_WSET
  97629. CTRL_CMD_GETFAMILY
  97630. CTRL_CMD_GETMCAST_GRP
  97631. CTRL_CMD_GETOPS
  97632. CTRL_CMD_MAX
  97633. CTRL_CMD_META_EVT
  97634. CTRL_CMD_NEWFAMILY
  97635. CTRL_CMD_NEWMCAST_GRP
  97636. CTRL_CMD_NEWOPS
  97637. CTRL_CMD_O
  97638. CTRL_CMD_REG
  97639. CTRL_CMD_REG_M
  97640. CTRL_CMD_REG_S
  97641. CTRL_CMD_T
  97642. CTRL_CMD_UNSPEC
  97643. CTRL_CONFIG_REG
  97644. CTRL_CONT
  97645. CTRL_CONTRAST
  97646. CTRL_CORE_BASE_ADDR
  97647. CTRL_CSPREEMPT
  97648. CTRL_CT
  97649. CTRL_CT0
  97650. CTRL_CT1
  97651. CTRL_CTS
  97652. CTRL_DATA_SELECT
  97653. CTRL_DBC_ENABLE
  97654. CTRL_DBC_RUN
  97655. CTRL_DBC_RUN_CHANGE
  97656. CTRL_DCD
  97657. CTRL_DEFAULT_INDEX
  97658. CTRL_DEV_EN
  97659. CTRL_DF16
  97660. CTRL_DF18
  97661. CTRL_DF24
  97662. CTRL_DIAG
  97663. CTRL_DIRECT_SECT_LEN
  97664. CTRL_DISABLE
  97665. CTRL_DISP_AMBIENT_LIGHT_CTRL_ON
  97666. CTRL_DISP_AUTO_BRIGHTNESS_ON
  97667. CTRL_DISP_BACKLIGHT_ON
  97668. CTRL_DISP_BRIGHTNESS_CTRL_ON
  97669. CTRL_DL
  97670. CTRL_DLERMASK
  97671. CTRL_DLETMASK
  97672. CTRL_DMA
  97673. CTRL_DMABURST
  97674. CTRL_DMADBAMODE
  97675. CTRL_DMAMODE
  97676. CTRL_DMAPOLLED
  97677. CTRL_DOTCLK_MODE
  97678. CTRL_DOWNSHIFT
  97679. CTRL_DSR
  97680. CTRL_DTR
  97681. CTRL_EAF
  97682. CTRL_EDI
  97683. CTRL_EEE_AUTO_DISABLE
  97684. CTRL_EI
  97685. CTRL_EIE
  97686. CTRL_EN
  97687. CTRL_ENABLE
  97688. CTRL_ENABLE_AHB
  97689. CTRL_ENCMBMEM
  97690. CTRL_ENHBUF
  97691. CTRL_ENOFFSEG
  97692. CTRL_EN_BIT
  97693. CTRL_EOP
  97694. CTRL_EP
  97695. CTRL_ER
  97696. CTRL_ERRMASK
  97697. CTRL_ERROR
  97698. CTRL_EXPRESSION
  97699. CTRL_EXT_LOOPBACK
  97700. CTRL_EXT_RX_RDY_INT
  97701. CTRL_EXT_TX_RDY_INT
  97702. CTRL_FDDI_CLR
  97703. CTRL_FDDI_SET
  97704. CTRL_FEMASK
  97705. CTRL_FE_RST
  97706. CTRL_FLAGS
  97707. CTRL_FORCE_HIGH
  97708. CTRL_FORCE_RECONNECT
  97709. CTRL_FRMEN
  97710. CTRL_FRM_ERR_INT
  97711. CTRL_FUNCTION
  97712. CTRL_GAME_EN
  97713. CTRL_GAME_PORT
  97714. CTRL_GEN_EN
  97715. CTRL_GET
  97716. CTRL_GET_BUS_WIDTH
  97717. CTRL_GET_WORD_LENGTH
  97718. CTRL_GOP_MODE_VALUE
  97719. CTRL_H
  97720. CTRL_HA
  97721. CTRL_HALT_EN
  97722. CTRL_HALT_IN_TR
  97723. CTRL_HALT_OUT_TR
  97724. CTRL_HANDSHAKE_MODE
  97725. CTRL_HHP
  97726. CTRL_HJ_ACK
  97727. CTRL_HJ_DISEC
  97728. CTRL_HJ_INIT
  97729. CTRL_HOLD
  97730. CTRL_HOSTINT
  97731. CTRL_HPI_CLR
  97732. CTRL_HPI_SET
  97733. CTRL_HSP
  97734. CTRL_HUE
  97735. CTRL_IDE_IRQA
  97736. CTRL_IDE_IRQB
  97737. CTRL_IDI
  97738. CTRL_IE
  97739. CTRL_IN
  97740. CTRL_INI
  97741. CTRL_INTA_EN
  97742. CTRL_INTB_EN
  97743. CTRL_INTERRUPTS_ENABLE
  97744. CTRL_INT_ENABLE
  97745. CTRL_INT_LOOPBACK
  97746. CTRL_INVERT
  97747. CTRL_INV_TO_100MS
  97748. CTRL_INV_TO_100S
  97749. CTRL_INV_TO_10MS
  97750. CTRL_INV_TO_10S
  97751. CTRL_INV_TO_1MS
  97752. CTRL_INV_TO_1S
  97753. CTRL_INV_TO_MASK
  97754. CTRL_INV_TO_NONE
  97755. CTRL_IOMEM_ID
  97756. CTRL_IRQ_ENABLE
  97757. CTRL_JUMBO_FREE
  97758. CTRL_LED
  97759. CTRL_LEGIRQ
  97760. CTRL_LINK_DROP
  97761. CTRL_LOAD_PERIOD
  97762. CTRL_LOAD_PRESCALE
  97763. CTRL_LOOPBACK
  97764. CTRL_LOW_PASS_FILTER_VALUE
  97765. CTRL_MAC_HI_REG
  97766. CTRL_MAC_LO_REG
  97767. CTRL_MAC_STOP
  97768. CTRL_MAIN_VOLUME
  97769. CTRL_MASK
  97770. CTRL_MASTER
  97771. CTRL_MCLKSEL
  97772. CTRL_MCS
  97773. CTRL_MCS_EN
  97774. CTRL_MDM
  97775. CTRL_MIDI_EN
  97776. CTRL_MIDI_PORT
  97777. CTRL_MIXED_FAST_BUS_MODE
  97778. CTRL_MIXED_SLOW_BUS_MODE
  97779. CTRL_MODE_MASK
  97780. CTRL_MODE_SHIFT
  97781. CTRL_MPEG_EN
  97782. CTRL_MRST_CLR
  97783. CTRL_MRST_SET
  97784. CTRL_MSSEN
  97785. CTRL_MSTEN
  97786. CTRL_MST_ACK
  97787. CTRL_MST_INIT
  97788. CTRL_N
  97789. CTRL_OEB
  97790. CTRL_OFFSET
  97791. CTRL_OFST
  97792. CTRL_ON
  97793. CTRL_ONE_SHOT
  97794. CTRL_OPENDRAIN
  97795. CTRL_OSCILLATOR
  97796. CTRL_OUT
  97797. CTRL_OVR_ERR_INT
  97798. CTRL_P
  97799. CTRL_P0EN
  97800. CTRL_P0F16
  97801. CTRL_P1EN
  97802. CTRL_P1F16
  97803. CTRL_PAR_ERR_INT
  97804. CTRL_PAUSE
  97805. CTRL_PAYLOAD_MAX
  97806. CTRL_PCAP_MODE_MASK
  97807. CTRL_PCAP_PR_MASK
  97808. CTRL_PCAP_RATE_EN_MASK
  97809. CTRL_PCFG_PROG_B_MASK
  97810. CTRL_PE
  97811. CTRL_PFC
  97812. CTRL_PG_BIT
  97813. CTRL_PHY_CLK_VALID
  97814. CTRL_PHY_LOGS
  97815. CTRL_PHY_SHUTDOWN
  97816. CTRL_PIN_IO
  97817. CTRL_PITCH_BENDER
  97818. CTRL_PITCH_BENDER_RANGE
  97819. CTRL_POLLED
  97820. CTRL_PORT
  97821. CTRL_PORT_ENABLE
  97822. CTRL_PORT_MASK
  97823. CTRL_PRESCALER1
  97824. CTRL_PRESCALER128
  97825. CTRL_PRESCALER16
  97826. CTRL_PRESCALER2
  97827. CTRL_PRESCALER256
  97828. CTRL_PRESCALER32
  97829. CTRL_PRESCALER4
  97830. CTRL_PRESCALER64
  97831. CTRL_PRESCALER8
  97832. CTRL_PTP_AVB
  97833. CTRL_PURE_BUS_MODE
  97834. CTRL_PUT
  97835. CTRL_QOS_NO_ACK
  97836. CTRL_QUEUE
  97837. CTRL_RAM
  97838. CTRL_RAMBYTE
  97839. CTRL_RD_EN
  97840. CTRL_READ_REQUEST
  97841. CTRL_REASSMASK
  97842. CTRL_REG
  97843. CTRL_REG0
  97844. CTRL_REG1
  97845. CTRL_REG2
  97846. CTRL_REG3
  97847. CTRL_REG4
  97848. CTRL_REGS_OFFSET
  97849. CTRL_REG_A
  97850. CTRL_REG_B
  97851. CTRL_REG_C
  97852. CTRL_REG_D
  97853. CTRL_REG_E
  97854. CTRL_REG_F
  97855. CTRL_REG_FREE
  97856. CTRL_RES0
  97857. CTRL_RES1
  97858. CTRL_RESERVED0
  97859. CTRL_RESERVED1
  97860. CTRL_RESERVED10
  97861. CTRL_RESERVED11
  97862. CTRL_RESERVED2
  97863. CTRL_RESERVED3
  97864. CTRL_RESERVED4
  97865. CTRL_RESERVED5
  97866. CTRL_RESERVED6
  97867. CTRL_RESERVED7
  97868. CTRL_RESERVED8
  97869. CTRL_RESERVED9
  97870. CTRL_RESET
  97871. CTRL_RESETS
  97872. CTRL_RI
  97873. CTRL_RST
  97874. CTRL_RST_CLR
  97875. CTRL_RST_SET
  97876. CTRL_RTS
  97877. CTRL_RUN
  97878. CTRL_RUNLATCH
  97879. CTRL_RUNNING
  97880. CTRL_RXFIFO_RST
  97881. CTRL_RX_INT_SHIFT
  97882. CTRL_RX_RDY_INT
  97883. CTRL_SAPI
  97884. CTRL_SATURATION
  97885. CTRL_SECT_LEN
  97886. CTRL_SEC_EN_MASK
  97887. CTRL_SEGMASK
  97888. CTRL_SET_BUS_WIDTH
  97889. CTRL_SET_WORD_LENGTH
  97890. CTRL_SFTRST
  97891. CTRL_SHARPNESS
  97892. CTRL_SI
  97893. CTRL_SIDL
  97894. CTRL_SIE
  97895. CTRL_SIZE
  97896. CTRL_SLEEP_PROXY
  97897. CTRL_SMP
  97898. CTRL_SND_BRK_SEQ
  97899. CTRL_SNGL
  97900. CTRL_SOFT_RST
  97901. CTRL_SPDIF
  97902. CTRL_SPD_EN
  97903. CTRL_SPORT
  97904. CTRL_SP_comma
  97905. CTRL_SP_get_param
  97906. CTRL_SP_period
  97907. CTRL_SP_rate
  97908. CTRL_SP_rate_delta
  97909. CTRL_SP_voice
  97910. CTRL_START
  97911. CTRL_START_STREAMING_VALUE
  97912. CTRL_STATISTICS
  97913. CTRL_STD_RX_RDY_INT
  97914. CTRL_STD_TX_RDY_INT
  97915. CTRL_STOP
  97916. CTRL_STOP_DONE
  97917. CTRL_STOP_EN
  97918. CTRL_STOP_IMM
  97919. CTRL_STOP_MAST
  97920. CTRL_STOP_STREAMING_VALUE
  97921. CTRL_STRIDE_OFF
  97922. CTRL_ST_SW_IRQ
  97923. CTRL_TE
  97924. CTRL_TEMPERATURE
  97925. CTRL_THERMAL_SHUTDOWN
  97926. CTRL_TIM
  97927. CTRL_TIMEOUT
  97928. CTRL_TIMEOUT_MS
  97929. CTRL_TIMER
  97930. CTRL_TOP
  97931. CTRL_TO_BIT
  97932. CTRL_TXFIFO_RST
  97933. CTRL_TX_INT_SHIFT
  97934. CTRL_TX_RDY_INT
  97935. CTRL_U2_FORCE_PLL_STB
  97936. CTRL_U2_PORT_DIS
  97937. CTRL_U2_PORT_HOST_SEL
  97938. CTRL_U2_PORT_PDN
  97939. CTRL_U3_PORT_DIS
  97940. CTRL_U3_PORT_HOST_SEL
  97941. CTRL_U3_PORT_PDN
  97942. CTRL_UL
  97943. CTRL_UNKNOWN
  97944. CTRL_URB_RUNNING
  97945. CTRL_URB_RX_SIZE
  97946. CTRL_URB_SLEEP
  97947. CTRL_URB_TX_SIZE
  97948. CTRL_UTMI_PHY_EN
  97949. CTRL_V2_ALL_TS_MASK
  97950. CTRL_V2_RX_TS_BITS
  97951. CTRL_V2_TS_BITS
  97952. CTRL_V2_TX_TS_BITS
  97953. CTRL_V3_ALL_TS_MASK
  97954. CTRL_V3_RX_TS_BITS
  97955. CTRL_V3_TS_BITS
  97956. CTRL_V3_TX_TS_BITS
  97957. CTRL_VIDEO_INPUT_VALUE
  97958. CTRL_VIDEO_STD_TYPE
  97959. CTRL_VOL_MAX
  97960. CTRL_VOL_MIN
  97961. CTRL_VOL_MUTE
  97962. CTRL_VOL_UNMUTE
  97963. CTRL_VSYNC_MODE
  97964. CTRL_WAKE_ON_LINK
  97965. CTRL_WDOG
  97966. CTRL_WINDOW_SIZE
  97967. CTRL_WOL
  97968. CTRL_WOL_TIMER
  97969. CTRL_WRITE_REQUEST
  97970. CTRL_WR_EN
  97971. CTRL_WT_BIT
  97972. CTRL_buff_free
  97973. CTRL_buff_used
  97974. CTRL_data
  97975. CTRL_flush
  97976. CTRL_free_mem
  97977. CTRL_get_lang
  97978. CTRL_int_enable
  97979. CTRL_io_priority
  97980. CTRL_last_index
  97981. CTRL_mask
  97982. CTRL_null
  97983. CTRL_pause
  97984. CTRL_resume
  97985. CTRL_resume_spc
  97986. CTRL_speech
  97987. CTRL_vol_down
  97988. CTRL_vol_set
  97989. CTRL_vol_up
  97990. CTRT
  97991. CTRY_ALBANIA
  97992. CTRY_ALGERIA
  97993. CTRY_ARGENTINA
  97994. CTRY_ARMENIA
  97995. CTRY_ARUBA
  97996. CTRY_AUSTRALIA
  97997. CTRY_AUSTRALIA2
  97998. CTRY_AUSTRIA
  97999. CTRY_AZERBAIJAN
  98000. CTRY_BAHAMAS
  98001. CTRY_BAHRAIN
  98002. CTRY_BANGLADESH
  98003. CTRY_BARBADOS
  98004. CTRY_BELARUS
  98005. CTRY_BELGIUM
  98006. CTRY_BELGIUM2
  98007. CTRY_BELIZE
  98008. CTRY_BERMUDA
  98009. CTRY_BOLIVIA
  98010. CTRY_BOSNIA_HERZ
  98011. CTRY_BRAZIL
  98012. CTRY_BRUNEI_DARUSSALAM
  98013. CTRY_BULGARIA
  98014. CTRY_CAMBODIA
  98015. CTRY_CANADA
  98016. CTRY_CANADA2
  98017. CTRY_CHILE
  98018. CTRY_CHINA
  98019. CTRY_COLOMBIA
  98020. CTRY_COSTA_RICA
  98021. CTRY_CROATIA
  98022. CTRY_CYPRUS
  98023. CTRY_CZECH
  98024. CTRY_DEBUG
  98025. CTRY_DEFAULT
  98026. CTRY_DENMARK
  98027. CTRY_DOMINICAN_REPUBLIC
  98028. CTRY_ECUADOR
  98029. CTRY_EGYPT
  98030. CTRY_EL_SALVADOR
  98031. CTRY_ESTONIA
  98032. CTRY_FAEROE_ISLANDS
  98033. CTRY_FINLAND
  98034. CTRY_FRANCE
  98035. CTRY_GEORGIA
  98036. CTRY_GERMANY
  98037. CTRY_GREECE
  98038. CTRY_GREENLAND
  98039. CTRY_GRENADA
  98040. CTRY_GUAM
  98041. CTRY_GUATEMALA
  98042. CTRY_HAITI
  98043. CTRY_HONDURAS
  98044. CTRY_HONG_KONG
  98045. CTRY_HUNGARY
  98046. CTRY_ICELAND
  98047. CTRY_INDIA
  98048. CTRY_INDONESIA
  98049. CTRY_IRAN
  98050. CTRY_IRAQ
  98051. CTRY_IRELAND
  98052. CTRY_ISRAEL
  98053. CTRY_ITALY
  98054. CTRY_JAMAICA
  98055. CTRY_JAPAN
  98056. CTRY_JAPAN1
  98057. CTRY_JAPAN10
  98058. CTRY_JAPAN11
  98059. CTRY_JAPAN12
  98060. CTRY_JAPAN13
  98061. CTRY_JAPAN14
  98062. CTRY_JAPAN15
  98063. CTRY_JAPAN16
  98064. CTRY_JAPAN17
  98065. CTRY_JAPAN18
  98066. CTRY_JAPAN19
  98067. CTRY_JAPAN2
  98068. CTRY_JAPAN20
  98069. CTRY_JAPAN21
  98070. CTRY_JAPAN22
  98071. CTRY_JAPAN23
  98072. CTRY_JAPAN24
  98073. CTRY_JAPAN25
  98074. CTRY_JAPAN26
  98075. CTRY_JAPAN27
  98076. CTRY_JAPAN28
  98077. CTRY_JAPAN29
  98078. CTRY_JAPAN3
  98079. CTRY_JAPAN30
  98080. CTRY_JAPAN31
  98081. CTRY_JAPAN32
  98082. CTRY_JAPAN33
  98083. CTRY_JAPAN34
  98084. CTRY_JAPAN35
  98085. CTRY_JAPAN36
  98086. CTRY_JAPAN37
  98087. CTRY_JAPAN38
  98088. CTRY_JAPAN39
  98089. CTRY_JAPAN4
  98090. CTRY_JAPAN40
  98091. CTRY_JAPAN41
  98092. CTRY_JAPAN42
  98093. CTRY_JAPAN43
  98094. CTRY_JAPAN44
  98095. CTRY_JAPAN45
  98096. CTRY_JAPAN46
  98097. CTRY_JAPAN47
  98098. CTRY_JAPAN48
  98099. CTRY_JAPAN49
  98100. CTRY_JAPAN5
  98101. CTRY_JAPAN50
  98102. CTRY_JAPAN51
  98103. CTRY_JAPAN52
  98104. CTRY_JAPAN53
  98105. CTRY_JAPAN54
  98106. CTRY_JAPAN55
  98107. CTRY_JAPAN56
  98108. CTRY_JAPAN57
  98109. CTRY_JAPAN58
  98110. CTRY_JAPAN59
  98111. CTRY_JAPAN6
  98112. CTRY_JAPAN7
  98113. CTRY_JAPAN8
  98114. CTRY_JAPAN9
  98115. CTRY_JORDAN
  98116. CTRY_KAZAKHSTAN
  98117. CTRY_KENYA
  98118. CTRY_KOREA_NORTH
  98119. CTRY_KOREA_ROC
  98120. CTRY_KOREA_ROC2
  98121. CTRY_KOREA_ROC3
  98122. CTRY_KUWAIT
  98123. CTRY_LATVIA
  98124. CTRY_LEBANON
  98125. CTRY_LIBYA
  98126. CTRY_LIECHTENSTEIN
  98127. CTRY_LITHUANIA
  98128. CTRY_LUXEMBOURG
  98129. CTRY_MACAU
  98130. CTRY_MACEDONIA
  98131. CTRY_MALAYSIA
  98132. CTRY_MALTA
  98133. CTRY_MAURITIUS
  98134. CTRY_MEXICO
  98135. CTRY_MONACO
  98136. CTRY_MONTENEGRO
  98137. CTRY_MOROCCO
  98138. CTRY_NEPAL
  98139. CTRY_NETHERLANDS
  98140. CTRY_NETHERLANDS_ANTILLES
  98141. CTRY_NEW_ZEALAND
  98142. CTRY_NICARAGUA
  98143. CTRY_NORWAY
  98144. CTRY_OMAN
  98145. CTRY_PAKISTAN
  98146. CTRY_PANAMA
  98147. CTRY_PAPUA_NEW_GUINEA
  98148. CTRY_PARAGUAY
  98149. CTRY_PERU
  98150. CTRY_PHILIPPINES
  98151. CTRY_POLAND
  98152. CTRY_PORTUGAL
  98153. CTRY_PUERTO_RICO
  98154. CTRY_QATAR
  98155. CTRY_ROMANIA
  98156. CTRY_RUSSIA
  98157. CTRY_SAUDI_ARABIA
  98158. CTRY_SERBIA
  98159. CTRY_SERBIA_MONTENEGRO
  98160. CTRY_SINGAPORE
  98161. CTRY_SLOVAKIA
  98162. CTRY_SLOVENIA
  98163. CTRY_SOUTH_AFRICA
  98164. CTRY_SPAIN
  98165. CTRY_SRI_LANKA
  98166. CTRY_SWEDEN
  98167. CTRY_SWITZERLAND
  98168. CTRY_SYRIA
  98169. CTRY_TAIWAN
  98170. CTRY_TANZANIA
  98171. CTRY_THAILAND
  98172. CTRY_TRINIDAD_Y_TOBAGO
  98173. CTRY_TUNISIA
  98174. CTRY_TURKEY
  98175. CTRY_UAE
  98176. CTRY_UGANDA
  98177. CTRY_UKRAINE
  98178. CTRY_UNITED_KINGDOM
  98179. CTRY_UNITED_STATES
  98180. CTRY_UNITED_STATES2
  98181. CTRY_UNITED_STATES3
  98182. CTRY_UNITED_STATES_FCC49
  98183. CTRY_URUGUAY
  98184. CTRY_UZBEKISTAN
  98185. CTRY_VENEZUELA
  98186. CTRY_VIET_NAM
  98187. CTRY_YEMEN
  98188. CTRY_ZIMBABWE
  98189. CTR_BPU_0
  98190. CTR_BPU_2
  98191. CTR_CACHE_MINLINE_MASK
  98192. CTR_CWG_MASK
  98193. CTR_CWG_SHIFT
  98194. CTR_DEC
  98195. CTR_DIC_SHIFT
  98196. CTR_DMINLINE_SHIFT
  98197. CTR_ERG_SHIFT
  98198. CTR_FLAGS_ANY_SYNC
  98199. CTR_FLAG_DAEMON_SLEEP
  98200. CTR_FLAG_DATA_OFFSET
  98201. CTR_FLAG_DELTA_DISKS
  98202. CTR_FLAG_JOURNAL_DEV
  98203. CTR_FLAG_JOURNAL_MODE
  98204. CTR_FLAG_MAX_RECOVERY_RATE
  98205. CTR_FLAG_MAX_WRITE_BEHIND
  98206. CTR_FLAG_MIN_RECOVERY_RATE
  98207. CTR_FLAG_NOSYNC
  98208. CTR_FLAG_OPTIONS_NO_ARGS
  98209. CTR_FLAG_OPTIONS_ONE_ARG
  98210. CTR_FLAG_RAID10_COPIES
  98211. CTR_FLAG_RAID10_FORMAT
  98212. CTR_FLAG_RAID10_USE_NEAR_SETS
  98213. CTR_FLAG_REBUILD
  98214. CTR_FLAG_REGION_SIZE
  98215. CTR_FLAG_STRIPE_CACHE
  98216. CTR_FLAG_SYNC
  98217. CTR_FLAG_WRITE_MOSTLY
  98218. CTR_FLAME_0
  98219. CTR_FLAME_2
  98220. CTR_IDC_SHIFT
  98221. CTR_IMINLINE_MASK
  98222. CTR_IMINLINE_SHIFT
  98223. CTR_IQ_4
  98224. CTR_IQ_5
  98225. CTR_L1IP
  98226. CTR_L1IP_MASK
  98227. CTR_L1IP_SHIFT
  98228. CTR_MS_0
  98229. CTR_MS_2
  98230. CTR_REDG_SHIFT
  98231. CTR_RFC3686_BLOCK_SIZE
  98232. CTR_RFC3686_IV_SIZE
  98233. CTR_RFC3686_NONCE_SIZE
  98234. CTR_RSCKIZ_MASK
  98235. CTR_RSCKIZ_POL_SHIFT
  98236. CTR_RSCKIZ_SCK
  98237. CTR_RXE
  98238. CTR_RXRST
  98239. CTR_SAVE
  98240. CTR_TEDG_SHIFT
  98241. CTR_TFSE
  98242. CTR_TSCKE
  98243. CTR_TSCKIZ_MASK
  98244. CTR_TSCKIZ_POL_SHIFT
  98245. CTR_TSCKIZ_SCK
  98246. CTR_TXDIZ_HIGH
  98247. CTR_TXDIZ_HIZ
  98248. CTR_TXDIZ_LOW
  98249. CTR_TXDIZ_MASK
  98250. CTR_TXE
  98251. CTR_TXRST
  98252. CTR_WRAP_TIME
  98253. CTS
  98254. CTS0_A_MARK
  98255. CTS0_B_MARK
  98256. CTS0_C_MARK
  98257. CTS0_D_MARK
  98258. CTS0_MARK
  98259. CTS0_N_MARK
  98260. CTS1_A_MARK
  98261. CTS1_B_MARK
  98262. CTS1_C_MARK
  98263. CTS1_E_MARK
  98264. CTS1_MARK
  98265. CTS1_N_MARK
  98266. CTS2SELF_THVAL
  98267. CTS2_MARK
  98268. CTS3_MARK
  98269. CTS4_MARK
  98270. CTS5_MARK
  98271. CTS7_MARK
  98272. CTSB055X
  98273. CTSB073X
  98274. CTSB0760
  98275. CTSB0880
  98276. CTSB1270
  98277. CTSDUR_BA
  98278. CTSDUR_BA_F0
  98279. CTSDUR_BA_F1
  98280. CTSFC_EN
  98281. CTSIE
  98282. CTSPROTECT_DISABLE
  98283. CTSPROTECT_ENABLE
  98284. CTSQ
  98285. CTSQ_MASK
  98286. CTSRC_H
  98287. CTSR_AOUT
  98288. CTSR_PONM
  98289. CTSR_THBGR
  98290. CTSR_THSST
  98291. CTSR_VMEN
  98292. CTSR_VMST
  98293. CTSTL
  98294. CTSXON
  98295. CTS_2_SELF
  98296. CTS_ACT
  98297. CTS_ACTION_CONTROL_SET_STATE
  98298. CTS_ACTION_CONTROL_STATE_OFF
  98299. CTS_ACTION_CONTROL_TRIGGER
  98300. CTS_AT_AUART
  98301. CTS_AVC
  98302. CTS_CTL_SEQUENCER_ENABLE
  98303. CTS_CTRL_SOFT
  98304. CTS_DELTA
  98305. CTS_ENCI_EN
  98306. CTS_ENCI_SEL_MASK
  98307. CTS_ENCI_SEL_SHIFT
  98308. CTS_ENCP_EN
  98309. CTS_ENCP_SEL_MASK
  98310. CTS_ENCP_SEL_SHIFT
  98311. CTS_EVENT_ENABLE_IF_ANYTHING
  98312. CTS_FlowCtl
  98313. CTS_HDMI_SYS_DIV_MASK
  98314. CTS_HDMI_SYS_EN
  98315. CTS_HDMI_SYS_SEL_MASK
  98316. CTS_IP
  98317. CTS_MODE_FALSE
  98318. CTS_MODE_TRUE
  98319. CTS_N_K
  98320. CTS_N_M
  98321. CTS_ON
  98322. CTS_SOURCE_EXTERNAL
  98323. CTS_SOURCE_INTERNAL
  98324. CTS_STATE_IDLE
  98325. CTS_TO_SELF
  98326. CTS_TO_SELF_TH_VAL
  98327. CTS_TRIG_WAITLOOP_DEPTH
  98328. CTS_VDAC_EN
  98329. CTS_VDAC_SEL_MASK
  98330. CTS_VDAC_SEL_SHIFT
  98331. CTS_state
  98332. CTTUPLE
  98333. CTUAA
  98334. CTU_ADINR
  98335. CTU_CPMDR
  98336. CTU_CTUIR
  98337. CTU_NAME
  98338. CTU_NAME_SIZE
  98339. CTU_SCMDR
  98340. CTU_SV00R
  98341. CTU_SV01R
  98342. CTU_SV02R
  98343. CTU_SV03R
  98344. CTU_SV04R
  98345. CTU_SV05R
  98346. CTU_SV06R
  98347. CTU_SV07R
  98348. CTU_SV10R
  98349. CTU_SV11R
  98350. CTU_SV12R
  98351. CTU_SV13R
  98352. CTU_SV14R
  98353. CTU_SV15R
  98354. CTU_SV16R
  98355. CTU_SV17R
  98356. CTU_SV20R
  98357. CTU_SV21R
  98358. CTU_SV22R
  98359. CTU_SV23R
  98360. CTU_SV24R
  98361. CTU_SV25R
  98362. CTU_SV26R
  98363. CTU_SV27R
  98364. CTU_SV30R
  98365. CTU_SV31R
  98366. CTU_SV32R
  98367. CTU_SV33R
  98368. CTU_SV34R
  98369. CTU_SV35R
  98370. CTU_SV36R
  98371. CTU_SV37R
  98372. CTU_SVxxR
  98373. CTU_SWRSR
  98374. CTVMEM_H
  98375. CTV_
  98376. CTV_ENC_MODE
  98377. CTV_TEMP_ERROR
  98378. CTV_TEMP_MASK
  98379. CTX
  98380. CTX0_CTX1_CTX2_MARK
  98381. CTX0_CTX1_CTX2_PJ21_MARK
  98382. CTX0_CTX1_MARK
  98383. CTX0_CTX1_PJ23_MARK
  98384. CTX0_MARK
  98385. CTX1_MARK
  98386. CTX1_PJ23_MARK
  98387. CTX2_MARK
  98388. CTX2_PJ21_MARK
  98389. CTXACCESS
  98390. CTXDESC_CD_0_A
  98391. CTXDESC_CD_0_AA64
  98392. CTXDESC_CD_0_ASET
  98393. CTXDESC_CD_0_ASID
  98394. CTXDESC_CD_0_ENDI
  98395. CTXDESC_CD_0_R
  98396. CTXDESC_CD_0_S
  98397. CTXDESC_CD_0_TCR_EPD0
  98398. CTXDESC_CD_0_TCR_EPD1
  98399. CTXDESC_CD_0_TCR_IPS
  98400. CTXDESC_CD_0_TCR_IRGN0
  98401. CTXDESC_CD_0_TCR_ORGN0
  98402. CTXDESC_CD_0_TCR_SH0
  98403. CTXDESC_CD_0_TCR_T0SZ
  98404. CTXDESC_CD_0_TCR_TBI0
  98405. CTXDESC_CD_0_TCR_TG0
  98406. CTXDESC_CD_0_V
  98407. CTXDESC_CD_1_TTB0_MASK
  98408. CTXDESC_CD_DWORDS
  98409. CTXDOMAIN
  98410. CTXEMPTY_INT_ENABLE
  98411. CTXMEMBLKRST
  98412. CTXMEMSIZE
  98413. CTXSW_BACKBIAS_VALUE
  98414. CTXSW_FREQ_DISPLAY_WATERMARK
  98415. CTXSW_FREQ_GEN2PCIE_VOLT
  98416. CTXSW_FREQ_MCLK_CFG_INDEX
  98417. CTXSW_FREQ_MCLK_CFG_INDEX_MASK
  98418. CTXSW_FREQ_MCLK_CFG_INDEX_SHIFT
  98419. CTXSW_FREQ_SCLK_CFG_INDEX
  98420. CTXSW_FREQ_SCLK_CFG_INDEX_MASK
  98421. CTXSW_FREQ_SCLK_CFG_INDEX_SHIFT
  98422. CTXSW_FREQ_STATE_ENABLE
  98423. CTXSW_FREQ_STATE_SPLL_RESET_EN
  98424. CTXSW_FREQ_VIDS_CFG_INDEX
  98425. CTXSW_FREQ_VIDS_CFG_INDEX_MASK
  98426. CTXSW_FREQ_VIDS_CFG_INDEX_SHIFT
  98427. CTXSW_INT
  98428. CTXSW_PROFILE_INDEX
  98429. CTXSW_UPPER_GPIO_VALUES
  98430. CTXSW_UPPER_GPIO_VALUES_MASK
  98431. CTXSW_VID_LOWER_GPIO_CNTL
  98432. CTXTQID_M
  98433. CTXTQID_S
  98434. CTXTQID_V
  98435. CTXTTYPE_M
  98436. CTXTTYPE_S
  98437. CTXTTYPE_V
  98438. CTXT_CNM
  98439. CTXT_EGRESS
  98440. CTXT_FLM
  98441. CTXT_INGRESS
  98442. CTXT_RSVD
  98443. CTX_ARB_CNTL
  98444. CTX_BB_HEAD_L
  98445. CTX_BB_HEAD_U
  98446. CTX_BB_PER_CTX_PTR
  98447. CTX_BB_STATE
  98448. CTX_BIT_HOST
  98449. CTX_BIT_HV
  98450. CTX_BIT_IDLE
  98451. CTX_BIT_KERNEL
  98452. CTX_BIT_MAX
  98453. CTX_BIT_USER
  98454. CTX_BMAP_SLOTS
  98455. CTX_CHEETAH_PLUS_CTX0
  98456. CTX_CHEETAH_PLUS_NUC
  98457. CTX_CONTEXT_CONTROL
  98458. CTX_CONTEXT_CONTROL_VAL
  98459. CTX_CS
  98460. CTX_CTRL_CLONE
  98461. CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT
  98462. CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT
  98463. CTX_CTRL_ERR
  98464. CTX_CTRL_ERR_FALLBACK
  98465. CTX_CTRL_FILE
  98466. CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
  98467. CTX_CTRL_NOPID
  98468. CTX_CTRL_RS_CTX_ENABLE
  98469. CTX_CTX_TIMESTAMP
  98470. CTX_DESC_FORCE_RESTORE
  98471. CTX_ECC_CORRECTION
  98472. CTX_ENABLES
  98473. CTX_END
  98474. CTX_FE
  98475. CTX_FIRST_VERSION
  98476. CTX_FL_CID_ERROR
  98477. CTX_FL_DELETE_WAIT
  98478. CTX_FL_OFFLD_START
  98479. CTX_FRAME_NUMBER
  98480. CTX_FS
  98481. CTX_HAS_SMPL
  98482. CTX_HWBITS
  98483. CTX_HW_MASK
  98484. CTX_IS_USED_PMD
  98485. CTX_LE
  98486. CTX_LINE_NUMBER
  98487. CTX_LRI_HEADER_0
  98488. CTX_LRI_HEADER_1
  98489. CTX_LRI_HEADER_2
  98490. CTX_LS
  98491. CTX_MAP_SIZE
  98492. CTX_MASK
  98493. CTX_MB_BUFFER_MAX_SIZE
  98494. CTX_NRBITS
  98495. CTX_NR_BITS
  98496. CTX_NR_MASK
  98497. CTX_OFFSET
  98498. CTX_OVFL_NOBLOCK
  98499. CTX_PDP0_LDW
  98500. CTX_PDP0_UDW
  98501. CTX_PDP1_LDW
  98502. CTX_PDP1_UDW
  98503. CTX_PDP2_LDW
  98504. CTX_PDP2_UDW
  98505. CTX_PDP3_LDW
  98506. CTX_PDP3_UDW
  98507. CTX_PGSZ0_NUC_SHIFT
  98508. CTX_PGSZ0_SHIFT
  98509. CTX_PGSZ1_NUC_SHIFT
  98510. CTX_PGSZ1_SHIFT
  98511. CTX_PGSZ_4MB
  98512. CTX_PGSZ_512KB
  98513. CTX_PGSZ_64KB
  98514. CTX_PGSZ_8KB
  98515. CTX_PGSZ_BASE
  98516. CTX_PGSZ_BITS
  98517. CTX_PGSZ_HUGE
  98518. CTX_PGSZ_KERN
  98519. CTX_PGSZ_MASK
  98520. CTX_PID
  98521. CTX_RCS_INDIRECT_CTX
  98522. CTX_RCS_INDIRECT_CTX_OFFSET
  98523. CTX_REG
  98524. CTX_RING_BUFFER_CONTROL
  98525. CTX_RING_BUFFER_START
  98526. CTX_RING_HEAD
  98527. CTX_RING_TAIL
  98528. CTX_RQ_SEQ_OPS
  98529. CTX_R_PWR_CLK_STATE
  98530. CTX_SECOND_BB_HEAD_L
  98531. CTX_SECOND_BB_HEAD_U
  98532. CTX_SECOND_BB_STATE
  98533. CTX_SHIFT
  98534. CTX_SIG_EVENTS_ACTIVE
  98535. CTX_SIG_EVENTS_INDIRECT
  98536. CTX_SIZE
  98537. CTX_STS_INDIRECT
  98538. CTX_SWITCH_CODE
  98539. CTX_TGID_CODE
  98540. CTX_TLBIALL
  98541. CTX_TO_EP_INTERVAL
  98542. CTX_TO_EP_MAXPSTREAMS
  98543. CTX_TO_EP_MULT
  98544. CTX_TO_EP_TYPE
  98545. CTX_TO_MAX_BURST
  98546. CTX_TO_MAX_ESIT_PAYLOAD
  98547. CTX_TO_MAX_ESIT_PAYLOAD_HI
  98548. CTX_TO_VSID
  98549. CTX_TYPE_MMREG
  98550. CTX_TYPE_MSR
  98551. CTX_USED_DBR
  98552. CTX_USED_IBR
  98553. CTX_USED_MONITOR
  98554. CTX_USED_PMD
  98555. CTX_USES_DBREGS
  98556. CTX_VALID
  98557. CTX_VERSION
  98558. CTX_VERSION_MASK
  98559. CTX_VERSION_SHIFT
  98560. CTX_WAKEUP_EVENTS_INDIRECT
  98561. CTX_WA_BB_OBJ_SIZE
  98562. CTYPE_DATA
  98563. CTYPE_INST
  98564. CTYPE_INSTRUCTION
  98565. CTYPE_NULL
  98566. CTYPE_SEPARATE
  98567. CTYPE_UNIFIED
  98568. CTZ
  98569. CT_040
  98570. CT_ACCEPT_RESPONSE
  98571. CT_ADDRS_PER_PAGE
  98572. CT_AGC_START
  98573. CT_AGC_STEP_0
  98574. CT_AGC_STEP_1
  98575. CT_AGC_STEP_2
  98576. CT_AGC_STEP_3
  98577. CT_AGC_STEP_4
  98578. CT_AGC_STOP
  98579. CT_AMIXER_CTL
  98580. CT_CA42V2
  98581. CT_CARD_DISABLED
  98582. CT_CARD_PM_OPS
  98583. CT_CHIP_ID
  98584. CT_CID_TO_32BITS_UID
  98585. CT_COMMIT_CONFIG
  98586. CT_COMPOSITE
  98587. CT_CYPHIDCOM
  98588. CT_DCCP_CLOSEREQ
  98589. CT_DCCP_CLOSING
  98590. CT_DCCP_IGNORE
  98591. CT_DCCP_INVALID
  98592. CT_DCCP_MAX
  98593. CT_DCCP_NONE
  98594. CT_DCCP_OPEN
  98595. CT_DCCP_PARTOPEN
  98596. CT_DCCP_REQUEST
  98597. CT_DCCP_RESPOND
  98598. CT_DCCP_ROLE_CLIENT
  98599. CT_DCCP_ROLE_MAX
  98600. CT_DCCP_ROLE_SERVER
  98601. CT_DCCP_TIMEWAIT
  98602. CT_DEBUG_DRIVER
  98603. CT_DEMOD_SEARCH_NEXT
  98604. CT_DEMOD_START
  98605. CT_DEMOD_STEP_1
  98606. CT_DEMOD_STEP_10
  98607. CT_DEMOD_STEP_11
  98608. CT_DEMOD_STEP_2
  98609. CT_DEMOD_STEP_3
  98610. CT_DEMOD_STEP_4
  98611. CT_DEMOD_STEP_5
  98612. CT_DEMOD_STEP_6
  98613. CT_DEMOD_STEP_7
  98614. CT_DEMOD_STEP_8
  98615. CT_DEMOD_STEP_9
  98616. CT_DEMOD_STEP_LOCKED
  98617. CT_DEMOD_STOP
  98618. CT_DID_MASK
  98619. CT_DONE
  98620. CT_EARTHMATE
  98621. CT_EMAC
  98622. CT_EXPL_ALREADY_REGISTERED
  98623. CT_EXPL_HBA_ATTR_NOT_REGISTERED
  98624. CT_EXPL_HBA_NOT_REGISTERED
  98625. CT_EXPL_INVALID_HBA_BLOCK_LENGTH
  98626. CT_EXPL_INVALID_PORT_BLOCK_LENGTH
  98627. CT_EXPL_MISSING_HBA_ID_PORT_LIST
  98628. CT_EXPL_MISSING_REQ_HBA_ATTR
  98629. CT_EXPL_MULTIPLE_HBA_ATTR
  98630. CT_EXPL_MULTIPLE_PORT_ATTR
  98631. CT_EXPL_PORT_ATTR_NOT_REGISTERED
  98632. CT_EXPL_PORT_NOT_REGISTERED
  98633. CT_EXPL_PORT_NOT_REGISTERED_
  98634. CT_EXP_AUTH_EXCEPTION
  98635. CT_EXP_DB_EMPTY
  98636. CT_EXP_DB_FULL
  98637. CT_EXP_DEVICES_NOT_IN_CMN_ZONE
  98638. CT_EXP_PROCESSING_REQ
  98639. CT_EXP_UNABLE_TO_VERIFY_CONN
  98640. CT_FLUSH_CACHE
  98641. CT_FUNC_HID_IDX
  98642. CT_GENERIC
  98643. CT_GET_CONFIG_STATUS
  98644. CT_GET_CONTAINER_COUNT
  98645. CT_GMAL_RESP_PREFIX_HTTP
  98646. CT_GMAL_RESP_PREFIX_TELNET
  98647. CT_GS3_REVISION
  98648. CT_GSM
  98649. CT_GSSUBTYPE_CFGSERVER
  98650. CT_GSSUBTYPE_HBA_MGMTSERVER
  98651. CT_GSSUBTYPE_LOCKSERVER
  98652. CT_GSSUBTYPE_NAMESERVER
  98653. CT_GSSUBTYPE_UNZONED_NS
  98654. CT_GSSUBTYPE_ZONESERVER
  98655. CT_GSTYPE_ALIASSERVICE
  98656. CT_GSTYPE_DIRSERVICE
  98657. CT_GSTYPE_KEYSERVICE
  98658. CT_GSTYPE_MGMTSERVICE
  98659. CT_GSTYPE_TIMESERVICE
  98660. CT_Highlight
  98661. CT_IBOOK
  98662. CT_IMAC_G5_ISIGHT
  98663. CT_IOCB_TYPE
  98664. CT_KILL_CARD_DISABLED
  98665. CT_KILL_EXIT_DURATION
  98666. CT_KILL_EXIT_THRESHOLD
  98667. CT_KILL_NOTIFICATION
  98668. CT_KILL_THRESHOLD
  98669. CT_KILL_THRESHOLD_LEGACY
  98670. CT_KILL_WAITING_DURATION
  98671. CT_LE_L
  98672. CT_LE_W
  98673. CT_LIMIT_HASH_BUCKETS
  98674. CT_LINEAR
  98675. CT_LOCKARRAY_BITS
  98676. CT_LOCKARRAY_MASK
  98677. CT_LOCKARRAY_SIZE
  98678. CT_MAC_G4_SILVER
  98679. CT_MAC_G5_9600
  98680. CT_MAC_X800
  98681. CT_MINI_EXTERNAL
  98682. CT_MINI_INTERNAL
  98683. CT_MPEG_L1
  98684. CT_MPEG_L2
  98685. CT_MPEG_L3
  98686. CT_MPEG_L3_LSF
  98687. CT_Max
  98688. CT_NONE
  98689. CT_NOT_DEFINED
  98690. CT_NS_EXP_ACCESSDENIED
  98691. CT_NS_EXP_CS_NOT_REG
  98692. CT_NS_EXP_DATABASEEMPTY
  98693. CT_NS_EXP_DOM_ID_NOT_PRESENT
  98694. CT_NS_EXP_FD_NOT_REG
  98695. CT_NS_EXP_FF_NOT_REG
  98696. CT_NS_EXP_FPN_NOT_REG
  98697. CT_NS_EXP_FT_NOT_REG
  98698. CT_NS_EXP_HA_NOT_REG
  98699. CT_NS_EXP_ID_NOT_REG
  98700. CT_NS_EXP_IPA_NOT_REG
  98701. CT_NS_EXP_IPN_NOT_REG
  98702. CT_NS_EXP_IPP_NOT_REG
  98703. CT_NS_EXP_NN_NOT_REG
  98704. CT_NS_EXP_NOADDITIONAL
  98705. CT_NS_EXP_NOT_REG_IN_SCOPE
  98706. CT_NS_EXP_NO_DEVICE_ATTACHED
  98707. CT_NS_EXP_PN_NOT_REG
  98708. CT_NS_EXP_PORT_NUM_NOT_PRESENT
  98709. CT_NS_EXP_PT_NOT_REG
  98710. CT_NS_EXP_SNN_NOT_REG
  98711. CT_NS_EXP_SPN_NOT_REG
  98712. CT_NS_EXP_UNACCEPTABLE_ID
  98713. CT_OFFSET_CCK_TX_PWR_IDX
  98714. CT_OFFSET_CHANNEL_PLAH
  98715. CT_OFFSET_CUSTOMER_ID
  98716. CT_OFFSET_HT20_MAX_PWR_OFFSET
  98717. CT_OFFSET_HT20_TX_PWR_IDX_DIFF
  98718. CT_OFFSET_HT401S_TX_PWR_IDX
  98719. CT_OFFSET_HT402S_TX_PWR_IDX_DIF
  98720. CT_OFFSET_HT402S_TX_PWR_IDX_DIFF
  98721. CT_OFFSET_HT40_MAX_PWR_OFFSET
  98722. CT_OFFSET_MAC_ADDR
  98723. CT_OFFSET_OFDM_TX_PWR_IDX_DIFF
  98724. CT_OFFSET_RF_OPTION
  98725. CT_OFFSET_THERMAL_METER
  98726. CT_OFFSET_VERSION
  98727. CT_OK
  98728. CT_Off
  98729. CT_On
  98730. CT_PAGE_ALIGN
  98731. CT_PAGE_MASK
  98732. CT_PAGE_SHIFT
  98733. CT_PAGE_SIZE
  98734. CT_PAUSE_IO
  98735. CT_PM_START_UNIT
  98736. CT_PM_STOP_UNIT
  98737. CT_PM_UNIT_IMMEDIATE
  98738. CT_POWERBOOK_EXTERNAL
  98739. CT_POWERBOOK_INTERNAL
  98740. CT_POWERBOOK_VGA
  98741. CT_POWER_MANAGEMENT
  98742. CT_PTES_PER_PAGE
  98743. CT_PTP_NUM
  98744. CT_READ_NAME
  98745. CT_REASON_CANNOT_PERFORM
  98746. CT_REASON_COMMAND_UNSUPPORTED
  98747. CT_REASON_INVALID_COMMAND_CODE
  98748. CT_REJECT_RESPONSE
  98749. CT_RELEASE_IO
  98750. CT_RGB
  98751. CT_RN50_POWER
  98752. CT_RSN_INV_CMD
  98753. CT_RSN_INV_SIZE
  98754. CT_RSN_INV_VER
  98755. CT_RSN_LOGICAL_BUSY
  98756. CT_RSN_LOGIC_ERR
  98757. CT_RSN_NOT_SUPP
  98758. CT_RSN_PROTO_ERR
  98759. CT_RSN_SERVER_NOT_AVBL
  98760. CT_RSN_SESSION_COULD_NOT_BE_ESTBD
  98761. CT_RSN_UNABLE_TO_PERF
  98762. CT_RSN_VENDOR_SPECIFIC
  98763. CT_RSP_ACCEPT
  98764. CT_RSP_REJECT
  98765. CT_SAM440EP
  98766. CT_SHUTDOWN
  98767. CT_SUM_CTL
  98768. CT_SUPPORTED_MASK
  98769. CT_TIMER_FREQ
  98770. CT_TUNER_START
  98771. CT_TUNER_STEP_0
  98772. CT_TUNER_STEP_1
  98773. CT_TUNER_STEP_2
  98774. CT_TUNER_STEP_3
  98775. CT_TUNER_STEP_4
  98776. CT_TUNER_STEP_5
  98777. CT_TUNER_STEP_6
  98778. CT_TUNER_STEP_7
  98779. CT_TUNER_STOP
  98780. CT_VGA
  98781. CT_WARN_ON
  98782. CT_Window
  98783. CT_ZER
  98784. CU0_PSM_CONFIG__Psm1_MASK
  98785. CU0_PSM_CONFIG__Psm1__SHIFT
  98786. CU0_PSM_CONFIG__Psm2_MASK
  98787. CU0_PSM_CONFIG__Psm2__SHIFT
  98788. CU0_PSM_CONFIG__Psm3_MASK
  98789. CU0_PSM_CONFIG__Psm3__SHIFT
  98790. CU0_PSM_CONFIG__Psm4_MASK
  98791. CU0_PSM_CONFIG__Psm4__SHIFT
  98792. CU1216_IF
  98793. CU16
  98794. CU1_PSM_CONFIG__Psm1_MASK
  98795. CU1_PSM_CONFIG__Psm1__SHIFT
  98796. CU1_PSM_CONFIG__Psm2_MASK
  98797. CU1_PSM_CONFIG__Psm2__SHIFT
  98798. CU1_PSM_CONFIG__Psm3_MASK
  98799. CU1_PSM_CONFIG__Psm3__SHIFT
  98800. CU1_PSM_CONFIG__Psm4_MASK
  98801. CU1_PSM_CONFIG__Psm4__SHIFT
  98802. CU2_EXCEPTION
  98803. CU2_LDC2_OP
  98804. CU2_LWC2_OP
  98805. CU2_SDC2_OP
  98806. CU2_SWC2_OP
  98807. CU32
  98808. CU8
  98809. CUA_ROCKET_MAJOR
  98810. CUBOOT_INIT
  98811. CUC_ABORT
  98812. CUC_MASK
  98813. CUC_NOP
  98814. CUC_RESUME
  98815. CUC_START
  98816. CUC_SUSPEND
  98817. CUDA_AUTOPOLL
  98818. CUDA_GET_6805_ADDR
  98819. CUDA_GET_AUTO_RATE
  98820. CUDA_GET_DEVICE_LIST
  98821. CUDA_GET_PRAM
  98822. CUDA_GET_SET_IIC
  98823. CUDA_GET_TIME
  98824. CUDA_INTF
  98825. CUDA_MS_RESET
  98826. CUDA_PACKET
  98827. CUDA_POWERDOWN
  98828. CUDA_POWERUP_TIME
  98829. CUDA_RESET_SYSTEM
  98830. CUDA_SEND_DFAC
  98831. CUDA_SET_6805_ADDR
  98832. CUDA_SET_AUTO_RATE
  98833. CUDA_SET_DEVICE_LIST
  98834. CUDA_SET_IPL
  98835. CUDA_SET_PRAM
  98836. CUDA_SET_TIME
  98837. CUDA_WARM_START
  98838. CUDBG_CCTRL
  98839. CUDBG_CHAC_PBT_ADDR
  98840. CUDBG_CHAC_PBT_DATA
  98841. CUDBG_CHAC_PBT_LRF
  98842. CUDBG_CHUNK_SIZE
  98843. CUDBG_CIM_IBQ_NCSI
  98844. CUDBG_CIM_IBQ_SGE0
  98845. CUDBG_CIM_IBQ_SGE1
  98846. CUDBG_CIM_IBQ_TP0
  98847. CUDBG_CIM_IBQ_TP1
  98848. CUDBG_CIM_IBQ_ULP
  98849. CUDBG_CIM_LA
  98850. CUDBG_CIM_MA_LA
  98851. CUDBG_CIM_OBQ_NCSI
  98852. CUDBG_CIM_OBQ_RXQ0
  98853. CUDBG_CIM_OBQ_RXQ1
  98854. CUDBG_CIM_OBQ_SGE
  98855. CUDBG_CIM_OBQ_ULP0
  98856. CUDBG_CIM_OBQ_ULP1
  98857. CUDBG_CIM_OBQ_ULP2
  98858. CUDBG_CIM_OBQ_ULP3
  98859. CUDBG_CIM_PIF_LA
  98860. CUDBG_CIM_QCFG
  98861. CUDBG_CLK
  98862. CUDBG_COMPRESSION_NONE
  98863. CUDBG_COMPRESSION_ZLIB
  98864. CUDBG_COMPRESS_BUFF_SIZE
  98865. CUDBG_DEV_LOG
  98866. CUDBG_DUMP_BUFF_SIZE
  98867. CUDBG_DUMP_CONTEXT
  98868. CUDBG_DUMP_TYPE_MINI
  98869. CUDBG_EDC0
  98870. CUDBG_EDC1
  98871. CUDBG_ENTITY_SIGNATURE
  98872. CUDBG_HMA
  98873. CUDBG_HMA_INDIRECT
  98874. CUDBG_HW_SCHED
  98875. CUDBG_LE_TCAM
  98876. CUDBG_LOWMEM_MAX_CTXT_QIDS
  98877. CUDBG_LRF_ENTRIES
  98878. CUDBG_MAJOR_VERSION
  98879. CUDBG_MAX_ENTITY
  98880. CUDBG_MAX_FL_QIDS
  98881. CUDBG_MAX_RPLC_SIZE
  98882. CUDBG_MAX_TCAM_TID
  98883. CUDBG_MAX_TID_COMP_DIS
  98884. CUDBG_MAX_TID_COMP_EN
  98885. CUDBG_MA_INDIRECT
  98886. CUDBG_MBOX_LOG
  98887. CUDBG_MC0
  98888. CUDBG_MC1
  98889. CUDBG_MEMINFO
  98890. CUDBG_MEMINFO_REV
  98891. CUDBG_MINOR_VERSION
  98892. CUDBG_MPS_TCAM
  98893. CUDBG_NUM_PCIE_CONFIG_REGS
  98894. CUDBG_NUM_ULPTX
  98895. CUDBG_NUM_ULPTX_ASIC
  98896. CUDBG_NUM_ULPTX_ASIC_READ
  98897. CUDBG_NUM_ULPTX_READ
  98898. CUDBG_PATH_MTU
  98899. CUDBG_PBT_DATA_ENTRIES
  98900. CUDBG_PBT_DYNAMIC_ENTRIES
  98901. CUDBG_PBT_STATIC_ENTRIES
  98902. CUDBG_PBT_TABLE
  98903. CUDBG_PCIE_CONFIG
  98904. CUDBG_PCIE_INDIRECT
  98905. CUDBG_PM_INDIRECT
  98906. CUDBG_PM_STATS
  98907. CUDBG_QDESC
  98908. CUDBG_QDESC_REV
  98909. CUDBG_QTYPE_CRYPTO_FLQ
  98910. CUDBG_QTYPE_CRYPTO_RXQ
  98911. CUDBG_QTYPE_CRYPTO_TXQ
  98912. CUDBG_QTYPE_CTRLQ
  98913. CUDBG_QTYPE_FWEVTQ
  98914. CUDBG_QTYPE_INTRQ
  98915. CUDBG_QTYPE_ISCSIT_FLQ
  98916. CUDBG_QTYPE_ISCSIT_RXQ
  98917. CUDBG_QTYPE_ISCSI_FLQ
  98918. CUDBG_QTYPE_ISCSI_RXQ
  98919. CUDBG_QTYPE_MAX
  98920. CUDBG_QTYPE_NIC_FLQ
  98921. CUDBG_QTYPE_NIC_RXQ
  98922. CUDBG_QTYPE_NIC_TXQ
  98923. CUDBG_QTYPE_OFLD_TXQ
  98924. CUDBG_QTYPE_PTP_TXQ
  98925. CUDBG_QTYPE_RDMA_CIQ
  98926. CUDBG_QTYPE_RDMA_FLQ
  98927. CUDBG_QTYPE_RDMA_RXQ
  98928. CUDBG_QTYPE_TLS_FLQ
  98929. CUDBG_QTYPE_TLS_RXQ
  98930. CUDBG_QTYPE_UNKNOWN
  98931. CUDBG_REG_DUMP
  98932. CUDBG_RSS
  98933. CUDBG_RSS_VF_CONF
  98934. CUDBG_SCFG_VER_ADDR
  98935. CUDBG_SCFG_VER_LEN
  98936. CUDBG_SGE_INDIRECT
  98937. CUDBG_SIGNATURE
  98938. CUDBG_STATUS_CCLK_NOT_DEFINED
  98939. CUDBG_STATUS_ENTITY_NOT_FOUND
  98940. CUDBG_STATUS_NOT_IMPLEMENTED
  98941. CUDBG_STATUS_NO_MEM
  98942. CUDBG_STATUS_PARTIAL_DATA
  98943. CUDBG_SYSTEM_ERROR
  98944. CUDBG_T6_CLIP
  98945. CUDBG_TID_INFO
  98946. CUDBG_TID_INFO_REV
  98947. CUDBG_TP_INDIRECT
  98948. CUDBG_TP_LA
  98949. CUDBG_ULPRX_LA
  98950. CUDBG_ULPTX_LA
  98951. CUDBG_ULPTX_LA_REV
  98952. CUDBG_UP_CIM_INDIRECT
  98953. CUDBG_VPD_DATA
  98954. CUDBG_VPD_PF_SIZE
  98955. CUDBG_VPD_VER_ADDR
  98956. CUDBG_VPD_VER_LEN
  98957. CUDBG_YIELD_ITERATION
  98958. CUDBG_ZLIB_COMPRESS_ID
  98959. CUDBG_ZLIB_MEM_LVL
  98960. CUDBG_ZLIB_WIN_BITS
  98961. CUD_ITEM
  98962. CUI
  98963. CUIR_QUIESCE
  98964. CUIR_RESUME
  98965. CUI_ITEM
  98966. CUJO_20_STEP
  98967. CUJO_FIREHAWK_ADDR
  98968. CUJO_FIREHAWK_BADPAGE
  98969. CUJO_RAVEN_ADDR
  98970. CUJO_RAVEN_BADPAGE
  98971. CUL0
  98972. CUL1
  98973. CULH
  98974. CULH_DEFAULT
  98975. CULL_PAT_EVEN_LINE_SHIFT
  98976. CULV
  98977. CULV_DEFAULT
  98978. CUMANASCSI2_ALATCH
  98979. CUMANASCSI2_FAS216_OFFSET
  98980. CUMANASCSI2_FAS216_SHIFT
  98981. CUMANASCSI2_PSEUDODMA
  98982. CUMANASCSI2_STATUS
  98983. CUR0_VUPDATE_LOCK_SET0__CUR0_VUPDATE_LOCK_SET_MASK
  98984. CUR0_VUPDATE_LOCK_SET0__CUR0_VUPDATE_LOCK_SET__SHIFT
  98985. CUR0_VUPDATE_LOCK_SET1__CUR0_VUPDATE_LOCK_SET_MASK
  98986. CUR0_VUPDATE_LOCK_SET1__CUR0_VUPDATE_LOCK_SET__SHIFT
  98987. CUR0_VUPDATE_LOCK_SET2__CUR0_VUPDATE_LOCK_SET_MASK
  98988. CUR0_VUPDATE_LOCK_SET2__CUR0_VUPDATE_LOCK_SET__SHIFT
  98989. CUR0_VUPDATE_LOCK_SET3__CUR0_VUPDATE_LOCK_SET_MASK
  98990. CUR0_VUPDATE_LOCK_SET3__CUR0_VUPDATE_LOCK_SET__SHIFT
  98991. CUR1_VUPDATE_LOCK_SET0__CUR1_VUPDATE_LOCK_SET_MASK
  98992. CUR1_VUPDATE_LOCK_SET0__CUR1_VUPDATE_LOCK_SET__SHIFT
  98993. CUR1_VUPDATE_LOCK_SET1__CUR1_VUPDATE_LOCK_SET_MASK
  98994. CUR1_VUPDATE_LOCK_SET1__CUR1_VUPDATE_LOCK_SET__SHIFT
  98995. CUR1_VUPDATE_LOCK_SET2__CUR1_VUPDATE_LOCK_SET_MASK
  98996. CUR1_VUPDATE_LOCK_SET2__CUR1_VUPDATE_LOCK_SET__SHIFT
  98997. CUR1_VUPDATE_LOCK_SET3__CUR1_VUPDATE_LOCK_SET_MASK
  98998. CUR1_VUPDATE_LOCK_SET3__CUR1_VUPDATE_LOCK_SET__SHIFT
  98999. CUR2_CLR0
  99000. CUR2_CLR1
  99001. CUR2_COLOR1__CUR2_COLOR1_BLUE_MASK
  99002. CUR2_COLOR1__CUR2_COLOR1_BLUE__SHIFT
  99003. CUR2_COLOR1__CUR2_COLOR1_GREEN_MASK
  99004. CUR2_COLOR1__CUR2_COLOR1_GREEN__SHIFT
  99005. CUR2_COLOR1__CUR2_COLOR1_RED_MASK
  99006. CUR2_COLOR1__CUR2_COLOR1_RED__SHIFT
  99007. CUR2_COLOR2__CUR2_COLOR2_BLUE_MASK
  99008. CUR2_COLOR2__CUR2_COLOR2_BLUE__SHIFT
  99009. CUR2_COLOR2__CUR2_COLOR2_GREEN_MASK
  99010. CUR2_COLOR2__CUR2_COLOR2_GREEN__SHIFT
  99011. CUR2_COLOR2__CUR2_COLOR2_RED_MASK
  99012. CUR2_COLOR2__CUR2_COLOR2_RED__SHIFT
  99013. CUR2_CONTROL__CUR2_INV_TRANS_CLAMP_MASK
  99014. CUR2_CONTROL__CUR2_INV_TRANS_CLAMP__SHIFT
  99015. CUR2_CONTROL__CURSOR2_2X_MAGNIFY_MASK
  99016. CUR2_CONTROL__CURSOR2_2X_MAGNIFY__SHIFT
  99017. CUR2_CONTROL__CURSOR2_EN_MASK
  99018. CUR2_CONTROL__CURSOR2_EN__SHIFT
  99019. CUR2_CONTROL__CURSOR2_FORCE_MC_ON_MASK
  99020. CUR2_CONTROL__CURSOR2_FORCE_MC_ON__SHIFT
  99021. CUR2_CONTROL__CURSOR2_MODE_MASK
  99022. CUR2_CONTROL__CURSOR2_MODE__SHIFT
  99023. CUR2_CONTROL__CURSOR2_URGENT_CONTROL_MASK
  99024. CUR2_CONTROL__CURSOR2_URGENT_CONTROL__SHIFT
  99025. CUR2_HORZ_VERT_OFF
  99026. CUR2_HORZ_VERT_POSN
  99027. CUR2_HOT_SPOT__CURSOR2_HOT_SPOT_X_MASK
  99028. CUR2_HOT_SPOT__CURSOR2_HOT_SPOT_X__SHIFT
  99029. CUR2_HOT_SPOT__CURSOR2_HOT_SPOT_Y_MASK
  99030. CUR2_HOT_SPOT__CURSOR2_HOT_SPOT_Y__SHIFT
  99031. CUR2_OFFSET
  99032. CUR2_POSITION__CURSOR2_X_POSITION_MASK
  99033. CUR2_POSITION__CURSOR2_X_POSITION__SHIFT
  99034. CUR2_POSITION__CURSOR2_Y_POSITION_MASK
  99035. CUR2_POSITION__CURSOR2_Y_POSITION__SHIFT
  99036. CUR2_SIZE__CURSOR2_HEIGHT_MASK
  99037. CUR2_SIZE__CURSOR2_HEIGHT__SHIFT
  99038. CUR2_SIZE__CURSOR2_WIDTH_MASK
  99039. CUR2_SIZE__CURSOR2_WIDTH__SHIFT
  99040. CUR2_STEREO_CONTROL__CURSOR2_PRIMARY_OFFSET_MASK
  99041. CUR2_STEREO_CONTROL__CURSOR2_PRIMARY_OFFSET__SHIFT
  99042. CUR2_STEREO_CONTROL__CURSOR2_SECONDARY_OFFSET_MASK
  99043. CUR2_STEREO_CONTROL__CURSOR2_SECONDARY_OFFSET__SHIFT
  99044. CUR2_STEREO_CONTROL__CURSOR2_STEREO_EN_MASK
  99045. CUR2_STEREO_CONTROL__CURSOR2_STEREO_EN__SHIFT
  99046. CUR2_STEREO_CONTROL__CURSOR2_STEREO_OFFSET_YNX_MASK
  99047. CUR2_STEREO_CONTROL__CURSOR2_STEREO_OFFSET_YNX__SHIFT
  99048. CUR2_SURFACE_ADDRESS_HIGH__CURSOR2_SURFACE_ADDRESS_HIGH_MASK
  99049. CUR2_SURFACE_ADDRESS_HIGH__CURSOR2_SURFACE_ADDRESS_HIGH__SHIFT
  99050. CUR2_SURFACE_ADDRESS__CURSOR2_SURFACE_ADDRESS_MASK
  99051. CUR2_SURFACE_ADDRESS__CURSOR2_SURFACE_ADDRESS__SHIFT
  99052. CUR2_UPDATE__CURSOR2_DISABLE_MULTIPLE_UPDATE_MASK
  99053. CUR2_UPDATE__CURSOR2_DISABLE_MULTIPLE_UPDATE__SHIFT
  99054. CUR2_UPDATE__CURSOR2_UPDATE_LOCK_MASK
  99055. CUR2_UPDATE__CURSOR2_UPDATE_LOCK__SHIFT
  99056. CUR2_UPDATE__CURSOR2_UPDATE_PENDING_MASK
  99057. CUR2_UPDATE__CURSOR2_UPDATE_PENDING__SHIFT
  99058. CUR2_UPDATE__CURSOR2_UPDATE_STEREO_MODE_MASK
  99059. CUR2_UPDATE__CURSOR2_UPDATE_STEREO_MODE__SHIFT
  99060. CUR2_UPDATE__CURSOR2_UPDATE_TAKEN_MASK
  99061. CUR2_UPDATE__CURSOR2_UPDATE_TAKEN__SHIFT
  99062. CURA
  99063. CURABASE
  99064. CURACNTR
  99065. CURAPOS
  99066. CURAPPWRSTISNOTBOOT
  99067. CURAPPWRSTISNOTCORRECTDBG
  99068. CURAPPWRSTISNOTEXECUTE
  99069. CURAPPWRSTISNOTSLEEPMODE
  99070. CURAPPWRSTISNOT_BOOT
  99071. CURAPPWRSTISNOT_CORRECTFORIT10
  99072. CURAPPWRSTISNOT_EXECUTE
  99073. CURAPPWRSTISNOT_SLEEPMODE
  99074. CURB
  99075. CURBASE
  99076. CURBBASE
  99077. CURBCNTR
  99078. CURBPOS
  99079. CURCBASE
  99080. CURCCNTR
  99081. CURCNTR
  99082. CURCPOS
  99083. CUROSC_MASK
  99084. CURPIPE
  99085. CURPOS
  99086. CURRADDR
  99087. CURRENT
  99088. CURRENT_AVG
  99089. CURRENT_BITMASK
  99090. CURRENT_BSS_FILTER
  99091. CURRENT_BUS_MODE
  99092. CURRENT_BUS_SPEED
  99093. CURRENT_DEVICE_PRESENT
  99094. CURRENT_DV_TIMINGS
  99095. CURRENT_ELFCLASS
  99096. CURRENT_EL_SP_EL0_VECTOR
  99097. CURRENT_EL_SP_ELx_VECTOR
  99098. CURRENT_ERR_MASK
  99099. CURRENT_FEEDBACK_DIV_MASK
  99100. CURRENT_FEEDBACK_DIV_SHIFT
  99101. CURRENT_FREQ_STATE_NB__CURRENT_DID_MASK
  99102. CURRENT_FREQ_STATE_NB__CURRENT_DID__SHIFT
  99103. CURRENT_FREQ_STATE_NB__CURRENT_FID_MASK
  99104. CURRENT_FREQ_STATE_NB__CURRENT_FID__SHIFT
  99105. CURRENT_FREQ_STATE_NB__NB_LOW_POWER_MASK
  99106. CURRENT_FREQ_STATE_NB__NB_LOW_POWER__SHIFT
  99107. CURRENT_FREQ_STATE_NB__NB_STUTTER_MODE_MASK
  99108. CURRENT_FREQ_STATE_NB__NB_STUTTER_MODE__SHIFT
  99109. CURRENT_FUN_MASK
  99110. CURRENT_GATE
  99111. CURRENT_GATE_CSC
  99112. CURRENT_GATE_DE
  99113. CURRENT_GATE_DISPLAY
  99114. CURRENT_GATE_DMA
  99115. CURRENT_GATE_GPIO
  99116. CURRENT_GATE_I2C
  99117. CURRENT_GATE_LOCALMEM
  99118. CURRENT_GATE_M2XCLK_112MHZ
  99119. CURRENT_GATE_M2XCLK_168MHZ
  99120. CURRENT_GATE_M2XCLK_336MHZ
  99121. CURRENT_GATE_M2XCLK_84MHZ
  99122. CURRENT_GATE_M2XCLK_DIV_1
  99123. CURRENT_GATE_M2XCLK_DIV_2
  99124. CURRENT_GATE_M2XCLK_DIV_3
  99125. CURRENT_GATE_M2XCLK_DIV_4
  99126. CURRENT_GATE_M2XCLK_MASK
  99127. CURRENT_GATE_MCLK_112MHZ
  99128. CURRENT_GATE_MCLK_42MHZ
  99129. CURRENT_GATE_MCLK_56MHZ
  99130. CURRENT_GATE_MCLK_84MHZ
  99131. CURRENT_GATE_MCLK_DIV_3
  99132. CURRENT_GATE_MCLK_DIV_4
  99133. CURRENT_GATE_MCLK_DIV_6
  99134. CURRENT_GATE_MCLK_DIV_8
  99135. CURRENT_GATE_MCLK_MASK
  99136. CURRENT_GATE_PWM
  99137. CURRENT_GATE_SSP
  99138. CURRENT_GATE_VGA
  99139. CURRENT_GATE_ZVPORT
  99140. CURRENT_GFX_VID_MASK
  99141. CURRENT_GFX_VID__SHIFT
  99142. CURRENT_GLOBAL_TEMP__TEMP_MASK
  99143. CURRENT_GLOBAL_TEMP__TEMP__SHIFT
  99144. CURRENT_GNB_TEMP__TEMP_MASK
  99145. CURRENT_GNB_TEMP__TEMP__SHIFT
  99146. CURRENT_GTO_TIMEOUT
  99147. CURRENT_HOT_PLUG_CNCT
  99148. CURRENT_LDN_INDEX
  99149. CURRENT_LIMIT_200
  99150. CURRENT_LIMIT_200_MASK
  99151. CURRENT_LIMIT_200_QUERY_SWITCH_OK
  99152. CURRENT_LIMIT_200_SWITCH_BUSY
  99153. CURRENT_LIMIT_400
  99154. CURRENT_LIMIT_400_MASK
  99155. CURRENT_LIMIT_400_QUERY_SWITCH_OK
  99156. CURRENT_LIMIT_400_SWITCH_BUSY
  99157. CURRENT_LIMIT_600
  99158. CURRENT_LIMIT_600_MASK
  99159. CURRENT_LIMIT_600_QUERY_SWITCH_OK
  99160. CURRENT_LIMIT_600_SWITCH_BUSY
  99161. CURRENT_LIMIT_800
  99162. CURRENT_LIMIT_800_MASK
  99163. CURRENT_LIMIT_800_QUERY_SWITCH_OK
  99164. CURRENT_LIMIT_800_SWITCH_BUSY
  99165. CURRENT_LOSS_OF_SIGNAL
  99166. CURRENT_NB_VID_MASK
  99167. CURRENT_NB_VID__SHIFT
  99168. CURRENT_NOW
  99169. CURRENT_OOB1_ERROR
  99170. CURRENT_OOB2_ERROR
  99171. CURRENT_OOB_DONE
  99172. CURRENT_OOB_ERROR
  99173. CURRENT_OOB_TIMEOUT
  99174. CURRENT_PG_STATUS__UVD_PG_STATUS_MASK
  99175. CURRENT_PG_STATUS__VCE_PG_STATUS_MASK
  99176. CURRENT_PHY_MASK
  99177. CURRENT_PROFILE_INDEX_MASK
  99178. CURRENT_PROFILE_INDEX_SHIFT
  99179. CURRENT_PSTATE_NB__CURRENT_MEM_PSTATE_ID_MASK
  99180. CURRENT_PSTATE_NB__CURRENT_MEM_PSTATE_ID__SHIFT
  99181. CURRENT_PSTATE_NB__CURRENT_PSTATE_ID_MASK
  99182. CURRENT_PSTATE_NB__CURRENT_PSTATE_ID__SHIFT
  99183. CURRENT_PSTATE_NB__CURRENT_PSTATE_LO_MASK
  99184. CURRENT_PSTATE_NB__CURRENT_PSTATE_LO__SHIFT
  99185. CURRENT_Q
  99186. CURRENT_Q_MASK
  99187. CURRENT_RATE
  99188. CURRENT_SC
  99189. CURRENT_SCSI_DATA_REG
  99190. CURRENT_SENSE_AMPLIFIER
  99191. CURRENT_SENSE_SHUNT
  99192. CURRENT_SHIFT
  99193. CURRENT_SPINUP_HOLD
  99194. CURRENT_STATE
  99195. CURRENT_STATEID
  99196. CURRENT_STATE_CPU0__CPU_COF_IND_PROG_MASK
  99197. CURRENT_STATE_CPU0__CPU_COF_IND_PROG__SHIFT
  99198. CURRENT_STATE_CPU0__CPU_COF_MASK
  99199. CURRENT_STATE_CPU0__CPU_COF__SHIFT
  99200. CURRENT_STATE_CPU0__CURRENT_DID_MASK
  99201. CURRENT_STATE_CPU0__CURRENT_DID__SHIFT
  99202. CURRENT_STATE_CPU0__CURRENT_FID_MASK
  99203. CURRENT_STATE_CPU0__CURRENT_FID__SHIFT
  99204. CURRENT_STATE_CPU0__CURRENT_PSTATE_ID_MASK
  99205. CURRENT_STATE_CPU0__CURRENT_PSTATE_ID__SHIFT
  99206. CURRENT_STATE_CPU1__CPU_COF_IND_PROG_MASK
  99207. CURRENT_STATE_CPU1__CPU_COF_IND_PROG__SHIFT
  99208. CURRENT_STATE_CPU1__CPU_COF_MASK
  99209. CURRENT_STATE_CPU1__CPU_COF__SHIFT
  99210. CURRENT_STATE_CPU1__CURRENT_DID_MASK
  99211. CURRENT_STATE_CPU1__CURRENT_DID__SHIFT
  99212. CURRENT_STATE_CPU1__CURRENT_FID_MASK
  99213. CURRENT_STATE_CPU1__CURRENT_FID__SHIFT
  99214. CURRENT_STATE_CPU1__CURRENT_PSTATE_ID_MASK
  99215. CURRENT_STATE_CPU1__CURRENT_PSTATE_ID__SHIFT
  99216. CURRENT_STATE_ID_FLAG
  99217. CURRENT_STATE_INDEX_MASK
  99218. CURRENT_STATE_INDEX_SHIFT
  99219. CURRENT_STATE_MASK
  99220. CURRENT_STATE_SHIFT
  99221. CURRENT_STATUS
  99222. CURRENT_STD
  99223. CURRENT_TASK
  99224. CURRENT_TX_RATE_REG
  99225. CURRENT_VID_CPU0__CURRENT_VID_MASK
  99226. CURRENT_VID_CPU0__CURRENT_VID__SHIFT
  99227. CURRENT_VID_CPU1__CURRENT_VID_MASK
  99228. CURRENT_VID_CPU1__CURRENT_VID__SHIFT
  99229. CURRENT_VID_NB__CURRENT_VID_MASK
  99230. CURRENT_VID_NB__CURRENT_VID__SHIFT
  99231. CURRENT_VSOC_LAYOUT_MAJOR_VERSION
  99232. CURRENT_VSOC_LAYOUT_MINOR_VERSION
  99233. CURRENT_WINDOW_BUFFER_MAX_SIZE
  99234. CURR_CFG_MET_NONE
  99235. CURR_CFG_MET_OS
  99236. CURR_CFG_MET_VENDOR_SPEC
  99237. CURR_INDEX
  99238. CURR_INDEX_MASK
  99239. CURR_INDEX_SHIFT
  99240. CURR_MCLK_INDEX_MASK
  99241. CURR_MCLK_INDEX_SHIFT
  99242. CURR_PCIE_INDEX_MASK
  99243. CURR_PCIE_INDEX_SHIFT
  99244. CURR_PSR_R1
  99245. CURR_PSR_R2
  99246. CURR_SCLK_INDEX
  99247. CURR_SCLK_INDEX_MASK
  99248. CURR_SCLK_INDEX_SHIFT
  99249. CURR_STEP_SIZE
  99250. CURR_VID_INDEX_MASK
  99251. CURR_VID_INDEX_SHIFT
  99252. CURS1B
  99253. CURS1G
  99254. CURS1R
  99255. CURS2B
  99256. CURS2G
  99257. CURS2R
  99258. CURS3B
  99259. CURS3G
  99260. CURS3R
  99261. CURSACATTR
  99262. CURSACCTL
  99263. CURSCTL
  99264. CURSEG_COLD_DATA
  99265. CURSEG_COLD_NODE
  99266. CURSEG_HOT_DATA
  99267. CURSEG_HOT_NODE
  99268. CURSEG_I
  99269. CURSEG_WARM_DATA
  99270. CURSEG_WARM_NODE
  99271. CURSENSE_ENB
  99272. CURSHOTX
  99273. CURSHOTY
  99274. CURSIZE
  99275. CURSON_WIN
  99276. CURSOR
  99277. CURSOR0_0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99278. CURSOR0_0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99279. CURSOR0_0_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99280. CURSOR0_0_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99281. CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99282. CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99283. CURSOR0_0_CURSOR_CONTROL__CURSOR_MODE_MASK
  99284. CURSOR0_0_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99285. CURSOR0_0_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99286. CURSOR0_0_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99287. CURSOR0_0_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99288. CURSOR0_0_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99289. CURSOR0_0_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99290. CURSOR0_0_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99291. CURSOR0_0_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99292. CURSOR0_0_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99293. CURSOR0_0_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99294. CURSOR0_0_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99295. CURSOR0_0_CURSOR_CONTROL__CURSOR_TMZ_MASK
  99296. CURSOR0_0_CURSOR_CONTROL__CURSOR_TMZ__SHIFT
  99297. CURSOR0_0_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99298. CURSOR0_0_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99299. CURSOR0_0_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99300. CURSOR0_0_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99301. CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99302. CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99303. CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99304. CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99305. CURSOR0_0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99306. CURSOR0_0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99307. CURSOR0_0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99308. CURSOR0_0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99309. CURSOR0_0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99310. CURSOR0_0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99311. CURSOR0_0_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99312. CURSOR0_0_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99313. CURSOR0_0_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99314. CURSOR0_0_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99315. CURSOR0_0_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99316. CURSOR0_0_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99317. CURSOR0_0_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99318. CURSOR0_0_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99319. CURSOR0_0_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99320. CURSOR0_0_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99321. CURSOR0_0_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99322. CURSOR0_0_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99323. CURSOR0_0_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99324. CURSOR0_0_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99325. CURSOR0_0_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99326. CURSOR0_0_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99327. CURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99328. CURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99329. CURSOR0_0_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99330. CURSOR0_0_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99331. CURSOR0_0_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH_MASK
  99332. CURSOR0_0_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH__SHIFT
  99333. CURSOR0_0_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP_MASK
  99334. CURSOR0_0_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP__SHIFT
  99335. CURSOR0_0_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM_MASK
  99336. CURSOR0_0_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM__SHIFT
  99337. CURSOR0_0_DMDATA_ADDRESS_HIGH__DMDATA_TMZ_MASK
  99338. CURSOR0_0_DMDATA_ADDRESS_HIGH__DMDATA_TMZ__SHIFT
  99339. CURSOR0_0_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW_MASK
  99340. CURSOR0_0_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW__SHIFT
  99341. CURSOR0_0_DMDATA_CNTL__DMDATA_MODE_MASK
  99342. CURSOR0_0_DMDATA_CNTL__DMDATA_MODE__SHIFT
  99343. CURSOR0_0_DMDATA_CNTL__DMDATA_REPEAT_MASK
  99344. CURSOR0_0_DMDATA_CNTL__DMDATA_REPEAT__SHIFT
  99345. CURSOR0_0_DMDATA_CNTL__DMDATA_SIZE_MASK
  99346. CURSOR0_0_DMDATA_CNTL__DMDATA_SIZE__SHIFT
  99347. CURSOR0_0_DMDATA_CNTL__DMDATA_UPDATED_MASK
  99348. CURSOR0_0_DMDATA_CNTL__DMDATA_UPDATED__SHIFT
  99349. CURSOR0_0_DMDATA_QOS_CNTL__DMDATA_DL_DELTA_MASK
  99350. CURSOR0_0_DMDATA_QOS_CNTL__DMDATA_DL_DELTA__SHIFT
  99351. CURSOR0_0_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL_MASK
  99352. CURSOR0_0_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL__SHIFT
  99353. CURSOR0_0_DMDATA_QOS_CNTL__DMDATA_QOS_MODE_MASK
  99354. CURSOR0_0_DMDATA_QOS_CNTL__DMDATA_QOS_MODE__SHIFT
  99355. CURSOR0_0_DMDATA_STATUS__DMDATA_DONE_MASK
  99356. CURSOR0_0_DMDATA_STATUS__DMDATA_DONE__SHIFT
  99357. CURSOR0_0_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR_MASK
  99358. CURSOR0_0_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR__SHIFT
  99359. CURSOR0_0_DMDATA_STATUS__DMDATA_UNDERFLOW_MASK
  99360. CURSOR0_0_DMDATA_STATUS__DMDATA_UNDERFLOW__SHIFT
  99361. CURSOR0_0_DMDATA_SW_CNTL__DMDATA_SW_REPEAT_MASK
  99362. CURSOR0_0_DMDATA_SW_CNTL__DMDATA_SW_REPEAT__SHIFT
  99363. CURSOR0_0_DMDATA_SW_CNTL__DMDATA_SW_SIZE_MASK
  99364. CURSOR0_0_DMDATA_SW_CNTL__DMDATA_SW_SIZE__SHIFT
  99365. CURSOR0_0_DMDATA_SW_CNTL__DMDATA_SW_UPDATED_MASK
  99366. CURSOR0_0_DMDATA_SW_CNTL__DMDATA_SW_UPDATED__SHIFT
  99367. CURSOR0_0_DMDATA_SW_DATA__DMDATA_SW_DATA_MASK
  99368. CURSOR0_0_DMDATA_SW_DATA__DMDATA_SW_DATA__SHIFT
  99369. CURSOR0_1_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99370. CURSOR0_1_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99371. CURSOR0_1_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99372. CURSOR0_1_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99373. CURSOR0_1_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99374. CURSOR0_1_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99375. CURSOR0_1_CURSOR_CONTROL__CURSOR_MODE_MASK
  99376. CURSOR0_1_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99377. CURSOR0_1_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99378. CURSOR0_1_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99379. CURSOR0_1_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99380. CURSOR0_1_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99381. CURSOR0_1_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99382. CURSOR0_1_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99383. CURSOR0_1_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99384. CURSOR0_1_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99385. CURSOR0_1_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99386. CURSOR0_1_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99387. CURSOR0_1_CURSOR_CONTROL__CURSOR_TMZ_MASK
  99388. CURSOR0_1_CURSOR_CONTROL__CURSOR_TMZ__SHIFT
  99389. CURSOR0_1_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99390. CURSOR0_1_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99391. CURSOR0_1_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99392. CURSOR0_1_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99393. CURSOR0_1_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99394. CURSOR0_1_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99395. CURSOR0_1_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99396. CURSOR0_1_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99397. CURSOR0_1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99398. CURSOR0_1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99399. CURSOR0_1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99400. CURSOR0_1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99401. CURSOR0_1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99402. CURSOR0_1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99403. CURSOR0_1_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99404. CURSOR0_1_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99405. CURSOR0_1_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99406. CURSOR0_1_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99407. CURSOR0_1_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99408. CURSOR0_1_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99409. CURSOR0_1_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99410. CURSOR0_1_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99411. CURSOR0_1_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99412. CURSOR0_1_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99413. CURSOR0_1_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99414. CURSOR0_1_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99415. CURSOR0_1_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99416. CURSOR0_1_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99417. CURSOR0_1_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99418. CURSOR0_1_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99419. CURSOR0_1_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99420. CURSOR0_1_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99421. CURSOR0_1_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99422. CURSOR0_1_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99423. CURSOR0_1_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH_MASK
  99424. CURSOR0_1_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH__SHIFT
  99425. CURSOR0_1_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP_MASK
  99426. CURSOR0_1_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP__SHIFT
  99427. CURSOR0_1_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM_MASK
  99428. CURSOR0_1_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM__SHIFT
  99429. CURSOR0_1_DMDATA_ADDRESS_HIGH__DMDATA_TMZ_MASK
  99430. CURSOR0_1_DMDATA_ADDRESS_HIGH__DMDATA_TMZ__SHIFT
  99431. CURSOR0_1_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW_MASK
  99432. CURSOR0_1_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW__SHIFT
  99433. CURSOR0_1_DMDATA_CNTL__DMDATA_MODE_MASK
  99434. CURSOR0_1_DMDATA_CNTL__DMDATA_MODE__SHIFT
  99435. CURSOR0_1_DMDATA_CNTL__DMDATA_REPEAT_MASK
  99436. CURSOR0_1_DMDATA_CNTL__DMDATA_REPEAT__SHIFT
  99437. CURSOR0_1_DMDATA_CNTL__DMDATA_SIZE_MASK
  99438. CURSOR0_1_DMDATA_CNTL__DMDATA_SIZE__SHIFT
  99439. CURSOR0_1_DMDATA_CNTL__DMDATA_UPDATED_MASK
  99440. CURSOR0_1_DMDATA_CNTL__DMDATA_UPDATED__SHIFT
  99441. CURSOR0_1_DMDATA_QOS_CNTL__DMDATA_DL_DELTA_MASK
  99442. CURSOR0_1_DMDATA_QOS_CNTL__DMDATA_DL_DELTA__SHIFT
  99443. CURSOR0_1_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL_MASK
  99444. CURSOR0_1_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL__SHIFT
  99445. CURSOR0_1_DMDATA_QOS_CNTL__DMDATA_QOS_MODE_MASK
  99446. CURSOR0_1_DMDATA_QOS_CNTL__DMDATA_QOS_MODE__SHIFT
  99447. CURSOR0_1_DMDATA_STATUS__DMDATA_DONE_MASK
  99448. CURSOR0_1_DMDATA_STATUS__DMDATA_DONE__SHIFT
  99449. CURSOR0_1_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR_MASK
  99450. CURSOR0_1_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR__SHIFT
  99451. CURSOR0_1_DMDATA_STATUS__DMDATA_UNDERFLOW_MASK
  99452. CURSOR0_1_DMDATA_STATUS__DMDATA_UNDERFLOW__SHIFT
  99453. CURSOR0_1_DMDATA_SW_CNTL__DMDATA_SW_REPEAT_MASK
  99454. CURSOR0_1_DMDATA_SW_CNTL__DMDATA_SW_REPEAT__SHIFT
  99455. CURSOR0_1_DMDATA_SW_CNTL__DMDATA_SW_SIZE_MASK
  99456. CURSOR0_1_DMDATA_SW_CNTL__DMDATA_SW_SIZE__SHIFT
  99457. CURSOR0_1_DMDATA_SW_CNTL__DMDATA_SW_UPDATED_MASK
  99458. CURSOR0_1_DMDATA_SW_CNTL__DMDATA_SW_UPDATED__SHIFT
  99459. CURSOR0_1_DMDATA_SW_DATA__DMDATA_SW_DATA_MASK
  99460. CURSOR0_1_DMDATA_SW_DATA__DMDATA_SW_DATA__SHIFT
  99461. CURSOR0_2_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99462. CURSOR0_2_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99463. CURSOR0_2_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99464. CURSOR0_2_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99465. CURSOR0_2_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99466. CURSOR0_2_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99467. CURSOR0_2_CURSOR_CONTROL__CURSOR_MODE_MASK
  99468. CURSOR0_2_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99469. CURSOR0_2_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99470. CURSOR0_2_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99471. CURSOR0_2_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99472. CURSOR0_2_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99473. CURSOR0_2_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99474. CURSOR0_2_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99475. CURSOR0_2_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99476. CURSOR0_2_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99477. CURSOR0_2_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99478. CURSOR0_2_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99479. CURSOR0_2_CURSOR_CONTROL__CURSOR_TMZ_MASK
  99480. CURSOR0_2_CURSOR_CONTROL__CURSOR_TMZ__SHIFT
  99481. CURSOR0_2_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99482. CURSOR0_2_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99483. CURSOR0_2_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99484. CURSOR0_2_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99485. CURSOR0_2_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99486. CURSOR0_2_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99487. CURSOR0_2_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99488. CURSOR0_2_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99489. CURSOR0_2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99490. CURSOR0_2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99491. CURSOR0_2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99492. CURSOR0_2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99493. CURSOR0_2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99494. CURSOR0_2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99495. CURSOR0_2_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99496. CURSOR0_2_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99497. CURSOR0_2_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99498. CURSOR0_2_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99499. CURSOR0_2_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99500. CURSOR0_2_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99501. CURSOR0_2_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99502. CURSOR0_2_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99503. CURSOR0_2_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99504. CURSOR0_2_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99505. CURSOR0_2_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99506. CURSOR0_2_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99507. CURSOR0_2_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99508. CURSOR0_2_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99509. CURSOR0_2_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99510. CURSOR0_2_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99511. CURSOR0_2_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99512. CURSOR0_2_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99513. CURSOR0_2_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99514. CURSOR0_2_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99515. CURSOR0_2_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH_MASK
  99516. CURSOR0_2_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH__SHIFT
  99517. CURSOR0_2_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP_MASK
  99518. CURSOR0_2_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP__SHIFT
  99519. CURSOR0_2_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM_MASK
  99520. CURSOR0_2_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM__SHIFT
  99521. CURSOR0_2_DMDATA_ADDRESS_HIGH__DMDATA_TMZ_MASK
  99522. CURSOR0_2_DMDATA_ADDRESS_HIGH__DMDATA_TMZ__SHIFT
  99523. CURSOR0_2_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW_MASK
  99524. CURSOR0_2_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW__SHIFT
  99525. CURSOR0_2_DMDATA_CNTL__DMDATA_MODE_MASK
  99526. CURSOR0_2_DMDATA_CNTL__DMDATA_MODE__SHIFT
  99527. CURSOR0_2_DMDATA_CNTL__DMDATA_REPEAT_MASK
  99528. CURSOR0_2_DMDATA_CNTL__DMDATA_REPEAT__SHIFT
  99529. CURSOR0_2_DMDATA_CNTL__DMDATA_SIZE_MASK
  99530. CURSOR0_2_DMDATA_CNTL__DMDATA_SIZE__SHIFT
  99531. CURSOR0_2_DMDATA_CNTL__DMDATA_UPDATED_MASK
  99532. CURSOR0_2_DMDATA_CNTL__DMDATA_UPDATED__SHIFT
  99533. CURSOR0_2_DMDATA_QOS_CNTL__DMDATA_DL_DELTA_MASK
  99534. CURSOR0_2_DMDATA_QOS_CNTL__DMDATA_DL_DELTA__SHIFT
  99535. CURSOR0_2_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL_MASK
  99536. CURSOR0_2_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL__SHIFT
  99537. CURSOR0_2_DMDATA_QOS_CNTL__DMDATA_QOS_MODE_MASK
  99538. CURSOR0_2_DMDATA_QOS_CNTL__DMDATA_QOS_MODE__SHIFT
  99539. CURSOR0_2_DMDATA_STATUS__DMDATA_DONE_MASK
  99540. CURSOR0_2_DMDATA_STATUS__DMDATA_DONE__SHIFT
  99541. CURSOR0_2_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR_MASK
  99542. CURSOR0_2_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR__SHIFT
  99543. CURSOR0_2_DMDATA_STATUS__DMDATA_UNDERFLOW_MASK
  99544. CURSOR0_2_DMDATA_STATUS__DMDATA_UNDERFLOW__SHIFT
  99545. CURSOR0_2_DMDATA_SW_CNTL__DMDATA_SW_REPEAT_MASK
  99546. CURSOR0_2_DMDATA_SW_CNTL__DMDATA_SW_REPEAT__SHIFT
  99547. CURSOR0_2_DMDATA_SW_CNTL__DMDATA_SW_SIZE_MASK
  99548. CURSOR0_2_DMDATA_SW_CNTL__DMDATA_SW_SIZE__SHIFT
  99549. CURSOR0_2_DMDATA_SW_CNTL__DMDATA_SW_UPDATED_MASK
  99550. CURSOR0_2_DMDATA_SW_CNTL__DMDATA_SW_UPDATED__SHIFT
  99551. CURSOR0_2_DMDATA_SW_DATA__DMDATA_SW_DATA_MASK
  99552. CURSOR0_2_DMDATA_SW_DATA__DMDATA_SW_DATA__SHIFT
  99553. CURSOR0_3_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99554. CURSOR0_3_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99555. CURSOR0_3_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99556. CURSOR0_3_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99557. CURSOR0_3_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99558. CURSOR0_3_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99559. CURSOR0_3_CURSOR_CONTROL__CURSOR_MODE_MASK
  99560. CURSOR0_3_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99561. CURSOR0_3_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99562. CURSOR0_3_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99563. CURSOR0_3_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99564. CURSOR0_3_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99565. CURSOR0_3_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99566. CURSOR0_3_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99567. CURSOR0_3_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99568. CURSOR0_3_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99569. CURSOR0_3_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99570. CURSOR0_3_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99571. CURSOR0_3_CURSOR_CONTROL__CURSOR_TMZ_MASK
  99572. CURSOR0_3_CURSOR_CONTROL__CURSOR_TMZ__SHIFT
  99573. CURSOR0_3_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99574. CURSOR0_3_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99575. CURSOR0_3_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99576. CURSOR0_3_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99577. CURSOR0_3_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99578. CURSOR0_3_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99579. CURSOR0_3_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99580. CURSOR0_3_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99581. CURSOR0_3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99582. CURSOR0_3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99583. CURSOR0_3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99584. CURSOR0_3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99585. CURSOR0_3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99586. CURSOR0_3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99587. CURSOR0_3_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99588. CURSOR0_3_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99589. CURSOR0_3_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99590. CURSOR0_3_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99591. CURSOR0_3_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99592. CURSOR0_3_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99593. CURSOR0_3_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99594. CURSOR0_3_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99595. CURSOR0_3_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99596. CURSOR0_3_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99597. CURSOR0_3_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99598. CURSOR0_3_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99599. CURSOR0_3_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99600. CURSOR0_3_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99601. CURSOR0_3_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99602. CURSOR0_3_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99603. CURSOR0_3_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99604. CURSOR0_3_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99605. CURSOR0_3_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99606. CURSOR0_3_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99607. CURSOR0_3_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH_MASK
  99608. CURSOR0_3_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH__SHIFT
  99609. CURSOR0_3_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP_MASK
  99610. CURSOR0_3_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP__SHIFT
  99611. CURSOR0_3_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM_MASK
  99612. CURSOR0_3_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM__SHIFT
  99613. CURSOR0_3_DMDATA_ADDRESS_HIGH__DMDATA_TMZ_MASK
  99614. CURSOR0_3_DMDATA_ADDRESS_HIGH__DMDATA_TMZ__SHIFT
  99615. CURSOR0_3_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW_MASK
  99616. CURSOR0_3_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW__SHIFT
  99617. CURSOR0_3_DMDATA_CNTL__DMDATA_MODE_MASK
  99618. CURSOR0_3_DMDATA_CNTL__DMDATA_MODE__SHIFT
  99619. CURSOR0_3_DMDATA_CNTL__DMDATA_REPEAT_MASK
  99620. CURSOR0_3_DMDATA_CNTL__DMDATA_REPEAT__SHIFT
  99621. CURSOR0_3_DMDATA_CNTL__DMDATA_SIZE_MASK
  99622. CURSOR0_3_DMDATA_CNTL__DMDATA_SIZE__SHIFT
  99623. CURSOR0_3_DMDATA_CNTL__DMDATA_UPDATED_MASK
  99624. CURSOR0_3_DMDATA_CNTL__DMDATA_UPDATED__SHIFT
  99625. CURSOR0_3_DMDATA_QOS_CNTL__DMDATA_DL_DELTA_MASK
  99626. CURSOR0_3_DMDATA_QOS_CNTL__DMDATA_DL_DELTA__SHIFT
  99627. CURSOR0_3_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL_MASK
  99628. CURSOR0_3_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL__SHIFT
  99629. CURSOR0_3_DMDATA_QOS_CNTL__DMDATA_QOS_MODE_MASK
  99630. CURSOR0_3_DMDATA_QOS_CNTL__DMDATA_QOS_MODE__SHIFT
  99631. CURSOR0_3_DMDATA_STATUS__DMDATA_DONE_MASK
  99632. CURSOR0_3_DMDATA_STATUS__DMDATA_DONE__SHIFT
  99633. CURSOR0_3_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR_MASK
  99634. CURSOR0_3_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR__SHIFT
  99635. CURSOR0_3_DMDATA_STATUS__DMDATA_UNDERFLOW_MASK
  99636. CURSOR0_3_DMDATA_STATUS__DMDATA_UNDERFLOW__SHIFT
  99637. CURSOR0_3_DMDATA_SW_CNTL__DMDATA_SW_REPEAT_MASK
  99638. CURSOR0_3_DMDATA_SW_CNTL__DMDATA_SW_REPEAT__SHIFT
  99639. CURSOR0_3_DMDATA_SW_CNTL__DMDATA_SW_SIZE_MASK
  99640. CURSOR0_3_DMDATA_SW_CNTL__DMDATA_SW_SIZE__SHIFT
  99641. CURSOR0_3_DMDATA_SW_CNTL__DMDATA_SW_UPDATED_MASK
  99642. CURSOR0_3_DMDATA_SW_CNTL__DMDATA_SW_UPDATED__SHIFT
  99643. CURSOR0_3_DMDATA_SW_DATA__DMDATA_SW_DATA_MASK
  99644. CURSOR0_3_DMDATA_SW_DATA__DMDATA_SW_DATA__SHIFT
  99645. CURSOR0_4_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99646. CURSOR0_4_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99647. CURSOR0_4_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99648. CURSOR0_4_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99649. CURSOR0_4_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99650. CURSOR0_4_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99651. CURSOR0_4_CURSOR_CONTROL__CURSOR_MODE_MASK
  99652. CURSOR0_4_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99653. CURSOR0_4_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99654. CURSOR0_4_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99655. CURSOR0_4_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99656. CURSOR0_4_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99657. CURSOR0_4_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99658. CURSOR0_4_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99659. CURSOR0_4_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99660. CURSOR0_4_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99661. CURSOR0_4_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99662. CURSOR0_4_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99663. CURSOR0_4_CURSOR_CONTROL__CURSOR_TMZ_MASK
  99664. CURSOR0_4_CURSOR_CONTROL__CURSOR_TMZ__SHIFT
  99665. CURSOR0_4_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99666. CURSOR0_4_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99667. CURSOR0_4_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99668. CURSOR0_4_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99669. CURSOR0_4_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99670. CURSOR0_4_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99671. CURSOR0_4_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99672. CURSOR0_4_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99673. CURSOR0_4_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99674. CURSOR0_4_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99675. CURSOR0_4_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99676. CURSOR0_4_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99677. CURSOR0_4_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99678. CURSOR0_4_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99679. CURSOR0_4_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99680. CURSOR0_4_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99681. CURSOR0_4_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99682. CURSOR0_4_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99683. CURSOR0_4_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99684. CURSOR0_4_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99685. CURSOR0_4_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99686. CURSOR0_4_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99687. CURSOR0_4_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99688. CURSOR0_4_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99689. CURSOR0_4_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99690. CURSOR0_4_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99691. CURSOR0_4_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99692. CURSOR0_4_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99693. CURSOR0_4_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99694. CURSOR0_4_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99695. CURSOR0_4_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99696. CURSOR0_4_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99697. CURSOR0_4_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99698. CURSOR0_4_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99699. CURSOR0_4_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH_MASK
  99700. CURSOR0_4_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH__SHIFT
  99701. CURSOR0_4_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP_MASK
  99702. CURSOR0_4_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP__SHIFT
  99703. CURSOR0_4_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM_MASK
  99704. CURSOR0_4_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM__SHIFT
  99705. CURSOR0_4_DMDATA_ADDRESS_HIGH__DMDATA_TMZ_MASK
  99706. CURSOR0_4_DMDATA_ADDRESS_HIGH__DMDATA_TMZ__SHIFT
  99707. CURSOR0_4_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW_MASK
  99708. CURSOR0_4_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW__SHIFT
  99709. CURSOR0_4_DMDATA_CNTL__DMDATA_MODE_MASK
  99710. CURSOR0_4_DMDATA_CNTL__DMDATA_MODE__SHIFT
  99711. CURSOR0_4_DMDATA_CNTL__DMDATA_REPEAT_MASK
  99712. CURSOR0_4_DMDATA_CNTL__DMDATA_REPEAT__SHIFT
  99713. CURSOR0_4_DMDATA_CNTL__DMDATA_SIZE_MASK
  99714. CURSOR0_4_DMDATA_CNTL__DMDATA_SIZE__SHIFT
  99715. CURSOR0_4_DMDATA_CNTL__DMDATA_UPDATED_MASK
  99716. CURSOR0_4_DMDATA_CNTL__DMDATA_UPDATED__SHIFT
  99717. CURSOR0_4_DMDATA_QOS_CNTL__DMDATA_DL_DELTA_MASK
  99718. CURSOR0_4_DMDATA_QOS_CNTL__DMDATA_DL_DELTA__SHIFT
  99719. CURSOR0_4_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL_MASK
  99720. CURSOR0_4_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL__SHIFT
  99721. CURSOR0_4_DMDATA_QOS_CNTL__DMDATA_QOS_MODE_MASK
  99722. CURSOR0_4_DMDATA_QOS_CNTL__DMDATA_QOS_MODE__SHIFT
  99723. CURSOR0_4_DMDATA_STATUS__DMDATA_DONE_MASK
  99724. CURSOR0_4_DMDATA_STATUS__DMDATA_DONE__SHIFT
  99725. CURSOR0_4_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR_MASK
  99726. CURSOR0_4_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR__SHIFT
  99727. CURSOR0_4_DMDATA_STATUS__DMDATA_UNDERFLOW_MASK
  99728. CURSOR0_4_DMDATA_STATUS__DMDATA_UNDERFLOW__SHIFT
  99729. CURSOR0_4_DMDATA_SW_CNTL__DMDATA_SW_REPEAT_MASK
  99730. CURSOR0_4_DMDATA_SW_CNTL__DMDATA_SW_REPEAT__SHIFT
  99731. CURSOR0_4_DMDATA_SW_CNTL__DMDATA_SW_SIZE_MASK
  99732. CURSOR0_4_DMDATA_SW_CNTL__DMDATA_SW_SIZE__SHIFT
  99733. CURSOR0_4_DMDATA_SW_CNTL__DMDATA_SW_UPDATED_MASK
  99734. CURSOR0_4_DMDATA_SW_CNTL__DMDATA_SW_UPDATED__SHIFT
  99735. CURSOR0_4_DMDATA_SW_DATA__DMDATA_SW_DATA_MASK
  99736. CURSOR0_4_DMDATA_SW_DATA__DMDATA_SW_DATA__SHIFT
  99737. CURSOR0_5_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99738. CURSOR0_5_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99739. CURSOR0_5_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99740. CURSOR0_5_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99741. CURSOR0_5_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99742. CURSOR0_5_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99743. CURSOR0_5_CURSOR_CONTROL__CURSOR_MODE_MASK
  99744. CURSOR0_5_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99745. CURSOR0_5_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99746. CURSOR0_5_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99747. CURSOR0_5_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99748. CURSOR0_5_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99749. CURSOR0_5_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99750. CURSOR0_5_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99751. CURSOR0_5_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99752. CURSOR0_5_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99753. CURSOR0_5_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99754. CURSOR0_5_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99755. CURSOR0_5_CURSOR_CONTROL__CURSOR_TMZ_MASK
  99756. CURSOR0_5_CURSOR_CONTROL__CURSOR_TMZ__SHIFT
  99757. CURSOR0_5_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99758. CURSOR0_5_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99759. CURSOR0_5_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99760. CURSOR0_5_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99761. CURSOR0_5_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99762. CURSOR0_5_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99763. CURSOR0_5_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99764. CURSOR0_5_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99765. CURSOR0_5_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99766. CURSOR0_5_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99767. CURSOR0_5_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99768. CURSOR0_5_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99769. CURSOR0_5_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99770. CURSOR0_5_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99771. CURSOR0_5_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99772. CURSOR0_5_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99773. CURSOR0_5_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99774. CURSOR0_5_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99775. CURSOR0_5_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99776. CURSOR0_5_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99777. CURSOR0_5_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99778. CURSOR0_5_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99779. CURSOR0_5_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99780. CURSOR0_5_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99781. CURSOR0_5_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99782. CURSOR0_5_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99783. CURSOR0_5_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99784. CURSOR0_5_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99785. CURSOR0_5_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99786. CURSOR0_5_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99787. CURSOR0_5_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99788. CURSOR0_5_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99789. CURSOR0_5_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99790. CURSOR0_5_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99791. CURSOR0_5_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH_MASK
  99792. CURSOR0_5_DMDATA_ADDRESS_HIGH__DMDATA_ADDRESS_HIGH__SHIFT
  99793. CURSOR0_5_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP_MASK
  99794. CURSOR0_5_DMDATA_ADDRESS_HIGH__DMDATA_SNOOP__SHIFT
  99795. CURSOR0_5_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM_MASK
  99796. CURSOR0_5_DMDATA_ADDRESS_HIGH__DMDATA_SYSTEM__SHIFT
  99797. CURSOR0_5_DMDATA_ADDRESS_HIGH__DMDATA_TMZ_MASK
  99798. CURSOR0_5_DMDATA_ADDRESS_HIGH__DMDATA_TMZ__SHIFT
  99799. CURSOR0_5_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW_MASK
  99800. CURSOR0_5_DMDATA_ADDRESS_LOW__DMDATA_ADDRESS_LOW__SHIFT
  99801. CURSOR0_5_DMDATA_CNTL__DMDATA_MODE_MASK
  99802. CURSOR0_5_DMDATA_CNTL__DMDATA_MODE__SHIFT
  99803. CURSOR0_5_DMDATA_CNTL__DMDATA_REPEAT_MASK
  99804. CURSOR0_5_DMDATA_CNTL__DMDATA_REPEAT__SHIFT
  99805. CURSOR0_5_DMDATA_CNTL__DMDATA_SIZE_MASK
  99806. CURSOR0_5_DMDATA_CNTL__DMDATA_SIZE__SHIFT
  99807. CURSOR0_5_DMDATA_CNTL__DMDATA_UPDATED_MASK
  99808. CURSOR0_5_DMDATA_CNTL__DMDATA_UPDATED__SHIFT
  99809. CURSOR0_5_DMDATA_QOS_CNTL__DMDATA_DL_DELTA_MASK
  99810. CURSOR0_5_DMDATA_QOS_CNTL__DMDATA_DL_DELTA__SHIFT
  99811. CURSOR0_5_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL_MASK
  99812. CURSOR0_5_DMDATA_QOS_CNTL__DMDATA_QOS_LEVEL__SHIFT
  99813. CURSOR0_5_DMDATA_QOS_CNTL__DMDATA_QOS_MODE_MASK
  99814. CURSOR0_5_DMDATA_QOS_CNTL__DMDATA_QOS_MODE__SHIFT
  99815. CURSOR0_5_DMDATA_STATUS__DMDATA_DONE_MASK
  99816. CURSOR0_5_DMDATA_STATUS__DMDATA_DONE__SHIFT
  99817. CURSOR0_5_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR_MASK
  99818. CURSOR0_5_DMDATA_STATUS__DMDATA_UNDERFLOW_CLEAR__SHIFT
  99819. CURSOR0_5_DMDATA_STATUS__DMDATA_UNDERFLOW_MASK
  99820. CURSOR0_5_DMDATA_STATUS__DMDATA_UNDERFLOW__SHIFT
  99821. CURSOR0_5_DMDATA_SW_CNTL__DMDATA_SW_REPEAT_MASK
  99822. CURSOR0_5_DMDATA_SW_CNTL__DMDATA_SW_REPEAT__SHIFT
  99823. CURSOR0_5_DMDATA_SW_CNTL__DMDATA_SW_SIZE_MASK
  99824. CURSOR0_5_DMDATA_SW_CNTL__DMDATA_SW_SIZE__SHIFT
  99825. CURSOR0_5_DMDATA_SW_CNTL__DMDATA_SW_UPDATED_MASK
  99826. CURSOR0_5_DMDATA_SW_CNTL__DMDATA_SW_UPDATED__SHIFT
  99827. CURSOR0_5_DMDATA_SW_DATA__DMDATA_SW_DATA_MASK
  99828. CURSOR0_5_DMDATA_SW_DATA__DMDATA_SW_DATA__SHIFT
  99829. CURSOR0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99830. CURSOR0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99831. CURSOR0_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99832. CURSOR0_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99833. CURSOR0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99834. CURSOR0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99835. CURSOR0_CURSOR_CONTROL__CURSOR_MODE_MASK
  99836. CURSOR0_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99837. CURSOR0_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99838. CURSOR0_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99839. CURSOR0_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99840. CURSOR0_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99841. CURSOR0_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99842. CURSOR0_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99843. CURSOR0_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99844. CURSOR0_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99845. CURSOR0_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99846. CURSOR0_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99847. CURSOR0_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99848. CURSOR0_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99849. CURSOR0_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99850. CURSOR0_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99851. CURSOR0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99852. CURSOR0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99853. CURSOR0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99854. CURSOR0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99855. CURSOR0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99856. CURSOR0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99857. CURSOR0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99858. CURSOR0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99859. CURSOR0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99860. CURSOR0_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99861. CURSOR0_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99862. CURSOR0_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99863. CURSOR0_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99864. CURSOR0_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99865. CURSOR0_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99866. CURSOR0_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99867. CURSOR0_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99868. CURSOR0_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99869. CURSOR0_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99870. CURSOR0_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99871. CURSOR0_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99872. CURSOR0_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99873. CURSOR0_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99874. CURSOR0_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99875. CURSOR0_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99876. CURSOR0_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99877. CURSOR0_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99878. CURSOR0_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99879. CURSOR0_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99880. CURSOR0_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99881. CURSOR1_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99882. CURSOR1_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99883. CURSOR1_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99884. CURSOR1_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99885. CURSOR1_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99886. CURSOR1_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99887. CURSOR1_CURSOR_CONTROL__CURSOR_MODE_MASK
  99888. CURSOR1_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99889. CURSOR1_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99890. CURSOR1_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99891. CURSOR1_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99892. CURSOR1_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99893. CURSOR1_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99894. CURSOR1_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99895. CURSOR1_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99896. CURSOR1_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99897. CURSOR1_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99898. CURSOR1_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99899. CURSOR1_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99900. CURSOR1_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99901. CURSOR1_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99902. CURSOR1_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99903. CURSOR1_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99904. CURSOR1_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99905. CURSOR1_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99906. CURSOR1_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99907. CURSOR1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99908. CURSOR1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99909. CURSOR1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99910. CURSOR1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99911. CURSOR1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99912. CURSOR1_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99913. CURSOR1_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99914. CURSOR1_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99915. CURSOR1_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99916. CURSOR1_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99917. CURSOR1_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99918. CURSOR1_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99919. CURSOR1_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99920. CURSOR1_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99921. CURSOR1_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99922. CURSOR1_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99923. CURSOR1_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99924. CURSOR1_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99925. CURSOR1_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99926. CURSOR1_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99927. CURSOR1_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99928. CURSOR1_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99929. CURSOR1_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99930. CURSOR1_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99931. CURSOR1_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99932. CURSOR1_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99933. CURSOR2_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99934. CURSOR2_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99935. CURSOR2_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99936. CURSOR2_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99937. CURSOR2_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99938. CURSOR2_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99939. CURSOR2_CURSOR_CONTROL__CURSOR_MODE_MASK
  99940. CURSOR2_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99941. CURSOR2_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99942. CURSOR2_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99943. CURSOR2_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99944. CURSOR2_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99945. CURSOR2_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99946. CURSOR2_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99947. CURSOR2_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  99948. CURSOR2_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  99949. CURSOR2_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  99950. CURSOR2_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  99951. CURSOR2_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  99952. CURSOR2_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  99953. CURSOR2_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  99954. CURSOR2_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  99955. CURSOR2_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  99956. CURSOR2_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  99957. CURSOR2_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  99958. CURSOR2_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  99959. CURSOR2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  99960. CURSOR2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  99961. CURSOR2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  99962. CURSOR2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  99963. CURSOR2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  99964. CURSOR2_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  99965. CURSOR2_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  99966. CURSOR2_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  99967. CURSOR2_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  99968. CURSOR2_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  99969. CURSOR2_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  99970. CURSOR2_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  99971. CURSOR2_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  99972. CURSOR2_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  99973. CURSOR2_CURSOR_SIZE__CURSOR_WIDTH_MASK
  99974. CURSOR2_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  99975. CURSOR2_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  99976. CURSOR2_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  99977. CURSOR2_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  99978. CURSOR2_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  99979. CURSOR2_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  99980. CURSOR2_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  99981. CURSOR2_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  99982. CURSOR2_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  99983. CURSOR2_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  99984. CURSOR2_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  99985. CURSOR3_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  99986. CURSOR3_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  99987. CURSOR3_CURSOR_CONTROL__CURSOR_ENABLE_MASK
  99988. CURSOR3_CURSOR_CONTROL__CURSOR_ENABLE__SHIFT
  99989. CURSOR3_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK_MASK
  99990. CURSOR3_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK__SHIFT
  99991. CURSOR3_CURSOR_CONTROL__CURSOR_MODE_MASK
  99992. CURSOR3_CURSOR_CONTROL__CURSOR_MODE__SHIFT
  99993. CURSOR3_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN_MASK
  99994. CURSOR3_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_EN__SHIFT
  99995. CURSOR3_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL_MASK
  99996. CURSOR3_CURSOR_CONTROL__CURSOR_PERFMON_LATENCY_MEASURE_SEL__SHIFT
  99997. CURSOR3_CURSOR_CONTROL__CURSOR_PITCH_MASK
  99998. CURSOR3_CURSOR_CONTROL__CURSOR_PITCH__SHIFT
  99999. CURSOR3_CURSOR_CONTROL__CURSOR_SNOOP_MASK
  100000. CURSOR3_CURSOR_CONTROL__CURSOR_SNOOP__SHIFT
  100001. CURSOR3_CURSOR_CONTROL__CURSOR_SYSTEM_MASK
  100002. CURSOR3_CURSOR_CONTROL__CURSOR_SYSTEM__SHIFT
  100003. CURSOR3_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_MASK
  100004. CURSOR3_CURSOR_CONTROL__CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS__SHIFT
  100005. CURSOR3_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET_MASK
  100006. CURSOR3_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET__SHIFT
  100007. CURSOR3_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  100008. CURSOR3_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  100009. CURSOR3_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  100010. CURSOR3_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  100011. CURSOR3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS_MASK
  100012. CURSOR3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_DIS__SHIFT
  100013. CURSOR3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE_MASK
  100014. CURSOR3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_FORCE__SHIFT
  100015. CURSOR3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE_MASK
  100016. CURSOR3_CURSOR_MEM_PWR_CTRL__CROB_MEM_PWR_LS_MODE__SHIFT
  100017. CURSOR3_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE_MASK
  100018. CURSOR3_CURSOR_MEM_PWR_STATUS__CROB_MEM_PWR_STATE__SHIFT
  100019. CURSOR3_CURSOR_POSITION__CURSOR_X_POSITION_MASK
  100020. CURSOR3_CURSOR_POSITION__CURSOR_X_POSITION__SHIFT
  100021. CURSOR3_CURSOR_POSITION__CURSOR_Y_POSITION_MASK
  100022. CURSOR3_CURSOR_POSITION__CURSOR_Y_POSITION__SHIFT
  100023. CURSOR3_CURSOR_SIZE__CURSOR_HEIGHT_MASK
  100024. CURSOR3_CURSOR_SIZE__CURSOR_HEIGHT__SHIFT
  100025. CURSOR3_CURSOR_SIZE__CURSOR_WIDTH_MASK
  100026. CURSOR3_CURSOR_SIZE__CURSOR_WIDTH__SHIFT
  100027. CURSOR3_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  100028. CURSOR3_CURSOR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  100029. CURSOR3_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  100030. CURSOR3_CURSOR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  100031. CURSOR3_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  100032. CURSOR3_CURSOR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  100033. CURSOR3_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  100034. CURSOR3_CURSOR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  100035. CURSOR3_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  100036. CURSOR3_CURSOR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  100037. CURSORA_INVALID_GTT_INT_EN
  100038. CURSORA_INVALID_GTT_STATUS
  100039. CURSORB_INVALID_GTT_INT_EN
  100040. CURSORB_INVALID_GTT_STATUS
  100041. CURSORC_INVALID_GTT_INT_EN
  100042. CURSORC_INVALID_GTT_STATUS
  100043. CURSOR_24_1
  100044. CURSOR_24_8_PRE_MULT
  100045. CURSOR_24_8_UNPRE_MULT
  100046. CURSOR_2X_MAGNIFY
  100047. CURSOR_2X_MAGNIFY_IS_DISABLE
  100048. CURSOR_2X_MAGNIFY_IS_ENABLE
  100049. CURSOR_ACT_REQ
  100050. CURSOR_ALPHA
  100051. CURSOR_ALPHA_CONST
  100052. CURSOR_ALPHA_PER_PIXEL
  100053. CURSOR_ARGB
  100054. CURSOR_ARGB_PIXEL_SIZE
  100055. CURSOR_A_BASEADDR
  100056. CURSOR_A_CONTROL
  100057. CURSOR_A_FIFO_WM_MASK
  100058. CURSOR_A_FIFO_WM_SHIFT
  100059. CURSOR_A_OFFSET
  100060. CURSOR_A_PALETTE0
  100061. CURSOR_A_PALETTE1
  100062. CURSOR_A_PALETTE2
  100063. CURSOR_A_PALETTE3
  100064. CURSOR_A_POSITION
  100065. CURSOR_BASEADDR_HI
  100066. CURSOR_BASEADDR_LO
  100067. CURSOR_BASE_MASK
  100068. CURSOR_BLUE_SHIFT
  100069. CURSOR_B_BASEADDR
  100070. CURSOR_B_CONTROL
  100071. CURSOR_B_FIFO_WM1_SHIFT
  100072. CURSOR_B_FIFO_WM_MASK
  100073. CURSOR_B_FIFO_WM_SHIFT
  100074. CURSOR_B_OFFSET
  100075. CURSOR_B_PALETTE0
  100076. CURSOR_B_PALETTE1
  100077. CURSOR_B_PALETTE2
  100078. CURSOR_B_PALETTE3
  100079. CURSOR_B_POSITION
  100080. CURSOR_CLIP_DISPLAY
  100081. CURSOR_CLIP_WIN_A
  100082. CURSOR_CLIP_WIN_B
  100083. CURSOR_CLIP_WIN_C
  100084. CURSOR_CMAP
  100085. CURSOR_COEFF
  100086. CURSOR_COEFF_MASK
  100087. CURSOR_COLOR_24BIT_1BIT_AND
  100088. CURSOR_COLOR_24BIT_8BIT_ALPHA_PREMULT
  100089. CURSOR_COLOR_24BIT_8BIT_ALPHA_UNPREMULT
  100090. CURSOR_COLOR_64BIT_FP_PREMULT
  100091. CURSOR_COLOR_64BIT_FP_UNPREMULT
  100092. CURSOR_COLOR_MASK
  100093. CURSOR_COMPLETE
  100094. CURSOR_CONTROL
  100095. CURSOR_DATA_SIZE
  100096. CURSOR_DELAY
  100097. CURSOR_DEVICE_ID
  100098. CURSOR_DISABLE_MULTIPLE_UPDATE
  100099. CURSOR_DRAW_DELAY
  100100. CURSOR_DST_BLEND_K1
  100101. CURSOR_DST_BLEND_MASK
  100102. CURSOR_DST_BLEND_NEG_K1_TIMES_SRC
  100103. CURSOR_DST_BLEND_ZERO
  100104. CURSOR_EN
  100105. CURSOR_ENABLE
  100106. CURSOR_ENABLE_MASK
  100107. CURSOR_FIFO_SR_WM1_SHIFT
  100108. CURSOR_FMT_ARGB1555
  100109. CURSOR_FMT_ARGB4444
  100110. CURSOR_FMT_ARGB8888
  100111. CURSOR_FOLLOWS_DISP
  100112. CURSOR_FORCE_MC_ON
  100113. CURSOR_FORMAT_2C
  100114. CURSOR_FORMAT_3C
  100115. CURSOR_FORMAT_4C
  100116. CURSOR_FORMAT_ARGB
  100117. CURSOR_FORMAT_MASK
  100118. CURSOR_FORMAT_NUM
  100119. CURSOR_FORMAT_SHIFT
  100120. CURSOR_FORMAT_XRGB
  100121. CURSOR_GAMMA_ENABLE
  100122. CURSOR_GREEN_SHIFT
  100123. CURSOR_HEIGHT
  100124. CURSOR_HOTSPOT
  100125. CURSOR_IN_GUEST_PHYSICAL_ADDRESS
  100126. CURSOR_IN_SYSTEM_PHYSICAL_ADDRESS
  100127. CURSOR_IS_DISABLE
  100128. CURSOR_IS_ENABLE
  100129. CURSOR_IS_NOT_SNOOP
  100130. CURSOR_IS_SNOOP
  100131. CURSOR_LINES_PER_CHUNK
  100132. CURSOR_LINE_PER_CHUNK_1
  100133. CURSOR_LINE_PER_CHUNK_16
  100134. CURSOR_LINE_PER_CHUNK_2
  100135. CURSOR_LINE_PER_CHUNK_4
  100136. CURSOR_LINE_PER_CHUNK_8
  100137. CURSOR_MASK
  100138. CURSOR_MAX_SIZE
  100139. CURSOR_MAX_X
  100140. CURSOR_MAX_Y
  100141. CURSOR_MEM_TYPE_LOCAL
  100142. CURSOR_MOBILE_GAMMA_ENABLE
  100143. CURSOR_MODE
  100144. CURSOR_MODE_128_1C
  100145. CURSOR_MODE_128_2C
  100146. CURSOR_MODE_32_4C_AX
  100147. CURSOR_MODE_4BPP
  100148. CURSOR_MODE_64_32B_AX
  100149. CURSOR_MODE_64_3C
  100150. CURSOR_MODE_64_4C
  100151. CURSOR_MODE_64_4C_AX
  100152. CURSOR_MODE_64_ARGB_AX
  100153. CURSOR_MODE_64_TRANS
  100154. CURSOR_MODE_64_XOR
  100155. CURSOR_MODE_COLOR_1BIT_AND
  100156. CURSOR_MODE_COLOR_64BIT_FP_PRE_MULTIPLIED
  100157. CURSOR_MODE_COLOR_64BIT_FP_UN_PRE_MULTIPLIED
  100158. CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA
  100159. CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA
  100160. CURSOR_MODE_DISABLE
  100161. CURSOR_MODE_LEGACY
  100162. CURSOR_MODE_MASK
  100163. CURSOR_MODE_MONO
  100164. CURSOR_MODE_NORMAL
  100165. CURSOR_MODE_OFF
  100166. CURSOR_MODE_RESERVED
  100167. CURSOR_MONO
  100168. CURSOR_MONO_2BIT
  100169. CURSOR_ORIGIN_DISPLAY
  100170. CURSOR_ORIGIN_SCREEN
  100171. CURSOR_PALETTE_MASK
  100172. CURSOR_PERFMON_LATENCY_MEASURE_CROB_LATENCY
  100173. CURSOR_PERFMON_LATENCY_MEASURE_EN
  100174. CURSOR_PERFMON_LATENCY_MEASURE_IS_DISABLED
  100175. CURSOR_PERFMON_LATENCY_MEASURE_IS_ENABLED
  100176. CURSOR_PERFMON_LATENCY_MEASURE_MC_LATENCY
  100177. CURSOR_PERFMON_LATENCY_MEASURE_SEL
  100178. CURSOR_PIPE_SELECT_SHIFT
  100179. CURSOR_PITCH
  100180. CURSOR_PITCH_128_PIXELS
  100181. CURSOR_PITCH_256_PIXELS
  100182. CURSOR_PITCH_64_PIXELS
  100183. CURSOR_PIXEL_COUNT
  100184. CURSOR_PIXMAP
  100185. CURSOR_PLANE
  100186. CURSOR_POS_MASK
  100187. CURSOR_POS_SIGN
  100188. CURSOR_RED_SHIFT
  100189. CURSOR_SIZE
  100190. CURSOR_SIZE_128x128
  100191. CURSOR_SIZE_256x256
  100192. CURSOR_SIZE_32x32
  100193. CURSOR_SIZE_64x64
  100194. CURSOR_SIZE_H_SHIFT
  100195. CURSOR_SIZE_MASK
  100196. CURSOR_SIZE_V_SHIFT
  100197. CURSOR_SNOOP
  100198. CURSOR_SRC_BLEND_K1
  100199. CURSOR_SRC_BLEND_K1_TIMES_SRC
  100200. CURSOR_SRC_BLEND_MASK
  100201. CURSOR_STEREO_EN
  100202. CURSOR_STEREO_IS_DISABLED
  100203. CURSOR_STEREO_IS_ENABLED
  100204. CURSOR_STRIDE
  100205. CURSOR_STRIDE_1K
  100206. CURSOR_STRIDE_256
  100207. CURSOR_STRIDE_2K
  100208. CURSOR_STRIDE_512
  100209. CURSOR_STRIDE_MASK
  100210. CURSOR_STRIDE_SHIFT
  100211. CURSOR_SURFACE_IS_NOT_TMZ
  100212. CURSOR_SURFACE_IS_TMZ
  100213. CURSOR_SURFACE_TMZ
  100214. CURSOR_SYSTEM
  100215. CURSOR_THRESHOLD
  100216. CURSOR_TIME
  100217. CURSOR_UPDATE
  100218. CURSOR_UPDATE_LOCK
  100219. CURSOR_UPDATE_PENDING
  100220. CURSOR_UPDATE_TAKEN
  100221. CURSOR_URGENT_1_2
  100222. CURSOR_URGENT_1_4
  100223. CURSOR_URGENT_1_8
  100224. CURSOR_URGENT_3_8
  100225. CURSOR_URGENT_ALWAYS
  100226. CURSOR_URGENT_CONTROL
  100227. CURSOR_WIDTH
  100228. CURSOR_X
  100229. CURSOR_XRGB
  100230. CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS
  100231. CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_0
  100232. CURSOR_XY_POSITION_ROTATION_AND_MIRRORING_BYPASS_1
  100233. CURSOR_X_HI
  100234. CURSOR_X_LO
  100235. CURSOR_X_NEG
  100236. CURSOR_X_POS
  100237. CURSOR_X_SHIFT
  100238. CURSOR_Y
  100239. CURSOR_Y_HI
  100240. CURSOR_Y_LO
  100241. CURSOR_Y_NEG
  100242. CURSOR_Y_POS
  100243. CURSOR_Y_SHIFT
  100244. CURSURFLIVE
  100245. CURSXHI
  100246. CURSXLO
  100247. CURSYHI
  100248. CURSYLO
  100249. CURS_CTL
  100250. CURS_H_PRESET
  100251. CURS_H_START
  100252. CURS_MACROS
  100253. CURS_MEM_START
  100254. CURS_PAL_REG
  100255. CURS_PAT_REG
  100256. CURS_POS_REG
  100257. CURS_SLOTS
  100258. CURS_TOGGLE
  100259. CURS_V_PRESET
  100260. CURS_V_START
  100261. CURVE
  100262. CUR_ADDRS_PER_INODE
  100263. CUR_AWE
  100264. CUR_AWS
  100265. CUR_BLINK
  100266. CUR_BLOCK
  100267. CUR_BUF_CFG
  100268. CUR_CLAMP_DIS
  100269. CUR_CLAMP_EN
  100270. CUR_CLR0
  100271. CUR_CLR1
  100272. CUR_CML
  100273. CUR_COLOR1__CUR_COLOR1_BLUE_MASK
  100274. CUR_COLOR1__CUR_COLOR1_BLUE__SHIFT
  100275. CUR_COLOR1__CUR_COLOR1_GREEN_MASK
  100276. CUR_COLOR1__CUR_COLOR1_GREEN__SHIFT
  100277. CUR_COLOR1__CUR_COLOR1_RED_MASK
  100278. CUR_COLOR1__CUR_COLOR1_RED__SHIFT
  100279. CUR_COLOR2__CUR_COLOR2_BLUE_MASK
  100280. CUR_COLOR2__CUR_COLOR2_BLUE__SHIFT
  100281. CUR_COLOR2__CUR_COLOR2_GREEN_MASK
  100282. CUR_COLOR2__CUR_COLOR2_GREEN__SHIFT
  100283. CUR_COLOR2__CUR_COLOR2_RED_MASK
  100284. CUR_COLOR2__CUR_COLOR2_RED__SHIFT
  100285. CUR_CONTROL__CURSOR_2X_MAGNIFY_MASK
  100286. CUR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT
  100287. CUR_CONTROL__CURSOR_BUSY_START_LINE_POSITION_MASK
  100288. CUR_CONTROL__CURSOR_BUSY_START_LINE_POSITION__SHIFT
  100289. CUR_CONTROL__CURSOR_EN_MASK
  100290. CUR_CONTROL__CURSOR_EN__SHIFT
  100291. CUR_CONTROL__CURSOR_FORCE_MC_ON_MASK
  100292. CUR_CONTROL__CURSOR_FORCE_MC_ON__SHIFT
  100293. CUR_CONTROL__CURSOR_MODE_MASK
  100294. CUR_CONTROL__CURSOR_MODE__SHIFT
  100295. CUR_CONTROL__CURSOR_URGENT_CONTROL_MASK
  100296. CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT
  100297. CUR_CONTROL__CUR_INV_TRANS_CLAMP_MASK
  100298. CUR_CONTROL__CUR_INV_TRANS_CLAMP__SHIFT
  100299. CUR_CTL
  100300. CUR_CTL_CLUT_UPDATE
  100301. CUR_DEF
  100302. CUR_DEFAULT
  100303. CUR_DEV_MODE_9116
  100304. CUR_DIS
  100305. CUR_DIV
  100306. CUR_DRV_CAL_SEL
  100307. CUR_DYNAMIC_EXPANSION
  100308. CUR_EN
  100309. CUR_ENABLE
  100310. CUR_ERR
  100311. CUR_EXPAND_MODE
  100312. CUR_FBC_CTL
  100313. CUR_FBC_CTL_EN
  100314. CUR_FP_NO_ROM
  100315. CUR_FP_USE_ROM
  100316. CUR_HORZ_VERT_OFF
  100317. CUR_HORZ_VERT_POSN
  100318. CUR_HOT_SPOT__CURSOR_HOT_SPOT_X_MASK
  100319. CUR_HOT_SPOT__CURSOR_HOT_SPOT_X__SHIFT
  100320. CUR_HOT_SPOT__CURSOR_HOT_SPOT_Y_MASK
  100321. CUR_HOT_SPOT__CURSOR_HOT_SPOT_Y__SHIFT
  100322. CUR_HWMASK
  100323. CUR_INV_CLAMP
  100324. CUR_LOCK
  100325. CUR_LOWER_HALF
  100326. CUR_LOWER_THIRD
  100327. CUR_MEM_ADDR
  100328. CUR_MODE
  100329. CUR_NONE
  100330. CUR_NOTIFY_SIZE
  100331. CUR_NOT_PENDING
  100332. CUR_OFFSET
  100333. CUR_ON
  100334. CUR_PENDING
  100335. CUR_PML
  100336. CUR_PMP
  100337. CUR_POSITION__CURSOR_X_POSITION_MASK
  100338. CUR_POSITION__CURSOR_X_POSITION__SHIFT
  100339. CUR_POSITION__CURSOR_Y_POSITION_MASK
  100340. CUR_POSITION__CURSOR_Y_POSITION__SHIFT
  100341. CUR_REQUEST_FILTER_CNTL__CUR_REQUEST_FILTER_DIS_MASK
  100342. CUR_REQUEST_FILTER_CNTL__CUR_REQUEST_FILTER_DIS__SHIFT
  100343. CUR_ROM_EN
  100344. CUR_SIZE
  100345. CUR_SIZE__CURSOR_HEIGHT_MASK
  100346. CUR_SIZE__CURSOR_HEIGHT__SHIFT
  100347. CUR_SIZE__CURSOR_WIDTH_MASK
  100348. CUR_SIZE__CURSOR_WIDTH__SHIFT
  100349. CUR_STACK_SIZE
  100350. CUR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET_MASK
  100351. CUR_STEREO_CONTROL__CURSOR_PRIMARY_OFFSET__SHIFT
  100352. CUR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET_MASK
  100353. CUR_STEREO_CONTROL__CURSOR_SECONDARY_OFFSET__SHIFT
  100354. CUR_STEREO_CONTROL__CURSOR_STEREO_EN_MASK
  100355. CUR_STEREO_CONTROL__CURSOR_STEREO_EN__SHIFT
  100356. CUR_STEREO_CONTROL__CURSOR_STEREO_OFFSET_YNX_MASK
  100357. CUR_STEREO_CONTROL__CURSOR_STEREO_OFFSET_YNX__SHIFT
  100358. CUR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH_MASK
  100359. CUR_SURFACE_ADDRESS_HIGH__CURSOR_SURFACE_ADDRESS_HIGH__SHIFT
  100360. CUR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS_MASK
  100361. CUR_SURFACE_ADDRESS__CURSOR_SURFACE_ADDRESS__SHIFT
  100362. CUR_SWMASK
  100363. CUR_TWO_THIRDS
  100364. CUR_UNDERLINE
  100365. CUR_UPDATE__CURSOR_DISABLE_MULTIPLE_UPDATE_MASK
  100366. CUR_UPDATE__CURSOR_DISABLE_MULTIPLE_UPDATE__SHIFT
  100367. CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK
  100368. CUR_UPDATE__CURSOR_UPDATE_LOCK__SHIFT
  100369. CUR_UPDATE__CURSOR_UPDATE_PENDING_MASK
  100370. CUR_UPDATE__CURSOR_UPDATE_PENDING__SHIFT
  100371. CUR_UPDATE__CURSOR_UPDATE_STEREO_MODE_MASK
  100372. CUR_UPDATE__CURSOR_UPDATE_STEREO_MODE__SHIFT
  100373. CUR_UPDATE__CURSOR_UPDATE_TAKEN_MASK
  100374. CUR_UPDATE__CURSOR_UPDATE_TAKEN__SHIFT
  100375. CUR_VPO
  100376. CUR_VUPDATE_LOCK_SET0__CUR_VUPDATE_LOCK_SET_MASK
  100377. CUR_VUPDATE_LOCK_SET0__CUR_VUPDATE_LOCK_SET__SHIFT
  100378. CUR_VUPDATE_LOCK_SET1__CUR_VUPDATE_LOCK_SET_MASK
  100379. CUR_VUPDATE_LOCK_SET1__CUR_VUPDATE_LOCK_SET__SHIFT
  100380. CUR_VUPDATE_LOCK_SET2__CUR_VUPDATE_LOCK_SET_MASK
  100381. CUR_VUPDATE_LOCK_SET2__CUR_VUPDATE_LOCK_SET__SHIFT
  100382. CUR_VUPDATE_LOCK_SET3__CUR_VUPDATE_LOCK_SET_MASK
  100383. CUR_VUPDATE_LOCK_SET3__CUR_VUPDATE_LOCK_SET__SHIFT
  100384. CUR_VUPDATE_LOCK_SET4__CUR_VUPDATE_LOCK_SET_MASK
  100385. CUR_VUPDATE_LOCK_SET4__CUR_VUPDATE_LOCK_SET__SHIFT
  100386. CUR_VUPDATE_LOCK_SET5__CUR_VUPDATE_LOCK_SET_MASK
  100387. CUR_VUPDATE_LOCK_SET5__CUR_VUPDATE_LOCK_SET__SHIFT
  100388. CUR_WM
  100389. CUR_WM_TRANS
  100390. CUR_YES_PENDING
  100391. CUR_ZERO_EXPANSION
  100392. CUSE_CONNTBL_LEN
  100393. CUSE_INIT
  100394. CUSE_INIT_BSWAP_RESERVED
  100395. CUSE_INIT_INFO_MAX
  100396. CUSE_MINOR
  100397. CUSE_UNRESTRICTED_IOCTL
  100398. CUSTOM
  100399. CUSTOMER_HP_1
  100400. CUSTOMER_KEY
  100401. CUSTOMER_NORMAL
  100402. CUSTOM_DPM_SETTING_CCLK
  100403. CUSTOM_DPM_SETTING_COUNT
  100404. CUSTOM_DPM_SETTING_FCLK_CCX
  100405. CUSTOM_DPM_SETTING_FCLK_GFX
  100406. CUSTOM_DPM_SETTING_FCLK_STALLS
  100407. CUSTOM_DPM_SETTING_GFXCLK
  100408. CUSTOM_DPM_SETTING_LCLK
  100409. CUSTOM_DPM_SETTING_e
  100410. CUSTOM_DV_TIMINGS
  100411. CUSTOM_ERROR
  100412. CUSTOM_FLOAT_H_
  100413. CUSTOM_INHERIT1
  100414. CUSTOM_INHERIT2
  100415. CUSTOM_LISTENER
  100416. CUSTOM_MACRO_CNTL
  100417. CUSTOM_OFS
  100418. CUSTOM_PHYSADDR
  100419. CUSTOM_REG
  100420. CUSTOM_SPI_CLK_HI
  100421. CUSTOM_SPI_CLK_LO
  100422. CUSTOM_SPI_CS_HI
  100423. CUSTOM_SPI_CS_HOLD
  100424. CUSTOM_SPI_CS_SETUP
  100425. CUTOFF_CACHE_ADD
  100426. CUTOFF_CACHE_READA
  100427. CUTOFF_WRITEBACK
  100428. CUTOFF_WRITEBACK_MAX
  100429. CUTOFF_WRITEBACK_SYNC
  100430. CUTOFF_WRITEBACK_SYNC_MAX
  100431. CUT_ACER1280
  100432. CUT_AOP8060
  100433. CUT_ASUSA2H_1
  100434. CUT_ASUSA2H_2
  100435. CUT_ASUSL3000D
  100436. CUT_BARCO1024
  100437. CUT_BARCO1366
  100438. CUT_CLEVO1024
  100439. CUT_CLEVO10242
  100440. CUT_CLEVO1400
  100441. CUT_CLEVO14002
  100442. CUT_COMPAL1400_1
  100443. CUT_COMPAL1400_2
  100444. CUT_COMPAQ1280
  100445. CUT_COMPAQ12802
  100446. CUT_FORCENONE
  100447. CUT_HERE
  100448. CUT_NONE
  100449. CUT_PANEL848
  100450. CUT_PANEL856
  100451. CUT_THRU_EN
  100452. CUT_UNIWILL1024
  100453. CUT_UNIWILL10242
  100454. CUT_UNKNOWNLCD
  100455. CUT_VERSION_MASK
  100456. CU_040
  100457. CU_ACTIVE
  100458. CU_BG_COLOR
  100459. CU_CTRL_COPROC
  100460. CU_INPUT0_CONTROL
  100461. CU_INPUT0_OFFSET
  100462. CU_INPUT0_SIZE
  100463. CU_INPUT1_CONTROL
  100464. CU_INPUT1_OFFSET
  100465. CU_INPUT1_SIZE
  100466. CU_INPUT2_CONTROL
  100467. CU_INPUT2_OFFSET
  100468. CU_INPUT2_SIZE
  100469. CU_INPUT3_CONTROL
  100470. CU_INPUT3_OFFSET
  100471. CU_INPUT3_SIZE
  100472. CU_INPUT4_CONTROL
  100473. CU_INPUT4_OFFSET
  100474. CU_INPUT4_SIZE
  100475. CU_INPUT_CTRL_ALPHA
  100476. CU_INPUT_CTRL_EN
  100477. CU_INPUT_CTRL_PAD
  100478. CU_INPUT_CTRL_PMUL
  100479. CU_IRQ_ERR
  100480. CU_IRQ_OVR
  100481. CU_NUM_INPUT_IDS
  100482. CU_NUM_OUTPUT_IDS
  100483. CU_PER_INPUT_REGS
  100484. CU_POWER__CU0_POWER_MASK
  100485. CU_POWER__CU0_POWER__SHIFT
  100486. CU_POWER__CU1_POWER_MASK
  100487. CU_POWER__CU1_POWER__SHIFT
  100488. CU_STATUS
  100489. CU_STATUS_ACTIVE
  100490. CU_STATUS_CFGE
  100491. CU_STATUS_CPE
  100492. CU_STATUS_ZME
  100493. CU_SUSPEND
  100494. CV1_OUTPUT_CONTROL_PARAMETERS
  100495. CV1_OUTPUT_CONTROL_PS_ALLOCATION
  100496. CVAL
  100497. CVAL_0DB
  100498. CVAL_18DB
  100499. CVAL_M10DB
  100500. CVAL_M110DB
  100501. CVAL_M18DB
  100502. CVAL_M21DB
  100503. CVAL_M99DB
  100504. CVAL_MAX
  100505. CVBS
  100506. CVBS_RGB_OUT
  100507. CVBS_YC_OUT
  100508. CVCF
  100509. CVCF_CURRENTFILTER
  100510. CVCF_CURRENTFILTER_MASK
  100511. CVCF_CURRENTVOL
  100512. CVCF_CURRENTVOL_MASK
  100513. CVEN
  100514. CVEN_MASK
  100515. CVIC_EN_REG
  100516. CVIC_TRIG_REG
  100517. CVID
  100518. CVID_MASK
  100519. CVISIONPPC_H
  100520. CVLAN_ETHERTYPE
  100521. CVMCTL_IPPCI
  100522. CVMCTL_IPPCI_SHIFT
  100523. CVMCTL_IPTI
  100524. CVMCTL_IPTI_SHIFT
  100525. CVMMEMCTL2_INHIBITTS
  100526. CVMSEG_BASE
  100527. CVMSEG_SIZE
  100528. CVMVMCONF_DGHT
  100529. CVMVMCONF_MMUSIZEM1
  100530. CVMVMCONF_MMUSIZEM1_S
  100531. CVMVMCONF_RMMUSIZEM1
  100532. CVMVMCONF_RMMUSIZEM1_S
  100533. CVMX_ADDR_DID
  100534. CVMX_ADDR_DIDSPACE
  100535. CVMX_ADD_IO_SEG
  100536. CVMX_ADD_SEG
  100537. CVMX_ADD_SEG32
  100538. CVMX_ADD_WIN_DMA
  100539. CVMX_ADD_WIN_DMA_ADD
  100540. CVMX_ADD_WIN_DMA_SENDDMA
  100541. CVMX_ADD_WIN_DMA_SENDIO
  100542. CVMX_ADD_WIN_DMA_SENDMEM
  100543. CVMX_ADD_WIN_DMA_SENDSINGLE
  100544. CVMX_ADD_WIN_SCR
  100545. CVMX_ADD_WIN_UNUSED
  100546. CVMX_ADD_WIN_UNUSED2
  100547. CVMX_AGL_GMX_BAD_REG
  100548. CVMX_AGL_GMX_BIST
  100549. CVMX_AGL_GMX_DRV_CTL
  100550. CVMX_AGL_GMX_INF_MODE
  100551. CVMX_AGL_GMX_PRTX_CFG
  100552. CVMX_AGL_GMX_RXX_ADR_CAM0
  100553. CVMX_AGL_GMX_RXX_ADR_CAM1
  100554. CVMX_AGL_GMX_RXX_ADR_CAM2
  100555. CVMX_AGL_GMX_RXX_ADR_CAM3
  100556. CVMX_AGL_GMX_RXX_ADR_CAM4
  100557. CVMX_AGL_GMX_RXX_ADR_CAM5
  100558. CVMX_AGL_GMX_RXX_ADR_CAM_EN
  100559. CVMX_AGL_GMX_RXX_ADR_CTL
  100560. CVMX_AGL_GMX_RXX_DECISION
  100561. CVMX_AGL_GMX_RXX_FRM_CHK
  100562. CVMX_AGL_GMX_RXX_FRM_CTL
  100563. CVMX_AGL_GMX_RXX_FRM_MAX
  100564. CVMX_AGL_GMX_RXX_FRM_MIN
  100565. CVMX_AGL_GMX_RXX_IFG
  100566. CVMX_AGL_GMX_RXX_INT_EN
  100567. CVMX_AGL_GMX_RXX_INT_REG
  100568. CVMX_AGL_GMX_RXX_JABBER
  100569. CVMX_AGL_GMX_RXX_PAUSE_DROP_TIME
  100570. CVMX_AGL_GMX_RXX_RX_INBND
  100571. CVMX_AGL_GMX_RXX_STATS_CTL
  100572. CVMX_AGL_GMX_RXX_STATS_OCTS
  100573. CVMX_AGL_GMX_RXX_STATS_OCTS_CTL
  100574. CVMX_AGL_GMX_RXX_STATS_OCTS_DMAC
  100575. CVMX_AGL_GMX_RXX_STATS_OCTS_DRP
  100576. CVMX_AGL_GMX_RXX_STATS_PKTS
  100577. CVMX_AGL_GMX_RXX_STATS_PKTS_BAD
  100578. CVMX_AGL_GMX_RXX_STATS_PKTS_CTL
  100579. CVMX_AGL_GMX_RXX_STATS_PKTS_DMAC
  100580. CVMX_AGL_GMX_RXX_STATS_PKTS_DRP
  100581. CVMX_AGL_GMX_RXX_UDD_SKP
  100582. CVMX_AGL_GMX_RX_BP_DROPX
  100583. CVMX_AGL_GMX_RX_BP_OFFX
  100584. CVMX_AGL_GMX_RX_BP_ONX
  100585. CVMX_AGL_GMX_RX_PRT_INFO
  100586. CVMX_AGL_GMX_RX_TX_STATUS
  100587. CVMX_AGL_GMX_SMACX
  100588. CVMX_AGL_GMX_STAT_BP
  100589. CVMX_AGL_GMX_TXX_APPEND
  100590. CVMX_AGL_GMX_TXX_CLK
  100591. CVMX_AGL_GMX_TXX_CTL
  100592. CVMX_AGL_GMX_TXX_MIN_PKT
  100593. CVMX_AGL_GMX_TXX_PAUSE_PKT_INTERVAL
  100594. CVMX_AGL_GMX_TXX_PAUSE_PKT_TIME
  100595. CVMX_AGL_GMX_TXX_PAUSE_TOGO
  100596. CVMX_AGL_GMX_TXX_PAUSE_ZERO
  100597. CVMX_AGL_GMX_TXX_SOFT_PAUSE
  100598. CVMX_AGL_GMX_TXX_STAT0
  100599. CVMX_AGL_GMX_TXX_STAT1
  100600. CVMX_AGL_GMX_TXX_STAT2
  100601. CVMX_AGL_GMX_TXX_STAT3
  100602. CVMX_AGL_GMX_TXX_STAT4
  100603. CVMX_AGL_GMX_TXX_STAT5
  100604. CVMX_AGL_GMX_TXX_STAT6
  100605. CVMX_AGL_GMX_TXX_STAT7
  100606. CVMX_AGL_GMX_TXX_STAT8
  100607. CVMX_AGL_GMX_TXX_STAT9
  100608. CVMX_AGL_GMX_TXX_STATS_CTL
  100609. CVMX_AGL_GMX_TXX_THRESH
  100610. CVMX_AGL_GMX_TX_BP
  100611. CVMX_AGL_GMX_TX_COL_ATTEMPT
  100612. CVMX_AGL_GMX_TX_IFG
  100613. CVMX_AGL_GMX_TX_INT_EN
  100614. CVMX_AGL_GMX_TX_INT_REG
  100615. CVMX_AGL_GMX_TX_JAM
  100616. CVMX_AGL_GMX_TX_LFSR
  100617. CVMX_AGL_GMX_TX_OVR_BP
  100618. CVMX_AGL_GMX_TX_PAUSE_PKT_DMAC
  100619. CVMX_AGL_GMX_TX_PAUSE_PKT_TYPE
  100620. CVMX_AGL_PRTX_CTL
  100621. CVMX_ASXX_GMII_RX_CLK_SET
  100622. CVMX_ASXX_GMII_RX_DAT_SET
  100623. CVMX_ASXX_INT_EN
  100624. CVMX_ASXX_INT_REG
  100625. CVMX_ASXX_MII_RX_DAT_SET
  100626. CVMX_ASXX_PRT_LOOP
  100627. CVMX_ASXX_RLD_BYPASS
  100628. CVMX_ASXX_RLD_BYPASS_SETTING
  100629. CVMX_ASXX_RLD_COMP
  100630. CVMX_ASXX_RLD_DATA_DRV
  100631. CVMX_ASXX_RLD_FCRAM_MODE
  100632. CVMX_ASXX_RLD_NCTL_STRONG
  100633. CVMX_ASXX_RLD_NCTL_WEAK
  100634. CVMX_ASXX_RLD_PCTL_STRONG
  100635. CVMX_ASXX_RLD_PCTL_WEAK
  100636. CVMX_ASXX_RLD_SETTING
  100637. CVMX_ASXX_RX_CLK_SETX
  100638. CVMX_ASXX_RX_PRT_EN
  100639. CVMX_ASXX_RX_WOL
  100640. CVMX_ASXX_RX_WOL_MSK
  100641. CVMX_ASXX_RX_WOL_POWOK
  100642. CVMX_ASXX_RX_WOL_SIG
  100643. CVMX_ASXX_TX_CLK_SETX
  100644. CVMX_ASXX_TX_COMP_BYP
  100645. CVMX_ASXX_TX_HI_WATERX
  100646. CVMX_ASXX_TX_PRT_EN
  100647. CVMX_BOARD_TYPE_BBGW_REF
  100648. CVMX_BOARD_TYPE_CB5200
  100649. CVMX_BOARD_TYPE_CB5600
  100650. CVMX_BOARD_TYPE_CB5601
  100651. CVMX_BOARD_TYPE_CN3005_EVB_HS5
  100652. CVMX_BOARD_TYPE_CN3010_EVB_HS5
  100653. CVMX_BOARD_TYPE_CN3020_EVB_HS5
  100654. CVMX_BOARD_TYPE_CUST_AGS103
  100655. CVMX_BOARD_TYPE_CUST_AGS106
  100656. CVMX_BOARD_TYPE_CUST_AGS109
  100657. CVMX_BOARD_TYPE_CUST_DEFINED_MAX
  100658. CVMX_BOARD_TYPE_CUST_DEFINED_MIN
  100659. CVMX_BOARD_TYPE_CUST_DSR1000N
  100660. CVMX_BOARD_TYPE_CUST_GCT105
  100661. CVMX_BOARD_TYPE_CUST_GCT108
  100662. CVMX_BOARD_TYPE_CUST_GCT110
  100663. CVMX_BOARD_TYPE_CUST_GST104
  100664. CVMX_BOARD_TYPE_CUST_ITB101
  100665. CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX
  100666. CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX
  100667. CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER
  100668. CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER
  100669. CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX
  100670. CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX
  100671. CVMX_BOARD_TYPE_CUST_L2_ZINWELL
  100672. CVMX_BOARD_TYPE_CUST_NB5
  100673. CVMX_BOARD_TYPE_CUST_NS0216
  100674. CVMX_BOARD_TYPE_CUST_NTE102
  100675. CVMX_BOARD_TYPE_CUST_PRIVATE_MAX
  100676. CVMX_BOARD_TYPE_CUST_PRIVATE_MIN
  100677. CVMX_BOARD_TYPE_CUST_SGM107
  100678. CVMX_BOARD_TYPE_CUST_WMR500
  100679. CVMX_BOARD_TYPE_CUST_WSX16
  100680. CVMX_BOARD_TYPE_EBB5600
  100681. CVMX_BOARD_TYPE_EBB6300
  100682. CVMX_BOARD_TYPE_EBB6600
  100683. CVMX_BOARD_TYPE_EBB6800
  100684. CVMX_BOARD_TYPE_EBH3000
  100685. CVMX_BOARD_TYPE_EBH3100
  100686. CVMX_BOARD_TYPE_EBH5200
  100687. CVMX_BOARD_TYPE_EBH5201
  100688. CVMX_BOARD_TYPE_EBH5600
  100689. CVMX_BOARD_TYPE_EBH5601
  100690. CVMX_BOARD_TYPE_EBH5610
  100691. CVMX_BOARD_TYPE_EBT3000
  100692. CVMX_BOARD_TYPE_EBT5200
  100693. CVMX_BOARD_TYPE_EBT5600
  100694. CVMX_BOARD_TYPE_EBT5800
  100695. CVMX_BOARD_TYPE_EBT5810
  100696. CVMX_BOARD_TYPE_EP6300C
  100697. CVMX_BOARD_TYPE_GENERIC
  100698. CVMX_BOARD_TYPE_HIKARI
  100699. CVMX_BOARD_TYPE_KBP
  100700. CVMX_BOARD_TYPE_KODAMA
  100701. CVMX_BOARD_TYPE_KONTRON_S1901
  100702. CVMX_BOARD_TYPE_LANAI2_A
  100703. CVMX_BOARD_TYPE_LANAI2_G
  100704. CVMX_BOARD_TYPE_LANAI2_U
  100705. CVMX_BOARD_TYPE_MAX
  100706. CVMX_BOARD_TYPE_NAC38
  100707. CVMX_BOARD_TYPE_NAO38
  100708. CVMX_BOARD_TYPE_NIAGARA
  100709. CVMX_BOARD_TYPE_NIC10E
  100710. CVMX_BOARD_TYPE_NIC10E_66
  100711. CVMX_BOARD_TYPE_NIC2E
  100712. CVMX_BOARD_TYPE_NIC4E
  100713. CVMX_BOARD_TYPE_NIC68_4
  100714. CVMX_BOARD_TYPE_NICPRO2
  100715. CVMX_BOARD_TYPE_NIC_XLE_10G
  100716. CVMX_BOARD_TYPE_NIC_XLE_4G
  100717. CVMX_BOARD_TYPE_NULL
  100718. CVMX_BOARD_TYPE_REDWING
  100719. CVMX_BOARD_TYPE_SIM
  100720. CVMX_BOARD_TYPE_THUNDER
  100721. CVMX_BOARD_TYPE_TRANTOR
  100722. CVMX_BOARD_TYPE_UBNT_E100
  100723. CVMX_BOOTINFO_CFG_FLAG_BREAK
  100724. CVMX_BOOTINFO_CFG_FLAG_DEBUG
  100725. CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC
  100726. CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING
  100727. CVMX_BOOTINFO_CFG_FLAG_PCI_HOST
  100728. CVMX_BOOTINFO_CFG_FLAG_PCI_TARGET
  100729. CVMX_BOOTINFO_MAJ_VER
  100730. CVMX_BOOTINFO_MIN_VER
  100731. CVMX_BOOTINFO_OCTEON_SERIAL_LEN
  100732. CVMX_BOOTMEM_ALIGNMENT_SIZE
  100733. CVMX_BOOTMEM_DESC_MAJ_VER
  100734. CVMX_BOOTMEM_DESC_MIN_VER
  100735. CVMX_BOOTMEM_FLAG_END_ALLOC
  100736. CVMX_BOOTMEM_FLAG_NO_LOCKING
  100737. CVMX_BOOTMEM_NAMED_GET_FIELD
  100738. CVMX_BOOTMEM_NAMED_GET_NAME
  100739. CVMX_BOOTMEM_NAME_LEN
  100740. CVMX_BOOTMEM_NUM_NAMED_BLOCKS
  100741. CVMX_BUILD_READ64
  100742. CVMX_BUILD_WRITE64
  100743. CVMX_CACHE
  100744. CVMX_CACHE_LCKL2
  100745. CVMX_CACHE_LINE_ALIGNED
  100746. CVMX_CACHE_LINE_MASK
  100747. CVMX_CACHE_LINE_SIZE
  100748. CVMX_CACHE_LTGL2I
  100749. CVMX_CACHE_WBIL2
  100750. CVMX_CACHE_WBIL2I
  100751. CVMX_CHIP_SIM_TYPE_DEPRECATED
  100752. CVMX_CHIP_TYPE_MAX
  100753. CVMX_CHIP_TYPE_NULL
  100754. CVMX_CHIP_TYPE_OCTEON_SAMPLE
  100755. CVMX_CIU2_ACK_PPX_IP2
  100756. CVMX_CIU2_ACK_PPX_IP3
  100757. CVMX_CIU2_EN_PPX_IP2_RML
  100758. CVMX_CIU2_EN_PPX_IP2_WDOG
  100759. CVMX_CIU2_EN_PPX_IP2_WRKQ
  100760. CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C
  100761. CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S
  100762. CVMX_CIU2_EN_PPX_IP3_MBOX_W1C
  100763. CVMX_CIU2_EN_PPX_IP3_MBOX_W1S
  100764. CVMX_CIU2_INTR_CIU_READY
  100765. CVMX_CIU2_RAW_PPX_IP2_WRKQ
  100766. CVMX_CIU2_SRC_PPX_IP2_RML
  100767. CVMX_CIU2_SRC_PPX_IP2_WDOG
  100768. CVMX_CIU2_SRC_PPX_IP2_WRKQ
  100769. CVMX_CIU2_SUM_PPX_IP2
  100770. CVMX_CIU2_SUM_PPX_IP3
  100771. CVMX_CIU3_BIST
  100772. CVMX_CIU3_CONST
  100773. CVMX_CIU3_CTL
  100774. CVMX_CIU3_DESTX_IO_INT
  100775. CVMX_CIU3_DESTX_PP_INT
  100776. CVMX_CIU3_FUSE
  100777. CVMX_CIU3_GSTOP
  100778. CVMX_CIU3_IDTX_CTL
  100779. CVMX_CIU3_IDTX_IO
  100780. CVMX_CIU3_IDTX_PPX
  100781. CVMX_CIU3_INTR_RAM_ECC_CTL
  100782. CVMX_CIU3_INTR_RAM_ECC_ST
  100783. CVMX_CIU3_INTR_READY
  100784. CVMX_CIU3_INTR_SLOWDOWN
  100785. CVMX_CIU3_ISCX_CTL
  100786. CVMX_CIU3_ISCX_W1C
  100787. CVMX_CIU3_ISCX_W1S
  100788. CVMX_CIU3_NMI
  100789. CVMX_CIU3_SISCX
  100790. CVMX_CIU3_TIMX
  100791. CVMX_CIU_ADDR
  100792. CVMX_CIU_EN2_PPX_IP4
  100793. CVMX_CIU_EN2_PPX_IP4_W1C
  100794. CVMX_CIU_EN2_PPX_IP4_W1S
  100795. CVMX_CIU_FUSE
  100796. CVMX_CIU_INTX_EN0
  100797. CVMX_CIU_INTX_EN0_W1C
  100798. CVMX_CIU_INTX_EN0_W1S
  100799. CVMX_CIU_INTX_EN1
  100800. CVMX_CIU_INTX_EN1_W1C
  100801. CVMX_CIU_INTX_EN1_W1S
  100802. CVMX_CIU_INTX_SUM0
  100803. CVMX_CIU_INT_SUM1
  100804. CVMX_CIU_MBOX_CLRX
  100805. CVMX_CIU_MBOX_SETX
  100806. CVMX_CIU_NMI
  100807. CVMX_CIU_PCI_INTA
  100808. CVMX_CIU_PP_BIST_STAT
  100809. CVMX_CIU_PP_DBG
  100810. CVMX_CIU_PP_POKEX
  100811. CVMX_CIU_PP_RST
  100812. CVMX_CIU_QLM0
  100813. CVMX_CIU_QLM1
  100814. CVMX_CIU_QLM_JTGC
  100815. CVMX_CIU_QLM_JTGD
  100816. CVMX_CIU_SOFT_BIST
  100817. CVMX_CIU_SOFT_PRST
  100818. CVMX_CIU_SOFT_PRST1
  100819. CVMX_CIU_SOFT_RST
  100820. CVMX_CIU_SUM2_PPX_IP4
  100821. CVMX_CIU_TIMX
  100822. CVMX_CIU_TIM_MULTI_CAST
  100823. CVMX_CIU_WDOGX
  100824. CVMX_CMD_QUEUE_ALREADY_SETUP
  100825. CVMX_CMD_QUEUE_DFA
  100826. CVMX_CMD_QUEUE_DMA
  100827. CVMX_CMD_QUEUE_DMA_BASE
  100828. CVMX_CMD_QUEUE_ENABLE_MAX_DEPTH
  100829. CVMX_CMD_QUEUE_END
  100830. CVMX_CMD_QUEUE_FULL
  100831. CVMX_CMD_QUEUE_INVALID_PARAM
  100832. CVMX_CMD_QUEUE_NO_MEMORY
  100833. CVMX_CMD_QUEUE_PKO
  100834. CVMX_CMD_QUEUE_PKO_BASE
  100835. CVMX_CMD_QUEUE_RAID
  100836. CVMX_CMD_QUEUE_SUCCESS
  100837. CVMX_CMD_QUEUE_ZIP
  100838. CVMX_COREMASK_BMPSZ
  100839. CVMX_COREMASK_ELTSZ
  100840. CVMX_DBG_DATA
  100841. CVMX_DCACHE_INVALIDATE
  100842. CVMX_DONT_WRITE_BACK
  100843. CVMX_DPI_BIST_STATUS
  100844. CVMX_DPI_CTL
  100845. CVMX_DPI_DMAX_COUNTS
  100846. CVMX_DPI_DMAX_DBELL
  100847. CVMX_DPI_DMAX_ERR_RSP_STATUS
  100848. CVMX_DPI_DMAX_IBUFF_SADDR
  100849. CVMX_DPI_DMAX_IFLIGHT
  100850. CVMX_DPI_DMAX_NADDR
  100851. CVMX_DPI_DMAX_REQBNK0
  100852. CVMX_DPI_DMAX_REQBNK1
  100853. CVMX_DPI_DMA_CONTROL
  100854. CVMX_DPI_DMA_ENGX_EN
  100855. CVMX_DPI_DMA_PPX_CNT
  100856. CVMX_DPI_ENGX_BUF
  100857. CVMX_DPI_INFO_REG
  100858. CVMX_DPI_INT_EN
  100859. CVMX_DPI_INT_REG
  100860. CVMX_DPI_NCBX_CFG
  100861. CVMX_DPI_PINT_INFO
  100862. CVMX_DPI_PKT_ERR_RSP
  100863. CVMX_DPI_REQ_ERR_RSP
  100864. CVMX_DPI_REQ_ERR_RSP_EN
  100865. CVMX_DPI_REQ_ERR_RST
  100866. CVMX_DPI_REQ_ERR_RST_EN
  100867. CVMX_DPI_REQ_ERR_SKIP_COMP
  100868. CVMX_DPI_REQ_GBL_EN
  100869. CVMX_DPI_SLI_PRTX_CFG
  100870. CVMX_DPI_SLI_PRTX_ERR
  100871. CVMX_DPI_SLI_PRTX_ERR_INFO
  100872. CVMX_DPOP
  100873. CVMX_ENABLE_DEBUG_PRINTS
  100874. CVMX_ENABLE_LEN_M8_FIX
  100875. CVMX_ENABLE_PARAMETER_CHECKING
  100876. CVMX_ENABLE_POW_CHECKS
  100877. CVMX_FAU_BITS_INEVAL
  100878. CVMX_FAU_BITS_LEN
  100879. CVMX_FAU_BITS_NOADD
  100880. CVMX_FAU_BITS_REGISTER
  100881. CVMX_FAU_BITS_SCRADDR
  100882. CVMX_FAU_BITS_SIZE
  100883. CVMX_FAU_BITS_TAGWAIT
  100884. CVMX_FAU_LOAD_IO_ADDRESS
  100885. CVMX_FAU_OP_SIZE_16
  100886. CVMX_FAU_OP_SIZE_32
  100887. CVMX_FAU_OP_SIZE_64
  100888. CVMX_FAU_OP_SIZE_8
  100889. CVMX_FAU_REG_16_ADDR
  100890. CVMX_FAU_REG_16_END
  100891. CVMX_FAU_REG_16_START
  100892. CVMX_FAU_REG_32_ADDR
  100893. CVMX_FAU_REG_32_END
  100894. CVMX_FAU_REG_32_START
  100895. CVMX_FAU_REG_64_ADDR
  100896. CVMX_FAU_REG_64_END
  100897. CVMX_FAU_REG_64_START
  100898. CVMX_FAU_REG_8_ADDR
  100899. CVMX_FAU_REG_8_END
  100900. CVMX_FAU_REG_8_START
  100901. CVMX_FAU_REG_AVAIL_BASE
  100902. CVMX_FAU_REG_END
  100903. CVMX_FPA_ADDR_RANGE_ERROR
  100904. CVMX_FPA_ALIGNMENT
  100905. CVMX_FPA_BIST_STATUS
  100906. CVMX_FPA_CLK_COUNT
  100907. CVMX_FPA_CTL_STATUS
  100908. CVMX_FPA_FPF0_MARKS
  100909. CVMX_FPA_FPF0_SIZE
  100910. CVMX_FPA_FPF1_MARKS
  100911. CVMX_FPA_FPF2_MARKS
  100912. CVMX_FPA_FPF3_MARKS
  100913. CVMX_FPA_FPF4_MARKS
  100914. CVMX_FPA_FPF5_MARKS
  100915. CVMX_FPA_FPF6_MARKS
  100916. CVMX_FPA_FPF7_MARKS
  100917. CVMX_FPA_FPF8_MARKS
  100918. CVMX_FPA_FPF8_SIZE
  100919. CVMX_FPA_FPFX_MARKS
  100920. CVMX_FPA_FPFX_SIZE
  100921. CVMX_FPA_INT_ENB
  100922. CVMX_FPA_INT_SUM
  100923. CVMX_FPA_MIN_BLOCK_SIZE
  100924. CVMX_FPA_NUM_POOLS
  100925. CVMX_FPA_OUTPUT_BUFFER_POOL
  100926. CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE
  100927. CVMX_FPA_PACKET_POOL
  100928. CVMX_FPA_PACKET_POOL_SIZE
  100929. CVMX_FPA_PACKET_THRESHOLD
  100930. CVMX_FPA_POOLX_END_ADDR
  100931. CVMX_FPA_POOLX_START_ADDR
  100932. CVMX_FPA_POOLX_THRESHOLD
  100933. CVMX_FPA_POOL_0_SIZE
  100934. CVMX_FPA_POOL_1_SIZE
  100935. CVMX_FPA_POOL_2_SIZE
  100936. CVMX_FPA_POOL_3_SIZE
  100937. CVMX_FPA_POOL_4_SIZE
  100938. CVMX_FPA_POOL_5_SIZE
  100939. CVMX_FPA_POOL_6_SIZE
  100940. CVMX_FPA_POOL_7_SIZE
  100941. CVMX_FPA_QUE0_PAGE_INDEX
  100942. CVMX_FPA_QUE1_PAGE_INDEX
  100943. CVMX_FPA_QUE2_PAGE_INDEX
  100944. CVMX_FPA_QUE3_PAGE_INDEX
  100945. CVMX_FPA_QUE4_PAGE_INDEX
  100946. CVMX_FPA_QUE5_PAGE_INDEX
  100947. CVMX_FPA_QUE6_PAGE_INDEX
  100948. CVMX_FPA_QUE7_PAGE_INDEX
  100949. CVMX_FPA_QUE8_PAGE_INDEX
  100950. CVMX_FPA_QUEX_AVAILABLE
  100951. CVMX_FPA_QUEX_PAGE_INDEX
  100952. CVMX_FPA_QUE_ACT
  100953. CVMX_FPA_QUE_EXP
  100954. CVMX_FPA_WART_CTL
  100955. CVMX_FPA_WART_STATUS
  100956. CVMX_FPA_WQE_POOL
  100957. CVMX_FPA_WQE_POOL_SIZE
  100958. CVMX_FPA_WQE_THRESHOLD
  100959. CVMX_FULL_DID
  100960. CVMX_GMXX_HG2_CONTROL
  100961. CVMX_GMXX_INF_MODE
  100962. CVMX_GMXX_PRTX_CFG
  100963. CVMX_GMXX_RXX_ADR_CAM0
  100964. CVMX_GMXX_RXX_ADR_CAM1
  100965. CVMX_GMXX_RXX_ADR_CAM2
  100966. CVMX_GMXX_RXX_ADR_CAM3
  100967. CVMX_GMXX_RXX_ADR_CAM4
  100968. CVMX_GMXX_RXX_ADR_CAM5
  100969. CVMX_GMXX_RXX_ADR_CAM_EN
  100970. CVMX_GMXX_RXX_ADR_CTL
  100971. CVMX_GMXX_RXX_FRM_CTL
  100972. CVMX_GMXX_RXX_FRM_MAX
  100973. CVMX_GMXX_RXX_FRM_MIN
  100974. CVMX_GMXX_RXX_INT_EN
  100975. CVMX_GMXX_RXX_INT_REG
  100976. CVMX_GMXX_RXX_JABBER
  100977. CVMX_GMXX_RXX_RX_INBND
  100978. CVMX_GMXX_RX_PRTS
  100979. CVMX_GMXX_RX_XAUI_CTL
  100980. CVMX_GMXX_SMACX
  100981. CVMX_GMXX_TXX_BURST
  100982. CVMX_GMXX_TXX_CLK
  100983. CVMX_GMXX_TXX_CTL
  100984. CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL
  100985. CVMX_GMXX_TXX_PAUSE_PKT_TIME
  100986. CVMX_GMXX_TXX_SLOT
  100987. CVMX_GMXX_TXX_THRESH
  100988. CVMX_GMXX_TX_INT_EN
  100989. CVMX_GMXX_TX_INT_REG
  100990. CVMX_GMXX_TX_OVR_BP
  100991. CVMX_GMXX_TX_PRTS
  100992. CVMX_GMXX_TX_SPI_CTL
  100993. CVMX_GMXX_TX_SPI_MAX
  100994. CVMX_GMXX_TX_SPI_THRESH
  100995. CVMX_GMXX_TX_XAUI_CTL
  100996. CVMX_GPIO_BIT_CFGX
  100997. CVMX_GPIO_BOOT_ENA
  100998. CVMX_GPIO_CLK_GENX
  100999. CVMX_GPIO_CLK_QLMX
  101000. CVMX_GPIO_DBG_ENA
  101001. CVMX_GPIO_INT_CLR
  101002. CVMX_GPIO_MULTI_CAST
  101003. CVMX_GPIO_PIN_ENA
  101004. CVMX_GPIO_RX_DAT
  101005. CVMX_GPIO_TIM_CTL
  101006. CVMX_GPIO_TX_CLR
  101007. CVMX_GPIO_TX_SET
  101008. CVMX_GPIO_XBIT_CFGX
  101009. CVMX_GSERX_SCRATCH
  101010. CVMX_HELPER_BOARD_MGMT_IPD_PORT
  101011. CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE
  101012. CVMX_HELPER_ENABLE_BACK_PRESSURE
  101013. CVMX_HELPER_ENABLE_IPD
  101014. CVMX_HELPER_FIRST_MBUFF_SKIP
  101015. CVMX_HELPER_INPUT_PORT_SKIP_MODE
  101016. CVMX_HELPER_INPUT_TAG_INPUT_PORT
  101017. CVMX_HELPER_INPUT_TAG_IPV4_DST_IP
  101018. CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT
  101019. CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL
  101020. CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP
  101021. CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT
  101022. CVMX_HELPER_INPUT_TAG_IPV6_DST_IP
  101023. CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT
  101024. CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER
  101025. CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP
  101026. CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT
  101027. CVMX_HELPER_INPUT_TAG_TYPE
  101028. CVMX_HELPER_INTERFACE_MODE_DISABLED
  101029. CVMX_HELPER_INTERFACE_MODE_GMII
  101030. CVMX_HELPER_INTERFACE_MODE_LOOP
  101031. CVMX_HELPER_INTERFACE_MODE_NPI
  101032. CVMX_HELPER_INTERFACE_MODE_PCIE
  101033. CVMX_HELPER_INTERFACE_MODE_PICMG
  101034. CVMX_HELPER_INTERFACE_MODE_RGMII
  101035. CVMX_HELPER_INTERFACE_MODE_SGMII
  101036. CVMX_HELPER_INTERFACE_MODE_SPI
  101037. CVMX_HELPER_INTERFACE_MODE_XAUI
  101038. CVMX_HELPER_NOT_FIRST_MBUFF_SKIP
  101039. CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0
  101040. CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1
  101041. CVMX_HELPER_SPI_TIMEOUT
  101042. CVMX_ICACHE_INVALIDATE
  101043. CVMX_ICACHE_INVALIDATE2
  101044. CVMX_IOB_BIST_STATUS
  101045. CVMX_IOB_CTL_STATUS
  101046. CVMX_IOB_DWB_PRI_CNT
  101047. CVMX_IOB_FAU_TIMEOUT
  101048. CVMX_IOB_I2C_PRI_CNT
  101049. CVMX_IOB_INB_CONTROL_MATCH
  101050. CVMX_IOB_INB_CONTROL_MATCH_ENB
  101051. CVMX_IOB_INB_DATA_MATCH
  101052. CVMX_IOB_INB_DATA_MATCH_ENB
  101053. CVMX_IOB_INT_ENB
  101054. CVMX_IOB_INT_SUM
  101055. CVMX_IOB_N2C_L2C_PRI_CNT
  101056. CVMX_IOB_N2C_RSP_PRI_CNT
  101057. CVMX_IOB_OUTB_COM_PRI_CNT
  101058. CVMX_IOB_OUTB_CONTROL_MATCH
  101059. CVMX_IOB_OUTB_CONTROL_MATCH_ENB
  101060. CVMX_IOB_OUTB_DATA_MATCH
  101061. CVMX_IOB_OUTB_DATA_MATCH_ENB
  101062. CVMX_IOB_OUTB_FPA_PRI_CNT
  101063. CVMX_IOB_OUTB_REQ_PRI_CNT
  101064. CVMX_IOB_P2C_REQ_PRI_CNT
  101065. CVMX_IOB_PKT_ERR
  101066. CVMX_IOB_TO_CMB_CREDITS
  101067. CVMX_IOB_TO_NCB_DID_00_CREDITS
  101068. CVMX_IOB_TO_NCB_DID_111_CREDITS
  101069. CVMX_IOB_TO_NCB_DID_223_CREDITS
  101070. CVMX_IOB_TO_NCB_DID_24_CREDITS
  101071. CVMX_IOB_TO_NCB_DID_32_CREDITS
  101072. CVMX_IOB_TO_NCB_DID_40_CREDITS
  101073. CVMX_IOB_TO_NCB_DID_55_CREDITS
  101074. CVMX_IOB_TO_NCB_DID_64_CREDITS
  101075. CVMX_IOB_TO_NCB_DID_79_CREDITS
  101076. CVMX_IOB_TO_NCB_DID_96_CREDITS
  101077. CVMX_IOB_TO_NCB_DID_98_CREDITS
  101078. CVMX_IO_SEG
  101079. CVMX_IPD_1ST_MBUFF_SKIP
  101080. CVMX_IPD_1st_NEXT_PTR_BACK
  101081. CVMX_IPD_2nd_NEXT_PTR_BACK
  101082. CVMX_IPD_BIST_STATUS
  101083. CVMX_IPD_BPIDX_MBUF_TH
  101084. CVMX_IPD_BPID_BP_COUNTERX
  101085. CVMX_IPD_BP_PRT_RED_END
  101086. CVMX_IPD_CLK_COUNT
  101087. CVMX_IPD_CREDITS
  101088. CVMX_IPD_CTL_STATUS
  101089. CVMX_IPD_ECC_CTL
  101090. CVMX_IPD_FREE_PTR_FIFO_CTL
  101091. CVMX_IPD_FREE_PTR_VALUE
  101092. CVMX_IPD_HOLD_PTR_FIFO_CTL
  101093. CVMX_IPD_INT_ENB
  101094. CVMX_IPD_INT_SUM
  101095. CVMX_IPD_NEXT_PKT_PTR
  101096. CVMX_IPD_NEXT_WQE_PTR
  101097. CVMX_IPD_NOT_1ST_MBUFF_SKIP
  101098. CVMX_IPD_ON_BP_DROP_PKTX
  101099. CVMX_IPD_OPC_MODE_STF
  101100. CVMX_IPD_OPC_MODE_STF1_STT
  101101. CVMX_IPD_OPC_MODE_STF2_STT
  101102. CVMX_IPD_OPC_MODE_STT
  101103. CVMX_IPD_PACKET_MBUFF_SIZE
  101104. CVMX_IPD_PKT_ERR
  101105. CVMX_IPD_PKT_PTR_VALID
  101106. CVMX_IPD_PORTX_BP_PAGE_CNT
  101107. CVMX_IPD_PORTX_BP_PAGE_CNT2
  101108. CVMX_IPD_PORTX_BP_PAGE_CNT3
  101109. CVMX_IPD_PORT_BP_COUNTERS2_PAIRX
  101110. CVMX_IPD_PORT_BP_COUNTERS3_PAIRX
  101111. CVMX_IPD_PORT_BP_COUNTERS4_PAIRX
  101112. CVMX_IPD_PORT_BP_COUNTERS_PAIRX
  101113. CVMX_IPD_PORT_PTR_FIFO_CTL
  101114. CVMX_IPD_PORT_QOS_INTX
  101115. CVMX_IPD_PORT_QOS_INT_ENBX
  101116. CVMX_IPD_PORT_QOS_X_CNT
  101117. CVMX_IPD_PORT_SOPX
  101118. CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL
  101119. CVMX_IPD_PRC_PORT_PTR_FIFO_CTL
  101120. CVMX_IPD_PTR_COUNT
  101121. CVMX_IPD_PWP_PTR_FIFO_CTL
  101122. CVMX_IPD_QOS0_RED_MARKS
  101123. CVMX_IPD_QOS1_RED_MARKS
  101124. CVMX_IPD_QOS2_RED_MARKS
  101125. CVMX_IPD_QOS3_RED_MARKS
  101126. CVMX_IPD_QOS4_RED_MARKS
  101127. CVMX_IPD_QOS5_RED_MARKS
  101128. CVMX_IPD_QOS6_RED_MARKS
  101129. CVMX_IPD_QOS7_RED_MARKS
  101130. CVMX_IPD_QOSX_RED_MARKS
  101131. CVMX_IPD_QUE0_FREE_PAGE_CNT
  101132. CVMX_IPD_RED_BPID_ENABLEX
  101133. CVMX_IPD_RED_DELAY
  101134. CVMX_IPD_RED_PORT_ENABLE
  101135. CVMX_IPD_RED_PORT_ENABLE2
  101136. CVMX_IPD_RED_QUE0_PARAM
  101137. CVMX_IPD_RED_QUE1_PARAM
  101138. CVMX_IPD_RED_QUE2_PARAM
  101139. CVMX_IPD_RED_QUE3_PARAM
  101140. CVMX_IPD_RED_QUE4_PARAM
  101141. CVMX_IPD_RED_QUE5_PARAM
  101142. CVMX_IPD_RED_QUE6_PARAM
  101143. CVMX_IPD_RED_QUE7_PARAM
  101144. CVMX_IPD_RED_QUEX_PARAM
  101145. CVMX_IPD_REQ_WGT
  101146. CVMX_IPD_SUB_PORT_BP_PAGE_CNT
  101147. CVMX_IPD_SUB_PORT_FCS
  101148. CVMX_IPD_SUB_PORT_QOS_CNT
  101149. CVMX_IPD_WQE_FPA_QUEUE
  101150. CVMX_IPD_WQE_PTR_VALID
  101151. CVMX_L2C_ALIAS_MASK
  101152. CVMX_L2C_CFG
  101153. CVMX_L2C_CTL
  101154. CVMX_L2C_DBG
  101155. CVMX_L2C_ERR_TDTX
  101156. CVMX_L2C_ERR_TTGX
  101157. CVMX_L2C_EVENT_CYCLES
  101158. CVMX_L2C_EVENT_DATA_HIT
  101159. CVMX_L2C_EVENT_DATA_MISS
  101160. CVMX_L2C_EVENT_DATA_STORE_NOP
  101161. CVMX_L2C_EVENT_DATA_STORE_READ
  101162. CVMX_L2C_EVENT_DATA_STORE_WRITE
  101163. CVMX_L2C_EVENT_DT_RD_ALLOC
  101164. CVMX_L2C_EVENT_DT_WR_INVAL
  101165. CVMX_L2C_EVENT_FILL_DATA_VALID
  101166. CVMX_L2C_EVENT_HIT
  101167. CVMX_L2C_EVENT_INDEX_CONFLICT
  101168. CVMX_L2C_EVENT_INSTRUCTION_HIT
  101169. CVMX_L2C_EVENT_INSTRUCTION_MISS
  101170. CVMX_L2C_EVENT_LRF_REQ
  101171. CVMX_L2C_EVENT_MAX
  101172. CVMX_L2C_EVENT_MISS
  101173. CVMX_L2C_EVENT_READ_REQUEST
  101174. CVMX_L2C_EVENT_RSC_DATA_VALID
  101175. CVMX_L2C_EVENT_RSC_FILL
  101176. CVMX_L2C_EVENT_RSC_NOP
  101177. CVMX_L2C_EVENT_RSC_REFL
  101178. CVMX_L2C_EVENT_RSC_SCDN
  101179. CVMX_L2C_EVENT_RSC_SCFL
  101180. CVMX_L2C_EVENT_RSC_SCIN
  101181. CVMX_L2C_EVENT_RSC_STDN
  101182. CVMX_L2C_EVENT_RSC_STIN
  101183. CVMX_L2C_EVENT_RSC_VALID_FILL
  101184. CVMX_L2C_EVENT_RSC_VALID_REFL
  101185. CVMX_L2C_EVENT_RSC_VALID_STRSP
  101186. CVMX_L2C_EVENT_TAG_COMPLETE
  101187. CVMX_L2C_EVENT_TAG_DIRTY
  101188. CVMX_L2C_EVENT_TAG_PROBE
  101189. CVMX_L2C_EVENT_TAG_UPDATE
  101190. CVMX_L2C_EVENT_VICTIM_HIT
  101191. CVMX_L2C_EVENT_WRITE_DATA_VALID
  101192. CVMX_L2C_EVENT_WRITE_REQUEST
  101193. CVMX_L2C_EVENT_XMC_BUS_VALID
  101194. CVMX_L2C_EVENT_XMC_DWB
  101195. CVMX_L2C_EVENT_XMC_IOBDMA
  101196. CVMX_L2C_EVENT_XMC_IOBLD
  101197. CVMX_L2C_EVENT_XMC_IOBRSP
  101198. CVMX_L2C_EVENT_XMC_IOBRSP_DATA
  101199. CVMX_L2C_EVENT_XMC_IOBST
  101200. CVMX_L2C_EVENT_XMC_LDD
  101201. CVMX_L2C_EVENT_XMC_LDI
  101202. CVMX_L2C_EVENT_XMC_LDT
  101203. CVMX_L2C_EVENT_XMC_MEM_DATA
  101204. CVMX_L2C_EVENT_XMC_NOP
  101205. CVMX_L2C_EVENT_XMC_PL2
  101206. CVMX_L2C_EVENT_XMC_PSL1
  101207. CVMX_L2C_EVENT_XMC_REFL_DATA
  101208. CVMX_L2C_EVENT_XMC_STC
  101209. CVMX_L2C_EVENT_XMC_STF
  101210. CVMX_L2C_EVENT_XMC_STP
  101211. CVMX_L2C_EVENT_XMC_STT
  101212. CVMX_L2C_IDX_ADDR_SHIFT
  101213. CVMX_L2C_IDX_MASK
  101214. CVMX_L2C_LCKBASE
  101215. CVMX_L2C_LCKOFF
  101216. CVMX_L2C_MEMBANK_SELECT_SIZE
  101217. CVMX_L2C_PFC0
  101218. CVMX_L2C_PFC1
  101219. CVMX_L2C_PFC2
  101220. CVMX_L2C_PFC3
  101221. CVMX_L2C_PFCTL
  101222. CVMX_L2C_PFCX
  101223. CVMX_L2C_SPAR0
  101224. CVMX_L2C_SPAR1
  101225. CVMX_L2C_SPAR2
  101226. CVMX_L2C_SPAR3
  101227. CVMX_L2C_SPAR4
  101228. CVMX_L2C_TADS
  101229. CVMX_L2C_TADX_PFC0
  101230. CVMX_L2C_TADX_PFC1
  101231. CVMX_L2C_TADX_PFC2
  101232. CVMX_L2C_TADX_PFC3
  101233. CVMX_L2C_TADX_PFCX
  101234. CVMX_L2C_TADX_PRF
  101235. CVMX_L2C_TADX_TAG
  101236. CVMX_L2C_TAD_EVENT_LFB_VALID
  101237. CVMX_L2C_TAD_EVENT_LFB_WAIT_LFB
  101238. CVMX_L2C_TAD_EVENT_LFB_WAIT_VAB
  101239. CVMX_L2C_TAD_EVENT_MAX
  101240. CVMX_L2C_TAD_EVENT_NONE
  101241. CVMX_L2C_TAD_EVENT_QUAD0_BANK
  101242. CVMX_L2C_TAD_EVENT_QUAD0_INDEX
  101243. CVMX_L2C_TAD_EVENT_QUAD0_READ
  101244. CVMX_L2C_TAD_EVENT_QUAD0_WDAT
  101245. CVMX_L2C_TAD_EVENT_QUAD1_BANK
  101246. CVMX_L2C_TAD_EVENT_QUAD1_INDEX
  101247. CVMX_L2C_TAD_EVENT_QUAD1_READ
  101248. CVMX_L2C_TAD_EVENT_QUAD1_WDAT
  101249. CVMX_L2C_TAD_EVENT_QUAD2_BANK
  101250. CVMX_L2C_TAD_EVENT_QUAD2_INDEX
  101251. CVMX_L2C_TAD_EVENT_QUAD2_READ
  101252. CVMX_L2C_TAD_EVENT_QUAD2_WDAT
  101253. CVMX_L2C_TAD_EVENT_QUAD3_BANK
  101254. CVMX_L2C_TAD_EVENT_QUAD3_INDEX
  101255. CVMX_L2C_TAD_EVENT_QUAD3_READ
  101256. CVMX_L2C_TAD_EVENT_QUAD3_WDAT
  101257. CVMX_L2C_TAD_EVENT_SC_FAIL
  101258. CVMX_L2C_TAD_EVENT_SC_PASS
  101259. CVMX_L2C_TAD_EVENT_TAG_HIT
  101260. CVMX_L2C_TAD_EVENT_TAG_MISS
  101261. CVMX_L2C_TAD_EVENT_TAG_NOALLOC
  101262. CVMX_L2C_TAD_EVENT_TAG_VICTIM
  101263. CVMX_L2C_TAG_ADDR_ALIAS_SHIFT
  101264. CVMX_L2C_WPAR_IOBX
  101265. CVMX_L2C_WPAR_PPX
  101266. CVMX_L2D_ERR
  101267. CVMX_L2D_FUS3
  101268. CVMX_L2T_ERR
  101269. CVMX_L2_ASSOC
  101270. CVMX_L2_SETS
  101271. CVMX_L2_SET_BITS
  101272. CVMX_LED_BLINK
  101273. CVMX_LED_CLK_PHASE
  101274. CVMX_LED_CYLON
  101275. CVMX_LED_DBG
  101276. CVMX_LED_EN
  101277. CVMX_LED_POLARITY
  101278. CVMX_LED_PRT
  101279. CVMX_LED_PRT_FMT
  101280. CVMX_LED_PRT_STATUSX
  101281. CVMX_LED_UDD_CNTX
  101282. CVMX_LED_UDD_DATX
  101283. CVMX_LED_UDD_DAT_CLRX
  101284. CVMX_LED_UDD_DAT_SETX
  101285. CVMX_LLM_NUM_PORTS
  101286. CVMX_LMCX_BIST_CTL
  101287. CVMX_LMCX_BIST_RESULT
  101288. CVMX_LMCX_CHAR_CTL
  101289. CVMX_LMCX_CHAR_MASK0
  101290. CVMX_LMCX_CHAR_MASK1
  101291. CVMX_LMCX_CHAR_MASK2
  101292. CVMX_LMCX_CHAR_MASK3
  101293. CVMX_LMCX_CHAR_MASK4
  101294. CVMX_LMCX_COMP_CTL
  101295. CVMX_LMCX_COMP_CTL2
  101296. CVMX_LMCX_CONFIG
  101297. CVMX_LMCX_CONTROL
  101298. CVMX_LMCX_CTL
  101299. CVMX_LMCX_CTL1
  101300. CVMX_LMCX_DCLK_CNT
  101301. CVMX_LMCX_DCLK_CNT_HI
  101302. CVMX_LMCX_DCLK_CNT_LO
  101303. CVMX_LMCX_DCLK_CTL
  101304. CVMX_LMCX_DDR2_CTL
  101305. CVMX_LMCX_DDR_PLL_CTL
  101306. CVMX_LMCX_DELAY_CFG
  101307. CVMX_LMCX_DIMMX_PARAMS
  101308. CVMX_LMCX_DIMM_CTL
  101309. CVMX_LMCX_DLL_CTL
  101310. CVMX_LMCX_DLL_CTL2
  101311. CVMX_LMCX_DLL_CTL3
  101312. CVMX_LMCX_DUAL_MEMCFG
  101313. CVMX_LMCX_ECC_SYND
  101314. CVMX_LMCX_FADR
  101315. CVMX_LMCX_IFB_CNT
  101316. CVMX_LMCX_IFB_CNT_HI
  101317. CVMX_LMCX_IFB_CNT_LO
  101318. CVMX_LMCX_INT
  101319. CVMX_LMCX_INT_EN
  101320. CVMX_LMCX_MEM_CFG0
  101321. CVMX_LMCX_MEM_CFG1
  101322. CVMX_LMCX_MODEREG_PARAMS0
  101323. CVMX_LMCX_MODEREG_PARAMS1
  101324. CVMX_LMCX_NXM
  101325. CVMX_LMCX_OPS_CNT
  101326. CVMX_LMCX_OPS_CNT_HI
  101327. CVMX_LMCX_OPS_CNT_LO
  101328. CVMX_LMCX_PHY_CTL
  101329. CVMX_LMCX_PLL_BWCTL
  101330. CVMX_LMCX_PLL_CTL
  101331. CVMX_LMCX_PLL_STATUS
  101332. CVMX_LMCX_READ_LEVEL_CTL
  101333. CVMX_LMCX_READ_LEVEL_DBG
  101334. CVMX_LMCX_READ_LEVEL_RANKX
  101335. CVMX_LMCX_RESET_CTL
  101336. CVMX_LMCX_RLEVEL_CTL
  101337. CVMX_LMCX_RLEVEL_DBG
  101338. CVMX_LMCX_RLEVEL_RANKX
  101339. CVMX_LMCX_RODT_COMP_CTL
  101340. CVMX_LMCX_RODT_CTL
  101341. CVMX_LMCX_RODT_MASK
  101342. CVMX_LMCX_SCRAMBLED_FADR
  101343. CVMX_LMCX_SCRAMBLE_CFG0
  101344. CVMX_LMCX_SCRAMBLE_CFG1
  101345. CVMX_LMCX_SLOT_CTL0
  101346. CVMX_LMCX_SLOT_CTL1
  101347. CVMX_LMCX_SLOT_CTL2
  101348. CVMX_LMCX_TIMING_PARAMS0
  101349. CVMX_LMCX_TIMING_PARAMS1
  101350. CVMX_LMCX_TRO_CTL
  101351. CVMX_LMCX_TRO_STAT
  101352. CVMX_LMCX_WLEVEL_CTL
  101353. CVMX_LMCX_WLEVEL_DBG
  101354. CVMX_LMCX_WLEVEL_RANKX
  101355. CVMX_LMCX_WODT_CTL0
  101356. CVMX_LMCX_WODT_CTL1
  101357. CVMX_LMCX_WODT_MASK
  101358. CVMX_MAX_CORES
  101359. CVMX_MAX_NODES
  101360. CVMX_MF_CHORD
  101361. CVMX_MIO_BOOT_BIST_STAT
  101362. CVMX_MIO_BOOT_COMP
  101363. CVMX_MIO_BOOT_CTL
  101364. CVMX_MIO_BOOT_DMA_CFGX
  101365. CVMX_MIO_BOOT_DMA_INTX
  101366. CVMX_MIO_BOOT_DMA_INT_ENX
  101367. CVMX_MIO_BOOT_DMA_TIMX
  101368. CVMX_MIO_BOOT_ERR
  101369. CVMX_MIO_BOOT_INT
  101370. CVMX_MIO_BOOT_LOC_ADR
  101371. CVMX_MIO_BOOT_LOC_CFGX
  101372. CVMX_MIO_BOOT_LOC_DAT
  101373. CVMX_MIO_BOOT_PIN_DEFS
  101374. CVMX_MIO_BOOT_REG_CFGX
  101375. CVMX_MIO_BOOT_REG_TIMX
  101376. CVMX_MIO_BOOT_THR
  101377. CVMX_MIO_EMM_BUF_DAT
  101378. CVMX_MIO_EMM_BUF_IDX
  101379. CVMX_MIO_EMM_CFG
  101380. CVMX_MIO_EMM_CMD
  101381. CVMX_MIO_EMM_DMA
  101382. CVMX_MIO_EMM_INT
  101383. CVMX_MIO_EMM_INT_EN
  101384. CVMX_MIO_EMM_MODEX
  101385. CVMX_MIO_EMM_RCA
  101386. CVMX_MIO_EMM_RSP_HI
  101387. CVMX_MIO_EMM_RSP_LO
  101388. CVMX_MIO_EMM_RSP_STS
  101389. CVMX_MIO_EMM_SAMPLE
  101390. CVMX_MIO_EMM_STS_MASK
  101391. CVMX_MIO_EMM_SWITCH
  101392. CVMX_MIO_EMM_WDOG
  101393. CVMX_MIO_FUS_BNK_DATX
  101394. CVMX_MIO_FUS_DAT0
  101395. CVMX_MIO_FUS_DAT1
  101396. CVMX_MIO_FUS_DAT2
  101397. CVMX_MIO_FUS_DAT3
  101398. CVMX_MIO_FUS_EMA
  101399. CVMX_MIO_FUS_PDF
  101400. CVMX_MIO_FUS_PLL
  101401. CVMX_MIO_FUS_PROG
  101402. CVMX_MIO_FUS_PROG_TIMES
  101403. CVMX_MIO_FUS_RCMD
  101404. CVMX_MIO_FUS_READ_TIMES
  101405. CVMX_MIO_FUS_REPAIR_RES0
  101406. CVMX_MIO_FUS_REPAIR_RES1
  101407. CVMX_MIO_FUS_REPAIR_RES2
  101408. CVMX_MIO_FUS_SPR_REPAIR_RES
  101409. CVMX_MIO_FUS_SPR_REPAIR_SUM
  101410. CVMX_MIO_FUS_TGG
  101411. CVMX_MIO_FUS_UNLOCK
  101412. CVMX_MIO_FUS_WADR
  101413. CVMX_MIO_GPIO_COMP
  101414. CVMX_MIO_NDF_DMA_CFG
  101415. CVMX_MIO_NDF_DMA_INT
  101416. CVMX_MIO_NDF_DMA_INT_EN
  101417. CVMX_MIO_PLL_CTL
  101418. CVMX_MIO_PLL_SETTING
  101419. CVMX_MIO_PTP_CKOUT_HI_INCR
  101420. CVMX_MIO_PTP_CKOUT_LO_INCR
  101421. CVMX_MIO_PTP_CKOUT_THRESH_HI
  101422. CVMX_MIO_PTP_CKOUT_THRESH_LO
  101423. CVMX_MIO_PTP_CLOCK_CFG
  101424. CVMX_MIO_PTP_CLOCK_COMP
  101425. CVMX_MIO_PTP_CLOCK_HI
  101426. CVMX_MIO_PTP_CLOCK_LO
  101427. CVMX_MIO_PTP_EVT_CNT
  101428. CVMX_MIO_PTP_PHY_1PPS_IN
  101429. CVMX_MIO_PTP_PPS_HI_INCR
  101430. CVMX_MIO_PTP_PPS_LO_INCR
  101431. CVMX_MIO_PTP_PPS_THRESH_HI
  101432. CVMX_MIO_PTP_PPS_THRESH_LO
  101433. CVMX_MIO_PTP_TIMESTAMP
  101434. CVMX_MIO_QLMX_CFG
  101435. CVMX_MIO_RST_BOOT
  101436. CVMX_MIO_RST_CFG
  101437. CVMX_MIO_RST_CKILL
  101438. CVMX_MIO_RST_CNTLX
  101439. CVMX_MIO_RST_CTLX
  101440. CVMX_MIO_RST_DELAY
  101441. CVMX_MIO_RST_INT
  101442. CVMX_MIO_RST_INT_EN
  101443. CVMX_MIO_TWSX_INT
  101444. CVMX_MIO_TWSX_SW_TWSI
  101445. CVMX_MIO_TWSX_SW_TWSI_EXT
  101446. CVMX_MIO_TWSX_TWSI_SW
  101447. CVMX_MIO_UART2_DLH
  101448. CVMX_MIO_UART2_DLL
  101449. CVMX_MIO_UART2_FAR
  101450. CVMX_MIO_UART2_FCR
  101451. CVMX_MIO_UART2_HTX
  101452. CVMX_MIO_UART2_IER
  101453. CVMX_MIO_UART2_IIR
  101454. CVMX_MIO_UART2_LCR
  101455. CVMX_MIO_UART2_LSR
  101456. CVMX_MIO_UART2_MCR
  101457. CVMX_MIO_UART2_MSR
  101458. CVMX_MIO_UART2_RBR
  101459. CVMX_MIO_UART2_RFL
  101460. CVMX_MIO_UART2_RFW
  101461. CVMX_MIO_UART2_SBCR
  101462. CVMX_MIO_UART2_SCR
  101463. CVMX_MIO_UART2_SFE
  101464. CVMX_MIO_UART2_SRR
  101465. CVMX_MIO_UART2_SRT
  101466. CVMX_MIO_UART2_SRTS
  101467. CVMX_MIO_UART2_STT
  101468. CVMX_MIO_UART2_TFL
  101469. CVMX_MIO_UART2_TFR
  101470. CVMX_MIO_UART2_THR
  101471. CVMX_MIO_UART2_USR
  101472. CVMX_MIO_UARTX_DLH
  101473. CVMX_MIO_UARTX_DLL
  101474. CVMX_MIO_UARTX_FAR
  101475. CVMX_MIO_UARTX_FCR
  101476. CVMX_MIO_UARTX_HTX
  101477. CVMX_MIO_UARTX_IER
  101478. CVMX_MIO_UARTX_IIR
  101479. CVMX_MIO_UARTX_LCR
  101480. CVMX_MIO_UARTX_LSR
  101481. CVMX_MIO_UARTX_MCR
  101482. CVMX_MIO_UARTX_MSR
  101483. CVMX_MIO_UARTX_RBR
  101484. CVMX_MIO_UARTX_RFL
  101485. CVMX_MIO_UARTX_RFW
  101486. CVMX_MIO_UARTX_SBCR
  101487. CVMX_MIO_UARTX_SCR
  101488. CVMX_MIO_UARTX_SFE
  101489. CVMX_MIO_UARTX_SRR
  101490. CVMX_MIO_UARTX_SRT
  101491. CVMX_MIO_UARTX_SRTS
  101492. CVMX_MIO_UARTX_STT
  101493. CVMX_MIO_UARTX_TFL
  101494. CVMX_MIO_UARTX_TFR
  101495. CVMX_MIO_UARTX_THR
  101496. CVMX_MIO_UARTX_USR
  101497. CVMX_MIPS32_SPACE_KSEG0
  101498. CVMX_MIPS_MAX_CORES
  101499. CVMX_MIPS_SPACE_XKPHYS
  101500. CVMX_MIPS_SPACE_XKSEG
  101501. CVMX_MIPS_SPACE_XSSEG
  101502. CVMX_MIPS_SPACE_XUSEG
  101503. CVMX_MIPS_XKSEG_SPACE_KSEG0
  101504. CVMX_MIPS_XKSEG_SPACE_KSEG1
  101505. CVMX_MIPS_XKSEG_SPACE_KSEG3
  101506. CVMX_MIPS_XKSEG_SPACE_SSEG
  101507. CVMX_MIXX_BIST
  101508. CVMX_MIXX_CTL
  101509. CVMX_MIXX_INTENA
  101510. CVMX_MIXX_IRCNT
  101511. CVMX_MIXX_IRHWM
  101512. CVMX_MIXX_IRING1
  101513. CVMX_MIXX_IRING2
  101514. CVMX_MIXX_ISR
  101515. CVMX_MIXX_ORCNT
  101516. CVMX_MIXX_ORHWM
  101517. CVMX_MIXX_ORING1
  101518. CVMX_MIXX_ORING2
  101519. CVMX_MIXX_REMCNT
  101520. CVMX_MIXX_TSCTL
  101521. CVMX_MIXX_TSTAMP
  101522. CVMX_MPI_CFG
  101523. CVMX_MPI_DATX
  101524. CVMX_MPI_STS
  101525. CVMX_MPI_TX
  101526. CVMX_NODE_BITS
  101527. CVMX_NODE_IO_MASK
  101528. CVMX_NODE_IO_SHIFT
  101529. CVMX_NODE_MASK
  101530. CVMX_NODE_MEM_SHIFT
  101531. CVMX_NODE_NO_SHIFT
  101532. CVMX_NPEI_BAR1_INDEXX
  101533. CVMX_NPEI_BIST_STATUS
  101534. CVMX_NPEI_BIST_STATUS2
  101535. CVMX_NPEI_CTL_PORT0
  101536. CVMX_NPEI_CTL_PORT1
  101537. CVMX_NPEI_CTL_STATUS
  101538. CVMX_NPEI_CTL_STATUS2
  101539. CVMX_NPEI_DATA_OUT_CNT
  101540. CVMX_NPEI_DBG_DATA
  101541. CVMX_NPEI_DBG_SELECT
  101542. CVMX_NPEI_DMA0_INT_LEVEL
  101543. CVMX_NPEI_DMA1_INT_LEVEL
  101544. CVMX_NPEI_DMAX_COUNTS
  101545. CVMX_NPEI_DMAX_DBELL
  101546. CVMX_NPEI_DMAX_IBUFF_SADDR
  101547. CVMX_NPEI_DMAX_NADDR
  101548. CVMX_NPEI_DMA_CNTS
  101549. CVMX_NPEI_DMA_CONTROL
  101550. CVMX_NPEI_DMA_PCIE_REQ_NUM
  101551. CVMX_NPEI_DMA_STATE1
  101552. CVMX_NPEI_DMA_STATE1_P1
  101553. CVMX_NPEI_DMA_STATE2
  101554. CVMX_NPEI_DMA_STATE2_P1
  101555. CVMX_NPEI_DMA_STATE3_P1
  101556. CVMX_NPEI_DMA_STATE4_P1
  101557. CVMX_NPEI_DMA_STATE5_P1
  101558. CVMX_NPEI_INT_A_ENB
  101559. CVMX_NPEI_INT_A_ENB2
  101560. CVMX_NPEI_INT_A_SUM
  101561. CVMX_NPEI_INT_ENB
  101562. CVMX_NPEI_INT_ENB2
  101563. CVMX_NPEI_INT_INFO
  101564. CVMX_NPEI_INT_SUM
  101565. CVMX_NPEI_INT_SUM2
  101566. CVMX_NPEI_LAST_WIN_RDATA0
  101567. CVMX_NPEI_LAST_WIN_RDATA1
  101568. CVMX_NPEI_MEM_ACCESS_CTL
  101569. CVMX_NPEI_MEM_ACCESS_SUBIDX
  101570. CVMX_NPEI_MSI_ENB0
  101571. CVMX_NPEI_MSI_ENB1
  101572. CVMX_NPEI_MSI_ENB2
  101573. CVMX_NPEI_MSI_ENB3
  101574. CVMX_NPEI_MSI_RCV0
  101575. CVMX_NPEI_MSI_RCV1
  101576. CVMX_NPEI_MSI_RCV2
  101577. CVMX_NPEI_MSI_RCV3
  101578. CVMX_NPEI_MSI_RD_MAP
  101579. CVMX_NPEI_MSI_W1C_ENB0
  101580. CVMX_NPEI_MSI_W1C_ENB1
  101581. CVMX_NPEI_MSI_W1C_ENB2
  101582. CVMX_NPEI_MSI_W1C_ENB3
  101583. CVMX_NPEI_MSI_W1S_ENB0
  101584. CVMX_NPEI_MSI_W1S_ENB1
  101585. CVMX_NPEI_MSI_W1S_ENB2
  101586. CVMX_NPEI_MSI_W1S_ENB3
  101587. CVMX_NPEI_MSI_WR_MAP
  101588. CVMX_NPEI_PCIE_CREDIT_CNT
  101589. CVMX_NPEI_PCIE_MSI_RCV
  101590. CVMX_NPEI_PCIE_MSI_RCV_B1
  101591. CVMX_NPEI_PCIE_MSI_RCV_B2
  101592. CVMX_NPEI_PCIE_MSI_RCV_B3
  101593. CVMX_NPEI_PKTX_CNTS
  101594. CVMX_NPEI_PKTX_INSTR_BADDR
  101595. CVMX_NPEI_PKTX_INSTR_BAOFF_DBELL
  101596. CVMX_NPEI_PKTX_INSTR_FIFO_RSIZE
  101597. CVMX_NPEI_PKTX_INSTR_HEADER
  101598. CVMX_NPEI_PKTX_IN_BP
  101599. CVMX_NPEI_PKTX_SLIST_BADDR
  101600. CVMX_NPEI_PKTX_SLIST_BAOFF_DBELL
  101601. CVMX_NPEI_PKTX_SLIST_FIFO_RSIZE
  101602. CVMX_NPEI_PKT_CNT_INT
  101603. CVMX_NPEI_PKT_CNT_INT_ENB
  101604. CVMX_NPEI_PKT_DATA_OUT_ES
  101605. CVMX_NPEI_PKT_DATA_OUT_NS
  101606. CVMX_NPEI_PKT_DATA_OUT_ROR
  101607. CVMX_NPEI_PKT_DPADDR
  101608. CVMX_NPEI_PKT_INPUT_CONTROL
  101609. CVMX_NPEI_PKT_INSTR_ENB
  101610. CVMX_NPEI_PKT_INSTR_RD_SIZE
  101611. CVMX_NPEI_PKT_INSTR_SIZE
  101612. CVMX_NPEI_PKT_INT_LEVELS
  101613. CVMX_NPEI_PKT_IN_BP
  101614. CVMX_NPEI_PKT_IN_DONEX_CNTS
  101615. CVMX_NPEI_PKT_IN_INSTR_COUNTS
  101616. CVMX_NPEI_PKT_IN_PCIE_PORT
  101617. CVMX_NPEI_PKT_IPTR
  101618. CVMX_NPEI_PKT_OUTPUT_WMARK
  101619. CVMX_NPEI_PKT_OUT_BMODE
  101620. CVMX_NPEI_PKT_OUT_ENB
  101621. CVMX_NPEI_PKT_PCIE_PORT
  101622. CVMX_NPEI_PKT_PORT_IN_RST
  101623. CVMX_NPEI_PKT_SLIST_ES
  101624. CVMX_NPEI_PKT_SLIST_ID_SIZE
  101625. CVMX_NPEI_PKT_SLIST_NS
  101626. CVMX_NPEI_PKT_SLIST_ROR
  101627. CVMX_NPEI_PKT_TIME_INT
  101628. CVMX_NPEI_PKT_TIME_INT_ENB
  101629. CVMX_NPEI_RSL_INT_BLOCKS
  101630. CVMX_NPEI_SCRATCH_1
  101631. CVMX_NPEI_STATE1
  101632. CVMX_NPEI_STATE2
  101633. CVMX_NPEI_STATE3
  101634. CVMX_NPEI_WINDOW_CTL
  101635. CVMX_NPEI_WIN_RD_ADDR
  101636. CVMX_NPEI_WIN_RD_DATA
  101637. CVMX_NPEI_WIN_WR_ADDR
  101638. CVMX_NPEI_WIN_WR_DATA
  101639. CVMX_NPEI_WIN_WR_MASK
  101640. CVMX_NPI_BASE_ADDR_INPUT0
  101641. CVMX_NPI_BASE_ADDR_INPUT1
  101642. CVMX_NPI_BASE_ADDR_INPUT2
  101643. CVMX_NPI_BASE_ADDR_INPUT3
  101644. CVMX_NPI_BASE_ADDR_INPUTX
  101645. CVMX_NPI_BASE_ADDR_OUTPUT0
  101646. CVMX_NPI_BASE_ADDR_OUTPUT1
  101647. CVMX_NPI_BASE_ADDR_OUTPUT2
  101648. CVMX_NPI_BASE_ADDR_OUTPUT3
  101649. CVMX_NPI_BASE_ADDR_OUTPUTX
  101650. CVMX_NPI_BIST_STATUS
  101651. CVMX_NPI_BUFF_SIZE_OUTPUT0
  101652. CVMX_NPI_BUFF_SIZE_OUTPUT1
  101653. CVMX_NPI_BUFF_SIZE_OUTPUT2
  101654. CVMX_NPI_BUFF_SIZE_OUTPUT3
  101655. CVMX_NPI_BUFF_SIZE_OUTPUTX
  101656. CVMX_NPI_COMP_CTL
  101657. CVMX_NPI_CTL_STATUS
  101658. CVMX_NPI_DBG_SELECT
  101659. CVMX_NPI_DMA_CONTROL
  101660. CVMX_NPI_DMA_HIGHP_COUNTS
  101661. CVMX_NPI_DMA_HIGHP_NADDR
  101662. CVMX_NPI_DMA_LOWP_COUNTS
  101663. CVMX_NPI_DMA_LOWP_NADDR
  101664. CVMX_NPI_HIGHP_DBELL
  101665. CVMX_NPI_HIGHP_IBUFF_SADDR
  101666. CVMX_NPI_INPUT_CONTROL
  101667. CVMX_NPI_INT_ENB
  101668. CVMX_NPI_INT_SUM
  101669. CVMX_NPI_LOWP_DBELL
  101670. CVMX_NPI_LOWP_IBUFF_SADDR
  101671. CVMX_NPI_MEM_ACCESS_SUBID3
  101672. CVMX_NPI_MEM_ACCESS_SUBID4
  101673. CVMX_NPI_MEM_ACCESS_SUBID5
  101674. CVMX_NPI_MEM_ACCESS_SUBID6
  101675. CVMX_NPI_MEM_ACCESS_SUBIDX
  101676. CVMX_NPI_MSI_RCV
  101677. CVMX_NPI_NPI_MSI_RCV
  101678. CVMX_NPI_NUM_DESC_OUTPUT0
  101679. CVMX_NPI_NUM_DESC_OUTPUT1
  101680. CVMX_NPI_NUM_DESC_OUTPUT2
  101681. CVMX_NPI_NUM_DESC_OUTPUT3
  101682. CVMX_NPI_NUM_DESC_OUTPUTX
  101683. CVMX_NPI_OUTPUT_CONTROL
  101684. CVMX_NPI_P0_DBPAIR_ADDR
  101685. CVMX_NPI_P0_INSTR_ADDR
  101686. CVMX_NPI_P0_INSTR_CNTS
  101687. CVMX_NPI_P0_PAIR_CNTS
  101688. CVMX_NPI_P1_DBPAIR_ADDR
  101689. CVMX_NPI_P1_INSTR_ADDR
  101690. CVMX_NPI_P1_INSTR_CNTS
  101691. CVMX_NPI_P1_PAIR_CNTS
  101692. CVMX_NPI_P2_DBPAIR_ADDR
  101693. CVMX_NPI_P2_INSTR_ADDR
  101694. CVMX_NPI_P2_INSTR_CNTS
  101695. CVMX_NPI_P2_PAIR_CNTS
  101696. CVMX_NPI_P3_DBPAIR_ADDR
  101697. CVMX_NPI_P3_INSTR_ADDR
  101698. CVMX_NPI_P3_INSTR_CNTS
  101699. CVMX_NPI_P3_PAIR_CNTS
  101700. CVMX_NPI_PCI_BAR1_INDEXX
  101701. CVMX_NPI_PCI_BIST_REG
  101702. CVMX_NPI_PCI_BURST_SIZE
  101703. CVMX_NPI_PCI_CFG00
  101704. CVMX_NPI_PCI_CFG01
  101705. CVMX_NPI_PCI_CFG02
  101706. CVMX_NPI_PCI_CFG03
  101707. CVMX_NPI_PCI_CFG04
  101708. CVMX_NPI_PCI_CFG05
  101709. CVMX_NPI_PCI_CFG06
  101710. CVMX_NPI_PCI_CFG07
  101711. CVMX_NPI_PCI_CFG08
  101712. CVMX_NPI_PCI_CFG09
  101713. CVMX_NPI_PCI_CFG10
  101714. CVMX_NPI_PCI_CFG11
  101715. CVMX_NPI_PCI_CFG12
  101716. CVMX_NPI_PCI_CFG13
  101717. CVMX_NPI_PCI_CFG15
  101718. CVMX_NPI_PCI_CFG16
  101719. CVMX_NPI_PCI_CFG17
  101720. CVMX_NPI_PCI_CFG18
  101721. CVMX_NPI_PCI_CFG19
  101722. CVMX_NPI_PCI_CFG20
  101723. CVMX_NPI_PCI_CFG21
  101724. CVMX_NPI_PCI_CFG22
  101725. CVMX_NPI_PCI_CFG56
  101726. CVMX_NPI_PCI_CFG57
  101727. CVMX_NPI_PCI_CFG58
  101728. CVMX_NPI_PCI_CFG59
  101729. CVMX_NPI_PCI_CFG60
  101730. CVMX_NPI_PCI_CFG61
  101731. CVMX_NPI_PCI_CFG62
  101732. CVMX_NPI_PCI_CFG63
  101733. CVMX_NPI_PCI_CNT_REG
  101734. CVMX_NPI_PCI_CTL_STATUS_2
  101735. CVMX_NPI_PCI_INT_ARB_CFG
  101736. CVMX_NPI_PCI_INT_ENB2
  101737. CVMX_NPI_PCI_INT_SUM2
  101738. CVMX_NPI_PCI_READ_CMD
  101739. CVMX_NPI_PCI_READ_CMD_6
  101740. CVMX_NPI_PCI_READ_CMD_C
  101741. CVMX_NPI_PCI_READ_CMD_E
  101742. CVMX_NPI_PCI_SCM_REG
  101743. CVMX_NPI_PCI_TSR_REG
  101744. CVMX_NPI_PORT32_INSTR_HDR
  101745. CVMX_NPI_PORT33_INSTR_HDR
  101746. CVMX_NPI_PORT34_INSTR_HDR
  101747. CVMX_NPI_PORT35_INSTR_HDR
  101748. CVMX_NPI_PORT_BP_CONTROL
  101749. CVMX_NPI_PX_DBPAIR_ADDR
  101750. CVMX_NPI_PX_INSTR_ADDR
  101751. CVMX_NPI_PX_INSTR_CNTS
  101752. CVMX_NPI_PX_PAIR_CNTS
  101753. CVMX_NPI_RSL_INT_BLOCKS
  101754. CVMX_NPI_SIZE_INPUT0
  101755. CVMX_NPI_SIZE_INPUT1
  101756. CVMX_NPI_SIZE_INPUT2
  101757. CVMX_NPI_SIZE_INPUT3
  101758. CVMX_NPI_SIZE_INPUTX
  101759. CVMX_NPI_WIN_READ_TO
  101760. CVMX_NULL_POINTER_PROTECT
  101761. CVMX_OCT_DID_ASX0
  101762. CVMX_OCT_DID_ASX1
  101763. CVMX_OCT_DID_DFA
  101764. CVMX_OCT_DID_DFA_CSR
  101765. CVMX_OCT_DID_FAU_FAI
  101766. CVMX_OCT_DID_FPA
  101767. CVMX_OCT_DID_GMX0
  101768. CVMX_OCT_DID_GMX1
  101769. CVMX_OCT_DID_IOB
  101770. CVMX_OCT_DID_IPD
  101771. CVMX_OCT_DID_IPD_CSR
  101772. CVMX_OCT_DID_KEY
  101773. CVMX_OCT_DID_KEY_RW
  101774. CVMX_OCT_DID_L2C
  101775. CVMX_OCT_DID_LMC
  101776. CVMX_OCT_DID_MIS
  101777. CVMX_OCT_DID_MIS_BOO
  101778. CVMX_OCT_DID_MIS_CSR
  101779. CVMX_OCT_DID_PCI
  101780. CVMX_OCT_DID_PCI_6
  101781. CVMX_OCT_DID_PCI_RML
  101782. CVMX_OCT_DID_PIP
  101783. CVMX_OCT_DID_PKT
  101784. CVMX_OCT_DID_PKT_SEND
  101785. CVMX_OCT_DID_RNG
  101786. CVMX_OCT_DID_SPX0
  101787. CVMX_OCT_DID_SPX1
  101788. CVMX_OCT_DID_TAG
  101789. CVMX_OCT_DID_TAG_CSR
  101790. CVMX_OCT_DID_TAG_NULL_RD
  101791. CVMX_OCT_DID_TAG_SWTAG
  101792. CVMX_OCT_DID_TAG_TAG1
  101793. CVMX_OCT_DID_TAG_TAG2
  101794. CVMX_OCT_DID_TAG_TAG3
  101795. CVMX_OCT_DID_TIM
  101796. CVMX_OCT_DID_TIM_CSR
  101797. CVMX_OCT_DID_ZIP
  101798. CVMX_OCT_DID_ZIP_CSR
  101799. CVMX_PCIERCX_CFG001
  101800. CVMX_PCIERCX_CFG006
  101801. CVMX_PCIERCX_CFG008
  101802. CVMX_PCIERCX_CFG009
  101803. CVMX_PCIERCX_CFG010
  101804. CVMX_PCIERCX_CFG011
  101805. CVMX_PCIERCX_CFG030
  101806. CVMX_PCIERCX_CFG031
  101807. CVMX_PCIERCX_CFG032
  101808. CVMX_PCIERCX_CFG034
  101809. CVMX_PCIERCX_CFG035
  101810. CVMX_PCIERCX_CFG040
  101811. CVMX_PCIERCX_CFG066
  101812. CVMX_PCIERCX_CFG069
  101813. CVMX_PCIERCX_CFG070
  101814. CVMX_PCIERCX_CFG075
  101815. CVMX_PCIERCX_CFG448
  101816. CVMX_PCIERCX_CFG452
  101817. CVMX_PCIERCX_CFG455
  101818. CVMX_PCIERCX_CFG515
  101819. CVMX_PCIE_BAR1_PHYS_BASE
  101820. CVMX_PCIE_BAR1_PHYS_SIZE
  101821. CVMX_PCIE_BAR1_RC_BASE
  101822. CVMX_PCI_BAR1_INDEXX
  101823. CVMX_PCI_BIST_REG
  101824. CVMX_PCI_CFG00
  101825. CVMX_PCI_CFG01
  101826. CVMX_PCI_CFG02
  101827. CVMX_PCI_CFG03
  101828. CVMX_PCI_CFG04
  101829. CVMX_PCI_CFG05
  101830. CVMX_PCI_CFG06
  101831. CVMX_PCI_CFG07
  101832. CVMX_PCI_CFG08
  101833. CVMX_PCI_CFG09
  101834. CVMX_PCI_CFG10
  101835. CVMX_PCI_CFG11
  101836. CVMX_PCI_CFG12
  101837. CVMX_PCI_CFG13
  101838. CVMX_PCI_CFG15
  101839. CVMX_PCI_CFG16
  101840. CVMX_PCI_CFG17
  101841. CVMX_PCI_CFG18
  101842. CVMX_PCI_CFG19
  101843. CVMX_PCI_CFG20
  101844. CVMX_PCI_CFG21
  101845. CVMX_PCI_CFG22
  101846. CVMX_PCI_CFG56
  101847. CVMX_PCI_CFG57
  101848. CVMX_PCI_CFG58
  101849. CVMX_PCI_CFG59
  101850. CVMX_PCI_CFG60
  101851. CVMX_PCI_CFG61
  101852. CVMX_PCI_CFG62
  101853. CVMX_PCI_CFG63
  101854. CVMX_PCI_CNT_REG
  101855. CVMX_PCI_CTL_STATUS_2
  101856. CVMX_PCI_DBELL_X
  101857. CVMX_PCI_DMA_CNT0
  101858. CVMX_PCI_DMA_CNT1
  101859. CVMX_PCI_DMA_CNTX
  101860. CVMX_PCI_DMA_INT_LEV0
  101861. CVMX_PCI_DMA_INT_LEV1
  101862. CVMX_PCI_DMA_INT_LEVX
  101863. CVMX_PCI_DMA_TIME0
  101864. CVMX_PCI_DMA_TIME1
  101865. CVMX_PCI_DMA_TIMEX
  101866. CVMX_PCI_INSTR_COUNT0
  101867. CVMX_PCI_INSTR_COUNT1
  101868. CVMX_PCI_INSTR_COUNT2
  101869. CVMX_PCI_INSTR_COUNT3
  101870. CVMX_PCI_INSTR_COUNTX
  101871. CVMX_PCI_INT_ENB
  101872. CVMX_PCI_INT_ENB2
  101873. CVMX_PCI_INT_SUM
  101874. CVMX_PCI_INT_SUM2
  101875. CVMX_PCI_MSI_RCV
  101876. CVMX_PCI_PKTS_SENT0
  101877. CVMX_PCI_PKTS_SENT1
  101878. CVMX_PCI_PKTS_SENT2
  101879. CVMX_PCI_PKTS_SENT3
  101880. CVMX_PCI_PKTS_SENTX
  101881. CVMX_PCI_PKTS_SENT_INT_LEV0
  101882. CVMX_PCI_PKTS_SENT_INT_LEV1
  101883. CVMX_PCI_PKTS_SENT_INT_LEV2
  101884. CVMX_PCI_PKTS_SENT_INT_LEV3
  101885. CVMX_PCI_PKTS_SENT_INT_LEVX
  101886. CVMX_PCI_PKTS_SENT_TIME0
  101887. CVMX_PCI_PKTS_SENT_TIME1
  101888. CVMX_PCI_PKTS_SENT_TIME2
  101889. CVMX_PCI_PKTS_SENT_TIME3
  101890. CVMX_PCI_PKTS_SENT_TIMEX
  101891. CVMX_PCI_PKT_CREDITS0
  101892. CVMX_PCI_PKT_CREDITS1
  101893. CVMX_PCI_PKT_CREDITS2
  101894. CVMX_PCI_PKT_CREDITS3
  101895. CVMX_PCI_PKT_CREDITSX
  101896. CVMX_PCI_READ_CMD_6
  101897. CVMX_PCI_READ_CMD_C
  101898. CVMX_PCI_READ_CMD_E
  101899. CVMX_PCI_READ_TIMEOUT
  101900. CVMX_PCI_SCM_REG
  101901. CVMX_PCI_TSR_REG
  101902. CVMX_PCI_WIN_RD_ADDR
  101903. CVMX_PCI_WIN_RD_DATA
  101904. CVMX_PCI_WIN_WR_ADDR
  101905. CVMX_PCI_WIN_WR_DATA
  101906. CVMX_PCI_WIN_WR_MASK
  101907. CVMX_PCSXX_10GBX_STATUS_REG
  101908. CVMX_PCSXX_BIST_STATUS_REG
  101909. CVMX_PCSXX_BIT_LOCK_STATUS_REG
  101910. CVMX_PCSXX_CONTROL1_REG
  101911. CVMX_PCSXX_CONTROL2_REG
  101912. CVMX_PCSXX_INT_EN_REG
  101913. CVMX_PCSXX_INT_REG
  101914. CVMX_PCSXX_LOG_ANL_REG
  101915. CVMX_PCSXX_MISC_CTL_REG
  101916. CVMX_PCSXX_RX_SYNC_STATES_REG
  101917. CVMX_PCSXX_SPD_ABIL_REG
  101918. CVMX_PCSXX_STATUS1_REG
  101919. CVMX_PCSXX_STATUS2_REG
  101920. CVMX_PCSXX_TX_RX_POLARITY_REG
  101921. CVMX_PCSXX_TX_RX_STATES_REG
  101922. CVMX_PCSX_ANX_ADV_REG
  101923. CVMX_PCSX_ANX_EXT_ST_REG
  101924. CVMX_PCSX_ANX_LP_ABIL_REG
  101925. CVMX_PCSX_ANX_RESULTS_REG
  101926. CVMX_PCSX_INTX_EN_REG
  101927. CVMX_PCSX_INTX_REG
  101928. CVMX_PCSX_LINKX_TIMER_COUNT_REG
  101929. CVMX_PCSX_LOG_ANLX_REG
  101930. CVMX_PCSX_MISCX_CTL_REG
  101931. CVMX_PCSX_MRX_CONTROL_REG
  101932. CVMX_PCSX_MRX_STATUS_REG
  101933. CVMX_PCSX_RXX_STATES_REG
  101934. CVMX_PCSX_RXX_SYNC_REG
  101935. CVMX_PCSX_SGMX_AN_ADV_REG
  101936. CVMX_PCSX_SGMX_LP_ADV_REG
  101937. CVMX_PCSX_TXX_STATES_REG
  101938. CVMX_PCSX_TX_RXX_POLARITY_REG
  101939. CVMX_PEMX_BAR1_INDEXX
  101940. CVMX_PEMX_BAR2_MASK
  101941. CVMX_PEMX_BAR_CTL
  101942. CVMX_PEMX_BIST_STATUS
  101943. CVMX_PEMX_BIST_STATUS2
  101944. CVMX_PEMX_CFG_RD
  101945. CVMX_PEMX_CFG_WR
  101946. CVMX_PEMX_CPL_LUT_VALID
  101947. CVMX_PEMX_CTL_STATUS
  101948. CVMX_PEMX_DBG_INFO
  101949. CVMX_PEMX_DBG_INFO_EN
  101950. CVMX_PEMX_DIAG_STATUS
  101951. CVMX_PEMX_INB_READ_CREDITS
  101952. CVMX_PEMX_INT_ENB
  101953. CVMX_PEMX_INT_ENB_INT
  101954. CVMX_PEMX_INT_SUM
  101955. CVMX_PEMX_P2N_BAR0_START
  101956. CVMX_PEMX_P2N_BAR1_START
  101957. CVMX_PEMX_P2N_BAR2_START
  101958. CVMX_PEMX_P2P_BARX_END
  101959. CVMX_PEMX_P2P_BARX_START
  101960. CVMX_PEMX_TLP_CREDITS
  101961. CVMX_PESCX_BIST_STATUS
  101962. CVMX_PESCX_BIST_STATUS2
  101963. CVMX_PESCX_CFG_RD
  101964. CVMX_PESCX_CFG_WR
  101965. CVMX_PESCX_CPL_LUT_VALID
  101966. CVMX_PESCX_CTL_STATUS
  101967. CVMX_PESCX_CTL_STATUS2
  101968. CVMX_PESCX_DBG_INFO
  101969. CVMX_PESCX_DBG_INFO_EN
  101970. CVMX_PESCX_DIAG_STATUS
  101971. CVMX_PESCX_P2N_BAR0_START
  101972. CVMX_PESCX_P2N_BAR1_START
  101973. CVMX_PESCX_P2N_BAR2_START
  101974. CVMX_PESCX_P2P_BARX_END
  101975. CVMX_PESCX_P2P_BARX_START
  101976. CVMX_PESCX_TLP_CREDITS
  101977. CVMX_PEXP_NPEI_BAR1_INDEXX
  101978. CVMX_PEXP_NPEI_BIST_STATUS
  101979. CVMX_PEXP_NPEI_BIST_STATUS2
  101980. CVMX_PEXP_NPEI_CTL_PORT0
  101981. CVMX_PEXP_NPEI_CTL_PORT1
  101982. CVMX_PEXP_NPEI_CTL_STATUS
  101983. CVMX_PEXP_NPEI_CTL_STATUS2
  101984. CVMX_PEXP_NPEI_DATA_OUT_CNT
  101985. CVMX_PEXP_NPEI_DBG_DATA
  101986. CVMX_PEXP_NPEI_DBG_SELECT
  101987. CVMX_PEXP_NPEI_DMA0_INT_LEVEL
  101988. CVMX_PEXP_NPEI_DMA1_INT_LEVEL
  101989. CVMX_PEXP_NPEI_DMAX_COUNTS
  101990. CVMX_PEXP_NPEI_DMAX_DBELL
  101991. CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR
  101992. CVMX_PEXP_NPEI_DMAX_NADDR
  101993. CVMX_PEXP_NPEI_DMA_CNTS
  101994. CVMX_PEXP_NPEI_DMA_CONTROL
  101995. CVMX_PEXP_NPEI_DMA_PCIE_REQ_NUM
  101996. CVMX_PEXP_NPEI_DMA_STATE1
  101997. CVMX_PEXP_NPEI_DMA_STATE1_P1
  101998. CVMX_PEXP_NPEI_DMA_STATE2
  101999. CVMX_PEXP_NPEI_DMA_STATE2_P1
  102000. CVMX_PEXP_NPEI_DMA_STATE3_P1
  102001. CVMX_PEXP_NPEI_DMA_STATE4_P1
  102002. CVMX_PEXP_NPEI_DMA_STATE5_P1
  102003. CVMX_PEXP_NPEI_INT_A_ENB
  102004. CVMX_PEXP_NPEI_INT_A_ENB2
  102005. CVMX_PEXP_NPEI_INT_A_SUM
  102006. CVMX_PEXP_NPEI_INT_ENB
  102007. CVMX_PEXP_NPEI_INT_ENB2
  102008. CVMX_PEXP_NPEI_INT_INFO
  102009. CVMX_PEXP_NPEI_INT_SUM
  102010. CVMX_PEXP_NPEI_INT_SUM2
  102011. CVMX_PEXP_NPEI_LAST_WIN_RDATA0
  102012. CVMX_PEXP_NPEI_LAST_WIN_RDATA1
  102013. CVMX_PEXP_NPEI_MEM_ACCESS_CTL
  102014. CVMX_PEXP_NPEI_MEM_ACCESS_SUBIDX
  102015. CVMX_PEXP_NPEI_MSI_ENB0
  102016. CVMX_PEXP_NPEI_MSI_ENB1
  102017. CVMX_PEXP_NPEI_MSI_ENB2
  102018. CVMX_PEXP_NPEI_MSI_ENB3
  102019. CVMX_PEXP_NPEI_MSI_RCV0
  102020. CVMX_PEXP_NPEI_MSI_RCV1
  102021. CVMX_PEXP_NPEI_MSI_RCV2
  102022. CVMX_PEXP_NPEI_MSI_RCV3
  102023. CVMX_PEXP_NPEI_MSI_RD_MAP
  102024. CVMX_PEXP_NPEI_MSI_W1C_ENB0
  102025. CVMX_PEXP_NPEI_MSI_W1C_ENB1
  102026. CVMX_PEXP_NPEI_MSI_W1C_ENB2
  102027. CVMX_PEXP_NPEI_MSI_W1C_ENB3
  102028. CVMX_PEXP_NPEI_MSI_W1S_ENB0
  102029. CVMX_PEXP_NPEI_MSI_W1S_ENB1
  102030. CVMX_PEXP_NPEI_MSI_W1S_ENB2
  102031. CVMX_PEXP_NPEI_MSI_W1S_ENB3
  102032. CVMX_PEXP_NPEI_MSI_WR_MAP
  102033. CVMX_PEXP_NPEI_PCIE_CREDIT_CNT
  102034. CVMX_PEXP_NPEI_PCIE_MSI_RCV
  102035. CVMX_PEXP_NPEI_PCIE_MSI_RCV_B1
  102036. CVMX_PEXP_NPEI_PCIE_MSI_RCV_B2
  102037. CVMX_PEXP_NPEI_PCIE_MSI_RCV_B3
  102038. CVMX_PEXP_NPEI_PKTX_CNTS
  102039. CVMX_PEXP_NPEI_PKTX_INSTR_BADDR
  102040. CVMX_PEXP_NPEI_PKTX_INSTR_BAOFF_DBELL
  102041. CVMX_PEXP_NPEI_PKTX_INSTR_FIFO_RSIZE
  102042. CVMX_PEXP_NPEI_PKTX_INSTR_HEADER
  102043. CVMX_PEXP_NPEI_PKTX_IN_BP
  102044. CVMX_PEXP_NPEI_PKTX_SLIST_BADDR
  102045. CVMX_PEXP_NPEI_PKTX_SLIST_BAOFF_DBELL
  102046. CVMX_PEXP_NPEI_PKTX_SLIST_FIFO_RSIZE
  102047. CVMX_PEXP_NPEI_PKT_CNT_INT
  102048. CVMX_PEXP_NPEI_PKT_CNT_INT_ENB
  102049. CVMX_PEXP_NPEI_PKT_DATA_OUT_ES
  102050. CVMX_PEXP_NPEI_PKT_DATA_OUT_NS
  102051. CVMX_PEXP_NPEI_PKT_DATA_OUT_ROR
  102052. CVMX_PEXP_NPEI_PKT_DPADDR
  102053. CVMX_PEXP_NPEI_PKT_INPUT_CONTROL
  102054. CVMX_PEXP_NPEI_PKT_INSTR_ENB
  102055. CVMX_PEXP_NPEI_PKT_INSTR_RD_SIZE
  102056. CVMX_PEXP_NPEI_PKT_INSTR_SIZE
  102057. CVMX_PEXP_NPEI_PKT_INT_LEVELS
  102058. CVMX_PEXP_NPEI_PKT_IN_BP
  102059. CVMX_PEXP_NPEI_PKT_IN_DONEX_CNTS
  102060. CVMX_PEXP_NPEI_PKT_IN_INSTR_COUNTS
  102061. CVMX_PEXP_NPEI_PKT_IN_PCIE_PORT
  102062. CVMX_PEXP_NPEI_PKT_IPTR
  102063. CVMX_PEXP_NPEI_PKT_OUTPUT_WMARK
  102064. CVMX_PEXP_NPEI_PKT_OUT_BMODE
  102065. CVMX_PEXP_NPEI_PKT_OUT_ENB
  102066. CVMX_PEXP_NPEI_PKT_PCIE_PORT
  102067. CVMX_PEXP_NPEI_PKT_PORT_IN_RST
  102068. CVMX_PEXP_NPEI_PKT_SLIST_ES
  102069. CVMX_PEXP_NPEI_PKT_SLIST_ID_SIZE
  102070. CVMX_PEXP_NPEI_PKT_SLIST_NS
  102071. CVMX_PEXP_NPEI_PKT_SLIST_ROR
  102072. CVMX_PEXP_NPEI_PKT_TIME_INT
  102073. CVMX_PEXP_NPEI_PKT_TIME_INT_ENB
  102074. CVMX_PEXP_NPEI_RSL_INT_BLOCKS
  102075. CVMX_PEXP_NPEI_SCRATCH_1
  102076. CVMX_PEXP_NPEI_STATE1
  102077. CVMX_PEXP_NPEI_STATE2
  102078. CVMX_PEXP_NPEI_STATE3
  102079. CVMX_PEXP_NPEI_WINDOW_CTL
  102080. CVMX_PEXP_SLI_BIST_STATUS
  102081. CVMX_PEXP_SLI_CTL_PORTX
  102082. CVMX_PEXP_SLI_CTL_STATUS
  102083. CVMX_PEXP_SLI_DATA_OUT_CNT
  102084. CVMX_PEXP_SLI_DBG_DATA
  102085. CVMX_PEXP_SLI_DBG_SELECT
  102086. CVMX_PEXP_SLI_DMAX_CNT
  102087. CVMX_PEXP_SLI_DMAX_INT_LEVEL
  102088. CVMX_PEXP_SLI_DMAX_TIM
  102089. CVMX_PEXP_SLI_INT_ENB_CIU
  102090. CVMX_PEXP_SLI_INT_ENB_PORTX
  102091. CVMX_PEXP_SLI_INT_SUM
  102092. CVMX_PEXP_SLI_LAST_WIN_RDATA0
  102093. CVMX_PEXP_SLI_LAST_WIN_RDATA1
  102094. CVMX_PEXP_SLI_LAST_WIN_RDATA2
  102095. CVMX_PEXP_SLI_LAST_WIN_RDATA3
  102096. CVMX_PEXP_SLI_MAC_CREDIT_CNT
  102097. CVMX_PEXP_SLI_MAC_CREDIT_CNT2
  102098. CVMX_PEXP_SLI_MEM_ACCESS_CTL
  102099. CVMX_PEXP_SLI_MEM_ACCESS_SUBIDX
  102100. CVMX_PEXP_SLI_MSI_ENB0
  102101. CVMX_PEXP_SLI_MSI_ENB1
  102102. CVMX_PEXP_SLI_MSI_ENB2
  102103. CVMX_PEXP_SLI_MSI_ENB3
  102104. CVMX_PEXP_SLI_MSI_RCV0
  102105. CVMX_PEXP_SLI_MSI_RCV1
  102106. CVMX_PEXP_SLI_MSI_RCV2
  102107. CVMX_PEXP_SLI_MSI_RCV3
  102108. CVMX_PEXP_SLI_MSI_RD_MAP
  102109. CVMX_PEXP_SLI_MSI_W1C_ENB0
  102110. CVMX_PEXP_SLI_MSI_W1C_ENB1
  102111. CVMX_PEXP_SLI_MSI_W1C_ENB2
  102112. CVMX_PEXP_SLI_MSI_W1C_ENB3
  102113. CVMX_PEXP_SLI_MSI_W1S_ENB0
  102114. CVMX_PEXP_SLI_MSI_W1S_ENB1
  102115. CVMX_PEXP_SLI_MSI_W1S_ENB2
  102116. CVMX_PEXP_SLI_MSI_W1S_ENB3
  102117. CVMX_PEXP_SLI_MSI_WR_MAP
  102118. CVMX_PEXP_SLI_PCIE_MSI_RCV
  102119. CVMX_PEXP_SLI_PCIE_MSI_RCV_B1
  102120. CVMX_PEXP_SLI_PCIE_MSI_RCV_B2
  102121. CVMX_PEXP_SLI_PCIE_MSI_RCV_B3
  102122. CVMX_PEXP_SLI_PKTX_CNTS
  102123. CVMX_PEXP_SLI_PKTX_INSTR_BADDR
  102124. CVMX_PEXP_SLI_PKTX_INSTR_BAOFF_DBELL
  102125. CVMX_PEXP_SLI_PKTX_INSTR_FIFO_RSIZE
  102126. CVMX_PEXP_SLI_PKTX_INSTR_HEADER
  102127. CVMX_PEXP_SLI_PKTX_IN_BP
  102128. CVMX_PEXP_SLI_PKTX_OUT_SIZE
  102129. CVMX_PEXP_SLI_PKTX_SLIST_BADDR
  102130. CVMX_PEXP_SLI_PKTX_SLIST_BAOFF_DBELL
  102131. CVMX_PEXP_SLI_PKTX_SLIST_FIFO_RSIZE
  102132. CVMX_PEXP_SLI_PKT_CNT_INT
  102133. CVMX_PEXP_SLI_PKT_CNT_INT_ENB
  102134. CVMX_PEXP_SLI_PKT_CTL
  102135. CVMX_PEXP_SLI_PKT_DATA_OUT_ES
  102136. CVMX_PEXP_SLI_PKT_DATA_OUT_NS
  102137. CVMX_PEXP_SLI_PKT_DATA_OUT_ROR
  102138. CVMX_PEXP_SLI_PKT_DPADDR
  102139. CVMX_PEXP_SLI_PKT_INPUT_CONTROL
  102140. CVMX_PEXP_SLI_PKT_INSTR_ENB
  102141. CVMX_PEXP_SLI_PKT_INSTR_RD_SIZE
  102142. CVMX_PEXP_SLI_PKT_INSTR_SIZE
  102143. CVMX_PEXP_SLI_PKT_INT_LEVELS
  102144. CVMX_PEXP_SLI_PKT_IN_BP
  102145. CVMX_PEXP_SLI_PKT_IN_DONEX_CNTS
  102146. CVMX_PEXP_SLI_PKT_IN_INSTR_COUNTS
  102147. CVMX_PEXP_SLI_PKT_IN_PCIE_PORT
  102148. CVMX_PEXP_SLI_PKT_IPTR
  102149. CVMX_PEXP_SLI_PKT_OUTPUT_WMARK
  102150. CVMX_PEXP_SLI_PKT_OUT_BMODE
  102151. CVMX_PEXP_SLI_PKT_OUT_BP_EN
  102152. CVMX_PEXP_SLI_PKT_OUT_ENB
  102153. CVMX_PEXP_SLI_PKT_PCIE_PORT
  102154. CVMX_PEXP_SLI_PKT_PORT_IN_RST
  102155. CVMX_PEXP_SLI_PKT_SLIST_ES
  102156. CVMX_PEXP_SLI_PKT_SLIST_NS
  102157. CVMX_PEXP_SLI_PKT_SLIST_ROR
  102158. CVMX_PEXP_SLI_PKT_TIME_INT
  102159. CVMX_PEXP_SLI_PKT_TIME_INT_ENB
  102160. CVMX_PEXP_SLI_PORTX_PKIND
  102161. CVMX_PEXP_SLI_S2M_PORTX_CTL
  102162. CVMX_PEXP_SLI_SCRATCH_1
  102163. CVMX_PEXP_SLI_SCRATCH_2
  102164. CVMX_PEXP_SLI_STATE1
  102165. CVMX_PEXP_SLI_STATE2
  102166. CVMX_PEXP_SLI_STATE3
  102167. CVMX_PEXP_SLI_TX_PIPE
  102168. CVMX_PEXP_SLI_WINDOW_CTL
  102169. CVMX_PIP_ALIGN_ERR
  102170. CVMX_PIP_ALT_SKIP_CFGX
  102171. CVMX_PIP_BAD_PRT_ERR
  102172. CVMX_PIP_BCK_PRS
  102173. CVMX_PIP_BIST_STATUS
  102174. CVMX_PIP_BSEL_EXT_CFGX
  102175. CVMX_PIP_BSEL_EXT_POSX
  102176. CVMX_PIP_BSEL_TBL_ENTX
  102177. CVMX_PIP_CHK_ERR
  102178. CVMX_PIP_CLKEN
  102179. CVMX_PIP_CRC_CTLX
  102180. CVMX_PIP_CRC_IVX
  102181. CVMX_PIP_DAT_ERR
  102182. CVMX_PIP_DEC_IPSECX
  102183. CVMX_PIP_DIP_ERR
  102184. CVMX_PIP_DSA_SRC_GRP
  102185. CVMX_PIP_DSA_VID_GRP
  102186. CVMX_PIP_EXTEND_ERR
  102187. CVMX_PIP_FRM_LEN_CHKX
  102188. CVMX_PIP_GBL_CFG
  102189. CVMX_PIP_GBL_CTL
  102190. CVMX_PIP_GMX_FCS_ERR
  102191. CVMX_PIP_HG_PRI_QOS
  102192. CVMX_PIP_INT_EN
  102193. CVMX_PIP_INT_REG
  102194. CVMX_PIP_IPV4_HDR_CHK
  102195. CVMX_PIP_IP_MAL_HDR
  102196. CVMX_PIP_IP_MAL_PKT
  102197. CVMX_PIP_IP_NO_ERR
  102198. CVMX_PIP_IP_OFFSET
  102199. CVMX_PIP_JABBER_ERR
  102200. CVMX_PIP_L4_LENGTH_ERR
  102201. CVMX_PIP_L4_MAL_ERR
  102202. CVMX_PIP_L4_NO_ERR
  102203. CVMX_PIP_LENGTH_ERR
  102204. CVMX_PIP_NIBBLE_ERR
  102205. CVMX_PIP_NOT_IP
  102206. CVMX_PIP_NUM_INPUT_PORTS
  102207. CVMX_PIP_NUM_WATCHERS
  102208. CVMX_PIP_OPTS
  102209. CVMX_PIP_OVER_ERR
  102210. CVMX_PIP_OVER_FCS_ERR
  102211. CVMX_PIP_PARTIAL_ERR
  102212. CVMX_PIP_PIP_FCS
  102213. CVMX_PIP_PIP_L2_MAL_HDR
  102214. CVMX_PIP_PIP_SKIP_ERR
  102215. CVMX_PIP_PORT_CFG_MODE_NONE
  102216. CVMX_PIP_PORT_CFG_MODE_SKIPIP
  102217. CVMX_PIP_PORT_CFG_MODE_SKIPL2
  102218. CVMX_PIP_PRI_TBLX
  102219. CVMX_PIP_PRT_CFGBX
  102220. CVMX_PIP_PRT_CFGX
  102221. CVMX_PIP_PRT_TAGX
  102222. CVMX_PIP_QOS_DIFFX
  102223. CVMX_PIP_QOS_VLANX
  102224. CVMX_PIP_QOS_WATCHX
  102225. CVMX_PIP_RAW_WORD
  102226. CVMX_PIP_RX_NO_ERR
  102227. CVMX_PIP_SFT_RST
  102228. CVMX_PIP_SKIP_ERR
  102229. CVMX_PIP_STAT0_PRTX
  102230. CVMX_PIP_STAT0_X
  102231. CVMX_PIP_STAT10_PRTX
  102232. CVMX_PIP_STAT10_X
  102233. CVMX_PIP_STAT11_PRTX
  102234. CVMX_PIP_STAT11_X
  102235. CVMX_PIP_STAT1_PRTX
  102236. CVMX_PIP_STAT1_X
  102237. CVMX_PIP_STAT2_PRTX
  102238. CVMX_PIP_STAT2_X
  102239. CVMX_PIP_STAT3_PRTX
  102240. CVMX_PIP_STAT3_X
  102241. CVMX_PIP_STAT4_PRTX
  102242. CVMX_PIP_STAT4_X
  102243. CVMX_PIP_STAT5_PRTX
  102244. CVMX_PIP_STAT5_X
  102245. CVMX_PIP_STAT6_PRTX
  102246. CVMX_PIP_STAT6_X
  102247. CVMX_PIP_STAT7_PRTX
  102248. CVMX_PIP_STAT7_X
  102249. CVMX_PIP_STAT8_PRTX
  102250. CVMX_PIP_STAT8_X
  102251. CVMX_PIP_STAT9_PRTX
  102252. CVMX_PIP_STAT9_X
  102253. CVMX_PIP_STAT_CTL
  102254. CVMX_PIP_STAT_INB_ERRSX
  102255. CVMX_PIP_STAT_INB_ERRS_PKNDX
  102256. CVMX_PIP_STAT_INB_OCTSX
  102257. CVMX_PIP_STAT_INB_OCTS_PKNDX
  102258. CVMX_PIP_STAT_INB_PKTSX
  102259. CVMX_PIP_STAT_INB_PKTS_PKNDX
  102260. CVMX_PIP_SUB_PKIND_FCSX
  102261. CVMX_PIP_TAG_INCX
  102262. CVMX_PIP_TAG_MASK
  102263. CVMX_PIP_TAG_SECRET
  102264. CVMX_PIP_TCP_FLG10_ERR
  102265. CVMX_PIP_TCP_FLG11_ERR
  102266. CVMX_PIP_TCP_FLG12_ERR
  102267. CVMX_PIP_TCP_FLG13_ERR
  102268. CVMX_PIP_TCP_FLG8_ERR
  102269. CVMX_PIP_TCP_FLG9_ERR
  102270. CVMX_PIP_TODO_ENTRY
  102271. CVMX_PIP_TTL_HOP
  102272. CVMX_PIP_UNDER_ERR
  102273. CVMX_PIP_UNDER_FCS_ERR
  102274. CVMX_PIP_VLAN_ETYPESX
  102275. CVMX_PIP_XSTAT0_PRTX
  102276. CVMX_PIP_XSTAT10_PRTX
  102277. CVMX_PIP_XSTAT11_PRTX
  102278. CVMX_PIP_XSTAT1_PRTX
  102279. CVMX_PIP_XSTAT2_PRTX
  102280. CVMX_PIP_XSTAT3_PRTX
  102281. CVMX_PIP_XSTAT4_PRTX
  102282. CVMX_PIP_XSTAT5_PRTX
  102283. CVMX_PIP_XSTAT6_PRTX
  102284. CVMX_PIP_XSTAT7_PRTX
  102285. CVMX_PIP_XSTAT8_PRTX
  102286. CVMX_PIP_XSTAT9_PRTX
  102287. CVMX_PKO_CMD_QUEUE_INIT_ERROR
  102288. CVMX_PKO_COMMAND_BUFFER_SIZE_ADJUST
  102289. CVMX_PKO_ILLEGAL_QUEUE
  102290. CVMX_PKO_INVALID_PORT
  102291. CVMX_PKO_INVALID_PRIORITY
  102292. CVMX_PKO_INVALID_QUEUE
  102293. CVMX_PKO_LOCK_ATOMIC_TAG
  102294. CVMX_PKO_LOCK_CMD_QUEUE
  102295. CVMX_PKO_LOCK_NONE
  102296. CVMX_PKO_MAX_OUTPUT_QUEUES
  102297. CVMX_PKO_MAX_OUTPUT_QUEUES_STATIC
  102298. CVMX_PKO_MAX_PORTS_INTERFACE0
  102299. CVMX_PKO_MAX_PORTS_INTERFACE1
  102300. CVMX_PKO_MAX_QUEUE_DEPTH
  102301. CVMX_PKO_MEM_COUNT0
  102302. CVMX_PKO_MEM_COUNT1
  102303. CVMX_PKO_MEM_DEBUG0
  102304. CVMX_PKO_MEM_DEBUG1
  102305. CVMX_PKO_MEM_DEBUG10
  102306. CVMX_PKO_MEM_DEBUG11
  102307. CVMX_PKO_MEM_DEBUG12
  102308. CVMX_PKO_MEM_DEBUG13
  102309. CVMX_PKO_MEM_DEBUG14
  102310. CVMX_PKO_MEM_DEBUG2
  102311. CVMX_PKO_MEM_DEBUG3
  102312. CVMX_PKO_MEM_DEBUG4
  102313. CVMX_PKO_MEM_DEBUG5
  102314. CVMX_PKO_MEM_DEBUG6
  102315. CVMX_PKO_MEM_DEBUG7
  102316. CVMX_PKO_MEM_DEBUG8
  102317. CVMX_PKO_MEM_DEBUG9
  102318. CVMX_PKO_MEM_IPORT_PTRS
  102319. CVMX_PKO_MEM_IPORT_QOS
  102320. CVMX_PKO_MEM_IQUEUE_PTRS
  102321. CVMX_PKO_MEM_IQUEUE_QOS
  102322. CVMX_PKO_MEM_PORT_PTRS
  102323. CVMX_PKO_MEM_PORT_QOS
  102324. CVMX_PKO_MEM_PORT_RATE0
  102325. CVMX_PKO_MEM_PORT_RATE1
  102326. CVMX_PKO_MEM_QUEUE_PTRS
  102327. CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID
  102328. CVMX_PKO_MEM_QUEUE_QOS
  102329. CVMX_PKO_MEM_THROTTLE_INT
  102330. CVMX_PKO_MEM_THROTTLE_PIPE
  102331. CVMX_PKO_NO_MEMORY
  102332. CVMX_PKO_NUM_OUTPUT_PORTS
  102333. CVMX_PKO_PORT_ALREADY_SETUP
  102334. CVMX_PKO_QUEUES_PER_PORT_INTERFACE0
  102335. CVMX_PKO_QUEUES_PER_PORT_INTERFACE1
  102336. CVMX_PKO_QUEUES_PER_PORT_LOOP
  102337. CVMX_PKO_QUEUES_PER_PORT_PCI
  102338. CVMX_PKO_QUEUE_STATIC_PRIORITY
  102339. CVMX_PKO_REG_BIST_RESULT
  102340. CVMX_PKO_REG_CMD_BUF
  102341. CVMX_PKO_REG_CRC_CTLX
  102342. CVMX_PKO_REG_CRC_ENABLE
  102343. CVMX_PKO_REG_CRC_IVX
  102344. CVMX_PKO_REG_DEBUG0
  102345. CVMX_PKO_REG_DEBUG1
  102346. CVMX_PKO_REG_DEBUG2
  102347. CVMX_PKO_REG_DEBUG3
  102348. CVMX_PKO_REG_DEBUG4
  102349. CVMX_PKO_REG_ENGINE_INFLIGHT
  102350. CVMX_PKO_REG_ENGINE_INFLIGHT1
  102351. CVMX_PKO_REG_ENGINE_STORAGEX
  102352. CVMX_PKO_REG_ENGINE_THRESH
  102353. CVMX_PKO_REG_ERROR
  102354. CVMX_PKO_REG_FLAGS
  102355. CVMX_PKO_REG_GMX_PORT_MODE
  102356. CVMX_PKO_REG_INT_MASK
  102357. CVMX_PKO_REG_LOOPBACK_BPID
  102358. CVMX_PKO_REG_LOOPBACK_PKIND
  102359. CVMX_PKO_REG_MIN_PKT
  102360. CVMX_PKO_REG_PREEMPT
  102361. CVMX_PKO_REG_QUEUE_MODE
  102362. CVMX_PKO_REG_QUEUE_PREEMPT
  102363. CVMX_PKO_REG_QUEUE_PTRS1
  102364. CVMX_PKO_REG_READ_IDX
  102365. CVMX_PKO_REG_THROTTLE
  102366. CVMX_PKO_REG_TIMESTAMP
  102367. CVMX_PKO_SUCCESS
  102368. CVMX_POP
  102369. CVMX_POW_BIST_STAT
  102370. CVMX_POW_DS_PC
  102371. CVMX_POW_ECC_ERR
  102372. CVMX_POW_INT_CTL
  102373. CVMX_POW_IQ_CNTX
  102374. CVMX_POW_IQ_COM_CNT
  102375. CVMX_POW_IQ_INT
  102376. CVMX_POW_IQ_INT_EN
  102377. CVMX_POW_IQ_THRX
  102378. CVMX_POW_NOS_CNT
  102379. CVMX_POW_NO_WAIT
  102380. CVMX_POW_NW_TIM
  102381. CVMX_POW_PF_RST_MSK
  102382. CVMX_POW_PP_GRP_MSKX
  102383. CVMX_POW_QOS_RNDX
  102384. CVMX_POW_QOS_THRX
  102385. CVMX_POW_TAG_OP_ADDWQ
  102386. CVMX_POW_TAG_OP_CLR_NSCHED
  102387. CVMX_POW_TAG_OP_DESCH
  102388. CVMX_POW_TAG_OP_NOP
  102389. CVMX_POW_TAG_OP_SET_NSCHED
  102390. CVMX_POW_TAG_OP_SWTAG
  102391. CVMX_POW_TAG_OP_SWTAG_DESCH
  102392. CVMX_POW_TAG_OP_SWTAG_FULL
  102393. CVMX_POW_TAG_OP_UPDATE_WQP_GRP
  102394. CVMX_POW_TAG_TYPE_ATOMIC
  102395. CVMX_POW_TAG_TYPE_NULL
  102396. CVMX_POW_TAG_TYPE_NULL_NULL
  102397. CVMX_POW_TAG_TYPE_ORDERED
  102398. CVMX_POW_TS_PC
  102399. CVMX_POW_WAIT
  102400. CVMX_POW_WA_COM_PC
  102401. CVMX_POW_WA_PCX
  102402. CVMX_POW_WQ_INT
  102403. CVMX_POW_WQ_INT_CNTX
  102404. CVMX_POW_WQ_INT_PC
  102405. CVMX_POW_WQ_INT_THRX
  102406. CVMX_POW_WS_PCX
  102407. CVMX_PREPARE_FOR_STORE
  102408. CVMX_RDHWR
  102409. CVMX_RDHWRNV
  102410. CVMX_RNM_BIST_STATUS
  102411. CVMX_RNM_CTL_STATUS
  102412. CVMX_RNM_EER_DBG
  102413. CVMX_RNM_EER_KEY
  102414. CVMX_RNM_SERIAL_NUM
  102415. CVMX_RST_BOOT
  102416. CVMX_RST_CFG
  102417. CVMX_RST_CKILL
  102418. CVMX_RST_CTLX
  102419. CVMX_RST_DELAY
  102420. CVMX_RST_ECO
  102421. CVMX_RST_INT
  102422. CVMX_RST_OCX
  102423. CVMX_RST_POWER_DBG
  102424. CVMX_RST_PP_POWER
  102425. CVMX_RST_SOFT_PRSTX
  102426. CVMX_RST_SOFT_RST
  102427. CVMX_SATA_UCTL_SHIM_CFG
  102428. CVMX_SCRATCH_BASE
  102429. CVMX_SCR_REG_AVAIL_BASE
  102430. CVMX_SCR_SCRATCH
  102431. CVMX_SLI_PCIE_MSI_RCV
  102432. CVMX_SLI_PCIE_MSI_RCV_FUNC
  102433. CVMX_SPINLOCK_LOCKED_VAL
  102434. CVMX_SPINLOCK_UNLOCKED_INITIALIZER
  102435. CVMX_SPINLOCK_UNLOCKED_VAL
  102436. CVMX_SPI_MODE_DUPLEX
  102437. CVMX_SPI_MODE_RX_HALFPLEX
  102438. CVMX_SPI_MODE_TX_HALFPLEX
  102439. CVMX_SPI_MODE_UNKNOWN
  102440. CVMX_SPXX_BCKPRS_CNT
  102441. CVMX_SPXX_BIST_STAT
  102442. CVMX_SPXX_CLK_CTL
  102443. CVMX_SPXX_CLK_STAT
  102444. CVMX_SPXX_DBG_DESKEW_CTL
  102445. CVMX_SPXX_DBG_DESKEW_STATE
  102446. CVMX_SPXX_DRV_CTL
  102447. CVMX_SPXX_ERR_CTL
  102448. CVMX_SPXX_INT_DAT
  102449. CVMX_SPXX_INT_MSK
  102450. CVMX_SPXX_INT_REG
  102451. CVMX_SPXX_INT_SYNC
  102452. CVMX_SPXX_TPA_ACC
  102453. CVMX_SPXX_TPA_MAX
  102454. CVMX_SPXX_TPA_SEL
  102455. CVMX_SPXX_TRN4_CTL
  102456. CVMX_SRIOX_ACC_CTRL
  102457. CVMX_SRIOX_ASMBLY_ID
  102458. CVMX_SRIOX_ASMBLY_INFO
  102459. CVMX_SRIOX_BELL_RESP_CTRL
  102460. CVMX_SRIOX_BIST_STATUS
  102461. CVMX_SRIOX_IMSG_CTRL
  102462. CVMX_SRIOX_IMSG_INST_HDRX
  102463. CVMX_SRIOX_IMSG_QOS_GRPX
  102464. CVMX_SRIOX_IMSG_STATUSX
  102465. CVMX_SRIOX_IMSG_VPORT_THR
  102466. CVMX_SRIOX_IMSG_VPORT_THR2
  102467. CVMX_SRIOX_INT2_ENABLE
  102468. CVMX_SRIOX_INT2_REG
  102469. CVMX_SRIOX_INT_ENABLE
  102470. CVMX_SRIOX_INT_INFO0
  102471. CVMX_SRIOX_INT_INFO1
  102472. CVMX_SRIOX_INT_INFO2
  102473. CVMX_SRIOX_INT_INFO3
  102474. CVMX_SRIOX_INT_REG
  102475. CVMX_SRIOX_IP_FEATURE
  102476. CVMX_SRIOX_MAC_BUFFERS
  102477. CVMX_SRIOX_MAINT_OP
  102478. CVMX_SRIOX_MAINT_RD_DATA
  102479. CVMX_SRIOX_MCE_TX_CTL
  102480. CVMX_SRIOX_MEM_OP_CTRL
  102481. CVMX_SRIOX_OMSG_CTRLX
  102482. CVMX_SRIOX_OMSG_DONE_COUNTSX
  102483. CVMX_SRIOX_OMSG_FMP_MRX
  102484. CVMX_SRIOX_OMSG_NMP_MRX
  102485. CVMX_SRIOX_OMSG_PORTX
  102486. CVMX_SRIOX_OMSG_SILO_THR
  102487. CVMX_SRIOX_OMSG_SP_MRX
  102488. CVMX_SRIOX_PRIOX_IN_USE
  102489. CVMX_SRIOX_RX_BELL
  102490. CVMX_SRIOX_RX_BELL_SEQ
  102491. CVMX_SRIOX_RX_STATUS
  102492. CVMX_SRIOX_S2M_TYPEX
  102493. CVMX_SRIOX_SEQ
  102494. CVMX_SRIOX_STATUS_REG
  102495. CVMX_SRIOX_TAG_CTRL
  102496. CVMX_SRIOX_TLP_CREDITS
  102497. CVMX_SRIOX_TX_BELL
  102498. CVMX_SRIOX_TX_BELL_INFO
  102499. CVMX_SRIOX_TX_CTRL
  102500. CVMX_SRIOX_TX_EMPHASIS
  102501. CVMX_SRIOX_TX_STATUS
  102502. CVMX_SRIOX_WR_DONE_COUNTS
  102503. CVMX_SRXX_COM_CTL
  102504. CVMX_SRXX_IGN_RX_FULL
  102505. CVMX_SRXX_SPI4_CALX
  102506. CVMX_SRXX_SPI4_STAT
  102507. CVMX_SRXX_SW_TICK_CTL
  102508. CVMX_SRXX_SW_TICK_DAT
  102509. CVMX_SSO_PPX_GRP_MSK
  102510. CVMX_SSO_WQ_INT
  102511. CVMX_SSO_WQ_INT_PC
  102512. CVMX_SSO_WQ_INT_THRX
  102513. CVMX_SSO_WQ_IQ_DIS
  102514. CVMX_STXX_ARB_CTL
  102515. CVMX_STXX_BCKPRS_CNT
  102516. CVMX_STXX_COM_CTL
  102517. CVMX_STXX_DIP_CNT
  102518. CVMX_STXX_IGN_CAL
  102519. CVMX_STXX_INT_MSK
  102520. CVMX_STXX_INT_REG
  102521. CVMX_STXX_INT_SYNC
  102522. CVMX_STXX_MIN_BST
  102523. CVMX_STXX_SPI4_CALX
  102524. CVMX_STXX_SPI4_DAT
  102525. CVMX_STXX_SPI4_STAT
  102526. CVMX_STXX_STAT_BYTES_HI
  102527. CVMX_STXX_STAT_BYTES_LO
  102528. CVMX_STXX_STAT_CTL
  102529. CVMX_STXX_STAT_PKT_XMT
  102530. CVMX_SYNC
  102531. CVMX_SYNCIO
  102532. CVMX_SYNCIOALL
  102533. CVMX_SYNCIOBDMA
  102534. CVMX_SYNCS
  102535. CVMX_SYNCW
  102536. CVMX_SYNCWS
  102537. CVMX_SYNCWS_STR
  102538. CVMX_SYNCW_STR
  102539. CVMX_TAG_SUBGROUP_MASK
  102540. CVMX_TAG_SUBGROUP_PKO
  102541. CVMX_TAG_SUBGROUP_SHIFT
  102542. CVMX_TAG_SW_BITS
  102543. CVMX_TAG_SW_BITS_INTERNAL
  102544. CVMX_TAG_SW_SHIFT
  102545. CVMX_TMP_STR
  102546. CVMX_TMP_STR2
  102547. CVMX_UAHCX_EHCI_USBCMD
  102548. CVMX_UAHCX_OHCI_USBCMD
  102549. CVMX_UCTLX_BIST_STATUS
  102550. CVMX_UCTLX_CLK_RST_CTL
  102551. CVMX_UCTLX_EHCI_CTL
  102552. CVMX_UCTLX_EHCI_FLA
  102553. CVMX_UCTLX_ERTO_CTL
  102554. CVMX_UCTLX_IF_ENA
  102555. CVMX_UCTLX_INT_ENA
  102556. CVMX_UCTLX_INT_REG
  102557. CVMX_UCTLX_OHCI_CTL
  102558. CVMX_UCTLX_ORTO_CTL
  102559. CVMX_UCTLX_PPAF_WM
  102560. CVMX_UCTLX_UPHY_CTL_STATUS
  102561. CVMX_UCTLX_UPHY_PORTX_CTL_STATUS
  102562. CVMX_USBCXBASE
  102563. CVMX_USBCXREG1
  102564. CVMX_USBCXREG2
  102565. CVMX_USBCX_GAHBCFG
  102566. CVMX_USBCX_GHWCFG3
  102567. CVMX_USBCX_GINTMSK
  102568. CVMX_USBCX_GINTSTS
  102569. CVMX_USBCX_GNPTXFSIZ
  102570. CVMX_USBCX_GNPTXSTS
  102571. CVMX_USBCX_GOTGCTL
  102572. CVMX_USBCX_GRSTCTL
  102573. CVMX_USBCX_GRXFSIZ
  102574. CVMX_USBCX_GRXSTSPH
  102575. CVMX_USBCX_GUSBCFG
  102576. CVMX_USBCX_HAINT
  102577. CVMX_USBCX_HAINTMSK
  102578. CVMX_USBCX_HCCHARX
  102579. CVMX_USBCX_HCFG
  102580. CVMX_USBCX_HCINTMSKX
  102581. CVMX_USBCX_HCINTX
  102582. CVMX_USBCX_HCSPLTX
  102583. CVMX_USBCX_HCTSIZX
  102584. CVMX_USBCX_HFIR
  102585. CVMX_USBCX_HFNUM
  102586. CVMX_USBCX_HPRT
  102587. CVMX_USBCX_HPTXFSIZ
  102588. CVMX_USBCX_HPTXSTS
  102589. CVMX_USBDRDX_UCTL_CTL
  102590. CVMX_USBNXBID1
  102591. CVMX_USBNXBID2
  102592. CVMX_USBNXREG1
  102593. CVMX_USBNXREG2
  102594. CVMX_USBNX_CLK_CTL
  102595. CVMX_USBNX_DMA0_INB_CHN0
  102596. CVMX_USBNX_DMA0_OUTB_CHN0
  102597. CVMX_USBNX_USBP_CTL_STATUS
  102598. CVMX_USB_DIRECTION_IN
  102599. CVMX_USB_DIRECTION_OUT
  102600. CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ
  102601. CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ
  102602. CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ
  102603. CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK
  102604. CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND
  102605. CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI
  102606. CVMX_USB_INITIALIZE_FLAGS_NO_DMA
  102607. CVMX_USB_PIPE_FLAGS_NEED_PING
  102608. CVMX_USB_PIPE_FLAGS_SCHEDULED
  102609. CVMX_USB_SPEED_FULL
  102610. CVMX_USB_SPEED_HIGH
  102611. CVMX_USB_SPEED_LOW
  102612. CVMX_USB_STAGE_DATA
  102613. CVMX_USB_STAGE_DATA_SPLIT_COMPLETE
  102614. CVMX_USB_STAGE_NON_CONTROL
  102615. CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE
  102616. CVMX_USB_STAGE_SETUP
  102617. CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE
  102618. CVMX_USB_STAGE_STATUS
  102619. CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE
  102620. CVMX_USB_STATUS_BABBLEERR
  102621. CVMX_USB_STATUS_CANCEL
  102622. CVMX_USB_STATUS_DATATGLERR
  102623. CVMX_USB_STATUS_ERROR
  102624. CVMX_USB_STATUS_FRAMEERR
  102625. CVMX_USB_STATUS_OK
  102626. CVMX_USB_STATUS_SHORT
  102627. CVMX_USB_STATUS_STALL
  102628. CVMX_USB_STATUS_XACTERR
  102629. CVMX_USB_TRANSFER_BULK
  102630. CVMX_USB_TRANSFER_CONTROL
  102631. CVMX_USB_TRANSFER_INTERRUPT
  102632. CVMX_USB_TRANSFER_ISOCHRONOUS
  102633. CVMX_WAIT_FOR_FIELD64
  102634. CVM_CAST64
  102635. CVM_DRV_APP_COUNT
  102636. CVM_DRV_APP_END
  102637. CVM_DRV_APP_START
  102638. CVM_DRV_BASE_APP
  102639. CVM_DRV_INVALID_APP
  102640. CVM_DRV_NIC_APP
  102641. CVM_DRV_NO_APP
  102642. CVM_OCT_SKB_CB
  102643. CVPPC_FB_APERTURE_ONE
  102644. CVPPC_FB_APERTURE_TWO
  102645. CVPPC_FB_SIZE
  102646. CVPPC_MEMCLOCK
  102647. CVPPC_MEM_CONFIG_NEW
  102648. CVPPC_MEM_CONFIG_OLD
  102649. CVPPC_PCI_CONFIG
  102650. CVPPC_REGS_REGION
  102651. CVPPC_ROM_ADDRESS
  102652. CVP_BAR
  102653. CVP_DUMMY_WR
  102654. CVR_HC
  102655. CVS_TEST
  102656. CVT_C
  102657. CVT_CELL_GRAN
  102658. CVT_CLOCK_STEP
  102659. CVT_C_FACTOR
  102660. CVT_C_PRIME
  102661. CVT_HSYNC_PERCENT
  102662. CVT_HSYNC_PERCENTAGE
  102663. CVT_H_GRANULARITY
  102664. CVT_J
  102665. CVT_J_FACTOR
  102666. CVT_K
  102667. CVT_K_FACTOR
  102668. CVT_M
  102669. CVT_MARGIN_PERCENTAGE
  102670. CVT_MIN_VSYNC_BP
  102671. CVT_MIN_V_BPORCH
  102672. CVT_MIN_V_PORCH
  102673. CVT_MIN_V_PORCH_RND
  102674. CVT_M_FACTOR
  102675. CVT_M_PRIME
  102676. CVT_PXL_CLK_GRAN
  102677. CVT_PXL_CLK_GRAN_RB_V2
  102678. CVT_RB_H_BLANK
  102679. CVT_RB_H_SYNC
  102680. CVT_RB_MIN_VBLANK
  102681. CVT_RB_MIN_V_BLANK
  102682. CVT_RB_MIN_V_BPORCH
  102683. CVT_RB_MIN_V_FPORCH
  102684. CVT_RB_V2_H_BLANK
  102685. CVT_RB_V2_MIN_V_FPORCH
  102686. CVT_RB_VFPORCH
  102687. CVT_RB_V_BPORCH
  102688. CVT_RB_V_FPORCH
  102689. CV_4100MV
  102690. CV_4150MV
  102691. CV_4200MV
  102692. CV_4350MV
  102693. CV_CTLCFG_ECC_AUTO_EN
  102694. CV_CTLCFG_ECC_CORR_EN
  102695. CV_CTLCFG_ECC_EN
  102696. CV_CTLCFG_GEN_DB_ERR
  102697. CV_CTLCFG_GEN_SB_ERR
  102698. CV_CTLCFG_OFST
  102699. CV_CURVE_CNT
  102700. CV_DBECOUNT_OFST
  102701. CV_DRAMADDRW
  102702. CV_DRAMADDRW_BANKBIT_MASK
  102703. CV_DRAMADDRW_BANKBIT_SHIFT
  102704. CV_DRAMADDRW_CSBIT_MASK
  102705. CV_DRAMADDRW_CSBIT_SHIFT
  102706. CV_DRAMADDRW_OFST
  102707. CV_DRAMIFWIDTH
  102708. CV_DRAMIFWIDTH_16B_ECC
  102709. CV_DRAMIFWIDTH_32B_ECC
  102710. CV_DRAMIFWIDTH_OFST
  102711. CV_DRAMINTR_CORRDROPMASK
  102712. CV_DRAMINTR_DBEMASK
  102713. CV_DRAMINTR_INTRCLR
  102714. CV_DRAMINTR_INTREN
  102715. CV_DRAMINTR_OFST
  102716. CV_DRAMINTR_SBEMASK
  102717. CV_DRAMSTS_CORR_DROP
  102718. CV_DRAMSTS_DBEERR
  102719. CV_DRAMSTS_OFST
  102720. CV_DRAMSTS_SBEERR
  102721. CV_ERRADDR_OFST
  102722. CV_SBECOUNT_OFST
  102723. CV_SMART_DONGLE_ADDRESS
  102724. CV_SMB_CTRL
  102725. CV_SMB_CTRL_FORCE_SMBUS
  102726. CW1200_APB
  102727. CW1200_AUTH_TIMEOUT
  102728. CW1200_BEACON_SKIPPING_MULTIPLIER
  102729. CW1200_BH_H
  102730. CW1200_BH_RESUME
  102731. CW1200_BH_RESUMED
  102732. CW1200_BH_SUSPEND
  102733. CW1200_BH_SUSPENDED
  102734. CW1200_BLOCK_ACK_CNT
  102735. CW1200_BLOCK_ACK_HIST
  102736. CW1200_BLOCK_ACK_INTERVAL
  102737. CW1200_BLOCK_ACK_THLD
  102738. CW1200_CUT2_ID_ADDR
  102739. CW1200_CUT_11_ID_STR
  102740. CW1200_CUT_22_ID_STR1
  102741. CW1200_CUT_22_ID_STR2
  102742. CW1200_CUT_22_ID_STR3
  102743. CW1200_CUT_ID_ADDR
  102744. CW1200_DEBUG_H_INCLUDED
  102745. CW1200_H
  102746. CW1200_HWBUS_H
  102747. CW1200_HWIO_H_INCLUDED
  102748. CW1200_HW_REV_CUT10
  102749. CW1200_HW_REV_CUT11
  102750. CW1200_HW_REV_CUT20
  102751. CW1200_HW_REV_CUT22
  102752. CW1200_INVALID_RATE_ID
  102753. CW1200_JOIN_STATUS_AP
  102754. CW1200_JOIN_STATUS_IBSS
  102755. CW1200_JOIN_STATUS_JOINING
  102756. CW1200_JOIN_STATUS_MONITOR
  102757. CW1200_JOIN_STATUS_PASSIVE
  102758. CW1200_JOIN_STATUS_PRE_STA
  102759. CW1200_JOIN_STATUS_STA
  102760. CW1200_JOIN_TIMEOUT
  102761. CW1200_LINK_HARD
  102762. CW1200_LINK_ID_AFTER_DTIM
  102763. CW1200_LINK_ID_GC_TIMEOUT
  102764. CW1200_LINK_ID_MAX
  102765. CW1200_LINK_ID_UAPSD
  102766. CW1200_LINK_OFF
  102767. CW1200_LINK_RESERVE
  102768. CW1200_LINK_RESET
  102769. CW1200_LINK_RESET_REMAP
  102770. CW1200_LINK_SOFT
  102771. CW1200_MAX_CTRL_FRAME_LEN
  102772. CW1200_MAX_REQUEUE_ATTEMPTS
  102773. CW1200_MAX_STA_IN_AP_MODE
  102774. CW1200_MAX_TID
  102775. CW1200_PLAT_H_INCLUDED
  102776. CW1200_QUEUE_H_INCLUDED
  102777. CW1200_TXRX_H
  102778. CW1200_WSM_H_INCLUDED
  102779. CW1X60_HW_REV
  102780. CW3K_INIT
  102781. CWAIT
  102782. CWB0_CWB_CRC_BLUE_MASK__CWB_CRC_BLUE_MASK_MASK
  102783. CWB0_CWB_CRC_BLUE_MASK__CWB_CRC_BLUE_MASK__SHIFT
  102784. CWB0_CWB_CRC_BLUE_RESULT__CWB_CRC_BLUE_RESULT_MASK
  102785. CWB0_CWB_CRC_BLUE_RESULT__CWB_CRC_BLUE_RESULT__SHIFT
  102786. CWB0_CWB_CRC_BLUE_RESULT__CWB_CRC_COUNT_MASK
  102787. CWB0_CWB_CRC_BLUE_RESULT__CWB_CRC_COUNT__SHIFT
  102788. CWB0_CWB_CRC_CTRL__CWB_CRC_CONT_EN_MASK
  102789. CWB0_CWB_CRC_CTRL__CWB_CRC_CONT_EN__SHIFT
  102790. CWB0_CWB_CRC_CTRL__CWB_CRC_EN_MASK
  102791. CWB0_CWB_CRC_CTRL__CWB_CRC_EN__SHIFT
  102792. CWB0_CWB_CRC_CTRL__CWB_CRC_SRC_SEL_MASK
  102793. CWB0_CWB_CRC_CTRL__CWB_CRC_SRC_SEL__SHIFT
  102794. CWB0_CWB_CRC_RED_GREEN_MASK__CWB_CRC_GREEN_MASK_MASK
  102795. CWB0_CWB_CRC_RED_GREEN_MASK__CWB_CRC_GREEN_MASK__SHIFT
  102796. CWB0_CWB_CRC_RED_GREEN_MASK__CWB_CRC_RED_MASK_MASK
  102797. CWB0_CWB_CRC_RED_GREEN_MASK__CWB_CRC_RED_MASK__SHIFT
  102798. CWB0_CWB_CRC_RED_GREEN_RESULT__CWB_CRC_GREEN_RESULT_MASK
  102799. CWB0_CWB_CRC_RED_GREEN_RESULT__CWB_CRC_GREEN_RESULT__SHIFT
  102800. CWB0_CWB_CRC_RED_GREEN_RESULT__CWB_CRC_RED_RESULT_MASK
  102801. CWB0_CWB_CRC_RED_GREEN_RESULT__CWB_CRC_RED_RESULT__SHIFT
  102802. CWB0_CWB_CTRL__CWB_422MODE_LUMA_CHROMA_SWAP_MASK
  102803. CWB0_CWB_CTRL__CWB_422MODE_LUMA_CHROMA_SWAP__SHIFT
  102804. CWB0_CWB_CTRL__CWB_444MODE_ROUNDING_EN_MASK
  102805. CWB0_CWB_CTRL__CWB_444MODE_ROUNDING_EN__SHIFT
  102806. CWB0_CWB_CTRL__CWB_CB_CR_SWAP_MASK
  102807. CWB0_CWB_CTRL__CWB_CB_CR_SWAP__SHIFT
  102808. CWB0_CWB_CTRL__CWB_EN_MASK
  102809. CWB0_CWB_CTRL__CWB_EN__SHIFT
  102810. CWB0_CWB_CTRL__CWB_OUTPUT_COLOR_DEPTH_MASK
  102811. CWB0_CWB_CTRL__CWB_OUTPUT_COLOR_DEPTH__SHIFT
  102812. CWB0_CWB_CTRL__CWB_PACK_FMT_SEL_MASK
  102813. CWB0_CWB_CTRL__CWB_PACK_FMT_SEL__SHIFT
  102814. CWB0_CWB_CTRL__CWB_ZERO_PADDING_MODE_MASK
  102815. CWB0_CWB_CTRL__CWB_ZERO_PADDING_MODE__SHIFT
  102816. CWB0_CWB_FENCE_PAR0__CWB_ERROR_LINE_WIDTH_MASK
  102817. CWB0_CWB_FENCE_PAR0__CWB_ERROR_LINE_WIDTH__SHIFT
  102818. CWB0_CWB_FENCE_PAR0__CWB_OUTPUT_LINE_WIDTH_MASK
  102819. CWB0_CWB_FENCE_PAR0__CWB_OUTPUT_LINE_WIDTH__SHIFT
  102820. CWB0_CWB_FENCE_PAR1__CWB_EOF_TO_SOF_SPACING_MASK
  102821. CWB0_CWB_FENCE_PAR1__CWB_EOF_TO_SOF_SPACING__SHIFT
  102822. CWB0_CWB_FENCE_PAR1__CWB_OUTPUT_LINES_PER_FRAME_MASK
  102823. CWB0_CWB_FENCE_PAR1__CWB_OUTPUT_LINES_PER_FRAME__SHIFT
  102824. CWB1_CWB_CRC_BLUE_MASK__CWB_CRC_BLUE_MASK_MASK
  102825. CWB1_CWB_CRC_BLUE_MASK__CWB_CRC_BLUE_MASK__SHIFT
  102826. CWB1_CWB_CRC_BLUE_RESULT__CWB_CRC_BLUE_RESULT_MASK
  102827. CWB1_CWB_CRC_BLUE_RESULT__CWB_CRC_BLUE_RESULT__SHIFT
  102828. CWB1_CWB_CRC_BLUE_RESULT__CWB_CRC_COUNT_MASK
  102829. CWB1_CWB_CRC_BLUE_RESULT__CWB_CRC_COUNT__SHIFT
  102830. CWB1_CWB_CRC_CTRL__CWB_CRC_CONT_EN_MASK
  102831. CWB1_CWB_CRC_CTRL__CWB_CRC_CONT_EN__SHIFT
  102832. CWB1_CWB_CRC_CTRL__CWB_CRC_EN_MASK
  102833. CWB1_CWB_CRC_CTRL__CWB_CRC_EN__SHIFT
  102834. CWB1_CWB_CRC_CTRL__CWB_CRC_SRC_SEL_MASK
  102835. CWB1_CWB_CRC_CTRL__CWB_CRC_SRC_SEL__SHIFT
  102836. CWB1_CWB_CRC_RED_GREEN_MASK__CWB_CRC_GREEN_MASK_MASK
  102837. CWB1_CWB_CRC_RED_GREEN_MASK__CWB_CRC_GREEN_MASK__SHIFT
  102838. CWB1_CWB_CRC_RED_GREEN_MASK__CWB_CRC_RED_MASK_MASK
  102839. CWB1_CWB_CRC_RED_GREEN_MASK__CWB_CRC_RED_MASK__SHIFT
  102840. CWB1_CWB_CRC_RED_GREEN_RESULT__CWB_CRC_GREEN_RESULT_MASK
  102841. CWB1_CWB_CRC_RED_GREEN_RESULT__CWB_CRC_GREEN_RESULT__SHIFT
  102842. CWB1_CWB_CRC_RED_GREEN_RESULT__CWB_CRC_RED_RESULT_MASK
  102843. CWB1_CWB_CRC_RED_GREEN_RESULT__CWB_CRC_RED_RESULT__SHIFT
  102844. CWB1_CWB_CTRL__CWB_422MODE_LUMA_CHROMA_SWAP_MASK
  102845. CWB1_CWB_CTRL__CWB_422MODE_LUMA_CHROMA_SWAP__SHIFT
  102846. CWB1_CWB_CTRL__CWB_444MODE_ROUNDING_EN_MASK
  102847. CWB1_CWB_CTRL__CWB_444MODE_ROUNDING_EN__SHIFT
  102848. CWB1_CWB_CTRL__CWB_CB_CR_SWAP_MASK
  102849. CWB1_CWB_CTRL__CWB_CB_CR_SWAP__SHIFT
  102850. CWB1_CWB_CTRL__CWB_EN_MASK
  102851. CWB1_CWB_CTRL__CWB_EN__SHIFT
  102852. CWB1_CWB_CTRL__CWB_OUTPUT_COLOR_DEPTH_MASK
  102853. CWB1_CWB_CTRL__CWB_OUTPUT_COLOR_DEPTH__SHIFT
  102854. CWB1_CWB_CTRL__CWB_PACK_FMT_SEL_MASK
  102855. CWB1_CWB_CTRL__CWB_PACK_FMT_SEL__SHIFT
  102856. CWB1_CWB_CTRL__CWB_ZERO_PADDING_MODE_MASK
  102857. CWB1_CWB_CTRL__CWB_ZERO_PADDING_MODE__SHIFT
  102858. CWB1_CWB_FENCE_PAR0__CWB_ERROR_LINE_WIDTH_MASK
  102859. CWB1_CWB_FENCE_PAR0__CWB_ERROR_LINE_WIDTH__SHIFT
  102860. CWB1_CWB_FENCE_PAR0__CWB_OUTPUT_LINE_WIDTH_MASK
  102861. CWB1_CWB_FENCE_PAR0__CWB_OUTPUT_LINE_WIDTH__SHIFT
  102862. CWB1_CWB_FENCE_PAR1__CWB_EOF_TO_SOF_SPACING_MASK
  102863. CWB1_CWB_FENCE_PAR1__CWB_EOF_TO_SOF_SPACING__SHIFT
  102864. CWB1_CWB_FENCE_PAR1__CWB_OUTPUT_LINES_PER_FRAME_MASK
  102865. CWB1_CWB_FENCE_PAR1__CWB_OUTPUT_LINES_PER_FRAME__SHIFT
  102866. CWB_0
  102867. CWB_1
  102868. CWB_2
  102869. CWB_3
  102870. CWB_MAX
  102871. CWIN_SIZE
  102872. CWL_MASK
  102873. CWL_SHIFT
  102874. CWMAX_BE
  102875. CWMAX_BK
  102876. CWMAX_CSR
  102877. CWMAX_CSR_CWMAX0
  102878. CWMAX_CSR_CWMAX1
  102879. CWMAX_CSR_CWMAX2
  102880. CWMAX_CSR_CWMAX3
  102881. CWMAX_VI
  102882. CWMAX_VO
  102883. CWMIN_BE
  102884. CWMIN_BK
  102885. CWMIN_CSR
  102886. CWMIN_CSR_CWMIN0
  102887. CWMIN_CSR_CWMIN1
  102888. CWMIN_CSR_CWMIN2
  102889. CWMIN_CSR_CWMIN3
  102890. CWMIN_VI
  102891. CWMIN_VO
  102892. CWORD_BIT_SIZE
  102893. CWQ_ENTRY_SIZE
  102894. CWQ_NUM_ENTRIES
  102895. CWR
  102896. CWRR
  102897. CW_Denormal
  102898. CW_Exceptions
  102899. CW_Invalid
  102900. CW_LT_REG
  102901. CW_MAX_CCK
  102902. CW_MAX_OFDM
  102903. CW_MCER0_MEM_CE
  102904. CW_MIN_CCK
  102905. CW_MIN_OFDM
  102906. CW_MODE_REQ
  102907. CW_Overflow
  102908. CW_PC
  102909. CW_PER_PAGE
  102910. CW_Precision
  102911. CW_RB_REG
  102912. CW_RC
  102913. CW_Underflow
  102914. CW_ZeroDiv
  102915. CX
  102916. CX0342_ADCGN
  102917. CX0342_ADC_CTL
  102918. CX0342_AS_CURRENT_CNT_H
  102919. CX0342_AS_CURRENT_CNT_L
  102920. CX0342_AS_PREVIOUS_CNT_H
  102921. CX0342_AS_PREVIOUS_CNT_L
  102922. CX0342_AUTOD_ALLOW_VARI
  102923. CX0342_AUTOD_Q_FRAME
  102924. CX0342_AUTO_ADC_CALIB
  102925. CX0342_AUTO_DARK_VALUE_H
  102926. CX0342_AUTO_DARK_VALUE_L
  102927. CX0342_AUTO_ROW_DARK
  102928. CX0342_BLUE_DARK_OFFSET
  102929. CX0342_BYPASS_MODE
  102930. CX0342_CHANNEL_0_0_H_irst
  102931. CX0342_CHANNEL_0_0_L_irst
  102932. CX0342_CHANNEL_0_1_H_irst
  102933. CX0342_CHANNEL_0_1_L_irst
  102934. CX0342_CHANNEL_0_2_H_irst
  102935. CX0342_CHANNEL_0_2_L_irst
  102936. CX0342_CHANNEL_0_3_H_irst
  102937. CX0342_CHANNEL_0_3_L_irst
  102938. CX0342_CHANNEL_0_4_H_irst
  102939. CX0342_CHANNEL_0_4_L_irst
  102940. CX0342_CHANNEL_0_5_H_irst
  102941. CX0342_CHANNEL_0_5_L_irst
  102942. CX0342_CHANNEL_0_6_H_irst
  102943. CX0342_CHANNEL_0_6_L_irst
  102944. CX0342_CHANNEL_0_7_H_irst
  102945. CX0342_CHANNEL_0_7_L_irst
  102946. CX0342_CHANNEL_1_0_H_itx
  102947. CX0342_CHANNEL_1_0_L_itx
  102948. CX0342_CHANNEL_1_1_H_itx
  102949. CX0342_CHANNEL_1_1_L_itx
  102950. CX0342_CHANNEL_1_2_H_itx
  102951. CX0342_CHANNEL_1_2_L_itx
  102952. CX0342_CHANNEL_1_3_H_itx
  102953. CX0342_CHANNEL_1_3_L_itx
  102954. CX0342_CHANNEL_1_4_H_itx
  102955. CX0342_CHANNEL_1_4_L_itx
  102956. CX0342_CHANNEL_1_5_H_itx
  102957. CX0342_CHANNEL_1_5_L_itx
  102958. CX0342_CHANNEL_1_6_H_itx
  102959. CX0342_CHANNEL_1_6_L_itx
  102960. CX0342_CHANNEL_1_7_H_itx
  102961. CX0342_CHANNEL_1_7_L_itx
  102962. CX0342_CHANNEL_2_0_H_iwl
  102963. CX0342_CHANNEL_2_0_L_iwl
  102964. CX0342_CHANNEL_2_1_H_iwl
  102965. CX0342_CHANNEL_2_1_L_iwl
  102966. CX0342_CHANNEL_2_2_H_iwl
  102967. CX0342_CHANNEL_2_2_L_iwl
  102968. CX0342_CHANNEL_2_3_H_iwl
  102969. CX0342_CHANNEL_2_3_L_iwl
  102970. CX0342_CHANNEL_2_4_H_iwl
  102971. CX0342_CHANNEL_2_4_L_iwl
  102972. CX0342_CHANNEL_2_5_H_iwl
  102973. CX0342_CHANNEL_2_5_L_iwl
  102974. CX0342_CHANNEL_2_6_H_iwl
  102975. CX0342_CHANNEL_2_6_L_iwl
  102976. CX0342_CHANNEL_2_7_H_iwl
  102977. CX0342_CHANNEL_2_7_L_iwl
  102978. CX0342_CHANNEL_3_0_H_ensp
  102979. CX0342_CHANNEL_3_0_L_ensp
  102980. CX0342_CHANNEL_3_1_H_ensp
  102981. CX0342_CHANNEL_3_1_L_ensp
  102982. CX0342_CHANNEL_3_2_H_ensp
  102983. CX0342_CHANNEL_3_2_L_ensp
  102984. CX0342_CHANNEL_3_3_H_ensp
  102985. CX0342_CHANNEL_3_3_L_ensp
  102986. CX0342_CHANNEL_3_4_H_ensp
  102987. CX0342_CHANNEL_3_4_L_ensp
  102988. CX0342_CHANNEL_3_5_H_ensp
  102989. CX0342_CHANNEL_3_5_L_ensp
  102990. CX0342_CHANNEL_3_6_H_ensp
  102991. CX0342_CHANNEL_3_6_L_ensp
  102992. CX0342_CHANNEL_3_7_H_ensp
  102993. CX0342_CHANNEL_3_7_L_ensp
  102994. CX0342_CHANNEL_4_0_H_sela
  102995. CX0342_CHANNEL_4_0_L_sela
  102996. CX0342_CHANNEL_4_1_H_sela
  102997. CX0342_CHANNEL_4_1_L_sela
  102998. CX0342_CHANNEL_5_0_H_intla
  102999. CX0342_CHANNEL_5_0_L_intla
  103000. CX0342_CHANNEL_5_1_H_intla
  103001. CX0342_CHANNEL_5_1_L_intla
  103002. CX0342_CHANNEL_5_2_H_intla
  103003. CX0342_CHANNEL_5_2_L_intla
  103004. CX0342_CHANNEL_5_3_H_intla
  103005. CX0342_CHANNEL_5_3_L_intla
  103006. CX0342_CHANNEL_6_0_H_xa_sel_pos
  103007. CX0342_CHANNEL_6_0_L_xa_sel_pos
  103008. CX0342_CHANNEL_7_1_H_cds_pos
  103009. CX0342_CHANNEL_7_1_L_cds_pos
  103010. CX0342_CLOCK_GEN
  103011. CX0342_DATA_OVERFLOW_H
  103012. CX0342_DATA_OVERFLOW_L
  103013. CX0342_DATA_SCALING_MULTI
  103014. CX0342_DATA_UNDERFLOW_H
  103015. CX0342_DATA_UNDERFLOW_L
  103016. CX0342_DR_ENH_PULSE_OFFSET_H
  103017. CX0342_DR_ENH_PULSE_OFFSET_L
  103018. CX0342_DR_ENH_PULSE_POS_H
  103019. CX0342_DR_ENH_PULSE_POS_L
  103020. CX0342_DR_ENH_PULSE_WIDTH
  103021. CX0342_EXPO_CLK_H
  103022. CX0342_EXPO_CLK_L
  103023. CX0342_EXPO_LINE_H
  103024. CX0342_EXPO_LINE_L
  103025. CX0342_FRAME_CNT_TEST
  103026. CX0342_FRAME_FIX_DATA_TEST
  103027. CX0342_FRAME_HEIGH_H
  103028. CX0342_FRAME_HEIGH_L
  103029. CX0342_FRAME_WIDTH_H
  103030. CX0342_FRAME_WIDTH_L
  103031. CX0342_GB_DARK_OFFSET
  103032. CX0342_GLOBAL_GAIN
  103033. CX0342_GPXLTHD_H
  103034. CX0342_GPXLTHD_L
  103035. CX0342_GR_DARK_OFFSET
  103036. CX0342_G_GAP_H
  103037. CX0342_G_GAP_L
  103038. CX0342_IDLE_CTRL
  103039. CX0342_IO_CTRL_0
  103040. CX0342_IO_CTRL_1
  103041. CX0342_IO_CTRL_2
  103042. CX0342_LDOSEL
  103043. CX0342_LVRST_BLBIAS
  103044. CX0342_MANUAL_DARK_VALUE
  103045. CX0342_ORG_X_H
  103046. CX0342_ORG_X_L
  103047. CX0342_ORG_Y_H
  103048. CX0342_ORG_Y_L
  103049. CX0342_OUTPUT_CTRL
  103050. CX0342_PLANETHD_H
  103051. CX0342_PLANETHD_L
  103052. CX0342_PLL
  103053. CX0342_RAMP_RIV
  103054. CX0342_RAW_BGAIN_H
  103055. CX0342_RAW_BGAIN_L
  103056. CX0342_RAW_GBGAIN_H
  103057. CX0342_RAW_GBGAIN_L
  103058. CX0342_RAW_GRGAIN_H
  103059. CX0342_RAW_GRGAIN_L
  103060. CX0342_RAW_RGAIN_H
  103061. CX0342_RAW_RGAIN_L
  103062. CX0342_RBPXLTHD_H
  103063. CX0342_RBPXLTHD_L
  103064. CX0342_RB_GAP_H
  103065. CX0342_RB_GAP_L
  103066. CX0342_RED_DARK_OFFSET
  103067. CX0342_ROWDARK_TH
  103068. CX0342_ROWDARK_TOL
  103069. CX0342_RST_OVERFLOW_H
  103070. CX0342_RST_OVERFLOW_L
  103071. CX0342_RST_UNDERFLOW_H
  103072. CX0342_RST_UNDERFLOW_L
  103073. CX0342_SENSOR_HEIGHT_H
  103074. CX0342_SENSOR_HEIGHT_L
  103075. CX0342_SENSOR_ID
  103076. CX0342_SENSOR_WIDTH_H
  103077. CX0342_SENSOR_WIDTH_L
  103078. CX0342_SLPCR
  103079. CX0342_SLPFN_LO
  103080. CX0342_SOFT_RESET
  103081. CX0342_SPV_VALUE_H
  103082. CX0342_SPV_VALUE_L
  103083. CX0342_STOP_X_H
  103084. CX0342_STOP_X_L
  103085. CX0342_STOP_Y_H
  103086. CX0342_STOP_Y_L
  103087. CX0342_SYS_CTRL_0
  103088. CX0342_SYS_CTRL_1
  103089. CX0342_SYS_CTRL_2
  103090. CX0342_SYS_CTRL_3
  103091. CX0342_SYS_CTRL_4
  103092. CX0342_TEST_MODE
  103093. CX0342_TIMING_EN
  103094. CX0342_VERSION_NO
  103095. CX0342_VSYNC_HSYNC_READ
  103096. CX0342_VTHSEL
  103097. CX18_525_LINE_ENC_YUV_BUFSIZE
  103098. CX18_625_LINE_ENC_YUV_BUFSIZE
  103099. CX18_ADD_DELAY_ENABLE1
  103100. CX18_ADD_DELAY_ENABLE2
  103101. CX18_ADEC_CONTROL
  103102. CX18_AI1_MUX_843_I2S
  103103. CX18_AI1_MUX_I2S1
  103104. CX18_AI1_MUX_I2S2
  103105. CX18_AI1_MUX_INVALID
  103106. CX18_AI1_MUX_MASK
  103107. CX18_ALGO_BIT_TIMEOUT
  103108. CX18_ALSA_DBGFLG_INFO
  103109. CX18_ALSA_DBGFLG_WARN
  103110. CX18_ALSA_DEBUG
  103111. CX18_ALSA_DEBUG_INFO
  103112. CX18_ALSA_DEBUG_WARN
  103113. CX18_ALSA_ERR
  103114. CX18_ALSA_INFO
  103115. CX18_ALSA_WARN
  103116. CX18_APU_ENCODING_METHOD_AC3
  103117. CX18_APU_ENCODING_METHOD_MPEG
  103118. CX18_APU_FIRMWARE
  103119. CX18_APU_RESETAI
  103120. CX18_APU_START
  103121. CX18_APU_STOP
  103122. CX18_AUDIO_ENABLE
  103123. CX18_AV_AUDIO4
  103124. CX18_AV_AUDIO5
  103125. CX18_AV_AUDIO6
  103126. CX18_AV_AUDIO7
  103127. CX18_AV_AUDIO8
  103128. CX18_AV_AUDIO_SERIAL1
  103129. CX18_AV_AUDIO_SERIAL2
  103130. CX18_AV_COMPONENT1
  103131. CX18_AV_COMPONENT_B_CHROMA7
  103132. CX18_AV_COMPONENT_B_CHROMA8
  103133. CX18_AV_COMPONENT_LUMA1
  103134. CX18_AV_COMPONENT_LUMA2
  103135. CX18_AV_COMPONENT_LUMA3
  103136. CX18_AV_COMPONENT_LUMA4
  103137. CX18_AV_COMPONENT_LUMA5
  103138. CX18_AV_COMPONENT_LUMA6
  103139. CX18_AV_COMPONENT_LUMA7
  103140. CX18_AV_COMPONENT_LUMA8
  103141. CX18_AV_COMPONENT_R_CHROMA4
  103142. CX18_AV_COMPONENT_R_CHROMA5
  103143. CX18_AV_COMPONENT_R_CHROMA6
  103144. CX18_AV_COMPOSITE1
  103145. CX18_AV_COMPOSITE2
  103146. CX18_AV_COMPOSITE3
  103147. CX18_AV_COMPOSITE4
  103148. CX18_AV_COMPOSITE5
  103149. CX18_AV_COMPOSITE6
  103150. CX18_AV_COMPOSITE7
  103151. CX18_AV_COMPOSITE8
  103152. CX18_AV_SVIDEO1
  103153. CX18_AV_SVIDEO2
  103154. CX18_AV_SVIDEO3
  103155. CX18_AV_SVIDEO4
  103156. CX18_AV_SVIDEO_CHROMA4
  103157. CX18_AV_SVIDEO_CHROMA5
  103158. CX18_AV_SVIDEO_CHROMA6
  103159. CX18_AV_SVIDEO_CHROMA7
  103160. CX18_AV_SVIDEO_CHROMA8
  103161. CX18_AV_SVIDEO_LUMA1
  103162. CX18_AV_SVIDEO_LUMA2
  103163. CX18_AV_SVIDEO_LUMA3
  103164. CX18_AV_SVIDEO_LUMA4
  103165. CX18_AV_SVIDEO_LUMA5
  103166. CX18_AV_SVIDEO_LUMA6
  103167. CX18_AV_SVIDEO_LUMA7
  103168. CX18_AV_SVIDEO_LUMA8
  103169. CX18_CAP_ENCODER
  103170. CX18_CARD_CNXT_RAPTOR_PAL
  103171. CX18_CARD_COMPRO_H900
  103172. CX18_CARD_GOTVIEW_PCI_DVD3
  103173. CX18_CARD_HVR_1600_ESMT
  103174. CX18_CARD_HVR_1600_S5H1411
  103175. CX18_CARD_HVR_1600_SAMSUNG
  103176. CX18_CARD_INPUT_AUD_TUNER
  103177. CX18_CARD_INPUT_COMPONENT1
  103178. CX18_CARD_INPUT_COMPOSITE1
  103179. CX18_CARD_INPUT_COMPOSITE2
  103180. CX18_CARD_INPUT_LINE_IN1
  103181. CX18_CARD_INPUT_LINE_IN2
  103182. CX18_CARD_INPUT_SVIDEO1
  103183. CX18_CARD_INPUT_SVIDEO2
  103184. CX18_CARD_INPUT_VID_TUNER
  103185. CX18_CARD_LAST
  103186. CX18_CARD_LEADTEK_DVR3100H
  103187. CX18_CARD_LEADTEK_PVR2100
  103188. CX18_CARD_MAX_AUDIO_INPUTS
  103189. CX18_CARD_MAX_TUNERS
  103190. CX18_CARD_MAX_VIDEO_INPUTS
  103191. CX18_CARD_TOSHIBA_QOSMIO_DVBT
  103192. CX18_CARD_YUAN_MPC718
  103193. CX18_CLOCK_ENABLE1
  103194. CX18_CLOCK_ENABLE2
  103195. CX18_CLOCK_POLARITY1
  103196. CX18_CLOCK_POLARITY2
  103197. CX18_CLOCK_SELECT1
  103198. CX18_CLOCK_SELECT2
  103199. CX18_CPU_CAPTURE_PAUSE
  103200. CX18_CPU_CAPTURE_RESUME
  103201. CX18_CPU_CAPTURE_START
  103202. CX18_CPU_CAPTURE_STOP
  103203. CX18_CPU_DEBUG_PEEK32
  103204. CX18_CPU_DE_RELEASE_MDL
  103205. CX18_CPU_DE_SET_MDL
  103206. CX18_CPU_DE_SET_MDL_ACK
  103207. CX18_CPU_FIRMWARE
  103208. CX18_CPU_GET_ENC_PTS
  103209. CX18_CPU_SET_ASPECT_RATIO
  103210. CX18_CPU_SET_AUDIO_MUTE
  103211. CX18_CPU_SET_AUDIO_PARAMETERS
  103212. CX18_CPU_SET_AUDIO_PID
  103213. CX18_CPU_SET_CAPTURE_LINE_NO
  103214. CX18_CPU_SET_CHANNEL_TYPE
  103215. CX18_CPU_SET_COPYRIGHT
  103216. CX18_CPU_SET_FILTER_PARAM
  103217. CX18_CPU_SET_GOP_STRUCTURE
  103218. CX18_CPU_SET_INDEXTABLE
  103219. CX18_CPU_SET_MEDIAN_CORING
  103220. CX18_CPU_SET_MISC_PARAMETERS
  103221. CX18_CPU_SET_RAW_VBI_PARAM
  103222. CX18_CPU_SET_SCENE_CHANGE_DETECTION
  103223. CX18_CPU_SET_SKIP_INPUT_FRAME
  103224. CX18_CPU_SET_SLICED_VBI_PARAM
  103225. CX18_CPU_SET_SPATIAL_FILTER_TYPE
  103226. CX18_CPU_SET_STREAM_OUTPUT_TYPE
  103227. CX18_CPU_SET_USERDATA_PLACE_HOLDER
  103228. CX18_CPU_SET_VER_CROP_LINE
  103229. CX18_CPU_SET_VFC_PARAM
  103230. CX18_CPU_SET_VIDEO_IN
  103231. CX18_CPU_SET_VIDEO_MUTE
  103232. CX18_CPU_SET_VIDEO_PID
  103233. CX18_CPU_SET_VIDEO_RATE
  103234. CX18_CPU_SET_VIDEO_RESOLUTION
  103235. CX18_CREATE_TASK
  103236. CX18_CS5345_I2C_ADDR
  103237. CX18_DBGFLG_API
  103238. CX18_DBGFLG_DMA
  103239. CX18_DBGFLG_FILE
  103240. CX18_DBGFLG_HIGHVOL
  103241. CX18_DBGFLG_I2C
  103242. CX18_DBGFLG_INFO
  103243. CX18_DBGFLG_IOCTL
  103244. CX18_DBGFLG_IRQ
  103245. CX18_DBGFLG_WARN
  103246. CX18_DDR_BASE_63_ADDR
  103247. CX18_DDR_CHIP_CONFIG
  103248. CX18_DDR_INITIAL_EMRS
  103249. CX18_DDR_MB_PER_ROW_7
  103250. CX18_DDR_POWER_REG
  103251. CX18_DDR_REFRESH
  103252. CX18_DDR_REQUEST_ENABLE
  103253. CX18_DDR_SOFT_RESET
  103254. CX18_DDR_TIMING1
  103255. CX18_DDR_TIMING2
  103256. CX18_DDR_TUNE_LANE
  103257. CX18_DEBUG
  103258. CX18_DEBUG_ALSA_INFO
  103259. CX18_DEBUG_API
  103260. CX18_DEBUG_API_DEV
  103261. CX18_DEBUG_DEV
  103262. CX18_DEBUG_DMA
  103263. CX18_DEBUG_DMA_DEV
  103264. CX18_DEBUG_FILE
  103265. CX18_DEBUG_FILE_DEV
  103266. CX18_DEBUG_HIGH_VOL
  103267. CX18_DEBUG_HIGH_VOL_DEV
  103268. CX18_DEBUG_HI_API
  103269. CX18_DEBUG_HI_API_DEV
  103270. CX18_DEBUG_HI_DMA
  103271. CX18_DEBUG_HI_DMA_DEV
  103272. CX18_DEBUG_HI_FILE
  103273. CX18_DEBUG_HI_FILE_DEV
  103274. CX18_DEBUG_HI_I2C
  103275. CX18_DEBUG_HI_I2C_DEV
  103276. CX18_DEBUG_HI_INFO
  103277. CX18_DEBUG_HI_INFO_DEV
  103278. CX18_DEBUG_HI_IOCTL
  103279. CX18_DEBUG_HI_IOCTL_DEV
  103280. CX18_DEBUG_HI_IRQ
  103281. CX18_DEBUG_HI_IRQ_DEV
  103282. CX18_DEBUG_HI_WARN
  103283. CX18_DEBUG_HI_WARN_DEV
  103284. CX18_DEBUG_I2C
  103285. CX18_DEBUG_I2C_DEV
  103286. CX18_DEBUG_INFO
  103287. CX18_DEBUG_INFO_DEV
  103288. CX18_DEBUG_IOCTL
  103289. CX18_DEBUG_IOCTL_DEV
  103290. CX18_DEBUG_IRQ
  103291. CX18_DEBUG_IRQ_DEV
  103292. CX18_DEBUG_WARN
  103293. CX18_DEBUG_WARN_DEV
  103294. CX18_DEFAULT_ENC_IDX_BUFFERS
  103295. CX18_DEFAULT_ENC_IDX_BUFSIZE
  103296. CX18_DEFAULT_ENC_MPG_BUFFERS
  103297. CX18_DEFAULT_ENC_MPG_BUFSIZE
  103298. CX18_DEFAULT_ENC_PCM_BUFFERS
  103299. CX18_DEFAULT_ENC_PCM_BUFSIZE
  103300. CX18_DEFAULT_ENC_TS_BUFFERS
  103301. CX18_DEFAULT_ENC_TS_BUFSIZE
  103302. CX18_DEFAULT_ENC_VBI_BUFFERS
  103303. CX18_DEFAULT_ENC_YUV_BUFFERS
  103304. CX18_DEFAULT_ENC_YUV_BUFSIZE
  103305. CX18_DESTROY_TASK
  103306. CX18_DMA_UNMAPPED
  103307. CX18_DMUX_CLK_MASK
  103308. CX18_DRIVER_H
  103309. CX18_DRIVER_NAME
  103310. CX18_DSP0_INTERRUPT_MASK
  103311. CX18_ENC_STREAM_TYPE_IDX
  103312. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN
  103313. CX18_ENC_STREAM_TYPE_MPG
  103314. CX18_ENC_STREAM_TYPE_PCM
  103315. CX18_ENC_STREAM_TYPE_RAD
  103316. CX18_ENC_STREAM_TYPE_TS
  103317. CX18_ENC_STREAM_TYPE_VBI
  103318. CX18_ENC_STREAM_TYPE_YUV
  103319. CX18_EPU_DEBUG
  103320. CX18_EPU_DMA_DONE
  103321. CX18_ERR
  103322. CX18_ERR_DEV
  103323. CX18_FAST_CLOCK_PLL_ADJUST_BANDWIDTH
  103324. CX18_FAST_CLOCK_PLL_FRAC
  103325. CX18_FAST_CLOCK_PLL_INT
  103326. CX18_FAST_CLOCK_PLL_POST
  103327. CX18_FAST_CLOCK_PLL_PRESCALE
  103328. CX18_F_EWO_MB_STALE
  103329. CX18_F_EWO_MB_STALE_UPON_RECEIPT
  103330. CX18_F_EWO_MB_STALE_WHILE_PROC
  103331. CX18_F_I_ENC_PAUSED
  103332. CX18_F_I_EOS
  103333. CX18_F_I_FAILED
  103334. CX18_F_I_INITED
  103335. CX18_F_I_LOADED_FW
  103336. CX18_F_I_RADIO_USER
  103337. CX18_F_M_NEED_SWAP
  103338. CX18_F_S_APPL_IO
  103339. CX18_F_S_CLAIMED
  103340. CX18_F_S_INTERNAL_USE
  103341. CX18_F_S_STOPPING
  103342. CX18_F_S_STREAMING
  103343. CX18_F_S_STREAMOFF
  103344. CX18_GPIO_RESET_I2C
  103345. CX18_GPIO_RESET_XC2028
  103346. CX18_GPIO_RESET_Z8F0811
  103347. CX18_HALF_CLOCK_SELECT1
  103348. CX18_HALF_CLOCK_SELECT2
  103349. CX18_HW_418_AV
  103350. CX18_HW_CS5345
  103351. CX18_HW_DVB
  103352. CX18_HW_GPIO_MUX
  103353. CX18_HW_GPIO_RESET_CTRL
  103354. CX18_HW_TUNER
  103355. CX18_HW_TVEEPROM
  103356. CX18_HW_Z8F0811_IR_HAUP
  103357. CX18_INFO
  103358. CX18_INFO_DEV
  103359. CX18_INVALID_TASK_HANDLE
  103360. CX18_IO_H
  103361. CX18_MAX_CARDS
  103362. CX18_MAX_FW_MDLS_PER_STREAM
  103363. CX18_MAX_IN_WORK_ORDERS
  103364. CX18_MAX_MDL_ACKS
  103365. CX18_MAX_MMIO_WR_RETRIES
  103366. CX18_MAX_STREAMS
  103367. CX18_MEM_OFFSET
  103368. CX18_MEM_SIZE
  103369. CX18_MPEG_CLOCK_PLL_FRAC
  103370. CX18_MPEG_CLOCK_PLL_INT
  103371. CX18_MPEG_CLOCK_PLL_POST
  103372. CX18_PCI_ID_COMPRO
  103373. CX18_PCI_ID_CONEXANT
  103374. CX18_PCI_ID_GOTVIEW
  103375. CX18_PCI_ID_HAUPPAUGE
  103376. CX18_PCI_ID_LEADTEK
  103377. CX18_PCI_ID_TOSHIBA
  103378. CX18_PCI_ID_YUAN
  103379. CX18_PLL_POWER_DOWN
  103380. CX18_PROC_SOFT_RESET
  103381. CX18_REG_BUS_TIMEOUT_EN
  103382. CX18_REG_DMUX_NUM_PORT_0_CONTROL
  103383. CX18_REG_GPIO_DIR1
  103384. CX18_REG_GPIO_DIR2
  103385. CX18_REG_GPIO_IN
  103386. CX18_REG_GPIO_OUT1
  103387. CX18_REG_GPIO_OUT2
  103388. CX18_REG_I2C_1_RD
  103389. CX18_REG_I2C_1_WR
  103390. CX18_REG_I2C_2_RD
  103391. CX18_REG_I2C_2_WR
  103392. CX18_REG_OFFSET
  103393. CX18_SCB_H
  103394. CX18_SCL_PERIOD
  103395. CX18_SLICED_MPEG_DATA_BUFSZ
  103396. CX18_SLICED_MPEG_DATA_MAXSZ
  103397. CX18_SLICED_TYPE_CAPTION_525
  103398. CX18_SLICED_TYPE_TELETEXT_B
  103399. CX18_SLICED_TYPE_VPS
  103400. CX18_SLICED_TYPE_WSS_625
  103401. CX18_SLOW_CLOCK_PLL_FRAC
  103402. CX18_SLOW_CLOCK_PLL_INT
  103403. CX18_SLOW_CLOCK_PLL_POST
  103404. CX18_SW1_INT_ENABLE_PCI
  103405. CX18_SW1_INT_STATUS
  103406. CX18_SW2_INT_SET
  103407. CX18_SW2_INT_STATUS
  103408. CX18_UNIT_ENC_IDX_BUFSIZE
  103409. CX18_UNIT_ENC_YUV_BUFSIZE
  103410. CX18_V4L2_ENC_PCM_OFFSET
  103411. CX18_V4L2_ENC_TS_OFFSET
  103412. CX18_V4L2_ENC_YUV_OFFSET
  103413. CX18_VBI_FRAMES
  103414. CX18_VERSION
  103415. CX18_VERSION_H
  103416. CX18_WARN
  103417. CX18_WARN_DEV
  103418. CX18_WMB_CLIENT02
  103419. CX18_WMB_CLIENT05
  103420. CX18_WMB_CLIENT06
  103421. CX18_WMB_CLIENT07
  103422. CX18_WMB_CLIENT08
  103423. CX18_WMB_CLIENT09
  103424. CX18_WMB_CLIENT10
  103425. CX18_WMB_CLIENT11
  103426. CX18_WMB_CLIENT12
  103427. CX18_WMB_CLIENT13
  103428. CX18_WMB_CLIENT14
  103429. CX18_Z8F0811_IR_RX_I2C_ADDR
  103430. CX18_Z8F0811_IR_TX_I2C_ADDR
  103431. CX20442_AGC
  103432. CX20442_MIC
  103433. CX20442_PM
  103434. CX20442_SPKOUT
  103435. CX20442_TELIN
  103436. CX20442_TELOUT
  103437. CX2072X_ADC1_AMP_GAIN_LEFT_0
  103438. CX2072X_ADC1_AMP_GAIN_LEFT_1
  103439. CX2072X_ADC1_AMP_GAIN_LEFT_2
  103440. CX2072X_ADC1_AMP_GAIN_LEFT_3
  103441. CX2072X_ADC1_AMP_GAIN_LEFT_4
  103442. CX2072X_ADC1_AMP_GAIN_LEFT_5
  103443. CX2072X_ADC1_AMP_GAIN_LEFT_6
  103444. CX2072X_ADC1_AMP_GAIN_RIGHT_0
  103445. CX2072X_ADC1_AMP_GAIN_RIGHT_1
  103446. CX2072X_ADC1_AMP_GAIN_RIGHT_2
  103447. CX2072X_ADC1_AMP_GAIN_RIGHT_3
  103448. CX2072X_ADC1_AMP_GAIN_RIGHT_4
  103449. CX2072X_ADC1_AMP_GAIN_RIGHT_5
  103450. CX2072X_ADC1_AMP_GAIN_RIGHT_6
  103451. CX2072X_ADC1_CONNECTION_SELECT_CONTROL
  103452. CX2072X_ADC1_CONVERTER_FORMAT
  103453. CX2072X_ADC1_CONVERTER_STREAM_CHANNEL
  103454. CX2072X_ADC1_POWER_STATE
  103455. CX2072X_ADC2_AMP_GAIN_LEFT_0
  103456. CX2072X_ADC2_AMP_GAIN_LEFT_1
  103457. CX2072X_ADC2_AMP_GAIN_LEFT_2
  103458. CX2072X_ADC2_AMP_GAIN_RIGHT_0
  103459. CX2072X_ADC2_AMP_GAIN_RIGHT_1
  103460. CX2072X_ADC2_AMP_GAIN_RIGHT_2
  103461. CX2072X_ADC2_CONNECTION_SELECT_CONTROL
  103462. CX2072X_ADC2_CONVERTER_FORMAT
  103463. CX2072X_ADC2_CONVERTER_STREAM_CHANNEL
  103464. CX2072X_ADC2_POWER_STATE
  103465. CX2072X_AFG_FUNCTION_RESET
  103466. CX2072X_AFG_POWER_STATE
  103467. CX2072X_ANALOG_TEST10
  103468. CX2072X_ANALOG_TEST11
  103469. CX2072X_ANALOG_TEST12
  103470. CX2072X_ANALOG_TEST13
  103471. CX2072X_ANALOG_TEST3
  103472. CX2072X_ANALOG_TEST4
  103473. CX2072X_ANALOG_TEST5
  103474. CX2072X_ANALOG_TEST6
  103475. CX2072X_ANALOG_TEST7
  103476. CX2072X_ANALOG_TEST8
  103477. CX2072X_ANALOG_TEST9
  103478. CX2072X_CLASSD_AMP_LEN
  103479. CX2072X_CODEC_TEST2
  103480. CX2072X_CODEC_TEST20
  103481. CX2072X_CODEC_TEST24
  103482. CX2072X_CODEC_TEST26
  103483. CX2072X_CODEC_TEST9
  103484. CX2072X_CODEC_TESTXX
  103485. CX2072X_CURRENT_BCLK_FREQUENCY
  103486. CX2072X_DAC1_AMP_GAIN_LEFT
  103487. CX2072X_DAC1_AMP_GAIN_RIGHT
  103488. CX2072X_DAC1_CONVERTER_FORMAT
  103489. CX2072X_DAC1_CONVERTER_STREAM_CHANNEL
  103490. CX2072X_DAC1_EAPD_ENABLE
  103491. CX2072X_DAC1_POWER_STATE
  103492. CX2072X_DAC2_AMP_GAIN_LEFT
  103493. CX2072X_DAC2_AMP_GAIN_RIGHT
  103494. CX2072X_DAC2_CONVERTER_FORMAT
  103495. CX2072X_DAC2_CONVERTER_STREAM_CHANNEL
  103496. CX2072X_DAC2_POWER_STATE
  103497. CX2072X_DAI_DSP
  103498. CX2072X_DAI_DSP_PWM
  103499. CX2072X_DAI_HIFI
  103500. CX2072X_DAPM_REG_E
  103501. CX2072X_DAPM_SUPPLY_S
  103502. CX2072X_DAPM_SWITCH
  103503. CX2072X_DIGITAL_BIOS_TEST0
  103504. CX2072X_DIGITAL_BIOS_TEST2
  103505. CX2072X_DIGITAL_TEST0
  103506. CX2072X_DIGITAL_TEST1
  103507. CX2072X_DIGITAL_TEST11
  103508. CX2072X_DIGITAL_TEST12
  103509. CX2072X_DIGITAL_TEST15
  103510. CX2072X_DIGITAL_TEST16
  103511. CX2072X_DIGITAL_TEST17
  103512. CX2072X_DIGITAL_TEST18
  103513. CX2072X_DIGITAL_TEST19
  103514. CX2072X_DIGITAL_TEST20
  103515. CX2072X_EQ_A1_COEFF
  103516. CX2072X_EQ_A2_COEFF
  103517. CX2072X_EQ_B0_COEFF
  103518. CX2072X_EQ_B1_COEFF
  103519. CX2072X_EQ_B2_COEFF
  103520. CX2072X_EQ_BAND
  103521. CX2072X_EQ_ENABLE_BYPASS
  103522. CX2072X_EQ_G_COEFF
  103523. CX2072X_FORMATS
  103524. CX2072X_GPIO_DATA
  103525. CX2072X_GPIO_DIRECTION
  103526. CX2072X_GPIO_ENABLE
  103527. CX2072X_GPIO_STICKY_MASK
  103528. CX2072X_GPIO_UM_ENABLE
  103529. CX2072X_GPIO_WAKE
  103530. CX2072X_I2SPCM_CONTROL1
  103531. CX2072X_I2SPCM_CONTROL2
  103532. CX2072X_I2SPCM_CONTROL3
  103533. CX2072X_I2SPCM_CONTROL4
  103534. CX2072X_I2SPCM_CONTROL5
  103535. CX2072X_I2SPCM_CONTROL6
  103536. CX2072X_MAX_DRC_REGS
  103537. CX2072X_MAX_EQ_BAND
  103538. CX2072X_MAX_EQ_COEFF
  103539. CX2072X_MCLK_EXTERNAL_PLL
  103540. CX2072X_MCLK_INTERNAL_OSC
  103541. CX2072X_MCLK_PLL
  103542. CX2072X_MIC_EQ_COEFF
  103543. CX2072X_MIXER_GAIN_LEFT_0
  103544. CX2072X_MIXER_GAIN_LEFT_1
  103545. CX2072X_MIXER_GAIN_RIGHT_0
  103546. CX2072X_MIXER_GAIN_RIGHT_1
  103547. CX2072X_MIXER_POWER_STATE
  103548. CX2072X_PLBK_DRC_PARM_LEN
  103549. CX2072X_PLBK_EQ_BAND_NUM
  103550. CX2072X_PLBK_EQ_COEF_LEN
  103551. CX2072X_PORTA_CONNECTION_SELECT_CTRL
  103552. CX2072X_PORTA_EAPD_BTL
  103553. CX2072X_PORTA_PIN_CTRL
  103554. CX2072X_PORTA_PIN_SENSE
  103555. CX2072X_PORTA_POWER_STATE
  103556. CX2072X_PORTA_UNSOLICITED_RESPONSE
  103557. CX2072X_PORTB_EAPD_BTL
  103558. CX2072X_PORTB_GAIN_LEFT
  103559. CX2072X_PORTB_GAIN_RIGHT
  103560. CX2072X_PORTB_PIN_CTRL
  103561. CX2072X_PORTB_PIN_SENSE
  103562. CX2072X_PORTB_POWER_STATE
  103563. CX2072X_PORTB_UNSOLICITED_RESPONSE
  103564. CX2072X_PORTC_GAIN_LEFT
  103565. CX2072X_PORTC_GAIN_RIGHT
  103566. CX2072X_PORTC_PIN_CTRL
  103567. CX2072X_PORTC_POWER_STATE
  103568. CX2072X_PORTD_GAIN_LEFT
  103569. CX2072X_PORTD_GAIN_RIGHT
  103570. CX2072X_PORTD_PIN_CTRL
  103571. CX2072X_PORTD_PIN_SENSE
  103572. CX2072X_PORTD_POWER_STATE
  103573. CX2072X_PORTD_UNSOLICITED_RESPONSE
  103574. CX2072X_PORTE_CONNECTION_SELECT_CTRL
  103575. CX2072X_PORTE_EAPD_BTL
  103576. CX2072X_PORTE_GAIN_LEFT
  103577. CX2072X_PORTE_GAIN_RIGHT
  103578. CX2072X_PORTE_PIN_CTRL
  103579. CX2072X_PORTE_PIN_SENSE
  103580. CX2072X_PORTE_POWER_STATE
  103581. CX2072X_PORTE_UNSOLICITED_RESPONSE
  103582. CX2072X_PORTF_GAIN_LEFT
  103583. CX2072X_PORTF_GAIN_RIGHT
  103584. CX2072X_PORTF_PIN_CTRL
  103585. CX2072X_PORTF_PIN_SENSE
  103586. CX2072X_PORTF_POWER_STATE
  103587. CX2072X_PORTF_UNSOLICITED_RESPONSE
  103588. CX2072X_PORTG_CONNECTION_SELECT_CTRL
  103589. CX2072X_PORTG_EAPD_BTL
  103590. CX2072X_PORTG_PIN_CTRL
  103591. CX2072X_PORTG_POWER_STATE
  103592. CX2072X_PORTM_CONNECTION_SELECT_CTRL
  103593. CX2072X_PORTM_EAPD_BTL
  103594. CX2072X_PORTM_PIN_CTRL
  103595. CX2072X_PORTM_POWER_STATE
  103596. CX2072X_RATES_DSP
  103597. CX2072X_REG_MAX
  103598. CX2072X_REVISION_ID
  103599. CX2072X_SAMPLE_SIZE_16_BITS
  103600. CX2072X_SAMPLE_SIZE_24_BITS
  103601. CX2072X_SAMPLE_SIZE_8_BITS
  103602. CX2072X_SAMPLE_SIZE_RESERVED
  103603. CX2072X_SPKR_DRC_CONTROL
  103604. CX2072X_SPKR_DRC_ENABLE_STEP
  103605. CX2072X_SPKR_DRC_TEST
  103606. CX2072X_UM_INTERRUPT_CRTL_E
  103607. CX2072X_UM_RESPONSE
  103608. CX2072X_VENDOR_ID
  103609. CX22700_H
  103610. CX22702_H
  103611. CX22702_PARALLEL_OUTPUT
  103612. CX22702_SERIAL_OUTPUT
  103613. CX2310X_AV
  103614. CX231XX_AMUX_LINE_IN
  103615. CX231XX_AMUX_VIDEO
  103616. CX231XX_ANALOG_MODE
  103617. CX231XX_AUDIO
  103618. CX231XX_AUDIO_BUFS
  103619. CX231XX_AVDECODER
  103620. CX231XX_BOARD_ASTROMETA_T2HYBRID
  103621. CX231XX_BOARD_CNXT_CARRAERA
  103622. CX231XX_BOARD_CNXT_RDE_250
  103623. CX231XX_BOARD_CNXT_RDE_253S
  103624. CX231XX_BOARD_CNXT_RDU_250
  103625. CX231XX_BOARD_CNXT_RDU_253S
  103626. CX231XX_BOARD_CNXT_SHELBY
  103627. CX231XX_BOARD_CNXT_VIDEO_GRABBER
  103628. CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2
  103629. CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD
  103630. CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx
  103631. CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx
  103632. CX231XX_BOARD_HAUPPAUGE_935C
  103633. CX231XX_BOARD_HAUPPAUGE_955Q
  103634. CX231XX_BOARD_HAUPPAUGE_975
  103635. CX231XX_BOARD_HAUPPAUGE_EXETER
  103636. CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC
  103637. CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL
  103638. CX231XX_BOARD_HAUPPAUGE_USBLIVE2
  103639. CX231XX_BOARD_ICONBIT_U100
  103640. CX231XX_BOARD_KWORLD_UB430_USB_HYBRID
  103641. CX231XX_BOARD_KWORLD_UB445_USB_HYBRID
  103642. CX231XX_BOARD_NOT_VALIDATED
  103643. CX231XX_BOARD_OTG102
  103644. CX231XX_BOARD_PV_PLAYTV_USB_HYBRID
  103645. CX231XX_BOARD_PV_XCAPTURE_USB
  103646. CX231XX_BOARD_TERRATEC_GRABBY
  103647. CX231XX_BOARD_THE_IMAGING_SOURCE_DFG_USB2_PRO
  103648. CX231XX_BOARD_UNKNOWN
  103649. CX231XX_BOARD_VALIDATED
  103650. CX231XX_DEF_BUF
  103651. CX231XX_DEF_VBI_BUF
  103652. CX231XX_DIGITAL_MODE
  103653. CX231XX_DVB
  103654. CX231XX_DVB_MAX_FRONTENDS
  103655. CX231XX_DVB_MAX_PACKETS
  103656. CX231XX_DVB_MAX_PACKETSIZE
  103657. CX231XX_DVB_NUM_BUFS
  103658. CX231XX_I2C_MASTER_PORT
  103659. CX231XX_INTERLACED_DEFAULT
  103660. CX231XX_ISO_NUM_AUDIO_PACKETS
  103661. CX231XX_MAXBOARDS
  103662. CX231XX_MIN_BUF
  103663. CX231XX_NEED_ADD_PS_PACKAGE_HEAD
  103664. CX231XX_NODECODER
  103665. CX231XX_NONEED_PS_PACKAGE_HEAD
  103666. CX231XX_NUM_AUDIO_PACKETS
  103667. CX231XX_NUM_BUFS
  103668. CX231XX_NUM_FRAMES
  103669. CX231XX_NUM_PACKETS
  103670. CX231XX_NUM_VBI_BUFS
  103671. CX231XX_NUM_VBI_PACKETS
  103672. CX231XX_PINOUT
  103673. CX231XX_RADIO
  103674. CX231XX_SUSPEND
  103675. CX231XX_TV_AIR
  103676. CX231XX_TV_CABLE
  103677. CX231XX_URB_TIMEOUT
  103678. CX231XX_VERSION
  103679. CX231XX_VIN_1_1
  103680. CX231XX_VIN_1_2
  103681. CX231XX_VIN_1_3
  103682. CX231XX_VIN_2_1
  103683. CX231XX_VIN_2_2
  103684. CX231XX_VIN_2_3
  103685. CX231XX_VIN_3_1
  103686. CX231XX_VIN_3_2
  103687. CX231XX_VIN_3_3
  103688. CX231XX_VIN_4_1
  103689. CX231XX_VMUX_CABLE
  103690. CX231XX_VMUX_COMPOSITE1
  103691. CX231XX_VMUX_DVB
  103692. CX231XX_VMUX_SVIDEO
  103693. CX231XX_VMUX_TELEVISION
  103694. CX231xx_COPYRIGHT_OFF
  103695. CX231xx_COPYRIGHT_ON
  103696. CX231xx_CUSTOM_EXTENSION_USR_DATA
  103697. CX231xx_CUSTOM_PRIVATE_PACKET
  103698. CX231xx_DMA_BYTES
  103699. CX231xx_DMA_FRAMES
  103700. CX231xx_DMA_TRANSFER_BITS_DONE
  103701. CX231xx_DMA_TRANSFER_BITS_ERROR
  103702. CX231xx_DMA_TRANSFER_BITS_LL_ERROR
  103703. CX231xx_END_AT_GOP
  103704. CX231xx_END_NOW
  103705. CX231xx_FIELD1_MICRONAS
  103706. CX231xx_FIELD1_SAA7114
  103707. CX231xx_FIELD1_SAA7115
  103708. CX231xx_FIELD2_MICRONAS
  103709. CX231xx_FIELD2_SAA7114
  103710. CX231xx_FIELD2_SAA7115
  103711. CX231xx_FIRMWARE
  103712. CX231xx_FIRM_IMAGE_NAME
  103713. CX231xx_FIRM_IMAGE_SIZE
  103714. CX231xx_FRAMERATE_NTSC_30
  103715. CX231xx_FRAMERATE_PAL_25
  103716. CX231xx_LAST_BUFFER
  103717. CX231xx_MORE_BUFFERS_FOLLOW
  103718. CX231xx_MPEG_CAPTURE
  103719. CX231xx_MUTE
  103720. CX231xx_MUTE_VIDEO_U_MASK
  103721. CX231xx_MUTE_VIDEO_U_SHIFT
  103722. CX231xx_MUTE_VIDEO_V_MASK
  103723. CX231xx_MUTE_VIDEO_V_SHIFT
  103724. CX231xx_MUTE_VIDEO_Y_MASK
  103725. CX231xx_MUTE_VIDEO_Y_SHIFT
  103726. CX231xx_NORMS
  103727. CX231xx_NOTIFICATION_NO_MAILBOX
  103728. CX231xx_NOTIFICATION_OFF
  103729. CX231xx_NOTIFICATION_ON
  103730. CX231xx_NOTIFICATION_REFRESH
  103731. CX231xx_OUTPUT_PORT_MEMORY
  103732. CX231xx_OUTPUT_PORT_SERIAL
  103733. CX231xx_OUTPUT_PORT_STREAMING
  103734. CX231xx_PAUSE_ENCODING
  103735. CX231xx_PICTURE_MASK_ALL_FRAMES
  103736. CX231xx_PICTURE_MASK_I_FRAMES
  103737. CX231xx_PICTURE_MASK_I_P_FRAMES
  103738. CX231xx_PICTURE_MASK_NONE
  103739. CX231xx_RAW_BITS_NONE
  103740. CX231xx_RAW_BITS_PASSTHRU_CAPTURE
  103741. CX231xx_RAW_BITS_PCM_CAPTURE
  103742. CX231xx_RAW_BITS_TO_HOST_CAPTURE
  103743. CX231xx_RAW_BITS_VBI_CAPTURE
  103744. CX231xx_RAW_BITS_YUV_CAPTURE
  103745. CX231xx_RAW_CAPTURE
  103746. CX231xx_RAW_PASSTHRU_CAPTURE
  103747. CX231xx_RESUME_ENCODING
  103748. CX231xx_UNMUTE
  103749. CX231xx_VBI_BITS_INSERT_IN_PRIVATE_PACKETS
  103750. CX231xx_VBI_BITS_INSERT_IN_XTENSION_USR_DATA
  103751. CX231xx_VBI_BITS_RAW
  103752. CX231xx_VBI_BITS_SEPARATE_STREAM
  103753. CX231xx_VBI_BITS_SEPARATE_STREAM_PRV_DATA
  103754. CX231xx_VBI_BITS_SEPARATE_STREAM_USR_DATA
  103755. CX231xx_VBI_BITS_SLICED
  103756. CX23417_GPIO_MASK
  103757. CX23417_OSC_EN
  103758. CX23417_RESET
  103759. CX23418_H
  103760. CX2341X_AUDIO_ENCODING_METHOD_AC3
  103761. CX2341X_AUDIO_ENCODING_METHOD_LPCM
  103762. CX2341X_AUDIO_ENCODING_METHOD_MPEG
  103763. CX2341X_CAP_HAS_AC3
  103764. CX2341X_CAP_HAS_SLICED_VBI
  103765. CX2341X_CAP_HAS_TS
  103766. CX2341X_DEC_EXTRACT_VBI
  103767. CX2341X_DEC_GET_DMA_STATUS
  103768. CX2341X_DEC_GET_TIMING_INFO
  103769. CX2341X_DEC_GET_VERSION
  103770. CX2341X_DEC_GET_XFER_INFO
  103771. CX2341X_DEC_HALT_FW
  103772. CX2341X_DEC_PAUSE_PLAYBACK
  103773. CX2341X_DEC_PING_FW
  103774. CX2341X_DEC_SCHED_DMA_FROM_HOST
  103775. CX2341X_DEC_SET_AUDIO_MODE
  103776. CX2341X_DEC_SET_DECODER_SOURCE
  103777. CX2341X_DEC_SET_DISPLAY_BUFFERS
  103778. CX2341X_DEC_SET_DMA_BLOCK_SIZE
  103779. CX2341X_DEC_SET_EVENT_NOTIFICATION
  103780. CX2341X_DEC_SET_PLAYBACK_SPEED
  103781. CX2341X_DEC_SET_PREBUFFERING
  103782. CX2341X_DEC_SET_STANDARD
  103783. CX2341X_DEC_SET_STREAM_INPUT
  103784. CX2341X_DEC_START_PLAYBACK
  103785. CX2341X_DEC_STEP_VIDEO
  103786. CX2341X_DEC_STOP_PLAYBACK
  103787. CX2341X_ENC_GET_PREV_DMA_INFO_MB_10
  103788. CX2341X_ENC_GET_PREV_DMA_INFO_MB_9
  103789. CX2341X_ENC_GET_SEQ_END
  103790. CX2341X_ENC_GET_VERSION
  103791. CX2341X_ENC_HALT_FW
  103792. CX2341X_ENC_INITIALIZE_INPUT
  103793. CX2341X_ENC_MISC
  103794. CX2341X_ENC_MUTE_AUDIO
  103795. CX2341X_ENC_MUTE_VIDEO
  103796. CX2341X_ENC_PAUSE_ENCODER
  103797. CX2341X_ENC_PING_FW
  103798. CX2341X_ENC_REFRESH_INPUT
  103799. CX2341X_ENC_SCHED_DMA_TO_HOST
  103800. CX2341X_ENC_SET_ASPECT_RATIO
  103801. CX2341X_ENC_SET_AUDIO_ID
  103802. CX2341X_ENC_SET_AUDIO_PROPERTIES
  103803. CX2341X_ENC_SET_BIT_RATE
  103804. CX2341X_ENC_SET_COPYRIGHT
  103805. CX2341X_ENC_SET_CORING_LEVELS
  103806. CX2341X_ENC_SET_DMA_BLOCK_SIZE
  103807. CX2341X_ENC_SET_DNR_FILTER_MODE
  103808. CX2341X_ENC_SET_DNR_FILTER_PROPS
  103809. CX2341X_ENC_SET_EVENT_NOTIFICATION
  103810. CX2341X_ENC_SET_FRAME_DROP_RATE
  103811. CX2341X_ENC_SET_FRAME_RATE
  103812. CX2341X_ENC_SET_FRAME_SIZE
  103813. CX2341X_ENC_SET_GOP_CLOSURE
  103814. CX2341X_ENC_SET_GOP_PROPERTIES
  103815. CX2341X_ENC_SET_NUM_VSYNC_LINES
  103816. CX2341X_ENC_SET_OUTPUT_PORT
  103817. CX2341X_ENC_SET_PCR_ID
  103818. CX2341X_ENC_SET_PGM_INDEX_INFO
  103819. CX2341X_ENC_SET_PLACEHOLDER
  103820. CX2341X_ENC_SET_SPATIAL_FILTER_TYPE
  103821. CX2341X_ENC_SET_STREAM_TYPE
  103822. CX2341X_ENC_SET_VBI_CONFIG
  103823. CX2341X_ENC_SET_VBI_LINE
  103824. CX2341X_ENC_SET_VERT_CROP_LINE
  103825. CX2341X_ENC_SET_VIDEO_ID
  103826. CX2341X_ENC_START_CAPTURE
  103827. CX2341X_ENC_STOP_CAPTURE
  103828. CX2341X_FIRM_DEC_FILENAME
  103829. CX2341X_FIRM_ENC_FILENAME
  103830. CX2341X_H
  103831. CX2341X_MBOX_MAX_DATA
  103832. CX2341X_OSD_BLT_COPY
  103833. CX2341X_OSD_BLT_FILL
  103834. CX2341X_OSD_BLT_TEXT
  103835. CX2341X_OSD_GET_ALPHA_CONTENT_INDEX
  103836. CX2341X_OSD_GET_FLICKER_STATE
  103837. CX2341X_OSD_GET_FRAMEBUFFER
  103838. CX2341X_OSD_GET_GLOBAL_ALPHA
  103839. CX2341X_OSD_GET_OSD_COORDS
  103840. CX2341X_OSD_GET_PIXEL_FORMAT
  103841. CX2341X_OSD_GET_SCREEN_COORDS
  103842. CX2341X_OSD_GET_STATE
  103843. CX2341X_OSD_SET_ALPHA_CONTENT_INDEX
  103844. CX2341X_OSD_SET_BLEND_COORDS
  103845. CX2341X_OSD_SET_CHROMA_KEY
  103846. CX2341X_OSD_SET_FLICKER_STATE
  103847. CX2341X_OSD_SET_FRAMEBUFFER_WINDOW
  103848. CX2341X_OSD_SET_GLOBAL_ALPHA
  103849. CX2341X_OSD_SET_OSD_COORDS
  103850. CX2341X_OSD_SET_PIXEL_FORMAT
  103851. CX2341X_OSD_SET_SCREEN_COORDS
  103852. CX2341X_OSD_SET_STATE
  103853. CX2341X_PORT_MEMORY
  103854. CX2341X_PORT_SERIAL
  103855. CX2341X_PORT_STREAMING
  103856. CX23880_CAP_CTL_CAPTURE_EVEN
  103857. CX23880_CAP_CTL_CAPTURE_ODD
  103858. CX23880_CAP_CTL_CAPTURE_VBI_EVEN
  103859. CX23880_CAP_CTL_CAPTURE_VBI_ODD
  103860. CX23885_ANALOG_VIDEO
  103861. CX23885_AUD_MC_INT_CTRL_BITS
  103862. CX23885_AUD_MC_INT_MASK_REG
  103863. CX23885_AUD_MC_INT_STAT_BITS
  103864. CX23885_AUD_MC_INT_STAT_SHFT
  103865. CX23885_AV
  103866. CX23885_BOARD_AVERMEDIA_CE310B
  103867. CX23885_BOARD_AVERMEDIA_HC81R
  103868. CX23885_BOARD_COMPRO_VIDEOMATE_E650F
  103869. CX23885_BOARD_COMPRO_VIDEOMATE_E800
  103870. CX23885_BOARD_DVBSKY_S950
  103871. CX23885_BOARD_DVBSKY_S950C
  103872. CX23885_BOARD_DVBSKY_S952
  103873. CX23885_BOARD_DVBSKY_T9580
  103874. CX23885_BOARD_DVBSKY_T980C
  103875. CX23885_BOARD_DVBSKY_T982
  103876. CX23885_BOARD_DVBWORLD_2005
  103877. CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP
  103878. CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP
  103879. CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
  103880. CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2
  103881. CX23885_BOARD_GOTVIEW_X5_3D_HYBRID
  103882. CX23885_BOARD_HAUPPAUGE_HVR1200
  103883. CX23885_BOARD_HAUPPAUGE_HVR1210
  103884. CX23885_BOARD_HAUPPAUGE_HVR1250
  103885. CX23885_BOARD_HAUPPAUGE_HVR1255
  103886. CX23885_BOARD_HAUPPAUGE_HVR1255_22111
  103887. CX23885_BOARD_HAUPPAUGE_HVR1265_K4
  103888. CX23885_BOARD_HAUPPAUGE_HVR1270
  103889. CX23885_BOARD_HAUPPAUGE_HVR1275
  103890. CX23885_BOARD_HAUPPAUGE_HVR1290
  103891. CX23885_BOARD_HAUPPAUGE_HVR1400
  103892. CX23885_BOARD_HAUPPAUGE_HVR1500
  103893. CX23885_BOARD_HAUPPAUGE_HVR1500Q
  103894. CX23885_BOARD_HAUPPAUGE_HVR1700
  103895. CX23885_BOARD_HAUPPAUGE_HVR1800
  103896. CX23885_BOARD_HAUPPAUGE_HVR1800lp
  103897. CX23885_BOARD_HAUPPAUGE_HVR1850
  103898. CX23885_BOARD_HAUPPAUGE_HVR4400
  103899. CX23885_BOARD_HAUPPAUGE_HVR5525
  103900. CX23885_BOARD_HAUPPAUGE_IMPACTVCBE
  103901. CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC
  103902. CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885
  103903. CX23885_BOARD_HAUPPAUGE_QUADHD_DVB
  103904. CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885
  103905. CX23885_BOARD_HAUPPAUGE_STARBURST
  103906. CX23885_BOARD_HAUPPAUGE_STARBURST2
  103907. CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
  103908. CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000
  103909. CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200
  103910. CX23885_BOARD_LEADTEK_WINFAST_PXTV1200
  103911. CX23885_BOARD_MAGICPRO_PROHDTVE2
  103912. CX23885_BOARD_MPX885
  103913. CX23885_BOARD_MYGICA_X8506
  103914. CX23885_BOARD_MYGICA_X8507
  103915. CX23885_BOARD_MYGICA_X8558PRO
  103916. CX23885_BOARD_NETUP_DUAL_DVBS2_CI
  103917. CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
  103918. CX23885_BOARD_NOAUTO
  103919. CX23885_BOARD_PROF_8000
  103920. CX23885_BOARD_TBS_6920
  103921. CX23885_BOARD_TBS_6980
  103922. CX23885_BOARD_TBS_6981
  103923. CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
  103924. CX23885_BOARD_TEVII_S470
  103925. CX23885_BOARD_TEVII_S471
  103926. CX23885_BOARD_TT_CT2_4500_CI
  103927. CX23885_BOARD_UNKNOWN
  103928. CX23885_BOARD_VIEWCAST_260E
  103929. CX23885_BOARD_VIEWCAST_460E
  103930. CX23885_BRIDGE_885
  103931. CX23885_BRIDGE_887
  103932. CX23885_BRIDGE_888
  103933. CX23885_BRIDGE_UNDEFINED
  103934. CX23885_COPYRIGHT_OFF
  103935. CX23885_COPYRIGHT_ON
  103936. CX23885_CUSTOM_EXTENSION_USR_DATA
  103937. CX23885_CUSTOM_PRIVATE_PACKET
  103938. CX23885_DMA_BYTES
  103939. CX23885_DMA_FRAMES
  103940. CX23885_DMA_TRANSFER_BITS_DONE
  103941. CX23885_DMA_TRANSFER_BITS_ERROR
  103942. CX23885_DMA_TRANSFER_BITS_LL_ERROR
  103943. CX23885_END_AT_GOP
  103944. CX23885_END_NOW
  103945. CX23885_FIELD1_MICRONAS
  103946. CX23885_FIELD1_SAA7114
  103947. CX23885_FIELD1_SAA7115
  103948. CX23885_FIELD2_MICRONAS
  103949. CX23885_FIELD2_SAA7114
  103950. CX23885_FIELD2_SAA7115
  103951. CX23885_FIRM_IMAGE_NAME
  103952. CX23885_FIRM_IMAGE_SIZE
  103953. CX23885_FRAMERATE_NTSC_30
  103954. CX23885_FRAMERATE_PAL_25
  103955. CX23885_HW_888_IR
  103956. CX23885_HW_AV_CORE
  103957. CX23885_IR_RX_END_OF_RX_DETECTED
  103958. CX23885_IR_RX_FIFO_SERVICE_REQ
  103959. CX23885_IR_RX_HW_FIFO_OVERRUN
  103960. CX23885_IR_RX_SW_FIFO_OVERRUN
  103961. CX23885_IR_TX_FIFO_SERVICE_REQ
  103962. CX23885_LAST_BUFFER
  103963. CX23885_MAXBOARDS
  103964. CX23885_MORE_BUFFERS_FOLLOW
  103965. CX23885_MPEG_CAPTURE
  103966. CX23885_MPEG_DVB
  103967. CX23885_MPEG_ENCODER
  103968. CX23885_MPEG_UNDEFINED
  103969. CX23885_MUTE
  103970. CX23885_MUTE_VIDEO_U_MASK
  103971. CX23885_MUTE_VIDEO_U_SHIFT
  103972. CX23885_MUTE_VIDEO_V_MASK
  103973. CX23885_MUTE_VIDEO_V_SHIFT
  103974. CX23885_MUTE_VIDEO_Y_MASK
  103975. CX23885_MUTE_VIDEO_Y_SHIFT
  103976. CX23885_NORMS
  103977. CX23885_NOTIFICATION_NO_MAILBOX
  103978. CX23885_NOTIFICATION_OFF
  103979. CX23885_NOTIFICATION_ON
  103980. CX23885_NOTIFICATION_REFRESH
  103981. CX23885_OUTPUT_PORT_MEMORY
  103982. CX23885_OUTPUT_PORT_SERIAL
  103983. CX23885_OUTPUT_PORT_STREAMING
  103984. CX23885_PAD_GPIO16
  103985. CX23885_PAD_GPIO19
  103986. CX23885_PAD_GPIO20
  103987. CX23885_PAD_GPIO21
  103988. CX23885_PAD_GPIO22
  103989. CX23885_PAD_GPIO23
  103990. CX23885_PAD_I2S_BCLK
  103991. CX23885_PAD_I2S_SDAT
  103992. CX23885_PAD_I2S_WCLK
  103993. CX23885_PAD_IRQ_N
  103994. CX23885_PAD_IR_RX
  103995. CX23885_PAD_IR_TX
  103996. CX23885_PAUSE_ENCODING
  103997. CX23885_PICTURE_MASK_ALL_FRAMES
  103998. CX23885_PICTURE_MASK_I_FRAMES
  103999. CX23885_PICTURE_MASK_I_P_FRAMES
  104000. CX23885_PICTURE_MASK_NONE
  104001. CX23885_PIN_CTRL_IRQ_AUD_STAT
  104002. CX23885_PIN_CTRL_IRQ_IR_STAT
  104003. CX23885_PIN_CTRL_IRQ_REG
  104004. CX23885_PIN_CTRL_IRQ_VID_STAT
  104005. CX23885_PIN_I2S_BCLK_GPIO23
  104006. CX23885_PIN_I2S_SDAT_GPIO21
  104007. CX23885_PIN_I2S_WCLK_GPIO22
  104008. CX23885_PIN_IRQ_N_GPIO16
  104009. CX23885_PIN_IR_RX_GPIO19
  104010. CX23885_PIN_IR_TX_GPIO20
  104011. CX23885_RADIO
  104012. CX23885_RAW_BITS_NONE
  104013. CX23885_RAW_BITS_PASSTHRU_CAPTURE
  104014. CX23885_RAW_BITS_PCM_CAPTURE
  104015. CX23885_RAW_BITS_TO_HOST_CAPTURE
  104016. CX23885_RAW_BITS_VBI_CAPTURE
  104017. CX23885_RAW_BITS_YUV_CAPTURE
  104018. CX23885_RAW_CAPTURE
  104019. CX23885_RAW_PASSTHRU_CAPTURE
  104020. CX23885_RESUME_ENCODING
  104021. CX23885_SRC_SEL_EXT_656_VIDEO
  104022. CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
  104023. CX23885_UNMUTE
  104024. CX23885_VBI_BITS_INSERT_IN_PRIVATE_PACKETS
  104025. CX23885_VBI_BITS_INSERT_IN_XTENSION_USR_DATA
  104026. CX23885_VBI_BITS_RAW
  104027. CX23885_VBI_BITS_SEPARATE_STREAM
  104028. CX23885_VBI_BITS_SEPARATE_STREAM_PRV_DATA
  104029. CX23885_VBI_BITS_SEPARATE_STREAM_USR_DATA
  104030. CX23885_VBI_BITS_SLICED
  104031. CX23885_VERSION
  104032. CX23885_VMUX_CABLE
  104033. CX23885_VMUX_COMPONENT
  104034. CX23885_VMUX_COMPOSITE1
  104035. CX23885_VMUX_COMPOSITE2
  104036. CX23885_VMUX_COMPOSITE3
  104037. CX23885_VMUX_COMPOSITE4
  104038. CX23885_VMUX_DEBUG
  104039. CX23885_VMUX_DVB
  104040. CX23885_VMUX_SVIDEO
  104041. CX23885_VMUX_TELEVISION
  104042. CX23887_AV
  104043. CX23888_AV
  104044. CX23888_IR_CDUTY_REG
  104045. CX23888_IR_CNTRL_REG
  104046. CX23888_IR_DPIPG_REG
  104047. CX23888_IR_FIFO_REG
  104048. CX23888_IR_FILTR_REG
  104049. CX23888_IR_IRQEN_REG
  104050. CX23888_IR_LEARN_REG
  104051. CX23888_IR_MAKS2_REG
  104052. CX23888_IR_MASK0_REG
  104053. CX23888_IR_MASK1_REG
  104054. CX23888_IR_REFCLK_FREQ
  104055. CX23888_IR_REG_BASE
  104056. CX23888_IR_RXCLK_REG
  104057. CX23888_IR_RX_KFIFO_SIZE
  104058. CX23888_IR_SEEDP_REG
  104059. CX23888_IR_STATS_REG
  104060. CX23888_IR_TIMOL_REG
  104061. CX23888_IR_TXCLK_REG
  104062. CX23888_IR_TX_KFIFO_SIZE
  104063. CX23888_IR_WAKE0_REG
  104064. CX23888_IR_WAKE1_REG
  104065. CX23888_IR_WAKE2_REG
  104066. CX23888_VIDCLK_FREQ
  104067. CX2388x_FIRMWARE
  104068. CX24110_H
  104069. CX24113_H
  104070. CX24116_ARGLEN
  104071. CX24116_DEFAULT_FIRMWARE
  104072. CX24116_DISEQC_ARG2_2
  104073. CX24116_DISEQC_ARG3_0
  104074. CX24116_DISEQC_ARG4_0
  104075. CX24116_DISEQC_BURST
  104076. CX24116_DISEQC_MESGCACHE
  104077. CX24116_DISEQC_MINI_A
  104078. CX24116_DISEQC_MINI_B
  104079. CX24116_DISEQC_MSGLEN
  104080. CX24116_DISEQC_MSGOFS
  104081. CX24116_DISEQC_TONECACHE
  104082. CX24116_DISEQC_TONEOFF
  104083. CX24116_FEC_DVBS
  104084. CX24116_FEC_FECMASK
  104085. CX24116_FEC_PILOT
  104086. CX24116_FEC_UNKNOWN
  104087. CX24116_H
  104088. CX24116_HAS_CARRIER
  104089. CX24116_HAS_SIGNAL
  104090. CX24116_HAS_SYNCLOCK
  104091. CX24116_HAS_UNKNOWN1
  104092. CX24116_HAS_UNKNOWN2
  104093. CX24116_HAS_VITERBI
  104094. CX24116_PILOT_OFF
  104095. CX24116_PILOT_ON
  104096. CX24116_REG_BER0
  104097. CX24116_REG_BER16
  104098. CX24116_REG_BER24
  104099. CX24116_REG_BER8
  104100. CX24116_REG_CLKDIV
  104101. CX24116_REG_COMMAND
  104102. CX24116_REG_EXECUTE
  104103. CX24116_REG_FECSTATUS
  104104. CX24116_REG_MAILBOX
  104105. CX24116_REG_QSTATUS
  104106. CX24116_REG_QUALITY0
  104107. CX24116_REG_QUALITY8
  104108. CX24116_REG_RATEDIV
  104109. CX24116_REG_RESET
  104110. CX24116_REG_SIGNAL
  104111. CX24116_REG_SSTATUS
  104112. CX24116_REG_UCB0
  104113. CX24116_REG_UCB8
  104114. CX24116_ROLLOFF_020
  104115. CX24116_ROLLOFF_025
  104116. CX24116_ROLLOFF_035
  104117. CX24116_SEARCH_RANGE_KHZ
  104118. CX24116_SIGNAL_MASK
  104119. CX24116_STATUS_MASK
  104120. CX24117_ARGLEN
  104121. CX24117_DEFAULT_FIRMWARE
  104122. CX24117_DISEQC_ARG3_2
  104123. CX24117_DISEQC_ARG4_0
  104124. CX24117_DISEQC_ARG5_0
  104125. CX24117_DISEQC_BURST
  104126. CX24117_DISEQC_DEMOD
  104127. CX24117_DISEQC_MINI_A
  104128. CX24117_DISEQC_MINI_B
  104129. CX24117_DISEQC_MSGLEN
  104130. CX24117_DISEQC_MSGOFS
  104131. CX24117_H
  104132. CX24117_HAS_CARRIER
  104133. CX24117_HAS_SIGNAL
  104134. CX24117_HAS_SYNCLOCK
  104135. CX24117_HAS_VITERBI
  104136. CX24117_OCC
  104137. CX24117_PILOT_AUTO
  104138. CX24117_PILOT_OFF
  104139. CX24117_PILOT_ON
  104140. CX24117_PNE
  104141. CX24117_REG_BER1_0
  104142. CX24117_REG_BER1_1
  104143. CX24117_REG_BER2_0
  104144. CX24117_REG_BER2_1
  104145. CX24117_REG_BER3_0
  104146. CX24117_REG_BER3_1
  104147. CX24117_REG_BER4_0
  104148. CX24117_REG_BER4_1
  104149. CX24117_REG_CLKDIV0
  104150. CX24117_REG_CLKDIV1
  104151. CX24117_REG_COMMAND
  104152. CX24117_REG_DVBS2_UCB1_0
  104153. CX24117_REG_DVBS2_UCB1_1
  104154. CX24117_REG_DVBS2_UCB2_0
  104155. CX24117_REG_DVBS2_UCB2_1
  104156. CX24117_REG_DVBS_UCB1_0
  104157. CX24117_REG_DVBS_UCB1_1
  104158. CX24117_REG_DVBS_UCB2_0
  104159. CX24117_REG_DVBS_UCB2_1
  104160. CX24117_REG_EXECUTE
  104161. CX24117_REG_FREQ1_0
  104162. CX24117_REG_FREQ1_1
  104163. CX24117_REG_FREQ2_0
  104164. CX24117_REG_FREQ2_1
  104165. CX24117_REG_FREQ3_0
  104166. CX24117_REG_FREQ3_1
  104167. CX24117_REG_FREQ4_1
  104168. CX24117_REG_FREQ5_0
  104169. CX24117_REG_FREQ5_1
  104170. CX24117_REG_FREQ6_0
  104171. CX24117_REG_QSTATUS0
  104172. CX24117_REG_QSTATUS1
  104173. CX24117_REG_QUALITY1_0
  104174. CX24117_REG_QUALITY1_1
  104175. CX24117_REG_QUALITY2_0
  104176. CX24117_REG_QUALITY2_1
  104177. CX24117_REG_RATEDIV0
  104178. CX24117_REG_RATEDIV1
  104179. CX24117_REG_SIGNAL0
  104180. CX24117_REG_SIGNAL1
  104181. CX24117_REG_SRATE1_0
  104182. CX24117_REG_SRATE1_1
  104183. CX24117_REG_SRATE2_0
  104184. CX24117_REG_SRATE2_1
  104185. CX24117_REG_SSTATUS0
  104186. CX24117_REG_SSTATUS1
  104187. CX24117_REG_STATE0
  104188. CX24117_REG_STATE1
  104189. CX24117_ROLLOFF_020
  104190. CX24117_ROLLOFF_025
  104191. CX24117_ROLLOFF_035
  104192. CX24117_SEARCH_RANGE_KHZ
  104193. CX24117_SIGNAL_MASK
  104194. CX24117_STATUS_MASK
  104195. CX24120_BER_WINDOW
  104196. CX24120_BER_WSIZE
  104197. CX24120_FIRMWARE
  104198. CX24120_H
  104199. CX24120_HAS_CARRIER
  104200. CX24120_HAS_LOCK
  104201. CX24120_HAS_SIGNAL
  104202. CX24120_HAS_UNK1
  104203. CX24120_HAS_UNK2
  104204. CX24120_HAS_VITERBI
  104205. CX24120_MAX_CMD_LEN
  104206. CX24120_PILOT_AUTO
  104207. CX24120_PILOT_OFF
  104208. CX24120_PILOT_ON
  104209. CX24120_REG_BER_HH
  104210. CX24120_REG_BER_HL
  104211. CX24120_REG_BER_LH
  104212. CX24120_REG_BER_LL
  104213. CX24120_REG_CLKDIV
  104214. CX24120_REG_CMD_ARGS
  104215. CX24120_REG_CMD_END
  104216. CX24120_REG_CMD_START
  104217. CX24120_REG_FECMODE
  104218. CX24120_REG_FREQ1
  104219. CX24120_REG_FREQ2
  104220. CX24120_REG_FREQ3
  104221. CX24120_REG_MAILBOX
  104222. CX24120_REG_QUALITY_H
  104223. CX24120_REG_QUALITY_L
  104224. CX24120_REG_RATEDIV
  104225. CX24120_REG_REVISION
  104226. CX24120_REG_SIGSTR_H
  104227. CX24120_REG_SIGSTR_L
  104228. CX24120_REG_STATUS
  104229. CX24120_REG_UCB_H
  104230. CX24120_REG_UCB_L
  104231. CX24120_SEARCH_RANGE_KHZ
  104232. CX24120_SIGNAL_MASK
  104233. CX24120_STATUS_MASK
  104234. CX24123_H
  104235. CX25821_264
  104236. CX25821_BOARD
  104237. CX25821_BOARD_CONEXANT_ATHENA10
  104238. CX25821_ERR
  104239. CX25821_H_
  104240. CX25821_INFO
  104241. CX25821_MAXBOARDS
  104242. CX25821_NORMS
  104243. CX25821_RAW
  104244. CX25821_SRC_SEL_EXT_656_VIDEO
  104245. CX25821_SRC_SEL_PARALLEL_MPEG_VIDEO
  104246. CX25821_UNDEFINED
  104247. CX25821_VIDEO_H_
  104248. CX25821_WARN
  104249. CX25836
  104250. CX25837
  104251. CX25840
  104252. CX25840_AUDIO4
  104253. CX25840_AUDIO5
  104254. CX25840_AUDIO6
  104255. CX25840_AUDIO7
  104256. CX25840_AUDIO8
  104257. CX25840_AUDIO_SERIAL
  104258. CX25840_AUD_INT_CTRL_REG
  104259. CX25840_AUD_INT_STAT_REG
  104260. CX25840_COMPONENT_ON
  104261. CX25840_COMPOSITE1
  104262. CX25840_COMPOSITE2
  104263. CX25840_COMPOSITE3
  104264. CX25840_COMPOSITE4
  104265. CX25840_COMPOSITE5
  104266. CX25840_COMPOSITE6
  104267. CX25840_COMPOSITE7
  104268. CX25840_COMPOSITE8
  104269. CX25840_DIF_ON
  104270. CX25840_FIRMWARE
  104271. CX25840_IR_CDUTY_REG
  104272. CX25840_IR_CNTRL_REG
  104273. CX25840_IR_FIFO_REG
  104274. CX25840_IR_FILTR_REG
  104275. CX25840_IR_IRQEN_REG
  104276. CX25840_IR_REFCLK_FREQ
  104277. CX25840_IR_REG_BASE
  104278. CX25840_IR_RXCLK_REG
  104279. CX25840_IR_RX_KFIFO_SIZE
  104280. CX25840_IR_STATS_REG
  104281. CX25840_IR_TXCLK_REG
  104282. CX25840_IR_TX_KFIFO_SIZE
  104283. CX25840_NONE0_CH3
  104284. CX25840_NONE1_CH3
  104285. CX25840_NONE_CH2
  104286. CX25840_NUM_PADS
  104287. CX25840_PAD_ACTIVE
  104288. CX25840_PAD_AC_SDOUT
  104289. CX25840_PAD_AC_SYNC
  104290. CX25840_PAD_AUX_PLL
  104291. CX25840_PAD_CBFLAG
  104292. CX25840_PAD_DEFAULT
  104293. CX25840_PAD_GPI0
  104294. CX25840_PAD_GPI1
  104295. CX25840_PAD_GPI2
  104296. CX25840_PAD_GPI3
  104297. CX25840_PAD_GPO0
  104298. CX25840_PAD_GPO1
  104299. CX25840_PAD_GPO2
  104300. CX25840_PAD_GPO3
  104301. CX25840_PAD_INPUT
  104302. CX25840_PAD_IRQ_N
  104303. CX25840_PAD_PLL_CLK
  104304. CX25840_PAD_RESERVED
  104305. CX25840_PAD_VACTIVE
  104306. CX25840_PAD_VID_DATA_EXT0
  104307. CX25840_PAD_VID_DATA_EXT1
  104308. CX25840_PAD_VID_OUT
  104309. CX25840_PAD_VID_PLL
  104310. CX25840_PAD_VRESET
  104311. CX25840_PAD_XTI
  104312. CX25840_PAD_XTI_X5_DLL
  104313. CX25840_PIN_CHIP_SEL_VIPCLK
  104314. CX25840_PIN_DRIVE_FAST
  104315. CX25840_PIN_DRIVE_MEDIUM
  104316. CX25840_PIN_DRIVE_SLOW
  104317. CX25840_PIN_DVALID_PRGM0
  104318. CX25840_PIN_FIELD_PRGM1
  104319. CX25840_PIN_GPIO0_PRGM8
  104320. CX25840_PIN_GPIO1_PRGM9
  104321. CX25840_PIN_HRESET_PRGM2
  104322. CX25840_PIN_IRQ_N_PRGM4
  104323. CX25840_PIN_IR_RX_PRGM5
  104324. CX25840_PIN_IR_TX_PRGM6
  104325. CX25840_PIN_PLL_CLK_PRGM7
  104326. CX25840_PIN_SA_SDIN
  104327. CX25840_PIN_SA_SDOUT
  104328. CX25840_PIN_VRESET_HCTL_PRGM3
  104329. CX25840_SVIDEO1
  104330. CX25840_SVIDEO2
  104331. CX25840_SVIDEO3
  104332. CX25840_SVIDEO4
  104333. CX25840_SVIDEO_CHROMA4
  104334. CX25840_SVIDEO_CHROMA5
  104335. CX25840_SVIDEO_CHROMA6
  104336. CX25840_SVIDEO_CHROMA7
  104337. CX25840_SVIDEO_CHROMA8
  104338. CX25840_SVIDEO_LUMA1
  104339. CX25840_SVIDEO_LUMA2
  104340. CX25840_SVIDEO_LUMA3
  104341. CX25840_SVIDEO_LUMA4
  104342. CX25840_SVIDEO_LUMA5
  104343. CX25840_SVIDEO_LUMA6
  104344. CX25840_SVIDEO_LUMA7
  104345. CX25840_SVIDEO_LUMA8
  104346. CX25840_SVIDEO_ON
  104347. CX25840_VCONFIG_ACTIVE_COMPOSITE
  104348. CX25840_VCONFIG_ACTIVE_HORIZONTAL
  104349. CX25840_VCONFIG_ACTIVE_MASK
  104350. CX25840_VCONFIG_ACTIVE_SHIFT
  104351. CX25840_VCONFIG_ANCDATA_DISABLED
  104352. CX25840_VCONFIG_ANCDATA_ENABLED
  104353. CX25840_VCONFIG_ANCDATA_MASK
  104354. CX25840_VCONFIG_ANCDATA_SHIFT
  104355. CX25840_VCONFIG_CLKGATE_MASK
  104356. CX25840_VCONFIG_CLKGATE_NONE
  104357. CX25840_VCONFIG_CLKGATE_SHIFT
  104358. CX25840_VCONFIG_CLKGATE_VALID
  104359. CX25840_VCONFIG_CLKGATE_VALIDACTIVE
  104360. CX25840_VCONFIG_DCMODE_BYTES
  104361. CX25840_VCONFIG_DCMODE_DWORDS
  104362. CX25840_VCONFIG_DCMODE_MASK
  104363. CX25840_VCONFIG_DCMODE_SHIFT
  104364. CX25840_VCONFIG_FMT_BT601
  104365. CX25840_VCONFIG_FMT_BT656
  104366. CX25840_VCONFIG_FMT_MASK
  104367. CX25840_VCONFIG_FMT_SHIFT
  104368. CX25840_VCONFIG_FMT_VIP11
  104369. CX25840_VCONFIG_FMT_VIP2
  104370. CX25840_VCONFIG_HRESETW_MASK
  104371. CX25840_VCONFIG_HRESETW_NORMAL
  104372. CX25840_VCONFIG_HRESETW_PIXCLK
  104373. CX25840_VCONFIG_HRESETW_SHIFT
  104374. CX25840_VCONFIG_IDID0S_LINECNT
  104375. CX25840_VCONFIG_IDID0S_MASK
  104376. CX25840_VCONFIG_IDID0S_NORMAL
  104377. CX25840_VCONFIG_IDID0S_SHIFT
  104378. CX25840_VCONFIG_OPTION
  104379. CX25840_VCONFIG_RES_10BIT
  104380. CX25840_VCONFIG_RES_8BIT
  104381. CX25840_VCONFIG_RES_MASK
  104382. CX25840_VCONFIG_RES_SHIFT
  104383. CX25840_VCONFIG_SET_BIT
  104384. CX25840_VCONFIG_TASKBIT_MASK
  104385. CX25840_VCONFIG_TASKBIT_ONE
  104386. CX25840_VCONFIG_TASKBIT_SHIFT
  104387. CX25840_VCONFIG_TASKBIT_ZERO
  104388. CX25840_VCONFIG_VALID_ANDACTIVE
  104389. CX25840_VCONFIG_VALID_MASK
  104390. CX25840_VCONFIG_VALID_NORMAL
  104391. CX25840_VCONFIG_VALID_SHIFT
  104392. CX25840_VCONFIG_VBIRAW_DISABLED
  104393. CX25840_VCONFIG_VBIRAW_ENABLED
  104394. CX25840_VCONFIG_VBIRAW_MASK
  104395. CX25840_VCONFIG_VBIRAW_SHIFT
  104396. CX25840_VCONFIG_VIPCLAMP_DISABLED
  104397. CX25840_VCONFIG_VIPCLAMP_ENABLED
  104398. CX25840_VCONFIG_VIPCLAMP_MASK
  104399. CX25840_VCONFIG_VIPCLAMP_SHIFT
  104400. CX25840_VIDCLK_FREQ
  104401. CX25840_VID_INT_MASK_BITS
  104402. CX25840_VID_INT_MASK_REG
  104403. CX25840_VID_INT_MASK_SHFT
  104404. CX25840_VID_INT_STAT_BITS
  104405. CX25840_VID_INT_STAT_REG
  104406. CX25840_VIN1_CH1
  104407. CX25840_VIN2_CH1
  104408. CX25840_VIN3_CH1
  104409. CX25840_VIN4_CH1
  104410. CX25840_VIN4_CH2
  104411. CX25840_VIN5_CH1
  104412. CX25840_VIN5_CH2
  104413. CX25840_VIN6_CH1
  104414. CX25840_VIN6_CH2
  104415. CX25840_VIN7_CH1
  104416. CX25840_VIN7_CH3
  104417. CX25840_VIN8_CH1
  104418. CX25840_VIN8_CH3
  104419. CX25841
  104420. CX25842
  104421. CX25843
  104422. CX700_FUNCTION2
  104423. CX700_FUNCTION3
  104424. CX700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM
  104425. CX700_IGA1_FIFO_HIGH_THRESHOLD
  104426. CX700_IGA1_FIFO_MAX_DEPTH
  104427. CX700_IGA1_FIFO_THRESHOLD
  104428. CX700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM
  104429. CX700_IGA2_FIFO_HIGH_THRESHOLD
  104430. CX700_IGA2_FIFO_MAX_DEPTH
  104431. CX700_IGA2_FIFO_THRESHOLD
  104432. CX700_REVISION_700
  104433. CX700_REVISION_700M
  104434. CX700_REVISION_700M2
  104435. CX82310_MTU
  104436. CX86_ARR_BASE
  104437. CX86_CCR0
  104438. CX86_CCR1
  104439. CX86_CCR2
  104440. CX86_CCR3
  104441. CX86_CCR4
  104442. CX86_CCR5
  104443. CX86_CCR6
  104444. CX86_CCR7
  104445. CX86_DIR0
  104446. CX86_DIR1
  104447. CX86_GCR
  104448. CX86_PCR0
  104449. CX86_PCR1
  104450. CX86_RCR_BASE
  104451. CX8800_AUD_CTLS
  104452. CX8800_VID_CTLS
  104453. CX8802_DRVCTL_EXCLUSIVE
  104454. CX8802_DRVCTL_SHARED
  104455. CX885_VERSION
  104456. CX88X_DEVCTRL
  104457. CX88X_EN_TBFX
  104458. CX88X_EN_VSFX
  104459. CX88_AUDIO_TVAUDIO
  104460. CX88_AUDIO_WM8775
  104461. CX88_BOARD_ADSTECH_DVB_T_PCI
  104462. CX88_BOARD_ADSTECH_PTV_390
  104463. CX88_BOARD_ASUS_PVR_416
  104464. CX88_BOARD_ATI_HDTVWONDER
  104465. CX88_BOARD_ATI_WONDER_PRO
  104466. CX88_BOARD_AVERMEDIA_ULTRATV_MC_550
  104467. CX88_BOARD_AVERTV_303
  104468. CX88_BOARD_AVERTV_STUDIO_303
  104469. CX88_BOARD_CONEXANT_DVB_T1
  104470. CX88_BOARD_DIGITALLOGIC_MEC
  104471. CX88_BOARD_DNTV_LIVE_DVB_T
  104472. CX88_BOARD_DNTV_LIVE_DVB_T_PRO
  104473. CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q
  104474. CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T
  104475. CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD
  104476. CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO
  104477. CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD
  104478. CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1
  104479. CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL
  104480. CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID
  104481. CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS
  104482. CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO
  104483. CX88_BOARD_GDI
  104484. CX88_BOARD_GENIATECH_DVBS
  104485. CX88_BOARD_GENIATECH_X8000_MT
  104486. CX88_BOARD_HAUPPAUGE
  104487. CX88_BOARD_HAUPPAUGE_DVB_T1
  104488. CX88_BOARD_HAUPPAUGE_HVR1100
  104489. CX88_BOARD_HAUPPAUGE_HVR1100LP
  104490. CX88_BOARD_HAUPPAUGE_HVR1300
  104491. CX88_BOARD_HAUPPAUGE_HVR3000
  104492. CX88_BOARD_HAUPPAUGE_HVR4000
  104493. CX88_BOARD_HAUPPAUGE_HVR4000LITE
  104494. CX88_BOARD_HAUPPAUGE_IRONLY
  104495. CX88_BOARD_HAUPPAUGE_NOVASE2_S1
  104496. CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1
  104497. CX88_BOARD_HAUPPAUGE_ROSLYN
  104498. CX88_BOARD_IODATA_GVBCTV7E
  104499. CX88_BOARD_IODATA_GVVCP3PCI
  104500. CX88_BOARD_KWORLD_ATSC_120
  104501. CX88_BOARD_KWORLD_DVBS_100
  104502. CX88_BOARD_KWORLD_DVB_T
  104503. CX88_BOARD_KWORLD_DVB_T_CX22702
  104504. CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT
  104505. CX88_BOARD_KWORLD_LTV883
  104506. CX88_BOARD_KWORLD_MCE200_DELUXE
  104507. CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD
  104508. CX88_BOARD_LEADTEK_PVR2000
  104509. CX88_BOARD_MSI_TVANYWHERE
  104510. CX88_BOARD_MSI_TVANYWHERE_MASTER
  104511. CX88_BOARD_NOAUTO
  104512. CX88_BOARD_NONE
  104513. CX88_BOARD_NORWOOD_MICRO
  104514. CX88_BOARD_NPGTECH_REALTV_TOP10FM
  104515. CX88_BOARD_OMICOM_SS4_PCI
  104516. CX88_BOARD_PCHDTV_HD3000
  104517. CX88_BOARD_PCHDTV_HD5500
  104518. CX88_BOARD_PINNACLE_HYBRID_PCTV
  104519. CX88_BOARD_PINNACLE_PCTV_HD_800i
  104520. CX88_BOARD_PIXELVIEW
  104521. CX88_BOARD_PIXELVIEW_PLAYTV_P7000
  104522. CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO
  104523. CX88_BOARD_POWERCOLOR_REAL_ANGEL
  104524. CX88_BOARD_PROF_6200
  104525. CX88_BOARD_PROF_7300
  104526. CX88_BOARD_PROF_7301
  104527. CX88_BOARD_PROLINK_PLAYTVPVR
  104528. CX88_BOARD_PROLINK_PV_8000GT
  104529. CX88_BOARD_PROLINK_PV_GLOBAL_XTREME
  104530. CX88_BOARD_PROVIDEO_PV259
  104531. CX88_BOARD_SAMSUNG_SMT_7020
  104532. CX88_BOARD_SATTRADE_ST4200
  104533. CX88_BOARD_TBS_8910
  104534. CX88_BOARD_TBS_8920
  104535. CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1
  104536. CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII
  104537. CX88_BOARD_TEVII_S420
  104538. CX88_BOARD_TEVII_S460
  104539. CX88_BOARD_TEVII_S464
  104540. CX88_BOARD_TE_DTV_250_OEM_SWANN
  104541. CX88_BOARD_TWINHAN_VP1027_DVBS
  104542. CX88_BOARD_UNKNOWN
  104543. CX88_BOARD_WINFAST2000XP_EXPERT
  104544. CX88_BOARD_WINFAST_DTV1000
  104545. CX88_BOARD_WINFAST_DTV1800H
  104546. CX88_BOARD_WINFAST_DTV1800H_XC4000
  104547. CX88_BOARD_WINFAST_DTV2000H
  104548. CX88_BOARD_WINFAST_DTV2000H_J
  104549. CX88_BOARD_WINFAST_DTV2000H_PLUS
  104550. CX88_BOARD_WINFAST_DV2000
  104551. CX88_BOARD_WINFAST_TV2000_XP_GLOBAL
  104552. CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36
  104553. CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43
  104554. CX88_H
  104555. CX88_MAXBOARDS
  104556. CX88_MPEG_BLACKBIRD
  104557. CX88_MPEG_DVB
  104558. CX88_NORMS
  104559. CX88_RADIO
  104560. CX88_VERSION
  104561. CX88_VMUX_CABLE
  104562. CX88_VMUX_COMPOSITE1
  104563. CX88_VMUX_COMPOSITE2
  104564. CX88_VMUX_COMPOSITE3
  104565. CX88_VMUX_COMPOSITE4
  104566. CX88_VMUX_DEBUG
  104567. CX88_VMUX_DVB
  104568. CX88_VMUX_SVIDEO
  104569. CX88_VMUX_TELEVISION
  104570. CXACRU_ALL_FILES
  104571. CXACRU_ATTR_CREATE
  104572. CXACRU_ATTR_INIT
  104573. CXACRU_ATTR_REMOVE
  104574. CXACRU_CMD_CREATE
  104575. CXACRU_CMD_INIT
  104576. CXACRU_CMD_REMOVE
  104577. CXACRU_EP_CMD
  104578. CXACRU_EP_DATA
  104579. CXACRU_SET_CREATE
  104580. CXACRU_SET_INIT
  104581. CXACRU_SET_REMOVE
  104582. CXACRU__ATTR_CREATE
  104583. CXACRU__ATTR_INIT
  104584. CXACRU__ATTR_REMOVE
  104585. CXADEC_AAGC_CTL
  104586. CXADEC_AC97_CTL
  104587. CXADEC_AFE_CTRL
  104588. CXADEC_AFE_DIAG_CTRL1
  104589. CXADEC_AFE_DIAG_CTRL2
  104590. CXADEC_AFE_DIAG_CTRL3
  104591. CXADEC_AM_FM_DIFF
  104592. CXADEC_AM_MTS_DET
  104593. CXADEC_ANALOG_MUX_CTL
  104594. CXADEC_ANLOG_DEMOD_CTL
  104595. CXADEC_AUD_LOCK1
  104596. CXADEC_AUD_LOCK2
  104597. CXADEC_AUX_PLL_FRAC
  104598. CXADEC_BASEBAND_OUT_SEL
  104599. CXADEC_BIST_STAT
  104600. CXADEC_BRIGHTNESS_CTRL_BYTE
  104601. CXADEC_CHIP_CTRL
  104602. CXADEC_CHIP_TYPE_MAKO
  104603. CXADEC_CHIP_TYPE_TIGER
  104604. CXADEC_CHROMA_CTRL
  104605. CXADEC_CHROMA_VBIOFF_CFG
  104606. CXADEC_COMB_CTRL
  104607. CXADEC_CONTRAST_CTRL_BYTE
  104608. CXADEC_CRUSH_CTRL
  104609. CXADEC_DBX1_CTL1
  104610. CXADEC_DBX1_CTL2
  104611. CXADEC_DBX1_STATUS
  104612. CXADEC_DBX2_CTL1
  104613. CXADEC_DBX2_CTL2
  104614. CXADEC_DBX2_STATUS
  104615. CXADEC_DEEMPH_COEF1
  104616. CXADEC_DEEMPH_COEF2
  104617. CXADEC_DEEMPH_GAIN_CTL
  104618. CXADEC_DEMATRIX_CTL
  104619. CXADEC_DETECT_DUAL
  104620. CXADEC_DETECT_NO_SIGNAL
  104621. CXADEC_DETECT_SAP
  104622. CXADEC_DETECT_STEREO
  104623. CXADEC_DETECT_TRI
  104624. CXADEC_DFE_CTRL1
  104625. CXADEC_DFE_CTRL2
  104626. CXADEC_DFE_CTRL3
  104627. CXADEC_DFT1_CTL1
  104628. CXADEC_DFT1_CTL2
  104629. CXADEC_DFT2_CTL1
  104630. CXADEC_DFT2_CTL2
  104631. CXADEC_DFT2_STATUS
  104632. CXADEC_DFT3_CTL1
  104633. CXADEC_DFT3_CTL2
  104634. CXADEC_DFT3_STATUS
  104635. CXADEC_DFT4_CTL1
  104636. CXADEC_DFT4_CTL2
  104637. CXADEC_DFT4_STATUS
  104638. CXADEC_DFT_STATUS
  104639. CXADEC_DIG_PLL_CTL1
  104640. CXADEC_DIG_PLL_CTL2
  104641. CXADEC_DIG_PLL_CTL3
  104642. CXADEC_DIG_PLL_CTL4
  104643. CXADEC_DIG_PLL_CTL5
  104644. CXADEC_DLL1_DIAG_CTRL
  104645. CXADEC_DLL2_DIAG_CTRL
  104646. CXADEC_DL_CTL
  104647. CXADEC_DL_CTL_ADDRESS_HIGH
  104648. CXADEC_DL_CTL_ADDRESS_LOW
  104649. CXADEC_DL_CTL_CONTROL
  104650. CXADEC_DL_CTL_DATA
  104651. CXADEC_DW8051_INT
  104652. CXADEC_FIELD_COUNT
  104653. CXADEC_FM1_CTL
  104654. CXADEC_GENERAL_CTL
  104655. CXADEC_GEN_STAT
  104656. CXADEC_HORIZ_TIM_CTRL
  104657. CXADEC_HOST_REG1
  104658. CXADEC_HOST_REG2
  104659. CXADEC_HSCALE_CTRL
  104660. CXADEC_HTL_CTRL
  104661. CXADEC_HUE_CTRL_BYTE
  104662. CXADEC_I2S_IN_CTL
  104663. CXADEC_I2S_MCLK
  104664. CXADEC_I2S_OUT_CTL
  104665. CXADEC_IF_SRC_CTL
  104666. CXADEC_INT_STAT_MASK
  104667. CXADEC_IR_CDUTY_REG
  104668. CXADEC_IR_CTRL_REG
  104669. CXADEC_IR_FIFO_REG
  104670. CXADEC_IR_FILTER_REG
  104671. CXADEC_IR_IRQEN_REG
  104672. CXADEC_IR_RXCLK_REG
  104673. CXADEC_IR_STAT_REG
  104674. CXADEC_IR_TXCLK_REG
  104675. CXADEC_LUMA_CTRL
  104676. CXADEC_LUMA_CTRL_BYTE_3
  104677. CXADEC_MISC_DIAG_CTRL
  104678. CXADEC_MISC_TIM_CTRL
  104679. CXADEC_MODE_CTRL
  104680. CXADEC_MV_DT_CTRL2
  104681. CXADEC_MV_DT_CTRL3
  104682. CXADEC_NICAM_STATUS
  104683. CXADEC_OUT_CTRL1
  104684. CXADEC_OUT_CTRL2
  104685. CXADEC_PATH1_CTL1
  104686. CXADEC_PATH1_EQ_CTL
  104687. CXADEC_PATH1_SC_CTL
  104688. CXADEC_PATH1_VOL_CTL
  104689. CXADEC_PATH2_CTL1
  104690. CXADEC_PATH2_EQ_CTL
  104691. CXADEC_PATH2_SC_CTL
  104692. CXADEC_PATH2_VOL_CTL
  104693. CXADEC_PDF_CTL
  104694. CXADEC_PIN_CFG1
  104695. CXADEC_PIN_CFG2
  104696. CXADEC_PIN_CFG3
  104697. CXADEC_PIN_CTRL1
  104698. CXADEC_PIN_CTRL2
  104699. CXADEC_PLL_CTRL1
  104700. CXADEC_PLL_CTRL2
  104701. CXADEC_PLL_DIAG_CTRL
  104702. CXADEC_POWER_CTRL
  104703. CXADEC_PREF_MODE_DUAL_LANG_AB
  104704. CXADEC_PREF_MODE_DUAL_LANG_AC
  104705. CXADEC_PREF_MODE_DUAL_LANG_BC
  104706. CXADEC_PREF_MODE_FALLBACK
  104707. CXADEC_PREF_MODE_MONO_LANGA
  104708. CXADEC_PREF_MODE_MONO_LANGB
  104709. CXADEC_PREF_MODE_MONO_LANGC
  104710. CXADEC_PREF_MODE_STEREO
  104711. CXADEC_QAM_CONST_DEC
  104712. CXADEC_QAM_PDF
  104713. CXADEC_QAM_ROTATOR_FREQ
  104714. CXADEC_ROT_FREQ_CTL
  104715. CXADEC_SELECT_AUDIO_STANDARD_A2_M
  104716. CXADEC_SELECT_AUDIO_STANDARD_AUTO
  104717. CXADEC_SELECT_AUDIO_STANDARD_BG
  104718. CXADEC_SELECT_AUDIO_STANDARD_BTSC
  104719. CXADEC_SELECT_AUDIO_STANDARD_DK1
  104720. CXADEC_SELECT_AUDIO_STANDARD_DK2
  104721. CXADEC_SELECT_AUDIO_STANDARD_DK3
  104722. CXADEC_SELECT_AUDIO_STANDARD_EIAJ
  104723. CXADEC_SELECT_AUDIO_STANDARD_FM
  104724. CXADEC_SELECT_AUDIO_STANDARD_I
  104725. CXADEC_SELECT_AUDIO_STANDARD_L
  104726. CXADEC_SOFT_RST_CTRL
  104727. CXADEC_SRC1_CTL
  104728. CXADEC_SRC2_CTL
  104729. CXADEC_SRC3_CTL
  104730. CXADEC_SRC4_CTL
  104731. CXADEC_SRC5_CTL
  104732. CXADEC_SRC6_CTL
  104733. CXADEC_SRC_COMB_CFG
  104734. CXADEC_SRC_CTL
  104735. CXADEC_SRC_LF_COEF
  104736. CXADEC_STD_DET_CTL
  104737. CXADEC_STD_DET_CTL_AUD_CTL
  104738. CXADEC_STD_DET_CTL_PREF_MODE
  104739. CXADEC_STD_DET_STATUS
  104740. CXADEC_TEST_CTRL1
  104741. CXADEC_TEST_CTRL2
  104742. CXADEC_USAT_CTRL_BYTE
  104743. CXADEC_VBI_CUST1_CFG1
  104744. CXADEC_VBI_CUST1_CFG2
  104745. CXADEC_VBI_CUST1_CFG3
  104746. CXADEC_VBI_CUST2_CFG1
  104747. CXADEC_VBI_CUST2_CFG2
  104748. CXADEC_VBI_CUST2_CFG3
  104749. CXADEC_VBI_CUST3_CFG1
  104750. CXADEC_VBI_CUST3_CFG2
  104751. CXADEC_VBI_CUST3_CFG3
  104752. CXADEC_VBI_FC_CFG
  104753. CXADEC_VBI_LINE_CTRL1
  104754. CXADEC_VBI_LINE_CTRL2
  104755. CXADEC_VBI_LINE_CTRL3
  104756. CXADEC_VBI_LINE_CTRL4
  104757. CXADEC_VBI_LINE_CTRL5
  104758. CXADEC_VBI_MISC_CFG1
  104759. CXADEC_VBI_MISC_CFG2
  104760. CXADEC_VBI_PAY1
  104761. CXADEC_VBI_PAY2
  104762. CXADEC_VERT_TIM_CTRL
  104763. CXADEC_VID_PLL_FRAC
  104764. CXADEC_VSAT_CTRL_BYTE
  104765. CXADEC_VSCALE_CTRL
  104766. CXD2820R_CLK
  104767. CXD2820R_GPIO_D
  104768. CXD2820R_GPIO_E
  104769. CXD2820R_GPIO_H
  104770. CXD2820R_GPIO_I
  104771. CXD2820R_GPIO_L
  104772. CXD2820R_GPIO_O
  104773. CXD2820R_H
  104774. CXD2820R_LOG10_8_24
  104775. CXD2820R_LOG2_E_24
  104776. CXD2820R_PRIV_H
  104777. CXD2820R_TS_PARALLEL
  104778. CXD2820R_TS_PARALLEL_MSB
  104779. CXD2820R_TS_SERIAL
  104780. CXD2820R_TS_SERIAL_MSB
  104781. CXD2837ER_CHIP_ID
  104782. CXD2838ER_CHIP_ID
  104783. CXD2841ER_ASCOT
  104784. CXD2841ER_AUTO_IFHZ
  104785. CXD2841ER_CHIP_ID
  104786. CXD2841ER_DVBS_POLLING_INVL
  104787. CXD2841ER_EARLY_TUNE
  104788. CXD2841ER_H
  104789. CXD2841ER_NO_AGCNEG
  104790. CXD2841ER_NO_WAIT_LOCK
  104791. CXD2841ER_PRIV_H
  104792. CXD2841ER_TSBITS
  104793. CXD2841ER_TS_SERIAL
  104794. CXD2841ER_USE_GATECTRL
  104795. CXD2843ER_CHIP_ID
  104796. CXD2854ER_CHIP_ID
  104797. CXD2880_COMMON_H
  104798. CXD2880_DEVIO_SPI_H
  104799. CXD2880_DTV_BW_1_7_MHZ
  104800. CXD2880_DTV_BW_5_MHZ
  104801. CXD2880_DTV_BW_6_MHZ
  104802. CXD2880_DTV_BW_7_MHZ
  104803. CXD2880_DTV_BW_8_MHZ
  104804. CXD2880_DTV_BW_UNKNOWN
  104805. CXD2880_DTV_H
  104806. CXD2880_DTV_SYS_ANY
  104807. CXD2880_DTV_SYS_DVBT
  104808. CXD2880_DTV_SYS_DVBT2
  104809. CXD2880_DTV_SYS_UNKNOWN
  104810. CXD2880_DVBT2_BASE_S2_M16K_G_ANY
  104811. CXD2880_DVBT2_BASE_S2_M1K_G_ANY
  104812. CXD2880_DVBT2_BASE_S2_M2K_G_ANY
  104813. CXD2880_DVBT2_BASE_S2_M32K_G_DVBT
  104814. CXD2880_DVBT2_BASE_S2_M32K_G_DVBT2
  104815. CXD2880_DVBT2_BASE_S2_M4K_G_ANY
  104816. CXD2880_DVBT2_BASE_S2_M8K_G_DVBT
  104817. CXD2880_DVBT2_BASE_S2_M8K_G_DVBT2
  104818. CXD2880_DVBT2_BASE_S2_UNKNOWN
  104819. CXD2880_DVBT2_BW_10
  104820. CXD2880_DVBT2_BW_1_7
  104821. CXD2880_DVBT2_BW_5
  104822. CXD2880_DVBT2_BW_6
  104823. CXD2880_DVBT2_BW_7
  104824. CXD2880_DVBT2_BW_8
  104825. CXD2880_DVBT2_BW_RSVD1
  104826. CXD2880_DVBT2_BW_RSVD10
  104827. CXD2880_DVBT2_BW_RSVD2
  104828. CXD2880_DVBT2_BW_RSVD3
  104829. CXD2880_DVBT2_BW_RSVD4
  104830. CXD2880_DVBT2_BW_RSVD5
  104831. CXD2880_DVBT2_BW_RSVD6
  104832. CXD2880_DVBT2_BW_RSVD7
  104833. CXD2880_DVBT2_BW_RSVD8
  104834. CXD2880_DVBT2_BW_RSVD9
  104835. CXD2880_DVBT2_BW_UNKNOWN
  104836. CXD2880_DVBT2_CONSTELL_UNKNOWN
  104837. CXD2880_DVBT2_CON_RSVD1
  104838. CXD2880_DVBT2_CON_RSVD2
  104839. CXD2880_DVBT2_CON_RSVD3
  104840. CXD2880_DVBT2_CON_RSVD4
  104841. CXD2880_DVBT2_FEC_LDPC_16K
  104842. CXD2880_DVBT2_FEC_LDPC_64K
  104843. CXD2880_DVBT2_FEC_RSVD1
  104844. CXD2880_DVBT2_FEC_RSVD2
  104845. CXD2880_DVBT2_FEC_UNKNOWN
  104846. CXD2880_DVBT2_G19_128
  104847. CXD2880_DVBT2_G19_256
  104848. CXD2880_DVBT2_G1_128
  104849. CXD2880_DVBT2_G1_16
  104850. CXD2880_DVBT2_G1_32
  104851. CXD2880_DVBT2_G1_4
  104852. CXD2880_DVBT2_G1_8
  104853. CXD2880_DVBT2_G_RSVD1
  104854. CXD2880_DVBT2_G_UNKNOWN
  104855. CXD2880_DVBT2_H
  104856. CXD2880_DVBT2_L1POST_BPSK
  104857. CXD2880_DVBT2_L1POST_CONSTELL_UNKNOWN
  104858. CXD2880_DVBT2_L1POST_C_RSVD1
  104859. CXD2880_DVBT2_L1POST_C_RSVD10
  104860. CXD2880_DVBT2_L1POST_C_RSVD11
  104861. CXD2880_DVBT2_L1POST_C_RSVD12
  104862. CXD2880_DVBT2_L1POST_C_RSVD2
  104863. CXD2880_DVBT2_L1POST_C_RSVD3
  104864. CXD2880_DVBT2_L1POST_C_RSVD4
  104865. CXD2880_DVBT2_L1POST_C_RSVD5
  104866. CXD2880_DVBT2_L1POST_C_RSVD6
  104867. CXD2880_DVBT2_L1POST_C_RSVD7
  104868. CXD2880_DVBT2_L1POST_C_RSVD8
  104869. CXD2880_DVBT2_L1POST_C_RSVD9
  104870. CXD2880_DVBT2_L1POST_FEC_LDPC16K
  104871. CXD2880_DVBT2_L1POST_FEC_RSVD1
  104872. CXD2880_DVBT2_L1POST_FEC_RSVD2
  104873. CXD2880_DVBT2_L1POST_FEC_RSVD3
  104874. CXD2880_DVBT2_L1POST_FEC_UNKNOWN
  104875. CXD2880_DVBT2_L1POST_QAM16
  104876. CXD2880_DVBT2_L1POST_QAM64
  104877. CXD2880_DVBT2_L1POST_QPSK
  104878. CXD2880_DVBT2_L1POST_R1_2
  104879. CXD2880_DVBT2_L1POST_R_RSVD1
  104880. CXD2880_DVBT2_L1POST_R_RSVD2
  104881. CXD2880_DVBT2_L1POST_R_RSVD3
  104882. CXD2880_DVBT2_L1POST_R_UNKNOWN
  104883. CXD2880_DVBT2_L1PRE_TYPE_GS
  104884. CXD2880_DVBT2_L1PRE_TYPE_RESERVED
  104885. CXD2880_DVBT2_L1PRE_TYPE_TS
  104886. CXD2880_DVBT2_L1PRE_TYPE_TS_GS
  104887. CXD2880_DVBT2_L1PRE_TYPE_UNKNOWN
  104888. CXD2880_DVBT2_LITE_S2_M16K_G_DVBT
  104889. CXD2880_DVBT2_LITE_S2_M16K_G_DVBT2
  104890. CXD2880_DVBT2_LITE_S2_M2K_G_ANY
  104891. CXD2880_DVBT2_LITE_S2_M4K_G_ANY
  104892. CXD2880_DVBT2_LITE_S2_M8K_G_DVBT
  104893. CXD2880_DVBT2_LITE_S2_M8K_G_DVBT2
  104894. CXD2880_DVBT2_LITE_S2_RSVD1
  104895. CXD2880_DVBT2_LITE_S2_RSVD2
  104896. CXD2880_DVBT2_LITE_S2_UNKNOWN
  104897. CXD2880_DVBT2_M16K
  104898. CXD2880_DVBT2_M1K
  104899. CXD2880_DVBT2_M2K
  104900. CXD2880_DVBT2_M32K
  104901. CXD2880_DVBT2_M4K
  104902. CXD2880_DVBT2_M8K
  104903. CXD2880_DVBT2_M_RSVD1
  104904. CXD2880_DVBT2_M_RSVD2
  104905. CXD2880_DVBT2_PAPR_0
  104906. CXD2880_DVBT2_PAPR_1
  104907. CXD2880_DVBT2_PAPR_2
  104908. CXD2880_DVBT2_PAPR_3
  104909. CXD2880_DVBT2_PAPR_RSVD1
  104910. CXD2880_DVBT2_PAPR_RSVD10
  104911. CXD2880_DVBT2_PAPR_RSVD11
  104912. CXD2880_DVBT2_PAPR_RSVD12
  104913. CXD2880_DVBT2_PAPR_RSVD2
  104914. CXD2880_DVBT2_PAPR_RSVD3
  104915. CXD2880_DVBT2_PAPR_RSVD4
  104916. CXD2880_DVBT2_PAPR_RSVD5
  104917. CXD2880_DVBT2_PAPR_RSVD6
  104918. CXD2880_DVBT2_PAPR_RSVD7
  104919. CXD2880_DVBT2_PAPR_RSVD8
  104920. CXD2880_DVBT2_PAPR_RSVD9
  104921. CXD2880_DVBT2_PAPR_UNKNOWN
  104922. CXD2880_DVBT2_PLP_COMMON
  104923. CXD2880_DVBT2_PLP_CR_UNKNOWN
  104924. CXD2880_DVBT2_PLP_DATA
  104925. CXD2880_DVBT2_PLP_MODE_HEM
  104926. CXD2880_DVBT2_PLP_MODE_NM
  104927. CXD2880_DVBT2_PLP_MODE_NOTSPECIFIED
  104928. CXD2880_DVBT2_PLP_MODE_RESERVED
  104929. CXD2880_DVBT2_PLP_MODE_UNKNOWN
  104930. CXD2880_DVBT2_PLP_PAYLOAD_GCS
  104931. CXD2880_DVBT2_PLP_PAYLOAD_GFPS
  104932. CXD2880_DVBT2_PLP_PAYLOAD_GSE
  104933. CXD2880_DVBT2_PLP_PAYLOAD_RSVD1
  104934. CXD2880_DVBT2_PLP_PAYLOAD_RSVD10
  104935. CXD2880_DVBT2_PLP_PAYLOAD_RSVD11
  104936. CXD2880_DVBT2_PLP_PAYLOAD_RSVD12
  104937. CXD2880_DVBT2_PLP_PAYLOAD_RSVD13
  104938. CXD2880_DVBT2_PLP_PAYLOAD_RSVD14
  104939. CXD2880_DVBT2_PLP_PAYLOAD_RSVD15
  104940. CXD2880_DVBT2_PLP_PAYLOAD_RSVD16
  104941. CXD2880_DVBT2_PLP_PAYLOAD_RSVD17
  104942. CXD2880_DVBT2_PLP_PAYLOAD_RSVD18
  104943. CXD2880_DVBT2_PLP_PAYLOAD_RSVD19
  104944. CXD2880_DVBT2_PLP_PAYLOAD_RSVD2
  104945. CXD2880_DVBT2_PLP_PAYLOAD_RSVD20
  104946. CXD2880_DVBT2_PLP_PAYLOAD_RSVD21
  104947. CXD2880_DVBT2_PLP_PAYLOAD_RSVD22
  104948. CXD2880_DVBT2_PLP_PAYLOAD_RSVD23
  104949. CXD2880_DVBT2_PLP_PAYLOAD_RSVD24
  104950. CXD2880_DVBT2_PLP_PAYLOAD_RSVD25
  104951. CXD2880_DVBT2_PLP_PAYLOAD_RSVD26
  104952. CXD2880_DVBT2_PLP_PAYLOAD_RSVD27
  104953. CXD2880_DVBT2_PLP_PAYLOAD_RSVD28
  104954. CXD2880_DVBT2_PLP_PAYLOAD_RSVD3
  104955. CXD2880_DVBT2_PLP_PAYLOAD_RSVD4
  104956. CXD2880_DVBT2_PLP_PAYLOAD_RSVD5
  104957. CXD2880_DVBT2_PLP_PAYLOAD_RSVD6
  104958. CXD2880_DVBT2_PLP_PAYLOAD_RSVD7
  104959. CXD2880_DVBT2_PLP_PAYLOAD_RSVD8
  104960. CXD2880_DVBT2_PLP_PAYLOAD_RSVD9
  104961. CXD2880_DVBT2_PLP_PAYLOAD_TS
  104962. CXD2880_DVBT2_PLP_PAYLOAD_UNKNOWN
  104963. CXD2880_DVBT2_PLP_TYPE_COMMON
  104964. CXD2880_DVBT2_PLP_TYPE_DATA1
  104965. CXD2880_DVBT2_PLP_TYPE_DATA2
  104966. CXD2880_DVBT2_PLP_TYPE_RSVD1
  104967. CXD2880_DVBT2_PLP_TYPE_RSVD2
  104968. CXD2880_DVBT2_PLP_TYPE_RSVD3
  104969. CXD2880_DVBT2_PLP_TYPE_RSVD4
  104970. CXD2880_DVBT2_PLP_TYPE_RSVD5
  104971. CXD2880_DVBT2_PLP_TYPE_UNKNOWN
  104972. CXD2880_DVBT2_PP1
  104973. CXD2880_DVBT2_PP2
  104974. CXD2880_DVBT2_PP3
  104975. CXD2880_DVBT2_PP4
  104976. CXD2880_DVBT2_PP5
  104977. CXD2880_DVBT2_PP6
  104978. CXD2880_DVBT2_PP7
  104979. CXD2880_DVBT2_PP8
  104980. CXD2880_DVBT2_PP_RSVD1
  104981. CXD2880_DVBT2_PP_RSVD2
  104982. CXD2880_DVBT2_PP_RSVD3
  104983. CXD2880_DVBT2_PP_RSVD4
  104984. CXD2880_DVBT2_PP_RSVD5
  104985. CXD2880_DVBT2_PP_RSVD6
  104986. CXD2880_DVBT2_PP_RSVD7
  104987. CXD2880_DVBT2_PP_RSVD8
  104988. CXD2880_DVBT2_PP_UNKNOWN
  104989. CXD2880_DVBT2_PROFILE_ANY
  104990. CXD2880_DVBT2_PROFILE_BASE
  104991. CXD2880_DVBT2_PROFILE_LITE
  104992. CXD2880_DVBT2_QAM16
  104993. CXD2880_DVBT2_QAM256
  104994. CXD2880_DVBT2_QAM64
  104995. CXD2880_DVBT2_QPSK
  104996. CXD2880_DVBT2_R1_2
  104997. CXD2880_DVBT2_R1_3
  104998. CXD2880_DVBT2_R2_3
  104999. CXD2880_DVBT2_R2_5
  105000. CXD2880_DVBT2_R3_4
  105001. CXD2880_DVBT2_R3_5
  105002. CXD2880_DVBT2_R4_5
  105003. CXD2880_DVBT2_R5_6
  105004. CXD2880_DVBT2_S1_BASE_MISO
  105005. CXD2880_DVBT2_S1_BASE_SISO
  105006. CXD2880_DVBT2_S1_LITE_MISO
  105007. CXD2880_DVBT2_S1_LITE_SISO
  105008. CXD2880_DVBT2_S1_NON_DVBT2
  105009. CXD2880_DVBT2_S1_RSVD3
  105010. CXD2880_DVBT2_S1_RSVD4
  105011. CXD2880_DVBT2_S1_RSVD5
  105012. CXD2880_DVBT2_S1_UNKNOWN
  105013. CXD2880_DVBT2_STREAM_GENERIC_CONTINUOUS
  105014. CXD2880_DVBT2_STREAM_GENERIC_ENCAPSULATED
  105015. CXD2880_DVBT2_STREAM_GENERIC_PACKETIZED
  105016. CXD2880_DVBT2_STREAM_TRANSPORT
  105017. CXD2880_DVBT2_STREAM_UNKNOWN
  105018. CXD2880_DVBT2_TUNE_PARAM_PLPID_AUTO
  105019. CXD2880_DVBT2_V111
  105020. CXD2880_DVBT2_V121
  105021. CXD2880_DVBT2_V131
  105022. CXD2880_DVBT_CODERATE_1_2
  105023. CXD2880_DVBT_CODERATE_2_3
  105024. CXD2880_DVBT_CODERATE_3_4
  105025. CXD2880_DVBT_CODERATE_5_6
  105026. CXD2880_DVBT_CODERATE_7_8
  105027. CXD2880_DVBT_CODERATE_RESERVED_5
  105028. CXD2880_DVBT_CODERATE_RESERVED_6
  105029. CXD2880_DVBT_CODERATE_RESERVED_7
  105030. CXD2880_DVBT_CONSTELLATION_16QAM
  105031. CXD2880_DVBT_CONSTELLATION_64QAM
  105032. CXD2880_DVBT_CONSTELLATION_QPSK
  105033. CXD2880_DVBT_CONSTELLATION_RESERVED_3
  105034. CXD2880_DVBT_GUARD_1_16
  105035. CXD2880_DVBT_GUARD_1_32
  105036. CXD2880_DVBT_GUARD_1_4
  105037. CXD2880_DVBT_GUARD_1_8
  105038. CXD2880_DVBT_H
  105039. CXD2880_DVBT_HIERARCHY_1
  105040. CXD2880_DVBT_HIERARCHY_2
  105041. CXD2880_DVBT_HIERARCHY_4
  105042. CXD2880_DVBT_HIERARCHY_NON
  105043. CXD2880_DVBT_MODE_2K
  105044. CXD2880_DVBT_MODE_8K
  105045. CXD2880_DVBT_MODE_RESERVED_2
  105046. CXD2880_DVBT_MODE_RESERVED_3
  105047. CXD2880_DVBT_PROFILE_HP
  105048. CXD2880_DVBT_PROFILE_LP
  105049. CXD2880_H
  105050. CXD2880_INTEG_H
  105051. CXD2880_IO_H
  105052. CXD2880_IO_TGT_DMD
  105053. CXD2880_IO_TGT_SYS
  105054. CXD2880_MAX_FILTER_SIZE
  105055. CXD2880_SPI_DEVICE_H
  105056. CXD2880_SPI_H
  105057. CXD2880_SPI_MODE_0
  105058. CXD2880_SPI_MODE_1
  105059. CXD2880_SPI_MODE_2
  105060. CXD2880_SPI_MODE_3
  105061. CXD2880_TNRDMD_CFG_BLINDTUNE_DVBT2_FIRST
  105062. CXD2880_TNRDMD_CFG_CABLE_INPUT
  105063. CXD2880_TNRDMD_CFG_DVBT2_BBER_MES
  105064. CXD2880_TNRDMD_CFG_DVBT2_FEF_INTERMITTENT_BASE
  105065. CXD2880_TNRDMD_CFG_DVBT2_FEF_INTERMITTENT_LITE
  105066. CXD2880_TNRDMD_CFG_DVBT2_LBER_MES
  105067. CXD2880_TNRDMD_CFG_DVBT2_PER_MES
  105068. CXD2880_TNRDMD_CFG_DVBT_BERN_PERIOD
  105069. CXD2880_TNRDMD_CFG_DVBT_PER_MES
  105070. CXD2880_TNRDMD_CFG_DVBT_VBER_PERIOD
  105071. CXD2880_TNRDMD_CFG_FIXED_CLOCKMODE
  105072. CXD2880_TNRDMD_CFG_INTERRUPT
  105073. CXD2880_TNRDMD_CFG_INTERRUPT_INV_LOCK_SEL
  105074. CXD2880_TNRDMD_CFG_INTERRUPT_LOCK_SEL
  105075. CXD2880_TNRDMD_CFG_LATCH_ON_POSEDGE
  105076. CXD2880_TNRDMD_CFG_OUTPUT_SEL_MSB
  105077. CXD2880_TNRDMD_CFG_PWM_VALUE
  105078. CXD2880_TNRDMD_CFG_TSBYTECLK_MANUAL
  105079. CXD2880_TNRDMD_CFG_TSCLK_CONT
  105080. CXD2880_TNRDMD_CFG_TSCLK_FREQ
  105081. CXD2880_TNRDMD_CFG_TSCLK_MASK
  105082. CXD2880_TNRDMD_CFG_TSERR_ACTIVE_HI
  105083. CXD2880_TNRDMD_CFG_TSERR_MASK
  105084. CXD2880_TNRDMD_CFG_TSERR_VALID_DIS
  105085. CXD2880_TNRDMD_CFG_TSPIN_CURRENT
  105086. CXD2880_TNRDMD_CFG_TSPIN_PULLUP
  105087. CXD2880_TNRDMD_CFG_TSPIN_PULLUP_MANUAL
  105088. CXD2880_TNRDMD_CFG_TSSYNC_ACTIVE_HI
  105089. CXD2880_TNRDMD_CFG_TSVALID_ACTIVE_HI
  105090. CXD2880_TNRDMD_CFG_TSVALID_MASK
  105091. CXD2880_TNRDMD_CFG_TS_BACKWARDS_COMPATIBLE
  105092. CXD2880_TNRDMD_CFG_TS_BUF_ALMOST_EMPTY_THRS
  105093. CXD2880_TNRDMD_CFG_TS_BUF_ALMOST_FULL_THRS
  105094. CXD2880_TNRDMD_CFG_TS_BUF_RRDY_THRS
  105095. CXD2880_TNRDMD_CFG_TS_PACKET_GAP
  105096. CXD2880_TNRDMD_CHIP_ID_CXD2880_ES1_0X
  105097. CXD2880_TNRDMD_CHIP_ID_CXD2880_ES1_11
  105098. CXD2880_TNRDMD_CHIP_ID_UNKNOWN
  105099. CXD2880_TNRDMD_CHIP_ID_VALID
  105100. CXD2880_TNRDMD_CLOCKMODE_A
  105101. CXD2880_TNRDMD_CLOCKMODE_B
  105102. CXD2880_TNRDMD_CLOCKMODE_C
  105103. CXD2880_TNRDMD_CLOCKMODE_UNKNOWN
  105104. CXD2880_TNRDMD_DIVERMODE_MAIN
  105105. CXD2880_TNRDMD_DIVERMODE_SINGLE
  105106. CXD2880_TNRDMD_DIVERMODE_SUB
  105107. CXD2880_TNRDMD_DRIVER_RELEASE_DATE
  105108. CXD2880_TNRDMD_DRIVER_VERSION
  105109. CXD2880_TNRDMD_DVBT2_H
  105110. CXD2880_TNRDMD_DVBT2_MON_H
  105111. CXD2880_TNRDMD_DVBT2_TUNE_INFO_INVALID_PLP_ID
  105112. CXD2880_TNRDMD_DVBT2_TUNE_INFO_OK
  105113. CXD2880_TNRDMD_DVBT_H
  105114. CXD2880_TNRDMD_DVBT_MON_H
  105115. CXD2880_TNRDMD_GPIO_MODE_EEW
  105116. CXD2880_TNRDMD_GPIO_MODE_EWS
  105117. CXD2880_TNRDMD_GPIO_MODE_FEC_FAIL
  105118. CXD2880_TNRDMD_GPIO_MODE_INPUT
  105119. CXD2880_TNRDMD_GPIO_MODE_INT
  105120. CXD2880_TNRDMD_GPIO_MODE_OUTPUT
  105121. CXD2880_TNRDMD_GPIO_MODE_PWM
  105122. CXD2880_TNRDMD_H
  105123. CXD2880_TNRDMD_INTERRUPT_LOCK_SEL_DMD_LOCK
  105124. CXD2880_TNRDMD_INTERRUPT_LOCK_SEL_L1POST_OK
  105125. CXD2880_TNRDMD_INTERRUPT_LOCK_SEL_TS_LOCK
  105126. CXD2880_TNRDMD_INTERRUPT_TYPE_BUF_ALMOST_EMPTY
  105127. CXD2880_TNRDMD_INTERRUPT_TYPE_BUF_ALMOST_FULL
  105128. CXD2880_TNRDMD_INTERRUPT_TYPE_BUF_OVERFLOW
  105129. CXD2880_TNRDMD_INTERRUPT_TYPE_BUF_RRDY
  105130. CXD2880_TNRDMD_INTERRUPT_TYPE_BUF_UNDERFLOW
  105131. CXD2880_TNRDMD_INTERRUPT_TYPE_CPU_ERROR
  105132. CXD2880_TNRDMD_INTERRUPT_TYPE_EEW
  105133. CXD2880_TNRDMD_INTERRUPT_TYPE_EWS
  105134. CXD2880_TNRDMD_INTERRUPT_TYPE_FEC_FAIL
  105135. CXD2880_TNRDMD_INTERRUPT_TYPE_ILLEGAL_ACCESS
  105136. CXD2880_TNRDMD_INTERRUPT_TYPE_ILLEGAL_COMMAND
  105137. CXD2880_TNRDMD_INTERRUPT_TYPE_INV_LOCK
  105138. CXD2880_TNRDMD_INTERRUPT_TYPE_LOCK
  105139. CXD2880_TNRDMD_INTERRUPT_TYPE_NOOFDM
  105140. CXD2880_TNRDMD_LOCK_RESULT_LOCKED
  105141. CXD2880_TNRDMD_LOCK_RESULT_NOTDETECT
  105142. CXD2880_TNRDMD_LOCK_RESULT_UNLOCKED
  105143. CXD2880_TNRDMD_MAX_CFG_MEM_COUNT
  105144. CXD2880_TNRDMD_MON_H
  105145. CXD2880_TNRDMD_SERIAL_TS_CLK_FULL
  105146. CXD2880_TNRDMD_SERIAL_TS_CLK_HALF
  105147. CXD2880_TNRDMD_SPECTRUM_INV
  105148. CXD2880_TNRDMD_SPECTRUM_NORMAL
  105149. CXD2880_TNRDMD_STATE_ACTIVE
  105150. CXD2880_TNRDMD_STATE_INVALID
  105151. CXD2880_TNRDMD_STATE_SLEEP
  105152. CXD2880_TNRDMD_STATE_UNKNOWN
  105153. CXD2880_TNRDMD_TSOUT_IF_SDIO
  105154. CXD2880_TNRDMD_TSOUT_IF_SPI
  105155. CXD2880_TNRDMD_TSOUT_IF_TS
  105156. CXD2880_TNRDMD_WAIT_AGC_STABLE
  105157. CXD2880_TNRDMD_WAIT_INIT_INTVL
  105158. CXD2880_TNRDMD_WAIT_INIT_TIMEOUT
  105159. CXD2880_TNRDMD_XTAL_SHARE_EXTREF
  105160. CXD2880_TNRDMD_XTAL_SHARE_MASTER
  105161. CXD2880_TNRDMD_XTAL_SHARE_NONE
  105162. CXD2880_TNRDMD_XTAL_SHARE_SLAVE
  105163. CXERR_ABORT
  105164. CXERR_APU_MB_CORRUPT
  105165. CXERR_BADPTR
  105166. CXERR_BADVER
  105167. CXERR_BUSY
  105168. CXERR_CHANNELNOTREADY
  105169. CXERR_CPU_MB_CORRUPT
  105170. CXERR_DEVPOWER_OFF
  105171. CXERR_DEV_NOT_FOUND
  105172. CXERR_FILE_OPEN_READ
  105173. CXERR_FILE_OPEN_WRITE
  105174. CXERR_I2CDEV_CLOCKLOW
  105175. CXERR_I2CDEV_DATALOW
  105176. CXERR_I2CDEV_NOTFOUND
  105177. CXERR_I2CDEV_XFERERR
  105178. CXERR_I2C_BADSECTION
  105179. CXERR_INVALID_PARAM1
  105180. CXERR_INVALID_PARAM2
  105181. CXERR_LINK
  105182. CXERR_NODATA_AGAIN
  105183. CXERR_NOMEM
  105184. CXERR_NOTSUPPORTED
  105185. CXERR_NOT_OPEN
  105186. CXERR_NO_HW_I2C_INTR
  105187. CXERR_OUTOFRANGE
  105188. CXERR_OVERFLOW
  105189. CXERR_PPU_MB_CORRUPT
  105190. CXERR_RPU_NOT_READY
  105191. CXERR_RPU_NO_ACK
  105192. CXERR_STOPPING_STATUS
  105193. CXERR_TIMEOUT
  105194. CXERR_UNK_CMD
  105195. CXGB3I_MAX_LUN
  105196. CXGB3I_SCSI_HOST_QDEPTH
  105197. CXGB3I_TX_HEADER_LEN
  105198. CXGB3_ABI_USER_H
  105199. CXGB3_ATTR_R
  105200. CXGB3_ATTR_RW
  105201. CXGB3_SHOW
  105202. CXGB4I_DEFAULT_10G_RCV_WIN
  105203. CXGB4I_DEFAULT_10G_SND_WIN
  105204. CXGB4I_MAX_CONN
  105205. CXGB4I_MAX_LUN
  105206. CXGB4I_MAX_TARGET
  105207. CXGB4I_SCSI_HOST_QDEPTH
  105208. CXGB4I_TX_HEADER_LEN
  105209. CXGB4VF_FULL_INIT_DONE
  105210. CXGB4VF_FW_OK
  105211. CXGB4VF_QUEUES_BOUND
  105212. CXGB4VF_ROOT_NO_RELAXED_ORDERING
  105213. CXGB4VF_USING_MSI
  105214. CXGB4VF_USING_MSIX
  105215. CXGB4_ABI_USER_H
  105216. CXGB4_BAR2_QTYPE_EGRESS
  105217. CXGB4_BAR2_QTYPE_INGRESS
  105218. CXGB4_CONTROL_DB_DROP
  105219. CXGB4_CONTROL_DB_EMPTY
  105220. CXGB4_CONTROL_DB_FULL
  105221. CXGB4_DCBX_FW_SUPPORT
  105222. CXGB4_DCBX_HOST_SUPPORT
  105223. CXGB4_DCB_ENABLED
  105224. CXGB4_DCB_FW_APP_ID
  105225. CXGB4_DCB_FW_PFC
  105226. CXGB4_DCB_FW_PGID
  105227. CXGB4_DCB_FW_PGRATE
  105228. CXGB4_DCB_FW_PRIORATE
  105229. CXGB4_DCB_INPUT_FW_ALLSYNCED
  105230. CXGB4_DCB_INPUT_FW_DISABLED
  105231. CXGB4_DCB_INPUT_FW_ENABLED
  105232. CXGB4_DCB_INPUT_FW_INCOMPLETE
  105233. CXGB4_DCB_STATE_FW_ALLSYNCED
  105234. CXGB4_DCB_STATE_FW_INCOMPLETE
  105235. CXGB4_DCB_STATE_HOST
  105236. CXGB4_DCB_STATE_START
  105237. CXGB4_DEV_ENABLED
  105238. CXGB4_ETHTOOL_DUMP_FLAGS
  105239. CXGB4_ETH_DUMP_ALL
  105240. CXGB4_ETH_DUMP_HW
  105241. CXGB4_ETH_DUMP_MEM
  105242. CXGB4_ETH_DUMP_NONE
  105243. CXGB4_FULL_INIT_DONE
  105244. CXGB4_FW_OFLD_CONN
  105245. CXGB4_FW_OK
  105246. CXGB4_MASTER_PF
  105247. CXGB4_MAX_DCBX_APP_SUPPORTED
  105248. CXGB4_MAX_PRIORITY
  105249. CXGB4_MAX_TCS
  105250. CXGB4_MSG_AN
  105251. CXGB4_NUM_TRIPS
  105252. CXGB4_ROOT_NO_RELAXED_ORDERING
  105253. CXGB4_RSS_TNLALLLOOKUP
  105254. CXGB4_SGE_DBQ_TIMER
  105255. CXGB4_SHUTTING_DOWN
  105256. CXGB4_STATE_DETACH
  105257. CXGB4_STATE_DOWN
  105258. CXGB4_STATE_FATAL_ERROR
  105259. CXGB4_STATE_START_RECOVERY
  105260. CXGB4_STATE_UP
  105261. CXGB4_TXQ_CTRL
  105262. CXGB4_TXQ_ETH
  105263. CXGB4_TXQ_MAX
  105264. CXGB4_TXQ_ULD
  105265. CXGB4_TX_CRYPTO
  105266. CXGB4_TX_MAX
  105267. CXGB4_TX_OFLD
  105268. CXGB4_ULD_CRYPTO
  105269. CXGB4_ULD_INIT
  105270. CXGB4_ULD_ISCSI
  105271. CXGB4_ULD_ISCSIT
  105272. CXGB4_ULD_MAX
  105273. CXGB4_ULD_RDMA
  105274. CXGB4_ULD_TLS
  105275. CXGB4_UNIFIED_PF
  105276. CXGB4_USING_MSI
  105277. CXGB4_USING_MSIX
  105278. CXGB4_USING_SOFT_PARAMS
  105279. CXGBIT_10G_RCV_WIN
  105280. CXGBIT_10G_SND_WIN
  105281. CXGBIT_ISO_FSLICE
  105282. CXGBIT_ISO_LSLICE
  105283. CXGBIT_MAX_ISO_PAYLOAD
  105284. CXGBIT_SKB_CB
  105285. CXGBIT_SUBMODE_DCRC
  105286. CXGBIT_SUBMODE_HCRC
  105287. CXGBI_DBG_DDP
  105288. CXGBI_DBG_DEV
  105289. CXGBI_DBG_ISCSI
  105290. CXGBI_DBG_PDU_RX
  105291. CXGBI_DBG_PDU_TX
  105292. CXGBI_DBG_SOCK
  105293. CXGBI_DBG_TOE
  105294. CXGBI_FLAG_ADAPTER_RESET
  105295. CXGBI_FLAG_DDP_OFF
  105296. CXGBI_FLAG_DEV_T3
  105297. CXGBI_FLAG_DEV_T4
  105298. CXGBI_FLAG_IPV4_SET
  105299. CXGBI_FLAG_USE_PPOD_OFLDQ
  105300. CXGBI_MAX_CONN
  105301. CXGBI_PPOD_INFO_FLAG_MAPPED
  105302. CXGBI_PPOD_INFO_FLAG_VALID
  105303. CXGBI_SKB_CB
  105304. CXGB_FCOE_ENABLED
  105305. CXGB_FCOE_TXPKT_CSUM_END
  105306. CXGB_FCOE_TXPKT_CSUM_START
  105307. CXINF_ADSL_HEADEND
  105308. CXINF_ADSL_HEADEND_ENVIRONMENT
  105309. CXINF_CONTROLLER_VERSION
  105310. CXINF_DOWNSTREAM_ATTENUATION
  105311. CXINF_DOWNSTREAM_BITS_PER_FRAME
  105312. CXINF_DOWNSTREAM_CRC_ERRORS
  105313. CXINF_DOWNSTREAM_FEC_ERRORS
  105314. CXINF_DOWNSTREAM_HEC_ERRORS
  105315. CXINF_DOWNSTREAM_RATE
  105316. CXINF_DOWNSTREAM_SNR_MARGIN
  105317. CXINF_LINE_STARTABLE
  105318. CXINF_LINE_STATUS
  105319. CXINF_LINK_STATUS
  105320. CXINF_MAC_ADDRESS_HIGH
  105321. CXINF_MAC_ADDRESS_LOW
  105322. CXINF_MAX
  105323. CXINF_MODULATION
  105324. CXINF_STARTUP_ATTEMPTS
  105325. CXINF_TRANSMITTER_POWER
  105326. CXINF_UPSTREAM_ATTENUATION
  105327. CXINF_UPSTREAM_BITS_PER_FRAME
  105328. CXINF_UPSTREAM_CRC_ERRORS
  105329. CXINF_UPSTREAM_FEC_ERRORS
  105330. CXINF_UPSTREAM_HEC_ERRORS
  105331. CXINF_UPSTREAM_RATE
  105332. CXINF_UPSTREAM_SNR_MARGIN
  105333. CXIO_ERROR_FATAL
  105334. CXIO_FW_MAJ
  105335. CXLFLASH_ADAPTER_NAME
  105336. CXLFLASH_BLOCK_SIZE
  105337. CXLFLASH_DEF_HWQS
  105338. CXLFLASH_MAX_ADAPTERS
  105339. CXLFLASH_MAX_CDB_LEN
  105340. CXLFLASH_MAX_CMDS
  105341. CXLFLASH_MAX_CMDS_PER_LUN
  105342. CXLFLASH_MAX_CONTEXT
  105343. CXLFLASH_MAX_FC_BANKS
  105344. CXLFLASH_MAX_FC_PORTS
  105345. CXLFLASH_MAX_HWQS
  105346. CXLFLASH_MAX_NUM_LUNS_PER_TARGET
  105347. CXLFLASH_MAX_NUM_TARGETS_PER_BUS
  105348. CXLFLASH_MAX_SECTORS
  105349. CXLFLASH_MAX_XFER_SIZE
  105350. CXLFLASH_NAME
  105351. CXLFLASH_NOTIFY_SHUTDOWN
  105352. CXLFLASH_NUM_FC_PORTS_PER_BANK
  105353. CXLFLASH_NUM_REGS
  105354. CXLFLASH_NUM_VLUNS
  105355. CXLFLASH_OCXL_DEV
  105356. CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT
  105357. CXLFLASH_TARGET
  105358. CXLFLASH_VPD_LEN
  105359. CXLFLASH_WWID_LEN
  105360. CXLFLASH_WWPN_VPD_REQUIRED
  105361. CXL_ADAPTER_ATTRS
  105362. CXL_AFUID_FLAG_SLAVE
  105363. CXL_AFU_ATTRS
  105364. CXL_AFU_Cntl_An_E
  105365. CXL_AFU_Cntl_An_ES_Disabled
  105366. CXL_AFU_Cntl_An_ES_Enabled
  105367. CXL_AFU_Cntl_An_ES_MASK
  105368. CXL_AFU_Cntl_An_RA
  105369. CXL_AFU_Cntl_An_RS_Complete
  105370. CXL_AFU_Cntl_An_RS_MASK
  105371. CXL_AFU_Cntl_An_RS_Pending
  105372. CXL_AFU_MASTER_ATTRS
  105373. CXL_AFU_MINOR_D
  105374. CXL_AFU_MINOR_M
  105375. CXL_AFU_MINOR_S
  105376. CXL_AFU_MKDEV_D
  105377. CXL_AFU_MKDEV_M
  105378. CXL_AFU_MKDEV_S
  105379. CXL_AI_ALL
  105380. CXL_AI_BUFFER_SIZE
  105381. CXL_AI_HEADER_SIZE
  105382. CXL_AI_MAX_CHUNK_SIZE
  105383. CXL_AI_MAX_ENTRIES
  105384. CXL_AI_NEED_HEADER
  105385. CXL_API_VERSION
  105386. CXL_API_VERSION_COMPATIBLE
  105387. CXL_CAPI_WINDOW_LOG_SIZE
  105388. CXL_CAPI_WINDOW_START
  105389. CXL_CARD_MINOR
  105390. CXL_DEVT_ADAPTER
  105391. CXL_DEVT_AFU
  105392. CXL_DEVT_IS_CARD
  105393. CXL_DEV_MINORS
  105394. CXL_DUMMY_READ_ALIGN
  105395. CXL_DUMMY_READ_SIZE
  105396. CXL_ERROR_DETECTED_EVENT
  105397. CXL_EVENT_AFU_DRIVER
  105398. CXL_EVENT_AFU_ERROR
  105399. CXL_EVENT_AFU_INTERRUPT
  105400. CXL_EVENT_DATA_STORAGE
  105401. CXL_EVENT_RESERVED
  105402. CXL_H9_WAIT_UNTIL_DONE
  105403. CXL_HCALL_TIMEOUT
  105404. CXL_HCALL_TIMEOUT_DOWNLOAD
  105405. CXL_H_WAIT_UNTIL_DONE
  105406. CXL_INVALID_DRA
  105407. CXL_IOCTL_DOWNLOAD_IMAGE
  105408. CXL_IOCTL_GET_AFU_ID
  105409. CXL_IOCTL_GET_PROCESS_ELEMENT
  105410. CXL_IOCTL_START_WORK
  105411. CXL_IOCTL_VALIDATE_IMAGE
  105412. CXL_IOWR
  105413. CXL_IRQ_RANGES
  105414. CXL_MAGIC
  105415. CXL_MAX_PCIEX_PARENT
  105416. CXL_MAX_SLICES
  105417. CXL_MODE_CXL
  105418. CXL_MODE_DEDICATED
  105419. CXL_MODE_DIRECTED
  105420. CXL_MODE_DMA_TVT0
  105421. CXL_MODE_DMA_TVT1
  105422. CXL_MODE_NO_DMA
  105423. CXL_MODE_PCI
  105424. CXL_MODE_TIME_SLICED
  105425. CXL_NUM_MINORS
  105426. CXL_PCI_VSEC_ID
  105427. CXL_PE_64_BIT
  105428. CXL_PE_CSRP_VALID
  105429. CXL_PE_PRIVILEGED_PROCESS
  105430. CXL_PE_PROBLEM_STATE
  105431. CXL_PE_SECONDARY_SEGMENT_TBL_SRCH
  105432. CXL_PE_SOFTWARE_STATE_C
  105433. CXL_PE_SOFTWARE_STATE_S
  105434. CXL_PE_SOFTWARE_STATE_T
  105435. CXL_PE_SOFTWARE_STATE_V
  105436. CXL_PE_TAGS_ACTIVE
  105437. CXL_PE_TRANSLATION_ENABLED
  105438. CXL_PE_USER_STATE
  105439. CXL_PREFAULT_ALL
  105440. CXL_PREFAULT_NONE
  105441. CXL_PREFAULT_WED
  105442. CXL_PROCESS_ELEMENT_VERSION
  105443. CXL_PSEUDO_FS_MAGIC
  105444. CXL_PSL9_DSISR_An_AE
  105445. CXL_PSL9_DSISR_An_CO_MASK
  105446. CXL_PSL9_DSISR_An_OC
  105447. CXL_PSL9_DSISR_An_PE
  105448. CXL_PSL9_DSISR_An_PF_HRH
  105449. CXL_PSL9_DSISR_An_PF_RGC
  105450. CXL_PSL9_DSISR_An_PF_RGP
  105451. CXL_PSL9_DSISR_An_PF_SLR
  105452. CXL_PSL9_DSISR_An_PF_STEG
  105453. CXL_PSL9_DSISR_An_S
  105454. CXL_PSL9_DSISR_An_SF
  105455. CXL_PSL9_DSISR_An_TF
  105456. CXL_PSL9_DSISR_An_URTCH
  105457. CXL_PSL9_DSISR_PENDING
  105458. CXL_PSL9_TRACEID_MAX
  105459. CXL_PSL9_TRACESTATE_FIN
  105460. CXL_PSL_AFUSEL_A
  105461. CXL_PSL_Control_Fr
  105462. CXL_PSL_Control_Fs_Complete
  105463. CXL_PSL_Control_Fs_MASK
  105464. CXL_PSL_Control_tb
  105465. CXL_PSL_DEBUG_CDC
  105466. CXL_PSL_DLCNTL_C
  105467. CXL_PSL_DLCNTL_CE
  105468. CXL_PSL_DLCNTL_D
  105469. CXL_PSL_DLCNTL_DCES
  105470. CXL_PSL_DLCNTL_E
  105471. CXL_PSL_DLCNTL_S
  105472. CXL_PSL_DSISR_An_A
  105473. CXL_PSL_DSISR_An_AE
  105474. CXL_PSL_DSISR_An_DM
  105475. CXL_PSL_DSISR_An_DS
  105476. CXL_PSL_DSISR_An_K
  105477. CXL_PSL_DSISR_An_M
  105478. CXL_PSL_DSISR_An_OC
  105479. CXL_PSL_DSISR_An_P
  105480. CXL_PSL_DSISR_An_PE
  105481. CXL_PSL_DSISR_An_S
  105482. CXL_PSL_DSISR_An_ST
  105483. CXL_PSL_DSISR_An_UR
  105484. CXL_PSL_DSISR_PENDING
  105485. CXL_PSL_DSISR_TRANS
  105486. CXL_PSL_ErrIVTE_tberror
  105487. CXL_PSL_ID_An_F
  105488. CXL_PSL_ID_An_L
  105489. CXL_PSL_RXCTL_AFUHP_4S
  105490. CXL_PSL_SCNTL_An_CR
  105491. CXL_PSL_SCNTL_An_PM_AFU
  105492. CXL_PSL_SCNTL_An_PM_AFU_PBT
  105493. CXL_PSL_SCNTL_An_PM_MASK
  105494. CXL_PSL_SCNTL_An_PM_OS
  105495. CXL_PSL_SCNTL_An_PM_Process
  105496. CXL_PSL_SCNTL_An_PM_Shared
  105497. CXL_PSL_SCNTL_An_Pc
  105498. CXL_PSL_SCNTL_An_Ps_Complete
  105499. CXL_PSL_SCNTL_An_Ps_MASK
  105500. CXL_PSL_SCNTL_An_Ps_Pending
  105501. CXL_PSL_SCNTL_An_Sc
  105502. CXL_PSL_SCNTL_An_Ss_Complete
  105503. CXL_PSL_SCNTL_An_Ss_MASK
  105504. CXL_PSL_SCNTL_An_Ss_Pending
  105505. CXL_PSL_SERR_An_AE
  105506. CXL_PSL_SERR_An_IRQS
  105507. CXL_PSL_SERR_An_IRQ_MASKS
  105508. CXL_PSL_SERR_An_afudis
  105509. CXL_PSL_SERR_An_afudis_mask
  105510. CXL_PSL_SERR_An_afudup
  105511. CXL_PSL_SERR_An_afudup_mask
  105512. CXL_PSL_SERR_An_afuov
  105513. CXL_PSL_SERR_An_afuov_mask
  105514. CXL_PSL_SERR_An_afupar
  105515. CXL_PSL_SERR_An_afupar_mask
  105516. CXL_PSL_SERR_An_afuto
  105517. CXL_PSL_SERR_An_afuto_mask
  105518. CXL_PSL_SERR_An_badctx
  105519. CXL_PSL_SERR_An_badctx_mask
  105520. CXL_PSL_SERR_An_badsrc
  105521. CXL_PSL_SERR_An_badsrc_mask
  105522. CXL_PSL_SERR_An_llcmdis
  105523. CXL_PSL_SERR_An_llcmdis_mask
  105524. CXL_PSL_SERR_An_llcmdto
  105525. CXL_PSL_SERR_An_llcmdto_mask
  105526. CXL_PSL_SPAP_Addr
  105527. CXL_PSL_SPAP_Size
  105528. CXL_PSL_SPAP_Size_Shift
  105529. CXL_PSL_SPAP_V
  105530. CXL_PSL_SR_An_BOT
  105531. CXL_PSL_SR_An_HV
  105532. CXL_PSL_SR_An_ISL
  105533. CXL_PSL_SR_An_LE
  105534. CXL_PSL_SR_An_MP
  105535. CXL_PSL_SR_An_PR
  105536. CXL_PSL_SR_An_R
  105537. CXL_PSL_SR_An_SC
  105538. CXL_PSL_SR_An_SF
  105539. CXL_PSL_SR_An_TA
  105540. CXL_PSL_SR_An_TC
  105541. CXL_PSL_SR_An_US
  105542. CXL_PSL_SR_An_XLAT_hpt
  105543. CXL_PSL_SR_An_XLAT_roh
  105544. CXL_PSL_SR_An_XLAT_ror
  105545. CXL_PSL_TFC_An_A
  105546. CXL_PSL_TFC_An_AE
  105547. CXL_PSL_TFC_An_C
  105548. CXL_PSL_TFC_An_R
  105549. CXL_READ_MIN_SIZE
  105550. CXL_READ_VSEC_AFU_DESC_OFF
  105551. CXL_READ_VSEC_AFU_DESC_SIZE
  105552. CXL_READ_VSEC_BASE_IMAGE
  105553. CXL_READ_VSEC_CAIA_MAJOR
  105554. CXL_READ_VSEC_CAIA_MINOR
  105555. CXL_READ_VSEC_IMAGE_STATE
  105556. CXL_READ_VSEC_LENGTH
  105557. CXL_READ_VSEC_MODE_CONTROL
  105558. CXL_READ_VSEC_NAFUS
  105559. CXL_READ_VSEC_PSL_REVISION
  105560. CXL_READ_VSEC_PS_OFF
  105561. CXL_READ_VSEC_PS_SIZE
  105562. CXL_READ_VSEC_STATUS
  105563. CXL_REAL_MODE
  105564. CXL_RESUME_EVENT
  105565. CXL_SLBIE_C
  105566. CXL_SLBIE_MAX
  105567. CXL_SLBIE_PENDING
  105568. CXL_SLBIE_SS
  105569. CXL_SLBIE_SS_SHIFT
  105570. CXL_SLBIE_TA
  105571. CXL_SLOT_RESET_EVENT
  105572. CXL_SPA_SW_CMD_ADD
  105573. CXL_SPA_SW_CMD_MASK
  105574. CXL_SPA_SW_CMD_REMOVE
  105575. CXL_SPA_SW_CMD_RESUME
  105576. CXL_SPA_SW_CMD_SUSPEND
  105577. CXL_SPA_SW_CMD_TERMINATE
  105578. CXL_SPA_SW_CMD_UPDATE
  105579. CXL_SPA_SW_LINK_MASK
  105580. CXL_SPA_SW_PSL_ID_MASK
  105581. CXL_SPA_SW_STATE_ADDED
  105582. CXL_SPA_SW_STATE_MASK
  105583. CXL_SPA_SW_STATE_REMOVED
  105584. CXL_SPA_SW_STATE_RESUMED
  105585. CXL_SPA_SW_STATE_SUSPENDED
  105586. CXL_SPA_SW_STATE_TERMINATED
  105587. CXL_SPA_SW_STATE_UPDATED
  105588. CXL_SSTP0_An_B_SHIFT
  105589. CXL_SSTP0_An_C
  105590. CXL_SSTP0_An_KP
  105591. CXL_SSTP0_An_KS
  105592. CXL_SSTP0_An_L
  105593. CXL_SSTP0_An_LP_SHIFT
  105594. CXL_SSTP0_An_N
  105595. CXL_SSTP0_An_STVA_U_MASK
  105596. CXL_SSTP0_An_SegTableSize_MASK
  105597. CXL_SSTP0_An_SegTableSize_SHIFT
  105598. CXL_SSTP0_An_TA
  105599. CXL_SSTP1_An_STVA_L_MASK
  105600. CXL_SSTP1_An_V
  105601. CXL_START_WORK_ALL
  105602. CXL_START_WORK_AMR
  105603. CXL_START_WORK_ERR_FF
  105604. CXL_START_WORK_NUM_IRQS
  105605. CXL_START_WORK_TID
  105606. CXL_STATUS_FLASH_RO
  105607. CXL_STATUS_FLASH_RW
  105608. CXL_STATUS_LOADABLE_AFU
  105609. CXL_STATUS_LOADABLE_PSL
  105610. CXL_STATUS_MSI_X_FULL
  105611. CXL_STATUS_MSI_X_SINGLE
  105612. CXL_STATUS_SECOND_PORT
  105613. CXL_SUPPORTED_MODES
  105614. CXL_TIMEOUT
  105615. CXL_TLB_SLB_IQ_ALL
  105616. CXL_TLB_SLB_IQ_LPID
  105617. CXL_TLB_SLB_IQ_LPIDPID
  105618. CXL_TLB_SLB_P
  105619. CXL_TRANSLATED_MODE
  105620. CXL_UNSUPPORTED_FEATURES
  105621. CXL_VSEC_MIN_SIZE
  105622. CXL_VSEC_PERST_LOADS_IMAGE
  105623. CXL_VSEC_PERST_SELECT_USER
  105624. CXL_VSEC_PROTOCOL_1024TB
  105625. CXL_VSEC_PROTOCOL_256TB
  105626. CXL_VSEC_PROTOCOL_512TB
  105627. CXL_VSEC_PROTOCOL_ENABLE
  105628. CXL_VSEC_PROTOCOL_MASK
  105629. CXL_VSEC_USER_IMAGE_LOADED
  105630. CXL_WRITE_VSEC_IMAGE_STATE
  105631. CXL_WRITE_VSEC_MODE_CONTROL
  105632. CXL_XSL9_IERAT_IALL
  105633. CXL_XSL9_IERAT_IINPROG
  105634. CXL_XSL9_IERAT_INVR
  105635. CXL_XSL9_IERAT_MLPID
  105636. CXL_XSL9_IERAT_MPID
  105637. CXL_XSL9_IERAT_PRS
  105638. CXL_XSL_CONFIG_CURRENT_VERSION
  105639. CXL_XSL_CONFIG_VERSION1
  105640. CXN_CLOSED
  105641. CXN_INVALIDATE_INDEX_NOTIFY
  105642. CXN_INVALIDATE_NOTIFY
  105643. CXN_KILLED_AHS_RCVD
  105644. CXN_KILLED_BAD_UNSOL_PDU_RCVD
  105645. CXN_KILLED_BAD_WRB_INDEX_ERROR
  105646. CXN_KILLED_BURST_LEN_MISMATCH
  105647. CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN
  105648. CXN_KILLED_FIN_RCVD
  105649. CXN_KILLED_HDR_DIGEST_ERR
  105650. CXN_KILLED_IMM_DATA_RCVD
  105651. CXN_KILLED_INVALID_ITT_TTT_RCVD
  105652. CXN_KILLED_OVER_RUN_RESIDUAL
  105653. CXN_KILLED_PDU_SIZE_EXCEEDS_DSL
  105654. CXN_KILLED_RST_RCVD
  105655. CXN_KILLED_RST_SENT
  105656. CXN_KILLED_STALE_ITT_TTT_RCVD
  105657. CXN_KILLED_SYN_RCVD
  105658. CXN_KILLED_TIMED_OUT
  105659. CXN_KILLED_UNDER_RUN_RESIDUAL
  105660. CXN_KILLED_UNKNOWN_HDR
  105661. CXPOLL_POLLING
  105662. CXPOLL_SHUTDOWN
  105663. CXPOLL_STOPPED
  105664. CXPOLL_STOPPING
  105665. CXT_FIXUP_ASPIRE_DMIC
  105666. CXT_FIXUP_CAP_MIX_AMP
  105667. CXT_FIXUP_CAP_MIX_AMP_5047
  105668. CXT_FIXUP_GPIO1
  105669. CXT_FIXUP_HEADPHONE_MIC
  105670. CXT_FIXUP_HEADPHONE_MIC_PIN
  105671. CXT_FIXUP_HEADSET_MIC
  105672. CXT_FIXUP_HP_530
  105673. CXT_FIXUP_HP_DOCK
  105674. CXT_FIXUP_HP_GATE_MIC
  105675. CXT_FIXUP_HP_MIC_NO_PRESENCE
  105676. CXT_FIXUP_HP_SPECTRE
  105677. CXT_FIXUP_INC_MIC_BOOST
  105678. CXT_FIXUP_MUTE_LED_EAPD
  105679. CXT_FIXUP_MUTE_LED_GPIO
  105680. CXT_FIXUP_OLPC_XO
  105681. CXT_FIXUP_STEREO_DMIC
  105682. CXT_FIXUP_THINKPAD_ACPI
  105683. CXT_FIXUP_TOSHIBA_P105
  105684. CXT_PINCFG_COMPAQ_CQ60
  105685. CXT_PINCFG_LEMOTE_A1004
  105686. CXT_PINCFG_LEMOTE_A1205
  105687. CXT_PINCFG_LENOVO_TP410
  105688. CXT_PINCFG_LENOVO_X200
  105689. CXT_SIZE
  105690. CXUSB_BT656_FIELD_1
  105691. CXUSB_BT656_FIELD_2
  105692. CXUSB_BT656_FIELD_MASK
  105693. CXUSB_BT656_PREAMBLE
  105694. CXUSB_BT656_SEAV_EAV
  105695. CXUSB_BT656_SEAV_MASK
  105696. CXUSB_BT656_SEAV_SAV
  105697. CXUSB_BT656_VBI_MASK
  105698. CXUSB_BT656_VBI_OFF
  105699. CXUSB_BT656_VBI_ON
  105700. CXUSB_DBG_AUXB
  105701. CXUSB_DBG_BT656
  105702. CXUSB_DBG_I2C
  105703. CXUSB_DBG_MISC
  105704. CXUSB_DBG_OPS
  105705. CXUSB_DBG_RC
  105706. CXUSB_DBG_URB
  105707. CXUSB_INPUT_CNT
  105708. CXUSB_OPEN_ANALOG
  105709. CXUSB_OPEN_DIGITAL
  105710. CXUSB_OPEN_INIT
  105711. CXUSB_OPEN_NONE
  105712. CXUSB_VIDEO_MAX_FRAME_PKTS
  105713. CXUSB_VIDEO_MAX_FRAME_SIZE
  105714. CXUSB_VIDEO_PKT_SIZE
  105715. CXUSB_VIDEO_URBS
  105716. CXUSB_VIDEO_URB_MAX_SIZE
  105717. CXW_SOFT_RESET
  105718. CXX_COMMENT
  105719. CX_BASE_MASK
  105720. CX_BASE_SHIFT
  105721. CX_CFG
  105722. CX_CFG_DSTINCR
  105723. CX_CFG_EN
  105724. CX_CFG_MEM2PER
  105725. CX_CFG_NODEIRQ
  105726. CX_CFG_PER2MEM
  105727. CX_CFG_SRCINCR
  105728. CX_CHIP_ID
  105729. CX_CNT0
  105730. CX_CNT1
  105731. CX_CUR_CNT
  105732. CX_DST
  105733. CX_GMU_CBCR_SLEEP_MASK
  105734. CX_GMU_CBCR_SLEEP_SHIFT
  105735. CX_GMU_CBCR_WAKE_MASK
  105736. CX_GMU_CBCR_WAKE_SHIFT
  105737. CX_HYBRID_TV
  105738. CX_LLI
  105739. CX_LLI_CHAIN_EN
  105740. CX_PCI_ID
  105741. CX_SRC
  105742. CX_UNKNOWN_MASK
  105743. CX_UNKNOWN_SHIFT
  105744. CY
  105745. CY82_DATA_PORT
  105746. CY82_IDE_ADDRSETUP
  105747. CY82_IDE_CMDREG
  105748. CY82_IDE_MASTER_8BIT
  105749. CY82_IDE_MASTER_IOR
  105750. CY82_IDE_MASTER_IOW
  105751. CY82_IDE_SLAVE_8BIT
  105752. CY82_IDE_SLAVE_IOR
  105753. CY82_IDE_SLAVE_IOW
  105754. CY82_INDEX_CHANNEL0
  105755. CY82_INDEX_CHANNEL1
  105756. CY82_INDEX_CTRLREG1
  105757. CY82_INDEX_PORT
  105758. CY82_INDEX_TIMEOUT
  105759. CY8CTMG110_DRIVER_NAME
  105760. CY8CTMG110_FINGERS
  105761. CY8CTMG110_GESTURE
  105762. CY8CTMG110_REG_MAX
  105763. CY8CTMG110_TOUCH_SLEEP_TIME
  105764. CY8CTMG110_TOUCH_WAKEUP_TIME
  105765. CY8CTMG110_TOUCH_X1
  105766. CY8CTMG110_TOUCH_X2
  105767. CY8CTMG110_TOUCH_Y1
  105768. CY8CTMG110_TOUCH_Y2
  105769. CY8CTMG110_X_MAX
  105770. CY8CTMG110_X_MIN
  105771. CY8CTMG110_Y_MAX
  105772. CY8CTMG110_Y_MIN
  105773. CYACD_LINE_SIZE
  105774. CYAPA_ADAPTER_FUNC_BOTH
  105775. CYAPA_ADAPTER_FUNC_I2C
  105776. CYAPA_ADAPTER_FUNC_NONE
  105777. CYAPA_ADAPTER_FUNC_SMBUS
  105778. CYAPA_CMD_BLK_HEAD
  105779. CYAPA_CMD_BLK_PRODUCT_ID
  105780. CYAPA_CMD_BL_ALL
  105781. CYAPA_CMD_BL_CMD
  105782. CYAPA_CMD_BL_DATA
  105783. CYAPA_CMD_BL_HEAD
  105784. CYAPA_CMD_BL_STATUS
  105785. CYAPA_CMD_DEV_STATUS
  105786. CYAPA_CMD_GROUP_CMD
  105787. CYAPA_CMD_GROUP_DATA
  105788. CYAPA_CMD_GROUP_QUERY
  105789. CYAPA_CMD_LEN
  105790. CYAPA_CMD_MAX_BASELINE
  105791. CYAPA_CMD_MIN_BASELINE
  105792. CYAPA_CMD_POWER_MODE
  105793. CYAPA_CMD_SOFT_RESET
  105794. CYAPA_DEV_BUSY
  105795. CYAPA_DEV_NORMAL
  105796. CYAPA_FW_BLOCK_SIZE
  105797. CYAPA_FW_DATA_BLOCK_COUNT
  105798. CYAPA_FW_DATA_BLOCK_START
  105799. CYAPA_FW_DATA_SIZE
  105800. CYAPA_FW_DATA_START
  105801. CYAPA_FW_HDR_BLOCK_COUNT
  105802. CYAPA_FW_HDR_BLOCK_START
  105803. CYAPA_FW_HDR_SIZE
  105804. CYAPA_FW_HDR_START
  105805. CYAPA_FW_NAME
  105806. CYAPA_FW_READ_SIZE
  105807. CYAPA_FW_SIZE
  105808. CYAPA_GEN3
  105809. CYAPA_GEN5
  105810. CYAPA_GEN6
  105811. CYAPA_GEN_UNKNOWN
  105812. CYAPA_MAX_MT_SLOTS
  105813. CYAPA_NAME
  105814. CYAPA_OFFSET_SOFT_RESET
  105815. CYAPA_PM_ACTIVE
  105816. CYAPA_PM_DEACTIVE
  105817. CYAPA_PM_RESUME
  105818. CYAPA_PM_RUNTIME_RESUME
  105819. CYAPA_PM_RUNTIME_SUSPEND
  105820. CYAPA_PM_SUSPEND
  105821. CYAPA_REG_MAP_SIZE
  105822. CYAPA_SMBUS_BLK_HEAD
  105823. CYAPA_SMBUS_BLK_PRODUCT_ID
  105824. CYAPA_SMBUS_BL_ALL
  105825. CYAPA_SMBUS_BL_CMD
  105826. CYAPA_SMBUS_BL_DATA
  105827. CYAPA_SMBUS_BL_HEAD
  105828. CYAPA_SMBUS_BL_STATUS
  105829. CYAPA_SMBUS_DEV_STATUS
  105830. CYAPA_SMBUS_GROUP_CMD
  105831. CYAPA_SMBUS_GROUP_DATA
  105832. CYAPA_SMBUS_GROUP_QUERY
  105833. CYAPA_SMBUS_MAX_BASELINE
  105834. CYAPA_SMBUS_MIN_BASELINE
  105835. CYAPA_SMBUS_POWER_MODE
  105836. CYAPA_SMBUS_RESET
  105837. CYAPA_STATE_BL_ACTIVE
  105838. CYAPA_STATE_BL_BUSY
  105839. CYAPA_STATE_BL_IDLE
  105840. CYAPA_STATE_GEN5_APP
  105841. CYAPA_STATE_GEN5_BL
  105842. CYAPA_STATE_GEN6_APP
  105843. CYAPA_STATE_GEN6_BL
  105844. CYAPA_STATE_NO_DEVICE
  105845. CYAPA_STATE_OP
  105846. CYAPA_TP_I2C_ADDR
  105847. CYAPA_TSG_APP_INTEGRITY_SIZE
  105848. CYAPA_TSG_BL_KEY_SIZE
  105849. CYAPA_TSG_FLASH_MAP_BLOCK_SIZE
  105850. CYAPA_TSG_FLASH_MAP_METADATA_SIZE
  105851. CYAPA_TSG_FW_ROW_SIZE
  105852. CYAPA_TSG_IMG_APP_INTEGRITY_ROW_NUM
  105853. CYAPA_TSG_IMG_END_ROW_NUM
  105854. CYAPA_TSG_IMG_FW_HDR_SIZE
  105855. CYAPA_TSG_IMG_MAX_RECORDS
  105856. CYAPA_TSG_IMG_READ_SIZE
  105857. CYAPA_TSG_IMG_START_ROW_NUM
  105858. CYAPA_TSG_MAX_CMD_SIZE
  105859. CYAPA_TSG_START_OF_APPLICATION
  105860. CYBER9320
  105861. CYBER9382
  105862. CYBER9385
  105863. CYBER9388
  105864. CYBER9397
  105865. CYBER9397DVD
  105866. CYBER9520
  105867. CYBER9525DVD
  105868. CYBERBLADEAi1
  105869. CYBERBLADEAi1D
  105870. CYBERBLADEE4
  105871. CYBERBLADEXPAi1
  105872. CYBERBLADEXPm16
  105873. CYBERBLADEXPm8
  105874. CYBERBLADEi1
  105875. CYBERBLADEi1D
  105876. CYBERBLADEi7
  105877. CYBERBLADEi7D
  105878. CYBERJACK_LOCAL_BUF_SIZE
  105879. CYBERJACK_PRODUCT_ID
  105880. CYBERJACK_VENDOR_ID
  105881. CYBER_CORTEX_AV_PID
  105882. CYBER_DMA_HNDL_INTR
  105883. CYBER_DMA_WRITE
  105884. CYBER_DMA_Z3
  105885. CYC2NS_SCALE
  105886. CYC2NS_SCALE_FACTOR
  105887. CYCLADESAUX_MAJOR
  105888. CYCLADES_MAGIC
  105889. CYCLADES_MAJOR
  105890. CYCLECOUNTER_MASK
  105891. CYCLES_BETWEEN_PACKETS_0
  105892. CYCLES_BETWEEN_PACKETS_1
  105893. CYCLES_BETWEEN_PACKETS_2
  105894. CYCLES_BETWEEN_PACKETS_3
  105895. CYCLES_HELD_OFF_ID_0
  105896. CYCLES_HELD_OFF_ID_1
  105897. CYCLES_HELD_OFF_ID_10
  105898. CYCLES_HELD_OFF_ID_11
  105899. CYCLES_HELD_OFF_ID_12
  105900. CYCLES_HELD_OFF_ID_13
  105901. CYCLES_HELD_OFF_ID_14
  105902. CYCLES_HELD_OFF_ID_15
  105903. CYCLES_HELD_OFF_ID_2
  105904. CYCLES_HELD_OFF_ID_3
  105905. CYCLES_HELD_OFF_ID_4
  105906. CYCLES_HELD_OFF_ID_5
  105907. CYCLES_HELD_OFF_ID_6
  105908. CYCLES_HELD_OFF_ID_7
  105909. CYCLES_HELD_OFF_ID_8
  105910. CYCLES_HELD_OFF_ID_9
  105911. CYCLES_PER_SEC
  105912. CYCLES_PER_SECOND
  105913. CYCLE_CNT
  105914. CYCLE_CNT_D1
  105915. CYCLE_COUNTER_MSK
  105916. CYCLE_DELAY
  105917. CYCLE_DV_TIMINGS
  105918. CYCLE_LEN
  105919. CYCLE_LSN
  105920. CYCLE_LSN_DISK
  105921. CYCLE_STD
  105922. CYCLE_TIMER
  105923. CYCLONE5
  105924. CYCLONE_CBAR_ADDR
  105925. CYCLONE_MPCS_OFFSET
  105926. CYCLONE_MPMC_OFFSET
  105927. CYCLONE_PMCC_OFFSET
  105928. CYCLONE_TIMER_FREQ
  105929. CYCX_16X
  105930. CYCX_2X
  105931. CYCX_8X
  105932. CYC_OVF
  105933. CYGETCD1400VER
  105934. CYGETDEFTHRESH
  105935. CYGETDEFTIMEOUT
  105936. CYGETMON
  105937. CYGETRFLOW
  105938. CYGETRTSDTR_INV
  105939. CYGETTHRESH
  105940. CYGETTIMEOUT
  105941. CYGETWAIT
  105942. CYGNUS_AUIDO_MAX_NUM_CLKS
  105943. CYGNUS_MAX_CAPTURE_PORTS
  105944. CYGNUS_MAX_I2S_PORTS
  105945. CYGNUS_MAX_PLAYBACK_PORTS
  105946. CYGNUS_MAX_PORTS
  105947. CYGNUS_NUM_IOMUX
  105948. CYGNUS_NUM_IOMUX_REGS
  105949. CYGNUS_NUM_MUX_PER_REG
  105950. CYGNUS_PHY_PCIE0
  105951. CYGNUS_PHY_PCIE1
  105952. CYGNUS_PIN_DESC
  105953. CYGNUS_PIN_FUNCTION
  105954. CYGNUS_PIN_GROUP
  105955. CYGNUS_PLLCLKSEL_MASK
  105956. CYGNUS_RATE_MAX
  105957. CYGNUS_RATE_MIN
  105958. CYGNUS_SSPMODE_I2S
  105959. CYGNUS_SSPMODE_TDM
  105960. CYGNUS_SSPMODE_UNKNOWN
  105961. CYGNUS_SSP_CLKSRC_PLL
  105962. CYGNUS_SSP_FRAMEBITS_DIV
  105963. CYGNUS_SSP_TRISTATE_MASK
  105964. CYGNUS_TDM_DAI_MAX_SLOTS
  105965. CYPRESS_AN2135
  105966. CYPRESS_AN2235
  105967. CYPRESS_BUF_SIZE
  105968. CYPRESS_DW2101
  105969. CYPRESS_DW2102
  105970. CYPRESS_DW2104
  105971. CYPRESS_DW3101
  105972. CYPRESS_FIRMWARE_H
  105973. CYPRESS_FX2
  105974. CYPRESS_GB_ADDR_CONFIG_GOLDEN
  105975. CYPRESS_GET_CONFIG
  105976. CYPRESS_HASI_DFLT
  105977. CYPRESS_M8_H
  105978. CYPRESS_MAX_REQSIZE
  105979. CYPRESS_MGCGCGTSSMCTRL_DFLT
  105980. CYPRESS_MGCGTTLOCAL0_DFLT
  105981. CYPRESS_MGCGTTLOCAL1_DFLT
  105982. CYPRESS_MGCGTTLOCAL2_DFLT
  105983. CYPRESS_MGCGTTLOCAL3_DFLT
  105984. CYPRESS_PRODUCT_ID
  105985. CYPRESS_READ_PORT
  105986. CYPRESS_READ_PORT_ID0
  105987. CYPRESS_READ_PORT_ID1
  105988. CYPRESS_READ_RAM
  105989. CYPRESS_READ_ROM
  105990. CYPRESS_SET_CONFIG
  105991. CYPRESS_SMC_INT_VECTOR_SIZE
  105992. CYPRESS_SMC_INT_VECTOR_START
  105993. CYPRESS_SMC_UCODE_SIZE
  105994. CYPRESS_SMC_UCODE_START
  105995. CYPRESS_T4
  105996. CYPRESS_USB_DEVICE
  105997. CYPRESS_VENDOR_ID
  105998. CYPRESS_VID
  105999. CYPRESS_VRC_DFLT
  106000. CYPRESS_WICED_BT_USB_PID
  106001. CYPRESS_WICED_WL_USB_PID
  106002. CYPRESS_WRITE_PORT
  106003. CYPRESS_WRITE_PORT_ID0
  106004. CYPRESS_WRITE_PORT_ID1
  106005. CYPRESS_WRITE_RAM
  106006. CYP_ERROR
  106007. CYSETDEFTHRESH
  106008. CYSETDEFTIMEOUT
  106009. CYSETRFLOW
  106010. CYSETRTSDTR_INV
  106011. CYSETTHRESH
  106012. CYSETTIMEOUT
  106013. CYSETWAIT
  106014. CYTP_105001_HIGH
  106015. CYTP_105001_WIDTH
  106016. CYTP_ABS_MAX_X
  106017. CYTP_ABS_MAX_Y
  106018. CYTP_BIT_ABS_MASK
  106019. CYTP_BIT_ABS_NO_PRESSURE
  106020. CYTP_BIT_ABS_PRESSURE
  106021. CYTP_BIT_ABS_REL_MASK
  106022. CYTP_BIT_CYPRESS_REL
  106023. CYTP_BIT_HIGH_RATE
  106024. CYTP_BIT_REL_MASK
  106025. CYTP_BIT_REPORT_MODE
  106026. CYTP_BIT_STANDARD_REL
  106027. CYTP_CMD_ABS_NO_PRESSURE_MODE
  106028. CYTP_CMD_ABS_WITH_PRESSURE_MODE
  106029. CYTP_CMD_CYPRESS_REL_MODE
  106030. CYTP_CMD_MOUSE_SENSITIVITY_MASK
  106031. CYTP_CMD_PALM_GEMMETRY_MASK
  106032. CYTP_CMD_PALM_SENSITIVITY_MASK
  106033. CYTP_CMD_READ_CYPRESS_ID
  106034. CYTP_CMD_READ_TP_METRICS
  106035. CYTP_CMD_REQUEST_BASELINE_STATUS
  106036. CYTP_CMD_REQUEST_RECALIBRATION
  106037. CYTP_CMD_SET_HSCROLL_MASK
  106038. CYTP_CMD_SET_HSCROLL_WIDTH
  106039. CYTP_CMD_SET_MOUSE_SENSITIVITY
  106040. CYTP_CMD_SET_PALM_GEOMETRY
  106041. CYTP_CMD_SET_PALM_SENSITIVITY
  106042. CYTP_CMD_SET_VSCROLL_MASK
  106043. CYTP_CMD_SET_VSCROLL_WIDTH
  106044. CYTP_CMD_SMBUS_MODE
  106045. CYTP_CMD_STANDARD_MODE
  106046. CYTP_CMD_TIMEOUT
  106047. CYTP_DATA_TIMEOUT
  106048. CYTP_DEBUG_VERBOSE
  106049. CYTP_DEFAULT_HIGH
  106050. CYTP_DEFAULT_WIDTH
  106051. CYTP_EXT_CMD
  106052. CYTP_MAX_MT_SLOTS
  106053. CYTP_MAX_PRESSURE
  106054. CYTP_MIN_PRESSURE
  106055. CYTP_PS2_CMD_DELAY
  106056. CYTP_PS2_CMD_TRIES
  106057. CYTP_PS2_ERROR
  106058. CYTP_PS2_RETRY
  106059. CYTP_RESP_ERROR
  106060. CYTP_RESP_RETRY
  106061. CYTTSP4_I2C_DATA_SIZE
  106062. CYTTSP4_I2C_NAME
  106063. CYTTSP4_MT_NAME
  106064. CYTTSP4_SPI_NAME
  106065. CYZGETPOLLCYCLE
  106066. CYZSETPOLLCYCLE
  106067. CYZ_BOOT_CTRL
  106068. CYZ_BOOT_NWORDS
  106069. CYZ_FIFO_SIZE
  106070. CYZ_MAX_SPEED
  106071. CY_16Y_HACK
  106072. CY_43012_F2_WATERMARK
  106073. CY_4373_F2_WATERMARK
  106074. CY_ABS_ID_OST
  106075. CY_ABS_MAJ_OST
  106076. CY_ABS_MIN_OST
  106077. CY_ABS_OR_OST
  106078. CY_ABS_P_OST
  106079. CY_ABS_W_OST
  106080. CY_ABS_X_OST
  106081. CY_ABS_Y_OST
  106082. CY_ACTIVE_STATE
  106083. CY_ACT_DIST_DFLT
  106084. CY_ACT_DIST_MASK
  106085. CY_ACT_INTRVL_DFLT
  106086. CY_BL_CHKSUM_OK
  106087. CY_BL_STATE
  106088. CY_BOFS_MASK
  106089. CY_BOFS_SHIFT
  106090. CY_BTN_NUM_STATE
  106091. CY_BTN_PRESSED
  106092. CY_BTN_RELEASED
  106093. CY_BYTE_OFS_MASK
  106094. CY_CC_43012_CHIP_ID
  106095. CY_CC_4373_CHIP_ID
  106096. CY_CLOSING_WAIT_INF
  106097. CY_CLOSING_WAIT_NONE
  106098. CY_CMD_COMPLETE
  106099. CY_CORE_MODE_CHANGE_TIMEOUT
  106100. CY_CORE_REQUEST_EXCLUSIVE_TIMEOUT
  106101. CY_CORE_RESET_AND_WAIT_TIMEOUT
  106102. CY_CORE_SLEEP_REQUEST_EXCLUSIVE_TIMEOUT
  106103. CY_CORE_STARTUP_RETRY_COUNT
  106104. CY_CORE_WAKEUP_TIMEOUT
  106105. CY_DEBUG_COUNT
  106106. CY_DEBUG_DTR
  106107. CY_DEBUG_INTERRUPTS
  106108. CY_DEBUG_IO
  106109. CY_DEBUG_OPEN
  106110. CY_DEBUG_OTHER
  106111. CY_DEBUG_THROTTLE
  106112. CY_DEEP_SLEEP_MODE
  106113. CY_DELAY_DFLT
  106114. CY_DELAY_MAX
  106115. CY_ENABLE_MONITORING
  106116. CY_EV_LIFTOFF
  106117. CY_EV_MOVE
  106118. CY_EV_NO_EVENT
  106119. CY_EV_TOUCHDOWN
  106120. CY_FLAG_FLIP
  106121. CY_FLAG_HOVER
  106122. CY_FLAG_INV_X
  106123. CY_FLAG_INV_Y
  106124. CY_FLAG_NONE
  106125. CY_FLAG_VKEYS
  106126. CY_FLAT_OST
  106127. CY_FUZZ_OST
  106128. CY_HCD_BUF_ADDR
  106129. CY_HNDSHK_BIT
  106130. CY_HST_CAT
  106131. CY_HST_LOWPOW
  106132. CY_HST_MODE
  106133. CY_HST_MODE_CHANGE
  106134. CY_HST_OPERATE
  106135. CY_HST_RESET
  106136. CY_HST_SLEEP
  106137. CY_HST_SYSINFO
  106138. CY_HST_TOGGLE
  106139. CY_I2C_DATA_SIZE
  106140. CY_I2C_NAME
  106141. CY_IC_GRPNUM_BTN_KEYS
  106142. CY_IC_GRPNUM_CMD_REGS
  106143. CY_IC_GRPNUM_DATA_REC
  106144. CY_IC_GRPNUM_DDATA_REC
  106145. CY_IC_GRPNUM_MDATA_REC
  106146. CY_IC_GRPNUM_NUM
  106147. CY_IC_GRPNUM_OPCFG_REC
  106148. CY_IC_GRPNUM_PCFG_REC
  106149. CY_IC_GRPNUM_RESERVED
  106150. CY_IC_GRPNUM_RESERVED1
  106151. CY_IC_GRPNUM_RESERVED2
  106152. CY_IC_GRPNUM_TCH_PARM_SIZE
  106153. CY_IC_GRPNUM_TCH_PARM_VAL
  106154. CY_IC_GRPNUM_TCH_REP
  106155. CY_IC_GRPNUM_TEST_REC
  106156. CY_IC_GRPNUM_TEST_REGS
  106157. CY_IC_GRPNUM_TTHE_REGS
  106158. CY_IDLE_STATE
  106159. CY_IGNORE_VALUE
  106160. CY_INT_AWAKE
  106161. CY_INT_EXEC_CMD
  106162. CY_INT_IGNORE
  106163. CY_INT_MODE_CHANGE
  106164. CY_INT_NONE
  106165. CY_INVERT_ORIGIN
  106166. CY_LOW_POWER_MODE
  106167. CY_LP_INTRVL_DFLT
  106168. CY_MAXZ
  106169. CY_MAX_FINGER
  106170. CY_MAX_ID
  106171. CY_MAX_OST
  106172. CY_MAX_PRBUF_SIZE
  106173. CY_MAX_PRINT_SIZE
  106174. CY_MIN_OST
  106175. CY_MODE_BOOTLOADER
  106176. CY_MODE_CAT
  106177. CY_MODE_CHANGED
  106178. CY_MODE_CHANGE_MODE
  106179. CY_MODE_CMD_COMPLETE
  106180. CY_MODE_LOADER
  106181. CY_MODE_OPERATIONAL
  106182. CY_MODE_STARTUP
  106183. CY_MODE_SYSINFO
  106184. CY_MODE_UNKNOWN
  106185. CY_NORMAL_ORIGIN
  106186. CY_NUM_ABS_OST
  106187. CY_NUM_ABS_SET
  106188. CY_NUM_BL_KEYS
  106189. CY_NUM_BTN_PER_REG
  106190. CY_NUM_EXT_TCH_FIELDS
  106191. CY_NUM_RETRY
  106192. CY_NUM_REVCTRL
  106193. CY_NUM_TCH_FIELDS
  106194. CY_OBJ_HOVER
  106195. CY_OBJ_LARGE_OBJECT
  106196. CY_OBJ_STANDARD_FINGER
  106197. CY_OBJ_STYLUS
  106198. CY_OPERATE_MODE
  106199. CY_PCFG_ORIGIN_X_MASK
  106200. CY_PCFG_ORIGIN_Y_MASK
  106201. CY_PCFG_RESOLUTION_X_MASK
  106202. CY_PCFG_RESOLUTION_Y_MASK
  106203. CY_PCI_DEBUG
  106204. CY_POST_CODEL_CFG_DATA_CRC_FAIL
  106205. CY_POST_CODEL_PANEL_TEST_FAIL
  106206. CY_POST_CODEL_WDG_RST
  106207. CY_PR_TRUNCATED
  106208. CY_REG_ACT_DIST
  106209. CY_REG_ACT_INTRVL
  106210. CY_REG_BASE
  106211. CY_REG_LP_INTRVL
  106212. CY_REG_TCH_TMOUT
  106213. CY_SIGNAL_OST
  106214. CY_SOFT_RESET_MODE
  106215. CY_SPI_A8_BIT
  106216. CY_SPI_BITS_PER_WORD
  106217. CY_SPI_CMD_BYTES
  106218. CY_SPI_DATA_BUF_SIZE
  106219. CY_SPI_DATA_SIZE
  106220. CY_SPI_NAME
  106221. CY_SPI_RD_HEADER_BYTES
  106222. CY_SPI_RD_OP
  106223. CY_SPI_SYNC_ACK
  106224. CY_SPI_SYNC_ACK1
  106225. CY_SPI_SYNC_ACK2
  106226. CY_SPI_SYNC_BYTE
  106227. CY_SPI_WR_HEADER_BYTES
  106228. CY_SPI_WR_OP
  106229. CY_SYSINFO_MODE
  106230. CY_TCH_E
  106231. CY_TCH_MAJ
  106232. CY_TCH_MIN
  106233. CY_TCH_NUM_ABS
  106234. CY_TCH_O
  106235. CY_TCH_OR
  106236. CY_TCH_P
  106237. CY_TCH_T
  106238. CY_TCH_TMOUT_DFLT
  106239. CY_TCH_W
  106240. CY_TCH_X
  106241. CY_TCH_Y
  106242. CY_TD_SIZE
  106243. CY_TMA1036_MAX_TCH
  106244. CY_TMA1036_TCH_REC_SIZE
  106245. CY_TMA4XX_MAX_TCH
  106246. CY_TMA4XX_TCH_REC_SIZE
  106247. CY_TOUCH_SETTINGS_MAX
  106248. CY_UDC_BIOS_REPLACE_BASE
  106249. CY_UDC_DESC_BASE_ADDRESS
  106250. CY_UDC_REQ_BUFFER_ADDR
  106251. CY_UDC_REQ_BUFFER_BASE
  106252. CY_UDC_REQ_BUFFER_SIZE
  106253. CY_UDC_REQ_HEADER_ADDR
  106254. CY_UDC_REQ_HEADER_BASE
  106255. CY_UDC_REQ_HEADER_SIZE
  106256. CY_USB_4373_DEVICE_ID
  106257. CY_USB_VENDOR_ID_CYPRESS
  106258. CY_VERSION
  106259. CY_WATCHDOG_TIMEOUT
  106260. CZCLK_CDCLK_FREQ_RATIO
  106261. CZCLK_FREQ_MASK
  106262. CZIOC
  106263. CZ_BOOT_DATA
  106264. CZ_BOOT_END
  106265. CZ_BOOT_START
  106266. CZ_CARRIZO_A0
  106267. CZ_DEF_POLL
  106268. CZ_NBOARDS
  106269. CZ_PLAT_CLK
  106270. CZ_PP_SMC_H
  106271. CZ_REV_BRISTOL
  106272. CZ_TEST
  106273. CZ_UNKNOWN
  106274. C_
  106275. C_00000000
  106276. C_00000001
  106277. C_00000002
  106278. C_00000003
  106279. C_00000004
  106280. C_00000008
  106281. C_00000010
  106282. C_00000020
  106283. C_000000_MC_IDLE
  106284. C_00000100
  106285. C_000001_MC_FB_START
  106286. C_000001_MC_FB_TOP
  106287. C_000002_MC_AGP_START
  106288. C_000002_MC_AGP_TOP
  106289. C_000003_AGP_BASE_ADDR
  106290. C_000004_AGP_BASE_ADDR_2
  106291. C_000004_MC_FB_START
  106292. C_000004_MC_FB_TOP
  106293. C_000005_MC_AGP_START
  106294. C_000005_MC_AGP_TOP
  106295. C_000006_AGP_BASE_ADDR
  106296. C_000007_AGP_BASE_ADDR_2
  106297. C_000009_ENABLE_PAGE_TABLES
  106298. C_00000D_CP_MAX_DYN_STOP_LAT
  106299. C_00000D_E2_MAX_DYN_STOP_LAT
  106300. C_00000D_FORCE_CP
  106301. C_00000D_FORCE_DISP
  106302. C_00000D_FORCE_DISP1
  106303. C_00000D_FORCE_DISP2
  106304. C_00000D_FORCE_E2
  106305. C_00000D_FORCE_HDP
  106306. C_00000D_FORCE_IDCT
  106307. C_00000D_FORCE_OV0
  106308. C_00000D_FORCE_PB
  106309. C_00000D_FORCE_PX
  106310. C_00000D_FORCE_RB
  106311. C_00000D_FORCE_RE
  106312. C_00000D_FORCE_SE
  106313. C_00000D_FORCE_SR
  106314. C_00000D_FORCE_SU
  106315. C_00000D_FORCE_SUBPIC
  106316. C_00000D_FORCE_TAM
  106317. C_00000D_FORCE_TDM
  106318. C_00000D_FORCE_TOP
  106319. C_00000D_FORCE_TV_SCLK
  106320. C_00000D_FORCE_TX
  106321. C_00000D_FORCE_US
  106322. C_00000D_FORCE_VAP
  106323. C_00000D_FORCE_VIP
  106324. C_00000D_HDP_MAX_DYN_STOP_LAT
  106325. C_00000D_IDCT_MAX_DYN_STOP_LAT
  106326. C_00000D_PB_MAX_DYN_STOP_LAT
  106327. C_00000D_RB_MAX_DYN_STOP_LAT
  106328. C_00000D_RE_MAX_DYN_STOP_LAT
  106329. C_00000D_SCLK_SRC_SEL
  106330. C_00000D_SE_MAX_DYN_STOP_LAT
  106331. C_00000D_TAM_MAX_DYN_STOP_LAT
  106332. C_00000D_TCLK_SRC_SEL
  106333. C_00000D_TDM_MAX_DYN_STOP_LAT
  106334. C_00000D_TV_MAX_DYN_STOP_LAT
  106335. C_00000D_VIP_MAX_DYN_STOP_LAT
  106336. C_00000F_CP_CLOCK_STATUS
  106337. C_00000F_CP_FORCEON
  106338. C_00000F_CP_LOWER_POWER_IDLE
  106339. C_00000F_CP_LOWER_POWER_IGNORE
  106340. C_00000F_CP_MAX_DYN_STOP_LAT
  106341. C_00000F_CP_NORMAL_POWER_BUSY
  106342. C_00000F_CP_NORMAL_POWER_IGNORE
  106343. C_00000F_CP_PROG_DELAY_VALUE
  106344. C_00000F_CP_PROG_SHUTOFF
  106345. C_00000F_SPARE
  106346. C_000011_E2_CLOCK_STATUS
  106347. C_000011_E2_FORCEON
  106348. C_000011_E2_LOWER_POWER_IDLE
  106349. C_000011_E2_LOWER_POWER_IGNORE
  106350. C_000011_E2_MAX_DYN_STOP_LAT
  106351. C_000011_E2_NORMAL_POWER_BUSY
  106352. C_000011_E2_NORMAL_POWER_IGNORE
  106353. C_000011_E2_PROG_DELAY_VALUE
  106354. C_000011_E2_PROG_SHUTOFF
  106355. C_000011_SPARE
  106356. C_000013_IDCT_CLOCK_STATUS
  106357. C_000013_IDCT_FORCEON
  106358. C_000013_IDCT_LOWER_POWER_IDLE
  106359. C_000013_IDCT_LOWER_POWER_IGNORE
  106360. C_000013_IDCT_MAX_DYN_STOP_LAT
  106361. C_000013_IDCT_NORMAL_POWER_BUSY
  106362. C_000013_IDCT_NORMAL_POWER_IGNORE
  106363. C_000013_IDCT_PROG_DELAY_VALUE
  106364. C_000013_IDCT_PROG_SHUTOFF
  106365. C_000013_SPARE
  106366. C_000030_BIOS_DIS_ROM
  106367. C_000030_BIOS_ROM_WRT_EN
  106368. C_000030_BM_DAC_CRIPPLE
  106369. C_000030_BUS_AGP_AD_STEPPING_EN
  106370. C_000030_BUS_DBL_RESYNC
  106371. C_000030_BUS_FLUSH_BUF
  106372. C_000030_BUS_MASTER_DIS
  106373. C_000030_BUS_MSTR_DISCONNECT_EN
  106374. C_000030_BUS_MSTR_RD_LINE
  106375. C_000030_BUS_MSTR_RD_MULT
  106376. C_000030_BUS_MSTR_RESET
  106377. C_000030_BUS_MSTR_WS
  106378. C_000030_BUS_NON_PM4_READ_COMBINE_EN
  106379. C_000030_BUS_PARKING_DIS
  106380. C_000030_BUS_PCI_READ_RETRY_EN
  106381. C_000030_BUS_PCI_WRT_RETRY_EN
  106382. C_000030_BUS_PM4_READ_COMBINE_EN
  106383. C_000030_BUS_RDY_READ_DLY
  106384. C_000030_BUS_RD_DISCARD_EN
  106385. C_000030_BUS_READ_BURST
  106386. C_000030_BUS_RETRY_WS
  106387. C_000030_BUS_SGL_READ_DISABLE
  106388. C_000030_BUS_STOP_REQ_DIS
  106389. C_000030_BUS_SUSPEND
  106390. C_000030_BUS_WRT_COMBINE_EN
  106391. C_000030_BUS_XFERD_DISCARD_EN
  106392. C_000030_ENFRCWRDY
  106393. C_000030_LAT_16X
  106394. C_000030_SERR_EN
  106395. C_000040_CRTC2_VBLANK
  106396. C_000040_CRTC2_VLINE
  106397. C_000040_CRTC2_VSYNC
  106398. C_000040_CRTC_VBLANK
  106399. C_000040_CRTC_VLINE
  106400. C_000040_CRTC_VSYNC
  106401. C_000040_DMA_VIPH0_INT_EN
  106402. C_000040_DMA_VIPH1_INT_EN
  106403. C_000040_DMA_VIPH2_INT_EN
  106404. C_000040_DMA_VIPH3_INT_EN
  106405. C_000040_DVI_I2C_INT
  106406. C_000040_FP2_DETECT
  106407. C_000040_FP_DETECT
  106408. C_000040_GEYSERVILLE
  106409. C_000040_GUIDMA
  106410. C_000040_GUI_IDLE
  106411. C_000040_GUI_IDLE_MASK
  106412. C_000040_HDCP_AUTHORIZED_INT
  106413. C_000040_I2C_INT_EN
  106414. C_000040_SCRATCH_INT_MASK
  106415. C_000040_SNAPSHOT
  106416. C_000040_SNAPSHOT2
  106417. C_000040_SW_INT_EN
  106418. C_000040_VIDDMA
  106419. C_000040_VIPH_INT_EN
  106420. C_000040_VSYNC_DIFF_OVER_LIMIT
  106421. C_000044_ATI_OVERDRIVE_INT_STAT
  106422. C_000044_CAP0_INT_ACTIVE
  106423. C_000044_CB_CONTEXT_SWITCH_STAT
  106424. C_000044_CRTC2_VBLANK_STAT
  106425. C_000044_CRTC2_VBLANK_STAT_AK
  106426. C_000044_CRTC2_VLINE_STAT
  106427. C_000044_CRTC2_VLINE_STAT_AK
  106428. C_000044_CRTC2_VSYNC_STAT
  106429. C_000044_CRTC2_VSYNC_STAT_AK
  106430. C_000044_CRTC_VBLANK_STAT
  106431. C_000044_CRTC_VBLANK_STAT_AK
  106432. C_000044_CRTC_VLINE_STAT
  106433. C_000044_CRTC_VLINE_STAT_AK
  106434. C_000044_CRTC_VSYNC_STAT
  106435. C_000044_CRTC_VSYNC_STAT_AK
  106436. C_000044_DISPLAY_INT_STAT
  106437. C_000044_DMA_VIPH0_INT
  106438. C_000044_DMA_VIPH0_INT_AK
  106439. C_000044_DMA_VIPH1_INT
  106440. C_000044_DMA_VIPH1_INT_AK
  106441. C_000044_DMA_VIPH2_INT
  106442. C_000044_DMA_VIPH2_INT_AK
  106443. C_000044_DMA_VIPH3_INT
  106444. C_000044_DMA_VIPH3_INT_AK
  106445. C_000044_DVI_I2C_INT_AK
  106446. C_000044_DVI_I2C_INT_STAT
  106447. C_000044_FP2_DETECT_STAT
  106448. C_000044_FP2_DETECT_STAT_AK
  106449. C_000044_FP_DETECT_STAT
  106450. C_000044_FP_DETECT_STAT_AK
  106451. C_000044_GEYSERVILLE_STAT
  106452. C_000044_GEYSERVILLE_STAT_AK
  106453. C_000044_GUIDMA_AK
  106454. C_000044_GUIDMA_STAT
  106455. C_000044_GUI_IDLE_STAT
  106456. C_000044_GUI_IDLE_STAT_AK
  106457. C_000044_HDCP_AUTHORIZED_INT_AK
  106458. C_000044_HDCP_AUTHORIZED_INT_STAT
  106459. C_000044_I2C_INT
  106460. C_000044_I2C_INT_AK
  106461. C_000044_IDCT_INT_STAT
  106462. C_000044_MC_PROBE_FAULT_STAT
  106463. C_000044_MC_PROTECTION_FAULT_STAT
  106464. C_000044_RBBM_READ_INT_STAT
  106465. C_000044_SCRATCH_INT_STAT
  106466. C_000044_SNAPSHOT2_STAT
  106467. C_000044_SNAPSHOT2_STAT_AK
  106468. C_000044_SNAPSHOT_STAT
  106469. C_000044_SNAPSHOT_STAT_AK
  106470. C_000044_SW_INT
  106471. C_000044_SW_INT_AK
  106472. C_000044_SW_INT_SET
  106473. C_000044_VGA_INT_STAT
  106474. C_000044_VIDDMA_AK
  106475. C_000044_VIDDMA_STAT
  106476. C_000044_VIPH_INT
  106477. C_000044_VSYNC_DIFF_OVER_LIMIT_STAT
  106478. C_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK
  106479. C_00004C_BUS_MASTER_DIS
  106480. C_00004C_BUS_MSI_REARM
  106481. C_000050_CRTC_CUR_EN
  106482. C_000050_CRTC_CUR_MODE
  106483. C_000050_CRTC_C_SYNC_EN
  106484. C_000050_CRTC_DBL_SCAN_EN
  106485. C_000050_CRTC_DISP_REQ_EN_B
  106486. C_000050_CRTC_EN
  106487. C_000050_CRTC_EXT_DISP_EN
  106488. C_000050_CRTC_ICON_EN
  106489. C_000050_CRTC_INTERLACE_EN
  106490. C_000050_CRTC_PIX_WIDTH
  106491. C_000050_CRTC_VSTAT_MODE
  106492. C_000054_CRTC_DISPLAY_DIS
  106493. C_000054_CRTC_HSYNC_DIS
  106494. C_000054_CRTC_HSYNC_TRISTATE
  106495. C_000054_CRTC_SYNC_TRISTATE
  106496. C_000054_CRTC_VGA_XOVERSCAN
  106497. C_000054_CRTC_VSYNC_DIS
  106498. C_000054_CRTC_VSYNC_TRISTATE
  106499. C_000054_CRT_ON
  106500. C_000054_VCRTC_IDX_MASTER
  106501. C_000054_VGA_128KAP_PAGING
  106502. C_000054_VGA_ATI_LINEAR
  106503. C_000054_VGA_BLINK_RATE
  106504. C_000054_VGA_CUR_B_TEST
  106505. C_000054_VGA_MEM_PS_EN
  106506. C_000054_VGA_PACK_DIS
  106507. C_000054_VGA_TEXT_132
  106508. C_000054_VGA_XCRT_CNT_EN
  106509. C_000070_MC_IND_ADDR
  106510. C_000070_MC_IND_AIC_RBS
  106511. C_000070_MC_IND_CITF_ARB0
  106512. C_000070_MC_IND_CITF_ARB1
  106513. C_000070_MC_IND_RD_INV
  106514. C_000070_MC_IND_SEQ_RBS_0
  106515. C_000070_MC_IND_SEQ_RBS_1
  106516. C_000070_MC_IND_SEQ_RBS_2
  106517. C_000070_MC_IND_SEQ_RBS_3
  106518. C_000070_MC_IND_WR_EN
  106519. C_000074_MC_IND_DATA
  106520. C_000078_MC_IND_ADDR
  106521. C_000078_MC_IND_WR_EN
  106522. C_00007C_MC_DATA
  106523. C_000090_MCA_ARB_IDLE
  106524. C_000090_MCA_IDLE
  106525. C_000090_MCA_INIT_EXECUTED
  106526. C_000090_MCA_SEQ_IDLE
  106527. C_000090_MC_ARBITER_IDLE
  106528. C_000090_MC_SELECT_PM
  106529. C_000090_MC_SEQUENCER_IDLE
  106530. C_000090_MC_SYSTEM_IDLE
  106531. C_000090_RESERVED12
  106532. C_000090_RESERVED20
  106533. C_000090_RESERVED4
  106534. C_000090_RESERVED8
  106535. C_0000F0_SOFT_RESET_AIC
  106536. C_0000F0_SOFT_RESET_CG
  106537. C_0000F0_SOFT_RESET_CP
  106538. C_0000F0_SOFT_RESET_DISP
  106539. C_0000F0_SOFT_RESET_E2
  106540. C_0000F0_SOFT_RESET_GA
  106541. C_0000F0_SOFT_RESET_HDP
  106542. C_0000F0_SOFT_RESET_HI
  106543. C_0000F0_SOFT_RESET_IDCT
  106544. C_0000F0_SOFT_RESET_MC
  106545. C_0000F0_SOFT_RESET_PP
  106546. C_0000F0_SOFT_RESET_RB
  106547. C_0000F0_SOFT_RESET_RE
  106548. C_0000F0_SOFT_RESET_SE
  106549. C_0000F0_SOFT_RESET_VAP
  106550. C_0000F0_SOFT_RESET_VIP
  106551. C_0000F8_CONFIG_MEMSIZE
  106552. C_00010000
  106553. C_000100_EFFECTIVE_L2_CACHE_SIZE
  106554. C_000100_EFFECTIVE_L2_QUEUE_SIZE
  106555. C_000100_ENABLE_PT
  106556. C_000100_INVALIDATE_ALL_L1_TLBS
  106557. C_000100_INVALIDATE_L2_CACHE
  106558. C_000100_MC_FB_START
  106559. C_000100_MC_FB_TOP
  106560. C_000102_ENABLE_PAGE_TABLE
  106561. C_000102_PAGE_TABLE_DEPTH
  106562. C_000104_MC_CPR_INIT_LAT
  106563. C_000104_MC_DISP0R_INIT_LAT
  106564. C_000104_MC_DISP1R_INIT_LAT
  106565. C_000104_MC_E2R_INIT_LAT
  106566. C_000104_MC_FIXED_INIT_LAT
  106567. C_000104_MC_GLOBW_INIT_LAT
  106568. C_000104_MC_VF_INIT_LAT
  106569. C_000104_SAME_PAGE_PRIO
  106570. C_000134_HDP_FB_START
  106571. C_000148_MC_FB_START
  106572. C_000148_MC_FB_TOP
  106573. C_00014C_MC_AGP_START
  106574. C_00014C_MC_AGP_TOP
  106575. C_00015C_AGP_BASE_ADDR_2
  106576. C_00015C_MC_FB_START
  106577. C_00015C_MC_FB_TOP
  106578. C_00016C_EFFECTIVE_L1_CACHE_SIZE
  106579. C_00016C_EFFECTIVE_L1_QUEUE_SIZE
  106580. C_00016C_ENABLE_FRAGMENT_PROCESSING
  106581. C_00016C_ENABLE_TRANSLATION_MODE_OVERRIDE
  106582. C_00016C_INVALIDATE_L1_TLB
  106583. C_00016C_SYSTEM_ACCESS_MODE_MASK
  106584. C_00016C_SYSTEM_APERTURE_UNMAPPED_ACCESS
  106585. C_00016C_TRANSLATION_MODE_OVERRIDE
  106586. C_000170_AGP_BASE_ADDR
  106587. C_0001F8_MC_IND_ADDR
  106588. C_0001F8_MC_IND_WR_EN
  106589. C_0001FC_MC_IND_DATA
  106590. C_00023C_DISPLAY_BASE_ADDR
  106591. C_000260_CUR_LOCK
  106592. C_000260_CUR_OFFSET
  106593. C_000300_VGAREG_LINECMP_COMPATIBILITY_SEL
  106594. C_000300_VGA_BLINK_MODE
  106595. C_000300_VGA_BLINK_RATE
  106596. C_000300_VGA_CURSOR_BLINK_INVERT
  106597. C_000300_VGA_EXTD_ADDR_COUNT_ENABLE
  106598. C_000300_VGA_LOCK_8DOT
  106599. C_000300_VGA_VSTATUS_CNTL
  106600. C_000310_VGA_MEMORY_BASE_ADDRESS
  106601. C_000328_VGA_MEM_PAGE_SELECT_EN
  106602. C_000328_VGA_RBBM_LOCK_DISABLE
  106603. C_000328_VGA_SOFT_RESET
  106604. C_000328_VGA_TEST_RESET_CONTROL
  106605. C_000330_D1VGA_MODE_ENABLE
  106606. C_000330_D1VGA_OVERSCAN_COLOR_EN
  106607. C_000330_D1VGA_OVERSCAN_TIMING_SELECT
  106608. C_000330_D1VGA_ROTATE
  106609. C_000330_D1VGA_SYNC_POLARITY_SELECT
  106610. C_000330_D1VGA_TIMING_SELECT
  106611. C_000338_D2VGA_MODE_ENABLE
  106612. C_000338_D2VGA_OVERSCAN_COLOR_EN
  106613. C_000338_D2VGA_OVERSCAN_TIMING_SELECT
  106614. C_000338_D2VGA_ROTATE
  106615. C_000338_D2VGA_SYNC_POLARITY_SELECT
  106616. C_000338_D2VGA_TIMING_SELECT
  106617. C_00033C_CRTC2_DISPLAY_BASE_ADDR
  106618. C_000360_CUR2_LOCK
  106619. C_000360_CUR2_OFFSET
  106620. C_0003C2_GENMO_MONO_ADDRESS_B
  106621. C_0003C2_ODD_EVEN_MD_PGSEL
  106622. C_0003C2_VGA_CKSEL
  106623. C_0003C2_VGA_HSYNC_POL
  106624. C_0003C2_VGA_RAM_EN
  106625. C_0003C2_VGA_VSYNC_POL
  106626. C_0003F8_CRT2_ON
  106627. C_0003F8_CRTC2_CUR_EN
  106628. C_0003F8_CRTC2_CUR_MODE
  106629. C_0003F8_CRTC2_C_SYNC_EN
  106630. C_0003F8_CRTC2_DBL_SCAN_EN
  106631. C_0003F8_CRTC2_DISPLAY_DIS
  106632. C_0003F8_CRTC2_DISP_REQ_EN_B
  106633. C_0003F8_CRTC2_EN
  106634. C_0003F8_CRTC2_HSYNC_DIS
  106635. C_0003F8_CRTC2_HSYNC_TRISTATE
  106636. C_0003F8_CRTC2_ICON_EN
  106637. C_0003F8_CRTC2_INTERLACE_EN
  106638. C_0003F8_CRTC2_PIX_WIDTH
  106639. C_0003F8_CRTC2_SYNC_TRISTATE
  106640. C_0003F8_CRTC2_VSYNC_DIS
  106641. C_0003F8_CRTC2_VSYNC_TRISTATE
  106642. C_000420_OV0_ADAPTIVE_DEINT
  106643. C_000420_OV0_BANDWIDTH
  106644. C_000420_OV0_BURST_PER_PLANE
  106645. C_000420_OV0_CRTC_SEL
  106646. C_000420_OV0_DOUBLE_BUFFER_REGS
  106647. C_000420_OV0_GAMMA_SEL
  106648. C_000420_OV0_HORZ_PICK_NEAREST
  106649. C_000420_OV0_INT_EMU
  106650. C_000420_OV0_LIN_TRANS_BYPASS
  106651. C_000420_OV0_NO_READ_BEHIND_SCAN
  106652. C_000420_OV0_OVERLAY_EN
  106653. C_000420_OV0_SIGNED_UV
  106654. C_000420_OV0_SOFT_RESET
  106655. C_000420_OV0_SURFACE_FORMAT
  106656. C_000420_OV0_VERT_PICK_NEAREST
  106657. C_00070C_RB_RPTR_ADDR
  106658. C_00070C_RB_RPTR_SWAP
  106659. C_000740_CSQ_CNT_INDIRECT
  106660. C_000740_CSQ_CNT_PRIMARY
  106661. C_000740_CSQ_MODE
  106662. C_000770_SCRATCH_SWAP
  106663. C_000770_SCRATCH_UMSK
  106664. C_000774_SCRATCH_ADDR
  106665. C_0007C0_CMDSTRM_BUSY
  106666. C_0007C0_CP_BUSY
  106667. C_0007C0_CSF_INDIRECT2_BUSY
  106668. C_0007C0_CSF_INDIRECT_BUSY
  106669. C_0007C0_CSF_PRIMARY_BUSY
  106670. C_0007C0_CSI_BUSY
  106671. C_0007C0_CSQ_INDIRECT2_BUSY
  106672. C_0007C0_CSQ_INDIRECT_BUSY
  106673. C_0007C0_CSQ_PRIMARY_BUSY
  106674. C_0007C0_GUIDMA_BUSY
  106675. C_0007C0_MRU_BUSY
  106676. C_0007C0_MWU_BUSY
  106677. C_0007C0_RCIU_BUSY
  106678. C_0007C0_RSIU_BUSY
  106679. C_0007C0_VIDDMA_BUSY
  106680. C_00080000
  106681. C_000E40_CBA2D_BUSY
  106682. C_000E40_CFRQ_IN_RTBUF
  106683. C_000E40_CFRQ_ON_RBB
  106684. C_000E40_CF_PIPE_BUSY
  106685. C_000E40_CMDFIFO_AVAIL
  106686. C_000E40_CPRQ_IN_RTBUF
  106687. C_000E40_CPRQ_ON_RBB
  106688. C_000E40_CP_CMDSTRM_BUSY
  106689. C_000E40_E2_BUSY
  106690. C_000E40_ENG_EV_BUSY
  106691. C_000E40_GA_BUSY
  106692. C_000E40_GUI_ACTIVE
  106693. C_000E40_HIRQ_IN_RTBUF
  106694. C_000E40_HIRQ_ON_RBB
  106695. C_000E40_PB_BUSY
  106696. C_000E40_RB2D_BUSY
  106697. C_000E40_RB3D_BUSY
  106698. C_000E40_RBBM_HIBUSY
  106699. C_000E40_RE_BUSY
  106700. C_000E40_SE_BUSY
  106701. C_000E40_SKID_CFBUSY
  106702. C_000E40_TAM_BUSY
  106703. C_000E40_TDM_BUSY
  106704. C_000E40_TIM_BUSY
  106705. C_000E40_VAP_BUSY
  106706. C_000E40_VAP_VF_BUSY
  106707. C_00100000
  106708. C_0028F8_MC_IND_ADDR
  106709. C_006080_D1CRTC_CURRENT_MASTER_EN_STATE
  106710. C_006080_D1CRTC_DISABLE_POINT_CNTL
  106711. C_006080_D1CRTC_DISP_READ_REQUEST_DISABLE
  106712. C_006080_D1CRTC_MASTER_EN
  106713. C_006080_D1CRTC_SYNC_RESET_SEL
  106714. C_0060A4_D1CRTC_FRAME_COUNT
  106715. C_0060E8_D1CRTC_UPDATE_LOCK
  106716. C_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS
  106717. C_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS
  106718. C_006520_DC_LB_DISP1_END_ADR
  106719. C_006520_DC_LB_MEMORY_SPLIT
  106720. C_006520_DC_LB_MEMORY_SPLIT_MODE
  106721. C_006534_D1MODE_VBLANK_ACK
  106722. C_006534_D1MODE_VBLANK_INTERRUPT
  106723. C_006534_D1MODE_VBLANK_OCCURRED
  106724. C_006534_D1MODE_VBLANK_STAT
  106725. C_006540_D1MODE_VBLANK_CP_SEL
  106726. C_006540_D1MODE_VBLANK_INT_MASK
  106727. C_006540_D1MODE_VLINE_INT_MASK
  106728. C_006540_D2MODE_VBLANK_CP_SEL
  106729. C_006540_D2MODE_VBLANK_INT_MASK
  106730. C_006540_D2MODE_VLINE_INT_MASK
  106731. C_006548_D1MODE_PRIORITY_A_ALWAYS_ON
  106732. C_006548_D1MODE_PRIORITY_A_FORCE_MASK
  106733. C_006548_D1MODE_PRIORITY_A_OFF
  106734. C_006548_D1MODE_PRIORITY_MARK_A
  106735. C_00654C_D1MODE_PRIORITY_B_ALWAYS_ON
  106736. C_00654C_D1MODE_PRIORITY_B_FORCE_MASK
  106737. C_00654C_D1MODE_PRIORITY_B_OFF
  106738. C_00654C_D1MODE_PRIORITY_MARK_B
  106739. C_006880_D2CRTC_CURRENT_MASTER_EN_STATE
  106740. C_006880_D2CRTC_DISABLE_POINT_CNTL
  106741. C_006880_D2CRTC_DISP_READ_REQUEST_DISABLE
  106742. C_006880_D2CRTC_MASTER_EN
  106743. C_006880_D2CRTC_SYNC_RESET_SEL
  106744. C_0068A4_D2CRTC_FRAME_COUNT
  106745. C_0068E8_D2CRTC_UPDATE_LOCK
  106746. C_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS
  106747. C_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS
  106748. C_006D34_D2MODE_VBLANK_ACK
  106749. C_006D34_D2MODE_VBLANK_INTERRUPT
  106750. C_006D34_D2MODE_VBLANK_OCCURRED
  106751. C_006D34_D2MODE_VBLANK_STAT
  106752. C_006D48_D2MODE_PRIORITY_A_ALWAYS_ON
  106753. C_006D48_D2MODE_PRIORITY_A_FORCE_MASK
  106754. C_006D48_D2MODE_PRIORITY_A_OFF
  106755. C_006D48_D2MODE_PRIORITY_MARK_A
  106756. C_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON
  106757. C_006D4C_D2MODE_PRIORITY_B_FORCE_MASK
  106758. C_006D4C_D2MODE_PRIORITY_B_OFF
  106759. C_006D4C_D2MODE_PRIORITY_MARK_B
  106760. C_006D58_LB_D1_MAX_REQ_OUTSTANDING
  106761. C_006D58_LB_D2_MAX_REQ_OUTSTANDING
  106762. C_007404_HDMI0_AZ_FORMAT_WTRIG
  106763. C_007404_HDMI0_AZ_FORMAT_WTRIG_INT
  106764. C_007408_HDMI0_AZ_FORMAT_WTRIG_ACK
  106765. C_007408_HDMI0_AZ_FORMAT_WTRIG_MASK
  106766. C_007828_DACA_AUTODETECT_CHECK_MASK
  106767. C_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER
  106768. C_007828_DACA_AUTODETECT_MODE
  106769. C_007838_DACA_AUTODETECT_INT_ENABLE
  106770. C_007838_DACA_DACA_AUTODETECT_ACK
  106771. C_007A28_DACB_AUTODETECT_CHECK_MASK
  106772. C_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER
  106773. C_007A28_DACB_AUTODETECT_MODE
  106774. C_007A38_DACB_AUTODETECT_INT_ENABLE
  106775. C_007A38_DACB_DACA_AUTODETECT_ACK
  106776. C_007D00_DC_HOT_PLUG_DETECT1_EN
  106777. C_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS
  106778. C_007D04_DC_HOT_PLUG_DETECT1_SENSE
  106779. C_007D08_DC_HOT_PLUG_DETECT1_INT_ACK
  106780. C_007D08_DC_HOT_PLUG_DETECT1_INT_EN
  106781. C_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY
  106782. C_007D10_DC_HOT_PLUG_DETECT2_EN
  106783. C_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS
  106784. C_007D14_DC_HOT_PLUG_DETECT2_SENSE
  106785. C_007D18_DC_HOT_PLUG_DETECT2_INT_ACK
  106786. C_007D18_DC_HOT_PLUG_DETECT2_INT_EN
  106787. C_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY
  106788. C_007EDC_DACA_AUTODETECT_INTERRUPT
  106789. C_007EDC_DACB_AUTODETECT_INTERRUPT
  106790. C_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT
  106791. C_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT
  106792. C_007EDC_LB_D1_VBLANK_INTERRUPT
  106793. C_007EDC_LB_D2_VBLANK_INTERRUPT
  106794. C_0086D8_CP_ME_HALT
  106795. C_0086D8_CP_PFP_HALT
  106796. C_008C44_MEM_SIZE
  106797. C_008C4C_MEM_SIZE
  106798. C_008C54_MEM_SIZE
  106799. C_008C5C_MEM_SIZE
  106800. C_008C64_MEM_SIZE
  106801. C_008C6C_MEM_SIZE
  106802. C_008C74_MEM_SIZE
  106803. C_008C7C_MEM_SIZE
  106804. C_028000_PITCH_TILE_MAX
  106805. C_028000_SLICE_TILE_MAX
  106806. C_028004_SLICE_MAX
  106807. C_028004_SLICE_START
  106808. C_028008_SLICE_MAX
  106809. C_028008_SLICE_START
  106810. C_028010_ARRAY_MODE
  106811. C_028010_FORMAT
  106812. C_028010_READ_SIZE
  106813. C_028010_TILE_COMPACT
  106814. C_028010_TILE_SURFACE_ENABLE
  106815. C_028010_ZRANGE_PRECISION
  106816. C_028040_ARRAY_MODE
  106817. C_028040_FORMAT
  106818. C_028040_READ_SIZE
  106819. C_028040_TILE_SURFACE_ENABLE
  106820. C_028040_ZRANGE_PRECISION
  106821. C_028044_FORMAT
  106822. C_028058_HEIGHT_TILE_MAX
  106823. C_028058_PITCH_TILE_MAX
  106824. C_02805C_SLICE_TILE_MAX
  106825. C_028060_PITCH_TILE_MAX
  106826. C_028060_SLICE_TILE_MAX
  106827. C_028080_SLICE_MAX
  106828. C_028080_SLICE_START
  106829. C_0280A0_ARRAY_MODE
  106830. C_0280A0_BLEND_BYPASS
  106831. C_0280A0_BLEND_CLAMP
  106832. C_0280A0_BLEND_FLOAT32
  106833. C_0280A0_CLEAR_COLOR
  106834. C_0280A0_COMP_SWAP
  106835. C_0280A0_ENDIAN
  106836. C_0280A0_FORMAT
  106837. C_0280A0_NUMBER_TYPE
  106838. C_0280A0_READ_SIZE
  106839. C_0280A0_ROUND_MODE
  106840. C_0280A0_SIMPLE_FLOAT
  106841. C_0280A0_SOURCE_FORMAT
  106842. C_0280A0_TILE_COMPACT
  106843. C_0280A0_TILE_MODE
  106844. C_0280C0_BASE_256B
  106845. C_0280E0_BASE_256B
  106846. C_028100_CMASK_BLOCK_MAX
  106847. C_028100_FMASK_TILE_MAX
  106848. C_028238_TARGET0_ENABLE
  106849. C_028238_TARGET1_ENABLE
  106850. C_028238_TARGET2_ENABLE
  106851. C_028238_TARGET3_ENABLE
  106852. C_028238_TARGET4_ENABLE
  106853. C_028238_TARGET5_ENABLE
  106854. C_028238_TARGET6_ENABLE
  106855. C_028238_TARGET7_ENABLE
  106856. C_02823C_OUTPUT0_ENABLE
  106857. C_02823C_OUTPUT1_ENABLE
  106858. C_02823C_OUTPUT2_ENABLE
  106859. C_02823C_OUTPUT3_ENABLE
  106860. C_02823C_OUTPUT4_ENABLE
  106861. C_02823C_OUTPUT5_ENABLE
  106862. C_02823C_OUTPUT6_ENABLE
  106863. C_02823C_OUTPUT7_ENABLE
  106864. C_028800_BACKFACE_ENABLE
  106865. C_028800_STENCILFAIL
  106866. C_028800_STENCILFAIL_BF
  106867. C_028800_STENCILFUNC
  106868. C_028800_STENCILFUNC_BF
  106869. C_028800_STENCILZFAIL
  106870. C_028800_STENCILZFAIL_BF
  106871. C_028800_STENCILZPASS
  106872. C_028800_STENCILZPASS_BF
  106873. C_028800_STENCIL_ENABLE
  106874. C_028800_ZFUNC
  106875. C_028800_Z_ENABLE
  106876. C_028800_Z_WRITE_ENABLE
  106877. C_028808_SPECIAL_OP
  106878. C_0288A8_ITEMSIZE
  106879. C_0288AC_ITEMSIZE
  106880. C_0288B0_ITEMSIZE
  106881. C_0288B4_ITEMSIZE
  106882. C_0288B8_ITEMSIZE
  106883. C_0288BC_ITEMSIZE
  106884. C_0288C0_ITEMSIZE
  106885. C_0288C4_ITEMSIZE
  106886. C_0288C8_ITEMSIZE
  106887. C_028AB0_STREAMOUT
  106888. C_028ABC_HTILE_HEIGHT
  106889. C_028ABC_HTILE_WIDTH
  106890. C_028B20_BUFFER_0_EN
  106891. C_028B20_BUFFER_1_EN
  106892. C_028B20_BUFFER_2_EN
  106893. C_028B20_BUFFER_3_EN
  106894. C_028B20_SIZE
  106895. C_028C04_AA_MASK_CENTROID_DTMN
  106896. C_028C04_MAX_SAMPLE_DIST
  106897. C_028C04_MSAA_NUM_SAMPLES
  106898. C_028C6C_SLICE_MAX
  106899. C_028C6C_SLICE_START
  106900. C_028C70_ARRAY_MODE
  106901. C_028C70_BLEND_BYPASS
  106902. C_028C70_BLEND_CLAMP
  106903. C_028C70_COMPRESSION
  106904. C_028C70_COMP_SWAP
  106905. C_028C70_ENDIAN
  106906. C_028C70_FAST_CLEAR
  106907. C_028C70_FORMAT
  106908. C_028C70_NUMBER_TYPE
  106909. C_028C70_RAT
  106910. C_028C70_RESOURCE_TYPE
  106911. C_028C70_ROUND_MODE
  106912. C_028C70_SIMPLE_FLOAT
  106913. C_028C70_SOURCE_FORMAT
  106914. C_028C70_TILE_COMPACT
  106915. C_028C74_NON_DISP_TILING_ORDER
  106916. C_028D24_HTILE_HEIGHT
  106917. C_028D24_HTILE_WIDTH
  106918. C_030000_DIM
  106919. C_030000_NON_DISP_TILING_ORDER
  106920. C_030000_PITCH
  106921. C_030000_TEX_WIDTH
  106922. C_030004_ARRAY_MODE
  106923. C_030004_TEX_DEPTH
  106924. C_030004_TEX_HEIGHT
  106925. C_030008_BASE_ADDRESS
  106926. C_03000C_MIP_ADDRESS
  106927. C_030010_BASE_LEVEL
  106928. C_030010_DST_SEL_W
  106929. C_030010_DST_SEL_X
  106930. C_030010_DST_SEL_Y
  106931. C_030010_DST_SEL_Z
  106932. C_030010_ENDIAN_SWAP
  106933. C_030010_FORCE_DEGAMMA
  106934. C_030010_FORMAT_COMP_W
  106935. C_030010_FORMAT_COMP_X
  106936. C_030010_FORMAT_COMP_Y
  106937. C_030010_FORMAT_COMP_Z
  106938. C_030010_NUM_FORMAT_ALL
  106939. C_030010_SRF_MODE_ALL
  106940. C_030014_BASE_ARRAY
  106941. C_030014_LAST_ARRAY
  106942. C_030014_LAST_LEVEL
  106943. C_030018_INTERLACED
  106944. C_030018_MAX_ANISO
  106945. C_030018_PERF_MODULATION
  106946. C_03001C_DATA_FORMAT
  106947. C_03001C_TYPE
  106948. C_038000_DIM
  106949. C_038000_PITCH
  106950. C_038000_TEX_WIDTH
  106951. C_038000_TILE_MODE
  106952. C_038000_TILE_TYPE
  106953. C_038004_DATA_FORMAT
  106954. C_038004_TEX_DEPTH
  106955. C_038004_TEX_HEIGHT
  106956. C_038010_BASE_LEVEL
  106957. C_038010_DST_SEL_W
  106958. C_038010_DST_SEL_X
  106959. C_038010_DST_SEL_Y
  106960. C_038010_DST_SEL_Z
  106961. C_038010_ENDIAN_SWAP
  106962. C_038010_FORCE_DEGAMMA
  106963. C_038010_FORMAT_COMP_W
  106964. C_038010_FORMAT_COMP_X
  106965. C_038010_FORMAT_COMP_Y
  106966. C_038010_FORMAT_COMP_Z
  106967. C_038010_NUM_FORMAT_ALL
  106968. C_038010_REQUEST_SIZE
  106969. C_038010_SRF_MODE_ALL
  106970. C_038014_BASE_ARRAY
  106971. C_038014_LAST_ARRAY
  106972. C_038014_LAST_LEVEL
  106973. C_07
  106974. C_10000000
  106975. C_11
  106976. C_12
  106977. C_14
  106978. C_20000000
  106979. C_40000000
  106980. C_4f1bbcdc
  106981. C_58
  106982. C_5a7ef9db
  106983. C_61
  106984. C_7fffffff
  106985. C_8
  106986. C_80000000
  106987. C_ADD_MULTICAST_ADDR
  106988. C_ADD_STA
  106989. C_AHEAD
  106990. C_AMP_DIV_CH1_CTL_MASK
  106991. C_AMP_DIV_CH1_CTL_MASK_SFT
  106992. C_AMP_DIV_CH1_CTL_SFT
  106993. C_AMP_DIV_CH2_CTL_MASK
  106994. C_AMP_DIV_CH2_CTL_MASK_SFT
  106995. C_AMP_DIV_CH2_CTL_SFT
  106996. C_A_C_OK
  106997. C_A_F_OK
  106998. C_A_R_OK
  106999. C_A_W_OK
  107000. C_A_X_OK
  107001. C_BASEBAND_SIN_GEN_CTL_MASK
  107002. C_BASEBAND_SIN_GEN_CTL_MASK_SFT
  107003. C_BASEBAND_SIN_GEN_CTL_SFT
  107004. C_BAUD
  107005. C_BEHIND
  107006. C_BP_CAPABILITY_CF_POLLABLE
  107007. C_BP_CAPABILITY_CF_POLL_REQUEST
  107008. C_BP_CAPABILITY_ESS
  107009. C_BP_CAPABILITY_IBSS
  107010. C_BP_CAPABILITY_PRIVACY
  107011. C_BROKEN_PIPE
  107012. C_BT_CONFIG
  107013. C_CALIB
  107014. C_CAN_BRPEXT_REG
  107015. C_CAN_BTR_REG
  107016. C_CAN_BUS_OFF
  107017. C_CAN_CTRL_EX_REG
  107018. C_CAN_CTRL_REG
  107019. C_CAN_ERROR_PASSIVE
  107020. C_CAN_ERROR_WARNING
  107021. C_CAN_ERR_CNT_REG
  107022. C_CAN_FUNCTION_REG
  107023. C_CAN_H
  107024. C_CAN_ID
  107025. C_CAN_IF1_ARB1_REG
  107026. C_CAN_IF1_ARB2_REG
  107027. C_CAN_IF1_COMMSK_REG
  107028. C_CAN_IF1_COMREQ_REG
  107029. C_CAN_IF1_DATA1_REG
  107030. C_CAN_IF1_DATA2_REG
  107031. C_CAN_IF1_DATA3_REG
  107032. C_CAN_IF1_DATA4_REG
  107033. C_CAN_IF1_MASK1_REG
  107034. C_CAN_IF1_MASK2_REG
  107035. C_CAN_IF1_MSGCTRL_REG
  107036. C_CAN_IF2_ARB1_REG
  107037. C_CAN_IF2_ARB2_REG
  107038. C_CAN_IF2_COMMSK_REG
  107039. C_CAN_IF2_COMREQ_REG
  107040. C_CAN_IF2_DATA1_REG
  107041. C_CAN_IF2_DATA2_REG
  107042. C_CAN_IF2_DATA3_REG
  107043. C_CAN_IF2_DATA4_REG
  107044. C_CAN_IF2_MASK1_REG
  107045. C_CAN_IF2_MASK2_REG
  107046. C_CAN_IF2_MSGCTRL_REG
  107047. C_CAN_IFACE
  107048. C_CAN_INTPND1_REG
  107049. C_CAN_INTPND2_REG
  107050. C_CAN_INT_REG
  107051. C_CAN_MSGVAL1_REG
  107052. C_CAN_MSGVAL2_REG
  107053. C_CAN_MSG_OBJ_RX_FIRST
  107054. C_CAN_MSG_OBJ_RX_LAST
  107055. C_CAN_MSG_OBJ_RX_NUM
  107056. C_CAN_MSG_OBJ_RX_SPLIT
  107057. C_CAN_MSG_OBJ_TX_FIRST
  107058. C_CAN_MSG_OBJ_TX_LAST
  107059. C_CAN_MSG_OBJ_TX_NUM
  107060. C_CAN_MSG_RX_LOW_LAST
  107061. C_CAN_NAPI_WEIGHT
  107062. C_CAN_NEWDAT1_REG
  107063. C_CAN_NEWDAT2_REG
  107064. C_CAN_NO_ERROR
  107065. C_CAN_NO_OF_OBJECTS
  107066. C_CAN_REG_32
  107067. C_CAN_REG_ALIGN_16
  107068. C_CAN_REG_ALIGN_32
  107069. C_CAN_STS_REG
  107070. C_CAN_TEST_REG
  107071. C_CAN_TXRQST1_REG
  107072. C_CAN_TXRQST2_REG
  107073. C_CCE_CLI0_ASYNC_FIFO_PARTIY_ERR
  107074. C_CCE_CLI1_ASYNC_FIFO_DBG_PARITY_ERR
  107075. C_CCE_CLI1_ASYNC_FIFO_PIO_CRDT_PARITY_ERR
  107076. C_CCE_CLI1_ASYNC_FIFO_RXDMA_PARITY_ERR
  107077. C_CCE_CLI1_ASYNC_FIFO_SDMA_HD_PARITY_ERR
  107078. C_CCE_CLI2_ASYNC_FIFO_PARITY_ERR
  107079. C_CCE_CSR_CFG_BUS_PARITY_ERR
  107080. C_CCE_CSR_PARITY_ERR
  107081. C_CCE_CSR_READ_BAD_ADDR_ERR
  107082. C_CCE_CSR_WRITE_BAD_ADDR_ERR
  107083. C_CCE_ERR_INT
  107084. C_CCE_ERR_STATUS_AGGREGATED_CNT
  107085. C_CCE_INT_MAP_COR_ERR
  107086. C_CCE_INT_MAP_UNC_ERR
  107087. C_CCE_MISC_INT
  107088. C_CCE_MSIX_CSR_PARITY_ERR
  107089. C_CCE_MSIX_TABLE_COR_ERR
  107090. C_CCE_MSIX_TABLE_UNC_ERR
  107091. C_CCE_PCI_CR_ST
  107092. C_CCE_PCI_TR_ST
  107093. C_CCE_PIO_WR_ST
  107094. C_CCE_RCPL_ASYNC_FIFO_PARITY_ERR
  107095. C_CCE_RCV_AV_INT
  107096. C_CCE_RCV_URG_INT
  107097. C_CCE_RSPD_DATA_PARITY_ERR
  107098. C_CCE_RXDMA_CONV_FIFO_PARITY_ERR
  107099. C_CCE_SDMA_INT
  107100. C_CCE_SEG_READ_BAD_ADDR_ERR
  107101. C_CCE_SEG_WRITE_BAD_ADDR_ERR
  107102. C_CCE_SEND_CR_INT
  107103. C_CCE_TRGT_ACCESS_ERR
  107104. C_CCE_TRGT_ASYNC_FIFO_PARITY_ERR
  107105. C_CCE_TRGT_CPL_TIMEOUT_ERR
  107106. C_CF_PARAM_SET_ELEMENT_ID
  107107. C_CF_PARAM_SET_ELEMENT_LNGTH
  107108. C_CHANNEL_SWITCH
  107109. C_CHKSUM
  107110. C_CH_DISABLE
  107111. C_CH_ENABLE
  107112. C_CH_LOOPBACK
  107113. C_CH_RXENABLE
  107114. C_CH_TXENABLE
  107115. C_CIBAUD
  107116. C_CLEAR_PROFILE
  107117. C_CLEAR_STATS
  107118. C_CLOCAL
  107119. C_CMSPAR
  107120. C_CM_ACK_DSBL
  107121. C_CM_ACK_ENBL
  107122. C_CM_CLFLOW
  107123. C_CM_CLR_BREAK
  107124. C_CM_CMDERROR
  107125. C_CM_CMD_DONE
  107126. C_CM_FATAL
  107127. C_CM_FLUSH_RX
  107128. C_CM_FLUSH_TX
  107129. C_CM_FR_ERROR
  107130. C_CM_HW_RESET
  107131. C_CM_ICHAR
  107132. C_CM_INTBACK
  107133. C_CM_INTBACK2
  107134. C_CM_IOCTL
  107135. C_CM_IOCTLM
  107136. C_CM_IOCTLW
  107137. C_CM_IRQ_DSBL
  107138. C_CM_IRQ_ENBL
  107139. C_CM_MCTS
  107140. C_CM_MDCD
  107141. C_CM_MDSR
  107142. C_CM_MRI
  107143. C_CM_MRTS
  107144. C_CM_OVR_ERROR
  107145. C_CM_PR_ERROR
  107146. C_CM_Q_DISABLE
  107147. C_CM_Q_ENABLE
  107148. C_CM_RESET
  107149. C_CM_RXBRK
  107150. C_CM_RXHIWM
  107151. C_CM_RXNNDT
  107152. C_CM_RXOFL
  107153. C_CM_SENDBRK
  107154. C_CM_SENDXOFF
  107155. C_CM_SENDXON
  107156. C_CM_SET_BREAK
  107157. C_CM_TINACT
  107158. C_CM_TXBEMPTY
  107159. C_CM_TXFEMPTY
  107160. C_CM_TXLOWWM
  107161. C_COMB_OUT_SIN_GEN_CTL_MASK
  107162. C_COMB_OUT_SIN_GEN_CTL_MASK_SFT
  107163. C_COMB_OUT_SIN_GEN_CTL_SFT
  107164. C_COMMENT
  107165. C_COM_DRV_OWN
  107166. C_CONN
  107167. C_CONNECTED
  107168. C_CRC_LEN
  107169. C_CREAD
  107170. C_CRTSCTS
  107171. C_CSIZE
  107172. C_CSTOPB
  107173. C_CTX_PCTLWD_POS
  107174. C_CT_KILL_CONFIG
  107175. C_CUT_VERSION
  107176. C_CWMAX
  107177. C_CWMIN_A
  107178. C_CWMIN_B
  107179. C_C_FDR_FILT_DISABLE
  107180. C_C_FDR_FILT_ENABLE
  107181. C_C_MCAST_DISABLE
  107182. C_C_MCAST_ENABLE
  107183. C_C_NEGOTIATE_10_100
  107184. C_C_NEGOTIATE_BOTH
  107185. C_C_NEGOTIATE_GIG
  107186. C_C_PROMISC_DISABLE
  107187. C_C_PROMISC_ENABLE
  107188. C_C_STACK_DOWN
  107189. C_C_STACK_UP
  107190. C_DAC_EN_CTL_MASK
  107191. C_DAC_EN_CTL_MASK_SFT
  107192. C_DAC_EN_CTL_SFT
  107193. C_DATA_EN_SEL_CTL_PRE_MASK
  107194. C_DATA_EN_SEL_CTL_PRE_MASK_SFT
  107195. C_DATA_EN_SEL_CTL_PRE_SFT
  107196. C_DC_CRC_LN0
  107197. C_DC_CRC_LN1
  107198. C_DC_CRC_LN2
  107199. C_DC_CRC_LN3
  107200. C_DC_CRC_MULT_LN
  107201. C_DC_DROPPED_PKT
  107202. C_DC_ESC0_ONLY_CNT
  107203. C_DC_ESC0_PLUS1_CNT
  107204. C_DC_ESC0_PLUS2_CNT
  107205. C_DC_FM_CFG_ERR
  107206. C_DC_MARK_FECN
  107207. C_DC_MARK_FECN_VL
  107208. C_DC_MC_RCV_PKTS
  107209. C_DC_MC_XMIT_PKTS
  107210. C_DC_MISC_FLG_CNT
  107211. C_DC_PG_DBG_FLIT_CRDTS_CNT
  107212. C_DC_PG_STS_PAUSE_COMPLETE_CNT
  107213. C_DC_PG_STS_TX_MBE_CNT
  107214. C_DC_PG_STS_TX_SBE_CNT
  107215. C_DC_PRF_ACCEPTED_LTP_CNT
  107216. C_DC_PRF_CLK_CNTR
  107217. C_DC_PRF_GOOD_LTP_CNT
  107218. C_DC_PRF_RX_FLIT_CNT
  107219. C_DC_PRF_TX_FLIT_CNT
  107220. C_DC_RCV_BBL
  107221. C_DC_RCV_BBL_VL
  107222. C_DC_RCV_BCN
  107223. C_DC_RCV_BCN_VL
  107224. C_DC_RCV_CERR
  107225. C_DC_RCV_ERR
  107226. C_DC_RCV_FCC
  107227. C_DC_RCV_FCN
  107228. C_DC_RCV_FCN_VL
  107229. C_DC_RCV_FLITS
  107230. C_DC_RCV_PKTS
  107231. C_DC_REINIT_FROM_PEER_CNT
  107232. C_DC_RMT_PHY_ERR
  107233. C_DC_RX_FLIT_VL
  107234. C_DC_RX_PKT_VL
  107235. C_DC_RX_REPLAY
  107236. C_DC_SBE_CNT
  107237. C_DC_SEQ_CRC_CNT
  107238. C_DC_TOTAL_CRC
  107239. C_DC_TX_REPLAY
  107240. C_DC_UNC_ERR
  107241. C_DC_XMIT_CERR
  107242. C_DC_XMIT_FCC
  107243. C_DC_XMIT_FLITS
  107244. C_DC_XMIT_PKTS
  107245. C_DECL_REGISTER
  107246. C_DEL_MULTICAST_ADDR
  107247. C_DEL_RNG
  107248. C_DET0
  107249. C_DET1
  107250. C_DET2
  107251. C_DET3
  107252. C_DET_LVD
  107253. C_DET_SE
  107254. C_DIGMIC_PHASE_SEL_CH1_CTL_MASK
  107255. C_DIGMIC_PHASE_SEL_CH1_CTL_MASK_SFT
  107256. C_DIGMIC_PHASE_SEL_CH1_CTL_SFT
  107257. C_DIGMIC_PHASE_SEL_CH2_CTL_MASK
  107258. C_DIGMIC_PHASE_SEL_CH2_CTL_MASK_SFT
  107259. C_DIGMIC_PHASE_SEL_CH2_CTL_SFT
  107260. C_DISABLE
  107261. C_DISABLE_CLKCHANGE
  107262. C_DISABLE_PM
  107263. C_DISASSOC_REASON_CODE_DEFAULT
  107264. C_DISASSOC_REASON_CODE_LEN
  107265. C_DISCONNECTING
  107266. C_DL_15STOP
  107267. C_DL_1STOP
  107268. C_DL_2STOP
  107269. C_DL_CS
  107270. C_DL_CS5
  107271. C_DL_CS6
  107272. C_DL_CS7
  107273. C_DL_CS8
  107274. C_DL_STOP
  107275. C_DYING
  107276. C_EIFS
  107277. C_ENABLE
  107278. C_ENABLE_CLKCHANGE
  107279. C_ENABLE_PM
  107280. C_ENTRY
  107281. C_ERES_PER_PAGE
  107282. C_ERE_PER_PAGE_MASK
  107283. C_ESSID_ELEMENT_ID
  107284. C_ESSID_ELEMENT_MAX_LENGTH
  107285. C_EXT_ADC_CTL_MASK
  107286. C_EXT_ADC_CTL_MASK_SFT
  107287. C_EXT_ADC_CTL_SFT
  107288. C_FDR_FILTERING
  107289. C_FH_PARAM_SET_ELEMENT_ID
  107290. C_FH_PARAM_SET_ELEMENT_LNGTH
  107291. C_FILESIZE
  107292. C_FLUSH
  107293. C_FL_IXX
  107294. C_FL_OIXANY
  107295. C_FL_OXX
  107296. C_FL_SWFLOW
  107297. C_FREQ_DIV_CH1_CTL_MASK
  107298. C_FREQ_DIV_CH1_CTL_MASK_SFT
  107299. C_FREQ_DIV_CH1_CTL_SFT
  107300. C_FREQ_DIV_CH2_CTL_MASK
  107301. C_FREQ_DIV_CH2_CTL_MASK_SFT
  107302. C_FREQ_DIV_CH2_CTL_SFT
  107303. C_FS_SENDING
  107304. C_FS_SWFLOW
  107305. C_FS_TXIDLE
  107306. C_FW_OWN_REQ_CLR
  107307. C_FW_OWN_REQ_SET
  107308. C_GID
  107309. C_HOST_STATE
  107310. C_HUB_LOCAL_POWER
  107311. C_HUB_OVER_CURRENT
  107312. C_HUPCL
  107313. C_IBSS_ELEMENT_ID
  107314. C_IBSS_ELEMENT_LENGTH
  107315. C_INDIC
  107316. C_INDICATOR
  107317. C_INO
  107318. C_INT_CLR_CTRL
  107319. C_INT_EN_CLR
  107320. C_INT_EN_SET
  107321. C_IN_DISABLE
  107322. C_IN_FR_ERROR
  107323. C_IN_ICHAR
  107324. C_IN_IOCTLW
  107325. C_IN_MCTS
  107326. C_IN_MDCD
  107327. C_IN_MDSR
  107328. C_IN_MRI
  107329. C_IN_MRTS
  107330. C_IN_OVR_ERROR
  107331. C_IN_PR_ERROR
  107332. C_IN_RXBRK
  107333. C_IN_RXHIWM
  107334. C_IN_RXNNDT
  107335. C_IN_RXOFL
  107336. C_IN_TXBEMPTY
  107337. C_IN_TXLOWWM
  107338. C_IRQ0
  107339. C_IRQ1
  107340. C_IRQ2
  107341. C_IRQ3
  107342. C_IRQ4
  107343. C_IRQ5
  107344. C_JAPAN_CALL_SIGN_ELEMENT_ID
  107345. C_JAPAN_CALL_SIGN_ELEMENT_LNGTH
  107346. C_JUMP_TABLE_SECTION
  107347. C_LA_TRIGGERED
  107348. C_LEDS
  107349. C_LIMIT_BOT
  107350. C_LIMIT_BOT_MASK
  107351. C_LIMIT_TOP
  107352. C_LIMIT_TOP_MASK
  107353. C_LK
  107354. C_LK_MASK
  107355. C_LNK_NEGOTIATION
  107356. C_LOOP_BACK_MODE_CTL_MASK
  107357. C_LOOP_BACK_MODE_CTL_MASK_SFT
  107358. C_LOOP_BACK_MODE_CTL_SFT
  107359. C_MAGIC
  107360. C_MAJ
  107361. C_MASK
  107362. C_MAX_NAME
  107363. C_MEM_IDATA
  107364. C_MEM_PROG
  107365. C_MEM_SFR
  107366. C_MEM_XDATA
  107367. C_MIN
  107368. C_MISC_CSR_PARITY_ERR
  107369. C_MISC_CSR_READ_BAD_ADDR_ERR
  107370. C_MISC_CSR_WRITE_BAD_ADDR_ERR
  107371. C_MISC_EFUSE_CSR_PARITY_ERR
  107372. C_MISC_EFUSE_DONE_PARITY_ERR
  107373. C_MISC_EFUSE_READ_BAD_ADDR_ERR
  107374. C_MISC_EFUSE_WRITE_ERR
  107375. C_MISC_FW_AUTH_FAILED_ERR
  107376. C_MISC_INVALID_EEP_CMD_ERR
  107377. C_MISC_KEY_MISMATCH_ERR
  107378. C_MISC_MBIST_FAIL_ERR
  107379. C_MISC_PLL_LOCK_FAIL_ERR
  107380. C_MISC_SBUS_WRITE_FAILED_ERR
  107381. C_MODE
  107382. C_MTIME
  107383. C_MUTE_SW_CTL_MASK
  107384. C_MUTE_SW_CTL_MASK_SFT
  107385. C_MUTE_SW_CTL_SFT
  107386. C_M_READ
  107387. C_M_WRITE
  107388. C_NAMESIZE
  107389. C_NETWORK_FAILURE
  107390. C_NEW_RNG
  107391. C_NFIELDS
  107392. C_NLINK
  107393. C_NUM_SUPPORTED_RATES
  107394. C_N_ESTIMATOR_CTRL_REG
  107395. C_N_ESTIMATOR_LEVEL_REG_H
  107396. C_N_ESTIMATOR_LEVEL_REG_L
  107397. C_N_ESTIMATOR_THRSHLD_REG
  107398. C_OS_LINUX
  107399. C_O_CREAT
  107400. C_O_EXCL
  107401. C_O_READ
  107402. C_O_TRUNC
  107403. C_O_WRITE
  107404. C_PAGES
  107405. C_PARENB
  107406. C_PARODD
  107407. C_PAUSED_SYNC_S
  107408. C_PAUSED_SYNC_T
  107409. C_PCIC_CPL_DAT_Q_COR_ERR
  107410. C_PCIC_CPL_DAT_Q_UNC_ERR
  107411. C_PCIC_CPL_HD_Q_COR_ERR
  107412. C_PCIC_CPL_HD_Q_UNC_ERR
  107413. C_PCIC_N_POST_DAT_Q_PARITY_ERR
  107414. C_PCIC_N_POST_H_Q_PARITY_ERR
  107415. C_PCIC_POST_DAT_Q_COR_ERR
  107416. C_PCIC_POST_DAT_Q_UNC_ERR
  107417. C_PCIC_POST_HD_Q_COR_ERR
  107418. C_PCIC_POST_HD_Q_UNC_ERR
  107419. C_PCIC_RECEIVE_PARITY_ERR
  107420. C_PCIC_RETRY_MEM_COR_ERR
  107421. C_PCIC_RETRY_MEM_UNC_ERR
  107422. C_PCIC_RETRY_SOT_MEM_COR_ERR
  107423. C_PCIC_RETRY_SOT_MEM_UNC_ERR
  107424. C_PCIC_TRANSMIT_BACK_PARITY_ERR
  107425. C_PCIC_TRANSMIT_FRONT_PARITY_ERR
  107426. C_PCIE_DATA__PCIE_DATA_MASK
  107427. C_PCIE_DATA__PCIE_DATA__SHIFT
  107428. C_PCIE_INDEX__PCIE_INDEX_MASK
  107429. C_PCIE_INDEX__PCIE_INDEX__SHIFT
  107430. C_PCIE_P_DATA__PCIE_DATA_MASK
  107431. C_PCIE_P_DATA__PCIE_DATA__SHIFT
  107432. C_PCIE_P_INDEX__PCIE_INDEX_MASK
  107433. C_PCIE_P_INDEX__PCIE_INDEX__SHIFT
  107434. C_PDN
  107435. C_PHY_CALIBRATION
  107436. C_PIO_BLOCK_QW_COUNT_PARITY_ERR
  107437. C_PIO_CREDIT_RET_FIFO_PARITY_ERR
  107438. C_PIO_CSR_PARITY_ERR
  107439. C_PIO_CURRENT_FREE_CNT_PARITY_ERR
  107440. C_PIO_DISALLOWED_PACKET_ERR
  107441. C_PIO_HOST_ADDR_MEM_COR_ERR
  107442. C_PIO_HOST_ADDR_MEM_UNC_ERR
  107443. C_PIO_INCONSISTENT_SOP_ERR
  107444. C_PIO_INIT_SM_IN_ERR
  107445. C_PIO_LAST_RETURNED_CNT_PARITY_ERR
  107446. C_PIO_PCC_FIFO_PARITY_ERR
  107447. C_PIO_PCC_SOP_HEAD_PARITY_ERR
  107448. C_PIO_PEC_FIFO_PARITY_ERR
  107449. C_PIO_PEC_SOP_HEAD_PARITY_ERR
  107450. C_PIO_PKT_EVICT_FIFO_PARITY_ERR
  107451. C_PIO_PKT_EVICT_SM_OR_ARM_SM_ERR
  107452. C_PIO_PPMC_BQC_MEM_PARITY_ERR
  107453. C_PIO_PPMC_PBL_FIFO_ERR
  107454. C_PIO_PPMC_SOP_LEN_ERR
  107455. C_PIO_RSVD_30_ERR
  107456. C_PIO_RSVD_31_ERR
  107457. C_PIO_SBRDCTL_CRREL_PARITY_ERR
  107458. C_PIO_SBRDCTRL_CRREL_FIFO_PARITY_ERR
  107459. C_PIO_SB_MEM_FIFO0_ERR
  107460. C_PIO_SB_MEM_FIFO1_ERR
  107461. C_PIO_SM_PKT_RESET_PARITY_ERR
  107462. C_PIO_STATE_MACHINE_ERR
  107463. C_PIO_V1_LEN_MEM_BANK0_COR_ERR
  107464. C_PIO_V1_LEN_MEM_BANK0_UNC_ERR
  107465. C_PIO_V1_LEN_MEM_BANK1_COR_ERR
  107466. C_PIO_V1_LEN_MEM_BANK1_UNC_ERR
  107467. C_PIO_VLF_SOP_PARITY_ERR
  107468. C_PIO_VLF_V1_LEN_PARITY_ERR
  107469. C_PIO_VL_FIFO_PARITY_ERR
  107470. C_PIO_WRITE_ADDR_PARITY_ERR
  107471. C_PIO_WRITE_BAD_CTXT_ERR
  107472. C_PIO_WRITE_CROSSES_BOUNDARY_ERR
  107473. C_PIO_WRITE_DATA_PARITY_ERR
  107474. C_PIO_WRITE_OUT_OF_BOUNDS_ERR
  107475. C_PIO_WRITE_OVERFLOW_ERR
  107476. C_PIO_WRITE_QW_VALID_PARITY_ERR
  107477. C_POWER_TBL
  107478. C_PROTOCOL_ERROR
  107479. C_PR_DISCARD
  107480. C_PR_EVEN
  107481. C_PR_IGNORE
  107482. C_PR_MARK
  107483. C_PR_NONE
  107484. C_PR_ODD
  107485. C_PR_PARITY
  107486. C_PR_SPACE
  107487. C_PURGE
  107488. C_PWBT
  107489. C_QOS_PARAM
  107490. C_RATE_SCALE
  107491. C_RCV_HDR_OVF_0
  107492. C_RCV_HDR_OVF_1
  107493. C_RCV_HDR_OVF_10
  107494. C_RCV_HDR_OVF_100
  107495. C_RCV_HDR_OVF_101
  107496. C_RCV_HDR_OVF_102
  107497. C_RCV_HDR_OVF_103
  107498. C_RCV_HDR_OVF_104
  107499. C_RCV_HDR_OVF_105
  107500. C_RCV_HDR_OVF_106
  107501. C_RCV_HDR_OVF_107
  107502. C_RCV_HDR_OVF_108
  107503. C_RCV_HDR_OVF_109
  107504. C_RCV_HDR_OVF_11
  107505. C_RCV_HDR_OVF_110
  107506. C_RCV_HDR_OVF_111
  107507. C_RCV_HDR_OVF_112
  107508. C_RCV_HDR_OVF_113
  107509. C_RCV_HDR_OVF_114
  107510. C_RCV_HDR_OVF_115
  107511. C_RCV_HDR_OVF_116
  107512. C_RCV_HDR_OVF_117
  107513. C_RCV_HDR_OVF_118
  107514. C_RCV_HDR_OVF_119
  107515. C_RCV_HDR_OVF_12
  107516. C_RCV_HDR_OVF_120
  107517. C_RCV_HDR_OVF_121
  107518. C_RCV_HDR_OVF_122
  107519. C_RCV_HDR_OVF_123
  107520. C_RCV_HDR_OVF_124
  107521. C_RCV_HDR_OVF_125
  107522. C_RCV_HDR_OVF_126
  107523. C_RCV_HDR_OVF_127
  107524. C_RCV_HDR_OVF_128
  107525. C_RCV_HDR_OVF_129
  107526. C_RCV_HDR_OVF_13
  107527. C_RCV_HDR_OVF_130
  107528. C_RCV_HDR_OVF_131
  107529. C_RCV_HDR_OVF_132
  107530. C_RCV_HDR_OVF_133
  107531. C_RCV_HDR_OVF_134
  107532. C_RCV_HDR_OVF_135
  107533. C_RCV_HDR_OVF_136
  107534. C_RCV_HDR_OVF_137
  107535. C_RCV_HDR_OVF_138
  107536. C_RCV_HDR_OVF_139
  107537. C_RCV_HDR_OVF_14
  107538. C_RCV_HDR_OVF_140
  107539. C_RCV_HDR_OVF_141
  107540. C_RCV_HDR_OVF_142
  107541. C_RCV_HDR_OVF_143
  107542. C_RCV_HDR_OVF_144
  107543. C_RCV_HDR_OVF_145
  107544. C_RCV_HDR_OVF_146
  107545. C_RCV_HDR_OVF_147
  107546. C_RCV_HDR_OVF_148
  107547. C_RCV_HDR_OVF_149
  107548. C_RCV_HDR_OVF_15
  107549. C_RCV_HDR_OVF_150
  107550. C_RCV_HDR_OVF_151
  107551. C_RCV_HDR_OVF_152
  107552. C_RCV_HDR_OVF_153
  107553. C_RCV_HDR_OVF_154
  107554. C_RCV_HDR_OVF_155
  107555. C_RCV_HDR_OVF_156
  107556. C_RCV_HDR_OVF_157
  107557. C_RCV_HDR_OVF_158
  107558. C_RCV_HDR_OVF_159
  107559. C_RCV_HDR_OVF_16
  107560. C_RCV_HDR_OVF_17
  107561. C_RCV_HDR_OVF_18
  107562. C_RCV_HDR_OVF_19
  107563. C_RCV_HDR_OVF_2
  107564. C_RCV_HDR_OVF_20
  107565. C_RCV_HDR_OVF_21
  107566. C_RCV_HDR_OVF_22
  107567. C_RCV_HDR_OVF_23
  107568. C_RCV_HDR_OVF_24
  107569. C_RCV_HDR_OVF_25
  107570. C_RCV_HDR_OVF_26
  107571. C_RCV_HDR_OVF_27
  107572. C_RCV_HDR_OVF_28
  107573. C_RCV_HDR_OVF_29
  107574. C_RCV_HDR_OVF_3
  107575. C_RCV_HDR_OVF_30
  107576. C_RCV_HDR_OVF_31
  107577. C_RCV_HDR_OVF_32
  107578. C_RCV_HDR_OVF_33
  107579. C_RCV_HDR_OVF_34
  107580. C_RCV_HDR_OVF_35
  107581. C_RCV_HDR_OVF_36
  107582. C_RCV_HDR_OVF_37
  107583. C_RCV_HDR_OVF_38
  107584. C_RCV_HDR_OVF_39
  107585. C_RCV_HDR_OVF_4
  107586. C_RCV_HDR_OVF_40
  107587. C_RCV_HDR_OVF_41
  107588. C_RCV_HDR_OVF_42
  107589. C_RCV_HDR_OVF_43
  107590. C_RCV_HDR_OVF_44
  107591. C_RCV_HDR_OVF_45
  107592. C_RCV_HDR_OVF_46
  107593. C_RCV_HDR_OVF_47
  107594. C_RCV_HDR_OVF_48
  107595. C_RCV_HDR_OVF_49
  107596. C_RCV_HDR_OVF_5
  107597. C_RCV_HDR_OVF_50
  107598. C_RCV_HDR_OVF_51
  107599. C_RCV_HDR_OVF_52
  107600. C_RCV_HDR_OVF_53
  107601. C_RCV_HDR_OVF_54
  107602. C_RCV_HDR_OVF_55
  107603. C_RCV_HDR_OVF_56
  107604. C_RCV_HDR_OVF_57
  107605. C_RCV_HDR_OVF_58
  107606. C_RCV_HDR_OVF_59
  107607. C_RCV_HDR_OVF_6
  107608. C_RCV_HDR_OVF_60
  107609. C_RCV_HDR_OVF_61
  107610. C_RCV_HDR_OVF_62
  107611. C_RCV_HDR_OVF_63
  107612. C_RCV_HDR_OVF_64
  107613. C_RCV_HDR_OVF_65
  107614. C_RCV_HDR_OVF_66
  107615. C_RCV_HDR_OVF_67
  107616. C_RCV_HDR_OVF_68
  107617. C_RCV_HDR_OVF_69
  107618. C_RCV_HDR_OVF_7
  107619. C_RCV_HDR_OVF_70
  107620. C_RCV_HDR_OVF_71
  107621. C_RCV_HDR_OVF_72
  107622. C_RCV_HDR_OVF_73
  107623. C_RCV_HDR_OVF_74
  107624. C_RCV_HDR_OVF_75
  107625. C_RCV_HDR_OVF_76
  107626. C_RCV_HDR_OVF_77
  107627. C_RCV_HDR_OVF_78
  107628. C_RCV_HDR_OVF_79
  107629. C_RCV_HDR_OVF_8
  107630. C_RCV_HDR_OVF_80
  107631. C_RCV_HDR_OVF_81
  107632. C_RCV_HDR_OVF_82
  107633. C_RCV_HDR_OVF_83
  107634. C_RCV_HDR_OVF_84
  107635. C_RCV_HDR_OVF_85
  107636. C_RCV_HDR_OVF_86
  107637. C_RCV_HDR_OVF_87
  107638. C_RCV_HDR_OVF_88
  107639. C_RCV_HDR_OVF_89
  107640. C_RCV_HDR_OVF_9
  107641. C_RCV_HDR_OVF_90
  107642. C_RCV_HDR_OVF_91
  107643. C_RCV_HDR_OVF_92
  107644. C_RCV_HDR_OVF_93
  107645. C_RCV_HDR_OVF_94
  107646. C_RCV_HDR_OVF_95
  107647. C_RCV_HDR_OVF_96
  107648. C_RCV_HDR_OVF_97
  107649. C_RCV_HDR_OVF_98
  107650. C_RCV_HDR_OVF_99
  107651. C_RCV_HDR_OVF_FIRST
  107652. C_RCV_HDR_OVF_LAST
  107653. C_RCV_OVF
  107654. C_RCV_TID_FLSMS
  107655. C_READ
  107656. C_REENABLE
  107657. C_REFRESH_STATS
  107658. C_REM_STA
  107659. C_RESET_JUMBO_RNG
  107660. C_RMAJ
  107661. C_RMIN
  107662. C_RS_CTS
  107663. C_RS_DCD
  107664. C_RS_DSR
  107665. C_RS_DTR
  107666. C_RS_PARAM
  107667. C_RS_RI
  107668. C_RS_RTS
  107669. C_RXON
  107670. C_RXON_ASSOC
  107671. C_RXON_TIMING
  107672. C_RX_CSR_PARITY_ERR
  107673. C_RX_CSR_READ_BAD_ADDR_ERR
  107674. C_RX_CSR_WRITE_BAD_ADDR_ERR
  107675. C_RX_CTX_EGRS
  107676. C_RX_DC_INTF_PARITY_ERR
  107677. C_RX_DC_SOP_EOP_PARITY_ERR
  107678. C_RX_DMA_CSR_COR_ERR
  107679. C_RX_DMA_CSR_PARITY_ERR
  107680. C_RX_DMA_CSR_UNC_ERR
  107681. C_RX_DMA_DATA_FIFO_RD_COR_ERR
  107682. C_RX_DMA_DATA_FIFO_RD_UNC_ERR
  107683. C_RX_DMA_DQ_FSM_ENCODING_ERR
  107684. C_RX_DMA_EQ_FSM_ENCODING_ERR
  107685. C_RX_DMA_FLAG_COR_ERR
  107686. C_RX_DMA_FLAG_UNC_ERR
  107687. C_RX_DMA_HDR_FIFO_RD_COR_ERR
  107688. C_RX_DMA_HDR_FIFO_RD_UNC_ERR
  107689. C_RX_EBP
  107690. C_RX_HQ_INTR_CSR_PARITY_ERR
  107691. C_RX_HQ_INTR_FSM_ERR
  107692. C_RX_ICRC_ERR
  107693. C_RX_LEN_ERR
  107694. C_RX_LOOKUP_CSR_PARITY_ERR
  107695. C_RX_LOOKUP_DES_PART1_UNC_COR_ERR
  107696. C_RX_LOOKUP_DES_PART1_UNC_ERR
  107697. C_RX_LOOKUP_DES_PART2_PARITY_ERR
  107698. C_RX_LOOKUP_RCV_ARRAY_COR_ERR
  107699. C_RX_LOOKUP_RCV_ARRAY_UNC_ERR
  107700. C_RX_PKT
  107701. C_RX_RBUF_BAD_LOOKUP_ERR
  107702. C_RX_RBUF_BLOCK_LIST_READ_COR_ERR
  107703. C_RX_RBUF_BLOCK_LIST_READ_UNC_ERR
  107704. C_RX_RBUF_CSR_QEOPDW_PARITY_ERR
  107705. C_RX_RBUF_CSR_Q_ENT_CNT_PARITY_ERR
  107706. C_RX_RBUF_CSR_Q_HD_PTR_PARITY_ERR
  107707. C_RX_RBUF_CSR_Q_HEAD_BUF_NUM_PARITY_ERR
  107708. C_RX_RBUF_CSR_Q_NEXT_BUF_PARITY_ERR
  107709. C_RX_RBUF_CSR_Q_NUM_OF_PKT_PARITY_ERR
  107710. C_RX_RBUF_CSR_Q_T1_PTR_PARITY_ERR
  107711. C_RX_RBUF_CSR_Q_VLD_BIT_PARITY_ERR
  107712. C_RX_RBUF_CTX_ID_PARITY_ERR
  107713. C_RX_RBUF_DATA_COR_ERR
  107714. C_RX_RBUF_DATA_UNC_ERR
  107715. C_RX_RBUF_DESC_PART1_COR_ERR
  107716. C_RX_RBUF_DESC_PART1_UNC_ERR
  107717. C_RX_RBUF_DESC_PART2_COR_ERR
  107718. C_RX_RBUF_DESC_PART2_UNC_ERR
  107719. C_RX_RBUF_EMPTY_ERR
  107720. C_RX_RBUF_FL_INITDONE_PARITY_ERR
  107721. C_RX_RBUF_FL_INIT_WR_ADDR_PARITY_ERR
  107722. C_RX_RBUF_FL_RD_ADDR_PARITY_ERR
  107723. C_RX_RBUF_FL_WRITE_ADDR_PARITY_ERR
  107724. C_RX_RBUF_FREE_LIST_COR_ERR
  107725. C_RX_RBUF_FREE_LIST_UNC_ERR
  107726. C_RX_RBUF_FULL_ERR
  107727. C_RX_RBUF_LOOKUP_DES_COR_ERR
  107728. C_RX_RBUF_LOOKUP_DES_REG_UNC_COR_ERR
  107729. C_RX_RBUF_LOOKUP_DES_REG_UNC_ERR
  107730. C_RX_RBUF_LOOKUP_DES_UNC_ERR
  107731. C_RX_RBUF_NEXT_FREE_BUF_COR_ERR
  107732. C_RX_RBUF_NEXT_FREE_BUF_UNC_ERR
  107733. C_RX_RCV_CSR_PARITY_ERR
  107734. C_RX_RCV_DATA_COR_ERR
  107735. C_RX_RCV_DATA_UNC_ERR
  107736. C_RX_RCV_FSM_ENCODING_ERR
  107737. C_RX_RCV_HDR_COR_ERR
  107738. C_RX_RCV_HDR_UNC_ERR
  107739. C_RX_RCV_QP_MAP_TABLE_COR_ERR
  107740. C_RX_RCV_QP_MAP_TABLE_UNC_ERR
  107741. C_RX_SHORT_ERR
  107742. C_RX_TID_FLGMS
  107743. C_RX_TID_FULL
  107744. C_RX_TID_INVALID
  107745. C_RX_WORDS
  107746. C_SCAN
  107747. C_SCAN_ABORT
  107748. C_SDMA_ASSEMBLY_COR_ERR
  107749. C_SDMA_ASSEMBLY_UNC_ERR
  107750. C_SDMA_CSR_PARITY_ERR
  107751. C_SDMA_DESC_FETCHED_CNT
  107752. C_SDMA_DESC_TABLE_COR_ERR
  107753. C_SDMA_DESC_TABLE_UNC_ERR
  107754. C_SDMA_ERR_CNT
  107755. C_SDMA_FIRST_DESC_ERR
  107756. C_SDMA_GEN_MISMATCH_ERR
  107757. C_SDMA_HALT_ERR
  107758. C_SDMA_HEADER_ADDRESS_ERR
  107759. C_SDMA_HEADER_LENGTH_ERR
  107760. C_SDMA_HEADER_REQUEST_FIFO_COR_ERR
  107761. C_SDMA_HEADER_REQUEST_FIFO_UNC_ERR
  107762. C_SDMA_HEADER_SELECT_ERR
  107763. C_SDMA_HEADER_STORAGE_COR_ERR
  107764. C_SDMA_HEADER_STORAGE_UNC_ERR
  107765. C_SDMA_IDLE_INT_CNT
  107766. C_SDMA_INT_CNT
  107767. C_SDMA_LENGTH_MISMATCH_ERR
  107768. C_SDMA_MEM_READ_ERR
  107769. C_SDMA_PACKET_DESC_OVERFLOW_ERR
  107770. C_SDMA_PACKET_TRACKING_COR_ERR
  107771. C_SDMA_PACKET_TRACKING_UNC_ERR
  107772. C_SDMA_PCIE_REQ_TRACKING_COR_ERR
  107773. C_SDMA_PCIE_REQ_TRACKING_UNC_ERR
  107774. C_SDMA_PROGRESS_INT_CNT
  107775. C_SDMA_RPY_TAG_ERR
  107776. C_SDMA_TAIL_OUT_OF_BOUNDS_ERR
  107777. C_SDMA_TIMEOUT_ERR
  107778. C_SDMA_TOO_LONG_ERR
  107779. C_SDMA_WRONG_DW_ERR
  107780. C_SDM_RESET_CTL_MASK
  107781. C_SDM_RESET_CTL_MASK_SFT
  107782. C_SDM_RESET_CTL_SFT
  107783. C_SEEPROM
  107784. C_SEND_CSR_PARITY_ERR
  107785. C_SEND_CSR_READ_BAD_ADD_ERR
  107786. C_SEND_CSR_WRITE_BAD_ADDR_ERR
  107787. C_SENSITIVITY
  107788. C_SENSITIVITY_CONTROL_DEFAULT_TBL
  107789. C_SENSITIVITY_CONTROL_WORK_TBL
  107790. C_SET_MAC_ADDR
  107791. C_SET_MULTICAST_MODE
  107792. C_SET_PROMISC_MODE
  107793. C_SET_RX_JUMBO_PRD_IDX
  107794. C_SET_RX_PRD_IDX
  107795. C_SGEN_RCH_INV_5BIT_MASK
  107796. C_SGEN_RCH_INV_5BIT_MASK_SFT
  107797. C_SGEN_RCH_INV_5BIT_SFT
  107798. C_SGEN_RCH_INV_8BIT_MASK
  107799. C_SGEN_RCH_INV_8BIT_MASK_SFT
  107800. C_SGEN_RCH_INV_8BIT_SFT
  107801. C_SIFS_A
  107802. C_SIFS_BG
  107803. C_SIGN
  107804. C_SIGPAGE
  107805. C_SINE_MODE_CH1_CTL_MASK
  107806. C_SINE_MODE_CH1_CTL_MASK_SFT
  107807. C_SINE_MODE_CH1_CTL_SFT
  107808. C_SINE_MODE_CH2_CTL_MASK
  107809. C_SINE_MODE_CH2_CTL_MASK_SFT
  107810. C_SINE_MODE_CH2_CTL_SFT
  107811. C_SLOT_LONG
  107812. C_SLOT_SHORT
  107813. C_SMDA_RESERVED_9
  107814. C_SPECTRUM_MEASUREMENT
  107815. C_STANDALONE
  107816. C_STARTING_SYNC_S
  107817. C_STARTING_SYNC_T
  107818. C_STARTUP
  107819. C_START_FW
  107820. C_STATS
  107821. C_SUPPORTED_RATES_ELEMENT_ID
  107822. C_SUPPORTED_RATES_ELEMENT_LENGTH
  107823. C_SW0
  107824. C_SW1
  107825. C_SW_CPU_INTR
  107826. C_SW_CPU_RCV_LIM
  107827. C_SW_CPU_RC_ACKS
  107828. C_SW_CPU_RC_DELAYED_COMP
  107829. C_SW_CPU_RC_QACKS
  107830. C_SW_CTX0_SEQ_DROP
  107831. C_SW_IBP_DMA_WAIT
  107832. C_SW_IBP_LOOP_PKTS
  107833. C_SW_IBP_OTHER_NAKS
  107834. C_SW_IBP_PKT_DROPS
  107835. C_SW_IBP_RC_CRWAITS
  107836. C_SW_IBP_RC_DUPREQ
  107837. C_SW_IBP_RC_RESENDS
  107838. C_SW_IBP_RC_SEQNAK
  107839. C_SW_IBP_RC_TIMEOUTS
  107840. C_SW_IBP_RDMA_SEQ
  107841. C_SW_IBP_RNR_NAKS
  107842. C_SW_IBP_SEQ_NAK
  107843. C_SW_IBP_UNALIGNED
  107844. C_SW_KMEM_WAIT
  107845. C_SW_LINK_DOWN
  107846. C_SW_LINK_UP
  107847. C_SW_PIO_DRAIN
  107848. C_SW_PIO_WAIT
  107849. C_SW_RCV_CSTR_ERR
  107850. C_SW_SEND_SCHED
  107851. C_SW_TID_WAIT
  107852. C_SW_UNKNOWN_FRAME
  107853. C_SW_VTX_WAIT
  107854. C_SW_XMIT_CSTR_ERR
  107855. C_SW_XMIT_DSCD
  107856. C_SW_XMIT_DSCD_VL
  107857. C_SYNC_SOURCE
  107858. C_SYNC_TARGET
  107859. C_TEAR_DOWN
  107860. C_TI
  107861. C_TIMEOUT
  107862. C_TIM_BITMAP_LENGTH
  107863. C_TIM_BMCAST_BIT
  107864. C_TIM_ELEMENT_ID
  107865. C_TWO_DIGITAL_MIC_CTL_MASK
  107866. C_TWO_DIGITAL_MIC_CTL_MASK_SFT
  107867. C_TWO_DIGITAL_MIC_CTL_SFT
  107868. C_TX
  107869. C_TX_BEACON
  107870. C_TX_CONFIG_PARITY_ERR
  107871. C_TX_CREDIT_OVERRUN_ERR
  107872. C_TX_CREDIT_RETURN_PARITY_ERR
  107873. C_TX_CREDIT_RETURN_VL_ERR
  107874. C_TX_DROPPED
  107875. C_TX_EGRESS_FIFI_UNC_ERR
  107876. C_TX_EGRESS_FIFO_COR_ERR
  107877. C_TX_EGRESS_FIFO_UNDERRUN_OR_PARITY_ERR
  107878. C_TX_FLIT_VL
  107879. C_TX_FLOW_STALL
  107880. C_TX_HCRC_INSERTION_ERR
  107881. C_TX_HDR_ERR
  107882. C_TX_ILLEGAL_CL_ERR
  107883. C_TX_INCORRECT_LINK_STATE_ERR
  107884. C_TX_INVAL_LEN
  107885. C_TX_LAUNCH_CSR_PARITY_ERR
  107886. C_TX_LAUNCH_FIFO0_COR_ERR
  107887. C_TX_LAUNCH_FIFO0_UNC_OR_PARITY_ERR
  107888. C_TX_LAUNCH_FIFO1_COR_ERR
  107889. C_TX_LAUNCH_FIFO1_UNC_OR_PARITY_ERR
  107890. C_TX_LAUNCH_FIFO2_COR_ERR
  107891. C_TX_LAUNCH_FIFO2_UNC_OR_PARITY_ERR
  107892. C_TX_LAUNCH_FIFO3_COR_ERR
  107893. C_TX_LAUNCH_FIFO3_UNC_OR_PARITY_ERR
  107894. C_TX_LAUNCH_FIFO4_COR_ERR
  107895. C_TX_LAUNCH_FIFO4_UNC_OR_PARITY_ERR
  107896. C_TX_LAUNCH_FIFO5_COR_ERR
  107897. C_TX_LAUNCH_FIFO5_UNC_OR_PARITY_ERR
  107898. C_TX_LAUNCH_FIFO6_COR_ERR
  107899. C_TX_LAUNCH_FIFO6_UNC_OR_PARITY_ERR
  107900. C_TX_LAUNCH_FIFO7_COR_ERR
  107901. C_TX_LAUNCH_FIFO7_UNC_OR_PARITY_ERR
  107902. C_TX_LAUNCH_FIFO8_COR_ERR
  107903. C_TX_LAUNCH_FIFO8_UNC_OR_PARITY_ERR
  107904. C_TX_LINK_DOWN_ERR
  107905. C_TX_LINK_QUALITY_CMD
  107906. C_TX_MM_LEN_ERR
  107907. C_TX_PIO_LAUNCH_INTF_PARITY_ERR
  107908. C_TX_PKT
  107909. C_TX_PKT_INTEGRITY_MEM_COR_ERR
  107910. C_TX_PKT_INTEGRITY_MEM_UNC_ERR
  107911. C_TX_PKT_VL
  107912. C_TX_PWR_TBL
  107913. C_TX_READ_PIO_MEMORY_COR_ERR
  107914. C_TX_READ_PIO_MEMORY_CSR_UNC_ERR
  107915. C_TX_READ_PIO_MEMORY_UNC_ERR
  107916. C_TX_READ_SDMA_MEMORY_COR_ERR
  107917. C_TX_READ_SDMA_MEMORY_CSR_UNC_ERR
  107918. C_TX_READ_SDMA_MEMORY_UNC_ERR
  107919. C_TX_RESERVED_10
  107920. C_TX_RESERVED_2
  107921. C_TX_RESERVED_6
  107922. C_TX_RESERVED_9
  107923. C_TX_SBRD_CTL_CSR_PARITY_ERR
  107924. C_TX_SBRD_CTL_STATE_MACHINE_PARITY_ERR
  107925. C_TX_SB_HDR_COR_ERR
  107926. C_TX_SB_HDR_UNC_ERR
  107927. C_TX_SDMA0_DISALLOWED_PACKET_ERR
  107928. C_TX_SDMA10_DISALLOWED_PACKET_ERR
  107929. C_TX_SDMA11_DISALLOWED_PACKET_ERR
  107930. C_TX_SDMA12_DISALLOWED_PACKET_ERR
  107931. C_TX_SDMA13_DISALLOWED_PACKET_ERR
  107932. C_TX_SDMA14_DISALLOWED_PACKET_ERR
  107933. C_TX_SDMA15_DISALLOWED_PACKET_ERR
  107934. C_TX_SDMA1_DISALLOWED_PACKET_ERR
  107935. C_TX_SDMA2_DISALLOWED_PACKET_ERR
  107936. C_TX_SDMA3_DISALLOWED_PACKET_ERR
  107937. C_TX_SDMA4_DISALLOWED_PACKET_ERR
  107938. C_TX_SDMA5_DISALLOWED_PACKET_ERR
  107939. C_TX_SDMA6_DISALLOWED_PACKET_ERR
  107940. C_TX_SDMA7_DISALLOWED_PACKET_ERR
  107941. C_TX_SDMA8_DISALLOWED_PACKET_ERR
  107942. C_TX_SDMA9_DISALLOWED_PACKET_ERR
  107943. C_TX_SDMA_LAUNCH_INTF_PARITY_ERR
  107944. C_TX_UNDERRUN
  107945. C_TX_UNSUP_VL
  107946. C_TX_WAIT
  107947. C_TX_WAIT_VL
  107948. C_TX_WORDS
  107949. C_TYPE_FIELDS_READONLY
  107950. C_UID
  107951. C_UNCONNECTED
  107952. C_UNKNOWN_CHIP
  107953. C_UPDATE_STATS
  107954. C_UPD_STAT
  107955. C_VAL
  107956. C_VATTR
  107957. C_VBAD
  107958. C_VBLK
  107959. C_VCHR
  107960. C_VDIR
  107961. C_VDSO
  107962. C_VECTORS
  107963. C_VERIFY_S
  107964. C_VERIFY_T
  107965. C_VFIFO
  107966. C_VLNK
  107967. C_VL_0
  107968. C_VL_1
  107969. C_VL_15
  107970. C_VL_2
  107971. C_VL_3
  107972. C_VL_4
  107973. C_VL_5
  107974. C_VL_6
  107975. C_VL_7
  107976. C_VL_COUNT
  107977. C_VNON
  107978. C_VREG
  107979. C_VSOCK
  107980. C_VVAR
  107981. C_WATCHDOG
  107982. C_WD33C93
  107983. C_WD33C93A
  107984. C_WD33C93B
  107985. C_WEPKEY
  107986. C_WF_BITMAP_S
  107987. C_WF_BITMAP_T
  107988. C_WF_CONNECTION
  107989. C_WF_REPORT_PARAMS
  107990. C_WF_SYNC_UUID
  107991. C_WRITE
  107992. C_c0000000
  107993. C_fffffffe
  107994. C_ffffffff
  107995. CabADAC
  107996. CacheAlign16
  107997. CacheAllocBase
  107998. CacheAllocLimit
  107999. CacheClass
  108000. CacheError
  108001. CacheLockingException
  108002. CacheOp_Cache
  108003. CacheOp_Op
  108004. Cache_Barrier
  108005. Cache_D
  108006. Cache_I
  108007. Cache_S
  108008. Cache_SD
  108009. Cache_SI
  108010. Cache_T
  108011. Cache_V
  108012. CalcCalPLL
  108013. CalcMainPLL
  108014. CalcNTLMv2_response
  108015. CalcRFFilterCurve
  108016. CalcStateExt
  108017. CalcVClock
  108018. CalcVClock2Stage
  108019. Calculate256BBlockSizes
  108020. CalculateActiveRowBandwidth
  108021. CalculateDCCConfiguration
  108022. CalculateDCFCLKDeepSleep
  108023. CalculateDETBufferSize
  108024. CalculateDelayAfterScaler
  108025. CalculateExtraLatency
  108026. CalculateFlipSchedule
  108027. CalculateMetaAndPTETimes
  108028. CalculateMinAndMaxPrefetchMode
  108029. CalculatePixelDeliveryTimes
  108030. CalculatePrefetchSchedule
  108031. CalculatePrefetchSourceLines
  108032. CalculateRemoteSurfaceFlipDelay
  108033. CalculateTWait
  108034. CalculateUrgentBurstFactor
  108035. CalculateVMAndRowBytes
  108036. CalculateWatermarksAndDRAMSpeedChangeSupport
  108037. CalculateWriteBackDISPCLK
  108038. CalculateWriteBackDelay
  108039. CalibrateRF
  108040. CallProceeding_UUIE
  108041. CallProceeding_UUIE_fastStart
  108042. CamAddr
  108043. CamCon
  108044. CamMask
  108045. CamResetAllEntry
  108046. CamRestoreAllEntry
  108047. CanHaveMII
  108048. Candidate
  108049. CapBusMaster
  108050. CapPwrMgmt
  108051. CapabilityRid
  108052. CapiAlertAlreadySent
  108053. CapiB1ProtocolNotSupported
  108054. CapiB1ProtocolParameterNotSupported
  108055. CapiB2ProtocolNotSupported
  108056. CapiB2ProtocolParameterNotSupported
  108057. CapiB3ProtocolNotSupported
  108058. CapiB3ProtocolParameterNotSupported
  108059. CapiBProtocolCombinationNotSupported
  108060. CapiCallGivenToOtherApplication
  108061. CapiCipValueUnknown
  108062. CapiDataLengthNotSupportedByCurrentProtocol
  108063. CapiFacilityNotSupported
  108064. CapiFacilitySpecificFunctionNotSupported
  108065. CapiFlagsNotSupported
  108066. CapiFlagsNotSupportedByProtocol
  108067. CapiIllContrPlciNcci
  108068. CapiIllMessageParmCoding
  108069. CapiMessageNotSupportedInCurrentState
  108070. CapiNcpiNotSupported
  108071. CapiNcpiNotSupportedByProtocol
  108072. CapiNoFaxResourcesAvailable
  108073. CapiNoListenResourcesAvailable
  108074. CapiNoNcciAvailable
  108075. CapiNoPlciAvailable
  108076. CapiProtocolErrorLayer1
  108077. CapiProtocolErrorLayer2
  108078. CapiProtocolErrorLayer3
  108079. CapiRequestNotAllowedInThisState
  108080. CapiResetProcedureNotSupportedByCurrentProtocol
  108081. CapiSuccess
  108082. CapiSupplementaryServiceNotSupported
  108083. CapiTeiAssignmentFailed
  108084. CapiTimeOut
  108085. CardDisableRTL8188EU
  108086. CardDisableRTL8723BSdio
  108087. CardEnable
  108088. CardState
  108089. Card_model_no
  108090. CarrierSenseErrors
  108091. CbYCrY10101010_422_PACKED
  108092. CbYCrY12121212_422_PACKED
  108093. CbYCrY8888_422_PACKED
  108094. Cbit
  108095. CdramMemType
  108096. Cfg0_Anaoff
  108097. Cfg0_LDPS
  108098. Cfg0_Reset
  108099. Cfg1_Driver_Load
  108100. Cfg1_EarlyRx
  108101. Cfg1_EarlyTx
  108102. Cfg1_LED0
  108103. Cfg1_LED1
  108104. Cfg1_MMIO
  108105. Cfg1_PIO
  108106. Cfg1_PM_Enable
  108107. Cfg1_Rcv128K
  108108. Cfg1_Rcv16K
  108109. Cfg1_Rcv32K
  108110. Cfg1_Rcv64K
  108111. Cfg1_Rcv8K
  108112. Cfg1_VPD_Enable
  108113. Cfg3_CLKRUN_En
  108114. Cfg3_CardB_En
  108115. Cfg3_FBtBEn
  108116. Cfg3_FuncRegEn
  108117. Cfg3_GNTSel
  108118. Cfg3_LinkUp
  108119. Cfg3_Magic
  108120. Cfg3_PARM_En
  108121. Cfg5_BWF
  108122. Cfg5_FIFOAddrPtr
  108123. Cfg5_LANWake
  108124. Cfg5_LDPS
  108125. Cfg5_MWF
  108126. Cfg5_PME_STS
  108127. Cfg5_UWF
  108128. Cfg9346
  108129. Cfg9346Bits
  108130. Cfg9346_Lock
  108131. Cfg9346_Unlock
  108132. CfgAneg100
  108133. CfgAnegDone
  108134. CfgAnegEnable
  108135. CfgAnegFull
  108136. CfgExtPhy
  108137. CfgFullDuplex
  108138. CfgLink
  108139. CfgPhyDis
  108140. CfgPhyRst
  108141. CfgSpeed100
  108142. CfgTable
  108143. Ch
  108144. ChangePIDs
  108145. ChannelConfiguration
  108146. ChannelPlan
  108147. Charx8Dot
  108148. CheckFwRsvdPageContent
  108149. CheckIPSStatus
  108150. CheckIsMoxaMust
  108151. CheckNegative
  108152. CheckPerm
  108153. CheckPositive
  108154. CheckRevision
  108155. CheckSourceAddress
  108156. CheckWinDos
  108157. Checksum
  108158. ChipCaps
  108159. ChipCmd
  108160. ChipCmd1
  108161. ChipCmdBits
  108162. ChipCmdClear
  108163. ChipCmd_bits
  108164. ChipConfig
  108165. ChipConfig_bits
  108166. ChipReset
  108167. ChipRev
  108168. ChipSelect
  108169. ChipVersion
  108170. ChnlAccessSetting
  108171. CifsExiting
  108172. CifsGood
  108173. CifsNeedNegotiate
  108174. CifsNeedReconnect
  108175. CifsNew
  108176. Ck
  108177. Cld_Check
  108178. Cld_Create
  108179. Cld_GetVersion
  108180. Cld_GraceDone
  108181. Cld_GraceStart
  108182. Cld_Remove
  108183. ClearArchiveBit
  108184. ClearBitInDWord
  108185. ClearBitInWord
  108186. ClearBitMasks
  108187. ClearEngineCompletePtr
  108188. ClearErrors
  108189. ClearFaults
  108190. ClearFrDs
  108191. ClearHubFeature
  108192. ClearInterrupt
  108193. ClearMData
  108194. ClearMFrag
  108195. ClearPageCompound
  108196. ClearPageDcacheDirty
  108197. ClearPageDoubleMap
  108198. ClearPageFsCache
  108199. ClearPageHugeObject
  108200. ClearPageHugeTemporary
  108201. ClearPageSlabPfmemalloc
  108202. ClearPortFeature
  108203. ClearPrivacy
  108204. ClearPwrMgt
  108205. ClearRetry
  108206. ClearRxOvrun
  108207. ClearTTBuffer
  108208. ClearToDs
  108209. ClearTxFIFO
  108210. Clear_GPIO_Bit
  108211. Clear_all_flags
  108212. Clear_excp_register
  108213. Clear_tbit
  108214. Clipctrl_Hskip
  108215. Clipctrl_Vskip
  108216. Clk
  108217. ClkBit
  108218. ClkReqEn
  108219. ClkRun
  108220. ClkRun_bits
  108221. ClockControl
  108222. ClockHigh
  108223. ClockInfoArray
  108224. ClockLow
  108225. ClockSourceIndex
  108226. ClockSourceType
  108227. ClusterRemove
  108228. CmaskAddr
  108229. CmaskCode
  108230. CmaskMode
  108231. Cmd
  108232. Cmd1EarlyRx
  108233. Cmd1EarlyTx
  108234. Cmd1FDuplex
  108235. Cmd1NoTxPoll
  108236. Cmd1Reset
  108237. Cmd1TxDemand
  108238. Cmd9346CR_9356SEL
  108239. CmdBufferDescriptor_t
  108240. CmdBusy
  108241. CmdConfigure
  108242. CmdDiagnose
  108243. CmdDump
  108244. CmdEEPROM_En
  108245. CmdEERPOMSEL
  108246. CmdID_BBRegWrite10
  108247. CmdID_End
  108248. CmdID_RF_WriteReg
  108249. CmdID_SetTxPowerLevel
  108250. CmdID_WritePortUchar
  108251. CmdID_WritePortUlong
  108252. CmdID_WritePortUshort
  108253. CmdInProgress
  108254. CmdInit
  108255. CmdMulticastList
  108256. CmdNOp
  108257. CmdQueLen
  108258. CmdReset
  108259. CmdRxDemand
  108260. CmdRxEnb
  108261. CmdRxOn
  108262. CmdSASetup
  108263. CmdStart
  108264. CmdStop
  108265. CmdTDR
  108266. CmdTx
  108267. CmdTxEnb
  108268. CmdTxOn
  108269. CnINT2MSKCR0
  108270. CnINT2MSKCR1
  108271. CnINT2MSKCR2
  108272. CnINT2MSKCR3
  108273. CnINT2MSKR0
  108274. CnINT2MSKR1
  108275. CnINT2MSKR2
  108276. CnINT2MSKR3
  108277. CnINTMSK0
  108278. CnINTMSK1
  108279. CnINTMSKCLR0
  108280. CnINTMSKCLR1
  108281. Cnfg
  108282. CntFull
  108283. CodaFid
  108284. Code
  108285. ColCountMask
  108286. Collect
  108287. ColorArray
  108288. ColorFormat
  108289. ColorFormatBSWAP
  108290. ColorFormatBTYUV
  108291. ColorFormatEvenMask
  108292. ColorFormatGamma
  108293. ColorFormatOddMask
  108294. ColorFormatPL411
  108295. ColorFormatPL422
  108296. ColorFormatRAW
  108297. ColorFormatRGB15
  108298. ColorFormatRGB16
  108299. ColorFormatRGB24
  108300. ColorFormatRGB32
  108301. ColorFormatRGB8
  108302. ColorFormatWSWAP
  108303. ColorFormatY8
  108304. ColorFormatYUV12
  108305. ColorFormatYUV9
  108306. ColorFormatYUY2
  108307. ColorTransform
  108308. ColorimetryRGBDP
  108309. ColorimetryRGB_DP_AdobeRGB
  108310. ColorimetryRGB_DP_CustomColorProfile
  108311. ColorimetryRGB_DP_ITU_R_BT2020RGB
  108312. ColorimetryRGB_DP_P3
  108313. ColorimetryRGB_DP_sRGB
  108314. ColorimetryYCCDP
  108315. ColorimetryYCC_DP_AdobeYCC
  108316. ColorimetryYCC_DP_ITU2020YCC
  108317. ColorimetryYCC_DP_ITU2020YCbCr
  108318. ColorimetryYCC_DP_ITU601
  108319. ColorimetryYCC_DP_ITU709
  108320. CombFunc
  108321. Command
  108322. CommandBits
  108323. CommandControlBlock
  108324. CommandList
  108325. CommandListHeader
  108326. Command_Entry
  108327. Comment_state
  108328. Commit
  108329. CommonQueueMode
  108330. CompareFrag
  108331. CompareRef
  108332. CompassionateData
  108333. CompletionHiAddr
  108334. CompletionQ
  108335. CompletionQConsumerIdx
  108336. ComponentVideoInfo
  108337. CompressAlgorithm
  108338. ConXS_BCR
  108339. ConXS_BCR_CF_BUF_EN
  108340. ConXS_BCR_CF_RESET
  108341. ConXS_BCR_L_DISP
  108342. ConXS_BCR_S0_POW_EN0
  108343. ConXS_BCR_S0_POW_EN1
  108344. ConXS_BCR_S0_VCC_3V3
  108345. ConXS_BCR_S0_VCC_5V0
  108346. ConXS_BCR_S0_VPP_12V
  108347. ConXS_BCR_S0_VPP_3V3
  108348. ConXS_CFSR
  108349. ConXS_CFSR_BVD1
  108350. ConXS_CFSR_BVD2
  108351. ConXS_CFSR_BVD_MASK
  108352. ConXS_CFSR_VS1
  108353. ConXS_CFSR_VS2
  108354. ConXS_CFSR_VS_3V3
  108355. ConXS_CFSR_VS_5V
  108356. ConXS_CFSR_VS_MASK
  108357. ConXS_DCR
  108358. ConXS_IRCR
  108359. ConXS_IRCR_MODE
  108360. ConXS_IRCR_SD
  108361. ConfPort1
  108362. ConfPort2
  108363. Config0
  108364. Config0Bits
  108365. Config1
  108366. Config1Bits
  108367. Config1Clear
  108368. Config1_Reg
  108369. Config2
  108370. Config2_Reg
  108371. Config3
  108372. Config3Bits
  108373. Config4
  108374. Config4Bits
  108375. Config5
  108376. Config5Bits
  108377. ConfigA
  108378. ConfigB
  108379. ConfigC
  108380. ConfigD
  108381. ConfigDev
  108382. ConfigExtendedPageHeader_t
  108383. ConfigItem
  108384. ConfigLineEdit
  108385. ConfigMainWindow
  108386. ConfigPageHeaderUnion
  108387. ConfigPageHeader_t
  108388. ConfigPageIoc2RaidVol_t
  108389. ConfigReply_t
  108390. ConfigRid
  108391. ConfigSettings
  108392. ConfigView
  108393. Config_base
  108394. Config_t
  108395. ConfigureI2CBridge
  108396. ConfigureMPEGOutput
  108397. ConfigureTxpowerTrack
  108398. ConfigureTxpowerTrack_8723B
  108399. Connect_UUIE
  108400. Connect_UUIE_fastStart
  108401. Connected
  108402. ConservativeZExport
  108403. ConsoleIn
  108404. ConsoleOut
  108405. Const
  108406. Const_
  108407. Const__
  108408. ConstructARPResponse
  108409. ConstructBeacon
  108410. ConstructBtNullFunctionData
  108411. ConstructGTKResponse
  108412. ConstructNullFunctionData
  108413. ConstructPSPoll
  108414. ConstructPnoInfo
  108415. ConstructProbeReq
  108416. ConstructProbeRsp
  108417. ConstructSSIDList
  108418. ConstructScanInfo
  108419. ContainerCommand
  108420. ContainerCommand64
  108421. ContainerRawIo
  108422. ContainerRawIo2
  108423. Continuation_Entry
  108424. Control_reg
  108425. ControllerClass
  108426. ConvertBackToInteger
  108427. ConvertToFraction
  108428. Convert_ULONG_ToFraction
  108429. CopyFile
  108430. Copyright
  108431. Core_Pll_M
  108432. Core_Pll_N
  108433. Core_Pll_P
  108434. CorrectSysClockDeviation
  108435. CountDown
  108436. Counter
  108437. CounterAddrHigh
  108438. CounterAddrLow
  108439. CounterDump
  108440. CounterReset
  108441. CountryCode
  108442. CovToShaderSel
  108443. CpCmd
  108444. CpRxOn
  108445. CpTxOn
  108446. Cpu
  108447. CrYCbA1010102
  108448. CrYCbA16161616_10LSB
  108449. CrYCbA16161616_10MSB
  108450. CrYCbA16161616_12LSB
  108451. CrYCbA16161616_12MSB
  108452. CrYCbA8888
  108453. CrYCbY10101010_422_PACKED
  108454. CrYCbY12121212_422_PACKED
  108455. CrYCbY8888_422_PACKED
  108456. CrashCounter
  108457. CrazyCache
  108458. Crc
  108459. Create
  108460. CreateOSDWindow
  108461. CreateOverlaySurface
  108462. Create_Dirty_Excl_D
  108463. Create_Dirty_Excl_SD
  108464. CreativePCCam300
  108465. CreativeVista
  108466. Creative_live_motion
  108467. CtCommandResponse
  108468. CtRevisionId
  108469. CtrlInfo
  108470. Ctrl_HNibRead
  108471. Ctrl_HNibWrite
  108472. Ctrl_IRQEN
  108473. Ctrl_LNibRead
  108474. Ctrl_LNibWrite
  108475. Ctrl_SelData
  108476. CurCount
  108477. CurRxBufAddr
  108478. CurRxDescAddr
  108479. CurTxBufAddr
  108480. CurTxDescAddr
  108481. CurrentEL_EL1
  108482. CurrentEL_EL2
  108483. Current_Tx_Rate_Reg
  108484. CursorBG1
  108485. CursorBG2
  108486. CursorBG3
  108487. CursorBG4
  108488. CursorBppEnumToBits
  108489. CursorControl
  108490. CursorFG1
  108491. CursorFG2
  108492. CursorFG3
  108493. CursorFG4
  108494. CursorLocHigh
  108495. CursorLocLow
  108496. CursorXHigh
  108497. CursorXLow
  108498. CursorXOffset
  108499. CursorYHigh
  108500. CursorYLow
  108501. CursorYOffset
  108502. CustomDpmSettings_t
  108503. Cvideopro
  108504. Cx
  108505. Cxpl_dbg_sel
  108506. CyANY_DELTA
  108507. CyASYNC
  108508. CyAUTO_TXFL
  108509. CyBREAK
  108510. CyCAR
  108511. CyCCR
  108512. CyCCSR
  108513. CyCH0_PARALLEL
  108514. CyCH0_SERIAL
  108515. CyCHAN_0
  108516. CyCHAN_1
  108517. CyCHAN_2
  108518. CyCHAN_3
  108519. CyCHAN_CTL
  108520. CyCHAN_RESET
  108521. CyCHIP_RESET
  108522. CyCLOCK_20_1MS
  108523. CyCLOCK_25_1MS
  108524. CyCLOCK_25_5MS
  108525. CyCLOCK_60_1MS
  108526. CyCLOCK_60_2MS
  108527. CyCLR_CHAN
  108528. CyCMR
  108529. CyCOR1
  108530. CyCOR1ch
  108531. CyCOR2
  108532. CyCOR2ch
  108533. CyCOR3
  108534. CyCOR3ch
  108535. CyCOR4
  108536. CyCOR5
  108537. CyCOR6
  108538. CyCOR7
  108539. CyCOR_CHANGE
  108540. CyCTS
  108541. CyCtsAE
  108542. CyDCD
  108543. CyDIS_RCVR
  108544. CyDIS_XMTR
  108545. CyDSR
  108546. CyDTR
  108547. CyDsrAE
  108548. CyENB_RCVR
  108549. CyENB_XMTR
  108550. CyEOSRR
  108551. CyETC
  108552. CyFL_CTRL_TRNSP
  108553. CyFRAME
  108554. CyFlushTransFIFO
  108555. CyGCR
  108556. CyGFRCR
  108557. CyICR0
  108558. CyICR1
  108559. CyICR2
  108560. CyICR3
  108561. CyIER
  108562. CyINIT_CHAN
  108563. CyIRBusy
  108564. CyIRChannel
  108565. CyIRContext
  108566. CyIRDirEq
  108567. CyIRUnfair
  108568. CyISA_Ywin
  108569. CyIVRMask
  108570. CyIVRMdmOK
  108571. CyIVRRxEx
  108572. CyIVRRxOK
  108573. CyIVRTxOK
  108574. CyIXM
  108575. CyLICR
  108576. CyLIVR
  108577. CyLLM
  108578. CyLNC
  108579. CyMAX_CHAR_FIFO
  108580. CyMAX_CHIPS_PER_CARD
  108581. CyMCOR1
  108582. CyMCOR2
  108583. CyMEOIR
  108584. CyMICR
  108585. CyMIR
  108586. CyMISR
  108587. CyMIVR
  108588. CyMSVR1
  108589. CyMSVR2
  108590. CyMdmCh
  108591. CyMscsr
  108592. CyNNDT
  108593. CyNOTRANS
  108594. CyOVERRUN
  108595. CyPARITY
  108596. CyPARITY_0
  108597. CyPARITY_1
  108598. CyPARITY_E
  108599. CyPARITY_NONE
  108600. CyPARITY_O
  108601. CyPCI_Yctl
  108602. CyPCI_Ywin
  108603. CyPCI_Zctl
  108604. CyPCI_Ze_win
  108605. CyPCI_Zwin
  108606. CyPILR1
  108607. CyPILR2
  108608. CyPILR3
  108609. CyPLX_VER
  108610. CyPORTS_PER_CHIP
  108611. CyPPR
  108612. CyPVSR
  108613. CyRBPR
  108614. CyRCOR
  108615. CyRDCR
  108616. CyRDR
  108617. CyRDSR
  108618. CyREC_FIFO
  108619. CyREOIR
  108620. CyRFOC
  108621. CyRI
  108622. CyRICR
  108623. CyRIR
  108624. CyRISR
  108625. CyRIVR
  108626. CyRLM
  108627. CyRTPR
  108628. CyRTPRH
  108629. CyRTPRL
  108630. CyRTS
  108631. CyRedsr
  108632. CyRegSize
  108633. CyRevE
  108634. CyRgdsr
  108635. CyRtsAO
  108636. CyRxData
  108637. CyRxEN
  108638. CyRxExc
  108639. CyRxFloff
  108640. CyRxFlon
  108641. CySCHR1
  108642. CySCHR2
  108643. CySCHR3
  108644. CySCHR4
  108645. CySCRH
  108646. CySCRL
  108647. CySEND_SPEC_1
  108648. CySEND_SPEC_2
  108649. CySEND_SPEC_3
  108650. CySEND_SPEC_4
  108651. CySPECHAR
  108652. CySPL_CH_DET1
  108653. CySPL_CH_DET2
  108654. CySPL_CH_DRANGE
  108655. CySRER
  108656. CySRModem
  108657. CySRReceive
  108658. CySRTransmit
  108659. CySVRR
  108660. CyTBPR
  108661. CyTCOR
  108662. CyTDR
  108663. CyTEOIR
  108664. CyTFTC
  108665. CyTICR
  108666. CyTIMEOUT
  108667. CyTIR
  108668. CyTISR
  108669. CyTIVR
  108670. CyTPR
  108671. CyTdsr
  108672. CyTxEN
  108673. CyTxFloff
  108674. CyTxFlon
  108675. CyTxIBE
  108676. CyTxMpty
  108677. CyTxRdy
  108678. Cy_1_5_STOP
  108679. Cy_1_STOP
  108680. Cy_2_STOP
  108681. Cy_5_BITS
  108682. Cy_6_BITS
  108683. Cy_7_BITS
  108684. Cy_8_BITS
  108685. Cy_ClrIntr
  108686. Cy_EpldRev
  108687. Cy_HwReset
  108688. CyberControl
  108689. CyberEnhance
[..]