aud_2_parents     482 drivers/clk/mediatek/clk-mt2712.c static const char * const aud_2_parents[] = {
aud_2_parents     800 drivers/clk/mediatek/clk-mt2712.c 		aud_2_parents, 0x0b0, 0, 2, 7),
aud_2_parents     546 drivers/clk/mediatek/clk-mt6779.c static const char * const aud_2_parents[] = {
aud_2_parents     758 drivers/clk/mediatek/clk-mt6779.c 	MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_2, "aud_2_sel", aud_2_parents,
aud_2_parents     277 drivers/clk/mediatek/clk-mt6797.c static const char * const aud_2_parents[] = {
aud_2_parents     367 drivers/clk/mediatek/clk-mt6797.c 	MUX_GATE(CLK_TOP_MUX_AUD_2, "aud_2_sel", aud_2_parents,
aud_2_parents     412 drivers/clk/mediatek/clk-mt8173.c static const char * const aud_2_parents[] __initconst = {
aud_2_parents     581 drivers/clk/mediatek/clk-mt8173.c 	MUX_GATE(CLK_TOP_AUD_2_SEL, "aud_2_sel", aud_2_parents, 0x00b0, 0, 2, 7),
aud_2_parents     513 drivers/clk/mediatek/clk-mt8183.c static const char * const aud_2_parents[] = {
aud_2_parents     656 drivers/clk/mediatek/clk-mt8183.c 		aud_2_parents, 0xe0,