asic_id 663 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.chip_family = adev->family; asic_id 665 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.pci_revision_id = adev->rev_id; asic_id 666 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.hw_internal_rev = adev->external_rev_id; asic_id 668 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.vram_width = adev->gmc.vram_width; asic_id 670 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.atombios_base_address = asic_id 49 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c static enum bw_calcs_version bw_calcs_version_from_asic_id(struct hw_asic_id asic_id) asic_id 51 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c switch (asic_id.chip_family) { asic_id 54 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (ASIC_REV_IS_STONEY(asic_id.hw_internal_rev)) asic_id 59 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) asic_id 61 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev)) asic_id 63 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev)) asic_id 65 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) asic_id 2031 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c struct hw_asic_id asic_id) asic_id 2036 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c enum bw_calcs_version version = bw_calcs_version_from_asic_id(asic_id); asic_id 2044 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; asic_id 2160 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; asic_id 2273 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; asic_id 2389 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; asic_id 2505 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; asic_id 2618 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; asic_id 1283 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (bw_limit_pass && v->voltage_level <= get_highest_allowed_voltage_level(dc->ctx->asic_id.hw_internal_rev)) asic_id 71 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c struct hw_asic_id asic_id = ctx->asic_id; asic_id 80 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c switch (asic_id.chip_family) { asic_id 89 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) || asic_id 90 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) { asic_id 94 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) || asic_id 95 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) || asic_id 96 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) { asic_id 100 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) { asic_id 106 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev)) asic_id 115 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) { asic_id 120 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)) { asic_id 124 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c if (ASICREV_IS_RAVEN(asic_id.hw_internal_rev) || asic_id 125 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c ASICREV_IS_PICASSO(asic_id.hw_internal_rev)) { asic_id 198 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c if (ASICREV_IS_VEGA20_P(dc->ctx->asic_id.hw_internal_rev) && (context->stream_count >= 2)) { asic_id 104 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c if (!ASICREV_IS_VEGA20_P(clk_mgr_base->ctx->asic_id.hw_internal_rev)) asic_id 180 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c if (!ASICREV_IS_VEGA20_P(clk_mgr->base.ctx->asic_id.hw_internal_rev)) asic_id 471 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c void clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct hw_asic_id *asic_id) asic_id 489 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c bw_params->vram_type = asic_id->vram_type; asic_id 490 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c bw_params->num_channels = asic_id->vram_width / DDR4_DRAM_WIDTH; asic_id 574 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c clk_mgr_helper_populate_bw_params(clk_mgr->base.bw_params, &clock_table, &ctx->asic_id); asic_id 638 drivers/gpu/drm/amd/display/dc/core/dc.c dc_ctx->asic_id = init_params->asic_id; asic_id 647 drivers/gpu/drm/amd/display/dc/core/dc.c dc_version = resource_parse_asic_id(init_params->asic_id); asic_id 660 drivers/gpu/drm/amd/display/dc/core/dc.c bp_init_data.bios = init_params->asic_id.atombios_base_address; asic_id 62 drivers/gpu/drm/amd/display/dc/core/dc_resource.c enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id) asic_id 65 drivers/gpu/drm/amd/display/dc/core/dc_resource.c switch (asic_id.chip_family) { asic_id 71 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (ASIC_REV_IS_KALINDI(asic_id.hw_internal_rev) || asic_id 72 drivers/gpu/drm/amd/display/dc/core/dc_resource.c ASIC_REV_IS_BHAVANI(asic_id.hw_internal_rev) || asic_id 73 drivers/gpu/drm/amd/display/dc/core/dc_resource.c ASIC_REV_IS_GODAVARI(asic_id.hw_internal_rev)) asic_id 83 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) || asic_id 84 drivers/gpu/drm/amd/display/dc/core/dc_resource.c ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) { asic_id 88 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) || asic_id 89 drivers/gpu/drm/amd/display/dc/core/dc_resource.c ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) || asic_id 90 drivers/gpu/drm/amd/display/dc/core/dc_resource.c ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) { asic_id 93 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) asic_id 97 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev)) asic_id 105 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)) asic_id 108 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) asic_id 152 drivers/gpu/drm/amd/display/dc/core/dc_resource.c init_data->asic_id); asic_id 246 drivers/gpu/drm/amd/display/dc/core/dc_stream.c if (stream->ctx->asic_id.chip_family == FAMILY_RV && asic_id 247 drivers/gpu/drm/amd/display/dc/core/dc_stream.c ASICREV_IS_RAVEN(stream->ctx->asic_id.hw_internal_rev)) { asic_id 531 drivers/gpu/drm/amd/display/dc/dc.h struct hw_asic_id asic_id; asic_id 91 drivers/gpu/drm/amd/display/dc/dc_types.h struct hw_asic_id asic_id; asic_id 320 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c if (!ASICREV_IS_VEGA20_P(clk_mgr->ctx->asic_id.hw_internal_rev)) asic_id 515 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c compressor->base.memory_bus_width = ctx->asic_id.vram_width; asic_id 518 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c hws->regs = ASIC_REV_IS_STONEY(ctx->asic_id.hw_internal_rev) ? asic_id 1262 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c struct hw_asic_id *asic_id) asic_id 1264 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if (ASIC_REV_IS_STONEY(asic_id->hw_internal_rev)) asic_id 1274 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c struct hw_asic_id asic_id) asic_id 1282 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c pool->base.res_cap = dce110_resource_cap(&ctx->asic_id); asic_id 1441 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id); asic_id 1455 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c struct hw_asic_id asic_id) asic_id 1463 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if (construct(num_virtual_links, dc, pool, asic_id)) asic_id 46 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.h struct hw_asic_id asic_id); asic_id 813 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c compressor->base.memory_bus_width = ctx->asic_id.vram_width; asic_id 1134 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c struct hw_asic_id *asic_id) asic_id 1136 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c if (ASIC_REV_IS_POLARIS11_M(asic_id->hw_internal_rev) || asic_id 1137 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c ASIC_REV_IS_POLARIS12_V(asic_id->hw_internal_rev)) asic_id 1153 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c pool->base.res_cap = dce112_resource_cap(&ctx->asic_id); asic_id 1322 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id); asic_id 991 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c bool is_vg20 = ASICREV_IS_VEGA20_P(ctx->asic_id.hw_internal_rev); asic_id 1183 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id); asic_id 1396 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (ASICREV_IS_RV1_F0(dc->ctx->asic_id.hw_internal_rev)) { asic_id 1403 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c dc->dcn_soc->number_of_channels = dc->ctx->asic_id.vram_width / ddr4_dram_width; asic_id 1413 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (ASICREV_IS_RV1_F0(dc->ctx->asic_id.hw_internal_rev)) { asic_id 1221 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (ASICREV_IS_NAVI14_M(ctx->asic_id.hw_internal_rev)) { asic_id 3278 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c get_asic_rev_soc_bb(dc->ctx->asic_id.hw_internal_rev); asic_id 3280 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c get_asic_rev_ip_params(dc->ctx->asic_id.hw_internal_rev); asic_id 3440 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c get_asic_rev_soc_bb(ctx->asic_id.hw_internal_rev); asic_id 3442 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c get_asic_rev_ip_params(ctx->asic_id.hw_internal_rev); asic_id 3444 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c get_dml_project_version(ctx->asic_id.hw_internal_rev); asic_id 3449 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (ASICREV_IS_NAVI14_M(ctx->asic_id.hw_internal_rev)) { asic_id 472 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h struct hw_asic_id asic_id); asic_id 38 drivers/gpu/drm/amd/display/dc/inc/resource.h struct hw_asic_id asic_id); asic_id 560 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h uint32_t asic_id; asic_id 627 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h uint32_t asic_id; asic_id 662 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h uint32_t asic_id; asic_id 627 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h uint32_t asic_id; asic_id 656 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h uint32_t asic_id; asic_id 294 drivers/infiniband/hw/ocrdma/ocrdma.h u32 asic_id; asic_id 570 drivers/infiniband/hw/ocrdma/ocrdma.h if (dev->nic_info.dev_family == 0xF && !dev->asic_id) { asic_id 573 drivers/infiniband/hw/ocrdma/ocrdma.h OCRDMA_SLI_ASIC_ID_OFFSET, &dev->asic_id); asic_id 576 drivers/infiniband/hw/ocrdma/ocrdma.h return (dev->asic_id & OCRDMA_SLI_ASIC_GEN_NUM_MASK) >> asic_id 82 drivers/infiniband/hw/ocrdma/ocrdma_verbs.c attr->hw_ver = dev->asic_id; asic_id 1306 drivers/media/radio/wl128x/fmdrv_common.c __be16 asic_id = 0, asic_ver = 0; asic_id 1334 drivers/media/radio/wl128x/fmdrv_common.c sizeof(asic_id), &asic_id, &resp_len)) asic_id 1342 drivers/media/radio/wl128x/fmdrv_common.c be16_to_cpu(asic_id), be16_to_cpu(asic_ver)); asic_id 1345 drivers/media/radio/wl128x/fmdrv_common.c be16_to_cpu(asic_id), be16_to_cpu(asic_ver)); asic_id 1354 drivers/media/radio/wl128x/fmdrv_common.c be16_to_cpu(asic_id), be16_to_cpu(asic_ver)); asic_id 251 drivers/media/usb/cpia2/cpia2.h u8 asic_id; /* Video Compressor set (bank 1) */ asic_id 453 drivers/media/usb/cpia2/cpia2_core.c cam->params.version.asic_id = cmd.buffer.block_data[0]; asic_id 2211 drivers/media/usb/cpia2/cpia2_core.c if (cam->params.version.asic_id != CPIA2_ASIC_672) { asic_id 2213 drivers/media/usb/cpia2/cpia2_core.c cam->params.version.asic_id); asic_id 860 drivers/media/usb/cpia2/cpia2_usb.c cam->params.version.asic_id, asic_id 108 drivers/scsi/qla4xxx/ql4_nvram.h u8 asic_id[4]; /* x00 */ asic_id 485 drivers/tty/serial/rp2.c static int rp2_asic_interrupt(struct rp2_card *card, unsigned int asic_id) asic_id 487 drivers/tty/serial/rp2.c void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); asic_id 598 drivers/tty/serial/rp2.c static void rp2_reset_asic(struct rp2_card *card, unsigned int asic_id) asic_id 600 drivers/tty/serial/rp2.c void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id);