asic_blank_end    733 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	int vesa_sync_start, asic_blank_end, asic_blank_start;
asic_blank_end   1192 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			asic_blank_end = (pipe->stream->timing.v_total -
asic_blank_end   1197 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			asic_blank_start = asic_blank_end +
asic_blank_end   1204 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			pipe->pipe_dlg_param.vblank_end = asic_blank_end;
asic_blank_end   3080 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	int asic_blank_end;
asic_blank_end   3093 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	asic_blank_end = (patched_crtc_timing.v_total -
asic_blank_end   3098 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	vertical_line_start = asic_blank_end -
asic_blank_end    150 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	uint32_t asic_blank_end;
asic_blank_end    185 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	asic_blank_end = asic_blank_start -
asic_blank_end    192 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 			OTG_H_BLANK_END, asic_blank_end);
asic_blank_end    226 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	asic_blank_end = asic_blank_start -
asic_blank_end    233 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 			OTG_V_BLANK_END, asic_blank_end);
asic_blank_end    299 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	uint32_t asic_blank_end;
asic_blank_end    313 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	asic_blank_end = v_init -
asic_blank_end    319 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	vertical_line_start = asic_blank_end - optc1->vstartup_start + 1;
asic_blank_end    327 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 			if ((optc1->vstartup_start/2)*2 > asic_blank_end)