asic 56 arch/mips/sni/pcimt.c unsigned int asic; asic 64 arch/mips/sni/pcimt.c asic = csmsr & 0x80; asic 65 arch/mips/sni/pcimt.c asic = (csmsr & 0x08) ? asic : !asic; asic 66 arch/mips/sni/pcimt.c p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1"); asic 1721 drivers/atm/eni.c (eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) { asic 1737 drivers/atm/eni.c if (!eni_dev->asic) { asic 1769 drivers/atm/eni.c if (!(eni_in(MID_RES_ID_MCON) & 0x200) != !eni_dev->asic) { asic 1776 drivers/atm/eni.c error = eni_dev->asic ? get_esi_asic(dev) : get_esi_fpga(dev,base); asic 1824 drivers/atm/eni.c (eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) { asic 2268 drivers/atm/eni.c eni_dev->asic = ent->driver_data; asic 115 drivers/atm/eni.h int asic; /* PCI interface type, 0 for FPGA */ asic 2604 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->asic->display.hdmi_enable) asic 3666 drivers/gpu/drm/radeon/cik.c int ring_index = rdev->asic->copy.blit_ring_index; asic 3882 drivers/gpu/drm/radeon/cik.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 4121 drivers/gpu/drm/radeon/cik.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 255 drivers/gpu/drm/radeon/cik_sdma.c if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || asic 256 drivers/gpu/drm/radeon/cik_sdma.c (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) asic 433 drivers/gpu/drm/radeon/cik_sdma.c if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || asic 434 drivers/gpu/drm/radeon/cik_sdma.c (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) asic 586 drivers/gpu/drm/radeon/cik_sdma.c int ring_index = rdev->asic->copy.dma_ring_index; asic 115 drivers/gpu/drm/radeon/evergreen_dma.c int ring_index = rdev->asic->copy.dma_ring_index; asic 1466 drivers/gpu/drm/radeon/ni.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 1740 drivers/gpu/drm/radeon/ni.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 161 drivers/gpu/drm/radeon/ni_dma.c if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || asic 162 drivers/gpu/drm/radeon/ni_dma.c (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) asic 257 drivers/gpu/drm/radeon/ni_dma.c if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || asic 258 drivers/gpu/drm/radeon/ni_dma.c (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) asic 433 drivers/gpu/drm/radeon/r100.c rdev->asic->pm.set_pcie_lanes && asic 654 drivers/gpu/drm/radeon/r100.c rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; asic 655 drivers/gpu/drm/radeon/r100.c rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; asic 656 drivers/gpu/drm/radeon/r100.c rdev->asic->gart.set_page = &r100_pci_gart_set_page; asic 147 drivers/gpu/drm/radeon/r300.c rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; asic 148 drivers/gpu/drm/radeon/r300.c rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; asic 149 drivers/gpu/drm/radeon/r300.c rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; asic 2426 drivers/gpu/drm/radeon/r600.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 2773 drivers/gpu/drm/radeon/r600.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 2970 drivers/gpu/drm/radeon/r600.c int ring_index = rdev->asic->copy.blit_ring_index; asic 103 drivers/gpu/drm/radeon/r600_dma.c if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) asic 180 drivers/gpu/drm/radeon/r600_dma.c if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) asic 451 drivers/gpu/drm/radeon/r600_dma.c int ring_index = rdev->asic->copy.dma_ring_index; asic 2380 drivers/gpu/drm/radeon/radeon.h struct radeon_asic *asic; asic 2699 drivers/gpu/drm/radeon/radeon.h #define radeon_init(rdev) (rdev)->asic->init((rdev)) asic 2700 drivers/gpu/drm/radeon/radeon.h #define radeon_fini(rdev) (rdev)->asic->fini((rdev)) asic 2701 drivers/gpu/drm/radeon/radeon.h #define radeon_resume(rdev) (rdev)->asic->resume((rdev)) asic 2702 drivers/gpu/drm/radeon/radeon.h #define radeon_suspend(rdev) (rdev)->asic->suspend((rdev)) asic 2703 drivers/gpu/drm/radeon/radeon.h #define radeon_cs_parse(rdev, r, p) (rdev)->asic->ring[(r)]->cs_parse((p)) asic 2704 drivers/gpu/drm/radeon/radeon.h #define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state)) asic 2705 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev), false) asic 2706 drivers/gpu/drm/radeon/radeon.h #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev)) asic 2707 drivers/gpu/drm/radeon/radeon.h #define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f)) asic 2708 drivers/gpu/drm/radeon/radeon.h #define radeon_gart_set_page(rdev, i, e) (rdev)->asic->gart.set_page((rdev), (i), (e)) asic 2709 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_init(rdev) (rdev)->asic->vm.init((rdev)) asic 2710 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_fini(rdev) (rdev)->asic->vm.fini((rdev)) asic 2711 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_copy_pages(rdev, ib, pe, src, count) ((rdev)->asic->vm.copy_pages((rdev), (ib), (pe), (src), (count))) asic 2712 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_write_pages(rdev, ib, pe, addr, count, incr, flags) ((rdev)->asic->vm.write_pages((rdev), (ib), (pe), (addr), (count), (incr), (flags))) asic 2713 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_set_pages(rdev, ib, pe, addr, count, incr, flags) ((rdev)->asic->vm.set_pages((rdev), (ib), (pe), (addr), (count), (incr), (flags))) asic 2714 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_pad_ib(rdev, ib) ((rdev)->asic->vm.pad_ib((ib))) asic 2715 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_start(rdev, r, cp) (rdev)->asic->ring[(r)]->ring_start((rdev), (cp)) asic 2716 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_test(rdev, r, cp) (rdev)->asic->ring[(r)]->ring_test((rdev), (cp)) asic 2717 drivers/gpu/drm/radeon/radeon.h #define radeon_ib_test(rdev, r, cp) (rdev)->asic->ring[(r)]->ib_test((rdev), (cp)) asic 2718 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_ib_execute(rdev, r, ib) (rdev)->asic->ring[(r)]->ib_execute((rdev), (ib)) asic 2719 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)]->ib_parse((rdev), (ib)) asic 2720 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_is_lockup(rdev, r, cp) (rdev)->asic->ring[(r)]->is_lockup((rdev), (cp)) asic 2721 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_vm_flush(rdev, r, vm_id, pd_addr) (rdev)->asic->ring[(r)->idx]->vm_flush((rdev), (r), (vm_id), (pd_addr)) asic 2722 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_get_rptr(rdev, r) (rdev)->asic->ring[(r)->idx]->get_rptr((rdev), (r)) asic 2723 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_get_wptr(rdev, r) (rdev)->asic->ring[(r)->idx]->get_wptr((rdev), (r)) asic 2724 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_set_wptr(rdev, r) (rdev)->asic->ring[(r)->idx]->set_wptr((rdev), (r)) asic 2725 drivers/gpu/drm/radeon/radeon.h #define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev)) asic 2726 drivers/gpu/drm/radeon/radeon.h #define radeon_irq_process(rdev) (rdev)->asic->irq.process((rdev)) asic 2727 drivers/gpu/drm/radeon/radeon.h #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crtc)) asic 2728 drivers/gpu/drm/radeon/radeon.h #define radeon_set_backlight_level(rdev, e, l) (rdev)->asic->display.set_backlight_level((e), (l)) asic 2729 drivers/gpu/drm/radeon/radeon.h #define radeon_get_backlight_level(rdev, e) (rdev)->asic->display.get_backlight_level((e)) asic 2730 drivers/gpu/drm/radeon/radeon.h #define radeon_hdmi_enable(rdev, e, b) (rdev)->asic->display.hdmi_enable((e), (b)) asic 2731 drivers/gpu/drm/radeon/radeon.h #define radeon_hdmi_setmode(rdev, e, m) (rdev)->asic->display.hdmi_setmode((e), (m)) asic 2732 drivers/gpu/drm/radeon/radeon.h #define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)]->emit_fence((rdev), (fence)) asic 2733 drivers/gpu/drm/radeon/radeon.h #define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)]->emit_semaphore((rdev), (cp), (semaphore), (emit_wait)) asic 2734 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_blit(rdev, s, d, np, resv) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (resv)) asic 2735 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_dma(rdev, s, d, np, resv) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (resv)) asic 2736 drivers/gpu/drm/radeon/radeon.h #define radeon_copy(rdev, s, d, np, resv) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (resv)) asic 2737 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index asic 2738 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index asic 2739 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index asic 2740 drivers/gpu/drm/radeon/radeon.h #define radeon_get_engine_clock(rdev) (rdev)->asic->pm.get_engine_clock((rdev)) asic 2741 drivers/gpu/drm/radeon/radeon.h #define radeon_set_engine_clock(rdev, e) (rdev)->asic->pm.set_engine_clock((rdev), (e)) asic 2742 drivers/gpu/drm/radeon/radeon.h #define radeon_get_memory_clock(rdev) (rdev)->asic->pm.get_memory_clock((rdev)) asic 2743 drivers/gpu/drm/radeon/radeon.h #define radeon_set_memory_clock(rdev, e) (rdev)->asic->pm.set_memory_clock((rdev), (e)) asic 2744 drivers/gpu/drm/radeon/radeon.h #define radeon_get_pcie_lanes(rdev) (rdev)->asic->pm.get_pcie_lanes((rdev)) asic 2745 drivers/gpu/drm/radeon/radeon.h #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) asic 2746 drivers/gpu/drm/radeon/radeon.h #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) asic 2747 drivers/gpu/drm/radeon/radeon.h #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) asic 2748 drivers/gpu/drm/radeon/radeon.h #define radeon_set_vce_clocks(rdev, ev, ec) (rdev)->asic->pm.set_vce_clocks((rdev), (ev), (ec)) asic 2749 drivers/gpu/drm/radeon/radeon.h #define radeon_get_temperature(rdev) (rdev)->asic->pm.get_temperature((rdev)) asic 2750 drivers/gpu/drm/radeon/radeon.h #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s))) asic 2751 drivers/gpu/drm/radeon/radeon.h #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) asic 2752 drivers/gpu/drm/radeon/radeon.h #define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) asic 2753 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) asic 2754 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) asic 2755 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h)) asic 2756 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h)) asic 2757 drivers/gpu/drm/radeon/radeon.h #define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev)) asic 2758 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_misc(rdev) (rdev)->asic->pm.misc((rdev)) asic 2759 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_prepare(rdev) (rdev)->asic->pm.prepare((rdev)) asic 2760 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_finish(rdev) (rdev)->asic->pm.finish((rdev)) asic 2761 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_init_profile(rdev) (rdev)->asic->pm.init_profile((rdev)) asic 2762 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm.get_dynpm_state((rdev)) asic 2763 drivers/gpu/drm/radeon/radeon.h #define radeon_page_flip(rdev, crtc, base, async) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base), (async)) asic 2764 drivers/gpu/drm/radeon/radeon.h #define radeon_page_flip_pending(rdev, crtc) (rdev)->asic->pflip.page_flip_pending((rdev), (crtc)) asic 2765 drivers/gpu/drm/radeon/radeon.h #define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc)) asic 2766 drivers/gpu/drm/radeon/radeon.h #define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev)) asic 2767 drivers/gpu/drm/radeon/radeon.h #define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev)) asic 2768 drivers/gpu/drm/radeon/radeon.h #define radeon_get_gpu_clock_counter(rdev) (rdev)->asic->get_gpu_clock_counter((rdev)) asic 2769 drivers/gpu/drm/radeon/radeon.h #define radeon_get_allowed_info_register(rdev, r, v) (rdev)->asic->get_allowed_info_register((rdev), (r), (v)) asic 2770 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_init(rdev) rdev->asic->dpm.init((rdev)) asic 2771 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_setup_asic(rdev) rdev->asic->dpm.setup_asic((rdev)) asic 2772 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_enable(rdev) rdev->asic->dpm.enable((rdev)) asic 2773 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_late_enable(rdev) rdev->asic->dpm.late_enable((rdev)) asic 2774 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_disable(rdev) rdev->asic->dpm.disable((rdev)) asic 2775 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_pre_set_power_state(rdev) rdev->asic->dpm.pre_set_power_state((rdev)) asic 2776 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_set_power_state(rdev) rdev->asic->dpm.set_power_state((rdev)) asic 2777 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_post_set_power_state(rdev) rdev->asic->dpm.post_set_power_state((rdev)) asic 2778 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_display_configuration_changed(rdev) rdev->asic->dpm.display_configuration_changed((rdev)) asic 2779 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_fini(rdev) rdev->asic->dpm.fini((rdev)) asic 2780 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_sclk(rdev, l) rdev->asic->dpm.get_sclk((rdev), (l)) asic 2781 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_mclk(rdev, l) rdev->asic->dpm.get_mclk((rdev), (l)) asic 2782 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_print_power_state(rdev, ps) rdev->asic->dpm.print_power_state((rdev), (ps)) asic 2783 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_debugfs_print_current_performance_level(rdev, m) rdev->asic->dpm.debugfs_print_current_performance_level((rdev), (m)) asic 2784 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_force_performance_level(rdev, l) rdev->asic->dpm.force_performance_level((rdev), (l)) asic 2785 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_vblank_too_short(rdev) rdev->asic->dpm.vblank_too_short((rdev)) asic 2786 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_powergate_uvd(rdev, g) rdev->asic->dpm.powergate_uvd((rdev), (g)) asic 2787 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_enable_bapm(rdev, e) rdev->asic->dpm.enable_bapm((rdev), (e)) asic 2788 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_current_sclk(rdev) rdev->asic->dpm.get_current_sclk((rdev)) asic 2789 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_current_mclk(rdev) rdev->asic->dpm.get_current_mclk((rdev)) asic 167 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; asic 168 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; asic 169 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; asic 173 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; asic 174 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; asic 175 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.set_page = &r100_pci_gart_set_page; asic 2337 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r100_asic; asic 2343 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r200_asic; asic 2350 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r300_asic_pcie; asic 2352 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r300_asic; asic 2357 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r420_asic; asic 2360 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.get_engine_clock = &radeon_legacy_get_engine_clock; asic 2361 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.set_engine_clock = &radeon_legacy_set_engine_clock; asic 2362 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.get_memory_clock = &radeon_legacy_get_memory_clock; asic 2363 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.set_memory_clock = NULL; asic 2364 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->display.set_backlight_level = &radeon_legacy_set_backlight_level; asic 2369 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rs400_asic; asic 2372 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rs600_asic; asic 2376 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rs690_asic; asic 2379 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rv515_asic; asic 2386 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r520_asic; asic 2389 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r600_asic; asic 2396 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rv6xx_asic; asic 2401 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rs780_asic; asic 2416 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rv770_asic; asic 2429 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &evergreen_asic; asic 2435 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &sumo_asic; asic 2446 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &btc_asic; asic 2450 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &cayman_asic; asic 2456 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &trinity_asic; asic 2469 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &si_asic; asic 2585 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &ci_asic; asic 2631 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &kv_asic; asic 2697 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.get_memory_clock = NULL; asic 2698 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.set_memory_clock = NULL; asic 122 drivers/gpu/drm/radeon/radeon_benchmark.c if (rdev->asic->copy.dma) { asic 133 drivers/gpu/drm/radeon/radeon_benchmark.c if (rdev->asic->copy.blit) { asic 341 drivers/gpu/drm/radeon/radeon_clocks.c if ((!rdev->clock.default_mclk) && rdev->asic->pm.get_memory_clock) asic 381 drivers/gpu/drm/radeon/radeon_cs.c if (p->rdev->asic->ring[p->ring]->cs_parse == NULL) { asic 386 drivers/gpu/drm/radeon/radeon_cs.c if (p->rdev->asic->ring[p->ring]->ib_parse == NULL) { asic 1643 drivers/gpu/drm/radeon/radeon_device.c rdev->asic->asic_reset(rdev, true); asic 491 drivers/gpu/drm/radeon/radeon_gem.c if (rdev->asic->mmio_hdp_flush && asic 493 drivers/gpu/drm/radeon/radeon_gem.c robj->rdev->asic->mmio_hdp_flush(rdev); asic 337 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->asic->get_xclk) asic 563 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->asic->pm.get_temperature) asic 83 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.enable_bapm) asic 232 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { asic 554 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.force_performance_level) { asic 576 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.fan_ctrl_get_mode) asic 577 drivers/gpu/drm/radeon/radeon_pm.c pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev); asic 592 drivers/gpu/drm/radeon/radeon_pm.c if(!rdev->asic->dpm.fan_ctrl_set_mode) asic 601 drivers/gpu/drm/radeon/radeon_pm.c rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC); asic 604 drivers/gpu/drm/radeon/radeon_pm.c rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0); asic 639 drivers/gpu/drm/radeon/radeon_pm.c err = rdev->asic->dpm.set_fan_speed_percent(rdev, value); asic 654 drivers/gpu/drm/radeon/radeon_pm.c err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed); asic 683 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_temperature) asic 753 drivers/gpu/drm/radeon/radeon_pm.c if ((!rdev->asic->dpm.get_fan_speed_percent && asic 755 drivers/gpu/drm/radeon/radeon_pm.c (!rdev->asic->dpm.fan_ctrl_get_mode && asic 759 drivers/gpu/drm/radeon/radeon_pm.c if ((!rdev->asic->dpm.set_fan_speed_percent && asic 761 drivers/gpu/drm/radeon/radeon_pm.c (!rdev->asic->dpm.fan_ctrl_set_mode && asic 766 drivers/gpu/drm/radeon/radeon_pm.c if ((!rdev->asic->dpm.set_fan_speed_percent && asic 767 drivers/gpu/drm/radeon/radeon_pm.c !rdev->asic->dpm.get_fan_speed_percent) && asic 798 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_temperature == NULL) asic 833 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_temperature) { asic 861 drivers/gpu/drm/radeon/radeon_pm.c if (single_display && rdev->asic->dpm.vblank_too_short) { asic 1114 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.force_performance_level) { asic 1136 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.powergate_uvd) { asic 1876 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.debugfs_print_current_performance_level) asic 1889 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_memory_clock) asic 1893 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_pcie_lanes) asic 174 drivers/gpu/drm/radeon/radeon_ring.c if (hdp_flush && rdev->asic->ring[ring->idx]->hdp_flush) asic 175 drivers/gpu/drm/radeon/radeon_ring.c rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring); asic 184 drivers/gpu/drm/radeon/radeon_ring.c if (hdp_flush && rdev->asic->mmio_hdp_flush) asic 185 drivers/gpu/drm/radeon/radeon_ring.c rdev->asic->mmio_hdp_flush(rdev); asic 256 drivers/gpu/drm/radeon/radeon_test.c if (rdev->asic->copy.dma) asic 258 drivers/gpu/drm/radeon/radeon_test.c if (rdev->asic->copy.blit) asic 371 drivers/gpu/drm/radeon/radeon_ttm.c rdev->asic->copy.copy == NULL) { asic 307 drivers/gpu/drm/radeon/rs600.c rdev->asic->pm.set_pcie_lanes && asic 1085 drivers/gpu/drm/radeon/rv770.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 49 drivers/gpu/drm/radeon/rv770_dma.c int ring_index = rdev->asic->copy.dma_ring_index; asic 3469 drivers/gpu/drm/radeon/si.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 3768 drivers/gpu/drm/radeon/si.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) asic 238 drivers/gpu/drm/radeon/si_dma.c int ring_index = rdev->asic->copy.dma_ring_index; asic 41 drivers/leds/leds-asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 48 drivers/leds/leds-asic3.c asic3_write_register(asic, (base + ASIC3_LED_PeriodTime), 32); asic 49 drivers/leds/leds-asic3.c asic3_write_register(asic, (base + ASIC3_LED_DutyTime), 32); asic 50 drivers/leds/leds-asic3.c asic3_write_register(asic, (base + ASIC3_LED_AutoStopCount), 0); asic 51 drivers/leds/leds-asic3.c asic3_write_register(asic, (base + ASIC3_LED_TimeBase), timebase); asic 60 drivers/leds/leds-asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 80 drivers/leds/leds-asic3.c asic3_write_register(asic, (base + ASIC3_LED_PeriodTime), (on + off)); asic 81 drivers/leds/leds-asic3.c asic3_write_register(asic, (base + ASIC3_LED_DutyTime), on); asic 82 drivers/leds/leds-asic3.c asic3_write_register(asic, (base + ASIC3_LED_AutoStopCount), 0); asic 83 drivers/leds/leds-asic3.c asic3_write_register(asic, (base + ASIC3_LED_TimeBase), (LED_EN|0x4)); asic 90 drivers/mfd/asic3.c void asic3_write_register(struct asic3 *asic, unsigned int reg, u32 value) asic 92 drivers/mfd/asic3.c iowrite16(value, asic->mapping + asic 93 drivers/mfd/asic3.c (reg >> asic->bus_shift)); asic 97 drivers/mfd/asic3.c u32 asic3_read_register(struct asic3 *asic, unsigned int reg) asic 99 drivers/mfd/asic3.c return ioread16(asic->mapping + asic 100 drivers/mfd/asic3.c (reg >> asic->bus_shift)); asic 104 drivers/mfd/asic3.c static void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set) asic 109 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 110 drivers/mfd/asic3.c val = asic3_read_register(asic, reg); asic 115 drivers/mfd/asic3.c asic3_write_register(asic, reg, val); asic 116 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 124 drivers/mfd/asic3.c static void asic3_irq_flip_edge(struct asic3 *asic, asic 130 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 131 drivers/mfd/asic3.c edge = asic3_read_register(asic, asic 134 drivers/mfd/asic3.c asic3_write_register(asic, asic 136 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 141 drivers/mfd/asic3.c struct asic3 *asic = irq_desc_get_handler_data(desc); asic 152 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 153 drivers/mfd/asic3.c status = asic3_read_register(asic, asic 155 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 168 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 169 drivers/mfd/asic3.c istat = asic3_read_register(asic, asic 173 drivers/mfd/asic3.c asic3_write_register(asic, asic 176 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 185 drivers/mfd/asic3.c irqnr = asic->irq_base + asic 189 drivers/mfd/asic3.c if (asic->irq_bothedge[bank] & bit) asic 190 drivers/mfd/asic3.c asic3_irq_flip_edge(asic, base, asic 200 drivers/mfd/asic3.c generic_handle_irq(asic->irq_base + i); asic 205 drivers/mfd/asic3.c dev_err(asic->dev, "interrupt processing overrun\n"); asic 208 drivers/mfd/asic3.c static inline int asic3_irq_to_bank(struct asic3 *asic, int irq) asic 212 drivers/mfd/asic3.c n = (irq - asic->irq_base) >> 4; asic 217 drivers/mfd/asic3.c static inline int asic3_irq_to_index(struct asic3 *asic, int irq) asic 219 drivers/mfd/asic3.c return (irq - asic->irq_base) & 0xf; asic 224 drivers/mfd/asic3.c struct asic3 *asic = irq_data_get_irq_chip_data(data); asic 228 drivers/mfd/asic3.c bank = asic3_irq_to_bank(asic, data->irq); asic 229 drivers/mfd/asic3.c index = asic3_irq_to_index(asic, data->irq); asic 231 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 232 drivers/mfd/asic3.c val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); asic 234 drivers/mfd/asic3.c asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); asic 235 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 240 drivers/mfd/asic3.c struct asic3 *asic = irq_data_get_irq_chip_data(data); asic 244 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 245 drivers/mfd/asic3.c regval = asic3_read_register(asic, asic 250 drivers/mfd/asic3.c (data->irq - (asic->irq_base + ASIC3_NUM_GPIOS))); asic 252 drivers/mfd/asic3.c asic3_write_register(asic, asic 256 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 261 drivers/mfd/asic3.c struct asic3 *asic = irq_data_get_irq_chip_data(data); asic 265 drivers/mfd/asic3.c bank = asic3_irq_to_bank(asic, data->irq); asic 266 drivers/mfd/asic3.c index = asic3_irq_to_index(asic, data->irq); asic 268 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 269 drivers/mfd/asic3.c val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); asic 271 drivers/mfd/asic3.c asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); asic 272 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 277 drivers/mfd/asic3.c struct asic3 *asic = irq_data_get_irq_chip_data(data); asic 281 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 282 drivers/mfd/asic3.c regval = asic3_read_register(asic, asic 287 drivers/mfd/asic3.c (data->irq - (asic->irq_base + ASIC3_NUM_GPIOS))); asic 289 drivers/mfd/asic3.c asic3_write_register(asic, asic 293 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 298 drivers/mfd/asic3.c struct asic3 *asic = irq_data_get_irq_chip_data(data); asic 303 drivers/mfd/asic3.c bank = asic3_irq_to_bank(asic, data->irq); asic 304 drivers/mfd/asic3.c index = asic3_irq_to_index(asic, data->irq); asic 307 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 308 drivers/mfd/asic3.c level = asic3_read_register(asic, asic 310 drivers/mfd/asic3.c edge = asic3_read_register(asic, asic 312 drivers/mfd/asic3.c trigger = asic3_read_register(asic, asic 314 drivers/mfd/asic3.c asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] &= ~bit; asic 324 drivers/mfd/asic3.c if (asic3_gpio_get(&asic->gpio, data->irq - asic->irq_base)) asic 328 drivers/mfd/asic3.c asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] |= bit; asic 341 drivers/mfd/asic3.c dev_notice(asic->dev, "irq type not changed\n"); asic 343 drivers/mfd/asic3.c asic3_write_register(asic, bank + ASIC3_GPIO_LEVEL_TRIGGER, asic 345 drivers/mfd/asic3.c asic3_write_register(asic, bank + ASIC3_GPIO_EDGE_TRIGGER, asic 347 drivers/mfd/asic3.c asic3_write_register(asic, bank + ASIC3_GPIO_TRIGGER_TYPE, asic 349 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 355 drivers/mfd/asic3.c struct asic3 *asic = irq_data_get_irq_chip_data(data); asic 359 drivers/mfd/asic3.c bank = asic3_irq_to_bank(asic, data->irq); asic 360 drivers/mfd/asic3.c index = asic3_irq_to_index(asic, data->irq); asic 363 drivers/mfd/asic3.c asic3_set_register(asic, bank + ASIC3_GPIO_SLEEP_MASK, bit, !on); asic 386 drivers/mfd/asic3.c struct asic3 *asic = platform_get_drvdata(pdev); asic 394 drivers/mfd/asic3.c asic->irq_nr = ret; asic 398 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), asic 401 drivers/mfd/asic3.c irq_base = asic->irq_base; asic 404 drivers/mfd/asic3.c if (irq < asic->irq_base + ASIC3_NUM_GPIOS) asic 409 drivers/mfd/asic3.c irq_set_chip_data(irq, asic); asic 414 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_OFFSET(INTR, INT_MASK), asic 417 drivers/mfd/asic3.c irq_set_chained_handler_and_data(asic->irq_nr, asic3_irq_demux, asic); asic 418 drivers/mfd/asic3.c irq_set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING); asic 425 drivers/mfd/asic3.c struct asic3 *asic = platform_get_drvdata(pdev); asic 428 drivers/mfd/asic3.c irq_base = asic->irq_base; asic 435 drivers/mfd/asic3.c irq_set_chained_handler(asic->irq_nr, NULL); asic 445 drivers/mfd/asic3.c struct asic3 *asic; asic 447 drivers/mfd/asic3.c asic = gpiochip_get_data(chip); asic 451 drivers/mfd/asic3.c dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", asic 456 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 458 drivers/mfd/asic3.c out_reg = asic3_read_register(asic, gpio_base + ASIC3_GPIO_DIRECTION); asic 466 drivers/mfd/asic3.c asic3_write_register(asic, gpio_base + ASIC3_GPIO_DIRECTION, out_reg); asic 468 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 491 drivers/mfd/asic3.c struct asic3 *asic; asic 493 drivers/mfd/asic3.c asic = gpiochip_get_data(chip); asic 497 drivers/mfd/asic3.c dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", asic 502 drivers/mfd/asic3.c return !!(asic3_read_register(asic, asic 512 drivers/mfd/asic3.c struct asic3 *asic; asic 514 drivers/mfd/asic3.c asic = gpiochip_get_data(chip); asic 518 drivers/mfd/asic3.c dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", asic 525 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 527 drivers/mfd/asic3.c out_reg = asic3_read_register(asic, gpio_base + ASIC3_GPIO_OUT); asic 534 drivers/mfd/asic3.c asic3_write_register(asic, gpio_base + ASIC3_GPIO_OUT, out_reg); asic 536 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 541 drivers/mfd/asic3.c struct asic3 *asic = gpiochip_get_data(chip); asic 543 drivers/mfd/asic3.c return asic->irq_base + offset; asic 549 drivers/mfd/asic3.c struct asic3 *asic = platform_get_drvdata(pdev); asic 560 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_GPIO_OFFSET(A, MASK), 0xffff); asic 561 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_GPIO_OFFSET(B, MASK), 0xffff); asic 562 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_GPIO_OFFSET(C, MASK), 0xffff); asic 563 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_GPIO_OFFSET(D, MASK), 0xffff); asic 583 drivers/mfd/asic3.c asic3_write_register(asic, asic 587 drivers/mfd/asic3.c asic3_write_register(asic, asic 590 drivers/mfd/asic3.c asic3_write_register(asic, asic 596 drivers/mfd/asic3.c return gpiochip_add_data(&asic->gpio, asic); asic 601 drivers/mfd/asic3.c struct asic3 *asic = platform_get_drvdata(pdev); asic 603 drivers/mfd/asic3.c gpiochip_remove(&asic->gpio); asic 607 drivers/mfd/asic3.c static void asic3_clk_enable(struct asic3 *asic, struct asic3_clk *clk) asic 612 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 614 drivers/mfd/asic3.c cdex = asic3_read_register(asic, ASIC3_OFFSET(CLOCK, CDEX)); asic 616 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_OFFSET(CLOCK, CDEX), cdex); asic 618 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 621 drivers/mfd/asic3.c static void asic3_clk_disable(struct asic3 *asic, struct asic3_clk *clk) asic 628 drivers/mfd/asic3.c raw_spin_lock_irqsave(&asic->lock, flags); asic 630 drivers/mfd/asic3.c cdex = asic3_read_register(asic, ASIC3_OFFSET(CLOCK, CDEX)); asic 632 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_OFFSET(CLOCK, CDEX), cdex); asic 634 drivers/mfd/asic3.c raw_spin_unlock_irqrestore(&asic->lock, flags); asic 658 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 661 drivers/mfd/asic3.c asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); asic 662 drivers/mfd/asic3.c asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); asic 663 drivers/mfd/asic3.c asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); asic 667 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET), asic 670 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET), asic 673 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), asic 682 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 684 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), asic 687 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); asic 688 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); asic 689 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); asic 706 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 708 drivers/mfd/asic3.c tmio_core_mmc_pwr(asic->tmio_cnf, 1 - asic->bus_shift, state); asic 713 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 715 drivers/mfd/asic3.c tmio_core_mmc_clk_div(asic->tmio_cnf, 1 - asic->bus_shift, state); asic 740 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 743 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), asic 745 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), asic 747 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), asic 749 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), asic 752 drivers/mfd/asic3.c asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); asic 756 drivers/mfd/asic3.c asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); asic 760 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), asic 763 drivers/mfd/asic3.c asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_SD_HOST]); asic 764 drivers/mfd/asic3.c asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_SD_BUS]); asic 767 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), asic 771 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), asic 775 drivers/mfd/asic3.c tmio_core_mmc_enable(asic->tmio_cnf, 1 - asic->bus_shift, asic 783 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 786 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), asic 790 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_SD_HOST]); asic 791 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_SD_BUS]); asic 792 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); asic 793 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); asic 818 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 820 drivers/mfd/asic3.c asic3_clk_enable(asic, &asic->clocks[clock_ledn[cell->id]]); asic 828 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 830 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[clock_ledn[cell->id]]); asic 838 drivers/mfd/asic3.c struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); asic 840 drivers/mfd/asic3.c while (asic3_gpio_get(&asic->gpio, ASIC3_GPIO(C, cell->id)) != 0) asic 843 drivers/mfd/asic3.c asic3_clk_disable(asic, &asic->clocks[clock_ledn[cell->id]]); asic 879 drivers/mfd/asic3.c struct asic3 *asic = platform_get_drvdata(pdev); asic 885 drivers/mfd/asic3.c dev_dbg(asic->dev, "no SDIO MEM resource\n"); asic 889 drivers/mfd/asic3.c dev_dbg(asic->dev, "no SDIO IRQ resource\n"); asic 892 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), asic 895 drivers/mfd/asic3.c ds1wm_resources[0].start >>= asic->bus_shift; asic 896 drivers/mfd/asic3.c ds1wm_resources[0].end >>= asic->bus_shift; asic 900 drivers/mfd/asic3.c asic->tmio_cnf = ioremap((ASIC3_SD_CONFIG_BASE >> asic 901 drivers/mfd/asic3.c asic->bus_shift) + mem_sdio->start, asic 902 drivers/mfd/asic3.c ASIC3_SD_CONFIG_SIZE >> asic->bus_shift); asic 903 drivers/mfd/asic3.c if (!asic->tmio_cnf) { asic 905 drivers/mfd/asic3.c dev_dbg(asic->dev, "Couldn't ioremap SD_CONFIG\n"); asic 909 drivers/mfd/asic3.c asic3_mmc_resources[0].start >>= asic->bus_shift; asic 910 drivers/mfd/asic3.c asic3_mmc_resources[0].end >>= asic->bus_shift; asic 915 drivers/mfd/asic3.c &asic3_cell_ds1wm, 1, mem, asic->irq_base, NULL); asic 945 drivers/mfd/asic3.c struct asic3 *asic = platform_get_drvdata(pdev); asic 948 drivers/mfd/asic3.c iounmap(asic->tmio_cnf); asic 955 drivers/mfd/asic3.c struct asic3 *asic; asic 960 drivers/mfd/asic3.c asic = devm_kzalloc(&pdev->dev, asic 962 drivers/mfd/asic3.c if (!asic) asic 965 drivers/mfd/asic3.c raw_spin_lock_init(&asic->lock); asic 966 drivers/mfd/asic3.c platform_set_drvdata(pdev, asic); asic 967 drivers/mfd/asic3.c asic->dev = &pdev->dev; asic 971 drivers/mfd/asic3.c dev_err(asic->dev, "no MEM resource\n"); asic 975 drivers/mfd/asic3.c asic->mapping = ioremap(mem->start, resource_size(mem)); asic 976 drivers/mfd/asic3.c if (!asic->mapping) { asic 977 drivers/mfd/asic3.c dev_err(asic->dev, "Couldn't ioremap\n"); asic 981 drivers/mfd/asic3.c asic->irq_base = pdata->irq_base; asic 984 drivers/mfd/asic3.c asic->bus_shift = 2 - (resource_size(mem) >> 12); asic 987 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), clksel); asic 991 drivers/mfd/asic3.c dev_err(asic->dev, "Couldn't probe IRQs\n"); asic 995 drivers/mfd/asic3.c asic->gpio.label = "asic3"; asic 996 drivers/mfd/asic3.c asic->gpio.base = pdata->gpio_base; asic 997 drivers/mfd/asic3.c asic->gpio.ngpio = ASIC3_NUM_GPIOS; asic 998 drivers/mfd/asic3.c asic->gpio.get = asic3_gpio_get; asic 999 drivers/mfd/asic3.c asic->gpio.set = asic3_gpio_set; asic 1000 drivers/mfd/asic3.c asic->gpio.direction_input = asic3_gpio_direction_input; asic 1001 drivers/mfd/asic3.c asic->gpio.direction_output = asic3_gpio_direction_output; asic 1002 drivers/mfd/asic3.c asic->gpio.to_irq = asic3_gpio_to_irq; asic 1008 drivers/mfd/asic3.c dev_err(asic->dev, "GPIO probe failed\n"); asic 1015 drivers/mfd/asic3.c memcpy(asic->clocks, asic3_clk_init, sizeof(asic3_clk_init)); asic 1019 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), asic 1022 drivers/mfd/asic3.c dev_info(asic->dev, "ASIC3 Core driver\n"); asic 1030 drivers/mfd/asic3.c iounmap(asic->mapping); asic 1038 drivers/mfd/asic3.c struct asic3 *asic = platform_get_drvdata(pdev); asic 1040 drivers/mfd/asic3.c asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), asic 1050 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), 0); asic 1052 drivers/mfd/asic3.c iounmap(asic->mapping); asic 36 drivers/mfd/htc-pasic3.c struct pasic3_data *asic = dev_get_drvdata(dev); asic 37 drivers/mfd/htc-pasic3.c int bus_shift = asic->bus_shift; asic 38 drivers/mfd/htc-pasic3.c void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); asic 39 drivers/mfd/htc-pasic3.c void __iomem *data = asic->mapping + (REG_DATA << bus_shift); asic 51 drivers/mfd/htc-pasic3.c struct pasic3_data *asic = dev_get_drvdata(dev); asic 52 drivers/mfd/htc-pasic3.c int bus_shift = asic->bus_shift; asic 53 drivers/mfd/htc-pasic3.c void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); asic 54 drivers/mfd/htc-pasic3.c void __iomem *data = asic->mapping + (REG_DATA << bus_shift); asic 128 drivers/mfd/htc-pasic3.c struct pasic3_data *asic; asic 147 drivers/mfd/htc-pasic3.c asic = devm_kzalloc(dev, sizeof(struct pasic3_data), GFP_KERNEL); asic 148 drivers/mfd/htc-pasic3.c if (!asic) asic 151 drivers/mfd/htc-pasic3.c platform_set_drvdata(pdev, asic); asic 153 drivers/mfd/htc-pasic3.c asic->mapping = ioremap(r->start, resource_size(r)); asic 154 drivers/mfd/htc-pasic3.c if (!asic->mapping) { asic 160 drivers/mfd/htc-pasic3.c asic->bus_shift = (resource_size(r) - 5) >> 3; asic 165 drivers/mfd/htc-pasic3.c ds1wm_resources[0].end = (5 << asic->bus_shift) - 1; asic 186 drivers/mfd/htc-pasic3.c struct pasic3_data *asic = platform_get_drvdata(pdev); asic 191 drivers/mfd/htc-pasic3.c iounmap(asic->mapping); asic 395 drivers/misc/habanalabs/command_submission.c struct asic_fixed_properties *asic = &hdev->asic_prop; asic 403 drivers/misc/habanalabs/command_submission.c hw_queue_prop = &asic->hw_queues_props[chunk->queue_index]; asic 598 drivers/misc/habanalabs/hw_queue.c struct asic_fixed_properties *asic = &hdev->asic_prop; asic 614 drivers/misc/habanalabs/hw_queue.c q->queue_type = asic->hw_queues_props[i].type; asic 157 drivers/parisc/gsc.c void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp) asic 159 drivers/parisc/gsc.c int irq = asic->global_irq[local_irq]; asic 162 drivers/parisc/gsc.c irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic); asic 166 drivers/parisc/gsc.c asic->global_irq[local_irq] = irq; asic 44 drivers/parisc/gsc.h void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp); asic 130 drivers/staging/comedi/drivers/pcmuio.c int asic) asic 132 drivers/staging/comedi/drivers/pcmuio.c return dev->iobase + (asic * PCMUIO_ASIC_IOSIZE); asic 154 drivers/staging/comedi/drivers/pcmuio.c int asic, int page, int port) asic 157 drivers/staging/comedi/drivers/pcmuio.c struct pcmuio_asic *chip = &devpriv->asics[asic]; asic 158 drivers/staging/comedi/drivers/pcmuio.c unsigned long iobase = pcmuio_asic_iobase(dev, asic); asic 177 drivers/staging/comedi/drivers/pcmuio.c int asic, int page, int port) asic 180 drivers/staging/comedi/drivers/pcmuio.c struct pcmuio_asic *chip = &devpriv->asics[asic]; asic 181 drivers/staging/comedi/drivers/pcmuio.c unsigned long iobase = pcmuio_asic_iobase(dev, asic); asic 217 drivers/staging/comedi/drivers/pcmuio.c int asic = pcmuio_subdevice_to_asic(s); asic 235 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, val, asic, 0, port); asic 239 drivers/staging/comedi/drivers/pcmuio.c val = pcmuio_read(dev, asic, 0, port); asic 252 drivers/staging/comedi/drivers/pcmuio.c int asic = pcmuio_subdevice_to_asic(s); asic 261 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, s->io_bits, asic, 0, port); asic 269 drivers/staging/comedi/drivers/pcmuio.c int asic; asic 271 drivers/staging/comedi/drivers/pcmuio.c for (asic = 0; asic < board->num_asics; ++asic) { asic 273 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, 0, asic, 0, 0); asic 274 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, 0, asic, 0, 3); asic 277 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, 0, asic, PCMUIO_PAGE_POL, 0); asic 278 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, 0, asic, PCMUIO_PAGE_ENAB, 0); asic 279 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, 0, asic, PCMUIO_PAGE_INT_ID, 0); asic 288 drivers/staging/comedi/drivers/pcmuio.c int asic = pcmuio_subdevice_to_asic(s); asic 289 drivers/staging/comedi/drivers/pcmuio.c struct pcmuio_asic *chip = &devpriv->asics[asic]; asic 296 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, 0, asic, PCMUIO_PAGE_ENAB, 0); asic 304 drivers/staging/comedi/drivers/pcmuio.c int asic = pcmuio_subdevice_to_asic(s); asic 305 drivers/staging/comedi/drivers/pcmuio.c struct pcmuio_asic *chip = &devpriv->asics[asic]; asic 338 drivers/staging/comedi/drivers/pcmuio.c static int pcmuio_handle_asic_interrupt(struct comedi_device *dev, int asic) asic 341 drivers/staging/comedi/drivers/pcmuio.c struct comedi_subdevice *s = &dev->subdevices[asic * 2]; asic 342 drivers/staging/comedi/drivers/pcmuio.c unsigned long iobase = pcmuio_asic_iobase(dev, asic); asic 351 drivers/staging/comedi/drivers/pcmuio.c val = pcmuio_read(dev, asic, PCMUIO_PAGE_INT_ID, 0); asic 352 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, 0, asic, PCMUIO_PAGE_INT_ID, 0); asic 379 drivers/staging/comedi/drivers/pcmuio.c int asic = pcmuio_subdevice_to_asic(s); asic 380 drivers/staging/comedi/drivers/pcmuio.c struct pcmuio_asic *chip = &devpriv->asics[asic]; asic 403 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, pol_bits, asic, PCMUIO_PAGE_POL, 0); asic 404 drivers/staging/comedi/drivers/pcmuio.c pcmuio_write(dev, bits, asic, PCMUIO_PAGE_ENAB, 0); asic 410 drivers/staging/comedi/drivers/pcmuio.c int asic = pcmuio_subdevice_to_asic(s); asic 411 drivers/staging/comedi/drivers/pcmuio.c struct pcmuio_asic *chip = &devpriv->asics[asic]; asic 428 drivers/staging/comedi/drivers/pcmuio.c int asic = pcmuio_subdevice_to_asic(s); asic 429 drivers/staging/comedi/drivers/pcmuio.c struct pcmuio_asic *chip = &devpriv->asics[asic]; asic 452 drivers/staging/comedi/drivers/pcmuio.c int asic = pcmuio_subdevice_to_asic(s); asic 453 drivers/staging/comedi/drivers/pcmuio.c struct pcmuio_asic *chip = &devpriv->asics[asic]; asic 310 include/linux/mfd/asic3.h extern void asic3_write_register(struct asic3 *asic, unsigned int reg, u32 val); asic 311 include/linux/mfd/asic3.h extern u32 asic3_read_register(struct asic3 *asic, unsigned int reg); asic 180 sound/pci/echoaudio/echoaudio_dsp.c static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic) asic 187 sound/pci/echoaudio/echoaudio_dsp.c err = get_firmware(&fw, chip, asic); asic 36 sound/pci/echoaudio/gina24_dsp.c static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic); asic 126 sound/pci/echoaudio/gina24_dsp.c short asic; asic 136 sound/pci/echoaudio/gina24_dsp.c asic = FW_GINA24_361_ASIC; asic 138 sound/pci/echoaudio/gina24_dsp.c asic = FW_GINA24_301_ASIC; asic 140 sound/pci/echoaudio/gina24_dsp.c err = load_asic_generic(chip, DSP_FNC_LOAD_GINA24_ASIC, asic); asic 144 sound/pci/echoaudio/gina24_dsp.c chip->asic_code = asic; asic 34 sound/pci/echoaudio/layla20_dsp.c static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic); asic 35 sound/pci/echoaudio/layla24_dsp.c static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic); asic 298 sound/pci/echoaudio/layla24_dsp.c static int switch_asic(struct echoaudio *chip, short asic) asic 303 sound/pci/echoaudio/layla24_dsp.c if (asic != chip->asic_code) { asic 314 sound/pci/echoaudio/layla24_dsp.c asic) < 0) { asic 320 sound/pci/echoaudio/layla24_dsp.c chip->asic_code = asic; asic 334 sound/pci/echoaudio/layla24_dsp.c short asic; asic 343 sound/pci/echoaudio/layla24_dsp.c asic = FW_LAYLA24_2S_ASIC; asic 348 sound/pci/echoaudio/layla24_dsp.c asic = FW_LAYLA24_2A_ASIC; asic 364 sound/pci/echoaudio/layla24_dsp.c if (switch_asic(chip, asic) < 0) asic 36 sound/pci/echoaudio/mona_dsp.c static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic); asic 119 sound/pci/echoaudio/mona_dsp.c short asic; asic 127 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_361_1_ASIC48; asic 129 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_301_1_ASIC48; asic 131 sound/pci/echoaudio/mona_dsp.c err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC, asic); asic 135 sound/pci/echoaudio/mona_dsp.c chip->asic_code = asic; asic 165 sound/pci/echoaudio/mona_dsp.c short asic; asic 172 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_361_1_ASIC96; asic 174 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_361_1_ASIC48; asic 177 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_301_1_ASIC96; asic 179 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_301_1_ASIC48; asic 182 sound/pci/echoaudio/mona_dsp.c if (asic != chip->asic_code) { asic 185 sound/pci/echoaudio/mona_dsp.c asic); asic 188 sound/pci/echoaudio/mona_dsp.c chip->asic_code = asic; asic 199 sound/pci/echoaudio/mona_dsp.c short asic; asic 217 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_361_1_ASIC96; asic 219 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_301_1_ASIC96; asic 222 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_361_1_ASIC48; asic 224 sound/pci/echoaudio/mona_dsp.c asic = FW_MONA_301_1_ASIC48; asic 228 sound/pci/echoaudio/mona_dsp.c if (asic != chip->asic_code) { asic 233 sound/pci/echoaudio/mona_dsp.c asic); asic 238 sound/pci/echoaudio/mona_dsp.c chip->asic_code = asic;