array_check       356 drivers/gpu/drm/radeon/r600_cs.c 	struct array_mode_checker array_check;
array_check       381 drivers/gpu/drm/radeon/r600_cs.c 	array_check.array_mode = array_mode;
array_check       382 drivers/gpu/drm/radeon/r600_cs.c 	array_check.group_size = track->group_size;
array_check       383 drivers/gpu/drm/radeon/r600_cs.c 	array_check.nbanks = track->nbanks;
array_check       384 drivers/gpu/drm/radeon/r600_cs.c 	array_check.npipes = track->npipes;
array_check       385 drivers/gpu/drm/radeon/r600_cs.c 	array_check.nsamples = nsamples;
array_check       386 drivers/gpu/drm/radeon/r600_cs.c 	array_check.blocksize = r600_fmt_get_blocksize(format);
array_check       387 drivers/gpu/drm/radeon/r600_cs.c 	if (r600_get_array_mode_alignment(&array_check,
array_check       525 drivers/gpu/drm/radeon/r600_cs.c 	struct array_mode_checker array_check;
array_check       577 drivers/gpu/drm/radeon/r600_cs.c 		array_check.array_mode = array_mode;
array_check       578 drivers/gpu/drm/radeon/r600_cs.c 		array_check.group_size = track->group_size;
array_check       579 drivers/gpu/drm/radeon/r600_cs.c 		array_check.nbanks = track->nbanks;
array_check       580 drivers/gpu/drm/radeon/r600_cs.c 		array_check.npipes = track->npipes;
array_check       581 drivers/gpu/drm/radeon/r600_cs.c 		array_check.nsamples = track->nsamples;
array_check       582 drivers/gpu/drm/radeon/r600_cs.c 		array_check.blocksize = bpe;
array_check       583 drivers/gpu/drm/radeon/r600_cs.c 		if (r600_get_array_mode_alignment(&array_check,
array_check      1482 drivers/gpu/drm/radeon/r600_cs.c 	struct array_mode_checker array_check;
array_check      1515 drivers/gpu/drm/radeon/r600_cs.c 	array_check.array_mode = G_038000_TILE_MODE(word0);
array_check      1516 drivers/gpu/drm/radeon/r600_cs.c 	array_check.group_size = track->group_size;
array_check      1517 drivers/gpu/drm/radeon/r600_cs.c 	array_check.nbanks = track->nbanks;
array_check      1518 drivers/gpu/drm/radeon/r600_cs.c 	array_check.npipes = track->npipes;
array_check      1519 drivers/gpu/drm/radeon/r600_cs.c 	array_check.nsamples = 1;
array_check      1520 drivers/gpu/drm/radeon/r600_cs.c 	array_check.blocksize = r600_fmt_get_blocksize(format);
array_check      1542 drivers/gpu/drm/radeon/r600_cs.c 		array_check.nsamples = 1 << llevel;
array_check      1555 drivers/gpu/drm/radeon/r600_cs.c 	if (r600_get_array_mode_alignment(&array_check,
array_check      1590 drivers/gpu/drm/radeon/r600_cs.c 	r600_texture_size(nfaces, blevel, llevel, w0, h0, d0, array_check.nsamples, format,
array_check      1597 drivers/gpu/drm/radeon/r600_cs.c 			 array_check.array_mode, format, word2,