arcpgu             21 drivers/gpu/drm/arc/arcpgu.h static inline void arc_pgu_write(struct arcpgu_drm_private *arcpgu,
arcpgu             24 drivers/gpu/drm/arc/arcpgu.h 	iowrite32(value, arcpgu->regs + reg);
arcpgu             27 drivers/gpu/drm/arc/arcpgu.h static inline u32 arc_pgu_read(struct arcpgu_drm_private *arcpgu,
arcpgu             30 drivers/gpu/drm/arc/arcpgu.h 	return ioread32(arcpgu->regs + reg);
arcpgu             30 drivers/gpu/drm/arc/arcpgu_crtc.c 	struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
arcpgu             45 drivers/gpu/drm/arc/arcpgu_crtc.c 		arc_pgu_write(arcpgu, ARCPGU_REG_CTRL,
arcpgu             46 drivers/gpu/drm/arc/arcpgu_crtc.c 			      arc_pgu_read(arcpgu, ARCPGU_REG_CTRL) |
arcpgu             63 drivers/gpu/drm/arc/arcpgu_crtc.c 	struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
arcpgu             67 drivers/gpu/drm/arc/arcpgu_crtc.c 	rate = clk_round_rate(arcpgu->clk, clk_rate);
arcpgu             76 drivers/gpu/drm/arc/arcpgu_crtc.c 	struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
arcpgu             80 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_FMT,
arcpgu             83 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_HSYNC,
arcpgu             87 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_VSYNC,
arcpgu             91 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_ACTIVE,
arcpgu             95 drivers/gpu/drm/arc/arcpgu_crtc.c 	val = arc_pgu_read(arcpgu, ARCPGU_REG_CTRL);
arcpgu            107 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, val);
arcpgu            108 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_STRIDE, 0);
arcpgu            109 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_START_SET, 1);
arcpgu            113 drivers/gpu/drm/arc/arcpgu_crtc.c 	clk_set_rate(arcpgu->clk, m->crtc_clock * 1000);
arcpgu            119 drivers/gpu/drm/arc/arcpgu_crtc.c 	struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
arcpgu            121 drivers/gpu/drm/arc/arcpgu_crtc.c 	clk_prepare_enable(arcpgu->clk);
arcpgu            122 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_CTRL,
arcpgu            123 drivers/gpu/drm/arc/arcpgu_crtc.c 		      arc_pgu_read(arcpgu, ARCPGU_REG_CTRL) |
arcpgu            130 drivers/gpu/drm/arc/arcpgu_crtc.c 	struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
arcpgu            132 drivers/gpu/drm/arc/arcpgu_crtc.c 	clk_disable_unprepare(arcpgu->clk);
arcpgu            133 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_CTRL,
arcpgu            134 drivers/gpu/drm/arc/arcpgu_crtc.c 			      arc_pgu_read(arcpgu, ARCPGU_REG_CTRL) &
arcpgu            163 drivers/gpu/drm/arc/arcpgu_crtc.c 	struct arcpgu_drm_private *arcpgu;
arcpgu            169 drivers/gpu/drm/arc/arcpgu_crtc.c 	arcpgu = crtc_to_arcpgu_priv(plane->state->crtc);
arcpgu            171 drivers/gpu/drm/arc/arcpgu_crtc.c 	arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->paddr);
arcpgu            194 drivers/gpu/drm/arc/arcpgu_crtc.c 	struct arcpgu_drm_private *arcpgu = drm->dev_private;
arcpgu            214 drivers/gpu/drm/arc/arcpgu_crtc.c 	arcpgu->plane = plane;
arcpgu            221 drivers/gpu/drm/arc/arcpgu_crtc.c 	struct arcpgu_drm_private *arcpgu = drm->dev_private;
arcpgu            229 drivers/gpu/drm/arc/arcpgu_crtc.c 	ret = drm_crtc_init_with_planes(drm, &arcpgu->crtc, primary, NULL,
arcpgu            236 drivers/gpu/drm/arc/arcpgu_crtc.c 	drm_crtc_helper_add(&arcpgu->crtc, &arc_pgu_crtc_helper_funcs);
arcpgu             47 drivers/gpu/drm/arc/arcpgu_drv.c 	struct arcpgu_drm_private *arcpgu;
arcpgu             52 drivers/gpu/drm/arc/arcpgu_drv.c 	arcpgu = devm_kzalloc(&pdev->dev, sizeof(*arcpgu), GFP_KERNEL);
arcpgu             53 drivers/gpu/drm/arc/arcpgu_drv.c 	if (arcpgu == NULL)
arcpgu             56 drivers/gpu/drm/arc/arcpgu_drv.c 	drm->dev_private = arcpgu;
arcpgu             58 drivers/gpu/drm/arc/arcpgu_drv.c 	arcpgu->clk = devm_clk_get(drm->dev, "pxlclk");
arcpgu             59 drivers/gpu/drm/arc/arcpgu_drv.c 	if (IS_ERR(arcpgu->clk))
arcpgu             60 drivers/gpu/drm/arc/arcpgu_drv.c 		return PTR_ERR(arcpgu->clk);
arcpgu             65 drivers/gpu/drm/arc/arcpgu_drv.c 	arcpgu->regs = devm_ioremap_resource(&pdev->dev, res);
arcpgu             66 drivers/gpu/drm/arc/arcpgu_drv.c 	if (IS_ERR(arcpgu->regs))
arcpgu             67 drivers/gpu/drm/arc/arcpgu_drv.c 		return PTR_ERR(arcpgu->regs);
arcpgu             70 drivers/gpu/drm/arc/arcpgu_drv.c 		 arc_pgu_read(arcpgu, ARCPGU_REG_ID));
arcpgu            117 drivers/gpu/drm/arc/arcpgu_drv.c 	struct arcpgu_drm_private *arcpgu = drm->dev_private;
arcpgu            118 drivers/gpu/drm/arc/arcpgu_drv.c 	unsigned long clkrate = clk_get_rate(arcpgu->clk);
arcpgu            119 drivers/gpu/drm/arc/arcpgu_drv.c 	unsigned long mode_clock = arcpgu->crtc.mode.crtc_clock * 1000;