arb_registers    1757 drivers/gpu/drm/radeon/btc_dpm.c 	struct evergreen_arb_registers *arb_registers =
arb_registers    1760 drivers/gpu/drm/radeon/btc_dpm.c 	arb_registers->mc_arb_dram_timing = RREG32(MC_ARB_DRAM_TIMING);
arb_registers    1761 drivers/gpu/drm/radeon/btc_dpm.c 	arb_registers->mc_arb_dram_timing2 = RREG32(MC_ARB_DRAM_TIMING2);
arb_registers    1762 drivers/gpu/drm/radeon/btc_dpm.c 	arb_registers->mc_arb_rfsh_rate = RREG32(MC_ARB_RFSH_RATE);
arb_registers    1763 drivers/gpu/drm/radeon/btc_dpm.c 	arb_registers->mc_arb_burst_time = RREG32(MC_ARB_BURST_TIME);
arb_registers    1768 drivers/gpu/drm/radeon/btc_dpm.c 				   struct evergreen_arb_registers *arb_registers)
arb_registers    1772 drivers/gpu/drm/radeon/btc_dpm.c 	WREG32(MC_ARB_DRAM_TIMING,  arb_registers->mc_arb_dram_timing);
arb_registers    1773 drivers/gpu/drm/radeon/btc_dpm.c 	WREG32(MC_ARB_DRAM_TIMING2, arb_registers->mc_arb_dram_timing2);
arb_registers    1775 drivers/gpu/drm/radeon/btc_dpm.c 	val = (arb_registers->mc_arb_rfsh_rate & POWERMODE0_MASK) >>
arb_registers    1779 drivers/gpu/drm/radeon/btc_dpm.c 	val = (arb_registers->mc_arb_burst_time & STATE0_MASK) >>