apicid_mask 37 arch/x86/kernel/apic/x2apic_uv_x.c unsigned int apicid_mask; apicid_mask 221 arch/x86/kernel/apic/x2apic_uv_x.c uv_cpuid.apicid_mask = (~(-1 << sid_shift)); apicid_mask 232 arch/x86/kernel/apic/x2apic_uv_x.c pr_info("UV: apicid_shift:%d apicid_mask:0x%x\n", uv_cpuid.apicid_shift, uv_cpuid.apicid_mask); apicid_mask 243 arch/x86/kernel/apic/x2apic_uv_x.c union uv1h_lb_target_physical_apic_id_mask_u apicid_mask; apicid_mask 246 arch/x86/kernel/apic/x2apic_uv_x.c apicid_mask.v = uv_early_read_mmr(UV1H_LB_TARGET_PHYSICAL_APIC_ID_MASK); apicid_mask 247 arch/x86/kernel/apic/x2apic_uv_x.c uv_apicid_hibits = apicid_mask.s1.bit_enables & UV_APICID_HIBIT_MASK;