apc               190 arch/mips/pci/pci-ar2315.c static inline u32 ar2315_pci_reg_read(struct ar2315_pci_ctrl *apc, u32 reg)
apc               192 arch/mips/pci/pci-ar2315.c 	return __raw_readl(apc->mmr_mem + reg);
apc               195 arch/mips/pci/pci-ar2315.c static inline void ar2315_pci_reg_write(struct ar2315_pci_ctrl *apc, u32 reg,
apc               198 arch/mips/pci/pci-ar2315.c 	__raw_writel(val, apc->mmr_mem + reg);
apc               201 arch/mips/pci/pci-ar2315.c static inline void ar2315_pci_reg_mask(struct ar2315_pci_ctrl *apc, u32 reg,
apc               204 arch/mips/pci/pci-ar2315.c 	u32 ret = ar2315_pci_reg_read(apc, reg);
apc               208 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_write(apc, reg, ret);
apc               211 arch/mips/pci/pci-ar2315.c static int ar2315_pci_cfg_access(struct ar2315_pci_ctrl *apc, unsigned devfn,
apc               226 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_write(apc, AR2315_PCI_ISR, AR2315_PCI_INT_ABORT);
apc               228 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_MISC_CONFIG, 0,
apc               233 arch/mips/pci/pci-ar2315.c 	value = __raw_readl(apc->cfg_mem + addr);
apc               235 arch/mips/pci/pci-ar2315.c 	isr = ar2315_pci_reg_read(apc, AR2315_PCI_ISR);
apc               242 arch/mips/pci/pci-ar2315.c 		__raw_writel(value, apc->cfg_mem + addr);
apc               243 arch/mips/pci/pci-ar2315.c 		isr = ar2315_pci_reg_read(apc, AR2315_PCI_ISR);
apc               253 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_write(apc, AR2315_PCI_ISR, AR2315_PCI_INT_ABORT);
apc               259 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL,
apc               266 arch/mips/pci/pci-ar2315.c static inline int ar2315_pci_local_cfg_rd(struct ar2315_pci_ctrl *apc,
apc               269 arch/mips/pci/pci-ar2315.c 	return ar2315_pci_cfg_access(apc, devfn, where, sizeof(u32), val,
apc               273 arch/mips/pci/pci-ar2315.c static inline int ar2315_pci_local_cfg_wr(struct ar2315_pci_ctrl *apc,
apc               276 arch/mips/pci/pci-ar2315.c 	return ar2315_pci_cfg_access(apc, devfn, where, sizeof(u32), &val,
apc               283 arch/mips/pci/pci-ar2315.c 	struct ar2315_pci_ctrl *apc = ar2315_pci_bus_to_apc(bus);
apc               288 arch/mips/pci/pci-ar2315.c 	return ar2315_pci_cfg_access(apc, devfn, where, size, value, false);
apc               294 arch/mips/pci/pci-ar2315.c 	struct ar2315_pci_ctrl *apc = ar2315_pci_bus_to_apc(bus);
apc               299 arch/mips/pci/pci-ar2315.c 	return ar2315_pci_cfg_access(apc, devfn, where, size, &value, true);
apc               307 arch/mips/pci/pci-ar2315.c static int ar2315_pci_host_setup(struct ar2315_pci_ctrl *apc)
apc               313 arch/mips/pci/pci-ar2315.c 	res = ar2315_pci_local_cfg_rd(apc, devfn, PCI_VENDOR_ID, &id);
apc               318 arch/mips/pci/pci-ar2315.c 	ar2315_pci_local_cfg_wr(apc, devfn, PCI_BASE_ADDRESS_0,
apc               320 arch/mips/pci/pci-ar2315.c 	ar2315_pci_local_cfg_wr(apc, devfn, PCI_BASE_ADDRESS_1,
apc               322 arch/mips/pci/pci-ar2315.c 	ar2315_pci_local_cfg_wr(apc, devfn, PCI_BASE_ADDRESS_2,
apc               326 arch/mips/pci/pci-ar2315.c 	ar2315_pci_local_cfg_wr(apc, devfn, PCI_COMMAND, PCI_COMMAND_MEMORY |
apc               336 arch/mips/pci/pci-ar2315.c 	struct ar2315_pci_ctrl *apc = irq_desc_get_handler_data(desc);
apc               337 arch/mips/pci/pci-ar2315.c 	u32 pending = ar2315_pci_reg_read(apc, AR2315_PCI_ISR) &
apc               338 arch/mips/pci/pci-ar2315.c 		      ar2315_pci_reg_read(apc, AR2315_PCI_IMR);
apc               342 arch/mips/pci/pci-ar2315.c 		pci_irq = irq_find_mapping(apc->domain, __ffs(pending));
apc               352 arch/mips/pci/pci-ar2315.c 	struct ar2315_pci_ctrl *apc = irq_data_get_irq_chip_data(d);
apc               354 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, BIT(d->hwirq), 0);
apc               359 arch/mips/pci/pci-ar2315.c 	struct ar2315_pci_ctrl *apc = irq_data_get_irq_chip_data(d);
apc               362 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, m, 0);
apc               363 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_write(apc, AR2315_PCI_ISR, m);
apc               368 arch/mips/pci/pci-ar2315.c 	struct ar2315_pci_ctrl *apc = irq_data_get_irq_chip_data(d);
apc               370 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, 0, BIT(d->hwirq));
apc               392 arch/mips/pci/pci-ar2315.c static void ar2315_pci_irq_init(struct ar2315_pci_ctrl *apc)
apc               394 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_IER, AR2315_PCI_IER_ENABLE, 0);
apc               395 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, (AR2315_PCI_INT_ABORT |
apc               398 arch/mips/pci/pci-ar2315.c 	apc->irq_ext = irq_create_mapping(apc->domain, AR2315_PCI_IRQ_EXT);
apc               400 arch/mips/pci/pci-ar2315.c 	irq_set_chained_handler_and_data(apc->irq, ar2315_pci_irq_handler,
apc               401 arch/mips/pci/pci-ar2315.c 					 apc);
apc               405 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_write(apc, AR2315_PCI_ISR, AR2315_PCI_INT_ABORT |
apc               407 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_IER, 0, AR2315_PCI_IER_ENABLE);
apc               412 arch/mips/pci/pci-ar2315.c 	struct ar2315_pci_ctrl *apc;
apc               417 arch/mips/pci/pci-ar2315.c 	apc = devm_kzalloc(dev, sizeof(*apc), GFP_KERNEL);
apc               418 arch/mips/pci/pci-ar2315.c 	if (!apc)
apc               424 arch/mips/pci/pci-ar2315.c 	apc->irq = irq;
apc               428 arch/mips/pci/pci-ar2315.c 	apc->mmr_mem = devm_ioremap_resource(dev, res);
apc               429 arch/mips/pci/pci-ar2315.c 	if (IS_ERR(apc->mmr_mem))
apc               430 arch/mips/pci/pci-ar2315.c 		return PTR_ERR(apc->mmr_mem);
apc               437 arch/mips/pci/pci-ar2315.c 	apc->mem_res.name = "AR2315 PCI mem space";
apc               438 arch/mips/pci/pci-ar2315.c 	apc->mem_res.parent = res;
apc               439 arch/mips/pci/pci-ar2315.c 	apc->mem_res.start = res->start;
apc               440 arch/mips/pci/pci-ar2315.c 	apc->mem_res.end = res->end;
apc               441 arch/mips/pci/pci-ar2315.c 	apc->mem_res.flags = IORESOURCE_MEM;
apc               444 arch/mips/pci/pci-ar2315.c 	apc->cfg_mem = devm_ioremap_nocache(dev, res->start,
apc               446 arch/mips/pci/pci-ar2315.c 	if (!apc->cfg_mem) {
apc               452 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_MISC_CONFIG,
apc               458 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_mask(apc, AR2315_PCI_MISC_CONFIG,
apc               462 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_write(apc, AR2315_PCI_UNCACHE_CFG,
apc               466 arch/mips/pci/pci-ar2315.c 	ar2315_pci_reg_read(apc, AR2315_PCI_UNCACHE_CFG);
apc               470 arch/mips/pci/pci-ar2315.c 	err = ar2315_pci_host_setup(apc);
apc               474 arch/mips/pci/pci-ar2315.c 	apc->domain = irq_domain_add_linear(NULL, AR2315_PCI_IRQ_COUNT,
apc               475 arch/mips/pci/pci-ar2315.c 					    &ar2315_pci_irq_domain_ops, apc);
apc               476 arch/mips/pci/pci-ar2315.c 	if (!apc->domain) {
apc               481 arch/mips/pci/pci-ar2315.c 	ar2315_pci_irq_init(apc);
apc               484 arch/mips/pci/pci-ar2315.c 	apc->io_res.name = "AR2315 IO space";
apc               485 arch/mips/pci/pci-ar2315.c 	apc->io_res.start = 0;
apc               486 arch/mips/pci/pci-ar2315.c 	apc->io_res.end = 0;
apc               487 arch/mips/pci/pci-ar2315.c 	apc->io_res.flags = IORESOURCE_IO,
apc               489 arch/mips/pci/pci-ar2315.c 	apc->pci_ctrl.pci_ops = &ar2315_pci_ops;
apc               490 arch/mips/pci/pci-ar2315.c 	apc->pci_ctrl.mem_resource = &apc->mem_res,
apc               491 arch/mips/pci/pci-ar2315.c 	apc->pci_ctrl.io_resource = &apc->io_res,
apc               493 arch/mips/pci/pci-ar2315.c 	register_pci_controller(&apc->pci_ctrl);
apc               515 arch/mips/pci/pci-ar2315.c 	struct ar2315_pci_ctrl *apc = ar2315_pci_bus_to_apc(dev->bus);
apc               517 arch/mips/pci/pci-ar2315.c 	return slot ? 0 : apc->irq_ext;
apc               107 arch/mips/pci/pci-ar71xx.c static int ar71xx_pci_check_error(struct ar71xx_pci_controller *apc, int quiet)
apc               109 arch/mips/pci/pci-ar71xx.c 	void __iomem *base = apc->cfg_base;
apc               144 arch/mips/pci/pci-ar71xx.c static inline void ar71xx_pci_local_write(struct ar71xx_pci_controller *apc,
apc               147 arch/mips/pci/pci-ar71xx.c 	void __iomem *base = apc->cfg_base;
apc               163 arch/mips/pci/pci-ar71xx.c 	struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
apc               164 arch/mips/pci/pci-ar71xx.c 	void __iomem *base = apc->cfg_base;
apc               173 arch/mips/pci/pci-ar71xx.c 	return ar71xx_pci_check_error(apc, 1);
apc               179 arch/mips/pci/pci-ar71xx.c 	struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
apc               180 arch/mips/pci/pci-ar71xx.c 	void __iomem *base = apc->cfg_base;
apc               203 arch/mips/pci/pci-ar71xx.c 	struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
apc               204 arch/mips/pci/pci-ar71xx.c 	void __iomem *base = apc->cfg_base;
apc               228 arch/mips/pci/pci-ar71xx.c 	struct ar71xx_pci_controller *apc;
apc               232 arch/mips/pci/pci-ar71xx.c 	apc = irq_desc_get_handler_data(desc);
apc               238 arch/mips/pci/pci-ar71xx.c 		generic_handle_irq(apc->irq_base + 0);
apc               241 arch/mips/pci/pci-ar71xx.c 		generic_handle_irq(apc->irq_base + 1);
apc               244 arch/mips/pci/pci-ar71xx.c 		generic_handle_irq(apc->irq_base + 2);
apc               247 arch/mips/pci/pci-ar71xx.c 		generic_handle_irq(apc->irq_base + 4);
apc               255 arch/mips/pci/pci-ar71xx.c 	struct ar71xx_pci_controller *apc;
apc               260 arch/mips/pci/pci-ar71xx.c 	apc = irq_data_get_irq_chip_data(d);
apc               261 arch/mips/pci/pci-ar71xx.c 	irq = d->irq - apc->irq_base;
apc               272 arch/mips/pci/pci-ar71xx.c 	struct ar71xx_pci_controller *apc;
apc               277 arch/mips/pci/pci-ar71xx.c 	apc = irq_data_get_irq_chip_data(d);
apc               278 arch/mips/pci/pci-ar71xx.c 	irq = d->irq - apc->irq_base;
apc               294 arch/mips/pci/pci-ar71xx.c static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
apc               304 arch/mips/pci/pci-ar71xx.c 	apc->irq_base = ATH79_PCI_IRQ_BASE;
apc               305 arch/mips/pci/pci-ar71xx.c 	for (i = apc->irq_base;
apc               306 arch/mips/pci/pci-ar71xx.c 	     i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) {
apc               309 arch/mips/pci/pci-ar71xx.c 		irq_set_chip_data(i, apc);
apc               312 arch/mips/pci/pci-ar71xx.c 	irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
apc               313 arch/mips/pci/pci-ar71xx.c 					 apc);
apc               330 arch/mips/pci/pci-ar71xx.c 	struct ar71xx_pci_controller *apc;
apc               334 arch/mips/pci/pci-ar71xx.c 	apc = devm_kzalloc(&pdev->dev, sizeof(struct ar71xx_pci_controller),
apc               336 arch/mips/pci/pci-ar71xx.c 	if (!apc)
apc               340 arch/mips/pci/pci-ar71xx.c 	apc->cfg_base = devm_ioremap_resource(&pdev->dev, res);
apc               341 arch/mips/pci/pci-ar71xx.c 	if (IS_ERR(apc->cfg_base))
apc               342 arch/mips/pci/pci-ar71xx.c 		return PTR_ERR(apc->cfg_base);
apc               344 arch/mips/pci/pci-ar71xx.c 	apc->irq = platform_get_irq(pdev, 0);
apc               345 arch/mips/pci/pci-ar71xx.c 	if (apc->irq < 0)
apc               352 arch/mips/pci/pci-ar71xx.c 	apc->io_res.parent = res;
apc               353 arch/mips/pci/pci-ar71xx.c 	apc->io_res.name = "PCI IO space";
apc               354 arch/mips/pci/pci-ar71xx.c 	apc->io_res.start = res->start;
apc               355 arch/mips/pci/pci-ar71xx.c 	apc->io_res.end = res->end;
apc               356 arch/mips/pci/pci-ar71xx.c 	apc->io_res.flags = IORESOURCE_IO;
apc               362 arch/mips/pci/pci-ar71xx.c 	apc->mem_res.parent = res;
apc               363 arch/mips/pci/pci-ar71xx.c 	apc->mem_res.name = "PCI memory space";
apc               364 arch/mips/pci/pci-ar71xx.c 	apc->mem_res.start = res->start;
apc               365 arch/mips/pci/pci-ar71xx.c 	apc->mem_res.end = res->end;
apc               366 arch/mips/pci/pci-ar71xx.c 	apc->mem_res.flags = IORESOURCE_MEM;
apc               373 arch/mips/pci/pci-ar71xx.c 	ar71xx_pci_local_write(apc, PCI_COMMAND, 4, t);
apc               376 arch/mips/pci/pci-ar71xx.c 	ar71xx_pci_check_error(apc, 1);
apc               378 arch/mips/pci/pci-ar71xx.c 	ar71xx_pci_irq_init(apc);
apc               380 arch/mips/pci/pci-ar71xx.c 	apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
apc               381 arch/mips/pci/pci-ar71xx.c 	apc->pci_ctrl.mem_resource = &apc->mem_res;
apc               382 arch/mips/pci/pci-ar71xx.c 	apc->pci_ctrl.io_resource = &apc->io_res;
apc               384 arch/mips/pci/pci-ar71xx.c 	register_pci_controller(&apc->pci_ctrl);
apc                56 arch/mips/pci/pci-ar724x.c static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
apc                60 arch/mips/pci/pci-ar724x.c 	reset = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET);
apc                73 arch/mips/pci/pci-ar724x.c static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
apc                82 arch/mips/pci/pci-ar724x.c 	if (!apc->link_up)
apc                85 arch/mips/pci/pci-ar724x.c 	base = apc->crp_base;
apc               116 arch/mips/pci/pci-ar724x.c 	struct ar724x_pci_controller *apc;
apc               120 arch/mips/pci/pci-ar724x.c 	apc = pci_bus_to_ar724x_controller(bus);
apc               121 arch/mips/pci/pci-ar724x.c 	if (!apc->link_up)
apc               127 arch/mips/pci/pci-ar724x.c 	base = apc->devcfg_base;
apc               150 arch/mips/pci/pci-ar724x.c 	    apc->bar0_is_cached) {
apc               152 arch/mips/pci/pci-ar724x.c 		*value = apc->bar0_value;
apc               163 arch/mips/pci/pci-ar724x.c 	struct ar724x_pci_controller *apc;
apc               168 arch/mips/pci/pci-ar724x.c 	apc = pci_bus_to_ar724x_controller(bus);
apc               169 arch/mips/pci/pci-ar724x.c 	if (!apc->link_up)
apc               187 arch/mips/pci/pci-ar724x.c 			apc->bar0_is_cached = true;
apc               188 arch/mips/pci/pci-ar724x.c 			apc->bar0_value = value;
apc               192 arch/mips/pci/pci-ar724x.c 			apc->bar0_is_cached = false;
apc               196 arch/mips/pci/pci-ar724x.c 	base = apc->devcfg_base;
apc               231 arch/mips/pci/pci-ar724x.c 	struct ar724x_pci_controller *apc;
apc               235 arch/mips/pci/pci-ar724x.c 	apc = irq_desc_get_handler_data(desc);
apc               236 arch/mips/pci/pci-ar724x.c 	base = apc->ctrl_base;
apc               242 arch/mips/pci/pci-ar724x.c 		generic_handle_irq(apc->irq_base + 0);
apc               250 arch/mips/pci/pci-ar724x.c 	struct ar724x_pci_controller *apc;
apc               255 arch/mips/pci/pci-ar724x.c 	apc = irq_data_get_irq_chip_data(d);
apc               256 arch/mips/pci/pci-ar724x.c 	base = apc->ctrl_base;
apc               257 arch/mips/pci/pci-ar724x.c 	offset = apc->irq_base - d->irq;
apc               271 arch/mips/pci/pci-ar724x.c 	struct ar724x_pci_controller *apc;
apc               276 arch/mips/pci/pci-ar724x.c 	apc = irq_data_get_irq_chip_data(d);
apc               277 arch/mips/pci/pci-ar724x.c 	base = apc->ctrl_base;
apc               278 arch/mips/pci/pci-ar724x.c 	offset = apc->irq_base - d->irq;
apc               305 arch/mips/pci/pci-ar724x.c static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
apc               311 arch/mips/pci/pci-ar724x.c 	base = apc->ctrl_base;
apc               316 arch/mips/pci/pci-ar724x.c 	apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
apc               318 arch/mips/pci/pci-ar724x.c 	for (i = apc->irq_base;
apc               319 arch/mips/pci/pci-ar724x.c 	     i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
apc               322 arch/mips/pci/pci-ar724x.c 		irq_set_chip_data(i, apc);
apc               325 arch/mips/pci/pci-ar724x.c 	irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler,
apc               326 arch/mips/pci/pci-ar724x.c 					 apc);
apc               329 arch/mips/pci/pci-ar724x.c static void ar724x_pci_hw_init(struct ar724x_pci_controller *apc)
apc               349 arch/mips/pci/pci-ar724x.c 	app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
apc               351 arch/mips/pci/pci-ar724x.c 	__raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP);
apc               357 arch/mips/pci/pci-ar724x.c 	} while (wait < 10 && !ar724x_pci_check_link(apc));
apc               362 arch/mips/pci/pci-ar724x.c 	struct ar724x_pci_controller *apc;
apc               370 arch/mips/pci/pci-ar724x.c 	apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller),
apc               372 arch/mips/pci/pci-ar724x.c 	if (!apc)
apc               376 arch/mips/pci/pci-ar724x.c 	apc->ctrl_base = devm_ioremap_resource(&pdev->dev, res);
apc               377 arch/mips/pci/pci-ar724x.c 	if (IS_ERR(apc->ctrl_base))
apc               378 arch/mips/pci/pci-ar724x.c 		return PTR_ERR(apc->ctrl_base);
apc               381 arch/mips/pci/pci-ar724x.c 	apc->devcfg_base = devm_ioremap_resource(&pdev->dev, res);
apc               382 arch/mips/pci/pci-ar724x.c 	if (IS_ERR(apc->devcfg_base))
apc               383 arch/mips/pci/pci-ar724x.c 		return PTR_ERR(apc->devcfg_base);
apc               386 arch/mips/pci/pci-ar724x.c 	apc->crp_base = devm_ioremap_resource(&pdev->dev, res);
apc               387 arch/mips/pci/pci-ar724x.c 	if (IS_ERR(apc->crp_base))
apc               388 arch/mips/pci/pci-ar724x.c 		return PTR_ERR(apc->crp_base);
apc               390 arch/mips/pci/pci-ar724x.c 	apc->irq = platform_get_irq(pdev, 0);
apc               391 arch/mips/pci/pci-ar724x.c 	if (apc->irq < 0)
apc               398 arch/mips/pci/pci-ar724x.c 	apc->io_res.parent = res;
apc               399 arch/mips/pci/pci-ar724x.c 	apc->io_res.name = "PCI IO space";
apc               400 arch/mips/pci/pci-ar724x.c 	apc->io_res.start = res->start;
apc               401 arch/mips/pci/pci-ar724x.c 	apc->io_res.end = res->end;
apc               402 arch/mips/pci/pci-ar724x.c 	apc->io_res.flags = IORESOURCE_IO;
apc               408 arch/mips/pci/pci-ar724x.c 	apc->mem_res.parent = res;
apc               409 arch/mips/pci/pci-ar724x.c 	apc->mem_res.name = "PCI memory space";
apc               410 arch/mips/pci/pci-ar724x.c 	apc->mem_res.start = res->start;
apc               411 arch/mips/pci/pci-ar724x.c 	apc->mem_res.end = res->end;
apc               412 arch/mips/pci/pci-ar724x.c 	apc->mem_res.flags = IORESOURCE_MEM;
apc               414 arch/mips/pci/pci-ar724x.c 	apc->pci_controller.pci_ops = &ar724x_pci_ops;
apc               415 arch/mips/pci/pci-ar724x.c 	apc->pci_controller.io_resource = &apc->io_res;
apc               416 arch/mips/pci/pci-ar724x.c 	apc->pci_controller.mem_resource = &apc->mem_res;
apc               423 arch/mips/pci/pci-ar724x.c 		ar724x_pci_hw_init(apc);
apc               425 arch/mips/pci/pci-ar724x.c 	apc->link_up = ar724x_pci_check_link(apc);
apc               426 arch/mips/pci/pci-ar724x.c 	if (!apc->link_up)
apc               429 arch/mips/pci/pci-ar724x.c 	ar724x_pci_irq_init(apc, id);
apc               431 arch/mips/pci/pci-ar724x.c 	ar724x_pci_local_write(apc, PCI_COMMAND, 4, AR724X_PCI_CMD_INIT);
apc               433 arch/mips/pci/pci-ar724x.c 	register_pci_controller(&apc->pci_controller);
apc               192 arch/sparc/include/asm/vio.h 	u16			apc;     /* Alts per cylinder (SCSI)	*/