and_mask          540 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 	u32 tmp, reg, and_mask, or_mask;
and_mask          548 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		and_mask = registers[i + 1];
and_mask          551 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		if (and_mask == 0xffffffff) {
and_mask          555 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 			tmp &= ~and_mask;
and_mask          557 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 				tmp |= (or_mask & and_mask);
and_mask          448 drivers/gpu/drm/amd/amdgpu/soc15.c 		if (entry->and_mask == 0xffffffff) {
and_mask          452 drivers/gpu/drm/amd/amdgpu/soc15.c 			tmp &= ~(entry->and_mask);
and_mask          453 drivers/gpu/drm/amd/amdgpu/soc15.c 			tmp |= (entry->or_mask & entry->and_mask);
and_mask           41 drivers/gpu/drm/amd/amdgpu/soc15.h 	u32	and_mask;
and_mask           67 drivers/gpu/drm/amd/amdgpu/soc15.h #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \
and_mask           68 drivers/gpu/drm/amd/amdgpu/soc15.h 	{ ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
and_mask         2892 drivers/gpu/drm/radeon/radeon_combios.c 	uint32_t reg, val, and_mask, or_mask;
and_mask         2918 drivers/gpu/drm/radeon/radeon_combios.c 						and_mask = RBIOS32(index);
and_mask         2923 drivers/gpu/drm/radeon/radeon_combios.c 						val = (val & and_mask) | or_mask;
and_mask         2972 drivers/gpu/drm/radeon/radeon_combios.c 					and_mask = RBIOS32(index);
and_mask         2977 drivers/gpu/drm/radeon/radeon_combios.c 					val = (val & and_mask) | or_mask;
and_mask         2987 drivers/gpu/drm/radeon/radeon_combios.c 					and_mask = RBIOS32(index);
and_mask         2992 drivers/gpu/drm/radeon/radeon_combios.c 					val = (val & and_mask) | or_mask;
and_mask         3023 drivers/gpu/drm/radeon/radeon_combios.c 			uint32_t val, and_mask, or_mask;
and_mask         3039 drivers/gpu/drm/radeon/radeon_combios.c 				and_mask = RBIOS32(offset);
and_mask         3044 drivers/gpu/drm/radeon/radeon_combios.c 				tmp &= and_mask;
and_mask         3049 drivers/gpu/drm/radeon/radeon_combios.c 				and_mask = RBIOS32(offset);
and_mask         3054 drivers/gpu/drm/radeon/radeon_combios.c 				tmp &= and_mask;
and_mask         3103 drivers/gpu/drm/radeon/radeon_combios.c 			uint32_t and_mask, or_mask;
and_mask         3115 drivers/gpu/drm/radeon/radeon_combios.c 				and_mask = RBIOS8(offset) << shift;
and_mask         3116 drivers/gpu/drm/radeon/radeon_combios.c 				and_mask |= ~(0xff << shift);
and_mask         3121 drivers/gpu/drm/radeon/radeon_combios.c 				tmp &= and_mask;
and_mask          205 drivers/gpu/drm/radeon/radeon_device.c 	u32 tmp, reg, and_mask, or_mask;
and_mask          213 drivers/gpu/drm/radeon/radeon_device.c 		and_mask = registers[i + 1];
and_mask          216 drivers/gpu/drm/radeon/radeon_device.c 		if (and_mask == 0xffffffff) {
and_mask          220 drivers/gpu/drm/radeon/radeon_device.c 			tmp &= ~and_mask;
and_mask           91 drivers/iio/adc/mt6577_auxadc.c 					 u32 or_mask, u32 and_mask)
and_mask           97 drivers/iio/adc/mt6577_auxadc.c 	val &= ~and_mask;
and_mask          150 drivers/media/i2c/cx25840/cx25840-core.c int cx25840_and_or(struct i2c_client *client, u16 addr, unsigned int and_mask,
and_mask          154 drivers/media/i2c/cx25840/cx25840-core.c 			     (cx25840_read(client, addr) & and_mask) |
and_mask          158 drivers/media/i2c/cx25840/cx25840-core.c int cx25840_and_or4(struct i2c_client *client, u16 addr, u32 and_mask,
and_mask          162 drivers/media/i2c/cx25840/cx25840-core.c 			      (cx25840_read4(client, addr) & and_mask) |
and_mask          161 drivers/media/i2c/cx25840/cx25840-core.h int cx25840_and_or4(struct i2c_client *client, u16 addr, u32 and_mask,
and_mask           71 drivers/media/pci/cx18/cx18-av-core.c int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask,
and_mask           75 drivers/media/pci/cx18/cx18-av-core.c 			     (cx18_av_read(cx, addr) & and_mask) |
and_mask           79 drivers/media/pci/cx18/cx18-av-core.c int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask,
and_mask           83 drivers/media/pci/cx18/cx18-av-core.c 			     (cx18_av_read4(cx, addr) & and_mask) |
and_mask          154 drivers/media/pci/cx23885/cx23888-ir.c 				     u32 and_mask, u32 or_value)
and_mask          156 drivers/media/pci/cx23885/cx23888-ir.c 	cx_andor(addr, ~and_mask, or_value);
and_mask           90 drivers/media/pci/cx23885/netup-init.c static void i2c_av_and_or(struct i2c_adapter *i2c, u16 reg, unsigned and_mask,
and_mask           93 drivers/media/pci/cx23885/netup-init.c 	i2c_av_write(i2c, reg, (i2c_av_read(i2c, reg) & and_mask) | or_value);
and_mask          228 drivers/media/usb/cpia2/cpia2.h 	u8 and_mask;
and_mask         1674 drivers/net/ethernet/natsemi/ns83820.c 	u32 and_mask = 0xffffffff;
and_mask         1681 drivers/net/ethernet/natsemi/ns83820.c 		and_mask &= ~(RFCR_AAU | RFCR_AAM);
and_mask         1686 drivers/net/ethernet/natsemi/ns83820.c 		and_mask &= ~RFCR_AAM;
and_mask         1689 drivers/net/ethernet/natsemi/ns83820.c 	val = (readl(rfcr) & and_mask) | or_mask;
and_mask          203 drivers/staging/comedi/drivers/dt9812.c 	u8 and_mask;
and_mask          366 drivers/staging/comedi/drivers/dt9812.c 		rmw->and_mask = 0xe0;
and_mask          371 drivers/staging/comedi/drivers/dt9812.c 		rmw->and_mask = 0xff;
and_mask          387 drivers/staging/comedi/drivers/dt9812.c 	rmw->and_mask = F020_MASK_ADC0CF_AMP0GN2 |
and_mask          448 drivers/staging/comedi/drivers/dt9812.c 	rmw[2].and_mask = 0xff;
and_mask          504 drivers/staging/comedi/drivers/dt9812.c 		rmw[0].and_mask = 0xff;
and_mask          509 drivers/staging/comedi/drivers/dt9812.c 		rmw[1].and_mask = 0xff;
and_mask          514 drivers/staging/comedi/drivers/dt9812.c 		rmw[2].and_mask = 0xff;
and_mask          521 drivers/staging/comedi/drivers/dt9812.c 		rmw[0].and_mask = 0xff;
and_mask          526 drivers/staging/comedi/drivers/dt9812.c 		rmw[1].and_mask = 0xff;
and_mask          531 drivers/staging/comedi/drivers/dt9812.c 		rmw[2].and_mask = 0xff;