anatop_base 112 arch/arm/mach-imx/anatop.c void __iomem *anatop_base; anatop_base 119 arch/arm/mach-imx/anatop.c anatop_base = of_iomap(np, 0); anatop_base 120 arch/arm/mach-imx/anatop.c WARN_ON(!anatop_base); anatop_base 125 arch/arm/mach-imx/anatop.c digprog = readl_relaxed(anatop_base + offset); anatop_base 126 arch/arm/mach-imx/anatop.c iounmap(anatop_base); anatop_base 397 drivers/clk/imx/clk-imx6q.c static void disable_anatop_clocks(void __iomem *anatop_base) anatop_base 402 drivers/clk/imx/clk-imx6q.c reg = readl_relaxed(anatop_base + CCM_ANALOG_PFD_528); anatop_base 409 drivers/clk/imx/clk-imx6q.c writel_relaxed(reg, anatop_base + CCM_ANALOG_PFD_528); anatop_base 412 drivers/clk/imx/clk-imx6q.c reg = readl_relaxed(anatop_base + CCM_ANALOG_PFD_480); anatop_base 414 drivers/clk/imx/clk-imx6q.c writel_relaxed(reg, anatop_base + CCM_ANALOG_PFD_480); anatop_base 417 drivers/clk/imx/clk-imx6q.c reg = readl_relaxed(anatop_base + CCM_ANALOG_PLL_VIDEO); anatop_base 419 drivers/clk/imx/clk-imx6q.c writel_relaxed(reg, anatop_base + CCM_ANALOG_PLL_VIDEO); anatop_base 440 drivers/clk/imx/clk-imx6q.c void __iomem *anatop_base, *base; anatop_base 463 drivers/clk/imx/clk-imx6q.c anatop_base = base = of_iomap(np, 0); anatop_base 643 drivers/clk/imx/clk-imx6q.c disable_anatop_clocks(anatop_base); anatop_base 101 drivers/clk/imx/clk-imx6sl.c static void __iomem *anatop_base; anatop_base 130 drivers/clk/imx/clk-imx6sl.c if ((readl_relaxed(anatop_base + PLL_ARM) & anatop_base 144 drivers/clk/imx/clk-imx6sl.c saved_pll_arm = val = readl_relaxed(anatop_base + PLL_ARM); anatop_base 147 drivers/clk/imx/clk-imx6sl.c writel_relaxed(val, anatop_base + PLL_ARM); anatop_base 148 drivers/clk/imx/clk-imx6sl.c while (!(__raw_readl(anatop_base + PLL_ARM) & BM_PLL_ARM_LOCK)) anatop_base 151 drivers/clk/imx/clk-imx6sl.c writel_relaxed(saved_pll_arm, anatop_base + PLL_ARM); anatop_base 211 drivers/clk/imx/clk-imx6sl.c anatop_base = base; anatop_base 55 drivers/clk/imx/clk-vf610.c #define PFD_PLL1_BASE (anatop_base + 0x2b0) anatop_base 56 drivers/clk/imx/clk-vf610.c #define PFD_PLL2_BASE (anatop_base + 0x100) anatop_base 57 drivers/clk/imx/clk-vf610.c #define PFD_PLL3_BASE (anatop_base + 0xf0) anatop_base 58 drivers/clk/imx/clk-vf610.c #define PLL1_CTRL (anatop_base + 0x270) anatop_base 59 drivers/clk/imx/clk-vf610.c #define PLL2_CTRL (anatop_base + 0x30) anatop_base 60 drivers/clk/imx/clk-vf610.c #define PLL3_CTRL (anatop_base + 0x10) anatop_base 61 drivers/clk/imx/clk-vf610.c #define PLL4_CTRL (anatop_base + 0x70) anatop_base 62 drivers/clk/imx/clk-vf610.c #define PLL5_CTRL (anatop_base + 0xe0) anatop_base 63 drivers/clk/imx/clk-vf610.c #define PLL6_CTRL (anatop_base + 0xa0) anatop_base 64 drivers/clk/imx/clk-vf610.c #define PLL7_CTRL (anatop_base + 0x20) anatop_base 65 drivers/clk/imx/clk-vf610.c #define ANA_MISC1 (anatop_base + 0x160) anatop_base 67 drivers/clk/imx/clk-vf610.c static void __iomem *anatop_base; anatop_base 199 drivers/clk/imx/clk-vf610.c anatop_base = of_iomap(np, 0); anatop_base 200 drivers/clk/imx/clk-vf610.c BUG_ON(!anatop_base); anatop_base 92 drivers/soc/imx/soc-imx8.c void __iomem *anatop_base; anatop_base 99 drivers/soc/imx/soc-imx8.c anatop_base = of_iomap(np, 0); anatop_base 100 drivers/soc/imx/soc-imx8.c WARN_ON(!anatop_base); anatop_base 102 drivers/soc/imx/soc-imx8.c rev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM); anatop_base 104 drivers/soc/imx/soc-imx8.c iounmap(anatop_base);