ana_cfg1_end      201 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 	u32 ana_cfg1_end;
ana_cfg1_end      223 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 	ana_cfg1_end = SUN8I_HDMI_PHY_ANA_CFG1_REG_SVBH(1) |
ana_cfg1_end      262 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 		ana_cfg1_end |= SUN8I_HDMI_PHY_ANA_CFG1_REG_CALSW;
ana_cfg1_end      272 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 		ana_cfg1_end |= SUN8I_HDMI_PHY_ANA_CFG1_REG_CALSW;
ana_cfg1_end      336 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 	regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, ana_cfg1_end);