alpha_mv 254 arch/alpha/include/asm/core_cia.h #define GRU_INT_REQ_BITS (alpha_mv.sys.cia.gru_int_req_bits+0) alpha_mv 32 arch/alpha/include/asm/core_t2.h #define GAMMA_BIAS alpha_mv.sys.t2.gamma_bias alpha_mv 108 arch/alpha/include/asm/dma.h # define MAX_ISA_DMA_ADDRESS (alpha_mv.max_isa_dma_address) alpha_mv 126 arch/alpha/include/asm/dma.h #define MAX_DMA_ADDRESS (alpha_mv.mv_pci_tbi ? \ alpha_mv 10 arch/alpha/include/asm/hw_irq.h #define ACTUAL_NR_IRQS alpha_mv.nr_irqs alpha_mv 44 arch/alpha/include/asm/io.h alpha_mv.hae_cache = new_hae; alpha_mv 45 arch/alpha/include/asm/io.h *alpha_mv.hae_register = new_hae; alpha_mv 48 arch/alpha/include/asm/io.h new_hae = *alpha_mv.hae_register; alpha_mv 56 arch/alpha/include/asm/io.h if (new_hae != alpha_mv.hae_cache) alpha_mv 145 arch/alpha/include/asm/io.h return alpha_mv.mv_##NAME(addr); \ alpha_mv 151 arch/alpha/include/asm/io.h alpha_mv.mv_##NAME(b, addr); \ alpha_mv 175 arch/alpha/include/asm/io.h return alpha_mv.mv_ioportmap(a); alpha_mv 180 arch/alpha/include/asm/io.h return alpha_mv.mv_ioremap(a, s); alpha_mv 185 arch/alpha/include/asm/io.h return alpha_mv.mv_iounmap(a); alpha_mv 190 arch/alpha/include/asm/io.h return alpha_mv.mv_is_ioaddr(a); alpha_mv 195 arch/alpha/include/asm/io.h return alpha_mv.mv_is_mmio(a); alpha_mv 548 arch/alpha/include/asm/io.h # define RTC_PORT(x) ((x) + alpha_mv.rtc_port) alpha_mv 96 arch/alpha/include/asm/jensen.h if (addr != alpha_mv.hae_cache) alpha_mv 124 arch/alpha/include/asm/machvec.h extern struct alpha_machine_vector alpha_mv; alpha_mv 72 arch/alpha/include/asm/mmu_context.h # define MAX_ASN (alpha_mv.max_asn) alpha_mv 220 arch/alpha/include/asm/mmu_context.h # define switch_mm(a,b,c) alpha_mv.mv_switch_mm((a),(b),(c)) alpha_mv 221 arch/alpha/include/asm/mmu_context.h # define activate_mm(x,y) alpha_mv.mv_activate_mm((x),(y)) alpha_mv 20 arch/alpha/include/asm/mmzone.h (alpha_mv.pa_to_nid \ alpha_mv 21 arch/alpha/include/asm/mmzone.h ? alpha_mv.pa_to_nid(pa) \ alpha_mv 24 arch/alpha/include/asm/mmzone.h (alpha_mv.node_mem_start \ alpha_mv 25 arch/alpha/include/asm/mmzone.h ? alpha_mv.node_mem_start(nid) \ alpha_mv 28 arch/alpha/include/asm/mmzone.h (alpha_mv.node_mem_size \ alpha_mv 29 arch/alpha/include/asm/mmzone.h ? alpha_mv.node_mem_size(nid) \ alpha_mv 54 arch/alpha/include/asm/pci.h #define PCIBIOS_MIN_IO alpha_mv.min_io_address alpha_mv 55 arch/alpha/include/asm/pci.h #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address alpha_mv 64 arch/alpha/include/asm/tlbflush.h # define flush_tlb_current alpha_mv.mv_flush_tlb_current alpha_mv 65 arch/alpha/include/asm/tlbflush.h # define flush_tlb_current_page alpha_mv.mv_flush_tlb_current_page alpha_mv 15 arch/alpha/include/asm/topology.h if (!alpha_mv.cpuid_to_nid) alpha_mv 18 arch/alpha/include/asm/topology.h node = alpha_mv.cpuid_to_nid(cpu); alpha_mv 528 arch/alpha/kernel/core_cia.c alpha_mv.mv_pci_tbi = cia_pci_tbi_try2; alpha_mv 539 arch/alpha/kernel/core_cia.c alpha_mv.mv_pci_tbi(arena->hose, 0, -1); alpha_mv 558 arch/alpha/kernel/core_cia.c alpha_mv.mv_pci_tbi = NULL; alpha_mv 770 arch/alpha/kernel/core_cia.c alpha_mv.pci_dac_offset = 0x200000000UL; alpha_mv 771 arch/alpha/kernel/core_cia.c *(vip)CIA_IOC_PCI_W_DAC = alpha_mv.pci_dac_offset >> 32; alpha_mv 225 arch/alpha/kernel/core_irongate.c alpha_mv.min_mem_address = pci_mem; alpha_mv 75 arch/alpha/kernel/irq_alpha.c alpha_mv.machine_check(vector, la_ptr); alpha_mv 80 arch/alpha/kernel/irq_alpha.c alpha_mv.device_interrupt(vector); alpha_mv 109 arch/alpha/kernel/irq_alpha.c alpha_mv.init_irq(); alpha_mv 104 arch/alpha/kernel/irq_i8259.c # define IACK_SC alpha_mv.iack_sc alpha_mv 16 arch/alpha/kernel/machvec_impl.h #define IRONGATE_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 17 arch/alpha/kernel/machvec_impl.h #define MARVEL_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 18 arch/alpha/kernel/machvec_impl.h #define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 19 arch/alpha/kernel/machvec_impl.h #define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 20 arch/alpha/kernel/machvec_impl.h #define TITAN_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 21 arch/alpha/kernel/machvec_impl.h #define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 24 arch/alpha/kernel/machvec_impl.h #define CIA_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 27 arch/alpha/kernel/machvec_impl.h #define MCPCIA_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 30 arch/alpha/kernel/machvec_impl.h #define T2_HAE_ADDRESS (&alpha_mv.hae_cache) alpha_mv 148 arch/alpha/kernel/machvec_impl.h struct alpha_machine_vector alpha_mv __attribute__((alias(#system "_mv"))); \ alpha_mv 149 arch/alpha/kernel/machvec_impl.h EXPORT_SYMBOL(alpha_mv); alpha_mv 153 arch/alpha/kernel/machvec_impl.h EXPORT_SYMBOL(alpha_mv); alpha_mv 193 arch/alpha/kernel/pci.c if (alpha_mv.init_pci) alpha_mv 194 arch/alpha/kernel/pci.c alpha_mv.init_pci(); alpha_mv 359 arch/alpha/kernel/pci.c bridge->ops = alpha_mv.pci_ops; alpha_mv 360 arch/alpha/kernel/pci.c bridge->swizzle_irq = alpha_mv.pci_swizzle; alpha_mv 361 arch/alpha/kernel/pci.c bridge->map_irq = alpha_mv.pci_map_irq; alpha_mv 176 arch/alpha/kernel/pci_iommu.c alpha_mv.mv_pci_tbi(arena->hose, 0, -1); alpha_mv 240 arch/alpha/kernel/pci_iommu.c dma_addr_t dac_offset = alpha_mv.pci_dac_offset; alpha_mv 293 arch/alpha/kernel/pci_iommu.c ret = paddr + alpha_mv.pci_dac_offset; alpha_mv 304 arch/alpha/kernel/pci_iommu.c if (! alpha_mv.mv_pci_tbi) { alpha_mv 434 arch/alpha/kernel/pci_iommu.c alpha_mv.mv_pci_tbi(hose, dma_addr, dma_addr + size - 1); alpha_mv 472 arch/alpha/kernel/pci_iommu.c if (alpha_mv.mv_pci_tbi || (gfp & GFP_DMA)) alpha_mv 595 arch/alpha/kernel/pci_iommu.c out->dma_address = paddr + alpha_mv.pci_dac_offset; alpha_mv 693 arch/alpha/kernel/pci_iommu.c sg_classify(dev, sg, end, alpha_mv.mv_pci_tbi != 0); alpha_mv 696 arch/alpha/kernel/pci_iommu.c if (alpha_mv.mv_pci_tbi) { alpha_mv 757 arch/alpha/kernel/pci_iommu.c if (! alpha_mv.mv_pci_tbi) alpha_mv 812 arch/alpha/kernel/pci_iommu.c alpha_mv.mv_pci_tbi(hose, fbeg, fend); alpha_mv 149 arch/alpha/kernel/process.c if (alpha_mv.kill_arch) alpha_mv 150 arch/alpha/kernel/process.c alpha_mv.kill_arch(how->mode); alpha_mv 261 arch/alpha/kernel/process.c childregs->hae = alpha_mv.hae_cache, alpha_mv 215 arch/alpha/kernel/rtc.c if (alpha_mv.rtc_boot_cpu_only) alpha_mv 118 arch/alpha/kernel/setup.c struct alpha_machine_vector alpha_mv; alpha_mv 119 arch/alpha/kernel/setup.c EXPORT_SYMBOL(alpha_mv); alpha_mv 578 arch/alpha/kernel/setup.c if (vec != &alpha_mv) { alpha_mv 579 arch/alpha/kernel/setup.c alpha_mv = *vec; alpha_mv 588 arch/alpha/kernel/setup.c var_name, alpha_mv.vector_name, alpha_mv 629 arch/alpha/kernel/setup.c srm_hae = *alpha_mv.hae_register; alpha_mv 630 arch/alpha/kernel/setup.c __set_hae(alpha_mv.hae_cache); alpha_mv 644 arch/alpha/kernel/setup.c if (alpha_mv.init_arch) alpha_mv 645 arch/alpha/kernel/setup.c alpha_mv.init_arch(); alpha_mv 144 arch/alpha/kernel/smp.c if (alpha_mv.smp_callin) alpha_mv 145 arch/alpha/kernel/smp.c alpha_mv.smp_callin(); alpha_mv 115 arch/alpha/kernel/sys_alcor.c alpha_mv.device_interrupt = srm_device_interrupt; alpha_mv 243 arch/alpha/kernel/sys_alcor.c alpha_mv.sys.cia.gru_int_req_bits = XLT_GRU_INT_REQ_BITS; alpha_mv 97 arch/alpha/kernel/sys_cabriolet.c alpha_mv.device_interrupt = srm_dev_int; alpha_mv 279 arch/alpha/kernel/sys_dp264.c alpha_mv.device_interrupt = dp264_srm_device_interrupt; alpha_mv 296 arch/alpha/kernel/sys_dp264.c alpha_mv.device_interrupt = clipper_srm_device_interrupt; alpha_mv 109 arch/alpha/kernel/sys_eb64p.c alpha_mv = cabriolet_mv; alpha_mv 110 arch/alpha/kernel/sys_eb64p.c alpha_mv.init_irq(); alpha_mv 132 arch/alpha/kernel/sys_eiger.c alpha_mv.device_interrupt = eiger_srm_device_interrupt; alpha_mv 66 arch/alpha/kernel/sys_miata.c alpha_mv.device_interrupt = miata_srm_device_interrupt; alpha_mv 97 arch/alpha/kernel/sys_mikasa.c alpha_mv.device_interrupt = srm_device_interrupt; alpha_mv 59 arch/alpha/kernel/sys_nautilus.c alpha_mv.device_interrupt = srm_device_interrupt; alpha_mv 226 arch/alpha/kernel/sys_nautilus.c bridge->ops = alpha_mv.pci_ops; alpha_mv 227 arch/alpha/kernel/sys_nautilus.c bridge->swizzle_irq = alpha_mv.pci_swizzle; alpha_mv 228 arch/alpha/kernel/sys_nautilus.c bridge->map_irq = alpha_mv.pci_map_irq; alpha_mv 267 arch/alpha/kernel/sys_nautilus.c if (memtop > alpha_mv.min_mem_address) { alpha_mv 268 arch/alpha/kernel/sys_nautilus.c free_reserved_area(__va(alpha_mv.min_mem_address), alpha_mv 271 arch/alpha/kernel/sys_nautilus.c (memtop - alpha_mv.min_mem_address) >> 10); alpha_mv 125 arch/alpha/kernel/sys_noritake.c alpha_mv.device_interrupt = noritake_srm_device_interrupt; alpha_mv 52 arch/alpha/kernel/sys_sio.c alpha_mv.device_interrupt = srm_device_interrupt; alpha_mv 94 arch/alpha/kernel/sys_sio.c orig_route_tab, alpha_mv.sys.sio.route_tab); alpha_mv 102 arch/alpha/kernel/sys_sio.c alpha_mv.sys.sio.route_tab); alpha_mv 199 arch/alpha/kernel/sys_sio.c tmp = __kernel_extbl(alpha_mv.sys.sio.route_tab, irq); alpha_mv 225 arch/alpha/kernel/sys_sio.c tmp = __kernel_extbl(alpha_mv.sys.sio.route_tab, irq); alpha_mv 46 arch/alpha/kernel/sys_sx164.c alpha_mv.device_interrupt = srm_device_interrupt; alpha_mv 124 arch/alpha/kernel/sys_takara.c alpha_mv.device_interrupt = takara_srm_device_interrupt; alpha_mv 250 arch/alpha/kernel/sys_takara.c alpha_mv.pci_map_irq = takara_map_irq_srm; alpha_mv 209 arch/alpha/kernel/sys_titan.c if (alpha_using_srm && !alpha_mv.device_interrupt) alpha_mv 210 arch/alpha/kernel/sys_titan.c alpha_mv.device_interrupt = titan_srm_device_interrupt; alpha_mv 211 arch/alpha/kernel/sys_titan.c if (!alpha_mv.device_interrupt) alpha_mv 212 arch/alpha/kernel/sys_titan.c alpha_mv.device_interrupt = titan_device_interrupt; alpha_mv 255 arch/alpha/kernel/sys_titan.c alpha_mv.device_interrupt(vector); alpha_mv 446 arch/alpha/kernel/time.c alpha_mv.init_rtc(); alpha_mv 68 drivers/char/agp/alpha-agp.c alpha_mv.mv_pci_tbi(agp->hose, 0, -1); alpha_mv 155 drivers/char/agp/alpha-agp.c alpha_agp_info *agp = alpha_mv.agp_info(); alpha_mv 205 drivers/char/agp/alpha-agp.c if (alpha_mv.agp_info)