allowed_mclk_vddci_table 2460 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_clock_voltage_dependency_table *allowed_mclk_vddci_table = hwmgr->dyn_state.vddci_dependency_on_mclk;
allowed_mclk_vddci_table 2486 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	if (allowed_mclk_vddci_table != NULL && allowed_mclk_vddci_table->count >= 1) {
allowed_mclk_vddci_table 2487 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		data->min_vddci_in_pptable = (uint16_t)allowed_mclk_vddci_table->entries[0].v;
allowed_mclk_vddci_table 2488 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		data->max_vddci_in_pptable = (uint16_t)allowed_mclk_vddci_table->entries[allowed_mclk_vddci_table->count - 1].v;
allowed_mclk_vddci_table 4924 drivers/gpu/drm/radeon/ci_dpm.c 	struct radeon_clock_voltage_dependency_table *allowed_mclk_vddci_table =
allowed_mclk_vddci_table 4935 drivers/gpu/drm/radeon/ci_dpm.c 	if (allowed_mclk_vddci_table == NULL)
allowed_mclk_vddci_table 4937 drivers/gpu/drm/radeon/ci_dpm.c 	if (allowed_mclk_vddci_table->count < 1)
allowed_mclk_vddci_table 4944 drivers/gpu/drm/radeon/ci_dpm.c 	pi->min_vddci_in_pp_table = allowed_mclk_vddci_table->entries[0].v;
allowed_mclk_vddci_table 4946 drivers/gpu/drm/radeon/ci_dpm.c 		allowed_mclk_vddci_table->entries[allowed_mclk_vddci_table->count - 1].v;
allowed_mclk_vddci_table 4955 drivers/gpu/drm/radeon/ci_dpm.c 		allowed_mclk_vddci_table->entries[allowed_mclk_vddci_table->count - 1].v;